nop /* delay slot */ emt2: mfc0 v0, CP0_TCSTATUS /* Clear IXMT, then OR in previous value */ ori v0, TCSTATUS_IXMT xori v0, TCSTATUS_IXMT or v0, v1, v0 mtc0 v0, CP0_TCSTATUS /* * irq_disable_hazard below should expand to EHB * on 24K/34K CPUS */ .set pop#endif /* CONFIG_MIPS_MT_SMTC */ irq_disable_hazard .endm #endif /* _ASM_STACKFRAME_H */Lines 501–519 of 519. Previous lines
nop /* delay slot */ emt 2: mfc0 v0, CP0_TCSTATUS /* Clear IXMT, then OR in previous value */ ori v0, TCSTATUS_IXMT xori v0, TCSTATUS_IXMT or v0, v1, v0 mtc0 v0, CP0_TCSTATUS /* * irq_disable_hazard below should expand to EHB * on 24K/34K CPUS */ .set pop #endif /* CONFIG_MIPS_MT_SMTC */ irq_disable_hazard .endm #endif /* _ASM_STACKFRAME_H */