lael-labs/linux

.mailmap+1−0

@@ -345,3 +345,4 @@ Wolfram Sang <wsa@kernel.org> <w.sang@pengutronix.de> · 344 unmodified lines
345	Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>	345	Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
346	Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>	346	Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
347	Yusuke Goda <goda.yusuke@renesas.com>	347	Yusuke Goda <goda.yusuke@renesas.com>
		348	Zhu Yanjun <zyjzyj2000@gmail.com> <yanjunz@nvidia.com>

MAINTAINERS+1−1

@@ -16399,7 +16399,7 @@ F: drivers/infiniband/sw/siw/ · 16398 unmodified lines
16399	F: include/uapi/rdma/siw-abi.h	16399	F: include/uapi/rdma/siw-abi.h
16400		16400
16401	SOFT-ROCE DRIVER (rxe)	16401	SOFT-ROCE DRIVER (rxe)
16402	M: Zhu Yanjun <yanjunz@nvidia.com>	16402	M: Zhu Yanjun <zyjzyj2000@gmail.com>
16403	L: linux-rdma@vger.kernel.org	16403	L: linux-rdma@vger.kernel.org
16404	S: Supported	16404	S: Supported
16405	F: drivers/infiniband/sw/rxe/	16405	F: drivers/infiniband/sw/rxe/

drivers/infiniband/core/cm.c+5−4

 EXPORT_SYMBOL(ib_cm_listen);
 /**
- * Create a new listening ib_cm_id and listen on the given service ID.
+ * ib_cm_insert_listen - Create a new listening ib_cm_id and listen on
+ *			 the given service ID.
  *
  * If there's an existing ID listening on that same device and service ID,
  * return it.
 }
 /**
- * Convert OPA SGID to IB SGID
+ * cm_opa_to_ib_sgid - Convert OPA SGID to IB SGID
  * ULPs (such as IPoIB) do not understand OPA GIDs and will
  * reject them as the local_gid will not match the sgid. Therefore,
  * change the pathrec's SGID to an IB SGID.
 	group = container_of(obj, struct cm_counter_group, obj);
 	cm_attr = container_of(attr, struct cm_counter_attribute, attr);
-	return sprintf(buf, "%ld\n",
+	return sysfs_emit(buf, "%ld\n",
-		       atomic_long_read(&group->counter[cm_attr->index]));
+			  atomic_long_read(&group->counter[cm_attr->index]));
 }
 static const struct sysfs_ops cm_counter_ops = {

drivers/infiniband/core/cma.c+117−78

 	list_del(&id_priv->list);
 	cma_dev_put(id_priv->cma_dev);
 	id_priv->cma_dev = NULL;
+	if (id_priv->id.route.addr.dev_addr.sgid_attr) {
+		rdma_put_gid_attr(id_priv->id.route.addr.dev_addr.sgid_attr);
+		id_priv->id.route.addr.dev_addr.sgid_attr = NULL;
+	}
 	mutex_unlock(&lock);
 }
 	kfree(id_priv->id.route.path_rec);
-	if (id_priv->id.route.addr.dev_addr.sgid_attr)
-		rdma_put_gid_attr(id_priv->id.route.addr.dev_addr.sgid_attr);
 	put_net(id_priv->id.route.addr.dev_addr.net);
 	rdma_restrack_del(&id_priv->res);
 	kfree(id_priv);
 	return id_priv->id.event_handler(id, event);
 }
-static void cma_listen_on_dev(struct rdma_id_private *id_priv,
+static int cma_listen_on_dev(struct rdma_id_private *id_priv,
-			      struct cma_device *cma_dev)
+			     struct cma_device *cma_dev,
+			     struct rdma_id_private **to_destroy)
 {
 	struct rdma_id_private *dev_id_priv;
 	struct net *net = id_priv->id.route.addr.dev_addr.net;
 	lockdep_assert_held(&lock);
+	*to_destroy = NULL;
 	if (cma_family(id_priv) == AF_IB && !rdma_cap_ib_cm(cma_dev->device, 1))
-		return;
+		return 0;
 	dev_id_priv =
 		__rdma_create_id(net, cma_listen_handler, id_priv,
 				 id_priv->id.ps, id_priv->id.qp_type, id_priv);
 	if (IS_ERR(dev_id_priv))
-		return;
+		return PTR_ERR(dev_id_priv);
 	dev_id_priv->state = RDMA_CM_ADDR_BOUND;
 	memcpy(cma_src_addr(dev_id_priv), cma_src_addr(id_priv),
 	       rdma_addr_size(cma_src_addr(id_priv)));
 	_cma_attach_to_dev(dev_id_priv, cma_dev);
-	list_add_tail(&dev_id_priv->listen_list, &id_priv->listen_list);
 	cma_id_get(id_priv);
 	dev_id_priv->internal_id = 1;
 	dev_id_priv->afonly = id_priv->afonly;
 	ret = rdma_listen(&dev_id_priv->id, id_priv->backlog);
 	if (ret)
-		dev_warn(&cma_dev->device->dev,
+		goto err_listen;
-			 "RDMA CMA: cma_listen_on_dev, error %d\n", ret);
+	list_add_tail(&dev_id_priv->listen_list, &id_priv->listen_list);
+	return 0;
+err_listen:
+	/* Caller must destroy this after releasing lock */
+	*to_destroy = dev_id_priv;
+	dev_warn(&cma_dev->device->dev, "RDMA CMA: %s, error %d\n", __func__, ret);
+	return ret;
 }
-static void cma_listen_on_all(struct rdma_id_private *id_priv)
+static int cma_listen_on_all(struct rdma_id_private *id_priv)
 {
+	struct rdma_id_private *to_destroy;
 	struct cma_device *cma_dev;
+	int ret;
 	mutex_lock(&lock);
 	list_add_tail(&id_priv->list, &listen_any_list);
-	list_for_each_entry(cma_dev, &dev_list, list)
+	list_for_each_entry(cma_dev, &dev_list, list) {
-		cma_listen_on_dev(id_priv, cma_dev);
+		ret = cma_listen_on_dev(id_priv, cma_dev, &to_destroy);
+		if (ret) {
+			/* Prevent racing with cma_process_remove() */
+			if (to_destroy)
+				list_del_init(&to_destroy->list);
+			goto err_listen;
+		}
+	}
 	mutex_unlock(&lock);
+	return 0;
+err_listen:
+	list_del(&id_priv->list);
+	mutex_unlock(&lock);
+	if (to_destroy)
+		rdma_destroy_id(&to_destroy->id);
+	return ret;
 }
 void rdma_set_service_type(struct rdma_cm_id *id, int tos)
 			ret = -ENOSYS;
 			goto err;
 		}
-	} else
+	} else {
-		cma_listen_on_all(id_priv);
+		ret = cma_listen_on_all(id_priv);
+		if (ret)
+			goto err;
+	}
 	return 0;
 err:
 	.notifier_call = cma_netdev_callback
 };
-static int cma_add_one(struct ib_device *device)
-{
-	struct cma_device *cma_dev;
-	struct rdma_id_private *id_priv;
-	unsigned int i;
-	unsigned long supported_gids = 0;
-	int ret;
-	cma_dev = kmalloc(sizeof *cma_dev, GFP_KERNEL);
-	if (!cma_dev)
-		return -ENOMEM;
-	cma_dev->device = device;
-	cma_dev->default_gid_type = kcalloc(device->phys_port_cnt,
-					    sizeof(*cma_dev->default_gid_type),
-					    GFP_KERNEL);
-	if (!cma_dev->default_gid_type) {
-		ret = -ENOMEM;
-		goto free_cma_dev;
-	}
-	cma_dev->default_roce_tos = kcalloc(device->phys_port_cnt,
-					    sizeof(*cma_dev->default_roce_tos),
-					    GFP_KERNEL);
-	if (!cma_dev->default_roce_tos) {
-		ret = -ENOMEM;
-		goto free_gid_type;
-	}
-	rdma_for_each_port (device, i) {
-		supported_gids = roce_gid_type_mask_support(device, i);
-		WARN_ON(!supported_gids);
-		if (supported_gids & (1 << CMA_PREFERRED_ROCE_GID_TYPE))
-			cma_dev->default_gid_type[i - rdma_start_port(device)] =
-				CMA_PREFERRED_ROCE_GID_TYPE;
-		else
-			cma_dev->default_gid_type[i - rdma_start_port(device)] =
-				find_first_bit(&supported_gids, BITS_PER_LONG);
-		cma_dev->default_roce_tos[i - rdma_start_port(device)] = 0;
-	}
-	init_completion(&cma_dev->comp);
-	refcount_set(&cma_dev->refcount, 1);
-	INIT_LIST_HEAD(&cma_dev->id_list);
-	ib_set_client_data(device, &cma_client, cma_dev);
-	mutex_lock(&lock);
-	list_add_tail(&cma_dev->list, &dev_list);
-	list_for_each_entry(id_priv, &listen_any_list, list)
-		cma_listen_on_dev(id_priv, cma_dev);
-	mutex_unlock(&lock);
-	trace_cm_add_one(device);
-	return 0;
-free_gid_type:
-	kfree(cma_dev->default_gid_type);
-free_cma_dev:
-	kfree(cma_dev);
-	return ret;
-}
 static void cma_send_device_removal_put(struct rdma_id_private *id_priv)
 {
 	struct rdma_cm_event event = { .event = RDMA_CM_EVENT_DEVICE_REMOVAL };
 	wait_for_completion(&cma_dev->comp);
 }
+static int cma_add_one(struct ib_device *device)
+{
+	struct rdma_id_private *to_destroy;
+	struct cma_device *cma_dev;
+	struct rdma_id_private *id_priv;
+	unsigned int i;
+	unsigned long supported_gids = 0;
+	int ret;
+	cma_dev = kmalloc(sizeof(*cma_dev), GFP_KERNEL);
+	if (!cma_dev)
+		return -ENOMEM;
+	cma_dev->device = device;
+	cma_dev->default_gid_type = kcalloc(device->phys_port_cnt,
+					    sizeof(*cma_dev->default_gid_type),
+					    GFP_KERNEL);
+	if (!cma_dev->default_gid_type) {
+		ret = -ENOMEM;
+		goto free_cma_dev;
+	}
+	cma_dev->default_roce_tos = kcalloc(device->phys_port_cnt,
+					    sizeof(*cma_dev->default_roce_tos),
+					    GFP_KERNEL);
+	if (!cma_dev->default_roce_tos) {
+		ret = -ENOMEM;
+		goto free_gid_type;
+	}
+	rdma_for_each_port (device, i) {
+		supported_gids = roce_gid_type_mask_support(device, i);
+		WARN_ON(!supported_gids);
+		if (supported_gids & (1 << CMA_PREFERRED_ROCE_GID_TYPE))
+			cma_dev->default_gid_type[i - rdma_start_port(device)] =
+				CMA_PREFERRED_ROCE_GID_TYPE;
+		else
+			cma_dev->default_gid_type[i - rdma_start_port(device)] =
+				find_first_bit(&supported_gids, BITS_PER_LONG);
+		cma_dev->default_roce_tos[i - rdma_start_port(device)] = 0;
+	}
+	init_completion(&cma_dev->comp);
+	refcount_set(&cma_dev->refcount, 1);
+	INIT_LIST_HEAD(&cma_dev->id_list);
+	ib_set_client_data(device, &cma_client, cma_dev);
+	mutex_lock(&lock);
+	list_add_tail(&cma_dev->list, &dev_list);
+	list_for_each_entry(id_priv, &listen_any_list, list) {
+		ret = cma_listen_on_dev(id_priv, cma_dev, &to_destroy);
+		if (ret)
+			goto free_listen;
+	}
+	mutex_unlock(&lock);
+	trace_cm_add_one(device);
+	return 0;
+free_listen:
+	list_del(&cma_dev->list);
+	mutex_unlock(&lock);
+	/* cma_process_remove() will delete to_destroy */
+	cma_process_remove(cma_dev);
+	kfree(cma_dev->default_roce_tos);
+free_gid_type:
+	kfree(cma_dev->default_gid_type);
+free_cma_dev:
+	kfree(cma_dev);
+	return ret;
+}
 static void cma_remove_one(struct ib_device *device, void *client_data)
 {
 	struct cma_device *cma_dev = client_data;

drivers/infiniband/core/cma_configfs.c+2−2

@@ -115,7 +115,7 @@ static ssize_t default_roce_mode_show(struct config_item *item, · 114 unmodified lines
115	if (gid_type < 0)	115	if (gid_type < 0)
116	return gid_type;	116	return gid_type;
117		117
118	return sprintf(buf, "%s\n", ib_cache_gid_type_str(gid_type));	118	return sysfs_emit(buf, "%s\n", ib_cache_gid_type_str(gid_type));
119	}	119	}
120		120
121	static ssize_t default_roce_mode_store(struct config_item *item,	121	static ssize_t default_roce_mode_store(struct config_item *item,
@@ -157,7 +157,7 @@ static ssize_t default_roce_tos_show(struct config_item item, char buf) · 35 unmodified lines
157	tos = cma_get_default_roce_tos(cma_dev, group->port_num);	157	tos = cma_get_default_roce_tos(cma_dev, group->port_num);
158	cma_configfs_params_put(cma_dev);	158	cma_configfs_params_put(cma_dev);
159		159
160	return sprintf(buf, "%u\n", tos);	160	return sysfs_emit(buf, "%u\n", tos);
161	}	161	}
162		162
163	static ssize_t default_roce_tos_store(struct config_item *item,	163	static ssize_t default_roce_tos_store(struct config_item *item,

drivers/infiniband/core/core_priv.h+9−19

 void nldev_init(void);
 void nldev_exit(void);
-static inline struct ib_qp *_ib_create_qp(struct ib_device *dev,
+static inline struct ib_qp *
-					  struct ib_pd *pd,
+_ib_create_qp(struct ib_device *dev, struct ib_pd *pd,
-					  struct ib_qp_init_attr *attr,
+	      struct ib_qp_init_attr *attr, struct ib_udata *udata,
-					  struct ib_udata *udata,
+	      struct ib_uqp_object *uobj, const char *caller)
-					  struct ib_uqp_object *uobj)
 {
-	enum ib_qp_type qp_type = attr->qp_type;
 	struct ib_qp *qp;
-	bool is_xrc;
 	if (!dev->ops.create_qp)
 		return ERR_PTR(-EOPNOTSUPP);
 	qp->srq = attr->srq;
 	qp->rwq_ind_tbl = attr->rwq_ind_tbl;
 	qp->event_handler = attr->event_handler;
+	qp->port = attr->port_num;
 	atomic_set(&qp->usecnt, 0);
 	spin_lock_init(&qp->mr_lock);
 	INIT_LIST_HEAD(&qp->sig_mrs);
 	rdma_restrack_new(&qp->res, RDMA_RESTRACK_QP);
-	/*
+	WARN_ONCE(!udata && !caller, "Missing kernel QP owner");
-	 * We don't track XRC QPs for now, because they don't have PD
+	rdma_restrack_set_name(&qp->res, udata ? NULL : caller);
-	 * and more importantly they are created internaly by driver,
+	rdma_restrack_add(&qp->res);
-	 * see mlx5 create_dev_resources() as an example.
-	 */
-	is_xrc = qp_type == IB_QPT_XRC_INI || qp_type == IB_QPT_XRC_TGT;
-	if ((qp_type < IB_QPT_MAX && !is_xrc) || qp_type == IB_QPT_DRIVER) {
-		rdma_restrack_parent_name(&qp->res, &pd->res);
-		rdma_restrack_add(&qp->res);
-	}
 	return qp;
 }
 			 struct vm_area_struct *vma,
 			 struct rdma_user_mmap_entry *entry);
-void ib_cq_pool_init(struct ib_device *dev);
+void ib_cq_pool_cleanup(struct ib_device *dev);
-void ib_cq_pool_destroy(struct ib_device *dev);
 #endif /* _CORE_PRIV_H */

drivers/infiniband/core/counters.c+63−75

 	return ret;
 }
-static struct rdma_counter *rdma_counter_alloc(struct ib_device *dev, u8 port,
+static void auto_mode_init_counter(struct rdma_counter *counter,
-					       enum rdma_nl_counter_mode mode)
+				   const struct ib_qp *qp,
+				   enum rdma_nl_counter_mask new_mask)
+{
+	struct auto_mode_param *param = &counter->mode.param;
+	counter->mode.mode = RDMA_COUNTER_MODE_AUTO;
+	counter->mode.mask = new_mask;
+	if (new_mask & RDMA_COUNTER_MASK_QP_TYPE)
+		param->qp_type = qp->qp_type;
+}
+static int __rdma_counter_bind_qp(struct rdma_counter *counter,
+				  struct ib_qp *qp)
+{
+	int ret;
+	if (qp->counter)
+		return -EINVAL;
+	if (!qp->device->ops.counter_bind_qp)
+		return -EOPNOTSUPP;
+	mutex_lock(&counter->lock);
+	ret = qp->device->ops.counter_bind_qp(counter, qp);
+	mutex_unlock(&counter->lock);
+	return ret;
+}
+static struct rdma_counter *alloc_and_bind(struct ib_device *dev, u8 port,
+					   struct ib_qp *qp,
+					   enum rdma_nl_counter_mode mode)
 {
 	struct rdma_port_counter *port_counter;
 	struct rdma_counter *counter;
 	port_counter = &dev->port_data[port].port_counter;
 	mutex_lock(&port_counter->lock);
-	if (mode == RDMA_COUNTER_MODE_MANUAL) {
+	switch (mode) {
+	case RDMA_COUNTER_MODE_MANUAL:
 		ret = __counter_set_mode(&port_counter->mode,
 					 RDMA_COUNTER_MODE_MANUAL, 0);
-		if (ret)
+		if (ret) {
+			mutex_unlock(&port_counter->lock);
 			goto err_mode;
+		}
+		break;
+	case RDMA_COUNTER_MODE_AUTO:
+		auto_mode_init_counter(counter, qp, port_counter->mode.mask);
+		break;
+	default:
+		ret = -EOPNOTSUPP;
+		mutex_unlock(&port_counter->lock);
+		goto err_mode;
 	}
 	port_counter->num_counters++;
 	kref_init(&counter->kref);
 	mutex_init(&counter->lock);
+	ret = __rdma_counter_bind_qp(counter, qp);
+	if (ret)
+		goto err_mode;
+	rdma_restrack_parent_name(&counter->res, &qp->res);
+	rdma_restrack_add(&counter->res);
 	return counter;
 err_mode:
-	mutex_unlock(&port_counter->lock);
 	kfree(counter->stats);
 err_stats:
 	rdma_restrack_put(&counter->res);
 	kfree(counter);
 }
-static void auto_mode_init_counter(struct rdma_counter *counter,
-				   const struct ib_qp *qp,
-				   enum rdma_nl_counter_mask new_mask)
-{
-	struct auto_mode_param *param = &counter->mode.param;
-	counter->mode.mode = RDMA_COUNTER_MODE_AUTO;
-	counter->mode.mask = new_mask;
-	if (new_mask & RDMA_COUNTER_MASK_QP_TYPE)
-		param->qp_type = qp->qp_type;
-}
 static bool auto_mode_match(struct ib_qp *qp, struct rdma_counter *counter,
 			    enum rdma_nl_counter_mask auto_mask)
 {
 	return match;
 }
-static int __rdma_counter_bind_qp(struct rdma_counter *counter,
-				  struct ib_qp *qp)
-{
-	int ret;
-	if (qp->counter)
-		return -EINVAL;
-	if (!qp->device->ops.counter_bind_qp)
-		return -EOPNOTSUPP;
-	mutex_lock(&counter->lock);
-	ret = qp->device->ops.counter_bind_qp(counter, qp);
-	mutex_unlock(&counter->lock);
-	return ret;
-}
 static int __rdma_counter_unbind_qp(struct ib_qp *qp)
 {
 	struct rdma_counter *counter = qp->counter;
 	return counter;
 }
-static void rdma_counter_res_add(struct rdma_counter *counter,
-				 struct ib_qp *qp)
-{
-	rdma_restrack_parent_name(&counter->res, &qp->res);
-	rdma_restrack_add(&counter->res);
-}
 static void counter_release(struct kref *kref)
 {
 	struct rdma_counter *counter;
 	struct rdma_counter *counter;
 	int ret;
-	if (!qp->res.valid || rdma_is_kernel_res(&qp->res))
+	if (!rdma_restrack_is_tracked(&qp->res) || rdma_is_kernel_res(&qp->res))
 		return 0;
 	if (!rdma_is_port_valid(dev, port))
 			return ret;
 		}
 	} else {
-		counter = rdma_counter_alloc(dev, port, RDMA_COUNTER_MODE_AUTO);
+		counter = alloc_and_bind(dev, port, qp, RDMA_COUNTER_MODE_AUTO);
 		if (!counter)
 			return -ENOMEM;
-		auto_mode_init_counter(counter, qp, port_counter->mode.mask);
-		ret = __rdma_counter_bind_qp(counter, qp);
-		if (ret) {
-			rdma_counter_free(counter);
-			return ret;
-		}
-		rdma_counter_res_add(counter, qp);
 	}
 	return 0;
 	return NULL;
 }
-static int rdma_counter_bind_qp_manual(struct rdma_counter *counter,
-				       struct ib_qp *qp)
-{
-	if ((counter->device != qp->device) || (counter->port != qp->port))
-		return -EINVAL;
-	return __rdma_counter_bind_qp(counter, qp);
-}
 static struct rdma_counter *rdma_get_counter_by_id(struct ib_device *dev,
 						   u32 counter_id)
 {
 		goto err_task;
 	}
-	ret = rdma_counter_bind_qp_manual(counter, qp);
+	if ((counter->device != qp->device) || (counter->port != qp->port)) {
+		ret = -EINVAL;
+		goto err_task;
+	}
+	ret = __rdma_counter_bind_qp(counter, qp);
 	if (ret)
 		goto err_task;
 		goto err;
 	}
-	counter = rdma_counter_alloc(dev, port, RDMA_COUNTER_MODE_MANUAL);
+	counter = alloc_and_bind(dev, port, qp, RDMA_COUNTER_MODE_MANUAL);
 	if (!counter) {
 		ret = -ENOMEM;
 		goto err;
 	}
-	ret = rdma_counter_bind_qp_manual(counter, qp);
-	if (ret)
-		goto err_bind;
 	if (counter_id)
 		*counter_id = counter->id;
-	rdma_counter_res_add(counter, qp);
 	rdma_restrack_put(&qp->res);
-	return ret;
+	return 0;
-err_bind:
-	rdma_counter_free(counter);
 err:
 	rdma_restrack_put(&qp->res);
 	return ret;

drivers/infiniband/core/cq.c+4−12

 }
 /**
- * ib_process_direct_cq - process a CQ in caller context
+ * ib_process_cq_direct - process a CQ in caller context
  * @cq:		CQ to process
  * @budget:	number of CQEs to poll for
  *
 }
 /**
- * __ib_alloc_cq        allocate a completion queue
+ * __ib_alloc_cq - allocate a completion queue
  * @dev:		device to allocate the CQ for
  * @private:		driver private data, accessible from cq->cq_context
  * @nr_cqe:		number of CQEs to allocate
 }
 EXPORT_SYMBOL(ib_free_cq);
-void ib_cq_pool_init(struct ib_device *dev)
+void ib_cq_pool_cleanup(struct ib_device *dev)
-{
-	unsigned int i;
-	spin_lock_init(&dev->cq_pools_lock);
-	for (i = 0; i < ARRAY_SIZE(dev->cq_pools); i++)
-		INIT_LIST_HEAD(&dev->cq_pools[i]);
-}
-void ib_cq_pool_destroy(struct ib_device *dev)
 {
 	struct ib_cq *cq, *n;
 	unsigned int i;
 		list_for_each_entry_safe(cq, n, &dev->cq_pools[i],
 					 pool_entry) {
 			WARN_ON(cq->cqe_used);
+			list_del(&cq->pool_entry);
 			cq->shared = false;
 			ib_free_cq(cq);
 		}

drivers/infiniband/core/device.c+66−26

 		IB_MANDATORY_FUNC(poll_cq),
 		IB_MANDATORY_FUNC(req_notify_cq),
 		IB_MANDATORY_FUNC(get_dma_mr),
+		IB_MANDATORY_FUNC(reg_user_mr),
 		IB_MANDATORY_FUNC(dereg_mr),
 		IB_MANDATORY_FUNC(get_port_immutable)
 	};
 struct ib_device *_ib_alloc_device(size_t size)
 {
 	struct ib_device *device;
+	unsigned int i;
 	if (WARN_ON(size < sizeof(struct ib_device)))
 		return NULL;
 	init_completion(&device->unreg_completion);
 	INIT_WORK(&device->unregistration_work, ib_unregister_work);
+	spin_lock_init(&device->cq_pools_lock);
+	for (i = 0; i < ARRAY_SIZE(device->cq_pools); i++)
+		INIT_LIST_HEAD(&device->cq_pools[i]);
+	device->uverbs_cmd_mask =
+		BIT_ULL(IB_USER_VERBS_CMD_ALLOC_MW) |
+		BIT_ULL(IB_USER_VERBS_CMD_ALLOC_PD) |
+		BIT_ULL(IB_USER_VERBS_CMD_ATTACH_MCAST) |
+		BIT_ULL(IB_USER_VERBS_CMD_CLOSE_XRCD) |
+		BIT_ULL(IB_USER_VERBS_CMD_CREATE_AH) |
+		BIT_ULL(IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
+		BIT_ULL(IB_USER_VERBS_CMD_CREATE_CQ) |
+		BIT_ULL(IB_USER_VERBS_CMD_CREATE_QP) |
+		BIT_ULL(IB_USER_VERBS_CMD_CREATE_SRQ) |
+		BIT_ULL(IB_USER_VERBS_CMD_CREATE_XSRQ) |
+		BIT_ULL(IB_USER_VERBS_CMD_DEALLOC_MW) |
+		BIT_ULL(IB_USER_VERBS_CMD_DEALLOC_PD) |
+		BIT_ULL(IB_USER_VERBS_CMD_DEREG_MR) |
+		BIT_ULL(IB_USER_VERBS_CMD_DESTROY_AH) |
+		BIT_ULL(IB_USER_VERBS_CMD_DESTROY_CQ) |
+		BIT_ULL(IB_USER_VERBS_CMD_DESTROY_QP) |
+		BIT_ULL(IB_USER_VERBS_CMD_DESTROY_SRQ) |
+		BIT_ULL(IB_USER_VERBS_CMD_DETACH_MCAST) |
+		BIT_ULL(IB_USER_VERBS_CMD_GET_CONTEXT) |
+		BIT_ULL(IB_USER_VERBS_CMD_MODIFY_QP) |
+		BIT_ULL(IB_USER_VERBS_CMD_MODIFY_SRQ) |
+		BIT_ULL(IB_USER_VERBS_CMD_OPEN_QP) |
+		BIT_ULL(IB_USER_VERBS_CMD_OPEN_XRCD) |
+		BIT_ULL(IB_USER_VERBS_CMD_QUERY_DEVICE) |
+		BIT_ULL(IB_USER_VERBS_CMD_QUERY_PORT) |
+		BIT_ULL(IB_USER_VERBS_CMD_QUERY_QP) |
+		BIT_ULL(IB_USER_VERBS_CMD_QUERY_SRQ) |
+		BIT_ULL(IB_USER_VERBS_CMD_REG_MR) |
+		BIT_ULL(IB_USER_VERBS_CMD_REREG_MR) |
+		BIT_ULL(IB_USER_VERBS_CMD_RESIZE_CQ);
 	return device;
 }
 EXPORT_SYMBOL(_ib_alloc_device);
 	return ret;
 }
-static void setup_dma_device(struct ib_device *device,
-			     struct device *dma_device)
-{
-	/*
-	 * If the caller does not provide a DMA capable device then the IB
-	 * device will be used. In this case the caller should fully setup the
-	 * ibdev for DMA. This usually means using dma_virt_ops.
-	 */
-#ifdef CONFIG_DMA_VIRT_OPS
-	if (!dma_device) {
-		device->dev.dma_ops = &dma_virt_ops;
-		dma_device = &device->dev;
-	}
-#endif
-	WARN_ON(!dma_device);
-	device->dma_device = dma_device;
-	WARN_ON(!device->dma_device->dma_parms);
-}
 /*
  * setup_device() allocates memory and sets up data that requires calling the
  * device ops, this is the only reason these actions are not done during
 		remove_client_context(device, cid);
 	}
-	ib_cq_pool_destroy(device);
+	ib_cq_pool_cleanup(device);
 	/* Pairs with refcount_set in enable_device */
 	ib_device_put(device);
 			goto out;
 	}
-	ib_cq_pool_init(device);
 	down_read(&clients_rwsem);
 	xa_for_each_marked (&clients, index, client, CLIENT_REGISTERED) {
 		ret = add_client_context(device, client);
 	if (ret)
 		return ret;
-	setup_dma_device(device, dma_device);
+	/*
+	 * If the caller does not provide a DMA capable device then the IB core
+	 * will set up ib_sge and scatterlist structures that stash the kernel
+	 * virtual address into the address field.
+	 */
+	WARN_ON(dma_device && !dma_device->dma_parms);
+	device->dma_device = dma_device;
 	ret = setup_device(device);
 	if (ret)
 		return ret;
 	}
 	ret = enable_device_and_get(device);
-	dev_set_uevent_suppress(&device->dev, false);
-	/* Mark for userspace that device is ready */
-	kobject_uevent(&device->dev.kobj, KOBJ_ADD);
 	if (ret) {
 		void (*dealloc_fn)(struct ib_device *);
 		ib_device_put(device);
 		__ib_unregister_device(device);
 		device->ops.dealloc_driver = dealloc_fn;
+		dev_set_uevent_suppress(&device->dev, false);
 		return ret;
 	}
+	dev_set_uevent_suppress(&device->dev, false);
+	/* Mark for userspace that device is ready */
+	kobject_uevent(&device->dev.kobj, KOBJ_ADD);
 	ib_device_put(device);
 	return 0;
 	SET_DEVICE_OP(dev_ops, create_qp);
 	SET_DEVICE_OP(dev_ops, create_rwq_ind_table);
 	SET_DEVICE_OP(dev_ops, create_srq);
+	SET_DEVICE_OP(dev_ops, create_user_ah);
 	SET_DEVICE_OP(dev_ops, create_wq);
 	SET_DEVICE_OP(dev_ops, dealloc_dm);
 	SET_DEVICE_OP(dev_ops, dealloc_driver);
 }
 EXPORT_SYMBOL(ib_set_device_ops);
+#ifdef CONFIG_INFINIBAND_VIRT_DMA
+int ib_dma_virt_map_sg(struct ib_device *dev, struct scatterlist *sg, int nents)
+{
+	struct scatterlist *s;
+	int i;
+	for_each_sg(sg, s, nents, i) {
+		sg_dma_address(s) = (uintptr_t)sg_virt(s);
+		sg_dma_len(s) = s->length;
+	}
+	return nents;
+}
+EXPORT_SYMBOL(ib_dma_virt_map_sg);
+#endif /* CONFIG_INFINIBAND_VIRT_DMA */
 static const struct rdma_nl_cbs ibnl_ls_cb_table[RDMA_NL_LS_NUM_OPS] = {
 	[RDMA_NL_LS_OP_RESOLVE] = {
 		.doit = ib_nl_handle_resolve_resp,

drivers/infiniband/core/iwpm_util.h+1−1

@@ -141,7 +141,7 @@ int iwpm_wait_complete_req(struct iwpm_nlmsg_request *nlmsg_request); · 140 unmodified lines
141	int iwpm_get_nlmsg_seq(void);	141	int iwpm_get_nlmsg_seq(void);
142		142
143	/**	143	/**
144	* iwpm_add_reminfo - Add remote address info of the connecting peer	144	* iwpm_add_remote_info - Add remote address info of the connecting peer
145	* to the remote info hash table	145	* to the remote info hash table
146	* @reminfo: The remote info to be added	146	* @reminfo: The remote info to be added
147	*/	147	*/

drivers/infiniband/core/rdma_core.c+68−33

 	} else if (uobj->object) {
 		ret = uobj->uapi_object->type_class->destroy_hw(uobj, reason,
 								attrs);
-		if (ret) {
+		if (ret)
-			if (ib_is_destroy_retryable(ret, reason, uobj))
+			/* Nothing to be done, wait till ucontext will clean it */
-				return ret;
+			return ret;
-			/* Nothing to be done, dangle the memory and move on */
-			WARN(true,
-			     "ib_uverbs: failed to remove uobject id %d, driver err=%d",
-			     uobj->id, ret);
-		}
 		uobj->object = NULL;
 	}
 			     struct uverbs_obj_idr_type, type);
 	int ret = idr_type->destroy_object(uobj, why, attrs);
-	/*
+	if (ret)
-	 * We can only fail gracefully if the user requested to destroy the
-	 * object or when a retry may be called upon an error.
-	 * In the rest of the cases, just remove whatever you can.
-	 */
-	if (ib_is_destroy_retryable(ret, why, uobj))
 		return ret;
 	if (why == RDMA_REMOVE_ABORT)
 {
 	const struct uverbs_obj_fd_type *fd_type = container_of(
 		uobj->uapi_object->type_attrs, struct uverbs_obj_fd_type, type);
-	int ret = fd_type->destroy_object(uobj, why);
-	if (ib_is_destroy_retryable(ret, why, uobj))
-		return ret;
+	fd_type->destroy_object(uobj, why);
 	return 0;
 }
 	WARN_ON(old != NULL);
 }
+static void swap_idr_uobjects(struct ib_uobject *obj_old,
+			     struct ib_uobject *obj_new)
+{
+	struct ib_uverbs_file *ufile = obj_old->ufile;
+	void *old;
+	/*
+	 * New must be an object that been allocated but not yet committed, this
+	 * moves the pre-committed state to obj_old, new still must be comitted.
+	 */
+	old = xa_cmpxchg(&ufile->idr, obj_old->id, obj_old, XA_ZERO_ENTRY,
+			 GFP_KERNEL);
+	if (WARN_ON(old != obj_old))
+		return;
+	swap(obj_old->id, obj_new->id);
+	old = xa_cmpxchg(&ufile->idr, obj_old->id, NULL, obj_old, GFP_KERNEL);
+	WARN_ON(old != NULL);
+}
 static void alloc_commit_fd_uobject(struct ib_uobject *uobj)
 {
 	int fd = uobj->id;
 	up_read(&ufile->hw_destroy_rwsem);
 }
+/*
+ * new_uobj will be assigned to the handle currently used by to_uobj, and
+ * to_uobj will be destroyed.
+ *
+ * Upon return the caller must do:
+ *    rdma_alloc_commit_uobject(new_uobj)
+ *    uobj_put_destroy(to_uobj)
+ *
+ * to_uobj must have a write get but the put mode switches to destroy once
+ * this is called.
+ */
+void rdma_assign_uobject(struct ib_uobject *to_uobj, struct ib_uobject *new_uobj,
+			struct uverbs_attr_bundle *attrs)
+{
+	assert_uverbs_usecnt(new_uobj, UVERBS_LOOKUP_WRITE);
+	if (WARN_ON(to_uobj->uapi_object != new_uobj->uapi_object ||
+		    !to_uobj->uapi_object->type_class->swap_uobjects))
+		return;
+	to_uobj->uapi_object->type_class->swap_uobjects(to_uobj, new_uobj);
+	/*
+	 * If this fails then the uobject is still completely valid (though with
+	 * a new ID) and we leak it until context close.
+	 */
+	uverbs_destroy_uobject(to_uobj, RDMA_REMOVE_DESTROY, attrs);
+}
 /*
  * This consumes the kref for uobj. It is up to the caller to unwind the HW
  * object and anything else connected to uobj before calling this.
 	.lookup_put = lookup_put_idr_uobject,
 	.destroy_hw = destroy_hw_idr_uobject,
 	.remove_handle = remove_handle_idr_uobject,
+	.swap_uobjects = swap_idr_uobjects,
 };
 EXPORT_SYMBOL(uverbs_idr_class);
 		 * racing with a lookup_get.
 		 */
 		WARN_ON(uverbs_try_lock_object(obj, UVERBS_LOOKUP_WRITE));
+		if (reason == RDMA_REMOVE_DRIVER_FAILURE)
+			obj->object = NULL;
 		if (!uverbs_destroy_uobject(obj, reason, &attrs))
 			ret = 0;
 		else
 			atomic_set(&obj->usecnt, 0);
 	}
+	if (reason == RDMA_REMOVE_DRIVER_FAILURE) {
+		WARN_ON(!list_empty(&ufile->uobjects));
+		return 0;
+	}
 	return ret;
 }
 	if (!ufile->ucontext)
 		goto done;
-	ufile->ucontext->cleanup_retryable = true;
+	while (!list_empty(&ufile->uobjects) &&
-	while (!list_empty(&ufile->uobjects))
+	       !__uverbs_cleanup_ufile(ufile, reason)) {
-		if (__uverbs_cleanup_ufile(ufile, reason)) {
+	}
-			/*
-			 * No entry was cleaned-up successfully during this
-			 * iteration. It is a driver bug to fail destruction.
-			 */
-			WARN_ON(!list_empty(&ufile->uobjects));
-			break;
-		}
-	ufile->ucontext->cleanup_retryable = false;
-	if (!list_empty(&ufile->uobjects))
-		__uverbs_cleanup_ufile(ufile, reason);
+	if (WARN_ON(!list_empty(&ufile->uobjects)))
+		__uverbs_cleanup_ufile(ufile, RDMA_REMOVE_DRIVER_FAILURE);
 	ufile_destroy_ucontext(ufile, reason);
 done:

drivers/infiniband/core/restrack.c+19−4

 {
 	struct ib_device *dev = res_to_dev(res);
 	struct rdma_restrack_root *rt;
-	int ret;
+	int ret = 0;
 	if (!dev)
 		return;
+	if (res->no_track)
+		goto out;
 	rt = &dev->res[res->type];
 	if (res->type == RDMA_RESTRACK_QP) {
 		/* Special case to ensure that LQPN points to right QP */
 		struct ib_qp *qp = container_of(res, struct ib_qp, res);
-		ret = xa_insert(&rt->xa, qp->qp_num, res, GFP_KERNEL);
+		WARN_ONCE(qp->qp_num >> 24 || qp->port >> 8,
-		res->id = ret ? 0 : qp->qp_num;
+			  "QP number 0x%0X and port 0x%0X", qp->qp_num,
+			  qp->port);
+		res->id = qp->qp_num;
+		if (qp->qp_type == IB_QPT_SMI || qp->qp_type == IB_QPT_GSI)
+			res->id |= qp->port << 24;
+		ret = xa_insert(&rt->xa, res->id, res, GFP_KERNEL);
+		if (ret)
+			res->id = 0;
 	} else if (res->type == RDMA_RESTRACK_COUNTER) {
 		/* Special case to ensure that cntn points to right counter */
 		struct rdma_counter *counter;
 				      &rt->next_id, GFP_KERNEL);
 	}
+out:
 	if (!ret)
 		res->valid = true;
 }
 		return;
 	}
+	if (res->no_track)
+		goto out;
 	dev = res_to_dev(res);
 	if (WARN_ON(!dev))
 		return;
 	if (res->type == RDMA_RESTRACK_MR || res->type == RDMA_RESTRACK_QP)
 		return;
 	WARN_ON(old != res);
-	res->valid = false;
+out:
+	res->valid = false;
 	rdma_restrack_put(res);
 	wait_for_completion(&res->comp);
 }

drivers/infiniband/core/rw.c+4−1

 static int rdma_rw_map_sg(struct ib_device *dev, struct scatterlist *sg,
 			  u32 sg_cnt, enum dma_data_direction dir)
 {
-	if (is_pci_p2pdma_page(sg_page(sg)))
+	if (is_pci_p2pdma_page(sg_page(sg))) {
+		if (WARN_ON_ONCE(ib_uses_virt_dma(dev)))
+			return 0;
 		return pci_p2pdma_map_sg(dev->dma_device, sg, sg_cnt, dir);
+	}
 	return ib_dma_map_sg(dev, sg, sg_cnt, dir);
 }

drivers/infiniband/core/sa_query.c+2−1

@@ -1435,7 +1435,8 @@ enum opa_pr_supported { · 1434 unmodified lines
1435	};	1435	};
1436		1436
1437	/**	1437	/**
1438	* Check if current PR query can be an OPA query.	1438	* opa_pr_query_possible - Check if current PR query can be an OPA query.
		1439	*
1439	* Retuns PR_NOT_SUPPORTED if a path record query is not	1440	* Retuns PR_NOT_SUPPORTED if a path record query is not
1440	* possible, PR_OPA_SUPPORTED if an OPA path record query	1441	* possible, PR_OPA_SUPPORTED if an OPA path record query
1441	* is possible and PR_IB_SUPPORTED if an IB path record	1442	* is possible and PR_IB_SUPPORTED if an IB path record

drivers/infiniband/core/sysfs.c+97−69

 	if (ret)
 		return ret;
-	return sprintf(buf, "%d: %s\n", attr.state,
+	return sysfs_emit(buf, "%d: %s\n", attr.state,
-		       attr.state >= 0 && attr.state < ARRAY_SIZE(state_name) ?
+			  attr.state >= 0 &&
-		       state_name[attr.state] : "UNKNOWN");
+					  attr.state < ARRAY_SIZE(state_name) ?
+				  state_name[attr.state] :
+				  "UNKNOWN");
 }
 static ssize_t lid_show(struct ib_port *p, struct port_attribute *unused,
 	if (ret)
 		return ret;
-	return sprintf(buf, "0x%x\n", attr.lid);
+	return sysfs_emit(buf, "0x%x\n", attr.lid);
 }
 static ssize_t lid_mask_count_show(struct ib_port *p,
 	if (ret)
 		return ret;
-	return sprintf(buf, "%d\n", attr.lmc);
+	return sysfs_emit(buf, "%d\n", attr.lmc);
 }
 static ssize_t sm_lid_show(struct ib_port *p, struct port_attribute *unused,
 	if (ret)
 		return ret;
-	return sprintf(buf, "0x%x\n", attr.sm_lid);
+	return sysfs_emit(buf, "0x%x\n", attr.sm_lid);
 }
 static ssize_t sm_sl_show(struct ib_port *p, struct port_attribute *unused,
 	if (ret)
 		return ret;
-	return sprintf(buf, "%d\n", attr.sm_sl);
+	return sysfs_emit(buf, "%d\n", attr.sm_sl);
 }
 static ssize_t cap_mask_show(struct ib_port *p, struct port_attribute *unused,
 	if (ret)
 		return ret;
-	return sprintf(buf, "0x%08x\n", attr.port_cap_flags);
+	return sysfs_emit(buf, "0x%08x\n", attr.port_cap_flags);
 }
 static ssize_t rate_show(struct ib_port *p, struct port_attribute *unused,
 		speed = " HDR";
 		rate = 500;
 		break;
+	case IB_SPEED_NDR:
+		speed = " NDR";
+		rate = 1000;
+		break;
 	case IB_SPEED_SDR:
 	default:		/* default to SDR for invalid rates */
 		speed = " SDR";
 	if (rate < 0)
 		return -EINVAL;
-	return sprintf(buf, "%d%s Gb/sec (%dX%s)\n",
+	return sysfs_emit(buf, "%d%s Gb/sec (%dX%s)\n", rate / 10,
-		       rate / 10, rate % 10 ? ".5" : "",
+			  rate % 10 ? ".5" : "",
-		       ib_width_enum_to_int(attr.active_width), speed);
+			  ib_width_enum_to_int(attr.active_width), speed);
 }
 static const char *phys_state_to_str(enum ib_port_phys_state phys_state)
 	if (ret)
 		return ret;
-	return sprintf(buf, "%d: %s\n", attr.phys_state,
+	return sysfs_emit(buf, "%d: %s\n", attr.phys_state,
-		       phys_state_to_str(attr.phys_state));
+			  phys_state_to_str(attr.phys_state));
 }
 static ssize_t link_layer_show(struct ib_port *p, struct port_attribute *unused,
 			       char *buf)
 {
+	const char *output;
 	switch (rdma_port_get_link_layer(p->ibdev, p->port_num)) {
 	case IB_LINK_LAYER_INFINIBAND:
-		return sprintf(buf, "%s\n", "InfiniBand");
+		output = "InfiniBand";
+		break;
 	case IB_LINK_LAYER_ETHERNET:
-		return sprintf(buf, "%s\n", "Ethernet");
+		output = "Ethernet";
+		break;
 	default:
-		return sprintf(buf, "%s\n", "Unknown");
+		output = "Unknown";
+		break;
 	}
+	return sysfs_emit(buf, "%s\n", output);
 }
 static PORT_ATTR_RO(state);
 	NULL
 };
-static size_t print_ndev(const struct ib_gid_attr *gid_attr, char *buf)
+static ssize_t print_ndev(const struct ib_gid_attr *gid_attr, char *buf)
 {
 	struct net_device *ndev;
-	size_t ret = -EINVAL;
+	int ret = -EINVAL;
 	rcu_read_lock();
 	ndev = rcu_dereference(gid_attr->ndev);
 	if (ndev)
-		ret = sprintf(buf, "%s\n", ndev->name);
+		ret = sysfs_emit(buf, "%s\n", ndev->name);
 	rcu_read_unlock();
 	return ret;
 }
-static size_t print_gid_type(const struct ib_gid_attr *gid_attr, char *buf)
+static ssize_t print_gid_type(const struct ib_gid_attr *gid_attr, char *buf)
 {
-	return sprintf(buf, "%s\n", ib_cache_gid_type_str(gid_attr->gid_type));
+	return sysfs_emit(buf, "%s\n",
+			  ib_cache_gid_type_str(gid_attr->gid_type));
 }
 static ssize_t _show_port_gid_attr(
 	struct ib_port *p, struct port_attribute *attr, char *buf,
-	size_t (*print)(const struct ib_gid_attr *gid_attr, char *buf))
+	ssize_t (*print)(const struct ib_gid_attr *gid_attr, char *buf))
 {
 	struct port_table_attribute *tab_attr =
 		container_of(attr, struct port_table_attribute, attr);
 	struct port_table_attribute *tab_attr =
 		container_of(attr, struct port_table_attribute, attr);
 	const struct ib_gid_attr *gid_attr;
-	ssize_t ret;
+	int len;
 	gid_attr = rdma_get_gid_attr(p->ibdev, p->port_num, tab_attr->index);
 	if (IS_ERR(gid_attr)) {
 		 * space throwing such error on fail to read gid, return zero
 		 * GID as before. This maintains backward compatibility.
 		 */
-		return sprintf(buf, "%pI6\n", zgid.raw);
+		return sysfs_emit(buf, "%pI6\n", zgid.raw);
 	}
-	ret = sprintf(buf, "%pI6\n", gid_attr->gid.raw);
+	len = sysfs_emit(buf, "%pI6\n", gid_attr->gid.raw);
 	rdma_put_gid_attr(gid_attr);
-	return ret;
+	return len;
 }
 static ssize_t show_port_gid_attr_ndev(struct ib_port *p,
 	struct port_table_attribute *tab_attr =
 		container_of(attr, struct port_table_attribute, attr);
 	u16 pkey;
-	ssize_t ret;
+	int ret;
 	ret = ib_query_pkey(p->ibdev, p->port_num, tab_attr->index, &pkey);
 	if (ret)
 		return ret;
-	return sprintf(buf, "0x%04x\n", pkey);
+	return sysfs_emit(buf, "0x%04x\n", pkey);
 }
 #define PORT_PMA_ATTR(_name, _counter, _width, _offset)			\
 		container_of(attr, struct port_table_attribute, attr);
 	int offset = tab_attr->index & 0xffff;
 	int width  = (tab_attr->index >> 16) & 0xff;
-	ssize_t ret;
+	int ret;
 	u8 data[8];
+	int len;
 	ret = get_perf_mad(p->ibdev, p->port_num, tab_attr->attr_id, &data,
 			40 + offset / 8, sizeof(data));
 	switch (width) {
 	case 4:
-		ret = sprintf(buf, "%u\n", (*data >>
+		len = sysfs_emit(buf, "%u\n",
-					    (4 - (offset % 8))) & 0xf);
+				 (*data >> (4 - (offset % 8))) & 0xf);
 		break;
 	case 8:
-		ret = sprintf(buf, "%u\n", *data);
+		len = sysfs_emit(buf, "%u\n", *data);
 		break;
 	case 16:
-		ret = sprintf(buf, "%u\n",
+		len = sysfs_emit(buf, "%u\n", be16_to_cpup((__be16 *)data));
-			      be16_to_cpup((__be16 *)data));
 		break;
 	case 32:
-		ret = sprintf(buf, "%u\n",
+		len = sysfs_emit(buf, "%u\n", be32_to_cpup((__be32 *)data));
-			      be32_to_cpup((__be32 *)data));
 		break;
 	case 64:
-		ret = sprintf(buf, "%llu\n",
+		len = sysfs_emit(buf, "%llu\n", be64_to_cpup((__be64 *)data));
-				be64_to_cpup((__be64 *)data));
 		break;
 	default:
-		ret = 0;
+		len = 0;
+		break;
 	}
-	return ret;
+	return len;
 }
 static PORT_PMA_ATTR(symbol_error		    ,  0, 16,  32);
 	return 0;
 }
-static ssize_t print_hw_stat(struct ib_device *dev, int port_num,
+static int print_hw_stat(struct ib_device *dev, int port_num,
-			     struct rdma_hw_stats *stats, int index, char *buf)
+			 struct rdma_hw_stats *stats, int index, char *buf)
 {
 	u64 v = rdma_counter_get_hwstat_value(dev, port_num, index);
-	return sprintf(buf, "%llu\n", stats->value[index] + v);
+	return sysfs_emit(buf, "%llu\n", stats->value[index] + v);
 }
 static ssize_t show_hw_stats(struct kobject *kobj, struct attribute *attr,
 	msecs = jiffies_to_msecs(stats->lifespan);
 	mutex_unlock(&stats->lock);
-	return sprintf(buf, "%d\n", msecs);
+	return sysfs_emit(buf, "%d\n", msecs);
 }
 static ssize_t set_stats_lifespan(struct kobject *kobj,
 	return ret;
 }
+static const char *node_type_string(int node_type)
+{
+	switch (node_type) {
+	case RDMA_NODE_IB_CA:
+		return "CA";
+	case RDMA_NODE_IB_SWITCH:
+		return "switch";
+	case RDMA_NODE_IB_ROUTER:
+		return "router";
+	case RDMA_NODE_RNIC:
+		return "RNIC";
+	case RDMA_NODE_USNIC:
+		return "usNIC";
+	case RDMA_NODE_USNIC_UDP:
+		return "usNIC UDP";
+	case RDMA_NODE_UNSPECIFIED:
+		return "unspecified";
+	}
+	return "<unknown>";
+}
 static ssize_t node_type_show(struct device *device,
 			      struct device_attribute *attr, char *buf)
 {
 	struct ib_device *dev = rdma_device_to_ibdev(device);
-	switch (dev->node_type) {
+	return sysfs_emit(buf, "%d: %s\n", dev->node_type,
-	case RDMA_NODE_IB_CA:	  return sprintf(buf, "%d: CA\n", dev->node_type);
+			  node_type_string(dev->node_type));
-	case RDMA_NODE_RNIC:	  return sprintf(buf, "%d: RNIC\n", dev->node_type);
-	case RDMA_NODE_USNIC:	  return sprintf(buf, "%d: usNIC\n", dev->node_type);
-	case RDMA_NODE_USNIC_UDP: return sprintf(buf, "%d: usNIC UDP\n", dev->node_type);
-	case RDMA_NODE_UNSPECIFIED: return sprintf(buf, "%d: unspecified\n", dev->node_type);
-	case RDMA_NODE_IB_SWITCH: return sprintf(buf, "%d: switch\n", dev->node_type);
-	case RDMA_NODE_IB_ROUTER: return sprintf(buf, "%d: router\n", dev->node_type);
-	default:		  return sprintf(buf, "%d: <unknown>\n", dev->node_type);
-	}
 }
 static DEVICE_ATTR_RO(node_type);
 				   struct device_attribute *dev_attr, char *buf)
 {
 	struct ib_device *dev = rdma_device_to_ibdev(device);
+	__be16 *guid = (__be16 *)&dev->attrs.sys_image_guid;
-	return sprintf(buf, "%04x:%04x:%04x:%04x\n",
+	return sysfs_emit(buf, "%04x:%04x:%04x:%04x\n",
-		       be16_to_cpu(((__be16 *) &dev->attrs.sys_image_guid)[0]),
+			  be16_to_cpu(guid[0]),
-		       be16_to_cpu(((__be16 *) &dev->attrs.sys_image_guid)[1]),
+			  be16_to_cpu(guid[1]),
-		       be16_to_cpu(((__be16 *) &dev->attrs.sys_image_guid)[2]),
+			  be16_to_cpu(guid[2]),
-		       be16_to_cpu(((__be16 *) &dev->attrs.sys_image_guid)[3]));
+			  be16_to_cpu(guid[3]));
 }
 static DEVICE_ATTR_RO(sys_image_guid);
 			      struct device_attribute *attr, char *buf)
 {
 	struct ib_device *dev = rdma_device_to_ibdev(device);
+	__be16 *node_guid = (__be16 *)&dev->node_guid;
-	return sprintf(buf, "%04x:%04x:%04x:%04x\n",
+	return sysfs_emit(buf, "%04x:%04x:%04x:%04x\n",
-		       be16_to_cpu(((__be16 *) &dev->node_guid)[0]),
+			  be16_to_cpu(node_guid[0]),
-		       be16_to_cpu(((__be16 *) &dev->node_guid)[1]),
+			  be16_to_cpu(node_guid[1]),
-		       be16_to_cpu(((__be16 *) &dev->node_guid)[2]),
+			  be16_to_cpu(node_guid[2]),
-		       be16_to_cpu(((__be16 *) &dev->node_guid)[3]));
+			  be16_to_cpu(node_guid[3]));
 }
 static DEVICE_ATTR_RO(node_guid);
 {
 	struct ib_device *dev = rdma_device_to_ibdev(device);
-	return sprintf(buf, "%.64s\n", dev->node_desc);
+	return sysfs_emit(buf, "%.64s\n", dev->node_desc);
 }
 static ssize_t node_desc_store(struct device *device,
 			   char *buf)
 {
 	struct ib_device *dev = rdma_device_to_ibdev(device);
+	char version[IB_FW_VERSION_NAME_MAX] = {};
+	ib_get_device_fw_str(dev, version);
-	ib_get_device_fw_str(dev, buf);
+	return sysfs_emit(buf, "%s\n", version);
-	strlcat(buf, "\n", IB_FW_VERSION_NAME_MAX);
-	return strlen(buf);
 }
 static DEVICE_ATTR_RO(fw_ver);

drivers/infiniband/core/ucma.c+1−1

@@ -1825,7 +1825,7 @@ static ssize_t show_abi_version(struct device *dev, · 1824 unmodified lines
1825	struct device_attribute *attr,	1825	struct device_attribute *attr,
1826	char *buf)	1826	char *buf)
1827	{	1827	{
1828	return sprintf(buf, "%d\n", RDMA_USER_CM_ABI_VERSION);	1828	return sysfs_emit(buf, "%d\n", RDMA_USER_CM_ABI_VERSION);
1829	}	1829	}
1830	static DEVICE_ATTR(abi_version, S_IRUGO, show_abi_version, NULL);	1830	static DEVICE_ATTR(abi_version, S_IRUGO, show_abi_version, NULL);
1831		1831

drivers/infiniband/core/umem.c+13−4

 	dma_addr_t mask;
 	int i;
+	if (umem->is_odp) {
+		unsigned int page_size = BIT(to_ib_umem_odp(umem)->page_shift);
+		/* ODP must always be self consistent. */
+		if (!(pgsz_bitmap & page_size))
+			return 0;
+		return page_size;
+	}
 	/* rdma_for_each_block() has a bug if the page size is smaller than the
 	 * page size used to build the umem. For now prevent smaller page sizes
 	 * from being returned.
 		cur_base += ret * PAGE_SIZE;
 		npages -= ret;
-		sg = __sg_alloc_table_from_pages(
+		sg = __sg_alloc_table_from_pages(&umem->sg_head, page_list, ret,
-			&umem->sg_head, page_list, ret, 0, ret << PAGE_SHIFT,
+				0, ret << PAGE_SHIFT,
-			dma_get_max_seg_size(device->dma_device), sg, npages,
+				ib_dma_max_seg_size(device), sg, npages,
-			GFP_KERNEL);
+				GFP_KERNEL);
 		umem->sg_nents = umem->sg_head.nents;
 		if (IS_ERR(sg)) {
 			unpin_user_pages_dirty_lock(page_list, ret, 0);

drivers/infiniband/core/user_mad.c+3−3

@@ -1191,7 +1191,7 @@ static ssize_t ibdev_show(struct device dev, struct device_attribute attr, · 1190 unmodified lines
1191	if (!port)	1191	if (!port)
1192	return -ENODEV;	1192	return -ENODEV;
1193		1193
1194	return sprintf(buf, "%s\n", dev_name(&port->ib_dev->dev));	1194	return sysfs_emit(buf, "%s\n", dev_name(&port->ib_dev->dev));
1195	}	1195	}
1196	static DEVICE_ATTR_RO(ibdev);	1196	static DEVICE_ATTR_RO(ibdev);
1197		1197
@@ -1203,7 +1203,7 @@ static ssize_t port_show(struct device dev, struct device_attribute attr, · 5 unmodified lines
1203	if (!port)	1203	if (!port)
1204	return -ENODEV;	1204	return -ENODEV;
1205		1205
1206	return sprintf(buf, "%d\n", port->port_num);	1206	return sysfs_emit(buf, "%d\n", port->port_num);
1207	}	1207	}
1208	static DEVICE_ATTR_RO(port);	1208	static DEVICE_ATTR_RO(port);
1209		1209
@@ -1222,7 +1222,7 @@ static char umad_devnode(struct device dev, umode_t *mode) · 12 unmodified lines
1222	static ssize_t abi_version_show(struct class *class,	1222	static ssize_t abi_version_show(struct class *class,
1223	struct class_attribute attr, char buf)	1223	struct class_attribute attr, char buf)
1224	{	1224	{
1225	return sprintf(buf, "%d\n", IB_USER_MAD_ABI_VERSION);	1225	return sysfs_emit(buf, "%d\n", IB_USER_MAD_ABI_VERSION);
1226	}	1226	}
1227	static CLASS_ATTR_RO(abi_version);	1227	static CLASS_ATTR_RO(abi_version);
1228		1228

drivers/infiniband/core/uverbs_cmd.c+91−58

@@ -681,8 +681,7 @@ int ib_uverbs_dealloc_xrcd(struct ib_uobject uobject, struct ib_xrcd xrcd, · 680 unmodified lines
681	return 0;	681	return 0;
682		682
683	ret = ib_dealloc_xrcd_user(xrcd, &attrs->driver_udata);	683	ret = ib_dealloc_xrcd_user(xrcd, &attrs->driver_udata);
684		684	if (ret) {
685	if (ib_is_destroy_retryable(ret, why, uobject)) {
686	atomic_inc(&xrcd->usecnt);	685	atomic_inc(&xrcd->usecnt);
687	return ret;	686	return ret;
688	}	687	}
@@ -690,7 +689,7 @@ int ib_uverbs_dealloc_xrcd(struct ib_uobject uobject, struct ib_xrcd xrcd, · 1 unmodified line
690	if (inode)	689	if (inode)
691	xrcd_table_delete(dev, inode);	690	xrcd_table_delete(dev, inode);
692		691
693	return ret;	692	return 0;
694	}	693	}
695		694
696	static int ib_uverbs_reg_mr(struct uverbs_attr_bundle *attrs)	695	static int ib_uverbs_reg_mr(struct uverbs_attr_bundle *attrs)
@@ -710,29 +709,20 @@ static int ib_uverbs_reg_mr(struct uverbs_attr_bundle *attrs) · 13 unmodified lines
710	if ((cmd.start & ~PAGE_MASK) != (cmd.hca_va & ~PAGE_MASK))	709	if ((cmd.start & ~PAGE_MASK) != (cmd.hca_va & ~PAGE_MASK))
711	return -EINVAL;	710	return -EINVAL;
712		711
713	ret = ib_check_mr_access(cmd.access_flags);
714	if (ret)
715	return ret;
716
717	uobj = uobj_alloc(UVERBS_OBJECT_MR, attrs, &ib_dev);	712	uobj = uobj_alloc(UVERBS_OBJECT_MR, attrs, &ib_dev);
718	if (IS_ERR(uobj))	713	if (IS_ERR(uobj))
719	return PTR_ERR(uobj);	714	return PTR_ERR(uobj);
720		715
		716	ret = ib_check_mr_access(ib_dev, cmd.access_flags);
		717	if (ret)
		718	goto err_free;
		719
721	pd = uobj_get_obj_read(pd, UVERBS_OBJECT_PD, cmd.pd_handle, attrs);	720	pd = uobj_get_obj_read(pd, UVERBS_OBJECT_PD, cmd.pd_handle, attrs);
722	if (!pd) {	721	if (!pd) {
723	ret = -EINVAL;	722	ret = -EINVAL;
724	goto err_free;	723	goto err_free;
725	}	724	}
726		725
727	if (cmd.access_flags & IB_ACCESS_ON_DEMAND) {
728	if (!(pd->device->attrs.device_cap_flags &
729	IB_DEVICE_ON_DEMAND_PAGING)) {
730	pr_debug("ODP support not available\n");
731	ret = -EINVAL;
732	goto err_put;
733	}
734	}
735
736	mr = pd->device->ops.reg_user_mr(pd, cmd.start, cmd.length, cmd.hca_va,	726	mr = pd->device->ops.reg_user_mr(pd, cmd.start, cmd.length, cmd.hca_va,
737	cmd.access_flags,	727	cmd.access_flags,
738	&attrs->driver_udata);	728	&attrs->driver_udata);
@@ -774,23 +764,28 @@ static int ib_uverbs_rereg_mr(struct uverbs_attr_bundle *attrs) · 35 unmodified lines
774	{	764	{
775	struct ib_uverbs_rereg_mr cmd;	765	struct ib_uverbs_rereg_mr cmd;
776	struct ib_uverbs_rereg_mr_resp resp;	766	struct ib_uverbs_rereg_mr_resp resp;
777	struct ib_pd *pd = NULL;
778	struct ib_mr *mr;	767	struct ib_mr *mr;
779	struct ib_pd *old_pd;
780	int ret;	768	int ret;
781	struct ib_uobject *uobj;	769	struct ib_uobject *uobj;
		770	struct ib_uobject *new_uobj;
		771	struct ib_device *ib_dev;
		772	struct ib_pd *orig_pd;
		773	struct ib_pd *new_pd;
		774	struct ib_mr *new_mr;
782		775
783	ret = uverbs_request(attrs, &cmd, sizeof(cmd));	776	ret = uverbs_request(attrs, &cmd, sizeof(cmd));
784	if (ret)	777	if (ret)
785	return ret;	778	return ret;
786		779
787	if (cmd.flags & ~IB_MR_REREG_SUPPORTED \|\| !cmd.flags)	780	if (!cmd.flags)
788	return -EINVAL;	781	return -EINVAL;
789		782
		783	if (cmd.flags & ~IB_MR_REREG_SUPPORTED)
		784	return -EOPNOTSUPP;
		785
790	if ((cmd.flags & IB_MR_REREG_TRANS) &&	786	if ((cmd.flags & IB_MR_REREG_TRANS) &&
791	(!cmd.start \|\| !cmd.hca_va \|\| 0 >= cmd.length \|\|	787	(cmd.start & ~PAGE_MASK) != (cmd.hca_va & ~PAGE_MASK))
792	(cmd.start & ~PAGE_MASK) != (cmd.hca_va & ~PAGE_MASK)))	788	return -EINVAL;
793	return -EINVAL;
794		789
795	uobj = uobj_get_write(UVERBS_OBJECT_MR, cmd.mr_handle, attrs);	790	uobj = uobj_get_write(UVERBS_OBJECT_MR, cmd.mr_handle, attrs);
796	if (IS_ERR(uobj))	791	if (IS_ERR(uobj))
@@ -804,36 +799,74 @@ static int ib_uverbs_rereg_mr(struct uverbs_attr_bundle *attrs) · 7 unmodified lines
804	}	799	}
805		800
806	if (cmd.flags & IB_MR_REREG_ACCESS) {	801	if (cmd.flags & IB_MR_REREG_ACCESS) {
807	ret = ib_check_mr_access(cmd.access_flags);	802	ret = ib_check_mr_access(mr->device, cmd.access_flags);
808	if (ret)	803	if (ret)
809	goto put_uobjs;	804	goto put_uobjs;
810	}	805	}
811		806
		807	orig_pd = mr->pd;
812	if (cmd.flags & IB_MR_REREG_PD) {	808	if (cmd.flags & IB_MR_REREG_PD) {
813	pd = uobj_get_obj_read(pd, UVERBS_OBJECT_PD, cmd.pd_handle,	809	new_pd = uobj_get_obj_read(pd, UVERBS_OBJECT_PD, cmd.pd_handle,
814	attrs);	810	attrs);
815	if (!pd) {	811	if (!new_pd) {
816	ret = -EINVAL;	812	ret = -EINVAL;
817	goto put_uobjs;	813	goto put_uobjs;
818	}	814	}
		815	} else {
		816	new_pd = mr->pd;
819	}	817	}
820		818
821	old_pd = mr->pd;	819	/*
822	ret = mr->device->ops.rereg_user_mr(mr, cmd.flags, cmd.start,	820	* The driver might create a new HW object as part of the rereg, we need
823	cmd.length, cmd.hca_va,	821	* to have a uobject ready to hold it.
824	cmd.access_flags, pd,	822	*/
825	&attrs->driver_udata);	823	new_uobj = uobj_alloc(UVERBS_OBJECT_MR, attrs, &ib_dev);
826	if (ret)	824	if (IS_ERR(new_uobj)) {
		825	ret = PTR_ERR(new_uobj);
827	goto put_uobj_pd;	826	goto put_uobj_pd;
828
829	if (cmd.flags & IB_MR_REREG_PD) {
830	atomic_inc(&pd->usecnt);
831	mr->pd = pd;
832	atomic_dec(&old_pd->usecnt);
833	}	827	}
834		828
835	if (cmd.flags & IB_MR_REREG_TRANS)	829	new_mr = ib_dev->ops.rereg_user_mr(mr, cmd.flags, cmd.start, cmd.length,
836	mr->iova = cmd.hca_va;	830	cmd.hca_va, cmd.access_flags, new_pd,
		831	&attrs->driver_udata);
		832	if (IS_ERR(new_mr)) {
		833	ret = PTR_ERR(new_mr);
		834	goto put_new_uobj;
		835	}
		836	if (new_mr) {
		837	new_mr->device = new_pd->device;
		838	new_mr->pd = new_pd;
		839	new_mr->type = IB_MR_TYPE_USER;
		840	new_mr->dm = NULL;
		841	new_mr->sig_attrs = NULL;
		842	new_mr->uobject = uobj;
		843	atomic_inc(&new_pd->usecnt);
		844	new_mr->iova = cmd.hca_va;
		845	new_uobj->object = new_mr;
		846
		847	rdma_restrack_new(&new_mr->res, RDMA_RESTRACK_MR);
		848	rdma_restrack_set_name(&new_mr->res, NULL);
		849	rdma_restrack_add(&new_mr->res);
		850
		851	/*
		852	* The new uobj for the new HW object is put into the same spot
		853	* in the IDR and the old uobj & HW object is deleted.
		854	*/
		855	rdma_assign_uobject(uobj, new_uobj, attrs);
		856	rdma_alloc_commit_uobject(new_uobj, attrs);
		857	uobj_put_destroy(uobj);
		858	new_uobj = NULL;
		859	uobj = NULL;
		860	mr = new_mr;
		861	} else {
		862	if (cmd.flags & IB_MR_REREG_PD) {
		863	atomic_dec(&orig_pd->usecnt);
		864	mr->pd = new_pd;
		865	atomic_inc(&new_pd->usecnt);
		866	}
		867	if (cmd.flags & IB_MR_REREG_TRANS)
		868	mr->iova = cmd.hca_va;
		869	}
837		870
838	memset(&resp, 0, sizeof(resp));	871	memset(&resp, 0, sizeof(resp));
839	resp.lkey = mr->lkey;	872	resp.lkey = mr->lkey;
@@ -841,12 +874,16 @@ static int ib_uverbs_rereg_mr(struct uverbs_attr_bundle *attrs) · 1 unmodified line
841		874
842	ret = uverbs_response(attrs, &resp, sizeof(resp));	875	ret = uverbs_response(attrs, &resp, sizeof(resp));
843		876
		877	put_new_uobj:
		878	if (new_uobj)
		879	uobj_alloc_abort(new_uobj, attrs);
844	put_uobj_pd:	880	put_uobj_pd:
845	if (cmd.flags & IB_MR_REREG_PD)	881	if (cmd.flags & IB_MR_REREG_PD)
846	uobj_put_obj_read(pd);	882	uobj_put_obj_read(new_pd);
847		883
848	put_uobjs:	884	put_uobjs:
849	uobj_put_write(uobj);	885	if (uobj)
		886	uobj_put_write(uobj);
850		887
851	return ret;	888	return ret;
852	}	889	}
@@ -1401,8 +1438,8 @@ static int create_qp(struct uverbs_attr_bundle *attrs, · 548 unmodified lines
1401	if (cmd->qp_type == IB_QPT_XRC_TGT)	1438	if (cmd->qp_type == IB_QPT_XRC_TGT)
1402	qp = ib_create_qp(pd, &attr);	1439	qp = ib_create_qp(pd, &attr);
1403	else	1440	else
1404	qp = _ib_create_qp(device, pd, &attr, &attrs->driver_udata,	1441	qp = _ib_create_qp(device, pd, &attr, &attrs->driver_udata, obj,
1405	obj);	1442	NULL);
1406		1443
1407	if (IS_ERR(qp)) {	1444	if (IS_ERR(qp)) {
1408	ret = PTR_ERR(qp);	1445	ret = PTR_ERR(qp);
@@ -1906,8 +1943,7 @@ static int ib_uverbs_modify_qp(struct uverbs_attr_bundle *attrs) · 497 unmodified lines
1906	if (ret)	1943	if (ret)
1907	return ret;	1944	return ret;
1908		1945
1909	if (cmd.base.attr_mask &	1946	if (cmd.base.attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1910	~((IB_USER_LEGACY_LAST_QP_ATTR_MASK << 1) - 1))
1911	return -EOPNOTSUPP;	1947	return -EOPNOTSUPP;
1912		1948
1913	return modify_qp(attrs, &cmd);	1949	return modify_qp(attrs, &cmd);
@@ -1929,10 +1965,7 @@ static int ib_uverbs_ex_modify_qp(struct uverbs_attr_bundle *attrs) · 15 unmodified lines
1929	* Last bit is reserved for extending the attr_mask by	1965	* Last bit is reserved for extending the attr_mask by
1930	* using another field.	1966	* using another field.
1931	*/	1967	*/
1932	BUILD_BUG_ON(IB_USER_LAST_QP_ATTR_MASK == (1ULL << 31));	1968	if (cmd.base.attr_mask & ~(IB_QP_ATTR_STANDARD_BITS \| IB_QP_RATE_LIMIT))
1933
1934	if (cmd.base.attr_mask &
1935	~((IB_USER_LAST_QP_ATTR_MASK << 1) - 1))
1936	return -EOPNOTSUPP;	1969	return -EOPNOTSUPP;
1937		1970
1938	ret = modify_qp(attrs, &cmd);	1971	ret = modify_qp(attrs, &cmd);
@@ -3693,13 +3726,13 @@ const struct uapi_definition uverbs_def_write_intf[] = { · 1754 unmodified lines
3693	ib_uverbs_create_ah,	3726	ib_uverbs_create_ah,
3694	UAPI_DEF_WRITE_UDATA_IO(	3727	UAPI_DEF_WRITE_UDATA_IO(
3695	struct ib_uverbs_create_ah,	3728	struct ib_uverbs_create_ah,
3696	struct ib_uverbs_create_ah_resp),	3729	struct ib_uverbs_create_ah_resp)),
3697	UAPI_DEF_METHOD_NEEDS_FN(create_ah)),
3698	DECLARE_UVERBS_WRITE(	3730	DECLARE_UVERBS_WRITE(
3699	IB_USER_VERBS_CMD_DESTROY_AH,	3731	IB_USER_VERBS_CMD_DESTROY_AH,
3700	ib_uverbs_destroy_ah,	3732	ib_uverbs_destroy_ah,
3701	UAPI_DEF_WRITE_I(struct ib_uverbs_destroy_ah),	3733	UAPI_DEF_WRITE_I(struct ib_uverbs_destroy_ah)),
3702	UAPI_DEF_METHOD_NEEDS_FN(destroy_ah))),	3734	UAPI_DEF_OBJ_NEEDS_FN(create_user_ah),
		3735	UAPI_DEF_OBJ_NEEDS_FN(destroy_ah)),
3703		3736
3704	DECLARE_UVERBS_OBJECT(	3737	DECLARE_UVERBS_OBJECT(
3705	UVERBS_OBJECT_COMP_CHANNEL,	3738	UVERBS_OBJECT_COMP_CHANNEL,
@@ -3753,7 +3786,7 @@ const struct uapi_definition uverbs_def_write_intf[] = { · 47 unmodified lines
3753	IB_USER_VERBS_EX_CMD_MODIFY_CQ,	3786	IB_USER_VERBS_EX_CMD_MODIFY_CQ,
3754	ib_uverbs_ex_modify_cq,	3787	ib_uverbs_ex_modify_cq,
3755	UAPI_DEF_WRITE_I(struct ib_uverbs_ex_modify_cq),	3788	UAPI_DEF_WRITE_I(struct ib_uverbs_ex_modify_cq),
3756	UAPI_DEF_METHOD_NEEDS_FN(create_cq))),	3789	UAPI_DEF_METHOD_NEEDS_FN(modify_cq))),
3757		3790
3758	DECLARE_UVERBS_OBJECT(	3791	DECLARE_UVERBS_OBJECT(
3759	UVERBS_OBJECT_DEVICE,	3792	UVERBS_OBJECT_DEVICE,
@@ -3999,8 +4032,7 @@ const struct uapi_definition uverbs_def_write_intf[] = { · 239 unmodified lines
3999	DECLARE_UVERBS_WRITE(	4032	DECLARE_UVERBS_WRITE(
4000	IB_USER_VERBS_CMD_CLOSE_XRCD,	4033	IB_USER_VERBS_CMD_CLOSE_XRCD,
4001	ib_uverbs_close_xrcd,	4034	ib_uverbs_close_xrcd,
4002	UAPI_DEF_WRITE_I(struct ib_uverbs_close_xrcd),	4035	UAPI_DEF_WRITE_I(struct ib_uverbs_close_xrcd)),
4003	UAPI_DEF_METHOD_NEEDS_FN(dealloc_xrcd)),
4004	DECLARE_UVERBS_WRITE(IB_USER_VERBS_CMD_OPEN_QP,	4036	DECLARE_UVERBS_WRITE(IB_USER_VERBS_CMD_OPEN_QP,
4005	ib_uverbs_open_qp,	4037	ib_uverbs_open_qp,
4006	UAPI_DEF_WRITE_UDATA_IO(	4038	UAPI_DEF_WRITE_UDATA_IO(
@@ -4010,8 +4042,9 @@ const struct uapi_definition uverbs_def_write_intf[] = { · 3 unmodified lines
4010	ib_uverbs_open_xrcd,	4042	ib_uverbs_open_xrcd,
4011	UAPI_DEF_WRITE_UDATA_IO(	4043	UAPI_DEF_WRITE_UDATA_IO(
4012	struct ib_uverbs_open_xrcd,	4044	struct ib_uverbs_open_xrcd,
4013	struct ib_uverbs_open_xrcd_resp),	4045	struct ib_uverbs_open_xrcd_resp)),
4014	UAPI_DEF_METHOD_NEEDS_FN(alloc_xrcd))),	4046	UAPI_DEF_OBJ_NEEDS_FN(alloc_xrcd),
		4047	UAPI_DEF_OBJ_NEEDS_FN(dealloc_xrcd)),
4015		4048
4016	{},	4049	{},
4017	};	4050	};

drivers/infiniband/core/uverbs_main.c+2−2

@@ -1046,7 +1046,7 @@ static ssize_t ibdev_show(struct device device, struct device_attribute attr, · 1045 unmodified lines
1046	srcu_key = srcu_read_lock(&dev->disassociate_srcu);	1046	srcu_key = srcu_read_lock(&dev->disassociate_srcu);
1047	ib_dev = srcu_dereference(dev->ib_dev, &dev->disassociate_srcu);	1047	ib_dev = srcu_dereference(dev->ib_dev, &dev->disassociate_srcu);
1048	if (ib_dev)	1048	if (ib_dev)
1049	ret = sprintf(buf, "%s\n", dev_name(&ib_dev->dev));	1049	ret = sysfs_emit(buf, "%s\n", dev_name(&ib_dev->dev));
1050	srcu_read_unlock(&dev->disassociate_srcu, srcu_key);	1050	srcu_read_unlock(&dev->disassociate_srcu, srcu_key);
1051		1051
1052	return ret;	1052	return ret;
@@ -1065,7 +1065,7 @@ static ssize_t abi_version_show(struct device *device, · 12 unmodified lines
1065	srcu_key = srcu_read_lock(&dev->disassociate_srcu);	1065	srcu_key = srcu_read_lock(&dev->disassociate_srcu);
1066	ib_dev = srcu_dereference(dev->ib_dev, &dev->disassociate_srcu);	1066	ib_dev = srcu_dereference(dev->ib_dev, &dev->disassociate_srcu);
1067	if (ib_dev)	1067	if (ib_dev)
1068	ret = sprintf(buf, "%u\n", ib_dev->ops.uverbs_abi_ver);	1068	ret = sysfs_emit(buf, "%u\n", ib_dev->ops.uverbs_abi_ver);
1069	srcu_read_unlock(&dev->disassociate_srcu, srcu_key);	1069	srcu_read_unlock(&dev->disassociate_srcu, srcu_key);
1070		1070
1071	return ret;	1071	return ret;

drivers/infiniband/core/uverbs_std_types.c+7−11

 		return -EBUSY;
 	ret = rwq_ind_tbl->device->ops.destroy_rwq_ind_table(rwq_ind_tbl);
-	if (ib_is_destroy_retryable(ret, why, uobject))
+	if (ret)
 		return ret;
 	for (i = 0; i < table_size; i++)
 	kfree(rwq_ind_tbl);
 	kfree(ind_tbl);
-	return ret;
+	return 0;
 }
 static int uverbs_free_xrcd(struct ib_uobject *uobject,
 		container_of(uobject, struct ib_uxrcd_object, uobject);
 	int ret;
-	ret = ib_destroy_usecnt(&uxrcd->refcnt, why, uobject);
+	if (atomic_read(&uxrcd->refcnt))
-	if (ret)
+		return -EBUSY;
-		return ret;
 	mutex_lock(&attrs->ufile->device->xrcd_tree_mutex);
 	ret = ib_uverbs_dealloc_xrcd(uobject, xrcd, why, attrs);
 			  struct uverbs_attr_bundle *attrs)
 {
 	struct ib_pd *pd = uobject->object;
-	int ret;
-	ret = ib_destroy_usecnt(&pd->usecnt, why, uobject);
+	if (atomic_read(&pd->usecnt))
-	if (ret)
+		return -EBUSY;
-		return ret;
 	return ib_dealloc_pd_user(pd, &attrs->driver_udata);
 }
 	spin_unlock_irq(&event_queue->lock);
 }
-static int
+static void
 uverbs_completion_event_file_destroy_uobj(struct ib_uobject *uobj,
 					  enum rdma_remove_reason why)
 {
 			     uobj);
 	ib_uverbs_free_event_queue(&file->ev_queue);
-	return 0;
 }
 int uverbs_destroy_def_handler(struct uverbs_attr_bundle *attrs)

drivers/infiniband/core/uverbs_std_types_async_fd.c+2−3

 	return 0;
 }
-static int uverbs_async_event_destroy_uobj(struct ib_uobject *uobj,
+static void uverbs_async_event_destroy_uobj(struct ib_uobject *uobj,
-					   enum rdma_remove_reason why)
+					    enum rdma_remove_reason why)
 {
 	struct ib_uverbs_async_event_file *event_file =
 		container_of(uobj, struct ib_uverbs_async_event_file, uobj);
 	if (why == RDMA_REMOVE_DRIVER_REMOVE)
 		ib_uverbs_async_handler(event_file, 0, IB_EVENT_DEVICE_FATAL,
 					NULL, NULL);
-	return 0;
 }
 int uverbs_async_event_release(struct inode *inode, struct file *filp)

drivers/infiniband/core/uverbs_std_types_counters.c+2−3

@@ -42,9 +42,8 @@ static int uverbs_free_counters(struct ib_uobject *uobject, · 41 unmodified lines
42	struct ib_counters *counters = uobject->object;	42	struct ib_counters *counters = uobject->object;
43	int ret;	43	int ret;
44		44
45	ret = ib_destroy_usecnt(&counters->usecnt, why, uobject);	45	if (atomic_read(&counters->usecnt))
46	if (ret)	46	return -EBUSY;
47	return ret;
48		47
49	ret = counters->device->ops.destroy_counters(counters);	48	ret = counters->device->ops.destroy_counters(counters);
50	if (ret)	49	if (ret)

drivers/infiniband/core/uverbs_std_types_cq.c+2−2

@@ -46,7 +46,7 @@ static int uverbs_free_cq(struct ib_uobject *uobject, · 45 unmodified lines
46	int ret;	46	int ret;
47		47
48	ret = ib_destroy_cq_user(cq, &attrs->driver_udata);	48	ret = ib_destroy_cq_user(cq, &attrs->driver_udata);
49	if (ib_is_destroy_retryable(ret, why, uobject))	49	if (ret)
50	return ret;	50	return ret;
51		51
52	ib_uverbs_release_ucq(	52	ib_uverbs_release_ucq(
@@ -55,7 +55,7 @@ static int uverbs_free_cq(struct ib_uobject *uobject, · 2 unmodified lines
55	ev_queue) :	55	ev_queue) :
56	NULL,	56	NULL,
57	ucq);	57	ucq);
58	return ret;	58	return 0;
59	}	59	}
60		60
61	static int UVERBS_HANDLER(UVERBS_METHOD_CQ_CREATE)(	61	static int UVERBS_HANDLER(UVERBS_METHOD_CQ_CREATE)(

drivers/infiniband/core/uverbs_std_types_device.c+5−9

@@ -317,8 +317,7 @@ static int UVERBS_HANDLER(UVERBS_METHOD_QUERY_GID_TABLE)( · 316 unmodified lines
317	struct ib_device *ib_dev;	317	struct ib_device *ib_dev;
318	size_t user_entry_size;	318	size_t user_entry_size;
319	ssize_t num_entries;	319	ssize_t num_entries;
320	size_t max_entries;	320	int max_entries;
321	size_t num_bytes;
322	u32 flags;	321	u32 flags;
323	int ret;	322	int ret;
324		323
@@ -336,19 +335,16 @@ static int UVERBS_HANDLER(UVERBS_METHOD_QUERY_GID_TABLE)( · 11 unmodified lines
336	attrs, UVERBS_ATTR_QUERY_GID_TABLE_RESP_ENTRIES,	335	attrs, UVERBS_ATTR_QUERY_GID_TABLE_RESP_ENTRIES,
337	user_entry_size);	336	user_entry_size);
338	if (max_entries <= 0)	337	if (max_entries <= 0)
339	return -EINVAL;	338	return max_entries ?: -EINVAL;
340		339
341	ucontext = ib_uverbs_get_ucontext(attrs);	340	ucontext = ib_uverbs_get_ucontext(attrs);
342	if (IS_ERR(ucontext))	341	if (IS_ERR(ucontext))
343	return PTR_ERR(ucontext);	342	return PTR_ERR(ucontext);
344	ib_dev = ucontext->device;	343	ib_dev = ucontext->device;
345		344
346	if (check_mul_overflow(max_entries, sizeof(*entries), &num_bytes))	345	entries = uverbs_kcalloc(attrs, max_entries, sizeof(*entries));
347	return -EINVAL;	346	if (IS_ERR(entries))
348		347	return PTR_ERR(entries);
349	entries = uverbs_zalloc(attrs, num_bytes);
350	if (!entries)
351	return -ENOMEM;
352		348
353	num_entries = rdma_query_gid_table(ib_dev, entries, max_entries);	349	num_entries = rdma_query_gid_table(ib_dev, entries, max_entries);
354	if (num_entries < 0)	350	if (num_entries < 0)

drivers/infiniband/core/uverbs_std_types_dm.c+2−4

 			  struct uverbs_attr_bundle *attrs)
 {
 	struct ib_dm *dm = uobject->object;
-	int ret;
-	ret = ib_destroy_usecnt(&dm->usecnt, why, uobject);
+	if (atomic_read(&dm->usecnt))
-	if (ret)
+		return -EBUSY;
-		return ret;
 	return dm->device->ops.dealloc_dm(dm, attrs);
 }

drivers/infiniband/core/uverbs_std_types_flow_action.c+2−4

 				   struct uverbs_attr_bundle *attrs)
 {
 	struct ib_flow_action *action = uobject->object;
-	int ret;
-	ret = ib_destroy_usecnt(&action->usecnt, why, uobject);
+	if (atomic_read(&action->usecnt))
-	if (ret)
+		return -EBUSY;
-		return ret;
 	return action->device->ops.destroy_flow_action(action);
 }

drivers/infiniband/core/uverbs_std_types_mr.c+5−1

 #include "rdma_core.h"
 #include "uverbs.h"
 #include <rdma/uverbs_std_types.h>
+#include "restrack.h"
 static int uverbs_free_mr(struct ib_uobject *uobject,
 			  enum rdma_remove_reason why,
 	if (!(attr.access_flags & IB_ZERO_BASED))
 		return -EINVAL;
-	ret = ib_check_mr_access(attr.access_flags);
+	ret = ib_check_mr_access(ib_dev, attr.access_flags);
 	if (ret)
 		return ret;
 	atomic_inc(&pd->usecnt);
 	atomic_inc(&dm->usecnt);
+	rdma_restrack_new(&mr->res, RDMA_RESTRACK_MR);
+	rdma_restrack_set_name(&mr->res, NULL);
+	rdma_restrack_add(&mr->res);
 	uobj->object = mr;
 	uverbs_finalize_uobj_create(attrs, UVERBS_ATTR_REG_DM_MR_HANDLE);

drivers/infiniband/core/uverbs_std_types_qp.c+4−4

@@ -32,14 +32,14 @@ static int uverbs_free_qp(struct ib_uobject *uobject, · 31 unmodified lines
32	}	32	}
33		33
34	ret = ib_destroy_qp_user(qp, &attrs->driver_udata);	34	ret = ib_destroy_qp_user(qp, &attrs->driver_udata);
35	if (ib_is_destroy_retryable(ret, why, uobject))	35	if (ret)
36	return ret;	36	return ret;
37		37
38	if (uqp->uxrcd)	38	if (uqp->uxrcd)
39	atomic_dec(&uqp->uxrcd->refcnt);	39	atomic_dec(&uqp->uxrcd->refcnt);
40		40
41	ib_uverbs_release_uevent(&uqp->uevent);	41	ib_uverbs_release_uevent(&uqp->uevent);
42	return ret;	42	return 0;
43	}	43	}
44		44
45	static int check_creation_flags(enum ib_qp_type qp_type,	45	static int check_creation_flags(enum ib_qp_type qp_type,
@@ -251,8 +251,8 @@ static int UVERBS_HANDLER(UVERBS_METHOD_QP_CREATE)( · 205 unmodified lines
251	if (attr.qp_type == IB_QPT_XRC_TGT)	251	if (attr.qp_type == IB_QPT_XRC_TGT)
252	qp = ib_create_qp(pd, &attr);	252	qp = ib_create_qp(pd, &attr);
253	else	253	else
254	qp = _ib_create_qp(device, pd, &attr, &attrs->driver_udata,	254	qp = _ib_create_qp(device, pd, &attr, &attrs->driver_udata, obj,
255	obj);	255	NULL);
256		256
257	if (IS_ERR(qp)) {	257	if (IS_ERR(qp)) {
258	ret = PTR_ERR(qp);	258	ret = PTR_ERR(qp);

drivers/infiniband/core/uverbs_std_types_srq.c+2−2

@@ -18,7 +18,7 @@ static int uverbs_free_srq(struct ib_uobject *uobject, · 17 unmodified lines
18	int ret;	18	int ret;
19		19
20	ret = ib_destroy_srq_user(srq, &attrs->driver_udata);	20	ret = ib_destroy_srq_user(srq, &attrs->driver_udata);
21	if (ib_is_destroy_retryable(ret, why, uobject))	21	if (ret)
22	return ret;	22	return ret;
23		23
24	if (srq_type == IB_SRQT_XRC) {	24	if (srq_type == IB_SRQT_XRC) {
@@ -30,7 +30,7 @@ static int uverbs_free_srq(struct ib_uobject *uobject, · 5 unmodified lines
30	}	30	}
31		31
32	ib_uverbs_release_uevent(uevent);	32	ib_uverbs_release_uevent(uevent);
33	return ret;	33	return 0;
34	}	34	}
35		35
36	static int UVERBS_HANDLER(UVERBS_METHOD_SRQ_CREATE)(	36	static int UVERBS_HANDLER(UVERBS_METHOD_SRQ_CREATE)(

drivers/infiniband/core/uverbs_std_types_wq.c+2−2

@@ -17,11 +17,11 @@ static int uverbs_free_wq(struct ib_uobject *uobject, · 16 unmodified lines
17	int ret;	17	int ret;
18		18
19	ret = ib_destroy_wq_user(wq, &attrs->driver_udata);	19	ret = ib_destroy_wq_user(wq, &attrs->driver_udata);
20	if (ib_is_destroy_retryable(ret, why, uobject))	20	if (ret)
21	return ret;	21	return ret;
22		22
23	ib_uverbs_release_uevent(&uwq->uevent);	23	ib_uverbs_release_uevent(&uwq->uevent);
24	return ret;	24	return 0;
25	}	25	}
26		26
27	static int UVERBS_HANDLER(UVERBS_METHOD_WQ_CREATE)(	27	static int UVERBS_HANDLER(UVERBS_METHOD_WQ_CREATE)(

drivers/infiniband/core/uverbs_uapi.c+1−4

 	method_elm->is_ex = def->write.is_ex;
 	method_elm->handler = def->func_write;
-	if (def->write.is_ex)
+	if (!def->write.is_ex)
-		method_elm->disabled = !(ibdev->uverbs_ex_cmd_mask &
-					 BIT_ULL(def->write.command_num));
-	else
 		method_elm->disabled = !(ibdev->uverbs_cmd_mask &
 					 BIT_ULL(def->write.command_num));

drivers/infiniband/core/verbs.c+17−10

 /* Protection domains */
 /**
- * ib_alloc_pd - Allocates an unused protection domain.
+ * __ib_alloc_pd - Allocates an unused protection domain.
  * @device: The device on which to allocate the protection domain.
  * @flags: protection domain flags
  * @caller: caller's build-time module name
 	might_sleep_if(flags & RDMA_CREATE_AH_SLEEPABLE);
-	if (!device->ops.create_ah)
+	if (!udata && !device->ops.create_ah)
 		return ERR_PTR(-EOPNOTSUPP);
 	ah = rdma_zalloc_drv_obj_gfp(
 	init_attr.flags = flags;
 	init_attr.xmit_slave = xmit_slave;
-	ret = device->ops.create_ah(ah, &init_attr, udata);
+	if (udata)
+		ret = device->ops.create_user_ah(ah, &init_attr, udata);
+	else
+		ret = device->ops.create_ah(ah, &init_attr, NULL);
 	if (ret) {
 		kfree(ah);
 		return ERR_PTR(ret);
 }
 /**
- * ib_create_qp - Creates a kernel QP associated with the specified protection
+ * ib_create_named_qp - Creates a kernel QP associated with the specified protection
  *   domain.
  * @pd: The protection domain associated with the QP.
  * @qp_init_attr: A list of initial attributes required to create the
  *   QP.  If QP creation succeeds, then the attributes are updated to
  *   the actual capabilities of the created QP.
+ * @caller: caller's build-time module name
  *
  * NOTE: for user qp use ib_create_qp_user with valid udata!
  */
-struct ib_qp *ib_create_qp(struct ib_pd *pd,
+struct ib_qp *ib_create_named_qp(struct ib_pd *pd,
-			   struct ib_qp_init_attr *qp_init_attr)
+				 struct ib_qp_init_attr *qp_init_attr,
+				 const char *caller)
 {
 	struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device;
 	struct ib_qp *qp;
 	if (qp_init_attr->cap.max_rdma_ctxs)
 		rdma_rw_init_qp(device, qp_init_attr);
-	qp = _ib_create_qp(device, pd, qp_init_attr, NULL, NULL);
+	qp = _ib_create_qp(device, pd, qp_init_attr, NULL, NULL, caller);
 	if (IS_ERR(qp))
 		return qp;
 	return ERR_PTR(ret);
 }
-EXPORT_SYMBOL(ib_create_qp);
+EXPORT_SYMBOL(ib_create_named_qp);
 static const struct {
 	int			valid;
 		qp->qp_type == IB_QPT_XRC_TGT);
 }
-/**
+/*
  * IB core internal function to perform QP attributes modification.
  */
 static int _ib_modify_qp(struct ib_qp *qp, struct ib_qp_attr *attr,
 			slave = rdma_lag_get_ah_roce_slave(qp->device,
 							   &attr->ah_attr,
 							   GFP_KERNEL);
-			if (IS_ERR(slave))
+			if (IS_ERR(slave)) {
+				ret = PTR_ERR(slave);
 				goto out_av;
+			}
 			attr->xmit_slave = slave;
 		}
 	}

drivers/infiniband/hw/bnxt_re/ib_verbs.c+12−3

 	}
 	qplqp->mtu = ib_mtu_enum_to_int(iboe_get_mtu(rdev->netdev->mtu));
 	qplqp->dpi = &rdev->dpi_privileged; /* Doorbell page */
-	if (init_attr->create_flags)
+	if (init_attr->create_flags) {
 		ibdev_dbg(&rdev->ibdev,
 			  "QP create flags 0x%x not supported",
 			  init_attr->create_flags);
+		return -EOPNOTSUPP;
+	}
 	/* Setup CQs */
 	if (init_attr->send_cq) {
 	srq->qplib_srq.max_wqe = entries;
 	srq->qplib_srq.max_sge = srq_init_attr->attr.max_sge;
-	srq->qplib_srq.wqe_size =
+	 /* 128 byte wqe size for SRQ . So use max sges */
-			bnxt_re_get_rwqe_size(srq->qplib_srq.max_sge);
+	srq->qplib_srq.wqe_size = bnxt_re_get_rwqe_size(dev_attr->max_srq_sges);
 	srq->qplib_srq.threshold = srq_init_attr->attr.srq_limit;
 	srq->srq_limit = srq_init_attr->attr.srq_limit;
 	srq->qplib_srq.eventq_hw_ring_id = rdev->nq[0].ring_id;
 	unsigned int flags;
 	u8 nw_type;
+	if (qp_attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	qp->qplib_qp.modify_flags = 0;
 	if (qp_attr_mask & IB_QP_STATE) {
 		curr_qp_state = __to_ib_qp_state(qp->qplib_qp.cur_qp_state);
 		goto out;
 	}
 	qp_attr->qp_state = __to_ib_qp_state(qplib_qp->state);
+	qp_attr->cur_qp_state = __to_ib_qp_state(qplib_qp->cur_qp_state);
 	qp_attr->en_sqd_async_notify = qplib_qp->en_sqd_async_notify ? 1 : 0;
 	qp_attr->qp_access_flags = __to_ib_access_flags(qplib_qp->access);
 	qp_attr->pkey_index = qplib_qp->pkey_index;
 	struct bnxt_qplib_nq *nq = NULL;
 	unsigned int nq_alloc_cnt;
+	if (attr->flags)
+		return -EOPNOTSUPP;
 	/* Validate CQ fields */
 	if (cqe < 1 || cqe > dev_attr->max_cq_wqes) {
 		ibdev_err(&rdev->ibdev, "Failed to create CQ -max exceeded");

drivers/infiniband/hw/bnxt_re/main.c+3−31

@@ -608,7 +608,7 @@ static ssize_t hw_rev_show(struct device device, struct device_attribute attr, · 607 unmodified lines
608	struct bnxt_re_dev *rdev =	608	struct bnxt_re_dev *rdev =
609	rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);	609	rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
610		610
611	return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor);	611	return sysfs_emit(buf, "0x%x\n", rdev->en_dev->pdev->vendor);
612	}	612	}
613	static DEVICE_ATTR_RO(hw_rev);	613	static DEVICE_ATTR_RO(hw_rev);
614		614
@@ -618,7 +618,7 @@ static ssize_t hca_type_show(struct device *device, · 3 unmodified lines
618	struct bnxt_re_dev *rdev =	618	struct bnxt_re_dev *rdev =
619	rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);	619	rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
620		620
621	return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc);	621	return sysfs_emit(buf, "%s\n", rdev->ibdev.node_desc);
622	}	622	}
623	static DEVICE_ATTR_RO(hca_type);	623	static DEVICE_ATTR_RO(hca_type);
624		624
@@ -646,6 +646,7 @@ static const struct ib_device_ops bnxt_re_dev_ops = { · 21 unmodified lines
646	.create_cq = bnxt_re_create_cq,	646	.create_cq = bnxt_re_create_cq,
647	.create_qp = bnxt_re_create_qp,	647	.create_qp = bnxt_re_create_qp,
648	.create_srq = bnxt_re_create_srq,	648	.create_srq = bnxt_re_create_srq,
		649	.create_user_ah = bnxt_re_create_ah,
649	.dealloc_driver = bnxt_re_dealloc_driver,	650	.dealloc_driver = bnxt_re_dealloc_driver,
650	.dealloc_pd = bnxt_re_dealloc_pd,	651	.dealloc_pd = bnxt_re_dealloc_pd,
651	.dealloc_ucontext = bnxt_re_dealloc_ucontext,	652	.dealloc_ucontext = bnxt_re_dealloc_ucontext,
@@ -701,35 +702,6 @@ static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) · 49 unmodified lines
701	ibdev->dev.parent = &rdev->en_dev->pdev->dev;	702	ibdev->dev.parent = &rdev->en_dev->pdev->dev;
702	ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;	703	ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
703		704
704	/* User space */
705	ibdev->uverbs_cmd_mask =
706	(1ull << IB_USER_VERBS_CMD_GET_CONTEXT) \|
707	(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) \|
708	(1ull << IB_USER_VERBS_CMD_QUERY_PORT) \|
709	(1ull << IB_USER_VERBS_CMD_ALLOC_PD) \|
710	(1ull << IB_USER_VERBS_CMD_DEALLOC_PD) \|
711	(1ull << IB_USER_VERBS_CMD_REG_MR) \|
712	(1ull << IB_USER_VERBS_CMD_REREG_MR) \|
713	(1ull << IB_USER_VERBS_CMD_DEREG_MR) \|
714	(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) \|
715	(1ull << IB_USER_VERBS_CMD_CREATE_CQ) \|
716	(1ull << IB_USER_VERBS_CMD_RESIZE_CQ) \|
717	(1ull << IB_USER_VERBS_CMD_DESTROY_CQ) \|
718	(1ull << IB_USER_VERBS_CMD_CREATE_QP) \|
719	(1ull << IB_USER_VERBS_CMD_MODIFY_QP) \|
720	(1ull << IB_USER_VERBS_CMD_QUERY_QP) \|
721	(1ull << IB_USER_VERBS_CMD_DESTROY_QP) \|
722	(1ull << IB_USER_VERBS_CMD_CREATE_SRQ) \|
723	(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) \|
724	(1ull << IB_USER_VERBS_CMD_QUERY_SRQ) \|
725	(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) \|
726	(1ull << IB_USER_VERBS_CMD_CREATE_AH) \|
727	(1ull << IB_USER_VERBS_CMD_MODIFY_AH) \|
728	(1ull << IB_USER_VERBS_CMD_QUERY_AH) \|
729	(1ull << IB_USER_VERBS_CMD_DESTROY_AH);
730	/* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */
731
732
733	rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group);	705	rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group);
734	ib_set_device_ops(ibdev, &bnxt_re_dev_ops);	706	ib_set_device_ops(ibdev, &bnxt_re_dev_ops);
735	ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1);	707	ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1);

drivers/infiniband/hw/bnxt_re/qplib_sp.c+1−1

@@ -118,7 +118,7 @@ int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, · 117 unmodified lines
118	* 128 WQEs needs to be reserved for the HW (8916). Prevent	118	* 128 WQEs needs to be reserved for the HW (8916). Prevent
119	* reporting the max number	119	* reporting the max number
120	*/	120	*/
121	attr->max_qp_wqes -= BNXT_QPLIB_RESERVED_QP_WRS;	121	attr->max_qp_wqes -= BNXT_QPLIB_RESERVED_QP_WRS + 1;
122	attr->max_qp_sges = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx) ?	122	attr->max_qp_sges = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx) ?
123	6 : sb->max_sge;	123	6 : sb->max_sge;
124	attr->max_cq = le32_to_cpu(sb->max_cq);	124	attr->max_cq = le32_to_cpu(sb->max_cq);

drivers/infiniband/hw/cxgb4/cq.c+3−0

@@ -1006,6 +1006,9 @@ int c4iw_create_cq(struct ib_cq ibcq, const struct ib_cq_init_attr attr, · 1005 unmodified lines
1006		1006
1007	pr_debug("ib_dev %p entries %d\n", ibdev, entries);	1007	pr_debug("ib_dev %p entries %d\n", ibdev, entries);
1008	if (attr->flags)	1008	if (attr->flags)
		1009	return -EOPNOTSUPP;
		1010
		1011	if (entries < 1 \|\| entries > ibdev->attrs.max_cqe)
1009	return -EINVAL;	1012	return -EINVAL;
1010		1013
1011	if (vector >= rhp->rdev.lldi.nciq)	1014	if (vector >= rhp->rdev.lldi.nciq)

drivers/infiniband/hw/cxgb4/iw_cxgb4.h+0−2

 			    u32 max_num_sg);
 int c4iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
 		   unsigned int *sg_offset);
-int c4iw_dealloc_mw(struct ib_mw *mw);
 void c4iw_dealloc(struct uld_ctx *ctx);
-int c4iw_alloc_mw(struct ib_mw *mw, struct ib_udata *udata);
 struct ib_mr *c4iw_reg_user_mr(struct ib_pd *pd, u64 start,
 					   u64 length, u64 virt, int acc,
 					   struct ib_udata *udata);

drivers/infiniband/hw/cxgb4/mem.c+0−84

@@ -365,22 +365,6 @@ static int dereg_mem(struct c4iw_rdev *rdev, u32 stag, u32 pbl_size, · 364 unmodified lines
365	pbl_size, pbl_addr, skb, wr_waitp);	365	pbl_size, pbl_addr, skb, wr_waitp);
366	}	366	}
367		367
368	static int allocate_window(struct c4iw_rdev rdev, u32 stag, u32 pdid,
369	struct c4iw_wr_wait *wr_waitp)
370	{
371	*stag = T4_STAG_UNSET;
372	return write_tpt_entry(rdev, 0, stag, 0, pdid, FW_RI_STAG_MW, 0, 0, 0,
373	0UL, 0, 0, 0, 0, NULL, wr_waitp);
374	}
375
376	static int deallocate_window(struct c4iw_rdev *rdev, u32 stag,
377	struct sk_buff *skb,
378	struct c4iw_wr_wait *wr_waitp)
379	{
380	return write_tpt_entry(rdev, 1, &stag, 0, 0, 0, 0, 0, 0, 0UL, 0, 0, 0,
381	0, skb, wr_waitp);
382	}
383
384	static int allocate_stag(struct c4iw_rdev rdev, u32 stag, u32 pdid,	368	static int allocate_stag(struct c4iw_rdev rdev, u32 stag, u32 pdid,
385	u32 pbl_size, u32 pbl_addr,	369	u32 pbl_size, u32 pbl_addr,
386	struct c4iw_wr_wait *wr_waitp)	370	struct c4iw_wr_wait *wr_waitp)
@@ -611,74 +595,6 @@ err_free_mhp: · 224 unmodified lines
611	return ERR_PTR(err);	595	return ERR_PTR(err);
612	}	596	}
613		597
614	int c4iw_alloc_mw(struct ib_mw ibmw, struct ib_udata udata)
615	{
616	struct c4iw_mw *mhp = to_c4iw_mw(ibmw);
617	struct c4iw_dev *rhp;
618	struct c4iw_pd *php;
619	u32 mmid;
620	u32 stag = 0;
621	int ret;
622
623	if (ibmw->type != IB_MW_TYPE_1)
624	return -EINVAL;
625
626	php = to_c4iw_pd(ibmw->pd);
627	rhp = php->rhp;
628	mhp->wr_waitp = c4iw_alloc_wr_wait(GFP_KERNEL);
629	if (!mhp->wr_waitp)
630	return -ENOMEM;
631
632	mhp->dereg_skb = alloc_skb(SGE_MAX_WR_LEN, GFP_KERNEL);
633	if (!mhp->dereg_skb) {
634	ret = -ENOMEM;
635	goto free_wr_wait;
636	}
637
638	ret = allocate_window(&rhp->rdev, &stag, php->pdid, mhp->wr_waitp);
639	if (ret)
640	goto free_skb;
641
642	mhp->rhp = rhp;
643	mhp->attr.pdid = php->pdid;
644	mhp->attr.type = FW_RI_STAG_MW;
645	mhp->attr.stag = stag;
646	mmid = (stag) >> 8;
647	ibmw->rkey = stag;
648	if (xa_insert_irq(&rhp->mrs, mmid, mhp, GFP_KERNEL)) {
649	ret = -ENOMEM;
650	goto dealloc_win;
651	}
652	pr_debug("mmid 0x%x mhp %p stag 0x%x\n", mmid, mhp, stag);
653	return 0;
654
655	dealloc_win:
656	deallocate_window(&rhp->rdev, mhp->attr.stag, mhp->dereg_skb,
657	mhp->wr_waitp);
658	free_skb:
659	kfree_skb(mhp->dereg_skb);
660	free_wr_wait:
661	c4iw_put_wr_wait(mhp->wr_waitp);
662	return ret;
663	}
664
665	int c4iw_dealloc_mw(struct ib_mw *mw)
666	{
667	struct c4iw_dev *rhp;
668	struct c4iw_mw *mhp;
669	u32 mmid;
670
671	mhp = to_c4iw_mw(mw);
672	rhp = mhp->rhp;
673	mmid = (mw->rkey) >> 8;
674	xa_erase_irq(&rhp->mrs, mmid);
675	deallocate_window(&rhp->rdev, mhp->attr.stag, mhp->dereg_skb,
676	mhp->wr_waitp);
677	kfree_skb(mhp->dereg_skb);
678	c4iw_put_wr_wait(mhp->wr_waitp);
679	return 0;
680	}
681
682	struct ib_mr c4iw_alloc_mr(struct ib_pd pd, enum ib_mr_type mr_type,	598	struct ib_mr c4iw_alloc_mr(struct ib_pd pd, enum ib_mr_type mr_type,
683	u32 max_num_sg)	599	u32 max_num_sg)
684	{	600	{

drivers/infiniband/hw/cxgb4/provider.c+6−29

 			rdma_device_to_drv_device(dev, struct c4iw_dev, ibdev);
 	pr_debug("dev 0x%p\n", dev);
-	return sprintf(buf, "%d\n",
+	return sysfs_emit(
-		       CHELSIO_CHIP_RELEASE(c4iw_dev->rdev.lldi.adapter_type));
+		buf, "%d\n",
+		CHELSIO_CHIP_RELEASE(c4iw_dev->rdev.lldi.adapter_type));
 }
 static DEVICE_ATTR_RO(hw_rev);
 	pr_debug("dev 0x%p\n", dev);
 	lldev->ethtool_ops->get_drvinfo(lldev, &info);
-	return sprintf(buf, "%s\n", info.driver);
+	return sysfs_emit(buf, "%s\n", info.driver);
 }
 static DEVICE_ATTR_RO(hca_type);
 			rdma_device_to_drv_device(dev, struct c4iw_dev, ibdev);
 	pr_debug("dev 0x%p\n", dev);
-	return sprintf(buf, "%x.%x\n", c4iw_dev->rdev.lldi.pdev->vendor,
+	return sysfs_emit(buf, "%x.%x\n", c4iw_dev->rdev.lldi.pdev->vendor,
-		       c4iw_dev->rdev.lldi.pdev->device);
+			  c4iw_dev->rdev.lldi.pdev->device);
 }
 static DEVICE_ATTR_RO(board_id);
 	.alloc_hw_stats = c4iw_alloc_stats,
 	.alloc_mr = c4iw_alloc_mr,
-	.alloc_mw = c4iw_alloc_mw,
 	.alloc_pd = c4iw_allocate_pd,
 	.alloc_ucontext = c4iw_alloc_ucontext,
 	.create_cq = c4iw_create_cq,
 	.create_qp = c4iw_create_qp,
 	.create_srq = c4iw_create_srq,
-	.dealloc_mw = c4iw_dealloc_mw,
 	.dealloc_pd = c4iw_deallocate_pd,
 	.dealloc_ucontext = c4iw_dealloc_ucontext,
 	.dereg_mr = c4iw_dereg_mr,
 	if (fastreg_support)
 		dev->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
 	dev->ibdev.local_dma_lkey = 0;
-	dev->ibdev.uverbs_cmd_mask =
-	    (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
-	    (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
-	    (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
-	    (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
-	    (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
-	    (1ull << IB_USER_VERBS_CMD_REG_MR) |
-	    (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
-	    (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
-	    (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
-	    (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
-	    (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
-	    (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
-	    (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
-	    (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
-	    (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
-	    (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
-	    (1ull << IB_USER_VERBS_CMD_POST_SEND) |
-	    (1ull << IB_USER_VERBS_CMD_POST_RECV) |
-	    (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
-	    (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
-	    (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
 	dev->ibdev.node_type = RDMA_NODE_RNIC;
 	BUILD_BUG_ON(sizeof(C4IW_NODE_DESC) > IB_DEVICE_NODE_DESC_MAX);
 	memcpy(dev->ibdev.node_desc, C4IW_NODE_DESC, sizeof(C4IW_NODE_DESC));

drivers/infiniband/hw/cxgb4/qp.c+7−1

 	pr_debug("ib_pd %p\n", pd);
-	if (attrs->qp_type != IB_QPT_RC)
+	if (attrs->qp_type != IB_QPT_RC || attrs->create_flags)
 		return ERR_PTR(-EOPNOTSUPP);
 	php = to_c4iw_pd(pd);
 	pr_debug("ib_qp %p\n", ibqp);
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	/* iwarp does not support the RTR state */
 	if ((attr_mask & IB_QP_STATE) && (attr->qp_state == IB_QPS_RTR))
 		attr_mask &= ~IB_QP_STATE;
 	int ret;
 	int wr_len;
+	if (attrs->srq_type != IB_SRQT_BASIC)
+		return -EOPNOTSUPP;
 	pr_debug("%s ib_pd %p\n", __func__, pd);
 	php = to_c4iw_pd(pd);

drivers/infiniband/hw/efa/efa_main.c+3−31

@@ -245,9 +245,9 @@ static const struct ib_device_ops efa_dev_ops = { · 244 unmodified lines
245	.alloc_hw_stats = efa_alloc_hw_stats,	245	.alloc_hw_stats = efa_alloc_hw_stats,
246	.alloc_pd = efa_alloc_pd,	246	.alloc_pd = efa_alloc_pd,
247	.alloc_ucontext = efa_alloc_ucontext,	247	.alloc_ucontext = efa_alloc_ucontext,
248	.create_ah = efa_create_ah,
249	.create_cq = efa_create_cq,	248	.create_cq = efa_create_cq,
250	.create_qp = efa_create_qp,	249	.create_qp = efa_create_qp,
		250	.create_user_ah = efa_create_ah,
251	.dealloc_pd = efa_dealloc_pd,	251	.dealloc_pd = efa_dealloc_pd,
252	.dealloc_ucontext = efa_dealloc_ucontext,	252	.dealloc_ucontext = efa_dealloc_ucontext,
253	.dereg_mr = efa_dereg_mr,	253	.dereg_mr = efa_dereg_mr,
@@ -308,27 +308,6 @@ static int efa_ib_device_add(struct efa_dev *dev) · 54 unmodified lines
308	dev->ibdev.num_comp_vectors = 1;	308	dev->ibdev.num_comp_vectors = 1;
309	dev->ibdev.dev.parent = &pdev->dev;	309	dev->ibdev.dev.parent = &pdev->dev;
310		310
311	dev->ibdev.uverbs_cmd_mask =
312	(1ull << IB_USER_VERBS_CMD_GET_CONTEXT) \|
313	(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) \|
314	(1ull << IB_USER_VERBS_CMD_QUERY_PORT) \|
315	(1ull << IB_USER_VERBS_CMD_ALLOC_PD) \|
316	(1ull << IB_USER_VERBS_CMD_DEALLOC_PD) \|
317	(1ull << IB_USER_VERBS_CMD_REG_MR) \|
318	(1ull << IB_USER_VERBS_CMD_DEREG_MR) \|
319	(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) \|
320	(1ull << IB_USER_VERBS_CMD_CREATE_CQ) \|
321	(1ull << IB_USER_VERBS_CMD_DESTROY_CQ) \|
322	(1ull << IB_USER_VERBS_CMD_CREATE_QP) \|
323	(1ull << IB_USER_VERBS_CMD_MODIFY_QP) \|
324	(1ull << IB_USER_VERBS_CMD_QUERY_QP) \|
325	(1ull << IB_USER_VERBS_CMD_DESTROY_QP) \|
326	(1ull << IB_USER_VERBS_CMD_CREATE_AH) \|
327	(1ull << IB_USER_VERBS_CMD_DESTROY_AH);
328
329	dev->ibdev.uverbs_ex_cmd_mask =
330	(1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE);
331
332	ib_set_device_ops(&dev->ibdev, &efa_dev_ops);	311	ib_set_device_ops(&dev->ibdev, &efa_dev_ops);
333		312
334	err = ib_register_device(&dev->ibdev, "efa_%d", &pdev->dev);	313	err = ib_register_device(&dev->ibdev, "efa_%d", &pdev->dev);
@@ -405,19 +384,12 @@ static int efa_device_init(struct efa_com_dev edev, struct pci_dev pdev) · 70 unmodified lines
405	return err;	384	return err;
406	}	385	}
407		386
408	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));	387	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_width));
409	if (err) {	388	if (err) {
410	dev_err(&pdev->dev, "pci_set_dma_mask failed %d\n", err);	389	dev_err(&pdev->dev, "dma_set_mask_and_coherent failed %d\n", err);
411	return err;	390	return err;
412	}	391	}
413		392
414	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
415	if (err) {
416	dev_err(&pdev->dev,
417	"err_pci_set_consistent_dma_mask failed %d\n",
418	err);
419	return err;
420	}
421	dma_set_max_seg_size(&pdev->dev, UINT_MAX);	393	dma_set_max_seg_size(&pdev->dev, UINT_MAX);
422	return 0;	394	return 0;
423	}	395	}

drivers/infiniband/hw/efa/efa_verbs.c+6−0

 	enum ib_qp_state new_state;
 	int err;
+	if (qp_attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	if (udata->inlen &&
 	    !ib_is_udata_cleared(udata, 0, udata->inlen)) {
 		ibdev_dbg(&dev->ibdev,
 	ibdev_dbg(ibdev, "create_cq entries %d\n", entries);
+	if (attr->flags)
+		return -EOPNOTSUPP;
 	if (entries < 1 || entries > dev->dev_attr.max_cq_depth) {
 		ibdev_dbg(ibdev,
 			  "cq: requested entries[%u] non-positive or greater than max[%u]\n",

drivers/infiniband/hw/hfi1/qp.c+1−0

@@ -339,6 +339,7 @@ int hfi1_setup_wqe(struct rvt_qp qp, struct rvt_swqe wqe, bool *call_send) · 338 unmodified lines
339	return -EINVAL;	339	return -EINVAL;
340	if (ibp->sl_to_sc[rdma_ah_get_sl(&ah->attr)] == 0xf)	340	if (ibp->sl_to_sc[rdma_ah_get_sl(&ah->attr)] == 0xf)
341	return -EINVAL;	341	return -EINVAL;
		342	break;
342	default:	343	default:
343	break;	344	break;
344	}	345	}

drivers/infiniband/hw/hfi1/sysfs.c+29−33

@@ -151,7 +151,7 @@ struct hfi1_port_attr { · 150 unmodified lines
151		151
152	static ssize_t cc_prescan_show(struct hfi1_pportdata ppd, char buf)	152	static ssize_t cc_prescan_show(struct hfi1_pportdata ppd, char buf)
153	{	153	{
154	return sprintf(buf, "%s\n", ppd->cc_prescan ? "on" : "off");	154	return sysfs_emit(buf, "%s\n", ppd->cc_prescan ? "on" : "off");
155	}	155	}
156		156
157	static ssize_t cc_prescan_store(struct hfi1_pportdata ppd, const char buf,	157	static ssize_t cc_prescan_store(struct hfi1_pportdata ppd, const char buf,
@@ -296,7 +296,7 @@ static ssize_t sc2vl_attr_show(struct kobject kobj, struct attribute attr, · 138 unmodified lines
296	container_of(kobj, struct hfi1_pportdata, sc2vl_kobj);	296	container_of(kobj, struct hfi1_pportdata, sc2vl_kobj);
297	struct hfi1_devdata *dd = ppd->dd;	297	struct hfi1_devdata *dd = ppd->dd;
298		298
299	return sprintf(buf, "%u\n", ((u8 )dd->sc2vl + sattr->sc));	299	return sysfs_emit(buf, "%u\n", ((u8 )dd->sc2vl + sattr->sc));
300	}	300	}
301		301
302	static const struct sysfs_ops hfi1_sc2vl_ops = {	302	static const struct sysfs_ops hfi1_sc2vl_ops = {
@@ -401,7 +401,7 @@ static ssize_t sl2sc_attr_show(struct kobject kobj, struct attribute attr, · 98 unmodified lines
401	container_of(kobj, struct hfi1_pportdata, sl2sc_kobj);	401	container_of(kobj, struct hfi1_pportdata, sl2sc_kobj);
402	struct hfi1_ibport *ibp = &ppd->ibport_data;	402	struct hfi1_ibport *ibp = &ppd->ibport_data;
403		403
404	return sprintf(buf, "%u\n", ibp->sl_to_sc[sattr->sl]);	404	return sysfs_emit(buf, "%u\n", ibp->sl_to_sc[sattr->sl]);
405	}	405	}
406		406
407	static const struct sysfs_ops hfi1_sl2sc_ops = {	407	static const struct sysfs_ops hfi1_sl2sc_ops = {
@@ -475,7 +475,7 @@ static ssize_t vl2mtu_attr_show(struct kobject kobj, struct attribute attr, · 67 unmodified lines
475	container_of(kobj, struct hfi1_pportdata, vl2mtu_kobj);	475	container_of(kobj, struct hfi1_pportdata, vl2mtu_kobj);
476	struct hfi1_devdata *dd = ppd->dd;	476	struct hfi1_devdata *dd = ppd->dd;
477		477
478	return sprintf(buf, "%u\n", dd->vld[vlattr->vl].mtu);	478	return sysfs_emit(buf, "%u\n", dd->vld[vlattr->vl].mtu);
479	}	479	}
480		480
481	static const struct sysfs_ops hfi1_vl2mtu_ops = {	481	static const struct sysfs_ops hfi1_vl2mtu_ops = {
@@ -500,7 +500,7 @@ static ssize_t hw_rev_show(struct device device, struct device_attribute attr, · 18 unmodified lines
500	struct hfi1_ibdev *dev =	500	struct hfi1_ibdev *dev =
501	rdma_device_to_drv_device(device, struct hfi1_ibdev, rdi.ibdev);	501	rdma_device_to_drv_device(device, struct hfi1_ibdev, rdi.ibdev);
502		502
503	return sprintf(buf, "%x\n", dd_from_dev(dev)->minrev);	503	return sysfs_emit(buf, "%x\n", dd_from_dev(dev)->minrev);
504	}	504	}
505	static DEVICE_ATTR_RO(hw_rev);	505	static DEVICE_ATTR_RO(hw_rev);
506		506
@@ -510,13 +510,11 @@ static ssize_t board_id_show(struct device *device, · 3 unmodified lines
510	struct hfi1_ibdev *dev =	510	struct hfi1_ibdev *dev =
511	rdma_device_to_drv_device(device, struct hfi1_ibdev, rdi.ibdev);	511	rdma_device_to_drv_device(device, struct hfi1_ibdev, rdi.ibdev);
512	struct hfi1_devdata *dd = dd_from_dev(dev);	512	struct hfi1_devdata *dd = dd_from_dev(dev);
513	int ret;
514		513
515	if (!dd->boardname)	514	if (!dd->boardname)
516	ret = -EINVAL;	515	return -EINVAL;
517	else	516
518	ret = scnprintf(buf, PAGE_SIZE, "%s\n", dd->boardname);	517	return sysfs_emit(buf, "%s\n", dd->boardname);
519	return ret;
520	}	518	}
521	static DEVICE_ATTR_RO(board_id);	519	static DEVICE_ATTR_RO(board_id);
522		520
@@ -528,7 +526,7 @@ static ssize_t boardversion_show(struct device *device, · 5 unmodified lines
528	struct hfi1_devdata *dd = dd_from_dev(dev);	526	struct hfi1_devdata *dd = dd_from_dev(dev);
529		527
530	/* The string printed here is already newline-terminated. */	528	/* The string printed here is already newline-terminated. */
531	return scnprintf(buf, PAGE_SIZE, "%s", dd->boardversion);	529	return sysfs_emit(buf, "%s", dd->boardversion);
532	}	530	}
533	static DEVICE_ATTR_RO(boardversion);	531	static DEVICE_ATTR_RO(boardversion);
534		532
@@ -545,9 +543,9 @@ static ssize_t nctxts_show(struct device *device, · 10 unmodified lines
545	* and a receive context, so returning the smaller of the two counts	543	* and a receive context, so returning the smaller of the two counts
546	* give a more accurate picture of total contexts available.	544	* give a more accurate picture of total contexts available.
547	*/	545	*/
548	return scnprintf(buf, PAGE_SIZE, "%u\n",	546	return sysfs_emit(buf, "%u\n",
549	min(dd->num_user_contexts,	547	min(dd->num_user_contexts,
550	(u32)dd->sc_sizes[SC_USER].count));	548	(u32)dd->sc_sizes[SC_USER].count));
551	}	549	}
552	static DEVICE_ATTR_RO(nctxts);	550	static DEVICE_ATTR_RO(nctxts);
553		551
@@ -559,7 +557,7 @@ static ssize_t nfreectxts_show(struct device *device, · 5 unmodified lines
559	struct hfi1_devdata *dd = dd_from_dev(dev);	557	struct hfi1_devdata *dd = dd_from_dev(dev);
560		558
561	/* Return the number of free user ports (contexts) available. */	559	/* Return the number of free user ports (contexts) available. */
562	return scnprintf(buf, PAGE_SIZE, "%u\n", dd->freectxts);	560	return sysfs_emit(buf, "%u\n", dd->freectxts);
563	}	561	}
564	static DEVICE_ATTR_RO(nfreectxts);	562	static DEVICE_ATTR_RO(nfreectxts);
565		563
@@ -570,7 +568,8 @@ static ssize_t serial_show(struct device *device, · 4 unmodified lines
570	rdma_device_to_drv_device(device, struct hfi1_ibdev, rdi.ibdev);	568	rdma_device_to_drv_device(device, struct hfi1_ibdev, rdi.ibdev);
571	struct hfi1_devdata *dd = dd_from_dev(dev);	569	struct hfi1_devdata *dd = dd_from_dev(dev);
572		570
573	return scnprintf(buf, PAGE_SIZE, "%s", dd->serial);	571	/* dd->serial is already newline terminated in chip.c */
		572	return sysfs_emit(buf, "%s", dd->serial);
574	}	573	}
575	static DEVICE_ATTR_RO(serial);	574	static DEVICE_ATTR_RO(serial);
576		575
@@ -598,9 +597,8 @@ static DEVICE_ATTR_WO(chip_reset); · 21 unmodified lines
598	* Convert the reported temperature from an integer (reported in	597	* Convert the reported temperature from an integer (reported in
599	* units of 0.25C) to a floating point number.	598	* units of 0.25C) to a floating point number.
600	*/	599	*/
601	#define temp2str(temp, buf, size, idx) \	600	#define temp_d(t) ((t) >> 2)
602	scnprintf((buf) + (idx), (size) - (idx), "%u.%02u ", \	601	#define temp_f(t) (((t)&0x3) * 25u)
603	((temp) >> 2), ((temp) & 0x3) * 25)
604		602
605	/*	603	/*
606	* Dump tempsense values, in decimal, to ease shell-scripts.	604	* Dump tempsense values, in decimal, to ease shell-scripts.
@@ -615,19 +613,17 @@ static ssize_t tempsense_show(struct device *device, · 8 unmodified lines
615	int ret;	613	int ret;
616		614
617	ret = hfi1_tempsense_rd(dd, &temp);	615	ret = hfi1_tempsense_rd(dd, &temp);
618	if (!ret) {	616	if (ret)
619	int idx = 0;	617	return ret;
620		618
621	idx += temp2str(temp.curr, buf, PAGE_SIZE, idx);	619	return sysfs_emit(buf, "%u.%02u %u.%02u %u.%02u %u.%02u %u %u %u\n",
622	idx += temp2str(temp.lo_lim, buf, PAGE_SIZE, idx);	620	temp_d(temp.curr), temp_f(temp.curr),
623	idx += temp2str(temp.hi_lim, buf, PAGE_SIZE, idx);	621	temp_d(temp.lo_lim), temp_f(temp.lo_lim),
624	idx += temp2str(temp.crit_lim, buf, PAGE_SIZE, idx);	622	temp_d(temp.hi_lim), temp_f(temp.hi_lim),
625	idx += scnprintf(buf + idx, PAGE_SIZE - idx,	623	temp_d(temp.crit_lim), temp_f(temp.crit_lim),
626	"%u %u %u\n", temp.triggers & 0x1,	624	temp.triggers & 0x1,
627	temp.triggers & 0x2, temp.triggers & 0x4);	625	temp.triggers & 0x2,
628	ret = idx;	626	temp.triggers & 0x4);
629	}
630	return ret;
631	}	627	}
632	static DEVICE_ATTR_RO(tempsense);	628	static DEVICE_ATTR_RO(tempsense);
633		629
@@ -817,7 +813,7 @@ static ssize_t sde_show_vl(struct sdma_engine sde, char buf) · 183 unmodified lines
817	if (vl < 0)	813	if (vl < 0)
818	return vl;	814	return vl;
819		815
820	return snprintf(buf, PAGE_SIZE, "%d\n", vl);	816	return sysfs_emit(buf, "%d\n", vl);
821	}	817	}
822		818
823	static SDE_ATTR(cpu_list, S_IWUSR \| S_IRUGO,	819	static SDE_ATTR(cpu_list, S_IWUSR \| S_IRUGO,

drivers/infiniband/hw/hfi1/tid_rdma.c+5−0

 		default:
 			break;
 		}
+		break;
 	default:
 		break;
 	}
 		default:
 			break;
 		}
+		break;
 	default:
 		break;
 	}
 			req = wqe_to_tid_req(prev);
 			if (req->ack_seg != req->total_segs)
 				goto interlock;
+			break;
 		default:
 			break;
 		}
 			req = wqe_to_tid_req(prev);
 			if (req->ack_seg != req->total_segs)
 				goto interlock;
+			break;
 		default:
 			break;
 		}
+		break;
 	default:
 		break;
 	}

drivers/infiniband/hw/hns/hns_roce_ah.c+23−32

  */
 #include <linux/platform_device.h>
+#include <linux/pci.h>
 #include <rdma/ib_addr.h>
 #include <rdma/ib_cache.h>
 #include "hns_roce_device.h"
-#define HNS_ROCE_PORT_NUM_SHIFT		24
-#define HNS_ROCE_VLAN_SL_BIT_MASK	7
-#define HNS_ROCE_VLAN_SL_SHIFT		13
 static inline u16 get_ah_udp_sport(const struct rdma_ah_attr *ah_attr)
 {
 	u32 fl = ah_attr->grh.flow_label;
 int hns_roce_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *init_attr,
 		       struct ib_udata *udata)
 {
-	struct hns_roce_dev *hr_dev = to_hr_dev(ibah->device);
-	const struct ib_gid_attr *gid_attr;
-	struct device *dev = hr_dev->dev;
-	struct hns_roce_ah *ah = to_hr_ah(ibah);
 	struct rdma_ah_attr *ah_attr = init_attr->ah_attr;
 	const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
-	u16 vlan_id = 0xffff;
+	struct hns_roce_dev *hr_dev = to_hr_dev(ibah->device);
-	bool vlan_en = false;
+	struct hns_roce_ah *ah = to_hr_ah(ibah);
-	int ret;
+	int ret = 0;
-	gid_attr = ah_attr->grh.sgid_attr;
-	ret = rdma_read_gid_l2_fields(gid_attr, &vlan_id, NULL);
-	if (ret)
-		return ret;
-	/* Get mac address */
-	memcpy(ah->av.mac, ah_attr->roce.dmac, ETH_ALEN);
-	if (vlan_id < VLAN_N_VID) {
+	if (hr_dev->pci_dev->revision <= PCI_REVISION_ID_HIP08 && udata)
-		vlan_en = true;
+		return -EOPNOTSUPP;
-		vlan_id |= (rdma_ah_get_sl(ah_attr) &
-			     HNS_ROCE_VLAN_SL_BIT_MASK) <<
-			     HNS_ROCE_VLAN_SL_SHIFT;
-	}
 	ah->av.port = rdma_ah_get_port_num(ah_attr);
 	ah->av.gid_index = grh->sgid_index;
-	ah->av.vlan_id = vlan_id;
-	ah->av.vlan_en = vlan_en;
-	dev_dbg(dev, "gid_index = 0x%x,vlan_id = 0x%x\n", ah->av.gid_index,
-		ah->av.vlan_id);
 	if (rdma_ah_get_static_rate(ah_attr))
 		ah->av.stat_rate = IB_RATE_10_GBPS;
-	memcpy(ah->av.dgid, grh->dgid.raw, HNS_ROCE_GID_SIZE);
+	ah->av.hop_limit = grh->hop_limit;
-	ah->av.sl = rdma_ah_get_sl(ah_attr);
 	ah->av.flowlabel = grh->flow_label;
 	ah->av.udp_sport = get_ah_udp_sport(ah_attr);
+	ah->av.sl = rdma_ah_get_sl(ah_attr);
+	ah->av.tclass = get_tclass(grh);
-	return 0;
+	memcpy(ah->av.dgid, grh->dgid.raw, HNS_ROCE_GID_SIZE);
+	memcpy(ah->av.mac, ah_attr->roce.dmac, ETH_ALEN);
+	/* HIP08 needs to record vlan info in Address Vector */
+	if (hr_dev->pci_dev->revision <= PCI_REVISION_ID_HIP08) {
+		ret = rdma_read_gid_l2_fields(ah_attr->grh.sgid_attr,
+					      &ah->av.vlan_id, NULL);
+		if (ret)
+			return ret;
+		ah->av.vlan_en = ah->av.vlan_id < VLAN_N_VID;
+	}
+	return ret;
 }
 int hns_roce_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)

drivers/infiniband/hw/hns/hns_roce_alloc.c+76−56

@@ -159,76 +159,96 @@ void hns_roce_bitmap_cleanup(struct hns_roce_bitmap *bitmap) · 158 unmodified lines
159		159
160	void hns_roce_buf_free(struct hns_roce_dev hr_dev, struct hns_roce_buf buf)	160	void hns_roce_buf_free(struct hns_roce_dev hr_dev, struct hns_roce_buf buf)
161	{	161	{
162	struct device *dev = hr_dev->dev;	162	struct hns_roce_buf_list *trunks;
163	u32 size = buf->size;	163	u32 i;
164	int i;
165		164
166	if (size == 0)	165	if (!buf)
167	return;	166	return;
168		167
169	buf->size = 0;	168	trunks = buf->trunk_list;
		169	if (trunks) {
		170	buf->trunk_list = NULL;
		171	for (i = 0; i < buf->ntrunks; i++)
		172	dma_free_coherent(hr_dev->dev, 1 << buf->trunk_shift,
		173	trunks[i].buf, trunks[i].map);
170		174
171	if (hns_roce_buf_is_direct(buf)) {	175	kfree(trunks);
172	dma_free_coherent(dev, size, buf->direct.buf, buf->direct.map);
173	} else {
174	for (i = 0; i < buf->npages; ++i)
175	if (buf->page_list[i].buf)
176	dma_free_coherent(dev, 1 << buf->page_shift,
177	buf->page_list[i].buf,
178	buf->page_list[i].map);
179	kfree(buf->page_list);
180	buf->page_list = NULL;
181	}	176	}
		177
		178	kfree(buf);
182	}	179	}
183		180
184	int hns_roce_buf_alloc(struct hns_roce_dev *hr_dev, u32 size, u32 max_direct,	181	/*
185	struct hns_roce_buf *buf, u32 page_shift)	182	* Allocate the dma buffer for storing ROCEE table entries
		183	*
		184	* @size: required size
		185	* @page_shift: the unit size in a continuous dma address range
		186	* @flags: HNS_ROCE_BUF_ flags to control the allocation flow.
		187	*/
		188	struct hns_roce_buf hns_roce_buf_alloc(struct hns_roce_dev hr_dev, u32 size,
		189	u32 page_shift, u32 flags)
186	{	190	{
187	struct hns_roce_buf_list *buf_list;	191	u32 trunk_size, page_size, alloced_size;
188	struct device *dev = hr_dev->dev;	192	struct hns_roce_buf_list *trunks;
189	u32 page_size;	193	struct hns_roce_buf *buf;
190	int i;	194	gfp_t gfp_flags;
		195	u32 ntrunk, i;
191		196
192	/* The minimum shift of the page accessed by hw is HNS_HW_PAGE_SHIFT */	197	/* The minimum shift of the page accessed by hw is HNS_HW_PAGE_SHIFT */
193	buf->page_shift = max_t(int, HNS_HW_PAGE_SHIFT, page_shift);	198	if (WARN_ON(page_shift < HNS_HW_PAGE_SHIFT))
		199	return ERR_PTR(-EINVAL);
		200
		201	gfp_flags = (flags & HNS_ROCE_BUF_NOSLEEP) ? GFP_ATOMIC : GFP_KERNEL;
		202	buf = kzalloc(sizeof(*buf), gfp_flags);
		203	if (!buf)
		204	return ERR_PTR(-ENOMEM);
194		205
		206	buf->page_shift = page_shift;
195	page_size = 1 << buf->page_shift;	207	page_size = 1 << buf->page_shift;
196	buf->npages = DIV_ROUND_UP(size, page_size);	208
197		209	/* Calc the trunk size and num by required size and page_shift */
198	/* required size is not bigger than one trunk size */	210	if (flags & HNS_ROCE_BUF_DIRECT) {
199	if (size <= max_direct) {	211	buf->trunk_shift = ilog2(ALIGN(size, PAGE_SIZE));
200	buf->page_list = NULL;	212	ntrunk = 1;
201	buf->direct.buf = dma_alloc_coherent(dev, size,
202	&buf->direct.map,
203	GFP_KERNEL);
204	if (!buf->direct.buf)
205	return -ENOMEM;
206	} else {	213	} else {
207	buf_list = kcalloc(buf->npages, sizeof(*buf_list), GFP_KERNEL);	214	buf->trunk_shift = ilog2(ALIGN(page_size, PAGE_SIZE));
208	if (!buf_list)	215	ntrunk = DIV_ROUND_UP(size, 1 << buf->trunk_shift);
209	return -ENOMEM;	216	}
210
211	for (i = 0; i < buf->npages; i++) {
212	buf_list[i].buf = dma_alloc_coherent(dev, page_size,
213	&buf_list[i].map,
214	GFP_KERNEL);
215	if (!buf_list[i].buf)
216	break;
217	}
218		217
219	if (i != buf->npages && i > 0) {	218	trunks = kcalloc(ntrunk, sizeof(*trunks), gfp_flags);
220	while (i-- > 0)	219	if (!trunks) {
221	dma_free_coherent(dev, page_size,	220	kfree(buf);
222	buf_list[i].buf,	221	return ERR_PTR(-ENOMEM);
223	buf_list[i].map);
224	kfree(buf_list);
225	return -ENOMEM;
226	}
227	buf->page_list = buf_list;
228	}	222	}
229	buf->size = size;
230		223
231	return 0;	224	trunk_size = 1 << buf->trunk_shift;
		225	alloced_size = 0;
		226	for (i = 0; i < ntrunk; i++) {
		227	trunks[i].buf = dma_alloc_coherent(hr_dev->dev, trunk_size,
		228	&trunks[i].map, gfp_flags);
		229	if (!trunks[i].buf)
		230	break;
		231
		232	alloced_size += trunk_size;
		233	}
		234
		235	buf->ntrunks = i;
		236
		237	/* In nofail mode, it's only failed when the alloced size is 0 */
		238	if ((flags & HNS_ROCE_BUF_NOFAIL) ? i == 0 : i != ntrunk) {
		239	for (i = 0; i < buf->ntrunks; i++)
		240	dma_free_coherent(hr_dev->dev, trunk_size,
		241	trunks[i].buf, trunks[i].map);
		242
		243	kfree(trunks);
		244	kfree(buf);
		245	return ERR_PTR(-ENOMEM);
		246	}
		247
		248	buf->npages = DIV_ROUND_UP(alloced_size, page_size);
		249	buf->trunk_list = trunks;
		250
		251	return buf;
232	}	252	}
233		253
234	int hns_roce_get_kmem_bufs(struct hns_roce_dev hr_dev, dma_addr_t bufs,	254	int hns_roce_get_kmem_bufs(struct hns_roce_dev hr_dev, dma_addr_t bufs,
@@ -240,7 +260,7 @@ int hns_roce_get_kmem_bufs(struct hns_roce_dev hr_dev, dma_addr_t bufs, · 5 unmodified lines
240	end = start + buf_cnt;	260	end = start + buf_cnt;
241	if (end > buf->npages) {	261	if (end > buf->npages) {
242	dev_err(hr_dev->dev,	262	dev_err(hr_dev->dev,
243	"Failed to check kmem bufs, end %d + %d total %d!\n",	263	"failed to check kmem bufs, end %d + %d total %u!\n",
244	start, buf_cnt, buf->npages);	264	start, buf_cnt, buf->npages);
245	return -EINVAL;	265	return -EINVAL;
246	}	266	}
@@ -262,7 +282,7 @@ int hns_roce_get_umem_bufs(struct hns_roce_dev hr_dev, dma_addr_t bufs, · 15 unmodified lines
262	u64 addr;	282	u64 addr;
263		283
264	if (page_shift < HNS_HW_PAGE_SHIFT) {	284	if (page_shift < HNS_HW_PAGE_SHIFT) {
265	dev_err(hr_dev->dev, "Failed to check umem page shift %d!\n",	285	dev_err(hr_dev->dev, "failed to check umem page shift %u!\n",
266	page_shift);	286	page_shift);
267	return -EINVAL;	287	return -EINVAL;
268	}	288	}

drivers/infiniband/hw/hns/hns_roce_cmd.c+18−19

 #include "hns_roce_device.h"
 #include "hns_roce_cmd.h"
-#define CMD_POLL_TOKEN		0xffff
+#define CMD_POLL_TOKEN 0xffff
-#define CMD_MAX_NUM		32
+#define CMD_MAX_NUM 32
-#define CMD_TOKEN_MASK		0x1f
+#define CMD_TOKEN_MASK 0x1f
 static int hns_roce_cmd_mbox_post_hw(struct hns_roce_dev *hr_dev, u64 in_param,
 				     u64 out_param, u32 in_modifier,
 static int __hns_roce_cmd_mbox_poll(struct hns_roce_dev *hr_dev, u64 in_param,
 				    u64 out_param, unsigned long in_modifier,
 				    u8 op_modifier, u16 op,
-				    unsigned long timeout)
+				    unsigned int timeout)
 {
 	struct device *dev = hr_dev->dev;
 	int ret;
 static int hns_roce_cmd_mbox_poll(struct hns_roce_dev *hr_dev, u64 in_param,
 				  u64 out_param, unsigned long in_modifier,
-				  u8 op_modifier, u16 op, unsigned long timeout)
+				  u8 op_modifier, u16 op, unsigned int timeout)
 {
 	int ret;
 void hns_roce_cmd_event(struct hns_roce_dev *hr_dev, u16 token, u8 status,
 			u64 out_param)
 {
-	struct hns_roce_cmd_context
+	struct hns_roce_cmd_context *context =
-		*context = &hr_dev->cmd.context[token & hr_dev->cmd.token_mask];
+		&hr_dev->cmd.context[token % hr_dev->cmd.max_cmds];
 	if (token != context->token)
 		return;
 static int __hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64 in_param,
 				    u64 out_param, unsigned long in_modifier,
 				    u8 op_modifier, u16 op,
-				    unsigned long timeout)
+				    unsigned int timeout)
 {
 	struct hns_roce_cmdq *cmd = &hr_dev->cmd;
 	struct hns_roce_cmd_context *context;
 static int hns_roce_cmd_mbox_wait(struct hns_roce_dev *hr_dev, u64 in_param,
 				  u64 out_param, unsigned long in_modifier,
-				  u8 op_modifier, u16 op, unsigned long timeout)
+				  u8 op_modifier, u16 op, unsigned int timeout)
 {
 	int ret;
 	down(&hr_dev->cmd.event_sem);
-	ret = __hns_roce_cmd_mbox_wait(hr_dev, in_param, out_param,
+	ret = __hns_roce_cmd_mbox_wait(hr_dev, in_param, out_param, in_modifier,
-				       in_modifier, op_modifier, op, timeout);
+				       op_modifier, op, timeout);
 	up(&hr_dev->cmd.event_sem);
 	return ret;
 int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,
 		      unsigned long in_modifier, u8 op_modifier, u16 op,
-		      unsigned long timeout)
+		      unsigned int timeout)
 {
 	int ret;
 	struct hns_roce_cmdq *hr_cmd = &hr_dev->cmd;
 	int i;
-	hr_cmd->context = kmalloc_array(hr_cmd->max_cmds,
+	hr_cmd->context =
-					sizeof(*hr_cmd->context),
+		kcalloc(hr_cmd->max_cmds, sizeof(*hr_cmd->context), GFP_KERNEL);
-					GFP_KERNEL);
 	if (!hr_cmd->context)
 		return -ENOMEM;
 	hr_cmd->use_events = 0;
 }
-struct hns_roce_cmd_mailbox
+struct hns_roce_cmd_mailbox *
-	*hns_roce_alloc_cmd_mailbox(struct hns_roce_dev *hr_dev)
+hns_roce_alloc_cmd_mailbox(struct hns_roce_dev *hr_dev)
 {
 	struct hns_roce_cmd_mailbox *mailbox;
 	if (!mailbox)
 		return ERR_PTR(-ENOMEM);
-	mailbox->buf = dma_pool_alloc(hr_dev->cmd.pool, GFP_KERNEL,
+	mailbox->buf =
-				      &mailbox->dma);
+		dma_pool_alloc(hr_dev->cmd.pool, GFP_KERNEL, &mailbox->dma);
 	if (!mailbox->buf) {
 		kfree(mailbox);
 		return ERR_PTR(-ENOMEM);

drivers/infiniband/hw/hns/hns_roce_cmd.h+3−3

@@ -141,10 +141,10 @@ enum { · 140 unmodified lines
141		141
142	int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,	142	int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,
143	unsigned long in_modifier, u8 op_modifier, u16 op,	143	unsigned long in_modifier, u8 op_modifier, u16 op,
144	unsigned long timeout);	144	unsigned int timeout);
145		145
146	struct hns_roce_cmd_mailbox	146	struct hns_roce_cmd_mailbox *
147	hns_roce_alloc_cmd_mailbox(struct hns_roce_dev hr_dev);	147	hns_roce_alloc_cmd_mailbox(struct hns_roce_dev *hr_dev);
148	void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev,	148	void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev,
149	struct hns_roce_cmd_mailbox *mailbox);	149	struct hns_roce_cmd_mailbox *mailbox);
150		150

drivers/infiniband/hw/hns/hns_roce_common.h+19−7

 #define roce_raw_write(value, addr) \
 	__raw_writel((__force u32)cpu_to_le32(value), (addr))
-#define roce_get_field(origin, mask, shift) \
+#define roce_get_field(origin, mask, shift)                                    \
-	(((le32_to_cpu(origin)) & (mask)) >> (shift))
+	((le32_to_cpu(origin) & (mask)) >> (u32)(shift))
 #define roce_get_bit(origin, shift) \
 	roce_get_field((origin), (1ul << (shift)), (shift))
-#define roce_set_field(origin, mask, shift, val) \
+#define roce_set_field(origin, mask, shift, val)                               \
-	do { \
+	do {                                                                   \
-		(origin) &= ~cpu_to_le32(mask); \
+		(origin) &= ~cpu_to_le32(mask);                                \
-		(origin) |= cpu_to_le32(((u32)(val) << (shift)) & (mask)); \
+		(origin) |= cpu_to_le32(((u32)(val) << (u32)(shift)) & (mask));     \
 	} while (0)
-#define roce_set_bit(origin, shift, val) \
+#define roce_set_bit(origin, shift, val)                                       \
 	roce_set_field((origin), (1ul << (shift)), (shift), (val))
+#define FIELD_LOC(field_type, field_h, field_l) field_type, field_h, field_l
+#define _hr_reg_enable(ptr, field_type, field_h, field_l)                      \
+	({                                                                     \
+		const field_type *_ptr = ptr;                                  \
+		*((__le32 *)_ptr + (field_h) / 32) |=                          \
+			cpu_to_le32(BIT((field_l) % 32)) +                     \
+			BUILD_BUG_ON_ZERO((field_h) != (field_l));             \
+	})
+#define hr_reg_enable(ptr, field) _hr_reg_enable(ptr, field)
 #define ROCEE_GLB_CFG_ROCEE_DB_SQ_MODE_S 3
 #define ROCEE_GLB_CFG_ROCEE_DB_OTH_MODE_S 4

drivers/infiniband/hw/hns/hns_roce_cq.c+25−21

 #include "hns_roce_device.h"
 #include "hns_roce_cmd.h"
 #include "hns_roce_hem.h"
-#include <rdma/hns-abi.h>
 #include "hns_roce_common.h"
 static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
 {
+	struct ib_device *ibdev = &hr_dev->ib_dev;
 	struct hns_roce_cmd_mailbox *mailbox;
 	struct hns_roce_cq_table *cq_table;
-	struct ib_device *ibdev = &hr_dev->ib_dev;
 	u64 mtts[MTT_MIN_COUNT] = { 0 };
 	dma_addr_t dma_handle;
 	int ret;
 	ret = hns_roce_mtr_find(hr_dev, &hr_cq->mtr, 0, mtts, ARRAY_SIZE(mtts),
 				&dma_handle);
-	if (ret < 1) {
+	if (!ret) {
-		ibdev_err(ibdev, "Failed to find CQ mtr\n");
+		ibdev_err(ibdev, "failed to find CQ mtr, ret = %d.\n", ret);
 		return -EINVAL;
 	}
 	cq_table = &hr_dev->cq_table;
 	ret = hns_roce_bitmap_alloc(&cq_table->bitmap, &hr_cq->cqn);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to alloc CQ bitmap, err %d\n", ret);
+		ibdev_err(ibdev, "failed to alloc CQ bitmap, ret = %d.\n", ret);
 		return ret;
 	}
 	/* Get CQC memory HEM(Hardware Entry Memory) table */
 	ret = hns_roce_table_get(hr_dev, &cq_table->table, hr_cq->cqn);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to get CQ(0x%lx) context, err %d\n",
+		ibdev_err(ibdev, "failed to get CQ(0x%lx) context, ret = %d.\n",
 			  hr_cq->cqn, ret);
 		goto err_out;
 	}
 	ret = xa_err(xa_store(&cq_table->array, hr_cq->cqn, hr_cq, GFP_KERNEL));
 	if (ret) {
-		ibdev_err(ibdev, "Failed to xa_store CQ\n");
+		ibdev_err(ibdev, "failed to xa_store CQ, ret = %d.\n", ret);
 		goto err_put;
 	}
 	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
 	if (ret) {
 		ibdev_err(ibdev,
-			  "Failed to send create cmd for CQ(0x%lx), err %d\n",
+			  "failed to send create cmd for CQ(0x%lx), ret = %d.\n",
 			  hr_cq->cqn, ret);
 		goto err_xa;
 	}
 {
 	struct ib_device *ibdev = &hr_dev->ib_dev;
 	struct hns_roce_buf_attr buf_attr = {};
-	int err;
+	int ret;
 	buf_attr.page_shift = hr_dev->caps.cqe_buf_pg_sz + HNS_HW_PAGE_SHIFT;
 	buf_attr.region[0].size = hr_cq->cq_depth * hr_cq->cqe_size;
 	buf_attr.region_count = 1;
 	buf_attr.fixed_page = true;
-	err = hns_roce_mtr_create(hr_dev, &hr_cq->mtr, &buf_attr,
+	ret = hns_roce_mtr_create(hr_dev, &hr_cq->mtr, &buf_attr,
 				  hr_dev->caps.cqe_ba_pg_sz + HNS_HW_PAGE_SHIFT,
 				  udata, addr);
-	if (err)
+	if (ret)
-		ibdev_err(ibdev, "Failed to alloc CQ mtr, err %d\n", err);
+		ibdev_err(ibdev, "failed to alloc CQ mtr, ret = %d.\n", ret);
-	return err;
+	return ret;
 }
 static void free_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
 	u32 cq_entries = attr->cqe;
 	int ret;
+	if (attr->flags)
+		return -EOPNOTSUPP;
 	if (cq_entries < 1 || cq_entries > hr_dev->caps.max_cqes) {
-		ibdev_err(ibdev, "Failed to check CQ count %d max=%d\n",
+		ibdev_err(ibdev, "failed to check CQ count %u, max = %u.\n",
 			  cq_entries, hr_dev->caps.max_cqes);
 		return -EINVAL;
 	}
 	if (vector >= hr_dev->caps.num_comp_vectors) {
-		ibdev_err(ibdev, "Failed to check CQ vector=%d max=%d\n",
+		ibdev_err(ibdev, "failed to check CQ vector = %d, max = %d.\n",
 			  vector, hr_dev->caps.num_comp_vectors);
 		return -EINVAL;
 	}
 	if (udata) {
 		ret = ib_copy_from_udata(&ucmd, udata,
-					 min(sizeof(ucmd), udata->inlen));
+					 min(udata->inlen, sizeof(ucmd)));
 		if (ret) {
-			ibdev_err(ibdev, "Failed to copy CQ udata, err %d\n",
+			ibdev_err(ibdev, "failed to copy CQ udata, ret = %d.\n",
 				  ret);
 			return ret;
 		}
 	ret = alloc_cq_buf(hr_dev, hr_cq, udata, ucmd.buf_addr);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to alloc CQ buf, err %d\n", ret);
+		ibdev_err(ibdev, "failed to alloc CQ buf, ret = %d.\n", ret);
 		return ret;
 	}
 	ret = alloc_cq_db(hr_dev, hr_cq, udata, ucmd.db_addr, &resp);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to alloc CQ db, err %d\n", ret);
+		ibdev_err(ibdev, "failed to alloc CQ db, ret = %d.\n", ret);
 		goto err_cq_buf;
 	}
 	ret = alloc_cqc(hr_dev, hr_cq);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to alloc CQ context, err %d\n", ret);
+		ibdev_err(ibdev,
+			  "failed to alloc CQ context, ret = %d.\n", ret);
 		goto err_cq_db;
 	}
 	if (udata) {
 		resp.cqn = hr_cq->cqn;
-		ret = ib_copy_to_udata(udata, &resp, sizeof(resp));
+		ret = ib_copy_to_udata(udata, &resp,
+				       min(udata->outlen, sizeof(resp)));
 		if (ret)
 			goto err_cqc;
 	}

drivers/infiniband/hw/hns/hns_roce_db.c+4−4

@@ -95,8 +95,8 @@ static struct hns_roce_db_pgdir *hns_roce_alloc_db_pgdir( · 94 unmodified lines
95	static int hns_roce_alloc_db_from_pgdir(struct hns_roce_db_pgdir *pgdir,	95	static int hns_roce_alloc_db_from_pgdir(struct hns_roce_db_pgdir *pgdir,
96	struct hns_roce_db *db, int order)	96	struct hns_roce_db *db, int order)
97	{	97	{
98	int o;	98	unsigned long o;
99	int i;	99	unsigned long i;
100		100
101	for (o = order; o <= 1; ++o) {	101	for (o = order; o <= 1; ++o) {
102	i = find_first_bit(pgdir->bits[o], HNS_ROCE_DB_PER_PAGE >> o);	102	i = find_first_bit(pgdir->bits[o], HNS_ROCE_DB_PER_PAGE >> o);
@@ -154,8 +154,8 @@ out: · 51 unmodified lines
154		154
155	void hns_roce_free_db(struct hns_roce_dev hr_dev, struct hns_roce_db db)	155	void hns_roce_free_db(struct hns_roce_dev hr_dev, struct hns_roce_db db)
156	{	156	{
157	int o;	157	unsigned long o;
158	int i;	158	unsigned long i;
159		159
160	mutex_lock(&hr_dev->pgdir_mutex);	160	mutex_lock(&hr_dev->pgdir_mutex);
161		161

drivers/infiniband/hw/hns/hns_roce_device.h+92−86

 #define _HNS_ROCE_DEVICE_H
 #include <rdma/ib_verbs.h>
+#include <rdma/hns-abi.h>
 #define DRV_NAME "hns_roce"
 #define HNS_ROCE_IDX_QUE_ENTRY_SZ		4
 #define SRQ_DB_REG				0x230
+#define HNS_ROCE_QP_BANK_NUM 8
 /* The chip implementation of the consumer index is calculated
  * according to twice the actual EQ depth
  */
 	SERV_TYPE_UD,
 };
-enum {
-	HNS_ROCE_QP_CAP_RQ_RECORD_DB = BIT(0),
-	HNS_ROCE_QP_CAP_SQ_RECORD_DB = BIT(1),
-};
-enum hns_roce_cq_flags {
-	HNS_ROCE_CQ_FLAG_RECORD_DB = BIT(0),
-};
 enum hns_roce_qp_state {
 	HNS_ROCE_QP_STATE_RST,
 	HNS_ROCE_QP_STATE_INIT,
 	/* 0x10 and 0x11 is unused in currently application case */
 	HNS_ROCE_EVENT_TYPE_DB_OVERFLOW               = 0x12,
 	HNS_ROCE_EVENT_TYPE_MB                        = 0x13,
-	HNS_ROCE_EVENT_TYPE_CEQ_OVERFLOW              = 0x14,
 	HNS_ROCE_EVENT_TYPE_FLR			      = 0x15,
 };
 	HNS_ROCE_CAP_FLAG_FRMR                  = BIT(8),
 	HNS_ROCE_CAP_FLAG_QP_FLOW_CTRL		= BIT(9),
 	HNS_ROCE_CAP_FLAG_ATOMIC		= BIT(10),
+	HNS_ROCE_CAP_FLAG_SDI_MODE		= BIT(14),
+	HNS_ROCE_CAP_FLAG_STASH			= BIT(17),
 };
 #define HNS_ROCE_DB_TYPE_COUNT			2
 #define HNS_HW_PAGE_SHIFT			12
 #define HNS_HW_PAGE_SIZE			(1 << HNS_HW_PAGE_SHIFT)
-/* The minimum page count for hardware access page directly. */
-#define HNS_HW_DIRECT_PAGE_COUNT 2
 struct hns_roce_uar {
 	u64		pfn;
 	unsigned long	index;
 };
 struct hns_roce_buf_region {
-	int offset; /* page offset */
+	u32 offset; /* page offset */
 	u32 count; /* page count */
 	int hopnum; /* addressing hop num */
 };
 		size_t	size;  /* region size */
 		int	hopnum; /* multi-hop addressing hop num */
 	} region[HNS_ROCE_MAX_BT_REGION];
-	int region_count; /* valid region count */
+	unsigned int region_count; /* valid region count */
 	unsigned int page_shift;  /* buffer page shift */
 	bool fixed_page; /* decide page shift is fixed-size or maximum size */
-	int user_access; /* umem access flag */
+	unsigned int user_access; /* umem access flag */
 	bool mtt_only; /* only alloc buffer-required MTT memory */
 };
 	unsigned int	buf_pg_shift; /* buffer page shift */
 	unsigned int	buf_pg_count;  /* buffer page count */
 	struct hns_roce_buf_region region[HNS_ROCE_MAX_BT_REGION];
-	int		region_count;
+	unsigned int	region_count;
 };
 /* memory translate region */
 	u64		*wrid;     /* Work request ID */
 	spinlock_t	lock;
 	u32		wqe_cnt;  /* WQE num */
-	int		max_gs;
+	u32		max_gs;
 	int		offset;
 	int		wqe_shift;	/* WQE size */
 	u32		head;
 	dma_addr_t	map;
 };
+/*
+ * %HNS_ROCE_BUF_DIRECT indicates that the all memory must be in a continuous
+ * dma address range.
+ *
+ * %HNS_ROCE_BUF_NOSLEEP indicates that the caller cannot sleep.
+ *
+ * %HNS_ROCE_BUF_NOFAIL allocation only failed when allocated size is zero, even
+ * the allocated size is smaller than the required size.
+ */
+enum {
+	HNS_ROCE_BUF_DIRECT = BIT(0),
+	HNS_ROCE_BUF_NOSLEEP = BIT(1),
+	HNS_ROCE_BUF_NOFAIL = BIT(2),
+};
 struct hns_roce_buf {
-	struct hns_roce_buf_list	direct;
+	struct hns_roce_buf_list	*trunk_list;
-	struct hns_roce_buf_list	*page_list;
+	u32				ntrunks;
 	u32				npages;
-	u32				size;
+	unsigned int			trunk_shift;
 	unsigned int			page_shift;
 };
 	} u;
 	dma_addr_t	dma;
 	void		*virt_addr;
-	int		index;
+	unsigned long	index;
-	int		order;
+	unsigned long	order;
 };
 struct hns_roce_cq {
 	u64		       *wrid;
 	struct hns_roce_idx_que idx_que;
 	spinlock_t		lock;
-	int			head;
+	u16			head;
-	int			tail;
+	u16			tail;
 	struct mutex		mutex;
 	void (*event)(struct hns_roce_srq *srq, enum hns_roce_event event);
 };
 	struct hns_roce_bitmap bitmap;
 };
+struct hns_roce_bank {
+	struct ida ida;
+	u32 inuse; /* Number of IDs allocated */
+	u32 min; /* Lowest ID to allocate.  */
+	u32 max; /* Highest ID to allocate. */
+	u32 next; /* Next ID to allocate. */
+};
 struct hns_roce_qp_table {
-	struct hns_roce_bitmap		bitmap;
 	struct hns_roce_hem_table	qp_table;
 	struct hns_roce_hem_table	irrl_table;
 	struct hns_roce_hem_table	trrl_table;
 	struct hns_roce_hem_table	sccc_table;
 	struct mutex			scc_mutex;
+	struct hns_roce_bank bank[HNS_ROCE_QP_BANK_NUM];
+	spinlock_t bank_lock;
 };
 struct hns_roce_cq_table {
 	u8 dgid[HNS_ROCE_GID_SIZE];
 	u8 mac[ETH_ALEN];
 	u16 vlan_id;
-	bool vlan_en;
+	u8 vlan_en;
 };
 struct hns_roce_ah {
 struct hns_roce_work {
 	struct hns_roce_dev *hr_dev;
 	struct work_struct work;
-	u32 qpn;
-	u32 cqn;
 	int event_type;
 	int sub_type;
+	u32 queue_num;
 };
 struct hns_roce_qp {
 	__le32 asyn;
 	union {
 		struct {
-			__le32 qp;
+			__le32 num;
-			u32 rsv0;
-			u32 rsv1;
-		} qp_event;
-		struct {
-			__le32 srq;
-			u32 rsv0;
-			u32 rsv1;
-		} srq_event;
-		struct {
-			__le32 cq;
-			u32 rsv0;
-			u32 rsv1;
-		} cq_event;
-		struct {
-			__le32 ceqe;
 			u32 rsv0;
 			u32 rsv1;
-		} ce_event;
+		} queue_event;
 		struct {
 			__le64  out_param;
 	int				type_flag; /* Aeq:1 ceq:0 */
 	int				eqn;
 	u32				entries;
-	int				log_entries;
+	u32				log_entries;
 	int				eqe_size;
 	int				irq;
 	int				log_page_size;
-	int				cons_index;
+	u32				cons_index;
 	struct hns_roce_buf_list	*buf_list;
 	int				over_ignore;
 	int				coalesce;
 	int				hop_num;
 	struct hns_roce_mtr		mtr;
 	u16				eq_max_cnt;
-	int				eq_period;
+	u32				eq_period;
 	int				shift;
 	int				event_type;
 	int				sub_type;
 	u32		max_sq_inline;
 	u32		max_rq_sg;
 	u32		max_extend_sg;
-	int		num_qps;
+	u32		num_qps;
-	int             reserved_qps;
+	u32		reserved_qps;
 	int		num_qpc_timer;
 	int		num_cqc_timer;
 	int		num_srqs;
 	u32		max_srq_desc_sz;
 	int		max_qp_init_rdma;
 	int		max_qp_dest_rdma;
-	int		num_cqs;
+	u32		num_cqs;
 	u32		max_cqes;
 	u32		min_cqes;
 	u32		min_wqes;
 	int		num_aeq_vectors;
 	int		num_comp_vectors;
 	int		num_other_vectors;
-	int		num_mtpts;
+	u32		num_mtpts;
 	u32		num_mtt_segs;
 	u32		num_cqe_segs;
 	u32		num_srqwqe_segs;
 	u32		cqc_timer_bt_num;
 	u32		mpt_bt_num;
 	u32		sccc_bt_num;
+	u32		gmv_bt_num;
 	u32		qpc_ba_pg_sz;
 	u32		qpc_buf_pg_sz;
 	u32		qpc_hop_num;
 	u32		eqe_ba_pg_sz;
 	u32		eqe_buf_pg_sz;
 	u32		eqe_hop_num;
+	u32		gmv_entry_num;
+	u32		gmv_entry_sz;
+	u32		gmv_ba_pg_sz;
+	u32		gmv_buf_pg_sz;
+	u32		gmv_hop_num;
 	u32		sl_num;
 	u32		tsq_buf_pg_sz;
 	u32		tpq_buf_pg_sz;
 	int (*post_mbox)(struct hns_roce_dev *hr_dev, u64 in_param,
 			 u64 out_param, u32 in_modifier, u8 op_modifier, u16 op,
 			 u16 token, int event);
-	int (*chk_mbox)(struct hns_roce_dev *hr_dev, unsigned long timeout);
+	int (*chk_mbox)(struct hns_roce_dev *hr_dev, unsigned int timeout);
 	int (*rst_prc_mbox)(struct hns_roce_dev *hr_dev);
 	int (*set_gid)(struct hns_roce_dev *hr_dev, u8 port, int gid_index,
 		       const union ib_gid *gid, const struct ib_gid_attr *attr);
 	struct hns_roce_eq_table  eq_table;
 	struct hns_roce_hem_table  qpc_timer_table;
 	struct hns_roce_hem_table  cqc_timer_table;
+	/* GMV is the memory area that the driver allocates for the hardware
+	 * to store SGID, SMAC and VLAN information.
+	 */
+	struct hns_roce_hem_table  gmv_table;
 	int			cmd_mod;
 	int			loop_idc;
 	return xa_load(&hr_dev->qp_table_xa, qpn & (hr_dev->caps.num_qps - 1));
 }
-static inline bool hns_roce_buf_is_direct(struct hns_roce_buf *buf)
+static inline void *hns_roce_buf_offset(struct hns_roce_buf *buf,
+					unsigned int offset)
 {
-	if (buf->page_list)
+	return (char *)(buf->trunk_list[offset >> buf->trunk_shift].buf) +
-		return false;
+			(offset & ((1 << buf->trunk_shift) - 1));
-	return true;
 }
-static inline void *hns_roce_buf_offset(struct hns_roce_buf *buf, int offset)
+static inline dma_addr_t hns_roce_buf_page(struct hns_roce_buf *buf, u32 idx)
 {
-	if (hns_roce_buf_is_direct(buf))
+	unsigned int offset = idx << buf->page_shift;
-		return (char *)(buf->direct.buf) + (offset & (buf->size - 1));
-	return (char *)(buf->page_list[offset >> buf->page_shift].buf) +
-	       (offset & ((1 << buf->page_shift) - 1));
-}
-static inline dma_addr_t hns_roce_buf_page(struct hns_roce_buf *buf, int idx)
+	return buf->trunk_list[offset >> buf->trunk_shift].map +
-{
+			(offset & ((1 << buf->trunk_shift) - 1));
-	if (hns_roce_buf_is_direct(buf))
-		return buf->direct.map + ((dma_addr_t)idx << buf->page_shift);
-	else
-		return buf->page_list[idx].map;
 }
 #define hr_hw_page_align(x)		ALIGN(x, 1 << HNS_HW_PAGE_SHIFT)
 	return ilog2(to_hr_hem_entries_count(count, buf_shift));
 }
+#define DSCP_SHIFT 2
+static inline u8 get_tclass(const struct ib_global_route *grh)
+{
+	return grh->sgid_attr->gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP ?
+	       grh->traffic_class >> DSCP_SHIFT : grh->traffic_class;
+}
 int hns_roce_init_uar_table(struct hns_roce_dev *dev);
 int hns_roce_uar_alloc(struct hns_roce_dev *dev, struct hns_roce_uar *uar);
 void hns_roce_uar_free(struct hns_roce_dev *dev, struct hns_roce_uar *uar);
 void hns_roce_mtr_destroy(struct hns_roce_dev *hr_dev,
 			  struct hns_roce_mtr *mtr);
 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
-		     dma_addr_t *pages, int page_cnt);
+		     dma_addr_t *pages, unsigned int page_cnt);
 int hns_roce_init_pd_table(struct hns_roce_dev *hr_dev);
 int hns_roce_init_mr_table(struct hns_roce_dev *hr_dev);
 struct ib_mr *hns_roce_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
 				   u64 virt_addr, int access_flags,
 				   struct ib_udata *udata);
-int hns_roce_rereg_user_mr(struct ib_mr *mr, int flags, u64 start, u64 length,
+struct ib_mr *hns_roce_rereg_user_mr(struct ib_mr *mr, int flags, u64 start,
-			   u64 virt_addr, int mr_access_flags, struct ib_pd *pd,
+				     u64 length, u64 virt_addr,
-			   struct ib_udata *udata);
+				     int mr_access_flags, struct ib_pd *pd,
+				     struct ib_udata *udata);
 struct ib_mr *hns_roce_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
 				u32 max_num_sg);
 int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
 int hns_roce_dealloc_mw(struct ib_mw *ibmw);
 void hns_roce_buf_free(struct hns_roce_dev *hr_dev, struct hns_roce_buf *buf);
-int hns_roce_buf_alloc(struct hns_roce_dev *hr_dev, u32 size, u32 max_direct,
+struct hns_roce_buf *hns_roce_buf_alloc(struct hns_roce_dev *hr_dev, u32 size,
-		       struct hns_roce_buf *buf, u32 page_shift);
+					u32 page_shift, u32 flags);
 int hns_roce_get_kmem_bufs(struct hns_roce_dev *hr_dev, dma_addr_t *bufs,
 			   int buf_cnt, int start, struct hns_roce_buf *buf);
 int hns_roce_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
 		       int attr_mask, struct ib_udata *udata);
 void init_flush_work(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp);
-void *hns_roce_get_recv_wqe(struct hns_roce_qp *hr_qp, int n);
+void *hns_roce_get_recv_wqe(struct hns_roce_qp *hr_qp, unsigned int n);
-void *hns_roce_get_send_wqe(struct hns_roce_qp *hr_qp, int n);
+void *hns_roce_get_send_wqe(struct hns_roce_qp *hr_qp, unsigned int n);
-void *hns_roce_get_extend_sge(struct hns_roce_qp *hr_qp, int n);
+void *hns_roce_get_extend_sge(struct hns_roce_qp *hr_qp, unsigned int n);
-bool hns_roce_wq_overflow(struct hns_roce_wq *hr_wq, int nreq,
+bool hns_roce_wq_overflow(struct hns_roce_wq *hr_wq, u32 nreq,
 			  struct ib_cq *ib_cq);
 enum hns_roce_qp_state to_hns_roce_state(enum ib_qp_state state);
 void hns_roce_lock_cqs(struct hns_roce_cq *send_cq,
 void hns_roce_cq_event(struct hns_roce_dev *hr_dev, u32 cqn, int event_type);
 void hns_roce_qp_event(struct hns_roce_dev *hr_dev, u32 qpn, int event_type);
 void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type);
-int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index);
+u8 hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index);
 void hns_roce_handle_device_err(struct hns_roce_dev *hr_dev);
 int hns_roce_init(struct hns_roce_dev *hr_dev);
 void hns_roce_exit(struct hns_roce_dev *hr_dev);

drivers/infiniband/hw/hns/hns_roce_hem.c+37−22

 	case HEM_TYPE_CQC_TIMER:
 		hop_num = hr_dev->caps.cqc_timer_hop_num;
 		break;
+	case HEM_TYPE_GMV:
+		hop_num = hr_dev->caps.gmv_hop_num;
+		break;
 	default:
 		return false;
 	}
 		mhop->ba_l0_num = hr_dev->caps.srqc_bt_num;
 		mhop->hop_num = hr_dev->caps.srqc_hop_num;
 		break;
+	case HEM_TYPE_GMV:
+		mhop->buf_chunk_size = 1 << (hr_dev->caps.gmv_buf_pg_sz +
+					     PAGE_SHIFT);
+		mhop->bt_chunk_size = 1 << (hr_dev->caps.gmv_ba_pg_sz +
+					    PAGE_SHIFT);
+		mhop->ba_l0_num = hr_dev->caps.gmv_bt_num;
+		mhop->hop_num = hr_dev->caps.gmv_hop_num;
+		break;
 	default:
-		dev_err(dev, "Table %d not support multi-hop addressing!\n",
+		dev_err(dev, "table %u not support multi-hop addressing!\n",
 			type);
 		return -EINVAL;
 	}
 {
 	struct device *dev = hr_dev->dev;
 	u32 chunk_ba_num;
+	u32 chunk_size;
 	u32 table_idx;
 	u32 bt_num;
-	u32 chunk_size;
 	if (get_hem_table_config(hr_dev, mhop, table->type))
 		return -EINVAL;
 		mhop->l0_idx = table_idx;
 		break;
 	default:
-		dev_err(dev, "Table %d not support hop_num = %d!\n",
+		dev_err(dev, "table %u not support hop_num = %u!\n",
-			     table->type, mhop->hop_num);
+			table->type, mhop->hop_num);
 		return -EINVAL;
 	}
 	if (mhop->l0_idx >= mhop->ba_l0_num)
 {
 	spinlock_t *lock = &hr_dev->bt_cmd_lock;
 	struct device *dev = hr_dev->dev;
-	long end;
-	unsigned long flags;
 	struct hns_roce_hem_iter iter;
 	void __iomem *bt_cmd;
 	__le32 bt_cmd_val[2];
 	__le32 bt_cmd_h = 0;
+	unsigned long flags;
 	__le32 bt_cmd_l;
-	u64 bt_ba;
 	int ret = 0;
+	u64 bt_ba;
+	long end;
 	/* Find the HEM(Hardware Entry Memory) entry */
 	unsigned long i = (obj & (table->num_obj - 1)) /
 		index->buf = l0_idx;
 		break;
 	default:
-		ibdev_err(ibdev, "Table %d not support mhop.hop_num = %d!\n",
+		ibdev_err(ibdev, "table %u not support mhop.hop_num = %u!\n",
 			  table->type, mhop->hop_num);
 		return -EINVAL;
 	}
 	if (unlikely(index->buf >= table->num_hem)) {
-		ibdev_err(ibdev, "Table %d exceed hem limt idx %llu,max %lu!\n",
+		ibdev_err(ibdev, "table %u exceed hem limt idx %llu, max %lu!\n",
 			  table->type, index->buf, table->num_hem);
 		return -EINVAL;
 	}
 		       struct hns_roce_hem_table *table, unsigned long obj)
 {
 	struct device *dev = hr_dev->dev;
-	int ret = 0;
 	unsigned long i;
+	int ret = 0;
 	if (hns_roce_check_whether_mhop(hr_dev, table->type))
 		return hns_roce_table_mhop_get(hr_dev, table, obj);
 			step_idx = hop_num;
 		if (hr_dev->hw->clear_hem(hr_dev, table, obj, step_idx))
-			ibdev_warn(ibdev, "Clear hop%d HEM failed.\n", hop_num);
+			ibdev_warn(ibdev, "failed to clear hop%u HEM.\n", hop_num);
 		if (index->inited & HEM_INDEX_L1)
 			if (hr_dev->hw->clear_hem(hr_dev, table, obj, 1))
-				ibdev_warn(ibdev, "Clear HEM step 1 failed.\n");
+				ibdev_warn(ibdev, "failed to clear HEM step 1.\n");
 		if (index->inited & HEM_INDEX_L0)
 			if (hr_dev->hw->clear_hem(hr_dev, table, obj, 0))
-				ibdev_warn(ibdev, "Clear HEM step 0 failed.\n");
+				ibdev_warn(ibdev, "failed to clear HEM step 0.\n");
 	}
 }
 	struct hns_roce_hem_chunk *chunk;
 	struct hns_roce_hem_mhop mhop;
 	struct hns_roce_hem *hem;
-	void *addr = NULL;
 	unsigned long mhop_obj = obj;
 	unsigned long obj_per_chunk;
 	unsigned long idx_offset;
 	int offset, dma_offset;
+	void *addr = NULL;
+	u32 hem_idx = 0;
 	int length;
 	int i, j;
-	u32 hem_idx = 0;
 	if (!table->lowmem)
 		return NULL;
 		unsigned long buf_chunk_size;
 		unsigned long bt_chunk_size;
 		unsigned long bt_chunk_num;
-		unsigned long num_bt_l0 = 0;
+		unsigned long num_bt_l0;
 		u32 hop_num;
 		if (get_hem_table_config(hr_dev, &mhop, type))
 {
 	struct hns_roce_hem_mhop mhop;
 	u32 buf_chunk_size;
-	int i;
 	u64 obj;
+	int i;
 	if (hns_roce_calc_hem_mhop(hr_dev, table, NULL, &mhop))
 		return;
 void hns_roce_cleanup_hem(struct hns_roce_dev *hr_dev)
 {
-	if (hr_dev->caps.srqc_entry_sz)
+	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ)
 		hns_roce_cleanup_hem_table(hr_dev,
 					   &hr_dev->srq_table.table);
 	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->cq_table.table);
 	if (hr_dev->caps.cqc_timer_entry_sz)
 		hns_roce_cleanup_hem_table(hr_dev,
 					   &hr_dev->cqc_timer_table);
-	if (hr_dev->caps.sccc_sz)
+	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_QP_FLOW_CTRL)
 		hns_roce_cleanup_hem_table(hr_dev,
 					   &hr_dev->qp_table.sccc_table);
 	if (hr_dev->caps.trrl_entry_sz)
 		hns_roce_cleanup_hem_table(hr_dev,
 					   &hr_dev->qp_table.trrl_table);
+	if (hr_dev->caps.gmv_entry_sz)
+		hns_roce_cleanup_hem_table(hr_dev, &hr_dev->gmv_table);
 	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
 	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
 	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
 	}
 	if (offset < r->offset) {
-		dev_err(hr_dev->dev, "invalid offset %d,min %d!\n",
+		dev_err(hr_dev->dev, "invalid offset %d, min %u!\n",
 			offset, r->offset);
 		return -EINVAL;
 	}
 				  const struct hns_roce_buf_region *regions,
 				  int region_cnt)
 {
-	struct roce_hem_item *hem, *temp_hem, *root_hem;
 	struct list_head temp_list[HNS_ROCE_MAX_BT_REGION];
+	struct roce_hem_item *hem, *temp_hem, *root_hem;
 	const struct hns_roce_buf_region *r;
 	struct list_head temp_root;
 	struct list_head temp_btm;
 {
 	const struct hns_roce_buf_region *r;
 	int ofs, end;
-	int ret;
 	int unit;
+	int ret;
 	int i;
 	if (region_cnt > HNS_ROCE_MAX_BT_REGION) {

drivers/infiniband/hw/hns/hns_roce_hem.h+2−1

 	HEM_TYPE_SCCC,
 	HEM_TYPE_QPC_TIMER,
 	HEM_TYPE_CQC_TIMER,
+	HEM_TYPE_GMV,
 	 /* UNMAP HEM */
 	HEM_TYPE_MTT,
 	return sg_dma_address(&iter->chunk->mem[iter->page_idx]);
 }
-#endif /*_HNS_ROCE_HEM_H*/
+#endif /* _HNS_ROCE_HEM_H */

drivers/infiniband/hw/hns/hns_roce_hw_v1.c+18−32

 				break;
 			}
-			/*Ctrl field, ctrl set type: sig, solic, imm, fence */
+			/* Ctrl field, ctrl set type: sig, solic, imm, fence */
 			/* SO wait for conforming application scenarios */
 			ctrl->flag |= (wr->send_flags & IB_SEND_SIGNALED ?
 				      cpu_to_le32(HNS_ROCE_WQE_CQ_NOTIFY) : 0) |
 					ret = -EINVAL;
 					*bad_wr = wr;
 					dev_err(dev, "inline len(1-%d)=%d, illegal",
-						ctrl->msg_length,
+						le32_to_cpu(ctrl->msg_length),
 						hr_dev->caps.max_sq_inline);
 					goto out;
 				}
 				}
 				ctrl->flag |= cpu_to_le32(HNS_ROCE_WQE_INLINE);
 			} else {
-				/*sqe num is two */
+				/* sqe num is two */
 				for (i = 0; i < wr->num_sge; i++)
 					set_data_seg(dseg + i, wr->sg_list + i);
 	unsigned long flags = 0;
 	unsigned int wqe_idx;
 	int ret = 0;
-	int nreq = 0;
+	int nreq;
-	int i = 0;
+	int i;
 	u32 reg_val;
 	spin_lock_irqsave(&hr_qp->rq.lock, flags);
 	}
 	raq->e_raq_buf->map = addr;
-	/* Configure raq extended address. 48bit 4K align*/
+	/* Configure raq extended address. 48bit 4K align */
 	roce_write(hr_dev, ROCEE_EXT_RAQ_REG, raq->e_raq_buf->map >> 12);
 	/* Configure raq_shift */
 }
 static int hns_roce_v1_chk_mbox(struct hns_roce_dev *hr_dev,
-				unsigned long timeout)
+				unsigned int timeout)
 {
 	u8 __iomem *hcr = hr_dev->reg_base + ROCEE_MB1_REG;
 	unsigned long end;
 		       CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_S, 0);
 }
-static int hns_roce_v1_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)
-{
-	return -EOPNOTSUPP;
-}
 static int hns_roce_v1_req_notify_cq(struct ib_cq *ibcq,
 				     enum ib_cq_notify_flags flags)
 {
 	struct hns_roce_qp *cur_qp = NULL;
 	unsigned long flags;
 	int npolled;
-	int ret = 0;
+	int ret;
 	spin_lock_irqsave(&hr_cq->lock, flags);
 		roce_set_field(context->qpc_bytes_16,
 			       QP_CONTEXT_QPC_BYTES_16_QP_NUM_M,
 			       QP_CONTEXT_QPC_BYTES_16_QP_NUM_S, hr_qp->qpn);
 	} else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) {
 		roce_set_field(context->qpc_bytes_4,
 			       QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_M,
 				 enum ib_qp_state cur_state,
 				 enum ib_qp_state new_state)
 {
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_SMI)
 		return hns_roce_v1_m_sqp(ibqp, attr, attr_mask, cur_state,
 	return 0;
 }
-static void set_eq_cons_index_v1(struct hns_roce_eq *eq, int req_not)
+static void set_eq_cons_index_v1(struct hns_roce_eq *eq, u32 req_not)
 {
 	roce_raw_write((eq->cons_index & HNS_ROCE_V1_CONS_IDX_M) |
-		      (req_not << eq->log_entries), eq->doorbell);
+		       (req_not << eq->log_entries), eq->doorbell);
 }
 static void hns_roce_v1_wq_catas_err_handle(struct hns_roce_dev *hr_dev,
 	int phy_port;
 	int qpn;
-	qpn = roce_get_field(aeqe->event.qp_event.qp,
+	qpn = roce_get_field(aeqe->event.queue_event.num,
 			     HNS_ROCE_AEQE_EVENT_QP_EVENT_QP_QPN_M,
 			     HNS_ROCE_AEQE_EVENT_QP_EVENT_QP_QPN_S);
-	phy_port = roce_get_field(aeqe->event.qp_event.qp,
+	phy_port = roce_get_field(aeqe->event.queue_event.num,
 				  HNS_ROCE_AEQE_EVENT_QP_EVENT_PORT_NUM_M,
 				  HNS_ROCE_AEQE_EVENT_QP_EVENT_PORT_NUM_S);
 	if (qpn <= 1)
 	struct device *dev = &hr_dev->pdev->dev;
 	u32 cqn;
-	cqn = roce_get_field(aeqe->event.cq_event.cq,
+	cqn = roce_get_field(aeqe->event.queue_event.num,
-			  HNS_ROCE_AEQE_EVENT_CQ_EVENT_CQ_CQN_M,
+			     HNS_ROCE_AEQE_EVENT_CQ_EVENT_CQ_CQN_M,
-			  HNS_ROCE_AEQE_EVENT_CQ_EVENT_CQ_CQN_S);
+			     HNS_ROCE_AEQE_EVENT_CQ_EVENT_CQ_CQN_S);
 	switch (event_type) {
 	case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR:
 	int event_type;
 	while ((aeqe = next_aeqe_sw_v1(eq))) {
 		/* Make sure we read the AEQ entry after we have checked the
 		 * ownership bit
 		 */
 		case HNS_ROCE_EVENT_TYPE_DB_OVERFLOW:
 			hns_roce_v1_db_overflow_handle(hr_dev, aeqe);
 			break;
-		case HNS_ROCE_EVENT_TYPE_CEQ_OVERFLOW:
-			dev_warn(dev, "CEQ 0x%lx overflow.\n",
-			roce_get_field(aeqe->event.ce_event.ceqe,
-				     HNS_ROCE_AEQE_EVENT_CE_EVENT_CEQE_CEQN_M,
-				     HNS_ROCE_AEQE_EVENT_CE_EVENT_CEQE_CEQN_S));
-			break;
 		default:
 			dev_warn(dev, "Unhandled event %d on EQ %d at idx %u.\n",
 				 event_type, eq->eqn, eq->cons_index);
 	u32 cqn;
 	while ((ceqe = next_ceqe_sw_v1(eq))) {
 		/* Make sure we read CEQ entry after we have checked the
 		 * ownership bit
 		 */
 	void __iomem *eqc = hr_dev->eq_table.eqc_base[eq->eqn];
 	struct device *dev = &hr_dev->pdev->dev;
 	dma_addr_t tmp_dma_addr;
-	u32 eqcuridx_val = 0;
+	u32 eqcuridx_val;
 	u32 eqconsindx_val;
 	u32 eqshift_val;
 	__le32 tmp2 = 0;
 static const struct ib_device_ops hns_roce_v1_dev_ops = {
 	.destroy_qp = hns_roce_v1_destroy_qp,
-	.modify_cq = hns_roce_v1_modify_cq,
 	.poll_cq = hns_roce_v1_poll_cq,
 	.post_recv = hns_roce_v1_post_recv,
 	.post_send = hns_roce_v1_post_send,
 	.set_mtu = hns_roce_v1_set_mtu,
 	.write_mtpt = hns_roce_v1_write_mtpt,
 	.write_cqc = hns_roce_v1_write_cqc,
-	.modify_cq = hns_roce_v1_modify_cq,
 	.clear_hem = hns_roce_v1_clear_hem,
 	.modify_qp = hns_roce_v1_modify_qp,
 	.query_qp = hns_roce_v1_query_qp,

drivers/infiniband/hw/hns/hns_roce_hw_v1.h+1−1

@@ -419,7 +419,7 @@ struct hns_roce_wqe_data_seg { · 418 unmodified lines
419		419
420	struct hns_roce_wqe_raddr_seg {	420	struct hns_roce_wqe_raddr_seg {
421	__le32 rkey;	421	__le32 rkey;
422	__le32 len;/* reserved */	422	__le32 len; /* reserved */
423	__le64 raddr;	423	__le64 raddr;
424	};	424	};
425		425

drivers/infiniband/hw/hns/hns_roce_hw_v2.c+313−241

@@ -214,25 +214,20 @@ static int fill_ext_sge_inl_data(struct hns_roce_qp *qp, · 213 unmodified lines
214	return 0;	214	return 0;
215	}	215	}
216		216
217	static void set_extend_sge(struct hns_roce_qp qp, const struct ib_send_wr wr,	217	static void set_extend_sge(struct hns_roce_qp qp, struct ib_sge sge,
218	unsigned int *sge_ind, unsigned int valid_num_sge)	218	unsigned int *sge_ind, unsigned int cnt)
219	{	219	{
220	struct hns_roce_v2_wqe_data_seg *dseg;	220	struct hns_roce_v2_wqe_data_seg *dseg;
221	unsigned int cnt = valid_num_sge;
222	struct ib_sge *sge = wr->sg_list;
223	unsigned int idx = *sge_ind;	221	unsigned int idx = *sge_ind;
224		222
225	if (qp->ibqp.qp_type == IB_QPT_RC \|\| qp->ibqp.qp_type == IB_QPT_UC) {
226	cnt -= HNS_ROCE_SGE_IN_WQE;
227	sge += HNS_ROCE_SGE_IN_WQE;
228	}
229
230	while (cnt > 0) {	223	while (cnt > 0) {
231	dseg = hns_roce_get_extend_sge(qp, idx & (qp->sge.sge_cnt - 1));	224	dseg = hns_roce_get_extend_sge(qp, idx & (qp->sge.sge_cnt - 1));
232	set_data_seg_v2(dseg, sge);	225	if (likely(sge->length)) {
233	idx++;	226	set_data_seg_v2(dseg, sge);
		227	idx++;
		228	cnt--;
		229	}
234	sge++;	230	sge++;
235	cnt--;
236	}	231	}
237		232
238	*sge_ind = idx;	233	*sge_ind = idx;
@@ -340,7 +335,8 @@ static int set_rwqe_data_seg(struct ib_qp ibqp, const struct ib_send_wr wr, · 101 unmodified lines
340	}	335	}
341	}	336	}
342		337
343	set_extend_sge(qp, wr, sge_ind, valid_num_sge);	338	set_extend_sge(qp, wr->sg_list + i, sge_ind,
		339	valid_num_sge - HNS_ROCE_SGE_IN_WQE);
344	}	340	}
345		341
346	roce_set_field(rc_sq_wqe->byte_16,	342	roce_set_field(rc_sq_wqe->byte_16,
@@ -365,7 +361,7 @@ static int check_send_valid(struct hns_roce_dev *hr_dev, · 18 unmodified lines
365	} else if (unlikely(hr_qp->state == IB_QPS_RESET \|\|	361	} else if (unlikely(hr_qp->state == IB_QPS_RESET \|\|
366	hr_qp->state == IB_QPS_INIT \|\|	362	hr_qp->state == IB_QPS_INIT \|\|
367	hr_qp->state == IB_QPS_RTR)) {	363	hr_qp->state == IB_QPS_RTR)) {
368	ibdev_err(ibdev, "failed to post WQE, QP state %d!\n",	364	ibdev_err(ibdev, "failed to post WQE, QP state %hhu!\n",
369	hr_qp->state);	365	hr_qp->state);
370	return -EINVAL;	366	return -EINVAL;
371	} else if (unlikely(hr_dev->state >= HNS_ROCE_DEVICE_STATE_RST_DOWN)) {	367	} else if (unlikely(hr_dev->state >= HNS_ROCE_DEVICE_STATE_RST_DOWN)) {
@@ -422,19 +418,54 @@ static int set_ud_opcode(struct hns_roce_v2_ud_send_wqe *ud_sq_wqe, · 50 unmodified lines
422	return 0;	418	return 0;
423	}	419	}
424		420
		421	static int fill_ud_av(struct hns_roce_v2_ud_send_wqe *ud_sq_wqe,
		422	struct hns_roce_ah *ah)
		423	{
		424	struct ib_device *ib_dev = ah->ibah.device;
		425	struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
		426
		427	roce_set_field(ud_sq_wqe->byte_24, V2_UD_SEND_WQE_BYTE_24_UDPSPN_M,
		428	V2_UD_SEND_WQE_BYTE_24_UDPSPN_S, ah->av.udp_sport);
		429
		430	roce_set_field(ud_sq_wqe->byte_36, V2_UD_SEND_WQE_BYTE_36_HOPLIMIT_M,
		431	V2_UD_SEND_WQE_BYTE_36_HOPLIMIT_S, ah->av.hop_limit);
		432	roce_set_field(ud_sq_wqe->byte_36, V2_UD_SEND_WQE_BYTE_36_TCLASS_M,
		433	V2_UD_SEND_WQE_BYTE_36_TCLASS_S, ah->av.tclass);
		434	roce_set_field(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_FLOW_LABEL_M,
		435	V2_UD_SEND_WQE_BYTE_40_FLOW_LABEL_S, ah->av.flowlabel);
		436
		437	if (WARN_ON(ah->av.sl > MAX_SERVICE_LEVEL))
		438	return -EINVAL;
		439
		440	roce_set_field(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_SL_M,
		441	V2_UD_SEND_WQE_BYTE_40_SL_S, ah->av.sl);
		442
		443	ud_sq_wqe->sgid_index = ah->av.gid_index;
		444
		445	memcpy(ud_sq_wqe->dmac, ah->av.mac, ETH_ALEN);
		446	memcpy(ud_sq_wqe->dgid, ah->av.dgid, GID_LEN_V2);
		447
		448	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)
		449	return 0;
		450
		451	roce_set_bit(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_UD_VLAN_EN_S,
		452	ah->av.vlan_en);
		453	roce_set_field(ud_sq_wqe->byte_36, V2_UD_SEND_WQE_BYTE_36_VLAN_M,
		454	V2_UD_SEND_WQE_BYTE_36_VLAN_S, ah->av.vlan_id);
		455
		456	return 0;
		457	}
		458
425	static inline int set_ud_wqe(struct hns_roce_qp *qp,	459	static inline int set_ud_wqe(struct hns_roce_qp *qp,
426	const struct ib_send_wr *wr,	460	const struct ib_send_wr *wr,
427	void wqe, unsigned int sge_idx,	461	void wqe, unsigned int sge_idx,
428	unsigned int owner_bit)	462	unsigned int owner_bit)
429	{	463	{
430	struct hns_roce_dev *hr_dev = to_hr_dev(qp->ibqp.device);
431	struct hns_roce_ah *ah = to_hr_ah(ud_wr(wr)->ah);	464	struct hns_roce_ah *ah = to_hr_ah(ud_wr(wr)->ah);
432	struct hns_roce_v2_ud_send_wqe *ud_sq_wqe = wqe;	465	struct hns_roce_v2_ud_send_wqe *ud_sq_wqe = wqe;
433	unsigned int curr_idx = *sge_idx;	466	unsigned int curr_idx = *sge_idx;
434	int valid_num_sge;	467	unsigned int valid_num_sge;
435	u32 msg_len = 0;	468	u32 msg_len = 0;
436	bool loopback;
437	u8 *smac;
438	int ret;	469	int ret;
439		470
440	valid_num_sge = calc_wr_sge_num(wr, &msg_len);	471	valid_num_sge = calc_wr_sge_num(wr, &msg_len);
@@ -444,38 +475,13 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp, · 3 unmodified lines
444	if (WARN_ON(ret))	475	if (WARN_ON(ret))
445	return ret;	476	return ret;
446		477
447	roce_set_field(ud_sq_wqe->dmac, V2_UD_SEND_WQE_DMAC_0_M,
448	V2_UD_SEND_WQE_DMAC_0_S, ah->av.mac[0]);
449	roce_set_field(ud_sq_wqe->dmac, V2_UD_SEND_WQE_DMAC_1_M,
450	V2_UD_SEND_WQE_DMAC_1_S, ah->av.mac[1]);
451	roce_set_field(ud_sq_wqe->dmac, V2_UD_SEND_WQE_DMAC_2_M,
452	V2_UD_SEND_WQE_DMAC_2_S, ah->av.mac[2]);
453	roce_set_field(ud_sq_wqe->dmac, V2_UD_SEND_WQE_DMAC_3_M,
454	V2_UD_SEND_WQE_DMAC_3_S, ah->av.mac[3]);
455	roce_set_field(ud_sq_wqe->byte_48, V2_UD_SEND_WQE_BYTE_48_DMAC_4_M,
456	V2_UD_SEND_WQE_BYTE_48_DMAC_4_S, ah->av.mac[4]);
457	roce_set_field(ud_sq_wqe->byte_48, V2_UD_SEND_WQE_BYTE_48_DMAC_5_M,
458	V2_UD_SEND_WQE_BYTE_48_DMAC_5_S, ah->av.mac[5]);
459
460	/* MAC loopback */
461	smac = (u8 *)hr_dev->dev_addr[qp->port];
462	loopback = ether_addr_equal_unaligned(ah->av.mac, smac) ? 1 : 0;
463
464	roce_set_bit(ud_sq_wqe->byte_40,
465	V2_UD_SEND_WQE_BYTE_40_LBI_S, loopback);
466
467	ud_sq_wqe->msg_len = cpu_to_le32(msg_len);	478	ud_sq_wqe->msg_len = cpu_to_le32(msg_len);
468		479
469	/* Set sig attr */
470	roce_set_bit(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_CQE_S,	480	roce_set_bit(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_CQE_S,
471	(wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);	481	!!(wr->send_flags & IB_SEND_SIGNALED));
472		482
473	/* Set se attr */
474	roce_set_bit(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_SE_S,	483	roce_set_bit(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_SE_S,
475	(wr->send_flags & IB_SEND_SOLICITED) ? 1 : 0);	484	!!(wr->send_flags & IB_SEND_SOLICITED));
476
477	roce_set_bit(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_OWNER_S,
478	owner_bit);
479		485
480	roce_set_field(ud_sq_wqe->byte_16, V2_UD_SEND_WQE_BYTE_16_PD_M,	486	roce_set_field(ud_sq_wqe->byte_16, V2_UD_SEND_WQE_BYTE_16_PD_M,
481	V2_UD_SEND_WQE_BYTE_16_PD_S, to_hr_pd(qp->ibqp.pd)->pdn);	487	V2_UD_SEND_WQE_BYTE_16_PD_S, to_hr_pd(qp->ibqp.pd)->pdn);
@@ -488,36 +494,29 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp, · 6 unmodified lines
488	V2_UD_SEND_WQE_BYTE_20_MSG_START_SGE_IDX_S,	494	V2_UD_SEND_WQE_BYTE_20_MSG_START_SGE_IDX_S,
489	curr_idx & (qp->sge.sge_cnt - 1));	495	curr_idx & (qp->sge.sge_cnt - 1));
490		496
491	roce_set_field(ud_sq_wqe->byte_24, V2_UD_SEND_WQE_BYTE_24_UDPSPN_M,
492	V2_UD_SEND_WQE_BYTE_24_UDPSPN_S, ah->av.udp_sport);
493	ud_sq_wqe->qkey = cpu_to_le32(ud_wr(wr)->remote_qkey & 0x80000000 ?	497	ud_sq_wqe->qkey = cpu_to_le32(ud_wr(wr)->remote_qkey & 0x80000000 ?
494	qp->qkey : ud_wr(wr)->remote_qkey);	498	qp->qkey : ud_wr(wr)->remote_qkey);
495	roce_set_field(ud_sq_wqe->byte_32, V2_UD_SEND_WQE_BYTE_32_DQPN_M,	499	roce_set_field(ud_sq_wqe->byte_32, V2_UD_SEND_WQE_BYTE_32_DQPN_M,
496	V2_UD_SEND_WQE_BYTE_32_DQPN_S, ud_wr(wr)->remote_qpn);	500	V2_UD_SEND_WQE_BYTE_32_DQPN_S, ud_wr(wr)->remote_qpn);
497		501
498	roce_set_field(ud_sq_wqe->byte_36, V2_UD_SEND_WQE_BYTE_36_VLAN_M,	502	ret = fill_ud_av(ud_sq_wqe, ah);
499	V2_UD_SEND_WQE_BYTE_36_VLAN_S, ah->av.vlan_id);	503	if (ret)
500	roce_set_field(ud_sq_wqe->byte_36, V2_UD_SEND_WQE_BYTE_36_HOPLIMIT_M,	504	return ret;
501	V2_UD_SEND_WQE_BYTE_36_HOPLIMIT_S, ah->av.hop_limit);
502	roce_set_field(ud_sq_wqe->byte_36, V2_UD_SEND_WQE_BYTE_36_TCLASS_M,
503	V2_UD_SEND_WQE_BYTE_36_TCLASS_S, ah->av.tclass);
504	roce_set_field(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_FLOW_LABEL_M,
505	V2_UD_SEND_WQE_BYTE_40_FLOW_LABEL_S, ah->av.flowlabel);
506	roce_set_field(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_SL_M,
507	V2_UD_SEND_WQE_BYTE_40_SL_S, ah->av.sl);
508	roce_set_field(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_PORTN_M,
509	V2_UD_SEND_WQE_BYTE_40_PORTN_S, qp->port);
510
511	roce_set_bit(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_UD_VLAN_EN_S,
512	ah->av.vlan_en ? 1 : 0);
513	roce_set_field(ud_sq_wqe->byte_48, V2_UD_SEND_WQE_BYTE_48_SGID_INDX_M,
514	V2_UD_SEND_WQE_BYTE_48_SGID_INDX_S, ah->av.gid_index);
515		505
516	memcpy(&ud_sq_wqe->dgid[0], &ah->av.dgid[0], GID_LEN_V2);	506	set_extend_sge(qp, wr->sg_list, &curr_idx, valid_num_sge);
517		507
518	set_extend_sge(qp, wr, &curr_idx, valid_num_sge);	508	/*
		509	* The pipeline can sequentially post all valid WQEs into WQ buffer,
		510	* including new WQEs waiting for the doorbell to update the PI again.
		511	* Therefore, the owner bit of WQE MUST be updated after all fields
		512	* and extSGEs have been written into DDR instead of cache.
		513	*/
		514	if (qp->en_flags & HNS_ROCE_QP_CAP_OWNER_DB)
		515	dma_wmb();
519		516
520	*sge_idx = curr_idx;	517	*sge_idx = curr_idx;
		518	roce_set_bit(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_OWNER_S,
		519	owner_bit);
521		520
522	return 0;	521	return 0;
523	}	522	}
@@ -591,9 +590,6 @@ static inline int set_rc_wqe(struct hns_roce_qp *qp, · 67 unmodified lines
591	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_CQE_S,	590	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_CQE_S,
592	(wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);	591	(wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
593		592
594	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OWNER_S,
595	owner_bit);
596
597	if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP \|\|	593	if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP \|\|
598	wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD)	594	wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
599	set_atomic_seg(wr, rc_sq_wqe, valid_num_sge);	595	set_atomic_seg(wr, rc_sq_wqe, valid_num_sge);
@@ -601,7 +597,18 @@ static inline int set_rc_wqe(struct hns_roce_qp *qp, · 1 unmodified line
601	ret = set_rwqe_data_seg(&qp->ibqp, wr, rc_sq_wqe,	597	ret = set_rwqe_data_seg(&qp->ibqp, wr, rc_sq_wqe,
602	&curr_idx, valid_num_sge);	598	&curr_idx, valid_num_sge);
603		599
		600	/*
		601	* The pipeline can sequentially post all valid WQEs into WQ buffer,
		602	* including new WQEs waiting for the doorbell to update the PI again.
		603	* Therefore, the owner bit of WQE MUST be updated after all fields
		604	* and extSGEs have been written into DDR instead of cache.
		605	*/
		606	if (qp->en_flags & HNS_ROCE_QP_CAP_OWNER_DB)
		607	dma_wmb();
		608
604	*sge_idx = curr_idx;	609	*sge_idx = curr_idx;
		610	roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OWNER_S,
		611	owner_bit);
605		612
606	return ret;	613	return ret;
607	}	614	}
@@ -649,7 +656,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, · 41 unmodified lines
649	unsigned int sge_idx;	656	unsigned int sge_idx;
650	unsigned int wqe_idx;	657	unsigned int wqe_idx;
651	void *wqe = NULL;	658	void *wqe = NULL;
652	int nreq;	659	u32 nreq;
653	int ret;	660	int ret;
654		661
655	spin_lock_irqsave(&qp->sq.lock, flags);	662	spin_lock_irqsave(&qp->sq.lock, flags);
@@ -673,7 +680,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, · 17 unmodified lines
673	wqe_idx = (qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1);	680	wqe_idx = (qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1);
674		681
675	if (unlikely(wr->num_sge > qp->sq.max_gs)) {	682	if (unlikely(wr->num_sge > qp->sq.max_gs)) {
676	ibdev_err(ibdev, "num_sge=%d > qp->sq.max_gs=%d\n",	683	ibdev_err(ibdev, "num_sge = %d > qp->sq.max_gs = %u.\n",
677	wr->num_sge, qp->sq.max_gs);	684	wr->num_sge, qp->sq.max_gs);
678	ret = -EINVAL;	685	ret = -EINVAL;
679	*bad_wr = wr;	686	*bad_wr = wr;
@@ -686,7 +693,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, · 6 unmodified lines
686	~(((qp->sq.head + nreq) >> ilog2(qp->sq.wqe_cnt)) & 0x1);	693	~(((qp->sq.head + nreq) >> ilog2(qp->sq.wqe_cnt)) & 0x1);
687		694
688	/* Corresponding to the QP type, wqe process separately */	695	/* Corresponding to the QP type, wqe process separately */
689	if (ibqp->qp_type == IB_QPT_GSI)	696	if (ibqp->qp_type == IB_QPT_GSI \|\| ibqp->qp_type == IB_QPT_UD)
690	ret = set_ud_wqe(qp, wr, wqe, &sge_idx, owner_bit);	697	ret = set_ud_wqe(qp, wr, wqe, &sge_idx, owner_bit);
691	else if (ibqp->qp_type == IB_QPT_RC)	698	else if (ibqp->qp_type == IB_QPT_RC)
692	ret = set_rc_wqe(qp, wr, wqe, &sge_idx, owner_bit);	699	ret = set_rc_wqe(qp, wr, wqe, &sge_idx, owner_bit);
@@ -758,7 +765,7 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp, · 65 unmodified lines
758	wqe_idx = (hr_qp->rq.head + nreq) & (hr_qp->rq.wqe_cnt - 1);	765	wqe_idx = (hr_qp->rq.head + nreq) & (hr_qp->rq.wqe_cnt - 1);
759		766
760	if (unlikely(wr->num_sge > hr_qp->rq.max_gs)) {	767	if (unlikely(wr->num_sge > hr_qp->rq.max_gs)) {
761	ibdev_err(ibdev, "rq:num_sge=%d >= qp->sq.max_gs=%d\n",	768	ibdev_err(ibdev, "num_sge = %d >= max_sge = %u.\n",
762	wr->num_sge, hr_qp->rq.max_gs);	769	wr->num_sge, hr_qp->rq.max_gs);
763	ret = -EINVAL;	770	ret = -EINVAL;
764	*bad_wr = wr;	771	*bad_wr = wr;
@@ -827,7 +834,7 @@ static void get_srq_wqe(struct hns_roce_srq srq, int n) · 62 unmodified lines
827	return hns_roce_buf_offset(srq->buf_mtr.kmem, n << srq->wqe_shift);	834	return hns_roce_buf_offset(srq->buf_mtr.kmem, n << srq->wqe_shift);
828	}	835	}
829		836
830	static void get_idx_buf(struct hns_roce_idx_que idx_que, int n)	837	static void get_idx_buf(struct hns_roce_idx_que idx_que, unsigned int n)
831	{	838	{
832	return hns_roce_buf_offset(idx_que->mtr.kmem,	839	return hns_roce_buf_offset(idx_que->mtr.kmem,
833	n << idx_que->entry_shift);	840	n << idx_que->entry_shift);
@@ -868,12 +875,12 @@ static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq, · 34 unmodified lines
868	struct hns_roce_v2_wqe_data_seg *dseg;	875	struct hns_roce_v2_wqe_data_seg *dseg;
869	struct hns_roce_v2_db srq_db;	876	struct hns_roce_v2_db srq_db;
870	unsigned long flags;	877	unsigned long flags;
		878	unsigned int ind;
871	__le32 *srq_idx;	879	__le32 *srq_idx;
872	int ret = 0;	880	int ret = 0;
873	int wqe_idx;	881	int wqe_idx;
874	void *wqe;	882	void *wqe;
875	int nreq;	883	int nreq;
876	int ind;
877	int i;	884	int i;
878		885
879	spin_lock_irqsave(&srq->lock, flags);	886	spin_lock_irqsave(&srq->lock, flags);
@@ -1018,8 +1025,8 @@ static int hns_roce_v2_rst_process_cmd(struct hns_roce_dev *hr_dev) · 138 unmodified lines
1018	struct hns_roce_v2_priv *priv = hr_dev->priv;	1025	struct hns_roce_v2_priv *priv = hr_dev->priv;
1019	struct hnae3_handle *handle = priv->handle;	1026	struct hnae3_handle *handle = priv->handle;
1020	const struct hnae3_ae_ops *ops = handle->ae_algo->ops;	1027	const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
1021	unsigned long instance_stage; /* the current instance stage */	1028	unsigned long instance_stage; /* the current instance stage */
1022	unsigned long reset_stage; /* the current reset stage */	1029	unsigned long reset_stage; /* the current reset stage */
1023	unsigned long reset_cnt;	1030	unsigned long reset_cnt;
1024	bool sw_resetting;	1031	bool sw_resetting;
1025	bool hw_resetting;	1032	bool hw_resetting;
@@ -1118,7 +1125,7 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type) · 92 unmodified lines
1118	roce_write(hr_dev, ROCEE_TX_CMQ_BASEADDR_H_REG,	1125	roce_write(hr_dev, ROCEE_TX_CMQ_BASEADDR_H_REG,
1119	upper_32_bits(dma));	1126	upper_32_bits(dma));
1120	roce_write(hr_dev, ROCEE_TX_CMQ_DEPTH_REG,	1127	roce_write(hr_dev, ROCEE_TX_CMQ_DEPTH_REG,
1121	ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);	1128	(u32)ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);
1122	roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0);	1129	roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0);
1123	roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0);	1130	roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0);
1124	} else {	1131	} else {
@@ -1126,7 +1133,7 @@ static void hns_roce_cmq_init_regs(struct hns_roce_dev *hr_dev, bool ring_type) · 1 unmodified line
1126	roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_H_REG,	1133	roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_H_REG,
1127	upper_32_bits(dma));	1134	upper_32_bits(dma));
1128	roce_write(hr_dev, ROCEE_RX_CMQ_DEPTH_REG,	1135	roce_write(hr_dev, ROCEE_RX_CMQ_DEPTH_REG,
1129	ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);	1136	(u32)ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);
1130	roce_write(hr_dev, ROCEE_RX_CMQ_HEAD_REG, 0);	1137	roce_write(hr_dev, ROCEE_RX_CMQ_HEAD_REG, 0);
1131	roce_write(hr_dev, ROCEE_RX_CMQ_TAIL_REG, 0);	1138	roce_write(hr_dev, ROCEE_RX_CMQ_TAIL_REG, 0);
1132	}	1139	}
@@ -1573,6 +1580,10 @@ static int hns_roce_query_pf_resource(struct hns_roce_dev *hr_dev) · 440 unmodified lines
1573	PF_RES_DATA_4_PF_SCCC_BT_NUM_M,	1580	PF_RES_DATA_4_PF_SCCC_BT_NUM_M,
1574	PF_RES_DATA_4_PF_SCCC_BT_NUM_S);	1581	PF_RES_DATA_4_PF_SCCC_BT_NUM_S);
1575		1582
		1583	hr_dev->caps.gmv_bt_num = roce_get_field(req_b->gmv_idx_num,
		1584	PF_RES_DATA_5_PF_GMV_BT_NUM_M,
		1585	PF_RES_DATA_5_PF_GMV_BT_NUM_S);
		1586
1576	return 0;	1587	return 0;
1577	}	1588	}
1578		1589
@@ -1896,11 +1907,20 @@ static void set_default_caps(struct hns_roce_dev *hr_dev) · 317 unmodified lines
1896	caps->ceqe_size = HNS_ROCE_V3_EQE_SIZE;	1907	caps->ceqe_size = HNS_ROCE_V3_EQE_SIZE;
1897	caps->cqe_sz = HNS_ROCE_V3_CQE_SIZE;	1908	caps->cqe_sz = HNS_ROCE_V3_CQE_SIZE;
1898	caps->qpc_sz = HNS_ROCE_V3_QPC_SZ;	1909	caps->qpc_sz = HNS_ROCE_V3_QPC_SZ;
		1910	caps->sccc_sz = HNS_ROCE_V3_SCCC_SZ;
		1911	caps->gmv_entry_sz = HNS_ROCE_V3_GMV_ENTRY_SZ;
		1912	caps->gmv_entry_num = caps->gmv_bt_num * (PAGE_SIZE /
		1913	caps->gmv_entry_sz);
		1914	caps->gmv_hop_num = HNS_ROCE_HOP_NUM_0;
		1915	caps->gmv_ba_pg_sz = 0;
		1916	caps->gmv_buf_pg_sz = 0;
		1917	caps->gid_table_len[0] = caps->gmv_bt_num * (HNS_HW_PAGE_SIZE /
		1918	caps->gmv_entry_sz);
1899	}	1919	}
1900	}	1920	}
1901		1921
1902	static void calc_pg_sz(int obj_num, int obj_size, int hop_num, int ctx_bt_num,	1922	static void calc_pg_sz(u32 obj_num, u32 obj_size, u32 hop_num, u32 ctx_bt_num,
1903	int buf_page_size, int bt_page_size, u32 hem_type)	1923	u32 buf_page_size, u32 bt_page_size, u32 hem_type)
1904	{	1924	{
1905	u64 obj_per_chunk;	1925	u64 obj_per_chunk;
1906	u64 bt_chunk_size = PAGE_SIZE;	1926	u64 bt_chunk_size = PAGE_SIZE;
@@ -1930,8 +1950,8 @@ static void calc_pg_sz(int obj_num, int obj_size, int hop_num, int ctx_bt_num, · 23 unmodified lines
1930	obj_per_chunk = ctx_bt_num * obj_per_chunk_default;	1950	obj_per_chunk = ctx_bt_num * obj_per_chunk_default;
1931	break;	1951	break;
1932	default:	1952	default:
1933	pr_err("Table %d not support hop_num = %d!\n", hem_type,	1953	pr_err("table %u not support hop_num = %u!\n", hem_type,
1934	hop_num);	1954	hop_num);
1935	return;	1955	return;
1936	}	1956	}
1937		1957
@@ -2122,6 +2142,14 @@ static int hns_roce_query_pf_caps(struct hns_roce_dev *hr_dev) · 184 unmodified lines
2122	caps->cqe_sz = HNS_ROCE_V3_CQE_SIZE;	2142	caps->cqe_sz = HNS_ROCE_V3_CQE_SIZE;
2123	caps->qpc_sz = HNS_ROCE_V3_QPC_SZ;	2143	caps->qpc_sz = HNS_ROCE_V3_QPC_SZ;
2124	caps->sccc_sz = HNS_ROCE_V3_SCCC_SZ;	2144	caps->sccc_sz = HNS_ROCE_V3_SCCC_SZ;
		2145	caps->gmv_entry_sz = HNS_ROCE_V3_GMV_ENTRY_SZ;
		2146	caps->gmv_entry_num = caps->gmv_bt_num * (PAGE_SIZE /
		2147	caps->gmv_entry_sz);
		2148	caps->gmv_hop_num = HNS_ROCE_HOP_NUM_0;
		2149	caps->gmv_ba_pg_sz = 0;
		2150	caps->gmv_buf_pg_sz = 0;
		2151	caps->gid_table_len[0] = caps->gmv_bt_num *
		2152	(HNS_HW_PAGE_SIZE / caps->gmv_entry_sz);
2125	}	2153	}
2126		2154
2127	calc_pg_sz(caps->num_qps, caps->qpc_sz, caps->qpc_hop_num,	2155	calc_pg_sz(caps->num_qps, caps->qpc_sz, caps->qpc_hop_num,
@@ -2371,10 +2399,10 @@ static int hns_roce_init_link_table(struct hns_roce_dev *hr_dev, · 243 unmodified lines
2371	u32 buf_chk_sz;	2399	u32 buf_chk_sz;
2372	dma_addr_t t;	2400	dma_addr_t t;
2373	int func_num = 1;	2401	int func_num = 1;
2374	int pg_num_a;	2402	u32 pg_num_a;
2375	int pg_num_b;	2403	u32 pg_num_b;
2376	int pg_num;	2404	u32 pg_num;
2377	int size;	2405	u32 size;
2378	int i;	2406	int i;
2379		2407
2380	switch (type) {	2408	switch (type) {
@@ -2423,7 +2451,6 @@ static int hns_roce_init_link_table(struct hns_roce_dev *hr_dev, · 42 unmodified lines
2423	if (i < (pg_num - 1))	2451	if (i < (pg_num - 1))
2424	entry[i].blk_ba1_nxt_ptr \|=	2452	entry[i].blk_ba1_nxt_ptr \|=
2425	(i + 1) << HNS_ROCE_LINK_TABLE_NXT_PTR_S;	2453	(i + 1) << HNS_ROCE_LINK_TABLE_NXT_PTR_S;
2426
2427	}	2454	}
2428	link_tbl->npages = pg_num;	2455	link_tbl->npages = pg_num;
2429	link_tbl->pg_sz = buf_chk_sz;	2456	link_tbl->pg_sz = buf_chk_sz;
@@ -2465,24 +2492,13 @@ static void hns_roce_free_link_table(struct hns_roce_dev *hr_dev, · 35 unmodified lines
2465	link_tbl->table.map);	2492	link_tbl->table.map);
2466	}	2493	}
2467		2494
2468	static int hns_roce_v2_init(struct hns_roce_dev *hr_dev)	2495	static int get_hem_table(struct hns_roce_dev *hr_dev)
2469	{	2496	{
2470	struct hns_roce_v2_priv *priv = hr_dev->priv;	2497	unsigned int qpc_count;
2471	int qpc_count, cqc_count;	2498	unsigned int cqc_count;
2472	int ret, i;	2499	unsigned int gmv_count;
2473		2500	int ret;
2474	/* TSQ includes SQ doorbell and ack doorbell */	2501	int i;
2475	ret = hns_roce_init_link_table(hr_dev, TSQ_LINK_TABLE);
2476	if (ret) {
2477	dev_err(hr_dev->dev, "TSQ init failed, ret = %d.\n", ret);
2478	return ret;
2479	}
2480
2481	ret = hns_roce_init_link_table(hr_dev, TPQ_LINK_TABLE);
2482	if (ret) {
2483	dev_err(hr_dev->dev, "TPQ init failed, ret = %d.\n", ret);
2484	goto err_tpq_init_failed;
2485	}
2486		2502
2487	/* Alloc memory for QPC Timer buffer space chunk */	2503	/* Alloc memory for QPC Timer buffer space chunk */
2488	for (qpc_count = 0; qpc_count < hr_dev->caps.qpc_timer_bt_num;	2504	for (qpc_count = 0; qpc_count < hr_dev->caps.qpc_timer_bt_num;
@@ -2506,8 +2522,23 @@ static int hns_roce_v2_init(struct hns_roce_dev *hr_dev) · 17 unmodified lines
2506	}	2522	}
2507	}	2523	}
2508		2524
		2525	/* Alloc memory for GMV(GID/MAC/VLAN) table buffer space chunk */
		2526	for (gmv_count = 0; gmv_count < hr_dev->caps.gmv_entry_num;
		2527	gmv_count++) {
		2528	ret = hns_roce_table_get(hr_dev, &hr_dev->gmv_table, gmv_count);
		2529	if (ret) {
		2530	dev_err(hr_dev->dev,
		2531	"failed to get gmv table, ret = %d.\n", ret);
		2532	goto err_gmv_failed;
		2533	}
		2534	}
		2535
2509	return 0;	2536	return 0;
2510		2537
		2538	err_gmv_failed:
		2539	for (i = 0; i < gmv_count; i++)
		2540	hns_roce_table_put(hr_dev, &hr_dev->gmv_table, i);
		2541
2511	err_cqc_timer_failed:	2542	err_cqc_timer_failed:
2512	for (i = 0; i < cqc_count; i++)	2543	for (i = 0; i < cqc_count; i++)
2513	hns_roce_table_put(hr_dev, &hr_dev->cqc_timer_table, i);	2544	hns_roce_table_put(hr_dev, &hr_dev->cqc_timer_table, i);
@@ -2516,6 +2547,34 @@ err_qpc_timer_failed: · 2 unmodified lines
2516	for (i = 0; i < qpc_count; i++)	2547	for (i = 0; i < qpc_count; i++)
2517	hns_roce_table_put(hr_dev, &hr_dev->qpc_timer_table, i);	2548	hns_roce_table_put(hr_dev, &hr_dev->qpc_timer_table, i);
2518		2549
		2550	return ret;
		2551	}
		2552
		2553	static int hns_roce_v2_init(struct hns_roce_dev *hr_dev)
		2554	{
		2555	struct hns_roce_v2_priv *priv = hr_dev->priv;
		2556	int ret;
		2557
		2558	/* TSQ includes SQ doorbell and ack doorbell */
		2559	ret = hns_roce_init_link_table(hr_dev, TSQ_LINK_TABLE);
		2560	if (ret) {
		2561	dev_err(hr_dev->dev, "failed to init TSQ, ret = %d.\n", ret);
		2562	return ret;
		2563	}
		2564
		2565	ret = hns_roce_init_link_table(hr_dev, TPQ_LINK_TABLE);
		2566	if (ret) {
		2567	dev_err(hr_dev->dev, "failed to init TPQ, ret = %d.\n", ret);
		2568	goto err_tpq_init_failed;
		2569	}
		2570
		2571	ret = get_hem_table(hr_dev);
		2572	if (ret)
		2573	goto err_get_hem_table_failed;
		2574
		2575	return 0;
		2576
		2577	err_get_hem_table_failed:
2519	hns_roce_free_link_table(hr_dev, &priv->tpq);	2578	hns_roce_free_link_table(hr_dev, &priv->tpq);
2520		2579
2521	err_tpq_init_failed:	2580	err_tpq_init_failed:
@@ -2539,7 +2598,7 @@ static int hns_roce_query_mbox_status(struct hns_roce_dev *hr_dev) · 17 unmodified lines
2539	struct hns_roce_cmq_desc desc;	2598	struct hns_roce_cmq_desc desc;
2540	struct hns_roce_mbox_status *mb_st =	2599	struct hns_roce_mbox_status *mb_st =
2541	(struct hns_roce_mbox_status *)desc.data;	2600	(struct hns_roce_mbox_status *)desc.data;
2542	enum hns_roce_cmd_return_status status;	2601	int status;
2543		2602
2544	hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_QUERY_MB_ST, true);	2603	hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_QUERY_MB_ST, true);
2545		2604
@@ -2610,7 +2669,7 @@ static int hns_roce_v2_post_mbox(struct hns_roce_dev *hr_dev, u64 in_param, · 64 unmodified lines
2610	}	2669	}
2611		2670
2612	static int hns_roce_v2_chk_mbox(struct hns_roce_dev *hr_dev,	2671	static int hns_roce_v2_chk_mbox(struct hns_roce_dev *hr_dev,
2613	unsigned long timeout)	2672	unsigned int timeout)
2614	{	2673	{
2615	struct device *dev = hr_dev->dev;	2674	struct device *dev = hr_dev->dev;
2616	unsigned long end;	2675	unsigned long end;
@@ -2637,14 +2696,27 @@ static int hns_roce_v2_chk_mbox(struct hns_roce_dev *hr_dev, · 20 unmodified lines
2637	return 0;	2696	return 0;
2638	}	2697	}
2639		2698
2640	static int hns_roce_config_sgid_table(struct hns_roce_dev *hr_dev,	2699	static void copy_gid(void dest, const union ib_gid gid)
2641	int gid_index, const union ib_gid *gid,	2700	{
2642	enum hns_roce_sgid_type sgid_type)	2701	#define GID_SIZE 4
		2702	const union ib_gid *src = gid;
		2703	__le32 (*p)[GID_SIZE] = dest;
		2704	int i;
		2705
		2706	if (!gid)
		2707	src = &zgid;
		2708
		2709	for (i = 0; i < GID_SIZE; i++)
		2710	(p)[i] = cpu_to_le32((u32 )&src->raw[i sizeof(u32)]);
		2711	}
		2712
		2713	static int config_sgid_table(struct hns_roce_dev *hr_dev,
		2714	int gid_index, const union ib_gid *gid,
		2715	enum hns_roce_sgid_type sgid_type)
2643	{	2716	{
2644	struct hns_roce_cmq_desc desc;	2717	struct hns_roce_cmq_desc desc;
2645	struct hns_roce_cfg_sgid_tb *sgid_tb =	2718	struct hns_roce_cfg_sgid_tb *sgid_tb =
2646	(struct hns_roce_cfg_sgid_tb *)desc.data;	2719	(struct hns_roce_cfg_sgid_tb *)desc.data;
2647	u32 *p;
2648		2720
2649	hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_CFG_SGID_TB, false);	2721	hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_CFG_SGID_TB, false);
2650		2722
@@ -2653,19 +2725,54 @@ static int hns_roce_config_sgid_table(struct hns_roce_dev *hr_dev, · 2 unmodified lines
2653	roce_set_field(sgid_tb->vf_sgid_type_rsv, CFG_SGID_TB_VF_SGID_TYPE_M,	2725	roce_set_field(sgid_tb->vf_sgid_type_rsv, CFG_SGID_TB_VF_SGID_TYPE_M,
2654	CFG_SGID_TB_VF_SGID_TYPE_S, sgid_type);	2726	CFG_SGID_TB_VF_SGID_TYPE_S, sgid_type);
2655		2727
2656	p = (u32 *)&gid->raw[0];	2728	copy_gid(&sgid_tb->vf_sgid_l, gid);
2657	sgid_tb->vf_sgid_l = cpu_to_le32(*p);
2658		2729
2659	p = (u32 *)&gid->raw[4];	2730	return hns_roce_cmq_send(hr_dev, &desc, 1);
2660	sgid_tb->vf_sgid_ml = cpu_to_le32(*p);	2731	}
2661		2732
2662	p = (u32 *)&gid->raw[8];	2733	static int config_gmv_table(struct hns_roce_dev *hr_dev,
2663	sgid_tb->vf_sgid_mh = cpu_to_le32(*p);	2734	int gid_index, const union ib_gid *gid,
		2735	enum hns_roce_sgid_type sgid_type,
		2736	const struct ib_gid_attr *attr)
		2737	{
		2738	struct hns_roce_cmq_desc desc[2];
		2739	struct hns_roce_cfg_gmv_tb_a *tb_a =
		2740	(struct hns_roce_cfg_gmv_tb_a *)desc[0].data;
		2741	struct hns_roce_cfg_gmv_tb_b *tb_b =
		2742	(struct hns_roce_cfg_gmv_tb_b *)desc[1].data;
2664		2743
2665	p = (u32 *)&gid->raw[0xc];	2744	u16 vlan_id = VLAN_CFI_MASK;
2666	sgid_tb->vf_sgid_h = cpu_to_le32(*p);	2745	u8 mac[ETH_ALEN] = {};
		2746	int ret;
2667		2747
2668	return hns_roce_cmq_send(hr_dev, &desc, 1);	2748	if (gid) {
		2749	ret = rdma_read_gid_l2_fields(attr, &vlan_id, mac);
		2750	if (ret)
		2751	return ret;
		2752	}
		2753
		2754	hns_roce_cmq_setup_basic_desc(&desc[0], HNS_ROCE_OPC_CFG_GMV_TBL, false);
		2755	desc[0].flag \|= cpu_to_le16(HNS_ROCE_CMD_FLAG_NEXT);
		2756
		2757	hns_roce_cmq_setup_basic_desc(&desc[1], HNS_ROCE_OPC_CFG_GMV_TBL, false);
		2758
		2759	copy_gid(&tb_a->vf_sgid_l, gid);
		2760
		2761	roce_set_field(tb_a->vf_sgid_type_vlan, CFG_GMV_TB_VF_SGID_TYPE_M,
		2762	CFG_GMV_TB_VF_SGID_TYPE_S, sgid_type);
		2763	roce_set_bit(tb_a->vf_sgid_type_vlan, CFG_GMV_TB_VF_VLAN_EN_S,
		2764	vlan_id < VLAN_CFI_MASK);
		2765	roce_set_field(tb_a->vf_sgid_type_vlan, CFG_GMV_TB_VF_VLAN_ID_M,
		2766	CFG_GMV_TB_VF_VLAN_ID_S, vlan_id);
		2767
		2768	tb_b->vf_smac_l = cpu_to_le32((u32 )mac);
		2769	roce_set_field(tb_b->vf_smac_h, CFG_GMV_TB_SMAC_H_M,
		2770	CFG_GMV_TB_SMAC_H_S, (u16 )&mac[4]);
		2771
		2772	roce_set_field(tb_b->table_idx_rsv, CFG_GMV_TB_SGID_IDX_M,
		2773	CFG_GMV_TB_SGID_IDX_S, gid_index);
		2774
		2775	return hns_roce_cmq_send(hr_dev, desc, 2);
2669	}	2776	}
2670		2777
2671	static int hns_roce_v2_set_gid(struct hns_roce_dev *hr_dev, u8 port,	2778	static int hns_roce_v2_set_gid(struct hns_roce_dev *hr_dev, u8 port,
@@ -2675,23 +2782,24 @@ static int hns_roce_v2_set_gid(struct hns_roce_dev *hr_dev, u8 port, · 3 unmodified lines
2675	enum hns_roce_sgid_type sgid_type = GID_TYPE_FLAG_ROCE_V1;	2782	enum hns_roce_sgid_type sgid_type = GID_TYPE_FLAG_ROCE_V1;
2676	int ret;	2783	int ret;
2677		2784
2678	if (!gid \|\| !attr)	2785	if (gid) {
2679	return -EINVAL;	2786	if (attr->gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
2680		2787	if (ipv6_addr_v4mapped((void *)gid))
2681	if (attr->gid_type == IB_GID_TYPE_ROCE)	2788	sgid_type = GID_TYPE_FLAG_ROCE_V2_IPV4;
2682	sgid_type = GID_TYPE_FLAG_ROCE_V1;	2789	else
2683		2790	sgid_type = GID_TYPE_FLAG_ROCE_V2_IPV6;
2684	if (attr->gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {	2791	} else if (attr->gid_type == IB_GID_TYPE_ROCE) {
2685	if (ipv6_addr_v4mapped((void *)gid))	2792	sgid_type = GID_TYPE_FLAG_ROCE_V1;
2686	sgid_type = GID_TYPE_FLAG_ROCE_V2_IPV4;	2793	}
2687	else
2688	sgid_type = GID_TYPE_FLAG_ROCE_V2_IPV6;
2689	}	2794	}
2690		2795
2691	ret = hns_roce_config_sgid_table(hr_dev, gid_index, gid, sgid_type);	2796	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)
		2797	ret = config_gmv_table(hr_dev, gid_index, gid, sgid_type, attr);
		2798	else
		2799	ret = config_sgid_table(hr_dev, gid_index, gid, sgid_type);
		2800
2692	if (ret)	2801	if (ret)
2693	ibdev_err(&hr_dev->ib_dev,	2802	ibdev_err(&hr_dev->ib_dev, "failed to set gid, ret = %d!\n",
2694	"failed to configure sgid table, ret = %d!\n",
2695	ret);	2803	ret);
2696		2804
2697	return ret;	2805	return ret;
@@ -2959,7 +3067,7 @@ static void get_cqe_v2(struct hns_roce_cq hr_cq, int n) · 261 unmodified lines
2959	return hns_roce_buf_offset(hr_cq->mtr.kmem, n * hr_cq->cqe_size);	3067	return hns_roce_buf_offset(hr_cq->mtr.kmem, n * hr_cq->cqe_size);
2960	}	3068	}
2961		3069
2962	static void get_sw_cqe_v2(struct hns_roce_cq hr_cq, int n)	3070	static void get_sw_cqe_v2(struct hns_roce_cq hr_cq, unsigned int n)
2963	{	3071	{
2964	struct hns_roce_v2_cqe *cqe = get_cqe_v2(hr_cq, n & hr_cq->ib_cq.cqe);	3072	struct hns_roce_v2_cqe *cqe = get_cqe_v2(hr_cq, n & hr_cq->ib_cq.cqe);
2965		3073
@@ -3060,6 +3168,9 @@ static void hns_roce_v2_write_cqc(struct hns_roce_dev *hr_dev, · 94 unmodified lines
3060	V2_CQC_BYTE_8_CQE_SIZE_S, hr_cq->cqe_size ==	3168	V2_CQC_BYTE_8_CQE_SIZE_S, hr_cq->cqe_size ==
3061	HNS_ROCE_V3_CQE_SIZE ? 1 : 0);	3169	HNS_ROCE_V3_CQE_SIZE ? 1 : 0);
3062		3170
		3171	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_STASH)
		3172	hr_reg_enable(cq_context, CQC_STASH);
		3173
3063	cq_context->cqe_cur_blk_addr = cpu_to_le32(to_hr_hw_page_addr(mtts[0]));	3174	cq_context->cqe_cur_blk_addr = cpu_to_le32(to_hr_hw_page_addr(mtts[0]));
3064		3175
3065	roce_set_field(cq_context->byte_16_hop_addr,	3176	roce_set_field(cq_context->byte_16_hop_addr,
@@ -3303,7 +3414,7 @@ static int hns_roce_v2_poll_one(struct hns_roce_cq *hr_cq, · 237 unmodified lines
3303	int is_send;	3414	int is_send;
3304	u16 wqe_ctr;	3415	u16 wqe_ctr;
3305	u32 opcode;	3416	u32 opcode;
3306	int qpn;	3417	u32 qpn;
3307	int ret;	3418	int ret;
3308		3419
3309	/* Find cqe according to consumer index */	3420	/* Find cqe according to consumer index */
@@ -3572,7 +3683,7 @@ static int get_op_for_set_hem(struct hns_roce_dev *hr_dev, u32 type, · 262 unmodified lines
3572	break;	3683	break;
3573	default:	3684	default:
3574	dev_warn(hr_dev->dev,	3685	dev_warn(hr_dev->dev,
3575	"Table %d not to be written by mailbox!\n", type);	3686	"table %u not to be written by mailbox!\n", type);
3576	return -EINVAL;	3687	return -EINVAL;
3577	}	3688	}
3578		3689
@@ -3583,9 +3694,25 @@ static int set_hem_to_hw(struct hns_roce_dev *hr_dev, int obj, u64 bt_ba, · 4 unmodified lines
3583	u32 hem_type, int step_idx)	3694	u32 hem_type, int step_idx)
3584	{	3695	{
3585	struct hns_roce_cmd_mailbox *mailbox;	3696	struct hns_roce_cmd_mailbox *mailbox;
		3697	struct hns_roce_cmq_desc desc;
		3698	struct hns_roce_cfg_gmv_bt *gmv_bt =
		3699	(struct hns_roce_cfg_gmv_bt *)desc.data;
3586	int ret;	3700	int ret;
3587	int op;	3701	int op;
3588		3702
		3703	if (hem_type == HEM_TYPE_GMV) {
		3704	hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_CFG_GMV_BT,
		3705	false);
		3706
		3707	gmv_bt->gmv_ba_l = cpu_to_le32(bt_ba >> HNS_HW_PAGE_SHIFT);
		3708	gmv_bt->gmv_ba_h = cpu_to_le32(bt_ba >> (HNS_HW_PAGE_SHIFT +
		3709	32));
		3710	gmv_bt->gmv_bt_idx = cpu_to_le32(obj /
		3711	(HNS_HW_PAGE_SIZE / hr_dev->caps.gmv_entry_sz));
		3712
		3713	return hns_roce_cmq_send(hr_dev, &desc, 1);
		3714	}
		3715
3589	op = get_op_for_set_hem(hr_dev, hem_type, step_idx);	3716	op = get_op_for_set_hem(hr_dev, hem_type, step_idx);
3590	if (op < 0)	3717	if (op < 0)
3591	return 0;	3718	return 0;
@@ -3683,24 +3810,20 @@ static int hns_roce_v2_clear_hem(struct hns_roce_dev *hr_dev, · 91 unmodified lines
3683	case HEM_TYPE_CQC:	3810	case HEM_TYPE_CQC:
3684	op = HNS_ROCE_CMD_DESTROY_CQC_BT0;	3811	op = HNS_ROCE_CMD_DESTROY_CQC_BT0;
3685	break;	3812	break;
3686	case HEM_TYPE_SCCC:
3687	case HEM_TYPE_QPC_TIMER:
3688	case HEM_TYPE_CQC_TIMER:
3689	break;
3690	case HEM_TYPE_SRQC:	3813	case HEM_TYPE_SRQC:
3691	op = HNS_ROCE_CMD_DESTROY_SRQC_BT0;	3814	op = HNS_ROCE_CMD_DESTROY_SRQC_BT0;
3692	break;	3815	break;
		3816	case HEM_TYPE_SCCC:
		3817	case HEM_TYPE_QPC_TIMER:
		3818	case HEM_TYPE_CQC_TIMER:
		3819	case HEM_TYPE_GMV:
		3820	return 0;
3693	default:	3821	default:
3694	dev_warn(dev, "Table %d not to be destroyed by mailbox!\n",	3822	dev_warn(dev, "table %u not to be destroyed by mailbox!\n",
3695	table->type);	3823	table->type);
3696	return 0;	3824	return 0;
3697	}	3825	}
3698		3826
3699	if (table->type == HEM_TYPE_SCCC \|\|
3700	table->type == HEM_TYPE_QPC_TIMER \|\|
3701	table->type == HEM_TYPE_CQC_TIMER)
3702	return 0;
3703
3704	op += step_idx;	3827	op += step_idx;
3705		3828
3706	mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);	3829	mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
@@ -3851,9 +3974,14 @@ static void modify_qp_reset_to_init(struct ib_qp *ibqp, · 144 unmodified lines
3851		3974
3852	roce_set_bit(context->byte_172_sq_psn, V2_QPC_BYTE_172_FRE_S, 1);	3975	roce_set_bit(context->byte_172_sq_psn, V2_QPC_BYTE_172_FRE_S, 1);
3853		3976
3854	hr_qp->access_flags = attr->qp_access_flags;
3855	roce_set_field(context->byte_252_err_txcqn, V2_QPC_BYTE_252_TX_CQN_M,	3977	roce_set_field(context->byte_252_err_txcqn, V2_QPC_BYTE_252_TX_CQN_M,
3856	V2_QPC_BYTE_252_TX_CQN_S, to_hr_cq(ibqp->send_cq)->cqn);	3978	V2_QPC_BYTE_252_TX_CQN_S, to_hr_cq(ibqp->send_cq)->cqn);
		3979
		3980	if (hr_dev->caps.qpc_sz < HNS_ROCE_V3_QPC_SZ)
		3981	return;
		3982
		3983	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_STASH)
		3984	hr_reg_enable(&context->ext, QPCEX_STASH);
3857	}	3985	}
3858		3986
3859	static void modify_qp_init_to_init(struct ib_qp *ibqp,	3987	static void modify_qp_init_to_init(struct ib_qp *ibqp,
@@ -3874,51 +4002,6 @@ static void modify_qp_init_to_init(struct ib_qp *ibqp, · 14 unmodified lines
3874	roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_TST_M,	4002	roce_set_field(qpc_mask->byte_4_sqpn_tst, V2_QPC_BYTE_4_TST_M,
3875	V2_QPC_BYTE_4_TST_S, 0);	4003	V2_QPC_BYTE_4_TST_S, 0);
3876		4004
3877	if (attr_mask & IB_QP_ACCESS_FLAGS) {
3878	roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S,
3879	!!(attr->qp_access_flags & IB_ACCESS_REMOTE_READ));
3880	roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S,
3881	0);
3882
3883	roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S,
3884	!!(attr->qp_access_flags &
3885	IB_ACCESS_REMOTE_WRITE));
3886	roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S,
3887	0);
3888
3889	roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S,
3890	!!(attr->qp_access_flags &
3891	IB_ACCESS_REMOTE_ATOMIC));
3892	roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S,
3893	0);
3894	roce_set_bit(context->byte_76_srqn_op_en,
3895	V2_QPC_BYTE_76_EXT_ATE_S,
3896	!!(attr->qp_access_flags &
3897	IB_ACCESS_REMOTE_ATOMIC));
3898	roce_set_bit(qpc_mask->byte_76_srqn_op_en,
3899	V2_QPC_BYTE_76_EXT_ATE_S, 0);
3900	} else {
3901	roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S,
3902	!!(hr_qp->access_flags & IB_ACCESS_REMOTE_READ));
3903	roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RRE_S,
3904	0);
3905
3906	roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S,
3907	!!(hr_qp->access_flags & IB_ACCESS_REMOTE_WRITE));
3908	roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_RWE_S,
3909	0);
3910
3911	roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S,
3912	!!(hr_qp->access_flags & IB_ACCESS_REMOTE_ATOMIC));
3913	roce_set_bit(qpc_mask->byte_76_srqn_op_en, V2_QPC_BYTE_76_ATE_S,
3914	0);
3915	roce_set_bit(context->byte_76_srqn_op_en,
3916	V2_QPC_BYTE_76_EXT_ATE_S,
3917	!!(hr_qp->access_flags & IB_ACCESS_REMOTE_ATOMIC));
3918	roce_set_bit(qpc_mask->byte_76_srqn_op_en,
3919	V2_QPC_BYTE_76_EXT_ATE_S, 0);
3920	}
3921
3922	roce_set_field(context->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M,	4005	roce_set_field(context->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M,
3923	V2_QPC_BYTE_16_PD_S, to_hr_pd(ibqp->pd)->pdn);	4006	V2_QPC_BYTE_16_PD_S, to_hr_pd(ibqp->pd)->pdn);
3924	roce_set_field(qpc_mask->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M,	4007	roce_set_field(qpc_mask->byte_16_buf_ba_pg_sz, V2_QPC_BYTE_16_PD_M,
@@ -4328,7 +4411,7 @@ static int modify_qp_rtr_to_rts(struct ib_qp *ibqp, · 403 unmodified lines
4328		4411
4329	ret = config_qp_sq_buf(hr_dev, hr_qp, context, qpc_mask);	4412	ret = config_qp_sq_buf(hr_dev, hr_qp, context, qpc_mask);
4330	if (ret) {	4413	if (ret) {
4331	ibdev_err(ibdev, "failed to config sq buf, ret %d\n", ret);	4414	ibdev_err(ibdev, "failed to config sq buf, ret = %d.\n", ret);
4332	return ret;	4415	return ret;
4333	}	4416	}
4334		4417
@@ -4421,7 +4504,9 @@ static int hns_roce_v2_set_path(struct ib_qp *ibqp, · 86 unmodified lines
4421	IB_GID_TYPE_ROCE_UDP_ENCAP);	4504	IB_GID_TYPE_ROCE_UDP_ENCAP);
4422	}	4505	}
4423		4506
4424	if (vlan_id < VLAN_N_VID) {	4507	/* Only HIP08 needs to set the vlan_en bits in QPC */
		4508	if (vlan_id < VLAN_N_VID &&
		4509	hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08) {
4425	roce_set_bit(context->byte_76_srqn_op_en,	4510	roce_set_bit(context->byte_76_srqn_op_en,
4426	V2_QPC_BYTE_76_RQ_VLAN_EN_S, 1);	4511	V2_QPC_BYTE_76_RQ_VLAN_EN_S, 1);
4427	roce_set_bit(qpc_mask->byte_76_srqn_op_en,	4512	roce_set_bit(qpc_mask->byte_76_srqn_op_en,
@@ -4468,15 +4553,11 @@ static int hns_roce_v2_set_path(struct ib_qp *ibqp, · 40 unmodified lines
4468	roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_HOP_LIMIT_M,	4553	roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_HOP_LIMIT_M,
4469	V2_QPC_BYTE_24_HOP_LIMIT_S, 0);	4554	V2_QPC_BYTE_24_HOP_LIMIT_S, 0);
4470		4555
4471	if (is_udp)	4556	roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_TC_M,
4472	roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_TC_M,	4557	V2_QPC_BYTE_24_TC_S, get_tclass(&attr->ah_attr.grh));
4473	V2_QPC_BYTE_24_TC_S, grh->traffic_class >> 2);
4474	else
4475	roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_TC_M,
4476	V2_QPC_BYTE_24_TC_S, grh->traffic_class);
4477
4478	roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_TC_M,	4558	roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_TC_M,
4479	V2_QPC_BYTE_24_TC_S, 0);	4559	V2_QPC_BYTE_24_TC_S, 0);
		4560
4480	roce_set_field(context->byte_28_at_fl, V2_QPC_BYTE_28_FL_M,	4561	roce_set_field(context->byte_28_at_fl, V2_QPC_BYTE_28_FL_M,
4481	V2_QPC_BYTE_28_FL_S, grh->flow_label);	4562	V2_QPC_BYTE_28_FL_S, grh->flow_label);
4482	roce_set_field(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_FL_M,	4563	roce_set_field(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_FL_M,
@@ -4758,6 +4839,9 @@ static int hns_roce_v2_modify_qp(struct ib_qp *ibqp, · 275 unmodified lines
4758	unsigned long rq_flag = 0;	4839	unsigned long rq_flag = 0;
4759	int ret;	4840	int ret;
4760		4841
		4842	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
		4843	return -EOPNOTSUPP;
		4844
4761	/*	4845	/*
4762	* In v2 engine, software pass context and context mask to hardware	4846	* In v2 engine, software pass context and context mask to hardware
4763	* when modifying qp. If software need modify some fields in context,	4847	* when modifying qp. If software need modify some fields in context,
@@ -4818,7 +4902,7 @@ static int hns_roce_v2_modify_qp(struct ib_qp *ibqp, · 54 unmodified lines
4818	/* SW pass context to HW */	4902	/* SW pass context to HW */
4819	ret = hns_roce_v2_qp_modify(hr_dev, context, qpc_mask, hr_qp);	4903	ret = hns_roce_v2_qp_modify(hr_dev, context, qpc_mask, hr_qp);
4820	if (ret) {	4904	if (ret) {
4821	ibdev_err(ibdev, "failed to modify QP, ret = %d\n", ret);	4905	ibdev_err(ibdev, "failed to modify QP, ret = %d.\n", ret);
4822	goto out;	4906	goto out;
4823	}	4907	}
4824		4908
@@ -4911,7 +4995,7 @@ static int hns_roce_v2_query_qp(struct ib_qp ibqp, struct ib_qp_attr qp_attr, · 86 unmodified lines
4911		4995
4912	ret = hns_roce_v2_query_qpc(hr_dev, hr_qp, &context);	4996	ret = hns_roce_v2_query_qpc(hr_dev, hr_qp, &context);
4913	if (ret) {	4997	if (ret) {
4914	ibdev_err(ibdev, "failed to query QPC, ret = %d\n", ret);	4998	ibdev_err(ibdev, "failed to query QPC, ret = %d.\n", ret);
4915	ret = -EINVAL;	4999	ret = -EINVAL;
4916	goto out;	5000	goto out;
4917	}	5001	}
@@ -5026,13 +5110,15 @@ static int hns_roce_v2_destroy_qp_common(struct hns_roce_dev *hr_dev, · 108 unmodified lines
5026	unsigned long flags;	5110	unsigned long flags;
5027	int ret = 0;	5111	int ret = 0;
5028		5112
5029	if (hr_qp->ibqp.qp_type == IB_QPT_RC && hr_qp->state != IB_QPS_RESET) {	5113	if ((hr_qp->ibqp.qp_type == IB_QPT_RC \|\|
		5114	hr_qp->ibqp.qp_type == IB_QPT_UD) &&
		5115	hr_qp->state != IB_QPS_RESET) {
5030	/* Modify qp to reset before destroying qp */	5116	/* Modify qp to reset before destroying qp */
5031	ret = hns_roce_v2_modify_qp(&hr_qp->ibqp, NULL, 0,	5117	ret = hns_roce_v2_modify_qp(&hr_qp->ibqp, NULL, 0,
5032	hr_qp->state, IB_QPS_RESET);	5118	hr_qp->state, IB_QPS_RESET);
5033	if (ret)	5119	if (ret)
5034	ibdev_err(ibdev,	5120	ibdev_err(ibdev,
5035	"failed to modify QP to RST, ret = %d\n",	5121	"failed to modify QP to RST, ret = %d.\n",
5036	ret);	5122	ret);
5037	}	5123	}
5038		5124
@@ -5071,7 +5157,7 @@ static int hns_roce_v2_destroy_qp(struct ib_qp ibqp, struct ib_udata udata) · 32 unmodified lines
5071	ret = hns_roce_v2_destroy_qp_common(hr_dev, hr_qp, udata);	5157	ret = hns_roce_v2_destroy_qp_common(hr_dev, hr_qp, udata);
5072	if (ret)	5158	if (ret)
5073	ibdev_err(&hr_dev->ib_dev,	5159	ibdev_err(&hr_dev->ib_dev,
5074	"failed to destroy QP 0x%06lx, ret = %d\n",	5160	"failed to destroy QP, QPN = 0x%06lx, ret = %d.\n",
5075	hr_qp->qpn, ret);	5161	hr_qp->qpn, ret);
5076		5162
5077	hns_roce_qp_destroy(hr_dev, hr_qp, udata);	5163	hns_roce_qp_destroy(hr_dev, hr_qp, udata);
@@ -5094,7 +5180,7 @@ static int hns_roce_v2_qp_flow_control_init(struct hns_roce_dev *hr_dev, · 16 unmodified lines
5094	hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_RESET_SCCC, false);	5180	hns_roce_cmq_setup_basic_desc(&desc, HNS_ROCE_OPC_RESET_SCCC, false);
5095	ret = hns_roce_cmq_send(hr_dev, &desc, 1);	5181	ret = hns_roce_cmq_send(hr_dev, &desc, 1);
5096	if (ret) {	5182	if (ret) {
5097	ibdev_err(ibdev, "failed to reset SCC ctx, ret = %d\n", ret);	5183	ibdev_err(ibdev, "failed to reset SCC ctx, ret = %d.\n", ret);
5098	goto out;	5184	goto out;
5099	}	5185	}
5100		5186
@@ -5104,7 +5190,7 @@ static int hns_roce_v2_qp_flow_control_init(struct hns_roce_dev *hr_dev, · 3 unmodified lines
5104	clr->qpn = cpu_to_le32(hr_qp->qpn);	5190	clr->qpn = cpu_to_le32(hr_qp->qpn);
5105	ret = hns_roce_cmq_send(hr_dev, &desc, 1);	5191	ret = hns_roce_cmq_send(hr_dev, &desc, 1);
5106	if (ret) {	5192	if (ret) {
5107	ibdev_err(ibdev, "failed to clear SCC ctx, ret = %d\n", ret);	5193	ibdev_err(ibdev, "failed to clear SCC ctx, ret = %d.\n", ret);
5108	goto out;	5194	goto out;
5109	}	5195	}
5110		5196
@@ -5353,7 +5439,7 @@ static int hns_roce_v2_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period) · 242 unmodified lines
5353	hns_roce_free_cmd_mailbox(hr_dev, mailbox);	5439	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
5354	if (ret)	5440	if (ret)
5355	ibdev_err(&hr_dev->ib_dev,	5441	ibdev_err(&hr_dev->ib_dev,
5356	"failed to process cmd when modifying CQ, ret = %d\n",	5442	"failed to process cmd when modifying CQ, ret = %d.\n",
5357	ret);	5443	ret);
5358		5444
5359	return ret;	5445	return ret;
@@ -5364,8 +5450,6 @@ static void hns_roce_irq_work_handle(struct work_struct *work) · 4 unmodified lines
5364	struct hns_roce_work *irq_work =	5450	struct hns_roce_work *irq_work =
5365	container_of(work, struct hns_roce_work, work);	5451	container_of(work, struct hns_roce_work, work);
5366	struct ib_device *ibdev = &irq_work->hr_dev->ib_dev;	5452	struct ib_device *ibdev = &irq_work->hr_dev->ib_dev;
5367	u32 qpn = irq_work->qpn;
5368	u32 cqn = irq_work->cqn;
5369		5453
5370	switch (irq_work->event_type) {	5454	switch (irq_work->event_type) {
5371	case HNS_ROCE_EVENT_TYPE_PATH_MIG:	5455	case HNS_ROCE_EVENT_TYPE_PATH_MIG:
@@ -5381,15 +5465,15 @@ static void hns_roce_irq_work_handle(struct work_struct *work) · 9 unmodified lines
5381	break;	5465	break;
5382	case HNS_ROCE_EVENT_TYPE_WQ_CATAS_ERROR:	5466	case HNS_ROCE_EVENT_TYPE_WQ_CATAS_ERROR:
5383	ibdev_err(ibdev, "Local work queue 0x%x catast error, sub_event type is: %d\n",	5467	ibdev_err(ibdev, "Local work queue 0x%x catast error, sub_event type is: %d\n",
5384	qpn, irq_work->sub_type);	5468	irq_work->queue_num, irq_work->sub_type);
5385	break;	5469	break;
5386	case HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR:	5470	case HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR:
5387	ibdev_err(ibdev, "Invalid request local work queue 0x%x error.\n",	5471	ibdev_err(ibdev, "Invalid request local work queue 0x%x error.\n",
5388	qpn);	5472	irq_work->queue_num);
5389	break;	5473	break;
5390	case HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR:	5474	case HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR:
5391	ibdev_err(ibdev, "Local access violation work queue 0x%x error, sub_event type is: %d\n",	5475	ibdev_err(ibdev, "Local access violation work queue 0x%x error, sub_event type is: %d\n",
5392	qpn, irq_work->sub_type);	5476	irq_work->queue_num, irq_work->sub_type);
5393	break;	5477	break;
5394	case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:	5478	case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:
5395	ibdev_warn(ibdev, "SRQ limit reach.\n");	5479	ibdev_warn(ibdev, "SRQ limit reach.\n");
@@ -5401,10 +5485,10 @@ static void hns_roce_irq_work_handle(struct work_struct *work) · 5 unmodified lines
5401	ibdev_err(ibdev, "SRQ catas error.\n");	5485	ibdev_err(ibdev, "SRQ catas error.\n");
5402	break;	5486	break;
5403	case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR:	5487	case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR:
5404	ibdev_err(ibdev, "CQ 0x%x access err.\n", cqn);	5488	ibdev_err(ibdev, "CQ 0x%x access err.\n", irq_work->queue_num);
5405	break;	5489	break;
5406	case HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW:	5490	case HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW:
5407	ibdev_warn(ibdev, "CQ 0x%x overflow\n", cqn);	5491	ibdev_warn(ibdev, "CQ 0x%x overflow\n", irq_work->queue_num);
5408	break;	5492	break;
5409	case HNS_ROCE_EVENT_TYPE_DB_OVERFLOW:	5493	case HNS_ROCE_EVENT_TYPE_DB_OVERFLOW:
5410	ibdev_warn(ibdev, "DB overflow.\n");	5494	ibdev_warn(ibdev, "DB overflow.\n");
@@ -5420,8 +5504,7 @@ static void hns_roce_irq_work_handle(struct work_struct *work) · 9 unmodified lines
5420	}	5504	}
5421		5505
5422	static void hns_roce_v2_init_irq_work(struct hns_roce_dev *hr_dev,	5506	static void hns_roce_v2_init_irq_work(struct hns_roce_dev *hr_dev,
5423	struct hns_roce_eq *eq,	5507	struct hns_roce_eq *eq, u32 queue_num)
5424	u32 qpn, u32 cqn)
5425	{	5508	{
5426	struct hns_roce_work *irq_work;	5509	struct hns_roce_work *irq_work;
5427		5510
@@ -5431,10 +5514,9 @@ static void hns_roce_v2_init_irq_work(struct hns_roce_dev *hr_dev, · 3 unmodified lines
5431		5514
5432	INIT_WORK(&(irq_work->work), hns_roce_irq_work_handle);	5515	INIT_WORK(&(irq_work->work), hns_roce_irq_work_handle);
5433	irq_work->hr_dev = hr_dev;	5516	irq_work->hr_dev = hr_dev;
5434	irq_work->qpn = qpn;
5435	irq_work->cqn = cqn;
5436	irq_work->event_type = eq->event_type;	5517	irq_work->event_type = eq->event_type;
5437	irq_work->sub_type = eq->sub_type;	5518	irq_work->sub_type = eq->sub_type;
		5519	irq_work->queue_num = queue_num;
5438	queue_work(hr_dev->irq_workq, &(irq_work->work));	5520	queue_work(hr_dev->irq_workq, &(irq_work->work));
5439	}	5521	}
5440		5522
@@ -5486,10 +5568,8 @@ static int hns_roce_v2_aeq_int(struct hns_roce_dev *hr_dev, · 45 unmodified lines
5486	struct hns_roce_aeqe *aeqe = next_aeqe_sw_v2(eq);	5568	struct hns_roce_aeqe *aeqe = next_aeqe_sw_v2(eq);
5487	int aeqe_found = 0;	5569	int aeqe_found = 0;
5488	int event_type;	5570	int event_type;
		5571	u32 queue_num;
5489	int sub_type;	5572	int sub_type;
5490	u32 srqn;
5491	u32 qpn;
5492	u32 cqn;
5493		5573
5494	while (aeqe) {	5574	while (aeqe) {
5495	/* Make sure we read AEQ entry after we have checked the	5575	/* Make sure we read AEQ entry after we have checked the
@@ -5503,15 +5583,9 @@ static int hns_roce_v2_aeq_int(struct hns_roce_dev *hr_dev, · 7 unmodified lines
5503	sub_type = roce_get_field(aeqe->asyn,	5583	sub_type = roce_get_field(aeqe->asyn,
5504	HNS_ROCE_V2_AEQE_SUB_TYPE_M,	5584	HNS_ROCE_V2_AEQE_SUB_TYPE_M,
5505	HNS_ROCE_V2_AEQE_SUB_TYPE_S);	5585	HNS_ROCE_V2_AEQE_SUB_TYPE_S);
5506	qpn = roce_get_field(aeqe->event.qp_event.qp,	5586	queue_num = roce_get_field(aeqe->event.queue_event.num,
5507	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M,	5587	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M,
5508	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S);	5588	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S);
5509	cqn = roce_get_field(aeqe->event.cq_event.cq,
5510	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M,
5511	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S);
5512	srqn = roce_get_field(aeqe->event.srq_event.srq,
5513	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M,
5514	HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S);
5515		5589
5516	switch (event_type) {	5590	switch (event_type) {
5517	case HNS_ROCE_EVENT_TYPE_PATH_MIG:	5591	case HNS_ROCE_EVENT_TYPE_PATH_MIG:
@@ -5522,17 +5596,15 @@ static int hns_roce_v2_aeq_int(struct hns_roce_dev *hr_dev, · 4 unmodified lines
5522	case HNS_ROCE_EVENT_TYPE_SRQ_LAST_WQE_REACH:	5596	case HNS_ROCE_EVENT_TYPE_SRQ_LAST_WQE_REACH:
5523	case HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR:	5597	case HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR:
5524	case HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR:	5598	case HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR:
5525	hns_roce_qp_event(hr_dev, qpn, event_type);	5599	hns_roce_qp_event(hr_dev, queue_num, event_type);
5526	break;	5600	break;
5527	case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:	5601	case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH:
5528	case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR:	5602	case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR:
5529	hns_roce_srq_event(hr_dev, srqn, event_type);	5603	hns_roce_srq_event(hr_dev, queue_num, event_type);
5530	break;	5604	break;
5531	case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR:	5605	case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR:
5532	case HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW:	5606	case HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW:
5533	hns_roce_cq_event(hr_dev, cqn, event_type);	5607	hns_roce_cq_event(hr_dev, queue_num, event_type);
5534	break;
5535	case HNS_ROCE_EVENT_TYPE_DB_OVERFLOW:
5536	break;	5608	break;
5537	case HNS_ROCE_EVENT_TYPE_MB:	5609	case HNS_ROCE_EVENT_TYPE_MB:
5538	hns_roce_cmd_event(hr_dev,	5610	hns_roce_cmd_event(hr_dev,
@@ -5540,8 +5612,7 @@ static int hns_roce_v2_aeq_int(struct hns_roce_dev *hr_dev, · 1 unmodified line
5540	aeqe->event.cmd.status,	5612	aeqe->event.cmd.status,
5541	le64_to_cpu(aeqe->event.cmd.out_param));	5613	le64_to_cpu(aeqe->event.cmd.out_param));
5542	break;	5614	break;
5543	case HNS_ROCE_EVENT_TYPE_CEQ_OVERFLOW:	5615	case HNS_ROCE_EVENT_TYPE_DB_OVERFLOW:
5544	break;
5545	case HNS_ROCE_EVENT_TYPE_FLR:	5616	case HNS_ROCE_EVENT_TYPE_FLR:
5546	break;	5617	break;
5547	default:	5618	default:
@@ -5558,7 +5629,7 @@ static int hns_roce_v2_aeq_int(struct hns_roce_dev *hr_dev, · 10 unmodified lines
5558	if (eq->cons_index > (2 * eq->entries - 1))	5629	if (eq->cons_index > (2 * eq->entries - 1))
5559	eq->cons_index = 0;	5630	eq->cons_index = 0;
5560		5631
5561	hns_roce_v2_init_irq_work(hr_dev, eq, qpn, cqn);	5632	hns_roce_v2_init_irq_work(hr_dev, eq, queue_num);
5562		5633
5563	aeqe = next_aeqe_sw_v2(eq);	5634	aeqe = next_aeqe_sw_v2(eq);
5564	}	5635	}
@@ -6193,6 +6264,7 @@ static const struct pci_device_id hns_roce_hw_v2_pci_tbl[] = { · 628 unmodified lines
6193	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},	6264	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
6194	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},	6265	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
6195	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},	6266	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
		6267	{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_200G_RDMA), 0},
6196	/* required last entry */	6268	/* required last entry */
6197	{0, }	6269	{0, }
6198	};	6270	};

drivers/infiniband/hw/hns/hns_roce_hw_v2.h+154−111

@@ -44,6 +44,7 @@ · 43 unmodified lines
44	#define HNS_ROCE_VF_SMAC_NUM 32	44	#define HNS_ROCE_VF_SMAC_NUM 32
45	#define HNS_ROCE_VF_SGID_NUM 32	45	#define HNS_ROCE_VF_SGID_NUM 32
46	#define HNS_ROCE_VF_SL_NUM 8	46	#define HNS_ROCE_VF_SL_NUM 8
		47	#define HNS_ROCE_VF_GMV_BT_NUM 256
47		48
48	#define HNS_ROCE_V2_MAX_QP_NUM 0x100000	49	#define HNS_ROCE_V2_MAX_QP_NUM 0x100000
49	#define HNS_ROCE_V2_MAX_QPC_TIMER_NUM 0x200	50	#define HNS_ROCE_V2_MAX_QPC_TIMER_NUM 0x200
@@ -89,6 +90,7 @@ · 39 unmodified lines
89		90
90	#define HNS_ROCE_V2_SCCC_SZ 32	91	#define HNS_ROCE_V2_SCCC_SZ 32
91	#define HNS_ROCE_V3_SCCC_SZ 64	92	#define HNS_ROCE_V3_SCCC_SZ 64
		93	#define HNS_ROCE_V3_GMV_ENTRY_SZ 32
92		94
93	#define HNS_ROCE_V2_QPC_TIMER_ENTRY_SZ PAGE_SIZE	95	#define HNS_ROCE_V2_QPC_TIMER_ENTRY_SZ PAGE_SIZE
94	#define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ PAGE_SIZE	96	#define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ PAGE_SIZE
@@ -241,6 +243,8 @@ enum hns_roce_opcode_type { · 146 unmodified lines
241	HNS_ROCE_OPC_CLR_SCCC = 0x8509,	243	HNS_ROCE_OPC_CLR_SCCC = 0x8509,
242	HNS_ROCE_OPC_QUERY_SCCC = 0x850a,	244	HNS_ROCE_OPC_QUERY_SCCC = 0x850a,
243	HNS_ROCE_OPC_RESET_SCCC = 0x850b,	245	HNS_ROCE_OPC_RESET_SCCC = 0x850b,
		246	HNS_ROCE_OPC_CFG_GMV_TBL = 0x850f,
		247	HNS_ROCE_OPC_CFG_GMV_BT = 0x8510,
244	HNS_SWITCH_PARAMETER_CFG = 0x1033,	248	HNS_SWITCH_PARAMETER_CFG = 0x1033,
245	};	249	};
246		250
@@ -263,23 +267,24 @@ enum hns_roce_sgid_type { · 16 unmodified lines
263	};	267	};
264		268
265	struct hns_roce_v2_cq_context {	269	struct hns_roce_v2_cq_context {
266	__le32 byte_4_pg_ceqn;	270	__le32 byte_4_pg_ceqn;
267	__le32 byte_8_cqn;	271	__le32 byte_8_cqn;
268	__le32 cqe_cur_blk_addr;	272	__le32 cqe_cur_blk_addr;
269	__le32 byte_16_hop_addr;	273	__le32 byte_16_hop_addr;
270	__le32 cqe_nxt_blk_addr;	274	__le32 cqe_nxt_blk_addr;
271	__le32 byte_24_pgsz_addr;	275	__le32 byte_24_pgsz_addr;
272	__le32 byte_28_cq_pi;	276	__le32 byte_28_cq_pi;
273	__le32 byte_32_cq_ci;	277	__le32 byte_32_cq_ci;
274	__le32 cqe_ba;	278	__le32 cqe_ba;
275	__le32 byte_40_cqe_ba;	279	__le32 byte_40_cqe_ba;
276	__le32 byte_44_db_record;	280	__le32 byte_44_db_record;
277	__le32 db_record_addr;	281	__le32 db_record_addr;
278	__le32 byte_52_cqe_cnt;	282	__le32 byte_52_cqe_cnt;
279	__le32 byte_56_cqe_period_maxcnt;	283	__le32 byte_56_cqe_period_maxcnt;
280	__le32 cqe_report_timer;	284	__le32 cqe_report_timer;
281	__le32 byte_64_se_cqe_idx;	285	__le32 byte_64_se_cqe_idx;
282	};	286	};
		287
283	#define HNS_ROCE_V2_CQ_DEFAULT_BURST_NUM 0x0	288	#define HNS_ROCE_V2_CQ_DEFAULT_BURST_NUM 0x0
284	#define HNS_ROCE_V2_CQ_DEFAULT_INTERVAL 0x0	289	#define HNS_ROCE_V2_CQ_DEFAULT_INTERVAL 0x0
285		290
@@ -356,6 +361,10 @@ struct hns_roce_v2_cq_context { · 70 unmodified lines
356	#define V2_CQC_BYTE_64_SE_CQE_IDX_S 0	361	#define V2_CQC_BYTE_64_SE_CQE_IDX_S 0
357	#define V2_CQC_BYTE_64_SE_CQE_IDX_M GENMASK(23, 0)	362	#define V2_CQC_BYTE_64_SE_CQE_IDX_M GENMASK(23, 0)
358		363
		364	#define CQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cq_context, h, l)
		365
		366	#define CQC_STASH CQC_FIELD_LOC(63, 63)
		367
359	struct hns_roce_srq_context {	368	struct hns_roce_srq_context {
360	__le32 byte_4_srqn_srqst;	369	__le32 byte_4_srqn_srqst;
361	__le32 byte_8_limit_wl;	370	__le32 byte_8_limit_wl;
@@ -440,7 +449,7 @@ struct hns_roce_srq_context { · 78 unmodified lines
440	#define SRQC_BYTE_60_SRQ_DB_RECORD_ADDR_S 1	449	#define SRQC_BYTE_60_SRQ_DB_RECORD_ADDR_S 1
441	#define SRQC_BYTE_60_SRQ_DB_RECORD_ADDR_M GENMASK(31, 1)	450	#define SRQC_BYTE_60_SRQ_DB_RECORD_ADDR_M GENMASK(31, 1)
442		451
443	enum{	452	enum {
444	V2_MPT_ST_VALID = 0x1,	453	V2_MPT_ST_VALID = 0x1,
445	V2_MPT_ST_FREE = 0x2,	454	V2_MPT_ST_FREE = 0x2,
446	};	455	};
@@ -457,68 +466,72 @@ enum hns_roce_v2_qp_state { · 10 unmodified lines
457	HNS_ROCE_QP_NUM_ST	466	HNS_ROCE_QP_NUM_ST
458	};	467	};
459		468
		469	struct hns_roce_v2_qp_context_ex {
		470	__le32 data[64];
		471	};
460	struct hns_roce_v2_qp_context {	472	struct hns_roce_v2_qp_context {
461	__le32 byte_4_sqpn_tst;	473	__le32 byte_4_sqpn_tst;
462	__le32 wqe_sge_ba;	474	__le32 wqe_sge_ba;
463	__le32 byte_12_sq_hop;	475	__le32 byte_12_sq_hop;
464	__le32 byte_16_buf_ba_pg_sz;	476	__le32 byte_16_buf_ba_pg_sz;
465	__le32 byte_20_smac_sgid_idx;	477	__le32 byte_20_smac_sgid_idx;
466	__le32 byte_24_mtu_tc;	478	__le32 byte_24_mtu_tc;
467	__le32 byte_28_at_fl;	479	__le32 byte_28_at_fl;
468	u8 dgid[GID_LEN_V2];	480	u8 dgid[GID_LEN_V2];
469	__le32 dmac;	481	__le32 dmac;
470	__le32 byte_52_udpspn_dmac;	482	__le32 byte_52_udpspn_dmac;
471	__le32 byte_56_dqpn_err;	483	__le32 byte_56_dqpn_err;
472	__le32 byte_60_qpst_tempid;	484	__le32 byte_60_qpst_tempid;
473	__le32 qkey_xrcd;	485	__le32 qkey_xrcd;
474	__le32 byte_68_rq_db;	486	__le32 byte_68_rq_db;
475	__le32 rq_db_record_addr;	487	__le32 rq_db_record_addr;
476	__le32 byte_76_srqn_op_en;	488	__le32 byte_76_srqn_op_en;
477	__le32 byte_80_rnr_rx_cqn;	489	__le32 byte_80_rnr_rx_cqn;
478	__le32 byte_84_rq_ci_pi;	490	__le32 byte_84_rq_ci_pi;
479	__le32 rq_cur_blk_addr;	491	__le32 rq_cur_blk_addr;
480	__le32 byte_92_srq_info;	492	__le32 byte_92_srq_info;
481	__le32 byte_96_rx_reqmsn;	493	__le32 byte_96_rx_reqmsn;
482	__le32 rq_nxt_blk_addr;	494	__le32 rq_nxt_blk_addr;
483	__le32 byte_104_rq_sge;	495	__le32 byte_104_rq_sge;
484	__le32 byte_108_rx_reqepsn;	496	__le32 byte_108_rx_reqepsn;
485	__le32 rq_rnr_timer;	497	__le32 rq_rnr_timer;
486	__le32 rx_msg_len;	498	__le32 rx_msg_len;
487	__le32 rx_rkey_pkt_info;	499	__le32 rx_rkey_pkt_info;
488	__le64 rx_va;	500	__le64 rx_va;
489	__le32 byte_132_trrl;	501	__le32 byte_132_trrl;
490	__le32 trrl_ba;	502	__le32 trrl_ba;
491	__le32 byte_140_raq;	503	__le32 byte_140_raq;
492	__le32 byte_144_raq;	504	__le32 byte_144_raq;
493	__le32 byte_148_raq;	505	__le32 byte_148_raq;
494	__le32 byte_152_raq;	506	__le32 byte_152_raq;
495	__le32 byte_156_raq;	507	__le32 byte_156_raq;
496	__le32 byte_160_sq_ci_pi;	508	__le32 byte_160_sq_ci_pi;
497	__le32 sq_cur_blk_addr;	509	__le32 sq_cur_blk_addr;
498	__le32 byte_168_irrl_idx;	510	__le32 byte_168_irrl_idx;
499	__le32 byte_172_sq_psn;	511	__le32 byte_172_sq_psn;
500	__le32 byte_176_msg_pktn;	512	__le32 byte_176_msg_pktn;
501	__le32 sq_cur_sge_blk_addr;	513	__le32 sq_cur_sge_blk_addr;
502	__le32 byte_184_irrl_idx;	514	__le32 byte_184_irrl_idx;
503	__le32 cur_sge_offset;	515	__le32 cur_sge_offset;
504	__le32 byte_192_ext_sge;	516	__le32 byte_192_ext_sge;
505	__le32 byte_196_sq_psn;	517	__le32 byte_196_sq_psn;
506	__le32 byte_200_sq_max;	518	__le32 byte_200_sq_max;
507	__le32 irrl_ba;	519	__le32 irrl_ba;
508	__le32 byte_208_irrl;	520	__le32 byte_208_irrl;
509	__le32 byte_212_lsn;	521	__le32 byte_212_lsn;
510	__le32 sq_timer;	522	__le32 sq_timer;
511	__le32 byte_220_retry_psn_msn;	523	__le32 byte_220_retry_psn_msn;
512	__le32 byte_224_retry_msg;	524	__le32 byte_224_retry_msg;
513	__le32 rx_sq_cur_blk_addr;	525	__le32 rx_sq_cur_blk_addr;
514	__le32 byte_232_irrl_sge;	526	__le32 byte_232_irrl_sge;
515	__le32 irrl_cur_sge_offset;	527	__le32 irrl_cur_sge_offset;
516	__le32 byte_240_irrl_tail;	528	__le32 byte_240_irrl_tail;
517	__le32 byte_244_rnr_rxack;	529	__le32 byte_244_rnr_rxack;
518	__le32 byte_248_ack_psn;	530	__le32 byte_248_ack_psn;
519	__le32 byte_252_err_txcqn;	531	__le32 byte_252_err_txcqn;
520	__le32 byte_256_sqflush_rqcqe;	532	__le32 byte_256_sqflush_rqcqe;
521	__le32 ext[64];	533
		534	struct hns_roce_v2_qp_context_ex ext;
522	};	535	};
523		536
524	#define V2_QPC_BYTE_4_TST_S 0	537	#define V2_QPC_BYTE_4_TST_S 0
@@ -887,6 +900,10 @@ struct hns_roce_v2_qp_context { · 362 unmodified lines
887	#define V2_QPC_BYTE_256_SQ_FLUSH_IDX_S 16	900	#define V2_QPC_BYTE_256_SQ_FLUSH_IDX_S 16
888	#define V2_QPC_BYTE_256_SQ_FLUSH_IDX_M GENMASK(31, 16)	901	#define V2_QPC_BYTE_256_SQ_FLUSH_IDX_M GENMASK(31, 16)
889		902
		903	#define QPCEX_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context_ex, h, l)
		904
		905	#define QPCEX_STASH QPCEX_FIELD_LOC(82, 82)
		906
890	#define V2_QP_RWE_S 1 /* rdma write enable */	907	#define V2_QP_RWE_S 1 /* rdma write enable */
891	#define V2_QP_RRE_S 2 /* rdma read enable */	908	#define V2_QP_RRE_S 2 /* rdma read enable */
892	#define V2_QP_ATE_S 3 /* rdma atomic enable */	909	#define V2_QP_ATE_S 3 /* rdma atomic enable */
@@ -1073,12 +1090,13 @@ struct hns_roce_v2_ud_send_wqe { · 180 unmodified lines
1073	__le32 byte_32;	1090	__le32 byte_32;
1074	__le32 byte_36;	1091	__le32 byte_36;
1075	__le32 byte_40;	1092	__le32 byte_40;
1076	__le32 dmac;	1093	u8 dmac[ETH_ALEN];
1077	__le32 byte_48;	1094	u8 sgid_index;
		1095	u8 smac_index;
1078	u8 dgid[GID_LEN_V2];	1096	u8 dgid[GID_LEN_V2];
1079
1080	};	1097	};
1081	#define V2_UD_SEND_WQE_BYTE_4_OPCODE_S 0	1098
		1099	#define V2_UD_SEND_WQE_BYTE_4_OPCODE_S 0
1082	#define V2_UD_SEND_WQE_BYTE_4_OPCODE_M GENMASK(4, 0)	1100	#define V2_UD_SEND_WQE_BYTE_4_OPCODE_M GENMASK(4, 0)
1083		1101
1084	#define V2_UD_SEND_WQE_BYTE_4_OWNER_S 7	1102	#define V2_UD_SEND_WQE_BYTE_4_OWNER_S 7
@@ -1117,37 +1135,10 @@ struct hns_roce_v2_ud_send_wqe { · 32 unmodified lines
1117	#define V2_UD_SEND_WQE_BYTE_40_SL_S 20	1135	#define V2_UD_SEND_WQE_BYTE_40_SL_S 20
1118	#define V2_UD_SEND_WQE_BYTE_40_SL_M GENMASK(23, 20)	1136	#define V2_UD_SEND_WQE_BYTE_40_SL_M GENMASK(23, 20)
1119		1137
1120	#define V2_UD_SEND_WQE_BYTE_40_PORTN_S 24
1121	#define V2_UD_SEND_WQE_BYTE_40_PORTN_M GENMASK(26, 24)
1122
1123	#define V2_UD_SEND_WQE_BYTE_40_UD_VLAN_EN_S 30	1138	#define V2_UD_SEND_WQE_BYTE_40_UD_VLAN_EN_S 30
1124		1139
1125	#define V2_UD_SEND_WQE_BYTE_40_LBI_S 31	1140	#define V2_UD_SEND_WQE_BYTE_40_LBI_S 31
1126		1141
1127	#define V2_UD_SEND_WQE_DMAC_0_S 0
1128	#define V2_UD_SEND_WQE_DMAC_0_M GENMASK(7, 0)
1129
1130	#define V2_UD_SEND_WQE_DMAC_1_S 8
1131	#define V2_UD_SEND_WQE_DMAC_1_M GENMASK(15, 8)
1132
1133	#define V2_UD_SEND_WQE_DMAC_2_S 16
1134	#define V2_UD_SEND_WQE_DMAC_2_M GENMASK(23, 16)
1135
1136	#define V2_UD_SEND_WQE_DMAC_3_S 24
1137	#define V2_UD_SEND_WQE_DMAC_3_M GENMASK(31, 24)
1138
1139	#define V2_UD_SEND_WQE_BYTE_48_DMAC_4_S 0
1140	#define V2_UD_SEND_WQE_BYTE_48_DMAC_4_M GENMASK(7, 0)
1141
1142	#define V2_UD_SEND_WQE_BYTE_48_DMAC_5_S 8
1143	#define V2_UD_SEND_WQE_BYTE_48_DMAC_5_M GENMASK(15, 8)
1144
1145	#define V2_UD_SEND_WQE_BYTE_48_SGID_INDX_S 16
1146	#define V2_UD_SEND_WQE_BYTE_48_SGID_INDX_M GENMASK(23, 16)
1147
1148	#define V2_UD_SEND_WQE_BYTE_48_SMAC_INDX_S 24
1149	#define V2_UD_SEND_WQE_BYTE_48_SMAC_INDX_M GENMASK(31, 24)
1150
1151	struct hns_roce_v2_rc_send_wqe {	1142	struct hns_roce_v2_rc_send_wqe {
1152	__le32 byte_4;	1143	__le32 byte_4;
1153	__le32 msg_len;	1144	__le32 msg_len;
@@ -1334,7 +1325,7 @@ struct hns_roce_pf_res_b { · 180 unmodified lines
1334	__le32 sgid_idx_num;	1325	__le32 sgid_idx_num;
1335	__le32 qid_idx_sl_num;	1326	__le32 qid_idx_sl_num;
1336	__le32 sccc_bt_idx_num;	1327	__le32 sccc_bt_idx_num;
1337	__le32 rsv;	1328	__le32 gmv_idx_num;
1338	};	1329	};
1339		1330
1340	#define PF_RES_DATA_1_PF_SMAC_IDX_S 0	1331	#define PF_RES_DATA_1_PF_SMAC_IDX_S 0
@@ -1361,6 +1352,12 @@ struct hns_roce_pf_res_b { · 20 unmodified lines
1361	#define PF_RES_DATA_4_PF_SCCC_BT_NUM_S 9	1352	#define PF_RES_DATA_4_PF_SCCC_BT_NUM_S 9
1362	#define PF_RES_DATA_4_PF_SCCC_BT_NUM_M GENMASK(17, 9)	1353	#define PF_RES_DATA_4_PF_SCCC_BT_NUM_M GENMASK(17, 9)
1363		1354
		1355	#define PF_RES_DATA_5_PF_GMV_BT_IDX_S 0
		1356	#define PF_RES_DATA_5_PF_GMV_BT_IDX_M GENMASK(7, 0)
		1357
		1358	#define PF_RES_DATA_5_PF_GMV_BT_NUM_S 8
		1359	#define PF_RES_DATA_5_PF_GMV_BT_NUM_M GENMASK(16, 8)
		1360
1364	struct hns_roce_pf_timer_res_a {	1361	struct hns_roce_pf_timer_res_a {
1365	__le32 rsv0;	1362	__le32 rsv0;
1366	__le32 qpc_timer_bt_idx_num;	1363	__le32 qpc_timer_bt_idx_num;
@@ -1425,7 +1422,7 @@ struct hns_roce_vf_res_b { · 58 unmodified lines
1425	__le32 vf_sgid_idx_num;	1422	__le32 vf_sgid_idx_num;
1426	__le32 vf_qid_idx_sl_num;	1423	__le32 vf_qid_idx_sl_num;
1427	__le32 vf_sccc_idx_num;	1424	__le32 vf_sccc_idx_num;
1428	__le32 rsv1;	1425	__le32 vf_gmv_idx_num;
1429	};	1426	};
1430		1427
1431	#define VF_RES_B_DATA_0_VF_ID_S 0	1428	#define VF_RES_B_DATA_0_VF_ID_S 0
@@ -1455,6 +1452,12 @@ struct hns_roce_vf_res_b { · 23 unmodified lines
1455	#define VF_RES_B_DATA_4_VF_SCCC_BT_NUM_S 9	1452	#define VF_RES_B_DATA_4_VF_SCCC_BT_NUM_S 9
1456	#define VF_RES_B_DATA_4_VF_SCCC_BT_NUM_M GENMASK(17, 9)	1453	#define VF_RES_B_DATA_4_VF_SCCC_BT_NUM_M GENMASK(17, 9)
1457		1454
		1455	#define VF_RES_B_DATA_5_VF_GMV_BT_IDX_S 0
		1456	#define VF_RES_B_DATA_5_VF_GMV_BT_IDX_M GENMASK(7, 0)
		1457
		1458	#define VF_RES_B_DATA_5_VF_GMV_BT_NUM_S 16
		1459	#define VF_RES_B_DATA_5_VF_GMV_BT_NUM_M GENMASK(24, 16)
		1460
1458	struct hns_roce_vf_switch {	1461	struct hns_roce_vf_switch {
1459	__le32 rocee_sel;	1462	__le32 rocee_sel;
1460	__le32 fun_id;	1463	__le32 fun_id;
@@ -1577,6 +1580,46 @@ struct hns_roce_cfg_smac_tb { · 116 unmodified lines
1577	#define CFG_SMAC_TB_VF_SMAC_H_S 0	1580	#define CFG_SMAC_TB_VF_SMAC_H_S 0
1578	#define CFG_SMAC_TB_VF_SMAC_H_M GENMASK(15, 0)	1581	#define CFG_SMAC_TB_VF_SMAC_H_M GENMASK(15, 0)
1579		1582
		1583	struct hns_roce_cfg_gmv_bt {
		1584	__le32 gmv_ba_l;
		1585	__le32 gmv_ba_h;
		1586	__le32 gmv_bt_idx;
		1587	__le32 rsv[3];
		1588	};
		1589
		1590	#define CFG_GMV_BA_H_S 0
		1591	#define CFG_GMV_BA_H_M GENMASK(19, 0)
		1592
		1593	struct hns_roce_cfg_gmv_tb_a {
		1594	__le32 vf_sgid_l;
		1595	__le32 vf_sgid_ml;
		1596	__le32 vf_sgid_mh;
		1597	__le32 vf_sgid_h;
		1598	__le32 vf_sgid_type_vlan;
		1599	__le32 resv;
		1600	};
		1601
		1602	#define CFG_GMV_TB_SGID_IDX_S 0
		1603	#define CFG_GMV_TB_SGID_IDX_M GENMASK(7, 0)
		1604
		1605	#define CFG_GMV_TB_VF_SGID_TYPE_S 0
		1606	#define CFG_GMV_TB_VF_SGID_TYPE_M GENMASK(1, 0)
		1607
		1608	#define CFG_GMV_TB_VF_VLAN_EN_S 2
		1609
		1610	#define CFG_GMV_TB_VF_VLAN_ID_S 16
		1611	#define CFG_GMV_TB_VF_VLAN_ID_M GENMASK(27, 16)
		1612
		1613	struct hns_roce_cfg_gmv_tb_b {
		1614	__le32 vf_smac_l;
		1615	__le32 vf_smac_h;
		1616	__le32 table_idx_rsv;
		1617	__le32 resv[3];
		1618	};
		1619
		1620	#define CFG_GMV_TB_SMAC_H_S 0
		1621	#define CFG_GMV_TB_SMAC_H_M GENMASK(15, 0)
		1622
1580	#define HNS_ROCE_QUERY_PF_CAPS_CMD_NUM 5	1623	#define HNS_ROCE_QUERY_PF_CAPS_CMD_NUM 5
1581	struct hns_roce_query_pf_caps_a {	1624	struct hns_roce_query_pf_caps_a {
1582	u8 number_ports;	1625	u8 number_ports;

drivers/infiniband/hw/hns/hns_roce_main.c+37−45

@@ -33,13 +33,13 @@ · 32 unmodified lines
33	#include <linux/acpi.h>	33	#include <linux/acpi.h>
34	#include <linux/of_platform.h>	34	#include <linux/of_platform.h>
35	#include <linux/module.h>	35	#include <linux/module.h>
		36	#include <linux/pci.h>
36	#include <rdma/ib_addr.h>	37	#include <rdma/ib_addr.h>
37	#include <rdma/ib_smi.h>	38	#include <rdma/ib_smi.h>
38	#include <rdma/ib_user_verbs.h>	39	#include <rdma/ib_user_verbs.h>
39	#include <rdma/ib_cache.h>	40	#include <rdma/ib_cache.h>
40	#include "hns_roce_common.h"	41	#include "hns_roce_common.h"
41	#include "hns_roce_device.h"	42	#include "hns_roce_device.h"
42	#include <rdma/hns-abi.h>
43	#include "hns_roce_hem.h"	43	#include "hns_roce_hem.h"
44		44
45	/**	45	/**
@@ -53,7 +53,7 @@ · 7 unmodified lines
53	* GID[0][0], GID[1][0],.....GID[N - 1][0],	53	* GID[0][0], GID[1][0],.....GID[N - 1][0],
54	* And so on	54	* And so on
55	*/	55	*/
56	int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)	56	u8 hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)
57	{	57	{
58	return gid_index * hr_dev->caps.num_ports + port;	58	return gid_index * hr_dev->caps.num_ports + port;
59	}	59	}
@@ -61,7 +61,10 @@ int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index) · 1 unmodified line
61	static int hns_roce_set_mac(struct hns_roce_dev hr_dev, u8 port, u8 addr)	61	static int hns_roce_set_mac(struct hns_roce_dev hr_dev, u8 port, u8 addr)
62	{	62	{
63	u8 phy_port;	63	u8 phy_port;
64	u32 i = 0;	64	u32 i;
		65
		66	if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09)
		67	return 0;
65		68
66	if (!memcmp(hr_dev->dev_addr[port], addr, ETH_ALEN))	69	if (!memcmp(hr_dev->dev_addr[port], addr, ETH_ALEN))
67	return 0;	70	return 0;
@@ -90,14 +93,13 @@ static int hns_roce_add_gid(const struct ib_gid_attr attr, void *context) · 22 unmodified lines
90	static int hns_roce_del_gid(const struct ib_gid_attr attr, void *context)	93	static int hns_roce_del_gid(const struct ib_gid_attr attr, void *context)
91	{	94	{
92	struct hns_roce_dev *hr_dev = to_hr_dev(attr->device);	95	struct hns_roce_dev *hr_dev = to_hr_dev(attr->device);
93	struct ib_gid_attr zattr = {};
94	u8 port = attr->port_num - 1;	96	u8 port = attr->port_num - 1;
95	int ret;	97	int ret;
96		98
97	if (port >= hr_dev->caps.num_ports)	99	if (port >= hr_dev->caps.num_ports)
98	return -EINVAL;	100	return -EINVAL;
99		101
100	ret = hr_dev->hw->set_gid(hr_dev, port, attr->index, &zgid, &zattr);	102	ret = hr_dev->hw->set_gid(hr_dev, port, attr->index, NULL, NULL);
101		103
102	return ret;	104	return ret;
103	}	105	}
@@ -325,7 +327,8 @@ static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, · 221 unmodified lines
325		327
326	resp.cqe_size = hr_dev->caps.cqe_sz;	328	resp.cqe_size = hr_dev->caps.cqe_sz;
327		329
328	ret = ib_copy_to_udata(udata, &resp, sizeof(resp));	330	ret = ib_copy_to_udata(udata, &resp,
		331	min(udata->outlen, sizeof(resp)));
329	if (ret)	332	if (ret)
330	goto error_fail_copy_to_udata;	333	goto error_fail_copy_to_udata;
331		334
@@ -421,6 +424,7 @@ static const struct ib_device_ops hns_roce_dev_ops = { · 89 unmodified lines
421	.alloc_pd = hns_roce_alloc_pd,	424	.alloc_pd = hns_roce_alloc_pd,
422	.alloc_ucontext = hns_roce_alloc_ucontext,	425	.alloc_ucontext = hns_roce_alloc_ucontext,
423	.create_ah = hns_roce_create_ah,	426	.create_ah = hns_roce_create_ah,
		427	.create_user_ah = hns_roce_create_ah,
424	.create_cq = hns_roce_create_cq,	428	.create_cq = hns_roce_create_cq,
425	.create_qp = hns_roce_create_qp,	429	.create_qp = hns_roce_create_qp,
426	.dealloc_pd = hns_roce_dealloc_pd,	430	.dealloc_pd = hns_roce_dealloc_pd,
@@ -491,36 +495,13 @@ static int hns_roce_register_device(struct hns_roce_dev *hr_dev) · 64 unmodified lines
491	ib_dev->phys_port_cnt = hr_dev->caps.num_ports;	495	ib_dev->phys_port_cnt = hr_dev->caps.num_ports;
492	ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey;	496	ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey;
493	ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors;	497	ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors;
494	ib_dev->uverbs_cmd_mask =	498
495	(1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) \|	499	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_REREG_MR)
496	(1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) \|
497	(1ULL << IB_USER_VERBS_CMD_QUERY_PORT) \|
498	(1ULL << IB_USER_VERBS_CMD_ALLOC_PD) \|
499	(1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) \|
500	(1ULL << IB_USER_VERBS_CMD_REG_MR) \|
501	(1ULL << IB_USER_VERBS_CMD_DEREG_MR) \|
502	(1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) \|
503	(1ULL << IB_USER_VERBS_CMD_CREATE_CQ) \|
504	(1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) \|
505	(1ULL << IB_USER_VERBS_CMD_CREATE_QP) \|
506	(1ULL << IB_USER_VERBS_CMD_MODIFY_QP) \|
507	(1ULL << IB_USER_VERBS_CMD_QUERY_QP) \|
508	(1ULL << IB_USER_VERBS_CMD_DESTROY_QP);
509
510	ib_dev->uverbs_ex_cmd_mask \|= (1ULL << IB_USER_VERBS_EX_CMD_MODIFY_CQ);
511
512	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_REREG_MR) {
513	ib_dev->uverbs_cmd_mask \|= (1ULL << IB_USER_VERBS_CMD_REREG_MR);
514	ib_set_device_ops(ib_dev, &hns_roce_dev_mr_ops);	500	ib_set_device_ops(ib_dev, &hns_roce_dev_mr_ops);
515	}
516		501
517	/* MW */	502	/* MW */
518	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_MW) {	503	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_MW)
519	ib_dev->uverbs_cmd_mask \|=
520	(1ULL << IB_USER_VERBS_CMD_ALLOC_MW) \|
521	(1ULL << IB_USER_VERBS_CMD_DEALLOC_MW);
522	ib_set_device_ops(ib_dev, &hns_roce_dev_mw_ops);	504	ib_set_device_ops(ib_dev, &hns_roce_dev_mw_ops);
523	}
524		505
525	/* FRMR */	506	/* FRMR */
526	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_FRMR)	507	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_FRMR)
@@ -528,12 +509,6 @@ static int hns_roce_register_device(struct hns_roce_dev *hr_dev) · 1 unmodified line
528		509
529	/* SRQ */	510	/* SRQ */
530	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ) {	511	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ) {
531	ib_dev->uverbs_cmd_mask \|=
532	(1ULL << IB_USER_VERBS_CMD_CREATE_SRQ) \|
533	(1ULL << IB_USER_VERBS_CMD_MODIFY_SRQ) \|
534	(1ULL << IB_USER_VERBS_CMD_QUERY_SRQ) \|
535	(1ULL << IB_USER_VERBS_CMD_DESTROY_SRQ) \|
536	(1ULL << IB_USER_VERBS_CMD_POST_SRQ_RECV);
537	ib_set_device_ops(ib_dev, &hns_roce_dev_srq_ops);	512	ib_set_device_ops(ib_dev, &hns_roce_dev_srq_ops);
538	ib_set_device_ops(ib_dev, hr_dev->hw->hns_roce_dev_srq_ops);	513	ib_set_device_ops(ib_dev, hr_dev->hw->hns_roce_dev_srq_ops);
539	}	514	}
@@ -580,8 +555,8 @@ error_failed_setup_mtu_mac: · 40 unmodified lines
580		555
581	static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)	556	static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
582	{	557	{
583	int ret;
584	struct device *dev = hr_dev->dev;	558	struct device *dev = hr_dev->dev;
		559	int ret;
585		560
586	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,	561	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,
587	HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,	562	HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,
@@ -631,7 +606,7 @@ static int hns_roce_init_hem(struct hns_roce_dev *hr_dev) · 43 unmodified lines
631	goto err_unmap_trrl;	606	goto err_unmap_trrl;
632	}	607	}
633		608
634	if (hr_dev->caps.srqc_entry_sz) {	609	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ) {
635	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->srq_table.table,	610	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->srq_table.table,
636	HEM_TYPE_SRQC,	611	HEM_TYPE_SRQC,
637	hr_dev->caps.srqc_entry_sz,	612	hr_dev->caps.srqc_entry_sz,
@@ -643,7 +618,7 @@ static int hns_roce_init_hem(struct hns_roce_dev *hr_dev) · 5 unmodified lines
643	}	618	}
644	}	619	}
645		620
646	if (hr_dev->caps.sccc_sz) {	621	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_QP_FLOW_CTRL) {
647	ret = hns_roce_init_hem_table(hr_dev,	622	ret = hns_roce_init_hem_table(hr_dev,
648	&hr_dev->qp_table.sccc_table,	623	&hr_dev->qp_table.sccc_table,
649	HEM_TYPE_SCCC,	624	HEM_TYPE_SCCC,
@@ -680,18 +655,35 @@ static int hns_roce_init_hem(struct hns_roce_dev *hr_dev) · 30 unmodified lines
680	}	655	}
681	}	656	}
682		657
		658	if (hr_dev->caps.gmv_entry_sz) {
		659	ret = hns_roce_init_hem_table(hr_dev, &hr_dev->gmv_table,
		660	HEM_TYPE_GMV,
		661	hr_dev->caps.gmv_entry_sz,
		662	hr_dev->caps.gmv_entry_num, 1);
		663	if (ret) {
		664	dev_err(dev,
		665	"failed to init gmv table memory, ret = %d\n",
		666	ret);
		667	goto err_unmap_cqc_timer;
		668	}
		669	}
		670
683	return 0;	671	return 0;
684		672
		673	err_unmap_cqc_timer:
		674	if (hr_dev->caps.cqc_timer_entry_sz)
		675	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->cqc_timer_table);
		676
685	err_unmap_qpc_timer:	677	err_unmap_qpc_timer:
686	if (hr_dev->caps.qpc_timer_entry_sz)	678	if (hr_dev->caps.qpc_timer_entry_sz)
687	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qpc_timer_table);	679	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qpc_timer_table);
688		680
689	err_unmap_ctx:	681	err_unmap_ctx:
690	if (hr_dev->caps.sccc_sz)	682	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_QP_FLOW_CTRL)
691	hns_roce_cleanup_hem_table(hr_dev,	683	hns_roce_cleanup_hem_table(hr_dev,
692	&hr_dev->qp_table.sccc_table);	684	&hr_dev->qp_table.sccc_table);
693	err_unmap_srq:	685	err_unmap_srq:
694	if (hr_dev->caps.srqc_entry_sz)	686	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SRQ)
695	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->srq_table.table);	687	hns_roce_cleanup_hem_table(hr_dev, &hr_dev->srq_table.table);
696		688
697	err_unmap_cq:	689	err_unmap_cq:
@@ -721,8 +713,8 @@ err_unmap_dmpt: · 23 unmodified lines
721	*/	713	*/
722	static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)	714	static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)
723	{	715	{
724	int ret;
725	struct device *dev = hr_dev->dev;	716	struct device *dev = hr_dev->dev;
		717	int ret;
726		718
727	spin_lock_init(&hr_dev->sm_lock);	719	spin_lock_init(&hr_dev->sm_lock);
728	spin_lock_init(&hr_dev->bt_cmd_lock);	720	spin_lock_init(&hr_dev->bt_cmd_lock);
@@ -846,8 +838,8 @@ void hns_roce_handle_device_err(struct hns_roce_dev *hr_dev) · 117 unmodified lines
846		838
847	int hns_roce_init(struct hns_roce_dev *hr_dev)	839	int hns_roce_init(struct hns_roce_dev *hr_dev)
848	{	840	{
849	int ret;
850	struct device *dev = hr_dev->dev;	841	struct device *dev = hr_dev->dev;
		842	int ret;
851		843
852	if (hr_dev->hw->reset) {	844	if (hr_dev->hw->reset) {
853	ret = hr_dev->hw->reset(hr_dev, true);	845	ret = hr_dev->hw->reset(hr_dev, true);

drivers/infiniband/hw/hns/hns_roce_mr.c+33−46

 static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev,
 			      struct hns_roce_mr *mr)
 {
-	int ret;
 	unsigned long mtpt_idx = key_to_hw_index(mr->key);
-	struct device *dev = hr_dev->dev;
 	struct hns_roce_cmd_mailbox *mailbox;
+	struct device *dev = hr_dev->dev;
+	int ret;
 	/* Allocate mailbox memory */
 	mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
 	else
 		ret = hr_dev->hw->frmr_write_mtpt(hr_dev, mailbox->buf, mr);
 	if (ret) {
-		dev_err(dev, "Write mtpt fail!\n");
+		dev_err(dev, "failed to write mtpt, ret = %d.\n", ret);
 		goto err_page;
 	}
 	ret = hns_roce_hw_create_mpt(hr_dev, mailbox,
 				     mtpt_idx & (hr_dev->caps.num_mtpts - 1));
 	if (ret) {
-		dev_err(dev, "CREATE_MPT failed (%d)\n", ret);
+		dev_err(dev, "failed to create mpt, ret = %d.\n", ret);
 		goto err_page;
 	}
 	return ret;
 }
-int hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start, u64 length,
+struct ib_mr *hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start,
-			   u64 virt_addr, int mr_access_flags, struct ib_pd *pd,
+				     u64 length, u64 virt_addr,
-			   struct ib_udata *udata)
+				     int mr_access_flags, struct ib_pd *pd,
+				     struct ib_udata *udata)
 {
 	struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device);
 	struct ib_device *ib_dev = &hr_dev->ib_dev;
 	int ret;
 	if (!mr->enabled)
-		return -EINVAL;
+		return ERR_PTR(-EINVAL);
 	mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
 	if (IS_ERR(mailbox))
-		return PTR_ERR(mailbox);
+		return ERR_CAST(mailbox);
 	mtpt_idx = key_to_hw_index(mr->key) & (hr_dev->caps.num_mtpts - 1);
 	ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, mtpt_idx, 0,
 	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
-	return 0;
+	return NULL;
 free_cmd_mbox:
 	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
-	return ret;
+	return ERR_PTR(ret);
 }
 int hns_roce_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
 	ret = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, hns_roce_set_page);
 	if (ret < 1) {
-		ibdev_err(ibdev, "failed to store sg pages %d %d, cnt = %d.\n",
+		ibdev_err(ibdev, "failed to store sg pages %u %u, cnt = %d.\n",
 			  mr->npages, mr->pbl_mtr.hem_cfg.buf_pg_count, ret);
 		goto err_page_list;
 	}
 		ibdev_err(ibdev, "failed to map sg mtr, ret = %d.\n", ret);
 		ret = 0;
 	} else {
-		mr->pbl_mtr.hem_cfg.buf_pg_shift = ilog2(ibmr->page_size);
+		mr->pbl_mtr.hem_cfg.buf_pg_shift = (u32)ilog2(ibmr->page_size);
 		ret = mr->npages;
 	}
 	return size;
 }
-static inline size_t mtr_kmem_direct_size(bool is_direct, size_t alloc_size,
-					  unsigned int page_shift)
-{
-	if (is_direct)
-		return ALIGN(alloc_size, 1 << page_shift);
-	else
-		return HNS_HW_DIRECT_PAGE_COUNT << page_shift;
-}
 /*
  * check the given pages in continuous address space
  * Returns 0 on success, or the error page num.
 	/* release kernel buffers */
 	if (mtr->kmem) {
 		hns_roce_buf_free(hr_dev, mtr->kmem);
-		kfree(mtr->kmem);
 		mtr->kmem = NULL;
 	}
 }
 	struct ib_device *ibdev = &hr_dev->ib_dev;
 	unsigned int best_pg_shift;
 	int all_pg_count = 0;
-	size_t direct_size;
 	size_t total_size;
 	int ret;
 	total_size = mtr_bufs_size(buf_attr);
 	if (total_size < 1) {
-		ibdev_err(ibdev, "Failed to check mtr size\n");
+		ibdev_err(ibdev, "failed to check mtr size\n.");
 		return -EINVAL;
 	}
 		mtr->umem = ib_umem_get(ibdev, user_addr, total_size,
 					buf_attr->user_access);
 		if (IS_ERR_OR_NULL(mtr->umem)) {
-			ibdev_err(ibdev, "Failed to get umem, ret %ld\n",
+			ibdev_err(ibdev, "failed to get umem, ret = %ld.\n",
 				  PTR_ERR(mtr->umem));
 			return -ENOMEM;
 		}
 		ret = 0;
 	} else {
 		mtr->umem = NULL;
-		mtr->kmem = kzalloc(sizeof(*mtr->kmem), GFP_KERNEL);
+		mtr->kmem =
-		if (!mtr->kmem) {
+			hns_roce_buf_alloc(hr_dev, total_size,
-			ibdev_err(ibdev, "Failed to alloc kmem\n");
+					   buf_attr->page_shift,
-			return -ENOMEM;
+					   is_direct ? HNS_ROCE_BUF_DIRECT : 0);
-		}
+		if (IS_ERR(mtr->kmem)) {
-		direct_size = mtr_kmem_direct_size(is_direct, total_size,
+			ibdev_err(ibdev, "failed to alloc kmem, ret = %ld.\n",
-						   buf_attr->page_shift);
+				  PTR_ERR(mtr->kmem));
-		ret = hns_roce_buf_alloc(hr_dev, total_size, direct_size,
+			return PTR_ERR(mtr->kmem);
-					 mtr->kmem, buf_attr->page_shift);
-		if (ret) {
-			ibdev_err(ibdev, "Failed to alloc kmem, ret %d\n", ret);
-			goto err_alloc_mem;
 		}
 		best_pg_shift = buf_attr->page_shift;
 		all_pg_count = mtr->kmem->npages;
 	}
 	/* must bigger than minimum hardware page shift */
 	if (best_pg_shift < HNS_HW_PAGE_SHIFT || all_pg_count < 1) {
 		ret = -EINVAL;
-		ibdev_err(ibdev, "Failed to check mtr page shift %d count %d\n",
+		ibdev_err(ibdev,
+			  "failed to check mtr, page shift = %u count = %d.\n",
 			  best_pg_shift, all_pg_count);
 		goto err_alloc_mem;
 	}
 }
 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
-		     dma_addr_t *pages, int page_cnt)
+		     dma_addr_t *pages, unsigned int page_cnt)
 {
 	struct ib_device *ibdev = &hr_dev->ib_dev;
 	struct hns_roce_buf_region *r;
+	unsigned int i;
 	int err;
-	int i;
 	/*
 	 * Only use the first page address as root ba when hopnum is 0, this
 		if (r->offset + r->count > page_cnt) {
 			err = -EINVAL;
 			ibdev_err(ibdev,
-				  "Failed to check mtr%d end %d + %d, max %d\n",
+				  "failed to check mtr%u end %u + %u, max %u.\n",
 				  i, r->offset, r->count, page_cnt);
 			return err;
 		}
 		err = mtr_map_region(hr_dev, mtr, &pages[r->offset], r);
 		if (err) {
 			ibdev_err(ibdev,
-				  "Failed to map mtr%d offset %d, err %d\n",
+				  "failed to map mtr%u offset %u, ret = %d.\n",
 				  i, r->offset, err);
 			return err;
 		}
 		      int offset, u64 *mtt_buf, int mtt_max, u64 *base_addr)
 {
 	struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
+	int mtt_count, left;
 	int start_index;
-	int mtt_count;
 	int total = 0;
 	__le64 *mtts;
-	int npage;
+	u32 npage;
 	u64 addr;
-	int left;
 	if (!mtt_buf || mtt_max < 1)
 		goto done;

drivers/infiniband/hw/hns/hns_roce_pd.c+7−7

 #include <linux/platform_device.h>
 #include <linux/pci.h>
-#include <uapi/rdma/hns-abi.h>
 #include "hns_roce_device.h"
 static int hns_roce_pd_alloc(struct hns_roce_dev *hr_dev, unsigned long *pdn)
 	ret = hns_roce_pd_alloc(to_hr_dev(ib_dev), &pd->pdn);
 	if (ret) {
-		ibdev_err(ib_dev, "failed to alloc pd, ret = %d\n", ret);
+		ibdev_err(ib_dev, "failed to alloc pd, ret = %d.\n", ret);
 		return ret;
 	}
 	if (udata) {
-		struct hns_roce_ib_alloc_pd_resp uresp = {.pdn = pd->pdn};
+		struct hns_roce_ib_alloc_pd_resp resp = {.pdn = pd->pdn};
-		if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
+		ret = ib_copy_to_udata(udata, &resp,
+				       min(udata->outlen, sizeof(resp)));
+		if (ret) {
 			hns_roce_pd_free(to_hr_dev(ib_dev), pd->pdn);
-			ibdev_err(ib_dev, "failed to copy to udata\n");
+			ibdev_err(ib_dev, "failed to copy to udata, ret = %d\n", ret);
-			return -EFAULT;
 		}
 	}
-	return 0;
+	return ret;
 }
 int hns_roce_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)

drivers/infiniband/hw/hns/hns_roce_qp.c+196−104

@@ -39,7 +39,6 @@ · 38 unmodified lines
39	#include "hns_roce_common.h"	39	#include "hns_roce_common.h"
40	#include "hns_roce_device.h"	40	#include "hns_roce_device.h"
41	#include "hns_roce_hem.h"	41	#include "hns_roce_hem.h"
42	#include <rdma/hns-abi.h>
43		42
44	static void flush_work_handle(struct work_struct *work)	43	static void flush_work_handle(struct work_struct *work)
45	{	44	{
@@ -114,8 +113,8 @@ void hns_roce_qp_event(struct hns_roce_dev *hr_dev, u32 qpn, int event_type) · 68 unmodified lines
114	static void hns_roce_ib_qp_event(struct hns_roce_qp *hr_qp,	113	static void hns_roce_ib_qp_event(struct hns_roce_qp *hr_qp,
115	enum hns_roce_event type)	114	enum hns_roce_event type)
116	{	115	{
117	struct ib_event event;
118	struct ib_qp *ibqp = &hr_qp->ibqp;	116	struct ib_qp *ibqp = &hr_qp->ibqp;
		117	struct ib_event event;
119		118
120	if (ibqp->event_handler) {	119	if (ibqp->event_handler) {
121	event.device = ibqp->device;	120	event.device = ibqp->device;
@@ -154,9 +153,50 @@ static void hns_roce_ib_qp_event(struct hns_roce_qp *hr_qp, · 32 unmodified lines
154	}	153	}
155	}	154	}
156		155
		156	static u8 get_least_load_bankid_for_qp(struct hns_roce_bank *bank)
		157	{
		158	u32 least_load = bank[0].inuse;
		159	u8 bankid = 0;
		160	u32 bankcnt;
		161	u8 i;
		162
		163	for (i = 1; i < HNS_ROCE_QP_BANK_NUM; i++) {
		164	bankcnt = bank[i].inuse;
		165	if (bankcnt < least_load) {
		166	least_load = bankcnt;
		167	bankid = i;
		168	}
		169	}
		170
		171	return bankid;
		172	}
		173
		174	static int alloc_qpn_with_bankid(struct hns_roce_bank *bank, u8 bankid,
		175	unsigned long *qpn)
		176	{
		177	int id;
		178
		179	id = ida_alloc_range(&bank->ida, bank->next, bank->max, GFP_KERNEL);
		180	if (id < 0) {
		181	id = ida_alloc_range(&bank->ida, bank->min, bank->max,
		182	GFP_KERNEL);
		183	if (id < 0)
		184	return id;
		185	}
		186
		187	/* the QPN should keep increasing until the max value is reached. */
		188	bank->next = (id + 1) > bank->max ? bank->min : id + 1;
		189
		190	/* the lower 3 bits is bankid */
		191	*qpn = (id << 3) \| bankid;
		192
		193	return 0;
		194	}
157	static int alloc_qpn(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp)	195	static int alloc_qpn(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp)
158	{	196	{
		197	struct hns_roce_qp_table *qp_table = &hr_dev->qp_table;
159	unsigned long num = 0;	198	unsigned long num = 0;
		199	u8 bankid;
160	int ret;	200	int ret;
161		201
162	if (hr_qp->ibqp.qp_type == IB_QPT_GSI) {	202	if (hr_qp->ibqp.qp_type == IB_QPT_GSI) {
@@ -169,13 +209,21 @@ static int alloc_qpn(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp) · 6 unmodified lines
169		209
170	hr_qp->doorbell_qpn = 1;	210	hr_qp->doorbell_qpn = 1;
171	} else {	211	} else {
172	ret = hns_roce_bitmap_alloc_range(&hr_dev->qp_table.bitmap,	212	spin_lock(&qp_table->bank_lock);
173	1, 1, &num);	213	bankid = get_least_load_bankid_for_qp(qp_table->bank);
		214
		215	ret = alloc_qpn_with_bankid(&qp_table->bank[bankid], bankid,
		216	&num);
174	if (ret) {	217	if (ret) {
175	ibdev_err(&hr_dev->ib_dev, "Failed to alloc bitmap\n");	218	ibdev_err(&hr_dev->ib_dev,
176	return -ENOMEM;	219	"failed to alloc QPN, ret = %d\n", ret);
		220	spin_unlock(&qp_table->bank_lock);
		221	return ret;
177	}	222	}
178		223
		224	qp_table->bank[bankid].inuse++;
		225	spin_unlock(&qp_table->bank_lock);
		226
179	hr_qp->doorbell_qpn = (u32)num;	227	hr_qp->doorbell_qpn = (u32)num;
180	}	228	}
181		229
@@ -286,7 +334,7 @@ static int alloc_qpc(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp) · 104 unmodified lines
286	}	334	}
287	}	335	}
288		336
289	if (hr_dev->caps.sccc_sz) {	337	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_QP_FLOW_CTRL) {
290	/* Alloc memory for SCC CTX */	338	/* Alloc memory for SCC CTX */
291	ret = hns_roce_table_get(hr_dev, &qp_table->sccc_table,	339	ret = hns_roce_table_get(hr_dev, &qp_table->sccc_table,
292	hr_qp->qpn);	340	hr_qp->qpn);
@@ -340,9 +388,15 @@ static void free_qpc(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp) · 47 unmodified lines
340	hns_roce_table_put(hr_dev, &qp_table->irrl_table, hr_qp->qpn);	388	hns_roce_table_put(hr_dev, &qp_table->irrl_table, hr_qp->qpn);
341	}	389	}
342		390
		391	static inline u8 get_qp_bankid(unsigned long qpn)
		392	{
		393	/* The lower 3 bits of QPN are used to hash to different banks */
		394	return (u8)(qpn & GENMASK(2, 0));
		395	}
		396
343	static void free_qpn(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp)	397	static void free_qpn(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp)
344	{	398	{
345	struct hns_roce_qp_table *qp_table = &hr_dev->qp_table;	399	u8 bankid;
346		400
347	if (hr_qp->ibqp.qp_type == IB_QPT_GSI)	401	if (hr_qp->ibqp.qp_type == IB_QPT_GSI)
348	return;	402	return;
@@ -350,7 +404,13 @@ static void free_qpn(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp) · 1 unmodified line
350	if (hr_qp->qpn < hr_dev->caps.reserved_qps)	404	if (hr_qp->qpn < hr_dev->caps.reserved_qps)
351	return;	405	return;
352		406
353	hns_roce_bitmap_free_range(&qp_table->bitmap, hr_qp->qpn, 1, BITMAP_RR);	407	bankid = get_qp_bankid(hr_qp->qpn);
		408
		409	ida_free(&hr_dev->qp_table.bank[bankid].ida, hr_qp->qpn >> 3);
		410
		411	spin_lock(&hr_dev->qp_table.bank_lock);
		412	hr_dev->qp_table.bank[bankid].inuse--;
		413	spin_unlock(&hr_dev->qp_table.bank_lock);
354	}	414	}
355		415
356	static int set_rq_size(struct hns_roce_dev hr_dev, struct ib_qp_cap cap,	416	static int set_rq_size(struct hns_roce_dev hr_dev, struct ib_qp_cap cap,
@@ -404,37 +464,43 @@ static int set_rq_size(struct hns_roce_dev hr_dev, struct ib_qp_cap cap, · 47 unmodified lines
404	return 0;	464	return 0;
405	}	465	}
406		466
407	static int set_extend_sge_param(struct hns_roce_dev *hr_dev, u32 sq_wqe_cnt,	467	static u32 get_wqe_ext_sge_cnt(struct hns_roce_qp *qp)
408	struct hns_roce_qp *hr_qp,
409	struct ib_qp_cap *cap)
410	{	468	{
411	u32 cnt;	469	/* GSI/UD QP only has extended sge */
		470	if (qp->ibqp.qp_type == IB_QPT_GSI \|\| qp->ibqp.qp_type == IB_QPT_UD)
		471	return qp->sq.max_gs;
412		472
413	cnt = max(1U, cap->max_send_sge);	473	if (qp->sq.max_gs > HNS_ROCE_SGE_IN_WQE)
414	if (hr_dev->hw_rev == HNS_ROCE_HW_VER1) {	474	return qp->sq.max_gs - HNS_ROCE_SGE_IN_WQE;
415	hr_qp->sq.max_gs = roundup_pow_of_two(cnt);
416	hr_qp->sge.sge_cnt = 0;
417		475
418	return 0;	476	return 0;
419	}	477	}
420		478
421	hr_qp->sq.max_gs = cnt;	479	static void set_ext_sge_param(struct hns_roce_dev *hr_dev, u32 sq_wqe_cnt,
		480	struct hns_roce_qp hr_qp, struct ib_qp_cap cap)
		481	{
		482	u32 total_sge_cnt;
		483	u32 wqe_sge_cnt;
422		484
423	/* UD sqwqe's sge use extend sge */	485	hr_qp->sge.sge_shift = HNS_ROCE_SGE_SHIFT;
424	if (hr_qp->ibqp.qp_type == IB_QPT_GSI \|\|	486
425	hr_qp->ibqp.qp_type == IB_QPT_UD) {	487	if (hr_dev->hw_rev == HNS_ROCE_HW_VER1) {
426	cnt = roundup_pow_of_two(sq_wqe_cnt * hr_qp->sq.max_gs);	488	hr_qp->sq.max_gs = HNS_ROCE_SGE_IN_WQE;
427	} else if (hr_qp->sq.max_gs > HNS_ROCE_SGE_IN_WQE) {	489	return;
428	cnt = roundup_pow_of_two(sq_wqe_cnt *
429	(hr_qp->sq.max_gs - HNS_ROCE_SGE_IN_WQE));
430	} else {
431	cnt = 0;
432	}	490	}
433		491
434	hr_qp->sge.sge_shift = HNS_ROCE_SGE_SHIFT;	492	hr_qp->sq.max_gs = max(1U, cap->max_send_sge);
435	hr_qp->sge.sge_cnt = cnt;
436		493
437	return 0;	494	wqe_sge_cnt = get_wqe_ext_sge_cnt(hr_qp);
		495
		496	/* If the number of extended sge is not zero, they MUST use the
		497	* space of HNS_HW_PAGE_SIZE at least.
		498	*/
		499	if (wqe_sge_cnt) {
		500	total_sge_cnt = roundup_pow_of_two(sq_wqe_cnt * wqe_sge_cnt);
		501	hr_qp->sge.sge_cnt = max(total_sge_cnt,
		502	(u32)HNS_HW_PAGE_SIZE / HNS_ROCE_SGE_SIZE);
		503	}
438	}	504	}
439		505
440	static int check_sq_size_with_integrity(struct hns_roce_dev *hr_dev,	506	static int check_sq_size_with_integrity(struct hns_roce_dev *hr_dev,
@@ -447,12 +513,12 @@ static int check_sq_size_with_integrity(struct hns_roce_dev *hr_dev, · 6 unmodified lines
447	/* Sanity check SQ size before proceeding */	513	/* Sanity check SQ size before proceeding */
448	if (ucmd->log_sq_stride > max_sq_stride \|\|	514	if (ucmd->log_sq_stride > max_sq_stride \|\|
449	ucmd->log_sq_stride < HNS_ROCE_IB_MIN_SQ_STRIDE) {	515	ucmd->log_sq_stride < HNS_ROCE_IB_MIN_SQ_STRIDE) {
450	ibdev_err(&hr_dev->ib_dev, "Failed to check SQ stride size\n");	516	ibdev_err(&hr_dev->ib_dev, "failed to check SQ stride size.\n");
451	return -EINVAL;	517	return -EINVAL;
452	}	518	}
453		519
454	if (cap->max_send_sge > hr_dev->caps.max_sq_sg) {	520	if (cap->max_send_sge > hr_dev->caps.max_sq_sg) {
455	ibdev_err(&hr_dev->ib_dev, "Failed to check SQ SGE size %d\n",	521	ibdev_err(&hr_dev->ib_dev, "failed to check SQ SGE size %u.\n",
456	cap->max_send_sge);	522	cap->max_send_sge);
457	return -EINVAL;	523	return -EINVAL;
458	}	524	}
@@ -479,9 +545,7 @@ static int set_user_sq_size(struct hns_roce_dev *hr_dev, · 20 unmodified lines
479	return ret;	545	return ret;
480	}	546	}
481		547
482	ret = set_extend_sge_param(hr_dev, cnt, hr_qp, cap);	548	set_ext_sge_param(hr_dev, cnt, hr_qp, cap);
483	if (ret)
484	return ret;
485		549
486	hr_qp->sq.wqe_shift = ucmd->log_sq_stride;	550	hr_qp->sq.wqe_shift = ucmd->log_sq_stride;
487	hr_qp->sq.wqe_cnt = cnt;	551	hr_qp->sq.wqe_cnt = cnt;
@@ -546,7 +610,6 @@ static int set_kernel_sq_size(struct hns_roce_dev *hr_dev, · 58 unmodified lines
546	{	610	{
547	struct ib_device *ibdev = &hr_dev->ib_dev;	611	struct ib_device *ibdev = &hr_dev->ib_dev;
548	u32 cnt;	612	u32 cnt;
549	int ret;
550		613
551	if (!cap->max_send_wr \|\| cap->max_send_wr > hr_dev->caps.max_wqes \|\|	614	if (!cap->max_send_wr \|\| cap->max_send_wr > hr_dev->caps.max_wqes \|\|
552	cap->max_send_sge > hr_dev->caps.max_sq_sg) {	615	cap->max_send_sge > hr_dev->caps.max_sq_sg) {
@@ -558,7 +621,7 @@ static int set_kernel_sq_size(struct hns_roce_dev *hr_dev, · 5 unmodified lines
558		621
559	cnt = roundup_pow_of_two(max(cap->max_send_wr, hr_dev->caps.min_wqes));	622	cnt = roundup_pow_of_two(max(cap->max_send_wr, hr_dev->caps.min_wqes));
560	if (cnt > hr_dev->caps.max_wqes) {	623	if (cnt > hr_dev->caps.max_wqes) {
561	ibdev_err(ibdev, "failed to check WQE num, WQE num = %d.\n",	624	ibdev_err(ibdev, "failed to check WQE num, WQE num = %u.\n",
562	cnt);	625	cnt);
563	return -EINVAL;	626	return -EINVAL;
564	}	627	}
@@ -566,9 +629,7 @@ static int set_kernel_sq_size(struct hns_roce_dev *hr_dev, · 1 unmodified line
566	hr_qp->sq.wqe_shift = ilog2(hr_dev->caps.max_sq_desc_sz);	629	hr_qp->sq.wqe_shift = ilog2(hr_dev->caps.max_sq_desc_sz);
567	hr_qp->sq.wqe_cnt = cnt;	630	hr_qp->sq.wqe_cnt = cnt;
568		631
569	ret = set_extend_sge_param(hr_dev, cnt, hr_qp, cap);	632	set_ext_sge_param(hr_dev, cnt, hr_qp, cap);
570	if (ret)
571	return ret;
572		633
573	/* sync the parameters of kernel QP to user's configuration */	634	/* sync the parameters of kernel QP to user's configuration */
574	cap->max_send_wr = cnt;	635	cap->max_send_wr = cnt;
@@ -725,13 +786,17 @@ static int alloc_qp_db(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp, · 150 unmodified lines
725	struct ib_device *ibdev = &hr_dev->ib_dev;	786	struct ib_device *ibdev = &hr_dev->ib_dev;
726	int ret;	787	int ret;
727		788
		789	if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_SDI_MODE)
		790	hr_qp->en_flags \|= HNS_ROCE_QP_CAP_OWNER_DB;
		791
728	if (udata) {	792	if (udata) {
729	if (user_qp_has_sdb(hr_dev, init_attr, udata, resp, ucmd)) {	793	if (user_qp_has_sdb(hr_dev, init_attr, udata, resp, ucmd)) {
730	ret = hns_roce_db_map_user(uctx, udata, ucmd->sdb_addr,	794	ret = hns_roce_db_map_user(uctx, udata, ucmd->sdb_addr,
731	&hr_qp->sdb);	795	&hr_qp->sdb);
732	if (ret) {	796	if (ret) {
733	ibdev_err(ibdev,	797	ibdev_err(ibdev,
734	"Failed to map user SQ doorbell\n");	798	"failed to map user SQ doorbell, ret = %d.\n",
		799	ret);
735	goto err_out;	800	goto err_out;
736	}	801	}
737	hr_qp->en_flags \|= HNS_ROCE_QP_CAP_SQ_RECORD_DB;	802	hr_qp->en_flags \|= HNS_ROCE_QP_CAP_SQ_RECORD_DB;
@@ -743,7 +808,8 @@ static int alloc_qp_db(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp, · 5 unmodified lines
743	&hr_qp->rdb);	808	&hr_qp->rdb);
744	if (ret) {	809	if (ret) {
745	ibdev_err(ibdev,	810	ibdev_err(ibdev,
746	"Failed to map user RQ doorbell\n");	811	"failed to map user RQ doorbell, ret = %d.\n",
		812	ret);
747	goto err_sdb;	813	goto err_sdb;
748	}	814	}
749	hr_qp->en_flags \|= HNS_ROCE_QP_CAP_RQ_RECORD_DB;	815	hr_qp->en_flags \|= HNS_ROCE_QP_CAP_RQ_RECORD_DB;
@@ -760,7 +826,8 @@ static int alloc_qp_db(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp, · 10 unmodified lines
760	ret = hns_roce_alloc_db(hr_dev, &hr_qp->rdb, 0);	826	ret = hns_roce_alloc_db(hr_dev, &hr_qp->rdb, 0);
761	if (ret) {	827	if (ret) {
762	ibdev_err(ibdev,	828	ibdev_err(ibdev,
763	"Failed to alloc kernel RQ doorbell\n");	829	"failed to alloc kernel RQ doorbell, ret = %d.\n",
		830	ret);
764	goto err_out;	831	goto err_out;
765	}	832	}
766	*hr_qp->rdb.db_record = 0;	833	*hr_qp->rdb.db_record = 0;
@@ -803,14 +870,14 @@ static int alloc_kernel_wrid(struct hns_roce_dev *hr_dev, · 36 unmodified lines
803		870
804	sq_wrid = kcalloc(hr_qp->sq.wqe_cnt, sizeof(u64), GFP_KERNEL);	871	sq_wrid = kcalloc(hr_qp->sq.wqe_cnt, sizeof(u64), GFP_KERNEL);
805	if (ZERO_OR_NULL_PTR(sq_wrid)) {	872	if (ZERO_OR_NULL_PTR(sq_wrid)) {
806	ibdev_err(ibdev, "Failed to alloc SQ wrid\n");	873	ibdev_err(ibdev, "failed to alloc SQ wrid.\n");
807	return -ENOMEM;	874	return -ENOMEM;
808	}	875	}
809		876
810	if (hr_qp->rq.wqe_cnt) {	877	if (hr_qp->rq.wqe_cnt) {
811	rq_wrid = kcalloc(hr_qp->rq.wqe_cnt, sizeof(u64), GFP_KERNEL);	878	rq_wrid = kcalloc(hr_qp->rq.wqe_cnt, sizeof(u64), GFP_KERNEL);
812	if (ZERO_OR_NULL_PTR(rq_wrid)) {	879	if (ZERO_OR_NULL_PTR(rq_wrid)) {
813	ibdev_err(ibdev, "Failed to alloc RQ wrid\n");	880	ibdev_err(ibdev, "failed to alloc RQ wrid.\n");
814	ret = -ENOMEM;	881	ret = -ENOMEM;
815	goto err_sq;	882	goto err_sq;
816	}	883	}
@@ -860,29 +927,25 @@ static int set_qp_param(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp, · 43 unmodified lines
860	}	927	}
861		928
862	if (udata) {	929	if (udata) {
863	if (ib_copy_from_udata(ucmd, udata, sizeof(*ucmd))) {	930	ret = ib_copy_from_udata(ucmd, udata,
864	ibdev_err(ibdev, "Failed to copy QP ucmd\n");	931	min(udata->inlen, sizeof(*ucmd)));
865	return -EFAULT;	932	if (ret) {
		933	ibdev_err(ibdev,
		934	"failed to copy QP ucmd, ret = %d\n", ret);
		935	return ret;
866	}	936	}
867		937
868	ret = set_user_sq_size(hr_dev, &init_attr->cap, hr_qp, ucmd);	938	ret = set_user_sq_size(hr_dev, &init_attr->cap, hr_qp, ucmd);
869	if (ret)	939	if (ret)
870	ibdev_err(ibdev, "Failed to set user SQ size\n");	940	ibdev_err(ibdev,
		941	"failed to set user SQ size, ret = %d.\n",
		942	ret);
871	} else {	943	} else {
872	if (init_attr->create_flags &
873	IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) {
874	ibdev_err(ibdev, "Failed to check multicast loopback\n");
875	return -EINVAL;
876	}
877
878	if (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) {
879	ibdev_err(ibdev, "Failed to check ipoib ud lso\n");
880	return -EINVAL;
881	}
882
883	ret = set_kernel_sq_size(hr_dev, &init_attr->cap, hr_qp);	944	ret = set_kernel_sq_size(hr_dev, &init_attr->cap, hr_qp);
884	if (ret)	945	if (ret)
885	ibdev_err(ibdev, "Failed to set kernel SQ size\n");	946	ibdev_err(ibdev,
		947	"failed to set kernel SQ size, ret = %d.\n",
		948	ret);
886	}	949	}
887		950
888	return ret;	951	return ret;
@@ -906,47 +969,53 @@ static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev, · 17 unmodified lines
906	hr_qp->state = IB_QPS_RESET;	969	hr_qp->state = IB_QPS_RESET;
907	hr_qp->flush_flag = 0;	970	hr_qp->flush_flag = 0;
908		971
		972	if (init_attr->create_flags)
		973	return -EOPNOTSUPP;
		974
909	ret = set_qp_param(hr_dev, hr_qp, init_attr, udata, &ucmd);	975	ret = set_qp_param(hr_dev, hr_qp, init_attr, udata, &ucmd);
910	if (ret) {	976	if (ret) {
911	ibdev_err(ibdev, "Failed to set QP param\n");	977	ibdev_err(ibdev, "failed to set QP param, ret = %d.\n", ret);
912	return ret;	978	return ret;
913	}	979	}
914		980
915	if (!udata) {	981	if (!udata) {
916	ret = alloc_kernel_wrid(hr_dev, hr_qp);	982	ret = alloc_kernel_wrid(hr_dev, hr_qp);
917	if (ret) {	983	if (ret) {
918	ibdev_err(ibdev, "Failed to alloc wrid\n");	984	ibdev_err(ibdev, "failed to alloc wrid, ret = %d.\n",
		985	ret);
919	return ret;	986	return ret;
920	}	987	}
921	}	988	}
922		989
923	ret = alloc_qp_db(hr_dev, hr_qp, init_attr, udata, &ucmd, &resp);	990	ret = alloc_qp_db(hr_dev, hr_qp, init_attr, udata, &ucmd, &resp);
924	if (ret) {	991	if (ret) {
925	ibdev_err(ibdev, "Failed to alloc QP doorbell\n");	992	ibdev_err(ibdev, "failed to alloc QP doorbell, ret = %d.\n",
		993	ret);
926	goto err_wrid;	994	goto err_wrid;
927	}	995	}
928		996
929	ret = alloc_qp_buf(hr_dev, hr_qp, init_attr, udata, ucmd.buf_addr);	997	ret = alloc_qp_buf(hr_dev, hr_qp, init_attr, udata, ucmd.buf_addr);
930	if (ret) {	998	if (ret) {
931	ibdev_err(ibdev, "Failed to alloc QP buffer\n");	999	ibdev_err(ibdev, "failed to alloc QP buffer, ret = %d.\n", ret);
932	goto err_db;	1000	goto err_db;
933	}	1001	}
934		1002
935	ret = alloc_qpn(hr_dev, hr_qp);	1003	ret = alloc_qpn(hr_dev, hr_qp);
936	if (ret) {	1004	if (ret) {
937	ibdev_err(ibdev, "Failed to alloc QPN\n");	1005	ibdev_err(ibdev, "failed to alloc QPN, ret = %d.\n", ret);
938	goto err_buf;	1006	goto err_buf;
939	}	1007	}
940		1008
941	ret = alloc_qpc(hr_dev, hr_qp);	1009	ret = alloc_qpc(hr_dev, hr_qp);
942	if (ret) {	1010	if (ret) {
943	ibdev_err(ibdev, "Failed to alloc QP context\n");	1011	ibdev_err(ibdev, "failed to alloc QP context, ret = %d.\n",
		1012	ret);
944	goto err_qpn;	1013	goto err_qpn;
945	}	1014	}
946		1015
947	ret = hns_roce_qp_store(hr_dev, hr_qp, init_attr);	1016	ret = hns_roce_qp_store(hr_dev, hr_qp, init_attr);
948	if (ret) {	1017	if (ret) {
949	ibdev_err(ibdev, "Failed to store QP\n");	1018	ibdev_err(ibdev, "failed to store QP, ret = %d.\n", ret);
950	goto err_qpc;	1019	goto err_qpc;
951	}	1020	}
952		1021
@@ -1003,6 +1072,30 @@ void hns_roce_qp_destroy(struct hns_roce_dev hr_dev, struct hns_roce_qp hr_qp, · 50 unmodified lines
1003	kfree(hr_qp);	1072	kfree(hr_qp);
1004	}	1073	}
1005		1074
		1075	static int check_qp_type(struct hns_roce_dev *hr_dev, enum ib_qp_type type,
		1076	bool is_user)
		1077	{
		1078	switch (type) {
		1079	case IB_QPT_UD:
		1080	if (hr_dev->pci_dev->revision <= PCI_REVISION_ID_HIP08 &&
		1081	is_user)
		1082	goto out;
		1083	fallthrough;
		1084	case IB_QPT_RC:
		1085	case IB_QPT_GSI:
		1086	break;
		1087	default:
		1088	goto out;
		1089	}
		1090
		1091	return 0;
		1092
		1093	out:
		1094	ibdev_err(&hr_dev->ib_dev, "not support QP type %d\n", type);
		1095
		1096	return -EOPNOTSUPP;
		1097	}
		1098
1006	struct ib_qp hns_roce_create_qp(struct ib_pd pd,	1099	struct ib_qp hns_roce_create_qp(struct ib_pd pd,
1007	struct ib_qp_init_attr *init_attr,	1100	struct ib_qp_init_attr *init_attr,
1008	struct ib_udata *udata)	1101	struct ib_udata *udata)
@@ -1012,15 +1105,9 @@ struct ib_qp hns_roce_create_qp(struct ib_pd pd, · 3 unmodified lines
1012	struct hns_roce_qp *hr_qp;	1105	struct hns_roce_qp *hr_qp;
1013	int ret;	1106	int ret;
1014		1107
1015	switch (init_attr->qp_type) {	1108	ret = check_qp_type(hr_dev, init_attr->qp_type, !!udata);
1016	case IB_QPT_RC:	1109	if (ret)
1017	case IB_QPT_GSI:	1110	return ERR_PTR(ret);
1018	break;
1019	default:
1020	ibdev_err(ibdev, "not support QP type %d\n",
1021	init_attr->qp_type);
1022	return ERR_PTR(-EOPNOTSUPP);
1023	}
1024		1111
1025	hr_qp = kzalloc(sizeof(*hr_qp), GFP_KERNEL);	1112	hr_qp = kzalloc(sizeof(*hr_qp), GFP_KERNEL);
1026	if (!hr_qp)	1113	if (!hr_qp)
@@ -1035,10 +1122,11 @@ struct ib_qp hns_roce_create_qp(struct ib_pd pd, · 8 unmodified lines
1035	if (ret) {	1122	if (ret) {
1036	ibdev_err(ibdev, "Create QP type 0x%x failed(%d)\n",	1123	ibdev_err(ibdev, "Create QP type 0x%x failed(%d)\n",
1037	init_attr->qp_type, ret);	1124	init_attr->qp_type, ret);
1038	ibdev_err(ibdev, "Create GSI QP failed!\n");	1125
1039	kfree(hr_qp);	1126	kfree(hr_qp);
1040	return ERR_PTR(ret);	1127	return ERR_PTR(ret);
1041	}	1128	}
		1129
1042	return &hr_qp->ibqp;	1130	return &hr_qp->ibqp;
1043	}	1131	}
1044		1132
@@ -1091,9 +1179,8 @@ static int hns_roce_check_qp_attr(struct ib_qp ibqp, struct ib_qp_attr attr, · 46 unmodified lines
1091		1179
1092	if ((attr_mask & IB_QP_PORT) &&	1180	if ((attr_mask & IB_QP_PORT) &&
1093	(attr->port_num == 0 \|\| attr->port_num > hr_dev->caps.num_ports)) {	1181	(attr->port_num == 0 \|\| attr->port_num > hr_dev->caps.num_ports)) {
1094	ibdev_err(&hr_dev->ib_dev,	1182	ibdev_err(&hr_dev->ib_dev, "invalid attr, port_num = %u.\n",
1095	"attr port_num invalid.attr->port_num=%d\n",	1183	attr->port_num);
1096	attr->port_num);
1097	return -EINVAL;	1184	return -EINVAL;
1098	}	1185	}
1099		1186
@@ -1101,8 +1188,8 @@ static int hns_roce_check_qp_attr(struct ib_qp ibqp, struct ib_qp_attr attr, · 1 unmodified line
1101	p = attr_mask & IB_QP_PORT ? (attr->port_num - 1) : hr_qp->port;	1188	p = attr_mask & IB_QP_PORT ? (attr->port_num - 1) : hr_qp->port;
1102	if (attr->pkey_index >= hr_dev->caps.pkey_table_len[p]) {	1189	if (attr->pkey_index >= hr_dev->caps.pkey_table_len[p]) {
1103	ibdev_err(&hr_dev->ib_dev,	1190	ibdev_err(&hr_dev->ib_dev,
1104	"attr pkey_index invalid.attr->pkey_index=%d\n",	1191	"invalid attr, pkey_index = %u.\n",
1105	attr->pkey_index);	1192	attr->pkey_index);
1106	return -EINVAL;	1193	return -EINVAL;
1107	}	1194	}
1108	}	1195	}
@@ -1110,16 +1197,16 @@ static int hns_roce_check_qp_attr(struct ib_qp ibqp, struct ib_qp_attr attr, · 1 unmodified line
1110	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC &&	1197	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC &&
1111	attr->max_rd_atomic > hr_dev->caps.max_qp_init_rdma) {	1198	attr->max_rd_atomic > hr_dev->caps.max_qp_init_rdma) {
1112	ibdev_err(&hr_dev->ib_dev,	1199	ibdev_err(&hr_dev->ib_dev,
1113	"attr max_rd_atomic invalid.attr->max_rd_atomic=%d\n",	1200	"invalid attr, max_rd_atomic = %u.\n",
1114	attr->max_rd_atomic);	1201	attr->max_rd_atomic);
1115	return -EINVAL;	1202	return -EINVAL;
1116	}	1203	}
1117		1204
1118	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC &&	1205	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC &&
1119	attr->max_dest_rd_atomic > hr_dev->caps.max_qp_dest_rdma) {	1206	attr->max_dest_rd_atomic > hr_dev->caps.max_qp_dest_rdma) {
1120	ibdev_err(&hr_dev->ib_dev,	1207	ibdev_err(&hr_dev->ib_dev,
1121	"attr max_dest_rd_atomic invalid.attr->max_dest_rd_atomic=%d\n",	1208	"invalid attr, max_dest_rd_atomic = %u.\n",
1122	attr->max_dest_rd_atomic);	1209	attr->max_dest_rd_atomic);
1123	return -EINVAL;	1210	return -EINVAL;
1124	}	1211	}
1125		1212
@@ -1244,22 +1331,22 @@ static inline void get_wqe(struct hns_roce_qp hr_qp, int offset) · 118 unmodified lines
1244	return hns_roce_buf_offset(hr_qp->mtr.kmem, offset);	1331	return hns_roce_buf_offset(hr_qp->mtr.kmem, offset);
1245	}	1332	}
1246		1333
1247	void hns_roce_get_recv_wqe(struct hns_roce_qp hr_qp, int n)	1334	void hns_roce_get_recv_wqe(struct hns_roce_qp hr_qp, unsigned int n)
1248	{	1335	{
1249	return get_wqe(hr_qp, hr_qp->rq.offset + (n << hr_qp->rq.wqe_shift));	1336	return get_wqe(hr_qp, hr_qp->rq.offset + (n << hr_qp->rq.wqe_shift));
1250	}	1337	}
1251		1338
1252	void hns_roce_get_send_wqe(struct hns_roce_qp hr_qp, int n)	1339	void hns_roce_get_send_wqe(struct hns_roce_qp hr_qp, unsigned int n)
1253	{	1340	{
1254	return get_wqe(hr_qp, hr_qp->sq.offset + (n << hr_qp->sq.wqe_shift));	1341	return get_wqe(hr_qp, hr_qp->sq.offset + (n << hr_qp->sq.wqe_shift));
1255	}	1342	}
1256		1343
1257	void hns_roce_get_extend_sge(struct hns_roce_qp hr_qp, int n)	1344	void hns_roce_get_extend_sge(struct hns_roce_qp hr_qp, unsigned int n)
1258	{	1345	{
1259	return get_wqe(hr_qp, hr_qp->sge.offset + (n << hr_qp->sge.sge_shift));	1346	return get_wqe(hr_qp, hr_qp->sge.offset + (n << hr_qp->sge.sge_shift));
1260	}	1347	}
1261		1348
1262	bool hns_roce_wq_overflow(struct hns_roce_wq *hr_wq, int nreq,	1349	bool hns_roce_wq_overflow(struct hns_roce_wq *hr_wq, u32 nreq,
1263	struct ib_cq *ib_cq)	1350	struct ib_cq *ib_cq)
1264	{	1351	{
1265	struct hns_roce_cq *hr_cq;	1352	struct hns_roce_cq *hr_cq;
@@ -1280,22 +1367,24 @@ bool hns_roce_wq_overflow(struct hns_roce_wq *hr_wq, int nreq, · 14 unmodified lines
1280	int hns_roce_init_qp_table(struct hns_roce_dev *hr_dev)	1367	int hns_roce_init_qp_table(struct hns_roce_dev *hr_dev)
1281	{	1368	{
1282	struct hns_roce_qp_table *qp_table = &hr_dev->qp_table;	1369	struct hns_roce_qp_table *qp_table = &hr_dev->qp_table;
1283	int reserved_from_top = 0;	1370	unsigned int reserved_from_bot;
1284	int reserved_from_bot;	1371	unsigned int i;
1285	int ret;
1286		1372
1287	mutex_init(&qp_table->scc_mutex);	1373	mutex_init(&qp_table->scc_mutex);
1288	xa_init(&hr_dev->qp_table_xa);	1374	xa_init(&hr_dev->qp_table_xa);
1289		1375
1290	reserved_from_bot = hr_dev->caps.reserved_qps;	1376	reserved_from_bot = hr_dev->caps.reserved_qps;
1291		1377
1292	ret = hns_roce_bitmap_init(&qp_table->bitmap, hr_dev->caps.num_qps,	1378	for (i = 0; i < reserved_from_bot; i++) {
1293	hr_dev->caps.num_qps - 1, reserved_from_bot,	1379	hr_dev->qp_table.bank[get_qp_bankid(i)].inuse++;
1294	reserved_from_top);	1380	hr_dev->qp_table.bank[get_qp_bankid(i)].min++;
1295	if (ret) {	1381	}
1296	dev_err(hr_dev->dev, "qp bitmap init failed!error=%d\n",	1382
1297	ret);	1383	for (i = 0; i < HNS_ROCE_QP_BANK_NUM; i++) {
1298	return ret;	1384	ida_init(&hr_dev->qp_table.bank[i].ida);
		1385	hr_dev->qp_table.bank[i].max = hr_dev->caps.num_qps /
		1386	HNS_ROCE_QP_BANK_NUM - 1;
		1387	hr_dev->qp_table.bank[i].next = hr_dev->qp_table.bank[i].min;
1299	}	1388	}
1300		1389
1301	return 0;	1390	return 0;
@@ -1303,5 +1392,8 @@ int hns_roce_init_qp_table(struct hns_roce_dev *hr_dev) · 1 unmodified line
1303		1392
1304	void hns_roce_cleanup_qp_table(struct hns_roce_dev *hr_dev)	1393	void hns_roce_cleanup_qp_table(struct hns_roce_dev *hr_dev)
1305	{	1394	{
1306	hns_roce_bitmap_cleanup(&hr_dev->qp_table.bitmap);	1395	int i;
		1396
		1397	for (i = 0; i < HNS_ROCE_QP_BANK_NUM; i++)
		1398	ida_destroy(&hr_dev->qp_table.bank[i].ida);
1307	}	1399	}

drivers/infiniband/hw/hns/hns_roce_srq.c+31−22

  */
 #include <rdma/ib_umem.h>
-#include <rdma/hns-abi.h>
 #include "hns_roce_device.h"
 #include "hns_roce_cmd.h"
 #include "hns_roce_hem.h"
 	ret = hns_roce_mtr_find(hr_dev, &srq->buf_mtr, 0, mtts_wqe,
 				ARRAY_SIZE(mtts_wqe), &dma_handle_wqe);
 	if (ret < 1) {
-		ibdev_err(ibdev, "Failed to find mtr for SRQ WQE\n");
+		ibdev_err(ibdev, "failed to find mtr for SRQ WQE, ret = %d.\n",
+			  ret);
 		return -ENOBUFS;
 	}
 	ret = hns_roce_mtr_find(hr_dev, &srq->idx_que.mtr, 0, mtts_idx,
 				ARRAY_SIZE(mtts_idx), &dma_handle_idx);
 	if (ret < 1) {
-		ibdev_err(ibdev, "Failed to find mtr for SRQ idx\n");
+		ibdev_err(ibdev, "failed to find mtr for SRQ idx, ret = %d.\n",
+			  ret);
 		return -ENOBUFS;
 	}
 	ret = hns_roce_bitmap_alloc(&srq_table->bitmap, &srq->srqn);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to alloc SRQ number, err %d\n", ret);
+		ibdev_err(ibdev,
+			  "failed to alloc SRQ number, ret = %d.\n", ret);
 		return -ENOMEM;
 	}
 	ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to get SRQC table, err %d\n", ret);
+		ibdev_err(ibdev, "failed to get SRQC table, ret = %d.\n", ret);
 		goto err_out;
 	}
 	ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL));
 	if (ret) {
-		ibdev_err(ibdev, "Failed to store SRQC, err %d\n", ret);
+		ibdev_err(ibdev, "failed to store SRQC, ret = %d.\n", ret);
 		goto err_put;
 	}
 	mailbox = hns_roce_alloc_cmd_mailbox(hr_dev);
 	if (IS_ERR_OR_NULL(mailbox)) {
 		ret = -ENOMEM;
-		ibdev_err(ibdev, "Failed to alloc mailbox for SRQC\n");
+		ibdev_err(ibdev, "failed to alloc mailbox for SRQC.\n");
 		goto err_xa;
 	}
 	ret = hns_roce_hw_create_srq(hr_dev, mailbox, srq->srqn);
 	hns_roce_free_cmd_mailbox(hr_dev, mailbox);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to config SRQC, err %d\n", ret);
+		ibdev_err(ibdev, "failed to config SRQC, ret = %d.\n", ret);
 		goto err_xa;
 	}
 				  hr_dev->caps.srqwqe_ba_pg_sz +
 				  HNS_HW_PAGE_SHIFT, udata, addr);
 	if (err)
-		ibdev_err(ibdev, "Failed to alloc SRQ buf mtr, err %d\n", err);
+		ibdev_err(ibdev,
+			  "failed to alloc SRQ buf mtr, ret = %d.\n", err);
 	return err;
 }
 				  hr_dev->caps.idx_ba_pg_sz + HNS_HW_PAGE_SHIFT,
 				  udata, addr);
 	if (err) {
-		ibdev_err(ibdev, "Failed to alloc SRQ idx mtr, err %d\n", err);
+		ibdev_err(ibdev,
+			  "failed to alloc SRQ idx mtr, ret = %d.\n", err);
 		return err;
 	}
 	if (!udata) {
 		idx_que->bitmap = bitmap_zalloc(srq->wqe_cnt, GFP_KERNEL);
 		if (!idx_que->bitmap) {
-			ibdev_err(ibdev, "Failed to alloc SRQ idx bitmap\n");
+			ibdev_err(ibdev, "failed to alloc SRQ idx bitmap.\n");
 			err = -ENOMEM;
 			goto err_idx_mtr;
 		}
 	}
 	return 0;
 	int ret;
 	u32 cqn;
+	if (init_attr->srq_type != IB_SRQT_BASIC &&
+	    init_attr->srq_type != IB_SRQT_XRC)
+		return -EOPNOTSUPP;
 	/* Check the actual SRQ wqe and SRQ sge num */
 	if (init_attr->attr.max_wr >= hr_dev->caps.max_srq_wrs ||
 	    init_attr->attr.max_sge > hr_dev->caps.max_srq_sges)
 	srq->max_gs = init_attr->attr.max_sge;
 	if (udata) {
-		ret = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd));
+		ret = ib_copy_from_udata(&ucmd, udata,
+					 min(udata->inlen, sizeof(ucmd)));
 		if (ret) {
-			ibdev_err(ibdev, "Failed to copy SRQ udata, err %d\n",
+			ibdev_err(ibdev, "failed to copy SRQ udata, ret = %d.\n",
 				  ret);
 			return ret;
 		}
 	ret = alloc_srq_buf(hr_dev, srq, udata, ucmd.buf_addr);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to alloc SRQ buffer, err %d\n", ret);
+		ibdev_err(ibdev,
+			  "failed to alloc SRQ buffer, ret = %d.\n", ret);
 		return ret;
 	}
 	ret = alloc_srq_idx(hr_dev, srq, udata, ucmd.que_addr);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to alloc SRQ idx, err %d\n", ret);
+		ibdev_err(ibdev, "failed to alloc SRQ idx, ret = %d.\n", ret);
 		goto err_buf_alloc;
 	}
 	if (!udata) {
 		ret = alloc_srq_wrid(hr_dev, srq);
 		if (ret) {
-			ibdev_err(ibdev, "Failed to alloc SRQ wrid, err %d\n",
+			ibdev_err(ibdev, "failed to alloc SRQ wrid, ret = %d.\n",
 				  ret);
 			goto err_idx_alloc;
 		}
 	ret = alloc_srqc(hr_dev, srq, to_hr_pd(ib_srq->pd)->pdn, cqn, 0, 0);
 	if (ret) {
-		ibdev_err(ibdev, "Failed to alloc SRQ context, err %d\n", ret);
+		ibdev_err(ibdev,
+			  "failed to alloc SRQ context, ret = %d.\n", ret);
 		goto err_wrid_alloc;
 	}
 	resp.srqn = srq->srqn;
 	if (udata) {
-		if (ib_copy_to_udata(udata, &resp,
+		ret = ib_copy_to_udata(udata, &resp,
-				     min(udata->outlen, sizeof(resp)))) {
+				       min(udata->outlen, sizeof(resp)));
-			ret = -EFAULT;
+		if (ret)
 			goto err_srqc_alloc;
-		}
 	}
 	return 0;

drivers/infiniband/hw/i40iw/i40iw.h+0−1

@@ -274,7 +274,6 @@ struct i40iw_device { · 273 unmodified lines
274	u8 max_sge;	274	u8 max_sge;
275	u8 iw_status;	275	u8 iw_status;
276	u8 send_term_ok;	276	u8 send_term_ok;
277	bool push_mode; /* Initialized from parameter passed to driver */
278		277
279	/* x710 specific */	278	/* x710 specific */
280	struct mutex pbl_mutex;	279	struct mutex pbl_mutex;

drivers/infiniband/hw/i40iw/i40iw_cm.c+3−3

@@ -2426,7 +2426,7 @@ static void i40iw_handle_rst_pkt(struct i40iw_cm_node *cm_node, · 2425 unmodified lines
2426	}	2426	}
2427	break;	2427	break;
2428	case I40IW_CM_STATE_MPAREQ_RCVD:	2428	case I40IW_CM_STATE_MPAREQ_RCVD:
2429	atomic_add_return(1, &cm_node->passive_state);	2429	atomic_inc(&cm_node->passive_state);
2430	break;	2430	break;
2431	case I40IW_CM_STATE_ESTABLISHED:	2431	case I40IW_CM_STATE_ESTABLISHED:
2432	case I40IW_CM_STATE_SYN_RCVD:	2432	case I40IW_CM_STATE_SYN_RCVD:
@@ -3020,7 +3020,7 @@ static int i40iw_cm_reject(struct i40iw_cm_node cm_node, const void pdata, u8 · 587 unmodified lines
3020	i40iw_cleanup_retrans_entry(cm_node);	3020	i40iw_cleanup_retrans_entry(cm_node);
3021		3021
3022	if (!loopback) {	3022	if (!loopback) {
3023	passive_state = atomic_add_return(1, &cm_node->passive_state);	3023	passive_state = atomic_inc_return(&cm_node->passive_state);
3024	if (passive_state == I40IW_SEND_RESET_EVENT) {	3024	if (passive_state == I40IW_SEND_RESET_EVENT) {
3025	cm_node->state = I40IW_CM_STATE_CLOSED;	3025	cm_node->state = I40IW_CM_STATE_CLOSED;
3026	i40iw_rem_ref_cm_node(cm_node);	3026	i40iw_rem_ref_cm_node(cm_node);
@@ -3678,7 +3678,7 @@ int i40iw_accept(struct iw_cm_id cm_id, struct iw_cm_conn_param conn_param) · 651 unmodified lines
3678	return -EINVAL;	3678	return -EINVAL;
3679	}	3679	}
3680		3680
3681	passive_state = atomic_add_return(1, &cm_node->passive_state);	3681	passive_state = atomic_inc_return(&cm_node->passive_state);
3682	if (passive_state == I40IW_SEND_RESET_EVENT) {	3682	if (passive_state == I40IW_SEND_RESET_EVENT) {
3683	i40iw_rem_ref_cm_node(cm_node);	3683	i40iw_rem_ref_cm_node(cm_node);
3684	return -ECONNRESET;	3684	return -ECONNRESET;

drivers/infiniband/hw/i40iw/i40iw_ctrl.c+11−61

 	return ret_code;
 }
-/**
- * i40iw_sc_manage_push_page - Handle push page
- * @cqp: struct for cqp hw
- * @info: push page info
- * @scratch: u64 saved to be used during cqp completion
- * @post_sq: flag for cqp db to ring
- */
-static enum i40iw_status_code i40iw_sc_manage_push_page(
-				struct i40iw_sc_cqp *cqp,
-				struct i40iw_cqp_manage_push_page_info *info,
-				u64 scratch,
-				bool post_sq)
-{
-	u64 *wqe;
-	u64 header;
-	if (info->push_idx >= I40IW_MAX_PUSH_PAGE_COUNT)
-		return I40IW_ERR_INVALID_PUSH_PAGE_INDEX;
-	wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
-	if (!wqe)
-		return I40IW_ERR_RING_FULL;
-	set_64bit_val(wqe, 16, info->qs_handle);
-	header = LS_64(info->push_idx, I40IW_CQPSQ_MPP_PPIDX) |
-		 LS_64(I40IW_CQP_OP_MANAGE_PUSH_PAGES, I40IW_CQPSQ_OPCODE) |
-		 LS_64(cqp->polarity, I40IW_CQPSQ_WQEVALID) |
-		 LS_64(info->free_page, I40IW_CQPSQ_MPP_FREE_PAGE);
-	i40iw_insert_wqe_hdr(wqe, header);
-	i40iw_debug_buf(cqp->dev, I40IW_DEBUG_WQE, "MANAGE_PUSH_PAGES WQE",
-			wqe, I40IW_CQP_WQE_SIZE * 8);
-	if (post_sq)
-		i40iw_sc_cqp_post_sq(cqp);
-	return 0;
-}
 /**
  * i40iw_sc_manage_hmc_pm_func_table - manage of function table
  * @cqp: struct for cqp hw
 	      LS_64(qp->rcv_tph_en, I40IWQPC_RCVTPHEN) |
 	      LS_64(qp->xmit_tph_en, I40IWQPC_XMITTPHEN) |
 	      LS_64(qp->rq_tph_en, I40IWQPC_RQTPHEN) |
-	      LS_64(qp->sq_tph_en, I40IWQPC_SQTPHEN) |
+	      LS_64(qp->sq_tph_en, I40IWQPC_SQTPHEN);
-	      LS_64(info->push_idx, I40IWQPC_PPIDX) |
-	      LS_64(info->push_mode_en, I40IWQPC_PMENA);
 	set_64bit_val(qp_ctx, 8, qp->sq_pa);
 	set_64bit_val(qp_ctx, 16, qp->rq_pa);
 				pcmdinfo->in.u.add_arp_cache_entry.scratch,
 				pcmdinfo->post_sq);
 		break;
-	case OP_MANAGE_PUSH_PAGE:
-		status = i40iw_sc_manage_push_page(
-				pcmdinfo->in.u.manage_push_page.cqp,
-				&pcmdinfo->in.u.manage_push_page.info,
-				pcmdinfo->in.u.manage_push_page.scratch,
-				pcmdinfo->post_sq);
-		break;
 	case OP_UPDATE_PE_SDS:
 		/* case I40IW_CQP_OP_UPDATE_PE_SDS */
 		status = i40iw_update_pe_sds(
 	i40iw_hw_stats_stop_timer(vsi);
 }
-static struct i40iw_cqp_ops iw_cqp_ops = {
+static const struct i40iw_cqp_ops iw_cqp_ops = {
 	.cqp_init = i40iw_sc_cqp_init,
 	.cqp_create = i40iw_sc_cqp_create,
 	.cqp_post_sq = i40iw_sc_cqp_post_sq,
 	.poll_for_cqp_op_done = i40iw_sc_poll_for_cqp_op_done
 };
-static struct i40iw_ccq_ops iw_ccq_ops = {
+static const struct i40iw_ccq_ops iw_ccq_ops = {
 	.ccq_init = i40iw_sc_ccq_init,
 	.ccq_create = i40iw_sc_ccq_create,
 	.ccq_destroy = i40iw_sc_ccq_destroy,
 	.ccq_arm = i40iw_sc_ccq_arm
 };
-static struct i40iw_ceq_ops iw_ceq_ops = {
+static const struct i40iw_ceq_ops iw_ceq_ops = {
 	.ceq_init = i40iw_sc_ceq_init,
 	.ceq_create = i40iw_sc_ceq_create,
 	.cceq_create_done = i40iw_sc_cceq_create_done,
 	.process_ceq = i40iw_sc_process_ceq
 };
-static struct i40iw_aeq_ops iw_aeq_ops = {
+static const struct i40iw_aeq_ops iw_aeq_ops = {
 	.aeq_init = i40iw_sc_aeq_init,
 	.aeq_create = i40iw_sc_aeq_create,
 	.aeq_destroy = i40iw_sc_aeq_destroy,
 };
 /* iwarp pd ops */
-static struct i40iw_pd_ops iw_pd_ops = {
+static const struct i40iw_pd_ops iw_pd_ops = {
 	.pd_init = i40iw_sc_pd_init,
 };
-static struct i40iw_priv_qp_ops iw_priv_qp_ops = {
+static const struct i40iw_priv_qp_ops iw_priv_qp_ops = {
 	.qp_init = i40iw_sc_qp_init,
 	.qp_create = i40iw_sc_qp_create,
 	.qp_modify = i40iw_sc_qp_modify,
 	.iw_mr_fast_register = i40iw_sc_mr_fast_register
 };
-static struct i40iw_priv_cq_ops iw_priv_cq_ops = {
+static const struct i40iw_priv_cq_ops iw_priv_cq_ops = {
 	.cq_init = i40iw_sc_cq_init,
 	.cq_create = i40iw_sc_cq_create,
 	.cq_destroy = i40iw_sc_cq_destroy,
 	.cq_modify = i40iw_sc_cq_modify,
 };
-static struct i40iw_mr_ops iw_mr_ops = {
+static const struct i40iw_mr_ops iw_mr_ops = {
 	.alloc_stag = i40iw_sc_alloc_stag,
 	.mr_reg_non_shared = i40iw_sc_mr_reg_non_shared,
 	.mr_reg_shared = i40iw_sc_mr_reg_shared,
 	.mw_alloc = i40iw_sc_mw_alloc
 };
-static struct i40iw_cqp_misc_ops iw_cqp_misc_ops = {
+static const struct i40iw_cqp_misc_ops iw_cqp_misc_ops = {
-	.manage_push_page = i40iw_sc_manage_push_page,
 	.manage_hmc_pm_func_table = i40iw_sc_manage_hmc_pm_func_table,
 	.set_hmc_resource_profile = i40iw_sc_set_hmc_resource_profile,
 	.commit_fpm_values = i40iw_sc_commit_fpm_values,
 	.update_resume_qp = i40iw_sc_resume_qp
 };
-static struct i40iw_hmc_ops iw_hmc_ops = {
+static const struct i40iw_hmc_ops iw_hmc_ops = {
 	.init_iw_hmc = i40iw_sc_init_iw_hmc,
 	.parse_fpm_query_buf = i40iw_sc_parse_fpm_query_buf,
 	.configure_iw_fpm = i40iw_sc_configure_iw_fpm,

drivers/infiniband/hw/i40iw/i40iw_d.h+12−23

 #define I40IW_DB_ADDR_OFFSET    (4 * 1024 * 1024 - 64 * 1024)
 #define I40IW_VF_DB_ADDR_OFFSET (64 * 1024)
-#define I40IW_PUSH_OFFSET       (4 * 1024 * 1024)
-#define I40IW_PF_FIRST_PUSH_PAGE_INDEX 16
-#define I40IW_VF_PUSH_OFFSET    ((8 + 64) * 1024)
-#define I40IW_VF_FIRST_PUSH_PAGE_INDEX 2
 #define I40IW_PE_DB_SIZE_4M     1
 #define I40IW_PE_DB_SIZE_8M     2
 #define I40IW_CQP_OP_MANAGE_LOC_MAC_IP_TABLE    0x0e
 #define I40IW_CQP_OP_MANAGE_ARP                 0x0f
 #define I40IW_CQP_OP_MANAGE_VF_PBLE_BP          0x10
-#define I40IW_CQP_OP_MANAGE_PUSH_PAGES          0x11
 #define I40IW_CQP_OP_QUERY_RDMA_FEATURES	0x12
 #define I40IW_CQP_OP_UPLOAD_CONTEXT             0x13
 #define I40IW_CQP_OP_ALLOCATE_LOC_MAC_IP_TABLE_ENTRY 0x14
 #define I40IW_CQPSQ_MVPBP_PD_PLPBA_MASK \
 	(0x1fffffffffffffffULL << I40IW_CQPSQ_MVPBP_PD_PLPBA_SHIFT)
-/* Manage Push Page - MPP */
 #define I40IW_INVALID_PUSH_PAGE_INDEX 0xffff
 #define I40IW_CQPSQ_MPP_QS_HANDLE_SHIFT 0
 #define I40IWQPSQ_ADDFRAGCNT_SHIFT 38
 #define I40IWQPSQ_ADDFRAGCNT_MASK (0x7ULL << I40IWQPSQ_ADDFRAGCNT_SHIFT)
-#define I40IWQPSQ_PUSHWQE_SHIFT 56
-#define I40IWQPSQ_PUSHWQE_MASK (1ULL << I40IWQPSQ_PUSHWQE_SHIFT)
 #define I40IWQPSQ_STREAMMODE_SHIFT 58
 #define I40IWQPSQ_STREAMMODE_MASK (1ULL << I40IWQPSQ_STREAMMODE_SHIFT)
 #define OP_MW_ALLOC                             20
 #define OP_QP_FLUSH_WQES                        21
 #define OP_ADD_ARP_CACHE_ENTRY                  22
-#define OP_MANAGE_PUSH_PAGE                     23
+#define OP_UPDATE_PE_SDS                        23
-#define OP_UPDATE_PE_SDS                        24
+#define OP_MANAGE_HMC_PM_FUNC_TABLE             24
-#define OP_MANAGE_HMC_PM_FUNC_TABLE             25
+#define OP_SUSPEND                              25
-#define OP_SUSPEND                              26
+#define OP_RESUME                               26
-#define OP_RESUME                               27
+#define OP_MANAGE_VF_PBLE_BP                    27
-#define OP_MANAGE_VF_PBLE_BP                    28
+#define OP_QUERY_FPM_VALUES                     28
-#define OP_QUERY_FPM_VALUES                     29
+#define OP_COMMIT_FPM_VALUES                    29
-#define OP_COMMIT_FPM_VALUES                    30
+#define OP_REQUESTED_COMMANDS                   30
-#define OP_REQUESTED_COMMANDS                   31
+#define OP_COMPLETED_COMMANDS                   31
-#define OP_COMPLETED_COMMANDS                   32
+#define OP_GEN_AE                               32
-#define OP_GEN_AE                               33
+#define OP_QUERY_RDMA_FEATURES                  33
-#define OP_QUERY_RDMA_FEATURES                  34
+#define OP_SIZE_CQP_STAT_ARRAY			34
-#define OP_SIZE_CQP_STAT_ARRAY			35
 #endif

drivers/infiniband/hw/i40iw/i40iw_status.h+0−1

@@ -61,7 +61,6 @@ enum i40iw_status_code { · 60 unmodified lines
61	I40IW_ERR_QUEUE_EMPTY = -22,	61	I40IW_ERR_QUEUE_EMPTY = -22,
62	I40IW_ERR_INVALID_ALIGNMENT = -23,	62	I40IW_ERR_INVALID_ALIGNMENT = -23,
63	I40IW_ERR_FLUSHED_QUEUE = -24,	63	I40IW_ERR_FLUSHED_QUEUE = -24,
64	I40IW_ERR_INVALID_PUSH_PAGE_INDEX = -25,
65	I40IW_ERR_INVALID_INLINE_DATA_SIZE = -26,	64	I40IW_ERR_INVALID_INLINE_DATA_SIZE = -26,
66	I40IW_ERR_TIMEOUT = -27,	65	I40IW_ERR_TIMEOUT = -27,
67	I40IW_ERR_OPCODE_MISMATCH = -28,	66	I40IW_ERR_OPCODE_MISMATCH = -28,

drivers/infiniband/hw/i40iw/i40iw_type.h+10−28

 	u8 *q2_buf;
 	u64 qp_compl_ctx;
 	u16 qs_handle;
-	u16 push_idx;
 	u8 sq_tph_val;
 	u8 rq_tph_val;
 	u8 qp_state;
 	struct i40iw_sc_aeq *aeq;
 	struct i40iw_sc_ceq *ceq[I40IW_CEQ_MAX_COUNT];
 	struct i40iw_sc_cq *ccq;
-	struct i40iw_cqp_ops *cqp_ops;
+	const struct i40iw_cqp_ops *cqp_ops;
-	struct i40iw_ccq_ops *ccq_ops;
+	const struct i40iw_ccq_ops *ccq_ops;
-	struct i40iw_ceq_ops *ceq_ops;
+	const struct i40iw_ceq_ops *ceq_ops;
-	struct i40iw_aeq_ops *aeq_ops;
+	const struct i40iw_aeq_ops *aeq_ops;
-	struct i40iw_pd_ops *iw_pd_ops;
+	const struct i40iw_pd_ops *iw_pd_ops;
-	struct i40iw_priv_qp_ops *iw_priv_qp_ops;
+	const struct i40iw_priv_qp_ops *iw_priv_qp_ops;
-	struct i40iw_priv_cq_ops *iw_priv_cq_ops;
+	const struct i40iw_priv_cq_ops *iw_priv_cq_ops;
-	struct i40iw_mr_ops *mr_ops;
+	const struct i40iw_mr_ops *mr_ops;
-	struct i40iw_cqp_misc_ops *cqp_misc_ops;
+	const struct i40iw_cqp_misc_ops *cqp_misc_ops;
-	struct i40iw_hmc_ops *hmc_ops;
+	const struct i40iw_hmc_ops *hmc_ops;
 	struct i40iw_vchnl_if vchnl_if;
 	const struct i40iw_vf_cqp_ops *iw_vf_cqp_ops;
 	struct i40iwarp_offload_info *iwarp_info;
 	u32 send_cq_num;
 	u32 rcv_cq_num;
-	u16 push_idx;
-	bool push_mode_en;
 	bool tcp_info_valid;
 	bool iwarp_info_valid;
 	bool err_rq_idx_valid;
 	u8 entry_idx;
 };
-struct i40iw_cqp_manage_push_page_info {
-	u32 push_idx;
-	u16 qs_handle;
-	u8 free_page;
-};
 struct i40iw_qp_flush_info {
 	u16 sq_minor_code;
 	u16 sq_major_code;
 };
 struct i40iw_cqp_misc_ops {
-	enum i40iw_status_code (*manage_push_page)(struct i40iw_sc_cqp *,
-						   struct i40iw_cqp_manage_push_page_info *,
-						   u64, bool);
 	enum i40iw_status_code (*manage_hmc_pm_func_table)(struct i40iw_sc_cqp *,
 							   u64, u8, bool, bool);
 	enum i40iw_status_code (*set_hmc_resource_profile)(struct i40iw_sc_cqp *,
 			u64 scratch;
 		} manage_vf_pble_bp;
-		struct {
-			struct i40iw_sc_cqp *cqp;
-			struct i40iw_cqp_manage_push_page_info info;
-			u64 scratch;
-		} manage_push_page;
 		struct {
 			struct i40iw_sc_dev *dev;
 			struct i40iw_upload_context_info info;

drivers/infiniband/hw/i40iw/i40iw_uk.c+4−37

 	qp->initial_ring.head = qp->sq_ring.head;
 }
-/**
- * i40iw_qp_ring_push_db -  ring qp doorbell
- * @qp: hw qp ptr
- * @wqe_idx: wqe index
- */
-static void i40iw_qp_ring_push_db(struct i40iw_qp_uk *qp, u32 wqe_idx)
-{
-	set_32bit_val(qp->push_db, 0, LS_32((wqe_idx >> 2), I40E_PFPE_WQEALLOC_WQE_DESC_INDEX) | qp->qp_id);
-	qp->initial_ring.head = I40IW_RING_GETCURRENT_HEAD(qp->sq_ring);
-}
 /**
  * i40iw_qp_get_next_send_wqe - return next wqe ptr
  * @qp: hw qp ptr
 	u64 *wqe;
 	u8 *dest, *src;
 	struct i40iw_inline_rdma_write *op_info;
-	u64 *push;
 	u64 header = 0;
 	u32 wqe_idx;
 	enum i40iw_status_code ret_code;
 		 LS_64(I40IWQP_OP_RDMA_WRITE, I40IWQPSQ_OPCODE) |
 		 LS_64(op_info->len, I40IWQPSQ_INLINEDATALEN) |
 		 LS_64(1, I40IWQPSQ_INLINEDATAFLAG) |
-		 LS_64((qp->push_db ? 1 : 0), I40IWQPSQ_PUSHWQE) |
 		 LS_64(read_fence, I40IWQPSQ_READFENCE) |
 		 LS_64(info->local_fence, I40IWQPSQ_LOCALFENCE) |
 		 LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
 	set_64bit_val(wqe, 24, header);
-	if (qp->push_db) {
+	if (post_sq)
-		push = (u64 *)((uintptr_t)qp->push_wqe + (wqe_idx & 0x3) * 0x20);
+		i40iw_qp_post_wr(qp);
-		memcpy(push, wqe, (op_info->len > 16) ? op_info->len + 16 : 32);
-		i40iw_qp_ring_push_db(qp, wqe_idx);
-	} else {
-		if (post_sq)
-			i40iw_qp_post_wr(qp);
-	}
 	return 0;
 }
 	enum i40iw_status_code ret_code;
 	bool read_fence = false;
 	u8 wqe_size;
-	u64 *push;
 	op_info = &info->op.inline_send;
 	if (op_info->len > I40IW_MAX_INLINE_DATA_SIZE)
 	    LS_64(info->op_type, I40IWQPSQ_OPCODE) |
 	    LS_64(op_info->len, I40IWQPSQ_INLINEDATALEN) |
 	    LS_64(1, I40IWQPSQ_INLINEDATAFLAG) |
-	    LS_64((qp->push_db ? 1 : 0), I40IWQPSQ_PUSHWQE) |
 	    LS_64(read_fence, I40IWQPSQ_READFENCE) |
 	    LS_64(info->local_fence, I40IWQPSQ_LOCALFENCE) |
 	    LS_64(info->signaled, I40IWQPSQ_SIGCOMPL) |
 	set_64bit_val(wqe, 24, header);
-	if (qp->push_db) {
+	if (post_sq)
-		push = (u64 *)((uintptr_t)qp->push_wqe + (wqe_idx & 0x3) * 0x20);
+		i40iw_qp_post_wr(qp);
-		memcpy(push, wqe, (op_info->len > 16) ? op_info->len + 16 : 32);
-		i40iw_qp_ring_push_db(qp, wqe_idx);
-	} else {
-		if (post_sq)
-			i40iw_qp_post_wr(qp);
-	}
 	return 0;
 }
 	q_type = (u8)RS_64(qword3, I40IW_CQ_SQ);
 	info->error = (bool)RS_64(qword3, I40IW_CQ_ERROR);
-	info->push_dropped = (bool)RS_64(qword3, I40IWCQ_PSHDROP);
 	if (info->error) {
 		info->comp_status = I40IW_COMPL_STATUS_FLUSHED;
 		info->major_err = (bool)RS_64(qword3, I40IW_CQ_MAJERR);
 static const struct i40iw_qp_uk_ops iw_qp_uk_ops = {
 	.iw_qp_post_wr = i40iw_qp_post_wr,
-	.iw_qp_ring_push_db = i40iw_qp_ring_push_db,
 	.iw_rdma_write = i40iw_rdma_write,
 	.iw_rdma_read = i40iw_rdma_read,
 	.iw_send = i40iw_send,
 	qp->wqe_alloc_reg = info->wqe_alloc_reg;
 	qp->qp_id = info->qp_id;
 	qp->sq_size = info->sq_size;
-	qp->push_db = info->push_db;
-	qp->push_wqe = info->push_wqe;
 	qp->max_sq_frag_cnt = info->max_sq_frag_cnt;
 	sq_ring_size = qp->sq_size << sqshift;

drivers/infiniband/hw/i40iw/i40iw_user.h+0−8

 	I40IW_MAX_SGE_RD =			1,
 	I40IW_MAX_OUTBOUND_MESSAGE_SIZE =	2147483647,
 	I40IW_MAX_INBOUND_MESSAGE_SIZE =	2147483647,
-	I40IW_MAX_PUSH_PAGE_COUNT =		4096,
 	I40IW_MAX_PE_ENABLED_VF_COUNT =		32,
 	I40IW_MAX_VF_FPM_ID =			47,
 	I40IW_MAX_VF_PER_PF =			127,
 	I40IW_MAX_SQ_PAYLOAD_SIZE =		2145386496,
 	I40IW_MAX_INLINE_DATA_SIZE =		48,
-	I40IW_MAX_PUSHMODE_INLINE_DATA_SIZE =	48,
 	I40IW_MAX_IRD_SIZE =			64,
 	I40IW_MAX_ORD_SIZE =			127,
 	I40IW_MAX_WQ_ENTRIES =			2048,
 	u16 minor_err;
 	u8 op_type;
 	bool stag_invalid_set;
-	bool push_dropped;
 	bool error;
 	bool is_srq;
 	bool solicited_event;
 struct i40iw_qp_uk_ops {
 	void (*iw_qp_post_wr)(struct i40iw_qp_uk *);
-	void (*iw_qp_ring_push_db)(struct i40iw_qp_uk *, u32);
 	enum i40iw_status_code (*iw_rdma_write)(struct i40iw_qp_uk *,
 						struct i40iw_post_sq_info *, bool);
 	enum i40iw_status_code (*iw_rdma_read)(struct i40iw_qp_uk *,
 	struct i40iw_sq_uk_wr_trk_info *sq_wrtrk_array;
 	u64 *rq_wrid_array;
 	u64 *shadow_area;
-	u32 *push_db;
-	u64 *push_wqe;
 	struct i40iw_ring sq_ring;
 	struct i40iw_ring rq_ring;
 	struct i40iw_ring initial_ring;
 	u64 *shadow_area;
 	struct i40iw_sq_uk_wr_trk_info *sq_wrtrk_array;
 	u64 *rq_wrid_array;
-	u32 *push_db;
-	u64 *push_wqe;
 	u32 qp_id;
 	u32 sq_size;
 	u32 rq_size;

drivers/infiniband/hw/i40iw/i40iw_verbs.c+11−110

@@ -179,78 +179,6 @@ static int i40iw_mmap(struct ib_ucontext context, struct vm_area_struct vma) · 178 unmodified lines
179	pgprot_noncached(vma->vm_page_prot), NULL);	179	pgprot_noncached(vma->vm_page_prot), NULL);
180	}	180	}
181		181
182	/**
183	* i40iw_alloc_push_page - allocate a push page for qp
184	* @iwdev: iwarp device
185	* @qp: hardware control qp
186	*/
187	static void i40iw_alloc_push_page(struct i40iw_device iwdev, struct i40iw_sc_qp qp)
188	{
189	struct i40iw_cqp_request *cqp_request;
190	struct cqp_commands_info *cqp_info;
191	enum i40iw_status_code status;
192
193	if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
194	return;
195
196	cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
197	if (!cqp_request)
198	return;
199
200	atomic_inc(&cqp_request->refcount);
201
202	cqp_info = &cqp_request->info;
203	cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
204	cqp_info->post_sq = 1;
205
206	cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
207	cqp_info->in.u.manage_push_page.info.free_page = 0;
208	cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
209	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
210
211	status = i40iw_handle_cqp_op(iwdev, cqp_request);
212	if (!status)
213	qp->push_idx = cqp_request->compl_info.op_ret_val;
214	else
215	i40iw_pr_err("CQP-OP Push page fail");
216	i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
217	}
218
219	/**
220	* i40iw_dealloc_push_page - free a push page for qp
221	* @iwdev: iwarp device
222	* @qp: hardware control qp
223	*/
224	static void i40iw_dealloc_push_page(struct i40iw_device iwdev, struct i40iw_sc_qp qp)
225	{
226	struct i40iw_cqp_request *cqp_request;
227	struct cqp_commands_info *cqp_info;
228	enum i40iw_status_code status;
229
230	if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
231	return;
232
233	cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
234	if (!cqp_request)
235	return;
236
237	cqp_info = &cqp_request->info;
238	cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
239	cqp_info->post_sq = 1;
240
241	cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
242	cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
243	cqp_info->in.u.manage_push_page.info.free_page = 1;
244	cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
245	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
246
247	status = i40iw_handle_cqp_op(iwdev, cqp_request);
248	if (!status)
249	qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
250	else
251	i40iw_pr_err("CQP-OP Push page fail");
252	}
253
254	/**	182	/**
255	* i40iw_alloc_pd - allocate protection domain	183	* i40iw_alloc_pd - allocate protection domain
256	* @pd: PD pointer	184	* @pd: PD pointer
@@ -348,7 +276,6 @@ void i40iw_free_qp_resources(struct i40iw_qp *iwqp) · 91 unmodified lines
348	u32 qp_num = iwqp->ibqp.qp_num;	276	u32 qp_num = iwqp->ibqp.qp_num;
349		277
350	i40iw_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);	278	i40iw_ieq_cleanup_qp(iwdev->vsi.ieq, &iwqp->sc_qp);
351	i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
352	if (qp_num)	279	if (qp_num)
353	i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);	280	i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
354	if (iwpbl->pbl_allocated)	281	if (iwpbl->pbl_allocated)
@@ -533,7 +460,7 @@ static struct ib_qp i40iw_create_qp(struct ib_pd ibpd, · 178 unmodified lines
533	return ERR_PTR(-ENODEV);	460	return ERR_PTR(-ENODEV);
534		461
535	if (init_attr->create_flags)	462	if (init_attr->create_flags)
536	return ERR_PTR(-EINVAL);	463	return ERR_PTR(-EOPNOTSUPP);
537	if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)	464	if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
538	init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;	465	init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
539		466
@@ -561,8 +488,6 @@ static struct ib_qp i40iw_create_qp(struct ib_pd ibpd, · 21 unmodified lines
561		488
562	qp = &iwqp->sc_qp;	489	qp = &iwqp->sc_qp;
563	qp->back_qp = (void *)iwqp;	490	qp->back_qp = (void *)iwqp;
564	qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
565
566	iwqp->iwdev = iwdev;	491	iwqp->iwdev = iwdev;
567	iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;	492	iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
568		493
@@ -606,8 +531,6 @@ static struct ib_qp i40iw_create_qp(struct ib_pd ibpd, · 37 unmodified lines
606	err_code = -EOPNOTSUPP;	531	err_code = -EOPNOTSUPP;
607	goto error;	532	goto error;
608	}	533	}
609	if (iwdev->push_mode)
610	i40iw_alloc_push_page(iwdev, qp);
611	if (udata) {	534	if (udata) {
612	err_code = ib_copy_from_udata(&req, udata, sizeof(req));	535	err_code = ib_copy_from_udata(&req, udata, sizeof(req));
613	if (err_code) {	536	if (err_code) {
@@ -666,13 +589,6 @@ static struct ib_qp i40iw_create_qp(struct ib_pd ibpd, · 52 unmodified lines
666	ctx_info->iwarp_info_valid = true;	589	ctx_info->iwarp_info_valid = true;
667	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;	590	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
668	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;	591	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
669	if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
670	ctx_info->push_mode_en = false;
671	} else {
672	ctx_info->push_mode_en = true;
673	ctx_info->push_idx = qp->push_idx;
674	}
675
676	ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,	592	ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
677	(u64 *)iwqp->host_ctx.va,	593	(u64 *)iwqp->host_ctx.va,
678	ctx_info);	594	ctx_info);
@@ -712,7 +628,7 @@ static struct ib_qp i40iw_create_qp(struct ib_pd ibpd, · 33 unmodified lines
712	uresp.actual_sq_size = sq_size;	628	uresp.actual_sq_size = sq_size;
713	uresp.actual_rq_size = rq_size;	629	uresp.actual_rq_size = rq_size;
714	uresp.qp_id = qp_num;	630	uresp.qp_id = qp_num;
715	uresp.push_idx = qp->push_idx;	631	uresp.push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
716	err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));	632	err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
717	if (err_code) {	633	if (err_code) {
718	i40iw_pr_err("copy_to_udata failed\n");	634	i40iw_pr_err("copy_to_udata failed\n");
@@ -832,6 +748,9 @@ int i40iw_modify_qp(struct ib_qp ibqp, struct ib_qp_attr attr, · 113 unmodified lines
832	u32 err;	748	u32 err;
833	unsigned long flags;	749	unsigned long flags;
834		750
		751	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
		752	return -EOPNOTSUPP;
		753
835	memset(&info, 0, sizeof(info));	754	memset(&info, 0, sizeof(info));
836	ctx_info = &iwqp->ctx_info;	755	ctx_info = &iwqp->ctx_info;
837	iwarp_info = &iwqp->iwarp_info;	756	iwarp_info = &iwqp->iwarp_info;
@@ -1081,6 +1000,9 @@ static int i40iw_create_cq(struct ib_cq *ibcq, · 243 unmodified lines
1081	int err_code;	1000	int err_code;
1082	int entries = attr->cqe;	1001	int entries = attr->cqe;
1083		1002
		1003	if (attr->flags)
		1004	return -EOPNOTSUPP;
		1005
1084	if (iwdev->closing)	1006	if (iwdev->closing)
1085	return -ENODEV;	1007	return -ENODEV;
1086		1008
@@ -2033,7 +1955,7 @@ static ssize_t hw_rev_show(struct device *dev, · 946 unmodified lines
2033	rdma_device_to_drv_device(dev, struct i40iw_ib_device, ibdev);	1955	rdma_device_to_drv_device(dev, struct i40iw_ib_device, ibdev);
2034	u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;	1956	u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2035		1957
2036	return sprintf(buf, "%x\n", hw_rev);	1958	return sysfs_emit(buf, "%x\n", hw_rev);
2037	}	1959	}
2038	static DEVICE_ATTR_RO(hw_rev);	1960	static DEVICE_ATTR_RO(hw_rev);
2039		1961
@@ -2043,7 +1965,7 @@ static DEVICE_ATTR_RO(hw_rev); · 3 unmodified lines
2043	static ssize_t hca_type_show(struct device *dev,	1965	static ssize_t hca_type_show(struct device *dev,
2044	struct device_attribute attr, char buf)	1966	struct device_attribute attr, char buf)
2045	{	1967	{
2046	return sprintf(buf, "I40IW\n");	1968	return sysfs_emit(buf, "I40IW\n");
2047	}	1969	}
2048	static DEVICE_ATTR_RO(hca_type);	1970	static DEVICE_ATTR_RO(hca_type);
2049		1971
@@ -2053,7 +1975,7 @@ static DEVICE_ATTR_RO(hca_type); · 3 unmodified lines
2053	static ssize_t board_id_show(struct device *dev,	1975	static ssize_t board_id_show(struct device *dev,
2054	struct device_attribute attr, char buf)	1976	struct device_attribute attr, char buf)
2055	{	1977	{
2056	return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");	1978	return sysfs_emit(buf, "%.*s\n", 32, "I40IW Board ID");
2057	}	1979	}
2058	static DEVICE_ATTR_RO(board_id);	1980	static DEVICE_ATTR_RO(board_id);
2059		1981
@@ -2661,27 +2583,6 @@ static struct i40iw_ib_device i40iw_init_rdma_device(struct i40iw_device iwdev · 601 unmodified lines
2661	iwibdev->ibdev.node_type = RDMA_NODE_RNIC;	2583	iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2662	ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);	2584	ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2663		2585
2664	iwibdev->ibdev.uverbs_cmd_mask =
2665	(1ull << IB_USER_VERBS_CMD_GET_CONTEXT) \|
2666	(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) \|
2667	(1ull << IB_USER_VERBS_CMD_QUERY_PORT) \|
2668	(1ull << IB_USER_VERBS_CMD_ALLOC_PD) \|
2669	(1ull << IB_USER_VERBS_CMD_DEALLOC_PD) \|
2670	(1ull << IB_USER_VERBS_CMD_REG_MR) \|
2671	(1ull << IB_USER_VERBS_CMD_DEREG_MR) \|
2672	(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) \|
2673	(1ull << IB_USER_VERBS_CMD_CREATE_CQ) \|
2674	(1ull << IB_USER_VERBS_CMD_DESTROY_CQ) \|
2675	(1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) \|
2676	(1ull << IB_USER_VERBS_CMD_CREATE_QP) \|
2677	(1ull << IB_USER_VERBS_CMD_MODIFY_QP) \|
2678	(1ull << IB_USER_VERBS_CMD_QUERY_QP) \|
2679	(1ull << IB_USER_VERBS_CMD_POLL_CQ) \|
2680	(1ull << IB_USER_VERBS_CMD_CREATE_AH) \|
2681	(1ull << IB_USER_VERBS_CMD_DESTROY_AH) \|
2682	(1ull << IB_USER_VERBS_CMD_DESTROY_QP) \|
2683	(1ull << IB_USER_VERBS_CMD_POST_RECV) \|
2684	(1ull << IB_USER_VERBS_CMD_POST_SEND);
2685	iwibdev->ibdev.phys_port_cnt = 1;	2586	iwibdev->ibdev.phys_port_cnt = 1;
2686	iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;	2587	iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
2687	iwibdev->ibdev.dev.parent = &pcidev->dev;	2588	iwibdev->ibdev.dev.parent = &pcidev->dev;

drivers/infiniband/hw/mlx4/mad.c+1−0

@@ -1523,6 +1523,7 @@ static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc · 1522 unmodified lines
1523	return;	1523	return;
1524	} else	1524	} else
1525	*slave_id = slave;	1525	*slave_id = slave;
		1526	break;
1526	default:	1527	default:
1527	/* nothing */;	1528	/* nothing */;
1528	}	1529	}

drivers/infiniband/hw/mlx4/main.c+7−57

@@ -2024,7 +2024,8 @@ static ssize_t hca_type_show(struct device *device, · 2023 unmodified lines
2024	{	2024	{
2025	struct mlx4_ib_dev *dev =	2025	struct mlx4_ib_dev *dev =
2026	rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);	2026	rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2027	return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);	2027
		2028	return sysfs_emit(buf, "MT%d\n", dev->dev->persist->pdev->device);
2028	}	2029	}
2029	static DEVICE_ATTR_RO(hca_type);	2030	static DEVICE_ATTR_RO(hca_type);
2030		2031
@@ -2033,7 +2034,8 @@ static ssize_t hw_rev_show(struct device *device, · 2 unmodified lines
2033	{	2034	{
2034	struct mlx4_ib_dev *dev =	2035	struct mlx4_ib_dev *dev =
2035	rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);	2036	rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2036	return sprintf(buf, "%x\n", dev->dev->rev_id);	2037
		2038	return sysfs_emit(buf, "%x\n", dev->dev->rev_id);
2037	}	2039	}
2038	static DEVICE_ATTR_RO(hw_rev);	2040	static DEVICE_ATTR_RO(hw_rev);
2039		2041
@@ -2043,8 +2045,7 @@ static ssize_t board_id_show(struct device *device, · 3 unmodified lines
2043	struct mlx4_ib_dev *dev =	2045	struct mlx4_ib_dev *dev =
2044	rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);	2046	rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2045		2047
2046	return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,	2048	return sysfs_emit(buf, "%.*s\n", MLX4_BOARD_ID_LEN, dev->dev->board_id);
2047	dev->dev->board_id);
2048	}	2049	}
2049	static DEVICE_ATTR_RO(board_id);	2050	static DEVICE_ATTR_RO(board_id);
2050		2051
@@ -2264,10 +2265,7 @@ static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, · 213 unmodified lines
2264	u64 release_mac = MLX4_IB_INVALID_MAC;	2265	u64 release_mac = MLX4_IB_INVALID_MAC;
2265	struct mlx4_ib_qp *qp;	2266	struct mlx4_ib_qp *qp;
2266		2267
2267	read_lock(&dev_base_lock);
2268	new_smac = mlx4_mac_to_u64(dev->dev_addr);	2268	new_smac = mlx4_mac_to_u64(dev->dev_addr);
2269	read_unlock(&dev_base_lock);
2270
2271	atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);	2269	atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2272		2270
2273	/* no need for update QP1 and mac registration in non-SRIOV */	2271	/* no need for update QP1 and mac registration in non-SRIOV */
@@ -2657,73 +2655,25 @@ static void mlx4_ib_add(struct mlx4_dev dev) · 383 unmodified lines
2657	ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;	2655	ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2658	ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev;	2656	ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev;
2659		2657
2660	ibdev->ib_dev.uverbs_cmd_mask =
2661	(1ull << IB_USER_VERBS_CMD_GET_CONTEXT) \|
2662	(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) \|
2663	(1ull << IB_USER_VERBS_CMD_QUERY_PORT) \|
2664	(1ull << IB_USER_VERBS_CMD_ALLOC_PD) \|
2665	(1ull << IB_USER_VERBS_CMD_DEALLOC_PD) \|
2666	(1ull << IB_USER_VERBS_CMD_REG_MR) \|
2667	(1ull << IB_USER_VERBS_CMD_REREG_MR) \|
2668	(1ull << IB_USER_VERBS_CMD_DEREG_MR) \|
2669	(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) \|
2670	(1ull << IB_USER_VERBS_CMD_CREATE_CQ) \|
2671	(1ull << IB_USER_VERBS_CMD_RESIZE_CQ) \|
2672	(1ull << IB_USER_VERBS_CMD_DESTROY_CQ) \|
2673	(1ull << IB_USER_VERBS_CMD_CREATE_QP) \|
2674	(1ull << IB_USER_VERBS_CMD_MODIFY_QP) \|
2675	(1ull << IB_USER_VERBS_CMD_QUERY_QP) \|
2676	(1ull << IB_USER_VERBS_CMD_DESTROY_QP) \|
2677	(1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) \|
2678	(1ull << IB_USER_VERBS_CMD_DETACH_MCAST) \|
2679	(1ull << IB_USER_VERBS_CMD_CREATE_SRQ) \|
2680	(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) \|
2681	(1ull << IB_USER_VERBS_CMD_QUERY_SRQ) \|
2682	(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) \|
2683	(1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) \|
2684	(1ull << IB_USER_VERBS_CMD_OPEN_QP);
2685
2686	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops);	2658	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops);
2687	ibdev->ib_dev.uverbs_ex_cmd_mask \|=
2688	(1ull << IB_USER_VERBS_EX_CMD_MODIFY_CQ) \|
2689	(1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) \|
2690	(1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) \|
2691	(1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2692		2659
2693	if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) &&	2660	if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) &&
2694	((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) ==	2661	((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) ==
2695	IB_LINK_LAYER_ETHERNET) \|\|	2662	IB_LINK_LAYER_ETHERNET) \|\|
2696	(mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) ==	2663	(mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) ==
2697	IB_LINK_LAYER_ETHERNET))) {	2664	IB_LINK_LAYER_ETHERNET)))
2698	ibdev->ib_dev.uverbs_ex_cmd_mask \|=
2699	(1ull << IB_USER_VERBS_EX_CMD_CREATE_WQ) \|
2700	(1ull << IB_USER_VERBS_EX_CMD_MODIFY_WQ) \|
2701	(1ull << IB_USER_VERBS_EX_CMD_DESTROY_WQ) \|
2702	(1ull << IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL) \|
2703	(1ull << IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL);
2704	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops);	2665	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops);
2705	}
2706		2666
2707	if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW \|\|	2667	if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW \|\|
2708	dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {	2668	dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN)
2709	ibdev->ib_dev.uverbs_cmd_mask \|=
2710	(1ull << IB_USER_VERBS_CMD_ALLOC_MW) \|
2711	(1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2712	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops);	2669	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops);
2713	}
2714		2670
2715	if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {	2671	if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2716	ibdev->ib_dev.uverbs_cmd_mask \|=
2717	(1ull << IB_USER_VERBS_CMD_OPEN_XRCD) \|
2718	(1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2719	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops);	2672	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops);
2720	}	2673	}
2721		2674
2722	if (check_flow_steering_support(dev)) {	2675	if (check_flow_steering_support(dev)) {
2723	ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;	2676	ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2724	ibdev->ib_dev.uverbs_ex_cmd_mask \|=
2725	(1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) \|
2726	(1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2727	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops);	2677	ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops);
2728	}	2678	}
2729		2679

drivers/infiniband/hw/mlx4/mcg.c+46−36

@@ -988,53 +988,63 @@ int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, · 987 unmodified lines
988	}	988	}
989		989
990	static ssize_t sysfs_show_group(struct device *dev,	990	static ssize_t sysfs_show_group(struct device *dev,
991	struct device_attribute attr, char buf)	991	struct device_attribute attr, char buf)
992	{	992	{
993	struct mcast_group *group =	993	struct mcast_group *group =
994	container_of(attr, struct mcast_group, dentry);	994	container_of(attr, struct mcast_group, dentry);
995	struct mcast_req *req = NULL;	995	struct mcast_req *req = NULL;
996	char pending_str[40];
997	char state_str[40];	996	char state_str[40];
998	ssize_t len = 0;	997	char pending_str[40];
999	int f;	998	int len;
		999	int i;
		1000	u32 hoplimit;
1000		1001
1001	if (group->state == MCAST_IDLE)	1002	if (group->state == MCAST_IDLE)
1002	sprintf(state_str, "%s", get_state_string(group->state));	1003	scnprintf(state_str, sizeof(state_str), "%s",
		1004	get_state_string(group->state));
1003	else	1005	else
1004	sprintf(state_str, "%s(TID=0x%llx)",	1006	scnprintf(state_str, sizeof(state_str), "%s(TID=0x%llx)",
1005	get_state_string(group->state),	1007	get_state_string(group->state),
1006	be64_to_cpu(group->last_req_tid));	1008	be64_to_cpu(group->last_req_tid));
		1009
1007	if (list_empty(&group->pending_list)) {	1010	if (list_empty(&group->pending_list)) {
1008	sprintf(pending_str, "No");	1011	scnprintf(pending_str, sizeof(pending_str), "No");
1009	} else {	1012	} else {
1010	req = list_first_entry(&group->pending_list, struct mcast_req, group_list);	1013	req = list_first_entry(&group->pending_list, struct mcast_req,
1011	sprintf(pending_str, "Yes(TID=0x%llx)",	1014	group_list);
1012	be64_to_cpu(req->sa_mad.mad_hdr.tid));	1015	scnprintf(pending_str, sizeof(pending_str), "Yes(TID=0x%llx)",
		1016	be64_to_cpu(req->sa_mad.mad_hdr.tid));
1013	}	1017	}
1014	len += sprintf(buf + len, "%1d [%02d,%02d,%02d] %4d %4s %5s ",	1018
1015	group->rec.scope_join_state & 0xf,	1019	len = sysfs_emit(buf, "%1d [%02d,%02d,%02d] %4d %4s %5s ",
1016	group->members[2], group->members[1], group->members[0],	1020	group->rec.scope_join_state & 0xf,
1017	atomic_read(&group->refcount),	1021	group->members[2],
1018	pending_str,	1022	group->members[1],
1019	state_str);	1023	group->members[0],
1020	for (f = 0; f < MAX_VFS; ++f)	1024	atomic_read(&group->refcount),
1021	if (group->func[f].state == MCAST_MEMBER)	1025	pending_str,
1022	len += sprintf(buf + len, "%d[%1x] ",	1026	state_str);
1023	f, group->func[f].join_state);	1027
1024		1028	for (i = 0; i < MAX_VFS; i++) {
1025	len += sprintf(buf + len, "\t\t(%4hx %4x %2x %2x %2x %2x %2x "	1029	if (group->func[i].state == MCAST_MEMBER)
1026	"%4x %4x %2x %2x)\n",	1030	len += sysfs_emit_at(buf, len, "%d[%1x] ", i,
1027	be16_to_cpu(group->rec.pkey),	1031	group->func[i].join_state);
1028	be32_to_cpu(group->rec.qkey),	1032	}
1029	(group->rec.mtusel_mtu & 0xc0) >> 6,	1033
1030	group->rec.mtusel_mtu & 0x3f,	1034	hoplimit = be32_to_cpu(group->rec.sl_flowlabel_hoplimit);
1031	group->rec.tclass,	1035	len += sysfs_emit_at(buf, len,
1032	(group->rec.ratesel_rate & 0xc0) >> 6,	1036	"\t\t(%4hx %4x %2x %2x %2x %2x %2x %4x %4x %2x %2x)\n",
1033	group->rec.ratesel_rate & 0x3f,	1037	be16_to_cpu(group->rec.pkey),
1034	(be32_to_cpu(group->rec.sl_flowlabel_hoplimit) & 0xf0000000) >> 28,	1038	be32_to_cpu(group->rec.qkey),
1035	(be32_to_cpu(group->rec.sl_flowlabel_hoplimit) & 0x0fffff00) >> 8,	1039	(group->rec.mtusel_mtu & 0xc0) >> 6,
1036	be32_to_cpu(group->rec.sl_flowlabel_hoplimit) & 0x000000ff,	1040	(group->rec.mtusel_mtu & 0x3f),
1037	group->rec.proxy_join);	1041	group->rec.tclass,
		1042	(group->rec.ratesel_rate & 0xc0) >> 6,
		1043	(group->rec.ratesel_rate & 0x3f),
		1044	(hoplimit & 0xf0000000) >> 28,
		1045	(hoplimit & 0x0fffff00) >> 8,
		1046	(hoplimit & 0x000000ff),
		1047	group->rec.proxy_join);
1038		1048
1039	return len;	1049	return len;
1040	}	1050	}

drivers/infiniband/hw/mlx4/mlx4_ib.h+4−4

@@ -908,10 +908,10 @@ int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev dev, int count, int qpn); · 907 unmodified lines
908	void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);	908	void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
909	int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev mdev, struct mlx4_ib_qp mqp,	909	int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev mdev, struct mlx4_ib_qp mqp,
910	int is_attach);	910	int is_attach);
911	int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,	911	struct ib_mr mlx4_ib_rereg_user_mr(struct ib_mr mr, int flags, u64 start,
912	u64 start, u64 length, u64 virt_addr,	912	u64 length, u64 virt_addr,
913	int mr_access_flags, struct ib_pd *pd,	913	int mr_access_flags, struct ib_pd *pd,
914	struct ib_udata *udata);	914	struct ib_udata *udata);
915	int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,	915	int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
916	const struct ib_gid_attr *attr);	916	const struct ib_gid_attr *attr);
917		917

drivers/infiniband/hw/mlx4/mr.c+8−8

@@ -456,10 +456,10 @@ err_free: · 455 unmodified lines
456	return ERR_PTR(err);	456	return ERR_PTR(err);
457	}	457	}
458		458
459	int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,	459	struct ib_mr mlx4_ib_rereg_user_mr(struct ib_mr mr, int flags, u64 start,
460	u64 start, u64 length, u64 virt_addr,	460	u64 length, u64 virt_addr,
461	int mr_access_flags, struct ib_pd *pd,	461	int mr_access_flags, struct ib_pd *pd,
462	struct ib_udata *udata)	462	struct ib_udata *udata)
463	{	463	{
464	struct mlx4_ib_dev *dev = to_mdev(mr->device);	464	struct mlx4_ib_dev *dev = to_mdev(mr->device);
465	struct mlx4_ib_mr *mmr = to_mmr(mr);	465	struct mlx4_ib_mr *mmr = to_mmr(mr);
@@ -472,9 +472,8 @@ int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags, · 6 unmodified lines
472	* race exists.	472	* race exists.
473	*/	473	*/
474	err = mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry);	474	err = mlx4_mr_hw_get_mpt(dev->dev, &mmr->mmr, &pmpt_entry);
475
476	if (err)	475	if (err)
477	return err;	476	return ERR_PTR(err);
478		477
479	if (flags & IB_MR_REREG_PD) {	478	if (flags & IB_MR_REREG_PD) {
480	err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry,	479	err = mlx4_mr_hw_change_pd(dev->dev, *pmpt_entry,
@@ -542,8 +541,9 @@ int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags, · 61 unmodified lines
542		541
543	release_mpt_entry:	542	release_mpt_entry:
544	mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry);	543	mlx4_mr_hw_put_mpt(dev->dev, pmpt_entry);
545		544	if (err)
546	return err;	545	return ERR_PTR(err);
		546	return NULL;
547	}	547	}
548		548
549	static int	549	static int

drivers/infiniband/hw/mlx4/qp.c+12−2

 					MLX4_IB_SRIOV_SQP |
 					MLX4_IB_QP_NETIF |
 					MLX4_IB_QP_CREATE_ROCE_V2_GSI))
-		return -EINVAL;
+		return -EOPNOTSUPP;
 	if (init_attr->create_flags & IB_QP_CREATE_NETIF_QP) {
 		if (init_attr->qp_type != IB_QPT_UD)
 		if (err)
 			return err;
+		if (init_attr->create_flags &
+		    (MLX4_IB_SRIOV_SQP | MLX4_IB_SRIOV_TUNNEL_QP))
+			/* Internal QP created with ib_create_qp */
+			rdma_restrack_no_track(&qp->ibqp.res);
 		qp->port	= init_attr->port_num;
 		qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 :
 			init_attr->create_flags & MLX4_IB_QP_CREATE_ROCE_V2_GSI ? sqpn : 1;
 	struct mlx4_ib_qp *mqp = to_mqp(ibqp);
 	int ret;
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	ret = _mlx4_ib_modify_qp(ibqp, attr, attr_mask, udata);
 	if (mqp->mlx4_ib_qp_type == MLX4_IB_QPT_GSI) {
 	qp_attr->qp_access_flags     =
 		to_ib_qp_access_flags(be32_to_cpu(context.params2));
-	if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) {
+	if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC ||
+	    qp->ibqp.qp_type == IB_QPT_XRC_INI ||
+	    qp->ibqp.qp_type == IB_QPT_XRC_TGT) {
 		to_rdma_ah_attr(dev, &qp_attr->ah_attr, &context.pri_path);
 		to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, &context.alt_path);
 		qp_attr->alt_pkey_index = context.alt_path.pkey_index & 0x7f;

drivers/infiniband/hw/mlx4/srq.c+4−0

 	int err;
 	int i;
+	if (init_attr->srq_type != IB_SRQT_BASIC &&
+	    init_attr->srq_type != IB_SRQT_XRC)
+		return -EOPNOTSUPP;
 	/* Sanity check SRQ size before proceeding */
 	if (init_attr->attr.max_wr  >= dev->dev->caps.max_srq_wqes ||
 	    init_attr->attr.max_sge >  dev->dev->caps.max_srq_sge)

drivers/infiniband/hw/mlx4/sysfs.c+28−38

@@ -56,7 +56,7 @@ static ssize_t show_admin_alias_guid(struct device *dev, · 55 unmodified lines
56	mlx4_ib_iov_dentry->entry_num,	56	mlx4_ib_iov_dentry->entry_num,
57	port->num);	57	port->num);
58		58
59	return sprintf(buf, "%llx\n", be64_to_cpu(sysadmin_ag_val));	59	return sysfs_emit(buf, "%llx\n", be64_to_cpu(sysadmin_ag_val));
60	}	60	}
61		61
62	/* store_admin_alias_guid stores the (new) administratively assigned value of that GUID.	62	/* store_admin_alias_guid stores the (new) administratively assigned value of that GUID.
@@ -117,22 +117,24 @@ static ssize_t show_port_gid(struct device *dev, · 54 unmodified lines
117	struct mlx4_ib_iov_port *port = mlx4_ib_iov_dentry->ctx;	117	struct mlx4_ib_iov_port *port = mlx4_ib_iov_dentry->ctx;
118	struct mlx4_ib_dev *mdev = port->dev;	118	struct mlx4_ib_dev *mdev = port->dev;
119	union ib_gid gid;	119	union ib_gid gid;
120	ssize_t ret;	120	int ret;
		121	__be16 *raw;
121		122
122	ret = __mlx4_ib_query_gid(&mdev->ib_dev, port->num,	123	ret = __mlx4_ib_query_gid(&mdev->ib_dev, port->num,
123	mlx4_ib_iov_dentry->entry_num, &gid, 1);	124	mlx4_ib_iov_dentry->entry_num, &gid, 1);
124	if (ret)	125	if (ret)
125	return ret;	126	return ret;
126	ret = sprintf(buf, "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",	127
127	be16_to_cpu(((__be16 *) gid.raw)[0]),	128	raw = (__be16 *)gid.raw;
128	be16_to_cpu(((__be16 *) gid.raw)[1]),	129	return sysfs_emit(buf, "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
129	be16_to_cpu(((__be16 *) gid.raw)[2]),	130	be16_to_cpu(raw[0]),
130	be16_to_cpu(((__be16 *) gid.raw)[3]),	131	be16_to_cpu(raw[1]),
131	be16_to_cpu(((__be16 *) gid.raw)[4]),	132	be16_to_cpu(raw[2]),
132	be16_to_cpu(((__be16 *) gid.raw)[5]),	133	be16_to_cpu(raw[3]),
133	be16_to_cpu(((__be16 *) gid.raw)[6]),	134	be16_to_cpu(raw[4]),
134	be16_to_cpu(((__be16 *) gid.raw)[7]));	135	be16_to_cpu(raw[5]),
135	return ret;	136	be16_to_cpu(raw[6]),
		137	be16_to_cpu(raw[7]));
136	}	138	}
137		139
138	static ssize_t show_phys_port_pkey(struct device *dev,	140	static ssize_t show_phys_port_pkey(struct device *dev,
@@ -151,7 +153,7 @@ static ssize_t show_phys_port_pkey(struct device *dev, · 12 unmodified lines
151	if (ret)	153	if (ret)
152	return ret;	154	return ret;
153		155
154	return sprintf(buf, "0x%04x\n", pkey);	156	return sysfs_emit(buf, "0x%04x\n", pkey);
155	}	157	}
156		158
157	#define DENTRY_REMOVE(_dentry) \	159	#define DENTRY_REMOVE(_dentry) \
@@ -441,16 +443,12 @@ static ssize_t show_port_pkey(struct mlx4_port p, struct port_attribute attr, · 283 unmodified lines
441	{	443	{
442	struct port_table_attribute *tab_attr =	444	struct port_table_attribute *tab_attr =
443	container_of(attr, struct port_table_attribute, attr);	445	container_of(attr, struct port_table_attribute, attr);
444	ssize_t ret = -ENODEV;	446	struct pkey_mgt *m = &p->dev->pkeys;
445		447	u8 key = m->virt2phys_pkey[p->slave][p->port_num - 1][tab_attr->index];
446	if (p->dev->pkeys.virt2phys_pkey[p->slave][p->port_num - 1][tab_attr->index] >=	448
447	(p->dev->dev->caps.pkey_table_len[p->port_num]))	449	if (key >= p->dev->dev->caps.pkey_table_len[p->port_num])
448	ret = sprintf(buf, "none\n");	450	return sysfs_emit(buf, "none\n");
449	else	451	return sysfs_emit(buf, "%d\n", key);
450	ret = sprintf(buf, "%d\n",
451	p->dev->pkeys.virt2phys_pkey[p->slave]
452	[p->port_num - 1][tab_attr->index]);
453	return ret;
454	}	452	}
455		453
456	static ssize_t store_port_pkey(struct mlx4_port p, struct port_attribute attr,	454	static ssize_t store_port_pkey(struct mlx4_port p, struct port_attribute attr,
@@ -488,7 +486,7 @@ static ssize_t store_port_pkey(struct mlx4_port p, struct port_attribute attr, · 31 unmodified lines
488	static ssize_t show_port_gid_idx(struct mlx4_port *p,	486	static ssize_t show_port_gid_idx(struct mlx4_port *p,
489	struct port_attribute attr, char buf)	487	struct port_attribute attr, char buf)
490	{	488	{
491	return sprintf(buf, "%d\n", p->slave);	489	return sysfs_emit(buf, "%d\n", p->slave);
492	}	490	}
493		491
494	static struct attribute **	492	static struct attribute **
@@ -542,14 +540,10 @@ static ssize_t sysfs_show_smi_enabled(struct device *dev, · 47 unmodified lines
542	{	540	{
543	struct mlx4_port *p =	541	struct mlx4_port *p =
544	container_of(attr, struct mlx4_port, smi_enabled);	542	container_of(attr, struct mlx4_port, smi_enabled);
545	ssize_t len = 0;
546		543
547	if (mlx4_vf_smi_enabled(p->dev->dev, p->slave, p->port_num))	544	return sysfs_emit(buf, "%d\n",
548	len = sprintf(buf, "%d\n", 1);	545	!!mlx4_vf_smi_enabled(p->dev->dev, p->slave,
549	else	546	p->port_num));
550	len = sprintf(buf, "%d\n", 0);
551
552	return len;
553	}	547	}
554		548
555	static ssize_t sysfs_show_enable_smi_admin(struct device *dev,	549	static ssize_t sysfs_show_enable_smi_admin(struct device *dev,
@@ -558,14 +552,10 @@ static ssize_t sysfs_show_enable_smi_admin(struct device *dev, · 2 unmodified lines
558	{	552	{
559	struct mlx4_port *p =	553	struct mlx4_port *p =
560	container_of(attr, struct mlx4_port, enable_smi_admin);	554	container_of(attr, struct mlx4_port, enable_smi_admin);
561	ssize_t len = 0;
562
563	if (mlx4_vf_get_enable_smi_admin(p->dev->dev, p->slave, p->port_num))
564	len = sprintf(buf, "%d\n", 1);
565	else
566	len = sprintf(buf, "%d\n", 0);
567		555
568	return len;	556	return sysfs_emit(buf, "%d\n",
		557	!!mlx4_vf_get_enable_smi_admin(p->dev->dev, p->slave,
		558	p->port_num));
569	}	559	}
570		560
571	static ssize_t sysfs_store_enable_smi_admin(struct device *dev,	561	static ssize_t sysfs_store_enable_smi_admin(struct device *dev,

drivers/infiniband/hw/mlx5/cq.c+49−28

@@ -707,10 +707,10 @@ static int create_cq_user(struct mlx5_ib_dev dev, struct ib_udata udata, · 706 unmodified lines
707	int cqe_size, int index, int *inlen)	707	int cqe_size, int index, int *inlen)
708	{	708	{
709	struct mlx5_ib_create_cq ucmd = {};	709	struct mlx5_ib_create_cq ucmd = {};
		710	unsigned long page_size;
		711	unsigned int page_offset_quantized;
710	size_t ucmdlen;	712	size_t ucmdlen;
711	int page_shift;
712	__be64 *pas;	713	__be64 *pas;
713	int npages;
714	int ncont;	714	int ncont;
715	void *cqc;	715	void *cqc;
716	int err;	716	int err;
@@ -742,14 +742,24 @@ static int create_cq_user(struct mlx5_ib_dev dev, struct ib_udata udata, · 25 unmodified lines
742	return err;	742	return err;
743	}	743	}
744		744
		745	page_size = mlx5_umem_find_best_cq_quantized_pgoff(
		746	cq->buf.umem, cqc, log_page_size, MLX5_ADAPTER_PAGE_SHIFT,
		747	page_offset, 64, &page_offset_quantized);
		748	if (!page_size) {
		749	err = -EINVAL;
		750	goto err_umem;
		751	}
		752
745	err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &cq->db);	753	err = mlx5_ib_db_map_user(context, udata, ucmd.db_addr, &cq->db);
746	if (err)	754	if (err)
747	goto err_umem;	755	goto err_umem;
748		756
749	mlx5_ib_cont_pages(cq->buf.umem, ucmd.buf_addr, 0, &npages, &page_shift,	757	ncont = ib_umem_num_dma_blocks(cq->buf.umem, page_size);
750	&ncont, NULL);	758	mlx5_ib_dbg(
751	mlx5_ib_dbg(dev, "addr 0x%llx, size %u, npages %d, page_shift %d, ncont %d\n",	759	dev,
752	ucmd.buf_addr, entries * ucmd.cqe_size, npages, page_shift, ncont);	760	"addr 0x%llx, size %u, npages %zu, page_size %lu, ncont %d\n",
		761	ucmd.buf_addr, entries * ucmd.cqe_size,
		762	ib_umem_num_pages(cq->buf.umem), page_size, ncont);
753		763
754	*inlen = MLX5_ST_SZ_BYTES(create_cq_in) +	764	*inlen = MLX5_ST_SZ_BYTES(create_cq_in) +
755	MLX5_FLD_SZ_BYTES(create_cq_in, pas[0]) * ncont;	765	MLX5_FLD_SZ_BYTES(create_cq_in, pas[0]) * ncont;
@@ -760,11 +770,12 @@ static int create_cq_user(struct mlx5_ib_dev dev, struct ib_udata udata, · 4 unmodified lines
760	}	770	}
761		771
762	pas = (__be64 )MLX5_ADDR_OF(create_cq_in, cqb, pas);	772	pas = (__be64 )MLX5_ADDR_OF(create_cq_in, cqb, pas);
763	mlx5_ib_populate_pas(dev, cq->buf.umem, page_shift, pas, 0);	773	mlx5_ib_populate_pas(cq->buf.umem, page_size, pas, 0);
764		774
765	cqc = MLX5_ADDR_OF(create_cq_in, *cqb, cq_context);	775	cqc = MLX5_ADDR_OF(create_cq_in, *cqb, cq_context);
766	MLX5_SET(cqc, cqc, log_page_size,	776	MLX5_SET(cqc, cqc, log_page_size,
767	page_shift - MLX5_ADAPTER_PAGE_SHIFT);	777	order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
		778	MLX5_SET(cqc, cqc, page_offset, page_offset_quantized);
768		779
769	if (ucmd.flags & MLX5_IB_CREATE_CQ_FLAGS_UAR_PAGE_INDEX) {	780	if (ucmd.flags & MLX5_IB_CREATE_CQ_FLAGS_UAR_PAGE_INDEX) {
770	*index = ucmd.uar_page_index;	781	*index = ucmd.uar_page_index;
@@ -1128,13 +1139,12 @@ int mlx5_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period) · 357 unmodified lines
1128	}	1139	}
1129		1140
1130	static int resize_user(struct mlx5_ib_dev dev, struct mlx5_ib_cq cq,	1141	static int resize_user(struct mlx5_ib_dev dev, struct mlx5_ib_cq cq,
1131	int entries, struct ib_udata udata, int npas,	1142	int entries, struct ib_udata *udata,
1132	int page_shift, int cqe_size)	1143	int *cqe_size)
1133	{	1144	{
1134	struct mlx5_ib_resize_cq ucmd;	1145	struct mlx5_ib_resize_cq ucmd;
1135	struct ib_umem *umem;	1146	struct ib_umem *umem;
1136	int err;	1147	int err;
1137	int npages;
1138		1148
1139	err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd));	1149	err = ib_copy_from_udata(&ucmd, udata, sizeof(ucmd));
1140	if (err)	1150	if (err)
@@ -1155,9 +1165,6 @@ static int resize_user(struct mlx5_ib_dev dev, struct mlx5_ib_cq cq, · 14 unmodified lines
1155	return err;	1165	return err;
1156	}	1166	}
1157		1167
1158	mlx5_ib_cont_pages(umem, ucmd.buf_addr, 0, &npages, page_shift,
1159	npas, NULL);
1160
1161	cq->resize_umem = umem;	1168	cq->resize_umem = umem;
1162	*cqe_size = ucmd.cqe_size;	1169	*cqe_size = ucmd.cqe_size;
1163		1170
@@ -1250,7 +1257,8 @@ int mlx5_ib_resize_cq(struct ib_cq ibcq, int entries, struct ib_udata udata) · 86 unmodified lines
1250	int err;	1257	int err;
1251	int npas;	1258	int npas;
1252	__be64 *pas;	1259	__be64 *pas;
1253	int page_shift;	1260	unsigned int page_offset_quantized = 0;
		1261	unsigned int page_shift;
1254	int inlen;	1262	int inlen;
1255	int cqe_size;	1263	int cqe_size;
1256	unsigned long flags;	1264	unsigned long flags;
@@ -1277,22 +1285,34 @@ int mlx5_ib_resize_cq(struct ib_cq ibcq, int entries, struct ib_udata udata) · 20 unmodified lines
1277		1285
1278	mutex_lock(&cq->resize_mutex);	1286	mutex_lock(&cq->resize_mutex);
1279	if (udata) {	1287	if (udata) {
1280	err = resize_user(dev, cq, entries, udata, &npas, &page_shift,	1288	unsigned long page_size;
1281	&cqe_size);	1289
		1290	err = resize_user(dev, cq, entries, udata, &cqe_size);
		1291	if (err)
		1292	goto ex;
		1293
		1294	page_size = mlx5_umem_find_best_cq_quantized_pgoff(
		1295	cq->resize_umem, cqc, log_page_size,
		1296	MLX5_ADAPTER_PAGE_SHIFT, page_offset, 64,
		1297	&page_offset_quantized);
		1298	if (!page_size) {
		1299	err = -EINVAL;
		1300	goto ex_resize;
		1301	}
		1302	npas = ib_umem_num_dma_blocks(cq->resize_umem, page_size);
		1303	page_shift = order_base_2(page_size);
1282	} else {	1304	} else {
		1305	struct mlx5_frag_buf *frag_buf;
		1306
1283	cqe_size = 64;	1307	cqe_size = 64;
1284	err = resize_kernel(dev, cq, entries, cqe_size);	1308	err = resize_kernel(dev, cq, entries, cqe_size);
1285	if (!err) {	1309	if (err)
1286	struct mlx5_frag_buf *frag_buf = &cq->resize_buf->frag_buf;	1310	goto ex;
1287		1311	frag_buf = &cq->resize_buf->frag_buf;
1288	npas = frag_buf->npages;	1312	npas = frag_buf->npages;
1289	page_shift = frag_buf->page_shift;	1313	page_shift = frag_buf->page_shift;
1290	}
1291	}	1314	}
1292		1315
1293	if (err)
1294	goto ex;
1295
1296	inlen = MLX5_ST_SZ_BYTES(modify_cq_in) +	1316	inlen = MLX5_ST_SZ_BYTES(modify_cq_in) +
1297	MLX5_FLD_SZ_BYTES(modify_cq_in, pas[0]) * npas;	1317	MLX5_FLD_SZ_BYTES(modify_cq_in, pas[0]) * npas;
1298		1318
@@ -1304,8 +1324,8 @@ int mlx5_ib_resize_cq(struct ib_cq ibcq, int entries, struct ib_udata udata) · 5 unmodified lines
1304		1324
1305	pas = (__be64 *)MLX5_ADDR_OF(modify_cq_in, in, pas);	1325	pas = (__be64 *)MLX5_ADDR_OF(modify_cq_in, in, pas);
1306	if (udata)	1326	if (udata)
1307	mlx5_ib_populate_pas(dev, cq->resize_umem, page_shift,	1327	mlx5_ib_populate_pas(cq->resize_umem, 1UL << page_shift, pas,
1308	pas, 0);	1328	0);
1309	else	1329	else
1310	mlx5_fill_page_frag_array(&cq->resize_buf->frag_buf, pas);	1330	mlx5_fill_page_frag_array(&cq->resize_buf->frag_buf, pas);
1311		1331
@@ -1319,6 +1339,7 @@ int mlx5_ib_resize_cq(struct ib_cq ibcq, int entries, struct ib_udata udata) · 7 unmodified lines
1319		1339
1320	MLX5_SET(cqc, cqc, log_page_size,	1340	MLX5_SET(cqc, cqc, log_page_size,
1321	page_shift - MLX5_ADAPTER_PAGE_SHIFT);	1341	page_shift - MLX5_ADAPTER_PAGE_SHIFT);
		1342	MLX5_SET(cqc, cqc, page_offset, page_offset_quantized);
1322	MLX5_SET(cqc, cqc, cqe_sz,	1343	MLX5_SET(cqc, cqc, cqe_sz,
1323	cqe_sz_to_mlx_sz(cqe_size,	1344	cqe_sz_to_mlx_sz(cqe_size,
1324	cq->private_flags &	1345	cq->private_flags &

drivers/infiniband/hw/mlx5/devx.c+43−47

 struct devx_umem {
 	struct mlx5_core_dev		*mdev;
 	struct ib_umem			*umem;
-	u32				page_offset;
-	int				page_shift;
-	int				ncont;
 	u32				dinlen;
 	u32				dinbox[MLX5_ST_SZ_DW(general_obj_in_cmd_hdr)];
 };
 	else
 		ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
 				    obj->dinlen, out, sizeof(out));
-	if (ib_is_destroy_retryable(ret, why, uobject))
+	if (ret)
 		return ret;
 	devx_event_table = &dev->devx_event_table;
 	u64 addr;
 	size_t size;
 	u32 access;
-	int npages;
 	int err;
-	u32 page_mask;
 	if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
 	    uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
 	if (err)
 		return err;
-	err = ib_check_mr_access(access);
+	err = ib_check_mr_access(&dev->ib_dev, access);
 	if (err)
 		return err;
 	obj->umem = ib_umem_get(&dev->ib_dev, addr, size, access);
 	if (IS_ERR(obj->umem))
 		return PTR_ERR(obj->umem);
-	mlx5_ib_cont_pages(obj->umem, obj->umem->address,
-			   MLX5_MKEY_PAGE_SHIFT_MASK, &npages,
-			   &obj->page_shift, &obj->ncont, NULL);
-	if (!npages) {
-		ib_umem_release(obj->umem);
-		return -EINVAL;
-	}
-	page_mask = (1 << obj->page_shift) - 1;
-	obj->page_offset = obj->umem->address & page_mask;
 	return 0;
 }
-static int devx_umem_reg_cmd_alloc(struct uverbs_attr_bundle *attrs,
+static int devx_umem_reg_cmd_alloc(struct mlx5_ib_dev *dev,
+				   struct uverbs_attr_bundle *attrs,
 				   struct devx_umem *obj,
 				   struct devx_umem_reg_cmd *cmd)
 {
+	unsigned int page_size;
+	__be64 *mtt;
+	void *umem;
+	/*
+	 * We don't know what the user intends to use this umem for, but the HW
+	 * restrictions must be met. MR, doorbell records, QP, WQ and CQ all
+	 * have different requirements. Since we have no idea how to sort this
+	 * out, only support PAGE_SIZE with the expectation that userspace will
+	 * provide the necessary alignments inside the known PAGE_SIZE and that
+	 * FW will check everything.
+	 */
+	page_size = ib_umem_find_best_pgoff(
+		obj->umem, PAGE_SIZE,
+		__mlx5_page_offset_to_bitmask(__mlx5_bit_sz(umem, page_offset),
+					      0));
+	if (!page_size)
+		return -EINVAL;
 	cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
-		    (MLX5_ST_SZ_BYTES(mtt) * obj->ncont);
+		     (MLX5_ST_SZ_BYTES(mtt) *
+		      ib_umem_num_dma_blocks(obj->umem, page_size));
 	cmd->in = uverbs_zalloc(attrs, cmd->inlen);
-	return PTR_ERR_OR_ZERO(cmd->in);
+	if (IS_ERR(cmd->in))
-}
+		return PTR_ERR(cmd->in);
-static void devx_umem_reg_cmd_build(struct mlx5_ib_dev *dev,
-				    struct devx_umem *obj,
-				    struct devx_umem_reg_cmd *cmd)
-{
-	void *umem;
-	__be64 *mtt;
 	umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
 	mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
 	MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
-	MLX5_SET64(umem, umem, num_of_mtt, obj->ncont);
+	MLX5_SET64(umem, umem, num_of_mtt,
-	MLX5_SET(umem, umem, log_page_size, obj->page_shift -
+		   ib_umem_num_dma_blocks(obj->umem, page_size));
-					    MLX5_ADAPTER_PAGE_SHIFT);
+	MLX5_SET(umem, umem, log_page_size,
-	MLX5_SET(umem, umem, page_offset, obj->page_offset);
+		 order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
-	mlx5_ib_populate_pas(dev, obj->umem, obj->page_shift, mtt,
+	MLX5_SET(umem, umem, page_offset,
+		 ib_umem_dma_offset(obj->umem, page_size));
+	mlx5_ib_populate_pas(obj->umem, page_size, mtt,
 			     (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
-			     MLX5_IB_MTT_READ);
+				     MLX5_IB_MTT_READ);
+	return 0;
 }
 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
 	if (err)
 		goto err_obj_free;
-	err = devx_umem_reg_cmd_alloc(attrs, obj, &cmd);
+	err = devx_umem_reg_cmd_alloc(dev, attrs, obj, &cmd);
 	if (err)
 		goto err_umem_release;
-	devx_umem_reg_cmd_build(dev, obj, &cmd);
 	MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
 	err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
 			    sizeof(cmd.out));
 	int err;
 	err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
-	if (ib_is_destroy_retryable(err, why, uobject))
+	if (err)
 		return err;
 	ib_umem_release(obj->umem);
 	.llseek	 = no_llseek,
 };
-static int devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
+static void devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
-					     enum rdma_remove_reason why)
+					      enum rdma_remove_reason why)
 {
 	struct devx_async_cmd_event_file *comp_ev_file =
 		container_of(uobj, struct devx_async_cmd_event_file,
 		kvfree(entry);
 	}
 	spin_unlock_irq(&comp_ev_file->ev_queue.lock);
-	return 0;
 };
-static int devx_async_event_destroy_uobj(struct ib_uobject *uobj,
+static void devx_async_event_destroy_uobj(struct ib_uobject *uobj,
-					 enum rdma_remove_reason why)
+					  enum rdma_remove_reason why)
 {
 	struct devx_async_event_file *ev_file =
 		container_of(uobj, struct devx_async_event_file,
 	mutex_unlock(&dev->devx_event_table.event_xa_lock);
 	put_device(&dev->ib_dev.dev);
-	return 0;
 };
 DECLARE_UVERBS_NAMED_METHOD(

drivers/infiniband/hw/mlx5/fs.c+2−4

 				struct uverbs_attr_bundle *attrs)
 {
 	struct mlx5_ib_flow_matcher *obj = uobject->object;
-	int ret;
-	ret = ib_destroy_usecnt(&obj->usecnt, why, uobject);
+	if (atomic_read(&obj->usecnt))
-	if (ret)
+		return -EBUSY;
-		return ret;
 	kfree(obj);
 	return 0;

drivers/infiniband/hw/mlx5/main.c+24−81

  */
 static DEFINE_MUTEX(mlx5_ib_multiport_mutex);
-/* We can't use an array for xlt_emergency_page because dma_map_single
- * doesn't work on kernel modules memory
- */
-static unsigned long xlt_emergency_page;
-static struct mutex xlt_emergency_page_mutex;
 struct mlx5_ib_dev *mlx5_ib_get_ibdev_from_mpi(struct mlx5_ib_multiport_info *mpi)
 {
 	struct mlx5_ib_dev *dev;
 		*active_width = IB_WIDTH_2X;
 		*active_speed = IB_SPEED_HDR;
 		break;
+	case MLX5E_PROT_MASK(MLX5E_100GAUI_1_100GBASE_CR_KR):
+		*active_width = IB_WIDTH_1X;
+		*active_speed = IB_SPEED_NDR;
+		break;
 	case MLX5E_PROT_MASK(MLX5E_200GAUI_4_200GBASE_CR4_KR4):
 		*active_width = IB_WIDTH_4X;
 		*active_speed = IB_SPEED_HDR;
 		break;
+	case MLX5E_PROT_MASK(MLX5E_200GAUI_2_200GBASE_CR2_KR2):
+		*active_width = IB_WIDTH_2X;
+		*active_speed = IB_SPEED_NDR;
+		break;
+	case MLX5E_PROT_MASK(MLX5E_400GAUI_4_400GBASE_CR4_KR4):
+		*active_width = IB_WIDTH_4X;
+		*active_speed = IB_SPEED_NDR;
+		break;
 	default:
 		return -EINVAL;
 	}
 	struct mlx5_ib_dev *dev =
 		rdma_device_to_drv_device(device, struct mlx5_ib_dev, ib_dev);
-	return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages);
+	return sysfs_emit(buf, "%d\n", dev->mdev->priv.fw_pages);
 }
 static DEVICE_ATTR_RO(fw_pages);
 	struct mlx5_ib_dev *dev =
 		rdma_device_to_drv_device(device, struct mlx5_ib_dev, ib_dev);
-	return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages));
+	return sysfs_emit(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages));
 }
 static DEVICE_ATTR_RO(reg_pages);
 	struct mlx5_ib_dev *dev =
 		rdma_device_to_drv_device(device, struct mlx5_ib_dev, ib_dev);
-	return sprintf(buf, "MT%d\n", dev->mdev->pdev->device);
+	return sysfs_emit(buf, "MT%d\n", dev->mdev->pdev->device);
 }
 static DEVICE_ATTR_RO(hca_type);
 	struct mlx5_ib_dev *dev =
 		rdma_device_to_drv_device(device, struct mlx5_ib_dev, ib_dev);
-	return sprintf(buf, "%x\n", dev->mdev->rev_id);
+	return sysfs_emit(buf, "%x\n", dev->mdev->rev_id);
 }
 static DEVICE_ATTR_RO(hw_rev);
 	struct mlx5_ib_dev *dev =
 		rdma_device_to_drv_device(device, struct mlx5_ib_dev, ib_dev);
-	return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
+	return sysfs_emit(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
-		       dev->mdev->board_id);
+			  dev->mdev->board_id);
 }
 static DEVICE_ATTR_RO(board_id);
 	.create_cq = mlx5_ib_create_cq,
 	.create_qp = mlx5_ib_create_qp,
 	.create_srq = mlx5_ib_create_srq,
+	.create_user_ah = mlx5_ib_create_ah,
 	.dealloc_pd = mlx5_ib_dealloc_pd,
 	.dealloc_ucontext = mlx5_ib_dealloc_ucontext,
 	.del_gid = mlx5_ib_del_gid,
 	struct mlx5_core_dev *mdev = dev->mdev;
 	int err;
-	dev->ib_dev.uverbs_cmd_mask	=
-		(1ull << IB_USER_VERBS_CMD_GET_CONTEXT)		|
-		(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE)	|
-		(1ull << IB_USER_VERBS_CMD_QUERY_PORT)		|
-		(1ull << IB_USER_VERBS_CMD_ALLOC_PD)		|
-		(1ull << IB_USER_VERBS_CMD_DEALLOC_PD)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_AH)		|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_AH)		|
-		(1ull << IB_USER_VERBS_CMD_REG_MR)		|
-		(1ull << IB_USER_VERBS_CMD_REREG_MR)		|
-		(1ull << IB_USER_VERBS_CMD_DEREG_MR)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL)	|
-		(1ull << IB_USER_VERBS_CMD_CREATE_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_RESIZE_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_QP)		|
-		(1ull << IB_USER_VERBS_CMD_MODIFY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_QUERY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_ATTACH_MCAST)	|
-		(1ull << IB_USER_VERBS_CMD_DETACH_MCAST)	|
-		(1ull << IB_USER_VERBS_CMD_CREATE_SRQ)		|
-		(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ)		|
-		(1ull << IB_USER_VERBS_CMD_QUERY_SRQ)		|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_XSRQ)		|
-		(1ull << IB_USER_VERBS_CMD_OPEN_QP);
-	dev->ib_dev.uverbs_ex_cmd_mask =
-		(1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE)	|
-		(1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ)	|
-		(1ull << IB_USER_VERBS_EX_CMD_CREATE_QP)	|
-		(1ull << IB_USER_VERBS_EX_CMD_MODIFY_QP)	|
-		(1ull << IB_USER_VERBS_EX_CMD_MODIFY_CQ)	|
-		(1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW)	|
-		(1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
 	if (MLX5_CAP_GEN(mdev, ipoib_enhanced_offloads) &&
 	    IS_ENABLED(CONFIG_MLX5_CORE_IPOIB))
 		ib_set_device_ops(&dev->ib_dev,
 	dev->umr_fence = mlx5_get_umr_fence(MLX5_CAP_GEN(mdev, umr_fence));
-	if (MLX5_CAP_GEN(mdev, imaicl)) {
+	if (MLX5_CAP_GEN(mdev, imaicl))
-		dev->ib_dev.uverbs_cmd_mask |=
-			(1ull << IB_USER_VERBS_CMD_ALLOC_MW)	|
-			(1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
 		ib_set_device_ops(&dev->ib_dev, &mlx5_ib_dev_mw_ops);
-	}
-	if (MLX5_CAP_GEN(mdev, xrc)) {
+	if (MLX5_CAP_GEN(mdev, xrc))
-		dev->ib_dev.uverbs_cmd_mask |=
-			(1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
-			(1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
 		ib_set_device_ops(&dev->ib_dev, &mlx5_ib_dev_xrc_ops);
-	}
 	if (MLX5_CAP_DEV_MEM(mdev, memic) ||
 	    MLX5_CAP_GEN_64(dev->mdev, general_obj_types) &
 	ll = mlx5_port_type_cap_to_rdma_ll(port_type_cap);
 	if (ll == IB_LINK_LAYER_ETHERNET) {
-		dev->ib_dev.uverbs_ex_cmd_mask |=
-			(1ull << IB_USER_VERBS_EX_CMD_CREATE_WQ) |
-			(1ull << IB_USER_VERBS_EX_CMD_MODIFY_WQ) |
-			(1ull << IB_USER_VERBS_EX_CMD_DESTROY_WQ) |
-			(1ull << IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL) |
-			(1ull << IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL);
 		ib_set_device_ops(&dev->ib_dev, &mlx5_ib_dev_common_roce_ops);
 		port_num = mlx5_core_native_port_num(dev->mdev) - 1;
 	.id_table = mlx5r_id_table,
 };
-unsigned long mlx5_ib_get_xlt_emergency_page(void)
-{
-	mutex_lock(&xlt_emergency_page_mutex);
-	return xlt_emergency_page;
-}
-void mlx5_ib_put_xlt_emergency_page(void)
-{
-	mutex_unlock(&xlt_emergency_page_mutex);
-}
 static int __init mlx5_ib_init(void)
 {
 	int ret;
-	xlt_emergency_page = __get_free_page(GFP_KERNEL);
+	xlt_emergency_page = (void *)__get_free_page(GFP_KERNEL);
 	if (!xlt_emergency_page)
 		return -ENOMEM;
-	mutex_init(&xlt_emergency_page_mutex);
 	mlx5_ib_event_wq = alloc_ordered_workqueue("mlx5_ib_event_wq", 0);
 	if (!mlx5_ib_event_wq) {
-		free_page(xlt_emergency_page);
+		free_page((unsigned long)xlt_emergency_page);
 		return -ENOMEM;
 	}
 	mlx5r_rep_cleanup();
 	destroy_workqueue(mlx5_ib_event_wq);
-	mutex_destroy(&xlt_emergency_page_mutex);
+	free_page((unsigned long)xlt_emergency_page);
-	free_page(xlt_emergency_page);
 }
 module_init(mlx5_ib_init);

drivers/infiniband/hw/mlx5/mem.c+48−144

@@ -36,161 +36,65 @@ · 35 unmodified lines
36	#include "mlx5_ib.h"	36	#include "mlx5_ib.h"
37	#include <linux/jiffies.h>	37	#include <linux/jiffies.h>
38		38
39	/* @umem: umem object to scan	39	/*
40	* @addr: ib virtual address requested by the user	40	* Fill in a physical address list. ib_umem_num_dma_blocks() entries will be
41	* @max_page_shift: high limit for page_shift - 0 means no limit	41	* filled in the pas array.
42	* @count: number of PAGE_SIZE pages covered by umem
43	* @shift: page shift for the compound pages found in the region
44	* @ncont: number of compund pages
45	* @order: log2 of the number of compound pages
46	*/	42	*/
47	void mlx5_ib_cont_pages(struct ib_umem *umem, u64 addr,	43	void mlx5_ib_populate_pas(struct ib_umem umem, size_t page_size, __be64 pas,
48	unsigned long max_page_shift,	44	u64 access_flags)
49	int count, int shift,
50	int ncont, int order)
51	{	45	{
52	unsigned long tmp;	46	struct ib_block_iter biter;
53	unsigned long m;
54	u64 base = ~0, p = 0;
55	u64 len, pfn;
56	int i = 0;
57	struct scatterlist *sg;
58	int entry;
59
60	addr = addr >> PAGE_SHIFT;
61	tmp = (unsigned long)addr;
62	m = find_first_bit(&tmp, BITS_PER_LONG);
63	if (max_page_shift)
64	m = min_t(unsigned long, max_page_shift - PAGE_SHIFT, m);
65
66	for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
67	len = sg_dma_len(sg) >> PAGE_SHIFT;
68	pfn = sg_dma_address(sg) >> PAGE_SHIFT;
69	if (base + p != pfn) {
70	/* If either the offset or the new
71	* base are unaligned update m
72	*/
73	tmp = (unsigned long)(pfn \| p);
74	if (!IS_ALIGNED(tmp, 1 << m))
75	m = find_first_bit(&tmp, BITS_PER_LONG);
76
77	base = pfn;
78	p = 0;
79	}
80
81	p += len;
82	i += len;
83	}
84
85	if (i) {
86	m = min_t(unsigned long, ilog2(roundup_pow_of_two(i)), m);
87
88	if (order)
89	*order = ilog2(roundup_pow_of_two(i) >> m);
90
91	*ncont = DIV_ROUND_UP(i, (1 << m));
92	} else {
93	m = 0;
94		47
95	if (order)	48	rdma_umem_for_each_dma_block (umem, &biter, page_size) {
96	*order = 0;	49	*pas = cpu_to_be64(rdma_block_iter_dma_address(&biter) \|
97		50	access_flags);
98	*ncont = 0;	51	pas++;
99	}	52	}
100	*shift = PAGE_SHIFT + m;
101	*count = i;
102	}	53	}
103		54
104	/*	55	/*
105	* Populate the given array with bus addresses from the umem.	56	* Compute the page shift and page_offset for mailboxes that use a quantized
106	*	57	* page_offset. The granulatity of the page offset scales according to page
107	* dev - mlx5_ib device	58	* size.
108	* umem - umem to use to fill the pages
109	* page_shift - determines the page size used in the resulting array
110	* offset - offset into the umem to start from,
111	* only implemented for ODP umems
112	* num_pages - total number of pages to fill
113	* pas - bus addresses array to fill
114	* access_flags - access flags to set on all present pages.
115	use enum mlx5_ib_mtt_access_flags for this.
116	*/	59	*/
117	void __mlx5_ib_populate_pas(struct mlx5_ib_dev dev, struct ib_umem umem,	60	unsigned long __mlx5_umem_find_best_quantized_pgoff(
118	int page_shift, size_t offset, size_t num_pages,	61	struct ib_umem *umem, unsigned long pgsz_bitmap,
119	__be64 *pas, int access_flags)	62	unsigned int page_offset_bits, u64 pgoff_bitmask, unsigned int scale,
		63	unsigned int *page_offset_quantized)
120	{	64	{
121	int shift = page_shift - PAGE_SHIFT;	65	const u64 page_offset_mask = (1UL << page_offset_bits) - 1;
122	int mask = (1 << shift) - 1;	66	unsigned long page_size;
123	int i, k, idx;	67	u64 page_offset;
124	u64 cur = 0;	68
125	u64 base;	69	page_size = ib_umem_find_best_pgoff(umem, pgsz_bitmap, pgoff_bitmask);
126	int len;	70	if (!page_size)
127	struct scatterlist *sg;	71	return 0;
128	int entry;	72
129		73	/*
130	i = 0;	74	* page size is the largest possible page size.
131	for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {	75	*
132	len = sg_dma_len(sg) >> PAGE_SHIFT;	76	* Reduce the page_size, and thus the page_offset and quanta, until the
133	base = sg_dma_address(sg);	77	* page_offset fits into the mailbox field. Once page_size < scale this
134		78	* loop is guaranteed to terminate.
135	/* Skip elements below offset */	79	*/
136	if (i + len < offset << shift) {	80	page_offset = ib_umem_dma_offset(umem, page_size);
137	i += len;	81	while (page_offset & ~(u64)(page_offset_mask * (page_size / scale))) {
138	continue;	82	page_size /= 2;
139	}	83	page_offset = ib_umem_dma_offset(umem, page_size);
140
141	/* Skip pages below offset */
142	if (i < offset << shift) {
143	k = (offset << shift) - i;
144	i = offset << shift;
145	} else {
146	k = 0;
147	}
148
149	for (; k < len; k++) {
150	if (!(i & mask)) {
151	cur = base + (k << PAGE_SHIFT);
152	cur \|= access_flags;
153	idx = (i >> shift) - offset;
154
155	pas[idx] = cpu_to_be64(cur);
156	mlx5_ib_dbg(dev, "pas[%d] 0x%llx\n",
157	i >> shift, be64_to_cpu(pas[idx]));
158	}
159	i++;
160
161	/* Stop after num_pages reached */
162	if (i >> shift >= offset + num_pages)
163	return;
164	}
165	}	84	}
166	}
167		85
168	void mlx5_ib_populate_pas(struct mlx5_ib_dev dev, struct ib_umem umem,	86	/*
169	int page_shift, __be64 *pas, int access_flags)	87	* The address is not aligned, or otherwise cannot be represented by the
170	{	88	* page_offset.
171	return __mlx5_ib_populate_pas(dev, umem, page_shift, 0,	89	*/
172	ib_umem_num_dma_blocks(umem, PAGE_SIZE),	90	if (!(pgsz_bitmap & page_size))
173	pas, access_flags);	91	return 0;
174	}	92
175	int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset)	93	*page_offset_quantized =
176	{	94	(unsigned long)page_offset / (page_size / scale);
177	u64 page_size;	95	if (WARN_ON(*page_offset_quantized > page_offset_mask))
178	u64 page_mask;	96	return 0;
179	u64 off_size;	97	return page_size;
180	u64 off_mask;
181	u64 buf_off;
182
183	page_size = (u64)1 << page_shift;
184	page_mask = page_size - 1;
185	buf_off = addr & page_mask;
186	off_size = page_size >> 6;
187	off_mask = off_size - 1;
188
189	if (buf_off & off_mask)
190	return -EINVAL;
191
192	*offset = buf_off >> ilog2(off_size);
193	return 0;
194	}	98	}
195		99
196	#define WR_ID_BF 0xBF	100	#define WR_ID_BF 0xBF

drivers/infiniband/hw/mlx5/mlx5_ib.h+81−21

 #define MLX5_IB_DEFAULT_UIDX 0xffffff
 #define MLX5_USER_ASSIGNED_UIDX_MASK __mlx5_mask(qpc, user_index)
-#define MLX5_MKEY_PAGE_SHIFT_MASK __mlx5_mask(mkc, log_page_size)
+static __always_inline unsigned long
+__mlx5_log_page_size_to_bitmap(unsigned int log_pgsz_bits,
+			       unsigned int pgsz_shift)
+{
+	unsigned int largest_pg_shift =
+		min_t(unsigned long, (1ULL << log_pgsz_bits) - 1 + pgsz_shift,
+		      BITS_PER_LONG - 1);
+	/*
+	 * Despite a command allowing it, the device does not support lower than
+	 * 4k page size.
+	 */
+	pgsz_shift = max_t(unsigned int, MLX5_ADAPTER_PAGE_SHIFT, pgsz_shift);
+	return GENMASK(largest_pg_shift, pgsz_shift);
+}
+/*
+ * For mkc users, instead of a page_offset the command has a start_iova which
+ * specifies both the page_offset and the on-the-wire IOVA
+ */
+#define mlx5_umem_find_best_pgsz(umem, typ, log_pgsz_fld, pgsz_shift, iova)    \
+	ib_umem_find_best_pgsz(umem,                                           \
+			       __mlx5_log_page_size_to_bitmap(                 \
+				       __mlx5_bit_sz(typ, log_pgsz_fld),       \
+				       pgsz_shift),                            \
+			       iova)
+static __always_inline unsigned long
+__mlx5_page_offset_to_bitmask(unsigned int page_offset_bits,
+			      unsigned int offset_shift)
+{
+	unsigned int largest_offset_shift =
+		min_t(unsigned long, page_offset_bits - 1 + offset_shift,
+		      BITS_PER_LONG - 1);
+	return GENMASK(largest_offset_shift, offset_shift);
+}
+/*
+ * QP/CQ/WQ/etc type commands take a page offset that satisifies:
+ *   page_offset_quantized * (page_size/scale) = page_offset
+ * Which restricts allowed page sizes to ones that satisify the above.
+ */
+unsigned long __mlx5_umem_find_best_quantized_pgoff(
+	struct ib_umem *umem, unsigned long pgsz_bitmap,
+	unsigned int page_offset_bits, u64 pgoff_bitmask, unsigned int scale,
+	unsigned int *page_offset_quantized);
+#define mlx5_umem_find_best_quantized_pgoff(umem, typ, log_pgsz_fld,           \
+					    pgsz_shift, page_offset_fld,       \
+					    scale, page_offset_quantized)      \
+	__mlx5_umem_find_best_quantized_pgoff(                                 \
+		umem,                                                          \
+		__mlx5_log_page_size_to_bitmap(                                \
+			__mlx5_bit_sz(typ, log_pgsz_fld), pgsz_shift),         \
+		__mlx5_bit_sz(typ, page_offset_fld),                           \
+		GENMASK(31, order_base_2(scale)), scale,                       \
+		page_offset_quantized)
+#define mlx5_umem_find_best_cq_quantized_pgoff(umem, typ, log_pgsz_fld,        \
+					       pgsz_shift, page_offset_fld,    \
+					       scale, page_offset_quantized)   \
+	__mlx5_umem_find_best_quantized_pgoff(                                 \
+		umem,                                                          \
+		__mlx5_log_page_size_to_bitmap(                                \
+			__mlx5_bit_sz(typ, log_pgsz_fld), pgsz_shift),         \
+		__mlx5_bit_sz(typ, page_offset_fld), 0, scale,                 \
+		page_offset_quantized)
 enum {
 	MLX5_IB_MMAP_OFFSET_START = 9,
 	int			max_descs;
 	int			desc_size;
 	int			access_mode;
+	unsigned int		page_shift;
 	struct mlx5_core_mkey	mmkey;
 	struct ib_umem	       *umem;
 	struct mlx5_shared_mr_info	*smr_info;
 	struct list_head	list;
-	unsigned int		order;
 	struct mlx5_cache_ent  *cache_ent;
-	int			npages;
-	struct mlx5_ib_dev     *dev;
 	u32 out[MLX5_ST_SZ_DW(create_mkey_out)];
 	struct mlx5_core_sig_ctx    *sig;
 	void			*descs_alloc;
 	return container_of(ibdev, struct mlx5_ib_dev, ib_dev);
 }
+static inline struct mlx5_ib_dev *mr_to_mdev(struct mlx5_ib_mr *mr)
+{
+	return to_mdev(mr->ibmr.device);
+}
 static inline struct mlx5_ib_dev *mlx5_udata_to_mdev(struct ib_udata *udata)
 {
 	struct mlx5_ib_ucontext *context = rdma_udata_to_drv_context(
 					     int access_flags);
 void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *mr);
 void mlx5_ib_fence_odp_mr(struct mlx5_ib_mr *mr);
-int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start,
+struct ib_mr *mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start,
-			  u64 length, u64 virt_addr, int access_flags,
+				    u64 length, u64 virt_addr, int access_flags,
-			  struct ib_pd *pd, struct ib_udata *udata);
+				    struct ib_pd *pd, struct ib_udata *udata);
 int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata);
 struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
 			       u32 max_num_sg);
 			size_t *out_mad_size, u16 *out_mad_pkey_index);
 int mlx5_ib_alloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata);
 int mlx5_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata);
-int mlx5_ib_get_buf_offset(u64 addr, int page_shift, u32 *offset);
 int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port);
 int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
 					  struct ib_smp *out_mad);
 			    struct ib_port_attr *props);
 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port,
 		       struct ib_port_attr *props);
-void mlx5_ib_cont_pages(struct ib_umem *umem, u64 addr,
+void mlx5_ib_populate_pas(struct ib_umem *umem, size_t page_size, __be64 *pas,
-			unsigned long max_page_shift,
+			  u64 access_flags);
-			int *count, int *shift,
-			int *ncont, int *order);
-void __mlx5_ib_populate_pas(struct mlx5_ib_dev *dev, struct ib_umem *umem,
-			    int page_shift, size_t offset, size_t num_pages,
-			    __be64 *pas, int access_flags);
-void mlx5_ib_populate_pas(struct mlx5_ib_dev *dev, struct ib_umem *umem,
-			  int page_shift, __be64 *pas, int access_flags);
 void mlx5_ib_copy_pas(u64 *old, u64 *new, int step, int num);
 int mlx5_ib_get_cqe_size(struct ib_cq *ibcq);
 int mlx5_mr_cache_init(struct mlx5_ib_dev *dev);
 int mlx5_ib_advise_mr_prefetch(struct ib_pd *pd,
 			       enum ib_uverbs_advise_mr_advice advice,
 			       u32 flags, struct ib_sge *sg_list, u32 num_sge);
-int mlx5_ib_init_odp_mr(struct mlx5_ib_mr *mr, bool enable);
+int mlx5_ib_init_odp_mr(struct mlx5_ib_mr *mr);
 #else /* CONFIG_INFINIBAND_ON_DEMAND_PAGING */
 static inline void mlx5_ib_internal_fill_odp_caps(struct mlx5_ib_dev *dev)
 {
 {
 	return -EOPNOTSUPP;
 }
-static inline int mlx5_ib_init_odp_mr(struct mlx5_ib_mr *mr, bool enable)
+static inline int mlx5_ib_init_odp_mr(struct mlx5_ib_mr *mr)
 {
 	return -EOPNOTSUPP;
 }
 	return get_uars_per_sys_page(dev, bfregi->lib_uar_4k) * bfregi->num_static_sys_pages;
 }
-unsigned long mlx5_ib_get_xlt_emergency_page(void);
+extern void *xlt_emergency_page;
-void mlx5_ib_put_xlt_emergency_page(void);
 int bfregn_to_uar_index(struct mlx5_ib_dev *dev,
 			struct mlx5_bfreg_info *bfregi, u32 bfregn,

drivers/infiniband/hw/mlx5/mr.c+571−389

@@ -41,6 +41,13 @@ · 40 unmodified lines
41	#include <rdma/ib_verbs.h>	41	#include <rdma/ib_verbs.h>
42	#include "mlx5_ib.h"	42	#include "mlx5_ib.h"
43		43
		44	/*
		45	* We can't use an array for xlt_emergency_page because dma_map_single doesn't
		46	* work on kernel modules memory
		47	*/
		48	void *xlt_emergency_page;
		49	static DEFINE_MUTEX(xlt_emergency_page_mutex);
		50
44	enum {	51	enum {
45	MAX_PENDING_REG_MR = 8,	52	MAX_PENDING_REG_MR = 8,
46	};	53	};
@@ -49,6 +56,9 @@ enum { · 2 unmodified lines
49		56
50	static void	57	static void
51	create_mkey_callback(int status, struct mlx5_async_work *context);	58	create_mkey_callback(int status, struct mlx5_async_work *context);
		59	static struct mlx5_ib_mr reg_create(struct ib_pd pd, struct ib_umem *umem,
		60	u64 iova, int access_flags,
		61	unsigned int page_size, bool populate);
52		62
53	static void set_mkc_access_pd_addr_fields(void *mkc, int acc, u64 start_addr,	63	static void set_mkc_access_pd_addr_fields(void *mkc, int acc, u64 start_addr,
54	struct ib_pd *pd)	64	struct ib_pd *pd)
@@ -123,19 +133,12 @@ static int destroy_mkey(struct mlx5_ib_dev dev, struct mlx5_ib_mr mr) · 68 unmodified lines
123	return mlx5_core_destroy_mkey(dev->mdev, &mr->mmkey);	133	return mlx5_core_destroy_mkey(dev->mdev, &mr->mmkey);
124	}	134	}
125		135
126	static inline bool mlx5_ib_pas_fits_in_mr(struct mlx5_ib_mr *mr, u64 start,
127	u64 length)
128	{
129	return ((u64)1 << mr->order) * MLX5_ADAPTER_PAGE_SIZE >=
130	length + (start & (MLX5_ADAPTER_PAGE_SIZE - 1));
131	}
132
133	static void create_mkey_callback(int status, struct mlx5_async_work *context)	136	static void create_mkey_callback(int status, struct mlx5_async_work *context)
134	{	137	{
135	struct mlx5_ib_mr *mr =	138	struct mlx5_ib_mr *mr =
136	container_of(context, struct mlx5_ib_mr, cb_work);	139	container_of(context, struct mlx5_ib_mr, cb_work);
137	struct mlx5_ib_dev *dev = mr->dev;
138	struct mlx5_cache_ent *ent = mr->cache_ent;	140	struct mlx5_cache_ent *ent = mr->cache_ent;
		141	struct mlx5_ib_dev *dev = ent->dev;
139	unsigned long flags;	142	unsigned long flags;
140		143
141	if (status) {	144	if (status) {
@@ -172,9 +175,7 @@ static struct mlx5_ib_mr alloc_cache_mr(struct mlx5_cache_ent ent, void *mkc) · 30 unmodified lines
172	mr = kzalloc(sizeof(*mr), GFP_KERNEL);	175	mr = kzalloc(sizeof(*mr), GFP_KERNEL);
173	if (!mr)	176	if (!mr)
174	return NULL;	177	return NULL;
175	mr->order = ent->order;
176	mr->cache_ent = ent;	178	mr->cache_ent = ent;
177	mr->dev = ent->dev;
178		179
179	set_mkc_access_pd_addr_fields(mkc, 0, 0, ent->dev->umrc.pd);	180	set_mkc_access_pd_addr_fields(mkc, 0, 0, ent->dev->umrc.pd);
180	MLX5_SET(mkc, mkc, free, 1);	181	MLX5_SET(mkc, mkc, free, 1);
@@ -642,6 +643,7 @@ void mlx5_mr_cache_free(struct mlx5_ib_dev dev, struct mlx5_ib_mr mr) · 461 unmodified lines
642	if (mlx5_mr_cache_invalidate(mr)) {	643	if (mlx5_mr_cache_invalidate(mr)) {
643	detach_mr_from_cache(mr);	644	detach_mr_from_cache(mr);
644	destroy_mkey(dev, mr);	645	destroy_mkey(dev, mr);
		646	kfree(mr);
645	return;	647	return;
646	}	648	}
647		649
@@ -867,57 +869,6 @@ static int mr_cache_max_order(struct mlx5_ib_dev *dev) · 219 unmodified lines
867	return MLX5_MAX_UMR_SHIFT;	869	return MLX5_MAX_UMR_SHIFT;
868	}	870	}
869		871
870	static int mr_umem_get(struct mlx5_ib_dev *dev, u64 start, u64 length,
871	int access_flags, struct ib_umem *umem, int npages,
872	int page_shift, int ncont, int *order)
873	{
874	struct ib_umem *u;
875
876	*umem = NULL;
877
878	if (access_flags & IB_ACCESS_ON_DEMAND) {
879	struct ib_umem_odp *odp;
880
881	odp = ib_umem_odp_get(&dev->ib_dev, start, length, access_flags,
882	&mlx5_mn_ops);
883	if (IS_ERR(odp)) {
884	mlx5_ib_dbg(dev, "umem get failed (%ld)\n",
885	PTR_ERR(odp));
886	return PTR_ERR(odp);
887	}
888
889	u = &odp->umem;
890
891	*page_shift = odp->page_shift;
892	*ncont = ib_umem_odp_num_pages(odp);
893	npages = ncont << (*page_shift - PAGE_SHIFT);
894	if (order)
895	order = ilog2(roundup_pow_of_two(ncont));
896	} else {
897	u = ib_umem_get(&dev->ib_dev, start, length, access_flags);
898	if (IS_ERR(u)) {
899	mlx5_ib_dbg(dev, "umem get failed (%ld)\n", PTR_ERR(u));
900	return PTR_ERR(u);
901	}
902
903	mlx5_ib_cont_pages(u, start, MLX5_MKEY_PAGE_SHIFT_MASK, npages,
904	page_shift, ncont, order);
905	}
906
907	if (!*npages) {
908	mlx5_ib_warn(dev, "avoid zero region\n");
909	ib_umem_release(u);
910	return -EINVAL;
911	}
912
913	*umem = u;
914
915	mlx5_ib_dbg(dev, "npages %d, ncont %d, order %d, page_shift %d\n",
916	npages, ncont, order, page_shift);
917
918	return 0;
919	}
920
921	static void mlx5_ib_umr_done(struct ib_cq cq, struct ib_wc wc)	872	static void mlx5_ib_umr_done(struct ib_cq cq, struct ib_wc wc)
922	{	873	{
923	struct mlx5_ib_umr_context *context =	874	struct mlx5_ib_umr_context *context =
@@ -974,25 +925,49 @@ static struct mlx5_cache_ent mr_cache_ent_from_order(struct mlx5_ib_dev dev, · 50 unmodified lines
974	return &cache->ent[order];	925	return &cache->ent[order];
975	}	926	}
976		927
977	static struct mlx5_ib_mr *	928	static void set_mr_fields(struct mlx5_ib_dev dev, struct mlx5_ib_mr mr,
978	alloc_mr_from_cache(struct ib_pd pd, struct ib_umem umem, u64 virt_addr,	929	u64 length, int access_flags)
979	u64 len, int npages, int page_shift, unsigned int order,	930	{
980	int access_flags)	931	mr->ibmr.lkey = mr->mmkey.key;
		932	mr->ibmr.rkey = mr->mmkey.key;
		933	mr->ibmr.length = length;
		934	mr->ibmr.device = &dev->ib_dev;
		935	mr->access_flags = access_flags;
		936	}
		937
		938	static struct mlx5_ib_mr alloc_cacheable_mr(struct ib_pd pd,
		939	struct ib_umem *umem, u64 iova,
		940	int access_flags)
981	{	941	{
982	struct mlx5_ib_dev *dev = to_mdev(pd->device);	942	struct mlx5_ib_dev *dev = to_mdev(pd->device);
983	struct mlx5_cache_ent *ent = mr_cache_ent_from_order(dev, order);	943	struct mlx5_cache_ent *ent;
984	struct mlx5_ib_mr *mr;	944	struct mlx5_ib_mr *mr;
		945	unsigned int page_size;
985		946
986	if (!ent)	947	page_size = mlx5_umem_find_best_pgsz(umem, mkc, log_page_size, 0, iova);
987	return ERR_PTR(-E2BIG);	948	if (WARN_ON(!page_size))
988		949	return ERR_PTR(-EINVAL);
989	/* Matches access in alloc_cache_mr() */	950	ent = mr_cache_ent_from_order(
990	if (!mlx5_ib_can_reconfig_with_umr(dev, 0, access_flags))	951	dev, order_base_2(ib_umem_num_dma_blocks(umem, page_size)));
991	return ERR_PTR(-EOPNOTSUPP);	952	/*
		953	* Matches access in alloc_cache_mr(). If the MR can't come from the
		954	* cache then synchronously create an uncached one.
		955	*/
		956	if (!ent \|\| ent->limit == 0 \|\|
		957	!mlx5_ib_can_reconfig_with_umr(dev, 0, access_flags)) {
		958	mutex_lock(&dev->slow_path_mutex);
		959	mr = reg_create(pd, umem, iova, access_flags, page_size, false);
		960	mutex_unlock(&dev->slow_path_mutex);
		961	return mr;
		962	}
992		963
993	mr = get_cache_mr(ent);	964	mr = get_cache_mr(ent);
994	if (!mr) {	965	if (!mr) {
995	mr = create_cache_mr(ent);	966	mr = create_cache_mr(ent);
		967	/*
		968	* The above already tried to do the same stuff as reg_create(),
		969	* no reason to try it again.
		970	*/
996	if (IS_ERR(mr))	971	if (IS_ERR(mr))
997	return mr;	972	return mr;
998	}	973	}
@@ -1001,9 +976,12 @@ alloc_mr_from_cache(struct ib_pd pd, struct ib_umem umem, u64 virt_addr, · 2 unmodified lines
1001	mr->umem = umem;	976	mr->umem = umem;
1002	mr->access_flags = access_flags;	977	mr->access_flags = access_flags;
1003	mr->desc_size = sizeof(struct mlx5_mtt);	978	mr->desc_size = sizeof(struct mlx5_mtt);
1004	mr->mmkey.iova = virt_addr;	979	mr->mmkey.iova = iova;
1005	mr->mmkey.size = len;	980	mr->mmkey.size = umem->length;
1006	mr->mmkey.pd = to_mpd(pd)->pdn;	981	mr->mmkey.pd = to_mpd(pd)->pdn;
		982	mr->page_shift = order_base_2(page_size);
		983	mr->umem = umem;
		984	set_mr_fields(dev, mr, umem->length, access_flags);
1007		985
1008	return mr;	986	return mr;
1009	}	987	}
@@ -1012,14 +990,144 @@ alloc_mr_from_cache(struct ib_pd pd, struct ib_umem umem, u64 virt_addr, · 2 unmodified lines
1012	MLX5_UMR_MTT_ALIGNMENT)	990	MLX5_UMR_MTT_ALIGNMENT)
1013	#define MLX5_SPARE_UMR_CHUNK 0x10000	991	#define MLX5_SPARE_UMR_CHUNK 0x10000
1014		992
		993	/*
		994	* Allocate a temporary buffer to hold the per-page information to transfer to
		995	* HW. For efficiency this should be as large as it can be, but buffer
		996	* allocation failure is not allowed, so try smaller sizes.
		997	*/
		998	static void mlx5_ib_alloc_xlt(size_t nents, size_t ent_size, gfp_t gfp_mask)
		999	{
		1000	const size_t xlt_chunk_align =
		1001	MLX5_UMR_MTT_ALIGNMENT / sizeof(ent_size);
		1002	size_t size;
		1003	void *res = NULL;
		1004
		1005	static_assert(PAGE_SIZE % MLX5_UMR_MTT_ALIGNMENT == 0);
		1006
		1007	/*
		1008	* MLX5_IB_UPD_XLT_ATOMIC doesn't signal an atomic context just that the
		1009	* allocation can't trigger any kind of reclaim.
		1010	*/
		1011	might_sleep();
		1012
		1013	gfp_mask \|= __GFP_ZERO;
		1014
		1015	/*
		1016	* If the system already has a suitable high order page then just use
		1017	* that, but don't try hard to create one. This max is about 1M, so a
		1018	* free x86 huge page will satisfy it.
		1019	*/
		1020	size = min_t(size_t, ent_size * ALIGN(*nents, xlt_chunk_align),
		1021	MLX5_MAX_UMR_CHUNK);
		1022	*nents = size / ent_size;
		1023	res = (void *)__get_free_pages(gfp_mask \| __GFP_NOWARN,
		1024	get_order(size));
		1025	if (res)
		1026	return res;
		1027
		1028	if (size > MLX5_SPARE_UMR_CHUNK) {
		1029	size = MLX5_SPARE_UMR_CHUNK;
		1030	*nents = get_order(size) / ent_size;
		1031	res = (void *)__get_free_pages(gfp_mask \| __GFP_NOWARN,
		1032	get_order(size));
		1033	if (res)
		1034	return res;
		1035	}
		1036
		1037	*nents = PAGE_SIZE / ent_size;
		1038	res = (void *)__get_free_page(gfp_mask);
		1039	if (res)
		1040	return res;
		1041
		1042	mutex_lock(&xlt_emergency_page_mutex);
		1043	memset(xlt_emergency_page, 0, PAGE_SIZE);
		1044	return xlt_emergency_page;
		1045	}
		1046
		1047	static void mlx5_ib_free_xlt(void *xlt, size_t length)
		1048	{
		1049	if (xlt == xlt_emergency_page) {
		1050	mutex_unlock(&xlt_emergency_page_mutex);
		1051	return;
		1052	}
		1053
		1054	free_pages((unsigned long)xlt, get_order(length));
		1055	}
		1056
		1057	/*
		1058	* Create a MLX5_IB_SEND_UMR_UPDATE_XLT work request and XLT buffer ready for
		1059	* submission.
		1060	*/
		1061	static void mlx5_ib_create_xlt_wr(struct mlx5_ib_mr mr,
		1062	struct mlx5_umr_wr wr, struct ib_sge sg,
		1063	size_t nents, size_t ent_size,
		1064	unsigned int flags)
		1065	{
		1066	struct mlx5_ib_dev *dev = mr_to_mdev(mr);
		1067	struct device *ddev = &dev->mdev->pdev->dev;
		1068	dma_addr_t dma;
		1069	void *xlt;
		1070
		1071	xlt = mlx5_ib_alloc_xlt(&nents, ent_size,
		1072	flags & MLX5_IB_UPD_XLT_ATOMIC ? GFP_ATOMIC :
		1073	GFP_KERNEL);
		1074	sg->length = nents * ent_size;
		1075	dma = dma_map_single(ddev, xlt, sg->length, DMA_TO_DEVICE);
		1076	if (dma_mapping_error(ddev, dma)) {
		1077	mlx5_ib_err(dev, "unable to map DMA during XLT update.\n");
		1078	mlx5_ib_free_xlt(xlt, sg->length);
		1079	return NULL;
		1080	}
		1081	sg->addr = dma;
		1082	sg->lkey = dev->umrc.pd->local_dma_lkey;
		1083
		1084	memset(wr, 0, sizeof(*wr));
		1085	wr->wr.send_flags = MLX5_IB_SEND_UMR_UPDATE_XLT;
		1086	if (!(flags & MLX5_IB_UPD_XLT_ENABLE))
		1087	wr->wr.send_flags \|= MLX5_IB_SEND_UMR_FAIL_IF_FREE;
		1088	wr->wr.sg_list = sg;
		1089	wr->wr.num_sge = 1;
		1090	wr->wr.opcode = MLX5_IB_WR_UMR;
		1091	wr->pd = mr->ibmr.pd;
		1092	wr->mkey = mr->mmkey.key;
		1093	wr->length = mr->mmkey.size;
		1094	wr->virt_addr = mr->mmkey.iova;
		1095	wr->access_flags = mr->access_flags;
		1096	wr->page_shift = mr->page_shift;
		1097	wr->xlt_size = sg->length;
		1098	return xlt;
		1099	}
		1100
		1101	static void mlx5_ib_unmap_free_xlt(struct mlx5_ib_dev dev, void xlt,
		1102	struct ib_sge *sg)
		1103	{
		1104	struct device *ddev = &dev->mdev->pdev->dev;
		1105
		1106	dma_unmap_single(ddev, sg->addr, sg->length, DMA_TO_DEVICE);
		1107	mlx5_ib_free_xlt(xlt, sg->length);
		1108	}
		1109
		1110	static unsigned int xlt_wr_final_send_flags(unsigned int flags)
		1111	{
		1112	unsigned int res = 0;
		1113
		1114	if (flags & MLX5_IB_UPD_XLT_ENABLE)
		1115	res \|= MLX5_IB_SEND_UMR_ENABLE_MR \|
		1116	MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS \|
		1117	MLX5_IB_SEND_UMR_UPDATE_TRANSLATION;
		1118	if (flags & MLX5_IB_UPD_XLT_PD \|\| flags & MLX5_IB_UPD_XLT_ACCESS)
		1119	res \|= MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
		1120	if (flags & MLX5_IB_UPD_XLT_ADDR)
		1121	res \|= MLX5_IB_SEND_UMR_UPDATE_TRANSLATION;
		1122	return res;
		1123	}
		1124
1015	int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,	1125	int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,
1016	int page_shift, int flags)	1126	int page_shift, int flags)
1017	{	1127	{
1018	struct mlx5_ib_dev *dev = mr->dev;	1128	struct mlx5_ib_dev *dev = mr_to_mdev(mr);
1019	struct device *ddev = dev->ib_dev.dev.parent;	1129	struct device *ddev = &dev->mdev->pdev->dev;
1020	int size;
1021	void *xlt;	1130	void *xlt;
1022	dma_addr_t dma;
1023	struct mlx5_umr_wr wr;	1131	struct mlx5_umr_wr wr;
1024	struct ib_sge sg;	1132	struct ib_sge sg;
1025	int err = 0;	1133	int err = 0;
@@ -1030,15 +1138,17 @@ int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages, · 4 unmodified lines
1030	const int page_mask = page_align - 1;	1138	const int page_mask = page_align - 1;
1031	size_t pages_mapped = 0;	1139	size_t pages_mapped = 0;
1032	size_t pages_to_map = 0;	1140	size_t pages_to_map = 0;
1033	size_t pages_iter = 0;	1141	size_t pages_iter;
1034	size_t size_to_map = 0;	1142	size_t size_to_map = 0;
1035	gfp_t gfp;	1143	size_t orig_sg_length;
1036	bool use_emergency_page = false;
1037		1144
1038	if ((flags & MLX5_IB_UPD_XLT_INDIRECT) &&	1145	if ((flags & MLX5_IB_UPD_XLT_INDIRECT) &&
1039	!umr_can_use_indirect_mkey(dev))	1146	!umr_can_use_indirect_mkey(dev))
1040	return -EPERM;	1147	return -EPERM;
1041		1148
		1149	if (WARN_ON(!mr->umem->is_odp))
		1150	return -EINVAL;
		1151
1042	/* UMR copies MTTs in units of MLX5_UMR_MTT_ALIGNMENT bytes,	1152	/* UMR copies MTTs in units of MLX5_UMR_MTT_ALIGNMENT bytes,
1043	* so we need to align the offset and length accordingly	1153	* so we need to align the offset and length accordingly
1044	*/	1154	*/
@@ -1046,63 +1156,21 @@ int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages, · 1 unmodified line
1046	npages += idx & page_mask;	1156	npages += idx & page_mask;
1047	idx &= ~page_mask;	1157	idx &= ~page_mask;
1048	}	1158	}
1049
1050	gfp = flags & MLX5_IB_UPD_XLT_ATOMIC ? GFP_ATOMIC : GFP_KERNEL;
1051	gfp \|= __GFP_ZERO \| __GFP_NOWARN;
1052
1053	pages_to_map = ALIGN(npages, page_align);	1159	pages_to_map = ALIGN(npages, page_align);
1054	size = desc_size * pages_to_map;
1055	size = min_t(int, size, MLX5_MAX_UMR_CHUNK);
1056
1057	xlt = (void *)__get_free_pages(gfp, get_order(size));
1058	if (!xlt && size > MLX5_SPARE_UMR_CHUNK) {
1059	mlx5_ib_dbg(dev, "Failed to allocate %d bytes of order %d. fallback to spare UMR allocation od %d bytes\n",
1060	size, get_order(size), MLX5_SPARE_UMR_CHUNK);
1061
1062	size = MLX5_SPARE_UMR_CHUNK;
1063	xlt = (void *)__get_free_pages(gfp, get_order(size));
1064	}
1065		1160
1066	if (!xlt) {	1161	xlt = mlx5_ib_create_xlt_wr(mr, &wr, &sg, npages, desc_size, flags);
1067	mlx5_ib_warn(dev, "Using XLT emergency buffer\n");	1162	if (!xlt)
1068	xlt = (void *)mlx5_ib_get_xlt_emergency_page();	1163	return -ENOMEM;
1069	size = PAGE_SIZE;	1164	pages_iter = sg.length / desc_size;
1070	memset(xlt, 0, size);	1165	orig_sg_length = sg.length;
1071	use_emergency_page = true;
1072	}
1073	pages_iter = size / desc_size;
1074	dma = dma_map_single(ddev, xlt, size, DMA_TO_DEVICE);
1075	if (dma_mapping_error(ddev, dma)) {
1076	mlx5_ib_err(dev, "unable to map DMA during XLT update.\n");
1077	err = -ENOMEM;
1078	goto free_xlt;
1079	}
1080		1166
1081	if (mr->umem->is_odp) {	1167	if (!(flags & MLX5_IB_UPD_XLT_INDIRECT)) {
1082	if (!(flags & MLX5_IB_UPD_XLT_INDIRECT)) {	1168	struct ib_umem_odp *odp = to_ib_umem_odp(mr->umem);
1083	struct ib_umem_odp *odp = to_ib_umem_odp(mr->umem);	1169	size_t max_pages = ib_umem_odp_num_pages(odp) - idx;
1084	size_t max_pages = ib_umem_odp_num_pages(odp) - idx;
1085		1170
1086	pages_to_map = min_t(size_t, pages_to_map, max_pages);	1171	pages_to_map = min_t(size_t, pages_to_map, max_pages);
1087	}
1088	}	1172	}
1089		1173
1090	sg.addr = dma;
1091	sg.lkey = dev->umrc.pd->local_dma_lkey;
1092
1093	memset(&wr, 0, sizeof(wr));
1094	wr.wr.send_flags = MLX5_IB_SEND_UMR_UPDATE_XLT;
1095	if (!(flags & MLX5_IB_UPD_XLT_ENABLE))
1096	wr.wr.send_flags \|= MLX5_IB_SEND_UMR_FAIL_IF_FREE;
1097	wr.wr.sg_list = &sg;
1098	wr.wr.num_sge = 1;
1099	wr.wr.opcode = MLX5_IB_WR_UMR;
1100
1101	wr.pd = mr->ibmr.pd;
1102	wr.mkey = mr->mmkey.key;
1103	wr.length = mr->mmkey.size;
1104	wr.virt_addr = mr->mmkey.iova;
1105	wr.access_flags = mr->access_flags;
1106	wr.page_shift = page_shift;	1174	wr.page_shift = page_shift;
1107		1175
1108	for (pages_mapped = 0;	1176	for (pages_mapped = 0;
@@ -1110,50 +1178,87 @@ int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages, · 1 unmodified line
1110	pages_mapped += pages_iter, idx += pages_iter) {	1178	pages_mapped += pages_iter, idx += pages_iter) {
1111	npages = min_t(int, pages_iter, pages_to_map - pages_mapped);	1179	npages = min_t(int, pages_iter, pages_to_map - pages_mapped);
1112	size_to_map = npages * desc_size;	1180	size_to_map = npages * desc_size;
1113	dma_sync_single_for_cpu(ddev, dma, size, DMA_TO_DEVICE);	1181	dma_sync_single_for_cpu(ddev, sg.addr, sg.length,
1114	if (mr->umem->is_odp) {	1182	DMA_TO_DEVICE);
1115	mlx5_odp_populate_xlt(xlt, idx, npages, mr, flags);	1183	mlx5_odp_populate_xlt(xlt, idx, npages, mr, flags);
1116	} else {	1184	dma_sync_single_for_device(ddev, sg.addr, sg.length,
1117	__mlx5_ib_populate_pas(dev, mr->umem, page_shift, idx,	1185	DMA_TO_DEVICE);
1118	npages, xlt,
1119	MLX5_IB_MTT_PRESENT);
1120	/* Clear padding after the pages
1121	* brought from the umem.
1122	*/
1123	memset(xlt + size_to_map, 0, size - size_to_map);
1124	}
1125	dma_sync_single_for_device(ddev, dma, size, DMA_TO_DEVICE);
1126		1186
1127	sg.length = ALIGN(size_to_map, MLX5_UMR_MTT_ALIGNMENT);	1187	sg.length = ALIGN(size_to_map, MLX5_UMR_MTT_ALIGNMENT);
1128		1188
1129	if (pages_mapped + pages_iter >= pages_to_map) {	1189	if (pages_mapped + pages_iter >= pages_to_map)
1130	if (flags & MLX5_IB_UPD_XLT_ENABLE)	1190	wr.wr.send_flags \|= xlt_wr_final_send_flags(flags);
1131	wr.wr.send_flags \|=
1132	MLX5_IB_SEND_UMR_ENABLE_MR \|
1133	MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS \|
1134	MLX5_IB_SEND_UMR_UPDATE_TRANSLATION;
1135	if (flags & MLX5_IB_UPD_XLT_PD \|\|
1136	flags & MLX5_IB_UPD_XLT_ACCESS)
1137	wr.wr.send_flags \|=
1138	MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
1139	if (flags & MLX5_IB_UPD_XLT_ADDR)
1140	wr.wr.send_flags \|=
1141	MLX5_IB_SEND_UMR_UPDATE_TRANSLATION;
1142	}
1143		1191
1144	wr.offset = idx * desc_size;	1192	wr.offset = idx * desc_size;
1145	wr.xlt_size = sg.length;	1193	wr.xlt_size = sg.length;
1146		1194
1147	err = mlx5_ib_post_send_wait(dev, &wr);	1195	err = mlx5_ib_post_send_wait(dev, &wr);
1148	}	1196	}
1149	dma_unmap_single(ddev, dma, size, DMA_TO_DEVICE);	1197	sg.length = orig_sg_length;
		1198	mlx5_ib_unmap_free_xlt(dev, xlt, &sg);
		1199	return err;
		1200	}
		1201
		1202	/*
		1203	* Send the DMA list to the HW for a normal MR using UMR.
		1204	*/
		1205	static int mlx5_ib_update_mr_pas(struct mlx5_ib_mr *mr, unsigned int flags)
		1206	{
		1207	struct mlx5_ib_dev *dev = mr_to_mdev(mr);
		1208	struct device *ddev = &dev->mdev->pdev->dev;
		1209	struct ib_block_iter biter;
		1210	struct mlx5_mtt *cur_mtt;
		1211	struct mlx5_umr_wr wr;
		1212	size_t orig_sg_length;
		1213	struct mlx5_mtt *mtt;
		1214	size_t final_size;
		1215	struct ib_sge sg;
		1216	int err = 0;
		1217
		1218	if (WARN_ON(mr->umem->is_odp))
		1219	return -EINVAL;
		1220
		1221	mtt = mlx5_ib_create_xlt_wr(mr, &wr, &sg,
		1222	ib_umem_num_dma_blocks(mr->umem,
		1223	1 << mr->page_shift),
		1224	sizeof(*mtt), flags);
		1225	if (!mtt)
		1226	return -ENOMEM;
		1227	orig_sg_length = sg.length;
		1228
		1229	cur_mtt = mtt;
		1230	rdma_for_each_block (mr->umem->sg_head.sgl, &biter, mr->umem->nmap,
		1231	BIT(mr->page_shift)) {
		1232	if (cur_mtt == (void *)mtt + sg.length) {
		1233	dma_sync_single_for_device(ddev, sg.addr, sg.length,
		1234	DMA_TO_DEVICE);
		1235	err = mlx5_ib_post_send_wait(dev, &wr);
		1236	if (err)
		1237	goto err;
		1238	dma_sync_single_for_cpu(ddev, sg.addr, sg.length,
		1239	DMA_TO_DEVICE);
		1240	wr.offset += sg.length;
		1241	cur_mtt = mtt;
		1242	}
		1243
		1244	cur_mtt->ptag =
		1245	cpu_to_be64(rdma_block_iter_dma_address(&biter) \|
		1246	MLX5_IB_MTT_PRESENT);
		1247	cur_mtt++;
		1248	}
1150		1249
1151	free_xlt:	1250	final_size = (void )cur_mtt - (void )mtt;
1152	if (use_emergency_page)	1251	sg.length = ALIGN(final_size, MLX5_UMR_MTT_ALIGNMENT);
1153	mlx5_ib_put_xlt_emergency_page();	1252	memset(cur_mtt, 0, sg.length - final_size);
1154	else	1253	wr.wr.send_flags \|= xlt_wr_final_send_flags(flags);
1155	free_pages((unsigned long)xlt, get_order(size));	1254	wr.xlt_size = sg.length;
1156		1255
		1256	dma_sync_single_for_device(ddev, sg.addr, sg.length, DMA_TO_DEVICE);
		1257	err = mlx5_ib_post_send_wait(dev, &wr);
		1258
		1259	err:
		1260	sg.length = orig_sg_length;
		1261	mlx5_ib_unmap_free_xlt(dev, mtt, &sg);
1157	return err;	1262	return err;
1158	}	1263	}
1159		1264
@@ -1161,11 +1266,9 @@ free_xlt: · 1 unmodified line
1161	* If ibmr is NULL it will be allocated by reg_create.	1266	* If ibmr is NULL it will be allocated by reg_create.
1162	* Else, the given ibmr will be used.	1267	* Else, the given ibmr will be used.
1163	*/	1268	*/
1164	static struct mlx5_ib_mr reg_create(struct ib_mr ibmr, struct ib_pd *pd,	1269	static struct mlx5_ib_mr reg_create(struct ib_pd pd, struct ib_umem *umem,
1165	u64 virt_addr, u64 length,	1270	u64 iova, int access_flags,
1166	struct ib_umem *umem, int npages,	1271	unsigned int page_size, bool populate)
1167	int page_shift, int access_flags,
1168	bool populate)
1169	{	1272	{
1170	struct mlx5_ib_dev *dev = to_mdev(pd->device);	1273	struct mlx5_ib_dev *dev = to_mdev(pd->device);
1171	struct mlx5_ib_mr *mr;	1274	struct mlx5_ib_mr *mr;
@@ -1176,16 +1279,20 @@ static struct mlx5_ib_mr reg_create(struct ib_mr ibmr, struct ib_pd *pd, · 4 unmodified lines
1176	int err;	1279	int err;
1177	bool pg_cap = !!(MLX5_CAP_GEN(dev->mdev, pg));	1280	bool pg_cap = !!(MLX5_CAP_GEN(dev->mdev, pg));
1178		1281
1179	mr = ibmr ? to_mmr(ibmr) : kzalloc(sizeof(*mr), GFP_KERNEL);	1282	if (!page_size)
		1283	return ERR_PTR(-EINVAL);
		1284	mr = kzalloc(sizeof(*mr), GFP_KERNEL);
1180	if (!mr)	1285	if (!mr)
1181	return ERR_PTR(-ENOMEM);	1286	return ERR_PTR(-ENOMEM);
1182		1287
1183	mr->ibmr.pd = pd;	1288	mr->ibmr.pd = pd;
1184	mr->access_flags = access_flags;	1289	mr->access_flags = access_flags;
		1290	mr->page_shift = order_base_2(page_size);
1185		1291
1186	inlen = MLX5_ST_SZ_BYTES(create_mkey_in);	1292	inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
1187	if (populate)	1293	if (populate)
1188	inlen += sizeof(pas) roundup(npages, 2);	1294	inlen += sizeof(pas)
		1295	roundup(ib_umem_num_dma_blocks(umem, page_size), 2);
1189	in = kvzalloc(inlen, GFP_KERNEL);	1296	in = kvzalloc(inlen, GFP_KERNEL);
1190	if (!in) {	1297	if (!in) {
1191	err = -ENOMEM;	1298	err = -ENOMEM;
@@ -1197,7 +1304,7 @@ static struct mlx5_ib_mr reg_create(struct ib_mr ibmr, struct ib_pd *pd, · 5 unmodified lines
1197	err = -EINVAL;	1304	err = -EINVAL;
1198	goto err_2;	1305	goto err_2;
1199	}	1306	}
1200	mlx5_ib_populate_pas(dev, umem, page_shift, pas,	1307	mlx5_ib_populate_pas(umem, 1UL << mr->page_shift, pas,
1201	pg_cap ? MLX5_IB_MTT_PRESENT : 0);	1308	pg_cap ? MLX5_IB_MTT_PRESENT : 0);
1202	}	1309	}
1203		1310
@@ -1206,20 +1313,20 @@ static struct mlx5_ib_mr reg_create(struct ib_mr ibmr, struct ib_pd *pd, · 2 unmodified lines
1206	MLX5_SET(create_mkey_in, in, pg_access, !!(pg_cap));	1313	MLX5_SET(create_mkey_in, in, pg_access, !!(pg_cap));
1207		1314
1208	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);	1315	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1209	set_mkc_access_pd_addr_fields(mkc, access_flags, virt_addr,	1316	set_mkc_access_pd_addr_fields(mkc, access_flags, iova,
1210	populate ? pd : dev->umrc.pd);	1317	populate ? pd : dev->umrc.pd);
1211	MLX5_SET(mkc, mkc, free, !populate);	1318	MLX5_SET(mkc, mkc, free, !populate);
1212	MLX5_SET(mkc, mkc, access_mode_1_0, MLX5_MKC_ACCESS_MODE_MTT);	1319	MLX5_SET(mkc, mkc, access_mode_1_0, MLX5_MKC_ACCESS_MODE_MTT);
1213	MLX5_SET(mkc, mkc, umr_en, 1);	1320	MLX5_SET(mkc, mkc, umr_en, 1);
1214		1321
1215	MLX5_SET64(mkc, mkc, len, length);	1322	MLX5_SET64(mkc, mkc, len, umem->length);
1216	MLX5_SET(mkc, mkc, bsf_octword_size, 0);	1323	MLX5_SET(mkc, mkc, bsf_octword_size, 0);
1217	MLX5_SET(mkc, mkc, translations_octword_size,	1324	MLX5_SET(mkc, mkc, translations_octword_size,
1218	get_octo_len(virt_addr, length, page_shift));	1325	get_octo_len(iova, umem->length, mr->page_shift));
1219	MLX5_SET(mkc, mkc, log_page_size, page_shift);	1326	MLX5_SET(mkc, mkc, log_page_size, mr->page_shift);
1220	if (populate) {	1327	if (populate) {
1221	MLX5_SET(create_mkey_in, in, translations_octword_actual_size,	1328	MLX5_SET(create_mkey_in, in, translations_octword_actual_size,
1222	get_octo_len(virt_addr, length, page_shift));	1329	get_octo_len(iova, umem->length, mr->page_shift));
1223	}	1330	}
1224		1331
1225	err = mlx5_ib_create_mkey(dev, &mr->mmkey, in, inlen);	1332	err = mlx5_ib_create_mkey(dev, &mr->mmkey, in, inlen);
@@ -1229,7 +1336,8 @@ static struct mlx5_ib_mr reg_create(struct ib_mr ibmr, struct ib_pd *pd, · 3 unmodified lines
1229	}	1336	}
1230	mr->mmkey.type = MLX5_MKEY_MR;	1337	mr->mmkey.type = MLX5_MKEY_MR;
1231	mr->desc_size = sizeof(struct mlx5_mtt);	1338	mr->desc_size = sizeof(struct mlx5_mtt);
1232	mr->dev = dev;	1339	mr->umem = umem;
		1340	set_mr_fields(dev, mr, umem->length, access_flags);
1233	kvfree(in);	1341	kvfree(in);
1234		1342
1235	mlx5_ib_dbg(dev, "mkey = 0x%x\n", mr->mmkey.key);	1343	mlx5_ib_dbg(dev, "mkey = 0x%x\n", mr->mmkey.key);
@@ -1238,25 +1346,11 @@ static struct mlx5_ib_mr reg_create(struct ib_mr ibmr, struct ib_pd *pd, · 2 unmodified lines
1238		1346
1239	err_2:	1347	err_2:
1240	kvfree(in);	1348	kvfree(in);
1241
1242	err_1:	1349	err_1:
1243	if (!ibmr)	1350	kfree(mr);
1244	kfree(mr);
1245
1246	return ERR_PTR(err);	1351	return ERR_PTR(err);
1247	}	1352	}
1248		1353
1249	static void set_mr_fields(struct mlx5_ib_dev dev, struct mlx5_ib_mr mr,
1250	int npages, u64 length, int access_flags)
1251	{
1252	mr->npages = npages;
1253	atomic_add(npages, &dev->mdev->priv.reg_pages);
1254	mr->ibmr.lkey = mr->mmkey.key;
1255	mr->ibmr.rkey = mr->mmkey.key;
1256	mr->ibmr.length = length;
1257	mr->access_flags = access_flags;
1258	}
1259
1260	static struct ib_mr mlx5_ib_get_dm_mr(struct ib_pd pd, u64 start_addr,	1354	static struct ib_mr mlx5_ib_get_dm_mr(struct ib_pd pd, u64 start_addr,
1261	u64 length, int acc, int mode)	1355	u64 length, int acc, int mode)
1262	{	1356	{
@@ -1290,8 +1384,7 @@ static struct ib_mr mlx5_ib_get_dm_mr(struct ib_pd pd, u64 start_addr, · 27 unmodified lines
1290		1384
1291	kfree(in);	1385	kfree(in);
1292		1386
1293	mr->umem = NULL;	1387	set_mr_fields(dev, mr, length, acc);
1294	set_mr_fields(dev, mr, 0, length, acc);
1295		1388
1296	return &mr->ibmr;	1389	return &mr->ibmr;
1297		1390
@@ -1352,116 +1445,128 @@ struct ib_mr mlx5_ib_reg_dm_mr(struct ib_pd pd, struct ib_dm *dm, · 54 unmodified lines
1352	attr->access_flags, mode);	1445	attr->access_flags, mode);
1353	}	1446	}
1354		1447
1355	struct ib_mr mlx5_ib_reg_user_mr(struct ib_pd pd, u64 start, u64 length,	1448	static struct ib_mr create_real_mr(struct ib_pd pd, struct ib_umem *umem,
1356	u64 virt_addr, int access_flags,	1449	u64 iova, int access_flags)
1357	struct ib_udata *udata)
1358	{	1450	{
1359	struct mlx5_ib_dev *dev = to_mdev(pd->device);	1451	struct mlx5_ib_dev *dev = to_mdev(pd->device);
1360	struct mlx5_ib_mr *mr = NULL;	1452	struct mlx5_ib_mr *mr = NULL;
1361	bool xlt_with_umr;	1453	bool xlt_with_umr;
1362	struct ib_umem *umem;
1363	int page_shift;
1364	int npages;
1365	int ncont;
1366	int order;
1367	int err;	1454	int err;
1368		1455
1369	if (!IS_ENABLED(CONFIG_INFINIBAND_USER_MEM))	1456	xlt_with_umr = mlx5_ib_can_load_pas_with_umr(dev, umem->length);
1370	return ERR_PTR(-EOPNOTSUPP);
1371
1372	mlx5_ib_dbg(dev, "start 0x%llx, virt_addr 0x%llx, length 0x%llx, access_flags 0x%x\n",
1373	start, virt_addr, length, access_flags);
1374
1375	xlt_with_umr = mlx5_ib_can_load_pas_with_umr(dev, length);
1376	/* ODP requires xlt update via umr to work. */
1377	if (!xlt_with_umr && (access_flags & IB_ACCESS_ON_DEMAND))
1378	return ERR_PTR(-EINVAL);
1379
1380	if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING) && !start &&
1381	length == U64_MAX) {
1382	if (virt_addr != start)
1383	return ERR_PTR(-EINVAL);
1384	if (!(access_flags & IB_ACCESS_ON_DEMAND) \|\|
1385	!(dev->odp_caps.general_caps & IB_ODP_SUPPORT_IMPLICIT))
1386	return ERR_PTR(-EINVAL);
1387
1388	mr = mlx5_ib_alloc_implicit_mr(to_mpd(pd), udata, access_flags);
1389	if (IS_ERR(mr))
1390	return ERR_CAST(mr);
1391	return &mr->ibmr;
1392	}
1393
1394	err = mr_umem_get(dev, start, length, access_flags, &umem,
1395	&npages, &page_shift, &ncont, &order);
1396
1397	if (err < 0)
1398	return ERR_PTR(err);
1399
1400	if (xlt_with_umr) {	1457	if (xlt_with_umr) {
1401	mr = alloc_mr_from_cache(pd, umem, virt_addr, length, ncont,	1458	mr = alloc_cacheable_mr(pd, umem, iova, access_flags);
1402	page_shift, order, access_flags);	1459	} else {
1403	if (IS_ERR(mr))	1460	unsigned int page_size = mlx5_umem_find_best_pgsz(
1404	mr = NULL;	1461	umem, mkc, log_page_size, 0, iova);
1405	}
1406		1462
1407	if (!mr) {
1408	mutex_lock(&dev->slow_path_mutex);	1463	mutex_lock(&dev->slow_path_mutex);
1409	mr = reg_create(NULL, pd, virt_addr, length, umem, ncont,	1464	mr = reg_create(pd, umem, iova, access_flags, page_size, true);
1410	page_shift, access_flags, !xlt_with_umr);
1411	mutex_unlock(&dev->slow_path_mutex);	1465	mutex_unlock(&dev->slow_path_mutex);
1412	}	1466	}
1413
1414	if (IS_ERR(mr)) {	1467	if (IS_ERR(mr)) {
1415	err = PTR_ERR(mr);	1468	ib_umem_release(umem);
1416	goto error;	1469	return ERR_CAST(mr);
1417	}	1470	}
1418		1471
1419	mlx5_ib_dbg(dev, "mkey 0x%x\n", mr->mmkey.key);	1472	mlx5_ib_dbg(dev, "mkey 0x%x\n", mr->mmkey.key);
1420		1473
1421	mr->umem = umem;	1474	atomic_add(ib_umem_num_pages(umem), &dev->mdev->priv.reg_pages);
1422	set_mr_fields(dev, mr, npages, length, access_flags);
1423		1475
1424	if (xlt_with_umr && !(access_flags & IB_ACCESS_ON_DEMAND)) {	1476	if (xlt_with_umr) {
1425	/*	1477	/*
1426	* If the MR was created with reg_create then it will be	1478	* If the MR was created with reg_create then it will be
1427	* configured properly but left disabled. It is safe to go ahead	1479	* configured properly but left disabled. It is safe to go ahead
1428	* and configure it again via UMR while enabling it.	1480	* and configure it again via UMR while enabling it.
1429	*/	1481	*/
1430	int update_xlt_flags = MLX5_IB_UPD_XLT_ENABLE;	1482	err = mlx5_ib_update_mr_pas(mr, MLX5_IB_UPD_XLT_ENABLE);
1431
1432	err = mlx5_ib_update_xlt(mr, 0, ncont, page_shift,
1433	update_xlt_flags);
1434	if (err) {	1483	if (err) {
1435	dereg_mr(dev, mr);	1484	dereg_mr(dev, mr);
1436	return ERR_PTR(err);	1485	return ERR_PTR(err);
1437	}	1486	}
1438	}	1487	}
		1488	return &mr->ibmr;
		1489	}
1439		1490
1440	if (is_odp_mr(mr)) {	1491	static struct ib_mr create_user_odp_mr(struct ib_pd pd, u64 start, u64 length,
1441	to_ib_umem_odp(mr->umem)->private = mr;	1492	u64 iova, int access_flags,
1442	init_waitqueue_head(&mr->q_deferred_work);	1493	struct ib_udata *udata)
1443	atomic_set(&mr->num_deferred_work, 0);	1494	{
1444	err = xa_err(xa_store(&dev->odp_mkeys,	1495	struct mlx5_ib_dev *dev = to_mdev(pd->device);
1445	mlx5_base_mkey(mr->mmkey.key), &mr->mmkey,	1496	struct ib_umem_odp *odp;
1446	GFP_KERNEL));	1497	struct mlx5_ib_mr *mr;
1447	if (err) {	1498	int err;
1448	dereg_mr(dev, mr);
1449	return ERR_PTR(err);
1450	}
1451		1499
1452	err = mlx5_ib_init_odp_mr(mr, xlt_with_umr);	1500	if (!IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING))
1453	if (err) {	1501	return ERR_PTR(-EOPNOTSUPP);
1454	dereg_mr(dev, mr);	1502
1455	return ERR_PTR(err);	1503	if (!start && length == U64_MAX) {
1456	}	1504	if (iova != 0)
		1505	return ERR_PTR(-EINVAL);
		1506	if (!(dev->odp_caps.general_caps & IB_ODP_SUPPORT_IMPLICIT))
		1507	return ERR_PTR(-EINVAL);
		1508
		1509	mr = mlx5_ib_alloc_implicit_mr(to_mpd(pd), udata, access_flags);
		1510	if (IS_ERR(mr))
		1511	return ERR_CAST(mr);
		1512	return &mr->ibmr;
		1513	}
		1514
		1515	/* ODP requires xlt update via umr to work. */
		1516	if (!mlx5_ib_can_load_pas_with_umr(dev, length))
		1517	return ERR_PTR(-EINVAL);
		1518
		1519	odp = ib_umem_odp_get(&dev->ib_dev, start, length, access_flags,
		1520	&mlx5_mn_ops);
		1521	if (IS_ERR(odp))
		1522	return ERR_CAST(odp);
		1523
		1524	mr = alloc_cacheable_mr(pd, &odp->umem, iova, access_flags);
		1525	if (IS_ERR(mr)) {
		1526	ib_umem_release(&odp->umem);
		1527	return ERR_CAST(mr);
1457	}	1528	}
1458		1529
		1530	odp->private = mr;
		1531	init_waitqueue_head(&mr->q_deferred_work);
		1532	atomic_set(&mr->num_deferred_work, 0);
		1533	err = xa_err(xa_store(&dev->odp_mkeys, mlx5_base_mkey(mr->mmkey.key),
		1534	&mr->mmkey, GFP_KERNEL));
		1535	if (err)
		1536	goto err_dereg_mr;
		1537
		1538	err = mlx5_ib_init_odp_mr(mr);
		1539	if (err)
		1540	goto err_dereg_mr;
1459	return &mr->ibmr;	1541	return &mr->ibmr;
1460	error:	1542
1461	ib_umem_release(umem);	1543	err_dereg_mr:
		1544	dereg_mr(dev, mr);
1462	return ERR_PTR(err);	1545	return ERR_PTR(err);
1463	}	1546	}
1464		1547
		1548	struct ib_mr mlx5_ib_reg_user_mr(struct ib_pd pd, u64 start, u64 length,
		1549	u64 iova, int access_flags,
		1550	struct ib_udata *udata)
		1551	{
		1552	struct mlx5_ib_dev *dev = to_mdev(pd->device);
		1553	struct ib_umem *umem;
		1554
		1555	if (!IS_ENABLED(CONFIG_INFINIBAND_USER_MEM))
		1556	return ERR_PTR(-EOPNOTSUPP);
		1557
		1558	mlx5_ib_dbg(dev, "start 0x%llx, iova 0x%llx, length 0x%llx, access_flags 0x%x\n",
		1559	start, iova, length, access_flags);
		1560
		1561	if (access_flags & IB_ACCESS_ON_DEMAND)
		1562	return create_user_odp_mr(pd, start, length, iova, access_flags,
		1563	udata);
		1564	umem = ib_umem_get(&dev->ib_dev, start, length, access_flags);
		1565	if (IS_ERR(umem))
		1566	return ERR_CAST(umem);
		1567	return create_real_mr(pd, umem, iova, access_flags);
		1568	}
		1569
1465	/**	1570	/**
1466	* mlx5_mr_cache_invalidate - Fence all DMA on the MR	1571	* mlx5_mr_cache_invalidate - Fence all DMA on the MR
1467	* @mr: The MR to fence	1572	* @mr: The MR to fence
@@ -1474,151 +1579,224 @@ int mlx5_mr_cache_invalidate(struct mlx5_ib_mr *mr) · 6 unmodified lines
1474	{	1579	{
1475	struct mlx5_umr_wr umrwr = {};	1580	struct mlx5_umr_wr umrwr = {};
1476		1581
1477	if (mr->dev->mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)	1582	if (mr_to_mdev(mr)->mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
1478	return 0;	1583	return 0;
1479		1584
1480	umrwr.wr.send_flags = MLX5_IB_SEND_UMR_DISABLE_MR \|	1585	umrwr.wr.send_flags = MLX5_IB_SEND_UMR_DISABLE_MR \|
1481	MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;	1586	MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
1482	umrwr.wr.opcode = MLX5_IB_WR_UMR;	1587	umrwr.wr.opcode = MLX5_IB_WR_UMR;
1483	umrwr.pd = mr->dev->umrc.pd;	1588	umrwr.pd = mr_to_mdev(mr)->umrc.pd;
1484	umrwr.mkey = mr->mmkey.key;	1589	umrwr.mkey = mr->mmkey.key;
1485	umrwr.ignore_free_state = 1;	1590	umrwr.ignore_free_state = 1;
1486		1591
1487	return mlx5_ib_post_send_wait(mr->dev, &umrwr);	1592	return mlx5_ib_post_send_wait(mr_to_mdev(mr), &umrwr);
1488	}	1593	}
1489		1594
1490	static int rereg_umr(struct ib_pd pd, struct mlx5_ib_mr mr,	1595	/*
1491	int access_flags, int flags)	1596	* True if the change in access flags can be done via UMR, only some access
1492	{	1597	* flags can be updated.
1493	struct mlx5_ib_dev *dev = to_mdev(pd->device);	1598	*/
1494	struct mlx5_umr_wr umrwr = {};	1599	static bool can_use_umr_rereg_access(struct mlx5_ib_dev *dev,
		1600	unsigned int current_access_flags,
		1601	unsigned int target_access_flags)
		1602	{
		1603	unsigned int diffs = current_access_flags ^ target_access_flags;
		1604
		1605	if (diffs & ~(IB_ACCESS_LOCAL_WRITE \| IB_ACCESS_REMOTE_WRITE \|
		1606	IB_ACCESS_REMOTE_READ \| IB_ACCESS_RELAXED_ORDERING))
		1607	return false;
		1608	return mlx5_ib_can_reconfig_with_umr(dev, current_access_flags,
		1609	target_access_flags);
		1610	}
		1611
		1612	static int umr_rereg_pd_access(struct mlx5_ib_mr mr, struct ib_pd pd,
		1613	int access_flags)
		1614	{
		1615	struct mlx5_ib_dev *dev = to_mdev(mr->ibmr.device);
		1616	struct mlx5_umr_wr umrwr = {
		1617	.wr = {
		1618	.send_flags = MLX5_IB_SEND_UMR_FAIL_IF_FREE \|
		1619	MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS,
		1620	.opcode = MLX5_IB_WR_UMR,
		1621	},
		1622	.mkey = mr->mmkey.key,
		1623	.pd = pd,
		1624	.access_flags = access_flags,
		1625	};
1495	int err;	1626	int err;
1496		1627
1497	umrwr.wr.send_flags = MLX5_IB_SEND_UMR_FAIL_IF_FREE;
1498
1499	umrwr.wr.opcode = MLX5_IB_WR_UMR;
1500	umrwr.mkey = mr->mmkey.key;
1501
1502	if (flags & IB_MR_REREG_PD \|\| flags & IB_MR_REREG_ACCESS) {
1503	umrwr.pd = pd;
1504	umrwr.access_flags = access_flags;
1505	umrwr.wr.send_flags \|= MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
1506	}
1507
1508	err = mlx5_ib_post_send_wait(dev, &umrwr);	1628	err = mlx5_ib_post_send_wait(dev, &umrwr);
		1629	if (err)
		1630	return err;
1509		1631
1510	return err;	1632	mr->access_flags = access_flags;
		1633	mr->mmkey.pd = to_mpd(pd)->pdn;
		1634	return 0;
1511	}	1635	}
1512		1636
1513	int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start,	1637	static bool can_use_umr_rereg_pas(struct mlx5_ib_mr *mr,
1514	u64 length, u64 virt_addr, int new_access_flags,	1638	struct ib_umem *new_umem,
1515	struct ib_pd new_pd, struct ib_udata udata)	1639	int new_access_flags, u64 iova,
		1640	unsigned long *page_size)
1516	{	1641	{
1517	struct mlx5_ib_dev *dev = to_mdev(ib_mr->device);	1642	struct mlx5_ib_dev *dev = to_mdev(mr->ibmr.device);
1518	struct mlx5_ib_mr *mr = to_mmr(ib_mr);
1519	struct ib_pd *pd = (flags & IB_MR_REREG_PD) ? new_pd : ib_mr->pd;
1520	int access_flags = flags & IB_MR_REREG_ACCESS ?
1521	new_access_flags :
1522	mr->access_flags;
1523	int page_shift = 0;
1524	int upd_flags = 0;
1525	int npages = 0;
1526	int ncont = 0;
1527	int order = 0;
1528	u64 addr, len;
1529	int err;
1530		1643
1531	mlx5_ib_dbg(dev, "start 0x%llx, virt_addr 0x%llx, length 0x%llx, access_flags 0x%x\n",	1644	/* We only track the allocated sizes of MRs from the cache */
1532	start, virt_addr, length, access_flags);	1645	if (!mr->cache_ent)
		1646	return false;
		1647	if (!mlx5_ib_can_load_pas_with_umr(dev, new_umem->length))
		1648	return false;
1533		1649
1534	atomic_sub(mr->npages, &dev->mdev->priv.reg_pages);	1650	*page_size =
		1651	mlx5_umem_find_best_pgsz(new_umem, mkc, log_page_size, 0, iova);
		1652	if (WARN_ON(!*page_size))
		1653	return false;
		1654	return (1ULL << mr->cache_ent->order) >=
		1655	ib_umem_num_dma_blocks(new_umem, *page_size);
		1656	}
1535		1657
1536	if (!mr->umem)	1658	static int umr_rereg_pas(struct mlx5_ib_mr mr, struct ib_pd pd,
1537	return -EINVAL;	1659	int access_flags, int flags, struct ib_umem *new_umem,
		1660	u64 iova, unsigned long page_size)
		1661	{
		1662	struct mlx5_ib_dev *dev = to_mdev(mr->ibmr.device);
		1663	int upd_flags = MLX5_IB_UPD_XLT_ADDR \| MLX5_IB_UPD_XLT_ENABLE;
		1664	struct ib_umem *old_umem = mr->umem;
		1665	int err;
1538		1666
1539	if (is_odp_mr(mr))	1667	/*
1540	return -EOPNOTSUPP;	1668	* To keep everything simple the MR is revoked before we start to mess
		1669	* with it. This ensure the change is atomic relative to any use of the
		1670	* MR.
		1671	*/
		1672	err = mlx5_mr_cache_invalidate(mr);
		1673	if (err)
		1674	return err;
1541		1675
1542	if (flags & IB_MR_REREG_TRANS) {	1676	if (flags & IB_MR_REREG_PD) {
1543	addr = virt_addr;	1677	mr->ibmr.pd = pd;
1544	len = length;	1678	mr->mmkey.pd = to_mpd(pd)->pdn;
1545	} else {	1679	upd_flags \|= MLX5_IB_UPD_XLT_PD;
1546	addr = mr->umem->address;	1680	}
1547	len = mr->umem->length;	1681	if (flags & IB_MR_REREG_ACCESS) {
		1682	mr->access_flags = access_flags;
		1683	upd_flags \|= MLX5_IB_UPD_XLT_ACCESS;
1548	}	1684	}
1549		1685
1550	if (flags != IB_MR_REREG_PD) {	1686	mr->ibmr.length = new_umem->length;
		1687	mr->mmkey.iova = iova;
		1688	mr->mmkey.size = new_umem->length;
		1689	mr->page_shift = order_base_2(page_size);
		1690	mr->umem = new_umem;
		1691	err = mlx5_ib_update_mr_pas(mr, upd_flags);
		1692	if (err) {
1551	/*	1693	/*
1552	* Replace umem. This needs to be done whether or not UMR is	1694	* The MR is revoked at this point so there is no issue to free
1553	* used.	1695	* new_umem.
1554	*/	1696	*/
1555	flags \|= IB_MR_REREG_TRANS;	1697	mr->umem = old_umem;
1556	ib_umem_release(mr->umem);	1698	return err;
1557	mr->umem = NULL;
1558	err = mr_umem_get(dev, addr, len, access_flags, &mr->umem,
1559	&npages, &page_shift, &ncont, &order);
1560	if (err)
1561	goto err;
1562	}	1699	}
1563		1700
1564	if (!mlx5_ib_can_reconfig_with_umr(dev, mr->access_flags,	1701	atomic_sub(ib_umem_num_pages(old_umem), &dev->mdev->priv.reg_pages);
1565	access_flags) \|\|	1702	ib_umem_release(old_umem);
1566	!mlx5_ib_can_load_pas_with_umr(dev, len) \|\|	1703	atomic_add(ib_umem_num_pages(new_umem), &dev->mdev->priv.reg_pages);
1567	(flags & IB_MR_REREG_TRANS &&	1704	return 0;
1568	!mlx5_ib_pas_fits_in_mr(mr, addr, len))) {	1705	}
1569	/*
1570	* UMR can't be used - MKey needs to be replaced.
1571	*/
1572	if (mr->cache_ent)
1573	detach_mr_from_cache(mr);
1574	err = destroy_mkey(dev, mr);
1575	if (err)
1576	goto err;
1577		1706
1578	mr = reg_create(ib_mr, pd, addr, len, mr->umem, ncont,	1707	struct ib_mr mlx5_ib_rereg_user_mr(struct ib_mr ib_mr, int flags, u64 start,
1579	page_shift, access_flags, true);	1708	u64 length, u64 iova, int new_access_flags,
		1709	struct ib_pd *new_pd,
		1710	struct ib_udata *udata)
		1711	{
		1712	struct mlx5_ib_dev *dev = to_mdev(ib_mr->device);
		1713	struct mlx5_ib_mr *mr = to_mmr(ib_mr);
		1714	int err;
1580		1715
1581	if (IS_ERR(mr)) {	1716	if (!IS_ENABLED(CONFIG_INFINIBAND_USER_MEM))
1582	err = PTR_ERR(mr);	1717	return ERR_PTR(-EOPNOTSUPP);
1583	mr = to_mmr(ib_mr);
1584	goto err;
1585	}
1586	} else {
1587	/*
1588	* Send a UMR WQE
1589	*/
1590	mr->ibmr.pd = pd;
1591	mr->access_flags = access_flags;
1592	mr->mmkey.iova = addr;
1593	mr->mmkey.size = len;
1594	mr->mmkey.pd = to_mpd(pd)->pdn;
1595		1718
1596	if (flags & IB_MR_REREG_TRANS) {	1719	mlx5_ib_dbg(
1597	upd_flags = MLX5_IB_UPD_XLT_ADDR;	1720	dev,
1598	if (flags & IB_MR_REREG_PD)	1721	"start 0x%llx, iova 0x%llx, length 0x%llx, access_flags 0x%x\n",
1599	upd_flags \|= MLX5_IB_UPD_XLT_PD;	1722	start, iova, length, new_access_flags);
1600	if (flags & IB_MR_REREG_ACCESS)	1723
1601	upd_flags \|= MLX5_IB_UPD_XLT_ACCESS;	1724	if (flags & ~(IB_MR_REREG_TRANS \| IB_MR_REREG_PD \| IB_MR_REREG_ACCESS))
1602	err = mlx5_ib_update_xlt(mr, 0, npages, page_shift,	1725	return ERR_PTR(-EOPNOTSUPP);
1603	upd_flags);	1726
1604	} else {	1727	if (!(flags & IB_MR_REREG_ACCESS))
1605	err = rereg_umr(pd, mr, access_flags, flags);	1728	new_access_flags = mr->access_flags;
		1729	if (!(flags & IB_MR_REREG_PD))
		1730	new_pd = ib_mr->pd;
		1731
		1732	if (!(flags & IB_MR_REREG_TRANS)) {
		1733	struct ib_umem *umem;
		1734
		1735	/* Fast path for PD/access change */
		1736	if (can_use_umr_rereg_access(dev, mr->access_flags,
		1737	new_access_flags)) {
		1738	err = umr_rereg_pd_access(mr, new_pd, new_access_flags);
		1739	if (err)
		1740	return ERR_PTR(err);
		1741	return NULL;
1606	}	1742	}
		1743	/* DM or ODP MR's don't have a umem so we can't re-use it */
		1744	if (!mr->umem \|\| is_odp_mr(mr))
		1745	goto recreate;
1607		1746
		1747	/*
		1748	* Only one active MR can refer to a umem at one time, revoke
		1749	* the old MR before assigning the umem to the new one.
		1750	*/
		1751	err = mlx5_mr_cache_invalidate(mr);
1608	if (err)	1752	if (err)
1609	goto err;	1753	return ERR_PTR(err);
1610	}	1754	umem = mr->umem;
1611		1755	mr->umem = NULL;
1612	set_mr_fields(dev, mr, npages, len, access_flags);	1756	atomic_sub(ib_umem_num_pages(umem), &dev->mdev->priv.reg_pages);
1613		1757
1614	return 0;	1758	return create_real_mr(new_pd, umem, mr->mmkey.iova,
		1759	new_access_flags);
		1760	}
1615		1761
1616	err:	1762	/*
1617	ib_umem_release(mr->umem);	1763	* DM doesn't have a PAS list so we can't re-use it, odp does but the
1618	mr->umem = NULL;	1764	* logic around releasing the umem is different
		1765	*/
		1766	if (!mr->umem \|\| is_odp_mr(mr))
		1767	goto recreate;
		1768
		1769	if (!(new_access_flags & IB_ACCESS_ON_DEMAND) &&
		1770	can_use_umr_rereg_access(dev, mr->access_flags, new_access_flags)) {
		1771	struct ib_umem *new_umem;
		1772	unsigned long page_size;
		1773
		1774	new_umem = ib_umem_get(&dev->ib_dev, start, length,
		1775	new_access_flags);
		1776	if (IS_ERR(new_umem))
		1777	return ERR_CAST(new_umem);
		1778
		1779	/* Fast path for PAS change */
		1780	if (can_use_umr_rereg_pas(mr, new_umem, new_access_flags, iova,
		1781	&page_size)) {
		1782	err = umr_rereg_pas(mr, new_pd, new_access_flags, flags,
		1783	new_umem, iova, page_size);
		1784	if (err) {
		1785	ib_umem_release(new_umem);
		1786	return ERR_PTR(err);
		1787	}
		1788	return NULL;
		1789	}
		1790	return create_real_mr(new_pd, new_umem, iova, new_access_flags);
		1791	}
1619		1792
1620	clean_mr(dev, mr);	1793	/*
1621	return err;	1794	* Everything else has no state we can preserve, just create a new MR
		1795	* from scratch
		1796	*/
		1797	recreate:
		1798	return mlx5_ib_reg_user_mr(new_pd, start, length, iova,
		1799	new_access_flags, udata);
1622	}	1800	}
1623		1801
1624	static int	1802	static int
@@ -1627,6 +1805,8 @@ mlx5_alloc_priv_descs(struct ib_device *device, · 2 unmodified lines
1627	int ndescs,	1805	int ndescs,
1628	int desc_size)	1806	int desc_size)
1629	{	1807	{
		1808	struct mlx5_ib_dev *dev = to_mdev(device);
		1809	struct device *ddev = &dev->mdev->pdev->dev;
1630	int size = ndescs * desc_size;	1810	int size = ndescs * desc_size;
1631	int add_size;	1811	int add_size;
1632	int ret;	1812	int ret;
@@ -1639,9 +1819,8 @@ mlx5_alloc_priv_descs(struct ib_device *device, · 6 unmodified lines
1639		1819
1640	mr->descs = PTR_ALIGN(mr->descs_alloc, MLX5_UMR_ALIGN);	1820	mr->descs = PTR_ALIGN(mr->descs_alloc, MLX5_UMR_ALIGN);
1641		1821
1642	mr->desc_map = dma_map_single(device->dev.parent, mr->descs,	1822	mr->desc_map = dma_map_single(ddev, mr->descs, size, DMA_TO_DEVICE);
1643	size, DMA_TO_DEVICE);	1823	if (dma_mapping_error(ddev, mr->desc_map)) {
1644	if (dma_mapping_error(device->dev.parent, mr->desc_map)) {
1645	ret = -ENOMEM;	1824	ret = -ENOMEM;
1646	goto err;	1825	goto err;
1647	}	1826	}
@@ -1659,9 +1838,10 @@ mlx5_free_priv_descs(struct mlx5_ib_mr *mr) · 11 unmodified lines
1659	if (mr->descs) {	1838	if (mr->descs) {
1660	struct ib_device *device = mr->ibmr.device;	1839	struct ib_device *device = mr->ibmr.device;
1661	int size = mr->max_descs * mr->desc_size;	1840	int size = mr->max_descs * mr->desc_size;
		1841	struct mlx5_ib_dev *dev = to_mdev(device);
1662		1842
1663	dma_unmap_single(device->dev.parent, mr->desc_map,	1843	dma_unmap_single(&dev->mdev->pdev->dev, mr->desc_map, size,
1664	size, DMA_TO_DEVICE);	1844	DMA_TO_DEVICE);
1665	kfree(mr->descs_alloc);	1845	kfree(mr->descs_alloc);
1666	mr->descs = NULL;	1846	mr->descs = NULL;
1667	}	1847	}
@@ -1691,7 +1871,6 @@ static void clean_mr(struct mlx5_ib_dev dev, struct mlx5_ib_mr mr) · 23 unmodified lines
1691		1871
1692	static void dereg_mr(struct mlx5_ib_dev dev, struct mlx5_ib_mr mr)	1872	static void dereg_mr(struct mlx5_ib_dev dev, struct mlx5_ib_mr mr)
1693	{	1873	{
1694	int npages = mr->npages;
1695	struct ib_umem *umem = mr->umem;	1874	struct ib_umem *umem = mr->umem;
1696		1875
1697	/* Stop all DMA */	1876	/* Stop all DMA */
@@ -1700,14 +1879,17 @@ static void dereg_mr(struct mlx5_ib_dev dev, struct mlx5_ib_mr mr) · 2 unmodified lines
1700	else	1879	else
1701	clean_mr(dev, mr);	1880	clean_mr(dev, mr);
1702		1881
		1882	if (umem) {
		1883	if (!is_odp_mr(mr))
		1884	atomic_sub(ib_umem_num_pages(umem),
		1885	&dev->mdev->priv.reg_pages);
		1886	ib_umem_release(umem);
		1887	}
		1888
1703	if (mr->cache_ent)	1889	if (mr->cache_ent)
1704	mlx5_mr_cache_free(dev, mr);	1890	mlx5_mr_cache_free(dev, mr);
1705	else	1891	else
1706	kfree(mr);	1892	kfree(mr);
1707
1708	ib_umem_release(umem);
1709	atomic_sub(npages, &dev->mdev->priv.reg_pages);
1710
1711	}	1893	}
1712		1894
1713	int mlx5_ib_dereg_mr(struct ib_mr ibmr, struct ib_udata udata)	1895	int mlx5_ib_dereg_mr(struct ib_mr ibmr, struct ib_udata udata)

drivers/infiniband/hw/mlx5/odp.c+29−27

@@ -102,7 +102,7 @@ static void populate_klm(struct mlx5_klm *pklm, size_t idx, size_t nentries, · 101 unmodified lines
102	if (flags & MLX5_IB_UPD_XLT_ZAP) {	102	if (flags & MLX5_IB_UPD_XLT_ZAP) {
103	for (; pklm != end; pklm++, idx++) {	103	for (; pklm != end; pklm++, idx++) {
104	pklm->bcount = cpu_to_be32(MLX5_IMR_MTT_SIZE);	104	pklm->bcount = cpu_to_be32(MLX5_IMR_MTT_SIZE);
105	pklm->key = cpu_to_be32(imr->dev->null_mkey);	105	pklm->key = cpu_to_be32(mr_to_mdev(imr)->null_mkey);
106	pklm->va = 0;	106	pklm->va = 0;
107	}	107	}
108	return;	108	return;
@@ -129,7 +129,7 @@ static void populate_klm(struct mlx5_klm *pklm, size_t idx, size_t nentries, · 20 unmodified lines
129	* locking around the xarray.	129	* locking around the xarray.
130	*/	130	*/
131	lockdep_assert_held(&to_ib_umem_odp(imr->umem)->umem_mutex);	131	lockdep_assert_held(&to_ib_umem_odp(imr->umem)->umem_mutex);
132	lockdep_assert_held(&imr->dev->odp_srcu);	132	lockdep_assert_held(&mr_to_mdev(imr)->odp_srcu);
133		133
134	for (; pklm != end; pklm++, idx++) {	134	for (; pklm != end; pklm++, idx++) {
135	struct mlx5_ib_mr *mtt = xa_load(&imr->implicit_children, idx);	135	struct mlx5_ib_mr *mtt = xa_load(&imr->implicit_children, idx);
@@ -139,7 +139,7 @@ static void populate_klm(struct mlx5_klm *pklm, size_t idx, size_t nentries, · 3 unmodified lines
139	pklm->key = cpu_to_be32(mtt->ibmr.lkey);	139	pklm->key = cpu_to_be32(mtt->ibmr.lkey);
140	pklm->va = cpu_to_be64(idx * MLX5_IMR_MTT_SIZE);	140	pklm->va = cpu_to_be64(idx * MLX5_IMR_MTT_SIZE);
141	} else {	141	} else {
142	pklm->key = cpu_to_be32(imr->dev->null_mkey);	142	pklm->key = cpu_to_be32(mr_to_mdev(imr)->null_mkey);
143	pklm->va = 0;	143	pklm->va = 0;
144	}	144	}
145	}	145	}
@@ -199,7 +199,7 @@ static void dma_fence_odp_mr(struct mlx5_ib_mr *mr) · 53 unmodified lines
199	mutex_unlock(&odp->umem_mutex);	199	mutex_unlock(&odp->umem_mutex);
200		200
201	if (!mr->cache_ent) {	201	if (!mr->cache_ent) {
202	mlx5_core_destroy_mkey(mr->dev->mdev, &mr->mmkey);	202	mlx5_core_destroy_mkey(mr_to_mdev(mr)->mdev, &mr->mmkey);
203	WARN_ON(mr->descs);	203	WARN_ON(mr->descs);
204	}	204	}
205	}	205	}
@@ -222,19 +222,19 @@ static void free_implicit_child_mr(struct mlx5_ib_mr *mr, bool need_imr_xlt) · 16 unmodified lines
222	WARN_ON(atomic_read(&mr->num_deferred_work));	222	WARN_ON(atomic_read(&mr->num_deferred_work));
223		223
224	if (need_imr_xlt) {	224	if (need_imr_xlt) {
225	srcu_key = srcu_read_lock(&mr->dev->odp_srcu);	225	srcu_key = srcu_read_lock(&mr_to_mdev(mr)->odp_srcu);
226	mutex_lock(&odp_imr->umem_mutex);	226	mutex_lock(&odp_imr->umem_mutex);
227	mlx5_ib_update_xlt(mr->parent, idx, 1, 0,	227	mlx5_ib_update_xlt(mr->parent, idx, 1, 0,
228	MLX5_IB_UPD_XLT_INDIRECT \|	228	MLX5_IB_UPD_XLT_INDIRECT \|
229	MLX5_IB_UPD_XLT_ATOMIC);	229	MLX5_IB_UPD_XLT_ATOMIC);
230	mutex_unlock(&odp_imr->umem_mutex);	230	mutex_unlock(&odp_imr->umem_mutex);
231	srcu_read_unlock(&mr->dev->odp_srcu, srcu_key);	231	srcu_read_unlock(&mr_to_mdev(mr)->odp_srcu, srcu_key);
232	}	232	}
233		233
234	dma_fence_odp_mr(mr);	234	dma_fence_odp_mr(mr);
235		235
236	mr->parent = NULL;	236	mr->parent = NULL;
237	mlx5_mr_cache_free(mr->dev, mr);	237	mlx5_mr_cache_free(mr_to_mdev(mr), mr);
238	ib_umem_odp_release(odp);	238	ib_umem_odp_release(odp);
239	if (atomic_dec_and_test(&imr->num_deferred_work))	239	if (atomic_dec_and_test(&imr->num_deferred_work))
240	wake_up(&imr->q_deferred_work);	240	wake_up(&imr->q_deferred_work);
@@ -274,7 +274,7 @@ static void destroy_unused_implicit_child_mr(struct mlx5_ib_mr *mr) · 33 unmodified lines
274	goto out_unlock;	274	goto out_unlock;
275		275
276	atomic_inc(&imr->num_deferred_work);	276	atomic_inc(&imr->num_deferred_work);
277	call_srcu(&mr->dev->odp_srcu, &mr->odp_destroy.rcu,	277	call_srcu(&mr_to_mdev(mr)->odp_srcu, &mr->odp_destroy.rcu,
278	free_implicit_child_mr_rcu);	278	free_implicit_child_mr_rcu);
279		279
280	out_unlock:	280	out_unlock:
@@ -476,12 +476,13 @@ static struct mlx5_ib_mr implicit_get_child_mr(struct mlx5_ib_mr imr, · 195 unmodified lines
476	if (IS_ERR(odp))	476	if (IS_ERR(odp))
477	return ERR_CAST(odp);	477	return ERR_CAST(odp);
478		478
479	ret = mr = mlx5_mr_cache_alloc(imr->dev, MLX5_IMR_MTT_CACHE_ENTRY,	479	ret = mr = mlx5_mr_cache_alloc(
480	imr->access_flags);	480	mr_to_mdev(imr), MLX5_IMR_MTT_CACHE_ENTRY, imr->access_flags);
481	if (IS_ERR(mr))	481	if (IS_ERR(mr))
482	goto out_umem;	482	goto out_umem;
483		483
484	mr->ibmr.pd = imr->ibmr.pd;	484	mr->ibmr.pd = imr->ibmr.pd;
		485	mr->ibmr.device = &mr_to_mdev(imr)->ib_dev;
485	mr->umem = &odp->umem;	486	mr->umem = &odp->umem;
486	mr->ibmr.lkey = mr->mmkey.key;	487	mr->ibmr.lkey = mr->mmkey.key;
487	mr->ibmr.rkey = mr->mmkey.key;	488	mr->ibmr.rkey = mr->mmkey.key;
@@ -517,11 +518,11 @@ static struct mlx5_ib_mr implicit_get_child_mr(struct mlx5_ib_mr imr, · 29 unmodified lines
517	goto out_mr;	518	goto out_mr;
518	}	519	}
519		520
520	mlx5_ib_dbg(imr->dev, "key %x mr %p\n", mr->mmkey.key, mr);	521	mlx5_ib_dbg(mr_to_mdev(imr), "key %x mr %p\n", mr->mmkey.key, mr);
521	return mr;	522	return mr;
522		523
523	out_mr:	524	out_mr:
524	mlx5_mr_cache_free(imr->dev, mr);	525	mlx5_mr_cache_free(mr_to_mdev(imr), mr);
525	out_umem:	526	out_umem:
526	ib_umem_odp_release(odp);	527	ib_umem_odp_release(odp);
527	return ret;	528	return ret;
@@ -536,6 +537,10 @@ struct mlx5_ib_mr mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd pd, · 8 unmodified lines
536	struct mlx5_ib_mr *imr;	537	struct mlx5_ib_mr *imr;
537	int err;	538	int err;
538		539
		540	if (!mlx5_ib_can_load_pas_with_umr(dev,
		541	MLX5_IMR_MTT_ENTRIES * PAGE_SIZE))
		542	return ERR_PTR(-EOPNOTSUPP);
		543
539	umem_odp = ib_umem_odp_alloc_implicit(&dev->ib_dev, access_flags);	544	umem_odp = ib_umem_odp_alloc_implicit(&dev->ib_dev, access_flags);
540	if (IS_ERR(umem_odp))	545	if (IS_ERR(umem_odp))
541	return ERR_CAST(umem_odp);	546	return ERR_CAST(umem_odp);
@@ -551,6 +556,7 @@ struct mlx5_ib_mr mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd pd, · 9 unmodified lines
551	imr->umem = &umem_odp->umem;	556	imr->umem = &umem_odp->umem;
552	imr->ibmr.lkey = imr->mmkey.key;	557	imr->ibmr.lkey = imr->mmkey.key;
553	imr->ibmr.rkey = imr->mmkey.key;	558	imr->ibmr.rkey = imr->mmkey.key;
		559	imr->ibmr.device = &dev->ib_dev;
554	imr->umem = &umem_odp->umem;	560	imr->umem = &umem_odp->umem;
555	imr->is_odp_implicit = true;	561	imr->is_odp_implicit = true;
556	atomic_set(&imr->num_deferred_work, 0);	562	atomic_set(&imr->num_deferred_work, 0);
@@ -584,7 +590,7 @@ out_umem: · 27 unmodified lines
584	void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr)	590	void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr)
585	{	591	{
586	struct ib_umem_odp *odp_imr = to_ib_umem_odp(imr->umem);	592	struct ib_umem_odp *odp_imr = to_ib_umem_odp(imr->umem);
587	struct mlx5_ib_dev *dev = imr->dev;	593	struct mlx5_ib_dev *dev = mr_to_mdev(imr);
588	struct list_head destroy_list;	594	struct list_head destroy_list;
589	struct mlx5_ib_mr *mtt;	595	struct mlx5_ib_mr *mtt;
590	struct mlx5_ib_mr *tmp;	596	struct mlx5_ib_mr *tmp;
@@ -654,10 +660,10 @@ void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr) · 63 unmodified lines
654	void mlx5_ib_fence_odp_mr(struct mlx5_ib_mr *mr)	660	void mlx5_ib_fence_odp_mr(struct mlx5_ib_mr *mr)
655	{	661	{
656	/* Prevent new page faults and prefetch requests from succeeding */	662	/* Prevent new page faults and prefetch requests from succeeding */
657	xa_erase(&mr->dev->odp_mkeys, mlx5_base_mkey(mr->mmkey.key));	663	xa_erase(&mr_to_mdev(mr)->odp_mkeys, mlx5_base_mkey(mr->mmkey.key));
658		664
659	/* Wait for all running page-fault handlers to finish. */	665	/* Wait for all running page-fault handlers to finish. */
660	synchronize_srcu(&mr->dev->odp_srcu);	666	synchronize_srcu(&mr_to_mdev(mr)->odp_srcu);
661		667
662	wait_event(mr->q_deferred_work, !atomic_read(&mr->num_deferred_work));	668	wait_event(mr->q_deferred_work, !atomic_read(&mr->num_deferred_work));
663		669
@@ -701,7 +707,7 @@ static int pagefault_real_mr(struct mlx5_ib_mr mr, struct ib_umem_odp odp, · 37 unmodified lines
701		707
702	if (ret < 0) {	708	if (ret < 0) {
703	if (ret != -EAGAIN)	709	if (ret != -EAGAIN)
704	mlx5_ib_err(mr->dev,	710	mlx5_ib_err(mr_to_mdev(mr),
705	"Failed to update mkey page tables\n");	711	"Failed to update mkey page tables\n");
706	goto out;	712	goto out;
707	}	713	}
@@ -791,7 +797,7 @@ out: · 83 unmodified lines
791	MLX5_IB_UPD_XLT_ATOMIC);	797	MLX5_IB_UPD_XLT_ATOMIC);
792	mutex_unlock(&odp_imr->umem_mutex);	798	mutex_unlock(&odp_imr->umem_mutex);
793	if (err) {	799	if (err) {
794	mlx5_ib_err(imr->dev, "Failed to update PAS\n");	800	mlx5_ib_err(mr_to_mdev(imr), "Failed to update PAS\n");
795	return err;	801	return err;
796	}	802	}
797	return ret;	803	return ret;
@@ -811,7 +817,7 @@ static int pagefault_mr(struct mlx5_ib_mr *mr, u64 io_virt, size_t bcnt, · 13 unmodified lines
811	{	817	{
812	struct ib_umem_odp *odp = to_ib_umem_odp(mr->umem);	818	struct ib_umem_odp *odp = to_ib_umem_odp(mr->umem);
813		819
814	lockdep_assert_held(&mr->dev->odp_srcu);	820	lockdep_assert_held(&mr_to_mdev(mr)->odp_srcu);
815	if (unlikely(io_virt < mr->mmkey.iova))	821	if (unlikely(io_virt < mr->mmkey.iova))
816	return -EFAULT;	822	return -EFAULT;
817		823
@@ -831,17 +837,13 @@ static int pagefault_mr(struct mlx5_ib_mr *mr, u64 io_virt, size_t bcnt, · 13 unmodified lines
831	flags);	837	flags);
832	}	838	}
833		839
834	int mlx5_ib_init_odp_mr(struct mlx5_ib_mr *mr, bool enable)	840	int mlx5_ib_init_odp_mr(struct mlx5_ib_mr *mr)
835	{	841	{
836	u32 flags = MLX5_PF_FLAGS_SNAPSHOT;
837	int ret;	842	int ret;
838		843
839	if (enable)	844	ret = pagefault_real_mr(mr, to_ib_umem_odp(mr->umem), mr->umem->address,
840	flags \|= MLX5_PF_FLAGS_ENABLE;	845	mr->umem->length, NULL,
841		846	MLX5_PF_FLAGS_SNAPSHOT \| MLX5_PF_FLAGS_ENABLE);
842	ret = pagefault_real_mr(mr, to_ib_umem_odp(mr->umem),
843	mr->umem->address, mr->umem->length, NULL,
844	flags);
845	return ret >= 0 ? 0 : ret;	847	return ret >= 0 ? 0 : ret;
846	}	848	}
847		849
@@ -1783,7 +1785,7 @@ static void mlx5_ib_prefetch_mr_work(struct work_struct *w) · 935 unmodified lines
1783		1785
1784	/* We rely on IB/core that work is executed if we have num_sge != 0 only. */	1786	/* We rely on IB/core that work is executed if we have num_sge != 0 only. */
1785	WARN_ON(!work->num_sge);	1787	WARN_ON(!work->num_sge);
1786	dev = work->frags[0].mr->dev;	1788	dev = mr_to_mdev(work->frags[0].mr);
1787	/* SRCU should be held when calling to mlx5_odp_populate_xlt() */	1789	/* SRCU should be held when calling to mlx5_odp_populate_xlt() */
1788	srcu_key = srcu_read_lock(&dev->odp_srcu);	1790	srcu_key = srcu_read_lock(&dev->odp_srcu);
1789	for (i = 0; i < work->num_sge; ++i) {	1791	for (i = 0; i < work->num_sge; ++i) {

drivers/infiniband/hw/mlx5/qp.c+89−108

@@ -778,39 +778,6 @@ int bfregn_to_uar_index(struct mlx5_ib_dev *dev, · 777 unmodified lines
778	return bfregi->sys_pages[index_of_sys_page] + offset;	778	return bfregi->sys_pages[index_of_sys_page] + offset;
779	}	779	}
780		780
781	static int mlx5_ib_umem_get(struct mlx5_ib_dev dev, struct ib_udata udata,
782	unsigned long addr, size_t size,
783	struct ib_umem *umem, int npages, int *page_shift,
784	int ncont, u32 offset)
785	{
786	int err;
787
788	*umem = ib_umem_get(&dev->ib_dev, addr, size, 0);
789	if (IS_ERR(*umem)) {
790	mlx5_ib_dbg(dev, "umem_get failed\n");
791	return PTR_ERR(*umem);
792	}
793
794	mlx5_ib_cont_pages(*umem, addr, 0, npages, page_shift, ncont, NULL);
795
796	err = mlx5_ib_get_buf_offset(addr, *page_shift, offset);
797	if (err) {
798	mlx5_ib_warn(dev, "bad offset\n");
799	goto err_umem;
800	}
801
802	mlx5_ib_dbg(dev, "addr 0x%lx, size %zu, npages %d, page_shift %d, ncont %d, offset %d\n",
803	addr, size, npages, page_shift, ncont, offset);
804
805	return 0;
806
807	err_umem:
808	ib_umem_release(*umem);
809	*umem = NULL;
810
811	return err;
812	}
813
814	static void destroy_user_rq(struct mlx5_ib_dev dev, struct ib_pd pd,	781	static void destroy_user_rq(struct mlx5_ib_dev dev, struct ib_pd pd,
815	struct mlx5_ib_rwq rwq, struct ib_udata udata)	782	struct mlx5_ib_rwq rwq, struct ib_udata udata)
816	{	783	{
@@ -833,10 +800,8 @@ static int create_user_rq(struct mlx5_ib_dev dev, struct ib_pd pd, · 16 unmodified lines
833	{	800	{
834	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(	801	struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
835	udata, struct mlx5_ib_ucontext, ibucontext);	802	udata, struct mlx5_ib_ucontext, ibucontext);
836	int page_shift = 0;	803	unsigned long page_size = 0;
837	int npages;
838	u32 offset = 0;	804	u32 offset = 0;
839	int ncont = 0;
840	int err;	805	int err;
841		806
842	if (!ucmd->buf_addr)	807	if (!ucmd->buf_addr)
@@ -849,23 +814,26 @@ static int create_user_rq(struct mlx5_ib_dev dev, struct ib_pd pd, · 6 unmodified lines
849	return err;	814	return err;
850	}	815	}
851		816
852	mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &npages, &page_shift,	817	page_size = mlx5_umem_find_best_quantized_pgoff(
853	&ncont, NULL);	818	rwq->umem, wq, log_wq_pg_sz, MLX5_ADAPTER_PAGE_SHIFT,
854	err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift,	819	page_offset, 64, &rwq->rq_page_offset);
855	&rwq->rq_page_offset);	820	if (!page_size) {
856	if (err) {
857	mlx5_ib_warn(dev, "bad offset\n");	821	mlx5_ib_warn(dev, "bad offset\n");
		822	err = -EINVAL;
858	goto err_umem;	823	goto err_umem;
859	}	824	}
860		825
861	rwq->rq_num_pas = ncont;	826	rwq->rq_num_pas = ib_umem_num_dma_blocks(rwq->umem, page_size);
862	rwq->page_shift = page_shift;	827	rwq->page_shift = order_base_2(page_size);
863	rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT;	828	rwq->log_page_size = rwq->page_shift - MLX5_ADAPTER_PAGE_SHIFT;
864	rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE);	829	rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE);
865		830
866	mlx5_ib_dbg(dev, "addr 0x%llx, size %zd, npages %d, page_shift %d, ncont %d, offset %d\n",	831	mlx5_ib_dbg(
867	(unsigned long long)ucmd->buf_addr, rwq->buf_size,	832	dev,
868	npages, page_shift, ncont, offset);	833	"addr 0x%llx, size %zd, npages %zu, page_size %ld, ncont %d, offset %d\n",
		834	(unsigned long long)ucmd->buf_addr, rwq->buf_size,
		835	ib_umem_num_pages(rwq->umem), page_size, rwq->rq_num_pas,
		836	offset);
869		837
870	err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db);	838	err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db);
871	if (err) {	839	if (err) {
@@ -896,10 +864,9 @@ static int _create_user_qp(struct mlx5_ib_dev dev, struct ib_pd pd, · 24 unmodified lines
896	{	864	{
897	struct mlx5_ib_ucontext *context;	865	struct mlx5_ib_ucontext *context;
898	struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer;	866	struct mlx5_ib_ubuffer *ubuffer = &base->ubuffer;
899	int page_shift = 0;	867	unsigned int page_offset_quantized = 0;
		868	unsigned long page_size = 0;
900	int uar_index = 0;	869	int uar_index = 0;
901	int npages;
902	u32 offset = 0;
903	int bfregn;	870	int bfregn;
904	int ncont = 0;	871	int ncont = 0;
905	__be64 *pas;	872	__be64 *pas;
@@ -950,11 +917,21 @@ static int _create_user_qp(struct mlx5_ib_dev dev, struct ib_pd pd, · 44 unmodified lines
950		917
951	if (ucmd->buf_addr && ubuffer->buf_size) {	918	if (ucmd->buf_addr && ubuffer->buf_size) {
952	ubuffer->buf_addr = ucmd->buf_addr;	919	ubuffer->buf_addr = ucmd->buf_addr;
953	err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr,	920	ubuffer->umem = ib_umem_get(&dev->ib_dev, ubuffer->buf_addr,
954	ubuffer->buf_size, &ubuffer->umem,	921	ubuffer->buf_size, 0);
955	&npages, &page_shift, &ncont, &offset);	922	if (IS_ERR(ubuffer->umem)) {
956	if (err)	923	err = PTR_ERR(ubuffer->umem);
957	goto err_bfreg;	924	goto err_bfreg;
		925	}
		926	page_size = mlx5_umem_find_best_quantized_pgoff(
		927	ubuffer->umem, qpc, log_page_size,
		928	MLX5_ADAPTER_PAGE_SHIFT, page_offset, 64,
		929	&page_offset_quantized);
		930	if (!page_size) {
		931	err = -EINVAL;
		932	goto err_umem;
		933	}
		934	ncont = ib_umem_num_dma_blocks(ubuffer->umem, page_size);
958	} else {	935	} else {
959	ubuffer->umem = NULL;	936	ubuffer->umem = NULL;
960	}	937	}
@@ -969,15 +946,14 @@ static int _create_user_qp(struct mlx5_ib_dev dev, struct ib_pd pd, · 8 unmodified lines
969		946
970	uid = (attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0;	947	uid = (attr->qp_type != IB_QPT_XRC_INI) ? to_mpd(pd)->uid : 0;
971	MLX5_SET(create_qp_in, *in, uid, uid);	948	MLX5_SET(create_qp_in, *in, uid, uid);
972	pas = (__be64 )MLX5_ADDR_OF(create_qp_in, in, pas);
973	if (ubuffer->umem)
974	mlx5_ib_populate_pas(dev, ubuffer->umem, page_shift, pas, 0);
975
976	qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);	949	qpc = MLX5_ADDR_OF(create_qp_in, *in, qpc);
977		950	pas = (__be64 )MLX5_ADDR_OF(create_qp_in, in, pas);
978	MLX5_SET(qpc, qpc, log_page_size, page_shift - MLX5_ADAPTER_PAGE_SHIFT);	951	if (ubuffer->umem) {
979	MLX5_SET(qpc, qpc, page_offset, offset);	952	mlx5_ib_populate_pas(ubuffer->umem, page_size, pas, 0);
980		953	MLX5_SET(qpc, qpc, log_page_size,
		954	order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
		955	MLX5_SET(qpc, qpc, page_offset, page_offset_quantized);
		956	}
981	MLX5_SET(qpc, qpc, uar_page, uar_index);	957	MLX5_SET(qpc, qpc, uar_page, uar_index);
982	if (bfregn != MLX5_IB_INVALID_BFREG)	958	if (bfregn != MLX5_IB_INVALID_BFREG)
983	resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn);	959	resp->bfreg_index = adjust_bfregn(dev, &context->bfregi, bfregn);
@@ -1209,18 +1185,24 @@ static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, · 225 unmodified lines
1209	void *wq;	1185	void *wq;
1210	int inlen;	1186	int inlen;
1211	int err;	1187	int err;
1212	int page_shift = 0;	1188	unsigned int page_offset_quantized;
1213	int npages;	1189	unsigned long page_size;
1214	int ncont = 0;	1190
1215	u32 offset = 0;	1191	sq->ubuffer.umem = ib_umem_get(&dev->ib_dev, ubuffer->buf_addr,
1216		1192	ubuffer->buf_size, 0);
1217	err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size,	1193	if (IS_ERR(sq->ubuffer.umem))
1218	&sq->ubuffer.umem, &npages, &page_shift, &ncont,	1194	return PTR_ERR(sq->ubuffer.umem);
1219	&offset);	1195	page_size = mlx5_umem_find_best_quantized_pgoff(
1220	if (err)	1196	ubuffer->umem, wq, log_wq_pg_sz, MLX5_ADAPTER_PAGE_SHIFT,
1221	return err;	1197	page_offset, 64, &page_offset_quantized);
		1198	if (!page_size) {
		1199	err = -EINVAL;
		1200	goto err_umem;
		1201	}
1222		1202
1223	inlen = MLX5_ST_SZ_BYTES(create_sq_in) + sizeof(u64) * ncont;	1203	inlen = MLX5_ST_SZ_BYTES(create_sq_in) +
		1204	sizeof(u64) *
		1205	ib_umem_num_dma_blocks(sq->ubuffer.umem, page_size);
1224	in = kvzalloc(inlen, GFP_KERNEL);	1206	in = kvzalloc(inlen, GFP_KERNEL);
1225	if (!in) {	1207	if (!in) {
1226	err = -ENOMEM;	1208	err = -ENOMEM;
@@ -1248,11 +1230,12 @@ static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev, · 21 unmodified lines
1248	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));	1230	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
1249	MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB));	1231	MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB));
1250	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size));	1232	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size));
1251	MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT);	1233	MLX5_SET(wq, wq, log_wq_pg_sz,
1252	MLX5_SET(wq, wq, page_offset, offset);	1234	order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
		1235	MLX5_SET(wq, wq, page_offset, page_offset_quantized);
1253		1236
1254	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);	1237	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
1255	mlx5_ib_populate_pas(dev, sq->ubuffer.umem, page_shift, pas, 0);	1238	mlx5_ib_populate_pas(sq->ubuffer.umem, page_size, pas, 0);
1256		1239
1257	err = mlx5_core_create_sq_tracked(dev, in, inlen, &sq->base.mqp);	1240	err = mlx5_core_create_sq_tracked(dev, in, inlen, &sq->base.mqp);
1258		1241
@@ -1278,40 +1261,31 @@ static void destroy_raw_packet_qp_sq(struct mlx5_ib_dev *dev, · 19 unmodified lines
1278	ib_umem_release(sq->ubuffer.umem);	1261	ib_umem_release(sq->ubuffer.umem);
1279	}	1262	}
1280		1263
1281	static size_t get_rq_pas_size(void *qpc)
1282	{
1283	u32 log_page_size = MLX5_GET(qpc, qpc, log_page_size) + 12;
1284	u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride);
1285	u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size);
1286	u32 page_offset = MLX5_GET(qpc, qpc, page_offset);
1287	u32 po_quanta = 1 << (log_page_size - 6);
1288	u32 rq_sz = 1 << (log_rq_size + 4 + log_rq_stride);
1289	u32 page_size = 1 << log_page_size;
1290	u32 rq_sz_po = rq_sz + (page_offset * po_quanta);
1291	u32 rq_num_pas = (rq_sz_po + page_size - 1) / page_size;
1292
1293	return rq_num_pas * sizeof(u64);
1294	}
1295
1296	static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev,	1264	static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev,
1297	struct mlx5_ib_rq rq, void qpin,	1265	struct mlx5_ib_rq rq, void qpin,
1298	size_t qpinlen, struct ib_pd *pd)	1266	struct ib_pd *pd)
1299	{	1267	{
1300	struct mlx5_ib_qp *mqp = rq->base.container_mibqp;	1268	struct mlx5_ib_qp *mqp = rq->base.container_mibqp;
1301	__be64 *pas;	1269	__be64 *pas;
1302	__be64 *qp_pas;
1303	void *in;	1270	void *in;
1304	void *rqc;	1271	void *rqc;
1305	void *wq;	1272	void *wq;
1306	void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);	1273	void *qpc = MLX5_ADDR_OF(create_qp_in, qpin, qpc);
1307	size_t rq_pas_size = get_rq_pas_size(qpc);	1274	struct ib_umem *umem = rq->base.ubuffer.umem;
		1275	unsigned int page_offset_quantized;
		1276	unsigned long page_size = 0;
1308	size_t inlen;	1277	size_t inlen;
1309	int err;	1278	int err;
1310		1279
1311	if (qpinlen < rq_pas_size + MLX5_BYTE_OFF(create_qp_in, pas))	1280	page_size = mlx5_umem_find_best_quantized_pgoff(umem, wq, log_wq_pg_sz,
		1281	MLX5_ADAPTER_PAGE_SHIFT,
		1282	page_offset, 64,
		1283	&page_offset_quantized);
		1284	if (!page_size)
1312	return -EINVAL;	1285	return -EINVAL;
1313		1286
1314	inlen = MLX5_ST_SZ_BYTES(create_rq_in) + rq_pas_size;	1287	inlen = MLX5_ST_SZ_BYTES(create_rq_in) +
		1288	sizeof(u64) * ib_umem_num_dma_blocks(umem, page_size);
1315	in = kvzalloc(inlen, GFP_KERNEL);	1289	in = kvzalloc(inlen, GFP_KERNEL);
1316	if (!in)	1290	if (!in)
1317	return -ENOMEM;	1291	return -ENOMEM;
@@ -1333,16 +1307,16 @@ static int create_raw_packet_qp_rq(struct mlx5_ib_dev *dev, · 15 unmodified lines
1333	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);	1307	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);
1334	if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING)	1308	if (rq->flags & MLX5_IB_RQ_PCI_WRITE_END_PADDING)
1335	MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);	1309	MLX5_SET(wq, wq, end_padding_mode, MLX5_WQ_END_PAD_MODE_ALIGN);
1336	MLX5_SET(wq, wq, page_offset, MLX5_GET(qpc, qpc, page_offset));	1310	MLX5_SET(wq, wq, page_offset, page_offset_quantized);
1337	MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));	1311	MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd));
1338	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));	1312	MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
1339	MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4);	1313	MLX5_SET(wq, wq, log_wq_stride, MLX5_GET(qpc, qpc, log_rq_stride) + 4);
1340	MLX5_SET(wq, wq, log_wq_pg_sz, MLX5_GET(qpc, qpc, log_page_size));	1314	MLX5_SET(wq, wq, log_wq_pg_sz,
		1315	order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
1341	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size));	1316	MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_rq_size));
1342		1317
1343	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);	1318	pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
1344	qp_pas = (__be64 *)MLX5_ADDR_OF(create_qp_in, qpin, pas);	1319	mlx5_ib_populate_pas(umem, page_size, pas, 0);
1345	memcpy(pas, qp_pas, rq_pas_size);
1346		1320
1347	err = mlx5_core_create_rq_tracked(dev, in, inlen, &rq->base.mqp);	1321	err = mlx5_core_create_rq_tracked(dev, in, inlen, &rq->base.mqp);
1348		1322
@@ -1463,7 +1437,7 @@ static int create_raw_packet_qp(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 114 unmodified lines
1463	rq->flags \|= MLX5_IB_RQ_CVLAN_STRIPPING;	1437	rq->flags \|= MLX5_IB_RQ_CVLAN_STRIPPING;
1464	if (qp->flags & IB_QP_CREATE_PCI_WRITE_END_PADDING)	1438	if (qp->flags & IB_QP_CREATE_PCI_WRITE_END_PADDING)
1465	rq->flags \|= MLX5_IB_RQ_PCI_WRITE_END_PADDING;	1439	rq->flags \|= MLX5_IB_RQ_PCI_WRITE_END_PADDING;
1466	err = create_raw_packet_qp_rq(dev, rq, in, inlen, pd);	1440	err = create_raw_packet_qp_rq(dev, rq, in, pd);
1467	if (err)	1441	if (err)
1468	goto err_destroy_sq;	1442	goto err_destroy_sq;
1469		1443
@@ -2436,7 +2410,7 @@ static int create_dct(struct mlx5_ib_dev dev, struct ib_pd pd, · 966 unmodified lines
2436	}	2410	}
2437		2411
2438	qp->state = IB_QPS_RESET;	2412	qp->state = IB_QPS_RESET;
2439		2413	rdma_restrack_no_track(&qp->ibqp.res);
2440	return 0;	2414	return 0;
2441	}	2415	}
2442		2416
@@ -2460,6 +2434,7 @@ static int check_qp_type(struct mlx5_ib_dev dev, struct ib_qp_init_attr attr, · 17 unmodified lines
2460	case IB_QPT_GSI:	2434	case IB_QPT_GSI:
2461	if (dev->profile == &raw_eth_profile)	2435	if (dev->profile == &raw_eth_profile)
2462	goto out;	2436	goto out;
		2437	fallthrough;
2463	case IB_QPT_RAW_PACKET:	2438	case IB_QPT_RAW_PACKET:
2464	case IB_QPT_UD:	2439	case IB_QPT_UD:
2465	case MLX5_IB_QPT_REG_UMR:	2440	case MLX5_IB_QPT_REG_UMR:
@@ -2712,11 +2687,12 @@ static int process_create_flags(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 246 unmodified lines
2712	process_create_flag(dev, &create_flags, MLX5_IB_QP_CREATE_SQPN_QP1,	2687	process_create_flag(dev, &create_flags, MLX5_IB_QP_CREATE_SQPN_QP1,
2713	true, qp);	2688	true, qp);
2714		2689
2715	if (create_flags)	2690	if (create_flags) {
2716	mlx5_ib_dbg(dev, "Create QP has unsupported flags 0x%X\n",	2691	mlx5_ib_dbg(dev, "Create QP has unsupported flags 0x%X\n",
2717	create_flags);	2692	create_flags);
2718		2693	return -EOPNOTSUPP;
2719	return (create_flags) ? -EINVAL : 0;	2694	}
		2695	return 0;
2720	}	2696	}
2721		2697
2722	static int process_udata_size(struct mlx5_ib_dev *dev,	2698	static int process_udata_size(struct mlx5_ib_dev *dev,
@@ -3102,7 +3078,7 @@ static int ib_to_mlx5_rate_map(u8 rate) · 379 unmodified lines
3102	return 5;	3078	return 5;
3103	default:	3079	default:
3104	return rate + MLX5_STAT_RATE_OFFSET;	3080	return rate + MLX5_STAT_RATE_OFFSET;
3105	};	3081	}
3106		3082
3107	return 0;	3083	return 0;
3108	}	3084	}
@@ -4247,6 +4223,9 @@ int mlx5_ib_modify_qp(struct ib_qp ibqp, struct ib_qp_attr attr, · 1138 unmodified lines
4247	int err = -EINVAL;	4223	int err = -EINVAL;
4248	int port;	4224	int port;
4249		4225
		4226	if (attr_mask & ~(IB_QP_ATTR_STANDARD_BITS \| IB_QP_RATE_LIMIT))
		4227	return -EOPNOTSUPP;
		4228
4250	if (ibqp->rwq_ind_tbl)	4229	if (ibqp->rwq_ind_tbl)
4251	return -ENOSYS;	4230	return -ENOSYS;
4252		4231
@@ -4576,7 +4555,9 @@ static int query_qp_attr(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 323 unmodified lines
4576	pri_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path);	4555	pri_path = MLX5_ADDR_OF(qpc, qpc, primary_address_path);
4577	alt_path = MLX5_ADDR_OF(qpc, qpc, secondary_address_path);	4556	alt_path = MLX5_ADDR_OF(qpc, qpc, secondary_address_path);
4578		4557
4579	if (qp->ibqp.qp_type == IB_QPT_RC \|\| qp->ibqp.qp_type == IB_QPT_UC) {	4558	if (qp->ibqp.qp_type == IB_QPT_RC \|\| qp->ibqp.qp_type == IB_QPT_UC \|\|
		4559	qp->ibqp.qp_type == IB_QPT_XRC_INI \|\|
		4560	qp->ibqp.qp_type == IB_QPT_XRC_TGT) {
4580	to_rdma_ah_attr(dev, &qp_attr->ah_attr, pri_path);	4561	to_rdma_ah_attr(dev, &qp_attr->ah_attr, pri_path);
4581	to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, alt_path);	4562	to_rdma_ah_attr(dev, &qp_attr->alt_ah_attr, alt_path);
4582	qp_attr->alt_pkey_index = MLX5_GET(ads, alt_path, pkey_index);	4563	qp_attr->alt_pkey_index = MLX5_GET(ads, alt_path, pkey_index);
@@ -4882,7 +4863,7 @@ static int create_rq(struct mlx5_ib_rwq rwq, struct ib_pd pd, · 299 unmodified lines
4882	MLX5_SET(rqc, rqc, delay_drop_en, 1);	4863	MLX5_SET(rqc, rqc, delay_drop_en, 1);
4883	}	4864	}
4884	rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);	4865	rq_pas0 = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
4885	mlx5_ib_populate_pas(dev, rwq->umem, rwq->page_shift, rq_pas0, 0);	4866	mlx5_ib_populate_pas(rwq->umem, 1UL << rwq->page_shift, rq_pas0, 0);
4886	err = mlx5_core_create_rq_tracked(dev, in, inlen, &rwq->core_qp);	4867	err = mlx5_core_create_rq_tracked(dev, in, inlen, &rwq->core_qp);
4887	if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) {	4868	if (!err && init_attr->create_flags & IB_WQ_FLAGS_DELAY_DROP) {
4888	err = set_delay_drop(dev);	4869	err = set_delay_drop(dev);

drivers/infiniband/hw/mlx5/restrack.c+1−1

@@ -116,7 +116,7 @@ static int fill_res_mr_entry_raw(struct sk_buff msg, struct ib_mr ibmr) · 115 unmodified lines
116	{	116	{
117	struct mlx5_ib_mr *mr = to_mmr(ibmr);	117	struct mlx5_ib_mr *mr = to_mmr(ibmr);
118		118
119	return fill_res_raw(msg, mr->dev, MLX5_SGMT_TYPE_PRM_QUERY_MKEY,	119	return fill_res_raw(msg, mr_to_mdev(mr), MLX5_SGMT_TYPE_PRM_QUERY_MKEY,
120	mlx5_mkey_to_idx(mr->mmkey.key));	120	mlx5_mkey_to_idx(mr->mmkey.key));
121	}	121	}
122		122

drivers/infiniband/hw/mlx5/srq.c+7−27

@@ -51,10 +51,6 @@ static int create_srq_user(struct ib_pd pd, struct mlx5_ib_srq srq, · 50 unmodified lines
51	udata, struct mlx5_ib_ucontext, ibucontext);	51	udata, struct mlx5_ib_ucontext, ibucontext);
52	size_t ucmdlen;	52	size_t ucmdlen;
53	int err;	53	int err;
54	int npages;
55	int page_shift;
56	int ncont;
57	u32 offset;
58	u32 uidx = MLX5_IB_DEFAULT_UIDX;	54	u32 uidx = MLX5_IB_DEFAULT_UIDX;
59		55
60	ucmdlen = min(udata->inlen, sizeof(ucmd));	56	ucmdlen = min(udata->inlen, sizeof(ucmd));
@@ -86,32 +82,14 @@ static int create_srq_user(struct ib_pd pd, struct mlx5_ib_srq srq, · 25 unmodified lines
86	err = PTR_ERR(srq->umem);	82	err = PTR_ERR(srq->umem);
87	return err;	83	return err;
88	}	84	}
89		85	in->umem = srq->umem;
90	mlx5_ib_cont_pages(srq->umem, ucmd.buf_addr, 0, &npages,
91	&page_shift, &ncont, NULL);
92	err = mlx5_ib_get_buf_offset(ucmd.buf_addr, page_shift,
93	&offset);
94	if (err) {
95	mlx5_ib_warn(dev, "bad offset\n");
96	goto err_umem;
97	}
98
99	in->pas = kvcalloc(ncont, sizeof(*in->pas), GFP_KERNEL);
100	if (!in->pas) {
101	err = -ENOMEM;
102	goto err_umem;
103	}
104
105	mlx5_ib_populate_pas(dev, srq->umem, page_shift, in->pas, 0);
106		86
107	err = mlx5_ib_db_map_user(ucontext, udata, ucmd.db_addr, &srq->db);	87	err = mlx5_ib_db_map_user(ucontext, udata, ucmd.db_addr, &srq->db);
108	if (err) {	88	if (err) {
109	mlx5_ib_dbg(dev, "map doorbell failed\n");	89	mlx5_ib_dbg(dev, "map doorbell failed\n");
110	goto err_in;	90	goto err_umem;
111	}	91	}
112		92
113	in->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT;
114	in->page_offset = offset;
115	in->uid = (in->type != IB_SRQT_XRC) ? to_mpd(pd)->uid : 0;	93	in->uid = (in->type != IB_SRQT_XRC) ? to_mpd(pd)->uid : 0;
116	if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 &&	94	if (MLX5_CAP_GEN(dev->mdev, cqe_version) == MLX5_CQE_VERSION_V1 &&
117	in->type != IB_SRQT_BASIC)	95	in->type != IB_SRQT_BASIC)
@@ -119,9 +97,6 @@ static int create_srq_user(struct ib_pd pd, struct mlx5_ib_srq srq, · 1 unmodified line
119		97
120	return 0;	98	return 0;
121		99
122	err_in:
123	kvfree(in->pas);
124
125	err_umem:	100	err_umem:
126	ib_umem_release(srq->umem);	101	ib_umem_release(srq->umem);
127		102
@@ -226,6 +201,11 @@ int mlx5_ib_create_srq(struct ib_srq *ib_srq, · 98 unmodified lines
226	struct mlx5_srq_attr in = {};	201	struct mlx5_srq_attr in = {};
227	__u32 max_srq_wqes = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz);	202	__u32 max_srq_wqes = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz);
228		203
		204	if (init_attr->srq_type != IB_SRQT_BASIC &&
		205	init_attr->srq_type != IB_SRQT_XRC &&
		206	init_attr->srq_type != IB_SRQT_TM)
		207	return -EOPNOTSUPP;
		208
229	/* Sanity check SRQ size before proceeding */	209	/* Sanity check SRQ size before proceeding */
230	if (init_attr->attr.max_wr >= max_srq_wqes) {	210	if (init_attr->attr.max_wr >= max_srq_wqes) {
231	mlx5_ib_dbg(dev, "max_wr %d, cap %d\n",	211	mlx5_ib_dbg(dev, "max_wr %d, cap %d\n",

drivers/infiniband/hw/mlx5/srq.h+1−0

@@ -28,6 +28,7 @@ struct mlx5_srq_attr { · 27 unmodified lines
28	u32 user_index;	28	u32 user_index;
29	u64 db_record;	29	u64 db_record;
30	__be64 *pas;	30	__be64 *pas;
		31	struct ib_umem *umem;
31	u32 tm_log_list_size;	32	u32 tm_log_list_size;
32	u32 tm_next_tag;	33	u32 tm_next_tag;
33	u32 tm_hw_phase_cnt;	34	u32 tm_hw_phase_cnt;

drivers/infiniband/hw/mlx5/srq_cmd.c+76−4

@@ -92,6 +92,25 @@ struct mlx5_core_srq mlx5_cmd_get_srq(struct mlx5_ib_dev dev, u32 srqn) · 91 unmodified lines
92	return srq;	92	return srq;
93	}	93	}
94		94
		95	static int __set_srq_page_size(struct mlx5_srq_attr *in,
		96	unsigned long page_size)
		97	{
		98	if (!page_size)
		99	return -EINVAL;
		100	in->log_page_size = order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT;
		101
		102	if (WARN_ON(get_pas_size(in) !=
		103	ib_umem_num_dma_blocks(in->umem, page_size) * sizeof(u64)))
		104	return -EINVAL;
		105	return 0;
		106	}
		107
		108	#define set_srq_page_size(in, typ, log_pgsz_fld) \
		109	__set_srq_page_size(in, mlx5_umem_find_best_quantized_pgoff( \
		110	(in)->umem, typ, log_pgsz_fld, \
		111	MLX5_ADAPTER_PAGE_SHIFT, page_offset, \
		112	64, &(in)->page_offset))
		113
95	static int create_srq_cmd(struct mlx5_ib_dev dev, struct mlx5_core_srq srq,	114	static int create_srq_cmd(struct mlx5_ib_dev dev, struct mlx5_core_srq srq,
96	struct mlx5_srq_attr *in)	115	struct mlx5_srq_attr *in)
97	{	116	{
@@ -103,6 +122,12 @@ static int create_srq_cmd(struct mlx5_ib_dev dev, struct mlx5_core_srq srq, · 5 unmodified lines
103	int inlen;	122	int inlen;
104	int err;	123	int err;
105		124
		125	if (in->umem) {
		126	err = set_srq_page_size(in, srqc, log_page_size);
		127	if (err)
		128	return err;
		129	}
		130
106	pas_size = get_pas_size(in);	131	pas_size = get_pas_size(in);
107	inlen = MLX5_ST_SZ_BYTES(create_srq_in) + pas_size;	132	inlen = MLX5_ST_SZ_BYTES(create_srq_in) + pas_size;
108	create_in = kvzalloc(inlen, GFP_KERNEL);	133	create_in = kvzalloc(inlen, GFP_KERNEL);
@@ -114,7 +139,13 @@ static int create_srq_cmd(struct mlx5_ib_dev dev, struct mlx5_core_srq srq, · 5 unmodified lines
114	pas = MLX5_ADDR_OF(create_srq_in, create_in, pas);	139	pas = MLX5_ADDR_OF(create_srq_in, create_in, pas);
115		140
116	set_srqc(srqc, in);	141	set_srqc(srqc, in);
117	memcpy(pas, in->pas, pas_size);	142	if (in->umem)
		143	mlx5_ib_populate_pas(
		144	in->umem,
		145	1UL << (in->log_page_size + MLX5_ADAPTER_PAGE_SHIFT),
		146	pas, 0);
		147	else
		148	memcpy(pas, in->pas, pas_size);
118		149
119	MLX5_SET(create_srq_in, create_in, opcode,	150	MLX5_SET(create_srq_in, create_in, opcode,
120	MLX5_CMD_OP_CREATE_SRQ);	151	MLX5_CMD_OP_CREATE_SRQ);
@@ -194,6 +225,12 @@ static int create_xrc_srq_cmd(struct mlx5_ib_dev *dev, · 73 unmodified lines
194	int inlen;	225	int inlen;
195	int err;	226	int err;
196		227
		228	if (in->umem) {
		229	err = set_srq_page_size(in, xrc_srqc, log_page_size);
		230	if (err)
		231	return err;
		232	}
		233
197	pas_size = get_pas_size(in);	234	pas_size = get_pas_size(in);
198	inlen = MLX5_ST_SZ_BYTES(create_xrc_srq_in) + pas_size;	235	inlen = MLX5_ST_SZ_BYTES(create_xrc_srq_in) + pas_size;
199	create_in = kvzalloc(inlen, GFP_KERNEL);	236	create_in = kvzalloc(inlen, GFP_KERNEL);
@@ -207,7 +244,13 @@ static int create_xrc_srq_cmd(struct mlx5_ib_dev *dev, · 7 unmodified lines
207		244
208	set_srqc(xrc_srqc, in);	245	set_srqc(xrc_srqc, in);
209	MLX5_SET(xrc_srqc, xrc_srqc, user_index, in->user_index);	246	MLX5_SET(xrc_srqc, xrc_srqc, user_index, in->user_index);
210	memcpy(pas, in->pas, pas_size);	247	if (in->umem)
		248	mlx5_ib_populate_pas(
		249	in->umem,
		250	1UL << (in->log_page_size + MLX5_ADAPTER_PAGE_SHIFT),
		251	pas, 0);
		252	else
		253	memcpy(pas, in->pas, pas_size);
211	MLX5_SET(create_xrc_srq_in, create_in, opcode,	254	MLX5_SET(create_xrc_srq_in, create_in, opcode,
212	MLX5_CMD_OP_CREATE_XRC_SRQ);	255	MLX5_CMD_OP_CREATE_XRC_SRQ);
213		256
@@ -289,11 +332,18 @@ static int create_rmp_cmd(struct mlx5_ib_dev dev, struct mlx5_core_srq srq, · 75 unmodified lines
289	void *create_in = NULL;	332	void *create_in = NULL;
290	void *rmpc;	333	void *rmpc;
291	void *wq;	334	void *wq;
		335	void *pas;
292	int pas_size;	336	int pas_size;
293	int outlen;	337	int outlen;
294	int inlen;	338	int inlen;
295	int err;	339	int err;
296		340
		341	if (in->umem) {
		342	err = set_srq_page_size(in, wq, log_wq_pg_sz);
		343	if (err)
		344	return err;
		345	}
		346
297	pas_size = get_pas_size(in);	347	pas_size = get_pas_size(in);
298	inlen = MLX5_ST_SZ_BYTES(create_rmp_in) + pas_size;	348	inlen = MLX5_ST_SZ_BYTES(create_rmp_in) + pas_size;
299	outlen = MLX5_ST_SZ_BYTES(create_rmp_out);	349	outlen = MLX5_ST_SZ_BYTES(create_rmp_out);
@@ -309,8 +359,16 @@ static int create_rmp_cmd(struct mlx5_ib_dev dev, struct mlx5_core_srq srq, · 9 unmodified lines
309		359
310	MLX5_SET(rmpc, rmpc, state, MLX5_RMPC_STATE_RDY);	360	MLX5_SET(rmpc, rmpc, state, MLX5_RMPC_STATE_RDY);
311	MLX5_SET(create_rmp_in, create_in, uid, in->uid);	361	MLX5_SET(create_rmp_in, create_in, uid, in->uid);
		362	pas = MLX5_ADDR_OF(rmpc, rmpc, wq.pas);
		363
312	set_wq(wq, in);	364	set_wq(wq, in);
313	memcpy(MLX5_ADDR_OF(rmpc, rmpc, wq.pas), in->pas, pas_size);	365	if (in->umem)
		366	mlx5_ib_populate_pas(
		367	in->umem,
		368	1UL << (in->log_page_size + MLX5_ADAPTER_PAGE_SHIFT),
		369	pas, 0);
		370	else
		371	memcpy(pas, in->pas, pas_size);
314		372
315	MLX5_SET(create_rmp_in, create_in, opcode, MLX5_CMD_OP_CREATE_RMP);	373	MLX5_SET(create_rmp_in, create_in, opcode, MLX5_CMD_OP_CREATE_RMP);
316	err = mlx5_cmd_exec(dev->mdev, create_in, inlen, create_out, outlen);	374	err = mlx5_cmd_exec(dev->mdev, create_in, inlen, create_out, outlen);
@@ -421,10 +479,17 @@ static int create_xrq_cmd(struct mlx5_ib_dev dev, struct mlx5_core_srq srq, · 104 unmodified lines
421	void *create_in;	479	void *create_in;
422	void *xrqc;	480	void *xrqc;
423	void *wq;	481	void *wq;
		482	void *pas;
424	int pas_size;	483	int pas_size;
425	int inlen;	484	int inlen;
426	int err;	485	int err;
427		486
		487	if (in->umem) {
		488	err = set_srq_page_size(in, wq, log_wq_pg_sz);
		489	if (err)
		490	return err;
		491	}
		492
428	pas_size = get_pas_size(in);	493	pas_size = get_pas_size(in);
429	inlen = MLX5_ST_SZ_BYTES(create_xrq_in) + pas_size;	494	inlen = MLX5_ST_SZ_BYTES(create_xrq_in) + pas_size;
430	create_in = kvzalloc(inlen, GFP_KERNEL);	495	create_in = kvzalloc(inlen, GFP_KERNEL);
@@ -433,9 +498,16 @@ static int create_xrq_cmd(struct mlx5_ib_dev dev, struct mlx5_core_srq srq, · 2 unmodified lines
433		498
434	xrqc = MLX5_ADDR_OF(create_xrq_in, create_in, xrq_context);	499	xrqc = MLX5_ADDR_OF(create_xrq_in, create_in, xrq_context);
435	wq = MLX5_ADDR_OF(xrqc, xrqc, wq);	500	wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
		501	pas = MLX5_ADDR_OF(xrqc, xrqc, wq.pas);
436		502
437	set_wq(wq, in);	503	set_wq(wq, in);
438	memcpy(MLX5_ADDR_OF(xrqc, xrqc, wq.pas), in->pas, pas_size);	504	if (in->umem)
		505	mlx5_ib_populate_pas(
		506	in->umem,
		507	1UL << (in->log_page_size + MLX5_ADAPTER_PAGE_SHIFT),
		508	pas, 0);
		509	else
		510	memcpy(pas, in->pas, pas_size);
439		511
440	if (in->type == IB_SRQT_TM) {	512	if (in->type == IB_SRQT_TM) {
441	MLX5_SET(xrqc, xrqc, topology, MLX5_XRQC_TOPOLOGY_TAG_MATCHING);	513	MLX5_SET(xrqc, xrqc, topology, MLX5_XRQC_TOPOLOGY_TAG_MATCHING);

drivers/infiniband/hw/mthca/mthca_cq.c+1−1

@@ -604,7 +604,7 @@ static inline int mthca_poll_one(struct mthca_dev *dev, · 603 unmodified lines
604	entry->byte_len = MTHCA_ATOMIC_BYTE_LEN;	604	entry->byte_len = MTHCA_ATOMIC_BYTE_LEN;
605	break;	605	break;
606	default:	606	default:
607	entry->opcode = MTHCA_OPCODE_INVALID;	607	entry->opcode = 0xFF;
608	break;	608	break;
609	}	609	}
610	} else {	610	} else {

drivers/infiniband/hw/mthca/mthca_dev.h+0−1

@@ -105,7 +105,6 @@ enum { · 104 unmodified lines
105	MTHCA_OPCODE_ATOMIC_CS = 0x11,	105	MTHCA_OPCODE_ATOMIC_CS = 0x11,
106	MTHCA_OPCODE_ATOMIC_FA = 0x12,	106	MTHCA_OPCODE_ATOMIC_FA = 0x12,
107	MTHCA_OPCODE_BIND_MW = 0x18,	107	MTHCA_OPCODE_BIND_MW = 0x18,
108	MTHCA_OPCODE_INVALID = 0xff
109	};	108	};
110		109
111	enum {	110	enum {

drivers/infiniband/hw/mthca/mthca_provider.c+21−40

 	int err;
 	if (init_attr->create_flags)
-		return ERR_PTR(-EINVAL);
+		return ERR_PTR(-EOPNOTSUPP);
 	switch (init_attr->qp_type) {
 	case IB_QPT_RC:
 		udata, struct mthca_ucontext, ibucontext);
 	if (attr->flags)
-		return -EINVAL;
+		return -EOPNOTSUPP;
 	if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
 		return -EINVAL;
 	struct mthca_dev *dev =
 		rdma_device_to_drv_device(device, struct mthca_dev, ib_dev);
-	return sprintf(buf, "%x\n", dev->rev_id);
+	return sysfs_emit(buf, "%x\n", dev->rev_id);
 }
 static DEVICE_ATTR_RO(hw_rev);
-static ssize_t hca_type_show(struct device *device,
+static const char *hca_type_string(int hca_type)
-			     struct device_attribute *attr, char *buf)
 {
-	struct mthca_dev *dev =
+	switch (hca_type) {
-		rdma_device_to_drv_device(device, struct mthca_dev, ib_dev);
-	switch (dev->pdev->device) {
 	case PCI_DEVICE_ID_MELLANOX_TAVOR:
-		return sprintf(buf, "MT23108\n");
+		return "MT23108";
 	case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
-		return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
+		return "MT25208 (MT23108 compat mode)";
 	case PCI_DEVICE_ID_MELLANOX_ARBEL:
-		return sprintf(buf, "MT25208\n");
+		return "MT25208";
 	case PCI_DEVICE_ID_MELLANOX_SINAI:
 	case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
-		return sprintf(buf, "MT25204\n");
+		return "MT25204";
-	default:
-		return sprintf(buf, "unknown\n");
 	}
+	return "unknown";
+}
+static ssize_t hca_type_show(struct device *device,
+			     struct device_attribute *attr, char *buf)
+{
+	struct mthca_dev *dev =
+		rdma_device_to_drv_device(device, struct mthca_dev, ib_dev);
+	return sysfs_emit(buf, "%s\n", hca_type_string(dev->pdev->device));
 }
 static DEVICE_ATTR_RO(hca_type);
 	struct mthca_dev *dev =
 		rdma_device_to_drv_device(device, struct mthca_dev, ib_dev);
-	return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
+	return sysfs_emit(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
 }
 static DEVICE_ATTR_RO(board_id);
 	if (ret)
 		return ret;
-	dev->ib_dev.uverbs_cmd_mask	 =
-		(1ull << IB_USER_VERBS_CMD_GET_CONTEXT)		|
-		(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE)	|
-		(1ull << IB_USER_VERBS_CMD_QUERY_PORT)		|
-		(1ull << IB_USER_VERBS_CMD_ALLOC_PD)		|
-		(1ull << IB_USER_VERBS_CMD_DEALLOC_PD)		|
-		(1ull << IB_USER_VERBS_CMD_REG_MR)		|
-		(1ull << IB_USER_VERBS_CMD_DEREG_MR)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL)	|
-		(1ull << IB_USER_VERBS_CMD_CREATE_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_RESIZE_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_QP)		|
-		(1ull << IB_USER_VERBS_CMD_QUERY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_MODIFY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_ATTACH_MCAST)	|
-		(1ull << IB_USER_VERBS_CMD_DETACH_MCAST);
 	dev->ib_dev.node_type            = RDMA_NODE_IB_CA;
 	dev->ib_dev.phys_port_cnt        = dev->limits.num_ports;
 	dev->ib_dev.num_comp_vectors     = 1;
 	dev->ib_dev.dev.parent           = &dev->pdev->dev;
 	if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
-		dev->ib_dev.uverbs_cmd_mask	|=
-			(1ull << IB_USER_VERBS_CMD_CREATE_SRQ)		|
-			(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ)		|
-			(1ull << IB_USER_VERBS_CMD_QUERY_SRQ)		|
-			(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
 		if (mthca_is_memfree(dev))
 			ib_set_device_ops(&dev->ib_dev,
 					  &mthca_dev_arbel_srq_ops);

drivers/infiniband/hw/mthca/mthca_qp.c+3−0

@@ -863,6 +863,9 @@ int mthca_modify_qp(struct ib_qp ibqp, struct ib_qp_attr attr, int attr_mask, · 862 unmodified lines
863	enum ib_qp_state cur_state, new_state;	863	enum ib_qp_state cur_state, new_state;
864	int err = -EINVAL;	864	int err = -EINVAL;
865		865
		866	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
		867	return -EOPNOTSUPP;
		868
866	mutex_lock(&qp->mutex);	869	mutex_lock(&qp->mutex);
867	if (attr_mask & IB_QP_CUR_STATE) {	870	if (attr_mask & IB_QP_CUR_STATE) {
868	cur_state = attr->cur_qp_state;	871	cur_state = attr->cur_qp_state;

drivers/infiniband/hw/ocrdma/ocrdma_main.c+5−37

@@ -119,7 +119,7 @@ static ssize_t hw_rev_show(struct device *device, · 118 unmodified lines
119	struct ocrdma_dev *dev =	119	struct ocrdma_dev *dev =
120	rdma_device_to_drv_device(device, struct ocrdma_dev, ibdev);	120	rdma_device_to_drv_device(device, struct ocrdma_dev, ibdev);
121		121
122	return scnprintf(buf, PAGE_SIZE, "0x%x\n", dev->nic_info.pdev->vendor);	122	return sysfs_emit(buf, "0x%x\n", dev->nic_info.pdev->vendor);
123	}	123	}
124	static DEVICE_ATTR_RO(hw_rev);	124	static DEVICE_ATTR_RO(hw_rev);
125		125
@@ -129,7 +129,7 @@ static ssize_t hca_type_show(struct device *device, · 3 unmodified lines
129	struct ocrdma_dev *dev =	129	struct ocrdma_dev *dev =
130	rdma_device_to_drv_device(device, struct ocrdma_dev, ibdev);	130	rdma_device_to_drv_device(device, struct ocrdma_dev, ibdev);
131		131
132	return scnprintf(buf, PAGE_SIZE, "%s\n", &dev->model_number[0]);	132	return sysfs_emit(buf, "%s\n", &dev->model_number[0]);
133	}	133	}
134	static DEVICE_ATTR_RO(hca_type);	134	static DEVICE_ATTR_RO(hca_type);
135		135
@@ -154,6 +154,7 @@ static const struct ib_device_ops ocrdma_dev_ops = { · 18 unmodified lines
154	.create_ah = ocrdma_create_ah,	154	.create_ah = ocrdma_create_ah,
155	.create_cq = ocrdma_create_cq,	155	.create_cq = ocrdma_create_cq,
156	.create_qp = ocrdma_create_qp,	156	.create_qp = ocrdma_create_qp,
		157	.create_user_ah = ocrdma_create_ah,
157	.dealloc_pd = ocrdma_dealloc_pd,	158	.dealloc_pd = ocrdma_dealloc_pd,
158	.dealloc_ucontext = ocrdma_dealloc_ucontext,	159	.dealloc_ucontext = ocrdma_dealloc_ucontext,
159	.dereg_mr = ocrdma_dereg_mr,	160	.dereg_mr = ocrdma_dereg_mr,
@@ -204,32 +205,6 @@ static int ocrdma_register_device(struct ocrdma_dev *dev) · 44 unmodified lines
204	BUILD_BUG_ON(sizeof(OCRDMA_NODE_DESC) > IB_DEVICE_NODE_DESC_MAX);	205	BUILD_BUG_ON(sizeof(OCRDMA_NODE_DESC) > IB_DEVICE_NODE_DESC_MAX);
205	memcpy(dev->ibdev.node_desc, OCRDMA_NODE_DESC,	206	memcpy(dev->ibdev.node_desc, OCRDMA_NODE_DESC,
206	sizeof(OCRDMA_NODE_DESC));	207	sizeof(OCRDMA_NODE_DESC));
207	dev->ibdev.uverbs_cmd_mask =
208	OCRDMA_UVERBS(GET_CONTEXT) \|
209	OCRDMA_UVERBS(QUERY_DEVICE) \|
210	OCRDMA_UVERBS(QUERY_PORT) \|
211	OCRDMA_UVERBS(ALLOC_PD) \|
212	OCRDMA_UVERBS(DEALLOC_PD) \|
213	OCRDMA_UVERBS(REG_MR) \|
214	OCRDMA_UVERBS(DEREG_MR) \|
215	OCRDMA_UVERBS(CREATE_COMP_CHANNEL) \|
216	OCRDMA_UVERBS(CREATE_CQ) \|
217	OCRDMA_UVERBS(RESIZE_CQ) \|
218	OCRDMA_UVERBS(DESTROY_CQ) \|
219	OCRDMA_UVERBS(REQ_NOTIFY_CQ) \|
220	OCRDMA_UVERBS(CREATE_QP) \|
221	OCRDMA_UVERBS(MODIFY_QP) \|
222	OCRDMA_UVERBS(QUERY_QP) \|
223	OCRDMA_UVERBS(DESTROY_QP) \|
224	OCRDMA_UVERBS(POLL_CQ) \|
225	OCRDMA_UVERBS(POST_SEND) \|
226	OCRDMA_UVERBS(POST_RECV);
227
228	dev->ibdev.uverbs_cmd_mask \|=
229	OCRDMA_UVERBS(CREATE_AH) \|
230	OCRDMA_UVERBS(MODIFY_AH) \|
231	OCRDMA_UVERBS(QUERY_AH) \|
232	OCRDMA_UVERBS(DESTROY_AH);
233		208
234	dev->ibdev.node_type = RDMA_NODE_IB_CA;	209	dev->ibdev.node_type = RDMA_NODE_IB_CA;
235	dev->ibdev.phys_port_cnt = 1;	210	dev->ibdev.phys_port_cnt = 1;
@@ -240,16 +215,9 @@ static int ocrdma_register_device(struct ocrdma_dev *dev) · 4 unmodified lines
240		215
241	ib_set_device_ops(&dev->ibdev, &ocrdma_dev_ops);	216	ib_set_device_ops(&dev->ibdev, &ocrdma_dev_ops);
242		217
243	if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {	218	if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R)
244	dev->ibdev.uverbs_cmd_mask \|=
245	OCRDMA_UVERBS(CREATE_SRQ) \|
246	OCRDMA_UVERBS(MODIFY_SRQ) \|
247	OCRDMA_UVERBS(QUERY_SRQ) \|
248	OCRDMA_UVERBS(DESTROY_SRQ) \|
249	OCRDMA_UVERBS(POST_SRQ_RECV);
250
251	ib_set_device_ops(&dev->ibdev, &ocrdma_dev_srq_ops);	219	ib_set_device_ops(&dev->ibdev, &ocrdma_dev_srq_ops);
252	}	220
253	rdma_set_device_sysfs_group(&dev->ibdev, &ocrdma_attr_group);	221	rdma_set_device_sysfs_group(&dev->ibdev, &ocrdma_attr_group);
254	ret = ib_device_set_netdev(&dev->ibdev, dev->nic_info.netdev, 1);	222	ret = ib_device_set_netdev(&dev->ibdev, dev->nic_info.netdev, 1);
255	if (ret)	223	if (ret)

drivers/infiniband/hw/ocrdma/ocrdma_verbs.c+10−1

 	struct ocrdma_create_cq_ureq ureq;
 	if (attr->flags)
-		return -EINVAL;
+		return -EOPNOTSUPP;
 	if (udata) {
 		if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
 	struct ocrdma_create_qp_ureq ureq;
 	u16 dpp_credit_lmt, dpp_offset;
+	if (attrs->create_flags)
+		return ERR_PTR(-EOPNOTSUPP);
 	status = ocrdma_check_qp_params(ibpd, dev, attrs, udata);
 	if (status)
 		goto gen_err;
 	struct ocrdma_dev *dev;
 	enum ib_qp_state old_qps, new_qps;
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	qp = get_ocrdma_qp(ibqp);
 	dev = get_ocrdma_dev(ibqp->device);
 	struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
 	struct ocrdma_srq *srq = get_ocrdma_srq(ibsrq);
+	if (init_attr->srq_type != IB_SRQT_BASIC)
+		return -EOPNOTSUPP;
 	if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
 		return -EINVAL;
 	if (init_attr->attr.max_wr > dev->attr.max_rqe)

drivers/infiniband/hw/qedr/main.c+5−34

 	struct qedr_dev *dev =
 		rdma_device_to_drv_device(device, struct qedr_dev, ibdev);
-	return scnprintf(buf, PAGE_SIZE, "0x%x\n", dev->attr.hw_ver);
+	return sysfs_emit(buf, "0x%x\n", dev->attr.hw_ver);
 }
 static DEVICE_ATTR_RO(hw_rev);
 	struct qedr_dev *dev =
 		rdma_device_to_drv_device(device, struct qedr_dev, ibdev);
-	return scnprintf(buf, PAGE_SIZE, "FastLinQ QL%x %s\n",
+	return sysfs_emit(buf, "FastLinQ QL%x %s\n", dev->pdev->device,
-			 dev->pdev->device,
+			  rdma_protocol_iwarp(&dev->ibdev, 1) ? "iWARP" :
-			 rdma_protocol_iwarp(&dev->ibdev, 1) ?
+								"RoCE");
-			 "iWARP" : "RoCE");
 }
 static DEVICE_ATTR_RO(hca_type);
 	dev->ibdev.node_type = RDMA_NODE_IB_CA;
 	ib_set_device_ops(&dev->ibdev, &qedr_roce_dev_ops);
-	dev->ibdev.uverbs_cmd_mask |= QEDR_UVERBS(OPEN_XRCD) |
-		QEDR_UVERBS(CLOSE_XRCD) |
-		QEDR_UVERBS(CREATE_XSRQ);
 }
 static const struct ib_device_ops qedr_dev_ops = {
 	dev->ibdev.node_guid = dev->attr.node_guid;
 	memcpy(dev->ibdev.node_desc, QEDR_NODE_DESC, sizeof(QEDR_NODE_DESC));
-	dev->ibdev.uverbs_cmd_mask = QEDR_UVERBS(GET_CONTEXT) |
-				     QEDR_UVERBS(QUERY_DEVICE) |
-				     QEDR_UVERBS(QUERY_PORT) |
-				     QEDR_UVERBS(ALLOC_PD) |
-				     QEDR_UVERBS(DEALLOC_PD) |
-				     QEDR_UVERBS(CREATE_COMP_CHANNEL) |
-				     QEDR_UVERBS(CREATE_CQ) |
-				     QEDR_UVERBS(RESIZE_CQ) |
-				     QEDR_UVERBS(DESTROY_CQ) |
-				     QEDR_UVERBS(REQ_NOTIFY_CQ) |
-				     QEDR_UVERBS(CREATE_QP) |
-				     QEDR_UVERBS(MODIFY_QP) |
-				     QEDR_UVERBS(QUERY_QP) |
-				     QEDR_UVERBS(DESTROY_QP) |
-				     QEDR_UVERBS(CREATE_SRQ) |
-				     QEDR_UVERBS(DESTROY_SRQ) |
-				     QEDR_UVERBS(QUERY_SRQ) |
-				     QEDR_UVERBS(MODIFY_SRQ) |
-				     QEDR_UVERBS(POST_SRQ_RECV) |
-				     QEDR_UVERBS(REG_MR) |
-				     QEDR_UVERBS(DEREG_MR) |
-				     QEDR_UVERBS(POLL_CQ) |
-				     QEDR_UVERBS(POST_SEND) |
-				     QEDR_UVERBS(POST_RECV);
 	if (IS_IWARP(dev)) {
 		rc = qedr_iw_register_device(dev);
 		if (rc)
 		}
 		xa_unlock_irqrestore(&dev->srqs, flags);
 		DP_NOTICE(dev, "SRQ event %d on handle %p\n", e_code, srq);
+		break;
 	default:
 		break;
 	}

drivers/infiniband/hw/qedr/verbs.c+13−0

 		 "create_cq: called from %s. entries=%d, vector=%d\n",
 		 udata ? "User Lib" : "Kernel", entries, vector);
+	if (attr->flags)
+		return -EOPNOTSUPP;
 	if (entries > QEDR_MAX_CQES) {
 		DP_ERR(dev,
 		       "create cq: the number of entries %d is too high. Must be equal or below %d.\n",
 		 "create SRQ called from %s (pd %p)\n",
 		 (udata) ? "User lib" : "kernel", pd);
+	if (init_attr->srq_type != IB_SRQT_BASIC &&
+	    init_attr->srq_type != IB_SRQT_XRC)
+		return -EOPNOTSUPP;
 	rc = qedr_check_srq_params(dev, init_attr, udata);
 	if (rc)
 		return -EINVAL;
 	struct ib_qp *ibqp;
 	int rc = 0;
+	if (attrs->create_flags)
+		return ERR_PTR(-EOPNOTSUPP);
 	if (attrs->qp_type == IB_QPT_XRC_TGT) {
 		xrcd = get_qedr_xrcd(attrs->xrcd);
 		dev = get_qedr_dev(xrcd->ibxrcd.device);
 		 "modify qp: qp %p attr_mask=0x%x, state=%d", qp, attr_mask,
 		 attr->qp_state);
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	old_qp_state = qedr_get_ibqp_state(qp->state);
 	if (attr_mask & IB_QP_STATE)
 		new_qp_state = attr->qp_state;

drivers/infiniband/hw/qib/qib_pcie.c+2−9

 		goto bail;
 	}
-	ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
+	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
 	if (ret) {
 		/*
 		 * If the 64 bit setup fails, try 32 bit.  Some systems
 		 * do not setup 64 bit maps on systems with 2GB or less
 		 * memory installed.
 		 */
-		ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+		ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
 		if (ret) {
 			qib_devinfo(pdev, "Unable to set DMA mask: %d\n", ret);
 			goto bail;
 		}
-		ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
-	} else
-		ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
-	if (ret) {
-		qib_early_err(&pdev->dev,
-			      "Unable to set DMA consistent mask: %d\n", ret);
-		goto bail;
 	}
 	pci_set_master(pdev);

drivers/infiniband/hw/qib/qib_sysfs.c+43−53

@@ -43,11 +43,8 @@ · 42 unmodified lines
43	static ssize_t show_hrtbt_enb(struct qib_pportdata ppd, char buf)	43	static ssize_t show_hrtbt_enb(struct qib_pportdata ppd, char buf)
44	{	44	{
45	struct qib_devdata *dd = ppd->dd;	45	struct qib_devdata *dd = ppd->dd;
46	int ret;
47		46
48	ret = dd->f_get_ib_cfg(ppd, QIB_IB_CFG_HRTBT);	47	return sysfs_emit(buf, "%d\n", dd->f_get_ib_cfg(ppd, QIB_IB_CFG_HRTBT));
49	ret = scnprintf(buf, PAGE_SIZE, "%d\n", ret);
50	return ret;
51	}	48	}
52		49
53	static ssize_t store_hrtbt_enb(struct qib_pportdata ppd, const char buf,	50	static ssize_t store_hrtbt_enb(struct qib_pportdata ppd, const char buf,
@@ -106,14 +103,10 @@ static ssize_t store_led_override(struct qib_pportdata ppd, const char buf, · 52 unmodified lines
106		103
107	static ssize_t show_status(struct qib_pportdata ppd, char buf)	104	static ssize_t show_status(struct qib_pportdata ppd, char buf)
108	{	105	{
109	ssize_t ret;
110
111	if (!ppd->statusp)	106	if (!ppd->statusp)
112	ret = -EINVAL;	107	return -EINVAL;
113	else	108
114	ret = scnprintf(buf, PAGE_SIZE, "0x%llx\n",	109	return sysfs_emit(buf, "0x%llx\n", (unsigned long long)*(ppd->statusp));
115	(unsigned long long) *(ppd->statusp));
116	return ret;
117	}	110	}
118		111
119	/*	112	/*
@@ -392,7 +385,7 @@ static ssize_t sl2vl_attr_show(struct kobject kobj, struct attribute attr, · 272 unmodified lines
392	container_of(kobj, struct qib_pportdata, sl2vl_kobj);	385	container_of(kobj, struct qib_pportdata, sl2vl_kobj);
393	struct qib_ibport *qibp = &ppd->ibport_data;	386	struct qib_ibport *qibp = &ppd->ibport_data;
394		387
395	return sprintf(buf, "%u\n", qibp->sl_to_vl[sattr->sl]);	388	return sysfs_emit(buf, "%u\n", qibp->sl_to_vl[sattr->sl]);
396	}	389	}
397		390
398	static const struct sysfs_ops qib_sl2vl_ops = {	391	static const struct sysfs_ops qib_sl2vl_ops = {
@@ -501,17 +494,18 @@ static ssize_t diagc_attr_show(struct kobject kobj, struct attribute attr, · 102 unmodified lines
501	struct qib_pportdata *ppd =	494	struct qib_pportdata *ppd =
502	container_of(kobj, struct qib_pportdata, diagc_kobj);	495	container_of(kobj, struct qib_pportdata, diagc_kobj);
503	struct qib_ibport *qibp = &ppd->ibport_data;	496	struct qib_ibport *qibp = &ppd->ibport_data;
		497	u64 val;
504		498
505	if (!strncmp(dattr->attr.name, "rc_acks", 7))	499	if (!strncmp(dattr->attr.name, "rc_acks", 7))
506	return sprintf(buf, "%llu\n", READ_PER_CPU_CNTR(rc_acks));	500	val = READ_PER_CPU_CNTR(rc_acks);
507	else if (!strncmp(dattr->attr.name, "rc_qacks", 8))	501	else if (!strncmp(dattr->attr.name, "rc_qacks", 8))
508	return sprintf(buf, "%llu\n", READ_PER_CPU_CNTR(rc_qacks));	502	val = READ_PER_CPU_CNTR(rc_qacks);
509	else if (!strncmp(dattr->attr.name, "rc_delayed_comp", 15))	503	else if (!strncmp(dattr->attr.name, "rc_delayed_comp", 15))
510	return sprintf(buf, "%llu\n",	504	val = READ_PER_CPU_CNTR(rc_delayed_comp);
511	READ_PER_CPU_CNTR(rc_delayed_comp));
512	else	505	else
513	return sprintf(buf, "%u\n",	506	val = (u32 )((char *)qibp + dattr->counter);
514	(u32 )((char *)qibp + dattr->counter));	507
		508	return sysfs_emit(buf, "%llu\n", val);
515	}	509	}
516		510
517	static ssize_t diagc_attr_store(struct kobject kobj, struct attribute attr,	511	static ssize_t diagc_attr_store(struct kobject kobj, struct attribute attr,
@@ -565,7 +559,7 @@ static ssize_t hw_rev_show(struct device device, struct device_attribute attr, · 47 unmodified lines
565	struct qib_ibdev *dev =	559	struct qib_ibdev *dev =
566	rdma_device_to_drv_device(device, struct qib_ibdev, rdi.ibdev);	560	rdma_device_to_drv_device(device, struct qib_ibdev, rdi.ibdev);
567		561
568	return sprintf(buf, "%x\n", dd_from_dev(dev)->minrev);	562	return sysfs_emit(buf, "%x\n", dd_from_dev(dev)->minrev);
569	}	563	}
570	static DEVICE_ATTR_RO(hw_rev);	564	static DEVICE_ATTR_RO(hw_rev);
571		565
@@ -575,13 +569,10 @@ static ssize_t hca_type_show(struct device *device, · 3 unmodified lines
575	struct qib_ibdev *dev =	569	struct qib_ibdev *dev =
576	rdma_device_to_drv_device(device, struct qib_ibdev, rdi.ibdev);	570	rdma_device_to_drv_device(device, struct qib_ibdev, rdi.ibdev);
577	struct qib_devdata *dd = dd_from_dev(dev);	571	struct qib_devdata *dd = dd_from_dev(dev);
578	int ret;
579		572
580	if (!dd->boardname)	573	if (!dd->boardname)
581	ret = -EINVAL;	574	return -EINVAL;
582	else	575	return sysfs_emit(buf, "%s\n", dd->boardname);
583	ret = scnprintf(buf, PAGE_SIZE, "%s\n", dd->boardname);
584	return ret;
585	}	576	}
586	static DEVICE_ATTR_RO(hca_type);	577	static DEVICE_ATTR_RO(hca_type);
587	static DEVICE_ATTR(board_id, 0444, hca_type_show, NULL);	578	static DEVICE_ATTR(board_id, 0444, hca_type_show, NULL);
@@ -590,7 +581,7 @@ static ssize_t version_show(struct device *device, · 2 unmodified lines
590	struct device_attribute attr, char buf)	581	struct device_attribute attr, char buf)
591	{	582	{
592	/* The string printed here is already newline-terminated. */	583	/* The string printed here is already newline-terminated. */
593	return scnprintf(buf, PAGE_SIZE, "%s", (char *)ib_qib_version);	584	return sysfs_emit(buf, "%s", (char *)ib_qib_version);
594	}	585	}
595	static DEVICE_ATTR_RO(version);	586	static DEVICE_ATTR_RO(version);
596		587
@@ -602,7 +593,7 @@ static ssize_t boardversion_show(struct device *device, · 5 unmodified lines
602	struct qib_devdata *dd = dd_from_dev(dev);	593	struct qib_devdata *dd = dd_from_dev(dev);
603		594
604	/* The string printed here is already newline-terminated. */	595	/* The string printed here is already newline-terminated. */
605	return scnprintf(buf, PAGE_SIZE, "%s", dd->boardversion);	596	return sysfs_emit(buf, "%s", dd->boardversion);
606	}	597	}
607	static DEVICE_ATTR_RO(boardversion);	598	static DEVICE_ATTR_RO(boardversion);
608		599
@@ -614,7 +605,7 @@ static ssize_t localbus_info_show(struct device *device, · 5 unmodified lines
614	struct qib_devdata *dd = dd_from_dev(dev);	605	struct qib_devdata *dd = dd_from_dev(dev);
615		606
616	/* The string printed here is already newline-terminated. */	607	/* The string printed here is already newline-terminated. */
617	return scnprintf(buf, PAGE_SIZE, "%s", dd->lbus_info);	608	return sysfs_emit(buf, "%s", dd->lbus_info);
618	}	609	}
619	static DEVICE_ATTR_RO(localbus_info);	610	static DEVICE_ATTR_RO(localbus_info);
620		611
@@ -628,9 +619,10 @@ static ssize_t nctxts_show(struct device *device, · 7 unmodified lines
628	/* Return the number of user ports (contexts) available. */	619	/* Return the number of user ports (contexts) available. */
629	/* The calculation below deals with a special case where	620	/* The calculation below deals with a special case where
630	* cfgctxts is set to 1 on a single-port board. */	621	* cfgctxts is set to 1 on a single-port board. */
631	return scnprintf(buf, PAGE_SIZE, "%u\n",	622	return sysfs_emit(buf, "%u\n",
632	(dd->first_user_ctxt > dd->cfgctxts) ? 0 :	623	(dd->first_user_ctxt > dd->cfgctxts) ?
633	(dd->cfgctxts - dd->first_user_ctxt));	624	0 :
		625	(dd->cfgctxts - dd->first_user_ctxt));
634	}	626	}
635	static DEVICE_ATTR_RO(nctxts);	627	static DEVICE_ATTR_RO(nctxts);
636		628
@@ -642,21 +634,20 @@ static ssize_t nfreectxts_show(struct device *device, · 5 unmodified lines
642	struct qib_devdata *dd = dd_from_dev(dev);	634	struct qib_devdata *dd = dd_from_dev(dev);
643		635
644	/* Return the number of free user ports (contexts) available. */	636	/* Return the number of free user ports (contexts) available. */
645	return scnprintf(buf, PAGE_SIZE, "%u\n", dd->freectxts);	637	return sysfs_emit(buf, "%u\n", dd->freectxts);
646	}	638	}
647	static DEVICE_ATTR_RO(nfreectxts);	639	static DEVICE_ATTR_RO(nfreectxts);
648		640
649	static ssize_t serial_show(struct device *device,	641	static ssize_t serial_show(struct device device, struct device_attribute attr,
650	struct device_attribute attr, char buf)	642	char *buf)
651	{	643	{
652	struct qib_ibdev *dev =	644	struct qib_ibdev *dev =
653	rdma_device_to_drv_device(device, struct qib_ibdev, rdi.ibdev);	645	rdma_device_to_drv_device(device, struct qib_ibdev, rdi.ibdev);
654	struct qib_devdata *dd = dd_from_dev(dev);	646	struct qib_devdata *dd = dd_from_dev(dev);
		647	const u8 *end = memchr(dd->serial, 0, ARRAY_SIZE(dd->serial));
		648	int size = end ? end - dd->serial : ARRAY_SIZE(dd->serial);
655		649
656	buf[sizeof(dd->serial)] = '\0';	650	return sysfs_emit(buf, ".%*s\n", size, dd->serial);
657	memcpy(buf, dd->serial, sizeof(dd->serial));
658	strcat(buf, "\n");
659	return strlen(buf);
660	}	651	}
661	static DEVICE_ATTR_RO(serial);	652	static DEVICE_ATTR_RO(serial);
662		653
@@ -689,27 +680,26 @@ static ssize_t tempsense_show(struct device *device, · 26 unmodified lines
689	struct qib_ibdev *dev =	680	struct qib_ibdev *dev =
690	rdma_device_to_drv_device(device, struct qib_ibdev, rdi.ibdev);	681	rdma_device_to_drv_device(device, struct qib_ibdev, rdi.ibdev);
691	struct qib_devdata *dd = dd_from_dev(dev);	682	struct qib_devdata *dd = dd_from_dev(dev);
692	int ret;	683	int i;
693	int idx;
694	u8 regvals[8];	684	u8 regvals[8];
695		685
696	ret = -ENXIO;	686	for (i = 0; i < 8; i++) {
697	for (idx = 0; idx < 8; ++idx) {	687	int ret;
698	if (idx == 6)	688
		689	if (i == 6)
699	continue;	690	continue;
700	ret = dd->f_tempsense_rd(dd, idx);	691	ret = dd->f_tempsense_rd(dd, i);
701	if (ret < 0)	692	if (ret < 0)
702	break;	693	return ret; /* return error on bad read */
703	regvals[idx] = ret;	694	regvals[i] = ret;
704	}	695	}
705	if (idx == 8)	696	return sysfs_emit(buf, "%d %d %02X %02X %d %d\n",
706	ret = scnprintf(buf, PAGE_SIZE, "%d %d %02X %02X %d %d\n",	697	(signed char)regvals[0],
707	(signed char )(regvals),	698	(signed char)regvals[1],
708	(signed char )(regvals + 1),	699	regvals[2],
709	regvals[2], regvals[3],	700	regvals[3],
710	(signed char )(regvals + 5),	701	(signed char)regvals[5],
711	(signed char )(regvals + 7));	702	(signed char)regvals[7]);
712	return ret;
713	}	703	}
714	static DEVICE_ATTR_RO(tempsense);	704	static DEVICE_ATTR_RO(tempsense);
715		705

drivers/infiniband/hw/usnic/usnic_ib_main.c+0−19

@@ -398,25 +398,6 @@ static void usnic_ib_device_add(struct pci_dev dev) · 397 unmodified lines
398	us_ibdev->ib_dev.num_comp_vectors = USNIC_IB_NUM_COMP_VECTORS;	398	us_ibdev->ib_dev.num_comp_vectors = USNIC_IB_NUM_COMP_VECTORS;
399	us_ibdev->ib_dev.dev.parent = &dev->dev;	399	us_ibdev->ib_dev.dev.parent = &dev->dev;
400		400
401	us_ibdev->ib_dev.uverbs_cmd_mask =
402	(1ull << IB_USER_VERBS_CMD_GET_CONTEXT) \|
403	(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) \|
404	(1ull << IB_USER_VERBS_CMD_QUERY_PORT) \|
405	(1ull << IB_USER_VERBS_CMD_ALLOC_PD) \|
406	(1ull << IB_USER_VERBS_CMD_DEALLOC_PD) \|
407	(1ull << IB_USER_VERBS_CMD_REG_MR) \|
408	(1ull << IB_USER_VERBS_CMD_DEREG_MR) \|
409	(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) \|
410	(1ull << IB_USER_VERBS_CMD_CREATE_CQ) \|
411	(1ull << IB_USER_VERBS_CMD_DESTROY_CQ) \|
412	(1ull << IB_USER_VERBS_CMD_CREATE_QP) \|
413	(1ull << IB_USER_VERBS_CMD_MODIFY_QP) \|
414	(1ull << IB_USER_VERBS_CMD_QUERY_QP) \|
415	(1ull << IB_USER_VERBS_CMD_DESTROY_QP) \|
416	(1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) \|
417	(1ull << IB_USER_VERBS_CMD_DETACH_MCAST) \|
418	(1ull << IB_USER_VERBS_CMD_OPEN_QP);
419
420	ib_set_device_ops(&us_ibdev->ib_dev, &usnic_dev_ops);	401	ib_set_device_ops(&us_ibdev->ib_dev, &usnic_dev_ops);
421		402
422	rdma_set_device_sysfs_group(&us_ibdev->ib_dev, &usnic_attr_group);	403	rdma_set_device_sysfs_group(&us_ibdev->ib_dev, &usnic_attr_group);

drivers/infiniband/hw/usnic/usnic_ib_sysfs.c+40−60

@@ -57,7 +57,7 @@ static ssize_t board_id_show(struct device *device, · 56 unmodified lines
57	subsystem_device_id = us_ibdev->pdev->subsystem_device;	57	subsystem_device_id = us_ibdev->pdev->subsystem_device;
58	mutex_unlock(&us_ibdev->usdev_lock);	58	mutex_unlock(&us_ibdev->usdev_lock);
59		59
60	return scnprintf(buf, PAGE_SIZE, "%hu\n", subsystem_device_id);	60	return sysfs_emit(buf, "%u\n", subsystem_device_id);
61	}	61	}
62	static DEVICE_ATTR_RO(board_id);	62	static DEVICE_ATTR_RO(board_id);
63		63
@@ -69,19 +69,13 @@ config_show(struct device device, struct device_attribute attr, char *buf) · 5 unmodified lines
69	{	69	{
70	struct usnic_ib_dev *us_ibdev =	70	struct usnic_ib_dev *us_ibdev =
71	rdma_device_to_drv_device(device, struct usnic_ib_dev, ib_dev);	71	rdma_device_to_drv_device(device, struct usnic_ib_dev, ib_dev);
72	char *ptr;
73	unsigned left;
74	unsigned n;
75	enum usnic_vnic_res_type res_type;	72	enum usnic_vnic_res_type res_type;
76		73	int len;
77	/* Buffer space limit is 1 page */
78	ptr = buf;
79	left = PAGE_SIZE;
80		74
81	mutex_lock(&us_ibdev->usdev_lock);	75	mutex_lock(&us_ibdev->usdev_lock);
82	if (kref_read(&us_ibdev->vf_cnt) > 0) {	76	if (kref_read(&us_ibdev->vf_cnt) > 0) {
83	char *busname;	77	char *busname;
84		78	char *sep = "";
85	/*	79	/*
86	* bus name seems to come with annoying prefix.	80	* bus name seems to come with annoying prefix.
87	* Remove it if it is predictable	81	* Remove it if it is predictable
@@ -90,39 +84,35 @@ config_show(struct device device, struct device_attribute attr, char *buf) · 2 unmodified lines
90	if (strncmp(busname, "PCI Bus ", 8) == 0)	84	if (strncmp(busname, "PCI Bus ", 8) == 0)
91	busname += 8;	85	busname += 8;
92		86
93	n = scnprintf(ptr, left,	87	len = sysfs_emit(buf, "%s: %s:%d.%d, %s, %pM, %u VFs\n",
94	"%s: %s:%d.%d, %s, %pM, %u VFs\n Per VF:",	88	dev_name(&us_ibdev->ib_dev.dev),
95	dev_name(&us_ibdev->ib_dev.dev),	89	busname,
96	busname,	90	PCI_SLOT(us_ibdev->pdev->devfn),
97	PCI_SLOT(us_ibdev->pdev->devfn),	91	PCI_FUNC(us_ibdev->pdev->devfn),
98	PCI_FUNC(us_ibdev->pdev->devfn),	92	netdev_name(us_ibdev->netdev),
99	netdev_name(us_ibdev->netdev),	93	us_ibdev->ufdev->mac,
100	us_ibdev->ufdev->mac,	94	kref_read(&us_ibdev->vf_cnt));
101	kref_read(&us_ibdev->vf_cnt));
102	UPDATE_PTR_LEFT(n, ptr, left);
103		95
		96	len += sysfs_emit_at(buf, len, " Per VF:");
104	for (res_type = USNIC_VNIC_RES_TYPE_EOL;	97	for (res_type = USNIC_VNIC_RES_TYPE_EOL;
105	res_type < USNIC_VNIC_RES_TYPE_MAX;	98	res_type < USNIC_VNIC_RES_TYPE_MAX; res_type++) {
106	res_type++) {
107	if (us_ibdev->vf_res_cnt[res_type] == 0)	99	if (us_ibdev->vf_res_cnt[res_type] == 0)
108	continue;	100	continue;
109	n = scnprintf(ptr, left, " %d %s%s",	101	len += sysfs_emit_at(buf, len, "%s %d %s",
110	us_ibdev->vf_res_cnt[res_type],	102	sep,
111	usnic_vnic_res_type_to_str(res_type),	103	us_ibdev->vf_res_cnt[res_type],
112	(res_type < (USNIC_VNIC_RES_TYPE_MAX - 1)) ?	104	usnic_vnic_res_type_to_str(res_type));
113	"," : "");	105	sep = ",";
114	UPDATE_PTR_LEFT(n, ptr, left);
115	}	106	}
116	n = scnprintf(ptr, left, "\n");	107	len += sysfs_emit_at(buf, len, "\n");
117	UPDATE_PTR_LEFT(n, ptr, left);
118	} else {	108	} else {
119	n = scnprintf(ptr, left, "%s: no VFs\n",	109	len = sysfs_emit(buf, "%s: no VFs\n",
120	dev_name(&us_ibdev->ib_dev.dev));	110	dev_name(&us_ibdev->ib_dev.dev));
121	UPDATE_PTR_LEFT(n, ptr, left);
122	}	111	}
		112
123	mutex_unlock(&us_ibdev->usdev_lock);	113	mutex_unlock(&us_ibdev->usdev_lock);
124		114
125	return ptr - buf;	115	return len;
126	}	116	}
127	static DEVICE_ATTR_RO(config);	117	static DEVICE_ATTR_RO(config);
128		118
@@ -132,8 +122,7 @@ iface_show(struct device device, struct device_attribute attr, char *buf) · 3 unmodified lines
132	struct usnic_ib_dev *us_ibdev =	122	struct usnic_ib_dev *us_ibdev =
133	rdma_device_to_drv_device(device, struct usnic_ib_dev, ib_dev);	123	rdma_device_to_drv_device(device, struct usnic_ib_dev, ib_dev);
134		124
135	return scnprintf(buf, PAGE_SIZE, "%s\n",	125	return sysfs_emit(buf, "%s\n", netdev_name(us_ibdev->netdev));
136	netdev_name(us_ibdev->netdev));
137	}	126	}
138	static DEVICE_ATTR_RO(iface);	127	static DEVICE_ATTR_RO(iface);
139		128
@@ -143,8 +132,7 @@ max_vf_show(struct device device, struct device_attribute attr, char *buf) · 3 unmodified lines
143	struct usnic_ib_dev *us_ibdev =	132	struct usnic_ib_dev *us_ibdev =
144	rdma_device_to_drv_device(device, struct usnic_ib_dev, ib_dev);	133	rdma_device_to_drv_device(device, struct usnic_ib_dev, ib_dev);
145		134
146	return scnprintf(buf, PAGE_SIZE, "%u\n",	135	return sysfs_emit(buf, "%u\n", kref_read(&us_ibdev->vf_cnt));
147	kref_read(&us_ibdev->vf_cnt));
148	}	136	}
149	static DEVICE_ATTR_RO(max_vf);	137	static DEVICE_ATTR_RO(max_vf);
150		138
@@ -158,8 +146,7 @@ qp_per_vf_show(struct device device, struct device_attribute attr, char *buf) · 7 unmodified lines
158	qp_per_vf = max(us_ibdev->vf_res_cnt[USNIC_VNIC_RES_TYPE_WQ],	146	qp_per_vf = max(us_ibdev->vf_res_cnt[USNIC_VNIC_RES_TYPE_WQ],
159	us_ibdev->vf_res_cnt[USNIC_VNIC_RES_TYPE_RQ]);	147	us_ibdev->vf_res_cnt[USNIC_VNIC_RES_TYPE_RQ]);
160		148
161	return scnprintf(buf, PAGE_SIZE,	149	return sysfs_emit(buf, "%d\n", qp_per_vf);
162	"%d\n", qp_per_vf);
163	}	150	}
164	static DEVICE_ATTR_RO(qp_per_vf);	151	static DEVICE_ATTR_RO(qp_per_vf);
165		152
@@ -169,8 +156,8 @@ cq_per_vf_show(struct device device, struct device_attribute attr, char *buf) · 3 unmodified lines
169	struct usnic_ib_dev *us_ibdev =	156	struct usnic_ib_dev *us_ibdev =
170	rdma_device_to_drv_device(device, struct usnic_ib_dev, ib_dev);	157	rdma_device_to_drv_device(device, struct usnic_ib_dev, ib_dev);
171		158
172	return scnprintf(buf, PAGE_SIZE, "%d\n",	159	return sysfs_emit(buf, "%d\n",
173	us_ibdev->vf_res_cnt[USNIC_VNIC_RES_TYPE_CQ]);	160	us_ibdev->vf_res_cnt[USNIC_VNIC_RES_TYPE_CQ]);
174	}	161	}
175	static DEVICE_ATTR_RO(cq_per_vf);	162	static DEVICE_ATTR_RO(cq_per_vf);
176		163
@@ -217,43 +204,36 @@ struct qpn_attribute qpn_attr_##NAME = __ATTR_RO(NAME) · 40 unmodified lines
217		204
218	static ssize_t context_show(struct usnic_ib_qp_grp qp_grp, char buf)	205	static ssize_t context_show(struct usnic_ib_qp_grp qp_grp, char buf)
219	{	206	{
220	return scnprintf(buf, PAGE_SIZE, "0x%p\n", qp_grp->ctx);	207	return sysfs_emit(buf, "0x%p\n", qp_grp->ctx);
221	}	208	}
222		209
223	static ssize_t summary_show(struct usnic_ib_qp_grp qp_grp, char buf)	210	static ssize_t summary_show(struct usnic_ib_qp_grp qp_grp, char buf)
224	{	211	{
225	int i, j, n;	212	int i, j;
226	int left;
227	char *ptr;
228	struct usnic_vnic_res_chunk *res_chunk;	213	struct usnic_vnic_res_chunk *res_chunk;
229	struct usnic_vnic_res *vnic_res;	214	struct usnic_vnic_res *vnic_res;
		215	int len;
230		216
231	left = PAGE_SIZE;	217	len = sysfs_emit(buf, "QPN: %d State: (%s) PID: %u VF Idx: %hu ",
232	ptr = buf;	218	qp_grp->ibqp.qp_num,
233		219	usnic_ib_qp_grp_state_to_string(qp_grp->state),
234	n = scnprintf(ptr, left,	220	qp_grp->owner_pid,
235	"QPN: %d State: (%s) PID: %u VF Idx: %hu ",	221	usnic_vnic_get_index(qp_grp->vf->vnic));
236	qp_grp->ibqp.qp_num,
237	usnic_ib_qp_grp_state_to_string(qp_grp->state),
238	qp_grp->owner_pid,
239	usnic_vnic_get_index(qp_grp->vf->vnic));
240	UPDATE_PTR_LEFT(n, ptr, left);
241		222
242	for (i = 0; qp_grp->res_chunk_list[i]; i++) {	223	for (i = 0; qp_grp->res_chunk_list[i]; i++) {
243	res_chunk = qp_grp->res_chunk_list[i];	224	res_chunk = qp_grp->res_chunk_list[i];
244	for (j = 0; j < res_chunk->cnt; j++) {	225	for (j = 0; j < res_chunk->cnt; j++) {
245	vnic_res = res_chunk->res[j];	226	vnic_res = res_chunk->res[j];
246	n = scnprintf(ptr, left, "%s[%d] ",	227	len += sysfs_emit_at(
		228	buf, len, "%s[%d] ",
247	usnic_vnic_res_type_to_str(vnic_res->type),	229	usnic_vnic_res_type_to_str(vnic_res->type),
248	vnic_res->vnic_idx);	230	vnic_res->vnic_idx);
249	UPDATE_PTR_LEFT(n, ptr, left);
250	}	231	}
251	}	232	}
252		233
253	n = scnprintf(ptr, left, "\n");	234	len = sysfs_emit_at(buf, len, "\n");
254	UPDATE_PTR_LEFT(n, ptr, left);
255		235
256	return ptr - buf;	236	return len;
257	}	237	}
258		238
259	static QPN_ATTR_RO(context);	239	static QPN_ATTR_RO(context);

drivers/infiniband/hw/usnic/usnic_ib_verbs.c+5−2

 	us_ibdev = to_usdev(pd->device);
 	if (init_attr->create_flags)
-		return ERR_PTR(-EINVAL);
+		return ERR_PTR(-EOPNOTSUPP);
 	err = ib_copy_from_udata(&cmd, udata, sizeof(cmd));
 	if (err) {
 	int status;
 	usnic_dbg("\n");
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	qp_grp = to_uqp_grp(ibqp);
 	mutex_lock(&qp_grp->vf->pf->usdev_lock);
 		       struct ib_udata *udata)
 {
 	if (attr->flags)
-		return -EINVAL;
+		return -EOPNOTSUPP;
 	return 0;
 }

drivers/infiniband/hw/vmw_pvrdma/pvrdma_cq.c+3−0

@@ -119,6 +119,9 @@ int pvrdma_create_cq(struct ib_cq ibcq, const struct ib_cq_init_attr attr, · 118 unmodified lines
119		119
120	BUILD_BUG_ON(sizeof(struct pvrdma_cqe) != 64);	120	BUILD_BUG_ON(sizeof(struct pvrdma_cqe) != 64);
121		121
		122	if (attr->flags)
		123	return -EOPNOTSUPP;
		124
122	entries = roundup_pow_of_two(entries);	125	entries = roundup_pow_of_two(entries);
123	if (entries < 1 \|\| entries > dev->dsr->caps.max_cqe)	126	if (entries < 1 \|\| entries > dev->dsr->caps.max_cqe)
124	return -EINVAL;	127	return -EINVAL;

drivers/infiniband/hw/vmw_pvrdma/pvrdma_main.c+3−31

 static ssize_t hca_type_show(struct device *device,
 			     struct device_attribute *attr, char *buf)
 {
-	return sprintf(buf, "VMW_PVRDMA-%s\n", DRV_VERSION);
+	return sysfs_emit(buf, "VMW_PVRDMA-%s\n", DRV_VERSION);
 }
 static DEVICE_ATTR_RO(hca_type);
 static ssize_t hw_rev_show(struct device *device,
 			   struct device_attribute *attr, char *buf)
 {
-	return sprintf(buf, "%d\n", PVRDMA_REV_ID);
+	return sysfs_emit(buf, "%d\n", PVRDMA_REV_ID);
 }
 static DEVICE_ATTR_RO(hw_rev);
 static ssize_t board_id_show(struct device *device,
 			     struct device_attribute *attr, char *buf)
 {
-	return sprintf(buf, "%d\n", PVRDMA_BOARD_ID);
+	return sysfs_emit(buf, "%d\n", PVRDMA_BOARD_ID);
 }
 static DEVICE_ATTR_RO(board_id);
 	dev->flags = 0;
 	dev->ib_dev.num_comp_vectors = 1;
 	dev->ib_dev.dev.parent = &dev->pdev->dev;
-	dev->ib_dev.uverbs_cmd_mask =
-		(1ull << IB_USER_VERBS_CMD_GET_CONTEXT)		|
-		(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE)	|
-		(1ull << IB_USER_VERBS_CMD_QUERY_PORT)		|
-		(1ull << IB_USER_VERBS_CMD_ALLOC_PD)		|
-		(1ull << IB_USER_VERBS_CMD_DEALLOC_PD)		|
-		(1ull << IB_USER_VERBS_CMD_REG_MR)		|
-		(1ull << IB_USER_VERBS_CMD_DEREG_MR)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL)	|
-		(1ull << IB_USER_VERBS_CMD_CREATE_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_POLL_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ)	|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_CQ)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_QP)		|
-		(1ull << IB_USER_VERBS_CMD_MODIFY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_QUERY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_QP)		|
-		(1ull << IB_USER_VERBS_CMD_POST_SEND)		|
-		(1ull << IB_USER_VERBS_CMD_POST_RECV)		|
-		(1ull << IB_USER_VERBS_CMD_CREATE_AH)		|
-		(1ull << IB_USER_VERBS_CMD_DESTROY_AH);
 	dev->ib_dev.node_type = RDMA_NODE_IB_CA;
 	dev->ib_dev.phys_port_cnt = dev->dsr->caps.phys_port_cnt;
 	/* Check if SRQ is supported by backend */
 	if (dev->dsr->caps.max_srq) {
-		dev->ib_dev.uverbs_cmd_mask |=
-			(1ull << IB_USER_VERBS_CMD_CREATE_SRQ)	|
-			(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ)	|
-			(1ull << IB_USER_VERBS_CMD_QUERY_SRQ)	|
-			(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ)	|
-			(1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
 		ib_set_device_ops(&dev->ib_dev, &pvrdma_dev_srq_ops);
 		dev->srq_tbl = kcalloc(dev->dsr->caps.max_srq,

drivers/infiniband/hw/vmw_pvrdma/pvrdma_qp.c+4−1

 		dev_warn(&dev->pdev->dev,
 			 "invalid create queuepair flags %#x\n",
 			 init_attr->create_flags);
-		return ERR_PTR(-EINVAL);
+		return ERR_PTR(-EOPNOTSUPP);
 	}
 	if (init_attr->qp_type != IB_QPT_RC &&
 	enum ib_qp_state cur_state, next_state;
 	int ret;
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	/* Sanity checking. Should need lock here */
 	mutex_lock(&qp->mutex);
 	cur_state = (attr_mask & IB_QP_CUR_STATE) ? attr->cur_qp_state :

drivers/infiniband/hw/vmw_pvrdma/pvrdma_srq.c+1−1

@@ -121,7 +121,7 @@ int pvrdma_create_srq(struct ib_srq ibsrq, struct ib_srq_init_attr init_attr, · 120 unmodified lines
121	dev_warn(&dev->pdev->dev,	121	dev_warn(&dev->pdev->dev,
122	"shared receive queue type %d not supported\n",	122	"shared receive queue type %d not supported\n",
123	init_attr->srq_type);	123	init_attr->srq_type);
124	return -EINVAL;	124	return -EOPNOTSUPP;
125	}	125	}
126		126
127	if (init_attr->attr.max_wr > dev->dsr->caps.max_srq_wr \|\|	127	if (init_attr->attr.max_wr > dev->dsr->caps.max_srq_wr \|\|

drivers/infiniband/sw/rdmavt/Kconfig+0−1

@@ -4,6 +4,5 @@ config INFINIBAND_RDMAVT · 3 unmodified lines
4	depends on INFINIBAND_VIRT_DMA	4	depends on INFINIBAND_VIRT_DMA
5	depends on X86_64	5	depends on X86_64
6	depends on PCI	6	depends on PCI
7	select DMA_VIRT_OPS
8	help	7	help
9	This is a common software verbs provider for RDMA networks.	8	This is a common software verbs provider for RDMA networks.

drivers/infiniband/sw/rdmavt/ah.c+1−2

 }
 /**
- * rvt_destory_ah - Destory an address handle
+ * rvt_destroy_ah - Destroy an address handle
  * @ibah: address handle
  * @destroy_flags: destroy address handle flags (see enum rdma_destroy_ah_flags)
- *
  * Return: 0 on success
  */
 int rvt_destroy_ah(struct ib_ah *ibah, u32 destroy_flags)

drivers/infiniband/sw/rdmavt/cq.c+1−1

@@ -211,7 +211,7 @@ int rvt_create_cq(struct ib_cq ibcq, const struct ib_cq_init_attr attr, · 210 unmodified lines
211	int err;	211	int err;
212		212
213	if (attr->flags)	213	if (attr->flags)
214	return -EINVAL;	214	return -EOPNOTSUPP;
215		215
216	if (entries < 1 \|\| entries > rdi->dparms.props.max_cqe)	216	if (entries < 1 \|\| entries > rdi->dparms.props.max_cqe)
217	return -EINVAL;	217	return -EINVAL;

drivers/infiniband/sw/rdmavt/mcast.c+6−6

@@ -54,7 +54,7 @@ · 53 unmodified lines
54	#include "mcast.h"	54	#include "mcast.h"
55		55
56	/**	56	/**
57	* rvt_driver_mcast - init resources for multicast	57	* rvt_driver_mcast_init - init resources for multicast
58	* @rdi: rvt dev struct	58	* @rdi: rvt dev struct
59	*	59	*
60	* This is per device that registers with rdmavt	60	* This is per device that registers with rdmavt
@@ -69,7 +69,7 @@ void rvt_driver_mcast_init(struct rvt_dev_info *rdi) · 8 unmodified lines
69	}	69	}
70		70
71	/**	71	/**
72	* mcast_qp_alloc - alloc a struct to link a QP to mcast GID struct	72	* rvt_mcast_qp_alloc - alloc a struct to link a QP to mcast GID struct
73	* @qp: the QP to link	73	* @qp: the QP to link
74	*/	74	*/
75	static struct rvt_mcast_qp rvt_mcast_qp_alloc(struct rvt_qp qp)	75	static struct rvt_mcast_qp rvt_mcast_qp_alloc(struct rvt_qp qp)
@@ -98,7 +98,7 @@ static void rvt_mcast_qp_free(struct rvt_mcast_qp *mqp) · 22 unmodified lines
98	}	98	}
99		99
100	/**	100	/**
101	* mcast_alloc - allocate the multicast GID structure	101	* rvt_mcast_alloc - allocate the multicast GID structure
102	* @mgid: the multicast GID	102	* @mgid: the multicast GID
103	* @lid: the muilticast LID (host order)	103	* @lid: the muilticast LID (host order)
104	*	104	*
@@ -181,7 +181,7 @@ struct rvt_mcast rvt_mcast_find(struct rvt_ibport ibp, union ib_gid *mgid, · 76 unmodified lines
181	EXPORT_SYMBOL(rvt_mcast_find);	181	EXPORT_SYMBOL(rvt_mcast_find);
182		182
183	/**	183	/**
184	* mcast_add - insert mcast GID into table and attach QP struct	184	* rvt_mcast_add - insert mcast GID into table and attach QP struct
185	* @mcast: the mcast GID table	185	* @mcast: the mcast GID table
186	* @mqp: the QP to attach	186	* @mqp: the QP to attach
187	*	187	*
@@ -426,8 +426,8 @@ int rvt_detach_mcast(struct ib_qp ibqp, union ib_gid gid, u16 lid) · 238 unmodified lines
426	}	426	}
427		427
428	/**	428	/**
429	*rvt_mast_tree_empty - determine if any qps are attached to any mcast group	429	* rvt_mcast_tree_empty - determine if any qps are attached to any mcast group
430	*@rdi: rvt dev struct	430	* @rdi: rvt dev struct
431	*	431	*
432	* Return: in use count	432	* Return: in use count
433	*/	433	*/

drivers/infiniband/sw/rdmavt/mr.c+2−4

  * @acc: access flags
  *
  * Return: the memory region on success, otherwise returns an errno.
- * Note that all DMA addresses should be created via the functions in
- * struct dma_virt_ops.
  */
 struct ib_mr *rvt_get_dma_mr(struct ib_pd *pd, int acc)
 {
 	/*
 	 * We use LKEY == zero for kernel virtual addresses
-	 * (see rvt_get_dma_mr() and dma_virt_ops).
+	 * (see rvt_get_dma_mr()).
 	 */
 	if (sge->lkey == 0) {
 		struct rvt_dev_info *dev = ib_to_rvt(pd->ibpd.device);
 	/*
 	 * We use RKEY == zero for kernel virtual addresses
-	 * (see rvt_get_dma_mr() and dma_virt_ops).
+	 * (see rvt_get_dma_mr()).
 	 */
 	rcu_read_lock();
 	if (rkey == 0) {

drivers/infiniband/sw/rdmavt/qp.c+11−7

 	if (!rdi)
 		return ERR_PTR(-EINVAL);
+	if (init_attr->create_flags & ~IB_QP_CREATE_NETDEV_USE)
+		return ERR_PTR(-EOPNOTSUPP);
 	if (init_attr->cap.max_send_sge > rdi->dparms.props.max_send_sge ||
-	    init_attr->cap.max_send_wr > rdi->dparms.props.max_qp_wr ||
+	    init_attr->cap.max_send_wr > rdi->dparms.props.max_qp_wr)
-	    (init_attr->create_flags &&
-	     init_attr->create_flags != IB_QP_CREATE_NETDEV_USE))
 		return ERR_PTR(-EINVAL);
 	/* Check receive queue parameters if no SRQ is specified. */
 	int pmtu = 0; /* for gcc warning only */
 	int opa_ah;
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	spin_lock_irq(&qp->r_lock);
 	spin_lock(&qp->s_hlock);
 	spin_lock(&qp->s_lock);
 }
 /**
- * rvt_post_receive - post a receive on a QP
+ * rvt_post_recv - post a receive on a QP
  * @ibqp: the QP to post the receive on
  * @wr: the WR to post
  * @bad_wr: the first bad WR is put here
 }
 /**
- * rvt_post_srq_receive - post a receive on a shared receive queue
+ * rvt_post_srq_recv - post a receive on a shared receive queue
  * @ibsrq: the SRQ to post the receive on
  * @wr: the list of work requests to post
  * @bad_wr: A pointer to the first WR to cause a problem is put here
 EXPORT_SYMBOL(rvt_get_rwqe);
 /**
- * qp_comm_est - handle trap with QP established
+ * rvt_comm_est - handle trap with QP established
  * @qp: the QP
  */
 void rvt_comm_est(struct rvt_qp *qp)
 }
 /**
- * ruc_loopback - handle UC and RC loopback requests
+ * rvt_ruc_loopback - handle UC and RC loopback requests
  * @sqp: the sending QP
  *
  * This is called from rvt_do_send() to forward a WQE addressed to the same HFI

drivers/infiniband/sw/rdmavt/vt.c+2−34

@@ -384,6 +384,7 @@ static const struct ib_device_ops rvt_dev_ops = { · 383 unmodified lines
384	.create_cq = rvt_create_cq,	384	.create_cq = rvt_create_cq,
385	.create_qp = rvt_create_qp,	385	.create_qp = rvt_create_qp,
386	.create_srq = rvt_create_srq,	386	.create_srq = rvt_create_srq,
		387	.create_user_ah = rvt_create_ah,
387	.dealloc_pd = rvt_dealloc_pd,	388	.dealloc_pd = rvt_dealloc_pd,
388	.dealloc_ucontext = rvt_dealloc_ucontext,	389	.dealloc_ucontext = rvt_dealloc_ucontext,
389	.dereg_mr = rvt_dereg_mr,	390	.dereg_mr = rvt_dereg_mr,
@@ -524,7 +525,6 @@ static noinline int check_support(struct rvt_dev_info *rdi, int verb) · 134 unmodified lines
524	int rvt_register_device(struct rvt_dev_info *rdi)	525	int rvt_register_device(struct rvt_dev_info *rdi)
525	{	526	{
526	int ret = 0, i;	527	int ret = 0, i;
527	u64 dma_mask;
528		528
529	if (!rdi)	529	if (!rdi)
530	return -EINVAL;	530	return -EINVAL;
@@ -579,13 +579,6 @@ int rvt_register_device(struct rvt_dev_info *rdi) · 48 unmodified lines
579	/* Completion queues */	579	/* Completion queues */
580	spin_lock_init(&rdi->n_cqs_lock);	580	spin_lock_init(&rdi->n_cqs_lock);
581		581
582	/* DMA Operations */
583	rdi->ibdev.dev.dma_parms = rdi->ibdev.dev.parent->dma_parms;
584	dma_mask = IS_ENABLED(CONFIG_64BIT) ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32);
585	ret = dma_coerce_mask_and_coherent(&rdi->ibdev.dev, dma_mask);
586	if (ret)
587	goto bail_wss;
588
589	/* Protection Domain */	582	/* Protection Domain */
590	spin_lock_init(&rdi->n_pds_lock);	583	spin_lock_init(&rdi->n_pds_lock);
591	rdi->n_pds_allocated = 0;	584	rdi->n_pds_allocated = 0;
@@ -596,36 +589,11 @@ int rvt_register_device(struct rvt_dev_info *rdi) · 4 unmodified lines
596	* exactly which functions rdmavt supports, nor do they know the ABI	589	* exactly which functions rdmavt supports, nor do they know the ABI
597	* version, so we do all of this sort of stuff here.	590	* version, so we do all of this sort of stuff here.
598	*/	591	*/
599	rdi->ibdev.uverbs_cmd_mask =	592	rdi->ibdev.uverbs_cmd_mask \|=
600	(1ull << IB_USER_VERBS_CMD_GET_CONTEXT) \|
601	(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) \|
602	(1ull << IB_USER_VERBS_CMD_QUERY_PORT) \|
603	(1ull << IB_USER_VERBS_CMD_ALLOC_PD) \|
604	(1ull << IB_USER_VERBS_CMD_DEALLOC_PD) \|
605	(1ull << IB_USER_VERBS_CMD_CREATE_AH) \|
606	(1ull << IB_USER_VERBS_CMD_MODIFY_AH) \|
607	(1ull << IB_USER_VERBS_CMD_QUERY_AH) \|
608	(1ull << IB_USER_VERBS_CMD_DESTROY_AH) \|
609	(1ull << IB_USER_VERBS_CMD_REG_MR) \|
610	(1ull << IB_USER_VERBS_CMD_DEREG_MR) \|
611	(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) \|
612	(1ull << IB_USER_VERBS_CMD_CREATE_CQ) \|
613	(1ull << IB_USER_VERBS_CMD_RESIZE_CQ) \|
614	(1ull << IB_USER_VERBS_CMD_DESTROY_CQ) \|
615	(1ull << IB_USER_VERBS_CMD_POLL_CQ) \|	593	(1ull << IB_USER_VERBS_CMD_POLL_CQ) \|
616	(1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) \|	594	(1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) \|
617	(1ull << IB_USER_VERBS_CMD_CREATE_QP) \|
618	(1ull << IB_USER_VERBS_CMD_QUERY_QP) \|
619	(1ull << IB_USER_VERBS_CMD_MODIFY_QP) \|
620	(1ull << IB_USER_VERBS_CMD_DESTROY_QP) \|
621	(1ull << IB_USER_VERBS_CMD_POST_SEND) \|	595	(1ull << IB_USER_VERBS_CMD_POST_SEND) \|
622	(1ull << IB_USER_VERBS_CMD_POST_RECV) \|	596	(1ull << IB_USER_VERBS_CMD_POST_RECV) \|
623	(1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) \|
624	(1ull << IB_USER_VERBS_CMD_DETACH_MCAST) \|
625	(1ull << IB_USER_VERBS_CMD_CREATE_SRQ) \|
626	(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) \|
627	(1ull << IB_USER_VERBS_CMD_QUERY_SRQ) \|
628	(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) \|
629	(1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);	597	(1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
630	rdi->ibdev.node_type = RDMA_NODE_IB_CA;	598	rdi->ibdev.node_type = RDMA_NODE_IB_CA;
631	if (!rdi->ibdev.num_comp_vectors)	599	if (!rdi->ibdev.num_comp_vectors)

drivers/infiniband/sw/rxe/Kconfig+0−1

@@ -5,7 +5,6 @@ config RDMA_RXE · 4 unmodified lines
5	depends on INFINIBAND_VIRT_DMA	5	depends on INFINIBAND_VIRT_DMA
6	select NET_UDP_TUNNEL	6	select NET_UDP_TUNNEL
7	select CRYPTO_CRC32	7	select CRYPTO_CRC32
8	select DMA_VIRT_OPS
9	help	8	help
10	This driver implements the InfiniBand RDMA transport over	9	This driver implements the InfiniBand RDMA transport over
11	the Linux network stack. It enables a system with a	10	the Linux network stack. It enables a system with a

drivers/infiniband/sw/rxe/rxe_cq.c+0−5

@@ -123,11 +123,6 @@ int rxe_cq_post(struct rxe_cq cq, struct rxe_cqe cqe, int solicited) · 122 unmodified lines
123		123
124	memcpy(producer_addr(cq->queue), cqe, sizeof(*cqe));	124	memcpy(producer_addr(cq->queue), cqe, sizeof(*cqe));
125		125
126	/* make sure all changes to the CQ are written before we update the
127	* producer pointer
128	*/
129	smp_wmb();
130
131	advance_producer(cq->queue);	126	advance_producer(cq->queue);
132	spin_unlock_irqrestore(&cq->cq_lock, flags);	127	spin_unlock_irqrestore(&cq->cq_lock, flags);
133		128

drivers/infiniband/sw/rxe/rxe_mr.c+0−1

@@ -31,7 +31,6 @@ int mem_check_range(struct rxe_mem *mem, u64 iova, size_t length) · 30 unmodified lines
31	return 0;	31	return 0;
32		32
33	case RXE_MEM_TYPE_MR:	33	case RXE_MEM_TYPE_MR:
34	case RXE_MEM_TYPE_FMR:
35	if (iova < mem->iova \|\|	34	if (iova < mem->iova \|\|
36	length > mem->length \|\|	35	length > mem->length \|\|
37	iova > mem->iova + mem->length - length)	36	iova > mem->iova + mem->length - length)

drivers/infiniband/sw/rxe/rxe_net.c+0−18

 #include <linux/if_arp.h>
 #include <linux/netdevice.h>
 #include <linux/if.h>
-#include <linux/if_vlan.h>
 #include <net/udp_tunnel.h>
 #include <net/sch_generic.h>
 #include <linux/netfilter.h>
 static struct rxe_recv_sockets recv_sockets;
-struct device *rxe_dma_device(struct rxe_dev *rxe)
-{
-	struct net_device *ndev;
-	ndev = rxe->ndev;
-	if (is_vlan_dev(ndev))
-		ndev = vlan_dev_real_dev(ndev);
-	return ndev->dev.parent;
-}
 int rxe_mcast_add(struct rxe_dev *rxe, union ib_gid *mgid)
 {
 	int err;
 {
 	struct udphdr *udph;
 	struct net_device *ndev = skb->dev;
-	struct net_device *rdev = ndev;
 	struct rxe_dev *rxe = rxe_get_dev_from_net(ndev);
 	struct rxe_pkt_info *pkt = SKB_TO_PKT(skb);
-	if (!rxe && is_vlan_dev(rdev)) {
-		rdev = vlan_dev_real_dev(ndev);
-		rxe = rxe_get_dev_from_net(rdev);
-	}
 	if (!rxe)
 		goto drop;

drivers/infiniband/sw/rxe/rxe_queue.h+60−34

@@ -7,9 +7,11 @@ · 6 unmodified lines
7	#ifndef RXE_QUEUE_H	7	#ifndef RXE_QUEUE_H
8	#define RXE_QUEUE_H	8	#define RXE_QUEUE_H
9		9
		10	/* for definition of shared struct rxe_queue_buf */
		11	#include <uapi/rdma/rdma_user_rxe.h>
		12
10	/* implements a simple circular buffer that can optionally be	13	/* implements a simple circular buffer that can optionally be
11	* shared between user space and the kernel and can be resized	14	* shared between user space and the kernel and can be resized
12
13	* the requested element size is rounded up to a power of 2	15	* the requested element size is rounded up to a power of 2
14	* and the number of elements in the buffer is also rounded	16	* and the number of elements in the buffer is also rounded
15	* up to a power of 2. Since the queue is empty when the	17	* up to a power of 2. Since the queue is empty when the
@@ -17,28 +19,6 @@ · 1 unmodified line
17	* of the queue is one less than the number of element slots	19	* of the queue is one less than the number of element slots
18	*/	20	*/
19		21
20	/* this data structure is shared between user space and kernel
21	* space for those cases where the queue is shared. It contains
22	* the producer and consumer indices. Is also contains a copy
23	* of the queue size parameters for user space to use but the
24	* kernel must use the parameters in the rxe_queue struct
25	* this MUST MATCH the corresponding librxe struct
26	* for performance reasons arrange to have producer and consumer
27	* pointers in separate cache lines
28	* the kernel should always mask the indices to avoid accessing
29	* memory outside of the data area
30	*/
31	struct rxe_queue_buf {
32	__u32 log2_elem_size;
33	__u32 index_mask;
34	__u32 pad_1[30];
35	__u32 producer_index;
36	__u32 pad_2[31];
37	__u32 consumer_index;
38	__u32 pad_3[31];
39	__u8 data[];
40	};
41
42	struct rxe_queue {	22	struct rxe_queue {
43	struct rxe_dev *rxe;	23	struct rxe_dev *rxe;
44	struct rxe_queue_buf *buf;	24	struct rxe_queue_buf *buf;
@@ -46,7 +26,7 @@ struct rxe_queue { · 1 unmodified line
46	size_t buf_size;	26	size_t buf_size;
47	size_t elem_size;	27	size_t elem_size;
48	unsigned int log2_elem_size;	28	unsigned int log2_elem_size;
49	unsigned int index_mask;	29	u32 index_mask;
50	};	30	};
51		31
52	int do_mmap_info(struct rxe_dev rxe, struct mminfo __user outbuf,	32	int do_mmap_info(struct rxe_dev rxe, struct mminfo __user outbuf,
@@ -76,26 +56,56 @@ static inline int next_index(struct rxe_queue *q, int index) · 23 unmodified lines
76		56
77	static inline int queue_empty(struct rxe_queue *q)	57	static inline int queue_empty(struct rxe_queue *q)
78	{	58	{
79	return ((q->buf->producer_index - q->buf->consumer_index)	59	u32 prod;
80	& q->index_mask) == 0;	60	u32 cons;
		61
		62	/* make sure all changes to queue complete before
		63	* testing queue empty
		64	*/
		65	prod = smp_load_acquire(&q->buf->producer_index);
		66	/* same */
		67	cons = smp_load_acquire(&q->buf->consumer_index);
		68
		69	return ((prod - cons) & q->index_mask) == 0;
81	}	70	}
82		71
83	static inline int queue_full(struct rxe_queue *q)	72	static inline int queue_full(struct rxe_queue *q)
84	{	73	{
85	return ((q->buf->producer_index + 1 - q->buf->consumer_index)	74	u32 prod;
86	& q->index_mask) == 0;	75	u32 cons;
		76
		77	/* make sure all changes to queue complete before
		78	* testing queue full
		79	*/
		80	prod = smp_load_acquire(&q->buf->producer_index);
		81	/* same */
		82	cons = smp_load_acquire(&q->buf->consumer_index);
		83
		84	return ((prod + 1 - cons) & q->index_mask) == 0;
87	}	85	}
88		86
89	static inline void advance_producer(struct rxe_queue *q)	87	static inline void advance_producer(struct rxe_queue *q)
90	{	88	{
91	q->buf->producer_index = (q->buf->producer_index + 1)	89	u32 prod;
92	& q->index_mask;	90
		91	prod = (q->buf->producer_index + 1) & q->index_mask;
		92
		93	/* make sure all changes to queue complete before
		94	* changing producer index
		95	*/
		96	smp_store_release(&q->buf->producer_index, prod);
93	}	97	}
94		98
95	static inline void advance_consumer(struct rxe_queue *q)	99	static inline void advance_consumer(struct rxe_queue *q)
96	{	100	{
97	q->buf->consumer_index = (q->buf->consumer_index + 1)	101	u32 cons;
98	& q->index_mask;	102
		103	cons = (q->buf->consumer_index + 1) & q->index_mask;
		104
		105	/* make sure all changes to queue complete before
		106	* changing consumer index
		107	*/
		108	smp_store_release(&q->buf->consumer_index, cons);
99	}	109	}
100		110
101	static inline void producer_addr(struct rxe_queue q)	111	static inline void producer_addr(struct rxe_queue q)
@@ -112,12 +122,28 @@ static inline void consumer_addr(struct rxe_queue q) · 10 unmodified lines
112		122
113	static inline unsigned int producer_index(struct rxe_queue *q)	123	static inline unsigned int producer_index(struct rxe_queue *q)
114	{	124	{
115	return q->buf->producer_index;	125	u32 index;
		126
		127	/* make sure all changes to queue
		128	* complete before getting producer index
		129	*/
		130	index = smp_load_acquire(&q->buf->producer_index);
		131	index &= q->index_mask;
		132
		133	return index;
116	}	134	}
117		135
118	static inline unsigned int consumer_index(struct rxe_queue *q)	136	static inline unsigned int consumer_index(struct rxe_queue *q)
119	{	137	{
120	return q->buf->consumer_index;	138	u32 index;
		139
		140	/* make sure all changes to queue
		141	* complete before getting consumer index
		142	*/
		143	index = smp_load_acquire(&q->buf->consumer_index);
		144	index &= q->index_mask;
		145
		146	return index;
121	}	147	}
122		148
123	static inline void addr_from_index(struct rxe_queue q, unsigned int index)	149	static inline void addr_from_index(struct rxe_queue q, unsigned int index)

drivers/infiniband/sw/rxe/rxe_req.c+2−1

@@ -634,7 +634,8 @@ next_wqe: · 633 unmodified lines
634	}	634	}
635		635
636	if (unlikely(qp_type(qp) == IB_QPT_RC &&	636	if (unlikely(qp_type(qp) == IB_QPT_RC &&
637	qp->req.psn > (qp->comp.psn + RXE_MAX_UNACKED_PSNS))) {	637	psn_compare(qp->req.psn, (qp->comp.psn +
		638	RXE_MAX_UNACKED_PSNS)) > 0)) {
638	qp->req.wait_psn = 1;	639	qp->req.wait_psn = 1;
639	goto exit;	640	goto exit;
640	}	641	}

drivers/infiniband/sw/rxe/rxe_resp.c+0−5

 			else
 				wc->network_hdr_type = RDMA_NETWORK_IPV6;
-			if (is_vlan_dev(skb->dev)) {
-				wc->wc_flags |= IB_WC_WITH_VLAN;
-				wc->vlan_id = vlan_dev_vlan_id(skb->dev);
-			}
 			if (pkt->mask & RXE_IMMDT_MASK) {
 				wc->wc_flags |= IB_WC_WITH_IMM;
 				wc->ex.imm_data = immdt_imm(pkt);

drivers/infiniband/sw/rxe/rxe_verbs.c+14−53

 	recv_wqe->dma.cur_sge		= 0;
 	recv_wqe->dma.sge_offset	= 0;
-	/* make sure all changes to the work queue are written before we
-	 * update the producer pointer
-	 */
-	smp_wmb();
 	advance_producer(rq->queue);
 	return 0;
 	struct rxe_srq *srq = to_rsrq(ibsrq);
 	struct rxe_create_srq_resp __user *uresp = NULL;
+	if (init->srq_type != IB_SRQT_BASIC)
+		return -EOPNOTSUPP;
 	if (udata) {
 		if (udata->outlen < sizeof(*uresp))
 			return -EINVAL;
 		uresp = udata->outbuf;
 	}
+	if (init->create_flags)
+		return ERR_PTR(-EOPNOTSUPP);
 	err = rxe_qp_chk_init(rxe, init);
 	if (err)
 		goto err1;
 	struct rxe_dev *rxe = to_rdev(ibqp->device);
 	struct rxe_qp *qp = to_rqp(ibqp);
+	if (mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	err = rxe_qp_chk_attr(rxe, qp, attr, mask);
 	if (err)
 		goto err1;
 	if (unlikely(err))
 		goto err1;
-	/*
-	 * make sure all changes to the work queue are
-	 * written before we update the producer pointer
-	 */
-	smp_wmb();
 	advance_producer(sq->queue);
 	spin_unlock_irqrestore(&qp->sq.sq_lock, flags);
 	}
 	if (attr->flags)
-		return -EINVAL;
+		return -EOPNOTSUPP;
 	err = rxe_cq_chk_attr(rxe, NULL, attr->cqe, attr->comp_vector);
 	if (err)
 	struct rxe_dev *rxe =
 		rdma_device_to_drv_device(device, struct rxe_dev, ib_dev);
-	return scnprintf(buf, PAGE_SIZE, "%s\n", rxe_parent_name(rxe, 1));
+	return sysfs_emit(buf, "%s\n", rxe_parent_name(rxe, 1));
 }
 static DEVICE_ATTR_RO(parent);
 	.create_cq = rxe_create_cq,
 	.create_qp = rxe_create_qp,
 	.create_srq = rxe_create_srq,
+	.create_user_ah = rxe_create_ah,
 	.dealloc_driver = rxe_dealloc,
 	.dealloc_pd = rxe_dealloc_pd,
 	.dealloc_ucontext = rxe_dealloc_ucontext,
 	int err;
 	struct ib_device *dev = &rxe->ib_dev;
 	struct crypto_shash *tfm;
-	u64 dma_mask;
 	strlcpy(dev->node_desc, "rxe", sizeof(dev->node_desc));
 	dev->node_type = RDMA_NODE_IB_CA;
 	dev->phys_port_cnt = 1;
 	dev->num_comp_vectors = num_possible_cpus();
-	dev->dev.parent = rxe_dma_device(rxe);
 	dev->local_dma_lkey = 0;
 	addrconf_addr_eui48((unsigned char *)&dev->node_guid,
 			    rxe->ndev->dev_addr);
-	dev->dev.dma_parms = &rxe->dma_parms;
-	dma_set_max_seg_size(&dev->dev, UINT_MAX);
-	dma_mask = IS_ENABLED(CONFIG_64BIT) ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32);
-	err = dma_coerce_mask_and_coherent(&dev->dev, dma_mask);
-	if (err)
-		return err;
-	dev->uverbs_cmd_mask = BIT_ULL(IB_USER_VERBS_CMD_GET_CONTEXT)
+	dev->uverbs_cmd_mask |= BIT_ULL(IB_USER_VERBS_CMD_POST_SEND) |
-	    | BIT_ULL(IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL)
+				BIT_ULL(IB_USER_VERBS_CMD_REQ_NOTIFY_CQ);
-	    | BIT_ULL(IB_USER_VERBS_CMD_QUERY_DEVICE)
-	    | BIT_ULL(IB_USER_VERBS_CMD_QUERY_PORT)
-	    | BIT_ULL(IB_USER_VERBS_CMD_ALLOC_PD)
-	    | BIT_ULL(IB_USER_VERBS_CMD_DEALLOC_PD)
-	    | BIT_ULL(IB_USER_VERBS_CMD_CREATE_SRQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_MODIFY_SRQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_QUERY_SRQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_DESTROY_SRQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_POST_SRQ_RECV)
-	    | BIT_ULL(IB_USER_VERBS_CMD_CREATE_QP)
-	    | BIT_ULL(IB_USER_VERBS_CMD_MODIFY_QP)
-	    | BIT_ULL(IB_USER_VERBS_CMD_QUERY_QP)
-	    | BIT_ULL(IB_USER_VERBS_CMD_DESTROY_QP)
-	    | BIT_ULL(IB_USER_VERBS_CMD_POST_SEND)
-	    | BIT_ULL(IB_USER_VERBS_CMD_POST_RECV)
-	    | BIT_ULL(IB_USER_VERBS_CMD_CREATE_CQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_RESIZE_CQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_DESTROY_CQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_POLL_CQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_PEEK_CQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_REQ_NOTIFY_CQ)
-	    | BIT_ULL(IB_USER_VERBS_CMD_REG_MR)
-	    | BIT_ULL(IB_USER_VERBS_CMD_DEREG_MR)
-	    | BIT_ULL(IB_USER_VERBS_CMD_CREATE_AH)
-	    | BIT_ULL(IB_USER_VERBS_CMD_MODIFY_AH)
-	    | BIT_ULL(IB_USER_VERBS_CMD_QUERY_AH)
-	    | BIT_ULL(IB_USER_VERBS_CMD_DESTROY_AH)
-	    | BIT_ULL(IB_USER_VERBS_CMD_ATTACH_MCAST)
-	    | BIT_ULL(IB_USER_VERBS_CMD_DETACH_MCAST)
-	    ;
 	ib_set_device_ops(dev, &rxe_dev_ops);
 	err = ib_device_set_netdev(&rxe->ib_dev, rxe->ndev, 1);

drivers/infiniband/sw/rxe/rxe_verbs.h+0−2

 	RXE_MEM_TYPE_NONE,
 	RXE_MEM_TYPE_DMA,
 	RXE_MEM_TYPE_MR,
-	RXE_MEM_TYPE_FMR,
 	RXE_MEM_TYPE_MW,
 };
 struct rxe_dev {
 	struct ib_device	ib_dev;
 	struct ib_device_attr	attr;
-	struct device_dma_parameters dma_parms;
 	int			max_ucontext;
 	int			max_inline_data;
 	struct mutex	usdev_lock;

drivers/infiniband/sw/siw/Kconfig+0−1

@@ -2,7 +2,6 @@ config RDMA_SIW · 1 unmodified line
2	tristate "Software RDMA over TCP/IP (iWARP) driver"	2	tristate "Software RDMA over TCP/IP (iWARP) driver"
3	depends on INET && INFINIBAND && LIBCRC32C	3	depends on INET && INFINIBAND && LIBCRC32C
4	depends on INFINIBAND_VIRT_DMA	4	depends on INFINIBAND_VIRT_DMA
5	select DMA_VIRT_OPS
6	help	5	help
7	This driver implements the iWARP RDMA transport over	6	This driver implements the iWARP RDMA transport over
8	the Linux TCP/IP network stack. It enables a system with a	7	the Linux TCP/IP network stack. It enables a system with a

drivers/infiniband/sw/siw/siw.h+0−1

@@ -69,7 +69,6 @@ struct siw_pd { · 68 unmodified lines
69		69
70	struct siw_device {	70	struct siw_device {
71	struct ib_device base_dev;	71	struct ib_device base_dev;
72	struct device_dma_parameters dma_parms;
73	struct net_device *netdev;	72	struct net_device *netdev;
74	struct siw_dev_cap attrs;	73	struct siw_dev_cap attrs;
75		74

drivers/infiniband/sw/siw/siw_cm.c+1−1

@@ -1047,7 +1047,7 @@ static void siw_cm_work_handler(struct work_struct *w) · 1046 unmodified lines
1047	cep->state);	1047	cep->state);
1048	}	1048	}
1049	}	1049	}
1050	if (rv && rv != EAGAIN)	1050	if (rv && rv != -EAGAIN)
1051	release_cep = 1;	1051	release_cep = 1;
1052	break;	1052	break;
1053		1053

drivers/infiniband/sw/siw/siw_main.c+3−49

@@ -305,25 +305,8 @@ static struct siw_device siw_device_create(struct net_device netdev) · 304 unmodified lines
305	{	305	{
306	struct siw_device *sdev = NULL;	306	struct siw_device *sdev = NULL;
307	struct ib_device *base_dev;	307	struct ib_device *base_dev;
308	struct device *parent = netdev->dev.parent;
309	u64 dma_mask;
310	int rv;	308	int rv;
311		309
312	if (!parent) {
313	/*
314	* The loopback device has no parent device,
315	* so it appears as a top-level device. To support
316	* loopback device connectivity, take this device
317	* as the parent device. Skip all other devices
318	* w/o parent device.
319	*/
320	if (netdev->type != ARPHRD_LOOPBACK) {
321	pr_warn("siw: device %s error: no parent device\n",
322	netdev->name);
323	return NULL;
324	}
325	parent = &netdev->dev;
326	}
327	sdev = ib_alloc_device(siw_device, base_dev);	310	sdev = ib_alloc_device(siw_device, base_dev);
328	if (!sdev)	311	if (!sdev)
329	return NULL;	312	return NULL;
@@ -347,30 +330,8 @@ static struct siw_device siw_device_create(struct net_device netdev) · 17 unmodified lines
347	addrconf_addr_eui48((unsigned char *)&base_dev->node_guid,	330	addrconf_addr_eui48((unsigned char *)&base_dev->node_guid,
348	addr);	331	addr);
349	}	332	}
350	base_dev->uverbs_cmd_mask =	333
351	(1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) \|	334	base_dev->uverbs_cmd_mask \|= BIT_ULL(IB_USER_VERBS_CMD_POST_SEND);
352	(1ull << IB_USER_VERBS_CMD_QUERY_PORT) \|
353	(1ull << IB_USER_VERBS_CMD_GET_CONTEXT) \|
354	(1ull << IB_USER_VERBS_CMD_ALLOC_PD) \|
355	(1ull << IB_USER_VERBS_CMD_DEALLOC_PD) \|
356	(1ull << IB_USER_VERBS_CMD_REG_MR) \|
357	(1ull << IB_USER_VERBS_CMD_DEREG_MR) \|
358	(1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) \|
359	(1ull << IB_USER_VERBS_CMD_CREATE_CQ) \|
360	(1ull << IB_USER_VERBS_CMD_POLL_CQ) \|
361	(1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) \|
362	(1ull << IB_USER_VERBS_CMD_DESTROY_CQ) \|
363	(1ull << IB_USER_VERBS_CMD_CREATE_QP) \|
364	(1ull << IB_USER_VERBS_CMD_QUERY_QP) \|
365	(1ull << IB_USER_VERBS_CMD_MODIFY_QP) \|
366	(1ull << IB_USER_VERBS_CMD_DESTROY_QP) \|
367	(1ull << IB_USER_VERBS_CMD_POST_SEND) \|
368	(1ull << IB_USER_VERBS_CMD_POST_RECV) \|
369	(1ull << IB_USER_VERBS_CMD_CREATE_SRQ) \|
370	(1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV) \|
371	(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) \|
372	(1ull << IB_USER_VERBS_CMD_QUERY_SRQ) \|
373	(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
374		335
375	base_dev->node_type = RDMA_NODE_RNIC;	336	base_dev->node_type = RDMA_NODE_RNIC;
376	memcpy(base_dev->node_desc, SIW_NODE_DESC_COMMON,	337	memcpy(base_dev->node_desc, SIW_NODE_DESC_COMMON,
@@ -382,13 +343,6 @@ static struct siw_device siw_device_create(struct net_device netdev) · 5 unmodified lines
382	* per physical port.	343	* per physical port.
383	*/	344	*/
384	base_dev->phys_port_cnt = 1;	345	base_dev->phys_port_cnt = 1;
385	base_dev->dev.parent = parent;
386	base_dev->dev.dma_parms = &sdev->dma_parms;
387	dma_set_max_seg_size(&base_dev->dev, UINT_MAX);
388	dma_mask = IS_ENABLED(CONFIG_64BIT) ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32);
389	if (dma_coerce_mask_and_coherent(&base_dev->dev, dma_mask))
390	goto error;
391
392	base_dev->num_comp_vectors = num_possible_cpus();	346	base_dev->num_comp_vectors = num_possible_cpus();
393		347
394	xa_init_flags(&sdev->qp_xa, XA_FLAGS_ALLOC1);	348	xa_init_flags(&sdev->qp_xa, XA_FLAGS_ALLOC1);
@@ -430,7 +384,7 @@ static struct siw_device siw_device_create(struct net_device netdev) · 35 unmodified lines
430	atomic_set(&sdev->num_mr, 0);	384	atomic_set(&sdev->num_mr, 0);
431	atomic_set(&sdev->num_pd, 0);	385	atomic_set(&sdev->num_pd, 0);
432		386
433	sdev->numa_node = dev_to_node(parent);	387	sdev->numa_node = dev_to_node(&netdev->dev);
434	spin_lock_init(&sdev->lock);	388	spin_lock_init(&sdev->lock);
435		389
436	return sdev;	390	return sdev;

drivers/infiniband/sw/siw/siw_verbs.c+12−0

 	siw_dbg(base_dev, "create new QP\n");
+	if (attrs->create_flags)
+		return ERR_PTR(-EOPNOTSUPP);
 	if (atomic_inc_return(&sdev->num_qp) > SIW_MAX_QP) {
 		siw_dbg(base_dev, "too many QP's\n");
 		rv = -ENOMEM;
 	if (!attr_mask)
 		return 0;
+	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
+		return -EOPNOTSUPP;
 	memset(&new_attrs, 0, sizeof(new_attrs));
 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
 	struct siw_cq *cq = to_siw_cq(base_cq);
 	int rv, size = attr->cqe;
+	if (attr->flags)
+		return -EOPNOTSUPP;
 	if (atomic_inc_return(&sdev->num_cq) > SIW_MAX_CQ) {
 		siw_dbg(base_cq->device, "too many CQ's\n");
 		rv = -ENOMEM;
 					  base_ucontext);
 	int rv;
+	if (init_attrs->srq_type != IB_SRQT_BASIC)
+		return -EOPNOTSUPP;
 	if (atomic_inc_return(&sdev->num_srq) > SIW_MAX_SRQ) {
 		siw_dbg_pd(base_srq->pd, "too many SRQ's\n");
 		rv = -ENOMEM;

drivers/infiniband/ulp/ipoib/ipoib_cm.c+2−2

@@ -1514,9 +1514,9 @@ static ssize_t show_mode(struct device d, struct device_attribute attr, · 1513 unmodified lines
1514	struct ipoib_dev_priv *priv = ipoib_priv(dev);	1514	struct ipoib_dev_priv *priv = ipoib_priv(dev);
1515		1515
1516	if (test_bit(IPOIB_FLAG_ADMIN_CM, &priv->flags))	1516	if (test_bit(IPOIB_FLAG_ADMIN_CM, &priv->flags))
1517	return sprintf(buf, "connected\n");	1517	return sysfs_emit(buf, "connected\n");
1518	else	1518	else
1519	return sprintf(buf, "datagram\n");	1519	return sysfs_emit(buf, "datagram\n");
1520	}	1520	}
1521		1521
1522	static ssize_t set_mode(struct device d, struct device_attribute attr,	1522	static ssize_t set_mode(struct device d, struct device_attribute attr,

drivers/infiniband/ulp/ipoib/ipoib_ethtool.c+4−0

 		return SPEED_14000;
 	case IB_SPEED_EDR:
 		return SPEED_25000;
+	case IB_SPEED_HDR:
+		return SPEED_50000;
+	case IB_SPEED_NDR:
+		return SPEED_100000;
 	}
 	return SPEED_UNKNOWN;

drivers/infiniband/ulp/ipoib/ipoib_main.c+4−3

 	struct net_device *ndev = to_net_dev(dev);
 	struct ipoib_dev_priv *priv = ipoib_priv(ndev);
-	return sprintf(buf, "0x%04x\n", priv->pkey);
+	return sysfs_emit(buf, "0x%04x\n", priv->pkey);
 }
 static DEVICE_ATTR(pkey, S_IRUGO, show_pkey, NULL);
 	struct net_device *ndev = to_net_dev(dev);
 	struct ipoib_dev_priv *priv = ipoib_priv(ndev);
-	return sprintf(buf, "%d\n", test_bit(IPOIB_FLAG_UMCAST, &priv->flags));
+	return sysfs_emit(buf, "%d\n",
+			  test_bit(IPOIB_FLAG_UMCAST, &priv->flags));
 }
 void ipoib_set_umcast(struct net_device *ndev, int umcast_val)
 			"\"%s\" wants to know my dev_id. Should it look at dev_port instead? See Documentation/ABI/testing/sysfs-class-net for more info.\n",
 			current->comm);
-	return sprintf(buf, "%#x\n", ndev->dev_id);
+	return sysfs_emit(buf, "%#x\n", ndev->dev_id);
 }
 static DEVICE_ATTR_RO(dev_id);

drivers/infiniband/ulp/ipoib/ipoib_verbs.c+2−2

 	int ret, size, req_vec;
 	int i;
+	static atomic_t counter;
 	size = ipoib_recvq_size + 1;
 	ret = ipoib_cm_dev_init(dev);
 		if (ret != -EOPNOTSUPP)
 			return ret;
-	req_vec = (priv->port - 1) * 2;
+	req_vec = atomic_inc_return(&counter) * 2;
 	cq_attr.cqe = size;
 	cq_attr.comp_vector = req_vec % priv->ca->num_comp_vectors;
 	priv->recv_cq = ib_create_cq(priv->ca, ipoib_ib_rx_completion, NULL,

drivers/infiniband/ulp/ipoib/ipoib_vlan.c+1−1

@@ -46,7 +46,7 @@ static ssize_t show_parent(struct device d, struct device_attribute attr, · 45 unmodified lines
46	struct net_device *dev = to_net_dev(d);	46	struct net_device *dev = to_net_dev(d);
47	struct ipoib_dev_priv *priv = ipoib_priv(dev);	47	struct ipoib_dev_priv *priv = ipoib_priv(dev);
48		48
49	return sprintf(buf, "%s\n", priv->parent->name);	49	return sysfs_emit(buf, "%s\n", priv->parent->name);
50	}	50	}
51	static DEVICE_ATTR(parent, S_IRUGO, show_parent, NULL);	51	static DEVICE_ATTR(parent, S_IRUGO, show_parent, NULL);
52		52

drivers/infiniband/ulp/iser/iscsi_iser.c+6−18

 	struct iser_device *device = iser_conn->ib_conn.device;
 	struct iscsi_iser_task *iser_task = task->dd_data;
 	u64 dma_addr;
-	const bool mgmt_task = !task->sc && !in_interrupt();
-	int ret = 0;
-	if (unlikely(mgmt_task))
+	if (unlikely(iser_conn->state != ISER_CONN_UP))
-		mutex_lock(&iser_conn->state_mutex);
+		return -ENODEV;
-	if (unlikely(iser_conn->state != ISER_CONN_UP)) {
-		ret = -ENODEV;
-		goto out;
-	}
 	dma_addr = ib_dma_map_single(device->ib_device, (void *)tx_desc,
 				ISER_HEADERS_LEN, DMA_TO_DEVICE);
-	if (ib_dma_mapping_error(device->ib_device, dma_addr)) {
+	if (ib_dma_mapping_error(device->ib_device, dma_addr))
-		ret = -ENOMEM;
+		return -ENOMEM;
-		goto out;
-	}
 	tx_desc->inv_wr.next = NULL;
 	tx_desc->reg_wr.wr.next = NULL;
 	tx_desc->tx_sg[0].lkey   = device->pd->local_dma_lkey;
 	iser_task->iser_conn = iser_conn;
-out:
-	if (unlikely(mgmt_task))
-		mutex_unlock(&iser_conn->state_mutex);
-	return ret;
+	return 0;
 }
 /**
 }
 /**
- * iscsi_iser_set_param() - set class connection parameter
+ * iscsi_iser_conn_get_stats() - get iscsi connection statistics
  * @cls_conn:    iscsi class connection
  * @stats:       iscsi stats to output
  *

drivers/infiniband/ulp/isert/ib_isert.c+27−2

 module_param_named(debug_level, isert_debug_level, int, 0644);
 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0 (default:0)");
+static int isert_sg_tablesize_set(const char *val,
+				  const struct kernel_param *kp);
+static const struct kernel_param_ops sg_tablesize_ops = {
+	.set = isert_sg_tablesize_set,
+	.get = param_get_int,
+};
+static int isert_sg_tablesize = ISCSI_ISER_DEF_SG_TABLESIZE;
+module_param_cb(sg_tablesize, &sg_tablesize_ops, &isert_sg_tablesize, 0644);
+MODULE_PARM_DESC(sg_tablesize,
+		 "Number of gather/scatter entries in a single scsi command, should >= 128 (default: 256, max: 4096)");
 static DEFINE_MUTEX(device_list_mutex);
 static LIST_HEAD(device_list);
 static struct workqueue_struct *isert_comp_wq;
 static void isert_login_recv_done(struct ib_cq *cq, struct ib_wc *wc);
 static void isert_login_send_done(struct ib_cq *cq, struct ib_wc *wc);
+static int isert_sg_tablesize_set(const char *val, const struct kernel_param *kp)
+{
+	int n = 0, ret;
+	ret = kstrtoint(val, 10, &n);
+	if (ret != 0 || n < ISCSI_ISER_MIN_SG_TABLESIZE ||
+	    n > ISCSI_ISER_MAX_SG_TABLESIZE)
+		return -EINVAL;
+	return param_set_int(val, kp);
+}
 static inline bool
 isert_prot_cmd(struct isert_conn *conn, struct se_cmd *cmd)
 {
 	attr.cap.max_send_wr = ISERT_QP_MAX_REQ_DTOS + 1;
 	attr.cap.max_recv_wr = ISERT_QP_MAX_RECV_DTOS + 1;
 	factor = rdma_rw_mr_factor(device->ib_device, cma_id->port_num,
-				   ISCSI_ISER_MAX_SG_TABLESIZE);
+				   isert_sg_tablesize);
 	attr.cap.max_rdma_ctxs = ISCSI_DEF_XMIT_CMDS_MAX * factor;
 	attr.cap.max_send_sge = device->ib_device->attrs.max_send_sge;
 	attr.cap.max_recv_sge = 1;
 sequence_cmd:
 	rc = iscsit_sequence_cmd(conn, cmd, buf, hdr->cmdsn);
-	if (!rc && dump_payload == false && unsol_data)
+	if (!rc && !dump_payload && unsol_data)
 		iscsit_set_unsolicited_dataout(cmd);
 	else if (dump_payload && imm_data)
 		target_put_sess_cmd(&cmd->se_cmd);

drivers/infiniband/ulp/isert/ib_isert.h+6−0

  */
 #define ISER_RX_SIZE		(ISCSI_DEF_MAX_RECV_SEG_LEN + 1024)
+/* Default I/O size is 1MB */
+#define ISCSI_ISER_DEF_SG_TABLESIZE 256
+/* Minimum I/O size is 512KB */
+#define ISCSI_ISER_MIN_SG_TABLESIZE 128
 /* Maximum support is 16MB I/O size */
 #define ISCSI_ISER_MAX_SG_TABLESIZE	4096

drivers/infiniband/ulp/opa_vnic/opa_vnic_encap.h+1−1

@@ -437,7 +437,7 @@ struct opa_veswport_trap { · 436 unmodified lines
437	} __packed;	437	} __packed;
438		438
439	/**	439	/**
440	* struct opa_vnic_iface_macs_entry - single entry in the mac list	440	* struct opa_vnic_iface_mac_entry - single entry in the mac list
441	* @mac_addr: MAC address	441	* @mac_addr: MAC address
442	*/	442	*/
443	struct opa_vnic_iface_mac_entry {	443	struct opa_vnic_iface_mac_entry {

drivers/infiniband/ulp/opa_vnic/opa_vnic_vema_iface.c+1−1

@@ -74,7 +74,7 @@ void opa_vnic_vema_report_event(struct opa_vnic_adapter *adapter, u8 event) · 73 unmodified lines
74	}	74	}
75		75
76	/**	76	/**
77	* opa_vnic_get_error_counters - get summary counters	77	* opa_vnic_get_summary_counters - get summary counters
78	* @adapter: vnic port adapter	78	* @adapter: vnic port adapter
79	* @cntrs: pointer to destination summary counters structure	79	* @cntrs: pointer to destination summary counters structure
80	*	80	*

drivers/infiniband/ulp/rtrs/rtrs-clt-sysfs.c+31−31

 {
 	struct rtrs_clt *clt = container_of(dev, struct rtrs_clt, dev);
-	return sprintf(page, "%d\n", rtrs_clt_get_max_reconnect_attempts(clt));
+	return sysfs_emit(page, "%d\n",
+			  rtrs_clt_get_max_reconnect_attempts(clt));
 }
 static ssize_t max_reconnect_attempts_store(struct device *dev,
 	switch (clt->mp_policy) {
 	case MP_POLICY_RR:
-		return sprintf(page, "round-robin (RR: %d)\n", clt->mp_policy);
+		return sysfs_emit(page, "round-robin (RR: %d)\n",
+				  clt->mp_policy);
 	case MP_POLICY_MIN_INFLIGHT:
-		return sprintf(page, "min-inflight (MI: %d)\n", clt->mp_policy);
+		return sysfs_emit(page, "min-inflight (MI: %d)\n",
+				  clt->mp_policy);
 	default:
-		return sprintf(page, "Unknown (%d)\n", clt->mp_policy);
+		return sysfs_emit(page, "Unknown (%d)\n", clt->mp_policy);
 	}
 }
 static ssize_t add_path_show(struct device *dev,
 			     struct device_attribute *attr, char *page)
 {
-	return scnprintf(page, PAGE_SIZE,
+	return sysfs_emit(
-			 "Usage: echo [<source addr>@]<destination addr> > %s\n\n*addr ::= [ ip:<ipv4|ipv6> | gid:<gid> ]\n",
+		page,
-			 attr->attr.name);
+		"Usage: echo [<source addr>@]<destination addr> > %s\n\n*addr ::= [ ip:<ipv4|ipv6> | gid:<gid> ]\n",
+		attr->attr.name);
 }
 static ssize_t add_path_store(struct device *dev,
 	sess = container_of(kobj, struct rtrs_clt_sess, kobj);
 	if (sess->state == RTRS_CLT_CONNECTED)
-		return sprintf(page, "connected\n");
+		return sysfs_emit(page, "connected\n");
-	return sprintf(page, "disconnected\n");
+	return sysfs_emit(page, "disconnected\n");
 }
 static struct kobj_attribute rtrs_clt_state_attr =
 	__ATTR(state, 0444, rtrs_clt_state_show, NULL);
 static ssize_t rtrs_clt_reconnect_show(struct kobject *kobj,
-					struct kobj_attribute *attr,
+				       struct kobj_attribute *attr, char *buf)
-					char *page)
 {
-	return scnprintf(page, PAGE_SIZE, "Usage: echo 1 > %s\n",
+	return sysfs_emit(buf, "Usage: echo 1 > %s\n", attr->attr.name);
-			 attr->attr.name);
 }
 static ssize_t rtrs_clt_reconnect_store(struct kobject *kobj,
 	       rtrs_clt_reconnect_store);
 static ssize_t rtrs_clt_disconnect_show(struct kobject *kobj,
-					 struct kobj_attribute *attr,
+					struct kobj_attribute *attr, char *buf)
-					 char *page)
 {
-	return scnprintf(page, PAGE_SIZE, "Usage: echo 1 > %s\n",
+	return sysfs_emit(buf, "Usage: echo 1 > %s\n", attr->attr.name);
-			 attr->attr.name);
 }
 static ssize_t rtrs_clt_disconnect_store(struct kobject *kobj,
 	       rtrs_clt_disconnect_store);
 static ssize_t rtrs_clt_remove_path_show(struct kobject *kobj,
-					  struct kobj_attribute *attr,
+					 struct kobj_attribute *attr, char *buf)
-					  char *page)
 {
-	return scnprintf(page, PAGE_SIZE, "Usage: echo 1 > %s\n",
+	return sysfs_emit(buf, "Usage: echo 1 > %s\n", attr->attr.name);
-			 attr->attr.name);
 }
 static ssize_t rtrs_clt_remove_path_store(struct kobject *kobj,
 	sess = container_of(kobj, typeof(*sess), kobj);
-	return scnprintf(page, PAGE_SIZE, "%u\n", sess->hca_port);
+	return sysfs_emit(page, "%u\n", sess->hca_port);
 }
 static struct kobj_attribute rtrs_clt_hca_port_attr =
 	sess = container_of(kobj, struct rtrs_clt_sess, kobj);
-	return scnprintf(page, PAGE_SIZE, "%s\n", sess->hca_name);
+	return sysfs_emit(page, "%s\n", sess->hca_name);
 }
 static struct kobj_attribute rtrs_clt_hca_name_attr =
 				       char *page)
 {
 	struct rtrs_clt_sess *sess;
-	int cnt;
+	int len;
 	sess = container_of(kobj, struct rtrs_clt_sess, kobj);
-	cnt = sockaddr_to_str((struct sockaddr *)&sess->s.src_addr,
+	len = sockaddr_to_str((struct sockaddr *)&sess->s.src_addr, page,
-			      page, PAGE_SIZE);
+			      PAGE_SIZE);
-	return cnt + scnprintf(page + cnt, PAGE_SIZE - cnt, "\n");
+	len += sysfs_emit_at(page, len, "\n");
+	return len;
 }
 static struct kobj_attribute rtrs_clt_src_addr_attr =
 				       char *page)
 {
 	struct rtrs_clt_sess *sess;
-	int cnt;
+	int len;
 	sess = container_of(kobj, struct rtrs_clt_sess, kobj);
-	cnt = sockaddr_to_str((struct sockaddr *)&sess->s.dst_addr,
+	len = sockaddr_to_str((struct sockaddr *)&sess->s.dst_addr, page,
-			      page, PAGE_SIZE);
+			      PAGE_SIZE);
-	return cnt + scnprintf(page + cnt, PAGE_SIZE - cnt, "\n");
+	len += sysfs_emit_at(page, len, "\n");
+	return len;
 }
 static struct kobj_attribute rtrs_clt_dst_addr_attr =

drivers/infiniband/ulp/rtrs/rtrs-clt.c+36−38

@@ -1236,8 +1236,7 @@ static void free_sess_reqs(struct rtrs_clt_sess *sess) · 1235 unmodified lines
1236	if (req->mr)	1236	if (req->mr)
1237	ib_dereg_mr(req->mr);	1237	ib_dereg_mr(req->mr);
1238	kfree(req->sge);	1238	kfree(req->sge);
1239	rtrs_iu_free(req->iu, DMA_TO_DEVICE,	1239	rtrs_iu_free(req->iu, sess->s.dev->ib_dev, 1);
1240	sess->s.dev->ib_dev, 1);
1241	}	1240	}
1242	kfree(sess->reqs);	1241	kfree(sess->reqs);
1243	sess->reqs = NULL;	1242	sess->reqs = NULL;
@@ -1499,6 +1498,7 @@ static int create_con(struct rtrs_clt_sess *sess, unsigned int cid) · 255 unmodified lines
1499	con->c.cid = cid;	1498	con->c.cid = cid;
1500	con->c.sess = &sess->s;	1499	con->c.sess = &sess->s;
1501	atomic_set(&con->io_cnt, 0);	1500	atomic_set(&con->io_cnt, 0);
		1501	mutex_init(&con->con_mutex);
1502		1502
1503	sess->s.con[cid] = &con->c;	1503	sess->s.con[cid] = &con->c;
1504		1504
@@ -1510,6 +1510,7 @@ static void destroy_con(struct rtrs_clt_con *con) · 5 unmodified lines
1510	struct rtrs_clt_sess *sess = to_clt_sess(con->c.sess);	1510	struct rtrs_clt_sess *sess = to_clt_sess(con->c.sess);
1511		1511
1512	sess->s.con[con->c.cid] = NULL;	1512	sess->s.con[con->c.cid] = NULL;
		1513	mutex_destroy(&con->con_mutex);
1513	kfree(con);	1514	kfree(con);
1514	}	1515	}
1515		1516
@@ -1520,15 +1521,7 @@ static int create_con_cq_qp(struct rtrs_clt_con *con) · 4 unmodified lines
1520	int err, cq_vector;	1521	int err, cq_vector;
1521	struct rtrs_msg_rkey_rsp *rsp;	1522	struct rtrs_msg_rkey_rsp *rsp;
1522		1523
1523	/*	1524	lockdep_assert_held(&con->con_mutex);
1524	* This function can fail, but still destroy_con_cq_qp() should
1525	* be called, this is because create_con_cq_qp() is called on cm
1526	* event path, thus caller/waiter never knows: have we failed before
1527	* create_con_cq_qp() or after. To solve this dilemma without
1528	* creating any additional flags just allow destroy_con_cq_qp() be
1529	* called many times.
1530	*/
1531
1532	if (con->c.cid == 0) {	1525	if (con->c.cid == 0) {
1533	/*	1526	/*
1534	* One completion for each receive and two for each send	1527	* One completion for each receive and two for each send
@@ -1602,11 +1595,10 @@ static void destroy_con_cq_qp(struct rtrs_clt_con *con) · 67 unmodified lines
1602	* Be careful here: destroy_con_cq_qp() can be called even	1595	* Be careful here: destroy_con_cq_qp() can be called even
1603	* create_con_cq_qp() failed, see comments there.	1596	* create_con_cq_qp() failed, see comments there.
1604	*/	1597	*/
1605		1598	lockdep_assert_held(&con->con_mutex);
1606	rtrs_cq_qp_destroy(&con->c);	1599	rtrs_cq_qp_destroy(&con->c);
1607	if (con->rsp_ius) {	1600	if (con->rsp_ius) {
1608	rtrs_iu_free(con->rsp_ius, DMA_FROM_DEVICE,	1601	rtrs_iu_free(con->rsp_ius, sess->s.dev->ib_dev, con->queue_size);
1609	sess->s.dev->ib_dev, con->queue_size);
1610	con->rsp_ius = NULL;	1602	con->rsp_ius = NULL;
1611	con->queue_size = 0;	1603	con->queue_size = 0;
1612	}	1604	}
@@ -1634,16 +1626,16 @@ static int rtrs_rdma_addr_resolved(struct rtrs_clt_con *con) · 21 unmodified lines
1634	struct rtrs_sess *s = con->c.sess;	1626	struct rtrs_sess *s = con->c.sess;
1635	int err;	1627	int err;
1636		1628
		1629	mutex_lock(&con->con_mutex);
1637	err = create_con_cq_qp(con);	1630	err = create_con_cq_qp(con);
		1631	mutex_unlock(&con->con_mutex);
1638	if (err) {	1632	if (err) {
1639	rtrs_err(s, "create_con_cq_qp(), err: %d\n", err);	1633	rtrs_err(s, "create_con_cq_qp(), err: %d\n", err);
1640	return err;	1634	return err;
1641	}	1635	}
1642	err = rdma_resolve_route(con->c.cm_id, RTRS_CONNECT_TIMEOUT_MS);	1636	err = rdma_resolve_route(con->c.cm_id, RTRS_CONNECT_TIMEOUT_MS);
1643	if (err) {	1637	if (err)
1644	rtrs_err(s, "Resolving route failed, err: %d\n", err);	1638	rtrs_err(s, "Resolving route failed, err: %d\n", err);
1645	destroy_con_cq_qp(con);
1646	}
1647		1639
1648	return err;	1640	return err;
1649	}	1641	}
@@ -1837,8 +1829,8 @@ static int rtrs_clt_rdma_cm_handler(struct rdma_cm_id *cm_id, · 187 unmodified lines
1837	cm_err = rtrs_rdma_route_resolved(con);	1829	cm_err = rtrs_rdma_route_resolved(con);
1838	break;	1830	break;
1839	case RDMA_CM_EVENT_ESTABLISHED:	1831	case RDMA_CM_EVENT_ESTABLISHED:
1840	con->cm_err = rtrs_rdma_conn_established(con, ev);	1832	cm_err = rtrs_rdma_conn_established(con, ev);
1841	if (likely(!con->cm_err)) {	1833	if (likely(!cm_err)) {
1842	/*	1834	/*
1843	* Report success and wake up. Here we abuse state_wq,	1835	* Report success and wake up. Here we abuse state_wq,
1844	* i.e. wake up without state change, but we set cm_err.	1836	* i.e. wake up without state change, but we set cm_err.
@@ -1851,20 +1843,22 @@ static int rtrs_clt_rdma_cm_handler(struct rdma_cm_id *cm_id, · 6 unmodified lines
1851	case RDMA_CM_EVENT_REJECTED:	1843	case RDMA_CM_EVENT_REJECTED:
1852	cm_err = rtrs_rdma_conn_rejected(con, ev);	1844	cm_err = rtrs_rdma_conn_rejected(con, ev);
1853	break;	1845	break;
		1846	case RDMA_CM_EVENT_DISCONNECTED:
		1847	/* No message for disconnecting */
		1848	cm_err = -ECONNRESET;
		1849	break;
1854	case RDMA_CM_EVENT_CONNECT_ERROR:	1850	case RDMA_CM_EVENT_CONNECT_ERROR:
1855	case RDMA_CM_EVENT_UNREACHABLE:	1851	case RDMA_CM_EVENT_UNREACHABLE:
		1852	case RDMA_CM_EVENT_ADDR_CHANGE:
		1853	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1856	rtrs_wrn(s, "CM error event %d\n", ev->event);	1854	rtrs_wrn(s, "CM error event %d\n", ev->event);
1857	cm_err = -ECONNRESET;	1855	cm_err = -ECONNRESET;
1858	break;	1856	break;
1859	case RDMA_CM_EVENT_ADDR_ERROR:	1857	case RDMA_CM_EVENT_ADDR_ERROR:
1860	case RDMA_CM_EVENT_ROUTE_ERROR:	1858	case RDMA_CM_EVENT_ROUTE_ERROR:
		1859	rtrs_wrn(s, "CM error event %d\n", ev->event);
1861	cm_err = -EHOSTUNREACH;	1860	cm_err = -EHOSTUNREACH;
1862	break;	1861	break;
1863	case RDMA_CM_EVENT_DISCONNECTED:
1864	case RDMA_CM_EVENT_ADDR_CHANGE:
1865	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1866	cm_err = -ECONNRESET;
1867	break;
1868	case RDMA_CM_EVENT_DEVICE_REMOVAL:	1862	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1869	/*	1863	/*
1870	* Device removal is a special case. Queue close and return 0.	1864	* Device removal is a special case. Queue close and return 0.
@@ -1949,8 +1943,9 @@ static int create_cm(struct rtrs_clt_con *con) · 78 unmodified lines
1949		1943
1950	errr:	1944	errr:
1951	stop_cm(con);	1945	stop_cm(con);
1952	/* Is safe to call destroy if cq_qp is not inited */	1946	mutex_lock(&con->con_mutex);
1953	destroy_con_cq_qp(con);	1947	destroy_con_cq_qp(con);
		1948	mutex_unlock(&con->con_mutex);
1954	destroy_cm:	1949	destroy_cm:
1955	destroy_cm(con);	1950	destroy_cm(con);
1956		1951
@@ -2057,7 +2052,9 @@ static void rtrs_clt_stop_and_destroy_conns(struct rtrs_clt_sess *sess) · 100 unmodified lines
2057	if (!sess->s.con[cid])	2052	if (!sess->s.con[cid])
2058	break;	2053	break;
2059	con = to_clt_con(sess->s.con[cid]);	2054	con = to_clt_con(sess->s.con[cid]);
		2055	mutex_lock(&con->con_mutex);
2060	destroy_con_cq_qp(con);	2056	destroy_con_cq_qp(con);
		2057	mutex_unlock(&con->con_mutex);
2061	destroy_cm(con);	2058	destroy_cm(con);
2062	destroy_con(con);	2059	destroy_con(con);
2063	}	2060	}
@@ -2164,8 +2161,7 @@ static void rtrs_clt_remove_path_from_arr(struct rtrs_clt_sess *sess) · 100 unmodified lines
2164	mutex_unlock(&clt->paths_mutex);	2161	mutex_unlock(&clt->paths_mutex);
2165	}	2162	}
2166		2163
2167	static void rtrs_clt_add_path_to_arr(struct rtrs_clt_sess *sess,	2164	static void rtrs_clt_add_path_to_arr(struct rtrs_clt_sess *sess)
2168	struct rtrs_addr *addr)
2169	{	2165	{
2170	struct rtrs_clt *clt = sess->clt;	2166	struct rtrs_clt *clt = sess->clt;
2171		2167
@@ -2224,7 +2220,10 @@ destroy: · 52 unmodified lines
2224	struct rtrs_clt_con *con = to_clt_con(sess->s.con[cid]);	2220	struct rtrs_clt_con *con = to_clt_con(sess->s.con[cid]);
2225		2221
2226	stop_cm(con);	2222	stop_cm(con);
		2223
		2224	mutex_lock(&con->con_mutex);
2227	destroy_con_cq_qp(con);	2225	destroy_con_cq_qp(con);
		2226	mutex_unlock(&con->con_mutex);
2228	destroy_cm(con);	2227	destroy_cm(con);
2229	destroy_con(con);	2228	destroy_con(con);
2230	}	2229	}
@@ -2245,7 +2244,7 @@ static void rtrs_clt_info_req_done(struct ib_cq cq, struct ib_wc wc) · 14 unmodified lines
2245	struct rtrs_iu *iu;	2244	struct rtrs_iu *iu;
2246		2245
2247	iu = container_of(wc->wr_cqe, struct rtrs_iu, cqe);	2246	iu = container_of(wc->wr_cqe, struct rtrs_iu, cqe);
2248	rtrs_iu_free(iu, DMA_TO_DEVICE, sess->s.dev->ib_dev, 1);	2247	rtrs_iu_free(iu, sess->s.dev->ib_dev, 1);
2249		2248
2250	if (unlikely(wc->status != IB_WC_SUCCESS)) {	2249	if (unlikely(wc->status != IB_WC_SUCCESS)) {
2251	rtrs_err(sess->clt, "Sess info request send failed: %s\n",	2250	rtrs_err(sess->clt, "Sess info request send failed: %s\n",
@@ -2264,8 +2263,12 @@ static int process_info_rsp(struct rtrs_clt_sess *sess, · 12 unmodified lines
2264	int i, sgi;	2263	int i, sgi;
2265		2264
2266	sg_cnt = le16_to_cpu(msg->sg_cnt);	2265	sg_cnt = le16_to_cpu(msg->sg_cnt);
2267	if (unlikely(!sg_cnt))	2266	if (unlikely(!sg_cnt \|\| (sess->queue_depth % sg_cnt))) {
		2267	rtrs_err(sess->clt, "Incorrect sg_cnt %d, is not multiple\n",
		2268	sg_cnt);
2268	return -EINVAL;	2269	return -EINVAL;
		2270	}
		2271
2269	/*	2272	/*
2270	* Check if IB immediate data size is enough to hold the mem_id and	2273	* Check if IB immediate data size is enough to hold the mem_id and
2271	* the offset inside the memory chunk.	2274	* the offset inside the memory chunk.
@@ -2278,11 +2281,6 @@ static int process_info_rsp(struct rtrs_clt_sess *sess, · 6 unmodified lines
2278	MAX_IMM_PAYL_BITS, sg_cnt, sess->chunk_size);	2281	MAX_IMM_PAYL_BITS, sg_cnt, sess->chunk_size);
2279	return -EINVAL;	2282	return -EINVAL;
2280	}	2283	}
2281	if (unlikely(!sg_cnt \|\| (sess->queue_depth % sg_cnt))) {
2282	rtrs_err(sess->clt, "Incorrect sg_cnt %d, is not multiple\n",
2283	sg_cnt);
2284	return -EINVAL;
2285	}
2286	total_len = 0;	2284	total_len = 0;
2287	for (sgi = 0, i = 0; sgi < sg_cnt && i < sess->queue_depth; sgi++) {	2285	for (sgi = 0, i = 0; sgi < sg_cnt && i < sess->queue_depth; sgi++) {
2288	const struct rtrs_sg_desc *desc = &msg->desc[sgi];	2286	const struct rtrs_sg_desc *desc = &msg->desc[sgi];
@@ -2374,7 +2372,7 @@ static void rtrs_clt_info_rsp_done(struct ib_cq cq, struct ib_wc wc) · 85 unmodified lines
2374		2372
2375	out:	2373	out:
2376	rtrs_clt_update_wc_stats(con);	2374	rtrs_clt_update_wc_stats(con);
2377	rtrs_iu_free(iu, DMA_FROM_DEVICE, sess->s.dev->ib_dev, 1);	2375	rtrs_iu_free(iu, sess->s.dev->ib_dev, 1);
2378	rtrs_clt_change_state(sess, state);	2376	rtrs_clt_change_state(sess, state);
2379	}	2377	}
2380		2378
@@ -2436,9 +2434,9 @@ static int rtrs_send_sess_info(struct rtrs_clt_sess *sess) · 55 unmodified lines
2436		2434
2437	out:	2435	out:
2438	if (tx_iu)	2436	if (tx_iu)
2439	rtrs_iu_free(tx_iu, DMA_TO_DEVICE, sess->s.dev->ib_dev, 1);	2437	rtrs_iu_free(tx_iu, sess->s.dev->ib_dev, 1);
2440	if (rx_iu)	2438	if (rx_iu)
2441	rtrs_iu_free(rx_iu, DMA_FROM_DEVICE, sess->s.dev->ib_dev, 1);	2439	rtrs_iu_free(rx_iu, sess->s.dev->ib_dev, 1);
2442	if (unlikely(err))	2440	if (unlikely(err))
2443	/* If we've never taken async path because of malloc problems */	2441	/* If we've never taken async path because of malloc problems */
2444	rtrs_clt_change_state(sess, RTRS_CLT_CONNECTING_ERR);	2442	rtrs_clt_change_state(sess, RTRS_CLT_CONNECTING_ERR);
@@ -2938,7 +2936,7 @@ int rtrs_clt_create_path_from_sysfs(struct rtrs_clt *clt, · 493 unmodified lines
2938	* IO will never grab it. Also it is very important to add	2936	* IO will never grab it. Also it is very important to add
2939	* path before init, since init fires LINK_CONNECTED event.	2937	* path before init, since init fires LINK_CONNECTED event.
2940	*/	2938	*/
2941	rtrs_clt_add_path_to_arr(sess, addr);	2939	rtrs_clt_add_path_to_arr(sess);
2942		2940
2943	err = init_sess(sess);	2941	err = init_sess(sess);
2944	if (err)	2942	if (err)

drivers/infiniband/ulp/rtrs/rtrs-clt.h+1−0

@@ -72,6 +72,7 @@ struct rtrs_clt_con { · 71 unmodified lines
72	struct rtrs_iu *rsp_ius;	72	struct rtrs_iu *rsp_ius;
73	u32 queue_size;	73	u32 queue_size;
74	unsigned int cpu;	74	unsigned int cpu;
		75	struct mutex con_mutex;
75	atomic_t io_cnt;	76	atomic_t io_cnt;
76	int cm_err;	77	int cm_err;
77	};	78	};

drivers/infiniband/ulp/rtrs/rtrs-pri.h+1−2

 struct rtrs_iu *rtrs_iu_alloc(u32 queue_size, size_t size, gfp_t t,
 			      struct ib_device *dev, enum dma_data_direction,
 			      void (*done)(struct ib_cq *cq, struct ib_wc *wc));
-void rtrs_iu_free(struct rtrs_iu *iu, enum dma_data_direction dir,
+void rtrs_iu_free(struct rtrs_iu *iu, struct ib_device *dev, u32 queue_size);
-		  struct ib_device *dev, u32 queue_size);
 int rtrs_iu_post_recv(struct rtrs_con *con, struct rtrs_iu *iu);
 int rtrs_iu_post_send(struct rtrs_con *con, struct rtrs_iu *iu, size_t size,
 		      struct ib_send_wr *head);

drivers/infiniband/ulp/rtrs/rtrs-srv-sysfs.c+9−12

 };
 static ssize_t rtrs_srv_disconnect_show(struct kobject *kobj,
-					 struct kobj_attribute *attr,
+					struct kobj_attribute *attr, char *buf)
-					 char *page)
 {
-	return scnprintf(page, PAGE_SIZE, "Usage: echo 1 > %s\n",
+	return sysfs_emit(buf, "Usage: echo 1 > %s\n", attr->attr.name);
-			 attr->attr.name);
 }
 static ssize_t rtrs_srv_disconnect_store(struct kobject *kobj,
 	sess = container_of(kobj, typeof(*sess), kobj);
 	usr_con = sess->s.con[0];
-	return scnprintf(page, PAGE_SIZE, "%u\n",
+	return sysfs_emit(page, "%u\n", usr_con->cm_id->port_num);
-			 usr_con->cm_id->port_num);
 }
 static struct kobj_attribute rtrs_srv_hca_port_attr =
 	sess = container_of(kobj, struct rtrs_srv_sess, kobj);
-	return scnprintf(page, PAGE_SIZE, "%s\n",
+	return sysfs_emit(page, "%s\n", sess->s.dev->ib_dev->name);
-			 sess->s.dev->ib_dev->name);
 }
 static struct kobj_attribute rtrs_srv_hca_name_attr =
 				       char *page)
 {
 	struct rtrs_srv_sess *sess;
-	int cnt;
+	int len;
 	sess = container_of(kobj, struct rtrs_srv_sess, kobj);
-	cnt = sockaddr_to_str((struct sockaddr *)&sess->s.src_addr,
+	len = sockaddr_to_str((struct sockaddr *)&sess->s.src_addr, page,
-			      page, PAGE_SIZE);
+			      PAGE_SIZE);
-	return cnt + scnprintf(page + cnt, PAGE_SIZE - cnt, "\n");
+	len += sysfs_emit_at(page, len, "\n");
+	return len;
 }
 static struct kobj_attribute rtrs_srv_dst_addr_attr =

drivers/infiniband/ulp/rtrs/rtrs-srv.c+46−73

 	return changed;
 }
-static bool rtrs_srv_change_state_get_old(struct rtrs_srv_sess *sess,
+static bool rtrs_srv_change_state(struct rtrs_srv_sess *sess,
-					   enum rtrs_srv_state new_state,
+				   enum rtrs_srv_state new_state)
-					   enum rtrs_srv_state *old_state)
 {
 	bool changed;
 	spin_lock_irq(&sess->state_lock);
-	*old_state = sess->state;
 	changed = __rtrs_srv_change_state(sess, new_state);
 	spin_unlock_irq(&sess->state_lock);
 	return changed;
 }
-static bool rtrs_srv_change_state(struct rtrs_srv_sess *sess,
-				   enum rtrs_srv_state new_state)
-{
-	enum rtrs_srv_state old_state;
-	return rtrs_srv_change_state_get_old(sess, new_state, &old_state);
-}
 static void free_id(struct rtrs_srv_op *id)
 {
 	if (!id)
 void close_sess(struct rtrs_srv_sess *sess)
 {
-	enum rtrs_srv_state old_state;
+	if (rtrs_srv_change_state(sess, RTRS_SRV_CLOSING))
-	if (rtrs_srv_change_state_get_old(sess, RTRS_SRV_CLOSING,
-					   &old_state))
 		queue_work(rtrs_wq, &sess->close_work);
 	WARN_ON(sess->state != RTRS_SRV_CLOSING);
 }
 		struct rtrs_srv_mr *srv_mr;
 		srv_mr = &sess->mrs[i];
-		rtrs_iu_free(srv_mr->iu, DMA_TO_DEVICE,
+		rtrs_iu_free(srv_mr->iu, sess->s.dev->ib_dev, 1);
-			      sess->s.dev->ib_dev, 1);
 		ib_dereg_mr(srv_mr->mr);
 		ib_dma_unmap_sg(sess->s.dev->ib_dev, srv_mr->sgt.sgl,
 				srv_mr->sgt.nents, DMA_BIDIRECTIONAL);
 			sgt = &srv_mr->sgt;
 			mr = srv_mr->mr;
 free_iu:
-			rtrs_iu_free(srv_mr->iu, DMA_TO_DEVICE,
+			rtrs_iu_free(srv_mr->iu, sess->s.dev->ib_dev, 1);
-				      sess->s.dev->ib_dev, 1);
 dereg_mr:
 			ib_dereg_mr(mr);
 unmap_sg:
 	struct rtrs_iu *iu;
 	iu = container_of(wc->wr_cqe, struct rtrs_iu, cqe);
-	rtrs_iu_free(iu, DMA_TO_DEVICE, sess->s.dev->ib_dev, 1);
+	rtrs_iu_free(iu, sess->s.dev->ib_dev, 1);
 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
 		rtrs_err(s, "Sess info response send failed: %s\n",
 	if (unlikely(err)) {
 		rtrs_err(s, "rtrs_iu_post_send(), err: %d\n", err);
 iu_free:
-		rtrs_iu_free(tx_iu, DMA_TO_DEVICE, sess->s.dev->ib_dev, 1);
+		rtrs_iu_free(tx_iu, sess->s.dev->ib_dev, 1);
 	}
 rwr_free:
 	kfree(rwr);
 		goto close;
 out:
-	rtrs_iu_free(iu, DMA_FROM_DEVICE, sess->s.dev->ib_dev, 1);
+	rtrs_iu_free(iu, sess->s.dev->ib_dev, 1);
 	return;
 close:
 	close_sess(sess);
 	err = rtrs_iu_post_recv(&con->c, rx_iu);
 	if (unlikely(err)) {
 		rtrs_err(s, "rtrs_iu_post_recv(), err: %d\n", err);
-		rtrs_iu_free(rx_iu, DMA_FROM_DEVICE, sess->s.dev->ib_dev, 1);
+		rtrs_iu_free(rx_iu, sess->s.dev->ib_dev, 1);
 		return err;
 	}
 	kfree(srv);
 }
-static struct rtrs_srv *__alloc_srv(struct rtrs_srv_ctx *ctx,
+static void free_srv(struct rtrs_srv *srv)
-				     const uuid_t *paths_uuid)
+{
+	int i;
+	WARN_ON(refcount_read(&srv->refcount));
+	for (i = 0; i < srv->queue_depth; i++)
+		mempool_free(srv->chunks[i], chunk_pool);
+	kfree(srv->chunks);
+	mutex_destroy(&srv->paths_mutex);
+	mutex_destroy(&srv->paths_ev_mutex);
+	/* last put to release the srv structure */
+	put_device(&srv->dev);
+}
+static struct rtrs_srv *get_or_create_srv(struct rtrs_srv_ctx *ctx,
+					   const uuid_t *paths_uuid)
 {
 	struct rtrs_srv *srv;
 	int i;
+	mutex_lock(&ctx->srv_mutex);
+	list_for_each_entry(srv, &ctx->srv_list, ctx_list) {
+		if (uuid_equal(&srv->paths_uuid, paths_uuid) &&
+		    refcount_inc_not_zero(&srv->refcount)) {
+			mutex_unlock(&ctx->srv_mutex);
+			return srv;
+		}
+	}
+	/* need to allocate a new srv */
 	srv = kzalloc(sizeof(*srv), GFP_KERNEL);
-	if  (!srv)
+	if  (!srv) {
+		mutex_unlock(&ctx->srv_mutex);
 		return NULL;
+	}
-	refcount_set(&srv->refcount, 1);
 	INIT_LIST_HEAD(&srv->paths_list);
 	mutex_init(&srv->paths_mutex);
 	mutex_init(&srv->paths_ev_mutex);
 	srv->ctx = ctx;
 	device_initialize(&srv->dev);
 	srv->dev.release = rtrs_srv_dev_release;
+	list_add(&srv->ctx_list, &ctx->srv_list);
+	mutex_unlock(&ctx->srv_mutex);
 	srv->chunks = kcalloc(srv->queue_depth, sizeof(*srv->chunks),
 			      GFP_KERNEL);
 		if (!srv->chunks[i])
 			goto err_free_chunks;
 	}
-	list_add(&srv->ctx_list, &ctx->srv_list);
+	refcount_set(&srv->refcount, 1);
 	return srv;
 err_free_srv:
 	kfree(srv);
-	return NULL;
-}
-static void free_srv(struct rtrs_srv *srv)
-{
-	int i;
-	WARN_ON(refcount_read(&srv->refcount));
-	for (i = 0; i < srv->queue_depth; i++)
-		mempool_free(srv->chunks[i], chunk_pool);
-	kfree(srv->chunks);
-	mutex_destroy(&srv->paths_mutex);
-	mutex_destroy(&srv->paths_ev_mutex);
-	/* last put to release the srv structure */
-	put_device(&srv->dev);
-}
-static inline struct rtrs_srv *__find_srv_and_get(struct rtrs_srv_ctx *ctx,
-						   const uuid_t *paths_uuid)
-{
-	struct rtrs_srv *srv;
-	list_for_each_entry(srv, &ctx->srv_list, ctx_list) {
-		if (uuid_equal(&srv->paths_uuid, paths_uuid) &&
-		    refcount_inc_not_zero(&srv->refcount))
-			return srv;
-	}
 	return NULL;
 }
-static struct rtrs_srv *get_or_create_srv(struct rtrs_srv_ctx *ctx,
-					   const uuid_t *paths_uuid)
-{
-	struct rtrs_srv *srv;
-	mutex_lock(&ctx->srv_mutex);
-	srv = __find_srv_and_get(ctx, paths_uuid);
-	if (!srv)
-		srv = __alloc_srv(ctx, paths_uuid);
-	mutex_unlock(&ctx->srv_mutex);
-	return srv;
-}
 static void put_srv(struct rtrs_srv *srv)
 {
 	if (refcount_dec_and_test(&srv->refcount)) {
 	}
 	recon_cnt = le16_to_cpu(msg->recon_cnt);
 	srv = get_or_create_srv(ctx, &msg->paths_uuid);
-	if (!srv) {
+	/*
+	 * "refcount == 0" happens if a previous thread calls get_or_create_srv
+	 * allocate srv, but chunks of srv are not allocated yet.
+	 */
+	if (!srv || refcount_read(&srv->refcount) == 0) {
 		err = -ENOMEM;
 		goto reject_w_err;
 	}

drivers/infiniband/ulp/rtrs/rtrs-srv.h+1−1

@@ -62,7 +62,7 @@ struct rtrs_srv_op { · 61 unmodified lines
62		62
63	/*	63	/*
64	* server side memory region context, when always_invalidate=Y, we need	64	* server side memory region context, when always_invalidate=Y, we need
65	* queue_depth of memory regrion to invalidate each memory region.	65	* queue_depth of memory region to invalidate each memory region.
66	*/	66	*/
67	struct rtrs_srv_mr {	67	struct rtrs_srv_mr {
68	struct ib_mr *mr;	68	struct ib_mr *mr;

drivers/infiniband/ulp/rtrs/rtrs.c+23−38

 		return NULL;
 	for (i = 0; i < queue_size; i++) {
 		iu = &ius[i];
+		iu->direction = dir;
 		iu->buf = kzalloc(size, gfp_mask);
 		if (!iu->buf)
 			goto err;
 		iu->cqe.done  = done;
 		iu->size      = size;
-		iu->direction = dir;
 	}
 	return ius;
 err:
-	rtrs_iu_free(ius, dir, dma_dev, i);
+	rtrs_iu_free(ius, dma_dev, i);
 	return NULL;
 }
 EXPORT_SYMBOL_GPL(rtrs_iu_alloc);
-void rtrs_iu_free(struct rtrs_iu *ius, enum dma_data_direction dir,
+void rtrs_iu_free(struct rtrs_iu *ius, struct ib_device *ibdev, u32 queue_size)
-		   struct ib_device *ibdev, u32 queue_size)
 {
 	struct rtrs_iu *iu;
 	int i;
 	for (i = 0; i < queue_size; i++) {
 		iu = &ius[i];
-		ib_dma_unmap_single(ibdev, iu->dma_addr, iu->size, dir);
+		ib_dma_unmap_single(ibdev, iu->dma_addr, iu->size, iu->direction);
 		kfree(iu->buf);
 	}
 	kfree(ius);
 }
 EXPORT_SYMBOL_GPL(rtrs_post_recv_empty);
+static int rtrs_post_send(struct ib_qp *qp, struct ib_send_wr *head,
+			     struct ib_send_wr *wr)
+{
+	if (head) {
+		struct ib_send_wr *tail = head;
+		while (tail->next)
+			tail = tail->next;
+		tail->next = wr;
+	} else {
+		head = wr;
+	}
+	return ib_post_send(qp, head, NULL);
+}
 int rtrs_iu_post_send(struct rtrs_con *con, struct rtrs_iu *iu, size_t size,
 		       struct ib_send_wr *head)
 {
 		.send_flags = IB_SEND_SIGNALED,
 	};
-	if (head) {
+	return rtrs_post_send(con->qp, head, &wr);
-		struct ib_send_wr *tail = head;
-		while (tail->next)
-			tail = tail->next;
-		tail->next = &wr;
-	} else {
-		head = &wr;
-	}
-	return ib_post_send(con->qp, head, NULL);
 }
 EXPORT_SYMBOL_GPL(rtrs_iu_post_send);
 		if (WARN_ON(sge[i].length == 0))
 			return -EINVAL;
-	if (head) {
+	return rtrs_post_send(con->qp, head, &wr.wr);
-		struct ib_send_wr *tail = head;
-		while (tail->next)
-			tail = tail->next;
-		tail->next = &wr.wr;
-	} else {
-		head = &wr.wr;
-	}
-	return ib_post_send(con->qp, head, NULL);
 }
 EXPORT_SYMBOL_GPL(rtrs_iu_post_rdma_write_imm);
 		.ex.imm_data	= cpu_to_be32(imm_data),
 	};
-	if (head) {
+	return rtrs_post_send(con->qp, head, &wr);
-		struct ib_send_wr *tail = head;
-		while (tail->next)
-			tail = tail->next;
-		tail->next = &wr;
-	} else {
-		head = &wr;
-	}
-	return ib_post_send(con->qp, head, NULL);
 }
 EXPORT_SYMBOL_GPL(rtrs_post_rdma_write_imm_empty);

drivers/infiniband/ulp/srp/ib_srp.c+26−22

@@ -169,9 +169,9 @@ static int srp_tmo_get(char buffer, const struct kernel_param kp) · 168 unmodified lines
169	int tmo = (int )kp->arg;	169	int tmo = (int )kp->arg;
170		170
171	if (tmo >= 0)	171	if (tmo >= 0)
172	return sprintf(buffer, "%d\n", tmo);	172	return sysfs_emit(buffer, "%d\n", tmo);
173	else	173	else
174	return sprintf(buffer, "off\n");	174	return sysfs_emit(buffer, "off\n");
175	}	175	}
176		176
177	static int srp_tmo_set(const char val, const struct kernel_param kp)	177	static int srp_tmo_set(const char val, const struct kernel_param kp)
@@ -2896,7 +2896,7 @@ static ssize_t show_id_ext(struct device dev, struct device_attribute attr, · 2718 unmodified lines
2896	{	2896	{
2897	struct srp_target_port *target = host_to_target(class_to_shost(dev));	2897	struct srp_target_port *target = host_to_target(class_to_shost(dev));
2898		2898
2899	return sprintf(buf, "0x%016llx\n", be64_to_cpu(target->id_ext));	2899	return sysfs_emit(buf, "0x%016llx\n", be64_to_cpu(target->id_ext));
2900	}	2900	}
2901		2901
2902	static ssize_t show_ioc_guid(struct device dev, struct device_attribute attr,	2902	static ssize_t show_ioc_guid(struct device dev, struct device_attribute attr,
@@ -2904,7 +2904,7 @@ static ssize_t show_ioc_guid(struct device dev, struct device_attribute attr, · 1 unmodified line
2904	{	2904	{
2905	struct srp_target_port *target = host_to_target(class_to_shost(dev));	2905	struct srp_target_port *target = host_to_target(class_to_shost(dev));
2906		2906
2907	return sprintf(buf, "0x%016llx\n", be64_to_cpu(target->ioc_guid));	2907	return sysfs_emit(buf, "0x%016llx\n", be64_to_cpu(target->ioc_guid));
2908	}	2908	}
2909		2909
2910	static ssize_t show_service_id(struct device *dev,	2910	static ssize_t show_service_id(struct device *dev,
@@ -2914,8 +2914,8 @@ static ssize_t show_service_id(struct device *dev, · 3 unmodified lines
2914		2914
2915	if (target->using_rdma_cm)	2915	if (target->using_rdma_cm)
2916	return -ENOENT;	2916	return -ENOENT;
2917	return sprintf(buf, "0x%016llx\n",	2917	return sysfs_emit(buf, "0x%016llx\n",
2918	be64_to_cpu(target->ib_cm.service_id));	2918	be64_to_cpu(target->ib_cm.service_id));
2919	}	2919	}
2920		2920
2921	static ssize_t show_pkey(struct device dev, struct device_attribute attr,	2921	static ssize_t show_pkey(struct device dev, struct device_attribute attr,
@@ -2925,7 +2925,8 @@ static ssize_t show_pkey(struct device dev, struct device_attribute attr, · 3 unmodified lines
2925		2925
2926	if (target->using_rdma_cm)	2926	if (target->using_rdma_cm)
2927	return -ENOENT;	2927	return -ENOENT;
2928	return sprintf(buf, "0x%04x\n", be16_to_cpu(target->ib_cm.pkey));	2928
		2929	return sysfs_emit(buf, "0x%04x\n", be16_to_cpu(target->ib_cm.pkey));
2929	}	2930	}
2930		2931
2931	static ssize_t show_sgid(struct device dev, struct device_attribute attr,	2932	static ssize_t show_sgid(struct device dev, struct device_attribute attr,
@@ -2933,7 +2934,7 @@ static ssize_t show_sgid(struct device dev, struct device_attribute attr, · 1 unmodified line
2933	{	2934	{
2934	struct srp_target_port *target = host_to_target(class_to_shost(dev));	2935	struct srp_target_port *target = host_to_target(class_to_shost(dev));
2935		2936
2936	return sprintf(buf, "%pI6\n", target->sgid.raw);	2937	return sysfs_emit(buf, "%pI6\n", target->sgid.raw);
2937	}	2938	}
2938		2939
2939	static ssize_t show_dgid(struct device dev, struct device_attribute attr,	2940	static ssize_t show_dgid(struct device dev, struct device_attribute attr,
@@ -2944,7 +2945,8 @@ static ssize_t show_dgid(struct device dev, struct device_attribute attr, · 4 unmodified lines
2944		2945
2945	if (target->using_rdma_cm)	2946	if (target->using_rdma_cm)
2946	return -ENOENT;	2947	return -ENOENT;
2947	return sprintf(buf, "%pI6\n", ch->ib_cm.path.dgid.raw);	2948
		2949	return sysfs_emit(buf, "%pI6\n", ch->ib_cm.path.dgid.raw);
2948	}	2950	}
2949		2951
2950	static ssize_t show_orig_dgid(struct device *dev,	2952	static ssize_t show_orig_dgid(struct device *dev,
@@ -2954,7 +2956,8 @@ static ssize_t show_orig_dgid(struct device *dev, · 3 unmodified lines
2954		2956
2955	if (target->using_rdma_cm)	2957	if (target->using_rdma_cm)
2956	return -ENOENT;	2958	return -ENOENT;
2957	return sprintf(buf, "%pI6\n", target->ib_cm.orig_dgid.raw);	2959
		2960	return sysfs_emit(buf, "%pI6\n", target->ib_cm.orig_dgid.raw);
2958	}	2961	}
2959		2962
2960	static ssize_t show_req_lim(struct device *dev,	2963	static ssize_t show_req_lim(struct device *dev,
@@ -2968,7 +2971,8 @@ static ssize_t show_req_lim(struct device *dev, · 7 unmodified lines
2968	ch = &target->ch[i];	2971	ch = &target->ch[i];
2969	req_lim = min(req_lim, ch->req_lim);	2972	req_lim = min(req_lim, ch->req_lim);
2970	}	2973	}
2971	return sprintf(buf, "%d\n", req_lim);	2974
		2975	return sysfs_emit(buf, "%d\n", req_lim);
2972	}	2976	}
2973		2977
2974	static ssize_t show_zero_req_lim(struct device *dev,	2978	static ssize_t show_zero_req_lim(struct device *dev,
@@ -2976,7 +2980,7 @@ static ssize_t show_zero_req_lim(struct device *dev, · 1 unmodified line
2976	{	2980	{
2977	struct srp_target_port *target = host_to_target(class_to_shost(dev));	2981	struct srp_target_port *target = host_to_target(class_to_shost(dev));
2978		2982
2979	return sprintf(buf, "%d\n", target->zero_req_lim);	2983	return sysfs_emit(buf, "%d\n", target->zero_req_lim);
2980	}	2984	}
2981		2985
2982	static ssize_t show_local_ib_port(struct device *dev,	2986	static ssize_t show_local_ib_port(struct device *dev,
@@ -2984,7 +2988,7 @@ static ssize_t show_local_ib_port(struct device *dev, · 1 unmodified line
2984	{	2988	{
2985	struct srp_target_port *target = host_to_target(class_to_shost(dev));	2989	struct srp_target_port *target = host_to_target(class_to_shost(dev));
2986		2990
2987	return sprintf(buf, "%d\n", target->srp_host->port);	2991	return sysfs_emit(buf, "%d\n", target->srp_host->port);
2988	}	2992	}
2989		2993
2990	static ssize_t show_local_ib_device(struct device *dev,	2994	static ssize_t show_local_ib_device(struct device *dev,
@@ -2992,8 +2996,8 @@ static ssize_t show_local_ib_device(struct device *dev, · 1 unmodified line
2992	{	2996	{
2993	struct srp_target_port *target = host_to_target(class_to_shost(dev));	2997	struct srp_target_port *target = host_to_target(class_to_shost(dev));
2994		2998
2995	return sprintf(buf, "%s\n",	2999	return sysfs_emit(buf, "%s\n",
2996	dev_name(&target->srp_host->srp_dev->dev->dev));	3000	dev_name(&target->srp_host->srp_dev->dev->dev));
2997	}	3001	}
2998		3002
2999	static ssize_t show_ch_count(struct device dev, struct device_attribute attr,	3003	static ssize_t show_ch_count(struct device dev, struct device_attribute attr,
@@ -3001,7 +3005,7 @@ static ssize_t show_ch_count(struct device dev, struct device_attribute attr, · 1 unmodified line
3001	{	3005	{
3002	struct srp_target_port *target = host_to_target(class_to_shost(dev));	3006	struct srp_target_port *target = host_to_target(class_to_shost(dev));
3003		3007
3004	return sprintf(buf, "%d\n", target->ch_count);	3008	return sysfs_emit(buf, "%d\n", target->ch_count);
3005	}	3009	}
3006		3010
3007	static ssize_t show_comp_vector(struct device *dev,	3011	static ssize_t show_comp_vector(struct device *dev,
@@ -3009,7 +3013,7 @@ static ssize_t show_comp_vector(struct device *dev, · 1 unmodified line
3009	{	3013	{
3010	struct srp_target_port *target = host_to_target(class_to_shost(dev));	3014	struct srp_target_port *target = host_to_target(class_to_shost(dev));
3011		3015
3012	return sprintf(buf, "%d\n", target->comp_vector);	3016	return sysfs_emit(buf, "%d\n", target->comp_vector);
3013	}	3017	}
3014		3018
3015	static ssize_t show_tl_retry_count(struct device *dev,	3019	static ssize_t show_tl_retry_count(struct device *dev,
@@ -3017,7 +3021,7 @@ static ssize_t show_tl_retry_count(struct device *dev, · 1 unmodified line
3017	{	3021	{
3018	struct srp_target_port *target = host_to_target(class_to_shost(dev));	3022	struct srp_target_port *target = host_to_target(class_to_shost(dev));
3019		3023
3020	return sprintf(buf, "%d\n", target->tl_retry_count);	3024	return sysfs_emit(buf, "%d\n", target->tl_retry_count);
3021	}	3025	}
3022		3026
3023	static ssize_t show_cmd_sg_entries(struct device *dev,	3027	static ssize_t show_cmd_sg_entries(struct device *dev,
@@ -3025,7 +3029,7 @@ static ssize_t show_cmd_sg_entries(struct device *dev, · 1 unmodified line
3025	{	3029	{
3026	struct srp_target_port *target = host_to_target(class_to_shost(dev));	3030	struct srp_target_port *target = host_to_target(class_to_shost(dev));
3027		3031
3028	return sprintf(buf, "%u\n", target->cmd_sg_cnt);	3032	return sysfs_emit(buf, "%u\n", target->cmd_sg_cnt);
3029	}	3033	}
3030		3034
3031	static ssize_t show_allow_ext_sg(struct device *dev,	3035	static ssize_t show_allow_ext_sg(struct device *dev,
@@ -3033,7 +3037,7 @@ static ssize_t show_allow_ext_sg(struct device *dev, · 1 unmodified line
3033	{	3037	{
3034	struct srp_target_port *target = host_to_target(class_to_shost(dev));	3038	struct srp_target_port *target = host_to_target(class_to_shost(dev));
3035		3039
3036	return sprintf(buf, "%s\n", target->allow_ext_sg ? "true" : "false");	3040	return sysfs_emit(buf, "%s\n", target->allow_ext_sg ? "true" : "false");
3037	}	3041	}
3038		3042
3039	static DEVICE_ATTR(id_ext, S_IRUGO, show_id_ext, NULL);	3043	static DEVICE_ATTR(id_ext, S_IRUGO, show_id_ext, NULL);
@@ -3893,7 +3897,7 @@ static ssize_t show_ibdev(struct device dev, struct device_attribute attr, · 853 unmodified lines
3893	{	3897	{
3894	struct srp_host *host = container_of(dev, struct srp_host, dev);	3898	struct srp_host *host = container_of(dev, struct srp_host, dev);
3895		3899
3896	return sprintf(buf, "%s\n", dev_name(&host->srp_dev->dev->dev));	3900	return sysfs_emit(buf, "%s\n", dev_name(&host->srp_dev->dev->dev));
3897	}	3901	}
3898		3902
3899	static DEVICE_ATTR(ibdev, S_IRUGO, show_ibdev, NULL);	3903	static DEVICE_ATTR(ibdev, S_IRUGO, show_ibdev, NULL);
@@ -3903,7 +3907,7 @@ static ssize_t show_port(struct device dev, struct device_attribute attr, · 3 unmodified lines
3903	{	3907	{
3904	struct srp_host *host = container_of(dev, struct srp_host, dev);	3908	struct srp_host *host = container_of(dev, struct srp_host, dev);
3905		3909
3906	return sprintf(buf, "%d\n", host->port);	3910	return sysfs_emit(buf, "%d\n", host->port);
3907	}	3911	}
3908		3912
3909	static DEVICE_ATTR(port, S_IRUGO, show_port, NULL);	3913	static DEVICE_ATTR(port, S_IRUGO, show_port, NULL);

drivers/infiniband/ulp/srpt/ib_srpt.c+7−7

drivers/infiniband/ulp/srpt/ib_srpt.h+1−1

@@ -347,7 +347,7 @@ struct srpt_nexus { · 346 unmodified lines
347	};	347	};
348		348
349	/**	349	/**
350	* struct srpt_port_attib - attributes for SRPT port	350	* struct srpt_port_attrib - attributes for SRPT port
351	* @srp_max_rdma_size: Maximum size of SRP RDMA transfers for new connections.	351	* @srp_max_rdma_size: Maximum size of SRP RDMA transfers for new connections.
352	* @srp_max_rsp_size: Maximum size of SRP response messages in bytes.	352	* @srp_max_rsp_size: Maximum size of SRP response messages in bytes.
353	* @srp_sq_size: Shared receive queue (SRQ) size.	353	* @srp_sq_size: Shared receive queue (SRQ) size.

drivers/nvme/host/rdma.c+1−1

@@ -853,7 +853,7 @@ static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, · 852 unmodified lines
853	return error;	853	return error;
854		854
855	ctrl->device = ctrl->queues[0].device;	855	ctrl->device = ctrl->queues[0].device;
856	ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device);	856	ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
857		857
858	/* T10-PI support */	858	/* T10-PI support */
859	if (ctrl->device->dev->attrs.device_cap_flags &	859	if (ctrl->device->dev->attrs.device_cap_flags &

drivers/nvme/target/rdma.c+2−1

@@ -414,7 +414,8 @@ static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev, · 413 unmodified lines
414	if (ib_dma_mapping_error(ndev->device, r->send_sge.addr))	414	if (ib_dma_mapping_error(ndev->device, r->send_sge.addr))
415	goto out_free_rsp;	415	goto out_free_rsp;
416		416
417	r->req.p2p_client = &ndev->device->dev;	417	if (!ib_uses_virt_dma(ndev->device))
		418	r->req.p2p_client = &ndev->device->dev;
418	r->send_sge.length = sizeof(*r->req.cqe);	419	r->send_sge.length = sizeof(*r->req.cqe);
419	r->send_sge.lkey = ndev->pd->local_dma_lkey;	420	r->send_sge.lkey = ndev->pd->local_dma_lkey;
420		421

drivers/pci/p2pdma.c+1−24

@@ -556,15 +556,6 @@ int pci_p2pdma_distance_many(struct pci_dev provider, struct device *clients, · 555 unmodified lines
556	return -1;	556	return -1;
557		557
558	for (i = 0; i < num_clients; i++) {	558	for (i = 0; i < num_clients; i++) {
559	#ifdef CONFIG_DMA_VIRT_OPS
560	if (clients[i]->dma_ops == &dma_virt_ops) {
561	if (verbose)
562	dev_warn(clients[i],
563	"cannot be used for peer-to-peer DMA because the driver makes use of dma_virt_ops\n");
564	return -1;
565	}
566	#endif
567
568	pci_client = find_parent_pci_dev(clients[i]);	559	pci_client = find_parent_pci_dev(clients[i]);
569	if (!pci_client) {	560	if (!pci_client) {
570	if (verbose)	561	if (verbose)
@@ -834,24 +825,10 @@ static int __pci_p2pdma_map_sg(struct pci_p2pdma_pagemap *p2p_pgmap, · 263 unmodified lines
834	struct device dev, struct scatterlist sg, int nents)	825	struct device dev, struct scatterlist sg, int nents)
835	{	826	{
836	struct scatterlist *s;	827	struct scatterlist *s;
837	phys_addr_t paddr;
838	int i;	828	int i;
839		829
840	/*
841	* p2pdma mappings are not compatible with devices that use
842	* dma_virt_ops. If the upper layers do the right thing
843	* this should never happen because it will be prevented
844	* by the check in pci_p2pdma_distance_many()
845	*/
846	#ifdef CONFIG_DMA_VIRT_OPS
847	if (WARN_ON_ONCE(dev->dma_ops == &dma_virt_ops))
848	return 0;
849	#endif
850
851	for_each_sg(sg, s, nents, i) {	830	for_each_sg(sg, s, nents, i) {
852	paddr = sg_phys(s);	831	s->dma_address = sg_phys(s) - p2p_pgmap->bus_offset;
853
854	s->dma_address = paddr - p2p_pgmap->bus_offset;
855	sg_dma_len(s) = s->length;	832	sg_dma_len(s) = s->length;
856	}	833	}
857		834

include/linux/dma-mapping.h+0−2

@@ -565,6 +565,4 @@ static inline int dma_mmap_wc(struct device *dev, · 564 unmodified lines
565	int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,	565	int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
566	dma_addr_t dma_start, u64 size);	566	dma_addr_t dma_start, u64 size);
567		567
568	extern const struct dma_map_ops dma_virt_ops;
569
570	#endif /* _LINUX_DMA_MAPPING_H */	568	#endif /* _LINUX_DMA_MAPPING_H */

include/rdma/ib_umem.h+42−0

@@ -34,6 +34,13 @@ static inline int ib_umem_offset(struct ib_umem *umem) · 33 unmodified lines
34	return umem->address & ~PAGE_MASK;	34	return umem->address & ~PAGE_MASK;
35	}	35	}
36		36
		37	static inline unsigned long ib_umem_dma_offset(struct ib_umem *umem,
		38	unsigned long pgsz)
		39	{
		40	return (sg_dma_address(umem->sg_head.sgl) + ib_umem_offset(umem)) &
		41	(pgsz - 1);
		42	}
		43
37	static inline size_t ib_umem_num_dma_blocks(struct ib_umem *umem,	44	static inline size_t ib_umem_num_dma_blocks(struct ib_umem *umem,
38	unsigned long pgsz)	45	unsigned long pgsz)
39	{	46	{
@@ -79,6 +86,35 @@ int ib_umem_copy_from(void dst, struct ib_umem umem, size_t offset, · 39 unmodified lines
79	unsigned long ib_umem_find_best_pgsz(struct ib_umem *umem,	86	unsigned long ib_umem_find_best_pgsz(struct ib_umem *umem,
80	unsigned long pgsz_bitmap,	87	unsigned long pgsz_bitmap,
81	unsigned long virt);	88	unsigned long virt);
		89	/**
		90	* ib_umem_find_best_pgoff - Find best HW page size
		91	*
		92	* @umem: umem struct
		93	* @pgsz_bitmap bitmap of HW supported page sizes
		94	* @pgoff_bitmask: Mask of bits that can be represented with an offset
		95	*
		96	* This is very similar to ib_umem_find_best_pgsz() except instead of accepting
		97	* an IOVA it accepts a bitmask specifying what address bits can be represented
		98	* with a page offset.
		99	*
		100	* For instance if the HW has multiple page sizes, requires 64 byte alignemnt,
		101	* and can support aligned offsets up to 4032 then pgoff_bitmask would be
		102	* "111111000000".
		103	*
		104	* If the pgoff_bitmask requires either alignment in the low bit or an
		105	* unavailable page size for the high bits, this function returns 0.
		106	*/
		107	static inline unsigned long ib_umem_find_best_pgoff(struct ib_umem *umem,
		108	unsigned long pgsz_bitmap,
		109	u64 pgoff_bitmask)
		110	{
		111	struct scatterlist *sg = umem->sg_head.sgl;
		112	dma_addr_t dma_addr;
		113
		114	dma_addr = sg_dma_address(sg) + (umem->address & ~PAGE_MASK);
		115	return ib_umem_find_best_pgsz(umem, pgsz_bitmap,
		116	dma_addr & pgoff_bitmask);
		117	}
82		118
83	#else /* CONFIG_INFINIBAND_USER_MEM */	119	#else /* CONFIG_INFINIBAND_USER_MEM */
84		120
@@ -101,6 +137,12 @@ static inline unsigned long ib_umem_find_best_pgsz(struct ib_umem *umem, · 16 unmodified lines
101	{	137	{
102	return 0;	138	return 0;
103	}	139	}
		140	static inline unsigned long ib_umem_find_best_pgoff(struct ib_umem *umem,
		141	unsigned long pgsz_bitmap,
		142	u64 pgoff_bitmask)
		143	{
		144	return 0;
		145	}
104		146
105	#endif /* CONFIG_INFINIBAND_USER_MEM */	147	#endif /* CONFIG_INFINIBAND_USER_MEM */
106		148

include/rdma/ib_verbs.h+97−101

 	IB_QP_RESERVED3			= (1<<23),
 	IB_QP_RESERVED4			= (1<<24),
 	IB_QP_RATE_LIMIT		= (1<<25),
+	IB_QP_ATTR_STANDARD_BITS = GENMASK(20, 0),
 };
 enum ib_qp_state {
 	RDMA_REMOVE_DRIVER_REMOVE,
 	/* uobj is being cleaned-up before being committed */
 	RDMA_REMOVE_ABORT,
+	/* The driver failed to destroy the uobject and is being disconnected */
+	RDMA_REMOVE_DRIVER_FAILURE,
 };
 struct ib_rdmacg_object {
 	struct ib_device       *device;
 	struct ib_uverbs_file  *ufile;
-	bool cleanup_retryable;
 	struct ib_rdmacg_object	cg_obj;
 	/*
 	 * Implementation details of the RDMA core, don't use in drivers:
 	int (*dealloc_pd)(struct ib_pd *pd, struct ib_udata *udata);
 	int (*create_ah)(struct ib_ah *ah, struct rdma_ah_init_attr *attr,
 			 struct ib_udata *udata);
+	int (*create_user_ah)(struct ib_ah *ah, struct rdma_ah_init_attr *attr,
+			      struct ib_udata *udata);
 	int (*modify_ah)(struct ib_ah *ah, struct rdma_ah_attr *ah_attr);
 	int (*query_ah)(struct ib_ah *ah, struct rdma_ah_attr *ah_attr);
 	int (*destroy_ah)(struct ib_ah *ah, u32 flags);
 	struct ib_mr *(*reg_user_mr)(struct ib_pd *pd, u64 start, u64 length,
 				     u64 virt_addr, int mr_access_flags,
 				     struct ib_udata *udata);
-	int (*rereg_user_mr)(struct ib_mr *mr, int flags, u64 start, u64 length,
+	struct ib_mr *(*rereg_user_mr)(struct ib_mr *mr, int flags, u64 start,
-			     u64 virt_addr, int mr_access_flags,
+				       u64 length, u64 virt_addr,
-			     struct ib_pd *pd, struct ib_udata *udata);
+				       int mr_access_flags, struct ib_pd *pd,
+				       struct ib_udata *udata);
 	int (*dereg_mr)(struct ib_mr *mr, struct ib_udata *udata);
 	struct ib_mr *(*alloc_mr)(struct ib_pd *pd, enum ib_mr_type mr_type,
 				  u32 max_num_sg);
 	const struct attribute_group	*groups[3];
 	u64			     uverbs_cmd_mask;
-	u64			     uverbs_ex_cmd_mask;
 	char			     node_desc[IB_DEVICE_NODE_DESC_MAX];
 	__be64			     node_guid;
 	return ib_is_buffer_cleared(udata->inbuf + offset, len);
 }
-/**
- * ib_is_destroy_retryable - Check whether the uobject destruction
- * is retryable.
- * @ret: The initial destruction return code
- * @why: remove reason
- * @uobj: The uobject that is destroyed
- *
- * This function is a helper function that IB layer and low-level drivers
- * can use to consider whether the destruction of the given uobject is
- * retry-able.
- * It checks the original return code, if it wasn't success the destruction
- * is retryable according to the ucontext state (i.e. cleanup_retryable) and
- * the remove reason. (i.e. why).
- * Must be called with the object locked for destroy.
- */
-static inline bool ib_is_destroy_retryable(int ret, enum rdma_remove_reason why,
-					   struct ib_uobject *uobj)
-{
-	return ret && (why == RDMA_REMOVE_DESTROY ||
-		       uobj->context->cleanup_retryable);
-}
-/**
- * ib_destroy_usecnt - Called during destruction to check the usecnt
- * @usecnt: The usecnt atomic
- * @why: remove reason
- * @uobj: The uobject that is destroyed
- *
- * Non-zero usecnts will block destruction unless destruction was triggered by
- * a ucontext cleanup.
- */
-static inline int ib_destroy_usecnt(atomic_t *usecnt,
-				    enum rdma_remove_reason why,
-				    struct ib_uobject *uobj)
-{
-	if (atomic_read(usecnt) && ib_is_destroy_retryable(-EBUSY, why, uobj))
-		return -EBUSY;
-	return 0;
-}
 /**
  * ib_modify_qp_is_ok - Check that the supplied attribute mask
  * contains all required attributes and no attributes not allowed for
 struct ib_pd *__ib_alloc_pd(struct ib_device *device, unsigned int flags,
 		const char *caller);
+/**
+ * ib_alloc_pd - Allocates an unused protection domain.
+ * @device: The device on which to allocate the protection domain.
+ * @flags: protection domain flags
+ *
+ * A protection domain object provides an association between QPs, shared
+ * receive queues, address handles, memory regions, and memory windows.
+ *
+ * Every PD has a local_dma_lkey which can be used as the lkey value for local
+ * memory operations.
+ */
 #define ib_alloc_pd(device, flags) \
 	__ib_alloc_pd((device), (flags), KBUILD_MODNAME)
 					      bad_recv_wr ? : &dummy);
 }
-struct ib_qp *ib_create_qp(struct ib_pd *pd,
+struct ib_qp *ib_create_named_qp(struct ib_pd *pd,
-			   struct ib_qp_init_attr *qp_init_attr);
+				 struct ib_qp_init_attr *qp_init_attr,
+				 const char *caller);
+static inline struct ib_qp *ib_create_qp(struct ib_pd *pd,
+					 struct ib_qp_init_attr *init_attr)
+{
+	return ib_create_named_qp(pd, init_attr, KBUILD_MODNAME);
+}
 /**
  * ib_modify_qp_with_udata - Modifies the attributes for the specified QP.
 		-ENOSYS;
 }
+/*
+ * Drivers that don't need a DMA mapping at the RDMA layer, set dma_device to
+ * NULL. This causes the ib_dma* helpers to just stash the kernel virtual
+ * address into the dma address.
+ */
+static inline bool ib_uses_virt_dma(struct ib_device *dev)
+{
+	return IS_ENABLED(CONFIG_INFINIBAND_VIRT_DMA) && !dev->dma_device;
+}
 /**
  * ib_dma_mapping_error - check a DMA addr for error
  * @dev: The device for which the dma_addr was created
  */
 static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr)
 {
+	if (ib_uses_virt_dma(dev))
+		return 0;
 	return dma_mapping_error(dev->dma_device, dma_addr);
 }
 				    void *cpu_addr, size_t size,
 				    enum dma_data_direction direction)
 {
+	if (ib_uses_virt_dma(dev))
+		return (uintptr_t)cpu_addr;
 	return dma_map_single(dev->dma_device, cpu_addr, size, direction);
 }
 				       u64 addr, size_t size,
 				       enum dma_data_direction direction)
 {
-	dma_unmap_single(dev->dma_device, addr, size, direction);
+	if (!ib_uses_virt_dma(dev))
+		dma_unmap_single(dev->dma_device, addr, size, direction);
 }
 /**
 				  size_t size,
 					 enum dma_data_direction direction)
 {
+	if (ib_uses_virt_dma(dev))
+		return (uintptr_t)(page_address(page) + offset);
 	return dma_map_page(dev->dma_device, page, offset, size, direction);
 }
 				     u64 addr, size_t size,
 				     enum dma_data_direction direction)
 {
-	dma_unmap_page(dev->dma_device, addr, size, direction);
+	if (!ib_uses_virt_dma(dev))
+		dma_unmap_page(dev->dma_device, addr, size, direction);
+}
+int ib_dma_virt_map_sg(struct ib_device *dev, struct scatterlist *sg, int nents);
+static inline int ib_dma_map_sg_attrs(struct ib_device *dev,
+				      struct scatterlist *sg, int nents,
+				      enum dma_data_direction direction,
+				      unsigned long dma_attrs)
+{
+	if (ib_uses_virt_dma(dev))
+		return ib_dma_virt_map_sg(dev, sg, nents);
+	return dma_map_sg_attrs(dev->dma_device, sg, nents, direction,
+				dma_attrs);
+}
+static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev,
+					 struct scatterlist *sg, int nents,
+					 enum dma_data_direction direction,
+					 unsigned long dma_attrs)
+{
+	if (!ib_uses_virt_dma(dev))
+		dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction,
+				   dma_attrs);
 }
 /**
 				struct scatterlist *sg, int nents,
 				enum dma_data_direction direction)
 {
-	return dma_map_sg(dev->dma_device, sg, nents, direction);
+	return ib_dma_map_sg_attrs(dev, sg, nents, direction, 0);
 }
 /**
 				   struct scatterlist *sg, int nents,
 				   enum dma_data_direction direction)
 {
-	dma_unmap_sg(dev->dma_device, sg, nents, direction);
+	ib_dma_unmap_sg_attrs(dev, sg, nents, direction, 0);
-}
-static inline int ib_dma_map_sg_attrs(struct ib_device *dev,
-				      struct scatterlist *sg, int nents,
-				      enum dma_data_direction direction,
-				      unsigned long dma_attrs)
-{
-	return dma_map_sg_attrs(dev->dma_device, sg, nents, direction,
-				dma_attrs);
-}
-static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev,
-					 struct scatterlist *sg, int nents,
-					 enum dma_data_direction direction,
-					 unsigned long dma_attrs)
-{
-	dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction, dma_attrs);
 }
 /**
  */
 static inline unsigned int ib_dma_max_seg_size(struct ib_device *dev)
 {
+	if (ib_uses_virt_dma(dev))
+		return UINT_MAX;
 	return dma_get_max_seg_size(dev->dma_device);
 }
 					      size_t size,
 					      enum dma_data_direction dir)
 {
-	dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
+	if (!ib_uses_virt_dma(dev))
+		dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
 }
 /**
 						 size_t size,
 						 enum dma_data_direction dir)
 {
-	dma_sync_single_for_device(dev->dma_device, addr, size, dir);
+	if (!ib_uses_virt_dma(dev))
-}
+		dma_sync_single_for_device(dev->dma_device, addr, size, dir);
-/**
- * ib_dma_alloc_coherent - Allocate memory and map it for DMA
- * @dev: The device for which the DMA address is requested
- * @size: The size of the region to allocate in bytes
- * @dma_handle: A pointer for returning the DMA address of the region
- * @flag: memory allocator flags
- */
-static inline void *ib_dma_alloc_coherent(struct ib_device *dev,
-					   size_t size,
-					   dma_addr_t *dma_handle,
-					   gfp_t flag)
-{
-	return dma_alloc_coherent(dev->dma_device, size, dma_handle, flag);
-}
-/**
- * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent()
- * @dev: The device for which the DMA addresses were allocated
- * @size: The size of the region
- * @cpu_addr: the address returned by ib_dma_alloc_coherent()
- * @dma_handle: the DMA address returned by ib_dma_alloc_coherent()
- */
-static inline void ib_dma_free_coherent(struct ib_device *dev,
-					size_t size, void *cpu_addr,
-					dma_addr_t dma_handle)
-{
-	dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle);
 }
 /* ib_reg_user_mr - register a memory region for virtual addresses from kernel
 				   struct inode *inode, struct ib_udata *udata);
 int ib_dealloc_xrcd_user(struct ib_xrcd *xrcd, struct ib_udata *udata);
-static inline int ib_check_mr_access(int flags)
+static inline int ib_check_mr_access(struct ib_device *ib_dev,
+				     unsigned int flags)
 {
 	/*
 	 * Local write permission is required if remote write or
 	if (flags & ~IB_ACCESS_SUPPORTED)
 		return -EINVAL;
+	if (flags & IB_ACCESS_ON_DEMAND &&
+	    !(ib_dev->attrs.device_cap_flags & IB_DEVICE_ON_DEMAND_PAGING))
+		return -EINVAL;
 	return 0;
 }
 	return coredev->owner;
 }
+/**
+ * ibdev_to_node - return the NUMA node for a given ib_device
+ * @dev:	device to get the NUMA node for.
+ */
+static inline int ibdev_to_node(struct ib_device *ibdev)
+{
+	struct device *parent = ibdev->dev.parent;
+	if (!parent)
+		return NUMA_NO_NODE;
+	return dev_to_node(parent);
+}
 /**
  * rdma_device_to_drv_device - Helper macro to reach back to driver's
  *			       ib_device holder structure from device pointer.

include/rdma/restrack.h+24−0

@@ -68,6 +68,14 @@ struct rdma_restrack_entry { · 67 unmodified lines
68	* As an example for that, see mlx5 QPs with type MLX5_IB_QPT_HW_GSI	68	* As an example for that, see mlx5 QPs with type MLX5_IB_QPT_HW_GSI
69	*/	69	*/
70	bool valid;	70	bool valid;
		71	/**
		72	* @no_track: don't add this entry to restrack DB
		73	*
		74	* This field is used to mark an entry that doesn't need to be added to
		75	* internal restrack DB and presented later to the users at the nldev
		76	* query stage.
		77	*/
		78	u8 no_track : 1;
71	/*	79	/*
72	* @kref: Protect destroy of the resource	80	* @kref: Protect destroy of the resource
73	*/	81	*/
@@ -145,4 +153,20 @@ int rdma_nl_stat_hwcounter_entry(struct sk_buff msg, const char name, · 71 unmodified lines
145	struct rdma_restrack_entry rdma_restrack_get_byid(struct ib_device dev,	153	struct rdma_restrack_entry rdma_restrack_get_byid(struct ib_device dev,
146	enum rdma_restrack_type type,	154	enum rdma_restrack_type type,
147	u32 id);	155	u32 id);
		156
		157	/**
		158	* rdma_restrack_no_track() - don't add resource to the DB
		159	* @res: resource entry
		160	*
		161	* Every user of thie API should be cross examined.
		162	* Probaby you don't need to use this function.
		163	*/
		164	static inline void rdma_restrack_no_track(struct rdma_restrack_entry *res)
		165	{
		166	res->no_track = true;
		167	}
		168	static inline bool rdma_restrack_is_tracked(struct rdma_restrack_entry *res)
		169	{
		170	return !res->no_track;
		171	}
148	#endif /* _RDMA_RESTRACK_H_ */	172	#endif /* _RDMA_RESTRACK_H_ */

include/rdma/uverbs_ioctl.h+19−6

@@ -647,12 +647,15 @@ static inline bool uverbs_attr_is_valid(const struct uverbs_attr_bundle *attrs_b · 646 unmodified lines
647	* 'ucontext'.	647	* 'ucontext'.
648	*	648	*
649	*/	649	*/
650	#define rdma_udata_to_drv_context(udata, drv_dev_struct, member) \	650	static inline struct uverbs_attr_bundle *
651	(udata ? container_of(container_of(udata, struct uverbs_attr_bundle, \	651	rdma_udata_to_uverbs_attr_bundle(struct ib_udata *udata)
652	driver_udata) \	652	{
653	->context, \	653	return container_of(udata, struct uverbs_attr_bundle, driver_udata);
654	drv_dev_struct, member) : \	654	}
655	(drv_dev_struct *)NULL)	655
		656	#define rdma_udata_to_drv_context(udata, drv_dev_struct, member) \
		657	(udata ? container_of(rdma_udata_to_uverbs_attr_bundle(udata)->context, \
		658	drv_dev_struct, member) : (drv_dev_struct *)NULL)
656		659
657	#define IS_UVERBS_COPY_ERR(_ret) ((_ret) && (_ret) != -ENOENT)	660	#define IS_UVERBS_COPY_ERR(_ret) ((_ret) && (_ret) != -ENOENT)
658		661
@@ -862,6 +865,16 @@ static inline __malloc void uverbs_zalloc(struct uverbs_attr_bundle bundle, · 203 unmodified lines
862	{	865	{
863	return _uverbs_alloc(bundle, size, GFP_KERNEL \| __GFP_ZERO);	866	return _uverbs_alloc(bundle, size, GFP_KERNEL \| __GFP_ZERO);
864	}	867	}
		868
		869	static inline __malloc void uverbs_kcalloc(struct uverbs_attr_bundle bundle,
		870	size_t n, size_t size)
		871	{
		872	size_t bytes;
		873
		874	if (unlikely(check_mul_overflow(n, size, &bytes)))
		875	return ERR_PTR(-EOVERFLOW);
		876	return uverbs_zalloc(bundle, bytes);
		877	}
865	int _uverbs_get_const(s64 to, const struct uverbs_attr_bundle attrs_bundle,	878	int _uverbs_get_const(s64 to, const struct uverbs_attr_bundle attrs_bundle,
866	size_t idx, s64 lower_bound, u64 upper_bound,	879	size_t idx, s64 lower_bound, u64 upper_bound,
867	s64 *def_val);	880	s64 *def_val);

include/rdma/uverbs_types.h+7−2

 				       enum rdma_remove_reason why,
 				       struct uverbs_attr_bundle *attrs);
 	void (*remove_handle)(struct ib_uobject *uobj);
+	void (*swap_uobjects)(struct ib_uobject *obj_old,
+			      struct ib_uobject *obj_new);
 };
 struct uverbs_obj_type {
 			      bool hw_obj_valid);
 void rdma_alloc_commit_uobject(struct ib_uobject *uobj,
 			       struct uverbs_attr_bundle *attrs);
+void rdma_assign_uobject(struct ib_uobject *to_uobj,
+			 struct ib_uobject *new_uobj,
+			 struct uverbs_attr_bundle *attrs);
 /*
  * uverbs_uobject_get is called in order to increase the reference count on
 	 * because the driver is removed or the FD is closed.
 	 */
 	struct uverbs_obj_type  type;
-	int (*destroy_object)(struct ib_uobject *uobj,
+	void (*destroy_object)(struct ib_uobject *uobj,
-			      enum rdma_remove_reason why);
+			       enum rdma_remove_reason why);
 	const struct file_operations	*fops;
 	const char			*name;
 	int				flags;

include/uapi/rdma/hns-abi.h+10−0

 	__u32 reserved;
 };
+enum hns_roce_cq_cap_flags {
+	HNS_ROCE_CQ_FLAG_RECORD_DB = 1 << 0,
+};
 struct hns_roce_ib_create_cq_resp {
 	__aligned_u64 cqn; /* Only 32 bits used, 64 for compat */
 	__aligned_u64 cap_flags;
 	__aligned_u64 sdb_addr;
 };
+enum hns_roce_qp_cap_flags {
+	HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
+	HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1,
+	HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2,
+};
 struct hns_roce_ib_create_qp_resp {
 	__aligned_u64 cap_flags;
 };

include/uapi/rdma/ib_user_verbs.h+0−14

@@ -596,20 +596,6 @@ enum { · 595 unmodified lines
596	IB_UVERBS_CREATE_QP_SUP_COMP_MASK = IB_UVERBS_CREATE_QP_MASK_IND_TABLE,	596	IB_UVERBS_CREATE_QP_SUP_COMP_MASK = IB_UVERBS_CREATE_QP_MASK_IND_TABLE,
597	};	597	};
598		598
599	enum {
600	/*
601	* This value is equal to IB_QP_DEST_QPN.
602	*/
603	IB_USER_LEGACY_LAST_QP_ATTR_MASK = 1ULL << 20,
604	};
605
606	enum {
607	/*
608	* This value is equal to IB_QP_RATE_LIMIT.
609	*/
610	IB_USER_LAST_QP_ATTR_MASK = 1ULL << 25,
611	};
612
613	struct ib_uverbs_ex_create_qp {	599	struct ib_uverbs_ex_create_qp {
614	__aligned_u64 user_handle;	600	__aligned_u64 user_handle;
615	__u32 pd_handle;	601	__u32 pd_handle;

include/uapi/rdma/rdma_user_rxe.h+21−0

@@ -181,4 +181,25 @@ struct rxe_modify_srq_cmd { · 180 unmodified lines
181	__aligned_u64 mmap_info_addr;	181	__aligned_u64 mmap_info_addr;
182	};	182	};
183		183
		184	/* This data structure is stored at the base of work and
		185	* completion queues shared between user space and kernel space.
		186	* It contains the producer and consumer indices. Is also
		187	* contains a copy of the queue size parameters for user space
		188	* to use but the kernel must use the parameters in the
		189	* rxe_queue struct. For performance reasons arrange to have
		190	* producer and consumer indices in separate cache lines
		191	* the kernel should always mask the indices to avoid accessing
		192	* memory outside of the data area
		193	*/
		194	struct rxe_queue_buf {
		195	__u32 log2_elem_size;
		196	__u32 index_mask;
		197	__u32 pad_1[30];
		198	__u32 producer_index;
		199	__u32 pad_2[31];
		200	__u32 consumer_index;
		201	__u32 pad_3[31];
		202	__u8 data[];
		203	};
		204
184	#endif /* RDMA_USER_RXE_H */	205	#endif /* RDMA_USER_RXE_H */

kernel/dma/Kconfig+0−5

 config ARCH_HAS_FORCE_DMA_UNENCRYPTED
 	bool
-config DMA_VIRT_OPS
-	bool
-	depends on HAS_DMA
-	select DMA_OPS
 config SWIOTLB
 	bool
 	select NEED_DMA_MAP_STATE

kernel/dma/Makefile+0−1

@@ -5,7 +5,6 @@ obj-$(CONFIG_DMA_OPS) += ops_helpers.o · 4 unmodified lines
5	obj-$(CONFIG_DMA_OPS) += dummy.o	5	obj-$(CONFIG_DMA_OPS) += dummy.o
6	obj-$(CONFIG_DMA_CMA) += contiguous.o	6	obj-$(CONFIG_DMA_CMA) += contiguous.o
7	obj-$(CONFIG_DMA_DECLARE_COHERENT) += coherent.o	7	obj-$(CONFIG_DMA_DECLARE_COHERENT) += coherent.o
8	obj-$(CONFIG_DMA_VIRT_OPS) += virt.o
9	obj-$(CONFIG_DMA_API_DEBUG) += debug.o	8	obj-$(CONFIG_DMA_API_DEBUG) += debug.o
10	obj-$(CONFIG_SWIOTLB) += swiotlb.o	9	obj-$(CONFIG_SWIOTLB) += swiotlb.o
11	obj-$(CONFIG_DMA_COHERENT_POOL) += pool.o	10	obj-$(CONFIG_DMA_COHERENT_POOL) += pool.o

kernel/dma/virt.c+0−61

@@ -1,61 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* DMA operations that map to virtual addresses without flushing memory.
4	*/
5	#include <linux/export.h>
6	#include <linux/mm.h>
7	#include <linux/dma-map-ops.h>
8	#include <linux/scatterlist.h>
9
10	static void dma_virt_alloc(struct device dev, size_t size,
11	dma_addr_t *dma_handle, gfp_t gfp,
12	unsigned long attrs)
13	{
14	void *ret;
15
16	ret = (void *)__get_free_pages(gfp \| __GFP_ZERO, get_order(size));
17	if (ret)
18	*dma_handle = (uintptr_t)ret;
19	return ret;
20	}
21
22	static void dma_virt_free(struct device *dev, size_t size,
23	void *cpu_addr, dma_addr_t dma_addr,
24	unsigned long attrs)
25	{
26	free_pages((unsigned long)cpu_addr, get_order(size));
27	}
28
29	static dma_addr_t dma_virt_map_page(struct device dev, struct page page,
30	unsigned long offset, size_t size,
31	enum dma_data_direction dir,
32	unsigned long attrs)
33	{
34	return (uintptr_t)(page_address(page) + offset);
35	}
36
37	static int dma_virt_map_sg(struct device dev, struct scatterlist sgl,
38	int nents, enum dma_data_direction dir,
39	unsigned long attrs)
40	{
41	int i;
42	struct scatterlist *sg;
43
44	for_each_sg(sgl, sg, nents, i) {
45	BUG_ON(!sg_page(sg));
46	sg_dma_address(sg) = (uintptr_t)sg_virt(sg);
47	sg_dma_len(sg) = sg->length;
48	}
49
50	return nents;
51	}
52
53	const struct dma_map_ops dma_virt_ops = {
54	.alloc = dma_virt_alloc,
55	.free = dma_virt_free,
56	.map_page = dma_virt_map_page,
57	.map_sg = dma_virt_map_sg,
58	.alloc_pages = dma_common_alloc_pages,
59	.free_pages = dma_common_free_pages,
60	};
61	EXPORT_SYMBOL(dma_virt_ops);

net/rds/ib.c+0−10

  * SOFTWARE.
  *
  */
-#include <linux/dmapool.h>
 #include <linux/kernel.h>
 #include <linux/in.h>
 #include <linux/if.h>
 		rds_ib_destroy_mr_pool(rds_ibdev->mr_1m_pool);
 	if (rds_ibdev->pd)
 		ib_dealloc_pd(rds_ibdev->pd);
-	dma_pool_destroy(rds_ibdev->rid_hdrs_pool);
 	list_for_each_entry_safe(i_ipaddr, i_next, &rds_ibdev->ipaddr_list, list) {
 		list_del(&i_ipaddr->list);
 		rds_ibdev->pd = NULL;
 		goto put_dev;
 	}
-	rds_ibdev->rid_hdrs_pool = dma_pool_create(device->name,
-						   device->dma_device,
-						   sizeof(struct rds_header),
-						   L1_CACHE_BYTES, 0);
-	if (!rds_ibdev->rid_hdrs_pool) {
-		ret = -ENOMEM;
-		goto put_dev;
-	}
 	rds_ibdev->mr_1m_pool =
 		rds_ib_create_mr_pool(rds_ibdev, RDS_IB_MR_1M_POOL);

net/rds/ib.h+0−13

 	struct list_head	conn_list;
 	struct ib_device	*dev;
 	struct ib_pd		*pd;
-	struct dma_pool		*rid_hdrs_pool; /* RDS headers DMA pool */
 	u8			odp_capable:1;
 	unsigned int		max_mrs;
 	int			*vector_load;
 };
-static inline int ibdev_to_node(struct ib_device *ibdev)
-{
-	struct device *parent;
-	parent = ibdev->dev.parent;
-	return parent ? dev_to_node(parent) : NUMA_NO_NODE;
-}
 #define rdsibdev_to_node(rdsibdev) ibdev_to_node(rdsibdev->dev)
 /* bits for i_ack_flags */
 int rds_ib_cm_initiate_connect(struct rdma_cm_id *cm_id, bool isv6);
 void rds_ib_cm_connect_complete(struct rds_connection *conn,
 				struct rdma_cm_event *event);
-struct rds_header **rds_dma_hdrs_alloc(struct ib_device *ibdev,
-				       struct dma_pool *pool,
-				       dma_addr_t **dma_addrs, u32 num_hdrs);
-void rds_dma_hdrs_free(struct dma_pool *pool, struct rds_header **hdrs,
-		       dma_addr_t *dma_addrs, u32 num_hdrs);
 #define rds_ib_conn_error(conn, fmt...) \
 	__rds_ib_conn_error(conn, KERN_WARNING "RDS/IB: " fmt)

net/rds/ib_cm.c+78−50

  * SOFTWARE.
  *
  */
-#include <linux/dmapool.h>
 #include <linux/kernel.h>
 #include <linux/in.h>
 #include <linux/slab.h>
 	rds_ibdev->vector_load[index]--;
 }
+static void rds_dma_hdr_free(struct ib_device *dev, struct rds_header *hdr,
+		dma_addr_t dma_addr, enum dma_data_direction dir)
+{
+	ib_dma_unmap_single(dev, dma_addr, sizeof(*hdr), dir);
+	kfree(hdr);
+}
+static struct rds_header *rds_dma_hdr_alloc(struct ib_device *dev,
+		dma_addr_t *dma_addr, enum dma_data_direction dir)
+{
+	struct rds_header *hdr;
+	hdr = kzalloc_node(sizeof(*hdr), GFP_KERNEL, ibdev_to_node(dev));
+	if (!hdr)
+		return NULL;
+	*dma_addr = ib_dma_map_single(dev, hdr, sizeof(*hdr),
+				      DMA_BIDIRECTIONAL);
+	if (ib_dma_mapping_error(dev, *dma_addr)) {
+		kfree(hdr);
+		return NULL;
+	}
+	return hdr;
+}
+/* Free the DMA memory used to store struct rds_header.
+ *
+ * @dev: the RDS IB device
+ * @hdrs: pointer to the array storing DMA memory pointers
+ * @dma_addrs: pointer to the array storing DMA addresses
+ * @num_hdars: number of headers to free.
+ */
+static void rds_dma_hdrs_free(struct rds_ib_device *dev,
+		struct rds_header **hdrs, dma_addr_t *dma_addrs, u32 num_hdrs,
+		enum dma_data_direction dir)
+{
+	u32 i;
+	for (i = 0; i < num_hdrs; i++)
+		rds_dma_hdr_free(dev->dev, hdrs[i], dma_addrs[i], dir);
+	kvfree(hdrs);
+	kvfree(dma_addrs);
+}
 /* Allocate DMA coherent memory to be used to store struct rds_header for
  * sending/receiving packets.  The pointers to the DMA memory and the
  * associated DMA addresses are stored in two arrays.
  *
- * @ibdev: the IB device
+ * @dev: the RDS IB device
- * @pool: the DMA memory pool
  * @dma_addrs: pointer to the array for storing DMA addresses
  * @num_hdrs: number of headers to allocate
  *
  * It returns the pointer to the array storing the DMA memory pointers.  On
  * error, NULL pointer is returned.
  */
-struct rds_header **rds_dma_hdrs_alloc(struct ib_device *ibdev,
+static struct rds_header **rds_dma_hdrs_alloc(struct rds_ib_device *dev,
-				       struct dma_pool *pool,
+		dma_addr_t **dma_addrs, u32 num_hdrs,
-				       dma_addr_t **dma_addrs, u32 num_hdrs)
+		enum dma_data_direction dir)
 {
 	struct rds_header **hdrs;
 	dma_addr_t *hdr_daddrs;
 	u32 i;
 	hdrs = kvmalloc_node(sizeof(*hdrs) * num_hdrs, GFP_KERNEL,
-			     ibdev_to_node(ibdev));
+			     ibdev_to_node(dev->dev));
 	if (!hdrs)
 		return NULL;
 	hdr_daddrs = kvmalloc_node(sizeof(*hdr_daddrs) * num_hdrs, GFP_KERNEL,
-				   ibdev_to_node(ibdev));
+				   ibdev_to_node(dev->dev));
 	if (!hdr_daddrs) {
 		kvfree(hdrs);
 		return NULL;
 	}
 	for (i = 0; i < num_hdrs; i++) {
-		hdrs[i] = dma_pool_zalloc(pool, GFP_KERNEL, &hdr_daddrs[i]);
+		hdrs[i] = rds_dma_hdr_alloc(dev->dev, &hdr_daddrs[i], dir);
 		if (!hdrs[i]) {
-			rds_dma_hdrs_free(pool, hdrs, hdr_daddrs, i);
+			rds_dma_hdrs_free(dev, hdrs, hdr_daddrs, i, dir);
 			return NULL;
 		}
 	}
 	return hdrs;
 }
-/* Free the DMA memory used to store struct rds_header.
- *
- * @pool: the DMA memory pool
- * @hdrs: pointer to the array storing DMA memory pointers
- * @dma_addrs: pointer to the array storing DMA addresses
- * @num_hdars: number of headers to free.
- */
-void rds_dma_hdrs_free(struct dma_pool *pool, struct rds_header **hdrs,
-		       dma_addr_t *dma_addrs, u32 num_hdrs)
-{
-	u32 i;
-	for (i = 0; i < num_hdrs; i++)
-		dma_pool_free(pool, hdrs[i], dma_addrs[i]);
-	kvfree(hdrs);
-	kvfree(dma_addrs);
-}
 /*
  * This needs to be very careful to not leave IS_ERR pointers around for
  * cleanup to trip over.
 	struct rds_ib_device *rds_ibdev;
 	unsigned long max_wrs;
 	int ret, fr_queue_space;
-	struct dma_pool *pool;
 	/*
 	 * It's normal to see a null device if an incoming connection races
 		goto recv_cq_out;
 	}
-	pool = rds_ibdev->rid_hdrs_pool;
+	ic->i_send_hdrs = rds_dma_hdrs_alloc(rds_ibdev, &ic->i_send_hdrs_dma,
-	ic->i_send_hdrs = rds_dma_hdrs_alloc(dev, pool, &ic->i_send_hdrs_dma,
+					     ic->i_send_ring.w_nr,
-					     ic->i_send_ring.w_nr);
+					     DMA_TO_DEVICE);
 	if (!ic->i_send_hdrs) {
 		ret = -ENOMEM;
 		rdsdebug("DMA send hdrs alloc failed\n");
 		goto qp_out;
 	}
-	ic->i_recv_hdrs = rds_dma_hdrs_alloc(dev, pool, &ic->i_recv_hdrs_dma,
+	ic->i_recv_hdrs = rds_dma_hdrs_alloc(rds_ibdev, &ic->i_recv_hdrs_dma,
-					     ic->i_recv_ring.w_nr);
+					     ic->i_recv_ring.w_nr,
+					     DMA_FROM_DEVICE);
 	if (!ic->i_recv_hdrs) {
 		ret = -ENOMEM;
 		rdsdebug("DMA recv hdrs alloc failed\n");
 		goto send_hdrs_dma_out;
 	}
-	ic->i_ack = dma_pool_zalloc(pool, GFP_KERNEL,
+	ic->i_ack = rds_dma_hdr_alloc(rds_ibdev->dev, &ic->i_ack_dma,
-				    &ic->i_ack_dma);
+				      DMA_TO_DEVICE);
 	if (!ic->i_ack) {
 		ret = -ENOMEM;
 		rdsdebug("DMA ack header alloc failed\n");
 	vfree(ic->i_sends);
 ack_dma_out:
-	dma_pool_free(pool, ic->i_ack, ic->i_ack_dma);
+	rds_dma_hdr_free(rds_ibdev->dev, ic->i_ack, ic->i_ack_dma,
+			 DMA_TO_DEVICE);
 	ic->i_ack = NULL;
 recv_hdrs_dma_out:
-	rds_dma_hdrs_free(pool, ic->i_recv_hdrs, ic->i_recv_hdrs_dma,
+	rds_dma_hdrs_free(rds_ibdev, ic->i_recv_hdrs, ic->i_recv_hdrs_dma,
-			  ic->i_recv_ring.w_nr);
+			  ic->i_recv_ring.w_nr, DMA_FROM_DEVICE);
 	ic->i_recv_hdrs = NULL;
 	ic->i_recv_hdrs_dma = NULL;
 send_hdrs_dma_out:
-	rds_dma_hdrs_free(pool, ic->i_send_hdrs, ic->i_send_hdrs_dma,
+	rds_dma_hdrs_free(rds_ibdev, ic->i_send_hdrs, ic->i_send_hdrs_dma,
-			  ic->i_send_ring.w_nr);
+			  ic->i_send_ring.w_nr, DMA_TO_DEVICE);
 	ic->i_send_hdrs = NULL;
 	ic->i_send_hdrs_dma = NULL;
 		}
 		if (ic->rds_ibdev) {
-			struct dma_pool *pool;
-			pool = ic->rds_ibdev->rid_hdrs_pool;
 			/* then free the resources that ib callbacks use */
 			if (ic->i_send_hdrs) {
-				rds_dma_hdrs_free(pool, ic->i_send_hdrs,
+				rds_dma_hdrs_free(ic->rds_ibdev,
+						  ic->i_send_hdrs,
 						  ic->i_send_hdrs_dma,
-						  ic->i_send_ring.w_nr);
+						  ic->i_send_ring.w_nr,
+						  DMA_TO_DEVICE);
 				ic->i_send_hdrs = NULL;
 				ic->i_send_hdrs_dma = NULL;
 			}
 			if (ic->i_recv_hdrs) {
-				rds_dma_hdrs_free(pool, ic->i_recv_hdrs,
+				rds_dma_hdrs_free(ic->rds_ibdev,
+						  ic->i_recv_hdrs,
 						  ic->i_recv_hdrs_dma,
-						  ic->i_recv_ring.w_nr);
+						  ic->i_recv_ring.w_nr,
+						  DMA_FROM_DEVICE);
 				ic->i_recv_hdrs = NULL;
 				ic->i_recv_hdrs_dma = NULL;
 			}
 			if (ic->i_ack) {
-				dma_pool_free(pool, ic->i_ack, ic->i_ack_dma);
+				rds_dma_hdr_free(ic->rds_ibdev->dev, ic->i_ack,
+						 ic->i_ack_dma, DMA_TO_DEVICE);
 				ic->i_ack = NULL;
 			}
 		} else {

net/rds/ib_recv.c+15−3

 	seq = rds_ib_get_ack(ic);
 	rdsdebug("send_ack: ic %p ack %llu\n", ic, (unsigned long long) seq);
+	ib_dma_sync_single_for_cpu(ic->rds_ibdev->dev, ic->i_ack_dma,
+				   sizeof(*hdr), DMA_TO_DEVICE);
 	rds_message_populate_header(hdr, 0, 0, 0);
 	hdr->h_ack = cpu_to_be64(seq);
 	hdr->h_credit = adv_credits;
 	rds_message_make_checksum(hdr);
+	ib_dma_sync_single_for_device(ic->rds_ibdev->dev, ic->i_ack_dma,
+				      sizeof(*hdr), DMA_TO_DEVICE);
 	ic->i_ack_queued = jiffies;
 	ret = ib_post_send(ic->i_cm_id->qp, &ic->i_ack_wr, NULL);
 	struct rds_ib_connection *ic = conn->c_transport_data;
 	struct rds_ib_incoming *ibinc = ic->i_ibinc;
 	struct rds_header *ihdr, *hdr;
+	dma_addr_t dma_addr = ic->i_recv_hdrs_dma[recv - ic->i_recvs];
 	/* XXX shut down the connection if port 0,0 are seen? */
 	ihdr = ic->i_recv_hdrs[recv - ic->i_recvs];
+	ib_dma_sync_single_for_cpu(ic->rds_ibdev->dev, dma_addr,
+				   sizeof(*ihdr), DMA_FROM_DEVICE);
 	/* Validate the checksum. */
 	if (!rds_message_verify_checksum(ihdr)) {
 		rds_ib_conn_error(conn, "incoming message "
 		       "forcing a reconnect\n",
 		       &conn->c_faddr);
 		rds_stats_inc(s_recv_drop_bad_checksum);
-		return;
+		goto done;
 	}
 	/* Process the ACK sequence which comes with every packet */
 		 */
 		rds_ib_frag_free(ic, recv->r_frag);
 		recv->r_frag = NULL;
-		return;
+		goto done;
 	}
 	/*
 		    hdr->h_dport != ihdr->h_dport) {
 			rds_ib_conn_error(conn,
 				"fragment header mismatch; forcing reconnect\n");
-			return;
+			goto done;
 		}
 	}
 		rds_inc_put(&ibinc->ii_inc);
 	}
+done:
+	ib_dma_sync_single_for_device(ic->rds_ibdev->dev, dma_addr,
+				      sizeof(*ihdr), DMA_FROM_DEVICE);
 }
 void rds_ib_recv_cqe_handler(struct rds_ib_connection *ic,

net/rds/ib_send.c+8−0

 		send->s_sge[0].length = sizeof(struct rds_header);
 		send->s_sge[0].lkey = ic->i_pd->local_dma_lkey;
+		ib_dma_sync_single_for_cpu(ic->rds_ibdev->dev,
+					   ic->i_send_hdrs_dma[pos],
+					   sizeof(struct rds_header),
+					   DMA_TO_DEVICE);
 		memcpy(ic->i_send_hdrs[pos], &rm->m_inc.i_hdr,
 		       sizeof(struct rds_header));
 			adv_credits = 0;
 			rds_ib_stats_inc(s_ib_tx_credit_updates);
 		}
+		ib_dma_sync_single_for_device(ic->rds_ibdev->dev,
+					      ic->i_send_hdrs_dma[pos],
+					      sizeof(struct rds_header),
+					      DMA_TO_DEVICE);
 		if (prev)
 			prev->s_wr.next = &send->s_wr;

tools/testing/scatterlist/main.c+41−23

 	int alloc_ret;
 	unsigned num_pages;
 	unsigned *pfn;
+	unsigned *pfn_app;
 	unsigned size;
 	unsigned int max_seg;
 	unsigned int expected_segments;
 {
 	const unsigned int sgmax = UINT_MAX;
 	struct test *test, tests[] = {
-		{ -EINVAL, 1, pfn(0), PAGE_SIZE, 0, 1 },
+		{ -EINVAL, 1, pfn(0), NULL, PAGE_SIZE, 0, 1 },
-		{ 0, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 },
+		{ 0, 1, pfn(0), NULL, PAGE_SIZE, PAGE_SIZE + 1, 1 },
-		{ 0, 1, pfn(0), PAGE_SIZE, sgmax + 1, 1 },
+		{ 0, 1, pfn(0), NULL, PAGE_SIZE, sgmax + 1, 1 },
-		{ 0, 1, pfn(0), PAGE_SIZE, sgmax, 1 },
+		{ 0, 1, pfn(0), NULL, PAGE_SIZE, sgmax, 1 },
-		{ 0, 1, pfn(0), 1, sgmax, 1 },
+		{ 0, 1, pfn(0), NULL, 1, sgmax, 1 },
-		{ 0, 2, pfn(0, 1), 2 * PAGE_SIZE, sgmax, 1 },
+		{ 0, 2, pfn(0, 1), NULL, 2 * PAGE_SIZE, sgmax, 1 },
-		{ 0, 2, pfn(1, 0), 2 * PAGE_SIZE, sgmax, 2 },
+		{ 0, 2, pfn(1, 0), NULL, 2 * PAGE_SIZE, sgmax, 2 },
-		{ 0, 3, pfn(0, 1, 2), 3 * PAGE_SIZE, sgmax, 1 },
+		{ 0, 3, pfn(0, 1, 2), NULL, 3 * PAGE_SIZE, sgmax, 1 },
-		{ 0, 3, pfn(0, 2, 1), 3 * PAGE_SIZE, sgmax, 3 },
+		{ 0, 3, pfn(0, 1, 2), NULL, 3 * PAGE_SIZE, sgmax, 1 },
-		{ 0, 3, pfn(0, 1, 3), 3 * PAGE_SIZE, sgmax, 2 },
+		{ 0, 3, pfn(0, 1, 2), pfn(3, 4, 5), 3 * PAGE_SIZE, sgmax, 1 },
-		{ 0, 3, pfn(1, 2, 4), 3 * PAGE_SIZE, sgmax, 2 },
+		{ 0, 3, pfn(0, 1, 2), pfn(4, 5, 6), 3 * PAGE_SIZE, sgmax, 2 },
-		{ 0, 3, pfn(1, 3, 4), 3 * PAGE_SIZE, sgmax, 2 },
+		{ 0, 3, pfn(0, 2, 1), NULL, 3 * PAGE_SIZE, sgmax, 3 },
-		{ 0, 4, pfn(0, 1, 3, 4), 4 * PAGE_SIZE, sgmax, 2 },
+		{ 0, 3, pfn(0, 1, 3), NULL, 3 * PAGE_SIZE, sgmax, 2 },
-		{ 0, 5, pfn(0, 1, 3, 4, 5), 5 * PAGE_SIZE, sgmax, 2 },
+		{ 0, 3, pfn(1, 2, 4), NULL, 3 * PAGE_SIZE, sgmax, 2 },
-		{ 0, 5, pfn(0, 1, 3, 4, 6), 5 * PAGE_SIZE, sgmax, 3 },
+		{ 0, 3, pfn(1, 3, 4), NULL, 3 * PAGE_SIZE, sgmax, 2 },
-		{ 0, 5, pfn(0, 1, 2, 3, 4), 5 * PAGE_SIZE, sgmax, 1 },
+		{ 0, 4, pfn(0, 1, 3, 4), NULL, 4 * PAGE_SIZE, sgmax, 2 },
-		{ 0, 5, pfn(0, 1, 2, 3, 4), 5 * PAGE_SIZE, 2 * PAGE_SIZE, 3 },
+		{ 0, 5, pfn(0, 1, 3, 4, 5), NULL, 5 * PAGE_SIZE, sgmax, 2 },
-		{ 0, 6, pfn(0, 1, 2, 3, 4, 5), 6 * PAGE_SIZE, 2 * PAGE_SIZE, 3 },
+		{ 0, 5, pfn(0, 1, 3, 4, 6), NULL, 5 * PAGE_SIZE, sgmax, 3 },
-		{ 0, 6, pfn(0, 2, 3, 4, 5, 6), 6 * PAGE_SIZE, 2 * PAGE_SIZE, 4 },
+		{ 0, 5, pfn(0, 1, 2, 3, 4), NULL, 5 * PAGE_SIZE, sgmax, 1 },
-		{ 0, 6, pfn(0, 1, 3, 4, 5, 6), 6 * PAGE_SIZE, 2 * PAGE_SIZE, 3 },
+		{ 0, 5, pfn(0, 1, 2, 3, 4), NULL, 5 * PAGE_SIZE, 2 * PAGE_SIZE,
-		{ 0, 0, NULL, 0, 0, 0 },
+		  3 },
+		{ 0, 6, pfn(0, 1, 2, 3, 4, 5), NULL, 6 * PAGE_SIZE,
+		  2 * PAGE_SIZE, 3 },
+		{ 0, 6, pfn(0, 2, 3, 4, 5, 6), NULL, 6 * PAGE_SIZE,
+		  2 * PAGE_SIZE, 4 },
+		{ 0, 6, pfn(0, 1, 3, 4, 5, 6), pfn(7, 8, 9, 10, 11, 12),
+		  6 * PAGE_SIZE, 12 * PAGE_SIZE, 2 },
+		{ 0, 0, NULL, NULL, 0, 0, 0 },
 	};
 	unsigned int i;
 	for (i = 0, test = tests; test->expected_segments; test++, i++) {
+		int left_pages = test->pfn_app ? test->num_pages : 0;
 		struct page *pages[MAX_PAGES];
 		struct sg_table st;
 		struct scatterlist *sg;
 		set_pages(pages, test->pfn, test->num_pages);
 		sg = __sg_alloc_table_from_pages(&st, pages, test->num_pages, 0,
-				test->size, test->max_seg, NULL, 0, GFP_KERNEL);
+				test->size, test->max_seg, NULL, left_pages, GFP_KERNEL);
 		assert(PTR_ERR_OR_ZERO(sg) == test->alloc_ret);
 		if (test->alloc_ret)
 			continue;
+		if (test->pfn_app) {
+			set_pages(pages, test->pfn_app, test->num_pages);
+			sg = __sg_alloc_table_from_pages(&st, pages, test->num_pages, 0,
+					test->size, test->max_seg, sg, 0, GFP_KERNEL);
+			assert(PTR_ERR_OR_ZERO(sg) == test->alloc_ret);
+		}
 		VALIDATE(st.nents == test->expected_segments, &st, test);
-		VALIDATE(st.orig_nents == test->expected_segments, &st, test);
+		if (!test->pfn_app)
+			VALIDATE(st.orig_nents == test->expected_segments, &st, test);
 		sg_free_table(&st);
 	}

@@ -3448,7 +3448,7 @@ static ssize_t srpt_tpg_attrib_srp_max_rdma_size_show(struct config_item *item, · 3447 unmodified lines
3448	struct se_portal_group *se_tpg = attrib_to_tpg(item);	3448	struct se_portal_group *se_tpg = attrib_to_tpg(item);
3449	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);	3449	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);
3450		3450
3451	return sprintf(page, "%u\n", sport->port_attrib.srp_max_rdma_size);	3451	return sysfs_emit(page, "%u\n", sport->port_attrib.srp_max_rdma_size);
3452	}	3452	}
3453		3453
3454	static ssize_t srpt_tpg_attrib_srp_max_rdma_size_store(struct config_item *item,	3454	static ssize_t srpt_tpg_attrib_srp_max_rdma_size_store(struct config_item *item,
@@ -3485,7 +3485,7 @@ static ssize_t srpt_tpg_attrib_srp_max_rsp_size_show(struct config_item *item, · 30 unmodified lines
3485	struct se_portal_group *se_tpg = attrib_to_tpg(item);	3485	struct se_portal_group *se_tpg = attrib_to_tpg(item);
3486	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);	3486	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);
3487		3487
3488	return sprintf(page, "%u\n", sport->port_attrib.srp_max_rsp_size);	3488	return sysfs_emit(page, "%u\n", sport->port_attrib.srp_max_rsp_size);
3489	}	3489	}
3490		3490
3491	static ssize_t srpt_tpg_attrib_srp_max_rsp_size_store(struct config_item *item,	3491	static ssize_t srpt_tpg_attrib_srp_max_rsp_size_store(struct config_item *item,
@@ -3522,7 +3522,7 @@ static ssize_t srpt_tpg_attrib_srp_sq_size_show(struct config_item *item, · 30 unmodified lines
3522	struct se_portal_group *se_tpg = attrib_to_tpg(item);	3522	struct se_portal_group *se_tpg = attrib_to_tpg(item);
3523	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);	3523	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);
3524		3524
3525	return sprintf(page, "%u\n", sport->port_attrib.srp_sq_size);	3525	return sysfs_emit(page, "%u\n", sport->port_attrib.srp_sq_size);
3526	}	3526	}
3527		3527
3528	static ssize_t srpt_tpg_attrib_srp_sq_size_store(struct config_item *item,	3528	static ssize_t srpt_tpg_attrib_srp_sq_size_store(struct config_item *item,
@@ -3559,7 +3559,7 @@ static ssize_t srpt_tpg_attrib_use_srq_show(struct config_item *item, · 30 unmodified lines
3559	struct se_portal_group *se_tpg = attrib_to_tpg(item);	3559	struct se_portal_group *se_tpg = attrib_to_tpg(item);
3560	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);	3560	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);
3561		3561
3562	return sprintf(page, "%d\n", sport->port_attrib.use_srq);	3562	return sysfs_emit(page, "%d\n", sport->port_attrib.use_srq);
3563	}	3563	}
3564		3564
3565	static ssize_t srpt_tpg_attrib_use_srq_store(struct config_item *item,	3565	static ssize_t srpt_tpg_attrib_use_srq_store(struct config_item *item,
@@ -3649,7 +3649,7 @@ out: · 83 unmodified lines
3649		3649
3650	static ssize_t srpt_rdma_cm_port_show(struct config_item item, char page)	3650	static ssize_t srpt_rdma_cm_port_show(struct config_item item, char page)
3651	{	3651	{
3652	return sprintf(page, "%d\n", rdma_cm_port);	3652	return sysfs_emit(page, "%d\n", rdma_cm_port);
3653	}	3653	}
3654		3654
3655	static ssize_t srpt_rdma_cm_port_store(struct config_item *item,	3655	static ssize_t srpt_rdma_cm_port_store(struct config_item *item,
@@ -3705,7 +3705,7 @@ static ssize_t srpt_tpg_enable_show(struct config_item item, char page) · 49 unmodified lines
3705	struct se_portal_group *se_tpg = to_tpg(item);	3705	struct se_portal_group *se_tpg = to_tpg(item);
3706	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);	3706	struct srpt_port *sport = srpt_tpg_to_sport(se_tpg);
3707		3707
3708	return snprintf(page, PAGE_SIZE, "%d\n", sport->enabled);	3708	return sysfs_emit(page, "%d\n", sport->enabled);
3709	}	3709	}
3710		3710
3711	static ssize_t srpt_tpg_enable_store(struct config_item *item,	3711	static ssize_t srpt_tpg_enable_store(struct config_item *item,
@@ -3812,7 +3812,7 @@ static void srpt_drop_tport(struct se_wwn *wwn) · 100 unmodified lines
3812		3812
3813	static ssize_t srpt_wwn_version_show(struct config_item item, char buf)	3813	static ssize_t srpt_wwn_version_show(struct config_item item, char buf)
3814	{	3814	{
3815	return scnprintf(buf, PAGE_SIZE, "\n");	3815	return sysfs_emit(buf, "\n");
3816	}	3816	}
3817		3817
3818	CONFIGFS_ATTR_RO(srpt_wwn_, version);	3818	CONFIGFS_ATTR_RO(srpt_wwn_, version);