Apart from the obvious cleanup, this should make the line cursor_end = x - xorigin + w; correct now.
Unified · Split
| @@ -215,10 +215,14 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc, · 214 unmodified lines | ||
| 215 | 215 | } |
| 216 | 216 | DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); |
| 217 | 217 | |
| 218 | − if (x < 0) | |
| 218 | + if (x < 0) { | |
| 219 | 219 | xorigin = min(-x, CURSOR_WIDTH - 1); |
| 220 | − if (y < 0) | |
| 220 | + x = 0; | |
| 221 | + } | |
| 222 | + if (y < 0) { | |
| 221 | 223 | yorigin = min(-y, CURSOR_HEIGHT - 1); |
| 224 | + y = 0; | |
| 225 | + } | |
| 222 | 226 | |
| 223 | 227 | if (ASIC_IS_AVIVO(rdev)) { |
| 224 | 228 | int i = 0; |
| @@ -251,16 +255,12 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc, · 26 unmodified lines | ||
| 251 | 255 | |
| 252 | 256 | radeon_lock_cursor(crtc, true); |
| 253 | 257 | if (ASIC_IS_DCE4(rdev)) { |
| 254 | − WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset, | |
| 255 | − ((xorigin ? 0 : x) << 16) | | |
| 256 | − (yorigin ? 0 : y)); | |
| 258 | + WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset, (x << 16) | y); | |
| 257 | 259 | WREG32(EVERGREEN_CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin); |
| 258 | 260 | WREG32(EVERGREEN_CUR_SIZE + radeon_crtc->crtc_offset, |
| 259 | 261 | ((w - 1) << 16) | (radeon_crtc->cursor_height - 1)); |
| 260 | 262 | } else if (ASIC_IS_AVIVO(rdev)) { |
| 261 | − WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset, | |
| 262 | − ((xorigin ? 0 : x) << 16) | | |
| 263 | − (yorigin ? 0 : y)); | |
| 263 | + WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset, (x << 16) | y); | |
| 264 | 264 | WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin); |
| 265 | 265 | WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, |
| 266 | 266 | ((w - 1) << 16) | (radeon_crtc->cursor_height - 1)); |
| @@ -274,8 +274,8 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc, · 7 unmodified lines | ||
| 274 | 274 | | yorigin)); |
| 275 | 275 | WREG32(RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset, |
| 276 | 276 | (RADEON_CUR_LOCK |
| 277 | − | ((xorigin ? 0 : x) << 16) | |
| 278 | − | (yorigin ? 0 : y))); | |
| 277 | + | (x << 16) | |
| 278 | + | y)); | |
| 279 | 279 | /* offset is from DISP(2)_BASE_ADDRESS */ |
| 280 | 280 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, (radeon_crtc->legacy_cursor_offset + |
| 281 | 281 | (yorigin * 256))); |