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Merge tag 'amd-drm-fixes-6.9-2024-05-10' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes

amd-drm-fixes-6.9-2024-05-10: amdgpu: - DCN 3.5 fix - MST DSC fixes - S0i3 fix - S4 fix - HDP MMIO mapping fix - Fix a regression in visible vram handling amdkfd: - Spatial partition fix Signed-off-by: Dave Airlie <airlied@redhat.com>

Dave Airlie committed 2 years ago

Commit 06fbf842 parents fa68a34 8d2c9307 files · +51 −18Browse files

Unified · Split

7 files
  1. drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +1 −1
  2. drivers/gpu/drm/amd/amdkfd/kfd_chardev.c +5 −2
  3. drivers/gpu/drm/amd/amdkfd/kfd_topology.c +2 −3
  4. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +13 −3
  5. drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c +2 −2
  6. drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c +27 −6
  7. drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c+1−1
@@ -427,7 +427,7 @@ bool amdgpu_res_cpu_visible(struct amdgpu_device *adev, · 426 unmodified lines
427 427
428 amdgpu_res_first(res, 0, res->size, &cursor);428 amdgpu_res_first(res, 0, res->size, &cursor);
429 while (cursor.remaining) {429 while (cursor.remaining) {
430 if ((cursor.start + cursor.size) >= adev->gmc.visible_vram_size)430 if ((cursor.start + cursor.size) > adev->gmc.visible_vram_size)
431 return false;431 return false;
432 amdgpu_res_next(&cursor, cursor.size);432 amdgpu_res_next(&cursor, cursor.size);
433 }433 }
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c+5−2
@@ -1139,7 +1139,7 @@ static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep, · 1138 unmodified lines
1139 goto err_unlock;1139 goto err_unlock;
1140 }1140 }
1141 offset = dev->adev->rmmio_remap.bus_addr;1141 offset = dev->adev->rmmio_remap.bus_addr;
1142 if (!offset) {1142 if (!offset || (PAGE_SIZE > 4096)) {
1143 err = -ENOMEM;1143 err = -ENOMEM;
1144 goto err_unlock;1144 goto err_unlock;
1145 }1145 }
@@ -2307,7 +2307,7 @@ static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd, · 1161 unmodified lines
2307 return -EINVAL;2307 return -EINVAL;
2308 }2308 }
2309 offset = pdd->dev->adev->rmmio_remap.bus_addr;2309 offset = pdd->dev->adev->rmmio_remap.bus_addr;
2310 if (!offset) {2310 if (!offset || (PAGE_SIZE > 4096)) {
2311 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n");2311 pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n");
2312 return -ENOMEM;2312 return -ENOMEM;
2313 }2313 }
@@ -3349,6 +3349,9 @@ static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process, · 1035 unmodified lines
3349 if (vma->vm_end - vma->vm_start != PAGE_SIZE)3349 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
3350 return -EINVAL;3350 return -EINVAL;
3351 3351
3352 if (PAGE_SIZE > 4096)
3353 return -EINVAL;
3354
3352 address = dev->adev->rmmio_remap.bus_addr;3355 address = dev->adev->rmmio_remap.bus_addr;
3353 3356
3354 vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |3357 vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |
drivers/gpu/drm/amd/amdkfd/kfd_topology.c+2−3
@@ -1997,9 +1997,8 @@ int kfd_topology_add_device(struct kfd_node *gpu) · 1996 unmodified lines
1997 HSA_CAP_ASIC_REVISION_MASK);1997 HSA_CAP_ASIC_REVISION_MASK);
1998 1998
1999 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev);1999 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev);
2000 /* On multi-partition nodes, node id = location_id[31:28] */2000 if (KFD_GC_VERSION(dev->gpu->kfd) == IP_VERSION(9, 4, 3))
2001 if (gpu->kfd->num_nodes > 1)2001 dev->node_props.location_id |= dev->gpu->node_id;
2002 dev->node_props.location_id |= (dev->gpu->node_id << 28);
2003 2002
2004 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus);2003 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus);
2005 dev->node_props.max_engine_clk_fcompute =2004 dev->node_props.max_engine_clk_fcompute =
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+13−3
@@ -1219,8 +1219,10 @@ static bool is_dsc_need_re_compute( · 1218 unmodified lines
1219 if (dc_link->type != dc_connection_mst_branch)1219 if (dc_link->type != dc_connection_mst_branch)
1220 return false;1220 return false;
1221 1221
1222 if (!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||1222 /* add a check for older MST DSC with no virtual DPCDs */
1223 dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT))1223 if (needs_dsc_aux_workaround(dc_link) &&
1224 (!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||
1225 dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT)))
1224 return false;1226 return false;
1225 1227
1226 for (i = 0; i < MAX_PIPES; i++)1228 for (i = 0; i < MAX_PIPES; i++)
@@ -1240,7 +1242,15 @@ static bool is_dsc_need_re_compute( · 13 unmodified lines
1240 continue;1242 continue;
1241 1243
1242 aconnector = (struct amdgpu_dm_connector *) stream->dm_stream_context;1244 aconnector = (struct amdgpu_dm_connector *) stream->dm_stream_context;
1243 if (!aconnector)1245 if (!aconnector || !aconnector->dsc_aux)
1246 continue;
1247
1248 /*
1249 * check if cached virtual MST DSC caps are available and DSC is supported
1250 * as per specifications in their Virtual DPCD registers.
1251 */
1252 if (!(aconnector->dc_sink->dsc_caps.dsc_dec_caps.is_dsc_supported ||
1253 aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT))
1244 continue;1254 continue;
1245 1255
1246 stream_on_link[new_stream_on_link_num] = aconnector;1256 stream_on_link[new_stream_on_link_num] = aconnector;
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c+2−2
@@ -195,9 +195,9 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = { · 194 unmodified lines
195 .dcn_downspread_percent = 0.5,195 .dcn_downspread_percent = 0.5,
196 .gpuvm_min_page_size_bytes = 4096,196 .gpuvm_min_page_size_bytes = 4096,
197 .hostvm_min_page_size_bytes = 4096,197 .hostvm_min_page_size_bytes = 4096,
198 .do_urgent_latency_adjustment = 0,198 .do_urgent_latency_adjustment = 1,
199 .urgent_latency_adjustment_fabric_clock_component_us = 0,199 .urgent_latency_adjustment_fabric_clock_component_us = 0,
200 .urgent_latency_adjustment_fabric_clock_reference_mhz = 0,200 .urgent_latency_adjustment_fabric_clock_reference_mhz = 3000,
201};201};
202 202
203void dcn35_build_wm_range_table_fpu(struct clk_mgr *clk_mgr)203void dcn35_build_wm_range_table_fpu(struct clk_mgr *clk_mgr)
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c+27−6
@@ -638,22 +638,43 @@ void dcn35_power_down_on_boot(struct dc *dc) · 637 unmodified lines
638 638
639bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable)639bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable)
640{640{
641 struct dc_link *edp_links[MAX_NUM_EDP];
642 int i, edp_num;
643 if (dc->debug.dmcub_emulation)641 if (dc->debug.dmcub_emulation)
644 return true;642 return true;
645 643
646 if (enable) {644 if (enable) {
647 dc_get_edp_links(dc, edp_links, &edp_num);645 uint32_t num_active_edp = 0;
648 if (edp_num == 0 || edp_num > 1)646 int i;
649 return false;
650 647
651 for (i = 0; i < dc->current_state->stream_count; ++i) {648 for (i = 0; i < dc->current_state->stream_count; ++i) {
652 struct dc_stream_state *stream = dc->current_state->streams[i];649 struct dc_stream_state *stream = dc->current_state->streams[i];
650 struct dc_link *link = stream->link;
651 bool is_psr = link && !link->panel_config.psr.disable_psr &&
652 (link->psr_settings.psr_version == DC_PSR_VERSION_1 ||
653 link->psr_settings.psr_version == DC_PSR_VERSION_SU_1);
654 bool is_replay = link && link->replay_settings.replay_feature_enabled;
655
656 /* Ignore streams that disabled. */
657 if (stream->dpms_off)
658 continue;
659
660 /* Active external displays block idle optimizations. */
661 if (!dc_is_embedded_signal(stream->signal))
662 return false;
663
664 /* If not PWRSEQ0 can't enter idle optimizations */
665 if (link && link->link_index != 0)
666 return false;
653 667
654 if (!stream->dpms_off && !dc_is_embedded_signal(stream->signal))668 /* Check for panel power features required for idle optimizations. */
669 if (!is_psr && !is_replay)
655 return false;670 return false;
671
672 num_active_edp += 1;
656 }673 }
674
675 /* If more than one active eDP then disallow. */
676 if (num_active_edp > 1)
677 return false;
657 }678 }
658 679
659 // TODO: review other cases when idle optimization is allowed680 // TODO: review other cases when idle optimization is allowed
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c+1−1
@@ -226,7 +226,7 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en) · 225 unmodified lines
226 struct amdgpu_device *adev = smu->adev;226 struct amdgpu_device *adev = smu->adev;
227 int ret = 0;227 int ret = 0;
228 228
229 if (!en && !adev->in_s0ix) {229 if (!en && adev->in_s4) {
230 /* Adds a GFX reset as workaround just before sending the230 /* Adds a GFX reset as workaround just before sending the
231 * MP1_UNLOAD message to prevent GC/RLC/PMFW from entering231 * MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
232 * an invalid state.232 * an invalid state.