Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (31 commits) ARM: OMAP: Fix export.h or module.h includes ARM: OMAP: omap_device: Include linux/export.h ARM: OMAP2: Fix H4 matrix keyboard warning ARM: OMAP1: Remove unused omap-alsa.h ARM: OMAP1: Fix warnings about enabling 32 KiHz timer ARM: OMAP2+: timer: Remove omap_device_pm_latency ARM: OMAP2+: clock data: Remove redundant timer clkdev ARM: OMAP: Devkit8000: Remove double omap_mux_init_gpio ARM: OMAP: usb: musb: OMAP: Delete unused function MAINTAINERS: Update linux-omap git repository ARM: OMAP: change get_context_loss_count ret value to int ARM: OMAP4: hsmmc: configure SDMMC1_DR0 properly ARM: OMAP4: hsmmc: Fix Pbias configuration on regulator OFF ARM: OMAP3: hwmod: fix variant registration and remove SmartReflex from common list ARM: OMAP: I2C: Fix omap_register_i2c_bus() return value on success ARM: OMAP: dmtimer: Include linux/module.h ARM: OMAP2+: l3-noc: Include linux/module.h ARM: OMAP2+: devices: Fixes for McPDM ARM: OMAP: Fix errors and warnings when building for one board ARM: OMAP3: PM: restrict erratum i443 handling to OMAP3430 only ...

Linus Torvalds committed 15 years ago

Commit 075cb102 parents a3fbbde d30cc1642 files · +345 −402Browse files

Unified · Split

42 files

MAINTAINERS +1 −1
arch/arm/mach-omap1/board-palmz71.c +0 −1
arch/arm/mach-omap1/pm.c +1 −1
arch/arm/mach-omap2/board-devkit8000.c +0 −1
arch/arm/mach-omap2/board-generic.c +8 −0
arch/arm/mach-omap2/board-h4.c +69 −53
arch/arm/mach-omap2/clkt_dpll.c +35 −16
arch/arm/mach-omap2/clock.h +2 −0
arch/arm/mach-omap2/clock2420_data.c +0 −12
arch/arm/mach-omap2/clock2430_data.c +0 −12
arch/arm/mach-omap2/clock3xxx_data.c +0 −12
arch/arm/mach-omap2/clock44xx.h +7 −0
arch/arm/mach-omap2/clock44xx_data.c +23 −20
arch/arm/mach-omap2/devices.c +3 −14
arch/arm/mach-omap2/dpll3xxx.c +6 −3
arch/arm/mach-omap2/dpll44xx.c +69 −0
arch/arm/mach-omap2/dsp.c +1 −0
arch/arm/mach-omap2/hsmmc.c +3 −13
arch/arm/mach-omap2/id.c +4 −1
arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h +4 −4
arch/arm/mach-omap2/io.c +6 −0
arch/arm/mach-omap2/mailbox.c +1 −0
arch/arm/mach-omap2/omap-iommu.c +1 −0
arch/arm/mach-omap2/omap_hwmod.c +1 −1
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +10 −7
arch/arm/mach-omap2/omap_l3_noc.c +1 −0
arch/arm/mach-omap2/pm34xx.c +37 −33
arch/arm/mach-omap2/powerdomain.c +10 −4
arch/arm/mach-omap2/powerdomain.h +1 −1
arch/arm/mach-omap2/smartreflex.c +1 −0
arch/arm/mach-omap2/timer.c +1 −11
arch/arm/mach-omap2/usb-musb.c +0 −38
arch/arm/plat-omap/dmtimer.c +1 −0
arch/arm/plat-omap/i2c.c +1 −1
arch/arm/plat-omap/include/plat/cpu.h +12 −5
arch/arm/plat-omap/include/plat/dmtimer.h +2 −2
arch/arm/plat-omap/include/plat/omap-alsa.h +0 −123
arch/arm/plat-omap/include/plat/omap-pm.h +2 −2
arch/arm/plat-omap/include/plat/omap_device.h +1 −1
arch/arm/plat-omap/include/plat/omap_hwmod.h +1 −1
arch/arm/plat-omap/omap-pm-noop.c +17 −7
arch/arm/plat-omap/omap_device.c +2 −1

MAINTAINERS+1−1

@@ -4673,7 +4673,7 @@ L: linux-omap@vger.kernel.org · 4672 unmodified lines
4673	4673	W: http://www.muru.com/linux/omap/
4674	4674	W: http://linux.omap.com/
4675	4675	Q: http://patchwork.kernel.org/project/linux-omap/list/
4676		−T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
	4676	+T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git
4677	4677	S: Maintained
4678	4678	F: arch/arm/omap/
4679	4679

arch/arm/mach-omap1/board-palmz71.c+0−1

@@ -42,7 +42,6 @@ · 41 unmodified lines
42	42	#include <plat/irda.h>
43	43	#include <plat/keypad.h>
44	44	#include <plat/common.h>
45		−#include <plat/omap-alsa.h>
46	45
47	46	#include <linux/spi/spi.h>
48	47	#include <linux/spi/ads7846.h>

arch/arm/mach-omap1/pm.c+1−1

@@ -116,7 +116,7 @@ void omap1_pm_idle(void) · 115 unmodified lines
116	116	return;
117	117	}
118	118
119		−#ifdef CONFIG_OMAP_MPU_TIMER
	119	+#if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER)
120	120	#warning Enable 32kHz OS timer in order to allow sleep states in idle
121	121	use_idlect1 = use_idlect1 & ~(1 << 9);
122	122	#else

arch/arm/mach-omap2/board-devkit8000.c+0−1

@@ -226,7 +226,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev, · 225 unmodified lines
226	226	{
227	227	int ret;
228	228
229		− omap_mux_init_gpio(29, OMAP_PIN_INPUT);
230	229	/* gpio + 0 is "mmc0_cd" (input/IRQ) */
231	230	mmc[0].gpio_cd = gpio + 0;
232	231	omap2_hsmmc_init(mmc);

arch/arm/mach-omap2/board-generic.c+8−0

@@ -28,6 +28,7 @@ · 27 unmodified lines
28	28	* XXX: Still needed to boot until the i2c & twl driver is adapted to
29	29	* device-tree
30	30	*/
	31	+#ifdef CONFIG_ARCH_OMAP4
31	32	static struct twl4030_platform_data sdp4430_twldata = {
32	33	.irq_base = TWL6030_IRQ_BASE,
33	34	.irq_end = TWL6030_IRQ_END,
@@ -37,7 +38,9 @@ static void __init omap4_i2c_init(void) · 3 unmodified lines
37	38	{
38	39	omap4_pmic_init("twl6030", &sdp4430_twldata);
39	40	}
	41	+#endif
40	42
	43	+#ifdef CONFIG_ARCH_OMAP3
41	44	static struct twl4030_platform_data beagle_twldata = {
42	45	.irq_base = TWL4030_IRQ_BASE,
43	46	.irq_end = TWL4030_IRQ_END,
@@ -47,6 +50,7 @@ static void __init omap3_i2c_init(void) · 3 unmodified lines
47	50	{
48	51	omap3_pmic_init("twl4030", &beagle_twldata);
49	52	}
	53	+#endif
50	54
51	55	static struct of_device_id omap_dt_match_table[] __initdata = {
52	56	{ .compatible = "simple-bus", },
@@ -72,17 +76,21 @@ static void __init omap_generic_init(void) · 19 unmodified lines
72	76	of_platform_populate(NULL, omap_dt_match_table, NULL, NULL);
73	77	}
74	78
	79	+#ifdef CONFIG_ARCH_OMAP4
75	80	static void __init omap4_init(void)
76	81	{
77	82	omap4_i2c_init();
78	83	omap_generic_init();
79	84	}
	85	+#endif
80	86
	87	+#ifdef CONFIG_ARCH_OMAP3
81	88	static void __init omap3_init(void)
82	89	{
83	90	omap3_i2c_init();
84	91	omap_generic_init();
85	92	}
	93	+#endif
86	94
87	95	#if defined(CONFIG_SOC_OMAP2420)
88	96	static const char *omap242x_boards_compat[] __initdata = {

arch/arm/mach-omap2/board-h4.c+69−53

@@ -25,6 +25,7 @@ · 24 unmodified lines
25	25	#include <linux/err.h>
26	26	#include <linux/clk.h>
27	27	#include <linux/io.h>
	28	+#include <linux/input/matrix_keypad.h>
28	29
29	30	#include <mach/hardware.h>
30	31	#include <asm/mach-types.h>
@@ -34,7 +35,6 @@ · 3 unmodified lines
34	35	#include <plat/usb.h>
35	36	#include <plat/board.h>
36	37	#include <plat/common.h>
37		−#include <plat/keypad.h>
38	38	#include <plat/menelaus.h>
39	39	#include <plat/dma.h>
40	40	#include <plat/gpmc.h>
@@ -50,10 +50,8 @@ · 9 unmodified lines
50	50
51	51	#define H4_ETHR_GPIO_IRQ 92
52	52
53		−static unsigned int row_gpios[6] = { 88, 89, 124, 11, 6, 96 };
54		−static unsigned int col_gpios[7] = { 90, 91, 100, 36, 12, 97, 98 };
55		−
56		−static const unsigned int h4_keymap[] = {
	53	+#if defined(CONFIG_KEYBOARD_MATRIX) \|\| defined(CONFIG_KEYBOARD_MATRIX_MODULE)
	54	+static const uint32_t board_matrix_keys[] = {
57	55	KEY(0, 0, KEY_LEFT),
58	56	KEY(1, 0, KEY_RIGHT),
59	57	KEY(2, 0, KEY_A),
@@ -86,6 +84,71 @@ static const unsigned int h4_keymap[] = { · 26 unmodified lines
86	84	KEY(4, 5, KEY_ENTER),
87	85	};
88	86
	87	+static const struct matrix_keymap_data board_keymap_data = {
	88	+ .keymap = board_matrix_keys,
	89	+ .keymap_size = ARRAY_SIZE(board_matrix_keys),
	90	+};
	91	+
	92	+static unsigned int board_keypad_row_gpios[] = {
	93	+ 88, 89, 124, 11, 6, 96
	94	+};
	95	+
	96	+static unsigned int board_keypad_col_gpios[] = {
	97	+ 90, 91, 100, 36, 12, 97, 98
	98	+};
	99	+
	100	+static struct matrix_keypad_platform_data board_keypad_platform_data = {
	101	+ .keymap_data = &board_keymap_data,
	102	+ .row_gpios = board_keypad_row_gpios,
	103	+ .num_row_gpios = ARRAY_SIZE(board_keypad_row_gpios),
	104	+ .col_gpios = board_keypad_col_gpios,
	105	+ .num_col_gpios = ARRAY_SIZE(board_keypad_col_gpios),
	106	+ .active_low = 1,
	107	+
	108	+ .debounce_ms = 20,
	109	+ .col_scan_delay_us = 5,
	110	+};
	111	+
	112	+static struct platform_device board_keyboard = {
	113	+ .name = "matrix-keypad",
	114	+ .id = -1,
	115	+ .dev = {
	116	+ .platform_data = &board_keypad_platform_data,
	117	+ },
	118	+};
	119	+static void __init board_mkp_init(void)
	120	+{
	121	+ omap_mux_init_gpio(88, OMAP_PULL_ENA \| OMAP_PULL_UP);
	122	+ omap_mux_init_gpio(89, OMAP_PULL_ENA \| OMAP_PULL_UP);
	123	+ omap_mux_init_gpio(124, OMAP_PULL_ENA \| OMAP_PULL_UP);
	124	+ omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA \| OMAP_PULL_UP);
	125	+ if (omap_has_menelaus()) {
	126	+ omap_mux_init_signal("sdrc_a14.gpio0",
	127	+ OMAP_PULL_ENA \| OMAP_PULL_UP);
	128	+ omap_mux_init_signal("vlynq_rx0.gpio_15", 0);
	129	+ omap_mux_init_signal("gpio_98", 0);
	130	+ board_keypad_row_gpios[5] = 0;
	131	+ board_keypad_col_gpios[2] = 15;
	132	+ board_keypad_col_gpios[6] = 18;
	133	+ } else {
	134	+ omap_mux_init_signal("gpio_96", OMAP_PULL_ENA \| OMAP_PULL_UP);
	135	+ omap_mux_init_signal("gpio_100", 0);
	136	+ omap_mux_init_signal("gpio_98", 0);
	137	+ }
	138	+ omap_mux_init_signal("gpio_90", 0);
	139	+ omap_mux_init_signal("gpio_91", 0);
	140	+ omap_mux_init_signal("gpio_36", 0);
	141	+ omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
	142	+ omap_mux_init_signal("gpio_97", 0);
	143	+
	144	+ platform_device_register(&board_keyboard);
	145	+}
	146	+#else
	147	+static inline void board_mkp_init(void)
	148	+{
	149	+}
	150	+#endif
	151	+
89	152	static struct mtd_partition h4_partitions[] = {
90	153	/* bootloader (U-Boot, etc) in first sector */
91	154	{
@@ -137,31 +200,8 @@ static struct platform_device h4_flash_device = { · 45 unmodified lines
137	200	.resource = &h4_flash_resource,
138	201	};
139	202
140		−static const struct matrix_keymap_data h4_keymap_data = {
141		− .keymap = h4_keymap,
142		− .keymap_size = ARRAY_SIZE(h4_keymap),
143		−};
144		−
145		−static struct omap_kp_platform_data h4_kp_data = {
146		− .rows = 6,
147		− .cols = 7,
148		− .keymap_data = &h4_keymap_data,
149		− .rep = true,
150		− .row_gpios = row_gpios,
151		− .col_gpios = col_gpios,
152		−};
153		−
154		−static struct platform_device h4_kp_device = {
155		− .name = "omap-keypad",
156		− .id = -1,
157		− .dev = {
158		− .platform_data = &h4_kp_data,
159		− },
160		−};
161		−
162	203	static struct platform_device *h4_devices[] __initdata = {
163	204	&h4_flash_device,
164		− &h4_kp_device,
165	205	};
166	206
167	207	static struct panel_generic_dpi_data h4_panel_data = {
@@ -336,31 +376,7 @@ static void __init omap_h4_init(void) · 168 unmodified lines
336	376	* if not needed.
337	377	*/
338	378
339		−#if defined(CONFIG_KEYBOARD_OMAP) \|\| defined(CONFIG_KEYBOARD_OMAP_MODULE)
340		− omap_mux_init_gpio(88, OMAP_PULL_ENA \| OMAP_PULL_UP);
341		− omap_mux_init_gpio(89, OMAP_PULL_ENA \| OMAP_PULL_UP);
342		− omap_mux_init_gpio(124, OMAP_PULL_ENA \| OMAP_PULL_UP);
343		− omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA \| OMAP_PULL_UP);
344		− if (omap_has_menelaus()) {
345		− omap_mux_init_signal("sdrc_a14.gpio0",
346		− OMAP_PULL_ENA \| OMAP_PULL_UP);
347		− omap_mux_init_signal("vlynq_rx0.gpio_15", 0);
348		− omap_mux_init_signal("gpio_98", 0);
349		− row_gpios[5] = 0;
350		− col_gpios[2] = 15;
351		− col_gpios[6] = 18;
352		− } else {
353		− omap_mux_init_signal("gpio_96", OMAP_PULL_ENA \| OMAP_PULL_UP);
354		− omap_mux_init_signal("gpio_100", 0);
355		− omap_mux_init_signal("gpio_98", 0);
356		− }
357		− omap_mux_init_signal("gpio_90", 0);
358		− omap_mux_init_signal("gpio_91", 0);
359		− omap_mux_init_signal("gpio_36", 0);
360		− omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
361		− omap_mux_init_signal("gpio_97", 0);
362		−#endif
363		−
	379	+ board_mkp_init();
364	380	i2c_register_board_info(1, h4_i2c_board_info,
365	381	ARRAY_SIZE(h4_i2c_board_info));
366	382

arch/arm/mach-omap2/clkt_dpll.c+35−16

@@ -46,10 +46,19 @@ · 45 unmodified lines
46	46	(DPLL_SCALE_FACTOR / DPLL_SCALE_BASE))
47	47
48	48	/* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */
49		−#define DPLL_FINT_BAND1_MIN 750000
50		−#define DPLL_FINT_BAND1_MAX 2100000
51		−#define DPLL_FINT_BAND2_MIN 7500000
52		−#define DPLL_FINT_BAND2_MAX 21000000
	49	+#define OMAP3430_DPLL_FINT_BAND1_MIN 750000
	50	+#define OMAP3430_DPLL_FINT_BAND1_MAX 2100000
	51	+#define OMAP3430_DPLL_FINT_BAND2_MIN 7500000
	52	+#define OMAP3430_DPLL_FINT_BAND2_MAX 21000000
	53	+
	54	+/*
	55	+ * DPLL valid Fint frequency range for OMAP36xx and OMAP4xxx.
	56	+ * From device data manual section 4.3 "DPLL and DLL Specifications".
	57	+ */
	58	+#define OMAP3PLUS_DPLL_FINT_JTYPE_MIN 500000
	59	+#define OMAP3PLUS_DPLL_FINT_JTYPE_MAX 2500000
	60	+#define OMAP3PLUS_DPLL_FINT_MIN 32000
	61	+#define OMAP3PLUS_DPLL_FINT_MAX 52000000
53	62
54	63	/* _dpll_test_fint() return codes */
55	64	#define DPLL_FINT_UNDERFLOW -1
@@ -71,33 +80,43 @@ · 15 unmodified lines
71	80	static int _dpll_test_fint(struct clk *clk, u8 n)
72	81	{
73	82	struct dpll_data *dd;
74		− long fint;
	83	+ long fint, fint_min, fint_max;
75	84	int ret = 0;
76	85
77	86	dd = clk->dpll_data;
78	87
79	88	/* DPLL divider must result in a valid jitter correction val */
80	89	fint = clk->parent->rate / n;
81		− if (fint < DPLL_FINT_BAND1_MIN) {
82	90
	91	+ if (cpu_is_omap24xx()) {
	92	+ /* Should not be called for OMAP2, so warn if it is called */
	93	+ WARN(1, "No fint limits available for OMAP2!\n");
	94	+ return DPLL_FINT_INVALID;
	95	+ } else if (cpu_is_omap3430()) {
	96	+ fint_min = OMAP3430_DPLL_FINT_BAND1_MIN;
	97	+ fint_max = OMAP3430_DPLL_FINT_BAND2_MAX;
	98	+ } else if (dd->flags & DPLL_J_TYPE) {
	99	+ fint_min = OMAP3PLUS_DPLL_FINT_JTYPE_MIN;
	100	+ fint_max = OMAP3PLUS_DPLL_FINT_JTYPE_MAX;
	101	+ } else {
	102	+ fint_min = OMAP3PLUS_DPLL_FINT_MIN;
	103	+ fint_max = OMAP3PLUS_DPLL_FINT_MAX;
	104	+ }
	105	+
	106	+ if (fint < fint_min) {
83	107	pr_debug("rejecting n=%d due to Fint failure, "
84	108	"lowering max_divider\n", n);
85	109	dd->max_divider = n;
86	110	ret = DPLL_FINT_UNDERFLOW;
87		−
88		− } else if (fint > DPLL_FINT_BAND1_MAX &&
89		− fint < DPLL_FINT_BAND2_MIN) {
90		−
91		− pr_debug("rejecting n=%d due to Fint failure\n", n);
92		− ret = DPLL_FINT_INVALID;
93		−
94		− } else if (fint > DPLL_FINT_BAND2_MAX) {
95		−
	111	+ } else if (fint > fint_max) {
96	112	pr_debug("rejecting n=%d due to Fint failure, "
97	113	"boosting min_divider\n", n);
98	114	dd->min_divider = n;
99	115	ret = DPLL_FINT_INVALID;
100		−
	116	+ } else if (cpu_is_omap3430() && fint > OMAP3430_DPLL_FINT_BAND1_MAX &&
	117	+ fint < OMAP3430_DPLL_FINT_BAND2_MIN) {
	118	+ pr_debug("rejecting n=%d due to Fint failure\n", n);
	119	+ ret = DPLL_FINT_INVALID;
101	120	}
102	121
103	122	return ret;

arch/arm/mach-omap2/clock.h+2−0

@@ -66,6 +66,8 @@ void omap3_noncore_dpll_disable(struct clk *clk); · 65 unmodified lines
66	66	int omap4_dpllmx_gatectrl_read(struct clk *clk);
67	67	void omap4_dpllmx_allow_gatectrl(struct clk *clk);
68	68	void omap4_dpllmx_deny_gatectrl(struct clk *clk);
	69	+long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate);
	70	+unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk);
69	71
70	72	#ifdef CONFIG_OMAP_RESET_CLOCKS
71	73	void omap2_clk_disable_unused(struct clk *clk);

arch/arm/mach-omap2/clock2420_data.c+0−12

@@ -1898,18 +1898,6 @@ static struct omap_clk omap2420_clks[] = { · 1897 unmodified lines
1898	1898	CLK(NULL, "pka_ick", &pka_ick, CK_242X),
1899	1899	CLK(NULL, "usb_fck", &usb_fck, CK_242X),
1900	1900	CLK("musb-hdrc", "fck", &osc_ck, CK_242X),
1901		− CLK("omap_timer.1", "fck", &gpt1_fck, CK_242X),
1902		− CLK("omap_timer.2", "fck", &gpt2_fck, CK_242X),
1903		− CLK("omap_timer.3", "fck", &gpt3_fck, CK_242X),
1904		− CLK("omap_timer.4", "fck", &gpt4_fck, CK_242X),
1905		− CLK("omap_timer.5", "fck", &gpt5_fck, CK_242X),
1906		− CLK("omap_timer.6", "fck", &gpt6_fck, CK_242X),
1907		− CLK("omap_timer.7", "fck", &gpt7_fck, CK_242X),
1908		− CLK("omap_timer.8", "fck", &gpt8_fck, CK_242X),
1909		− CLK("omap_timer.9", "fck", &gpt9_fck, CK_242X),
1910		− CLK("omap_timer.10", "fck", &gpt10_fck, CK_242X),
1911		− CLK("omap_timer.11", "fck", &gpt11_fck, CK_242X),
1912		− CLK("omap_timer.12", "fck", &gpt12_fck, CK_242X),
1913	1901	CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X),
1914	1902	CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X),
1915	1903	CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X),

arch/arm/mach-omap2/clock2430_data.c+0−12

@@ -1998,18 +1998,6 @@ static struct omap_clk omap2430_clks[] = { · 1997 unmodified lines
1998	1998	CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X),
1999	1999	CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X),
2000	2000	CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X),
2001		− CLK("omap_timer.1", "fck", &gpt1_fck, CK_243X),
2002		− CLK("omap_timer.2", "fck", &gpt2_fck, CK_243X),
2003		− CLK("omap_timer.3", "fck", &gpt3_fck, CK_243X),
2004		− CLK("omap_timer.4", "fck", &gpt4_fck, CK_243X),
2005		− CLK("omap_timer.5", "fck", &gpt5_fck, CK_243X),
2006		− CLK("omap_timer.6", "fck", &gpt6_fck, CK_243X),
2007		− CLK("omap_timer.7", "fck", &gpt7_fck, CK_243X),
2008		− CLK("omap_timer.8", "fck", &gpt8_fck, CK_243X),
2009		− CLK("omap_timer.9", "fck", &gpt9_fck, CK_243X),
2010		− CLK("omap_timer.10", "fck", &gpt10_fck, CK_243X),
2011		− CLK("omap_timer.11", "fck", &gpt11_fck, CK_243X),
2012		− CLK("omap_timer.12", "fck", &gpt12_fck, CK_243X),
2013	2001	CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X),
2014	2002	CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X),
2015	2003	CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X),

arch/arm/mach-omap2/clock3xxx_data.c+0−12

@@ -3464,18 +3464,6 @@ static struct omap_clk omap3xxx_clks[] = { · 3463 unmodified lines
3464	3464	CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX),
3465	3465	CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX),
3466	3466	CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX),
3467		− CLK("omap_timer.1", "fck", &gpt1_fck, CK_3XXX),
3468		− CLK("omap_timer.2", "fck", &gpt2_fck, CK_3XXX),
3469		− CLK("omap_timer.3", "fck", &gpt3_fck, CK_3XXX),
3470		− CLK("omap_timer.4", "fck", &gpt4_fck, CK_3XXX),
3471		− CLK("omap_timer.5", "fck", &gpt5_fck, CK_3XXX),
3472		− CLK("omap_timer.6", "fck", &gpt6_fck, CK_3XXX),
3473		− CLK("omap_timer.7", "fck", &gpt7_fck, CK_3XXX),
3474		− CLK("omap_timer.8", "fck", &gpt8_fck, CK_3XXX),
3475		− CLK("omap_timer.9", "fck", &gpt9_fck, CK_3XXX),
3476		− CLK("omap_timer.10", "fck", &gpt10_fck, CK_3XXX),
3477		− CLK("omap_timer.11", "fck", &gpt11_fck, CK_3XXX),
3478		− CLK("omap_timer.12", "fck", &gpt12_fck, CK_3XXX),
3479	3467	CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX),
3480	3468	CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX),
3481	3469	CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX),

arch/arm/mach-omap2/clock44xx.h+7−0

@@ -8,6 +8,13 @@ · 7 unmodified lines
8	8	#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
9	9	#define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
10	10
	11	+/*
	12	+ * OMAP4430_REGM4XEN_MULT: If the CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN bit is
	13	+ * set, then the DPLL's lock frequency is multiplied by 4 (OMAP4430 TRM
	14	+ * vV Section 3.6.3.3.1 "DPLLs Output Clocks Parameters")
	15	+ */
	16	+#define OMAP4430_REGM4XEN_MULT 4
	17	+
11	18	int omap4xxx_clk_init(void);
12	19
13	20	#endif

arch/arm/mach-omap2/clock44xx_data.c+23−20

@@ -270,8 +270,8 @@ static struct clk dpll_abe_ck = { · 269 unmodified lines
270	270	.dpll_data = &dpll_abe_dd,
271	271	.init = &omap2_init_dpll_parent,
272	272	.ops = &clkops_omap3_noncore_dpll_ops,
273		− .recalc = &omap3_dpll_recalc,
274		− .round_rate = &omap2_dpll_round_rate,
	273	+ .recalc = &omap4_dpll_regm4xen_recalc,
	274	+ .round_rate = &omap4_dpll_regm4xen_round_rate,
275	275	.set_rate = &omap3_noncore_dpll_set_rate,
276	276	};
277	277
@@ -1195,11 +1195,25 @@ static struct clk l4_wkup_clk_mux_ck = { · 917 unmodified lines
1195	1195	.recalc = &omap2_clksel_recalc,
1196	1196	};
1197	1197
	1198	+static const struct clksel_rate div2_2to1_rates[] = {
	1199	+ { .div = 1, .val = 1, .flags = RATE_IN_4430 },
	1200	+ { .div = 2, .val = 0, .flags = RATE_IN_4430 },
	1201	+ { .div = 0 },
	1202	+};
	1203	+
	1204	+static const struct clksel ocp_abe_iclk_div[] = {
	1205	+ { .parent = &aess_fclk, .rates = div2_2to1_rates },
	1206	+ { .parent = NULL },
	1207	+};
	1208	+
1198	1209	static struct clk ocp_abe_iclk = {
1199	1210	.name = "ocp_abe_iclk",
1200	1211	.parent = &aess_fclk,
	1212	+ .clksel = ocp_abe_iclk_div,
	1213	+ .clksel_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL,
	1214	+ .clksel_mask = OMAP4430_CLKSEL_AESS_FCLK_MASK,
1201	1215	.ops = &clkops_null,
1202		− .recalc = &followparent_recalc,
	1216	+ .recalc = &omap2_clksel_recalc,
1203	1217	};
1204	1218
1205	1219	static struct clk per_abe_24m_fclk = {
@@ -1398,9 +1412,9 @@ static struct clk dss_dss_clk = { · 192 unmodified lines
1398	1412	};
1399	1413
1400	1414	static const struct clksel_rate div3_8to32_rates[] = {
1401		− { .div = 8, .val = 0, .flags = RATE_IN_44XX },
1402		− { .div = 16, .val = 1, .flags = RATE_IN_44XX },
1403		− { .div = 32, .val = 2, .flags = RATE_IN_44XX },
	1415	+ { .div = 8, .val = 0, .flags = RATE_IN_4460 },
	1416	+ { .div = 16, .val = 1, .flags = RATE_IN_4460 },
	1417	+ { .div = 32, .val = 2, .flags = RATE_IN_4460 },
1404	1418	{ .div = 0 },
1405	1419	};
1406	1420
@@ -3363,17 +3377,6 @@ static struct omap_clk omap44xx_clks[] = { · 1956 unmodified lines
3363	3377	CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
3364	3378	CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
3365	3379	CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
3366		− CLK("omap_timer.1", "fck", &timer1_fck, CK_443X),
3367		− CLK("omap_timer.2", "fck", &timer2_fck, CK_443X),
3368		− CLK("omap_timer.3", "fck", &timer3_fck, CK_443X),
3369		− CLK("omap_timer.4", "fck", &timer4_fck, CK_443X),
3370		− CLK("omap_timer.5", "fck", &timer5_fck, CK_443X),
3371		− CLK("omap_timer.6", "fck", &timer6_fck, CK_443X),
3372		− CLK("omap_timer.7", "fck", &timer7_fck, CK_443X),
3373		− CLK("omap_timer.8", "fck", &timer8_fck, CK_443X),
3374		− CLK("omap_timer.9", "fck", &timer9_fck, CK_443X),
3375		− CLK("omap_timer.10", "fck", &timer10_fck, CK_443X),
3376		− CLK("omap_timer.11", "fck", &timer11_fck, CK_443X),
3377	3380	CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X),
3378	3381	CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X),
3379	3382	CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X),
@@ -3403,12 +3406,12 @@ int __init omap4xxx_clk_init(void) · 23 unmodified lines
3403	3406	struct omap_clk *c;
3404	3407	u32 cpu_clkflg;
3405	3408
3406		− if (cpu_is_omap44xx()) {
	3409	+ if (cpu_is_omap443x()) {
3407	3410	cpu_mask = RATE_IN_4430;
3408	3411	cpu_clkflg = CK_443X;
3409	3412	} else if (cpu_is_omap446x()) {
3410		− cpu_mask = RATE_IN_4460;
3411		− cpu_clkflg = CK_446X;
	3413	+ cpu_mask = RATE_IN_4460 \| RATE_IN_4430;
	3414	+ cpu_clkflg = CK_446X \| CK_443X;
3412	3415	} else {
3413	3416	return 0;
3414	3417	}

arch/arm/mach-omap2/devices.c+3−14

@@ -318,18 +318,10 @@ static inline void omap_init_audio(void) {} · 317 unmodified lines
318	318	#if defined(CONFIG_SND_OMAP_SOC_MCPDM) \|\| \
319	319	defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
320	320
321		−static struct omap_device_pm_latency omap_mcpdm_latency[] = {
322		− {
323		− .deactivate_func = omap_device_idle_hwmods,
324		− .activate_func = omap_device_enable_hwmods,
325		− .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
326		− },
327		−};
328		−
329	321	static void omap_init_mcpdm(void)
330	322	{
331	323	struct omap_hwmod *oh;
332		− struct omap_device *od;
	324	+ struct platform_device *pdev;
333	325
334	326	oh = omap_hwmod_lookup("mcpdm");
335	327	if (!oh) {
@@ -337,11 +329,8 @@ static void omap_init_mcpdm(void) · 1 unmodified line
337	329	return;
338	330	}
339	331
340		− od = omap_device_build("omap-mcpdm", -1, oh, NULL, 0,
341		− omap_mcpdm_latency,
342		− ARRAY_SIZE(omap_mcpdm_latency), 0);
343		− if (IS_ERR(od))
344		− printk(KERN_ERR "Could not build omap_device for omap-mcpdm-dai\n");
	332	+ pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0);
	333	+ WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n");
345	334	}
346	335	#else
347	336	static inline void omap_init_mcpdm(void) {}

arch/arm/mach-omap2/dpll3xxx.c+6−3

@@ -390,7 +390,8 @@ int omap3_noncore_dpll_enable(struct clk *clk) · 389 unmodified lines
390	390	* propagating?
391	391	*/
392	392	if (!r)
393		− clk->rate = omap2_get_dpll_rate(clk);
	393	+ clk->rate = (clk->recalc) ? clk->recalc(clk) :
	394	+ omap2_get_dpll_rate(clk);
394	395
395	396	return r;
396	397	}
@@ -424,6 +425,7 @@ void omap3_noncore_dpll_disable(struct clk *clk) · 27 unmodified lines
424	425	int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
425	426	{
426	427	struct clk *new_parent = NULL;
	428	+ unsigned long hw_rate;
427	429	u16 freqsel = 0;
428	430	struct dpll_data *dd;
429	431	int ret;
@@ -435,7 +437,8 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) · 5 unmodified lines
435	437	if (!dd)
436	438	return -EINVAL;
437	439
438		− if (rate == omap2_get_dpll_rate(clk))
	440	+ hw_rate = (clk->recalc) ? clk->recalc(clk) : omap2_get_dpll_rate(clk);
	441	+ if (rate == hw_rate)
439	442	return 0;
440	443
441	444	/*
@@ -455,7 +458,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) · 13 unmodified lines
455	458	new_parent = dd->clk_bypass;
456	459	} else {
457	460	if (dd->last_rounded_rate != rate)
458		− omap2_dpll_round_rate(clk, rate);
	461	+ rate = clk->round_rate(clk, rate);
459	462
460	463	if (dd->last_rounded_rate == 0)
461	464	return -EINVAL;

arch/arm/mach-omap2/dpll44xx.c+69−0

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	19	#include <plat/clock.h>
20	20
21	21	#include "clock.h"
	22	+#include "clock44xx.h"
22	23	#include "cm-regbits-44xx.h"
23	24
24	25	/* Supported only on OMAP4 */
@@ -82,3 +83,71 @@ const struct clkops clkops_omap4_dpllmx_ops = { · 57 unmodified lines
82	83	.deny_idle = omap4_dpllmx_deny_gatectrl,
83	84	};
84	85
	86	+/**
	87	+ * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit
	88	+ * @clk: struct clk * of the DPLL to compute the rate for
	89	+ *
	90	+ * Compute the output rate for the OMAP4 DPLL represented by @clk.
	91	+ * Takes the REGM4XEN bit into consideration, which is needed for the
	92	+ * OMAP4 ABE DPLL. Returns the DPLL's output rate (before M-dividers)
	93	+ * upon success, or 0 upon error.
	94	+ */
	95	+unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk)
	96	+{
	97	+ u32 v;
	98	+ unsigned long rate;
	99	+ struct dpll_data *dd;
	100	+
	101	+ if (!clk \|\| !clk->dpll_data)
	102	+ return 0;
	103	+
	104	+ dd = clk->dpll_data;
	105	+
	106	+ rate = omap2_get_dpll_rate(clk);
	107	+
	108	+ /* regm4xen adds a multiplier of 4 to DPLL calculations */
	109	+ v = __raw_readl(dd->control_reg);
	110	+ if (v & OMAP4430_DPLL_REGM4XEN_MASK)
	111	+ rate *= OMAP4430_REGM4XEN_MULT;
	112	+
	113	+ return rate;
	114	+}
	115	+
	116	+/**
	117	+ * omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit
	118	+ * @clk: struct clk * of the DPLL to round a rate for
	119	+ * @target_rate: the desired rate of the DPLL
	120	+ *
	121	+ * Compute the rate that would be programmed into the DPLL hardware
	122	+ * for @clk if set_rate() were to be provided with the rate
	123	+ * @target_rate. Takes the REGM4XEN bit into consideration, which is
	124	+ * needed for the OMAP4 ABE DPLL. Returns the rounded rate (before
	125	+ * M-dividers) upon success, -EINVAL if @clk is null or not a DPLL, or
	126	+ * ~0 if an error occurred in omap2_dpll_round_rate().
	127	+ */
	128	+long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate)
	129	+{
	130	+ u32 v;
	131	+ struct dpll_data *dd;
	132	+ long r;
	133	+
	134	+ if (!clk \|\| !clk->dpll_data)
	135	+ return -EINVAL;
	136	+
	137	+ dd = clk->dpll_data;
	138	+
	139	+ /* regm4xen adds a multiplier of 4 to DPLL calculations */
	140	+ v = __raw_readl(dd->control_reg) & OMAP4430_DPLL_REGM4XEN_MASK;
	141	+
	142	+ if (v)
	143	+ target_rate = target_rate / OMAP4430_REGM4XEN_MULT;
	144	+
	145	+ r = omap2_dpll_round_rate(clk, target_rate);
	146	+ if (r == ~0)
	147	+ return r;
	148	+
	149	+ if (v)
	150	+ clk->dpll_data->last_rounded_rate *= OMAP4430_REGM4XEN_MULT;
	151	+
	152	+ return clk->dpll_data->last_rounded_rate;
	153	+}

arch/arm/mach-omap2/dsp.c+1−0

@@ -18,6 +18,7 @@ · 17 unmodified lines
18	18	* of the OMAP PM core code.
19	19	*/
20	20
	21	+#include <linux/module.h>
21	22	#include <linux/platform_device.h>
22	23	#include "cm2xxx_3xxx.h"
23	24	#include "prm2xxx_3xxx.h"

arch/arm/mach-omap2/hsmmc.c+3−13

@@ -129,15 +129,11 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot, · 128 unmodified lines
129	129	* Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
130	130	* card with Vcc regulator (from twl4030 or whatever). OMAP has both
131	131	* 1.8V and 3.0V modes, controlled by the PBIAS register.
132		− *
133		− * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
134		− * is most naturally TWL VSIM; those pins also use PBIAS.
135		− *
136		− * FIXME handle VMMC1A as needed ...
137	132	*/
138	133	reg = omap4_ctrl_pad_readl(control_pbias_offset);
139	134	reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK \|
140		− OMAP4_MMC1_PWRDNZ_MASK);
	135	+ OMAP4_MMC1_PWRDNZ_MASK \|
	136	+ OMAP4_MMC1_PBIASLITE_VMODE_MASK);
141	137	omap4_ctrl_pad_writel(reg, control_pbias_offset);
142	138	}
143	139
@@ -172,12 +168,6 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, · 28 unmodified lines
172	168	reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
173	169	omap4_ctrl_pad_writel(reg, control_pbias_offset);
174	170	}
175		− } else {
176		− reg = omap4_ctrl_pad_readl(control_pbias_offset);
177		− reg \|= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK \|
178		− OMAP4_MMC1_PWRDNZ_MASK \|
179		− OMAP4_MMC1_PBIASLITE_VMODE_MASK);
180		− omap4_ctrl_pad_writel(reg, control_pbias_offset);
181	171	}
182	172	}
183	173
@@ -489,7 +479,7 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) · 305 unmodified lines
489	479	OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK);
490	480	reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK \|
491	481	OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK);
492		− reg \|= (OMAP4_USBC1_DR0_SPEEDCTRL_MASK\|
	482	+ reg \|= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK \|
493	483	OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK \|
494	484	OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK);
495	485	omap4_ctrl_pad_writel(reg, control_mmc1);

arch/arm/mach-omap2/id.c+4−1

@@ -187,8 +187,11 @@ static void __init omap3_check_features(void) · 186 unmodified lines
187	187	OMAP3_CHECK_FEATURE(status, ISP);
188	188	if (cpu_is_omap3630())
189	189	omap_features \|= OMAP3_HAS_192MHZ_CLK;
190		− if (!cpu_is_omap3505() && !cpu_is_omap3517())
	190	+ if (cpu_is_omap3430() \|\| cpu_is_omap3630())
191	191	omap_features \|= OMAP3_HAS_IO_WAKEUP;
	192	+ if (cpu_is_omap3630() \|\| omap_rev() == OMAP3430_REV_ES3_1 \|\|
	193	+ omap_rev() == OMAP3430_REV_ES3_1_2)
	194	+ omap_features \|= OMAP3_HAS_IO_CHAIN_CTRL;
192	195
193	196	omap_features \|= OMAP3_HAS_SDRC;
194	197

arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h+4−4

@@ -941,10 +941,10 @@ · 940 unmodified lines
941	941	#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
942	942	#define OMAP4_DSI1_LANEENABLE_SHIFT 24
943	943	#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
944		−#define OMAP4_DSI1_PIPD_SHIFT 19
945		−#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
946		−#define OMAP4_DSI2_PIPD_SHIFT 14
947		−#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
	944	+#define OMAP4_DSI2_PIPD_SHIFT 19
	945	+#define OMAP4_DSI2_PIPD_MASK (0x1f << 19)
	946	+#define OMAP4_DSI1_PIPD_SHIFT 14
	947	+#define OMAP4_DSI1_PIPD_MASK (0x1f << 14)
948	948
949	949	/* CONTROL_MCBSPLP */
950	950	#define OMAP4_ALBCTRLRX_FSX_SHIFT 31

arch/arm/mach-omap2/io.c+6−0

@@ -359,6 +359,7 @@ static void __init omap_hwmod_init_postsetup(void) · 358 unmodified lines
359	359	omap_pm_if_early_init();
360	360	}
361	361
	362	+#ifdef CONFIG_ARCH_OMAP2
362	363	void __init omap2420_init_early(void)
363	364	{
364	365	omap2_set_globals_242x();
@@ -382,11 +383,13 @@ void __init omap2430_init_early(void) · 17 unmodified lines
382	383	omap_hwmod_init_postsetup();
383	384	omap2430_clk_init();
384	385	}
	386	+#endif
385	387
386	388	/*
387	389	* Currently only board-omap3beagle.c should call this because of the
388	390	* same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
389	391	*/
	392	+#ifdef CONFIG_ARCH_OMAP3
390	393	void __init omap3_init_early(void)
391	394	{
392	395	omap2_set_globals_3xxx();
@@ -430,7 +433,9 @@ void __init ti816x_init_early(void) · 37 unmodified lines
430	433	omap_hwmod_init_postsetup();
431	434	omap3xxx_clk_init();
432	435	}
	436	+#endif
433	437
	438	+#ifdef CONFIG_ARCH_OMAP4
434	439	void __init omap4430_init_early(void)
435	440	{
436	441	omap2_set_globals_443x();
@@ -442,6 +447,7 @@ void __init omap4430_init_early(void) · 5 unmodified lines
442	447	omap_hwmod_init_postsetup();
443	448	omap4xxx_clk_init();
444	449	}
	450	+#endif
445	451
446	452	void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
447	453	struct omap_sdrc_params *sdrc_cs1)

arch/arm/mach-omap2/mailbox.c+1−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	10	* for more details.
11	11	*/
12	12
	13	+#include <linux/module.h>
13	14	#include <linux/clk.h>
14	15	#include <linux/err.h>
15	16	#include <linux/platform_device.h>

arch/arm/mach-omap2/omap-iommu.c+1−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	10	* published by the Free Software Foundation.
11	11	*/
12	12
	13	+#include <linux/module.h>
13	14	#include <linux/platform_device.h>
14	15
15	16	#include <plat/iommu.h>

arch/arm/mach-omap2/omap_hwmod.c+1−1

@@ -2625,7 +2625,7 @@ ohsps_unlock: · 2624 unmodified lines
2625	2625	* Returns the context loss count of the powerdomain assocated with @oh
2626	2626	* upon success, or zero if no powerdomain exists for @oh.
2627	2627	*/
2628		−u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
	2628	+int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2629	2629	{
2630	2630	struct powerdomain *pwrdm;
2631	2631	int ret = 0;

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c+10−7

@@ -3159,7 +3159,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { · 3158 unmodified lines
3159	3159	&omap3xxx_mmc2_hwmod,
3160	3160	&omap3xxx_mmc3_hwmod,
3161	3161	&omap3xxx_mpu_hwmod,
3162		− &omap3xxx_iva_hwmod,
3163	3162
3164	3163	&omap3xxx_timer1_hwmod,
3165	3164	&omap3xxx_timer2_hwmod,
@@ -3188,8 +3187,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { · 22 unmodified lines
3188	3187	&omap3xxx_i2c1_hwmod,
3189	3188	&omap3xxx_i2c2_hwmod,
3190	3189	&omap3xxx_i2c3_hwmod,
3191		− &omap34xx_sr1_hwmod,
3192		− &omap34xx_sr2_hwmod,
3193	3190
3194	3191	/* gpio class */
3195	3192	&omap3xxx_gpio1_hwmod,
@@ -3211,8 +3208,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { · 15 unmodified lines
3211	3208	&omap3xxx_mcbsp2_sidetone_hwmod,
3212	3209	&omap3xxx_mcbsp3_sidetone_hwmod,
3213	3210
3214		− /* mailbox class */
3215		− &omap3xxx_mailbox_hwmod,
3216	3211
3217	3212	/* mcspi class */
3218	3213	&omap34xx_mcspi1,
@@ -3225,31 +3220,39 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { · 6 unmodified lines
3225	3220
3226	3221	/* 3430ES1-only hwmods */
3227	3222	static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
	3223	+ &omap3xxx_iva_hwmod,
3228	3224	&omap3430es1_dss_core_hwmod,
	3225	+ &omap3xxx_mailbox_hwmod,
3229	3226	NULL
3230	3227	};
3231	3228
3232	3229	/* 3430ES2+-only hwmods */
3233	3230	static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
	3231	+ &omap3xxx_iva_hwmod,
3234	3232	&omap3xxx_dss_core_hwmod,
3235	3233	&omap3xxx_usbhsotg_hwmod,
	3234	+ &omap3xxx_mailbox_hwmod,
3236	3235	NULL
3237	3236	};
3238	3237
3239	3238	/* 34xx-only hwmods (all ES revisions) */
3240	3239	static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
	3240	+ &omap3xxx_iva_hwmod,
3241	3241	&omap34xx_sr1_hwmod,
3242	3242	&omap34xx_sr2_hwmod,
	3243	+ &omap3xxx_mailbox_hwmod,
3243	3244	NULL
3244	3245	};
3245	3246
3246	3247	/* 36xx-only hwmods (all ES revisions) */
3247	3248	static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
	3249	+ &omap3xxx_iva_hwmod,
3248	3250	&omap3xxx_uart4_hwmod,
3249	3251	&omap3xxx_dss_core_hwmod,
3250	3252	&omap36xx_sr1_hwmod,
3251	3253	&omap36xx_sr2_hwmod,
3252	3254	&omap3xxx_usbhsotg_hwmod,
	3255	+ &omap3xxx_mailbox_hwmod,
3253	3256	NULL
3254	3257	};
3255	3258
@@ -3267,7 +3270,7 @@ int __init omap3xxx_hwmod_init(void) · 11 unmodified lines
3267	3270
3268	3271	/* Register hwmods common to all OMAP3 */
3269	3272	r = omap_hwmod_register(omap3xxx_hwmods);
3270		− if (!r)
	3273	+ if (r < 0)
3271	3274	return r;
3272	3275
3273	3276	rev = omap_rev();
@@ -3292,7 +3295,7 @@ int __init omap3xxx_hwmod_init(void) · 18 unmodified lines
3292	3295	};
3293	3296
3294	3297	r = omap_hwmod_register(h);
3295		− if (!r)
	3298	+ if (r < 0)
3296	3299	return r;
3297	3300
3298	3301	/*

arch/arm/mach-omap2/omap_l3_noc.c+1−0

@@ -20,6 +20,7 @@ · 19 unmodified lines
20	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
21	21	* USA
22	22	*/
	23	+#include <linux/module.h>
23	24	#include <linux/init.h>
24	25	#include <linux/io.h>
25	26	#include <linux/platform_device.h>

arch/arm/mach-omap2/pm34xx.c+37−33

@@ -99,31 +99,27 @@ static void omap3_enable_io_chain(void) · 98 unmodified lines
99	99	{
100	100	int timeout = 0;
101	101
102		− if (omap_rev() >= OMAP3430_REV_ES3_1) {
103		− omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
104		− PM_WKEN);
105		− /* Do a readback to assure write has been done */
106		− omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
107		−
108		− while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) &
109		− OMAP3430_ST_IO_CHAIN_MASK)) {
110		− timeout++;
111		− if (timeout > 1000) {
112		− printk(KERN_ERR "Wake up daisy chain "
113		− "activation failed.\n");
114		− return;
115		− }
116		− omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
117		− WKUP_MOD, PM_WKEN);
	102	+ omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
	103	+ PM_WKEN);
	104	+ /* Do a readback to assure write has been done */
	105	+ omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
	106	+
	107	+ while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) &
	108	+ OMAP3430_ST_IO_CHAIN_MASK)) {
	109	+ timeout++;
	110	+ if (timeout > 1000) {
	111	+ pr_err("Wake up daisy chain activation failed.\n");
	112	+ return;
118	113	}
	114	+ omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK,
	115	+ WKUP_MOD, PM_WKEN);
119	116	}
120	117	}
121	118
122	119	static void omap3_disable_io_chain(void)
123	120	{
124		− if (omap_rev() >= OMAP3430_REV_ES3_1)
125		− omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
126		− PM_WKEN);
	121	+ omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
	122	+ PM_WKEN);
127	123	}
128	124
129	125	static void omap3_core_save_context(void)
@@ -363,7 +359,6 @@ void omap_sram_idle(void) · 233 unmodified lines
363	359	printk(KERN_ERR "Invalid mpu state in sram_idle\n");
364	360	return;
365	361	}
366		− pwrdm_pre_transition();
367	362
368	363	/* NEON control */
369	364	if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
@@ -376,7 +371,8 @@ void omap_sram_idle(void) · 6 unmodified lines
376	371	(per_next_state < PWRDM_POWER_ON \|\|
377	372	core_next_state < PWRDM_POWER_ON)) {
378	373	omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
379		− omap3_enable_io_chain();
	374	+ if (omap3_has_io_chain_ctrl())
	375	+ omap3_enable_io_chain();
380	376	}
381	377
382	378	/* Block console output in case it is on one of the OMAP UARTs */
@@ -386,6 +382,8 @@ void omap_sram_idle(void) · 3 unmodified lines
386	382	if (!console_trylock())
387	383	goto console_still_active;
388	384
	385	+ pwrdm_pre_transition();
	386	+
389	387	/* PER */
390	388	if (per_next_state < PWRDM_POWER_ON) {
391	389	per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
@@ -409,13 +407,14 @@ void omap_sram_idle(void) · 17 unmodified lines
409	407	omap3_intc_prepare_idle();
410	408
411	409	/*
412		− * On EMU/HS devices ROM code restores a SRDC value
413		− * from scratchpad which has automatic self refresh on timeout
414		− * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
415		− * Hence store/restore the SDRC_POWER register here.
416		− */
417		− if (omap_rev() >= OMAP3430_REV_ES3_0 &&
418		− omap_type() != OMAP2_DEVICE_TYPE_GP &&
	410	+ * On EMU/HS devices ROM code restores a SRDC value
	411	+ * from scratchpad which has automatic self refresh on timeout
	412	+ * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
	413	+ * Hence store/restore the SDRC_POWER register here.
	414	+ */
	415	+ if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
	416	+ (omap_type() == OMAP2_DEVICE_TYPE_EMU \|\|
	417	+ omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
419	418	core_next_state == PWRDM_POWER_OFF)
420	419	sdrc_pwr = sdrc_read_reg(SDRC_POWER);
421	420
@@ -432,8 +431,9 @@ void omap_sram_idle(void) · 10 unmodified lines
432	431	omap34xx_do_sram_idle(save_state);
433	432
434	433	/* Restore normal SDRC POWER settings */
435		− if (omap_rev() >= OMAP3430_REV_ES3_0 &&
436		− omap_type() != OMAP2_DEVICE_TYPE_GP &&
	434	+ if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
	435	+ (omap_type() == OMAP2_DEVICE_TYPE_EMU \|\|
	436	+ omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
437	437	core_next_state == PWRDM_POWER_OFF)
438	438	sdrc_write_reg(sdrc_pwr, SDRC_POWER);
439	439
@@ -455,6 +455,8 @@ void omap_sram_idle(void) · 15 unmodified lines
455	455	}
456	456	omap3_intc_resume_idle();
457	457
	458	+ pwrdm_post_transition();
	459	+
458	460	/* PER */
459	461	if (per_next_state < PWRDM_POWER_ON) {
460	462	per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
@@ -475,11 +477,10 @@ console_still_active: · 14 unmodified lines
475	477	core_next_state < PWRDM_POWER_ON)) {
476	478	omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
477	479	PM_WKEN);
478		− omap3_disable_io_chain();
	480	+ if (omap3_has_io_chain_ctrl())
	481	+ omap3_disable_io_chain();
479	482	}
480	483
481		− pwrdm_post_transition();
482		−
483	484	clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
484	485	}
485	486
@@ -870,6 +871,9 @@ static int __init omap3_pm_init(void) · 384 unmodified lines
870	871	if (!cpu_is_omap34xx())
871	872	return -ENODEV;
872	873
	874	+ if (!omap3_has_io_chain_ctrl())
	875	+ pr_warning("PM: no software I/O chain control; some wakeups may be lost\n");
	876	+
873	877	pm_errata_configure();
874	878
875	879	/* XXX prcm_setup_regs needs to be before enabling hw

arch/arm/mach-omap2/powerdomain.c+10−4

@@ -1002,16 +1002,16 @@ int pwrdm_post_transition(void) · 1001 unmodified lines
1002	1002	* @pwrdm: struct powerdomain * to wait for
1003	1003	*
1004	1004	* Context loss count is the sum of powerdomain off-mode counter, the
1005		− * logic off counter and the per-bank memory off counter. Returns 0
	1005	+ * logic off counter and the per-bank memory off counter. Returns negative
1006	1006	* (and WARNs) upon error, otherwise, returns the context loss count.
1007	1007	*/
1008		−u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm)
	1008	+int pwrdm_get_context_loss_count(struct powerdomain *pwrdm)
1009	1009	{
1010	1010	int i, count;
1011	1011
1012	1012	if (!pwrdm) {
1013	1013	WARN(1, "powerdomain: %s: pwrdm is null\n", __func__);
1014		− return 0;
	1014	+ return -ENODEV;
1015	1015	}
1016	1016
1017	1017	count = pwrdm->state_counter[PWRDM_POWER_OFF];
@@ -1020,7 +1020,13 @@ u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm) · 2 unmodified lines
1020	1020	for (i = 0; i < pwrdm->banks; i++)
1021	1021	count += pwrdm->ret_mem_off_counter[i];
1022	1022
1023		− pr_debug("powerdomain: %s: context loss count = %u\n",
	1023	+ /*
	1024	+ * Context loss count has to be a non-negative value. Clear the sign
	1025	+ * bit to get a value range from 0 to INT_MAX.
	1026	+ */
	1027	+ count &= INT_MAX;
	1028	+
	1029	+ pr_debug("powerdomain: %s: context loss count = %d\n",
1024	1030	pwrdm->name, count);
1025	1031
1026	1032	return count;

arch/arm/mach-omap2/powerdomain.h+1−1

@@ -217,7 +217,7 @@ int pwrdm_clkdm_state_switch(struct clockdomain *clkdm); · 216 unmodified lines
217	217	int pwrdm_pre_transition(void);
218	218	int pwrdm_post_transition(void);
219	219	int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
220		−u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
	220	+int pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
221	221	bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
222	222
223	223	extern void omap242x_powerdomains_init(void);

arch/arm/mach-omap2/smartreflex.c+1−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	17	* published by the Free Software Foundation.
18	18	*/
19	19
	20	+#include <linux/module.h>
20	21	#include <linux/interrupt.h>
21	22	#include <linux/clk.h>
22	23	#include <linux/io.h>

arch/arm/mach-omap2/timer.c+1−11

@@ -408,14 +408,6 @@ static int omap2_dm_timer_set_src(struct platform_device *pdev, int source) · 407 unmodified lines
408	408	return ret;
409	409	}
410	410
411		−struct omap_device_pm_latency omap2_dmtimer_latency[] = {
412		− {
413		− .deactivate_func = omap_device_idle_hwmods,
414		− .activate_func = omap_device_enable_hwmods,
415		− .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
416		− },
417		−};
418		−
419	411	/**
420	412	* omap_timer_init - build and register timer device with an
421	413	* associated timer hwmod
@@ -477,9 +469,7 @@ static int __init omap_timer_init(struct omap_hwmod oh, void unused) · 55 unmodified lines
477	469	pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
478	470	#endif
479	471	pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
480		− omap2_dmtimer_latency,
481		− ARRAY_SIZE(omap2_dmtimer_latency),
482		− 0);
	472	+ NULL, 0, 0);
483	473
484	474	if (IS_ERR(pdev)) {
485	475	pr_err("%s: Can't build omap_device for %s: %s.\n",

arch/arm/mach-omap2/usb-musb.c+0−38

@@ -60,44 +60,6 @@ static struct musb_hdrc_platform_data musb_plat = { · 59 unmodified lines
60	60
61	61	static u64 musb_dmamask = DMA_BIT_MASK(32);
62	62
63		−static void usb_musb_mux_init(struct omap_musb_board_data *board_data)
64		−{
65		− switch (board_data->interface_type) {
66		− case MUSB_INTERFACE_UTMI:
67		− omap_mux_init_signal("usba0_otg_dp", OMAP_PIN_INPUT);
68		− omap_mux_init_signal("usba0_otg_dm", OMAP_PIN_INPUT);
69		− break;
70		− case MUSB_INTERFACE_ULPI:
71		− omap_mux_init_signal("usba0_ulpiphy_clk",
72		− OMAP_PIN_INPUT_PULLDOWN);
73		− omap_mux_init_signal("usba0_ulpiphy_stp",
74		− OMAP_PIN_INPUT_PULLDOWN);
75		− omap_mux_init_signal("usba0_ulpiphy_dir",
76		− OMAP_PIN_INPUT_PULLDOWN);
77		− omap_mux_init_signal("usba0_ulpiphy_nxt",
78		− OMAP_PIN_INPUT_PULLDOWN);
79		− omap_mux_init_signal("usba0_ulpiphy_dat0",
80		− OMAP_PIN_INPUT_PULLDOWN);
81		− omap_mux_init_signal("usba0_ulpiphy_dat1",
82		− OMAP_PIN_INPUT_PULLDOWN);
83		− omap_mux_init_signal("usba0_ulpiphy_dat2",
84		− OMAP_PIN_INPUT_PULLDOWN);
85		− omap_mux_init_signal("usba0_ulpiphy_dat3",
86		− OMAP_PIN_INPUT_PULLDOWN);
87		− omap_mux_init_signal("usba0_ulpiphy_dat4",
88		− OMAP_PIN_INPUT_PULLDOWN);
89		− omap_mux_init_signal("usba0_ulpiphy_dat5",
90		− OMAP_PIN_INPUT_PULLDOWN);
91		− omap_mux_init_signal("usba0_ulpiphy_dat6",
92		− OMAP_PIN_INPUT_PULLDOWN);
93		− omap_mux_init_signal("usba0_ulpiphy_dat7",
94		− OMAP_PIN_INPUT_PULLDOWN);
95		− break;
96		− default:
97		− break;
98		− }
99		−}
100		−
101	63	static struct omap_musb_board_data musb_default_board_data = {
102	64	.interface_type = MUSB_INTERFACE_ULPI,
103	65	.mode = MUSB_OTG,

arch/arm/plat-omap/dmtimer.c+1−0

@@ -35,6 +35,7 @@ · 34 unmodified lines
35	35	* 675 Mass Ave, Cambridge, MA 02139, USA.
36	36	*/
37	37
	38	+#include <linux/module.h>
38	39	#include <linux/io.h>
39	40	#include <linux/slab.h>
40	41	#include <linux/err.h>

arch/arm/plat-omap/i2c.c+1−1

@@ -184,7 +184,7 @@ static inline int omap2_i2c_add_bus(int bus_id) · 183 unmodified lines
184	184	NULL, 0, 0);
185	185	WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
186	186
187		− return PTR_ERR(pdev);
	187	+ return PTR_RET(pdev);
188	188	}
189	189	#else
190	190	static inline int omap2_i2c_add_bus(int bus_id)

arch/arm/plat-omap/include/plat/cpu.h+12−5

@@ -399,6 +399,13 @@ void omap2_check_revision(void); · 398 unmodified lines
399	399
400	400	/*
401	401	* Runtime detection of OMAP3 features
	402	+ *
	403	+ * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
	404	+ * family have OS-level control over the I/O chain clock. This is
	405	+ * to avoid a window during which wakeups could potentially be lost
	406	+ * during powerdomain transitions. If this bit is set, it
	407	+ * indicates that the chip does support OS-level control of this
	408	+ * feature.
402	409	*/
403	410	extern u32 omap_features;
404	411
@@ -410,9 +417,10 @@ extern u32 omap_features; · 5 unmodified lines
410	417	#define OMAP3_HAS_192MHZ_CLK BIT(5)
411	418	#define OMAP3_HAS_IO_WAKEUP BIT(6)
412	419	#define OMAP3_HAS_SDRC BIT(7)
413		−#define OMAP4_HAS_MPU_1GHZ BIT(8)
414		−#define OMAP4_HAS_MPU_1_2GHZ BIT(9)
415		−#define OMAP4_HAS_MPU_1_5GHZ BIT(10)
	420	+#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
	421	+#define OMAP4_HAS_MPU_1GHZ BIT(9)
	422	+#define OMAP4_HAS_MPU_1_2GHZ BIT(10)
	423	+#define OMAP4_HAS_MPU_1_5GHZ BIT(11)
416	424
417	425
418	426	#define OMAP3_HAS_FEATURE(feat,flag) \
@@ -429,12 +437,11 @@ OMAP3_HAS_FEATURE(isp, ISP) · 10 unmodified lines
429	437	OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
430	438	OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
431	439	OMAP3_HAS_FEATURE(sdrc, SDRC)
	440	+OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
432	441
433	442	/*
434	443	* Runtime detection of OMAP4 features
435	444	*/
436		−extern u32 omap_features;
437		−
438	445	#define OMAP4_HAS_FEATURE(feat, flag) \
439	446	static inline unsigned int omap4_has_ ##feat(void) \
440	447	{ \

arch/arm/plat-omap/include/plat/dmtimer.h+2−2

@@ -104,7 +104,7 @@ struct dmtimer_platform_data { · 103 unmodified lines
104	104
105	105	bool loses_context;
106	106
107		− u32 (get_context_loss_count)(struct device dev);
	107	+ int (get_context_loss_count)(struct device dev);
108	108	};
109	109
110	110	struct omap_dm_timer *omap_dm_timer_request(void);
@@ -279,7 +279,7 @@ struct omap_dm_timer { · 168 unmodified lines
279	279	struct platform_device *pdev;
280	280	struct list_head node;
281	281
282		− u32 (get_context_loss_count)(struct device dev);
	282	+ int (get_context_loss_count)(struct device dev);
283	283	};
284	284
285	285	int omap_dm_timer_prepare(struct omap_dm_timer *timer);

arch/arm/plat-omap/include/plat/omap-alsa.h+0−123

@@ -1,123 +0,0 @@
1		−/*
2		− * arch/arm/plat-omap/include/mach/omap-alsa.h
3		− *
4		− * Alsa Driver for AIC23 and TSC2101 codecs on OMAP platform boards.
5		− *
6		− * Copyright (C) 2006 Mika Laitio <lamikr@cc.jyu.fi>
7		− *
8		− * Copyright (C) 2005 Instituto Nokia de Tecnologia - INdT - Manaus Brazil
9		− * Written by Daniel Petrini, David Cohen, Anderson Briglia
10		− * {daniel.petrini, david.cohen, anderson.briglia}@indt.org.br
11		− *
12		− * This program is free software; you can redistribute it and/or modify it
13		− * under the terms of the GNU General Public License as published by the
14		− * Free Software Foundation; either version 2 of the License, or (at your
15		− * option) any later version.
16		− *
17		− * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18		− * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19		− * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20		− * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21		− * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22		− * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23		− * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24		− * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25		− * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26		− * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27		− *
28		− * You should have received a copy of the GNU General Public License along
29		− * with this program; if not, write to the Free Software Foundation, Inc.,
30		− * 675 Mass Ave, Cambridge, MA 02139, USA.
31		− *
32		− * History
33		− * -------
34		− *
35		− * 2005/07/25 INdT-10LE Kernel Team - Alsa driver for omap osk,
36		− * original version based in sa1100 driver
37		− * and omap oss driver.
38		− */
39		−
40		−#ifndef __OMAP_ALSA_H
41		−#define __OMAP_ALSA_H
42		−
43		−#include <plat/dma.h>
44		−#include <sound/core.h>
45		−#include <sound/pcm.h>
46		−#include <plat/mcbsp.h>
47		−#include <linux/platform_device.h>
48		−
49		−#define DMA_BUF_SIZE (1024 * 8)
50		−
51		−/*
52		− * Buffer management for alsa and dma
53		− */
54		−struct audio_stream {
55		− char id; / identification string */
56		− int stream_id; /* numeric identification */
57		− int dma_dev; /* dma number of that device */
58		− int lch; / Chain of channels this stream is linked to */
59		− char started; /* to store if the chain was started or not */
60		− int dma_q_head; /* DMA Channel Q Head */
61		− int dma_q_tail; /* DMA Channel Q Tail */
62		− char dma_q_count; /* DMA Channel Q Count */
63		− int active:1; /* we are using this stream for transfer now */
64		− int period; /* current transfer period */
65		− int periods; /* current count of periods registerd in the DMA engine */
66		− spinlock_t dma_lock; /* for locking in DMA operations */
67		− struct snd_pcm_substream stream; / the pcm stream */
68		− unsigned linked:1; /* dma channels linked */
69		− int offset; /* store start position of the last period in the alsa buffer */
70		− int (hw_start)(void); / interface to start HW interface, e.g. McBSP */
71		− int (hw_stop)(void); / interface to stop HW interface, e.g. McBSP */
72		−};
73		−
74		−/*
75		− * Alsa card structure for aic23
76		− */
77		−struct snd_card_omap_codec {
78		− struct snd_card *card;
79		− struct snd_pcm *pcm;
80		− long samplerate;
81		− struct audio_stream s[2]; /* playback & capture */
82		−};
83		−
84		−/* Codec specific information and function pointers.
85		− * Codec (omap-alsa-aic23.c and omap-alsa-tsc2101.c)
86		− * are responsible for defining the function pointers.
87		− */
88		−struct omap_alsa_codec_config {
89		− char *name;
90		− struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa;
91		− struct snd_pcm_hw_constraint_list *hw_constraints_rates;
92		− struct snd_pcm_hardware *snd_omap_alsa_playback;
93		− struct snd_pcm_hardware *snd_omap_alsa_capture;
94		− void (*codec_configure_dev)(void);
95		− void (*codec_set_samplerate)(long);
96		− void (*codec_clock_setup)(void);
97		− int (*codec_clock_on)(void);
98		− int (*codec_clock_off)(void);
99		− int (*get_default_samplerate)(void);
100		−};
101		−
102		−/********* Mixer function prototypes ***********************/
103		−int snd_omap_mixer(struct snd_card_omap_codec *);
104		−void snd_omap_init_mixer(void);
105		−
106		−#ifdef CONFIG_PM
107		−void snd_omap_suspend_mixer(void);
108		−void snd_omap_resume_mixer(void);
109		−#endif
110		−
111		−int snd_omap_alsa_post_probe(struct platform_device pdev, struct omap_alsa_codec_config config);
112		−int snd_omap_alsa_remove(struct platform_device *pdev);
113		−#ifdef CONFIG_PM
114		−int snd_omap_alsa_suspend(struct platform_device *pdev, pm_message_t state);
115		−int snd_omap_alsa_resume(struct platform_device *pdev);
116		−#else
117		−#define snd_omap_alsa_suspend NULL
118		−#define snd_omap_alsa_resume NULL
119		−#endif
120		−
121		−void callback_omap_alsa_sound_dma(void *);
122		−
123		−#endif

arch/arm/plat-omap/include/plat/omap-pm.h+2−2

@@ -342,9 +342,9 @@ unsigned long omap_pm_cpu_get_freq(void); · 341 unmodified lines
342	342	* driver must restore device context. If the number of context losses
343	343	* exceeds the maximum positive integer, the function will wrap to 0 and
344	344	* continue counting. Returns the number of context losses for this device,
345		− * or zero upon error.
	345	+ * or negative value upon error.
346	346	*/
347		−u32 omap_pm_get_dev_context_loss_count(struct device *dev);
	347	+int omap_pm_get_dev_context_loss_count(struct device *dev);
348	348
349	349	void omap_pm_enable_off_mode(void);
350	350	void omap_pm_disable_off_mode(void);

arch/arm/plat-omap/include/plat/omap_device.h+1−1

@@ -107,7 +107,7 @@ struct device omap_device_get_by_hwmod_name(const char oh_name); · 106 unmodified lines
107	107	int omap_device_align_pm_lat(struct platform_device *pdev,
108	108	u32 new_wakeup_lat_limit);
109	109	struct powerdomain omap_device_get_pwrdm(struct omap_device od);
110		−u32 omap_device_get_context_loss_count(struct platform_device *pdev);
	110	+int omap_device_get_context_loss_count(struct platform_device *pdev);
111	111
112	112	/* Other */
113	113

arch/arm/plat-omap/include/plat/omap_hwmod.h+1−1

@@ -600,7 +600,7 @@ int omap_hwmod_for_each_by_class(const char *classname, · 599 unmodified lines
600	600	void *user);
601	601
602	602	int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
603		−u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
	603	+int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
604	604
605	605	int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
606	606

arch/arm/plat-omap/omap-pm-noop.c+17−7

@@ -27,7 +27,7 @@ · 26 unmodified lines
27	27	#include <plat/omap_device.h>
28	28
29	29	static bool off_mode_enabled;
30		−static u32 dummy_context_loss_counter;
	30	+static int dummy_context_loss_counter;
31	31
32	32	/*
33	33	* Device-driver-originated constraints (via board-*.c files)
@@ -311,22 +311,32 @@ void omap_pm_disable_off_mode(void) · 277 unmodified lines
311	311
312	312	#ifdef CONFIG_ARCH_OMAP2PLUS
313	313
314		−u32 omap_pm_get_dev_context_loss_count(struct device *dev)
	314	+int omap_pm_get_dev_context_loss_count(struct device *dev)
315	315	{
316	316	struct platform_device *pdev = to_platform_device(dev);
317		− u32 count;
	317	+ int count;
318	318
319	319	if (WARN_ON(!dev))
320		− return 0;
	320	+ return -ENODEV;
321	321
322	322	if (dev->parent == &omap_device_parent) {
323	323	count = omap_device_get_context_loss_count(pdev);
324	324	} else {
325	325	WARN_ONCE(off_mode_enabled, "omap_pm: using dummy context loss counter; device %s should be converted to omap_device",
326	326	dev_name(dev));
327		− if (off_mode_enabled)
328		− dummy_context_loss_counter++;
	327	+
329	328	count = dummy_context_loss_counter;
	329	+
	330	+ if (off_mode_enabled) {
	331	+ count++;
	332	+ /*
	333	+ * Context loss count has to be a non-negative value.
	334	+ * Clear the sign bit to get a value range from 0 to
	335	+ * INT_MAX.
	336	+ */
	337	+ count &= INT_MAX;
	338	+ dummy_context_loss_counter = count;
	339	+ }
330	340	}
331	341
332	342	pr_debug("OMAP PM: context loss count for dev %s = %d\n",
@@ -337,7 +347,7 @@ u32 omap_pm_get_dev_context_loss_count(struct device *dev) · 4 unmodified lines
337	347
338	348	#else
339	349
340		−u32 omap_pm_get_dev_context_loss_count(struct device *dev)
	350	+int omap_pm_get_dev_context_loss_count(struct device *dev)
341	351	{
342	352	return dummy_context_loss_counter;
343	353	}

arch/arm/plat-omap/omap_device.c+2−1

@@ -78,6 +78,7 @@ · 77 unmodified lines
78	78	#undef DEBUG
79	79
80	80	#include <linux/kernel.h>
	81	+#include <linux/export.h>
81	82	#include <linux/platform_device.h>
82	83	#include <linux/slab.h>
83	84	#include <linux/err.h>
@@ -426,7 +427,7 @@ static int _omap_device_notifier_call(struct notifier_block *nb, · 342 unmodified lines
426	427	* return the context loss counter for that hwmod, otherwise return
427	428	* zero.
428	429	*/
429		−u32 omap_device_get_context_loss_count(struct platform_device *pdev)
	430	+int omap_device_get_context_loss_count(struct platform_device *pdev)
430	431	{
431	432	struct omap_device *od;
432	433	u32 ret = 0;