drm/etnaviv: implement softpin

With softpin we allow the userspace to take control over the GPU virtual address space. The new capability is relected by a bump of the minor DRM version. There are a few restrictions for userspace to take into account: 1. The kernel reserves a bit of the address space to implement zero page faulting and mapping of the kernel internal ring buffer. Userspace can query the kernel for the first usable GPU VM address via ETNAVIV_PARAM_SOFTPIN_START_ADDR. 2. We only allow softpin on GPUs, which implement proper process separation via PPAS. If softpin is not available the softpin start address will be set to ~0. 3. Softpin is all or nothing. A submit using softpin must not use any address fixups via relocs.

Lucas Stach committed 7 years ago

Commit 088880d1 parent 17eae238 files · +51 −5Browse files

Unified · Split

8 files

drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.c +1 −0
drivers/gpu/drm/etnaviv/etnaviv_drv.c +1 −1
drivers/gpu/drm/etnaviv/etnaviv_drv.h +2 −0
drivers/gpu/drm/etnaviv/etnaviv_gem.c +3 −2
drivers/gpu/drm/etnaviv/etnaviv_gem.h +1 −0
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +25 −1
drivers/gpu/drm/etnaviv/etnaviv_gpu.c +9 −0
include/uapi/drm/etnaviv_drm.h +9 −1

drivers/gpu/drm/etnaviv/etnaviv_cmdbuf.c+1−0

@@ -44,6 +44,7 @@ etnaviv_cmdbuf_suballoc_new(struct device *dev) · 43 unmodified lines
44	mutex_init(&suballoc->lock);	44	mutex_init(&suballoc->lock);
45	init_waitqueue_head(&suballoc->free_event);	45	init_waitqueue_head(&suballoc->free_event);
46		46
		47	BUILD_BUG_ON(ETNAVIV_SOFTPIN_START_ADDRESS < SUBALLOC_SIZE);
47	suballoc->vaddr = dma_alloc_wc(dev, SUBALLOC_SIZE,	48	suballoc->vaddr = dma_alloc_wc(dev, SUBALLOC_SIZE,
48	&suballoc->paddr, GFP_KERNEL);	49	&suballoc->paddr, GFP_KERNEL);
49	if (!suballoc->vaddr) {	50	if (!suballoc->vaddr) {

drivers/gpu/drm/etnaviv/etnaviv_drv.c+1−1

@@ -529,7 +529,7 @@ static struct drm_driver etnaviv_drm_driver = { · 528 unmodified lines
529	.desc = "etnaviv DRM",	529	.desc = "etnaviv DRM",
530	.date = "20151214",	530	.date = "20151214",
531	.major = 1,	531	.major = 1,
532	.minor = 2,	532	.minor = 3,
533	};	533	};
534		534
535	/*	535	/*

drivers/gpu/drm/etnaviv/etnaviv_drv.h+2−0

@@ -24,6 +24,8 @@ struct etnaviv_gem_object; · 23 unmodified lines
24	struct etnaviv_gem_submit;	24	struct etnaviv_gem_submit;
25	struct etnaviv_iommu_global;	25	struct etnaviv_iommu_global;
26		26
		27	#define ETNAVIV_SOFTPIN_START_ADDRESS SZ_4M /* must be >= SUBALLOC_SIZE */
		28
27	struct etnaviv_file_private {	29	struct etnaviv_file_private {
28	struct etnaviv_iommu_context *mmu;	30	struct etnaviv_iommu_context *mmu;
29	struct drm_sched_entity sched_entity[ETNA_MAX_PIPES];	31	struct drm_sched_entity sched_entity[ETNA_MAX_PIPES];

drivers/gpu/drm/etnaviv/etnaviv_gem.c+3−2

 }
 struct etnaviv_vram_mapping *etnaviv_gem_mapping_get(
-	struct drm_gem_object *obj, struct etnaviv_iommu_context *mmu_context)
+	struct drm_gem_object *obj, struct etnaviv_iommu_context *mmu_context,
+	u64 va)
 {
 	struct etnaviv_gem_object *etnaviv_obj = to_etnaviv_bo(obj);
 	struct etnaviv_vram_mapping *mapping;
 	ret = etnaviv_iommu_map_gem(mmu_context, etnaviv_obj,
 				    mmu_context->global->memory_base,
-				    mapping, 0);
+				    mapping, va);
 	if (ret < 0) {
 		etnaviv_iommu_context_put(mmu_context);
 		kfree(mapping);

drivers/gpu/drm/etnaviv/etnaviv_gem.h+1−0

@@ -77,6 +77,7 @@ static inline bool is_active(struct etnaviv_gem_object *etnaviv_obj) · 76 unmodified lines
77		77
78	struct etnaviv_gem_submit_bo {	78	struct etnaviv_gem_submit_bo {
79	u32 flags;	79	u32 flags;
		80	u64 va;
80	struct etnaviv_gem_object *obj;	81	struct etnaviv_gem_object *obj;
81	struct etnaviv_vram_mapping *mapping;	82	struct etnaviv_vram_mapping *mapping;
82	struct dma_fence *excl;	83	struct dma_fence *excl;

drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c+25−1

 		}
 		submit->bos[i].flags = bo->flags;
+		if (submit->flags & ETNA_SUBMIT_SOFTPIN) {
+			if (bo->presumed < ETNAVIV_SOFTPIN_START_ADDRESS) {
+				DRM_ERROR("invalid softpin address\n");
+				ret = -EINVAL;
+				goto out_unlock;
+			}
+			submit->bos[i].va = bo->presumed;
+		}
 		/* normally use drm_gem_object_lookup(), but for bulk lookup
 		 * all under single table_lock just hit object_idr directly:
 		struct etnaviv_vram_mapping *mapping;
 		mapping = etnaviv_gem_mapping_get(&etnaviv_obj->base,
-						  submit->mmu_context);
+						  submit->mmu_context,
+						  submit->bos[i].va);
 		if (IS_ERR(mapping)) {
 			ret = PTR_ERR(mapping);
 			break;
 		}
+		if ((submit->flags & ETNA_SUBMIT_SOFTPIN) &&
+		     submit->bos[i].va != mapping->iova)
+			return -EINVAL;
 		atomic_inc(&etnaviv_obj->gpu_active);
 		submit->bos[i].flags |= BO_PINNED;
 	u32 *ptr = stream;
 	int ret;
+	/* Submits using softpin don't blend with relocs */
+	if ((submit->flags & ETNA_SUBMIT_SOFTPIN) && nr_relocs != 0)
+		return -EINVAL;
 	for (i = 0; i < nr_relocs; i++) {
 		const struct drm_etnaviv_gem_submit_reloc *r = relocs + i;
 		struct etnaviv_gem_submit_bo *bo;
 		return -EINVAL;
 	}
+	if ((args->flags & ETNA_SUBMIT_SOFTPIN) &&
+	    priv->mmu_global->version != ETNAVIV_IOMMU_V2) {
+		DRM_ERROR("softpin requested on incompatible MMU\n");
+		return -EINVAL;
+	}
 	/*
 	 * Copy the command submission and bo array to kernel space in
 	 * one go, and do this outside of any locks.

drivers/gpu/drm/etnaviv/etnaviv_gpu.c+9−0

 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value)
 {
+	struct etnaviv_drm_private *priv = gpu->drm->dev_private;
 	switch (param) {
 	case ETNAVIV_PARAM_GPU_MODEL:
 		*value = gpu->identity.model;
 		*value = gpu->identity.varyings_count;
 		break;
+	case ETNAVIV_PARAM_SOFTPIN_START_ADDR:
+		if (priv->mmu_global->version == ETNAVIV_IOMMU_V2)
+			*value = ETNAVIV_SOFTPIN_START_ADDRESS;
+		else
+			*value = ~0ULL;
+		break;
 	default:
 		DBG("%s: invalid param: %u", dev_name(gpu->dev), param);
 		return -EINVAL;

include/uapi/drm/etnaviv_drm.h+9−1

 #define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT         0x18
 #define ETNAVIV_PARAM_GPU_NUM_CONSTANTS             0x19
 #define ETNAVIV_PARAM_GPU_NUM_VARYINGS              0x1a
+#define ETNAVIV_PARAM_SOFTPIN_START_ADDR            0x1b
 #define ETNA_MAX_PIPES 4
  * then patching the cmdstream for this entry is skipped.  This can
  * avoid kernel needing to map/access the cmdstream bo in the common
  * case.
+ * If the submit is a softpin submit (ETNA_SUBMIT_SOFTPIN) the 'presumed'
+ * field is interpreted as the fixed location to map the bo into the gpu
+ * virtual address space. If the kernel is unable to map the buffer at
+ * this location the submit will fail. This means userspace is responsible
+ * for the whole gpu virtual address management.
  */
 #define ETNA_SUBMIT_BO_READ             0x0001
 #define ETNA_SUBMIT_BO_WRITE            0x0002
 #define ETNA_SUBMIT_NO_IMPLICIT         0x0001
 #define ETNA_SUBMIT_FENCE_FD_IN         0x0002
 #define ETNA_SUBMIT_FENCE_FD_OUT        0x0004
+#define ETNA_SUBMIT_SOFTPIN             0x0008
 #define ETNA_SUBMIT_FLAGS		(ETNA_SUBMIT_NO_IMPLICIT | \
 					 ETNA_SUBMIT_FENCE_FD_IN | \
-					 ETNA_SUBMIT_FENCE_FD_OUT)
+					 ETNA_SUBMIT_FENCE_FD_OUT| \
+					 ETNA_SUBMIT_SOFTPIN)
 #define ETNA_PIPE_3D      0x00
 #define ETNA_PIPE_2D      0x01
 #define ETNA_PIPE_VG      0x02