Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull "ARM: More device tree support updates" from Olof Johansson: "This branch contains a number of updates for device tree support on several ARM platforms, in particular: * AT91 continues the device tree conversion adding support for a number of on-chip drivers and other functionality * ux500 adds probing of some of the core SoC blocks through device tree * Initial device tree support for ST SPEAr600 platforms * kirkwood continues the conversion to device-tree probing" Manually merge arch/arm/mach-ux500/Kconfig due to MACH_U8500 rename, and drivers/usb/gadget/at91_udc.c due to header file include cleanups. Also do an "evil merge" for the MACH_U8500 config option rename that the affected RMI4 touchscreen driver in staging. It's called MACH_MOP500 now, and it was missed during previous merges. * tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) ARM: SPEAr600: Add device-tree support to SPEAr600 boards ARM: ux500: Provide local timer support for Device Tree ARM: ux500: Enable PL022 SSP Controller in Device Tree ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree ARM: ux500: db8500: list most devices in the snowball device tree ARM: ux500: split dts file for snowball into generic part ARM: ux500: combine the board init functions for DT boot ARM: ux500: Initial Device Tree support for Snowball ARM: ux500: CONFIG: Enable Device Tree support for future endeavours ARM: kirkwood: use devicetree for rtc-mv ARM: kirkwood: rtc-mv devicetree bindings ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0 ARM: kirkwood: fdt: facilitate new boards during fdt migration ARM: kirkwood: fdt: absorb kirkwood_init() ARM: kirkwood: fdt: use mrvl ticker symbol ARM: orion: wdt: use resource vice direct access ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data. ARM: orion: spi: remove enable_clock_fix which is not used ...

Linus Torvalds committed 14 years ago

Commit 09893ee2 parents 4bb2d10 7d1206b96 files · +2536 −555Browse files

Unified · Split

96 files

Documentation/devicetree/bindings/arm/atmel-at91.txt +60 −0
Documentation/devicetree/bindings/arm/atmel-pmc.txt +11 −0
Documentation/devicetree/bindings/arm/spear.txt +8 −0
Documentation/devicetree/bindings/gpio/gpio_i2c.txt +32 −0
Documentation/devicetree/bindings/mtd/atmel-nand.txt +41 −0
Documentation/devicetree/bindings/mtd/nand.txt +7 −0
Documentation/devicetree/bindings/usb/atmel-usb.txt +49 −0
Documentation/devicetree/bindings/usb/tegra-usb.txt +13 −0
arch/arm/boot/dts/at91sam9g20.dtsi +63 −0
arch/arm/boot/dts/at91sam9g25ek.dts +13 −1
arch/arm/boot/dts/at91sam9g45.dtsi +64 −0
arch/arm/boot/dts/at91sam9m10g45ek.dts +45 −1
arch/arm/boot/dts/at91sam9x5.dtsi +88 −0
arch/arm/boot/dts/at91sam9x5cm.dtsi +45 −0
arch/arm/boot/dts/db8500.dtsi +275 −0
arch/arm/boot/dts/kirkwood-dreamplug.dts +6 −7
arch/arm/boot/dts/kirkwood.dtsi +32 −2
arch/arm/boot/dts/snowball.dts +139 −0
arch/arm/boot/dts/spear600-evb.dts +47 −0
arch/arm/boot/dts/spear600.dtsi +174 −0
arch/arm/boot/dts/tegra-seaboard.dts +1 −0
arch/arm/boot/dts/tegra20.dtsi +1 −0
arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi +96 −0
arch/arm/boot/dts/usb_a9g20.dts +73 −1
arch/arm/configs/at91sam9g20_defconfig +3 −0
arch/arm/configs/u8500_defconfig +1 −0
arch/arm/mach-at91/Kconfig +2 −8
arch/arm/mach-at91/at91sam9260.c +1 −0
arch/arm/mach-at91/at91sam9g45.c +2 −0
arch/arm/mach-at91/at91sam9x5.c +4 −13
arch/arm/mach-at91/board-afeb-9260v1.c +1 −0
arch/arm/mach-at91/board-cam60.c +1 −0
arch/arm/mach-at91/board-cpu9krea.c +1 −0
arch/arm/mach-at91/board-dt.c +1 −56
arch/arm/mach-at91/board-kb9202.c +1 −0
arch/arm/mach-at91/board-neocore926.c +1 −0
arch/arm/mach-at91/board-qil-a9260.c +2 −0
arch/arm/mach-at91/board-rm9200dk.c +2 −0
arch/arm/mach-at91/board-sam9-l9260.c +1 −0
arch/arm/mach-at91/board-sam9260ek.c +2 −0
arch/arm/mach-at91/board-sam9261ek.c +2 −0
arch/arm/mach-at91/board-sam9263ek.c +2 −0
arch/arm/mach-at91/board-sam9g20ek.c +2 −0
arch/arm/mach-at91/board-sam9m10g45ek.c +2 −0
arch/arm/mach-at91/board-sam9rlek.c +2 −0
arch/arm/mach-at91/board-snapper9260.c +1 −0
arch/arm/mach-at91/board-stamp9g20.c +1 −0
arch/arm/mach-at91/board-usb-a926x.c +2 −0
arch/arm/mach-at91/board-yl-9200.c +1 −0
arch/arm/mach-at91/clock.c +51 −5
arch/arm/mach-at91/generic.h +2 −0
arch/arm/mach-at91/include/mach/at91_shdwc.h +3 −1
arch/arm/mach-at91/include/mach/at91sam9x5.h +0 −5
arch/arm/mach-at91/include/mach/board.h +1 −14
arch/arm/mach-at91/pm.c +0 −13
arch/arm/mach-at91/setup.c +158 −0
arch/arm/mach-kirkwood/Makefile +1 −0
arch/arm/mach-kirkwood/board-dreamplug.c +152 −0
arch/arm/mach-kirkwood/board-dt.c +23 −128
arch/arm/mach-kirkwood/common.c +5 −6
arch/arm/mach-kirkwood/common.h +15 −0
arch/arm/mach-spear6xx/Kconfig +4 −3
arch/arm/mach-spear6xx/Makefile +0 −6
arch/arm/mach-spear6xx/clock.c +7 −7
arch/arm/mach-spear6xx/spear600.c +0 −25
arch/arm/mach-spear6xx/spear600_evb.c +0 −54
arch/arm/mach-spear6xx/spear6xx.c +36 −96
arch/arm/mach-ux500/Kconfig +6 −0
arch/arm/mach-ux500/Makefile.boot +1 −0
arch/arm/mach-ux500/board-mop500.c +97 −2
arch/arm/mach-ux500/cache-l2x0.c +6 −1
arch/arm/mach-ux500/cpu.c +13 −1
arch/arm/mach-ux500/timer.c +8 −3
arch/arm/plat-orion/common.c +6 −1
arch/arm/plat-orion/include/plat/audio.h +0 −1
arch/avr32/boards/atngw100/setup.c +1 −0
arch/avr32/boards/atstk1000/atstk1002.c +1 −0
arch/avr32/mach-at32ap/include/mach/board.h +1 −12
drivers/i2c/busses/i2c-gpio.c +76 −22
drivers/mtd/nand/atmel_nand.c +98 −38
drivers/of/Kconfig +4 −0
drivers/of/Makefile +1 −0
drivers/of/of_mtd.c +85 −0
drivers/rtc/rtc-mv.c +9 −0
drivers/spi/spi-orion.c +0 −5
drivers/staging/ste_rmi4/Makefile +1 −1
drivers/usb/Kconfig +1 −1
drivers/usb/gadget/Kconfig +1 −1
drivers/usb/gadget/at91_udc.c +38 −2
drivers/usb/host/ehci-atmel.c +23 −1
drivers/usb/host/ohci-at91.c +100 −1
drivers/watchdog/orion_wdt.c +15 −9
include/linux/of.h +16 −0
include/linux/of_mtd.h +19 −0
include/linux/platform_data/atmel.h +27 −0
include/linux/spi/orion_spi.h +0 −1

Documentation/devicetree/bindings/arm/atmel-at91.txt+60−0

@@ -30,3 +30,63 @@ One interrupt per TC channel in a TC block: · 29 unmodified lines
30	30	reg = <0xfffdc000 0x100>;
31	31	interrupts = <26 4 27 4 28 4>;
32	32	};
	33	+
	34	+RSTC Reset Controller required properties:
	35	+- compatible: Should be "atmel,<chip>-rstc".
	36	+ <chip> can be "at91sam9260" or "at91sam9g45"
	37	+- reg: Should contain registers location and length
	38	+
	39	+Example:
	40	+
	41	+ rstc@fffffd00 {
	42	+ compatible = "atmel,at91sam9260-rstc";
	43	+ reg = <0xfffffd00 0x10>;
	44	+ };
	45	+
	46	+RAMC SDRAM/DDR Controller required properties:
	47	+- compatible: Should be "atmel,at91sam9260-sdramc",
	48	+ "atmel,at91sam9g45-ddramc",
	49	+- reg: Should contain registers location and length
	50	+ For at91sam9263 and at91sam9g45 you must specify 2 entries.
	51	+
	52	+Examples:
	53	+
	54	+ ramc0: ramc@ffffe800 {
	55	+ compatible = "atmel,at91sam9g45-ddramc";
	56	+ reg = <0xffffe800 0x200>;
	57	+ };
	58	+
	59	+ ramc0: ramc@ffffe400 {
	60	+ compatible = "atmel,at91sam9g45-ddramc";
	61	+ reg = <0xffffe400 0x200
	62	+ 0xffffe600 0x200>;
	63	+ };
	64	+
	65	+SHDWC Shutdown Controller
	66	+
	67	+required properties:
	68	+- compatible: Should be "atmel,<chip>-shdwc".
	69	+ <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
	70	+- reg: Should contain registers location and length
	71	+
	72	+optional properties:
	73	+- atmel,wakeup-mode: String, operation mode of the wakeup mode.
	74	+ Supported values are: "none", "high", "low", "any".
	75	+- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
	76	+
	77	+optional at91sam9260 properties:
	78	+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
	79	+
	80	+optional at91sam9rl properties:
	81	+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
	82	+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
	83	+
	84	+optional at91sam9x5 properties:
	85	+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
	86	+
	87	+Example:
	88	+
	89	+ rstc@fffffd00 {
	90	+ compatible = "atmel,at91sam9260-rstc";
	91	+ reg = <0xfffffd00 0x10>;
	92	+ };

Documentation/devicetree/bindings/arm/atmel-pmc.txt+11−0

@@ -0,0 +1,11 @@
	1	+* Power Management Controller (PMC)
	2	+
	3	+Required properties:
	4	+- compatible: Should be "atmel,at91rm9200-pmc"
	5	+- reg: Should contain PMC registers location and length
	6	+
	7	+Examples:
	8	+ pmc: pmc@fffffc00 {
	9	+ compatible = "atmel,at91rm9200-pmc";
	10	+ reg = <0xfffffc00 0x100>;
	11	+ };

Documentation/devicetree/bindings/arm/spear.txt+8−0

@@ -0,0 +1,8 @@
	1	+ST SPEAr Platforms Device Tree Bindings
	2	+---------------------------------------
	3	+
	4	+Boards with the ST SPEAr600 SoC shall have the following properties:
	5	+
	6	+Required root node property:
	7	+
	8	+compatible = "st,spear600";

Documentation/devicetree/bindings/gpio/gpio_i2c.txt+32−0

@@ -0,0 +1,32 @@
	1	+Device-Tree bindings for i2c gpio driver
	2	+
	3	+Required properties:
	4	+ - compatible = "i2c-gpio";
	5	+ - gpios: sda and scl gpio
	6	+
	7	+
	8	+Optional properties:
	9	+ - i2c-gpio,sda-open-drain: sda as open drain
	10	+ - i2c-gpio,scl-open-drain: scl as open drain
	11	+ - i2c-gpio,scl-output-only: scl as output only
	12	+ - i2c-gpio,delay-us: delay between GPIO operations (may depend on each platform)
	13	+ - i2c-gpio,timeout-ms: timeout to get data
	14	+
	15	+Example nodes:
	16	+
	17	+i2c@0 {
	18	+ compatible = "i2c-gpio";
	19	+ gpios = <&pioA 23 0 /* sda */
	20	+ &pioA 24 0 /* scl */
	21	+ >;
	22	+ i2c-gpio,sda-open-drain;
	23	+ i2c-gpio,scl-open-drain;
	24	+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
	25	+ #address-cells = <1>;
	26	+ #size-cells = <0>;
	27	+
	28	+ rv3029c2@56 {
	29	+ compatible = "rv3029c2";
	30	+ reg = <0x56>;
	31	+ };
	32	+};

Documentation/devicetree/bindings/mtd/atmel-nand.txt+41−0

@@ -0,0 +1,41 @@
	1	+Atmel NAND flash
	2	+
	3	+Required properties:
	4	+- compatible : "atmel,at91rm9200-nand".
	5	+- reg : should specify localbus address and size used for the chip,
	6	+ and if availlable the ECC.
	7	+- atmel,nand-addr-offset : offset for the address latch.
	8	+- atmel,nand-cmd-offset : offset for the command latch.
	9	+- #address-cells, #size-cells : Must be present if the device has sub-nodes
	10	+ representing partitions.
	11	+
	12	+- gpios : specifies the gpio pins to control the NAND device. detect is an
	13	+ optional gpio and may be set to 0 if not present.
	14	+
	15	+Optional properties:
	16	+- nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
	17	+ Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
	18	+ "soft_bch".
	19	+- nand-bus-width : 8 or 16 bus width if not present 8
	20	+- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
	21	+
	22	+Examples:
	23	+nand0: nand@40000000,0 {
	24	+ compatible = "atmel,at91rm9200-nand";
	25	+ #address-cells = <1>;
	26	+ #size-cells = <1>;
	27	+ reg = <0x40000000 0x10000000
	28	+ 0xffffe800 0x200
	29	+ >;
	30	+ atmel,nand-addr-offset = <21>;
	31	+ atmel,nand-cmd-offset = <22>;
	32	+ nand-on-flash-bbt;
	33	+ nand-ecc-mode = "soft";
	34	+ gpios = <&pioC 13 0
	35	+ &pioC 14 0
	36	+ 0
	37	+ >;
	38	+ partition@0 {
	39	+ ...
	40	+ };
	41	+};

Documentation/devicetree/bindings/mtd/nand.txt+7−0

@@ -0,0 +1,7 @@
	1	+* MTD generic binding
	2	+
	3	+- nand-ecc-mode : String, operation mode of the NAND ecc mode.
	4	+ Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
	5	+ "soft_bch".
	6	+- nand-bus-width : 8 or 16 bus width if not present 8
	7	+- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false

Documentation/devicetree/bindings/usb/atmel-usb.txt+49−0

@@ -0,0 +1,49 @@
	1	+Atmel SOC USB controllers
	2	+
	3	+OHCI
	4	+
	5	+Required properties:
	6	+ - compatible: Should be "atmel,at91rm9200-ohci" for USB controllers
	7	+ used in host mode.
	8	+ - num-ports: Number of ports.
	9	+ - atmel,vbus-gpio: If present, specifies a gpio that needs to be
	10	+ activated for the bus to be powered.
	11	+ - atmel,oc-gpio: If present, specifies a gpio that needs to be
	12	+ activated for the overcurrent detection.
	13	+
	14	+usb0: ohci@00500000 {
	15	+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	16	+ reg = <0x00500000 0x100000>;
	17	+ interrupts = <20 4>;
	18	+ num-ports = <2>;
	19	+};
	20	+
	21	+EHCI
	22	+
	23	+Required properties:
	24	+ - compatible: Should be "atmel,at91sam9g45-ehci" for USB controllers
	25	+ used in host mode.
	26	+
	27	+usb1: ehci@00800000 {
	28	+ compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
	29	+ reg = <0x00800000 0x100000>;
	30	+ interrupts = <22 4>;
	31	+};
	32	+
	33	+AT91 USB device controller
	34	+
	35	+Required properties:
	36	+ - compatible: Should be "atmel,at91rm9200-udc"
	37	+ - reg: Address and length of the register set for the device
	38	+ - interrupts: Should contain macb interrupt
	39	+
	40	+Optional properties:
	41	+ - atmel,vbus-gpio: If present, specifies a gpio that needs to be
	42	+ activated for the bus to be powered.
	43	+
	44	+usb1: gadget@fffa4000 {
	45	+ compatible = "atmel,at91rm9200-udc";
	46	+ reg = <0xfffa4000 0x4000>;
	47	+ interrupts = <10 4>;
	48	+ atmel,vbus-gpio = <&pioC 5 0>;
	49	+};

Documentation/devicetree/bindings/usb/tegra-usb.txt+13−0

@@ -11,3 +11,16 @@ Required properties : · 10 unmodified lines
11	11	- phy_type : Should be one of "ulpi" or "utmi".
12	12	- nvidia,vbus-gpio : If present, specifies a gpio that needs to be
13	13	activated for the bus to be powered.
	14	+
	15	+Optional properties:
	16	+ - dr_mode : dual role mode. Indicates the working mode for
	17	+ nvidia,tegra20-ehci compatible controllers. Can be "host", "peripheral",
	18	+ or "otg". Default to "host" if not defined for backward compatibility.
	19	+ host means this is a host controller
	20	+ peripheral means it is device controller
	21	+ otg means it can operate as either ("on the go")
	22	+ - nvidia,has-legacy-mode : boolean indicates whether this controller can
	23	+ operate in legacy mode (as APX 2500 / 2600). In legacy mode some
	24	+ registers are accessed through the APB_MISC base address instead of
	25	+ the USB controller. Since this is a legacy issue it probably does not
	26	+ warrant a compatible string of its own.

arch/arm/boot/dts/at91sam9g20.dtsi+63−0

@@ -59,6 +59,26 @@ · 58 unmodified lines
59	59	reg = <0xfffff000 0x200>;
60	60	};
61	61
	62	+ ramc0: ramc@ffffea00 {
	63	+ compatible = "atmel,at91sam9260-sdramc";
	64	+ reg = <0xffffea00 0x200>;
	65	+ };
	66	+
	67	+ pmc: pmc@fffffc00 {
	68	+ compatible = "atmel,at91rm9200-pmc";
	69	+ reg = <0xfffffc00 0x100>;
	70	+ };
	71	+
	72	+ rstc@fffffd00 {
	73	+ compatible = "atmel,at91sam9260-rstc";
	74	+ reg = <0xfffffd00 0x10>;
	75	+ };
	76	+
	77	+ shdwc@fffffd10 {
	78	+ compatible = "atmel,at91sam9260-shdwc";
	79	+ reg = <0xfffffd10 0x10>;
	80	+ };
	81	+
62	82	pit: timer@fffffd30 {
63	83	compatible = "atmel,at91sam9260-pit";
64	84	reg = <0xfffffd30 0xf>;
@@ -171,6 +191,49 @@ · 106 unmodified lines
171	191	interrupts = <21 4>;
172	192	status = "disabled";
173	193	};
	194	+
	195	+ usb1: gadget@fffa4000 {
	196	+ compatible = "atmel,at91rm9200-udc";
	197	+ reg = <0xfffa4000 0x4000>;
	198	+ interrupts = <10 4>;
	199	+ status = "disabled";
	200	+ };
	201	+ };
	202	+
	203	+ nand0: nand@40000000 {
	204	+ compatible = "atmel,at91rm9200-nand";
	205	+ #address-cells = <1>;
	206	+ #size-cells = <1>;
	207	+ reg = <0x40000000 0x10000000
	208	+ 0xffffe800 0x200
	209	+ >;
	210	+ atmel,nand-addr-offset = <21>;
	211	+ atmel,nand-cmd-offset = <22>;
	212	+ gpios = <&pioC 13 0
	213	+ &pioC 14 0
	214	+ 0
	215	+ >;
	216	+ status = "disabled";
174	217	};
	218	+
	219	+ usb0: ohci@00500000 {
	220	+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	221	+ reg = <0x00500000 0x100000>;
	222	+ interrupts = <20 4>;
	223	+ status = "disabled";
	224	+ };
	225	+ };
	226	+
	227	+ i2c@0 {
	228	+ compatible = "i2c-gpio";
	229	+ gpios = <&pioA 23 0 /* sda */
	230	+ &pioA 24 0 /* scl */
	231	+ >;
	232	+ i2c-gpio,sda-open-drain;
	233	+ i2c-gpio,scl-open-drain;
	234	+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
	235	+ #address-cells = <1>;
	236	+ #size-cells = <0>;
	237	+ status = "disabled";
175	238	};
176	239	};

arch/arm/boot/dts/at91sam9g25ek.dts+13−1

@@ -15,7 +15,7 @@ · 14 unmodified lines
15	15	compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16	16
17	17	chosen {
18		− bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
	18	+ bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
19	19	};
20	20
21	21	ahb {
@@ -33,5 +33,17 @@ · 11 unmodified lines
33	33	status = "okay";
34	34	};
35	35	};
	36	+
	37	+ usb0: ohci@00600000 {
	38	+ status = "okay";
	39	+ num-ports = <2>;
	40	+ atmel,vbus-gpio = <&pioD 19 0
	41	+ &pioD 20 0
	42	+ >;
	43	+ };
	44	+
	45	+ usb1: ehci@00700000 {
	46	+ status = "okay";
	47	+ };
36	48	};
37	49	};

arch/arm/boot/dts/at91sam9g45.dtsi+64−0

@@ -60,6 +60,22 @@ · 59 unmodified lines
60	60	reg = <0xfffff000 0x200>;
61	61	};
62	62
	63	+ ramc0: ramc@ffffe400 {
	64	+ compatible = "atmel,at91sam9g45-ddramc";
	65	+ reg = <0xffffe400 0x200
	66	+ 0xffffe600 0x200>;
	67	+ };
	68	+
	69	+ pmc: pmc@fffffc00 {
	70	+ compatible = "atmel,at91rm9200-pmc";
	71	+ reg = <0xfffffc00 0x100>;
	72	+ };
	73	+
	74	+ rstc@fffffd00 {
	75	+ compatible = "atmel,at91sam9g45-rstc";
	76	+ reg = <0xfffffd00 0x10>;
	77	+ };
	78	+
63	79	pit: timer@fffffd30 {
64	80	compatible = "atmel,at91sam9260-pit";
65	81	reg = <0xfffffd30 0xf>;
@@ -67,6 +83,11 @@ · 1 unmodified line
67	83	};
68	84
69	85
	86	+ shdwc@fffffd10 {
	87	+ compatible = "atmel,at91sam9rl-shdwc";
	88	+ reg = <0xfffffd10 0x10>;
	89	+ };
	90	+
70	91	tcb0: timer@fff7c000 {
71	92	compatible = "atmel,at91rm9200-tcb";
72	93	reg = <0xfff7c000 0x100>;
@@ -180,5 +201,48 @@ · 107 unmodified lines
180	201	status = "disabled";
181	202	};
182	203	};
	204	+
	205	+ nand0: nand@40000000 {
	206	+ compatible = "atmel,at91rm9200-nand";
	207	+ #address-cells = <1>;
	208	+ #size-cells = <1>;
	209	+ reg = <0x40000000 0x10000000
	210	+ 0xffffe200 0x200
	211	+ >;
	212	+ atmel,nand-addr-offset = <21>;
	213	+ atmel,nand-cmd-offset = <22>;
	214	+ gpios = <&pioC 8 0
	215	+ &pioC 14 0
	216	+ 0
	217	+ >;
	218	+ status = "disabled";
	219	+ };
	220	+
	221	+ usb0: ohci@00700000 {
	222	+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	223	+ reg = <0x00700000 0x100000>;
	224	+ interrupts = <22 4>;
	225	+ status = "disabled";
	226	+ };
	227	+
	228	+ usb1: ehci@00800000 {
	229	+ compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
	230	+ reg = <0x00800000 0x100000>;
	231	+ interrupts = <22 4>;
	232	+ status = "disabled";
	233	+ };
	234	+ };
	235	+
	236	+ i2c@0 {
	237	+ compatible = "i2c-gpio";
	238	+ gpios = <&pioA 20 0 /* sda */
	239	+ &pioA 21 0 /* scl */
	240	+ >;
	241	+ i2c-gpio,sda-open-drain;
	242	+ i2c-gpio,scl-open-drain;
	243	+ i2c-gpio,delay-us = <5>; /* ~100 kHz */
	244	+ #address-cells = <1>;
	245	+ #size-cells = <0>;
	246	+ status = "disabled";
183	247	};
184	248	};

arch/arm/boot/dts/at91sam9m10g45ek.dts+45−1

@@ -14,13 +14,24 @@ · 13 unmodified lines
14	14	compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
15	15
16	16	chosen {
17		− bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:4M(bootstrap/uboot/kernel)ro,60M(rootfs),-(data) root=/dev/mtdblock1 rw rootfstype=jffs2";
	17	+ bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
18	18	};
19	19
20	20	memory@70000000 {
21	21	reg = <0x70000000 0x4000000>;
22	22	};
23	23
	24	+ clocks {
	25	+ #address-cells = <1>;
	26	+ #size-cells = <1>;
	27	+ ranges;
	28	+
	29	+ main_clock: clock@0 {
	30	+ compatible = "atmel,osc", "fixed-clock";
	31	+ clock-frequency = <12000000>;
	32	+ };
	33	+ };
	34	+
24	35	ahb {
25	36	apb {
26	37	dbgu: serial@ffffee00 {
@@ -36,6 +47,39 @@ · 9 unmodified lines
36	47	status = "okay";
37	48	};
38	49	};
	50	+
	51	+ nand0: nand@40000000 {
	52	+ nand-bus-width = <8>;
	53	+ nand-ecc-mode = "soft";
	54	+ nand-on-flash-bbt;
	55	+ status = "okay";
	56	+
	57	+ boot@0 {
	58	+ label = "bootstrap/uboot/kernel";
	59	+ reg = <0x0 0x400000>;
	60	+ };
	61	+
	62	+ rootfs@400000 {
	63	+ label = "rootfs";
	64	+ reg = <0x400000 0x3C00000>;
	65	+ };
	66	+
	67	+ data@4000000 {
	68	+ label = "data";
	69	+ reg = <0x4000000 0xC000000>;
	70	+ };
	71	+ };
	72	+
	73	+ usb0: ohci@00700000 {
	74	+ status = "okay";
	75	+ num-ports = <2>;
	76	+ atmel,vbus-gpio = <&pioD 1 0
	77	+ &pioD 3 0>;
	78	+ };
	79	+
	80	+ usb1: ehci@00800000 {
	81	+ status = "okay";
	82	+ };
39	83	};
40	84
41	85	leds {

arch/arm/boot/dts/at91sam9x5.dtsi+88−0

@@ -58,6 +58,26 @@ · 57 unmodified lines
58	58	reg = <0xfffff000 0x200>;
59	59	};
60	60
	61	+ ramc0: ramc@ffffe800 {
	62	+ compatible = "atmel,at91sam9g45-ddramc";
	63	+ reg = <0xffffe800 0x200>;
	64	+ };
	65	+
	66	+ pmc: pmc@fffffc00 {
	67	+ compatible = "atmel,at91rm9200-pmc";
	68	+ reg = <0xfffffc00 0x100>;
	69	+ };
	70	+
	71	+ rstc@fffffe00 {
	72	+ compatible = "atmel,at91sam9g45-rstc";
	73	+ reg = <0xfffffe00 0x10>;
	74	+ };
	75	+
	76	+ shdwc@fffffe10 {
	77	+ compatible = "atmel,at91sam9x5-shdwc";
	78	+ reg = <0xfffffe10 0x10>;
	79	+ };
	80	+
61	81	pit: timer@fffffe30 {
62	82	compatible = "atmel,at91sam9260-pit";
63	83	reg = <0xfffffe30 0xf>;
@@ -172,5 +192,73 @@ · 108 unmodified lines
172	192	status = "disabled";
173	193	};
174	194	};
	195	+
	196	+ nand0: nand@40000000 {
	197	+ compatible = "atmel,at91rm9200-nand";
	198	+ #address-cells = <1>;
	199	+ #size-cells = <1>;
	200	+ reg = <0x40000000 0x10000000
	201	+ >;
	202	+ atmel,nand-addr-offset = <21>;
	203	+ atmel,nand-cmd-offset = <22>;
	204	+ gpios = <&pioC 8 0
	205	+ &pioC 14 0
	206	+ 0
	207	+ >;
	208	+ status = "disabled";
	209	+ };
	210	+
	211	+ usb0: ohci@00600000 {
	212	+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	213	+ reg = <0x00600000 0x100000>;
	214	+ interrupts = <22 4>;
	215	+ status = "disabled";
	216	+ };
	217	+
	218	+ usb1: ehci@00700000 {
	219	+ compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
	220	+ reg = <0x00700000 0x100000>;
	221	+ interrupts = <22 4>;
	222	+ status = "disabled";
	223	+ };
	224	+ };
	225	+
	226	+ i2c@0 {
	227	+ compatible = "i2c-gpio";
	228	+ gpios = <&pioA 30 0 /* sda */
	229	+ &pioA 31 0 /* scl */
	230	+ >;
	231	+ i2c-gpio,sda-open-drain;
	232	+ i2c-gpio,scl-open-drain;
	233	+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
	234	+ #address-cells = <1>;
	235	+ #size-cells = <0>;
	236	+ status = "disabled";
	237	+ };
	238	+
	239	+ i2c@1 {
	240	+ compatible = "i2c-gpio";
	241	+ gpios = <&pioC 0 0 /* sda */
	242	+ &pioC 1 0 /* scl */
	243	+ >;
	244	+ i2c-gpio,sda-open-drain;
	245	+ i2c-gpio,scl-open-drain;
	246	+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
	247	+ #address-cells = <1>;
	248	+ #size-cells = <0>;
	249	+ status = "disabled";
	250	+ };
	251	+
	252	+ i2c@2 {
	253	+ compatible = "i2c-gpio";
	254	+ gpios = <&pioB 4 0 /* sda */
	255	+ &pioB 5 0 /* scl */
	256	+ >;
	257	+ i2c-gpio,sda-open-drain;
	258	+ i2c-gpio,scl-open-drain;
	259	+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
	260	+ #address-cells = <1>;
	261	+ #size-cells = <0>;
	262	+ status = "disabled";
175	263	};
176	264	};

arch/arm/boot/dts/at91sam9x5cm.dtsi+45−0

@@ -12,6 +12,51 @@ · 11 unmodified lines
12	12	reg = <0x20000000 0x8000000>;
13	13	};
14	14
	15	+ clocks {
	16	+ #address-cells = <1>;
	17	+ #size-cells = <1>;
	18	+ ranges;
	19	+
	20	+ main_clock: clock@0 {
	21	+ compatible = "atmel,osc", "fixed-clock";
	22	+ clock-frequency = <12000000>;
	23	+ };
	24	+ };
	25	+
	26	+ ahb {
	27	+ nand0: nand@40000000 {
	28	+ nand-bus-width = <8>;
	29	+ nand-ecc-mode = "soft";
	30	+ nand-on-flash-bbt;
	31	+ status = "okay";
	32	+
	33	+ at91bootstrap@0 {
	34	+ label = "at91bootstrap";
	35	+ reg = <0x0 0x40000>;
	36	+ };
	37	+
	38	+ uboot@40000 {
	39	+ label = "u-boot";
	40	+ reg = <0x40000 0x80000>;
	41	+ };
	42	+
	43	+ ubootenv@c0000 {
	44	+ label = "U-Boot Env";
	45	+ reg = <0xc0000 0x140000>;
	46	+ };
	47	+
	48	+ kernel@200000 {
	49	+ label = "kernel";
	50	+ reg = <0x200000 0x600000>;
	51	+ };
	52	+
	53	+ rootfs@800000 {
	54	+ label = "rootfs";
	55	+ reg = <0x800000 0x1f800000>;
	56	+ };
	57	+ };
	58	+ };
	59	+
15	60	leds {
16	61	compatible = "gpio-leds";
17	62

arch/arm/boot/dts/db8500.dtsi+275−0

@@ -0,0 +1,275 @@
	1	+/*
	2	+ * Copyright 2012 Linaro Ltd
	3	+ *
	4	+ * The code contained herein is licensed under the GNU General Public
	5	+ * License. You may obtain a copy of the GNU General Public License
	6	+ * Version 2 or later at the following locations:
	7	+ *
	8	+ * http://www.opensource.org/licenses/gpl-license.html
	9	+ * http://www.gnu.org/copyleft/gpl.html
	10	+ */
	11	+
	12	+/include/ "skeleton.dtsi"
	13	+
	14	+/ {
	15	+ soc-u9500 {
	16	+ #address-cells = <1>;
	17	+ #size-cells = <1>;
	18	+ compatible = "stericsson,db8500";
	19	+ interrupt-parent = <&intc>;
	20	+ ranges;
	21	+
	22	+ intc: interrupt-controller@a0411000 {
	23	+ compatible = "arm,cortex-a9-gic";
	24	+ #interrupt-cells = <3>;
	25	+ #address-cells = <1>;
	26	+ interrupt-controller;
	27	+ interrupt-parent;
	28	+ reg = <0xa0411000 0x1000>,
	29	+ <0xa0410100 0x100>;
	30	+ };
	31	+
	32	+ L2: l2-cache {
	33	+ compatible = "arm,pl310-cache";
	34	+ reg = <0xa0412000 0x1000>;
	35	+ interrupts = <0 13 4>;
	36	+ cache-unified;
	37	+ cache-level = <2>;
	38	+ };
	39	+
	40	+ pmu {
	41	+ compatible = "arm,cortex-a9-pmu";
	42	+ interrupts = <0 7 0x4>;
	43	+ };
	44	+
	45	+ timer@a0410600 {
	46	+ compatible = "arm,cortex-a9-twd-timer";
	47	+ reg = <0xa0410600 0x20>;
	48	+ interrupts = <1 13 0x304>;
	49	+ };
	50	+
	51	+ rtc@80154000 {
	52	+ compatible = "stericsson,db8500-rtc";
	53	+ reg = <0x80154000 0x1000>;
	54	+ interrupts = <0 18 0x4>;
	55	+ };
	56	+
	57	+ gpio0: gpio@8012e000 {
	58	+ compatible = "stericsson,db8500-gpio",
	59	+ "stmicroelectronics,nomadik-gpio";
	60	+ reg = <0x8012e000 0x80>;
	61	+ interrupts = <0 119 0x4>;
	62	+ supports-sleepmode;
	63	+ gpio-controller;
	64	+ };
	65	+
	66	+ gpio1: gpio@8012e080 {
	67	+ compatible = "stericsson,db8500-gpio",
	68	+ "stmicroelectronics,nomadik-gpio";
	69	+ reg = <0x8012e080 0x80>;
	70	+ interrupts = <0 120 0x4>;
	71	+ supports-sleepmode;
	72	+ gpio-controller;
	73	+ };
	74	+
	75	+ gpio2: gpio@8000e000 {
	76	+ compatible = "stericsson,db8500-gpio",
	77	+ "stmicroelectronics,nomadik-gpio";
	78	+ reg = <0x8000e000 0x80>;
	79	+ interrupts = <0 121 0x4>;
	80	+ supports-sleepmode;
	81	+ gpio-controller;
	82	+ };
	83	+
	84	+ gpio3: gpio@8000e080 {
	85	+ compatible = "stericsson,db8500-gpio",
	86	+ "stmicroelectronics,nomadik-gpio";
	87	+ reg = <0x8000e080 0x80>;
	88	+ interrupts = <0 122 0x4>;
	89	+ supports-sleepmode;
	90	+ gpio-controller;
	91	+ };
	92	+
	93	+ gpio4: gpio@8000e100 {
	94	+ compatible = "stericsson,db8500-gpio",
	95	+ "stmicroelectronics,nomadik-gpio";
	96	+ reg = <0x8000e100 0x80>;
	97	+ interrupts = <0 123 0x4>;
	98	+ supports-sleepmode;
	99	+ gpio-controller;
	100	+ };
	101	+
	102	+ gpio5: gpio@8000e180 {
	103	+ compatible = "stericsson,db8500-gpio",
	104	+ "stmicroelectronics,nomadik-gpio";
	105	+ reg = <0x8000e180 0x80>;
	106	+ interrupts = <0 124 0x4>;
	107	+ supports-sleepmode;
	108	+ gpio-controller;
	109	+ };
	110	+
	111	+ gpio6: gpio@8011e000 {
	112	+ compatible = "stericsson,db8500-gpio",
	113	+ "stmicroelectronics,nomadik-gpio";
	114	+ reg = <0x8011e000 0x80>;
	115	+ interrupts = <0 125 0x4>;
	116	+ supports-sleepmode;
	117	+ gpio-controller;
	118	+ };
	119	+
	120	+ gpio7: gpio@8011e080 {
	121	+ compatible = "stericsson,db8500-gpio",
	122	+ "stmicroelectronics,nomadik-gpio";
	123	+ reg = <0x8011e080 0x80>;
	124	+ interrupts = <0 126 0x4>;
	125	+ supports-sleepmode;
	126	+ gpio-controller;
	127	+ };
	128	+
	129	+ gpio8: gpio@a03fe000 {
	130	+ compatible = "stericsson,db8500-gpio",
	131	+ "stmicroelectronics,nomadik-gpio";
	132	+ reg = <0xa03fe000 0x80>;
	133	+ interrupts = <0 127 0x4>;
	134	+ supports-sleepmode;
	135	+ gpio-controller;
	136	+ };
	137	+
	138	+ usb@a03e0000 {
	139	+ compatible = "stericsson,db8500-musb",
	140	+ "mentor,musb";
	141	+ reg = <0xa03e0000 0x10000>;
	142	+ interrupts = <0 23 0x4>;
	143	+ };
	144	+
	145	+ dma-controller@801C0000 {
	146	+ compatible = "stericsson,db8500-dma40",
	147	+ "stericsson,dma40";
	148	+ reg = <0x801C0000 0x1000 0x40010000 0x800>;
	149	+ interrupts = <0 25 0x4>;
	150	+ };
	151	+
	152	+ prcmu@80157000 {
	153	+ compatible = "stericsson,db8500-prcmu";
	154	+ reg = <0x80157000 0x1000>;
	155	+ interrupts = <46 47>;
	156	+ #address-cells = <1>;
	157	+ #size-cells = <0>;
	158	+
	159	+ ab8500@5 {
	160	+ compatible = "stericsson,ab8500";
	161	+ reg = <5>; /* mailbox 5 is i2c */
	162	+ interrupts = <0 40 0x4>;
	163	+ };
	164	+ };
	165	+
	166	+ i2c@80004000 {
	167	+ compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
	168	+ reg = <0x80004000 0x1000>;
	169	+ interrupts = <0 21 0x4>;
	170	+ #address-cells = <1>;
	171	+ #size-cells = <0>;
	172	+ };
	173	+
	174	+ i2c@80122000 {
	175	+ compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
	176	+ reg = <0x80122000 0x1000>;
	177	+ interrupts = <0 22 0x4>;
	178	+ #address-cells = <1>;
	179	+ #size-cells = <0>;
	180	+ };
	181	+
	182	+ i2c@80128000 {
	183	+ compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
	184	+ reg = <0x80128000 0x1000>;
	185	+ interrupts = <0 55 0x4>;
	186	+ #address-cells = <1>;
	187	+ #size-cells = <0>;
	188	+ };
	189	+
	190	+ i2c@80110000 {
	191	+ compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
	192	+ reg = <0x80110000 0x1000>;
	193	+ interrupts = <0 12 0x4>;
	194	+ #address-cells = <1>;
	195	+ #size-cells = <0>;
	196	+ };
	197	+
	198	+ i2c@8012a000 {
	199	+ compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
	200	+ reg = <0x8012a000 0x1000>;
	201	+ interrupts = <0 51 0x4>;
	202	+ #address-cells = <1>;
	203	+ #size-cells = <0>;
	204	+ };
	205	+
	206	+ ssp@80002000 {
	207	+ compatible = "arm,pl022", "arm,primecell";
	208	+ reg = <80002000 0x1000>;
	209	+ interrupts = <0 14 0x4>;
	210	+ #address-cells = <1>;
	211	+ #size-cells = <0>;
	212	+ status = "disabled";
	213	+
	214	+ // Add one of these for each child device
	215	+ cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
	216	+
	217	+ };
	218	+
	219	+ uart@80120000 {
	220	+ compatible = "arm,pl011", "arm,primecell";
	221	+ reg = <0x80120000 0x1000>;
	222	+ interrupts = <0 11 0x4>;
	223	+ status = "disabled";
	224	+ };
	225	+ uart@80121000 {
	226	+ compatible = "arm,pl011", "arm,primecell";
	227	+ reg = <0x80121000 0x1000>;
	228	+ interrupts = <0 19 0x4>;
	229	+ status = "disabled";
	230	+ };
	231	+ uart@80007000 {
	232	+ compatible = "arm,pl011", "arm,primecell";
	233	+ reg = <0x80007000 0x1000>;
	234	+ interrupts = <0 26 0x4>;
	235	+ status = "disabled";
	236	+ };
	237	+
	238	+ sdi@80126000 {
	239	+ compatible = "arm,pl18x", "arm,primecell";
	240	+ reg = <0x80126000 0x1000>;
	241	+ interrupts = <0 60 0x4>;
	242	+ status = "disabled";
	243	+ };
	244	+ sdi@80118000 {
	245	+ compatible = "arm,pl18x", "arm,primecell";
	246	+ reg = <0x80118000 0x1000>;
	247	+ interrupts = <0 50 0x4>;
	248	+ status = "disabled";
	249	+ };
	250	+ sdi@80005000 {
	251	+ compatible = "arm,pl18x", "arm,primecell";
	252	+ reg = <0x80005000 0x1000>;
	253	+ interrupts = <0 41 0x4>;
	254	+ status = "disabled";
	255	+ };
	256	+ sdi@80119000 {
	257	+ compatible = "arm,pl18x", "arm,primecell";
	258	+ reg = <0x80119000 0x1000>;
	259	+ interrupts = <0 59 0x4>;
	260	+ status = "disabled";
	261	+ };
	262	+ sdi@80114000 {
	263	+ compatible = "arm,pl18x", "arm,primecell";
	264	+ reg = <0x80114000 0x1000>;
	265	+ interrupts = <0 99 0x4>;
	266	+ status = "disabled";
	267	+ };
	268	+ sdi@80008000 {
	269	+ compatible = "arm,pl18x", "arm,primecell";
	270	+ reg = <0x80114000 0x1000>;
	271	+ interrupts = <0 100 0x4>;
	272	+ status = "disabled";
	273	+ };
	274	+ };
	275	+};

arch/arm/boot/dts/kirkwood-dreamplug.dts+6−7

@@ -4,7 +4,7 @@ · 3 unmodified lines
4	4
5	5	/ {
6	6	model = "Globalscale Technologies Dreamplug";
7		− compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
	7	+ compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
8	8
9	9	memory {
10	10	device_type = "memory";
@@ -15,11 +15,10 @@ · 4 unmodified lines
15	15	bootargs = "console=ttyS0,115200n8 earlyprintk";
16	16	};
17	17
18		− serial@f1012000 {
19		− compatible = "ns16550a";
20		− reg = <0xf1012000 0xff>;
21		− reg-shift = <2>;
22		− interrupts = <33>;
23		− clock-frequency = <200000000>;
	18	+ ocp@f1000000 {
	19	+ serial@12000 {
	20	+ clock-frequency = <200000000>;
	21	+ status = "ok";
	22	+ };
24	23	};
25	24	};

arch/arm/boot/dts/kirkwood.dtsi+32−2

@@ -1,6 +1,36 @@
1	1	/include/ "skeleton.dtsi"
2	2
3	3	/ {
4		− compatible = "marvell,kirkwood";
5		−};
	4	+ compatible = "mrvl,kirkwood";
	5	+
	6	+ ocp@f1000000 {
	7	+ compatible = "simple-bus";
	8	+ ranges = <0 0xf1000000 0x1000000>;
	9	+ #address-cells = <1>;
	10	+ #size-cells = <1>;
	11	+
	12	+ serial@12000 {
	13	+ compatible = "ns16550a";
	14	+ reg = <0x12000 0x100>;
	15	+ reg-shift = <2>;
	16	+ interrupts = <33>;
	17	+ /* set clock-frequency in board dts */
	18	+ status = "disabled";
	19	+ };
6	20
	21	+ serial@12100 {
	22	+ compatible = "ns16550a";
	23	+ reg = <0x12100 0x100>;
	24	+ reg-shift = <2>;
	25	+ interrupts = <34>;
	26	+ /* set clock-frequency in board dts */
	27	+ status = "disabled";
	28	+ };
	29	+
	30	+ rtc@10300 {
	31	+ compatible = "mrvl,kirkwood-rtc", "mrvl,orion-rtc";
	32	+ reg = <0x10300 0x20>;
	33	+ interrupts = <53>;
	34	+ };
	35	+ };
	36	+};

arch/arm/boot/dts/snowball.dts+139−0

@@ -0,0 +1,139 @@
	1	+/*
	2	+ * Copyright 2011 ST-Ericsson AB
	3	+ *
	4	+ * The code contained herein is licensed under the GNU General Public
	5	+ * License. You may obtain a copy of the GNU General Public License
	6	+ * Version 2 or later at the following locations:
	7	+ *
	8	+ * http://www.opensource.org/licenses/gpl-license.html
	9	+ * http://www.gnu.org/copyleft/gpl.html
	10	+ */
	11	+
	12	+/dts-v1/;
	13	+/include/ "db8500.dtsi"
	14	+
	15	+/ {
	16	+ model = "Calao Systems Snowball platform with device tree";
	17	+ compatible = "calaosystems,snowball-a9500";
	18	+
	19	+ memory {
	20	+ reg = <0x00000000 0x20000000>;
	21	+ };
	22	+
	23	+ gpio_keys {
	24	+ compatible = "gpio-keys";
	25	+ #address-cells = <1>;
	26	+ #size-cells = <0>;
	27	+
	28	+ button@1 {
	29	+ debounce_interval = <50>;
	30	+ wakeup = <1>;
	31	+ linux,code = <2>;
	32	+ label = "userpb";
	33	+ gpios = <&gpio1 0>;
	34	+ };
	35	+ button@2 {
	36	+ debounce_interval = <50>;
	37	+ wakeup = <1>;
	38	+ linux,code = <3>;
	39	+ label = "userpb";
	40	+ gpios = <&gpio4 23>;
	41	+ };
	42	+ button@3 {
	43	+ debounce_interval = <50>;
	44	+ wakeup = <1>;
	45	+ linux,code = <4>;
	46	+ label = "userpb";
	47	+ gpios = <&gpio4 23>;
	48	+ };
	49	+ button@4 {
	50	+ debounce_interval = <50>;
	51	+ wakeup = <1>;
	52	+ linux,code = <5>;
	53	+ label = "userpb";
	54	+ gpios = <&gpio5 1>;
	55	+ };
	56	+ button@5 {
	57	+ debounce_interval = <50>;
	58	+ wakeup = <1>;
	59	+ linux,code = <6>;
	60	+ label = "userpb";
	61	+ gpios = <&gpio5 2>;
	62	+ };
	63	+ };
	64	+
	65	+ leds {
	66	+ compatible = "gpio-leds";
	67	+ used-led {
	68	+ label = "user_led";
	69	+ gpios = <&gpio4 14>;
	70	+ };
	71	+ };
	72	+
	73	+ soc-u9500 {
	74	+
	75	+ external-bus@50000000 {
	76	+ compatible = "simple-bus";
	77	+ reg = <0x50000000 0x10000000>;
	78	+ #address-cells = <1>;
	79	+ #size-cells = <1>;
	80	+ ranges;
	81	+
	82	+ ethernet@50000000 {
	83	+ compatible = "smsc,9111";
	84	+ reg = <0x50000000 0x10000>;
	85	+ interrupts = <12>;
	86	+ interrupt-parent = <&gpio4>;
	87	+ };
	88	+ };
	89	+
	90	+ sdi@80126000 {
	91	+ status = "enabled";
	92	+ cd-gpios = <&gpio6 26>;
	93	+ };
	94	+
	95	+ sdi@80114000 {
	96	+ status = "enabled";
	97	+ };
	98	+
	99	+ uart@80120000 {
	100	+ status = "okay";
	101	+ };
	102	+
	103	+ uart@80121000 {
	104	+ status = "okay";
	105	+ };
	106	+
	107	+ uart@80007000 {
	108	+ status = "okay";
	109	+ };
	110	+
	111	+ i2c@80004000 {
	112	+ tc3589x@42 {
	113	+ //compatible = "tc3589x";
	114	+ reg = <0x42>;
	115	+ interrupts = <25>;
	116	+ interrupt-parent = <&gpio6>;
	117	+ };
	118	+ tps61052@33 {
	119	+ //compatible = "tps61052";
	120	+ reg = <0x33>;
	121	+ };
	122	+ };
	123	+
	124	+ i2c@80128000 {
	125	+ lp5521@0x33 {
	126	+ // compatible = "lp5521";
	127	+ reg = <0x33>;
	128	+ };
	129	+ lp5521@0x34 {
	130	+ // compatible = "lp5521";
	131	+ reg = <0x34>;
	132	+ };
	133	+ bh1780@0x29 {
	134	+ // compatible = "rohm,bh1780gli";
	135	+ reg = <0x33>;
	136	+ };
	137	+ };
	138	+ };
	139	+};

arch/arm/boot/dts/spear600-evb.dts+47−0

@@ -0,0 +1,47 @@
	1	+/*
	2	+ * Copyright 2012 Stefan Roese <sr@denx.de>
	3	+ *
	4	+ * The code contained herein is licensed under the GNU General Public
	5	+ * License. You may obtain a copy of the GNU General Public License
	6	+ * Version 2 or later at the following locations:
	7	+ *
	8	+ * http://www.opensource.org/licenses/gpl-license.html
	9	+ * http://www.gnu.org/copyleft/gpl.html
	10	+ */
	11	+
	12	+/dts-v1/;
	13	+/include/ "spear600.dtsi"
	14	+
	15	+/ {
	16	+ model = "ST SPEAr600 Evaluation Board";
	17	+ compatible = "st,spear600-evb", "st,spear600";
	18	+ #address-cells = <1>;
	19	+ #size-cells = <1>;
	20	+
	21	+ memory {
	22	+ device_type = "memory";
	23	+ reg = <0 0x10000000>;
	24	+ };
	25	+
	26	+ ahb {
	27	+ gmac: ethernet@e0800000 {
	28	+ phy-mode = "gmii";
	29	+ status = "okay";
	30	+ };
	31	+
	32	+ apb {
	33	+ serial@d0000000 {
	34	+ status = "okay";
	35	+ };
	36	+
	37	+ serial@d0080000 {
	38	+ status = "okay";
	39	+ };
	40	+
	41	+ i2c@d0200000 {
	42	+ clock-frequency = <400000>;
	43	+ status = "okay";
	44	+ };
	45	+ };
	46	+ };
	47	+};

arch/arm/boot/dts/spear600.dtsi+174−0

@@ -0,0 +1,174 @@
	1	+/*
	2	+ * Copyright 2012 Stefan Roese <sr@denx.de>
	3	+ *
	4	+ * The code contained herein is licensed under the GNU General Public
	5	+ * License. You may obtain a copy of the GNU General Public License
	6	+ * Version 2 or later at the following locations:
	7	+ *
	8	+ * http://www.opensource.org/licenses/gpl-license.html
	9	+ * http://www.gnu.org/copyleft/gpl.html
	10	+ */
	11	+
	12	+/include/ "skeleton.dtsi"
	13	+
	14	+/ {
	15	+ compatible = "st,spear600";
	16	+
	17	+ cpus {
	18	+ cpu@0 {
	19	+ compatible = "arm,arm926ejs";
	20	+ };
	21	+ };
	22	+
	23	+ memory {
	24	+ device_type = "memory";
	25	+ reg = <0 0x40000000>;
	26	+ };
	27	+
	28	+ ahb {
	29	+ #address-cells = <1>;
	30	+ #size-cells = <1>;
	31	+ compatible = "simple-bus";
	32	+ ranges = <0xd0000000 0xd0000000 0x30000000>;
	33	+
	34	+ vic0: interrupt-controller@f1100000 {
	35	+ compatible = "arm,pl190-vic";
	36	+ interrupt-controller;
	37	+ reg = <0xf1100000 0x1000>;
	38	+ #interrupt-cells = <1>;
	39	+ };
	40	+
	41	+ vic1: interrupt-controller@f1000000 {
	42	+ compatible = "arm,pl190-vic";
	43	+ interrupt-controller;
	44	+ reg = <0xf1000000 0x1000>;
	45	+ #interrupt-cells = <1>;
	46	+ };
	47	+
	48	+ gmac: ethernet@e0800000 {
	49	+ compatible = "st,spear600-gmac";
	50	+ reg = <0xe0800000 0x8000>;
	51	+ interrupt-parent = <&vic1>;
	52	+ interrupts = <24 23>;
	53	+ interrupt-names = "macirq", "eth_wake_irq";
	54	+ status = "disabled";
	55	+ };
	56	+
	57	+ fsmc: flash@d1800000 {
	58	+ compatible = "st,spear600-fsmc-nand";
	59	+ #address-cells = <1>;
	60	+ #size-cells = <1>;
	61	+ reg = <0xd1800000 0x1000 /* FSMC Register */
	62	+ 0xd2000000 0x4000>; /* NAND Base */
	63	+ reg-names = "fsmc_regs", "nand_data";
	64	+ st,ale-off = <0x20000>;
	65	+ st,cle-off = <0x10000>;
	66	+ status = "disabled";
	67	+ };
	68	+
	69	+ smi: flash@fc000000 {
	70	+ compatible = "st,spear600-smi";
	71	+ #address-cells = <1>;
	72	+ #size-cells = <1>;
	73	+ reg = <0xfc000000 0x1000>;
	74	+ interrupt-parent = <&vic1>;
	75	+ interrupts = <12>;
	76	+ status = "disabled";
	77	+ };
	78	+
	79	+ ehci@e1800000 {
	80	+ compatible = "st,spear600-ehci", "usb-ehci";
	81	+ reg = <0xe1800000 0x1000>;
	82	+ interrupt-parent = <&vic1>;
	83	+ interrupts = <27>;
	84	+ status = "disabled";
	85	+ };
	86	+
	87	+ ehci@e2000000 {
	88	+ compatible = "st,spear600-ehci", "usb-ehci";
	89	+ reg = <0xe2000000 0x1000>;
	90	+ interrupt-parent = <&vic1>;
	91	+ interrupts = <29>;
	92	+ status = "disabled";
	93	+ };
	94	+
	95	+ ohci@e1900000 {
	96	+ compatible = "st,spear600-ohci", "usb-ohci";
	97	+ reg = <0xe1900000 0x1000>;
	98	+ interrupt-parent = <&vic1>;
	99	+ interrupts = <26>;
	100	+ status = "disabled";
	101	+ };
	102	+
	103	+ ohci@e2100000 {
	104	+ compatible = "st,spear600-ohci", "usb-ohci";
	105	+ reg = <0xe2100000 0x1000>;
	106	+ interrupt-parent = <&vic1>;
	107	+ interrupts = <28>;
	108	+ status = "disabled";
	109	+ };
	110	+
	111	+ apb {
	112	+ #address-cells = <1>;
	113	+ #size-cells = <1>;
	114	+ compatible = "simple-bus";
	115	+ ranges = <0xd0000000 0xd0000000 0x30000000>;
	116	+
	117	+ serial@d0000000 {
	118	+ compatible = "arm,pl011", "arm,primecell";
	119	+ reg = <0xd0000000 0x1000>;
	120	+ interrupt-parent = <&vic0>;
	121	+ interrupts = <24>;
	122	+ status = "disabled";
	123	+ };
	124	+
	125	+ serial@d0080000 {
	126	+ compatible = "arm,pl011", "arm,primecell";
	127	+ reg = <0xd0080000 0x1000>;
	128	+ interrupt-parent = <&vic0>;
	129	+ interrupts = <25>;
	130	+ status = "disabled";
	131	+ };
	132	+
	133	+ /* local/cpu GPIO */
	134	+ gpio0: gpio@f0100000 {
	135	+ #gpio-cells = <2>;
	136	+ compatible = "arm,pl061", "arm,primecell";
	137	+ gpio-controller;
	138	+ reg = <0xf0100000 0x1000>;
	139	+ interrupt-parent = <&vic0>;
	140	+ interrupts = <18>;
	141	+ };
	142	+
	143	+ /* basic GPIO */
	144	+ gpio1: gpio@fc980000 {
	145	+ #gpio-cells = <2>;
	146	+ compatible = "arm,pl061", "arm,primecell";
	147	+ gpio-controller;
	148	+ reg = <0xfc980000 0x1000>;
	149	+ interrupt-parent = <&vic1>;
	150	+ interrupts = <19>;
	151	+ };
	152	+
	153	+ /* appl GPIO */
	154	+ gpio2: gpio@d8100000 {
	155	+ #gpio-cells = <2>;
	156	+ compatible = "arm,pl061", "arm,primecell";
	157	+ gpio-controller;
	158	+ reg = <0xd8100000 0x1000>;
	159	+ interrupt-parent = <&vic1>;
	160	+ interrupts = <4>;
	161	+ };
	162	+
	163	+ i2c@d0200000 {
	164	+ #address-cells = <1>;
	165	+ #size-cells = <0>;
	166	+ compatible = "snps,designware-i2c";
	167	+ reg = <0xd0200000 0x1000>;
	168	+ interrupt-parent = <&vic0>;
	169	+ interrupts = <28>;
	170	+ status = "disabled";
	171	+ };
	172	+ };
	173	+ };
	174	+};

arch/arm/boot/dts/tegra-seaboard.dts+1−0

@@ -112,6 +112,7 @@ · 111 unmodified lines
112	112
113	113	usb@c5000000 {
114	114	nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
	115	+ dr_mode = "otg";
115	116	};
116	117
117	118	gpio-keys {

arch/arm/boot/dts/tegra20.dtsi+1−0

@@ -190,6 +190,7 @@ · 189 unmodified lines
190	190	reg = <0xc5000000 0x4000>;
191	191	interrupts = < 0 20 0x04 >;
192	192	phy_type = "utmi";
	193	+ nvidia,has-legacy-mode;
193	194	};
194	195
195	196	usb@c5004000 {

arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi+96−0

@@ -0,0 +1,96 @@
	1	+/*
	2	+ * calao-dab-mmx.dtsi - Device Tree Include file for Calao DAB-MMX Daughter Board
	3	+ *
	4	+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
	5	+ *
	6	+ * Licensed under GPLv2.
	7	+ */
	8	+
	9	+/ {
	10	+ ahb {
	11	+ apb {
	12	+ usart1: serial@fffb4000 {
	13	+ status = "okay";
	14	+ };
	15	+
	16	+ usart3: serial@fffd0000 {
	17	+ status = "okay";
	18	+ };
	19	+ };
	20	+ };
	21	+
	22	+ i2c-gpio@0 {
	23	+ status = "okay";
	24	+ };
	25	+
	26	+ leds {
	27	+ compatible = "gpio-leds";
	28	+
	29	+ user_led1 {
	30	+ label = "user_led1";
	31	+ gpios = <&pioB 20 1>;
	32	+ };
	33	+
	34	+/*
	35	+* led already used by mother board but active as high
	36	+* user_led2 {
	37	+* label = "user_led2";
	38	+* gpios = <&pioB 21 1>;
	39	+* };
	40	+*/
	41	+ user_led3 {
	42	+ label = "user_led3";
	43	+ gpios = <&pioB 22 1>;
	44	+ };
	45	+
	46	+ user_led4 {
	47	+ label = "user_led4";
	48	+ gpios = <&pioB 23 1>;
	49	+ };
	50	+
	51	+ red {
	52	+ label = "red";
	53	+ gpios = <&pioB 24 1>;
	54	+ };
	55	+
	56	+ orange {
	57	+ label = "orange";
	58	+ gpios = <&pioB 30 1>;
	59	+ };
	60	+
	61	+ green {
	62	+ label = "green";
	63	+ gpios = <&pioB 31 1>;
	64	+ };
	65	+ };
	66	+
	67	+ gpio_keys {
	68	+ compatible = "gpio-keys";
	69	+ #address-cells = <1>;
	70	+ #size-cells = <0>;
	71	+
	72	+ user_pb1 {
	73	+ label = "user_pb1";
	74	+ gpios = <&pioB 25 1>;
	75	+ linux,code = <0x100>;
	76	+ };
	77	+
	78	+ user_pb2 {
	79	+ label = "user_pb2";
	80	+ gpios = <&pioB 13 1>;
	81	+ linux,code = <0x101>;
	82	+ };
	83	+
	84	+ user_pb3 {
	85	+ label = "user_pb3";
	86	+ gpios = <&pioA 26 1>;
	87	+ linux,code = <0x102>;
	88	+ };
	89	+
	90	+ user_pb4 {
	91	+ label = "user_pb4";
	92	+ gpios = <&pioC 9 1>;
	93	+ linux,code = <0x103>;
	94	+ };
	95	+ };
	96	+};

arch/arm/boot/dts/usb_a9g20.dts+73−1

@@ -13,13 +13,24 @@ · 12 unmodified lines
13	13	compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
14	14
15	15	chosen {
16		− bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data) root=/dev/mtdblock5 rw rootfstype=ubifs";
	16	+ bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
17	17	};
18	18
19	19	memory@20000000 {
20	20	reg = <0x20000000 0x4000000>;
21	21	};
22	22
	23	+ clocks {
	24	+ #address-cells = <1>;
	25	+ #size-cells = <1>;
	26	+ ranges;
	27	+
	28	+ main_clock: clock@0 {
	29	+ compatible = "atmel,osc", "fixed-clock";
	30	+ clock-frequency = <12000000>;
	31	+ };
	32	+ };
	33	+
23	34	ahb {
24	35	apb {
25	36	dbgu: serial@fffff200 {
@@ -30,6 +41,58 @@ · 4 unmodified lines
30	41	phy-mode = "rmii";
31	42	status = "okay";
32	43	};
	44	+
	45	+ usb1: gadget@fffa4000 {
	46	+ atmel,vbus-gpio = <&pioC 5 0>;
	47	+ status = "okay";
	48	+ };
	49	+ };
	50	+
	51	+ nand0: nand@40000000 {
	52	+ nand-bus-width = <8>;
	53	+ nand-ecc-mode = "soft";
	54	+ nand-on-flash-bbt;
	55	+ status = "okay";
	56	+
	57	+ at91bootstrap@0 {
	58	+ label = "at91bootstrap";
	59	+ reg = <0x0 0x20000>;
	60	+ };
	61	+
	62	+ barebox@20000 {
	63	+ label = "barebox";
	64	+ reg = <0x20000 0x40000>;
	65	+ };
	66	+
	67	+ bareboxenv@60000 {
	68	+ label = "bareboxenv";
	69	+ reg = <0x60000 0x20000>;
	70	+ };
	71	+
	72	+ bareboxenv2@80000 {
	73	+ label = "bareboxenv2";
	74	+ reg = <0x80000 0x20000>;
	75	+ };
	76	+
	77	+ kernel@a0000 {
	78	+ label = "kernel";
	79	+ reg = <0xa0000 0x400000>;
	80	+ };
	81	+
	82	+ rootfs@4a0000 {
	83	+ label = "rootfs";
	84	+ reg = <0x4a0000 0x7800000>;
	85	+ };
	86	+
	87	+ data@7ca0000 {
	88	+ label = "data";
	89	+ reg = <0x7ca0000 0x8360000>;
	90	+ };
	91	+ };
	92	+
	93	+ usb0: ohci@00500000 {
	94	+ num-ports = <2>;
	95	+ status = "okay";
33	96	};
34	97	};
35	98
@@ -55,4 +118,13 @@ · 19 unmodified lines
55	118	gpio-key,wakeup;
56	119	};
57	120	};
	121	+
	122	+ i2c@0 {
	123	+ status = "okay";
	124	+
	125	+ rv3029c2@56 {
	126	+ compatible = "rv3029c2";
	127	+ reg = <0x56>;
	128	+ };
	129	+ };
58	130	};

arch/arm/configs/at91sam9g20_defconfig+3−0

@@ -74,6 +74,8 @@ CONFIG_LEGACY_PTY_COUNT=16 · 73 unmodified lines
74	74	CONFIG_SERIAL_ATMEL=y
75	75	CONFIG_SERIAL_ATMEL_CONSOLE=y
76	76	CONFIG_HW_RANDOM=y
	77	+CONFIG_I2C=y
	78	+CONFIG_I2C_GPIO=y
77	79	CONFIG_SPI=y
78	80	CONFIG_SPI_ATMEL=y
79	81	CONFIG_SPI_SPIDEV=y
@@ -105,6 +107,7 @@ CONFIG_LEDS_TRIGGERS=y · 25 unmodified lines
105	107	CONFIG_LEDS_TRIGGER_TIMER=y
106	108	CONFIG_LEDS_TRIGGER_HEARTBEAT=y
107	109	CONFIG_RTC_CLASS=y
	110	+CONFIG_RTC_DRV_RV3029C2=y
108	111	CONFIG_RTC_DRV_AT91SAM9=y
109	112	CONFIG_EXT2_FS=y
110	113	CONFIG_MSDOS_FS=y

arch/arm/configs/u8500_defconfig+1−0

@@ -13,6 +13,7 @@ CONFIG_UX500_SOC_DB8500=y · 12 unmodified lines
13	13	CONFIG_MACH_HREFV60=y
14	14	CONFIG_MACH_SNOWBALL=y
15	15	CONFIG_MACH_U5500=y
	16	+CONFIG_MACH_UX500_DT=y
16	17	CONFIG_NO_HZ=y
17	18	CONFIG_HIGH_RES_TIMERS=y
18	19	CONFIG_SMP=y

arch/arm/mach-at91/Kconfig+2−8

@@ -20,9 +20,11 @@ config HAVE_AT91_USART5 · 19 unmodified lines
20	20
21	21	config AT91_SAM9_ALT_RESET
22	22	bool
	23	+ default !ARCH_AT91X40
23	24
24	25	config AT91_SAM9G45_RESET
25	26	bool
	27	+ default !ARCH_AT91X40
26	28
27	29	menu "Atmel AT91 System-on-Chip"
28	30
@@ -45,7 +47,6 @@ config ARCH_AT91SAM9260 · 16 unmodified lines
45	47	select HAVE_AT91_USART4
46	48	select HAVE_AT91_USART5
47	49	select HAVE_NET_MACB
48		− select AT91_SAM9_ALT_RESET
49	50
50	51	config ARCH_AT91SAM9261
51	52	bool "AT91SAM9261"
@@ -53,7 +54,6 @@ config ARCH_AT91SAM9261 · 1 unmodified line
53	54	select GENERIC_CLOCKEVENTS
54	55	select HAVE_FB_ATMEL
55	56	select HAVE_AT91_DBGU0
56		− select AT91_SAM9_ALT_RESET
57	57
58	58	config ARCH_AT91SAM9G10
59	59	bool "AT91SAM9G10"
@@ -61,7 +61,6 @@ config ARCH_AT91SAM9G10 · 1 unmodified line
61	61	select GENERIC_CLOCKEVENTS
62	62	select HAVE_AT91_DBGU0
63	63	select HAVE_FB_ATMEL
64		− select AT91_SAM9_ALT_RESET
65	64
66	65	config ARCH_AT91SAM9263
67	66	bool "AT91SAM9263"
@@ -70,7 +69,6 @@ config ARCH_AT91SAM9263 · 2 unmodified lines
70	69	select HAVE_FB_ATMEL
71	70	select HAVE_NET_MACB
72	71	select HAVE_AT91_DBGU1
73		− select AT91_SAM9_ALT_RESET
74	72
75	73	config ARCH_AT91SAM9RL
76	74	bool "AT91SAM9RL"
@@ -79,7 +77,6 @@ config ARCH_AT91SAM9RL · 2 unmodified lines
79	77	select HAVE_AT91_USART3
80	78	select HAVE_FB_ATMEL
81	79	select HAVE_AT91_DBGU0
82		− select AT91_SAM9_ALT_RESET
83	80
84	81	config ARCH_AT91SAM9G20
85	82	bool "AT91SAM9G20"
@@ -90,7 +87,6 @@ config ARCH_AT91SAM9G20 · 4 unmodified lines
90	87	select HAVE_AT91_USART4
91	88	select HAVE_AT91_USART5
92	89	select HAVE_NET_MACB
93		− select AT91_SAM9_ALT_RESET
94	90
95	91	config ARCH_AT91SAM9G45
96	92	bool "AT91SAM9G45"
@@ -100,7 +96,6 @@ config ARCH_AT91SAM9G45 · 3 unmodified lines
100	96	select HAVE_FB_ATMEL
101	97	select HAVE_NET_MACB
102	98	select HAVE_AT91_DBGU1
103		− select AT91_SAM9G45_RESET
104	99
105	100	config ARCH_AT91SAM9X5
106	101	bool "AT91SAM9x5 family"
@@ -109,7 +104,6 @@ config ARCH_AT91SAM9X5 · 2 unmodified lines
109	104	select HAVE_FB_ATMEL
110	105	select HAVE_NET_MACB
111	106	select HAVE_AT91_DBGU0
112		− select AT91_SAM9G45_RESET
113	107
114	108	config ARCH_AT91X40
115	109	bool "AT91x40"

arch/arm/mach-at91/at91sam9260.c+1−0

@@ -216,6 +216,7 @@ static struct clk_lookup periph_clocks_lookups[] = { · 215 unmodified lines
216	216	CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk),
217	217	CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
218	218	CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
	219	+ CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
219	220	/* fake hclk clock */
220	221	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
221	222	CLKDEV_CON_ID("pioA", &pioA_clk),

arch/arm/mach-at91/at91sam9g45.c+2−0

@@ -232,6 +232,8 @@ static struct clk_lookup periph_clocks_lookups[] = { · 231 unmodified lines
232	232	/* more tc lookup table for DT entries */
233	233	CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb0_clk),
234	234	CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
	235	+ CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
	236	+ CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
235	237	/* fake hclk clock */
236	238	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
237	239	CLKDEV_CON_ID("pioA", &pioA_clk),

arch/arm/mach-at91/at91sam9x5.c+4−13

@@ -131,7 +131,7 @@ static struct clk dma1_clk = { · 130 unmodified lines
131	131	.type = CLK_TYPE_PERIPHERAL,
132	132	};
133	133	static struct clk uhphs_clk = {
134		− .name = "uhphs_clk",
	134	+ .name = "uhphs",
135	135	.pmc_mask = 1 << AT91SAM9X5_ID_UHPHS,
136	136	.type = CLK_TYPE_PERIPHERAL,
137	137	};
@@ -230,6 +230,9 @@ static struct clk_lookup periph_clocks_lookups[] = { · 92 unmodified lines
230	230	/* additional fake clock for macb_hclk */
231	231	CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
232	232	CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
	233	+ CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
	234	+ CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
	235	+ CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
233	236	};
234	237
235	238	/*
@@ -299,25 +302,14 @@ static void __init at91sam9x5_map_io(void) · 63 unmodified lines
299	302	at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
300	303	}
301	304
302		−static void __init at91sam9x5_ioremap_registers(void)
303		−{
304		− at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512);
305		−}
306		−
307	305	void __init at91sam9x5_initialize(void)
308	306	{
309		− arm_pm_restart = at91sam9g45_restart;
310	307	at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
311	308
312	309	/* Register GPIO subsystem (using DT) */
313	310	at91_gpio_init(NULL, 0);
314	311	}
315	312
316		−/* --------------------------------------------------------------------
317		− * AT91SAM9x5 devices (temporary before modification of code)
318		− * -------------------------------------------------------------------- */
319		−void __init at91_add_device_nand(struct atmel_nand_data *data) {}
320		−
321	313	/* --------------------------------------------------------------------
322	314	* Interrupt initialization
323	315	* -------------------------------------------------------------------- */
@@ -362,7 +354,6 @@ static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { · 38 unmodified lines
362	354	struct at91_init_soc __initdata at91sam9x5_soc = {
363	355	.map_io = at91sam9x5_map_io,
364	356	.default_irq_priority = at91sam9x5_default_irq_priority,
365		− .ioremap_registers = at91sam9x5_ioremap_registers,
366	357	.register_clocks = at91sam9x5_register_clocks,
367	358	.init = at91sam9x5_initialize,
368	359	};

arch/arm/mach-at91/board-afeb-9260v1.c+1−0

@@ -138,6 +138,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = { · 137 unmodified lines
138	138	.rdy_pin = AT91_PIN_PC13,
139	139	.enable_pin = AT91_PIN_PC14,
140	140	.bus_width_16 = 0,
	141	+ .ecc_mode = NAND_ECC_SOFT,
141	142	.parts = afeb9260_nand_partition,
142	143	.num_parts = ARRAY_SIZE(afeb9260_nand_partition),
143	144	.det_pin = -EINVAL,

arch/arm/mach-at91/board-cam60.c+1−0

@@ -140,6 +140,7 @@ static struct atmel_nand_data __initdata cam60_nand_data = { · 139 unmodified lines
140	140	.det_pin = -EINVAL,
141	141	.rdy_pin = AT91_PIN_PA9,
142	142	.enable_pin = AT91_PIN_PA7,
	143	+ .ecc_mode = NAND_ECC_SOFT,
143	144	.parts = cam60_nand_partition,
144	145	.num_parts = ARRAY_SIZE(cam60_nand_partition),
145	146	};

arch/arm/mach-at91/board-cpu9krea.c+1−0

@@ -117,6 +117,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = { · 116 unmodified lines
117	117	.enable_pin = AT91_PIN_PC14,
118	118	.bus_width_16 = 0,
119	119	.det_pin = -EINVAL,
	120	+ .ecc_mode = NAND_ECC_SOFT,
120	121	};
121	122
122	123	#ifdef CONFIG_MACH_CPU9260

arch/arm/mach-at91/board-dt.c+1−56

@@ -19,10 +19,7 @@ · 18 unmodified lines
19	19	#include <linux/of_irq.h>
20	20	#include <linux/of_platform.h>
21	21
22		−#include <mach/hardware.h>
23	22	#include <mach/board.h>
24		−#include <mach/system_rev.h>
25		−#include <mach/at91sam9_smc.h>
26	23
27	24	#include <asm/setup.h>
28	25	#include <asm/irq.h>
@@ -30,58 +27,9 @@ · 1 unmodified line
30	27	#include <asm/mach/map.h>
31	28	#include <asm/mach/irq.h>
32	29
33		−#include "sam9_smc.h"
34	30	#include "generic.h"
35	31
36	32
37		−static void __init ek_init_early(void)
38		−{
39		− /* Initialize processor: 12.000 MHz crystal */
40		− at91_initialize(12000000);
41		−}
42		−
43		−/* det_pin is not connected */
44		−static struct atmel_nand_data __initdata ek_nand_data = {
45		− .ale = 21,
46		− .cle = 22,
47		− .det_pin = -EINVAL,
48		− .rdy_pin = AT91_PIN_PC8,
49		− .enable_pin = AT91_PIN_PC14,
50		−};
51		−
52		−static struct sam9_smc_config __initdata ek_nand_smc_config = {
53		− .ncs_read_setup = 0,
54		− .nrd_setup = 2,
55		− .ncs_write_setup = 0,
56		− .nwe_setup = 2,
57		−
58		− .ncs_read_pulse = 4,
59		− .nrd_pulse = 4,
60		− .ncs_write_pulse = 4,
61		− .nwe_pulse = 4,
62		−
63		− .read_cycle = 7,
64		− .write_cycle = 7,
65		−
66		− .mode = AT91_SMC_READMODE \| AT91_SMC_WRITEMODE \| AT91_SMC_EXNWMODE_DISABLE,
67		− .tdf_cycles = 3,
68		−};
69		−
70		−static void __init ek_add_device_nand(void)
71		−{
72		− ek_nand_data.bus_width_16 = board_have_nand_16bit();
73		− /* setup bus-width (8 or 16) */
74		− if (ek_nand_data.bus_width_16)
75		− ek_nand_smc_config.mode \|= AT91_SMC_DBW_16;
76		− else
77		− ek_nand_smc_config.mode \|= AT91_SMC_DBW_8;
78		−
79		− /* configure chip-select 3 (NAND) */
80		− sam9_smc_configure(0, 3, &ek_nand_smc_config);
81		−
82		− at91_add_device_nand(&ek_nand_data);
83		−}
84		−
85	33	static const struct of_device_id irq_of_match[] __initconst = {
86	34
87	35	{ .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
@@ -98,9 +46,6 @@ static void __init at91_dt_init_irq(void) · 10 unmodified lines
98	46	static void __init at91_dt_device_init(void)
99	47	{
100	48	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
101		−
102		− /* NAND */
103		− ek_add_device_nand();
104	49	}
105	50
106	51	static const char *at91_dt_board_compat[] __initdata = {
@@ -114,7 +59,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") · 7 unmodified lines
114	59	/* Maintainer: Atmel */
115	60	.timer = &at91sam926x_timer,
116	61	.map_io = at91_map_io,
117		− .init_early = ek_init_early,
	62	+ .init_early = at91_dt_initialize,
118	63	.init_irq = at91_dt_init_irq,
119	64	.init_machine = at91_dt_device_init,
120	65	.dt_compat = at91_dt_board_compat,

arch/arm/mach-at91/board-kb9202.c+1−0

@@ -108,6 +108,7 @@ static struct atmel_nand_data __initdata kb9202_nand_data = { · 107 unmodified lines
108	108	.det_pin = -EINVAL,
109	109	.rdy_pin = AT91_PIN_PC29,
110	110	.enable_pin = AT91_PIN_PC28,
	111	+ .ecc_mode = NAND_ECC_SOFT,
111	112	.parts = kb9202_nand_partition,
112	113	.num_parts = ARRAY_SIZE(kb9202_nand_partition),
113	114	};

arch/arm/mach-at91/board-neocore926.c+1−0

@@ -190,6 +190,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = { · 189 unmodified lines
190	190	.rdy_pin = AT91_PIN_PB19,
191	191	.rdy_pin_active_low = 1,
192	192	.enable_pin = AT91_PIN_PD15,
	193	+ .ecc_mode = NAND_ECC_SOFT,
193	194	.parts = neocore926_nand_partition,
194	195	.num_parts = ARRAY_SIZE(neocore926_nand_partition),
195	196	.det_pin = -EINVAL,

arch/arm/mach-at91/board-qil-a9260.c+2−0

@@ -138,6 +138,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 137 unmodified lines
138	138	.det_pin = -EINVAL,
139	139	.rdy_pin = AT91_PIN_PC13,
140	140	.enable_pin = AT91_PIN_PC14,
	141	+ .ecc_mode = NAND_ECC_SOFT,
	142	+ .on_flash_bbt = 1,
141	143	.parts = ek_nand_partition,
142	144	.num_parts = ARRAY_SIZE(ek_nand_partition),
143	145	};

arch/arm/mach-at91/board-rm9200dk.c+2−0

@@ -150,6 +150,8 @@ static struct atmel_nand_data __initdata dk_nand_data = { · 149 unmodified lines
150	150	.det_pin = AT91_PIN_PB1,
151	151	.rdy_pin = AT91_PIN_PC2,
152	152	.enable_pin = -EINVAL,
	153	+ .ecc_mode = NAND_ECC_SOFT,
	154	+ .on_flash_bbt = 1,
153	155	.parts = dk_nand_partition,
154	156	.num_parts = ARRAY_SIZE(dk_nand_partition),
155	157	};

arch/arm/mach-at91/board-sam9-l9260.c+1−0

@@ -139,6 +139,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 138 unmodified lines
139	139	.det_pin = -EINVAL,
140	140	.rdy_pin = AT91_PIN_PC13,
141	141	.enable_pin = AT91_PIN_PC14,
	142	+ .ecc_mode = NAND_ECC_SOFT,
142	143	.parts = ek_nand_partition,
143	144	.num_parts = ARRAY_SIZE(ek_nand_partition),
144	145	};

arch/arm/mach-at91/board-sam9260ek.c+2−0

@@ -181,6 +181,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 180 unmodified lines
181	181	.det_pin = -EINVAL,
182	182	.rdy_pin = AT91_PIN_PC13,
183	183	.enable_pin = AT91_PIN_PC14,
	184	+ .ecc_mode = NAND_ECC_SOFT,
	185	+ .on_flash_bbt = 1,
184	186	.parts = ek_nand_partition,
185	187	.num_parts = ARRAY_SIZE(ek_nand_partition),
186	188	};

arch/arm/mach-at91/board-sam9261ek.c+2−0

@@ -187,6 +187,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 186 unmodified lines
187	187	.det_pin = -EINVAL,
188	188	.rdy_pin = AT91_PIN_PC15,
189	189	.enable_pin = AT91_PIN_PC14,
	190	+ .ecc_mode = NAND_ECC_SOFT,
	191	+ .on_flash_bbt = 1,
190	192	.parts = ek_nand_partition,
191	193	.num_parts = ARRAY_SIZE(ek_nand_partition),
192	194	};

arch/arm/mach-at91/board-sam9263ek.c+2−0

@@ -187,6 +187,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 186 unmodified lines
187	187	.det_pin = -EINVAL,
188	188	.rdy_pin = AT91_PIN_PA22,
189	189	.enable_pin = AT91_PIN_PD15,
	190	+ .ecc_mode = NAND_ECC_SOFT,
	191	+ .on_flash_bbt = 1,
190	192	.parts = ek_nand_partition,
191	193	.num_parts = ARRAY_SIZE(ek_nand_partition),
192	194	};

arch/arm/mach-at91/board-sam9g20ek.c+2−0

@@ -166,6 +166,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 165 unmodified lines
166	166	.rdy_pin = AT91_PIN_PC13,
167	167	.enable_pin = AT91_PIN_PC14,
168	168	.det_pin = -EINVAL,
	169	+ .ecc_mode = NAND_ECC_SOFT,
	170	+ .on_flash_bbt = 1,
169	171	.parts = ek_nand_partition,
170	172	.num_parts = ARRAY_SIZE(ek_nand_partition),
171	173	};

arch/arm/mach-at91/board-sam9m10g45ek.c+2−0

@@ -148,6 +148,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 147 unmodified lines
148	148	.rdy_pin = AT91_PIN_PC8,
149	149	.enable_pin = AT91_PIN_PC14,
150	150	.det_pin = -EINVAL,
	151	+ .ecc_mode = NAND_ECC_SOFT,
	152	+ .on_flash_bbt = 1,
151	153	.parts = ek_nand_partition,
152	154	.num_parts = ARRAY_SIZE(ek_nand_partition),
153	155	};

arch/arm/mach-at91/board-sam9rlek.c+2−0

@@ -94,6 +94,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 93 unmodified lines
94	94	.det_pin = -EINVAL,
95	95	.rdy_pin = AT91_PIN_PD17,
96	96	.enable_pin = AT91_PIN_PB6,
	97	+ .ecc_mode = NAND_ECC_SOFT,
	98	+ .on_flash_bbt = 1,
97	99	.parts = ek_nand_partition,
98	100	.num_parts = ARRAY_SIZE(ek_nand_partition),
99	101	};

arch/arm/mach-at91/board-snapper9260.c+1−0

@@ -110,6 +110,7 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = { · 109 unmodified lines
110	110	.bus_width_16 = 0,
111	111	.enable_pin = -EINVAL,
112	112	.det_pin = -EINVAL,
	113	+ .ecc_mode = NAND_ECC_SOFT,
113	114	};
114	115
115	116	static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {

arch/arm/mach-at91/board-stamp9g20.c+1−0

@@ -86,6 +86,7 @@ static struct atmel_nand_data __initdata nand_data = { · 85 unmodified lines
86	86	.enable_pin = AT91_PIN_PC14,
87	87	.bus_width_16 = 0,
88	88	.det_pin = -EINVAL,
	89	+ .ecc_mode = NAND_ECC_SOFT,
89	90	};
90	91
91	92	static struct sam9_smc_config __initdata nand_smc_config = {

arch/arm/mach-at91/board-usb-a926x.c+2−0

@@ -198,6 +198,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { · 197 unmodified lines
198	198	.det_pin = -EINVAL,
199	199	.rdy_pin = AT91_PIN_PA22,
200	200	.enable_pin = AT91_PIN_PD15,
	201	+ .ecc_mode = NAND_ECC_SOFT,
	202	+ .on_flash_bbt = 1,
201	203	.parts = ek_nand_partition,
202	204	.num_parts = ARRAY_SIZE(ek_nand_partition),
203	205	};

arch/arm/mach-at91/board-yl-9200.c+1−0

@@ -182,6 +182,7 @@ static struct atmel_nand_data __initdata yl9200_nand_data = { · 181 unmodified lines
182	182	.det_pin = -EINVAL,
183	183	.rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */
184	184	.enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */
	185	+ .ecc_mode = NAND_ECC_SOFT,
185	186	.parts = yl9200_nand_partition,
186	187	.num_parts = ARRAY_SIZE(yl9200_nand_partition),
187	188	};

arch/arm/mach-at91/clock.c+51−5

@@ -23,6 +23,7 @@ · 22 unmodified lines
23	23	#include <linux/delay.h>
24	24	#include <linux/clk.h>
25	25	#include <linux/io.h>
	26	+#include <linux/of_address.h>
26	27
27	28	#include <mach/hardware.h>
28	29	#include <mach/at91_pmc.h>
@@ -671,16 +672,12 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock) · 642 unmodified lines
671	672	uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
672	673	}
673	674
674		−int __init at91_clock_init(unsigned long main_clock)
	675	+static int __init at91_pmc_init(unsigned long main_clock)
675	676	{
676	677	unsigned tmp, freq, mckr;
677	678	int i;
678	679	int pll_overclock = false;
679	680
680		− at91_pmc_base = ioremap(AT91_PMC, 256);
681		− if (!at91_pmc_base)
682		− panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
683		−
684	681	/*
685	682	* When the bootloader initialized the main oscillator correctly,
686	683	* there's no problem using the cycle counter. But if it didn't,
@@ -802,6 +799,55 @@ int __init at91_clock_init(unsigned long main_clock) · 115 unmodified lines
802	799	return 0;
803	800	}
804	801
	802	+#if defined(CONFIG_OF)
	803	+static struct of_device_id pmc_ids[] = {
	804	+ { .compatible = "atmel,at91rm9200-pmc" },
	805	+ { /sentinel/ }
	806	+};
	807	+
	808	+static struct of_device_id osc_ids[] = {
	809	+ { .compatible = "atmel,osc" },
	810	+ { /sentinel/ }
	811	+};
	812	+
	813	+int __init at91_dt_clock_init(void)
	814	+{
	815	+ struct device_node *np;
	816	+ u32 main_clock = 0;
	817	+
	818	+ np = of_find_matching_node(NULL, pmc_ids);
	819	+ if (!np)
	820	+ panic("unable to find compatible pmc node in dtb\n");
	821	+
	822	+ at91_pmc_base = of_iomap(np, 0);
	823	+ if (!at91_pmc_base)
	824	+ panic("unable to map pmc cpu registers\n");
	825	+
	826	+ of_node_put(np);
	827	+
	828	+ /* retrieve the freqency of fixed clocks from device tree */
	829	+ np = of_find_matching_node(NULL, osc_ids);
	830	+ if (np) {
	831	+ u32 rate;
	832	+ if (!of_property_read_u32(np, "clock-frequency", &rate))
	833	+ main_clock = rate;
	834	+ }
	835	+
	836	+ of_node_put(np);
	837	+
	838	+ return at91_pmc_init(main_clock);
	839	+}
	840	+#endif
	841	+
	842	+int __init at91_clock_init(unsigned long main_clock)
	843	+{
	844	+ at91_pmc_base = ioremap(AT91_PMC, 256);
	845	+ if (!at91_pmc_base)
	846	+ panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
	847	+
	848	+ return at91_pmc_init(main_clock);
	849	+}
	850	+
805	851	/*
806	852	* Several unused clocks may be active. Turn them off.
807	853	*/

arch/arm/mach-at91/generic.h+2−0

@@ -20,6 +20,7 @@ extern void __init at91_init_sram(int bank, unsigned long base, · 19 unmodified lines
20	20	extern void __init at91rm9200_set_type(int type);
21	21	extern void __init at91_initialize(unsigned long main_clock);
22	22	extern void __init at91x40_initialize(unsigned long main_clock);
	23	+extern void __init at91_dt_initialize(void);
23	24
24	25	/* Interrupts */
25	26	extern void __init at91_init_irq_default(void);
@@ -52,6 +53,7 @@ extern void __init at91sam9rl_set_console_clock(int id); · 26 unmodified lines
52	53	extern void __init at91sam9g45_set_console_clock(int id);
53	54	#ifdef CONFIG_AT91_PMC_UNIT
54	55	extern int __init at91_clock_init(unsigned long main_clock);
	56	+extern int __init at91_dt_clock_init(void);
55	57	#else
56	58	static int inline at91_clock_init(unsigned long main_clock) { return 0; }
57	59	#endif

arch/arm/mach-at91/include/mach/at91_shdwc.h+3−1

@@ -36,9 +36,11 @@ extern void __iomem *at91_shdwc_base; · 35 unmodified lines
36	36	#define AT91_SHDW_WKMODE0_HIGH 1
37	37	#define AT91_SHDW_WKMODE0_LOW 2
38	38	#define AT91_SHDW_WKMODE0_ANYLEVEL 3
39		−#define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */
	39	+#define AT91_SHDW_CPTWK0_MAX 0xf /* Maximum Counter On Wake Up 0 */
	40	+#define AT91_SHDW_CPTWK0 (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */
40	41	#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
41	42	#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
	43	+#define AT91_SHDW_RTCWKEN (1 << 17) /* Real Time Clock Wake-up Enable */
42	44
43	45	#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
44	46	#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */

arch/arm/mach-at91/include/mach/at91sam9x5.h+0−5

@@ -54,11 +54,6 @@ · 53 unmodified lines
54	54	#define AT91SAM9X5_BASE_USART1 0xf8020000
55	55	#define AT91SAM9X5_BASE_USART2 0xf8024000
56	56
57		−/*
58		− * System Peripherals
59		− */
60		−#define AT91SAM9X5_BASE_DDRSDRC0 0xffffe800
61		−
62	57	/*
63	58	* Base addresses for early serial code (uncompress.h)
64	59	*/

arch/arm/mach-at91/include/mach/board.h+1−14

@@ -41,6 +41,7 @@ · 40 unmodified lines
41	41	#include <sound/atmel-ac97c.h>
42	42	#include <linux/serial.h>
43	43	#include <linux/platform_data/macb.h>
	44	+#include <linux/platform_data/atmel.h>
44	45
45	46	/* USB Device */
46	47	struct at91_udc_data {
@@ -98,20 +99,6 @@ extern void __init at91_add_device_usbh(struct at91_usbh_data *data); · 51 unmodified lines
98	99	extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
99	100	extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
100	101
101		− /* NAND / SmartMedia */
102		−struct atmel_nand_data {
103		− int enable_pin; /* chip enable */
104		− int det_pin; /* card detect */
105		− int rdy_pin; /* ready/busy */
106		− u8 rdy_pin_active_low; /* rdy_pin value is inverted */
107		− u8 ale; /* address line number connected to ALE */
108		− u8 cle; /* address line number connected to CLE */
109		− u8 bus_width_16; /* buswidth is 16 bit */
110		− u8 correction_cap; /* PMECC correction capability */
111		− u16 sector_size; /* Sector size for PMECC */
112		− struct mtd_partition *parts;
113		− unsigned int num_parts;
114		−};
115	102	extern void __init at91_add_device_nand(struct atmel_nand_data *data);
116	103
117	104	/* I2C*/

arch/arm/mach-at91/pm.c+0−13

@@ -197,19 +197,6 @@ extern void at91_slow_clock(void __iomem pmc, void __iomem ramc0, · 196 unmodified lines
197	197	extern u32 at91_slow_clock_sz;
198	198	#endif
199	199
200		−void __iomem *at91_ramc_base[2];
201		−
202		−void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
203		−{
204		− if (id < 0 \|\| id > 1) {
205		− pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
206		− BUG();
207		− }
208		− at91_ramc_base[id] = ioremap(addr, size);
209		− if (!at91_ramc_base[id])
210		− panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
211		−}
212		−
213	200	static int at91_pm_enter(suspend_state_t state)
214	201	{
215	202	at91_gpio_suspend();

arch/arm/mach-at91/setup.c+158−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	9	#include <linux/io.h>
10	10	#include <linux/mm.h>
11	11	#include <linux/pm.h>
	12	+#include <linux/of_address.h>
12	13
13	14	#include <asm/mach/map.h>
14	15
@@ -51,6 +52,19 @@ void __init at91_init_interrupts(unsigned int *priority) · 36 unmodified lines
51	52	at91_gpio_irq_setup();
52	53	}
53	54
	55	+void __iomem *at91_ramc_base[2];
	56	+
	57	+void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
	58	+{
	59	+ if (id < 0 \|\| id > 1) {
	60	+ pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
	61	+ BUG();
	62	+ }
	63	+ at91_ramc_base[id] = ioremap(addr, size);
	64	+ if (!at91_ramc_base[id])
	65	+ panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
	66	+}
	67	+
54	68	static struct map_desc sram_desc[2] __initdata;
55	69
56	70	void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
@@ -285,6 +299,150 @@ void __init at91_ioremap_matrix(u32 base_addr) · 228 unmodified lines
285	299	panic("Impossible to ioremap at91_matrix_base\n");
286	300	}
287	301
	302	+#if defined(CONFIG_OF)
	303	+static struct of_device_id rstc_ids[] = {
	304	+ { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart },
	305	+ { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
	306	+ { /sentinel/ }
	307	+};
	308	+
	309	+static void at91_dt_rstc(void)
	310	+{
	311	+ struct device_node *np;
	312	+ const struct of_device_id *of_id;
	313	+
	314	+ np = of_find_matching_node(NULL, rstc_ids);
	315	+ if (!np)
	316	+ panic("unable to find compatible rstc node in dtb\n");
	317	+
	318	+ at91_rstc_base = of_iomap(np, 0);
	319	+ if (!at91_rstc_base)
	320	+ panic("unable to map rstc cpu registers\n");
	321	+
	322	+ of_id = of_match_node(rstc_ids, np);
	323	+ if (!of_id)
	324	+ panic("AT91: rtsc no restart function availlable\n");
	325	+
	326	+ arm_pm_restart = of_id->data;
	327	+
	328	+ of_node_put(np);
	329	+}
	330	+
	331	+static struct of_device_id ramc_ids[] = {
	332	+ { .compatible = "atmel,at91sam9260-sdramc" },
	333	+ { .compatible = "atmel,at91sam9g45-ddramc" },
	334	+ { /sentinel/ }
	335	+};
	336	+
	337	+static void at91_dt_ramc(void)
	338	+{
	339	+ struct device_node *np;
	340	+
	341	+ np = of_find_matching_node(NULL, ramc_ids);
	342	+ if (!np)
	343	+ panic("unable to find compatible ram conroller node in dtb\n");
	344	+
	345	+ at91_ramc_base[0] = of_iomap(np, 0);
	346	+ if (!at91_ramc_base[0])
	347	+ panic("unable to map ramc[0] cpu registers\n");
	348	+ /* the controller may have 2 banks */
	349	+ at91_ramc_base[1] = of_iomap(np, 1);
	350	+
	351	+ of_node_put(np);
	352	+}
	353	+
	354	+static struct of_device_id shdwc_ids[] = {
	355	+ { .compatible = "atmel,at91sam9260-shdwc", },
	356	+ { .compatible = "atmel,at91sam9rl-shdwc", },
	357	+ { .compatible = "atmel,at91sam9x5-shdwc", },
	358	+ { /sentinel/ }
	359	+};
	360	+
	361	+static const char *shdwc_wakeup_modes[] = {
	362	+ [AT91_SHDW_WKMODE0_NONE] = "none",
	363	+ [AT91_SHDW_WKMODE0_HIGH] = "high",
	364	+ [AT91_SHDW_WKMODE0_LOW] = "low",
	365	+ [AT91_SHDW_WKMODE0_ANYLEVEL] = "any",
	366	+};
	367	+
	368	+const int at91_dtget_shdwc_wakeup_mode(struct device_node *np)
	369	+{
	370	+ const char *pm;
	371	+ int err, i;
	372	+
	373	+ err = of_property_read_string(np, "atmel,wakeup-mode", &pm);
	374	+ if (err < 0)
	375	+ return AT91_SHDW_WKMODE0_ANYLEVEL;
	376	+
	377	+ for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++)
	378	+ if (!strcasecmp(pm, shdwc_wakeup_modes[i]))
	379	+ return i;
	380	+
	381	+ return -ENODEV;
	382	+}
	383	+
	384	+static void at91_dt_shdwc(void)
	385	+{
	386	+ struct device_node *np;
	387	+ int wakeup_mode;
	388	+ u32 reg;
	389	+ u32 mode = 0;
	390	+
	391	+ np = of_find_matching_node(NULL, shdwc_ids);
	392	+ if (!np) {
	393	+ pr_debug("AT91: unable to find compatible shutdown (shdwc) conroller node in dtb\n");
	394	+ return;
	395	+ }
	396	+
	397	+ at91_shdwc_base = of_iomap(np, 0);
	398	+ if (!at91_shdwc_base)
	399	+ panic("AT91: unable to map shdwc cpu registers\n");
	400	+
	401	+ wakeup_mode = at91_dtget_shdwc_wakeup_mode(np);
	402	+ if (wakeup_mode < 0) {
	403	+ pr_warn("AT91: shdwc unknown wakeup mode\n");
	404	+ goto end;
	405	+ }
	406	+
	407	+ if (!of_property_read_u32(np, "atmel,wakeup-counter", &reg)) {
	408	+ if (reg > AT91_SHDW_CPTWK0_MAX) {
	409	+ pr_warn("AT91: shdwc wakeup conter 0x%x > 0x%x reduce it to 0x%x\n",
	410	+ reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX);
	411	+ reg = AT91_SHDW_CPTWK0_MAX;
	412	+ }
	413	+ mode \|= AT91_SHDW_CPTWK0_(reg);
	414	+ }
	415	+
	416	+ if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
	417	+ mode \|= AT91_SHDW_RTCWKEN;
	418	+
	419	+ if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
	420	+ mode \|= AT91_SHDW_RTTWKEN;
	421	+
	422	+ at91_shdwc_write(AT91_SHDW_MR, wakeup_mode \| mode);
	423	+
	424	+end:
	425	+ pm_power_off = at91sam9_poweroff;
	426	+
	427	+ of_node_put(np);
	428	+}
	429	+
	430	+void __init at91_dt_initialize(void)
	431	+{
	432	+ at91_dt_rstc();
	433	+ at91_dt_ramc();
	434	+ at91_dt_shdwc();
	435	+
	436	+ /* Init clock subsystem */
	437	+ at91_dt_clock_init();
	438	+
	439	+ /* Register the processor-specific clocks */
	440	+ at91_boot_soc.register_clocks();
	441	+
	442	+ at91_boot_soc.init();
	443	+}
	444	+#endif
	445	+
288	446	void __init at91_initialize(unsigned long main_clock)
289	447	{
290	448	at91_boot_soc.ioremap_registers();

arch/arm/mach-kirkwood/Makefile+1−0

@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_T5325) += t5325-setup.o · 20 unmodified lines
21	21
22	22	obj-$(CONFIG_CPU_IDLE) += cpuidle.o
23	23	obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o
	24	+obj-$(CONFIG_MACH_DREAMPLUG_DT) += board-dreamplug.o

arch/arm/mach-kirkwood/board-dreamplug.c+152−0

@@ -0,0 +1,152 @@
	1	+/*
	2	+ * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
	3	+ *
	4	+ * arch/arm/mach-kirkwood/board-dreamplug.c
	5	+ *
	6	+ * Marvell DreamPlug Reference Board Init for drivers not converted to
	7	+ * flattened device tree yet.
	8	+ *
	9	+ * This file is licensed under the terms of the GNU General Public
	10	+ * License version 2. This program is licensed "as is" without any
	11	+ * warranty of any kind, whether express or implied.
	12	+ */
	13	+
	14	+#include <linux/kernel.h>
	15	+#include <linux/init.h>
	16	+#include <linux/platform_device.h>
	17	+#include <linux/mtd/partitions.h>
	18	+#include <linux/ata_platform.h>
	19	+#include <linux/mv643xx_eth.h>
	20	+#include <linux/of.h>
	21	+#include <linux/of_address.h>
	22	+#include <linux/of_fdt.h>
	23	+#include <linux/of_irq.h>
	24	+#include <linux/of_platform.h>
	25	+#include <linux/gpio.h>
	26	+#include <linux/leds.h>
	27	+#include <linux/mtd/physmap.h>
	28	+#include <linux/spi/flash.h>
	29	+#include <linux/spi/spi.h>
	30	+#include <linux/spi/orion_spi.h>
	31	+#include <asm/mach-types.h>
	32	+#include <asm/mach/arch.h>
	33	+#include <asm/mach/map.h>
	34	+#include <mach/kirkwood.h>
	35	+#include <mach/bridge-regs.h>
	36	+#include <plat/mvsdio.h>
	37	+#include "common.h"
	38	+#include "mpp.h"
	39	+
	40	+struct mtd_partition dreamplug_partitions[] = {
	41	+ {
	42	+ .name = "u-boot",
	43	+ .size = SZ_512K,
	44	+ .offset = 0,
	45	+ },
	46	+ {
	47	+ .name = "u-boot env",
	48	+ .size = SZ_64K,
	49	+ .offset = SZ_512K + SZ_512K,
	50	+ },
	51	+ {
	52	+ .name = "dtb",
	53	+ .size = SZ_64K,
	54	+ .offset = SZ_512K + SZ_512K + SZ_512K,
	55	+ },
	56	+};
	57	+
	58	+static const struct flash_platform_data dreamplug_spi_slave_data = {
	59	+ .type = "mx25l1606e",
	60	+ .name = "spi_flash",
	61	+ .parts = dreamplug_partitions,
	62	+ .nr_parts = ARRAY_SIZE(dreamplug_partitions),
	63	+};
	64	+
	65	+static struct spi_board_info __initdata dreamplug_spi_slave_info[] = {
	66	+ {
	67	+ .modalias = "m25p80",
	68	+ .platform_data = &dreamplug_spi_slave_data,
	69	+ .irq = -1,
	70	+ .max_speed_hz = 50000000,
	71	+ .bus_num = 0,
	72	+ .chip_select = 0,
	73	+ },
	74	+};
	75	+
	76	+static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
	77	+ .phy_addr = MV643XX_ETH_PHY_ADDR(0),
	78	+};
	79	+
	80	+static struct mv643xx_eth_platform_data dreamplug_ge01_data = {
	81	+ .phy_addr = MV643XX_ETH_PHY_ADDR(1),
	82	+};
	83	+
	84	+static struct mv_sata_platform_data dreamplug_sata_data = {
	85	+ .n_ports = 1,
	86	+};
	87	+
	88	+static struct mvsdio_platform_data dreamplug_mvsdio_data = {
	89	+ /* unfortunately the CD signal has not been connected */
	90	+};
	91	+
	92	+static struct gpio_led dreamplug_led_pins[] = {
	93	+ {
	94	+ .name = "dreamplug:blue:bluetooth",
	95	+ .gpio = 47,
	96	+ .active_low = 1,
	97	+ },
	98	+ {
	99	+ .name = "dreamplug:green:wifi",
	100	+ .gpio = 48,
	101	+ .active_low = 1,
	102	+ },
	103	+ {
	104	+ .name = "dreamplug:green:wifi_ap",
	105	+ .gpio = 49,
	106	+ .active_low = 1,
	107	+ },
	108	+};
	109	+
	110	+static struct gpio_led_platform_data dreamplug_led_data = {
	111	+ .leds = dreamplug_led_pins,
	112	+ .num_leds = ARRAY_SIZE(dreamplug_led_pins),
	113	+};
	114	+
	115	+static struct platform_device dreamplug_leds = {
	116	+ .name = "leds-gpio",
	117	+ .id = -1,
	118	+ .dev = {
	119	+ .platform_data = &dreamplug_led_data,
	120	+ }
	121	+};
	122	+
	123	+static unsigned int dreamplug_mpp_config[] __initdata = {
	124	+ MPP0_SPI_SCn,
	125	+ MPP1_SPI_MOSI,
	126	+ MPP2_SPI_SCK,
	127	+ MPP3_SPI_MISO,
	128	+ MPP47_GPIO, /* Bluetooth LED */
	129	+ MPP48_GPIO, /* Wifi LED */
	130	+ MPP49_GPIO, /* Wifi AP LED */
	131	+ 0
	132	+};
	133	+
	134	+void __init dreamplug_init(void)
	135	+{
	136	+ /*
	137	+ * Basic setup. Needs to be called early.
	138	+ */
	139	+ kirkwood_mpp_conf(dreamplug_mpp_config);
	140	+
	141	+ spi_register_board_info(dreamplug_spi_slave_info,
	142	+ ARRAY_SIZE(dreamplug_spi_slave_info));
	143	+ kirkwood_spi_init();
	144	+
	145	+ kirkwood_ehci_init();
	146	+ kirkwood_ge00_init(&dreamplug_ge00_data);
	147	+ kirkwood_ge01_init(&dreamplug_ge01_data);
	148	+ kirkwood_sata_init(&dreamplug_sata_data);
	149	+ kirkwood_sdio_init(&dreamplug_mvsdio_data);
	150	+
	151	+ platform_device_register(&dreamplug_leds);
	152	+}

arch/arm/mach-kirkwood/board-dt.c+23−128

@@ -3,7 +3,7 @@ · 2 unmodified lines
3	3	*
4	4	* arch/arm/mach-kirkwood/board-dt.c
5	5	*
6		− * Marvell DreamPlug Reference Board Setup
	6	+ * Flattened Device Tree board initialization
7	7	*
8	8	* This file is licensed under the terms of the GNU General Public
9	9	* License version 2. This program is licensed "as is" without any
@@ -12,150 +12,45 @@ · 2 unmodified lines
12	12
13	13	#include <linux/kernel.h>
14	14	#include <linux/init.h>
15		−#include <linux/platform_device.h>
16		−#include <linux/mtd/partitions.h>
17		−#include <linux/ata_platform.h>
18		−#include <linux/mv643xx_eth.h>
19	15	#include <linux/of.h>
20		−#include <linux/of_address.h>
21		−#include <linux/of_fdt.h>
22		−#include <linux/of_irq.h>
23	16	#include <linux/of_platform.h>
24		−#include <linux/gpio.h>
25		−#include <linux/leds.h>
26		−#include <linux/mtd/physmap.h>
27		−#include <linux/spi/flash.h>
28		−#include <linux/spi/spi.h>
29		−#include <linux/spi/orion_spi.h>
30		−#include <asm/mach-types.h>
31	17	#include <asm/mach/arch.h>
32		−#include <mach/kirkwood.h>
33		−#include <plat/mvsdio.h>
	18	+#include <asm/mach/map.h>
	19	+#include <mach/bridge-regs.h>
34	20	#include "common.h"
35		−#include "mpp.h"
36	21
37	22	static struct of_device_id kirkwood_dt_match_table[] __initdata = {
38	23	{ .compatible = "simple-bus", },
39	24	{ }
40	25	};
41	26
42		−struct mtd_partition dreamplug_partitions[] = {
43		− {
44		− .name = "u-boot",
45		− .size = SZ_512K,
46		− .offset = 0,
47		− },
48		− {
49		− .name = "u-boot env",
50		− .size = SZ_64K,
51		− .offset = SZ_512K + SZ_512K,
52		− },
53		− {
54		− .name = "dtb",
55		− .size = SZ_64K,
56		− .offset = SZ_512K + SZ_512K + SZ_512K,
57		− },
58		−};
59		−
60		−static const struct flash_platform_data dreamplug_spi_slave_data = {
61		− .type = "mx25l1606e",
62		− .name = "spi_flash",
63		− .parts = dreamplug_partitions,
64		− .nr_parts = ARRAY_SIZE(dreamplug_partitions),
65		−};
66		−
67		−static struct spi_board_info __initdata dreamplug_spi_slave_info[] = {
68		− {
69		− .modalias = "m25p80",
70		− .platform_data = &dreamplug_spi_slave_data,
71		− .irq = -1,
72		− .max_speed_hz = 50000000,
73		− .bus_num = 0,
74		− .chip_select = 0,
75		− },
76		−};
77		−
78		−static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
79		− .phy_addr = MV643XX_ETH_PHY_ADDR(0),
80		−};
81		−
82		−static struct mv643xx_eth_platform_data dreamplug_ge01_data = {
83		− .phy_addr = MV643XX_ETH_PHY_ADDR(1),
84		−};
85		−
86		−static struct mv_sata_platform_data dreamplug_sata_data = {
87		− .n_ports = 1,
88		−};
89		−
90		−static struct mvsdio_platform_data dreamplug_mvsdio_data = {
91		− /* unfortunately the CD signal has not been connected */
92		−};
93		−
94		−static struct gpio_led dreamplug_led_pins[] = {
95		− {
96		− .name = "dreamplug:blue:bluetooth",
97		− .gpio = 47,
98		− .active_low = 1,
99		− },
100		− {
101		− .name = "dreamplug:green:wifi",
102		− .gpio = 48,
103		− .active_low = 1,
104		− },
105		− {
106		− .name = "dreamplug:green:wifi_ap",
107		− .gpio = 49,
108		− .active_low = 1,
109		− },
110		−};
111		−
112		−static struct gpio_led_platform_data dreamplug_led_data = {
113		− .leds = dreamplug_led_pins,
114		− .num_leds = ARRAY_SIZE(dreamplug_led_pins),
115		−};
116		−
117		−static struct platform_device dreamplug_leds = {
118		− .name = "leds-gpio",
119		− .id = -1,
120		− .dev = {
121		− .platform_data = &dreamplug_led_data,
122		− }
123		−};
124		−
125		−static unsigned int dreamplug_mpp_config[] __initdata = {
126		− MPP0_SPI_SCn,
127		− MPP1_SPI_MOSI,
128		− MPP2_SPI_SCK,
129		− MPP3_SPI_MISO,
130		− MPP47_GPIO, /* Bluetooth LED */
131		− MPP48_GPIO, /* Wifi LED */
132		− MPP49_GPIO, /* Wifi AP LED */
133		− 0
134		−};
135		−
136		−static void __init dreamplug_init(void)
	27	+static void __init kirkwood_dt_init(void)
137	28	{
	29	+ pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk);
	30	+
138	31	/*
139		− * Basic setup. Needs to be called early.
	32	+ * Disable propagation of mbus errors to the CPU local bus,
	33	+ * as this causes mbus errors (which can occur for example
	34	+ * for PCI aborts) to throw CPU aborts, which we're not set
	35	+ * up to deal with.
140	36	*/
141		− kirkwood_mpp_conf(dreamplug_mpp_config);
	37	+ writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
142	38
143		− spi_register_board_info(dreamplug_spi_slave_info,
144		− ARRAY_SIZE(dreamplug_spi_slave_info));
145		− kirkwood_spi_init();
	39	+ kirkwood_setup_cpu_mbus();
146	40
147		− kirkwood_ehci_init();
148		− kirkwood_ge00_init(&dreamplug_ge00_data);
149		− kirkwood_ge01_init(&dreamplug_ge01_data);
150		− kirkwood_sata_init(&dreamplug_sata_data);
151		− kirkwood_sdio_init(&dreamplug_mvsdio_data);
	41	+#ifdef CONFIG_CACHE_FEROCEON_L2
	42	+ kirkwood_l2_init();
	43	+#endif
152	44
153		− platform_device_register(&dreamplug_leds);
154		−}
	45	+ /* internal devices that every board has */
	46	+ kirkwood_wdt_init();
	47	+ kirkwood_xor0_init();
	48	+ kirkwood_xor1_init();
	49	+ kirkwood_crypto_init();
155	50
156		−static void __init kirkwood_dt_init(void)
157		−{
158		− kirkwood_init();
	51	+#ifdef CONFIG_KEXEC
	52	+ kexec_reinit = kirkwood_enable_pcie;
	53	+#endif
159	54
160	55	if (of_machine_is_compatible("globalscale,dreamplug"))
161	56	dreamplug_init();

arch/arm/mach-kirkwood/common.c+5−6

@@ -279,7 +279,7 @@ void __init kirkwood_crypto_init(void) · 278 unmodified lines
279	279	/*****************************************************************************
280	280	* XOR0
281	281	****************************************************************************/
282		−static void __init kirkwood_xor0_init(void)
	282	+void __init kirkwood_xor0_init(void)
283	283	{
284	284	kirkwood_clk_ctrl \|= CGC_XOR0;
285	285
@@ -291,7 +291,7 @@ static void __init kirkwood_xor0_init(void) · 5 unmodified lines
291	291	/*****************************************************************************
292	292	* XOR1
293	293	****************************************************************************/
294		−static void __init kirkwood_xor1_init(void)
	294	+void __init kirkwood_xor1_init(void)
295	295	{
296	296	kirkwood_clk_ctrl \|= CGC_XOR1;
297	297
@@ -303,7 +303,7 @@ static void __init kirkwood_xor1_init(void) · 5 unmodified lines
303	303	/*****************************************************************************
304	304	* Watchdog
305	305	****************************************************************************/
306		−static void __init kirkwood_wdt_init(void)
	306	+void __init kirkwood_wdt_init(void)
307	307	{
308	308	orion_wdt_init(kirkwood_tclk);
309	309	}
@@ -392,7 +392,7 @@ void __init kirkwood_audio_init(void) · 82 unmodified lines
392	392	/*
393	393	* Identify device ID and revision.
394	394	*/
395		−static char * __init kirkwood_id(void)
	395	+char * __init kirkwood_id(void)
396	396	{
397	397	u32 dev, rev;
398	398
@@ -435,7 +435,7 @@ static char * __init kirkwood_id(void) · 36 unmodified lines
435	435	}
436	436	}
437	437
438		−static void __init kirkwood_l2_init(void)
	438	+void __init kirkwood_l2_init(void)
439	439	{
440	440	#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
441	441	writel(readl(L2_CONFIG_REG) \| L2_WRITETHROUGH, L2_CONFIG_REG);
@@ -450,7 +450,6 @@ void __init kirkwood_init(void) · 8 unmodified lines
450	450	{
451	451	printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
452	452	kirkwood_id(), kirkwood_tclk);
453		− kirkwood_i2s_data.tclk = kirkwood_tclk;
454	453
455	454	/*
456	455	* Disable propagation of mbus errors to the CPU local bus,

arch/arm/mach-kirkwood/common.h+15−0

@@ -51,6 +51,21 @@ void kirkwood_nand_init_rnb(struct mtd_partition parts, int nr_parts, int (dev · 50 unmodified lines
51	51	void kirkwood_audio_init(void);
52	52	void kirkwood_restart(char, const char *);
53	53
	54	+/* board init functions for boards not fully converted to fdt */
	55	+#ifdef CONFIG_MACH_DREAMPLUG_DT
	56	+void dreamplug_init(void);
	57	+#else
	58	+static inline void dreamplug_init(void) {};
	59	+#endif
	60	+
	61	+/* early init functions not converted to fdt yet */
	62	+char *kirkwood_id(void);
	63	+void kirkwood_l2_init(void);
	64	+void kirkwood_wdt_init(void);
	65	+void kirkwood_xor0_init(void);
	66	+void kirkwood_xor1_init(void);
	67	+void kirkwood_crypto_init(void);
	68	+
54	69	extern int kirkwood_tclk;
55	70	extern struct sys_timer kirkwood_timer;
56	71

arch/arm/mach-spear6xx/Kconfig+4−3

@@ -5,11 +5,12 @@ · 4 unmodified lines
5	5	if ARCH_SPEAR6XX
6	6
7	7	menu "SPEAr6xx Implementations"
8		−config BOARD_SPEAR600_EVB
9		− bool "SPEAr600 Evaluation Board"
	8	+config BOARD_SPEAR600_DT
	9	+ bool "SPEAr600 generic board configured via device-tree"
10	10	select MACH_SPEAR600
	11	+ select USE_OF
11	12	help
12		− Supports ST SPEAr600 Evaluation Board
	13	+ Supports ST SPEAr600 boards configured via the device-tree
13	14
14	15	endmenu
15	16

arch/arm/mach-spear6xx/Makefile+0−6

@@ -4,9 +4,3 @@ · 3 unmodified lines
4	4
5	5	# common files
6	6	obj-y += clock.o spear6xx.o
7		−
8		−# spear600 specific files
9		−obj-$(CONFIG_MACH_SPEAR600) += spear600.o
10		−
11		−# spear600 boards files
12		−obj-$(CONFIG_BOARD_SPEAR600_EVB) += spear600_evb.o

arch/arm/mach-spear6xx/clock.c+7−7

@@ -641,8 +641,8 @@ static struct clk_lookup spear_clk_lookups[] = { · 640 unmodified lines
641	641	{ .con_id = "gpt0_synth_clk", .clk = &gpt0_synth_clk},
642	642	{ .con_id = "gpt2_synth_clk", .clk = &gpt2_synth_clk},
643	643	{ .con_id = "gpt3_synth_clk", .clk = &gpt3_synth_clk},
644		− { .dev_id = "uart0", .clk = &uart0_clk},
645		− { .dev_id = "uart1", .clk = &uart1_clk},
	644	+ { .dev_id = "d0000000.serial", .clk = &uart0_clk},
	645	+ { .dev_id = "d0080000.serial", .clk = &uart1_clk},
646	646	{ .dev_id = "firda", .clk = &firda_clk},
647	647	{ .dev_id = "clcd", .clk = &clcd_clk},
648	648	{ .dev_id = "gpt0", .clk = &gpt0_clk},
@@ -655,20 +655,20 @@ static struct clk_lookup spear_clk_lookups[] = { · 6 unmodified lines
655	655	{ .con_id = "usbh.1_clk", .clk = &usbh1_clk},
656	656	/* clock derived from ahb clk */
657	657	{ .con_id = "apb_clk", .clk = &apb_clk},
658		− { .dev_id = "i2c_designware.0", .clk = &i2c_clk},
	658	+ { .dev_id = "d0200000.i2c", .clk = &i2c_clk},
659	659	{ .dev_id = "dma", .clk = &dma_clk},
660	660	{ .dev_id = "jpeg", .clk = &jpeg_clk},
661	661	{ .dev_id = "gmac", .clk = &gmac_clk},
662	662	{ .dev_id = "smi", .clk = &smi_clk},
663		− { .con_id = "fsmc", .clk = &fsmc_clk},
	663	+ { .dev_id = "fsmc-nand", .clk = &fsmc_clk},
664	664	/* clock derived from apb clk */
665	665	{ .dev_id = "adc", .clk = &adc_clk},
666	666	{ .dev_id = "ssp-pl022.0", .clk = &ssp0_clk},
667	667	{ .dev_id = "ssp-pl022.1", .clk = &ssp1_clk},
668	668	{ .dev_id = "ssp-pl022.2", .clk = &ssp2_clk},
669		− { .dev_id = "gpio0", .clk = &gpio0_clk},
670		− { .dev_id = "gpio1", .clk = &gpio1_clk},
671		− { .dev_id = "gpio2", .clk = &gpio2_clk},
	669	+ { .dev_id = "f0100000.gpio", .clk = &gpio0_clk},
	670	+ { .dev_id = "fc980000.gpio", .clk = &gpio1_clk},
	671	+ { .dev_id = "d8100000.gpio", .clk = &gpio2_clk},
672	672	};
673	673
674	674	void __init spear6xx_clk_init(void)

arch/arm/mach-spear6xx/spear600.c+0−25

@@ -1,25 +0,0 @@
1		−/*
2		− * arch/arm/mach-spear6xx/spear600.c
3		− *
4		− * SPEAr600 machine source file
5		− *
6		− * Copyright (C) 2009 ST Microelectronics
7		− * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8		− *
9		− * This file is licensed under the terms of the GNU General Public
10		− * License version 2. This program is licensed "as is" without any
11		− * warranty of any kind, whether express or implied.
12		− */
13		−
14		−#include <linux/ptrace.h>
15		−#include <asm/irq.h>
16		−#include <mach/generic.h>
17		−#include <mach/hardware.h>
18		−
19		−/* Add spear600 specific devices here */
20		−
21		−void __init spear600_init(void)
22		−{
23		− /* call spear6xx family common init function */
24		− spear6xx_init();
25		−}

arch/arm/mach-spear6xx/spear600_evb.c+0−54

@@ -1,54 +0,0 @@
1		−/*
2		− * arch/arm/mach-spear6xx/spear600_evb.c
3		− *
4		− * SPEAr600 evaluation board source file
5		− *
6		− * Copyright (C) 2009 ST Microelectronics
7		− * Viresh Kumar<viresh.kumar@st.com>
8		− *
9		− * This file is licensed under the terms of the GNU General Public
10		− * License version 2. This program is licensed "as is" without any
11		− * warranty of any kind, whether express or implied.
12		− */
13		−
14		−#include <asm/hardware/vic.h>
15		−#include <asm/mach/arch.h>
16		−#include <asm/mach-types.h>
17		−#include <mach/generic.h>
18		−#include <mach/hardware.h>
19		−
20		−static struct amba_device *amba_devs[] __initdata = {
21		− &gpio_device[0],
22		− &gpio_device[1],
23		− &gpio_device[2],
24		− &uart_device[0],
25		− &uart_device[1],
26		−};
27		−
28		−static struct platform_device *plat_devs[] __initdata = {
29		−};
30		−
31		−static void __init spear600_evb_init(void)
32		−{
33		− unsigned int i;
34		−
35		− /* call spear600 machine init function */
36		− spear600_init();
37		−
38		− /* Add Platform Devices */
39		− platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
40		−
41		− /* Add Amba Devices */
42		− for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
43		− amba_device_register(amba_devs[i], &iomem_resource);
44		−}
45		−
46		−MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
47		− .atag_offset = 0x100,
48		− .map_io = spear6xx_map_io,
49		− .init_irq = spear6xx_init_irq,
50		− .handle_irq = vic_handle_irq,
51		− .timer = &spear6xx_timer,
52		− .init_machine = spear600_evb_init,
53		− .restart = spear_restart,
54		−MACHINE_END

arch/arm/mach-spear6xx/spear6xx.c+36−96

@@ -6,111 +6,21 @@ · 5 unmodified lines
6	6	* Copyright (C) 2009 ST Microelectronics
7	7	* Rajeev Kumar<rajeev-dlh.kumar@st.com>
8	8	*
	9	+ * Copyright 2012 Stefan Roese <sr@denx.de>
	10	+ *
9	11	* This file is licensed under the terms of the GNU General Public
10	12	* License version 2. This program is licensed "as is" without any
11	13	* warranty of any kind, whether express or implied.
12	14	*/
13	15
14		−#include <linux/types.h>
15		−#include <linux/amba/pl061.h>
16		−#include <linux/ptrace.h>
17		−#include <linux/io.h>
	16	+#include <linux/of.h>
	17	+#include <linux/of_address.h>
	18	+#include <linux/of_irq.h>
	19	+#include <linux/of_platform.h>
18	20	#include <asm/hardware/vic.h>
19		−#include <asm/irq.h>
20	21	#include <asm/mach/arch.h>
21	22	#include <mach/generic.h>
22	23	#include <mach/hardware.h>
23		−#include <mach/irqs.h>
24		−
25		−/* Add spear6xx machines common devices here */
26		−/* uart device registration */
27		−struct amba_device uart_device[] = {
28		− {
29		− .dev = {
30		− .init_name = "uart0",
31		− },
32		− .res = {
33		− .start = SPEAR6XX_ICM1_UART0_BASE,
34		− .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
35		− .flags = IORESOURCE_MEM,
36		− },
37		− .irq = {IRQ_UART_0},
38		− }, {
39		− .dev = {
40		− .init_name = "uart1",
41		− },
42		− .res = {
43		− .start = SPEAR6XX_ICM1_UART1_BASE,
44		− .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
45		− .flags = IORESOURCE_MEM,
46		− },
47		− .irq = {IRQ_UART_1},
48		− }
49		−};
50		−
51		−/* gpio device registration */
52		−static struct pl061_platform_data gpio_plat_data[] = {
53		− {
54		− .gpio_base = 0,
55		− .irq_base = SPEAR_GPIO0_INT_BASE,
56		− }, {
57		− .gpio_base = 8,
58		− .irq_base = SPEAR_GPIO1_INT_BASE,
59		− }, {
60		− .gpio_base = 16,
61		− .irq_base = SPEAR_GPIO2_INT_BASE,
62		− },
63		−};
64		−
65		−struct amba_device gpio_device[] = {
66		− {
67		− .dev = {
68		− .init_name = "gpio0",
69		− .platform_data = &gpio_plat_data[0],
70		− },
71		− .res = {
72		− .start = SPEAR6XX_CPU_GPIO_BASE,
73		− .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
74		− .flags = IORESOURCE_MEM,
75		− },
76		− .irq = {IRQ_LOCAL_GPIO},
77		− }, {
78		− .dev = {
79		− .init_name = "gpio1",
80		− .platform_data = &gpio_plat_data[1],
81		− },
82		− .res = {
83		− .start = SPEAR6XX_ICM3_GPIO_BASE,
84		− .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
85		− .flags = IORESOURCE_MEM,
86		− },
87		− .irq = {IRQ_BASIC_GPIO},
88		− }, {
89		− .dev = {
90		− .init_name = "gpio2",
91		− .platform_data = &gpio_plat_data[2],
92		− },
93		− .res = {
94		− .start = SPEAR6XX_ICM2_GPIO_BASE,
95		− .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
96		− .flags = IORESOURCE_MEM,
97		− },
98		− .irq = {IRQ_APPL_GPIO},
99		− }
100		−};
101		−
102		−/* This will add devices, and do machine specific tasks */
103		−void __init spear6xx_init(void)
104		−{
105		− /* nothing to do for now */
106		−}
107		−
108		−/* This will initialize vic */
109		−void __init spear6xx_init_irq(void)
110		−{
111		− vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
112		− vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
113		−}
114	24
115	25	/* Following will create static virtual/physical mappings */
116	26	static struct map_desc spear6xx_io_desc[] __initdata = {
@@ -181,3 +91,33 @@ static void __init spear6xx_timer_init(void) · 64 unmodified lines
181	91	struct sys_timer spear6xx_timer = {
182	92	.init = spear6xx_timer_init,
183	93	};
	94	+
	95	+static void __init spear600_dt_init(void)
	96	+{
	97	+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
	98	+}
	99	+
	100	+static const char *spear600_dt_board_compat[] = {
	101	+ "st,spear600",
	102	+ NULL
	103	+};
	104	+
	105	+static const struct of_device_id vic_of_match[] __initconst = {
	106	+ { .compatible = "arm,pl190-vic", .data = vic_of_init, },
	107	+ { /* Sentinel */ }
	108	+};
	109	+
	110	+static void __init spear6xx_dt_init_irq(void)
	111	+{
	112	+ of_irq_init(vic_of_match);
	113	+}
	114	+
	115	+DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
	116	+ .map_io = spear6xx_map_io,
	117	+ .init_irq = spear6xx_dt_init_irq,
	118	+ .handle_irq = vic_handle_irq,
	119	+ .timer = &spear6xx_timer,
	120	+ .init_machine = spear600_dt_init,
	121	+ .restart = spear_restart,
	122	+ .dt_compat = spear600_dt_board_compat,
	123	+MACHINE_END

arch/arm/mach-ux500/Kconfig+6−0

@@ -58,6 +58,12 @@ config UX500_AUTO_PLATFORM · 57 unmodified lines
58	58	At least one platform needs to be selected in order to build
59	59	a working kernel. If everything else is disabled, this
60	60	automatically enables MACH_MOP500.
	61	+
	62	+config MACH_UX500_DT
	63	+ bool "Generic U8500 support using device tree"
	64	+ depends on MACH_MOP500
	65	+ select USE_OF
	66	+
61	67	endmenu
62	68
63	69	config UX500_DEBUG_UART

arch/arm/mach-ux500/Makefile.boot+1−0

@@ -2,3 +2,4 @@ · 1 unmodified line
2	2	params_phys-y := 0x00000100
3	3	initrd_phys-y := 0x00800000
4	4
	5	+dtb-$(CONFIG_MACH_SNOWBALL) += snowball.dtb

arch/arm/mach-ux500/board-mop500.c+97−2

@@ -30,6 +30,9 @@ · 29 unmodified lines
30	30	#include <linux/gpio_keys.h>
31	31	#include <linux/delay.h>
32	32
	33	+#include <linux/of.h>
	34	+#include <linux/of_platform.h>
	35	+
33	36	#include <linux/leds.h>
34	37	#include <asm/mach-types.h>
35	38	#include <asm/mach/arch.h>
@@ -440,7 +443,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { · 404 unmodified lines
440	443	};
441	444	#endif
442	445
443		−static struct pl022_ssp_controller ssp0_platform_data = {
	446	+static struct pl022_ssp_controller ssp0_plat = {
444	447	.bus_id = 0,
445	448	#ifdef CONFIG_STE_DMA40
446	449	.enable_dma = 1,
@@ -458,7 +461,7 @@ static struct pl022_ssp_controller ssp0_platform_data = { · 11 unmodified lines
458	461
459	462	static void __init mop500_spi_init(struct device *parent)
460	463	{
461		− db8500_add_ssp0(parent, &ssp0_platform_data);
	464	+ db8500_add_ssp0(parent, &ssp0_plat);
462	465	}
463	466
464	467	#ifdef CONFIG_STE_DMA40
@@ -618,6 +621,7 @@ static void __init mop500_init_machine(void) · 153 unmodified lines
618	621
619	622	mop500_pins_init();
620	623
	624	+ /* FIXME: parent of ab8500 should be prcmu */
621	625	for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
622	626	mop500_platform_devs[i]->dev.parent = parent;
623	627
@@ -738,3 +742,94 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") · 114 unmodified lines
738	742	.handle_irq = gic_handle_irq,
739	743	.init_machine = snowball_init_machine,
740	744	MACHINE_END
	745	+
	746	+#ifdef CONFIG_MACH_UX500_DT
	747	+
	748	+struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
	749	+ OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
	750	+ OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
	751	+ OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
	752	+ OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
	753	+ {},
	754	+};
	755	+
	756	+static const struct of_device_id u8500_soc_node[] = {
	757	+ /* only create devices below soc node */
	758	+ { .compatible = "stericsson,db8500", },
	759	+ { },
	760	+};
	761	+
	762	+static void __init u8500_init_machine(void)
	763	+{
	764	+ struct device *parent = NULL;
	765	+ int i2c0_devs;
	766	+ int i;
	767	+
	768	+ parent = u8500_init_devices();
	769	+ i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
	770	+
	771	+ for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
	772	+ mop500_platform_devs[i]->dev.parent = parent;
	773	+ for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
	774	+ snowball_platform_devs[i]->dev.parent = parent;
	775	+
	776	+ /* automatically probe child nodes of db8500 device */
	777	+ of_platform_populate(NULL, u8500_soc_node, u8500_auxdata_lookup, parent);
	778	+
	779	+ if (of_machine_is_compatible("st-ericsson,mop500")) {
	780	+ mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
	781	+ mop500_pins_init();
	782	+
	783	+ platform_add_devices(mop500_platform_devs,
	784	+ ARRAY_SIZE(mop500_platform_devs));
	785	+
	786	+ mop500_sdi_init(parent);
	787	+ } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
	788	+ snowball_pins_init();
	789	+ platform_add_devices(snowball_platform_devs,
	790	+ ARRAY_SIZE(snowball_platform_devs));
	791	+
	792	+ snowball_sdi_init(parent);
	793	+ } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
	794	+ /*
	795	+ * The HREFv60 board removed a GPIO expander and routed
	796	+ * all these GPIO pins to the internal GPIO controller
	797	+ * instead.
	798	+ */
	799	+ mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
	800	+ i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
	801	+ hrefv60_pins_init();
	802	+ platform_add_devices(mop500_platform_devs,
	803	+ ARRAY_SIZE(mop500_platform_devs));
	804	+
	805	+ hrefv60_sdi_init(parent);
	806	+ }
	807	+ mop500_i2c_init(parent);
	808	+
	809	+ i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
	810	+ i2c_register_board_info(2, mop500_i2c2_devices,
	811	+ ARRAY_SIZE(mop500_i2c2_devices));
	812	+
	813	+ /* This board has full regulator constraints */
	814	+ regulator_has_full_constraints();
	815	+}
	816	+
	817	+static const char * u8500_dt_board_compat[] = {
	818	+ "calaosystems,snowball-a9500",
	819	+ "st-ericsson,hrefv60+",
	820	+ "st-ericsson,u8500",
	821	+ "st-ericsson,mop500",
	822	+ NULL,
	823	+};
	824	+
	825	+
	826	+DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
	827	+ .map_io = u8500_map_io,
	828	+ .init_irq = ux500_init_irq,
	829	+ /* we re-use nomadik timer here */
	830	+ .timer = &ux500_timer,
	831	+ .handle_irq = gic_handle_irq,
	832	+ .init_machine = u8500_init_machine,
	833	+ .dt_compat = u8500_dt_board_compat,
	834	+MACHINE_END
	835	+#endif

arch/arm/mach-ux500/cache-l2x0.c+6−1

@@ -5,6 +5,8 @@ · 4 unmodified lines
5	5	*/
6	6
7	7	#include <linux/io.h>
	8	+#include <linux/of.h>
	9	+
8	10	#include <asm/cacheflush.h>
9	11	#include <asm/hardware/cache-l2x0.h>
10	12	#include <mach/hardware.h>
@@ -45,7 +47,10 @@ static int __init ux500_l2x0_init(void) · 34 unmodified lines
45	47	ux500_l2x0_unlock();
46	48
47	49	/* 64KB way size, 8 way associativity, force WA */
48		− l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
	50	+ if (of_have_populated_dt())
	51	+ l2x0_of_init(0x3e060000, 0xc0000fff);
	52	+ else
	53	+ l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
49	54
50	55	/*
51	56	* We can't disable l2 as we are in non secure mode, currently

arch/arm/mach-ux500/cpu.c+13−1

@@ -16,6 +16,8 @@ · 15 unmodified lines
16	16	#include <linux/err.h>
17	17	#include <linux/slab.h>
18	18	#include <linux/stat.h>
	19	+#include <linux/of.h>
	20	+#include <linux/of_irq.h>
19	21
20	22	#include <asm/hardware/gic.h>
21	23	#include <asm/mach/map.h>
@@ -28,6 +30,11 @@ · 6 unmodified lines
28	30
29	31	void __iomem *_PRCMU_BASE;
30	32
	33	+static const struct of_device_id ux500_dt_irq_match[] = {
	34	+ { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
	35	+ {},
	36	+};
	37	+
31	38	void __init ux500_init_irq(void)
32	39	{
33	40	void __iomem *dist_base;
@@ -42,7 +49,12 @@ void __init ux500_init_irq(void) · 8 unmodified lines
42	49	} else
43	50	ux500_unknown_soc();
44	51
45		− gic_init(0, 29, dist_base, cpu_base);
	52	+#ifdef CONFIG_OF
	53	+ if (of_have_populated_dt())
	54	+ of_irq_init(ux500_dt_irq_match);
	55	+ else
	56	+#endif
	57	+ gic_init(0, 29, dist_base, cpu_base);
46	58
47	59	/*
48	60	* Init clocks here so that they are available for system timer

arch/arm/mach-ux500/timer.c+8−3

@@ -7,6 +7,7 @@ · 6 unmodified lines
7	7	#include <linux/io.h>
8	8	#include <linux/errno.h>
9	9	#include <linux/clksrc-dbx500-prcmu.h>
	10	+#include <linux/of.h>
10	11
11	12	#include <asm/smp_twd.h>
12	13
@@ -30,9 +31,13 @@ static void __init ux500_twd_init(void) · 17 unmodified lines
30	31	twd_local_timer = cpu_is_u5500() ? &u5500_twd_local_timer :
31	32	&u8500_twd_local_timer;
32	33
33		− err = twd_local_timer_register(twd_local_timer);
34		− if (err)
35		− pr_err("twd_local_timer_register failed %d\n", err);
	34	+ if (of_have_populated_dt())
	35	+ twd_local_timer_of_register();
	36	+ else {
	37	+ err = twd_local_timer_register(twd_local_timer);
	38	+ if (err)
	39	+ pr_err("twd_local_timer_register failed %d\n", err);
	40	+ }
36	41	}
37	42	#else
38	43	#define ux500_twd_init() do { } while(0)

arch/arm/plat-orion/common.c+6−1

@@ -21,6 +21,7 @@ · 20 unmodified lines
21	21	#include <plat/orion_wdt.h>
22	22	#include <plat/mv_xor.h>
23	23	#include <plat/ehci-orion.h>
	24	+#include <mach/bridge-regs.h>
24	25
25	26	/* Fill in the resources structure and link it into the platform
26	27	device structure. There is always a memory region, and nearly
@@ -568,13 +569,17 @@ void __init orion_spi_1_init(unsigned long mapbase, · 541 unmodified lines
568	569	****************************************************************************/
569	570	static struct orion_wdt_platform_data orion_wdt_data;
570	571
	572	+static struct resource orion_wdt_resource =
	573	+ DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28);
	574	+
571	575	static struct platform_device orion_wdt_device = {
572	576	.name = "orion_wdt",
573	577	.id = -1,
574	578	.dev = {
575	579	.platform_data = &orion_wdt_data,
576	580	},
577		− .num_resources = 0,
	581	+ .resource = &orion_wdt_resource,
	582	+ .num_resources = 1,
578	583	};
579	584
580	585	void __init orion_wdt_init(unsigned long tclk)

arch/arm/plat-orion/include/plat/audio.h+0−1

@@ -2,7 +2,6 @@ · 1 unmodified line
2	2	#define __PLAT_AUDIO_H
3	3
4	4	struct kirkwood_asoc_platform_data {
5		− u32 tclk;
6	5	int burst;
7	6	};
8	7	#endif

arch/avr32/boards/atngw100/setup.c+1−0

@@ -97,6 +97,7 @@ static struct atmel_nand_data atngw100mkii_nand_data __initdata = { · 96 unmodified lines
97	97	.rdy_pin = GPIO_PIN_PB(28),
98	98	.enable_pin = GPIO_PIN_PE(23),
99	99	.bus_width_16 = true,
	100	+ .ecc_mode = NAND_ECC_SOFT,
100	101	.parts = nand_partitions,
101	102	.num_parts = ARRAY_SIZE(nand_partitions),
102	103	};

arch/avr32/boards/atstk1000/atstk1002.c+1−0

@@ -95,6 +95,7 @@ static struct atmel_nand_data atstk1006_nand_data __initdata = { · 94 unmodified lines
95	95	.ale = 22,
96	96	.rdy_pin = GPIO_PIN_PB(30),
97	97	.enable_pin = GPIO_PIN_PB(29),
	98	+ .ecc_mode = NAND_ECC_SOFT,
98	99	.parts = nand_partitions,
99	100	.num_parts = ARRAY_SIZE(num_partitions),
100	101	};

arch/avr32/mach-at32ap/include/mach/board.h+1−12

@@ -7,6 +7,7 @@ · 6 unmodified lines
7	7	#include <linux/types.h>
8	8	#include <linux/serial.h>
9	9	#include <linux/platform_data/macb.h>
	10	+#include <linux/platform_data/atmel_nand.h>
10	11
11	12	#define GPIO_PIN_NONE (-1)
12	13
@@ -116,18 +117,6 @@ struct platform_device * · 103 unmodified lines
116	117	at32_add_device_cf(unsigned int id, unsigned int extint,
117	118	struct cf_platform_data *data);
118	119
119		−/* NAND / SmartMedia */
120		−struct atmel_nand_data {
121		− int enable_pin; /* chip enable */
122		− int det_pin; /* card detect */
123		− int rdy_pin; /* ready/busy */
124		− u8 rdy_pin_active_low; /* rdy_pin value is inverted */
125		− u8 ale; /* address line number connected to ALE */
126		− u8 cle; /* address line number connected to CLE */
127		− u8 bus_width_16; /* buswidth is 16 bit */
128		− struct mtd_partition *parts;
129		− unsigned int num_parts;
130		−};
131	120	struct platform_device *
132	121	at32_add_device_nand(unsigned int id, struct atmel_nand_data *data);
133	122

drivers/i2c/busses/i2c-gpio.c+76−22

@@ -14,8 +14,15 @@ · 13 unmodified lines
14	14	#include <linux/module.h>
15	15	#include <linux/slab.h>
16	16	#include <linux/platform_device.h>
17		−
18		−#include <asm/gpio.h>
	17	+#include <linux/gpio.h>
	18	+#include <linux/of_gpio.h>
	19	+#include <linux/of_i2c.h>
	20	+
	21	+struct i2c_gpio_private_data {
	22	+ struct i2c_adapter adap;
	23	+ struct i2c_algo_bit_data bit_data;
	24	+ struct i2c_gpio_platform_data pdata;
	25	+};
19	26
20	27	/* Toggle SDA by changing the direction of the pin */
21	28	static void i2c_gpio_setsda_dir(void *data, int state)
@@ -78,24 +85,62 @@ static int i2c_gpio_getscl(void *data) · 56 unmodified lines
78	85	return gpio_get_value(pdata->scl_pin);
79	86	}
80	87
	88	+static int __devinit of_i2c_gpio_probe(struct device_node *np,
	89	+ struct i2c_gpio_platform_data *pdata)
	90	+{
	91	+ u32 reg;
	92	+
	93	+ if (of_gpio_count(np) < 2)
	94	+ return -ENODEV;
	95	+
	96	+ pdata->sda_pin = of_get_gpio(np, 0);
	97	+ pdata->scl_pin = of_get_gpio(np, 1);
	98	+
	99	+ if (!gpio_is_valid(pdata->sda_pin) \|\| !gpio_is_valid(pdata->scl_pin)) {
	100	+ pr_err("%s: invalid GPIO pins, sda=%d/scl=%d\n",
	101	+ np->full_name, pdata->sda_pin, pdata->scl_pin);
	102	+ return -ENODEV;
	103	+ }
	104	+
	105	+ of_property_read_u32(np, "i2c-gpio,delay-us", &pdata->udelay);
	106	+
	107	+ if (!of_property_read_u32(np, "i2c-gpio,timeout-ms", &reg))
	108	+ pdata->timeout = msecs_to_jiffies(reg);
	109	+
	110	+ pdata->sda_is_open_drain =
	111	+ of_property_read_bool(np, "i2c-gpio,sda-open-drain");
	112	+ pdata->scl_is_open_drain =
	113	+ of_property_read_bool(np, "i2c-gpio,scl-open-drain");
	114	+ pdata->scl_is_output_only =
	115	+ of_property_read_bool(np, "i2c-gpio,scl-output-only");
	116	+
	117	+ return 0;
	118	+}
	119	+
81	120	static int __devinit i2c_gpio_probe(struct platform_device *pdev)
82	121	{
	122	+ struct i2c_gpio_private_data *priv;
83	123	struct i2c_gpio_platform_data *pdata;
84	124	struct i2c_algo_bit_data *bit_data;
85	125	struct i2c_adapter *adap;
86	126	int ret;
87	127
88		− pdata = pdev->dev.platform_data;
89		− if (!pdata)
90		− return -ENXIO;
91		−
92		− ret = -ENOMEM;
93		− adap = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
94		− if (!adap)
95		− goto err_alloc_adap;
96		− bit_data = kzalloc(sizeof(struct i2c_algo_bit_data), GFP_KERNEL);
97		− if (!bit_data)
98		− goto err_alloc_bit_data;
	128	+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
	129	+ if (!priv)
	130	+ return -ENOMEM;
	131	+ adap = &priv->adap;
	132	+ bit_data = &priv->bit_data;
	133	+ pdata = &priv->pdata;
	134	+
	135	+ if (pdev->dev.of_node) {
	136	+ ret = of_i2c_gpio_probe(pdev->dev.of_node, pdata);
	137	+ if (ret)
	138	+ return ret;
	139	+ } else {
	140	+ if (!pdev->dev.platform_data)
	141	+ return -ENXIO;
	142	+ memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata));
	143	+ }
99	144
100	145	ret = gpio_request(pdata->sda_pin, "sda");
101	146	if (ret)
@@ -143,6 +188,7 @@ static int __devinit i2c_gpio_probe(struct platform_device *pdev) · 41 unmodified lines
143	188	adap->algo_data = bit_data;
144	189	adap->class = I2C_CLASS_HWMON \| I2C_CLASS_SPD;
145	190	adap->dev.parent = &pdev->dev;
	191	+ adap->dev.of_node = pdev->dev.of_node;
146	192
147	193	/*
148	194	* If "dev->id" is negative we consider it as zero.
@@ -154,7 +200,9 @@ static int __devinit i2c_gpio_probe(struct platform_device *pdev) · 5 unmodified lines
154	200	if (ret)
155	201	goto err_add_bus;
156	202
157		− platform_set_drvdata(pdev, adap);
	203	+ of_i2c_register_devices(adap);
	204	+
	205	+ platform_set_drvdata(pdev, priv);
158	206
159	207	dev_info(&pdev->dev, "using pins %u (SDA) and %u (SCL%s)\n",
160	208	pdata->sda_pin, pdata->scl_pin,
@@ -168,34 +216,40 @@ err_add_bus: · 7 unmodified lines
168	216	err_request_scl:
169	217	gpio_free(pdata->sda_pin);
170	218	err_request_sda:
171		− kfree(bit_data);
172		−err_alloc_bit_data:
173		− kfree(adap);
174		−err_alloc_adap:
175	219	return ret;
176	220	}
177	221
178	222	static int __devexit i2c_gpio_remove(struct platform_device *pdev)
179	223	{
	224	+ struct i2c_gpio_private_data *priv;
180	225	struct i2c_gpio_platform_data *pdata;
181	226	struct i2c_adapter *adap;
182	227
183		− adap = platform_get_drvdata(pdev);
184		− pdata = pdev->dev.platform_data;
	228	+ priv = platform_get_drvdata(pdev);
	229	+ adap = &priv->adap;
	230	+ pdata = &priv->pdata;
185	231
186	232	i2c_del_adapter(adap);
187	233	gpio_free(pdata->scl_pin);
188	234	gpio_free(pdata->sda_pin);
189		− kfree(adap->algo_data);
190		− kfree(adap);
191	235
192	236	return 0;
193	237	}
194	238
	239	+#if defined(CONFIG_OF)
	240	+static const struct of_device_id i2c_gpio_dt_ids[] = {
	241	+ { .compatible = "i2c-gpio", },
	242	+ { /* sentinel */ }
	243	+};
	244	+
	245	+MODULE_DEVICE_TABLE(of, i2c_gpio_dt_ids);
	246	+#endif
	247	+
195	248	static struct platform_driver i2c_gpio_driver = {
196	249	.driver = {
197	250	.name = "i2c-gpio",
198	251	.owner = THIS_MODULE,
	252	+ .of_match_table = of_match_ptr(i2c_gpio_dt_ids),
199	253	},
200	254	.probe = i2c_gpio_probe,
201	255	.remove = __devexit_p(i2c_gpio_remove),

drivers/mtd/nand/atmel_nand.c+98−38

@@ -27,6 +27,10 @@ · 26 unmodified lines
27	27	#include <linux/module.h>
28	28	#include <linux/moduleparam.h>
29	29	#include <linux/platform_device.h>
	30	+#include <linux/of.h>
	31	+#include <linux/of_device.h>
	32	+#include <linux/of_gpio.h>
	33	+#include <linux/of_mtd.h>
30	34	#include <linux/mtd/mtd.h>
31	35	#include <linux/mtd/nand.h>
32	36	#include <linux/mtd/partitions.h>
@@ -34,22 +38,10 @@ · 1 unmodified line
34	38	#include <linux/dmaengine.h>
35	39	#include <linux/gpio.h>
36	40	#include <linux/io.h>
	41	+#include <linux/platform_data/atmel.h>
37	42
38		−#include <mach/board.h>
39	43	#include <mach/cpu.h>
40	44
41		−#ifdef CONFIG_MTD_NAND_ATMEL_ECC_HW
42		−#define hard_ecc 1
43		−#else
44		−#define hard_ecc 0
45		−#endif
46		−
47		−#ifdef CONFIG_MTD_NAND_ATMEL_ECC_NONE
48		−#define no_ecc 1
49		−#else
50		−#define no_ecc 0
51		−#endif
52		−
53	45	static int use_dma = 1;
54	46	module_param(use_dma, int, 0);
55	47
@@ -95,7 +87,7 @@ struct atmel_nand_host { · 39 unmodified lines
95	87	struct mtd_info mtd;
96	88	void __iomem *io_base;
97	89	dma_addr_t io_phys;
98		− struct atmel_nand_data *board;
	90	+ struct atmel_nand_data board;
99	91	struct device *dev;
100	92	void __iomem *ecc;
101	93
@@ -113,8 +105,8 @@ static int cpu_has_dma(void) · 11 unmodified lines
113	105	*/
114	106	static void atmel_nand_enable(struct atmel_nand_host *host)
115	107	{
116		− if (gpio_is_valid(host->board->enable_pin))
117		− gpio_set_value(host->board->enable_pin, 0);
	108	+ if (gpio_is_valid(host->board.enable_pin))
	109	+ gpio_set_value(host->board.enable_pin, 0);
118	110	}
119	111
120	112	/*
@@ -122,8 +114,8 @@ static void atmel_nand_enable(struct atmel_nand_host *host) · 1 unmodified line
122	114	*/
123	115	static void atmel_nand_disable(struct atmel_nand_host *host)
124	116	{
125		− if (gpio_is_valid(host->board->enable_pin))
126		− gpio_set_value(host->board->enable_pin, 1);
	117	+ if (gpio_is_valid(host->board.enable_pin))
	118	+ gpio_set_value(host->board.enable_pin, 1);
127	119	}
128	120
129	121	/*
@@ -144,9 +136,9 @@ static void atmel_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl · 14 unmodified lines
144	136	return;
145	137
146	138	if (ctrl & NAND_CLE)
147		− writeb(cmd, host->io_base + (1 << host->board->cle));
	139	+ writeb(cmd, host->io_base + (1 << host->board.cle));
148	140	else
149		− writeb(cmd, host->io_base + (1 << host->board->ale));
	141	+ writeb(cmd, host->io_base + (1 << host->board.ale));
150	142	}
151	143
152	144	/*
@@ -157,8 +149,8 @@ static int atmel_nand_device_ready(struct mtd_info *mtd) · 4 unmodified lines
157	149	struct nand_chip *nand_chip = mtd->priv;
158	150	struct atmel_nand_host *host = nand_chip->priv;
159	151
160		− return gpio_get_value(host->board->rdy_pin) ^
161		− !!host->board->rdy_pin_active_low;
	152	+ return gpio_get_value(host->board.rdy_pin) ^
	153	+ !!host->board.rdy_pin_active_low;
162	154	}
163	155
164	156	/*
@@ -273,7 +265,7 @@ static void atmel_read_buf(struct mtd_info mtd, u8 buf, int len) · 108 unmodified lines
273	265	if (atmel_nand_dma_op(mtd, buf, len, 1) == 0)
274	266	return;
275	267
276		− if (host->board->bus_width_16)
	268	+ if (host->board.bus_width_16)
277	269	atmel_read_buf16(mtd, buf, len);
278	270	else
279	271	atmel_read_buf8(mtd, buf, len);
@@ -289,7 +281,7 @@ static void atmel_write_buf(struct mtd_info mtd, const u8 buf, int len) · 9 unmodified lines
289	281	if (atmel_nand_dma_op(mtd, (void *)buf, len, 0) == 0)
290	282	return;
291	283
292		− if (host->board->bus_width_16)
	284	+ if (host->board.bus_width_16)
293	285	atmel_write_buf16(mtd, buf, len);
294	286	else
295	287	atmel_write_buf8(mtd, buf, len);
@@ -481,6 +473,56 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) · 185 unmodified lines
481	473	}
482	474	}
483	475
	476	+#if defined(CONFIG_OF)
	477	+static int __devinit atmel_of_init_port(struct atmel_nand_host *host,
	478	+ struct device_node *np)
	479	+{
	480	+ u32 val;
	481	+ int ecc_mode;
	482	+ struct atmel_nand_data *board = &host->board;
	483	+ enum of_gpio_flags flags;
	484	+
	485	+ if (of_property_read_u32(np, "atmel,nand-addr-offset", &val) == 0) {
	486	+ if (val >= 32) {
	487	+ dev_err(host->dev, "invalid addr-offset %u\n", val);
	488	+ return -EINVAL;
	489	+ }
	490	+ board->ale = val;
	491	+ }
	492	+
	493	+ if (of_property_read_u32(np, "atmel,nand-cmd-offset", &val) == 0) {
	494	+ if (val >= 32) {
	495	+ dev_err(host->dev, "invalid cmd-offset %u\n", val);
	496	+ return -EINVAL;
	497	+ }
	498	+ board->cle = val;
	499	+ }
	500	+
	501	+ ecc_mode = of_get_nand_ecc_mode(np);
	502	+
	503	+ board->ecc_mode = ecc_mode < 0 ? NAND_ECC_SOFT : ecc_mode;
	504	+
	505	+ board->on_flash_bbt = of_get_nand_on_flash_bbt(np);
	506	+
	507	+ if (of_get_nand_bus_width(np) == 16)
	508	+ board->bus_width_16 = 1;
	509	+
	510	+ board->rdy_pin = of_get_gpio_flags(np, 0, &flags);
	511	+ board->rdy_pin_active_low = (flags == OF_GPIO_ACTIVE_LOW);
	512	+
	513	+ board->enable_pin = of_get_gpio(np, 1);
	514	+ board->det_pin = of_get_gpio(np, 2);
	515	+
	516	+ return 0;
	517	+}
	518	+#else
	519	+static int __devinit atmel_of_init_port(struct atmel_nand_host *host,
	520	+ struct device_node *np)
	521	+{
	522	+ return -EINVAL;
	523	+}
	524	+#endif
	525	+
484	526	/*
485	527	* Probe for the NAND device.
486	528	*/
@@ -491,6 +533,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) · 4 unmodified lines
491	533	struct nand_chip *nand_chip;
492	534	struct resource *regs;
493	535	struct resource *mem;
	536	+ struct mtd_part_parser_data ppdata = {};
494	537	int res;
495	538
496	539	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -517,8 +560,15 @@ static int __init atmel_nand_probe(struct platform_device *pdev) · 20 unmodified lines
517	560
518	561	mtd = &host->mtd;
519	562	nand_chip = &host->nand_chip;
520		− host->board = pdev->dev.platform_data;
521	563	host->dev = &pdev->dev;
	564	+ if (pdev->dev.of_node) {
	565	+ res = atmel_of_init_port(host, pdev->dev.of_node);
	566	+ if (res)
	567	+ goto err_nand_ioremap;
	568	+ } else {
	569	+ memcpy(&host->board, pdev->dev.platform_data,
	570	+ sizeof(struct atmel_nand_data));
	571	+ }
522	572
523	573	nand_chip->priv = host; /* link the private data structures */
524	574	mtd->priv = nand_chip;
@@ -529,26 +579,25 @@ static int __init atmel_nand_probe(struct platform_device *pdev) · 4 unmodified lines
529	579	nand_chip->IO_ADDR_W = host->io_base;
530	580	nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
531	581
532		− if (gpio_is_valid(host->board->rdy_pin))
	582	+ if (gpio_is_valid(host->board.rdy_pin))
533	583	nand_chip->dev_ready = atmel_nand_device_ready;
534	584
	585	+ nand_chip->ecc.mode = host->board.ecc_mode;
	586	+
535	587	regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
536		− if (!regs && hard_ecc) {
	588	+ if (!regs && nand_chip->ecc.mode == NAND_ECC_HW) {
537	589	printk(KERN_ERR "atmel_nand: can't get I/O resource "
538	590	"regs\nFalling back on software ECC\n");
	591	+ nand_chip->ecc.mode = NAND_ECC_SOFT;
539	592	}
540	593
541		− nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
542		− if (no_ecc)
543		− nand_chip->ecc.mode = NAND_ECC_NONE;
544		− if (hard_ecc && regs) {
	594	+ if (nand_chip->ecc.mode == NAND_ECC_HW) {
545	595	host->ecc = ioremap(regs->start, resource_size(regs));
546	596	if (host->ecc == NULL) {
547	597	printk(KERN_ERR "atmel_nand: ioremap failed\n");
548	598	res = -EIO;
549	599	goto err_ecc_ioremap;
550	600	}
551		− nand_chip->ecc.mode = NAND_ECC_HW;
552	601	nand_chip->ecc.calculate = atmel_nand_calculate;
553	602	nand_chip->ecc.correct = atmel_nand_correct;
554	603	nand_chip->ecc.hwctl = atmel_nand_hwctl;
@@ -558,7 +607,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev) · 3 unmodified lines
558	607
559	608	nand_chip->chip_delay = 20; /* 20us command delay time */
560	609
561		− if (host->board->bus_width_16) /* 16-bit bus width */
	610	+ if (host->board.bus_width_16) /* 16-bit bus width */
562	611	nand_chip->options \|= NAND_BUSWIDTH_16;
563	612
564	613	nand_chip->read_buf = atmel_read_buf;
@@ -567,15 +616,15 @@ static int __init atmel_nand_probe(struct platform_device *pdev) · 2 unmodified lines
567	616	platform_set_drvdata(pdev, host);
568	617	atmel_nand_enable(host);
569	618
570		− if (gpio_is_valid(host->board->det_pin)) {
571		− if (gpio_get_value(host->board->det_pin)) {
	619	+ if (gpio_is_valid(host->board.det_pin)) {
	620	+ if (gpio_get_value(host->board.det_pin)) {
572	621	printk(KERN_INFO "No SmartMedia card inserted.\n");
573	622	res = -ENXIO;
574	623	goto err_no_card;
575	624	}
576	625	}
577	626
578		− if (on_flash_bbt) {
	627	+ if (host->board.on_flash_bbt \|\| on_flash_bbt) {
579	628	printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
580	629	nand_chip->bbt_options \|= NAND_BBT_USE_FLASH;
581	630	}
@@ -650,8 +699,9 @@ static int __init atmel_nand_probe(struct platform_device *pdev) · 68 unmodified lines
650	699	}
651	700
652	701	mtd->name = "atmel_nand";
653		− res = mtd_device_parse_register(mtd, NULL, 0,
654		− host->board->parts, host->board->num_parts);
	702	+ ppdata.of_node = pdev->dev.of_node;
	703	+ res = mtd_device_parse_register(mtd, NULL, &ppdata,
	704	+ host->board.parts, host->board.num_parts);
655	705	if (!res)
656	706	return res;
657	707
@@ -695,11 +745,21 @@ static int __exit atmel_nand_remove(struct platform_device *pdev) · 37 unmodified lines
695	745	return 0;
696	746	}
697	747
	748	+#if defined(CONFIG_OF)
	749	+static const struct of_device_id atmel_nand_dt_ids[] = {
	750	+ { .compatible = "atmel,at91rm9200-nand" },
	751	+ { /* sentinel */ }
	752	+};
	753	+
	754	+MODULE_DEVICE_TABLE(of, atmel_nand_dt_ids);
	755	+#endif
	756	+
698	757	static struct platform_driver atmel_nand_driver = {
699	758	.remove = __exit_p(atmel_nand_remove),
700	759	.driver = {
701	760	.name = "atmel_nand",
702	761	.owner = THIS_MODULE,
	762	+ .of_match_table = of_match_ptr(atmel_nand_dt_ids),
703	763	},
704	764	};
705	765

drivers/of/Kconfig+4−0

@@ -91,4 +91,8 @@ config OF_PCI_IRQ · 90 unmodified lines
91	91	help
92	92	OpenFirmware PCI IRQ routing helpers
93	93
	94	+config OF_MTD
	95	+ depends on MTD
	96	+ def_bool y
	97	+
94	98	endmenu # OF

drivers/of/Makefile+1−0

@@ -12,3 +12,4 @@ obj-$(CONFIG_OF_SELFTEST) += selftest.o · 11 unmodified lines
12	12	obj-$(CONFIG_OF_MDIO) += of_mdio.o
13	13	obj-$(CONFIG_OF_PCI) += of_pci.o
14	14	obj-$(CONFIG_OF_PCI_IRQ) += of_pci_irq.o
	15	+obj-$(CONFIG_OF_MTD) += of_mtd.o

drivers/of/of_mtd.c+85−0

@@ -0,0 +1,85 @@
	1	+/*
	2	+ * Copyright 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
	3	+ *
	4	+ * OF helpers for mtd.
	5	+ *
	6	+ * This file is released under the GPLv2
	7	+ *
	8	+ */
	9	+#include <linux/kernel.h>
	10	+#include <linux/of_mtd.h>
	11	+#include <linux/mtd/nand.h>
	12	+#include <linux/export.h>
	13	+
	14	+/**
	15	+ * It maps 'enum nand_ecc_modes_t' found in include/linux/mtd/nand.h
	16	+ * into the device tree binding of 'nand-ecc', so that MTD
	17	+ * device driver can get nand ecc from device tree.
	18	+ */
	19	+static const char *nand_ecc_modes[] = {
	20	+ [NAND_ECC_NONE] = "none",
	21	+ [NAND_ECC_SOFT] = "soft",
	22	+ [NAND_ECC_HW] = "hw",
	23	+ [NAND_ECC_HW_SYNDROME] = "hw_syndrome",
	24	+ [NAND_ECC_HW_OOB_FIRST] = "hw_oob_first",
	25	+ [NAND_ECC_SOFT_BCH] = "soft_bch",
	26	+};
	27	+
	28	+/**
	29	+ * of_get_nand_ecc_mode - Get nand ecc mode for given device_node
	30	+ * @np: Pointer to the given device_node
	31	+ *
	32	+ * The function gets ecc mode string from property 'nand-ecc-mode',
	33	+ * and return its index in nand_ecc_modes table, or errno in error case.
	34	+ */
	35	+const int of_get_nand_ecc_mode(struct device_node *np)
	36	+{
	37	+ const char *pm;
	38	+ int err, i;
	39	+
	40	+ err = of_property_read_string(np, "nand-ecc-mode", &pm);
	41	+ if (err < 0)
	42	+ return err;
	43	+
	44	+ for (i = 0; i < ARRAY_SIZE(nand_ecc_modes); i++)
	45	+ if (!strcasecmp(pm, nand_ecc_modes[i]))
	46	+ return i;
	47	+
	48	+ return -ENODEV;
	49	+}
	50	+EXPORT_SYMBOL_GPL(of_get_nand_ecc_mode);
	51	+
	52	+/**
	53	+ * of_get_nand_bus_width - Get nand bus witdh for given device_node
	54	+ * @np: Pointer to the given device_node
	55	+ *
	56	+ * return bus width option, or errno in error case.
	57	+ */
	58	+int of_get_nand_bus_width(struct device_node *np)
	59	+{
	60	+ u32 val;
	61	+
	62	+ if (of_property_read_u32(np, "nand-bus-width", &val))
	63	+ return 8;
	64	+
	65	+ switch(val) {
	66	+ case 8:
	67	+ case 16:
	68	+ return val;
	69	+ default:
	70	+ return -EIO;
	71	+ }
	72	+}
	73	+EXPORT_SYMBOL_GPL(of_get_nand_bus_width);
	74	+
	75	+/**
	76	+ * of_get_nand_on_flash_bbt - Get nand on flash bbt for given device_node
	77	+ * @np: Pointer to the given device_node
	78	+ *
	79	+ * return true if present false other wise
	80	+ */
	81	+bool of_get_nand_on_flash_bbt(struct device_node *np)
	82	+{
	83	+ return of_property_read_bool(np, "nand-on-flash-bbt");
	84	+}
	85	+EXPORT_SYMBOL_GPL(of_get_nand_on_flash_bbt);

drivers/rtc/rtc-mv.c+9−0

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	12	#include <linux/bcd.h>
13	13	#include <linux/io.h>
14	14	#include <linux/platform_device.h>
	15	+#include <linux/of.h>
15	16	#include <linux/delay.h>
16	17	#include <linux/gfp.h>
17	18	#include <linux/module.h>
@@ -294,11 +295,19 @@ static int __exit mv_rtc_remove(struct platform_device *pdev) · 276 unmodified lines
294	295	return 0;
295	296	}
296	297
	298	+#ifdef CONFIG_OF
	299	+static struct of_device_id rtc_mv_of_match_table[] = {
	300	+ { .compatible = "mrvl,orion-rtc", },
	301	+ {}
	302	+};
	303	+#endif
	304	+
297	305	static struct platform_driver mv_rtc_driver = {
298	306	.remove = __exit_p(mv_rtc_remove),
299	307	.driver = {
300	308	.name = "rtc-mv",
301	309	.owner = THIS_MODULE,
	310	+ .of_match_table = of_match_ptr(rtc_mv_of_match_table),
302	311	},
303	312	};
304	313

drivers/spi/spi-orion.c+0−5

@@ -359,11 +359,6 @@ static int orion_spi_setup(struct spi_device *spi) · 358 unmodified lines
359	359
360	360	orion_spi = spi_master_get_devdata(spi->master);
361	361
362		− /* Fix ac timing if required. */
363		− if (orion_spi->spi_info->enable_clock_fix)
364		− orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG,
365		− (1 << 14));
366		−
367	362	if ((spi->max_speed_hz == 0)
368	363	\|\| (spi->max_speed_hz > orion_spi->max_speed))
369	364	spi->max_speed_hz = orion_spi->max_speed;

drivers/staging/ste_rmi4/Makefile+1−1

@@ -2,4 +2,4 @@ · 1 unmodified line
2	2	# Makefile for the RMI4 touchscreen driver.
3	3	#
4	4	obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4) += synaptics_i2c_rmi4.o
5		−obj-$(CONFIG_MACH_U8500) += board-mop500-u8500uib-rmi4.o
	5	+obj-$(CONFIG_MACH_MOP500) += board-mop500-u8500uib-rmi4.o

drivers/usb/Kconfig+1−1

@@ -44,7 +44,7 @@ config USB_ARCH_HAS_EHCI · 43 unmodified lines
44	44	default y if PPC_MPC512x
45	45	default y if ARCH_IXP4XX
46	46	default y if ARCH_W90X900
47		− default y if ARCH_AT91SAM9G45
	47	+ default y if ARCH_AT91
48	48	default y if ARCH_MXC
49	49	default y if ARCH_OMAP3
50	50	default y if ARCH_CNS3XXX

drivers/usb/gadget/Kconfig+1−1

@@ -137,7 +137,7 @@ choice · 136 unmodified lines
137	137
138	138	config USB_AT91
139	139	tristate "Atmel AT91 USB Device Port"
140		− depends on ARCH_AT91 && !ARCH_AT91SAM9RL && !ARCH_AT91SAM9G45
	140	+ depends on ARCH_AT91
141	141	help
142	142	Many Atmel AT91 processors (such as the AT91RM2000) have a
143	143	full speed USB Device Port with support for five configurable

drivers/usb/gadget/at91_udc.c+38−2

@@ -29,6 +29,8 @@ · 28 unmodified lines
29	29	#include <linux/clk.h>
30	30	#include <linux/usb/ch9.h>
31	31	#include <linux/usb/gadget.h>
	32	+#include <linux/of.h>
	33	+#include <linux/of_gpio.h>
32	34
33	35	#include <asm/byteorder.h>
34	36	#include <mach/hardware.h>
@@ -1707,7 +1709,27 @@ static void at91udc_shutdown(struct platform_device *dev) · 1672 unmodified lines
1707	1709	spin_unlock_irqrestore(&udc->lock, flags);
1708	1710	}
1709	1711
1710		−static int __init at91udc_probe(struct platform_device *pdev)
	1712	+static void __devinit at91udc_of_init(struct at91_udc *udc,
	1713	+ struct device_node *np)
	1714	+{
	1715	+ struct at91_udc_data *board = &udc->board;
	1716	+ u32 val;
	1717	+ enum of_gpio_flags flags;
	1718	+
	1719	+ if (of_property_read_u32(np, "atmel,vbus-polled", &val) == 0)
	1720	+ board->vbus_polled = 1;
	1721	+
	1722	+ board->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
	1723	+ &flags);
	1724	+ board->vbus_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
	1725	+
	1726	+ board->pullup_pin = of_get_named_gpio_flags(np, "atmel,pullup-gpio", 0,
	1727	+ &flags);
	1728	+
	1729	+ board->pullup_active_low = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
	1730	+}
	1731	+
	1732	+static int __devinit at91udc_probe(struct platform_device *pdev)
1711	1733	{
1712	1734	struct device *dev = &pdev->dev;
1713	1735	struct at91_udc *udc;
@@ -1742,7 +1764,11 @@ static int __init at91udc_probe(struct platform_device *pdev) · 28 unmodified lines
1742	1764	/* init software state */
1743	1765	udc = &controller;
1744	1766	udc->gadget.dev.parent = dev;
1745		− udc->board = (struct at91_udc_data ) dev->platform_data;
	1767	+ if (pdev->dev.of_node)
	1768	+ at91udc_of_init(udc, pdev->dev.of_node);
	1769	+ else
	1770	+ memcpy(&udc->board, dev->platform_data,
	1771	+ sizeof(struct at91_udc_data));
1746	1772	udc->pdev = pdev;
1747	1773	udc->enabled = 0;
1748	1774	spin_lock_init(&udc->lock);
@@ -1971,6 +1997,15 @@ static int at91udc_resume(struct platform_device *pdev) · 222 unmodified lines
1971	1997	#define at91udc_resume NULL
1972	1998	#endif
1973	1999
	2000	+#if defined(CONFIG_OF)
	2001	+static const struct of_device_id at91_udc_dt_ids[] = {
	2002	+ { .compatible = "atmel,at91rm9200-udc" },
	2003	+ { /* sentinel */ }
	2004	+};
	2005	+
	2006	+MODULE_DEVICE_TABLE(of, at91_udc_dt_ids);
	2007	+#endif
	2008	+
1974	2009	static struct platform_driver at91_udc_driver = {
1975	2010	.remove = __exit_p(at91udc_remove),
1976	2011	.shutdown = at91udc_shutdown,
@@ -1979,6 +2014,7 @@ static struct platform_driver at91_udc_driver = { · 2 unmodified lines
1979	2014	.driver = {
1980	2015	.name = (char *) driver_name,
1981	2016	.owner = THIS_MODULE,
	2017	+ .of_match_table = of_match_ptr(at91_udc_dt_ids),
1982	2018	},
1983	2019	};
1984	2020

drivers/usb/host/ehci-atmel.c+23−1

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	13
14	14	#include <linux/clk.h>
15	15	#include <linux/platform_device.h>
	16	+#include <linux/of_platform.h>
16	17
17	18	/* interface and function clocks */
18	19	static struct clk iclk, fclk;
@@ -115,6 +116,8 @@ static const struct hc_driver ehci_atmel_hc_driver = { · 96 unmodified lines
115	116	.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
116	117	};
117	118
	119	+static u64 at91_ehci_dma_mask = DMA_BIT_MASK(32);
	120	+
118	121	static int __devinit ehci_atmel_drv_probe(struct platform_device *pdev)
119	122	{
120	123	struct usb_hcd *hcd;
@@ -137,6 +140,13 @@ static int __devinit ehci_atmel_drv_probe(struct platform_device *pdev) · 16 unmodified lines
137	140	goto fail_create_hcd;
138	141	}
139	142
	143	+ /* Right now device-tree probed devices don't get dma_mask set.
	144	+ * Since shared usb code relies on it, set it here for now.
	145	+ * Once we have dma capability bindings this can go away.
	146	+ */
	147	+ if (!pdev->dev.dma_mask)
	148	+ pdev->dev.dma_mask = &at91_ehci_dma_mask;
	149	+
140	150	hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
141	151	if (!hcd) {
142	152	retval = -ENOMEM;
@@ -225,9 +235,21 @@ static int __devexit ehci_atmel_drv_remove(struct platform_device *pdev) · 82 unmodified lines
225	235	return 0;
226	236	}
227	237
	238	+#ifdef CONFIG_OF
	239	+static const struct of_device_id atmel_ehci_dt_ids[] = {
	240	+ { .compatible = "atmel,at91sam9g45-ehci" },
	241	+ { /* sentinel */ }
	242	+};
	243	+
	244	+MODULE_DEVICE_TABLE(of, atmel_ehci_dt_ids);
	245	+#endif
	246	+
228	247	static struct platform_driver ehci_atmel_driver = {
229	248	.probe = ehci_atmel_drv_probe,
230	249	.remove = __devexit_p(ehci_atmel_drv_remove),
231	250	.shutdown = usb_hcd_platform_shutdown,
232		− .driver.name = "atmel-ehci",
	251	+ .driver = {
	252	+ .name = "atmel-ehci",
	253	+ .of_match_table = of_match_ptr(atmel_ehci_dt_ids),
	254	+ },
233	255	};

drivers/usb/host/ohci-at91.c+100−1

@@ -14,6 +14,8 @@ · 13 unmodified lines
14	14
15	15	#include <linux/clk.h>
16	16	#include <linux/platform_device.h>
	17	+#include <linux/of_platform.h>
	18	+#include <linux/of_gpio.h>
17	19
18	20	#include <mach/hardware.h>
19	21	#include <asm/gpio.h>
@@ -477,13 +479,109 @@ static irqreturn_t ohci_hcd_at91_overcurrent_irq(int irq, void *data) · 457 unmodified lines
477	479	return IRQ_HANDLED;
478	480	}
479	481
	482	+#ifdef CONFIG_OF
	483	+static const struct of_device_id at91_ohci_dt_ids[] = {
	484	+ { .compatible = "atmel,at91rm9200-ohci" },
	485	+ { /* sentinel */ }
	486	+};
	487	+
	488	+MODULE_DEVICE_TABLE(of, at91_ohci_dt_ids);
	489	+
	490	+static u64 at91_ohci_dma_mask = DMA_BIT_MASK(32);
	491	+
	492	+static int __devinit ohci_at91_of_init(struct platform_device *pdev)
	493	+{
	494	+ struct device_node *np = pdev->dev.of_node;
	495	+ int i, ret, gpio;
	496	+ enum of_gpio_flags flags;
	497	+ struct at91_usbh_data *pdata;
	498	+ u32 ports;
	499	+
	500	+ if (!np)
	501	+ return 0;
	502	+
	503	+ /* Right now device-tree probed devices don't get dma_mask set.
	504	+ * Since shared usb code relies on it, set it here for now.
	505	+ * Once we have dma capability bindings this can go away.
	506	+ */
	507	+ if (!pdev->dev.dma_mask)
	508	+ pdev->dev.dma_mask = &at91_ohci_dma_mask;
	509	+
	510	+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
	511	+ if (!pdata)
	512	+ return -ENOMEM;
	513	+
	514	+ if (!of_property_read_u32(np, "num-ports", &ports))
	515	+ pdata->ports = ports;
	516	+
	517	+ for (i = 0; i < 2; i++) {
	518	+ gpio = of_get_named_gpio_flags(np, "atmel,vbus-gpio", i, &flags);
	519	+ pdata->vbus_pin[i] = gpio;
	520	+ if (!gpio_is_valid(gpio))
	521	+ continue;
	522	+ pdata->vbus_pin_active_low[i] = flags & OF_GPIO_ACTIVE_LOW;
	523	+ ret = gpio_request(gpio, "ohci_vbus");
	524	+ if (ret) {
	525	+ dev_warn(&pdev->dev, "can't request vbus gpio %d", gpio);
	526	+ continue;
	527	+ }
	528	+ ret = gpio_direction_output(gpio, !(flags & OF_GPIO_ACTIVE_LOW) ^ 1);
	529	+ if (ret)
	530	+ dev_warn(&pdev->dev, "can't put vbus gpio %d as output %d",
	531	+ !(flags & OF_GPIO_ACTIVE_LOW) ^ 1, gpio);
	532	+ }
	533	+
	534	+ for (i = 0; i < 2; i++) {
	535	+ gpio = of_get_named_gpio_flags(np, "atmel,oc-gpio", i, &flags);
	536	+ pdata->overcurrent_pin[i] = gpio;
	537	+ if (!gpio_is_valid(gpio))
	538	+ continue;
	539	+ ret = gpio_request(gpio, "ohci_overcurrent");
	540	+ if (ret) {
	541	+ dev_err(&pdev->dev, "can't request overcurrent gpio %d", gpio);
	542	+ continue;
	543	+ }
	544	+
	545	+ ret = gpio_direction_input(gpio);
	546	+ if (ret) {
	547	+ dev_err(&pdev->dev, "can't configure overcurrent gpio %d as input", gpio);
	548	+ continue;
	549	+ }
	550	+
	551	+ ret = request_irq(gpio_to_irq(gpio),
	552	+ ohci_hcd_at91_overcurrent_irq,
	553	+ IRQF_SHARED, "ohci_overcurrent", pdev);
	554	+ if (ret) {
	555	+ gpio_free(gpio);
	556	+ dev_warn(& pdev->dev, "cannot get GPIO IRQ for overcurrent\n");
	557	+ }
	558	+ }
	559	+
	560	+ pdev->dev.platform_data = pdata;
	561	+
	562	+ return 0;
	563	+}
	564	+#else
	565	+static int __devinit ohci_at91_of_init(struct platform_device *pdev)
	566	+{
	567	+ return 0;
	568	+}
	569	+#endif
	570	+
480	571	/-------------------------------------------------------------------------/
481	572
482	573	static int ohci_hcd_at91_drv_probe(struct platform_device *pdev)
483	574	{
484		− struct at91_usbh_data *pdata = pdev->dev.platform_data;
	575	+ struct at91_usbh_data *pdata;
485	576	int i;
486	577
	578	+ i = ohci_at91_of_init(pdev);
	579	+
	580	+ if (i)
	581	+ return i;
	582	+
	583	+ pdata = pdev->dev.platform_data;
	584	+
487	585	if (pdata) {
488	586	for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) {
489	587	if (!gpio_is_valid(pdata->vbus_pin[i]))
@@ -596,5 +694,6 @@ static struct platform_driver ohci_hcd_at91_driver = { · 106 unmodified lines
596	694	.driver = {
597	695	.name = "at91_ohci",
598	696	.owner = THIS_MODULE,
	697	+ .of_match_table = of_match_ptr(at91_ohci_dt_ids),
599	698	},
600	699	};

drivers/watchdog/orion_wdt.c+15−9

@@ -28,9 +28,9 @@ · 27 unmodified lines
28	28	/*
29	29	* Watchdog timer block registers.
30	30	*/
31		−#define TIMER_CTRL (TIMER_VIRT_BASE + 0x0000)
	31	+#define TIMER_CTRL 0x0000
32	32	#define WDT_EN 0x0010
33		−#define WDT_VAL (TIMER_VIRT_BASE + 0x0024)
	33	+#define WDT_VAL 0x0024
34	34
35	35	#define WDT_MAX_CYCLE_COUNT 0xffffffff
36	36	#define WDT_IN_USE 0
@@ -40,6 +40,7 @@ static int nowayout = WATCHDOG_NOWAYOUT; · 3 unmodified lines
40	40	static int heartbeat = -1; /* module parameter (seconds) */
41	41	static unsigned int wdt_max_duration; /* (seconds) */
42	42	static unsigned int wdt_tclk;
	43	+static void __iomem *wdt_reg;
43	44	static unsigned long wdt_status;
44	45	static DEFINE_SPINLOCK(wdt_lock);
45	46
@@ -48,7 +49,7 @@ static void orion_wdt_ping(void) · 2 unmodified lines
48	49	spin_lock(&wdt_lock);
49	50
50	51	/* Reload watchdog duration */
51		− writel(wdt_tclk * heartbeat, WDT_VAL);
	52	+ writel(wdt_tclk * heartbeat, wdt_reg + WDT_VAL);
52	53
53	54	spin_unlock(&wdt_lock);
54	55	}
@@ -60,7 +61,7 @@ static void orion_wdt_enable(void) · 5 unmodified lines
60	61	spin_lock(&wdt_lock);
61	62
62	63	/* Set watchdog duration */
63		− writel(wdt_tclk * heartbeat, WDT_VAL);
	64	+ writel(wdt_tclk * heartbeat, wdt_reg + WDT_VAL);
64	65
65	66	/* Clear watchdog timer interrupt */
66	67	reg = readl(BRIDGE_CAUSE);
@@ -68,9 +69,9 @@ static void orion_wdt_enable(void) · 1 unmodified line
68	69	writel(reg, BRIDGE_CAUSE);
69	70
70	71	/* Enable watchdog timer */
71		− reg = readl(TIMER_CTRL);
	72	+ reg = readl(wdt_reg + TIMER_CTRL);
72	73	reg \|= WDT_EN;
73		− writel(reg, TIMER_CTRL);
	74	+ writel(reg, wdt_reg + TIMER_CTRL);
74	75
75	76	/* Enable reset on watchdog */
76	77	reg = readl(RSTOUTn_MASK);
@@ -92,9 +93,9 @@ static void orion_wdt_disable(void) · 15 unmodified lines
92	93	writel(reg, RSTOUTn_MASK);
93	94
94	95	/* Disable watchdog timer */
95		− reg = readl(TIMER_CTRL);
	96	+ reg = readl(wdt_reg + TIMER_CTRL);
96	97	reg &= ~WDT_EN;
97		− writel(reg, TIMER_CTRL);
	98	+ writel(reg, wdt_reg + TIMER_CTRL);
98	99
99	100	spin_unlock(&wdt_lock);
100	101	}
@@ -102,7 +103,7 @@ static void orion_wdt_disable(void) · 1 unmodified line
102	103	static int orion_wdt_get_timeleft(int *time_left)
103	104	{
104	105	spin_lock(&wdt_lock);
105		− *time_left = readl(WDT_VAL) / wdt_tclk;
	106	+ *time_left = readl(wdt_reg + WDT_VAL) / wdt_tclk;
106	107	spin_unlock(&wdt_lock);
107	108	return 0;
108	109	}
@@ -236,6 +237,7 @@ static struct miscdevice orion_wdt_miscdev = { · 127 unmodified lines
236	237	static int __devinit orion_wdt_probe(struct platform_device *pdev)
237	238	{
238	239	struct orion_wdt_platform_data *pdata = pdev->dev.platform_data;
	240	+ struct resource *res;
239	241	int ret;
240	242
241	243	if (pdata) {
@@ -245,6 +247,10 @@ static int __devinit orion_wdt_probe(struct platform_device *pdev) · 3 unmodified lines
245	247	return -ENODEV;
246	248	}
247	249
	250	+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	251	+
	252	+ wdt_reg = ioremap(res->start, resource_size(res));
	253	+
248	254	if (orion_wdt_miscdev.parent)
249	255	return -EBUSY;
250	256	orion_wdt_miscdev.parent = &pdev->dev;

include/linux/of.h+16−0

@@ -361,6 +361,22 @@ static inline int of_machine_is_compatible(const char *compat) · 360 unmodified lines
361	361	#define of_match_node(_matches, _node) NULL
362	362	#endif /* CONFIG_OF */
363	363
	364	+/**
	365	+ * of_property_read_bool - Findfrom a property
	366	+ * @np: device node from which the property value is to be read.
	367	+ * @propname: name of the property to be searched.
	368	+ *
	369	+ * Search for a property in a device node.
	370	+ * Returns true if the property exist false otherwise.
	371	+ */
	372	+static inline bool of_property_read_bool(const struct device_node *np,
	373	+ const char *propname)
	374	+{
	375	+ struct property *prop = of_find_property(np, propname, NULL);
	376	+
	377	+ return prop ? true : false;
	378	+}
	379	+
364	380	static inline int of_property_read_u32(const struct device_node *np,
365	381	const char *propname,
366	382	u32 *out_value)

include/linux/of_mtd.h+19−0

@@ -0,0 +1,19 @@
	1	+/*
	2	+ * Copyright 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
	3	+ *
	4	+ * OF helpers for mtd.
	5	+ *
	6	+ * This file is released under the GPLv2
	7	+ */
	8	+
	9	+#ifndef __LINUX_OF_MTD_H
	10	+#define __LINUX_OF_NET_H
	11	+
	12	+#ifdef CONFIG_OF_MTD
	13	+#include <linux/of.h>
	14	+extern const int of_get_nand_ecc_mode(struct device_node *np);
	15	+int of_get_nand_bus_width(struct device_node *np);
	16	+bool of_get_nand_on_flash_bbt(struct device_node *np);
	17	+#endif
	18	+
	19	+#endif /* __LINUX_OF_MTD_H */

include/linux/platform_data/atmel.h+27−0

@@ -0,0 +1,27 @@
	1	+/*
	2	+ * atmel platform data
	3	+ *
	4	+ * GPL v2 Only
	5	+ */
	6	+
	7	+#ifndef __ATMEL_NAND_H__
	8	+#define __ATMEL_NAND_H__
	9	+
	10	+#include <linux/mtd/nand.h>
	11	+
	12	+ /* NAND / SmartMedia */
	13	+struct atmel_nand_data {
	14	+ int enable_pin; /* chip enable */
	15	+ int det_pin; /* card detect */
	16	+ int rdy_pin; /* ready/busy */
	17	+ u8 rdy_pin_active_low; /* rdy_pin value is inverted */
	18	+ u8 ale; /* address line number connected to ALE */
	19	+ u8 cle; /* address line number connected to CLE */
	20	+ u8 bus_width_16; /* buswidth is 16 bit */
	21	+ u8 ecc_mode; /* ecc mode */
	22	+ u8 on_flash_bbt; /* bbt on flash */
	23	+ struct mtd_partition *parts;
	24	+ unsigned int num_parts;
	25	+};
	26	+
	27	+#endif /* __ATMEL_NAND_H__ */

include/linux/spi/orion_spi.h+0−1

@@ -11,7 +11,6 @@ · 10 unmodified lines
11	11
12	12	struct orion_spi_info {
13	13	u32 tclk; /* no <linux/clk.h> support yet */
14		− u32 enable_clock_fix;
15	14	};
16	15
17	16