- Mark expected switch fall-throughs (Gustavo A. R. Silva) - Remove unused pci_request_region_exclusive() (Johannes Thumshirn) - Fix x86 PCI IRQ routing table memory leak (Wenwen Wang) - Reset Lenovo ThinkPad P50 if firmware didn't do it on reboot (Lyude Paul) - Add and use pci_dev_id() helper to simplify PCI_DEVID() usage (touches several places outside drivers/pci/) (Heiner Kallweit) - Transition Mobiveil PCI maintenance to Karthikeyan M and Hou Zhiqiang (Subrahmanya Lingappa) * pci/misc: MAINTAINERS: Add Karthikeyan Mitran and Hou Zhiqiang for Mobiveil PCI platform/chrome: chromeos_laptop: use pci_dev_id() helper stmmac: pci: Use pci_dev_id() helper iommu/vt-d: Use pci_dev_id() helper iommu/amd: Use pci_dev_id() helper drm/amdkfd: Use pci_dev_id() helper powerpc/powernv/npu: Use pci_dev_id() helper r8169: use pci_dev_id() helper PCI: Add pci_dev_id() helper PCI: Reset Lenovo ThinkPad P50 nvgpu at boot if necessary x86/PCI: Fix PCI IRQ routing table memory leak PCI: Remove unused pci_request_region_exclusive() PCI: Mark expected switch fall-throughs
Unified · Split
| @@ -11880,7 +11880,8 @@ F: include/linux/switchtec.h · 11879 unmodified lines | |||
| 11880 | F: drivers/ntb/hw/mscc/ | 11880 | F: drivers/ntb/hw/mscc/ |
| 11881 | 11881 | ||
| 11882 | PCI DRIVER FOR MOBIVEIL PCIE IP | 11882 | PCI DRIVER FOR MOBIVEIL PCIE IP |
| 11883 | M: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> | 11883 | M: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in> |
| 11884 | M: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | ||
| 11884 | L: linux-pci@vger.kernel.org | 11885 | L: linux-pci@vger.kernel.org |
| 11885 | S: Supported | 11886 | S: Supported |
| 11886 | F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 11887 | F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt |
| @@ -1213,9 +1213,8 @@ int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid, · 1212 unmodified lines | |||
| 1213 | * Currently we only support radix and non-zero LPCR only makes sense | 1213 | * Currently we only support radix and non-zero LPCR only makes sense |
| 1214 | * for hash tables so skiboot expects the LPCR parameter to be a zero. | 1214 | * for hash tables so skiboot expects the LPCR parameter to be a zero. |
| 1215 | */ | 1215 | */ |
| 1216 | ret = opal_npu_map_lpar(nphb->opal_id, | 1216 | ret = opal_npu_map_lpar(nphb->opal_id, pci_dev_id(gpdev), lparid, |
| 1217 | PCI_DEVID(gpdev->bus->number, gpdev->devfn), lparid, | 1217 | 0 /* LPCR bits */); |
| 1218 | 0 /* LPCR bits */); | ||
| 1219 | if (ret) { | 1218 | if (ret) { |
| 1220 | dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret); | 1219 | dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret); |
| 1221 | return ret; | 1220 | return ret; |
| @@ -1224,7 +1223,7 @@ int pnv_npu2_map_lpar_dev(struct pci_dev *gpdev, unsigned int lparid, · 2 unmodified lines | |||
| 1224 | dev_dbg(&gpdev->dev, "init context opalid=%llu msr=%lx\n", | 1223 | dev_dbg(&gpdev->dev, "init context opalid=%llu msr=%lx\n", |
| 1225 | nphb->opal_id, msr); | 1224 | nphb->opal_id, msr); |
| 1226 | ret = opal_npu_init_context(nphb->opal_id, 0/*__unused*/, msr, | 1225 | ret = opal_npu_init_context(nphb->opal_id, 0/*__unused*/, msr, |
| 1227 | PCI_DEVID(gpdev->bus->number, gpdev->devfn)); | 1226 | pci_dev_id(gpdev)); |
| 1228 | if (ret < 0) | 1227 | if (ret < 0) |
| 1229 | dev_err(&gpdev->dev, "Failed to init context: %d\n", ret); | 1228 | dev_err(&gpdev->dev, "Failed to init context: %d\n", ret); |
| 1230 | else | 1229 | else |
| @@ -1258,7 +1257,7 @@ int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev) · 27 unmodified lines | |||
| 1258 | dev_dbg(&gpdev->dev, "destroy context opalid=%llu\n", | 1257 | dev_dbg(&gpdev->dev, "destroy context opalid=%llu\n", |
| 1259 | nphb->opal_id); | 1258 | nphb->opal_id); |
| 1260 | ret = opal_npu_destroy_context(nphb->opal_id, 0/*__unused*/, | 1259 | ret = opal_npu_destroy_context(nphb->opal_id, 0/*__unused*/, |
| 1261 | PCI_DEVID(gpdev->bus->number, gpdev->devfn)); | 1260 | pci_dev_id(gpdev)); |
| 1262 | if (ret < 0) { | 1261 | if (ret < 0) { |
| 1263 | dev_err(&gpdev->dev, "Failed to destroy context: %d\n", ret); | 1262 | dev_err(&gpdev->dev, "Failed to destroy context: %d\n", ret); |
| 1264 | return ret; | 1263 | return ret; |
| @@ -1266,9 +1265,8 @@ int pnv_npu2_unmap_lpar_dev(struct pci_dev *gpdev) · 1 unmodified line | |||
| 1266 | 1265 | ||
| 1267 | /* Set LPID to 0 anyway, just to be safe */ | 1266 | /* Set LPID to 0 anyway, just to be safe */ |
| 1268 | dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=0\n", nphb->opal_id); | 1267 | dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=0\n", nphb->opal_id); |
| 1269 | ret = opal_npu_map_lpar(nphb->opal_id, | 1268 | ret = opal_npu_map_lpar(nphb->opal_id, pci_dev_id(gpdev), 0 /*LPID*/, |
| 1270 | PCI_DEVID(gpdev->bus->number, gpdev->devfn), 0 /*LPID*/, | 1269 | 0 /* LPCR bits */); |
| 1271 | 0 /* LPCR bits */); | ||
| 1272 | if (ret) | 1270 | if (ret) |
| 1273 | dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret); | 1271 | dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret); |
| 1274 | 1272 | ||
| @@ -1119,6 +1119,8 @@ static const struct dmi_system_id pciirq_dmi_table[] __initconst = { · 1118 unmodified lines | |||
| 1119 | 1119 | ||
| 1120 | void __init pcibios_irq_init(void) | 1120 | void __init pcibios_irq_init(void) |
| 1121 | { | 1121 | { |
| 1122 | struct irq_routing_table *rtable = NULL; | ||
| 1123 | |||
| 1122 | DBG(KERN_DEBUG "PCI: IRQ init\n"); | 1124 | DBG(KERN_DEBUG "PCI: IRQ init\n"); |
| 1123 | 1125 | ||
| 1124 | if (raw_pci_ops == NULL) | 1126 | if (raw_pci_ops == NULL) |
| @@ -1129,8 +1131,10 @@ void __init pcibios_irq_init(void) · 4 unmodified lines | |||
| 1129 | pirq_table = pirq_find_routing_table(); | 1131 | pirq_table = pirq_find_routing_table(); |
| 1130 | 1132 | ||
| 1131 | #ifdef CONFIG_PCI_BIOS | 1133 | #ifdef CONFIG_PCI_BIOS |
| 1132 | if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN)) | 1134 | if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN)) { |
| 1133 | pirq_table = pcibios_get_irq_routing_table(); | 1135 | pirq_table = pcibios_get_irq_routing_table(); |
| 1136 | rtable = pirq_table; | ||
| 1137 | } | ||
| 1134 | #endif | 1138 | #endif |
| 1135 | if (pirq_table) { | 1139 | if (pirq_table) { |
| 1136 | pirq_peer_trick(); | 1140 | pirq_peer_trick(); |
| @@ -1145,8 +1149,10 @@ void __init pcibios_irq_init(void) · 8 unmodified lines | |||
| 1145 | * If we're using the I/O APIC, avoid using the PCI IRQ | 1149 | * If we're using the I/O APIC, avoid using the PCI IRQ |
| 1146 | * routing table | 1150 | * routing table |
| 1147 | */ | 1151 | */ |
| 1148 | if (io_apic_assign_pci_irqs) | 1152 | if (io_apic_assign_pci_irqs) { |
| 1153 | kfree(rtable); | ||
| 1149 | pirq_table = NULL; | 1154 | pirq_table = NULL; |
| 1155 | } | ||
| 1150 | } | 1156 | } |
| 1151 | 1157 | ||
| 1152 | x86_init.pci.fixup_irqs(); | 1158 | x86_init.pci.fixup_irqs(); |
| @@ -1270,8 +1270,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu) · 1269 unmodified lines | |||
| 1270 | 1270 | ||
| 1271 | dev->node_props.vendor_id = gpu->pdev->vendor; | 1271 | dev->node_props.vendor_id = gpu->pdev->vendor; |
| 1272 | dev->node_props.device_id = gpu->pdev->device; | 1272 | dev->node_props.device_id = gpu->pdev->device; |
| 1273 | dev->node_props.location_id = PCI_DEVID(gpu->pdev->bus->number, | 1273 | dev->node_props.location_id = pci_dev_id(gpu->pdev); |
| 1274 | gpu->pdev->devfn); | ||
| 1275 | dev->node_props.max_engine_clk_fcompute = | 1274 | dev->node_props.max_engine_clk_fcompute = |
| 1276 | amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->kgd); | 1275 | amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->kgd); |
| 1277 | dev->node_props.max_engine_clk_ccompute = | 1276 | dev->node_props.max_engine_clk_ccompute = |
| @@ -165,7 +165,7 @@ static inline u16 get_pci_device_id(struct device *dev) · 164 unmodified lines | |||
| 165 | { | 165 | { |
| 166 | struct pci_dev *pdev = to_pci_dev(dev); | 166 | struct pci_dev *pdev = to_pci_dev(dev); |
| 167 | 167 | ||
| 168 | return PCI_DEVID(pdev->bus->number, pdev->devfn); | 168 | return pci_dev_id(pdev); |
| 169 | } | 169 | } |
| 170 | 170 | ||
| 171 | static inline int get_acpihid_device_id(struct device *dev, | 171 | static inline int get_acpihid_device_id(struct device *dev, |
| @@ -1391,7 +1391,7 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info) · 1390 unmodified lines | |||
| 1391 | 1391 | ||
| 1392 | /* pdev will be returned if device is not a vf */ | 1392 | /* pdev will be returned if device is not a vf */ |
| 1393 | pf_pdev = pci_physfn(pdev); | 1393 | pf_pdev = pci_physfn(pdev); |
| 1394 | info->pfsid = PCI_DEVID(pf_pdev->bus->number, pf_pdev->devfn); | 1394 | info->pfsid = pci_dev_id(pf_pdev); |
| 1395 | } | 1395 | } |
| 1396 | 1396 | ||
| 1397 | #ifdef CONFIG_INTEL_IOMMU_SVM | 1397 | #ifdef CONFIG_INTEL_IOMMU_SVM |
| @@ -424,7 +424,7 @@ static int set_msi_sid(struct irte *irte, struct pci_dev *dev) · 423 unmodified lines | |||
| 424 | set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, data.alias); | 424 | set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, data.alias); |
| 425 | else | 425 | else |
| 426 | set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, | 426 | set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, |
| 427 | PCI_DEVID(dev->bus->number, dev->devfn)); | 427 | pci_dev_id(dev)); |
| 428 | 428 | ||
| 429 | return 0; | 429 | return 0; |
| 430 | } | 430 | } |
| @@ -7182,8 +7182,7 @@ static int r8169_mdio_register(struct rtl8169_private *tp) · 7181 unmodified lines | |||
| 7182 | new_bus->priv = tp; | 7182 | new_bus->priv = tp; |
| 7183 | new_bus->parent = &pdev->dev; | 7183 | new_bus->parent = &pdev->dev; |
| 7184 | new_bus->irq[0] = PHY_IGNORE_INTERRUPT; | 7184 | new_bus->irq[0] = PHY_IGNORE_INTERRUPT; |
| 7185 | snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x", | 7185 | snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x", pci_dev_id(pdev)); |
| 7186 | PCI_DEVID(pdev->bus->number, pdev->devfn)); | ||
| 7187 | 7186 | ||
| 7188 | new_bus->read = r8169_mdio_read_reg; | 7187 | new_bus->read = r8169_mdio_read_reg; |
| 7189 | new_bus->write = r8169_mdio_write_reg; | 7188 | new_bus->write = r8169_mdio_write_reg; |
| @@ -204,7 +204,7 @@ static int quark_default_data(struct pci_dev *pdev, · 203 unmodified lines | |||
| 204 | ret = 1; | 204 | ret = 1; |
| 205 | } | 205 | } |
| 206 | 206 | ||
| 207 | plat->bus_id = PCI_DEVID(pdev->bus->number, pdev->devfn); | 207 | plat->bus_id = pci_dev_id(pdev); |
| 208 | plat->phy_addr = ret; | 208 | plat->phy_addr = ret; |
| 209 | plat->interface = PHY_INTERFACE_MODE_RMII; | 209 | plat->interface = PHY_INTERFACE_MODE_RMII; |
| 210 | 210 | ||
| @@ -1338,7 +1338,7 @@ irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev, · 1337 unmodified lines | |||
| 1338 | struct msi_desc *desc) | 1338 | struct msi_desc *desc) |
| 1339 | { | 1339 | { |
| 1340 | return (irq_hw_number_t)desc->msi_attrib.entry_nr | | 1340 | return (irq_hw_number_t)desc->msi_attrib.entry_nr | |
| 1341 | PCI_DEVID(dev->bus->number, dev->devfn) << 11 | | 1341 | pci_dev_id(dev) << 11 | |
| 1342 | (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; | 1342 | (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; |
| 1343 | } | 1343 | } |
| 1344 | 1344 | ||
| @@ -1508,7 +1508,7 @@ static int get_msi_id_cb(struct pci_dev *pdev, u16 alias, void *data) · 163 unmodified lines | |||
| 1508 | u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev) | 1508 | u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev) |
| 1509 | { | 1509 | { |
| 1510 | struct device_node *of_node; | 1510 | struct device_node *of_node; |
| 1511 | u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn); | 1511 | u32 rid = pci_dev_id(pdev); |
| 1512 | 1512 | ||
| 1513 | pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid); | 1513 | pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid); |
| 1514 | 1514 | ||
| @@ -1531,7 +1531,7 @@ u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev) · 16 unmodified lines | |||
| 1531 | struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev) | 1531 | struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev) |
| 1532 | { | 1532 | { |
| 1533 | struct irq_domain *dom; | 1533 | struct irq_domain *dom; |
| 1534 | u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn); | 1534 | u32 rid = pci_dev_id(pdev); |
| 1535 | 1535 | ||
| 1536 | pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid); | 1536 | pci_for_each_dma_alias(pdev, get_msi_id_cb, &rid); |
| 1537 | dom = of_msi_map_get_device_domain(&pdev->dev, rid); | 1537 | dom = of_msi_map_get_device_domain(&pdev->dev, rid); |
| @@ -3706,31 +3706,6 @@ int pci_request_region(struct pci_dev *pdev, int bar, const char *res_name) · 3705 unmodified lines | |||
| 3706 | } | 3706 | } |
| 3707 | EXPORT_SYMBOL(pci_request_region); | 3707 | EXPORT_SYMBOL(pci_request_region); |
| 3708 | 3708 | ||
| 3709 | /** | ||
| 3710 | * pci_request_region_exclusive - Reserved PCI I/O and memory resource | ||
| 3711 | * @pdev: PCI device whose resources are to be reserved | ||
| 3712 | * @bar: BAR to be reserved | ||
| 3713 | * @res_name: Name to be associated with resource. | ||
| 3714 | * | ||
| 3715 | * Mark the PCI region associated with PCI device @pdev BR @bar as | ||
| 3716 | * being reserved by owner @res_name. Do not access any | ||
| 3717 | * address inside the PCI regions unless this call returns | ||
| 3718 | * successfully. | ||
| 3719 | * | ||
| 3720 | * Returns 0 on success, or %EBUSY on error. A warning | ||
| 3721 | * message is also printed on failure. | ||
| 3722 | * | ||
| 3723 | * The key difference that _exclusive makes it that userspace is | ||
| 3724 | * explicitly not allowed to map the resource via /dev/mem or | ||
| 3725 | * sysfs. | ||
| 3726 | */ | ||
| 3727 | int pci_request_region_exclusive(struct pci_dev *pdev, int bar, | ||
| 3728 | const char *res_name) | ||
| 3729 | { | ||
| 3730 | return __pci_request_region(pdev, bar, res_name, IORESOURCE_EXCLUSIVE); | ||
| 3731 | } | ||
| 3732 | EXPORT_SYMBOL(pci_request_region_exclusive); | ||
| 3733 | |||
| 3734 | /** | 3709 | /** |
| 3735 | * pci_release_selected_regions - Release selected PCI I/O and memory resources | 3710 | * pci_release_selected_regions - Release selected PCI I/O and memory resources |
| 3736 | * @pdev: PCI device whose resources were previously reserved | 3711 | * @pdev: PCI device whose resources were previously reserved |
| @@ -222,6 +222,7 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, · 221 unmodified lines | |||
| 222 | } | 222 | } |
| 223 | /* If arch decided it can't, fall through... */ | 223 | /* If arch decided it can't, fall through... */ |
| 224 | #endif /* HAVE_PCI_MMAP */ | 224 | #endif /* HAVE_PCI_MMAP */ |
| 225 | /* fall through */ | ||
| 225 | default: | 226 | default: |
| 226 | ret = -EINVAL; | 227 | ret = -EINVAL; |
| 227 | break; | 228 | break; |
| @@ -5137,3 +5137,61 @@ SWITCHTEC_QUIRK(0x8573); /* PFXI 48XG3 */ · 5136 unmodified lines | |||
| 5137 | SWITCHTEC_QUIRK(0x8574); /* PFXI 64XG3 */ | 5137 | SWITCHTEC_QUIRK(0x8574); /* PFXI 64XG3 */ |
| 5138 | SWITCHTEC_QUIRK(0x8575); /* PFXI 80XG3 */ | 5138 | SWITCHTEC_QUIRK(0x8575); /* PFXI 80XG3 */ |
| 5139 | SWITCHTEC_QUIRK(0x8576); /* PFXI 96XG3 */ | 5139 | SWITCHTEC_QUIRK(0x8576); /* PFXI 96XG3 */ |
| 5140 | |||
| 5141 | /* | ||
| 5142 | * On Lenovo Thinkpad P50 SKUs with a Nvidia Quadro M1000M, the BIOS does | ||
| 5143 | * not always reset the secondary Nvidia GPU between reboots if the system | ||
| 5144 | * is configured to use Hybrid Graphics mode. This results in the GPU | ||
| 5145 | * being left in whatever state it was in during the *previous* boot, which | ||
| 5146 | * causes spurious interrupts from the GPU, which in turn causes us to | ||
| 5147 | * disable the wrong IRQ and end up breaking the touchpad. Unsurprisingly, | ||
| 5148 | * this also completely breaks nouveau. | ||
| 5149 | * | ||
| 5150 | * Luckily, it seems a simple reset of the Nvidia GPU brings it back to a | ||
| 5151 | * clean state and fixes all these issues. | ||
| 5152 | * | ||
| 5153 | * When the machine is configured in Dedicated display mode, the issue | ||
| 5154 | * doesn't occur. Fortunately the GPU advertises NoReset+ when in this | ||
| 5155 | * mode, so we can detect that and avoid resetting it. | ||
| 5156 | */ | ||
| 5157 | static void quirk_reset_lenovo_thinkpad_p50_nvgpu(struct pci_dev *pdev) | ||
| 5158 | { | ||
| 5159 | void __iomem *map; | ||
| 5160 | int ret; | ||
| 5161 | |||
| 5162 | if (pdev->subsystem_vendor != PCI_VENDOR_ID_LENOVO || | ||
| 5163 | pdev->subsystem_device != 0x222e || | ||
| 5164 | !pdev->reset_fn) | ||
| 5165 | return; | ||
| 5166 | |||
| 5167 | if (pci_enable_device_mem(pdev)) | ||
| 5168 | return; | ||
| 5169 | |||
| 5170 | /* | ||
| 5171 | * Based on nvkm_device_ctor() in | ||
| 5172 | * drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | ||
| 5173 | */ | ||
| 5174 | map = pci_iomap(pdev, 0, 0x23000); | ||
| 5175 | if (!map) { | ||
| 5176 | pci_err(pdev, "Can't map MMIO space\n"); | ||
| 5177 | goto out_disable; | ||
| 5178 | } | ||
| 5179 | |||
| 5180 | /* | ||
| 5181 | * Make sure the GPU looks like it's been POSTed before resetting | ||
| 5182 | * it. | ||
| 5183 | */ | ||
| 5184 | if (ioread32(map + 0x2240c) & 0x2) { | ||
| 5185 | pci_info(pdev, FW_BUG "GPU left initialized by EFI, resetting\n"); | ||
| 5186 | ret = pci_reset_function(pdev); | ||
| 5187 | if (ret < 0) | ||
| 5188 | pci_err(pdev, "Failed to reset GPU: %d\n", ret); | ||
| 5189 | } | ||
| 5190 | |||
| 5191 | iounmap(map); | ||
| 5192 | out_disable: | ||
| 5193 | pci_disable_device(pdev); | ||
| 5194 | } | ||
| 5195 | DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, 0x13b1, | ||
| 5196 | PCI_CLASS_DISPLAY_VGA, 8, | ||
| 5197 | quirk_reset_lenovo_thinkpad_p50_nvgpu); | ||
| @@ -33,7 +33,7 @@ int pci_for_each_dma_alias(struct pci_dev *pdev, · 32 unmodified lines | |||
| 33 | struct pci_bus *bus; | 33 | struct pci_bus *bus; |
| 34 | int ret; | 34 | int ret; |
| 35 | 35 | ||
| 36 | ret = fn(pdev, PCI_DEVID(pdev->bus->number, pdev->devfn), data); | 36 | ret = fn(pdev, pci_dev_id(pdev), data); |
| 37 | if (ret) | 37 | if (ret) |
| 38 | return ret; | 38 | return ret; |
| 39 | 39 | ||
| @@ -88,9 +88,7 @@ int pci_for_each_dma_alias(struct pci_dev *pdev, · 48 unmodified lines | |||
| 88 | return ret; | 88 | return ret; |
| 89 | continue; | 89 | continue; |
| 90 | case PCI_EXP_TYPE_PCIE_BRIDGE: | 90 | case PCI_EXP_TYPE_PCIE_BRIDGE: |
| 91 | ret = fn(tmp, | 91 | ret = fn(tmp, pci_dev_id(tmp), data); |
| 92 | PCI_DEVID(tmp->bus->number, | ||
| 93 | tmp->devfn), data); | ||
| 94 | if (ret) | 92 | if (ret) |
| 95 | return ret; | 93 | return ret; |
| 96 | continue; | 94 | continue; |
| @@ -101,9 +99,7 @@ int pci_for_each_dma_alias(struct pci_dev *pdev, · 4 unmodified lines | |||
| 101 | PCI_DEVID(tmp->subordinate->number, | 99 | PCI_DEVID(tmp->subordinate->number, |
| 102 | PCI_DEVFN(0, 0)), data); | 100 | PCI_DEVFN(0, 0)), data); |
| 103 | else | 101 | else |
| 104 | ret = fn(tmp, | 102 | ret = fn(tmp, pci_dev_id(tmp), data); |
| 105 | PCI_DEVID(tmp->bus->number, | ||
| 106 | tmp->devfn), data); | ||
| 107 | if (ret) | 103 | if (ret) |
| 108 | return ret; | 104 | return ret; |
| 109 | } | 105 | } |
| @@ -1104,7 +1104,7 @@ static void __ref pcifront_backend_changed(struct xenbus_device *xdev, · 1103 unmodified lines | |||
| 1104 | case XenbusStateClosed: | 1104 | case XenbusStateClosed: |
| 1105 | if (xdev->state == XenbusStateClosed) | 1105 | if (xdev->state == XenbusStateClosed) |
| 1106 | break; | 1106 | break; |
| 1107 | /* Missed the backend's CLOSING state -- fallthrough */ | 1107 | /* fall through - Missed the backend's CLOSING state. */ |
| 1108 | case XenbusStateClosing: | 1108 | case XenbusStateClosing: |
| 1109 | dev_warn(&xdev->dev, "backend going away!\n"); | 1109 | dev_warn(&xdev->dev, "backend going away!\n"); |
| 1110 | pcifront_try_disconnect(pdev); | 1110 | pcifront_try_disconnect(pdev); |
| @@ -125,7 +125,7 @@ static bool chromeos_laptop_match_adapter_devid(struct device *dev, u32 devid) · 124 unmodified lines | |||
| 125 | return false; | 125 | return false; |
| 126 | 126 | ||
| 127 | pdev = to_pci_dev(dev); | 127 | pdev = to_pci_dev(dev); |
| 128 | return devid == PCI_DEVID(pdev->bus->number, pdev->devfn); | 128 | return devid == pci_dev_id(pdev); |
| 129 | } | 129 | } |
| 130 | 130 | ||
| 131 | static void chromeos_laptop_check_adapter(struct i2c_adapter *adapter) | 131 | static void chromeos_laptop_check_adapter(struct i2c_adapter *adapter) |
| @@ -598,6 +598,11 @@ struct pci_bus { · 597 unmodified lines | |||
| 598 | 598 | ||
| 599 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) | 599 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
| 600 | 600 | ||
| 601 | static inline u16 pci_dev_id(struct pci_dev *dev) | ||
| 602 | { | ||
| 603 | return PCI_DEVID(dev->bus->number, dev->devfn); | ||
| 604 | } | ||
| 605 | |||
| 601 | /* | 606 | /* |
| 602 | * Returns true if the PCI bus is root (behind host-PCI bridge), | 607 | * Returns true if the PCI bus is root (behind host-PCI bridge), |
| 603 | * false otherwise | 608 | * false otherwise |
| @@ -1235,7 +1240,6 @@ int __must_check pci_request_regions(struct pci_dev *, const char *); · 631 unmodified lines | |||
| 1235 | int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); | 1240 | int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); |
| 1236 | void pci_release_regions(struct pci_dev *); | 1241 | void pci_release_regions(struct pci_dev *); |
| 1237 | int __must_check pci_request_region(struct pci_dev *, int, const char *); | 1242 | int __must_check pci_request_region(struct pci_dev *, int, const char *); |
| 1238 | int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *); | ||
| 1239 | void pci_release_region(struct pci_dev *, int); | 1243 | void pci_release_region(struct pci_dev *, int); |
| 1240 | int pci_request_selected_regions(struct pci_dev *, int, const char *); | 1244 | int pci_request_selected_regions(struct pci_dev *, int, const char *); |
| 1241 | int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); | 1245 | int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); |