net: phy: broadcom: add helper to write/read RDB registers

RDB (Register Data Base) registers are used on newer Broadcom PHYs. Add helper to read, write and modify these registers.

Michael Walle committed 6 years ago

Commit 0a32f1f1 parent b86a0373 files · +92 −0Browse files

Unified · Split

3 files

drivers/net/phy/bcm-phy-lib.c +80 −0
drivers/net/phy/bcm-phy-lib.h +9 −0
include/linux/brcmphy.h +3 −0

drivers/net/phy/bcm-phy-lib.c+80−0

@@ -155,6 +155,86 @@ int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow, · 154 unmodified lines
155	}	155	}
156	EXPORT_SYMBOL_GPL(bcm_phy_write_shadow);	156	EXPORT_SYMBOL_GPL(bcm_phy_write_shadow);
157		157
		158	int __bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb)
		159	{
		160	int val;
		161
		162	val = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
		163	if (val < 0)
		164	return val;
		165
		166	return __phy_read(phydev, MII_BCM54XX_RDB_DATA);
		167	}
		168	EXPORT_SYMBOL_GPL(__bcm_phy_read_rdb);
		169
		170	int bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb)
		171	{
		172	int ret;
		173
		174	phy_lock_mdio_bus(phydev);
		175	ret = __bcm_phy_read_rdb(phydev, rdb);
		176	phy_unlock_mdio_bus(phydev);
		177
		178	return ret;
		179	}
		180	EXPORT_SYMBOL_GPL(bcm_phy_read_rdb);
		181
		182	int __bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val)
		183	{
		184	int ret;
		185
		186	ret = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
		187	if (ret < 0)
		188	return ret;
		189
		190	return __phy_write(phydev, MII_BCM54XX_RDB_DATA, val);
		191	}
		192	EXPORT_SYMBOL_GPL(__bcm_phy_write_rdb);
		193
		194	int bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val)
		195	{
		196	int ret;
		197
		198	phy_lock_mdio_bus(phydev);
		199	ret = __bcm_phy_write_rdb(phydev, rdb, val);
		200	phy_unlock_mdio_bus(phydev);
		201
		202	return ret;
		203	}
		204	EXPORT_SYMBOL_GPL(bcm_phy_write_rdb);
		205
		206	int __bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask, u16 set)
		207	{
		208	int new, ret;
		209
		210	ret = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
		211	if (ret < 0)
		212	return ret;
		213
		214	ret = __phy_read(phydev, MII_BCM54XX_RDB_DATA);
		215	if (ret < 0)
		216	return ret;
		217
		218	new = (ret & ~mask) \| set;
		219	if (new == ret)
		220	return 0;
		221
		222	return __phy_write(phydev, MII_BCM54XX_RDB_DATA, new);
		223	}
		224	EXPORT_SYMBOL_GPL(__bcm_phy_modify_rdb);
		225
		226	int bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask, u16 set)
		227	{
		228	int ret;
		229
		230	phy_lock_mdio_bus(phydev);
		231	ret = __bcm_phy_modify_rdb(phydev, rdb, mask, set);
		232	phy_unlock_mdio_bus(phydev);
		233
		234	return ret;
		235	}
		236	EXPORT_SYMBOL_GPL(bcm_phy_modify_rdb);
		237
158	int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down)	238	int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down)
159	{	239	{
160	int val;	240	int val;

drivers/net/phy/bcm-phy-lib.h+9−0

@@ -48,6 +48,15 @@ int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow, · 47 unmodified lines
48	u16 val);	48	u16 val);
49	int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow);	49	int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow);
50		50
		51	int __bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val);
		52	int bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val);
		53	int __bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb);
		54	int bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb);
		55	int __bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask,
		56	u16 set);
		57	int bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask,
		58	u16 set);
		59
51	int bcm_phy_ack_intr(struct phy_device *phydev);	60	int bcm_phy_ack_intr(struct phy_device *phydev);
52	int bcm_phy_config_intr(struct phy_device *phydev);	61	int bcm_phy_config_intr(struct phy_device *phydev);
53		62

include/linux/brcmphy.h+3−0

@@ -115,6 +115,9 @@ · 114 unmodified lines
115	#define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10)	115	#define MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10)
116	#define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0)	116	#define MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0)
117		117
		118	#define MII_BCM54XX_RDB_ADDR 0x1e
		119	#define MII_BCM54XX_RDB_DATA 0x1f
		120
118	/*	121	/*
119	* AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18)	122	* AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18)
120	*/	123	*/