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Merge tag 'i2c-for-6.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c updates from Wolfram Sang: "I2C Core: - prevent double-free of an fwnode if it is a software node - use recent helpers instead of custom ACPI or outdated OF ones - add a more elaborate description of a message flag Cleanups and refactorings: - lpi2c, riic, st, stm32f7: general improvements - riic: support more flexible IRQ configurations - tegra: fix documentation Improvements: - lpi2c: improve register polling and add atomic transfer - imx: use guarded spinlocks New hardware support: - Samsung Exynos 2200 - Renesas RZ/T2H (R9A09G077), RZ/N2H (R9A09G087) DT binding: - rk3x: enable power domains - nxp: support clock property" * tag 'i2c-for-6.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: core: Fix double-free of fwnode in i2c_unregister_device() i2c: lpi2c: implement xfer_atomic callback i2c: lpi2c: use readl_poll_timeout() for register polling dt-bindings: i2c: i2c-rk3x: Allow use of a power-domain dt-bindings: i2c: exynos5: add samsung,exynos2200-hsi2c compatible i2c: lpi2c: convert to use secs_to_jiffies() i2c: st: Use min() to improve code i2c: imx: use guard to take spinlock i2c: stm32f7: Use str_on_off() helper dt-bindings: i2c: nxp,pnx-i2c: allow clocks property i2c: riic: Add support for RZ/T2H SoC i2c: riic: Move generic compatible string to end of array i2c: riic: Pass IRQ desc array as part of OF data dt-bindings: i2c: renesas,riic: Document RZ/T2H and RZ/N2H support dt-bindings: i2c: renesas,riic: Move ref for i2c-controller.yaml to the end i2c: tegra: Add missing kernel-doc for dma_dev member i2c: Clarify behavior of I2C_M_RD flag i2c: mux: pca954x: Use dev_fwnode() i2c: acpi: Replace custom code with device_match_acpi_handle()

Linus Torvalds committed 1 year ago

Commit 0ae982d2 parents 0919a5b 1c24e5f14 files · +333 −165Browse files

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include/uapi/linux/i2c.h+2−1
@@ -21,7 +21,8 @@ · 20 unmodified lines
2121 *
2222 * @flags:
2323 * Supported by all adapters:
24− * %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001!
24+ * %I2C_M_RD: read data (from slave to master). Guaranteed to be 0x0001! If
25+ * not set, the transaction is interpreted as write.
2526 *
2627 * Optional:
2728 * %I2C_M_DMA_SAFE: the buffer of this message is DMA safe. Makes only sense