We want the USB and other fixes in here as well.
Unified · Split
| @@ -59,6 +59,7 @@ James Bottomley <jejb@mulgrave.(none)> · 58 unmodified lines | ||
| 59 | 59 | James Bottomley <jejb@titanic.il.steeleye.com> |
| 60 | 60 | James E Wilson <wilson@specifix.com> |
| 61 | 61 | James Ketrenos <jketreno@io.(none)> |
| 62 | +<javier@osg.samsung.com> <javier.martinez@collabora.co.uk> | |
| 62 | 63 | Jean Tourrilhes <jt@hpl.hp.com> |
| 63 | 64 | Jeff Garzik <jgarzik@pretzel.yyz.us> |
| 64 | 65 | Jens Axboe <axboe@suse.de> |
| @@ -0,0 +1,7 @@ | ||
| 1 | +This file contains documentation for running mainline | |
| 2 | +kernel on omaps. | |
| 3 | + | |
| 4 | +KERNEL NEW DEPENDENCIES | |
| 5 | +v4.3+ Update is needed for custom .config files to make sure | |
| 6 | + CONFIG_REGULATOR_PBIAS is enabled for MMC1 to work | |
| 7 | + properly. | |
| @@ -894,11 +894,12 @@ M: Lennert Buytenhek <kernel@wantstofly.org> · 893 unmodified lines | ||
| 894 | 894 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 895 | 895 | S: Maintained |
| 896 | 896 | |
| 897 | −ARM/Allwinner A1X SoC support | |
| 897 | +ARM/Allwinner sunXi SoC support | |
| 898 | 898 | M: Maxime Ripard <maxime.ripard@free-electrons.com> |
| 899 | +M: Chen-Yu Tsai <wens@csie.org> | |
| 899 | 900 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 900 | 901 | S: Maintained |
| 901 | −N: sun[x4567]i | |
| 902 | +N: sun[x456789]i | |
| 902 | 903 | |
| 903 | 904 | ARM/Allwinner SoC Clock Support |
| 904 | 905 | M: Emilio López <emilio@elopez.com.ar> |
| @@ -3598,6 +3599,13 @@ F: drivers/gpu/drm/i915/ · 2693 unmodified lines | ||
| 3598 | 3599 | F: include/drm/i915* |
| 3599 | 3600 | F: include/uapi/drm/i915* |
| 3600 | 3601 | |
| 3602 | +DRM DRIVERS FOR ATMEL HLCDC | |
| 3603 | +M: Boris Brezillon <boris.brezillon@free-electrons.com> | |
| 3604 | +L: dri-devel@lists.freedesktop.org | |
| 3605 | +S: Supported | |
| 3606 | +F: drivers/gpu/drm/atmel-hlcdc/ | |
| 3607 | +F: Documentation/devicetree/bindings/drm/atmel/ | |
| 3608 | + | |
| 3601 | 3609 | DRM DRIVERS FOR EXYNOS |
| 3602 | 3610 | M: Inki Dae <inki.dae@samsung.com> |
| 3603 | 3611 | M: Joonyoung Shim <jy0922.shim@samsung.com> |
| @@ -3626,6 +3634,14 @@ S: Maintained · 22 unmodified lines | ||
| 3626 | 3634 | F: drivers/gpu/drm/imx/ |
| 3627 | 3635 | F: Documentation/devicetree/bindings/drm/imx/ |
| 3628 | 3636 | |
| 3637 | +DRM DRIVERS FOR GMA500 (Poulsbo, Moorestown and derivative chipsets) | |
| 3638 | +M: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> | |
| 3639 | +L: dri-devel@lists.freedesktop.org | |
| 3640 | +T: git git://github.com/patjak/drm-gma500 | |
| 3641 | +S: Maintained | |
| 3642 | +F: drivers/gpu/drm/gma500 | |
| 3643 | +F: include/drm/gma500* | |
| 3644 | + | |
| 3629 | 3645 | DRM DRIVERS FOR NVIDIA TEGRA |
| 3630 | 3646 | M: Thierry Reding <thierry.reding@gmail.com> |
| 3631 | 3647 | M: Terje Bergström <tbergstrom@nvidia.com> |
| @@ -6785,7 +6801,6 @@ F: drivers/scsi/megaraid/ · 3153 unmodified lines | ||
| 6785 | 6801 | |
| 6786 | 6802 | MELLANOX ETHERNET DRIVER (mlx4_en) |
| 6787 | 6803 | M: Amir Vadai <amirv@mellanox.com> |
| 6788 | −M: Ido Shamay <idos@mellanox.com> | |
| 6789 | 6804 | L: netdev@vger.kernel.org |
| 6790 | 6805 | S: Supported |
| 6791 | 6806 | W: http://www.mellanox.com |
| @@ -9108,6 +9123,15 @@ S: Supported · 2316 unmodified lines | ||
| 9108 | 9123 | F: Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt |
| 9109 | 9124 | F: drivers/net/ethernet/synopsys/dwc_eth_qos.c |
| 9110 | 9125 | |
| 9126 | +SYNOPSYS DESIGNWARE I2C DRIVER | |
| 9127 | +M: Andy Shevchenko <andriy.shevchenko@linux.intel.com> | |
| 9128 | +M: Jarkko Nikula <jarkko.nikula@linux.intel.com> | |
| 9129 | +M: Mika Westerberg <mika.westerberg@linux.intel.com> | |
| 9130 | +L: linux-i2c@vger.kernel.org | |
| 9131 | +S: Maintained | |
| 9132 | +F: drivers/i2c/busses/i2c-designware-* | |
| 9133 | +F: include/linux/platform_data/i2c-designware.h | |
| 9134 | + | |
| 9111 | 9135 | SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER |
| 9112 | 9136 | M: Seungwon Jeon <tgih.jun@samsung.com> |
| 9113 | 9137 | M: Jaehoon Chung <jh80.chung@samsung.com> |
| @@ -11658,6 +11682,7 @@ F: drivers/tty/serial/zs.* · 2544 unmodified lines | ||
| 11658 | 11682 | ZSMALLOC COMPRESSED SLAB MEMORY ALLOCATOR |
| 11659 | 11683 | M: Minchan Kim <minchan@kernel.org> |
| 11660 | 11684 | M: Nitin Gupta <ngupta@vflare.org> |
| 11685 | +R: Sergey Senozhatsky <sergey.senozhatsky.work@gmail.com> | |
| 11661 | 11686 | L: linux-mm@kvack.org |
| 11662 | 11687 | S: Maintained |
| 11663 | 11688 | F: mm/zsmalloc.c |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | VERSION = 4 |
| 2 | 2 | PATCHLEVEL = 3 |
| 3 | 3 | SUBLEVEL = 0 |
| 4 | −EXTRAVERSION = -rc5 | |
| 4 | +EXTRAVERSION = -rc7 | |
| 5 | 5 | NAME = Blurry Fish Butt |
| 6 | 6 | |
| 7 | 7 | # *DOCUMENTATION* |
| @@ -402,11 +402,12 @@ · 401 unmodified lines | ||
| 402 | 402 | /* SMPS9 unused */ |
| 403 | 403 | |
| 404 | 404 | ldo1_reg: ldo1 { |
| 405 | − /* VDD_SD */ | |
| 405 | + /* VDD_SD / VDDSHV8 */ | |
| 406 | 406 | regulator-name = "ldo1"; |
| 407 | 407 | regulator-min-microvolt = <1800000>; |
| 408 | 408 | regulator-max-microvolt = <3300000>; |
| 409 | 409 | regulator-boot-on; |
| 410 | + regulator-always-on; | |
| 410 | 411 | }; |
| 411 | 412 | |
| 412 | 413 | ldo2_reg: ldo2 { |
| @@ -46,7 +46,7 @@ · 45 unmodified lines | ||
| 46 | 46 | |
| 47 | 47 | / { |
| 48 | 48 | model = "Marvell Armada 385 Access Point Development Board"; |
| 49 | − compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada38x"; | |
| 49 | + compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada380"; | |
| 50 | 50 | |
| 51 | 51 | chosen { |
| 52 | 52 | stdout-path = "serial1:115200n8"; |
| @@ -152,7 +152,7 @@ · 151 unmodified lines | ||
| 152 | 152 | }; |
| 153 | 153 | |
| 154 | 154 | usb_phy2: phy@a2f400 { |
| 155 | − compatible = "marvell,berlin2-usb-phy"; | |
| 155 | + compatible = "marvell,berlin2cd-usb-phy"; | |
| 156 | 156 | reg = <0xa2f400 0x128>; |
| 157 | 157 | #phy-cells = <0>; |
| 158 | 158 | resets = <&chip_rst 0x104 14>; |
| @@ -170,7 +170,7 @@ · 11 unmodified lines | ||
| 170 | 170 | }; |
| 171 | 171 | |
| 172 | 172 | usb_phy0: phy@b74000 { |
| 173 | − compatible = "marvell,berlin2-usb-phy"; | |
| 173 | + compatible = "marvell,berlin2cd-usb-phy"; | |
| 174 | 174 | reg = <0xb74000 0x128>; |
| 175 | 175 | #phy-cells = <0>; |
| 176 | 176 | resets = <&chip_rst 0x104 12>; |
| @@ -178,7 +178,7 @@ · 1 unmodified line | ||
| 178 | 178 | }; |
| 179 | 179 | |
| 180 | 180 | usb_phy1: phy@b78000 { |
| 181 | − compatible = "marvell,berlin2-usb-phy"; | |
| 181 | + compatible = "marvell,berlin2cd-usb-phy"; | |
| 182 | 182 | reg = <0xb78000 0x128>; |
| 183 | 183 | #phy-cells = <0>; |
| 184 | 184 | resets = <&chip_rst 0x104 13>; |
| @@ -915,6 +915,11 @@ · 914 unmodified lines | ||
| 915 | 915 | }; |
| 916 | 916 | }; |
| 917 | 917 | |
| 918 | +&pmu_system_controller { | |
| 919 | + assigned-clocks = <&pmu_system_controller 0>; | |
| 920 | + assigned-clock-parents = <&clock CLK_FIN_PLL>; | |
| 921 | +}; | |
| 922 | + | |
| 918 | 923 | &rtc { |
| 919 | 924 | status = "okay"; |
| 920 | 925 | clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>; |
| @@ -878,6 +878,11 @@ · 877 unmodified lines | ||
| 878 | 878 | }; |
| 879 | 879 | }; |
| 880 | 880 | |
| 881 | +&pmu_system_controller { | |
| 882 | + assigned-clocks = <&pmu_system_controller 0>; | |
| 883 | + assigned-clock-parents = <&clock CLK_FIN_PLL>; | |
| 884 | +}; | |
| 885 | + | |
| 881 | 886 | &rtc { |
| 882 | 887 | status = "okay"; |
| 883 | 888 | clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>; |
| @@ -588,10 +588,10 @@ · 587 unmodified lines | ||
| 588 | 588 | status = "disabled"; |
| 589 | 589 | }; |
| 590 | 590 | |
| 591 | − uart2: serial@30870000 { | |
| 591 | + uart2: serial@30890000 { | |
| 592 | 592 | compatible = "fsl,imx7d-uart", |
| 593 | 593 | "fsl,imx6q-uart"; |
| 594 | − reg = <0x30870000 0x10000>; | |
| 594 | + reg = <0x30890000 0x10000>; | |
| 595 | 595 | interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; |
| 596 | 596 | clocks = <&clks IMX7D_UART2_ROOT_CLK>, |
| 597 | 597 | <&clks IMX7D_UART2_ROOT_CLK>; |
| @@ -12,7 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | / { |
| 14 | 14 | model = "LogicPD Zoom DM3730 Torpedo Development Kit"; |
| 15 | − compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap36xx"; | |
| 15 | + compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3"; | |
| 16 | 16 | |
| 17 | 17 | gpio_keys { |
| 18 | 18 | compatible = "gpio-keys"; |
| @@ -67,7 +67,7 @@ · 66 unmodified lines | ||
| 67 | 67 | |
| 68 | 68 | timer@c1109940 { |
| 69 | 69 | compatible = "amlogic,meson6-timer"; |
| 70 | − reg = <0xc1109940 0x14>; | |
| 70 | + reg = <0xc1109940 0x18>; | |
| 71 | 71 | interrupts = <0 10 1>; |
| 72 | 72 | }; |
| 73 | 73 | |
| @@ -80,36 +80,37 @@ · 6 unmodified lines | ||
| 80 | 80 | wdt: watchdog@c1109900 { |
| 81 | 81 | compatible = "amlogic,meson6-wdt"; |
| 82 | 82 | reg = <0xc1109900 0x8>; |
| 83 | + interrupts = <0 0 1>; | |
| 83 | 84 | }; |
| 84 | 85 | |
| 85 | 86 | uart_AO: serial@c81004c0 { |
| 86 | 87 | compatible = "amlogic,meson-uart"; |
| 87 | − reg = <0xc81004c0 0x14>; | |
| 88 | + reg = <0xc81004c0 0x18>; | |
| 88 | 89 | interrupts = <0 90 1>; |
| 89 | 90 | clocks = <&clk81>; |
| 90 | 91 | status = "disabled"; |
| 91 | 92 | }; |
| 92 | 93 | |
| 93 | − uart_A: serial@c81084c0 { | |
| 94 | + uart_A: serial@c11084c0 { | |
| 94 | 95 | compatible = "amlogic,meson-uart"; |
| 95 | − reg = <0xc81084c0 0x14>; | |
| 96 | − interrupts = <0 90 1>; | |
| 96 | + reg = <0xc11084c0 0x18>; | |
| 97 | + interrupts = <0 26 1>; | |
| 97 | 98 | clocks = <&clk81>; |
| 98 | 99 | status = "disabled"; |
| 99 | 100 | }; |
| 100 | 101 | |
| 101 | − uart_B: serial@c81084dc { | |
| 102 | + uart_B: serial@c11084dc { | |
| 102 | 103 | compatible = "amlogic,meson-uart"; |
| 103 | − reg = <0xc81084dc 0x14>; | |
| 104 | − interrupts = <0 90 1>; | |
| 104 | + reg = <0xc11084dc 0x18>; | |
| 105 | + interrupts = <0 75 1>; | |
| 105 | 106 | clocks = <&clk81>; |
| 106 | 107 | status = "disabled"; |
| 107 | 108 | }; |
| 108 | 109 | |
| 109 | − uart_C: serial@c8108700 { | |
| 110 | + uart_C: serial@c1108700 { | |
| 110 | 111 | compatible = "amlogic,meson-uart"; |
| 111 | − reg = <0xc8108700 0x14>; | |
| 112 | − interrupts = <0 90 1>; | |
| 112 | + reg = <0xc1108700 0x18>; | |
| 113 | + interrupts = <0 93 1>; | |
| 113 | 114 | clocks = <&clk81>; |
| 114 | 115 | status = "disabled"; |
| 115 | 116 | }; |
| @@ -13,7 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | / { |
| 15 | 15 | model = "TI OMAP37XX EVM (TMDSEVM3730)"; |
| 16 | − compatible = "ti,omap3-evm-37xx", "ti,omap36xx"; | |
| 16 | + compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3"; | |
| 17 | 17 | |
| 18 | 18 | memory { |
| 19 | 19 | device_type = "memory"; |
| @@ -56,7 +56,7 @@ · 55 unmodified lines | ||
| 56 | 56 | /* VMMCI level-shifter enable */ |
| 57 | 57 | default_hrefv60_cfg2 { |
| 58 | 58 | pins = "GPIO169_D22"; |
| 59 | − ste,config = <&gpio_out_lo>; | |
| 59 | + ste,config = <&gpio_out_hi>; | |
| 60 | 60 | }; |
| 61 | 61 | /* VMMCI level-shifter voltage select */ |
| 62 | 62 | default_hrefv60_cfg3 { |
| @@ -234,7 +234,9 @@ · 233 unmodified lines | ||
| 234 | 234 | gpio-controller; |
| 235 | 235 | #interrupt-cells = <2>; |
| 236 | 236 | interrupt-controller; |
| 237 | + /* | |
| 237 | 238 | gpio-ranges = <&pinmux 0 0 246>; |
| 239 | + */ | |
| 238 | 240 | }; |
| 239 | 241 | |
| 240 | 242 | apbmisc@70000800 { |
| @@ -258,7 +258,9 @@ · 257 unmodified lines | ||
| 258 | 258 | gpio-controller; |
| 259 | 259 | #interrupt-cells = <2>; |
| 260 | 260 | interrupt-controller; |
| 261 | + /* | |
| 261 | 262 | gpio-ranges = <&pinmux 0 0 251>; |
| 263 | + */ | |
| 262 | 264 | }; |
| 263 | 265 | |
| 264 | 266 | apbdma: dma@0,60020000 { |
| @@ -244,7 +244,9 @@ · 243 unmodified lines | ||
| 244 | 244 | gpio-controller; |
| 245 | 245 | #interrupt-cells = <2>; |
| 246 | 246 | interrupt-controller; |
| 247 | + /* | |
| 247 | 248 | gpio-ranges = <&pinmux 0 0 224>; |
| 249 | + */ | |
| 248 | 250 | }; |
| 249 | 251 | |
| 250 | 252 | apbmisc@70000800 { |
| @@ -349,7 +349,9 @@ · 348 unmodified lines | ||
| 349 | 349 | gpio-controller; |
| 350 | 350 | #interrupt-cells = <2>; |
| 351 | 351 | interrupt-controller; |
| 352 | + /* | |
| 352 | 353 | gpio-ranges = <&pinmux 0 0 248>; |
| 354 | + */ | |
| 353 | 355 | }; |
| 354 | 356 | |
| 355 | 357 | apbmisc@70000800 { |
| @@ -85,7 +85,7 @@ · 84 unmodified lines | ||
| 85 | 85 | }; |
| 86 | 86 | |
| 87 | 87 | ðsc { |
| 88 | − interrupts = <0 50 4>; | |
| 88 | + interrupts = <0 52 4>; | |
| 89 | 89 | }; |
| 90 | 90 | |
| 91 | 91 | &serial0 { |
| @@ -21,6 +21,7 @@ config KVM · 20 unmodified lines | ||
| 21 | 21 | depends on MMU && OF |
| 22 | 22 | select PREEMPT_NOTIFIERS |
| 23 | 23 | select ANON_INODES |
| 24 | + select ARM_GIC | |
| 24 | 25 | select HAVE_KVM_CPU_RELAX_INTERCEPT |
| 25 | 26 | select HAVE_KVM_ARCH_TLB_FLUSH_ALL |
| 26 | 27 | select KVM_MMIO |
| @@ -1080,7 +1080,7 @@ static int init_hyp_mode(void) · 1079 unmodified lines | ||
| 1080 | 1080 | */ |
| 1081 | 1081 | err = kvm_timer_hyp_init(); |
| 1082 | 1082 | if (err) |
| 1083 | − goto out_free_mappings; | |
| 1083 | + goto out_free_context; | |
| 1084 | 1084 | |
| 1085 | 1085 | #ifndef CONFIG_HOTPLUG_CPU |
| 1086 | 1086 | free_boot_hyp_pgd(); |
| @@ -200,15 +200,15 @@ no_clk: · 199 unmodified lines | ||
| 200 | 200 | args.args_count = 0; |
| 201 | 201 | child_domain = of_genpd_get_from_provider(&args); |
| 202 | 202 | if (IS_ERR(child_domain)) |
| 203 | − goto next_pd; | |
| 203 | + continue; | |
| 204 | 204 | |
| 205 | 205 | if (of_parse_phandle_with_args(np, "power-domains", |
| 206 | 206 | "#power-domain-cells", 0, &args) != 0) |
| 207 | − goto next_pd; | |
| 207 | + continue; | |
| 208 | 208 | |
| 209 | 209 | parent_domain = of_genpd_get_from_provider(&args); |
| 210 | 210 | if (IS_ERR(parent_domain)) |
| 211 | − goto next_pd; | |
| 211 | + continue; | |
| 212 | 212 | |
| 213 | 213 | if (pm_genpd_add_subdomain(parent_domain, child_domain)) |
| 214 | 214 | pr_warn("%s failed to add subdomain: %s\n", |
| @@ -216,8 +216,6 @@ no_clk: · 1 unmodified line | ||
| 216 | 216 | else |
| 217 | 217 | pr_info("%s has as child subdomain: %s.\n", |
| 218 | 218 | parent_domain->name, child_domain->name); |
| 219 | −next_pd: | |
| 220 | − of_node_put(np); | |
| 221 | 219 | } |
| 222 | 220 | |
| 223 | 221 | return 0; |
| @@ -49,6 +49,7 @@ config SOC_OMAP5 · 48 unmodified lines | ||
| 49 | 49 | select OMAP_INTERCONNECT |
| 50 | 50 | select OMAP_INTERCONNECT_BARRIER |
| 51 | 51 | select PM_OPP if PM |
| 52 | + select ZONE_DMA if ARM_LPAE | |
| 52 | 53 | |
| 53 | 54 | config SOC_AM33XX |
| 54 | 55 | bool "TI AM33XX" |
| @@ -78,6 +79,7 @@ config SOC_DRA7XX · 23 unmodified lines | ||
| 78 | 79 | select OMAP_INTERCONNECT |
| 79 | 80 | select OMAP_INTERCONNECT_BARRIER |
| 80 | 81 | select PM_OPP if PM |
| 82 | + select ZONE_DMA if ARM_LPAE | |
| 81 | 83 | |
| 82 | 84 | config ARCH_OMAP2PLUS |
| 83 | 85 | bool |
| @@ -106,6 +106,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") · 105 unmodified lines | ||
| 106 | 106 | MACHINE_END |
| 107 | 107 | |
| 108 | 108 | static const char *const omap36xx_boards_compat[] __initconst = { |
| 109 | + "ti,omap3630", | |
| 109 | 110 | "ti,omap36xx", |
| 110 | 111 | NULL, |
| 111 | 112 | }; |
| @@ -243,6 +244,9 @@ static const char *const omap5_boards_compat[] __initconst = { · 131 unmodified lines | ||
| 243 | 244 | }; |
| 244 | 245 | |
| 245 | 246 | DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") |
| 247 | +#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) | |
| 248 | + .dma_zone_size = SZ_2G, | |
| 249 | +#endif | |
| 246 | 250 | .reserve = omap_reserve, |
| 247 | 251 | .smp = smp_ops(omap4_smp_ops), |
| 248 | 252 | .map_io = omap5_map_io, |
| @@ -288,6 +292,9 @@ static const char *const dra74x_boards_compat[] __initconst = { · 39 unmodified lines | ||
| 288 | 292 | }; |
| 289 | 293 | |
| 290 | 294 | DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)") |
| 295 | +#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) | |
| 296 | + .dma_zone_size = SZ_2G, | |
| 297 | +#endif | |
| 291 | 298 | .reserve = omap_reserve, |
| 292 | 299 | .smp = smp_ops(omap4_smp_ops), |
| 293 | 300 | .map_io = dra7xx_map_io, |
| @@ -308,6 +315,9 @@ static const char *const dra72x_boards_compat[] __initconst = { · 14 unmodified lines | ||
| 308 | 315 | }; |
| 309 | 316 | |
| 310 | 317 | DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)") |
| 318 | +#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) | |
| 319 | + .dma_zone_size = SZ_2G, | |
| 320 | +#endif | |
| 311 | 321 | .reserve = omap_reserve, |
| 312 | 322 | .map_io = dra7xx_map_io, |
| 313 | 323 | .init_early = dra7xx_init_early, |
| @@ -559,7 +559,14 @@ static void pdata_quirks_check(struct pdata_init *quirks) · 558 unmodified lines | ||
| 559 | 559 | |
| 560 | 560 | void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table) |
| 561 | 561 | { |
| 562 | − omap_sdrc_init(NULL, NULL); | |
| 562 | + /* | |
| 563 | + * We still need this for omap2420 and omap3 PM to work, others are | |
| 564 | + * using drivers/misc/sram.c already. | |
| 565 | + */ | |
| 566 | + if (of_machine_is_compatible("ti,omap2420") || | |
| 567 | + of_machine_is_compatible("ti,omap3")) | |
| 568 | + omap_sdrc_init(NULL, NULL); | |
| 569 | + | |
| 563 | 570 | pdata_quirks_check(auxdata_quirks); |
| 564 | 571 | of_platform_populate(NULL, omap_dt_match_table, |
| 565 | 572 | omap_auxdata_lookup, NULL); |
| @@ -42,10 +42,6 @@ · 41 unmodified lines | ||
| 42 | 42 | #define PECR_IS(n) ((1 << ((n) * 2)) << 29) |
| 43 | 43 | |
| 44 | 44 | extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int)); |
| 45 | −#ifdef CONFIG_PM | |
| 46 | − | |
| 47 | −#define ISRAM_START 0x5c000000 | |
| 48 | −#define ISRAM_SIZE SZ_256K | |
| 49 | 45 | |
| 50 | 46 | /* |
| 51 | 47 | * NAND NFC: DFI bus arbitration subset |
| @@ -54,6 +50,11 @@ extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int)); · 2 unmodified lines | ||
| 54 | 50 | #define NDCR_ND_ARB_EN (1 << 12) |
| 55 | 51 | #define NDCR_ND_ARB_CNTL (1 << 19) |
| 56 | 52 | |
| 53 | +#ifdef CONFIG_PM | |
| 54 | + | |
| 55 | +#define ISRAM_START 0x5c000000 | |
| 56 | +#define ISRAM_SIZE SZ_256K | |
| 57 | + | |
| 57 | 58 | static void __iomem *sram; |
| 58 | 59 | static unsigned long wakeup_src; |
| 59 | 60 | |
| @@ -614,6 +614,7 @@ load_common: · 613 unmodified lines | ||
| 614 | 614 | case BPF_LD | BPF_B | BPF_IND: |
| 615 | 615 | load_order = 0; |
| 616 | 616 | load_ind: |
| 617 | + update_on_xread(ctx); | |
| 617 | 618 | OP_IMM3(ARM_ADD, r_off, r_X, k, ctx); |
| 618 | 619 | goto load_common; |
| 619 | 620 | case BPF_LDX | BPF_IMM: |
| @@ -495,7 +495,7 @@ void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) · 494 unmodified lines | ||
| 495 | 495 | |
| 496 | 496 | d->netdev = &orion_ge00.dev; |
| 497 | 497 | for (i = 0; i < d->nr_chips; i++) |
| 498 | − d->chip[i].host_dev = &orion_ge00_shared.dev; | |
| 498 | + d->chip[i].host_dev = &orion_ge_mvmdio.dev; | |
| 499 | 499 | orion_switch_device.dev.platform_data = d; |
| 500 | 500 | |
| 501 | 501 | platform_device_register(&orion_switch_device); |
| @@ -42,7 +42,7 @@ endif · 41 unmodified lines | ||
| 42 | 42 | CHECKFLAGS += -D__aarch64__ |
| 43 | 43 | |
| 44 | 44 | ifeq ($(CONFIG_ARM64_ERRATUM_843419), y) |
| 45 | −CFLAGS_MODULE += -mcmodel=large | |
| 45 | +KBUILD_CFLAGS_MODULE += -mcmodel=large | |
| 46 | 46 | endif |
| 47 | 47 | |
| 48 | 48 | # Default value |
| @@ -44,7 +44,7 @@ · 43 unmodified lines | ||
| 44 | 44 | #define __ARM_NR_compat_cacheflush (__ARM_NR_COMPAT_BASE+2) |
| 45 | 45 | #define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE+5) |
| 46 | 46 | |
| 47 | −#define __NR_compat_syscalls 388 | |
| 47 | +#define __NR_compat_syscalls 390 | |
| 48 | 48 | #endif |
| 49 | 49 | |
| 50 | 50 | #define __ARCH_WANT_SYS_CLONE |
| @@ -797,3 +797,12 @@ __SYSCALL(__NR_memfd_create, sys_memfd_create) · 796 unmodified lines | ||
| 797 | 797 | __SYSCALL(__NR_bpf, sys_bpf) |
| 798 | 798 | #define __NR_execveat 387 |
| 799 | 799 | __SYSCALL(__NR_execveat, compat_sys_execveat) |
| 800 | +#define __NR_userfaultfd 388 | |
| 801 | +__SYSCALL(__NR_userfaultfd, sys_userfaultfd) | |
| 802 | +#define __NR_membarrier 389 | |
| 803 | +__SYSCALL(__NR_membarrier, sys_membarrier) | |
| 804 | + | |
| 805 | +/* | |
| 806 | + * Please add new compat syscalls above this comment and update | |
| 807 | + * __NR_compat_syscalls in asm/unistd.h. | |
| 808 | + */ | |
| @@ -19,6 +19,9 @@ · 18 unmodified lines | ||
| 19 | 19 | /* Required for AArch32 compatibility. */ |
| 20 | 20 | #define SA_RESTORER 0x04000000 |
| 21 | 21 | |
| 22 | +#define MINSIGSTKSZ 5120 | |
| 23 | +#define SIGSTKSZ 16384 | |
| 24 | + | |
| 22 | 25 | #include <asm-generic/signal.h> |
| 23 | 26 | |
| 24 | 27 | #endif |
| @@ -111,7 +111,7 @@ CONFIG_SCSI_QLA_FC=m · 110 unmodified lines | ||
| 111 | 111 | CONFIG_SCSI_QLA_ISCSI=m |
| 112 | 112 | CONFIG_SCSI_LPFC=m |
| 113 | 113 | CONFIG_SCSI_VIRTIO=m |
| 114 | −CONFIG_SCSI_DH=m | |
| 114 | +CONFIG_SCSI_DH=y | |
| 115 | 115 | CONFIG_SCSI_DH_RDAC=m |
| 116 | 116 | CONFIG_SCSI_DH_ALUA=m |
| 117 | 117 | CONFIG_ATA=y |
| @@ -114,7 +114,7 @@ CONFIG_SCSI_QLA_FC=m · 113 unmodified lines | ||
| 114 | 114 | CONFIG_SCSI_QLA_ISCSI=m |
| 115 | 115 | CONFIG_SCSI_LPFC=m |
| 116 | 116 | CONFIG_SCSI_VIRTIO=m |
| 117 | −CONFIG_SCSI_DH=m | |
| 117 | +CONFIG_SCSI_DH=y | |
| 118 | 118 | CONFIG_SCSI_DH_RDAC=m |
| 119 | 119 | CONFIG_SCSI_DH_ALUA=m |
| 120 | 120 | CONFIG_ATA=y |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | ||
| 3 | 3 | |
| 4 | 4 | #ifdef __KERNEL__ |
| 5 | 5 | |
| 6 | −#include <asm/reg.h> | |
| 7 | 6 | |
| 8 | 7 | /* bytes per L1 cache line */ |
| 9 | 8 | #if defined(CONFIG_8xx) || defined(CONFIG_403GCX) |
| @@ -40,12 +39,6 @@ struct ppc64_caches { · 30 unmodified lines | ||
| 40 | 39 | }; |
| 41 | 40 | |
| 42 | 41 | extern struct ppc64_caches ppc64_caches; |
| 43 | − | |
| 44 | −static inline void logmpp(u64 x) | |
| 45 | −{ | |
| 46 | − asm volatile(PPC_LOGMPP(R1) : : "r" (x)); | |
| 47 | −} | |
| 48 | − | |
| 49 | 42 | #endif /* __powerpc64__ && ! __ASSEMBLY__ */ |
| 50 | 43 | |
| 51 | 44 | #if defined(__ASSEMBLY__) |
| @@ -297,8 +297,6 @@ struct kvmppc_vcore { · 296 unmodified lines | ||
| 297 | 297 | u32 arch_compat; |
| 298 | 298 | ulong pcr; |
| 299 | 299 | ulong dpdes; /* doorbell state (POWER8) */ |
| 300 | − void *mpp_buffer; /* Micro Partition Prefetch buffer */ | |
| 301 | − bool mpp_buffer_is_valid; | |
| 302 | 300 | ulong conferring_threads; |
| 303 | 301 | }; |
| 304 | 302 | |
| @@ -61,8 +61,13 @@ struct machdep_calls { · 60 unmodified lines | ||
| 61 | 61 | unsigned long addr, |
| 62 | 62 | unsigned char *hpte_slot_array, |
| 63 | 63 | int psize, int ssize, int local); |
| 64 | − /* special for kexec, to be called in real mode, linear mapping is | |
| 65 | − * destroyed as well */ | |
| 64 | + /* | |
| 65 | + * Special for kexec. | |
| 66 | + * To be called in real mode with interrupts disabled. No locks are | |
| 67 | + * taken as such, concurrent access on pre POWER5 hardware could result | |
| 68 | + * in a deadlock. | |
| 69 | + * The linear mapping is destroyed as well. | |
| 70 | + */ | |
| 66 | 71 | void (*hpte_clear_all)(void); |
| 67 | 72 | |
| 68 | 73 | void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, |
| @@ -141,7 +141,6 @@ · 140 unmodified lines | ||
| 141 | 141 | #define PPC_INST_ISEL 0x7c00001e |
| 142 | 142 | #define PPC_INST_ISEL_MASK 0xfc00003e |
| 143 | 143 | #define PPC_INST_LDARX 0x7c0000a8 |
| 144 | −#define PPC_INST_LOGMPP 0x7c0007e4 | |
| 145 | 144 | #define PPC_INST_LSWI 0x7c0004aa |
| 146 | 145 | #define PPC_INST_LSWX 0x7c00042a |
| 147 | 146 | #define PPC_INST_LWARX 0x7c000028 |
| @@ -285,20 +284,6 @@ · 137 unmodified lines | ||
| 285 | 284 | #define __PPC_EH(eh) 0 |
| 286 | 285 | #endif |
| 287 | 286 | |
| 288 | −/* POWER8 Micro Partition Prefetch (MPP) parameters */ | |
| 289 | −/* Address mask is common for LOGMPP instruction and MPPR SPR */ | |
| 290 | −#define PPC_MPPE_ADDRESS_MASK 0xffffffffc000ULL | |
| 291 | − | |
| 292 | −/* Bits 60 and 61 of MPP SPR should be set to one of the following */ | |
| 293 | −/* Aborting the fetch is indeed setting 00 in the table size bits */ | |
| 294 | −#define PPC_MPPR_FETCH_ABORT (0x0ULL << 60) | |
| 295 | −#define PPC_MPPR_FETCH_WHOLE_TABLE (0x2ULL << 60) | |
| 296 | − | |
| 297 | −/* Bits 54 and 55 of register for LOGMPP instruction should be set to: */ | |
| 298 | −#define PPC_LOGMPP_LOG_L2 (0x02ULL << 54) | |
| 299 | −#define PPC_LOGMPP_LOG_L2L3 (0x01ULL << 54) | |
| 300 | −#define PPC_LOGMPP_LOG_ABORT (0x03ULL << 54) | |
| 301 | − | |
| 302 | 287 | /* Deal with instructions that older assemblers aren't aware of */ |
| 303 | 288 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ |
| 304 | 289 | __PPC_RA(a) | __PPC_RB(b)) |
| @@ -307,8 +292,6 @@ · 2 unmodified lines | ||
| 307 | 292 | #define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LDARX | \ |
| 308 | 293 | ___PPC_RT(t) | ___PPC_RA(a) | \ |
| 309 | 294 | ___PPC_RB(b) | __PPC_EH(eh)) |
| 310 | −#define PPC_LOGMPP(b) stringify_in_c(.long PPC_INST_LOGMPP | \ | |
| 311 | − __PPC_RB(b)) | |
| 312 | 295 | #define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LWARX | \ |
| 313 | 296 | ___PPC_RT(t) | ___PPC_RA(a) | \ |
| 314 | 297 | ___PPC_RB(b) | __PPC_EH(eh)) |
| @@ -226,7 +226,6 @@ · 225 unmodified lines | ||
| 226 | 226 | #define CTRL_TE 0x00c00000 /* thread enable */ |
| 227 | 227 | #define CTRL_RUNLATCH 0x1 |
| 228 | 228 | #define SPRN_DAWR 0xB4 |
| 229 | −#define SPRN_MPPR 0xB8 /* Micro Partition Prefetch Register */ | |
| 230 | 229 | #define SPRN_RPR 0xBA /* Relative Priority Register */ |
| 231 | 230 | #define SPRN_CIABR 0xBB |
| 232 | 231 | #define CIABR_PRIV 0x3 |
| @@ -1043,6 +1043,9 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs) · 1042 unmodified lines | ||
| 1043 | 1043 | if (!capable(CAP_SYS_ADMIN)) |
| 1044 | 1044 | return -EPERM; |
| 1045 | 1045 | |
| 1046 | + if (!rtas.entry) | |
| 1047 | + return -EINVAL; | |
| 1048 | + | |
| 1046 | 1049 | if (copy_from_user(&args, uargs, 3 * sizeof(u32)) != 0) |
| 1047 | 1050 | return -EFAULT; |
| 1048 | 1051 | |
| @@ -36,7 +36,6 @@ · 35 unmodified lines | ||
| 36 | 36 | |
| 37 | 37 | #include <asm/reg.h> |
| 38 | 38 | #include <asm/cputable.h> |
| 39 | −#include <asm/cache.h> | |
| 40 | 39 | #include <asm/cacheflush.h> |
| 41 | 40 | #include <asm/tlbflush.h> |
| 42 | 41 | #include <asm/uaccess.h> |
| @@ -75,12 +74,6 @@ · 32 unmodified lines | ||
| 75 | 74 | |
| 76 | 75 | static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); |
| 77 | 76 | |
| 78 | −#if defined(CONFIG_PPC_64K_PAGES) | |
| 79 | −#define MPP_BUFFER_ORDER 0 | |
| 80 | −#elif defined(CONFIG_PPC_4K_PAGES) | |
| 81 | −#define MPP_BUFFER_ORDER 3 | |
| 82 | −#endif | |
| 83 | − | |
| 84 | 77 | static int dynamic_mt_modes = 6; |
| 85 | 78 | module_param(dynamic_mt_modes, int, S_IRUGO | S_IWUSR); |
| 86 | 79 | MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); |
| @@ -1455,13 +1448,6 @@ static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int core) · 1368 unmodified lines | ||
| 1455 | 1448 | vcore->kvm = kvm; |
| 1456 | 1449 | INIT_LIST_HEAD(&vcore->preempt_list); |
| 1457 | 1450 | |
| 1458 | − vcore->mpp_buffer_is_valid = false; | |
| 1459 | − | |
| 1460 | − if (cpu_has_feature(CPU_FTR_ARCH_207S)) | |
| 1461 | − vcore->mpp_buffer = (void *)__get_free_pages( | |
| 1462 | − GFP_KERNEL|__GFP_ZERO, | |
| 1463 | − MPP_BUFFER_ORDER); | |
| 1464 | − | |
| 1465 | 1451 | return vcore; |
| 1466 | 1452 | } |
| 1467 | 1453 | |
| @@ -1894,33 +1880,6 @@ static int on_primary_thread(void) · 426 unmodified lines | ||
| 1894 | 1880 | return 1; |
| 1895 | 1881 | } |
| 1896 | 1882 | |
| 1897 | −static void kvmppc_start_saving_l2_cache(struct kvmppc_vcore *vc) | |
| 1898 | −{ | |
| 1899 | − phys_addr_t phy_addr, mpp_addr; | |
| 1900 | − | |
| 1901 | − phy_addr = (phys_addr_t)virt_to_phys(vc->mpp_buffer); | |
| 1902 | − mpp_addr = phy_addr & PPC_MPPE_ADDRESS_MASK; | |
| 1903 | − | |
| 1904 | − mtspr(SPRN_MPPR, mpp_addr | PPC_MPPR_FETCH_ABORT); | |
| 1905 | − logmpp(mpp_addr | PPC_LOGMPP_LOG_L2); | |
| 1906 | − | |
| 1907 | − vc->mpp_buffer_is_valid = true; | |
| 1908 | −} | |
| 1909 | − | |
| 1910 | −static void kvmppc_start_restoring_l2_cache(const struct kvmppc_vcore *vc) | |
| 1911 | −{ | |
| 1912 | − phys_addr_t phy_addr, mpp_addr; | |
| 1913 | − | |
| 1914 | − phy_addr = virt_to_phys(vc->mpp_buffer); | |
| 1915 | − mpp_addr = phy_addr & PPC_MPPE_ADDRESS_MASK; | |
| 1916 | − | |
| 1917 | − /* We must abort any in-progress save operations to ensure | |
| 1918 | − * the table is valid so that prefetch engine knows when to | |
| 1919 | − * stop prefetching. */ | |
| 1920 | − logmpp(mpp_addr | PPC_LOGMPP_LOG_ABORT); | |
| 1921 | − mtspr(SPRN_MPPR, mpp_addr | PPC_MPPR_FETCH_WHOLE_TABLE); | |
| 1922 | −} | |
| 1923 | − | |
| 1924 | 1883 | /* |
| 1925 | 1884 | * A list of virtual cores for each physical CPU. |
| 1926 | 1885 | * These are vcores that could run but their runner VCPU tasks are |
| @@ -2471,14 +2430,8 @@ static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) · 544 unmodified lines | ||
| 2471 | 2430 | |
| 2472 | 2431 | srcu_idx = srcu_read_lock(&vc->kvm->srcu); |
| 2473 | 2432 | |
| 2474 | − if (vc->mpp_buffer_is_valid) | |
| 2475 | − kvmppc_start_restoring_l2_cache(vc); | |
| 2476 | − | |
| 2477 | 2433 | __kvmppc_vcore_entry(); |
| 2478 | 2434 | |
| 2479 | − if (vc->mpp_buffer) | |
| 2480 | − kvmppc_start_saving_l2_cache(vc); | |
| 2481 | − | |
| 2482 | 2435 | srcu_read_unlock(&vc->kvm->srcu, srcu_idx); |
| 2483 | 2436 | |
| 2484 | 2437 | spin_lock(&vc->lock); |
| @@ -3073,14 +3026,8 @@ static void kvmppc_free_vcores(struct kvm *kvm) · 588 unmodified lines | ||
| 3073 | 3026 | { |
| 3074 | 3027 | long int i; |
| 3075 | 3028 | |
| 3076 | − for (i = 0; i < KVM_MAX_VCORES; ++i) { | |
| 3077 | − if (kvm->arch.vcores[i] && kvm->arch.vcores[i]->mpp_buffer) { | |
| 3078 | − struct kvmppc_vcore *vc = kvm->arch.vcores[i]; | |
| 3079 | − free_pages((unsigned long)vc->mpp_buffer, | |
| 3080 | − MPP_BUFFER_ORDER); | |
| 3081 | − } | |
| 3029 | + for (i = 0; i < KVM_MAX_VCORES; ++i) | |
| 3082 | 3030 | kfree(kvm->arch.vcores[i]); |
| 3083 | − } | |
| 3084 | 3031 | kvm->arch.online_vcores = 0; |
| 3085 | 3032 | } |
| 3086 | 3033 | |
| @@ -582,13 +582,21 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, · 581 unmodified lines | ||
| 582 | 582 | * be when they isi), and we are the only one left. We rely on our kernel |
| 583 | 583 | * mapping being 0xC0's and the hardware ignoring those two real bits. |
| 584 | 584 | * |
| 585 | + * This must be called with interrupts disabled. | |
| 586 | + * | |
| 587 | + * Taking the native_tlbie_lock is unsafe here due to the possibility of | |
| 588 | + * lockdep being on. On pre POWER5 hardware, not taking the lock could | |
| 589 | + * cause deadlock. POWER5 and newer not taking the lock is fine. This only | |
| 590 | + * gets called during boot before secondary CPUs have come up and during | |
| 591 | + * crashdump and all bets are off anyway. | |
| 592 | + * | |
| 585 | 593 | * TODO: add batching support when enabled. remember, no dynamic memory here, |
| 586 | 594 | * athough there is the control page available... |
| 587 | 595 | */ |
| 588 | 596 | static void native_hpte_clear(void) |
| 589 | 597 | { |
| 590 | 598 | unsigned long vpn = 0; |
| 591 | − unsigned long slot, slots, flags; | |
| 599 | + unsigned long slot, slots; | |
| 592 | 600 | struct hash_pte *hptep = htab_address; |
| 593 | 601 | unsigned long hpte_v; |
| 594 | 602 | unsigned long pteg_count; |
| @@ -596,13 +604,6 @@ static void native_hpte_clear(void) · 1 unmodified line | ||
| 596 | 604 | |
| 597 | 605 | pteg_count = htab_hash_mask + 1; |
| 598 | 606 | |
| 599 | − local_irq_save(flags); | |
| 600 | − | |
| 601 | − /* we take the tlbie lock and hold it. Some hardware will | |
| 602 | − * deadlock if we try to tlbie from two processors at once. | |
| 603 | − */ | |
| 604 | − raw_spin_lock(&native_tlbie_lock); | |
| 605 | − | |
| 606 | 607 | slots = pteg_count * HPTES_PER_GROUP; |
| 607 | 608 | |
| 608 | 609 | for (slot = 0; slot < slots; slot++, hptep++) { |
| @@ -614,8 +615,8 @@ static void native_hpte_clear(void) · 5 unmodified lines | ||
| 614 | 615 | hpte_v = be64_to_cpu(hptep->v); |
| 615 | 616 | |
| 616 | 617 | /* |
| 617 | − * Call __tlbie() here rather than tlbie() since we | |
| 618 | − * already hold the native_tlbie_lock. | |
| 618 | + * Call __tlbie() here rather than tlbie() since we can't take the | |
| 619 | + * native_tlbie_lock. | |
| 619 | 620 | */ |
| 620 | 621 | if (hpte_v & HPTE_V_VALID) { |
| 621 | 622 | hpte_decode(hptep, slot, &psize, &apsize, &ssize, &vpn); |
| @@ -625,8 +626,6 @@ static void native_hpte_clear(void) · 3 unmodified lines | ||
| 625 | 626 | } |
| 626 | 627 | |
| 627 | 628 | asm volatile("eieio; tlbsync; ptesync":::"memory"); |
| 628 | − raw_spin_unlock(&native_tlbie_lock); | |
| 629 | − local_irq_restore(flags); | |
| 630 | 629 | } |
| 631 | 630 | |
| 632 | 631 | /* |
| @@ -487,9 +487,12 @@ int opal_machine_check(struct pt_regs *regs) · 486 unmodified lines | ||
| 487 | 487 | * PRD component would have already got notified about this |
| 488 | 488 | * error through other channels. |
| 489 | 489 | * |
| 490 | − * In any case, let us just fall through. We anyway heading | |
| 491 | − * down to panic path. | |
| 490 | + * If hardware marked this as an unrecoverable MCE, we are | |
| 491 | + * going to panic anyway. Even if it didn't, it's not safe to | |
| 492 | + * continue at this point, so we should explicitly panic. | |
| 492 | 493 | */ |
| 494 | + | |
| 495 | + panic("PowerNV Unrecovered Machine Check"); | |
| 493 | 496 | return 0; |
| 494 | 497 | } |
| 495 | 498 | |
| @@ -171,7 +171,26 @@ static void pnv_smp_cpu_kill_self(void) · 170 unmodified lines | ||
| 171 | 171 | * so clear LPCR:PECE1. We keep PECE2 enabled. |
| 172 | 172 | */ |
| 173 | 173 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1); |
| 174 | + | |
| 175 | + /* | |
| 176 | + * Hard-disable interrupts, and then clear irq_happened flags | |
| 177 | + * that we can safely ignore while off-line, since they | |
| 178 | + * are for things for which we do no processing when off-line | |
| 179 | + * (or in the case of HMI, all the processing we need to do | |
| 180 | + * is done in lower-level real-mode code). | |
| 181 | + */ | |
| 182 | + hard_irq_disable(); | |
| 183 | + local_paca->irq_happened &= ~(PACA_IRQ_DEC | PACA_IRQ_HMI); | |
| 184 | + | |
| 174 | 185 | while (!generic_check_cpu_restart(cpu)) { |
| 186 | + /* | |
| 187 | + * Clear IPI flag, since we don't handle IPIs while | |
| 188 | + * offline, except for those when changing micro-threading | |
| 189 | + * mode, which are handled explicitly below, and those | |
| 190 | + * for coming online, which are handled via | |
| 191 | + * generic_check_cpu_restart() calls. | |
| 192 | + */ | |
| 193 | + kvmppc_set_host_ipi(cpu, 0); | |
| 175 | 194 | |
| 176 | 195 | ppc64_runlatch_off(); |
| 177 | 196 | |
| @@ -196,20 +215,20 @@ static void pnv_smp_cpu_kill_self(void) · 18 unmodified lines | ||
| 196 | 215 | * having finished executing in a KVM guest, then srr1 |
| 197 | 216 | * contains 0. |
| 198 | 217 | */ |
| 199 | − if ((srr1 & wmask) == SRR1_WAKEEE) { | |
| 218 | + if (((srr1 & wmask) == SRR1_WAKEEE) || | |
| 219 | + (local_paca->irq_happened & PACA_IRQ_EE)) { | |
| 200 | 220 | icp_native_flush_interrupt(); |
| 201 | − local_paca->irq_happened &= PACA_IRQ_HARD_DIS; | |
| 202 | − smp_mb(); | |
| 203 | 221 | } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) { |
| 204 | 222 | unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); |
| 205 | 223 | asm volatile(PPC_MSGCLR(%0) : : "r" (msg)); |
| 206 | − kvmppc_set_host_ipi(cpu, 0); | |
| 207 | 224 | } |
| 225 | + local_paca->irq_happened &= ~(PACA_IRQ_EE | PACA_IRQ_DBELL); | |
| 226 | + smp_mb(); | |
| 208 | 227 | |
| 209 | 228 | if (cpu_core_split_required()) |
| 210 | 229 | continue; |
| 211 | 230 | |
| 212 | − if (!generic_check_cpu_restart(cpu)) | |
| 231 | + if (srr1 && !generic_check_cpu_restart(cpu)) | |
| 213 | 232 | DBG("CPU%d Unexpected exit while offline !\n", cpu); |
| 214 | 233 | } |
| 215 | 234 | mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1); |
| @@ -194,11 +194,6 @@ static const struct os_area_db_id os_area_db_id_rtc_diff = { · 193 unmodified lines | ||
| 194 | 194 | .key = OS_AREA_DB_KEY_RTC_DIFF |
| 195 | 195 | }; |
| 196 | 196 | |
| 197 | −static const struct os_area_db_id os_area_db_id_video_mode = { | |
| 198 | − .owner = OS_AREA_DB_OWNER_LINUX, | |
| 199 | − .key = OS_AREA_DB_KEY_VIDEO_MODE | |
| 200 | −}; | |
| 201 | − | |
| 202 | 197 | #define SECONDS_FROM_1970_TO_2000 946684800LL |
| 203 | 198 | |
| 204 | 199 | /** |
| @@ -59,6 +59,7 @@ pages_do_alias(unsigned long addr1, unsigned long addr2) · 58 unmodified lines | ||
| 59 | 59 | |
| 60 | 60 | #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) |
| 61 | 61 | extern void copy_page(void *to, void *from); |
| 62 | +#define copy_user_page(to, from, vaddr, pg) __copy_user(to, from, PAGE_SIZE) | |
| 62 | 63 | |
| 63 | 64 | struct page; |
| 64 | 65 | struct vm_area_struct; |
| @@ -433,6 +433,7 @@ static struct crypto_alg algs[] = { { · 432 unmodified lines | ||
| 433 | 433 | .blkcipher = { |
| 434 | 434 | .min_keysize = AES_MIN_KEY_SIZE, |
| 435 | 435 | .max_keysize = AES_MAX_KEY_SIZE, |
| 436 | + .ivsize = AES_BLOCK_SIZE, | |
| 436 | 437 | .setkey = aes_set_key, |
| 437 | 438 | .encrypt = cbc_encrypt, |
| 438 | 439 | .decrypt = cbc_decrypt, |
| @@ -452,6 +453,7 @@ static struct crypto_alg algs[] = { { · 13 unmodified lines | ||
| 452 | 453 | .blkcipher = { |
| 453 | 454 | .min_keysize = AES_MIN_KEY_SIZE, |
| 454 | 455 | .max_keysize = AES_MAX_KEY_SIZE, |
| 456 | + .ivsize = AES_BLOCK_SIZE, | |
| 455 | 457 | .setkey = aes_set_key, |
| 456 | 458 | .encrypt = ctr_crypt, |
| 457 | 459 | .decrypt = ctr_crypt, |
| @@ -274,6 +274,7 @@ static struct crypto_alg algs[] = { { · 273 unmodified lines | ||
| 274 | 274 | .blkcipher = { |
| 275 | 275 | .min_keysize = CAMELLIA_MIN_KEY_SIZE, |
| 276 | 276 | .max_keysize = CAMELLIA_MAX_KEY_SIZE, |
| 277 | + .ivsize = CAMELLIA_BLOCK_SIZE, | |
| 277 | 278 | .setkey = camellia_set_key, |
| 278 | 279 | .encrypt = cbc_encrypt, |
| 279 | 280 | .decrypt = cbc_decrypt, |
| @@ -429,6 +429,7 @@ static struct crypto_alg algs[] = { { · 428 unmodified lines | ||
| 429 | 429 | .blkcipher = { |
| 430 | 430 | .min_keysize = DES_KEY_SIZE, |
| 431 | 431 | .max_keysize = DES_KEY_SIZE, |
| 432 | + .ivsize = DES_BLOCK_SIZE, | |
| 432 | 433 | .setkey = des_set_key, |
| 433 | 434 | .encrypt = cbc_encrypt, |
| 434 | 435 | .decrypt = cbc_decrypt, |
| @@ -485,6 +486,7 @@ static struct crypto_alg algs[] = { { · 50 unmodified lines | ||
| 485 | 486 | .blkcipher = { |
| 486 | 487 | .min_keysize = DES3_EDE_KEY_SIZE, |
| 487 | 488 | .max_keysize = DES3_EDE_KEY_SIZE, |
| 489 | + .ivsize = DES3_EDE_BLOCK_SIZE, | |
| 488 | 490 | .setkey = des3_ede_set_key, |
| 489 | 491 | .encrypt = cbc3_encrypt, |
| 490 | 492 | .decrypt = cbc3_decrypt, |
| @@ -70,8 +70,8 @@ KBUILD_AFLAGS += $(ARCH_INCLUDE) · 69 unmodified lines | ||
| 70 | 70 | |
| 71 | 71 | USER_CFLAGS = $(patsubst $(KERNEL_DEFINES),,$(patsubst -I%,,$(KBUILD_CFLAGS))) \ |
| 72 | 72 | $(ARCH_INCLUDE) $(MODE_INCLUDE) $(filter -I%,$(CFLAGS)) \ |
| 73 | − -D_FILE_OFFSET_BITS=64 -idirafter include \ | |
| 74 | − -D__KERNEL__ -D__UM_HOST__ | |
| 73 | + -D_FILE_OFFSET_BITS=64 -idirafter $(srctree)/include \ | |
| 74 | + -idirafter $(obj)/include -D__KERNEL__ -D__UM_HOST__ | |
| 75 | 75 | |
| 76 | 76 | #This will adjust *FLAGS accordingly to the platform. |
| 77 | 77 | include $(ARCH_DIR)/Makefile-os-$(OS) |
| @@ -220,7 +220,7 @@ unsigned long segv(struct faultinfo fi, unsigned long ip, int is_user, · 219 unmodified lines | ||
| 220 | 220 | show_regs(container_of(regs, struct pt_regs, regs)); |
| 221 | 221 | panic("Segfault with no mm"); |
| 222 | 222 | } |
| 223 | − else if (!is_user && address < TASK_SIZE) { | |
| 223 | + else if (!is_user && address > PAGE_SIZE && address < TASK_SIZE) { | |
| 224 | 224 | show_regs(container_of(regs, struct pt_regs, regs)); |
| 225 | 225 | panic("Kernel tried to access user memory at addr 0x%lx, ip 0x%lx", |
| 226 | 226 | address, ip); |
| @@ -96,7 +96,7 @@ int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv) · 95 unmodified lines | ||
| 96 | 96 | "ret = %d\n", -n); |
| 97 | 97 | ret = n; |
| 98 | 98 | } |
| 99 | − CATCH_EINTR(waitpid(pid, NULL, __WCLONE)); | |
| 99 | + CATCH_EINTR(waitpid(pid, NULL, __WALL)); | |
| 100 | 100 | } |
| 101 | 101 | |
| 102 | 102 | out_free2: |
| @@ -129,7 +129,7 @@ int run_helper_thread(int (*proc)(void *), void *arg, unsigned int flags, · 26 unmodified lines | ||
| 129 | 129 | return err; |
| 130 | 130 | } |
| 131 | 131 | if (stack_out == NULL) { |
| 132 | − CATCH_EINTR(pid = waitpid(pid, &status, __WCLONE)); | |
| 132 | + CATCH_EINTR(pid = waitpid(pid, &status, __WALL)); | |
| 133 | 133 | if (pid < 0) { |
| 134 | 134 | err = -errno; |
| 135 | 135 | printk(UM_KERN_ERR "run_helper_thread - wait failed, " |
| @@ -148,7 +148,7 @@ int run_helper_thread(int (*proc)(void *), void *arg, unsigned int flags, · 12 unmodified lines | ||
| 148 | 148 | int helper_wait(int pid) |
| 149 | 149 | { |
| 150 | 150 | int ret, status; |
| 151 | − int wflags = __WCLONE; | |
| 151 | + int wflags = __WALL; | |
| 152 | 152 | |
| 153 | 153 | CATCH_EINTR(ret = waitpid(pid, &status, wflags)); |
| 154 | 154 | if (ret < 0) { |
| @@ -667,6 +667,7 @@ setup_gop32(struct screen_info *si, efi_guid_t *proto, · 666 unmodified lines | ||
| 667 | 667 | bool conout_found = false; |
| 668 | 668 | void *dummy = NULL; |
| 669 | 669 | u32 h = handles[i]; |
| 670 | + u32 current_fb_base; | |
| 670 | 671 | |
| 671 | 672 | status = efi_call_early(handle_protocol, h, |
| 672 | 673 | proto, (void **)&gop32); |
| @@ -678,7 +679,7 @@ setup_gop32(struct screen_info *si, efi_guid_t *proto, · 5 unmodified lines | ||
| 678 | 679 | if (status == EFI_SUCCESS) |
| 679 | 680 | conout_found = true; |
| 680 | 681 | |
| 681 | − status = __gop_query32(gop32, &info, &size, &fb_base); | |
| 682 | + status = __gop_query32(gop32, &info, &size, ¤t_fb_base); | |
| 682 | 683 | if (status == EFI_SUCCESS && (!first_gop || conout_found)) { |
| 683 | 684 | /* |
| 684 | 685 | * Systems that use the UEFI Console Splitter may |
| @@ -692,6 +693,7 @@ setup_gop32(struct screen_info *si, efi_guid_t *proto, · 7 unmodified lines | ||
| 692 | 693 | pixel_format = info->pixel_format; |
| 693 | 694 | pixel_info = info->pixel_information; |
| 694 | 695 | pixels_per_scan_line = info->pixels_per_scan_line; |
| 696 | + fb_base = current_fb_base; | |
| 695 | 697 | |
| 696 | 698 | /* |
| 697 | 699 | * Once we've found a GOP supporting ConOut, |
| @@ -770,6 +772,7 @@ setup_gop64(struct screen_info *si, efi_guid_t *proto, · 72 unmodified lines | ||
| 770 | 772 | bool conout_found = false; |
| 771 | 773 | void *dummy = NULL; |
| 772 | 774 | u64 h = handles[i]; |
| 775 | + u32 current_fb_base; | |
| 773 | 776 | |
| 774 | 777 | status = efi_call_early(handle_protocol, h, |
| 775 | 778 | proto, (void **)&gop64); |
| @@ -781,7 +784,7 @@ setup_gop64(struct screen_info *si, efi_guid_t *proto, · 5 unmodified lines | ||
| 781 | 784 | if (status == EFI_SUCCESS) |
| 782 | 785 | conout_found = true; |
| 783 | 786 | |
| 784 | − status = __gop_query64(gop64, &info, &size, &fb_base); | |
| 787 | + status = __gop_query64(gop64, &info, &size, ¤t_fb_base); | |
| 785 | 788 | if (status == EFI_SUCCESS && (!first_gop || conout_found)) { |
| 786 | 789 | /* |
| 787 | 790 | * Systems that use the UEFI Console Splitter may |
| @@ -795,6 +798,7 @@ setup_gop64(struct screen_info *si, efi_guid_t *proto, · 7 unmodified lines | ||
| 795 | 798 | pixel_format = info->pixel_format; |
| 796 | 799 | pixel_info = info->pixel_information; |
| 797 | 800 | pixels_per_scan_line = info->pixels_per_scan_line; |
| 801 | + fb_base = current_fb_base; | |
| 798 | 802 | |
| 799 | 803 | /* |
| 800 | 804 | * Once we've found a GOP supporting ConOut, |
| @@ -554,6 +554,11 @@ static int __init camellia_aesni_init(void) · 553 unmodified lines | ||
| 554 | 554 | { |
| 555 | 555 | const char *feature_name; |
| 556 | 556 | |
| 557 | + if (!cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) { | |
| 558 | + pr_info("AVX or AES-NI instructions are not detected.\n"); | |
| 559 | + return -ENODEV; | |
| 560 | + } | |
| 561 | + | |
| 557 | 562 | if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &feature_name)) { |
| 558 | 563 | pr_info("CPU feature '%s' is not supported.\n", feature_name); |
| 559 | 564 | return -ENODEV; |
| @@ -1226,10 +1226,8 @@ void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); · 1225 unmodified lines | ||
| 1226 | 1226 | |
| 1227 | 1227 | int kvm_is_in_guest(void); |
| 1228 | 1228 | |
| 1229 | −int __x86_set_memory_region(struct kvm *kvm, | |
| 1230 | − const struct kvm_userspace_memory_region *mem); | |
| 1231 | −int x86_set_memory_region(struct kvm *kvm, | |
| 1232 | − const struct kvm_userspace_memory_region *mem); | |
| 1229 | +int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); | |
| 1230 | +int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); | |
| 1233 | 1231 | bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); |
| 1234 | 1232 | bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); |
| 1235 | 1233 | |
| @@ -27,12 +27,11 @@ static __always_inline void *__inline_memcpy(void *to, const void *from, size_t · 26 unmodified lines | ||
| 27 | 27 | function. */ |
| 28 | 28 | |
| 29 | 29 | #define __HAVE_ARCH_MEMCPY 1 |
| 30 | +extern void *memcpy(void *to, const void *from, size_t len); | |
| 30 | 31 | extern void *__memcpy(void *to, const void *from, size_t len); |
| 31 | 32 | |
| 32 | 33 | #ifndef CONFIG_KMEMCHECK |
| 33 | −#if (__GNUC__ == 4 && __GNUC_MINOR__ >= 3) || __GNUC__ > 4 | |
| 34 | −extern void *memcpy(void *to, const void *from, size_t len); | |
| 35 | −#else | |
| 34 | +#if (__GNUC__ == 4 && __GNUC_MINOR__ < 3) || __GNUC__ < 4 | |
| 36 | 35 | #define memcpy(dst, src, len) \ |
| 37 | 36 | ({ \ |
| 38 | 37 | size_t __len = (len); \ |
| @@ -2907,6 +2907,7 @@ int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq, · 2906 unmodified lines | ||
| 2907 | 2907 | struct irq_data *irq_data; |
| 2908 | 2908 | struct mp_chip_data *data; |
| 2909 | 2909 | struct irq_alloc_info *info = arg; |
| 2910 | + unsigned long flags; | |
| 2910 | 2911 | |
| 2911 | 2912 | if (!info || nr_irqs > 1) |
| 2912 | 2913 | return -EINVAL; |
| @@ -2939,11 +2940,14 @@ int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq, · 26 unmodified lines | ||
| 2939 | 2940 | |
| 2940 | 2941 | cfg = irqd_cfg(irq_data); |
| 2941 | 2942 | add_pin_to_irq_node(data, ioapic_alloc_attr_node(info), ioapic, pin); |
| 2943 | + | |
| 2944 | + local_irq_save(flags); | |
| 2942 | 2945 | if (info->ioapic_entry) |
| 2943 | 2946 | mp_setup_entry(cfg, data, info->ioapic_entry); |
| 2944 | 2947 | mp_register_handler(virq, data->trigger); |
| 2945 | 2948 | if (virq < nr_legacy_irqs()) |
| 2946 | 2949 | legacy_pic->mask(virq); |
| 2950 | + local_irq_restore(flags); | |
| 2947 | 2951 | |
| 2948 | 2952 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 2949 | 2953 | "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> IRQ %d Mode:%i Active:%i Dest:%d)\n", |
| @@ -550,14 +550,14 @@ unsigned long get_wchan(struct task_struct *p) · 549 unmodified lines | ||
| 550 | 550 | if (sp < bottom || sp > top) |
| 551 | 551 | return 0; |
| 552 | 552 | |
| 553 | − fp = READ_ONCE(*(unsigned long *)sp); | |
| 553 | + fp = READ_ONCE_NOCHECK(*(unsigned long *)sp); | |
| 554 | 554 | do { |
| 555 | 555 | if (fp < bottom || fp > top) |
| 556 | 556 | return 0; |
| 557 | − ip = READ_ONCE(*(unsigned long *)(fp + sizeof(unsigned long))); | |
| 557 | + ip = READ_ONCE_NOCHECK(*(unsigned long *)(fp + sizeof(unsigned long))); | |
| 558 | 558 | if (!in_sched_functions(ip)) |
| 559 | 559 | return ip; |
| 560 | − fp = READ_ONCE(*(unsigned long *)fp); | |
| 560 | + fp = READ_ONCE_NOCHECK(*(unsigned long *)fp); | |
| 561 | 561 | } while (count++ < 16 && p->state != TASK_RUNNING); |
| 562 | 562 | return 0; |
| 563 | 563 | } |
| @@ -1173,6 +1173,14 @@ void __init setup_arch(char **cmdline_p) · 1172 unmodified lines | ||
| 1173 | 1173 | clone_pgd_range(initial_page_table + KERNEL_PGD_BOUNDARY, |
| 1174 | 1174 | swapper_pg_dir + KERNEL_PGD_BOUNDARY, |
| 1175 | 1175 | KERNEL_PGD_PTRS); |
| 1176 | + | |
| 1177 | + /* | |
| 1178 | + * sync back low identity map too. It is used for example | |
| 1179 | + * in the 32-bit EFI stub. | |
| 1180 | + */ | |
| 1181 | + clone_pgd_range(initial_page_table, | |
| 1182 | + swapper_pg_dir + KERNEL_PGD_BOUNDARY, | |
| 1183 | + KERNEL_PGD_PTRS); | |
| 1176 | 1184 | #endif |
| 1177 | 1185 | |
| 1178 | 1186 | tboot_probe(); |
| @@ -509,7 +509,7 @@ void __inquire_remote_apic(int apicid) · 508 unmodified lines | ||
| 509 | 509 | */ |
| 510 | 510 | #define UDELAY_10MS_DEFAULT 10000 |
| 511 | 511 | |
| 512 | −static unsigned int init_udelay = UDELAY_10MS_DEFAULT; | |
| 512 | +static unsigned int init_udelay = INT_MAX; | |
| 513 | 513 | |
| 514 | 514 | static int __init cpu_init_udelay(char *str) |
| 515 | 515 | { |
| @@ -522,13 +522,16 @@ early_param("cpu_init_udelay", cpu_init_udelay); · 6 unmodified lines | ||
| 522 | 522 | static void __init smp_quirk_init_udelay(void) |
| 523 | 523 | { |
| 524 | 524 | /* if cmdline changed it from default, leave it alone */ |
| 525 | − if (init_udelay != UDELAY_10MS_DEFAULT) | |
| 525 | + if (init_udelay != INT_MAX) | |
| 526 | 526 | return; |
| 527 | 527 | |
| 528 | 528 | /* if modern processor, use no delay */ |
| 529 | 529 | if (((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 6)) || |
| 530 | 530 | ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && (boot_cpu_data.x86 >= 0xF))) |
| 531 | 531 | init_udelay = 0; |
| 532 | + | |
| 533 | + /* else, use legacy delay */ | |
| 534 | + init_udelay = UDELAY_10MS_DEFAULT; | |
| 532 | 535 | } |
| 533 | 536 | |
| 534 | 537 | /* |
| @@ -657,7 +660,9 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) · 122 unmodified lines | ||
| 657 | 660 | /* |
| 658 | 661 | * Give the other CPU some time to accept the IPI. |
| 659 | 662 | */ |
| 660 | − if (init_udelay) | |
| 663 | + if (init_udelay == 0) | |
| 664 | + udelay(10); | |
| 665 | + else | |
| 661 | 666 | udelay(300); |
| 662 | 667 | |
| 663 | 668 | pr_debug("Startup point 1\n"); |
| @@ -668,7 +673,9 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) · 4 unmodified lines | ||
| 668 | 673 | /* |
| 669 | 674 | * Give the other CPU some time to accept the IPI. |
| 670 | 675 | */ |
| 671 | − if (init_udelay) | |
| 676 | + if (init_udelay == 0) | |
| 677 | + udelay(10); | |
| 678 | + else | |
| 672 | 679 | udelay(200); |
| 673 | 680 | |
| 674 | 681 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ |
| @@ -2418,7 +2418,7 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, u64 smbase) · 2417 unmodified lines | ||
| 2418 | 2418 | u64 val, cr0, cr4; |
| 2419 | 2419 | u32 base3; |
| 2420 | 2420 | u16 selector; |
| 2421 | − int i; | |
| 2421 | + int i, r; | |
| 2422 | 2422 | |
| 2423 | 2423 | for (i = 0; i < 16; i++) |
| 2424 | 2424 | *reg_write(ctxt, i) = GET_SMSTATE(u64, smbase, 0x7ff8 - i * 8); |
| @@ -2460,13 +2460,17 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, u64 smbase) · 35 unmodified lines | ||
| 2460 | 2460 | dt.address = GET_SMSTATE(u64, smbase, 0x7e68); |
| 2461 | 2461 | ctxt->ops->set_gdt(ctxt, &dt); |
| 2462 | 2462 | |
| 2463 | + r = rsm_enter_protected_mode(ctxt, cr0, cr4); | |
| 2464 | + if (r != X86EMUL_CONTINUE) | |
| 2465 | + return r; | |
| 2466 | + | |
| 2463 | 2467 | for (i = 0; i < 6; i++) { |
| 2464 | − int r = rsm_load_seg_64(ctxt, smbase, i); | |
| 2468 | + r = rsm_load_seg_64(ctxt, smbase, i); | |
| 2465 | 2469 | if (r != X86EMUL_CONTINUE) |
| 2466 | 2470 | return r; |
| 2467 | 2471 | } |
| 2468 | 2472 | |
| 2469 | − return rsm_enter_protected_mode(ctxt, cr0, cr4); | |
| 2473 | + return X86EMUL_CONTINUE; | |
| 2470 | 2474 | } |
| 2471 | 2475 | |
| 2472 | 2476 | static int em_rsm(struct x86_emulate_ctxt *ctxt) |
| @@ -4105,17 +4105,13 @@ static void seg_setup(int seg) · 4104 unmodified lines | ||
| 4105 | 4105 | static int alloc_apic_access_page(struct kvm *kvm) |
| 4106 | 4106 | { |
| 4107 | 4107 | struct page *page; |
| 4108 | − struct kvm_userspace_memory_region kvm_userspace_mem; | |
| 4109 | 4108 | int r = 0; |
| 4110 | 4109 | |
| 4111 | 4110 | mutex_lock(&kvm->slots_lock); |
| 4112 | 4111 | if (kvm->arch.apic_access_page_done) |
| 4113 | 4112 | goto out; |
| 4114 | − kvm_userspace_mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT; | |
| 4115 | − kvm_userspace_mem.flags = 0; | |
| 4116 | − kvm_userspace_mem.guest_phys_addr = APIC_DEFAULT_PHYS_BASE; | |
| 4117 | − kvm_userspace_mem.memory_size = PAGE_SIZE; | |
| 4118 | − r = __x86_set_memory_region(kvm, &kvm_userspace_mem); | |
| 4113 | + r = __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, | |
| 4114 | + APIC_DEFAULT_PHYS_BASE, PAGE_SIZE); | |
| 4119 | 4115 | if (r) |
| 4120 | 4116 | goto out; |
| 4121 | 4117 | |
| @@ -4140,17 +4136,12 @@ static int alloc_identity_pagetable(struct kvm *kvm) · 18 unmodified lines | ||
| 4140 | 4136 | { |
| 4141 | 4137 | /* Called with kvm->slots_lock held. */ |
| 4142 | 4138 | |
| 4143 | − struct kvm_userspace_memory_region kvm_userspace_mem; | |
| 4144 | 4139 | int r = 0; |
| 4145 | 4140 | |
| 4146 | 4141 | BUG_ON(kvm->arch.ept_identity_pagetable_done); |
| 4147 | 4142 | |
| 4148 | − kvm_userspace_mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT; | |
| 4149 | − kvm_userspace_mem.flags = 0; | |
| 4150 | − kvm_userspace_mem.guest_phys_addr = | |
| 4151 | − kvm->arch.ept_identity_map_addr; | |
| 4152 | − kvm_userspace_mem.memory_size = PAGE_SIZE; | |
| 4153 | − r = __x86_set_memory_region(kvm, &kvm_userspace_mem); | |
| 4143 | + r = __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, | |
| 4144 | + kvm->arch.ept_identity_map_addr, PAGE_SIZE); | |
| 4154 | 4145 | |
| 4155 | 4146 | return r; |
| 4156 | 4147 | } |
| @@ -4949,14 +4940,9 @@ static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu) · 792 unmodified lines | ||
| 4949 | 4940 | static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr) |
| 4950 | 4941 | { |
| 4951 | 4942 | int ret; |
| 4952 | − struct kvm_userspace_memory_region tss_mem = { | |
| 4953 | − .slot = TSS_PRIVATE_MEMSLOT, | |
| 4954 | − .guest_phys_addr = addr, | |
| 4955 | − .memory_size = PAGE_SIZE * 3, | |
| 4956 | − .flags = 0, | |
| 4957 | − }; | |
| 4958 | 4943 | |
| 4959 | − ret = x86_set_memory_region(kvm, &tss_mem); | |
| 4944 | + ret = x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, addr, | |
| 4945 | + PAGE_SIZE * 3); | |
| 4960 | 4946 | if (ret) |
| 4961 | 4947 | return ret; |
| 4962 | 4948 | kvm->arch.tss_addr = addr; |
| @@ -6453,6 +6453,12 @@ static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu) · 6452 unmodified lines | ||
| 6453 | 6453 | return 1; |
| 6454 | 6454 | } |
| 6455 | 6455 | |
| 6456 | +static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu) | |
| 6457 | +{ | |
| 6458 | + return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE && | |
| 6459 | + !vcpu->arch.apf.halted); | |
| 6460 | +} | |
| 6461 | + | |
| 6456 | 6462 | static int vcpu_run(struct kvm_vcpu *vcpu) |
| 6457 | 6463 | { |
| 6458 | 6464 | int r; |
| @@ -6461,8 +6467,7 @@ static int vcpu_run(struct kvm_vcpu *vcpu) · 2 unmodified lines | ||
| 6461 | 6467 | vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); |
| 6462 | 6468 | |
| 6463 | 6469 | for (;;) { |
| 6464 | − if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE && | |
| 6465 | − !vcpu->arch.apf.halted) | |
| 6470 | + if (kvm_vcpu_running(vcpu)) | |
| 6466 | 6471 | r = vcpu_enter_guest(vcpu); |
| 6467 | 6472 | else |
| 6468 | 6473 | r = vcpu_block(kvm, vcpu); |
| @@ -7474,34 +7479,66 @@ void kvm_arch_sync_events(struct kvm *kvm) · 1005 unmodified lines | ||
| 7474 | 7479 | kvm_free_pit(kvm); |
| 7475 | 7480 | } |
| 7476 | 7481 | |
| 7477 | −int __x86_set_memory_region(struct kvm *kvm, | |
| 7478 | − const struct kvm_userspace_memory_region *mem) | |
| 7482 | +int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size) | |
| 7479 | 7483 | { |
| 7480 | 7484 | int i, r; |
| 7485 | + unsigned long hva; | |
| 7486 | + struct kvm_memslots *slots = kvm_memslots(kvm); | |
| 7487 | + struct kvm_memory_slot *slot, old; | |
| 7481 | 7488 | |
| 7482 | 7489 | /* Called with kvm->slots_lock held. */ |
| 7483 | − BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM); | |
| 7490 | + if (WARN_ON(id >= KVM_MEM_SLOTS_NUM)) | |
| 7491 | + return -EINVAL; | |
| 7492 | + | |
| 7493 | + slot = id_to_memslot(slots, id); | |
| 7494 | + if (size) { | |
| 7495 | + if (WARN_ON(slot->npages)) | |
| 7496 | + return -EEXIST; | |
| 7497 | + | |
| 7498 | + /* | |
| 7499 | + * MAP_SHARED to prevent internal slot pages from being moved | |
| 7500 | + * by fork()/COW. | |
| 7501 | + */ | |
| 7502 | + hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE, | |
| 7503 | + MAP_SHARED | MAP_ANONYMOUS, 0); | |
| 7504 | + if (IS_ERR((void *)hva)) | |
| 7505 | + return PTR_ERR((void *)hva); | |
| 7506 | + } else { | |
| 7507 | + if (!slot->npages) | |
| 7508 | + return 0; | |
| 7484 | 7509 | |
| 7510 | + hva = 0; | |
| 7511 | + } | |
| 7512 | + | |
| 7513 | + old = *slot; | |
| 7485 | 7514 | for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { |
| 7486 | − struct kvm_userspace_memory_region m = *mem; | |
| 7515 | + struct kvm_userspace_memory_region m; | |
| 7487 | 7516 | |
| 7488 | − m.slot |= i << 16; | |
| 7517 | + m.slot = id | (i << 16); | |
| 7518 | + m.flags = 0; | |
| 7519 | + m.guest_phys_addr = gpa; | |
| 7520 | + m.userspace_addr = hva; | |
| 7521 | + m.memory_size = size; | |
| 7489 | 7522 | r = __kvm_set_memory_region(kvm, &m); |
| 7490 | 7523 | if (r < 0) |
| 7491 | 7524 | return r; |
| 7492 | 7525 | } |
| 7493 | 7526 | |
| 7527 | + if (!size) { | |
| 7528 | + r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE); | |
| 7529 | + WARN_ON(r < 0); | |
| 7530 | + } | |
| 7531 | + | |
| 7494 | 7532 | return 0; |
| 7495 | 7533 | } |
| 7496 | 7534 | EXPORT_SYMBOL_GPL(__x86_set_memory_region); |
| 7497 | 7535 | |
| 7498 | −int x86_set_memory_region(struct kvm *kvm, | |
| 7499 | − const struct kvm_userspace_memory_region *mem) | |
| 7536 | +int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size) | |
| 7500 | 7537 | { |
| 7501 | 7538 | int r; |
| 7502 | 7539 | |
| 7503 | 7540 | mutex_lock(&kvm->slots_lock); |
| 7504 | − r = __x86_set_memory_region(kvm, mem); | |
| 7541 | + r = __x86_set_memory_region(kvm, id, gpa, size); | |
| 7505 | 7542 | mutex_unlock(&kvm->slots_lock); |
| 7506 | 7543 | |
| 7507 | 7544 | return r; |
| @@ -7516,16 +7553,9 @@ void kvm_arch_destroy_vm(struct kvm *kvm) · 8 unmodified lines | ||
| 7516 | 7553 | * unless the the memory map has changed due to process exit |
| 7517 | 7554 | * or fd copying. |
| 7518 | 7555 | */ |
| 7519 | − struct kvm_userspace_memory_region mem; | |
| 7520 | − memset(&mem, 0, sizeof(mem)); | |
| 7521 | − mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT; | |
| 7522 | − x86_set_memory_region(kvm, &mem); | |
| 7523 | − | |
| 7524 | − mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT; | |
| 7525 | − x86_set_memory_region(kvm, &mem); | |
| 7526 | − | |
| 7527 | − mem.slot = TSS_PRIVATE_MEMSLOT; | |
| 7528 | − x86_set_memory_region(kvm, &mem); | |
| 7556 | + x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0); | |
| 7557 | + x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0); | |
| 7558 | + x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0); | |
| 7529 | 7559 | } |
| 7530 | 7560 | kvm_iommu_unmap_guest(kvm); |
| 7531 | 7561 | kfree(kvm->arch.vpic); |
| @@ -7628,27 +7658,6 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, · 96 unmodified lines | ||
| 7628 | 7658 | const struct kvm_userspace_memory_region *mem, |
| 7629 | 7659 | enum kvm_mr_change change) |
| 7630 | 7660 | { |
| 7631 | − /* | |
| 7632 | − * Only private memory slots need to be mapped here since | |
| 7633 | − * KVM_SET_MEMORY_REGION ioctl is no longer supported. | |
| 7634 | − */ | |
| 7635 | − if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) { | |
| 7636 | − unsigned long userspace_addr; | |
| 7637 | − | |
| 7638 | − /* | |
| 7639 | − * MAP_SHARED to prevent internal slot pages from being moved | |
| 7640 | − * by fork()/COW. | |
| 7641 | − */ | |
| 7642 | − userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE, | |
| 7643 | − PROT_READ | PROT_WRITE, | |
| 7644 | − MAP_SHARED | MAP_ANONYMOUS, 0); | |
| 7645 | − | |
| 7646 | − if (IS_ERR((void *)userspace_addr)) | |
| 7647 | − return PTR_ERR((void *)userspace_addr); | |
| 7648 | − | |
| 7649 | − memslot->userspace_addr = userspace_addr; | |
| 7650 | − } | |
| 7651 | − | |
| 7652 | 7661 | return 0; |
| 7653 | 7662 | } |
| 7654 | 7663 | |
| @@ -7710,17 +7719,6 @@ void kvm_arch_commit_memory_region(struct kvm *kvm, · 55 unmodified lines | ||
| 7710 | 7719 | { |
| 7711 | 7720 | int nr_mmu_pages = 0; |
| 7712 | 7721 | |
| 7713 | − if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) { | |
| 7714 | − int ret; | |
| 7715 | − | |
| 7716 | − ret = vm_munmap(old->userspace_addr, | |
| 7717 | − old->npages * PAGE_SIZE); | |
| 7718 | − if (ret < 0) | |
| 7719 | − printk(KERN_WARNING | |
| 7720 | − "kvm_vm_ioctl_set_memory_region: " | |
| 7721 | − "failed to munmap memory\n"); | |
| 7722 | − } | |
| 7723 | − | |
| 7724 | 7722 | if (!kvm->arch.n_requested_mmu_pages) |
| 7725 | 7723 | nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm); |
| 7726 | 7724 | |
| @@ -7769,19 +7767,36 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm, · 42 unmodified lines | ||
| 7769 | 7767 | kvm_mmu_invalidate_zap_all_pages(kvm); |
| 7770 | 7768 | } |
| 7771 | 7769 | |
| 7770 | +static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu) | |
| 7771 | +{ | |
| 7772 | + if (!list_empty_careful(&vcpu->async_pf.done)) | |
| 7773 | + return true; | |
| 7774 | + | |
| 7775 | + if (kvm_apic_has_events(vcpu)) | |
| 7776 | + return true; | |
| 7777 | + | |
| 7778 | + if (vcpu->arch.pv.pv_unhalted) | |
| 7779 | + return true; | |
| 7780 | + | |
| 7781 | + if (atomic_read(&vcpu->arch.nmi_queued)) | |
| 7782 | + return true; | |
| 7783 | + | |
| 7784 | + if (test_bit(KVM_REQ_SMI, &vcpu->requests)) | |
| 7785 | + return true; | |
| 7786 | + | |
| 7787 | + if (kvm_arch_interrupt_allowed(vcpu) && | |
| 7788 | + kvm_cpu_has_interrupt(vcpu)) | |
| 7789 | + return true; | |
| 7790 | + | |
| 7791 | + return false; | |
| 7792 | +} | |
| 7793 | + | |
| 7772 | 7794 | int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu) |
| 7773 | 7795 | { |
| 7774 | 7796 | if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) |
| 7775 | 7797 | kvm_x86_ops->check_nested_events(vcpu, false); |
| 7776 | 7798 | |
| 7777 | − return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE && | |
| 7778 | − !vcpu->arch.apf.halted) | |
| 7779 | − || !list_empty_careful(&vcpu->async_pf.done) | |
| 7780 | − || kvm_apic_has_events(vcpu) | |
| 7781 | − || vcpu->arch.pv.pv_unhalted | |
| 7782 | − || atomic_read(&vcpu->arch.nmi_queued) || | |
| 7783 | − (kvm_arch_interrupt_allowed(vcpu) && | |
| 7784 | − kvm_cpu_has_interrupt(vcpu)); | |
| 7799 | + return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu); | |
| 7785 | 7800 | } |
| 7786 | 7801 | |
| 7787 | 7802 | int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) |
| @@ -12,7 +12,10 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <skas.h> |
| 13 | 13 | #include <sysdep/tls.h> |
| 14 | 14 | |
| 15 | −extern int modify_ldt(int func, void *ptr, unsigned long bytecount); | |
| 15 | +static inline int modify_ldt (int func, void *ptr, unsigned long bytecount) | |
| 16 | +{ | |
| 17 | + return syscall(__NR_modify_ldt, func, ptr, bytecount); | |
| 18 | +} | |
| 16 | 19 | |
| 17 | 20 | static long write_ldt_entry(struct mm_id *mm_idp, int func, |
| 18 | 21 | struct user_desc *desc, void **addr, int done) |
| @@ -576,7 +576,7 @@ void blk_cleanup_queue(struct request_queue *q) · 575 unmodified lines | ||
| 576 | 576 | q->queue_lock = &q->__queue_lock; |
| 577 | 577 | spin_unlock_irq(lock); |
| 578 | 578 | |
| 579 | − bdi_destroy(&q->backing_dev_info); | |
| 579 | + bdi_unregister(&q->backing_dev_info); | |
| 580 | 580 | |
| 581 | 581 | /* @q is and will stay empty, shutdown and put */ |
| 582 | 582 | blk_put_queue(q); |
| @@ -641,6 +641,7 @@ void blk_mq_free_tags(struct blk_mq_tags *tags) · 640 unmodified lines | ||
| 641 | 641 | { |
| 642 | 642 | bt_free(&tags->bitmap_tags); |
| 643 | 643 | bt_free(&tags->breserved_tags); |
| 644 | + free_cpumask_var(tags->cpumask); | |
| 644 | 645 | kfree(tags); |
| 645 | 646 | } |
| 646 | 647 | |
| @@ -2296,10 +2296,8 @@ void blk_mq_free_tag_set(struct blk_mq_tag_set *set) · 2295 unmodified lines | ||
| 2296 | 2296 | int i; |
| 2297 | 2297 | |
| 2298 | 2298 | for (i = 0; i < set->nr_hw_queues; i++) { |
| 2299 | − if (set->tags[i]) { | |
| 2299 | + if (set->tags[i]) | |
| 2300 | 2300 | blk_mq_free_rq_map(set, set->tags[i], i); |
| 2301 | − free_cpumask_var(set->tags[i]->cpumask); | |
| 2302 | − } | |
| 2303 | 2301 | } |
| 2304 | 2302 | |
| 2305 | 2303 | kfree(set->tags); |
| @@ -540,6 +540,7 @@ static void blk_release_queue(struct kobject *kobj) · 539 unmodified lines | ||
| 540 | 540 | struct request_queue *q = |
| 541 | 541 | container_of(kobj, struct request_queue, kobj); |
| 542 | 542 | |
| 543 | + bdi_exit(&q->backing_dev_info); | |
| 543 | 544 | blkcg_exit_queue(q); |
| 544 | 545 | |
| 545 | 546 | if (q->elevator) { |
| @@ -544,7 +544,8 @@ static int ahash_prepare_alg(struct ahash_alg *alg) · 543 unmodified lines | ||
| 544 | 544 | struct crypto_alg *base = &alg->halg.base; |
| 545 | 545 | |
| 546 | 546 | if (alg->halg.digestsize > PAGE_SIZE / 8 || |
| 547 | − alg->halg.statesize > PAGE_SIZE / 8) | |
| 547 | + alg->halg.statesize > PAGE_SIZE / 8 || | |
| 548 | + alg->halg.statesize == 0) | |
| 548 | 549 | return -EINVAL; |
| 549 | 550 | |
| 550 | 551 | base->cra_type = &crypto_ahash_type; |
| @@ -61,6 +61,7 @@ ACPI_GLOBAL(struct acpi_table_header, acpi_gbl_original_dsdt_header); · 60 unmodified lines | ||
| 61 | 61 | ACPI_INIT_GLOBAL(u32, acpi_gbl_dsdt_index, ACPI_INVALID_TABLE_INDEX); |
| 62 | 62 | ACPI_INIT_GLOBAL(u32, acpi_gbl_facs_index, ACPI_INVALID_TABLE_INDEX); |
| 63 | 63 | ACPI_INIT_GLOBAL(u32, acpi_gbl_xfacs_index, ACPI_INVALID_TABLE_INDEX); |
| 64 | +ACPI_INIT_GLOBAL(u32, acpi_gbl_fadt_index, ACPI_INVALID_TABLE_INDEX); | |
| 64 | 65 | |
| 65 | 66 | #if (!ACPI_REDUCED_HARDWARE) |
| 66 | 67 | ACPI_GLOBAL(struct acpi_table_facs *, acpi_gbl_FACS); |
| @@ -85,7 +85,7 @@ void acpi_tb_set_table_loaded_flag(u32 table_index, u8 is_loaded); · 84 unmodified lines | ||
| 85 | 85 | /* |
| 86 | 86 | * tbfadt - FADT parse/convert/validate |
| 87 | 87 | */ |
| 88 | −void acpi_tb_parse_fadt(u32 table_index); | |
| 88 | +void acpi_tb_parse_fadt(void); | |
| 89 | 89 | |
| 90 | 90 | void acpi_tb_create_local_fadt(struct acpi_table_header *table, u32 length); |
| 91 | 91 | |
| @@ -138,8 +138,6 @@ acpi_status acpi_tb_get_owner_id(u32 table_index, acpi_owner_id *owner_id); · 46 unmodified lines | ||
| 138 | 138 | */ |
| 139 | 139 | acpi_status acpi_tb_initialize_facs(void); |
| 140 | 140 | |
| 141 | −u8 acpi_tb_tables_loaded(void); | |
| 142 | − | |
| 143 | 141 | void |
| 144 | 142 | acpi_tb_print_table_header(acpi_physical_address address, |
| 145 | 143 | struct acpi_table_header *header); |
| @@ -71,7 +71,7 @@ acpi_status acpi_enable(void) · 70 unmodified lines | ||
| 71 | 71 | |
| 72 | 72 | /* ACPI tables must be present */ |
| 73 | 73 | |
| 74 | − if (!acpi_tb_tables_loaded()) { | |
| 74 | + if (acpi_gbl_fadt_index == ACPI_INVALID_TABLE_INDEX) { | |
| 75 | 75 | return_ACPI_STATUS(AE_NO_ACPI_TABLES); |
| 76 | 76 | } |
| 77 | 77 | |
| @@ -298,7 +298,7 @@ acpi_tb_select_address(char *register_name, u32 address32, u64 address64) · 297 unmodified lines | ||
| 298 | 298 | * |
| 299 | 299 | * FUNCTION: acpi_tb_parse_fadt |
| 300 | 300 | * |
| 301 | − * PARAMETERS: table_index - Index for the FADT | |
| 301 | + * PARAMETERS: None | |
| 302 | 302 | * |
| 303 | 303 | * RETURN: None |
| 304 | 304 | * |
| @@ -307,7 +307,7 @@ acpi_tb_select_address(char *register_name, u32 address32, u64 address64) · 2 unmodified lines | ||
| 307 | 307 | * |
| 308 | 308 | ******************************************************************************/ |
| 309 | 309 | |
| 310 | −void acpi_tb_parse_fadt(u32 table_index) | |
| 310 | +void acpi_tb_parse_fadt(void) | |
| 311 | 311 | { |
| 312 | 312 | u32 length; |
| 313 | 313 | struct acpi_table_header *table; |
| @@ -319,11 +319,11 @@ void acpi_tb_parse_fadt(u32 table_index) · 5 unmodified lines | ||
| 319 | 319 | * Get a local copy of the FADT and convert it to a common format |
| 320 | 320 | * Map entire FADT, assumed to be smaller than one page. |
| 321 | 321 | */ |
| 322 | − length = acpi_gbl_root_table_list.tables[table_index].length; | |
| 322 | + length = acpi_gbl_root_table_list.tables[acpi_gbl_fadt_index].length; | |
| 323 | 323 | |
| 324 | 324 | table = |
| 325 | − acpi_os_map_memory(acpi_gbl_root_table_list.tables[table_index]. | |
| 326 | − address, length); | |
| 325 | + acpi_os_map_memory(acpi_gbl_root_table_list. | |
| 326 | + tables[acpi_gbl_fadt_index].address, length); | |
| 327 | 327 | if (!table) { |
| 328 | 328 | return; |
| 329 | 329 | } |
| @@ -97,29 +97,6 @@ acpi_status acpi_tb_initialize_facs(void) · 96 unmodified lines | ||
| 97 | 97 | } |
| 98 | 98 | #endif /* !ACPI_REDUCED_HARDWARE */ |
| 99 | 99 | |
| 100 | −/******************************************************************************* | |
| 101 | − * | |
| 102 | − * FUNCTION: acpi_tb_tables_loaded | |
| 103 | − * | |
| 104 | − * PARAMETERS: None | |
| 105 | − * | |
| 106 | − * RETURN: TRUE if required ACPI tables are loaded | |
| 107 | − * | |
| 108 | − * DESCRIPTION: Determine if the minimum required ACPI tables are present | |
| 109 | − * (FADT, FACS, DSDT) | |
| 110 | − * | |
| 111 | − ******************************************************************************/ | |
| 112 | − | |
| 113 | −u8 acpi_tb_tables_loaded(void) | |
| 114 | −{ | |
| 115 | − | |
| 116 | − if (acpi_gbl_root_table_list.current_table_count >= 4) { | |
| 117 | − return (TRUE); | |
| 118 | − } | |
| 119 | − | |
| 120 | − return (FALSE); | |
| 121 | −} | |
| 122 | − | |
| 123 | 100 | /******************************************************************************* |
| 124 | 101 | * |
| 125 | 102 | * FUNCTION: acpi_tb_check_dsdt_header |
| @@ -392,7 +369,8 @@ acpi_status __init acpi_tb_parse_root_table(acpi_physical_address rsdp_address) · 266 unmodified lines | ||
| 392 | 369 | ACPI_COMPARE_NAME(&acpi_gbl_root_table_list. |
| 393 | 370 | tables[table_index].signature, |
| 394 | 371 | ACPI_SIG_FADT)) { |
| 395 | − acpi_tb_parse_fadt(table_index); | |
| 372 | + acpi_gbl_fadt_index = table_index; | |
| 373 | + acpi_tb_parse_fadt(); | |
| 396 | 374 | } |
| 397 | 375 | |
| 398 | 376 | next_table: |
| @@ -187,7 +187,7 @@ int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base, · 186 unmodified lines | ||
| 187 | 187 | * global one. Requires architecture specific dev_get_cma_area() helper |
| 188 | 188 | * function. |
| 189 | 189 | */ |
| 190 | −struct page *dma_alloc_from_contiguous(struct device *dev, int count, | |
| 190 | +struct page *dma_alloc_from_contiguous(struct device *dev, size_t count, | |
| 191 | 191 | unsigned int align) |
| 192 | 192 | { |
| 193 | 193 | if (align > CONFIG_CMA_ALIGNMENT) |
| @@ -77,13 +77,16 @@ static bool default_stop_ok(struct device *dev) · 76 unmodified lines | ||
| 77 | 77 | dev_update_qos_constraint); |
| 78 | 78 | |
| 79 | 79 | if (constraint_ns > 0) { |
| 80 | − constraint_ns -= td->start_latency_ns; | |
| 80 | + constraint_ns -= td->save_state_latency_ns + | |
| 81 | + td->stop_latency_ns + | |
| 82 | + td->start_latency_ns + | |
| 83 | + td->restore_state_latency_ns; | |
| 81 | 84 | if (constraint_ns == 0) |
| 82 | 85 | return false; |
| 83 | 86 | } |
| 84 | 87 | td->effective_constraint_ns = constraint_ns; |
| 85 | − td->cached_stop_ok = constraint_ns > td->stop_latency_ns || | |
| 86 | − constraint_ns == 0; | |
| 88 | + td->cached_stop_ok = constraint_ns >= 0; | |
| 89 | + | |
| 87 | 90 | /* |
| 88 | 91 | * The children have been suspended already, so we don't need to take |
| 89 | 92 | * their stop latencies into account here. |
| @@ -126,18 +129,6 @@ static bool default_power_down_ok(struct dev_pm_domain *pd) · 36 unmodified lines | ||
| 126 | 129 | |
| 127 | 130 | off_on_time_ns = genpd->power_off_latency_ns + |
| 128 | 131 | genpd->power_on_latency_ns; |
| 129 | − /* | |
| 130 | − * It doesn't make sense to remove power from the domain if saving | |
| 131 | − * the state of all devices in it and the power off/power on operations | |
| 132 | − * take too much time. | |
| 133 | − * | |
| 134 | − * All devices in this domain have been stopped already at this point. | |
| 135 | − */ | |
| 136 | − list_for_each_entry(pdd, &genpd->dev_list, list_node) { | |
| 137 | − if (pdd->dev->driver) | |
| 138 | − off_on_time_ns += | |
| 139 | − to_gpd_data(pdd)->td.save_state_latency_ns; | |
| 140 | − } | |
| 141 | 132 | |
| 142 | 133 | min_off_time_ns = -1; |
| 143 | 134 | /* |
| @@ -193,7 +184,6 @@ static bool default_power_down_ok(struct dev_pm_domain *pd) · 49 unmodified lines | ||
| 193 | 184 | * constraint_ns cannot be negative here, because the device has |
| 194 | 185 | * been suspended. |
| 195 | 186 | */ |
| 196 | − constraint_ns -= td->restore_state_latency_ns; | |
| 197 | 187 | if (constraint_ns <= off_on_time_ns) |
| 198 | 188 | return false; |
| 199 | 189 | |
| @@ -60,6 +60,7 @@ struct nbd_device { · 59 unmodified lines | ||
| 60 | 60 | bool disconnect; /* a disconnect has been requested by user */ |
| 61 | 61 | |
| 62 | 62 | struct timer_list timeout_timer; |
| 63 | + spinlock_t tasks_lock; | |
| 63 | 64 | struct task_struct *task_recv; |
| 64 | 65 | struct task_struct *task_send; |
| 65 | 66 | |
| @@ -140,21 +141,23 @@ static void sock_shutdown(struct nbd_device *nbd) · 74 unmodified lines | ||
| 140 | 141 | static void nbd_xmit_timeout(unsigned long arg) |
| 141 | 142 | { |
| 142 | 143 | struct nbd_device *nbd = (struct nbd_device *)arg; |
| 143 | − struct task_struct *task; | |
| 144 | + unsigned long flags; | |
| 144 | 145 | |
| 145 | 146 | if (list_empty(&nbd->queue_head)) |
| 146 | 147 | return; |
| 147 | 148 | |
| 148 | 149 | nbd->disconnect = true; |
| 149 | 150 | |
| 150 | − task = READ_ONCE(nbd->task_recv); | |
| 151 | − if (task) | |
| 152 | − force_sig(SIGKILL, task); | |
| 151 | + spin_lock_irqsave(&nbd->tasks_lock, flags); | |
| 152 | + | |
| 153 | + if (nbd->task_recv) | |
| 154 | + force_sig(SIGKILL, nbd->task_recv); | |
| 153 | 155 | |
| 154 | − task = READ_ONCE(nbd->task_send); | |
| 155 | − if (task) | |
| 156 | + if (nbd->task_send) | |
| 156 | 157 | force_sig(SIGKILL, nbd->task_send); |
| 157 | 158 | |
| 159 | + spin_unlock_irqrestore(&nbd->tasks_lock, flags); | |
| 160 | + | |
| 158 | 161 | dev_err(nbd_to_dev(nbd), "Connection timed out, killed receiver and sender, shutting down connection\n"); |
| 159 | 162 | } |
| 160 | 163 | |
| @@ -403,17 +406,24 @@ static int nbd_thread_recv(struct nbd_device *nbd) · 242 unmodified lines | ||
| 403 | 406 | { |
| 404 | 407 | struct request *req; |
| 405 | 408 | int ret; |
| 409 | + unsigned long flags; | |
| 406 | 410 | |
| 407 | 411 | BUG_ON(nbd->magic != NBD_MAGIC); |
| 408 | 412 | |
| 409 | 413 | sk_set_memalloc(nbd->sock->sk); |
| 410 | 414 | |
| 415 | + spin_lock_irqsave(&nbd->tasks_lock, flags); | |
| 411 | 416 | nbd->task_recv = current; |
| 417 | + spin_unlock_irqrestore(&nbd->tasks_lock, flags); | |
| 412 | 418 | |
| 413 | 419 | ret = device_create_file(disk_to_dev(nbd->disk), &pid_attr); |
| 414 | 420 | if (ret) { |
| 415 | 421 | dev_err(disk_to_dev(nbd->disk), "device_create_file failed!\n"); |
| 422 | + | |
| 423 | + spin_lock_irqsave(&nbd->tasks_lock, flags); | |
| 416 | 424 | nbd->task_recv = NULL; |
| 425 | + spin_unlock_irqrestore(&nbd->tasks_lock, flags); | |
| 426 | + | |
| 417 | 427 | return ret; |
| 418 | 428 | } |
| 419 | 429 | |
| @@ -429,7 +439,9 @@ static int nbd_thread_recv(struct nbd_device *nbd) · 9 unmodified lines | ||
| 429 | 439 | |
| 430 | 440 | device_remove_file(disk_to_dev(nbd->disk), &pid_attr); |
| 431 | 441 | |
| 442 | + spin_lock_irqsave(&nbd->tasks_lock, flags); | |
| 432 | 443 | nbd->task_recv = NULL; |
| 444 | + spin_unlock_irqrestore(&nbd->tasks_lock, flags); | |
| 433 | 445 | |
| 434 | 446 | if (signal_pending(current)) { |
| 435 | 447 | siginfo_t info; |
| @@ -534,8 +546,11 @@ static int nbd_thread_send(void *data) · 98 unmodified lines | ||
| 534 | 546 | { |
| 535 | 547 | struct nbd_device *nbd = data; |
| 536 | 548 | struct request *req; |
| 549 | + unsigned long flags; | |
| 537 | 550 | |
| 551 | + spin_lock_irqsave(&nbd->tasks_lock, flags); | |
| 538 | 552 | nbd->task_send = current; |
| 553 | + spin_unlock_irqrestore(&nbd->tasks_lock, flags); | |
| 539 | 554 | |
| 540 | 555 | set_user_nice(current, MIN_NICE); |
| 541 | 556 | while (!kthread_should_stop() || !list_empty(&nbd->waiting_queue)) { |
| @@ -572,7 +587,15 @@ static int nbd_thread_send(void *data) · 30 unmodified lines | ||
| 572 | 587 | nbd_handle_req(nbd, req); |
| 573 | 588 | } |
| 574 | 589 | |
| 590 | + spin_lock_irqsave(&nbd->tasks_lock, flags); | |
| 575 | 591 | nbd->task_send = NULL; |
| 592 | + spin_unlock_irqrestore(&nbd->tasks_lock, flags); | |
| 593 | + | |
| 594 | + /* Clear maybe pending signals */ | |
| 595 | + if (signal_pending(current)) { | |
| 596 | + siginfo_t info; | |
| 597 | + dequeue_signal_lock(current, ¤t->blocked, &info); | |
| 598 | + } | |
| 576 | 599 | |
| 577 | 600 | return 0; |
| 578 | 601 | } |
| @@ -1052,6 +1075,7 @@ static int __init nbd_init(void) · 473 unmodified lines | ||
| 1052 | 1075 | nbd_dev[i].magic = NBD_MAGIC; |
| 1053 | 1076 | INIT_LIST_HEAD(&nbd_dev[i].waiting_queue); |
| 1054 | 1077 | spin_lock_init(&nbd_dev[i].queue_lock); |
| 1078 | + spin_lock_init(&nbd_dev[i].tasks_lock); | |
| 1055 | 1079 | INIT_LIST_HEAD(&nbd_dev[i].queue_head); |
| 1056 | 1080 | mutex_init(&nbd_dev[i].tx_lock); |
| 1057 | 1081 | init_timer(&nbd_dev[i].timeout_timer); |
| @@ -603,27 +603,31 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx, · 602 unmodified lines | ||
| 603 | 603 | struct nvme_iod *iod = ctx; |
| 604 | 604 | struct request *req = iod_get_private(iod); |
| 605 | 605 | struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req); |
| 606 | − | |
| 607 | 606 | u16 status = le16_to_cpup(&cqe->status) >> 1; |
| 607 | + bool requeue = false; | |
| 608 | + int error = 0; | |
| 608 | 609 | |
| 609 | 610 | if (unlikely(status)) { |
| 610 | 611 | if (!(status & NVME_SC_DNR || blk_noretry_request(req)) |
| 611 | 612 | && (jiffies - req->start_time) < req->timeout) { |
| 612 | 613 | unsigned long flags; |
| 613 | 614 | |
| 615 | + requeue = true; | |
| 614 | 616 | blk_mq_requeue_request(req); |
| 615 | 617 | spin_lock_irqsave(req->q->queue_lock, flags); |
| 616 | 618 | if (!blk_queue_stopped(req->q)) |
| 617 | 619 | blk_mq_kick_requeue_list(req->q); |
| 618 | 620 | spin_unlock_irqrestore(req->q->queue_lock, flags); |
| 619 | − return; | |
| 621 | + goto release_iod; | |
| 620 | 622 | } |
| 621 | 623 | |
| 622 | 624 | if (req->cmd_type == REQ_TYPE_DRV_PRIV) { |
| 623 | 625 | if (cmd_rq->ctx == CMD_CTX_CANCELLED) |
| 624 | − status = -EINTR; | |
| 626 | + error = -EINTR; | |
| 627 | + else | |
| 628 | + error = status; | |
| 625 | 629 | } else { |
| 626 | − status = nvme_error_status(status); | |
| 630 | + error = nvme_error_status(status); | |
| 627 | 631 | } |
| 628 | 632 | } |
| 629 | 633 | |
| @@ -635,8 +639,9 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx, · 5 unmodified lines | ||
| 635 | 639 | if (cmd_rq->aborted) |
| 636 | 640 | dev_warn(nvmeq->dev->dev, |
| 637 | 641 | "completing aborted command with status:%04x\n", |
| 638 | − status); | |
| 642 | + error); | |
| 639 | 643 | |
| 644 | +release_iod: | |
| 640 | 645 | if (iod->nents) { |
| 641 | 646 | dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents, |
| 642 | 647 | rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| @@ -649,7 +654,8 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx, · 6 unmodified lines | ||
| 649 | 654 | } |
| 650 | 655 | nvme_free_iod(nvmeq->dev, iod); |
| 651 | 656 | |
| 652 | − blk_mq_complete_request(req, status); | |
| 657 | + if (likely(!requeue)) | |
| 658 | + blk_mq_complete_request(req, error); | |
| 653 | 659 | } |
| 654 | 660 | |
| 655 | 661 | /* length is in bytes. gfp flags indicates whether we may sleep. */ |
| @@ -1804,7 +1810,7 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) · 1148 unmodified lines | ||
| 1804 | 1810 | |
| 1805 | 1811 | length = (io.nblocks + 1) << ns->lba_shift; |
| 1806 | 1812 | meta_len = (io.nblocks + 1) * ns->ms; |
| 1807 | − metadata = (void __user *)(unsigned long)io.metadata; | |
| 1813 | + metadata = (void __user *)(uintptr_t)io.metadata; | |
| 1808 | 1814 | write = io.opcode & 1; |
| 1809 | 1815 | |
| 1810 | 1816 | if (ns->ext) { |
| @@ -1844,7 +1850,7 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) · 33 unmodified lines | ||
| 1844 | 1850 | c.rw.metadata = cpu_to_le64(meta_dma); |
| 1845 | 1851 | |
| 1846 | 1852 | status = __nvme_submit_sync_cmd(ns->queue, &c, NULL, |
| 1847 | − (void __user *)io.addr, length, NULL, 0); | |
| 1853 | + (void __user *)(uintptr_t)io.addr, length, NULL, 0); | |
| 1848 | 1854 | unmap: |
| 1849 | 1855 | if (meta) { |
| 1850 | 1856 | if (status == NVME_SC_SUCCESS && !write) { |
| @@ -1886,7 +1892,7 @@ static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns, · 35 unmodified lines | ||
| 1886 | 1892 | timeout = msecs_to_jiffies(cmd.timeout_ms); |
| 1887 | 1893 | |
| 1888 | 1894 | status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c, |
| 1889 | − NULL, (void __user *)cmd.addr, cmd.data_len, | |
| 1895 | + NULL, (void __user *)(uintptr_t)cmd.addr, cmd.data_len, | |
| 1890 | 1896 | &cmd.result, timeout); |
| 1891 | 1897 | if (status >= 0) { |
| 1892 | 1898 | if (put_user(cmd.result, &ucmd->result)) |
| @@ -96,6 +96,8 @@ static int atomic_dec_return_safe(atomic_t *v) · 95 unmodified lines | ||
| 96 | 96 | #define RBD_MINORS_PER_MAJOR 256 |
| 97 | 97 | #define RBD_SINGLE_MAJOR_PART_SHIFT 4 |
| 98 | 98 | |
| 99 | +#define RBD_MAX_PARENT_CHAIN_LEN 16 | |
| 100 | + | |
| 99 | 101 | #define RBD_SNAP_DEV_NAME_PREFIX "snap_" |
| 100 | 102 | #define RBD_MAX_SNAP_NAME_LEN \ |
| 101 | 103 | (NAME_MAX - (sizeof (RBD_SNAP_DEV_NAME_PREFIX) - 1)) |
| @@ -426,7 +428,7 @@ static ssize_t rbd_add_single_major(struct bus_type *bus, const char *buf, · 324 unmodified lines | ||
| 426 | 428 | size_t count); |
| 427 | 429 | static ssize_t rbd_remove_single_major(struct bus_type *bus, const char *buf, |
| 428 | 430 | size_t count); |
| 429 | −static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping); | |
| 431 | +static int rbd_dev_image_probe(struct rbd_device *rbd_dev, int depth); | |
| 430 | 432 | static void rbd_spec_put(struct rbd_spec *spec); |
| 431 | 433 | |
| 432 | 434 | static int rbd_dev_id_to_minor(int dev_id) |
| @@ -1863,9 +1865,11 @@ static void rbd_osd_req_callback(struct ceph_osd_request *osd_req, · 1430 unmodified lines | ||
| 1863 | 1865 | rbd_osd_read_callback(obj_request); |
| 1864 | 1866 | break; |
| 1865 | 1867 | case CEPH_OSD_OP_SETALLOCHINT: |
| 1866 | − rbd_assert(osd_req->r_ops[1].op == CEPH_OSD_OP_WRITE); | |
| 1868 | + rbd_assert(osd_req->r_ops[1].op == CEPH_OSD_OP_WRITE || | |
| 1869 | + osd_req->r_ops[1].op == CEPH_OSD_OP_WRITEFULL); | |
| 1867 | 1870 | /* fall through */ |
| 1868 | 1871 | case CEPH_OSD_OP_WRITE: |
| 1872 | + case CEPH_OSD_OP_WRITEFULL: | |
| 1869 | 1873 | rbd_osd_write_callback(obj_request); |
| 1870 | 1874 | break; |
| 1871 | 1875 | case CEPH_OSD_OP_STAT: |
| @@ -2401,7 +2405,10 @@ static void rbd_img_obj_request_fill(struct rbd_obj_request *obj_request, · 529 unmodified lines | ||
| 2401 | 2405 | opcode = CEPH_OSD_OP_ZERO; |
| 2402 | 2406 | } |
| 2403 | 2407 | } else if (op_type == OBJ_OP_WRITE) { |
| 2404 | − opcode = CEPH_OSD_OP_WRITE; | |
| 2408 | + if (!offset && length == object_size) | |
| 2409 | + opcode = CEPH_OSD_OP_WRITEFULL; | |
| 2410 | + else | |
| 2411 | + opcode = CEPH_OSD_OP_WRITE; | |
| 2405 | 2412 | osd_req_op_alloc_hint_init(osd_request, num_ops, |
| 2406 | 2413 | object_size, object_size); |
| 2407 | 2414 | num_ops++; |
| @@ -3760,6 +3767,7 @@ static int rbd_init_disk(struct rbd_device *rbd_dev) · 1352 unmodified lines | ||
| 3760 | 3767 | /* set io sizes to object size */ |
| 3761 | 3768 | segment_size = rbd_obj_bytes(&rbd_dev->header); |
| 3762 | 3769 | blk_queue_max_hw_sectors(q, segment_size / SECTOR_SIZE); |
| 3770 | + q->limits.max_sectors = queue_max_hw_sectors(q); | |
| 3763 | 3771 | blk_queue_max_segments(q, segment_size / SECTOR_SIZE); |
| 3764 | 3772 | blk_queue_max_segment_size(q, segment_size); |
| 3765 | 3773 | blk_queue_io_min(q, segment_size); |
| @@ -5125,44 +5133,51 @@ out_err: · 1359 unmodified lines | ||
| 5125 | 5133 | return ret; |
| 5126 | 5134 | } |
| 5127 | 5135 | |
| 5128 | −static int rbd_dev_probe_parent(struct rbd_device *rbd_dev) | |
| 5136 | +/* | |
| 5137 | + * @depth is rbd_dev_image_probe() -> rbd_dev_probe_parent() -> | |
| 5138 | + * rbd_dev_image_probe() recursion depth, which means it's also the | |
| 5139 | + * length of the already discovered part of the parent chain. | |
| 5140 | + */ | |
| 5141 | +static int rbd_dev_probe_parent(struct rbd_device *rbd_dev, int depth) | |
| 5129 | 5142 | { |
| 5130 | 5143 | struct rbd_device *parent = NULL; |
| 5131 | − struct rbd_spec *parent_spec; | |
| 5132 | − struct rbd_client *rbdc; | |
| 5133 | 5144 | int ret; |
| 5134 | 5145 | |
| 5135 | 5146 | if (!rbd_dev->parent_spec) |
| 5136 | 5147 | return 0; |
| 5137 | − /* | |
| 5138 | − * We need to pass a reference to the client and the parent | |
| 5139 | − * spec when creating the parent rbd_dev. Images related by | |
| 5140 | − * parent/child relationships always share both. | |
| 5141 | − */ | |
| 5142 | − parent_spec = rbd_spec_get(rbd_dev->parent_spec); | |
| 5143 | − rbdc = __rbd_get_client(rbd_dev->rbd_client); | |
| 5144 | 5148 | |
| 5145 | − ret = -ENOMEM; | |
| 5146 | − parent = rbd_dev_create(rbdc, parent_spec, NULL); | |
| 5147 | − if (!parent) | |
| 5149 | + if (++depth > RBD_MAX_PARENT_CHAIN_LEN) { | |
| 5150 | + pr_info("parent chain is too long (%d)\n", depth); | |
| 5151 | + ret = -EINVAL; | |
| 5148 | 5152 | goto out_err; |
| 5153 | + } | |
| 5149 | 5154 | |
| 5150 | − ret = rbd_dev_image_probe(parent, false); | |
| 5155 | + parent = rbd_dev_create(rbd_dev->rbd_client, rbd_dev->parent_spec, | |
| 5156 | + NULL); | |
| 5157 | + if (!parent) { | |
| 5158 | + ret = -ENOMEM; | |
| 5159 | + goto out_err; | |
| 5160 | + } | |
| 5161 | + | |
| 5162 | + /* | |
| 5163 | + * Images related by parent/child relationships always share | |
| 5164 | + * rbd_client and spec/parent_spec, so bump their refcounts. | |
| 5165 | + */ | |
| 5166 | + __rbd_get_client(rbd_dev->rbd_client); | |
| 5167 | + rbd_spec_get(rbd_dev->parent_spec); | |
| 5168 | + | |
| 5169 | + ret = rbd_dev_image_probe(parent, depth); | |
| 5151 | 5170 | if (ret < 0) |
| 5152 | 5171 | goto out_err; |
| 5172 | + | |
| 5153 | 5173 | rbd_dev->parent = parent; |
| 5154 | 5174 | atomic_set(&rbd_dev->parent_ref, 1); |
| 5155 | − | |
| 5156 | 5175 | return 0; |
| 5176 | + | |
| 5157 | 5177 | out_err: |
| 5158 | − if (parent) { | |
| 5159 | − rbd_dev_unparent(rbd_dev); | |
| 5178 | + rbd_dev_unparent(rbd_dev); | |
| 5179 | + if (parent) | |
| 5160 | 5180 | rbd_dev_destroy(parent); |
| 5161 | − } else { | |
| 5162 | − rbd_put_client(rbdc); | |
| 5163 | − rbd_spec_put(parent_spec); | |
| 5164 | − } | |
| 5165 | − | |
| 5166 | 5181 | return ret; |
| 5167 | 5182 | } |
| 5168 | 5183 | |
| @@ -5280,7 +5295,7 @@ static void rbd_dev_image_release(struct rbd_device *rbd_dev) · 111 unmodified lines | ||
| 5280 | 5295 | * parent), initiate a watch on its header object before using that |
| 5281 | 5296 | * object to get detailed information about the rbd image. |
| 5282 | 5297 | */ |
| 5283 | −static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping) | |
| 5298 | +static int rbd_dev_image_probe(struct rbd_device *rbd_dev, int depth) | |
| 5284 | 5299 | { |
| 5285 | 5300 | int ret; |
| 5286 | 5301 | |
| @@ -5298,7 +5313,7 @@ static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping) · 11 unmodified lines | ||
| 5298 | 5313 | if (ret) |
| 5299 | 5314 | goto err_out_format; |
| 5300 | 5315 | |
| 5301 | − if (mapping) { | |
| 5316 | + if (!depth) { | |
| 5302 | 5317 | ret = rbd_dev_header_watch_sync(rbd_dev); |
| 5303 | 5318 | if (ret) { |
| 5304 | 5319 | if (ret == -ENOENT) |
| @@ -5319,7 +5334,7 @@ static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping) · 14 unmodified lines | ||
| 5319 | 5334 | * Otherwise this is a parent image, identified by pool, image |
| 5320 | 5335 | * and snap ids - need to fill in names for those ids. |
| 5321 | 5336 | */ |
| 5322 | − if (mapping) | |
| 5337 | + if (!depth) | |
| 5323 | 5338 | ret = rbd_spec_fill_snap_id(rbd_dev); |
| 5324 | 5339 | else |
| 5325 | 5340 | ret = rbd_spec_fill_names(rbd_dev); |
| @@ -5341,12 +5356,12 @@ static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping) · 15 unmodified lines | ||
| 5341 | 5356 | * Need to warn users if this image is the one being |
| 5342 | 5357 | * mapped and has a parent. |
| 5343 | 5358 | */ |
| 5344 | − if (mapping && rbd_dev->parent_spec) | |
| 5359 | + if (!depth && rbd_dev->parent_spec) | |
| 5345 | 5360 | rbd_warn(rbd_dev, |
| 5346 | 5361 | "WARNING: kernel layering is EXPERIMENTAL!"); |
| 5347 | 5362 | } |
| 5348 | 5363 | |
| 5349 | − ret = rbd_dev_probe_parent(rbd_dev); | |
| 5364 | + ret = rbd_dev_probe_parent(rbd_dev, depth); | |
| 5350 | 5365 | if (ret) |
| 5351 | 5366 | goto err_out_probe; |
| 5352 | 5367 | |
| @@ -5357,7 +5372,7 @@ static int rbd_dev_image_probe(struct rbd_device *rbd_dev, bool mapping) · 4 unmodified lines | ||
| 5357 | 5372 | err_out_probe: |
| 5358 | 5373 | rbd_dev_unprobe(rbd_dev); |
| 5359 | 5374 | err_out_watch: |
| 5360 | − if (mapping) | |
| 5375 | + if (!depth) | |
| 5361 | 5376 | rbd_dev_header_unwatch_sync(rbd_dev); |
| 5362 | 5377 | out_header_name: |
| 5363 | 5378 | kfree(rbd_dev->header_name); |
| @@ -5420,7 +5435,7 @@ static ssize_t do_rbd_add(struct bus_type *bus, · 56 unmodified lines | ||
| 5420 | 5435 | spec = NULL; /* rbd_dev now owns this */ |
| 5421 | 5436 | rbd_opts = NULL; /* rbd_dev now owns this */ |
| 5422 | 5437 | |
| 5423 | − rc = rbd_dev_image_probe(rbd_dev, true); | |
| 5438 | + rc = rbd_dev_image_probe(rbd_dev, 0); | |
| 5424 | 5439 | if (rc < 0) |
| 5425 | 5440 | goto err_out_rbd_dev; |
| 5426 | 5441 | |
| @@ -1956,7 +1956,8 @@ static void blkback_changed(struct xenbus_device *dev, · 1955 unmodified lines | ||
| 1956 | 1956 | break; |
| 1957 | 1957 | /* Missed the backend's Closing state -- fallthrough */ |
| 1958 | 1958 | case XenbusStateClosing: |
| 1959 | − blkfront_closing(info); | |
| 1959 | + if (info) | |
| 1960 | + blkfront_closing(info); | |
| 1960 | 1961 | break; |
| 1961 | 1962 | } |
| 1962 | 1963 | } |
| @@ -1184,11 +1184,12 @@ static int arm_ccn_pmu_cpu_notifier(struct notifier_block *nb, · 1183 unmodified lines | ||
| 1184 | 1184 | if (!cpumask_test_and_clear_cpu(cpu, &dt->cpu)) |
| 1185 | 1185 | break; |
| 1186 | 1186 | target = cpumask_any_but(cpu_online_mask, cpu); |
| 1187 | − if (target < 0) | |
| 1187 | + if (target >= nr_cpu_ids) | |
| 1188 | 1188 | break; |
| 1189 | 1189 | perf_pmu_migrate_context(&dt->pmu, cpu, target); |
| 1190 | 1190 | cpumask_set_cpu(target, &dt->cpu); |
| 1191 | − WARN_ON(irq_set_affinity(ccn->irq, &dt->cpu) != 0); | |
| 1191 | + if (ccn->irq) | |
| 1192 | + WARN_ON(irq_set_affinity(ccn->irq, &dt->cpu) != 0); | |
| 1192 | 1193 | default: |
| 1193 | 1194 | break; |
| 1194 | 1195 | } |
| @@ -197,6 +197,7 @@ static void __init of_cpu_clk_setup(struct device_node *node) · 196 unmodified lines | ||
| 197 | 197 | for_each_node_by_type(dn, "cpu") { |
| 198 | 198 | struct clk_init_data init; |
| 199 | 199 | struct clk *clk; |
| 200 | + struct clk *parent_clk; | |
| 200 | 201 | char *clk_name = kzalloc(5, GFP_KERNEL); |
| 201 | 202 | int cpu, err; |
| 202 | 203 | |
| @@ -208,8 +209,9 @@ static void __init of_cpu_clk_setup(struct device_node *node) · 5 unmodified lines | ||
| 208 | 209 | goto bail_out; |
| 209 | 210 | |
| 210 | 211 | sprintf(clk_name, "cpu%d", cpu); |
| 212 | + parent_clk = of_clk_get(node, 0); | |
| 211 | 213 | |
| 212 | − cpuclk[cpu].parent_name = of_clk_get_parent_name(node, 0); | |
| 214 | + cpuclk[cpu].parent_name = __clk_get_name(parent_clk); | |
| 213 | 215 | cpuclk[cpu].clk_name = clk_name; |
| 214 | 216 | cpuclk[cpu].cpu = cpu; |
| 215 | 217 | cpuclk[cpu].reg_base = clock_complex_base; |
| @@ -776,6 +776,11 @@ static inline void intel_pstate_sample(struct cpudata *cpu) · 775 unmodified lines | ||
| 776 | 776 | local_irq_save(flags); |
| 777 | 777 | rdmsrl(MSR_IA32_APERF, aperf); |
| 778 | 778 | rdmsrl(MSR_IA32_MPERF, mperf); |
| 779 | + if (cpu->prev_mperf == mperf) { | |
| 780 | + local_irq_restore(flags); | |
| 781 | + return; | |
| 782 | + } | |
| 783 | + | |
| 779 | 784 | tsc = rdtsc(); |
| 780 | 785 | local_irq_restore(flags); |
| 781 | 786 | |
| @@ -672,8 +672,12 @@ int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev) · 671 unmodified lines | ||
| 672 | 672 | /* disp clock */ |
| 673 | 673 | adev->clock.default_dispclk = |
| 674 | 674 | le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq); |
| 675 | − if (adev->clock.default_dispclk == 0) | |
| 676 | − adev->clock.default_dispclk = 54000; /* 540 Mhz */ | |
| 675 | + /* set a reasonable default for DP */ | |
| 676 | + if (adev->clock.default_dispclk < 53900) { | |
| 677 | + DRM_INFO("Changing default dispclk from %dMhz to 600Mhz\n", | |
| 678 | + adev->clock.default_dispclk / 100); | |
| 679 | + adev->clock.default_dispclk = 60000; | |
| 680 | + } | |
| 677 | 681 | adev->clock.dp_extclk = |
| 678 | 682 | le16_to_cpu(firmware_info->info_21.usUniphyDPModeExtClkFreq); |
| 679 | 683 | adev->clock.current_dispclk = adev->clock.default_dispclk; |
| @@ -177,7 +177,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data) · 176 unmodified lines | ||
| 177 | 177 | |
| 178 | 178 | /* get chunks */ |
| 179 | 179 | INIT_LIST_HEAD(&p->validated); |
| 180 | − chunk_array_user = (uint64_t __user *)(cs->in.chunks); | |
| 180 | + chunk_array_user = (uint64_t __user *)(unsigned long)(cs->in.chunks); | |
| 181 | 181 | if (copy_from_user(chunk_array, chunk_array_user, |
| 182 | 182 | sizeof(uint64_t)*cs->in.num_chunks)) { |
| 183 | 183 | ret = -EFAULT; |
| @@ -197,7 +197,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data) · 13 unmodified lines | ||
| 197 | 197 | struct drm_amdgpu_cs_chunk user_chunk; |
| 198 | 198 | uint32_t __user *cdata; |
| 199 | 199 | |
| 200 | − chunk_ptr = (void __user *)chunk_array[i]; | |
| 200 | + chunk_ptr = (void __user *)(unsigned long)chunk_array[i]; | |
| 201 | 201 | if (copy_from_user(&user_chunk, chunk_ptr, |
| 202 | 202 | sizeof(struct drm_amdgpu_cs_chunk))) { |
| 203 | 203 | ret = -EFAULT; |
| @@ -208,7 +208,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data) · 4 unmodified lines | ||
| 208 | 208 | p->chunks[i].length_dw = user_chunk.length_dw; |
| 209 | 209 | |
| 210 | 210 | size = p->chunks[i].length_dw; |
| 211 | − cdata = (void __user *)user_chunk.chunk_data; | |
| 211 | + cdata = (void __user *)(unsigned long)user_chunk.chunk_data; | |
| 212 | 212 | p->chunks[i].user_ptr = cdata; |
| 213 | 213 | |
| 214 | 214 | p->chunks[i].kdata = drm_malloc_ab(size, sizeof(uint32_t)); |
| @@ -85,8 +85,6 @@ static void amdgpu_flip_work_func(struct work_struct *__work) · 84 unmodified lines | ||
| 85 | 85 | /* We borrow the event spin lock for protecting flip_status */ |
| 86 | 86 | spin_lock_irqsave(&crtc->dev->event_lock, flags); |
| 87 | 87 | |
| 88 | − /* set the proper interrupt */ | |
| 89 | − amdgpu_irq_get(adev, &adev->pageflip_irq, work->crtc_id); | |
| 90 | 88 | /* do the flip (mmio) */ |
| 91 | 89 | adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base); |
| 92 | 90 | /* set the flip status */ |
| @@ -242,11 +242,11 @@ static struct pci_device_id pciidlist[] = { · 241 unmodified lines | ||
| 242 | 242 | {0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU}, |
| 243 | 243 | #endif |
| 244 | 244 | /* topaz */ |
| 245 | − {0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ}, | |
| 246 | − {0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ}, | |
| 247 | − {0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ}, | |
| 248 | − {0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ}, | |
| 249 | − {0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ}, | |
| 245 | + {0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT}, | |
| 246 | + {0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT}, | |
| 247 | + {0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT}, | |
| 248 | + {0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT}, | |
| 249 | + {0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ|AMD_EXP_HW_SUPPORT}, | |
| 250 | 250 | /* tonga */ |
| 251 | 251 | {0x1002, 0x6920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA}, |
| 252 | 252 | {0x1002, 0x6921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA}, |
| @@ -402,3 +402,19 @@ bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj) · 401 unmodified lines | ||
| 402 | 402 | return true; |
| 403 | 403 | return false; |
| 404 | 404 | } |
| 405 | + | |
| 406 | +void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev) | |
| 407 | +{ | |
| 408 | + struct amdgpu_fbdev *afbdev = adev->mode_info.rfbdev; | |
| 409 | + struct drm_fb_helper *fb_helper; | |
| 410 | + int ret; | |
| 411 | + | |
| 412 | + if (!afbdev) | |
| 413 | + return; | |
| 414 | + | |
| 415 | + fb_helper = &afbdev->helper; | |
| 416 | + | |
| 417 | + ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper); | |
| 418 | + if (ret) | |
| 419 | + DRM_DEBUG("failed to restore crtc mode\n"); | |
| 420 | +} | |
| @@ -485,7 +485,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 484 unmodified lines | ||
| 485 | 485 | * Outdated mess for old drm with Xorg being in charge (void function now). |
| 486 | 486 | */ |
| 487 | 487 | /** |
| 488 | − * amdgpu_driver_firstopen_kms - drm callback for last close | |
| 488 | + * amdgpu_driver_lastclose_kms - drm callback for last close | |
| 489 | 489 | * |
| 490 | 490 | * @dev: drm dev pointer |
| 491 | 491 | * |
| @@ -493,6 +493,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 1 unmodified line | ||
| 493 | 493 | */ |
| 494 | 494 | void amdgpu_driver_lastclose_kms(struct drm_device *dev) |
| 495 | 495 | { |
| 496 | + struct amdgpu_device *adev = dev->dev_private; | |
| 497 | + | |
| 498 | + amdgpu_fbdev_restore_mode(adev); | |
| 496 | 499 | vga_switcheroo_process_delayed_switch(); |
| 497 | 500 | } |
| 498 | 501 | |
| @@ -567,6 +567,7 @@ void amdgpu_fbdev_fini(struct amdgpu_device *adev); · 566 unmodified lines | ||
| 567 | 567 | void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state); |
| 568 | 568 | int amdgpu_fbdev_total_size(struct amdgpu_device *adev); |
| 569 | 569 | bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj); |
| 570 | +void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev); | |
| 570 | 571 | |
| 571 | 572 | void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev); |
| 572 | 573 | |
| @@ -294,10 +294,14 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, · 293 unmodified lines | ||
| 294 | 294 | struct amdgpu_device *adev = dev_get_drvdata(dev); |
| 295 | 295 | umode_t effective_mode = attr->mode; |
| 296 | 296 | |
| 297 | − /* Skip limit attributes if DPM is not enabled */ | |
| 297 | + /* Skip attributes if DPM is not enabled */ | |
| 298 | 298 | if (!adev->pm.dpm_enabled && |
| 299 | 299 | (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr || |
| 300 | − attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr)) | |
| 300 | + attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr || | |
| 301 | + attr == &sensor_dev_attr_pwm1.dev_attr.attr || | |
| 302 | + attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr || | |
| 303 | + attr == &sensor_dev_attr_pwm1_max.dev_attr.attr || | |
| 304 | + attr == &sensor_dev_attr_pwm1_min.dev_attr.attr)) | |
| 301 | 305 | return 0; |
| 302 | 306 | |
| 303 | 307 | /* Skip fan attributes if fan is not present */ |
| @@ -455,8 +455,10 @@ int amdgpu_vm_update_page_directory(struct amdgpu_device *adev, · 454 unmodified lines | ||
| 455 | 455 | return -ENOMEM; |
| 456 | 456 | |
| 457 | 457 | r = amdgpu_ib_get(ring, NULL, ndw * 4, ib); |
| 458 | − if (r) | |
| 458 | + if (r) { | |
| 459 | + kfree(ib); | |
| 459 | 460 | return r; |
| 461 | + } | |
| 460 | 462 | ib->length_dw = 0; |
| 461 | 463 | |
| 462 | 464 | /* walk over the address space and update the page directory */ |
| @@ -6185,6 +6185,11 @@ static int ci_dpm_late_init(void *handle) · 6184 unmodified lines | ||
| 6185 | 6185 | if (!amdgpu_dpm) |
| 6186 | 6186 | return 0; |
| 6187 | 6187 | |
| 6188 | + /* init the sysfs and debugfs files late */ | |
| 6189 | + ret = amdgpu_pm_sysfs_init(adev); | |
| 6190 | + if (ret) | |
| 6191 | + return ret; | |
| 6192 | + | |
| 6188 | 6193 | ret = ci_set_temperature_range(adev); |
| 6189 | 6194 | if (ret) |
| 6190 | 6195 | return ret; |
| @@ -6232,9 +6237,6 @@ static int ci_dpm_sw_init(void *handle) · 41 unmodified lines | ||
| 6232 | 6237 | adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps; |
| 6233 | 6238 | if (amdgpu_dpm == 1) |
| 6234 | 6239 | amdgpu_pm_print_power_states(adev); |
| 6235 | − ret = amdgpu_pm_sysfs_init(adev); | |
| 6236 | − if (ret) | |
| 6237 | − goto dpm_failed; | |
| 6238 | 6240 | mutex_unlock(&adev->pm.mutex); |
| 6239 | 6241 | DRM_INFO("amdgpu: dpm initialized\n"); |
| 6240 | 6242 | |
| @@ -1567,6 +1567,9 @@ static void cik_pcie_gen3_enable(struct amdgpu_device *adev) · 1566 unmodified lines | ||
| 1567 | 1567 | int ret, i; |
| 1568 | 1568 | u16 tmp16; |
| 1569 | 1569 | |
| 1570 | + if (pci_is_root_bus(adev->pdev->bus)) | |
| 1571 | + return; | |
| 1572 | + | |
| 1570 | 1573 | if (amdgpu_pcie_gen2 == 0) |
| 1571 | 1574 | return; |
| 1572 | 1575 | |
| @@ -596,6 +596,12 @@ static int cz_dpm_late_init(void *handle) · 595 unmodified lines | ||
| 596 | 596 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 597 | 597 | |
| 598 | 598 | if (amdgpu_dpm) { |
| 599 | + int ret; | |
| 600 | + /* init the sysfs and debugfs files late */ | |
| 601 | + ret = amdgpu_pm_sysfs_init(adev); | |
| 602 | + if (ret) | |
| 603 | + return ret; | |
| 604 | + | |
| 599 | 605 | /* powerdown unused blocks for now */ |
| 600 | 606 | cz_dpm_powergate_uvd(adev, true); |
| 601 | 607 | cz_dpm_powergate_vce(adev, true); |
| @@ -632,10 +638,6 @@ static int cz_dpm_sw_init(void *handle) · 30 unmodified lines | ||
| 632 | 638 | if (amdgpu_dpm == 1) |
| 633 | 639 | amdgpu_pm_print_power_states(adev); |
| 634 | 640 | |
| 635 | − ret = amdgpu_pm_sysfs_init(adev); | |
| 636 | − if (ret) | |
| 637 | − goto dpm_init_failed; | |
| 638 | − | |
| 639 | 641 | mutex_unlock(&adev->pm.mutex); |
| 640 | 642 | DRM_INFO("amdgpu: dpm initialized\n"); |
| 641 | 643 | |
| @@ -255,6 +255,24 @@ static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) · 254 unmodified lines | ||
| 255 | 255 | return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); |
| 256 | 256 | } |
| 257 | 257 | |
| 258 | +static void dce_v10_0_pageflip_interrupt_init(struct amdgpu_device *adev) | |
| 259 | +{ | |
| 260 | + unsigned i; | |
| 261 | + | |
| 262 | + /* Enable pflip interrupts */ | |
| 263 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 264 | + amdgpu_irq_get(adev, &adev->pageflip_irq, i); | |
| 265 | +} | |
| 266 | + | |
| 267 | +static void dce_v10_0_pageflip_interrupt_fini(struct amdgpu_device *adev) | |
| 268 | +{ | |
| 269 | + unsigned i; | |
| 270 | + | |
| 271 | + /* Disable pflip interrupts */ | |
| 272 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 273 | + amdgpu_irq_put(adev, &adev->pageflip_irq, i); | |
| 274 | +} | |
| 275 | + | |
| 258 | 276 | /** |
| 259 | 277 | * dce_v10_0_page_flip - pageflip callback. |
| 260 | 278 | * |
| @@ -2663,9 +2681,10 @@ static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2402 unmodified lines | ||
| 2663 | 2681 | dce_v10_0_vga_enable(crtc, true); |
| 2664 | 2682 | amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); |
| 2665 | 2683 | dce_v10_0_vga_enable(crtc, false); |
| 2666 | − /* Make sure VBLANK interrupt is still enabled */ | |
| 2684 | + /* Make sure VBLANK and PFLIP interrupts are still enabled */ | |
| 2667 | 2685 | type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); |
| 2668 | 2686 | amdgpu_irq_update(adev, &adev->crtc_irq, type); |
| 2687 | + amdgpu_irq_update(adev, &adev->pageflip_irq, type); | |
| 2669 | 2688 | drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); |
| 2670 | 2689 | dce_v10_0_crtc_load_lut(crtc); |
| 2671 | 2690 | break; |
| @@ -3025,6 +3044,8 @@ static int dce_v10_0_hw_init(void *handle) · 353 unmodified lines | ||
| 3025 | 3044 | dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 3026 | 3045 | } |
| 3027 | 3046 | |
| 3047 | + dce_v10_0_pageflip_interrupt_init(adev); | |
| 3048 | + | |
| 3028 | 3049 | return 0; |
| 3029 | 3050 | } |
| 3030 | 3051 | |
| @@ -3039,6 +3060,8 @@ static int dce_v10_0_hw_fini(void *handle) · 8 unmodified lines | ||
| 3039 | 3060 | dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 3040 | 3061 | } |
| 3041 | 3062 | |
| 3063 | + dce_v10_0_pageflip_interrupt_fini(adev); | |
| 3064 | + | |
| 3042 | 3065 | return 0; |
| 3043 | 3066 | } |
| 3044 | 3067 | |
| @@ -3050,6 +3073,8 @@ static int dce_v10_0_suspend(void *handle) · 5 unmodified lines | ||
| 3050 | 3073 | |
| 3051 | 3074 | dce_v10_0_hpd_fini(adev); |
| 3052 | 3075 | |
| 3076 | + dce_v10_0_pageflip_interrupt_fini(adev); | |
| 3077 | + | |
| 3053 | 3078 | return 0; |
| 3054 | 3079 | } |
| 3055 | 3080 | |
| @@ -3075,6 +3100,8 @@ static int dce_v10_0_resume(void *handle) · 19 unmodified lines | ||
| 3075 | 3100 | /* initialize hpd */ |
| 3076 | 3101 | dce_v10_0_hpd_init(adev); |
| 3077 | 3102 | |
| 3103 | + dce_v10_0_pageflip_interrupt_init(adev); | |
| 3104 | + | |
| 3078 | 3105 | return 0; |
| 3079 | 3106 | } |
| 3080 | 3107 | |
| @@ -3369,7 +3396,6 @@ static int dce_v10_0_pageflip_irq(struct amdgpu_device *adev, · 288 unmodified lines | ||
| 3369 | 3396 | spin_unlock_irqrestore(&adev->ddev->event_lock, flags); |
| 3370 | 3397 | |
| 3371 | 3398 | drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); |
| 3372 | − amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); | |
| 3373 | 3399 | queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); |
| 3374 | 3400 | |
| 3375 | 3401 | return 0; |
| @@ -233,6 +233,24 @@ static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) · 232 unmodified lines | ||
| 233 | 233 | return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); |
| 234 | 234 | } |
| 235 | 235 | |
| 236 | +static void dce_v11_0_pageflip_interrupt_init(struct amdgpu_device *adev) | |
| 237 | +{ | |
| 238 | + unsigned i; | |
| 239 | + | |
| 240 | + /* Enable pflip interrupts */ | |
| 241 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 242 | + amdgpu_irq_get(adev, &adev->pageflip_irq, i); | |
| 243 | +} | |
| 244 | + | |
| 245 | +static void dce_v11_0_pageflip_interrupt_fini(struct amdgpu_device *adev) | |
| 246 | +{ | |
| 247 | + unsigned i; | |
| 248 | + | |
| 249 | + /* Disable pflip interrupts */ | |
| 250 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 251 | + amdgpu_irq_put(adev, &adev->pageflip_irq, i); | |
| 252 | +} | |
| 253 | + | |
| 236 | 254 | /** |
| 237 | 255 | * dce_v11_0_page_flip - pageflip callback. |
| 238 | 256 | * |
| @@ -2640,9 +2658,10 @@ static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2401 unmodified lines | ||
| 2640 | 2658 | dce_v11_0_vga_enable(crtc, true); |
| 2641 | 2659 | amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); |
| 2642 | 2660 | dce_v11_0_vga_enable(crtc, false); |
| 2643 | − /* Make sure VBLANK interrupt is still enabled */ | |
| 2661 | + /* Make sure VBLANK and PFLIP interrupts are still enabled */ | |
| 2644 | 2662 | type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); |
| 2645 | 2663 | amdgpu_irq_update(adev, &adev->crtc_irq, type); |
| 2664 | + amdgpu_irq_update(adev, &adev->pageflip_irq, type); | |
| 2646 | 2665 | drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); |
| 2647 | 2666 | dce_v11_0_crtc_load_lut(crtc); |
| 2648 | 2667 | break; |
| @@ -2888,7 +2907,7 @@ static int dce_v11_0_early_init(void *handle) · 239 unmodified lines | ||
| 2888 | 2907 | |
| 2889 | 2908 | switch (adev->asic_type) { |
| 2890 | 2909 | case CHIP_CARRIZO: |
| 2891 | − adev->mode_info.num_crtc = 4; | |
| 2910 | + adev->mode_info.num_crtc = 3; | |
| 2892 | 2911 | adev->mode_info.num_hpd = 6; |
| 2893 | 2912 | adev->mode_info.num_dig = 9; |
| 2894 | 2913 | break; |
| @@ -3000,6 +3019,8 @@ static int dce_v11_0_hw_init(void *handle) · 105 unmodified lines | ||
| 3000 | 3019 | dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 3001 | 3020 | } |
| 3002 | 3021 | |
| 3022 | + dce_v11_0_pageflip_interrupt_init(adev); | |
| 3023 | + | |
| 3003 | 3024 | return 0; |
| 3004 | 3025 | } |
| 3005 | 3026 | |
| @@ -3014,6 +3035,8 @@ static int dce_v11_0_hw_fini(void *handle) · 8 unmodified lines | ||
| 3014 | 3035 | dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 3015 | 3036 | } |
| 3016 | 3037 | |
| 3038 | + dce_v11_0_pageflip_interrupt_fini(adev); | |
| 3039 | + | |
| 3017 | 3040 | return 0; |
| 3018 | 3041 | } |
| 3019 | 3042 | |
| @@ -3025,6 +3048,8 @@ static int dce_v11_0_suspend(void *handle) · 5 unmodified lines | ||
| 3025 | 3048 | |
| 3026 | 3049 | dce_v11_0_hpd_fini(adev); |
| 3027 | 3050 | |
| 3051 | + dce_v11_0_pageflip_interrupt_fini(adev); | |
| 3052 | + | |
| 3028 | 3053 | return 0; |
| 3029 | 3054 | } |
| 3030 | 3055 | |
| @@ -3051,6 +3076,8 @@ static int dce_v11_0_resume(void *handle) · 20 unmodified lines | ||
| 3051 | 3076 | /* initialize hpd */ |
| 3052 | 3077 | dce_v11_0_hpd_init(adev); |
| 3053 | 3078 | |
| 3079 | + dce_v11_0_pageflip_interrupt_init(adev); | |
| 3080 | + | |
| 3054 | 3081 | return 0; |
| 3055 | 3082 | } |
| 3056 | 3083 | |
| @@ -3345,7 +3372,6 @@ static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev, · 288 unmodified lines | ||
| 3345 | 3372 | spin_unlock_irqrestore(&adev->ddev->event_lock, flags); |
| 3346 | 3373 | |
| 3347 | 3374 | drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); |
| 3348 | − amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); | |
| 3349 | 3375 | queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); |
| 3350 | 3376 | |
| 3351 | 3377 | return 0; |
| @@ -204,6 +204,24 @@ static u32 dce_v8_0_vblank_get_counter(struct amdgpu_device *adev, int crtc) · 203 unmodified lines | ||
| 204 | 204 | return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); |
| 205 | 205 | } |
| 206 | 206 | |
| 207 | +static void dce_v8_0_pageflip_interrupt_init(struct amdgpu_device *adev) | |
| 208 | +{ | |
| 209 | + unsigned i; | |
| 210 | + | |
| 211 | + /* Enable pflip interrupts */ | |
| 212 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 213 | + amdgpu_irq_get(adev, &adev->pageflip_irq, i); | |
| 214 | +} | |
| 215 | + | |
| 216 | +static void dce_v8_0_pageflip_interrupt_fini(struct amdgpu_device *adev) | |
| 217 | +{ | |
| 218 | + unsigned i; | |
| 219 | + | |
| 220 | + /* Disable pflip interrupts */ | |
| 221 | + for (i = 0; i < adev->mode_info.num_crtc; i++) | |
| 222 | + amdgpu_irq_put(adev, &adev->pageflip_irq, i); | |
| 223 | +} | |
| 224 | + | |
| 207 | 225 | /** |
| 208 | 226 | * dce_v8_0_page_flip - pageflip callback. |
| 209 | 227 | * |
| @@ -2575,9 +2593,10 @@ static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode) · 2365 unmodified lines | ||
| 2575 | 2593 | dce_v8_0_vga_enable(crtc, true); |
| 2576 | 2594 | amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); |
| 2577 | 2595 | dce_v8_0_vga_enable(crtc, false); |
| 2578 | − /* Make sure VBLANK interrupt is still enabled */ | |
| 2596 | + /* Make sure VBLANK and PFLIP interrupts are still enabled */ | |
| 2579 | 2597 | type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); |
| 2580 | 2598 | amdgpu_irq_update(adev, &adev->crtc_irq, type); |
| 2599 | + amdgpu_irq_update(adev, &adev->pageflip_irq, type); | |
| 2581 | 2600 | drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); |
| 2582 | 2601 | dce_v8_0_crtc_load_lut(crtc); |
| 2583 | 2602 | break; |
| @@ -2933,6 +2952,8 @@ static int dce_v8_0_hw_init(void *handle) · 349 unmodified lines | ||
| 2933 | 2952 | dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 2934 | 2953 | } |
| 2935 | 2954 | |
| 2955 | + dce_v8_0_pageflip_interrupt_init(adev); | |
| 2956 | + | |
| 2936 | 2957 | return 0; |
| 2937 | 2958 | } |
| 2938 | 2959 | |
| @@ -2947,6 +2968,8 @@ static int dce_v8_0_hw_fini(void *handle) · 8 unmodified lines | ||
| 2947 | 2968 | dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); |
| 2948 | 2969 | } |
| 2949 | 2970 | |
| 2971 | + dce_v8_0_pageflip_interrupt_fini(adev); | |
| 2972 | + | |
| 2950 | 2973 | return 0; |
| 2951 | 2974 | } |
| 2952 | 2975 | |
| @@ -2958,6 +2981,8 @@ static int dce_v8_0_suspend(void *handle) · 5 unmodified lines | ||
| 2958 | 2981 | |
| 2959 | 2982 | dce_v8_0_hpd_fini(adev); |
| 2960 | 2983 | |
| 2984 | + dce_v8_0_pageflip_interrupt_fini(adev); | |
| 2985 | + | |
| 2961 | 2986 | return 0; |
| 2962 | 2987 | } |
| 2963 | 2988 | |
| @@ -2981,6 +3006,8 @@ static int dce_v8_0_resume(void *handle) · 17 unmodified lines | ||
| 2981 | 3006 | /* initialize hpd */ |
| 2982 | 3007 | dce_v8_0_hpd_init(adev); |
| 2983 | 3008 | |
| 3009 | + dce_v8_0_pageflip_interrupt_init(adev); | |
| 3010 | + | |
| 2984 | 3011 | return 0; |
| 2985 | 3012 | } |
| 2986 | 3013 | |
| @@ -3376,7 +3403,6 @@ static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev, · 389 unmodified lines | ||
| 3376 | 3403 | spin_unlock_irqrestore(&adev->ddev->event_lock, flags); |
| 3377 | 3404 | |
| 3378 | 3405 | drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); |
| 3379 | − amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); | |
| 3380 | 3406 | queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); |
| 3381 | 3407 | |
| 3382 | 3408 | return 0; |
| @@ -2995,6 +2995,15 @@ static int kv_dpm_late_init(void *handle) · 2994 unmodified lines | ||
| 2995 | 2995 | { |
| 2996 | 2996 | /* powerdown unused blocks for now */ |
| 2997 | 2997 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 2998 | + int ret; | |
| 2999 | + | |
| 3000 | + if (!amdgpu_dpm) | |
| 3001 | + return 0; | |
| 3002 | + | |
| 3003 | + /* init the sysfs and debugfs files late */ | |
| 3004 | + ret = amdgpu_pm_sysfs_init(adev); | |
| 3005 | + if (ret) | |
| 3006 | + return ret; | |
| 2998 | 3007 | |
| 2999 | 3008 | kv_dpm_powergate_acp(adev, true); |
| 3000 | 3009 | kv_dpm_powergate_samu(adev, true); |
| @@ -3038,9 +3047,6 @@ static int kv_dpm_sw_init(void *handle) · 37 unmodified lines | ||
| 3038 | 3047 | adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps; |
| 3039 | 3048 | if (amdgpu_dpm == 1) |
| 3040 | 3049 | amdgpu_pm_print_power_states(adev); |
| 3041 | − ret = amdgpu_pm_sysfs_init(adev); | |
| 3042 | − if (ret) | |
| 3043 | − goto dpm_failed; | |
| 3044 | 3050 | mutex_unlock(&adev->pm.mutex); |
| 3045 | 3051 | DRM_INFO("amdgpu: dpm initialized\n"); |
| 3046 | 3052 | |
| @@ -1005,6 +1005,9 @@ static void vi_pcie_gen3_enable(struct amdgpu_device *adev) · 1004 unmodified lines | ||
| 1005 | 1005 | u32 mask; |
| 1006 | 1006 | int ret; |
| 1007 | 1007 | |
| 1008 | + if (pci_is_root_bus(adev->pdev->bus)) | |
| 1009 | + return; | |
| 1010 | + | |
| 1008 | 1011 | if (amdgpu_pcie_gen2 == 0) |
| 1009 | 1012 | return; |
| 1010 | 1013 | |
| @@ -1194,17 +1194,18 @@ static struct drm_dp_mst_branch *drm_dp_get_mst_branch_device(struct drm_dp_mst_ · 1193 unmodified lines | ||
| 1194 | 1194 | |
| 1195 | 1195 | list_for_each_entry(port, &mstb->ports, next) { |
| 1196 | 1196 | if (port->port_num == port_num) { |
| 1197 | − if (!port->mstb) { | |
| 1197 | + mstb = port->mstb; | |
| 1198 | + if (!mstb) { | |
| 1198 | 1199 | DRM_ERROR("failed to lookup MSTB with lct %d, rad %02x\n", lct, rad[0]); |
| 1199 | − return NULL; | |
| 1200 | + goto out; | |
| 1200 | 1201 | } |
| 1201 | 1202 | |
| 1202 | − mstb = port->mstb; | |
| 1203 | 1203 | break; |
| 1204 | 1204 | } |
| 1205 | 1205 | } |
| 1206 | 1206 | } |
| 1207 | 1207 | kref_get(&mstb->kref); |
| 1208 | +out: | |
| 1208 | 1209 | mutex_unlock(&mgr->lock); |
| 1209 | 1210 | return mstb; |
| 1210 | 1211 | } |
| @@ -2801,12 +2802,13 @@ static int drm_dp_mst_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs · 1590 unmodified lines | ||
| 2801 | 2802 | if (msgs[num - 1].flags & I2C_M_RD) |
| 2802 | 2803 | reading = true; |
| 2803 | 2804 | |
| 2804 | − if (!reading) { | |
| 2805 | + if (!reading || (num - 1 > DP_REMOTE_I2C_READ_MAX_TRANSACTIONS)) { | |
| 2805 | 2806 | DRM_DEBUG_KMS("Unsupported I2C transaction for MST device\n"); |
| 2806 | 2807 | ret = -EIO; |
| 2807 | 2808 | goto out; |
| 2808 | 2809 | } |
| 2809 | 2810 | |
| 2811 | + memset(&msg, 0, sizeof(msg)); | |
| 2810 | 2812 | msg.req_type = DP_REMOTE_I2C_READ; |
| 2811 | 2813 | msg.u.i2c_read.num_transactions = num - 1; |
| 2812 | 2814 | msg.u.i2c_read.port_number = port->port_num; |
| @@ -235,18 +235,12 @@ static ssize_t dpms_show(struct device *device, · 234 unmodified lines | ||
| 235 | 235 | char *buf) |
| 236 | 236 | { |
| 237 | 237 | struct drm_connector *connector = to_drm_connector(device); |
| 238 | − struct drm_device *dev = connector->dev; | |
| 239 | − uint64_t dpms_status; | |
| 240 | − int ret; | |
| 238 | + int dpms; | |
| 241 | 239 | |
| 242 | − ret = drm_object_property_get_value(&connector->base, | |
| 243 | − dev->mode_config.dpms_property, | |
| 244 | − &dpms_status); | |
| 245 | − if (ret) | |
| 246 | − return 0; | |
| 240 | + dpms = READ_ONCE(connector->dpms); | |
| 247 | 241 | |
| 248 | 242 | return snprintf(buf, PAGE_SIZE, "%s\n", |
| 249 | − drm_get_dpms_name((int)dpms_status)); | |
| 243 | + drm_get_dpms_name(dpms)); | |
| 250 | 244 | } |
| 251 | 245 | |
| 252 | 246 | static ssize_t enabled_show(struct device *device, |
| @@ -143,7 +143,7 @@ i915_gem_shrink(struct drm_i915_private *dev_priv, · 142 unmodified lines | ||
| 143 | 143 | } |
| 144 | 144 | |
| 145 | 145 | /** |
| 146 | − * i915_gem_shrink - Shrink buffer object caches completely | |
| 146 | + * i915_gem_shrink_all - Shrink buffer object caches completely | |
| 147 | 147 | * @dev_priv: i915 device |
| 148 | 148 | * |
| 149 | 149 | * This is a simple wraper around i915_gem_shrink() to aggressively shrink all |
| @@ -804,7 +804,10 @@ static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = { · 803 unmodified lines | ||
| 804 | 804 | * Also note, that the object created here is not currently a "first class" |
| 805 | 805 | * object, in that several ioctls are banned. These are the CPU access |
| 806 | 806 | * ioctls: mmap(), pwrite and pread. In practice, you are expected to use |
| 807 | − * direct access via your pointer rather than use those ioctls. | |
| 807 | + * direct access via your pointer rather than use those ioctls. Another | |
| 808 | + * restriction is that we do not allow userptr surfaces to be pinned to the | |
| 809 | + * hardware and so we reject any attempt to create a framebuffer out of a | |
| 810 | + * userptr. | |
| 808 | 811 | * |
| 809 | 812 | * If you think this is a good interface to use to pass GPU memory between |
| 810 | 813 | * drivers, please use dma-buf instead. In fact, wherever possible use |
| @@ -1724,6 +1724,15 @@ static void i9xx_enable_pll(struct intel_crtc *crtc) · 1723 unmodified lines | ||
| 1724 | 1724 | I915_READ(DPLL(!crtc->pipe)) | DPLL_DVO_2X_MODE); |
| 1725 | 1725 | } |
| 1726 | 1726 | |
| 1727 | + /* | |
| 1728 | + * Apparently we need to have VGA mode enabled prior to changing | |
| 1729 | + * the P1/P2 dividers. Otherwise the DPLL will keep using the old | |
| 1730 | + * dividers, even though the register value does change. | |
| 1731 | + */ | |
| 1732 | + I915_WRITE(reg, 0); | |
| 1733 | + | |
| 1734 | + I915_WRITE(reg, dpll); | |
| 1735 | + | |
| 1727 | 1736 | /* Wait for the clocks to stabilize. */ |
| 1728 | 1737 | POSTING_READ(reg); |
| 1729 | 1738 | udelay(150); |
| @@ -14107,6 +14116,11 @@ static int intel_user_framebuffer_create_handle(struct drm_framebuffer *fb, · 12377 unmodified lines | ||
| 14107 | 14116 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); |
| 14108 | 14117 | struct drm_i915_gem_object *obj = intel_fb->obj; |
| 14109 | 14118 | |
| 14119 | + if (obj->userptr.mm) { | |
| 14120 | + DRM_DEBUG("attempting to use a userptr for a framebuffer, denied\n"); | |
| 14121 | + return -EINVAL; | |
| 14122 | + } | |
| 14123 | + | |
| 14110 | 14124 | return drm_gem_handle_create(file, &obj->base, handle); |
| 14111 | 14125 | } |
| 14112 | 14126 | |
| @@ -14897,9 +14911,19 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc) · 784 unmodified lines | ||
| 14897 | 14911 | /* restore vblank interrupts to correct state */ |
| 14898 | 14912 | drm_crtc_vblank_reset(&crtc->base); |
| 14899 | 14913 | if (crtc->active) { |
| 14914 | + struct intel_plane *plane; | |
| 14915 | + | |
| 14900 | 14916 | drm_calc_timestamping_constants(&crtc->base, &crtc->base.hwmode); |
| 14901 | 14917 | update_scanline_offset(crtc); |
| 14902 | 14918 | drm_crtc_vblank_on(&crtc->base); |
| 14919 | + | |
| 14920 | + /* Disable everything but the primary plane */ | |
| 14921 | + for_each_intel_plane_on_crtc(dev, crtc, plane) { | |
| 14922 | + if (plane->base.type == DRM_PLANE_TYPE_PRIMARY) | |
| 14923 | + continue; | |
| 14924 | + | |
| 14925 | + plane->disable_plane(&plane->base, &crtc->base); | |
| 14926 | + } | |
| 14903 | 14927 | } |
| 14904 | 14928 | |
| 14905 | 14929 | /* We need to sanitize the plane -> pipe mapping first because this will |
| @@ -15067,38 +15091,25 @@ void i915_redisable_vga(struct drm_device *dev) · 161 unmodified lines | ||
| 15067 | 15091 | i915_redisable_vga_power_on(dev); |
| 15068 | 15092 | } |
| 15069 | 15093 | |
| 15070 | −static bool primary_get_hw_state(struct intel_crtc *crtc) | |
| 15094 | +static bool primary_get_hw_state(struct intel_plane *plane) | |
| 15071 | 15095 | { |
| 15072 | − struct drm_i915_private *dev_priv = crtc->base.dev->dev_private; | |
| 15096 | + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); | |
| 15073 | 15097 | |
| 15074 | − return !!(I915_READ(DSPCNTR(crtc->plane)) & DISPLAY_PLANE_ENABLE); | |
| 15098 | + return I915_READ(DSPCNTR(plane->plane)) & DISPLAY_PLANE_ENABLE; | |
| 15075 | 15099 | } |
| 15076 | 15100 | |
| 15077 | −static void readout_plane_state(struct intel_crtc *crtc, | |
| 15078 | − struct intel_crtc_state *crtc_state) | |
| 15101 | +/* FIXME read out full plane state for all planes */ | |
| 15102 | +static void readout_plane_state(struct intel_crtc *crtc) | |
| 15079 | 15103 | { |
| 15080 | − struct intel_plane *p; | |
| 15081 | − struct intel_plane_state *plane_state; | |
| 15082 | − bool active = crtc_state->base.active; | |
| 15083 | − | |
| 15084 | − for_each_intel_plane(crtc->base.dev, p) { | |
| 15085 | − if (crtc->pipe != p->pipe) | |
| 15086 | − continue; | |
| 15087 | − | |
| 15088 | − plane_state = to_intel_plane_state(p->base.state); | |
| 15104 | + struct drm_plane *primary = crtc->base.primary; | |
| 15105 | + struct intel_plane_state *plane_state = | |
| 15106 | + to_intel_plane_state(primary->state); | |
| 15089 | 15107 | |
| 15090 | − if (p->base.type == DRM_PLANE_TYPE_PRIMARY) { | |
| 15091 | − plane_state->visible = primary_get_hw_state(crtc); | |
| 15092 | − if (plane_state->visible) | |
| 15093 | − crtc->base.state->plane_mask |= | |
| 15094 | − 1 << drm_plane_index(&p->base); | |
| 15095 | − } else { | |
| 15096 | − if (active) | |
| 15097 | − p->disable_plane(&p->base, &crtc->base); | |
| 15108 | + plane_state->visible = | |
| 15109 | + primary_get_hw_state(to_intel_plane(primary)); | |
| 15098 | 15110 | |
| 15099 | − plane_state->visible = false; | |
| 15100 | − } | |
| 15101 | − } | |
| 15111 | + if (plane_state->visible) | |
| 15112 | + crtc->base.state->plane_mask |= 1 << drm_plane_index(primary); | |
| 15102 | 15113 | } |
| 15103 | 15114 | |
| 15104 | 15115 | static void intel_modeset_readout_hw_state(struct drm_device *dev) |
| @@ -15121,34 +15132,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) · 16 unmodified lines | ||
| 15121 | 15132 | crtc->base.state->active = crtc->active; |
| 15122 | 15133 | crtc->base.enabled = crtc->active; |
| 15123 | 15134 | |
| 15124 | − memset(&crtc->base.mode, 0, sizeof(crtc->base.mode)); | |
| 15125 | − if (crtc->base.state->active) { | |
| 15126 | − intel_mode_from_pipe_config(&crtc->base.mode, crtc->config); | |
| 15127 | − intel_mode_from_pipe_config(&crtc->base.state->adjusted_mode, crtc->config); | |
| 15128 | − WARN_ON(drm_atomic_set_mode_for_crtc(crtc->base.state, &crtc->base.mode)); | |
| 15129 | − | |
| 15130 | − /* | |
| 15131 | − * The initial mode needs to be set in order to keep | |
| 15132 | − * the atomic core happy. It wants a valid mode if the | |
| 15133 | − * crtc's enabled, so we do the above call. | |
| 15134 | − * | |
| 15135 | − * At this point some state updated by the connectors | |
| 15136 | − * in their ->detect() callback has not run yet, so | |
| 15137 | − * no recalculation can be done yet. | |
| 15138 | − * | |
| 15139 | − * Even if we could do a recalculation and modeset | |
| 15140 | − * right now it would cause a double modeset if | |
| 15141 | − * fbdev or userspace chooses a different initial mode. | |
| 15142 | − * | |
| 15143 | − * If that happens, someone indicated they wanted a | |
| 15144 | − * mode change, which means it's safe to do a full | |
| 15145 | − * recalculation. | |
| 15146 | − */ | |
| 15147 | − crtc->base.state->mode.private_flags = I915_MODE_FLAG_INHERITED; | |
| 15148 | − } | |
| 15149 | − | |
| 15150 | − crtc->base.hwmode = crtc->config->base.adjusted_mode; | |
| 15151 | − readout_plane_state(crtc, to_intel_crtc_state(crtc->base.state)); | |
| 15135 | + readout_plane_state(crtc); | |
| 15152 | 15136 | |
| 15153 | 15137 | DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n", |
| 15154 | 15138 | crtc->base.base.id, |
| @@ -15207,6 +15191,36 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) · 52 unmodified lines | ||
| 15207 | 15191 | connector->base.name, |
| 15208 | 15192 | connector->base.encoder ? "enabled" : "disabled"); |
| 15209 | 15193 | } |
| 15194 | + | |
| 15195 | + for_each_intel_crtc(dev, crtc) { | |
| 15196 | + crtc->base.hwmode = crtc->config->base.adjusted_mode; | |
| 15197 | + | |
| 15198 | + memset(&crtc->base.mode, 0, sizeof(crtc->base.mode)); | |
| 15199 | + if (crtc->base.state->active) { | |
| 15200 | + intel_mode_from_pipe_config(&crtc->base.mode, crtc->config); | |
| 15201 | + intel_mode_from_pipe_config(&crtc->base.state->adjusted_mode, crtc->config); | |
| 15202 | + WARN_ON(drm_atomic_set_mode_for_crtc(crtc->base.state, &crtc->base.mode)); | |
| 15203 | + | |
| 15204 | + /* | |
| 15205 | + * The initial mode needs to be set in order to keep | |
| 15206 | + * the atomic core happy. It wants a valid mode if the | |
| 15207 | + * crtc's enabled, so we do the above call. | |
| 15208 | + * | |
| 15209 | + * At this point some state updated by the connectors | |
| 15210 | + * in their ->detect() callback has not run yet, so | |
| 15211 | + * no recalculation can be done yet. | |
| 15212 | + * | |
| 15213 | + * Even if we could do a recalculation and modeset | |
| 15214 | + * right now it would cause a double modeset if | |
| 15215 | + * fbdev or userspace chooses a different initial mode. | |
| 15216 | + * | |
| 15217 | + * If that happens, someone indicated they wanted a | |
| 15218 | + * mode change, which means it's safe to do a full | |
| 15219 | + * recalculation. | |
| 15220 | + */ | |
| 15221 | + crtc->base.state->mode.private_flags = I915_MODE_FLAG_INHERITED; | |
| 15222 | + } | |
| 15223 | + } | |
| 15210 | 15224 | } |
| 15211 | 15225 | |
| 15212 | 15226 | /* Scan out the current hw modeset state, |
| @@ -1659,6 +1659,7 @@ static int gen8_emit_flush_render(struct drm_i915_gem_request *request, · 1658 unmodified lines | ||
| 1659 | 1659 | if (flush_domains) { |
| 1660 | 1660 | flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; |
| 1661 | 1661 | flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH; |
| 1662 | + flags |= PIPE_CONTROL_FLUSH_ENABLE; | |
| 1662 | 1663 | } |
| 1663 | 1664 | |
| 1664 | 1665 | if (invalidate_domains) { |
| @@ -347,6 +347,7 @@ gen7_render_ring_flush(struct drm_i915_gem_request *req, · 346 unmodified lines | ||
| 347 | 347 | if (flush_domains) { |
| 348 | 348 | flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; |
| 349 | 349 | flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH; |
| 350 | + flags |= PIPE_CONTROL_FLUSH_ENABLE; | |
| 350 | 351 | } |
| 351 | 352 | if (invalidate_domains) { |
| 352 | 353 | flags |= PIPE_CONTROL_TLB_INVALIDATE; |
| @@ -418,6 +419,7 @@ gen8_render_ring_flush(struct drm_i915_gem_request *req, · 65 unmodified lines | ||
| 418 | 419 | if (flush_domains) { |
| 419 | 420 | flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH; |
| 420 | 421 | flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH; |
| 422 | + flags |= PIPE_CONTROL_FLUSH_ENABLE; | |
| 421 | 423 | } |
| 422 | 424 | if (invalidate_domains) { |
| 423 | 425 | flags |= PIPE_CONTROL_TLB_INVALIDATE; |
| @@ -469,9 +469,13 @@ nouveau_display_create(struct drm_device *dev) · 468 unmodified lines | ||
| 469 | 469 | if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) { |
| 470 | 470 | dev->mode_config.max_width = 4096; |
| 471 | 471 | dev->mode_config.max_height = 4096; |
| 472 | − } else { | |
| 472 | + } else | |
| 473 | + if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI) { | |
| 473 | 474 | dev->mode_config.max_width = 8192; |
| 474 | 475 | dev->mode_config.max_height = 8192; |
| 476 | + } else { | |
| 477 | + dev->mode_config.max_width = 16384; | |
| 478 | + dev->mode_config.max_height = 16384; | |
| 475 | 479 | } |
| 476 | 480 | |
| 477 | 481 | dev->mode_config.preferred_depth = 24; |
| @@ -178,8 +178,30 @@ nouveau_fbcon_sync(struct fb_info *info) · 177 unmodified lines | ||
| 178 | 178 | return 0; |
| 179 | 179 | } |
| 180 | 180 | |
| 181 | +static int | |
| 182 | +nouveau_fbcon_open(struct fb_info *info, int user) | |
| 183 | +{ | |
| 184 | + struct nouveau_fbdev *fbcon = info->par; | |
| 185 | + struct nouveau_drm *drm = nouveau_drm(fbcon->dev); | |
| 186 | + int ret = pm_runtime_get_sync(drm->dev->dev); | |
| 187 | + if (ret < 0 && ret != -EACCES) | |
| 188 | + return ret; | |
| 189 | + return 0; | |
| 190 | +} | |
| 191 | + | |
| 192 | +static int | |
| 193 | +nouveau_fbcon_release(struct fb_info *info, int user) | |
| 194 | +{ | |
| 195 | + struct nouveau_fbdev *fbcon = info->par; | |
| 196 | + struct nouveau_drm *drm = nouveau_drm(fbcon->dev); | |
| 197 | + pm_runtime_put(drm->dev->dev); | |
| 198 | + return 0; | |
| 199 | +} | |
| 200 | + | |
| 181 | 201 | static struct fb_ops nouveau_fbcon_ops = { |
| 182 | 202 | .owner = THIS_MODULE, |
| 203 | + .fb_open = nouveau_fbcon_open, | |
| 204 | + .fb_release = nouveau_fbcon_release, | |
| 183 | 205 | .fb_check_var = drm_fb_helper_check_var, |
| 184 | 206 | .fb_set_par = drm_fb_helper_set_par, |
| 185 | 207 | .fb_fillrect = nouveau_fbcon_fillrect, |
| @@ -195,6 +217,8 @@ static struct fb_ops nouveau_fbcon_ops = { · 9 unmodified lines | ||
| 195 | 217 | |
| 196 | 218 | static struct fb_ops nouveau_fbcon_sw_ops = { |
| 197 | 219 | .owner = THIS_MODULE, |
| 220 | + .fb_open = nouveau_fbcon_open, | |
| 221 | + .fb_release = nouveau_fbcon_release, | |
| 198 | 222 | .fb_check_var = drm_fb_helper_check_var, |
| 199 | 223 | .fb_set_par = drm_fb_helper_set_par, |
| 200 | 224 | .fb_fillrect = drm_fb_helper_cfb_fillrect, |
| @@ -227,11 +227,12 @@ nouveau_gem_info(struct drm_file *file_priv, struct drm_gem_object *gem, · 226 unmodified lines | ||
| 227 | 227 | struct nouveau_bo *nvbo = nouveau_gem_object(gem); |
| 228 | 228 | struct nvkm_vma *vma; |
| 229 | 229 | |
| 230 | − if (nvbo->bo.mem.mem_type == TTM_PL_TT) | |
| 230 | + if (is_power_of_2(nvbo->valid_domains)) | |
| 231 | + rep->domain = nvbo->valid_domains; | |
| 232 | + else if (nvbo->bo.mem.mem_type == TTM_PL_TT) | |
| 231 | 233 | rep->domain = NOUVEAU_GEM_DOMAIN_GART; |
| 232 | 234 | else |
| 233 | 235 | rep->domain = NOUVEAU_GEM_DOMAIN_VRAM; |
| 234 | − | |
| 235 | 236 | rep->offset = nvbo->bo.offset; |
| 236 | 237 | if (cli->vm) { |
| 237 | 238 | vma = nouveau_bo_vma_find(nvbo, cli->vm); |
| @@ -267,6 +267,12 @@ init_i2c(struct nvbios_init *init, int index) · 266 unmodified lines | ||
| 267 | 267 | index = NVKM_I2C_BUS_PRI; |
| 268 | 268 | if (init->outp && init->outp->i2c_upper_default) |
| 269 | 269 | index = NVKM_I2C_BUS_SEC; |
| 270 | + } else | |
| 271 | + if (index == 0x80) { | |
| 272 | + index = NVKM_I2C_BUS_PRI; | |
| 273 | + } else | |
| 274 | + if (index == 0x81) { | |
| 275 | + index = NVKM_I2C_BUS_SEC; | |
| 270 | 276 | } |
| 271 | 277 | |
| 272 | 278 | bus = nvkm_i2c_bus_find(i2c, index); |
| @@ -8,7 +8,10 @@ struct nvbios_source { · 7 unmodified lines | ||
| 8 | 8 | void *(*init)(struct nvkm_bios *, const char *); |
| 9 | 9 | void (*fini)(void *); |
| 10 | 10 | u32 (*read)(void *, u32 offset, u32 length, struct nvkm_bios *); |
| 11 | + u32 (*size)(void *); | |
| 11 | 12 | bool rw; |
| 13 | + bool ignore_checksum; | |
| 14 | + bool no_pcir; | |
| 12 | 15 | }; |
| 13 | 16 | |
| 14 | 17 | int nvbios_extend(struct nvkm_bios *, u32 length); |
| @@ -45,7 +45,7 @@ shadow_fetch(struct nvkm_bios *bios, struct shadow *mthd, u32 upto) · 44 unmodified lines | ||
| 45 | 45 | u32 read = mthd->func->read(data, start, limit - start, bios); |
| 46 | 46 | bios->size = start + read; |
| 47 | 47 | } |
| 48 | − return bios->size >= limit; | |
| 48 | + return bios->size >= upto; | |
| 49 | 49 | } |
| 50 | 50 | |
| 51 | 51 | static int |
| @@ -55,14 +55,22 @@ shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd) · 3 unmodified lines | ||
| 55 | 55 | struct nvbios_image image; |
| 56 | 56 | int score = 1; |
| 57 | 57 | |
| 58 | − if (!shadow_fetch(bios, mthd, offset + 0x1000)) { | |
| 59 | − nvkm_debug(subdev, "%08x: header fetch failed\n", offset); | |
| 60 | − return 0; | |
| 61 | − } | |
| 58 | + if (mthd->func->no_pcir) { | |
| 59 | + image.base = 0; | |
| 60 | + image.type = 0; | |
| 61 | + image.size = mthd->func->size(mthd->data); | |
| 62 | + image.last = 1; | |
| 63 | + } else { | |
| 64 | + if (!shadow_fetch(bios, mthd, offset + 0x1000)) { | |
| 65 | + nvkm_debug(subdev, "%08x: header fetch failed\n", | |
| 66 | + offset); | |
| 67 | + return 0; | |
| 68 | + } | |
| 62 | 69 | |
| 63 | − if (!nvbios_image(bios, idx, &image)) { | |
| 64 | − nvkm_debug(subdev, "image %d invalid\n", idx); | |
| 65 | − return 0; | |
| 70 | + if (!nvbios_image(bios, idx, &image)) { | |
| 71 | + nvkm_debug(subdev, "image %d invalid\n", idx); | |
| 72 | + return 0; | |
| 73 | + } | |
| 66 | 74 | } |
| 67 | 75 | nvkm_debug(subdev, "%08x: type %02x, %d bytes\n", |
| 68 | 76 | image.base, image.type, image.size); |
| @@ -74,7 +82,8 @@ shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd) · 5 unmodified lines | ||
| 74 | 82 | |
| 75 | 83 | switch (image.type) { |
| 76 | 84 | case 0x00: |
| 77 | − if (nvbios_checksum(&bios->data[image.base], image.size)) { | |
| 85 | + if (!mthd->func->ignore_checksum && | |
| 86 | + nvbios_checksum(&bios->data[image.base], image.size)) { | |
| 78 | 87 | nvkm_debug(subdev, "%08x: checksum failed\n", |
| 79 | 88 | image.base); |
| 80 | 89 | if (mthd->func->rw) |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | * |
| 22 | 22 | */ |
| 23 | 23 | #include "priv.h" |
| 24 | + | |
| 24 | 25 | #include <core/pci.h> |
| 25 | 26 | |
| 26 | 27 | #if defined(__powerpc__) |
| @@ -33,17 +34,26 @@ static u32 · 6 unmodified lines | ||
| 33 | 34 | of_read(void *data, u32 offset, u32 length, struct nvkm_bios *bios) |
| 34 | 35 | { |
| 35 | 36 | struct priv *priv = data; |
| 36 | − if (offset + length <= priv->size) { | |
| 37 | + if (offset < priv->size) { | |
| 38 | + length = min_t(u32, length, priv->size - offset); | |
| 37 | 39 | memcpy_fromio(bios->data + offset, priv->data + offset, length); |
| 38 | 40 | return length; |
| 39 | 41 | } |
| 40 | 42 | return 0; |
| 41 | 43 | } |
| 42 | 44 | |
| 45 | +static u32 | |
| 46 | +of_size(void *data) | |
| 47 | +{ | |
| 48 | + struct priv *priv = data; | |
| 49 | + return priv->size; | |
| 50 | +} | |
| 51 | + | |
| 43 | 52 | static void * |
| 44 | 53 | of_init(struct nvkm_bios *bios, const char *name) |
| 45 | 54 | { |
| 46 | − struct pci_dev *pdev = bios->subdev.device->func->pci(bios->subdev.device)->pdev; | |
| 55 | + struct nvkm_device *device = bios->subdev.device; | |
| 56 | + struct pci_dev *pdev = device->func->pci(device)->pdev; | |
| 47 | 57 | struct device_node *dn; |
| 48 | 58 | struct priv *priv; |
| 49 | 59 | if (!(dn = pci_device_to_OF_node(pdev))) |
| @@ -62,7 +72,10 @@ nvbios_of = { · 12 unmodified lines | ||
| 62 | 72 | .init = of_init, |
| 63 | 73 | .fini = (void(*)(void *))kfree, |
| 64 | 74 | .read = of_read, |
| 75 | + .size = of_size, | |
| 65 | 76 | .rw = false, |
| 77 | + .ignore_checksum = true, | |
| 78 | + .no_pcir = true, | |
| 66 | 79 | }; |
| 67 | 80 | #else |
| 68 | 81 | const struct nvbios_source |
| @@ -35,6 +35,8 @@ static const struct nvkm_device_agp_quirk · 34 unmodified lines | ||
| 35 | 35 | nvkm_device_agp_quirks[] = { |
| 36 | 36 | /* VIA Apollo PRO133x / GeForce FX 5600 Ultra - fdo#20341 */ |
| 37 | 37 | { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 }, |
| 38 | + /* SiS 761 does not support AGP cards, use PCI mode */ | |
| 39 | + { PCI_VENDOR_ID_SI, 0x0761, PCI_ANY_ID, PCI_ANY_ID, 0 }, | |
| 38 | 40 | {}, |
| 39 | 41 | }; |
| 40 | 42 | |
| @@ -137,8 +139,10 @@ nvkm_agp_ctor(struct nvkm_pci *pci) · 96 unmodified lines | ||
| 137 | 139 | while (quirk->hostbridge_vendor) { |
| 138 | 140 | if (info.device->vendor == quirk->hostbridge_vendor && |
| 139 | 141 | info.device->device == quirk->hostbridge_device && |
| 140 | − pci->pdev->vendor == quirk->chip_vendor && | |
| 141 | − pci->pdev->device == quirk->chip_device) { | |
| 142 | + (quirk->chip_vendor == (u16)PCI_ANY_ID || | |
| 143 | + pci->pdev->vendor == quirk->chip_vendor) && | |
| 144 | + (quirk->chip_device == (u16)PCI_ANY_ID || | |
| 145 | + pci->pdev->device == quirk->chip_device)) { | |
| 142 | 146 | nvkm_info(subdev, "forcing default agp mode to %dX, " |
| 143 | 147 | "use NvAGP=<mode> to override\n", |
| 144 | 148 | quirk->mode); |
| @@ -242,6 +242,10 @@ static int qxl_crtc_page_flip(struct drm_crtc *crtc, · 241 unmodified lines | ||
| 242 | 242 | bo->is_primary = true; |
| 243 | 243 | |
| 244 | 244 | ret = qxl_bo_reserve(bo, false); |
| 245 | + if (ret) | |
| 246 | + return ret; | |
| 247 | + ret = qxl_bo_pin(bo, bo->type, NULL); | |
| 248 | + qxl_bo_unreserve(bo); | |
| 245 | 249 | if (ret) |
| 246 | 250 | return ret; |
| 247 | 251 | |
| @@ -257,7 +261,11 @@ static int qxl_crtc_page_flip(struct drm_crtc *crtc, · 9 unmodified lines | ||
| 257 | 261 | } |
| 258 | 262 | drm_vblank_put(dev, qcrtc->index); |
| 259 | 263 | |
| 260 | − qxl_bo_unreserve(bo); | |
| 264 | + ret = qxl_bo_reserve(bo, false); | |
| 265 | + if (!ret) { | |
| 266 | + qxl_bo_unpin(bo); | |
| 267 | + qxl_bo_unreserve(bo); | |
| 268 | + } | |
| 261 | 269 | |
| 262 | 270 | return 0; |
| 263 | 271 | } |
| @@ -144,14 +144,17 @@ static void qxl_dirty_update(struct qxl_fbdev *qfbdev, · 143 unmodified lines | ||
| 144 | 144 | |
| 145 | 145 | spin_lock_irqsave(&qfbdev->dirty.lock, flags); |
| 146 | 146 | |
| 147 | − if (qfbdev->dirty.y1 < y) | |
| 148 | − y = qfbdev->dirty.y1; | |
| 149 | − if (qfbdev->dirty.y2 > y2) | |
| 150 | − y2 = qfbdev->dirty.y2; | |
| 151 | − if (qfbdev->dirty.x1 < x) | |
| 152 | − x = qfbdev->dirty.x1; | |
| 153 | − if (qfbdev->dirty.x2 > x2) | |
| 154 | − x2 = qfbdev->dirty.x2; | |
| 147 | + if ((qfbdev->dirty.y2 - qfbdev->dirty.y1) && | |
| 148 | + (qfbdev->dirty.x2 - qfbdev->dirty.x1)) { | |
| 149 | + if (qfbdev->dirty.y1 < y) | |
| 150 | + y = qfbdev->dirty.y1; | |
| 151 | + if (qfbdev->dirty.y2 > y2) | |
| 152 | + y2 = qfbdev->dirty.y2; | |
| 153 | + if (qfbdev->dirty.x1 < x) | |
| 154 | + x = qfbdev->dirty.x1; | |
| 155 | + if (qfbdev->dirty.x2 > x2) | |
| 156 | + x2 = qfbdev->dirty.x2; | |
| 157 | + } | |
| 155 | 158 | |
| 156 | 159 | qfbdev->dirty.x1 = x; |
| 157 | 160 | qfbdev->dirty.x2 = x2; |
| @@ -307,7 +307,7 @@ int qxl_alloc_surface_release_reserved(struct qxl_device *qdev, · 306 unmodified lines | ||
| 307 | 307 | idr_ret = qxl_release_alloc(qdev, QXL_RELEASE_SURFACE_CMD, release); |
| 308 | 308 | if (idr_ret < 0) |
| 309 | 309 | return idr_ret; |
| 310 | − bo = qxl_bo_ref(to_qxl_bo(entry->tv.bo)); | |
| 310 | + bo = to_qxl_bo(entry->tv.bo); | |
| 311 | 311 | |
| 312 | 312 | (*release)->release_offset = create_rel->release_offset + 64; |
| 313 | 313 | |
| @@ -316,8 +316,6 @@ int qxl_alloc_surface_release_reserved(struct qxl_device *qdev, · 2 unmodified lines | ||
| 316 | 316 | info = qxl_release_map(qdev, *release); |
| 317 | 317 | info->id = idr_ret; |
| 318 | 318 | qxl_release_unmap(qdev, *release, info); |
| 319 | − | |
| 320 | − qxl_bo_unref(&bo); | |
| 321 | 319 | return 0; |
| 322 | 320 | } |
| 323 | 321 | |
| @@ -1633,18 +1633,8 @@ int radeon_modeset_init(struct radeon_device *rdev) · 1632 unmodified lines | ||
| 1633 | 1633 | radeon_fbdev_init(rdev); |
| 1634 | 1634 | drm_kms_helper_poll_init(rdev->ddev); |
| 1635 | 1635 | |
| 1636 | − if (rdev->pm.dpm_enabled) { | |
| 1637 | − /* do dpm late init */ | |
| 1638 | − ret = radeon_pm_late_init(rdev); | |
| 1639 | − if (ret) { | |
| 1640 | − rdev->pm.dpm_enabled = false; | |
| 1641 | − DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n"); | |
| 1642 | − } | |
| 1643 | − /* set the dpm state for PX since there won't be | |
| 1644 | − * a modeset to call this. | |
| 1645 | − */ | |
| 1646 | − radeon_pm_compute_clocks(rdev); | |
| 1647 | − } | |
| 1636 | + /* do pm late init */ | |
| 1637 | + ret = radeon_pm_late_init(rdev); | |
| 1648 | 1638 | |
| 1649 | 1639 | return 0; |
| 1650 | 1640 | } |
| @@ -283,6 +283,7 @@ static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topol · 282 unmodified lines | ||
| 283 | 283 | radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master); |
| 284 | 284 | |
| 285 | 285 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); |
| 286 | + drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); | |
| 286 | 287 | drm_mode_connector_set_path_property(connector, pathprop); |
| 287 | 288 | |
| 288 | 289 | return connector; |
| @@ -397,3 +397,19 @@ void radeon_fb_remove_connector(struct radeon_device *rdev, struct drm_connector · 396 unmodified lines | ||
| 397 | 397 | { |
| 398 | 398 | drm_fb_helper_remove_one_connector(&rdev->mode_info.rfbdev->helper, connector); |
| 399 | 399 | } |
| 400 | + | |
| 401 | +void radeon_fbdev_restore_mode(struct radeon_device *rdev) | |
| 402 | +{ | |
| 403 | + struct radeon_fbdev *rfbdev = rdev->mode_info.rfbdev; | |
| 404 | + struct drm_fb_helper *fb_helper; | |
| 405 | + int ret; | |
| 406 | + | |
| 407 | + if (!rfbdev) | |
| 408 | + return; | |
| 409 | + | |
| 410 | + fb_helper = &rfbdev->helper; | |
| 411 | + | |
| 412 | + ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper); | |
| 413 | + if (ret) | |
| 414 | + DRM_DEBUG("failed to restore crtc mode\n"); | |
| 415 | +} | |
| @@ -598,7 +598,7 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 597 unmodified lines | ||
| 598 | 598 | * Outdated mess for old drm with Xorg being in charge (void function now). |
| 599 | 599 | */ |
| 600 | 600 | /** |
| 601 | − * radeon_driver_firstopen_kms - drm callback for last close | |
| 601 | + * radeon_driver_lastclose_kms - drm callback for last close | |
| 602 | 602 | * |
| 603 | 603 | * @dev: drm dev pointer |
| 604 | 604 | * |
| @@ -606,6 +606,9 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 1 unmodified line | ||
| 606 | 606 | */ |
| 607 | 607 | void radeon_driver_lastclose_kms(struct drm_device *dev) |
| 608 | 608 | { |
| 609 | + struct radeon_device *rdev = dev->dev_private; | |
| 610 | + | |
| 611 | + radeon_fbdev_restore_mode(rdev); | |
| 609 | 612 | vga_switcheroo_process_delayed_switch(); |
| 610 | 613 | } |
| 611 | 614 | |
| @@ -980,6 +980,7 @@ int radeon_fbdev_init(struct radeon_device *rdev); · 979 unmodified lines | ||
| 980 | 980 | void radeon_fbdev_fini(struct radeon_device *rdev); |
| 981 | 981 | void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state); |
| 982 | 982 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj); |
| 983 | +void radeon_fbdev_restore_mode(struct radeon_device *rdev); | |
| 983 | 984 | |
| 984 | 985 | void radeon_fb_output_poll_changed(struct radeon_device *rdev); |
| 985 | 986 | |
| @@ -717,10 +717,14 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj, · 716 unmodified lines | ||
| 717 | 717 | struct radeon_device *rdev = dev_get_drvdata(dev); |
| 718 | 718 | umode_t effective_mode = attr->mode; |
| 719 | 719 | |
| 720 | − /* Skip limit attributes if DPM is not enabled */ | |
| 720 | + /* Skip attributes if DPM is not enabled */ | |
| 721 | 721 | if (rdev->pm.pm_method != PM_METHOD_DPM && |
| 722 | 722 | (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr || |
| 723 | − attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr)) | |
| 723 | + attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr || | |
| 724 | + attr == &sensor_dev_attr_pwm1.dev_attr.attr || | |
| 725 | + attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr || | |
| 726 | + attr == &sensor_dev_attr_pwm1_max.dev_attr.attr || | |
| 727 | + attr == &sensor_dev_attr_pwm1_min.dev_attr.attr)) | |
| 724 | 728 | return 0; |
| 725 | 729 | |
| 726 | 730 | /* Skip fan attributes if fan is not present */ |
| @@ -1326,14 +1330,6 @@ static int radeon_pm_init_old(struct radeon_device *rdev) · 599 unmodified lines | ||
| 1326 | 1330 | INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); |
| 1327 | 1331 | |
| 1328 | 1332 | if (rdev->pm.num_power_states > 1) { |
| 1329 | − /* where's the best place to put these? */ | |
| 1330 | − ret = device_create_file(rdev->dev, &dev_attr_power_profile); | |
| 1331 | − if (ret) | |
| 1332 | − DRM_ERROR("failed to create device file for power profile\n"); | |
| 1333 | − ret = device_create_file(rdev->dev, &dev_attr_power_method); | |
| 1334 | − if (ret) | |
| 1335 | − DRM_ERROR("failed to create device file for power method\n"); | |
| 1336 | − | |
| 1337 | 1333 | if (radeon_debugfs_pm_init(rdev)) { |
| 1338 | 1334 | DRM_ERROR("Failed to register debugfs file for PM!\n"); |
| 1339 | 1335 | } |
| @@ -1391,20 +1387,6 @@ static int radeon_pm_init_dpm(struct radeon_device *rdev) · 51 unmodified lines | ||
| 1391 | 1387 | goto dpm_failed; |
| 1392 | 1388 | rdev->pm.dpm_enabled = true; |
| 1393 | 1389 | |
| 1394 | − ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state); | |
| 1395 | − if (ret) | |
| 1396 | − DRM_ERROR("failed to create device file for dpm state\n"); | |
| 1397 | − ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); | |
| 1398 | − if (ret) | |
| 1399 | − DRM_ERROR("failed to create device file for dpm state\n"); | |
| 1400 | − /* XXX: these are noops for dpm but are here for backwards compat */ | |
| 1401 | − ret = device_create_file(rdev->dev, &dev_attr_power_profile); | |
| 1402 | − if (ret) | |
| 1403 | − DRM_ERROR("failed to create device file for power profile\n"); | |
| 1404 | − ret = device_create_file(rdev->dev, &dev_attr_power_method); | |
| 1405 | − if (ret) | |
| 1406 | − DRM_ERROR("failed to create device file for power method\n"); | |
| 1407 | − | |
| 1408 | 1390 | if (radeon_debugfs_pm_init(rdev)) { |
| 1409 | 1391 | DRM_ERROR("Failed to register debugfs file for dpm!\n"); |
| 1410 | 1392 | } |
| @@ -1545,9 +1527,44 @@ int radeon_pm_late_init(struct radeon_device *rdev) · 134 unmodified lines | ||
| 1545 | 1527 | int ret = 0; |
| 1546 | 1528 | |
| 1547 | 1529 | if (rdev->pm.pm_method == PM_METHOD_DPM) { |
| 1548 | − mutex_lock(&rdev->pm.mutex); | |
| 1549 | − ret = radeon_dpm_late_enable(rdev); | |
| 1550 | − mutex_unlock(&rdev->pm.mutex); | |
| 1530 | + if (rdev->pm.dpm_enabled) { | |
| 1531 | + ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state); | |
| 1532 | + if (ret) | |
| 1533 | + DRM_ERROR("failed to create device file for dpm state\n"); | |
| 1534 | + ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); | |
| 1535 | + if (ret) | |
| 1536 | + DRM_ERROR("failed to create device file for dpm state\n"); | |
| 1537 | + /* XXX: these are noops for dpm but are here for backwards compat */ | |
| 1538 | + ret = device_create_file(rdev->dev, &dev_attr_power_profile); | |
| 1539 | + if (ret) | |
| 1540 | + DRM_ERROR("failed to create device file for power profile\n"); | |
| 1541 | + ret = device_create_file(rdev->dev, &dev_attr_power_method); | |
| 1542 | + if (ret) | |
| 1543 | + DRM_ERROR("failed to create device file for power method\n"); | |
| 1544 | + | |
| 1545 | + mutex_lock(&rdev->pm.mutex); | |
| 1546 | + ret = radeon_dpm_late_enable(rdev); | |
| 1547 | + mutex_unlock(&rdev->pm.mutex); | |
| 1548 | + if (ret) { | |
| 1549 | + rdev->pm.dpm_enabled = false; | |
| 1550 | + DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n"); | |
| 1551 | + } else { | |
| 1552 | + /* set the dpm state for PX since there won't be | |
| 1553 | + * a modeset to call this. | |
| 1554 | + */ | |
| 1555 | + radeon_pm_compute_clocks(rdev); | |
| 1556 | + } | |
| 1557 | + } | |
| 1558 | + } else { | |
| 1559 | + if (rdev->pm.num_power_states > 1) { | |
| 1560 | + /* where's the best place to put these? */ | |
| 1561 | + ret = device_create_file(rdev->dev, &dev_attr_power_profile); | |
| 1562 | + if (ret) | |
| 1563 | + DRM_ERROR("failed to create device file for power profile\n"); | |
| 1564 | + ret = device_create_file(rdev->dev, &dev_attr_power_method); | |
| 1565 | + if (ret) | |
| 1566 | + DRM_ERROR("failed to create device file for power method\n"); | |
| 1567 | + } | |
| 1551 | 1568 | } |
| 1552 | 1569 | return ret; |
| 1553 | 1570 | } |
| @@ -2928,6 +2928,7 @@ static struct si_dpm_quirk si_dpm_quirk_list[] = { · 2927 unmodified lines | ||
| 2928 | 2928 | { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 }, |
| 2929 | 2929 | { PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 }, |
| 2930 | 2930 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1762, 0x2015, 0, 120000 }, |
| 2931 | + { PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 }, | |
| 2931 | 2932 | { 0, 0, 0, 0 }, |
| 2932 | 2933 | }; |
| 2933 | 2934 | |
| @@ -34,8 +34,8 @@ virtio_gpu_debugfs_irq_info(struct seq_file *m, void *data) · 33 unmodified lines | ||
| 34 | 34 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 35 | 35 | struct virtio_gpu_device *vgdev = node->minor->dev->dev_private; |
| 36 | 36 | |
| 37 | − seq_printf(m, "fence %ld %lld\n", | |
| 38 | − atomic64_read(&vgdev->fence_drv.last_seq), | |
| 37 | + seq_printf(m, "fence %llu %lld\n", | |
| 38 | + (u64)atomic64_read(&vgdev->fence_drv.last_seq), | |
| 39 | 39 | vgdev->fence_drv.sync_seq); |
| 40 | 40 | return 0; |
| 41 | 41 | } |
| @@ -61,7 +61,7 @@ static void virtio_timeline_value_str(struct fence *f, char *str, int size) · 60 unmodified lines | ||
| 61 | 61 | { |
| 62 | 62 | struct virtio_gpu_fence *fence = to_virtio_fence(f); |
| 63 | 63 | |
| 64 | − snprintf(str, size, "%lu", atomic64_read(&fence->drv->last_seq)); | |
| 64 | + snprintf(str, size, "%llu", (u64)atomic64_read(&fence->drv->last_seq)); | |
| 65 | 65 | } |
| 66 | 66 | |
| 67 | 67 | static const struct fence_ops virtio_fence_ops = { |
| @@ -657,7 +657,8 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base) · 656 unmodified lines | ||
| 657 | 657 | struct vmw_resource *res = &user_srf->srf.res; |
| 658 | 658 | |
| 659 | 659 | *p_base = NULL; |
| 660 | − ttm_base_object_unref(&user_srf->backup_base); | |
| 660 | + if (user_srf->backup_base) | |
| 661 | + ttm_base_object_unref(&user_srf->backup_base); | |
| 661 | 662 | vmw_resource_unreference(&res); |
| 662 | 663 | } |
| 663 | 664 | |
| @@ -24,6 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/kernel.h> |
| 25 | 25 | #include <linux/module.h> |
| 26 | 26 | #include <linux/delay.h> |
| 27 | +#include <linux/dmi.h> | |
| 27 | 28 | #include <linux/i2c.h> |
| 28 | 29 | #include <linux/clk.h> |
| 29 | 30 | #include <linux/clk-provider.h> |
| @@ -51,6 +52,22 @@ static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) · 21 unmodified lines | ||
| 51 | 52 | } |
| 52 | 53 | |
| 53 | 54 | #ifdef CONFIG_ACPI |
| 55 | +/* | |
| 56 | + * The HCNT/LCNT information coming from ACPI should be the most accurate | |
| 57 | + * for given platform. However, some systems get it wrong. On such systems | |
| 58 | + * we get better results by calculating those based on the input clock. | |
| 59 | + */ | |
| 60 | +static const struct dmi_system_id dw_i2c_no_acpi_params[] = { | |
| 61 | + { | |
| 62 | + .ident = "Dell Inspiron 7348", | |
| 63 | + .matches = { | |
| 64 | + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
| 65 | + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"), | |
| 66 | + }, | |
| 67 | + }, | |
| 68 | + { } | |
| 69 | +}; | |
| 70 | + | |
| 54 | 71 | static void dw_i2c_acpi_params(struct platform_device *pdev, char method[], |
| 55 | 72 | u16 *hcnt, u16 *lcnt, u32 *sda_hold) |
| 56 | 73 | { |
| @@ -58,6 +75,9 @@ static void dw_i2c_acpi_params(struct platform_device *pdev, char method[], · 1 unmodified line | ||
| 58 | 75 | acpi_handle handle = ACPI_HANDLE(&pdev->dev); |
| 59 | 76 | union acpi_object *obj; |
| 60 | 77 | |
| 78 | + if (dmi_check_system(dw_i2c_no_acpi_params)) | |
| 79 | + return; | |
| 80 | + | |
| 61 | 81 | if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf))) |
| 62 | 82 | return; |
| 63 | 83 | |
| @@ -253,12 +273,6 @@ static int dw_i2c_probe(struct platform_device *pdev) · 189 unmodified lines | ||
| 253 | 273 | adap->dev.parent = &pdev->dev; |
| 254 | 274 | adap->dev.of_node = pdev->dev.of_node; |
| 255 | 275 | |
| 256 | − r = i2c_add_numbered_adapter(adap); | |
| 257 | − if (r) { | |
| 258 | − dev_err(&pdev->dev, "failure adding adapter\n"); | |
| 259 | − return r; | |
| 260 | − } | |
| 261 | − | |
| 262 | 276 | if (dev->pm_runtime_disabled) { |
| 263 | 277 | pm_runtime_forbid(&pdev->dev); |
| 264 | 278 | } else { |
| @@ -268,6 +282,13 @@ static int dw_i2c_probe(struct platform_device *pdev) · 3 unmodified lines | ||
| 268 | 282 | pm_runtime_enable(&pdev->dev); |
| 269 | 283 | } |
| 270 | 284 | |
| 285 | + r = i2c_add_numbered_adapter(adap); | |
| 286 | + if (r) { | |
| 287 | + dev_err(&pdev->dev, "failure adding adapter\n"); | |
| 288 | + pm_runtime_disable(&pdev->dev); | |
| 289 | + return r; | |
| 290 | + } | |
| 291 | + | |
| 271 | 292 | return 0; |
| 272 | 293 | } |
| 273 | 294 | |
| @@ -690,15 +690,16 @@ static int rcar_i2c_probe(struct platform_device *pdev) · 689 unmodified lines | ||
| 690 | 690 | return ret; |
| 691 | 691 | } |
| 692 | 692 | |
| 693 | + pm_runtime_enable(dev); | |
| 694 | + platform_set_drvdata(pdev, priv); | |
| 695 | + | |
| 693 | 696 | ret = i2c_add_numbered_adapter(adap); |
| 694 | 697 | if (ret < 0) { |
| 695 | 698 | dev_err(dev, "reg adap failed: %d\n", ret); |
| 699 | + pm_runtime_disable(dev); | |
| 696 | 700 | return ret; |
| 697 | 701 | } |
| 698 | 702 | |
| 699 | − pm_runtime_enable(dev); | |
| 700 | − platform_set_drvdata(pdev, priv); | |
| 701 | − | |
| 702 | 703 | dev_info(dev, "probed\n"); |
| 703 | 704 | |
| 704 | 705 | return 0; |
| @@ -1243,17 +1243,19 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) · 1242 unmodified lines | ||
| 1243 | 1243 | i2c->adap.nr = i2c->pdata->bus_num; |
| 1244 | 1244 | i2c->adap.dev.of_node = pdev->dev.of_node; |
| 1245 | 1245 | |
| 1246 | + platform_set_drvdata(pdev, i2c); | |
| 1247 | + | |
| 1248 | + pm_runtime_enable(&pdev->dev); | |
| 1249 | + | |
| 1246 | 1250 | ret = i2c_add_numbered_adapter(&i2c->adap); |
| 1247 | 1251 | if (ret < 0) { |
| 1248 | 1252 | dev_err(&pdev->dev, "failed to add bus to i2c core\n"); |
| 1253 | + pm_runtime_disable(&pdev->dev); | |
| 1249 | 1254 | s3c24xx_i2c_deregister_cpufreq(i2c); |
| 1250 | 1255 | clk_unprepare(i2c->clk); |
| 1251 | 1256 | return ret; |
| 1252 | 1257 | } |
| 1253 | 1258 | |
| 1254 | − platform_set_drvdata(pdev, i2c); | |
| 1255 | − | |
| 1256 | − pm_runtime_enable(&pdev->dev); | |
| 1257 | 1259 | pm_runtime_enable(&i2c->adap.dev); |
| 1258 | 1260 | |
| 1259 | 1261 | dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); |
| @@ -694,12 +694,12 @@ static int i2c_device_probe(struct device *dev) · 693 unmodified lines | ||
| 694 | 694 | goto err_clear_wakeup_irq; |
| 695 | 695 | |
| 696 | 696 | status = dev_pm_domain_attach(&client->dev, true); |
| 697 | − if (status != -EPROBE_DEFER) { | |
| 698 | − status = driver->probe(client, i2c_match_id(driver->id_table, | |
| 699 | − client)); | |
| 700 | − if (status) | |
| 701 | − goto err_detach_pm_domain; | |
| 702 | − } | |
| 697 | + if (status == -EPROBE_DEFER) | |
| 698 | + goto err_clear_wakeup_irq; | |
| 699 | + | |
| 700 | + status = driver->probe(client, i2c_match_id(driver->id_table, client)); | |
| 701 | + if (status) | |
| 702 | + goto err_detach_pm_domain; | |
| 703 | 703 | |
| 704 | 704 | return 0; |
| 705 | 705 | |
| @@ -149,8 +149,6 @@ · 148 unmodified lines | ||
| 149 | 149 | #define ST_ACCEL_4_BDU_MASK 0x40 |
| 150 | 150 | #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21 |
| 151 | 151 | #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04 |
| 152 | −#define ST_ACCEL_4_IG1_EN_ADDR 0x21 | |
| 153 | −#define ST_ACCEL_4_IG1_EN_MASK 0x08 | |
| 154 | 152 | #define ST_ACCEL_4_MULTIREAD_BIT true |
| 155 | 153 | |
| 156 | 154 | /* CUSTOM VALUES FOR SENSOR 5 */ |
| @@ -489,10 +487,6 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = { · 332 unmodified lines | ||
| 489 | 487 | .drdy_irq = { |
| 490 | 488 | .addr = ST_ACCEL_4_DRDY_IRQ_ADDR, |
| 491 | 489 | .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK, |
| 492 | − .ig1 = { | |
| 493 | − .en_addr = ST_ACCEL_4_IG1_EN_ADDR, | |
| 494 | − .en_mask = ST_ACCEL_4_IG1_EN_MASK, | |
| 495 | − }, | |
| 496 | 490 | }, |
| 497 | 491 | .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT, |
| 498 | 492 | .bootime = 2, /* guess */ |
| @@ -45,13 +45,18 @@ · 44 unmodified lines | ||
| 45 | 45 | #include <linux/types.h> |
| 46 | 46 | #include <linux/gfp.h> |
| 47 | 47 | #include <linux/err.h> |
| 48 | +#include <linux/regulator/consumer.h> | |
| 48 | 49 | |
| 49 | 50 | #include <linux/iio/iio.h> |
| 50 | 51 | |
| 52 | +#define TWL4030_USB_SEL_MADC_MCPC (1<<3) | |
| 53 | +#define TWL4030_USB_CARKIT_ANA_CTRL 0xBB | |
| 54 | + | |
| 51 | 55 | /** |
| 52 | 56 | * struct twl4030_madc_data - a container for madc info |
| 53 | 57 | * @dev: Pointer to device structure for madc |
| 54 | 58 | * @lock: Mutex protecting this data structure |
| 59 | + * @regulator: Pointer to bias regulator for madc | |
| 55 | 60 | * @requests: Array of request struct corresponding to SW1, SW2 and RT |
| 56 | 61 | * @use_second_irq: IRQ selection (main or co-processor) |
| 57 | 62 | * @imr: Interrupt mask register of MADC |
| @@ -60,6 +65,7 @@ · 2 unmodified lines | ||
| 60 | 65 | struct twl4030_madc_data { |
| 61 | 66 | struct device *dev; |
| 62 | 67 | struct mutex lock; /* mutex protecting this data structure */ |
| 68 | + struct regulator *usb3v1; | |
| 63 | 69 | struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS]; |
| 64 | 70 | bool use_second_irq; |
| 65 | 71 | u8 imr; |
| @@ -841,6 +847,32 @@ static int twl4030_madc_probe(struct platform_device *pdev) · 775 unmodified lines | ||
| 841 | 847 | } |
| 842 | 848 | twl4030_madc = madc; |
| 843 | 849 | |
| 850 | + /* Configure MADC[3:6] */ | |
| 851 | + ret = twl_i2c_read_u8(TWL_MODULE_USB, ®val, | |
| 852 | + TWL4030_USB_CARKIT_ANA_CTRL); | |
| 853 | + if (ret) { | |
| 854 | + dev_err(&pdev->dev, "unable to read reg CARKIT_ANA_CTRL 0x%X\n", | |
| 855 | + TWL4030_USB_CARKIT_ANA_CTRL); | |
| 856 | + goto err_i2c; | |
| 857 | + } | |
| 858 | + regval |= TWL4030_USB_SEL_MADC_MCPC; | |
| 859 | + ret = twl_i2c_write_u8(TWL_MODULE_USB, regval, | |
| 860 | + TWL4030_USB_CARKIT_ANA_CTRL); | |
| 861 | + if (ret) { | |
| 862 | + dev_err(&pdev->dev, "unable to write reg CARKIT_ANA_CTRL 0x%X\n", | |
| 863 | + TWL4030_USB_CARKIT_ANA_CTRL); | |
| 864 | + goto err_i2c; | |
| 865 | + } | |
| 866 | + | |
| 867 | + /* Enable 3v1 bias regulator for MADC[3:6] */ | |
| 868 | + madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1"); | |
| 869 | + if (IS_ERR(madc->usb3v1)) | |
| 870 | + return -ENODEV; | |
| 871 | + | |
| 872 | + ret = regulator_enable(madc->usb3v1); | |
| 873 | + if (ret) | |
| 874 | + dev_err(madc->dev, "could not enable 3v1 bias regulator\n"); | |
| 875 | + | |
| 844 | 876 | ret = iio_device_register(iio_dev); |
| 845 | 877 | if (ret) { |
| 846 | 878 | dev_err(&pdev->dev, "could not register iio device\n"); |
| @@ -866,6 +898,8 @@ static int twl4030_madc_remove(struct platform_device *pdev) · 19 unmodified lines | ||
| 866 | 898 | twl4030_madc_set_current_generator(madc, 0, 0); |
| 867 | 899 | twl4030_madc_set_power(madc, 0); |
| 868 | 900 | |
| 901 | + regulator_disable(madc->usb3v1); | |
| 902 | + | |
| 869 | 903 | return 0; |
| 870 | 904 | } |
| 871 | 905 | |
| @@ -508,12 +508,12 @@ void ib_cache_gid_set_default_gid(struct ib_device *ib_dev, u8 port, · 507 unmodified lines | ||
| 508 | 508 | memset(&gid_attr, 0, sizeof(gid_attr)); |
| 509 | 509 | gid_attr.ndev = ndev; |
| 510 | 510 | |
| 511 | + mutex_lock(&table->lock); | |
| 511 | 512 | ix = find_gid(table, NULL, NULL, true, GID_ATTR_FIND_MASK_DEFAULT); |
| 512 | 513 | |
| 513 | 514 | /* Coudn't find default GID location */ |
| 514 | 515 | WARN_ON(ix < 0); |
| 515 | 516 | |
| 516 | − mutex_lock(&table->lock); | |
| 517 | 517 | if (!__ib_cache_gid_get(ib_dev, port, ix, |
| 518 | 518 | ¤t_gid, ¤t_gid_attr) && |
| 519 | 519 | mode == IB_CACHE_GID_DEFAULT_MODE_SET && |
| @@ -835,6 +835,11 @@ retest: · 834 unmodified lines | ||
| 835 | 835 | case IB_CM_SIDR_REQ_RCVD: |
| 836 | 836 | spin_unlock_irq(&cm_id_priv->lock); |
| 837 | 837 | cm_reject_sidr_req(cm_id_priv, IB_SIDR_REJECT); |
| 838 | + spin_lock_irq(&cm.lock); | |
| 839 | + if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node)) | |
| 840 | + rb_erase(&cm_id_priv->sidr_id_node, | |
| 841 | + &cm.remote_sidr_table); | |
| 842 | + spin_unlock_irq(&cm.lock); | |
| 838 | 843 | break; |
| 839 | 844 | case IB_CM_REQ_SENT: |
| 840 | 845 | case IB_CM_MRA_REQ_RCVD: |
| @@ -3172,7 +3177,10 @@ int ib_send_cm_sidr_rep(struct ib_cm_id *cm_id, · 2331 unmodified lines | ||
| 3172 | 3177 | spin_unlock_irqrestore(&cm_id_priv->lock, flags); |
| 3173 | 3178 | |
| 3174 | 3179 | spin_lock_irqsave(&cm.lock, flags); |
| 3175 | − rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table); | |
| 3180 | + if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node)) { | |
| 3181 | + rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table); | |
| 3182 | + RB_CLEAR_NODE(&cm_id_priv->sidr_id_node); | |
| 3183 | + } | |
| 3176 | 3184 | spin_unlock_irqrestore(&cm.lock, flags); |
| 3177 | 3185 | return 0; |
| 3178 | 3186 | |
| @@ -1067,14 +1067,14 @@ static int cma_save_req_info(const struct ib_cm_event *ib_event, · 1066 unmodified lines | ||
| 1067 | 1067 | sizeof(req->local_gid)); |
| 1068 | 1068 | req->has_gid = true; |
| 1069 | 1069 | req->service_id = req_param->primary_path->service_id; |
| 1070 | − req->pkey = req_param->bth_pkey; | |
| 1070 | + req->pkey = be16_to_cpu(req_param->primary_path->pkey); | |
| 1071 | 1071 | break; |
| 1072 | 1072 | case IB_CM_SIDR_REQ_RECEIVED: |
| 1073 | 1073 | req->device = sidr_param->listen_id->device; |
| 1074 | 1074 | req->port = sidr_param->port; |
| 1075 | 1075 | req->has_gid = false; |
| 1076 | 1076 | req->service_id = sidr_param->service_id; |
| 1077 | − req->pkey = sidr_param->bth_pkey; | |
| 1077 | + req->pkey = sidr_param->pkey; | |
| 1078 | 1078 | break; |
| 1079 | 1079 | default: |
| 1080 | 1080 | return -EINVAL; |
| @@ -1232,14 +1232,32 @@ static bool cma_match_private_data(struct rdma_id_private *id_priv, · 151 unmodified lines | ||
| 1232 | 1232 | return true; |
| 1233 | 1233 | } |
| 1234 | 1234 | |
| 1235 | +static bool cma_protocol_roce_dev_port(struct ib_device *device, int port_num) | |
| 1236 | +{ | |
| 1237 | + enum rdma_link_layer ll = rdma_port_get_link_layer(device, port_num); | |
| 1238 | + enum rdma_transport_type transport = | |
| 1239 | + rdma_node_get_transport(device->node_type); | |
| 1240 | + | |
| 1241 | + return ll == IB_LINK_LAYER_ETHERNET && transport == RDMA_TRANSPORT_IB; | |
| 1242 | +} | |
| 1243 | + | |
| 1244 | +static bool cma_protocol_roce(const struct rdma_cm_id *id) | |
| 1245 | +{ | |
| 1246 | + struct ib_device *device = id->device; | |
| 1247 | + const int port_num = id->port_num ?: rdma_start_port(device); | |
| 1248 | + | |
| 1249 | + return cma_protocol_roce_dev_port(device, port_num); | |
| 1250 | +} | |
| 1251 | + | |
| 1235 | 1252 | static bool cma_match_net_dev(const struct rdma_id_private *id_priv, |
| 1236 | 1253 | const struct net_device *net_dev) |
| 1237 | 1254 | { |
| 1238 | 1255 | const struct rdma_addr *addr = &id_priv->id.route.addr; |
| 1239 | 1256 | |
| 1240 | 1257 | if (!net_dev) |
| 1241 | − /* This request is an AF_IB request */ | |
| 1242 | − return addr->src_addr.ss_family == AF_IB; | |
| 1258 | + /* This request is an AF_IB request or a RoCE request */ | |
| 1259 | + return addr->src_addr.ss_family == AF_IB || | |
| 1260 | + cma_protocol_roce(&id_priv->id); | |
| 1243 | 1261 | |
| 1244 | 1262 | return !addr->dev_addr.bound_dev_if || |
| 1245 | 1263 | (net_eq(dev_net(net_dev), &init_net) && |
| @@ -1294,6 +1312,10 @@ static struct rdma_id_private *cma_id_from_event(struct ib_cm_id *cm_id, · 48 unmodified lines | ||
| 1294 | 1312 | if (PTR_ERR(*net_dev) == -EAFNOSUPPORT) { |
| 1295 | 1313 | /* Assuming the protocol is AF_IB */ |
| 1296 | 1314 | *net_dev = NULL; |
| 1315 | + } else if (cma_protocol_roce_dev_port(req.device, req.port)) { | |
| 1316 | + /* TODO find the net dev matching the request parameters | |
| 1317 | + * through the RoCE GID table */ | |
| 1318 | + *net_dev = NULL; | |
| 1297 | 1319 | } else { |
| 1298 | 1320 | return ERR_CAST(*net_dev); |
| 1299 | 1321 | } |
| @@ -1302,7 +1324,7 @@ static struct rdma_id_private *cma_id_from_event(struct ib_cm_id *cm_id, · 2 unmodified lines | ||
| 1302 | 1324 | bind_list = cma_ps_find(rdma_ps_from_service_id(req.service_id), |
| 1303 | 1325 | cma_port_from_service_id(req.service_id)); |
| 1304 | 1326 | id_priv = cma_find_listener(bind_list, cm_id, ib_event, &req, *net_dev); |
| 1305 | − if (IS_ERR(id_priv)) { | |
| 1327 | + if (IS_ERR(id_priv) && *net_dev) { | |
| 1306 | 1328 | dev_put(*net_dev); |
| 1307 | 1329 | *net_dev = NULL; |
| 1308 | 1330 | } |
| @@ -1593,11 +1615,16 @@ static struct rdma_id_private *cma_new_conn_id(struct rdma_cm_id *listen_id, · 284 unmodified lines | ||
| 1593 | 1615 | if (ret) |
| 1594 | 1616 | goto err; |
| 1595 | 1617 | } else { |
| 1596 | − /* An AF_IB connection */ | |
| 1597 | − WARN_ON_ONCE(ss_family != AF_IB); | |
| 1598 | − | |
| 1599 | − cma_translate_ib((struct sockaddr_ib *)cma_src_addr(id_priv), | |
| 1600 | − &rt->addr.dev_addr); | |
| 1618 | + if (!cma_protocol_roce(listen_id) && | |
| 1619 | + cma_any_addr(cma_src_addr(id_priv))) { | |
| 1620 | + rt->addr.dev_addr.dev_type = ARPHRD_INFINIBAND; | |
| 1621 | + rdma_addr_set_sgid(&rt->addr.dev_addr, &rt->path_rec[0].sgid); | |
| 1622 | + ib_addr_set_pkey(&rt->addr.dev_addr, be16_to_cpu(rt->path_rec[0].pkey)); | |
| 1623 | + } else if (!cma_any_addr(cma_src_addr(id_priv))) { | |
| 1624 | + ret = cma_translate_addr(cma_src_addr(id_priv), &rt->addr.dev_addr); | |
| 1625 | + if (ret) | |
| 1626 | + goto err; | |
| 1627 | + } | |
| 1601 | 1628 | } |
| 1602 | 1629 | rdma_addr_set_dgid(&rt->addr.dev_addr, &rt->path_rec[0].dgid); |
| 1603 | 1630 | |
| @@ -1635,13 +1662,12 @@ static struct rdma_id_private *cma_new_udp_id(struct rdma_cm_id *listen_id, · 31 unmodified lines | ||
| 1635 | 1662 | if (ret) |
| 1636 | 1663 | goto err; |
| 1637 | 1664 | } else { |
| 1638 | − /* An AF_IB connection */ | |
| 1639 | − WARN_ON_ONCE(ss_family != AF_IB); | |
| 1640 | − | |
| 1641 | − if (!cma_any_addr(cma_src_addr(id_priv))) | |
| 1642 | − cma_translate_ib((struct sockaddr_ib *) | |
| 1643 | − cma_src_addr(id_priv), | |
| 1644 | − &id->route.addr.dev_addr); | |
| 1665 | + if (!cma_any_addr(cma_src_addr(id_priv))) { | |
| 1666 | + ret = cma_translate_addr(cma_src_addr(id_priv), | |
| 1667 | + &id->route.addr.dev_addr); | |
| 1668 | + if (ret) | |
| 1669 | + goto err; | |
| 1670 | + } | |
| 1645 | 1671 | } |
| 1646 | 1672 | |
| 1647 | 1673 | id_priv->state = RDMA_CM_CONNECT; |
| @@ -250,25 +250,44 @@ static void enum_netdev_ipv4_ips(struct ib_device *ib_dev, · 249 unmodified lines | ||
| 250 | 250 | u8 port, struct net_device *ndev) |
| 251 | 251 | { |
| 252 | 252 | struct in_device *in_dev; |
| 253 | + struct sin_list { | |
| 254 | + struct list_head list; | |
| 255 | + struct sockaddr_in ip; | |
| 256 | + }; | |
| 257 | + struct sin_list *sin_iter; | |
| 258 | + struct sin_list *sin_temp; | |
| 253 | 259 | |
| 260 | + LIST_HEAD(sin_list); | |
| 254 | 261 | if (ndev->reg_state >= NETREG_UNREGISTERING) |
| 255 | 262 | return; |
| 256 | 263 | |
| 257 | − in_dev = in_dev_get(ndev); | |
| 258 | − if (!in_dev) | |
| 264 | + rcu_read_lock(); | |
| 265 | + in_dev = __in_dev_get_rcu(ndev); | |
| 266 | + if (!in_dev) { | |
| 267 | + rcu_read_unlock(); | |
| 259 | 268 | return; |
| 269 | + } | |
| 260 | 270 | |
| 261 | 271 | for_ifa(in_dev) { |
| 262 | − struct sockaddr_in ip; | |
| 272 | + struct sin_list *entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
| 263 | 273 | |
| 264 | − ip.sin_family = AF_INET; | |
| 265 | − ip.sin_addr.s_addr = ifa->ifa_address; | |
| 266 | − update_gid_ip(GID_ADD, ib_dev, port, ndev, | |
| 267 | − (struct sockaddr *)&ip); | |
| 274 | + if (!entry) { | |
| 275 | + pr_warn("roce_gid_mgmt: couldn't allocate entry for IPv4 update\n"); | |
| 276 | + continue; | |
| 277 | + } | |
| 278 | + entry->ip.sin_family = AF_INET; | |
| 279 | + entry->ip.sin_addr.s_addr = ifa->ifa_address; | |
| 280 | + list_add_tail(&entry->list, &sin_list); | |
| 268 | 281 | } |
| 269 | 282 | endfor_ifa(in_dev); |
| 283 | + rcu_read_unlock(); | |
| 270 | 284 | |
| 271 | − in_dev_put(in_dev); | |
| 285 | + list_for_each_entry_safe(sin_iter, sin_temp, &sin_list, list) { | |
| 286 | + update_gid_ip(GID_ADD, ib_dev, port, ndev, | |
| 287 | + (struct sockaddr *)&sin_iter->ip); | |
| 288 | + list_del(&sin_iter->list); | |
| 289 | + kfree(sin_iter); | |
| 290 | + } | |
| 272 | 291 | } |
| 273 | 292 | |
| 274 | 293 | static void enum_netdev_ipv6_ips(struct ib_device *ib_dev, |
| @@ -1624,11 +1624,16 @@ static int ucma_open(struct inode *inode, struct file *filp) · 1623 unmodified lines | ||
| 1624 | 1624 | if (!file) |
| 1625 | 1625 | return -ENOMEM; |
| 1626 | 1626 | |
| 1627 | + file->close_wq = create_singlethread_workqueue("ucma_close_id"); | |
| 1628 | + if (!file->close_wq) { | |
| 1629 | + kfree(file); | |
| 1630 | + return -ENOMEM; | |
| 1631 | + } | |
| 1632 | + | |
| 1627 | 1633 | INIT_LIST_HEAD(&file->event_list); |
| 1628 | 1634 | INIT_LIST_HEAD(&file->ctx_list); |
| 1629 | 1635 | init_waitqueue_head(&file->poll_wait); |
| 1630 | 1636 | mutex_init(&file->mut); |
| 1631 | − file->close_wq = create_singlethread_workqueue("ucma_close_id"); | |
| 1632 | 1637 | |
| 1633 | 1638 | filp->private_data = file; |
| 1634 | 1639 | file->filp = filp; |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | * licenses. You may choose to be licensed under the terms of the GNU |
| 8 | 8 | * General Public License (GPL) Version 2, available from the file |
| 9 | 9 | * COPYING in the main directory of this source tree, or the |
| 10 | − * OpenIB.org BSD license below: | |
| 10 | + * BSD license below: | |
| 11 | 11 | * |
| 12 | 12 | * Redistribution and use in source and binary forms, with or |
| 13 | 13 | * without modification, are permitted provided that the following |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2014, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -1,9 +1,24 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright (c) 2013, Cisco Systems, Inc. All rights reserved. |
| 3 | 3 | * |
| 4 | − * This program is free software; you may redistribute it and/or modify | |
| 5 | − * it under the terms of the GNU General Public License as published by | |
| 6 | − * the Free Software Foundation; version 2 of the License. | |
| 4 | + * This software is available to you under a choice of one of two | |
| 5 | + * licenses. You may choose to be licensed under the terms of the GNU | |
| 6 | + * General Public License (GPL) Version 2, available from the file | |
| 7 | + * COPYING in the main directory of this source tree, or the | |
| 8 | + * BSD license below: | |
| 9 | + * | |
| 10 | + * Redistribution and use in source and binary forms, with or | |
| 11 | + * without modification, are permitted provided that the following | |
| 12 | + * conditions are met: | |
| 13 | + * | |
| 14 | + * - Redistributions of source code must retain the above | |
| 15 | + * copyright notice, this list of conditions and the following | |
| 16 | + * disclaimer. | |
| 17 | + * | |
| 18 | + * - Redistributions in binary form must reproduce the above | |
| 19 | + * copyright notice, this list of conditions and the following | |
| 20 | + * disclaimer in the documentation and/or other materials | |
| 21 | + * provided with the distribution. | |
| 7 | 22 | * |
| 8 | 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 9 | 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| @@ -495,6 +495,7 @@ void ipoib_dev_cleanup(struct net_device *dev); · 494 unmodified lines | ||
| 495 | 495 | void ipoib_mcast_join_task(struct work_struct *work); |
| 496 | 496 | void ipoib_mcast_carrier_on_task(struct work_struct *work); |
| 497 | 497 | void ipoib_mcast_send(struct net_device *dev, u8 *daddr, struct sk_buff *skb); |
| 498 | +void ipoib_mcast_free(struct ipoib_mcast *mc); | |
| 498 | 499 | |
| 499 | 500 | void ipoib_mcast_restart_task(struct work_struct *work); |
| 500 | 501 | int ipoib_mcast_start_thread(struct net_device *dev); |
| @@ -1207,8 +1207,10 @@ static void __ipoib_reap_neigh(struct ipoib_dev_priv *priv) · 1206 unmodified lines | ||
| 1207 | 1207 | |
| 1208 | 1208 | out_unlock: |
| 1209 | 1209 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1210 | − list_for_each_entry_safe(mcast, tmcast, &remove_list, list) | |
| 1210 | + list_for_each_entry_safe(mcast, tmcast, &remove_list, list) { | |
| 1211 | 1211 | ipoib_mcast_leave(dev, mcast); |
| 1212 | + ipoib_mcast_free(mcast); | |
| 1213 | + } | |
| 1212 | 1214 | } |
| 1213 | 1215 | |
| 1214 | 1216 | static void ipoib_reap_neigh(struct work_struct *work) |
| @@ -106,7 +106,7 @@ static void __ipoib_mcast_schedule_join_thread(struct ipoib_dev_priv *priv, · 105 unmodified lines | ||
| 106 | 106 | queue_delayed_work(priv->wq, &priv->mcast_task, 0); |
| 107 | 107 | } |
| 108 | 108 | |
| 109 | −static void ipoib_mcast_free(struct ipoib_mcast *mcast) | |
| 109 | +void ipoib_mcast_free(struct ipoib_mcast *mcast) | |
| 110 | 110 | { |
| 111 | 111 | struct net_device *dev = mcast->dev; |
| 112 | 112 | int tx_dropped = 0; |
| @@ -241,14 +241,10 @@ static int cyapa_gen6_read_sys_info(struct cyapa *cyapa) · 240 unmodified lines | ||
| 241 | 241 | memcpy(&cyapa->product_id[13], &resp_data[62], 2); |
| 242 | 242 | cyapa->product_id[15] = '\0'; |
| 243 | 243 | |
| 244 | + /* Get the number of Rx electrodes. */ | |
| 244 | 245 | rotat_align = resp_data[68]; |
| 245 | − if (rotat_align) { | |
| 246 | − cyapa->electrodes_rx = cyapa->electrodes_y; | |
| 247 | − cyapa->electrodes_rx = cyapa->electrodes_y; | |
| 248 | − } else { | |
| 249 | − cyapa->electrodes_rx = cyapa->electrodes_x; | |
| 250 | − cyapa->electrodes_rx = cyapa->electrodes_y; | |
| 251 | − } | |
| 246 | + cyapa->electrodes_rx = | |
| 247 | + rotat_align ? cyapa->electrodes_y : cyapa->electrodes_x; | |
| 252 | 248 | cyapa->aligned_electrodes_rx = (cyapa->electrodes_rx + 3) & ~3u; |
| 253 | 249 | |
| 254 | 250 | if (!cyapa->electrodes_x || !cyapa->electrodes_y || |
| @@ -668,18 +668,22 @@ static int ads7846_no_filter(void *ads, int data_idx, int *val) · 667 unmodified lines | ||
| 668 | 668 | |
| 669 | 669 | static int ads7846_get_value(struct ads7846 *ts, struct spi_message *m) |
| 670 | 670 | { |
| 671 | + int value; | |
| 671 | 672 | struct spi_transfer *t = |
| 672 | 673 | list_entry(m->transfers.prev, struct spi_transfer, transfer_list); |
| 673 | 674 | |
| 674 | 675 | if (ts->model == 7845) { |
| 675 | − return be16_to_cpup((__be16 *)&(((char*)t->rx_buf)[1])) >> 3; | |
| 676 | + value = be16_to_cpup((__be16 *)&(((char *)t->rx_buf)[1])); | |
| 676 | 677 | } else { |
| 677 | 678 | /* |
| 678 | 679 | * adjust: on-wire is a must-ignore bit, a BE12 value, then |
| 679 | 680 | * padding; built from two 8 bit values written msb-first. |
| 680 | 681 | */ |
| 681 | − return be16_to_cpup((__be16 *)t->rx_buf) >> 3; | |
| 682 | + value = be16_to_cpup((__be16 *)t->rx_buf); | |
| 682 | 683 | } |
| 684 | + | |
| 685 | + /* enforce ADC output is 12 bits width */ | |
| 686 | + return (value >> 3) & 0xfff; | |
| 683 | 687 | } |
| 684 | 688 | |
| 685 | 689 | static void ads7846_update_value(struct spi_message *m, int val) |
| @@ -23,8 +23,7 @@ config IOMMU_IO_PGTABLE · 22 unmodified lines | ||
| 23 | 23 | config IOMMU_IO_PGTABLE_LPAE |
| 24 | 24 | bool "ARMv7/v8 Long Descriptor Format" |
| 25 | 25 | select IOMMU_IO_PGTABLE |
| 26 | − # SWIOTLB guarantees a dma_to_phys() implementation | |
| 27 | − depends on ARM || ARM64 || (COMPILE_TEST && SWIOTLB) | |
| 26 | + depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST) | |
| 28 | 27 | help |
| 29 | 28 | Enable support for the ARM long descriptor pagetable format. |
| 30 | 29 | This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page |
| @@ -2006,6 +2006,15 @@ static void do_detach(struct iommu_dev_data *dev_data) · 2005 unmodified lines | ||
| 2006 | 2006 | { |
| 2007 | 2007 | struct amd_iommu *iommu; |
| 2008 | 2008 | |
| 2009 | + /* | |
| 2010 | + * First check if the device is still attached. It might already | |
| 2011 | + * be detached from its domain because the generic | |
| 2012 | + * iommu_detach_group code detached it and we try again here in | |
| 2013 | + * our alias handling. | |
| 2014 | + */ | |
| 2015 | + if (!dev_data->domain) | |
| 2016 | + return; | |
| 2017 | + | |
| 2009 | 2018 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 2010 | 2019 | |
| 2011 | 2020 | /* decrease reference counters */ |
| @@ -1256,6 +1256,9 @@ static int iommu_init_pci(struct amd_iommu *iommu) · 1255 unmodified lines | ||
| 1256 | 1256 | if (!iommu->dev) |
| 1257 | 1257 | return -ENODEV; |
| 1258 | 1258 | |
| 1259 | + /* Prevent binding other PCI device drivers to IOMMU devices */ | |
| 1260 | + iommu->dev->match_driver = false; | |
| 1261 | + | |
| 1259 | 1262 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_CAP_HDR_OFFSET, |
| 1260 | 1263 | &iommu->cap); |
| 1261 | 1264 | pci_read_config_dword(iommu->dev, cap_ptr + MMIO_RANGE_OFFSET, |
| @@ -56,6 +56,7 @@ · 55 unmodified lines | ||
| 56 | 56 | #define IDR0_TTF_SHIFT 2 |
| 57 | 57 | #define IDR0_TTF_MASK 0x3 |
| 58 | 58 | #define IDR0_TTF_AARCH64 (2 << IDR0_TTF_SHIFT) |
| 59 | +#define IDR0_TTF_AARCH32_64 (3 << IDR0_TTF_SHIFT) | |
| 59 | 60 | #define IDR0_S1P (1 << 1) |
| 60 | 61 | #define IDR0_S2P (1 << 0) |
| 61 | 62 | |
| @@ -342,7 +343,8 @@ · 280 unmodified lines | ||
| 342 | 343 | #define CMDQ_TLBI_0_VMID_SHIFT 32 |
| 343 | 344 | #define CMDQ_TLBI_0_ASID_SHIFT 48 |
| 344 | 345 | #define CMDQ_TLBI_1_LEAF (1UL << 0) |
| 345 | −#define CMDQ_TLBI_1_ADDR_MASK ~0xfffUL | |
| 346 | +#define CMDQ_TLBI_1_VA_MASK ~0xfffUL | |
| 347 | +#define CMDQ_TLBI_1_IPA_MASK 0xfffffffff000UL | |
| 346 | 348 | |
| 347 | 349 | #define CMDQ_PRI_0_SSID_SHIFT 12 |
| 348 | 350 | #define CMDQ_PRI_0_SSID_MASK 0xfffffUL |
| @@ -770,11 +772,13 @@ static int arm_smmu_cmdq_build_cmd(u64 *cmd, struct arm_smmu_cmdq_ent *ent) · 421 unmodified lines | ||
| 770 | 772 | break; |
| 771 | 773 | case CMDQ_OP_TLBI_NH_VA: |
| 772 | 774 | cmd[0] |= (u64)ent->tlbi.asid << CMDQ_TLBI_0_ASID_SHIFT; |
| 773 | − /* Fallthrough */ | |
| 775 | + cmd[1] |= ent->tlbi.leaf ? CMDQ_TLBI_1_LEAF : 0; | |
| 776 | + cmd[1] |= ent->tlbi.addr & CMDQ_TLBI_1_VA_MASK; | |
| 777 | + break; | |
| 774 | 778 | case CMDQ_OP_TLBI_S2_IPA: |
| 775 | 779 | cmd[0] |= (u64)ent->tlbi.vmid << CMDQ_TLBI_0_VMID_SHIFT; |
| 776 | 780 | cmd[1] |= ent->tlbi.leaf ? CMDQ_TLBI_1_LEAF : 0; |
| 777 | − cmd[1] |= ent->tlbi.addr & CMDQ_TLBI_1_ADDR_MASK; | |
| 781 | + cmd[1] |= ent->tlbi.addr & CMDQ_TLBI_1_IPA_MASK; | |
| 778 | 782 | break; |
| 779 | 783 | case CMDQ_OP_TLBI_NH_ASID: |
| 780 | 784 | cmd[0] |= (u64)ent->tlbi.asid << CMDQ_TLBI_0_ASID_SHIFT; |
| @@ -2460,7 +2464,13 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu) · 1679 unmodified lines | ||
| 2460 | 2464 | } |
| 2461 | 2465 | |
| 2462 | 2466 | /* We only support the AArch64 table format at present */ |
| 2463 | − if ((reg & IDR0_TTF_MASK << IDR0_TTF_SHIFT) < IDR0_TTF_AARCH64) { | |
| 2467 | + switch (reg & IDR0_TTF_MASK << IDR0_TTF_SHIFT) { | |
| 2468 | + case IDR0_TTF_AARCH32_64: | |
| 2469 | + smmu->ias = 40; | |
| 2470 | + /* Fallthrough */ | |
| 2471 | + case IDR0_TTF_AARCH64: | |
| 2472 | + break; | |
| 2473 | + default: | |
| 2464 | 2474 | dev_err(smmu->dev, "AArch64 table format not supported!\n"); |
| 2465 | 2475 | return -ENXIO; |
| 2466 | 2476 | } |
| @@ -2541,8 +2551,7 @@ static int arm_smmu_device_probe(struct arm_smmu_device *smmu) · 74 unmodified lines | ||
| 2541 | 2551 | dev_warn(smmu->dev, |
| 2542 | 2552 | "failed to set DMA mask for table walker\n"); |
| 2543 | 2553 | |
| 2544 | − if (!smmu->ias) | |
| 2545 | − smmu->ias = smmu->oas; | |
| 2554 | + smmu->ias = max(smmu->ias, smmu->oas); | |
| 2546 | 2555 | |
| 2547 | 2556 | dev_info(smmu->dev, "ias %lu-bit, oas %lu-bit (features 0x%08x)\n", |
| 2548 | 2557 | smmu->ias, smmu->oas, smmu->features); |
| @@ -2115,15 +2115,19 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, · 2114 unmodified lines | ||
| 2115 | 2115 | return -ENOMEM; |
| 2116 | 2116 | /* It is large page*/ |
| 2117 | 2117 | if (largepage_lvl > 1) { |
| 2118 | + unsigned long nr_superpages, end_pfn; | |
| 2119 | + | |
| 2118 | 2120 | pteval |= DMA_PTE_LARGE_PAGE; |
| 2119 | 2121 | lvl_pages = lvl_to_nr_pages(largepage_lvl); |
| 2122 | + | |
| 2123 | + nr_superpages = sg_res / lvl_pages; | |
| 2124 | + end_pfn = iov_pfn + nr_superpages * lvl_pages - 1; | |
| 2125 | + | |
| 2120 | 2126 | /* |
| 2121 | 2127 | * Ensure that old small page tables are |
| 2122 | − * removed to make room for superpage, | |
| 2123 | − * if they exist. | |
| 2128 | + * removed to make room for superpage(s). | |
| 2124 | 2129 | */ |
| 2125 | − dma_pte_free_pagetable(domain, iov_pfn, | |
| 2126 | − iov_pfn + lvl_pages - 1); | |
| 2130 | + dma_pte_free_pagetable(domain, iov_pfn, end_pfn); | |
| 2127 | 2131 | } else { |
| 2128 | 2132 | pteval &= ~(uint64_t)DMA_PTE_LARGE_PAGE; |
| 2129 | 2133 | } |
| @@ -2301,6 +2305,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu, · 171 unmodified lines | ||
| 2301 | 2305 | |
| 2302 | 2306 | if (ret) { |
| 2303 | 2307 | spin_unlock_irqrestore(&device_domain_lock, flags); |
| 2308 | + free_devinfo_mem(info); | |
| 2304 | 2309 | return NULL; |
| 2305 | 2310 | } |
| 2306 | 2311 | |
| @@ -202,9 +202,9 @@ typedef u64 arm_lpae_iopte; · 201 unmodified lines | ||
| 202 | 202 | |
| 203 | 203 | static bool selftest_running = false; |
| 204 | 204 | |
| 205 | −static dma_addr_t __arm_lpae_dma_addr(struct device *dev, void *pages) | |
| 205 | +static dma_addr_t __arm_lpae_dma_addr(void *pages) | |
| 206 | 206 | { |
| 207 | − return phys_to_dma(dev, virt_to_phys(pages)); | |
| 207 | + return (dma_addr_t)virt_to_phys(pages); | |
| 208 | 208 | } |
| 209 | 209 | |
| 210 | 210 | static void *__arm_lpae_alloc_pages(size_t size, gfp_t gfp, |
| @@ -223,10 +223,10 @@ static void *__arm_lpae_alloc_pages(size_t size, gfp_t gfp, · 12 unmodified lines | ||
| 223 | 223 | goto out_free; |
| 224 | 224 | /* |
| 225 | 225 | * We depend on the IOMMU being able to work with any physical |
| 226 | − * address directly, so if the DMA layer suggests it can't by | |
| 227 | − * giving us back some translation, that bodes very badly... | |
| 226 | + * address directly, so if the DMA layer suggests otherwise by | |
| 227 | + * translating or truncating them, that bodes very badly... | |
| 228 | 228 | */ |
| 229 | − if (dma != __arm_lpae_dma_addr(dev, pages)) | |
| 229 | + if (dma != virt_to_phys(pages)) | |
| 230 | 230 | goto out_unmap; |
| 231 | 231 | } |
| 232 | 232 | |
| @@ -243,10 +243,8 @@ out_free: · 10 unmodified lines | ||
| 243 | 243 | static void __arm_lpae_free_pages(void *pages, size_t size, |
| 244 | 244 | struct io_pgtable_cfg *cfg) |
| 245 | 245 | { |
| 246 | − struct device *dev = cfg->iommu_dev; | |
| 247 | − | |
| 248 | 246 | if (!selftest_running) |
| 249 | − dma_unmap_single(dev, __arm_lpae_dma_addr(dev, pages), | |
| 247 | + dma_unmap_single(cfg->iommu_dev, __arm_lpae_dma_addr(pages), | |
| 250 | 248 | size, DMA_TO_DEVICE); |
| 251 | 249 | free_pages_exact(pages, size); |
| 252 | 250 | } |
| @@ -254,12 +252,11 @@ static void __arm_lpae_free_pages(void *pages, size_t size, · 1 unmodified line | ||
| 254 | 252 | static void __arm_lpae_set_pte(arm_lpae_iopte *ptep, arm_lpae_iopte pte, |
| 255 | 253 | struct io_pgtable_cfg *cfg) |
| 256 | 254 | { |
| 257 | − struct device *dev = cfg->iommu_dev; | |
| 258 | − | |
| 259 | 255 | *ptep = pte; |
| 260 | 256 | |
| 261 | 257 | if (!selftest_running) |
| 262 | − dma_sync_single_for_device(dev, __arm_lpae_dma_addr(dev, ptep), | |
| 258 | + dma_sync_single_for_device(cfg->iommu_dev, | |
| 259 | + __arm_lpae_dma_addr(ptep), | |
| 263 | 260 | sizeof(pte), DMA_TO_DEVICE); |
| 264 | 261 | } |
| 265 | 262 | |
| @@ -629,6 +626,11 @@ arm_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg) · 363 unmodified lines | ||
| 629 | 626 | if (cfg->oas > ARM_LPAE_MAX_ADDR_BITS) |
| 630 | 627 | return NULL; |
| 631 | 628 | |
| 629 | + if (!selftest_running && cfg->iommu_dev->dma_pfn_offset) { | |
| 630 | + dev_err(cfg->iommu_dev, "Cannot accommodate DMA offset for IOMMU page tables\n"); | |
| 631 | + return NULL; | |
| 632 | + } | |
| 633 | + | |
| 632 | 634 | data = kmalloc(sizeof(*data), GFP_KERNEL); |
| 633 | 635 | if (!data) |
| 634 | 636 | return NULL; |
| @@ -634,10 +634,10 @@ static int __commit_transaction(struct dm_cache_metadata *cmd, · 633 unmodified lines | ||
| 634 | 634 | |
| 635 | 635 | disk_super = dm_block_data(sblock); |
| 636 | 636 | |
| 637 | + disk_super->flags = cpu_to_le32(cmd->flags); | |
| 637 | 638 | if (mutator) |
| 638 | 639 | update_flags(disk_super, mutator); |
| 639 | 640 | |
| 640 | − disk_super->flags = cpu_to_le32(cmd->flags); | |
| 641 | 641 | disk_super->mapping_root = cpu_to_le64(cmd->root); |
| 642 | 642 | disk_super->hint_root = cpu_to_le64(cmd->hint_root); |
| 643 | 643 | disk_super->discard_root = cpu_to_le64(cmd->discard_root); |
| @@ -847,6 +847,7 @@ static void persistent_drop_snapshot(struct dm_exception_store *store) · 846 unmodified lines | ||
| 847 | 847 | static int persistent_ctr(struct dm_exception_store *store, char *options) |
| 848 | 848 | { |
| 849 | 849 | struct pstore *ps; |
| 850 | + int r; | |
| 850 | 851 | |
| 851 | 852 | /* allocate the pstore */ |
| 852 | 853 | ps = kzalloc(sizeof(*ps), GFP_KERNEL); |
| @@ -868,9 +869,9 @@ static int persistent_ctr(struct dm_exception_store *store, char *options) · 15 unmodified lines | ||
| 868 | 869 | |
| 869 | 870 | ps->metadata_wq = alloc_workqueue("ksnaphd", WQ_MEM_RECLAIM, 0); |
| 870 | 871 | if (!ps->metadata_wq) { |
| 871 | − kfree(ps); | |
| 872 | 872 | DMERR("couldn't start header metadata update thread"); |
| 873 | − return -ENOMEM; | |
| 873 | + r = -ENOMEM; | |
| 874 | + goto err_workqueue; | |
| 874 | 875 | } |
| 875 | 876 | |
| 876 | 877 | if (options) { |
| @@ -879,13 +880,21 @@ static int persistent_ctr(struct dm_exception_store *store, char *options) · 2 unmodified lines | ||
| 879 | 880 | store->userspace_supports_overflow = true; |
| 880 | 881 | else { |
| 881 | 882 | DMERR("Unsupported persistent store option: %s", options); |
| 882 | − return -EINVAL; | |
| 883 | + r = -EINVAL; | |
| 884 | + goto err_options; | |
| 883 | 885 | } |
| 884 | 886 | } |
| 885 | 887 | |
| 886 | 888 | store->context = ps; |
| 887 | 889 | |
| 888 | 890 | return 0; |
| 891 | + | |
| 892 | +err_options: | |
| 893 | + destroy_workqueue(ps->metadata_wq); | |
| 894 | +err_workqueue: | |
| 895 | + kfree(ps); | |
| 896 | + | |
| 897 | + return r; | |
| 889 | 898 | } |
| 890 | 899 | |
| 891 | 900 | static unsigned persistent_status(struct dm_exception_store *store, |
| @@ -3201,7 +3201,7 @@ static int pool_ctr(struct dm_target *ti, unsigned argc, char **argv) · 3200 unmodified lines | ||
| 3201 | 3201 | metadata_low_callback, |
| 3202 | 3202 | pool); |
| 3203 | 3203 | if (r) |
| 3204 | − goto out_free_pt; | |
| 3204 | + goto out_flags_changed; | |
| 3205 | 3205 | |
| 3206 | 3206 | pt->callbacks.congested_fn = pool_is_congested; |
| 3207 | 3207 | dm_table_add_target_callbacks(ti->table, &pt->callbacks); |
| @@ -301,11 +301,16 @@ static void redistribute3(struct dm_btree_info *info, struct btree_node *parent, · 300 unmodified lines | ||
| 301 | 301 | { |
| 302 | 302 | int s; |
| 303 | 303 | uint32_t max_entries = le32_to_cpu(left->header.max_entries); |
| 304 | − unsigned target = (nr_left + nr_center + nr_right) / 3; | |
| 305 | − BUG_ON(target > max_entries); | |
| 304 | + unsigned total = nr_left + nr_center + nr_right; | |
| 305 | + unsigned target_right = total / 3; | |
| 306 | + unsigned remainder = (target_right * 3) != total; | |
| 307 | + unsigned target_left = target_right + remainder; | |
| 308 | + | |
| 309 | + BUG_ON(target_left > max_entries); | |
| 310 | + BUG_ON(target_right > max_entries); | |
| 306 | 311 | |
| 307 | 312 | if (nr_left < nr_right) { |
| 308 | − s = nr_left - target; | |
| 313 | + s = nr_left - target_left; | |
| 309 | 314 | |
| 310 | 315 | if (s < 0 && nr_center < -s) { |
| 311 | 316 | /* not enough in central node */ |
| @@ -316,10 +321,10 @@ static void redistribute3(struct dm_btree_info *info, struct btree_node *parent, · 4 unmodified lines | ||
| 316 | 321 | } else |
| 317 | 322 | shift(left, center, s); |
| 318 | 323 | |
| 319 | − shift(center, right, target - nr_right); | |
| 324 | + shift(center, right, target_right - nr_right); | |
| 320 | 325 | |
| 321 | 326 | } else { |
| 322 | − s = target - nr_right; | |
| 327 | + s = target_right - nr_right; | |
| 323 | 328 | if (s > 0 && nr_center < s) { |
| 324 | 329 | /* not enough in central node */ |
| 325 | 330 | shift(center, right, nr_center); |
| @@ -329,7 +334,7 @@ static void redistribute3(struct dm_btree_info *info, struct btree_node *parent, · 3 unmodified lines | ||
| 329 | 334 | } else |
| 330 | 335 | shift(center, right, s); |
| 331 | 336 | |
| 332 | − shift(left, center, nr_left - target); | |
| 337 | + shift(left, center, nr_left - target_left); | |
| 333 | 338 | } |
| 334 | 339 | |
| 335 | 340 | *key_ptr(parent, c->index) = center->keys[0]; |
| @@ -523,7 +523,7 @@ static int btree_split_beneath(struct shadow_spine *s, uint64_t key) · 522 unmodified lines | ||
| 523 | 523 | |
| 524 | 524 | r = new_block(s->info, &right); |
| 525 | 525 | if (r < 0) { |
| 526 | − /* FIXME: put left */ | |
| 526 | + unlock_block(s->info, left); | |
| 527 | 527 | return r; |
| 528 | 528 | } |
| 529 | 529 | |
| @@ -46,8 +46,8 @@ extern struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe, · 45 unmodified lines | ||
| 46 | 46 | const struct horus3a_config *config, |
| 47 | 47 | struct i2c_adapter *i2c); |
| 48 | 48 | #else |
| 49 | −static inline struct dvb_frontend *horus3a_attach( | |
| 50 | − const struct cxd2820r_config *config, | |
| 49 | +static inline struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe, | |
| 50 | + const struct horus3a_config *config, | |
| 51 | 51 | struct i2c_adapter *i2c) |
| 52 | 52 | { |
| 53 | 53 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); |
| @@ -43,7 +43,7 @@ struct dvb_frontend *lnbh25_attach( · 42 unmodified lines | ||
| 43 | 43 | struct lnbh25_config *cfg, |
| 44 | 44 | struct i2c_adapter *i2c); |
| 45 | 45 | #else |
| 46 | −static inline dvb_frontend *lnbh25_attach( | |
| 46 | +static inline struct dvb_frontend *lnbh25_attach( | |
| 47 | 47 | struct dvb_frontend *fe, |
| 48 | 48 | struct lnbh25_config *cfg, |
| 49 | 49 | struct i2c_adapter *i2c) |
| @@ -18,6 +18,27 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | static struct dvb_frontend_ops m88ds3103_ops; |
| 20 | 20 | |
| 21 | +/* write single register with mask */ | |
| 22 | +static int m88ds3103_update_bits(struct m88ds3103_dev *dev, | |
| 23 | + u8 reg, u8 mask, u8 val) | |
| 24 | +{ | |
| 25 | + int ret; | |
| 26 | + u8 tmp; | |
| 27 | + | |
| 28 | + /* no need for read if whole reg is written */ | |
| 29 | + if (mask != 0xff) { | |
| 30 | + ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1); | |
| 31 | + if (ret) | |
| 32 | + return ret; | |
| 33 | + | |
| 34 | + val &= mask; | |
| 35 | + tmp &= ~mask; | |
| 36 | + val |= tmp; | |
| 37 | + } | |
| 38 | + | |
| 39 | + return regmap_bulk_write(dev->regmap, reg, &val, 1); | |
| 40 | +} | |
| 41 | + | |
| 21 | 42 | /* write reg val table using reg addr auto increment */ |
| 22 | 43 | static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev, |
| 23 | 44 | const struct m88ds3103_reg_val *tab, int tab_len) |
| @@ -394,10 +415,10 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe) · 370 unmodified lines | ||
| 394 | 415 | u8tmp2 = 0x00; /* 0b00 */ |
| 395 | 416 | break; |
| 396 | 417 | } |
| 397 | − ret = regmap_update_bits(dev->regmap, 0x22, 0xc0, u8tmp1 << 6); | |
| 418 | + ret = m88ds3103_update_bits(dev, 0x22, 0xc0, u8tmp1 << 6); | |
| 398 | 419 | if (ret) |
| 399 | 420 | goto err; |
| 400 | − ret = regmap_update_bits(dev->regmap, 0x24, 0xc0, u8tmp2 << 6); | |
| 421 | + ret = m88ds3103_update_bits(dev, 0x24, 0xc0, u8tmp2 << 6); | |
| 401 | 422 | if (ret) |
| 402 | 423 | goto err; |
| 403 | 424 | } |
| @@ -455,13 +476,13 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe) · 51 unmodified lines | ||
| 455 | 476 | if (ret) |
| 456 | 477 | goto err; |
| 457 | 478 | } |
| 458 | − ret = regmap_update_bits(dev->regmap, 0x9d, 0x08, 0x08); | |
| 479 | + ret = m88ds3103_update_bits(dev, 0x9d, 0x08, 0x08); | |
| 459 | 480 | if (ret) |
| 460 | 481 | goto err; |
| 461 | 482 | ret = regmap_write(dev->regmap, 0xf1, 0x01); |
| 462 | 483 | if (ret) |
| 463 | 484 | goto err; |
| 464 | − ret = regmap_update_bits(dev->regmap, 0x30, 0x80, 0x80); | |
| 485 | + ret = m88ds3103_update_bits(dev, 0x30, 0x80, 0x80); | |
| 465 | 486 | if (ret) |
| 466 | 487 | goto err; |
| 467 | 488 | } |
| @@ -498,7 +519,7 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe) · 30 unmodified lines | ||
| 498 | 519 | switch (dev->cfg->ts_mode) { |
| 499 | 520 | case M88DS3103_TS_SERIAL: |
| 500 | 521 | case M88DS3103_TS_SERIAL_D7: |
| 501 | − ret = regmap_update_bits(dev->regmap, 0x29, 0x20, u8tmp1); | |
| 522 | + ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1); | |
| 502 | 523 | if (ret) |
| 503 | 524 | goto err; |
| 504 | 525 | u8tmp1 = 0; |
| @@ -567,11 +588,11 @@ static int m88ds3103_set_frontend(struct dvb_frontend *fe) · 62 unmodified lines | ||
| 567 | 588 | if (ret) |
| 568 | 589 | goto err; |
| 569 | 590 | |
| 570 | − ret = regmap_update_bits(dev->regmap, 0x4d, 0x02, dev->cfg->spec_inv << 1); | |
| 591 | + ret = m88ds3103_update_bits(dev, 0x4d, 0x02, dev->cfg->spec_inv << 1); | |
| 571 | 592 | if (ret) |
| 572 | 593 | goto err; |
| 573 | 594 | |
| 574 | − ret = regmap_update_bits(dev->regmap, 0x30, 0x10, dev->cfg->agc_inv << 4); | |
| 595 | + ret = m88ds3103_update_bits(dev, 0x30, 0x10, dev->cfg->agc_inv << 4); | |
| 575 | 596 | if (ret) |
| 576 | 597 | goto err; |
| 577 | 598 | |
| @@ -625,13 +646,13 @@ static int m88ds3103_init(struct dvb_frontend *fe) · 47 unmodified lines | ||
| 625 | 646 | dev->warm = false; |
| 626 | 647 | |
| 627 | 648 | /* wake up device from sleep */ |
| 628 | − ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x01); | |
| 649 | + ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x01); | |
| 629 | 650 | if (ret) |
| 630 | 651 | goto err; |
| 631 | − ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x00); | |
| 652 | + ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x00); | |
| 632 | 653 | if (ret) |
| 633 | 654 | goto err; |
| 634 | − ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x00); | |
| 655 | + ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x00); | |
| 635 | 656 | if (ret) |
| 636 | 657 | goto err; |
| 637 | 658 | |
| @@ -749,18 +770,18 @@ static int m88ds3103_sleep(struct dvb_frontend *fe) · 111 unmodified lines | ||
| 749 | 770 | utmp = 0x29; |
| 750 | 771 | else |
| 751 | 772 | utmp = 0x27; |
| 752 | − ret = regmap_update_bits(dev->regmap, utmp, 0x01, 0x00); | |
| 773 | + ret = m88ds3103_update_bits(dev, utmp, 0x01, 0x00); | |
| 753 | 774 | if (ret) |
| 754 | 775 | goto err; |
| 755 | 776 | |
| 756 | 777 | /* sleep */ |
| 757 | − ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x00); | |
| 778 | + ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00); | |
| 758 | 779 | if (ret) |
| 759 | 780 | goto err; |
| 760 | − ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x01); | |
| 781 | + ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01); | |
| 761 | 782 | if (ret) |
| 762 | 783 | goto err; |
| 763 | − ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x10); | |
| 784 | + ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10); | |
| 764 | 785 | if (ret) |
| 765 | 786 | goto err; |
| 766 | 787 | |
| @@ -992,12 +1013,12 @@ static int m88ds3103_set_tone(struct dvb_frontend *fe, · 225 unmodified lines | ||
| 992 | 1013 | } |
| 993 | 1014 | |
| 994 | 1015 | utmp = tone << 7 | dev->cfg->envelope_mode << 5; |
| 995 | − ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp); | |
| 1016 | + ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp); | |
| 996 | 1017 | if (ret) |
| 997 | 1018 | goto err; |
| 998 | 1019 | |
| 999 | 1020 | utmp = 1 << 2; |
| 1000 | − ret = regmap_update_bits(dev->regmap, 0xa1, reg_a1_mask, utmp); | |
| 1021 | + ret = m88ds3103_update_bits(dev, 0xa1, reg_a1_mask, utmp); | |
| 1001 | 1022 | if (ret) |
| 1002 | 1023 | goto err; |
| 1003 | 1024 | |
| @@ -1047,7 +1068,7 @@ static int m88ds3103_set_voltage(struct dvb_frontend *fe, · 43 unmodified lines | ||
| 1047 | 1068 | voltage_dis ^= dev->cfg->lnb_en_pol; |
| 1048 | 1069 | |
| 1049 | 1070 | utmp = voltage_dis << 1 | voltage_sel << 0; |
| 1050 | − ret = regmap_update_bits(dev->regmap, 0xa2, 0x03, utmp); | |
| 1071 | + ret = m88ds3103_update_bits(dev, 0xa2, 0x03, utmp); | |
| 1051 | 1072 | if (ret) |
| 1052 | 1073 | goto err; |
| 1053 | 1074 | |
| @@ -1080,7 +1101,7 @@ static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe, · 26 unmodified lines | ||
| 1080 | 1101 | } |
| 1081 | 1102 | |
| 1082 | 1103 | utmp = dev->cfg->envelope_mode << 5; |
| 1083 | − ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp); | |
| 1104 | + ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp); | |
| 1084 | 1105 | if (ret) |
| 1085 | 1106 | goto err; |
| 1086 | 1107 | |
| @@ -1115,12 +1136,12 @@ static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe, · 28 unmodified lines | ||
| 1115 | 1136 | } else { |
| 1116 | 1137 | dev_dbg(&client->dev, "diseqc tx timeout\n"); |
| 1117 | 1138 | |
| 1118 | − ret = regmap_update_bits(dev->regmap, 0xa1, 0xc0, 0x40); | |
| 1139 | + ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40); | |
| 1119 | 1140 | if (ret) |
| 1120 | 1141 | goto err; |
| 1121 | 1142 | } |
| 1122 | 1143 | |
| 1123 | − ret = regmap_update_bits(dev->regmap, 0xa2, 0xc0, 0x80); | |
| 1144 | + ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80); | |
| 1124 | 1145 | if (ret) |
| 1125 | 1146 | goto err; |
| 1126 | 1147 | |
| @@ -1152,7 +1173,7 @@ static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe, · 25 unmodified lines | ||
| 1152 | 1173 | } |
| 1153 | 1174 | |
| 1154 | 1175 | utmp = dev->cfg->envelope_mode << 5; |
| 1155 | − ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp); | |
| 1176 | + ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp); | |
| 1156 | 1177 | if (ret) |
| 1157 | 1178 | goto err; |
| 1158 | 1179 | |
| @@ -1194,12 +1215,12 @@ static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe, · 35 unmodified lines | ||
| 1194 | 1215 | } else { |
| 1195 | 1216 | dev_dbg(&client->dev, "diseqc tx timeout\n"); |
| 1196 | 1217 | |
| 1197 | − ret = regmap_update_bits(dev->regmap, 0xa1, 0xc0, 0x40); | |
| 1218 | + ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40); | |
| 1198 | 1219 | if (ret) |
| 1199 | 1220 | goto err; |
| 1200 | 1221 | } |
| 1201 | 1222 | |
| 1202 | − ret = regmap_update_bits(dev->regmap, 0xa2, 0xc0, 0x80); | |
| 1223 | + ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80); | |
| 1203 | 1224 | if (ret) |
| 1204 | 1225 | goto err; |
| 1205 | 1226 | |
| @@ -1435,13 +1456,13 @@ static int m88ds3103_probe(struct i2c_client *client, · 229 unmodified lines | ||
| 1435 | 1456 | goto err_kfree; |
| 1436 | 1457 | |
| 1437 | 1458 | /* sleep */ |
| 1438 | − ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x00); | |
| 1459 | + ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00); | |
| 1439 | 1460 | if (ret) |
| 1440 | 1461 | goto err_kfree; |
| 1441 | − ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x01); | |
| 1462 | + ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01); | |
| 1442 | 1463 | if (ret) |
| 1443 | 1464 | goto err_kfree; |
| 1444 | − ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x10); | |
| 1465 | + ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10); | |
| 1445 | 1466 | if (ret) |
| 1446 | 1467 | goto err_kfree; |
| 1447 | 1468 | |
| @@ -502,6 +502,10 @@ static int si2168_init(struct dvb_frontend *fe) · 501 unmodified lines | ||
| 502 | 502 | /* firmware is in the new format */ |
| 503 | 503 | for (remaining = fw->size; remaining > 0; remaining -= 17) { |
| 504 | 504 | len = fw->data[fw->size - remaining]; |
| 505 | + if (len > SI2168_ARGLEN) { | |
| 506 | + ret = -EINVAL; | |
| 507 | + break; | |
| 508 | + } | |
| 505 | 509 | memcpy(cmd.args, &fw->data[(fw->size - remaining) + 1], len); |
| 506 | 510 | cmd.wlen = len; |
| 507 | 511 | cmd.rlen = 1; |
| @@ -80,11 +80,9 @@ irqreturn_t netup_spi_interrupt(struct netup_spi *spi) · 79 unmodified lines | ||
| 80 | 80 | u16 reg; |
| 81 | 81 | unsigned long flags; |
| 82 | 82 | |
| 83 | − if (!spi) { | |
| 84 | − dev_dbg(&spi->master->dev, | |
| 85 | − "%s(): SPI not initialized\n", __func__); | |
| 83 | + if (!spi) | |
| 86 | 84 | return IRQ_NONE; |
| 87 | − } | |
| 85 | + | |
| 88 | 86 | spin_lock_irqsave(&spi->lock, flags); |
| 89 | 87 | reg = readw(&spi->regs->control_stat); |
| 90 | 88 | if (!(reg & NETUP_SPI_CTRL_IRQ)) { |
| @@ -234,11 +232,9 @@ void netup_spi_release(struct netup_unidvb_dev *ndev) · 143 unmodified lines | ||
| 234 | 232 | unsigned long flags; |
| 235 | 233 | struct netup_spi *spi = ndev->spi; |
| 236 | 234 | |
| 237 | − if (!spi) { | |
| 238 | − dev_dbg(&spi->master->dev, | |
| 239 | − "%s(): SPI not initialized\n", __func__); | |
| 235 | + if (!spi) | |
| 240 | 236 | return; |
| 241 | − } | |
| 237 | + | |
| 242 | 238 | spin_lock_irqsave(&spi->lock, flags); |
| 243 | 239 | reg = readw(&spi->regs->control_stat); |
| 244 | 240 | writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat); |
| @@ -1097,7 +1097,7 @@ static int load_slim_core_fw(const struct firmware *fw, void *context) · 1096 unmodified lines | ||
| 1097 | 1097 | Elf32_Ehdr *ehdr; |
| 1098 | 1098 | Elf32_Phdr *phdr; |
| 1099 | 1099 | u8 __iomem *dst; |
| 1100 | − int err, i; | |
| 1100 | + int err = 0, i; | |
| 1101 | 1101 | |
| 1102 | 1102 | if (!fw || !context) |
| 1103 | 1103 | return -EINVAL; |
| @@ -1106,7 +1106,7 @@ static int load_slim_core_fw(const struct firmware *fw, void *context) · 2 unmodified lines | ||
| 1106 | 1106 | phdr = (Elf32_Phdr *)(fw->data + ehdr->e_phoff); |
| 1107 | 1107 | |
| 1108 | 1108 | /* go through the available ELF segments */ |
| 1109 | − for (i = 0; i < ehdr->e_phnum && !err; i++, phdr++) { | |
| 1109 | + for (i = 0; i < ehdr->e_phnum; i++, phdr++) { | |
| 1110 | 1110 | |
| 1111 | 1111 | /* Only consider LOAD segments */ |
| 1112 | 1112 | if (phdr->p_type != PT_LOAD) |
| @@ -1192,7 +1192,6 @@ err: · 79 unmodified lines | ||
| 1192 | 1192 | |
| 1193 | 1193 | static int load_c8sectpfe_fw_step1(struct c8sectpfei *fei) |
| 1194 | 1194 | { |
| 1195 | − int ret; | |
| 1196 | 1195 | int err; |
| 1197 | 1196 | |
| 1198 | 1197 | dev_info(fei->dev, "Loading firmware: %s\n", FIRMWARE_MEMDMA); |
| @@ -1207,7 +1206,7 @@ static int load_c8sectpfe_fw_step1(struct c8sectpfei *fei) · 8 unmodified lines | ||
| 1207 | 1206 | if (err) { |
| 1208 | 1207 | dev_err(fei->dev, "request_firmware_nowait err: %d.\n", err); |
| 1209 | 1208 | complete_all(&fei->fw_ack); |
| 1210 | − return ret; | |
| 1209 | + return err; | |
| 1211 | 1210 | } |
| 1212 | 1211 | |
| 1213 | 1212 | return 0; |
| @@ -257,7 +257,7 @@ static int hix5hd2_ir_probe(struct platform_device *pdev) · 256 unmodified lines | ||
| 257 | 257 | goto clkerr; |
| 258 | 258 | |
| 259 | 259 | if (devm_request_irq(dev, priv->irq, hix5hd2_ir_rx_interrupt, |
| 260 | − IRQF_NO_SUSPEND, pdev->name, priv) < 0) { | |
| 260 | + 0, pdev->name, priv) < 0) { | |
| 261 | 261 | dev_err(dev, "IRQ %d register failed\n", priv->irq); |
| 262 | 262 | ret = -EINVAL; |
| 263 | 263 | goto regerr; |
| @@ -166,6 +166,10 @@ static int si2157_init(struct dvb_frontend *fe) · 165 unmodified lines | ||
| 166 | 166 | |
| 167 | 167 | for (remaining = fw->size; remaining > 0; remaining -= 17) { |
| 168 | 168 | len = fw->data[fw->size - remaining]; |
| 169 | + if (len > SI2157_ARGLEN) { | |
| 170 | + dev_err(&client->dev, "Bad firmware length\n"); | |
| 171 | + goto err_release_firmware; | |
| 172 | + } | |
| 169 | 173 | memcpy(cmd.args, &fw->data[(fw->size - remaining) + 1], len); |
| 170 | 174 | cmd.wlen = len; |
| 171 | 175 | cmd.rlen = 1; |
| @@ -34,6 +34,14 @@ static int rtl28xxu_ctrl_msg(struct dvb_usb_device *d, struct rtl28xxu_req *req) · 33 unmodified lines | ||
| 34 | 34 | unsigned int pipe; |
| 35 | 35 | u8 requesttype; |
| 36 | 36 | |
| 37 | + mutex_lock(&d->usb_mutex); | |
| 38 | + | |
| 39 | + if (req->size > sizeof(dev->buf)) { | |
| 40 | + dev_err(&d->intf->dev, "too large message %u\n", req->size); | |
| 41 | + ret = -EINVAL; | |
| 42 | + goto err_mutex_unlock; | |
| 43 | + } | |
| 44 | + | |
| 37 | 45 | if (req->index & CMD_WR_FLAG) { |
| 38 | 46 | /* write */ |
| 39 | 47 | memcpy(dev->buf, req->data, req->size); |
| @@ -50,14 +58,17 @@ static int rtl28xxu_ctrl_msg(struct dvb_usb_device *d, struct rtl28xxu_req *req) · 10 unmodified lines | ||
| 50 | 58 | dvb_usb_dbg_usb_control_msg(d->udev, 0, requesttype, req->value, |
| 51 | 59 | req->index, dev->buf, req->size); |
| 52 | 60 | if (ret < 0) |
| 53 | − goto err; | |
| 61 | + goto err_mutex_unlock; | |
| 54 | 62 | |
| 55 | 63 | /* read request, copy returned data to return buf */ |
| 56 | 64 | if (requesttype == (USB_TYPE_VENDOR | USB_DIR_IN)) |
| 57 | 65 | memcpy(req->data, dev->buf, req->size); |
| 58 | 66 | |
| 67 | + mutex_unlock(&d->usb_mutex); | |
| 68 | + | |
| 59 | 69 | return 0; |
| 60 | −err: | |
| 70 | +err_mutex_unlock: | |
| 71 | + mutex_unlock(&d->usb_mutex); | |
| 61 | 72 | dev_dbg(&d->intf->dev, "failed=%d\n", ret); |
| 62 | 73 | return ret; |
| 63 | 74 | } |
| @@ -71,7 +71,7 @@ · 70 unmodified lines | ||
| 71 | 71 | |
| 72 | 72 | |
| 73 | 73 | struct rtl28xxu_dev { |
| 74 | − u8 buf[28]; | |
| 74 | + u8 buf[128]; | |
| 75 | 75 | u8 chip_id; |
| 76 | 76 | u8 tuner; |
| 77 | 77 | char *tuner_name; |
| @@ -47,7 +47,7 @@ config V4L2_MEM2MEM_DEV · 46 unmodified lines | ||
| 47 | 47 | # Used by LED subsystem flash drivers |
| 48 | 48 | config V4L2_FLASH_LED_CLASS |
| 49 | 49 | tristate "V4L2 flash API for LED flash class devices" |
| 50 | − depends on VIDEO_V4L2_SUBDEV_API | |
| 50 | + depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API | |
| 51 | 51 | depends on LEDS_CLASS_FLASH |
| 52 | 52 | ---help--- |
| 53 | 53 | Say Y here to enable V4L2 flash API support for LED flash |
| @@ -58,12 +58,18 @@ config OMAP_GPMC · 57 unmodified lines | ||
| 58 | 58 | memory drives like NOR, NAND, OneNAND, SRAM. |
| 59 | 59 | |
| 60 | 60 | config OMAP_GPMC_DEBUG |
| 61 | − bool | |
| 61 | + bool "Enable GPMC debug output and skip reset of GPMC during init" | |
| 62 | 62 | depends on OMAP_GPMC |
| 63 | 63 | help |
| 64 | 64 | Enables verbose debugging mostly to decode the bootloader provided |
| 65 | − timings. Enable this during development to configure devices | |
| 66 | − connected to the GPMC bus. | |
| 65 | + timings. To preserve the bootloader provided timings, the reset | |
| 66 | + of GPMC is skipped during init. Enable this during development to | |
| 67 | + configure devices connected to the GPMC bus. | |
| 68 | + | |
| 69 | + NOTE: In addition to matching the register setup with the bootloader | |
| 70 | + you also need to match the GPMC FCLK frequency used by the | |
| 71 | + bootloader or else the GPMC timings won't be identical with the | |
| 72 | + bootloader timings. | |
| 67 | 73 | |
| 68 | 74 | config MVEBU_DEVBUS |
| 69 | 75 | bool "Marvell EBU Device Bus Controller" |
| @@ -696,7 +696,6 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t, · 695 unmodified lines | ||
| 696 | 696 | int div; |
| 697 | 697 | u32 l; |
| 698 | 698 | |
| 699 | − gpmc_cs_show_timings(cs, "before gpmc_cs_set_timings"); | |
| 700 | 699 | div = gpmc_calc_divider(t->sync_clk); |
| 701 | 700 | if (div < 0) |
| 702 | 701 | return div; |
| @@ -1988,6 +1987,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, · 1285 unmodified lines | ||
| 1988 | 1987 | if (ret < 0) |
| 1989 | 1988 | goto err; |
| 1990 | 1989 | |
| 1990 | + gpmc_cs_show_timings(cs, "before gpmc_cs_program_settings"); | |
| 1991 | 1991 | ret = gpmc_cs_program_settings(cs, &gpmc_s); |
| 1992 | 1992 | if (ret < 0) |
| 1993 | 1993 | goto err; |
| @@ -42,6 +42,8 @@ int intel_lpss_resume(struct device *dev); · 41 unmodified lines | ||
| 42 | 42 | .thaw = intel_lpss_resume, \ |
| 43 | 43 | .poweroff = intel_lpss_suspend, \ |
| 44 | 44 | .restore = intel_lpss_resume, |
| 45 | +#else | |
| 46 | +#define INTEL_LPSS_SLEEP_PM_OPS | |
| 45 | 47 | #endif |
| 46 | 48 | |
| 47 | 49 | #define INTEL_LPSS_RUNTIME_PM_OPS \ |
| @@ -80,7 +80,7 @@ static int max77843_chg_init(struct max77693_dev *max77843) · 79 unmodified lines | ||
| 80 | 80 | if (!max77843->i2c_chg) { |
| 81 | 81 | dev_err(&max77843->i2c->dev, |
| 82 | 82 | "Cannot allocate I2C device for Charger\n"); |
| 83 | − return PTR_ERR(max77843->i2c_chg); | |
| 83 | + return -ENODEV; | |
| 84 | 84 | } |
| 85 | 85 | i2c_set_clientdata(max77843->i2c_chg, max77843); |
| 86 | 86 | |
| @@ -105,6 +105,7 @@ EXPORT_SYMBOL_GPL(cxl_allocate_afu_irqs); · 104 unmodified lines | ||
| 105 | 105 | |
| 106 | 106 | void cxl_free_afu_irqs(struct cxl_context *ctx) |
| 107 | 107 | { |
| 108 | + afu_irq_name_free(ctx); | |
| 108 | 109 | cxl_release_irq_ranges(&ctx->irqs, ctx->afu->adapter); |
| 109 | 110 | } |
| 110 | 111 | EXPORT_SYMBOL_GPL(cxl_free_afu_irqs); |
| @@ -275,6 +275,9 @@ static void reclaim_ctx(struct rcu_head *rcu) · 274 unmodified lines | ||
| 275 | 275 | if (ctx->kernelapi) |
| 276 | 276 | kfree(ctx->mapping); |
| 277 | 277 | |
| 278 | + if (ctx->irq_bitmap) | |
| 279 | + kfree(ctx->irq_bitmap); | |
| 280 | + | |
| 278 | 281 | kfree(ctx); |
| 279 | 282 | } |
| 280 | 283 | |
| @@ -677,6 +677,7 @@ int cxl_register_serr_irq(struct cxl_afu *afu); · 676 unmodified lines | ||
| 677 | 677 | void cxl_release_serr_irq(struct cxl_afu *afu); |
| 678 | 678 | int afu_register_irqs(struct cxl_context *ctx, u32 count); |
| 679 | 679 | void afu_release_irqs(struct cxl_context *ctx, void *cookie); |
| 680 | +void afu_irq_name_free(struct cxl_context *ctx); | |
| 680 | 681 | irqreturn_t cxl_slice_irq_err(int irq, void *data); |
| 681 | 682 | |
| 682 | 683 | int cxl_debugfs_init(void); |
| @@ -120,9 +120,16 @@ int afu_release(struct inode *inode, struct file *file) · 119 unmodified lines | ||
| 120 | 120 | __func__, ctx->pe); |
| 121 | 121 | cxl_context_detach(ctx); |
| 122 | 122 | |
| 123 | − mutex_lock(&ctx->mapping_lock); | |
| 124 | − ctx->mapping = NULL; | |
| 125 | − mutex_unlock(&ctx->mapping_lock); | |
| 123 | + | |
| 124 | + /* | |
| 125 | + * Delete the context's mapping pointer, unless it's created by the | |
| 126 | + * kernel API, in which case leave it so it can be freed by reclaim_ctx() | |
| 127 | + */ | |
| 128 | + if (!ctx->kernelapi) { | |
| 129 | + mutex_lock(&ctx->mapping_lock); | |
| 130 | + ctx->mapping = NULL; | |
| 131 | + mutex_unlock(&ctx->mapping_lock); | |
| 132 | + } | |
| 126 | 133 | |
| 127 | 134 | put_device(&ctx->afu->dev); |
| 128 | 135 | |
| @@ -414,7 +414,7 @@ void cxl_release_psl_irq(struct cxl_afu *afu) · 413 unmodified lines | ||
| 414 | 414 | kfree(afu->psl_irq_name); |
| 415 | 415 | } |
| 416 | 416 | |
| 417 | −static void afu_irq_name_free(struct cxl_context *ctx) | |
| 417 | +void afu_irq_name_free(struct cxl_context *ctx) | |
| 418 | 418 | { |
| 419 | 419 | struct cxl_irq_name *irq_name, *tmp; |
| 420 | 420 | |
| @@ -524,7 +524,5 @@ void afu_release_irqs(struct cxl_context *ctx, void *cookie) · 103 unmodified lines | ||
| 524 | 524 | afu_irq_name_free(ctx); |
| 525 | 525 | cxl_release_irq_ranges(&ctx->irqs, ctx->afu->adapter); |
| 526 | 526 | |
| 527 | − kfree(ctx->irq_bitmap); | |
| 528 | − ctx->irq_bitmap = NULL; | |
| 529 | 527 | ctx->irq_count = 0; |
| 530 | 528 | } |
| @@ -457,6 +457,7 @@ static int activate_afu_directed(struct cxl_afu *afu) · 456 unmodified lines | ||
| 457 | 457 | |
| 458 | 458 | dev_info(&afu->dev, "Activating AFU directed mode\n"); |
| 459 | 459 | |
| 460 | + afu->num_procs = afu->max_procs_virtualised; | |
| 460 | 461 | if (afu->spa == NULL) { |
| 461 | 462 | if (cxl_alloc_spa(afu)) |
| 462 | 463 | return -ENOMEM; |
| @@ -468,7 +469,6 @@ static int activate_afu_directed(struct cxl_afu *afu) · 5 unmodified lines | ||
| 468 | 469 | cxl_p1n_write(afu, CXL_PSL_ID_An, CXL_PSL_ID_An_F | CXL_PSL_ID_An_L); |
| 469 | 470 | |
| 470 | 471 | afu->current_mode = CXL_MODE_DIRECTED; |
| 471 | − afu->num_procs = afu->max_procs_virtualised; | |
| 472 | 472 | |
| 473 | 473 | if ((rc = cxl_chardev_m_afu_add(afu))) |
| 474 | 474 | return rc; |
| @@ -1035,6 +1035,32 @@ static int cxl_read_vsec(struct cxl *adapter, struct pci_dev *dev) · 1034 unmodified lines | ||
| 1035 | 1035 | return 0; |
| 1036 | 1036 | } |
| 1037 | 1037 | |
| 1038 | +/* | |
| 1039 | + * Workaround a PCIe Host Bridge defect on some cards, that can cause | |
| 1040 | + * malformed Transaction Layer Packet (TLP) errors to be erroneously | |
| 1041 | + * reported. Mask this error in the Uncorrectable Error Mask Register. | |
| 1042 | + * | |
| 1043 | + * The upper nibble of the PSL revision is used to distinguish between | |
| 1044 | + * different cards. The affected ones have it set to 0. | |
| 1045 | + */ | |
| 1046 | +static void cxl_fixup_malformed_tlp(struct cxl *adapter, struct pci_dev *dev) | |
| 1047 | +{ | |
| 1048 | + int aer; | |
| 1049 | + u32 data; | |
| 1050 | + | |
| 1051 | + if (adapter->psl_rev & 0xf000) | |
| 1052 | + return; | |
| 1053 | + if (!(aer = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR))) | |
| 1054 | + return; | |
| 1055 | + pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, &data); | |
| 1056 | + if (data & PCI_ERR_UNC_MALF_TLP) | |
| 1057 | + if (data & PCI_ERR_UNC_INTN) | |
| 1058 | + return; | |
| 1059 | + data |= PCI_ERR_UNC_MALF_TLP; | |
| 1060 | + data |= PCI_ERR_UNC_INTN; | |
| 1061 | + pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, data); | |
| 1062 | +} | |
| 1063 | + | |
| 1038 | 1064 | static int cxl_vsec_looks_ok(struct cxl *adapter, struct pci_dev *dev) |
| 1039 | 1065 | { |
| 1040 | 1066 | if (adapter->vsec_status & CXL_STATUS_SECOND_PORT) |
| @@ -1134,6 +1160,8 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev) · 93 unmodified lines | ||
| 1134 | 1160 | if ((rc = cxl_vsec_looks_ok(adapter, dev))) |
| 1135 | 1161 | return rc; |
| 1136 | 1162 | |
| 1163 | + cxl_fixup_malformed_tlp(adapter, dev); | |
| 1164 | + | |
| 1137 | 1165 | if ((rc = setup_cxl_bars(dev))) |
| 1138 | 1166 | return rc; |
| 1139 | 1167 | |
| @@ -2263,15 +2263,12 @@ static int mmc_test_profile_sglen_r_nonblock_perf(struct mmc_test_card *test) · 2262 unmodified lines | ||
| 2263 | 2263 | /* |
| 2264 | 2264 | * eMMC hardware reset. |
| 2265 | 2265 | */ |
| 2266 | −static int mmc_test_hw_reset(struct mmc_test_card *test) | |
| 2266 | +static int mmc_test_reset(struct mmc_test_card *test) | |
| 2267 | 2267 | { |
| 2268 | 2268 | struct mmc_card *card = test->card; |
| 2269 | 2269 | struct mmc_host *host = card->host; |
| 2270 | 2270 | int err; |
| 2271 | 2271 | |
| 2272 | − if (!mmc_card_mmc(card) || !mmc_can_reset(card)) | |
| 2273 | − return RESULT_UNSUP_CARD; | |
| 2274 | − | |
| 2275 | 2272 | err = mmc_hw_reset(host); |
| 2276 | 2273 | if (!err) |
| 2277 | 2274 | return RESULT_OK; |
| @@ -2605,8 +2602,8 @@ static const struct mmc_test_case mmc_test_cases[] = { · 327 unmodified lines | ||
| 2605 | 2602 | }, |
| 2606 | 2603 | |
| 2607 | 2604 | { |
| 2608 | − .name = "eMMC hardware reset", | |
| 2609 | − .run = mmc_test_hw_reset, | |
| 2605 | + .name = "Reset test", | |
| 2606 | + .run = mmc_test_reset, | |
| 2610 | 2607 | }, |
| 2611 | 2608 | }; |
| 2612 | 2609 | |
| @@ -1924,7 +1924,6 @@ EXPORT_SYMBOL(mmc_can_reset); · 1923 unmodified lines | ||
| 1924 | 1924 | static int mmc_reset(struct mmc_host *host) |
| 1925 | 1925 | { |
| 1926 | 1926 | struct mmc_card *card = host->card; |
| 1927 | − u32 status; | |
| 1928 | 1927 | |
| 1929 | 1928 | if (!(host->caps & MMC_CAP_HW_RESET) || !host->ops->hw_reset) |
| 1930 | 1929 | return -EOPNOTSUPP; |
| @@ -1937,12 +1936,6 @@ static int mmc_reset(struct mmc_host *host) · 6 unmodified lines | ||
| 1937 | 1936 | |
| 1938 | 1937 | host->ops->hw_reset(host); |
| 1939 | 1938 | |
| 1940 | − /* If the reset has happened, then a status command will fail */ | |
| 1941 | − if (!mmc_send_status(card, &status)) { | |
| 1942 | − mmc_host_clk_release(host); | |
| 1943 | − return -ENOSYS; | |
| 1944 | − } | |
| 1945 | − | |
| 1946 | 1939 | /* Set initial state and call mmc_set_ios */ |
| 1947 | 1940 | mmc_set_initial_state(host); |
| 1948 | 1941 | mmc_host_clk_release(host); |
| @@ -87,6 +87,7 @@ static const struct pci_device_id peak_pci_tbl[] = { · 86 unmodified lines | ||
| 87 | 87 | {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
| 88 | 88 | {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
| 89 | 89 | {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
| 90 | + {PEAK_PCI_VENDOR_ID, PEAK_PCIE_OEM_ID, PCI_ANY_ID, PCI_ANY_ID,}, | |
| 90 | 91 | #ifdef CONFIG_CAN_PEAK_PCIEC |
| 91 | 92 | {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
| 92 | 93 | {PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
| @@ -327,9 +327,13 @@ void xgbe_debugfs_init(struct xgbe_prv_data *pdata) · 326 unmodified lines | ||
| 327 | 327 | pdata->debugfs_xpcs_reg = 0; |
| 328 | 328 | |
| 329 | 329 | buf = kasprintf(GFP_KERNEL, "amd-xgbe-%s", pdata->netdev->name); |
| 330 | + if (!buf) | |
| 331 | + return; | |
| 332 | + | |
| 330 | 333 | pdata->xgbe_debugfs = debugfs_create_dir(buf, NULL); |
| 331 | 334 | if (!pdata->xgbe_debugfs) { |
| 332 | 335 | netdev_err(pdata->netdev, "debugfs_create_dir failed\n"); |
| 336 | + kfree(buf); | |
| 333 | 337 | return; |
| 334 | 338 | } |
| 335 | 339 | |
| @@ -3351,6 +3351,13 @@ static int bnx2x_set_rss_flags(struct bnx2x *bp, struct ethtool_rxnfc *info) · 3350 unmodified lines | ||
| 3351 | 3351 | udp_rss_requested = 0; |
| 3352 | 3352 | else |
| 3353 | 3353 | return -EINVAL; |
| 3354 | + | |
| 3355 | + if (CHIP_IS_E1x(bp) && udp_rss_requested) { | |
| 3356 | + DP(BNX2X_MSG_ETHTOOL, | |
| 3357 | + "57710, 57711 boards don't support RSS according to UDP 4-tuple\n"); | |
| 3358 | + return -EINVAL; | |
| 3359 | + } | |
| 3360 | + | |
| 3354 | 3361 | if ((info->flow_type == UDP_V4_FLOW) && |
| 3355 | 3362 | (bp->rss_conf_obj.udp_rss_v4 != udp_rss_requested)) { |
| 3356 | 3363 | bp->rss_conf_obj.udp_rss_v4 = udp_rss_requested; |
| @@ -1683,6 +1683,24 @@ static void bcmgenet_intr_disable(struct bcmgenet_priv *priv) · 1682 unmodified lines | ||
| 1683 | 1683 | bcmgenet_intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR); |
| 1684 | 1684 | } |
| 1685 | 1685 | |
| 1686 | +static void bcmgenet_link_intr_enable(struct bcmgenet_priv *priv) | |
| 1687 | +{ | |
| 1688 | + u32 int0_enable = 0; | |
| 1689 | + | |
| 1690 | + /* Monitor cable plug/unplugged event for internal PHY, external PHY | |
| 1691 | + * and MoCA PHY | |
| 1692 | + */ | |
| 1693 | + if (priv->internal_phy) { | |
| 1694 | + int0_enable |= UMAC_IRQ_LINK_EVENT; | |
| 1695 | + } else if (priv->ext_phy) { | |
| 1696 | + int0_enable |= UMAC_IRQ_LINK_EVENT; | |
| 1697 | + } else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { | |
| 1698 | + if (priv->hw_params->flags & GENET_HAS_MOCA_LINK_DET) | |
| 1699 | + int0_enable |= UMAC_IRQ_LINK_EVENT; | |
| 1700 | + } | |
| 1701 | + bcmgenet_intrl2_0_writel(priv, int0_enable, INTRL2_CPU_MASK_CLEAR); | |
| 1702 | +} | |
| 1703 | + | |
| 1686 | 1704 | static int init_umac(struct bcmgenet_priv *priv) |
| 1687 | 1705 | { |
| 1688 | 1706 | struct device *kdev = &priv->pdev->dev; |
| @@ -1723,15 +1741,8 @@ static int init_umac(struct bcmgenet_priv *priv) · 34 unmodified lines | ||
| 1723 | 1741 | /* Enable Tx default queue 16 interrupts */ |
| 1724 | 1742 | int0_enable |= UMAC_IRQ_TXDMA_DONE; |
| 1725 | 1743 | |
| 1726 | − /* Monitor cable plug/unplugged event for internal PHY */ | |
| 1727 | − if (priv->internal_phy) { | |
| 1728 | − int0_enable |= UMAC_IRQ_LINK_EVENT; | |
| 1729 | − } else if (priv->ext_phy) { | |
| 1730 | − int0_enable |= UMAC_IRQ_LINK_EVENT; | |
| 1731 | − } else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { | |
| 1732 | − if (priv->hw_params->flags & GENET_HAS_MOCA_LINK_DET) | |
| 1733 | − int0_enable |= UMAC_IRQ_LINK_EVENT; | |
| 1734 | − | |
| 1744 | + /* Configure backpressure vectors for MoCA */ | |
| 1745 | + if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { | |
| 1735 | 1746 | reg = bcmgenet_bp_mc_get(priv); |
| 1736 | 1747 | reg |= BIT(priv->hw_params->bp_in_en_shift); |
| 1737 | 1748 | |
| @@ -2645,6 +2656,9 @@ static void bcmgenet_netif_start(struct net_device *dev) · 907 unmodified lines | ||
| 2645 | 2656 | |
| 2646 | 2657 | netif_tx_start_all_queues(dev); |
| 2647 | 2658 | |
| 2659 | + /* Monitor link interrupts now */ | |
| 2660 | + bcmgenet_link_intr_enable(priv); | |
| 2661 | + | |
| 2648 | 2662 | phy_start(priv->phydev); |
| 2649 | 2663 | } |
| 2650 | 2664 | |
| @@ -592,6 +592,7 @@ struct be_adapter { · 591 unmodified lines | ||
| 592 | 592 | int be_get_temp_freq; |
| 593 | 593 | struct be_hwmon hwmon_info; |
| 594 | 594 | u8 pf_number; |
| 595 | + u8 pci_func_num; | |
| 595 | 596 | struct rss_info rss_info; |
| 596 | 597 | /* Filters for packets that need to be sent to BMC */ |
| 597 | 598 | u32 bmc_filt_mask; |
| @@ -851,8 +851,10 @@ static int be_cmd_notify_wait(struct be_adapter *adapter, · 850 unmodified lines | ||
| 851 | 851 | return status; |
| 852 | 852 | |
| 853 | 853 | dest_wrb = be_cmd_copy(adapter, wrb); |
| 854 | − if (!dest_wrb) | |
| 855 | − return -EBUSY; | |
| 854 | + if (!dest_wrb) { | |
| 855 | + status = -EBUSY; | |
| 856 | + goto unlock; | |
| 857 | + } | |
| 856 | 858 | |
| 857 | 859 | if (use_mcc(adapter)) |
| 858 | 860 | status = be_mcc_notify_wait(adapter); |
| @@ -862,6 +864,7 @@ static int be_cmd_notify_wait(struct be_adapter *adapter, · 3 unmodified lines | ||
| 862 | 864 | if (!status) |
| 863 | 865 | memcpy(wrb, dest_wrb, sizeof(*wrb)); |
| 864 | 866 | |
| 867 | +unlock: | |
| 865 | 868 | be_cmd_unlock(adapter); |
| 866 | 869 | return status; |
| 867 | 870 | } |
| @@ -1984,6 +1987,8 @@ int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value) · 1116 unmodified lines | ||
| 1984 | 1987 | be_if_cap_flags(adapter)); |
| 1985 | 1988 | } |
| 1986 | 1989 | flags &= be_if_cap_flags(adapter); |
| 1990 | + if (!flags) | |
| 1991 | + return -ENOTSUPP; | |
| 1987 | 1992 | |
| 1988 | 1993 | return __be_cmd_rx_filter(adapter, flags, value); |
| 1989 | 1994 | } |
| @@ -2887,6 +2892,7 @@ int be_cmd_get_cntl_attributes(struct be_adapter *adapter) · 897 unmodified lines | ||
| 2887 | 2892 | if (!status) { |
| 2888 | 2893 | attribs = attribs_cmd.va + sizeof(struct be_cmd_resp_hdr); |
| 2889 | 2894 | adapter->hba_port_num = attribs->hba_attribs.phy_port; |
| 2895 | + adapter->pci_func_num = attribs->pci_func_num; | |
| 2890 | 2896 | serial_num = attribs->hba_attribs.controller_serial_number; |
| 2891 | 2897 | for (i = 0; i < CNTL_SERIAL_NUM_WORDS; i++) |
| 2892 | 2898 | adapter->serial_num[i] = le32_to_cpu(serial_num[i]) & |
| @@ -3709,7 +3715,6 @@ int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res) · 816 unmodified lines | ||
| 3709 | 3715 | status = -EINVAL; |
| 3710 | 3716 | goto err; |
| 3711 | 3717 | } |
| 3712 | − | |
| 3713 | 3718 | adapter->pf_number = desc->pf_num; |
| 3714 | 3719 | be_copy_nic_desc(res, desc); |
| 3715 | 3720 | } |
| @@ -3721,7 +3726,10 @@ err: · 5 unmodified lines | ||
| 3721 | 3726 | return status; |
| 3722 | 3727 | } |
| 3723 | 3728 | |
| 3724 | −/* Will use MBOX only if MCCQ has not been created */ | |
| 3729 | +/* Will use MBOX only if MCCQ has not been created | |
| 3730 | + * non-zero domain => a PF is querying this on behalf of a VF | |
| 3731 | + * zero domain => a PF or a VF is querying this for itself | |
| 3732 | + */ | |
| 3725 | 3733 | int be_cmd_get_profile_config(struct be_adapter *adapter, |
| 3726 | 3734 | struct be_resources *res, u8 query, u8 domain) |
| 3727 | 3735 | { |
| @@ -3748,10 +3756,15 @@ int be_cmd_get_profile_config(struct be_adapter *adapter, · 20 unmodified lines | ||
| 3748 | 3756 | OPCODE_COMMON_GET_PROFILE_CONFIG, |
| 3749 | 3757 | cmd.size, &wrb, &cmd); |
| 3750 | 3758 | |
| 3751 | − req->hdr.domain = domain; | |
| 3752 | 3759 | if (!lancer_chip(adapter)) |
| 3753 | 3760 | req->hdr.version = 1; |
| 3754 | 3761 | req->type = ACTIVE_PROFILE_TYPE; |
| 3762 | + /* When a function is querying profile information relating to | |
| 3763 | + * itself hdr.pf_number must be set to it's pci_func_num + 1 | |
| 3764 | + */ | |
| 3765 | + req->hdr.domain = domain; | |
| 3766 | + if (domain == 0) | |
| 3767 | + req->hdr.pf_num = adapter->pci_func_num + 1; | |
| 3755 | 3768 | |
| 3756 | 3769 | /* When QUERY_MODIFIABLE_FIELDS_TYPE bit is set, cmd returns the |
| 3757 | 3770 | * descriptors with all bits set to "1" for the fields which can be |
| @@ -3921,12 +3934,16 @@ static void be_fill_vf_res_template(struct be_adapter *adapter, · 163 unmodified lines | ||
| 3921 | 3934 | vf_if_cap_flags &= ~(BE_IF_FLAGS_RSS | |
| 3922 | 3935 | BE_IF_FLAGS_DEFQ_RSS); |
| 3923 | 3936 | } |
| 3924 | − | |
| 3925 | − nic_vft->cap_flags = cpu_to_le32(vf_if_cap_flags); | |
| 3926 | 3937 | } else { |
| 3927 | 3938 | num_vf_qs = 1; |
| 3928 | 3939 | } |
| 3929 | 3940 | |
| 3941 | + if (res_mod.vf_if_cap_flags & BE_IF_FLAGS_VLAN_PROMISCUOUS) { | |
| 3942 | + nic_vft->flags |= BIT(IF_CAPS_FLAGS_VALID_SHIFT); | |
| 3943 | + vf_if_cap_flags &= ~BE_IF_FLAGS_VLAN_PROMISCUOUS; | |
| 3944 | + } | |
| 3945 | + | |
| 3946 | + nic_vft->cap_flags = cpu_to_le32(vf_if_cap_flags); | |
| 3930 | 3947 | nic_vft->rq_count = cpu_to_le16(num_vf_qs); |
| 3931 | 3948 | nic_vft->txq_count = cpu_to_le16(num_vf_qs); |
| 3932 | 3949 | nic_vft->rssq_count = cpu_to_le16(num_vf_qs); |
| @@ -289,7 +289,9 @@ struct be_cmd_req_hdr { · 288 unmodified lines | ||
| 289 | 289 | u32 timeout; /* dword 1 */ |
| 290 | 290 | u32 request_length; /* dword 2 */ |
| 291 | 291 | u8 version; /* dword 3 */ |
| 292 | − u8 rsvd[3]; /* dword 3 */ | |
| 292 | + u8 rsvd1; /* dword 3 */ | |
| 293 | + u8 pf_num; /* dword 3 */ | |
| 294 | + u8 rsvd2; /* dword 3 */ | |
| 293 | 295 | }; |
| 294 | 296 | |
| 295 | 297 | #define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */ |
| @@ -1652,7 +1654,11 @@ struct mgmt_hba_attribs { · 1356 unmodified lines | ||
| 1652 | 1654 | |
| 1653 | 1655 | struct mgmt_controller_attrib { |
| 1654 | 1656 | struct mgmt_hba_attribs hba_attribs; |
| 1655 | − u32 rsvd0[10]; | |
| 1657 | + u32 rsvd0[2]; | |
| 1658 | + u16 rsvd1; | |
| 1659 | + u8 pci_func_num; | |
| 1660 | + u8 rsvd2; | |
| 1661 | + u32 rsvd3[7]; | |
| 1656 | 1662 | } __packed; |
| 1657 | 1663 | |
| 1658 | 1664 | struct be_cmd_req_cntl_attribs { |
| @@ -1123,11 +1123,12 @@ static struct sk_buff *be_xmit_workarounds(struct be_adapter *adapter, · 1122 unmodified lines | ||
| 1123 | 1123 | struct sk_buff *skb, |
| 1124 | 1124 | struct be_wrb_params *wrb_params) |
| 1125 | 1125 | { |
| 1126 | − /* Lancer, SH-R ASICs have a bug wherein Packets that are 32 bytes or | |
| 1127 | − * less may cause a transmit stall on that port. So the work-around is | |
| 1128 | − * to pad short packets (<= 32 bytes) to a 36-byte length. | |
| 1126 | + /* Lancer, SH and BE3 in SRIOV mode have a bug wherein | |
| 1127 | + * packets that are 32b or less may cause a transmit stall | |
| 1128 | + * on that port. The workaround is to pad such packets | |
| 1129 | + * (len <= 32 bytes) to a minimum length of 36b. | |
| 1129 | 1130 | */ |
| 1130 | − if (unlikely(!BEx_chip(adapter) && skb->len <= 32)) { | |
| 1131 | + if (skb->len <= 32) { | |
| 1131 | 1132 | if (skb_put_padto(skb, 36)) |
| 1132 | 1133 | return NULL; |
| 1133 | 1134 | } |
| @@ -4205,10 +4206,6 @@ static int be_get_config(struct be_adapter *adapter) · 3071 unmodified lines | ||
| 4205 | 4206 | int status, level; |
| 4206 | 4207 | u16 profile_id; |
| 4207 | 4208 | |
| 4208 | − status = be_cmd_get_cntl_attributes(adapter); | |
| 4209 | − if (status) | |
| 4210 | − return status; | |
| 4211 | − | |
| 4212 | 4209 | status = be_cmd_query_fw_cfg(adapter); |
| 4213 | 4210 | if (status) |
| 4214 | 4211 | return status; |
| @@ -4407,6 +4404,11 @@ static int be_setup(struct be_adapter *adapter) · 192 unmodified lines | ||
| 4407 | 4404 | if (!lancer_chip(adapter)) |
| 4408 | 4405 | be_cmd_req_native_mode(adapter); |
| 4409 | 4406 | |
| 4407 | + /* Need to invoke this cmd first to get the PCI Function Number */ | |
| 4408 | + status = be_cmd_get_cntl_attributes(adapter); | |
| 4409 | + if (status) | |
| 4410 | + return status; | |
| 4411 | + | |
| 4410 | 4412 | if (!BE2_chip(adapter) && be_physfn(adapter)) |
| 4411 | 4413 | be_alloc_sriov_res(adapter); |
| 4412 | 4414 | |
| @@ -4999,7 +5001,15 @@ static bool be_check_ufi_compatibility(struct be_adapter *adapter, · 586 unmodified lines | ||
| 4999 | 5001 | return false; |
| 5000 | 5002 | } |
| 5001 | 5003 | |
| 5002 | − return (fhdr->asic_type_rev >= adapter->asic_rev); | |
| 5004 | + /* In BE3 FW images the "asic_type_rev" field doesn't track the | |
| 5005 | + * asic_rev of the chips it is compatible with. | |
| 5006 | + * When asic_type_rev is 0 the image is compatible only with | |
| 5007 | + * pre-BE3-R chips (asic_rev < 0x10) | |
| 5008 | + */ | |
| 5009 | + if (BEx_chip(adapter) && fhdr->asic_type_rev == 0) | |
| 5010 | + return adapter->asic_rev < 0x10; | |
| 5011 | + else | |
| 5012 | + return (fhdr->asic_type_rev >= adapter->asic_rev); | |
| 5003 | 5013 | } |
| 5004 | 5014 | |
| 5005 | 5015 | static int be_fw_download(struct be_adapter *adapter, const struct firmware* fw) |
| @@ -198,17 +198,28 @@ static int fsl_pq_mdio_reset(struct mii_bus *bus) · 197 unmodified lines | ||
| 198 | 198 | |
| 199 | 199 | #if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE) |
| 200 | 200 | /* |
| 201 | + * Return the TBIPA address, starting from the address | |
| 202 | + * of the mapped GFAR MDIO registers (struct gfar) | |
| 201 | 203 | * This is mildly evil, but so is our hardware for doing this. |
| 202 | 204 | * Also, we have to cast back to struct gfar because of |
| 203 | 205 | * definition weirdness done in gianfar.h. |
| 204 | 206 | */ |
| 205 | −static uint32_t __iomem *get_gfar_tbipa(void __iomem *p) | |
| 207 | +static uint32_t __iomem *get_gfar_tbipa_from_mdio(void __iomem *p) | |
| 206 | 208 | { |
| 207 | 209 | struct gfar __iomem *enet_regs = p; |
| 208 | 210 | |
| 209 | 211 | return &enet_regs->tbipa; |
| 210 | 212 | } |
| 211 | 213 | |
| 214 | +/* | |
| 215 | + * Return the TBIPA address, starting from the address | |
| 216 | + * of the mapped GFAR MII registers (gfar_mii_regs[] within struct gfar) | |
| 217 | + */ | |
| 218 | +static uint32_t __iomem *get_gfar_tbipa_from_mii(void __iomem *p) | |
| 219 | +{ | |
| 220 | + return get_gfar_tbipa_from_mdio(container_of(p, struct gfar, gfar_mii_regs)); | |
| 221 | +} | |
| 222 | + | |
| 212 | 223 | /* |
| 213 | 224 | * Return the TBIPAR address for an eTSEC2 node |
| 214 | 225 | */ |
| @@ -220,11 +231,12 @@ static uint32_t __iomem *get_etsec_tbipa(void __iomem *p) · 5 unmodified lines | ||
| 220 | 231 | |
| 221 | 232 | #if defined(CONFIG_UCC_GETH) || defined(CONFIG_UCC_GETH_MODULE) |
| 222 | 233 | /* |
| 223 | − * Return the TBIPAR address for a QE MDIO node | |
| 234 | + * Return the TBIPAR address for a QE MDIO node, starting from the address | |
| 235 | + * of the mapped MII registers (struct fsl_pq_mii) | |
| 224 | 236 | */ |
| 225 | 237 | static uint32_t __iomem *get_ucc_tbipa(void __iomem *p) |
| 226 | 238 | { |
| 227 | − struct fsl_pq_mdio __iomem *mdio = p; | |
| 239 | + struct fsl_pq_mdio __iomem *mdio = container_of(p, struct fsl_pq_mdio, mii); | |
| 228 | 240 | |
| 229 | 241 | return &mdio->utbipar; |
| 230 | 242 | } |
| @@ -300,14 +312,14 @@ static const struct of_device_id fsl_pq_mdio_match[] = { · 69 unmodified lines | ||
| 300 | 312 | .compatible = "fsl,gianfar-tbi", |
| 301 | 313 | .data = &(struct fsl_pq_mdio_data) { |
| 302 | 314 | .mii_offset = 0, |
| 303 | − .get_tbipa = get_gfar_tbipa, | |
| 315 | + .get_tbipa = get_gfar_tbipa_from_mii, | |
| 304 | 316 | }, |
| 305 | 317 | }, |
| 306 | 318 | { |
| 307 | 319 | .compatible = "fsl,gianfar-mdio", |
| 308 | 320 | .data = &(struct fsl_pq_mdio_data) { |
| 309 | 321 | .mii_offset = 0, |
| 310 | − .get_tbipa = get_gfar_tbipa, | |
| 322 | + .get_tbipa = get_gfar_tbipa_from_mii, | |
| 311 | 323 | }, |
| 312 | 324 | }, |
| 313 | 325 | { |
| @@ -315,7 +327,7 @@ static const struct of_device_id fsl_pq_mdio_match[] = { · 1 unmodified line | ||
| 315 | 327 | .compatible = "gianfar", |
| 316 | 328 | .data = &(struct fsl_pq_mdio_data) { |
| 317 | 329 | .mii_offset = offsetof(struct fsl_pq_mdio, mii), |
| 318 | − .get_tbipa = get_gfar_tbipa, | |
| 330 | + .get_tbipa = get_gfar_tbipa_from_mdio, | |
| 319 | 331 | }, |
| 320 | 332 | }, |
| 321 | 333 | { |
| @@ -445,6 +457,16 @@ static int fsl_pq_mdio_probe(struct platform_device *pdev) · 123 unmodified lines | ||
| 445 | 457 | |
| 446 | 458 | tbipa = data->get_tbipa(priv->map); |
| 447 | 459 | |
| 460 | + /* | |
| 461 | + * Add consistency check to make sure TBI is contained | |
| 462 | + * within the mapped range (not because we would get a | |
| 463 | + * segfault, rather to catch bugs in computing TBI | |
| 464 | + * address). Print error message but continue anyway. | |
| 465 | + */ | |
| 466 | + if ((void *)tbipa > priv->map + resource_size(&res) - 4) | |
| 467 | + dev_err(&pdev->dev, "invalid register map (should be at least 0x%04x to contain TBI address)\n", | |
| 468 | + ((void *)tbipa - priv->map) + 4); | |
| 469 | + | |
| 448 | 470 | iowrite32be(be32_to_cpup(prop), tbipa); |
| 449 | 471 | } |
| 450 | 472 | } |
| @@ -386,7 +386,6 @@ static i40e_status i40e_init_asq(struct i40e_hw *hw) · 385 unmodified lines | ||
| 386 | 386 | |
| 387 | 387 | hw->aq.asq.next_to_use = 0; |
| 388 | 388 | hw->aq.asq.next_to_clean = 0; |
| 389 | − hw->aq.asq.count = hw->aq.num_asq_entries; | |
| 390 | 389 | |
| 391 | 390 | /* allocate the ring memory */ |
| 392 | 391 | ret_code = i40e_alloc_adminq_asq_ring(hw); |
| @@ -404,6 +403,7 @@ static i40e_status i40e_init_asq(struct i40e_hw *hw) · 11 unmodified lines | ||
| 404 | 403 | goto init_adminq_free_rings; |
| 405 | 404 | |
| 406 | 405 | /* success! */ |
| 406 | + hw->aq.asq.count = hw->aq.num_asq_entries; | |
| 407 | 407 | goto init_adminq_exit; |
| 408 | 408 | |
| 409 | 409 | init_adminq_free_rings: |
| @@ -445,7 +445,6 @@ static i40e_status i40e_init_arq(struct i40e_hw *hw) · 35 unmodified lines | ||
| 445 | 445 | |
| 446 | 446 | hw->aq.arq.next_to_use = 0; |
| 447 | 447 | hw->aq.arq.next_to_clean = 0; |
| 448 | − hw->aq.arq.count = hw->aq.num_arq_entries; | |
| 449 | 448 | |
| 450 | 449 | /* allocate the ring memory */ |
| 451 | 450 | ret_code = i40e_alloc_adminq_arq_ring(hw); |
| @@ -463,6 +462,7 @@ static i40e_status i40e_init_arq(struct i40e_hw *hw) · 11 unmodified lines | ||
| 463 | 462 | goto init_adminq_free_rings; |
| 464 | 463 | |
| 465 | 464 | /* success! */ |
| 465 | + hw->aq.arq.count = hw->aq.num_arq_entries; | |
| 466 | 466 | goto init_adminq_exit; |
| 467 | 467 | |
| 468 | 468 | init_adminq_free_rings: |
| @@ -8389,6 +8389,7 @@ static int i40e_config_netdev(struct i40e_vsi *vsi) · 8388 unmodified lines | ||
| 8389 | 8389 | |
| 8390 | 8390 | netdev->hw_enc_features |= NETIF_F_IP_CSUM | |
| 8391 | 8391 | NETIF_F_GSO_UDP_TUNNEL | |
| 8392 | + NETIF_F_GSO_GRE | | |
| 8392 | 8393 | NETIF_F_TSO; |
| 8393 | 8394 | |
| 8394 | 8395 | netdev->features = NETIF_F_SG | |
| @@ -8396,6 +8397,7 @@ static int i40e_config_netdev(struct i40e_vsi *vsi) · 1 unmodified line | ||
| 8396 | 8397 | NETIF_F_SCTP_CSUM | |
| 8397 | 8398 | NETIF_F_HIGHDMA | |
| 8398 | 8399 | NETIF_F_GSO_UDP_TUNNEL | |
| 8400 | + NETIF_F_GSO_GRE | | |
| 8399 | 8401 | NETIF_F_HW_VLAN_CTAG_TX | |
| 8400 | 8402 | NETIF_F_HW_VLAN_CTAG_RX | |
| 8401 | 8403 | NETIF_F_HW_VLAN_CTAG_FILTER | |
| @@ -373,7 +373,6 @@ static i40e_status i40e_init_asq(struct i40e_hw *hw) · 372 unmodified lines | ||
| 373 | 373 | |
| 374 | 374 | hw->aq.asq.next_to_use = 0; |
| 375 | 375 | hw->aq.asq.next_to_clean = 0; |
| 376 | − hw->aq.asq.count = hw->aq.num_asq_entries; | |
| 377 | 376 | |
| 378 | 377 | /* allocate the ring memory */ |
| 379 | 378 | ret_code = i40e_alloc_adminq_asq_ring(hw); |
| @@ -391,6 +390,7 @@ static i40e_status i40e_init_asq(struct i40e_hw *hw) · 11 unmodified lines | ||
| 391 | 390 | goto init_adminq_free_rings; |
| 392 | 391 | |
| 393 | 392 | /* success! */ |
| 393 | + hw->aq.asq.count = hw->aq.num_asq_entries; | |
| 394 | 394 | goto init_adminq_exit; |
| 395 | 395 | |
| 396 | 396 | init_adminq_free_rings: |
| @@ -432,7 +432,6 @@ static i40e_status i40e_init_arq(struct i40e_hw *hw) · 35 unmodified lines | ||
| 432 | 432 | |
| 433 | 433 | hw->aq.arq.next_to_use = 0; |
| 434 | 434 | hw->aq.arq.next_to_clean = 0; |
| 435 | − hw->aq.arq.count = hw->aq.num_arq_entries; | |
| 436 | 435 | |
| 437 | 436 | /* allocate the ring memory */ |
| 438 | 437 | ret_code = i40e_alloc_adminq_arq_ring(hw); |
| @@ -450,6 +449,7 @@ static i40e_status i40e_init_arq(struct i40e_hw *hw) · 11 unmodified lines | ||
| 450 | 449 | goto init_adminq_free_rings; |
| 451 | 450 | |
| 452 | 451 | /* success! */ |
| 452 | + hw->aq.arq.count = hw->aq.num_arq_entries; | |
| 453 | 453 | goto init_adminq_exit; |
| 454 | 454 | |
| 455 | 455 | init_adminq_free_rings: |
| @@ -1364,6 +1364,10 @@ int mlx4_test_interrupts(struct mlx4_dev *dev) · 1363 unmodified lines | ||
| 1364 | 1364 | * and performing a NOP command |
| 1365 | 1365 | */ |
| 1366 | 1366 | for(i = 0; !err && (i < dev->caps.num_comp_vectors); ++i) { |
| 1367 | + /* Make sure request_irq was called */ | |
| 1368 | + if (!priv->eq_table.eq[i].have_irq) | |
| 1369 | + continue; | |
| 1370 | + | |
| 1367 | 1371 | /* Temporary use polling for command completions */ |
| 1368 | 1372 | mlx4_cmd_use_polling(dev); |
| 1369 | 1373 | |
| @@ -2669,14 +2669,11 @@ static void mlx4_enable_msi_x(struct mlx4_dev *dev) · 2668 unmodified lines | ||
| 2669 | 2669 | |
| 2670 | 2670 | if (msi_x) { |
| 2671 | 2671 | int nreq = dev->caps.num_ports * num_online_cpus() + 1; |
| 2672 | − bool shared_ports = false; | |
| 2673 | 2672 | |
| 2674 | 2673 | nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs, |
| 2675 | 2674 | nreq); |
| 2676 | − if (nreq > MAX_MSIX) { | |
| 2675 | + if (nreq > MAX_MSIX) | |
| 2677 | 2676 | nreq = MAX_MSIX; |
| 2678 | − shared_ports = true; | |
| 2679 | − } | |
| 2680 | 2677 | |
| 2681 | 2678 | entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL); |
| 2682 | 2679 | if (!entries) |
| @@ -2699,9 +2696,6 @@ static void mlx4_enable_msi_x(struct mlx4_dev *dev) · 16 unmodified lines | ||
| 2699 | 2696 | bitmap_zero(priv->eq_table.eq[MLX4_EQ_ASYNC].actv_ports.ports, |
| 2700 | 2697 | dev->caps.num_ports); |
| 2701 | 2698 | |
| 2702 | − if (MLX4_IS_LEGACY_EQ_MODE(dev->caps)) | |
| 2703 | − shared_ports = true; | |
| 2704 | − | |
| 2705 | 2699 | for (i = 0; i < dev->caps.num_comp_vectors + 1; i++) { |
| 2706 | 2700 | if (i == MLX4_EQ_ASYNC) |
| 2707 | 2701 | continue; |
| @@ -2709,7 +2703,7 @@ static void mlx4_enable_msi_x(struct mlx4_dev *dev) · 1 unmodified line | ||
| 2709 | 2703 | priv->eq_table.eq[i].irq = |
| 2710 | 2704 | entries[i + 1 - !!(i > MLX4_EQ_ASYNC)].vector; |
| 2711 | 2705 | |
| 2712 | − if (shared_ports) { | |
| 2706 | + if (MLX4_IS_LEGACY_EQ_MODE(dev->caps)) { | |
| 2713 | 2707 | bitmap_fill(priv->eq_table.eq[i].actv_ports.ports, |
| 2714 | 2708 | dev->caps.num_ports); |
| 2715 | 2709 | /* We don't set affinity hint when there |
| @@ -598,6 +598,8 @@ void mlx5e_enable_vlan_filter(struct mlx5e_priv *priv) · 597 unmodified lines | ||
| 598 | 598 | return; |
| 599 | 599 | |
| 600 | 600 | priv->vlan.filter_disabled = false; |
| 601 | + if (priv->netdev->flags & IFF_PROMISC) | |
| 602 | + return; | |
| 601 | 603 | mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_VID, 0); |
| 602 | 604 | } |
| 603 | 605 | |
| @@ -607,6 +609,8 @@ void mlx5e_disable_vlan_filter(struct mlx5e_priv *priv) · 3 unmodified lines | ||
| 607 | 609 | return; |
| 608 | 610 | |
| 609 | 611 | priv->vlan.filter_disabled = true; |
| 612 | + if (priv->netdev->flags & IFF_PROMISC) | |
| 613 | + return; | |
| 610 | 614 | mlx5e_add_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_VID, 0); |
| 611 | 615 | } |
| 612 | 616 | |
| @@ -717,8 +721,12 @@ void mlx5e_set_rx_mode_work(struct work_struct *work) · 104 unmodified lines | ||
| 717 | 721 | bool enable_broadcast = !ea->broadcast_enabled && broadcast_enabled; |
| 718 | 722 | bool disable_broadcast = ea->broadcast_enabled && !broadcast_enabled; |
| 719 | 723 | |
| 720 | − if (enable_promisc) | |
| 724 | + if (enable_promisc) { | |
| 721 | 725 | mlx5e_add_eth_addr_rule(priv, &ea->promisc, MLX5E_PROMISC); |
| 726 | + if (!priv->vlan.filter_disabled) | |
| 727 | + mlx5e_add_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_VID, | |
| 728 | + 0); | |
| 729 | + } | |
| 722 | 730 | if (enable_allmulti) |
| 723 | 731 | mlx5e_add_eth_addr_rule(priv, &ea->allmulti, MLX5E_ALLMULTI); |
| 724 | 732 | if (enable_broadcast) |
| @@ -730,8 +738,12 @@ void mlx5e_set_rx_mode_work(struct work_struct *work) · 5 unmodified lines | ||
| 730 | 738 | mlx5e_del_eth_addr_from_flow_table(priv, &ea->broadcast); |
| 731 | 739 | if (disable_allmulti) |
| 732 | 740 | mlx5e_del_eth_addr_from_flow_table(priv, &ea->allmulti); |
| 733 | − if (disable_promisc) | |
| 741 | + if (disable_promisc) { | |
| 742 | + if (!priv->vlan.filter_disabled) | |
| 743 | + mlx5e_del_vlan_rule(priv, MLX5E_VLAN_RULE_TYPE_ANY_VID, | |
| 744 | + 0); | |
| 734 | 745 | mlx5e_del_eth_addr_from_flow_table(priv, &ea->promisc); |
| 746 | + } | |
| 735 | 747 | |
| 736 | 748 | ea->promisc_enabled = promisc_enabled; |
| 737 | 749 | ea->allmulti_enabled = allmulti_enabled; |
| @@ -311,7 +311,7 @@ static int mlx5_query_port_pvlc(struct mlx5_core_dev *dev, u32 *pvlc, · 310 unmodified lines | ||
| 311 | 311 | int err; |
| 312 | 312 | |
| 313 | 313 | memset(in, 0, sizeof(in)); |
| 314 | − MLX5_SET(ptys_reg, in, local_port, local_port); | |
| 314 | + MLX5_SET(pvlc_reg, in, local_port, local_port); | |
| 315 | 315 | |
| 316 | 316 | err = mlx5_core_access_reg(dev, in, sizeof(in), pvlc, |
| 317 | 317 | pvlc_size, MLX5_REG_PVLC, 0, 0); |
| @@ -374,26 +374,31 @@ static int __mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core, · 373 unmodified lines | ||
| 374 | 374 | int err; |
| 375 | 375 | int ret; |
| 376 | 376 | |
| 377 | + mlxsw_core->emad.trans_active = true; | |
| 378 | + | |
| 377 | 379 | err = mlxsw_core_skb_transmit(mlxsw_core->driver_priv, skb, tx_info); |
| 378 | 380 | if (err) { |
| 379 | 381 | dev_err(mlxsw_core->bus_info->dev, "Failed to transmit EMAD (tid=%llx)\n", |
| 380 | 382 | mlxsw_core->emad.tid); |
| 381 | 383 | dev_kfree_skb(skb); |
| 382 | − return err; | |
| 384 | + goto trans_inactive_out; | |
| 383 | 385 | } |
| 384 | 386 | |
| 385 | − mlxsw_core->emad.trans_active = true; | |
| 386 | 387 | ret = wait_event_timeout(mlxsw_core->emad.wait, |
| 387 | 388 | !(mlxsw_core->emad.trans_active), |
| 388 | 389 | msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS)); |
| 389 | 390 | if (!ret) { |
| 390 | 391 | dev_warn(mlxsw_core->bus_info->dev, "EMAD timed-out (tid=%llx)\n", |
| 391 | 392 | mlxsw_core->emad.tid); |
| 392 | − mlxsw_core->emad.trans_active = false; | |
| 393 | − return -EIO; | |
| 393 | + err = -EIO; | |
| 394 | + goto trans_inactive_out; | |
| 394 | 395 | } |
| 395 | 396 | |
| 396 | 397 | return 0; |
| 398 | + | |
| 399 | +trans_inactive_out: | |
| 400 | + mlxsw_core->emad.trans_active = false; | |
| 401 | + return err; | |
| 397 | 402 | } |
| 398 | 403 | |
| 399 | 404 | static int mlxsw_emad_process_status(struct mlxsw_core *mlxsw_core, |
| @@ -187,6 +187,7 @@ __mlxsw_item_bit_array_offset(struct mlxsw_item *item, u16 index, u8 *shift) · 186 unmodified lines | ||
| 187 | 187 | { |
| 188 | 188 | u16 max_index, be_index; |
| 189 | 189 | u16 offset; /* byte offset inside the array */ |
| 190 | + u8 in_byte_index; | |
| 190 | 191 | |
| 191 | 192 | BUG_ON(index && !item->element_size); |
| 192 | 193 | if (item->offset % sizeof(u32) != 0 || |
| @@ -199,7 +200,8 @@ __mlxsw_item_bit_array_offset(struct mlxsw_item *item, u16 index, u8 *shift) · 6 unmodified lines | ||
| 199 | 200 | max_index = (item->size.bytes << 3) / item->element_size - 1; |
| 200 | 201 | be_index = max_index - index; |
| 201 | 202 | offset = be_index * item->element_size >> 3; |
| 202 | − *shift = index % (BITS_PER_BYTE / item->element_size) << 1; | |
| 203 | + in_byte_index = index % (BITS_PER_BYTE / item->element_size); | |
| 204 | + *shift = in_byte_index * item->element_size; | |
| 203 | 205 | |
| 204 | 206 | return item->offset + offset; |
| 205 | 207 | } |
| @@ -1582,11 +1582,11 @@ static int mlxsw_pci_cmd_exec(void *bus_priv, u16 opcode, u8 opcode_mod, · 1581 unmodified lines | ||
| 1582 | 1582 | |
| 1583 | 1583 | if (in_mbox) |
| 1584 | 1584 | memcpy(mlxsw_pci->cmd.in_mbox.buf, in_mbox, in_mbox_size); |
| 1585 | − mlxsw_pci_write32(mlxsw_pci, CIR_IN_PARAM_HI, in_mapaddr >> 32); | |
| 1586 | − mlxsw_pci_write32(mlxsw_pci, CIR_IN_PARAM_LO, in_mapaddr); | |
| 1585 | + mlxsw_pci_write32(mlxsw_pci, CIR_IN_PARAM_HI, upper_32_bits(in_mapaddr)); | |
| 1586 | + mlxsw_pci_write32(mlxsw_pci, CIR_IN_PARAM_LO, lower_32_bits(in_mapaddr)); | |
| 1587 | 1587 | |
| 1588 | − mlxsw_pci_write32(mlxsw_pci, CIR_OUT_PARAM_HI, out_mapaddr >> 32); | |
| 1589 | − mlxsw_pci_write32(mlxsw_pci, CIR_OUT_PARAM_LO, out_mapaddr); | |
| 1588 | + mlxsw_pci_write32(mlxsw_pci, CIR_OUT_PARAM_HI, upper_32_bits(out_mapaddr)); | |
| 1589 | + mlxsw_pci_write32(mlxsw_pci, CIR_OUT_PARAM_LO, lower_32_bits(out_mapaddr)); | |
| 1590 | 1590 | |
| 1591 | 1591 | mlxsw_pci_write32(mlxsw_pci, CIR_IN_MODIFIER, in_mod); |
| 1592 | 1592 | mlxsw_pci_write32(mlxsw_pci, CIR_TOKEN, 0); |
| @@ -1069,9 +1069,9 @@ static int mlxsw_sx_port_create(struct mlxsw_sx *mlxsw_sx, u8 local_port) · 1068 unmodified lines | ||
| 1069 | 1069 | return 0; |
| 1070 | 1070 | |
| 1071 | 1071 | err_register_netdev: |
| 1072 | −err_port_admin_status_set: | |
| 1073 | 1072 | err_port_mac_learning_mode_set: |
| 1074 | 1073 | err_port_stp_state_set: |
| 1074 | +err_port_admin_status_set: | |
| 1075 | 1075 | err_port_mtu_set: |
| 1076 | 1076 | err_port_speed_set: |
| 1077 | 1077 | err_port_swid_set: |
| @@ -476,13 +476,12 @@ static void __lpc_get_mac(struct netdata_local *pldat, u8 *mac) · 475 unmodified lines | ||
| 476 | 476 | mac[5] = tmp >> 8; |
| 477 | 477 | } |
| 478 | 478 | |
| 479 | −static void __lpc_eth_clock_enable(struct netdata_local *pldat, | |
| 480 | − bool enable) | |
| 479 | +static void __lpc_eth_clock_enable(struct netdata_local *pldat, bool enable) | |
| 481 | 480 | { |
| 482 | 481 | if (enable) |
| 483 | − clk_enable(pldat->clk); | |
| 482 | + clk_prepare_enable(pldat->clk); | |
| 484 | 483 | else |
| 485 | − clk_disable(pldat->clk); | |
| 484 | + clk_disable_unprepare(pldat->clk); | |
| 486 | 485 | } |
| 487 | 486 | |
| 488 | 487 | static void __lpc_params_setup(struct netdata_local *pldat) |
| @@ -1494,7 +1493,7 @@ err_out_free_irq: · 1005 unmodified lines | ||
| 1494 | 1493 | err_out_iounmap: |
| 1495 | 1494 | iounmap(pldat->net_base); |
| 1496 | 1495 | err_out_disable_clocks: |
| 1497 | − clk_disable(pldat->clk); | |
| 1496 | + clk_disable_unprepare(pldat->clk); | |
| 1498 | 1497 | clk_put(pldat->clk); |
| 1499 | 1498 | err_out_free_dev: |
| 1500 | 1499 | free_netdev(ndev); |
| @@ -1519,7 +1518,7 @@ static int lpc_eth_drv_remove(struct platform_device *pdev) · 18 unmodified lines | ||
| 1519 | 1518 | iounmap(pldat->net_base); |
| 1520 | 1519 | mdiobus_unregister(pldat->mii_bus); |
| 1521 | 1520 | mdiobus_free(pldat->mii_bus); |
| 1522 | − clk_disable(pldat->clk); | |
| 1521 | + clk_disable_unprepare(pldat->clk); | |
| 1523 | 1522 | clk_put(pldat->clk); |
| 1524 | 1523 | free_netdev(ndev); |
| 1525 | 1524 | |
| @@ -1540,7 +1539,7 @@ static int lpc_eth_drv_suspend(struct platform_device *pdev, · 14 unmodified lines | ||
| 1540 | 1539 | if (netif_running(ndev)) { |
| 1541 | 1540 | netif_device_detach(ndev); |
| 1542 | 1541 | __lpc_eth_shutdown(pldat); |
| 1543 | − clk_disable(pldat->clk); | |
| 1542 | + clk_disable_unprepare(pldat->clk); | |
| 1544 | 1543 | |
| 1545 | 1544 | /* |
| 1546 | 1545 | * Reset again now clock is disable to be sure |
| @@ -2134,10 +2134,11 @@ static int rhine_rx(struct net_device *dev, int limit) · 2133 unmodified lines | ||
| 2134 | 2134 | } |
| 2135 | 2135 | |
| 2136 | 2136 | skb_put(skb, pkt_len); |
| 2137 | − skb->protocol = eth_type_trans(skb, dev); | |
| 2138 | 2137 | |
| 2139 | 2138 | rhine_rx_vlan_tag(skb, desc, data_size); |
| 2140 | 2139 | |
| 2140 | + skb->protocol = eth_type_trans(skb, dev); | |
| 2141 | + | |
| 2141 | 2142 | netif_receive_skb(skb); |
| 2142 | 2143 | |
| 2143 | 2144 | u64_stats_update_begin(&rp->rx_stats.syncp); |
| @@ -870,14 +870,14 @@ static int geneve_newlink(struct net *net, struct net_device *dev, · 869 unmodified lines | ||
| 870 | 870 | __be16 dst_port = htons(GENEVE_UDP_PORT); |
| 871 | 871 | __u8 ttl = 0, tos = 0; |
| 872 | 872 | bool metadata = false; |
| 873 | − __be32 rem_addr; | |
| 874 | − __u32 vni; | |
| 873 | + __be32 rem_addr = 0; | |
| 874 | + __u32 vni = 0; | |
| 875 | 875 | |
| 876 | − if (!data[IFLA_GENEVE_ID] || !data[IFLA_GENEVE_REMOTE]) | |
| 877 | − return -EINVAL; | |
| 876 | + if (data[IFLA_GENEVE_ID]) | |
| 877 | + vni = nla_get_u32(data[IFLA_GENEVE_ID]); | |
| 878 | 878 | |
| 879 | − vni = nla_get_u32(data[IFLA_GENEVE_ID]); | |
| 880 | − rem_addr = nla_get_in_addr(data[IFLA_GENEVE_REMOTE]); | |
| 879 | + if (data[IFLA_GENEVE_REMOTE]) | |
| 880 | + rem_addr = nla_get_in_addr(data[IFLA_GENEVE_REMOTE]); | |
| 881 | 881 | |
| 882 | 882 | if (data[IFLA_GENEVE_TTL]) |
| 883 | 883 | ttl = nla_get_u8(data[IFLA_GENEVE_TTL]); |
| @@ -168,8 +168,6 @@ config MDIO_OCTEON · 167 unmodified lines | ||
| 168 | 168 | busses. It is required by the Octeon and ThunderX ethernet device |
| 169 | 169 | drivers. |
| 170 | 170 | |
| 171 | − If in doubt, say Y. | |
| 172 | − | |
| 173 | 171 | config MDIO_SUN4I |
| 174 | 172 | tristate "Allwinner sun4i MDIO interface support" |
| 175 | 173 | depends on ARCH_SUNXI |
| @@ -313,7 +313,6 @@ static void pppoe_flush_dev(struct net_device *dev) · 312 unmodified lines | ||
| 313 | 313 | if (po->pppoe_dev == dev && |
| 314 | 314 | sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND | PPPOX_ZOMBIE)) { |
| 315 | 315 | pppox_unbind_sock(sk); |
| 316 | − sk->sk_state = PPPOX_ZOMBIE; | |
| 317 | 316 | sk->sk_state_change(sk); |
| 318 | 317 | po->pppoe_dev = NULL; |
| 319 | 318 | dev_put(dev); |
| @@ -164,6 +164,7 @@ config USB_NET_AX8817X · 163 unmodified lines | ||
| 164 | 164 | * Aten UC210T |
| 165 | 165 | * ASIX AX88172 |
| 166 | 166 | * Billionton Systems, USB2AR |
| 167 | + * Billionton Systems, GUSB2AM-1G-B | |
| 167 | 168 | * Buffalo LUA-U2-KTX |
| 168 | 169 | * Corega FEther USB2-TX |
| 169 | 170 | * D-Link DUB-E100 |
| @@ -91,8 +91,10 @@ int asix_rx_fixup_internal(struct usbnet *dev, struct sk_buff *skb, · 90 unmodified lines | ||
| 91 | 91 | } |
| 92 | 92 | rx->ax_skb = netdev_alloc_skb_ip_align(dev->net, |
| 93 | 93 | rx->size); |
| 94 | − if (!rx->ax_skb) | |
| 94 | + if (!rx->ax_skb) { | |
| 95 | + rx->size = 0; | |
| 95 | 96 | return 0; |
| 97 | + } | |
| 96 | 98 | } |
| 97 | 99 | |
| 98 | 100 | if (rx->size > dev->net->mtu + ETH_HLEN + VLAN_HLEN) { |
| @@ -958,6 +958,10 @@ static const struct usb_device_id products [] = { · 957 unmodified lines | ||
| 958 | 958 | // Billionton Systems, USB2AR |
| 959 | 959 | USB_DEVICE (0x08dd, 0x90ff), |
| 960 | 960 | .driver_info = (unsigned long) &ax8817x_info, |
| 961 | +}, { | |
| 962 | + // Billionton Systems, GUSB2AM-1G-B | |
| 963 | + USB_DEVICE(0x08dd, 0x0114), | |
| 964 | + .driver_info = (unsigned long) &ax88178_info, | |
| 961 | 965 | }, { |
| 962 | 966 | // ATEN UC210T |
| 963 | 967 | USB_DEVICE (0x0557, 0x2009), |
| @@ -2745,11 +2745,10 @@ static int vxlan_newlink(struct net *src_net, struct net_device *dev, · 2744 unmodified lines | ||
| 2745 | 2745 | struct vxlan_config conf; |
| 2746 | 2746 | int err; |
| 2747 | 2747 | |
| 2748 | − if (!data[IFLA_VXLAN_ID]) | |
| 2749 | − return -EINVAL; | |
| 2750 | − | |
| 2751 | 2748 | memset(&conf, 0, sizeof(conf)); |
| 2752 | − conf.vni = nla_get_u32(data[IFLA_VXLAN_ID]); | |
| 2749 | + | |
| 2750 | + if (data[IFLA_VXLAN_ID]) | |
| 2751 | + conf.vni = nla_get_u32(data[IFLA_VXLAN_ID]); | |
| 2753 | 2752 | |
| 2754 | 2753 | if (data[IFLA_VXLAN_GROUP]) { |
| 2755 | 2754 | conf.remote_ip.sin.sin_addr.s_addr = nla_get_in_addr(data[IFLA_VXLAN_GROUP]); |
| @@ -337,7 +337,7 @@ enum ath10k_hw_rate_cck { · 336 unmodified lines | ||
| 337 | 337 | #define TARGET_10X_MAX_FRAG_ENTRIES 0 |
| 338 | 338 | |
| 339 | 339 | /* 10.2 parameters */ |
| 340 | −#define TARGET_10_2_DMA_BURST_SIZE 1 | |
| 340 | +#define TARGET_10_2_DMA_BURST_SIZE 0 | |
| 341 | 341 | |
| 342 | 342 | /* Target specific defines for WMI-TLV firmware */ |
| 343 | 343 | #define TARGET_TLV_NUM_VDEVS 4 |
| @@ -391,7 +391,7 @@ enum ath10k_hw_rate_cck { · 47 unmodified lines | ||
| 391 | 391 | |
| 392 | 392 | #define TARGET_10_4_TX_DBG_LOG_SIZE 1024 |
| 393 | 393 | #define TARGET_10_4_NUM_WDS_ENTRIES 32 |
| 394 | −#define TARGET_10_4_DMA_BURST_SIZE 1 | |
| 394 | +#define TARGET_10_4_DMA_BURST_SIZE 0 | |
| 395 | 395 | #define TARGET_10_4_MAC_AGGR_DELIM 0 |
| 396 | 396 | #define TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK 1 |
| 397 | 397 | #define TARGET_10_4_VOW_CONFIG 0 |
| @@ -880,6 +880,7 @@ static void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) · 879 unmodified lines | ||
| 880 | 880 | hw->max_rate_tries = 10; |
| 881 | 881 | hw->sta_data_size = sizeof(struct ath_node); |
| 882 | 882 | hw->vif_data_size = sizeof(struct ath_vif); |
| 883 | + hw->extra_tx_headroom = 4; | |
| 883 | 884 | |
| 884 | 885 | hw->wiphy->available_antennas_rx = BIT(ah->caps.max_rxchains) - 1; |
| 885 | 886 | hw->wiphy->available_antennas_tx = BIT(ah->caps.max_txchains) - 1; |
| @@ -120,6 +120,7 @@ MODULE_PARM_DESC(allhwsupport, "Enable support for all hardware (even it if over · 119 unmodified lines | ||
| 120 | 120 | #ifdef CONFIG_B43_BCMA |
| 121 | 121 | static const struct bcma_device_id b43_bcma_tbl[] = { |
| 122 | 122 | BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_80211, 0x11, BCMA_ANY_CLASS), |
| 123 | + BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_80211, 0x15, BCMA_ANY_CLASS), | |
| 123 | 124 | BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_80211, 0x17, BCMA_ANY_CLASS), |
| 124 | 125 | BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_80211, 0x18, BCMA_ANY_CLASS), |
| 125 | 126 | BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_80211, 0x1C, BCMA_ANY_CLASS), |
| @@ -1020,7 +1020,7 @@ static void iwlagn_wowlan_program_keys(struct ieee80211_hw *hw, · 1019 unmodified lines | ||
| 1020 | 1020 | u8 *pn = seq.ccmp.pn; |
| 1021 | 1021 | |
| 1022 | 1022 | ieee80211_get_key_rx_seq(key, i, &seq); |
| 1023 | − aes_sc->pn = cpu_to_le64( | |
| 1023 | + aes_sc[i].pn = cpu_to_le64( | |
| 1024 | 1024 | (u64)pn[5] | |
| 1025 | 1025 | ((u64)pn[4] << 8) | |
| 1026 | 1026 | ((u64)pn[3] << 16) | |
| @@ -348,6 +348,6 @@ const struct iwl_cfg iwl7265d_n_cfg = { · 347 unmodified lines | ||
| 348 | 348 | }; |
| 349 | 349 | |
| 350 | 350 | MODULE_FIRMWARE(IWL7260_MODULE_FIRMWARE(IWL7260_UCODE_API_OK)); |
| 351 | −MODULE_FIRMWARE(IWL3160_MODULE_FIRMWARE(IWL3160_UCODE_API_OK)); | |
| 351 | +MODULE_FIRMWARE(IWL3160_MODULE_FIRMWARE(IWL7260_UCODE_API_OK)); | |
| 352 | 352 | MODULE_FIRMWARE(IWL7265_MODULE_FIRMWARE(IWL7260_UCODE_API_OK)); |
| 353 | 353 | MODULE_FIRMWARE(IWL7265D_MODULE_FIRMWARE(IWL7260_UCODE_API_OK)); |
| @@ -274,18 +274,13 @@ static void iwl_mvm_wowlan_program_keys(struct ieee80211_hw *hw, · 273 unmodified lines | ||
| 274 | 274 | break; |
| 275 | 275 | case WLAN_CIPHER_SUITE_CCMP: |
| 276 | 276 | if (sta) { |
| 277 | − u8 *pn = seq.ccmp.pn; | |
| 277 | + u64 pn64; | |
| 278 | 278 | |
| 279 | 279 | aes_sc = data->rsc_tsc->all_tsc_rsc.aes.unicast_rsc; |
| 280 | 280 | aes_tx_sc = &data->rsc_tsc->all_tsc_rsc.aes.tsc; |
| 281 | 281 | |
| 282 | − ieee80211_get_key_tx_seq(key, &seq); | |
| 283 | − aes_tx_sc->pn = cpu_to_le64((u64)pn[5] | | |
| 284 | − ((u64)pn[4] << 8) | | |
| 285 | − ((u64)pn[3] << 16) | | |
| 286 | − ((u64)pn[2] << 24) | | |
| 287 | − ((u64)pn[1] << 32) | | |
| 288 | − ((u64)pn[0] << 40)); | |
| 282 | + pn64 = atomic64_read(&key->tx_pn); | |
| 283 | + aes_tx_sc->pn = cpu_to_le64(pn64); | |
| 289 | 284 | } else { |
| 290 | 285 | aes_sc = data->rsc_tsc->all_tsc_rsc.aes.multicast_rsc; |
| 291 | 286 | } |
| @@ -298,12 +293,12 @@ static void iwl_mvm_wowlan_program_keys(struct ieee80211_hw *hw, · 6 unmodified lines | ||
| 298 | 293 | u8 *pn = seq.ccmp.pn; |
| 299 | 294 | |
| 300 | 295 | ieee80211_get_key_rx_seq(key, i, &seq); |
| 301 | − aes_sc->pn = cpu_to_le64((u64)pn[5] | | |
| 302 | − ((u64)pn[4] << 8) | | |
| 303 | − ((u64)pn[3] << 16) | | |
| 304 | − ((u64)pn[2] << 24) | | |
| 305 | − ((u64)pn[1] << 32) | | |
| 306 | − ((u64)pn[0] << 40)); | |
| 296 | + aes_sc[i].pn = cpu_to_le64((u64)pn[5] | | |
| 297 | + ((u64)pn[4] << 8) | | |
| 298 | + ((u64)pn[3] << 16) | | |
| 299 | + ((u64)pn[2] << 24) | | |
| 300 | + ((u64)pn[1] << 32) | | |
| 301 | + ((u64)pn[0] << 40)); | |
| 307 | 302 | } |
| 308 | 303 | data->use_rsc_tsc = true; |
| 309 | 304 | break; |
| @@ -1453,15 +1448,15 @@ static void iwl_mvm_d3_update_gtks(struct ieee80211_hw *hw, · 1143 unmodified lines | ||
| 1453 | 1448 | |
| 1454 | 1449 | switch (key->cipher) { |
| 1455 | 1450 | case WLAN_CIPHER_SUITE_CCMP: |
| 1456 | − iwl_mvm_aes_sc_to_seq(&sc->aes.tsc, &seq); | |
| 1457 | 1451 | iwl_mvm_set_aes_rx_seq(sc->aes.unicast_rsc, key); |
| 1452 | + atomic64_set(&key->tx_pn, le64_to_cpu(sc->aes.tsc.pn)); | |
| 1458 | 1453 | break; |
| 1459 | 1454 | case WLAN_CIPHER_SUITE_TKIP: |
| 1460 | 1455 | iwl_mvm_tkip_sc_to_seq(&sc->tkip.tsc, &seq); |
| 1461 | 1456 | iwl_mvm_set_tkip_rx_seq(sc->tkip.unicast_rsc, key); |
| 1457 | + ieee80211_set_key_tx_seq(key, &seq); | |
| 1462 | 1458 | break; |
| 1463 | 1459 | } |
| 1464 | − ieee80211_set_key_tx_seq(key, &seq); | |
| 1465 | 1460 | |
| 1466 | 1461 | /* that's it for this key */ |
| 1467 | 1462 | return; |
| @@ -703,7 +703,7 @@ int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) · 702 unmodified lines | ||
| 703 | 703 | * abort after reading the nvm in case RF Kill is on, we will complete |
| 704 | 704 | * the init seq later when RF kill will switch to off |
| 705 | 705 | */ |
| 706 | − if (iwl_mvm_is_radio_killed(mvm)) { | |
| 706 | + if (iwl_mvm_is_radio_hw_killed(mvm)) { | |
| 707 | 707 | IWL_DEBUG_RF_KILL(mvm, |
| 708 | 708 | "jump over all phy activities due to RF kill\n"); |
| 709 | 709 | iwl_remove_notification(&mvm->notif_wait, &calib_wait); |
| @@ -736,7 +736,7 @@ int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) · 26 unmodified lines | ||
| 736 | 736 | ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait, |
| 737 | 737 | MVM_UCODE_CALIB_TIMEOUT); |
| 738 | 738 | |
| 739 | − if (ret && iwl_mvm_is_radio_killed(mvm)) { | |
| 739 | + if (ret && iwl_mvm_is_radio_hw_killed(mvm)) { | |
| 740 | 740 | IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n"); |
| 741 | 741 | ret = 1; |
| 742 | 742 | } |
| @@ -2388,6 +2388,7 @@ static void iwl_mvm_stop_ap_ibss(struct ieee80211_hw *hw, · 2387 unmodified lines | ||
| 2388 | 2388 | iwl_mvm_remove_time_event(mvm, mvmvif, |
| 2389 | 2389 | &mvmvif->time_event_data); |
| 2390 | 2390 | RCU_INIT_POINTER(mvm->csa_vif, NULL); |
| 2391 | + mvmvif->csa_countdown = false; | |
| 2391 | 2392 | } |
| 2392 | 2393 | |
| 2393 | 2394 | if (rcu_access_pointer(mvm->csa_tx_blocked_vif) == vif) { |
| @@ -860,6 +860,11 @@ static inline bool iwl_mvm_is_radio_killed(struct iwl_mvm *mvm) · 859 unmodified lines | ||
| 860 | 860 | test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status); |
| 861 | 861 | } |
| 862 | 862 | |
| 863 | +static inline bool iwl_mvm_is_radio_hw_killed(struct iwl_mvm *mvm) | |
| 864 | +{ | |
| 865 | + return test_bit(IWL_MVM_STATUS_HW_RFKILL, &mvm->status); | |
| 866 | +} | |
| 867 | + | |
| 863 | 868 | /* Must be called with rcu_read_lock() held and it can only be |
| 864 | 869 | * released when mvmsta is not needed anymore. |
| 865 | 870 | */ |
| @@ -590,6 +590,7 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, · 589 unmodified lines | ||
| 590 | 590 | ieee80211_unregister_hw(mvm->hw); |
| 591 | 591 | iwl_mvm_leds_exit(mvm); |
| 592 | 592 | out_free: |
| 593 | + flush_delayed_work(&mvm->fw_dump_wk); | |
| 593 | 594 | iwl_phy_db_free(mvm->phy_db); |
| 594 | 595 | kfree(mvm->scan_cmd); |
| 595 | 596 | if (!cfg->no_power_up_nic_in_init || !mvm->nvm_file_name) |
| @@ -414,6 +414,11 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 413 unmodified lines | ||
| 414 | 414 | {IWL_PCI_DEVICE(0x095A, 0x5590, iwl7265_2ac_cfg)}, |
| 415 | 415 | {IWL_PCI_DEVICE(0x095B, 0x5290, iwl7265_2ac_cfg)}, |
| 416 | 416 | {IWL_PCI_DEVICE(0x095A, 0x5490, iwl7265_2ac_cfg)}, |
| 417 | + {IWL_PCI_DEVICE(0x095A, 0x5F10, iwl7265_2ac_cfg)}, | |
| 418 | + {IWL_PCI_DEVICE(0x095B, 0x5212, iwl7265_2ac_cfg)}, | |
| 419 | + {IWL_PCI_DEVICE(0x095B, 0x520A, iwl7265_2ac_cfg)}, | |
| 420 | + {IWL_PCI_DEVICE(0x095A, 0x9000, iwl7265_2ac_cfg)}, | |
| 421 | + {IWL_PCI_DEVICE(0x095A, 0x9400, iwl7265_2ac_cfg)}, | |
| 417 | 422 | |
| 418 | 423 | /* 8000 Series */ |
| 419 | 424 | {IWL_PCI_DEVICE(0x24F3, 0x0010, iwl8260_2ac_cfg)}, |
| @@ -1114,6 +1114,7 @@ static struct usb_device_id rt2800usb_device_table[] = { · 1113 unmodified lines | ||
| 1114 | 1114 | { USB_DEVICE(0x0db0, 0x871c) }, |
| 1115 | 1115 | { USB_DEVICE(0x0db0, 0x899a) }, |
| 1116 | 1116 | /* Ovislink */ |
| 1117 | + { USB_DEVICE(0x1b75, 0x3070) }, | |
| 1117 | 1118 | { USB_DEVICE(0x1b75, 0x3071) }, |
| 1118 | 1119 | { USB_DEVICE(0x1b75, 0x3072) }, |
| 1119 | 1120 | { USB_DEVICE(0x1b75, 0xa200) }, |
| @@ -247,6 +247,8 @@ struct rtl_pci { · 246 unmodified lines | ||
| 247 | 247 | /* MSI support */ |
| 248 | 248 | bool msi_support; |
| 249 | 249 | bool using_msi; |
| 250 | + /* interrupt clear before set */ | |
| 251 | + bool int_clear; | |
| 250 | 252 | }; |
| 251 | 253 | |
| 252 | 254 | struct mp_adapter { |
| @@ -2253,11 +2253,28 @@ void rtl8821ae_set_qos(struct ieee80211_hw *hw, int aci) · 2252 unmodified lines | ||
| 2253 | 2253 | } |
| 2254 | 2254 | } |
| 2255 | 2255 | |
| 2256 | +static void rtl8821ae_clear_interrupt(struct ieee80211_hw *hw) | |
| 2257 | +{ | |
| 2258 | + struct rtl_priv *rtlpriv = rtl_priv(hw); | |
| 2259 | + u32 tmp = rtl_read_dword(rtlpriv, REG_HISR); | |
| 2260 | + | |
| 2261 | + rtl_write_dword(rtlpriv, REG_HISR, tmp); | |
| 2262 | + | |
| 2263 | + tmp = rtl_read_dword(rtlpriv, REG_HISRE); | |
| 2264 | + rtl_write_dword(rtlpriv, REG_HISRE, tmp); | |
| 2265 | + | |
| 2266 | + tmp = rtl_read_dword(rtlpriv, REG_HSISR); | |
| 2267 | + rtl_write_dword(rtlpriv, REG_HSISR, tmp); | |
| 2268 | +} | |
| 2269 | + | |
| 2256 | 2270 | void rtl8821ae_enable_interrupt(struct ieee80211_hw *hw) |
| 2257 | 2271 | { |
| 2258 | 2272 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 2259 | 2273 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); |
| 2260 | 2274 | |
| 2275 | + if (!rtlpci->int_clear) | |
| 2276 | + rtl8821ae_clear_interrupt(hw);/*clear it here first*/ | |
| 2277 | + | |
| 2261 | 2278 | rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] & 0xFFFFFFFF); |
| 2262 | 2279 | rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] & 0xFFFFFFFF); |
| 2263 | 2280 | rtlpci->irq_enabled = true; |
| @@ -96,6 +96,7 @@ int rtl8821ae_init_sw_vars(struct ieee80211_hw *hw) · 95 unmodified lines | ||
| 96 | 96 | |
| 97 | 97 | rtl8821ae_bt_reg_init(hw); |
| 98 | 98 | rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; |
| 99 | + rtlpci->int_clear = rtlpriv->cfg->mod_params->int_clear; | |
| 99 | 100 | rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer(); |
| 100 | 101 | |
| 101 | 102 | rtlpriv->dm.dm_initialgain_enable = 1; |
| @@ -167,6 +168,7 @@ int rtl8821ae_init_sw_vars(struct ieee80211_hw *hw) · 65 unmodified lines | ||
| 167 | 168 | rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; |
| 168 | 169 | rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; |
| 169 | 170 | rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; |
| 171 | + rtlpci->msi_support = rtlpriv->cfg->mod_params->int_clear; | |
| 170 | 172 | if (rtlpriv->cfg->mod_params->disable_watchdog) |
| 171 | 173 | pr_info("watchdog disabled\n"); |
| 172 | 174 | rtlpriv->psc.reg_fwctrl_lps = 3; |
| @@ -308,6 +310,7 @@ static struct rtl_mod_params rtl8821ae_mod_params = { · 135 unmodified lines | ||
| 308 | 310 | .swctrl_lps = false, |
| 309 | 311 | .fwctrl_lps = true, |
| 310 | 312 | .msi_support = true, |
| 313 | + .int_clear = true, | |
| 311 | 314 | .debug = DBG_EMERG, |
| 312 | 315 | .disable_watchdog = 0, |
| 313 | 316 | }; |
| @@ -437,6 +440,7 @@ module_param_named(fwlps, rtl8821ae_mod_params.fwctrl_lps, bool, 0444); · 123 unmodified lines | ||
| 437 | 440 | module_param_named(msi, rtl8821ae_mod_params.msi_support, bool, 0444); |
| 438 | 441 | module_param_named(disable_watchdog, rtl8821ae_mod_params.disable_watchdog, |
| 439 | 442 | bool, 0444); |
| 443 | +module_param_named(int_clear, rtl8821ae_mod_params.int_clear, bool, 0444); | |
| 440 | 444 | MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); |
| 441 | 445 | MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n"); |
| 442 | 446 | MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n"); |
| @@ -444,6 +448,7 @@ MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n"); · 1 unmodified line | ||
| 444 | 448 | MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 1)\n"); |
| 445 | 449 | MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)"); |
| 446 | 450 | MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n"); |
| 451 | +MODULE_PARM_DESC(int_clear, "Set to 1 to disable interrupt clear before set (default 0)\n"); | |
| 447 | 452 | |
| 448 | 453 | static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume); |
| 449 | 454 | |
| @@ -2249,6 +2249,9 @@ struct rtl_mod_params { · 2248 unmodified lines | ||
| 2249 | 2249 | |
| 2250 | 2250 | /* default 0: 1 means disable */ |
| 2251 | 2251 | bool disable_watchdog; |
| 2252 | + | |
| 2253 | + /* default 0: 1 means do not disable interrupts */ | |
| 2254 | + bool int_clear; | |
| 2252 | 2255 | }; |
| 2253 | 2256 | |
| 2254 | 2257 | struct rtl_hal_usbint_cfg { |
| @@ -788,6 +788,12 @@ static void connect(struct backend_info *be) · 787 unmodified lines | ||
| 788 | 788 | /* Use the number of queues requested by the frontend */ |
| 789 | 789 | be->vif->queues = vzalloc(requested_num_queues * |
| 790 | 790 | sizeof(struct xenvif_queue)); |
| 791 | + if (!be->vif->queues) { | |
| 792 | + xenbus_dev_fatal(dev, -ENOMEM, | |
| 793 | + "allocating queues"); | |
| 794 | + return; | |
| 795 | + } | |
| 796 | + | |
| 791 | 797 | be->vif->num_queues = requested_num_queues; |
| 792 | 798 | be->vif->stalled_queues = requested_num_queues; |
| 793 | 799 | |
| @@ -1243,6 +1243,10 @@ static void pci_msi_domain_update_chip_ops(struct msi_domain_info *info) · 1242 unmodified lines | ||
| 1243 | 1243 | BUG_ON(!chip); |
| 1244 | 1244 | if (!chip->irq_write_msi_msg) |
| 1245 | 1245 | chip->irq_write_msi_msg = pci_msi_domain_write_msg; |
| 1246 | + if (!chip->irq_mask) | |
| 1247 | + chip->irq_mask = pci_msi_mask_irq; | |
| 1248 | + if (!chip->irq_unmask) | |
| 1249 | + chip->irq_unmask = pci_msi_unmask_irq; | |
| 1246 | 1250 | } |
| 1247 | 1251 | |
| 1248 | 1252 | /** |
| @@ -823,9 +823,15 @@ static int of_pmu_irq_cfg(struct arm_pmu *pmu) · 822 unmodified lines | ||
| 823 | 823 | } |
| 824 | 824 | |
| 825 | 825 | /* Now look up the logical CPU number */ |
| 826 | − for_each_possible_cpu(cpu) | |
| 827 | − if (dn == of_cpu_device_node_get(cpu)) | |
| 826 | + for_each_possible_cpu(cpu) { | |
| 827 | + struct device_node *cpu_dn; | |
| 828 | + | |
| 829 | + cpu_dn = of_cpu_device_node_get(cpu); | |
| 830 | + of_node_put(cpu_dn); | |
| 831 | + | |
| 832 | + if (dn == cpu_dn) | |
| 828 | 833 | break; |
| 834 | + } | |
| 829 | 835 | |
| 830 | 836 | if (cpu >= nr_cpu_ids) { |
| 831 | 837 | pr_warn("Failed to find logical CPU for %s\n", |
| @@ -26,7 +26,8 @@ · 25 unmodified lines | ||
| 26 | 26 | #include "pinctrl-imx.h" |
| 27 | 27 | |
| 28 | 28 | enum imx25_pads { |
| 29 | − MX25_PAD_RESERVE0 = 1, | |
| 29 | + MX25_PAD_RESERVE0 = 0, | |
| 30 | + MX25_PAD_RESERVE1 = 1, | |
| 30 | 31 | MX25_PAD_A10 = 2, |
| 31 | 32 | MX25_PAD_A13 = 3, |
| 32 | 33 | MX25_PAD_A14 = 4, |
| @@ -169,6 +170,7 @@ enum imx25_pads { · 136 unmodified lines | ||
| 169 | 170 | /* Pad names for the pinmux subsystem */ |
| 170 | 171 | static const struct pinctrl_pin_desc imx25_pinctrl_pads[] = { |
| 171 | 172 | IMX_PINCTRL_PIN(MX25_PAD_RESERVE0), |
| 173 | + IMX_PINCTRL_PIN(MX25_PAD_RESERVE1), | |
| 172 | 174 | IMX_PINCTRL_PIN(MX25_PAD_A10), |
| 173 | 175 | IMX_PINCTRL_PIN(MX25_PAD_A13), |
| 174 | 176 | IMX_PINCTRL_PIN(MX25_PAD_A14), |
| @@ -653,7 +653,7 @@ static const struct sunxi_desc_pin sun5i_a10s_pins[] = { · 652 unmodified lines | ||
| 653 | 653 | SUNXI_FUNCTION(0x0, "gpio_in"), |
| 654 | 654 | SUNXI_FUNCTION(0x1, "gpio_out"), |
| 655 | 655 | SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */ |
| 656 | − SUNXI_FUNCTION(0x3, "uart3"), /* PWM1 */ | |
| 656 | + SUNXI_FUNCTION(0x3, "pwm"), /* PWM1 */ | |
| 657 | 657 | SUNXI_FUNCTION(0x5, "uart2"), /* CTS */ |
| 658 | 658 | SUNXI_FUNCTION_IRQ(0x6, 13)), /* EINT13 */ |
| 659 | 659 | }; |
| @@ -22,49 +22,49 @@ · 21 unmodified lines | ||
| 22 | 22 | #define DRIVER_NAME "ph1-sld8-pinctrl" |
| 23 | 23 | |
| 24 | 24 | static const struct pinctrl_pin_desc ph1_sld8_pins[] = { |
| 25 | − UNIPHIER_PINCTRL_PIN(0, "PCA00", UNIPHIER_PIN_IECTRL_NONE, | |
| 25 | + UNIPHIER_PINCTRL_PIN(0, "PCA00", 0, | |
| 26 | 26 | 15, UNIPHIER_PIN_DRV_4_8, |
| 27 | 27 | 15, UNIPHIER_PIN_PULL_DOWN), |
| 28 | − UNIPHIER_PINCTRL_PIN(1, "PCA01", UNIPHIER_PIN_IECTRL_NONE, | |
| 28 | + UNIPHIER_PINCTRL_PIN(1, "PCA01", 0, | |
| 29 | 29 | 16, UNIPHIER_PIN_DRV_4_8, |
| 30 | 30 | 16, UNIPHIER_PIN_PULL_DOWN), |
| 31 | − UNIPHIER_PINCTRL_PIN(2, "PCA02", UNIPHIER_PIN_IECTRL_NONE, | |
| 31 | + UNIPHIER_PINCTRL_PIN(2, "PCA02", 0, | |
| 32 | 32 | 17, UNIPHIER_PIN_DRV_4_8, |
| 33 | 33 | 17, UNIPHIER_PIN_PULL_DOWN), |
| 34 | − UNIPHIER_PINCTRL_PIN(3, "PCA03", UNIPHIER_PIN_IECTRL_NONE, | |
| 34 | + UNIPHIER_PINCTRL_PIN(3, "PCA03", 0, | |
| 35 | 35 | 18, UNIPHIER_PIN_DRV_4_8, |
| 36 | 36 | 18, UNIPHIER_PIN_PULL_DOWN), |
| 37 | − UNIPHIER_PINCTRL_PIN(4, "PCA04", UNIPHIER_PIN_IECTRL_NONE, | |
| 37 | + UNIPHIER_PINCTRL_PIN(4, "PCA04", 0, | |
| 38 | 38 | 19, UNIPHIER_PIN_DRV_4_8, |
| 39 | 39 | 19, UNIPHIER_PIN_PULL_DOWN), |
| 40 | − UNIPHIER_PINCTRL_PIN(5, "PCA05", UNIPHIER_PIN_IECTRL_NONE, | |
| 40 | + UNIPHIER_PINCTRL_PIN(5, "PCA05", 0, | |
| 41 | 41 | 20, UNIPHIER_PIN_DRV_4_8, |
| 42 | 42 | 20, UNIPHIER_PIN_PULL_DOWN), |
| 43 | − UNIPHIER_PINCTRL_PIN(6, "PCA06", UNIPHIER_PIN_IECTRL_NONE, | |
| 43 | + UNIPHIER_PINCTRL_PIN(6, "PCA06", 0, | |
| 44 | 44 | 21, UNIPHIER_PIN_DRV_4_8, |
| 45 | 45 | 21, UNIPHIER_PIN_PULL_DOWN), |
| 46 | − UNIPHIER_PINCTRL_PIN(7, "PCA07", UNIPHIER_PIN_IECTRL_NONE, | |
| 46 | + UNIPHIER_PINCTRL_PIN(7, "PCA07", 0, | |
| 47 | 47 | 22, UNIPHIER_PIN_DRV_4_8, |
| 48 | 48 | 22, UNIPHIER_PIN_PULL_DOWN), |
| 49 | − UNIPHIER_PINCTRL_PIN(8, "PCA08", UNIPHIER_PIN_IECTRL_NONE, | |
| 49 | + UNIPHIER_PINCTRL_PIN(8, "PCA08", 0, | |
| 50 | 50 | 23, UNIPHIER_PIN_DRV_4_8, |
| 51 | 51 | 23, UNIPHIER_PIN_PULL_DOWN), |
| 52 | − UNIPHIER_PINCTRL_PIN(9, "PCA09", UNIPHIER_PIN_IECTRL_NONE, | |
| 52 | + UNIPHIER_PINCTRL_PIN(9, "PCA09", 0, | |
| 53 | 53 | 24, UNIPHIER_PIN_DRV_4_8, |
| 54 | 54 | 24, UNIPHIER_PIN_PULL_DOWN), |
| 55 | − UNIPHIER_PINCTRL_PIN(10, "PCA10", UNIPHIER_PIN_IECTRL_NONE, | |
| 55 | + UNIPHIER_PINCTRL_PIN(10, "PCA10", 0, | |
| 56 | 56 | 25, UNIPHIER_PIN_DRV_4_8, |
| 57 | 57 | 25, UNIPHIER_PIN_PULL_DOWN), |
| 58 | − UNIPHIER_PINCTRL_PIN(11, "PCA11", UNIPHIER_PIN_IECTRL_NONE, | |
| 58 | + UNIPHIER_PINCTRL_PIN(11, "PCA11", 0, | |
| 59 | 59 | 26, UNIPHIER_PIN_DRV_4_8, |
| 60 | 60 | 26, UNIPHIER_PIN_PULL_DOWN), |
| 61 | − UNIPHIER_PINCTRL_PIN(12, "PCA12", UNIPHIER_PIN_IECTRL_NONE, | |
| 61 | + UNIPHIER_PINCTRL_PIN(12, "PCA12", 0, | |
| 62 | 62 | 27, UNIPHIER_PIN_DRV_4_8, |
| 63 | 63 | 27, UNIPHIER_PIN_PULL_DOWN), |
| 64 | − UNIPHIER_PINCTRL_PIN(13, "PCA13", UNIPHIER_PIN_IECTRL_NONE, | |
| 64 | + UNIPHIER_PINCTRL_PIN(13, "PCA13", 0, | |
| 65 | 65 | 28, UNIPHIER_PIN_DRV_4_8, |
| 66 | 66 | 28, UNIPHIER_PIN_PULL_DOWN), |
| 67 | − UNIPHIER_PINCTRL_PIN(14, "PCA14", UNIPHIER_PIN_IECTRL_NONE, | |
| 67 | + UNIPHIER_PINCTRL_PIN(14, "PCA14", 0, | |
| 68 | 68 | 29, UNIPHIER_PIN_DRV_4_8, |
| 69 | 69 | 29, UNIPHIER_PIN_PULL_DOWN), |
| 70 | 70 | UNIPHIER_PINCTRL_PIN(15, "XNFRE_GB", UNIPHIER_PIN_IECTRL_NONE, |
| @@ -118,199 +118,199 @@ static const struct pinctrl_pin_desc ph1_sld8_pins[] = { · 47 unmodified lines | ||
| 118 | 118 | UNIPHIER_PINCTRL_PIN(31, "NFD7_GB", UNIPHIER_PIN_IECTRL_NONE, |
| 119 | 119 | 36, UNIPHIER_PIN_DRV_8_12_16_20, |
| 120 | 120 | 128, UNIPHIER_PIN_PULL_UP), |
| 121 | − UNIPHIER_PINCTRL_PIN(32, "SDCLK", UNIPHIER_PIN_IECTRL_NONE, | |
| 121 | + UNIPHIER_PINCTRL_PIN(32, "SDCLK", 8, | |
| 122 | 122 | 40, UNIPHIER_PIN_DRV_8_12_16_20, |
| 123 | 123 | -1, UNIPHIER_PIN_PULL_NONE), |
| 124 | − UNIPHIER_PINCTRL_PIN(33, "SDCMD", UNIPHIER_PIN_IECTRL_NONE, | |
| 124 | + UNIPHIER_PINCTRL_PIN(33, "SDCMD", 8, | |
| 125 | 125 | 44, UNIPHIER_PIN_DRV_8_12_16_20, |
| 126 | 126 | -1, UNIPHIER_PIN_PULL_NONE), |
| 127 | − UNIPHIER_PINCTRL_PIN(34, "SDDAT0", UNIPHIER_PIN_IECTRL_NONE, | |
| 127 | + UNIPHIER_PINCTRL_PIN(34, "SDDAT0", 8, | |
| 128 | 128 | 48, UNIPHIER_PIN_DRV_8_12_16_20, |
| 129 | 129 | -1, UNIPHIER_PIN_PULL_NONE), |
| 130 | − UNIPHIER_PINCTRL_PIN(35, "SDDAT1", UNIPHIER_PIN_IECTRL_NONE, | |
| 130 | + UNIPHIER_PINCTRL_PIN(35, "SDDAT1", 8, | |
| 131 | 131 | 52, UNIPHIER_PIN_DRV_8_12_16_20, |
| 132 | 132 | -1, UNIPHIER_PIN_PULL_NONE), |
| 133 | − UNIPHIER_PINCTRL_PIN(36, "SDDAT2", UNIPHIER_PIN_IECTRL_NONE, | |
| 133 | + UNIPHIER_PINCTRL_PIN(36, "SDDAT2", 8, | |
| 134 | 134 | 56, UNIPHIER_PIN_DRV_8_12_16_20, |
| 135 | 135 | -1, UNIPHIER_PIN_PULL_NONE), |
| 136 | − UNIPHIER_PINCTRL_PIN(37, "SDDAT3", UNIPHIER_PIN_IECTRL_NONE, | |
| 136 | + UNIPHIER_PINCTRL_PIN(37, "SDDAT3", 8, | |
| 137 | 137 | 60, UNIPHIER_PIN_DRV_8_12_16_20, |
| 138 | 138 | -1, UNIPHIER_PIN_PULL_NONE), |
| 139 | − UNIPHIER_PINCTRL_PIN(38, "SDCD", UNIPHIER_PIN_IECTRL_NONE, | |
| 139 | + UNIPHIER_PINCTRL_PIN(38, "SDCD", 8, | |
| 140 | 140 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 141 | 141 | 129, UNIPHIER_PIN_PULL_DOWN), |
| 142 | − UNIPHIER_PINCTRL_PIN(39, "SDWP", UNIPHIER_PIN_IECTRL_NONE, | |
| 142 | + UNIPHIER_PINCTRL_PIN(39, "SDWP", 8, | |
| 143 | 143 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 144 | 144 | 130, UNIPHIER_PIN_PULL_DOWN), |
| 145 | − UNIPHIER_PINCTRL_PIN(40, "SDVOLC", UNIPHIER_PIN_IECTRL_NONE, | |
| 145 | + UNIPHIER_PINCTRL_PIN(40, "SDVOLC", 9, | |
| 146 | 146 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 147 | 147 | 131, UNIPHIER_PIN_PULL_DOWN), |
| 148 | − UNIPHIER_PINCTRL_PIN(41, "USB0VBUS", UNIPHIER_PIN_IECTRL_NONE, | |
| 148 | + UNIPHIER_PINCTRL_PIN(41, "USB0VBUS", 0, | |
| 149 | 149 | 37, UNIPHIER_PIN_DRV_4_8, |
| 150 | 150 | 37, UNIPHIER_PIN_PULL_DOWN), |
| 151 | − UNIPHIER_PINCTRL_PIN(42, "USB0OD", UNIPHIER_PIN_IECTRL_NONE, | |
| 151 | + UNIPHIER_PINCTRL_PIN(42, "USB0OD", 0, | |
| 152 | 152 | 38, UNIPHIER_PIN_DRV_4_8, |
| 153 | 153 | 38, UNIPHIER_PIN_PULL_DOWN), |
| 154 | − UNIPHIER_PINCTRL_PIN(43, "USB1VBUS", UNIPHIER_PIN_IECTRL_NONE, | |
| 154 | + UNIPHIER_PINCTRL_PIN(43, "USB1VBUS", 0, | |
| 155 | 155 | 39, UNIPHIER_PIN_DRV_4_8, |
| 156 | 156 | 39, UNIPHIER_PIN_PULL_DOWN), |
| 157 | − UNIPHIER_PINCTRL_PIN(44, "USB1OD", UNIPHIER_PIN_IECTRL_NONE, | |
| 157 | + UNIPHIER_PINCTRL_PIN(44, "USB1OD", 0, | |
| 158 | 158 | 40, UNIPHIER_PIN_DRV_4_8, |
| 159 | 159 | 40, UNIPHIER_PIN_PULL_DOWN), |
| 160 | − UNIPHIER_PINCTRL_PIN(45, "PCRESET", UNIPHIER_PIN_IECTRL_NONE, | |
| 160 | + UNIPHIER_PINCTRL_PIN(45, "PCRESET", 0, | |
| 161 | 161 | 41, UNIPHIER_PIN_DRV_4_8, |
| 162 | 162 | 41, UNIPHIER_PIN_PULL_DOWN), |
| 163 | − UNIPHIER_PINCTRL_PIN(46, "PCREG", UNIPHIER_PIN_IECTRL_NONE, | |
| 163 | + UNIPHIER_PINCTRL_PIN(46, "PCREG", 0, | |
| 164 | 164 | 42, UNIPHIER_PIN_DRV_4_8, |
| 165 | 165 | 42, UNIPHIER_PIN_PULL_DOWN), |
| 166 | − UNIPHIER_PINCTRL_PIN(47, "PCCE2", UNIPHIER_PIN_IECTRL_NONE, | |
| 166 | + UNIPHIER_PINCTRL_PIN(47, "PCCE2", 0, | |
| 167 | 167 | 43, UNIPHIER_PIN_DRV_4_8, |
| 168 | 168 | 43, UNIPHIER_PIN_PULL_DOWN), |
| 169 | − UNIPHIER_PINCTRL_PIN(48, "PCVS1", UNIPHIER_PIN_IECTRL_NONE, | |
| 169 | + UNIPHIER_PINCTRL_PIN(48, "PCVS1", 0, | |
| 170 | 170 | 44, UNIPHIER_PIN_DRV_4_8, |
| 171 | 171 | 44, UNIPHIER_PIN_PULL_DOWN), |
| 172 | − UNIPHIER_PINCTRL_PIN(49, "PCCD2", UNIPHIER_PIN_IECTRL_NONE, | |
| 172 | + UNIPHIER_PINCTRL_PIN(49, "PCCD2", 0, | |
| 173 | 173 | 45, UNIPHIER_PIN_DRV_4_8, |
| 174 | 174 | 45, UNIPHIER_PIN_PULL_DOWN), |
| 175 | − UNIPHIER_PINCTRL_PIN(50, "PCCD1", UNIPHIER_PIN_IECTRL_NONE, | |
| 175 | + UNIPHIER_PINCTRL_PIN(50, "PCCD1", 0, | |
| 176 | 176 | 46, UNIPHIER_PIN_DRV_4_8, |
| 177 | 177 | 46, UNIPHIER_PIN_PULL_DOWN), |
| 178 | − UNIPHIER_PINCTRL_PIN(51, "PCREADY", UNIPHIER_PIN_IECTRL_NONE, | |
| 178 | + UNIPHIER_PINCTRL_PIN(51, "PCREADY", 0, | |
| 179 | 179 | 47, UNIPHIER_PIN_DRV_4_8, |
| 180 | 180 | 47, UNIPHIER_PIN_PULL_DOWN), |
| 181 | − UNIPHIER_PINCTRL_PIN(52, "PCDOE", UNIPHIER_PIN_IECTRL_NONE, | |
| 181 | + UNIPHIER_PINCTRL_PIN(52, "PCDOE", 0, | |
| 182 | 182 | 48, UNIPHIER_PIN_DRV_4_8, |
| 183 | 183 | 48, UNIPHIER_PIN_PULL_DOWN), |
| 184 | − UNIPHIER_PINCTRL_PIN(53, "PCCE1", UNIPHIER_PIN_IECTRL_NONE, | |
| 184 | + UNIPHIER_PINCTRL_PIN(53, "PCCE1", 0, | |
| 185 | 185 | 49, UNIPHIER_PIN_DRV_4_8, |
| 186 | 186 | 49, UNIPHIER_PIN_PULL_DOWN), |
| 187 | − UNIPHIER_PINCTRL_PIN(54, "PCWE", UNIPHIER_PIN_IECTRL_NONE, | |
| 187 | + UNIPHIER_PINCTRL_PIN(54, "PCWE", 0, | |
| 188 | 188 | 50, UNIPHIER_PIN_DRV_4_8, |
| 189 | 189 | 50, UNIPHIER_PIN_PULL_DOWN), |
| 190 | − UNIPHIER_PINCTRL_PIN(55, "PCOE", UNIPHIER_PIN_IECTRL_NONE, | |
| 190 | + UNIPHIER_PINCTRL_PIN(55, "PCOE", 0, | |
| 191 | 191 | 51, UNIPHIER_PIN_DRV_4_8, |
| 192 | 192 | 51, UNIPHIER_PIN_PULL_DOWN), |
| 193 | − UNIPHIER_PINCTRL_PIN(56, "PCWAIT", UNIPHIER_PIN_IECTRL_NONE, | |
| 193 | + UNIPHIER_PINCTRL_PIN(56, "PCWAIT", 0, | |
| 194 | 194 | 52, UNIPHIER_PIN_DRV_4_8, |
| 195 | 195 | 52, UNIPHIER_PIN_PULL_DOWN), |
| 196 | − UNIPHIER_PINCTRL_PIN(57, "PCIOWR", UNIPHIER_PIN_IECTRL_NONE, | |
| 196 | + UNIPHIER_PINCTRL_PIN(57, "PCIOWR", 0, | |
| 197 | 197 | 53, UNIPHIER_PIN_DRV_4_8, |
| 198 | 198 | 53, UNIPHIER_PIN_PULL_DOWN), |
| 199 | − UNIPHIER_PINCTRL_PIN(58, "PCIORD", UNIPHIER_PIN_IECTRL_NONE, | |
| 199 | + UNIPHIER_PINCTRL_PIN(58, "PCIORD", 0, | |
| 200 | 200 | 54, UNIPHIER_PIN_DRV_4_8, |
| 201 | 201 | 54, UNIPHIER_PIN_PULL_DOWN), |
| 202 | − UNIPHIER_PINCTRL_PIN(59, "HS0DIN0", UNIPHIER_PIN_IECTRL_NONE, | |
| 202 | + UNIPHIER_PINCTRL_PIN(59, "HS0DIN0", 0, | |
| 203 | 203 | 55, UNIPHIER_PIN_DRV_4_8, |
| 204 | 204 | 55, UNIPHIER_PIN_PULL_DOWN), |
| 205 | − UNIPHIER_PINCTRL_PIN(60, "HS0DIN1", UNIPHIER_PIN_IECTRL_NONE, | |
| 205 | + UNIPHIER_PINCTRL_PIN(60, "HS0DIN1", 0, | |
| 206 | 206 | 56, UNIPHIER_PIN_DRV_4_8, |
| 207 | 207 | 56, UNIPHIER_PIN_PULL_DOWN), |
| 208 | − UNIPHIER_PINCTRL_PIN(61, "HS0DIN2", UNIPHIER_PIN_IECTRL_NONE, | |
| 208 | + UNIPHIER_PINCTRL_PIN(61, "HS0DIN2", 0, | |
| 209 | 209 | 57, UNIPHIER_PIN_DRV_4_8, |
| 210 | 210 | 57, UNIPHIER_PIN_PULL_DOWN), |
| 211 | − UNIPHIER_PINCTRL_PIN(62, "HS0DIN3", UNIPHIER_PIN_IECTRL_NONE, | |
| 211 | + UNIPHIER_PINCTRL_PIN(62, "HS0DIN3", 0, | |
| 212 | 212 | 58, UNIPHIER_PIN_DRV_4_8, |
| 213 | 213 | 58, UNIPHIER_PIN_PULL_DOWN), |
| 214 | − UNIPHIER_PINCTRL_PIN(63, "HS0DIN4", UNIPHIER_PIN_IECTRL_NONE, | |
| 214 | + UNIPHIER_PINCTRL_PIN(63, "HS0DIN4", 0, | |
| 215 | 215 | 59, UNIPHIER_PIN_DRV_4_8, |
| 216 | 216 | 59, UNIPHIER_PIN_PULL_DOWN), |
| 217 | − UNIPHIER_PINCTRL_PIN(64, "HS0DIN5", UNIPHIER_PIN_IECTRL_NONE, | |
| 217 | + UNIPHIER_PINCTRL_PIN(64, "HS0DIN5", 0, | |
| 218 | 218 | 60, UNIPHIER_PIN_DRV_4_8, |
| 219 | 219 | 60, UNIPHIER_PIN_PULL_DOWN), |
| 220 | − UNIPHIER_PINCTRL_PIN(65, "HS0DIN6", UNIPHIER_PIN_IECTRL_NONE, | |
| 220 | + UNIPHIER_PINCTRL_PIN(65, "HS0DIN6", 0, | |
| 221 | 221 | 61, UNIPHIER_PIN_DRV_4_8, |
| 222 | 222 | 61, UNIPHIER_PIN_PULL_DOWN), |
| 223 | − UNIPHIER_PINCTRL_PIN(66, "HS0DIN7", UNIPHIER_PIN_IECTRL_NONE, | |
| 223 | + UNIPHIER_PINCTRL_PIN(66, "HS0DIN7", 0, | |
| 224 | 224 | 62, UNIPHIER_PIN_DRV_4_8, |
| 225 | 225 | 62, UNIPHIER_PIN_PULL_DOWN), |
| 226 | − UNIPHIER_PINCTRL_PIN(67, "HS0BCLKIN", UNIPHIER_PIN_IECTRL_NONE, | |
| 226 | + UNIPHIER_PINCTRL_PIN(67, "HS0BCLKIN", 0, | |
| 227 | 227 | 63, UNIPHIER_PIN_DRV_4_8, |
| 228 | 228 | 63, UNIPHIER_PIN_PULL_DOWN), |
| 229 | − UNIPHIER_PINCTRL_PIN(68, "HS0VALIN", UNIPHIER_PIN_IECTRL_NONE, | |
| 229 | + UNIPHIER_PINCTRL_PIN(68, "HS0VALIN", 0, | |
| 230 | 230 | 64, UNIPHIER_PIN_DRV_4_8, |
| 231 | 231 | 64, UNIPHIER_PIN_PULL_DOWN), |
| 232 | − UNIPHIER_PINCTRL_PIN(69, "HS0SYNCIN", UNIPHIER_PIN_IECTRL_NONE, | |
| 232 | + UNIPHIER_PINCTRL_PIN(69, "HS0SYNCIN", 0, | |
| 233 | 233 | 65, UNIPHIER_PIN_DRV_4_8, |
| 234 | 234 | 65, UNIPHIER_PIN_PULL_DOWN), |
| 235 | − UNIPHIER_PINCTRL_PIN(70, "HSDOUT0", UNIPHIER_PIN_IECTRL_NONE, | |
| 235 | + UNIPHIER_PINCTRL_PIN(70, "HSDOUT0", 0, | |
| 236 | 236 | 66, UNIPHIER_PIN_DRV_4_8, |
| 237 | 237 | 66, UNIPHIER_PIN_PULL_DOWN), |
| 238 | − UNIPHIER_PINCTRL_PIN(71, "HSDOUT1", UNIPHIER_PIN_IECTRL_NONE, | |
| 238 | + UNIPHIER_PINCTRL_PIN(71, "HSDOUT1", 0, | |
| 239 | 239 | 67, UNIPHIER_PIN_DRV_4_8, |
| 240 | 240 | 67, UNIPHIER_PIN_PULL_DOWN), |
| 241 | − UNIPHIER_PINCTRL_PIN(72, "HSDOUT2", UNIPHIER_PIN_IECTRL_NONE, | |
| 241 | + UNIPHIER_PINCTRL_PIN(72, "HSDOUT2", 0, | |
| 242 | 242 | 68, UNIPHIER_PIN_DRV_4_8, |
| 243 | 243 | 68, UNIPHIER_PIN_PULL_DOWN), |
| 244 | − UNIPHIER_PINCTRL_PIN(73, "HSDOUT3", UNIPHIER_PIN_IECTRL_NONE, | |
| 244 | + UNIPHIER_PINCTRL_PIN(73, "HSDOUT3", 0, | |
| 245 | 245 | 69, UNIPHIER_PIN_DRV_4_8, |
| 246 | 246 | 69, UNIPHIER_PIN_PULL_DOWN), |
| 247 | − UNIPHIER_PINCTRL_PIN(74, "HSDOUT4", UNIPHIER_PIN_IECTRL_NONE, | |
| 247 | + UNIPHIER_PINCTRL_PIN(74, "HSDOUT4", 0, | |
| 248 | 248 | 70, UNIPHIER_PIN_DRV_4_8, |
| 249 | 249 | 70, UNIPHIER_PIN_PULL_DOWN), |
| 250 | − UNIPHIER_PINCTRL_PIN(75, "HSDOUT5", UNIPHIER_PIN_IECTRL_NONE, | |
| 250 | + UNIPHIER_PINCTRL_PIN(75, "HSDOUT5", 0, | |
| 251 | 251 | 71, UNIPHIER_PIN_DRV_4_8, |
| 252 | 252 | 71, UNIPHIER_PIN_PULL_DOWN), |
| 253 | − UNIPHIER_PINCTRL_PIN(76, "HSDOUT6", UNIPHIER_PIN_IECTRL_NONE, | |
| 253 | + UNIPHIER_PINCTRL_PIN(76, "HSDOUT6", 0, | |
| 254 | 254 | 72, UNIPHIER_PIN_DRV_4_8, |
| 255 | 255 | 72, UNIPHIER_PIN_PULL_DOWN), |
| 256 | − UNIPHIER_PINCTRL_PIN(77, "HSDOUT7", UNIPHIER_PIN_IECTRL_NONE, | |
| 256 | + UNIPHIER_PINCTRL_PIN(77, "HSDOUT7", 0, | |
| 257 | 257 | 73, UNIPHIER_PIN_DRV_4_8, |
| 258 | 258 | 73, UNIPHIER_PIN_PULL_DOWN), |
| 259 | − UNIPHIER_PINCTRL_PIN(78, "HSBCLKOUT", UNIPHIER_PIN_IECTRL_NONE, | |
| 259 | + UNIPHIER_PINCTRL_PIN(78, "HSBCLKOUT", 0, | |
| 260 | 260 | 74, UNIPHIER_PIN_DRV_4_8, |
| 261 | 261 | 74, UNIPHIER_PIN_PULL_DOWN), |
| 262 | − UNIPHIER_PINCTRL_PIN(79, "HSVALOUT", UNIPHIER_PIN_IECTRL_NONE, | |
| 262 | + UNIPHIER_PINCTRL_PIN(79, "HSVALOUT", 0, | |
| 263 | 263 | 75, UNIPHIER_PIN_DRV_4_8, |
| 264 | 264 | 75, UNIPHIER_PIN_PULL_DOWN), |
| 265 | − UNIPHIER_PINCTRL_PIN(80, "HSSYNCOUT", UNIPHIER_PIN_IECTRL_NONE, | |
| 265 | + UNIPHIER_PINCTRL_PIN(80, "HSSYNCOUT", 0, | |
| 266 | 266 | 76, UNIPHIER_PIN_DRV_4_8, |
| 267 | 267 | 76, UNIPHIER_PIN_PULL_DOWN), |
| 268 | − UNIPHIER_PINCTRL_PIN(81, "HS1DIN0", UNIPHIER_PIN_IECTRL_NONE, | |
| 268 | + UNIPHIER_PINCTRL_PIN(81, "HS1DIN0", 0, | |
| 269 | 269 | 77, UNIPHIER_PIN_DRV_4_8, |
| 270 | 270 | 77, UNIPHIER_PIN_PULL_DOWN), |
| 271 | − UNIPHIER_PINCTRL_PIN(82, "HS1DIN1", UNIPHIER_PIN_IECTRL_NONE, | |
| 271 | + UNIPHIER_PINCTRL_PIN(82, "HS1DIN1", 0, | |
| 272 | 272 | 78, UNIPHIER_PIN_DRV_4_8, |
| 273 | 273 | 78, UNIPHIER_PIN_PULL_DOWN), |
| 274 | − UNIPHIER_PINCTRL_PIN(83, "HS1DIN2", UNIPHIER_PIN_IECTRL_NONE, | |
| 274 | + UNIPHIER_PINCTRL_PIN(83, "HS1DIN2", 0, | |
| 275 | 275 | 79, UNIPHIER_PIN_DRV_4_8, |
| 276 | 276 | 79, UNIPHIER_PIN_PULL_DOWN), |
| 277 | − UNIPHIER_PINCTRL_PIN(84, "HS1DIN3", UNIPHIER_PIN_IECTRL_NONE, | |
| 277 | + UNIPHIER_PINCTRL_PIN(84, "HS1DIN3", 0, | |
| 278 | 278 | 80, UNIPHIER_PIN_DRV_4_8, |
| 279 | 279 | 80, UNIPHIER_PIN_PULL_DOWN), |
| 280 | − UNIPHIER_PINCTRL_PIN(85, "HS1DIN4", UNIPHIER_PIN_IECTRL_NONE, | |
| 280 | + UNIPHIER_PINCTRL_PIN(85, "HS1DIN4", 0, | |
| 281 | 281 | 81, UNIPHIER_PIN_DRV_4_8, |
| 282 | 282 | 81, UNIPHIER_PIN_PULL_DOWN), |
| 283 | − UNIPHIER_PINCTRL_PIN(86, "HS1DIN5", UNIPHIER_PIN_IECTRL_NONE, | |
| 283 | + UNIPHIER_PINCTRL_PIN(86, "HS1DIN5", 0, | |
| 284 | 284 | 82, UNIPHIER_PIN_DRV_4_8, |
| 285 | 285 | 82, UNIPHIER_PIN_PULL_DOWN), |
| 286 | − UNIPHIER_PINCTRL_PIN(87, "HS1DIN6", UNIPHIER_PIN_IECTRL_NONE, | |
| 286 | + UNIPHIER_PINCTRL_PIN(87, "HS1DIN6", 0, | |
| 287 | 287 | 83, UNIPHIER_PIN_DRV_4_8, |
| 288 | 288 | 83, UNIPHIER_PIN_PULL_DOWN), |
| 289 | − UNIPHIER_PINCTRL_PIN(88, "HS1DIN7", UNIPHIER_PIN_IECTRL_NONE, | |
| 289 | + UNIPHIER_PINCTRL_PIN(88, "HS1DIN7", 0, | |
| 290 | 290 | 84, UNIPHIER_PIN_DRV_4_8, |
| 291 | 291 | 84, UNIPHIER_PIN_PULL_DOWN), |
| 292 | − UNIPHIER_PINCTRL_PIN(89, "HS1BCLKIN", UNIPHIER_PIN_IECTRL_NONE, | |
| 292 | + UNIPHIER_PINCTRL_PIN(89, "HS1BCLKIN", 0, | |
| 293 | 293 | 85, UNIPHIER_PIN_DRV_4_8, |
| 294 | 294 | 85, UNIPHIER_PIN_PULL_DOWN), |
| 295 | − UNIPHIER_PINCTRL_PIN(90, "HS1VALIN", UNIPHIER_PIN_IECTRL_NONE, | |
| 295 | + UNIPHIER_PINCTRL_PIN(90, "HS1VALIN", 0, | |
| 296 | 296 | 86, UNIPHIER_PIN_DRV_4_8, |
| 297 | 297 | 86, UNIPHIER_PIN_PULL_DOWN), |
| 298 | − UNIPHIER_PINCTRL_PIN(91, "HS1SYNCIN", UNIPHIER_PIN_IECTRL_NONE, | |
| 298 | + UNIPHIER_PINCTRL_PIN(91, "HS1SYNCIN", 0, | |
| 299 | 299 | 87, UNIPHIER_PIN_DRV_4_8, |
| 300 | 300 | 87, UNIPHIER_PIN_PULL_DOWN), |
| 301 | − UNIPHIER_PINCTRL_PIN(92, "AGCI", UNIPHIER_PIN_IECTRL_NONE, | |
| 301 | + UNIPHIER_PINCTRL_PIN(92, "AGCI", 3, | |
| 302 | 302 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 303 | 303 | 132, UNIPHIER_PIN_PULL_DOWN), |
| 304 | − UNIPHIER_PINCTRL_PIN(93, "AGCR", UNIPHIER_PIN_IECTRL_NONE, | |
| 304 | + UNIPHIER_PINCTRL_PIN(93, "AGCR", 4, | |
| 305 | 305 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 306 | 306 | 133, UNIPHIER_PIN_PULL_DOWN), |
| 307 | − UNIPHIER_PINCTRL_PIN(94, "AGCBS", UNIPHIER_PIN_IECTRL_NONE, | |
| 307 | + UNIPHIER_PINCTRL_PIN(94, "AGCBS", 5, | |
| 308 | 308 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 309 | 309 | 134, UNIPHIER_PIN_PULL_DOWN), |
| 310 | − UNIPHIER_PINCTRL_PIN(95, "IECOUT", UNIPHIER_PIN_IECTRL_NONE, | |
| 310 | + UNIPHIER_PINCTRL_PIN(95, "IECOUT", 0, | |
| 311 | 311 | 88, UNIPHIER_PIN_DRV_4_8, |
| 312 | 312 | 88, UNIPHIER_PIN_PULL_DOWN), |
| 313 | − UNIPHIER_PINCTRL_PIN(96, "ASMCK", UNIPHIER_PIN_IECTRL_NONE, | |
| 313 | + UNIPHIER_PINCTRL_PIN(96, "ASMCK", 0, | |
| 314 | 314 | 89, UNIPHIER_PIN_DRV_4_8, |
| 315 | 315 | 89, UNIPHIER_PIN_PULL_DOWN), |
| 316 | 316 | UNIPHIER_PINCTRL_PIN(97, "ABCKO", UNIPHIER_PIN_IECTRL_NONE, |
| @@ -325,31 +325,31 @@ static const struct pinctrl_pin_desc ph1_sld8_pins[] = { · 8 unmodified lines | ||
| 325 | 325 | UNIPHIER_PINCTRL_PIN(100, "ASDOUT1", UNIPHIER_PIN_IECTRL_NONE, |
| 326 | 326 | 93, UNIPHIER_PIN_DRV_4_8, |
| 327 | 327 | 93, UNIPHIER_PIN_PULL_UP), |
| 328 | − UNIPHIER_PINCTRL_PIN(101, "ARCOUT", UNIPHIER_PIN_IECTRL_NONE, | |
| 328 | + UNIPHIER_PINCTRL_PIN(101, "ARCOUT", 0, | |
| 329 | 329 | 94, UNIPHIER_PIN_DRV_4_8, |
| 330 | 330 | 94, UNIPHIER_PIN_PULL_DOWN), |
| 331 | − UNIPHIER_PINCTRL_PIN(102, "SDA0", UNIPHIER_PIN_IECTRL_NONE, | |
| 331 | + UNIPHIER_PINCTRL_PIN(102, "SDA0", 10, | |
| 332 | 332 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 333 | 333 | -1, UNIPHIER_PIN_PULL_NONE), |
| 334 | − UNIPHIER_PINCTRL_PIN(103, "SCL0", UNIPHIER_PIN_IECTRL_NONE, | |
| 334 | + UNIPHIER_PINCTRL_PIN(103, "SCL0", 10, | |
| 335 | 335 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 336 | 336 | -1, UNIPHIER_PIN_PULL_NONE), |
| 337 | − UNIPHIER_PINCTRL_PIN(104, "SDA1", UNIPHIER_PIN_IECTRL_NONE, | |
| 337 | + UNIPHIER_PINCTRL_PIN(104, "SDA1", 11, | |
| 338 | 338 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 339 | 339 | -1, UNIPHIER_PIN_PULL_NONE), |
| 340 | − UNIPHIER_PINCTRL_PIN(105, "SCL1", UNIPHIER_PIN_IECTRL_NONE, | |
| 340 | + UNIPHIER_PINCTRL_PIN(105, "SCL1", 11, | |
| 341 | 341 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 342 | 342 | -1, UNIPHIER_PIN_PULL_NONE), |
| 343 | − UNIPHIER_PINCTRL_PIN(106, "DMDSDA0", UNIPHIER_PIN_IECTRL_NONE, | |
| 343 | + UNIPHIER_PINCTRL_PIN(106, "DMDSDA0", 12, | |
| 344 | 344 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 345 | 345 | -1, UNIPHIER_PIN_PULL_NONE), |
| 346 | − UNIPHIER_PINCTRL_PIN(107, "DMDSCL0", UNIPHIER_PIN_IECTRL_NONE, | |
| 346 | + UNIPHIER_PINCTRL_PIN(107, "DMDSCL0", 12, | |
| 347 | 347 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 348 | 348 | -1, UNIPHIER_PIN_PULL_NONE), |
| 349 | − UNIPHIER_PINCTRL_PIN(108, "DMDSDA1", UNIPHIER_PIN_IECTRL_NONE, | |
| 349 | + UNIPHIER_PINCTRL_PIN(108, "DMDSDA1", 13, | |
| 350 | 350 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 351 | 351 | -1, UNIPHIER_PIN_PULL_NONE), |
| 352 | − UNIPHIER_PINCTRL_PIN(109, "DMDSCL1", UNIPHIER_PIN_IECTRL_NONE, | |
| 352 | + UNIPHIER_PINCTRL_PIN(109, "DMDSCL1", 13, | |
| 353 | 353 | -1, UNIPHIER_PIN_DRV_FIXED_4, |
| 354 | 354 | -1, UNIPHIER_PIN_PULL_NONE), |
| 355 | 355 | UNIPHIER_PINCTRL_PIN(110, "SBO0", UNIPHIER_PIN_IECTRL_NONE, |
| @@ -358,76 +358,76 @@ static const struct pinctrl_pin_desc ph1_sld8_pins[] = { · 2 unmodified lines | ||
| 358 | 358 | UNIPHIER_PINCTRL_PIN(111, "SBI0", UNIPHIER_PIN_IECTRL_NONE, |
| 359 | 359 | 96, UNIPHIER_PIN_DRV_4_8, |
| 360 | 360 | 96, UNIPHIER_PIN_PULL_UP), |
| 361 | − UNIPHIER_PINCTRL_PIN(112, "SBO1", UNIPHIER_PIN_IECTRL_NONE, | |
| 361 | + UNIPHIER_PINCTRL_PIN(112, "SBO1", 0, | |
| 362 | 362 | 97, UNIPHIER_PIN_DRV_4_8, |
| 363 | 363 | 97, UNIPHIER_PIN_PULL_UP), |
| 364 | − UNIPHIER_PINCTRL_PIN(113, "SBI1", UNIPHIER_PIN_IECTRL_NONE, | |
| 364 | + UNIPHIER_PINCTRL_PIN(113, "SBI1", 0, | |
| 365 | 365 | 98, UNIPHIER_PIN_DRV_4_8, |
| 366 | 366 | 98, UNIPHIER_PIN_PULL_UP), |
| 367 | − UNIPHIER_PINCTRL_PIN(114, "TXD1", UNIPHIER_PIN_IECTRL_NONE, | |
| 367 | + UNIPHIER_PINCTRL_PIN(114, "TXD1", 0, | |
| 368 | 368 | 99, UNIPHIER_PIN_DRV_4_8, |
| 369 | 369 | 99, UNIPHIER_PIN_PULL_UP), |
| 370 | − UNIPHIER_PINCTRL_PIN(115, "RXD1", UNIPHIER_PIN_IECTRL_NONE, | |
| 370 | + UNIPHIER_PINCTRL_PIN(115, "RXD1", 0, | |
| 371 | 371 | 100, UNIPHIER_PIN_DRV_4_8, |
| 372 | 372 | 100, UNIPHIER_PIN_PULL_UP), |
| 373 | − UNIPHIER_PINCTRL_PIN(116, "HIN", UNIPHIER_PIN_IECTRL_NONE, | |
| 373 | + UNIPHIER_PINCTRL_PIN(116, "HIN", 1, | |
| 374 | 374 | -1, UNIPHIER_PIN_DRV_FIXED_5, |
| 375 | 375 | -1, UNIPHIER_PIN_PULL_NONE), |
| 376 | − UNIPHIER_PINCTRL_PIN(117, "VIN", UNIPHIER_PIN_IECTRL_NONE, | |
| 376 | + UNIPHIER_PINCTRL_PIN(117, "VIN", 2, | |
| 377 | 377 | -1, UNIPHIER_PIN_DRV_FIXED_5, |
| 378 | 378 | -1, UNIPHIER_PIN_PULL_NONE), |
| 379 | − UNIPHIER_PINCTRL_PIN(118, "TCON0", UNIPHIER_PIN_IECTRL_NONE, | |
| 379 | + UNIPHIER_PINCTRL_PIN(118, "TCON0", 0, | |
| 380 | 380 | 101, UNIPHIER_PIN_DRV_4_8, |
| 381 | 381 | 101, UNIPHIER_PIN_PULL_DOWN), |
| 382 | − UNIPHIER_PINCTRL_PIN(119, "TCON1", UNIPHIER_PIN_IECTRL_NONE, | |
| 382 | + UNIPHIER_PINCTRL_PIN(119, "TCON1", 0, | |
| 383 | 383 | 102, UNIPHIER_PIN_DRV_4_8, |
| 384 | 384 | 102, UNIPHIER_PIN_PULL_DOWN), |
| 385 | − UNIPHIER_PINCTRL_PIN(120, "TCON2", UNIPHIER_PIN_IECTRL_NONE, | |
| 385 | + UNIPHIER_PINCTRL_PIN(120, "TCON2", 0, | |
| 386 | 386 | 103, UNIPHIER_PIN_DRV_4_8, |
| 387 | 387 | 103, UNIPHIER_PIN_PULL_DOWN), |
| 388 | − UNIPHIER_PINCTRL_PIN(121, "TCON3", UNIPHIER_PIN_IECTRL_NONE, | |
| 388 | + UNIPHIER_PINCTRL_PIN(121, "TCON3", 0, | |
| 389 | 389 | 104, UNIPHIER_PIN_DRV_4_8, |
| 390 | 390 | 104, UNIPHIER_PIN_PULL_DOWN), |
| 391 | − UNIPHIER_PINCTRL_PIN(122, "TCON4", UNIPHIER_PIN_IECTRL_NONE, | |
| 391 | + UNIPHIER_PINCTRL_PIN(122, "TCON4", 0, | |
| 392 | 392 | 105, UNIPHIER_PIN_DRV_4_8, |
| 393 | 393 | 105, UNIPHIER_PIN_PULL_DOWN), |
| 394 | − UNIPHIER_PINCTRL_PIN(123, "TCON5", UNIPHIER_PIN_IECTRL_NONE, | |
| 394 | + UNIPHIER_PINCTRL_PIN(123, "TCON5", 0, | |
| 395 | 395 | 106, UNIPHIER_PIN_DRV_4_8, |
| 396 | 396 | 106, UNIPHIER_PIN_PULL_DOWN), |
| 397 | − UNIPHIER_PINCTRL_PIN(124, "TCON6", UNIPHIER_PIN_IECTRL_NONE, | |
| 397 | + UNIPHIER_PINCTRL_PIN(124, "TCON6", 0, | |
| 398 | 398 | 107, UNIPHIER_PIN_DRV_4_8, |
| 399 | 399 | 107, UNIPHIER_PIN_PULL_DOWN), |
| 400 | − UNIPHIER_PINCTRL_PIN(125, "TCON7", UNIPHIER_PIN_IECTRL_NONE, | |
| 400 | + UNIPHIER_PINCTRL_PIN(125, "TCON7", 0, | |
| 401 | 401 | 108, UNIPHIER_PIN_DRV_4_8, |
| 402 | 402 | 108, UNIPHIER_PIN_PULL_DOWN), |
| 403 | − UNIPHIER_PINCTRL_PIN(126, "TCON8", UNIPHIER_PIN_IECTRL_NONE, | |
| 403 | + UNIPHIER_PINCTRL_PIN(126, "TCON8", 0, | |
| 404 | 404 | 109, UNIPHIER_PIN_DRV_4_8, |
| 405 | 405 | 109, UNIPHIER_PIN_PULL_DOWN), |
| 406 | − UNIPHIER_PINCTRL_PIN(127, "PWMA", UNIPHIER_PIN_IECTRL_NONE, | |
| 406 | + UNIPHIER_PINCTRL_PIN(127, "PWMA", 0, | |
| 407 | 407 | 110, UNIPHIER_PIN_DRV_4_8, |
| 408 | 408 | 110, UNIPHIER_PIN_PULL_DOWN), |
| 409 | − UNIPHIER_PINCTRL_PIN(128, "XIRQ0", UNIPHIER_PIN_IECTRL_NONE, | |
| 409 | + UNIPHIER_PINCTRL_PIN(128, "XIRQ0", 0, | |
| 410 | 410 | 111, UNIPHIER_PIN_DRV_4_8, |
| 411 | 411 | 111, UNIPHIER_PIN_PULL_DOWN), |
| 412 | − UNIPHIER_PINCTRL_PIN(129, "XIRQ1", UNIPHIER_PIN_IECTRL_NONE, | |
| 412 | + UNIPHIER_PINCTRL_PIN(129, "XIRQ1", 0, | |
| 413 | 413 | 112, UNIPHIER_PIN_DRV_4_8, |
| 414 | 414 | 112, UNIPHIER_PIN_PULL_DOWN), |
| 415 | − UNIPHIER_PINCTRL_PIN(130, "XIRQ2", UNIPHIER_PIN_IECTRL_NONE, | |
| 415 | + UNIPHIER_PINCTRL_PIN(130, "XIRQ2", 0, | |
| 416 | 416 | 113, UNIPHIER_PIN_DRV_4_8, |
| 417 | 417 | 113, UNIPHIER_PIN_PULL_DOWN), |
| 418 | − UNIPHIER_PINCTRL_PIN(131, "XIRQ3", UNIPHIER_PIN_IECTRL_NONE, | |
| 418 | + UNIPHIER_PINCTRL_PIN(131, "XIRQ3", 0, | |
| 419 | 419 | 114, UNIPHIER_PIN_DRV_4_8, |
| 420 | 420 | 114, UNIPHIER_PIN_PULL_DOWN), |
| 421 | − UNIPHIER_PINCTRL_PIN(132, "XIRQ4", UNIPHIER_PIN_IECTRL_NONE, | |
| 421 | + UNIPHIER_PINCTRL_PIN(132, "XIRQ4", 0, | |
| 422 | 422 | 115, UNIPHIER_PIN_DRV_4_8, |
| 423 | 423 | 115, UNIPHIER_PIN_PULL_DOWN), |
| 424 | − UNIPHIER_PINCTRL_PIN(133, "XIRQ5", UNIPHIER_PIN_IECTRL_NONE, | |
| 424 | + UNIPHIER_PINCTRL_PIN(133, "XIRQ5", 0, | |
| 425 | 425 | 116, UNIPHIER_PIN_DRV_4_8, |
| 426 | 426 | 116, UNIPHIER_PIN_PULL_DOWN), |
| 427 | − UNIPHIER_PINCTRL_PIN(134, "XIRQ6", UNIPHIER_PIN_IECTRL_NONE, | |
| 427 | + UNIPHIER_PINCTRL_PIN(134, "XIRQ6", 0, | |
| 428 | 428 | 117, UNIPHIER_PIN_DRV_4_8, |
| 429 | 429 | 117, UNIPHIER_PIN_PULL_DOWN), |
| 430 | − UNIPHIER_PINCTRL_PIN(135, "XIRQ7", UNIPHIER_PIN_IECTRL_NONE, | |
| 430 | + UNIPHIER_PINCTRL_PIN(135, "XIRQ7", 0, | |
| 431 | 431 | 118, UNIPHIER_PIN_DRV_4_8, |
| 432 | 432 | 118, UNIPHIER_PIN_PULL_DOWN), |
| 433 | 433 | }; |
| @@ -116,7 +116,7 @@ static int sca3000_read_first_n_hw_rb(struct iio_buffer *r, · 115 unmodified lines | ||
| 116 | 116 | if (ret) |
| 117 | 117 | goto error_ret; |
| 118 | 118 | |
| 119 | − for (i = 0; i < num_read; i++) | |
| 119 | + for (i = 0; i < num_read / sizeof(u16); i++) | |
| 120 | 120 | *(((u16 *)rx) + i) = be16_to_cpup((__be16 *)rx + i); |
| 121 | 121 | |
| 122 | 122 | if (copy_to_user(buf, rx, num_read)) |
| @@ -915,11 +915,12 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev, · 914 unmodified lines | ||
| 915 | 915 | case IIO_CHAN_INFO_OFFSET: |
| 916 | 916 | if (chan->type == IIO_TEMP) { |
| 917 | 917 | /* The calculated value from the ADC is in Kelvin, we |
| 918 | − * want Celsius for hwmon so the offset is | |
| 919 | − * -272.15 * scale | |
| 918 | + * want Celsius for hwmon so the offset is -273.15 | |
| 919 | + * The offset is applied before scaling so it is | |
| 920 | + * actually -213.15 * 4 / 1.012 = -1079.644268 | |
| 920 | 921 | */ |
| 921 | − *val = -1075; | |
| 922 | − *val2 = 691699; | |
| 922 | + *val = -1079; | |
| 923 | + *val2 = 644268; | |
| 923 | 924 | |
| 924 | 925 | return IIO_VAL_INT_PLUS_MICRO; |
| 925 | 926 | } |
| @@ -224,7 +224,7 @@ static int ll_dir_filler(void *_hash, struct page *page0) · 223 unmodified lines | ||
| 224 | 224 | |
| 225 | 225 | prefetchw(&page->flags); |
| 226 | 226 | ret = add_to_page_cache_lru(page, inode->i_mapping, offset, |
| 227 | − GFP_KERNEL); | |
| 227 | + GFP_NOFS); | |
| 228 | 228 | if (ret == 0) { |
| 229 | 229 | unlock_page(page); |
| 230 | 230 | } else { |
| @@ -932,7 +932,7 @@ static void exynos4412_tmu_set_emulation(struct exynos_tmu_data *data, · 931 unmodified lines | ||
| 932 | 932 | |
| 933 | 933 | if (data->soc == SOC_ARCH_EXYNOS5260) |
| 934 | 934 | emul_con = EXYNOS5260_EMUL_CON; |
| 935 | − if (data->soc == SOC_ARCH_EXYNOS5433) | |
| 935 | + else if (data->soc == SOC_ARCH_EXYNOS5433) | |
| 936 | 936 | emul_con = EXYNOS5433_TMU_EMUL_CON; |
| 937 | 937 | else if (data->soc == SOC_ARCH_EXYNOS7) |
| 938 | 938 | emul_con = EXYNOS7_TMU_REG_EMUL_CON; |
| @@ -80,10 +80,6 @@ int serial8250_tx_dma(struct uart_8250_port *p) · 79 unmodified lines | ||
| 80 | 80 | return 0; |
| 81 | 81 | |
| 82 | 82 | dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); |
| 83 | − if (dma->tx_size < p->port.fifosize) { | |
| 84 | − ret = -EINVAL; | |
| 85 | − goto err; | |
| 86 | − } | |
| 87 | 83 | |
| 88 | 84 | desc = dmaengine_prep_slave_single(dma->txchan, |
| 89 | 85 | dma->tx_addr + xmit->tail, |
| @@ -147,6 +147,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) · 146 unmodified lines | ||
| 147 | 147 | if (pdev->vendor == PCI_VENDOR_ID_INTEL && |
| 148 | 148 | pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) { |
| 149 | 149 | xhci->quirks |= XHCI_SPURIOUS_REBOOT; |
| 150 | + xhci->quirks |= XHCI_SPURIOUS_WAKEUP; | |
| 150 | 151 | } |
| 151 | 152 | if (pdev->vendor == PCI_VENDOR_ID_INTEL && |
| 152 | 153 | (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI || |
| @@ -2191,6 +2191,10 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, · 2190 unmodified lines | ||
| 2191 | 2191 | } |
| 2192 | 2192 | /* Fast path - was this the last TRB in the TD for this URB? */ |
| 2193 | 2193 | } else if (event_trb == td->last_trb) { |
| 2194 | + if (td->urb_length_set && trb_comp_code == COMP_SHORT_TX) | |
| 2195 | + return finish_td(xhci, td, event_trb, event, ep, | |
| 2196 | + status, false); | |
| 2197 | + | |
| 2194 | 2198 | if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { |
| 2195 | 2199 | td->urb->actual_length = |
| 2196 | 2200 | td->urb->transfer_buffer_length - |
| @@ -2242,6 +2246,12 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, · 45 unmodified lines | ||
| 2242 | 2246 | td->urb->actual_length += |
| 2243 | 2247 | TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) - |
| 2244 | 2248 | EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); |
| 2249 | + | |
| 2250 | + if (trb_comp_code == COMP_SHORT_TX) { | |
| 2251 | + xhci_dbg(xhci, "mid bulk/intr SP, wait for last TRB event\n"); | |
| 2252 | + td->urb_length_set = true; | |
| 2253 | + return 0; | |
| 2254 | + } | |
| 2245 | 2255 | } |
| 2246 | 2256 | |
| 2247 | 2257 | return finish_td(xhci, td, event_trb, event, ep, status, false); |
| @@ -2274,6 +2284,7 @@ static int handle_tx_event(struct xhci_hcd *xhci, · 26 unmodified lines | ||
| 2274 | 2284 | u32 trb_comp_code; |
| 2275 | 2285 | int ret = 0; |
| 2276 | 2286 | int td_num = 0; |
| 2287 | + bool handling_skipped_tds = false; | |
| 2277 | 2288 | |
| 2278 | 2289 | slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); |
| 2279 | 2290 | xdev = xhci->devs[slot_id]; |
| @@ -2410,6 +2421,10 @@ static int handle_tx_event(struct xhci_hcd *xhci, · 130 unmodified lines | ||
| 2410 | 2421 | ep->skip = true; |
| 2411 | 2422 | xhci_dbg(xhci, "Miss service interval error, set skip flag\n"); |
| 2412 | 2423 | goto cleanup; |
| 2424 | + case COMP_PING_ERR: | |
| 2425 | + ep->skip = true; | |
| 2426 | + xhci_dbg(xhci, "No Ping response error, Skip one Isoc TD\n"); | |
| 2427 | + goto cleanup; | |
| 2413 | 2428 | default: |
| 2414 | 2429 | if (xhci_is_vendor_info_code(xhci, trb_comp_code)) { |
| 2415 | 2430 | status = 0; |
| @@ -2546,13 +2561,18 @@ static int handle_tx_event(struct xhci_hcd *xhci, · 130 unmodified lines | ||
| 2546 | 2561 | ep, &status); |
| 2547 | 2562 | |
| 2548 | 2563 | cleanup: |
| 2564 | + | |
| 2565 | + | |
| 2566 | + handling_skipped_tds = ep->skip && | |
| 2567 | + trb_comp_code != COMP_MISSED_INT && | |
| 2568 | + trb_comp_code != COMP_PING_ERR; | |
| 2569 | + | |
| 2549 | 2570 | /* |
| 2550 | − * Do not update event ring dequeue pointer if ep->skip is set. | |
| 2551 | − * Will roll back to continue process missed tds. | |
| 2571 | + * Do not update event ring dequeue pointer if we're in a loop | |
| 2572 | + * processing missed tds. | |
| 2552 | 2573 | */ |
| 2553 | − if (trb_comp_code == COMP_MISSED_INT || !ep->skip) { | |
| 2574 | + if (!handling_skipped_tds) | |
| 2554 | 2575 | inc_deq(xhci, xhci->event_ring); |
| 2555 | − } | |
| 2556 | 2576 | |
| 2557 | 2577 | if (ret) { |
| 2558 | 2578 | urb = td->urb; |
| @@ -2587,7 +2607,7 @@ cleanup: · 28 unmodified lines | ||
| 2587 | 2607 | * Process them as short transfer until reach the td pointed by |
| 2588 | 2608 | * the event. |
| 2589 | 2609 | */ |
| 2590 | − } while (ep->skip && trb_comp_code != COMP_MISSED_INT); | |
| 2610 | + } while (handling_skipped_tds); | |
| 2591 | 2611 | |
| 2592 | 2612 | return 0; |
| 2593 | 2613 | } |
| @@ -1093,6 +1093,7 @@ static void fbcon_init(struct vc_data *vc, int init) · 1092 unmodified lines | ||
| 1093 | 1093 | con_copy_unimap(vc, svc); |
| 1094 | 1094 | |
| 1095 | 1095 | ops = info->fbcon_par; |
| 1096 | + ops->cur_blink_jiffies = msecs_to_jiffies(vc->vc_cur_blink_ms); | |
| 1096 | 1097 | p->con_rotate = initial_rotation; |
| 1097 | 1098 | set_blitting_type(vc, info); |
| 1098 | 1099 | |
| @@ -1828,7 +1828,6 @@ static int iterate_inode_extrefs(u64 inum, struct btrfs_root *fs_root, · 1827 unmodified lines | ||
| 1828 | 1828 | int found = 0; |
| 1829 | 1829 | struct extent_buffer *eb; |
| 1830 | 1830 | struct btrfs_inode_extref *extref; |
| 1831 | − struct extent_buffer *leaf; | |
| 1832 | 1831 | u32 item_size; |
| 1833 | 1832 | u32 cur_offset; |
| 1834 | 1833 | unsigned long ptr; |
| @@ -1856,9 +1855,8 @@ static int iterate_inode_extrefs(u64 inum, struct btrfs_root *fs_root, · 21 unmodified lines | ||
| 1856 | 1855 | btrfs_set_lock_blocking_rw(eb, BTRFS_READ_LOCK); |
| 1857 | 1856 | btrfs_release_path(path); |
| 1858 | 1857 | |
| 1859 | − leaf = path->nodes[0]; | |
| 1860 | − item_size = btrfs_item_size_nr(leaf, slot); | |
| 1861 | − ptr = btrfs_item_ptr_offset(leaf, slot); | |
| 1858 | + item_size = btrfs_item_size_nr(eb, slot); | |
| 1859 | + ptr = btrfs_item_ptr_offset(eb, slot); | |
| 1862 | 1860 | cur_offset = 0; |
| 1863 | 1861 | |
| 1864 | 1862 | while (cur_offset < item_size) { |
| @@ -1872,7 +1870,7 @@ static int iterate_inode_extrefs(u64 inum, struct btrfs_root *fs_root, · 7 unmodified lines | ||
| 1872 | 1870 | if (ret) |
| 1873 | 1871 | break; |
| 1874 | 1872 | |
| 1875 | − cur_offset += btrfs_inode_extref_name_len(leaf, extref); | |
| 1873 | + cur_offset += btrfs_inode_extref_name_len(eb, extref); | |
| 1876 | 1874 | cur_offset += sizeof(*extref); |
| 1877 | 1875 | } |
| 1878 | 1876 | btrfs_tree_read_unlock_blocking(eb); |
| @@ -2584,7 +2584,7 @@ static long btrfs_fallocate(struct file *file, int mode, · 2583 unmodified lines | ||
| 2584 | 2584 | alloc_start); |
| 2585 | 2585 | if (ret) |
| 2586 | 2586 | goto out; |
| 2587 | − } else { | |
| 2587 | + } else if (offset + len > inode->i_size) { | |
| 2588 | 2588 | /* |
| 2589 | 2589 | * If we are fallocating from the end of the file onward we |
| 2590 | 2590 | * need to zero out the end of the page if i_size lands in the |
| @@ -4639,6 +4639,11 @@ locked: · 4638 unmodified lines | ||
| 4639 | 4639 | bctl->flags |= BTRFS_BALANCE_TYPE_MASK; |
| 4640 | 4640 | } |
| 4641 | 4641 | |
| 4642 | + if (bctl->flags & ~(BTRFS_BALANCE_ARGS_MASK | BTRFS_BALANCE_TYPE_MASK)) { | |
| 4643 | + ret = -EINVAL; | |
| 4644 | + goto out_bctl; | |
| 4645 | + } | |
| 4646 | + | |
| 4642 | 4647 | do_balance: |
| 4643 | 4648 | /* |
| 4644 | 4649 | * Ownership of bctl and mutually_exclusive_operation_running |
| @@ -4650,12 +4655,15 @@ do_balance: · 5 unmodified lines | ||
| 4650 | 4655 | need_unlock = false; |
| 4651 | 4656 | |
| 4652 | 4657 | ret = btrfs_balance(bctl, bargs); |
| 4658 | + bctl = NULL; | |
| 4653 | 4659 | |
| 4654 | 4660 | if (arg) { |
| 4655 | 4661 | if (copy_to_user(arg, bargs, sizeof(*bargs))) |
| 4656 | 4662 | ret = -EFAULT; |
| 4657 | 4663 | } |
| 4658 | 4664 | |
| 4665 | +out_bctl: | |
| 4666 | + kfree(bctl); | |
| 4659 | 4667 | out_bargs: |
| 4660 | 4668 | kfree(bargs); |
| 4661 | 4669 | out_unlock: |
| @@ -376,6 +376,14 @@ struct map_lookup { · 375 unmodified lines | ||
| 376 | 376 | #define BTRFS_BALANCE_ARGS_VRANGE (1ULL << 4) |
| 377 | 377 | #define BTRFS_BALANCE_ARGS_LIMIT (1ULL << 5) |
| 378 | 378 | |
| 379 | +#define BTRFS_BALANCE_ARGS_MASK \ | |
| 380 | + (BTRFS_BALANCE_ARGS_PROFILES | \ | |
| 381 | + BTRFS_BALANCE_ARGS_USAGE | \ | |
| 382 | + BTRFS_BALANCE_ARGS_DEVID | \ | |
| 383 | + BTRFS_BALANCE_ARGS_DRANGE | \ | |
| 384 | + BTRFS_BALANCE_ARGS_VRANGE | \ | |
| 385 | + BTRFS_BALANCE_ARGS_LIMIT) | |
| 386 | + | |
| 379 | 387 | /* |
| 380 | 388 | * Profile changing flags. When SOFT is set we won't relocate chunk if |
| 381 | 389 | * it already has the target profile (even though it may be |
| @@ -3380,6 +3380,7 @@ readpages_get_pages(struct address_space *mapping, struct list_head *page_list, · 3379 unmodified lines | ||
| 3380 | 3380 | struct page *page, *tpage; |
| 3381 | 3381 | unsigned int expected_index; |
| 3382 | 3382 | int rc; |
| 3383 | + gfp_t gfp = GFP_KERNEL & mapping_gfp_mask(mapping); | |
| 3383 | 3384 | |
| 3384 | 3385 | INIT_LIST_HEAD(tmplist); |
| 3385 | 3386 | |
| @@ -3392,7 +3393,7 @@ readpages_get_pages(struct address_space *mapping, struct list_head *page_list, · 6 unmodified lines | ||
| 3392 | 3393 | */ |
| 3393 | 3394 | __set_page_locked(page); |
| 3394 | 3395 | rc = add_to_page_cache_locked(page, mapping, |
| 3395 | − page->index, GFP_KERNEL); | |
| 3396 | + page->index, gfp); | |
| 3396 | 3397 | |
| 3397 | 3398 | /* give up if we can't stick it in the cache */ |
| 3398 | 3399 | if (rc) { |
| @@ -3418,8 +3419,7 @@ readpages_get_pages(struct address_space *mapping, struct list_head *page_list, · 19 unmodified lines | ||
| 3418 | 3419 | break; |
| 3419 | 3420 | |
| 3420 | 3421 | __set_page_locked(page); |
| 3421 | − if (add_to_page_cache_locked(page, mapping, page->index, | |
| 3422 | − GFP_KERNEL)) { | |
| 3422 | + if (add_to_page_cache_locked(page, mapping, page->index, gfp)) { | |
| 3423 | 3423 | __clear_page_locked(page); |
| 3424 | 3424 | break; |
| 3425 | 3425 | } |
| @@ -285,6 +285,7 @@ static int copy_user_bh(struct page *to, struct buffer_head *bh, · 284 unmodified lines | ||
| 285 | 285 | static int dax_insert_mapping(struct inode *inode, struct buffer_head *bh, |
| 286 | 286 | struct vm_area_struct *vma, struct vm_fault *vmf) |
| 287 | 287 | { |
| 288 | + struct address_space *mapping = inode->i_mapping; | |
| 288 | 289 | sector_t sector = bh->b_blocknr << (inode->i_blkbits - 9); |
| 289 | 290 | unsigned long vaddr = (unsigned long)vmf->virtual_address; |
| 290 | 291 | void __pmem *addr; |
| @@ -292,6 +293,8 @@ static int dax_insert_mapping(struct inode *inode, struct buffer_head *bh, · 1 unmodified line | ||
| 292 | 293 | pgoff_t size; |
| 293 | 294 | int error; |
| 294 | 295 | |
| 296 | + i_mmap_lock_read(mapping); | |
| 297 | + | |
| 295 | 298 | /* |
| 296 | 299 | * Check truncate didn't happen while we were allocating a block. |
| 297 | 300 | * If it did, this block may or may not be still allocated to the |
| @@ -321,6 +324,8 @@ static int dax_insert_mapping(struct inode *inode, struct buffer_head *bh, · 23 unmodified lines | ||
| 321 | 324 | error = vm_insert_mixed(vma, vaddr, pfn); |
| 322 | 325 | |
| 323 | 326 | out: |
| 327 | + i_mmap_unlock_read(mapping); | |
| 328 | + | |
| 324 | 329 | return error; |
| 325 | 330 | } |
| 326 | 331 | |
| @@ -382,17 +387,15 @@ int __dax_fault(struct vm_area_struct *vma, struct vm_fault *vmf, · 55 unmodified lines | ||
| 382 | 387 | * from a read fault and we've raced with a truncate |
| 383 | 388 | */ |
| 384 | 389 | error = -EIO; |
| 385 | − goto unlock; | |
| 390 | + goto unlock_page; | |
| 386 | 391 | } |
| 387 | − } else { | |
| 388 | − i_mmap_lock_write(mapping); | |
| 389 | 392 | } |
| 390 | 393 | |
| 391 | 394 | error = get_block(inode, block, &bh, 0); |
| 392 | 395 | if (!error && (bh.b_size < PAGE_SIZE)) |
| 393 | 396 | error = -EIO; /* fs corruption? */ |
| 394 | 397 | if (error) |
| 395 | − goto unlock; | |
| 398 | + goto unlock_page; | |
| 396 | 399 | |
| 397 | 400 | if (!buffer_mapped(&bh) && !buffer_unwritten(&bh) && !vmf->cow_page) { |
| 398 | 401 | if (vmf->flags & FAULT_FLAG_WRITE) { |
| @@ -403,9 +406,8 @@ int __dax_fault(struct vm_area_struct *vma, struct vm_fault *vmf, · 4 unmodified lines | ||
| 403 | 406 | if (!error && (bh.b_size < PAGE_SIZE)) |
| 404 | 407 | error = -EIO; |
| 405 | 408 | if (error) |
| 406 | − goto unlock; | |
| 409 | + goto unlock_page; | |
| 407 | 410 | } else { |
| 408 | − i_mmap_unlock_write(mapping); | |
| 409 | 411 | return dax_load_hole(mapping, page, vmf); |
| 410 | 412 | } |
| 411 | 413 | } |
| @@ -417,15 +419,17 @@ int __dax_fault(struct vm_area_struct *vma, struct vm_fault *vmf, · 5 unmodified lines | ||
| 417 | 419 | else |
| 418 | 420 | clear_user_highpage(new_page, vaddr); |
| 419 | 421 | if (error) |
| 420 | − goto unlock; | |
| 422 | + goto unlock_page; | |
| 421 | 423 | vmf->page = page; |
| 422 | 424 | if (!page) { |
| 425 | + i_mmap_lock_read(mapping); | |
| 423 | 426 | /* Check we didn't race with truncate */ |
| 424 | 427 | size = (i_size_read(inode) + PAGE_SIZE - 1) >> |
| 425 | 428 | PAGE_SHIFT; |
| 426 | 429 | if (vmf->pgoff >= size) { |
| 430 | + i_mmap_unlock_read(mapping); | |
| 427 | 431 | error = -EIO; |
| 428 | − goto unlock; | |
| 432 | + goto out; | |
| 429 | 433 | } |
| 430 | 434 | } |
| 431 | 435 | return VM_FAULT_LOCKED; |
| @@ -461,8 +465,6 @@ int __dax_fault(struct vm_area_struct *vma, struct vm_fault *vmf, · 29 unmodified lines | ||
| 461 | 465 | WARN_ON_ONCE(!(vmf->flags & FAULT_FLAG_WRITE)); |
| 462 | 466 | } |
| 463 | 467 | |
| 464 | − if (!page) | |
| 465 | − i_mmap_unlock_write(mapping); | |
| 466 | 468 | out: |
| 467 | 469 | if (error == -ENOMEM) |
| 468 | 470 | return VM_FAULT_OOM | major; |
| @@ -471,14 +473,11 @@ int __dax_fault(struct vm_area_struct *vma, struct vm_fault *vmf, · 2 unmodified lines | ||
| 471 | 473 | return VM_FAULT_SIGBUS | major; |
| 472 | 474 | return VM_FAULT_NOPAGE | major; |
| 473 | 475 | |
| 474 | − unlock: | |
| 476 | + unlock_page: | |
| 475 | 477 | if (page) { |
| 476 | 478 | unlock_page(page); |
| 477 | 479 | page_cache_release(page); |
| 478 | − } else { | |
| 479 | − i_mmap_unlock_write(mapping); | |
| 480 | 480 | } |
| 481 | − | |
| 482 | 481 | goto out; |
| 483 | 482 | } |
| 484 | 483 | EXPORT_SYMBOL(__dax_fault); |
| @@ -556,10 +555,10 @@ int __dax_pmd_fault(struct vm_area_struct *vma, unsigned long address, · 71 unmodified lines | ||
| 556 | 555 | block = (sector_t)pgoff << (PAGE_SHIFT - blkbits); |
| 557 | 556 | |
| 558 | 557 | bh.b_size = PMD_SIZE; |
| 559 | − i_mmap_lock_write(mapping); | |
| 560 | 558 | length = get_block(inode, block, &bh, write); |
| 561 | 559 | if (length) |
| 562 | 560 | return VM_FAULT_SIGBUS; |
| 561 | + i_mmap_lock_read(mapping); | |
| 563 | 562 | |
| 564 | 563 | /* |
| 565 | 564 | * If the filesystem isn't willing to tell us the length of a hole, |
| @@ -569,36 +568,14 @@ int __dax_pmd_fault(struct vm_area_struct *vma, unsigned long address, · 3 unmodified lines | ||
| 569 | 568 | if (!buffer_size_valid(&bh) || bh.b_size < PMD_SIZE) |
| 570 | 569 | goto fallback; |
| 571 | 570 | |
| 572 | − sector = bh.b_blocknr << (blkbits - 9); | |
| 573 | − | |
| 574 | − if (buffer_unwritten(&bh) || buffer_new(&bh)) { | |
| 575 | − int i; | |
| 576 | − | |
| 577 | − length = bdev_direct_access(bh.b_bdev, sector, &kaddr, &pfn, | |
| 578 | − bh.b_size); | |
| 579 | − if (length < 0) { | |
| 580 | − result = VM_FAULT_SIGBUS; | |
| 581 | − goto out; | |
| 582 | − } | |
| 583 | − if ((length < PMD_SIZE) || (pfn & PG_PMD_COLOUR)) | |
| 584 | − goto fallback; | |
| 585 | − | |
| 586 | − for (i = 0; i < PTRS_PER_PMD; i++) | |
| 587 | − clear_pmem(kaddr + i * PAGE_SIZE, PAGE_SIZE); | |
| 588 | − wmb_pmem(); | |
| 589 | − count_vm_event(PGMAJFAULT); | |
| 590 | − mem_cgroup_count_vm_event(vma->vm_mm, PGMAJFAULT); | |
| 591 | − result |= VM_FAULT_MAJOR; | |
| 592 | − } | |
| 593 | − | |
| 594 | 571 | /* |
| 595 | 572 | * If we allocated new storage, make sure no process has any |
| 596 | 573 | * zero pages covering this hole |
| 597 | 574 | */ |
| 598 | 575 | if (buffer_new(&bh)) { |
| 599 | − i_mmap_unlock_write(mapping); | |
| 576 | + i_mmap_unlock_read(mapping); | |
| 600 | 577 | unmap_mapping_range(mapping, pgoff << PAGE_SHIFT, PMD_SIZE, 0); |
| 601 | − i_mmap_lock_write(mapping); | |
| 578 | + i_mmap_lock_read(mapping); | |
| 602 | 579 | } |
| 603 | 580 | |
| 604 | 581 | /* |
| @@ -635,6 +612,7 @@ int __dax_pmd_fault(struct vm_area_struct *vma, unsigned long address, · 30 unmodified lines | ||
| 635 | 612 | result = VM_FAULT_NOPAGE; |
| 636 | 613 | spin_unlock(ptl); |
| 637 | 614 | } else { |
| 615 | + sector = bh.b_blocknr << (blkbits - 9); | |
| 638 | 616 | length = bdev_direct_access(bh.b_bdev, sector, &kaddr, &pfn, |
| 639 | 617 | bh.b_size); |
| 640 | 618 | if (length < 0) { |
| @@ -644,15 +622,25 @@ int __dax_pmd_fault(struct vm_area_struct *vma, unsigned long address, · 3 unmodified lines | ||
| 644 | 622 | if ((length < PMD_SIZE) || (pfn & PG_PMD_COLOUR)) |
| 645 | 623 | goto fallback; |
| 646 | 624 | |
| 625 | + if (buffer_unwritten(&bh) || buffer_new(&bh)) { | |
| 626 | + int i; | |
| 627 | + for (i = 0; i < PTRS_PER_PMD; i++) | |
| 628 | + clear_pmem(kaddr + i * PAGE_SIZE, PAGE_SIZE); | |
| 629 | + wmb_pmem(); | |
| 630 | + count_vm_event(PGMAJFAULT); | |
| 631 | + mem_cgroup_count_vm_event(vma->vm_mm, PGMAJFAULT); | |
| 632 | + result |= VM_FAULT_MAJOR; | |
| 633 | + } | |
| 634 | + | |
| 647 | 635 | result |= vmf_insert_pfn_pmd(vma, address, pmd, pfn, write); |
| 648 | 636 | } |
| 649 | 637 | |
| 650 | 638 | out: |
| 639 | + i_mmap_unlock_read(mapping); | |
| 640 | + | |
| 651 | 641 | if (buffer_unwritten(&bh)) |
| 652 | 642 | complete_unwritten(&bh, !(result & VM_FAULT_ERROR)); |
| 653 | 643 | |
| 654 | − i_mmap_unlock_write(mapping); | |
| 655 | − | |
| 656 | 644 | return result; |
| 657 | 645 | |
| 658 | 646 | fallback: |
| @@ -63,7 +63,7 @@ config EXT4_FS · 62 unmodified lines | ||
| 63 | 63 | If unsure, say N. |
| 64 | 64 | |
| 65 | 65 | config EXT4_USE_FOR_EXT2 |
| 66 | − bool "Use ext4 for ext2/ext3 file systems" | |
| 66 | + bool "Use ext4 for ext2 file systems" | |
| 67 | 67 | depends on EXT4_FS |
| 68 | 68 | depends on EXT2_FS=n |
| 69 | 69 | default y |
| @@ -165,8 +165,8 @@ int ext4_mpage_readpages(struct address_space *mapping, · 164 unmodified lines | ||
| 165 | 165 | if (pages) { |
| 166 | 166 | page = list_entry(pages->prev, struct page, lru); |
| 167 | 167 | list_del(&page->lru); |
| 168 | − if (add_to_page_cache_lru(page, mapping, | |
| 169 | − page->index, GFP_KERNEL)) | |
| 168 | + if (add_to_page_cache_lru(page, mapping, page->index, | |
| 169 | + GFP_KERNEL & mapping_gfp_mask(mapping))) | |
| 170 | 170 | goto next_page; |
| 171 | 171 | } |
| 172 | 172 | |
| @@ -778,19 +778,24 @@ static void bdi_split_work_to_wbs(struct backing_dev_info *bdi, · 777 unmodified lines | ||
| 778 | 778 | struct wb_writeback_work *base_work, |
| 779 | 779 | bool skip_if_busy) |
| 780 | 780 | { |
| 781 | − int next_memcg_id = 0; | |
| 782 | − struct bdi_writeback *wb; | |
| 783 | − struct wb_iter iter; | |
| 781 | + struct bdi_writeback *last_wb = NULL; | |
| 782 | + struct bdi_writeback *wb = list_entry_rcu(&bdi->wb_list, | |
| 783 | + struct bdi_writeback, bdi_node); | |
| 784 | 784 | |
| 785 | 785 | might_sleep(); |
| 786 | 786 | restart: |
| 787 | 787 | rcu_read_lock(); |
| 788 | − bdi_for_each_wb(wb, bdi, &iter, next_memcg_id) { | |
| 788 | + list_for_each_entry_continue_rcu(wb, &bdi->wb_list, bdi_node) { | |
| 789 | 789 | DEFINE_WB_COMPLETION_ONSTACK(fallback_work_done); |
| 790 | 790 | struct wb_writeback_work fallback_work; |
| 791 | 791 | struct wb_writeback_work *work; |
| 792 | 792 | long nr_pages; |
| 793 | 793 | |
| 794 | + if (last_wb) { | |
| 795 | + wb_put(last_wb); | |
| 796 | + last_wb = NULL; | |
| 797 | + } | |
| 798 | + | |
| 794 | 799 | /* SYNC_ALL writes out I_DIRTY_TIME too */ |
| 795 | 800 | if (!wb_has_dirty_io(wb) && |
| 796 | 801 | (base_work->sync_mode == WB_SYNC_NONE || |
| @@ -819,12 +824,22 @@ restart: · 22 unmodified lines | ||
| 819 | 824 | |
| 820 | 825 | wb_queue_work(wb, work); |
| 821 | 826 | |
| 822 | − next_memcg_id = wb->memcg_css->id + 1; | |
| 827 | + /* | |
| 828 | + * Pin @wb so that it stays on @bdi->wb_list. This allows | |
| 829 | + * continuing iteration from @wb after dropping and | |
| 830 | + * regrabbing rcu read lock. | |
| 831 | + */ | |
| 832 | + wb_get(wb); | |
| 833 | + last_wb = wb; | |
| 834 | + | |
| 823 | 835 | rcu_read_unlock(); |
| 824 | 836 | wb_wait_for_completion(bdi, &fallback_work_done); |
| 825 | 837 | goto restart; |
| 826 | 838 | } |
| 827 | 839 | rcu_read_unlock(); |
| 840 | + | |
| 841 | + if (last_wb) | |
| 842 | + wb_put(last_wb); | |
| 828 | 843 | } |
| 829 | 844 | |
| 830 | 845 | #else /* CONFIG_CGROUP_WRITEBACK */ |
| @@ -1857,12 +1872,11 @@ void wakeup_flusher_threads(long nr_pages, enum wb_reason reason) · 1026 unmodified lines | ||
| 1857 | 1872 | rcu_read_lock(); |
| 1858 | 1873 | list_for_each_entry_rcu(bdi, &bdi_list, bdi_list) { |
| 1859 | 1874 | struct bdi_writeback *wb; |
| 1860 | − struct wb_iter iter; | |
| 1861 | 1875 | |
| 1862 | 1876 | if (!bdi_has_dirty_io(bdi)) |
| 1863 | 1877 | continue; |
| 1864 | 1878 | |
| 1865 | − bdi_for_each_wb(wb, bdi, &iter, 0) | |
| 1879 | + list_for_each_entry_rcu(wb, &bdi->wb_list, bdi_node) | |
| 1866 | 1880 | wb_start_writeback(wb, wb_split_bdi_pages(wb, nr_pages), |
| 1867 | 1881 | false, reason); |
| 1868 | 1882 | } |
| @@ -1894,11 +1908,10 @@ static void wakeup_dirtytime_writeback(struct work_struct *w) · 25 unmodified lines | ||
| 1894 | 1908 | rcu_read_lock(); |
| 1895 | 1909 | list_for_each_entry_rcu(bdi, &bdi_list, bdi_list) { |
| 1896 | 1910 | struct bdi_writeback *wb; |
| 1897 | − struct wb_iter iter; | |
| 1898 | 1911 | |
| 1899 | − bdi_for_each_wb(wb, bdi, &iter, 0) | |
| 1900 | − if (!list_empty(&bdi->wb.b_dirty_time)) | |
| 1901 | − wb_wakeup(&bdi->wb); | |
| 1912 | + list_for_each_entry_rcu(wb, &bdi->wb_list, bdi_node) | |
| 1913 | + if (!list_empty(&wb->b_dirty_time)) | |
| 1914 | + wb_wakeup(wb); | |
| 1902 | 1915 | } |
| 1903 | 1916 | rcu_read_unlock(); |
| 1904 | 1917 | schedule_delayed_work(&dirtytime_work, dirtytime_expire_interval * HZ); |
| @@ -139,7 +139,8 @@ map_buffer_to_page(struct page *page, struct buffer_head *bh, int page_block) · 138 unmodified lines | ||
| 139 | 139 | static struct bio * |
| 140 | 140 | do_mpage_readpage(struct bio *bio, struct page *page, unsigned nr_pages, |
| 141 | 141 | sector_t *last_block_in_bio, struct buffer_head *map_bh, |
| 142 | − unsigned long *first_logical_block, get_block_t get_block) | |
| 142 | + unsigned long *first_logical_block, get_block_t get_block, | |
| 143 | + gfp_t gfp) | |
| 143 | 144 | { |
| 144 | 145 | struct inode *inode = page->mapping->host; |
| 145 | 146 | const unsigned blkbits = inode->i_blkbits; |
| @@ -277,8 +278,7 @@ alloc_new: · 131 unmodified lines | ||
| 277 | 278 | goto out; |
| 278 | 279 | } |
| 279 | 280 | bio = mpage_alloc(bdev, blocks[0] << (blkbits - 9), |
| 280 | − min_t(int, nr_pages, BIO_MAX_PAGES), | |
| 281 | − GFP_KERNEL); | |
| 281 | + min_t(int, nr_pages, BIO_MAX_PAGES), gfp); | |
| 282 | 282 | if (bio == NULL) |
| 283 | 283 | goto confused; |
| 284 | 284 | } |
| @@ -361,6 +361,7 @@ mpage_readpages(struct address_space *mapping, struct list_head *pages, · 76 unmodified lines | ||
| 361 | 361 | sector_t last_block_in_bio = 0; |
| 362 | 362 | struct buffer_head map_bh; |
| 363 | 363 | unsigned long first_logical_block = 0; |
| 364 | + gfp_t gfp = GFP_KERNEL & mapping_gfp_mask(mapping); | |
| 364 | 365 | |
| 365 | 366 | map_bh.b_state = 0; |
| 366 | 367 | map_bh.b_size = 0; |
| @@ -370,12 +371,13 @@ mpage_readpages(struct address_space *mapping, struct list_head *pages, · 3 unmodified lines | ||
| 370 | 371 | prefetchw(&page->flags); |
| 371 | 372 | list_del(&page->lru); |
| 372 | 373 | if (!add_to_page_cache_lru(page, mapping, |
| 373 | − page->index, GFP_KERNEL)) { | |
| 374 | + page->index, | |
| 375 | + gfp)) { | |
| 374 | 376 | bio = do_mpage_readpage(bio, page, |
| 375 | 377 | nr_pages - page_idx, |
| 376 | 378 | &last_block_in_bio, &map_bh, |
| 377 | 379 | &first_logical_block, |
| 378 | − get_block); | |
| 380 | + get_block, gfp); | |
| 379 | 381 | } |
| 380 | 382 | page_cache_release(page); |
| 381 | 383 | } |
| @@ -395,11 +397,12 @@ int mpage_readpage(struct page *page, get_block_t get_block) · 13 unmodified lines | ||
| 395 | 397 | sector_t last_block_in_bio = 0; |
| 396 | 398 | struct buffer_head map_bh; |
| 397 | 399 | unsigned long first_logical_block = 0; |
| 400 | + gfp_t gfp = GFP_KERNEL & mapping_gfp_mask(page->mapping); | |
| 398 | 401 | |
| 399 | 402 | map_bh.b_state = 0; |
| 400 | 403 | map_bh.b_size = 0; |
| 401 | 404 | bio = do_mpage_readpage(bio, page, 1, &last_block_in_bio, |
| 402 | − &map_bh, &first_logical_block, get_block); | |
| 405 | + &map_bh, &first_logical_block, get_block, gfp); | |
| 403 | 406 | if (bio) |
| 404 | 407 | mpage_bio_submit(READ, bio); |
| 405 | 408 | return 0; |
| @@ -56,14 +56,6 @@ nfsd4_block_proc_layoutget(struct inode *inode, const struct svc_fh *fhp, · 55 unmodified lines | ||
| 56 | 56 | u32 device_generation = 0; |
| 57 | 57 | int error; |
| 58 | 58 | |
| 59 | − /* | |
| 60 | − * We do not attempt to support I/O smaller than the fs block size, | |
| 61 | − * or not aligned to it. | |
| 62 | − */ | |
| 63 | − if (args->lg_minlength < block_size) { | |
| 64 | − dprintk("pnfsd: I/O too small\n"); | |
| 65 | − goto out_layoutunavailable; | |
| 66 | − } | |
| 67 | 59 | if (seg->offset & (block_size - 1)) { |
| 68 | 60 | dprintk("pnfsd: I/O misaligned\n"); |
| 69 | 61 | goto out_layoutunavailable; |
| @@ -1658,12 +1658,13 @@ send_response: · 1657 unmodified lines | ||
| 1658 | 1658 | if (ret < 0) { |
| 1659 | 1659 | mlog(ML_ERROR, "failed to dispatch assert master work\n"); |
| 1660 | 1660 | response = DLM_MASTER_RESP_ERROR; |
| 1661 | + spin_unlock(&res->spinlock); | |
| 1661 | 1662 | dlm_lockres_put(res); |
| 1662 | 1663 | } else { |
| 1663 | 1664 | dispatched = 1; |
| 1664 | 1665 | __dlm_lockres_grab_inflight_worker(dlm, res); |
| 1666 | + spin_unlock(&res->spinlock); | |
| 1665 | 1667 | } |
| 1666 | − spin_unlock(&res->spinlock); | |
| 1667 | 1668 | } else { |
| 1668 | 1669 | if (res) |
| 1669 | 1670 | dlm_lockres_put(res); |
| @@ -1723,8 +1723,8 @@ int dlm_master_requery_handler(struct o2net_msg *msg, u32 len, void *data, · 1722 unmodified lines | ||
| 1723 | 1723 | } else { |
| 1724 | 1724 | dispatched = 1; |
| 1725 | 1725 | __dlm_lockres_grab_inflight_worker(dlm, res); |
| 1726 | + spin_unlock(&res->spinlock); | |
| 1726 | 1727 | } |
| 1727 | − spin_unlock(&res->spinlock); | |
| 1728 | 1728 | } else { |
| 1729 | 1729 | /* put.. incase we are not the master */ |
| 1730 | 1730 | spin_unlock(&res->spinlock); |
| @@ -70,6 +70,7 @@ int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize) · 69 unmodified lines | ||
| 70 | 70 | unsigned order; |
| 71 | 71 | void *data; |
| 72 | 72 | int ret; |
| 73 | + gfp_t gfp = mapping_gfp_mask(inode->i_mapping); | |
| 73 | 74 | |
| 74 | 75 | /* make various checks */ |
| 75 | 76 | order = get_order(newsize); |
| @@ -84,7 +85,7 @@ int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize) · 8 unmodified lines | ||
| 84 | 85 | |
| 85 | 86 | /* allocate enough contiguous pages to be able to satisfy the |
| 86 | 87 | * request */ |
| 87 | − pages = alloc_pages(mapping_gfp_mask(inode->i_mapping), order); | |
| 88 | + pages = alloc_pages(gfp, order); | |
| 88 | 89 | if (!pages) |
| 89 | 90 | return -ENOMEM; |
| 90 | 91 | |
| @@ -108,7 +109,7 @@ int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize) · 17 unmodified lines | ||
| 108 | 109 | struct page *page = pages + loop; |
| 109 | 110 | |
| 110 | 111 | ret = add_to_page_cache_lru(page, inode->i_mapping, loop, |
| 111 | − GFP_KERNEL); | |
| 112 | + gfp); | |
| 112 | 113 | if (ret < 0) |
| 113 | 114 | goto add_error; |
| 114 | 115 | |
| @@ -253,6 +253,7 @@ struct drm_dp_remote_dpcd_write { · 252 unmodified lines | ||
| 253 | 253 | u8 *bytes; |
| 254 | 254 | }; |
| 255 | 255 | |
| 256 | +#define DP_REMOTE_I2C_READ_MAX_TRANSACTIONS 4 | |
| 256 | 257 | struct drm_dp_remote_i2c_read { |
| 257 | 258 | u8 num_transactions; |
| 258 | 259 | u8 port_number; |
| @@ -262,7 +263,7 @@ struct drm_dp_remote_i2c_read { · 3 unmodified lines | ||
| 262 | 263 | u8 *bytes; |
| 263 | 264 | u8 no_stop_bit; |
| 264 | 265 | u8 i2c_transaction_delay; |
| 265 | − } transactions[4]; | |
| 266 | + } transactions[DP_REMOTE_I2C_READ_MAX_TRANSACTIONS]; | |
| 266 | 267 | u8 read_i2c_device_id; |
| 267 | 268 | u8 num_bytes_read; |
| 268 | 269 | }; |
| @@ -116,6 +116,8 @@ struct bdi_writeback { · 115 unmodified lines | ||
| 116 | 116 | struct list_head work_list; |
| 117 | 117 | struct delayed_work dwork; /* work item used for writeback */ |
| 118 | 118 | |
| 119 | + struct list_head bdi_node; /* anchored at bdi->wb_list */ | |
| 120 | + | |
| 119 | 121 | #ifdef CONFIG_CGROUP_WRITEBACK |
| 120 | 122 | struct percpu_ref refcnt; /* used only for !root wb's */ |
| 121 | 123 | struct fprop_local_percpu memcg_completions; |
| @@ -150,6 +152,7 @@ struct backing_dev_info { · 28 unmodified lines | ||
| 150 | 152 | atomic_long_t tot_write_bandwidth; |
| 151 | 153 | |
| 152 | 154 | struct bdi_writeback wb; /* the root writeback info for this bdi */ |
| 155 | + struct list_head wb_list; /* list of all wbs */ | |
| 153 | 156 | #ifdef CONFIG_CGROUP_WRITEBACK |
| 154 | 157 | struct radix_tree_root cgwb_tree; /* radix tree of active cgroup wbs */ |
| 155 | 158 | struct rb_root cgwb_congested_tree; /* their congested states */ |
| @@ -19,13 +19,17 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/slab.h> |
| 20 | 20 | |
| 21 | 21 | int __must_check bdi_init(struct backing_dev_info *bdi); |
| 22 | −void bdi_destroy(struct backing_dev_info *bdi); | |
| 22 | +void bdi_exit(struct backing_dev_info *bdi); | |
| 23 | 23 | |
| 24 | 24 | __printf(3, 4) |
| 25 | 25 | int bdi_register(struct backing_dev_info *bdi, struct device *parent, |
| 26 | 26 | const char *fmt, ...); |
| 27 | 27 | int bdi_register_dev(struct backing_dev_info *bdi, dev_t dev); |
| 28 | +void bdi_unregister(struct backing_dev_info *bdi); | |
| 29 | + | |
| 28 | 30 | int __must_check bdi_setup_and_register(struct backing_dev_info *, char *); |
| 31 | +void bdi_destroy(struct backing_dev_info *bdi); | |
| 32 | + | |
| 29 | 33 | void wb_start_writeback(struct bdi_writeback *wb, long nr_pages, |
| 30 | 34 | bool range_cyclic, enum wb_reason reason); |
| 31 | 35 | void wb_start_background_writeback(struct bdi_writeback *wb); |
| @@ -408,61 +412,6 @@ static inline void unlocked_inode_to_wb_end(struct inode *inode, bool locked) · 376 unmodified lines | ||
| 408 | 412 | rcu_read_unlock(); |
| 409 | 413 | } |
| 410 | 414 | |
| 411 | −struct wb_iter { | |
| 412 | − int start_memcg_id; | |
| 413 | − struct radix_tree_iter tree_iter; | |
| 414 | − void **slot; | |
| 415 | −}; | |
| 416 | − | |
| 417 | −static inline struct bdi_writeback *__wb_iter_next(struct wb_iter *iter, | |
| 418 | − struct backing_dev_info *bdi) | |
| 419 | −{ | |
| 420 | − struct radix_tree_iter *titer = &iter->tree_iter; | |
| 421 | − | |
| 422 | − WARN_ON_ONCE(!rcu_read_lock_held()); | |
| 423 | − | |
| 424 | − if (iter->start_memcg_id >= 0) { | |
| 425 | − iter->slot = radix_tree_iter_init(titer, iter->start_memcg_id); | |
| 426 | − iter->start_memcg_id = -1; | |
| 427 | − } else { | |
| 428 | − iter->slot = radix_tree_next_slot(iter->slot, titer, 0); | |
| 429 | − } | |
| 430 | − | |
| 431 | − if (!iter->slot) | |
| 432 | − iter->slot = radix_tree_next_chunk(&bdi->cgwb_tree, titer, 0); | |
| 433 | − if (iter->slot) | |
| 434 | − return *iter->slot; | |
| 435 | − return NULL; | |
| 436 | −} | |
| 437 | − | |
| 438 | −static inline struct bdi_writeback *__wb_iter_init(struct wb_iter *iter, | |
| 439 | − struct backing_dev_info *bdi, | |
| 440 | − int start_memcg_id) | |
| 441 | −{ | |
| 442 | − iter->start_memcg_id = start_memcg_id; | |
| 443 | − | |
| 444 | − if (start_memcg_id) | |
| 445 | − return __wb_iter_next(iter, bdi); | |
| 446 | − else | |
| 447 | − return &bdi->wb; | |
| 448 | −} | |
| 449 | − | |
| 450 | −/** | |
| 451 | − * bdi_for_each_wb - walk all wb's of a bdi in ascending memcg ID order | |
| 452 | − * @wb_cur: cursor struct bdi_writeback pointer | |
| 453 | − * @bdi: bdi to walk wb's of | |
| 454 | − * @iter: pointer to struct wb_iter to be used as iteration buffer | |
| 455 | − * @start_memcg_id: memcg ID to start iteration from | |
| 456 | − * | |
| 457 | − * Iterate @wb_cur through the wb's (bdi_writeback's) of @bdi in ascending | |
| 458 | − * memcg ID order starting from @start_memcg_id. @iter is struct wb_iter | |
| 459 | − * to be used as temp storage during iteration. rcu_read_lock() must be | |
| 460 | − * held throughout iteration. | |
| 461 | − */ | |
| 462 | −#define bdi_for_each_wb(wb_cur, bdi, iter, start_memcg_id) \ | |
| 463 | − for ((wb_cur) = __wb_iter_init(iter, bdi, start_memcg_id); \ | |
| 464 | − (wb_cur); (wb_cur) = __wb_iter_next(iter, bdi)) | |
| 465 | − | |
| 466 | 415 | #else /* CONFIG_CGROUP_WRITEBACK */ |
| 467 | 416 | |
| 468 | 417 | static inline bool inode_cgwb_enabled(struct inode *inode) |
| @@ -522,14 +471,6 @@ static inline void wb_blkcg_offline(struct blkcg *blkcg) · 53 unmodified lines | ||
| 522 | 471 | { |
| 523 | 472 | } |
| 524 | 473 | |
| 525 | −struct wb_iter { | |
| 526 | − int next_id; | |
| 527 | −}; | |
| 528 | − | |
| 529 | −#define bdi_for_each_wb(wb_cur, bdi, iter, start_blkcg_id) \ | |
| 530 | − for ((iter)->next_id = (start_blkcg_id); \ | |
| 531 | − ({ (wb_cur) = !(iter)->next_id++ ? &(bdi)->wb : NULL; }); ) | |
| 532 | − | |
| 533 | 474 | static inline int inode_congested(struct inode *inode, int cong_bits) |
| 534 | 475 | { |
| 535 | 476 | return wb_congested(&inode_to_bdi(inode)->wb, cong_bits); |
| @@ -26,6 +26,6 @@ extern int __init cma_declare_contiguous(phys_addr_t base, · 25 unmodified lines | ||
| 26 | 26 | extern int cma_init_reserved_mem(phys_addr_t base, phys_addr_t size, |
| 27 | 27 | unsigned int order_per_bit, |
| 28 | 28 | struct cma **res_cma); |
| 29 | −extern struct page *cma_alloc(struct cma *cma, unsigned int count, unsigned int align); | |
| 29 | +extern struct page *cma_alloc(struct cma *cma, size_t count, unsigned int align); | |
| 30 | 30 | extern bool cma_release(struct cma *cma, const struct page *pages, unsigned int count); |
| 31 | 31 | #endif |
| @@ -237,12 +237,25 @@ · 236 unmodified lines | ||
| 237 | 237 | #define KASAN_ABI_VERSION 3 |
| 238 | 238 | #endif |
| 239 | 239 | |
| 240 | +#if GCC_VERSION >= 40902 | |
| 241 | +/* | |
| 242 | + * Tell the compiler that address safety instrumentation (KASAN) | |
| 243 | + * should not be applied to that function. | |
| 244 | + * Conflicts with inlining: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67368 | |
| 245 | + */ | |
| 246 | +#define __no_sanitize_address __attribute__((no_sanitize_address)) | |
| 247 | +#endif | |
| 248 | + | |
| 240 | 249 | #endif /* gcc version >= 40000 specific checks */ |
| 241 | 250 | |
| 242 | 251 | #if !defined(__noclone) |
| 243 | 252 | #define __noclone /* not needed */ |
| 244 | 253 | #endif |
| 245 | 254 | |
| 255 | +#if !defined(__no_sanitize_address) | |
| 256 | +#define __no_sanitize_address | |
| 257 | +#endif | |
| 258 | + | |
| 246 | 259 | /* |
| 247 | 260 | * A trick to suppress uninitialized variable warning without generating any |
| 248 | 261 | * code |
| @@ -198,19 +198,45 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); · 197 unmodified lines | ||
| 198 | 198 | |
| 199 | 199 | #include <uapi/linux/types.h> |
| 200 | 200 | |
| 201 | −static __always_inline void __read_once_size(const volatile void *p, void *res, int size) | |
| 201 | +#define __READ_ONCE_SIZE \ | |
| 202 | +({ \ | |
| 203 | + switch (size) { \ | |
| 204 | + case 1: *(__u8 *)res = *(volatile __u8 *)p; break; \ | |
| 205 | + case 2: *(__u16 *)res = *(volatile __u16 *)p; break; \ | |
| 206 | + case 4: *(__u32 *)res = *(volatile __u32 *)p; break; \ | |
| 207 | + case 8: *(__u64 *)res = *(volatile __u64 *)p; break; \ | |
| 208 | + default: \ | |
| 209 | + barrier(); \ | |
| 210 | + __builtin_memcpy((void *)res, (const void *)p, size); \ | |
| 211 | + barrier(); \ | |
| 212 | + } \ | |
| 213 | +}) | |
| 214 | + | |
| 215 | +static __always_inline | |
| 216 | +void __read_once_size(const volatile void *p, void *res, int size) | |
| 202 | 217 | { |
| 203 | − switch (size) { | |
| 204 | − case 1: *(__u8 *)res = *(volatile __u8 *)p; break; | |
| 205 | − case 2: *(__u16 *)res = *(volatile __u16 *)p; break; | |
| 206 | − case 4: *(__u32 *)res = *(volatile __u32 *)p; break; | |
| 207 | − case 8: *(__u64 *)res = *(volatile __u64 *)p; break; | |
| 208 | − default: | |
| 209 | − barrier(); | |
| 210 | − __builtin_memcpy((void *)res, (const void *)p, size); | |
| 211 | − barrier(); | |
| 212 | − } | |
| 218 | + __READ_ONCE_SIZE; | |
| 219 | +} | |
| 220 | + | |
| 221 | +#ifdef CONFIG_KASAN | |
| 222 | +/* | |
| 223 | + * This function is not 'inline' because __no_sanitize_address confilcts | |
| 224 | + * with inlining. Attempt to inline it may cause a build failure. | |
| 225 | + * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67368 | |
| 226 | + * '__maybe_unused' allows us to avoid defined-but-not-used warnings. | |
| 227 | + */ | |
| 228 | +static __no_sanitize_address __maybe_unused | |
| 229 | +void __read_once_size_nocheck(const volatile void *p, void *res, int size) | |
| 230 | +{ | |
| 231 | + __READ_ONCE_SIZE; | |
| 232 | +} | |
| 233 | +#else | |
| 234 | +static __always_inline | |
| 235 | +void __read_once_size_nocheck(const volatile void *p, void *res, int size) | |
| 236 | +{ | |
| 237 | + __READ_ONCE_SIZE; | |
| 213 | 238 | } |
| 239 | +#endif | |
| 214 | 240 | |
| 215 | 241 | static __always_inline void __write_once_size(volatile void *p, void *res, int size) |
| 216 | 242 | { |
| @@ -248,8 +274,22 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s · 31 unmodified lines | ||
| 248 | 274 | * required ordering. |
| 249 | 275 | */ |
| 250 | 276 | |
| 251 | −#define READ_ONCE(x) \ | |
| 252 | − ({ union { typeof(x) __val; char __c[1]; } __u; __read_once_size(&(x), __u.__c, sizeof(x)); __u.__val; }) | |
| 277 | +#define __READ_ONCE(x, check) \ | |
| 278 | +({ \ | |
| 279 | + union { typeof(x) __val; char __c[1]; } __u; \ | |
| 280 | + if (check) \ | |
| 281 | + __read_once_size(&(x), __u.__c, sizeof(x)); \ | |
| 282 | + else \ | |
| 283 | + __read_once_size_nocheck(&(x), __u.__c, sizeof(x)); \ | |
| 284 | + __u.__val; \ | |
| 285 | +}) | |
| 286 | +#define READ_ONCE(x) __READ_ONCE(x, 1) | |
| 287 | + | |
| 288 | +/* | |
| 289 | + * Use READ_ONCE_NOCHECK() instead of READ_ONCE() if you need | |
| 290 | + * to hide memory access from KASAN. | |
| 291 | + */ | |
| 292 | +#define READ_ONCE_NOCHECK(x) __READ_ONCE(x, 0) | |
| 253 | 293 | |
| 254 | 294 | #define WRITE_ONCE(x, val) \ |
| 255 | 295 | ({ \ |
| @@ -111,7 +111,7 @@ static inline int dma_declare_contiguous(struct device *dev, phys_addr_t size, · 110 unmodified lines | ||
| 111 | 111 | return ret; |
| 112 | 112 | } |
| 113 | 113 | |
| 114 | −struct page *dma_alloc_from_contiguous(struct device *dev, int count, | |
| 114 | +struct page *dma_alloc_from_contiguous(struct device *dev, size_t count, | |
| 115 | 115 | unsigned int order); |
| 116 | 116 | bool dma_release_from_contiguous(struct device *dev, struct page *pages, |
| 117 | 117 | int count); |
| @@ -144,7 +144,7 @@ int dma_declare_contiguous(struct device *dev, phys_addr_t size, · 26 unmodified lines | ||
| 144 | 144 | } |
| 145 | 145 | |
| 146 | 146 | static inline |
| 147 | −struct page *dma_alloc_from_contiguous(struct device *dev, int count, | |
| 147 | +struct page *dma_alloc_from_contiguous(struct device *dev, size_t count, | |
| 148 | 148 | unsigned int order) |
| 149 | 149 | { |
| 150 | 150 | return NULL; |
| @@ -676,8 +676,9 @@ enum { · 675 unmodified lines | ||
| 676 | 676 | |
| 677 | 677 | struct list_head *mem_cgroup_cgwb_list(struct mem_cgroup *memcg); |
| 678 | 678 | struct wb_domain *mem_cgroup_wb_domain(struct bdi_writeback *wb); |
| 679 | −void mem_cgroup_wb_stats(struct bdi_writeback *wb, unsigned long *pavail, | |
| 680 | − unsigned long *pdirty, unsigned long *pwriteback); | |
| 679 | +void mem_cgroup_wb_stats(struct bdi_writeback *wb, unsigned long *pfilepages, | |
| 680 | + unsigned long *pheadroom, unsigned long *pdirty, | |
| 681 | + unsigned long *pwriteback); | |
| 681 | 682 | |
| 682 | 683 | #else /* CONFIG_CGROUP_WRITEBACK */ |
| 683 | 684 | |
| @@ -687,7 +688,8 @@ static inline struct wb_domain *mem_cgroup_wb_domain(struct bdi_writeback *wb) · 3 unmodified lines | ||
| 687 | 688 | } |
| 688 | 689 | |
| 689 | 690 | static inline void mem_cgroup_wb_stats(struct bdi_writeback *wb, |
| 690 | − unsigned long *pavail, | |
| 691 | + unsigned long *pfilepages, | |
| 692 | + unsigned long *pheadroom, | |
| 691 | 693 | unsigned long *pdirty, |
| 692 | 694 | unsigned long *pwriteback) |
| 693 | 695 | { |
| @@ -64,7 +64,7 @@ struct unix_sock { · 63 unmodified lines | ||
| 64 | 64 | struct socket_wq peer_wq; |
| 65 | 65 | }; |
| 66 | 66 | |
| 67 | −static inline struct unix_sock *unix_sk(struct sock *sk) | |
| 67 | +static inline struct unix_sock *unix_sk(const struct sock *sk) | |
| 68 | 68 | { |
| 69 | 69 | return (struct unix_sock *)sk; |
| 70 | 70 | } |
| @@ -113,12 +113,12 @@ void __inet_twsk_hashdance(struct inet_timewait_sock *tw, struct sock *sk, · 112 unmodified lines | ||
| 113 | 113 | void __inet_twsk_schedule(struct inet_timewait_sock *tw, int timeo, |
| 114 | 114 | bool rearm); |
| 115 | 115 | |
| 116 | −static void inline inet_twsk_schedule(struct inet_timewait_sock *tw, int timeo) | |
| 116 | +static inline void inet_twsk_schedule(struct inet_timewait_sock *tw, int timeo) | |
| 117 | 117 | { |
| 118 | 118 | __inet_twsk_schedule(tw, timeo, false); |
| 119 | 119 | } |
| 120 | 120 | |
| 121 | −static void inline inet_twsk_reschedule(struct inet_timewait_sock *tw, int timeo) | |
| 121 | +static inline void inet_twsk_reschedule(struct inet_timewait_sock *tw, int timeo) | |
| 122 | 122 | { |
| 123 | 123 | __inet_twsk_schedule(tw, timeo, true); |
| 124 | 124 | } |
| @@ -828,6 +828,14 @@ static inline __must_check int sk_add_backlog(struct sock *sk, struct sk_buff *s · 827 unmodified lines | ||
| 828 | 828 | if (sk_rcvqueues_full(sk, limit)) |
| 829 | 829 | return -ENOBUFS; |
| 830 | 830 | |
| 831 | + /* | |
| 832 | + * If the skb was allocated from pfmemalloc reserves, only | |
| 833 | + * allow SOCK_MEMALLOC sockets to use it as this socket is | |
| 834 | + * helping free memory | |
| 835 | + */ | |
| 836 | + if (skb_pfmemalloc(skb) && !sock_flag(sk, SOCK_MEMALLOC)) | |
| 837 | + return -ENOMEM; | |
| 838 | + | |
| 831 | 839 | __sk_add_backlog(sk, skb); |
| 832 | 840 | sk->sk_backlog.len += skb->truesize; |
| 833 | 841 | return 0; |
| @@ -86,7 +86,7 @@ · 85 unmodified lines | ||
| 86 | 86 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ |
| 87 | 87 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ |
| 88 | 88 | .tlv.p = (tlv_array),\ |
| 89 | − .info = snd_soc_info_volsw, \ | |
| 89 | + .info = snd_soc_info_volsw_sx, \ | |
| 90 | 90 | .get = snd_soc_get_volsw_sx,\ |
| 91 | 91 | .put = snd_soc_put_volsw_sx, \ |
| 92 | 92 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
| @@ -156,7 +156,7 @@ · 63 unmodified lines | ||
| 156 | 156 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ |
| 157 | 157 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ |
| 158 | 158 | .tlv.p = (tlv_array), \ |
| 159 | − .info = snd_soc_info_volsw, \ | |
| 159 | + .info = snd_soc_info_volsw_sx, \ | |
| 160 | 160 | .get = snd_soc_get_volsw_sx, \ |
| 161 | 161 | .put = snd_soc_put_volsw_sx, \ |
| 162 | 162 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
| @@ -574,6 +574,8 @@ int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol, · 411 unmodified lines | ||
| 574 | 574 | struct snd_ctl_elem_value *ucontrol); |
| 575 | 575 | int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, |
| 576 | 576 | struct snd_ctl_elem_info *uinfo); |
| 577 | +int snd_soc_info_volsw_sx(struct snd_kcontrol *kcontrol, | |
| 578 | + struct snd_ctl_elem_info *uinfo); | |
| 577 | 579 | #define snd_soc_info_bool_ext snd_ctl_boolean_mono_info |
| 578 | 580 | int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, |
| 579 | 581 | struct snd_ctl_elem_value *ucontrol); |
| @@ -119,7 +119,7 @@ · 118 unmodified lines | ||
| 119 | 119 | #define WM8904_MIC_REGS 2 |
| 120 | 120 | #define WM8904_GPIO_REGS 4 |
| 121 | 121 | #define WM8904_DRC_REGS 4 |
| 122 | −#define WM8904_EQ_REGS 25 | |
| 122 | +#define WM8904_EQ_REGS 24 | |
| 123 | 123 | |
| 124 | 124 | /** |
| 125 | 125 | * DRC configurations are specified with a label and a set of register |
| @@ -80,8 +80,10 @@ · 79 unmodified lines | ||
| 80 | 80 | * SA_RESTORER 0x04000000 |
| 81 | 81 | */ |
| 82 | 82 | |
| 83 | +#if !defined MINSIGSTKSZ || !defined SIGSTKSZ | |
| 83 | 84 | #define MINSIGSTKSZ 2048 |
| 84 | 85 | #define SIGSTKSZ 8192 |
| 86 | +#endif | |
| 85 | 87 | |
| 86 | 88 | #ifndef __ASSEMBLY__ |
| 87 | 89 | typedef struct { |
| @@ -323,10 +323,10 @@ enum ovs_key_attr { · 322 unmodified lines | ||
| 323 | 323 | OVS_KEY_ATTR_MPLS, /* array of struct ovs_key_mpls. |
| 324 | 324 | * The implementation may restrict |
| 325 | 325 | * the accepted length of the array. */ |
| 326 | − OVS_KEY_ATTR_CT_STATE, /* u8 bitmask of OVS_CS_F_* */ | |
| 326 | + OVS_KEY_ATTR_CT_STATE, /* u32 bitmask of OVS_CS_F_* */ | |
| 327 | 327 | OVS_KEY_ATTR_CT_ZONE, /* u16 connection tracking zone. */ |
| 328 | 328 | OVS_KEY_ATTR_CT_MARK, /* u32 connection tracking mark */ |
| 329 | − OVS_KEY_ATTR_CT_LABEL, /* 16-octet connection tracking label */ | |
| 329 | + OVS_KEY_ATTR_CT_LABELS, /* 16-octet connection tracking label */ | |
| 330 | 330 | |
| 331 | 331 | #ifdef __KERNEL__ |
| 332 | 332 | OVS_KEY_ATTR_TUNNEL_INFO, /* struct ip_tunnel_info */ |
| @@ -439,9 +439,9 @@ struct ovs_key_nd { · 106 unmodified lines | ||
| 439 | 439 | __u8 nd_tll[ETH_ALEN]; |
| 440 | 440 | }; |
| 441 | 441 | |
| 442 | −#define OVS_CT_LABEL_LEN 16 | |
| 443 | −struct ovs_key_ct_label { | |
| 444 | − __u8 ct_label[OVS_CT_LABEL_LEN]; | |
| 442 | +#define OVS_CT_LABELS_LEN 16 | |
| 443 | +struct ovs_key_ct_labels { | |
| 444 | + __u8 ct_labels[OVS_CT_LABELS_LEN]; | |
| 445 | 445 | }; |
| 446 | 446 | |
| 447 | 447 | /* OVS_KEY_ATTR_CT_STATE flags */ |
| @@ -449,9 +449,9 @@ struct ovs_key_ct_label { · 1 unmodified line | ||
| 449 | 449 | #define OVS_CS_F_ESTABLISHED 0x02 /* Part of an existing connection. */ |
| 450 | 450 | #define OVS_CS_F_RELATED 0x04 /* Related to an established |
| 451 | 451 | * connection. */ |
| 452 | −#define OVS_CS_F_INVALID 0x20 /* Could not track connection. */ | |
| 453 | −#define OVS_CS_F_REPLY_DIR 0x40 /* Flow is in the reply direction. */ | |
| 454 | −#define OVS_CS_F_TRACKED 0x80 /* Conntrack has occurred. */ | |
| 452 | +#define OVS_CS_F_REPLY_DIR 0x08 /* Flow is in the reply direction. */ | |
| 453 | +#define OVS_CS_F_INVALID 0x10 /* Could not track connection. */ | |
| 454 | +#define OVS_CS_F_TRACKED 0x20 /* Conntrack has occurred. */ | |
| 455 | 455 | |
| 456 | 456 | /** |
| 457 | 457 | * enum ovs_flow_attr - attributes for %OVS_FLOW_* commands. |
| @@ -618,22 +618,24 @@ struct ovs_action_hash { · 160 unmodified lines | ||
| 618 | 618 | |
| 619 | 619 | /** |
| 620 | 620 | * enum ovs_ct_attr - Attributes for %OVS_ACTION_ATTR_CT action. |
| 621 | − * @OVS_CT_ATTR_FLAGS: u32 connection tracking flags. | |
| 621 | + * @OVS_CT_ATTR_COMMIT: If present, commits the connection to the conntrack | |
| 622 | + * table. This allows future packets for the same connection to be identified | |
| 623 | + * as 'established' or 'related'. | |
| 622 | 624 | * @OVS_CT_ATTR_ZONE: u16 connection tracking zone. |
| 623 | 625 | * @OVS_CT_ATTR_MARK: u32 value followed by u32 mask. For each bit set in the |
| 624 | 626 | * mask, the corresponding bit in the value is copied to the connection |
| 625 | 627 | * tracking mark field in the connection. |
| 626 | − * @OVS_CT_ATTR_LABEL: %OVS_CT_LABEL_LEN value followed by %OVS_CT_LABEL_LEN | |
| 628 | + * @OVS_CT_ATTR_LABEL: %OVS_CT_LABELS_LEN value followed by %OVS_CT_LABELS_LEN | |
| 627 | 629 | * mask. For each bit set in the mask, the corresponding bit in the value is |
| 628 | 630 | * copied to the connection tracking label field in the connection. |
| 629 | 631 | * @OVS_CT_ATTR_HELPER: variable length string defining conntrack ALG. |
| 630 | 632 | */ |
| 631 | 633 | enum ovs_ct_attr { |
| 632 | 634 | OVS_CT_ATTR_UNSPEC, |
| 633 | − OVS_CT_ATTR_FLAGS, /* u8 bitmask of OVS_CT_F_*. */ | |
| 635 | + OVS_CT_ATTR_COMMIT, /* No argument, commits connection. */ | |
| 634 | 636 | OVS_CT_ATTR_ZONE, /* u16 zone id. */ |
| 635 | 637 | OVS_CT_ATTR_MARK, /* mark to associate with this connection. */ |
| 636 | − OVS_CT_ATTR_LABEL, /* label to associate with this connection. */ | |
| 638 | + OVS_CT_ATTR_LABELS, /* labels to associate with this connection. */ | |
| 637 | 639 | OVS_CT_ATTR_HELPER, /* netlink helper to assist detection of |
| 638 | 640 | related connections. */ |
| 639 | 641 | __OVS_CT_ATTR_MAX |
| @@ -641,14 +643,6 @@ enum ovs_ct_attr { · 1 unmodified line | ||
| 641 | 643 | |
| 642 | 644 | #define OVS_CT_ATTR_MAX (__OVS_CT_ATTR_MAX - 1) |
| 643 | 645 | |
| 644 | −/* | |
| 645 | − * OVS_CT_ATTR_FLAGS flags - bitmask of %OVS_CT_F_* | |
| 646 | − * @OVS_CT_F_COMMIT: Commits the flow to the conntrack table. This allows | |
| 647 | − * future packets for the same connection to be identified as 'established' | |
| 648 | − * or 'related'. | |
| 649 | − */ | |
| 650 | −#define OVS_CT_F_COMMIT 0x01 | |
| 651 | − | |
| 652 | 646 | /** |
| 653 | 647 | * enum ovs_action_attr - Action types. |
| 654 | 648 | * |
| @@ -705,7 +699,7 @@ enum ovs_action_attr { · 50 unmodified lines | ||
| 705 | 699 | * data immediately followed by a mask. |
| 706 | 700 | * The data must be zero for the unmasked |
| 707 | 701 | * bits. */ |
| 708 | − OVS_ACTION_ATTR_CT, /* One nested OVS_CT_ATTR_* . */ | |
| 702 | + OVS_ACTION_ATTR_CT, /* Nested OVS_CT_ATTR_* . */ | |
| 709 | 703 | |
| 710 | 704 | __OVS_ACTION_ATTR_MAX, /* Nothing past this will be accepted |
| 711 | 705 | * from userspace. */ |
| @@ -160,7 +160,7 @@ struct rtattr { · 159 unmodified lines | ||
| 160 | 160 | |
| 161 | 161 | /* Macros to handle rtattributes */ |
| 162 | 162 | |
| 163 | −#define RTA_ALIGNTO 4 | |
| 163 | +#define RTA_ALIGNTO 4U | |
| 164 | 164 | #define RTA_ALIGN(len) ( ((len)+RTA_ALIGNTO-1) & ~(RTA_ALIGNTO-1) ) |
| 165 | 165 | #define RTA_OK(rta,len) ((len) >= (int)sizeof(struct rtattr) && \ |
| 166 | 166 | (rta)->rta_len >= sizeof(struct rtattr) && \ |
| @@ -228,11 +228,7 @@ static void msi_domain_update_chip_ops(struct msi_domain_info *info) · 227 unmodified lines | ||
| 228 | 228 | { |
| 229 | 229 | struct irq_chip *chip = info->chip; |
| 230 | 230 | |
| 231 | − BUG_ON(!chip); | |
| 232 | − if (!chip->irq_mask) | |
| 233 | − chip->irq_mask = pci_msi_mask_irq; | |
| 234 | − if (!chip->irq_unmask) | |
| 235 | − chip->irq_unmask = pci_msi_unmask_irq; | |
| 231 | + BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask); | |
| 236 | 232 | if (!chip->irq_set_affinity) |
| 237 | 233 | chip->irq_set_affinity = msi_domain_set_affinity; |
| 238 | 234 | } |
| @@ -327,9 +327,13 @@ static void call_usermodehelper_exec_work(struct work_struct *work) · 326 unmodified lines | ||
| 327 | 327 | call_usermodehelper_exec_sync(sub_info); |
| 328 | 328 | } else { |
| 329 | 329 | pid_t pid; |
| 330 | − | |
| 330 | + /* | |
| 331 | + * Use CLONE_PARENT to reparent it to kthreadd; we do not | |
| 332 | + * want to pollute current->children, and we need a parent | |
| 333 | + * that always ignores SIGCHLD to ensure auto-reaping. | |
| 334 | + */ | |
| 331 | 335 | pid = kernel_thread(call_usermodehelper_exec_async, sub_info, |
| 332 | − SIGCHLD); | |
| 336 | + CLONE_PARENT | SIGCHLD); | |
| 333 | 337 | if (pid < 0) { |
| 334 | 338 | sub_info->retval = pid; |
| 335 | 339 | umh_complete(sub_info); |
| @@ -2366,8 +2366,15 @@ void wake_up_new_task(struct task_struct *p) · 2365 unmodified lines | ||
| 2366 | 2366 | trace_sched_wakeup_new(p); |
| 2367 | 2367 | check_preempt_curr(rq, p, WF_FORK); |
| 2368 | 2368 | #ifdef CONFIG_SMP |
| 2369 | − if (p->sched_class->task_woken) | |
| 2369 | + if (p->sched_class->task_woken) { | |
| 2370 | + /* | |
| 2371 | + * Nothing relies on rq->lock after this, so its fine to | |
| 2372 | + * drop it. | |
| 2373 | + */ | |
| 2374 | + lockdep_unpin_lock(&rq->lock); | |
| 2370 | 2375 | p->sched_class->task_woken(rq, p); |
| 2376 | + lockdep_pin_lock(&rq->lock); | |
| 2377 | + } | |
| 2371 | 2378 | #endif |
| 2372 | 2379 | task_rq_unlock(rq, p, &flags); |
| 2373 | 2380 | } |
| @@ -7238,9 +7245,6 @@ void __init sched_init_smp(void) · 4864 unmodified lines | ||
| 7238 | 7245 | alloc_cpumask_var(&non_isolated_cpus, GFP_KERNEL); |
| 7239 | 7246 | alloc_cpumask_var(&fallback_doms, GFP_KERNEL); |
| 7240 | 7247 | |
| 7241 | − /* nohz_full won't take effect without isolating the cpus. */ | |
| 7242 | − tick_nohz_full_add_cpus_to(cpu_isolated_map); | |
| 7243 | − | |
| 7244 | 7248 | sched_init_numa(); |
| 7245 | 7249 | |
| 7246 | 7250 | /* |
| @@ -668,8 +668,15 @@ static enum hrtimer_restart dl_task_timer(struct hrtimer *timer) · 667 unmodified lines | ||
| 668 | 668 | * Queueing this task back might have overloaded rq, check if we need |
| 669 | 669 | * to kick someone away. |
| 670 | 670 | */ |
| 671 | − if (has_pushable_dl_tasks(rq)) | |
| 671 | + if (has_pushable_dl_tasks(rq)) { | |
| 672 | + /* | |
| 673 | + * Nothing relies on rq->lock after this, so its safe to drop | |
| 674 | + * rq->lock. | |
| 675 | + */ | |
| 676 | + lockdep_unpin_lock(&rq->lock); | |
| 672 | 677 | push_dl_task(rq); |
| 678 | + lockdep_pin_lock(&rq->lock); | |
| 679 | + } | |
| 673 | 680 | #endif |
| 674 | 681 | |
| 675 | 682 | unlock: |
| @@ -1066,8 +1073,9 @@ select_task_rq_dl(struct task_struct *p, int cpu, int sd_flag, int flags) · 390 unmodified lines | ||
| 1066 | 1073 | int target = find_later_rq(p); |
| 1067 | 1074 | |
| 1068 | 1075 | if (target != -1 && |
| 1069 | − dl_time_before(p->dl.deadline, | |
| 1070 | − cpu_rq(target)->dl.earliest_dl.curr)) | |
| 1076 | + (dl_time_before(p->dl.deadline, | |
| 1077 | + cpu_rq(target)->dl.earliest_dl.curr) || | |
| 1078 | + (cpu_rq(target)->dl.dl_nr_running == 0))) | |
| 1071 | 1079 | cpu = target; |
| 1072 | 1080 | } |
| 1073 | 1081 | rcu_read_unlock(); |
| @@ -1417,7 +1425,8 @@ static struct rq *find_lock_later_rq(struct task_struct *task, struct rq *rq) · 343 unmodified lines | ||
| 1417 | 1425 | |
| 1418 | 1426 | later_rq = cpu_rq(cpu); |
| 1419 | 1427 | |
| 1420 | − if (!dl_time_before(task->dl.deadline, | |
| 1428 | + if (later_rq->dl.dl_nr_running && | |
| 1429 | + !dl_time_before(task->dl.deadline, | |
| 1421 | 1430 | later_rq->dl.earliest_dl.curr)) { |
| 1422 | 1431 | /* |
| 1423 | 1432 | * Target rq has tasks of equal or earlier deadline, |
| @@ -2363,7 +2363,7 @@ static inline long calc_tg_weight(struct task_group *tg, struct cfs_rq *cfs_rq) · 2362 unmodified lines | ||
| 2363 | 2363 | */ |
| 2364 | 2364 | tg_weight = atomic_long_read(&tg->load_avg); |
| 2365 | 2365 | tg_weight -= cfs_rq->tg_load_avg_contrib; |
| 2366 | − tg_weight += cfs_rq_load_avg(cfs_rq); | |
| 2366 | + tg_weight += cfs_rq->load.weight; | |
| 2367 | 2367 | |
| 2368 | 2368 | return tg_weight; |
| 2369 | 2369 | } |
| @@ -2373,7 +2373,7 @@ static long calc_cfs_shares(struct cfs_rq *cfs_rq, struct task_group *tg) · 3 unmodified lines | ||
| 2373 | 2373 | long tg_weight, load, shares; |
| 2374 | 2374 | |
| 2375 | 2375 | tg_weight = calc_tg_weight(tg, cfs_rq); |
| 2376 | − load = cfs_rq_load_avg(cfs_rq); | |
| 2376 | + load = cfs_rq->load.weight; | |
| 2377 | 2377 | |
| 2378 | 2378 | shares = (tg->shares * load); |
| 2379 | 2379 | if (tg_weight) |
| @@ -2664,13 +2664,14 @@ static inline u64 cfs_rq_clock_task(struct cfs_rq *cfs_rq); · 284 unmodified lines | ||
| 2664 | 2664 | /* Group cfs_rq's load_avg is used for task_h_load and update_cfs_share */ |
| 2665 | 2665 | static inline int update_cfs_rq_load_avg(u64 now, struct cfs_rq *cfs_rq) |
| 2666 | 2666 | { |
| 2667 | − int decayed; | |
| 2668 | 2667 | struct sched_avg *sa = &cfs_rq->avg; |
| 2668 | + int decayed, removed = 0; | |
| 2669 | 2669 | |
| 2670 | 2670 | if (atomic_long_read(&cfs_rq->removed_load_avg)) { |
| 2671 | 2671 | long r = atomic_long_xchg(&cfs_rq->removed_load_avg, 0); |
| 2672 | 2672 | sa->load_avg = max_t(long, sa->load_avg - r, 0); |
| 2673 | 2673 | sa->load_sum = max_t(s64, sa->load_sum - r * LOAD_AVG_MAX, 0); |
| 2674 | + removed = 1; | |
| 2674 | 2675 | } |
| 2675 | 2676 | |
| 2676 | 2677 | if (atomic_long_read(&cfs_rq->removed_util_avg)) { |
| @@ -2688,7 +2689,7 @@ static inline int update_cfs_rq_load_avg(u64 now, struct cfs_rq *cfs_rq) · 11 unmodified lines | ||
| 2688 | 2689 | cfs_rq->load_last_update_time_copy = sa->last_update_time; |
| 2689 | 2690 | #endif |
| 2690 | 2691 | |
| 2691 | − return decayed; | |
| 2692 | + return decayed || removed; | |
| 2692 | 2693 | } |
| 2693 | 2694 | |
| 2694 | 2695 | /* Update task and its cfs_rq load average */ |
| @@ -57,9 +57,11 @@ static inline int cpu_idle_poll(void) · 56 unmodified lines | ||
| 57 | 57 | rcu_idle_enter(); |
| 58 | 58 | trace_cpu_idle_rcuidle(0, smp_processor_id()); |
| 59 | 59 | local_irq_enable(); |
| 60 | + stop_critical_timings(); | |
| 60 | 61 | while (!tif_need_resched() && |
| 61 | 62 | (cpu_idle_force_poll || tick_check_broadcast_expired())) |
| 62 | 63 | cpu_relax(); |
| 64 | + start_critical_timings(); | |
| 63 | 65 | trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id()); |
| 64 | 66 | rcu_idle_exit(); |
| 65 | 67 | return 1; |
| @@ -1251,7 +1251,7 @@ void __init timekeeping_init(void) · 1250 unmodified lines | ||
| 1251 | 1251 | set_normalized_timespec64(&tmp, -boot.tv_sec, -boot.tv_nsec); |
| 1252 | 1252 | tk_set_wall_to_mono(tk, tmp); |
| 1253 | 1253 | |
| 1254 | − timekeeping_update(tk, TK_MIRROR); | |
| 1254 | + timekeeping_update(tk, TK_MIRROR | TK_CLOCK_WAS_SET); | |
| 1255 | 1255 | |
| 1256 | 1256 | write_seqcount_end(&tk_core.seq); |
| 1257 | 1257 | raw_spin_unlock_irqrestore(&timekeeper_lock, flags); |
| @@ -85,9 +85,19 @@ check_stack(unsigned long ip, unsigned long *stack) · 84 unmodified lines | ||
| 85 | 85 | if (!object_is_on_stack(stack)) |
| 86 | 86 | return; |
| 87 | 87 | |
| 88 | + /* Can't do this from NMI context (can cause deadlocks) */ | |
| 89 | + if (in_nmi()) | |
| 90 | + return; | |
| 91 | + | |
| 88 | 92 | local_irq_save(flags); |
| 89 | 93 | arch_spin_lock(&max_stack_lock); |
| 90 | 94 | |
| 95 | + /* | |
| 96 | + * RCU may not be watching, make it see us. | |
| 97 | + * The stack trace code uses rcu_sched. | |
| 98 | + */ | |
| 99 | + rcu_irq_enter(); | |
| 100 | + | |
| 91 | 101 | /* In case another CPU set the tracer_frame on us */ |
| 92 | 102 | if (unlikely(!frame_size)) |
| 93 | 103 | this_size -= tracer_frame; |
| @@ -169,6 +179,7 @@ check_stack(unsigned long ip, unsigned long *stack) · 75 unmodified lines | ||
| 169 | 179 | } |
| 170 | 180 | |
| 171 | 181 | out: |
| 182 | + rcu_irq_exit(); | |
| 172 | 183 | arch_spin_unlock(&max_stack_lock); |
| 173 | 184 | local_irq_restore(flags); |
| 174 | 185 | } |
| @@ -1458,13 +1458,13 @@ static void __queue_delayed_work(int cpu, struct workqueue_struct *wq, · 1457 unmodified lines | ||
| 1458 | 1458 | timer_stats_timer_set_start_info(&dwork->timer); |
| 1459 | 1459 | |
| 1460 | 1460 | dwork->wq = wq; |
| 1461 | + /* timer isn't guaranteed to run in this cpu, record earlier */ | |
| 1462 | + if (cpu == WORK_CPU_UNBOUND) | |
| 1463 | + cpu = raw_smp_processor_id(); | |
| 1461 | 1464 | dwork->cpu = cpu; |
| 1462 | 1465 | timer->expires = jiffies + delay; |
| 1463 | 1466 | |
| 1464 | − if (unlikely(cpu != WORK_CPU_UNBOUND)) | |
| 1465 | − add_timer_on(timer, cpu); | |
| 1466 | − else | |
| 1467 | − add_timer(timer); | |
| 1467 | + add_timer_on(timer, cpu); | |
| 1468 | 1468 | } |
| 1469 | 1469 | |
| 1470 | 1470 | /** |
| @@ -220,6 +220,7 @@ config ZLIB_INFLATE · 219 unmodified lines | ||
| 220 | 220 | |
| 221 | 221 | config ZLIB_DEFLATE |
| 222 | 222 | tristate |
| 223 | + select BITREVERSE | |
| 223 | 224 | |
| 224 | 225 | config LZO_COMPRESS |
| 225 | 226 | tristate |
| @@ -197,6 +197,7 @@ config ENABLE_MUST_CHECK · 196 unmodified lines | ||
| 197 | 197 | config FRAME_WARN |
| 198 | 198 | int "Warn for stack frames larger than (needs gcc 4.4)" |
| 199 | 199 | range 0 8192 |
| 200 | + default 0 if KASAN | |
| 200 | 201 | default 1024 if !64BIT |
| 201 | 202 | default 2048 if 64BIT |
| 202 | 203 | help |
| @@ -44,7 +44,7 @@ static void fail_dump(struct fault_attr *attr) · 43 unmodified lines | ||
| 44 | 44 | printk(KERN_NOTICE "FAULT_INJECTION: forcing a failure.\n" |
| 45 | 45 | "name %pd, interval %lu, probability %lu, " |
| 46 | 46 | "space %d, times %d\n", attr->dname, |
| 47 | − attr->probability, attr->interval, | |
| 47 | + attr->interval, attr->probability, | |
| 48 | 48 | atomic_read(&attr->space), |
| 49 | 49 | atomic_read(&attr->times)); |
| 50 | 50 | if (attr->verbose > 1) |
| @@ -480,6 +480,10 @@ static void cgwb_release_workfn(struct work_struct *work) · 479 unmodified lines | ||
| 480 | 480 | release_work); |
| 481 | 481 | struct backing_dev_info *bdi = wb->bdi; |
| 482 | 482 | |
| 483 | + spin_lock_irq(&cgwb_lock); | |
| 484 | + list_del_rcu(&wb->bdi_node); | |
| 485 | + spin_unlock_irq(&cgwb_lock); | |
| 486 | + | |
| 483 | 487 | wb_shutdown(wb); |
| 484 | 488 | |
| 485 | 489 | css_put(wb->memcg_css); |
| @@ -575,6 +579,7 @@ static int cgwb_create(struct backing_dev_info *bdi, · 89 unmodified lines | ||
| 575 | 579 | ret = radix_tree_insert(&bdi->cgwb_tree, memcg_css->id, wb); |
| 576 | 580 | if (!ret) { |
| 577 | 581 | atomic_inc(&bdi->usage_cnt); |
| 582 | + list_add_tail_rcu(&wb->bdi_node, &bdi->wb_list); | |
| 578 | 583 | list_add(&wb->memcg_node, memcg_cgwb_list); |
| 579 | 584 | list_add(&wb->blkcg_node, blkcg_cgwb_list); |
| 580 | 585 | css_get(memcg_css); |
| @@ -676,7 +681,7 @@ static int cgwb_bdi_init(struct backing_dev_info *bdi) · 95 unmodified lines | ||
| 676 | 681 | static void cgwb_bdi_destroy(struct backing_dev_info *bdi) |
| 677 | 682 | { |
| 678 | 683 | struct radix_tree_iter iter; |
| 679 | − struct bdi_writeback_congested *congested, *congested_n; | |
| 684 | + struct rb_node *rbn; | |
| 680 | 685 | void **slot; |
| 681 | 686 | |
| 682 | 687 | WARN_ON(test_bit(WB_registered, &bdi->wb.state)); |
| @@ -686,9 +691,11 @@ static void cgwb_bdi_destroy(struct backing_dev_info *bdi) · 3 unmodified lines | ||
| 686 | 691 | radix_tree_for_each_slot(slot, &bdi->cgwb_tree, &iter, 0) |
| 687 | 692 | cgwb_kill(*slot); |
| 688 | 693 | |
| 689 | − rbtree_postorder_for_each_entry_safe(congested, congested_n, | |
| 690 | − &bdi->cgwb_congested_tree, rb_node) { | |
| 691 | − rb_erase(&congested->rb_node, &bdi->cgwb_congested_tree); | |
| 694 | + while ((rbn = rb_first(&bdi->cgwb_congested_tree))) { | |
| 695 | + struct bdi_writeback_congested *congested = | |
| 696 | + rb_entry(rbn, struct bdi_writeback_congested, rb_node); | |
| 697 | + | |
| 698 | + rb_erase(rbn, &bdi->cgwb_congested_tree); | |
| 692 | 699 | congested->bdi = NULL; /* mark @congested unlinked */ |
| 693 | 700 | } |
| 694 | 701 | |
| @@ -764,15 +771,22 @@ static void cgwb_bdi_destroy(struct backing_dev_info *bdi) { } · 69 unmodified lines | ||
| 764 | 771 | |
| 765 | 772 | int bdi_init(struct backing_dev_info *bdi) |
| 766 | 773 | { |
| 774 | + int ret; | |
| 775 | + | |
| 767 | 776 | bdi->dev = NULL; |
| 768 | 777 | |
| 769 | 778 | bdi->min_ratio = 0; |
| 770 | 779 | bdi->max_ratio = 100; |
| 771 | 780 | bdi->max_prop_frac = FPROP_FRAC_BASE; |
| 772 | 781 | INIT_LIST_HEAD(&bdi->bdi_list); |
| 782 | + INIT_LIST_HEAD(&bdi->wb_list); | |
| 773 | 783 | init_waitqueue_head(&bdi->wb_waitq); |
| 774 | 784 | |
| 775 | − return cgwb_bdi_init(bdi); | |
| 785 | + ret = cgwb_bdi_init(bdi); | |
| 786 | + | |
| 787 | + list_add_tail_rcu(&bdi->wb.bdi_node, &bdi->wb_list); | |
| 788 | + | |
| 789 | + return ret; | |
| 776 | 790 | } |
| 777 | 791 | EXPORT_SYMBOL(bdi_init); |
| 778 | 792 | |
| @@ -823,7 +837,7 @@ static void bdi_remove_from_list(struct backing_dev_info *bdi) · 44 unmodified lines | ||
| 823 | 837 | synchronize_rcu_expedited(); |
| 824 | 838 | } |
| 825 | 839 | |
| 826 | −void bdi_destroy(struct backing_dev_info *bdi) | |
| 840 | +void bdi_unregister(struct backing_dev_info *bdi) | |
| 827 | 841 | { |
| 828 | 842 | /* make sure nobody finds us on the bdi_list anymore */ |
| 829 | 843 | bdi_remove_from_list(bdi); |
| @@ -835,9 +849,19 @@ void bdi_destroy(struct backing_dev_info *bdi) · 5 unmodified lines | ||
| 835 | 849 | device_unregister(bdi->dev); |
| 836 | 850 | bdi->dev = NULL; |
| 837 | 851 | } |
| 852 | +} | |
| 838 | 853 | |
| 854 | +void bdi_exit(struct backing_dev_info *bdi) | |
| 855 | +{ | |
| 856 | + WARN_ON_ONCE(bdi->dev); | |
| 839 | 857 | wb_exit(&bdi->wb); |
| 840 | 858 | } |
| 859 | + | |
| 860 | +void bdi_destroy(struct backing_dev_info *bdi) | |
| 861 | +{ | |
| 862 | + bdi_unregister(bdi); | |
| 863 | + bdi_exit(bdi); | |
| 864 | +} | |
| 841 | 865 | EXPORT_SYMBOL(bdi_destroy); |
| 842 | 866 | |
| 843 | 867 | /* |
| @@ -361,7 +361,7 @@ err: · 360 unmodified lines | ||
| 361 | 361 | * This function allocates part of contiguous memory on specific |
| 362 | 362 | * contiguous memory area. |
| 363 | 363 | */ |
| 364 | −struct page *cma_alloc(struct cma *cma, unsigned int count, unsigned int align) | |
| 364 | +struct page *cma_alloc(struct cma *cma, size_t count, unsigned int align) | |
| 365 | 365 | { |
| 366 | 366 | unsigned long mask, offset, pfn, start = 0; |
| 367 | 367 | unsigned long bitmap_maxno, bitmap_no, bitmap_count; |
| @@ -371,7 +371,7 @@ struct page *cma_alloc(struct cma *cma, unsigned int count, unsigned int align) · 3 unmodified lines | ||
| 371 | 371 | if (!cma || !cma->count) |
| 372 | 372 | return NULL; |
| 373 | 373 | |
| 374 | − pr_debug("%s(cma %p, count %d, align %d)\n", __func__, (void *)cma, | |
| 374 | + pr_debug("%s(cma %p, count %zu, align %d)\n", __func__, (void *)cma, | |
| 375 | 375 | count, align); |
| 376 | 376 | |
| 377 | 377 | if (!count) |
| @@ -2488,6 +2488,11 @@ again: · 2487 unmodified lines | ||
| 2488 | 2488 | break; |
| 2489 | 2489 | } |
| 2490 | 2490 | |
| 2491 | + if (fatal_signal_pending(current)) { | |
| 2492 | + status = -EINTR; | |
| 2493 | + break; | |
| 2494 | + } | |
| 2495 | + | |
| 2491 | 2496 | status = a_ops->write_begin(file, mapping, pos, bytes, flags, |
| 2492 | 2497 | &page, &fsdata); |
| 2493 | 2498 | if (unlikely(status < 0)) |
| @@ -2525,10 +2530,6 @@ again: · 31 unmodified lines | ||
| 2525 | 2530 | written += copied; |
| 2526 | 2531 | |
| 2527 | 2532 | balance_dirty_pages_ratelimited(mapping); |
| 2528 | − if (fatal_signal_pending(current)) { | |
| 2529 | − status = -EINTR; | |
| 2530 | − break; | |
| 2531 | − } | |
| 2532 | 2533 | } while (iov_iter_count(i)); |
| 2533 | 2534 | |
| 2534 | 2535 | return written ? written : status; |
| @@ -2206,7 +2206,8 @@ static int __collapse_huge_page_isolate(struct vm_area_struct *vma, · 2205 unmodified lines | ||
| 2206 | 2206 | for (_pte = pte; _pte < pte+HPAGE_PMD_NR; |
| 2207 | 2207 | _pte++, address += PAGE_SIZE) { |
| 2208 | 2208 | pte_t pteval = *_pte; |
| 2209 | − if (pte_none(pteval) || is_zero_pfn(pte_pfn(pteval))) { | |
| 2209 | + if (pte_none(pteval) || (pte_present(pteval) && | |
| 2210 | + is_zero_pfn(pte_pfn(pteval)))) { | |
| 2210 | 2211 | if (!userfaultfd_armed(vma) && |
| 2211 | 2212 | ++none_or_zero <= khugepaged_max_ptes_none) |
| 2212 | 2213 | continue; |
| @@ -3387,6 +3387,7 @@ static int __mem_cgroup_usage_register_event(struct mem_cgroup *memcg, · 3386 unmodified lines | ||
| 3387 | 3387 | ret = page_counter_memparse(args, "-1", &threshold); |
| 3388 | 3388 | if (ret) |
| 3389 | 3389 | return ret; |
| 3390 | + threshold <<= PAGE_SHIFT; | |
| 3390 | 3391 | |
| 3391 | 3392 | mutex_lock(&memcg->thresholds_lock); |
| 3392 | 3393 | |
| @@ -3740,44 +3741,43 @@ struct wb_domain *mem_cgroup_wb_domain(struct bdi_writeback *wb) · 347 unmodified lines | ||
| 3740 | 3741 | /** |
| 3741 | 3742 | * mem_cgroup_wb_stats - retrieve writeback related stats from its memcg |
| 3742 | 3743 | * @wb: bdi_writeback in question |
| 3743 | − * @pavail: out parameter for number of available pages | |
| 3744 | + * @pfilepages: out parameter for number of file pages | |
| 3745 | + * @pheadroom: out parameter for number of allocatable pages according to memcg | |
| 3744 | 3746 | * @pdirty: out parameter for number of dirty pages |
| 3745 | 3747 | * @pwriteback: out parameter for number of pages under writeback |
| 3746 | 3748 | * |
| 3747 | − * Determine the numbers of available, dirty, and writeback pages in @wb's | |
| 3748 | − * memcg. Dirty and writeback are self-explanatory. Available is a bit | |
| 3749 | − * more involved. | |
| 3749 | + * Determine the numbers of file, headroom, dirty, and writeback pages in | |
| 3750 | + * @wb's memcg. File, dirty and writeback are self-explanatory. Headroom | |
| 3751 | + * is a bit more involved. | |
| 3750 | 3752 | * |
| 3751 | − * A memcg's headroom is "min(max, high) - used". The available memory is | |
| 3752 | − * calculated as the lowest headroom of itself and the ancestors plus the | |
| 3753 | − * number of pages already being used for file pages. Note that this | |
| 3754 | − * doesn't consider the actual amount of available memory in the system. | |
| 3755 | − * The caller should further cap *@pavail accordingly. | |
| 3753 | + * A memcg's headroom is "min(max, high) - used". In the hierarchy, the | |
| 3754 | + * headroom is calculated as the lowest headroom of itself and the | |
| 3755 | + * ancestors. Note that this doesn't consider the actual amount of | |
| 3756 | + * available memory in the system. The caller should further cap | |
| 3757 | + * *@pheadroom accordingly. | |
| 3756 | 3758 | */ |
| 3757 | −void mem_cgroup_wb_stats(struct bdi_writeback *wb, unsigned long *pavail, | |
| 3758 | − unsigned long *pdirty, unsigned long *pwriteback) | |
| 3759 | +void mem_cgroup_wb_stats(struct bdi_writeback *wb, unsigned long *pfilepages, | |
| 3760 | + unsigned long *pheadroom, unsigned long *pdirty, | |
| 3761 | + unsigned long *pwriteback) | |
| 3759 | 3762 | { |
| 3760 | 3763 | struct mem_cgroup *memcg = mem_cgroup_from_css(wb->memcg_css); |
| 3761 | 3764 | struct mem_cgroup *parent; |
| 3762 | − unsigned long head_room = PAGE_COUNTER_MAX; | |
| 3763 | − unsigned long file_pages; | |
| 3764 | 3765 | |
| 3765 | 3766 | *pdirty = mem_cgroup_read_stat(memcg, MEM_CGROUP_STAT_DIRTY); |
| 3766 | 3767 | |
| 3767 | 3768 | /* this should eventually include NR_UNSTABLE_NFS */ |
| 3768 | 3769 | *pwriteback = mem_cgroup_read_stat(memcg, MEM_CGROUP_STAT_WRITEBACK); |
| 3770 | + *pfilepages = mem_cgroup_nr_lru_pages(memcg, (1 << LRU_INACTIVE_FILE) | | |
| 3771 | + (1 << LRU_ACTIVE_FILE)); | |
| 3772 | + *pheadroom = PAGE_COUNTER_MAX; | |
| 3769 | 3773 | |
| 3770 | − file_pages = mem_cgroup_nr_lru_pages(memcg, (1 << LRU_INACTIVE_FILE) | | |
| 3771 | − (1 << LRU_ACTIVE_FILE)); | |
| 3772 | 3774 | while ((parent = parent_mem_cgroup(memcg))) { |
| 3773 | 3775 | unsigned long ceiling = min(memcg->memory.limit, memcg->high); |
| 3774 | 3776 | unsigned long used = page_counter_read(&memcg->memory); |
| 3775 | 3777 | |
| 3776 | − head_room = min(head_room, ceiling - min(ceiling, used)); | |
| 3778 | + *pheadroom = min(*pheadroom, ceiling - min(ceiling, used)); | |
| 3777 | 3779 | memcg = parent; |
| 3778 | 3780 | } |
| 3779 | − | |
| 3780 | − *pavail = file_pages + head_room; | |
| 3781 | 3781 | } |
| 3782 | 3782 | |
| 3783 | 3783 | #else /* CONFIG_CGROUP_WRITEBACK */ |
| @@ -2426,6 +2426,8 @@ void unmap_mapping_range(struct address_space *mapping, · 2425 unmodified lines | ||
| 2426 | 2426 | if (details.last_index < details.first_index) |
| 2427 | 2427 | details.last_index = ULONG_MAX; |
| 2428 | 2428 | |
| 2429 | + | |
| 2430 | + /* DAX uses i_mmap_lock to serialise file truncate vs page fault */ | |
| 2429 | 2431 | i_mmap_lock_write(mapping); |
| 2430 | 2432 | if (unlikely(!RB_EMPTY_ROOT(&mapping->i_mmap))) |
| 2431 | 2433 | unmap_mapping_range_tree(&mapping->i_mmap, &details); |
| @@ -145,9 +145,6 @@ struct dirty_throttle_control { · 144 unmodified lines | ||
| 145 | 145 | unsigned long pos_ratio; |
| 146 | 146 | }; |
| 147 | 147 | |
| 148 | −#define DTC_INIT_COMMON(__wb) .wb = (__wb), \ | |
| 149 | − .wb_completions = &(__wb)->completions | |
| 150 | − | |
| 151 | 148 | /* |
| 152 | 149 | * Length of period for aging writeout fractions of bdis. This is an |
| 153 | 150 | * arbitrarily chosen number. The longer the period, the slower fractions will |
| @@ -157,12 +154,16 @@ struct dirty_throttle_control { · 3 unmodified lines | ||
| 157 | 154 | |
| 158 | 155 | #ifdef CONFIG_CGROUP_WRITEBACK |
| 159 | 156 | |
| 160 | −#define GDTC_INIT(__wb) .dom = &global_wb_domain, \ | |
| 161 | − DTC_INIT_COMMON(__wb) | |
| 157 | +#define GDTC_INIT(__wb) .wb = (__wb), \ | |
| 158 | + .dom = &global_wb_domain, \ | |
| 159 | + .wb_completions = &(__wb)->completions | |
| 160 | + | |
| 162 | 161 | #define GDTC_INIT_NO_WB .dom = &global_wb_domain |
| 163 | −#define MDTC_INIT(__wb, __gdtc) .dom = mem_cgroup_wb_domain(__wb), \ | |
| 164 | − .gdtc = __gdtc, \ | |
| 165 | − DTC_INIT_COMMON(__wb) | |
| 162 | + | |
| 163 | +#define MDTC_INIT(__wb, __gdtc) .wb = (__wb), \ | |
| 164 | + .dom = mem_cgroup_wb_domain(__wb), \ | |
| 165 | + .wb_completions = &(__wb)->memcg_completions, \ | |
| 166 | + .gdtc = __gdtc | |
| 166 | 167 | |
| 167 | 168 | static bool mdtc_valid(struct dirty_throttle_control *dtc) |
| 168 | 169 | { |
| @@ -213,7 +214,8 @@ static void wb_min_max_ratio(struct bdi_writeback *wb, · 44 unmodified lines | ||
| 213 | 214 | |
| 214 | 215 | #else /* CONFIG_CGROUP_WRITEBACK */ |
| 215 | 216 | |
| 216 | −#define GDTC_INIT(__wb) DTC_INIT_COMMON(__wb) | |
| 217 | +#define GDTC_INIT(__wb) .wb = (__wb), \ | |
| 218 | + .wb_completions = &(__wb)->completions | |
| 217 | 219 | #define GDTC_INIT_NO_WB |
| 218 | 220 | #define MDTC_INIT(__wb, __gdtc) |
| 219 | 221 | |
| @@ -682,13 +684,19 @@ static unsigned long hard_dirty_limit(struct wb_domain *dom, · 462 unmodified lines | ||
| 682 | 684 | return max(thresh, dom->dirty_limit); |
| 683 | 685 | } |
| 684 | 686 | |
| 685 | −/* memory available to a memcg domain is capped by system-wide clean memory */ | |
| 686 | −static void mdtc_cap_avail(struct dirty_throttle_control *mdtc) | |
| 687 | +/* | |
| 688 | + * Memory which can be further allocated to a memcg domain is capped by | |
| 689 | + * system-wide clean memory excluding the amount being used in the domain. | |
| 690 | + */ | |
| 691 | +static void mdtc_calc_avail(struct dirty_throttle_control *mdtc, | |
| 692 | + unsigned long filepages, unsigned long headroom) | |
| 687 | 693 | { |
| 688 | 694 | struct dirty_throttle_control *gdtc = mdtc_gdtc(mdtc); |
| 689 | − unsigned long clean = gdtc->avail - min(gdtc->avail, gdtc->dirty); | |
| 695 | + unsigned long clean = filepages - min(filepages, mdtc->dirty); | |
| 696 | + unsigned long global_clean = gdtc->avail - min(gdtc->avail, gdtc->dirty); | |
| 697 | + unsigned long other_clean = global_clean - min(global_clean, clean); | |
| 690 | 698 | |
| 691 | − mdtc->avail = min(mdtc->avail, clean); | |
| 699 | + mdtc->avail = filepages + min(headroom, other_clean); | |
| 692 | 700 | } |
| 693 | 701 | |
| 694 | 702 | /** |
| @@ -1562,16 +1570,16 @@ static void balance_dirty_pages(struct address_space *mapping, · 867 unmodified lines | ||
| 1562 | 1570 | } |
| 1563 | 1571 | |
| 1564 | 1572 | if (mdtc) { |
| 1565 | − unsigned long writeback; | |
| 1573 | + unsigned long filepages, headroom, writeback; | |
| 1566 | 1574 | |
| 1567 | 1575 | /* |
| 1568 | 1576 | * If @wb belongs to !root memcg, repeat the same |
| 1569 | 1577 | * basic calculations for the memcg domain. |
| 1570 | 1578 | */ |
| 1571 | − mem_cgroup_wb_stats(wb, &mdtc->avail, &mdtc->dirty, | |
| 1572 | − &writeback); | |
| 1573 | − mdtc_cap_avail(mdtc); | |
| 1579 | + mem_cgroup_wb_stats(wb, &filepages, &headroom, | |
| 1580 | + &mdtc->dirty, &writeback); | |
| 1574 | 1581 | mdtc->dirty += writeback; |
| 1582 | + mdtc_calc_avail(mdtc, filepages, headroom); | |
| 1575 | 1583 | |
| 1576 | 1584 | domain_dirty_limits(mdtc); |
| 1577 | 1585 | |
| @@ -1893,10 +1901,11 @@ bool wb_over_bg_thresh(struct bdi_writeback *wb) · 315 unmodified lines | ||
| 1893 | 1901 | return true; |
| 1894 | 1902 | |
| 1895 | 1903 | if (mdtc) { |
| 1896 | − unsigned long writeback; | |
| 1904 | + unsigned long filepages, headroom, writeback; | |
| 1897 | 1905 | |
| 1898 | − mem_cgroup_wb_stats(wb, &mdtc->avail, &mdtc->dirty, &writeback); | |
| 1899 | − mdtc_cap_avail(mdtc); | |
| 1906 | + mem_cgroup_wb_stats(wb, &filepages, &headroom, &mdtc->dirty, | |
| 1907 | + &writeback); | |
| 1908 | + mdtc_calc_avail(mdtc, filepages, headroom); | |
| 1900 | 1909 | domain_dirty_limits(mdtc); /* ditto, ignore writeback */ |
| 1901 | 1910 | |
| 1902 | 1911 | if (mdtc->dirty > mdtc->bg_thresh) |
| @@ -1956,7 +1965,6 @@ void laptop_mode_timer_fn(unsigned long data) · 53 unmodified lines | ||
| 1956 | 1965 | int nr_pages = global_page_state(NR_FILE_DIRTY) + |
| 1957 | 1966 | global_page_state(NR_UNSTABLE_NFS); |
| 1958 | 1967 | struct bdi_writeback *wb; |
| 1959 | − struct wb_iter iter; | |
| 1960 | 1968 | |
| 1961 | 1969 | /* |
| 1962 | 1970 | * We want to write everything out, not just down to the dirty |
| @@ -1965,10 +1973,12 @@ void laptop_mode_timer_fn(unsigned long data) · 2 unmodified lines | ||
| 1965 | 1973 | if (!bdi_has_dirty_io(&q->backing_dev_info)) |
| 1966 | 1974 | return; |
| 1967 | 1975 | |
| 1968 | − bdi_for_each_wb(wb, &q->backing_dev_info, &iter, 0) | |
| 1976 | + rcu_read_lock(); | |
| 1977 | + list_for_each_entry_rcu(wb, &q->backing_dev_info.wb_list, bdi_node) | |
| 1969 | 1978 | if (wb_has_dirty_io(wb)) |
| 1970 | 1979 | wb_start_writeback(wb, nr_pages, true, |
| 1971 | 1980 | WB_REASON_LAPTOP_TIMER); |
| 1981 | + rcu_read_unlock(); | |
| 1972 | 1982 | } |
| 1973 | 1983 | |
| 1974 | 1984 | /* |
| @@ -89,8 +89,8 @@ int read_cache_pages(struct address_space *mapping, struct list_head *pages, · 88 unmodified lines | ||
| 89 | 89 | while (!list_empty(pages)) { |
| 90 | 90 | page = list_to_page(pages); |
| 91 | 91 | list_del(&page->lru); |
| 92 | − if (add_to_page_cache_lru(page, mapping, | |
| 93 | − page->index, GFP_KERNEL)) { | |
| 92 | + if (add_to_page_cache_lru(page, mapping, page->index, | |
| 93 | + GFP_KERNEL & mapping_gfp_mask(mapping))) { | |
| 94 | 94 | read_cache_pages_invalidate_page(mapping, page); |
| 95 | 95 | continue; |
| 96 | 96 | } |
| @@ -127,8 +127,8 @@ static int read_pages(struct address_space *mapping, struct file *filp, · 30 unmodified lines | ||
| 127 | 127 | for (page_idx = 0; page_idx < nr_pages; page_idx++) { |
| 128 | 128 | struct page *page = list_to_page(pages); |
| 129 | 129 | list_del(&page->lru); |
| 130 | − if (!add_to_page_cache_lru(page, mapping, | |
| 131 | − page->index, GFP_KERNEL)) { | |
| 130 | + if (!add_to_page_cache_lru(page, mapping, page->index, | |
| 131 | + GFP_KERNEL & mapping_gfp_mask(mapping))) { | |
| 132 | 132 | mapping->a_ops->readpage(filp, page); |
| 133 | 133 | } |
| 134 | 134 | page_cache_release(page); |
| @@ -1363,15 +1363,16 @@ static cpumask_var_t cpu_stat_off; · 1362 unmodified lines | ||
| 1363 | 1363 | |
| 1364 | 1364 | static void vmstat_update(struct work_struct *w) |
| 1365 | 1365 | { |
| 1366 | − if (refresh_cpu_vm_stats()) | |
| 1366 | + if (refresh_cpu_vm_stats()) { | |
| 1367 | 1367 | /* |
| 1368 | 1368 | * Counters were updated so we expect more updates |
| 1369 | 1369 | * to occur in the future. Keep on running the |
| 1370 | 1370 | * update worker thread. |
| 1371 | 1371 | */ |
| 1372 | − schedule_delayed_work(this_cpu_ptr(&vmstat_work), | |
| 1372 | + schedule_delayed_work_on(smp_processor_id(), | |
| 1373 | + this_cpu_ptr(&vmstat_work), | |
| 1373 | 1374 | round_jiffies_relative(sysctl_stat_interval)); |
| 1374 | − else { | |
| 1375 | + } else { | |
| 1375 | 1376 | /* |
| 1376 | 1377 | * We did not update any counters so the app may be in |
| 1377 | 1378 | * a mode where it does not cause counter updates. |
| @@ -91,10 +91,50 @@ static void hci_connect_le_scan_cleanup(struct hci_conn *conn) · 90 unmodified lines | ||
| 91 | 91 | * autoconnect action, remove them completely. If they are, just unmark |
| 92 | 92 | * them as waiting for connection, by clearing explicit_connect field. |
| 93 | 93 | */ |
| 94 | − if (params->auto_connect == HCI_AUTO_CONN_EXPLICIT) | |
| 94 | + params->explicit_connect = false; | |
| 95 | + | |
| 96 | + list_del_init(¶ms->action); | |
| 97 | + | |
| 98 | + switch (params->auto_connect) { | |
| 99 | + case HCI_AUTO_CONN_EXPLICIT: | |
| 95 | 100 | hci_conn_params_del(conn->hdev, bdaddr, bdaddr_type); |
| 96 | − else | |
| 97 | − params->explicit_connect = false; | |
| 101 | + /* return instead of break to avoid duplicate scan update */ | |
| 102 | + return; | |
| 103 | + case HCI_AUTO_CONN_DIRECT: | |
| 104 | + case HCI_AUTO_CONN_ALWAYS: | |
| 105 | + list_add(¶ms->action, &conn->hdev->pend_le_conns); | |
| 106 | + break; | |
| 107 | + case HCI_AUTO_CONN_REPORT: | |
| 108 | + list_add(¶ms->action, &conn->hdev->pend_le_reports); | |
| 109 | + break; | |
| 110 | + default: | |
| 111 | + break; | |
| 112 | + } | |
| 113 | + | |
| 114 | + hci_update_background_scan(conn->hdev); | |
| 115 | +} | |
| 116 | + | |
| 117 | +static void hci_conn_cleanup(struct hci_conn *conn) | |
| 118 | +{ | |
| 119 | + struct hci_dev *hdev = conn->hdev; | |
| 120 | + | |
| 121 | + if (test_bit(HCI_CONN_PARAM_REMOVAL_PEND, &conn->flags)) | |
| 122 | + hci_conn_params_del(conn->hdev, &conn->dst, conn->dst_type); | |
| 123 | + | |
| 124 | + hci_chan_list_flush(conn); | |
| 125 | + | |
| 126 | + hci_conn_hash_del(hdev, conn); | |
| 127 | + | |
| 128 | + if (hdev->notify) | |
| 129 | + hdev->notify(hdev, HCI_NOTIFY_CONN_DEL); | |
| 130 | + | |
| 131 | + hci_conn_del_sysfs(conn); | |
| 132 | + | |
| 133 | + debugfs_remove_recursive(conn->debugfs); | |
| 134 | + | |
| 135 | + hci_dev_put(hdev); | |
| 136 | + | |
| 137 | + hci_conn_put(conn); | |
| 98 | 138 | } |
| 99 | 139 | |
| 100 | 140 | /* This function requires the caller holds hdev->lock */ |
| @@ -102,8 +142,13 @@ static void hci_connect_le_scan_remove(struct hci_conn *conn) · 1 unmodified line | ||
| 102 | 142 | { |
| 103 | 143 | hci_connect_le_scan_cleanup(conn); |
| 104 | 144 | |
| 105 | − hci_conn_hash_del(conn->hdev, conn); | |
| 106 | − hci_update_background_scan(conn->hdev); | |
| 145 | + /* We can't call hci_conn_del here since that would deadlock | |
| 146 | + * with trying to call cancel_delayed_work_sync(&conn->disc_work). | |
| 147 | + * Instead, call just hci_conn_cleanup() which contains the bare | |
| 148 | + * minimum cleanup operations needed for a connection in this | |
| 149 | + * state. | |
| 150 | + */ | |
| 151 | + hci_conn_cleanup(conn); | |
| 107 | 152 | } |
| 108 | 153 | |
| 109 | 154 | static void hci_acl_create_connection(struct hci_conn *conn) |
| @@ -581,27 +626,17 @@ int hci_conn_del(struct hci_conn *conn) · 471 unmodified lines | ||
| 581 | 626 | } |
| 582 | 627 | } |
| 583 | 628 | |
| 584 | − hci_chan_list_flush(conn); | |
| 585 | − | |
| 586 | 629 | if (conn->amp_mgr) |
| 587 | 630 | amp_mgr_put(conn->amp_mgr); |
| 588 | 631 | |
| 589 | − hci_conn_hash_del(hdev, conn); | |
| 590 | − if (hdev->notify) | |
| 591 | − hdev->notify(hdev, HCI_NOTIFY_CONN_DEL); | |
| 592 | − | |
| 593 | 632 | skb_queue_purge(&conn->data_q); |
| 594 | 633 | |
| 595 | − hci_conn_del_sysfs(conn); | |
| 596 | − | |
| 597 | − debugfs_remove_recursive(conn->debugfs); | |
| 598 | − | |
| 599 | − if (test_bit(HCI_CONN_PARAM_REMOVAL_PEND, &conn->flags)) | |
| 600 | − hci_conn_params_del(conn->hdev, &conn->dst, conn->dst_type); | |
| 601 | − | |
| 602 | − hci_dev_put(hdev); | |
| 603 | − | |
| 604 | − hci_conn_put(conn); | |
| 634 | + /* Remove the connection from the list and cleanup its remaining | |
| 635 | + * state. This is a separate function since for some cases like | |
| 636 | + * BT_CONNECT_SCAN we *only* want the cleanup part without the | |
| 637 | + * rest of hci_conn_del. | |
| 638 | + */ | |
| 639 | + hci_conn_cleanup(conn); | |
| 605 | 640 | |
| 606 | 641 | return 0; |
| 607 | 642 | } |
| @@ -973,15 +1008,23 @@ static int hci_explicit_conn_params_set(struct hci_request *req, · 365 unmodified lines | ||
| 973 | 1008 | if (is_connected(hdev, addr, addr_type)) |
| 974 | 1009 | return -EISCONN; |
| 975 | 1010 | |
| 976 | − params = hci_conn_params_add(hdev, addr, addr_type); | |
| 977 | − if (!params) | |
| 978 | − return -EIO; | |
| 1011 | + params = hci_conn_params_lookup(hdev, addr, addr_type); | |
| 1012 | + if (!params) { | |
| 1013 | + params = hci_conn_params_add(hdev, addr, addr_type); | |
| 1014 | + if (!params) | |
| 1015 | + return -ENOMEM; | |
| 979 | 1016 | |
| 980 | − /* If we created new params, or existing params were marked as disabled, | |
| 981 | − * mark them to be used just once to connect. | |
| 982 | − */ | |
| 983 | − if (params->auto_connect == HCI_AUTO_CONN_DISABLED) { | |
| 1017 | + /* If we created new params, mark them to be deleted in | |
| 1018 | + * hci_connect_le_scan_cleanup. It's different case than | |
| 1019 | + * existing disabled params, those will stay after cleanup. | |
| 1020 | + */ | |
| 984 | 1021 | params->auto_connect = HCI_AUTO_CONN_EXPLICIT; |
| 1022 | + } | |
| 1023 | + | |
| 1024 | + /* We're trying to connect, so make sure params are at pend_le_conns */ | |
| 1025 | + if (params->auto_connect == HCI_AUTO_CONN_DISABLED || | |
| 1026 | + params->auto_connect == HCI_AUTO_CONN_REPORT || | |
| 1027 | + params->auto_connect == HCI_AUTO_CONN_EXPLICIT) { | |
| 985 | 1028 | list_del_init(¶ms->action); |
| 986 | 1029 | list_add(¶ms->action, &hdev->pend_le_conns); |
| 987 | 1030 | } |
| @@ -2861,13 +2861,6 @@ struct hci_conn_params *hci_explicit_connect_lookup(struct hci_dev *hdev, · 2860 unmodified lines | ||
| 2861 | 2861 | return param; |
| 2862 | 2862 | } |
| 2863 | 2863 | |
| 2864 | − list_for_each_entry(param, &hdev->pend_le_reports, action) { | |
| 2865 | − if (bacmp(¶m->addr, addr) == 0 && | |
| 2866 | − param->addr_type == addr_type && | |
| 2867 | − param->explicit_connect) | |
| 2868 | − return param; | |
| 2869 | − } | |
| 2870 | − | |
| 2871 | 2864 | return NULL; |
| 2872 | 2865 | } |
| 2873 | 2866 | |
| @@ -55,7 +55,12 @@ static void hci_cc_inquiry_cancel(struct hci_dev *hdev, struct sk_buff *skb) · 54 unmodified lines | ||
| 55 | 55 | wake_up_bit(&hdev->flags, HCI_INQUIRY); |
| 56 | 56 | |
| 57 | 57 | hci_dev_lock(hdev); |
| 58 | − hci_discovery_set_state(hdev, DISCOVERY_STOPPED); | |
| 58 | + /* Set discovery state to stopped if we're not doing LE active | |
| 59 | + * scanning. | |
| 60 | + */ | |
| 61 | + if (!hci_dev_test_flag(hdev, HCI_LE_SCAN) || | |
| 62 | + hdev->le_scan_type != LE_SCAN_ACTIVE) | |
| 63 | + hci_discovery_set_state(hdev, DISCOVERY_STOPPED); | |
| 59 | 64 | hci_dev_unlock(hdev); |
| 60 | 65 | |
| 61 | 66 | hci_conn_check_pending(hdev); |
| @@ -4648,8 +4653,8 @@ static struct hci_conn *check_pending_le_conn(struct hci_dev *hdev, · 4586 unmodified lines | ||
| 4648 | 4653 | /* If we're not connectable only connect devices that we have in |
| 4649 | 4654 | * our pend_le_conns list. |
| 4650 | 4655 | */ |
| 4651 | − params = hci_explicit_connect_lookup(hdev, addr, addr_type); | |
| 4652 | − | |
| 4656 | + params = hci_pend_le_action_lookup(&hdev->pend_le_conns, addr, | |
| 4657 | + addr_type); | |
| 4653 | 4658 | if (!params) |
| 4654 | 4659 | return NULL; |
| 4655 | 4660 | |
| @@ -3545,6 +3545,7 @@ static int pair_device(struct sock *sk, struct hci_dev *hdev, void *data, · 3544 unmodified lines | ||
| 3545 | 3545 | auth_type); |
| 3546 | 3546 | } else { |
| 3547 | 3547 | u8 addr_type; |
| 3548 | + struct hci_conn_params *p; | |
| 3548 | 3549 | |
| 3549 | 3550 | /* Convert from L2CAP channel address type to HCI address type |
| 3550 | 3551 | */ |
| @@ -3562,7 +3563,10 @@ static int pair_device(struct sock *sk, struct hci_dev *hdev, void *data, · 11 unmodified lines | ||
| 3562 | 3563 | * If connection parameters already exist, then they |
| 3563 | 3564 | * will be kept and this function does nothing. |
| 3564 | 3565 | */ |
| 3565 | − hci_conn_params_add(hdev, &cp->addr.bdaddr, addr_type); | |
| 3566 | + p = hci_conn_params_add(hdev, &cp->addr.bdaddr, addr_type); | |
| 3567 | + | |
| 3568 | + if (p->auto_connect == HCI_AUTO_CONN_EXPLICIT) | |
| 3569 | + p->auto_connect = HCI_AUTO_CONN_DISABLED; | |
| 3566 | 3570 | |
| 3567 | 3571 | conn = hci_connect_le_scan(hdev, &cp->addr.bdaddr, |
| 3568 | 3572 | addr_type, sec_level, |
| @@ -6117,14 +6121,21 @@ static int hci_conn_params_set(struct hci_request *req, bdaddr_t *addr, · 2548 unmodified lines | ||
| 6117 | 6121 | __hci_update_background_scan(req); |
| 6118 | 6122 | break; |
| 6119 | 6123 | case HCI_AUTO_CONN_REPORT: |
| 6120 | − list_add(¶ms->action, &hdev->pend_le_reports); | |
| 6124 | + if (params->explicit_connect) | |
| 6125 | + list_add(¶ms->action, &hdev->pend_le_conns); | |
| 6126 | + else | |
| 6127 | + list_add(¶ms->action, &hdev->pend_le_reports); | |
| 6121 | 6128 | __hci_update_background_scan(req); |
| 6122 | 6129 | break; |
| 6123 | 6130 | case HCI_AUTO_CONN_DIRECT: |
| 6124 | 6131 | case HCI_AUTO_CONN_ALWAYS: |
| 6125 | 6132 | if (!is_connected(hdev, addr, addr_type)) { |
| 6126 | 6133 | list_add(¶ms->action, &hdev->pend_le_conns); |
| 6127 | − __hci_update_background_scan(req); | |
| 6134 | + /* If we are in scan phase of connecting, we were | |
| 6135 | + * already added to pend_le_conns and scanning. | |
| 6136 | + */ | |
| 6137 | + if (params->auto_connect != HCI_AUTO_CONN_EXPLICIT) | |
| 6138 | + __hci_update_background_scan(req); | |
| 6128 | 6139 | } |
| 6129 | 6140 | break; |
| 6130 | 6141 | } |
| @@ -6379,7 +6390,8 @@ static int remove_device(struct sock *sk, struct hci_dev *hdev, · 248 unmodified lines | ||
| 6379 | 6390 | goto unlock; |
| 6380 | 6391 | } |
| 6381 | 6392 | |
| 6382 | − if (params->auto_connect == HCI_AUTO_CONN_DISABLED) { | |
| 6393 | + if (params->auto_connect == HCI_AUTO_CONN_DISABLED || | |
| 6394 | + params->auto_connect == HCI_AUTO_CONN_EXPLICIT) { | |
| 6383 | 6395 | err = cmd->cmd_complete(cmd, |
| 6384 | 6396 | MGMT_STATUS_INVALID_PARAMS); |
| 6385 | 6397 | mgmt_pending_remove(cmd); |
| @@ -6415,6 +6427,10 @@ static int remove_device(struct sock *sk, struct hci_dev *hdev, · 29 unmodified lines | ||
| 6415 | 6427 | if (p->auto_connect == HCI_AUTO_CONN_DISABLED) |
| 6416 | 6428 | continue; |
| 6417 | 6429 | device_removed(sk, hdev, &p->addr, p->addr_type); |
| 6430 | + if (p->explicit_connect) { | |
| 6431 | + p->auto_connect = HCI_AUTO_CONN_EXPLICIT; | |
| 6432 | + continue; | |
| 6433 | + } | |
| 6418 | 6434 | list_del(&p->action); |
| 6419 | 6435 | list_del(&p->list); |
| 6420 | 6436 | kfree(p); |
| @@ -285,6 +285,7 @@ static void osd_req_op_data_release(struct ceph_osd_request *osd_req, · 284 unmodified lines | ||
| 285 | 285 | switch (op->op) { |
| 286 | 286 | case CEPH_OSD_OP_READ: |
| 287 | 287 | case CEPH_OSD_OP_WRITE: |
| 288 | + case CEPH_OSD_OP_WRITEFULL: | |
| 288 | 289 | ceph_osd_data_release(&op->extent.osd_data); |
| 289 | 290 | break; |
| 290 | 291 | case CEPH_OSD_OP_CALL: |
| @@ -485,13 +486,14 @@ void osd_req_op_extent_init(struct ceph_osd_request *osd_req, · 194 unmodified lines | ||
| 485 | 486 | size_t payload_len = 0; |
| 486 | 487 | |
| 487 | 488 | BUG_ON(opcode != CEPH_OSD_OP_READ && opcode != CEPH_OSD_OP_WRITE && |
| 488 | − opcode != CEPH_OSD_OP_ZERO && opcode != CEPH_OSD_OP_TRUNCATE); | |
| 489 | + opcode != CEPH_OSD_OP_WRITEFULL && opcode != CEPH_OSD_OP_ZERO && | |
| 490 | + opcode != CEPH_OSD_OP_TRUNCATE); | |
| 489 | 491 | |
| 490 | 492 | op->extent.offset = offset; |
| 491 | 493 | op->extent.length = length; |
| 492 | 494 | op->extent.truncate_size = truncate_size; |
| 493 | 495 | op->extent.truncate_seq = truncate_seq; |
| 494 | − if (opcode == CEPH_OSD_OP_WRITE) | |
| 496 | + if (opcode == CEPH_OSD_OP_WRITE || opcode == CEPH_OSD_OP_WRITEFULL) | |
| 495 | 497 | payload_len += length; |
| 496 | 498 | |
| 497 | 499 | op->payload_len = payload_len; |
| @@ -670,9 +672,11 @@ static u64 osd_req_encode_op(struct ceph_osd_request *req, · 172 unmodified lines | ||
| 670 | 672 | break; |
| 671 | 673 | case CEPH_OSD_OP_READ: |
| 672 | 674 | case CEPH_OSD_OP_WRITE: |
| 675 | + case CEPH_OSD_OP_WRITEFULL: | |
| 673 | 676 | case CEPH_OSD_OP_ZERO: |
| 674 | 677 | case CEPH_OSD_OP_TRUNCATE: |
| 675 | − if (src->op == CEPH_OSD_OP_WRITE) | |
| 678 | + if (src->op == CEPH_OSD_OP_WRITE || | |
| 679 | + src->op == CEPH_OSD_OP_WRITEFULL) | |
| 676 | 680 | request_data_len = src->extent.length; |
| 677 | 681 | dst->extent.offset = cpu_to_le64(src->extent.offset); |
| 678 | 682 | dst->extent.length = cpu_to_le64(src->extent.length); |
| @@ -681,7 +685,8 @@ static u64 osd_req_encode_op(struct ceph_osd_request *req, · 2 unmodified lines | ||
| 681 | 685 | dst->extent.truncate_seq = |
| 682 | 686 | cpu_to_le32(src->extent.truncate_seq); |
| 683 | 687 | osd_data = &src->extent.osd_data; |
| 684 | − if (src->op == CEPH_OSD_OP_WRITE) | |
| 688 | + if (src->op == CEPH_OSD_OP_WRITE || | |
| 689 | + src->op == CEPH_OSD_OP_WRITEFULL) | |
| 685 | 690 | ceph_osdc_msg_data_add(req->r_request, osd_data); |
| 686 | 691 | else |
| 687 | 692 | ceph_osdc_msg_data_add(req->r_reply, osd_data); |
| @@ -1284,7 +1284,7 @@ static int ethtool_get_strings(struct net_device *dev, void __user *useraddr) · 1283 unmodified lines | ||
| 1284 | 1284 | |
| 1285 | 1285 | gstrings.len = ret; |
| 1286 | 1286 | |
| 1287 | − data = kmalloc(gstrings.len * ETH_GSTRING_LEN, GFP_USER); | |
| 1287 | + data = kcalloc(gstrings.len, ETH_GSTRING_LEN, GFP_USER); | |
| 1288 | 1288 | if (!data) |
| 1289 | 1289 | return -ENOMEM; |
| 1290 | 1290 | |
| @@ -1415,6 +1415,7 @@ static u64 bpf_clone_redirect(u64 r1, u64 ifindex, u64 flags, u64 r4, u64 r5) · 1414 unmodified lines | ||
| 1415 | 1415 | return dev_forward_skb(dev, skb2); |
| 1416 | 1416 | |
| 1417 | 1417 | skb2->dev = dev; |
| 1418 | + skb_sender_cpu_clear(skb2); | |
| 1418 | 1419 | return dev_queue_xmit(skb2); |
| 1419 | 1420 | } |
| 1420 | 1421 | |
| @@ -1854,9 +1855,13 @@ int sk_get_filter(struct sock *sk, struct sock_filter __user *ubuf, · 433 unmodified lines | ||
| 1854 | 1855 | goto out; |
| 1855 | 1856 | |
| 1856 | 1857 | /* We're copying the filter that has been originally attached, |
| 1857 | − * so no conversion/decode needed anymore. | |
| 1858 | + * so no conversion/decode needed anymore. eBPF programs that | |
| 1859 | + * have no original program cannot be dumped through this. | |
| 1858 | 1860 | */ |
| 1861 | + ret = -EACCES; | |
| 1859 | 1862 | fprog = filter->prog->orig_prog; |
| 1863 | + if (!fprog) | |
| 1864 | + goto out; | |
| 1860 | 1865 | |
| 1861 | 1866 | ret = fprog->len; |
| 1862 | 1867 | if (!len) |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <linux/of_platform.h> |
| 23 | 23 | #include <linux/of_net.h> |
| 24 | 24 | #include <linux/sysfs.h> |
| 25 | +#include <linux/phy_fixed.h> | |
| 25 | 26 | #include "dsa_priv.h" |
| 26 | 27 | |
| 27 | 28 | char dsa_driver_version[] = "0.1"; |
| @@ -305,7 +306,7 @@ static int dsa_switch_setup_one(struct dsa_switch *ds, struct device *parent) · 277 unmodified lines | ||
| 305 | 306 | if (ret < 0) |
| 306 | 307 | goto out; |
| 307 | 308 | |
| 308 | − ds->slave_mii_bus = mdiobus_alloc(); | |
| 309 | + ds->slave_mii_bus = devm_mdiobus_alloc(parent); | |
| 309 | 310 | if (ds->slave_mii_bus == NULL) { |
| 310 | 311 | ret = -ENOMEM; |
| 311 | 312 | goto out; |
| @@ -314,7 +315,7 @@ static int dsa_switch_setup_one(struct dsa_switch *ds, struct device *parent) · 2 unmodified lines | ||
| 314 | 315 | |
| 315 | 316 | ret = mdiobus_register(ds->slave_mii_bus); |
| 316 | 317 | if (ret < 0) |
| 317 | − goto out_free; | |
| 318 | + goto out; | |
| 318 | 319 | |
| 319 | 320 | |
| 320 | 321 | /* |
| @@ -367,10 +368,7 @@ static int dsa_switch_setup_one(struct dsa_switch *ds, struct device *parent) · 46 unmodified lines | ||
| 367 | 368 | |
| 368 | 369 | return ret; |
| 369 | 370 | |
| 370 | −out_free: | |
| 371 | − mdiobus_free(ds->slave_mii_bus); | |
| 372 | 371 | out: |
| 373 | − kfree(ds); | |
| 374 | 372 | return ret; |
| 375 | 373 | } |
| 376 | 374 | |
| @@ -400,7 +398,7 @@ dsa_switch_setup(struct dsa_switch_tree *dst, int index, · 23 unmodified lines | ||
| 400 | 398 | /* |
| 401 | 399 | * Allocate and initialise switch state. |
| 402 | 400 | */ |
| 403 | − ds = kzalloc(sizeof(*ds) + drv->priv_size, GFP_KERNEL); | |
| 401 | + ds = devm_kzalloc(parent, sizeof(*ds) + drv->priv_size, GFP_KERNEL); | |
| 404 | 402 | if (ds == NULL) |
| 405 | 403 | return ERR_PTR(-ENOMEM); |
| 406 | 404 | |
| @@ -420,10 +418,47 @@ dsa_switch_setup(struct dsa_switch_tree *dst, int index, · 13 unmodified lines | ||
| 420 | 418 | |
| 421 | 419 | static void dsa_switch_destroy(struct dsa_switch *ds) |
| 422 | 420 | { |
| 421 | + struct device_node *port_dn; | |
| 422 | + struct phy_device *phydev; | |
| 423 | + struct dsa_chip_data *cd = ds->pd; | |
| 424 | + int port; | |
| 425 | + | |
| 423 | 426 | #ifdef CONFIG_NET_DSA_HWMON |
| 424 | 427 | if (ds->hwmon_dev) |
| 425 | 428 | hwmon_device_unregister(ds->hwmon_dev); |
| 426 | 429 | #endif |
| 430 | + | |
| 431 | + /* Disable configuration of the CPU and DSA ports */ | |
| 432 | + for (port = 0; port < DSA_MAX_PORTS; port++) { | |
| 433 | + if (!(dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port))) | |
| 434 | + continue; | |
| 435 | + | |
| 436 | + port_dn = cd->port_dn[port]; | |
| 437 | + if (of_phy_is_fixed_link(port_dn)) { | |
| 438 | + phydev = of_phy_find_device(port_dn); | |
| 439 | + if (phydev) { | |
| 440 | + int addr = phydev->addr; | |
| 441 | + | |
| 442 | + phy_device_free(phydev); | |
| 443 | + of_node_put(port_dn); | |
| 444 | + fixed_phy_del(addr); | |
| 445 | + } | |
| 446 | + } | |
| 447 | + } | |
| 448 | + | |
| 449 | + /* Destroy network devices for physical switch ports. */ | |
| 450 | + for (port = 0; port < DSA_MAX_PORTS; port++) { | |
| 451 | + if (!(ds->phys_port_mask & (1 << port))) | |
| 452 | + continue; | |
| 453 | + | |
| 454 | + if (!ds->ports[port]) | |
| 455 | + continue; | |
| 456 | + | |
| 457 | + unregister_netdev(ds->ports[port]); | |
| 458 | + free_netdev(ds->ports[port]); | |
| 459 | + } | |
| 460 | + | |
| 461 | + mdiobus_unregister(ds->slave_mii_bus); | |
| 427 | 462 | } |
| 428 | 463 | |
| 429 | 464 | #ifdef CONFIG_PM_SLEEP |
| @@ -802,10 +837,11 @@ static inline void dsa_of_remove(struct device *dev) · 372 unmodified lines | ||
| 802 | 837 | } |
| 803 | 838 | #endif |
| 804 | 839 | |
| 805 | −static void dsa_setup_dst(struct dsa_switch_tree *dst, struct net_device *dev, | |
| 806 | − struct device *parent, struct dsa_platform_data *pd) | |
| 840 | +static int dsa_setup_dst(struct dsa_switch_tree *dst, struct net_device *dev, | |
| 841 | + struct device *parent, struct dsa_platform_data *pd) | |
| 807 | 842 | { |
| 808 | 843 | int i; |
| 844 | + unsigned configured = 0; | |
| 809 | 845 | |
| 810 | 846 | dst->pd = pd; |
| 811 | 847 | dst->master_netdev = dev; |
| @@ -825,8 +861,16 @@ static void dsa_setup_dst(struct dsa_switch_tree *dst, struct net_device *dev, · 13 unmodified lines | ||
| 825 | 861 | dst->ds[i] = ds; |
| 826 | 862 | if (ds->drv->poll_link != NULL) |
| 827 | 863 | dst->link_poll_needed = 1; |
| 864 | + | |
| 865 | + ++configured; | |
| 828 | 866 | } |
| 829 | 867 | |
| 868 | + /* | |
| 869 | + * If no switch was found, exit cleanly | |
| 870 | + */ | |
| 871 | + if (!configured) | |
| 872 | + return -EPROBE_DEFER; | |
| 873 | + | |
| 830 | 874 | /* |
| 831 | 875 | * If we use a tagging format that doesn't have an ethertype |
| 832 | 876 | * field, make sure that all packets from this point on get |
| @@ -843,6 +887,8 @@ static void dsa_setup_dst(struct dsa_switch_tree *dst, struct net_device *dev, · 10 unmodified lines | ||
| 843 | 887 | dst->link_poll_timer.expires = round_jiffies(jiffies + HZ); |
| 844 | 888 | add_timer(&dst->link_poll_timer); |
| 845 | 889 | } |
| 890 | + | |
| 891 | + return 0; | |
| 846 | 892 | } |
| 847 | 893 | |
| 848 | 894 | static int dsa_probe(struct platform_device *pdev) |
| @@ -883,7 +929,7 @@ static int dsa_probe(struct platform_device *pdev) · 34 unmodified lines | ||
| 883 | 929 | goto out; |
| 884 | 930 | } |
| 885 | 931 | |
| 886 | − dst = kzalloc(sizeof(*dst), GFP_KERNEL); | |
| 932 | + dst = devm_kzalloc(&pdev->dev, sizeof(*dst), GFP_KERNEL); | |
| 887 | 933 | if (dst == NULL) { |
| 888 | 934 | dev_put(dev); |
| 889 | 935 | ret = -ENOMEM; |
| @@ -892,7 +938,9 @@ static int dsa_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 892 | 938 | |
| 893 | 939 | platform_set_drvdata(pdev, dst); |
| 894 | 940 | |
| 895 | − dsa_setup_dst(dst, dev, &pdev->dev, pd); | |
| 941 | + ret = dsa_setup_dst(dst, dev, &pdev->dev, pd); | |
| 942 | + if (ret) | |
| 943 | + goto out; | |
| 896 | 944 | |
| 897 | 945 | return 0; |
| 898 | 946 | |
| @@ -914,7 +962,7 @@ static void dsa_remove_dst(struct dsa_switch_tree *dst) · 15 unmodified lines | ||
| 914 | 962 | for (i = 0; i < dst->pd->nr_chips; i++) { |
| 915 | 963 | struct dsa_switch *ds = dst->ds[i]; |
| 916 | 964 | |
| 917 | − if (ds != NULL) | |
| 965 | + if (ds) | |
| 918 | 966 | dsa_switch_destroy(ds); |
| 919 | 967 | } |
| 920 | 968 | } |
| @@ -312,7 +312,7 @@ static void arp_send_dst(int type, int ptype, __be32 dest_ip, · 311 unmodified lines | ||
| 312 | 312 | if (!skb) |
| 313 | 313 | return; |
| 314 | 314 | |
| 315 | − skb_dst_set(skb, dst); | |
| 315 | + skb_dst_set(skb, dst_clone(dst)); | |
| 316 | 316 | arp_xmit(skb); |
| 317 | 317 | } |
| 318 | 318 | |
| @@ -384,7 +384,7 @@ static void arp_solicit(struct neighbour *neigh, struct sk_buff *skb) · 65 unmodified lines | ||
| 384 | 384 | } |
| 385 | 385 | |
| 386 | 386 | if (skb && !(dev->priv_flags & IFF_XMIT_DST_RELEASE)) |
| 387 | − dst = dst_clone(skb_dst(skb)); | |
| 387 | + dst = skb_dst(skb); | |
| 388 | 388 | arp_send_dst(ARPOP_REQUEST, ETH_P_ARP, target, dev, saddr, |
| 389 | 389 | dst_hw, dev->dev_addr, NULL, dst); |
| 390 | 390 | } |
| @@ -811,7 +811,7 @@ static int arp_process(struct sock *sk, struct sk_buff *skb) · 420 unmodified lines | ||
| 811 | 811 | } else { |
| 812 | 812 | pneigh_enqueue(&arp_tbl, |
| 813 | 813 | in_dev->arp_parms, skb); |
| 814 | − return 0; | |
| 814 | + goto out_free_dst; | |
| 815 | 815 | } |
| 816 | 816 | goto out; |
| 817 | 817 | } |
| @@ -865,6 +865,8 @@ static int arp_process(struct sock *sk, struct sk_buff *skb) · 47 unmodified lines | ||
| 865 | 865 | |
| 866 | 866 | out: |
| 867 | 867 | consume_skb(skb); |
| 868 | +out_free_dst: | |
| 869 | + dst_release(reply_dst); | |
| 868 | 870 | return 0; |
| 869 | 871 | } |
| 870 | 872 | |
| @@ -577,21 +577,22 @@ EXPORT_SYMBOL(inet_rtx_syn_ack); · 576 unmodified lines | ||
| 577 | 577 | static bool reqsk_queue_unlink(struct request_sock_queue *queue, |
| 578 | 578 | struct request_sock *req) |
| 579 | 579 | { |
| 580 | − struct listen_sock *lopt = queue->listen_opt; | |
| 581 | 580 | struct request_sock **prev; |
| 581 | + struct listen_sock *lopt; | |
| 582 | 582 | bool found = false; |
| 583 | 583 | |
| 584 | 584 | spin_lock(&queue->syn_wait_lock); |
| 585 | − | |
| 586 | − for (prev = &lopt->syn_table[req->rsk_hash]; *prev != NULL; | |
| 587 | − prev = &(*prev)->dl_next) { | |
| 588 | − if (*prev == req) { | |
| 589 | − *prev = req->dl_next; | |
| 590 | − found = true; | |
| 591 | − break; | |
| 585 | + lopt = queue->listen_opt; | |
| 586 | + if (lopt) { | |
| 587 | + for (prev = &lopt->syn_table[req->rsk_hash]; *prev != NULL; | |
| 588 | + prev = &(*prev)->dl_next) { | |
| 589 | + if (*prev == req) { | |
| 590 | + *prev = req->dl_next; | |
| 591 | + found = true; | |
| 592 | + break; | |
| 593 | + } | |
| 592 | 594 | } |
| 593 | 595 | } |
| 594 | − | |
| 595 | 596 | spin_unlock(&queue->syn_wait_lock); |
| 596 | 597 | if (timer_pending(&req->rsk_timer) && del_timer_sync(&req->rsk_timer)) |
| 597 | 598 | reqsk_put(req); |
| @@ -3119,6 +3119,8 @@ static void addrconf_gre_config(struct net_device *dev) · 3118 unmodified lines | ||
| 3119 | 3119 | } |
| 3120 | 3120 | |
| 3121 | 3121 | addrconf_addr_gen(idev, true); |
| 3122 | + if (dev->flags & IFF_POINTOPOINT) | |
| 3123 | + addrconf_add_mroute(dev); | |
| 3122 | 3124 | } |
| 3123 | 3125 | #endif |
| 3124 | 3126 | |
| @@ -376,6 +376,9 @@ int ip6_forward(struct sk_buff *skb) · 375 unmodified lines | ||
| 376 | 376 | if (skb->pkt_type != PACKET_HOST) |
| 377 | 377 | goto drop; |
| 378 | 378 | |
| 379 | + if (unlikely(skb->sk)) | |
| 380 | + goto drop; | |
| 381 | + | |
| 379 | 382 | if (skb_warn_if_lro(skb)) |
| 380 | 383 | goto drop; |
| 381 | 384 | |
| @@ -142,6 +142,9 @@ static void rt6_uncached_list_flush_dev(struct net *net, struct net_device *dev) · 141 unmodified lines | ||
| 142 | 142 | struct net_device *loopback_dev = net->loopback_dev; |
| 143 | 143 | int cpu; |
| 144 | 144 | |
| 145 | + if (dev == loopback_dev) | |
| 146 | + return; | |
| 147 | + | |
| 145 | 148 | for_each_possible_cpu(cpu) { |
| 146 | 149 | struct uncached_list *ul = per_cpu_ptr(&rt6_uncached_list, cpu); |
| 147 | 150 | struct rt6_info *rt; |
| @@ -151,14 +154,12 @@ static void rt6_uncached_list_flush_dev(struct net *net, struct net_device *dev) · 3 unmodified lines | ||
| 151 | 154 | struct inet6_dev *rt_idev = rt->rt6i_idev; |
| 152 | 155 | struct net_device *rt_dev = rt->dst.dev; |
| 153 | 156 | |
| 154 | − if (rt_idev && (rt_idev->dev == dev || !dev) && | |
| 155 | − rt_idev->dev != loopback_dev) { | |
| 157 | + if (rt_idev->dev == dev) { | |
| 156 | 158 | rt->rt6i_idev = in6_dev_get(loopback_dev); |
| 157 | 159 | in6_dev_put(rt_idev); |
| 158 | 160 | } |
| 159 | 161 | |
| 160 | − if (rt_dev && (rt_dev == dev || !dev) && | |
| 161 | − rt_dev != loopback_dev) { | |
| 162 | + if (rt_dev == dev) { | |
| 162 | 163 | rt->dst.dev = loopback_dev; |
| 163 | 164 | dev_hold(rt->dst.dev); |
| 164 | 165 | dev_put(rt_dev); |
| @@ -247,12 +248,6 @@ static void ip6_rt_blackhole_redirect(struct dst_entry *dst, struct sock *sk, · 82 unmodified lines | ||
| 247 | 248 | { |
| 248 | 249 | } |
| 249 | 250 | |
| 250 | −static u32 *ip6_rt_blackhole_cow_metrics(struct dst_entry *dst, | |
| 251 | − unsigned long old) | |
| 252 | −{ | |
| 253 | − return NULL; | |
| 254 | −} | |
| 255 | − | |
| 256 | 251 | static struct dst_ops ip6_dst_blackhole_ops = { |
| 257 | 252 | .family = AF_INET6, |
| 258 | 253 | .destroy = ip6_dst_destroy, |
| @@ -261,7 +256,7 @@ static struct dst_ops ip6_dst_blackhole_ops = { · 2 unmodified lines | ||
| 261 | 256 | .default_advmss = ip6_default_advmss, |
| 262 | 257 | .update_pmtu = ip6_rt_blackhole_update_pmtu, |
| 263 | 258 | .redirect = ip6_rt_blackhole_redirect, |
| 264 | − .cow_metrics = ip6_rt_blackhole_cow_metrics, | |
| 259 | + .cow_metrics = dst_cow_metrics_generic, | |
| 265 | 260 | .neigh_lookup = ip6_neigh_lookup, |
| 266 | 261 | }; |
| 267 | 262 | |
| @@ -318,6 +313,15 @@ static const struct rt6_info ip6_blk_hole_entry_template = { · 50 unmodified lines | ||
| 318 | 313 | |
| 319 | 314 | #endif |
| 320 | 315 | |
| 316 | +static void rt6_info_init(struct rt6_info *rt) | |
| 317 | +{ | |
| 318 | + struct dst_entry *dst = &rt->dst; | |
| 319 | + | |
| 320 | + memset(dst + 1, 0, sizeof(*rt) - sizeof(*dst)); | |
| 321 | + INIT_LIST_HEAD(&rt->rt6i_siblings); | |
| 322 | + INIT_LIST_HEAD(&rt->rt6i_uncached); | |
| 323 | +} | |
| 324 | + | |
| 321 | 325 | /* allocate dst with ip6_dst_ops */ |
| 322 | 326 | static struct rt6_info *__ip6_dst_alloc(struct net *net, |
| 323 | 327 | struct net_device *dev, |
| @@ -326,13 +330,9 @@ static struct rt6_info *__ip6_dst_alloc(struct net *net, · 2 unmodified lines | ||
| 326 | 330 | struct rt6_info *rt = dst_alloc(&net->ipv6.ip6_dst_ops, dev, |
| 327 | 331 | 0, DST_OBSOLETE_FORCE_CHK, flags); |
| 328 | 332 | |
| 329 | − if (rt) { | |
| 330 | − struct dst_entry *dst = &rt->dst; | |
| 333 | + if (rt) | |
| 334 | + rt6_info_init(rt); | |
| 331 | 335 | |
| 332 | − memset(dst + 1, 0, sizeof(*rt) - sizeof(*dst)); | |
| 333 | − INIT_LIST_HEAD(&rt->rt6i_siblings); | |
| 334 | − INIT_LIST_HEAD(&rt->rt6i_uncached); | |
| 335 | − } | |
| 336 | 336 | return rt; |
| 337 | 337 | } |
| 338 | 338 | |
| @@ -1213,24 +1213,20 @@ struct dst_entry *ip6_blackhole_route(struct net *net, struct dst_entry *dst_ori · 874 unmodified lines | ||
| 1213 | 1213 | |
| 1214 | 1214 | rt = dst_alloc(&ip6_dst_blackhole_ops, ort->dst.dev, 1, DST_OBSOLETE_NONE, 0); |
| 1215 | 1215 | if (rt) { |
| 1216 | − new = &rt->dst; | |
| 1217 | − | |
| 1218 | − memset(new + 1, 0, sizeof(*rt) - sizeof(*new)); | |
| 1216 | + rt6_info_init(rt); | |
| 1219 | 1217 | |
| 1218 | + new = &rt->dst; | |
| 1220 | 1219 | new->__use = 1; |
| 1221 | 1220 | new->input = dst_discard; |
| 1222 | 1221 | new->output = dst_discard_sk; |
| 1223 | 1222 | |
| 1224 | − if (dst_metrics_read_only(&ort->dst)) | |
| 1225 | − new->_metrics = ort->dst._metrics; | |
| 1226 | − else | |
| 1227 | − dst_copy_metrics(new, &ort->dst); | |
| 1223 | + dst_copy_metrics(new, &ort->dst); | |
| 1228 | 1224 | rt->rt6i_idev = ort->rt6i_idev; |
| 1229 | 1225 | if (rt->rt6i_idev) |
| 1230 | 1226 | in6_dev_hold(rt->rt6i_idev); |
| 1231 | 1227 | |
| 1232 | 1228 | rt->rt6i_gateway = ort->rt6i_gateway; |
| 1233 | − rt->rt6i_flags = ort->rt6i_flags; | |
| 1229 | + rt->rt6i_flags = ort->rt6i_flags & ~RTF_PCPU; | |
| 1234 | 1230 | rt->rt6i_metric = 0; |
| 1235 | 1231 | |
| 1236 | 1232 | memcpy(&rt->rt6i_dst, &ort->rt6i_dst, sizeof(struct rt6key)); |
| @@ -2622,7 +2618,8 @@ void rt6_ifdown(struct net *net, struct net_device *dev) · 1385 unmodified lines | ||
| 2622 | 2618 | |
| 2623 | 2619 | fib6_clean_all(net, fib6_ifdown, &adn); |
| 2624 | 2620 | icmp6_clean_all(fib6_ifdown, &adn); |
| 2625 | − rt6_uncached_list_flush_dev(net, dev); | |
| 2621 | + if (dev) | |
| 2622 | + rt6_uncached_list_flush_dev(net, dev); | |
| 2626 | 2623 | } |
| 2627 | 2624 | |
| 2628 | 2625 | struct rt6_mtu_change_arg { |
| @@ -37,6 +37,7 @@ static struct dst_entry *xfrm6_dst_lookup(struct net *net, int tos, int oif, · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | memset(&fl6, 0, sizeof(fl6)); |
| 39 | 39 | fl6.flowi6_oif = oif; |
| 40 | + fl6.flowi6_flags = FLOWI_FLAG_SKIP_NH_OIF; | |
| 40 | 41 | memcpy(&fl6.daddr, daddr, sizeof(fl6.daddr)); |
| 41 | 42 | if (saddr) |
| 42 | 43 | memcpy(&fl6.saddr, saddr, sizeof(fl6.saddr)); |
| @@ -149,7 +149,7 @@ static ssize_t hwflags_read(struct file *file, char __user *user_buf, · 148 unmodified lines | ||
| 149 | 149 | |
| 150 | 150 | for (i = 0; i < NUM_IEEE80211_HW_FLAGS; i++) { |
| 151 | 151 | if (test_bit(i, local->hw.flags)) |
| 152 | − pos += scnprintf(pos, end - pos, "%s", | |
| 152 | + pos += scnprintf(pos, end - pos, "%s\n", | |
| 153 | 153 | hw_flag_names[i]); |
| 154 | 154 | } |
| 155 | 155 | |
| @@ -101,6 +101,7 @@ static void ieee80211_handle_filtered_frame(struct ieee80211_local *local, · 100 unmodified lines | ||
| 101 | 101 | * when it wakes up for the next time. |
| 102 | 102 | */ |
| 103 | 103 | set_sta_flag(sta, WLAN_STA_CLEAR_PS_FILT); |
| 104 | + ieee80211_clear_fast_xmit(sta); | |
| 104 | 105 | |
| 105 | 106 | /* |
| 106 | 107 | * This code races in the following way: |
| @@ -1218,8 +1218,10 @@ ieee80211_tx_prepare(struct ieee80211_sub_if_data *sdata, · 1217 unmodified lines | ||
| 1218 | 1218 | |
| 1219 | 1219 | if (!tx->sta) |
| 1220 | 1220 | info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT; |
| 1221 | − else if (test_and_clear_sta_flag(tx->sta, WLAN_STA_CLEAR_PS_FILT)) | |
| 1221 | + else if (test_and_clear_sta_flag(tx->sta, WLAN_STA_CLEAR_PS_FILT)) { | |
| 1222 | 1222 | info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT; |
| 1223 | + ieee80211_check_fast_xmit(tx->sta); | |
| 1224 | + } | |
| 1223 | 1225 | |
| 1224 | 1226 | info->flags |= IEEE80211_TX_CTL_FIRST_FRAGMENT; |
| 1225 | 1227 | |
| @@ -2451,7 +2453,8 @@ void ieee80211_check_fast_xmit(struct sta_info *sta) · 1225 unmodified lines | ||
| 2451 | 2453 | |
| 2452 | 2454 | if (test_sta_flag(sta, WLAN_STA_PS_STA) || |
| 2453 | 2455 | test_sta_flag(sta, WLAN_STA_PS_DRIVER) || |
| 2454 | − test_sta_flag(sta, WLAN_STA_PS_DELIVER)) | |
| 2456 | + test_sta_flag(sta, WLAN_STA_PS_DELIVER) || | |
| 2457 | + test_sta_flag(sta, WLAN_STA_CLEAR_PS_FILT)) | |
| 2455 | 2458 | goto out; |
| 2456 | 2459 | |
| 2457 | 2460 | if (sdata->noack_map) |
| @@ -2785,6 +2785,7 @@ static int netlink_dump(struct sock *sk) · 2784 unmodified lines | ||
| 2785 | 2785 | struct sk_buff *skb = NULL; |
| 2786 | 2786 | struct nlmsghdr *nlh; |
| 2787 | 2787 | int len, err = -ENOBUFS; |
| 2788 | + int alloc_min_size; | |
| 2788 | 2789 | int alloc_size; |
| 2789 | 2790 | |
| 2790 | 2791 | mutex_lock(nlk->cb_mutex); |
| @@ -2793,9 +2794,6 @@ static int netlink_dump(struct sock *sk) · 2 unmodified lines | ||
| 2793 | 2794 | goto errout_skb; |
| 2794 | 2795 | } |
| 2795 | 2796 | |
| 2796 | − cb = &nlk->cb; | |
| 2797 | − alloc_size = max_t(int, cb->min_dump_alloc, NLMSG_GOODSIZE); | |
| 2798 | − | |
| 2799 | 2797 | if (!netlink_rx_is_mmaped(sk) && |
| 2800 | 2798 | atomic_read(&sk->sk_rmem_alloc) >= sk->sk_rcvbuf) |
| 2801 | 2799 | goto errout_skb; |
| @@ -2805,23 +2803,35 @@ static int netlink_dump(struct sock *sk) · 3 unmodified lines | ||
| 2805 | 2803 | * to reduce number of system calls on dump operations, if user |
| 2806 | 2804 | * ever provided a big enough buffer. |
| 2807 | 2805 | */ |
| 2808 | − if (alloc_size < nlk->max_recvmsg_len) { | |
| 2809 | − skb = netlink_alloc_skb(sk, | |
| 2810 | − nlk->max_recvmsg_len, | |
| 2811 | − nlk->portid, | |
| 2806 | + cb = &nlk->cb; | |
| 2807 | + alloc_min_size = max_t(int, cb->min_dump_alloc, NLMSG_GOODSIZE); | |
| 2808 | + | |
| 2809 | + if (alloc_min_size < nlk->max_recvmsg_len) { | |
| 2810 | + alloc_size = nlk->max_recvmsg_len; | |
| 2811 | + skb = netlink_alloc_skb(sk, alloc_size, nlk->portid, | |
| 2812 | 2812 | GFP_KERNEL | |
| 2813 | 2813 | __GFP_NOWARN | |
| 2814 | 2814 | __GFP_NORETRY); |
| 2815 | − /* available room should be exact amount to avoid MSG_TRUNC */ | |
| 2816 | − if (skb) | |
| 2817 | − skb_reserve(skb, skb_tailroom(skb) - | |
| 2818 | − nlk->max_recvmsg_len); | |
| 2819 | 2815 | } |
| 2820 | − if (!skb) | |
| 2816 | + if (!skb) { | |
| 2817 | + alloc_size = alloc_min_size; | |
| 2821 | 2818 | skb = netlink_alloc_skb(sk, alloc_size, nlk->portid, |
| 2822 | 2819 | GFP_KERNEL); |
| 2820 | + } | |
| 2823 | 2821 | if (!skb) |
| 2824 | 2822 | goto errout_skb; |
| 2823 | + | |
| 2824 | + /* Trim skb to allocated size. User is expected to provide buffer as | |
| 2825 | + * large as max(min_dump_alloc, 16KiB (mac_recvmsg_len capped at | |
| 2826 | + * netlink_recvmsg())). dump will pack as many smaller messages as | |
| 2827 | + * could fit within the allocated skb. skb is typically allocated | |
| 2828 | + * with larger space than required (could be as much as near 2x the | |
| 2829 | + * requested size with align to next power of 2 approach). Allowing | |
| 2830 | + * dump to use the excess space makes it difficult for a user to have a | |
| 2831 | + * reasonable static buffer based on the expected largest dump of a | |
| 2832 | + * single netdev. The outcome is MSG_TRUNC error. | |
| 2833 | + */ | |
| 2834 | + skb_reserve(skb, skb_tailroom(skb) - alloc_size); | |
| 2825 | 2835 | netlink_skb_set_owner_r(skb, sk); |
| 2826 | 2836 | |
| 2827 | 2837 | len = cb->dump(skb, cb); |
| @@ -684,7 +684,7 @@ static void ovs_fragment(struct vport *vport, struct sk_buff *skb, u16 mru, · 683 unmodified lines | ||
| 684 | 684 | { |
| 685 | 685 | if (skb_network_offset(skb) > MAX_L2_LEN) { |
| 686 | 686 | OVS_NLERR(1, "L2 header too long to fragment"); |
| 687 | − return; | |
| 687 | + goto err; | |
| 688 | 688 | } |
| 689 | 689 | |
| 690 | 690 | if (ethertype == htons(ETH_P_IP)) { |
| @@ -708,8 +708,7 @@ static void ovs_fragment(struct vport *vport, struct sk_buff *skb, u16 mru, · 17 unmodified lines | ||
| 708 | 708 | struct rt6_info ovs_rt; |
| 709 | 709 | |
| 710 | 710 | if (!v6ops) { |
| 711 | − kfree_skb(skb); | |
| 712 | − return; | |
| 711 | + goto err; | |
| 713 | 712 | } |
| 714 | 713 | |
| 715 | 714 | prepare_frag(vport, skb); |
| @@ -728,8 +727,12 @@ static void ovs_fragment(struct vport *vport, struct sk_buff *skb, u16 mru, · 12 unmodified lines | ||
| 728 | 727 | WARN_ONCE(1, "Failed fragment ->%s: eth=%04x, MRU=%d, MTU=%d.", |
| 729 | 728 | ovs_vport_name(vport), ntohs(ethertype), mru, |
| 730 | 729 | vport->dev->mtu); |
| 731 | − kfree_skb(skb); | |
| 730 | + goto err; | |
| 732 | 731 | } |
| 732 | + | |
| 733 | + return; | |
| 734 | +err: | |
| 735 | + kfree_skb(skb); | |
| 733 | 736 | } |
| 734 | 737 | |
| 735 | 738 | static void do_output(struct datapath *dp, struct sk_buff *skb, int out_port, |
| @@ -968,7 +971,7 @@ static int execute_masked_set_action(struct sk_buff *skb, · 232 unmodified lines | ||
| 968 | 971 | case OVS_KEY_ATTR_CT_STATE: |
| 969 | 972 | case OVS_KEY_ATTR_CT_ZONE: |
| 970 | 973 | case OVS_KEY_ATTR_CT_MARK: |
| 971 | − case OVS_KEY_ATTR_CT_LABEL: | |
| 974 | + case OVS_KEY_ATTR_CT_LABELS: | |
| 972 | 975 | err = -EINVAL; |
| 973 | 976 | break; |
| 974 | 977 | } |
| @@ -1099,6 +1102,12 @@ static int do_execute_actions(struct datapath *dp, struct sk_buff *skb, · 124 unmodified lines | ||
| 1099 | 1102 | break; |
| 1100 | 1103 | |
| 1101 | 1104 | case OVS_ACTION_ATTR_CT: |
| 1105 | + if (!is_flow_key_valid(key)) { | |
| 1106 | + err = ovs_flow_key_update(skb, key); | |
| 1107 | + if (err) | |
| 1108 | + return err; | |
| 1109 | + } | |
| 1110 | + | |
| 1102 | 1111 | err = ovs_ct_execute(ovs_dp_get_net(dp), skb, key, |
| 1103 | 1112 | nla_data(a)); |
| 1104 | 1113 | |
| @@ -37,9 +37,9 @@ struct md_mark { · 36 unmodified lines | ||
| 37 | 37 | }; |
| 38 | 38 | |
| 39 | 39 | /* Metadata label for masked write to conntrack label. */ |
| 40 | −struct md_label { | |
| 41 | − struct ovs_key_ct_label value; | |
| 42 | − struct ovs_key_ct_label mask; | |
| 40 | +struct md_labels { | |
| 41 | + struct ovs_key_ct_labels value; | |
| 42 | + struct ovs_key_ct_labels mask; | |
| 43 | 43 | }; |
| 44 | 44 | |
| 45 | 45 | /* Conntrack action context for execution. */ |
| @@ -47,10 +47,10 @@ struct ovs_conntrack_info { · 1 unmodified line | ||
| 47 | 47 | struct nf_conntrack_helper *helper; |
| 48 | 48 | struct nf_conntrack_zone zone; |
| 49 | 49 | struct nf_conn *ct; |
| 50 | − u32 flags; | |
| 50 | + u8 commit : 1; | |
| 51 | 51 | u16 family; |
| 52 | 52 | struct md_mark mark; |
| 53 | − struct md_label label; | |
| 53 | + struct md_labels labels; | |
| 54 | 54 | }; |
| 55 | 55 | |
| 56 | 56 | static u16 key_to_nfproto(const struct sw_flow_key *key) |
| @@ -109,21 +109,21 @@ static u32 ovs_ct_get_mark(const struct nf_conn *ct) · 52 unmodified lines | ||
| 109 | 109 | #endif |
| 110 | 110 | } |
| 111 | 111 | |
| 112 | −static void ovs_ct_get_label(const struct nf_conn *ct, | |
| 113 | − struct ovs_key_ct_label *label) | |
| 112 | +static void ovs_ct_get_labels(const struct nf_conn *ct, | |
| 113 | + struct ovs_key_ct_labels *labels) | |
| 114 | 114 | { |
| 115 | 115 | struct nf_conn_labels *cl = ct ? nf_ct_labels_find(ct) : NULL; |
| 116 | 116 | |
| 117 | 117 | if (cl) { |
| 118 | 118 | size_t len = cl->words * sizeof(long); |
| 119 | 119 | |
| 120 | − if (len > OVS_CT_LABEL_LEN) | |
| 121 | − len = OVS_CT_LABEL_LEN; | |
| 122 | − else if (len < OVS_CT_LABEL_LEN) | |
| 123 | − memset(label, 0, OVS_CT_LABEL_LEN); | |
| 124 | − memcpy(label, cl->bits, len); | |
| 120 | + if (len > OVS_CT_LABELS_LEN) | |
| 121 | + len = OVS_CT_LABELS_LEN; | |
| 122 | + else if (len < OVS_CT_LABELS_LEN) | |
| 123 | + memset(labels, 0, OVS_CT_LABELS_LEN); | |
| 124 | + memcpy(labels, cl->bits, len); | |
| 125 | 125 | } else { |
| 126 | − memset(label, 0, OVS_CT_LABEL_LEN); | |
| 126 | + memset(labels, 0, OVS_CT_LABELS_LEN); | |
| 127 | 127 | } |
| 128 | 128 | } |
| 129 | 129 | |
| @@ -134,7 +134,7 @@ static void __ovs_ct_update_key(struct sw_flow_key *key, u8 state, · 4 unmodified lines | ||
| 134 | 134 | key->ct.state = state; |
| 135 | 135 | key->ct.zone = zone->id; |
| 136 | 136 | key->ct.mark = ovs_ct_get_mark(ct); |
| 137 | − ovs_ct_get_label(ct, &key->ct.label); | |
| 137 | + ovs_ct_get_labels(ct, &key->ct.labels); | |
| 138 | 138 | } |
| 139 | 139 | |
| 140 | 140 | /* Update 'key' based on skb->nfct. If 'post_ct' is true, then OVS has |
| @@ -167,7 +167,7 @@ void ovs_ct_fill_key(const struct sk_buff *skb, struct sw_flow_key *key) · 26 unmodified lines | ||
| 167 | 167 | |
| 168 | 168 | int ovs_ct_put_key(const struct sw_flow_key *key, struct sk_buff *skb) |
| 169 | 169 | { |
| 170 | − if (nla_put_u8(skb, OVS_KEY_ATTR_CT_STATE, key->ct.state)) | |
| 170 | + if (nla_put_u32(skb, OVS_KEY_ATTR_CT_STATE, key->ct.state)) | |
| 171 | 171 | return -EMSGSIZE; |
| 172 | 172 | |
| 173 | 173 | if (IS_ENABLED(CONFIG_NF_CONNTRACK_ZONES) && |
| @@ -179,8 +179,8 @@ int ovs_ct_put_key(const struct sw_flow_key *key, struct sk_buff *skb) · 5 unmodified lines | ||
| 179 | 179 | return -EMSGSIZE; |
| 180 | 180 | |
| 181 | 181 | if (IS_ENABLED(CONFIG_NF_CONNTRACK_LABELS) && |
| 182 | − nla_put(skb, OVS_KEY_ATTR_CT_LABEL, sizeof(key->ct.label), | |
| 183 | − &key->ct.label)) | |
| 182 | + nla_put(skb, OVS_KEY_ATTR_CT_LABELS, sizeof(key->ct.labels), | |
| 183 | + &key->ct.labels)) | |
| 184 | 184 | return -EMSGSIZE; |
| 185 | 185 | |
| 186 | 186 | return 0; |
| @@ -213,9 +213,9 @@ static int ovs_ct_set_mark(struct sk_buff *skb, struct sw_flow_key *key, · 26 unmodified lines | ||
| 213 | 213 | #endif |
| 214 | 214 | } |
| 215 | 215 | |
| 216 | −static int ovs_ct_set_label(struct sk_buff *skb, struct sw_flow_key *key, | |
| 217 | − const struct ovs_key_ct_label *label, | |
| 218 | − const struct ovs_key_ct_label *mask) | |
| 216 | +static int ovs_ct_set_labels(struct sk_buff *skb, struct sw_flow_key *key, | |
| 217 | + const struct ovs_key_ct_labels *labels, | |
| 218 | + const struct ovs_key_ct_labels *mask) | |
| 219 | 219 | { |
| 220 | 220 | enum ip_conntrack_info ctinfo; |
| 221 | 221 | struct nf_conn_labels *cl; |
| @@ -235,15 +235,15 @@ static int ovs_ct_set_label(struct sk_buff *skb, struct sw_flow_key *key, · 13 unmodified lines | ||
| 235 | 235 | nf_ct_labels_ext_add(ct); |
| 236 | 236 | cl = nf_ct_labels_find(ct); |
| 237 | 237 | } |
| 238 | − if (!cl || cl->words * sizeof(long) < OVS_CT_LABEL_LEN) | |
| 238 | + if (!cl || cl->words * sizeof(long) < OVS_CT_LABELS_LEN) | |
| 239 | 239 | return -ENOSPC; |
| 240 | 240 | |
| 241 | − err = nf_connlabels_replace(ct, (u32 *)label, (u32 *)mask, | |
| 242 | − OVS_CT_LABEL_LEN / sizeof(u32)); | |
| 241 | + err = nf_connlabels_replace(ct, (u32 *)labels, (u32 *)mask, | |
| 242 | + OVS_CT_LABELS_LEN / sizeof(u32)); | |
| 243 | 243 | if (err) |
| 244 | 244 | return err; |
| 245 | 245 | |
| 246 | − ovs_ct_get_label(ct, &key->ct.label); | |
| 246 | + ovs_ct_get_labels(ct, &key->ct.labels); | |
| 247 | 247 | return 0; |
| 248 | 248 | } |
| 249 | 249 | |
| @@ -465,12 +465,12 @@ static int ovs_ct_commit(struct net *net, struct sw_flow_key *key, · 215 unmodified lines | ||
| 465 | 465 | return 0; |
| 466 | 466 | } |
| 467 | 467 | |
| 468 | −static bool label_nonzero(const struct ovs_key_ct_label *label) | |
| 468 | +static bool labels_nonzero(const struct ovs_key_ct_labels *labels) | |
| 469 | 469 | { |
| 470 | 470 | size_t i; |
| 471 | 471 | |
| 472 | − for (i = 0; i < sizeof(*label); i++) | |
| 473 | − if (label->ct_label[i]) | |
| 472 | + for (i = 0; i < sizeof(*labels); i++) | |
| 473 | + if (labels->ct_labels[i]) | |
| 474 | 474 | return true; |
| 475 | 475 | |
| 476 | 476 | return false; |
| @@ -493,7 +493,7 @@ int ovs_ct_execute(struct net *net, struct sk_buff *skb, · 16 unmodified lines | ||
| 493 | 493 | return err; |
| 494 | 494 | } |
| 495 | 495 | |
| 496 | − if (info->flags & OVS_CT_F_COMMIT) | |
| 496 | + if (info->commit) | |
| 497 | 497 | err = ovs_ct_commit(net, key, info, skb); |
| 498 | 498 | else |
| 499 | 499 | err = ovs_ct_lookup(net, key, info, skb); |
| @@ -506,9 +506,9 @@ int ovs_ct_execute(struct net *net, struct sk_buff *skb, · 6 unmodified lines | ||
| 506 | 506 | if (err) |
| 507 | 507 | goto err; |
| 508 | 508 | } |
| 509 | − if (label_nonzero(&info->label.mask)) | |
| 510 | − err = ovs_ct_set_label(skb, key, &info->label.value, | |
| 511 | − &info->label.mask); | |
| 509 | + if (labels_nonzero(&info->labels.mask)) | |
| 510 | + err = ovs_ct_set_labels(skb, key, &info->labels.value, | |
| 511 | + &info->labels.mask); | |
| 512 | 512 | err: |
| 513 | 513 | skb_push(skb, nh_ofs); |
| 514 | 514 | return err; |
| @@ -539,14 +539,13 @@ static int ovs_ct_add_helper(struct ovs_conntrack_info *info, const char *name, · 24 unmodified lines | ||
| 539 | 539 | } |
| 540 | 540 | |
| 541 | 541 | static const struct ovs_ct_len_tbl ovs_ct_attr_lens[OVS_CT_ATTR_MAX + 1] = { |
| 542 | − [OVS_CT_ATTR_FLAGS] = { .minlen = sizeof(u32), | |
| 543 | − .maxlen = sizeof(u32) }, | |
| 542 | + [OVS_CT_ATTR_COMMIT] = { .minlen = 0, .maxlen = 0 }, | |
| 544 | 543 | [OVS_CT_ATTR_ZONE] = { .minlen = sizeof(u16), |
| 545 | 544 | .maxlen = sizeof(u16) }, |
| 546 | 545 | [OVS_CT_ATTR_MARK] = { .minlen = sizeof(struct md_mark), |
| 547 | 546 | .maxlen = sizeof(struct md_mark) }, |
| 548 | − [OVS_CT_ATTR_LABEL] = { .minlen = sizeof(struct md_label), | |
| 549 | − .maxlen = sizeof(struct md_label) }, | |
| 547 | + [OVS_CT_ATTR_LABELS] = { .minlen = sizeof(struct md_labels), | |
| 548 | + .maxlen = sizeof(struct md_labels) }, | |
| 550 | 549 | [OVS_CT_ATTR_HELPER] = { .minlen = 1, |
| 551 | 550 | .maxlen = NF_CT_HELPER_NAME_LEN } |
| 552 | 551 | }; |
| @@ -576,8 +575,8 @@ static int parse_ct(const struct nlattr *attr, struct ovs_conntrack_info *info, · 23 unmodified lines | ||
| 576 | 575 | } |
| 577 | 576 | |
| 578 | 577 | switch (type) { |
| 579 | − case OVS_CT_ATTR_FLAGS: | |
| 580 | − info->flags = nla_get_u32(a); | |
| 578 | + case OVS_CT_ATTR_COMMIT: | |
| 579 | + info->commit = true; | |
| 581 | 580 | break; |
| 582 | 581 | #ifdef CONFIG_NF_CONNTRACK_ZONES |
| 583 | 582 | case OVS_CT_ATTR_ZONE: |
| @@ -593,10 +592,10 @@ static int parse_ct(const struct nlattr *attr, struct ovs_conntrack_info *info, · 9 unmodified lines | ||
| 593 | 592 | } |
| 594 | 593 | #endif |
| 595 | 594 | #ifdef CONFIG_NF_CONNTRACK_LABELS |
| 596 | − case OVS_CT_ATTR_LABEL: { | |
| 597 | − struct md_label *label = nla_data(a); | |
| 595 | + case OVS_CT_ATTR_LABELS: { | |
| 596 | + struct md_labels *labels = nla_data(a); | |
| 598 | 597 | |
| 599 | − info->label = *label; | |
| 598 | + info->labels = *labels; | |
| 600 | 599 | break; |
| 601 | 600 | } |
| 602 | 601 | #endif |
| @@ -633,7 +632,7 @@ bool ovs_ct_verify(struct net *net, enum ovs_key_attr attr) · 30 unmodified lines | ||
| 633 | 632 | attr == OVS_KEY_ATTR_CT_MARK) |
| 634 | 633 | return true; |
| 635 | 634 | if (IS_ENABLED(CONFIG_NF_CONNTRACK_LABELS) && |
| 636 | − attr == OVS_KEY_ATTR_CT_LABEL) { | |
| 635 | + attr == OVS_KEY_ATTR_CT_LABELS) { | |
| 637 | 636 | struct ovs_net *ovs_net = net_generic(net, ovs_net_id); |
| 638 | 637 | |
| 639 | 638 | return ovs_net->xt_label; |
| @@ -701,7 +700,7 @@ int ovs_ct_action_to_attr(const struct ovs_conntrack_info *ct_info, · 61 unmodified lines | ||
| 701 | 700 | if (!start) |
| 702 | 701 | return -EMSGSIZE; |
| 703 | 702 | |
| 704 | − if (nla_put_u32(skb, OVS_CT_ATTR_FLAGS, ct_info->flags)) | |
| 703 | + if (ct_info->commit && nla_put_flag(skb, OVS_CT_ATTR_COMMIT)) | |
| 705 | 704 | return -EMSGSIZE; |
| 706 | 705 | if (IS_ENABLED(CONFIG_NF_CONNTRACK_ZONES) && |
| 707 | 706 | nla_put_u16(skb, OVS_CT_ATTR_ZONE, ct_info->zone.id)) |
| @@ -711,8 +710,8 @@ int ovs_ct_action_to_attr(const struct ovs_conntrack_info *ct_info, · 3 unmodified lines | ||
| 711 | 710 | &ct_info->mark)) |
| 712 | 711 | return -EMSGSIZE; |
| 713 | 712 | if (IS_ENABLED(CONFIG_NF_CONNTRACK_LABELS) && |
| 714 | − nla_put(skb, OVS_CT_ATTR_LABEL, sizeof(ct_info->label), | |
| 715 | − &ct_info->label)) | |
| 713 | + nla_put(skb, OVS_CT_ATTR_LABELS, sizeof(ct_info->labels), | |
| 714 | + &ct_info->labels)) | |
| 716 | 715 | return -EMSGSIZE; |
| 717 | 716 | if (ct_info->helper) { |
| 718 | 717 | if (nla_put_string(skb, OVS_CT_ATTR_HELPER, |
| @@ -737,7 +736,7 @@ void ovs_ct_free_action(const struct nlattr *a) · 18 unmodified lines | ||
| 737 | 736 | |
| 738 | 737 | void ovs_ct_init(struct net *net) |
| 739 | 738 | { |
| 740 | − unsigned int n_bits = sizeof(struct ovs_key_ct_label) * BITS_PER_BYTE; | |
| 739 | + unsigned int n_bits = sizeof(struct ovs_key_ct_labels) * BITS_PER_BYTE; | |
| 741 | 740 | struct ovs_net *ovs_net = net_generic(net, ovs_net_id); |
| 742 | 741 | |
| 743 | 742 | if (nf_connlabels_get(net, n_bits)) { |
| @@ -34,6 +34,13 @@ int ovs_ct_execute(struct net *, struct sk_buff *, struct sw_flow_key *, · 33 unmodified lines | ||
| 34 | 34 | void ovs_ct_fill_key(const struct sk_buff *skb, struct sw_flow_key *key); |
| 35 | 35 | int ovs_ct_put_key(const struct sw_flow_key *key, struct sk_buff *skb); |
| 36 | 36 | void ovs_ct_free_action(const struct nlattr *a); |
| 37 | + | |
| 38 | +static inline bool ovs_ct_state_supported(u32 state) | |
| 39 | +{ | |
| 40 | + return !(state & ~(OVS_CS_F_NEW | OVS_CS_F_ESTABLISHED | | |
| 41 | + OVS_CS_F_RELATED | OVS_CS_F_REPLY_DIR | | |
| 42 | + OVS_CS_F_INVALID | OVS_CS_F_TRACKED)); | |
| 43 | +} | |
| 37 | 44 | #else |
| 38 | 45 | #include <linux/errno.h> |
| 39 | 46 | |
| @@ -46,6 +53,11 @@ static inline bool ovs_ct_verify(struct net *net, int attr) · 6 unmodified lines | ||
| 46 | 53 | return false; |
| 47 | 54 | } |
| 48 | 55 | |
| 56 | +static inline bool ovs_ct_state_supported(u32 state) | |
| 57 | +{ | |
| 58 | + return false; | |
| 59 | +} | |
| 60 | + | |
| 49 | 61 | static inline int ovs_ct_copy_action(struct net *net, const struct nlattr *nla, |
| 50 | 62 | const struct sw_flow_key *key, |
| 51 | 63 | struct sw_flow_actions **acts, bool log) |
| @@ -72,7 +84,7 @@ static inline void ovs_ct_fill_key(const struct sk_buff *skb, · 20 unmodified lines | ||
| 72 | 84 | key->ct.state = 0; |
| 73 | 85 | key->ct.zone = 0; |
| 74 | 86 | key->ct.mark = 0; |
| 75 | − memset(&key->ct.label, 0, sizeof(key->ct.label)); | |
| 87 | + memset(&key->ct.labels, 0, sizeof(key->ct.labels)); | |
| 76 | 88 | } |
| 77 | 89 | |
| 78 | 90 | static inline int ovs_ct_put_key(const struct sw_flow_key *key, |
| @@ -116,7 +116,7 @@ struct sw_flow_key { · 115 unmodified lines | ||
| 116 | 116 | u16 zone; |
| 117 | 117 | u32 mark; |
| 118 | 118 | u8 state; |
| 119 | − struct ovs_key_ct_label label; | |
| 119 | + struct ovs_key_ct_labels labels; | |
| 120 | 120 | } ct; |
| 121 | 121 | |
| 122 | 122 | } __aligned(BITS_PER_LONG/8); /* Ensure that we can do comparisons as longs. */ |
| @@ -291,10 +291,10 @@ size_t ovs_key_attr_size(void) · 290 unmodified lines | ||
| 291 | 291 | + nla_total_size(4) /* OVS_KEY_ATTR_SKB_MARK */ |
| 292 | 292 | + nla_total_size(4) /* OVS_KEY_ATTR_DP_HASH */ |
| 293 | 293 | + nla_total_size(4) /* OVS_KEY_ATTR_RECIRC_ID */ |
| 294 | − + nla_total_size(1) /* OVS_KEY_ATTR_CT_STATE */ | |
| 294 | + + nla_total_size(4) /* OVS_KEY_ATTR_CT_STATE */ | |
| 295 | 295 | + nla_total_size(2) /* OVS_KEY_ATTR_CT_ZONE */ |
| 296 | 296 | + nla_total_size(4) /* OVS_KEY_ATTR_CT_MARK */ |
| 297 | − + nla_total_size(16) /* OVS_KEY_ATTR_CT_LABEL */ | |
| 297 | + + nla_total_size(16) /* OVS_KEY_ATTR_CT_LABELS */ | |
| 298 | 298 | + nla_total_size(12) /* OVS_KEY_ATTR_ETHERNET */ |
| 299 | 299 | + nla_total_size(2) /* OVS_KEY_ATTR_ETHERTYPE */ |
| 300 | 300 | + nla_total_size(4) /* OVS_KEY_ATTR_VLAN */ |
| @@ -349,10 +349,10 @@ static const struct ovs_len_tbl ovs_key_lens[OVS_KEY_ATTR_MAX + 1] = { · 48 unmodified lines | ||
| 349 | 349 | [OVS_KEY_ATTR_TUNNEL] = { .len = OVS_ATTR_NESTED, |
| 350 | 350 | .next = ovs_tunnel_key_lens, }, |
| 351 | 351 | [OVS_KEY_ATTR_MPLS] = { .len = sizeof(struct ovs_key_mpls) }, |
| 352 | − [OVS_KEY_ATTR_CT_STATE] = { .len = sizeof(u8) }, | |
| 352 | + [OVS_KEY_ATTR_CT_STATE] = { .len = sizeof(u32) }, | |
| 353 | 353 | [OVS_KEY_ATTR_CT_ZONE] = { .len = sizeof(u16) }, |
| 354 | 354 | [OVS_KEY_ATTR_CT_MARK] = { .len = sizeof(u32) }, |
| 355 | − [OVS_KEY_ATTR_CT_LABEL] = { .len = sizeof(struct ovs_key_ct_label) }, | |
| 355 | + [OVS_KEY_ATTR_CT_LABELS] = { .len = sizeof(struct ovs_key_ct_labels) }, | |
| 356 | 356 | }; |
| 357 | 357 | |
| 358 | 358 | static bool check_attr_len(unsigned int attr_len, unsigned int expected_len) |
| @@ -814,7 +814,13 @@ static int metadata_from_nlattrs(struct net *net, struct sw_flow_match *match, · 455 unmodified lines | ||
| 814 | 814 | |
| 815 | 815 | if (*attrs & (1 << OVS_KEY_ATTR_CT_STATE) && |
| 816 | 816 | ovs_ct_verify(net, OVS_KEY_ATTR_CT_STATE)) { |
| 817 | − u8 ct_state = nla_get_u8(a[OVS_KEY_ATTR_CT_STATE]); | |
| 817 | + u32 ct_state = nla_get_u32(a[OVS_KEY_ATTR_CT_STATE]); | |
| 818 | + | |
| 819 | + if (!is_mask && !ovs_ct_state_supported(ct_state)) { | |
| 820 | + OVS_NLERR(log, "ct_state flags %08x unsupported", | |
| 821 | + ct_state); | |
| 822 | + return -EINVAL; | |
| 823 | + } | |
| 818 | 824 | |
| 819 | 825 | SW_FLOW_KEY_PUT(match, ct.state, ct_state, is_mask); |
| 820 | 826 | *attrs &= ~(1ULL << OVS_KEY_ATTR_CT_STATE); |
| @@ -833,14 +839,14 @@ static int metadata_from_nlattrs(struct net *net, struct sw_flow_match *match, · 12 unmodified lines | ||
| 833 | 839 | SW_FLOW_KEY_PUT(match, ct.mark, mark, is_mask); |
| 834 | 840 | *attrs &= ~(1ULL << OVS_KEY_ATTR_CT_MARK); |
| 835 | 841 | } |
| 836 | − if (*attrs & (1 << OVS_KEY_ATTR_CT_LABEL) && | |
| 837 | − ovs_ct_verify(net, OVS_KEY_ATTR_CT_LABEL)) { | |
| 838 | − const struct ovs_key_ct_label *cl; | |
| 842 | + if (*attrs & (1 << OVS_KEY_ATTR_CT_LABELS) && | |
| 843 | + ovs_ct_verify(net, OVS_KEY_ATTR_CT_LABELS)) { | |
| 844 | + const struct ovs_key_ct_labels *cl; | |
| 839 | 845 | |
| 840 | − cl = nla_data(a[OVS_KEY_ATTR_CT_LABEL]); | |
| 841 | − SW_FLOW_KEY_MEMCPY(match, ct.label, cl->ct_label, | |
| 846 | + cl = nla_data(a[OVS_KEY_ATTR_CT_LABELS]); | |
| 847 | + SW_FLOW_KEY_MEMCPY(match, ct.labels, cl->ct_labels, | |
| 842 | 848 | sizeof(*cl), is_mask); |
| 843 | − *attrs &= ~(1ULL << OVS_KEY_ATTR_CT_LABEL); | |
| 849 | + *attrs &= ~(1ULL << OVS_KEY_ATTR_CT_LABELS); | |
| 844 | 850 | } |
| 845 | 851 | return 0; |
| 846 | 852 | } |
| @@ -1973,7 +1979,7 @@ static int validate_set(const struct nlattr *a, · 1126 unmodified lines | ||
| 1973 | 1979 | case OVS_KEY_ATTR_PRIORITY: |
| 1974 | 1980 | case OVS_KEY_ATTR_SKB_MARK: |
| 1975 | 1981 | case OVS_KEY_ATTR_CT_MARK: |
| 1976 | − case OVS_KEY_ATTR_CT_LABEL: | |
| 1982 | + case OVS_KEY_ATTR_CT_LABELS: | |
| 1977 | 1983 | case OVS_KEY_ATTR_ETHERNET: |
| 1978 | 1984 | break; |
| 1979 | 1985 | |
| @@ -93,7 +93,8 @@ struct sw_flow *ovs_flow_alloc(void) · 92 unmodified lines | ||
| 93 | 93 | |
| 94 | 94 | /* Initialize the default stat node. */ |
| 95 | 95 | stats = kmem_cache_alloc_node(flow_stats_cache, |
| 96 | − GFP_KERNEL | __GFP_ZERO, 0); | |
| 96 | + GFP_KERNEL | __GFP_ZERO, | |
| 97 | + node_online(0) ? 0 : NUMA_NO_NODE); | |
| 97 | 98 | if (!stats) |
| 98 | 99 | goto err; |
| 99 | 100 | |
| @@ -280,35 +280,19 @@ void ovs_vport_del(struct vport *vport) · 279 unmodified lines | ||
| 280 | 280 | */ |
| 281 | 281 | void ovs_vport_get_stats(struct vport *vport, struct ovs_vport_stats *stats) |
| 282 | 282 | { |
| 283 | − struct net_device *dev = vport->dev; | |
| 284 | − int i; | |
| 285 | − | |
| 286 | − memset(stats, 0, sizeof(*stats)); | |
| 287 | − stats->rx_errors = dev->stats.rx_errors; | |
| 288 | − stats->tx_errors = dev->stats.tx_errors; | |
| 289 | − stats->tx_dropped = dev->stats.tx_dropped; | |
| 290 | − stats->rx_dropped = dev->stats.rx_dropped; | |
| 291 | − | |
| 292 | − stats->rx_dropped += atomic_long_read(&dev->rx_dropped); | |
| 293 | − stats->tx_dropped += atomic_long_read(&dev->tx_dropped); | |
| 294 | − | |
| 295 | − for_each_possible_cpu(i) { | |
| 296 | − const struct pcpu_sw_netstats *percpu_stats; | |
| 297 | − struct pcpu_sw_netstats local_stats; | |
| 298 | − unsigned int start; | |
| 299 | − | |
| 300 | − percpu_stats = per_cpu_ptr(dev->tstats, i); | |
| 301 | − | |
| 302 | − do { | |
| 303 | − start = u64_stats_fetch_begin_irq(&percpu_stats->syncp); | |
| 304 | − local_stats = *percpu_stats; | |
| 305 | − } while (u64_stats_fetch_retry_irq(&percpu_stats->syncp, start)); | |
| 306 | − | |
| 307 | − stats->rx_bytes += local_stats.rx_bytes; | |
| 308 | − stats->rx_packets += local_stats.rx_packets; | |
| 309 | − stats->tx_bytes += local_stats.tx_bytes; | |
| 310 | − stats->tx_packets += local_stats.tx_packets; | |
| 311 | − } | |
| 283 | + const struct rtnl_link_stats64 *dev_stats; | |
| 284 | + struct rtnl_link_stats64 temp; | |
| 285 | + | |
| 286 | + dev_stats = dev_get_stats(vport->dev, &temp); | |
| 287 | + stats->rx_errors = dev_stats->rx_errors; | |
| 288 | + stats->tx_errors = dev_stats->tx_errors; | |
| 289 | + stats->tx_dropped = dev_stats->tx_dropped; | |
| 290 | + stats->rx_dropped = dev_stats->rx_dropped; | |
| 291 | + | |
| 292 | + stats->rx_bytes = dev_stats->rx_bytes; | |
| 293 | + stats->rx_packets = dev_stats->rx_packets; | |
| 294 | + stats->tx_bytes = dev_stats->tx_bytes; | |
| 295 | + stats->tx_packets = dev_stats->tx_packets; | |
| 312 | 296 | } |
| 313 | 297 | |
| 314 | 298 | /** |
| @@ -460,6 +444,15 @@ int ovs_vport_receive(struct vport *vport, struct sk_buff *skb, · 145 unmodified lines | ||
| 460 | 444 | |
| 461 | 445 | OVS_CB(skb)->input_vport = vport; |
| 462 | 446 | OVS_CB(skb)->mru = 0; |
| 447 | + if (unlikely(dev_net(skb->dev) != ovs_dp_get_net(vport->dp))) { | |
| 448 | + u32 mark; | |
| 449 | + | |
| 450 | + mark = skb->mark; | |
| 451 | + skb_scrub_packet(skb, true); | |
| 452 | + skb->mark = mark; | |
| 453 | + tun_info = NULL; | |
| 454 | + } | |
| 455 | + | |
| 463 | 456 | /* Extract flow from 'skb' into 'key'. */ |
| 464 | 457 | error = ovs_flow_key_extract(tun_info, skb, &key); |
| 465 | 458 | if (unlikely(error)) { |
| @@ -31,13 +31,17 @@ · 30 unmodified lines | ||
| 31 | 31 | |
| 32 | 32 | #define MIRRED_TAB_MASK 7 |
| 33 | 33 | static LIST_HEAD(mirred_list); |
| 34 | +static DEFINE_SPINLOCK(mirred_list_lock); | |
| 34 | 35 | |
| 35 | 36 | static void tcf_mirred_release(struct tc_action *a, int bind) |
| 36 | 37 | { |
| 37 | 38 | struct tcf_mirred *m = to_mirred(a); |
| 38 | 39 | struct net_device *dev = rcu_dereference_protected(m->tcfm_dev, 1); |
| 39 | 40 | |
| 41 | + /* We could be called either in a RCU callback or with RTNL lock held. */ | |
| 42 | + spin_lock_bh(&mirred_list_lock); | |
| 40 | 43 | list_del(&m->tcfm_list); |
| 44 | + spin_unlock_bh(&mirred_list_lock); | |
| 41 | 45 | if (dev) |
| 42 | 46 | dev_put(dev); |
| 43 | 47 | } |
| @@ -103,10 +107,10 @@ static int tcf_mirred_init(struct net *net, struct nlattr *nla, · 59 unmodified lines | ||
| 103 | 107 | } else { |
| 104 | 108 | if (bind) |
| 105 | 109 | return 0; |
| 106 | − if (!ovr) { | |
| 107 | − tcf_hash_release(a, bind); | |
| 110 | + | |
| 111 | + tcf_hash_release(a, bind); | |
| 112 | + if (!ovr) | |
| 108 | 113 | return -EEXIST; |
| 109 | − } | |
| 110 | 114 | } |
| 111 | 115 | m = to_mirred(a); |
| 112 | 116 | |
| @@ -123,7 +127,9 @@ static int tcf_mirred_init(struct net *net, struct nlattr *nla, · 10 unmodified lines | ||
| 123 | 127 | } |
| 124 | 128 | |
| 125 | 129 | if (ret == ACT_P_CREATED) { |
| 130 | + spin_lock_bh(&mirred_list_lock); | |
| 126 | 131 | list_add(&m->tcfm_list, &mirred_list); |
| 132 | + spin_unlock_bh(&mirred_list_lock); | |
| 127 | 133 | tcf_hash_insert(a); |
| 128 | 134 | } |
| 129 | 135 | |
| @@ -173,6 +179,7 @@ static int tcf_mirred(struct sk_buff *skb, const struct tc_action *a, · 43 unmodified lines | ||
| 173 | 179 | |
| 174 | 180 | skb2->skb_iif = skb->dev->ifindex; |
| 175 | 181 | skb2->dev = dev; |
| 182 | + skb_sender_cpu_clear(skb2); | |
| 176 | 183 | err = dev_queue_xmit(skb2); |
| 177 | 184 | |
| 178 | 185 | if (err) { |
| @@ -221,7 +228,8 @@ static int mirred_device_event(struct notifier_block *unused, · 42 unmodified lines | ||
| 221 | 228 | struct tcf_mirred *m; |
| 222 | 229 | |
| 223 | 230 | ASSERT_RTNL(); |
| 224 | − if (event == NETDEV_UNREGISTER) | |
| 231 | + if (event == NETDEV_UNREGISTER) { | |
| 232 | + spin_lock_bh(&mirred_list_lock); | |
| 225 | 233 | list_for_each_entry(m, &mirred_list, tcfm_list) { |
| 226 | 234 | if (rcu_access_pointer(m->tcfm_dev) == dev) { |
| 227 | 235 | dev_put(dev); |
| @@ -231,6 +239,8 @@ static int mirred_device_event(struct notifier_block *unused, · 3 unmodified lines | ||
| 231 | 239 | RCU_INIT_POINTER(m->tcfm_dev, NULL); |
| 232 | 240 | } |
| 233 | 241 | } |
| 242 | + spin_unlock_bh(&mirred_list_lock); | |
| 243 | + } | |
| 234 | 244 | |
| 235 | 245 | return NOTIFY_DONE; |
| 236 | 246 | } |
| @@ -368,6 +368,15 @@ static unsigned int hhf_drop(struct Qdisc *sch) · 367 unmodified lines | ||
| 368 | 368 | return bucket - q->buckets; |
| 369 | 369 | } |
| 370 | 370 | |
| 371 | +static unsigned int hhf_qdisc_drop(struct Qdisc *sch) | |
| 372 | +{ | |
| 373 | + unsigned int prev_backlog; | |
| 374 | + | |
| 375 | + prev_backlog = sch->qstats.backlog; | |
| 376 | + hhf_drop(sch); | |
| 377 | + return prev_backlog - sch->qstats.backlog; | |
| 378 | +} | |
| 379 | + | |
| 371 | 380 | static int hhf_enqueue(struct sk_buff *skb, struct Qdisc *sch) |
| 372 | 381 | { |
| 373 | 382 | struct hhf_sched_data *q = qdisc_priv(sch); |
| @@ -696,7 +705,7 @@ static struct Qdisc_ops hhf_qdisc_ops __read_mostly = { · 322 unmodified lines | ||
| 696 | 705 | .enqueue = hhf_enqueue, |
| 697 | 706 | .dequeue = hhf_dequeue, |
| 698 | 707 | .peek = qdisc_peek_dequeued, |
| 699 | − .drop = hhf_drop, | |
| 708 | + .drop = hhf_qdisc_drop, | |
| 700 | 709 | .init = hhf_init, |
| 701 | 710 | .reset = hhf_reset, |
| 702 | 711 | .destroy = hhf_destroy, |
| @@ -533,7 +533,7 @@ static int rdma_read_complete(struct svc_rqst *rqstp, · 532 unmodified lines | ||
| 533 | 533 | rqstp->rq_arg.page_base = head->arg.page_base; |
| 534 | 534 | |
| 535 | 535 | /* rq_respages starts after the last arg page */ |
| 536 | − rqstp->rq_respages = &rqstp->rq_arg.pages[page_no]; | |
| 536 | + rqstp->rq_respages = &rqstp->rq_pages[page_no]; | |
| 537 | 537 | rqstp->rq_next_page = rqstp->rq_respages + 1; |
| 538 | 538 | |
| 539 | 539 | /* Rebuild rq_arg head and tail. */ |
| @@ -543,11 +543,8 @@ rpcrdma_ia_open(struct rpcrdma_xprt *xprt, struct sockaddr *addr, int memreg) · 542 unmodified lines | ||
| 543 | 543 | } |
| 544 | 544 | |
| 545 | 545 | if (memreg == RPCRDMA_FRMR) { |
| 546 | − /* Requires both frmr reg and local dma lkey */ | |
| 547 | − if (((devattr->device_cap_flags & | |
| 548 | − (IB_DEVICE_MEM_MGT_EXTENSIONS|IB_DEVICE_LOCAL_DMA_LKEY)) != | |
| 549 | − (IB_DEVICE_MEM_MGT_EXTENSIONS|IB_DEVICE_LOCAL_DMA_LKEY)) || | |
| 550 | − (devattr->max_fast_reg_page_list_len == 0)) { | |
| 546 | + if (!(devattr->device_cap_flags & IB_DEVICE_MEM_MGT_EXTENSIONS) || | |
| 547 | + (devattr->max_fast_reg_page_list_len == 0)) { | |
| 551 | 548 | dprintk("RPC: %s: FRMR registration " |
| 552 | 549 | "not supported by HCA\n", __func__); |
| 553 | 550 | memreg = RPCRDMA_MTHCAFMR; |
| @@ -557,6 +554,7 @@ rpcrdma_ia_open(struct rpcrdma_xprt *xprt, struct sockaddr *addr, int memreg) · 3 unmodified lines | ||
| 557 | 554 | if (!ia->ri_device->alloc_fmr) { |
| 558 | 555 | dprintk("RPC: %s: MTHCAFMR registration " |
| 559 | 556 | "not supported by HCA\n", __func__); |
| 557 | + rc = -EINVAL; | |
| 560 | 558 | goto out3; |
| 561 | 559 | } |
| 562 | 560 | } |
| @@ -16,6 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <linux/notifier.h> |
| 17 | 17 | #include <linux/netdevice.h> |
| 18 | 18 | #include <linux/if_bridge.h> |
| 19 | +#include <linux/if_vlan.h> | |
| 19 | 20 | #include <net/ip_fib.h> |
| 20 | 21 | #include <net/switchdev.h> |
| 21 | 22 | |
| @@ -634,6 +635,8 @@ static int switchdev_port_br_afspec(struct net_device *dev, · 612 unmodified lines | ||
| 634 | 635 | if (nla_len(attr) != sizeof(struct bridge_vlan_info)) |
| 635 | 636 | return -EINVAL; |
| 636 | 637 | vinfo = nla_data(attr); |
| 638 | + if (!vinfo->vid || vinfo->vid >= VLAN_VID_MASK) | |
| 639 | + return -EINVAL; | |
| 637 | 640 | vlan->flags = vinfo->flags; |
| 638 | 641 | if (vinfo->flags & BRIDGE_VLAN_INFO_RANGE_BEGIN) { |
| 639 | 642 | if (vlan->vid_begin) |
| @@ -357,7 +357,7 @@ static inline u32 msg_importance(struct tipc_msg *m) · 356 unmodified lines | ||
| 357 | 357 | if (likely((usr <= TIPC_CRITICAL_IMPORTANCE) && !msg_errcode(m))) |
| 358 | 358 | return usr; |
| 359 | 359 | if ((usr == MSG_FRAGMENTER) || (usr == MSG_BUNDLER)) |
| 360 | − return msg_bits(m, 5, 13, 0x7); | |
| 360 | + return msg_bits(m, 9, 0, 0x7); | |
| 361 | 361 | return TIPC_SYSTEM_IMPORTANCE; |
| 362 | 362 | } |
| 363 | 363 | |
| @@ -366,7 +366,7 @@ static inline void msg_set_importance(struct tipc_msg *m, u32 i) · 2 unmodified lines | ||
| 366 | 366 | int usr = msg_user(m); |
| 367 | 367 | |
| 368 | 368 | if (likely((usr == MSG_FRAGMENTER) || (usr == MSG_BUNDLER))) |
| 369 | − msg_set_bits(m, 5, 13, 0x7, i); | |
| 369 | + msg_set_bits(m, 9, 0, 0x7, i); | |
| 370 | 370 | else if (i < TIPC_SYSTEM_IMPORTANCE) |
| 371 | 371 | msg_set_user(m, i); |
| 372 | 372 | else |
| @@ -1116,7 +1116,7 @@ static bool tipc_node_check_state(struct tipc_node *n, struct sk_buff *skb, · 1115 unmodified lines | ||
| 1116 | 1116 | } |
| 1117 | 1117 | |
| 1118 | 1118 | /* Ignore duplicate packets */ |
| 1119 | − if (less(oseqno, rcv_nxt)) | |
| 1119 | + if ((usr != LINK_PROTOCOL) && less(oseqno, rcv_nxt)) | |
| 1120 | 1120 | return true; |
| 1121 | 1121 | |
| 1122 | 1122 | /* Initiate or update failover mode if applicable */ |
| @@ -1146,8 +1146,8 @@ static bool tipc_node_check_state(struct tipc_node *n, struct sk_buff *skb, · 23 unmodified lines | ||
| 1146 | 1146 | if (!pl || !tipc_link_is_up(pl)) |
| 1147 | 1147 | return true; |
| 1148 | 1148 | |
| 1149 | − /* Initiate or update synch mode if applicable */ | |
| 1150 | − if ((usr == TUNNEL_PROTOCOL) && (mtyp == SYNCH_MSG)) { | |
| 1149 | + /* Initiate synch mode if applicable */ | |
| 1150 | + if ((usr == TUNNEL_PROTOCOL) && (mtyp == SYNCH_MSG) && (oseqno == 1)) { | |
| 1151 | 1151 | syncpt = iseqno + exp_pkts - 1; |
| 1152 | 1152 | if (!tipc_link_is_up(l)) { |
| 1153 | 1153 | tipc_link_fsm_evt(l, LINK_ESTABLISH_EVT); |
| @@ -2064,6 +2064,11 @@ static int unix_stream_read_generic(struct unix_stream_read_state *state) · 2063 unmodified lines | ||
| 2064 | 2064 | goto out; |
| 2065 | 2065 | } |
| 2066 | 2066 | |
| 2067 | + if (flags & MSG_PEEK) | |
| 2068 | + skip = sk_peek_offset(sk, flags); | |
| 2069 | + else | |
| 2070 | + skip = 0; | |
| 2071 | + | |
| 2067 | 2072 | do { |
| 2068 | 2073 | int chunk; |
| 2069 | 2074 | struct sk_buff *skb, *last; |
| @@ -2112,7 +2117,6 @@ unlock: · 42 unmodified lines | ||
| 2112 | 2117 | break; |
| 2113 | 2118 | } |
| 2114 | 2119 | |
| 2115 | − skip = sk_peek_offset(sk, flags); | |
| 2116 | 2120 | while (skip >= unix_skb_len(skb)) { |
| 2117 | 2121 | skip -= unix_skb_len(skb); |
| 2118 | 2122 | last = skb; |
| @@ -2179,14 +2183,12 @@ unlock: · 60 unmodified lines | ||
| 2179 | 2183 | if (UNIXCB(skb).fp) |
| 2180 | 2184 | scm.fp = scm_fp_dup(UNIXCB(skb).fp); |
| 2181 | 2185 | |
| 2182 | − if (skip) { | |
| 2183 | − sk_peek_offset_fwd(sk, chunk); | |
| 2184 | − skip -= chunk; | |
| 2185 | − } | |
| 2186 | + sk_peek_offset_fwd(sk, chunk); | |
| 2186 | 2187 | |
| 2187 | 2188 | if (UNIXCB(skb).fp) |
| 2188 | 2189 | break; |
| 2189 | 2190 | |
| 2191 | + skip = 0; | |
| 2190 | 2192 | last = skb; |
| 2191 | 2193 | last_len = skb->len; |
| 2192 | 2194 | unix_state_lock(sk); |
| @@ -115,7 +115,7 @@ esac · 114 unmodified lines | ||
| 115 | 115 | BUILD_DEBUG="$(grep -s '^CONFIG_DEBUG_INFO=y' $KCONFIG_CONFIG || true)" |
| 116 | 116 | |
| 117 | 117 | # Setup the directory structure |
| 118 | −rm -rf "$tmpdir" "$fwdir" "$kernel_headers_dir" "$libc_headers_dir" "$dbg_dir" | |
| 118 | +rm -rf "$tmpdir" "$fwdir" "$kernel_headers_dir" "$libc_headers_dir" "$dbg_dir" $objtree/debian/files | |
| 119 | 119 | mkdir -m 755 -p "$tmpdir/DEBIAN" |
| 120 | 120 | mkdir -p "$tmpdir/lib" "$tmpdir/boot" |
| 121 | 121 | mkdir -p "$fwdir/lib/firmware/$version/" |
| @@ -408,7 +408,7 @@ binary-arch: · 286 unmodified lines | ||
| 408 | 408 | \$(MAKE) KDEB_SOURCENAME=${sourcename} KDEB_PKGVERSION=${packageversion} bindeb-pkg |
| 409 | 409 | |
| 410 | 410 | clean: |
| 411 | − rm -rf debian/*tmp | |
| 411 | + rm -rf debian/*tmp debian/files | |
| 412 | 412 | mv debian/ debian.backup # debian/ might be cleaned away |
| 413 | 413 | \$(MAKE) clean |
| 414 | 414 | mv debian.backup debian |
| @@ -134,8 +134,10 @@ static noinline void key_gc_unused_keys(struct list_head *keys) · 133 unmodified lines | ||
| 134 | 134 | kdebug("- %u", key->serial); |
| 135 | 135 | key_check(key); |
| 136 | 136 | |
| 137 | − /* Throw away the key data */ | |
| 138 | − if (key->type->destroy) | |
| 137 | + /* Throw away the key data if the key is instantiated */ | |
| 138 | + if (test_bit(KEY_FLAG_INSTANTIATED, &key->flags) && | |
| 139 | + !test_bit(KEY_FLAG_NEGATIVE, &key->flags) && | |
| 140 | + key->type->destroy) | |
| 139 | 141 | key->type->destroy(key); |
| 140 | 142 | |
| 141 | 143 | security_key_free(key); |
| @@ -440,6 +440,9 @@ static struct key *construct_key_and_link(struct keyring_search_context *ctx, · 439 unmodified lines | ||
| 440 | 440 | |
| 441 | 441 | kenter(""); |
| 442 | 442 | |
| 443 | + if (ctx->index_key.type == &key_type_keyring) | |
| 444 | + return ERR_PTR(-EPERM); | |
| 445 | + | |
| 443 | 446 | user = key_user_lookup(current_fsuid()); |
| 444 | 447 | if (!user) |
| 445 | 448 | return ERR_PTR(-ENOMEM); |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | |
| 20 | 20 | #include <linux/module.h> |
| 21 | 21 | #include <linux/slab.h> |
| 22 | +#include <linux/io.h> | |
| 22 | 23 | #include <sound/hdaudio_ext.h> |
| 23 | 24 | |
| 24 | 25 | MODULE_DESCRIPTION("HDA extended core"); |
| @@ -3367,10 +3367,8 @@ int snd_hda_codec_build_pcms(struct hda_codec *codec) · 3366 unmodified lines | ||
| 3367 | 3367 | int dev, err; |
| 3368 | 3368 | |
| 3369 | 3369 | err = snd_hda_codec_parse_pcms(codec); |
| 3370 | − if (err < 0) { | |
| 3371 | − snd_hda_codec_reset(codec); | |
| 3370 | + if (err < 0) | |
| 3372 | 3371 | return err; |
| 3373 | − } | |
| 3374 | 3372 | |
| 3375 | 3373 | /* attach a new PCM streams */ |
| 3376 | 3374 | list_for_each_entry(cpcm, &codec->pcm_list_head, list) { |
| @@ -819,6 +819,7 @@ static const struct snd_pci_quirk cxt5066_fixups[] = { · 818 unmodified lines | ||
| 819 | 819 | SND_PCI_QUIRK(0x17aa, 0x21da, "Lenovo X220", CXT_PINCFG_LENOVO_TP410), |
| 820 | 820 | SND_PCI_QUIRK(0x17aa, 0x21db, "Lenovo X220-tablet", CXT_PINCFG_LENOVO_TP410), |
| 821 | 821 | SND_PCI_QUIRK(0x17aa, 0x38af, "Lenovo IdeaPad Z560", CXT_FIXUP_MUTE_LED_EAPD), |
| 822 | + SND_PCI_QUIRK(0x17aa, 0x390b, "Lenovo G50-80", CXT_FIXUP_STEREO_DMIC), | |
| 822 | 823 | SND_PCI_QUIRK(0x17aa, 0x3975, "Lenovo U300s", CXT_FIXUP_STEREO_DMIC), |
| 823 | 824 | SND_PCI_QUIRK(0x17aa, 0x3977, "Lenovo IdeaPad U310", CXT_FIXUP_STEREO_DMIC), |
| 824 | 825 | SND_PCI_QUIRK(0x17aa, 0x397b, "Lenovo S205", CXT_FIXUP_STEREO_DMIC), |
| @@ -50,24 +50,24 @@ struct rt298_priv { · 49 unmodified lines | ||
| 50 | 50 | }; |
| 51 | 51 | |
| 52 | 52 | static struct reg_default rt298_index_def[] = { |
| 53 | − { 0x01, 0xaaaa }, | |
| 54 | − { 0x02, 0x8aaa }, | |
| 53 | + { 0x01, 0xa5a8 }, | |
| 54 | + { 0x02, 0x8e95 }, | |
| 55 | 55 | { 0x03, 0x0002 }, |
| 56 | − { 0x04, 0xaf01 }, | |
| 57 | − { 0x08, 0x000d }, | |
| 58 | − { 0x09, 0xd810 }, | |
| 59 | − { 0x0a, 0x0120 }, | |
| 56 | + { 0x04, 0xaf67 }, | |
| 57 | + { 0x08, 0x200f }, | |
| 58 | + { 0x09, 0xd010 }, | |
| 59 | + { 0x0a, 0x0100 }, | |
| 60 | 60 | { 0x0b, 0x0000 }, |
| 61 | 61 | { 0x0d, 0x2800 }, |
| 62 | − { 0x0f, 0x0000 }, | |
| 63 | − { 0x19, 0x0a17 }, | |
| 62 | + { 0x0f, 0x0022 }, | |
| 63 | + { 0x19, 0x0217 }, | |
| 64 | 64 | { 0x20, 0x0020 }, |
| 65 | 65 | { 0x33, 0x0208 }, |
| 66 | 66 | { 0x46, 0x0300 }, |
| 67 | − { 0x49, 0x0004 }, | |
| 68 | − { 0x4f, 0x50e9 }, | |
| 69 | − { 0x50, 0x2000 }, | |
| 70 | − { 0x63, 0x2902 }, | |
| 67 | + { 0x49, 0x4004 }, | |
| 68 | + { 0x4f, 0x50c9 }, | |
| 69 | + { 0x50, 0x3000 }, | |
| 70 | + { 0x63, 0x1b02 }, | |
| 71 | 71 | { 0x67, 0x1111 }, |
| 72 | 72 | { 0x68, 0x1016 }, |
| 73 | 73 | { 0x69, 0x273f }, |
| @@ -1214,7 +1214,7 @@ static int rt298_i2c_probe(struct i2c_client *i2c, · 1140 unmodified lines | ||
| 1214 | 1214 | mdelay(10); |
| 1215 | 1215 | |
| 1216 | 1216 | if (!rt298->pdata.gpio2_en) |
| 1217 | − regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0x4000); | |
| 1217 | + regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0x40); | |
| 1218 | 1218 | else |
| 1219 | 1219 | regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0); |
| 1220 | 1220 | |
| @@ -3808,6 +3808,8 @@ static int wm8962_runtime_resume(struct device *dev) · 3807 unmodified lines | ||
| 3808 | 3808 | |
| 3809 | 3809 | wm8962_reset(wm8962); |
| 3810 | 3810 | |
| 3811 | + regcache_mark_dirty(wm8962->regmap); | |
| 3812 | + | |
| 3811 | 3813 | /* SYSCLK defaults to on; make sure it is off so we can safely |
| 3812 | 3814 | * write to registers if the device is declocked. |
| 3813 | 3815 | */ |
| @@ -206,6 +206,34 @@ int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, · 205 unmodified lines | ||
| 206 | 206 | } |
| 207 | 207 | EXPORT_SYMBOL_GPL(snd_soc_info_volsw); |
| 208 | 208 | |
| 209 | +/** | |
| 210 | + * snd_soc_info_volsw_sx - Mixer info callback for SX TLV controls | |
| 211 | + * @kcontrol: mixer control | |
| 212 | + * @uinfo: control element information | |
| 213 | + * | |
| 214 | + * Callback to provide information about a single mixer control, or a double | |
| 215 | + * mixer control that spans 2 registers of the SX TLV type. SX TLV controls | |
| 216 | + * have a range that represents both positive and negative values either side | |
| 217 | + * of zero but without a sign bit. | |
| 218 | + * | |
| 219 | + * Returns 0 for success. | |
| 220 | + */ | |
| 221 | +int snd_soc_info_volsw_sx(struct snd_kcontrol *kcontrol, | |
| 222 | + struct snd_ctl_elem_info *uinfo) | |
| 223 | +{ | |
| 224 | + struct soc_mixer_control *mc = | |
| 225 | + (struct soc_mixer_control *)kcontrol->private_value; | |
| 226 | + | |
| 227 | + snd_soc_info_volsw(kcontrol, uinfo); | |
| 228 | + /* Max represents the number of levels in an SX control not the | |
| 229 | + * maximum value, so add the minimum value back on | |
| 230 | + */ | |
| 231 | + uinfo->value.integer.max += mc->min; | |
| 232 | + | |
| 233 | + return 0; | |
| 234 | +} | |
| 235 | +EXPORT_SYMBOL_GPL(snd_soc_info_volsw_sx); | |
| 236 | + | |
| 209 | 237 | /** |
| 210 | 238 | * snd_soc_get_volsw - single mixer get callback |
| 211 | 239 | * @kcontrol: mixer control |
| @@ -25,10 +25,19 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | #define FIXUP_SECTION ".ex_fixup" |
| 27 | 27 | |
| 28 | +static inline unsigned long __fls(unsigned long x); | |
| 29 | + | |
| 28 | 30 | #include "word-at-a-time.h" |
| 29 | 31 | |
| 30 | 32 | #include "utils.h" |
| 31 | 33 | |
| 34 | +static inline unsigned long __fls(unsigned long x) | |
| 35 | +{ | |
| 36 | + int lz; | |
| 37 | + | |
| 38 | + asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x)); | |
| 39 | + return sizeof(unsigned long) - 1 - lz; | |
| 40 | +} | |
| 32 | 41 | |
| 33 | 42 | static int page_size; |
| 34 | 43 | static char *mem_region; |
| @@ -137,6 +137,8 @@ bool kvm_timer_should_fire(struct kvm_vcpu *vcpu) · 136 unmodified lines | ||
| 137 | 137 | void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) |
| 138 | 138 | { |
| 139 | 139 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; |
| 140 | + bool phys_active; | |
| 141 | + int ret; | |
| 140 | 142 | |
| 141 | 143 | /* |
| 142 | 144 | * We're about to run this vcpu again, so there is no need to |
| @@ -151,6 +153,23 @@ void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) · 8 unmodified lines | ||
| 151 | 153 | */ |
| 152 | 154 | if (kvm_timer_should_fire(vcpu)) |
| 153 | 155 | kvm_timer_inject_irq(vcpu); |
| 156 | + | |
| 157 | + /* | |
| 158 | + * We keep track of whether the edge-triggered interrupt has been | |
| 159 | + * signalled to the vgic/guest, and if so, we mask the interrupt and | |
| 160 | + * the physical distributor to prevent the timer from raising a | |
| 161 | + * physical interrupt whenever we run a guest, preventing forward | |
| 162 | + * VCPU progress. | |
| 163 | + */ | |
| 164 | + if (kvm_vgic_get_phys_irq_active(timer->map)) | |
| 165 | + phys_active = true; | |
| 166 | + else | |
| 167 | + phys_active = false; | |
| 168 | + | |
| 169 | + ret = irq_set_irqchip_state(timer->map->irq, | |
| 170 | + IRQCHIP_STATE_ACTIVE, | |
| 171 | + phys_active); | |
| 172 | + WARN_ON(ret); | |
| 154 | 173 | } |
| 155 | 174 | |
| 156 | 175 | /** |
| @@ -531,6 +531,34 @@ bool vgic_handle_set_pending_reg(struct kvm *kvm, · 530 unmodified lines | ||
| 531 | 531 | return false; |
| 532 | 532 | } |
| 533 | 533 | |
| 534 | +/* | |
| 535 | + * If a mapped interrupt's state has been modified by the guest such that it | |
| 536 | + * is no longer active or pending, without it have gone through the sync path, | |
| 537 | + * then the map->active field must be cleared so the interrupt can be taken | |
| 538 | + * again. | |
| 539 | + */ | |
| 540 | +static void vgic_handle_clear_mapped_irq(struct kvm_vcpu *vcpu) | |
| 541 | +{ | |
| 542 | + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
| 543 | + struct list_head *root; | |
| 544 | + struct irq_phys_map_entry *entry; | |
| 545 | + struct irq_phys_map *map; | |
| 546 | + | |
| 547 | + rcu_read_lock(); | |
| 548 | + | |
| 549 | + /* Check for PPIs */ | |
| 550 | + root = &vgic_cpu->irq_phys_map_list; | |
| 551 | + list_for_each_entry_rcu(entry, root, entry) { | |
| 552 | + map = &entry->map; | |
| 553 | + | |
| 554 | + if (!vgic_dist_irq_is_pending(vcpu, map->virt_irq) && | |
| 555 | + !vgic_irq_is_active(vcpu, map->virt_irq)) | |
| 556 | + map->active = false; | |
| 557 | + } | |
| 558 | + | |
| 559 | + rcu_read_unlock(); | |
| 560 | +} | |
| 561 | + | |
| 534 | 562 | bool vgic_handle_clear_pending_reg(struct kvm *kvm, |
| 535 | 563 | struct kvm_exit_mmio *mmio, |
| 536 | 564 | phys_addr_t offset, int vcpu_id) |
| @@ -561,6 +589,7 @@ bool vgic_handle_clear_pending_reg(struct kvm *kvm, · 24 unmodified lines | ||
| 561 | 589 | vcpu_id, offset); |
| 562 | 590 | vgic_reg_access(mmio, reg, offset, mode); |
| 563 | 591 | |
| 592 | + vgic_handle_clear_mapped_irq(kvm_get_vcpu(kvm, vcpu_id)); | |
| 564 | 593 | vgic_update_state(kvm); |
| 565 | 594 | return true; |
| 566 | 595 | } |
| @@ -598,6 +627,7 @@ bool vgic_handle_clear_active_reg(struct kvm *kvm, · 31 unmodified lines | ||
| 598 | 627 | ACCESS_READ_VALUE | ACCESS_WRITE_CLEARBIT); |
| 599 | 628 | |
| 600 | 629 | if (mmio->is_write) { |
| 630 | + vgic_handle_clear_mapped_irq(kvm_get_vcpu(kvm, vcpu_id)); | |
| 601 | 631 | vgic_update_state(kvm); |
| 602 | 632 | return true; |
| 603 | 633 | } |
| @@ -982,6 +1012,12 @@ static int compute_pending_for_cpu(struct kvm_vcpu *vcpu) · 378 unmodified lines | ||
| 982 | 1012 | pend_percpu = vcpu->arch.vgic_cpu.pending_percpu; |
| 983 | 1013 | pend_shared = vcpu->arch.vgic_cpu.pending_shared; |
| 984 | 1014 | |
| 1015 | + if (!dist->enabled) { | |
| 1016 | + bitmap_zero(pend_percpu, VGIC_NR_PRIVATE_IRQS); | |
| 1017 | + bitmap_zero(pend_shared, nr_shared); | |
| 1018 | + return 0; | |
| 1019 | + } | |
| 1020 | + | |
| 985 | 1021 | pending = vgic_bitmap_get_cpu_map(&dist->irq_pending, vcpu_id); |
| 986 | 1022 | enabled = vgic_bitmap_get_cpu_map(&dist->irq_enabled, vcpu_id); |
| 987 | 1023 | bitmap_and(pend_percpu, pending, enabled, VGIC_NR_PRIVATE_IRQS); |
| @@ -1009,11 +1045,6 @@ void vgic_update_state(struct kvm *kvm) · 21 unmodified lines | ||
| 1009 | 1045 | struct kvm_vcpu *vcpu; |
| 1010 | 1046 | int c; |
| 1011 | 1047 | |
| 1012 | − if (!dist->enabled) { | |
| 1013 | − set_bit(0, dist->irq_pending_on_cpu); | |
| 1014 | − return; | |
| 1015 | − } | |
| 1016 | − | |
| 1017 | 1048 | kvm_for_each_vcpu(c, vcpu, kvm) { |
| 1018 | 1049 | if (compute_pending_for_cpu(vcpu)) |
| 1019 | 1050 | set_bit(c, dist->irq_pending_on_cpu); |
| @@ -1092,6 +1123,15 @@ static void vgic_retire_lr(int lr_nr, int irq, struct kvm_vcpu *vcpu) · 72 unmodified lines | ||
| 1092 | 1123 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
| 1093 | 1124 | struct vgic_lr vlr = vgic_get_lr(vcpu, lr_nr); |
| 1094 | 1125 | |
| 1126 | + /* | |
| 1127 | + * We must transfer the pending state back to the distributor before | |
| 1128 | + * retiring the LR, otherwise we may loose edge-triggered interrupts. | |
| 1129 | + */ | |
| 1130 | + if (vlr.state & LR_STATE_PENDING) { | |
| 1131 | + vgic_dist_irq_set_pending(vcpu, irq); | |
| 1132 | + vlr.hwirq = 0; | |
| 1133 | + } | |
| 1134 | + | |
| 1095 | 1135 | vlr.state = 0; |
| 1096 | 1136 | vgic_set_lr(vcpu, lr_nr, vlr); |
| 1097 | 1137 | clear_bit(lr_nr, vgic_cpu->lr_used); |
| @@ -1132,7 +1172,8 @@ static void vgic_queue_irq_to_lr(struct kvm_vcpu *vcpu, int irq, · 34 unmodified lines | ||
| 1132 | 1172 | kvm_debug("Set active, clear distributor: 0x%x\n", vlr.state); |
| 1133 | 1173 | vgic_irq_clear_active(vcpu, irq); |
| 1134 | 1174 | vgic_update_state(vcpu->kvm); |
| 1135 | − } else if (vgic_dist_irq_is_pending(vcpu, irq)) { | |
| 1175 | + } else { | |
| 1176 | + WARN_ON(!vgic_dist_irq_is_pending(vcpu, irq)); | |
| 1136 | 1177 | vlr.state |= LR_STATE_PENDING; |
| 1137 | 1178 | kvm_debug("Set pending: 0x%x\n", vlr.state); |
| 1138 | 1179 | } |
| @@ -1240,7 +1281,7 @@ static void __kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) · 101 unmodified lines | ||
| 1240 | 1281 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
| 1241 | 1282 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 1242 | 1283 | unsigned long *pa_percpu, *pa_shared; |
| 1243 | − int i, vcpu_id, lr, ret; | |
| 1284 | + int i, vcpu_id; | |
| 1244 | 1285 | int overflow = 0; |
| 1245 | 1286 | int nr_shared = vgic_nr_shared_irqs(dist); |
| 1246 | 1287 | |
| @@ -1295,31 +1336,6 @@ epilog: · 48 unmodified lines | ||
| 1295 | 1336 | */ |
| 1296 | 1337 | clear_bit(vcpu_id, dist->irq_pending_on_cpu); |
| 1297 | 1338 | } |
| 1298 | − | |
| 1299 | − for (lr = 0; lr < vgic->nr_lr; lr++) { | |
| 1300 | − struct vgic_lr vlr; | |
| 1301 | − | |
| 1302 | − if (!test_bit(lr, vgic_cpu->lr_used)) | |
| 1303 | − continue; | |
| 1304 | − | |
| 1305 | − vlr = vgic_get_lr(vcpu, lr); | |
| 1306 | − | |
| 1307 | − /* | |
| 1308 | − * If we have a mapping, and the virtual interrupt is | |
| 1309 | − * presented to the guest (as pending or active), then we must | |
| 1310 | − * set the state to active in the physical world. See | |
| 1311 | − * Documentation/virtual/kvm/arm/vgic-mapped-irqs.txt. | |
| 1312 | − */ | |
| 1313 | − if (vlr.state & LR_HW) { | |
| 1314 | − struct irq_phys_map *map; | |
| 1315 | − map = vgic_irq_map_search(vcpu, vlr.irq); | |
| 1316 | − | |
| 1317 | − ret = irq_set_irqchip_state(map->irq, | |
| 1318 | − IRQCHIP_STATE_ACTIVE, | |
| 1319 | − true); | |
| 1320 | − WARN_ON(ret); | |
| 1321 | − } | |
| 1322 | − } | |
| 1323 | 1339 | } |
| 1324 | 1340 | |
| 1325 | 1341 | static bool vgic_process_maintenance(struct kvm_vcpu *vcpu) |
| @@ -1421,7 +1437,7 @@ static int vgic_sync_hwirq(struct kvm_vcpu *vcpu, struct vgic_lr vlr) · 95 unmodified lines | ||
| 1421 | 1437 | return 0; |
| 1422 | 1438 | |
| 1423 | 1439 | map = vgic_irq_map_search(vcpu, vlr.irq); |
| 1424 | − BUG_ON(!map || !map->active); | |
| 1440 | + BUG_ON(!map); | |
| 1425 | 1441 | |
| 1426 | 1442 | ret = irq_get_irqchip_state(map->irq, |
| 1427 | 1443 | IRQCHIP_STATE_ACTIVE, |
| @@ -1429,13 +1445,8 @@ static int vgic_sync_hwirq(struct kvm_vcpu *vcpu, struct vgic_lr vlr) · 1 unmodified line | ||
| 1429 | 1445 | |
| 1430 | 1446 | WARN_ON(ret); |
| 1431 | 1447 | |
| 1432 | − if (map->active) { | |
| 1433 | − ret = irq_set_irqchip_state(map->irq, | |
| 1434 | − IRQCHIP_STATE_ACTIVE, | |
| 1435 | − false); | |
| 1436 | − WARN_ON(ret); | |
| 1448 | + if (map->active) | |
| 1437 | 1449 | return 0; |
| 1438 | − } | |
| 1439 | 1450 | |
| 1440 | 1451 | return 1; |
| 1441 | 1452 | } |
| @@ -1607,8 +1618,12 @@ static int vgic_update_irq_pending(struct kvm *kvm, int cpuid, · 165 unmodified lines | ||
| 1607 | 1618 | } else { |
| 1608 | 1619 | if (level_triggered) { |
| 1609 | 1620 | vgic_dist_irq_clear_level(vcpu, irq_num); |
| 1610 | − if (!vgic_dist_irq_soft_pend(vcpu, irq_num)) | |
| 1621 | + if (!vgic_dist_irq_soft_pend(vcpu, irq_num)) { | |
| 1611 | 1622 | vgic_dist_irq_clear_pending(vcpu, irq_num); |
| 1623 | + vgic_cpu_irq_clear(vcpu, irq_num); | |
| 1624 | + if (!compute_pending_for_cpu(vcpu)) | |
| 1625 | + clear_bit(cpuid, dist->irq_pending_on_cpu); | |
| 1626 | + } | |
| 1612 | 1627 | } |
| 1613 | 1628 | |
| 1614 | 1629 | ret = false; |