Merge tag 'gpio-v5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO fixes from Linus Walleij: "Some late GPIO fixes for the v5.9 series: - Fix compiler warnings on the OMAP when PM is disabled - Clear the interrupt when setting edge sensitivity on the Spreadtrum driver. - Fix up spurious interrupts on the TC35894. - Support threaded interrupts on the Siox controller. - Fix resource leaks on the mockup driver. - Fix line event handling in syscall compatible mode for the character device. - Fix an unitialized variable in the PCA953A driver. - Fix access to all GPIO IRQs on the Aspeed AST2600. - Fix line direction on the AMD FCH driver. - Use the bitmap API instead of compiler intrinsics for bit manipulation in the PCA953x driver" * tag 'gpio-v5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio: pca953x: Correctly initialize registers 6 and 7 for PCA957x gpio: pca953x: Use bitmap API over implicit GCC extension gpio: amd-fch: correct logic of GPIO_LINE_DIRECTION gpio: aspeed: fix ast2600 bank properties gpio/aspeed-sgpio: don't enable all interrupts by default gpio/aspeed-sgpio: enable access to all 80 input & output sgpios gpio: pca953x: Fix uninitialized pending variable gpiolib: Fix line event handling in syscall compatible mode gpio: mockup: fix resource leak in error path gpio: siox: explicitly support only threaded irqs gpio: tc35894: fix up tc35894 interrupt configuration gpio: sprd: Clear interrupt when setting the type as edge gpio: omap: Fix warnings if PM is disabled

Linus Torvalds committed 6 years ago

Commit 0bf0dfd2 parents 2270b89 8c1f1c311 files · +138 −60Browse files

Unified · Split

11 files

Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt +3 −2
drivers/gpio/gpio-amd-fch.c +1 −1
drivers/gpio/gpio-aspeed-sgpio.c +87 −47
drivers/gpio/gpio-aspeed.c +2 −2
drivers/gpio/gpio-mockup.c +2 −0
drivers/gpio/gpio-omap.c +2 −2
drivers/gpio/gpio-pca953x.c +6 −1
drivers/gpio/gpio-siox.c +1 −0
drivers/gpio/gpio-sprd.c +3 −0
drivers/gpio/gpio-tc3589x.c +1 −1
drivers/gpio/gpiolib-cdev.c +30 −4

Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt+3−2

@@ -20,8 +20,9 @@ Required properties: · 19 unmodified lines
20	20	- gpio-controller : Marks the device node as a GPIO controller
21	21	- interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt
22	22	- interrupt-controller : Mark the GPIO controller as an interrupt-controller
23		−- ngpios : number of GPIO lines, see gpio.txt
24		− (should be multiple of 8, up to 80 pins)
	23	+- ngpios : number of hardware GPIO lines, see gpio.txt. This will expose
	24	+ 2 software GPIOs per hardware GPIO: one for hardware input, one for hardware
	25	+ output. Up to 80 pins, must be a multiple of 8.
25	26	- clocks : A phandle to the APB clock for SGPM clock division
26	27	- bus-frequency : SGPM CLK frequency
27	28

drivers/gpio/gpio-amd-fch.c+1−1

@@ -92,7 +92,7 @@ static int amd_fch_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio) · 91 unmodified lines
92	92	ret = (readl_relaxed(ptr) & AMD_FCH_GPIO_FLAG_DIRECTION);
93	93	spin_unlock_irqrestore(&priv->lock, flags);
94	94
95		− return ret ? GPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT;
	95	+ return ret ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
96	96	}
97	97
98	98	static void amd_fch_gpio_set(struct gpio_chip *gc,

drivers/gpio/gpio-aspeed-sgpio.c+87−47

@@ -17,7 +17,17 @@ · 16 unmodified lines
17	17	#include <linux/spinlock.h>
18	18	#include <linux/string.h>
19	19
20		−#define MAX_NR_SGPIO 80
	20	+/*
	21	+ * MAX_NR_HW_GPIO represents the number of actual hardware-supported GPIOs (ie,
	22	+ * slots within the clocked serial GPIO data). Since each HW GPIO is both an
	23	+ * input and an output, we provide MAX_NR_HW_GPIO * 2 lines on our gpiochip
	24	+ * device.
	25	+ *
	26	+ * We use SGPIO_OUTPUT_OFFSET to define the split between the inputs and
	27	+ * outputs; the inputs start at line 0, the outputs start at OUTPUT_OFFSET.
	28	+ */
	29	+#define MAX_NR_HW_SGPIO 80
	30	+#define SGPIO_OUTPUT_OFFSET MAX_NR_HW_SGPIO
21	31
22	32	#define ASPEED_SGPIO_CTRL 0x54
23	33
@@ -30,8 +40,8 @@ struct aspeed_sgpio { · 6 unmodified lines
30	40	struct clk *pclk;
31	41	spinlock_t lock;
32	42	void __iomem *base;
33		− uint32_t dir_in[3];
34	43	int irq;
	44	+ int n_sgpio;
35	45	};
36	46
37	47	struct aspeed_sgpio_bank {
@@ -111,31 +121,69 @@ static void __iomem bank_reg(struct aspeed_sgpio gpio, · 73 unmodified lines
111	121	}
112	122	}
113	123
114		−#define GPIO_BANK(x) ((x) >> 5)
115		−#define GPIO_OFFSET(x) ((x) & 0x1f)
	124	+#define GPIO_BANK(x) ((x % SGPIO_OUTPUT_OFFSET) >> 5)
	125	+#define GPIO_OFFSET(x) ((x % SGPIO_OUTPUT_OFFSET) & 0x1f)
116	126	#define GPIO_BIT(x) BIT(GPIO_OFFSET(x))
117	127
118	128	static const struct aspeed_sgpio_bank *to_bank(unsigned int offset)
119	129	{
120		− unsigned int bank = GPIO_BANK(offset);
	130	+ unsigned int bank;
	131	+
	132	+ bank = GPIO_BANK(offset);
121	133
122	134	WARN_ON(bank >= ARRAY_SIZE(aspeed_sgpio_banks));
123	135	return &aspeed_sgpio_banks[bank];
124	136	}
125	137
	138	+static int aspeed_sgpio_init_valid_mask(struct gpio_chip *gc,
	139	+ unsigned long *valid_mask, unsigned int ngpios)
	140	+{
	141	+ struct aspeed_sgpio *sgpio = gpiochip_get_data(gc);
	142	+ int n = sgpio->n_sgpio;
	143	+ int c = SGPIO_OUTPUT_OFFSET - n;
	144	+
	145	+ WARN_ON(ngpios < MAX_NR_HW_SGPIO * 2);
	146	+
	147	+ /* input GPIOs in the lower range */
	148	+ bitmap_set(valid_mask, 0, n);
	149	+ bitmap_clear(valid_mask, n, c);
	150	+
	151	+ /* output GPIOS above SGPIO_OUTPUT_OFFSET */
	152	+ bitmap_set(valid_mask, SGPIO_OUTPUT_OFFSET, n);
	153	+ bitmap_clear(valid_mask, SGPIO_OUTPUT_OFFSET + n, c);
	154	+
	155	+ return 0;
	156	+}
	157	+
	158	+static void aspeed_sgpio_irq_init_valid_mask(struct gpio_chip *gc,
	159	+ unsigned long *valid_mask, unsigned int ngpios)
	160	+{
	161	+ struct aspeed_sgpio *sgpio = gpiochip_get_data(gc);
	162	+ int n = sgpio->n_sgpio;
	163	+
	164	+ WARN_ON(ngpios < MAX_NR_HW_SGPIO * 2);
	165	+
	166	+ /* input GPIOs in the lower range */
	167	+ bitmap_set(valid_mask, 0, n);
	168	+ bitmap_clear(valid_mask, n, ngpios - n);
	169	+}
	170	+
	171	+static bool aspeed_sgpio_is_input(unsigned int offset)
	172	+{
	173	+ return offset < SGPIO_OUTPUT_OFFSET;
	174	+}
	175	+
126	176	static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset)
127	177	{
128	178	struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
129	179	const struct aspeed_sgpio_bank *bank = to_bank(offset);
130	180	unsigned long flags;
131	181	enum aspeed_sgpio_reg reg;
132		− bool is_input;
133	182	int rc = 0;
134	183
135	184	spin_lock_irqsave(&gpio->lock, flags);
136	185
137		− is_input = gpio->dir_in[GPIO_BANK(offset)] & GPIO_BIT(offset);
138		− reg = is_input ? reg_val : reg_rdata;
	186	+ reg = aspeed_sgpio_is_input(offset) ? reg_val : reg_rdata;
139	187	rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
140	188
141	189	spin_unlock_irqrestore(&gpio->lock, flags);
@@ -143,22 +191,31 @@ static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset) · 1 unmodified line
143	191	return rc;
144	192	}
145	193
146		−static void sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val)
	194	+static int sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val)
147	195	{
148	196	struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
149	197	const struct aspeed_sgpio_bank *bank = to_bank(offset);
150		− void __iomem *addr;
	198	+ void __iomem addr_r, addr_w;
151	199	u32 reg = 0;
152	200
153		− addr = bank_reg(gpio, bank, reg_val);
154		− reg = ioread32(addr);
	201	+ if (aspeed_sgpio_is_input(offset))
	202	+ return -EINVAL;
	203	+
	204	+ /* Since this is an output, read the cached value from rdata, then
	205	+ * update val. */
	206	+ addr_r = bank_reg(gpio, bank, reg_rdata);
	207	+ addr_w = bank_reg(gpio, bank, reg_val);
	208	+
	209	+ reg = ioread32(addr_r);
155	210
156	211	if (val)
157	212	reg \|= GPIO_BIT(offset);
158	213	else
159	214	reg &= ~GPIO_BIT(offset);
160	215
161		− iowrite32(reg, addr);
	216	+ iowrite32(reg, addr_w);
	217	+
	218	+ return 0;
162	219	}
163	220
164	221	static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)
@@ -175,43 +232,28 @@ static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val) · 10 unmodified lines
175	232
176	233	static int aspeed_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset)
177	234	{
178		− struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
179		− unsigned long flags;
180		−
181		− spin_lock_irqsave(&gpio->lock, flags);
182		− gpio->dir_in[GPIO_BANK(offset)] \|= GPIO_BIT(offset);
183		− spin_unlock_irqrestore(&gpio->lock, flags);
184		−
185		− return 0;
	235	+ return aspeed_sgpio_is_input(offset) ? 0 : -EINVAL;
186	236	}
187	237
188	238	static int aspeed_sgpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val)
189	239	{
190	240	struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
191	241	unsigned long flags;
	242	+ int rc;
192	243
193		− spin_lock_irqsave(&gpio->lock, flags);
194		−
195		− gpio->dir_in[GPIO_BANK(offset)] &= ~GPIO_BIT(offset);
196		− sgpio_set_value(gc, offset, val);
	244	+ /* No special action is required for setting the direction; we'll
	245	+ * error-out in sgpio_set_value if this isn't an output GPIO */
197	246
	247	+ spin_lock_irqsave(&gpio->lock, flags);
	248	+ rc = sgpio_set_value(gc, offset, val);
198	249	spin_unlock_irqrestore(&gpio->lock, flags);
199	250
200		− return 0;
	251	+ return rc;
201	252	}
202	253
203	254	static int aspeed_sgpio_get_direction(struct gpio_chip *gc, unsigned int offset)
204	255	{
205		− int dir_status;
206		− struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
207		− unsigned long flags;
208		−
209		− spin_lock_irqsave(&gpio->lock, flags);
210		− dir_status = gpio->dir_in[GPIO_BANK(offset)] & GPIO_BIT(offset);
211		− spin_unlock_irqrestore(&gpio->lock, flags);
212		−
213		− return dir_status;
214		−
	256	+ return !!aspeed_sgpio_is_input(offset);
215	257	}
216	258
217	259	static void irqd_to_aspeed_sgpio_data(struct irq_data *d,
@@ -402,6 +444,7 @@ static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio, · 184 unmodified lines
402	444
403	445	irq = &gpio->chip.irq;
404	446	irq->chip = &aspeed_sgpio_irqchip;
	447	+ irq->init_valid_mask = aspeed_sgpio_irq_init_valid_mask;
405	448	irq->handler = handle_bad_irq;
406	449	irq->default_type = IRQ_TYPE_NONE;
407	450	irq->parent_handler = aspeed_sgpio_irq_handler;
@@ -409,17 +452,15 @@ static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio, · 1 unmodified line
409	452	irq->parents = &gpio->irq;
410	453	irq->num_parents = 1;
411	454
412		− /* set IRQ settings and Enable Interrupt */
	455	+ /* Apply default IRQ settings */
413	456	for (i = 0; i < ARRAY_SIZE(aspeed_sgpio_banks); i++) {
414	457	bank = &aspeed_sgpio_banks[i];
415	458	/* set falling or level-low irq */
416	459	iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type0));
417	460	/* trigger type is edge */
418	461	iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type1));
419		− /* dual edge trigger mode. */
420		− iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_type2));
421		− /* enable irq */
422		− iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_enable));
	462	+ /* single edge trigger */
	463	+ iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type2));
423	464	}
424	465
425	466	return 0;
@@ -452,11 +493,12 @@ static int __init aspeed_sgpio_probe(struct platform_device *pdev) · 26 unmodified lines
452	493	if (rc < 0) {
453	494	dev_err(&pdev->dev, "Could not read ngpios property\n");
454	495	return -EINVAL;
455		− } else if (nr_gpios > MAX_NR_SGPIO) {
	496	+ } else if (nr_gpios > MAX_NR_HW_SGPIO) {
456	497	dev_err(&pdev->dev, "Number of GPIOs exceeds the maximum of %d: %d\n",
457		− MAX_NR_SGPIO, nr_gpios);
	498	+ MAX_NR_HW_SGPIO, nr_gpios);
458	499	return -EINVAL;
459	500	}
	501	+ gpio->n_sgpio = nr_gpios;
460	502
461	503	rc = of_property_read_u32(pdev->dev.of_node, "bus-frequency", &sgpio_freq);
462	504	if (rc < 0) {
@@ -497,7 +539,8 @@ static int __init aspeed_sgpio_probe(struct platform_device *pdev) · 34 unmodified lines
497	539	spin_lock_init(&gpio->lock);
498	540
499	541	gpio->chip.parent = &pdev->dev;
500		− gpio->chip.ngpio = nr_gpios;
	542	+ gpio->chip.ngpio = MAX_NR_HW_SGPIO * 2;
	543	+ gpio->chip.init_valid_mask = aspeed_sgpio_init_valid_mask;
501	544	gpio->chip.direction_input = aspeed_sgpio_dir_in;
502	545	gpio->chip.direction_output = aspeed_sgpio_dir_out;
503	546	gpio->chip.get_direction = aspeed_sgpio_get_direction;
@@ -509,9 +552,6 @@ static int __init aspeed_sgpio_probe(struct platform_device *pdev) · 5 unmodified lines
509	552	gpio->chip.label = dev_name(&pdev->dev);
510	553	gpio->chip.base = -1;
511	554
512		− /* set all SGPIO pins as input (1). */
513		− memset(gpio->dir_in, 0xff, sizeof(gpio->dir_in));
514		−
515	555	aspeed_sgpio_setup_irqs(gpio, pdev);
516	556
517	557	rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);

drivers/gpio/gpio-aspeed.c+2−2

@@ -1114,8 +1114,8 @@ static const struct aspeed_gpio_config ast2500_config = · 1113 unmodified lines
1114	1114
1115	1115	static const struct aspeed_bank_props ast2600_bank_props[] = {
1116	1116	/* input output */
1117		− {5, 0xffffffff, 0x0000ffff}, /* U/V/W/X */
1118		− {6, 0xffff0000, 0x0fff0000}, /* Y/Z */
	1117	+ {5, 0xffffffff, 0xffffff00}, /* U/V/W/X */
	1118	+ {6, 0x0000ffff, 0x0000ffff}, /* Y/Z */
1119	1119	{ },
1120	1120	};
1121	1121

drivers/gpio/gpio-mockup.c+2−0

@@ -552,6 +552,7 @@ static int __init gpio_mockup_init(void) · 551 unmodified lines
552	552	err = platform_driver_register(&gpio_mockup_driver);
553	553	if (err) {
554	554	gpio_mockup_err("error registering platform driver\n");
	555	+ debugfs_remove_recursive(gpio_mockup_dbg_dir);
555	556	return err;
556	557	}
557	558
@@ -582,6 +583,7 @@ static int __init gpio_mockup_init(void) · 24 unmodified lines
582	583	gpio_mockup_err("error registering device");
583	584	platform_driver_unregister(&gpio_mockup_driver);
584	585	gpio_mockup_unregister_pdevs();
	586	+ debugfs_remove_recursive(gpio_mockup_dbg_dir);
585	587	return PTR_ERR(pdev);
586	588	}
587	589

drivers/gpio/gpio-omap.c+2−2

@@ -1516,7 +1516,7 @@ static int __maybe_unused omap_gpio_runtime_resume(struct device *dev) · 1515 unmodified lines
1516	1516	return 0;
1517	1517	}
1518	1518
1519		−static int omap_gpio_suspend(struct device *dev)
	1519	+static int __maybe_unused omap_gpio_suspend(struct device *dev)
1520	1520	{
1521	1521	struct gpio_bank *bank = dev_get_drvdata(dev);
1522	1522
@@ -1528,7 +1528,7 @@ static int omap_gpio_suspend(struct device *dev) · 5 unmodified lines
1528	1528	return omap_gpio_runtime_suspend(dev);
1529	1529	}
1530	1530
1531		−static int omap_gpio_resume(struct device *dev)
	1531	+static int __maybe_unused omap_gpio_resume(struct device *dev)
1532	1532	{
1533	1533	struct gpio_bank *bank = dev_get_drvdata(dev);
1534	1534

drivers/gpio/gpio-pca953x.c+6−1

@@ -818,6 +818,8 @@ static irqreturn_t pca953x_irq_handler(int irq, void *devid) · 817 unmodified lines
818	818	int level;
819	819	bool ret;
820	820
	821	+ bitmap_zero(pending, MAX_LINE);
	822	+
821	823	mutex_lock(&chip->i2c_lock);
822	824	ret = pca953x_irq_pending(chip, pending);
823	825	mutex_unlock(&chip->i2c_lock);
@@ -940,6 +942,7 @@ out: · 116 unmodified lines
940	942	static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
941	943	{
942	944	DECLARE_BITMAP(val, MAX_LINE);
	945	+ unsigned int i;
943	946	int ret;
944	947
945	948	ret = device_pca95xx_init(chip, invert);
@@ -947,7 +950,9 @@ static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) · 1 unmodified line
947	950	goto out;
948	951
949	952	/* To enable register 6, 7 to control pull up and pull down */
950		− memset(val, 0x02, NBANK(chip));
	953	+ for (i = 0; i < NBANK(chip); i++)
	954	+ bitmap_set_value8(val, 0x02, i * BANK_SZ);
	955	+
951	956	ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
952	957	if (ret)
953	958	goto out;

drivers/gpio/gpio-siox.c+1−0

@@ -245,6 +245,7 @@ static int gpio_siox_probe(struct siox_device *sdevice) · 244 unmodified lines
245	245	girq->chip = &ddata->ichip;
246	246	girq->default_type = IRQ_TYPE_NONE;
247	247	girq->handler = handle_level_irq;
	248	+ girq->threaded = true;
248	249
249	250	ret = devm_gpiochip_add_data(dev, &ddata->gchip, NULL);
250	251	if (ret)

drivers/gpio/gpio-sprd.c+3−0

@@ -149,17 +149,20 @@ static int sprd_gpio_irq_set_type(struct irq_data *data, · 148 unmodified lines
149	149	sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
150	150	sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
151	151	sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 1);
	152	+ sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
152	153	irq_set_handler_locked(data, handle_edge_irq);
153	154	break;
154	155	case IRQ_TYPE_EDGE_FALLING:
155	156	sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
156	157	sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
157	158	sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 0);
	159	+ sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
158	160	irq_set_handler_locked(data, handle_edge_irq);
159	161	break;
160	162	case IRQ_TYPE_EDGE_BOTH:
161	163	sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
162	164	sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 1);
	165	+ sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
163	166	irq_set_handler_locked(data, handle_edge_irq);
164	167	break;
165	168	case IRQ_TYPE_LEVEL_HIGH:

drivers/gpio/gpio-tc3589x.c+1−1

@@ -212,7 +212,7 @@ static void tc3589x_gpio_irq_sync_unlock(struct irq_data *d) · 211 unmodified lines
212	212	continue;
213	213
214	214	tc3589x_gpio->oldregs[i][j] = new;
215		− tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new);
	215	+ tc3589x_reg_write(tc3589x, regmap[i] + j, new);
216	216	}
217	217	}
218	218

drivers/gpio/gpiolib-cdev.c+30−4

@@ -423,6 +423,21 @@ static __poll_t lineevent_poll(struct file *file, · 422 unmodified lines
423	423	return events;
424	424	}
425	425
	426	+static ssize_t lineevent_get_size(void)
	427	+{
	428	+#ifdef __x86_64__
	429	+ /* i386 has no padding after 'id' */
	430	+ if (in_ia32_syscall()) {
	431	+ struct compat_gpioeevent_data {
	432	+ compat_u64 timestamp;
	433	+ u32 id;
	434	+ };
	435	+
	436	+ return sizeof(struct compat_gpioeevent_data);
	437	+ }
	438	+#endif
	439	+ return sizeof(struct gpioevent_data);
	440	+}
426	441
427	442	static ssize_t lineevent_read(struct file *file,
428	443	char __user *buf,
@@ -432,9 +447,20 @@ static ssize_t lineevent_read(struct file *file, · 3 unmodified lines
432	447	struct lineevent_state *le = file->private_data;
433	448	struct gpioevent_data ge;
434	449	ssize_t bytes_read = 0;
	450	+ ssize_t ge_size;
435	451	int ret;
436	452
437		− if (count < sizeof(ge))
	453	+ /*
	454	+ * When compatible system call is being used the struct gpioevent_data,
	455	+ * in case of at least ia32, has different size due to the alignment
	456	+ * differences. Because we have first member 64 bits followed by one of
	457	+ * 32 bits there is no gap between them. The only difference is the
	458	+ * padding at the end of the data structure. Hence, we calculate the
	459	+ * actual sizeof() and pass this as an argument to copy_to_user() to
	460	+ * drop unneeded bytes from the output.
	461	+ */
	462	+ ge_size = lineevent_get_size();
	463	+ if (count < ge_size)
438	464	return -EINVAL;
439	465
440	466	do {
@@ -470,10 +496,10 @@ static ssize_t lineevent_read(struct file *file, · 29 unmodified lines
470	496	break;
471	497	}
472	498
473		− if (copy_to_user(buf + bytes_read, &ge, sizeof(ge)))
	499	+ if (copy_to_user(buf + bytes_read, &ge, ge_size))
474	500	return -EFAULT;
475		− bytes_read += sizeof(ge);
476		− } while (count >= bytes_read + sizeof(ge));
	501	+ bytes_read += ge_size;
	502	+ } while (count >= bytes_read + ge_size);
477	503
478	504	return bytes_read;
479	505	}

Merge tag 'gpio-v5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

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