Pull arm64 updates from Catalin Marinas: - Expose tag address bits in siginfo. The original arm64 ABI did not expose any of the bits 63:56 of a tagged address in siginfo. In the presence of user ASAN or MTE, this information may be useful. The implementation is generic to other architectures supporting tags (like SPARC ADI, subject to wiring up the arch code). The user will have to opt in via sigaction(SA_EXPOSE_TAGBITS) so that the extra bits, if available, become visible in si_addr. - Default to 32-bit wide ZONE_DMA. Previously, ZONE_DMA was set to the lowest 1GB to cope with the Raspberry Pi 4 limitations, to the detriment of other platforms. With these changes, the kernel scans the Device Tree dma-ranges and the ACPI IORT information before deciding on a smaller ZONE_DMA. - Strengthen READ_ONCE() to acquire when CONFIG_LTO=y. When building with LTO, there is an increased risk of the compiler converting an address dependency headed by a READ_ONCE() invocation into a control dependency and consequently allowing for harmful reordering by the CPU. - Add CPPC FFH support using arm64 AMU counters. - set_fs() removal on arm64. This renders the User Access Override (UAO) ARMv8 feature unnecessary. - Perf updates: PMU driver for the ARM DMC-620 memory controller, sysfs identifier file for SMMUv3, stop event counters support for i.MX8MP, enable the perf events-based hard lockup detector. - Reorganise the kernel VA space slightly so that 52-bit VA configurations can use more virtual address space. - Improve the robustness of the arm64 memory offline event notifier. - Pad the Image header to 64K following the EFI header definition updated recently to increase the section alignment to 64K. - Support CONFIG_CMDLINE_EXTEND on arm64. - Do not use tagged PC in the kernel (TCR_EL1.TBID1==1), freeing up 8 bits for PtrAuth. - Switch to vmapped shadow call stacks. - Miscellaneous clean-ups. * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (78 commits) perf/imx_ddr: Add system PMU identifier for userspace bindings: perf: imx-ddr: add compatible string arm64: Fix build failure when HARDLOCKUP_DETECTOR_PERF is enabled arm64: mte: fix prctl(PR_GET_TAGGED_ADDR_CTRL) if TCF0=NONE arm64: mark __system_matches_cap as __maybe_unused arm64: uaccess: remove vestigal UAO support arm64: uaccess: remove redundant PAN toggling arm64: uaccess: remove addr_limit_user_check() arm64: uaccess: remove set_fs() arm64: uaccess cleanup macro naming arm64: uaccess: split user/kernel routines arm64: uaccess: refactor __{get,put}_user arm64: uaccess: simplify __copy_user_flushcache() arm64: uaccess: rename privileged uaccess routines arm64: sdei: explicitly simulate PAN/UAO entry arm64: sdei: move uaccess logic to arch/arm64/ arm64: head.S: always initialize PSTATE arm64: head.S: cleanup SCTLR_ELx initialization arm64: head.S: rename el2_setup -> init_kernel_el arm64: add C wrappers for SET_PSTATE_*() ...
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| @@ -5,26 +5,49 @@ · 4 unmodified lines | ||
| 5 | 5 | * Copyright (C) 2019 Google LLC |
| 6 | 6 | */ |
| 7 | 7 | |
| 8 | +#include <linux/cpuhotplug.h> | |
| 8 | 9 | #include <linux/kasan.h> |
| 9 | 10 | #include <linux/mm.h> |
| 10 | 11 | #include <linux/scs.h> |
| 11 | −#include <linux/slab.h> | |
| 12 | +#include <linux/vmalloc.h> | |
| 12 | 13 | #include <linux/vmstat.h> |
| 13 | 14 | |
| 14 | −static struct kmem_cache *scs_cache; | |
| 15 | − | |
| 16 | 15 | static void __scs_account(void *s, int account) |
| 17 | 16 | { |
| 18 | − struct page *scs_page = virt_to_page(s); | |
| 17 | + struct page *scs_page = vmalloc_to_page(s); | |
| 19 | 18 | |
| 20 | 19 | mod_node_page_state(page_pgdat(scs_page), NR_KERNEL_SCS_KB, |
| 21 | 20 | account * (SCS_SIZE / SZ_1K)); |
| 22 | 21 | } |
| 23 | 22 | |
| 24 | −static void *scs_alloc(int node) | |
| 23 | +/* Matches NR_CACHED_STACKS for VMAP_STACK */ | |
| 24 | +#define NR_CACHED_SCS 2 | |
| 25 | +static DEFINE_PER_CPU(void *, scs_cache[NR_CACHED_SCS]); | |
| 26 | + | |
| 27 | +static void *__scs_alloc(int node) | |
| 25 | 28 | { |
| 26 | − void *s = kmem_cache_alloc_node(scs_cache, GFP_SCS, node); | |
| 29 | + int i; | |
| 30 | + void *s; | |
| 31 | + | |
| 32 | + for (i = 0; i < NR_CACHED_SCS; i++) { | |
| 33 | + s = this_cpu_xchg(scs_cache[i], NULL); | |
| 34 | + if (s) { | |
| 35 | + kasan_unpoison_vmalloc(s, SCS_SIZE); | |
| 36 | + memset(s, 0, SCS_SIZE); | |
| 37 | + return s; | |
| 38 | + } | |
| 39 | + } | |
| 40 | + | |
| 41 | + return __vmalloc_node_range(SCS_SIZE, 1, VMALLOC_START, VMALLOC_END, | |
| 42 | + GFP_SCS, PAGE_KERNEL, 0, node, | |
| 43 | + __builtin_return_address(0)); | |
| 44 | +} | |
| 27 | 45 | |
| 46 | +void *scs_alloc(int node) | |
| 47 | +{ | |
| 48 | + void *s; | |
| 49 | + | |
| 50 | + s = __scs_alloc(node); | |
| 28 | 51 | if (!s) |
| 29 | 52 | return NULL; |
| 30 | 53 | |
| @@ -34,21 +57,47 @@ static void *scs_alloc(int node) · 3 unmodified lines | ||
| 34 | 57 | * Poison the allocation to catch unintentional accesses to |
| 35 | 58 | * the shadow stack when KASAN is enabled. |
| 36 | 59 | */ |
| 37 | − kasan_poison_object_data(scs_cache, s); | |
| 60 | + kasan_poison_vmalloc(s, SCS_SIZE); | |
| 38 | 61 | __scs_account(s, 1); |
| 39 | 62 | return s; |
| 40 | 63 | } |
| 41 | 64 | |
| 42 | −static void scs_free(void *s) | |
| 65 | +void scs_free(void *s) | |
| 43 | 66 | { |
| 67 | + int i; | |
| 68 | + | |
| 44 | 69 | __scs_account(s, -1); |
| 45 | − kasan_unpoison_object_data(scs_cache, s); | |
| 46 | − kmem_cache_free(scs_cache, s); | |
| 70 | + | |
| 71 | + /* | |
| 72 | + * We cannot sleep as this can be called in interrupt context, | |
| 73 | + * so use this_cpu_cmpxchg to update the cache, and vfree_atomic | |
| 74 | + * to free the stack. | |
| 75 | + */ | |
| 76 | + | |
| 77 | + for (i = 0; i < NR_CACHED_SCS; i++) | |
| 78 | + if (this_cpu_cmpxchg(scs_cache[i], 0, s) == NULL) | |
| 79 | + return; | |
| 80 | + | |
| 81 | + vfree_atomic(s); | |
| 82 | +} | |
| 83 | + | |
| 84 | +static int scs_cleanup(unsigned int cpu) | |
| 85 | +{ | |
| 86 | + int i; | |
| 87 | + void **cache = per_cpu_ptr(scs_cache, cpu); | |
| 88 | + | |
| 89 | + for (i = 0; i < NR_CACHED_SCS; i++) { | |
| 90 | + vfree(cache[i]); | |
| 91 | + cache[i] = NULL; | |
| 92 | + } | |
| 93 | + | |
| 94 | + return 0; | |
| 47 | 95 | } |
| 48 | 96 | |
| 49 | 97 | void __init scs_init(void) |
| 50 | 98 | { |
| 51 | − scs_cache = kmem_cache_create("scs_cache", SCS_SIZE, 0, 0, NULL); | |
| 99 | + cpuhp_setup_state(CPUHP_BP_PREPARE_DYN, "scs:scs_cache", NULL, | |
| 100 | + scs_cleanup); | |
| 52 | 101 | } |
| 53 | 102 | |
| 54 | 103 | int scs_prepare(struct task_struct *tsk, int node) |
| @@ -2524,6 +2524,26 @@ static int ptrace_signal(int signr, kernel_siginfo_t *info) · 2523 unmodified lines | ||
| 2524 | 2524 | return signr; |
| 2525 | 2525 | } |
| 2526 | 2526 | |
| 2527 | +static void hide_si_addr_tag_bits(struct ksignal *ksig) | |
| 2528 | +{ | |
| 2529 | + switch (siginfo_layout(ksig->sig, ksig->info.si_code)) { | |
| 2530 | + case SIL_FAULT: | |
| 2531 | + case SIL_FAULT_MCEERR: | |
| 2532 | + case SIL_FAULT_BNDERR: | |
| 2533 | + case SIL_FAULT_PKUERR: | |
| 2534 | + ksig->info.si_addr = arch_untagged_si_addr( | |
| 2535 | + ksig->info.si_addr, ksig->sig, ksig->info.si_code); | |
| 2536 | + break; | |
| 2537 | + case SIL_KILL: | |
| 2538 | + case SIL_TIMER: | |
| 2539 | + case SIL_POLL: | |
| 2540 | + case SIL_CHLD: | |
| 2541 | + case SIL_RT: | |
| 2542 | + case SIL_SYS: | |
| 2543 | + break; | |
| 2544 | + } | |
| 2545 | +} | |
| 2546 | + | |
| 2527 | 2547 | bool get_signal(struct ksignal *ksig) |
| 2528 | 2548 | { |
| 2529 | 2549 | struct sighand_struct *sighand = current->sighand; |
| @@ -2761,6 +2781,10 @@ relock: · 231 unmodified lines | ||
| 2761 | 2781 | spin_unlock_irq(&sighand->siglock); |
| 2762 | 2782 | |
| 2763 | 2783 | ksig->sig = signr; |
| 2784 | + | |
| 2785 | + if (!(ksig->ka.sa.sa_flags & SA_EXPOSE_TAGBITS)) | |
| 2786 | + hide_si_addr_tag_bits(ksig); | |
| 2787 | + | |
| 2764 | 2788 | return ksig->sig > 0; |
| 2765 | 2789 | } |
| 2766 | 2790 | |
| @@ -3985,6 +4009,22 @@ int do_sigaction(int sig, struct k_sigaction *act, struct k_sigaction *oact) · 1218 unmodified lines | ||
| 3985 | 4009 | if (oact) |
| 3986 | 4010 | *oact = *k; |
| 3987 | 4011 | |
| 4012 | + /* | |
| 4013 | + * Make sure that we never accidentally claim to support SA_UNSUPPORTED, | |
| 4014 | + * e.g. by having an architecture use the bit in their uapi. | |
| 4015 | + */ | |
| 4016 | + BUILD_BUG_ON(UAPI_SA_FLAGS & SA_UNSUPPORTED); | |
| 4017 | + | |
| 4018 | + /* | |
| 4019 | + * Clear unknown flag bits in order to allow userspace to detect missing | |
| 4020 | + * support for flag bits and to allow the kernel to use non-uapi bits | |
| 4021 | + * internally. | |
| 4022 | + */ | |
| 4023 | + if (act) | |
| 4024 | + act->sa.sa_flags &= UAPI_SA_FLAGS; | |
| 4025 | + if (oact) | |
| 4026 | + oact->sa.sa_flags &= UAPI_SA_FLAGS; | |
| 4027 | + | |
| 3988 | 4028 | sigaction_compat_abi(act, oact); |
| 3989 | 4029 | |
| 3990 | 4030 | if (act) { |