This patch adds a default IPC type for each platform, along with file paths to be used for each IPC type. To make reviews simpler, we only modify platform descriptors in this table, the information will be used in the next patch. The Intel IPCv4 is only supported on Intel platforms after APL, and not by default. In follow-up patches, support for SKL and KBL will be added, and in those two cases the IPCv4 will be the default (and only supported mode).
Unified · Split
| @@ -124,6 +124,10 @@ struct sof_dev_desc { · 123 unmodified lines | |||
| 124 | /* defaults for no codec mode */ | 124 | /* defaults for no codec mode */ |
| 125 | const char *nocodec_tplg_filename; | 125 | const char *nocodec_tplg_filename; |
| 126 | 126 | ||
| 127 | /* information on supported IPCs */ | ||
| 128 | unsigned int ipc_supported_mask; | ||
| 129 | enum sof_ipc_type ipc_default; | ||
| 130 | |||
| 127 | /* defaults paths for firmware and topology files */ | 131 | /* defaults paths for firmware and topology files */ |
| 128 | const char *default_fw_path[SOF_IPC_TYPE_COUNT]; | 132 | const char *default_fw_path[SOF_IPC_TYPE_COUNT]; |
| 129 | const char *default_tplg_path[SOF_IPC_TYPE_COUNT]; | 133 | const char *default_tplg_path[SOF_IPC_TYPE_COUNT]; |
| @@ -54,6 +54,8 @@ static const struct sof_dev_desc renoir_desc = { · 53 unmodified lines | |||
| 54 | .resindex_imr_base = -1, | 54 | .resindex_imr_base = -1, |
| 55 | .irqindex_host_ipc = -1, | 55 | .irqindex_host_ipc = -1, |
| 56 | .chip_info = &renoir_chip_info, | 56 | .chip_info = &renoir_chip_info, |
| 57 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 58 | .ipc_default = SOF_IPC, | ||
| 57 | .default_fw_path = { | 59 | .default_fw_path = { |
| 58 | [SOF_IPC] = "amd/sof", | 60 | [SOF_IPC] = "amd/sof", |
| 59 | }, | 61 | }, |
| @@ -613,6 +613,8 @@ static const struct snd_sof_dsp_ops sof_imx8x_ops = { · 612 unmodified lines | |||
| 613 | }; | 613 | }; |
| 614 | 614 | ||
| 615 | static struct sof_dev_desc sof_of_imx8qxp_desc = { | 615 | static struct sof_dev_desc sof_of_imx8qxp_desc = { |
| 616 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 617 | .ipc_default = SOF_IPC, | ||
| 616 | .default_fw_path = { | 618 | .default_fw_path = { |
| 617 | [SOF_IPC] = "imx/sof", | 619 | [SOF_IPC] = "imx/sof", |
| 618 | }, | 620 | }, |
| @@ -625,6 +627,8 @@ static struct sof_dev_desc sof_of_imx8qxp_desc = { · 6 unmodified lines | |||
| 625 | }; | 627 | }; |
| 626 | 628 | ||
| 627 | static struct sof_dev_desc sof_of_imx8qm_desc = { | 629 | static struct sof_dev_desc sof_of_imx8qm_desc = { |
| 630 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 631 | .ipc_default = SOF_IPC, | ||
| 628 | .default_fw_path = { | 632 | .default_fw_path = { |
| 629 | [SOF_IPC] = "imx/sof", | 633 | [SOF_IPC] = "imx/sof", |
| 630 | }, | 634 | }, |
| @@ -473,6 +473,8 @@ static const struct snd_sof_dsp_ops sof_imx8m_ops = { · 472 unmodified lines | |||
| 473 | }; | 473 | }; |
| 474 | 474 | ||
| 475 | static struct sof_dev_desc sof_of_imx8mp_desc = { | 475 | static struct sof_dev_desc sof_of_imx8mp_desc = { |
| 476 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 477 | .ipc_default = SOF_IPC, | ||
| 476 | .default_fw_path = { | 478 | .default_fw_path = { |
| 477 | [SOF_IPC] = "imx/sof", | 479 | [SOF_IPC] = "imx/sof", |
| 478 | }, | 480 | }, |
| @@ -646,6 +646,8 @@ static const struct sof_dev_desc sof_acpi_broadwell_desc = { · 645 unmodified lines | |||
| 646 | .resindex_imr_base = -1, | 646 | .resindex_imr_base = -1, |
| 647 | .irqindex_host_ipc = 0, | 647 | .irqindex_host_ipc = 0, |
| 648 | .chip_info = &bdw_chip_info, | 648 | .chip_info = &bdw_chip_info, |
| 649 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 650 | .ipc_default = SOF_IPC, | ||
| 649 | .default_fw_path = { | 651 | .default_fw_path = { |
| 650 | [SOF_IPC] = "intel/sof", | 652 | [SOF_IPC] = "intel/sof", |
| 651 | }, | 653 | }, |
| @@ -388,6 +388,8 @@ static const struct sof_dev_desc sof_acpi_baytrailcr_desc = { · 387 unmodified lines | |||
| 388 | .resindex_imr_base = 2, | 388 | .resindex_imr_base = 2, |
| 389 | .irqindex_host_ipc = 0, | 389 | .irqindex_host_ipc = 0, |
| 390 | .chip_info = &byt_chip_info, | 390 | .chip_info = &byt_chip_info, |
| 391 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 392 | .ipc_default = SOF_IPC, | ||
| 391 | .default_fw_path = { | 393 | .default_fw_path = { |
| 392 | [SOF_IPC] = "intel/sof", | 394 | [SOF_IPC] = "intel/sof", |
| 393 | }, | 395 | }, |
| @@ -406,6 +408,8 @@ static const struct sof_dev_desc sof_acpi_baytrail_desc = { · 12 unmodified lines | |||
| 406 | .resindex_imr_base = 2, | 408 | .resindex_imr_base = 2, |
| 407 | .irqindex_host_ipc = 5, | 409 | .irqindex_host_ipc = 5, |
| 408 | .chip_info = &byt_chip_info, | 410 | .chip_info = &byt_chip_info, |
| 411 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 412 | .ipc_default = SOF_IPC, | ||
| 409 | .default_fw_path = { | 413 | .default_fw_path = { |
| 410 | [SOF_IPC] = "intel/sof", | 414 | [SOF_IPC] = "intel/sof", |
| 411 | }, | 415 | }, |
| @@ -424,6 +428,8 @@ static const struct sof_dev_desc sof_acpi_cherrytrail_desc = { · 12 unmodified lines | |||
| 424 | .resindex_imr_base = 2, | 428 | .resindex_imr_base = 2, |
| 425 | .irqindex_host_ipc = 5, | 429 | .irqindex_host_ipc = 5, |
| 426 | .chip_info = &cht_chip_info, | 430 | .chip_info = &cht_chip_info, |
| 431 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 432 | .ipc_default = SOF_IPC, | ||
| 427 | .default_fw_path = { | 433 | .default_fw_path = { |
| 428 | [SOF_IPC] = "intel/sof", | 434 | [SOF_IPC] = "intel/sof", |
| 429 | }, | 435 | }, |
| @@ -27,11 +27,15 @@ static const struct sof_dev_desc bxt_desc = { · 26 unmodified lines | |||
| 27 | .resindex_imr_base = -1, | 27 | .resindex_imr_base = -1, |
| 28 | .irqindex_host_ipc = -1, | 28 | .irqindex_host_ipc = -1, |
| 29 | .chip_info = &apl_chip_info, | 29 | .chip_info = &apl_chip_info, |
| 30 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 31 | .ipc_default = SOF_IPC, | ||
| 30 | .default_fw_path = { | 32 | .default_fw_path = { |
| 31 | [SOF_IPC] = "intel/sof", | 33 | [SOF_IPC] = "intel/sof", |
| 34 | [SOF_INTEL_IPC4] = "intel/avs/apl", | ||
| 32 | }, | 35 | }, |
| 33 | .default_tplg_path = { | 36 | .default_tplg_path = { |
| 34 | [SOF_IPC] = "intel/sof-tplg", | 37 | [SOF_IPC] = "intel/sof-tplg", |
| 38 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 35 | }, | 39 | }, |
| 36 | .default_fw_filename = "sof-apl.ri", | 40 | .default_fw_filename = "sof-apl.ri", |
| 37 | .nocodec_tplg_filename = "sof-apl-nocodec.tplg", | 41 | .nocodec_tplg_filename = "sof-apl-nocodec.tplg", |
| @@ -46,11 +50,15 @@ static const struct sof_dev_desc glk_desc = { · 8 unmodified lines | |||
| 46 | .resindex_imr_base = -1, | 50 | .resindex_imr_base = -1, |
| 47 | .irqindex_host_ipc = -1, | 51 | .irqindex_host_ipc = -1, |
| 48 | .chip_info = &apl_chip_info, | 52 | .chip_info = &apl_chip_info, |
| 53 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 54 | .ipc_default = SOF_IPC, | ||
| 49 | .default_fw_path = { | 55 | .default_fw_path = { |
| 50 | [SOF_IPC] = "intel/sof", | 56 | [SOF_IPC] = "intel/sof", |
| 57 | [SOF_INTEL_IPC4] = "intel/avs/glk", | ||
| 51 | }, | 58 | }, |
| 52 | .default_tplg_path = { | 59 | .default_tplg_path = { |
| 53 | [SOF_IPC] = "intel/sof-tplg", | 60 | [SOF_IPC] = "intel/sof-tplg", |
| 61 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 54 | }, | 62 | }, |
| 55 | .default_fw_filename = "sof-glk.ri", | 63 | .default_fw_filename = "sof-glk.ri", |
| 56 | .nocodec_tplg_filename = "sof-glk-nocodec.tplg", | 64 | .nocodec_tplg_filename = "sof-glk-nocodec.tplg", |
| @@ -28,11 +28,15 @@ static const struct sof_dev_desc cnl_desc = { · 27 unmodified lines | |||
| 28 | .resindex_imr_base = -1, | 28 | .resindex_imr_base = -1, |
| 29 | .irqindex_host_ipc = -1, | 29 | .irqindex_host_ipc = -1, |
| 30 | .chip_info = &cnl_chip_info, | 30 | .chip_info = &cnl_chip_info, |
| 31 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 32 | .ipc_default = SOF_IPC, | ||
| 31 | .default_fw_path = { | 33 | .default_fw_path = { |
| 32 | [SOF_IPC] = "intel/sof", | 34 | [SOF_IPC] = "intel/sof", |
| 35 | [SOF_INTEL_IPC4] = "intel/avs/cnl", | ||
| 33 | }, | 36 | }, |
| 34 | .default_tplg_path = { | 37 | .default_tplg_path = { |
| 35 | [SOF_IPC] = "intel/sof-tplg", | 38 | [SOF_IPC] = "intel/sof-tplg", |
| 39 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 36 | }, | 40 | }, |
| 37 | .default_fw_filename = "sof-cnl.ri", | 41 | .default_fw_filename = "sof-cnl.ri", |
| 38 | .nocodec_tplg_filename = "sof-cnl-nocodec.tplg", | 42 | .nocodec_tplg_filename = "sof-cnl-nocodec.tplg", |
| @@ -48,11 +52,15 @@ static const struct sof_dev_desc cfl_desc = { · 9 unmodified lines | |||
| 48 | .resindex_imr_base = -1, | 52 | .resindex_imr_base = -1, |
| 49 | .irqindex_host_ipc = -1, | 53 | .irqindex_host_ipc = -1, |
| 50 | .chip_info = &cnl_chip_info, | 54 | .chip_info = &cnl_chip_info, |
| 55 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 56 | .ipc_default = SOF_IPC, | ||
| 51 | .default_fw_path = { | 57 | .default_fw_path = { |
| 52 | [SOF_IPC] = "intel/sof", | 58 | [SOF_IPC] = "intel/sof", |
| 59 | [SOF_INTEL_IPC4] = "intel/avs/cnl", | ||
| 53 | }, | 60 | }, |
| 54 | .default_tplg_path = { | 61 | .default_tplg_path = { |
| 55 | [SOF_IPC] = "intel/sof-tplg", | 62 | [SOF_IPC] = "intel/sof-tplg", |
| 63 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 56 | }, | 64 | }, |
| 57 | .default_fw_filename = "sof-cfl.ri", | 65 | .default_fw_filename = "sof-cfl.ri", |
| 58 | .nocodec_tplg_filename = "sof-cnl-nocodec.tplg", | 66 | .nocodec_tplg_filename = "sof-cnl-nocodec.tplg", |
| @@ -68,11 +76,15 @@ static const struct sof_dev_desc cml_desc = { · 9 unmodified lines | |||
| 68 | .resindex_imr_base = -1, | 76 | .resindex_imr_base = -1, |
| 69 | .irqindex_host_ipc = -1, | 77 | .irqindex_host_ipc = -1, |
| 70 | .chip_info = &cnl_chip_info, | 78 | .chip_info = &cnl_chip_info, |
| 79 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 80 | .ipc_default = SOF_IPC, | ||
| 71 | .default_fw_path = { | 81 | .default_fw_path = { |
| 72 | [SOF_IPC] = "intel/sof", | 82 | [SOF_IPC] = "intel/sof", |
| 83 | [SOF_INTEL_IPC4] = "intel/avs/cnl", | ||
| 73 | }, | 84 | }, |
| 74 | .default_tplg_path = { | 85 | .default_tplg_path = { |
| 75 | [SOF_IPC] = "intel/sof-tplg", | 86 | [SOF_IPC] = "intel/sof-tplg", |
| 87 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 76 | }, | 88 | }, |
| 77 | .default_fw_filename = "sof-cml.ri", | 89 | .default_fw_filename = "sof-cml.ri", |
| 78 | .nocodec_tplg_filename = "sof-cnl-nocodec.tplg", | 90 | .nocodec_tplg_filename = "sof-cnl-nocodec.tplg", |
| @@ -28,11 +28,15 @@ static const struct sof_dev_desc icl_desc = { · 27 unmodified lines | |||
| 28 | .resindex_imr_base = -1, | 28 | .resindex_imr_base = -1, |
| 29 | .irqindex_host_ipc = -1, | 29 | .irqindex_host_ipc = -1, |
| 30 | .chip_info = &icl_chip_info, | 30 | .chip_info = &icl_chip_info, |
| 31 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 32 | .ipc_default = SOF_IPC, | ||
| 31 | .default_fw_path = { | 33 | .default_fw_path = { |
| 32 | [SOF_IPC] = "intel/sof", | 34 | [SOF_IPC] = "intel/sof", |
| 35 | [SOF_INTEL_IPC4] = "intel/avs/icl", | ||
| 33 | }, | 36 | }, |
| 34 | .default_tplg_path = { | 37 | .default_tplg_path = { |
| 35 | [SOF_IPC] = "intel/sof-tplg", | 38 | [SOF_IPC] = "intel/sof-tplg", |
| 39 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 36 | }, | 40 | }, |
| 37 | .default_fw_filename = "sof-icl.ri", | 41 | .default_fw_filename = "sof-icl.ri", |
| 38 | .nocodec_tplg_filename = "sof-icl-nocodec.tplg", | 42 | .nocodec_tplg_filename = "sof-icl-nocodec.tplg", |
| @@ -47,11 +51,15 @@ static const struct sof_dev_desc jsl_desc = { · 8 unmodified lines | |||
| 47 | .resindex_imr_base = -1, | 51 | .resindex_imr_base = -1, |
| 48 | .irqindex_host_ipc = -1, | 52 | .irqindex_host_ipc = -1, |
| 49 | .chip_info = &jsl_chip_info, | 53 | .chip_info = &jsl_chip_info, |
| 54 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 55 | .ipc_default = SOF_IPC, | ||
| 50 | .default_fw_path = { | 56 | .default_fw_path = { |
| 51 | [SOF_IPC] = "intel/sof", | 57 | [SOF_IPC] = "intel/sof", |
| 58 | [SOF_INTEL_IPC4] = "intel/avs/jsl", | ||
| 52 | }, | 59 | }, |
| 53 | .default_tplg_path = { | 60 | .default_tplg_path = { |
| 54 | [SOF_IPC] = "intel/sof-tplg", | 61 | [SOF_IPC] = "intel/sof-tplg", |
| 62 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 55 | }, | 63 | }, |
| 56 | .default_fw_filename = "sof-jsl.ri", | 64 | .default_fw_filename = "sof-jsl.ri", |
| 57 | .nocodec_tplg_filename = "sof-jsl-nocodec.tplg", | 65 | .nocodec_tplg_filename = "sof-jsl-nocodec.tplg", |
| @@ -28,11 +28,15 @@ static const struct sof_dev_desc tgl_desc = { · 27 unmodified lines | |||
| 28 | .resindex_imr_base = -1, | 28 | .resindex_imr_base = -1, |
| 29 | .irqindex_host_ipc = -1, | 29 | .irqindex_host_ipc = -1, |
| 30 | .chip_info = &tgl_chip_info, | 30 | .chip_info = &tgl_chip_info, |
| 31 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 32 | .ipc_default = SOF_IPC, | ||
| 31 | .default_fw_path = { | 33 | .default_fw_path = { |
| 32 | [SOF_IPC] = "intel/sof", | 34 | [SOF_IPC] = "intel/sof", |
| 35 | [SOF_INTEL_IPC4] = "intel/avs/tgl", | ||
| 33 | }, | 36 | }, |
| 34 | .default_tplg_path = { | 37 | .default_tplg_path = { |
| 35 | [SOF_IPC] = "intel/sof-tplg", | 38 | [SOF_IPC] = "intel/sof-tplg", |
| 39 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 36 | }, | 40 | }, |
| 37 | .default_fw_filename = "sof-tgl.ri", | 41 | .default_fw_filename = "sof-tgl.ri", |
| 38 | .nocodec_tplg_filename = "sof-tgl-nocodec.tplg", | 42 | .nocodec_tplg_filename = "sof-tgl-nocodec.tplg", |
| @@ -48,11 +52,15 @@ static const struct sof_dev_desc tglh_desc = { · 9 unmodified lines | |||
| 48 | .resindex_imr_base = -1, | 52 | .resindex_imr_base = -1, |
| 49 | .irqindex_host_ipc = -1, | 53 | .irqindex_host_ipc = -1, |
| 50 | .chip_info = &tglh_chip_info, | 54 | .chip_info = &tglh_chip_info, |
| 55 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 56 | .ipc_default = SOF_IPC, | ||
| 51 | .default_fw_path = { | 57 | .default_fw_path = { |
| 52 | [SOF_IPC] = "intel/sof", | 58 | [SOF_IPC] = "intel/sof", |
| 59 | [SOF_INTEL_IPC4] = "intel/avs/tgl-h", | ||
| 53 | }, | 60 | }, |
| 54 | .default_tplg_path = { | 61 | .default_tplg_path = { |
| 55 | [SOF_IPC] = "intel/sof-tplg", | 62 | [SOF_IPC] = "intel/sof-tplg", |
| 63 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 56 | }, | 64 | }, |
| 57 | .default_fw_filename = "sof-tgl-h.ri", | 65 | .default_fw_filename = "sof-tgl-h.ri", |
| 58 | .nocodec_tplg_filename = "sof-tgl-nocodec.tplg", | 66 | .nocodec_tplg_filename = "sof-tgl-nocodec.tplg", |
| @@ -67,11 +75,15 @@ static const struct sof_dev_desc ehl_desc = { · 8 unmodified lines | |||
| 67 | .resindex_imr_base = -1, | 75 | .resindex_imr_base = -1, |
| 68 | .irqindex_host_ipc = -1, | 76 | .irqindex_host_ipc = -1, |
| 69 | .chip_info = &ehl_chip_info, | 77 | .chip_info = &ehl_chip_info, |
| 78 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 79 | .ipc_default = SOF_IPC, | ||
| 70 | .default_fw_path = { | 80 | .default_fw_path = { |
| 71 | [SOF_IPC] = "intel/sof", | 81 | [SOF_IPC] = "intel/sof", |
| 82 | [SOF_INTEL_IPC4] = "intel/avs/ehl", | ||
| 72 | }, | 83 | }, |
| 73 | .default_tplg_path = { | 84 | .default_tplg_path = { |
| 74 | [SOF_IPC] = "intel/sof-tplg", | 85 | [SOF_IPC] = "intel/sof-tplg", |
| 86 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 75 | }, | 87 | }, |
| 76 | .default_fw_filename = "sof-ehl.ri", | 88 | .default_fw_filename = "sof-ehl.ri", |
| 77 | .nocodec_tplg_filename = "sof-ehl-nocodec.tplg", | 89 | .nocodec_tplg_filename = "sof-ehl-nocodec.tplg", |
| @@ -87,11 +99,15 @@ static const struct sof_dev_desc adls_desc = { · 9 unmodified lines | |||
| 87 | .resindex_imr_base = -1, | 99 | .resindex_imr_base = -1, |
| 88 | .irqindex_host_ipc = -1, | 100 | .irqindex_host_ipc = -1, |
| 89 | .chip_info = &adls_chip_info, | 101 | .chip_info = &adls_chip_info, |
| 102 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 103 | .ipc_default = SOF_IPC, | ||
| 90 | .default_fw_path = { | 104 | .default_fw_path = { |
| 91 | [SOF_IPC] = "intel/sof", | 105 | [SOF_IPC] = "intel/sof", |
| 106 | [SOF_INTEL_IPC4] = "intel/avs/adl-s", | ||
| 92 | }, | 107 | }, |
| 93 | .default_tplg_path = { | 108 | .default_tplg_path = { |
| 94 | [SOF_IPC] = "intel/sof-tplg", | 109 | [SOF_IPC] = "intel/sof-tplg", |
| 110 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 95 | }, | 111 | }, |
| 96 | .default_fw_filename = "sof-adl-s.ri", | 112 | .default_fw_filename = "sof-adl-s.ri", |
| 97 | .nocodec_tplg_filename = "sof-adl-nocodec.tplg", | 113 | .nocodec_tplg_filename = "sof-adl-nocodec.tplg", |
| @@ -107,11 +123,15 @@ static const struct sof_dev_desc adl_desc = { · 9 unmodified lines | |||
| 107 | .resindex_imr_base = -1, | 123 | .resindex_imr_base = -1, |
| 108 | .irqindex_host_ipc = -1, | 124 | .irqindex_host_ipc = -1, |
| 109 | .chip_info = &tgl_chip_info, | 125 | .chip_info = &tgl_chip_info, |
| 126 | .ipc_supported_mask = BIT(SOF_IPC) | BIT(SOF_INTEL_IPC4), | ||
| 127 | .ipc_default = SOF_IPC, | ||
| 110 | .default_fw_path = { | 128 | .default_fw_path = { |
| 111 | [SOF_IPC] = "intel/sof", | 129 | [SOF_IPC] = "intel/sof", |
| 130 | [SOF_INTEL_IPC4] = "intel/avs/adl", | ||
| 112 | }, | 131 | }, |
| 113 | .default_tplg_path = { | 132 | .default_tplg_path = { |
| 114 | [SOF_IPC] = "intel/sof-tplg", | 133 | [SOF_IPC] = "intel/sof-tplg", |
| 134 | [SOF_INTEL_IPC4] = "intel/avs-tplg", | ||
| 115 | }, | 135 | }, |
| 116 | .default_fw_filename = "sof-adl.ri", | 136 | .default_fw_filename = "sof-adl.ri", |
| 117 | .nocodec_tplg_filename = "sof-adl-nocodec.tplg", | 137 | .nocodec_tplg_filename = "sof-adl-nocodec.tplg", |
| @@ -219,6 +219,8 @@ static const struct sof_dev_desc tng_desc = { · 218 unmodified lines | |||
| 219 | .resindex_imr_base = 0, | 219 | .resindex_imr_base = 0, |
| 220 | .irqindex_host_ipc = -1, | 220 | .irqindex_host_ipc = -1, |
| 221 | .chip_info = &tng_chip_info, | 221 | .chip_info = &tng_chip_info, |
| 222 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 223 | .ipc_default = SOF_IPC, | ||
| 222 | .default_fw_path = { | 224 | .default_fw_path = { |
| 223 | [SOF_IPC] = "intel/sof", | 225 | [SOF_IPC] = "intel/sof", |
| 224 | }, | 226 | }, |
| @@ -440,6 +440,8 @@ static const struct snd_sof_dsp_ops sof_mt8195_ops = { · 439 unmodified lines | |||
| 440 | }; | 440 | }; |
| 441 | 441 | ||
| 442 | static const struct sof_dev_desc sof_of_mt8195_desc = { | 442 | static const struct sof_dev_desc sof_of_mt8195_desc = { |
| 443 | .ipc_supported_mask = BIT(SOF_IPC), | ||
| 444 | .ipc_default = SOF_IPC, | ||
| 443 | .default_fw_path = { | 445 | .default_fw_path = { |
| 444 | [SOF_IPC] = "mediatek/sof", | 446 | [SOF_IPC] = "mediatek/sof", |
| 445 | }, | 447 | }, |