| @@ -3,7 +3,7 @@ · 2 unmodified lines |
| 3 | 3 | * turbostat -- show CPU frequency and C-state residency |
| 4 | 4 | * on modern Intel and AMD processors. |
| 5 | 5 | * |
| 6 | | − * Copyright (c) 2021 Intel Corporation. |
| 6 | + * Copyright (c) 2022 Intel Corporation. |
| 7 | 7 | * Len Brown <len.brown@intel.com> |
| 8 | 8 | */ |
| 9 | 9 | |
| @@ -37,6 +37,171 @@ · 27 unmodified lines |
| 37 | 37 | #include <asm/unistd.h> |
| 38 | 38 | #include <stdbool.h> |
| 39 | 39 | |
| 40 | +#define UNUSED(x) (void)(x) |
| 41 | + |
| 42 | +/* |
| 43 | + * This list matches the column headers, except |
| 44 | + * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time |
| 45 | + * 2. Core and CPU are moved to the end, we can't have strings that contain them |
| 46 | + * matching on them for --show and --hide. |
| 47 | + */ |
| 48 | + |
| 49 | +/* |
| 50 | + * buffer size used by sscanf() for added column names |
| 51 | + * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters |
| 52 | + */ |
| 53 | +#define NAME_BYTES 20 |
| 54 | +#define PATH_BYTES 128 |
| 55 | + |
| 56 | +enum counter_scope { SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE }; |
| 57 | +enum counter_type { COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC }; |
| 58 | +enum counter_format { FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT }; |
| 59 | + |
| 60 | +struct msr_counter { |
| 61 | + unsigned int msr_num; |
| 62 | + char name[NAME_BYTES]; |
| 63 | + char path[PATH_BYTES]; |
| 64 | + unsigned int width; |
| 65 | + enum counter_type type; |
| 66 | + enum counter_format format; |
| 67 | + struct msr_counter *next; |
| 68 | + unsigned int flags; |
| 69 | +#define FLAGS_HIDE (1 << 0) |
| 70 | +#define FLAGS_SHOW (1 << 1) |
| 71 | +#define SYSFS_PERCPU (1 << 1) |
| 72 | +}; |
| 73 | + |
| 74 | +struct msr_counter bic[] = { |
| 75 | + { 0x0, "usec", "", 0, 0, 0, NULL, 0 }, |
| 76 | + { 0x0, "Time_Of_Day_Seconds", "", 0, 0, 0, NULL, 0 }, |
| 77 | + { 0x0, "Package", "", 0, 0, 0, NULL, 0 }, |
| 78 | + { 0x0, "Node", "", 0, 0, 0, NULL, 0 }, |
| 79 | + { 0x0, "Avg_MHz", "", 0, 0, 0, NULL, 0 }, |
| 80 | + { 0x0, "Busy%", "", 0, 0, 0, NULL, 0 }, |
| 81 | + { 0x0, "Bzy_MHz", "", 0, 0, 0, NULL, 0 }, |
| 82 | + { 0x0, "TSC_MHz", "", 0, 0, 0, NULL, 0 }, |
| 83 | + { 0x0, "IRQ", "", 0, 0, 0, NULL, 0 }, |
| 84 | + { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL, 0 }, |
| 85 | + { 0x0, "sysfs", "", 0, 0, 0, NULL, 0 }, |
| 86 | + { 0x0, "CPU%c1", "", 0, 0, 0, NULL, 0 }, |
| 87 | + { 0x0, "CPU%c3", "", 0, 0, 0, NULL, 0 }, |
| 88 | + { 0x0, "CPU%c6", "", 0, 0, 0, NULL, 0 }, |
| 89 | + { 0x0, "CPU%c7", "", 0, 0, 0, NULL, 0 }, |
| 90 | + { 0x0, "ThreadC", "", 0, 0, 0, NULL, 0 }, |
| 91 | + { 0x0, "CoreTmp", "", 0, 0, 0, NULL, 0 }, |
| 92 | + { 0x0, "CoreCnt", "", 0, 0, 0, NULL, 0 }, |
| 93 | + { 0x0, "PkgTmp", "", 0, 0, 0, NULL, 0 }, |
| 94 | + { 0x0, "GFX%rc6", "", 0, 0, 0, NULL, 0 }, |
| 95 | + { 0x0, "GFXMHz", "", 0, 0, 0, NULL, 0 }, |
| 96 | + { 0x0, "Pkg%pc2", "", 0, 0, 0, NULL, 0 }, |
| 97 | + { 0x0, "Pkg%pc3", "", 0, 0, 0, NULL, 0 }, |
| 98 | + { 0x0, "Pkg%pc6", "", 0, 0, 0, NULL, 0 }, |
| 99 | + { 0x0, "Pkg%pc7", "", 0, 0, 0, NULL, 0 }, |
| 100 | + { 0x0, "Pkg%pc8", "", 0, 0, 0, NULL, 0 }, |
| 101 | + { 0x0, "Pkg%pc9", "", 0, 0, 0, NULL, 0 }, |
| 102 | + { 0x0, "Pk%pc10", "", 0, 0, 0, NULL, 0 }, |
| 103 | + { 0x0, "CPU%LPI", "", 0, 0, 0, NULL, 0 }, |
| 104 | + { 0x0, "SYS%LPI", "", 0, 0, 0, NULL, 0 }, |
| 105 | + { 0x0, "PkgWatt", "", 0, 0, 0, NULL, 0 }, |
| 106 | + { 0x0, "CorWatt", "", 0, 0, 0, NULL, 0 }, |
| 107 | + { 0x0, "GFXWatt", "", 0, 0, 0, NULL, 0 }, |
| 108 | + { 0x0, "PkgCnt", "", 0, 0, 0, NULL, 0 }, |
| 109 | + { 0x0, "RAMWatt", "", 0, 0, 0, NULL, 0 }, |
| 110 | + { 0x0, "PKG_%", "", 0, 0, 0, NULL, 0 }, |
| 111 | + { 0x0, "RAM_%", "", 0, 0, 0, NULL, 0 }, |
| 112 | + { 0x0, "Pkg_J", "", 0, 0, 0, NULL, 0 }, |
| 113 | + { 0x0, "Cor_J", "", 0, 0, 0, NULL, 0 }, |
| 114 | + { 0x0, "GFX_J", "", 0, 0, 0, NULL, 0 }, |
| 115 | + { 0x0, "RAM_J", "", 0, 0, 0, NULL, 0 }, |
| 116 | + { 0x0, "Mod%c6", "", 0, 0, 0, NULL, 0 }, |
| 117 | + { 0x0, "Totl%C0", "", 0, 0, 0, NULL, 0 }, |
| 118 | + { 0x0, "Any%C0", "", 0, 0, 0, NULL, 0 }, |
| 119 | + { 0x0, "GFX%C0", "", 0, 0, 0, NULL, 0 }, |
| 120 | + { 0x0, "CPUGFX%", "", 0, 0, 0, NULL, 0 }, |
| 121 | + { 0x0, "Core", "", 0, 0, 0, NULL, 0 }, |
| 122 | + { 0x0, "CPU", "", 0, 0, 0, NULL, 0 }, |
| 123 | + { 0x0, "APIC", "", 0, 0, 0, NULL, 0 }, |
| 124 | + { 0x0, "X2APIC", "", 0, 0, 0, NULL, 0 }, |
| 125 | + { 0x0, "Die", "", 0, 0, 0, NULL, 0 }, |
| 126 | + { 0x0, "GFXAMHz", "", 0, 0, 0, NULL, 0 }, |
| 127 | + { 0x0, "IPC", "", 0, 0, 0, NULL, 0 }, |
| 128 | + { 0x0, "CoreThr", "", 0, 0, 0, NULL, 0 }, |
| 129 | +}; |
| 130 | + |
| 131 | +#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter)) |
| 132 | +#define BIC_USEC (1ULL << 0) |
| 133 | +#define BIC_TOD (1ULL << 1) |
| 134 | +#define BIC_Package (1ULL << 2) |
| 135 | +#define BIC_Node (1ULL << 3) |
| 136 | +#define BIC_Avg_MHz (1ULL << 4) |
| 137 | +#define BIC_Busy (1ULL << 5) |
| 138 | +#define BIC_Bzy_MHz (1ULL << 6) |
| 139 | +#define BIC_TSC_MHz (1ULL << 7) |
| 140 | +#define BIC_IRQ (1ULL << 8) |
| 141 | +#define BIC_SMI (1ULL << 9) |
| 142 | +#define BIC_sysfs (1ULL << 10) |
| 143 | +#define BIC_CPU_c1 (1ULL << 11) |
| 144 | +#define BIC_CPU_c3 (1ULL << 12) |
| 145 | +#define BIC_CPU_c6 (1ULL << 13) |
| 146 | +#define BIC_CPU_c7 (1ULL << 14) |
| 147 | +#define BIC_ThreadC (1ULL << 15) |
| 148 | +#define BIC_CoreTmp (1ULL << 16) |
| 149 | +#define BIC_CoreCnt (1ULL << 17) |
| 150 | +#define BIC_PkgTmp (1ULL << 18) |
| 151 | +#define BIC_GFX_rc6 (1ULL << 19) |
| 152 | +#define BIC_GFXMHz (1ULL << 20) |
| 153 | +#define BIC_Pkgpc2 (1ULL << 21) |
| 154 | +#define BIC_Pkgpc3 (1ULL << 22) |
| 155 | +#define BIC_Pkgpc6 (1ULL << 23) |
| 156 | +#define BIC_Pkgpc7 (1ULL << 24) |
| 157 | +#define BIC_Pkgpc8 (1ULL << 25) |
| 158 | +#define BIC_Pkgpc9 (1ULL << 26) |
| 159 | +#define BIC_Pkgpc10 (1ULL << 27) |
| 160 | +#define BIC_CPU_LPI (1ULL << 28) |
| 161 | +#define BIC_SYS_LPI (1ULL << 29) |
| 162 | +#define BIC_PkgWatt (1ULL << 30) |
| 163 | +#define BIC_CorWatt (1ULL << 31) |
| 164 | +#define BIC_GFXWatt (1ULL << 32) |
| 165 | +#define BIC_PkgCnt (1ULL << 33) |
| 166 | +#define BIC_RAMWatt (1ULL << 34) |
| 167 | +#define BIC_PKG__ (1ULL << 35) |
| 168 | +#define BIC_RAM__ (1ULL << 36) |
| 169 | +#define BIC_Pkg_J (1ULL << 37) |
| 170 | +#define BIC_Cor_J (1ULL << 38) |
| 171 | +#define BIC_GFX_J (1ULL << 39) |
| 172 | +#define BIC_RAM_J (1ULL << 40) |
| 173 | +#define BIC_Mod_c6 (1ULL << 41) |
| 174 | +#define BIC_Totl_c0 (1ULL << 42) |
| 175 | +#define BIC_Any_c0 (1ULL << 43) |
| 176 | +#define BIC_GFX_c0 (1ULL << 44) |
| 177 | +#define BIC_CPUGFX (1ULL << 45) |
| 178 | +#define BIC_Core (1ULL << 46) |
| 179 | +#define BIC_CPU (1ULL << 47) |
| 180 | +#define BIC_APIC (1ULL << 48) |
| 181 | +#define BIC_X2APIC (1ULL << 49) |
| 182 | +#define BIC_Die (1ULL << 50) |
| 183 | +#define BIC_GFXACTMHz (1ULL << 51) |
| 184 | +#define BIC_IPC (1ULL << 52) |
| 185 | +#define BIC_CORE_THROT_CNT (1ULL << 53) |
| 186 | + |
| 187 | +#define BIC_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die ) |
| 188 | +#define BIC_THERMAL_PWR ( BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__) |
| 189 | +#define BIC_FREQUENCY ( BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz ) |
| 190 | +#define BIC_IDLE ( BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX) |
| 191 | +#define BIC_OTHER ( BIC_IRQ | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC) |
| 192 | + |
| 193 | +#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC) |
| 194 | + |
| 195 | +unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT); |
| 196 | +unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC; |
| 197 | + |
| 198 | +#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME) |
| 199 | +#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME) |
| 200 | +#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME) |
| 201 | +#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT) |
| 202 | +#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT) |
| 203 | +#define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT) |
| 204 | + |
| 40 | 205 | char *proc_stat = "/proc/stat"; |
| 41 | 206 | FILE *outf; |
| 42 | 207 | int *fd_percpu; |
| @@ -48,6 +213,7 @@ struct timespec interval_ts = { 5, 0 }; · 5 unmodified lines |
| 48 | 213 | unsigned int model_orig; |
| 49 | 214 | |
| 50 | 215 | unsigned int num_iterations; |
| 216 | +unsigned int header_iterations; |
| 51 | 217 | unsigned int debug; |
| 52 | 218 | unsigned int quiet; |
| 53 | 219 | unsigned int shown; |
| @@ -159,13 +325,6 @@ int ignore_stdin; · 105 unmodified lines |
| 159 | 325 | |
| 160 | 326 | #define MAX(a, b) ((a) > (b) ? (a) : (b)) |
| 161 | 327 | |
| 162 | | −/* |
| 163 | | − * buffer size used by sscanf() for added column names |
| 164 | | − * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters |
| 165 | | − */ |
| 166 | | −#define NAME_BYTES 20 |
| 167 | | −#define PATH_BYTES 128 |
| 168 | | − |
| 169 | 328 | int backwards_count; |
| 170 | 329 | char *progname; |
| 171 | 330 | |
| @@ -205,6 +364,7 @@ struct core_data { · 33 unmodified lines |
| 205 | 364 | unsigned int core_temp_c; |
| 206 | 365 | unsigned int core_energy; /* MSR_CORE_ENERGY_STAT */ |
| 207 | 366 | unsigned int core_id; |
| 367 | + unsigned long long core_throt_cnt; |
| 208 | 368 | unsigned long long counter[MAX_ADDED_COUNTERS]; |
| 209 | 369 | } *core_even, *core_odd; |
| 210 | 370 | |
| @@ -255,24 +415,6 @@ struct pkg_data { · 44 unmodified lines |
| 255 | 415 | |
| 256 | 416 | #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no) |
| 257 | 417 | |
| 258 | | −enum counter_scope { SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE }; |
| 259 | | −enum counter_type { COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC }; |
| 260 | | −enum counter_format { FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT }; |
| 261 | | − |
| 262 | | −struct msr_counter { |
| 263 | | − unsigned int msr_num; |
| 264 | | − char name[NAME_BYTES]; |
| 265 | | − char path[PATH_BYTES]; |
| 266 | | − unsigned int width; |
| 267 | | − enum counter_type type; |
| 268 | | − enum counter_format format; |
| 269 | | − struct msr_counter *next; |
| 270 | | − unsigned int flags; |
| 271 | | −#define FLAGS_HIDE (1 << 0) |
| 272 | | −#define FLAGS_SHOW (1 << 1) |
| 273 | | −#define SYSFS_PERCPU (1 << 1) |
| 274 | | −}; |
| 275 | | − |
| 276 | 418 | /* |
| 277 | 419 | * The accumulated sum of MSR is defined as a monotonic |
| 278 | 420 | * increasing MSR, it will be accumulated periodically, |
| @@ -522,8 +664,10 @@ static int perf_instr_count_open(int cpu_num) · 243 unmodified lines |
| 522 | 664 | |
| 523 | 665 | /* counter for cpu_num, including user + kernel and all processes */ |
| 524 | 666 | fd = perf_event_open(&pea, -1, cpu_num, -1, 0); |
| 525 | | − if (fd == -1) |
| 526 | | − err(-1, "cpu%d: perf instruction counter\n", cpu_num); |
| 667 | + if (fd == -1) { |
| 668 | + warn("cpu%d: perf instruction counter", cpu_num); |
| 669 | + BIC_NOT_PRESENT(BIC_IPC); |
| 670 | + } |
| 527 | 671 | |
| 528 | 672 | return fd; |
| 529 | 673 | } |
| @@ -550,143 +694,10 @@ int get_msr(int cpu, off_t offset, unsigned long long *msr) · 20 unmodified lines |
| 550 | 694 | return 0; |
| 551 | 695 | } |
| 552 | 696 | |
| 553 | | −/* |
| 554 | | − * This list matches the column headers, except |
| 555 | | − * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time |
| 556 | | − * 2. Core and CPU are moved to the end, we can't have strings that contain them |
| 557 | | − * matching on them for --show and --hide. |
| 558 | | − */ |
| 559 | | −struct msr_counter bic[] = { |
| 560 | | − { 0x0, "usec" }, |
| 561 | | − { 0x0, "Time_Of_Day_Seconds" }, |
| 562 | | − { 0x0, "Package" }, |
| 563 | | − { 0x0, "Node" }, |
| 564 | | − { 0x0, "Avg_MHz" }, |
| 565 | | − { 0x0, "Busy%" }, |
| 566 | | − { 0x0, "Bzy_MHz" }, |
| 567 | | − { 0x0, "TSC_MHz" }, |
| 568 | | − { 0x0, "IRQ" }, |
| 569 | | − { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL }, |
| 570 | | − { 0x0, "sysfs" }, |
| 571 | | − { 0x0, "CPU%c1" }, |
| 572 | | − { 0x0, "CPU%c3" }, |
| 573 | | − { 0x0, "CPU%c6" }, |
| 574 | | − { 0x0, "CPU%c7" }, |
| 575 | | − { 0x0, "ThreadC" }, |
| 576 | | − { 0x0, "CoreTmp" }, |
| 577 | | − { 0x0, "CoreCnt" }, |
| 578 | | − { 0x0, "PkgTmp" }, |
| 579 | | − { 0x0, "GFX%rc6" }, |
| 580 | | − { 0x0, "GFXMHz" }, |
| 581 | | − { 0x0, "Pkg%pc2" }, |
| 582 | | − { 0x0, "Pkg%pc3" }, |
| 583 | | − { 0x0, "Pkg%pc6" }, |
| 584 | | − { 0x0, "Pkg%pc7" }, |
| 585 | | − { 0x0, "Pkg%pc8" }, |
| 586 | | − { 0x0, "Pkg%pc9" }, |
| 587 | | − { 0x0, "Pk%pc10" }, |
| 588 | | − { 0x0, "CPU%LPI" }, |
| 589 | | − { 0x0, "SYS%LPI" }, |
| 590 | | − { 0x0, "PkgWatt" }, |
| 591 | | − { 0x0, "CorWatt" }, |
| 592 | | − { 0x0, "GFXWatt" }, |
| 593 | | − { 0x0, "PkgCnt" }, |
| 594 | | − { 0x0, "RAMWatt" }, |
| 595 | | − { 0x0, "PKG_%" }, |
| 596 | | − { 0x0, "RAM_%" }, |
| 597 | | − { 0x0, "Pkg_J" }, |
| 598 | | − { 0x0, "Cor_J" }, |
| 599 | | − { 0x0, "GFX_J" }, |
| 600 | | − { 0x0, "RAM_J" }, |
| 601 | | − { 0x0, "Mod%c6" }, |
| 602 | | − { 0x0, "Totl%C0" }, |
| 603 | | − { 0x0, "Any%C0" }, |
| 604 | | − { 0x0, "GFX%C0" }, |
| 605 | | − { 0x0, "CPUGFX%" }, |
| 606 | | − { 0x0, "Core" }, |
| 607 | | − { 0x0, "CPU" }, |
| 608 | | − { 0x0, "APIC" }, |
| 609 | | − { 0x0, "X2APIC" }, |
| 610 | | − { 0x0, "Die" }, |
| 611 | | − { 0x0, "GFXAMHz" }, |
| 612 | | − { 0x0, "IPC" }, |
| 613 | | −}; |
| 614 | | − |
| 615 | | −#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter)) |
| 616 | | −#define BIC_USEC (1ULL << 0) |
| 617 | | −#define BIC_TOD (1ULL << 1) |
| 618 | | −#define BIC_Package (1ULL << 2) |
| 619 | | −#define BIC_Node (1ULL << 3) |
| 620 | | −#define BIC_Avg_MHz (1ULL << 4) |
| 621 | | −#define BIC_Busy (1ULL << 5) |
| 622 | | −#define BIC_Bzy_MHz (1ULL << 6) |
| 623 | | −#define BIC_TSC_MHz (1ULL << 7) |
| 624 | | −#define BIC_IRQ (1ULL << 8) |
| 625 | | −#define BIC_SMI (1ULL << 9) |
| 626 | | −#define BIC_sysfs (1ULL << 10) |
| 627 | | −#define BIC_CPU_c1 (1ULL << 11) |
| 628 | | −#define BIC_CPU_c3 (1ULL << 12) |
| 629 | | −#define BIC_CPU_c6 (1ULL << 13) |
| 630 | | −#define BIC_CPU_c7 (1ULL << 14) |
| 631 | | −#define BIC_ThreadC (1ULL << 15) |
| 632 | | −#define BIC_CoreTmp (1ULL << 16) |
| 633 | | −#define BIC_CoreCnt (1ULL << 17) |
| 634 | | −#define BIC_PkgTmp (1ULL << 18) |
| 635 | | −#define BIC_GFX_rc6 (1ULL << 19) |
| 636 | | −#define BIC_GFXMHz (1ULL << 20) |
| 637 | | −#define BIC_Pkgpc2 (1ULL << 21) |
| 638 | | −#define BIC_Pkgpc3 (1ULL << 22) |
| 639 | | −#define BIC_Pkgpc6 (1ULL << 23) |
| 640 | | −#define BIC_Pkgpc7 (1ULL << 24) |
| 641 | | −#define BIC_Pkgpc8 (1ULL << 25) |
| 642 | | −#define BIC_Pkgpc9 (1ULL << 26) |
| 643 | | −#define BIC_Pkgpc10 (1ULL << 27) |
| 644 | | −#define BIC_CPU_LPI (1ULL << 28) |
| 645 | | −#define BIC_SYS_LPI (1ULL << 29) |
| 646 | | −#define BIC_PkgWatt (1ULL << 30) |
| 647 | | −#define BIC_CorWatt (1ULL << 31) |
| 648 | | −#define BIC_GFXWatt (1ULL << 32) |
| 649 | | −#define BIC_PkgCnt (1ULL << 33) |
| 650 | | −#define BIC_RAMWatt (1ULL << 34) |
| 651 | | −#define BIC_PKG__ (1ULL << 35) |
| 652 | | −#define BIC_RAM__ (1ULL << 36) |
| 653 | | −#define BIC_Pkg_J (1ULL << 37) |
| 654 | | −#define BIC_Cor_J (1ULL << 38) |
| 655 | | −#define BIC_GFX_J (1ULL << 39) |
| 656 | | −#define BIC_RAM_J (1ULL << 40) |
| 657 | | −#define BIC_Mod_c6 (1ULL << 41) |
| 658 | | −#define BIC_Totl_c0 (1ULL << 42) |
| 659 | | −#define BIC_Any_c0 (1ULL << 43) |
| 660 | | −#define BIC_GFX_c0 (1ULL << 44) |
| 661 | | −#define BIC_CPUGFX (1ULL << 45) |
| 662 | | −#define BIC_Core (1ULL << 46) |
| 663 | | −#define BIC_CPU (1ULL << 47) |
| 664 | | −#define BIC_APIC (1ULL << 48) |
| 665 | | −#define BIC_X2APIC (1ULL << 49) |
| 666 | | −#define BIC_Die (1ULL << 50) |
| 667 | | −#define BIC_GFXACTMHz (1ULL << 51) |
| 668 | | −#define BIC_IPC (1ULL << 52) |
| 669 | | − |
| 670 | | −#define BIC_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die ) |
| 671 | | −#define BIC_THERMAL_PWR ( BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__) |
| 672 | | −#define BIC_FREQUENCY ( BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz ) |
| 673 | | −#define BIC_IDLE ( BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX) |
| 674 | | −#define BIC_OTHER ( BIC_IRQ | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC) |
| 675 | | − |
| 676 | | −#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC) |
| 677 | | − |
| 678 | | −unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT); |
| 679 | | −unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC; |
| 680 | | − |
| 681 | | −#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME) |
| 682 | | −#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME) |
| 683 | | −#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME) |
| 684 | | −#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT) |
| 685 | | −#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT) |
| 686 | | −#define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT) |
| 687 | | − |
| 688 | 697 | #define MAX_DEFERRED 16 |
| 698 | +char *deferred_add_names[MAX_DEFERRED]; |
| 689 | 699 | char *deferred_skip_names[MAX_DEFERRED]; |
| 700 | +int deferred_add_index; |
| 690 | 701 | int deferred_skip_index; |
| 691 | 702 | |
| 692 | 703 | /* |
| @@ -720,6 +731,8 @@ void help(void) · 27 unmodified lines |
| 720 | 731 | " -l, --list list column headers only\n" |
| 721 | 732 | " -n, --num_iterations num\n" |
| 722 | 733 | " number of the measurement iterations\n" |
| 734 | + " -N, --header_iterations num\n" |
| 735 | + " print header every num iterations\n" |
| 723 | 736 | " -o, --out file\n" |
| 724 | 737 | " create or truncate \"file\" for all output\n" |
| 725 | 738 | " -q, --quiet skip decoding system configuration header\n" |
| @@ -741,7 +754,7 @@ void help(void) · 15 unmodified lines |
| 741 | 754 | */ |
| 742 | 755 | unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode) |
| 743 | 756 | { |
| 744 | | − int i; |
| 757 | + unsigned int i; |
| 745 | 758 | unsigned long long retval = 0; |
| 746 | 759 | |
| 747 | 760 | while (name_list) { |
| @@ -752,40 +765,51 @@ unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode) · 4 unmodified lines |
| 752 | 765 | if (comma) |
| 753 | 766 | *comma = '\0'; |
| 754 | 767 | |
| 755 | | − if (!strcmp(name_list, "all")) |
| 756 | | − return ~0; |
| 757 | | − if (!strcmp(name_list, "topology")) |
| 758 | | − return BIC_TOPOLOGY; |
| 759 | | − if (!strcmp(name_list, "power")) |
| 760 | | − return BIC_THERMAL_PWR; |
| 761 | | − if (!strcmp(name_list, "idle")) |
| 762 | | − return BIC_IDLE; |
| 763 | | − if (!strcmp(name_list, "frequency")) |
| 764 | | − return BIC_FREQUENCY; |
| 765 | | − if (!strcmp(name_list, "other")) |
| 766 | | − return BIC_OTHER; |
| 767 | | − if (!strcmp(name_list, "all")) |
| 768 | | − return 0; |
| 769 | | − |
| 770 | 768 | for (i = 0; i < MAX_BIC; ++i) { |
| 771 | 769 | if (!strcmp(name_list, bic[i].name)) { |
| 772 | 770 | retval |= (1ULL << i); |
| 773 | 771 | break; |
| 774 | 772 | } |
| 773 | + if (!strcmp(name_list, "all")) { |
| 774 | + retval |= ~0; |
| 775 | + break; |
| 776 | + } else if (!strcmp(name_list, "topology")) { |
| 777 | + retval |= BIC_TOPOLOGY; |
| 778 | + break; |
| 779 | + } else if (!strcmp(name_list, "power")) { |
| 780 | + retval |= BIC_THERMAL_PWR; |
| 781 | + break; |
| 782 | + } else if (!strcmp(name_list, "idle")) { |
| 783 | + retval |= BIC_IDLE; |
| 784 | + break; |
| 785 | + } else if (!strcmp(name_list, "frequency")) { |
| 786 | + retval |= BIC_FREQUENCY; |
| 787 | + break; |
| 788 | + } else if (!strcmp(name_list, "other")) { |
| 789 | + retval |= BIC_OTHER; |
| 790 | + break; |
| 791 | + } |
| 792 | + |
| 775 | 793 | } |
| 776 | 794 | if (i == MAX_BIC) { |
| 777 | 795 | if (mode == SHOW_LIST) { |
| 778 | | − fprintf(stderr, "Invalid counter name: %s\n", name_list); |
| 779 | | − exit(-1); |
| 780 | | − } |
| 781 | | − deferred_skip_names[deferred_skip_index++] = name_list; |
| 782 | | − if (debug) |
| 783 | | − fprintf(stderr, "deferred \"%s\"\n", name_list); |
| 784 | | − if (deferred_skip_index >= MAX_DEFERRED) { |
| 785 | | − fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n", |
| 786 | | − MAX_DEFERRED, name_list); |
| 787 | | − help(); |
| 788 | | − exit(1); |
| 796 | + deferred_add_names[deferred_add_index++] = name_list; |
| 797 | + if (deferred_add_index >= MAX_DEFERRED) { |
| 798 | + fprintf(stderr, "More than max %d un-recognized --add options '%s'\n", |
| 799 | + MAX_DEFERRED, name_list); |
| 800 | + help(); |
| 801 | + exit(1); |
| 802 | + } |
| 803 | + } else { |
| 804 | + deferred_skip_names[deferred_skip_index++] = name_list; |
| 805 | + if (debug) |
| 806 | + fprintf(stderr, "deferred \"%s\"\n", name_list); |
| 807 | + if (deferred_skip_index >= MAX_DEFERRED) { |
| 808 | + fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n", |
| 809 | + MAX_DEFERRED, name_list); |
| 810 | + help(); |
| 811 | + exit(1); |
| 812 | + } |
| 789 | 813 | } |
| 790 | 814 | } |
| 791 | 815 | |
| @@ -872,6 +896,9 @@ void print_header(char *delim) · 80 unmodified lines |
| 872 | 896 | if (DO_BIC(BIC_CoreTmp)) |
| 873 | 897 | outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : "")); |
| 874 | 898 | |
| 899 | + if (DO_BIC(BIC_CORE_THROT_CNT)) |
| 900 | + outp += sprintf(outp, "%sCoreThr", (printed++ ? delim : "")); |
| 901 | + |
| 875 | 902 | if (do_rapl && !rapl_joules) { |
| 876 | 903 | if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY)) |
| 877 | 904 | outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : "")); |
| @@ -1011,6 +1038,7 @@ int dump_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p · 133 unmodified lines |
| 1011 | 1038 | outp += sprintf(outp, "c6: %016llX\n", c->c6); |
| 1012 | 1039 | outp += sprintf(outp, "c7: %016llX\n", c->c7); |
| 1013 | 1040 | outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c); |
| 1041 | + outp += sprintf(outp, "cpu_throt_count: %016llX\n", c->core_throt_cnt); |
| 1014 | 1042 | outp += sprintf(outp, "Joules: %0X\n", c->core_energy); |
| 1015 | 1043 | |
| 1016 | 1044 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { |
| @@ -1225,6 +1253,10 @@ int format_counters(struct thread_data *t, struct core_data *c, struct pkg_data · 208 unmodified lines |
| 1225 | 1253 | if (DO_BIC(BIC_CoreTmp)) |
| 1226 | 1254 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c); |
| 1227 | 1255 | |
| 1256 | + /* Core throttle count */ |
| 1257 | + if (DO_BIC(BIC_CORE_THROT_CNT)) |
| 1258 | + outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->core_throt_cnt); |
| 1259 | + |
| 1228 | 1260 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { |
| 1229 | 1261 | if (mp->format == FORMAT_RAW) { |
| 1230 | 1262 | if (mp->width == 32) |
| @@ -1311,6 +1343,7 @@ int format_counters(struct thread_data *t, struct core_data *c, struct pkg_data · 80 unmodified lines |
| 1311 | 1343 | if (DO_BIC(BIC_PkgWatt)) |
| 1312 | 1344 | outp += |
| 1313 | 1345 | sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float); |
| 1346 | + |
| 1314 | 1347 | if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY)) |
| 1315 | 1348 | outp += |
| 1316 | 1349 | sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float); |
| @@ -1386,14 +1419,14 @@ void flush_output_stderr(void) · 69 unmodified lines |
| 1386 | 1419 | |
| 1387 | 1420 | void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) |
| 1388 | 1421 | { |
| 1389 | | − static int printed; |
| 1422 | + static int count; |
| 1390 | 1423 | |
| 1391 | | − if (!printed || !summary_only) |
| 1424 | + if ((!count || (header_iterations && !(count % header_iterations))) || !summary_only) |
| 1392 | 1425 | print_header("\t"); |
| 1393 | 1426 | |
| 1394 | 1427 | format_counters(&average.threads, &average.cores, &average.packages); |
| 1395 | 1428 | |
| 1396 | | − printed = 1; |
| 1429 | + count++; |
| 1397 | 1430 | |
| 1398 | 1431 | if (summary_only) |
| 1399 | 1432 | return; |
| @@ -1467,6 +1500,7 @@ void delta_core(struct core_data *new, struct core_data *old) · 67 unmodified lines |
| 1467 | 1500 | old->c6 = new->c6 - old->c6; |
| 1468 | 1501 | old->c7 = new->c7 - old->c7; |
| 1469 | 1502 | old->core_temp_c = new->core_temp_c; |
| 1503 | + old->core_throt_cnt = new->core_throt_cnt; |
| 1470 | 1504 | old->mc6_us = new->mc6_us - old->mc6_us; |
| 1471 | 1505 | |
| 1472 | 1506 | DELTA_WRAP32(new->core_energy, old->core_energy); |
| @@ -1626,6 +1660,7 @@ void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data · 153 unmodified lines |
| 1626 | 1660 | c->mc6_us = 0; |
| 1627 | 1661 | c->core_temp_c = 0; |
| 1628 | 1662 | c->core_energy = 0; |
| 1663 | + c->core_throt_cnt = 0; |
| 1629 | 1664 | |
| 1630 | 1665 | p->pkg_wtd_core_c0 = 0; |
| 1631 | 1666 | p->pkg_any_core_c0 = 0; |
| @@ -1710,6 +1745,7 @@ int sum_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) · 78 unmodified lines |
| 1710 | 1745 | average.cores.mc6_us += c->mc6_us; |
| 1711 | 1746 | |
| 1712 | 1747 | average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c); |
| 1748 | + average.cores.core_throt_cnt = MAX(average.cores.core_throt_cnt, c->core_throt_cnt); |
| 1713 | 1749 | |
| 1714 | 1750 | average.cores.core_energy += c->core_energy; |
| 1715 | 1751 | |
| @@ -1987,6 +2023,26 @@ void get_apic_id(struct thread_data *t) · 271 unmodified lines |
| 1987 | 2023 | fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n", t->cpu_id, t->apic_id, t->x2apic_id); |
| 1988 | 2024 | } |
| 1989 | 2025 | |
| 2026 | +int get_core_throt_cnt(int cpu, unsigned long long *cnt) |
| 2027 | +{ |
| 2028 | + char path[128 + PATH_BYTES]; |
| 2029 | + unsigned long long tmp; |
| 2030 | + FILE *fp; |
| 2031 | + int ret; |
| 2032 | + |
| 2033 | + sprintf(path, "/sys/devices/system/cpu/cpu%d/thermal_throttle/core_throttle_count", cpu); |
| 2034 | + fp = fopen(path, "r"); |
| 2035 | + if (!fp) |
| 2036 | + return -1; |
| 2037 | + ret = fscanf(fp, "%lld", &tmp); |
| 2038 | + if (ret != 1) |
| 2039 | + return -1; |
| 2040 | + fclose(fp); |
| 2041 | + *cnt = tmp; |
| 2042 | + |
| 2043 | + return 0; |
| 2044 | +} |
| 2045 | + |
| 1990 | 2046 | /* |
| 1991 | 2047 | * get_counters(...) |
| 1992 | 2048 | * migrate to cpu |
| @@ -2129,6 +2185,9 @@ retry: · 136 unmodified lines |
| 2129 | 2185 | c->core_temp_c = tj_max - ((msr >> 16) & 0x7F); |
| 2130 | 2186 | } |
| 2131 | 2187 | |
| 2188 | + if (DO_BIC(BIC_CORE_THROT_CNT)) |
| 2189 | + get_core_throt_cnt(cpu, &c->core_throt_cnt); |
| 2190 | + |
| 2132 | 2191 | if (do_rapl & RAPL_AMD_F17H) { |
| 2133 | 2192 | if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr)) |
| 2134 | 2193 | return -14; |
| @@ -2428,6 +2487,9 @@ int has_turbo_ratio_group_limits(int family, int model) · 293 unmodified lines |
| 2428 | 2487 | if (!genuine_intel) |
| 2429 | 2488 | return 0; |
| 2430 | 2489 | |
| 2490 | + if (family != 6) |
| 2491 | + return 0; |
| 2492 | + |
| 2431 | 2493 | switch (model) { |
| 2432 | 2494 | case INTEL_FAM6_ATOM_GOLDMONT: |
| 2433 | 2495 | case INTEL_FAM6_SKYLAKE_X: |
| @@ -2435,8 +2497,9 @@ int has_turbo_ratio_group_limits(int family, int model) · 1 unmodified line |
| 2435 | 2497 | case INTEL_FAM6_ATOM_GOLDMONT_D: |
| 2436 | 2498 | case INTEL_FAM6_ATOM_TREMONT_D: |
| 2437 | 2499 | return 1; |
| 2500 | + default: |
| 2501 | + return 0; |
| 2438 | 2502 | } |
| 2439 | | − return 0; |
| 2440 | 2503 | } |
| 2441 | 2504 | |
| 2442 | 2505 | static void dump_turbo_ratio_limits(int family, int model) |
| @@ -3027,6 +3090,8 @@ void set_max_cpu_num(void) · 584 unmodified lines |
| 3027 | 3090 | */ |
| 3028 | 3091 | int count_cpus(int cpu) |
| 3029 | 3092 | { |
| 3093 | + UNUSED(cpu); |
| 3094 | + |
| 3030 | 3095 | topo.num_cpus++; |
| 3031 | 3096 | return 0; |
| 3032 | 3097 | } |
| @@ -3361,6 +3426,9 @@ static int update_msr_sum(struct thread_data *t, struct core_data *c, struct pkg · 328 unmodified lines |
| 3361 | 3426 | int i, ret; |
| 3362 | 3427 | int cpu = t->cpu_id; |
| 3363 | 3428 | |
| 3429 | + UNUSED(c); |
| 3430 | + UNUSED(p); |
| 3431 | + |
| 3364 | 3432 | for (i = IDX_PKG_ENERGY; i < IDX_COUNT; i++) { |
| 3365 | 3433 | unsigned long long msr_cur, msr_last; |
| 3366 | 3434 | off_t offset; |
| @@ -3387,6 +3455,8 @@ static int update_msr_sum(struct thread_data *t, struct core_data *c, struct pkg · 20 unmodified lines |
| 3387 | 3455 | |
| 3388 | 3456 | static void msr_record_handler(union sigval v) |
| 3389 | 3457 | { |
| 3458 | + UNUSED(v); |
| 3459 | + |
| 3390 | 3460 | for_all_cpus(update_msr_sum, EVEN_COUNTERS); |
| 3391 | 3461 | } |
| 3392 | 3462 | |
| @@ -3439,6 +3509,9 @@ release_msr: · 46 unmodified lines |
| 3439 | 3509 | /* |
| 3440 | 3510 | * set_my_sched_priority(pri) |
| 3441 | 3511 | * return previous |
| 3512 | + * |
| 3513 | + * if non-root, do this: |
| 3514 | + * # /sbin/setcap cap_sys_rawio,cap_sys_nice=+ep /usr/bin/turbostat |
| 3442 | 3515 | */ |
| 3443 | 3516 | int set_my_sched_priority(int priority) |
| 3444 | 3517 | { |
| @@ -3457,7 +3530,7 @@ int set_my_sched_priority(int priority) · 12 unmodified lines |
| 3457 | 3530 | errno = 0; |
| 3458 | 3531 | retval = getpriority(PRIO_PROCESS, 0); |
| 3459 | 3532 | if (retval != priority) |
| 3460 | | − err(-1, "getpriority(%d) != setpriority(%d)", retval, priority); |
| 3533 | + err(retval, "getpriority(%d) != setpriority(%d)", retval, priority); |
| 3461 | 3534 | |
| 3462 | 3535 | return original_priority; |
| 3463 | 3536 | } |
| @@ -3466,7 +3539,7 @@ void turbostat_loop() · 2 unmodified lines |
| 3466 | 3539 | { |
| 3467 | 3540 | int retval; |
| 3468 | 3541 | int restarted = 0; |
| 3469 | | − int done_iters = 0; |
| 3542 | + unsigned int done_iters = 0; |
| 3470 | 3543 | |
| 3471 | 3544 | setup_signal_handler(); |
| 3472 | 3545 | |
| @@ -3678,6 +3751,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model) · 205 unmodified lines |
| 3678 | 3751 | break; |
| 3679 | 3752 | case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */ |
| 3680 | 3753 | no_MSR_MISC_PWR_MGMT = 1; |
| 3754 | + /* FALLTHRU */ |
| 3681 | 3755 | case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */ |
| 3682 | 3756 | pkg_cstate_limits = slv_pkg_cstate_limits; |
| 3683 | 3757 | break; |
| @@ -3721,6 +3795,9 @@ int has_slv_msrs(unsigned int family, unsigned int model) · 37 unmodified lines |
| 3721 | 3795 | if (!genuine_intel) |
| 3722 | 3796 | return 0; |
| 3723 | 3797 | |
| 3798 | + if (family != 6) |
| 3799 | + return 0; |
| 3800 | + |
| 3724 | 3801 | switch (model) { |
| 3725 | 3802 | case INTEL_FAM6_ATOM_SILVERMONT: |
| 3726 | 3803 | case INTEL_FAM6_ATOM_SILVERMONT_MID: |
| @@ -3736,6 +3813,9 @@ int is_dnv(unsigned int family, unsigned int model) · 9 unmodified lines |
| 3736 | 3813 | if (!genuine_intel) |
| 3737 | 3814 | return 0; |
| 3738 | 3815 | |
| 3816 | + if (family != 6) |
| 3817 | + return 0; |
| 3818 | + |
| 3739 | 3819 | switch (model) { |
| 3740 | 3820 | case INTEL_FAM6_ATOM_GOLDMONT_D: |
| 3741 | 3821 | return 1; |
| @@ -3749,6 +3829,9 @@ int is_bdx(unsigned int family, unsigned int model) · 7 unmodified lines |
| 3749 | 3829 | if (!genuine_intel) |
| 3750 | 3830 | return 0; |
| 3751 | 3831 | |
| 3832 | + if (family != 6) |
| 3833 | + return 0; |
| 3834 | + |
| 3752 | 3835 | switch (model) { |
| 3753 | 3836 | case INTEL_FAM6_BROADWELL_X: |
| 3754 | 3837 | return 1; |
| @@ -3762,6 +3845,9 @@ int is_skx(unsigned int family, unsigned int model) · 7 unmodified lines |
| 3762 | 3845 | if (!genuine_intel) |
| 3763 | 3846 | return 0; |
| 3764 | 3847 | |
| 3848 | + if (family != 6) |
| 3849 | + return 0; |
| 3850 | + |
| 3765 | 3851 | switch (model) { |
| 3766 | 3852 | case INTEL_FAM6_SKYLAKE_X: |
| 3767 | 3853 | return 1; |
| @@ -3775,6 +3861,9 @@ int is_icx(unsigned int family, unsigned int model) · 7 unmodified lines |
| 3775 | 3861 | if (!genuine_intel) |
| 3776 | 3862 | return 0; |
| 3777 | 3863 | |
| 3864 | + if (family != 6) |
| 3865 | + return 0; |
| 3866 | + |
| 3778 | 3867 | switch (model) { |
| 3779 | 3868 | case INTEL_FAM6_ICELAKE_X: |
| 3780 | 3869 | return 1; |
| @@ -3787,6 +3876,9 @@ int is_ehl(unsigned int family, unsigned int model) · 6 unmodified lines |
| 3787 | 3876 | if (!genuine_intel) |
| 3788 | 3877 | return 0; |
| 3789 | 3878 | |
| 3879 | + if (family != 6) |
| 3880 | + return 0; |
| 3881 | + |
| 3790 | 3882 | switch (model) { |
| 3791 | 3883 | case INTEL_FAM6_ATOM_TREMONT: |
| 3792 | 3884 | return 1; |
| @@ -3799,6 +3891,9 @@ int is_jvl(unsigned int family, unsigned int model) · 6 unmodified lines |
| 3799 | 3891 | if (!genuine_intel) |
| 3800 | 3892 | return 0; |
| 3801 | 3893 | |
| 3894 | + if (family != 6) |
| 3895 | + return 0; |
| 3896 | + |
| 3802 | 3897 | switch (model) { |
| 3803 | 3898 | case INTEL_FAM6_ATOM_TREMONT_D: |
| 3804 | 3899 | return 1; |
| @@ -3811,6 +3906,9 @@ int has_turbo_ratio_limit(unsigned int family, unsigned int model) · 6 unmodified lines |
| 3811 | 3906 | if (has_slv_msrs(family, model)) |
| 3812 | 3907 | return 0; |
| 3813 | 3908 | |
| 3909 | + if (family != 6) |
| 3910 | + return 0; |
| 3911 | + |
| 3814 | 3912 | switch (model) { |
| 3815 | 3913 | /* Nehalem compatible, but do not include turbo-ratio limit support */ |
| 3816 | 3914 | case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ |
| @@ -4125,6 +4223,9 @@ int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p) · 308 unmodified lines |
| 4125 | 4223 | char *epb_string; |
| 4126 | 4224 | int cpu, epb; |
| 4127 | 4225 | |
| 4226 | + UNUSED(c); |
| 4227 | + UNUSED(p); |
| 4228 | + |
| 4128 | 4229 | if (!has_epb) |
| 4129 | 4230 | return 0; |
| 4130 | 4231 | |
| @@ -4171,6 +4272,9 @@ int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p) · 40 unmodified lines |
| 4171 | 4272 | unsigned long long msr; |
| 4172 | 4273 | int cpu; |
| 4173 | 4274 | |
| 4275 | + UNUSED(c); |
| 4276 | + UNUSED(p); |
| 4277 | + |
| 4174 | 4278 | if (!has_hwp) |
| 4175 | 4279 | return 0; |
| 4176 | 4280 | |
| @@ -4254,6 +4358,9 @@ int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data · 77 unmodified lines |
| 4254 | 4358 | unsigned long long msr; |
| 4255 | 4359 | int cpu; |
| 4256 | 4360 | |
| 4361 | + UNUSED(c); |
| 4362 | + UNUSED(p); |
| 4363 | + |
| 4257 | 4364 | cpu = t->cpu_id; |
| 4258 | 4365 | |
| 4259 | 4366 | /* per-package */ |
| @@ -4359,6 +4466,8 @@ double get_tdp_intel(unsigned int model) · 99 unmodified lines |
| 4359 | 4466 | |
| 4360 | 4467 | double get_tdp_amd(unsigned int family) |
| 4361 | 4468 | { |
| 4469 | + UNUSED(family); |
| 4470 | + |
| 4362 | 4471 | /* This is the max stock TDP of HEDT/Server Fam17h+ chips */ |
| 4363 | 4472 | return 280.0; |
| 4364 | 4473 | } |
| @@ -4376,6 +4485,7 @@ static double rapl_dram_energy_units_probe(int model, double rapl_energy_units) · 11 unmodified lines |
| 4376 | 4485 | case INTEL_FAM6_BROADWELL_X: /* BDX */ |
| 4377 | 4486 | case INTEL_FAM6_SKYLAKE_X: /* SKX */ |
| 4378 | 4487 | case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ |
| 4488 | + case INTEL_FAM6_ICELAKE_X: /* ICX */ |
| 4379 | 4489 | return (rapl_dram_energy_units = 15.3 / 1000000); |
| 4380 | 4490 | default: |
| 4381 | 4491 | return (rapl_energy_units); |
| @@ -4559,6 +4669,8 @@ void rapl_probe_amd(unsigned int family, unsigned int model) · 177 unmodified lines |
| 4559 | 4669 | unsigned int has_rapl = 0; |
| 4560 | 4670 | double tdp; |
| 4561 | 4671 | |
| 4672 | + UNUSED(model); |
| 4673 | + |
| 4562 | 4674 | if (max_extended_level >= 0x80000007) { |
| 4563 | 4675 | __cpuid(0x80000007, eax, ebx, ecx, edx); |
| 4564 | 4676 | /* RAPL (Fam 17h+) */ |
| @@ -4617,6 +4729,7 @@ void perf_limit_reasons_probe(unsigned int family, unsigned int model) · 52 unmodified lines |
| 4617 | 4729 | case INTEL_FAM6_HASWELL_L: /* HSW */ |
| 4618 | 4730 | case INTEL_FAM6_HASWELL_G: /* HSW */ |
| 4619 | 4731 | do_gfx_perf_limit_reasons = 1; |
| 4732 | + /* FALLTHRU */ |
| 4620 | 4733 | case INTEL_FAM6_HASWELL_X: /* HSX */ |
| 4621 | 4734 | do_core_perf_limit_reasons = 1; |
| 4622 | 4735 | do_ring_perf_limit_reasons = 1; |
| @@ -4643,6 +4756,9 @@ int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p · 20 unmodified lines |
| 4643 | 4756 | unsigned int dts, dts2; |
| 4644 | 4757 | int cpu; |
| 4645 | 4758 | |
| 4759 | + UNUSED(c); |
| 4760 | + UNUSED(p); |
| 4761 | + |
| 4646 | 4762 | if (!(do_dts || do_ptm)) |
| 4647 | 4763 | return 0; |
| 4648 | 4764 | |
| @@ -4698,7 +4814,7 @@ int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p · 49 unmodified lines |
| 4698 | 4814 | |
| 4699 | 4815 | void print_power_limit_msr(int cpu, unsigned long long msr, char *label) |
| 4700 | 4816 | { |
| 4701 | | − fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n", |
| 4817 | + fprintf(outf, "cpu%d: %s: %sabled (%0.3f Watts, %f sec, clamp %sabled)\n", |
| 4702 | 4818 | cpu, label, |
| 4703 | 4819 | ((msr >> 15) & 1) ? "EN" : "DIS", |
| 4704 | 4820 | ((msr >> 0) & 0x7FFF) * rapl_power_units, |
| @@ -4714,6 +4830,9 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p) · 9 unmodified lines |
| 4714 | 4830 | const char *msr_name; |
| 4715 | 4831 | int cpu; |
| 4716 | 4832 | |
| 4833 | + UNUSED(c); |
| 4834 | + UNUSED(p); |
| 4835 | + |
| 4717 | 4836 | if (!do_rapl) |
| 4718 | 4837 | return 0; |
| 4719 | 4838 | |
| @@ -4762,12 +4881,19 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p) · 42 unmodified lines |
| 4762 | 4881 | cpu, msr, (msr >> 63) & 1 ? "" : "UN"); |
| 4763 | 4882 | |
| 4764 | 4883 | print_power_limit_msr(cpu, msr, "PKG Limit #1"); |
| 4765 | | − fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n", |
| 4884 | + fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%0.3f Watts, %f* sec, clamp %sabled)\n", |
| 4766 | 4885 | cpu, |
| 4767 | 4886 | ((msr >> 47) & 1) ? "EN" : "DIS", |
| 4768 | 4887 | ((msr >> 32) & 0x7FFF) * rapl_power_units, |
| 4769 | 4888 | (1.0 + (((msr >> 54) & 0x3) / 4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units, |
| 4770 | 4889 | ((msr >> 48) & 1) ? "EN" : "DIS"); |
| 4890 | + |
| 4891 | + if (get_msr(cpu, MSR_VR_CURRENT_CONFIG, &msr)) |
| 4892 | + return -9; |
| 4893 | + |
| 4894 | + fprintf(outf, "cpu%d: MSR_VR_CURRENT_CONFIG: 0x%08llx\n", cpu, msr); |
| 4895 | + fprintf(outf, "cpu%d: PKG Limit #4: %f Watts (%slocked)\n", |
| 4896 | + cpu, ((msr >> 0) & 0x1FFF) * rapl_power_units, (msr >> 31) & 1 ? "" : "UN"); |
| 4771 | 4897 | } |
| 4772 | 4898 | |
| 4773 | 4899 | if (do_rapl & RAPL_DRAM_POWER_INFO) { |
| @@ -4830,6 +4956,9 @@ int has_snb_msrs(unsigned int family, unsigned int model) · 56 unmodified lines |
| 4830 | 4956 | if (!genuine_intel) |
| 4831 | 4957 | return 0; |
| 4832 | 4958 | |
| 4959 | + if (family != 6) |
| 4960 | + return 0; |
| 4961 | + |
| 4833 | 4962 | switch (model) { |
| 4834 | 4963 | case INTEL_FAM6_SANDYBRIDGE: |
| 4835 | 4964 | case INTEL_FAM6_SANDYBRIDGE_X: |
| @@ -4873,6 +5002,9 @@ int has_c8910_msrs(unsigned int family, unsigned int model) · 37 unmodified lines |
| 4873 | 5002 | if (!genuine_intel) |
| 4874 | 5003 | return 0; |
| 4875 | 5004 | |
| 5005 | + if (family != 6) |
| 5006 | + return 0; |
| 5007 | + |
| 4876 | 5008 | switch (model) { |
| 4877 | 5009 | case INTEL_FAM6_HASWELL_L: /* HSW */ |
| 4878 | 5010 | case INTEL_FAM6_BROADWELL: /* BDW */ |
| @@ -4899,6 +5031,9 @@ int has_skl_msrs(unsigned int family, unsigned int model) · 20 unmodified lines |
| 4899 | 5031 | if (!genuine_intel) |
| 4900 | 5032 | return 0; |
| 4901 | 5033 | |
| 5034 | + if (family != 6) |
| 5035 | + return 0; |
| 5036 | + |
| 4902 | 5037 | switch (model) { |
| 4903 | 5038 | case INTEL_FAM6_SKYLAKE_L: /* SKL */ |
| 4904 | 5039 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ |
| @@ -4911,6 +5046,10 @@ int is_slm(unsigned int family, unsigned int model) · 6 unmodified lines |
| 4911 | 5046 | { |
| 4912 | 5047 | if (!genuine_intel) |
| 4913 | 5048 | return 0; |
| 5049 | + |
| 5050 | + if (family != 6) |
| 5051 | + return 0; |
| 5052 | + |
| 4914 | 5053 | switch (model) { |
| 4915 | 5054 | case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */ |
| 4916 | 5055 | case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */ |
| @@ -4923,6 +5062,10 @@ int is_knl(unsigned int family, unsigned int model) · 6 unmodified lines |
| 4923 | 5062 | { |
| 4924 | 5063 | if (!genuine_intel) |
| 4925 | 5064 | return 0; |
| 5065 | + |
| 5066 | + if (family != 6) |
| 5067 | + return 0; |
| 5068 | + |
| 4926 | 5069 | switch (model) { |
| 4927 | 5070 | case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ |
| 4928 | 5071 | return 1; |
| @@ -4935,6 +5078,9 @@ int is_cnl(unsigned int family, unsigned int model) · 6 unmodified lines |
| 4935 | 5078 | if (!genuine_intel) |
| 4936 | 5079 | return 0; |
| 4937 | 5080 | |
| 5081 | + if (family != 6) |
| 5082 | + return 0; |
| 5083 | + |
| 4938 | 5084 | switch (model) { |
| 4939 | 5085 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ |
| 4940 | 5086 | return 1; |
| @@ -4989,6 +5135,9 @@ int get_cpu_type(struct thread_data *t, struct core_data *c, struct pkg_data *p) · 48 unmodified lines |
| 4989 | 5135 | { |
| 4990 | 5136 | unsigned int eax, ebx, ecx, edx; |
| 4991 | 5137 | |
| 5138 | + UNUSED(c); |
| 5139 | + UNUSED(p); |
| 5140 | + |
| 4992 | 5141 | if (!genuine_intel) |
| 4993 | 5142 | return 0; |
| 4994 | 5143 | |
| @@ -5025,6 +5174,9 @@ int set_temperature_target(struct thread_data *t, struct core_data *c, struct pk · 30 unmodified lines |
| 5025 | 5174 | unsigned int tcc_default, tcc_offset; |
| 5026 | 5175 | int cpu; |
| 5027 | 5176 | |
| 5177 | + UNUSED(c); |
| 5178 | + UNUSED(p); |
| 5179 | + |
| 5028 | 5180 | /* tj_max is used only for dts or ptm */ |
| 5029 | 5181 | if (!(do_dts || do_ptm)) |
| 5030 | 5182 | return 0; |
| @@ -5572,6 +5724,11 @@ void process_cpuid() · 541 unmodified lines |
| 5572 | 5724 | else |
| 5573 | 5725 | BIC_NOT_PRESENT(BIC_CPU_LPI); |
| 5574 | 5726 | |
| 5727 | + if (!access("/sys/devices/system/cpu/cpu0/thermal_throttle/core_throttle_count", R_OK)) |
| 5728 | + BIC_PRESENT(BIC_CORE_THROT_CNT); |
| 5729 | + else |
| 5730 | + BIC_NOT_PRESENT(BIC_CORE_THROT_CNT); |
| 5731 | + |
| 5575 | 5732 | if (!access(sys_lpi_file_sysfs, R_OK)) { |
| 5576 | 5733 | sys_lpi_file = sys_lpi_file_sysfs; |
| 5577 | 5734 | BIC_PRESENT(BIC_SYS_LPI); |
| @@ -5601,11 +5758,6 @@ int dir_filter(const struct dirent *dirp) · 23 unmodified lines |
| 5601 | 5758 | return 0; |
| 5602 | 5759 | } |
| 5603 | 5760 | |
| 5604 | | −int open_dev_cpu_msr(int dummy1) |
| 5605 | | −{ |
| 5606 | | − return 0; |
| 5607 | | −} |
| 5608 | | − |
| 5609 | 5761 | void topology_probe() |
| 5610 | 5762 | { |
| 5611 | 5763 | int i; |
| @@ -5896,6 +6048,9 @@ void turbostat_init() · 284 unmodified lines |
| 5896 | 6048 | |
| 5897 | 6049 | if (!quiet && do_irtl_snb) |
| 5898 | 6050 | print_irtl(); |
| 6051 | + |
| 6052 | + if (DO_BIC(BIC_IPC)) |
| 6053 | + (void)get_instr_count_fd(base_cpu); |
| 5899 | 6054 | } |
| 5900 | 6055 | |
| 5901 | 6056 | int fork_it(char **argv) |
| @@ -5973,7 +6128,7 @@ int get_and_dump_counters(void) · 71 unmodified lines |
| 5973 | 6128 | |
| 5974 | 6129 | void print_version() |
| 5975 | 6130 | { |
| 5976 | | − fprintf(outf, "turbostat version 21.05.04" " - Len Brown <lenb@kernel.org>\n"); |
| 6131 | + fprintf(outf, "turbostat version 2022.04.16 - Len Brown <lenb@kernel.org>\n"); |
| 5977 | 6132 | } |
| 5978 | 6133 | |
| 5979 | 6134 | int add_counter(unsigned int msr_num, char *path, char *name, |
| @@ -6138,6 +6293,16 @@ next: · 158 unmodified lines |
| 6138 | 6293 | } |
| 6139 | 6294 | } |
| 6140 | 6295 | |
| 6296 | +int is_deferred_add(char *name) |
| 6297 | +{ |
| 6298 | + int i; |
| 6299 | + |
| 6300 | + for (i = 0; i < deferred_add_index; ++i) |
| 6301 | + if (!strcmp(name, deferred_add_names[i])) |
| 6302 | + return 1; |
| 6303 | + return 0; |
| 6304 | +} |
| 6305 | + |
| 6141 | 6306 | int is_deferred_skip(char *name) |
| 6142 | 6307 | { |
| 6143 | 6308 | int i; |
| @@ -6156,9 +6321,6 @@ void probe_sysfs(void) · 12 unmodified lines |
| 6156 | 6321 | int state; |
| 6157 | 6322 | char *sp; |
| 6158 | 6323 | |
| 6159 | | − if (!DO_BIC(BIC_sysfs)) |
| 6160 | | − return; |
| 6161 | | − |
| 6162 | 6324 | for (state = 10; state >= 0; --state) { |
| 6163 | 6325 | |
| 6164 | 6326 | sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name", base_cpu, state); |
| @@ -6181,6 +6343,9 @@ void probe_sysfs(void) · 16 unmodified lines |
| 6181 | 6343 | |
| 6182 | 6344 | sprintf(path, "cpuidle/state%d/time", state); |
| 6183 | 6345 | |
| 6346 | + if (!DO_BIC(BIC_sysfs) && !is_deferred_add(name_buf)) |
| 6347 | + continue; |
| 6348 | + |
| 6184 | 6349 | if (is_deferred_skip(name_buf)) |
| 6185 | 6350 | continue; |
| 6186 | 6351 | |
| @@ -6206,6 +6371,9 @@ void probe_sysfs(void) · 19 unmodified lines |
| 6206 | 6371 | |
| 6207 | 6372 | sprintf(path, "cpuidle/state%d/usage", state); |
| 6208 | 6373 | |
| 6374 | + if (!DO_BIC(BIC_sysfs) && !is_deferred_add(name_buf)) |
| 6375 | + continue; |
| 6376 | + |
| 6209 | 6377 | if (is_deferred_skip(name_buf)) |
| 6210 | 6378 | continue; |
| 6211 | 6379 | |
| @@ -6313,6 +6481,7 @@ void cmdline(int argc, char **argv) · 101 unmodified lines |
| 6313 | 6481 | { "interval", required_argument, 0, 'i' }, |
| 6314 | 6482 | { "IPC", no_argument, 0, 'I' }, |
| 6315 | 6483 | { "num_iterations", required_argument, 0, 'n' }, |
| 6484 | + { "header_iterations", required_argument, 0, 'N' }, |
| 6316 | 6485 | { "help", no_argument, 0, 'h' }, |
| 6317 | 6486 | { "hide", required_argument, 0, 'H' }, // meh, -h taken by --help |
| 6318 | 6487 | { "Joules", no_argument, 0, 'J' }, |
| @@ -6394,6 +6563,14 @@ void cmdline(int argc, char **argv) · 75 unmodified lines |
| 6394 | 6563 | exit(2); |
| 6395 | 6564 | } |
| 6396 | 6565 | break; |
| 6566 | + case 'N': |
| 6567 | + header_iterations = strtod(optarg, NULL); |
| 6568 | + |
| 6569 | + if (header_iterations <= 0) { |
| 6570 | + fprintf(outf, "iterations %d should be positive number\n", header_iterations); |
| 6571 | + exit(2); |
| 6572 | + } |
| 6573 | + break; |
| 6397 | 6574 | case 's': |
| 6398 | 6575 | /* |
| 6399 | 6576 | * --show: show only those specified |
| @@ -6432,6 +6609,8 @@ int main(int argc, char **argv) · 32 unmodified lines |
| 6432 | 6609 | |
| 6433 | 6610 | turbostat_init(); |
| 6434 | 6611 | |
| 6612 | + msr_sum_record(); |
| 6613 | + |
| 6435 | 6614 | /* dump counters and exit */ |
| 6436 | 6615 | if (dump_only) |
| 6437 | 6616 | return get_and_dump_counters(); |
| @@ -6443,7 +6622,6 @@ int main(int argc, char **argv) · 5 unmodified lines |
| 6443 | 6622 | return 0; |
| 6444 | 6623 | } |
| 6445 | 6624 | |
| 6446 | | − msr_sum_record(); |
| 6447 | 6625 | /* |
| 6448 | 6626 | * if any params left, it must be a command to fork |
| 6449 | 6627 | */ |