It is to collaborate with HSA_CAPABILITY in libhsakmt. v2: squash in NULL pointer check
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| @@ -37,6 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | #include "kfd_device_queue_manager.h" |
| 38 | 38 | #include "kfd_iommu.h" |
| 39 | 39 | #include "amdgpu_amdkfd.h" |
| 40 | +#include "amdgpu_ras.h" | |
| 40 | 41 | |
| 41 | 42 | /* topology_device_list - Master list of all topology devices */ |
| 42 | 43 | static struct list_head topology_device_list; |
| @@ -1197,6 +1198,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu) · 1154 unmodified lines | ||
| 1197 | 1198 | void *crat_image = NULL; |
| 1198 | 1199 | size_t image_size = 0; |
| 1199 | 1200 | int proximity_domain; |
| 1201 | + struct amdgpu_ras *ctx; | |
| 1200 | 1202 | |
| 1201 | 1203 | INIT_LIST_HEAD(&temp_topology_device_list); |
| 1202 | 1204 | |
| @@ -1328,6 +1330,20 @@ int kfd_topology_add_device(struct kfd_dev *gpu) · 125 unmodified lines | ||
| 1328 | 1330 | dev->node_props.capability |= HSA_CAP_ATS_PRESENT; |
| 1329 | 1331 | } |
| 1330 | 1332 | |
| 1333 | + ctx = amdgpu_ras_get_context((struct amdgpu_device *)(dev->gpu->kgd)); | |
| 1334 | + if (ctx) { | |
| 1335 | + /* kfd only concerns sram ecc on GFX/SDMA and HBM ecc on UMC */ | |
| 1336 | + dev->node_props.capability |= | |
| 1337 | + (((ctx->features & BIT(AMDGPU_RAS_BLOCK__SDMA)) != 0) || | |
| 1338 | + ((ctx->features & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0)) ? | |
| 1339 | + HSA_CAP_SRAM_EDCSUPPORTED : 0; | |
| 1340 | + dev->node_props.capability |= ((ctx->features & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ? | |
| 1341 | + HSA_CAP_MEM_EDCSUPPORTED : 0; | |
| 1342 | + | |
| 1343 | + dev->node_props.capability |= (ctx->features != 0) ? | |
| 1344 | + HSA_CAP_RASEVENTNOTIFY : 0; | |
| 1345 | + } | |
| 1346 | + | |
| 1331 | 1347 | kfd_debug_print_topology(); |
| 1332 | 1348 | |
| 1333 | 1349 | if (!res) |
| @@ -48,6 +48,10 @@ · 47 unmodified lines | ||
| 48 | 48 | #define HSA_CAP_DOORBELL_TYPE_2_0 0x2 |
| 49 | 49 | #define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000 |
| 50 | 50 | |
| 51 | +#define HSA_CAP_SRAM_EDCSUPPORTED 0x00080000 | |
| 52 | +#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000 | |
| 53 | +#define HSA_CAP_RASEVENTNOTIFY 0x00200000 | |
| 54 | + | |
| 51 | 55 | struct kfd_node_properties { |
| 52 | 56 | uint64_t hive_id; |
| 53 | 57 | uint32_t cpu_cores_count; |