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Merge branch 'drm-nouveau-fixes-3.10' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes

Multiple nouveau regression fixes, hdmi audio, s/r and dac load detection * 'drm-nouveau-fixes-3.10' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: drm/nv50/kms: use dac loadval from vbios, where it's available drm/nv50/disp: force dac power state during load detect drm/nv50-nv84/fifo: fix resume regression introduced by playlist race fix drm/nv84/disp: Fix HDMI audio regression

Dave Airlie committed 13 years ago

Commit 0e32fde2 parents 943079e d40ee485 files · +22 −6Browse files

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5 files
  1. drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c +4 −0
  2. drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c +4 −0
  3. drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c +10 −4
  4. drivers/gpu/drm/nouveau/core/include/core/class.h +1 −1
  5. drivers/gpu/drm/nouveau/nv50_display.c +3 −1
drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c+4−0
@@ -50,12 +50,16 @@ nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) · 49 unmodified lines
5050 {
5151 const u32 doff = (or * 0x800);
5252 int load = -EINVAL;
53+ nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000);
54+ nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
5355 nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval);
5456 mdelay(9);
5557 udelay(500);
5658 nv_wr32(priv, 0x61a00c + doff, 0x80000000);
5759 load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27;
5860 nv_wr32(priv, 0x61a00c + doff, 0x00000000);
61+ nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000);
62+ nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
5963 return load;
6064 }
6165
drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c+4−0
@@ -55,6 +55,10 @@ nv84_hdmi_ctrl(struct nv50_disp_priv *priv, int head, int or, u32 data) · 54 unmodified lines
5555 nv_wr32(priv, 0x616510 + hoff, 0x00000000);
5656 nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000001);
5757
58+ nv_mask(priv, 0x6165d0 + hoff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
59+ nv_mask(priv, 0x616568 + hoff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
60+ nv_mask(priv, 0x616578 + hoff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
61+
5862 /* ??? */
5963 nv_mask(priv, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
6064 nv_mask(priv, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c+10−4
@@ -40,14 +40,13 @@ · 39 unmodified lines
4040 * FIFO channel objects
4141 ******************************************************************************/
4242
43−void
44−nv50_fifo_playlist_update(struct nv50_fifo_priv *priv)
43+static void
44+nv50_fifo_playlist_update_locked(struct nv50_fifo_priv *priv)
4545 {
4646 struct nouveau_bar *bar = nouveau_bar(priv);
4747 struct nouveau_gpuobj *cur;
4848 int i, p;
4949
50− mutex_lock(&nv_subdev(priv)->mutex);
5150 cur = priv->playlist[priv->cur_playlist];
5251 priv->cur_playlist = !priv->cur_playlist;
5352
@@ -61,6 +60,13 @@ nv50_fifo_playlist_update(struct nv50_fifo_priv *priv) · 7 unmodified lines
6160 nv_wr32(priv, 0x0032f4, cur->addr >> 12);
6261 nv_wr32(priv, 0x0032ec, p);
6362 nv_wr32(priv, 0x002500, 0x00000101);
63+}
64+
65+void
66+nv50_fifo_playlist_update(struct nv50_fifo_priv *priv)
67+{
68+ mutex_lock(&nv_subdev(priv)->mutex);
69+ nv50_fifo_playlist_update_locked(priv);
6470 mutex_unlock(&nv_subdev(priv)->mutex);
6571 }
6672
@@ -489,7 +495,7 @@ nv50_fifo_init(struct nouveau_object *object) · 422 unmodified lines
489495
490496 for (i = 0; i < 128; i++)
491497 nv_wr32(priv, 0x002600 + (i * 4), 0x00000000);
492− nv50_fifo_playlist_update(priv);
498+ nv50_fifo_playlist_update_locked(priv);
493499
494500 nv_wr32(priv, 0x003200, 0x00000001);
495501 nv_wr32(priv, 0x003250, 0x00000001);
drivers/gpu/drm/nouveau/core/include/core/class.h+1−1
@@ -218,7 +218,7 @@ struct nv04_display_class { · 217 unmodified lines
218218 #define NV50_DISP_DAC_PWR_STATE 0x00000040
219219 #define NV50_DISP_DAC_PWR_STATE_ON 0x00000000
220220 #define NV50_DISP_DAC_PWR_STATE_OFF 0x00000040
221−#define NV50_DISP_DAC_LOAD 0x0002000c
221+#define NV50_DISP_DAC_LOAD 0x00020100
222222 #define NV50_DISP_DAC_LOAD_VALUE 0x00000007
223223
224224 #define NV50_DISP_PIOR_MTHD 0x00030000
drivers/gpu/drm/nouveau/nv50_display.c+3−1
@@ -1554,7 +1554,9 @@ nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector) · 1553 unmodified lines
15541554 {
15551555 struct nv50_disp *disp = nv50_disp(encoder->dev);
15561556 int ret, or = nouveau_encoder(encoder)->or;
1557− u32 load = 0;
1557+ u32 load = nouveau_drm(encoder->dev)->vbios.dactestval;
1558+ if (load == 0)
1559+ load = 340;
15581560
15591561 ret = nv_exec(disp->core, NV50_DISP_DAC_LOAD + or, &load, sizeof(load));
15601562 if (ret || load != 7)

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