We need the kernfs/driver core fixes in here as well.
Unified · Split
| @@ -116,7 +116,7 @@ Description: · 115 unmodified lines | ||
| 116 | 116 | <value>[ForceIf:<attribute>=<value>] |
| 117 | 117 | <value>[ForceIfNot:<attribute>=<value>] |
| 118 | 118 | |
| 119 | − For example: | |
| 119 | + For example:: | |
| 120 | 120 | |
| 121 | 121 | LegacyOrom/dell_value_modifier has value: |
| 122 | 122 | Disabled[ForceIf:SecureBoot=Enabled] |
| @@ -212,7 +212,7 @@ Description: · 89 unmodified lines | ||
| 212 | 212 | the next boot. |
| 213 | 213 | |
| 214 | 214 | Lenovo specific class extensions |
| 215 | − ------------------------------ | |
| 215 | + -------------------------------- | |
| 216 | 216 | |
| 217 | 217 | On Lenovo systems the following additional settings are available: |
| 218 | 218 | |
| @@ -246,9 +246,7 @@ Description: · 27 unmodified lines | ||
| 246 | 246 | that is being referenced (e.g hdd0, hdd1 etc) |
| 247 | 247 | This attribute defaults to device 0. |
| 248 | 248 | |
| 249 | − certificate: | |
| 250 | − signature: | |
| 251 | − save_signature: | |
| 249 | + certificate, signature, save_signature: | |
| 252 | 250 | These attributes are used for certificate based authentication. This is |
| 253 | 251 | used in conjunction with a signing server as an alternative to password |
| 254 | 252 | based authentication. |
| @@ -257,22 +255,27 @@ Description: · 2 unmodified lines | ||
| 257 | 255 | The attributes can be displayed to check the stored value. |
| 258 | 256 | |
| 259 | 257 | Some usage examples: |
| 260 | − Installing a certificate to enable feature: | |
| 261 | − echo <supervisor password > authentication/Admin/current_password | |
| 262 | − echo <signed certificate> > authentication/Admin/certificate | |
| 263 | 258 | |
| 264 | − Updating the installed certificate: | |
| 265 | − echo <signature> > authentication/Admin/signature | |
| 266 | − echo <signed certificate> > authentication/Admin/certificate | |
| 259 | + Installing a certificate to enable feature:: | |
| 260 | + | |
| 261 | + echo "supervisor password" > authentication/Admin/current_password | |
| 262 | + echo "signed certificate" > authentication/Admin/certificate | |
| 263 | + | |
| 264 | + Updating the installed certificate:: | |
| 265 | + | |
| 266 | + echo "signature" > authentication/Admin/signature | |
| 267 | + echo "signed certificate" > authentication/Admin/certificate | |
| 267 | 268 | |
| 268 | − Removing the installed certificate: | |
| 269 | − echo <signature> > authentication/Admin/signature | |
| 270 | − echo '' > authentication/Admin/certificate | |
| 269 | + Removing the installed certificate:: | |
| 271 | 270 | |
| 272 | − Changing a BIOS setting: | |
| 273 | − echo <signature> > authentication/Admin/signature | |
| 274 | − echo <save signature> > authentication/Admin/save_signature | |
| 275 | − echo Enable > attribute/PasswordBeep/current_value | |
| 271 | + echo "signature" > authentication/Admin/signature | |
| 272 | + echo "" > authentication/Admin/certificate | |
| 273 | + | |
| 274 | + Changing a BIOS setting:: | |
| 275 | + | |
| 276 | + echo "signature" > authentication/Admin/signature | |
| 277 | + echo "save signature" > authentication/Admin/save_signature | |
| 278 | + echo Enable > attribute/PasswordBeep/current_value | |
| 276 | 279 | |
| 277 | 280 | You cannot enable certificate authentication if a supervisor password |
| 278 | 281 | has not been set. |
| @@ -288,9 +291,10 @@ Description: · 9 unmodified lines | ||
| 288 | 291 | certificate_to_password: |
| 289 | 292 | Write only attribute used to switch from certificate based authentication |
| 290 | 293 | back to password based. |
| 291 | − Usage: | |
| 292 | − echo <signature> > authentication/Admin/signature | |
| 293 | − echo <password> > authentication/Admin/certificate_to_password | |
| 294 | + Usage:: | |
| 295 | + | |
| 296 | + echo "signature" > authentication/Admin/signature | |
| 297 | + echo "password" > authentication/Admin/certificate_to_password | |
| 294 | 298 | |
| 295 | 299 | |
| 296 | 300 | What: /sys/class/firmware-attributes/*/attributes/pending_reboot |
| @@ -345,7 +349,7 @@ Description: · 48 unmodified lines | ||
| 345 | 349 | |
| 346 | 350 | # echo "factory" > /sys/class/firmware-attributes/*/device/attributes/reset_bios |
| 347 | 351 | # cat /sys/class/firmware-attributes/*/device/attributes/reset_bios |
| 348 | − # builtinsafe lastknowngood [factory] custom | |
| 352 | + builtinsafe lastknowngood [factory] custom | |
| 349 | 353 | |
| 350 | 354 | Note that any changes to this attribute requires a reboot |
| 351 | 355 | for changes to take effect. |
| @@ -13,17 +13,19 @@ Description: · 12 unmodified lines | ||
| 13 | 13 | Should the operation fail, one of the following error codes |
| 14 | 14 | may be returned: |
| 15 | 15 | |
| 16 | + ========== ===== | |
| 16 | 17 | Error Code Cause |
| 17 | − ---------- ----- | |
| 18 | − EIO General mailbox failure. Log may indicate cause. | |
| 19 | − EBUSY Mailbox is owned by another agent. | |
| 20 | − EPERM SDSI capability is not enabled in hardware. | |
| 21 | − EPROTO Failure in mailbox protocol detected by driver. | |
| 18 | + ========== ===== | |
| 19 | + EIO General mailbox failure. Log may indicate cause. | |
| 20 | + EBUSY Mailbox is owned by another agent. | |
| 21 | + EPERM SDSI capability is not enabled in hardware. | |
| 22 | + EPROTO Failure in mailbox protocol detected by driver. | |
| 22 | 23 | See log for details. |
| 23 | − EOVERFLOW For provision commands, the size of the data | |
| 24 | + EOVERFLOW For provision commands, the size of the data | |
| 24 | 25 | exceeds what may be written. |
| 25 | − ESPIPE Seeking is not allowed. | |
| 26 | − ETIMEDOUT Failure to complete mailbox transaction in time. | |
| 26 | + ESPIPE Seeking is not allowed. | |
| 27 | + ETIMEDOUT Failure to complete mailbox transaction in time. | |
| 28 | + ========== ===== | |
| 27 | 29 | |
| 28 | 30 | What: /sys/bus/auxiliary/devices/intel_vsec.sdsi.X/guid |
| 29 | 31 | Date: Feb 2022 |
| @@ -9,8 +9,9 @@ Description: Shows all enabled kernel features. · 8 unmodified lines | ||
| 9 | 9 | What: /sys/fs/erofs/<disk>/sync_decompress |
| 10 | 10 | Date: November 2021 |
| 11 | 11 | Contact: "Huang Jianan" <huangjianan@oppo.com> |
| 12 | −Description: Control strategy of sync decompression | |
| 12 | +Description: Control strategy of sync decompression: | |
| 13 | + | |
| 13 | 14 | - 0 (default, auto): enable for readpage, and enable for |
| 14 | − readahead on atomic contexts only, | |
| 15 | + readahead on atomic contexts only. | |
| 15 | 16 | - 1 (force on): enable for readpage and readahead. |
| 16 | 17 | - 2 (force off): disable for all situations. |
| @@ -228,10 +228,10 @@ Core dump support · 227 unmodified lines | ||
| 228 | 228 | ----------------- |
| 229 | 229 | |
| 230 | 230 | The allocation tags for user memory mapped with ``PROT_MTE`` are dumped |
| 231 | −in the core file as additional ``PT_ARM_MEMTAG_MTE`` segments. The | |
| 231 | +in the core file as additional ``PT_AARCH64_MEMTAG_MTE`` segments. The | |
| 232 | 232 | program header for such segment is defined as: |
| 233 | 233 | |
| 234 | −:``p_type``: ``PT_ARM_MEMTAG_MTE`` | |
| 234 | +:``p_type``: ``PT_AARCH64_MEMTAG_MTE`` | |
| 235 | 235 | :``p_flags``: 0 |
| 236 | 236 | :``p_offset``: segment file offset |
| 237 | 237 | :``p_vaddr``: segment virtual address, same as the corresponding |
| @@ -13,7 +13,6 @@ maintainers: · 12 unmodified lines | ||
| 13 | 13 | properties: |
| 14 | 14 | compatible: |
| 15 | 15 | enum: |
| 16 | − - nvidia,tegra20-pmc | |
| 17 | 16 | - nvidia,tegra20-pmc |
| 18 | 17 | - nvidia,tegra30-pmc |
| 19 | 18 | - nvidia,tegra114-pmc |
| @@ -34,7 +34,6 @@ properties: · 33 unmodified lines | ||
| 34 | 34 | oneOf: |
| 35 | 35 | - items: |
| 36 | 36 | - enum: |
| 37 | − - ti,sysc-omap2 | |
| 38 | 37 | - ti,sysc-omap2 |
| 39 | 38 | - ti,sysc-omap4 |
| 40 | 39 | - ti,sysc-omap4-simple |
| @@ -22,7 +22,16 @@ properties: · 21 unmodified lines | ||
| 22 | 22 | const: microchip,mpfs-clkcfg |
| 23 | 23 | |
| 24 | 24 | reg: |
| 25 | − maxItems: 1 | |
| 25 | + items: | |
| 26 | + - description: | | |
| 27 | + clock config registers: | |
| 28 | + These registers contain enable, reset & divider tables for the, cpu, | |
| 29 | + axi, ahb and rtc/mtimer reference clocks as well as enable and reset | |
| 30 | + for the peripheral clocks. | |
| 31 | + - description: | | |
| 32 | + mss pll dri registers: | |
| 33 | + Block of registers responsible for dynamic reconfiguration of the mss | |
| 34 | + pll | |
| 26 | 35 | |
| 27 | 36 | clocks: |
| 28 | 37 | maxItems: 1 |
| @@ -51,7 +60,7 @@ examples: · 22 unmodified lines | ||
| 51 | 60 | #size-cells = <2>; |
| 52 | 61 | clkcfg: clock-controller@20002000 { |
| 53 | 62 | compatible = "microchip,mpfs-clkcfg"; |
| 54 | − reg = <0x0 0x20002000 0x0 0x1000>; | |
| 63 | + reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; | |
| 55 | 64 | clocks = <&ref>; |
| 56 | 65 | #clock-cells = <1>; |
| 57 | 66 | }; |
| @@ -8,7 +8,7 @@ title: Samsung Exynos SoC Audio SubSystem clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung Exynos SoC clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung SoC external/osc/XXTI/XusbXTI clock · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung Exynos4412 SoC ISP clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung Exynos5260 SoC clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung Exynos5410 SoC clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung Exynos5433 SoC clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung Exynos7 SoC clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -9,7 +9,7 @@ title: Samsung Exynos7885 SoC clock controller · 8 unmodified lines | ||
| 9 | 9 | maintainers: |
| 10 | 10 | - Dávid Virág <virag.david003@gmail.com> |
| 11 | 11 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 12 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 12 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 13 | 13 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 14 | 14 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 15 | 15 | |
| @@ -9,7 +9,7 @@ title: Samsung Exynos850 SoC clock controller · 8 unmodified lines | ||
| 9 | 9 | maintainers: |
| 10 | 10 | - Sam Protsenko <semen.protsenko@linaro.org> |
| 11 | 11 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 12 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 12 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 13 | 13 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 14 | 14 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 15 | 15 | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2M and S5M family clock generator block |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -8,7 +8,7 @@ title: Samsung S5Pv210 SoC Audio SubSystem clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung S5P6442/S5PC110/S5PV210 SoC clock controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | 14 | |
| @@ -8,7 +8,7 @@ title: Samsung Exynos NoC (Network on Chip) Probe · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | The Samsung Exynos542x SoC has a NoC (Network on Chip) Probe for NoC bus. |
| @@ -8,7 +8,7 @@ title: Samsung Exynos SoC PPMU (Platform Performance Monitoring Unit) · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for |
| @@ -160,7 +160,7 @@ examples: · 159 unmodified lines | ||
| 160 | 160 | mdss: mdss@5e00000 { |
| 161 | 161 | #address-cells = <1>; |
| 162 | 162 | #size-cells = <1>; |
| 163 | − compatible = "qcom,qcm2290-mdss", "qcom,mdss"; | |
| 163 | + compatible = "qcom,qcm2290-mdss"; | |
| 164 | 164 | reg = <0x05e00000 0x1000>; |
| 165 | 165 | reg-names = "mdss"; |
| 166 | 166 | power-domains = <&dispcc MDSS_GDSC>; |
| @@ -180,7 +180,7 @@ examples: · 13 unmodified lines | ||
| 180 | 180 | <&apps_smmu 0x421 0x0>; |
| 181 | 181 | ranges; |
| 182 | 182 | |
| 183 | − mdss_mdp: mdp@5e01000 { | |
| 183 | + mdss_mdp: display-controller@5e01000 { | |
| 184 | 184 | compatible = "qcom,qcm2290-dpu"; |
| 185 | 185 | reg = <0x05e01000 0x8f000>, |
| 186 | 186 | <0x05eb0000 0x2008>; |
| @@ -71,78 +71,72 @@ properties: · 70 unmodified lines | ||
| 71 | 71 | |
| 72 | 72 | hfront-porch: |
| 73 | 73 | description: Horizontal front porch panel timing |
| 74 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 74 | 75 | oneOf: |
| 75 | − - $ref: /schemas/types.yaml#/definitions/uint32 | |
| 76 | − maxItems: 1 | |
| 76 | + - maxItems: 1 | |
| 77 | 77 | items: |
| 78 | 78 | description: typical number of pixels |
| 79 | − - $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 80 | − minItems: 3 | |
| 79 | + - minItems: 3 | |
| 81 | 80 | maxItems: 3 |
| 82 | 81 | items: |
| 83 | 82 | description: min, typ, max number of pixels |
| 84 | 83 | |
| 85 | 84 | hback-porch: |
| 86 | 85 | description: Horizontal back porch timing |
| 86 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 87 | 87 | oneOf: |
| 88 | − - $ref: /schemas/types.yaml#/definitions/uint32 | |
| 89 | − maxItems: 1 | |
| 88 | + - maxItems: 1 | |
| 90 | 89 | items: |
| 91 | 90 | description: typical number of pixels |
| 92 | − - $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 93 | − minItems: 3 | |
| 91 | + - minItems: 3 | |
| 94 | 92 | maxItems: 3 |
| 95 | 93 | items: |
| 96 | 94 | description: min, typ, max number of pixels |
| 97 | 95 | |
| 98 | 96 | hsync-len: |
| 99 | 97 | description: Horizontal sync length panel timing |
| 98 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 100 | 99 | oneOf: |
| 101 | − - $ref: /schemas/types.yaml#/definitions/uint32 | |
| 102 | − maxItems: 1 | |
| 100 | + - maxItems: 1 | |
| 103 | 101 | items: |
| 104 | 102 | description: typical number of pixels |
| 105 | − - $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 106 | − minItems: 3 | |
| 103 | + - minItems: 3 | |
| 107 | 104 | maxItems: 3 |
| 108 | 105 | items: |
| 109 | 106 | description: min, typ, max number of pixels |
| 110 | 107 | |
| 111 | 108 | vfront-porch: |
| 112 | 109 | description: Vertical front porch panel timing |
| 110 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 113 | 111 | oneOf: |
| 114 | − - $ref: /schemas/types.yaml#/definitions/uint32 | |
| 115 | − maxItems: 1 | |
| 112 | + - maxItems: 1 | |
| 116 | 113 | items: |
| 117 | 114 | description: typical number of lines |
| 118 | − - $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 119 | − minItems: 3 | |
| 115 | + - minItems: 3 | |
| 120 | 116 | maxItems: 3 |
| 121 | 117 | items: |
| 122 | 118 | description: min, typ, max number of lines |
| 123 | 119 | |
| 124 | 120 | vback-porch: |
| 125 | 121 | description: Vertical back porch panel timing |
| 122 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 126 | 123 | oneOf: |
| 127 | − - $ref: /schemas/types.yaml#/definitions/uint32 | |
| 128 | − maxItems: 1 | |
| 124 | + - maxItems: 1 | |
| 129 | 125 | items: |
| 130 | 126 | description: typical number of lines |
| 131 | − - $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 132 | − minItems: 3 | |
| 127 | + - minItems: 3 | |
| 133 | 128 | maxItems: 3 |
| 134 | 129 | items: |
| 135 | 130 | description: min, typ, max number of lines |
| 136 | 131 | |
| 137 | 132 | vsync-len: |
| 138 | 133 | description: Vertical sync length panel timing |
| 134 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 139 | 135 | oneOf: |
| 140 | − - $ref: /schemas/types.yaml#/definitions/uint32 | |
| 141 | − maxItems: 1 | |
| 136 | + - maxItems: 1 | |
| 142 | 137 | items: |
| 143 | 138 | description: typical number of lines |
| 144 | − - $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 145 | − minItems: 3 | |
| 139 | + - minItems: 3 | |
| 146 | 140 | maxItems: 3 |
| 147 | 141 | items: |
| 148 | 142 | description: min, typ, max number of lines |
| @@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | - Joonyoung Shim <jy0922.shim@samsung.com> |
| 12 | 12 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
| 13 | 13 | - Kyungmin Park <kyungmin.park@samsung.com> |
| 14 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 14 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 15 | 15 | |
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| @@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | - Joonyoung Shim <jy0922.shim@samsung.com> |
| 12 | 12 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
| 13 | 13 | - Kyungmin Park <kyungmin.park@samsung.com> |
| 14 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 14 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 15 | 15 | |
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| @@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | - Joonyoung Shim <jy0922.shim@samsung.com> |
| 12 | 12 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
| 13 | 13 | - Kyungmin Park <kyungmin.park@samsung.com> |
| 14 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 14 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 15 | 15 | |
| 16 | 16 | description: |
| 17 | 17 | Samsung Exynos SoC Mixer is responsible for mixing and blending multiple data |
| @@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | - Joonyoung Shim <jy0922.shim@samsung.com> |
| 12 | 12 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
| 13 | 13 | - Kyungmin Park <kyungmin.park@samsung.com> |
| 14 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 14 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 15 | 15 | |
| 16 | 16 | description: | |
| 17 | 17 | DECON (Display and Enhancement Controller) is the Display Controller for the |
| @@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | - Joonyoung Shim <jy0922.shim@samsung.com> |
| 12 | 12 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
| 13 | 13 | - Kyungmin Park <kyungmin.park@samsung.com> |
| 14 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 14 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 15 | 15 | |
| 16 | 16 | description: | |
| 17 | 17 | MIC (Mobile Image Compressor) resides between DECON and MIPI DSI. MIPI DSI is |
| @@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | - Joonyoung Shim <jy0922.shim@samsung.com> |
| 12 | 12 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
| 13 | 13 | - Kyungmin Park <kyungmin.park@samsung.com> |
| 14 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 14 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 15 | 15 | |
| 16 | 16 | description: | |
| 17 | 17 | DECON (Display and Enhancement Controller) is the Display Controller for the |
| @@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | - Joonyoung Shim <jy0922.shim@samsung.com> |
| 12 | 12 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
| 13 | 13 | - Kyungmin Park <kyungmin.park@samsung.com> |
| 14 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 14 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 15 | 15 | |
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| @@ -29,6 +29,7 @@ properties: · 28 unmodified lines | ||
| 29 | 29 | interrupts: |
| 30 | 30 | description: |
| 31 | 31 | Interrupt lines for each GPI instance |
| 32 | + minItems: 1 | |
| 32 | 33 | maxItems: 13 |
| 33 | 34 | |
| 34 | 35 | "#dma-cells": |
| @@ -8,7 +8,7 @@ title: Maxim MAX77843 MicroUSB and Companion Power Management IC Extcon · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | This is a part of device tree bindings for Maxim MAX77843 MicroUSB |
| @@ -25,7 +25,7 @@ properties: · 10 unmodified lines | ||
| 25 | 25 | $ref: /schemas/connector/usb-connector.yaml# |
| 26 | 26 | |
| 27 | 27 | ports: |
| 28 | − $ref: /schemas/graph.yaml#/properties/port | |
| 28 | + $ref: /schemas/graph.yaml#/properties/ports | |
| 29 | 29 | description: |
| 30 | 30 | Any connector to the data bus of this controller should be modelled using |
| 31 | 31 | the OF graph bindings specified |
| @@ -20,6 +20,7 @@ properties: · 19 unmodified lines | ||
| 20 | 20 | - mediatek,mt8183-mali |
| 21 | 21 | - realtek,rtd1619-mali |
| 22 | 22 | - renesas,r9a07g044-mali |
| 23 | + - renesas,r9a07g054-mali | |
| 23 | 24 | - rockchip,px30-mali |
| 24 | 25 | - rockchip,rk3568-mali |
| 25 | 26 | - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable |
| @@ -109,7 +110,9 @@ allOf: · 83 unmodified lines | ||
| 109 | 110 | properties: |
| 110 | 111 | compatible: |
| 111 | 112 | contains: |
| 112 | − const: renesas,r9a07g044-mali | |
| 113 | + enum: | |
| 114 | + - renesas,r9a07g044-mali | |
| 115 | + - renesas,r9a07g054-mali | |
| 113 | 116 | then: |
| 114 | 117 | properties: |
| 115 | 118 | interrupts: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: LTC4151 High Voltage I2C Current and Voltage Monitor |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Microchip MCP3021 A/D converter |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Sensirion SHT15 humidity and temperature sensor |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: TMP102 temperature sensor |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: TMP108 temperature sensor |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -58,9 +58,8 @@ patternProperties: · 57 unmodified lines | ||
| 58 | 58 | The value (two's complement) to be programmed in the channel specific N correction register. |
| 59 | 59 | For remote channels only. |
| 60 | 60 | $ref: /schemas/types.yaml#/definitions/int32 |
| 61 | − items: | |
| 62 | − minimum: -128 | |
| 63 | − maximum: 127 | |
| 61 | + minimum: -128 | |
| 62 | + maximum: 127 | |
| 64 | 63 | |
| 65 | 64 | required: |
| 66 | 65 | - reg |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung's High Speed I2C controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | The Samsung's High Speed I2C controller is used to interface with I2C devices |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S3C/S5P/Exynos SoC I2C Controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -98,6 +98,7 @@ allOf: · 97 unmodified lines | ||
| 98 | 98 | - ti,adc121s |
| 99 | 99 | - ti,ads7866 |
| 100 | 100 | - ti,ads7868 |
| 101 | + then: | |
| 101 | 102 | required: |
| 102 | 103 | - vcc-supply |
| 103 | 104 | # Devices with a vref |
| @@ -108,9 +108,7 @@ patternProperties: · 107 unmodified lines | ||
| 108 | 108 | - [1-5]: order 1 to 5. |
| 109 | 109 | For audio purpose it is recommended to use order 3 to 5. |
| 110 | 110 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 111 | − items: | |
| 112 | − minimum: 0 | |
| 113 | − maximum: 5 | |
| 111 | + maximum: 5 | |
| 114 | 112 | |
| 115 | 113 | "#io-channel-cells": |
| 116 | 114 | const: 1 |
| @@ -174,7 +172,7 @@ patternProperties: · 57 unmodified lines | ||
| 174 | 172 | contains: |
| 175 | 173 | const: st,stm32-dfsdm-adc |
| 176 | 174 | |
| 177 | − - then: | |
| 175 | + then: | |
| 178 | 176 | properties: |
| 179 | 177 | st,adc-channels: |
| 180 | 178 | minItems: 1 |
| @@ -206,7 +204,7 @@ patternProperties: · 25 unmodified lines | ||
| 206 | 204 | contains: |
| 207 | 205 | const: st,stm32-dfsdm-dmic |
| 208 | 206 | |
| 209 | − - then: | |
| 207 | + then: | |
| 210 | 208 | properties: |
| 211 | 209 | st,adc-channels: |
| 212 | 210 | maxItems: 1 |
| @@ -254,7 +252,7 @@ allOf: · 41 unmodified lines | ||
| 254 | 252 | contains: |
| 255 | 253 | const: st,stm32h7-dfsdm |
| 256 | 254 | |
| 257 | − - then: | |
| 255 | + then: | |
| 258 | 256 | patternProperties: |
| 259 | 257 | "^filter@[0-9]+$": |
| 260 | 258 | properties: |
| @@ -269,7 +267,7 @@ allOf: · 8 unmodified lines | ||
| 269 | 267 | contains: |
| 270 | 268 | const: st,stm32mp1-dfsdm |
| 271 | 269 | |
| 272 | − - then: | |
| 270 | + then: | |
| 273 | 271 | patternProperties: |
| 274 | 272 | "^filter@[0-9]+$": |
| 275 | 273 | properties: |
| @@ -59,9 +59,9 @@ allOf: · 58 unmodified lines | ||
| 59 | 59 | contains: |
| 60 | 60 | enum: |
| 61 | 61 | - adi,ad5371 |
| 62 | − then: | |
| 63 | − required: | |
| 64 | − - vref2-supply | |
| 62 | + then: | |
| 63 | + required: | |
| 64 | + - vref2-supply | |
| 65 | 65 | |
| 66 | 66 | examples: |
| 67 | 67 | - | |
| @@ -93,48 +93,48 @@ allOf: · 92 unmodified lines | ||
| 93 | 93 | - qcom,sdm660-gnoc |
| 94 | 94 | - qcom,sdm660-snoc |
| 95 | 95 | |
| 96 | − then: | |
| 97 | − properties: | |
| 98 | − clock-names: | |
| 99 | − items: | |
| 100 | − - const: bus | |
| 101 | − - const: bus_a | |
| 102 | − | |
| 103 | − clocks: | |
| 104 | − items: | |
| 105 | − - description: Bus Clock | |
| 106 | − - description: Bus A Clock | |
| 107 | − | |
| 108 | − # Child node's properties | |
| 109 | − patternProperties: | |
| 110 | − '^interconnect-[a-z0-9]+$': | |
| 111 | − type: object | |
| 112 | − description: | |
| 113 | − snoc-mm is a child of snoc, sharing snoc's register address space. | |
| 114 | − | |
| 115 | − properties: | |
| 116 | − compatible: | |
| 117 | − enum: | |
| 118 | − - qcom,msm8939-snoc-mm | |
| 119 | − | |
| 120 | − '#interconnect-cells': | |
| 121 | − const: 1 | |
| 122 | − | |
| 123 | − clock-names: | |
| 124 | − items: | |
| 125 | − - const: bus | |
| 126 | − - const: bus_a | |
| 127 | − | |
| 128 | − clocks: | |
| 129 | − items: | |
| 130 | − - description: Bus Clock | |
| 131 | − - description: Bus A Clock | |
| 132 | − | |
| 133 | − required: | |
| 134 | − - compatible | |
| 135 | − - '#interconnect-cells' | |
| 136 | − - clock-names | |
| 137 | − - clocks | |
| 96 | + then: | |
| 97 | + properties: | |
| 98 | + clock-names: | |
| 99 | + items: | |
| 100 | + - const: bus | |
| 101 | + - const: bus_a | |
| 102 | + | |
| 103 | + clocks: | |
| 104 | + items: | |
| 105 | + - description: Bus Clock | |
| 106 | + - description: Bus A Clock | |
| 107 | + | |
| 108 | + # Child node's properties | |
| 109 | + patternProperties: | |
| 110 | + '^interconnect-[a-z0-9]+$': | |
| 111 | + type: object | |
| 112 | + description: | |
| 113 | + snoc-mm is a child of snoc, sharing snoc's register address space. | |
| 114 | + | |
| 115 | + properties: | |
| 116 | + compatible: | |
| 117 | + enum: | |
| 118 | + - qcom,msm8939-snoc-mm | |
| 119 | + | |
| 120 | + '#interconnect-cells': | |
| 121 | + const: 1 | |
| 122 | + | |
| 123 | + clock-names: | |
| 124 | + items: | |
| 125 | + - const: bus | |
| 126 | + - const: bus_a | |
| 127 | + | |
| 128 | + clocks: | |
| 129 | + items: | |
| 130 | + - description: Bus Clock | |
| 131 | + - description: Bus A Clock | |
| 132 | + | |
| 133 | + required: | |
| 134 | + - compatible | |
| 135 | + - '#interconnect-cells' | |
| 136 | + - clock-names | |
| 137 | + - clocks | |
| 138 | 138 | |
| 139 | 139 | - if: |
| 140 | 140 | properties: |
| @@ -7,10 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Marvell MMP/Orion Interrupt controller bindings |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Thomas Gleixner <tglx@linutronix.de> | |
| 11 | − - Jason Cooper <jason@lakedaemon.net> | |
| 12 | − - Marc Zyngier <maz@kernel.org> | |
| 13 | − - Rob Herring <robh+dt@kernel.org> | |
| 10 | + - Andrew Lunn <andrew@lunn.ch> | |
| 11 | + - Gregory Clement <gregory.clement@bootlin.com> | |
| 14 | 12 | |
| 15 | 13 | allOf: |
| 16 | 14 | - if: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos SoC Interrupt Combiner Controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | Samsung's Exynos4 architecture includes a interrupt combiner controller which |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX77693 MicroUSB and Companion Power Management IC LEDs |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated |
| @@ -65,7 +65,6 @@ properties: · 64 unmodified lines | ||
| 65 | 65 | iram: |
| 66 | 66 | $ref: /schemas/types.yaml#/definitions/phandle |
| 67 | 67 | description: phandle pointing to the SRAM device node |
| 68 | − maxItems: 1 | |
| 69 | 68 | |
| 70 | 69 | required: |
| 71 | 70 | - compatible |
| @@ -63,13 +63,11 @@ properties: · 62 unmodified lines | ||
| 63 | 63 | |
| 64 | 64 | mediatek,vpu: |
| 65 | 65 | $ref: /schemas/types.yaml#/definitions/phandle |
| 66 | − maxItems: 1 | |
| 67 | 66 | description: |
| 68 | 67 | Describes point to vpu. |
| 69 | 68 | |
| 70 | 69 | mediatek,scp: |
| 71 | 70 | $ref: /schemas/types.yaml#/definitions/phandle |
| 72 | − maxItems: 1 | |
| 73 | 71 | description: |
| 74 | 72 | Describes point to scp. |
| 75 | 73 | |
| @@ -55,13 +55,11 @@ properties: · 54 unmodified lines | ||
| 55 | 55 | |
| 56 | 56 | mediatek,vpu: |
| 57 | 57 | $ref: /schemas/types.yaml#/definitions/phandle |
| 58 | − maxItems: 1 | |
| 59 | 58 | description: |
| 60 | 59 | Describes point to vpu. |
| 61 | 60 | |
| 62 | 61 | mediatek,scp: |
| 63 | 62 | $ref: /schemas/types.yaml#/definitions/phandle |
| 64 | − maxItems: 1 | |
| 65 | 63 | description: |
| 66 | 64 | Describes point to scp. |
| 67 | 65 | |
| @@ -106,7 +104,6 @@ allOf: · 38 unmodified lines | ||
| 106 | 104 | enum: |
| 107 | 105 | - mediatek,mt8173-vcodec-enc |
| 108 | 106 | - mediatek,mt8192-vcodec-enc |
| 109 | − - mediatek,mt8173-vcodec-enc | |
| 110 | 107 | |
| 111 | 108 | then: |
| 112 | 109 | properties: |
| @@ -61,7 +61,6 @@ properties: · 60 unmodified lines | ||
| 61 | 61 | |
| 62 | 62 | mediatek,scp: |
| 63 | 63 | $ref: /schemas/types.yaml#/definitions/phandle |
| 64 | − maxItems: 1 | |
| 65 | 64 | description: | |
| 66 | 65 | The node of system control processor (SCP), using |
| 67 | 66 | the remoteproc & rpmsg framework. |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: DDR PHY Front End (DPFE) for Broadcom STB |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Markus Mayer <mmayer@broadcom.com> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: LPDDR2 SDRAM AC timing parameters for a given speed-bin |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: LPDDR2 SDRAM compliant to JEDEC JESD209-2 |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: LPDDR3 SDRAM AC timing parameters for a given speed-bin |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: LPDDR3 SDRAM compliant to JEDEC JESD209-3 |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -8,7 +8,7 @@ title: Marvell MVEBU SDRAM controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Jan Luebbe <jlu@pengutronix.de> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | properties: |
| 14 | 14 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Qualcomm Atheros AR7xxx/AR9xxx DDR controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | The DDR controller of the AR7xxx and AR9xxx families provides an interface to |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: H8/300 bus controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Yoshinori Sato <ysato@users.sourceforge.jp> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -9,7 +9,7 @@ title: | · 8 unmodified lines | ||
| 9 | 9 | Controller device |
| 10 | 10 | |
| 11 | 11 | maintainers: |
| 12 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 12 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 13 | 13 | - Lukasz Luba <lukasz.luba@arm.com> |
| 14 | 14 | |
| 15 | 15 | description: | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Synopsys IntelliDDR Multi Protocol memory controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Manish Narani <manish.narani@xilinx.com> |
| 12 | 12 | - Michal Simek <michal.simek@xilinx.com> |
| 13 | 13 | |
| @@ -24,9 +24,9 @@ description: | · 10 unmodified lines | ||
| 24 | 24 | properties: |
| 25 | 25 | compatible: |
| 26 | 26 | enum: |
| 27 | + - snps,ddrc-3.80a | |
| 27 | 28 | - xlnx,zynq-ddrc-a05 |
| 28 | 29 | - xlnx,zynqmp-ddrc-2.40a |
| 29 | − - snps,ddrc-3.80a | |
| 30 | 30 | |
| 31 | 31 | interrupts: |
| 32 | 32 | maxItems: 1 |
| @@ -43,7 +43,9 @@ allOf: · 10 unmodified lines | ||
| 43 | 43 | properties: |
| 44 | 44 | compatible: |
| 45 | 45 | contains: |
| 46 | − const: xlnx,zynqmp-ddrc-2.40a | |
| 46 | + enum: | |
| 47 | + - snps,ddrc-3.80a | |
| 48 | + - xlnx,zynqmp-ddrc-2.40a | |
| 47 | 49 | then: |
| 48 | 50 | required: |
| 49 | 51 | - interrupts |
| @@ -8,7 +8,7 @@ title: Texas Instruments da8xx DDR2/mDDR memory controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Bartosz Golaszewski <bgolaszewski@baylibre.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | Documentation: |
| @@ -54,7 +54,7 @@ flexcom@f8034000 { · 53 unmodified lines | ||
| 54 | 54 | clock-names = "spi_clk"; |
| 55 | 55 | atmel,fifo-size = <32>; |
| 56 | 56 | |
| 57 | − mtd_dataflash@0 { | |
| 57 | + flash@0 { | |
| 58 | 58 | compatible = "atmel,at25f512b"; |
| 59 | 59 | reg = <0>; |
| 60 | 60 | spi-max-frequency = <20000000>; |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB |
| @@ -8,7 +8,7 @@ title: Maxim MAX77686 Power Management IC · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | This is a part of device tree bindings for Maxim MAX77686 Power Management |
| @@ -8,7 +8,7 @@ title: Maxim MAX77693 MicroUSB and Companion Power Management IC · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | This is a part of device tree bindings for Maxim MAX77693 MicroUSB |
| @@ -8,7 +8,7 @@ title: Maxim MAX77802 Power Management IC · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Javier Martinez Canillas <javier@dowhile0.org> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | This is a part of device tree bindings for Maxim MAX77802 Power Management |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX77843 MicroUSB and Companion Power Management IC |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for Maxim MAX77843 MicroUSB |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos SoC Low Power Audio Subsystem (LPASS) |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2MPA01 Power Management IC |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2MPS11/13/14/15 and S2MPU02 Power Management IC |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S5M8767 Power Management IC |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -197,6 +197,8 @@ allOf: · 196 unmodified lines | ||
| 197 | 197 | - nvidia,tegra30-sdhci |
| 198 | 198 | - nvidia,tegra114-sdhci |
| 199 | 199 | - nvidia,tegra124-sdhci |
| 200 | + then: | |
| 201 | + properties: | |
| 200 | 202 | clocks: |
| 201 | 203 | items: |
| 202 | 204 | - description: module clock |
| @@ -27,32 +27,25 @@ description: · 26 unmodified lines | ||
| 27 | 27 | The realtek-mdio driver is an MDIO driver and it must be inserted inside |
| 28 | 28 | an MDIO node. |
| 29 | 29 | |
| 30 | + The compatible string is only used to identify which (silicon) family the | |
| 31 | + switch belongs to. Roughly speaking, a family is any set of Realtek switches | |
| 32 | + whose chip identification register(s) have a common location and semantics. | |
| 33 | + The different models in a given family can be automatically disambiguated by | |
| 34 | + parsing the chip identification register(s) according to the given family, | |
| 35 | + avoiding the need for a unique compatible string for each model. | |
| 36 | + | |
| 30 | 37 | properties: |
| 31 | 38 | compatible: |
| 32 | 39 | enum: |
| 33 | 40 | - realtek,rtl8365mb |
| 34 | − - realtek,rtl8366 | |
| 35 | 41 | - realtek,rtl8366rb |
| 36 | − - realtek,rtl8366s | |
| 37 | − - realtek,rtl8367 | |
| 38 | − - realtek,rtl8367b | |
| 39 | − - realtek,rtl8367rb | |
| 40 | − - realtek,rtl8367s | |
| 41 | − - realtek,rtl8368s | |
| 42 | − - realtek,rtl8369 | |
| 43 | − - realtek,rtl8370 | |
| 44 | 42 | description: | |
| 45 | − realtek,rtl8365mb: 4+1 ports | |
| 46 | − realtek,rtl8366: 5+1 ports | |
| 47 | − realtek,rtl8366rb: 5+1 ports | |
| 48 | − realtek,rtl8366s: 5+1 ports | |
| 49 | − realtek,rtl8367: | |
| 50 | − realtek,rtl8367b: | |
| 51 | − realtek,rtl8367rb: 5+2 ports | |
| 52 | − realtek,rtl8367s: 5+2 ports | |
| 53 | − realtek,rtl8368s: 8 ports | |
| 54 | − realtek,rtl8369: 8+1 ports | |
| 55 | − realtek,rtl8370: 8+2 ports | |
| 43 | + realtek,rtl8365mb: | |
| 44 | + Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB, | |
| 45 | + RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S, | |
| 46 | + RTL8367SB, RTL8370MB, RTL8310SR | |
| 47 | + realtek,rtl8366rb: | |
| 48 | + Use with models RTL8366RB, RTL8366S | |
| 56 | 49 | |
| 57 | 50 | mdc-gpios: |
| 58 | 51 | description: GPIO line for the MDC clock line. |
| @@ -335,7 +328,7 @@ examples: · 276 unmodified lines | ||
| 335 | 328 | #size-cells = <0>; |
| 336 | 329 | |
| 337 | 330 | switch@29 { |
| 338 | − compatible = "realtek,rtl8367s"; | |
| 331 | + compatible = "realtek,rtl8365mb"; | |
| 339 | 332 | reg = <29>; |
| 340 | 333 | |
| 341 | 334 | reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Marvell International Ltd. NCI NFC controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -8,7 +8,7 @@ title: NXP Semiconductors NCI NFC controller · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Charles Gorand <charles.gorand@effinnov.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | properties: |
| 14 | 14 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: NXP Semiconductors PN532 NFC controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: NXP Semiconductors PN544 NFC Controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: STMicroelectronics ST NCI NFC controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: STMicroelectronics SAS ST21NFCA NFC controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: STMicroelectronics ST95HF NFC controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Texas Instruments TRF7970A RFID/NFC/15693 Transceiver |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Mark Greer <mgreer@animalcreek.com> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -53,20 +53,18 @@ properties: · 52 unmodified lines | ||
| 53 | 53 | - allwinner,sun8i-r40-gmac |
| 54 | 54 | - allwinner,sun8i-v3s-emac |
| 55 | 55 | - allwinner,sun50i-a64-emac |
| 56 | − - loongson,ls2k-dwmac | |
| 57 | − - loongson,ls7a-dwmac | |
| 58 | 56 | - amlogic,meson6-dwmac |
| 59 | 57 | - amlogic,meson8b-dwmac |
| 60 | 58 | - amlogic,meson8m2-dwmac |
| 61 | 59 | - amlogic,meson-gxbb-dwmac |
| 62 | 60 | - amlogic,meson-axg-dwmac |
| 63 | − - loongson,ls2k-dwmac | |
| 64 | − - loongson,ls7a-dwmac | |
| 65 | 61 | - ingenic,jz4775-mac |
| 66 | 62 | - ingenic,x1000-mac |
| 67 | 63 | - ingenic,x1600-mac |
| 68 | 64 | - ingenic,x1830-mac |
| 69 | 65 | - ingenic,x2000-mac |
| 66 | + - loongson,ls2k-dwmac | |
| 67 | + - loongson,ls7a-dwmac | |
| 70 | 68 | - rockchip,px30-gmac |
| 71 | 69 | - rockchip,rk3128-gmac |
| 72 | 70 | - rockchip,rk3228-gmac |
| @@ -13,9 +13,6 @@ description: | · 12 unmodified lines | ||
| 13 | 13 | This describes the devicetree bindings for AVE ethernet controller |
| 14 | 14 | implemented on Socionext UniPhier SoCs. |
| 15 | 15 | |
| 16 | −allOf: | |
| 17 | − - $ref: ethernet-controller.yaml# | |
| 18 | − | |
| 19 | 16 | properties: |
| 20 | 17 | compatible: |
| 21 | 18 | enum: |
| @@ -44,25 +41,13 @@ properties: · 22 unmodified lines | ||
| 44 | 41 | minItems: 1 |
| 45 | 42 | maxItems: 4 |
| 46 | 43 | |
| 47 | − clock-names: | |
| 48 | − oneOf: | |
| 49 | − - items: # for Pro4 | |
| 50 | − - const: gio | |
| 51 | − - const: ether | |
| 52 | − - const: ether-gb | |
| 53 | − - const: ether-phy | |
| 54 | − - const: ether # for others | |
| 44 | + clock-names: true | |
| 55 | 45 | |
| 56 | 46 | resets: |
| 57 | 47 | minItems: 1 |
| 58 | 48 | maxItems: 2 |
| 59 | 49 | |
| 60 | − reset-names: | |
| 61 | − oneOf: | |
| 62 | − - items: # for Pro4 | |
| 63 | − - const: gio | |
| 64 | − - const: ether | |
| 65 | − - const: ether # for others | |
| 50 | + reset-names: true | |
| 66 | 51 | |
| 67 | 52 | socionext,syscon-phy-mode: |
| 68 | 53 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| @@ -78,6 +63,42 @@ properties: · 9 unmodified lines | ||
| 78 | 63 | $ref: mdio.yaml# |
| 79 | 64 | unevaluatedProperties: false |
| 80 | 65 | |
| 66 | +allOf: | |
| 67 | + - $ref: ethernet-controller.yaml# | |
| 68 | + - if: | |
| 69 | + properties: | |
| 70 | + compatible: | |
| 71 | + contains: | |
| 72 | + const: socionext,uniphier-pro4-ave4 | |
| 73 | + then: | |
| 74 | + properties: | |
| 75 | + clocks: | |
| 76 | + minItems: 4 | |
| 77 | + maxItems: 4 | |
| 78 | + clock-names: | |
| 79 | + items: | |
| 80 | + - const: gio | |
| 81 | + - const: ether | |
| 82 | + - const: ether-gb | |
| 83 | + - const: ether-phy | |
| 84 | + resets: | |
| 85 | + minItems: 2 | |
| 86 | + maxItems: 2 | |
| 87 | + reset-names: | |
| 88 | + items: | |
| 89 | + - const: gio | |
| 90 | + - const: ether | |
| 91 | + else: | |
| 92 | + properties: | |
| 93 | + clocks: | |
| 94 | + maxItems: 1 | |
| 95 | + clock-names: | |
| 96 | + const: ether | |
| 97 | + resets: | |
| 98 | + maxItems: 1 | |
| 99 | + reset-names: | |
| 100 | + const: ether | |
| 101 | + | |
| 81 | 102 | required: |
| 82 | 103 | - compatible |
| 83 | 104 | - reg |
| @@ -90,7 +111,7 @@ required: · 6 unmodified lines | ||
| 90 | 111 | - reset-names |
| 91 | 112 | - mdio |
| 92 | 113 | |
| 93 | −additionalProperties: false | |
| 114 | +unevaluatedProperties: false | |
| 94 | 115 | |
| 95 | 116 | examples: |
| 96 | 117 | - | |
| @@ -56,6 +56,7 @@ if: · 55 unmodified lines | ||
| 56 | 56 | compatible: |
| 57 | 57 | contains: |
| 58 | 58 | const: ti,davinci_mdio |
| 59 | +then: | |
| 59 | 60 | required: |
| 60 | 61 | - bus_freq |
| 61 | 62 | |
| @@ -275,17 +275,17 @@ allOf: · 274 unmodified lines | ||
| 275 | 275 | - nvidia,hssquelch-level |
| 276 | 276 | - nvidia,hsdiscon-level |
| 277 | 277 | |
| 278 | − else: | |
| 279 | − properties: | |
| 280 | − clocks: | |
| 281 | − maxItems: 4 | |
| 278 | + else: | |
| 279 | + properties: | |
| 280 | + clocks: | |
| 281 | + maxItems: 4 | |
| 282 | 282 | |
| 283 | − clock-names: | |
| 284 | − items: | |
| 285 | − - const: reg | |
| 286 | − - const: pll_u | |
| 287 | − - const: timer | |
| 288 | − - const: utmi-pads | |
| 283 | + clock-names: | |
| 284 | + items: | |
| 285 | + - const: reg | |
| 286 | + - const: pll_u | |
| 287 | + - const: timer | |
| 288 | + - const: utmi-pads | |
| 289 | 289 | |
| 290 | 290 | - if: |
| 291 | 291 | properties: |
| @@ -14,24 +14,24 @@ if: · 13 unmodified lines | ||
| 14 | 14 | compatible: |
| 15 | 15 | contains: |
| 16 | 16 | const: qcom,usb-hs-phy-apq8064 |
| 17 | − then: | |
| 18 | − properties: | |
| 19 | − resets: | |
| 20 | − maxItems: 1 | |
| 17 | +then: | |
| 18 | + properties: | |
| 19 | + resets: | |
| 20 | + maxItems: 1 | |
| 21 | 21 | |
| 22 | − reset-names: | |
| 23 | − const: por | |
| 22 | + reset-names: | |
| 23 | + const: por | |
| 24 | 24 | |
| 25 | − else: | |
| 26 | − properties: | |
| 27 | − resets: | |
| 28 | − minItems: 2 | |
| 29 | − maxItems: 2 | |
| 25 | +else: | |
| 26 | + properties: | |
| 27 | + resets: | |
| 28 | + minItems: 2 | |
| 29 | + maxItems: 2 | |
| 30 | 30 | |
| 31 | − reset-names: | |
| 32 | − items: | |
| 33 | − - const: phy | |
| 34 | − - const: por | |
| 31 | + reset-names: | |
| 32 | + items: | |
| 33 | + - const: phy | |
| 34 | + - const: por | |
| 35 | 35 | |
| 36 | 36 | properties: |
| 37 | 37 | compatible: |
| @@ -92,6 +92,8 @@ additionalProperties: false · 54 unmodified lines | ||
| 92 | 92 | examples: |
| 93 | 93 | - | |
| 94 | 94 | otg: usb-controller { |
| 95 | + #reset-cells = <1>; | |
| 96 | + | |
| 95 | 97 | ulpi { |
| 96 | 98 | phy { |
| 97 | 99 | compatible = "qcom,usb-hs-phy-msm8974", "qcom,usb-hs-phy"; |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos SoC DisplayPort PHY |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Marek Szyprowski <m.szyprowski@samsung.com> |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | |
| @@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | - Joonyoung Shim <jy0922.shim@samsung.com> |
| 12 | 12 | - Seung-Woo Kim <sw0312.kim@samsung.com> |
| 13 | 13 | - Kyungmin Park <kyungmin.park@samsung.com> |
| 14 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 14 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 15 | 15 | |
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos5250 SoC SATA PHY |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Marek Szyprowski <m.szyprowski@samsung.com> |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S5P/Exynos SoC MIPI CSIS/DSIM DPHY |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Marek Szyprowski <m.szyprowski@samsung.com> |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S5P/Exynos SoC USB 2.0 PHY |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Marek Szyprowski <m.szyprowski@samsung.com> |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos SoC USB 3.0 DRD PHY USB 2.0 PHY |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Marek Szyprowski <m.szyprowski@samsung.com> |
| 12 | 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | 13 | |
| @@ -48,13 +48,12 @@ properties: · 47 unmodified lines | ||
| 48 | 48 | Name of one pin group to configure. |
| 49 | 49 | enum: [ aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1, |
| 50 | 50 | pdmspk2, dmic4, dmic5, dmic6, gpio1, gpio2, gpio3, |
| 51 | − gpio4, gpio5, gpio6, gpio7, gpio7, gpio8, gpio9, | |
| 51 | + gpio4, gpio5, gpio6, gpio7, gpio8, gpio9, | |
| 52 | 52 | gpio10, gpio11, gpio12, gpio13, gpio14, gpio15, |
| 53 | − gpio16, gpio17, gpio17, gpio18, gpio19, gpio20, | |
| 54 | − gpio21, gpio22, gpio23, gpio24, gpio25, gpio26, | |
| 55 | − gpio27, gpio27, gpio28, gpio29, gpio30, gpio31, | |
| 56 | − gpio32, gpio33, gpio34, gpio35, gpio36, gpio37, | |
| 57 | − gpio37, gpio38, gpio39 ] | |
| 53 | + gpio16, gpio17, gpio18, gpio19, gpio20, gpio21, | |
| 54 | + gpio22, gpio23, gpio24, gpio25, gpio26, gpio27, | |
| 55 | + gpio28, gpio29, gpio30, gpio31, gpio32, gpio33, | |
| 56 | + gpio34, gpio35, gpio36, gpio37, gpio38, gpio39 ] | |
| 58 | 57 | |
| 59 | 58 | function: |
| 60 | 59 | description: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S3C/S5P/Exynos SoC pin controller - gpio bank |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 13 | 13 | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 13 | 13 | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S3C/S5P/Exynos SoC pin controller - wake-up interrupt controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 13 | 13 | |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S3C/S5P/Exynos SoC pin controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 13 | 13 | |
| @@ -36,7 +36,8 @@ properties: · 35 unmodified lines | ||
| 36 | 36 | cpus: |
| 37 | 37 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| 38 | 38 | items: |
| 39 | − maxItems: 1 | |
| 39 | + minItems: 1 | |
| 40 | + maxItems: 4 | |
| 40 | 41 | description: | |
| 41 | 42 | Array of phandles pointing to CPU cores, which should match the order of |
| 42 | 43 | CPU cores used by the WUPCR and PSTR registers in the Advanced Power |
| @@ -16,7 +16,6 @@ allOf: · 15 unmodified lines | ||
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| 18 | 18 | enum: |
| 19 | − - ti,bq24150 | |
| 20 | 19 | - ti,bq24150 |
| 21 | 20 | - ti,bq24150a |
| 22 | 21 | - ti,bq24151 |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC Charger |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX77693 MicroUSB and Companion Power Management IC Charger |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated |
| @@ -18,23 +18,23 @@ description: · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | allOf: |
| 20 | 20 | - $ref: "regulator.yaml#" |
| 21 | − | |
| 22 | −if: | |
| 23 | − properties: | |
| 24 | − compatible: | |
| 25 | − contains: | |
| 26 | − const: regulator-fixed-clock | |
| 27 | − required: | |
| 28 | − - clocks | |
| 29 | −else: | |
| 30 | − if: | |
| 31 | − properties: | |
| 32 | − compatible: | |
| 33 | − contains: | |
| 34 | − const: regulator-fixed-domain | |
| 35 | − required: | |
| 36 | − - power-domains | |
| 37 | − - required-opps | |
| 21 | + - if: | |
| 22 | + properties: | |
| 23 | + compatible: | |
| 24 | + contains: | |
| 25 | + const: regulator-fixed-clock | |
| 26 | + then: | |
| 27 | + required: | |
| 28 | + - clocks | |
| 29 | + - if: | |
| 30 | + properties: | |
| 31 | + compatible: | |
| 32 | + contains: | |
| 33 | + const: regulator-fixed-domain | |
| 34 | + then: | |
| 35 | + required: | |
| 36 | + - power-domains | |
| 37 | + - required-opps | |
| 38 | 38 | |
| 39 | 39 | properties: |
| 40 | 40 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB |
| @@ -8,7 +8,7 @@ title: Maxim MAX77686 Power Management IC regulators · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | This is a part of device tree bindings for Maxim MAX77686 Power Management |
| @@ -8,7 +8,7 @@ title: Maxim MAX77693 MicroUSB and Companion Power Management IC regulators · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated |
| @@ -8,7 +8,7 @@ title: Maxim MAX77802 Power Management IC regulators · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Javier Martinez Canillas <javier@dowhile0.org> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | This is a part of device tree bindings for Maxim MAX77802 Power Management |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX77843 MicroUSB and Companion Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for Maxim MAX77843 MicroUSB Integrated |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX8952 voltage regulator |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | allOf: |
| 13 | 13 | - $ref: regulator.yaml# |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX8973/MAX77621 voltage regulator |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | allOf: |
| 13 | 13 | - $ref: regulator.yaml# |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Maxim MAX8997 Power Management IC |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | The Maxim MAX8997 is a Power Management IC which includes voltage and current |
| @@ -58,7 +58,7 @@ properties: · 57 unmodified lines | ||
| 58 | 58 | type: object |
| 59 | 59 | $ref: regulator.yaml# |
| 60 | 60 | description: | |
| 61 | − regulator description for buck1 and buck4. | |
| 61 | + regulator description for buck1 to buck4, and ldo. | |
| 62 | 62 | |
| 63 | 63 | properties: |
| 64 | 64 | regulator-allowed-modes: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2MPA01 Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2MPS11 Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2MPS13 Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2MPS14 Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2MPS15 Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S2MPU02 Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S5M8767 Power Management IC regulators |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | This is a part of device tree bindings for S2M and S5M family of Power |
| @@ -104,8 +104,7 @@ properties: · 103 unmodified lines | ||
| 104 | 104 | qcom,smem-state-names: |
| 105 | 105 | $ref: /schemas/types.yaml#/definitions/string |
| 106 | 106 | description: The names of the state bits used for SMP2P output |
| 107 | − items: | |
| 108 | − - const: stop | |
| 107 | + const: stop | |
| 109 | 108 | |
| 110 | 109 | glink-edge: |
| 111 | 110 | type: object |
| @@ -130,7 +129,6 @@ properties: · 18 unmodified lines | ||
| 130 | 129 | qcom,remote-pid: |
| 131 | 130 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 132 | 131 | description: ID of the shared memory used by GLINK for communication with WPSS |
| 133 | − maxItems: 1 | |
| 134 | 132 | |
| 135 | 133 | required: |
| 136 | 134 | - interrupts |
| @@ -24,6 +24,11 @@ properties: · 23 unmodified lines | ||
| 24 | 24 | - const: hisilicon,hi3670-reset |
| 25 | 25 | - const: hisilicon,hi3660-reset |
| 26 | 26 | |
| 27 | + hisi,rst-syscon: | |
| 28 | + deprecated: true | |
| 29 | + description: phandle of the reset's syscon, use hisilicon,rst-syscon instead | |
| 30 | + $ref: /schemas/types.yaml#/definitions/phandle | |
| 31 | + | |
| 27 | 32 | hisilicon,rst-syscon: |
| 28 | 33 | description: phandle of the reset's syscon. |
| 29 | 34 | $ref: /schemas/types.yaml#/definitions/phandle |
| @@ -55,6 +55,9 @@ properties: · 54 unmodified lines | ||
| 55 | 55 | "#reset-cells": |
| 56 | 56 | const: 1 |
| 57 | 57 | |
| 58 | + resets: | |
| 59 | + maxItems: 1 | |
| 60 | + | |
| 58 | 61 | additionalProperties: false |
| 59 | 62 | |
| 60 | 63 | required: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos SoC True Random Number Generator |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Łukasz Stelmach <l.stelmach@samsung.com> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: TimerIO Random Number Generator |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -31,11 +31,19 @@ properties: · 30 unmodified lines | ||
| 31 | 31 | to that of the RTC's count register. |
| 32 | 32 | |
| 33 | 33 | clocks: |
| 34 | − maxItems: 1 | |
| 34 | + items: | |
| 35 | + - description: | | |
| 36 | + AHB clock | |
| 37 | + - description: | | |
| 38 | + Reference clock: divided by the prescaler to create a time-based | |
| 39 | + strobe (typically 1 Hz) for the calendar counter. By default, the rtc | |
| 40 | + on the PolarFire SoC shares it's reference with MTIMER so this will | |
| 41 | + be a 1 MHz clock. | |
| 35 | 42 | |
| 36 | 43 | clock-names: |
| 37 | 44 | items: |
| 38 | 45 | - const: rtc |
| 46 | + - const: rtcref | |
| 39 | 47 | |
| 40 | 48 | required: |
| 41 | 49 | - compatible |
| @@ -48,11 +56,12 @@ additionalProperties: false · 6 unmodified lines | ||
| 48 | 56 | |
| 49 | 57 | examples: |
| 50 | 58 | - | |
| 59 | + #include "dt-bindings/clock/microchip,mpfs-clock.h" | |
| 51 | 60 | rtc@20124000 { |
| 52 | 61 | compatible = "microchip,mpfs-rtc"; |
| 53 | 62 | reg = <0x20124000 0x1000>; |
| 54 | − clocks = <&clkcfg 21>; | |
| 55 | − clock-names = "rtc"; | |
| 63 | + clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>; | |
| 64 | + clock-names = "rtc", "rtcref"; | |
| 56 | 65 | interrupts = <80>, <81>; |
| 57 | 66 | }; |
| 58 | 67 | ... |
| @@ -8,7 +8,7 @@ title: Samsung's Exynos USI (Universal Serial Interface) binding · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Sam Protsenko <semen.protsenko@linaro.org> |
| 11 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 11 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 12 | 12 | |
| 13 | 13 | description: | |
| 14 | 14 | USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C). |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Insignal Arndale boards audio complex |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung SMDK5250 audio complex with WM8994 codec |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Google Snow audio complex with MAX9809x codec |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos5433 TM2(E) audio complex with WM5110 codec |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | 12 | |
| 13 | 13 | properties: |
| @@ -136,8 +136,7 @@ allOf: · 135 unmodified lines | ||
| 136 | 136 | compatible: |
| 137 | 137 | contains: |
| 138 | 138 | const: st,stm32f4-sai |
| 139 | − | |
| 140 | − - then: | |
| 139 | + then: | |
| 141 | 140 | properties: |
| 142 | 141 | clocks: |
| 143 | 142 | items: |
| @@ -148,8 +147,7 @@ allOf: · 4 unmodified lines | ||
| 148 | 147 | items: |
| 149 | 148 | - const: x8k |
| 150 | 149 | - const: x11k |
| 151 | − | |
| 152 | − - else: | |
| 150 | + else: | |
| 153 | 151 | properties: |
| 154 | 152 | clocks: |
| 155 | 153 | items: |
| @@ -124,7 +124,6 @@ properties: · 123 unmodified lines | ||
| 124 | 124 | description: | |
| 125 | 125 | Override the default TX fifo size. Unit is words. Ignored if 0. |
| 126 | 126 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 127 | − maxItems: 1 | |
| 128 | 127 | default: 64 |
| 129 | 128 | |
| 130 | 129 | renesas,rx-fifo-size: |
| @@ -132,7 +131,6 @@ properties: · 1 unmodified line | ||
| 132 | 131 | description: | |
| 133 | 132 | Override the default RX fifo size. Unit is words. Ignored if 0. |
| 134 | 133 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 135 | − maxItems: 1 | |
| 136 | 134 | default: 64 |
| 137 | 135 | |
| 138 | 136 | required: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Peripheral-specific properties for Samsung S3C/S5P/Exynos SoC SPI controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: |
| 13 | 13 | See spi-peripheral-props.yaml for more info. |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung S3C/S5P/Exynos SoC SPI controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: |
| 13 | 13 | All the SPI controller nodes should be represented in the aliases node using |
| @@ -136,14 +136,14 @@ required: · 135 unmodified lines | ||
| 136 | 136 | - reg |
| 137 | 137 | |
| 138 | 138 | if: |
| 139 | − properties: | |
| 140 | − compatible: | |
| 141 | − contains: | |
| 142 | − enum: | |
| 143 | − - qcom,rpm-msg-ram | |
| 144 | − - rockchip,rk3288-pmu-sram | |
| 145 | − | |
| 146 | −else: | |
| 139 | + not: | |
| 140 | + properties: | |
| 141 | + compatible: | |
| 142 | + contains: | |
| 143 | + enum: | |
| 144 | + - qcom,rpm-msg-ram | |
| 145 | + - rockchip,rk3288-pmu-sram | |
| 146 | +then: | |
| 147 | 147 | required: |
| 148 | 148 | - "#address-cells" |
| 149 | 149 | - "#size-cells" |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos SoC Thermal Management Unit (TMU) |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | 13 | For multi-instance tmu each instance should have an alias correctly numbered |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos SoC USB 3.0 DWC3 Controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | ||
| 7 | 7 | title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | − - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | |
| 10 | + - Krzysztof Kozlowski <krzk@kernel.org> | |
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| @@ -62,6 +62,7 @@ required: · 48 unmodified lines | ||
| 62 | 62 | - interrupts |
| 63 | 63 | - phys |
| 64 | 64 | - phy-names |
| 65 | + - reg | |
| 65 | 66 | |
| 66 | 67 | allOf: |
| 67 | 68 | - if: |
| @@ -73,7 +73,7 @@ busy. · 72 unmodified lines | ||
| 73 | 73 | If successful, the cache backend can then start setting up the cache. In the |
| 74 | 74 | event that the initialisation fails, the cache backend should call:: |
| 75 | 75 | |
| 76 | − void fscache_relinquish_cookie(struct fscache_cache *cache); | |
| 76 | + void fscache_relinquish_cache(struct fscache_cache *cache); | |
| 77 | 77 | |
| 78 | 78 | to reset and discard the cookie. |
| 79 | 79 | |
| @@ -110,9 +110,9 @@ to withdraw them, calling:: · 30 unmodified lines | ||
| 110 | 110 | |
| 111 | 111 | on the cookie that each object belongs to. This schedules the specified cookie |
| 112 | 112 | for withdrawal. This gets offloaded to a workqueue. The cache backend can |
| 113 | −test for completion by calling:: | |
| 113 | +wait for completion by calling:: | |
| 114 | 114 | |
| 115 | − bool fscache_are_objects_withdrawn(struct fscache_cookie *cache); | |
| 115 | + void fscache_wait_for_objects(struct fscache_cache *cache); | |
| 116 | 116 | |
| 117 | 117 | Once all the cookies are withdrawn, a cache backend can withdraw all the |
| 118 | 118 | volumes, calling:: |
| @@ -125,7 +125,7 @@ outstanding accesses on the volume to complete before returning. · 6 unmodified lines | ||
| 125 | 125 | When the the cache is completely withdrawn, fscache should be notified by |
| 126 | 126 | calling:: |
| 127 | 127 | |
| 128 | − void fscache_cache_relinquish(struct fscache_cache *cache); | |
| 128 | + void fscache_relinquish_cache(struct fscache_cache *cache); | |
| 129 | 129 | |
| 130 | 130 | to clear fields in the cookie and discard the caller's ref on it. |
| 131 | 131 | |
| @@ -404,22 +404,21 @@ schedule a write of that region:: · 403 unmodified lines | ||
| 404 | 404 | And if an error occurs before that point is reached, the marks can be removed |
| 405 | 405 | by calling:: |
| 406 | 406 | |
| 407 | − void fscache_clear_page_bits(struct fscache_cookie *cookie, | |
| 408 | − struct address_space *mapping, | |
| 407 | + void fscache_clear_page_bits(struct address_space *mapping, | |
| 409 | 408 | loff_t start, size_t len, |
| 410 | 409 | bool caching) |
| 411 | 410 | |
| 412 | −In both of these functions, the cookie representing the cache object to be | |
| 413 | −written to and a pointer to the mapping to which the source pages are attached | |
| 414 | −are passed in; start and len indicate the size of the region that's going to be | |
| 415 | −written (it doesn't have to align to page boundaries necessarily, but it does | |
| 416 | −have to align to DIO boundaries on the backing filesystem). The caching | |
| 417 | −parameter indicates if caching should be skipped, and if false, the functions | |
| 418 | −do nothing. | |
| 419 | − | |
| 420 | −The write function takes some additional parameters: i_size indicates the size | |
| 421 | −of the netfs file and term_func indicates an optional completion function, to | |
| 422 | −which term_func_priv will be passed, along with the error or amount written. | |
| 411 | +In these functions, a pointer to the mapping to which the source pages are | |
| 412 | +attached is passed in and start and len indicate the size of the region that's | |
| 413 | +going to be written (it doesn't have to align to page boundaries necessarily, | |
| 414 | +but it does have to align to DIO boundaries on the backing filesystem). The | |
| 415 | +caching parameter indicates if caching should be skipped, and if false, the | |
| 416 | +functions do nothing. | |
| 417 | + | |
| 418 | +The write function takes some additional parameters: the cookie representing | |
| 419 | +the cache object to be written to, i_size indicates the size of the netfs file | |
| 420 | +and term_func indicates an optional completion function, to which | |
| 421 | +term_func_priv will be passed, along with the error or amount written. | |
| 423 | 422 | |
| 424 | 423 | Note that the write function will always run asynchronously and will unmark all |
| 425 | 424 | the pages upon completion before calling term_func. |
| @@ -76,7 +76,7 @@ The beginning of an extended attribute block is in · 75 unmodified lines | ||
| 76 | 76 | - Checksum of the extended attribute block. |
| 77 | 77 | * - 0x14 |
| 78 | 78 | - \_\_u32 |
| 79 | − - h\_reserved[2] | |
| 79 | + - h\_reserved[3] | |
| 80 | 80 | - Zero. |
| 81 | 81 | |
| 82 | 82 | The checksum is calculated against the FS UUID, the 64-bit block number |
| @@ -235,12 +235,6 @@ offgrpjquota Turn off group journalled quota. · 234 unmodified lines | ||
| 235 | 235 | offprjjquota Turn off project journalled quota. |
| 236 | 236 | quota Enable plain user disk quota accounting. |
| 237 | 237 | noquota Disable all plain disk quota option. |
| 238 | −whint_mode=%s Control which write hints are passed down to block | |
| 239 | − layer. This supports "off", "user-based", and | |
| 240 | − "fs-based". In "off" mode (default), f2fs does not pass | |
| 241 | − down hints. In "user-based" mode, f2fs tries to pass | |
| 242 | − down hints given by users. And in "fs-based" mode, f2fs | |
| 243 | − passes down hints with its policy. | |
| 244 | 238 | alloc_mode=%s Adjust block allocation policy, which supports "reuse" |
| 245 | 239 | and "default". |
| 246 | 240 | fsync_mode=%s Control the policy of fsync. Currently supports "posix", |
| @@ -751,70 +745,6 @@ In order to identify whether the data in the victim segment are valid or not, · 504 unmodified lines | ||
| 751 | 745 | F2FS manages a bitmap. Each bit represents the validity of a block, and the |
| 752 | 746 | bitmap is composed of a bit stream covering whole blocks in main area. |
| 753 | 747 | |
| 754 | −Write-hint Policy | |
| 755 | −----------------- | |
| 756 | − | |
| 757 | −1) whint_mode=off. F2FS only passes down WRITE_LIFE_NOT_SET. | |
| 758 | − | |
| 759 | −2) whint_mode=user-based. F2FS tries to pass down hints given by | |
| 760 | −users. | |
| 761 | − | |
| 762 | −===================== ======================== =================== | |
| 763 | −User F2FS Block | |
| 764 | −===================== ======================== =================== | |
| 765 | −N/A META WRITE_LIFE_NOT_SET | |
| 766 | −N/A HOT_NODE " | |
| 767 | −N/A WARM_NODE " | |
| 768 | −N/A COLD_NODE " | |
| 769 | −ioctl(COLD) COLD_DATA WRITE_LIFE_EXTREME | |
| 770 | −extension list " " | |
| 771 | − | |
| 772 | −-- buffered io | |
| 773 | −WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME | |
| 774 | −WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT | |
| 775 | −WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET | |
| 776 | −WRITE_LIFE_NONE " " | |
| 777 | −WRITE_LIFE_MEDIUM " " | |
| 778 | −WRITE_LIFE_LONG " " | |
| 779 | − | |
| 780 | −-- direct io | |
| 781 | −WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME | |
| 782 | −WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT | |
| 783 | −WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET | |
| 784 | −WRITE_LIFE_NONE " WRITE_LIFE_NONE | |
| 785 | −WRITE_LIFE_MEDIUM " WRITE_LIFE_MEDIUM | |
| 786 | −WRITE_LIFE_LONG " WRITE_LIFE_LONG | |
| 787 | −===================== ======================== =================== | |
| 788 | − | |
| 789 | −3) whint_mode=fs-based. F2FS passes down hints with its policy. | |
| 790 | − | |
| 791 | −===================== ======================== =================== | |
| 792 | −User F2FS Block | |
| 793 | −===================== ======================== =================== | |
| 794 | −N/A META WRITE_LIFE_MEDIUM; | |
| 795 | −N/A HOT_NODE WRITE_LIFE_NOT_SET | |
| 796 | −N/A WARM_NODE " | |
| 797 | −N/A COLD_NODE WRITE_LIFE_NONE | |
| 798 | −ioctl(COLD) COLD_DATA WRITE_LIFE_EXTREME | |
| 799 | −extension list " " | |
| 800 | − | |
| 801 | −-- buffered io | |
| 802 | −WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME | |
| 803 | −WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT | |
| 804 | −WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_LONG | |
| 805 | −WRITE_LIFE_NONE " " | |
| 806 | −WRITE_LIFE_MEDIUM " " | |
| 807 | −WRITE_LIFE_LONG " " | |
| 808 | − | |
| 809 | −-- direct io | |
| 810 | −WRITE_LIFE_EXTREME COLD_DATA WRITE_LIFE_EXTREME | |
| 811 | −WRITE_LIFE_SHORT HOT_DATA WRITE_LIFE_SHORT | |
| 812 | −WRITE_LIFE_NOT_SET WARM_DATA WRITE_LIFE_NOT_SET | |
| 813 | −WRITE_LIFE_NONE " WRITE_LIFE_NONE | |
| 814 | −WRITE_LIFE_MEDIUM " WRITE_LIFE_MEDIUM | |
| 815 | −WRITE_LIFE_LONG " WRITE_LIFE_LONG | |
| 816 | −===================== ======================== =================== | |
| 817 | − | |
| 818 | 748 | Fallocate(2) Policy |
| 819 | 749 | ------------------- |
| 820 | 750 | |
| @@ -894,7 +894,7 @@ xmit_hash_policy · 893 unmodified lines | ||
| 894 | 894 | Uses XOR of hardware MAC addresses and packet type ID |
| 895 | 895 | field to generate the hash. The formula is |
| 896 | 896 | |
| 897 | − hash = source MAC XOR destination MAC XOR packet type ID | |
| 897 | + hash = source MAC[5] XOR destination MAC[5] XOR packet type ID | |
| 898 | 898 | slave number = hash modulo slave count |
| 899 | 899 | |
| 900 | 900 | This algorithm will place all traffic to a particular |
| @@ -910,7 +910,7 @@ xmit_hash_policy · 9 unmodified lines | ||
| 910 | 910 | Uses XOR of hardware MAC addresses and IP addresses to |
| 911 | 911 | generate the hash. The formula is |
| 912 | 912 | |
| 913 | − hash = source MAC XOR destination MAC XOR packet type ID | |
| 913 | + hash = source MAC[5] XOR destination MAC[5] XOR packet type ID | |
| 914 | 914 | hash = hash XOR source IP XOR destination IP |
| 915 | 915 | hash = hash XOR (hash RSHIFT 16) |
| 916 | 916 | hash = hash XOR (hash RSHIFT 8) |
| @@ -267,6 +267,13 @@ ipfrag_max_dist - INTEGER · 266 unmodified lines | ||
| 267 | 267 | from different IP datagrams, which could result in data corruption. |
| 268 | 268 | Default: 64 |
| 269 | 269 | |
| 270 | +bc_forwarding - INTEGER | |
| 271 | + bc_forwarding enables the feature described in rfc1812#section-5.3.5.2 | |
| 272 | + and rfc2644. It allows the router to forward directed broadcast. | |
| 273 | + To enable this feature, the 'all' entry and the input interface entry | |
| 274 | + should be set to 1. | |
| 275 | + Default: 0 | |
| 276 | + | |
| 270 | 277 | INET peer storage |
| 271 | 278 | ================= |
| 272 | 279 | |
| @@ -121,26 +121,36 @@ even scarier, uses an easily brute-forcable 64-bit key (with a 32-bit output) · 120 unmodified lines | ||
| 121 | 121 | instead of SipHash's 128-bit key. However, this may appeal to some |
| 122 | 122 | high-performance `jhash` users. |
| 123 | 123 | |
| 124 | −Danger! | |
| 125 | − | |
| 126 | −Do not ever use HalfSipHash except for as a hashtable key function, and only | |
| 127 | −then when you can be absolutely certain that the outputs will never be | |
| 128 | −transmitted out of the kernel. This is only remotely useful over `jhash` as a | |
| 129 | −means of mitigating hashtable flooding denial of service attacks. | |
| 130 | − | |
| 131 | −Generating a HalfSipHash key | |
| 132 | −============================ | |
| 124 | +HalfSipHash support is provided through the "hsiphash" family of functions. | |
| 125 | + | |
| 126 | +.. warning:: | |
| 127 | + Do not ever use the hsiphash functions except for as a hashtable key | |
| 128 | + function, and only then when you can be absolutely certain that the outputs | |
| 129 | + will never be transmitted out of the kernel. This is only remotely useful | |
| 130 | + over `jhash` as a means of mitigating hashtable flooding denial of service | |
| 131 | + attacks. | |
| 132 | + | |
| 133 | +On 64-bit kernels, the hsiphash functions actually implement SipHash-1-3, a | |
| 134 | +reduced-round variant of SipHash, instead of HalfSipHash-1-3. This is because in | |
| 135 | +64-bit code, SipHash-1-3 is no slower than HalfSipHash-1-3, and can be faster. | |
| 136 | +Note, this does *not* mean that in 64-bit kernels the hsiphash functions are the | |
| 137 | +same as the siphash ones, or that they are secure; the hsiphash functions still | |
| 138 | +use a less secure reduced-round algorithm and truncate their outputs to 32 | |
| 139 | +bits. | |
| 140 | + | |
| 141 | +Generating a hsiphash key | |
| 142 | +========================= | |
| 133 | 143 | |
| 134 | 144 | Keys should always be generated from a cryptographically secure source of |
| 135 | −random numbers, either using get_random_bytes or get_random_once: | |
| 145 | +random numbers, either using get_random_bytes or get_random_once:: | |
| 136 | 146 | |
| 137 | −hsiphash_key_t key; | |
| 138 | −get_random_bytes(&key, sizeof(key)); | |
| 147 | + hsiphash_key_t key; | |
| 148 | + get_random_bytes(&key, sizeof(key)); | |
| 139 | 149 | |
| 140 | 150 | If you're not deriving your key from here, you're doing it wrong. |
| 141 | 151 | |
| 142 | −Using the HalfSipHash functions | |
| 143 | −=============================== | |
| 152 | +Using the hsiphash functions | |
| 153 | +============================ | |
| 144 | 154 | |
| 145 | 155 | There are two variants of the function, one that takes a list of integers, and |
| 146 | 156 | one that takes a buffer:: |
| @@ -183,7 +193,7 @@ You may then iterate like usual over the returned hash bucket. · 36 unmodified lines | ||
| 183 | 193 | Performance |
| 184 | 194 | =========== |
| 185 | 195 | |
| 186 | −HalfSipHash is roughly 3 times slower than JenkinsHash. For many replacements, | |
| 187 | −this will not be a problem, as the hashtable lookup isn't the bottleneck. And | |
| 188 | −in general, this is probably a good sacrifice to make for the security and DoS | |
| 189 | −resistance of HalfSipHash. | |
| 196 | +hsiphash() is roughly 3 times slower than jhash(). For many replacements, this | |
| 197 | +will not be a problem, as the hashtable lookup isn't the bottleneck. And in | |
| 198 | +general, this is probably a good sacrifice to make for the security and DoS | |
| 199 | +resistance of hsiphash(). | |
| @@ -5986,16 +5986,16 @@ should put the acknowledged interrupt vector into the 'epr' field. · 5985 unmodified lines | ||
| 5986 | 5986 | #define KVM_SYSTEM_EVENT_RESET 2 |
| 5987 | 5987 | #define KVM_SYSTEM_EVENT_CRASH 3 |
| 5988 | 5988 | __u32 type; |
| 5989 | − __u64 flags; | |
| 5989 | + __u32 ndata; | |
| 5990 | + __u64 data[16]; | |
| 5990 | 5991 | } system_event; |
| 5991 | 5992 | |
| 5992 | 5993 | If exit_reason is KVM_EXIT_SYSTEM_EVENT then the vcpu has triggered |
| 5993 | 5994 | a system-level event using some architecture specific mechanism (hypercall |
| 5994 | 5995 | or some special instruction). In case of ARM64, this is triggered using |
| 5995 | −HVC instruction based PSCI call from the vcpu. The 'type' field describes | |
| 5996 | −the system-level event type. The 'flags' field describes architecture | |
| 5997 | −specific flags for the system-level event. | |
| 5996 | +HVC instruction based PSCI call from the vcpu. | |
| 5998 | 5997 | |
| 5998 | +The 'type' field describes the system-level event type. | |
| 5999 | 5999 | Valid values for 'type' are: |
| 6000 | 6000 | |
| 6001 | 6001 | - KVM_SYSTEM_EVENT_SHUTDOWN -- the guest has requested a shutdown of the |
| @@ -6010,10 +6010,20 @@ Valid values for 'type' are: · 8 unmodified lines | ||
| 6010 | 6010 | to ignore the request, or to gather VM memory core dump and/or |
| 6011 | 6011 | reset/shutdown of the VM. |
| 6012 | 6012 | |
| 6013 | −Valid flags are: | |
| 6013 | +If KVM_CAP_SYSTEM_EVENT_DATA is present, the 'data' field can contain | |
| 6014 | +architecture specific information for the system-level event. Only | |
| 6015 | +the first `ndata` items (possibly zero) of the data array are valid. | |
| 6014 | 6016 | |
| 6015 | − - KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 (arm64 only) -- the guest issued | |
| 6016 | − a SYSTEM_RESET2 call according to v1.1 of the PSCI specification. | |
| 6017 | + - for arm64, data[0] is set to KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 if | |
| 6018 | + the guest issued a SYSTEM_RESET2 call according to v1.1 of the PSCI | |
| 6019 | + specification. | |
| 6020 | + | |
| 6021 | + - for RISC-V, data[0] is set to the value of the second argument of the | |
| 6022 | + ``sbi_system_reset`` call. | |
| 6023 | + | |
| 6024 | +Previous versions of Linux defined a `flags` member in this struct. The | |
| 6025 | +field is now aliased to `data[0]`. Userspace can assume that it is only | |
| 6026 | +written if ndata is greater than 0. | |
| 6017 | 6027 | |
| 6018 | 6028 | :: |
| 6019 | 6029 | |
| @@ -6190,6 +6200,7 @@ Valid values for 'type' are: · 170 unmodified lines | ||
| 6190 | 6200 | unsigned long args[6]; |
| 6191 | 6201 | unsigned long ret[2]; |
| 6192 | 6202 | } riscv_sbi; |
| 6203 | + | |
| 6193 | 6204 | If exit reason is KVM_EXIT_RISCV_SBI then it indicates that the VCPU has |
| 6194 | 6205 | done a SBI call which is not handled by KVM RISC-V kernel module. The details |
| 6195 | 6206 | of the SBI call are available in 'riscv_sbi' member of kvm_run structure. The |
| @@ -1,3 +1,5 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 1 | 3 | ================= |
| 2 | 4 | KVM VCPU Requests |
| 3 | 5 | ================= |
| @@ -1,3 +1,5 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 1 | 3 | ====================================== |
| 2 | 4 | Secure Encrypted Virtualization (SEV) |
| 3 | 5 | ====================================== |
| @@ -1,3 +1,4 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 1 | 2 | |
| 2 | 3 | ======================================= |
| 3 | 4 | Known limitations of CPU virtualization |
| @@ -36,4 +37,3 @@ Nested virtualization features · 32 unmodified lines | ||
| 36 | 37 | ------------------------------ |
| 37 | 38 | |
| 38 | 39 | TBD |
| 39 | − | |
| @@ -1,3 +1,5 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 1 | 3 | ============================== |
| 2 | 4 | Running nested guests with KVM |
| 3 | 5 | ============================== |
| @@ -110,7 +110,7 @@ Usage · 109 unmodified lines | ||
| 110 | 110 | If you want to sort by the page nums of buf, use the ``-m`` parameter. |
| 111 | 111 | The detailed parameters are: |
| 112 | 112 | |
| 113 | − fundamental function: | |
| 113 | + fundamental function:: | |
| 114 | 114 | |
| 115 | 115 | Sort: |
| 116 | 116 | -a Sort by memory allocation time. |
| @@ -122,7 +122,7 @@ Usage · 5 unmodified lines | ||
| 122 | 122 | -s Sort by stack trace. |
| 123 | 123 | -t Sort by times (default). |
| 124 | 124 | |
| 125 | − additional function: | |
| 125 | + additional function:: | |
| 126 | 126 | |
| 127 | 127 | Cull: |
| 128 | 128 | --cull <rules> |
| @@ -153,6 +153,7 @@ Usage · 24 unmodified lines | ||
| 153 | 153 | |
| 154 | 154 | STANDARD FORMAT SPECIFIERS |
| 155 | 155 | ========================== |
| 156 | +:: | |
| 156 | 157 | |
| 157 | 158 | KEY LONG DESCRIPTION |
| 158 | 159 | p pid process ID |
| @@ -201,6 +201,7 @@ F: include/net/ieee80211_radiotap.h · 200 unmodified lines | ||
| 201 | 201 | F: include/net/iw_handler.h |
| 202 | 202 | F: include/net/wext.h |
| 203 | 203 | F: include/uapi/linux/nl80211.h |
| 204 | +F: include/uapi/linux/wireless.h | |
| 204 | 205 | F: net/wireless/ |
| 205 | 206 | |
| 206 | 207 | 8169 10/100/1000 GIGABIT ETHERNET DRIVER |
| @@ -2636,13 +2637,14 @@ F: sound/soc/rockchip/ · 2429 unmodified lines | ||
| 2636 | 2637 | N: rockchip |
| 2637 | 2638 | |
| 2638 | 2639 | ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES |
| 2639 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 2640 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 2640 | 2641 | R: Alim Akhtar <alim.akhtar@samsung.com> |
| 2641 | 2642 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 2642 | 2643 | L: linux-samsung-soc@vger.kernel.org |
| 2643 | 2644 | S: Maintained |
| 2644 | 2645 | C: irc://irc.libera.chat/linux-exynos |
| 2645 | 2646 | Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/ |
| 2647 | +B: mailto:linux-samsung-soc@vger.kernel.org | |
| 2646 | 2648 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git |
| 2647 | 2649 | F: Documentation/arm/samsung/ |
| 2648 | 2650 | F: Documentation/devicetree/bindings/arm/samsung/ |
| @@ -3742,7 +3744,7 @@ F: include/linux/platform_data/b53.h · 1093 unmodified lines | ||
| 3742 | 3744 | |
| 3743 | 3745 | BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE |
| 3744 | 3746 | M: Nicolas Saenz Julienne <nsaenz@kernel.org> |
| 3745 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3747 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3746 | 3748 | L: linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers) |
| 3747 | 3749 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 3748 | 3750 | S: Maintained |
| @@ -3757,7 +3759,7 @@ BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE · 8 unmodified lines | ||
| 3757 | 3759 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3758 | 3760 | M: Ray Jui <rjui@broadcom.com> |
| 3759 | 3761 | M: Scott Branden <sbranden@broadcom.com> |
| 3760 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 3762 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3761 | 3763 | S: Maintained |
| 3762 | 3764 | T: git git://github.com/broadcom/mach-bcm |
| 3763 | 3765 | F: arch/arm/mach-bcm/ |
| @@ -3777,7 +3779,7 @@ F: arch/mips/include/asm/mach-bcm47xx/* · 13 unmodified lines | ||
| 3777 | 3779 | |
| 3778 | 3780 | BROADCOM BCM4908 ETHERNET DRIVER |
| 3779 | 3781 | M: Rafał Miłecki <rafal@milecki.pl> |
| 3780 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 3782 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3781 | 3783 | L: netdev@vger.kernel.org |
| 3782 | 3784 | S: Maintained |
| 3783 | 3785 | F: Documentation/devicetree/bindings/net/brcm,bcm4908-enet.yaml |
| @@ -3786,7 +3788,7 @@ F: drivers/net/ethernet/broadcom/unimac.h · 2 unmodified lines | ||
| 3786 | 3788 | |
| 3787 | 3789 | BROADCOM BCM4908 PINMUX DRIVER |
| 3788 | 3790 | M: Rafał Miłecki <rafal@milecki.pl> |
| 3789 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 3791 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3790 | 3792 | L: linux-gpio@vger.kernel.org |
| 3791 | 3793 | S: Maintained |
| 3792 | 3794 | F: Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml |
| @@ -3796,7 +3798,7 @@ BROADCOM BCM5301X ARM ARCHITECTURE · 3 unmodified lines | ||
| 3796 | 3798 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3797 | 3799 | M: Hauke Mehrtens <hauke@hauke-m.de> |
| 3798 | 3800 | M: Rafał Miłecki <zajec5@gmail.com> |
| 3799 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 3801 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3800 | 3802 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 3801 | 3803 | S: Maintained |
| 3802 | 3804 | F: arch/arm/boot/dts/bcm470* |
| @@ -3807,7 +3809,7 @@ F: arch/arm/mach-bcm/bcm_5301x.c · 4 unmodified lines | ||
| 3807 | 3809 | BROADCOM BCM53573 ARM ARCHITECTURE |
| 3808 | 3810 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3809 | 3811 | M: Rafał Miłecki <rafal@milecki.pl> |
| 3810 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3812 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3811 | 3813 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 3812 | 3814 | S: Maintained |
| 3813 | 3815 | F: arch/arm/boot/dts/bcm47189* |
| @@ -3815,7 +3817,7 @@ F: arch/arm/boot/dts/bcm53573* · 1 unmodified line | ||
| 3815 | 3817 | |
| 3816 | 3818 | BROADCOM BCM63XX ARM ARCHITECTURE |
| 3817 | 3819 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3818 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 3820 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3819 | 3821 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 3820 | 3822 | S: Maintained |
| 3821 | 3823 | T: git git://github.com/broadcom/stblinux.git |
| @@ -3829,7 +3831,7 @@ F: drivers/usb/gadget/udc/bcm63xx_udc.* · 7 unmodified lines | ||
| 3829 | 3831 | |
| 3830 | 3832 | BROADCOM BCM7XXX ARM ARCHITECTURE |
| 3831 | 3833 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3832 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 3834 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3833 | 3835 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 3834 | 3836 | S: Maintained |
| 3835 | 3837 | T: git git://github.com/broadcom/stblinux.git |
| @@ -3847,21 +3849,21 @@ N: bcm7120 · 11 unmodified lines | ||
| 3847 | 3849 | BROADCOM BDC DRIVER |
| 3848 | 3850 | M: Al Cooper <alcooperx@gmail.com> |
| 3849 | 3851 | L: linux-usb@vger.kernel.org |
| 3850 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3852 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3851 | 3853 | S: Maintained |
| 3852 | 3854 | F: Documentation/devicetree/bindings/usb/brcm,bdc.yaml |
| 3853 | 3855 | F: drivers/usb/gadget/udc/bdc/ |
| 3854 | 3856 | |
| 3855 | 3857 | BROADCOM BMIPS CPUFREQ DRIVER |
| 3856 | 3858 | M: Markus Mayer <mmayer@broadcom.com> |
| 3857 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 3859 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3858 | 3860 | L: linux-pm@vger.kernel.org |
| 3859 | 3861 | S: Maintained |
| 3860 | 3862 | F: drivers/cpufreq/bmips-cpufreq.c |
| 3861 | 3863 | |
| 3862 | 3864 | BROADCOM BMIPS MIPS ARCHITECTURE |
| 3863 | 3865 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3864 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3866 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3865 | 3867 | L: linux-mips@vger.kernel.org |
| 3866 | 3868 | S: Maintained |
| 3867 | 3869 | T: git git://github.com/broadcom/stblinux.git |
| @@ -3912,7 +3914,9 @@ BROADCOM BNXT_EN 50 GIGABIT ETHERNET DRIVER · 44 unmodified lines | ||
| 3912 | 3914 | M: Michael Chan <michael.chan@broadcom.com> |
| 3913 | 3915 | L: netdev@vger.kernel.org |
| 3914 | 3916 | S: Supported |
| 3917 | +F: drivers/firmware/broadcom/tee_bnxt_fw.c | |
| 3915 | 3918 | F: drivers/net/ethernet/broadcom/bnxt/ |
| 3919 | +F: include/linux/firmware/broadcom/tee_bnxt_fw.h | |
| 3916 | 3920 | |
| 3917 | 3921 | BROADCOM BRCM80211 IEEE802.11n WIRELESS DRIVER |
| 3918 | 3922 | M: Arend van Spriel <aspriel@gmail.com> |
| @@ -3927,53 +3931,53 @@ F: drivers/net/wireless/broadcom/brcm80211/ · 8 unmodified lines | ||
| 3927 | 3931 | BROADCOM BRCMSTB GPIO DRIVER |
| 3928 | 3932 | M: Doug Berger <opendmb@gmail.com> |
| 3929 | 3933 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3930 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3934 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3931 | 3935 | S: Supported |
| 3932 | 3936 | F: Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml |
| 3933 | 3937 | F: drivers/gpio/gpio-brcmstb.c |
| 3934 | 3938 | |
| 3935 | 3939 | BROADCOM BRCMSTB I2C DRIVER |
| 3936 | 3940 | M: Kamal Dasu <kdasu.kdev@gmail.com> |
| 3941 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3937 | 3942 | L: linux-i2c@vger.kernel.org |
| 3938 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3939 | 3943 | S: Supported |
| 3940 | 3944 | F: Documentation/devicetree/bindings/i2c/brcm,brcmstb-i2c.yaml |
| 3941 | 3945 | F: drivers/i2c/busses/i2c-brcmstb.c |
| 3942 | 3946 | |
| 3943 | 3947 | BROADCOM BRCMSTB UART DRIVER |
| 3944 | 3948 | M: Al Cooper <alcooperx@gmail.com> |
| 3949 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3945 | 3950 | L: linux-serial@vger.kernel.org |
| 3946 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3947 | 3951 | S: Maintained |
| 3948 | 3952 | F: Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml |
| 3949 | 3953 | F: drivers/tty/serial/8250/8250_bcm7271.c |
| 3950 | 3954 | |
| 3951 | 3955 | BROADCOM BRCMSTB USB EHCI DRIVER |
| 3952 | 3956 | M: Al Cooper <alcooperx@gmail.com> |
| 3957 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3953 | 3958 | L: linux-usb@vger.kernel.org |
| 3954 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3955 | 3959 | S: Maintained |
| 3956 | 3960 | F: Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml |
| 3957 | 3961 | F: drivers/usb/host/ehci-brcm.* |
| 3958 | 3962 | |
| 3959 | 3963 | BROADCOM BRCMSTB USB PIN MAP DRIVER |
| 3960 | 3964 | M: Al Cooper <alcooperx@gmail.com> |
| 3965 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3961 | 3966 | L: linux-usb@vger.kernel.org |
| 3962 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3963 | 3967 | S: Maintained |
| 3964 | 3968 | F: Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml |
| 3965 | 3969 | F: drivers/usb/misc/brcmstb-usb-pinmap.c |
| 3966 | 3970 | |
| 3967 | 3971 | BROADCOM BRCMSTB USB2 and USB3 PHY DRIVER |
| 3968 | 3972 | M: Al Cooper <alcooperx@gmail.com> |
| 3973 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3969 | 3974 | L: linux-kernel@vger.kernel.org |
| 3970 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3971 | 3975 | S: Maintained |
| 3972 | 3976 | F: drivers/phy/broadcom/phy-brcm-usb* |
| 3973 | 3977 | |
| 3974 | 3978 | BROADCOM ETHERNET PHY DRIVERS |
| 3975 | 3979 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3976 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3980 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3977 | 3981 | L: netdev@vger.kernel.org |
| 3978 | 3982 | S: Supported |
| 3979 | 3983 | F: Documentation/devicetree/bindings/net/broadcom-bcm87xx.txt |
| @@ -3984,7 +3988,7 @@ F: include/linux/brcmphy.h · 4 unmodified lines | ||
| 3984 | 3988 | BROADCOM GENET ETHERNET DRIVER |
| 3985 | 3989 | M: Doug Berger <opendmb@gmail.com> |
| 3986 | 3990 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 3987 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 3991 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 3988 | 3992 | L: netdev@vger.kernel.org |
| 3989 | 3993 | S: Supported |
| 3990 | 3994 | F: Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml |
| @@ -3998,7 +4002,7 @@ F: include/linux/platform_data/mdio-bcm-unimac.h · 7 unmodified lines | ||
| 3998 | 4002 | BROADCOM IPROC ARM ARCHITECTURE |
| 3999 | 4003 | M: Ray Jui <rjui@broadcom.com> |
| 4000 | 4004 | M: Scott Branden <sbranden@broadcom.com> |
| 4001 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 4005 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4002 | 4006 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 4003 | 4007 | S: Maintained |
| 4004 | 4008 | T: git git://github.com/broadcom/stblinux.git |
| @@ -4026,7 +4030,7 @@ N: stingray · 21 unmodified lines | ||
| 4026 | 4030 | |
| 4027 | 4031 | BROADCOM IPROC GBIT ETHERNET DRIVER |
| 4028 | 4032 | M: Rafał Miłecki <rafal@milecki.pl> |
| 4029 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 4033 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4030 | 4034 | L: netdev@vger.kernel.org |
| 4031 | 4035 | S: Maintained |
| 4032 | 4036 | F: Documentation/devicetree/bindings/net/brcm,amac.yaml |
| @@ -4035,7 +4039,7 @@ F: drivers/net/ethernet/broadcom/unimac.h · 2 unmodified lines | ||
| 4035 | 4039 | |
| 4036 | 4040 | BROADCOM KONA GPIO DRIVER |
| 4037 | 4041 | M: Ray Jui <rjui@broadcom.com> |
| 4038 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 4042 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4039 | 4043 | S: Supported |
| 4040 | 4044 | F: Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt |
| 4041 | 4045 | F: drivers/gpio/gpio-bcm-kona.c |
| @@ -4068,7 +4072,7 @@ F: drivers/firmware/broadcom/* · 26 unmodified lines | ||
| 4068 | 4072 | BROADCOM PMB (POWER MANAGEMENT BUS) DRIVER |
| 4069 | 4073 | M: Rafał Miłecki <rafal@milecki.pl> |
| 4070 | 4074 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 4071 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 4075 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4072 | 4076 | L: linux-pm@vger.kernel.org |
| 4073 | 4077 | S: Maintained |
| 4074 | 4078 | T: git git://github.com/broadcom/stblinux.git |
| @@ -4084,7 +4088,7 @@ F: include/linux/bcma/ · 9 unmodified lines | ||
| 4084 | 4088 | |
| 4085 | 4089 | BROADCOM SPI DRIVER |
| 4086 | 4090 | M: Kamal Dasu <kdasu.kdev@gmail.com> |
| 4087 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 4091 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4088 | 4092 | S: Maintained |
| 4089 | 4093 | F: Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml |
| 4090 | 4094 | F: drivers/spi/spi-bcm-qspi.* |
| @@ -4093,7 +4097,7 @@ F: drivers/spi/spi-iproc-qspi.c · 2 unmodified lines | ||
| 4093 | 4097 | |
| 4094 | 4098 | BROADCOM STB AVS CPUFREQ DRIVER |
| 4095 | 4099 | M: Markus Mayer <mmayer@broadcom.com> |
| 4096 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 4100 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4097 | 4101 | L: linux-pm@vger.kernel.org |
| 4098 | 4102 | S: Maintained |
| 4099 | 4103 | F: Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt |
| @@ -4101,7 +4105,7 @@ F: drivers/cpufreq/brcmstb* · 1 unmodified line | ||
| 4101 | 4105 | |
| 4102 | 4106 | BROADCOM STB AVS TMON DRIVER |
| 4103 | 4107 | M: Markus Mayer <mmayer@broadcom.com> |
| 4104 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 4108 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4105 | 4109 | L: linux-pm@vger.kernel.org |
| 4106 | 4110 | S: Maintained |
| 4107 | 4111 | F: Documentation/devicetree/bindings/thermal/brcm,avs-tmon.yaml |
| @@ -4109,7 +4113,7 @@ F: drivers/thermal/broadcom/brcmstb* · 1 unmodified line | ||
| 4109 | 4113 | |
| 4110 | 4114 | BROADCOM STB DPFE DRIVER |
| 4111 | 4115 | M: Markus Mayer <mmayer@broadcom.com> |
| 4112 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 4116 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4113 | 4117 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 4114 | 4118 | S: Maintained |
| 4115 | 4119 | F: Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml |
| @@ -4118,8 +4122,8 @@ F: drivers/memory/brcmstb_dpfe.c · 2 unmodified lines | ||
| 4118 | 4122 | BROADCOM STB NAND FLASH DRIVER |
| 4119 | 4123 | M: Brian Norris <computersforpeace@gmail.com> |
| 4120 | 4124 | M: Kamal Dasu <kdasu.kdev@gmail.com> |
| 4125 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4121 | 4126 | L: linux-mtd@lists.infradead.org |
| 4122 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 4123 | 4127 | S: Maintained |
| 4124 | 4128 | F: drivers/mtd/nand/raw/brcmnand/ |
| 4125 | 4129 | F: include/linux/platform_data/brcmnand.h |
| @@ -4128,7 +4132,7 @@ BROADCOM STB PCIE DRIVER · 2 unmodified lines | ||
| 4128 | 4132 | M: Jim Quinlan <jim2101024@gmail.com> |
| 4129 | 4133 | M: Nicolas Saenz Julienne <nsaenz@kernel.org> |
| 4130 | 4134 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 4131 | −M: bcm-kernel-feedback-list@broadcom.com | |
| 4135 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4132 | 4136 | L: linux-pci@vger.kernel.org |
| 4133 | 4137 | S: Maintained |
| 4134 | 4138 | F: Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml |
| @@ -4136,7 +4140,7 @@ F: drivers/pci/controller/pcie-brcmstb.c · 1 unmodified line | ||
| 4136 | 4140 | |
| 4137 | 4141 | BROADCOM SYSTEMPORT ETHERNET DRIVER |
| 4138 | 4142 | M: Florian Fainelli <f.fainelli@gmail.com> |
| 4139 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 4143 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4140 | 4144 | L: netdev@vger.kernel.org |
| 4141 | 4145 | S: Supported |
| 4142 | 4146 | F: drivers/net/ethernet/broadcom/bcmsysport.* |
| @@ -4153,7 +4157,7 @@ F: drivers/net/ethernet/broadcom/tg3.* · 10 unmodified lines | ||
| 4153 | 4157 | |
| 4154 | 4158 | BROADCOM VK DRIVER |
| 4155 | 4159 | M: Scott Branden <scott.branden@broadcom.com> |
| 4156 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 4160 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 4157 | 4161 | S: Supported |
| 4158 | 4162 | F: drivers/misc/bcm-vk/ |
| 4159 | 4163 | F: include/uapi/linux/misc/bcm_vk.h |
| @@ -9336,14 +9340,12 @@ F: drivers/pci/hotplug/rpaphp* · 5176 unmodified lines | ||
| 9336 | 9340 | |
| 9337 | 9341 | IBM Power SRIOV Virtual NIC Device Driver |
| 9338 | 9342 | M: Dany Madden <drt@linux.ibm.com> |
| 9339 | −M: Sukadev Bhattiprolu <sukadev@linux.ibm.com> | |
| 9340 | 9343 | R: Thomas Falcon <tlfalcon@linux.ibm.com> |
| 9341 | 9344 | L: netdev@vger.kernel.org |
| 9342 | 9345 | S: Supported |
| 9343 | 9346 | F: drivers/net/ethernet/ibm/ibmvnic.* |
| 9344 | 9347 | |
| 9345 | 9348 | IBM Power Virtual Accelerator Switchboard |
| 9346 | −M: Sukadev Bhattiprolu <sukadev@linux.ibm.com> | |
| 9347 | 9349 | L: linuxppc-dev@lists.ozlabs.org |
| 9348 | 9350 | S: Supported |
| 9349 | 9351 | F: arch/powerpc/include/asm/vas.h |
| @@ -10238,8 +10240,6 @@ F: drivers/net/ethernet/sgi/ioc3-eth.c · 888 unmodified lines | ||
| 10238 | 10240 | IOMAP FILESYSTEM LIBRARY |
| 10239 | 10241 | M: Christoph Hellwig <hch@infradead.org> |
| 10240 | 10242 | M: Darrick J. Wong <djwong@kernel.org> |
| 10241 | −M: linux-xfs@vger.kernel.org | |
| 10242 | −M: linux-fsdevel@vger.kernel.org | |
| 10243 | 10243 | L: linux-xfs@vger.kernel.org |
| 10244 | 10244 | L: linux-fsdevel@vger.kernel.org |
| 10245 | 10245 | S: Supported |
| @@ -10370,6 +10370,7 @@ F: include/linux/isapnp.h · 124 unmodified lines | ||
| 10370 | 10370 | ISCSI |
| 10371 | 10371 | M: Lee Duncan <lduncan@suse.com> |
| 10372 | 10372 | M: Chris Leech <cleech@redhat.com> |
| 10373 | +M: Mike Christie <michael.christie@oracle.com> | |
| 10373 | 10374 | L: open-iscsi@googlegroups.com |
| 10374 | 10375 | L: linux-scsi@vger.kernel.org |
| 10375 | 10376 | S: Maintained |
| @@ -10547,6 +10548,7 @@ M: Andrey Ryabinin <ryabinin.a.a@gmail.com> · 171 unmodified lines | ||
| 10547 | 10548 | R: Alexander Potapenko <glider@google.com> |
| 10548 | 10549 | R: Andrey Konovalov <andreyknvl@gmail.com> |
| 10549 | 10550 | R: Dmitry Vyukov <dvyukov@google.com> |
| 10551 | +R: Vincenzo Frascino <vincenzo.frascino@arm.com> | |
| 10550 | 10552 | L: kasan-dev@googlegroups.com |
| 10551 | 10553 | S: Maintained |
| 10552 | 10554 | F: Documentation/dev-tools/kasan.rst |
| @@ -11906,7 +11908,7 @@ F: drivers/iio/proximity/mb1232.c · 1353 unmodified lines | ||
| 11906 | 11908 | |
| 11907 | 11909 | MAXIM MAX17040 FAMILY FUEL GAUGE DRIVERS |
| 11908 | 11910 | R: Iskren Chernev <iskren.chernev@gmail.com> |
| 11909 | −R: Krzysztof Kozlowski <krzk@kernel.org> | |
| 11911 | +R: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 11910 | 11912 | R: Marek Szyprowski <m.szyprowski@samsung.com> |
| 11911 | 11913 | R: Matheus Castello <matheus@castello.eng.br> |
| 11912 | 11914 | L: linux-pm@vger.kernel.org |
| @@ -11916,7 +11918,7 @@ F: drivers/power/supply/max17040_battery.c · 3 unmodified lines | ||
| 11916 | 11918 | |
| 11917 | 11919 | MAXIM MAX17042 FAMILY FUEL GAUGE DRIVERS |
| 11918 | 11920 | R: Hans de Goede <hdegoede@redhat.com> |
| 11919 | −R: Krzysztof Kozlowski <krzk@kernel.org> | |
| 11921 | +R: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 11920 | 11922 | R: Marek Szyprowski <m.szyprowski@samsung.com> |
| 11921 | 11923 | R: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> |
| 11922 | 11924 | R: Purism Kernel Team <kernel@puri.sm> |
| @@ -11968,10 +11970,11 @@ F: Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml · 45 unmodified lines | ||
| 11968 | 11970 | F: drivers/power/supply/max77976_charger.c |
| 11969 | 11971 | |
| 11970 | 11972 | MAXIM MUIC CHARGER DRIVERS FOR EXYNOS BASED BOARDS |
| 11971 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 11973 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 11972 | 11974 | M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> |
| 11973 | 11975 | L: linux-pm@vger.kernel.org |
| 11974 | 11976 | S: Supported |
| 11977 | +B: mailto:linux-samsung-soc@vger.kernel.org | |
| 11975 | 11978 | F: Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml |
| 11976 | 11979 | F: Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml |
| 11977 | 11980 | F: drivers/power/supply/max14577_charger.c |
| @@ -11979,10 +11982,11 @@ F: drivers/power/supply/max77693_charger.c · 1 unmodified line | ||
| 11979 | 11982 | |
| 11980 | 11983 | MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BOARDS |
| 11981 | 11984 | M: Chanwoo Choi <cw00.choi@samsung.com> |
| 11982 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 11985 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 11983 | 11986 | M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> |
| 11984 | 11987 | L: linux-kernel@vger.kernel.org |
| 11985 | 11988 | S: Supported |
| 11989 | +B: mailto:linux-samsung-soc@vger.kernel.org | |
| 11986 | 11990 | F: Documentation/devicetree/bindings/*/maxim,max14577.yaml |
| 11987 | 11991 | F: Documentation/devicetree/bindings/*/maxim,max77686.yaml |
| 11988 | 11992 | F: Documentation/devicetree/bindings/*/maxim,max77693.yaml |
| @@ -12402,7 +12406,7 @@ F: drivers/mmc/host/mtk-sd.c · 413 unmodified lines | ||
| 12402 | 12406 | |
| 12403 | 12407 | MEDIATEK MT76 WIRELESS LAN DRIVER |
| 12404 | 12408 | M: Felix Fietkau <nbd@nbd.name> |
| 12405 | −M: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com> | |
| 12409 | +M: Lorenzo Bianconi <lorenzo@kernel.org> | |
| 12406 | 12410 | M: Ryder Lee <ryder.lee@mediatek.com> |
| 12407 | 12411 | R: Shayne Chen <shayne.chen@mediatek.com> |
| 12408 | 12412 | R: Sean Wang <sean.wang@mediatek.com> |
| @@ -12673,9 +12677,10 @@ F: mm/memblock.c · 264 unmodified lines | ||
| 12673 | 12677 | F: tools/testing/memblock/ |
| 12674 | 12678 | |
| 12675 | 12679 | MEMORY CONTROLLER DRIVERS |
| 12676 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 12680 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 12677 | 12681 | L: linux-kernel@vger.kernel.org |
| 12678 | 12682 | S: Maintained |
| 12683 | +B: mailto:krzysztof.kozlowski@linaro.org | |
| 12679 | 12684 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git |
| 12680 | 12685 | F: Documentation/devicetree/bindings/memory-controllers/ |
| 12681 | 12686 | F: drivers/memory/ |
| @@ -13624,6 +13629,7 @@ F: net/core/drop_monitor.c · 942 unmodified lines | ||
| 13624 | 13629 | |
| 13625 | 13630 | NETWORKING DRIVERS |
| 13626 | 13631 | M: "David S. Miller" <davem@davemloft.net> |
| 13632 | +M: Eric Dumazet <edumazet@google.com> | |
| 13627 | 13633 | M: Jakub Kicinski <kuba@kernel.org> |
| 13628 | 13634 | M: Paolo Abeni <pabeni@redhat.com> |
| 13629 | 13635 | L: netdev@vger.kernel.org |
| @@ -13671,6 +13677,7 @@ F: tools/testing/selftests/drivers/net/dsa/ · 41 unmodified lines | ||
| 13671 | 13677 | |
| 13672 | 13678 | NETWORKING [GENERAL] |
| 13673 | 13679 | M: "David S. Miller" <davem@davemloft.net> |
| 13680 | +M: Eric Dumazet <edumazet@google.com> | |
| 13674 | 13681 | M: Jakub Kicinski <kuba@kernel.org> |
| 13675 | 13682 | M: Paolo Abeni <pabeni@redhat.com> |
| 13676 | 13683 | L: netdev@vger.kernel.org |
| @@ -13817,10 +13824,11 @@ F: include/uapi/linux/nexthop.h · 140 unmodified lines | ||
| 13817 | 13824 | F: net/ipv4/nexthop.c |
| 13818 | 13825 | |
| 13819 | 13826 | NFC SUBSYSTEM |
| 13820 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 13827 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 13821 | 13828 | L: linux-nfc@lists.01.org (subscribers-only) |
| 13822 | 13829 | L: netdev@vger.kernel.org |
| 13823 | 13830 | S: Maintained |
| 13831 | +B: mailto:linux-nfc@lists.01.org | |
| 13824 | 13832 | F: Documentation/devicetree/bindings/net/nfc/ |
| 13825 | 13833 | F: drivers/nfc/ |
| 13826 | 13834 | F: include/linux/platform_data/nfcmrvl.h |
| @@ -14134,7 +14142,7 @@ F: Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml · 307 unmodified lines | ||
| 14134 | 14142 | F: drivers/regulator/pf8x00-regulator.c |
| 14135 | 14143 | |
| 14136 | 14144 | NXP PTN5150A CC LOGIC AND EXTCON DRIVER |
| 14137 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 14145 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 14138 | 14146 | L: linux-kernel@vger.kernel.org |
| 14139 | 14147 | S: Maintained |
| 14140 | 14148 | F: Documentation/devicetree/bindings/extcon/extcon-ptn5150.yaml |
| @@ -14687,7 +14695,7 @@ F: scripts/dtc/ · 546 unmodified lines | ||
| 14687 | 14695 | |
| 14688 | 14696 | OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS |
| 14689 | 14697 | M: Rob Herring <robh+dt@kernel.org> |
| 14690 | −M: Krzysztof Kozlowski <krzk+dt@kernel.org> | |
| 14698 | +M: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> | |
| 14691 | 14699 | L: devicetree@vger.kernel.org |
| 14692 | 14700 | S: Maintained |
| 14693 | 14701 | C: irc://irc.libera.chat/devicetree |
| @@ -15599,7 +15607,7 @@ F: drivers/pinctrl/renesas/ · 905 unmodified lines | ||
| 15599 | 15607 | |
| 15600 | 15608 | PIN CONTROLLER - SAMSUNG |
| 15601 | 15609 | M: Tomasz Figa <tomasz.figa@gmail.com> |
| 15602 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 15610 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 15603 | 15611 | M: Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 15604 | 15612 | R: Alim Akhtar <alim.akhtar@samsung.com> |
| 15605 | 15613 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| @@ -15607,6 +15615,7 @@ L: linux-samsung-soc@vger.kernel.org · 1 unmodified line | ||
| 15607 | 15615 | S: Maintained |
| 15608 | 15616 | C: irc://irc.libera.chat/linux-exynos |
| 15609 | 15617 | Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/ |
| 15618 | +B: mailto:linux-samsung-soc@vger.kernel.org | |
| 15610 | 15619 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git |
| 15611 | 15620 | F: Documentation/devicetree/bindings/pinctrl/samsung,pinctrl*yaml |
| 15612 | 15621 | F: drivers/pinctrl/samsung/ |
| @@ -17274,7 +17283,7 @@ W: http://www.ibm.com/developerworks/linux/linux390/ · 1661 unmodified lines | ||
| 17274 | 17283 | F: drivers/s390/scsi/zfcp_* |
| 17275 | 17284 | |
| 17276 | 17285 | S3C ADC BATTERY DRIVER |
| 17277 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 17286 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 17278 | 17287 | L: linux-samsung-soc@vger.kernel.org |
| 17279 | 17288 | S: Odd Fixes |
| 17280 | 17289 | F: drivers/power/supply/s3c_adc_battery.c |
| @@ -17319,15 +17328,16 @@ F: Documentation/admin-guide/LSM/SafeSetID.rst · 38 unmodified lines | ||
| 17319 | 17328 | F: security/safesetid/ |
| 17320 | 17329 | |
| 17321 | 17330 | SAMSUNG AUDIO (ASoC) DRIVERS |
| 17322 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 17331 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 17323 | 17332 | M: Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 17324 | 17333 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) |
| 17325 | 17334 | S: Supported |
| 17335 | +B: mailto:linux-samsung-soc@vger.kernel.org | |
| 17326 | 17336 | F: Documentation/devicetree/bindings/sound/samsung* |
| 17327 | 17337 | F: sound/soc/samsung/ |
| 17328 | 17338 | |
| 17329 | 17339 | SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER |
| 17330 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 17340 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 17331 | 17341 | L: linux-crypto@vger.kernel.org |
| 17332 | 17342 | L: linux-samsung-soc@vger.kernel.org |
| 17333 | 17343 | S: Maintained |
| @@ -17362,11 +17372,12 @@ S: Maintained · 28 unmodified lines | ||
| 17362 | 17372 | F: drivers/platform/x86/samsung-laptop.c |
| 17363 | 17373 | |
| 17364 | 17374 | SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS |
| 17365 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 17375 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 17366 | 17376 | M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> |
| 17367 | 17377 | L: linux-kernel@vger.kernel.org |
| 17368 | 17378 | L: linux-samsung-soc@vger.kernel.org |
| 17369 | 17379 | S: Supported |
| 17380 | +B: mailto:linux-samsung-soc@vger.kernel.org | |
| 17370 | 17381 | F: Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml |
| 17371 | 17382 | F: Documentation/devicetree/bindings/mfd/samsung,s2m*.yaml |
| 17372 | 17383 | F: Documentation/devicetree/bindings/mfd/samsung,s5m*.yaml |
| @@ -17388,7 +17399,7 @@ F: drivers/media/platform/samsung/s3c-camif/ · 15 unmodified lines | ||
| 17388 | 17399 | F: include/media/drv-intf/s3c_camif.h |
| 17389 | 17400 | |
| 17390 | 17401 | SAMSUNG S3FWRN5 NFC DRIVER |
| 17391 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 17402 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 17392 | 17403 | M: Krzysztof Opasiak <k.opasiak@samsung.com> |
| 17393 | 17404 | L: linux-nfc@lists.01.org (subscribers-only) |
| 17394 | 17405 | S: Maintained |
| @@ -17410,7 +17421,7 @@ S: Supported · 15 unmodified lines | ||
| 17410 | 17421 | F: drivers/media/i2c/s5k5baf.c |
| 17411 | 17422 | |
| 17412 | 17423 | SAMSUNG S5P Security SubSystem (SSS) DRIVER |
| 17413 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 17424 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 17414 | 17425 | M: Vladimir Zapolskiy <vz@mleia.com> |
| 17415 | 17426 | L: linux-crypto@vger.kernel.org |
| 17416 | 17427 | L: linux-samsung-soc@vger.kernel.org |
| @@ -17445,7 +17456,7 @@ F: include/linux/clk/samsung.h · 28 unmodified lines | ||
| 17445 | 17456 | F: include/linux/platform_data/clk-s3c2410.h |
| 17446 | 17457 | |
| 17447 | 17458 | SAMSUNG SPI DRIVERS |
| 17448 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 17459 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 17449 | 17460 | M: Andi Shyti <andi@etezian.org> |
| 17450 | 17461 | L: linux-spi@vger.kernel.org |
| 17451 | 17462 | L: linux-samsung-soc@vger.kernel.org |
| @@ -17463,7 +17474,7 @@ F: drivers/net/ethernet/samsung/sxgbe/ · 11 unmodified lines | ||
| 17463 | 17474 | |
| 17464 | 17475 | SAMSUNG THERMAL DRIVER |
| 17465 | 17476 | M: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> |
| 17466 | −M: Krzysztof Kozlowski <krzk@kernel.org> | |
| 17477 | +M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | |
| 17467 | 17478 | L: linux-pm@vger.kernel.org |
| 17468 | 17479 | L: linux-samsung-soc@vger.kernel.org |
| 17469 | 17480 | S: Maintained |
| @@ -17647,8 +17658,8 @@ K: \bTIF_SECCOMP\b · 177 unmodified lines | ||
| 17647 | 17658 | |
| 17648 | 17659 | SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) Broadcom BRCMSTB DRIVER |
| 17649 | 17660 | M: Al Cooper <alcooperx@gmail.com> |
| 17661 | +R: Broadcom Kernel Team <bcm-kernel-feedback-list@broadcom.com> | |
| 17650 | 17662 | L: linux-mmc@vger.kernel.org |
| 17651 | −L: bcm-kernel-feedback-list@broadcom.com | |
| 17652 | 17663 | S: Maintained |
| 17653 | 17664 | F: drivers/mmc/host/sdhci-brcmstb* |
| 17654 | 17665 | |
| @@ -21227,10 +21238,8 @@ S: Maintained · 3572 unmodified lines | ||
| 21227 | 21238 | F: drivers/hid/hid-wiimote* |
| 21228 | 21239 | |
| 21229 | 21240 | WILOCITY WIL6210 WIRELESS DRIVER |
| 21230 | −M: Maya Erez <merez@codeaurora.org> | |
| 21231 | 21241 | L: linux-wireless@vger.kernel.org |
| 21232 | −L: wil6210@qti.qualcomm.com | |
| 21233 | −S: Supported | |
| 21242 | +S: Orphan | |
| 21234 | 21243 | W: https://wireless.wiki.kernel.org/en/users/Drivers/wil6210 |
| 21235 | 21244 | F: drivers/net/wireless/ath/wil6210/ |
| 21236 | 21245 | |
| @@ -21434,6 +21443,15 @@ F: arch/x86/include/asm/uv/ · 197 unmodified lines | ||
| 21434 | 21443 | F: arch/x86/kernel/apic/x2apic_uv_x.c |
| 21435 | 21444 | F: arch/x86/platform/uv/ |
| 21436 | 21445 | |
| 21446 | +X86 STACK UNWINDING | |
| 21447 | +M: Josh Poimboeuf <jpoimboe@redhat.com> | |
| 21448 | +M: Peter Zijlstra <peterz@infradead.org> | |
| 21449 | +S: Supported | |
| 21450 | +F: arch/x86/include/asm/unwind*.h | |
| 21451 | +F: arch/x86/kernel/dumpstack.c | |
| 21452 | +F: arch/x86/kernel/stacktrace.c | |
| 21453 | +F: arch/x86/kernel/unwind_*.c | |
| 21454 | + | |
| 21437 | 21455 | X86 VDSO |
| 21438 | 21456 | M: Andy Lutomirski <luto@kernel.org> |
| 21439 | 21457 | L: linux-kernel@vger.kernel.org |
| @@ -21596,7 +21614,6 @@ F: drivers/xen/*swiotlb* · 156 unmodified lines | ||
| 21596 | 21614 | XFS FILESYSTEM |
| 21597 | 21615 | C: irc://irc.oftc.net/xfs |
| 21598 | 21616 | M: Darrick J. Wong <djwong@kernel.org> |
| 21599 | −M: linux-xfs@vger.kernel.org | |
| 21600 | 21617 | L: linux-xfs@vger.kernel.org |
| 21601 | 21618 | S: Supported |
| 21602 | 21619 | W: http://xfs.org/ |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | VERSION = 5 |
| 3 | 3 | PATCHLEVEL = 18 |
| 4 | 4 | SUBLEVEL = 0 |
| 5 | −EXTRAVERSION = -rc2 | |
| 5 | +EXTRAVERSION = -rc5 | |
| 6 | 6 | NAME = Superb Owl |
| 7 | 7 | |
| 8 | 8 | # *DOCUMENTATION* |
| @@ -854,10 +854,8 @@ config HAVE_ARCH_HUGE_VMAP · 853 unmodified lines | ||
| 854 | 854 | |
| 855 | 855 | # |
| 856 | 856 | # Archs that select this would be capable of PMD-sized vmaps (i.e., |
| 857 | −# arch_vmap_pmd_supported() returns true), and they must make no assumptions | |
| 858 | −# that vmalloc memory is mapped with PAGE_SIZE ptes. The VM_NO_HUGE_VMAP flag | |
| 859 | −# can be used to prohibit arch-specific allocations from using hugepages to | |
| 860 | −# help with this (e.g., modules may require it). | |
| 857 | +# arch_vmap_pmd_supported() returns true). The VM_ALLOW_HUGE_VMAP flag | |
| 858 | +# must be used to enable allocations to use hugepages. | |
| 861 | 859 | # |
| 862 | 860 | config HAVE_ARCH_HUGE_VMALLOC |
| 863 | 861 | depends on HAVE_ARCH_HUGE_VMAP |
| @@ -275,7 +275,7 @@ · 274 unmodified lines | ||
| 275 | 275 | cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_LOW>, |
| 276 | 276 | <&creg_gpio 1 GPIO_ACTIVE_LOW>; |
| 277 | 277 | |
| 278 | − spi-flash@0 { | |
| 278 | + flash@0 { | |
| 279 | 279 | compatible = "sst26wf016b", "jedec,spi-nor"; |
| 280 | 280 | reg = <0>; |
| 281 | 281 | #address-cells = <1>; |
| @@ -5,7 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | |
| 6 | 6 | #define arch_atomic_set(v, i) WRITE_ONCE(((v)->counter), (i)) |
| 7 | 7 | |
| 8 | −#define ATOMIC_OP(op, c_op, asm_op) \ | |
| 8 | +#define ATOMIC_OP(op, asm_op) \ | |
| 9 | 9 | static inline void arch_atomic_##op(int i, atomic_t *v) \ |
| 10 | 10 | { \ |
| 11 | 11 | unsigned int val; \ |
| @@ -21,7 +21,7 @@ static inline void arch_atomic_##op(int i, atomic_t *v) \ · 9 unmodified lines | ||
| 21 | 21 | : "cc"); \ |
| 22 | 22 | } \ |
| 23 | 23 | |
| 24 | −#define ATOMIC_OP_RETURN(op, c_op, asm_op) \ | |
| 24 | +#define ATOMIC_OP_RETURN(op, asm_op) \ | |
| 25 | 25 | static inline int arch_atomic_##op##_return_relaxed(int i, atomic_t *v) \ |
| 26 | 26 | { \ |
| 27 | 27 | unsigned int val; \ |
| @@ -42,7 +42,7 @@ static inline int arch_atomic_##op##_return_relaxed(int i, atomic_t *v) \ · 14 unmodified lines | ||
| 42 | 42 | #define arch_atomic_add_return_relaxed arch_atomic_add_return_relaxed |
| 43 | 43 | #define arch_atomic_sub_return_relaxed arch_atomic_sub_return_relaxed |
| 44 | 44 | |
| 45 | −#define ATOMIC_FETCH_OP(op, c_op, asm_op) \ | |
| 45 | +#define ATOMIC_FETCH_OP(op, asm_op) \ | |
| 46 | 46 | static inline int arch_atomic_fetch_##op##_relaxed(int i, atomic_t *v) \ |
| 47 | 47 | { \ |
| 48 | 48 | unsigned int val, orig; \ |
| @@ -69,23 +69,23 @@ static inline int arch_atomic_fetch_##op##_relaxed(int i, atomic_t *v) \ · 20 unmodified lines | ||
| 69 | 69 | #define arch_atomic_fetch_or_relaxed arch_atomic_fetch_or_relaxed |
| 70 | 70 | #define arch_atomic_fetch_xor_relaxed arch_atomic_fetch_xor_relaxed |
| 71 | 71 | |
| 72 | −#define ATOMIC_OPS(op, c_op, asm_op) \ | |
| 73 | − ATOMIC_OP(op, c_op, asm_op) \ | |
| 74 | − ATOMIC_OP_RETURN(op, c_op, asm_op) \ | |
| 75 | − ATOMIC_FETCH_OP(op, c_op, asm_op) | |
| 72 | +#define ATOMIC_OPS(op, asm_op) \ | |
| 73 | + ATOMIC_OP(op, asm_op) \ | |
| 74 | + ATOMIC_OP_RETURN(op, asm_op) \ | |
| 75 | + ATOMIC_FETCH_OP(op, asm_op) | |
| 76 | 76 | |
| 77 | −ATOMIC_OPS(add, +=, add) | |
| 78 | −ATOMIC_OPS(sub, -=, sub) | |
| 77 | +ATOMIC_OPS(add, add) | |
| 78 | +ATOMIC_OPS(sub, sub) | |
| 79 | 79 | |
| 80 | 80 | #undef ATOMIC_OPS |
| 81 | −#define ATOMIC_OPS(op, c_op, asm_op) \ | |
| 82 | − ATOMIC_OP(op, c_op, asm_op) \ | |
| 83 | − ATOMIC_FETCH_OP(op, c_op, asm_op) | |
| 81 | +#define ATOMIC_OPS(op, asm_op) \ | |
| 82 | + ATOMIC_OP(op, asm_op) \ | |
| 83 | + ATOMIC_FETCH_OP(op, asm_op) | |
| 84 | 84 | |
| 85 | −ATOMIC_OPS(and, &=, and) | |
| 86 | −ATOMIC_OPS(andnot, &= ~, bic) | |
| 87 | −ATOMIC_OPS(or, |=, or) | |
| 88 | −ATOMIC_OPS(xor, ^=, xor) | |
| 85 | +ATOMIC_OPS(and, and) | |
| 86 | +ATOMIC_OPS(andnot, bic) | |
| 87 | +ATOMIC_OPS(or, or) | |
| 88 | +ATOMIC_OPS(xor, xor) | |
| 89 | 89 | |
| 90 | 90 | #define arch_atomic_andnot arch_atomic_andnot |
| 91 | 91 | |
| @@ -98,9 +98,6 @@ · 97 unmodified lines | ||
| 98 | 98 | /* |
| 99 | 99 | * 1st level paging: pgd |
| 100 | 100 | */ |
| 101 | −#define pgd_index(addr) ((addr) >> PGDIR_SHIFT) | |
| 102 | −#define pgd_offset(mm, addr) (((mm)->pgd) + pgd_index(addr)) | |
| 103 | −#define pgd_offset_k(addr) pgd_offset(&init_mm, addr) | |
| 104 | 101 | #define pgd_ERROR(e) \ |
| 105 | 102 | pr_crit("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) |
| 106 | 103 | |
| @@ -366,7 +366,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state, · 365 unmodified lines | ||
| 366 | 366 | case op_SP: /* LD_S|LDB_S b,[sp,u7], ST_S|STB_S b,[sp,u7] */ |
| 367 | 367 | /* note: we are ignoring possibility of: |
| 368 | 368 | * ADD_S, SUB_S, PUSH_S, POP_S as these should not |
| 369 | − * cause unaliged exception anyway */ | |
| 369 | + * cause unaligned exception anyway */ | |
| 370 | 370 | state->write = BITS(state->words[0], 6, 6); |
| 371 | 371 | state->zz = BITS(state->words[0], 5, 5); |
| 372 | 372 | if (state->zz) |
| @@ -503,7 +503,6 @@ int __kprobes disasm_next_pc(unsigned long pc, struct pt_regs *regs, · 130 unmodified lines | ||
| 503 | 503 | { |
| 504 | 504 | struct disasm_state instr; |
| 505 | 505 | |
| 506 | − memset(&instr, 0, sizeof(struct disasm_state)); | |
| 507 | 506 | disasm_instr(pc, &instr, 0, regs, cregs); |
| 508 | 507 | |
| 509 | 508 | *next_pc = pc + instr.instr_len; |
| @@ -196,6 +196,7 @@ tracesys_exit: · 195 unmodified lines | ||
| 196 | 196 | st r0, [sp, PT_r0] ; sys call return value in pt_regs |
| 197 | 197 | |
| 198 | 198 | ;POST Sys Call Ptrace Hook |
| 199 | + mov r0, sp ; pt_regs needed | |
| 199 | 200 | bl @syscall_trace_exit |
| 200 | 201 | b ret_from_exception ; NOT ret_from_system_call at is saves r0 which |
| 201 | 202 | ; we'd done before calling post hook above |
| @@ -319,7 +319,7 @@ setup_rt_frame(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs) · 318 unmodified lines | ||
| 319 | 319 | regs->ret = (unsigned long)ksig->ka.sa.sa_handler; |
| 320 | 320 | |
| 321 | 321 | /* |
| 322 | − * handler returns using sigreturn stub provided already by userpsace | |
| 322 | + * handler returns using sigreturn stub provided already by userspace | |
| 323 | 323 | * If not, nuke the process right away |
| 324 | 324 | */ |
| 325 | 325 | if(!(ksig->ka.sa.sa_flags & SA_RESTORER)) |
| @@ -35,7 +35,7 @@ EXPORT_SYMBOL_GPL(smp_atomic_ops_lock); · 34 unmodified lines | ||
| 35 | 35 | |
| 36 | 36 | struct plat_smp_ops __weak plat_smp_ops; |
| 37 | 37 | |
| 38 | −/* XXX: per cpu ? Only needed once in early seconday boot */ | |
| 38 | +/* XXX: per cpu ? Only needed once in early secondary boot */ | |
| 39 | 39 | struct task_struct *secondary_idle_tsk; |
| 40 | 40 | |
| 41 | 41 | /* Called from start_kernel */ |
| @@ -274,7 +274,7 @@ static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg) · 232 unmodified lines | ||
| 274 | 274 | * and read back old value |
| 275 | 275 | */ |
| 276 | 276 | do { |
| 277 | − new = old = READ_ONCE(*ipi_data_ptr); | |
| 277 | + new = old = *ipi_data_ptr; | |
| 278 | 278 | new |= 1U << msg; |
| 279 | 279 | } while (cmpxchg(ipi_data_ptr, old, new) != old); |
| 280 | 280 | |
| @@ -237,7 +237,7 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs, · 236 unmodified lines | ||
| 237 | 237 | if (state.fault) |
| 238 | 238 | goto fault; |
| 239 | 239 | |
| 240 | − /* clear any remanants of delay slot */ | |
| 240 | + /* clear any remnants of delay slot */ | |
| 241 | 241 | if (delay_mode(regs)) { |
| 242 | 242 | regs->ret = regs->bta & ~1U; |
| 243 | 243 | regs->status32 &= ~STATUS_DE_MASK; |
| @@ -401,7 +401,7 @@ static inline void __before_dc_op(const int op) · 400 unmodified lines | ||
| 401 | 401 | { |
| 402 | 402 | if (op == OP_FLUSH_N_INV) { |
| 403 | 403 | /* Dcache provides 2 cmd: FLUSH or INV |
| 404 | − * INV inturn has sub-modes: DISCARD or FLUSH-BEFORE | |
| 404 | + * INV in turn has sub-modes: DISCARD or FLUSH-BEFORE | |
| 405 | 405 | * flush-n-inv is achieved by INV cmd but with IM=1 |
| 406 | 406 | * So toggle INV sub-mode depending on op request and default |
| 407 | 407 | */ |
| @@ -263,6 +263,8 @@ · 262 unmodified lines | ||
| 263 | 263 | compatible = "ti,am3359-tscadc"; |
| 264 | 264 | reg = <0x0 0x1000>; |
| 265 | 265 | interrupts = <16>; |
| 266 | + clocks = <&adc_tsc_fck>; | |
| 267 | + clock-names = "fck"; | |
| 266 | 268 | status = "disabled"; |
| 267 | 269 | dmas = <&edma 53 0>, <&edma 57 0>; |
| 268 | 270 | dma-names = "fifo0", "fifo1"; |
| @@ -161,6 +161,8 @@ · 160 unmodified lines | ||
| 161 | 161 | |
| 162 | 162 | /* HS USB Host PHY on PORT 1 */ |
| 163 | 163 | hsusb1_phy: hsusb1_phy { |
| 164 | + pinctrl-names = "default"; | |
| 165 | + pinctrl-0 = <&hsusb1_rst_pins>; | |
| 164 | 166 | compatible = "usb-nop-xceiv"; |
| 165 | 167 | reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */ |
| 166 | 168 | #phy-cells = <0>; |
| @@ -168,7 +170,9 @@ · 1 unmodified line | ||
| 168 | 170 | }; |
| 169 | 171 | |
| 170 | 172 | &davinci_emac { |
| 171 | − status = "okay"; | |
| 173 | + pinctrl-names = "default"; | |
| 174 | + pinctrl-0 = <ðernet_pins>; | |
| 175 | + status = "okay"; | |
| 172 | 176 | }; |
| 173 | 177 | |
| 174 | 178 | &davinci_mdio { |
| @@ -193,6 +197,8 @@ · 18 unmodified lines | ||
| 193 | 197 | }; |
| 194 | 198 | |
| 195 | 199 | &i2c2 { |
| 200 | + pinctrl-names = "default"; | |
| 201 | + pinctrl-0 = <&i2c2_pins>; | |
| 196 | 202 | clock-frequency = <400000>; |
| 197 | 203 | /* User DIP swithes [1:8] / User LEDS [1:2] */ |
| 198 | 204 | tca6416: gpio@21 { |
| @@ -205,6 +211,8 @@ · 6 unmodified lines | ||
| 205 | 211 | }; |
| 206 | 212 | |
| 207 | 213 | &i2c3 { |
| 214 | + pinctrl-names = "default"; | |
| 215 | + pinctrl-0 = <&i2c3_pins>; | |
| 208 | 216 | clock-frequency = <400000>; |
| 209 | 217 | }; |
| 210 | 218 | |
| @@ -223,6 +231,8 @@ · 12 unmodified lines | ||
| 223 | 231 | }; |
| 224 | 232 | |
| 225 | 233 | &usbhshost { |
| 234 | + pinctrl-names = "default"; | |
| 235 | + pinctrl-0 = <&hsusb1_pins>; | |
| 226 | 236 | port1-mode = "ehci-phy"; |
| 227 | 237 | }; |
| 228 | 238 | |
| @@ -231,8 +241,35 @@ · 2 unmodified lines | ||
| 231 | 241 | }; |
| 232 | 242 | |
| 233 | 243 | &omap3_pmx_core { |
| 234 | − pinctrl-names = "default"; | |
| 235 | − pinctrl-0 = <&hsusb1_rst_pins>; | |
| 244 | + | |
| 245 | + ethernet_pins: pinmux_ethernet_pins { | |
| 246 | + pinctrl-single,pins = < | |
| 247 | + OMAP3_CORE1_IOPAD(0x21fe, PIN_INPUT | MUX_MODE0) /* rmii_mdio_data */ | |
| 248 | + OMAP3_CORE1_IOPAD(0x2200, MUX_MODE0) /* rmii_mdio_clk */ | |
| 249 | + OMAP3_CORE1_IOPAD(0x2202, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd0 */ | |
| 250 | + OMAP3_CORE1_IOPAD(0x2204, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd1 */ | |
| 251 | + OMAP3_CORE1_IOPAD(0x2206, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_crs_dv */ | |
| 252 | + OMAP3_CORE1_IOPAD(0x2208, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_rxer */ | |
| 253 | + OMAP3_CORE1_IOPAD(0x220a, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd0 */ | |
| 254 | + OMAP3_CORE1_IOPAD(0x220c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd1 */ | |
| 255 | + OMAP3_CORE1_IOPAD(0x220e, PIN_OUTPUT_PULLDOWN |MUX_MODE0) /* rmii_txen */ | |
| 256 | + OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */ | |
| 257 | + >; | |
| 258 | + }; | |
| 259 | + | |
| 260 | + i2c2_pins: pinmux_i2c2_pins { | |
| 261 | + pinctrl-single,pins = < | |
| 262 | + OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ | |
| 263 | + OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ | |
| 264 | + >; | |
| 265 | + }; | |
| 266 | + | |
| 267 | + i2c3_pins: pinmux_i2c3_pins { | |
| 268 | + pinctrl-single,pins = < | |
| 269 | + OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ | |
| 270 | + OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ | |
| 271 | + >; | |
| 272 | + }; | |
| 236 | 273 | |
| 237 | 274 | leds_pins: pinmux_leds_pins { |
| 238 | 275 | pinctrl-single,pins = < |
| @@ -300,8 +337,6 @@ · 61 unmodified lines | ||
| 300 | 337 | }; |
| 301 | 338 | |
| 302 | 339 | &omap3_pmx_core2 { |
| 303 | − pinctrl-names = "default"; | |
| 304 | − pinctrl-0 = <&hsusb1_pins>; | |
| 305 | 340 | |
| 306 | 341 | hsusb1_pins: pinmux_hsusb1_pins { |
| 307 | 342 | pinctrl-single,pins = < |
| @@ -69,6 +69,8 @@ · 68 unmodified lines | ||
| 69 | 69 | }; |
| 70 | 70 | |
| 71 | 71 | &i2c1 { |
| 72 | + pinctrl-names = "default"; | |
| 73 | + pinctrl-0 = <&i2c1_pins>; | |
| 72 | 74 | clock-frequency = <400000>; |
| 73 | 75 | |
| 74 | 76 | s35390a: s35390a@30 { |
| @@ -179,6 +181,13 @@ · 104 unmodified lines | ||
| 179 | 181 | |
| 180 | 182 | &omap3_pmx_core { |
| 181 | 183 | |
| 184 | + i2c1_pins: pinmux_i2c1_pins { | |
| 185 | + pinctrl-single,pins = < | |
| 186 | + OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ | |
| 187 | + OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ | |
| 188 | + >; | |
| 189 | + }; | |
| 190 | + | |
| 182 | 191 | wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins { |
| 183 | 192 | pinctrl-single,pins = < |
| 184 | 193 | OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4) /* mmc1_dat7.gpio_129 */ |
| @@ -44,7 +44,7 @@ · 43 unmodified lines | ||
| 44 | 44 | status = "okay"; |
| 45 | 45 | |
| 46 | 46 | /* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */ |
| 47 | − spi-flash@0 { | |
| 47 | + flash@0 { | |
| 48 | 48 | compatible = "mxicy,mx25u4035", "jedec,spi-nor"; |
| 49 | 49 | spi-max-frequency = <33000000>; |
| 50 | 50 | reg = <0>; |
| @@ -125,7 +125,7 @@ · 124 unmodified lines | ||
| 125 | 125 | cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>, <&pioC 11 GPIO_ACTIVE_LOW>, <0>, <0>; |
| 126 | 126 | status = "okay"; |
| 127 | 127 | |
| 128 | − m25p80@0 { | |
| 128 | + flash@0 { | |
| 129 | 129 | compatible = "jedec,spi-nor"; |
| 130 | 130 | spi-max-frequency = <20000000>; |
| 131 | 131 | reg = <0>; |
| @@ -101,7 +101,7 @@ · 100 unmodified lines | ||
| 101 | 101 | nand0: nand@40000000 { |
| 102 | 102 | nand-bus-width = <8>; |
| 103 | 103 | nand-ecc-mode = "soft"; |
| 104 | − nand-on-flash-bbt = <1>; | |
| 104 | + nand-on-flash-bbt; | |
| 105 | 105 | status = "okay"; |
| 106 | 106 | }; |
| 107 | 107 | |
| @@ -214,7 +214,7 @@ · 213 unmodified lines | ||
| 214 | 214 | pinctrl-0 = <&pinctrl_qspi1_default>; |
| 215 | 215 | status = "disabled"; |
| 216 | 216 | |
| 217 | − qspi1_flash: spi_flash@0 { | |
| 217 | + qspi1_flash: flash@0 { | |
| 218 | 218 | #address-cells = <1>; |
| 219 | 219 | #size-cells = <1>; |
| 220 | 220 | compatible = "jedec,spi-nor"; |
| @@ -191,7 +191,7 @@ · 190 unmodified lines | ||
| 191 | 191 | &qspi1 { |
| 192 | 192 | status = "okay"; |
| 193 | 193 | |
| 194 | − qspi1_flash: spi_flash@0 { | |
| 194 | + qspi1_flash: flash@0 { | |
| 195 | 195 | status = "okay"; |
| 196 | 196 | }; |
| 197 | 197 | }; |
| @@ -137,7 +137,7 @@ · 136 unmodified lines | ||
| 137 | 137 | pinctrl-0 = <&pinctrl_spi0_default>; |
| 138 | 138 | status = "okay"; |
| 139 | 139 | |
| 140 | − m25p80@0 { | |
| 140 | + flash@0 { | |
| 141 | 141 | compatible = "atmel,at25df321a"; |
| 142 | 142 | reg = <0>; |
| 143 | 143 | spi-max-frequency = <50000000>; |
| @@ -57,8 +57,8 @@ · 56 unmodified lines | ||
| 57 | 57 | }; |
| 58 | 58 | |
| 59 | 59 | spi0: spi@f0004000 { |
| 60 | − pinctrl-names = "default"; | |
| 61 | − pinctrl-0 = <&pinctrl_spi0_cs>; | |
| 60 | + pinctrl-names = "default", "cs"; | |
| 61 | + pinctrl-1 = <&pinctrl_spi0_cs>; | |
| 62 | 62 | cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>; |
| 63 | 63 | status = "okay"; |
| 64 | 64 | }; |
| @@ -171,8 +171,8 @@ · 106 unmodified lines | ||
| 171 | 171 | }; |
| 172 | 172 | |
| 173 | 173 | spi1: spi@f8008000 { |
| 174 | − pinctrl-names = "default"; | |
| 175 | − pinctrl-0 = <&pinctrl_spi1_cs>; | |
| 174 | + pinctrl-names = "default", "cs"; | |
| 175 | + pinctrl-1 = <&pinctrl_spi1_cs>; | |
| 176 | 176 | cs-gpios = <&pioC 25 0>; |
| 177 | 177 | status = "okay"; |
| 178 | 178 | }; |
| @@ -49,7 +49,7 @@ · 48 unmodified lines | ||
| 49 | 49 | cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; |
| 50 | 50 | status = "okay"; |
| 51 | 51 | |
| 52 | − m25p80@0 { | |
| 52 | + flash@0 { | |
| 53 | 53 | compatible = "atmel,at25df321a"; |
| 54 | 54 | spi-max-frequency = <50000000>; |
| 55 | 55 | reg = <0>; |
| @@ -81,8 +81,8 @@ · 80 unmodified lines | ||
| 81 | 81 | }; |
| 82 | 82 | |
| 83 | 83 | spi1: spi@fc018000 { |
| 84 | − pinctrl-names = "default"; | |
| 85 | − pinctrl-0 = <&pinctrl_spi0_cs>; | |
| 84 | + pinctrl-names = "default", "cs"; | |
| 85 | + pinctrl-1 = <&pinctrl_spi1_cs>; | |
| 86 | 86 | cs-gpios = <&pioB 21 0>; |
| 87 | 87 | status = "okay"; |
| 88 | 88 | }; |
| @@ -140,7 +140,7 @@ · 51 unmodified lines | ||
| 140 | 140 | atmel,pins = |
| 141 | 141 | <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; |
| 142 | 142 | }; |
| 143 | − pinctrl_spi0_cs: spi0_cs_default { | |
| 143 | + pinctrl_spi1_cs: spi1_cs_default { | |
| 144 | 144 | atmel,pins = |
| 145 | 145 | <AT91_PIOB 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; |
| 146 | 146 | }; |
| @@ -65,7 +65,7 @@ · 64 unmodified lines | ||
| 65 | 65 | spi0: spi@f8010000 { |
| 66 | 66 | cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; |
| 67 | 67 | status = "okay"; |
| 68 | − m25p80@0 { | |
| 68 | + flash@0 { | |
| 69 | 69 | compatible = "atmel,at25df321a"; |
| 70 | 70 | spi-max-frequency = <50000000>; |
| 71 | 71 | reg = <0>; |
| @@ -495,7 +495,7 @@ · 494 unmodified lines | ||
| 495 | 495 | pinctrl_flx3_default: flx3_default { |
| 496 | 496 | pinmux = <PIN_PD16__FLEXCOM3_IO0>, |
| 497 | 497 | <PIN_PD17__FLEXCOM3_IO1>; |
| 498 | − bias-disable; | |
| 498 | + bias-pull-up; | |
| 499 | 499 | }; |
| 500 | 500 | |
| 501 | 501 | pinctrl_flx4_default: flx4_default { |
| @@ -655,7 +655,7 @@ · 153 unmodified lines | ||
| 655 | 655 | <PIN_PB21__QSPI0_INT>; |
| 656 | 656 | bias-disable; |
| 657 | 657 | slew-rate = <0>; |
| 658 | − atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>; | |
| 658 | + atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>; | |
| 659 | 659 | }; |
| 660 | 660 | |
| 661 | 661 | pinctrl_sdmmc0_default: sdmmc0_default { |
| @@ -59,7 +59,7 @@ · 58 unmodified lines | ||
| 59 | 59 | spi0: spi@f8010000 { |
| 60 | 60 | cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; |
| 61 | 61 | status = "okay"; |
| 62 | − m25p80@0 { | |
| 62 | + flash@0 { | |
| 63 | 63 | compatible = "n25q32b", "jedec,spi-nor"; |
| 64 | 64 | spi-max-frequency = <50000000>; |
| 65 | 65 | reg = <0>; |
| @@ -73,7 +73,7 @@ · 72 unmodified lines | ||
| 73 | 73 | spi0: spi@fffe0000 { |
| 74 | 74 | status = "okay"; |
| 75 | 75 | cs-gpios = <&pioA 3 0>, <0>, <0>, <0>; |
| 76 | − mtd_dataflash@0 { | |
| 76 | + flash@0 { | |
| 77 | 77 | compatible = "atmel,at45", "atmel,dataflash"; |
| 78 | 78 | spi-max-frequency = <15000000>; |
| 79 | 79 | reg = <0>; |
| @@ -94,7 +94,7 @@ · 14 unmodified lines | ||
| 94 | 94 | status = "okay"; |
| 95 | 95 | }; |
| 96 | 96 | |
| 97 | − nor_flash@10000000 { | |
| 97 | + flash@10000000 { | |
| 98 | 98 | compatible = "cfi-flash"; |
| 99 | 99 | reg = <0x10000000 0x800000>; |
| 100 | 100 | linux,mtd-name = "physmap-flash.0"; |
| @@ -92,7 +92,7 @@ · 91 unmodified lines | ||
| 92 | 92 | |
| 93 | 93 | spi0: spi@fffc8000 { |
| 94 | 94 | cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; |
| 95 | − mtd_dataflash@1 { | |
| 95 | + flash@1 { | |
| 96 | 96 | compatible = "atmel,at45", "atmel,dataflash"; |
| 97 | 97 | spi-max-frequency = <50000000>; |
| 98 | 98 | reg = <1>; |
| @@ -145,7 +145,7 @@ · 144 unmodified lines | ||
| 145 | 145 | cs-gpios = <&pioA 3 0>, <0>, <&pioA 28 0>, <0>; |
| 146 | 146 | status = "okay"; |
| 147 | 147 | |
| 148 | − mtd_dataflash@0 { | |
| 148 | + flash@0 { | |
| 149 | 149 | compatible = "atmel,at45", "atmel,dataflash"; |
| 150 | 150 | reg = <0>; |
| 151 | 151 | spi-max-frequency = <15000000>; |
| @@ -95,7 +95,7 @@ · 94 unmodified lines | ||
| 95 | 95 | spi0: spi@fffa4000 { |
| 96 | 96 | status = "okay"; |
| 97 | 97 | cs-gpios = <&pioA 5 0>, <0>, <0>, <0>; |
| 98 | − mtd_dataflash@0 { | |
| 98 | + flash@0 { | |
| 99 | 99 | compatible = "atmel,at45", "atmel,dataflash"; |
| 100 | 100 | spi-max-frequency = <50000000>; |
| 101 | 101 | reg = <0>; |
| @@ -110,7 +110,7 @@ · 109 unmodified lines | ||
| 110 | 110 | |
| 111 | 111 | spi0: spi@fffc8000 { |
| 112 | 112 | cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; |
| 113 | − mtd_dataflash@1 { | |
| 113 | + flash@1 { | |
| 114 | 114 | compatible = "atmel,at45", "atmel,dataflash"; |
| 115 | 115 | spi-max-frequency = <50000000>; |
| 116 | 116 | reg = <1>; |
| @@ -214,11 +214,23 @@ · 97 unmodified lines | ||
| 214 | 214 | 24c512@50 { |
| 215 | 215 | compatible = "atmel,24c512"; |
| 216 | 216 | reg = <0x50>; |
| 217 | + vcc-supply = <®_3v3>; | |
| 217 | 218 | }; |
| 218 | 219 | |
| 219 | 220 | wm8731: wm8731@1b { |
| 220 | 221 | compatible = "wm8731"; |
| 221 | 222 | reg = <0x1b>; |
| 223 | + | |
| 224 | + /* PCK0 at 12MHz */ | |
| 225 | + clocks = <&pmc PMC_TYPE_SYSTEM 8>; | |
| 226 | + clock-names = "mclk"; | |
| 227 | + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>; | |
| 228 | + assigned-clock-rates = <12000000>; | |
| 229 | + | |
| 230 | + HPVDD-supply = <&vcc_dac>; | |
| 231 | + AVDD-supply = <&vcc_dac>; | |
| 232 | + DCVDD-supply = <®_3v3>; | |
| 233 | + DBVDD-supply = <®_3v3>; | |
| 222 | 234 | }; |
| 223 | 235 | }; |
| 224 | 236 | |
| @@ -254,4 +266,35 @@ · 29 unmodified lines | ||
| 254 | 266 | atmel,ssc-controller = <&ssc0>; |
| 255 | 267 | atmel,audio-codec = <&wm8731>; |
| 256 | 268 | }; |
| 269 | + | |
| 270 | + reg_5v: fixedregulator0 { | |
| 271 | + compatible = "regulator-fixed"; | |
| 272 | + regulator-name = "5V"; | |
| 273 | + regulator-min-microvolt = <5000000>; | |
| 274 | + regulator-max-microvolt = <5000000>; | |
| 275 | + }; | |
| 276 | + | |
| 277 | + reg_3v3: fixedregulator1 { | |
| 278 | + compatible = "regulator-fixed"; | |
| 279 | + regulator-name = "3V3"; | |
| 280 | + vin-supply = <®_5v>; | |
| 281 | + regulator-min-microvolt = <3300000>; | |
| 282 | + regulator-max-microvolt = <3300000>; | |
| 283 | + }; | |
| 284 | + | |
| 285 | + reg_1v: fixedregulator2 { | |
| 286 | + compatible = "regulator-fixed"; | |
| 287 | + regulator-name = "1V"; | |
| 288 | + vin-supply = <®_5v>; | |
| 289 | + regulator-min-microvolt = <1000000>; | |
| 290 | + regulator-max-microvolt = <1000000>; | |
| 291 | + }; | |
| 292 | + | |
| 293 | + vcc_dac: fixedregulator3 { | |
| 294 | + compatible = "regulator-fixed"; | |
| 295 | + regulator-name = "VCC_DAC"; | |
| 296 | + vin-supply = <®_3v3>; | |
| 297 | + regulator-min-microvolt = <3300000>; | |
| 298 | + regulator-max-microvolt = <3300000>; | |
| 299 | + }; | |
| 257 | 300 | }; |
| @@ -167,7 +167,7 @@ · 166 unmodified lines | ||
| 167 | 167 | spi0: spi@fffa4000{ |
| 168 | 168 | status = "okay"; |
| 169 | 169 | cs-gpios = <&pioB 3 0>, <0>, <0>, <0>; |
| 170 | − mtd_dataflash@0 { | |
| 170 | + flash@0 { | |
| 171 | 171 | compatible = "atmel,at45", "atmel,dataflash"; |
| 172 | 172 | spi-max-frequency = <13000000>; |
| 173 | 173 | reg = <0>; |
| @@ -119,7 +119,7 @@ · 118 unmodified lines | ||
| 119 | 119 | spi0: spi@f0000000 { |
| 120 | 120 | status = "okay"; |
| 121 | 121 | cs-gpios = <&pioA 14 0>, <0>, <0>, <0>; |
| 122 | − m25p80@0 { | |
| 122 | + flash@0 { | |
| 123 | 123 | compatible = "atmel,at25df321a"; |
| 124 | 124 | spi-max-frequency = <50000000>; |
| 125 | 125 | reg = <0>; |
| @@ -180,7 +180,7 @@ · 179 unmodified lines | ||
| 180 | 180 | spi0: spi@fffcc000 { |
| 181 | 181 | status = "okay"; |
| 182 | 182 | cs-gpios = <&pioA 28 0>, <0>, <0>, <0>; |
| 183 | − mtd_dataflash@0 { | |
| 183 | + flash@0 { | |
| 184 | 184 | compatible = "atmel,at45", "atmel,dataflash"; |
| 185 | 185 | spi-max-frequency = <15000000>; |
| 186 | 186 | reg = <0>; |
| @@ -125,7 +125,7 @@ · 124 unmodified lines | ||
| 125 | 125 | cs-gpios = <&pioA 14 0>, <0>, <0>, <0>; |
| 126 | 126 | status = "disabled"; /* conflicts with mmc1 */ |
| 127 | 127 | |
| 128 | − m25p80@0 { | |
| 128 | + flash@0 { | |
| 129 | 129 | compatible = "atmel,at25df321a"; |
| 130 | 130 | spi-max-frequency = <50000000>; |
| 131 | 131 | reg = <0>; |
| @@ -278,7 +278,7 @@ · 277 unmodified lines | ||
| 278 | 278 | status = "okay"; |
| 279 | 279 | pinctrl-names = "default"; |
| 280 | 280 | pinctrl-0 = <&spi1_pins &spi1_cs0_pin>; |
| 281 | − flash: m25p80@0 { | |
| 281 | + flash: flash@0 { | |
| 282 | 282 | #address-cells = <1>; |
| 283 | 283 | #size-cells = <1>; |
| 284 | 284 | compatible = "jedec,spi-nor"; |
| @@ -177,7 +177,7 @@ · 176 unmodified lines | ||
| 177 | 177 | pinctrl-names = "default"; |
| 178 | 178 | pinctrl-0 = <&mcspi1_pins>; |
| 179 | 179 | |
| 180 | − m25p80@0 { | |
| 180 | + flash@0 { | |
| 181 | 181 | compatible = "w25x32"; |
| 182 | 182 | spi-max-frequency = <48000000>; |
| 183 | 183 | reg = <0>; |
| @@ -4188,11 +4188,11 @@ · 4187 unmodified lines | ||
| 4188 | 4188 | reg = <0x1d0010 0x4>; |
| 4189 | 4189 | reg-names = "sysc"; |
| 4190 | 4190 | ti,sysc-midle = <SYSC_IDLE_FORCE>, |
| 4191 | − <SYSC_IDLE_NO>, | |
| 4192 | − <SYSC_IDLE_SMART>; | |
| 4191 | + <SYSC_IDLE_NO>; | |
| 4193 | 4192 | ti,sysc-sidle = <SYSC_IDLE_FORCE>, |
| 4194 | 4193 | <SYSC_IDLE_NO>, |
| 4195 | 4194 | <SYSC_IDLE_SMART>; |
| 4195 | + power-domains = <&prm_vpe>; | |
| 4196 | 4196 | clocks = <&vpe_clkctrl DRA7_VPE_VPE_CLKCTRL 0>; |
| 4197 | 4197 | clock-names = "fck"; |
| 4198 | 4198 | #address-cells = <1>; |
| @@ -26,7 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | pinctrl-0 = <&mmc0_4bit_pins_a |
| 27 | 27 | &mmc0_sck_cfg |
| 28 | 28 | &en_sd_pwr>; |
| 29 | − broken-cd = <1>; | |
| 29 | + broken-cd; | |
| 30 | 30 | bus-width = <4>; |
| 31 | 31 | vmmc-supply = <®_vddio_sd0>; |
| 32 | 32 | status = "okay"; |
| @@ -286,6 +286,8 @@ · 285 unmodified lines | ||
| 286 | 286 | codec: sgtl5000@a { |
| 287 | 287 | compatible = "fsl,sgtl5000"; |
| 288 | 288 | reg = <0x0a>; |
| 289 | + pinctrl-names = "default"; | |
| 290 | + pinctrl-0 = <&pinctrl_sgtl5000>; | |
| 289 | 291 | clocks = <&clks IMX6QDL_CLK_CKO>; |
| 290 | 292 | VDDA-supply = <®_module_3v3_audio>; |
| 291 | 293 | VDDIO-supply = <®_module_3v3>; |
| @@ -517,8 +519,6 @@ · 225 unmodified lines | ||
| 517 | 519 | MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 |
| 518 | 520 | MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 |
| 519 | 521 | MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 |
| 520 | − /* SGTL5000 sys_mclk */ | |
| 521 | − MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0 | |
| 522 | 522 | >; |
| 523 | 523 | }; |
| 524 | 524 | |
| @@ -811,6 +811,12 @@ · 286 unmodified lines | ||
| 811 | 811 | >; |
| 812 | 812 | }; |
| 813 | 813 | |
| 814 | + pinctrl_sgtl5000: sgtl5000grp { | |
| 815 | + fsl,pins = < | |
| 816 | + MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0 | |
| 817 | + >; | |
| 818 | + }; | |
| 819 | + | |
| 814 | 820 | pinctrl_spdif: spdifgrp { |
| 815 | 821 | fsl,pins = < |
| 816 | 822 | MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 |
| @@ -154,112 +154,112 @@ · 153 unmodified lines | ||
| 154 | 154 | regulators { |
| 155 | 155 | bcore1 { |
| 156 | 156 | regulator-name = "bcore1"; |
| 157 | − regulator-always-on = <1>; | |
| 157 | + regulator-always-on; | |
| 158 | 158 | regulator-min-microvolt = <300000>; |
| 159 | 159 | regulator-max-microvolt = <3300000>; |
| 160 | 160 | }; |
| 161 | 161 | |
| 162 | 162 | bcore2 { |
| 163 | 163 | regulator-name = "bcore2"; |
| 164 | − regulator-always-on = <1>; | |
| 164 | + regulator-always-on; | |
| 165 | 165 | regulator-min-microvolt = <300000>; |
| 166 | 166 | regulator-max-microvolt = <3300000>; |
| 167 | 167 | }; |
| 168 | 168 | |
| 169 | 169 | bpro { |
| 170 | 170 | regulator-name = "bpro"; |
| 171 | − regulator-always-on = <1>; | |
| 171 | + regulator-always-on; | |
| 172 | 172 | regulator-min-microvolt = <300000>; |
| 173 | 173 | regulator-max-microvolt = <3300000>; |
| 174 | 174 | }; |
| 175 | 175 | |
| 176 | 176 | bperi { |
| 177 | 177 | regulator-name = "bperi"; |
| 178 | − regulator-always-on = <1>; | |
| 178 | + regulator-always-on; | |
| 179 | 179 | regulator-min-microvolt = <300000>; |
| 180 | 180 | regulator-max-microvolt = <3300000>; |
| 181 | 181 | }; |
| 182 | 182 | |
| 183 | 183 | bmem { |
| 184 | 184 | regulator-name = "bmem"; |
| 185 | − regulator-always-on = <1>; | |
| 185 | + regulator-always-on; | |
| 186 | 186 | regulator-min-microvolt = <300000>; |
| 187 | 187 | regulator-max-microvolt = <3300000>; |
| 188 | 188 | }; |
| 189 | 189 | |
| 190 | 190 | ldo2 { |
| 191 | 191 | regulator-name = "ldo2"; |
| 192 | − regulator-always-on = <1>; | |
| 192 | + regulator-always-on; | |
| 193 | 193 | regulator-min-microvolt = <300000>; |
| 194 | 194 | regulator-max-microvolt = <1800000>; |
| 195 | 195 | }; |
| 196 | 196 | |
| 197 | 197 | ldo3 { |
| 198 | 198 | regulator-name = "ldo3"; |
| 199 | − regulator-always-on = <1>; | |
| 199 | + regulator-always-on; | |
| 200 | 200 | regulator-min-microvolt = <300000>; |
| 201 | 201 | regulator-max-microvolt = <3300000>; |
| 202 | 202 | }; |
| 203 | 203 | |
| 204 | 204 | ldo4 { |
| 205 | 205 | regulator-name = "ldo4"; |
| 206 | − regulator-always-on = <1>; | |
| 206 | + regulator-always-on; | |
| 207 | 207 | regulator-min-microvolt = <300000>; |
| 208 | 208 | regulator-max-microvolt = <3300000>; |
| 209 | 209 | }; |
| 210 | 210 | |
| 211 | 211 | ldo5 { |
| 212 | 212 | regulator-name = "ldo5"; |
| 213 | − regulator-always-on = <1>; | |
| 213 | + regulator-always-on; | |
| 214 | 214 | regulator-min-microvolt = <300000>; |
| 215 | 215 | regulator-max-microvolt = <3300000>; |
| 216 | 216 | }; |
| 217 | 217 | |
| 218 | 218 | ldo6 { |
| 219 | 219 | regulator-name = "ldo6"; |
| 220 | − regulator-always-on = <1>; | |
| 220 | + regulator-always-on; | |
| 221 | 221 | regulator-min-microvolt = <300000>; |
| 222 | 222 | regulator-max-microvolt = <3300000>; |
| 223 | 223 | }; |
| 224 | 224 | |
| 225 | 225 | ldo7 { |
| 226 | 226 | regulator-name = "ldo7"; |
| 227 | − regulator-always-on = <1>; | |
| 227 | + regulator-always-on; | |
| 228 | 228 | regulator-min-microvolt = <300000>; |
| 229 | 229 | regulator-max-microvolt = <3300000>; |
| 230 | 230 | }; |
| 231 | 231 | |
| 232 | 232 | ldo8 { |
| 233 | 233 | regulator-name = "ldo8"; |
| 234 | − regulator-always-on = <1>; | |
| 234 | + regulator-always-on; | |
| 235 | 235 | regulator-min-microvolt = <300000>; |
| 236 | 236 | regulator-max-microvolt = <3300000>; |
| 237 | 237 | }; |
| 238 | 238 | |
| 239 | 239 | ldo9 { |
| 240 | 240 | regulator-name = "ldo9"; |
| 241 | − regulator-always-on = <1>; | |
| 241 | + regulator-always-on; | |
| 242 | 242 | regulator-min-microvolt = <300000>; |
| 243 | 243 | regulator-max-microvolt = <3300000>; |
| 244 | 244 | }; |
| 245 | 245 | |
| 246 | 246 | ldo10 { |
| 247 | 247 | regulator-name = "ldo10"; |
| 248 | − regulator-always-on = <1>; | |
| 248 | + regulator-always-on; | |
| 249 | 249 | regulator-min-microvolt = <300000>; |
| 250 | 250 | regulator-max-microvolt = <3300000>; |
| 251 | 251 | }; |
| 252 | 252 | |
| 253 | 253 | ldo11 { |
| 254 | 254 | regulator-name = "ldo11"; |
| 255 | − regulator-always-on = <1>; | |
| 255 | + regulator-always-on; | |
| 256 | 256 | regulator-min-microvolt = <300000>; |
| 257 | 257 | regulator-max-microvolt = <3300000>; |
| 258 | 258 | }; |
| 259 | 259 | |
| 260 | 260 | bio { |
| 261 | 261 | regulator-name = "bio"; |
| 262 | − regulator-always-on = <1>; | |
| 262 | + regulator-always-on; | |
| 263 | 263 | regulator-min-microvolt = <1800000>; |
| 264 | 264 | regulator-max-microvolt = <1800000>; |
| 265 | 265 | }; |
| @@ -72,8 +72,8 @@ · 71 unmodified lines | ||
| 72 | 72 | st,settling = <2>; |
| 73 | 73 | st,fraction-z = <7>; |
| 74 | 74 | st,i-drive = <1>; |
| 75 | − touchscreen-inverted-x = <1>; | |
| 76 | − touchscreen-inverted-y = <1>; | |
| 75 | + touchscreen-inverted-x; | |
| 76 | + touchscreen-inverted-y; | |
| 77 | 77 | }; |
| 78 | 78 | }; |
| 79 | 79 | }; |
| @@ -37,7 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | reg_sd1_vmmc: regulator-sd1-vmmc { |
| 39 | 39 | compatible = "regulator-gpio"; |
| 40 | − gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>; | |
| 40 | + gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; | |
| 41 | 41 | pinctrl-names = "default"; |
| 42 | 42 | pinctrl-0 = <&pinctrl_snvs_reg_sd>; |
| 43 | 43 | regulator-always-on; |
| @@ -11,3 +11,18 @@ · 10 unmodified lines | ||
| 11 | 11 | model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit"; |
| 12 | 12 | compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3"; |
| 13 | 13 | }; |
| 14 | + | |
| 15 | +&omap3_pmx_core2 { | |
| 16 | + pinctrl-names = "default"; | |
| 17 | + pinctrl-0 = <&hsusb2_2_pins>; | |
| 18 | + hsusb2_2_pins: pinmux_hsusb2_2_pins { | |
| 19 | + pinctrl-single,pins = < | |
| 20 | + OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ | |
| 21 | + OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ | |
| 22 | + OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ | |
| 23 | + OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ | |
| 24 | + OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ | |
| 25 | + OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ | |
| 26 | + >; | |
| 27 | + }; | |
| 28 | +}; | |
| @@ -11,3 +11,18 @@ · 10 unmodified lines | ||
| 11 | 11 | model = "LogicPD Zoom DM3730 SOM-LV Development Kit"; |
| 12 | 12 | compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3"; |
| 13 | 13 | }; |
| 14 | + | |
| 15 | +&omap3_pmx_core2 { | |
| 16 | + pinctrl-names = "default"; | |
| 17 | + pinctrl-0 = <&hsusb2_2_pins>; | |
| 18 | + hsusb2_2_pins: pinmux_hsusb2_2_pins { | |
| 19 | + pinctrl-single,pins = < | |
| 20 | + OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ | |
| 21 | + OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ | |
| 22 | + OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ | |
| 23 | + OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ | |
| 24 | + OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ | |
| 25 | + OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ | |
| 26 | + >; | |
| 27 | + }; | |
| 28 | +}; | |
| @@ -265,21 +265,6 @@ · 264 unmodified lines | ||
| 265 | 265 | }; |
| 266 | 266 | }; |
| 267 | 267 | |
| 268 | −&omap3_pmx_core2 { | |
| 269 | − pinctrl-names = "default"; | |
| 270 | − pinctrl-0 = <&hsusb2_2_pins>; | |
| 271 | − hsusb2_2_pins: pinmux_hsusb2_2_pins { | |
| 272 | − pinctrl-single,pins = < | |
| 273 | − OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ | |
| 274 | − OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ | |
| 275 | − OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ | |
| 276 | − OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ | |
| 277 | − OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ | |
| 278 | − OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ | |
| 279 | − >; | |
| 280 | − }; | |
| 281 | −}; | |
| 282 | − | |
| 283 | 268 | &uart2 { |
| 284 | 269 | interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; |
| 285 | 270 | pinctrl-names = "default"; |
| @@ -118,8 +118,8 @@ · 117 unmodified lines | ||
| 118 | 118 | gpmc,device-width = <2>; |
| 119 | 119 | gpmc,wait-pin = <0>; |
| 120 | 120 | gpmc,burst-length = <4>; |
| 121 | − gpmc,cycle2cycle-samecsen = <1>; | |
| 122 | − gpmc,cycle2cycle-diffcsen = <1>; | |
| 121 | + gpmc,cycle2cycle-samecsen; | |
| 122 | + gpmc,cycle2cycle-diffcsen; | |
| 123 | 123 | gpmc,cs-on-ns = <0>; |
| 124 | 124 | gpmc,cs-rd-off-ns = <45>; |
| 125 | 125 | gpmc,cs-wr-off-ns = <45>; |
| @@ -31,6 +31,8 @@ · 30 unmodified lines | ||
| 31 | 31 | aliases { |
| 32 | 32 | display0 = &lcd; |
| 33 | 33 | display1 = &tv0; |
| 34 | + /delete-property/ mmc2; | |
| 35 | + /delete-property/ mmc3; | |
| 34 | 36 | }; |
| 35 | 37 | |
| 36 | 38 | ldo_3v3: fixedregulator { |
| @@ -76,7 +76,7 @@ · 75 unmodified lines | ||
| 76 | 76 | pinconf { |
| 77 | 77 | pins = "gpio20", "gpio21"; |
| 78 | 78 | drive-strength = <2>; |
| 79 | − bias-disable = <0>; | |
| 79 | + bias-disable; | |
| 80 | 80 | }; |
| 81 | 81 | }; |
| 82 | 82 | |
| @@ -116,7 +116,7 @@ · 33 unmodified lines | ||
| 116 | 116 | pinconf { |
| 117 | 117 | pins = "gpio24", "gpio25"; |
| 118 | 118 | drive-strength = <2>; |
| 119 | − bias-disable = <0>; | |
| 119 | + bias-disable; | |
| 120 | 120 | }; |
| 121 | 121 | }; |
| 122 | 122 | |
| @@ -141,7 +141,7 @@ · 18 unmodified lines | ||
| 141 | 141 | pinconf { |
| 142 | 142 | pins = "gpio8", "gpio9"; |
| 143 | 143 | drive-strength = <2>; |
| 144 | − bias-disable = <0>; | |
| 144 | + bias-disable; | |
| 145 | 145 | }; |
| 146 | 146 | }; |
| 147 | 147 | |
| @@ -166,7 +166,7 @@ · 18 unmodified lines | ||
| 166 | 166 | pinconf { |
| 167 | 167 | pins = "gpio12", "gpio13"; |
| 168 | 168 | drive-strength = <2>; |
| 169 | − bias-disable = <0>; | |
| 169 | + bias-disable; | |
| 170 | 170 | }; |
| 171 | 171 | }; |
| 172 | 172 | |
| @@ -229,7 +229,7 @@ · 56 unmodified lines | ||
| 229 | 229 | pinconf { |
| 230 | 230 | pins = "gpio16", "gpio17"; |
| 231 | 231 | drive-strength = <2>; |
| 232 | − bias-disable = <0>; | |
| 232 | + bias-disable; | |
| 233 | 233 | }; |
| 234 | 234 | }; |
| 235 | 235 | |
| @@ -282,7 +282,7 @@ · 46 unmodified lines | ||
| 282 | 282 | pinconf { |
| 283 | 283 | pins = "gpio84", "gpio85"; |
| 284 | 284 | drive-strength = <2>; |
| 285 | − bias-disable = <0>; | |
| 285 | + bias-disable; | |
| 286 | 286 | }; |
| 287 | 287 | }; |
| 288 | 288 | |
| @@ -972,7 +972,7 @@ · 971 unmodified lines | ||
| 972 | 972 | |
| 973 | 973 | snps,axi-config = <&stmmac_axi_setup>; |
| 974 | 974 | snps,pbl = <32>; |
| 975 | − snps,aal = <1>; | |
| 975 | + snps,aal; | |
| 976 | 976 | |
| 977 | 977 | qcom,nss-common = <&nss_common>; |
| 978 | 978 | qcom,qsgmii-csr = <&qsgmii_csr>; |
| @@ -996,7 +996,7 @@ · 17 unmodified lines | ||
| 996 | 996 | |
| 997 | 997 | snps,axi-config = <&stmmac_axi_setup>; |
| 998 | 998 | snps,pbl = <32>; |
| 999 | − snps,aal = <1>; | |
| 999 | + snps,aal; | |
| 1000 | 1000 | |
| 1001 | 1001 | qcom,nss-common = <&nss_common>; |
| 1002 | 1002 | qcom,qsgmii-csr = <&qsgmii_csr>; |
| @@ -1020,7 +1020,7 @@ · 17 unmodified lines | ||
| 1020 | 1020 | |
| 1021 | 1021 | snps,axi-config = <&stmmac_axi_setup>; |
| 1022 | 1022 | snps,pbl = <32>; |
| 1023 | − snps,aal = <1>; | |
| 1023 | + snps,aal; | |
| 1024 | 1024 | |
| 1025 | 1025 | qcom,nss-common = <&nss_common>; |
| 1026 | 1026 | qcom,qsgmii-csr = <&qsgmii_csr>; |
| @@ -1044,7 +1044,7 @@ · 17 unmodified lines | ||
| 1044 | 1044 | |
| 1045 | 1045 | snps,axi-config = <&stmmac_axi_setup>; |
| 1046 | 1046 | snps,pbl = <32>; |
| 1047 | − snps,aal = <1>; | |
| 1047 | + snps,aal; | |
| 1048 | 1048 | |
| 1049 | 1049 | qcom,nss-common = <&nss_common>; |
| 1050 | 1050 | qcom,qsgmii-csr = <&qsgmii_csr>; |
| @@ -26,7 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | spi0: spi@f0004000 { |
| 27 | 27 | dmas = <0>, <0>; /* Do not use DMA for spi0 */ |
| 28 | 28 | |
| 29 | − m25p80@0 { | |
| 29 | + flash@0 { | |
| 30 | 30 | compatible = "atmel,at25df321a"; |
| 31 | 31 | spi-max-frequency = <50000000>; |
| 32 | 32 | reg = <0>; |
| @@ -25,7 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | spi0: spi@f0004000 { |
| 26 | 26 | dmas = <0>, <0>; /* Do not use DMA for spi0 */ |
| 27 | 27 | |
| 28 | − m25p80@0 { | |
| 28 | + flash@0 { | |
| 29 | 29 | compatible = "atmel,at25df321a"; |
| 30 | 30 | spi-max-frequency = <50000000>; |
| 31 | 31 | reg = <0>; |
| @@ -601,9 +601,9 @@ · 600 unmodified lines | ||
| 601 | 601 | #size-cells = <0>; |
| 602 | 602 | clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; |
| 603 | 603 | atmel,fifo-size = <32>; |
| 604 | − dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, | |
| 605 | − <&dma0 AT91_XDMAC_DT_PERID(8)>; | |
| 606 | − dma-names = "rx", "tx"; | |
| 604 | + dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>, | |
| 605 | + <&dma0 AT91_XDMAC_DT_PERID(7)>; | |
| 606 | + dma-names = "tx", "rx"; | |
| 607 | 607 | status = "disabled"; |
| 608 | 608 | }; |
| 609 | 609 | }; |
| @@ -786,9 +786,9 @@ · 176 unmodified lines | ||
| 786 | 786 | #size-cells = <0>; |
| 787 | 787 | clocks = <&pmc PMC_TYPE_PERIPHERAL 46>; |
| 788 | 788 | atmel,fifo-size = <32>; |
| 789 | − dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>, | |
| 790 | − <&dma0 AT91_XDMAC_DT_PERID(22)>; | |
| 791 | − dma-names = "rx", "tx"; | |
| 789 | + dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>, | |
| 790 | + <&dma0 AT91_XDMAC_DT_PERID(21)>; | |
| 791 | + dma-names = "tx", "rx"; | |
| 792 | 792 | status = "disabled"; |
| 793 | 793 | }; |
| 794 | 794 | }; |
| @@ -810,9 +810,9 @@ · 15 unmodified lines | ||
| 810 | 810 | #size-cells = <0>; |
| 811 | 811 | clocks = <&pmc PMC_TYPE_PERIPHERAL 47>; |
| 812 | 812 | atmel,fifo-size = <32>; |
| 813 | − dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>, | |
| 814 | − <&dma0 AT91_XDMAC_DT_PERID(24)>; | |
| 815 | − dma-names = "rx", "tx"; | |
| 813 | + dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>, | |
| 814 | + <&dma0 AT91_XDMAC_DT_PERID(23)>; | |
| 815 | + dma-names = "tx", "rx"; | |
| 816 | 816 | status = "disabled"; |
| 817 | 817 | }; |
| 818 | 818 | }; |
| @@ -379,7 +379,7 @@ · 378 unmodified lines | ||
| 379 | 379 | }; |
| 380 | 380 | }; |
| 381 | 381 | |
| 382 | − m25p80@1 { | |
| 382 | + flash@1 { | |
| 383 | 383 | compatible = "st,m25p80"; |
| 384 | 384 | reg = <1>; |
| 385 | 385 | spi-max-frequency = <12000000>; |
| @@ -439,7 +439,7 @@ · 438 unmodified lines | ||
| 439 | 439 | cs-gpios = <&gpiopinctrl 80 0>, <&gpiopinctrl 24 0>, |
| 440 | 440 | <&gpiopinctrl 85 0>; |
| 441 | 441 | |
| 442 | − m25p80@0 { | |
| 442 | + flash@0 { | |
| 443 | 443 | compatible = "m25p80"; |
| 444 | 444 | reg = <0>; |
| 445 | 445 | spi-max-frequency = <12000000>; |
| @@ -398,7 +398,7 @@ · 397 unmodified lines | ||
| 398 | 398 | #size-cells = <0>; |
| 399 | 399 | status = "okay"; |
| 400 | 400 | |
| 401 | − flash0: is25lp016d@0 { | |
| 401 | + flash0: flash@0 { | |
| 402 | 402 | compatible = "jedec,spi-nor"; |
| 403 | 403 | reg = <0>; |
| 404 | 404 | spi-max-frequency = <133000000>; |
| @@ -262,7 +262,7 @@ · 261 unmodified lines | ||
| 262 | 262 | #size-cells = <0>; |
| 263 | 263 | status = "okay"; |
| 264 | 264 | |
| 265 | − flash0: mx66l51235l@0 { | |
| 265 | + flash0: flash@0 { | |
| 266 | 266 | compatible = "jedec,spi-nor"; |
| 267 | 267 | reg = <0>; |
| 268 | 268 | spi-rx-bus-width = <4>; |
| @@ -271,7 +271,7 @@ · 2 unmodified lines | ||
| 271 | 271 | #size-cells = <1>; |
| 272 | 272 | }; |
| 273 | 273 | |
| 274 | − flash1: mx66l51235l@1 { | |
| 274 | + flash1: flash@1 { | |
| 275 | 275 | compatible = "jedec,spi-nor"; |
| 276 | 276 | reg = <1>; |
| 277 | 277 | spi-rx-bus-width = <4>; |
| @@ -60,7 +60,7 @@ · 59 unmodified lines | ||
| 60 | 60 | spi0: spi@fffa4000 { |
| 61 | 61 | cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>; |
| 62 | 62 | status = "okay"; |
| 63 | − mtd_dataflash@0 { | |
| 63 | + flash@0 { | |
| 64 | 64 | compatible = "atmel,at45", "atmel,dataflash"; |
| 65 | 65 | reg = <0>; |
| 66 | 66 | spi-max-frequency = <15000000>; |
| @@ -49,11 +49,13 @@ CONFIG_ATA=y · 48 unmodified lines | ||
| 49 | 49 | CONFIG_PATA_FTIDE010=y |
| 50 | 50 | CONFIG_NETDEVICES=y |
| 51 | 51 | CONFIG_TUN=y |
| 52 | +CONFIG_NET_DSA_REALTEK=y | |
| 52 | 53 | CONFIG_NET_DSA_REALTEK_SMI=y |
| 54 | +CONFIG_NET_DSA_REALTEK_RTL8366RB=y | |
| 53 | 55 | CONFIG_GEMINI_ETHERNET=y |
| 56 | +CONFIG_MARVELL_PHY=y | |
| 54 | 57 | CONFIG_MDIO_BITBANG=y |
| 55 | 58 | CONFIG_MDIO_GPIO=y |
| 56 | −CONFIG_MARVELL_PHY=y | |
| 57 | 59 | CONFIG_INPUT_EVDEV=y |
| 58 | 60 | CONFIG_KEYBOARD_GPIO=y |
| 59 | 61 | # CONFIG_INPUT_MOUSE is not set |
| @@ -66,6 +68,7 @@ CONFIG_SERIAL_OF_PLATFORM=y · 6 unmodified lines | ||
| 66 | 68 | CONFIG_I2C_GPIO=y |
| 67 | 69 | CONFIG_SPI=y |
| 68 | 70 | CONFIG_SPI_GPIO=y |
| 71 | +CONFIG_SENSORS_DRIVETEMP=y | |
| 69 | 72 | CONFIG_SENSORS_GPIO_FAN=y |
| 70 | 73 | CONFIG_SENSORS_LM75=y |
| 71 | 74 | CONFIG_THERMAL=y |
| @@ -1,365 +0,0 @@ | ||
| 1 | −# CONFIG_LOCALVERSION_AUTO is not set | |
| 2 | −CONFIG_SYSVIPC=y | |
| 3 | −CONFIG_LOG_BUF_SHIFT=14 | |
| 4 | −CONFIG_SYSFS_DEPRECATED_V2=y | |
| 5 | −CONFIG_BLK_DEV_INITRD=y | |
| 6 | −CONFIG_RD_BZIP2=y | |
| 7 | −CONFIG_RD_LZMA=y | |
| 8 | −CONFIG_EXPERT=y | |
| 9 | −# CONFIG_COMPAT_BRK is not set | |
| 10 | −CONFIG_SLAB=y | |
| 11 | −CONFIG_MODULES=y | |
| 12 | −CONFIG_MODULE_UNLOAD=y | |
| 13 | −CONFIG_MODULE_FORCE_UNLOAD=y | |
| 14 | −CONFIG_MODVERSIONS=y | |
| 15 | −# CONFIG_BLK_DEV_BSG is not set | |
| 16 | −CONFIG_ARCH_PXA=y | |
| 17 | −CONFIG_MACH_INTELMOTE2=y | |
| 18 | −CONFIG_NO_HZ=y | |
| 19 | −CONFIG_HIGH_RES_TIMERS=y | |
| 20 | −CONFIG_PREEMPT=y | |
| 21 | −CONFIG_AEABI=y | |
| 22 | −CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 23 | −CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 24 | −CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=jffs2 console=ttyS2,115200 mem=32M" | |
| 25 | −CONFIG_KEXEC=y | |
| 26 | −CONFIG_FPE_NWFPE=y | |
| 27 | −CONFIG_BINFMT_AOUT=m | |
| 28 | −CONFIG_BINFMT_MISC=m | |
| 29 | −CONFIG_PM=y | |
| 30 | −CONFIG_APM_EMULATION=y | |
| 31 | −CONFIG_NET=y | |
| 32 | −CONFIG_PACKET=y | |
| 33 | −CONFIG_UNIX=y | |
| 34 | −CONFIG_INET=y | |
| 35 | −CONFIG_IP_PNP=y | |
| 36 | −CONFIG_IP_PNP_DHCP=y | |
| 37 | −CONFIG_IP_PNP_BOOTP=y | |
| 38 | −CONFIG_IP_PNP_RARP=y | |
| 39 | −CONFIG_SYN_COOKIES=y | |
| 40 | −# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| 41 | −# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| 42 | −# CONFIG_INET_XFRM_MODE_BEET is not set | |
| 43 | −# CONFIG_INET_DIAG is not set | |
| 44 | −CONFIG_INET6_AH=m | |
| 45 | −CONFIG_INET6_ESP=m | |
| 46 | −CONFIG_INET6_IPCOMP=m | |
| 47 | −CONFIG_IPV6_MIP6=m | |
| 48 | −CONFIG_IPV6_TUNNEL=m | |
| 49 | −CONFIG_IPV6_MULTIPLE_TABLES=y | |
| 50 | −CONFIG_IPV6_SUBTREES=y | |
| 51 | −CONFIG_NETFILTER=y | |
| 52 | −CONFIG_NETFILTER_NETLINK_QUEUE=m | |
| 53 | −CONFIG_NF_CONNTRACK=m | |
| 54 | −CONFIG_NF_CONNTRACK_EVENTS=y | |
| 55 | −CONFIG_NF_CT_PROTO_SCTP=y | |
| 56 | −CONFIG_NF_CT_PROTO_UDPLITE=y | |
| 57 | −CONFIG_NF_CONNTRACK_AMANDA=m | |
| 58 | −CONFIG_NF_CONNTRACK_FTP=m | |
| 59 | −CONFIG_NF_CONNTRACK_H323=m | |
| 60 | −CONFIG_NF_CONNTRACK_IRC=m | |
| 61 | −CONFIG_NF_CONNTRACK_NETBIOS_NS=m | |
| 62 | −CONFIG_NF_CONNTRACK_PPTP=m | |
| 63 | −CONFIG_NF_CONNTRACK_SANE=m | |
| 64 | −CONFIG_NF_CONNTRACK_SIP=m | |
| 65 | −CONFIG_NF_CONNTRACK_TFTP=m | |
| 66 | −CONFIG_NF_CT_NETLINK=m | |
| 67 | −CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | |
| 68 | −CONFIG_NETFILTER_XT_TARGET_LED=m | |
| 69 | −CONFIG_NETFILTER_XT_TARGET_MARK=m | |
| 70 | −CONFIG_NETFILTER_XT_TARGET_NFLOG=m | |
| 71 | −CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | |
| 72 | −CONFIG_NETFILTER_XT_TARGET_TCPMSS=m | |
| 73 | −CONFIG_NETFILTER_XT_MATCH_COMMENT=m | |
| 74 | −CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m | |
| 75 | −CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m | |
| 76 | −CONFIG_NETFILTER_XT_MATCH_CONNMARK=m | |
| 77 | −CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m | |
| 78 | −CONFIG_NETFILTER_XT_MATCH_DCCP=m | |
| 79 | −CONFIG_NETFILTER_XT_MATCH_DSCP=m | |
| 80 | −CONFIG_NETFILTER_XT_MATCH_ESP=m | |
| 81 | −CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | |
| 82 | −CONFIG_NETFILTER_XT_MATCH_HELPER=m | |
| 83 | −CONFIG_NETFILTER_XT_MATCH_LENGTH=m | |
| 84 | −CONFIG_NETFILTER_XT_MATCH_LIMIT=m | |
| 85 | −CONFIG_NETFILTER_XT_MATCH_MAC=m | |
| 86 | −CONFIG_NETFILTER_XT_MATCH_MARK=m | |
| 87 | −CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | |
| 88 | −CONFIG_NETFILTER_XT_MATCH_POLICY=m | |
| 89 | −CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | |
| 90 | −CONFIG_NETFILTER_XT_MATCH_QUOTA=m | |
| 91 | −CONFIG_NETFILTER_XT_MATCH_REALM=m | |
| 92 | −CONFIG_NETFILTER_XT_MATCH_SCTP=m | |
| 93 | −CONFIG_NETFILTER_XT_MATCH_STATE=m | |
| 94 | −CONFIG_NETFILTER_XT_MATCH_STATISTIC=m | |
| 95 | −CONFIG_NETFILTER_XT_MATCH_STRING=m | |
| 96 | −CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | |
| 97 | −CONFIG_NETFILTER_XT_MATCH_TIME=m | |
| 98 | −CONFIG_NETFILTER_XT_MATCH_U32=m | |
| 99 | −CONFIG_NF_CONNTRACK_IPV4=m | |
| 100 | −CONFIG_IP_NF_IPTABLES=m | |
| 101 | −CONFIG_IP_NF_MATCH_ADDRTYPE=m | |
| 102 | −CONFIG_IP_NF_MATCH_AH=m | |
| 103 | −CONFIG_IP_NF_MATCH_ECN=m | |
| 104 | −CONFIG_IP_NF_MATCH_TTL=m | |
| 105 | −CONFIG_IP_NF_FILTER=m | |
| 106 | −CONFIG_IP_NF_TARGET_REJECT=m | |
| 107 | −CONFIG_IP_NF_TARGET_LOG=m | |
| 108 | −CONFIG_NF_NAT=m | |
| 109 | −CONFIG_IP_NF_TARGET_MASQUERADE=m | |
| 110 | −CONFIG_IP_NF_TARGET_NETMAP=m | |
| 111 | −CONFIG_IP_NF_TARGET_REDIRECT=m | |
| 112 | −CONFIG_NF_NAT_SNMP_BASIC=m | |
| 113 | −CONFIG_IP_NF_MANGLE=m | |
| 114 | −CONFIG_IP_NF_TARGET_CLUSTERIP=m | |
| 115 | −CONFIG_IP_NF_TARGET_ECN=m | |
| 116 | −CONFIG_IP_NF_TARGET_TTL=m | |
| 117 | −CONFIG_IP_NF_RAW=m | |
| 118 | −CONFIG_IP_NF_ARPTABLES=m | |
| 119 | −CONFIG_IP_NF_ARPFILTER=m | |
| 120 | −CONFIG_IP_NF_ARP_MANGLE=m | |
| 121 | −CONFIG_NF_CONNTRACK_IPV6=m | |
| 122 | −CONFIG_IP6_NF_IPTABLES=m | |
| 123 | −CONFIG_IP6_NF_MATCH_AH=m | |
| 124 | −CONFIG_IP6_NF_MATCH_EUI64=m | |
| 125 | −CONFIG_IP6_NF_MATCH_FRAG=m | |
| 126 | −CONFIG_IP6_NF_MATCH_OPTS=m | |
| 127 | −CONFIG_IP6_NF_MATCH_HL=m | |
| 128 | −CONFIG_IP6_NF_MATCH_IPV6HEADER=m | |
| 129 | −CONFIG_IP6_NF_MATCH_MH=m | |
| 130 | −CONFIG_IP6_NF_MATCH_RT=m | |
| 131 | −CONFIG_IP6_NF_TARGET_HL=m | |
| 132 | −CONFIG_IP6_NF_FILTER=m | |
| 133 | −CONFIG_IP6_NF_TARGET_REJECT=m | |
| 134 | −CONFIG_IP6_NF_MANGLE=m | |
| 135 | −CONFIG_IP6_NF_RAW=m | |
| 136 | −CONFIG_BRIDGE=m | |
| 137 | −# CONFIG_BRIDGE_IGMP_SNOOPING is not set | |
| 138 | −CONFIG_IEEE802154=y | |
| 139 | −# CONFIG_WIRELESS is not set | |
| 140 | −CONFIG_DEVTMPFS=y | |
| 141 | −CONFIG_DEVTMPFS_MOUNT=y | |
| 142 | −CONFIG_FW_LOADER=m | |
| 143 | −CONFIG_CONNECTOR=m | |
| 144 | −CONFIG_MTD=y | |
| 145 | −CONFIG_MTD_CMDLINE_PARTS=y | |
| 146 | −CONFIG_MTD_AFS_PARTS=y | |
| 147 | −CONFIG_MTD_AR7_PARTS=y | |
| 148 | −CONFIG_MTD_BLOCK=y | |
| 149 | −CONFIG_MTD_CFI=y | |
| 150 | −CONFIG_MTD_CFI_ADV_OPTIONS=y | |
| 151 | −CONFIG_MTD_CFI_GEOMETRY=y | |
| 152 | −# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set | |
| 153 | −# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set | |
| 154 | −# CONFIG_MTD_CFI_I2 is not set | |
| 155 | −CONFIG_MTD_OTP=y | |
| 156 | −CONFIG_MTD_CFI_INTELEXT=y | |
| 157 | −CONFIG_MTD_PXA2XX=y | |
| 158 | −CONFIG_BLK_DEV_LOOP=m | |
| 159 | −CONFIG_BLK_DEV_CRYPTOLOOP=m | |
| 160 | −CONFIG_BLK_DEV_NBD=m | |
| 161 | −CONFIG_BLK_DEV_RAM=y | |
| 162 | −CONFIG_NETDEVICES=y | |
| 163 | −CONFIG_DUMMY=y | |
| 164 | −# CONFIG_WLAN is not set | |
| 165 | −CONFIG_PPP=m | |
| 166 | −CONFIG_PPP_MULTILINK=y | |
| 167 | −CONFIG_PPP_FILTER=y | |
| 168 | −CONFIG_PPP_ASYNC=m | |
| 169 | −CONFIG_PPP_SYNC_TTY=m | |
| 170 | −CONFIG_PPP_DEFLATE=m | |
| 171 | −CONFIG_PPP_BSDCOMP=m | |
| 172 | −# CONFIG_INPUT_MOUSEDEV is not set | |
| 173 | −CONFIG_INPUT_EVDEV=y | |
| 174 | −# CONFIG_KEYBOARD_ATKBD is not set | |
| 175 | −CONFIG_KEYBOARD_GPIO=y | |
| 176 | −CONFIG_KEYBOARD_PXA27x=y | |
| 177 | −# CONFIG_INPUT_MOUSE is not set | |
| 178 | −CONFIG_INPUT_TOUCHSCREEN=y | |
| 179 | −CONFIG_INPUT_MISC=y | |
| 180 | −CONFIG_INPUT_UINPUT=y | |
| 181 | −# CONFIG_SERIO is not set | |
| 182 | −CONFIG_SERIAL_PXA=y | |
| 183 | −CONFIG_SERIAL_PXA_CONSOLE=y | |
| 184 | −CONFIG_LEGACY_PTY_COUNT=8 | |
| 185 | −# CONFIG_HW_RANDOM is not set | |
| 186 | −CONFIG_I2C=y | |
| 187 | −CONFIG_I2C_CHARDEV=y | |
| 188 | −CONFIG_I2C_PXA=y | |
| 189 | −CONFIG_SPI=y | |
| 190 | −CONFIG_SPI_PXA2XX=y | |
| 191 | −CONFIG_GPIO_SYSFS=y | |
| 192 | −CONFIG_POWER_SUPPLY=y | |
| 193 | −# CONFIG_HWMON is not set | |
| 194 | −CONFIG_PMIC_DA903X=y | |
| 195 | −CONFIG_REGULATOR=y | |
| 196 | −CONFIG_REGULATOR_DEBUG=y | |
| 197 | −CONFIG_REGULATOR_DA903X=y | |
| 198 | −CONFIG_MEDIA_SUPPORT=y | |
| 199 | −CONFIG_VIDEO_DEV=y | |
| 200 | −CONFIG_MEDIA_TUNER_CUSTOMISE=y | |
| 201 | −# CONFIG_MEDIA_TUNER_SIMPLE is not set | |
| 202 | −# CONFIG_MEDIA_TUNER_TDA8290 is not set | |
| 203 | −# CONFIG_MEDIA_TUNER_TDA827X is not set | |
| 204 | −# CONFIG_MEDIA_TUNER_TDA18271 is not set | |
| 205 | −# CONFIG_MEDIA_TUNER_TDA9887 is not set | |
| 206 | −# CONFIG_MEDIA_TUNER_TEA5761 is not set | |
| 207 | −# CONFIG_MEDIA_TUNER_TEA5767 is not set | |
| 208 | −# CONFIG_MEDIA_TUNER_MT20XX is not set | |
| 209 | −# CONFIG_MEDIA_TUNER_MT2060 is not set | |
| 210 | −# CONFIG_MEDIA_TUNER_MT2266 is not set | |
| 211 | −# CONFIG_MEDIA_TUNER_MT2131 is not set | |
| 212 | −# CONFIG_MEDIA_TUNER_QT1010 is not set | |
| 213 | −# CONFIG_MEDIA_TUNER_XC2028 is not set | |
| 214 | −# CONFIG_MEDIA_TUNER_XC5000 is not set | |
| 215 | −# CONFIG_MEDIA_TUNER_MXL5005S is not set | |
| 216 | −# CONFIG_MEDIA_TUNER_MXL5007T is not set | |
| 217 | −# CONFIG_MEDIA_TUNER_MC44S803 is not set | |
| 218 | −# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | |
| 219 | −CONFIG_VIDEO_PXA27x=y | |
| 220 | −# CONFIG_V4L_USB_DRIVERS is not set | |
| 221 | −# CONFIG_RADIO_ADAPTERS is not set | |
| 222 | −CONFIG_FB=y | |
| 223 | −CONFIG_FB_PXA=y | |
| 224 | −CONFIG_FB_PXA_OVERLAY=y | |
| 225 | −CONFIG_FB_PXA_PARAMETERS=y | |
| 226 | −# CONFIG_LCD_CLASS_DEVICE is not set | |
| 227 | −CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| 228 | −# CONFIG_VGA_CONSOLE is not set | |
| 229 | −CONFIG_FRAMEBUFFER_CONSOLE=y | |
| 230 | −CONFIG_FONTS=y | |
| 231 | −CONFIG_FONT_MINI_4x6=y | |
| 232 | −CONFIG_SOUND=y | |
| 233 | −CONFIG_SND=y | |
| 234 | −CONFIG_SND_MIXER_OSS=y | |
| 235 | −CONFIG_SND_PCM_OSS=y | |
| 236 | −# CONFIG_SND_DRIVERS is not set | |
| 237 | −# CONFIG_SND_ARM is not set | |
| 238 | −# CONFIG_SND_SPI is not set | |
| 239 | −# CONFIG_SND_USB is not set | |
| 240 | −CONFIG_SND_SOC=y | |
| 241 | −CONFIG_SND_PXA2XX_SOC=y | |
| 242 | −# CONFIG_USB_HID is not set | |
| 243 | −CONFIG_USB=y | |
| 244 | −CONFIG_USB_OHCI_HCD=y | |
| 245 | −CONFIG_USB_GADGET=y | |
| 246 | −CONFIG_USB_PXA27X=y | |
| 247 | −CONFIG_USB_ETH=m | |
| 248 | −# CONFIG_USB_ETH_RNDIS is not set | |
| 249 | −CONFIG_MMC=y | |
| 250 | −CONFIG_SDIO_UART=m | |
| 251 | −CONFIG_MMC_PXA=y | |
| 252 | −CONFIG_MMC_SPI=y | |
| 253 | −CONFIG_NEW_LEDS=y | |
| 254 | −CONFIG_LEDS_CLASS=y | |
| 255 | −CONFIG_LEDS_LP3944=y | |
| 256 | −CONFIG_LEDS_TRIGGERS=y | |
| 257 | −CONFIG_LEDS_TRIGGER_TIMER=y | |
| 258 | −CONFIG_LEDS_TRIGGER_HEARTBEAT=y | |
| 259 | −CONFIG_LEDS_TRIGGER_BACKLIGHT=y | |
| 260 | −CONFIG_LEDS_TRIGGER_GPIO=y | |
| 261 | −CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | |
| 262 | −CONFIG_RTC_CLASS=y | |
| 263 | −CONFIG_RTC_DRV_PXA=y | |
| 264 | −CONFIG_EXT2_FS=y | |
| 265 | −CONFIG_EXT3_FS=m | |
| 266 | −CONFIG_AUTOFS4_FS=y | |
| 267 | −CONFIG_FUSE_FS=m | |
| 268 | −CONFIG_CUSE=m | |
| 269 | −CONFIG_MSDOS_FS=m | |
| 270 | −CONFIG_VFAT_FS=m | |
| 271 | −CONFIG_TMPFS=y | |
| 272 | −CONFIG_JFFS2_FS=y | |
| 273 | −CONFIG_JFFS2_FS_WBUF_VERIFY=y | |
| 274 | −CONFIG_JFFS2_SUMMARY=y | |
| 275 | −CONFIG_JFFS2_FS_XATTR=y | |
| 276 | −CONFIG_JFFS2_COMPRESSION_OPTIONS=y | |
| 277 | −CONFIG_JFFS2_LZO=y | |
| 278 | −CONFIG_JFFS2_RUBIN=y | |
| 279 | −CONFIG_CRAMFS=m | |
| 280 | −CONFIG_SQUASHFS=m | |
| 281 | −CONFIG_ROMFS_FS=m | |
| 282 | −CONFIG_NFS_FS=y | |
| 283 | −CONFIG_NFS_V3=y | |
| 284 | −CONFIG_NFS_V3_ACL=y | |
| 285 | −CONFIG_NFSD=m | |
| 286 | −CONFIG_NFSD_V3_ACL=y | |
| 287 | −CONFIG_SMB_FS=m | |
| 288 | −CONFIG_CIFS=m | |
| 289 | −CONFIG_CIFS_STATS=y | |
| 290 | −CONFIG_CIFS_XATTR=y | |
| 291 | −CONFIG_CIFS_POSIX=y | |
| 292 | −CONFIG_NLS_CODEPAGE_437=m | |
| 293 | −CONFIG_NLS_CODEPAGE_737=m | |
| 294 | −CONFIG_NLS_CODEPAGE_775=m | |
| 295 | −CONFIG_NLS_CODEPAGE_850=m | |
| 296 | −CONFIG_NLS_CODEPAGE_852=m | |
| 297 | −CONFIG_NLS_CODEPAGE_855=m | |
| 298 | −CONFIG_NLS_CODEPAGE_857=m | |
| 299 | −CONFIG_NLS_CODEPAGE_860=m | |
| 300 | −CONFIG_NLS_CODEPAGE_861=m | |
| 301 | −CONFIG_NLS_CODEPAGE_862=m | |
| 302 | −CONFIG_NLS_CODEPAGE_863=m | |
| 303 | −CONFIG_NLS_CODEPAGE_864=m | |
| 304 | −CONFIG_NLS_CODEPAGE_865=m | |
| 305 | −CONFIG_NLS_CODEPAGE_866=m | |
| 306 | −CONFIG_NLS_CODEPAGE_869=m | |
| 307 | −CONFIG_NLS_CODEPAGE_936=m | |
| 308 | −CONFIG_NLS_CODEPAGE_950=m | |
| 309 | −CONFIG_NLS_CODEPAGE_932=m | |
| 310 | −CONFIG_NLS_CODEPAGE_949=m | |
| 311 | −CONFIG_NLS_CODEPAGE_874=m | |
| 312 | −CONFIG_NLS_ISO8859_8=m | |
| 313 | −CONFIG_NLS_CODEPAGE_1250=m | |
| 314 | −CONFIG_NLS_CODEPAGE_1251=m | |
| 315 | −CONFIG_NLS_ASCII=m | |
| 316 | −CONFIG_NLS_ISO8859_1=m | |
| 317 | −CONFIG_NLS_ISO8859_2=m | |
| 318 | −CONFIG_NLS_ISO8859_3=m | |
| 319 | −CONFIG_NLS_ISO8859_4=m | |
| 320 | −CONFIG_NLS_ISO8859_5=m | |
| 321 | −CONFIG_NLS_ISO8859_6=m | |
| 322 | −CONFIG_NLS_ISO8859_7=m | |
| 323 | −CONFIG_NLS_ISO8859_9=m | |
| 324 | −CONFIG_NLS_ISO8859_13=m | |
| 325 | −CONFIG_NLS_ISO8859_14=m | |
| 326 | −CONFIG_NLS_ISO8859_15=m | |
| 327 | −CONFIG_NLS_KOI8_R=m | |
| 328 | −CONFIG_NLS_KOI8_U=m | |
| 329 | −CONFIG_NLS_UTF8=m | |
| 330 | −CONFIG_PRINTK_TIME=y | |
| 331 | −CONFIG_DEBUG_FS=y | |
| 332 | −CONFIG_DEBUG_KERNEL=y | |
| 333 | −# CONFIG_SCHED_DEBUG is not set | |
| 334 | −CONFIG_DEBUG_RT_MUTEXES=y | |
| 335 | −CONFIG_PROVE_LOCKING=y | |
| 336 | −# CONFIG_FTRACE is not set | |
| 337 | −CONFIG_DEBUG_USER=y | |
| 338 | −CONFIG_CRYPTO_NULL=m | |
| 339 | −CONFIG_CRYPTO_CRYPTD=m | |
| 340 | −CONFIG_CRYPTO_TEST=m | |
| 341 | −CONFIG_CRYPTO_ECB=m | |
| 342 | −CONFIG_CRYPTO_LRW=m | |
| 343 | −CONFIG_CRYPTO_PCBC=m | |
| 344 | −CONFIG_CRYPTO_XTS=m | |
| 345 | −CONFIG_CRYPTO_XCBC=m | |
| 346 | −CONFIG_CRYPTO_VMAC=m | |
| 347 | −CONFIG_CRYPTO_GHASH=m | |
| 348 | −CONFIG_CRYPTO_MD4=m | |
| 349 | −CONFIG_CRYPTO_MICHAEL_MIC=m | |
| 350 | −CONFIG_CRYPTO_SHA256=m | |
| 351 | −CONFIG_CRYPTO_SHA512=m | |
| 352 | −CONFIG_CRYPTO_TGR192=m | |
| 353 | −CONFIG_CRYPTO_AES=m | |
| 354 | −CONFIG_CRYPTO_ARC4=m | |
| 355 | −CONFIG_CRYPTO_BLOWFISH=m | |
| 356 | −CONFIG_CRYPTO_CAST5=m | |
| 357 | −CONFIG_CRYPTO_CAST6=m | |
| 358 | −CONFIG_CRYPTO_FCRYPT=m | |
| 359 | −CONFIG_CRYPTO_KHAZAD=m | |
| 360 | −CONFIG_CRYPTO_SEED=m | |
| 361 | −CONFIG_CRYPTO_SERPENT=m | |
| 362 | −CONFIG_CRYPTO_TEA=m | |
| 363 | −CONFIG_CRYPTO_TWOFISH=m | |
| 364 | −# CONFIG_CRYPTO_ANSI_CPRNG is not set | |
| 365 | −CONFIG_CRC16=y | |
| @@ -673,6 +673,7 @@ CONFIG_VIDEO_STI_DELTA=m · 672 unmodified lines | ||
| 673 | 673 | CONFIG_VIDEO_RENESAS_FDP1=m |
| 674 | 674 | CONFIG_VIDEO_RENESAS_JPU=m |
| 675 | 675 | CONFIG_VIDEO_RENESAS_VSP1=m |
| 676 | +CONFIG_VIDEO_TEGRA_VDE=m | |
| 676 | 677 | CONFIG_V4L_TEST_DRIVERS=y |
| 677 | 678 | CONFIG_VIDEO_VIVID=m |
| 678 | 679 | CONFIG_VIDEO_ADV7180=m |
| @@ -286,7 +286,8 @@ CONFIG_SERIO_NVEC_PS2=y · 285 unmodified lines | ||
| 286 | 286 | CONFIG_NVEC_POWER=y |
| 287 | 287 | CONFIG_NVEC_PAZ00=y |
| 288 | 288 | CONFIG_STAGING_MEDIA=y |
| 289 | −CONFIG_TEGRA_VDE=y | |
| 289 | +CONFIG_V4L_MEM2MEM_DRIVERS=y | |
| 290 | +CONFIG_VIDEO_TEGRA_VDE=y | |
| 290 | 291 | CONFIG_CHROME_PLATFORMS=y |
| 291 | 292 | CONFIG_CROS_EC=y |
| 292 | 293 | CONFIG_CROS_EC_I2C=m |
| @@ -20,7 +20,6 @@ CONFIG_VFP=y · 19 unmodified lines | ||
| 20 | 20 | CONFIG_NEON=y |
| 21 | 21 | CONFIG_MODULES=y |
| 22 | 22 | CONFIG_MODULE_UNLOAD=y |
| 23 | −# CONFIG_BLK_DEV_BSG is not set | |
| 24 | 23 | CONFIG_PARTITION_ADVANCED=y |
| 25 | 24 | CONFIG_CMA=y |
| 26 | 25 | CONFIG_NET=y |
| @@ -41,6 +40,8 @@ CONFIG_MAC80211_LEDS=y · 14 unmodified lines | ||
| 41 | 40 | CONFIG_CAIF=y |
| 42 | 41 | CONFIG_DEVTMPFS=y |
| 43 | 42 | CONFIG_DEVTMPFS_MOUNT=y |
| 43 | +CONFIG_GNSS=y | |
| 44 | +CONFIG_GNSS_SIRF_SERIAL=y | |
| 44 | 45 | CONFIG_BLK_DEV_RAM=y |
| 45 | 46 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
| 46 | 47 | CONFIG_NETDEVICES=y |
| @@ -83,6 +84,8 @@ CONFIG_SPI_GPIO=y · 36 unmodified lines | ||
| 83 | 84 | CONFIG_SPI_PL022=y |
| 84 | 85 | CONFIG_GPIO_STMPE=y |
| 85 | 86 | CONFIG_GPIO_TC3589X=y |
| 87 | +CONFIG_BATTERY_SAMSUNG_SDI=y | |
| 88 | +CONFIG_AB8500_BM=y | |
| 86 | 89 | CONFIG_SENSORS_IIO_HWMON=y |
| 87 | 90 | CONFIG_SENSORS_NTC_THERMISTOR=y |
| 88 | 91 | CONFIG_THERMAL=y |
| @@ -98,10 +101,13 @@ CONFIG_VIDEO_V4L2_SUBDEV_API=y · 9 unmodified lines | ||
| 98 | 101 | CONFIG_V4L2_FLASH_LED_CLASS=y |
| 99 | 102 | CONFIG_DRM=y |
| 100 | 103 | CONFIG_DRM_PANEL_NOVATEK_NT35510=y |
| 104 | +CONFIG_DRM_PANEL_NOVATEK_NT35560=y | |
| 105 | +CONFIG_DRM_PANEL_SAMSUNG_DB7430=y | |
| 101 | 106 | CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=y |
| 107 | +CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=y | |
| 102 | 108 | CONFIG_DRM_PANEL_SAMSUNG_S6E63M0=y |
| 103 | 109 | CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI=y |
| 104 | −CONFIG_DRM_PANEL_SONY_ACX424AKP=y | |
| 110 | +CONFIG_DRM_PANEL_WIDECHIPS_WS2401=y | |
| 105 | 111 | CONFIG_DRM_LIMA=y |
| 106 | 112 | CONFIG_DRM_MCDE=y |
| 107 | 113 | CONFIG_FB=y |
| @@ -129,6 +135,7 @@ CONFIG_LEDS_LM3530=y · 21 unmodified lines | ||
| 129 | 135 | CONFIG_LEDS_GPIO=y |
| 130 | 136 | CONFIG_LEDS_LP55XX_COMMON=y |
| 131 | 137 | CONFIG_LEDS_LP5521=y |
| 138 | +CONFIG_LEDS_REGULATOR=y | |
| 132 | 139 | CONFIG_LEDS_RT8515=y |
| 133 | 140 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y |
| 134 | 141 | CONFIG_RTC_CLASS=y |
| @@ -144,17 +151,22 @@ CONFIG_IIO_SW_TRIGGER=y · 9 unmodified lines | ||
| 144 | 151 | CONFIG_BMA180=y |
| 145 | 152 | CONFIG_BMC150_ACCEL=y |
| 146 | 153 | CONFIG_IIO_ST_ACCEL_3AXIS=y |
| 154 | +# CONFIG_IIO_ST_ACCEL_SPI_3AXIS is not set | |
| 147 | 155 | CONFIG_IIO_RESCALE=y |
| 148 | 156 | CONFIG_MPU3050_I2C=y |
| 149 | 157 | CONFIG_IIO_ST_GYRO_3AXIS=y |
| 158 | +# CONFIG_IIO_ST_GYRO_SPI_3AXIS is not set | |
| 150 | 159 | CONFIG_INV_MPU6050_I2C=y |
| 151 | 160 | CONFIG_BH1780=y |
| 152 | 161 | CONFIG_GP2AP002=y |
| 162 | +CONFIG_TSL2772=y | |
| 153 | 163 | CONFIG_AK8974=y |
| 154 | 164 | CONFIG_IIO_ST_MAGN_3AXIS=y |
| 165 | +# CONFIG_IIO_ST_MAGN_SPI_3AXIS is not set | |
| 155 | 166 | CONFIG_YAMAHA_YAS530=y |
| 156 | 167 | CONFIG_IIO_HRTIMER_TRIGGER=y |
| 157 | 168 | CONFIG_IIO_ST_PRESS=y |
| 169 | +# CONFIG_IIO_ST_PRESS_SPI is not set | |
| 158 | 170 | CONFIG_EXT2_FS=y |
| 159 | 171 | CONFIG_EXT2_FS_XATTR=y |
| 160 | 172 | CONFIG_EXT2_FS_POSIX_ACL=y |
| @@ -173,10 +185,9 @@ CONFIG_CRYPTO_DEV_UX500_CRYP=y · 12 unmodified lines | ||
| 173 | 185 | CONFIG_CRYPTO_DEV_UX500_HASH=y |
| 174 | 186 | CONFIG_CRYPTO_DEV_UX500_DEBUG=y |
| 175 | 187 | CONFIG_PRINTK_TIME=y |
| 176 | −CONFIG_DEBUG_INFO=y | |
| 188 | +CONFIG_DEBUG_KERNEL=y | |
| 177 | 189 | CONFIG_MAGIC_SYSRQ=y |
| 178 | 190 | CONFIG_DEBUG_FS=y |
| 179 | −CONFIG_DEBUG_KERNEL=y | |
| 180 | 191 | # CONFIG_SCHED_DEBUG is not set |
| 181 | 192 | # CONFIG_FTRACE is not set |
| 182 | 193 | CONFIG_DEBUG_USER=y |
| @@ -1101,11 +1101,13 @@ static int __init da850_evm_config_emac(void) · 1100 unmodified lines | ||
| 1101 | 1101 | int ret; |
| 1102 | 1102 | u32 val; |
| 1103 | 1103 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
| 1104 | − u8 rmii_en = soc_info->emac_pdata->rmii_en; | |
| 1104 | + u8 rmii_en; | |
| 1105 | 1105 | |
| 1106 | 1106 | if (!machine_is_davinci_da850_evm()) |
| 1107 | 1107 | return 0; |
| 1108 | 1108 | |
| 1109 | + rmii_en = soc_info->emac_pdata->rmii_en; | |
| 1110 | + | |
| 1109 | 1111 | cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); |
| 1110 | 1112 | |
| 1111 | 1113 | val = __raw_readl(cfg_chip3_base); |
| @@ -148,8 +148,10 @@ static struct clk_hw *ep93xx_clk_register_gate(const char *name, · 147 unmodified lines | ||
| 148 | 148 | psc->lock = &clk_lock; |
| 149 | 149 | |
| 150 | 150 | clk = clk_register(NULL, &psc->hw); |
| 151 | − if (IS_ERR(clk)) | |
| 151 | + if (IS_ERR(clk)) { | |
| 152 | 152 | kfree(psc); |
| 153 | + return ERR_CAST(clk); | |
| 154 | + } | |
| 153 | 155 | |
| 154 | 156 | return &psc->hw; |
| 155 | 157 | } |
| @@ -207,7 +209,7 @@ static int ep93xx_mux_determine_rate(struct clk_hw *hw, · 51 unmodified lines | ||
| 207 | 209 | struct clk_rate_request *req) |
| 208 | 210 | { |
| 209 | 211 | unsigned long rate = req->rate; |
| 210 | − struct clk *best_parent = 0; | |
| 212 | + struct clk *best_parent = NULL; | |
| 211 | 213 | unsigned long __parent_rate; |
| 212 | 214 | unsigned long best_rate = 0, actual_rate, mclk_rate; |
| 213 | 215 | unsigned long best_parent_rate; |
| @@ -17,7 +17,6 @@ menuconfig ARCH_EXYNOS · 16 unmodified lines | ||
| 17 | 17 | select EXYNOS_PMU |
| 18 | 18 | select EXYNOS_SROM |
| 19 | 19 | select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS |
| 20 | − select GPIOLIB | |
| 21 | 20 | select HAVE_ARM_ARCH_TIMER if ARCH_EXYNOS5 |
| 22 | 21 | select HAVE_ARM_SCU if SMP |
| 23 | 22 | select PINCTRL |
| @@ -7,6 +7,8 @@ · 6 unmodified lines | ||
| 7 | 7 | #include <asm/traps.h> |
| 8 | 8 | #include <asm/ptrace.h> |
| 9 | 9 | |
| 10 | +#include "iop3xx.h" | |
| 11 | + | |
| 10 | 12 | void iop_enable_cp6(void) |
| 11 | 13 | { |
| 12 | 14 | u32 temp; |
| @@ -314,10 +314,12 @@ void __init omap_gic_of_init(void) · 313 unmodified lines | ||
| 314 | 314 | |
| 315 | 315 | np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); |
| 316 | 316 | gic_dist_base_addr = of_iomap(np, 0); |
| 317 | + of_node_put(np); | |
| 317 | 318 | WARN_ON(!gic_dist_base_addr); |
| 318 | 319 | |
| 319 | 320 | np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-twd-timer"); |
| 320 | 321 | twd_base = of_iomap(np, 0); |
| 322 | + of_node_put(np); | |
| 321 | 323 | WARN_ON(!twd_base); |
| 322 | 324 | |
| 323 | 325 | skip_errata_init: |
| @@ -122,13 +122,13 @@ static inline bool cluster_is_a15(u32 cluster) · 121 unmodified lines | ||
| 122 | 122 | } |
| 123 | 123 | |
| 124 | 124 | /** |
| 125 | − * ve_spc_global_wakeup_irq() | |
| 125 | + * ve_spc_global_wakeup_irq() - sets/clears global wakeup IRQs | |
| 126 | + * | |
| 127 | + * @set: if true, global wake-up IRQs are set, if false they are cleared | |
| 126 | 128 | * |
| 127 | 129 | * Function to set/clear global wakeup IRQs. Not protected by locking since |
| 128 | 130 | * it might be used in code paths where normal cacheable locks are not |
| 129 | 131 | * working. Locking must be provided by the caller to ensure atomicity. |
| 130 | − * | |
| 131 | − * @set: if true, global wake-up IRQs are set, if false they are cleared | |
| 132 | 132 | */ |
| 133 | 133 | void ve_spc_global_wakeup_irq(bool set) |
| 134 | 134 | { |
| @@ -145,15 +145,15 @@ void ve_spc_global_wakeup_irq(bool set) · 10 unmodified lines | ||
| 145 | 145 | } |
| 146 | 146 | |
| 147 | 147 | /** |
| 148 | − * ve_spc_cpu_wakeup_irq() | |
| 149 | − * | |
| 150 | − * Function to set/clear per-CPU wake-up IRQs. Not protected by locking since | |
| 151 | − * it might be used in code paths where normal cacheable locks are not | |
| 152 | − * working. Locking must be provided by the caller to ensure atomicity. | |
| 148 | + * ve_spc_cpu_wakeup_irq() - sets/clears per-CPU wake-up IRQs | |
| 153 | 149 | * |
| 154 | 150 | * @cluster: mpidr[15:8] bitfield describing cluster affinity level |
| 155 | 151 | * @cpu: mpidr[7:0] bitfield describing cpu affinity level |
| 156 | 152 | * @set: if true, wake-up IRQs are set, if false they are cleared |
| 153 | + * | |
| 154 | + * Function to set/clear per-CPU wake-up IRQs. Not protected by locking since | |
| 155 | + * it might be used in code paths where normal cacheable locks are not | |
| 156 | + * working. Locking must be provided by the caller to ensure atomicity. | |
| 157 | 157 | */ |
| 158 | 158 | void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set) |
| 159 | 159 | { |
| @@ -200,14 +200,14 @@ void ve_spc_set_resume_addr(u32 cluster, u32 cpu, u32 addr) · 40 unmodified lines | ||
| 200 | 200 | } |
| 201 | 201 | |
| 202 | 202 | /** |
| 203 | − * ve_spc_powerdown() | |
| 203 | + * ve_spc_powerdown() - enables/disables cluster powerdown | |
| 204 | + * | |
| 205 | + * @cluster: mpidr[15:8] bitfield describing cluster affinity level | |
| 206 | + * @enable: if true enables powerdown, if false disables it | |
| 204 | 207 | * |
| 205 | 208 | * Function to enable/disable cluster powerdown. Not protected by locking |
| 206 | 209 | * since it might be used in code paths where normal cacheable locks are not |
| 207 | 210 | * working. Locking must be provided by the caller to ensure atomicity. |
| 208 | − * | |
| 209 | − * @cluster: mpidr[15:8] bitfield describing cluster affinity level | |
| 210 | − * @enable: if true enables powerdown, if false disables it | |
| 211 | 211 | */ |
| 212 | 212 | void ve_spc_powerdown(u32 cluster, bool enable) |
| 213 | 213 | { |
| @@ -228,7 +228,7 @@ static u32 standbywfi_cpu_mask(u32 cpu, u32 cluster) · 14 unmodified lines | ||
| 228 | 228 | } |
| 229 | 229 | |
| 230 | 230 | /** |
| 231 | − * ve_spc_cpu_in_wfi(u32 cpu, u32 cluster) | |
| 231 | + * ve_spc_cpu_in_wfi() - Checks if the specified CPU is in WFI or not | |
| 232 | 232 | * |
| 233 | 233 | * @cpu: mpidr[7:0] bitfield describing CPU affinity level within cluster |
| 234 | 234 | * @cluster: mpidr[15:8] bitfield describing cluster affinity level |
| @@ -580,7 +580,7 @@ static int __init ve_spc_clk_init(void) · 345 unmodified lines | ||
| 580 | 580 | } |
| 581 | 581 | |
| 582 | 582 | cluster = topology_physical_package_id(cpu_dev->id); |
| 583 | − if (init_opp_table[cluster]) | |
| 583 | + if (cluster < 0 || init_opp_table[cluster]) | |
| 584 | 584 | continue; |
| 585 | 585 | |
| 586 | 586 | if (ve_init_opp_table(cpu_dev)) |
| @@ -337,12 +337,15 @@ int __init arch_xen_unpopulated_init(struct resource **res) · 336 unmodified lines | ||
| 337 | 337 | |
| 338 | 338 | if (!nr_reg) { |
| 339 | 339 | pr_err("No extended regions are found\n"); |
| 340 | + of_node_put(np); | |
| 340 | 341 | return -EINVAL; |
| 341 | 342 | } |
| 342 | 343 | |
| 343 | 344 | regs = kcalloc(nr_reg, sizeof(*regs), GFP_KERNEL); |
| 344 | − if (!regs) | |
| 345 | + if (!regs) { | |
| 346 | + of_node_put(np); | |
| 345 | 347 | return -ENOMEM; |
| 348 | + } | |
| 346 | 349 | |
| 347 | 350 | /* |
| 348 | 351 | * Create resource from extended regions provided by the hypervisor to be |
| @@ -403,8 +406,8 @@ int __init arch_xen_unpopulated_init(struct resource **res) · 54 unmodified lines | ||
| 403 | 406 | *res = &xen_resource; |
| 404 | 407 | |
| 405 | 408 | err: |
| 409 | + of_node_put(np); | |
| 406 | 410 | kfree(regs); |
| 407 | − | |
| 408 | 411 | return rc; |
| 409 | 412 | } |
| 410 | 413 | #endif |
| @@ -424,8 +427,10 @@ static void __init xen_dt_guest_init(void) · 13 unmodified lines | ||
| 424 | 427 | |
| 425 | 428 | if (of_address_to_resource(xen_node, GRANT_TABLE_INDEX, &res)) { |
| 426 | 429 | pr_err("Xen grant table region is not found\n"); |
| 430 | + of_node_put(xen_node); | |
| 427 | 431 | return; |
| 428 | 432 | } |
| 433 | + of_node_put(xen_node); | |
| 429 | 434 | xen_grant_frames = res.start; |
| 430 | 435 | } |
| 431 | 436 | |
| @@ -175,8 +175,6 @@ config ARM64 · 174 unmodified lines | ||
| 175 | 175 | select HAVE_DEBUG_KMEMLEAK |
| 176 | 176 | select HAVE_DMA_CONTIGUOUS |
| 177 | 177 | select HAVE_DYNAMIC_FTRACE |
| 178 | − select HAVE_DYNAMIC_FTRACE_WITH_REGS \ | |
| 179 | − if $(cc-option,-fpatchable-function-entry=2) | |
| 180 | 178 | select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \ |
| 181 | 179 | if DYNAMIC_FTRACE_WITH_REGS |
| 182 | 180 | select HAVE_EFFICIENT_UNALIGNED_ACCESS |
| @@ -228,6 +226,17 @@ config ARM64 · 45 unmodified lines | ||
| 228 | 226 | help |
| 229 | 227 | ARM 64-bit (AArch64) Linux support. |
| 230 | 228 | |
| 229 | +config CLANG_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS | |
| 230 | + def_bool CC_IS_CLANG | |
| 231 | + # https://github.com/ClangBuiltLinux/linux/issues/1507 | |
| 232 | + depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600)) | |
| 233 | + select HAVE_DYNAMIC_FTRACE_WITH_REGS | |
| 234 | + | |
| 235 | +config GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS | |
| 236 | + def_bool CC_IS_GCC | |
| 237 | + depends on $(cc-option,-fpatchable-function-entry=2) | |
| 238 | + select HAVE_DYNAMIC_FTRACE_WITH_REGS | |
| 239 | + | |
| 231 | 240 | config 64BIT |
| 232 | 241 | def_bool y |
| 233 | 242 | |
| @@ -678,7 +687,7 @@ config ARM64_ERRATUM_2051678 · 444 unmodified lines | ||
| 678 | 687 | default y |
| 679 | 688 | help |
| 680 | 689 | This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678. |
| 681 | − Affected Coretex-A510 might not respect the ordering rules for | |
| 690 | + Affected Cortex-A510 might not respect the ordering rules for | |
| 682 | 691 | hardware update of the page table's dirty bit. The workaround |
| 683 | 692 | is to not enable the feature on affected CPUs. |
| 684 | 693 | |
| @@ -11,26 +11,6 @@ · 10 unmodified lines | ||
| 11 | 11 | compatible = "operating-points-v2"; |
| 12 | 12 | opp-shared; |
| 13 | 13 | |
| 14 | − opp-100000000 { | |
| 15 | − opp-hz = /bits/ 64 <100000000>; | |
| 16 | − opp-microvolt = <731000>; | |
| 17 | − }; | |
| 18 | − | |
| 19 | − opp-250000000 { | |
| 20 | − opp-hz = /bits/ 64 <250000000>; | |
| 21 | − opp-microvolt = <731000>; | |
| 22 | − }; | |
| 23 | − | |
| 24 | − opp-500000000 { | |
| 25 | − opp-hz = /bits/ 64 <500000000>; | |
| 26 | − opp-microvolt = <731000>; | |
| 27 | − }; | |
| 28 | − | |
| 29 | − opp-667000000 { | |
| 30 | − opp-hz = /bits/ 64 <667000000>; | |
| 31 | − opp-microvolt = <731000>; | |
| 32 | − }; | |
| 33 | − | |
| 34 | 14 | opp-1000000000 { |
| 35 | 15 | opp-hz = /bits/ 64 <1000000000>; |
| 36 | 16 | opp-microvolt = <761000>; |
| @@ -71,26 +51,6 @@ · 34 unmodified lines | ||
| 71 | 51 | compatible = "operating-points-v2"; |
| 72 | 52 | opp-shared; |
| 73 | 53 | |
| 74 | − opp-100000000 { | |
| 75 | − opp-hz = /bits/ 64 <100000000>; | |
| 76 | − opp-microvolt = <731000>; | |
| 77 | − }; | |
| 78 | − | |
| 79 | − opp-250000000 { | |
| 80 | − opp-hz = /bits/ 64 <250000000>; | |
| 81 | − opp-microvolt = <731000>; | |
| 82 | − }; | |
| 83 | − | |
| 84 | − opp-500000000 { | |
| 85 | − opp-hz = /bits/ 64 <500000000>; | |
| 86 | − opp-microvolt = <731000>; | |
| 87 | − }; | |
| 88 | − | |
| 89 | − opp-667000000 { | |
| 90 | − opp-hz = /bits/ 64 <667000000>; | |
| 91 | − opp-microvolt = <731000>; | |
| 92 | − }; | |
| 93 | − | |
| 94 | 54 | opp-1000000000 { |
| 95 | 55 | opp-hz = /bits/ 64 <1000000000>; |
| 96 | 56 | opp-microvolt = <731000>; |
| @@ -11,26 +11,6 @@ · 10 unmodified lines | ||
| 11 | 11 | compatible = "operating-points-v2"; |
| 12 | 12 | opp-shared; |
| 13 | 13 | |
| 14 | − opp-100000000 { | |
| 15 | − opp-hz = /bits/ 64 <100000000>; | |
| 16 | − opp-microvolt = <731000>; | |
| 17 | − }; | |
| 18 | − | |
| 19 | − opp-250000000 { | |
| 20 | − opp-hz = /bits/ 64 <250000000>; | |
| 21 | − opp-microvolt = <731000>; | |
| 22 | − }; | |
| 23 | − | |
| 24 | − opp-500000000 { | |
| 25 | − opp-hz = /bits/ 64 <500000000>; | |
| 26 | − opp-microvolt = <731000>; | |
| 27 | − }; | |
| 28 | − | |
| 29 | − opp-667000000 { | |
| 30 | − opp-hz = /bits/ 64 <667000000>; | |
| 31 | − opp-microvolt = <731000>; | |
| 32 | − }; | |
| 33 | − | |
| 34 | 14 | opp-1000000000 { |
| 35 | 15 | opp-hz = /bits/ 64 <1000000000>; |
| 36 | 16 | opp-microvolt = <731000>; |
| @@ -76,26 +56,6 @@ · 39 unmodified lines | ||
| 76 | 56 | compatible = "operating-points-v2"; |
| 77 | 57 | opp-shared; |
| 78 | 58 | |
| 79 | − opp-100000000 { | |
| 80 | − opp-hz = /bits/ 64 <100000000>; | |
| 81 | − opp-microvolt = <751000>; | |
| 82 | − }; | |
| 83 | − | |
| 84 | − opp-250000000 { | |
| 85 | − opp-hz = /bits/ 64 <250000000>; | |
| 86 | − opp-microvolt = <751000>; | |
| 87 | − }; | |
| 88 | − | |
| 89 | − opp-500000000 { | |
| 90 | − opp-hz = /bits/ 64 <500000000>; | |
| 91 | − opp-microvolt = <751000>; | |
| 92 | − }; | |
| 93 | − | |
| 94 | − opp-667000000 { | |
| 95 | − opp-hz = /bits/ 64 <667000000>; | |
| 96 | − opp-microvolt = <751000>; | |
| 97 | − }; | |
| 98 | − | |
| 99 | 59 | opp-1000000000 { |
| 100 | 60 | opp-hz = /bits/ 64 <1000000000>; |
| 101 | 61 | opp-microvolt = <771000>; |
| @@ -13,28 +13,28 @@ · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | cpu0: cpu@0 { |
| 15 | 15 | device_type = "cpu"; |
| 16 | − compatible = "arm,cortex-a35","arm,armv8"; | |
| 16 | + compatible = "arm,cortex-a35"; | |
| 17 | 17 | reg = <0x0 0x0>; |
| 18 | 18 | enable-method = "psci"; |
| 19 | 19 | }; |
| 20 | 20 | |
| 21 | 21 | cpu1: cpu@1 { |
| 22 | 22 | device_type = "cpu"; |
| 23 | − compatible = "arm,cortex-a35","arm,armv8"; | |
| 23 | + compatible = "arm,cortex-a35"; | |
| 24 | 24 | reg = <0x0 0x1>; |
| 25 | 25 | enable-method = "psci"; |
| 26 | 26 | }; |
| 27 | 27 | |
| 28 | 28 | cpu2: cpu@2 { |
| 29 | 29 | device_type = "cpu"; |
| 30 | − compatible = "arm,cortex-a35","arm,armv8"; | |
| 30 | + compatible = "arm,cortex-a35"; | |
| 31 | 31 | reg = <0x0 0x2>; |
| 32 | 32 | enable-method = "psci"; |
| 33 | 33 | }; |
| 34 | 34 | |
| 35 | 35 | cpu3: cpu@3 { |
| 36 | 36 | device_type = "cpu"; |
| 37 | − compatible = "arm,cortex-a35","arm,armv8"; | |
| 37 | + compatible = "arm,cortex-a35"; | |
| 38 | 38 | reg = <0x0 0x3>; |
| 39 | 39 | enable-method = "psci"; |
| 40 | 40 | }; |
| @@ -437,6 +437,7 @@ · 436 unmodified lines | ||
| 437 | 437 | "", |
| 438 | 438 | "eMMC_RST#", /* BOOT_12 */ |
| 439 | 439 | "eMMC_DS", /* BOOT_13 */ |
| 440 | + "", "", | |
| 440 | 441 | /* GPIOC */ |
| 441 | 442 | "SD_D0_B", /* GPIOC_0 */ |
| 442 | 443 | "SD_D1_B", /* GPIOC_1 */ |
| @@ -95,26 +95,6 @@ · 94 unmodified lines | ||
| 95 | 95 | compatible = "operating-points-v2"; |
| 96 | 96 | opp-shared; |
| 97 | 97 | |
| 98 | − opp-100000000 { | |
| 99 | − opp-hz = /bits/ 64 <100000000>; | |
| 100 | − opp-microvolt = <730000>; | |
| 101 | − }; | |
| 102 | − | |
| 103 | − opp-250000000 { | |
| 104 | − opp-hz = /bits/ 64 <250000000>; | |
| 105 | − opp-microvolt = <730000>; | |
| 106 | − }; | |
| 107 | − | |
| 108 | − opp-500000000 { | |
| 109 | − opp-hz = /bits/ 64 <500000000>; | |
| 110 | − opp-microvolt = <730000>; | |
| 111 | − }; | |
| 112 | − | |
| 113 | − opp-667000000 { | |
| 114 | − opp-hz = /bits/ 64 <666666666>; | |
| 115 | − opp-microvolt = <750000>; | |
| 116 | − }; | |
| 117 | − | |
| 118 | 98 | opp-1000000000 { |
| 119 | 99 | opp-hz = /bits/ 64 <1000000000>; |
| 120 | 100 | opp-microvolt = <770000>; |
| @@ -89,12 +89,12 @@ · 88 unmodified lines | ||
| 89 | 89 | pendown-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; |
| 90 | 90 | |
| 91 | 91 | ti,x-min = /bits/ 16 <125>; |
| 92 | − touchscreen-size-x = /bits/ 16 <4008>; | |
| 92 | + touchscreen-size-x = <4008>; | |
| 93 | 93 | ti,y-min = /bits/ 16 <282>; |
| 94 | − touchscreen-size-y = /bits/ 16 <3864>; | |
| 94 | + touchscreen-size-y = <3864>; | |
| 95 | 95 | ti,x-plate-ohms = /bits/ 16 <180>; |
| 96 | − touchscreen-max-pressure = /bits/ 16 <255>; | |
| 97 | − touchscreen-average-samples = /bits/ 16 <10>; | |
| 96 | + touchscreen-max-pressure = <255>; | |
| 97 | + touchscreen-average-samples = <10>; | |
| 98 | 98 | ti,debounce-tol = /bits/ 16 <3>; |
| 99 | 99 | ti,debounce-rep = /bits/ 16 <1>; |
| 100 | 100 | ti,settle-delay-usec = /bits/ 16 <150>; |
| @@ -146,12 +146,14 @@ · 145 unmodified lines | ||
| 146 | 146 | |
| 147 | 147 | &usbotg1 { |
| 148 | 148 | dr_mode = "otg"; |
| 149 | + over-current-active-low; | |
| 149 | 150 | vbus-supply = <®_usb_otg1_vbus>; |
| 150 | 151 | status = "okay"; |
| 151 | 152 | }; |
| 152 | 153 | |
| 153 | 154 | &usbotg2 { |
| 154 | 155 | dr_mode = "host"; |
| 156 | + disable-over-current; | |
| 155 | 157 | status = "okay"; |
| 156 | 158 | }; |
| 157 | 159 | |
| @@ -215,7 +217,7 @@ · 57 unmodified lines | ||
| 215 | 217 | fsl,pins = < |
| 216 | 218 | MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 |
| 217 | 219 | MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 |
| 218 | − MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 | |
| 220 | + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 | |
| 219 | 221 | MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 |
| 220 | 222 | >; |
| 221 | 223 | }; |
| @@ -211,12 +211,14 @@ · 210 unmodified lines | ||
| 211 | 211 | |
| 212 | 212 | &usbotg1 { |
| 213 | 213 | dr_mode = "otg"; |
| 214 | + over-current-active-low; | |
| 214 | 215 | vbus-supply = <®_usb_otg1_vbus>; |
| 215 | 216 | status = "okay"; |
| 216 | 217 | }; |
| 217 | 218 | |
| 218 | 219 | &usbotg2 { |
| 219 | 220 | dr_mode = "host"; |
| 221 | + disable-over-current; | |
| 220 | 222 | vbus-supply = <®_usb_otg2_vbus>; |
| 221 | 223 | status = "okay"; |
| 222 | 224 | }; |
| @@ -309,7 +311,7 @@ · 86 unmodified lines | ||
| 309 | 311 | fsl,pins = < |
| 310 | 312 | MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 |
| 311 | 313 | MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 |
| 312 | − MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 | |
| 314 | + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 | |
| 313 | 315 | MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 |
| 314 | 316 | >; |
| 315 | 317 | }; |
| @@ -238,12 +238,14 @@ · 237 unmodified lines | ||
| 238 | 238 | |
| 239 | 239 | &usbotg1 { |
| 240 | 240 | dr_mode = "otg"; |
| 241 | + over-current-active-low; | |
| 241 | 242 | vbus-supply = <®_usb_otg1_vbus>; |
| 242 | 243 | status = "okay"; |
| 243 | 244 | }; |
| 244 | 245 | |
| 245 | 246 | &usbotg2 { |
| 246 | 247 | dr_mode = "host"; |
| 248 | + disable-over-current; | |
| 247 | 249 | vbus-supply = <®_usb_otg2_vbus>; |
| 248 | 250 | status = "okay"; |
| 249 | 251 | }; |
| @@ -358,7 +360,7 @@ · 108 unmodified lines | ||
| 358 | 360 | fsl,pins = < |
| 359 | 361 | MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 |
| 360 | 362 | MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 |
| 361 | − MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 | |
| 363 | + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 | |
| 362 | 364 | MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 |
| 363 | 365 | >; |
| 364 | 366 | }; |
| @@ -59,6 +59,10 @@ · 58 unmodified lines | ||
| 59 | 59 | interrupts = <3 IRQ_TYPE_LEVEL_LOW>; |
| 60 | 60 | rohm,reset-snvs-powered; |
| 61 | 61 | |
| 62 | + #clock-cells = <0>; | |
| 63 | + clocks = <&osc_32k 0>; | |
| 64 | + clock-output-names = "clk-32k-out"; | |
| 65 | + | |
| 62 | 66 | regulators { |
| 63 | 67 | buck1_reg: BUCK1 { |
| 64 | 68 | regulator-name = "buck1"; |
| @@ -70,12 +70,12 @@ · 69 unmodified lines | ||
| 70 | 70 | pendown-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; |
| 71 | 71 | |
| 72 | 72 | ti,x-min = /bits/ 16 <125>; |
| 73 | − touchscreen-size-x = /bits/ 16 <4008>; | |
| 73 | + touchscreen-size-x = <4008>; | |
| 74 | 74 | ti,y-min = /bits/ 16 <282>; |
| 75 | − touchscreen-size-y = /bits/ 16 <3864>; | |
| 75 | + touchscreen-size-y = <3864>; | |
| 76 | 76 | ti,x-plate-ohms = /bits/ 16 <180>; |
| 77 | − touchscreen-max-pressure = /bits/ 16 <255>; | |
| 78 | − touchscreen-average-samples = /bits/ 16 <10>; | |
| 77 | + touchscreen-max-pressure = <255>; | |
| 78 | + touchscreen-average-samples = <10>; | |
| 79 | 79 | ti,debounce-tol = /bits/ 16 <3>; |
| 80 | 80 | ti,debounce-rep = /bits/ 16 <1>; |
| 81 | 81 | ti,settle-delay-usec = /bits/ 16 <150>; |
| @@ -293,7 +293,7 @@ · 292 unmodified lines | ||
| 293 | 293 | ranges; |
| 294 | 294 | |
| 295 | 295 | sai2: sai@30020000 { |
| 296 | − compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; | |
| 296 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; | |
| 297 | 297 | reg = <0x30020000 0x10000>; |
| 298 | 298 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; |
| 299 | 299 | clocks = <&clk IMX8MN_CLK_SAI2_IPG>, |
| @@ -307,7 +307,7 @@ · 7 unmodified lines | ||
| 307 | 307 | }; |
| 308 | 308 | |
| 309 | 309 | sai3: sai@30030000 { |
| 310 | − compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; | |
| 310 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; | |
| 311 | 311 | reg = <0x30030000 0x10000>; |
| 312 | 312 | interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; |
| 313 | 313 | clocks = <&clk IMX8MN_CLK_SAI3_IPG>, |
| @@ -321,7 +321,7 @@ · 7 unmodified lines | ||
| 321 | 321 | }; |
| 322 | 322 | |
| 323 | 323 | sai5: sai@30050000 { |
| 324 | − compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; | |
| 324 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; | |
| 325 | 325 | reg = <0x30050000 0x10000>; |
| 326 | 326 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; |
| 327 | 327 | clocks = <&clk IMX8MN_CLK_SAI5_IPG>, |
| @@ -337,7 +337,7 @@ · 9 unmodified lines | ||
| 337 | 337 | }; |
| 338 | 338 | |
| 339 | 339 | sai6: sai@30060000 { |
| 340 | − compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; | |
| 340 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; | |
| 341 | 341 | reg = <0x30060000 0x10000>; |
| 342 | 342 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; |
| 343 | 343 | clocks = <&clk IMX8MN_CLK_SAI6_IPG>, |
| @@ -394,7 +394,7 @@ · 50 unmodified lines | ||
| 394 | 394 | }; |
| 395 | 395 | |
| 396 | 396 | sai7: sai@300b0000 { |
| 397 | − compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; | |
| 397 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; | |
| 398 | 398 | reg = <0x300b0000 0x10000>; |
| 399 | 399 | interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; |
| 400 | 400 | clocks = <&clk IMX8MN_CLK_SAI7_IPG>, |
| @@ -253,7 +253,7 @@ · 252 unmodified lines | ||
| 253 | 253 | #address-cells = <1>; |
| 254 | 254 | #size-cells = <1>; |
| 255 | 255 | spi-max-frequency = <84000000>; |
| 256 | − spi-tx-bus-width = <4>; | |
| 256 | + spi-tx-bus-width = <1>; | |
| 257 | 257 | spi-rx-bus-width = <4>; |
| 258 | 258 | }; |
| 259 | 259 | }; |
| @@ -196,7 +196,7 @@ · 195 unmodified lines | ||
| 196 | 196 | }; |
| 197 | 197 | |
| 198 | 198 | clk: clock-controller { |
| 199 | − compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; | |
| 199 | + compatible = "fsl,imx8qm-clk", "fsl,scu-clk"; | |
| 200 | 200 | #clock-cells = <2>; |
| 201 | 201 | }; |
| 202 | 202 | |
| @@ -1249,14 +1249,14 @@ · 1248 unmodified lines | ||
| 1249 | 1249 | pins = "gpio47", "gpio48"; |
| 1250 | 1250 | function = "blsp_i2c3"; |
| 1251 | 1251 | drive-strength = <16>; |
| 1252 | − bias-disable = <0>; | |
| 1252 | + bias-disable; | |
| 1253 | 1253 | }; |
| 1254 | 1254 | |
| 1255 | 1255 | blsp1_i2c3_sleep: blsp1-i2c2-sleep { |
| 1256 | 1256 | pins = "gpio47", "gpio48"; |
| 1257 | 1257 | function = "gpio"; |
| 1258 | 1258 | drive-strength = <2>; |
| 1259 | − bias-disable = <0>; | |
| 1259 | + bias-disable; | |
| 1260 | 1260 | }; |
| 1261 | 1261 | |
| 1262 | 1262 | blsp2_uart3_4pins_default: blsp2-uart2-4pins { |
| @@ -33,7 +33,7 @@ ap_h1_spi: &spi0 {}; · 32 unmodified lines | ||
| 33 | 33 | }; |
| 34 | 34 | |
| 35 | 35 | &alc5682 { |
| 36 | − realtek,dmic-clk-driving-high = "true"; | |
| 36 | + realtek,dmic-clk-driving-high; | |
| 37 | 37 | }; |
| 38 | 38 | |
| 39 | 39 | &cpu6_alert0 { |
| @@ -630,7 +630,7 @@ · 629 unmodified lines | ||
| 630 | 630 | pins = "gpio6", "gpio25", "gpio26"; |
| 631 | 631 | function = "gpio"; |
| 632 | 632 | drive-strength = <8>; |
| 633 | − bias-disable = <0>; | |
| 633 | + bias-disable; | |
| 634 | 634 | }; |
| 635 | 635 | }; |
| 636 | 636 | |
| @@ -563,7 +563,7 @@ · 562 unmodified lines | ||
| 563 | 563 | config { |
| 564 | 564 | pins = "gpio6", "gpio11"; |
| 565 | 565 | drive-strength = <8>; |
| 566 | − bias-disable = <0>; | |
| 566 | + bias-disable; | |
| 567 | 567 | }; |
| 568 | 568 | }; |
| 569 | 569 | |
| @@ -40,13 +40,26 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu); · 39 unmodified lines | ||
| 40 | 40 | void kvm_inject_vabt(struct kvm_vcpu *vcpu); |
| 41 | 41 | void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr); |
| 42 | 42 | void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr); |
| 43 | +void kvm_inject_size_fault(struct kvm_vcpu *vcpu); | |
| 43 | 44 | |
| 44 | 45 | void kvm_vcpu_wfi(struct kvm_vcpu *vcpu); |
| 45 | 46 | |
| 47 | +#if defined(__KVM_VHE_HYPERVISOR__) || defined(__KVM_NVHE_HYPERVISOR__) | |
| 46 | 48 | static __always_inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu) |
| 47 | 49 | { |
| 48 | 50 | return !(vcpu->arch.hcr_el2 & HCR_RW); |
| 49 | 51 | } |
| 52 | +#else | |
| 53 | +static __always_inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu) | |
| 54 | +{ | |
| 55 | + struct kvm *kvm = vcpu->kvm; | |
| 56 | + | |
| 57 | + WARN_ON_ONCE(!test_bit(KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED, | |
| 58 | + &kvm->arch.flags)); | |
| 59 | + | |
| 60 | + return test_bit(KVM_ARCH_FLAG_EL1_32BIT, &kvm->arch.flags); | |
| 61 | +} | |
| 62 | +#endif | |
| 50 | 63 | |
| 51 | 64 | static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) |
| 52 | 65 | { |
| @@ -72,15 +85,14 @@ static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) · 19 unmodified lines | ||
| 72 | 85 | vcpu->arch.hcr_el2 |= HCR_TVM; |
| 73 | 86 | } |
| 74 | 87 | |
| 75 | − if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) | |
| 88 | + if (vcpu_el1_is_32bit(vcpu)) | |
| 76 | 89 | vcpu->arch.hcr_el2 &= ~HCR_RW; |
| 77 | − | |
| 78 | − /* | |
| 79 | − * TID3: trap feature register accesses that we virtualise. | |
| 80 | − * For now this is conditional, since no AArch32 feature regs | |
| 81 | − * are currently virtualised. | |
| 82 | − */ | |
| 83 | − if (!vcpu_el1_is_32bit(vcpu)) | |
| 90 | + else | |
| 91 | + /* | |
| 92 | + * TID3: trap feature register accesses that we virtualise. | |
| 93 | + * For now this is conditional, since no AArch32 feature regs | |
| 94 | + * are currently virtualised. | |
| 95 | + */ | |
| 84 | 96 | vcpu->arch.hcr_el2 |= HCR_TID3; |
| 85 | 97 | |
| 86 | 98 | if (cpus_have_const_cap(ARM64_MISMATCHED_CACHE_TYPE) || |
| @@ -127,6 +127,16 @@ struct kvm_arch { · 126 unmodified lines | ||
| 127 | 127 | #define KVM_ARCH_FLAG_MTE_ENABLED 1 |
| 128 | 128 | /* At least one vCPU has ran in the VM */ |
| 129 | 129 | #define KVM_ARCH_FLAG_HAS_RAN_ONCE 2 |
| 130 | + /* | |
| 131 | + * The following two bits are used to indicate the guest's EL1 | |
| 132 | + * register width configuration. A value of KVM_ARCH_FLAG_EL1_32BIT | |
| 133 | + * bit is valid only when KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED is set. | |
| 134 | + * Otherwise, the guest's EL1 register width has not yet been | |
| 135 | + * determined yet. | |
| 136 | + */ | |
| 137 | +#define KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED 3 | |
| 138 | +#define KVM_ARCH_FLAG_EL1_32BIT 4 | |
| 139 | + | |
| 130 | 140 | unsigned long flags; |
| 131 | 141 | |
| 132 | 142 | /* |
| @@ -535,7 +535,7 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, · 534 unmodified lines | ||
| 535 | 535 | PMD_TYPE_TABLE) |
| 536 | 536 | #define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \ |
| 537 | 537 | PMD_TYPE_SECT) |
| 538 | −#define pmd_leaf(pmd) pmd_sect(pmd) | |
| 538 | +#define pmd_leaf(pmd) (pmd_present(pmd) && !pmd_table(pmd)) | |
| 539 | 539 | #define pmd_bad(pmd) (!pmd_table(pmd)) |
| 540 | 540 | |
| 541 | 541 | #define pmd_leaf_size(pmd) (pmd_cont(pmd) ? CONT_PMD_SIZE : PMD_SIZE) |
| @@ -625,7 +625,7 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd) · 83 unmodified lines | ||
| 625 | 625 | #define pud_none(pud) (!pud_val(pud)) |
| 626 | 626 | #define pud_bad(pud) (!pud_table(pud)) |
| 627 | 627 | #define pud_present(pud) pte_present(pud_pte(pud)) |
| 628 | −#define pud_leaf(pud) pud_sect(pud) | |
| 628 | +#define pud_leaf(pud) (pud_present(pud) && !pud_table(pud)) | |
| 629 | 629 | #define pud_valid(pud) pte_valid(pud_pte(pud)) |
| 630 | 630 | |
| 631 | 631 | static inline void set_pud(pud_t *pudp, pud_t pud) |
| @@ -95,7 +95,7 @@ int elf_core_write_extra_phdrs(struct coredump_params *cprm, loff_t offset) · 94 unmodified lines | ||
| 95 | 95 | for_each_mte_vma(current, vma) { |
| 96 | 96 | struct elf_phdr phdr; |
| 97 | 97 | |
| 98 | − phdr.p_type = PT_ARM_MEMTAG_MTE; | |
| 98 | + phdr.p_type = PT_AARCH64_MEMTAG_MTE; | |
| 99 | 99 | phdr.p_offset = offset; |
| 100 | 100 | phdr.p_vaddr = vma->vm_start; |
| 101 | 101 | phdr.p_paddr = 0; |
| @@ -198,15 +198,15 @@ SYM_CODE_START(__kvm_hyp_host_vector) · 197 unmodified lines | ||
| 198 | 198 | invalid_host_el2_vect // FIQ EL2h |
| 199 | 199 | invalid_host_el2_vect // Error EL2h |
| 200 | 200 | |
| 201 | − host_el1_sync_vect // Synchronous 64-bit EL1 | |
| 202 | − invalid_host_el1_vect // IRQ 64-bit EL1 | |
| 203 | − invalid_host_el1_vect // FIQ 64-bit EL1 | |
| 204 | − invalid_host_el1_vect // Error 64-bit EL1 | |
| 205 | − | |
| 206 | − invalid_host_el1_vect // Synchronous 32-bit EL1 | |
| 207 | − invalid_host_el1_vect // IRQ 32-bit EL1 | |
| 208 | − invalid_host_el1_vect // FIQ 32-bit EL1 | |
| 209 | − invalid_host_el1_vect // Error 32-bit EL1 | |
| 201 | + host_el1_sync_vect // Synchronous 64-bit EL1/EL0 | |
| 202 | + invalid_host_el1_vect // IRQ 64-bit EL1/EL0 | |
| 203 | + invalid_host_el1_vect // FIQ 64-bit EL1/EL0 | |
| 204 | + invalid_host_el1_vect // Error 64-bit EL1/EL0 | |
| 205 | + | |
| 206 | + host_el1_sync_vect // Synchronous 32-bit EL1/EL0 | |
| 207 | + invalid_host_el1_vect // IRQ 32-bit EL1/EL0 | |
| 208 | + invalid_host_el1_vect // FIQ 32-bit EL1/EL0 | |
| 209 | + invalid_host_el1_vect // Error 32-bit EL1/EL0 | |
| 210 | 210 | SYM_CODE_END(__kvm_hyp_host_vector) |
| 211 | 211 | |
| 212 | 212 | /* |
| @@ -145,6 +145,34 @@ void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr) · 144 unmodified lines | ||
| 145 | 145 | inject_abt64(vcpu, true, addr); |
| 146 | 146 | } |
| 147 | 147 | |
| 148 | +void kvm_inject_size_fault(struct kvm_vcpu *vcpu) | |
| 149 | +{ | |
| 150 | + unsigned long addr, esr; | |
| 151 | + | |
| 152 | + addr = kvm_vcpu_get_fault_ipa(vcpu); | |
| 153 | + addr |= kvm_vcpu_get_hfar(vcpu) & GENMASK(11, 0); | |
| 154 | + | |
| 155 | + if (kvm_vcpu_trap_is_iabt(vcpu)) | |
| 156 | + kvm_inject_pabt(vcpu, addr); | |
| 157 | + else | |
| 158 | + kvm_inject_dabt(vcpu, addr); | |
| 159 | + | |
| 160 | + /* | |
| 161 | + * If AArch64 or LPAE, set FSC to 0 to indicate an Address | |
| 162 | + * Size Fault at level 0, as if exceeding PARange. | |
| 163 | + * | |
| 164 | + * Non-LPAE guests will only get the external abort, as there | |
| 165 | + * is no way to to describe the ASF. | |
| 166 | + */ | |
| 167 | + if (vcpu_el1_is_32bit(vcpu) && | |
| 168 | + !(vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE)) | |
| 169 | + return; | |
| 170 | + | |
| 171 | + esr = vcpu_read_sys_reg(vcpu, ESR_EL1); | |
| 172 | + esr &= ~GENMASK_ULL(5, 0); | |
| 173 | + vcpu_write_sys_reg(vcpu, esr, ESR_EL1); | |
| 174 | +} | |
| 175 | + | |
| 148 | 176 | /** |
| 149 | 177 | * kvm_inject_undefined - inject an undefined instruction into the guest |
| 150 | 178 | * @vcpu: The vCPU in which to inject the exception |
| @@ -1079,7 +1079,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 1078 unmodified lines | ||
| 1079 | 1079 | gfn_t gfn; |
| 1080 | 1080 | kvm_pfn_t pfn; |
| 1081 | 1081 | bool logging_active = memslot_is_logging(memslot); |
| 1082 | − bool logging_perm_fault = false; | |
| 1082 | + bool use_read_lock = false; | |
| 1083 | 1083 | unsigned long fault_level = kvm_vcpu_trap_get_fault_level(vcpu); |
| 1084 | 1084 | unsigned long vma_pagesize, fault_granule; |
| 1085 | 1085 | enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_R; |
| @@ -1114,7 +1114,8 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 28 unmodified lines | ||
| 1114 | 1114 | if (logging_active) { |
| 1115 | 1115 | force_pte = true; |
| 1116 | 1116 | vma_shift = PAGE_SHIFT; |
| 1117 | − logging_perm_fault = (fault_status == FSC_PERM && write_fault); | |
| 1117 | + use_read_lock = (fault_status == FSC_PERM && write_fault && | |
| 1118 | + fault_granule == PAGE_SIZE); | |
| 1118 | 1119 | } else { |
| 1119 | 1120 | vma_shift = get_vma_page_shift(vma, hva); |
| 1120 | 1121 | } |
| @@ -1218,7 +1219,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 97 unmodified lines | ||
| 1218 | 1219 | * logging dirty logging, only acquire read lock for permission |
| 1219 | 1220 | * relaxation. |
| 1220 | 1221 | */ |
| 1221 | − if (logging_perm_fault) | |
| 1222 | + if (use_read_lock) | |
| 1222 | 1223 | read_lock(&kvm->mmu_lock); |
| 1223 | 1224 | else |
| 1224 | 1225 | write_lock(&kvm->mmu_lock); |
| @@ -1268,6 +1269,8 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 43 unmodified lines | ||
| 1268 | 1269 | if (fault_status == FSC_PERM && vma_pagesize == fault_granule) { |
| 1269 | 1270 | ret = kvm_pgtable_stage2_relax_perms(pgt, fault_ipa, prot); |
| 1270 | 1271 | } else { |
| 1272 | + WARN_ONCE(use_read_lock, "Attempted stage-2 map outside of write lock\n"); | |
| 1273 | + | |
| 1271 | 1274 | ret = kvm_pgtable_stage2_map(pgt, fault_ipa, vma_pagesize, |
| 1272 | 1275 | __pfn_to_phys(pfn), prot, |
| 1273 | 1276 | memcache); |
| @@ -1280,7 +1283,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 6 unmodified lines | ||
| 1280 | 1283 | } |
| 1281 | 1284 | |
| 1282 | 1285 | out_unlock: |
| 1283 | − if (logging_perm_fault) | |
| 1286 | + if (use_read_lock) | |
| 1284 | 1287 | read_unlock(&kvm->mmu_lock); |
| 1285 | 1288 | else |
| 1286 | 1289 | write_unlock(&kvm->mmu_lock); |
| @@ -1334,6 +1337,25 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu) · 47 unmodified lines | ||
| 1334 | 1337 | fault_ipa = kvm_vcpu_get_fault_ipa(vcpu); |
| 1335 | 1338 | is_iabt = kvm_vcpu_trap_is_iabt(vcpu); |
| 1336 | 1339 | |
| 1340 | + if (fault_status == FSC_FAULT) { | |
| 1341 | + /* Beyond sanitised PARange (which is the IPA limit) */ | |
| 1342 | + if (fault_ipa >= BIT_ULL(get_kvm_ipa_limit())) { | |
| 1343 | + kvm_inject_size_fault(vcpu); | |
| 1344 | + return 1; | |
| 1345 | + } | |
| 1346 | + | |
| 1347 | + /* Falls between the IPA range and the PARange? */ | |
| 1348 | + if (fault_ipa >= BIT_ULL(vcpu->arch.hw_mmu->pgt->ia_bits)) { | |
| 1349 | + fault_ipa |= kvm_vcpu_get_hfar(vcpu) & GENMASK(11, 0); | |
| 1350 | + | |
| 1351 | + if (is_iabt) | |
| 1352 | + kvm_inject_pabt(vcpu, fault_ipa); | |
| 1353 | + else | |
| 1354 | + kvm_inject_dabt(vcpu, fault_ipa); | |
| 1355 | + return 1; | |
| 1356 | + } | |
| 1357 | + } | |
| 1358 | + | |
| 1337 | 1359 | /* Synchronous External Abort? */ |
| 1338 | 1360 | if (kvm_vcpu_abt_issea(vcpu)) { |
| 1339 | 1361 | /* |
| @@ -177,6 +177,9 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx) · 176 unmodified lines | ||
| 177 | 177 | struct kvm_pmu *pmu = &vcpu->arch.pmu; |
| 178 | 178 | struct kvm_pmc *pmc = &pmu->pmc[select_idx]; |
| 179 | 179 | |
| 180 | + if (!kvm_vcpu_has_pmu(vcpu)) | |
| 181 | + return 0; | |
| 182 | + | |
| 180 | 183 | counter = kvm_pmu_get_pair_counter_value(vcpu, pmc); |
| 181 | 184 | |
| 182 | 185 | if (kvm_pmu_pmc_is_chained(pmc) && |
| @@ -198,6 +201,9 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val) · 15 unmodified lines | ||
| 198 | 201 | { |
| 199 | 202 | u64 reg; |
| 200 | 203 | |
| 204 | + if (!kvm_vcpu_has_pmu(vcpu)) | |
| 205 | + return; | |
| 206 | + | |
| 201 | 207 | reg = (select_idx == ARMV8_PMU_CYCLE_IDX) |
| 202 | 208 | ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + select_idx; |
| 203 | 209 | __vcpu_sys_reg(vcpu, reg) += (s64)val - kvm_pmu_get_counter_value(vcpu, select_idx); |
| @@ -322,6 +328,9 @@ void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val) · 118 unmodified lines | ||
| 322 | 328 | struct kvm_pmu *pmu = &vcpu->arch.pmu; |
| 323 | 329 | struct kvm_pmc *pmc; |
| 324 | 330 | |
| 331 | + if (!kvm_vcpu_has_pmu(vcpu)) | |
| 332 | + return; | |
| 333 | + | |
| 325 | 334 | if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E) || !val) |
| 326 | 335 | return; |
| 327 | 336 | |
| @@ -357,7 +366,7 @@ void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) · 29 unmodified lines | ||
| 357 | 366 | struct kvm_pmu *pmu = &vcpu->arch.pmu; |
| 358 | 367 | struct kvm_pmc *pmc; |
| 359 | 368 | |
| 360 | − if (!val) | |
| 369 | + if (!kvm_vcpu_has_pmu(vcpu) || !val) | |
| 361 | 370 | return; |
| 362 | 371 | |
| 363 | 372 | for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++) { |
| @@ -527,6 +536,9 @@ void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) · 163 unmodified lines | ||
| 527 | 536 | struct kvm_pmu *pmu = &vcpu->arch.pmu; |
| 528 | 537 | int i; |
| 529 | 538 | |
| 539 | + if (!kvm_vcpu_has_pmu(vcpu)) | |
| 540 | + return; | |
| 541 | + | |
| 530 | 542 | if (!(__vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_E)) |
| 531 | 543 | return; |
| 532 | 544 | |
| @@ -576,6 +588,9 @@ void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) · 43 unmodified lines | ||
| 576 | 588 | { |
| 577 | 589 | int i; |
| 578 | 590 | |
| 591 | + if (!kvm_vcpu_has_pmu(vcpu)) | |
| 592 | + return; | |
| 593 | + | |
| 579 | 594 | if (val & ARMV8_PMU_PMCR_E) { |
| 580 | 595 | kvm_pmu_enable_counter_mask(vcpu, |
| 581 | 596 | __vcpu_sys_reg(vcpu, PMCNTENSET_EL0)); |
| @@ -739,6 +754,9 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, · 157 unmodified lines | ||
| 739 | 754 | { |
| 740 | 755 | u64 reg, mask; |
| 741 | 756 | |
| 757 | + if (!kvm_vcpu_has_pmu(vcpu)) | |
| 758 | + return; | |
| 759 | + | |
| 742 | 760 | mask = ARMV8_PMU_EVTYPE_MASK; |
| 743 | 761 | mask &= ~ARMV8_PMU_EVTYPE_EVENT; |
| 744 | 762 | mask |= kvm_pmu_event_mask(vcpu->kvm); |
| @@ -827,6 +845,9 @@ u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1) · 82 unmodified lines | ||
| 827 | 845 | u64 val, mask = 0; |
| 828 | 846 | int base, i, nr_events; |
| 829 | 847 | |
| 848 | + if (!kvm_vcpu_has_pmu(vcpu)) | |
| 849 | + return 0; | |
| 850 | + | |
| 830 | 851 | if (!pmceid1) { |
| 831 | 852 | val = read_sysreg(pmceid0_el0); |
| 832 | 853 | base = 0; |
| @@ -181,7 +181,8 @@ static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type, u64 flags) · 180 unmodified lines | ||
| 181 | 181 | |
| 182 | 182 | memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event)); |
| 183 | 183 | vcpu->run->system_event.type = type; |
| 184 | − vcpu->run->system_event.flags = flags; | |
| 184 | + vcpu->run->system_event.ndata = 1; | |
| 185 | + vcpu->run->system_event.data[0] = flags; | |
| 185 | 186 | vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT; |
| 186 | 187 | } |
| 187 | 188 | |
| @@ -215,15 +216,11 @@ static void kvm_psci_narrow_to_32bit(struct kvm_vcpu *vcpu) · 27 unmodified lines | ||
| 215 | 216 | |
| 216 | 217 | static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32 fn) |
| 217 | 218 | { |
| 218 | − switch(fn) { | |
| 219 | − case PSCI_0_2_FN64_CPU_SUSPEND: | |
| 220 | − case PSCI_0_2_FN64_CPU_ON: | |
| 221 | − case PSCI_0_2_FN64_AFFINITY_INFO: | |
| 222 | − /* Disallow these functions for 32bit guests */ | |
| 223 | − if (vcpu_mode_is_32bit(vcpu)) | |
| 224 | − return PSCI_RET_NOT_SUPPORTED; | |
| 225 | − break; | |
| 226 | − } | |
| 219 | + /* | |
| 220 | + * Prevent 32 bit guests from calling 64 bit PSCI functions. | |
| 221 | + */ | |
| 222 | + if ((fn & PSCI_0_2_64BIT) && vcpu_mode_is_32bit(vcpu)) | |
| 223 | + return PSCI_RET_NOT_SUPPORTED; | |
| 227 | 224 | |
| 228 | 225 | return 0; |
| 229 | 226 | } |
| @@ -235,10 +232,6 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) · 5 unmodified lines | ||
| 235 | 232 | unsigned long val; |
| 236 | 233 | int ret = 1; |
| 237 | 234 | |
| 238 | − val = kvm_psci_check_allowed_function(vcpu, psci_fn); | |
| 239 | − if (val) | |
| 240 | − goto out; | |
| 241 | − | |
| 242 | 235 | switch (psci_fn) { |
| 243 | 236 | case PSCI_0_2_FN_PSCI_VERSION: |
| 244 | 237 | /* |
| @@ -306,7 +299,6 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) · 61 unmodified lines | ||
| 306 | 299 | break; |
| 307 | 300 | } |
| 308 | 301 | |
| 309 | −out: | |
| 310 | 302 | smccc_set_retval(vcpu, val, 0, 0, 0); |
| 311 | 303 | return ret; |
| 312 | 304 | } |
| @@ -318,9 +310,6 @@ static int kvm_psci_1_x_call(struct kvm_vcpu *vcpu, u32 minor) · 5 unmodified lines | ||
| 318 | 310 | unsigned long val; |
| 319 | 311 | int ret = 1; |
| 320 | 312 | |
| 321 | − if (minor > 1) | |
| 322 | − return -EINVAL; | |
| 323 | − | |
| 324 | 313 | switch(psci_fn) { |
| 325 | 314 | case PSCI_0_2_FN_PSCI_VERSION: |
| 326 | 315 | val = minor == 0 ? KVM_ARM_PSCI_1_0 : KVM_ARM_PSCI_1_1; |
| @@ -426,6 +415,15 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) · 99 unmodified lines | ||
| 426 | 415 | */ |
| 427 | 416 | int kvm_psci_call(struct kvm_vcpu *vcpu) |
| 428 | 417 | { |
| 418 | + u32 psci_fn = smccc_get_function(vcpu); | |
| 419 | + unsigned long val; | |
| 420 | + | |
| 421 | + val = kvm_psci_check_allowed_function(vcpu, psci_fn); | |
| 422 | + if (val) { | |
| 423 | + smccc_set_retval(vcpu, val, 0, 0, 0); | |
| 424 | + return 1; | |
| 425 | + } | |
| 426 | + | |
| 429 | 427 | switch (kvm_psci_version(vcpu)) { |
| 430 | 428 | case KVM_ARM_PSCI_1_1: |
| 431 | 429 | return kvm_psci_1_x_call(vcpu, 1); |
| @@ -181,27 +181,51 @@ static int kvm_vcpu_enable_ptrauth(struct kvm_vcpu *vcpu) · 180 unmodified lines | ||
| 181 | 181 | return 0; |
| 182 | 182 | } |
| 183 | 183 | |
| 184 | −static bool vcpu_allowed_register_width(struct kvm_vcpu *vcpu) | |
| 184 | +/** | |
| 185 | + * kvm_set_vm_width() - set the register width for the guest | |
| 186 | + * @vcpu: Pointer to the vcpu being configured | |
| 187 | + * | |
| 188 | + * Set both KVM_ARCH_FLAG_EL1_32BIT and KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED | |
| 189 | + * in the VM flags based on the vcpu's requested register width, the HW | |
| 190 | + * capabilities and other options (such as MTE). | |
| 191 | + * When REG_WIDTH_CONFIGURED is already set, the vcpu settings must be | |
| 192 | + * consistent with the value of the FLAG_EL1_32BIT bit in the flags. | |
| 193 | + * | |
| 194 | + * Return: 0 on success, negative error code on failure. | |
| 195 | + */ | |
| 196 | +static int kvm_set_vm_width(struct kvm_vcpu *vcpu) | |
| 185 | 197 | { |
| 186 | − struct kvm_vcpu *tmp; | |
| 198 | + struct kvm *kvm = vcpu->kvm; | |
| 187 | 199 | bool is32bit; |
| 188 | − unsigned long i; | |
| 189 | 200 | |
| 190 | 201 | is32bit = vcpu_has_feature(vcpu, KVM_ARM_VCPU_EL1_32BIT); |
| 202 | + | |
| 203 | + lockdep_assert_held(&kvm->lock); | |
| 204 | + | |
| 205 | + if (test_bit(KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED, &kvm->arch.flags)) { | |
| 206 | + /* | |
| 207 | + * The guest's register width is already configured. | |
| 208 | + * Make sure that the vcpu is consistent with it. | |
| 209 | + */ | |
| 210 | + if (is32bit == test_bit(KVM_ARCH_FLAG_EL1_32BIT, &kvm->arch.flags)) | |
| 211 | + return 0; | |
| 212 | + | |
| 213 | + return -EINVAL; | |
| 214 | + } | |
| 215 | + | |
| 191 | 216 | if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) && is32bit) |
| 192 | − return false; | |
| 217 | + return -EINVAL; | |
| 193 | 218 | |
| 194 | 219 | /* MTE is incompatible with AArch32 */ |
| 195 | − if (kvm_has_mte(vcpu->kvm) && is32bit) | |
| 196 | − return false; | |
| 220 | + if (kvm_has_mte(kvm) && is32bit) | |
| 221 | + return -EINVAL; | |
| 197 | 222 | |
| 198 | − /* Check that the vcpus are either all 32bit or all 64bit */ | |
| 199 | − kvm_for_each_vcpu(i, tmp, vcpu->kvm) { | |
| 200 | − if (vcpu_has_feature(tmp, KVM_ARM_VCPU_EL1_32BIT) != is32bit) | |
| 201 | − return false; | |
| 202 | − } | |
| 223 | + if (is32bit) | |
| 224 | + set_bit(KVM_ARCH_FLAG_EL1_32BIT, &kvm->arch.flags); | |
| 203 | 225 | |
| 204 | − return true; | |
| 226 | + set_bit(KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED, &kvm->arch.flags); | |
| 227 | + | |
| 228 | + return 0; | |
| 205 | 229 | } |
| 206 | 230 | |
| 207 | 231 | /** |
| @@ -230,10 +254,16 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 22 unmodified lines | ||
| 230 | 254 | u32 pstate; |
| 231 | 255 | |
| 232 | 256 | mutex_lock(&vcpu->kvm->lock); |
| 233 | − reset_state = vcpu->arch.reset_state; | |
| 234 | − WRITE_ONCE(vcpu->arch.reset_state.reset, false); | |
| 257 | + ret = kvm_set_vm_width(vcpu); | |
| 258 | + if (!ret) { | |
| 259 | + reset_state = vcpu->arch.reset_state; | |
| 260 | + WRITE_ONCE(vcpu->arch.reset_state.reset, false); | |
| 261 | + } | |
| 235 | 262 | mutex_unlock(&vcpu->kvm->lock); |
| 236 | 263 | |
| 264 | + if (ret) | |
| 265 | + return ret; | |
| 266 | + | |
| 237 | 267 | /* Reset PMU outside of the non-preemptible section */ |
| 238 | 268 | kvm_pmu_vcpu_reset(vcpu); |
| 239 | 269 | |
| @@ -260,14 +290,9 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 20 unmodified lines | ||
| 260 | 290 | } |
| 261 | 291 | } |
| 262 | 292 | |
| 263 | − if (!vcpu_allowed_register_width(vcpu)) { | |
| 264 | − ret = -EINVAL; | |
| 265 | − goto out; | |
| 266 | − } | |
| 267 | − | |
| 268 | 293 | switch (vcpu->arch.target) { |
| 269 | 294 | default: |
| 270 | − if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) { | |
| 295 | + if (vcpu_el1_is_32bit(vcpu)) { | |
| 271 | 296 | pstate = VCPU_RESET_PSTATE_SVC; |
| 272 | 297 | } else { |
| 273 | 298 | pstate = VCPU_RESET_PSTATE_EL1; |
| @@ -82,7 +82,7 @@ static bool end_of_vgic(struct vgic_state_iter *iter) · 81 unmodified lines | ||
| 82 | 82 | |
| 83 | 83 | static void *vgic_debug_start(struct seq_file *s, loff_t *pos) |
| 84 | 84 | { |
| 85 | − struct kvm *kvm = (struct kvm *)s->private; | |
| 85 | + struct kvm *kvm = s->private; | |
| 86 | 86 | struct vgic_state_iter *iter; |
| 87 | 87 | |
| 88 | 88 | mutex_lock(&kvm->lock); |
| @@ -110,7 +110,7 @@ out: · 21 unmodified lines | ||
| 110 | 110 | |
| 111 | 111 | static void *vgic_debug_next(struct seq_file *s, void *v, loff_t *pos) |
| 112 | 112 | { |
| 113 | − struct kvm *kvm = (struct kvm *)s->private; | |
| 113 | + struct kvm *kvm = s->private; | |
| 114 | 114 | struct vgic_state_iter *iter = kvm->arch.vgic.iter; |
| 115 | 115 | |
| 116 | 116 | ++*pos; |
| @@ -122,7 +122,7 @@ static void *vgic_debug_next(struct seq_file *s, void *v, loff_t *pos) · 5 unmodified lines | ||
| 122 | 122 | |
| 123 | 123 | static void vgic_debug_stop(struct seq_file *s, void *v) |
| 124 | 124 | { |
| 125 | − struct kvm *kvm = (struct kvm *)s->private; | |
| 125 | + struct kvm *kvm = s->private; | |
| 126 | 126 | struct vgic_state_iter *iter; |
| 127 | 127 | |
| 128 | 128 | /* |
| @@ -229,8 +229,8 @@ static void print_irq_state(struct seq_file *s, struct vgic_irq *irq, · 100 unmodified lines | ||
| 229 | 229 | |
| 230 | 230 | static int vgic_debug_show(struct seq_file *s, void *v) |
| 231 | 231 | { |
| 232 | − struct kvm *kvm = (struct kvm *)s->private; | |
| 233 | − struct vgic_state_iter *iter = (struct vgic_state_iter *)v; | |
| 232 | + struct kvm *kvm = s->private; | |
| 233 | + struct vgic_state_iter *iter = v; | |
| 234 | 234 | struct vgic_irq *irq; |
| 235 | 235 | struct kvm_vcpu *vcpu = NULL; |
| 236 | 236 | unsigned long flags; |
| @@ -2143,7 +2143,7 @@ static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, · 2142 unmodified lines | ||
| 2143 | 2143 | static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id, |
| 2144 | 2144 | void *ptr, void *opaque) |
| 2145 | 2145 | { |
| 2146 | − struct its_device *dev = (struct its_device *)opaque; | |
| 2146 | + struct its_device *dev = opaque; | |
| 2147 | 2147 | struct its_collection *collection; |
| 2148 | 2148 | struct kvm *kvm = its->dev->kvm; |
| 2149 | 2149 | struct kvm_vcpu *vcpu = NULL; |
| @@ -101,7 +101,7 @@ __module_alloc(unsigned long size, unsigned long start, unsigned long end, bool · 100 unmodified lines | ||
| 101 | 101 | * too. |
| 102 | 102 | */ |
| 103 | 103 | return __vmalloc_node_range(size, 1, start, end, gfp, prot, |
| 104 | − VM_FLUSH_RESET_PERMS | VM_NO_HUGE_VMAP, | |
| 104 | + VM_FLUSH_RESET_PERMS, | |
| 105 | 105 | NUMA_NO_NODE, __builtin_return_address(0)); |
| 106 | 106 | } |
| 107 | 107 | |
| @@ -615,23 +615,22 @@ DEFINE_INTERRUPT_HANDLER_ASYNC(timer_interrupt) · 614 unmodified lines | ||
| 615 | 615 | return; |
| 616 | 616 | } |
| 617 | 617 | |
| 618 | − /* Conditionally hard-enable interrupts. */ | |
| 619 | − if (should_hard_irq_enable()) { | |
| 620 | − /* | |
| 621 | − * Ensure a positive value is written to the decrementer, or | |
| 622 | − * else some CPUs will continue to take decrementer exceptions. | |
| 623 | − * When the PPC_WATCHDOG (decrementer based) is configured, | |
| 624 | − * keep this at most 31 bits, which is about 4 seconds on most | |
| 625 | − * systems, which gives the watchdog a chance of catching timer | |
| 626 | − * interrupt hard lockups. | |
| 627 | − */ | |
| 628 | − if (IS_ENABLED(CONFIG_PPC_WATCHDOG)) | |
| 629 | − set_dec(0x7fffffff); | |
| 630 | − else | |
| 631 | − set_dec(decrementer_max); | |
| 618 | + /* | |
| 619 | + * Ensure a positive value is written to the decrementer, or | |
| 620 | + * else some CPUs will continue to take decrementer exceptions. | |
| 621 | + * When the PPC_WATCHDOG (decrementer based) is configured, | |
| 622 | + * keep this at most 31 bits, which is about 4 seconds on most | |
| 623 | + * systems, which gives the watchdog a chance of catching timer | |
| 624 | + * interrupt hard lockups. | |
| 625 | + */ | |
| 626 | + if (IS_ENABLED(CONFIG_PPC_WATCHDOG)) | |
| 627 | + set_dec(0x7fffffff); | |
| 628 | + else | |
| 629 | + set_dec(decrementer_max); | |
| 632 | 630 | |
| 631 | + /* Conditionally hard-enable interrupts. */ | |
| 632 | + if (should_hard_irq_enable()) | |
| 633 | 633 | do_hard_irq_enable(); |
| 634 | − } | |
| 635 | 634 | |
| 636 | 635 | #if defined(CONFIG_PPC32) && defined(CONFIG_PPC_PMAC) |
| 637 | 636 | if (atomic_read(&ppc_n_lost_interrupts) != 0) |
| @@ -168,9 +168,10 @@ int kvmppc_mmu_walk_radix_tree(struct kvm_vcpu *vcpu, gva_t eaddr, · 167 unmodified lines | ||
| 168 | 168 | return -EINVAL; |
| 169 | 169 | /* Read the entry from guest memory */ |
| 170 | 170 | addr = base + (index * sizeof(rpte)); |
| 171 | − vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); | |
| 171 | + | |
| 172 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 172 | 173 | ret = kvm_read_guest(kvm, addr, &rpte, sizeof(rpte)); |
| 173 | − srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); | |
| 174 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 174 | 175 | if (ret) { |
| 175 | 176 | if (pte_ret_p) |
| 176 | 177 | *pte_ret_p = addr; |
| @@ -246,9 +247,9 @@ int kvmppc_mmu_radix_translate_table(struct kvm_vcpu *vcpu, gva_t eaddr, · 69 unmodified lines | ||
| 246 | 247 | |
| 247 | 248 | /* Read the table to find the root of the radix tree */ |
| 248 | 249 | ptbl = (table & PRTB_MASK) + (table_index * sizeof(entry)); |
| 249 | − vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); | |
| 250 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 250 | 251 | ret = kvm_read_guest(kvm, ptbl, &entry, sizeof(entry)); |
| 251 | − srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); | |
| 252 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 252 | 253 | if (ret) |
| 253 | 254 | return ret; |
| 254 | 255 | |
| @@ -420,13 +420,19 @@ static void kvmppc_tce_put(struct kvmppc_spapr_tce_table *stt, · 419 unmodified lines | ||
| 420 | 420 | tbl[idx % TCES_PER_PAGE] = tce; |
| 421 | 421 | } |
| 422 | 422 | |
| 423 | −static void kvmppc_clear_tce(struct mm_struct *mm, struct iommu_table *tbl, | |
| 424 | − unsigned long entry) | |
| 423 | +static void kvmppc_clear_tce(struct mm_struct *mm, struct kvmppc_spapr_tce_table *stt, | |
| 424 | + struct iommu_table *tbl, unsigned long entry) | |
| 425 | 425 | { |
| 426 | − unsigned long hpa = 0; | |
| 427 | − enum dma_data_direction dir = DMA_NONE; | |
| 426 | + unsigned long i; | |
| 427 | + unsigned long subpages = 1ULL << (stt->page_shift - tbl->it_page_shift); | |
| 428 | + unsigned long io_entry = entry << (stt->page_shift - tbl->it_page_shift); | |
| 429 | + | |
| 430 | + for (i = 0; i < subpages; ++i) { | |
| 431 | + unsigned long hpa = 0; | |
| 432 | + enum dma_data_direction dir = DMA_NONE; | |
| 428 | 433 | |
| 429 | − iommu_tce_xchg_no_kill(mm, tbl, entry, &hpa, &dir); | |
| 434 | + iommu_tce_xchg_no_kill(mm, tbl, io_entry + i, &hpa, &dir); | |
| 435 | + } | |
| 430 | 436 | } |
| 431 | 437 | |
| 432 | 438 | static long kvmppc_tce_iommu_mapped_dec(struct kvm *kvm, |
| @@ -485,6 +491,8 @@ static long kvmppc_tce_iommu_unmap(struct kvm *kvm, · 52 unmodified lines | ||
| 485 | 491 | break; |
| 486 | 492 | } |
| 487 | 493 | |
| 494 | + iommu_tce_kill(tbl, io_entry, subpages); | |
| 495 | + | |
| 488 | 496 | return ret; |
| 489 | 497 | } |
| 490 | 498 | |
| @@ -544,6 +552,8 @@ static long kvmppc_tce_iommu_map(struct kvm *kvm, · 53 unmodified lines | ||
| 544 | 552 | break; |
| 545 | 553 | } |
| 546 | 554 | |
| 555 | + iommu_tce_kill(tbl, io_entry, subpages); | |
| 556 | + | |
| 547 | 557 | return ret; |
| 548 | 558 | } |
| 549 | 559 | |
| @@ -590,10 +600,9 @@ long kvmppc_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn, · 40 unmodified lines | ||
| 590 | 600 | ret = kvmppc_tce_iommu_map(vcpu->kvm, stt, stit->tbl, |
| 591 | 601 | entry, ua, dir); |
| 592 | 602 | |
| 593 | − iommu_tce_kill(stit->tbl, entry, 1); | |
| 594 | 603 | |
| 595 | 604 | if (ret != H_SUCCESS) { |
| 596 | − kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry); | |
| 605 | + kvmppc_clear_tce(vcpu->kvm->mm, stt, stit->tbl, entry); | |
| 597 | 606 | goto unlock_exit; |
| 598 | 607 | } |
| 599 | 608 | } |
| @@ -669,13 +678,13 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu, · 69 unmodified lines | ||
| 669 | 678 | */ |
| 670 | 679 | if (get_user(tce, tces + i)) { |
| 671 | 680 | ret = H_TOO_HARD; |
| 672 | − goto invalidate_exit; | |
| 681 | + goto unlock_exit; | |
| 673 | 682 | } |
| 674 | 683 | tce = be64_to_cpu(tce); |
| 675 | 684 | |
| 676 | 685 | if (kvmppc_tce_to_ua(vcpu->kvm, tce, &ua)) { |
| 677 | 686 | ret = H_PARAMETER; |
| 678 | − goto invalidate_exit; | |
| 687 | + goto unlock_exit; | |
| 679 | 688 | } |
| 680 | 689 | |
| 681 | 690 | list_for_each_entry_lockless(stit, &stt->iommu_tables, next) { |
| @@ -684,19 +693,15 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu, · 2 unmodified lines | ||
| 684 | 693 | iommu_tce_direction(tce)); |
| 685 | 694 | |
| 686 | 695 | if (ret != H_SUCCESS) { |
| 687 | − kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, | |
| 688 | − entry); | |
| 689 | − goto invalidate_exit; | |
| 696 | + kvmppc_clear_tce(vcpu->kvm->mm, stt, stit->tbl, | |
| 697 | + entry + i); | |
| 698 | + goto unlock_exit; | |
| 690 | 699 | } |
| 691 | 700 | } |
| 692 | 701 | |
| 693 | 702 | kvmppc_tce_put(stt, entry + i, tce); |
| 694 | 703 | } |
| 695 | 704 | |
| 696 | −invalidate_exit: | |
| 697 | − list_for_each_entry_lockless(stit, &stt->iommu_tables, next) | |
| 698 | − iommu_tce_kill(stit->tbl, entry, npages); | |
| 699 | − | |
| 700 | 705 | unlock_exit: |
| 701 | 706 | srcu_read_unlock(&vcpu->kvm->srcu, idx); |
| 702 | 707 | |
| @@ -735,20 +740,16 @@ long kvmppc_h_stuff_tce(struct kvm_vcpu *vcpu, · 32 unmodified lines | ||
| 735 | 740 | continue; |
| 736 | 741 | |
| 737 | 742 | if (ret == H_TOO_HARD) |
| 738 | − goto invalidate_exit; | |
| 743 | + return ret; | |
| 739 | 744 | |
| 740 | 745 | WARN_ON_ONCE(1); |
| 741 | − kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry); | |
| 746 | + kvmppc_clear_tce(vcpu->kvm->mm, stt, stit->tbl, entry + i); | |
| 742 | 747 | } |
| 743 | 748 | } |
| 744 | 749 | |
| 745 | 750 | for (i = 0; i < npages; ++i, ioba += (1ULL << stt->page_shift)) |
| 746 | 751 | kvmppc_tce_put(stt, ioba >> stt->page_shift, tce_value); |
| 747 | 752 | |
| 748 | −invalidate_exit: | |
| 749 | − list_for_each_entry_lockless(stit, &stt->iommu_tables, next) | |
| 750 | − iommu_tce_kill(stit->tbl, ioba >> stt->page_shift, npages); | |
| 751 | − | |
| 752 | 753 | return ret; |
| 753 | 754 | } |
| 754 | 755 | EXPORT_SYMBOL_GPL(kvmppc_h_stuff_tce); |
| @@ -247,13 +247,19 @@ static void iommu_tce_kill_rm(struct iommu_table *tbl, · 246 unmodified lines | ||
| 247 | 247 | tbl->it_ops->tce_kill(tbl, entry, pages, true); |
| 248 | 248 | } |
| 249 | 249 | |
| 250 | −static void kvmppc_rm_clear_tce(struct kvm *kvm, struct iommu_table *tbl, | |
| 251 | − unsigned long entry) | |
| 250 | +static void kvmppc_rm_clear_tce(struct kvm *kvm, struct kvmppc_spapr_tce_table *stt, | |
| 251 | + struct iommu_table *tbl, unsigned long entry) | |
| 252 | 252 | { |
| 253 | − unsigned long hpa = 0; | |
| 254 | − enum dma_data_direction dir = DMA_NONE; | |
| 253 | + unsigned long i; | |
| 254 | + unsigned long subpages = 1ULL << (stt->page_shift - tbl->it_page_shift); | |
| 255 | + unsigned long io_entry = entry << (stt->page_shift - tbl->it_page_shift); | |
| 256 | + | |
| 257 | + for (i = 0; i < subpages; ++i) { | |
| 258 | + unsigned long hpa = 0; | |
| 259 | + enum dma_data_direction dir = DMA_NONE; | |
| 255 | 260 | |
| 256 | − iommu_tce_xchg_no_kill_rm(kvm->mm, tbl, entry, &hpa, &dir); | |
| 261 | + iommu_tce_xchg_no_kill_rm(kvm->mm, tbl, io_entry + i, &hpa, &dir); | |
| 262 | + } | |
| 257 | 263 | } |
| 258 | 264 | |
| 259 | 265 | static long kvmppc_rm_tce_iommu_mapped_dec(struct kvm *kvm, |
| @@ -316,6 +322,8 @@ static long kvmppc_rm_tce_iommu_unmap(struct kvm *kvm, · 56 unmodified lines | ||
| 316 | 322 | break; |
| 317 | 323 | } |
| 318 | 324 | |
| 325 | + iommu_tce_kill_rm(tbl, io_entry, subpages); | |
| 326 | + | |
| 319 | 327 | return ret; |
| 320 | 328 | } |
| 321 | 329 | |
| @@ -379,6 +387,8 @@ static long kvmppc_rm_tce_iommu_map(struct kvm *kvm, · 57 unmodified lines | ||
| 379 | 387 | break; |
| 380 | 388 | } |
| 381 | 389 | |
| 390 | + iommu_tce_kill_rm(tbl, io_entry, subpages); | |
| 391 | + | |
| 382 | 392 | return ret; |
| 383 | 393 | } |
| 384 | 394 | |
| @@ -420,10 +430,8 @@ long kvmppc_rm_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn, · 35 unmodified lines | ||
| 420 | 430 | ret = kvmppc_rm_tce_iommu_map(vcpu->kvm, stt, |
| 421 | 431 | stit->tbl, entry, ua, dir); |
| 422 | 432 | |
| 423 | − iommu_tce_kill_rm(stit->tbl, entry, 1); | |
| 424 | − | |
| 425 | 433 | if (ret != H_SUCCESS) { |
| 426 | − kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry); | |
| 434 | + kvmppc_rm_clear_tce(vcpu->kvm, stt, stit->tbl, entry); | |
| 427 | 435 | return ret; |
| 428 | 436 | } |
| 429 | 437 | } |
| @@ -561,7 +569,7 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu, · 131 unmodified lines | ||
| 561 | 569 | ua = 0; |
| 562 | 570 | if (kvmppc_rm_tce_to_ua(vcpu->kvm, tce, &ua)) { |
| 563 | 571 | ret = H_PARAMETER; |
| 564 | − goto invalidate_exit; | |
| 572 | + goto unlock_exit; | |
| 565 | 573 | } |
| 566 | 574 | |
| 567 | 575 | list_for_each_entry_lockless(stit, &stt->iommu_tables, next) { |
| @@ -570,19 +578,15 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu, · 2 unmodified lines | ||
| 570 | 578 | iommu_tce_direction(tce)); |
| 571 | 579 | |
| 572 | 580 | if (ret != H_SUCCESS) { |
| 573 | − kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, | |
| 574 | − entry); | |
| 575 | − goto invalidate_exit; | |
| 581 | + kvmppc_rm_clear_tce(vcpu->kvm, stt, stit->tbl, | |
| 582 | + entry + i); | |
| 583 | + goto unlock_exit; | |
| 576 | 584 | } |
| 577 | 585 | } |
| 578 | 586 | |
| 579 | 587 | kvmppc_rm_tce_put(stt, entry + i, tce); |
| 580 | 588 | } |
| 581 | 589 | |
| 582 | −invalidate_exit: | |
| 583 | − list_for_each_entry_lockless(stit, &stt->iommu_tables, next) | |
| 584 | − iommu_tce_kill_rm(stit->tbl, entry, npages); | |
| 585 | − | |
| 586 | 590 | unlock_exit: |
| 587 | 591 | if (!prereg) |
| 588 | 592 | arch_spin_unlock(&kvm->mmu_lock.rlock.raw_lock); |
| @@ -620,20 +624,16 @@ long kvmppc_rm_h_stuff_tce(struct kvm_vcpu *vcpu, · 31 unmodified lines | ||
| 620 | 624 | continue; |
| 621 | 625 | |
| 622 | 626 | if (ret == H_TOO_HARD) |
| 623 | − goto invalidate_exit; | |
| 627 | + return ret; | |
| 624 | 628 | |
| 625 | 629 | WARN_ON_ONCE_RM(1); |
| 626 | − kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry); | |
| 630 | + kvmppc_rm_clear_tce(vcpu->kvm, stt, stit->tbl, entry + i); | |
| 627 | 631 | } |
| 628 | 632 | } |
| 629 | 633 | |
| 630 | 634 | for (i = 0; i < npages; ++i, ioba += (1ULL << stt->page_shift)) |
| 631 | 635 | kvmppc_rm_tce_put(stt, ioba >> stt->page_shift, tce_value); |
| 632 | 636 | |
| 633 | −invalidate_exit: | |
| 634 | − list_for_each_entry_lockless(stit, &stt->iommu_tables, next) | |
| 635 | − iommu_tce_kill_rm(stit->tbl, ioba >> stt->page_shift, npages); | |
| 636 | − | |
| 637 | 637 | return ret; |
| 638 | 638 | } |
| 639 | 639 | |
| @@ -306,10 +306,10 @@ long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu) · 305 unmodified lines | ||
| 306 | 306 | /* copy parameters in */ |
| 307 | 307 | hv_ptr = kvmppc_get_gpr(vcpu, 4); |
| 308 | 308 | regs_ptr = kvmppc_get_gpr(vcpu, 5); |
| 309 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 309 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 310 | 310 | err = kvmhv_read_guest_state_and_regs(vcpu, &l2_hv, &l2_regs, |
| 311 | 311 | hv_ptr, regs_ptr); |
| 312 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 312 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 313 | 313 | if (err) |
| 314 | 314 | return H_PARAMETER; |
| 315 | 315 | |
| @@ -410,10 +410,10 @@ long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu) · 94 unmodified lines | ||
| 410 | 410 | byteswap_hv_regs(&l2_hv); |
| 411 | 411 | byteswap_pt_regs(&l2_regs); |
| 412 | 412 | } |
| 413 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 413 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 414 | 414 | err = kvmhv_write_guest_state_and_regs(vcpu, &l2_hv, &l2_regs, |
| 415 | 415 | hv_ptr, regs_ptr); |
| 416 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 416 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 417 | 417 | if (err) |
| 418 | 418 | return H_AUTHORITY; |
| 419 | 419 | |
| @@ -600,16 +600,16 @@ long kvmhv_copy_tofrom_guest_nested(struct kvm_vcpu *vcpu) · 180 unmodified lines | ||
| 600 | 600 | goto not_found; |
| 601 | 601 | |
| 602 | 602 | /* Write what was loaded into our buffer back to the L1 guest */ |
| 603 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 603 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 604 | 604 | rc = kvm_vcpu_write_guest(vcpu, gp_to, buf, n); |
| 605 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 605 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 606 | 606 | if (rc) |
| 607 | 607 | goto not_found; |
| 608 | 608 | } else { |
| 609 | 609 | /* Load the data to be stored from the L1 guest into our buf */ |
| 610 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 610 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 611 | 611 | rc = kvm_vcpu_read_guest(vcpu, gp_from, buf, n); |
| 612 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 612 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 613 | 613 | if (rc) |
| 614 | 614 | goto not_found; |
| 615 | 615 | |
| @@ -229,9 +229,9 @@ int kvmppc_rtas_hcall(struct kvm_vcpu *vcpu) · 228 unmodified lines | ||
| 229 | 229 | */ |
| 230 | 230 | args_phys = kvmppc_get_gpr(vcpu, 4) & KVM_PAM; |
| 231 | 231 | |
| 232 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 232 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 233 | 233 | rc = kvm_read_guest(vcpu->kvm, args_phys, &args, sizeof(args)); |
| 234 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 234 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 235 | 235 | if (rc) |
| 236 | 236 | goto fail; |
| 237 | 237 | |
| @@ -425,9 +425,9 @@ int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, · 424 unmodified lines | ||
| 425 | 425 | return EMULATE_DONE; |
| 426 | 426 | } |
| 427 | 427 | |
| 428 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 428 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 429 | 429 | rc = kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size); |
| 430 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 430 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 431 | 431 | if (rc) |
| 432 | 432 | return EMULATE_DO_MMIO; |
| 433 | 433 | |
| @@ -3,11 +3,11 @@ · 2 unmodified lines | ||
| 3 | 3 | obj-y += callchain.o callchain_$(BITS).o perf_regs.o |
| 4 | 4 | obj-$(CONFIG_COMPAT) += callchain_32.o |
| 5 | 5 | |
| 6 | −obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o | |
| 6 | +obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o | |
| 7 | 7 | obj64-$(CONFIG_PPC_PERF_CTRS) += ppc970-pmu.o power5-pmu.o \ |
| 8 | 8 | power5+-pmu.o power6-pmu.o power7-pmu.o \ |
| 9 | 9 | isa207-common.o power8-pmu.o power9-pmu.o \ |
| 10 | − generic-compat-pmu.o power10-pmu.o | |
| 10 | + generic-compat-pmu.o power10-pmu.o bhrb.o | |
| 11 | 11 | obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o |
| 12 | 12 | |
| 13 | 13 | obj-$(CONFIG_PPC_POWERNV) += imc-pmu.o |
| @@ -91,8 +91,8 @@ extern u64 PERF_REG_EXTENDED_MASK; · 90 unmodified lines | ||
| 91 | 91 | |
| 92 | 92 | /* Table of alternatives, sorted by column 0 */ |
| 93 | 93 | static const unsigned int power10_event_alternatives[][MAX_ALT] = { |
| 94 | − { PM_CYC_ALT, PM_CYC }, | |
| 95 | 94 | { PM_INST_CMPL_ALT, PM_INST_CMPL }, |
| 95 | + { PM_CYC_ALT, PM_CYC }, | |
| 96 | 96 | }; |
| 97 | 97 | |
| 98 | 98 | static int power10_get_alternatives(u64 event, unsigned int flags, u64 alt[]) |
| @@ -133,11 +133,11 @@ int p9_dd22_bl_ev[] = { · 132 unmodified lines | ||
| 133 | 133 | |
| 134 | 134 | /* Table of alternatives, sorted by column 0 */ |
| 135 | 135 | static const unsigned int power9_event_alternatives[][MAX_ALT] = { |
| 136 | − { PM_INST_DISP, PM_INST_DISP_ALT }, | |
| 137 | − { PM_RUN_CYC_ALT, PM_RUN_CYC }, | |
| 138 | − { PM_RUN_INST_CMPL_ALT, PM_RUN_INST_CMPL }, | |
| 139 | − { PM_LD_MISS_L1, PM_LD_MISS_L1_ALT }, | |
| 140 | 136 | { PM_BR_2PATH, PM_BR_2PATH_ALT }, |
| 137 | + { PM_INST_DISP, PM_INST_DISP_ALT }, | |
| 138 | + { PM_RUN_CYC_ALT, PM_RUN_CYC }, | |
| 139 | + { PM_LD_MISS_L1, PM_LD_MISS_L1_ALT }, | |
| 140 | + { PM_RUN_INST_CMPL_ALT, PM_RUN_INST_CMPL }, | |
| 141 | 141 | }; |
| 142 | 142 | |
| 143 | 143 | static int power9_get_alternatives(u64 event, unsigned int flags, u64 alt[]) |
| @@ -38,7 +38,7 @@ config SOC_VIRT · 37 unmodified lines | ||
| 38 | 38 | select SIFIVE_PLIC |
| 39 | 39 | select PM_GENERIC_DOMAINS if PM |
| 40 | 40 | select PM_GENERIC_DOMAINS_OF if PM && OF |
| 41 | − select RISCV_SBI_CPUIDLE if CPU_IDLE | |
| 41 | + select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI | |
| 42 | 42 | help |
| 43 | 43 | This enables support for QEMU Virt Machine. |
| 44 | 44 | |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | reg = <0x0 0x41000000 0x0 0xF0>; |
| 8 | 8 | microchip,sync-update-mask = /bits/ 32 <0>; |
| 9 | 9 | #pwm-cells = <2>; |
| 10 | − clocks = <&clkcfg CLK_FIC3>; | |
| 10 | + clocks = <&fabric_clk3>; | |
| 11 | 11 | status = "disabled"; |
| 12 | 12 | }; |
| 13 | 13 | |
| @@ -16,10 +16,22 @@ · 2 unmodified lines | ||
| 16 | 16 | reg = <0x0 0x44000000 0x0 0x1000>; |
| 17 | 17 | #address-cells = <1>; |
| 18 | 18 | #size-cells = <0>; |
| 19 | − clocks = <&clkcfg CLK_FIC3>; | |
| 19 | + clocks = <&fabric_clk3>; | |
| 20 | 20 | interrupt-parent = <&plic>; |
| 21 | 21 | interrupts = <122>; |
| 22 | 22 | clock-frequency = <100000>; |
| 23 | 23 | status = "disabled"; |
| 24 | 24 | }; |
| 25 | + | |
| 26 | + fabric_clk3: fabric-clk3 { | |
| 27 | + compatible = "fixed-clock"; | |
| 28 | + #clock-cells = <0>; | |
| 29 | + clock-frequency = <62500000>; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + fabric_clk1: fabric-clk1 { | |
| 33 | + compatible = "fixed-clock"; | |
| 34 | + #clock-cells = <0>; | |
| 35 | + clock-frequency = <125000000>; | |
| 36 | + }; | |
| 25 | 37 | }; |
| @@ -45,7 +45,7 @@ · 44 unmodified lines | ||
| 45 | 45 | }; |
| 46 | 46 | |
| 47 | 47 | &refclk { |
| 48 | − clock-frequency = <600000000>; | |
| 48 | + clock-frequency = <125000000>; | |
| 49 | 49 | }; |
| 50 | 50 | |
| 51 | 51 | &mmuart1 { |
| @@ -141,7 +141,7 @@ · 140 unmodified lines | ||
| 141 | 141 | }; |
| 142 | 142 | }; |
| 143 | 143 | |
| 144 | − refclk: msspllclk { | |
| 144 | + refclk: mssrefclk { | |
| 145 | 145 | compatible = "fixed-clock"; |
| 146 | 146 | #clock-cells = <0>; |
| 147 | 147 | }; |
| @@ -190,7 +190,7 @@ · 42 unmodified lines | ||
| 190 | 190 | |
| 191 | 191 | clkcfg: clkcfg@20002000 { |
| 192 | 192 | compatible = "microchip,mpfs-clkcfg"; |
| 193 | − reg = <0x0 0x20002000 0x0 0x1000>; | |
| 193 | + reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; | |
| 194 | 194 | clocks = <&refclk>; |
| 195 | 195 | #clock-cells = <1>; |
| 196 | 196 | }; |
| @@ -393,8 +393,8 @@ · 196 unmodified lines | ||
| 393 | 393 | reg = <0x0 0x20124000 0x0 0x1000>; |
| 394 | 394 | interrupt-parent = <&plic>; |
| 395 | 395 | interrupts = <80>, <81>; |
| 396 | − clocks = <&clkcfg CLK_RTC>; | |
| 397 | − clock-names = "rtc"; | |
| 396 | + clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>; | |
| 397 | + clock-names = "rtc", "rtcref"; | |
| 398 | 398 | status = "disabled"; |
| 399 | 399 | }; |
| 400 | 400 | |
| @@ -424,7 +424,7 @@ · 23 unmodified lines | ||
| 424 | 424 | <0 0 0 3 &pcie_intc 2>, |
| 425 | 425 | <0 0 0 4 &pcie_intc 3>; |
| 426 | 426 | interrupt-map-mask = <0 0 0 7>; |
| 427 | − clocks = <&clkcfg CLK_FIC0>, <&clkcfg CLK_FIC1>, <&clkcfg CLK_FIC3>; | |
| 427 | + clocks = <&fabric_clk1>, <&fabric_clk1>, <&fabric_clk3>; | |
| 428 | 428 | clock-names = "fic0", "fic1", "fic3"; |
| 429 | 429 | ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>; |
| 430 | 430 | msi-parent = <&pcie>; |
| @@ -101,6 +101,7 @@ CONFIG_VIRTIO_BALLOON=y · 100 unmodified lines | ||
| 101 | 101 | CONFIG_VIRTIO_INPUT=y |
| 102 | 102 | CONFIG_VIRTIO_MMIO=y |
| 103 | 103 | CONFIG_RPMSG_CHAR=y |
| 104 | +CONFIG_RPMSG_CTRL=y | |
| 104 | 105 | CONFIG_RPMSG_VIRTIO=y |
| 105 | 106 | CONFIG_EXT4_FS=y |
| 106 | 107 | CONFIG_EXT4_FS_POSIX_ACL=y |
| @@ -93,6 +93,7 @@ CONFIG_VIRTIO_BALLOON=y · 92 unmodified lines | ||
| 93 | 93 | CONFIG_VIRTIO_INPUT=y |
| 94 | 94 | CONFIG_VIRTIO_MMIO=y |
| 95 | 95 | CONFIG_RPMSG_CHAR=y |
| 96 | +CONFIG_RPMSG_CTRL=y | |
| 96 | 97 | CONFIG_RPMSG_VIRTIO=y |
| 97 | 98 | CONFIG_EXT4_FS=y |
| 98 | 99 | CONFIG_EXT4_FS_POSIX_ACL=y |
| @@ -193,9 +193,6 @@ struct kvm_vcpu_arch { · 192 unmodified lines | ||
| 193 | 193 | |
| 194 | 194 | /* Don't run the VCPU (blocked) */ |
| 195 | 195 | bool pause; |
| 196 | − | |
| 197 | − /* SRCU lock index for in-kernel run loop */ | |
| 198 | − int srcu_idx; | |
| 199 | 196 | }; |
| 200 | 197 | |
| 201 | 198 | static inline void kvm_arch_hardware_unsetup(void) {} |
| @@ -104,7 +104,7 @@ static int patch_text_cb(void *data) · 103 unmodified lines | ||
| 104 | 104 | struct patch_insn *patch = data; |
| 105 | 105 | int ret = 0; |
| 106 | 106 | |
| 107 | − if (atomic_inc_return(&patch->cpu_count) == 1) { | |
| 107 | + if (atomic_inc_return(&patch->cpu_count) == num_online_cpus()) { | |
| 108 | 108 | ret = |
| 109 | 109 | patch_text_nosync(patch->addr, &patch->insn, |
| 110 | 110 | GET_INSN_LENGTH(patch->insn)); |
| @@ -38,14 +38,16 @@ const struct kvm_stats_header kvm_vcpu_stats_header = { · 37 unmodified lines | ||
| 38 | 38 | sizeof(kvm_vcpu_stats_desc), |
| 39 | 39 | }; |
| 40 | 40 | |
| 41 | −#define KVM_RISCV_ISA_ALLOWED (riscv_isa_extension_mask(a) | \ | |
| 42 | − riscv_isa_extension_mask(c) | \ | |
| 43 | − riscv_isa_extension_mask(d) | \ | |
| 44 | − riscv_isa_extension_mask(f) | \ | |
| 45 | − riscv_isa_extension_mask(i) | \ | |
| 46 | − riscv_isa_extension_mask(m) | \ | |
| 47 | − riscv_isa_extension_mask(s) | \ | |
| 48 | − riscv_isa_extension_mask(u)) | |
| 41 | +#define KVM_RISCV_ISA_DISABLE_ALLOWED (riscv_isa_extension_mask(d) | \ | |
| 42 | + riscv_isa_extension_mask(f)) | |
| 43 | + | |
| 44 | +#define KVM_RISCV_ISA_DISABLE_NOT_ALLOWED (riscv_isa_extension_mask(a) | \ | |
| 45 | + riscv_isa_extension_mask(c) | \ | |
| 46 | + riscv_isa_extension_mask(i) | \ | |
| 47 | + riscv_isa_extension_mask(m)) | |
| 48 | + | |
| 49 | +#define KVM_RISCV_ISA_ALLOWED (KVM_RISCV_ISA_DISABLE_ALLOWED | \ | |
| 50 | + KVM_RISCV_ISA_DISABLE_NOT_ALLOWED) | |
| 49 | 51 | |
| 50 | 52 | static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) |
| 51 | 53 | { |
| @@ -219,7 +221,8 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu, · 167 unmodified lines | ||
| 219 | 221 | switch (reg_num) { |
| 220 | 222 | case KVM_REG_RISCV_CONFIG_REG(isa): |
| 221 | 223 | if (!vcpu->arch.ran_atleast_once) { |
| 222 | − vcpu->arch.isa = reg_val; | |
| 224 | + /* Ignore the disable request for these extensions */ | |
| 225 | + vcpu->arch.isa = reg_val | KVM_RISCV_ISA_DISABLE_NOT_ALLOWED; | |
| 223 | 226 | vcpu->arch.isa &= riscv_isa_extension_base(NULL); |
| 224 | 227 | vcpu->arch.isa &= KVM_RISCV_ISA_ALLOWED; |
| 225 | 228 | kvm_riscv_vcpu_fp_reset(vcpu); |
| @@ -653,8 +656,6 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) · 427 unmodified lines | ||
| 653 | 656 | vcpu->arch.isa); |
| 654 | 657 | kvm_riscv_vcpu_host_fp_restore(&vcpu->arch.host_context); |
| 655 | 658 | |
| 656 | − csr_write(CSR_HGATP, 0); | |
| 657 | − | |
| 658 | 659 | csr->vsstatus = csr_read(CSR_VSSTATUS); |
| 659 | 660 | csr->vsie = csr_read(CSR_VSIE); |
| 660 | 661 | csr->vstvec = csr_read(CSR_VSTVEC); |
| @@ -726,13 +727,13 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 65 unmodified lines | ||
| 726 | 727 | /* Mark this VCPU ran at least once */ |
| 727 | 728 | vcpu->arch.ran_atleast_once = true; |
| 728 | 729 | |
| 729 | − vcpu->arch.srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 730 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 730 | 731 | |
| 731 | 732 | /* Process MMIO value returned from user-space */ |
| 732 | 733 | if (run->exit_reason == KVM_EXIT_MMIO) { |
| 733 | 734 | ret = kvm_riscv_vcpu_mmio_return(vcpu, vcpu->run); |
| 734 | 735 | if (ret) { |
| 735 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx); | |
| 736 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 736 | 737 | return ret; |
| 737 | 738 | } |
| 738 | 739 | } |
| @@ -741,13 +742,13 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 2 unmodified lines | ||
| 741 | 742 | if (run->exit_reason == KVM_EXIT_RISCV_SBI) { |
| 742 | 743 | ret = kvm_riscv_vcpu_sbi_return(vcpu, vcpu->run); |
| 743 | 744 | if (ret) { |
| 744 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx); | |
| 745 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 745 | 746 | return ret; |
| 746 | 747 | } |
| 747 | 748 | } |
| 748 | 749 | |
| 749 | 750 | if (run->immediate_exit) { |
| 750 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx); | |
| 751 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 751 | 752 | return -EINTR; |
| 752 | 753 | } |
| 753 | 754 | |
| @@ -786,7 +787,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 32 unmodified lines | ||
| 786 | 787 | */ |
| 787 | 788 | vcpu->mode = IN_GUEST_MODE; |
| 788 | 789 | |
| 789 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx); | |
| 790 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 790 | 791 | smp_mb__after_srcu_read_unlock(); |
| 791 | 792 | |
| 792 | 793 | /* |
| @@ -804,7 +805,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 11 unmodified lines | ||
| 804 | 805 | vcpu->mode = OUTSIDE_GUEST_MODE; |
| 805 | 806 | local_irq_enable(); |
| 806 | 807 | preempt_enable(); |
| 807 | − vcpu->arch.srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 808 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 808 | 809 | continue; |
| 809 | 810 | } |
| 810 | 811 | |
| @@ -848,7 +849,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 37 unmodified lines | ||
| 848 | 849 | |
| 849 | 850 | preempt_enable(); |
| 850 | 851 | |
| 851 | − vcpu->arch.srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 852 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 852 | 853 | |
| 853 | 854 | ret = kvm_riscv_vcpu_exit(vcpu, run, &trap); |
| 854 | 855 | } |
| @@ -857,7 +858,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 2 unmodified lines | ||
| 857 | 858 | |
| 858 | 859 | vcpu_put(vcpu); |
| 859 | 860 | |
| 860 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx); | |
| 861 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 861 | 862 | |
| 862 | 863 | return ret; |
| 863 | 864 | } |
| @@ -456,9 +456,9 @@ static int stage2_page_fault(struct kvm_vcpu *vcpu, struct kvm_run *run, · 455 unmodified lines | ||
| 456 | 456 | void kvm_riscv_vcpu_wfi(struct kvm_vcpu *vcpu) |
| 457 | 457 | { |
| 458 | 458 | if (!kvm_arch_vcpu_runnable(vcpu)) { |
| 459 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx); | |
| 459 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 460 | 460 | kvm_vcpu_halt(vcpu); |
| 461 | − vcpu->arch.srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 461 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 462 | 462 | kvm_clear_request(KVM_REQ_UNHALT, vcpu); |
| 463 | 463 | } |
| 464 | 464 | } |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | #include <linux/err.h> |
| 12 | 12 | #include <linux/kvm_host.h> |
| 13 | 13 | #include <linux/uaccess.h> |
| 14 | +#include <asm/hwcap.h> | |
| 14 | 15 | |
| 15 | 16 | #ifdef CONFIG_FPU |
| 16 | 17 | void kvm_riscv_vcpu_fp_reset(struct kvm_vcpu *vcpu) |
| @@ -83,7 +83,7 @@ void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run) · 82 unmodified lines | ||
| 83 | 83 | |
| 84 | 84 | void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu, |
| 85 | 85 | struct kvm_run *run, |
| 86 | − u32 type, u64 flags) | |
| 86 | + u32 type, u64 reason) | |
| 87 | 87 | { |
| 88 | 88 | unsigned long i; |
| 89 | 89 | struct kvm_vcpu *tmp; |
| @@ -94,7 +94,8 @@ void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu, · 4 unmodified lines | ||
| 94 | 94 | |
| 95 | 95 | memset(&run->system_event, 0, sizeof(run->system_event)); |
| 96 | 96 | run->system_event.type = type; |
| 97 | − run->system_event.flags = flags; | |
| 97 | + run->system_event.ndata = 1; | |
| 98 | + run->system_event.data[0] = reason; | |
| 98 | 99 | run->exit_reason = KVM_EXIT_SYSTEM_EVENT; |
| 99 | 100 | } |
| 100 | 101 | |
| @@ -718,6 +718,7 @@ retry: · 717 unmodified lines | ||
| 718 | 718 | if (!check_l4) { |
| 719 | 719 | disable_pgtable_l5(); |
| 720 | 720 | check_l4 = true; |
| 721 | + memset(early_pg_dir, 0, PAGE_SIZE); | |
| 721 | 722 | goto retry; |
| 722 | 723 | } |
| 723 | 724 | disable_pgtable_l4(); |
| @@ -255,6 +255,10 @@ config HAVE_MARCH_Z15_FEATURES · 254 unmodified lines | ||
| 255 | 255 | def_bool n |
| 256 | 256 | select HAVE_MARCH_Z14_FEATURES |
| 257 | 257 | |
| 258 | +config HAVE_MARCH_Z16_FEATURES | |
| 259 | + def_bool n | |
| 260 | + select HAVE_MARCH_Z15_FEATURES | |
| 261 | + | |
| 258 | 262 | choice |
| 259 | 263 | prompt "Processor type" |
| 260 | 264 | default MARCH_Z196 |
| @@ -312,6 +316,14 @@ config MARCH_Z15 · 51 unmodified lines | ||
| 312 | 316 | and 8561 series). The kernel will be slightly faster but will not |
| 313 | 317 | work on older machines. |
| 314 | 318 | |
| 319 | +config MARCH_Z16 | |
| 320 | + bool "IBM z16" | |
| 321 | + select HAVE_MARCH_Z16_FEATURES | |
| 322 | + depends on $(cc-option,-march=z16) | |
| 323 | + help | |
| 324 | + Select this to enable optimizations for IBM z16 (3931 and | |
| 325 | + 3932 series). | |
| 326 | + | |
| 315 | 327 | endchoice |
| 316 | 328 | |
| 317 | 329 | config MARCH_Z10_TUNE |
| @@ -332,6 +344,9 @@ config MARCH_Z14_TUNE · 14 unmodified lines | ||
| 332 | 344 | config MARCH_Z15_TUNE |
| 333 | 345 | def_bool TUNE_Z15 || MARCH_Z15 && TUNE_DEFAULT |
| 334 | 346 | |
| 347 | +config MARCH_Z16_TUNE | |
| 348 | + def_bool TUNE_Z16 || MARCH_Z16 && TUNE_DEFAULT | |
| 349 | + | |
| 335 | 350 | choice |
| 336 | 351 | prompt "Tune code generation" |
| 337 | 352 | default TUNE_DEFAULT |
| @@ -372,6 +387,10 @@ config TUNE_Z15 · 34 unmodified lines | ||
| 372 | 387 | bool "IBM z15" |
| 373 | 388 | depends on $(cc-option,-mtune=z15) |
| 374 | 389 | |
| 390 | +config TUNE_Z16 | |
| 391 | + bool "IBM z16" | |
| 392 | + depends on $(cc-option,-mtune=z16) | |
| 393 | + | |
| 375 | 394 | endchoice |
| 376 | 395 | |
| 377 | 396 | config 64BIT |
| @@ -42,6 +42,7 @@ mflags-$(CONFIG_MARCH_ZEC12) := -march=zEC12 · 41 unmodified lines | ||
| 42 | 42 | mflags-$(CONFIG_MARCH_Z13) := -march=z13 |
| 43 | 43 | mflags-$(CONFIG_MARCH_Z14) := -march=z14 |
| 44 | 44 | mflags-$(CONFIG_MARCH_Z15) := -march=z15 |
| 45 | +mflags-$(CONFIG_MARCH_Z16) := -march=z16 | |
| 45 | 46 | |
| 46 | 47 | export CC_FLAGS_MARCH := $(mflags-y) |
| 47 | 48 | |
| @@ -54,6 +55,7 @@ cflags-$(CONFIG_MARCH_ZEC12_TUNE) += -mtune=zEC12 · 6 unmodified lines | ||
| 54 | 55 | cflags-$(CONFIG_MARCH_Z13_TUNE) += -mtune=z13 |
| 55 | 56 | cflags-$(CONFIG_MARCH_Z14_TUNE) += -mtune=z14 |
| 56 | 57 | cflags-$(CONFIG_MARCH_Z15_TUNE) += -mtune=z15 |
| 58 | +cflags-$(CONFIG_MARCH_Z16_TUNE) += -mtune=z16 | |
| 57 | 59 | |
| 58 | 60 | cflags-y += -Wa,-I$(srctree)/arch/$(ARCH)/include |
| 59 | 61 | |
| @@ -499,11 +499,13 @@ CONFIG_NLMON=m · 498 unmodified lines | ||
| 499 | 499 | # CONFIG_NET_VENDOR_CHELSIO is not set |
| 500 | 500 | # CONFIG_NET_VENDOR_CISCO is not set |
| 501 | 501 | # CONFIG_NET_VENDOR_CORTINA is not set |
| 502 | +# CONFIG_NET_VENDOR_DAVICOM is not set | |
| 502 | 503 | # CONFIG_NET_VENDOR_DEC is not set |
| 503 | 504 | # CONFIG_NET_VENDOR_DLINK is not set |
| 504 | 505 | # CONFIG_NET_VENDOR_EMULEX is not set |
| 505 | 506 | # CONFIG_NET_VENDOR_ENGLEDER is not set |
| 506 | 507 | # CONFIG_NET_VENDOR_EZCHIP is not set |
| 508 | +# CONFIG_NET_VENDOR_FUNGIBLE is not set | |
| 507 | 509 | # CONFIG_NET_VENDOR_GOOGLE is not set |
| 508 | 510 | # CONFIG_NET_VENDOR_HUAWEI is not set |
| 509 | 511 | # CONFIG_NET_VENDOR_INTEL is not set |
| @@ -588,13 +590,13 @@ CONFIG_MLX5_INFINIBAND=m · 78 unmodified lines | ||
| 588 | 590 | CONFIG_SYNC_FILE=y |
| 589 | 591 | CONFIG_VFIO=m |
| 590 | 592 | CONFIG_VFIO_PCI=m |
| 593 | +CONFIG_MLX5_VFIO_PCI=m | |
| 591 | 594 | CONFIG_VFIO_MDEV=m |
| 592 | 595 | CONFIG_VIRTIO_PCI=m |
| 593 | 596 | CONFIG_VIRTIO_BALLOON=m |
| 594 | 597 | CONFIG_VIRTIO_INPUT=y |
| 595 | 598 | CONFIG_VHOST_NET=m |
| 596 | 599 | CONFIG_VHOST_VSOCK=m |
| 597 | −# CONFIG_SURFACE_PLATFORMS is not set | |
| 598 | 600 | CONFIG_S390_CCW_IOMMU=y |
| 599 | 601 | CONFIG_S390_AP_IOMMU=y |
| 600 | 602 | CONFIG_EXT4_FS=y |
| @@ -690,6 +692,7 @@ CONFIG_ENCRYPTED_KEYS=m · 89 unmodified lines | ||
| 690 | 692 | CONFIG_KEY_NOTIFICATIONS=y |
| 691 | 693 | CONFIG_SECURITY=y |
| 692 | 694 | CONFIG_SECURITY_NETWORK=y |
| 695 | +CONFIG_HARDENED_USERCOPY=y | |
| 693 | 696 | CONFIG_FORTIFY_SOURCE=y |
| 694 | 697 | CONFIG_SECURITY_SELINUX=y |
| 695 | 698 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y |
| @@ -733,6 +736,7 @@ CONFIG_CRYPTO_MD5=y · 37 unmodified lines | ||
| 733 | 736 | CONFIG_CRYPTO_MICHAEL_MIC=m |
| 734 | 737 | CONFIG_CRYPTO_RMD160=m |
| 735 | 738 | CONFIG_CRYPTO_SHA3=m |
| 739 | +CONFIG_CRYPTO_SM3=m | |
| 736 | 740 | CONFIG_CRYPTO_WP512=m |
| 737 | 741 | CONFIG_CRYPTO_AES_TI=m |
| 738 | 742 | CONFIG_CRYPTO_ANUBIS=m |
| @@ -786,7 +790,6 @@ CONFIG_DMA_CMA=y · 47 unmodified lines | ||
| 786 | 790 | CONFIG_CMA_SIZE_MBYTES=0 |
| 787 | 791 | CONFIG_PRINTK_TIME=y |
| 788 | 792 | CONFIG_DYNAMIC_DEBUG=y |
| 789 | −CONFIG_DEBUG_INFO=y | |
| 790 | 793 | CONFIG_DEBUG_INFO_DWARF4=y |
| 791 | 794 | CONFIG_DEBUG_INFO_BTF=y |
| 792 | 795 | CONFIG_GDB_SCRIPTS=y |
| @@ -814,6 +817,7 @@ CONFIG_DEBUG_MEMORY_INIT=y · 21 unmodified lines | ||
| 814 | 817 | CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m |
| 815 | 818 | CONFIG_DEBUG_PER_CPU_MAPS=y |
| 816 | 819 | CONFIG_KFENCE=y |
| 820 | +CONFIG_KFENCE_DEFERRABLE=y | |
| 817 | 821 | CONFIG_KFENCE_STATIC_KEYS=y |
| 818 | 822 | CONFIG_DEBUG_SHIRQ=y |
| 819 | 823 | CONFIG_PANIC_ON_OOPS=y |
| @@ -490,11 +490,13 @@ CONFIG_NLMON=m · 489 unmodified lines | ||
| 490 | 490 | # CONFIG_NET_VENDOR_CHELSIO is not set |
| 491 | 491 | # CONFIG_NET_VENDOR_CISCO is not set |
| 492 | 492 | # CONFIG_NET_VENDOR_CORTINA is not set |
| 493 | +# CONFIG_NET_VENDOR_DAVICOM is not set | |
| 493 | 494 | # CONFIG_NET_VENDOR_DEC is not set |
| 494 | 495 | # CONFIG_NET_VENDOR_DLINK is not set |
| 495 | 496 | # CONFIG_NET_VENDOR_EMULEX is not set |
| 496 | 497 | # CONFIG_NET_VENDOR_ENGLEDER is not set |
| 497 | 498 | # CONFIG_NET_VENDOR_EZCHIP is not set |
| 499 | +# CONFIG_NET_VENDOR_FUNGIBLE is not set | |
| 498 | 500 | # CONFIG_NET_VENDOR_GOOGLE is not set |
| 499 | 501 | # CONFIG_NET_VENDOR_HUAWEI is not set |
| 500 | 502 | # CONFIG_NET_VENDOR_INTEL is not set |
| @@ -578,13 +580,13 @@ CONFIG_MLX5_INFINIBAND=m · 77 unmodified lines | ||
| 578 | 580 | CONFIG_SYNC_FILE=y |
| 579 | 581 | CONFIG_VFIO=m |
| 580 | 582 | CONFIG_VFIO_PCI=m |
| 583 | +CONFIG_MLX5_VFIO_PCI=m | |
| 581 | 584 | CONFIG_VFIO_MDEV=m |
| 582 | 585 | CONFIG_VIRTIO_PCI=m |
| 583 | 586 | CONFIG_VIRTIO_BALLOON=m |
| 584 | 587 | CONFIG_VIRTIO_INPUT=y |
| 585 | 588 | CONFIG_VHOST_NET=m |
| 586 | 589 | CONFIG_VHOST_VSOCK=m |
| 587 | −# CONFIG_SURFACE_PLATFORMS is not set | |
| 588 | 590 | CONFIG_S390_CCW_IOMMU=y |
| 589 | 591 | CONFIG_S390_AP_IOMMU=y |
| 590 | 592 | CONFIG_EXT4_FS=y |
| @@ -720,6 +722,7 @@ CONFIG_CRYPTO_MD5=y · 129 unmodified lines | ||
| 720 | 722 | CONFIG_CRYPTO_MICHAEL_MIC=m |
| 721 | 723 | CONFIG_CRYPTO_RMD160=m |
| 722 | 724 | CONFIG_CRYPTO_SHA3=m |
| 725 | +CONFIG_CRYPTO_SM3=m | |
| 723 | 726 | CONFIG_CRYPTO_WP512=m |
| 724 | 727 | CONFIG_CRYPTO_AES_TI=m |
| 725 | 728 | CONFIG_CRYPTO_ANUBIS=m |
| @@ -772,7 +775,6 @@ CONFIG_DMA_CMA=y · 46 unmodified lines | ||
| 772 | 775 | CONFIG_CMA_SIZE_MBYTES=0 |
| 773 | 776 | CONFIG_PRINTK_TIME=y |
| 774 | 777 | CONFIG_DYNAMIC_DEBUG=y |
| 775 | −CONFIG_DEBUG_INFO=y | |
| 776 | 778 | CONFIG_DEBUG_INFO_DWARF4=y |
| 777 | 779 | CONFIG_DEBUG_INFO_BTF=y |
| 778 | 780 | CONFIG_GDB_SCRIPTS=y |
| @@ -26,6 +26,7 @@ CONFIG_CRASH_DUMP=y · 25 unmodified lines | ||
| 26 | 26 | # CONFIG_S390_GUEST is not set |
| 27 | 27 | # CONFIG_SECCOMP is not set |
| 28 | 28 | # CONFIG_GCC_PLUGINS is not set |
| 29 | +# CONFIG_BLOCK_LEGACY_AUTOLOAD is not set | |
| 29 | 30 | CONFIG_PARTITION_ADVANCED=y |
| 30 | 31 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set |
| 31 | 32 | # CONFIG_COMPACTION is not set |
| @@ -60,7 +61,6 @@ CONFIG_ZFCP=y · 28 unmodified lines | ||
| 60 | 61 | # CONFIG_HID is not set |
| 61 | 62 | # CONFIG_VIRTIO_MENU is not set |
| 62 | 63 | # CONFIG_VHOST_MENU is not set |
| 63 | −# CONFIG_SURFACE_PLATFORMS is not set | |
| 64 | 64 | # CONFIG_IOMMU_SUPPORT is not set |
| 65 | 65 | # CONFIG_DNOTIFY is not set |
| 66 | 66 | # CONFIG_INOTIFY_USER is not set |
| @@ -71,10 +71,10 @@ CONFIG_LSM="yama,loadpin,safesetid,integrity" · 4 unmodified lines | ||
| 71 | 71 | CONFIG_XZ_DEC_MICROLZMA=y |
| 72 | 72 | CONFIG_PRINTK_TIME=y |
| 73 | 73 | # CONFIG_SYMBOLIC_ERRNAME is not set |
| 74 | −CONFIG_DEBUG_INFO=y | |
| 74 | +CONFIG_DEBUG_KERNEL=y | |
| 75 | +CONFIG_DEBUG_INFO_DWARF4=y | |
| 75 | 76 | CONFIG_DEBUG_INFO_BTF=y |
| 76 | 77 | CONFIG_DEBUG_FS=y |
| 77 | −CONFIG_DEBUG_KERNEL=y | |
| 78 | 78 | CONFIG_PANIC_ON_OOPS=y |
| 79 | 79 | # CONFIG_SCHED_DEBUG is not set |
| 80 | 80 | CONFIG_RCU_CPU_STALL_TIMEOUT=60 |
| @@ -58,7 +58,7 @@ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs, · 57 unmodified lines | ||
| 58 | 58 | |
| 59 | 59 | static inline bool on_thread_stack(void) |
| 60 | 60 | { |
| 61 | − return !(((unsigned long)(current->stack) ^ current_stack_pointer()) & ~(THREAD_SIZE - 1)); | |
| 61 | + return !(((unsigned long)(current->stack) ^ current_stack_pointer) & ~(THREAD_SIZE - 1)); | |
| 62 | 62 | } |
| 63 | 63 | |
| 64 | 64 | #endif |
| @@ -200,13 +200,7 @@ unsigned long __get_wchan(struct task_struct *p); · 199 unmodified lines | ||
| 200 | 200 | /* Has task runtime instrumentation enabled ? */ |
| 201 | 201 | #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb) |
| 202 | 202 | |
| 203 | −static __always_inline unsigned long current_stack_pointer(void) | |
| 204 | −{ | |
| 205 | − unsigned long sp; | |
| 206 | − | |
| 207 | − asm volatile("la %0,0(15)" : "=a" (sp)); | |
| 208 | − return sp; | |
| 209 | −} | |
| 203 | +register unsigned long current_stack_pointer asm("r15"); | |
| 210 | 204 | |
| 211 | 205 | static __always_inline unsigned short stap(void) |
| 212 | 206 | { |
| @@ -46,7 +46,7 @@ struct stack_frame { · 45 unmodified lines | ||
| 46 | 46 | }; |
| 47 | 47 | |
| 48 | 48 | /* |
| 49 | − * Unlike current_stack_pointer() which simply returns current value of %r15 | |
| 49 | + * Unlike current_stack_pointer which simply contains the current value of %r15 | |
| 50 | 50 | * current_frame_address() returns function stack frame address, which matches |
| 51 | 51 | * %r15 upon function invocation. It may differ from %r15 later if function |
| 52 | 52 | * allocates stack for local variables or new stack frame to call other |
| @@ -54,7 +54,7 @@ static void __do_machine_kdump(void *image) · 53 unmodified lines | ||
| 54 | 54 | * This need to be done *after* s390_reset_system set the |
| 55 | 55 | * prefix register of this CPU to zero |
| 56 | 56 | */ |
| 57 | − memcpy((void *) __LC_FPREGS_SAVE_AREA, | |
| 57 | + memcpy(absolute_pointer(__LC_FPREGS_SAVE_AREA), | |
| 58 | 58 | (void *)(prefix + __LC_FPREGS_SAVE_AREA), 512); |
| 59 | 59 | |
| 60 | 60 | __load_psw_mask(PSW_MASK_BASE | PSW_DEFAULT_KEY | PSW_MASK_EA | PSW_MASK_BA); |
| @@ -283,6 +283,10 @@ static int __init setup_elf_platform(void) · 282 unmodified lines | ||
| 283 | 283 | case 0x8562: |
| 284 | 284 | strcpy(elf_platform, "z15"); |
| 285 | 285 | break; |
| 286 | + case 0x3931: | |
| 287 | + case 0x3932: | |
| 288 | + strcpy(elf_platform, "z16"); | |
| 289 | + break; | |
| 286 | 290 | } |
| 287 | 291 | return 0; |
| 288 | 292 | } |
| @@ -1334,11 +1334,11 @@ int kvm_s390_handle_wait(struct kvm_vcpu *vcpu) · 1333 unmodified lines | ||
| 1334 | 1334 | hrtimer_start(&vcpu->arch.ckc_timer, sltime, HRTIMER_MODE_REL); |
| 1335 | 1335 | VCPU_EVENT(vcpu, 4, "enabled wait: %llu ns", sltime); |
| 1336 | 1336 | no_timer: |
| 1337 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 1337 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 1338 | 1338 | kvm_vcpu_halt(vcpu); |
| 1339 | 1339 | vcpu->valid_wakeup = false; |
| 1340 | 1340 | __unset_cpu_idle(vcpu); |
| 1341 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 1341 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 1342 | 1342 | |
| 1343 | 1343 | hrtimer_cancel(&vcpu->arch.ckc_timer); |
| 1344 | 1344 | return 0; |
| @@ -4237,14 +4237,14 @@ static int __vcpu_run(struct kvm_vcpu *vcpu) · 4236 unmodified lines | ||
| 4237 | 4237 | * We try to hold kvm->srcu during most of vcpu_run (except when run- |
| 4238 | 4238 | * ning the guest), so that memslots (and other stuff) are protected |
| 4239 | 4239 | */ |
| 4240 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 4240 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 4241 | 4241 | |
| 4242 | 4242 | do { |
| 4243 | 4243 | rc = vcpu_pre_run(vcpu); |
| 4244 | 4244 | if (rc) |
| 4245 | 4245 | break; |
| 4246 | 4246 | |
| 4247 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 4247 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 4248 | 4248 | /* |
| 4249 | 4249 | * As PF_VCPU will be used in fault handler, between |
| 4250 | 4250 | * guest_enter and guest_exit should be no uaccess. |
| @@ -4281,12 +4281,12 @@ static int __vcpu_run(struct kvm_vcpu *vcpu) · 30 unmodified lines | ||
| 4281 | 4281 | __enable_cpu_timer_accounting(vcpu); |
| 4282 | 4282 | guest_exit_irqoff(); |
| 4283 | 4283 | local_irq_enable(); |
| 4284 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 4284 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 4285 | 4285 | |
| 4286 | 4286 | rc = vcpu_post_run(vcpu, exit_reason); |
| 4287 | 4287 | } while (!signal_pending(current) && !guestdbg_exit_pending(vcpu) && !rc); |
| 4288 | 4288 | |
| 4289 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 4289 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 4290 | 4290 | return rc; |
| 4291 | 4291 | } |
| 4292 | 4292 | |
| @@ -137,12 +137,7 @@ static int kvm_s390_pv_alloc_vm(struct kvm *kvm) · 136 unmodified lines | ||
| 137 | 137 | /* Allocate variable storage */ |
| 138 | 138 | vlen = ALIGN(virt * ((npages * PAGE_SIZE) / HPAGE_SIZE), PAGE_SIZE); |
| 139 | 139 | vlen += uv_info.guest_virt_base_stor_len; |
| 140 | − /* | |
| 141 | − * The Create Secure Configuration Ultravisor Call does not support | |
| 142 | − * using large pages for the virtual memory area. | |
| 143 | − * This is a hardware limitation. | |
| 144 | − */ | |
| 145 | − kvm->arch.pv.stor_var = vmalloc_no_huge(vlen); | |
| 140 | + kvm->arch.pv.stor_var = vzalloc(vlen); | |
| 146 | 141 | if (!kvm->arch.pv.stor_var) |
| 147 | 142 | goto out_err; |
| 148 | 143 | return 0; |
| @@ -1091,7 +1091,7 @@ static int do_vsie_run(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page) · 1090 unmodified lines | ||
| 1091 | 1091 | |
| 1092 | 1092 | handle_last_fault(vcpu, vsie_page); |
| 1093 | 1093 | |
| 1094 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 1094 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 1095 | 1095 | |
| 1096 | 1096 | /* save current guest state of bp isolation override */ |
| 1097 | 1097 | guest_bp_isolation = test_thread_flag(TIF_ISOLATE_BP_GUEST); |
| @@ -1133,7 +1133,7 @@ static int do_vsie_run(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page) · 35 unmodified lines | ||
| 1133 | 1133 | if (!guest_bp_isolation) |
| 1134 | 1134 | clear_thread_flag(TIF_ISOLATE_BP_GUEST); |
| 1135 | 1135 | |
| 1136 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 1136 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 1137 | 1137 | |
| 1138 | 1138 | if (rc == -EINTR) { |
| 1139 | 1139 | VCPU_EVENT(vcpu, 3, "%s", "machine check"); |
| @@ -147,7 +147,7 @@ static __always_inline struct pt_regs fake_pt_regs(void) · 146 unmodified lines | ||
| 147 | 147 | struct pt_regs regs; |
| 148 | 148 | |
| 149 | 149 | memset(®s, 0, sizeof(regs)); |
| 150 | − regs.gprs[15] = current_stack_pointer(); | |
| 150 | + regs.gprs[15] = current_stack_pointer; | |
| 151 | 151 | |
| 152 | 152 | asm volatile( |
| 153 | 153 | "basr %[psw_addr],0\n" |
| @@ -35,6 +35,7 @@ · 34 unmodified lines | ||
| 35 | 35 | #define flush_page_for_dma(addr) \ |
| 36 | 36 | sparc32_cachetlb_ops->page_for_dma(addr) |
| 37 | 37 | |
| 38 | +struct page; | |
| 38 | 39 | void sparc_flush_page_to_ram(struct page *page); |
| 39 | 40 | |
| 40 | 41 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 |
| @@ -1866,7 +1866,7 @@ config X86_KERNEL_IBT · 1865 unmodified lines | ||
| 1866 | 1866 | code with them to make this happen. |
| 1867 | 1867 | |
| 1868 | 1868 | In addition to building the kernel with IBT, seal all functions that |
| 1869 | − are not indirect call targets, avoiding them ever becomming one. | |
| 1869 | + are not indirect call targets, avoiding them ever becoming one. | |
| 1870 | 1870 | |
| 1871 | 1871 | This requires LTO like objtool runs and will slow down the build. It |
| 1872 | 1872 | does significantly reduce the number of ENDBR instructions in the |
| @@ -337,6 +337,9 @@ SYM_CODE_END(ret_from_fork) · 336 unmodified lines | ||
| 337 | 337 | |
| 338 | 338 | call \cfunc |
| 339 | 339 | |
| 340 | + /* For some configurations \cfunc ends up being a noreturn. */ | |
| 341 | + REACHABLE | |
| 342 | + | |
| 340 | 343 | jmp error_return |
| 341 | 344 | .endm |
| 342 | 345 | |
| @@ -51,7 +51,7 @@ · 50 unmodified lines | ||
| 51 | 51 | * perf code: 0x02 |
| 52 | 52 | * Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW, |
| 53 | 53 | * SKL,KNL,GLM,CNL,KBL,CML,ICL,ICX, |
| 54 | − * TGL,TNT,RKL,ADL,RPL | |
| 54 | + * TGL,TNT,RKL,ADL,RPL,SPR | |
| 55 | 55 | * Scope: Core |
| 56 | 56 | * MSR_CORE_C7_RESIDENCY: CORE C7 Residency Counter |
| 57 | 57 | * perf code: 0x03 |
| @@ -62,7 +62,7 @@ · 4 unmodified lines | ||
| 62 | 62 | * perf code: 0x00 |
| 63 | 63 | * Available model: SNB,IVB,HSW,BDW,SKL,KNL,GLM,CNL, |
| 64 | 64 | * KBL,CML,ICL,ICX,TGL,TNT,RKL,ADL, |
| 65 | − * RPL | |
| 65 | + * RPL,SPR | |
| 66 | 66 | * Scope: Package (physical package) |
| 67 | 67 | * MSR_PKG_C3_RESIDENCY: Package C3 Residency Counter. |
| 68 | 68 | * perf code: 0x01 |
| @@ -74,7 +74,7 @@ · 5 unmodified lines | ||
| 74 | 74 | * perf code: 0x02 |
| 75 | 75 | * Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW, |
| 76 | 76 | * SKL,KNL,GLM,CNL,KBL,CML,ICL,ICX, |
| 77 | − * TGL,TNT,RKL,ADL,RPL | |
| 77 | + * TGL,TNT,RKL,ADL,RPL,SPR | |
| 78 | 78 | * Scope: Package (physical package) |
| 79 | 79 | * MSR_PKG_C7_RESIDENCY: Package C7 Residency Counter. |
| 80 | 80 | * perf code: 0x03 |
| @@ -675,6 +675,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { · 594 unmodified lines | ||
| 675 | 675 | X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates), |
| 676 | 676 | X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_cstates), |
| 677 | 677 | X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_cstates), |
| 678 | + X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &icx_cstates), | |
| 678 | 679 | |
| 679 | 680 | X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &icl_cstates), |
| 680 | 681 | X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &icl_cstates), |
| @@ -28,15 +28,13 @@ typedef u16 compat_ipc_pid_t; · 27 unmodified lines | ||
| 28 | 28 | typedef __kernel_fsid_t compat_fsid_t; |
| 29 | 29 | |
| 30 | 30 | struct compat_stat { |
| 31 | − compat_dev_t st_dev; | |
| 32 | − u16 __pad1; | |
| 31 | + u32 st_dev; | |
| 33 | 32 | compat_ino_t st_ino; |
| 34 | 33 | compat_mode_t st_mode; |
| 35 | 34 | compat_nlink_t st_nlink; |
| 36 | 35 | __compat_uid_t st_uid; |
| 37 | 36 | __compat_gid_t st_gid; |
| 38 | − compat_dev_t st_rdev; | |
| 39 | − u16 __pad2; | |
| 37 | + u32 st_rdev; | |
| 40 | 38 | u32 st_size; |
| 41 | 39 | u32 st_blksize; |
| 42 | 40 | u32 st_blocks; |
| @@ -26,6 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | * _G - parts with extra graphics on |
| 27 | 27 | * _X - regular server parts |
| 28 | 28 | * _D - micro server parts |
| 29 | + * _N,_P - other mobile parts | |
| 29 | 30 | * |
| 30 | 31 | * Historical OPTDIFFs: |
| 31 | 32 | * |
| @@ -107,8 +108,10 @@ · 75 unmodified lines | ||
| 107 | 108 | |
| 108 | 109 | #define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */ |
| 109 | 110 | #define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */ |
| 111 | +#define INTEL_FAM6_ALDERLAKE_N 0xBE | |
| 110 | 112 | |
| 111 | 113 | #define INTEL_FAM6_RAPTORLAKE 0xB7 |
| 114 | +#define INTEL_FAM6_RAPTORLAKE_P 0xBA | |
| 112 | 115 | |
| 113 | 116 | /* "Small Core" Processors (Atom) */ |
| 114 | 117 | |
| @@ -210,8 +210,6 @@ void __iomem *ioremap(resource_size_t offset, unsigned long size); · 209 unmodified lines | ||
| 210 | 210 | extern void iounmap(volatile void __iomem *addr); |
| 211 | 211 | #define iounmap iounmap |
| 212 | 212 | |
| 213 | −extern void set_iounmap_nonlazy(void); | |
| 214 | − | |
| 215 | 213 | #ifdef __KERNEL__ |
| 216 | 214 | |
| 217 | 215 | void memcpy_fromio(void *, const volatile void __iomem *, size_t); |
| @@ -118,6 +118,7 @@ KVM_X86_OP_OPTIONAL(mem_enc_register_region) · 117 unmodified lines | ||
| 118 | 118 | KVM_X86_OP_OPTIONAL(mem_enc_unregister_region) |
| 119 | 119 | KVM_X86_OP_OPTIONAL(vm_copy_enc_context_from) |
| 120 | 120 | KVM_X86_OP_OPTIONAL(vm_move_enc_context_from) |
| 121 | +KVM_X86_OP_OPTIONAL(guest_memory_reclaimed) | |
| 121 | 122 | KVM_X86_OP(get_msr_feature) |
| 122 | 123 | KVM_X86_OP(can_emulate_instruction) |
| 123 | 124 | KVM_X86_OP(apic_init_signal_blocked) |
| @@ -974,12 +974,10 @@ enum hv_tsc_page_status { · 973 unmodified lines | ||
| 974 | 974 | HV_TSC_PAGE_UNSET = 0, |
| 975 | 975 | /* TSC page MSR was written by the guest, update pending */ |
| 976 | 976 | HV_TSC_PAGE_GUEST_CHANGED, |
| 977 | − /* TSC page MSR was written by KVM userspace, update pending */ | |
| 977 | + /* TSC page update was triggered from the host side */ | |
| 978 | 978 | HV_TSC_PAGE_HOST_CHANGED, |
| 979 | 979 | /* TSC page was properly set up and is currently active */ |
| 980 | 980 | HV_TSC_PAGE_SET, |
| 981 | − /* TSC page is currently being updated and therefore is inactive */ | |
| 982 | − HV_TSC_PAGE_UPDATING, | |
| 983 | 981 | /* TSC page was set up with an inaccessible GPA */ |
| 984 | 982 | HV_TSC_PAGE_BROKEN, |
| 985 | 983 | }; |
| @@ -1052,6 +1050,7 @@ enum kvm_apicv_inhibit { · 66 unmodified lines | ||
| 1052 | 1050 | APICV_INHIBIT_REASON_X2APIC, |
| 1053 | 1051 | APICV_INHIBIT_REASON_BLOCKIRQ, |
| 1054 | 1052 | APICV_INHIBIT_REASON_ABSENT, |
| 1053 | + APICV_INHIBIT_REASON_SEV, | |
| 1055 | 1054 | }; |
| 1056 | 1055 | |
| 1057 | 1056 | struct kvm_arch { |
| @@ -1485,6 +1484,7 @@ struct kvm_x86_ops { · 427 unmodified lines | ||
| 1485 | 1484 | int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp); |
| 1486 | 1485 | int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); |
| 1487 | 1486 | int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd); |
| 1487 | + void (*guest_memory_reclaimed)(struct kvm *kvm); | |
| 1488 | 1488 | |
| 1489 | 1489 | int (*get_msr_feature)(struct kvm_msr_entry *entry); |
| 1490 | 1490 | |
| @@ -1585,8 +1585,9 @@ static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) · 94 unmodified lines | ||
| 1585 | 1585 | #define kvm_arch_pmi_in_guest(vcpu) \ |
| 1586 | 1586 | ((vcpu) && (vcpu)->arch.handling_intr_from_guest) |
| 1587 | 1587 | |
| 1588 | −int kvm_mmu_module_init(void); | |
| 1589 | −void kvm_mmu_module_exit(void); | |
| 1588 | +void kvm_mmu_x86_module_init(void); | |
| 1589 | +int kvm_mmu_vendor_module_init(void); | |
| 1590 | +void kvm_mmu_vendor_module_exit(void); | |
| 1590 | 1591 | |
| 1591 | 1592 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); |
| 1592 | 1593 | int kvm_mmu_create(struct kvm_vcpu *vcpu); |
| @@ -131,10 +131,12 @@ extern void __init load_ucode_bsp(void); · 130 unmodified lines | ||
| 131 | 131 | extern void load_ucode_ap(void); |
| 132 | 132 | void reload_early_microcode(void); |
| 133 | 133 | extern bool initrd_gone; |
| 134 | +void microcode_bsp_resume(void); | |
| 134 | 135 | #else |
| 135 | 136 | static inline void __init load_ucode_bsp(void) { } |
| 136 | 137 | static inline void load_ucode_ap(void) { } |
| 137 | 138 | static inline void reload_early_microcode(void) { } |
| 139 | +static inline void microcode_bsp_resume(void) { } | |
| 138 | 140 | #endif |
| 139 | 141 | |
| 140 | 142 | #endif /* _ASM_X86_MICROCODE_H */ |
| @@ -128,9 +128,9 @@ · 127 unmodified lines | ||
| 128 | 128 | #define TSX_CTRL_RTM_DISABLE BIT(0) /* Disable RTM feature */ |
| 129 | 129 | #define TSX_CTRL_CPUID_CLEAR BIT(1) /* Disable TSX enumeration */ |
| 130 | 130 | |
| 131 | −/* SRBDS support */ | |
| 132 | 131 | #define MSR_IA32_MCU_OPT_CTRL 0x00000123 |
| 133 | −#define RNGDS_MITG_DIS BIT(0) | |
| 132 | +#define RNGDS_MITG_DIS BIT(0) /* SRBDS support */ | |
| 133 | +#define RTM_ALLOW BIT(1) /* TSX development mode */ | |
| 134 | 134 | |
| 135 | 135 | #define MSR_IA32_SYSENTER_CS 0x00000174 |
| 136 | 136 | #define MSR_IA32_SYSENTER_ESP 0x00000175 |
| @@ -559,10 +559,6 @@ static inline void update_page_count(int level, unsigned long pages) { } · 558 unmodified lines | ||
| 559 | 559 | extern pte_t *lookup_address(unsigned long address, unsigned int *level); |
| 560 | 560 | extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, |
| 561 | 561 | unsigned int *level); |
| 562 | − | |
| 563 | −struct mm_struct; | |
| 564 | −extern pte_t *lookup_address_in_mm(struct mm_struct *mm, unsigned long address, | |
| 565 | − unsigned int *level); | |
| 566 | 562 | extern pmd_t *lookup_pmd_address(unsigned long address); |
| 567 | 563 | extern phys_addr_t slow_virt_to_phys(void *__address); |
| 568 | 564 | extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, |
| @@ -26,6 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | ".align 4 \n" \ |
| 27 | 27 | ".globl " STATIC_CALL_TRAMP_STR(name) " \n" \ |
| 28 | 28 | STATIC_CALL_TRAMP_STR(name) ": \n" \ |
| 29 | + ANNOTATE_NOENDBR \ | |
| 29 | 30 | insns " \n" \ |
| 30 | 31 | ".byte 0x53, 0x43, 0x54 \n" \ |
| 31 | 32 | ".type " STATIC_CALL_TRAMP_STR(name) ", @function \n" \ |
| @@ -1855,6 +1855,8 @@ void identify_secondary_cpu(struct cpuinfo_x86 *c) · 1854 unmodified lines | ||
| 1855 | 1855 | validate_apic_and_package_id(c); |
| 1856 | 1856 | x86_spec_ctrl_setup_ap(); |
| 1857 | 1857 | update_srbds_msr(); |
| 1858 | + | |
| 1859 | + tsx_ap_init(); | |
| 1858 | 1860 | } |
| 1859 | 1861 | |
| 1860 | 1862 | static __init int setup_noclflush(char *arg) |
| @@ -55,11 +55,10 @@ enum tsx_ctrl_states { · 54 unmodified lines | ||
| 55 | 55 | extern __ro_after_init enum tsx_ctrl_states tsx_ctrl_state; |
| 56 | 56 | |
| 57 | 57 | extern void __init tsx_init(void); |
| 58 | −extern void tsx_enable(void); | |
| 59 | −extern void tsx_disable(void); | |
| 60 | −extern void tsx_clear_cpuid(void); | |
| 58 | +void tsx_ap_init(void); | |
| 61 | 59 | #else |
| 62 | 60 | static inline void tsx_init(void) { } |
| 61 | +static inline void tsx_ap_init(void) { } | |
| 63 | 62 | #endif /* CONFIG_CPU_SUP_INTEL */ |
| 64 | 63 | |
| 65 | 64 | extern void get_cpu_cap(struct cpuinfo_x86 *c); |
| @@ -717,13 +717,6 @@ static void init_intel(struct cpuinfo_x86 *c) · 716 unmodified lines | ||
| 717 | 717 | |
| 718 | 718 | init_intel_misc_features(c); |
| 719 | 719 | |
| 720 | − if (tsx_ctrl_state == TSX_CTRL_ENABLE) | |
| 721 | − tsx_enable(); | |
| 722 | − else if (tsx_ctrl_state == TSX_CTRL_DISABLE) | |
| 723 | − tsx_disable(); | |
| 724 | − else if (tsx_ctrl_state == TSX_CTRL_RTM_ALWAYS_ABORT) | |
| 725 | − tsx_clear_cpuid(); | |
| 726 | − | |
| 727 | 720 | split_lock_init(); |
| 728 | 721 | bus_lock_init(); |
| 729 | 722 | |
| @@ -758,9 +758,9 @@ static struct subsys_interface mc_cpu_interface = { · 757 unmodified lines | ||
| 758 | 758 | }; |
| 759 | 759 | |
| 760 | 760 | /** |
| 761 | − * mc_bp_resume - Update boot CPU microcode during resume. | |
| 761 | + * microcode_bsp_resume - Update boot CPU microcode during resume. | |
| 762 | 762 | */ |
| 763 | −static void mc_bp_resume(void) | |
| 763 | +void microcode_bsp_resume(void) | |
| 764 | 764 | { |
| 765 | 765 | int cpu = smp_processor_id(); |
| 766 | 766 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
| @@ -772,7 +772,7 @@ static void mc_bp_resume(void) · 5 unmodified lines | ||
| 772 | 772 | } |
| 773 | 773 | |
| 774 | 774 | static struct syscore_ops mc_syscore_ops = { |
| 775 | − .resume = mc_bp_resume, | |
| 775 | + .resume = microcode_bsp_resume, | |
| 776 | 776 | }; |
| 777 | 777 | |
| 778 | 778 | static int mc_cpu_starting(unsigned int cpu) |
| @@ -19,7 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | |
| 20 | 20 | enum tsx_ctrl_states tsx_ctrl_state __ro_after_init = TSX_CTRL_NOT_SUPPORTED; |
| 21 | 21 | |
| 22 | −void tsx_disable(void) | |
| 22 | +static void tsx_disable(void) | |
| 23 | 23 | { |
| 24 | 24 | u64 tsx; |
| 25 | 25 | |
| @@ -39,7 +39,7 @@ void tsx_disable(void) · 13 unmodified lines | ||
| 39 | 39 | wrmsrl(MSR_IA32_TSX_CTRL, tsx); |
| 40 | 40 | } |
| 41 | 41 | |
| 42 | −void tsx_enable(void) | |
| 42 | +static void tsx_enable(void) | |
| 43 | 43 | { |
| 44 | 44 | u64 tsx; |
| 45 | 45 | |
| @@ -58,7 +58,7 @@ void tsx_enable(void) · 12 unmodified lines | ||
| 58 | 58 | wrmsrl(MSR_IA32_TSX_CTRL, tsx); |
| 59 | 59 | } |
| 60 | 60 | |
| 61 | −static bool __init tsx_ctrl_is_supported(void) | |
| 61 | +static bool tsx_ctrl_is_supported(void) | |
| 62 | 62 | { |
| 63 | 63 | u64 ia32_cap = x86_read_arch_cap_msr(); |
| 64 | 64 | |
| @@ -84,7 +84,45 @@ static enum tsx_ctrl_states x86_get_tsx_auto_mode(void) · 19 unmodified lines | ||
| 84 | 84 | return TSX_CTRL_ENABLE; |
| 85 | 85 | } |
| 86 | 86 | |
| 87 | −void tsx_clear_cpuid(void) | |
| 87 | +/* | |
| 88 | + * Disabling TSX is not a trivial business. | |
| 89 | + * | |
| 90 | + * First of all, there's a CPUID bit: X86_FEATURE_RTM_ALWAYS_ABORT | |
| 91 | + * which says that TSX is practically disabled (all transactions are | |
| 92 | + * aborted by default). When that bit is set, the kernel unconditionally | |
| 93 | + * disables TSX. | |
| 94 | + * | |
| 95 | + * In order to do that, however, it needs to dance a bit: | |
| 96 | + * | |
| 97 | + * 1. The first method to disable it is through MSR_TSX_FORCE_ABORT and | |
| 98 | + * the MSR is present only when *two* CPUID bits are set: | |
| 99 | + * | |
| 100 | + * - X86_FEATURE_RTM_ALWAYS_ABORT | |
| 101 | + * - X86_FEATURE_TSX_FORCE_ABORT | |
| 102 | + * | |
| 103 | + * 2. The second method is for CPUs which do not have the above-mentioned | |
| 104 | + * MSR: those use a different MSR - MSR_IA32_TSX_CTRL and disable TSX | |
| 105 | + * through that one. Those CPUs can also have the initially mentioned | |
| 106 | + * CPUID bit X86_FEATURE_RTM_ALWAYS_ABORT set and for those the same strategy | |
| 107 | + * applies: TSX gets disabled unconditionally. | |
| 108 | + * | |
| 109 | + * When either of the two methods are present, the kernel disables TSX and | |
| 110 | + * clears the respective RTM and HLE feature flags. | |
| 111 | + * | |
| 112 | + * An additional twist in the whole thing presents late microcode loading | |
| 113 | + * which, when done, may cause for the X86_FEATURE_RTM_ALWAYS_ABORT CPUID | |
| 114 | + * bit to be set after the update. | |
| 115 | + * | |
| 116 | + * A subsequent hotplug operation on any logical CPU except the BSP will | |
| 117 | + * cause for the supported CPUID feature bits to get re-detected and, if | |
| 118 | + * RTM and HLE get cleared all of a sudden, but, userspace did consult | |
| 119 | + * them before the update, then funny explosions will happen. Long story | |
| 120 | + * short: the kernel doesn't modify CPUID feature bits after booting. | |
| 121 | + * | |
| 122 | + * That's why, this function's call in init_intel() doesn't clear the | |
| 123 | + * feature flags. | |
| 124 | + */ | |
| 125 | +static void tsx_clear_cpuid(void) | |
| 88 | 126 | { |
| 89 | 127 | u64 msr; |
| 90 | 128 | |
| @@ -97,6 +135,39 @@ void tsx_clear_cpuid(void) · 6 unmodified lines | ||
| 97 | 135 | rdmsrl(MSR_TSX_FORCE_ABORT, msr); |
| 98 | 136 | msr |= MSR_TFA_TSX_CPUID_CLEAR; |
| 99 | 137 | wrmsrl(MSR_TSX_FORCE_ABORT, msr); |
| 138 | + } else if (tsx_ctrl_is_supported()) { | |
| 139 | + rdmsrl(MSR_IA32_TSX_CTRL, msr); | |
| 140 | + msr |= TSX_CTRL_CPUID_CLEAR; | |
| 141 | + wrmsrl(MSR_IA32_TSX_CTRL, msr); | |
| 142 | + } | |
| 143 | +} | |
| 144 | + | |
| 145 | +/* | |
| 146 | + * Disable TSX development mode | |
| 147 | + * | |
| 148 | + * When the microcode released in Feb 2022 is applied, TSX will be disabled by | |
| 149 | + * default on some processors. MSR 0x122 (TSX_CTRL) and MSR 0x123 | |
| 150 | + * (IA32_MCU_OPT_CTRL) can be used to re-enable TSX for development, doing so is | |
| 151 | + * not recommended for production deployments. In particular, applying MD_CLEAR | |
| 152 | + * flows for mitigation of the Intel TSX Asynchronous Abort (TAA) transient | |
| 153 | + * execution attack may not be effective on these processors when Intel TSX is | |
| 154 | + * enabled with updated microcode. | |
| 155 | + */ | |
| 156 | +static void tsx_dev_mode_disable(void) | |
| 157 | +{ | |
| 158 | + u64 mcu_opt_ctrl; | |
| 159 | + | |
| 160 | + /* Check if RTM_ALLOW exists */ | |
| 161 | + if (!boot_cpu_has_bug(X86_BUG_TAA) || !tsx_ctrl_is_supported() || | |
| 162 | + !cpu_feature_enabled(X86_FEATURE_SRBDS_CTRL)) | |
| 163 | + return; | |
| 164 | + | |
| 165 | + rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_opt_ctrl); | |
| 166 | + | |
| 167 | + if (mcu_opt_ctrl & RTM_ALLOW) { | |
| 168 | + mcu_opt_ctrl &= ~RTM_ALLOW; | |
| 169 | + wrmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_opt_ctrl); | |
| 170 | + setup_force_cpu_cap(X86_FEATURE_RTM_ALWAYS_ABORT); | |
| 100 | 171 | } |
| 101 | 172 | } |
| 102 | 173 | |
| @@ -105,14 +176,14 @@ void __init tsx_init(void) · 2 unmodified lines | ||
| 105 | 176 | char arg[5] = {}; |
| 106 | 177 | int ret; |
| 107 | 178 | |
| 179 | + tsx_dev_mode_disable(); | |
| 180 | + | |
| 108 | 181 | /* |
| 109 | − * Hardware will always abort a TSX transaction if both CPUID bits | |
| 110 | − * RTM_ALWAYS_ABORT and TSX_FORCE_ABORT are set. In this case, it is | |
| 111 | − * better not to enumerate CPUID.RTM and CPUID.HLE bits. Clear them | |
| 112 | − * here. | |
| 182 | + * Hardware will always abort a TSX transaction when the CPUID bit | |
| 183 | + * RTM_ALWAYS_ABORT is set. In this case, it is better not to enumerate | |
| 184 | + * CPUID.RTM and CPUID.HLE bits. Clear them here. | |
| 113 | 185 | */ |
| 114 | − if (boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) && | |
| 115 | − boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) { | |
| 186 | + if (boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT)) { | |
| 116 | 187 | tsx_ctrl_state = TSX_CTRL_RTM_ALWAYS_ABORT; |
| 117 | 188 | tsx_clear_cpuid(); |
| 118 | 189 | setup_clear_cpu_cap(X86_FEATURE_RTM); |
| @@ -175,3 +246,16 @@ void __init tsx_init(void) · 56 unmodified lines | ||
| 175 | 246 | setup_force_cpu_cap(X86_FEATURE_HLE); |
| 176 | 247 | } |
| 177 | 248 | } |
| 249 | + | |
| 250 | +void tsx_ap_init(void) | |
| 251 | +{ | |
| 252 | + tsx_dev_mode_disable(); | |
| 253 | + | |
| 254 | + if (tsx_ctrl_state == TSX_CTRL_ENABLE) | |
| 255 | + tsx_enable(); | |
| 256 | + else if (tsx_ctrl_state == TSX_CTRL_DISABLE) | |
| 257 | + tsx_disable(); | |
| 258 | + else if (tsx_ctrl_state == TSX_CTRL_RTM_ALWAYS_ABORT) | |
| 259 | + /* See comment over that function for more details. */ | |
| 260 | + tsx_clear_cpuid(); | |
| 261 | +} | |
| @@ -37,7 +37,6 @@ static ssize_t __copy_oldmem_page(unsigned long pfn, char *buf, size_t csize, · 36 unmodified lines | ||
| 37 | 37 | } else |
| 38 | 38 | memcpy(buf, vaddr + offset, csize); |
| 39 | 39 | |
| 40 | − set_iounmap_nonlazy(); | |
| 41 | 40 | iounmap((void __iomem *)vaddr); |
| 42 | 41 | return csize; |
| 43 | 42 | } |
| @@ -69,6 +69,7 @@ static DEFINE_PER_CPU_DECRYPTED(struct kvm_vcpu_pv_apf_data, apf_reason) __align · 68 unmodified lines | ||
| 69 | 69 | DEFINE_PER_CPU_DECRYPTED(struct kvm_steal_time, steal_time) __aligned(64) __visible; |
| 70 | 70 | static int has_steal_clock = 0; |
| 71 | 71 | |
| 72 | +static int has_guest_poll = 0; | |
| 72 | 73 | /* |
| 73 | 74 | * No need for any "IO delay" on KVM |
| 74 | 75 | */ |
| @@ -706,14 +707,26 @@ static int kvm_cpu_down_prepare(unsigned int cpu) · 631 unmodified lines | ||
| 706 | 707 | |
| 707 | 708 | static int kvm_suspend(void) |
| 708 | 709 | { |
| 710 | + u64 val = 0; | |
| 711 | + | |
| 709 | 712 | kvm_guest_cpu_offline(false); |
| 710 | 713 | |
| 714 | +#ifdef CONFIG_ARCH_CPUIDLE_HALTPOLL | |
| 715 | + if (kvm_para_has_feature(KVM_FEATURE_POLL_CONTROL)) | |
| 716 | + rdmsrl(MSR_KVM_POLL_CONTROL, val); | |
| 717 | + has_guest_poll = !(val & 1); | |
| 718 | +#endif | |
| 711 | 719 | return 0; |
| 712 | 720 | } |
| 713 | 721 | |
| 714 | 722 | static void kvm_resume(void) |
| 715 | 723 | { |
| 716 | 724 | kvm_cpu_online(raw_smp_processor_id()); |
| 725 | + | |
| 726 | +#ifdef CONFIG_ARCH_CPUIDLE_HALTPOLL | |
| 727 | + if (kvm_para_has_feature(KVM_FEATURE_POLL_CONTROL) && has_guest_poll) | |
| 728 | + wrmsrl(MSR_KVM_POLL_CONTROL, 0); | |
| 729 | +#endif | |
| 717 | 730 | } |
| 718 | 731 | |
| 719 | 732 | static struct syscore_ops kvm_syscore_ops = { |
| @@ -339,11 +339,11 @@ static bool stack_access_ok(struct unwind_state *state, unsigned long _addr, · 338 unmodified lines | ||
| 339 | 339 | struct stack_info *info = &state->stack_info; |
| 340 | 340 | void *addr = (void *)_addr; |
| 341 | 341 | |
| 342 | − if (!on_stack(info, addr, len) && | |
| 343 | − (get_stack_info(addr, state->task, info, &state->stack_mask))) | |
| 344 | − return false; | |
| 342 | + if (on_stack(info, addr, len)) | |
| 343 | + return true; | |
| 345 | 344 | |
| 346 | − return true; | |
| 345 | + return !get_stack_info(addr, state->task, info, &state->stack_mask) && | |
| 346 | + on_stack(info, addr, len); | |
| 347 | 347 | } |
| 348 | 348 | |
| 349 | 349 | static bool deref_stack_reg(struct unwind_state *state, unsigned long addr, |
| @@ -1085,12 +1085,21 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) · 1084 unmodified lines | ||
| 1085 | 1085 | case 0x80000000: |
| 1086 | 1086 | entry->eax = min(entry->eax, 0x80000021); |
| 1087 | 1087 | /* |
| 1088 | − * Serializing LFENCE is reported in a multitude of ways, | |
| 1089 | − * and NullSegClearsBase is not reported in CPUID on Zen2; | |
| 1090 | − * help userspace by providing the CPUID leaf ourselves. | |
| 1088 | + * Serializing LFENCE is reported in a multitude of ways, and | |
| 1089 | + * NullSegClearsBase is not reported in CPUID on Zen2; help | |
| 1090 | + * userspace by providing the CPUID leaf ourselves. | |
| 1091 | + * | |
| 1092 | + * However, only do it if the host has CPUID leaf 0x8000001d. | |
| 1093 | + * QEMU thinks that it can query the host blindly for that | |
| 1094 | + * CPUID leaf if KVM reports that it supports 0x8000001d or | |
| 1095 | + * above. The processor merrily returns values from the | |
| 1096 | + * highest Intel leaf which QEMU tries to use as the guest's | |
| 1097 | + * 0x8000001d. Even worse, this can result in an infinite | |
| 1098 | + * loop if said highest leaf has no subleaves indexed by ECX. | |
| 1091 | 1099 | */ |
| 1092 | − if (static_cpu_has(X86_FEATURE_LFENCE_RDTSC) | |
| 1093 | − || !static_cpu_has_bug(X86_BUG_NULL_SEG)) | |
| 1100 | + if (entry->eax >= 0x8000001d && | |
| 1101 | + (static_cpu_has(X86_FEATURE_LFENCE_RDTSC) | |
| 1102 | + || !static_cpu_has_bug(X86_BUG_NULL_SEG))) | |
| 1094 | 1103 | entry->eax = max(entry->eax, 0x80000021); |
| 1095 | 1104 | break; |
| 1096 | 1105 | case 0x80000001: |
| @@ -1135,11 +1135,13 @@ void kvm_hv_setup_tsc_page(struct kvm *kvm, · 1134 unmodified lines | ||
| 1135 | 1135 | BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence)); |
| 1136 | 1136 | BUILD_BUG_ON(offsetof(struct ms_hyperv_tsc_page, tsc_sequence) != 0); |
| 1137 | 1137 | |
| 1138 | + mutex_lock(&hv->hv_lock); | |
| 1139 | + | |
| 1138 | 1140 | if (hv->hv_tsc_page_status == HV_TSC_PAGE_BROKEN || |
| 1141 | + hv->hv_tsc_page_status == HV_TSC_PAGE_SET || | |
| 1139 | 1142 | hv->hv_tsc_page_status == HV_TSC_PAGE_UNSET) |
| 1140 | − return; | |
| 1143 | + goto out_unlock; | |
| 1141 | 1144 | |
| 1142 | − mutex_lock(&hv->hv_lock); | |
| 1143 | 1145 | if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)) |
| 1144 | 1146 | goto out_unlock; |
| 1145 | 1147 | |
| @@ -1201,45 +1203,19 @@ out_unlock: · 55 unmodified lines | ||
| 1201 | 1203 | mutex_unlock(&hv->hv_lock); |
| 1202 | 1204 | } |
| 1203 | 1205 | |
| 1204 | −void kvm_hv_invalidate_tsc_page(struct kvm *kvm) | |
| 1206 | +void kvm_hv_request_tsc_page_update(struct kvm *kvm) | |
| 1205 | 1207 | { |
| 1206 | 1208 | struct kvm_hv *hv = to_kvm_hv(kvm); |
| 1207 | − u64 gfn; | |
| 1208 | − int idx; | |
| 1209 | − | |
| 1210 | − if (hv->hv_tsc_page_status == HV_TSC_PAGE_BROKEN || | |
| 1211 | − hv->hv_tsc_page_status == HV_TSC_PAGE_UNSET || | |
| 1212 | − tsc_page_update_unsafe(hv)) | |
| 1213 | − return; | |
| 1214 | 1209 | |
| 1215 | 1210 | mutex_lock(&hv->hv_lock); |
| 1216 | 1211 | |
| 1217 | − if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)) | |
| 1218 | − goto out_unlock; | |
| 1219 | − | |
| 1220 | − /* Preserve HV_TSC_PAGE_GUEST_CHANGED/HV_TSC_PAGE_HOST_CHANGED states */ | |
| 1221 | − if (hv->hv_tsc_page_status == HV_TSC_PAGE_SET) | |
| 1222 | − hv->hv_tsc_page_status = HV_TSC_PAGE_UPDATING; | |
| 1212 | + if (hv->hv_tsc_page_status == HV_TSC_PAGE_SET && | |
| 1213 | + !tsc_page_update_unsafe(hv)) | |
| 1214 | + hv->hv_tsc_page_status = HV_TSC_PAGE_HOST_CHANGED; | |
| 1223 | 1215 | |
| 1224 | − gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT; | |
| 1225 | − | |
| 1226 | − hv->tsc_ref.tsc_sequence = 0; | |
| 1227 | − | |
| 1228 | − /* | |
| 1229 | − * Take the srcu lock as memslots will be accessed to check the gfn | |
| 1230 | − * cache generation against the memslots generation. | |
| 1231 | − */ | |
| 1232 | − idx = srcu_read_lock(&kvm->srcu); | |
| 1233 | − if (kvm_write_guest(kvm, gfn_to_gpa(gfn), | |
| 1234 | − &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence))) | |
| 1235 | − hv->hv_tsc_page_status = HV_TSC_PAGE_BROKEN; | |
| 1236 | − srcu_read_unlock(&kvm->srcu, idx); | |
| 1237 | − | |
| 1238 | −out_unlock: | |
| 1239 | 1216 | mutex_unlock(&hv->hv_lock); |
| 1240 | 1217 | } |
| 1241 | 1218 | |
| 1242 | − | |
| 1243 | 1219 | static bool hv_check_msr_access(struct kvm_vcpu_hv *hv_vcpu, u32 msr) |
| 1244 | 1220 | { |
| 1245 | 1221 | if (!hv_vcpu->enforce_cpuid) |
| @@ -137,7 +137,7 @@ void kvm_hv_process_stimers(struct kvm_vcpu *vcpu); · 136 unmodified lines | ||
| 137 | 137 | |
| 138 | 138 | void kvm_hv_setup_tsc_page(struct kvm *kvm, |
| 139 | 139 | struct pvclock_vcpu_time_info *hv_clock); |
| 140 | −void kvm_hv_invalidate_tsc_page(struct kvm *kvm); | |
| 140 | +void kvm_hv_request_tsc_page_update(struct kvm *kvm); | |
| 141 | 141 | |
| 142 | 142 | void kvm_hv_init_vm(struct kvm *kvm); |
| 143 | 143 | void kvm_hv_destroy_vm(struct kvm *kvm); |
| @@ -65,6 +65,30 @@ static __always_inline u64 rsvd_bits(int s, int e) · 64 unmodified lines | ||
| 65 | 65 | return ((2ULL << (e - s)) - 1) << s; |
| 66 | 66 | } |
| 67 | 67 | |
| 68 | +/* | |
| 69 | + * The number of non-reserved physical address bits irrespective of features | |
| 70 | + * that repurpose legal bits, e.g. MKTME. | |
| 71 | + */ | |
| 72 | +extern u8 __read_mostly shadow_phys_bits; | |
| 73 | + | |
| 74 | +static inline gfn_t kvm_mmu_max_gfn(void) | |
| 75 | +{ | |
| 76 | + /* | |
| 77 | + * Note that this uses the host MAXPHYADDR, not the guest's. | |
| 78 | + * EPT/NPT cannot support GPAs that would exceed host.MAXPHYADDR; | |
| 79 | + * assuming KVM is running on bare metal, guest accesses beyond | |
| 80 | + * host.MAXPHYADDR will hit a #PF(RSVD) and never cause a vmexit | |
| 81 | + * (either EPT Violation/Misconfig or #NPF), and so KVM will never | |
| 82 | + * install a SPTE for such addresses. If KVM is running as a VM | |
| 83 | + * itself, on the other hand, it might see a MAXPHYADDR that is less | |
| 84 | + * than hardware's real MAXPHYADDR. Using the host MAXPHYADDR | |
| 85 | + * disallows such SPTEs entirely and simplifies the TDP MMU. | |
| 86 | + */ | |
| 87 | + int max_gpa_bits = likely(tdp_enabled) ? shadow_phys_bits : 52; | |
| 88 | + | |
| 89 | + return (1ULL << (max_gpa_bits - PAGE_SHIFT)) - 1; | |
| 90 | +} | |
| 91 | + | |
| 68 | 92 | void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask); |
| 69 | 93 | void kvm_mmu_set_ept_masks(bool has_ad_bits, bool has_exec_only); |
| 70 | 94 | |
| @@ -2804,8 +2804,12 @@ static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, · 2803 unmodified lines | ||
| 2804 | 2804 | const struct kvm_memory_slot *slot) |
| 2805 | 2805 | { |
| 2806 | 2806 | unsigned long hva; |
| 2807 | − pte_t *pte; | |
| 2808 | − int level; | |
| 2807 | + unsigned long flags; | |
| 2808 | + int level = PG_LEVEL_4K; | |
| 2809 | + pgd_t pgd; | |
| 2810 | + p4d_t p4d; | |
| 2811 | + pud_t pud; | |
| 2812 | + pmd_t pmd; | |
| 2809 | 2813 | |
| 2810 | 2814 | if (!PageCompound(pfn_to_page(pfn)) && !kvm_is_zone_device_pfn(pfn)) |
| 2811 | 2815 | return PG_LEVEL_4K; |
| @@ -2820,10 +2824,43 @@ static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, · 8 unmodified lines | ||
| 2820 | 2824 | */ |
| 2821 | 2825 | hva = __gfn_to_hva_memslot(slot, gfn); |
| 2822 | 2826 | |
| 2823 | − pte = lookup_address_in_mm(kvm->mm, hva, &level); | |
| 2824 | − if (unlikely(!pte)) | |
| 2825 | − return PG_LEVEL_4K; | |
| 2827 | + /* | |
| 2828 | + * Lookup the mapping level in the current mm. The information | |
| 2829 | + * may become stale soon, but it is safe to use as long as | |
| 2830 | + * 1) mmu_notifier_retry was checked after taking mmu_lock, and | |
| 2831 | + * 2) mmu_lock is taken now. | |
| 2832 | + * | |
| 2833 | + * We still need to disable IRQs to prevent concurrent tear down | |
| 2834 | + * of page tables. | |
| 2835 | + */ | |
| 2836 | + local_irq_save(flags); | |
| 2837 | + | |
| 2838 | + pgd = READ_ONCE(*pgd_offset(kvm->mm, hva)); | |
| 2839 | + if (pgd_none(pgd)) | |
| 2840 | + goto out; | |
| 2841 | + | |
| 2842 | + p4d = READ_ONCE(*p4d_offset(&pgd, hva)); | |
| 2843 | + if (p4d_none(p4d) || !p4d_present(p4d)) | |
| 2844 | + goto out; | |
| 2845 | + | |
| 2846 | + pud = READ_ONCE(*pud_offset(&p4d, hva)); | |
| 2847 | + if (pud_none(pud) || !pud_present(pud)) | |
| 2848 | + goto out; | |
| 2849 | + | |
| 2850 | + if (pud_large(pud)) { | |
| 2851 | + level = PG_LEVEL_1G; | |
| 2852 | + goto out; | |
| 2853 | + } | |
| 2826 | 2854 | |
| 2855 | + pmd = READ_ONCE(*pmd_offset(&pud, hva)); | |
| 2856 | + if (pmd_none(pmd) || !pmd_present(pmd)) | |
| 2857 | + goto out; | |
| 2858 | + | |
| 2859 | + if (pmd_large(pmd)) | |
| 2860 | + level = PG_LEVEL_2M; | |
| 2861 | + | |
| 2862 | +out: | |
| 2863 | + local_irq_restore(flags); | |
| 2827 | 2864 | return level; |
| 2828 | 2865 | } |
| 2829 | 2866 | |
| @@ -2992,9 +3029,15 @@ static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fa · 162 unmodified lines | ||
| 2992 | 3029 | /* |
| 2993 | 3030 | * If MMIO caching is disabled, emulate immediately without |
| 2994 | 3031 | * touching the shadow page tables as attempting to install an |
| 2995 | − * MMIO SPTE will just be an expensive nop. | |
| 3032 | + * MMIO SPTE will just be an expensive nop. Do not cache MMIO | |
| 3033 | + * whose gfn is greater than host.MAXPHYADDR, any guest that | |
| 3034 | + * generates such gfns is running nested and is being tricked | |
| 3035 | + * by L0 userspace (you can observe gfn > L1.MAXPHYADDR if | |
| 3036 | + * and only if L1's MAXPHYADDR is inaccurate with respect to | |
| 3037 | + * the hardware's). | |
| 2996 | 3038 | */ |
| 2997 | − if (unlikely(!shadow_mmio_value)) { | |
| 3039 | + if (unlikely(!shadow_mmio_value) || | |
| 3040 | + unlikely(fault->gfn > kvm_mmu_max_gfn())) { | |
| 2998 | 3041 | *ret_val = RET_PF_EMULATE; |
| 2999 | 3042 | return true; |
| 3000 | 3043 | } |
| @@ -6237,12 +6280,24 @@ static int set_nx_huge_pages(const char *val, const struct kernel_param *kp) · 3236 unmodified lines | ||
| 6237 | 6280 | return 0; |
| 6238 | 6281 | } |
| 6239 | 6282 | |
| 6240 | −int kvm_mmu_module_init(void) | |
| 6283 | +/* | |
| 6284 | + * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded, as | |
| 6285 | + * its default value of -1 is technically undefined behavior for a boolean. | |
| 6286 | + */ | |
| 6287 | +void kvm_mmu_x86_module_init(void) | |
| 6241 | 6288 | { |
| 6242 | − int ret = -ENOMEM; | |
| 6243 | − | |
| 6244 | 6289 | if (nx_huge_pages == -1) |
| 6245 | 6290 | __set_nx_huge_pages(get_nx_auto_mode()); |
| 6291 | +} | |
| 6292 | + | |
| 6293 | +/* | |
| 6294 | + * The bulk of the MMU initialization is deferred until the vendor module is | |
| 6295 | + * loaded as many of the masks/values may be modified by VMX or SVM, i.e. need | |
| 6296 | + * to be reset when a potentially different vendor module is loaded. | |
| 6297 | + */ | |
| 6298 | +int kvm_mmu_vendor_module_init(void) | |
| 6299 | +{ | |
| 6300 | + int ret = -ENOMEM; | |
| 6246 | 6301 | |
| 6247 | 6302 | /* |
| 6248 | 6303 | * MMU roles use union aliasing which is, generally speaking, an |
| @@ -6290,7 +6345,7 @@ void kvm_mmu_destroy(struct kvm_vcpu *vcpu) · 41 unmodified lines | ||
| 6290 | 6345 | mmu_free_memory_caches(vcpu); |
| 6291 | 6346 | } |
| 6292 | 6347 | |
| 6293 | −void kvm_mmu_module_exit(void) | |
| 6348 | +void kvm_mmu_vendor_module_exit(void) | |
| 6294 | 6349 | { |
| 6295 | 6350 | mmu_destroy_caches(); |
| 6296 | 6351 | percpu_counter_destroy(&kvm_total_used_mmu_pages); |
| @@ -201,12 +201,6 @@ static inline bool is_removed_spte(u64 spte) · 200 unmodified lines | ||
| 201 | 201 | */ |
| 202 | 202 | extern u64 __read_mostly shadow_nonpresent_or_rsvd_lower_gfn_mask; |
| 203 | 203 | |
| 204 | −/* | |
| 205 | − * The number of non-reserved physical address bits irrespective of features | |
| 206 | − * that repurpose legal bits, e.g. MKTME. | |
| 207 | − */ | |
| 208 | −extern u8 __read_mostly shadow_phys_bits; | |
| 209 | − | |
| 210 | 204 | static inline bool is_mmio_spte(u64 spte) |
| 211 | 205 | { |
| 212 | 206 | return (spte & shadow_mmio_mask) == shadow_mmio_value && |
| @@ -51,7 +51,7 @@ void kvm_mmu_uninit_tdp_mmu(struct kvm *kvm) · 50 unmodified lines | ||
| 51 | 51 | if (!kvm->arch.tdp_mmu_enabled) |
| 52 | 52 | return; |
| 53 | 53 | |
| 54 | − flush_workqueue(kvm->arch.tdp_mmu_zap_wq); | |
| 54 | + /* Also waits for any queued work items. */ | |
| 55 | 55 | destroy_workqueue(kvm->arch.tdp_mmu_zap_wq); |
| 56 | 56 | |
| 57 | 57 | WARN_ON(!list_empty(&kvm->arch.tdp_mmu_pages)); |
| @@ -815,14 +815,15 @@ static inline bool __must_check tdp_mmu_iter_cond_resched(struct kvm *kvm, · 757 unmodified lines | ||
| 815 | 815 | return iter->yielded; |
| 816 | 816 | } |
| 817 | 817 | |
| 818 | −static inline gfn_t tdp_mmu_max_gfn_host(void) | |
| 818 | +static inline gfn_t tdp_mmu_max_gfn_exclusive(void) | |
| 819 | 819 | { |
| 820 | 820 | /* |
| 821 | − * Bound TDP MMU walks at host.MAXPHYADDR, guest accesses beyond that | |
| 822 | − * will hit a #PF(RSVD) and never hit an EPT Violation/Misconfig / #NPF, | |
| 823 | − * and so KVM will never install a SPTE for such addresses. | |
| 821 | + * Bound TDP MMU walks at host.MAXPHYADDR. KVM disallows memslots with | |
| 822 | + * a gpa range that would exceed the max gfn, and KVM does not create | |
| 823 | + * MMIO SPTEs for "impossible" gfns, instead sending such accesses down | |
| 824 | + * the slow emulation path every time. | |
| 824 | 825 | */ |
| 825 | − return 1ULL << (shadow_phys_bits - PAGE_SHIFT); | |
| 826 | + return kvm_mmu_max_gfn() + 1; | |
| 826 | 827 | } |
| 827 | 828 | |
| 828 | 829 | static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root, |
| @@ -830,7 +831,7 @@ static void __tdp_mmu_zap_root(struct kvm *kvm, struct kvm_mmu_page *root, · 1 unmodified line | ||
| 830 | 831 | { |
| 831 | 832 | struct tdp_iter iter; |
| 832 | 833 | |
| 833 | − gfn_t end = tdp_mmu_max_gfn_host(); | |
| 834 | + gfn_t end = tdp_mmu_max_gfn_exclusive(); | |
| 834 | 835 | gfn_t start = 0; |
| 835 | 836 | |
| 836 | 837 | for_each_tdp_pte_min_level(iter, root, zap_level, start, end) { |
| @@ -923,7 +924,7 @@ static bool tdp_mmu_zap_leafs(struct kvm *kvm, struct kvm_mmu_page *root, · 86 unmodified lines | ||
| 923 | 924 | { |
| 924 | 925 | struct tdp_iter iter; |
| 925 | 926 | |
| 926 | − end = min(end, tdp_mmu_max_gfn_host()); | |
| 927 | + end = min(end, tdp_mmu_max_gfn_exclusive()); | |
| 927 | 928 | |
| 928 | 929 | lockdep_assert_held_write(&kvm->mmu_lock); |
| 929 | 930 | |
| @@ -138,6 +138,15 @@ static inline u64 get_sample_period(struct kvm_pmc *pmc, u64 counter_value) · 137 unmodified lines | ||
| 138 | 138 | return sample_period; |
| 139 | 139 | } |
| 140 | 140 | |
| 141 | +static inline void pmc_update_sample_period(struct kvm_pmc *pmc) | |
| 142 | +{ | |
| 143 | + if (!pmc->perf_event || pmc->is_paused) | |
| 144 | + return; | |
| 145 | + | |
| 146 | + perf_event_period(pmc->perf_event, | |
| 147 | + get_sample_period(pmc, pmc->counter)); | |
| 148 | +} | |
| 149 | + | |
| 141 | 150 | void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel); |
| 142 | 151 | void reprogram_fixed_counter(struct kvm_pmc *pmc, u8 ctrl, int fixed_idx); |
| 143 | 152 | void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx); |
| @@ -837,7 +837,8 @@ bool avic_check_apicv_inhibit_reasons(enum kvm_apicv_inhibit reason) · 836 unmodified lines | ||
| 837 | 837 | BIT(APICV_INHIBIT_REASON_IRQWIN) | |
| 838 | 838 | BIT(APICV_INHIBIT_REASON_PIT_REINJ) | |
| 839 | 839 | BIT(APICV_INHIBIT_REASON_X2APIC) | |
| 840 | − BIT(APICV_INHIBIT_REASON_BLOCKIRQ); | |
| 840 | + BIT(APICV_INHIBIT_REASON_BLOCKIRQ) | | |
| 841 | + BIT(APICV_INHIBIT_REASON_SEV); | |
| 841 | 842 | |
| 842 | 843 | return supported & BIT(reason); |
| 843 | 844 | } |
| @@ -257,6 +257,7 @@ static int amd_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 256 unmodified lines | ||
| 257 | 257 | pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER); |
| 258 | 258 | if (pmc) { |
| 259 | 259 | pmc->counter += data - pmc_read_counter(pmc); |
| 260 | + pmc_update_sample_period(pmc); | |
| 260 | 261 | return 0; |
| 261 | 262 | } |
| 262 | 263 | /* MSR_EVNTSELn */ |
| @@ -260,6 +260,8 @@ static int sev_guest_init(struct kvm *kvm, struct kvm_sev_cmd *argp) · 259 unmodified lines | ||
| 260 | 260 | INIT_LIST_HEAD(&sev->regions_list); |
| 261 | 261 | INIT_LIST_HEAD(&sev->mirror_vms); |
| 262 | 262 | |
| 263 | + kvm_set_apicv_inhibit(kvm, APICV_INHIBIT_REASON_SEV); | |
| 264 | + | |
| 263 | 265 | return 0; |
| 264 | 266 | |
| 265 | 267 | e_free: |
| @@ -465,6 +467,7 @@ static void sev_clflush_pages(struct page *pages[], unsigned long npages) · 199 unmodified lines | ||
| 465 | 467 | page_virtual = kmap_atomic(pages[i]); |
| 466 | 468 | clflush_cache_range(page_virtual, PAGE_SIZE); |
| 467 | 469 | kunmap_atomic(page_virtual); |
| 470 | + cond_resched(); | |
| 468 | 471 | } |
| 469 | 472 | } |
| 470 | 473 | |
| @@ -2223,51 +2226,47 @@ int sev_cpu_init(struct svm_cpu_data *sd) · 1752 unmodified lines | ||
| 2223 | 2226 | * Pages used by hardware to hold guest encrypted state must be flushed before |
| 2224 | 2227 | * returning them to the system. |
| 2225 | 2228 | */ |
| 2226 | −static void sev_flush_guest_memory(struct vcpu_svm *svm, void *va, | |
| 2227 | − unsigned long len) | |
| 2229 | +static void sev_flush_encrypted_page(struct kvm_vcpu *vcpu, void *va) | |
| 2228 | 2230 | { |
| 2231 | + int asid = to_kvm_svm(vcpu->kvm)->sev_info.asid; | |
| 2232 | + | |
| 2229 | 2233 | /* |
| 2230 | − * If hardware enforced cache coherency for encrypted mappings of the | |
| 2231 | − * same physical page is supported, nothing to do. | |
| 2234 | + * Note! The address must be a kernel address, as regular page walk | |
| 2235 | + * checks are performed by VM_PAGE_FLUSH, i.e. operating on a user | |
| 2236 | + * address is non-deterministic and unsafe. This function deliberately | |
| 2237 | + * takes a pointer to deter passing in a user address. | |
| 2232 | 2238 | */ |
| 2233 | − if (boot_cpu_has(X86_FEATURE_SME_COHERENT)) | |
| 2234 | − return; | |
| 2239 | + unsigned long addr = (unsigned long)va; | |
| 2235 | 2240 | |
| 2236 | 2241 | /* |
| 2237 | − * If the VM Page Flush MSR is supported, use it to flush the page | |
| 2238 | − * (using the page virtual address and the guest ASID). | |
| 2242 | + * If CPU enforced cache coherency for encrypted mappings of the | |
| 2243 | + * same physical page is supported, use CLFLUSHOPT instead. NOTE: cache | |
| 2244 | + * flush is still needed in order to work properly with DMA devices. | |
| 2239 | 2245 | */ |
| 2240 | − if (boot_cpu_has(X86_FEATURE_VM_PAGE_FLUSH)) { | |
| 2241 | − struct kvm_sev_info *sev; | |
| 2242 | − unsigned long va_start; | |
| 2243 | − u64 start, stop; | |
| 2244 | − | |
| 2245 | − /* Align start and stop to page boundaries. */ | |
| 2246 | − va_start = (unsigned long)va; | |
| 2247 | − start = (u64)va_start & PAGE_MASK; | |
| 2248 | − stop = PAGE_ALIGN((u64)va_start + len); | |
| 2249 | − | |
| 2250 | − if (start < stop) { | |
| 2251 | − sev = &to_kvm_svm(svm->vcpu.kvm)->sev_info; | |
| 2246 | + if (boot_cpu_has(X86_FEATURE_SME_COHERENT)) { | |
| 2247 | + clflush_cache_range(va, PAGE_SIZE); | |
| 2248 | + return; | |
| 2249 | + } | |
| 2252 | 2250 | |
| 2253 | − while (start < stop) { | |
| 2254 | − wrmsrl(MSR_AMD64_VM_PAGE_FLUSH, | |
| 2255 | − start | sev->asid); | |
| 2251 | + /* | |
| 2252 | + * VM Page Flush takes a host virtual address and a guest ASID. Fall | |
| 2253 | + * back to WBINVD if this faults so as not to make any problems worse | |
| 2254 | + * by leaving stale encrypted data in the cache. | |
| 2255 | + */ | |
| 2256 | + if (WARN_ON_ONCE(wrmsrl_safe(MSR_AMD64_VM_PAGE_FLUSH, addr | asid))) | |
| 2257 | + goto do_wbinvd; | |
| 2256 | 2258 | |
| 2257 | − start += PAGE_SIZE; | |
| 2258 | − } | |
| 2259 | + return; | |
| 2259 | 2260 | |
| 2260 | − return; | |
| 2261 | − } | |
| 2261 | +do_wbinvd: | |
| 2262 | + wbinvd_on_all_cpus(); | |
| 2263 | +} | |
| 2262 | 2264 | |
| 2263 | − WARN(1, "Address overflow, using WBINVD\n"); | |
| 2264 | − } | |
| 2265 | +void sev_guest_memory_reclaimed(struct kvm *kvm) | |
| 2266 | +{ | |
| 2267 | + if (!sev_guest(kvm)) | |
| 2268 | + return; | |
| 2265 | 2269 | |
| 2266 | − /* | |
| 2267 | − * Hardware should always have one of the above features, | |
| 2268 | − * but if not, use WBINVD and issue a warning. | |
| 2269 | − */ | |
| 2270 | − WARN_ONCE(1, "Using WBINVD to flush guest memory\n"); | |
| 2271 | 2270 | wbinvd_on_all_cpus(); |
| 2272 | 2271 | } |
| 2273 | 2272 | |
| @@ -2281,7 +2280,8 @@ void sev_free_vcpu(struct kvm_vcpu *vcpu) · 7 unmodified lines | ||
| 2281 | 2280 | svm = to_svm(vcpu); |
| 2282 | 2281 | |
| 2283 | 2282 | if (vcpu->arch.guest_state_protected) |
| 2284 | − sev_flush_guest_memory(svm, svm->sev_es.vmsa, PAGE_SIZE); | |
| 2283 | + sev_flush_encrypted_page(vcpu, svm->sev_es.vmsa); | |
| 2284 | + | |
| 2285 | 2285 | __free_page(virt_to_page(svm->sev_es.vmsa)); |
| 2286 | 2286 | |
| 2287 | 2287 | if (svm->sev_es.ghcb_sa_free) |
| @@ -4620,6 +4620,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = { · 4619 unmodified lines | ||
| 4620 | 4620 | .mem_enc_ioctl = sev_mem_enc_ioctl, |
| 4621 | 4621 | .mem_enc_register_region = sev_mem_enc_register_region, |
| 4622 | 4622 | .mem_enc_unregister_region = sev_mem_enc_unregister_region, |
| 4623 | + .guest_memory_reclaimed = sev_guest_memory_reclaimed, | |
| 4623 | 4624 | |
| 4624 | 4625 | .vm_copy_enc_context_from = sev_vm_copy_enc_context_from, |
| 4625 | 4626 | .vm_move_enc_context_from = sev_vm_move_enc_context_from, |
| @@ -609,6 +609,8 @@ int sev_mem_enc_unregister_region(struct kvm *kvm, · 608 unmodified lines | ||
| 609 | 609 | struct kvm_enc_region *range); |
| 610 | 610 | int sev_vm_copy_enc_context_from(struct kvm *kvm, unsigned int source_fd); |
| 611 | 611 | int sev_vm_move_enc_context_from(struct kvm *kvm, unsigned int source_fd); |
| 612 | +void sev_guest_memory_reclaimed(struct kvm *kvm); | |
| 613 | + | |
| 612 | 614 | void pre_sev_run(struct vcpu_svm *svm, int cpu); |
| 613 | 615 | void __init sev_set_cpu_caps(void); |
| 614 | 616 | void __init sev_hardware_setup(void); |
| @@ -4618,6 +4618,11 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_exit_reason, · 4617 unmodified lines | ||
| 4618 | 4618 | kvm_make_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu); |
| 4619 | 4619 | } |
| 4620 | 4620 | |
| 4621 | + if (vmx->nested.update_vmcs01_apicv_status) { | |
| 4622 | + vmx->nested.update_vmcs01_apicv_status = false; | |
| 4623 | + kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu); | |
| 4624 | + } | |
| 4625 | + | |
| 4621 | 4626 | if ((vm_exit_reason != -1) && |
| 4622 | 4627 | (enable_shadow_vmcs || evmptr_is_valid(vmx->nested.hv_evmcs_vmptr))) |
| 4623 | 4628 | vmx->nested.need_vmcs12_to_shadow_sync = true; |
| @@ -431,15 +431,11 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 430 unmodified lines | ||
| 431 | 431 | !(msr & MSR_PMC_FULL_WIDTH_BIT)) |
| 432 | 432 | data = (s64)(s32)data; |
| 433 | 433 | pmc->counter += data - pmc_read_counter(pmc); |
| 434 | − if (pmc->perf_event && !pmc->is_paused) | |
| 435 | − perf_event_period(pmc->perf_event, | |
| 436 | − get_sample_period(pmc, data)); | |
| 434 | + pmc_update_sample_period(pmc); | |
| 437 | 435 | return 0; |
| 438 | 436 | } else if ((pmc = get_fixed_pmc(pmu, msr))) { |
| 439 | 437 | pmc->counter += data - pmc_read_counter(pmc); |
| 440 | − if (pmc->perf_event && !pmc->is_paused) | |
| 441 | − perf_event_period(pmc->perf_event, | |
| 442 | − get_sample_period(pmc, data)); | |
| 438 | + pmc_update_sample_period(pmc); | |
| 443 | 439 | return 0; |
| 444 | 440 | } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { |
| 445 | 441 | if (data == pmc->eventsel) |
| @@ -4174,6 +4174,11 @@ static void vmx_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu) · 4173 unmodified lines | ||
| 4174 | 4174 | { |
| 4175 | 4175 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 4176 | 4176 | |
| 4177 | + if (is_guest_mode(vcpu)) { | |
| 4178 | + vmx->nested.update_vmcs01_apicv_status = true; | |
| 4179 | + return; | |
| 4180 | + } | |
| 4181 | + | |
| 4177 | 4182 | pin_controls_set(vmx, vmx_pin_based_exec_ctrl(vmx)); |
| 4178 | 4183 | if (cpu_has_secondary_exec_ctrls()) { |
| 4179 | 4184 | if (kvm_vcpu_apicv_active(vcpu)) |
| @@ -183,6 +183,7 @@ struct nested_vmx { · 182 unmodified lines | ||
| 183 | 183 | bool change_vmcs01_virtual_apic_mode; |
| 184 | 184 | bool reload_vmcs01_apic_access_page; |
| 185 | 185 | bool update_vmcs01_cpu_dirty_logging; |
| 186 | + bool update_vmcs01_apicv_status; | |
| 186 | 187 | |
| 187 | 188 | /* |
| 188 | 189 | * Enlightened VMCS has been enabled. It does not mean that L1 has to |
| @@ -2901,7 +2901,7 @@ static void kvm_end_pvclock_update(struct kvm *kvm) · 2900 unmodified lines | ||
| 2901 | 2901 | |
| 2902 | 2902 | static void kvm_update_masterclock(struct kvm *kvm) |
| 2903 | 2903 | { |
| 2904 | − kvm_hv_invalidate_tsc_page(kvm); | |
| 2904 | + kvm_hv_request_tsc_page_update(kvm); | |
| 2905 | 2905 | kvm_start_pvclock_update(kvm); |
| 2906 | 2906 | pvclock_update_vm_gtod_copy(kvm); |
| 2907 | 2907 | kvm_end_pvclock_update(kvm); |
| @@ -3113,8 +3113,7 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) · 205 unmodified lines | ||
| 3113 | 3113 | offsetof(struct compat_vcpu_info, time)); |
| 3114 | 3114 | if (vcpu->xen.vcpu_time_info_set) |
| 3115 | 3115 | kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0); |
| 3116 | − if (!v->vcpu_idx) | |
| 3117 | − kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock); | |
| 3116 | + kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock); | |
| 3118 | 3117 | return 0; |
| 3119 | 3118 | } |
| 3120 | 3119 | |
| @@ -6241,7 +6240,7 @@ static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp) · 3120 unmodified lines | ||
| 6241 | 6240 | if (data.flags & ~KVM_CLOCK_VALID_FLAGS) |
| 6242 | 6241 | return -EINVAL; |
| 6243 | 6242 | |
| 6244 | − kvm_hv_invalidate_tsc_page(kvm); | |
| 6243 | + kvm_hv_request_tsc_page_update(kvm); | |
| 6245 | 6244 | kvm_start_pvclock_update(kvm); |
| 6246 | 6245 | pvclock_update_vm_gtod_copy(kvm); |
| 6247 | 6246 | |
| @@ -8926,7 +8925,7 @@ int kvm_arch_init(void *opaque) · 2678 unmodified lines | ||
| 8926 | 8925 | } |
| 8927 | 8926 | kvm_nr_uret_msrs = 0; |
| 8928 | 8927 | |
| 8929 | − r = kvm_mmu_module_init(); | |
| 8928 | + r = kvm_mmu_vendor_module_init(); | |
| 8930 | 8929 | if (r) |
| 8931 | 8930 | goto out_free_percpu; |
| 8932 | 8931 | |
| @@ -8974,7 +8973,7 @@ void kvm_arch_exit(void) · 41 unmodified lines | ||
| 8974 | 8973 | cancel_work_sync(&pvclock_gtod_work); |
| 8975 | 8974 | #endif |
| 8976 | 8975 | kvm_x86_ops.hardware_enable = NULL; |
| 8977 | − kvm_mmu_module_exit(); | |
| 8976 | + kvm_mmu_vendor_module_exit(); | |
| 8978 | 8977 | free_percpu(user_return_msrs); |
| 8979 | 8978 | kmem_cache_destroy(x86_emulator_cache); |
| 8980 | 8979 | #ifdef CONFIG_KVM_XEN |
| @@ -9112,7 +9111,7 @@ static void kvm_apicv_init(struct kvm *kvm) · 131 unmodified lines | ||
| 9112 | 9111 | |
| 9113 | 9112 | if (!enable_apicv) |
| 9114 | 9113 | set_or_clear_apicv_inhibit(inhibits, |
| 9115 | − APICV_INHIBIT_REASON_ABSENT, true); | |
| 9114 | + APICV_INHIBIT_REASON_DISABLE, true); | |
| 9116 | 9115 | } |
| 9117 | 9116 | |
| 9118 | 9117 | static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id) |
| @@ -9890,6 +9889,11 @@ void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm, · 771 unmodified lines | ||
| 9890 | 9889 | kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD); |
| 9891 | 9890 | } |
| 9892 | 9891 | |
| 9892 | +void kvm_arch_guest_memory_reclaimed(struct kvm *kvm) | |
| 9893 | +{ | |
| 9894 | + static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm); | |
| 9895 | +} | |
| 9896 | + | |
| 9893 | 9897 | static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu) |
| 9894 | 9898 | { |
| 9895 | 9899 | if (!lapic_in_kernel(vcpu)) |
| @@ -10016,12 +10020,14 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 120 unmodified lines | ||
| 10016 | 10020 | if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) { |
| 10017 | 10021 | vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT; |
| 10018 | 10022 | vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH; |
| 10023 | + vcpu->run->system_event.ndata = 0; | |
| 10019 | 10024 | r = 0; |
| 10020 | 10025 | goto out; |
| 10021 | 10026 | } |
| 10022 | 10027 | if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) { |
| 10023 | 10028 | vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT; |
| 10024 | 10029 | vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET; |
| 10030 | + vcpu->run->system_event.ndata = 0; | |
| 10025 | 10031 | r = 0; |
| 10026 | 10032 | goto out; |
| 10027 | 10033 | } |
| @@ -10098,7 +10104,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 70 unmodified lines | ||
| 10098 | 10104 | /* Store vcpu->apicv_active before vcpu->mode. */ |
| 10099 | 10105 | smp_store_release(&vcpu->mode, IN_GUEST_MODE); |
| 10100 | 10106 | |
| 10101 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 10107 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 10102 | 10108 | |
| 10103 | 10109 | /* |
| 10104 | 10110 | * 1) We should set ->mode before checking ->requests. Please see |
| @@ -10129,7 +10135,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 24 unmodified lines | ||
| 10129 | 10135 | smp_wmb(); |
| 10130 | 10136 | local_irq_enable(); |
| 10131 | 10137 | preempt_enable(); |
| 10132 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 10138 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 10133 | 10139 | r = 1; |
| 10134 | 10140 | goto cancel_injection; |
| 10135 | 10141 | } |
| @@ -10255,7 +10261,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 119 unmodified lines | ||
| 10255 | 10261 | local_irq_enable(); |
| 10256 | 10262 | preempt_enable(); |
| 10257 | 10263 | |
| 10258 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 10264 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 10259 | 10265 | |
| 10260 | 10266 | /* |
| 10261 | 10267 | * Profile KVM exit RIPs: |
| @@ -10285,7 +10291,7 @@ out: · 23 unmodified lines | ||
| 10285 | 10291 | } |
| 10286 | 10292 | |
| 10287 | 10293 | /* Called within kvm->srcu read side. */ |
| 10288 | −static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu) | |
| 10294 | +static inline int vcpu_block(struct kvm_vcpu *vcpu) | |
| 10289 | 10295 | { |
| 10290 | 10296 | bool hv_timer; |
| 10291 | 10297 | |
| @@ -10301,12 +10307,12 @@ static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu) · 9 unmodified lines | ||
| 10301 | 10307 | if (hv_timer) |
| 10302 | 10308 | kvm_lapic_switch_to_sw_timer(vcpu); |
| 10303 | 10309 | |
| 10304 | − srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); | |
| 10310 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 10305 | 10311 | if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED) |
| 10306 | 10312 | kvm_vcpu_halt(vcpu); |
| 10307 | 10313 | else |
| 10308 | 10314 | kvm_vcpu_block(vcpu); |
| 10309 | − vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); | |
| 10315 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 10310 | 10316 | |
| 10311 | 10317 | if (hv_timer) |
| 10312 | 10318 | kvm_lapic_switch_to_hv_timer(vcpu); |
| @@ -10348,7 +10354,6 @@ static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu) · 35 unmodified lines | ||
| 10348 | 10354 | static int vcpu_run(struct kvm_vcpu *vcpu) |
| 10349 | 10355 | { |
| 10350 | 10356 | int r; |
| 10351 | − struct kvm *kvm = vcpu->kvm; | |
| 10352 | 10357 | |
| 10353 | 10358 | vcpu->arch.l1tf_flush_l1d = true; |
| 10354 | 10359 | |
| @@ -10356,7 +10361,7 @@ static int vcpu_run(struct kvm_vcpu *vcpu) · 1 unmodified line | ||
| 10356 | 10361 | if (kvm_vcpu_running(vcpu)) { |
| 10357 | 10362 | r = vcpu_enter_guest(vcpu); |
| 10358 | 10363 | } else { |
| 10359 | − r = vcpu_block(kvm, vcpu); | |
| 10364 | + r = vcpu_block(vcpu); | |
| 10360 | 10365 | } |
| 10361 | 10366 | |
| 10362 | 10367 | if (r <= 0) |
| @@ -10375,9 +10380,9 @@ static int vcpu_run(struct kvm_vcpu *vcpu) · 12 unmodified lines | ||
| 10375 | 10380 | } |
| 10376 | 10381 | |
| 10377 | 10382 | if (__xfer_to_guest_mode_work_pending()) { |
| 10378 | − srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); | |
| 10383 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 10379 | 10384 | r = xfer_to_guest_mode_handle_work(vcpu); |
| 10380 | − vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); | |
| 10385 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 10381 | 10386 | if (r) |
| 10382 | 10387 | return r; |
| 10383 | 10388 | } |
| @@ -10388,12 +10393,7 @@ static int vcpu_run(struct kvm_vcpu *vcpu) · 4 unmodified lines | ||
| 10388 | 10393 | |
| 10389 | 10394 | static inline int complete_emulated_io(struct kvm_vcpu *vcpu) |
| 10390 | 10395 | { |
| 10391 | − int r; | |
| 10392 | − | |
| 10393 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 10394 | − r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE); | |
| 10395 | − srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx); | |
| 10396 | − return r; | |
| 10396 | + return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE); | |
| 10397 | 10397 | } |
| 10398 | 10398 | |
| 10399 | 10399 | static int complete_emulated_pio(struct kvm_vcpu *vcpu) |
| @@ -10485,7 +10485,6 @@ static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu) · 85 unmodified lines | ||
| 10485 | 10485 | int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) |
| 10486 | 10486 | { |
| 10487 | 10487 | struct kvm_run *kvm_run = vcpu->run; |
| 10488 | − struct kvm *kvm = vcpu->kvm; | |
| 10489 | 10488 | int r; |
| 10490 | 10489 | |
| 10491 | 10490 | vcpu_load(vcpu); |
| @@ -10493,7 +10492,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 1 unmodified line | ||
| 10493 | 10492 | kvm_run->flags = 0; |
| 10494 | 10493 | kvm_load_guest_fpu(vcpu); |
| 10495 | 10494 | |
| 10496 | − vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); | |
| 10495 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 10497 | 10496 | if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) { |
| 10498 | 10497 | if (kvm_run->immediate_exit) { |
| 10499 | 10498 | r = -EINTR; |
| @@ -10505,9 +10504,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) · 5 unmodified lines | ||
| 10505 | 10504 | */ |
| 10506 | 10505 | WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu)); |
| 10507 | 10506 | |
| 10508 | − srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); | |
| 10507 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 10509 | 10508 | kvm_vcpu_block(vcpu); |
| 10510 | − vcpu->srcu_idx = srcu_read_lock(&kvm->srcu); | |
| 10509 | + kvm_vcpu_srcu_read_lock(vcpu); | |
| 10511 | 10510 | |
| 10512 | 10511 | if (kvm_apic_accept_events(vcpu) < 0) { |
| 10513 | 10512 | r = 0; |
| @@ -10568,7 +10567,7 @@ out: · 54 unmodified lines | ||
| 10568 | 10567 | if (kvm_run->kvm_valid_regs) |
| 10569 | 10568 | store_regs(vcpu); |
| 10570 | 10569 | post_kvm_run_save(vcpu); |
| 10571 | − srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx); | |
| 10570 | + kvm_vcpu_srcu_read_unlock(vcpu); | |
| 10572 | 10571 | |
| 10573 | 10572 | kvm_sigset_deactivate(vcpu); |
| 10574 | 10573 | vcpu_put(vcpu); |
| @@ -10986,6 +10985,9 @@ static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm) · 411 unmodified lines | ||
| 10986 | 10985 | struct kvm_vcpu *vcpu; |
| 10987 | 10986 | unsigned long i; |
| 10988 | 10987 | |
| 10988 | + if (!enable_apicv) | |
| 10989 | + return; | |
| 10990 | + | |
| 10989 | 10991 | down_write(&kvm->arch.apicv_update_lock); |
| 10990 | 10992 | |
| 10991 | 10993 | kvm_for_each_vcpu(i, vcpu, kvm) { |
| @@ -11197,8 +11199,21 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) · 205 unmodified lines | ||
| 11197 | 11199 | r = kvm_create_lapic(vcpu, lapic_timer_advance_ns); |
| 11198 | 11200 | if (r < 0) |
| 11199 | 11201 | goto fail_mmu_destroy; |
| 11200 | − if (kvm_apicv_activated(vcpu->kvm)) | |
| 11202 | + | |
| 11203 | + /* | |
| 11204 | + * Defer evaluating inhibits until the vCPU is first run, as | |
| 11205 | + * this vCPU will not get notified of any changes until this | |
| 11206 | + * vCPU is visible to other vCPUs (marked online and added to | |
| 11207 | + * the set of vCPUs). Opportunistically mark APICv active as | |
| 11208 | + * VMX in particularly is highly unlikely to have inhibits. | |
| 11209 | + * Ignore the current per-VM APICv state so that vCPU creation | |
| 11210 | + * is guaranteed to run with a deterministic value, the request | |
| 11211 | + * will ensure the vCPU gets the correct state before VM-Entry. | |
| 11212 | + */ | |
| 11213 | + if (enable_apicv) { | |
| 11201 | 11214 | vcpu->arch.apicv_active = true; |
| 11215 | + kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu); | |
| 11216 | + } | |
| 11202 | 11217 | } else |
| 11203 | 11218 | static_branch_inc(&kvm_has_noapic_vcpu); |
| 11204 | 11219 | |
| @@ -11996,8 +12011,12 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, · 791 unmodified lines | ||
| 11996 | 12011 | struct kvm_memory_slot *new, |
| 11997 | 12012 | enum kvm_mr_change change) |
| 11998 | 12013 | { |
| 11999 | − if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) | |
| 12014 | + if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) { | |
| 12015 | + if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn()) | |
| 12016 | + return -EINVAL; | |
| 12017 | + | |
| 12000 | 12018 | return kvm_alloc_memslot_metadata(kvm, new); |
| 12019 | + } | |
| 12001 | 12020 | |
| 12002 | 12021 | if (change == KVM_MR_FLAGS_ONLY) |
| 12003 | 12022 | memcpy(&new->arch, &old->arch, sizeof(old->arch)); |
| @@ -12986,3 +13005,19 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter); · 982 unmodified lines | ||
| 12986 | 13005 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit); |
| 12987 | 13006 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter); |
| 12988 | 13007 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit); |
| 13008 | + | |
| 13009 | +static int __init kvm_x86_init(void) | |
| 13010 | +{ | |
| 13011 | + kvm_mmu_x86_module_init(); | |
| 13012 | + return 0; | |
| 13013 | +} | |
| 13014 | +module_init(kvm_x86_init); | |
| 13015 | + | |
| 13016 | +static void __exit kvm_x86_exit(void) | |
| 13017 | +{ | |
| 13018 | + /* | |
| 13019 | + * If module_init() is implemented, module_exit() must also be | |
| 13020 | + * implemented to allow module unload. | |
| 13021 | + */ | |
| 13022 | +} | |
| 13023 | +module_exit(kvm_x86_exit); | |
| @@ -53,12 +53,12 @@ · 52 unmodified lines | ||
| 53 | 53 | SYM_FUNC_START(copy_user_generic_unrolled) |
| 54 | 54 | ASM_STAC |
| 55 | 55 | cmpl $8,%edx |
| 56 | − jb 20f /* less then 8 bytes, go to byte copy loop */ | |
| 56 | + jb .Lcopy_user_short_string_bytes | |
| 57 | 57 | ALIGN_DESTINATION |
| 58 | 58 | movl %edx,%ecx |
| 59 | 59 | andl $63,%edx |
| 60 | 60 | shrl $6,%ecx |
| 61 | − jz .L_copy_short_string | |
| 61 | + jz copy_user_short_string | |
| 62 | 62 | 1: movq (%rsi),%r8 |
| 63 | 63 | 2: movq 1*8(%rsi),%r9 |
| 64 | 64 | 3: movq 2*8(%rsi),%r10 |
| @@ -79,37 +79,11 @@ SYM_FUNC_START(copy_user_generic_unrolled) · 14 unmodified lines | ||
| 79 | 79 | leaq 64(%rdi),%rdi |
| 80 | 80 | decl %ecx |
| 81 | 81 | jnz 1b |
| 82 | −.L_copy_short_string: | |
| 83 | − movl %edx,%ecx | |
| 84 | − andl $7,%edx | |
| 85 | − shrl $3,%ecx | |
| 86 | − jz 20f | |
| 87 | −18: movq (%rsi),%r8 | |
| 88 | −19: movq %r8,(%rdi) | |
| 89 | − leaq 8(%rsi),%rsi | |
| 90 | − leaq 8(%rdi),%rdi | |
| 91 | − decl %ecx | |
| 92 | − jnz 18b | |
| 93 | −20: andl %edx,%edx | |
| 94 | − jz 23f | |
| 95 | − movl %edx,%ecx | |
| 96 | −21: movb (%rsi),%al | |
| 97 | −22: movb %al,(%rdi) | |
| 98 | − incq %rsi | |
| 99 | − incq %rdi | |
| 100 | − decl %ecx | |
| 101 | − jnz 21b | |
| 102 | −23: xor %eax,%eax | |
| 103 | − ASM_CLAC | |
| 104 | − RET | |
| 82 | + jmp copy_user_short_string | |
| 105 | 83 | |
| 106 | 84 | 30: shll $6,%ecx |
| 107 | 85 | addl %ecx,%edx |
| 108 | − jmp 60f | |
| 109 | −40: leal (%rdx,%rcx,8),%edx | |
| 110 | − jmp 60f | |
| 111 | −50: movl %ecx,%edx | |
| 112 | −60: jmp .Lcopy_user_handle_tail /* ecx is zerorest also */ | |
| 86 | + jmp .Lcopy_user_handle_tail | |
| 113 | 87 | |
| 114 | 88 | _ASM_EXTABLE_CPY(1b, 30b) |
| 115 | 89 | _ASM_EXTABLE_CPY(2b, 30b) |
| @@ -127,10 +101,6 @@ SYM_FUNC_START(copy_user_generic_unrolled) · 11 unmodified lines | ||
| 127 | 101 | _ASM_EXTABLE_CPY(14b, 30b) |
| 128 | 102 | _ASM_EXTABLE_CPY(15b, 30b) |
| 129 | 103 | _ASM_EXTABLE_CPY(16b, 30b) |
| 130 | − _ASM_EXTABLE_CPY(18b, 40b) | |
| 131 | − _ASM_EXTABLE_CPY(19b, 40b) | |
| 132 | − _ASM_EXTABLE_CPY(21b, 50b) | |
| 133 | − _ASM_EXTABLE_CPY(22b, 50b) | |
| 134 | 104 | SYM_FUNC_END(copy_user_generic_unrolled) |
| 135 | 105 | EXPORT_SYMBOL(copy_user_generic_unrolled) |
| 136 | 106 | |
| @@ -191,7 +161,7 @@ EXPORT_SYMBOL(copy_user_generic_string) · 54 unmodified lines | ||
| 191 | 161 | SYM_FUNC_START(copy_user_enhanced_fast_string) |
| 192 | 162 | ASM_STAC |
| 193 | 163 | /* CPUs without FSRM should avoid rep movsb for short copies */ |
| 194 | − ALTERNATIVE "cmpl $64, %edx; jb .L_copy_short_string", "", X86_FEATURE_FSRM | |
| 164 | + ALTERNATIVE "cmpl $64, %edx; jb copy_user_short_string", "", X86_FEATURE_FSRM | |
| 195 | 165 | movl %edx,%ecx |
| 196 | 166 | 1: rep movsb |
| 197 | 167 | xorl %eax,%eax |
| @@ -243,6 +213,53 @@ SYM_CODE_START_LOCAL(.Lcopy_user_handle_tail) · 45 unmodified lines | ||
| 243 | 213 | |
| 244 | 214 | SYM_CODE_END(.Lcopy_user_handle_tail) |
| 245 | 215 | |
| 216 | +/* | |
| 217 | + * Finish memcpy of less than 64 bytes. #AC should already be set. | |
| 218 | + * | |
| 219 | + * Input: | |
| 220 | + * rdi destination | |
| 221 | + * rsi source | |
| 222 | + * rdx count (< 64) | |
| 223 | + * | |
| 224 | + * Output: | |
| 225 | + * eax uncopied bytes or 0 if successful. | |
| 226 | + */ | |
| 227 | +SYM_CODE_START_LOCAL(copy_user_short_string) | |
| 228 | + movl %edx,%ecx | |
| 229 | + andl $7,%edx | |
| 230 | + shrl $3,%ecx | |
| 231 | + jz .Lcopy_user_short_string_bytes | |
| 232 | +18: movq (%rsi),%r8 | |
| 233 | +19: movq %r8,(%rdi) | |
| 234 | + leaq 8(%rsi),%rsi | |
| 235 | + leaq 8(%rdi),%rdi | |
| 236 | + decl %ecx | |
| 237 | + jnz 18b | |
| 238 | +.Lcopy_user_short_string_bytes: | |
| 239 | + andl %edx,%edx | |
| 240 | + jz 23f | |
| 241 | + movl %edx,%ecx | |
| 242 | +21: movb (%rsi),%al | |
| 243 | +22: movb %al,(%rdi) | |
| 244 | + incq %rsi | |
| 245 | + incq %rdi | |
| 246 | + decl %ecx | |
| 247 | + jnz 21b | |
| 248 | +23: xor %eax,%eax | |
| 249 | + ASM_CLAC | |
| 250 | + RET | |
| 251 | + | |
| 252 | +40: leal (%rdx,%rcx,8),%edx | |
| 253 | + jmp 60f | |
| 254 | +50: movl %ecx,%edx /* ecx is zerorest also */ | |
| 255 | +60: jmp .Lcopy_user_handle_tail | |
| 256 | + | |
| 257 | + _ASM_EXTABLE_CPY(18b, 40b) | |
| 258 | + _ASM_EXTABLE_CPY(19b, 40b) | |
| 259 | + _ASM_EXTABLE_CPY(21b, 50b) | |
| 260 | + _ASM_EXTABLE_CPY(22b, 50b) | |
| 261 | +SYM_CODE_END(copy_user_short_string) | |
| 262 | + | |
| 246 | 263 | /* |
| 247 | 264 | * copy_user_nocache - Uncached memory copy with exception handling |
| 248 | 265 | * This will force destination out of cache for more performance. |
| @@ -48,6 +48,7 @@ SYM_FUNC_START(__put_user_1) · 47 unmodified lines | ||
| 48 | 48 | cmp %_ASM_BX,%_ASM_CX |
| 49 | 49 | jae .Lbad_put_user |
| 50 | 50 | SYM_INNER_LABEL(__put_user_nocheck_1, SYM_L_GLOBAL) |
| 51 | + ENDBR | |
| 51 | 52 | ASM_STAC |
| 52 | 53 | 1: movb %al,(%_ASM_CX) |
| 53 | 54 | xor %ecx,%ecx |
| @@ -62,6 +63,7 @@ SYM_FUNC_START(__put_user_2) · 8 unmodified lines | ||
| 62 | 63 | cmp %_ASM_BX,%_ASM_CX |
| 63 | 64 | jae .Lbad_put_user |
| 64 | 65 | SYM_INNER_LABEL(__put_user_nocheck_2, SYM_L_GLOBAL) |
| 66 | + ENDBR | |
| 65 | 67 | ASM_STAC |
| 66 | 68 | 2: movw %ax,(%_ASM_CX) |
| 67 | 69 | xor %ecx,%ecx |
| @@ -76,6 +78,7 @@ SYM_FUNC_START(__put_user_4) · 8 unmodified lines | ||
| 76 | 78 | cmp %_ASM_BX,%_ASM_CX |
| 77 | 79 | jae .Lbad_put_user |
| 78 | 80 | SYM_INNER_LABEL(__put_user_nocheck_4, SYM_L_GLOBAL) |
| 81 | + ENDBR | |
| 79 | 82 | ASM_STAC |
| 80 | 83 | 3: movl %eax,(%_ASM_CX) |
| 81 | 84 | xor %ecx,%ecx |
| @@ -90,6 +93,7 @@ SYM_FUNC_START(__put_user_8) · 8 unmodified lines | ||
| 90 | 93 | cmp %_ASM_BX,%_ASM_CX |
| 91 | 94 | jae .Lbad_put_user |
| 92 | 95 | SYM_INNER_LABEL(__put_user_nocheck_8, SYM_L_GLOBAL) |
| 96 | + ENDBR | |
| 93 | 97 | ASM_STAC |
| 94 | 98 | 4: mov %_ASM_AX,(%_ASM_CX) |
| 95 | 99 | #ifdef CONFIG_X86_32 |
| @@ -31,6 +31,7 @@ · 30 unmodified lines | ||
| 31 | 31 | .align RETPOLINE_THUNK_SIZE |
| 32 | 32 | SYM_INNER_LABEL(__x86_indirect_thunk_\reg, SYM_L_GLOBAL) |
| 33 | 33 | UNWIND_HINT_EMPTY |
| 34 | + ANNOTATE_NOENDBR | |
| 34 | 35 | |
| 35 | 36 | ALTERNATIVE_2 __stringify(ANNOTATE_RETPOLINE_SAFE; jmp *%\reg), \ |
| 36 | 37 | __stringify(RETPOLINE \reg), X86_FEATURE_RETPOLINE, \ |
| @@ -55,7 +56,6 @@ SYM_INNER_LABEL(__x86_indirect_thunk_\reg, SYM_L_GLOBAL) · 18 unmodified lines | ||
| 55 | 56 | |
| 56 | 57 | .align RETPOLINE_THUNK_SIZE |
| 57 | 58 | SYM_CODE_START(__x86_indirect_thunk_array) |
| 58 | − ANNOTATE_NOENDBR // apply_retpolines | |
| 59 | 59 | |
| 60 | 60 | #define GEN(reg) THUNK reg |
| 61 | 61 | #include <asm/GEN-for-each-reg.h> |
| @@ -119,7 +119,7 @@ void __memcpy_flushcache(void *_dst, const void *_src, size_t size) · 118 unmodified lines | ||
| 119 | 119 | |
| 120 | 120 | /* cache copy and flush to align dest */ |
| 121 | 121 | if (!IS_ALIGNED(dest, 8)) { |
| 122 | − unsigned len = min_t(unsigned, size, ALIGN(dest, 8) - dest); | |
| 122 | + size_t len = min_t(size_t, size, ALIGN(dest, 8) - dest); | |
| 123 | 123 | |
| 124 | 124 | memcpy((void *) dest, (void *) source, len); |
| 125 | 125 | clean_cache_range((void *) dest, len); |
| @@ -638,17 +638,6 @@ pte_t *lookup_address(unsigned long address, unsigned int *level) · 637 unmodified lines | ||
| 638 | 638 | } |
| 639 | 639 | EXPORT_SYMBOL_GPL(lookup_address); |
| 640 | 640 | |
| 641 | −/* | |
| 642 | − * Lookup the page table entry for a virtual address in a given mm. Return a | |
| 643 | − * pointer to the entry and the level of the mapping. | |
| 644 | − */ | |
| 645 | −pte_t *lookup_address_in_mm(struct mm_struct *mm, unsigned long address, | |
| 646 | − unsigned int *level) | |
| 647 | −{ | |
| 648 | − return lookup_address_in_pgd(pgd_offset(mm, address), address, level); | |
| 649 | −} | |
| 650 | −EXPORT_SYMBOL_GPL(lookup_address_in_mm); | |
| 651 | − | |
| 652 | 641 | static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address, |
| 653 | 642 | unsigned int *level) |
| 654 | 643 | { |
| @@ -467,7 +467,6 @@ static __init void xen_setup_pci_msi(void) · 466 unmodified lines | ||
| 467 | 467 | else |
| 468 | 468 | xen_msi_ops.setup_msi_irqs = xen_setup_msi_irqs; |
| 469 | 469 | xen_msi_ops.teardown_msi_irqs = xen_pv_teardown_msi_irqs; |
| 470 | − pci_msi_ignore_mask = 1; | |
| 471 | 470 | } else if (xen_hvm_domain()) { |
| 472 | 471 | xen_msi_ops.setup_msi_irqs = xen_hvm_setup_msi_irqs; |
| 473 | 472 | xen_msi_ops.teardown_msi_irqs = xen_teardown_msi_irqs; |
| @@ -481,6 +480,11 @@ static __init void xen_setup_pci_msi(void) · 7 unmodified lines | ||
| 481 | 480 | * in allocating the native domain and never use it. |
| 482 | 481 | */ |
| 483 | 482 | x86_init.irqs.create_pci_msi_domain = xen_create_pci_msi_domain; |
| 483 | + /* | |
| 484 | + * With XEN PIRQ/Eventchannels in use PCI/MSI[-X] masking is solely | |
| 485 | + * controlled by the hypervisor. | |
| 486 | + */ | |
| 487 | + pci_msi_ignore_mask = 1; | |
| 484 | 488 | } |
| 485 | 489 | |
| 486 | 490 | #else /* CONFIG_PCI_MSI */ |
| @@ -50,6 +50,7 @@ · 49 unmodified lines | ||
| 50 | 50 | #define PVH_DS_SEL (PVH_GDT_ENTRY_DS * 8) |
| 51 | 51 | |
| 52 | 52 | SYM_CODE_START_LOCAL(pvh_start_xen) |
| 53 | + UNWIND_HINT_EMPTY | |
| 53 | 54 | cld |
| 54 | 55 | |
| 55 | 56 | lgdt (_pa(gdt)) |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include <asm/cpu.h> |
| 26 | 26 | #include <asm/mmu_context.h> |
| 27 | 27 | #include <asm/cpu_device_id.h> |
| 28 | +#include <asm/microcode.h> | |
| 28 | 29 | |
| 29 | 30 | #ifdef CONFIG_X86_32 |
| 30 | 31 | __visible unsigned long saved_context_ebx; |
| @@ -262,11 +263,18 @@ static void notrace __restore_processor_state(struct saved_context *ctxt) · 231 unmodified lines | ||
| 262 | 263 | x86_platform.restore_sched_clock_state(); |
| 263 | 264 | mtrr_bp_restore(); |
| 264 | 265 | perf_restore_debug_store(); |
| 265 | − msr_restore_context(ctxt); | |
| 266 | 266 | |
| 267 | 267 | c = &cpu_data(smp_processor_id()); |
| 268 | 268 | if (cpu_has(c, X86_FEATURE_MSR_IA32_FEAT_CTL)) |
| 269 | 269 | init_ia32_feat_ctl(c); |
| 270 | + | |
| 271 | + microcode_bsp_resume(); | |
| 272 | + | |
| 273 | + /* | |
| 274 | + * This needs to happen after the microcode has been updated upon resume | |
| 275 | + * because some of the MSRs are "emulated" in microcode. | |
| 276 | + */ | |
| 277 | + msr_restore_context(ctxt); | |
| 270 | 278 | } |
| 271 | 279 | |
| 272 | 280 | /* Needed by apm.c */ |
| @@ -45,6 +45,7 @@ SYM_CODE_END(hypercall_page) · 44 unmodified lines | ||
| 45 | 45 | __INIT |
| 46 | 46 | SYM_CODE_START(startup_xen) |
| 47 | 47 | UNWIND_HINT_EMPTY |
| 48 | + ANNOTATE_NOENDBR | |
| 48 | 49 | cld |
| 49 | 50 | |
| 50 | 51 | /* Clear .bss */ |
| @@ -29,7 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | .if XTENSA_HAVE_COPROCESSOR(x); \ |
| 30 | 30 | .align 4; \ |
| 31 | 31 | .Lsave_cp_regs_cp##x: \ |
| 32 | − xchal_cp##x##_store a2 a4 a5 a6 a7; \ | |
| 32 | + xchal_cp##x##_store a2 a3 a4 a5 a6; \ | |
| 33 | 33 | jx a0; \ |
| 34 | 34 | .endif |
| 35 | 35 | |
| @@ -46,7 +46,7 @@ · 10 unmodified lines | ||
| 46 | 46 | .if XTENSA_HAVE_COPROCESSOR(x); \ |
| 47 | 47 | .align 4; \ |
| 48 | 48 | .Lload_cp_regs_cp##x: \ |
| 49 | − xchal_cp##x##_load a2 a4 a5 a6 a7; \ | |
| 49 | + xchal_cp##x##_load a2 a3 a4 a5 a6; \ | |
| 50 | 50 | jx a0; \ |
| 51 | 51 | .endif |
| 52 | 52 | |
| @@ -40,7 +40,7 @@ static int patch_text_stop_machine(void *data) · 39 unmodified lines | ||
| 40 | 40 | { |
| 41 | 41 | struct patch *patch = data; |
| 42 | 42 | |
| 43 | − if (atomic_inc_return(&patch->cpu_count) == 1) { | |
| 43 | + if (atomic_inc_return(&patch->cpu_count) == num_online_cpus()) { | |
| 44 | 44 | local_patch_text(patch->addr, patch->data, patch->sz); |
| 45 | 45 | atomic_inc(&patch->cpu_count); |
| 46 | 46 | } else { |
| @@ -36,24 +36,19 @@ static void rs_poll(struct timer_list *); · 35 unmodified lines | ||
| 36 | 36 | static struct tty_driver *serial_driver; |
| 37 | 37 | static struct tty_port serial_port; |
| 38 | 38 | static DEFINE_TIMER(serial_timer, rs_poll); |
| 39 | −static DEFINE_SPINLOCK(timer_lock); | |
| 40 | 39 | |
| 41 | 40 | static int rs_open(struct tty_struct *tty, struct file * filp) |
| 42 | 41 | { |
| 43 | − spin_lock_bh(&timer_lock); | |
| 44 | 42 | if (tty->count == 1) |
| 45 | 43 | mod_timer(&serial_timer, jiffies + SERIAL_TIMER_VALUE); |
| 46 | − spin_unlock_bh(&timer_lock); | |
| 47 | 44 | |
| 48 | 45 | return 0; |
| 49 | 46 | } |
| 50 | 47 | |
| 51 | 48 | static void rs_close(struct tty_struct *tty, struct file * filp) |
| 52 | 49 | { |
| 53 | − spin_lock_bh(&timer_lock); | |
| 54 | 50 | if (tty->count == 1) |
| 55 | 51 | del_timer_sync(&serial_timer); |
| 56 | − spin_unlock_bh(&timer_lock); | |
| 57 | 52 | } |
| 58 | 53 | |
| 59 | 54 | |
| @@ -73,8 +68,6 @@ static void rs_poll(struct timer_list *unused) · 13 unmodified lines | ||
| 73 | 68 | int rd = 1; |
| 74 | 69 | unsigned char c; |
| 75 | 70 | |
| 76 | − spin_lock(&timer_lock); | |
| 77 | − | |
| 78 | 71 | while (simc_poll(0)) { |
| 79 | 72 | rd = simc_read(0, &c, 1); |
| 80 | 73 | if (rd <= 0) |
| @@ -87,7 +80,6 @@ static void rs_poll(struct timer_list *unused) · 6 unmodified lines | ||
| 87 | 80 | tty_flip_buffer_push(port); |
| 88 | 81 | if (rd) |
| 89 | 82 | mod_timer(&serial_timer, jiffies + SERIAL_TIMER_VALUE); |
| 90 | − spin_unlock(&timer_lock); | |
| 91 | 83 | } |
| 92 | 84 | |
| 93 | 85 | |
| @@ -569,7 +569,7 @@ static bool bfqq_request_over_limit(struct bfq_queue *bfqq, int limit) · 568 unmodified lines | ||
| 569 | 569 | struct bfq_entity *entity = &bfqq->entity; |
| 570 | 570 | struct bfq_entity *inline_entities[BFQ_LIMIT_INLINE_DEPTH]; |
| 571 | 571 | struct bfq_entity **entities = inline_entities; |
| 572 | − int depth, level; | |
| 572 | + int depth, level, alloc_depth = BFQ_LIMIT_INLINE_DEPTH; | |
| 573 | 573 | int class_idx = bfqq->ioprio_class - 1; |
| 574 | 574 | struct bfq_sched_data *sched_data; |
| 575 | 575 | unsigned long wsum; |
| @@ -578,15 +578,21 @@ static bool bfqq_request_over_limit(struct bfq_queue *bfqq, int limit) · 2 unmodified lines | ||
| 578 | 578 | if (!entity->on_st_or_in_serv) |
| 579 | 579 | return false; |
| 580 | 580 | |
| 581 | +retry: | |
| 582 | + spin_lock_irq(&bfqd->lock); | |
| 581 | 583 | /* +1 for bfqq entity, root cgroup not included */ |
| 582 | 584 | depth = bfqg_to_blkg(bfqq_group(bfqq))->blkcg->css.cgroup->level + 1; |
| 583 | − if (depth > BFQ_LIMIT_INLINE_DEPTH) { | |
| 585 | + if (depth > alloc_depth) { | |
| 586 | + spin_unlock_irq(&bfqd->lock); | |
| 587 | + if (entities != inline_entities) | |
| 588 | + kfree(entities); | |
| 584 | 589 | entities = kmalloc_array(depth, sizeof(*entities), GFP_NOIO); |
| 585 | 590 | if (!entities) |
| 586 | 591 | return false; |
| 592 | + alloc_depth = depth; | |
| 593 | + goto retry; | |
| 587 | 594 | } |
| 588 | 595 | |
| 589 | − spin_lock_irq(&bfqd->lock); | |
| 590 | 596 | sched_data = entity->sched_data; |
| 591 | 597 | /* Gather our ancestors as we need to traverse them in reverse order */ |
| 592 | 598 | level = 0; |
| @@ -1598,7 +1598,7 @@ EXPORT_SYMBOL(bio_split); · 1597 unmodified lines | ||
| 1598 | 1598 | void bio_trim(struct bio *bio, sector_t offset, sector_t size) |
| 1599 | 1599 | { |
| 1600 | 1600 | if (WARN_ON_ONCE(offset > BIO_MAX_SECTORS || size > BIO_MAX_SECTORS || |
| 1601 | − offset + size > bio->bi_iter.bi_size)) | |
| 1601 | + offset + size > bio_sectors(bio))) | |
| 1602 | 1602 | return; |
| 1603 | 1603 | |
| 1604 | 1604 | size <<= 9; |
| @@ -2322,7 +2322,17 @@ static void ioc_timer_fn(struct timer_list *timer) · 2321 unmodified lines | ||
| 2322 | 2322 | iocg->hweight_donating = hwa; |
| 2323 | 2323 | iocg->hweight_after_donation = new_hwi; |
| 2324 | 2324 | list_add(&iocg->surplus_list, &surpluses); |
| 2325 | − } else { | |
| 2325 | + } else if (!iocg->abs_vdebt) { | |
| 2326 | + /* | |
| 2327 | + * @iocg doesn't have enough to donate. Reset | |
| 2328 | + * its inuse to active. | |
| 2329 | + * | |
| 2330 | + * Don't reset debtors as their inuse's are | |
| 2331 | + * owned by debt handling. This shouldn't affect | |
| 2332 | + * donation calculuation in any meaningful way | |
| 2333 | + * as @iocg doesn't have a meaningful amount of | |
| 2334 | + * share anyway. | |
| 2335 | + */ | |
| 2326 | 2336 | TRACE_IOCG_PATH(inuse_shortage, iocg, &now, |
| 2327 | 2337 | iocg->inuse, iocg->active, |
| 2328 | 2338 | iocg->hweight_inuse, new_hwi); |
| @@ -794,7 +794,8 @@ bool blk_update_request(struct request *req, blk_status_t error, · 793 unmodified lines | ||
| 794 | 794 | #endif |
| 795 | 795 | |
| 796 | 796 | if (unlikely(error && !blk_rq_is_passthrough(req) && |
| 797 | − !(req->rq_flags & RQF_QUIET))) { | |
| 797 | + !(req->rq_flags & RQF_QUIET)) && | |
| 798 | + !test_bit(GD_DEAD, &req->q->disk->state)) { | |
| 798 | 799 | blk_print_req_error(req, error); |
| 799 | 800 | trace_block_rq_error(req, error, nr_bytes); |
| 800 | 801 | } |
| @@ -1130,14 +1131,7 @@ void blk_mq_start_request(struct request *rq) · 329 unmodified lines | ||
| 1130 | 1131 | trace_block_rq_issue(rq); |
| 1131 | 1132 | |
| 1132 | 1133 | if (test_bit(QUEUE_FLAG_STATS, &q->queue_flags)) { |
| 1133 | − u64 start_time; | |
| 1134 | −#ifdef CONFIG_BLK_CGROUP | |
| 1135 | − if (rq->bio) | |
| 1136 | − start_time = bio_issue_time(&rq->bio->bi_issue); | |
| 1137 | − else | |
| 1138 | −#endif | |
| 1139 | − start_time = ktime_get_ns(); | |
| 1140 | − rq->io_start_time_ns = start_time; | |
| 1134 | + rq->io_start_time_ns = ktime_get_ns(); | |
| 1141 | 1135 | rq->stats_sectors = blk_rq_sectors(rq); |
| 1142 | 1136 | rq->rq_flags |= RQF_STATS; |
| 1143 | 1137 | rq_qos_issue(q, rq); |
| @@ -629,7 +629,7 @@ long compat_blkdev_ioctl(struct file *file, unsigned cmd, unsigned long arg) · 628 unmodified lines | ||
| 629 | 629 | return compat_put_long(argp, |
| 630 | 630 | (bdev->bd_disk->bdi->ra_pages * PAGE_SIZE) / 512); |
| 631 | 631 | case BLKGETSIZE: |
| 632 | − if (bdev_nr_sectors(bdev) > ~0UL) | |
| 632 | + if (bdev_nr_sectors(bdev) > ~(compat_ulong_t)0) | |
| 633 | 633 | return -EFBIG; |
| 634 | 634 | return compat_put_ulong(argp, bdev_nr_sectors(bdev)); |
| 635 | 635 | |
| @@ -96,11 +96,6 @@ static const struct dmi_system_id processor_power_dmi_table[] = { · 95 unmodified lines | ||
| 96 | 96 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), |
| 97 | 97 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, |
| 98 | 98 | (void *)1}, |
| 99 | − /* T40 can not handle C3 idle state */ | |
| 100 | − { set_max_cstate, "IBM ThinkPad T40", { | |
| 101 | − DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
| 102 | − DMI_MATCH(DMI_PRODUCT_NAME, "23737CU")}, | |
| 103 | − (void *)2}, | |
| 104 | 99 | {}, |
| 105 | 100 | }; |
| 106 | 101 | |
| @@ -795,7 +790,8 @@ static int acpi_processor_setup_cstates(struct acpi_processor *pr) · 688 unmodified lines | ||
| 795 | 790 | if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 || |
| 796 | 791 | cx->type == ACPI_STATE_C3) { |
| 797 | 792 | state->enter_dead = acpi_idle_play_dead; |
| 798 | − drv->safe_state_index = count; | |
| 793 | + if (cx->type != ACPI_STATE_C3) | |
| 794 | + drv->safe_state_index = count; | |
| 799 | 795 | } |
| 800 | 796 | /* |
| 801 | 797 | * Halt-induced C1 is not good for ->enter_s2idle, because it |
| @@ -2295,6 +2295,7 @@ static int binder_do_deferred_txn_copies(struct binder_alloc *alloc, · 2294 unmodified lines | ||
| 2295 | 2295 | { |
| 2296 | 2296 | int ret = 0; |
| 2297 | 2297 | struct binder_sg_copy *sgc, *tmpsgc; |
| 2298 | + struct binder_ptr_fixup *tmppf; | |
| 2298 | 2299 | struct binder_ptr_fixup *pf = |
| 2299 | 2300 | list_first_entry_or_null(pf_head, struct binder_ptr_fixup, |
| 2300 | 2301 | node); |
| @@ -2349,7 +2350,11 @@ static int binder_do_deferred_txn_copies(struct binder_alloc *alloc, · 48 unmodified lines | ||
| 2349 | 2350 | list_del(&sgc->node); |
| 2350 | 2351 | kfree(sgc); |
| 2351 | 2352 | } |
| 2352 | − BUG_ON(!list_empty(pf_head)); | |
| 2353 | + list_for_each_entry_safe(pf, tmppf, pf_head, node) { | |
| 2354 | + BUG_ON(pf->skip_size == 0); | |
| 2355 | + list_del(&pf->node); | |
| 2356 | + kfree(pf); | |
| 2357 | + } | |
| 2353 | 2358 | BUG_ON(!list_empty(sgc_head)); |
| 2354 | 2359 | |
| 2355 | 2360 | return ret > 0 ? -EINVAL : ret; |
| @@ -2486,6 +2491,9 @@ static int binder_translate_fd_array(struct list_head *pf_head, · 130 unmodified lines | ||
| 2486 | 2491 | struct binder_proc *proc = thread->proc; |
| 2487 | 2492 | int ret; |
| 2488 | 2493 | |
| 2494 | + if (fda->num_fds == 0) | |
| 2495 | + return 0; | |
| 2496 | + | |
| 2489 | 2497 | fd_buf_size = sizeof(u32) * fda->num_fds; |
| 2490 | 2498 | if (fda->num_fds >= SIZE_MAX / sizeof(u32)) { |
| 2491 | 2499 | binder_user_error("%d:%d got transaction with invalid number of fds (%lld)\n", |
| @@ -77,6 +77,8 @@ static int marvell_cable_detect(struct ata_port *ap) · 76 unmodified lines | ||
| 77 | 77 | switch(ap->port_no) |
| 78 | 78 | { |
| 79 | 79 | case 0: |
| 80 | + if (!ap->ioaddr.bmdma_addr) | |
| 81 | + return ATA_CBL_PATA_UNK; | |
| 80 | 82 | if (ioread8(ap->ioaddr.bmdma_addr + 1) & 1) |
| 81 | 83 | return ATA_CBL_PATA40; |
| 82 | 84 | return ATA_CBL_PATA80; |
| @@ -667,6 +667,15 @@ const struct cpumask *cpu_coregroup_mask(int cpu) · 666 unmodified lines | ||
| 667 | 667 | core_mask = &cpu_topology[cpu].llc_sibling; |
| 668 | 668 | } |
| 669 | 669 | |
| 670 | + /* | |
| 671 | + * For systems with no shared cpu-side LLC but with clusters defined, | |
| 672 | + * extend core_mask to cluster_siblings. The sched domain builder will | |
| 673 | + * then remove MC as redundant with CLS if SCHED_CLUSTER is enabled. | |
| 674 | + */ | |
| 675 | + if (IS_ENABLED(CONFIG_SCHED_CLUSTER) && | |
| 676 | + cpumask_subset(core_mask, &cpu_topology[cpu].cluster_sibling)) | |
| 677 | + core_mask = &cpu_topology[cpu].cluster_sibling; | |
| 678 | + | |
| 670 | 679 | return core_mask; |
| 671 | 680 | } |
| 672 | 681 | |
| @@ -684,7 +693,7 @@ void update_siblings_masks(unsigned int cpuid) · 11 unmodified lines | ||
| 684 | 693 | for_each_online_cpu(cpu) { |
| 685 | 694 | cpu_topo = &cpu_topology[cpu]; |
| 686 | 695 | |
| 687 | − if (cpuid_topo->llc_id == cpu_topo->llc_id) { | |
| 696 | + if (cpu_topo->llc_id != -1 && cpuid_topo->llc_id == cpu_topo->llc_id) { | |
| 688 | 697 | cpumask_set_cpu(cpu, &cpuid_topo->llc_sibling); |
| 689 | 698 | cpumask_set_cpu(cpuid, &cpu_topo->llc_sibling); |
| 690 | 699 | } |
| @@ -296,6 +296,7 @@ int driver_deferred_probe_check_state(struct device *dev) · 295 unmodified lines | ||
| 296 | 296 | |
| 297 | 297 | return -EPROBE_DEFER; |
| 298 | 298 | } |
| 299 | +EXPORT_SYMBOL_GPL(driver_deferred_probe_check_state); | |
| 299 | 300 | |
| 300 | 301 | static void deferred_probe_timeout_work_func(struct work_struct *work) |
| 301 | 302 | { |
| @@ -152,9 +152,19 @@ static struct attribute *default_attrs[] = { · 151 unmodified lines | ||
| 152 | 152 | NULL |
| 153 | 153 | }; |
| 154 | 154 | |
| 155 | +static umode_t topology_is_visible(struct kobject *kobj, | |
| 156 | + struct attribute *attr, int unused) | |
| 157 | +{ | |
| 158 | + if (attr == &dev_attr_ppin.attr && !topology_ppin(kobj_to_dev(kobj)->id)) | |
| 159 | + return 0; | |
| 160 | + | |
| 161 | + return attr->mode; | |
| 162 | +} | |
| 163 | + | |
| 155 | 164 | static const struct attribute_group topology_attr_group = { |
| 156 | 165 | .attrs = default_attrs, |
| 157 | 166 | .bin_attrs = bin_attrs, |
| 167 | + .is_visible = topology_is_visible, | |
| 158 | 168 | .name = "topology" |
| 159 | 169 | }; |
| 160 | 170 | |
| @@ -33,6 +33,22 @@ config BLK_DEV_FD · 32 unmodified lines | ||
| 33 | 33 | To compile this driver as a module, choose M here: the |
| 34 | 34 | module will be called floppy. |
| 35 | 35 | |
| 36 | +config BLK_DEV_FD_RAWCMD | |
| 37 | + bool "Support for raw floppy disk commands (DEPRECATED)" | |
| 38 | + depends on BLK_DEV_FD | |
| 39 | + help | |
| 40 | + If you want to use actual physical floppies and expect to do | |
| 41 | + special low-level hardware accesses to them (access and use | |
| 42 | + non-standard formats, for example), then enable this. | |
| 43 | + | |
| 44 | + Note that the code enabled by this option is rarely used and | |
| 45 | + might be unstable or insecure, and distros should not enable it. | |
| 46 | + | |
| 47 | + Note: FDRAWCMD is deprecated and will be removed from the kernel | |
| 48 | + in the near future. | |
| 49 | + | |
| 50 | + If unsure, say N. | |
| 51 | + | |
| 36 | 52 | config AMIGA_FLOPPY |
| 37 | 53 | tristate "Amiga floppy support" |
| 38 | 54 | depends on AMIGA |
| @@ -2982,6 +2982,8 @@ static const char *drive_name(int type, int drive) · 2981 unmodified lines | ||
| 2982 | 2982 | return "(null)"; |
| 2983 | 2983 | } |
| 2984 | 2984 | |
| 2985 | +#ifdef CONFIG_BLK_DEV_FD_RAWCMD | |
| 2986 | + | |
| 2985 | 2987 | /* raw commands */ |
| 2986 | 2988 | static void raw_cmd_done(int flag) |
| 2987 | 2989 | { |
| @@ -3181,6 +3183,35 @@ static int raw_cmd_ioctl(int cmd, void __user *param) · 193 unmodified lines | ||
| 3181 | 3183 | return ret; |
| 3182 | 3184 | } |
| 3183 | 3185 | |
| 3186 | +static int floppy_raw_cmd_ioctl(int type, int drive, int cmd, | |
| 3187 | + void __user *param) | |
| 3188 | +{ | |
| 3189 | + int ret; | |
| 3190 | + | |
| 3191 | + pr_warn_once("Note: FDRAWCMD is deprecated and will be removed from the kernel in the near future.\n"); | |
| 3192 | + | |
| 3193 | + if (type) | |
| 3194 | + return -EINVAL; | |
| 3195 | + if (lock_fdc(drive)) | |
| 3196 | + return -EINTR; | |
| 3197 | + set_floppy(drive); | |
| 3198 | + ret = raw_cmd_ioctl(cmd, param); | |
| 3199 | + if (ret == -EINTR) | |
| 3200 | + return -EINTR; | |
| 3201 | + process_fd_request(); | |
| 3202 | + return ret; | |
| 3203 | +} | |
| 3204 | + | |
| 3205 | +#else /* CONFIG_BLK_DEV_FD_RAWCMD */ | |
| 3206 | + | |
| 3207 | +static int floppy_raw_cmd_ioctl(int type, int drive, int cmd, | |
| 3208 | + void __user *param) | |
| 3209 | +{ | |
| 3210 | + return -EOPNOTSUPP; | |
| 3211 | +} | |
| 3212 | + | |
| 3213 | +#endif | |
| 3214 | + | |
| 3184 | 3215 | static int invalidate_drive(struct block_device *bdev) |
| 3185 | 3216 | { |
| 3186 | 3217 | /* invalidate the buffer track to force a reread */ |
| @@ -3369,7 +3400,6 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, unsigned int · 182 unmodified lines | ||
| 3369 | 3400 | { |
| 3370 | 3401 | int drive = (long)bdev->bd_disk->private_data; |
| 3371 | 3402 | int type = ITYPE(drive_state[drive].fd_device); |
| 3372 | − int i; | |
| 3373 | 3403 | int ret; |
| 3374 | 3404 | int size; |
| 3375 | 3405 | union inparam { |
| @@ -3520,16 +3550,7 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, unsigned int · 144 unmodified lines | ||
| 3520 | 3550 | outparam = &write_errors[drive]; |
| 3521 | 3551 | break; |
| 3522 | 3552 | case FDRAWCMD: |
| 3523 | − if (type) | |
| 3524 | − return -EINVAL; | |
| 3525 | − if (lock_fdc(drive)) | |
| 3526 | − return -EINTR; | |
| 3527 | − set_floppy(drive); | |
| 3528 | − i = raw_cmd_ioctl(cmd, (void __user *)param); | |
| 3529 | − if (i == -EINTR) | |
| 3530 | − return -EINTR; | |
| 3531 | − process_fd_request(); | |
| 3532 | − return i; | |
| 3553 | + return floppy_raw_cmd_ioctl(type, drive, cmd, (void __user *)param); | |
| 3533 | 3554 | case FDTWADDLE: |
| 3534 | 3555 | if (lock_fdc(drive)) |
| 3535 | 3556 | return -EINTR; |
| @@ -1600,7 +1600,7 @@ static enum blk_eh_timer_return null_timeout_rq(struct request *rq, bool res) · 1599 unmodified lines | ||
| 1600 | 1600 | * Only fake timeouts need to execute blk_mq_complete_request() here. |
| 1601 | 1601 | */ |
| 1602 | 1602 | cmd->error = BLK_STS_TIMEOUT; |
| 1603 | − if (cmd->fake_timeout) | |
| 1603 | + if (cmd->fake_timeout || hctx->type == HCTX_TYPE_POLL) | |
| 1604 | 1604 | blk_mq_complete_request(rq); |
| 1605 | 1605 | return BLK_EH_DONE; |
| 1606 | 1606 | } |
| @@ -224,8 +224,12 @@ int fsl_mc_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count) · 223 unmodified lines | ||
| 224 | 224 | if (error) |
| 225 | 225 | return error; |
| 226 | 226 | |
| 227 | + msi_lock_descs(dev); | |
| 227 | 228 | if (msi_first_desc(dev, MSI_DESC_ALL)) |
| 228 | − return -EINVAL; | |
| 229 | + error = -EINVAL; | |
| 230 | + msi_unlock_descs(dev); | |
| 231 | + if (error) | |
| 232 | + return error; | |
| 229 | 233 | |
| 230 | 234 | /* |
| 231 | 235 | * NOTE: Calling this function will trigger the invocation of the |
| @@ -352,8 +352,7 @@ static int of_weim_notify(struct notifier_block *nb, unsigned long action, · 351 unmodified lines | ||
| 352 | 352 | |
| 353 | 353 | pdev = of_find_device_by_node(rd->dn); |
| 354 | 354 | if (!pdev) { |
| 355 | − dev_err(&pdev->dev, | |
| 356 | − "Could not find platform device for '%pOF'\n", | |
| 355 | + pr_err("Could not find platform device for '%pOF'\n", | |
| 357 | 356 | rd->dn); |
| 358 | 357 | |
| 359 | 358 | ret = notifier_from_errno(-EINVAL); |
| @@ -370,7 +369,7 @@ static int of_weim_notify(struct notifier_block *nb, unsigned long action, · 10 unmodified lines | ||
| 370 | 369 | return ret; |
| 371 | 370 | } |
| 372 | 371 | |
| 373 | −struct notifier_block weim_of_notifier = { | |
| 372 | +static struct notifier_block weim_of_notifier = { | |
| 374 | 373 | .notifier_call = of_weim_notify, |
| 375 | 374 | }; |
| 376 | 375 | #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */ |
| @@ -1060,6 +1060,7 @@ static int __maybe_unused mhi_pci_freeze(struct device *dev) · 1059 unmodified lines | ||
| 1060 | 1060 | * the intermediate restore kernel reinitializes MHI device with new |
| 1061 | 1061 | * context. |
| 1062 | 1062 | */ |
| 1063 | + flush_work(&mhi_pdev->recovery_work); | |
| 1063 | 1064 | if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { |
| 1064 | 1065 | mhi_power_down(mhi_cntrl, true); |
| 1065 | 1066 | mhi_unprepare_after_power_down(mhi_cntrl); |
| @@ -1085,6 +1086,7 @@ static const struct dev_pm_ops mhi_pci_pm_ops = { · 19 unmodified lines | ||
| 1085 | 1086 | .resume = mhi_pci_resume, |
| 1086 | 1087 | .freeze = mhi_pci_freeze, |
| 1087 | 1088 | .thaw = mhi_pci_restore, |
| 1089 | + .poweroff = mhi_pci_freeze, | |
| 1088 | 1090 | .restore = mhi_pci_restore, |
| 1089 | 1091 | #endif |
| 1090 | 1092 | }; |
| @@ -227,6 +227,8 @@ static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb, · 226 unmodified lines | ||
| 227 | 227 | |
| 228 | 228 | dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev)); |
| 229 | 229 | |
| 230 | + return rdev; | |
| 231 | + | |
| 230 | 232 | err_device_add: |
| 231 | 233 | put_device(&rdev->dev); |
| 232 | 234 | |
| @@ -3232,13 +3232,27 @@ static int sysc_check_disabled_devices(struct sysc *ddata) · 3231 unmodified lines | ||
| 3232 | 3232 | */ |
| 3233 | 3233 | static int sysc_check_active_timer(struct sysc *ddata) |
| 3234 | 3234 | { |
| 3235 | + int error; | |
| 3236 | + | |
| 3235 | 3237 | if (ddata->cap->type != TI_SYSC_OMAP2_TIMER && |
| 3236 | 3238 | ddata->cap->type != TI_SYSC_OMAP4_TIMER) |
| 3237 | 3239 | return 0; |
| 3238 | 3240 | |
| 3241 | + /* | |
| 3242 | + * Quirk for omap3 beagleboard revision A to B4 to use gpt12. | |
| 3243 | + * Revision C and later are fixed with commit 23885389dbbb ("ARM: | |
| 3244 | + * dts: Fix timer regression for beagleboard revision c"). This all | |
| 3245 | + * can be dropped if we stop supporting old beagleboard revisions | |
| 3246 | + * A to B4 at some point. | |
| 3247 | + */ | |
| 3248 | + if (sysc_soc->soc == SOC_3430) | |
| 3249 | + error = -ENXIO; | |
| 3250 | + else | |
| 3251 | + error = -EBUSY; | |
| 3252 | + | |
| 3239 | 3253 | if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) && |
| 3240 | 3254 | (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE)) |
| 3241 | − return -ENXIO; | |
| 3255 | + return error; | |
| 3242 | 3256 | |
| 3243 | 3257 | return 0; |
| 3244 | 3258 | } |
| @@ -318,6 +318,13 @@ static void crng_reseed(bool force) · 317 unmodified lines | ||
| 318 | 318 | * the resultant ChaCha state to the user, along with the second |
| 319 | 319 | * half of the block containing 32 bytes of random data that may |
| 320 | 320 | * be used; random_data_len may not be greater than 32. |
| 321 | + * | |
| 322 | + * The returned ChaCha state contains within it a copy of the old | |
| 323 | + * key value, at index 4, so the state should always be zeroed out | |
| 324 | + * immediately after using in order to maintain forward secrecy. | |
| 325 | + * If the state cannot be erased in a timely manner, then it is | |
| 326 | + * safer to set the random_data parameter to &chacha_state[4] so | |
| 327 | + * that this function overwrites it before returning. | |
| 321 | 328 | */ |
| 322 | 329 | static void crng_fast_key_erasure(u8 key[CHACHA_KEY_SIZE], |
| 323 | 330 | u32 chacha_state[CHACHA_STATE_WORDS], |
| @@ -523,8 +530,7 @@ EXPORT_SYMBOL(get_random_bytes); · 199 unmodified lines | ||
| 523 | 530 | |
| 524 | 531 | static ssize_t get_random_bytes_user(void __user *buf, size_t nbytes) |
| 525 | 532 | { |
| 526 | − ssize_t ret = 0; | |
| 527 | − size_t len; | |
| 533 | + size_t len, left, ret = 0; | |
| 528 | 534 | u32 chacha_state[CHACHA_STATE_WORDS]; |
| 529 | 535 | u8 output[CHACHA_BLOCK_SIZE]; |
| 530 | 536 | |
| @@ -543,37 +549,40 @@ static ssize_t get_random_bytes_user(void __user *buf, size_t nbytes) · 12 unmodified lines | ||
| 543 | 549 | * the user directly. |
| 544 | 550 | */ |
| 545 | 551 | if (nbytes <= CHACHA_KEY_SIZE) { |
| 546 | − ret = copy_to_user(buf, &chacha_state[4], nbytes) ? -EFAULT : nbytes; | |
| 552 | + ret = nbytes - copy_to_user(buf, &chacha_state[4], nbytes); | |
| 547 | 553 | goto out_zero_chacha; |
| 548 | 554 | } |
| 549 | 555 | |
| 550 | − do { | |
| 556 | + for (;;) { | |
| 551 | 557 | chacha20_block(chacha_state, output); |
| 552 | 558 | if (unlikely(chacha_state[12] == 0)) |
| 553 | 559 | ++chacha_state[13]; |
| 554 | 560 | |
| 555 | 561 | len = min_t(size_t, nbytes, CHACHA_BLOCK_SIZE); |
| 556 | − if (copy_to_user(buf, output, len)) { | |
| 557 | − ret = -EFAULT; | |
| 562 | + left = copy_to_user(buf, output, len); | |
| 563 | + if (left) { | |
| 564 | + ret += len - left; | |
| 558 | 565 | break; |
| 559 | 566 | } |
| 560 | 567 | |
| 561 | − nbytes -= len; | |
| 562 | 568 | buf += len; |
| 563 | 569 | ret += len; |
| 570 | + nbytes -= len; | |
| 571 | + if (!nbytes) | |
| 572 | + break; | |
| 564 | 573 | |
| 565 | 574 | BUILD_BUG_ON(PAGE_SIZE % CHACHA_BLOCK_SIZE != 0); |
| 566 | − if (!(ret % PAGE_SIZE) && nbytes) { | |
| 575 | + if (ret % PAGE_SIZE == 0) { | |
| 567 | 576 | if (signal_pending(current)) |
| 568 | 577 | break; |
| 569 | 578 | cond_resched(); |
| 570 | 579 | } |
| 571 | − } while (nbytes); | |
| 580 | + } | |
| 572 | 581 | |
| 573 | 582 | memzero_explicit(output, sizeof(output)); |
| 574 | 583 | out_zero_chacha: |
| 575 | 584 | memzero_explicit(chacha_state, sizeof(chacha_state)); |
| 576 | − return ret; | |
| 585 | + return ret ? ret : -EFAULT; | |
| 577 | 586 | } |
| 578 | 587 | |
| 579 | 588 | /* |
| @@ -1016,7 +1025,7 @@ int __init rand_initialize(void) · 436 unmodified lines | ||
| 1016 | 1025 | */ |
| 1017 | 1026 | void add_device_randomness(const void *buf, size_t size) |
| 1018 | 1027 | { |
| 1019 | − cycles_t cycles = random_get_entropy(); | |
| 1028 | + unsigned long cycles = random_get_entropy(); | |
| 1020 | 1029 | unsigned long flags, now = jiffies; |
| 1021 | 1030 | |
| 1022 | 1031 | if (crng_init == 0 && size) |
| @@ -1047,8 +1056,7 @@ struct timer_rand_state { · 24 unmodified lines | ||
| 1047 | 1056 | */ |
| 1048 | 1057 | static void add_timer_randomness(struct timer_rand_state *state, unsigned int num) |
| 1049 | 1058 | { |
| 1050 | − cycles_t cycles = random_get_entropy(); | |
| 1051 | − unsigned long flags, now = jiffies; | |
| 1059 | + unsigned long cycles = random_get_entropy(), now = jiffies, flags; | |
| 1052 | 1060 | long delta, delta2, delta3; |
| 1053 | 1061 | |
| 1054 | 1062 | spin_lock_irqsave(&input_pool.lock, flags); |
| @@ -1337,8 +1345,7 @@ static void mix_interrupt_randomness(struct work_struct *work) · 282 unmodified lines | ||
| 1337 | 1345 | void add_interrupt_randomness(int irq) |
| 1338 | 1346 | { |
| 1339 | 1347 | enum { MIX_INFLIGHT = 1U << 31 }; |
| 1340 | − cycles_t cycles = random_get_entropy(); | |
| 1341 | − unsigned long now = jiffies; | |
| 1348 | + unsigned long cycles = random_get_entropy(), now = jiffies; | |
| 1342 | 1349 | struct fast_pool *fast_pool = this_cpu_ptr(&irq_randomness); |
| 1343 | 1350 | struct pt_regs *regs = get_irq_regs(); |
| 1344 | 1351 | unsigned int new_count; |
| @@ -1351,16 +1358,12 @@ void add_interrupt_randomness(int irq) · 6 unmodified lines | ||
| 1351 | 1358 | if (cycles == 0) |
| 1352 | 1359 | cycles = get_reg(fast_pool, regs); |
| 1353 | 1360 | |
| 1354 | − if (sizeof(cycles) == 8) | |
| 1361 | + if (sizeof(unsigned long) == 8) { | |
| 1355 | 1362 | irq_data.u64[0] = cycles ^ rol64(now, 32) ^ irq; |
| 1356 | − else { | |
| 1363 | + irq_data.u64[1] = regs ? instruction_pointer(regs) : _RET_IP_; | |
| 1364 | + } else { | |
| 1357 | 1365 | irq_data.u32[0] = cycles ^ irq; |
| 1358 | 1366 | irq_data.u32[1] = now; |
| 1359 | − } | |
| 1360 | − | |
| 1361 | − if (sizeof(unsigned long) == 8) | |
| 1362 | − irq_data.u64[1] = regs ? instruction_pointer(regs) : _RET_IP_; | |
| 1363 | − else { | |
| 1364 | 1367 | irq_data.u32[2] = regs ? instruction_pointer(regs) : _RET_IP_; |
| 1365 | 1368 | irq_data.u32[3] = get_reg(fast_pool, regs); |
| 1366 | 1369 | } |
| @@ -1407,7 +1410,7 @@ static void entropy_timer(struct timer_list *t) · 40 unmodified lines | ||
| 1407 | 1410 | static void try_to_generate_entropy(void) |
| 1408 | 1411 | { |
| 1409 | 1412 | struct { |
| 1410 | − cycles_t cycles; | |
| 1413 | + unsigned long cycles; | |
| 1411 | 1414 | struct timer_list timer; |
| 1412 | 1415 | } stack; |
| 1413 | 1416 | |
| @@ -11,20 +11,48 @@ · 10 unmodified lines | ||
| 11 | 11 | #include <dt-bindings/clock/microchip,mpfs-clock.h> |
| 12 | 12 | |
| 13 | 13 | /* address offset of control registers */ |
| 14 | +#define REG_MSSPLL_REF_CR 0x08u | |
| 15 | +#define REG_MSSPLL_POSTDIV_CR 0x10u | |
| 16 | +#define REG_MSSPLL_SSCG_2_CR 0x2Cu | |
| 14 | 17 | #define REG_CLOCK_CONFIG_CR 0x08u |
| 18 | +#define REG_RTC_CLOCK_CR 0x0Cu | |
| 15 | 19 | #define REG_SUBBLK_CLOCK_CR 0x84u |
| 16 | 20 | #define REG_SUBBLK_RESET_CR 0x88u |
| 17 | 21 | |
| 22 | +#define MSSPLL_FBDIV_SHIFT 0x00u | |
| 23 | +#define MSSPLL_FBDIV_WIDTH 0x0Cu | |
| 24 | +#define MSSPLL_REFDIV_SHIFT 0x08u | |
| 25 | +#define MSSPLL_REFDIV_WIDTH 0x06u | |
| 26 | +#define MSSPLL_POSTDIV_SHIFT 0x08u | |
| 27 | +#define MSSPLL_POSTDIV_WIDTH 0x07u | |
| 28 | +#define MSSPLL_FIXED_DIV 4u | |
| 29 | + | |
| 18 | 30 | struct mpfs_clock_data { |
| 19 | 31 | void __iomem *base; |
| 32 | + void __iomem *msspll_base; | |
| 20 | 33 | struct clk_hw_onecell_data hw_data; |
| 21 | 34 | }; |
| 22 | 35 | |
| 36 | +struct mpfs_msspll_hw_clock { | |
| 37 | + void __iomem *base; | |
| 38 | + unsigned int id; | |
| 39 | + u32 reg_offset; | |
| 40 | + u32 shift; | |
| 41 | + u32 width; | |
| 42 | + u32 flags; | |
| 43 | + struct clk_hw hw; | |
| 44 | + struct clk_init_data init; | |
| 45 | +}; | |
| 46 | + | |
| 47 | +#define to_mpfs_msspll_clk(_hw) container_of(_hw, struct mpfs_msspll_hw_clock, hw) | |
| 48 | + | |
| 23 | 49 | struct mpfs_cfg_clock { |
| 24 | 50 | const struct clk_div_table *table; |
| 25 | 51 | unsigned int id; |
| 52 | + u32 reg_offset; | |
| 26 | 53 | u8 shift; |
| 27 | 54 | u8 width; |
| 55 | + u8 flags; | |
| 28 | 56 | }; |
| 29 | 57 | |
| 30 | 58 | struct mpfs_cfg_hw_clock { |
| @@ -55,7 +83,7 @@ struct mpfs_periph_hw_clock { · 24 unmodified lines | ||
| 55 | 83 | */ |
| 56 | 84 | static DEFINE_SPINLOCK(mpfs_clk_lock); |
| 57 | 85 | |
| 58 | −static const struct clk_parent_data mpfs_cfg_parent[] = { | |
| 86 | +static const struct clk_parent_data mpfs_ext_ref[] = { | |
| 59 | 87 | { .index = 0 }, |
| 60 | 88 | }; |
| 61 | 89 | |
| @@ -69,6 +97,86 @@ static const struct clk_div_table mpfs_div_ahb_table[] = { · 7 unmodified lines | ||
| 69 | 97 | { 0, 0 } |
| 70 | 98 | }; |
| 71 | 99 | |
| 100 | +/* | |
| 101 | + * The only two supported reference clock frequencies for the PolarFire SoC are | |
| 102 | + * 100 and 125 MHz, as the rtc reference is required to be 1 MHz. | |
| 103 | + * It therefore only needs to have divider table entries corresponding to | |
| 104 | + * divide by 100 and 125. | |
| 105 | + */ | |
| 106 | +static const struct clk_div_table mpfs_div_rtcref_table[] = { | |
| 107 | + { 100, 100 }, { 125, 125 }, | |
| 108 | + { 0, 0 } | |
| 109 | +}; | |
| 110 | + | |
| 111 | +static unsigned long mpfs_clk_msspll_recalc_rate(struct clk_hw *hw, unsigned long prate) | |
| 112 | +{ | |
| 113 | + struct mpfs_msspll_hw_clock *msspll_hw = to_mpfs_msspll_clk(hw); | |
| 114 | + void __iomem *mult_addr = msspll_hw->base + msspll_hw->reg_offset; | |
| 115 | + void __iomem *ref_div_addr = msspll_hw->base + REG_MSSPLL_REF_CR; | |
| 116 | + void __iomem *postdiv_addr = msspll_hw->base + REG_MSSPLL_POSTDIV_CR; | |
| 117 | + u32 mult, ref_div, postdiv; | |
| 118 | + | |
| 119 | + mult = readl_relaxed(mult_addr) >> MSSPLL_FBDIV_SHIFT; | |
| 120 | + mult &= clk_div_mask(MSSPLL_FBDIV_WIDTH); | |
| 121 | + ref_div = readl_relaxed(ref_div_addr) >> MSSPLL_REFDIV_SHIFT; | |
| 122 | + ref_div &= clk_div_mask(MSSPLL_REFDIV_WIDTH); | |
| 123 | + postdiv = readl_relaxed(postdiv_addr) >> MSSPLL_POSTDIV_SHIFT; | |
| 124 | + postdiv &= clk_div_mask(MSSPLL_POSTDIV_WIDTH); | |
| 125 | + | |
| 126 | + return prate * mult / (ref_div * MSSPLL_FIXED_DIV * postdiv); | |
| 127 | +} | |
| 128 | + | |
| 129 | +static const struct clk_ops mpfs_clk_msspll_ops = { | |
| 130 | + .recalc_rate = mpfs_clk_msspll_recalc_rate, | |
| 131 | +}; | |
| 132 | + | |
| 133 | +#define CLK_PLL(_id, _name, _parent, _shift, _width, _flags, _offset) { \ | |
| 134 | + .id = _id, \ | |
| 135 | + .shift = _shift, \ | |
| 136 | + .width = _width, \ | |
| 137 | + .reg_offset = _offset, \ | |
| 138 | + .flags = _flags, \ | |
| 139 | + .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, _parent, &mpfs_clk_msspll_ops, 0), \ | |
| 140 | +} | |
| 141 | + | |
| 142 | +static struct mpfs_msspll_hw_clock mpfs_msspll_clks[] = { | |
| 143 | + CLK_PLL(CLK_MSSPLL, "clk_msspll", mpfs_ext_ref, MSSPLL_FBDIV_SHIFT, | |
| 144 | + MSSPLL_FBDIV_WIDTH, 0, REG_MSSPLL_SSCG_2_CR), | |
| 145 | +}; | |
| 146 | + | |
| 147 | +static int mpfs_clk_register_msspll(struct device *dev, struct mpfs_msspll_hw_clock *msspll_hw, | |
| 148 | + void __iomem *base) | |
| 149 | +{ | |
| 150 | + msspll_hw->base = base; | |
| 151 | + | |
| 152 | + return devm_clk_hw_register(dev, &msspll_hw->hw); | |
| 153 | +} | |
| 154 | + | |
| 155 | +static int mpfs_clk_register_mssplls(struct device *dev, struct mpfs_msspll_hw_clock *msspll_hws, | |
| 156 | + unsigned int num_clks, struct mpfs_clock_data *data) | |
| 157 | +{ | |
| 158 | + void __iomem *base = data->msspll_base; | |
| 159 | + unsigned int i; | |
| 160 | + int ret; | |
| 161 | + | |
| 162 | + for (i = 0; i < num_clks; i++) { | |
| 163 | + struct mpfs_msspll_hw_clock *msspll_hw = &msspll_hws[i]; | |
| 164 | + | |
| 165 | + ret = mpfs_clk_register_msspll(dev, msspll_hw, base); | |
| 166 | + if (ret) | |
| 167 | + return dev_err_probe(dev, ret, "failed to register msspll id: %d\n", | |
| 168 | + CLK_MSSPLL); | |
| 169 | + | |
| 170 | + data->hw_data.hws[msspll_hw->id] = &msspll_hw->hw; | |
| 171 | + } | |
| 172 | + | |
| 173 | + return 0; | |
| 174 | +} | |
| 175 | + | |
| 176 | +/* | |
| 177 | + * "CFG" clocks | |
| 178 | + */ | |
| 179 | + | |
| 72 | 180 | static unsigned long mpfs_cfg_clk_recalc_rate(struct clk_hw *hw, unsigned long prate) |
| 73 | 181 | { |
| 74 | 182 | struct mpfs_cfg_hw_clock *cfg_hw = to_mpfs_cfg_clk(hw); |
| @@ -76,10 +184,10 @@ static unsigned long mpfs_cfg_clk_recalc_rate(struct clk_hw *hw, unsigned long p · 1 unmodified line | ||
| 76 | 184 | void __iomem *base_addr = cfg_hw->sys_base; |
| 77 | 185 | u32 val; |
| 78 | 186 | |
| 79 | − val = readl_relaxed(base_addr + REG_CLOCK_CONFIG_CR) >> cfg->shift; | |
| 187 | + val = readl_relaxed(base_addr + cfg->reg_offset) >> cfg->shift; | |
| 80 | 188 | val &= clk_div_mask(cfg->width); |
| 81 | 189 | |
| 82 | − return prate / (1u << val); | |
| 190 | + return divider_recalc_rate(hw, prate, val, cfg->table, cfg->flags, cfg->width); | |
| 83 | 191 | } |
| 84 | 192 | |
| 85 | 193 | static long mpfs_cfg_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *prate) |
| @@ -105,11 +213,10 @@ static int mpfs_cfg_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned · 19 unmodified lines | ||
| 105 | 213 | return divider_setting; |
| 106 | 214 | |
| 107 | 215 | spin_lock_irqsave(&mpfs_clk_lock, flags); |
| 108 | − | |
| 109 | − val = readl_relaxed(base_addr + REG_CLOCK_CONFIG_CR); | |
| 216 | + val = readl_relaxed(base_addr + cfg->reg_offset); | |
| 110 | 217 | val &= ~(clk_div_mask(cfg->width) << cfg_hw->cfg.shift); |
| 111 | 218 | val |= divider_setting << cfg->shift; |
| 112 | − writel_relaxed(val, base_addr + REG_CLOCK_CONFIG_CR); | |
| 219 | + writel_relaxed(val, base_addr + cfg->reg_offset); | |
| 113 | 220 | |
| 114 | 221 | spin_unlock_irqrestore(&mpfs_clk_lock, flags); |
| 115 | 222 | |
| @@ -122,19 +229,33 @@ static const struct clk_ops mpfs_clk_cfg_ops = { · 6 unmodified lines | ||
| 122 | 229 | .set_rate = mpfs_cfg_clk_set_rate, |
| 123 | 230 | }; |
| 124 | 231 | |
| 125 | −#define CLK_CFG(_id, _name, _parent, _shift, _width, _table, _flags) { \ | |
| 126 | − .cfg.id = _id, \ | |
| 127 | − .cfg.shift = _shift, \ | |
| 128 | − .cfg.width = _width, \ | |
| 129 | − .cfg.table = _table, \ | |
| 130 | − .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, _parent, &mpfs_clk_cfg_ops, \ | |
| 131 | − _flags), \ | |
| 232 | +#define CLK_CFG(_id, _name, _parent, _shift, _width, _table, _flags, _offset) { \ | |
| 233 | + .cfg.id = _id, \ | |
| 234 | + .cfg.shift = _shift, \ | |
| 235 | + .cfg.width = _width, \ | |
| 236 | + .cfg.table = _table, \ | |
| 237 | + .cfg.reg_offset = _offset, \ | |
| 238 | + .cfg.flags = _flags, \ | |
| 239 | + .hw.init = CLK_HW_INIT(_name, _parent, &mpfs_clk_cfg_ops, 0), \ | |
| 132 | 240 | } |
| 133 | 241 | |
| 134 | 242 | static struct mpfs_cfg_hw_clock mpfs_cfg_clks[] = { |
| 135 | − CLK_CFG(CLK_CPU, "clk_cpu", mpfs_cfg_parent, 0, 2, mpfs_div_cpu_axi_table, 0), | |
| 136 | − CLK_CFG(CLK_AXI, "clk_axi", mpfs_cfg_parent, 2, 2, mpfs_div_cpu_axi_table, 0), | |
| 137 | − CLK_CFG(CLK_AHB, "clk_ahb", mpfs_cfg_parent, 4, 2, mpfs_div_ahb_table, 0), | |
| 243 | + CLK_CFG(CLK_CPU, "clk_cpu", "clk_msspll", 0, 2, mpfs_div_cpu_axi_table, 0, | |
| 244 | + REG_CLOCK_CONFIG_CR), | |
| 245 | + CLK_CFG(CLK_AXI, "clk_axi", "clk_msspll", 2, 2, mpfs_div_cpu_axi_table, 0, | |
| 246 | + REG_CLOCK_CONFIG_CR), | |
| 247 | + CLK_CFG(CLK_AHB, "clk_ahb", "clk_msspll", 4, 2, mpfs_div_ahb_table, 0, | |
| 248 | + REG_CLOCK_CONFIG_CR), | |
| 249 | + { | |
| 250 | + .cfg.id = CLK_RTCREF, | |
| 251 | + .cfg.shift = 0, | |
| 252 | + .cfg.width = 12, | |
| 253 | + .cfg.table = mpfs_div_rtcref_table, | |
| 254 | + .cfg.reg_offset = REG_RTC_CLOCK_CR, | |
| 255 | + .cfg.flags = CLK_DIVIDER_ONE_BASED, | |
| 256 | + .hw.init = | |
| 257 | + CLK_HW_INIT_PARENTS_DATA("clk_rtcref", mpfs_ext_ref, &mpfs_clk_cfg_ops, 0), | |
| 258 | + } | |
| 138 | 259 | }; |
| 139 | 260 | |
| 140 | 261 | static int mpfs_clk_register_cfg(struct device *dev, struct mpfs_cfg_hw_clock *cfg_hw, |
| @@ -160,13 +281,17 @@ static int mpfs_clk_register_cfgs(struct device *dev, struct mpfs_cfg_hw_clock * · 19 unmodified lines | ||
| 160 | 281 | return dev_err_probe(dev, ret, "failed to register clock id: %d\n", |
| 161 | 282 | cfg_hw->cfg.id); |
| 162 | 283 | |
| 163 | − id = cfg_hws[i].cfg.id; | |
| 284 | + id = cfg_hw->cfg.id; | |
| 164 | 285 | data->hw_data.hws[id] = &cfg_hw->hw; |
| 165 | 286 | } |
| 166 | 287 | |
| 167 | 288 | return 0; |
| 168 | 289 | } |
| 169 | 290 | |
| 291 | +/* | |
| 292 | + * peripheral clocks - devices connected to axi or ahb buses. | |
| 293 | + */ | |
| 294 | + | |
| 170 | 295 | static int mpfs_periph_clk_enable(struct clk_hw *hw) |
| 171 | 296 | { |
| 172 | 297 | struct mpfs_periph_hw_clock *periph_hw = to_mpfs_periph_clk(hw); |
| @@ -200,10 +325,6 @@ static void mpfs_periph_clk_disable(struct clk_hw *hw) · 27 unmodified lines | ||
| 200 | 325 | |
| 201 | 326 | spin_lock_irqsave(&mpfs_clk_lock, flags); |
| 202 | 327 | |
| 203 | − reg = readl_relaxed(base_addr + REG_SUBBLK_RESET_CR); | |
| 204 | − val = reg | (1u << periph->shift); | |
| 205 | − writel_relaxed(val, base_addr + REG_SUBBLK_RESET_CR); | |
| 206 | − | |
| 207 | 328 | reg = readl_relaxed(base_addr + REG_SUBBLK_CLOCK_CR); |
| 208 | 329 | val = reg & ~(1u << periph->shift); |
| 209 | 330 | writel_relaxed(val, base_addr + REG_SUBBLK_CLOCK_CR); |
| @@ -249,8 +370,10 @@ static const struct clk_ops mpfs_periph_clk_ops = { · 39 unmodified lines | ||
| 249 | 370 | * trap handler |
| 250 | 371 | * - CLK_MMUART0: reserved by the hss |
| 251 | 372 | * - CLK_DDRC: provides clock to the ddr subsystem |
| 252 | − * - CLK_FICx: these provide clocks for sections of the fpga fabric, disabling them would | |
| 253 | − * cause the fabric to go into reset | |
| 373 | + * - CLK_FICx: these provide the processor side clocks to the "FIC" (Fabric InterConnect) | |
| 374 | + * clock domain crossers which provide the interface to the FPGA fabric. Disabling them | |
| 375 | + * causes the FPGA fabric to go into reset. | |
| 376 | + * - CLK_ATHENA: The athena clock is FIC4, which is reserved for the Athena TeraFire. | |
| 254 | 377 | */ |
| 255 | 378 | |
| 256 | 379 | static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { |
| @@ -258,7 +381,7 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { · 1 unmodified line | ||
| 258 | 381 | CLK_PERIPH(CLK_MAC0, "clk_periph_mac0", PARENT_CLK(AHB), 1, 0), |
| 259 | 382 | CLK_PERIPH(CLK_MAC1, "clk_periph_mac1", PARENT_CLK(AHB), 2, 0), |
| 260 | 383 | CLK_PERIPH(CLK_MMC, "clk_periph_mmc", PARENT_CLK(AHB), 3, 0), |
| 261 | − CLK_PERIPH(CLK_TIMER, "clk_periph_timer", PARENT_CLK(AHB), 4, 0), | |
| 384 | + CLK_PERIPH(CLK_TIMER, "clk_periph_timer", PARENT_CLK(RTCREF), 4, 0), | |
| 262 | 385 | CLK_PERIPH(CLK_MMUART0, "clk_periph_mmuart0", PARENT_CLK(AHB), 5, CLK_IS_CRITICAL), |
| 263 | 386 | CLK_PERIPH(CLK_MMUART1, "clk_periph_mmuart1", PARENT_CLK(AHB), 6, 0), |
| 264 | 387 | CLK_PERIPH(CLK_MMUART2, "clk_periph_mmuart2", PARENT_CLK(AHB), 7, 0), |
| @@ -277,11 +400,11 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { · 12 unmodified lines | ||
| 277 | 400 | CLK_PERIPH(CLK_GPIO1, "clk_periph_gpio1", PARENT_CLK(AHB), 21, 0), |
| 278 | 401 | CLK_PERIPH(CLK_GPIO2, "clk_periph_gpio2", PARENT_CLK(AHB), 22, 0), |
| 279 | 402 | CLK_PERIPH(CLK_DDRC, "clk_periph_ddrc", PARENT_CLK(AHB), 23, CLK_IS_CRITICAL), |
| 280 | − CLK_PERIPH(CLK_FIC0, "clk_periph_fic0", PARENT_CLK(AHB), 24, CLK_IS_CRITICAL), | |
| 281 | − CLK_PERIPH(CLK_FIC1, "clk_periph_fic1", PARENT_CLK(AHB), 25, CLK_IS_CRITICAL), | |
| 282 | − CLK_PERIPH(CLK_FIC2, "clk_periph_fic2", PARENT_CLK(AHB), 26, CLK_IS_CRITICAL), | |
| 283 | − CLK_PERIPH(CLK_FIC3, "clk_periph_fic3", PARENT_CLK(AHB), 27, CLK_IS_CRITICAL), | |
| 284 | − CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AHB), 28, 0), | |
| 403 | + CLK_PERIPH(CLK_FIC0, "clk_periph_fic0", PARENT_CLK(AXI), 24, CLK_IS_CRITICAL), | |
| 404 | + CLK_PERIPH(CLK_FIC1, "clk_periph_fic1", PARENT_CLK(AXI), 25, CLK_IS_CRITICAL), | |
| 405 | + CLK_PERIPH(CLK_FIC2, "clk_periph_fic2", PARENT_CLK(AXI), 26, CLK_IS_CRITICAL), | |
| 406 | + CLK_PERIPH(CLK_FIC3, "clk_periph_fic3", PARENT_CLK(AXI), 27, CLK_IS_CRITICAL), | |
| 407 | + CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AXI), 28, CLK_IS_CRITICAL), | |
| 285 | 408 | CLK_PERIPH(CLK_CFM, "clk_periph_cfm", PARENT_CLK(AHB), 29, 0), |
| 286 | 409 | }; |
| 287 | 410 | |
| @@ -322,8 +445,9 @@ static int mpfs_clk_probe(struct platform_device *pdev) · 34 unmodified lines | ||
| 322 | 445 | unsigned int num_clks; |
| 323 | 446 | int ret; |
| 324 | 447 | |
| 325 | − /* CLK_RESERVED is not part of cfg_clks nor periph_clks, so add 1 */ | |
| 326 | − num_clks = ARRAY_SIZE(mpfs_cfg_clks) + ARRAY_SIZE(mpfs_periph_clks) + 1; | |
| 448 | + /* CLK_RESERVED is not part of clock arrays, so add 1 */ | |
| 449 | + num_clks = ARRAY_SIZE(mpfs_msspll_clks) + ARRAY_SIZE(mpfs_cfg_clks) | |
| 450 | + + ARRAY_SIZE(mpfs_periph_clks) + 1; | |
| 327 | 451 | |
| 328 | 452 | clk_data = devm_kzalloc(dev, struct_size(clk_data, hw_data.hws, num_clks), GFP_KERNEL); |
| 329 | 453 | if (!clk_data) |
| @@ -333,8 +457,17 @@ static int mpfs_clk_probe(struct platform_device *pdev) · 3 unmodified lines | ||
| 333 | 457 | if (IS_ERR(clk_data->base)) |
| 334 | 458 | return PTR_ERR(clk_data->base); |
| 335 | 459 | |
| 460 | + clk_data->msspll_base = devm_platform_ioremap_resource(pdev, 1); | |
| 461 | + if (IS_ERR(clk_data->msspll_base)) | |
| 462 | + return PTR_ERR(clk_data->msspll_base); | |
| 463 | + | |
| 336 | 464 | clk_data->hw_data.num = num_clks; |
| 337 | 465 | |
| 466 | + ret = mpfs_clk_register_mssplls(dev, mpfs_msspll_clks, ARRAY_SIZE(mpfs_msspll_clks), | |
| 467 | + clk_data); | |
| 468 | + if (ret) | |
| 469 | + return ret; | |
| 470 | + | |
| 338 | 471 | ret = mpfs_clk_register_cfgs(dev, mpfs_cfg_clks, ARRAY_SIZE(mpfs_cfg_clks), clk_data); |
| 339 | 472 | if (ret) |
| 340 | 473 | return ret; |
| @@ -818,7 +818,7 @@ EXPORT_SYMBOL_GPL(clk_pixel_ops); · 817 unmodified lines | ||
| 818 | 818 | static int clk_gfx3d_determine_rate(struct clk_hw *hw, |
| 819 | 819 | struct clk_rate_request *req) |
| 820 | 820 | { |
| 821 | − struct clk_rate_request parent_req = { }; | |
| 821 | + struct clk_rate_request parent_req = { .min_rate = 0, .max_rate = ULONG_MAX }; | |
| 822 | 822 | struct clk_rcg2_gfx3d *cgfx = to_clk_rcg2_gfx3d(hw); |
| 823 | 823 | struct clk_hw *xo, *p0, *p1, *p2; |
| 824 | 824 | unsigned long p0_rate; |
| @@ -241,6 +241,7 @@ static struct clk_init_data rtc_32k_init_data = { · 240 unmodified lines | ||
| 241 | 241 | .ops = &ccu_mux_ops, |
| 242 | 242 | .parent_hws = rtc_32k_parents, |
| 243 | 243 | .num_parents = ARRAY_SIZE(rtc_32k_parents), /* updated during probe */ |
| 244 | + .flags = CLK_IS_CRITICAL, | |
| 244 | 245 | }; |
| 245 | 246 | |
| 246 | 247 | static struct ccu_mux rtc_32k_clk = { |
| @@ -346,6 +347,7 @@ static const struct of_device_id sun6i_rtc_ccu_match[] = { · 99 unmodified lines | ||
| 346 | 347 | .compatible = "allwinner,sun50i-r329-rtc", |
| 347 | 348 | .data = &sun50i_r329_rtc_ccu_data, |
| 348 | 349 | }, |
| 350 | + {}, | |
| 349 | 351 | }; |
| 350 | 352 | |
| 351 | 353 | int sun6i_rtc_ccu_probe(struct device *dev, void __iomem *reg) |
| @@ -109,6 +109,8 @@ static int sun9i_a80_mmc_config_clk_probe(struct platform_device *pdev) · 108 unmodified lines | ||
| 109 | 109 | spin_lock_init(&data->lock); |
| 110 | 110 | |
| 111 | 111 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 112 | + if (!r) | |
| 113 | + return -EINVAL; | |
| 112 | 114 | /* one clock/reset pair per word */ |
| 113 | 115 | count = DIV_ROUND_UP((resource_size(r)), SUN9I_MMC_WIDTH); |
| 114 | 116 | data->membase = devm_ioremap_resource(&pdev->dev, r); |
| @@ -24,13 +24,17 @@ · 23 unmodified lines | ||
| 24 | 24 | #define CLK_HW_DIV 2 |
| 25 | 25 | #define LUT_TURBO_IND 1 |
| 26 | 26 | |
| 27 | +#define GT_IRQ_STATUS BIT(2) | |
| 28 | + | |
| 27 | 29 | #define HZ_PER_KHZ 1000 |
| 28 | 30 | |
| 29 | 31 | struct qcom_cpufreq_soc_data { |
| 30 | 32 | u32 reg_enable; |
| 33 | + u32 reg_domain_state; | |
| 31 | 34 | u32 reg_dcvs_ctrl; |
| 32 | 35 | u32 reg_freq_lut; |
| 33 | 36 | u32 reg_volt_lut; |
| 37 | + u32 reg_intr_clr; | |
| 34 | 38 | u32 reg_current_vote; |
| 35 | 39 | u32 reg_perf_state; |
| 36 | 40 | u8 lut_row_size; |
| @@ -280,37 +284,46 @@ static void qcom_get_related_cpus(int index, struct cpumask *m) · 243 unmodified lines | ||
| 280 | 284 | } |
| 281 | 285 | } |
| 282 | 286 | |
| 283 | −static unsigned int qcom_lmh_get_throttle_freq(struct qcom_cpufreq_data *data) | |
| 287 | +static unsigned long qcom_lmh_get_throttle_freq(struct qcom_cpufreq_data *data) | |
| 284 | 288 | { |
| 285 | − unsigned int val = readl_relaxed(data->base + data->soc_data->reg_current_vote); | |
| 289 | + unsigned int lval; | |
| 290 | + | |
| 291 | + if (data->soc_data->reg_current_vote) | |
| 292 | + lval = readl_relaxed(data->base + data->soc_data->reg_current_vote) & 0x3ff; | |
| 293 | + else | |
| 294 | + lval = readl_relaxed(data->base + data->soc_data->reg_domain_state) & 0xff; | |
| 286 | 295 | |
| 287 | − return (val & 0x3FF) * 19200; | |
| 296 | + return lval * xo_rate; | |
| 288 | 297 | } |
| 289 | 298 | |
| 290 | 299 | static void qcom_lmh_dcvs_notify(struct qcom_cpufreq_data *data) |
| 291 | 300 | { |
| 292 | 301 | struct cpufreq_policy *policy = data->policy; |
| 293 | − int cpu = cpumask_first(policy->cpus); | |
| 302 | + int cpu = cpumask_first(policy->related_cpus); | |
| 294 | 303 | struct device *dev = get_cpu_device(cpu); |
| 295 | 304 | unsigned long freq_hz, throttled_freq; |
| 296 | 305 | struct dev_pm_opp *opp; |
| 297 | − unsigned int freq; | |
| 298 | 306 | |
| 299 | 307 | /* |
| 300 | 308 | * Get the h/w throttled frequency, normalize it using the |
| 301 | 309 | * registered opp table and use it to calculate thermal pressure. |
| 302 | 310 | */ |
| 303 | − freq = qcom_lmh_get_throttle_freq(data); | |
| 304 | − freq_hz = freq * HZ_PER_KHZ; | |
| 311 | + freq_hz = qcom_lmh_get_throttle_freq(data); | |
| 305 | 312 | |
| 306 | 313 | opp = dev_pm_opp_find_freq_floor(dev, &freq_hz); |
| 307 | 314 | if (IS_ERR(opp) && PTR_ERR(opp) == -ERANGE) |
| 308 | − dev_pm_opp_find_freq_ceil(dev, &freq_hz); | |
| 315 | + opp = dev_pm_opp_find_freq_ceil(dev, &freq_hz); | |
| 316 | + | |
| 317 | + if (IS_ERR(opp)) { | |
| 318 | + dev_warn(dev, "Can't find the OPP for throttling: %pe!\n", opp); | |
| 319 | + } else { | |
| 320 | + throttled_freq = freq_hz / HZ_PER_KHZ; | |
| 309 | 321 | |
| 310 | − throttled_freq = freq_hz / HZ_PER_KHZ; | |
| 322 | + /* Update thermal pressure (the boost frequencies are accepted) */ | |
| 323 | + arch_update_thermal_pressure(policy->related_cpus, throttled_freq); | |
| 311 | 324 | |
| 312 | − /* Update thermal pressure (the boost frequencies are accepted) */ | |
| 313 | − arch_update_thermal_pressure(policy->related_cpus, throttled_freq); | |
| 325 | + dev_pm_opp_put(opp); | |
| 326 | + } | |
| 314 | 327 | |
| 315 | 328 | /* |
| 316 | 329 | * In the unlikely case policy is unregistered do not enable |
| @@ -350,6 +363,10 @@ static irqreturn_t qcom_lmh_dcvs_handle_irq(int irq, void *data) · 33 unmodified lines | ||
| 350 | 363 | disable_irq_nosync(c_data->throttle_irq); |
| 351 | 364 | schedule_delayed_work(&c_data->throttle_work, 0); |
| 352 | 365 | |
| 366 | + if (c_data->soc_data->reg_intr_clr) | |
| 367 | + writel_relaxed(GT_IRQ_STATUS, | |
| 368 | + c_data->base + c_data->soc_data->reg_intr_clr); | |
| 369 | + | |
| 353 | 370 | return IRQ_HANDLED; |
| 354 | 371 | } |
| 355 | 372 | |
| @@ -365,9 +382,11 @@ static const struct qcom_cpufreq_soc_data qcom_soc_data = { · 9 unmodified lines | ||
| 365 | 382 | |
| 366 | 383 | static const struct qcom_cpufreq_soc_data epss_soc_data = { |
| 367 | 384 | .reg_enable = 0x0, |
| 385 | + .reg_domain_state = 0x20, | |
| 368 | 386 | .reg_dcvs_ctrl = 0xb0, |
| 369 | 387 | .reg_freq_lut = 0x100, |
| 370 | 388 | .reg_volt_lut = 0x200, |
| 389 | + .reg_intr_clr = 0x308, | |
| 371 | 390 | .reg_perf_state = 0x320, |
| 372 | 391 | .lut_row_size = 4, |
| 373 | 392 | }; |
| @@ -417,16 +436,39 @@ static int qcom_cpufreq_hw_lmh_init(struct cpufreq_policy *policy, int index) · 43 unmodified lines | ||
| 417 | 436 | return 0; |
| 418 | 437 | } |
| 419 | 438 | |
| 420 | −static void qcom_cpufreq_hw_lmh_exit(struct qcom_cpufreq_data *data) | |
| 439 | +static int qcom_cpufreq_hw_cpu_online(struct cpufreq_policy *policy) | |
| 440 | +{ | |
| 441 | + struct qcom_cpufreq_data *data = policy->driver_data; | |
| 442 | + struct platform_device *pdev = cpufreq_get_driver_data(); | |
| 443 | + int ret; | |
| 444 | + | |
| 445 | + ret = irq_set_affinity_hint(data->throttle_irq, policy->cpus); | |
| 446 | + if (ret) | |
| 447 | + dev_err(&pdev->dev, "Failed to set CPU affinity of %s[%d]\n", | |
| 448 | + data->irq_name, data->throttle_irq); | |
| 449 | + | |
| 450 | + return ret; | |
| 451 | +} | |
| 452 | + | |
| 453 | +static int qcom_cpufreq_hw_cpu_offline(struct cpufreq_policy *policy) | |
| 421 | 454 | { |
| 455 | + struct qcom_cpufreq_data *data = policy->driver_data; | |
| 456 | + | |
| 422 | 457 | if (data->throttle_irq <= 0) |
| 423 | − return; | |
| 458 | + return 0; | |
| 424 | 459 | |
| 425 | 460 | mutex_lock(&data->throttle_lock); |
| 426 | 461 | data->cancel_throttle = true; |
| 427 | 462 | mutex_unlock(&data->throttle_lock); |
| 428 | 463 | |
| 429 | 464 | cancel_delayed_work_sync(&data->throttle_work); |
| 465 | + irq_set_affinity_hint(data->throttle_irq, NULL); | |
| 466 | + | |
| 467 | + return 0; | |
| 468 | +} | |
| 469 | + | |
| 470 | +static void qcom_cpufreq_hw_lmh_exit(struct qcom_cpufreq_data *data) | |
| 471 | +{ | |
| 430 | 472 | free_irq(data->throttle_irq, data); |
| 431 | 473 | } |
| 432 | 474 | |
| @@ -583,6 +625,8 @@ static struct cpufreq_driver cpufreq_qcom_hw_driver = { · 150 unmodified lines | ||
| 583 | 625 | .get = qcom_cpufreq_hw_get, |
| 584 | 626 | .init = qcom_cpufreq_hw_cpu_init, |
| 585 | 627 | .exit = qcom_cpufreq_hw_cpu_exit, |
| 628 | + .online = qcom_cpufreq_hw_cpu_online, | |
| 629 | + .offline = qcom_cpufreq_hw_cpu_offline, | |
| 586 | 630 | .register_em = cpufreq_register_em_with_opp, |
| 587 | 631 | .fast_switch = qcom_cpufreq_hw_fast_switch, |
| 588 | 632 | .name = "qcom-cpufreq-hw", |
| @@ -98,8 +98,10 @@ static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) · 97 unmodified lines | ||
| 98 | 98 | return -ENOMEM; |
| 99 | 99 | |
| 100 | 100 | ret = sun50i_cpufreq_get_efuse(&speed); |
| 101 | − if (ret) | |
| 101 | + if (ret) { | |
| 102 | + kfree(opp_tables); | |
| 102 | 103 | return ret; |
| 104 | + } | |
| 103 | 105 | |
| 104 | 106 | snprintf(name, MAX_NAME_LEN, "speed%d", speed); |
| 105 | 107 | |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <linux/pm_runtime.h> |
| 23 | 23 | #include <asm/cpuidle.h> |
| 24 | 24 | #include <asm/sbi.h> |
| 25 | +#include <asm/smp.h> | |
| 25 | 26 | #include <asm/suspend.h> |
| 26 | 27 | |
| 27 | 28 | #include "dt_idle_states.h" |
| @@ -1453,7 +1453,7 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, · 1452 unmodified lines | ||
| 1453 | 1453 | { |
| 1454 | 1454 | struct at_xdmac_chan *atchan = to_at_xdmac_chan(chan); |
| 1455 | 1455 | struct at_xdmac *atxdmac = to_at_xdmac(atchan->chan.device); |
| 1456 | − struct at_xdmac_desc *desc, *_desc; | |
| 1456 | + struct at_xdmac_desc *desc, *_desc, *iter; | |
| 1457 | 1457 | struct list_head *descs_list; |
| 1458 | 1458 | enum dma_status ret; |
| 1459 | 1459 | int residue, retry; |
| @@ -1568,11 +1568,13 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, · 108 unmodified lines | ||
| 1568 | 1568 | * microblock. |
| 1569 | 1569 | */ |
| 1570 | 1570 | descs_list = &desc->descs_list; |
| 1571 | − list_for_each_entry_safe(desc, _desc, descs_list, desc_node) { | |
| 1572 | − dwidth = at_xdmac_get_dwidth(desc->lld.mbr_cfg); | |
| 1573 | − residue -= (desc->lld.mbr_ubc & 0xffffff) << dwidth; | |
| 1574 | − if ((desc->lld.mbr_nda & 0xfffffffc) == cur_nda) | |
| 1571 | + list_for_each_entry_safe(iter, _desc, descs_list, desc_node) { | |
| 1572 | + dwidth = at_xdmac_get_dwidth(iter->lld.mbr_cfg); | |
| 1573 | + residue -= (iter->lld.mbr_ubc & 0xffffff) << dwidth; | |
| 1574 | + if ((iter->lld.mbr_nda & 0xfffffffc) == cur_nda) { | |
| 1575 | + desc = iter; | |
| 1575 | 1576 | break; |
| 1577 | + } | |
| 1576 | 1578 | } |
| 1577 | 1579 | residue += cur_ubc << dwidth; |
| 1578 | 1580 | |
| @@ -414,14 +414,18 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) · 413 unmodified lines | ||
| 414 | 414 | SET_CH_32(dw, chan->dir, chan->id, ch_control1, |
| 415 | 415 | (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE)); |
| 416 | 416 | /* Linked list */ |
| 417 | + | |
| 417 | 418 | #ifdef CONFIG_64BIT |
| 418 | − SET_CH_64(dw, chan->dir, chan->id, llp.reg, | |
| 419 | − chunk->ll_region.paddr); | |
| 419 | + /* llp is not aligned on 64bit -> keep 32bit accesses */ | |
| 420 | + SET_CH_32(dw, chan->dir, chan->id, llp.lsb, | |
| 421 | + lower_32_bits(chunk->ll_region.paddr)); | |
| 422 | + SET_CH_32(dw, chan->dir, chan->id, llp.msb, | |
| 423 | + upper_32_bits(chunk->ll_region.paddr)); | |
| 420 | 424 | #else /* CONFIG_64BIT */ |
| 421 | − SET_CH_32(dw, chan->dir, chan->id, llp.lsb, | |
| 422 | − lower_32_bits(chunk->ll_region.paddr)); | |
| 423 | − SET_CH_32(dw, chan->dir, chan->id, llp.msb, | |
| 424 | − upper_32_bits(chunk->ll_region.paddr)); | |
| 425 | + SET_CH_32(dw, chan->dir, chan->id, llp.lsb, | |
| 426 | + lower_32_bits(chunk->ll_region.paddr)); | |
| 427 | + SET_CH_32(dw, chan->dir, chan->id, llp.msb, | |
| 428 | + upper_32_bits(chunk->ll_region.paddr)); | |
| 425 | 429 | #endif /* CONFIG_64BIT */ |
| 426 | 430 | } |
| 427 | 431 | /* Doorbell */ |
| @@ -373,7 +373,6 @@ static void idxd_wq_device_reset_cleanup(struct idxd_wq *wq) · 372 unmodified lines | ||
| 373 | 373 | { |
| 374 | 374 | lockdep_assert_held(&wq->wq_lock); |
| 375 | 375 | |
| 376 | − idxd_wq_disable_cleanup(wq); | |
| 377 | 376 | wq->size = 0; |
| 378 | 377 | wq->group = NULL; |
| 379 | 378 | } |
| @@ -701,14 +700,17 @@ static void idxd_device_wqs_clear_state(struct idxd_device *idxd) · 321 unmodified lines | ||
| 701 | 700 | |
| 702 | 701 | if (wq->state == IDXD_WQ_ENABLED) { |
| 703 | 702 | idxd_wq_disable_cleanup(wq); |
| 704 | − idxd_wq_device_reset_cleanup(wq); | |
| 705 | 703 | wq->state = IDXD_WQ_DISABLED; |
| 706 | 704 | } |
| 705 | + idxd_wq_device_reset_cleanup(wq); | |
| 707 | 706 | } |
| 708 | 707 | } |
| 709 | 708 | |
| 710 | 709 | void idxd_device_clear_state(struct idxd_device *idxd) |
| 711 | 710 | { |
| 711 | + if (!test_bit(IDXD_FLAG_CONFIGURABLE, &idxd->flags)) | |
| 712 | + return; | |
| 713 | + | |
| 712 | 714 | idxd_groups_clear_state(idxd); |
| 713 | 715 | idxd_engines_clear_state(idxd); |
| 714 | 716 | idxd_device_wqs_clear_state(idxd); |
| @@ -150,14 +150,15 @@ static void llist_abort_desc(struct idxd_wq *wq, struct idxd_irq_entry *ie, · 149 unmodified lines | ||
| 150 | 150 | */ |
| 151 | 151 | int idxd_enqcmds(struct idxd_wq *wq, void __iomem *portal, const void *desc) |
| 152 | 152 | { |
| 153 | − int rc, retries = 0; | |
| 153 | + unsigned int retries = wq->enqcmds_retries; | |
| 154 | + int rc; | |
| 154 | 155 | |
| 155 | 156 | do { |
| 156 | 157 | rc = enqcmds(portal, desc); |
| 157 | 158 | if (rc == 0) |
| 158 | 159 | break; |
| 159 | 160 | cpu_relax(); |
| 160 | − } while (retries++ < wq->enqcmds_retries); | |
| 161 | + } while (retries--); | |
| 161 | 162 | |
| 162 | 163 | return rc; |
| 163 | 164 | } |
| @@ -905,6 +905,9 @@ static ssize_t wq_max_transfer_size_store(struct device *dev, struct device_attr · 904 unmodified lines | ||
| 905 | 905 | u64 xfer_size; |
| 906 | 906 | int rc; |
| 907 | 907 | |
| 908 | + if (!test_bit(IDXD_FLAG_CONFIGURABLE, &idxd->flags)) | |
| 909 | + return -EPERM; | |
| 910 | + | |
| 908 | 911 | if (wq->state != IDXD_WQ_DISABLED) |
| 909 | 912 | return -EPERM; |
| 910 | 913 | |
| @@ -939,6 +942,9 @@ static ssize_t wq_max_batch_size_store(struct device *dev, struct device_attribu · 28 unmodified lines | ||
| 939 | 942 | u64 batch_size; |
| 940 | 943 | int rc; |
| 941 | 944 | |
| 945 | + if (!test_bit(IDXD_FLAG_CONFIGURABLE, &idxd->flags)) | |
| 946 | + return -EPERM; | |
| 947 | + | |
| 942 | 948 | if (wq->state != IDXD_WQ_DISABLED) |
| 943 | 949 | return -EPERM; |
| 944 | 950 | |
| @@ -198,12 +198,12 @@ struct sdma_script_start_addrs { · 197 unmodified lines | ||
| 198 | 198 | s32 per_2_firi_addr; |
| 199 | 199 | s32 mcu_2_firi_addr; |
| 200 | 200 | s32 uart_2_per_addr; |
| 201 | − s32 uart_2_mcu_ram_addr; | |
| 201 | + s32 uart_2_mcu_addr; | |
| 202 | 202 | s32 per_2_app_addr; |
| 203 | 203 | s32 mcu_2_app_addr; |
| 204 | 204 | s32 per_2_per_addr; |
| 205 | 205 | s32 uartsh_2_per_addr; |
| 206 | − s32 uartsh_2_mcu_ram_addr; | |
| 206 | + s32 uartsh_2_mcu_addr; | |
| 207 | 207 | s32 per_2_shp_addr; |
| 208 | 208 | s32 mcu_2_shp_addr; |
| 209 | 209 | s32 ata_2_mcu_addr; |
| @@ -232,8 +232,8 @@ struct sdma_script_start_addrs { · 22 unmodified lines | ||
| 232 | 232 | s32 mcu_2_ecspi_addr; |
| 233 | 233 | s32 mcu_2_sai_addr; |
| 234 | 234 | s32 sai_2_mcu_addr; |
| 235 | − s32 uart_2_mcu_addr; | |
| 236 | − s32 uartsh_2_mcu_addr; | |
| 235 | + s32 uart_2_mcu_rom_addr; | |
| 236 | + s32 uartsh_2_mcu_rom_addr; | |
| 237 | 237 | /* End of v3 array */ |
| 238 | 238 | s32 mcu_2_zqspi_addr; |
| 239 | 239 | /* End of v4 array */ |
| @@ -1796,17 +1796,17 @@ static void sdma_add_scripts(struct sdma_engine *sdma, · 1556 unmodified lines | ||
| 1796 | 1796 | saddr_arr[i] = addr_arr[i]; |
| 1797 | 1797 | |
| 1798 | 1798 | /* |
| 1799 | − * get uart_2_mcu_addr/uartsh_2_mcu_addr rom script specially because | |
| 1800 | − * they are now replaced by uart_2_mcu_ram_addr/uartsh_2_mcu_ram_addr | |
| 1801 | − * to be compatible with legacy freescale/nxp sdma firmware, and they | |
| 1802 | − * are located in the bottom part of sdma_script_start_addrs which are | |
| 1803 | − * beyond the SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1. | |
| 1799 | + * For compatibility with NXP internal legacy kernel before 4.19 which | |
| 1800 | + * is based on uart ram script and mainline kernel based on uart rom | |
| 1801 | + * script, both uart ram/rom scripts are present in newer sdma | |
| 1802 | + * firmware. Use the rom versions if they are present (V3 or newer). | |
| 1804 | 1803 | */ |
| 1805 | − if (addr->uart_2_mcu_addr) | |
| 1806 | − sdma->script_addrs->uart_2_mcu_addr = addr->uart_2_mcu_addr; | |
| 1807 | − if (addr->uartsh_2_mcu_addr) | |
| 1808 | − sdma->script_addrs->uartsh_2_mcu_addr = addr->uartsh_2_mcu_addr; | |
| 1809 | − | |
| 1804 | + if (sdma->script_number >= SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3) { | |
| 1805 | + if (addr->uart_2_mcu_rom_addr) | |
| 1806 | + sdma->script_addrs->uart_2_mcu_addr = addr->uart_2_mcu_rom_addr; | |
| 1807 | + if (addr->uartsh_2_mcu_rom_addr) | |
| 1808 | + sdma->script_addrs->uartsh_2_mcu_addr = addr->uartsh_2_mcu_rom_addr; | |
| 1809 | + } | |
| 1810 | 1810 | } |
| 1811 | 1811 | |
| 1812 | 1812 | static void sdma_load_firmware(const struct firmware *fw, void *context) |
| @@ -1885,7 +1885,7 @@ static int sdma_event_remap(struct sdma_engine *sdma) · 72 unmodified lines | ||
| 1885 | 1885 | u32 reg, val, shift, num_map, i; |
| 1886 | 1886 | int ret = 0; |
| 1887 | 1887 | |
| 1888 | − if (IS_ERR(np) || IS_ERR(gpr_np)) | |
| 1888 | + if (IS_ERR(np) || !gpr_np) | |
| 1889 | 1889 | goto out; |
| 1890 | 1890 | |
| 1891 | 1891 | event_remap = of_find_property(np, propname, NULL); |
| @@ -1933,7 +1933,7 @@ static int sdma_event_remap(struct sdma_engine *sdma) · 41 unmodified lines | ||
| 1933 | 1933 | } |
| 1934 | 1934 | |
| 1935 | 1935 | out: |
| 1936 | − if (!IS_ERR(gpr_np)) | |
| 1936 | + if (gpr_np) | |
| 1937 | 1937 | of_node_put(gpr_np); |
| 1938 | 1938 | |
| 1939 | 1939 | return ret; |
| @@ -274,7 +274,7 @@ static int mtk_uart_apdma_alloc_chan_resources(struct dma_chan *chan) · 273 unmodified lines | ||
| 274 | 274 | unsigned int status; |
| 275 | 275 | int ret; |
| 276 | 276 | |
| 277 | − ret = pm_runtime_get_sync(mtkd->ddev.dev); | |
| 277 | + ret = pm_runtime_resume_and_get(mtkd->ddev.dev); | |
| 278 | 278 | if (ret < 0) { |
| 279 | 279 | pm_runtime_put_noidle(chan->device->dev); |
| 280 | 280 | return ret; |
| @@ -288,18 +288,21 @@ static int mtk_uart_apdma_alloc_chan_resources(struct dma_chan *chan) · 7 unmodified lines | ||
| 288 | 288 | ret = readx_poll_timeout(readl, c->base + VFF_EN, |
| 289 | 289 | status, !status, 10, 100); |
| 290 | 290 | if (ret) |
| 291 | − return ret; | |
| 291 | + goto err_pm; | |
| 292 | 292 | |
| 293 | 293 | ret = request_irq(c->irq, mtk_uart_apdma_irq_handler, |
| 294 | 294 | IRQF_TRIGGER_NONE, KBUILD_MODNAME, chan); |
| 295 | 295 | if (ret < 0) { |
| 296 | 296 | dev_err(chan->device->dev, "Can't request dma IRQ\n"); |
| 297 | − return -EINVAL; | |
| 297 | + ret = -EINVAL; | |
| 298 | + goto err_pm; | |
| 298 | 299 | } |
| 299 | 300 | |
| 300 | 301 | if (mtkd->support_33bits) |
| 301 | 302 | mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_SUPPORT_CLR_B); |
| 302 | 303 | |
| 304 | +err_pm: | |
| 305 | + pm_runtime_put_noidle(mtkd->ddev.dev); | |
| 303 | 306 | return ret; |
| 304 | 307 | } |
| 305 | 308 | |
| @@ -164,6 +164,11 @@ · 163 unmodified lines | ||
| 164 | 164 | #define ECC_STAT_CECNT_SHIFT 8 |
| 165 | 165 | #define ECC_STAT_BITNUM_MASK 0x7F |
| 166 | 166 | |
| 167 | +/* ECC error count register definitions */ | |
| 168 | +#define ECC_ERRCNT_UECNT_MASK 0xFFFF0000 | |
| 169 | +#define ECC_ERRCNT_UECNT_SHIFT 16 | |
| 170 | +#define ECC_ERRCNT_CECNT_MASK 0xFFFF | |
| 171 | + | |
| 167 | 172 | /* DDR QOS Interrupt register definitions */ |
| 168 | 173 | #define DDR_QOS_IRQ_STAT_OFST 0x20200 |
| 169 | 174 | #define DDR_QOSUE_MASK 0x4 |
| @@ -423,15 +428,16 @@ static int zynqmp_get_error_info(struct synps_edac_priv *priv) · 253 unmodified lines | ||
| 423 | 428 | base = priv->baseaddr; |
| 424 | 429 | p = &priv->stat; |
| 425 | 430 | |
| 431 | + regval = readl(base + ECC_ERRCNT_OFST); | |
| 432 | + p->ce_cnt = regval & ECC_ERRCNT_CECNT_MASK; | |
| 433 | + p->ue_cnt = (regval & ECC_ERRCNT_UECNT_MASK) >> ECC_ERRCNT_UECNT_SHIFT; | |
| 434 | + if (!p->ce_cnt) | |
| 435 | + goto ue_err; | |
| 436 | + | |
| 426 | 437 | regval = readl(base + ECC_STAT_OFST); |
| 427 | 438 | if (!regval) |
| 428 | 439 | return 1; |
| 429 | 440 | |
| 430 | − p->ce_cnt = (regval & ECC_STAT_CECNT_MASK) >> ECC_STAT_CECNT_SHIFT; | |
| 431 | − p->ue_cnt = (regval & ECC_STAT_UECNT_MASK) >> ECC_STAT_UECNT_SHIFT; | |
| 432 | − if (!p->ce_cnt) | |
| 433 | − goto ue_err; | |
| 434 | − | |
| 435 | 441 | p->ceinfo.bitpos = (regval & ECC_STAT_BITNUM_MASK); |
| 436 | 442 | |
| 437 | 443 | regval = readl(base + ECC_CEADDR0_OFST); |
| @@ -49,7 +49,7 @@ struct scmi_msg_resp_clock_describe_rates { · 48 unmodified lines | ||
| 49 | 49 | struct { |
| 50 | 50 | __le32 value_low; |
| 51 | 51 | __le32 value_high; |
| 52 | − } rate[0]; | |
| 52 | + } rate[]; | |
| 53 | 53 | #define RATE_TO_U64(X) \ |
| 54 | 54 | ({ \ |
| 55 | 55 | typeof(X) x = (X); \ |
| @@ -210,7 +210,8 @@ scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id, · 154 unmodified lines | ||
| 210 | 210 | |
| 211 | 211 | if (rate_discrete && rate) { |
| 212 | 212 | clk->list.num_rates = tot_rate_cnt; |
| 213 | − sort(rate, tot_rate_cnt, sizeof(*rate), rate_cmp_func, NULL); | |
| 213 | + sort(clk->list.rates, tot_rate_cnt, sizeof(*rate), | |
| 214 | + rate_cmp_func, NULL); | |
| 214 | 215 | } |
| 215 | 216 | |
| 216 | 217 | clk->rate_discrete = rate_discrete; |
| @@ -679,7 +679,8 @@ static void scmi_handle_response(struct scmi_chan_info *cinfo, · 678 unmodified lines | ||
| 679 | 679 | |
| 680 | 680 | xfer = scmi_xfer_command_acquire(cinfo, msg_hdr); |
| 681 | 681 | if (IS_ERR(xfer)) { |
| 682 | − scmi_clear_channel(info, cinfo); | |
| 682 | + if (MSG_XTRACT_TYPE(msg_hdr) == MSG_TYPE_DELAYED_RESP) | |
| 683 | + scmi_clear_channel(info, cinfo); | |
| 683 | 684 | return; |
| 684 | 685 | } |
| 685 | 686 | |
| @@ -405,8 +405,8 @@ static int scmi_optee_chan_free(int id, void *p, void *data) · 404 unmodified lines | ||
| 405 | 405 | return 0; |
| 406 | 406 | } |
| 407 | 407 | |
| 408 | −static struct scmi_shared_mem *get_channel_shm(struct scmi_optee_channel *chan, | |
| 409 | − struct scmi_xfer *xfer) | |
| 408 | +static struct scmi_shared_mem __iomem * | |
| 409 | +get_channel_shm(struct scmi_optee_channel *chan, struct scmi_xfer *xfer) | |
| 410 | 410 | { |
| 411 | 411 | if (!chan) |
| 412 | 412 | return NULL; |
| @@ -419,7 +419,7 @@ static int scmi_optee_send_message(struct scmi_chan_info *cinfo, · 6 unmodified lines | ||
| 419 | 419 | struct scmi_xfer *xfer) |
| 420 | 420 | { |
| 421 | 421 | struct scmi_optee_channel *channel = cinfo->transport_info; |
| 422 | − struct scmi_shared_mem *shmem = get_channel_shm(channel, xfer); | |
| 422 | + struct scmi_shared_mem __iomem *shmem = get_channel_shm(channel, xfer); | |
| 423 | 423 | int ret; |
| 424 | 424 | |
| 425 | 425 | mutex_lock(&channel->mu); |
| @@ -436,7 +436,7 @@ static void scmi_optee_fetch_response(struct scmi_chan_info *cinfo, · 10 unmodified lines | ||
| 436 | 436 | struct scmi_xfer *xfer) |
| 437 | 437 | { |
| 438 | 438 | struct scmi_optee_channel *channel = cinfo->transport_info; |
| 439 | − struct scmi_shared_mem *shmem = get_channel_shm(channel, xfer); | |
| 439 | + struct scmi_shared_mem __iomem *shmem = get_channel_shm(channel, xfer); | |
| 440 | 440 | |
| 441 | 441 | shmem_fetch_response(shmem, xfer); |
| 442 | 442 | } |
| @@ -955,8 +955,7 @@ static int cs_dsp_create_control(struct cs_dsp *dsp, · 954 unmodified lines | ||
| 955 | 955 | ctl->alg_region = *alg_region; |
| 956 | 956 | if (subname && dsp->fw_ver >= 2) { |
| 957 | 957 | ctl->subname_len = subname_len; |
| 958 | − ctl->subname = kmemdup(subname, | |
| 959 | − strlen(subname) + 1, GFP_KERNEL); | |
| 958 | + ctl->subname = kasprintf(GFP_KERNEL, "%.*s", subname_len, subname); | |
| 960 | 959 | if (!ctl->subname) { |
| 961 | 960 | ret = -ENOMEM; |
| 962 | 961 | goto err_ctl; |
| @@ -134,7 +134,7 @@ static int gpio_sim_get_multiple(struct gpio_chip *gc, · 133 unmodified lines | ||
| 134 | 134 | struct gpio_sim_chip *chip = gpiochip_get_data(gc); |
| 135 | 135 | |
| 136 | 136 | mutex_lock(&chip->lock); |
| 137 | − bitmap_copy(bits, chip->value_map, gc->ngpio); | |
| 137 | + bitmap_replace(bits, bits, chip->value_map, mask, gc->ngpio); | |
| 138 | 138 | mutex_unlock(&chip->lock); |
| 139 | 139 | |
| 140 | 140 | return 0; |
| @@ -146,7 +146,7 @@ static void gpio_sim_set_multiple(struct gpio_chip *gc, · 5 unmodified lines | ||
| 146 | 146 | struct gpio_sim_chip *chip = gpiochip_get_data(gc); |
| 147 | 147 | |
| 148 | 148 | mutex_lock(&chip->lock); |
| 149 | − bitmap_copy(chip->value_map, bits, gc->ngpio); | |
| 149 | + bitmap_replace(chip->value_map, chip->value_map, bits, mask, gc->ngpio); | |
| 150 | 150 | mutex_unlock(&chip->lock); |
| 151 | 151 | } |
| 152 | 152 | |
| @@ -108,7 +108,7 @@ static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) · 107 unmodified lines | ||
| 108 | 108 | * controller does not have GPIO chip registered at the moment. This is to |
| 109 | 109 | * support probe deferral. |
| 110 | 110 | */ |
| 111 | −static struct gpio_desc *acpi_get_gpiod(char *path, int pin) | |
| 111 | +static struct gpio_desc *acpi_get_gpiod(char *path, unsigned int pin) | |
| 112 | 112 | { |
| 113 | 113 | struct gpio_chip *chip; |
| 114 | 114 | acpi_handle handle; |
| @@ -136,7 +136,7 @@ static struct gpio_desc *acpi_get_gpiod(char *path, int pin) · 21 unmodified lines | ||
| 136 | 136 | * as it is intended for use outside of the GPIO layer (in a similar fashion to |
| 137 | 137 | * gpiod_get_index() for example) it also holds a reference to the GPIO device. |
| 138 | 138 | */ |
| 139 | −struct gpio_desc *acpi_get_and_request_gpiod(char *path, int pin, char *label) | |
| 139 | +struct gpio_desc *acpi_get_and_request_gpiod(char *path, unsigned int pin, char *label) | |
| 140 | 140 | { |
| 141 | 141 | struct gpio_desc *gpio; |
| 142 | 142 | int ret; |
| @@ -317,11 +317,12 @@ static struct gpio_desc *acpi_request_own_gpiod(struct gpio_chip *chip, · 174 unmodified lines | ||
| 317 | 317 | return desc; |
| 318 | 318 | } |
| 319 | 319 | |
| 320 | −static bool acpi_gpio_in_ignore_list(const char *controller_in, int pin_in) | |
| 320 | +static bool acpi_gpio_in_ignore_list(const char *controller_in, unsigned int pin_in) | |
| 321 | 321 | { |
| 322 | 322 | const char *controller, *pin_str; |
| 323 | − int len, pin; | |
| 323 | + unsigned int pin; | |
| 324 | 324 | char *endp; |
| 325 | + int len; | |
| 325 | 326 | |
| 326 | 327 | controller = ignore_wake; |
| 327 | 328 | while (controller) { |
| @@ -354,13 +355,13 @@ err: · 26 unmodified lines | ||
| 354 | 355 | static bool acpi_gpio_irq_is_wake(struct device *parent, |
| 355 | 356 | struct acpi_resource_gpio *agpio) |
| 356 | 357 | { |
| 357 | − int pin = agpio->pin_table[0]; | |
| 358 | + unsigned int pin = agpio->pin_table[0]; | |
| 358 | 359 | |
| 359 | 360 | if (agpio->wake_capable != ACPI_WAKE_CAPABLE) |
| 360 | 361 | return false; |
| 361 | 362 | |
| 362 | 363 | if (acpi_gpio_in_ignore_list(dev_name(parent), pin)) { |
| 363 | − dev_info(parent, "Ignoring wakeup on pin %d\n", pin); | |
| 364 | + dev_info(parent, "Ignoring wakeup on pin %u\n", pin); | |
| 364 | 365 | return false; |
| 365 | 366 | } |
| 366 | 367 | |
| @@ -378,7 +379,8 @@ static acpi_status acpi_gpiochip_alloc_event(struct acpi_resource *ares, · 11 unmodified lines | ||
| 378 | 379 | struct acpi_gpio_event *event; |
| 379 | 380 | irq_handler_t handler = NULL; |
| 380 | 381 | struct gpio_desc *desc; |
| 381 | − int ret, pin, irq; | |
| 382 | + unsigned int pin; | |
| 383 | + int ret, irq; | |
| 382 | 384 | |
| 383 | 385 | if (!acpi_gpio_get_irq_resource(ares, &agpio)) |
| 384 | 386 | return AE_OK; |
| @@ -387,8 +389,8 @@ static acpi_status acpi_gpiochip_alloc_event(struct acpi_resource *ares, · 2 unmodified lines | ||
| 387 | 389 | pin = agpio->pin_table[0]; |
| 388 | 390 | |
| 389 | 391 | if (pin <= 255) { |
| 390 | − char ev_name[5]; | |
| 391 | − sprintf(ev_name, "_%c%02hhX", | |
| 392 | + char ev_name[8]; | |
| 393 | + sprintf(ev_name, "_%c%02X", | |
| 392 | 394 | agpio->triggering == ACPI_EDGE_SENSITIVE ? 'E' : 'L', |
| 393 | 395 | pin); |
| 394 | 396 | if (ACPI_SUCCESS(acpi_get_handle(handle, ev_name, &evt_handle))) |
| @@ -1098,7 +1100,7 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address, · 703 unmodified lines | ||
| 1098 | 1100 | |
| 1099 | 1101 | length = min_t(u16, agpio->pin_table_length, pin_index + bits); |
| 1100 | 1102 | for (i = pin_index; i < length; ++i) { |
| 1101 | − int pin = agpio->pin_table[i]; | |
| 1103 | + unsigned int pin = agpio->pin_table[i]; | |
| 1102 | 1104 | struct acpi_gpio_connection *conn; |
| 1103 | 1105 | struct gpio_desc *desc; |
| 1104 | 1106 | bool found; |
| @@ -1601,8 +1601,6 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, · 1600 unmodified lines | ||
| 1601 | 1601 | |
| 1602 | 1602 | gpiochip_set_irq_hooks(gc); |
| 1603 | 1603 | |
| 1604 | − acpi_gpiochip_request_interrupts(gc); | |
| 1605 | − | |
| 1606 | 1604 | /* |
| 1607 | 1605 | * Using barrier() here to prevent compiler from reordering |
| 1608 | 1606 | * gc->irq.initialized before initialization of above |
| @@ -1612,6 +1610,8 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, · 3 unmodified lines | ||
| 1612 | 1610 | |
| 1613 | 1611 | gc->irq.initialized = true; |
| 1614 | 1612 | |
| 1613 | + acpi_gpiochip_request_interrupts(gc); | |
| 1614 | + | |
| 1615 | 1615 | return 0; |
| 1616 | 1616 | } |
| 1617 | 1617 | |
| @@ -128,6 +128,8 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, union drm_amdgpu_cs · 127 unmodified lines | ||
| 128 | 128 | goto free_chunk; |
| 129 | 129 | } |
| 130 | 130 | |
| 131 | + mutex_lock(&p->ctx->lock); | |
| 132 | + | |
| 131 | 133 | /* skip guilty context job */ |
| 132 | 134 | if (atomic_read(&p->ctx->guilty) == 1) { |
| 133 | 135 | ret = -ECANCELED; |
| @@ -709,6 +711,7 @@ static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error, · 575 unmodified lines | ||
| 709 | 711 | dma_fence_put(parser->fence); |
| 710 | 712 | |
| 711 | 713 | if (parser->ctx) { |
| 714 | + mutex_unlock(&parser->ctx->lock); | |
| 712 | 715 | amdgpu_ctx_put(parser->ctx); |
| 713 | 716 | } |
| 714 | 717 | if (parser->bo_list) |
| @@ -1157,6 +1160,9 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev, · 442 unmodified lines | ||
| 1157 | 1160 | { |
| 1158 | 1161 | int i, r; |
| 1159 | 1162 | |
| 1163 | + /* TODO: Investigate why we still need the context lock */ | |
| 1164 | + mutex_unlock(&p->ctx->lock); | |
| 1165 | + | |
| 1160 | 1166 | for (i = 0; i < p->nchunks; ++i) { |
| 1161 | 1167 | struct amdgpu_cs_chunk *chunk; |
| 1162 | 1168 | |
| @@ -1167,32 +1173,34 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev, · 4 unmodified lines | ||
| 1167 | 1173 | case AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES: |
| 1168 | 1174 | r = amdgpu_cs_process_fence_dep(p, chunk); |
| 1169 | 1175 | if (r) |
| 1170 | − return r; | |
| 1176 | + goto out; | |
| 1171 | 1177 | break; |
| 1172 | 1178 | case AMDGPU_CHUNK_ID_SYNCOBJ_IN: |
| 1173 | 1179 | r = amdgpu_cs_process_syncobj_in_dep(p, chunk); |
| 1174 | 1180 | if (r) |
| 1175 | − return r; | |
| 1181 | + goto out; | |
| 1176 | 1182 | break; |
| 1177 | 1183 | case AMDGPU_CHUNK_ID_SYNCOBJ_OUT: |
| 1178 | 1184 | r = amdgpu_cs_process_syncobj_out_dep(p, chunk); |
| 1179 | 1185 | if (r) |
| 1180 | − return r; | |
| 1186 | + goto out; | |
| 1181 | 1187 | break; |
| 1182 | 1188 | case AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT: |
| 1183 | 1189 | r = amdgpu_cs_process_syncobj_timeline_in_dep(p, chunk); |
| 1184 | 1190 | if (r) |
| 1185 | − return r; | |
| 1191 | + goto out; | |
| 1186 | 1192 | break; |
| 1187 | 1193 | case AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL: |
| 1188 | 1194 | r = amdgpu_cs_process_syncobj_timeline_out_dep(p, chunk); |
| 1189 | 1195 | if (r) |
| 1190 | − return r; | |
| 1196 | + goto out; | |
| 1191 | 1197 | break; |
| 1192 | 1198 | } |
| 1193 | 1199 | } |
| 1194 | 1200 | |
| 1195 | − return 0; | |
| 1201 | +out: | |
| 1202 | + mutex_lock(&p->ctx->lock); | |
| 1203 | + return r; | |
| 1196 | 1204 | } |
| 1197 | 1205 | |
| 1198 | 1206 | static void amdgpu_cs_post_dependencies(struct amdgpu_cs_parser *p) |
| @@ -1368,6 +1376,7 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) · 169 unmodified lines | ||
| 1368 | 1376 | goto out; |
| 1369 | 1377 | |
| 1370 | 1378 | r = amdgpu_cs_submit(&parser, cs); |
| 1379 | + | |
| 1371 | 1380 | out: |
| 1372 | 1381 | amdgpu_cs_parser_fini(&parser, r, reserved_buffers); |
| 1373 | 1382 | |
| @@ -237,6 +237,7 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev, · 236 unmodified lines | ||
| 237 | 237 | |
| 238 | 238 | kref_init(&ctx->refcount); |
| 239 | 239 | spin_lock_init(&ctx->ring_lock); |
| 240 | + mutex_init(&ctx->lock); | |
| 240 | 241 | |
| 241 | 242 | ctx->reset_counter = atomic_read(&adev->gpu_reset_counter); |
| 242 | 243 | ctx->reset_counter_query = ctx->reset_counter; |
| @@ -357,6 +358,7 @@ static void amdgpu_ctx_fini(struct kref *ref) · 114 unmodified lines | ||
| 357 | 358 | drm_dev_exit(idx); |
| 358 | 359 | } |
| 359 | 360 | |
| 361 | + mutex_destroy(&ctx->lock); | |
| 360 | 362 | kfree(ctx); |
| 361 | 363 | } |
| 362 | 364 | |
| @@ -49,6 +49,7 @@ struct amdgpu_ctx { · 48 unmodified lines | ||
| 49 | 49 | bool preamble_presented; |
| 50 | 50 | int32_t init_priority; |
| 51 | 51 | int32_t override_priority; |
| 52 | + struct mutex lock; | |
| 52 | 53 | atomic_t guilty; |
| 53 | 54 | unsigned long ras_counter_ce; |
| 54 | 55 | unsigned long ras_counter_ue; |
| @@ -2323,18 +2323,23 @@ static int amdgpu_pmops_suspend(struct device *dev) · 2322 unmodified lines | ||
| 2323 | 2323 | { |
| 2324 | 2324 | struct drm_device *drm_dev = dev_get_drvdata(dev); |
| 2325 | 2325 | struct amdgpu_device *adev = drm_to_adev(drm_dev); |
| 2326 | − int r; | |
| 2327 | 2326 | |
| 2328 | 2327 | if (amdgpu_acpi_is_s0ix_active(adev)) |
| 2329 | 2328 | adev->in_s0ix = true; |
| 2330 | 2329 | else |
| 2331 | 2330 | adev->in_s3 = true; |
| 2332 | − r = amdgpu_device_suspend(drm_dev, true); | |
| 2333 | − if (r) | |
| 2334 | − return r; | |
| 2331 | + return amdgpu_device_suspend(drm_dev, true); | |
| 2332 | +} | |
| 2333 | + | |
| 2334 | +static int amdgpu_pmops_suspend_noirq(struct device *dev) | |
| 2335 | +{ | |
| 2336 | + struct drm_device *drm_dev = dev_get_drvdata(dev); | |
| 2337 | + struct amdgpu_device *adev = drm_to_adev(drm_dev); | |
| 2338 | + | |
| 2335 | 2339 | if (!adev->in_s0ix) |
| 2336 | − r = amdgpu_asic_reset(adev); | |
| 2337 | − return r; | |
| 2340 | + return amdgpu_asic_reset(adev); | |
| 2341 | + | |
| 2342 | + return 0; | |
| 2338 | 2343 | } |
| 2339 | 2344 | |
| 2340 | 2345 | static int amdgpu_pmops_resume(struct device *dev) |
| @@ -2390,6 +2395,71 @@ static int amdgpu_pmops_restore(struct device *dev) · 49 unmodified lines | ||
| 2390 | 2395 | return amdgpu_device_resume(drm_dev, true); |
| 2391 | 2396 | } |
| 2392 | 2397 | |
| 2398 | +static int amdgpu_runtime_idle_check_display(struct device *dev) | |
| 2399 | +{ | |
| 2400 | + struct pci_dev *pdev = to_pci_dev(dev); | |
| 2401 | + struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
| 2402 | + struct amdgpu_device *adev = drm_to_adev(drm_dev); | |
| 2403 | + | |
| 2404 | + if (adev->mode_info.num_crtc) { | |
| 2405 | + struct drm_connector *list_connector; | |
| 2406 | + struct drm_connector_list_iter iter; | |
| 2407 | + int ret = 0; | |
| 2408 | + | |
| 2409 | + /* XXX: Return busy if any displays are connected to avoid | |
| 2410 | + * possible display wakeups after runtime resume due to | |
| 2411 | + * hotplug events in case any displays were connected while | |
| 2412 | + * the GPU was in suspend. Remove this once that is fixed. | |
| 2413 | + */ | |
| 2414 | + mutex_lock(&drm_dev->mode_config.mutex); | |
| 2415 | + drm_connector_list_iter_begin(drm_dev, &iter); | |
| 2416 | + drm_for_each_connector_iter(list_connector, &iter) { | |
| 2417 | + if (list_connector->status == connector_status_connected) { | |
| 2418 | + ret = -EBUSY; | |
| 2419 | + break; | |
| 2420 | + } | |
| 2421 | + } | |
| 2422 | + drm_connector_list_iter_end(&iter); | |
| 2423 | + mutex_unlock(&drm_dev->mode_config.mutex); | |
| 2424 | + | |
| 2425 | + if (ret) | |
| 2426 | + return ret; | |
| 2427 | + | |
| 2428 | + if (amdgpu_device_has_dc_support(adev)) { | |
| 2429 | + struct drm_crtc *crtc; | |
| 2430 | + | |
| 2431 | + drm_for_each_crtc(crtc, drm_dev) { | |
| 2432 | + drm_modeset_lock(&crtc->mutex, NULL); | |
| 2433 | + if (crtc->state->active) | |
| 2434 | + ret = -EBUSY; | |
| 2435 | + drm_modeset_unlock(&crtc->mutex); | |
| 2436 | + if (ret < 0) | |
| 2437 | + break; | |
| 2438 | + } | |
| 2439 | + } else { | |
| 2440 | + mutex_lock(&drm_dev->mode_config.mutex); | |
| 2441 | + drm_modeset_lock(&drm_dev->mode_config.connection_mutex, NULL); | |
| 2442 | + | |
| 2443 | + drm_connector_list_iter_begin(drm_dev, &iter); | |
| 2444 | + drm_for_each_connector_iter(list_connector, &iter) { | |
| 2445 | + if (list_connector->dpms == DRM_MODE_DPMS_ON) { | |
| 2446 | + ret = -EBUSY; | |
| 2447 | + break; | |
| 2448 | + } | |
| 2449 | + } | |
| 2450 | + | |
| 2451 | + drm_connector_list_iter_end(&iter); | |
| 2452 | + | |
| 2453 | + drm_modeset_unlock(&drm_dev->mode_config.connection_mutex); | |
| 2454 | + mutex_unlock(&drm_dev->mode_config.mutex); | |
| 2455 | + } | |
| 2456 | + if (ret) | |
| 2457 | + return ret; | |
| 2458 | + } | |
| 2459 | + | |
| 2460 | + return 0; | |
| 2461 | +} | |
| 2462 | + | |
| 2393 | 2463 | static int amdgpu_pmops_runtime_suspend(struct device *dev) |
| 2394 | 2464 | { |
| 2395 | 2465 | struct pci_dev *pdev = to_pci_dev(dev); |
| @@ -2402,6 +2472,10 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev) · 6 unmodified lines | ||
| 2402 | 2472 | return -EBUSY; |
| 2403 | 2473 | } |
| 2404 | 2474 | |
| 2475 | + ret = amdgpu_runtime_idle_check_display(dev); | |
| 2476 | + if (ret) | |
| 2477 | + return ret; | |
| 2478 | + | |
| 2405 | 2479 | /* wait for all rings to drain before suspending */ |
| 2406 | 2480 | for (i = 0; i < AMDGPU_MAX_RINGS; i++) { |
| 2407 | 2481 | struct amdgpu_ring *ring = adev->rings[i]; |
| @@ -2511,41 +2585,7 @@ static int amdgpu_pmops_runtime_idle(struct device *dev) · 103 unmodified lines | ||
| 2511 | 2585 | return -EBUSY; |
| 2512 | 2586 | } |
| 2513 | 2587 | |
| 2514 | − if (amdgpu_device_has_dc_support(adev)) { | |
| 2515 | − struct drm_crtc *crtc; | |
| 2516 | − | |
| 2517 | − drm_for_each_crtc(crtc, drm_dev) { | |
| 2518 | − drm_modeset_lock(&crtc->mutex, NULL); | |
| 2519 | − if (crtc->state->active) | |
| 2520 | − ret = -EBUSY; | |
| 2521 | − drm_modeset_unlock(&crtc->mutex); | |
| 2522 | − if (ret < 0) | |
| 2523 | − break; | |
| 2524 | − } | |
| 2525 | − | |
| 2526 | − } else { | |
| 2527 | − struct drm_connector *list_connector; | |
| 2528 | − struct drm_connector_list_iter iter; | |
| 2529 | − | |
| 2530 | − mutex_lock(&drm_dev->mode_config.mutex); | |
| 2531 | − drm_modeset_lock(&drm_dev->mode_config.connection_mutex, NULL); | |
| 2532 | − | |
| 2533 | − drm_connector_list_iter_begin(drm_dev, &iter); | |
| 2534 | − drm_for_each_connector_iter(list_connector, &iter) { | |
| 2535 | − if (list_connector->dpms == DRM_MODE_DPMS_ON) { | |
| 2536 | − ret = -EBUSY; | |
| 2537 | − break; | |
| 2538 | − } | |
| 2539 | − } | |
| 2540 | − | |
| 2541 | − drm_connector_list_iter_end(&iter); | |
| 2542 | − | |
| 2543 | − drm_modeset_unlock(&drm_dev->mode_config.connection_mutex); | |
| 2544 | − mutex_unlock(&drm_dev->mode_config.mutex); | |
| 2545 | − } | |
| 2546 | − | |
| 2547 | − if (ret == -EBUSY) | |
| 2548 | − DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
| 2588 | + ret = amdgpu_runtime_idle_check_display(dev); | |
| 2549 | 2589 | |
| 2550 | 2590 | pm_runtime_mark_last_busy(dev); |
| 2551 | 2591 | pm_runtime_autosuspend(dev); |
| @@ -2575,6 +2615,7 @@ static const struct dev_pm_ops amdgpu_pm_ops = { · 23 unmodified lines | ||
| 2575 | 2615 | .prepare = amdgpu_pmops_prepare, |
| 2576 | 2616 | .complete = amdgpu_pmops_complete, |
| 2577 | 2617 | .suspend = amdgpu_pmops_suspend, |
| 2618 | + .suspend_noirq = amdgpu_pmops_suspend_noirq, | |
| 2578 | 2619 | .resume = amdgpu_pmops_resume, |
| 2579 | 2620 | .freeze = amdgpu_pmops_freeze, |
| 2580 | 2621 | .thaw = amdgpu_pmops_thaw, |
| @@ -52,7 +52,7 @@ · 51 unmodified lines | ||
| 52 | 52 | #define FIRMWARE_ALDEBARAN "amdgpu/aldebaran_vcn.bin" |
| 53 | 53 | #define FIRMWARE_BEIGE_GOBY "amdgpu/beige_goby_vcn.bin" |
| 54 | 54 | #define FIRMWARE_YELLOW_CARP "amdgpu/yellow_carp_vcn.bin" |
| 55 | −#define FIRMWARE_VCN_3_1_2 "amdgpu/vcn_3_1_2_vcn.bin" | |
| 55 | +#define FIRMWARE_VCN_3_1_2 "amdgpu/vcn_3_1_2.bin" | |
| 56 | 56 | |
| 57 | 57 | MODULE_FIRMWARE(FIRMWARE_RAVEN); |
| 58 | 58 | MODULE_FIRMWARE(FIRMWARE_PICASSO); |
| @@ -1205,6 +1205,8 @@ static const struct amdgpu_gfxoff_quirk amdgpu_gfxoff_quirk_list[] = { · 1204 unmodified lines | ||
| 1205 | 1205 | { 0x1002, 0x15dd, 0x103c, 0x83e7, 0xd3 }, |
| 1206 | 1206 | /* GFXOFF is unstable on C6 parts with a VBIOS 113-RAVEN-114 */ |
| 1207 | 1207 | { 0x1002, 0x15dd, 0x1002, 0x15dd, 0xc6 }, |
| 1208 | + /* Apple MacBook Pro (15-inch, 2019) Radeon Pro Vega 20 4 GB */ | |
| 1209 | + { 0x1002, 0x69af, 0x106b, 0x019a, 0xc0 }, | |
| 1208 | 1210 | { 0, 0, 0, 0, 0 }, |
| 1209 | 1211 | }; |
| 1210 | 1212 | |
| @@ -1151,6 +1151,16 @@ static int gmc_v10_0_set_clockgating_state(void *handle, · 1150 unmodified lines | ||
| 1151 | 1151 | int r; |
| 1152 | 1152 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 1153 | 1153 | |
| 1154 | + /* | |
| 1155 | + * The issue mmhub can't disconnect from DF with MMHUB clock gating being disabled | |
| 1156 | + * is a new problem observed at DF 3.0.3, however with the same suspend sequence not | |
| 1157 | + * seen any issue on the DF 3.0.2 series platform. | |
| 1158 | + */ | |
| 1159 | + if (adev->in_s0ix && adev->ip_versions[DF_HWIP][0] > IP_VERSION(3, 0, 2)) { | |
| 1160 | + dev_dbg(adev->dev, "keep mmhub clock gating being enabled for s0ix\n"); | |
| 1161 | + return 0; | |
| 1162 | + } | |
| 1163 | + | |
| 1154 | 1164 | r = adev->mmhub.funcs->set_clockgating(adev, state); |
| 1155 | 1165 | if (r) |
| 1156 | 1166 | return r; |
| @@ -130,19 +130,33 @@ void program_sh_mem_settings(struct device_queue_manager *dqm, · 129 unmodified lines | ||
| 130 | 130 | } |
| 131 | 131 | |
| 132 | 132 | static void increment_queue_count(struct device_queue_manager *dqm, |
| 133 | − enum kfd_queue_type type) | |
| 133 | + struct qcm_process_device *qpd, | |
| 134 | + struct queue *q) | |
| 134 | 135 | { |
| 135 | 136 | dqm->active_queue_count++; |
| 136 | − if (type == KFD_QUEUE_TYPE_COMPUTE || type == KFD_QUEUE_TYPE_DIQ) | |
| 137 | + if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || | |
| 138 | + q->properties.type == KFD_QUEUE_TYPE_DIQ) | |
| 137 | 139 | dqm->active_cp_queue_count++; |
| 140 | + | |
| 141 | + if (q->properties.is_gws) { | |
| 142 | + dqm->gws_queue_count++; | |
| 143 | + qpd->mapped_gws_queue = true; | |
| 144 | + } | |
| 138 | 145 | } |
| 139 | 146 | |
| 140 | 147 | static void decrement_queue_count(struct device_queue_manager *dqm, |
| 141 | − enum kfd_queue_type type) | |
| 148 | + struct qcm_process_device *qpd, | |
| 149 | + struct queue *q) | |
| 142 | 150 | { |
| 143 | 151 | dqm->active_queue_count--; |
| 144 | − if (type == KFD_QUEUE_TYPE_COMPUTE || type == KFD_QUEUE_TYPE_DIQ) | |
| 152 | + if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE || | |
| 153 | + q->properties.type == KFD_QUEUE_TYPE_DIQ) | |
| 145 | 154 | dqm->active_cp_queue_count--; |
| 155 | + | |
| 156 | + if (q->properties.is_gws) { | |
| 157 | + dqm->gws_queue_count--; | |
| 158 | + qpd->mapped_gws_queue = false; | |
| 159 | + } | |
| 146 | 160 | } |
| 147 | 161 | |
| 148 | 162 | /* |
| @@ -412,7 +426,7 @@ add_queue_to_list: · 263 unmodified lines | ||
| 412 | 426 | list_add(&q->list, &qpd->queues_list); |
| 413 | 427 | qpd->queue_count++; |
| 414 | 428 | if (q->properties.is_active) |
| 415 | − increment_queue_count(dqm, q->properties.type); | |
| 429 | + increment_queue_count(dqm, qpd, q); | |
| 416 | 430 | |
| 417 | 431 | /* |
| 418 | 432 | * Unconditionally increment this counter, regardless of the queue's |
| @@ -601,13 +615,8 @@ static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm, · 182 unmodified lines | ||
| 601 | 615 | deallocate_vmid(dqm, qpd, q); |
| 602 | 616 | } |
| 603 | 617 | qpd->queue_count--; |
| 604 | − if (q->properties.is_active) { | |
| 605 | − decrement_queue_count(dqm, q->properties.type); | |
| 606 | − if (q->properties.is_gws) { | |
| 607 | − dqm->gws_queue_count--; | |
| 608 | − qpd->mapped_gws_queue = false; | |
| 609 | − } | |
| 610 | − } | |
| 618 | + if (q->properties.is_active) | |
| 619 | + decrement_queue_count(dqm, qpd, q); | |
| 611 | 620 | |
| 612 | 621 | return retval; |
| 613 | 622 | } |
| @@ -700,12 +709,11 @@ static int update_queue(struct device_queue_manager *dqm, struct queue *q, · 86 unmodified lines | ||
| 700 | 709 | * dqm->active_queue_count to determine whether a new runlist must be |
| 701 | 710 | * uploaded. |
| 702 | 711 | */ |
| 703 | − if (q->properties.is_active && !prev_active) | |
| 704 | − increment_queue_count(dqm, q->properties.type); | |
| 705 | − else if (!q->properties.is_active && prev_active) | |
| 706 | − decrement_queue_count(dqm, q->properties.type); | |
| 707 | − | |
| 708 | − if (q->gws && !q->properties.is_gws) { | |
| 712 | + if (q->properties.is_active && !prev_active) { | |
| 713 | + increment_queue_count(dqm, &pdd->qpd, q); | |
| 714 | + } else if (!q->properties.is_active && prev_active) { | |
| 715 | + decrement_queue_count(dqm, &pdd->qpd, q); | |
| 716 | + } else if (q->gws && !q->properties.is_gws) { | |
| 709 | 717 | if (q->properties.is_active) { |
| 710 | 718 | dqm->gws_queue_count++; |
| 711 | 719 | pdd->qpd.mapped_gws_queue = true; |
| @@ -767,11 +775,7 @@ static int evict_process_queues_nocpsch(struct device_queue_manager *dqm, · 55 unmodified lines | ||
| 767 | 775 | mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type( |
| 768 | 776 | q->properties.type)]; |
| 769 | 777 | q->properties.is_active = false; |
| 770 | − decrement_queue_count(dqm, q->properties.type); | |
| 771 | − if (q->properties.is_gws) { | |
| 772 | − dqm->gws_queue_count--; | |
| 773 | − qpd->mapped_gws_queue = false; | |
| 774 | − } | |
| 778 | + decrement_queue_count(dqm, qpd, q); | |
| 775 | 779 | |
| 776 | 780 | if (WARN_ONCE(!dqm->sched_running, "Evict when stopped\n")) |
| 777 | 781 | continue; |
| @@ -817,7 +821,7 @@ static int evict_process_queues_cpsch(struct device_queue_manager *dqm, · 39 unmodified lines | ||
| 817 | 821 | continue; |
| 818 | 822 | |
| 819 | 823 | q->properties.is_active = false; |
| 820 | − decrement_queue_count(dqm, q->properties.type); | |
| 824 | + decrement_queue_count(dqm, qpd, q); | |
| 821 | 825 | } |
| 822 | 826 | pdd->last_evict_timestamp = get_jiffies_64(); |
| 823 | 827 | retval = execute_queues_cpsch(dqm, |
| @@ -888,11 +892,7 @@ static int restore_process_queues_nocpsch(struct device_queue_manager *dqm, · 64 unmodified lines | ||
| 888 | 892 | mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type( |
| 889 | 893 | q->properties.type)]; |
| 890 | 894 | q->properties.is_active = true; |
| 891 | − increment_queue_count(dqm, q->properties.type); | |
| 892 | − if (q->properties.is_gws) { | |
| 893 | − dqm->gws_queue_count++; | |
| 894 | − qpd->mapped_gws_queue = true; | |
| 895 | − } | |
| 895 | + increment_queue_count(dqm, qpd, q); | |
| 896 | 896 | |
| 897 | 897 | if (WARN_ONCE(!dqm->sched_running, "Restore when stopped\n")) |
| 898 | 898 | continue; |
| @@ -950,7 +950,7 @@ static int restore_process_queues_cpsch(struct device_queue_manager *dqm, · 51 unmodified lines | ||
| 950 | 950 | continue; |
| 951 | 951 | |
| 952 | 952 | q->properties.is_active = true; |
| 953 | − increment_queue_count(dqm, q->properties.type); | |
| 953 | + increment_queue_count(dqm, &pdd->qpd, q); | |
| 954 | 954 | } |
| 955 | 955 | retval = execute_queues_cpsch(dqm, |
| 956 | 956 | KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); |
| @@ -1378,7 +1378,7 @@ static int create_kernel_queue_cpsch(struct device_queue_manager *dqm, · 421 unmodified lines | ||
| 1378 | 1378 | dqm->total_queue_count); |
| 1379 | 1379 | |
| 1380 | 1380 | list_add(&kq->list, &qpd->priv_queue_list); |
| 1381 | − increment_queue_count(dqm, kq->queue->properties.type); | |
| 1381 | + increment_queue_count(dqm, qpd, kq->queue); | |
| 1382 | 1382 | qpd->is_debug = true; |
| 1383 | 1383 | execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); |
| 1384 | 1384 | dqm_unlock(dqm); |
| @@ -1392,7 +1392,7 @@ static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm, · 7 unmodified lines | ||
| 1392 | 1392 | { |
| 1393 | 1393 | dqm_lock(dqm); |
| 1394 | 1394 | list_del(&kq->list); |
| 1395 | − decrement_queue_count(dqm, kq->queue->properties.type); | |
| 1395 | + decrement_queue_count(dqm, qpd, kq->queue); | |
| 1396 | 1396 | qpd->is_debug = false; |
| 1397 | 1397 | execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0); |
| 1398 | 1398 | /* |
| @@ -1467,7 +1467,7 @@ static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q, · 68 unmodified lines | ||
| 1467 | 1467 | qpd->queue_count++; |
| 1468 | 1468 | |
| 1469 | 1469 | if (q->properties.is_active) { |
| 1470 | − increment_queue_count(dqm, q->properties.type); | |
| 1470 | + increment_queue_count(dqm, qpd, q); | |
| 1471 | 1471 | |
| 1472 | 1472 | execute_queues_cpsch(dqm, |
| 1473 | 1473 | KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); |
| @@ -1683,15 +1683,11 @@ static int destroy_queue_cpsch(struct device_queue_manager *dqm, · 209 unmodified lines | ||
| 1683 | 1683 | list_del(&q->list); |
| 1684 | 1684 | qpd->queue_count--; |
| 1685 | 1685 | if (q->properties.is_active) { |
| 1686 | − decrement_queue_count(dqm, q->properties.type); | |
| 1686 | + decrement_queue_count(dqm, qpd, q); | |
| 1687 | 1687 | retval = execute_queues_cpsch(dqm, |
| 1688 | 1688 | KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0); |
| 1689 | 1689 | if (retval == -ETIME) |
| 1690 | 1690 | qpd->reset_wavefronts = true; |
| 1691 | − if (q->properties.is_gws) { | |
| 1692 | − dqm->gws_queue_count--; | |
| 1693 | − qpd->mapped_gws_queue = false; | |
| 1694 | − } | |
| 1695 | 1691 | } |
| 1696 | 1692 | |
| 1697 | 1693 | /* |
| @@ -1932,7 +1928,7 @@ static int process_termination_cpsch(struct device_queue_manager *dqm, · 234 unmodified lines | ||
| 1932 | 1928 | /* Clean all kernel queues */ |
| 1933 | 1929 | list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) { |
| 1934 | 1930 | list_del(&kq->list); |
| 1935 | − decrement_queue_count(dqm, kq->queue->properties.type); | |
| 1931 | + decrement_queue_count(dqm, qpd, kq->queue); | |
| 1936 | 1932 | qpd->is_debug = false; |
| 1937 | 1933 | dqm->total_queue_count--; |
| 1938 | 1934 | filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES; |
| @@ -1945,13 +1941,8 @@ static int process_termination_cpsch(struct device_queue_manager *dqm, · 6 unmodified lines | ||
| 1945 | 1941 | else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) |
| 1946 | 1942 | deallocate_sdma_queue(dqm, q); |
| 1947 | 1943 | |
| 1948 | − if (q->properties.is_active) { | |
| 1949 | − decrement_queue_count(dqm, q->properties.type); | |
| 1950 | − if (q->properties.is_gws) { | |
| 1951 | − dqm->gws_queue_count--; | |
| 1952 | − qpd->mapped_gws_queue = false; | |
| 1953 | − } | |
| 1954 | − } | |
| 1944 | + if (q->properties.is_active) | |
| 1945 | + decrement_queue_count(dqm, qpd, q); | |
| 1955 | 1946 | |
| 1956 | 1947 | dqm->total_queue_count--; |
| 1957 | 1948 | } |
| @@ -1103,7 +1103,7 @@ struct kfd_criu_queue_priv_data { · 1102 unmodified lines | ||
| 1103 | 1103 | uint32_t priority; |
| 1104 | 1104 | uint32_t q_percent; |
| 1105 | 1105 | uint32_t doorbell_id; |
| 1106 | − uint32_t is_gws; | |
| 1106 | + uint32_t gws; | |
| 1107 | 1107 | uint32_t sdma_id; |
| 1108 | 1108 | uint32_t eop_ring_buffer_size; |
| 1109 | 1109 | uint32_t ctx_save_restore_area_size; |
| @@ -636,6 +636,8 @@ static int criu_checkpoint_queue(struct kfd_process_device *pdd, · 635 unmodified lines | ||
| 636 | 636 | q_data->ctx_save_restore_area_size = |
| 637 | 637 | q->properties.ctx_save_restore_area_size; |
| 638 | 638 | |
| 639 | + q_data->gws = !!q->gws; | |
| 640 | + | |
| 639 | 641 | ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack); |
| 640 | 642 | if (ret) { |
| 641 | 643 | pr_err("Failed checkpoint queue_mqd (%d)\n", ret); |
| @@ -743,7 +745,6 @@ static void set_queue_properties_from_criu(struct queue_properties *qp, · 101 unmodified lines | ||
| 743 | 745 | struct kfd_criu_queue_priv_data *q_data) |
| 744 | 746 | { |
| 745 | 747 | qp->is_interop = false; |
| 746 | − qp->is_gws = q_data->is_gws; | |
| 747 | 748 | qp->queue_percent = q_data->q_percent; |
| 748 | 749 | qp->priority = q_data->priority; |
| 749 | 750 | qp->queue_address = q_data->q_address; |
| @@ -826,12 +827,15 @@ int kfd_criu_restore_queue(struct kfd_process *p, · 76 unmodified lines | ||
| 826 | 827 | NULL); |
| 827 | 828 | if (ret) { |
| 828 | 829 | pr_err("Failed to create new queue err:%d\n", ret); |
| 829 | − ret = -EINVAL; | |
| 830 | + goto exit; | |
| 830 | 831 | } |
| 831 | 832 | |
| 833 | + if (q_data->gws) | |
| 834 | + ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws); | |
| 835 | + | |
| 832 | 836 | exit: |
| 833 | 837 | if (ret) |
| 834 | − pr_err("Failed to create queue (%d)\n", ret); | |
| 838 | + pr_err("Failed to restore queue (%d)\n", ret); | |
| 835 | 839 | else |
| 836 | 840 | pr_debug("Queue id %d was restored successfully\n", queue_id); |
| 837 | 841 | |
| @@ -374,7 +374,7 @@ void dce_clock_read_ss_info(struct clk_mgr_internal *clk_mgr_dce) · 373 unmodified lines | ||
| 374 | 374 | clk_mgr_dce->dprefclk_ss_percentage = |
| 375 | 375 | info.spread_spectrum_percentage; |
| 376 | 376 | } |
| 377 | − if (clk_mgr_dce->base.ctx->dc->debug.ignore_dpref_ss) | |
| 377 | + if (clk_mgr_dce->base.ctx->dc->config.ignore_dpref_ss) | |
| 378 | 378 | clk_mgr_dce->dprefclk_ss_percentage = 0; |
| 379 | 379 | } |
| 380 | 380 | } |
| @@ -686,8 +686,8 @@ void dcn316_clk_mgr_construct( · 685 unmodified lines | ||
| 686 | 686 | clk_mgr->base.base.dprefclk_khz = dcn316_smu_get_dpref_clk(&clk_mgr->base); |
| 687 | 687 | clk_mgr->base.dccg->ref_dtbclk_khz = clk_mgr->base.base.dprefclk_khz; |
| 688 | 688 | dce_clock_read_ss_info(&clk_mgr->base); |
| 689 | − clk_mgr->base.dccg->ref_dtbclk_khz = | |
| 690 | − dce_adjust_dp_ref_freq_for_ss(&clk_mgr->base, clk_mgr->base.base.dprefclk_khz); | |
| 689 | + /*clk_mgr->base.dccg->ref_dtbclk_khz = | |
| 690 | + dce_adjust_dp_ref_freq_for_ss(&clk_mgr->base, clk_mgr->base.base.dprefclk_khz);*/ | |
| 691 | 691 | |
| 692 | 692 | clk_mgr->base.base.bw_params = &dcn316_bw_params; |
| 693 | 693 | |
| @@ -340,6 +340,7 @@ struct dc_config { · 339 unmodified lines | ||
| 340 | 340 | bool is_asymmetric_memory; |
| 341 | 341 | bool is_single_rank_dimm; |
| 342 | 342 | bool use_pipe_ctx_sync_logic; |
| 343 | + bool ignore_dpref_ss; | |
| 343 | 344 | }; |
| 344 | 345 | |
| 345 | 346 | enum visual_confirm { |
| @@ -729,7 +730,6 @@ struct dc_debug_options { · 383 unmodified lines | ||
| 729 | 730 | bool apply_vendor_specific_lttpr_wa; |
| 730 | 731 | bool extended_blank_optimization; |
| 731 | 732 | union aux_wake_wa_options aux_wake_wa; |
| 732 | − bool ignore_dpref_ss; | |
| 733 | 733 | uint8_t psr_power_use_phy_fsm; |
| 734 | 734 | }; |
| 735 | 735 | |
| @@ -2522,14 +2522,18 @@ void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) · 2521 unmodified lines | ||
| 2522 | 2522 | struct mpc *mpc = dc->res_pool->mpc; |
| 2523 | 2523 | struct mpc_tree *mpc_tree_params = &(pipe_ctx->stream_res.opp->mpc_tree_params); |
| 2524 | 2524 | |
| 2525 | − if (per_pixel_alpha) | |
| 2526 | − blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; | |
| 2527 | − else | |
| 2528 | − blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; | |
| 2529 | − | |
| 2530 | 2525 | blnd_cfg.overlap_only = false; |
| 2531 | 2526 | blnd_cfg.global_gain = 0xff; |
| 2532 | 2527 | |
| 2528 | + if (per_pixel_alpha && pipe_ctx->plane_state->global_alpha) { | |
| 2529 | + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; | |
| 2530 | + blnd_cfg.global_gain = pipe_ctx->plane_state->global_alpha_value; | |
| 2531 | + } else if (per_pixel_alpha) { | |
| 2532 | + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; | |
| 2533 | + } else { | |
| 2534 | + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; | |
| 2535 | + } | |
| 2536 | + | |
| 2533 | 2537 | if (pipe_ctx->plane_state->global_alpha) |
| 2534 | 2538 | blnd_cfg.global_alpha = pipe_ctx->plane_state->global_alpha_value; |
| 2535 | 2539 | else |
| @@ -2344,14 +2344,18 @@ void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx) · 2343 unmodified lines | ||
| 2344 | 2344 | struct mpc *mpc = dc->res_pool->mpc; |
| 2345 | 2345 | struct mpc_tree *mpc_tree_params = &(pipe_ctx->stream_res.opp->mpc_tree_params); |
| 2346 | 2346 | |
| 2347 | − if (per_pixel_alpha) | |
| 2348 | − blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; | |
| 2349 | − else | |
| 2350 | − blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; | |
| 2351 | − | |
| 2352 | 2347 | blnd_cfg.overlap_only = false; |
| 2353 | 2348 | blnd_cfg.global_gain = 0xff; |
| 2354 | 2349 | |
| 2350 | + if (per_pixel_alpha && pipe_ctx->plane_state->global_alpha) { | |
| 2351 | + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN; | |
| 2352 | + blnd_cfg.global_gain = pipe_ctx->plane_state->global_alpha_value; | |
| 2353 | + } else if (per_pixel_alpha) { | |
| 2354 | + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA; | |
| 2355 | + } else { | |
| 2356 | + blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA; | |
| 2357 | + } | |
| 2358 | + | |
| 2355 | 2359 | if (pipe_ctx->plane_state->global_alpha) |
| 2356 | 2360 | blnd_cfg.global_alpha = pipe_ctx->plane_state->global_alpha_value; |
| 2357 | 2361 | else |
| @@ -997,6 +997,7 @@ static struct clock_source *dcn21_clock_source_create( · 996 unmodified lines | ||
| 997 | 997 | return &clk_src->base; |
| 998 | 998 | } |
| 999 | 999 | |
| 1000 | + kfree(clk_src); | |
| 1000 | 1001 | BREAK_TO_DEBUGGER(); |
| 1001 | 1002 | return NULL; |
| 1002 | 1003 | } |
| @@ -427,6 +427,7 @@ int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors senso · 426 unmodified lines | ||
| 427 | 427 | void amdgpu_dpm_compute_clocks(struct amdgpu_device *adev) |
| 428 | 428 | { |
| 429 | 429 | const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; |
| 430 | + int i; | |
| 430 | 431 | |
| 431 | 432 | if (!adev->pm.dpm_enabled) |
| 432 | 433 | return; |
| @@ -434,6 +435,15 @@ void amdgpu_dpm_compute_clocks(struct amdgpu_device *adev) · 1 unmodified line | ||
| 434 | 435 | if (!pp_funcs->pm_compute_clocks) |
| 435 | 436 | return; |
| 436 | 437 | |
| 438 | + if (adev->mode_info.num_crtc) | |
| 439 | + amdgpu_display_bandwidth_update(adev); | |
| 440 | + | |
| 441 | + for (i = 0; i < AMDGPU_MAX_RINGS; i++) { | |
| 442 | + struct amdgpu_ring *ring = adev->rings[i]; | |
| 443 | + if (ring && ring->sched.ready) | |
| 444 | + amdgpu_fence_wait_empty(ring); | |
| 445 | + } | |
| 446 | + | |
| 437 | 447 | mutex_lock(&adev->pm.mutex); |
| 438 | 448 | pp_funcs->pm_compute_clocks(adev->powerplay.pp_handle); |
| 439 | 449 | mutex_unlock(&adev->pm.mutex); |
| @@ -443,6 +453,20 @@ void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) · 3 unmodified lines | ||
| 443 | 453 | { |
| 444 | 454 | int ret = 0; |
| 445 | 455 | |
| 456 | + if (adev->family == AMDGPU_FAMILY_SI) { | |
| 457 | + mutex_lock(&adev->pm.mutex); | |
| 458 | + if (enable) { | |
| 459 | + adev->pm.dpm.uvd_active = true; | |
| 460 | + adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD; | |
| 461 | + } else { | |
| 462 | + adev->pm.dpm.uvd_active = false; | |
| 463 | + } | |
| 464 | + mutex_unlock(&adev->pm.mutex); | |
| 465 | + | |
| 466 | + amdgpu_dpm_compute_clocks(adev); | |
| 467 | + return; | |
| 468 | + } | |
| 469 | + | |
| 446 | 470 | ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable); |
| 447 | 471 | if (ret) |
| 448 | 472 | DRM_ERROR("Dpm %s uvd failed, ret = %d. \n", |
| @@ -453,6 +477,21 @@ void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable) · 4 unmodified lines | ||
| 453 | 477 | { |
| 454 | 478 | int ret = 0; |
| 455 | 479 | |
| 480 | + if (adev->family == AMDGPU_FAMILY_SI) { | |
| 481 | + mutex_lock(&adev->pm.mutex); | |
| 482 | + if (enable) { | |
| 483 | + adev->pm.dpm.vce_active = true; | |
| 484 | + /* XXX select vce level based on ring/task */ | |
| 485 | + adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL; | |
| 486 | + } else { | |
| 487 | + adev->pm.dpm.vce_active = false; | |
| 488 | + } | |
| 489 | + mutex_unlock(&adev->pm.mutex); | |
| 490 | + | |
| 491 | + amdgpu_dpm_compute_clocks(adev); | |
| 492 | + return; | |
| 493 | + } | |
| 494 | + | |
| 456 | 495 | ret = amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable); |
| 457 | 496 | if (ret) |
| 458 | 497 | DRM_ERROR("Dpm %s vce failed, ret = %d. \n", |
| @@ -1028,16 +1028,6 @@ static int amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev) · 1027 unmodified lines | ||
| 1028 | 1028 | void amdgpu_legacy_dpm_compute_clocks(void *handle) |
| 1029 | 1029 | { |
| 1030 | 1030 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 1031 | − int i = 0; | |
| 1032 | − | |
| 1033 | − if (adev->mode_info.num_crtc) | |
| 1034 | − amdgpu_display_bandwidth_update(adev); | |
| 1035 | − | |
| 1036 | − for (i = 0; i < AMDGPU_MAX_RINGS; i++) { | |
| 1037 | − struct amdgpu_ring *ring = adev->rings[i]; | |
| 1038 | − if (ring && ring->sched.ready) | |
| 1039 | − amdgpu_fence_wait_empty(ring); | |
| 1040 | − } | |
| 1041 | 1031 | |
| 1042 | 1032 | amdgpu_dpm_get_active_displays(adev); |
| 1043 | 1033 | |
| @@ -3892,40 +3892,6 @@ static int si_set_boot_state(struct amdgpu_device *adev) · 3891 unmodified lines | ||
| 3892 | 3892 | } |
| 3893 | 3893 | #endif |
| 3894 | 3894 | |
| 3895 | −static int si_set_powergating_by_smu(void *handle, | |
| 3896 | − uint32_t block_type, | |
| 3897 | − bool gate) | |
| 3898 | −{ | |
| 3899 | − struct amdgpu_device *adev = (struct amdgpu_device *)handle; | |
| 3900 | − | |
| 3901 | − switch (block_type) { | |
| 3902 | − case AMD_IP_BLOCK_TYPE_UVD: | |
| 3903 | − if (!gate) { | |
| 3904 | − adev->pm.dpm.uvd_active = true; | |
| 3905 | − adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD; | |
| 3906 | − } else { | |
| 3907 | − adev->pm.dpm.uvd_active = false; | |
| 3908 | − } | |
| 3909 | − | |
| 3910 | − amdgpu_legacy_dpm_compute_clocks(handle); | |
| 3911 | − break; | |
| 3912 | − case AMD_IP_BLOCK_TYPE_VCE: | |
| 3913 | − if (!gate) { | |
| 3914 | − adev->pm.dpm.vce_active = true; | |
| 3915 | − /* XXX select vce level based on ring/task */ | |
| 3916 | − adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL; | |
| 3917 | − } else { | |
| 3918 | − adev->pm.dpm.vce_active = false; | |
| 3919 | − } | |
| 3920 | − | |
| 3921 | − amdgpu_legacy_dpm_compute_clocks(handle); | |
| 3922 | − break; | |
| 3923 | − default: | |
| 3924 | − break; | |
| 3925 | − } | |
| 3926 | − return 0; | |
| 3927 | −} | |
| 3928 | − | |
| 3929 | 3895 | static int si_set_sw_state(struct amdgpu_device *adev) |
| 3930 | 3896 | { |
| 3931 | 3897 | return (amdgpu_si_send_msg_to_smc(adev, PPSMC_MSG_SwitchToSwState) == PPSMC_Result_OK) ? |
| @@ -8125,7 +8091,6 @@ static const struct amd_pm_funcs si_dpm_funcs = { · 4193 unmodified lines | ||
| 8125 | 8091 | .print_power_state = &si_dpm_print_power_state, |
| 8126 | 8092 | .debugfs_print_current_performance_level = &si_dpm_debugfs_print_current_performance_level, |
| 8127 | 8093 | .force_performance_level = &si_dpm_force_performance_level, |
| 8128 | − .set_powergating_by_smu = &si_set_powergating_by_smu, | |
| 8129 | 8094 | .vblank_too_short = &si_dpm_vblank_too_short, |
| 8130 | 8095 | .set_fan_control_mode = &si_dpm_set_fan_control_mode, |
| 8131 | 8096 | .get_fan_control_mode = &si_dpm_get_fan_control_mode, |
| @@ -1487,16 +1487,6 @@ static void pp_pm_compute_clocks(void *handle) · 1486 unmodified lines | ||
| 1487 | 1487 | { |
| 1488 | 1488 | struct pp_hwmgr *hwmgr = handle; |
| 1489 | 1489 | struct amdgpu_device *adev = hwmgr->adev; |
| 1490 | − int i = 0; | |
| 1491 | − | |
| 1492 | − if (adev->mode_info.num_crtc) | |
| 1493 | − amdgpu_display_bandwidth_update(adev); | |
| 1494 | − | |
| 1495 | − for (i = 0; i < AMDGPU_MAX_RINGS; i++) { | |
| 1496 | − struct amdgpu_ring *ring = adev->rings[i]; | |
| 1497 | − if (ring && ring->sched.ready) | |
| 1498 | − amdgpu_fence_wait_empty(ring); | |
| 1499 | − } | |
| 1500 | 1490 | |
| 1501 | 1491 | if (!amdgpu_device_has_dc_support(adev)) { |
| 1502 | 1492 | amdgpu_dpm_get_active_displays(adev); |
| @@ -214,29 +214,6 @@ int drm_of_encoder_active_endpoint(struct device_node *node, · 213 unmodified lines | ||
| 214 | 214 | } |
| 215 | 215 | EXPORT_SYMBOL_GPL(drm_of_encoder_active_endpoint); |
| 216 | 216 | |
| 217 | −static int find_panel_or_bridge(struct device_node *node, | |
| 218 | − struct drm_panel **panel, | |
| 219 | − struct drm_bridge **bridge) | |
| 220 | −{ | |
| 221 | − if (panel) { | |
| 222 | − *panel = of_drm_find_panel(node); | |
| 223 | − if (!IS_ERR(*panel)) | |
| 224 | − return 0; | |
| 225 | − | |
| 226 | − /* Clear the panel pointer in case of error. */ | |
| 227 | − *panel = NULL; | |
| 228 | − } | |
| 229 | − | |
| 230 | − /* No panel found yet, check for a bridge next. */ | |
| 231 | − if (bridge) { | |
| 232 | − *bridge = of_drm_find_bridge(node); | |
| 233 | − if (*bridge) | |
| 234 | − return 0; | |
| 235 | − } | |
| 236 | − | |
| 237 | − return -EPROBE_DEFER; | |
| 238 | −} | |
| 239 | − | |
| 240 | 217 | /** |
| 241 | 218 | * drm_of_find_panel_or_bridge - return connected panel or bridge device |
| 242 | 219 | * @np: device tree node containing encoder output ports |
| @@ -259,44 +236,49 @@ int drm_of_find_panel_or_bridge(const struct device_node *np, · 16 unmodified lines | ||
| 259 | 236 | struct drm_panel **panel, |
| 260 | 237 | struct drm_bridge **bridge) |
| 261 | 238 | { |
| 262 | − struct device_node *node; | |
| 263 | − int ret; | |
| 239 | + int ret = -EPROBE_DEFER; | |
| 240 | + struct device_node *remote; | |
| 264 | 241 | |
| 265 | 242 | if (!panel && !bridge) |
| 266 | 243 | return -EINVAL; |
| 267 | − | |
| 268 | 244 | if (panel) |
| 269 | 245 | *panel = NULL; |
| 270 | − if (bridge) | |
| 271 | − *bridge = NULL; | |
| 272 | − | |
| 273 | − /* Check for a graph on the device node first. */ | |
| 274 | − if (of_graph_is_present(np)) { | |
| 275 | − node = of_graph_get_remote_node(np, port, endpoint); | |
| 276 | − if (node) { | |
| 277 | − ret = find_panel_or_bridge(node, panel, bridge); | |
| 278 | − of_node_put(node); | |
| 279 | − | |
| 280 | − if (!ret) | |
| 281 | − return 0; | |
| 282 | − } | |
| 283 | − } | |
| 284 | 246 | |
| 285 | − /* Otherwise check for any child node other than port/ports. */ | |
| 286 | − for_each_available_child_of_node(np, node) { | |
| 287 | − if (of_node_name_eq(node, "port") || | |
| 288 | − of_node_name_eq(node, "ports")) | |
| 289 | − continue; | |
| 247 | + /* | |
| 248 | + * of_graph_get_remote_node() produces a noisy error message if port | |
| 249 | + * node isn't found and the absence of the port is a legit case here, | |
| 250 | + * so at first we silently check whether graph presents in the | |
| 251 | + * device-tree node. | |
| 252 | + */ | |
| 253 | + if (!of_graph_is_present(np)) | |
| 254 | + return -ENODEV; | |
| 290 | 255 | |
| 291 | − ret = find_panel_or_bridge(node, panel, bridge); | |
| 292 | − of_node_put(node); | |
| 256 | + remote = of_graph_get_remote_node(np, port, endpoint); | |
| 257 | + if (!remote) | |
| 258 | + return -ENODEV; | |
| 259 | + | |
| 260 | + if (panel) { | |
| 261 | + *panel = of_drm_find_panel(remote); | |
| 262 | + if (!IS_ERR(*panel)) | |
| 263 | + ret = 0; | |
| 264 | + else | |
| 265 | + *panel = NULL; | |
| 266 | + } | |
| 267 | + | |
| 268 | + /* No panel found yet, check for a bridge next. */ | |
| 269 | + if (bridge) { | |
| 270 | + if (ret) { | |
| 271 | + *bridge = of_drm_find_bridge(remote); | |
| 272 | + if (*bridge) | |
| 273 | + ret = 0; | |
| 274 | + } else { | |
| 275 | + *bridge = NULL; | |
| 276 | + } | |
| 293 | 277 | |
| 294 | − /* Stop at the first found occurrence. */ | |
| 295 | − if (!ret) | |
| 296 | − return 0; | |
| 297 | 278 | } |
| 298 | 279 | |
| 299 | − return -EPROBE_DEFER; | |
| 280 | + of_node_put(remote); | |
| 281 | + return ret; | |
| 300 | 282 | } |
| 301 | 283 | EXPORT_SYMBOL_GPL(drm_of_find_panel_or_bridge); |
| 302 | 284 | |
| @@ -4383,13 +4383,20 @@ intel_dp_update_420(struct intel_dp *intel_dp) · 4382 unmodified lines | ||
| 4383 | 4383 | static void |
| 4384 | 4384 | intel_dp_set_edid(struct intel_dp *intel_dp) |
| 4385 | 4385 | { |
| 4386 | + struct drm_i915_private *i915 = dp_to_i915(intel_dp); | |
| 4386 | 4387 | struct intel_connector *connector = intel_dp->attached_connector; |
| 4387 | 4388 | struct edid *edid; |
| 4389 | + bool vrr_capable; | |
| 4388 | 4390 | |
| 4389 | 4391 | intel_dp_unset_edid(intel_dp); |
| 4390 | 4392 | edid = intel_dp_get_edid(intel_dp); |
| 4391 | 4393 | connector->detect_edid = edid; |
| 4392 | 4394 | |
| 4395 | + vrr_capable = intel_vrr_is_capable(&connector->base); | |
| 4396 | + drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] VRR capable: %s\n", | |
| 4397 | + connector->base.base.id, connector->base.name, str_yes_no(vrr_capable)); | |
| 4398 | + drm_connector_set_vrr_capable_property(&connector->base, vrr_capable); | |
| 4399 | + | |
| 4393 | 4400 | intel_dp_update_dfp(intel_dp, edid); |
| 4394 | 4401 | intel_dp_update_420(intel_dp); |
| 4395 | 4402 | |
| @@ -4422,6 +4429,9 @@ intel_dp_unset_edid(struct intel_dp *intel_dp) · 26 unmodified lines | ||
| 4422 | 4429 | |
| 4423 | 4430 | intel_dp->dfp.ycbcr_444_to_420 = false; |
| 4424 | 4431 | connector->base.ycbcr_420_allowed = false; |
| 4432 | + | |
| 4433 | + drm_connector_set_vrr_capable_property(&connector->base, | |
| 4434 | + false); | |
| 4425 | 4435 | } |
| 4426 | 4436 | |
| 4427 | 4437 | static int |
| @@ -4572,14 +4582,9 @@ static int intel_dp_get_modes(struct drm_connector *connector) · 144 unmodified lines | ||
| 4572 | 4582 | int num_modes = 0; |
| 4573 | 4583 | |
| 4574 | 4584 | edid = intel_connector->detect_edid; |
| 4575 | − if (edid) { | |
| 4585 | + if (edid) | |
| 4576 | 4586 | num_modes = intel_connector_update_modes(connector, edid); |
| 4577 | 4587 | |
| 4578 | − if (intel_vrr_is_capable(connector)) | |
| 4579 | − drm_connector_set_vrr_capable_property(connector, | |
| 4580 | − true); | |
| 4581 | − } | |
| 4582 | − | |
| 4583 | 4588 | /* Also add fixed mode, which may or may not be present in EDID */ |
| 4584 | 4589 | if (intel_dp_is_edp(intel_attached_dp(intel_connector)) && |
| 4585 | 4590 | intel_connector->panel.fixed_mode) { |
| @@ -97,6 +97,14 @@ · 96 unmodified lines | ||
| 97 | 97 | |
| 98 | 98 | #define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_1 0x359 |
| 99 | 99 | |
| 100 | +enum intel_dp_aux_backlight_modparam { | |
| 101 | + INTEL_DP_AUX_BACKLIGHT_AUTO = -1, | |
| 102 | + INTEL_DP_AUX_BACKLIGHT_OFF = 0, | |
| 103 | + INTEL_DP_AUX_BACKLIGHT_ON = 1, | |
| 104 | + INTEL_DP_AUX_BACKLIGHT_FORCE_VESA = 2, | |
| 105 | + INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL = 3, | |
| 106 | +}; | |
| 107 | + | |
| 100 | 108 | /* Intel EDP backlight callbacks */ |
| 101 | 109 | static bool |
| 102 | 110 | intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) |
| @@ -126,6 +134,24 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) · 23 unmodified lines | ||
| 126 | 134 | return false; |
| 127 | 135 | } |
| 128 | 136 | |
| 137 | + /* | |
| 138 | + * If we don't have HDR static metadata there is no way to | |
| 139 | + * runtime detect used range for nits based control. For now | |
| 140 | + * do not use Intel proprietary eDP backlight control if we | |
| 141 | + * don't have this data in panel EDID. In case we find panel | |
| 142 | + * which supports only nits based control, but doesn't provide | |
| 143 | + * HDR static metadata we need to start maintaining table of | |
| 144 | + * ranges for such panels. | |
| 145 | + */ | |
| 146 | + if (i915->params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL && | |
| 147 | + !(connector->base.hdr_sink_metadata.hdmi_type1.metadata_type & | |
| 148 | + BIT(HDMI_STATIC_METADATA_TYPE1))) { | |
| 149 | + drm_info(&i915->drm, | |
| 150 | + "Panel is missing HDR static metadata. Possible support for Intel HDR backlight interface is not used. If your backlight controls don't work try booting with i915.enable_dpcd_backlight=%d. needs this, please file a _new_ bug report on drm/i915, see " FDO_BUG_URL " for details.\n", | |
| 151 | + INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL); | |
| 152 | + return false; | |
| 153 | + } | |
| 154 | + | |
| 129 | 155 | panel->backlight.edp.intel.sdr_uses_aux = |
| 130 | 156 | tcon_cap[2] & INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP; |
| 131 | 157 | |
| @@ -413,14 +439,6 @@ static const struct intel_panel_bl_funcs intel_dp_vesa_bl_funcs = { · 281 unmodified lines | ||
| 413 | 439 | .get = intel_dp_aux_vesa_get_backlight, |
| 414 | 440 | }; |
| 415 | 441 | |
| 416 | −enum intel_dp_aux_backlight_modparam { | |
| 417 | − INTEL_DP_AUX_BACKLIGHT_AUTO = -1, | |
| 418 | − INTEL_DP_AUX_BACKLIGHT_OFF = 0, | |
| 419 | − INTEL_DP_AUX_BACKLIGHT_ON = 1, | |
| 420 | − INTEL_DP_AUX_BACKLIGHT_FORCE_VESA = 2, | |
| 421 | − INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL = 3, | |
| 422 | −}; | |
| 423 | − | |
| 424 | 442 | int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector) |
| 425 | 443 | { |
| 426 | 444 | struct drm_device *dev = connector->base.dev; |
| @@ -1037,7 +1037,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, · 1036 unmodified lines | ||
| 1037 | 1037 | struct intel_plane_state *plane_state = |
| 1038 | 1038 | intel_atomic_get_new_plane_state(state, plane); |
| 1039 | 1039 | const struct drm_framebuffer *fb = plane_state->hw.fb; |
| 1040 | − struct intel_crtc *crtc = to_intel_crtc(plane_state->uapi.crtc); | |
| 1040 | + struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc); | |
| 1041 | 1041 | const struct intel_crtc_state *crtc_state; |
| 1042 | 1042 | struct intel_fbc *fbc = plane->fbc; |
| 1043 | 1043 | |
| @@ -887,6 +887,20 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, · 886 unmodified lines | ||
| 887 | 887 | return false; |
| 888 | 888 | } |
| 889 | 889 | |
| 890 | + /* Wa_16011303918:adl-p */ | |
| 891 | + if (crtc_state->vrr.enable && | |
| 892 | + IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) { | |
| 893 | + drm_dbg_kms(&dev_priv->drm, | |
| 894 | + "PSR2 not enabled, not compatible with HW stepping + VRR\n"); | |
| 895 | + return false; | |
| 896 | + } | |
| 897 | + | |
| 898 | + if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp, crtc_state)) { | |
| 899 | + drm_dbg_kms(&dev_priv->drm, | |
| 900 | + "PSR2 not enabled, PSR2 SDP indication do not fit in hblank\n"); | |
| 901 | + return false; | |
| 902 | + } | |
| 903 | + | |
| 890 | 904 | if (HAS_PSR2_SEL_FETCH(dev_priv)) { |
| 891 | 905 | if (!intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) && |
| 892 | 906 | !HAS_PSR_HW_TRACKING(dev_priv)) { |
| @@ -900,12 +914,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, · 7 unmodified lines | ||
| 900 | 914 | if (!crtc_state->enable_psr2_sel_fetch && |
| 901 | 915 | IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_C0)) { |
| 902 | 916 | drm_dbg_kms(&dev_priv->drm, "PSR2 HW tracking is not supported this Display stepping\n"); |
| 903 | − return false; | |
| 917 | + goto unsupported; | |
| 904 | 918 | } |
| 905 | 919 | |
| 906 | 920 | if (!psr2_granularity_check(intel_dp, crtc_state)) { |
| 907 | 921 | drm_dbg_kms(&dev_priv->drm, "PSR2 not enabled, SU granularity not compatible\n"); |
| 908 | − return false; | |
| 922 | + goto unsupported; | |
| 909 | 923 | } |
| 910 | 924 | |
| 911 | 925 | if (!crtc_state->enable_psr2_sel_fetch && |
| @@ -914,25 +928,15 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, · 2 unmodified lines | ||
| 914 | 928 | "PSR2 not enabled, resolution %dx%d > max supported %dx%d\n", |
| 915 | 929 | crtc_hdisplay, crtc_vdisplay, |
| 916 | 930 | psr_max_h, psr_max_v); |
| 917 | − return false; | |
| 918 | − } | |
| 919 | − | |
| 920 | − if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp, crtc_state)) { | |
| 921 | − drm_dbg_kms(&dev_priv->drm, | |
| 922 | − "PSR2 not enabled, PSR2 SDP indication do not fit in hblank\n"); | |
| 923 | − return false; | |
| 924 | − } | |
| 925 | − | |
| 926 | − /* Wa_16011303918:adl-p */ | |
| 927 | − if (crtc_state->vrr.enable && | |
| 928 | − IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) { | |
| 929 | − drm_dbg_kms(&dev_priv->drm, | |
| 930 | − "PSR2 not enabled, not compatible with HW stepping + VRR\n"); | |
| 931 | − return false; | |
| 931 | + goto unsupported; | |
| 932 | 932 | } |
| 933 | 933 | |
| 934 | 934 | tgl_dc3co_exitline_compute_config(intel_dp, crtc_state); |
| 935 | 935 | return true; |
| 936 | + | |
| 937 | +unsupported: | |
| 938 | + crtc_state->enable_psr2_sel_fetch = false; | |
| 939 | + return false; | |
| 936 | 940 | } |
| 937 | 941 | |
| 938 | 942 | void intel_psr_compute_config(struct intel_dp *intel_dp, |
| @@ -70,7 +70,7 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data, · 69 unmodified lines | ||
| 70 | 70 | * mmap ioctl is disallowed for all discrete platforms, |
| 71 | 71 | * and for all platforms with GRAPHICS_VER > 12. |
| 72 | 72 | */ |
| 73 | − if (IS_DGFX(i915) || GRAPHICS_VER(i915) > 12) | |
| 73 | + if (IS_DGFX(i915) || GRAPHICS_VER_FULL(i915) > IP_VER(12, 0)) | |
| 74 | 74 | return -EOPNOTSUPP; |
| 75 | 75 | |
| 76 | 76 | if (args->flags & ~(I915_MMAP_WC)) |
| @@ -4345,12 +4345,12 @@ · 4344 unmodified lines | ||
| 4345 | 4345 | #define _DSPAADDR 0x70184 |
| 4346 | 4346 | #define _DSPASTRIDE 0x70188 |
| 4347 | 4347 | #define _DSPAPOS 0x7018C /* reserved */ |
| 4348 | −#define DISP_POS_Y_MASK REG_GENMASK(31, 0) | |
| 4348 | +#define DISP_POS_Y_MASK REG_GENMASK(31, 16) | |
| 4349 | 4349 | #define DISP_POS_Y(y) REG_FIELD_PREP(DISP_POS_Y_MASK, (y)) |
| 4350 | 4350 | #define DISP_POS_X_MASK REG_GENMASK(15, 0) |
| 4351 | 4351 | #define DISP_POS_X(x) REG_FIELD_PREP(DISP_POS_X_MASK, (x)) |
| 4352 | 4352 | #define _DSPASIZE 0x70190 |
| 4353 | −#define DISP_HEIGHT_MASK REG_GENMASK(31, 0) | |
| 4353 | +#define DISP_HEIGHT_MASK REG_GENMASK(31, 16) | |
| 4354 | 4354 | #define DISP_HEIGHT(h) REG_FIELD_PREP(DISP_HEIGHT_MASK, (h)) |
| 4355 | 4355 | #define DISP_WIDTH_MASK REG_GENMASK(15, 0) |
| 4356 | 4356 | #define DISP_WIDTH(w) REG_FIELD_PREP(DISP_WIDTH_MASK, (w)) |
| @@ -5152,7 +5152,7 @@ · 795 unmodified lines | ||
| 5152 | 5152 | #define _SEL_FETCH_PLANE_BASE_6_A 0x70940 |
| 5153 | 5153 | #define _SEL_FETCH_PLANE_BASE_7_A 0x70960 |
| 5154 | 5154 | #define _SEL_FETCH_PLANE_BASE_CUR_A 0x70880 |
| 5155 | −#define _SEL_FETCH_PLANE_BASE_1_B 0x70990 | |
| 5155 | +#define _SEL_FETCH_PLANE_BASE_1_B 0x71890 | |
| 5156 | 5156 | |
| 5157 | 5157 | #define _SEL_FETCH_PLANE_BASE_A(plane) _PICK(plane, \ |
| 5158 | 5158 | _SEL_FETCH_PLANE_BASE_1_A, \ |
| @@ -1742,7 +1742,7 @@ a6xx_create_private_address_space(struct msm_gpu *gpu) · 1741 unmodified lines | ||
| 1742 | 1742 | return ERR_CAST(mmu); |
| 1743 | 1743 | |
| 1744 | 1744 | return msm_gem_address_space_create(mmu, |
| 1745 | − "gpu", 0x100000000ULL, 0x1ffffffffULL); | |
| 1745 | + "gpu", 0x100000000ULL, SZ_4G); | |
| 1746 | 1746 | } |
| 1747 | 1747 | |
| 1748 | 1748 | static uint32_t a6xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) |
| @@ -599,43 +599,91 @@ static const struct of_device_id dt_match[] = { · 598 unmodified lines | ||
| 599 | 599 | {} |
| 600 | 600 | }; |
| 601 | 601 | |
| 602 | −#ifdef CONFIG_PM | |
| 603 | −static int adreno_resume(struct device *dev) | |
| 602 | +static int adreno_runtime_resume(struct device *dev) | |
| 604 | 603 | { |
| 605 | 604 | struct msm_gpu *gpu = dev_to_gpu(dev); |
| 606 | 605 | |
| 607 | 606 | return gpu->funcs->pm_resume(gpu); |
| 608 | 607 | } |
| 609 | 608 | |
| 610 | −static int active_submits(struct msm_gpu *gpu) | |
| 609 | +static int adreno_runtime_suspend(struct device *dev) | |
| 611 | 610 | { |
| 612 | − int active_submits; | |
| 613 | − mutex_lock(&gpu->active_lock); | |
| 614 | − active_submits = gpu->active_submits; | |
| 615 | − mutex_unlock(&gpu->active_lock); | |
| 616 | − return active_submits; | |
| 611 | + struct msm_gpu *gpu = dev_to_gpu(dev); | |
| 612 | + | |
| 613 | + /* | |
| 614 | + * We should be holding a runpm ref, which will prevent | |
| 615 | + * runtime suspend. In the system suspend path, we've | |
| 616 | + * already waited for active jobs to complete. | |
| 617 | + */ | |
| 618 | + WARN_ON_ONCE(gpu->active_submits); | |
| 619 | + | |
| 620 | + return gpu->funcs->pm_suspend(gpu); | |
| 621 | +} | |
| 622 | + | |
| 623 | +static void suspend_scheduler(struct msm_gpu *gpu) | |
| 624 | +{ | |
| 625 | + int i; | |
| 626 | + | |
| 627 | + /* | |
| 628 | + * Shut down the scheduler before we force suspend, so that | |
| 629 | + * suspend isn't racing with scheduler kthread feeding us | |
| 630 | + * more work. | |
| 631 | + * | |
| 632 | + * Note, we just want to park the thread, and let any jobs | |
| 633 | + * that are already on the hw queue complete normally, as | |
| 634 | + * opposed to the drm_sched_stop() path used for handling | |
| 635 | + * faulting/timed-out jobs. We can't really cancel any jobs | |
| 636 | + * already on the hw queue without racing with the GPU. | |
| 637 | + */ | |
| 638 | + for (i = 0; i < gpu->nr_rings; i++) { | |
| 639 | + struct drm_gpu_scheduler *sched = &gpu->rb[i]->sched; | |
| 640 | + kthread_park(sched->thread); | |
| 641 | + } | |
| 617 | 642 | } |
| 618 | 643 | |
| 619 | −static int adreno_suspend(struct device *dev) | |
| 644 | +static void resume_scheduler(struct msm_gpu *gpu) | |
| 645 | +{ | |
| 646 | + int i; | |
| 647 | + | |
| 648 | + for (i = 0; i < gpu->nr_rings; i++) { | |
| 649 | + struct drm_gpu_scheduler *sched = &gpu->rb[i]->sched; | |
| 650 | + kthread_unpark(sched->thread); | |
| 651 | + } | |
| 652 | +} | |
| 653 | + | |
| 654 | +static int adreno_system_suspend(struct device *dev) | |
| 620 | 655 | { |
| 621 | 656 | struct msm_gpu *gpu = dev_to_gpu(dev); |
| 622 | − int remaining; | |
| 657 | + int remaining, ret; | |
| 658 | + | |
| 659 | + suspend_scheduler(gpu); | |
| 623 | 660 | |
| 624 | 661 | remaining = wait_event_timeout(gpu->retire_event, |
| 625 | − active_submits(gpu) == 0, | |
| 662 | + gpu->active_submits == 0, | |
| 626 | 663 | msecs_to_jiffies(1000)); |
| 627 | 664 | if (remaining == 0) { |
| 628 | 665 | dev_err(dev, "Timeout waiting for GPU to suspend\n"); |
| 629 | − return -EBUSY; | |
| 666 | + ret = -EBUSY; | |
| 667 | + goto out; | |
| 630 | 668 | } |
| 631 | 669 | |
| 632 | − return gpu->funcs->pm_suspend(gpu); | |
| 670 | + ret = pm_runtime_force_suspend(dev); | |
| 671 | +out: | |
| 672 | + if (ret) | |
| 673 | + resume_scheduler(gpu); | |
| 674 | + | |
| 675 | + return ret; | |
| 676 | +} | |
| 677 | + | |
| 678 | +static int adreno_system_resume(struct device *dev) | |
| 679 | +{ | |
| 680 | + resume_scheduler(dev_to_gpu(dev)); | |
| 681 | + return pm_runtime_force_resume(dev); | |
| 633 | 682 | } |
| 634 | −#endif | |
| 635 | 683 | |
| 636 | 684 | static const struct dev_pm_ops adreno_pm_ops = { |
| 637 | − SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) | |
| 638 | − SET_RUNTIME_PM_OPS(adreno_suspend, adreno_resume, NULL) | |
| 685 | + SYSTEM_SLEEP_PM_OPS(adreno_system_suspend, adreno_system_resume) | |
| 686 | + RUNTIME_PM_OPS(adreno_runtime_suspend, adreno_runtime_resume, NULL) | |
| 639 | 687 | }; |
| 640 | 688 | |
| 641 | 689 | static struct platform_driver adreno_driver = { |
| @@ -54,87 +54,87 @@ struct dpu_intr_reg { · 53 unmodified lines | ||
| 54 | 54 | * When making changes be sure to sync with dpu_hw_intr_reg |
| 55 | 55 | */ |
| 56 | 56 | static const struct dpu_intr_reg dpu_intr_set[] = { |
| 57 | − { | |
| 57 | + [MDP_SSPP_TOP0_INTR] = { | |
| 58 | 58 | MDP_SSPP_TOP0_OFF+INTR_CLEAR, |
| 59 | 59 | MDP_SSPP_TOP0_OFF+INTR_EN, |
| 60 | 60 | MDP_SSPP_TOP0_OFF+INTR_STATUS |
| 61 | 61 | }, |
| 62 | − { | |
| 62 | + [MDP_SSPP_TOP0_INTR2] = { | |
| 63 | 63 | MDP_SSPP_TOP0_OFF+INTR2_CLEAR, |
| 64 | 64 | MDP_SSPP_TOP0_OFF+INTR2_EN, |
| 65 | 65 | MDP_SSPP_TOP0_OFF+INTR2_STATUS |
| 66 | 66 | }, |
| 67 | − { | |
| 67 | + [MDP_SSPP_TOP0_HIST_INTR] = { | |
| 68 | 68 | MDP_SSPP_TOP0_OFF+HIST_INTR_CLEAR, |
| 69 | 69 | MDP_SSPP_TOP0_OFF+HIST_INTR_EN, |
| 70 | 70 | MDP_SSPP_TOP0_OFF+HIST_INTR_STATUS |
| 71 | 71 | }, |
| 72 | − { | |
| 72 | + [MDP_INTF0_INTR] = { | |
| 73 | 73 | MDP_INTF_0_OFF+INTF_INTR_CLEAR, |
| 74 | 74 | MDP_INTF_0_OFF+INTF_INTR_EN, |
| 75 | 75 | MDP_INTF_0_OFF+INTF_INTR_STATUS |
| 76 | 76 | }, |
| 77 | − { | |
| 77 | + [MDP_INTF1_INTR] = { | |
| 78 | 78 | MDP_INTF_1_OFF+INTF_INTR_CLEAR, |
| 79 | 79 | MDP_INTF_1_OFF+INTF_INTR_EN, |
| 80 | 80 | MDP_INTF_1_OFF+INTF_INTR_STATUS |
| 81 | 81 | }, |
| 82 | − { | |
| 82 | + [MDP_INTF2_INTR] = { | |
| 83 | 83 | MDP_INTF_2_OFF+INTF_INTR_CLEAR, |
| 84 | 84 | MDP_INTF_2_OFF+INTF_INTR_EN, |
| 85 | 85 | MDP_INTF_2_OFF+INTF_INTR_STATUS |
| 86 | 86 | }, |
| 87 | − { | |
| 87 | + [MDP_INTF3_INTR] = { | |
| 88 | 88 | MDP_INTF_3_OFF+INTF_INTR_CLEAR, |
| 89 | 89 | MDP_INTF_3_OFF+INTF_INTR_EN, |
| 90 | 90 | MDP_INTF_3_OFF+INTF_INTR_STATUS |
| 91 | 91 | }, |
| 92 | − { | |
| 92 | + [MDP_INTF4_INTR] = { | |
| 93 | 93 | MDP_INTF_4_OFF+INTF_INTR_CLEAR, |
| 94 | 94 | MDP_INTF_4_OFF+INTF_INTR_EN, |
| 95 | 95 | MDP_INTF_4_OFF+INTF_INTR_STATUS |
| 96 | 96 | }, |
| 97 | − { | |
| 97 | + [MDP_INTF5_INTR] = { | |
| 98 | 98 | MDP_INTF_5_OFF+INTF_INTR_CLEAR, |
| 99 | 99 | MDP_INTF_5_OFF+INTF_INTR_EN, |
| 100 | 100 | MDP_INTF_5_OFF+INTF_INTR_STATUS |
| 101 | 101 | }, |
| 102 | − { | |
| 102 | + [MDP_AD4_0_INTR] = { | |
| 103 | 103 | MDP_AD4_0_OFF + MDP_AD4_INTR_CLEAR_OFF, |
| 104 | 104 | MDP_AD4_0_OFF + MDP_AD4_INTR_EN_OFF, |
| 105 | 105 | MDP_AD4_0_OFF + MDP_AD4_INTR_STATUS_OFF, |
| 106 | 106 | }, |
| 107 | − { | |
| 107 | + [MDP_AD4_1_INTR] = { | |
| 108 | 108 | MDP_AD4_1_OFF + MDP_AD4_INTR_CLEAR_OFF, |
| 109 | 109 | MDP_AD4_1_OFF + MDP_AD4_INTR_EN_OFF, |
| 110 | 110 | MDP_AD4_1_OFF + MDP_AD4_INTR_STATUS_OFF, |
| 111 | 111 | }, |
| 112 | − { | |
| 112 | + [MDP_INTF0_7xxx_INTR] = { | |
| 113 | 113 | MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_CLEAR, |
| 114 | 114 | MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_EN, |
| 115 | 115 | MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_STATUS |
| 116 | 116 | }, |
| 117 | − { | |
| 117 | + [MDP_INTF1_7xxx_INTR] = { | |
| 118 | 118 | MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_CLEAR, |
| 119 | 119 | MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_EN, |
| 120 | 120 | MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_STATUS |
| 121 | 121 | }, |
| 122 | − { | |
| 122 | + [MDP_INTF2_7xxx_INTR] = { | |
| 123 | 123 | MDP_INTF_2_OFF_REV_7xxx+INTF_INTR_CLEAR, |
| 124 | 124 | MDP_INTF_2_OFF_REV_7xxx+INTF_INTR_EN, |
| 125 | 125 | MDP_INTF_2_OFF_REV_7xxx+INTF_INTR_STATUS |
| 126 | 126 | }, |
| 127 | − { | |
| 127 | + [MDP_INTF3_7xxx_INTR] = { | |
| 128 | 128 | MDP_INTF_3_OFF_REV_7xxx+INTF_INTR_CLEAR, |
| 129 | 129 | MDP_INTF_3_OFF_REV_7xxx+INTF_INTR_EN, |
| 130 | 130 | MDP_INTF_3_OFF_REV_7xxx+INTF_INTR_STATUS |
| 131 | 131 | }, |
| 132 | − { | |
| 132 | + [MDP_INTF4_7xxx_INTR] = { | |
| 133 | 133 | MDP_INTF_4_OFF_REV_7xxx+INTF_INTR_CLEAR, |
| 134 | 134 | MDP_INTF_4_OFF_REV_7xxx+INTF_INTR_EN, |
| 135 | 135 | MDP_INTF_4_OFF_REV_7xxx+INTF_INTR_STATUS |
| 136 | 136 | }, |
| 137 | − { | |
| 137 | + [MDP_INTF5_7xxx_INTR] = { | |
| 138 | 138 | MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_CLEAR, |
| 139 | 139 | MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_EN, |
| 140 | 140 | MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_STATUS |
| @@ -98,7 +98,10 @@ static void mdp5_plane_reset(struct drm_plane *plane) · 97 unmodified lines | ||
| 98 | 98 | __drm_atomic_helper_plane_destroy_state(plane->state); |
| 99 | 99 | |
| 100 | 100 | kfree(to_mdp5_plane_state(plane->state)); |
| 101 | + plane->state = NULL; | |
| 101 | 102 | mdp5_state = kzalloc(sizeof(*mdp5_state), GFP_KERNEL); |
| 103 | + if (!mdp5_state) | |
| 104 | + return; | |
| 102 | 105 | __drm_atomic_helper_plane_reset(plane, &mdp5_state->base); |
| 103 | 106 | } |
| 104 | 107 | |
| @@ -176,6 +176,8 @@ void msm_disp_snapshot_add_block(struct msm_disp_state *disp_state, u32 len, · 175 unmodified lines | ||
| 176 | 176 | va_list va; |
| 177 | 177 | |
| 178 | 178 | new_blk = kzalloc(sizeof(struct msm_disp_state_block), GFP_KERNEL); |
| 179 | + if (!new_blk) | |
| 180 | + return; | |
| 179 | 181 | |
| 180 | 182 | va_start(va, fmt); |
| 181 | 183 | |
| @@ -580,6 +580,12 @@ static int dp_hpd_plug_handle(struct dp_display_private *dp, u32 data) · 579 unmodified lines | ||
| 580 | 580 | dp->dp_display.connector_type, state); |
| 581 | 581 | mutex_unlock(&dp->event_mutex); |
| 582 | 582 | |
| 583 | + /* | |
| 584 | + * add fail safe mode outside event_mutex scope | |
| 585 | + * to avoid potiential circular lock with drm thread | |
| 586 | + */ | |
| 587 | + dp_panel_add_fail_safe_mode(dp->dp_display.connector); | |
| 588 | + | |
| 583 | 589 | /* uevent will complete connection part */ |
| 584 | 590 | return 0; |
| 585 | 591 | }; |
| @@ -151,6 +151,15 @@ static int dp_panel_update_modes(struct drm_connector *connector, · 150 unmodified lines | ||
| 151 | 151 | return rc; |
| 152 | 152 | } |
| 153 | 153 | |
| 154 | +void dp_panel_add_fail_safe_mode(struct drm_connector *connector) | |
| 155 | +{ | |
| 156 | + /* fail safe edid */ | |
| 157 | + mutex_lock(&connector->dev->mode_config.mutex); | |
| 158 | + if (drm_add_modes_noedid(connector, 640, 480)) | |
| 159 | + drm_set_preferred_mode(connector, 640, 480); | |
| 160 | + mutex_unlock(&connector->dev->mode_config.mutex); | |
| 161 | +} | |
| 162 | + | |
| 154 | 163 | int dp_panel_read_sink_caps(struct dp_panel *dp_panel, |
| 155 | 164 | struct drm_connector *connector) |
| 156 | 165 | { |
| @@ -207,16 +216,7 @@ int dp_panel_read_sink_caps(struct dp_panel *dp_panel, · 50 unmodified lines | ||
| 207 | 216 | goto end; |
| 208 | 217 | } |
| 209 | 218 | |
| 210 | − /* fail safe edid */ | |
| 211 | − mutex_lock(&connector->dev->mode_config.mutex); | |
| 212 | − if (drm_add_modes_noedid(connector, 640, 480)) | |
| 213 | − drm_set_preferred_mode(connector, 640, 480); | |
| 214 | − mutex_unlock(&connector->dev->mode_config.mutex); | |
| 215 | − } else { | |
| 216 | − /* always add fail-safe mode as backup mode */ | |
| 217 | − mutex_lock(&connector->dev->mode_config.mutex); | |
| 218 | − drm_add_modes_noedid(connector, 640, 480); | |
| 219 | − mutex_unlock(&connector->dev->mode_config.mutex); | |
| 219 | + dp_panel_add_fail_safe_mode(connector); | |
| 220 | 220 | } |
| 221 | 221 | |
| 222 | 222 | if (panel->aux_cfg_update_done) { |
| @@ -59,6 +59,7 @@ int dp_panel_init_panel_info(struct dp_panel *dp_panel); · 58 unmodified lines | ||
| 59 | 59 | int dp_panel_deinit(struct dp_panel *dp_panel); |
| 60 | 60 | int dp_panel_timing_cfg(struct dp_panel *dp_panel); |
| 61 | 61 | void dp_panel_dump_regs(struct dp_panel *dp_panel); |
| 62 | +void dp_panel_add_fail_safe_mode(struct drm_connector *connector); | |
| 62 | 63 | int dp_panel_read_sink_caps(struct dp_panel *dp_panel, |
| 63 | 64 | struct drm_connector *connector); |
| 64 | 65 | u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, u32 mode_max_bpp, |
| @@ -638,7 +638,7 @@ struct drm_connector *msm_dsi_manager_connector_init(u8 id) · 637 unmodified lines | ||
| 638 | 638 | return connector; |
| 639 | 639 | |
| 640 | 640 | fail: |
| 641 | − connector->funcs->destroy(msm_dsi->connector); | |
| 641 | + connector->funcs->destroy(connector); | |
| 642 | 642 | return ERR_PTR(ret); |
| 643 | 643 | } |
| 644 | 644 | |
| @@ -926,6 +926,7 @@ void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m, · 925 unmodified lines | ||
| 926 | 926 | get_pid_task(aspace->pid, PIDTYPE_PID); |
| 927 | 927 | if (task) { |
| 928 | 928 | comm = kstrdup(task->comm, GFP_KERNEL); |
| 929 | + put_task_struct(task); | |
| 929 | 930 | } else { |
| 930 | 931 | comm = NULL; |
| 931 | 932 | } |
| @@ -229,7 +229,7 @@ static void rpi_touchscreen_i2c_write(struct rpi_touchscreen *ts, · 228 unmodified lines | ||
| 229 | 229 | |
| 230 | 230 | ret = i2c_smbus_write_byte_data(ts->i2c, reg, val); |
| 231 | 231 | if (ret) |
| 232 | − dev_err(&ts->dsi->dev, "I2C write failed: %d\n", ret); | |
| 232 | + dev_err(&ts->i2c->dev, "I2C write failed: %d\n", ret); | |
| 233 | 233 | } |
| 234 | 234 | |
| 235 | 235 | static int rpi_touchscreen_write(struct rpi_touchscreen *ts, u16 reg, u32 val) |
| @@ -265,7 +265,7 @@ static int rpi_touchscreen_noop(struct drm_panel *panel) · 29 unmodified lines | ||
| 265 | 265 | return 0; |
| 266 | 266 | } |
| 267 | 267 | |
| 268 | −static int rpi_touchscreen_enable(struct drm_panel *panel) | |
| 268 | +static int rpi_touchscreen_prepare(struct drm_panel *panel) | |
| 269 | 269 | { |
| 270 | 270 | struct rpi_touchscreen *ts = panel_to_ts(panel); |
| 271 | 271 | int i; |
| @@ -295,6 +295,13 @@ static int rpi_touchscreen_enable(struct drm_panel *panel) · 23 unmodified lines | ||
| 295 | 295 | rpi_touchscreen_write(ts, DSI_STARTDSI, 0x01); |
| 296 | 296 | msleep(100); |
| 297 | 297 | |
| 298 | + return 0; | |
| 299 | +} | |
| 300 | + | |
| 301 | +static int rpi_touchscreen_enable(struct drm_panel *panel) | |
| 302 | +{ | |
| 303 | + struct rpi_touchscreen *ts = panel_to_ts(panel); | |
| 304 | + | |
| 298 | 305 | /* Turn on the backlight. */ |
| 299 | 306 | rpi_touchscreen_i2c_write(ts, REG_PWM, 255); |
| 300 | 307 | |
| @@ -349,7 +356,7 @@ static int rpi_touchscreen_get_modes(struct drm_panel *panel, · 48 unmodified lines | ||
| 349 | 356 | static const struct drm_panel_funcs rpi_touchscreen_funcs = { |
| 350 | 357 | .disable = rpi_touchscreen_disable, |
| 351 | 358 | .unprepare = rpi_touchscreen_noop, |
| 352 | − .prepare = rpi_touchscreen_noop, | |
| 359 | + .prepare = rpi_touchscreen_prepare, | |
| 353 | 360 | .enable = rpi_touchscreen_enable, |
| 354 | 361 | .get_modes = rpi_touchscreen_get_modes, |
| 355 | 362 | }; |
| @@ -96,7 +96,7 @@ int radeon_sync_resv(struct radeon_device *rdev, · 95 unmodified lines | ||
| 96 | 96 | struct dma_fence *f; |
| 97 | 97 | int r = 0; |
| 98 | 98 | |
| 99 | − dma_resv_for_each_fence(&cursor, resv, shared, f) { | |
| 99 | + dma_resv_for_each_fence(&cursor, resv, !shared, f) { | |
| 100 | 100 | fence = to_radeon_fence(f); |
| 101 | 101 | if (fence && fence->rdev == rdev) |
| 102 | 102 | radeon_sync_fence(sync, fence); |
| @@ -222,13 +222,11 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, · 221 unmodified lines | ||
| 222 | 222 | |
| 223 | 223 | /* Set the physical address of the buffer in memory */ |
| 224 | 224 | paddr = drm_fb_cma_get_gem_addr(fb, state, 0); |
| 225 | − paddr -= PHYS_OFFSET; | |
| 226 | 225 | DRM_DEBUG_DRIVER("Setting buffer #0 address to %pad\n", &paddr); |
| 227 | 226 | regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr); |
| 228 | 227 | |
| 229 | 228 | if (fb->format->num_planes > 1) { |
| 230 | 229 | paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 2 : 1); |
| 231 | − paddr -= PHYS_OFFSET; | |
| 232 | 230 | DRM_DEBUG_DRIVER("Setting buffer #1 address to %pad\n", &paddr); |
| 233 | 231 | regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG, |
| 234 | 232 | paddr); |
| @@ -236,7 +234,6 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, · 1 unmodified line | ||
| 236 | 234 | |
| 237 | 235 | if (fb->format->num_planes > 2) { |
| 238 | 236 | paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 1 : 2); |
| 239 | − paddr -= PHYS_OFFSET; | |
| 240 | 237 | DRM_DEBUG_DRIVER("Setting buffer #2 address to %pad\n", &paddr); |
| 241 | 238 | regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR2_REG, |
| 242 | 239 | paddr); |
| @@ -2,6 +2,9 @@ · 1 unmodified line | ||
| 2 | 2 | config DRM_VC4 |
| 3 | 3 | tristate "Broadcom VC4 Graphics" |
| 4 | 4 | depends on ARCH_BCM || ARCH_BCM2835 || COMPILE_TEST |
| 5 | + # Make sure not 'y' when RASPBERRYPI_FIRMWARE is 'm'. This can only | |
| 6 | + # happen when COMPILE_TEST=y, hence the added !RASPBERRYPI_FIRMWARE. | |
| 7 | + depends on RASPBERRYPI_FIRMWARE || (COMPILE_TEST && !RASPBERRYPI_FIRMWARE) | |
| 5 | 8 | depends on DRM |
| 6 | 9 | depends on SND && SND_SOC |
| 7 | 10 | depends on COMMON_CLK |
| @@ -846,7 +846,7 @@ static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) · 845 unmodified lines | ||
| 846 | 846 | unsigned long phy_clock; |
| 847 | 847 | int ret; |
| 848 | 848 | |
| 849 | − ret = pm_runtime_get_sync(dev); | |
| 849 | + ret = pm_runtime_resume_and_get(dev); | |
| 850 | 850 | if (ret) { |
| 851 | 851 | DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->variant->port); |
| 852 | 852 | return; |
| @@ -46,6 +46,21 @@ vmw_buffer_object(struct ttm_buffer_object *bo) · 45 unmodified lines | ||
| 46 | 46 | return container_of(bo, struct vmw_buffer_object, base); |
| 47 | 47 | } |
| 48 | 48 | |
| 49 | +/** | |
| 50 | + * bo_is_vmw - check if the buffer object is a &vmw_buffer_object | |
| 51 | + * @bo: ttm buffer object to be checked | |
| 52 | + * | |
| 53 | + * Uses destroy function associated with the object to determine if this is | |
| 54 | + * a &vmw_buffer_object. | |
| 55 | + * | |
| 56 | + * Returns: | |
| 57 | + * true if the object is of &vmw_buffer_object type, false if not. | |
| 58 | + */ | |
| 59 | +static bool bo_is_vmw(struct ttm_buffer_object *bo) | |
| 60 | +{ | |
| 61 | + return bo->destroy == &vmw_bo_bo_free || | |
| 62 | + bo->destroy == &vmw_gem_destroy; | |
| 63 | +} | |
| 49 | 64 | |
| 50 | 65 | /** |
| 51 | 66 | * vmw_bo_pin_in_placement - Validate a buffer to placement. |
| @@ -615,8 +630,9 @@ int vmw_user_bo_synccpu_ioctl(struct drm_device *dev, void *data, · 563 unmodified lines | ||
| 615 | 630 | |
| 616 | 631 | ret = vmw_user_bo_synccpu_grab(vbo, arg->flags); |
| 617 | 632 | vmw_bo_unreference(&vbo); |
| 618 | − if (unlikely(ret != 0 && ret != -ERESTARTSYS && | |
| 619 | − ret != -EBUSY)) { | |
| 633 | + if (unlikely(ret != 0)) { | |
| 634 | + if (ret == -ERESTARTSYS || ret == -EBUSY) | |
| 635 | + return -EBUSY; | |
| 620 | 636 | DRM_ERROR("Failed synccpu grab on handle 0x%08x.\n", |
| 621 | 637 | (unsigned int) arg->handle); |
| 622 | 638 | return ret; |
| @@ -798,7 +814,7 @@ int vmw_dumb_create(struct drm_file *file_priv, · 175 unmodified lines | ||
| 798 | 814 | void vmw_bo_swap_notify(struct ttm_buffer_object *bo) |
| 799 | 815 | { |
| 800 | 816 | /* Is @bo embedded in a struct vmw_buffer_object? */ |
| 801 | − if (vmw_bo_is_vmw_bo(bo)) | |
| 817 | + if (!bo_is_vmw(bo)) | |
| 802 | 818 | return; |
| 803 | 819 | |
| 804 | 820 | /* Kill any cached kernel maps before swapout */ |
| @@ -822,7 +838,7 @@ void vmw_bo_move_notify(struct ttm_buffer_object *bo, · 17 unmodified lines | ||
| 822 | 838 | struct vmw_buffer_object *vbo; |
| 823 | 839 | |
| 824 | 840 | /* Make sure @bo is embedded in a struct vmw_buffer_object? */ |
| 825 | − if (vmw_bo_is_vmw_bo(bo)) | |
| 841 | + if (!bo_is_vmw(bo)) | |
| 826 | 842 | return; |
| 827 | 843 | |
| 828 | 844 | vbo = container_of(bo, struct vmw_buffer_object, base); |
| @@ -843,22 +859,3 @@ void vmw_bo_move_notify(struct ttm_buffer_object *bo, · 14 unmodified lines | ||
| 843 | 859 | if (mem->mem_type != VMW_PL_MOB && bo->resource->mem_type == VMW_PL_MOB) |
| 844 | 860 | vmw_resource_unbind_list(vbo); |
| 845 | 861 | } |
| 846 | − | |
| 847 | −/** | |
| 848 | − * vmw_bo_is_vmw_bo - check if the buffer object is a &vmw_buffer_object | |
| 849 | − * @bo: buffer object to be checked | |
| 850 | − * | |
| 851 | − * Uses destroy function associated with the object to determine if this is | |
| 852 | − * a &vmw_buffer_object. | |
| 853 | − * | |
| 854 | − * Returns: | |
| 855 | − * true if the object is of &vmw_buffer_object type, false if not. | |
| 856 | − */ | |
| 857 | −bool vmw_bo_is_vmw_bo(struct ttm_buffer_object *bo) | |
| 858 | −{ | |
| 859 | − if (bo->destroy == &vmw_bo_bo_free || | |
| 860 | − bo->destroy == &vmw_gem_destroy) | |
| 861 | − return true; | |
| 862 | − | |
| 863 | − return false; | |
| 864 | −} | |
| @@ -998,13 +998,10 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id) · 997 unmodified lines | ||
| 998 | 998 | goto out_no_fman; |
| 999 | 999 | } |
| 1000 | 1000 | |
| 1001 | − drm_vma_offset_manager_init(&dev_priv->vma_manager, | |
| 1002 | − DRM_FILE_PAGE_OFFSET_START, | |
| 1003 | − DRM_FILE_PAGE_OFFSET_SIZE); | |
| 1004 | 1001 | ret = ttm_device_init(&dev_priv->bdev, &vmw_bo_driver, |
| 1005 | 1002 | dev_priv->drm.dev, |
| 1006 | 1003 | dev_priv->drm.anon_inode->i_mapping, |
| 1007 | − &dev_priv->vma_manager, | |
| 1004 | + dev_priv->drm.vma_offset_manager, | |
| 1008 | 1005 | dev_priv->map_mode == vmw_dma_alloc_coherent, |
| 1009 | 1006 | false); |
| 1010 | 1007 | if (unlikely(ret != 0)) { |
| @@ -1174,7 +1171,6 @@ static void vmw_driver_unload(struct drm_device *dev) · 163 unmodified lines | ||
| 1174 | 1171 | vmw_devcaps_destroy(dev_priv); |
| 1175 | 1172 | vmw_vram_manager_fini(dev_priv); |
| 1176 | 1173 | ttm_device_fini(&dev_priv->bdev); |
| 1177 | − drm_vma_offset_manager_destroy(&dev_priv->vma_manager); | |
| 1178 | 1174 | vmw_release_device_late(dev_priv); |
| 1179 | 1175 | vmw_fence_manager_takedown(dev_priv->fman); |
| 1180 | 1176 | if (dev_priv->capabilities & SVGA_CAP_IRQMASK) |
| @@ -1398,7 +1394,7 @@ vmw_get_unmapped_area(struct file *file, unsigned long uaddr, · 217 unmodified lines | ||
| 1398 | 1394 | struct vmw_private *dev_priv = vmw_priv(file_priv->minor->dev); |
| 1399 | 1395 | |
| 1400 | 1396 | return drm_get_unmapped_area(file, uaddr, len, pgoff, flags, |
| 1401 | − &dev_priv->vma_manager); | |
| 1397 | + dev_priv->drm.vma_offset_manager); | |
| 1402 | 1398 | } |
| 1403 | 1399 | |
| 1404 | 1400 | static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val, |
| @@ -683,6 +683,9 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base) · 682 unmodified lines | ||
| 683 | 683 | container_of(base, struct vmw_user_surface, prime.base); |
| 684 | 684 | struct vmw_resource *res = &user_srf->srf.res; |
| 685 | 685 | |
| 686 | + if (base->shareable && res && res->backup) | |
| 687 | + drm_gem_object_put(&res->backup->base.base); | |
| 688 | + | |
| 686 | 689 | *p_base = NULL; |
| 687 | 690 | vmw_resource_unreference(&res); |
| 688 | 691 | } |
| @@ -857,6 +860,7 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, · 168 unmodified lines | ||
| 857 | 860 | goto out_unlock; |
| 858 | 861 | } |
| 859 | 862 | vmw_bo_reference(res->backup); |
| 863 | + drm_gem_object_get(&res->backup->base.base); | |
| 860 | 864 | } |
| 861 | 865 | |
| 862 | 866 | tmp = vmw_resource_reference(&srf->res); |
| @@ -1513,7 +1517,6 @@ vmw_gb_surface_define_internal(struct drm_device *dev, · 650 unmodified lines | ||
| 1513 | 1517 | &res->backup); |
| 1514 | 1518 | if (ret == 0) |
| 1515 | 1519 | vmw_bo_reference(res->backup); |
| 1516 | − | |
| 1517 | 1520 | } |
| 1518 | 1521 | |
| 1519 | 1522 | if (unlikely(ret != 0)) { |
| @@ -1561,6 +1564,8 @@ vmw_gb_surface_define_internal(struct drm_device *dev, · 41 unmodified lines | ||
| 1561 | 1564 | drm_vma_node_offset_addr(&res->backup->base.base.vma_node); |
| 1562 | 1565 | rep->buffer_size = res->backup->base.base.size; |
| 1563 | 1566 | rep->buffer_handle = backup_handle; |
| 1567 | + if (user_srf->prime.base.shareable) | |
| 1568 | + drm_gem_object_get(&res->backup->base.base); | |
| 1564 | 1569 | } else { |
| 1565 | 1570 | rep->buffer_map_handle = 0; |
| 1566 | 1571 | rep->buffer_size = 0; |
| @@ -179,6 +179,12 @@ struct imx_i2c_hwdata { · 178 unmodified lines | ||
| 179 | 179 | unsigned int ndivs; |
| 180 | 180 | unsigned int i2sr_clr_opcode; |
| 181 | 181 | unsigned int i2cr_ien_opcode; |
| 182 | + /* | |
| 183 | + * Errata ERR007805 or e7805: | |
| 184 | + * I2C: When the I2C clock speed is configured for 400 kHz, | |
| 185 | + * the SCL low period violates the I2C spec of 1.3 uS min. | |
| 186 | + */ | |
| 187 | + bool has_err007805; | |
| 182 | 188 | }; |
| 183 | 189 | |
| 184 | 190 | struct imx_i2c_dma { |
| @@ -240,6 +246,16 @@ static const struct imx_i2c_hwdata imx21_i2c_hwdata = { · 55 unmodified lines | ||
| 240 | 246 | |
| 241 | 247 | }; |
| 242 | 248 | |
| 249 | +static const struct imx_i2c_hwdata imx6_i2c_hwdata = { | |
| 250 | + .devtype = IMX21_I2C, | |
| 251 | + .regshift = IMX_I2C_REGSHIFT, | |
| 252 | + .clk_div = imx_i2c_clk_div, | |
| 253 | + .ndivs = ARRAY_SIZE(imx_i2c_clk_div), | |
| 254 | + .i2sr_clr_opcode = I2SR_CLR_OPCODE_W0C, | |
| 255 | + .i2cr_ien_opcode = I2CR_IEN_OPCODE_1, | |
| 256 | + .has_err007805 = true, | |
| 257 | +}; | |
| 258 | + | |
| 243 | 259 | static struct imx_i2c_hwdata vf610_i2c_hwdata = { |
| 244 | 260 | .devtype = VF610_I2C, |
| 245 | 261 | .regshift = VF610_I2C_REGSHIFT, |
| @@ -266,6 +282,16 @@ MODULE_DEVICE_TABLE(platform, imx_i2c_devtype); · 20 unmodified lines | ||
| 266 | 282 | static const struct of_device_id i2c_imx_dt_ids[] = { |
| 267 | 283 | { .compatible = "fsl,imx1-i2c", .data = &imx1_i2c_hwdata, }, |
| 268 | 284 | { .compatible = "fsl,imx21-i2c", .data = &imx21_i2c_hwdata, }, |
| 285 | + { .compatible = "fsl,imx6q-i2c", .data = &imx6_i2c_hwdata, }, | |
| 286 | + { .compatible = "fsl,imx6sl-i2c", .data = &imx6_i2c_hwdata, }, | |
| 287 | + { .compatible = "fsl,imx6sll-i2c", .data = &imx6_i2c_hwdata, }, | |
| 288 | + { .compatible = "fsl,imx6sx-i2c", .data = &imx6_i2c_hwdata, }, | |
| 289 | + { .compatible = "fsl,imx6ul-i2c", .data = &imx6_i2c_hwdata, }, | |
| 290 | + { .compatible = "fsl,imx7s-i2c", .data = &imx6_i2c_hwdata, }, | |
| 291 | + { .compatible = "fsl,imx8mm-i2c", .data = &imx6_i2c_hwdata, }, | |
| 292 | + { .compatible = "fsl,imx8mn-i2c", .data = &imx6_i2c_hwdata, }, | |
| 293 | + { .compatible = "fsl,imx8mp-i2c", .data = &imx6_i2c_hwdata, }, | |
| 294 | + { .compatible = "fsl,imx8mq-i2c", .data = &imx6_i2c_hwdata, }, | |
| 269 | 295 | { .compatible = "fsl,vf610-i2c", .data = &vf610_i2c_hwdata, }, |
| 270 | 296 | { /* sentinel */ } |
| 271 | 297 | }; |
| @@ -551,6 +577,13 @@ static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, · 279 unmodified lines | ||
| 551 | 577 | unsigned int div; |
| 552 | 578 | int i; |
| 553 | 579 | |
| 580 | + if (i2c_imx->hwdata->has_err007805 && i2c_imx->bitrate > 384000) { | |
| 581 | + dev_dbg(&i2c_imx->adapter.dev, | |
| 582 | + "SoC errata ERR007805 or e7805 applies, bus frequency limited from %d Hz to 384000 Hz.\n", | |
| 583 | + i2c_imx->bitrate); | |
| 584 | + i2c_imx->bitrate = 384000; | |
| 585 | + } | |
| 586 | + | |
| 554 | 587 | /* Divider value calculation */ |
| 555 | 588 | if (i2c_imx->cur_clk == i2c_clk_rate) |
| 556 | 589 | return; |
| @@ -145,8 +145,8 @@ · 144 unmodified lines | ||
| 145 | 145 | #define ISMT_SPGT_SPD_MASK 0xc0000000 /* SMBus Speed mask */ |
| 146 | 146 | #define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */ |
| 147 | 147 | #define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */ |
| 148 | −#define ISMT_SPGT_SPD_400K (0x2 << 30) /* 400 kHz */ | |
| 149 | −#define ISMT_SPGT_SPD_1M (0x3 << 30) /* 1 MHz */ | |
| 148 | +#define ISMT_SPGT_SPD_400K (0x2U << 30) /* 400 kHz */ | |
| 149 | +#define ISMT_SPGT_SPD_1M (0x3U << 30) /* 1 MHz */ | |
| 150 | 150 | |
| 151 | 151 | |
| 152 | 152 | /* MSI Control Register (MSICTL) bit definitions */ |
| @@ -137,6 +137,12 @@ static int pasemi_i2c_xfer_msg(struct i2c_adapter *adapter, · 136 unmodified lines | ||
| 137 | 137 | |
| 138 | 138 | TXFIFO_WR(smbus, msg->buf[msg->len-1] | |
| 139 | 139 | (stop ? MTXFIFO_STOP : 0)); |
| 140 | + | |
| 141 | + if (stop) { | |
| 142 | + err = pasemi_smb_waitready(smbus); | |
| 143 | + if (err) | |
| 144 | + goto reset_out; | |
| 145 | + } | |
| 140 | 146 | } |
| 141 | 147 | |
| 142 | 148 | return 0; |
| @@ -843,10 +843,8 @@ static int geni_i2c_probe(struct platform_device *pdev) · 842 unmodified lines | ||
| 843 | 843 | /* FIFO is disabled, so we can only use GPI DMA */ |
| 844 | 844 | gi2c->gpi_mode = true; |
| 845 | 845 | ret = setup_gpi_dma(gi2c); |
| 846 | − if (ret) { | |
| 847 | − dev_err(dev, "Failed to setup GPI DMA mode:%d ret\n", ret); | |
| 848 | − return ret; | |
| 849 | − } | |
| 846 | + if (ret) | |
| 847 | + return dev_err_probe(dev, ret, "Failed to setup GPI DMA mode\n"); | |
| 850 | 848 | |
| 851 | 849 | dev_dbg(dev, "Using GPI DMA mode for I2C\n"); |
| 852 | 850 | } else { |
| @@ -557,7 +557,7 @@ static long compat_i2cdev_ioctl(struct file *file, unsigned int cmd, unsigned lo · 556 unmodified lines | ||
| 557 | 557 | .addr = umsg.addr, |
| 558 | 558 | .flags = umsg.flags, |
| 559 | 559 | .len = umsg.len, |
| 560 | − .buf = compat_ptr(umsg.buf) | |
| 560 | + .buf = (__force __u8 *)compat_ptr(umsg.buf), | |
| 561 | 561 | }; |
| 562 | 562 | } |
| 563 | 563 | |
| @@ -668,16 +668,21 @@ static int i2cdev_attach_adapter(struct device *dev, void *dummy) · 104 unmodified lines | ||
| 668 | 668 | i2c_dev->dev.class = i2c_dev_class; |
| 669 | 669 | i2c_dev->dev.parent = &adap->dev; |
| 670 | 670 | i2c_dev->dev.release = i2cdev_dev_release; |
| 671 | − dev_set_name(&i2c_dev->dev, "i2c-%d", adap->nr); | |
| 671 | + | |
| 672 | + res = dev_set_name(&i2c_dev->dev, "i2c-%d", adap->nr); | |
| 673 | + if (res) | |
| 674 | + goto err_put_i2c_dev; | |
| 672 | 675 | |
| 673 | 676 | res = cdev_device_add(&i2c_dev->cdev, &i2c_dev->dev); |
| 674 | − if (res) { | |
| 675 | − put_i2c_dev(i2c_dev, false); | |
| 676 | − return res; | |
| 677 | − } | |
| 677 | + if (res) | |
| 678 | + goto err_put_i2c_dev; | |
| 678 | 679 | |
| 679 | 680 | pr_debug("adapter [%s] registered as minor %d\n", adap->name, adap->nr); |
| 680 | 681 | return 0; |
| 682 | + | |
| 683 | +err_put_i2c_dev: | |
| 684 | + put_i2c_dev(i2c_dev, false); | |
| 685 | + return res; | |
| 681 | 686 | } |
| 682 | 687 | |
| 683 | 688 | static int i2cdev_detach_adapter(struct device *dev, void *dummy) |
| @@ -69,7 +69,12 @@ static unsigned int preferred_states_mask; · 68 unmodified lines | ||
| 69 | 69 | static struct cpuidle_device __percpu *intel_idle_cpuidle_devices; |
| 70 | 70 | |
| 71 | 71 | static unsigned long auto_demotion_disable_flags; |
| 72 | −static bool disable_promotion_to_c1e; | |
| 72 | + | |
| 73 | +static enum { | |
| 74 | + C1E_PROMOTION_PRESERVE, | |
| 75 | + C1E_PROMOTION_ENABLE, | |
| 76 | + C1E_PROMOTION_DISABLE | |
| 77 | +} c1e_promotion = C1E_PROMOTION_PRESERVE; | |
| 73 | 78 | |
| 74 | 79 | struct idle_cpu { |
| 75 | 80 | struct cpuidle_state *state_table; |
| @@ -1398,8 +1403,6 @@ static inline void intel_idle_init_cstates_acpi(struct cpuidle_driver *drv) { } · 1322 unmodified lines | ||
| 1398 | 1403 | static inline bool intel_idle_off_by_default(u32 mwait_hint) { return false; } |
| 1399 | 1404 | #endif /* !CONFIG_ACPI_PROCESSOR_CSTATE */ |
| 1400 | 1405 | |
| 1401 | −static void c1e_promotion_enable(void); | |
| 1402 | − | |
| 1403 | 1406 | /** |
| 1404 | 1407 | * ivt_idle_state_table_update - Tune the idle states table for Ivy Town. |
| 1405 | 1408 | * |
| @@ -1578,17 +1581,14 @@ static void __init spr_idle_state_table_update(void) · 172 unmodified lines | ||
| 1578 | 1581 | unsigned long long msr; |
| 1579 | 1582 | |
| 1580 | 1583 | /* Check if user prefers C1E over C1. */ |
| 1581 | − if (preferred_states_mask & BIT(2)) { | |
| 1582 | − if (preferred_states_mask & BIT(1)) | |
| 1583 | − /* Both can't be enabled, stick to the defaults. */ | |
| 1584 | − return; | |
| 1585 | − | |
| 1584 | + if ((preferred_states_mask & BIT(2)) && | |
| 1585 | + !(preferred_states_mask & BIT(1))) { | |
| 1586 | + /* Disable C1 and enable C1E. */ | |
| 1586 | 1587 | spr_cstates[0].flags |= CPUIDLE_FLAG_UNUSABLE; |
| 1587 | 1588 | spr_cstates[1].flags &= ~CPUIDLE_FLAG_UNUSABLE; |
| 1588 | 1589 | |
| 1589 | 1590 | /* Enable C1E using the "C1E promotion" bit. */ |
| 1590 | − c1e_promotion_enable(); | |
| 1591 | − disable_promotion_to_c1e = false; | |
| 1591 | + c1e_promotion = C1E_PROMOTION_ENABLE; | |
| 1592 | 1592 | } |
| 1593 | 1593 | |
| 1594 | 1594 | /* |
| @@ -1754,7 +1754,9 @@ static int intel_idle_cpu_init(unsigned int cpu) · 159 unmodified lines | ||
| 1754 | 1754 | if (auto_demotion_disable_flags) |
| 1755 | 1755 | auto_demotion_disable(); |
| 1756 | 1756 | |
| 1757 | − if (disable_promotion_to_c1e) | |
| 1757 | + if (c1e_promotion == C1E_PROMOTION_ENABLE) | |
| 1758 | + c1e_promotion_enable(); | |
| 1759 | + else if (c1e_promotion == C1E_PROMOTION_DISABLE) | |
| 1758 | 1760 | c1e_promotion_disable(); |
| 1759 | 1761 | |
| 1760 | 1762 | return 0; |
| @@ -1833,7 +1835,8 @@ static int __init intel_idle_init(void) · 72 unmodified lines | ||
| 1833 | 1835 | if (icpu) { |
| 1834 | 1836 | cpuidle_state_table = icpu->state_table; |
| 1835 | 1837 | auto_demotion_disable_flags = icpu->auto_demotion_disable_flags; |
| 1836 | − disable_promotion_to_c1e = icpu->disable_promotion_to_c1e; | |
| 1838 | + if (icpu->disable_promotion_to_c1e) | |
| 1839 | + c1e_promotion = C1E_PROMOTION_DISABLE; | |
| 1837 | 1840 | if (icpu->use_acpi || force_use_acpi) |
| 1838 | 1841 | intel_idle_acpi_cst_extract(); |
| 1839 | 1842 | } else if (!intel_idle_acpi_cst_extract()) { |
| @@ -745,7 +745,7 @@ static int ad7280a_write_thresh(struct iio_dev *indio_dev, · 744 unmodified lines | ||
| 745 | 745 | case IIO_EV_DIR_RISING: |
| 746 | 746 | addr = AD7280A_CELL_OVERVOLTAGE_REG; |
| 747 | 747 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, |
| 748 | − 1, val); | |
| 748 | + 1, value); | |
| 749 | 749 | if (ret) |
| 750 | 750 | break; |
| 751 | 751 | st->cell_threshhigh = value; |
| @@ -753,7 +753,7 @@ static int ad7280a_write_thresh(struct iio_dev *indio_dev, · 1 unmodified line | ||
| 753 | 753 | case IIO_EV_DIR_FALLING: |
| 754 | 754 | addr = AD7280A_CELL_UNDERVOLTAGE_REG; |
| 755 | 755 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, |
| 756 | − 1, val); | |
| 756 | + 1, value); | |
| 757 | 757 | if (ret) |
| 758 | 758 | break; |
| 759 | 759 | st->cell_threshlow = value; |
| @@ -770,18 +770,18 @@ static int ad7280a_write_thresh(struct iio_dev *indio_dev, · 10 unmodified lines | ||
| 770 | 770 | case IIO_EV_DIR_RISING: |
| 771 | 771 | addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG; |
| 772 | 772 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, |
| 773 | − 1, val); | |
| 773 | + 1, value); | |
| 774 | 774 | if (ret) |
| 775 | 775 | break; |
| 776 | − st->aux_threshhigh = val; | |
| 776 | + st->aux_threshhigh = value; | |
| 777 | 777 | break; |
| 778 | 778 | case IIO_EV_DIR_FALLING: |
| 779 | 779 | addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG; |
| 780 | 780 | ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, |
| 781 | − 1, val); | |
| 781 | + 1, value); | |
| 782 | 782 | if (ret) |
| 783 | 783 | break; |
| 784 | − st->aux_threshlow = val; | |
| 784 | + st->aux_threshlow = value; | |
| 785 | 785 | break; |
| 786 | 786 | default: |
| 787 | 787 | ret = -EINVAL; |
| @@ -471,12 +471,15 @@ static ssize_t calibration_forced_value_store(struct device *dev, · 470 unmodified lines | ||
| 471 | 471 | ret = scd4x_write_and_fetch(state, CMD_FRC, arg, &val, sizeof(val)); |
| 472 | 472 | mutex_unlock(&state->lock); |
| 473 | 473 | |
| 474 | + if (ret) | |
| 475 | + return ret; | |
| 476 | + | |
| 474 | 477 | if (val == 0xff) { |
| 475 | 478 | dev_err(dev, "forced calibration has failed"); |
| 476 | 479 | return -EINVAL; |
| 477 | 480 | } |
| 478 | 481 | |
| 479 | − return ret ?: len; | |
| 482 | + return len; | |
| 480 | 483 | } |
| 481 | 484 | |
| 482 | 485 | static IIO_DEVICE_ATTR_RW(calibration_auto_enable, 0); |
| @@ -656,7 +656,7 @@ static int ad3552r_reset(struct ad3552r_desc *dac) · 655 unmodified lines | ||
| 656 | 656 | { |
| 657 | 657 | struct reg_addr_pool addr; |
| 658 | 658 | int ret; |
| 659 | − u16 val; | |
| 659 | + int val; | |
| 660 | 660 | |
| 661 | 661 | dac->gpio_reset = devm_gpiod_get_optional(&dac->spi->dev, "reset", |
| 662 | 662 | GPIOD_OUT_LOW); |
| @@ -809,10 +809,10 @@ static int ad3552r_configure_custom_gain(struct ad3552r_desc *dac, · 146 unmodified lines | ||
| 809 | 809 | |
| 810 | 810 | gain_child = fwnode_get_named_child_node(child, |
| 811 | 811 | "custom-output-range-config"); |
| 812 | − if (IS_ERR(gain_child)) { | |
| 812 | + if (!gain_child) { | |
| 813 | 813 | dev_err(dev, |
| 814 | 814 | "mandatory custom-output-range-config property missing\n"); |
| 815 | − return PTR_ERR(gain_child); | |
| 815 | + return -EINVAL; | |
| 816 | 816 | } |
| 817 | 817 | |
| 818 | 818 | dac->ch_data[ch].range_override = 1; |
| @@ -178,7 +178,7 @@ static int ad5446_read_raw(struct iio_dev *indio_dev, · 177 unmodified lines | ||
| 178 | 178 | |
| 179 | 179 | switch (m) { |
| 180 | 180 | case IIO_CHAN_INFO_RAW: |
| 181 | − *val = st->cached_val; | |
| 181 | + *val = st->cached_val >> chan->scan_type.shift; | |
| 182 | 182 | return IIO_VAL_INT; |
| 183 | 183 | case IIO_CHAN_INFO_SCALE: |
| 184 | 184 | *val = st->vref_mv; |
| @@ -522,7 +522,7 @@ static int ad5592r_alloc_channels(struct iio_dev *iio_dev) · 521 unmodified lines | ||
| 522 | 522 | if (!ret) |
| 523 | 523 | st->channel_modes[reg] = tmp; |
| 524 | 524 | |
| 525 | − fwnode_property_read_u32(child, "adi,off-state", &tmp); | |
| 525 | + ret = fwnode_property_read_u32(child, "adi,off-state", &tmp); | |
| 526 | 526 | if (!ret) |
| 527 | 527 | st->channel_offstate[reg] = tmp; |
| 528 | 528 | } |
| @@ -298,7 +298,7 @@ static int ltc2688_read_raw(struct iio_dev *indio_dev, · 297 unmodified lines | ||
| 298 | 298 | if (ret) |
| 299 | 299 | return ret; |
| 300 | 300 | |
| 301 | − *val = 16; | |
| 301 | + *val2 = 16; | |
| 302 | 302 | return IIO_VAL_FRACTIONAL_LOG2; |
| 303 | 303 | case IIO_CHAN_INFO_CALIBBIAS: |
| 304 | 304 | ret = regmap_read(st->regmap, |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/i2c.h> |
| 20 | 20 | #include <linux/module.h> |
| 21 | 21 | #include <linux/mod_devicetable.h> |
| 22 | +#include <linux/property.h> | |
| 22 | 23 | #include <linux/regulator/consumer.h> |
| 23 | 24 | |
| 24 | 25 | enum chip_id { |
| @@ -311,6 +312,7 @@ static int dac5571_probe(struct i2c_client *client, · 286 unmodified lines | ||
| 311 | 312 | const struct dac5571_spec *spec; |
| 312 | 313 | struct dac5571_data *data; |
| 313 | 314 | struct iio_dev *indio_dev; |
| 315 | + enum chip_id chip_id; | |
| 314 | 316 | int ret, i; |
| 315 | 317 | |
| 316 | 318 | indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); |
| @@ -326,7 +328,13 @@ static int dac5571_probe(struct i2c_client *client, · 9 unmodified lines | ||
| 326 | 328 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 327 | 329 | indio_dev->channels = dac5571_channels; |
| 328 | 330 | |
| 329 | − spec = &dac5571_spec[id->driver_data]; | |
| 331 | + if (dev_fwnode(dev)) | |
| 332 | + chip_id = (uintptr_t)device_get_match_data(dev); | |
| 333 | + else | |
| 334 | + chip_id = id->driver_data; | |
| 335 | + | |
| 336 | + spec = &dac5571_spec[chip_id]; | |
| 337 | + | |
| 330 | 338 | indio_dev->num_channels = spec->num_channels; |
| 331 | 339 | data->spec = spec; |
| 332 | 340 | |
| @@ -385,15 +393,15 @@ static int dac5571_remove(struct i2c_client *i2c) · 52 unmodified lines | ||
| 385 | 393 | } |
| 386 | 394 | |
| 387 | 395 | static const struct of_device_id dac5571_of_id[] = { |
| 388 | − {.compatible = "ti,dac5571"}, | |
| 389 | − {.compatible = "ti,dac6571"}, | |
| 390 | − {.compatible = "ti,dac7571"}, | |
| 391 | − {.compatible = "ti,dac5574"}, | |
| 392 | − {.compatible = "ti,dac6574"}, | |
| 393 | − {.compatible = "ti,dac7574"}, | |
| 394 | − {.compatible = "ti,dac5573"}, | |
| 395 | − {.compatible = "ti,dac6573"}, | |
| 396 | − {.compatible = "ti,dac7573"}, | |
| 396 | + {.compatible = "ti,dac5571", .data = (void *)single_8bit}, | |
| 397 | + {.compatible = "ti,dac6571", .data = (void *)single_10bit}, | |
| 398 | + {.compatible = "ti,dac7571", .data = (void *)single_12bit}, | |
| 399 | + {.compatible = "ti,dac5574", .data = (void *)quad_8bit}, | |
| 400 | + {.compatible = "ti,dac6574", .data = (void *)quad_10bit}, | |
| 401 | + {.compatible = "ti,dac7574", .data = (void *)quad_12bit}, | |
| 402 | + {.compatible = "ti,dac5573", .data = (void *)quad_8bit}, | |
| 403 | + {.compatible = "ti,dac6573", .data = (void *)quad_10bit}, | |
| 404 | + {.compatible = "ti,dac7573", .data = (void *)quad_12bit}, | |
| 397 | 405 | {} |
| 398 | 406 | }; |
| 399 | 407 | MODULE_DEVICE_TABLE(of, dac5571_of_id); |
| @@ -8,6 +8,7 @@ menu "Filters" · 7 unmodified lines | ||
| 8 | 8 | config ADMV8818 |
| 9 | 9 | tristate "Analog Devices ADMV8818 High-Pass and Low-Pass Filter" |
| 10 | 10 | depends on SPI && COMMON_CLK && 64BIT |
| 11 | + select REGMAP_SPI | |
| 11 | 12 | help |
| 12 | 13 | Say yes here to build support for Analog Devices ADMV8818 |
| 13 | 14 | 2 GHz to 18 GHz, Digitally Tunable, High-Pass and Low-Pass Filter. |
| @@ -730,7 +730,7 @@ static int bmi160_chip_init(struct bmi160_data *data, bool use_spi) · 729 unmodified lines | ||
| 730 | 730 | |
| 731 | 731 | ret = regmap_write(data->regmap, BMI160_REG_CMD, BMI160_CMD_SOFTRESET); |
| 732 | 732 | if (ret) |
| 733 | − return ret; | |
| 733 | + goto disable_regulator; | |
| 734 | 734 | |
| 735 | 735 | usleep_range(BMI160_SOFTRESET_USLEEP, BMI160_SOFTRESET_USLEEP + 1); |
| 736 | 736 | |
| @@ -741,29 +741,37 @@ static int bmi160_chip_init(struct bmi160_data *data, bool use_spi) · 4 unmodified lines | ||
| 741 | 741 | if (use_spi) { |
| 742 | 742 | ret = regmap_read(data->regmap, BMI160_REG_DUMMY, &val); |
| 743 | 743 | if (ret) |
| 744 | − return ret; | |
| 744 | + goto disable_regulator; | |
| 745 | 745 | } |
| 746 | 746 | |
| 747 | 747 | ret = regmap_read(data->regmap, BMI160_REG_CHIP_ID, &val); |
| 748 | 748 | if (ret) { |
| 749 | 749 | dev_err(dev, "Error reading chip id\n"); |
| 750 | − return ret; | |
| 750 | + goto disable_regulator; | |
| 751 | 751 | } |
| 752 | 752 | if (val != BMI160_CHIP_ID_VAL) { |
| 753 | 753 | dev_err(dev, "Wrong chip id, got %x expected %x\n", |
| 754 | 754 | val, BMI160_CHIP_ID_VAL); |
| 755 | − return -ENODEV; | |
| 755 | + ret = -ENODEV; | |
| 756 | + goto disable_regulator; | |
| 756 | 757 | } |
| 757 | 758 | |
| 758 | 759 | ret = bmi160_set_mode(data, BMI160_ACCEL, true); |
| 759 | 760 | if (ret) |
| 760 | − return ret; | |
| 761 | + goto disable_regulator; | |
| 761 | 762 | |
| 762 | 763 | ret = bmi160_set_mode(data, BMI160_GYRO, true); |
| 763 | 764 | if (ret) |
| 764 | − return ret; | |
| 765 | + goto disable_accel; | |
| 765 | 766 | |
| 766 | 767 | return 0; |
| 768 | + | |
| 769 | +disable_accel: | |
| 770 | + bmi160_set_mode(data, BMI160_ACCEL, false); | |
| 771 | + | |
| 772 | +disable_regulator: | |
| 773 | + regulator_bulk_disable(ARRAY_SIZE(data->supplies), data->supplies); | |
| 774 | + return ret; | |
| 767 | 775 | } |
| 768 | 776 | |
| 769 | 777 | static int bmi160_data_rdy_trigger_set_state(struct iio_trigger *trig, |
| @@ -18,12 +18,15 @@ static int inv_icm42600_i2c_bus_setup(struct inv_icm42600_state *st) · 17 unmodified lines | ||
| 18 | 18 | unsigned int mask, val; |
| 19 | 19 | int ret; |
| 20 | 20 | |
| 21 | − /* setup interface registers */ | |
| 22 | − ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6, | |
| 23 | − INV_ICM42600_INTF_CONFIG6_MASK, | |
| 24 | − INV_ICM42600_INTF_CONFIG6_I3C_EN); | |
| 25 | − if (ret) | |
| 26 | − return ret; | |
| 21 | + /* | |
| 22 | + * setup interface registers | |
| 23 | + * This register write to REG_INTF_CONFIG6 enables a spike filter that | |
| 24 | + * is impacting the line and can prevent the I2C ACK to be seen by the | |
| 25 | + * controller. So we don't test the return value. | |
| 26 | + */ | |
| 27 | + regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6, | |
| 28 | + INV_ICM42600_INTF_CONFIG6_MASK, | |
| 29 | + INV_ICM42600_INTF_CONFIG6_I3C_EN); | |
| 27 | 30 | |
| 28 | 31 | ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4, |
| 29 | 32 | INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0); |
| @@ -416,6 +416,7 @@ static int ak8975_power_on(const struct ak8975_data *data) · 415 unmodified lines | ||
| 416 | 416 | if (ret) { |
| 417 | 417 | dev_warn(&data->client->dev, |
| 418 | 418 | "Failed to enable specified Vid supply\n"); |
| 419 | + regulator_disable(data->vdd); | |
| 419 | 420 | return ret; |
| 420 | 421 | } |
| 421 | 422 | |
| @@ -70,13 +70,17 @@ · 69 unmodified lines | ||
| 70 | 70 | #define SX9324_REG_AFE_PH2 0x2a |
| 71 | 71 | #define SX9324_REG_AFE_PH3 0x2b |
| 72 | 72 | #define SX9324_REG_AFE_CTRL8 0x2c |
| 73 | −#define SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM 0x02 | |
| 73 | +#define SX9324_REG_AFE_CTRL8_RESERVED 0x10 | |
| 74 | +#define SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM 0x02 | |
| 74 | 75 | #define SX9324_REG_AFE_CTRL9 0x2d |
| 75 | 76 | #define SX9324_REG_AFE_CTRL9_AGAIN_1 0x08 |
| 76 | 77 | |
| 77 | 78 | #define SX9324_REG_PROX_CTRL0 0x30 |
| 78 | 79 | #define SX9324_REG_PROX_CTRL0_GAIN_MASK GENMASK(5, 3) |
| 79 | −#define SX9324_REG_PROX_CTRL0_GAIN_1 0x80 | |
| 80 | +#define SX9324_REG_PROX_CTRL0_GAIN_SHIFT 3 | |
| 81 | +#define SX9324_REG_PROX_CTRL0_GAIN_RSVD 0x0 | |
| 82 | +#define SX9324_REG_PROX_CTRL0_GAIN_1 0x1 | |
| 83 | +#define SX9324_REG_PROX_CTRL0_GAIN_8 0x4 | |
| 80 | 84 | #define SX9324_REG_PROX_CTRL0_RAWFILT_MASK GENMASK(2, 0) |
| 81 | 85 | #define SX9324_REG_PROX_CTRL0_RAWFILT_1P50 0x01 |
| 82 | 86 | #define SX9324_REG_PROX_CTRL1 0x31 |
| @@ -379,7 +383,14 @@ static int sx9324_read_gain(struct sx_common_data *data, · 296 unmodified lines | ||
| 379 | 383 | if (ret) |
| 380 | 384 | return ret; |
| 381 | 385 | |
| 382 | − *val = 1 << FIELD_GET(SX9324_REG_PROX_CTRL0_GAIN_MASK, regval); | |
| 386 | + regval = FIELD_GET(SX9324_REG_PROX_CTRL0_GAIN_MASK, regval); | |
| 387 | + if (regval) | |
| 388 | + regval--; | |
| 389 | + else if (regval == SX9324_REG_PROX_CTRL0_GAIN_RSVD || | |
| 390 | + regval > SX9324_REG_PROX_CTRL0_GAIN_8) | |
| 391 | + return -EINVAL; | |
| 392 | + | |
| 393 | + *val = 1 << regval; | |
| 383 | 394 | |
| 384 | 395 | return IIO_VAL_INT; |
| 385 | 396 | } |
| @@ -725,8 +736,12 @@ static int sx9324_write_gain(struct sx_common_data *data, · 339 unmodified lines | ||
| 725 | 736 | unsigned int gain, reg; |
| 726 | 737 | int ret; |
| 727 | 738 | |
| 728 | − gain = ilog2(val); | |
| 729 | 739 | reg = SX9324_REG_PROX_CTRL0 + chan->channel / 2; |
| 740 | + | |
| 741 | + gain = ilog2(val) + 1; | |
| 742 | + if (val <= 0 || gain > SX9324_REG_PROX_CTRL0_GAIN_8) | |
| 743 | + return -EINVAL; | |
| 744 | + | |
| 730 | 745 | gain = FIELD_PREP(SX9324_REG_PROX_CTRL0_GAIN_MASK, gain); |
| 731 | 746 | |
| 732 | 747 | mutex_lock(&data->mutex); |
| @@ -781,12 +796,15 @@ static const struct sx_common_reg_default sx9324_default_regs[] = { · 48 unmodified lines | ||
| 781 | 796 | { SX9324_REG_AFE_PH2, 0x1a }, |
| 782 | 797 | { SX9324_REG_AFE_PH3, 0x16 }, |
| 783 | 798 | |
| 784 | − { SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM }, | |
| 799 | + { SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESERVED | | |
| 800 | + SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM }, | |
| 785 | 801 | { SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1 }, |
| 786 | 802 | |
| 787 | − { SX9324_REG_PROX_CTRL0, SX9324_REG_PROX_CTRL0_GAIN_1 | | |
| 803 | + { SX9324_REG_PROX_CTRL0, | |
| 804 | + SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT | | |
| 788 | 805 | SX9324_REG_PROX_CTRL0_RAWFILT_1P50 }, |
| 789 | − { SX9324_REG_PROX_CTRL1, SX9324_REG_PROX_CTRL0_GAIN_1 | | |
| 806 | + { SX9324_REG_PROX_CTRL1, | |
| 807 | + SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT | | |
| 790 | 808 | SX9324_REG_PROX_CTRL0_RAWFILT_1P50 }, |
| 791 | 809 | { SX9324_REG_PROX_CTRL2, SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K }, |
| 792 | 810 | { SX9324_REG_PROX_CTRL3, SX9324_REG_PROX_CTRL3_AVGDEB_2SAMPLES | |
| @@ -521,6 +521,7 @@ int sx_common_probe(struct i2c_client *client, · 520 unmodified lines | ||
| 521 | 521 | return dev_err_probe(dev, ret, "error reading WHOAMI\n"); |
| 522 | 522 | |
| 523 | 523 | ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(dev)); |
| 524 | + indio_dev->dev.of_node = client->dev.of_node; | |
| 524 | 525 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 525 | 526 | |
| 526 | 527 | indio_dev->channels = data->chip_info->iio_channels; |
| @@ -61,6 +61,14 @@ static irqreturn_t cypress_sf_irq_handler(int irq, void *devid) · 60 unmodified lines | ||
| 61 | 61 | return IRQ_HANDLED; |
| 62 | 62 | } |
| 63 | 63 | |
| 64 | +static void cypress_sf_disable_regulators(void *arg) | |
| 65 | +{ | |
| 66 | + struct cypress_sf_data *touchkey = arg; | |
| 67 | + | |
| 68 | + regulator_bulk_disable(ARRAY_SIZE(touchkey->regulators), | |
| 69 | + touchkey->regulators); | |
| 70 | +} | |
| 71 | + | |
| 64 | 72 | static int cypress_sf_probe(struct i2c_client *client) |
| 65 | 73 | { |
| 66 | 74 | struct cypress_sf_data *touchkey; |
| @@ -121,6 +129,12 @@ static int cypress_sf_probe(struct i2c_client *client) · 54 unmodified lines | ||
| 121 | 129 | return error; |
| 122 | 130 | } |
| 123 | 131 | |
| 132 | + error = devm_add_action_or_reset(&client->dev, | |
| 133 | + cypress_sf_disable_regulators, | |
| 134 | + touchkey); | |
| 135 | + if (error) | |
| 136 | + return error; | |
| 137 | + | |
| 124 | 138 | touchkey->input_dev = devm_input_allocate_device(&client->dev); |
| 125 | 139 | if (!touchkey->input_dev) { |
| 126 | 140 | dev_err(&client->dev, "Failed to allocate input device\n"); |
| @@ -393,7 +393,7 @@ static int omap4_keypad_probe(struct platform_device *pdev) · 392 unmodified lines | ||
| 393 | 393 | * revision register. |
| 394 | 394 | */ |
| 395 | 395 | error = pm_runtime_get_sync(dev); |
| 396 | − if (error) { | |
| 396 | + if (error < 0) { | |
| 397 | 397 | dev_err(dev, "pm_runtime_get_sync() failed\n"); |
| 398 | 398 | pm_runtime_put_noidle(dev); |
| 399 | 399 | return error; |
| @@ -47,7 +47,6 @@ DEFINE_QNODE(qnm_mnoc_sf, SC7180_MASTER_MNOC_SF_MEM_NOC, 1, 32, SC7180_SLAVE_GEM · 46 unmodified lines | ||
| 47 | 47 | DEFINE_QNODE(qnm_snoc_gc, SC7180_MASTER_SNOC_GC_MEM_NOC, 1, 8, SC7180_SLAVE_LLCC); |
| 48 | 48 | DEFINE_QNODE(qnm_snoc_sf, SC7180_MASTER_SNOC_SF_MEM_NOC, 1, 16, SC7180_SLAVE_LLCC); |
| 49 | 49 | DEFINE_QNODE(qxm_gpu, SC7180_MASTER_GFX3D, 2, 32, SC7180_SLAVE_GEM_NOC_SNOC, SC7180_SLAVE_LLCC); |
| 50 | −DEFINE_QNODE(ipa_core_master, SC7180_MASTER_IPA_CORE, 1, 8, SC7180_SLAVE_IPA_CORE); | |
| 51 | 50 | DEFINE_QNODE(llcc_mc, SC7180_MASTER_LLCC, 2, 4, SC7180_SLAVE_EBI1); |
| 52 | 51 | DEFINE_QNODE(qhm_mnoc_cfg, SC7180_MASTER_CNOC_MNOC_CFG, 1, 4, SC7180_SLAVE_SERVICE_MNOC); |
| 53 | 52 | DEFINE_QNODE(qxm_camnoc_hf0, SC7180_MASTER_CAMNOC_HF0, 2, 32, SC7180_SLAVE_MNOC_HF_MEM_NOC); |
| @@ -129,7 +128,6 @@ DEFINE_QNODE(qhs_mdsp_ms_mpu_cfg, SC7180_SLAVE_MSS_PROC_MS_MPU_CFG, 1, 4); · 75 unmodified lines | ||
| 129 | 128 | DEFINE_QNODE(qns_gem_noc_snoc, SC7180_SLAVE_GEM_NOC_SNOC, 1, 8, SC7180_MASTER_GEM_NOC_SNOC); |
| 130 | 129 | DEFINE_QNODE(qns_llcc, SC7180_SLAVE_LLCC, 1, 16, SC7180_MASTER_LLCC); |
| 131 | 130 | DEFINE_QNODE(srvc_gemnoc, SC7180_SLAVE_SERVICE_GEM_NOC, 1, 4); |
| 132 | −DEFINE_QNODE(ipa_core_slave, SC7180_SLAVE_IPA_CORE, 1, 8); | |
| 133 | 131 | DEFINE_QNODE(ebi, SC7180_SLAVE_EBI1, 2, 4); |
| 134 | 132 | DEFINE_QNODE(qns_mem_noc_hf, SC7180_SLAVE_MNOC_HF_MEM_NOC, 1, 32, SC7180_MASTER_MNOC_HF_MEM_NOC); |
| 135 | 133 | DEFINE_QNODE(qns_mem_noc_sf, SC7180_SLAVE_MNOC_SF_MEM_NOC, 1, 32, SC7180_MASTER_MNOC_SF_MEM_NOC); |
| @@ -160,7 +158,6 @@ DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); · 24 unmodified lines | ||
| 160 | 158 | DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); |
| 161 | 159 | DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf); |
| 162 | 160 | DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); |
| 163 | −DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave); | |
| 164 | 161 | DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_snoc, &xm_qdss_dap, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_ahb2phy0, &qhs_aop, &qhs_aoss, &qhs_boot_rom, &qhs_camera_cfg, &qhs_camera_nrt_throttle_cfg, &qhs_camera_rt_throttle_cfg, &qhs_clk_ctl, &qhs_cpr_cx, &qhs_cpr_mx, &qhs_crypto0_cfg, &qhs_dcc_cfg, &qhs_ddrss_cfg, &qhs_display_cfg, &qhs_display_rt_throttle_cfg, &qhs_display_throttle_cfg, &qhs_glm, &qhs_gpuss_cfg, &qhs_imem_cfg, &qhs_ipa, &qhs_mnoc_cfg, &qhs_mss_cfg, &qhs_npu_cfg, &qhs_npu_dma_throttle_cfg, &qhs_npu_dsp_throttle_cfg, &qhs_pimem_cfg, &qhs_prng, &qhs_qdss_cfg, &qhs_qm_cfg, &qhs_qm_mpu_cfg, &qhs_qup0, &qhs_qup1, &qhs_security, &qhs_snoc_cfg, &qhs_tcsr, &qhs_tlmm_1, &qhs_tlmm_2, &qhs_tlmm_3, &qhs_ufs_mem_cfg, &qhs_usb3, &qhs_venus_cfg, &qhs_venus_throttle_cfg, &qhs_vsense_ctrl_cfg, &srvc_cnoc); |
| 165 | 162 | DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qhm_mnoc_cfg, &qxm_mdp0, &qxm_rot, &qxm_venus0, &qxm_venus_arm9); |
| 166 | 163 | DEFINE_QBCM(bcm_sh2, "SH2", false, &acm_sys_tcu); |
| @@ -372,22 +369,6 @@ static struct qcom_icc_desc sc7180_gem_noc = { · 205 unmodified lines | ||
| 372 | 369 | .num_bcms = ARRAY_SIZE(gem_noc_bcms), |
| 373 | 370 | }; |
| 374 | 371 | |
| 375 | −static struct qcom_icc_bcm *ipa_virt_bcms[] = { | |
| 376 | − &bcm_ip0, | |
| 377 | −}; | |
| 378 | − | |
| 379 | −static struct qcom_icc_node *ipa_virt_nodes[] = { | |
| 380 | − [MASTER_IPA_CORE] = &ipa_core_master, | |
| 381 | − [SLAVE_IPA_CORE] = &ipa_core_slave, | |
| 382 | −}; | |
| 383 | − | |
| 384 | −static struct qcom_icc_desc sc7180_ipa_virt = { | |
| 385 | − .nodes = ipa_virt_nodes, | |
| 386 | − .num_nodes = ARRAY_SIZE(ipa_virt_nodes), | |
| 387 | − .bcms = ipa_virt_bcms, | |
| 388 | − .num_bcms = ARRAY_SIZE(ipa_virt_bcms), | |
| 389 | −}; | |
| 390 | − | |
| 391 | 372 | static struct qcom_icc_bcm *mc_virt_bcms[] = { |
| 392 | 373 | &bcm_acv, |
| 393 | 374 | &bcm_mc0, |
| @@ -519,8 +500,6 @@ static const struct of_device_id qnoc_of_match[] = { · 125 unmodified lines | ||
| 519 | 500 | .data = &sc7180_dc_noc}, |
| 520 | 501 | { .compatible = "qcom,sc7180-gem-noc", |
| 521 | 502 | .data = &sc7180_gem_noc}, |
| 522 | − { .compatible = "qcom,sc7180-ipa-virt", | |
| 523 | − .data = &sc7180_ipa_virt}, | |
| 524 | 503 | { .compatible = "qcom,sc7180-mc-virt", |
| 525 | 504 | .data = &sc7180_mc_virt}, |
| 526 | 505 | { .compatible = "qcom,sc7180-mmss-noc", |
| @@ -18,7 +18,6 @@ · 17 unmodified lines | ||
| 18 | 18 | #include "icc-rpmh.h" |
| 19 | 19 | #include "sdx55.h" |
| 20 | 20 | |
| 21 | −DEFINE_QNODE(ipa_core_master, SDX55_MASTER_IPA_CORE, 1, 8, SDX55_SLAVE_IPA_CORE); | |
| 22 | 21 | DEFINE_QNODE(llcc_mc, SDX55_MASTER_LLCC, 4, 4, SDX55_SLAVE_EBI_CH0); |
| 23 | 22 | DEFINE_QNODE(acm_tcu, SDX55_MASTER_TCU_0, 1, 8, SDX55_SLAVE_LLCC, SDX55_SLAVE_MEM_NOC_SNOC, SDX55_SLAVE_MEM_NOC_PCIE_SNOC); |
| 24 | 23 | DEFINE_QNODE(qnm_snoc_gc, SDX55_MASTER_SNOC_GC_MEM_NOC, 1, 8, SDX55_SLAVE_LLCC); |
| @@ -40,7 +39,6 @@ DEFINE_QNODE(xm_pcie, SDX55_MASTER_PCIE, 1, 8, SDX55_SLAVE_ANOC_SNOC); · 15 unmodified lines | ||
| 40 | 39 | DEFINE_QNODE(xm_qdss_etr, SDX55_MASTER_QDSS_ETR, 1, 8, SDX55_SLAVE_SNOC_CFG, SDX55_SLAVE_EMAC_CFG, SDX55_SLAVE_USB3, SDX55_SLAVE_AOSS, SDX55_SLAVE_SPMI_FETCHER, SDX55_SLAVE_QDSS_CFG, SDX55_SLAVE_PDM, SDX55_SLAVE_SNOC_MEM_NOC_GC, SDX55_SLAVE_TCSR, SDX55_SLAVE_CNOC_DDRSS, SDX55_SLAVE_SPMI_VGI_COEX, SDX55_SLAVE_QPIC, SDX55_SLAVE_OCIMEM, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_USB3_PHY_CFG, SDX55_SLAVE_AOP, SDX55_SLAVE_BLSP_1, SDX55_SLAVE_SDCC_1, SDX55_SLAVE_CNOC_MSS, SDX55_SLAVE_PCIE_PARF, SDX55_SLAVE_ECC_CFG, SDX55_SLAVE_AUDIO, SDX55_SLAVE_AOSS, SDX55_SLAVE_PRNG, SDX55_SLAVE_CRYPTO_0_CFG, SDX55_SLAVE_TCU, SDX55_SLAVE_CLK_CTL, SDX55_SLAVE_IMEM_CFG); |
| 41 | 40 | DEFINE_QNODE(xm_sdc1, SDX55_MASTER_SDCC_1, 1, 8, SDX55_SLAVE_AOSS, SDX55_SLAVE_IPA_CFG, SDX55_SLAVE_ANOC_SNOC, SDX55_SLAVE_AOP, SDX55_SLAVE_AUDIO); |
| 42 | 41 | DEFINE_QNODE(xm_usb3, SDX55_MASTER_USB3, 1, 8, SDX55_SLAVE_ANOC_SNOC); |
| 43 | −DEFINE_QNODE(ipa_core_slave, SDX55_SLAVE_IPA_CORE, 1, 8); | |
| 44 | 42 | DEFINE_QNODE(ebi, SDX55_SLAVE_EBI_CH0, 1, 4); |
| 45 | 43 | DEFINE_QNODE(qns_llcc, SDX55_SLAVE_LLCC, 1, 16, SDX55_SLAVE_EBI_CH0); |
| 46 | 44 | DEFINE_QNODE(qns_memnoc_snoc, SDX55_SLAVE_MEM_NOC_SNOC, 1, 8, SDX55_MASTER_MEM_NOC_SNOC); |
| @@ -82,7 +80,6 @@ DEFINE_QNODE(xs_sys_tcu_cfg, SDX55_SLAVE_TCU, 1, 8); · 35 unmodified lines | ||
| 82 | 80 | DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); |
| 83 | 81 | DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); |
| 84 | 82 | DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto); |
| 85 | −DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave); | |
| 86 | 83 | DEFINE_QBCM(bcm_pn0, "PN0", false, &qhm_snoc_cfg); |
| 87 | 84 | DEFINE_QBCM(bcm_sh3, "SH3", false, &xm_apps_rdwr); |
| 88 | 85 | DEFINE_QBCM(bcm_sh4, "SH4", false, &qns_memnoc_snoc, &qns_sys_pcie); |
| @@ -219,22 +216,6 @@ static const struct qcom_icc_desc sdx55_system_noc = { · 130 unmodified lines | ||
| 219 | 216 | .num_bcms = ARRAY_SIZE(system_noc_bcms), |
| 220 | 217 | }; |
| 221 | 218 | |
| 222 | −static struct qcom_icc_bcm *ipa_virt_bcms[] = { | |
| 223 | − &bcm_ip0, | |
| 224 | −}; | |
| 225 | − | |
| 226 | −static struct qcom_icc_node *ipa_virt_nodes[] = { | |
| 227 | − [MASTER_IPA_CORE] = &ipa_core_master, | |
| 228 | − [SLAVE_IPA_CORE] = &ipa_core_slave, | |
| 229 | −}; | |
| 230 | − | |
| 231 | −static const struct qcom_icc_desc sdx55_ipa_virt = { | |
| 232 | − .nodes = ipa_virt_nodes, | |
| 233 | − .num_nodes = ARRAY_SIZE(ipa_virt_nodes), | |
| 234 | − .bcms = ipa_virt_bcms, | |
| 235 | − .num_bcms = ARRAY_SIZE(ipa_virt_bcms), | |
| 236 | −}; | |
| 237 | − | |
| 238 | 219 | static const struct of_device_id qnoc_of_match[] = { |
| 239 | 220 | { .compatible = "qcom,sdx55-mc-virt", |
| 240 | 221 | .data = &sdx55_mc_virt}, |
| @@ -242,8 +223,6 @@ static const struct of_device_id qnoc_of_match[] = { · 1 unmodified line | ||
| 242 | 223 | .data = &sdx55_mem_noc}, |
| 243 | 224 | { .compatible = "qcom,sdx55-system-noc", |
| 244 | 225 | .data = &sdx55_system_noc}, |
| 245 | − { .compatible = "qcom,sdx55-ipa-virt", | |
| 246 | − .data = &sdx55_ipa_virt}, | |
| 247 | 226 | { } |
| 248 | 227 | }; |
| 249 | 228 | MODULE_DEVICE_TABLE(of, qnoc_of_match); |
| @@ -771,12 +771,12 @@ static void journal_write_unlocked(struct closure *cl) · 770 unmodified lines | ||
| 771 | 771 | |
| 772 | 772 | bio_reset(bio, ca->bdev, REQ_OP_WRITE | |
| 773 | 773 | REQ_SYNC | REQ_META | REQ_PREFLUSH | REQ_FUA); |
| 774 | − bch_bio_map(bio, w->data); | |
| 775 | 774 | bio->bi_iter.bi_sector = PTR_OFFSET(k, i); |
| 776 | 775 | bio->bi_iter.bi_size = sectors << 9; |
| 777 | 776 | |
| 778 | 777 | bio->bi_end_io = journal_write_endio; |
| 779 | 778 | bio->bi_private = w; |
| 779 | + bch_bio_map(bio, w->data); | |
| 780 | 780 | |
| 781 | 781 | trace_bcache_journal_write(bio, w->data->keys); |
| 782 | 782 | bio_list_add(&list, bio); |
| @@ -685,7 +685,7 @@ static void do_bio_hook(struct search *s, · 684 unmodified lines | ||
| 685 | 685 | { |
| 686 | 686 | struct bio *bio = &s->bio.bio; |
| 687 | 687 | |
| 688 | − bio_init_clone(bio->bi_bdev, bio, orig_bio, GFP_NOIO); | |
| 688 | + bio_init_clone(orig_bio->bi_bdev, bio, orig_bio, GFP_NOIO); | |
| 689 | 689 | /* |
| 690 | 690 | * bi_end_io can be set separately somewhere else, e.g. the |
| 691 | 691 | * variants in, |
| @@ -4399,6 +4399,7 @@ try_smaller_buffer: · 4398 unmodified lines | ||
| 4399 | 4399 | } |
| 4400 | 4400 | |
| 4401 | 4401 | if (ic->internal_hash) { |
| 4402 | + size_t recalc_tags_size; | |
| 4402 | 4403 | ic->recalc_wq = alloc_workqueue("dm-integrity-recalc", WQ_MEM_RECLAIM, 1); |
| 4403 | 4404 | if (!ic->recalc_wq ) { |
| 4404 | 4405 | ti->error = "Cannot allocate workqueue"; |
| @@ -4412,8 +4413,10 @@ try_smaller_buffer: · 7 unmodified lines | ||
| 4412 | 4413 | r = -ENOMEM; |
| 4413 | 4414 | goto bad; |
| 4414 | 4415 | } |
| 4415 | − ic->recalc_tags = kvmalloc_array(RECALC_SECTORS >> ic->sb->log2_sectors_per_block, | |
| 4416 | − ic->tag_size, GFP_KERNEL); | |
| 4416 | + recalc_tags_size = (RECALC_SECTORS >> ic->sb->log2_sectors_per_block) * ic->tag_size; | |
| 4417 | + if (crypto_shash_digestsize(ic->internal_hash) > ic->tag_size) | |
| 4418 | + recalc_tags_size += crypto_shash_digestsize(ic->internal_hash) - ic->tag_size; | |
| 4419 | + ic->recalc_tags = kvmalloc(recalc_tags_size, GFP_KERNEL); | |
| 4417 | 4420 | if (!ic->recalc_tags) { |
| 4418 | 4421 | ti->error = "Cannot allocate tags for recalculating"; |
| 4419 | 4422 | r = -ENOMEM; |
| @@ -27,7 +27,6 @@ · 26 unmodified lines | ||
| 27 | 27 | #include <linux/blkdev.h> |
| 28 | 28 | #include <linux/slab.h> |
| 29 | 29 | #include <linux/module.h> |
| 30 | −#include <linux/sched/clock.h> | |
| 31 | 30 | |
| 32 | 31 | |
| 33 | 32 | #define DM_MSG_PREFIX "multipath historical-service-time" |
| @@ -433,7 +432,7 @@ static struct dm_path *hst_select_path(struct path_selector *ps, · 399 unmodified lines | ||
| 433 | 432 | { |
| 434 | 433 | struct selector *s = ps->context; |
| 435 | 434 | struct path_info *pi = NULL, *best = NULL; |
| 436 | − u64 time_now = sched_clock(); | |
| 435 | + u64 time_now = ktime_get_ns(); | |
| 437 | 436 | struct dm_path *ret = NULL; |
| 438 | 437 | unsigned long flags; |
| 439 | 438 | |
| @@ -474,7 +473,7 @@ static int hst_start_io(struct path_selector *ps, struct dm_path *path, · 34 unmodified lines | ||
| 474 | 473 | |
| 475 | 474 | static u64 path_service_time(struct path_info *pi, u64 start_time) |
| 476 | 475 | { |
| 477 | − u64 sched_now = ktime_get_ns(); | |
| 476 | + u64 now = ktime_get_ns(); | |
| 478 | 477 | |
| 479 | 478 | /* if a previous disk request has finished after this IO was |
| 480 | 479 | * sent to the hardware, pretend the submission happened |
| @@ -483,11 +482,11 @@ static u64 path_service_time(struct path_info *pi, u64 start_time) · 2 unmodified lines | ||
| 483 | 482 | if (time_after64(pi->last_finish, start_time)) |
| 484 | 483 | start_time = pi->last_finish; |
| 485 | 484 | |
| 486 | − pi->last_finish = sched_now; | |
| 487 | − if (time_before64(sched_now, start_time)) | |
| 485 | + pi->last_finish = now; | |
| 486 | + if (time_before64(now, start_time)) | |
| 488 | 487 | return 0; |
| 489 | 488 | |
| 490 | − return sched_now - start_time; | |
| 489 | + return now - start_time; | |
| 491 | 490 | } |
| 492 | 491 | |
| 493 | 492 | static int hst_end_io(struct path_selector *ps, struct dm_path *path, |
| @@ -360,16 +360,20 @@ static int dm_update_zone_wp_offset(struct mapped_device *md, unsigned int zno, · 359 unmodified lines | ||
| 360 | 360 | return 0; |
| 361 | 361 | } |
| 362 | 362 | |
| 363 | +struct orig_bio_details { | |
| 364 | + unsigned int op; | |
| 365 | + unsigned int nr_sectors; | |
| 366 | +}; | |
| 367 | + | |
| 363 | 368 | /* |
| 364 | 369 | * First phase of BIO mapping for targets with zone append emulation: |
| 365 | 370 | * check all BIO that change a zone writer pointer and change zone |
| 366 | 371 | * append operations into regular write operations. |
| 367 | 372 | */ |
| 368 | 373 | static bool dm_zone_map_bio_begin(struct mapped_device *md, |
| 369 | − struct bio *orig_bio, struct bio *clone) | |
| 374 | + unsigned int zno, struct bio *clone) | |
| 370 | 375 | { |
| 371 | 376 | sector_t zsectors = blk_queue_zone_sectors(md->queue); |
| 372 | − unsigned int zno = bio_zone_no(orig_bio); | |
| 373 | 377 | unsigned int zwp_offset = READ_ONCE(md->zwp_offset[zno]); |
| 374 | 378 | |
| 375 | 379 | /* |
| @@ -384,7 +388,7 @@ static bool dm_zone_map_bio_begin(struct mapped_device *md, · 8 unmodified lines | ||
| 384 | 388 | WRITE_ONCE(md->zwp_offset[zno], zwp_offset); |
| 385 | 389 | } |
| 386 | 390 | |
| 387 | − switch (bio_op(orig_bio)) { | |
| 391 | + switch (bio_op(clone)) { | |
| 388 | 392 | case REQ_OP_ZONE_RESET: |
| 389 | 393 | case REQ_OP_ZONE_FINISH: |
| 390 | 394 | return true; |
| @@ -401,9 +405,8 @@ static bool dm_zone_map_bio_begin(struct mapped_device *md, · 10 unmodified lines | ||
| 401 | 405 | * target zone. |
| 402 | 406 | */ |
| 403 | 407 | clone->bi_opf = REQ_OP_WRITE | REQ_NOMERGE | |
| 404 | − (orig_bio->bi_opf & (~REQ_OP_MASK)); | |
| 405 | − clone->bi_iter.bi_sector = | |
| 406 | − orig_bio->bi_iter.bi_sector + zwp_offset; | |
| 408 | + (clone->bi_opf & (~REQ_OP_MASK)); | |
| 409 | + clone->bi_iter.bi_sector += zwp_offset; | |
| 407 | 410 | break; |
| 408 | 411 | default: |
| 409 | 412 | DMWARN_LIMIT("Invalid BIO operation"); |
| @@ -423,11 +426,10 @@ static bool dm_zone_map_bio_begin(struct mapped_device *md, · 13 unmodified lines | ||
| 423 | 426 | * data written to a zone. Note that at this point, the remapped clone BIO |
| 424 | 427 | * may already have completed, so we do not touch it. |
| 425 | 428 | */ |
| 426 | −static blk_status_t dm_zone_map_bio_end(struct mapped_device *md, | |
| 427 | − struct bio *orig_bio, | |
| 429 | +static blk_status_t dm_zone_map_bio_end(struct mapped_device *md, unsigned int zno, | |
| 430 | + struct orig_bio_details *orig_bio_details, | |
| 428 | 431 | unsigned int nr_sectors) |
| 429 | 432 | { |
| 430 | − unsigned int zno = bio_zone_no(orig_bio); | |
| 431 | 433 | unsigned int zwp_offset = READ_ONCE(md->zwp_offset[zno]); |
| 432 | 434 | |
| 433 | 435 | /* The clone BIO may already have been completed and failed */ |
| @@ -435,7 +437,7 @@ static blk_status_t dm_zone_map_bio_end(struct mapped_device *md, · 1 unmodified line | ||
| 435 | 437 | return BLK_STS_IOERR; |
| 436 | 438 | |
| 437 | 439 | /* Update the zone wp offset */ |
| 438 | − switch (bio_op(orig_bio)) { | |
| 440 | + switch (orig_bio_details->op) { | |
| 439 | 441 | case REQ_OP_ZONE_RESET: |
| 440 | 442 | WRITE_ONCE(md->zwp_offset[zno], 0); |
| 441 | 443 | return BLK_STS_OK; |
| @@ -452,7 +454,7 @@ static blk_status_t dm_zone_map_bio_end(struct mapped_device *md, · 10 unmodified lines | ||
| 452 | 454 | * Check that the target did not truncate the write operation |
| 453 | 455 | * emulating a zone append. |
| 454 | 456 | */ |
| 455 | − if (nr_sectors != bio_sectors(orig_bio)) { | |
| 457 | + if (nr_sectors != orig_bio_details->nr_sectors) { | |
| 456 | 458 | DMWARN_LIMIT("Truncated write for zone append"); |
| 457 | 459 | return BLK_STS_IOERR; |
| 458 | 460 | } |
| @@ -488,7 +490,7 @@ static inline void dm_zone_unlock(struct request_queue *q, · 29 unmodified lines | ||
| 488 | 490 | bio_clear_flag(clone, BIO_ZONE_WRITE_LOCKED); |
| 489 | 491 | } |
| 490 | 492 | |
| 491 | −static bool dm_need_zone_wp_tracking(struct bio *orig_bio) | |
| 493 | +static bool dm_need_zone_wp_tracking(struct bio *bio) | |
| 492 | 494 | { |
| 493 | 495 | /* |
| 494 | 496 | * Special processing is not needed for operations that do not need the |
| @@ -496,15 +498,15 @@ static bool dm_need_zone_wp_tracking(struct bio *orig_bio) · 1 unmodified line | ||
| 496 | 498 | * zones and all operations that do not modify directly a sequential |
| 497 | 499 | * zone write pointer. |
| 498 | 500 | */ |
| 499 | − if (op_is_flush(orig_bio->bi_opf) && !bio_sectors(orig_bio)) | |
| 501 | + if (op_is_flush(bio->bi_opf) && !bio_sectors(bio)) | |
| 500 | 502 | return false; |
| 501 | − switch (bio_op(orig_bio)) { | |
| 503 | + switch (bio_op(bio)) { | |
| 502 | 504 | case REQ_OP_WRITE_ZEROES: |
| 503 | 505 | case REQ_OP_WRITE: |
| 504 | 506 | case REQ_OP_ZONE_RESET: |
| 505 | 507 | case REQ_OP_ZONE_FINISH: |
| 506 | 508 | case REQ_OP_ZONE_APPEND: |
| 507 | − return bio_zone_is_seq(orig_bio); | |
| 509 | + return bio_zone_is_seq(bio); | |
| 508 | 510 | default: |
| 509 | 511 | return false; |
| 510 | 512 | } |
| @@ -519,8 +521,8 @@ int dm_zone_map_bio(struct dm_target_io *tio) · 8 unmodified lines | ||
| 519 | 521 | struct dm_target *ti = tio->ti; |
| 520 | 522 | struct mapped_device *md = io->md; |
| 521 | 523 | struct request_queue *q = md->queue; |
| 522 | − struct bio *orig_bio = io->orig_bio; | |
| 523 | 524 | struct bio *clone = &tio->clone; |
| 525 | + struct orig_bio_details orig_bio_details; | |
| 524 | 526 | unsigned int zno; |
| 525 | 527 | blk_status_t sts; |
| 526 | 528 | int r; |
| @@ -529,18 +531,21 @@ int dm_zone_map_bio(struct dm_target_io *tio) · 2 unmodified lines | ||
| 529 | 531 | * IOs that do not change a zone write pointer do not need |
| 530 | 532 | * any additional special processing. |
| 531 | 533 | */ |
| 532 | − if (!dm_need_zone_wp_tracking(orig_bio)) | |
| 534 | + if (!dm_need_zone_wp_tracking(clone)) | |
| 533 | 535 | return ti->type->map(ti, clone); |
| 534 | 536 | |
| 535 | 537 | /* Lock the target zone */ |
| 536 | − zno = bio_zone_no(orig_bio); | |
| 538 | + zno = bio_zone_no(clone); | |
| 537 | 539 | dm_zone_lock(q, zno, clone); |
| 538 | 540 | |
| 541 | + orig_bio_details.nr_sectors = bio_sectors(clone); | |
| 542 | + orig_bio_details.op = bio_op(clone); | |
| 543 | + | |
| 539 | 544 | /* |
| 540 | 545 | * Check that the bio and the target zone write pointer offset are |
| 541 | 546 | * both valid, and if the bio is a zone append, remap it to a write. |
| 542 | 547 | */ |
| 543 | − if (!dm_zone_map_bio_begin(md, orig_bio, clone)) { | |
| 548 | + if (!dm_zone_map_bio_begin(md, zno, clone)) { | |
| 544 | 549 | dm_zone_unlock(q, zno, clone); |
| 545 | 550 | return DM_MAPIO_KILL; |
| 546 | 551 | } |
| @@ -560,7 +565,8 @@ int dm_zone_map_bio(struct dm_target_io *tio) · 13 unmodified lines | ||
| 560 | 565 | * The target submitted the clone BIO. The target zone will |
| 561 | 566 | * be unlocked on completion of the clone. |
| 562 | 567 | */ |
| 563 | − sts = dm_zone_map_bio_end(md, orig_bio, *tio->len_ptr); | |
| 568 | + sts = dm_zone_map_bio_end(md, zno, &orig_bio_details, | |
| 569 | + *tio->len_ptr); | |
| 564 | 570 | break; |
| 565 | 571 | case DM_MAPIO_REMAPPED: |
| 566 | 572 | /* |
| @@ -568,7 +574,8 @@ int dm_zone_map_bio(struct dm_target_io *tio) · 1 unmodified line | ||
| 568 | 574 | * unlock the target zone here as the clone will not be |
| 569 | 575 | * submitted. |
| 570 | 576 | */ |
| 571 | − sts = dm_zone_map_bio_end(md, orig_bio, *tio->len_ptr); | |
| 577 | + sts = dm_zone_map_bio_end(md, zno, &orig_bio_details, | |
| 578 | + *tio->len_ptr); | |
| 572 | 579 | if (sts != BLK_STS_OK) |
| 573 | 580 | dm_zone_unlock(q, zno, clone); |
| 574 | 581 | break; |
| @@ -1323,8 +1323,7 @@ static void __map_bio(struct bio *clone) · 1322 unmodified lines | ||
| 1323 | 1323 | } |
| 1324 | 1324 | |
| 1325 | 1325 | static void alloc_multiple_bios(struct bio_list *blist, struct clone_info *ci, |
| 1326 | − struct dm_target *ti, unsigned num_bios, | |
| 1327 | − unsigned *len) | |
| 1326 | + struct dm_target *ti, unsigned num_bios) | |
| 1328 | 1327 | { |
| 1329 | 1328 | struct bio *bio; |
| 1330 | 1329 | int try; |
| @@ -1335,7 +1334,7 @@ static void alloc_multiple_bios(struct bio_list *blist, struct clone_info *ci, · 4 unmodified lines | ||
| 1335 | 1334 | if (try) |
| 1336 | 1335 | mutex_lock(&ci->io->md->table_devices_lock); |
| 1337 | 1336 | for (bio_nr = 0; bio_nr < num_bios; bio_nr++) { |
| 1338 | − bio = alloc_tio(ci, ti, bio_nr, len, | |
| 1337 | + bio = alloc_tio(ci, ti, bio_nr, NULL, | |
| 1339 | 1338 | try ? GFP_NOIO : GFP_NOWAIT); |
| 1340 | 1339 | if (!bio) |
| 1341 | 1340 | break; |
| @@ -1363,11 +1362,11 @@ static void __send_duplicate_bios(struct clone_info *ci, struct dm_target *ti, · 21 unmodified lines | ||
| 1363 | 1362 | break; |
| 1364 | 1363 | case 1: |
| 1365 | 1364 | clone = alloc_tio(ci, ti, 0, len, GFP_NOIO); |
| 1366 | − dm_tio_set_flag(clone_to_tio(clone), DM_TIO_IS_DUPLICATE_BIO); | |
| 1367 | 1365 | __map_bio(clone); |
| 1368 | 1366 | break; |
| 1369 | 1367 | default: |
| 1370 | − alloc_multiple_bios(&blist, ci, ti, num_bios, len); | |
| 1368 | + /* dm_accept_partial_bio() is not supported with shared tio->len_ptr */ | |
| 1369 | + alloc_multiple_bios(&blist, ci, ti, num_bios); | |
| 1371 | 1370 | while ((clone = bio_list_pop(&blist))) { |
| 1372 | 1371 | dm_tio_set_flag(clone_to_tio(clone), DM_TIO_IS_DUPLICATE_BIO); |
| 1373 | 1372 | __map_bio(clone); |
| @@ -1392,6 +1391,7 @@ static void __send_empty_flush(struct clone_info *ci) · 18 unmodified lines | ||
| 1392 | 1391 | |
| 1393 | 1392 | ci->bio = &flush_bio; |
| 1394 | 1393 | ci->sector_count = 0; |
| 1394 | + ci->io->tio.clone.bi_iter.bi_size = 0; | |
| 1395 | 1395 | |
| 1396 | 1396 | while ((ti = dm_table_get_target(ci->map, target_nr++))) |
| 1397 | 1397 | __send_duplicate_bios(ci, ti, ti->num_flush_bios, NULL); |
| @@ -1407,14 +1407,10 @@ static void __send_changing_extent_only(struct clone_info *ci, struct dm_target · 9 unmodified lines | ||
| 1407 | 1407 | len = min_t(sector_t, ci->sector_count, |
| 1408 | 1408 | max_io_len_target_boundary(ti, dm_target_offset(ti, ci->sector))); |
| 1409 | 1409 | |
| 1410 | − /* | |
| 1411 | − * dm_accept_partial_bio cannot be used with duplicate bios, | |
| 1412 | − * so update clone_info cursor before __send_duplicate_bios(). | |
| 1413 | − */ | |
| 1410 | + __send_duplicate_bios(ci, ti, num_bios, &len); | |
| 1411 | + | |
| 1414 | 1412 | ci->sector += len; |
| 1415 | 1413 | ci->sector_count -= len; |
| 1416 | − | |
| 1417 | − __send_duplicate_bios(ci, ti, num_bios, &len); | |
| 1418 | 1414 | } |
| 1419 | 1415 | |
| 1420 | 1416 | static bool is_abnormal_io(struct bio *bio) |
| @@ -7,6 +7,7 @@ comment "NXP media platform drivers" · 6 unmodified lines | ||
| 7 | 7 | config VIDEO_IMX_MIPI_CSIS |
| 8 | 8 | tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models" |
| 9 | 9 | depends on ARCH_MXC || COMPILE_TEST |
| 10 | + depends on VIDEO_DEV | |
| 10 | 11 | select MEDIA_CONTROLLER |
| 11 | 12 | select V4L2_FWNODE |
| 12 | 13 | select VIDEO_V4L2_SUBDEV_API |
| @@ -892,7 +892,7 @@ static int rga_probe(struct platform_device *pdev) · 891 unmodified lines | ||
| 892 | 892 | } |
| 893 | 893 | rga->dst_mmu_pages = |
| 894 | 894 | (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3); |
| 895 | − if (rga->dst_mmu_pages) { | |
| 895 | + if (!rga->dst_mmu_pages) { | |
| 896 | 896 | ret = -ENOMEM; |
| 897 | 897 | goto free_src_pages; |
| 898 | 898 | } |
| @@ -77,16 +77,16 @@ err_mutex_unlock: · 76 unmodified lines | ||
| 77 | 77 | } |
| 78 | 78 | |
| 79 | 79 | static const struct si2157_tuner_info si2157_tuners[] = { |
| 80 | − { SI2141, false, 0x60, SI2141_60_FIRMWARE, SI2141_A10_FIRMWARE }, | |
| 81 | − { SI2141, false, 0x61, SI2141_61_FIRMWARE, SI2141_A10_FIRMWARE }, | |
| 82 | − { SI2146, false, 0x11, SI2146_11_FIRMWARE, NULL }, | |
| 83 | − { SI2147, false, 0x50, SI2147_50_FIRMWARE, NULL }, | |
| 84 | − { SI2148, true, 0x32, SI2148_32_FIRMWARE, SI2158_A20_FIRMWARE }, | |
| 85 | − { SI2148, true, 0x33, SI2148_33_FIRMWARE, SI2158_A20_FIRMWARE }, | |
| 86 | − { SI2157, false, 0x50, SI2157_50_FIRMWARE, SI2157_A30_FIRMWARE }, | |
| 87 | − { SI2158, false, 0x50, SI2158_50_FIRMWARE, SI2158_A20_FIRMWARE }, | |
| 88 | − { SI2158, false, 0x51, SI2158_51_FIRMWARE, SI2158_A20_FIRMWARE }, | |
| 89 | − { SI2177, false, 0x50, SI2177_50_FIRMWARE, SI2157_A30_FIRMWARE }, | |
| 80 | + { SI2141, 0x60, false, SI2141_60_FIRMWARE, SI2141_A10_FIRMWARE }, | |
| 81 | + { SI2141, 0x61, false, SI2141_61_FIRMWARE, SI2141_A10_FIRMWARE }, | |
| 82 | + { SI2146, 0x11, false, SI2146_11_FIRMWARE, NULL }, | |
| 83 | + { SI2147, 0x50, false, SI2147_50_FIRMWARE, NULL }, | |
| 84 | + { SI2148, 0x32, true, SI2148_32_FIRMWARE, SI2158_A20_FIRMWARE }, | |
| 85 | + { SI2148, 0x33, true, SI2148_33_FIRMWARE, SI2158_A20_FIRMWARE }, | |
| 86 | + { SI2157, 0x50, false, SI2157_50_FIRMWARE, SI2157_A30_FIRMWARE }, | |
| 87 | + { SI2158, 0x50, false, SI2158_50_FIRMWARE, SI2158_A20_FIRMWARE }, | |
| 88 | + { SI2158, 0x51, false, SI2158_51_FIRMWARE, SI2158_A20_FIRMWARE }, | |
| 89 | + { SI2177, 0x50, false, SI2177_50_FIRMWARE, SI2157_A30_FIRMWARE }, | |
| 90 | 90 | }; |
| 91 | 91 | |
| 92 | 92 | static int si2157_load_firmware(struct dvb_frontend *fe, |
| @@ -178,7 +178,7 @@ static int si2157_find_and_load_firmware(struct dvb_frontend *fe) · 85 unmodified lines | ||
| 178 | 178 | } |
| 179 | 179 | } |
| 180 | 180 | |
| 181 | − if (!fw_name && !fw_alt_name) { | |
| 181 | + if (required && !fw_name && !fw_alt_name) { | |
| 182 | 182 | dev_err(&client->dev, |
| 183 | 183 | "unknown chip version Si21%d-%c%c%c ROM 0x%02x\n", |
| 184 | 184 | part_id, cmd.args[1], cmd.args[3], cmd.args[4], rom_id); |
| @@ -544,20 +544,27 @@ static int atmel_ebi_probe(struct platform_device *pdev) · 543 unmodified lines | ||
| 544 | 544 | smc_np = of_parse_phandle(dev->of_node, "atmel,smc", 0); |
| 545 | 545 | |
| 546 | 546 | ebi->smc.regmap = syscon_node_to_regmap(smc_np); |
| 547 | − if (IS_ERR(ebi->smc.regmap)) | |
| 548 | − return PTR_ERR(ebi->smc.regmap); | |
| 547 | + if (IS_ERR(ebi->smc.regmap)) { | |
| 548 | + ret = PTR_ERR(ebi->smc.regmap); | |
| 549 | + goto put_node; | |
| 550 | + } | |
| 549 | 551 | |
| 550 | 552 | ebi->smc.layout = atmel_hsmc_get_reg_layout(smc_np); |
| 551 | − if (IS_ERR(ebi->smc.layout)) | |
| 552 | − return PTR_ERR(ebi->smc.layout); | |
| 553 | + if (IS_ERR(ebi->smc.layout)) { | |
| 554 | + ret = PTR_ERR(ebi->smc.layout); | |
| 555 | + goto put_node; | |
| 556 | + } | |
| 553 | 557 | |
| 554 | 558 | ebi->smc.clk = of_clk_get(smc_np, 0); |
| 555 | 559 | if (IS_ERR(ebi->smc.clk)) { |
| 556 | − if (PTR_ERR(ebi->smc.clk) != -ENOENT) | |
| 557 | − return PTR_ERR(ebi->smc.clk); | |
| 560 | + if (PTR_ERR(ebi->smc.clk) != -ENOENT) { | |
| 561 | + ret = PTR_ERR(ebi->smc.clk); | |
| 562 | + goto put_node; | |
| 563 | + } | |
| 558 | 564 | |
| 559 | 565 | ebi->smc.clk = NULL; |
| 560 | 566 | } |
| 567 | + of_node_put(smc_np); | |
| 561 | 568 | ret = clk_prepare_enable(ebi->smc.clk); |
| 562 | 569 | if (ret) |
| 563 | 570 | return ret; |
| @@ -608,6 +615,10 @@ static int atmel_ebi_probe(struct platform_device *pdev) · 44 unmodified lines | ||
| 608 | 615 | } |
| 609 | 616 | |
| 610 | 617 | return of_platform_populate(np, NULL, NULL, dev); |
| 618 | + | |
| 619 | +put_node: | |
| 620 | + of_node_put(smc_np); | |
| 621 | + return ret; | |
| 611 | 622 | } |
| 612 | 623 | |
| 613 | 624 | static __maybe_unused int atmel_ebi_resume(struct device *dev) |
| @@ -287,8 +287,7 @@ static int fsl_ifc_ctrl_probe(struct platform_device *dev) · 286 unmodified lines | ||
| 287 | 287 | } |
| 288 | 288 | |
| 289 | 289 | /* legacy dts may still use "simple-bus" compatible */ |
| 290 | − ret = of_platform_populate(dev->dev.of_node, NULL, NULL, | |
| 291 | − &dev->dev); | |
| 290 | + ret = of_platform_default_populate(dev->dev.of_node, NULL, &dev->dev); | |
| 292 | 291 | if (ret) |
| 293 | 292 | goto err_free_nandirq; |
| 294 | 293 | |
| @@ -164,25 +164,39 @@ static const struct regmap_access_table rpcif_volatile_table = { · 163 unmodified lines | ||
| 164 | 164 | |
| 165 | 165 | |
| 166 | 166 | /* |
| 167 | − * Custom accessor functions to ensure SMRDR0 and SMWDR0 are always accessed | |
| 168 | − * with proper width. Requires SMENR_SPIDE to be correctly set before! | |
| 167 | + * Custom accessor functions to ensure SM[RW]DR[01] are always accessed with | |
| 168 | + * proper width. Requires rpcif.xfer_size to be correctly set before! | |
| 169 | 169 | */ |
| 170 | 170 | static int rpcif_reg_read(void *context, unsigned int reg, unsigned int *val) |
| 171 | 171 | { |
| 172 | 172 | struct rpcif *rpc = context; |
| 173 | 173 | |
| 174 | − if (reg == RPCIF_SMRDR0 || reg == RPCIF_SMWDR0) { | |
| 175 | − u32 spide = readl(rpc->base + RPCIF_SMENR) & RPCIF_SMENR_SPIDE(0xF); | |
| 176 | − | |
| 177 | − if (spide == 0x8) { | |
| 174 | + switch (reg) { | |
| 175 | + case RPCIF_SMRDR0: | |
| 176 | + case RPCIF_SMWDR0: | |
| 177 | + switch (rpc->xfer_size) { | |
| 178 | + case 1: | |
| 178 | 179 | *val = readb(rpc->base + reg); |
| 179 | 180 | return 0; |
| 180 | − } else if (spide == 0xC) { | |
| 181 | + | |
| 182 | + case 2: | |
| 181 | 183 | *val = readw(rpc->base + reg); |
| 182 | 184 | return 0; |
| 183 | − } else if (spide != 0xF) { | |
| 185 | + | |
| 186 | + case 4: | |
| 187 | + case 8: | |
| 188 | + *val = readl(rpc->base + reg); | |
| 189 | + return 0; | |
| 190 | + | |
| 191 | + default: | |
| 184 | 192 | return -EILSEQ; |
| 185 | 193 | } |
| 194 | + | |
| 195 | + case RPCIF_SMRDR1: | |
| 196 | + case RPCIF_SMWDR1: | |
| 197 | + if (rpc->xfer_size != 8) | |
| 198 | + return -EILSEQ; | |
| 199 | + break; | |
| 186 | 200 | } |
| 187 | 201 | |
| 188 | 202 | *val = readl(rpc->base + reg); |
| @@ -193,18 +207,34 @@ static int rpcif_reg_write(void *context, unsigned int reg, unsigned int val) · 4 unmodified lines | ||
| 193 | 207 | { |
| 194 | 208 | struct rpcif *rpc = context; |
| 195 | 209 | |
| 196 | − if (reg == RPCIF_SMRDR0 || reg == RPCIF_SMWDR0) { | |
| 197 | − u32 spide = readl(rpc->base + RPCIF_SMENR) & RPCIF_SMENR_SPIDE(0xF); | |
| 198 | − | |
| 199 | − if (spide == 0x8) { | |
| 210 | + switch (reg) { | |
| 211 | + case RPCIF_SMWDR0: | |
| 212 | + switch (rpc->xfer_size) { | |
| 213 | + case 1: | |
| 200 | 214 | writeb(val, rpc->base + reg); |
| 201 | 215 | return 0; |
| 202 | − } else if (spide == 0xC) { | |
| 216 | + | |
| 217 | + case 2: | |
| 203 | 218 | writew(val, rpc->base + reg); |
| 204 | 219 | return 0; |
| 205 | − } else if (spide != 0xF) { | |
| 220 | + | |
| 221 | + case 4: | |
| 222 | + case 8: | |
| 223 | + writel(val, rpc->base + reg); | |
| 224 | + return 0; | |
| 225 | + | |
| 226 | + default: | |
| 206 | 227 | return -EILSEQ; |
| 207 | 228 | } |
| 229 | + | |
| 230 | + case RPCIF_SMWDR1: | |
| 231 | + if (rpc->xfer_size != 8) | |
| 232 | + return -EILSEQ; | |
| 233 | + break; | |
| 234 | + | |
| 235 | + case RPCIF_SMRDR0: | |
| 236 | + case RPCIF_SMRDR1: | |
| 237 | + return -EPERM; | |
| 208 | 238 | } |
| 209 | 239 | |
| 210 | 240 | writel(val, rpc->base + reg); |
| @@ -469,6 +499,7 @@ int rpcif_manual_xfer(struct rpcif *rpc) · 258 unmodified lines | ||
| 469 | 499 | |
| 470 | 500 | smenr |= RPCIF_SMENR_SPIDE(rpcif_bits_set(rpc, nbytes)); |
| 471 | 501 | regmap_write(rpc->regmap, RPCIF_SMENR, smenr); |
| 502 | + rpc->xfer_size = nbytes; | |
| 472 | 503 | |
| 473 | 504 | memcpy(data, rpc->buffer + pos, nbytes); |
| 474 | 505 | if (nbytes == 8) { |
| @@ -533,6 +564,7 @@ int rpcif_manual_xfer(struct rpcif *rpc) · 58 unmodified lines | ||
| 533 | 564 | regmap_write(rpc->regmap, RPCIF_SMENR, smenr); |
| 534 | 565 | regmap_write(rpc->regmap, RPCIF_SMCR, |
| 535 | 566 | rpc->smcr | RPCIF_SMCR_SPIE); |
| 567 | + rpc->xfer_size = nbytes; | |
| 536 | 568 | ret = wait_msg_xfer_end(rpc); |
| 537 | 569 | if (ret) |
| 538 | 570 | goto err_out; |
| @@ -651,6 +683,7 @@ static int rpcif_probe(struct platform_device *pdev) · 112 unmodified lines | ||
| 651 | 683 | struct platform_device *vdev; |
| 652 | 684 | struct device_node *flash; |
| 653 | 685 | const char *name; |
| 686 | + int ret; | |
| 654 | 687 | |
| 655 | 688 | flash = of_get_next_child(pdev->dev.of_node, NULL); |
| 656 | 689 | if (!flash) { |
| @@ -674,7 +707,14 @@ static int rpcif_probe(struct platform_device *pdev) · 17 unmodified lines | ||
| 674 | 707 | return -ENOMEM; |
| 675 | 708 | vdev->dev.parent = &pdev->dev; |
| 676 | 709 | platform_set_drvdata(pdev, vdev); |
| 677 | − return platform_device_add(vdev); | |
| 710 | + | |
| 711 | + ret = platform_device_add(vdev); | |
| 712 | + if (ret) { | |
| 713 | + platform_device_put(vdev); | |
| 714 | + return ret; | |
| 715 | + } | |
| 716 | + | |
| 717 | + return 0; | |
| 678 | 718 | } |
| 679 | 719 | |
| 680 | 720 | static int rpcif_remove(struct platform_device *pdev) |
| @@ -31,6 +31,8 @@ · 30 unmodified lines | ||
| 31 | 31 | */ |
| 32 | 32 | |
| 33 | 33 | #define FM25_SN_LEN 8 /* serial number length */ |
| 34 | +#define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */ | |
| 35 | + | |
| 34 | 36 | struct at25_data { |
| 35 | 37 | struct spi_eeprom chip; |
| 36 | 38 | struct spi_device *spi; |
| @@ -39,6 +41,7 @@ struct at25_data { · 2 unmodified lines | ||
| 39 | 41 | struct nvmem_config nvmem_config; |
| 40 | 42 | struct nvmem_device *nvmem; |
| 41 | 43 | u8 sernum[FM25_SN_LEN]; |
| 44 | + u8 command[EE_MAXADDRLEN + 1]; | |
| 42 | 45 | }; |
| 43 | 46 | |
| 44 | 47 | #define AT25_WREN 0x06 /* latch the write enable */ |
| @@ -61,8 +64,6 @@ struct at25_data { · 16 unmodified lines | ||
| 61 | 64 | |
| 62 | 65 | #define FM25_ID_LEN 9 /* ID length */ |
| 63 | 66 | |
| 64 | −#define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */ | |
| 65 | − | |
| 66 | 67 | /* |
| 67 | 68 | * Specs often allow 5ms for a page write, sometimes 20ms; |
| 68 | 69 | * it's important to recover from write timeouts. |
| @@ -78,7 +79,6 @@ static int at25_ee_read(void *priv, unsigned int offset, · 9 unmodified lines | ||
| 78 | 79 | { |
| 79 | 80 | struct at25_data *at25 = priv; |
| 80 | 81 | char *buf = val; |
| 81 | − u8 command[EE_MAXADDRLEN + 1]; | |
| 82 | 82 | u8 *cp; |
| 83 | 83 | ssize_t status; |
| 84 | 84 | struct spi_transfer t[2]; |
| @@ -92,12 +92,15 @@ static int at25_ee_read(void *priv, unsigned int offset, · 7 unmodified lines | ||
| 92 | 92 | if (unlikely(!count)) |
| 93 | 93 | return -EINVAL; |
| 94 | 94 | |
| 95 | − cp = command; | |
| 95 | + cp = at25->command; | |
| 96 | 96 | |
| 97 | 97 | instr = AT25_READ; |
| 98 | 98 | if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR) |
| 99 | 99 | if (offset >= BIT(at25->addrlen * 8)) |
| 100 | 100 | instr |= AT25_INSTR_BIT3; |
| 101 | + | |
| 102 | + mutex_lock(&at25->lock); | |
| 103 | + | |
| 101 | 104 | *cp++ = instr; |
| 102 | 105 | |
| 103 | 106 | /* 8/16/24-bit address is written MSB first */ |
| @@ -116,7 +119,7 @@ static int at25_ee_read(void *priv, unsigned int offset, · 12 unmodified lines | ||
| 116 | 119 | spi_message_init(&m); |
| 117 | 120 | memset(t, 0, sizeof(t)); |
| 118 | 121 | |
| 119 | − t[0].tx_buf = command; | |
| 122 | + t[0].tx_buf = at25->command; | |
| 120 | 123 | t[0].len = at25->addrlen + 1; |
| 121 | 124 | spi_message_add_tail(&t[0], &m); |
| 122 | 125 | |
| @@ -124,8 +127,6 @@ static int at25_ee_read(void *priv, unsigned int offset, · 1 unmodified line | ||
| 124 | 127 | t[1].len = count; |
| 125 | 128 | spi_message_add_tail(&t[1], &m); |
| 126 | 129 | |
| 127 | − mutex_lock(&at25->lock); | |
| 128 | − | |
| 129 | 130 | /* |
| 130 | 131 | * Read it all at once. |
| 131 | 132 | * |
| @@ -152,7 +153,7 @@ static int fm25_aux_read(struct at25_data *at25, u8 *buf, uint8_t command, · 20 unmodified lines | ||
| 152 | 153 | spi_message_init(&m); |
| 153 | 154 | memset(t, 0, sizeof(t)); |
| 154 | 155 | |
| 155 | − t[0].tx_buf = &command; | |
| 156 | + t[0].tx_buf = at25->command; | |
| 156 | 157 | t[0].len = 1; |
| 157 | 158 | spi_message_add_tail(&t[0], &m); |
| 158 | 159 | |
| @@ -162,6 +163,8 @@ static int fm25_aux_read(struct at25_data *at25, u8 *buf, uint8_t command, · 3 unmodified lines | ||
| 162 | 163 | |
| 163 | 164 | mutex_lock(&at25->lock); |
| 164 | 165 | |
| 166 | + at25->command[0] = command; | |
| 167 | + | |
| 165 | 168 | status = spi_sync(at25->spi, &m); |
| 166 | 169 | dev_dbg(&at25->spi->dev, "read %d aux bytes --> %d\n", len, status); |
| 167 | 170 | |
| @@ -43,6 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | |
| 44 | 44 | struct mtk_ecc_caps { |
| 45 | 45 | u32 err_mask; |
| 46 | + u32 err_shift; | |
| 46 | 47 | const u8 *ecc_strength; |
| 47 | 48 | const u32 *ecc_regs; |
| 48 | 49 | u8 num_ecc_strength; |
| @@ -76,7 +77,7 @@ static const u8 ecc_strength_mt2712[] = { · 27 unmodified lines | ||
| 76 | 77 | }; |
| 77 | 78 | |
| 78 | 79 | static const u8 ecc_strength_mt7622[] = { |
| 79 | − 4, 6, 8, 10, 12, 14, 16 | |
| 80 | + 4, 6, 8, 10, 12 | |
| 80 | 81 | }; |
| 81 | 82 | |
| 82 | 83 | enum mtk_ecc_regs { |
| @@ -221,7 +222,7 @@ void mtk_ecc_get_stats(struct mtk_ecc *ecc, struct mtk_ecc_stats *stats, · 138 unmodified lines | ||
| 221 | 222 | for (i = 0; i < sectors; i++) { |
| 222 | 223 | offset = (i >> 2) << 2; |
| 223 | 224 | err = readl(ecc->regs + ECC_DECENUM0 + offset); |
| 224 | − err = err >> ((i % 4) * 8); | |
| 225 | + err = err >> ((i % 4) * ecc->caps->err_shift); | |
| 225 | 226 | err &= ecc->caps->err_mask; |
| 226 | 227 | if (err == ecc->caps->err_mask) { |
| 227 | 228 | /* uncorrectable errors */ |
| @@ -449,6 +450,7 @@ EXPORT_SYMBOL(mtk_ecc_get_parity_bits); · 221 unmodified lines | ||
| 449 | 450 | |
| 450 | 451 | static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = { |
| 451 | 452 | .err_mask = 0x3f, |
| 453 | + .err_shift = 8, | |
| 452 | 454 | .ecc_strength = ecc_strength_mt2701, |
| 453 | 455 | .ecc_regs = mt2701_ecc_regs, |
| 454 | 456 | .num_ecc_strength = 20, |
| @@ -459,6 +461,7 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2701 = { · 4 unmodified lines | ||
| 459 | 461 | |
| 460 | 462 | static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = { |
| 461 | 463 | .err_mask = 0x7f, |
| 464 | + .err_shift = 8, | |
| 462 | 465 | .ecc_strength = ecc_strength_mt2712, |
| 463 | 466 | .ecc_regs = mt2712_ecc_regs, |
| 464 | 467 | .num_ecc_strength = 23, |
| @@ -468,10 +471,11 @@ static const struct mtk_ecc_caps mtk_ecc_caps_mt2712 = { · 3 unmodified lines | ||
| 468 | 471 | }; |
| 469 | 472 | |
| 470 | 473 | static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = { |
| 471 | − .err_mask = 0x3f, | |
| 474 | + .err_mask = 0x1f, | |
| 475 | + .err_shift = 5, | |
| 472 | 476 | .ecc_strength = ecc_strength_mt7622, |
| 473 | 477 | .ecc_regs = mt7622_ecc_regs, |
| 474 | − .num_ecc_strength = 7, | |
| 478 | + .num_ecc_strength = 5, | |
| 475 | 479 | .ecc_mode_shift = 4, |
| 476 | 480 | .parity_bits = 13, |
| 477 | 481 | .pg_irq_sel = 0, |
| @@ -2651,10 +2651,23 @@ static int qcom_nand_attach_chip(struct nand_chip *chip) · 2650 unmodified lines | ||
| 2651 | 2651 | ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; |
| 2652 | 2652 | |
| 2653 | 2653 | mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops); |
| 2654 | + /* Free the initially allocated BAM transaction for reading the ONFI params */ | |
| 2655 | + if (nandc->props->is_bam) | |
| 2656 | + free_bam_transaction(nandc); | |
| 2654 | 2657 | |
| 2655 | 2658 | nandc->max_cwperpage = max_t(unsigned int, nandc->max_cwperpage, |
| 2656 | 2659 | cwperpage); |
| 2657 | 2660 | |
| 2661 | + /* Now allocate the BAM transaction based on updated max_cwperpage */ | |
| 2662 | + if (nandc->props->is_bam) { | |
| 2663 | + nandc->bam_txn = alloc_bam_transaction(nandc); | |
| 2664 | + if (!nandc->bam_txn) { | |
| 2665 | + dev_err(nandc->dev, | |
| 2666 | + "failed to allocate bam transaction\n"); | |
| 2667 | + return -ENOMEM; | |
| 2668 | + } | |
| 2669 | + } | |
| 2670 | + | |
| 2658 | 2671 | /* |
| 2659 | 2672 | * DATA_UD_BYTES varies based on whether the read/write command protects |
| 2660 | 2673 | * spare data with ECC too. We protect spare data by default, so we set |
| @@ -2955,17 +2968,6 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc, · 294 unmodified lines | ||
| 2955 | 2968 | if (ret) |
| 2956 | 2969 | return ret; |
| 2957 | 2970 | |
| 2958 | − if (nandc->props->is_bam) { | |
| 2959 | − free_bam_transaction(nandc); | |
| 2960 | − nandc->bam_txn = alloc_bam_transaction(nandc); | |
| 2961 | − if (!nandc->bam_txn) { | |
| 2962 | − dev_err(nandc->dev, | |
| 2963 | − "failed to allocate bam transaction\n"); | |
| 2964 | − nand_cleanup(chip); | |
| 2965 | − return -ENOMEM; | |
| 2966 | − } | |
| 2967 | − } | |
| 2968 | − | |
| 2969 | 2971 | ret = mtd_device_parse_register(mtd, probes, NULL, NULL, 0); |
| 2970 | 2972 | if (ret) |
| 2971 | 2973 | nand_cleanup(chip); |
| @@ -384,7 +384,8 @@ static int flctl_dma_fifo0_transfer(struct sh_flctl *flctl, unsigned long *buf, · 383 unmodified lines | ||
| 384 | 384 | dma_addr_t dma_addr; |
| 385 | 385 | dma_cookie_t cookie; |
| 386 | 386 | uint32_t reg; |
| 387 | − int ret; | |
| 387 | + int ret = 0; | |
| 388 | + unsigned long time_left; | |
| 388 | 389 | |
| 389 | 390 | if (dir == DMA_FROM_DEVICE) { |
| 390 | 391 | chan = flctl->chan_fifo0_rx; |
| @@ -425,13 +426,14 @@ static int flctl_dma_fifo0_transfer(struct sh_flctl *flctl, unsigned long *buf, · 34 unmodified lines | ||
| 425 | 426 | goto out; |
| 426 | 427 | } |
| 427 | 428 | |
| 428 | − ret = | |
| 429 | + time_left = | |
| 429 | 430 | wait_for_completion_timeout(&flctl->dma_complete, |
| 430 | 431 | msecs_to_jiffies(3000)); |
| 431 | 432 | |
| 432 | − if (ret <= 0) { | |
| 433 | + if (time_left == 0) { | |
| 433 | 434 | dmaengine_terminate_all(chan); |
| 434 | 435 | dev_err(&flctl->pdev->dev, "wait_for_completion_timeout\n"); |
| 436 | + ret = -ETIMEDOUT; | |
| 435 | 437 | } |
| 436 | 438 | |
| 437 | 439 | out: |
| @@ -441,7 +443,7 @@ out: · 3 unmodified lines | ||
| 441 | 443 | |
| 442 | 444 | dma_unmap_single(chan->device->dev, dma_addr, len, dir); |
| 443 | 445 | |
| 444 | − /* ret > 0 is success */ | |
| 446 | + /* ret == 0 is success */ | |
| 445 | 447 | return ret; |
| 446 | 448 | } |
| 447 | 449 | |
| @@ -465,7 +467,7 @@ static void read_fiforeg(struct sh_flctl *flctl, int rlen, int offset) · 17 unmodified lines | ||
| 465 | 467 | |
| 466 | 468 | /* initiate DMA transfer */ |
| 467 | 469 | if (flctl->chan_fifo0_rx && rlen >= 32 && |
| 468 | − flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_FROM_DEVICE) > 0) | |
| 470 | + !flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_FROM_DEVICE)) | |
| 469 | 471 | goto convert; /* DMA success */ |
| 470 | 472 | |
| 471 | 473 | /* do polling transfer */ |
| @@ -524,7 +526,7 @@ static void write_ec_fiforeg(struct sh_flctl *flctl, int rlen, · 52 unmodified lines | ||
| 524 | 526 | |
| 525 | 527 | /* initiate DMA transfer */ |
| 526 | 528 | if (flctl->chan_fifo0_tx && rlen >= 32 && |
| 527 | − flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_TO_DEVICE) > 0) | |
| 529 | + !flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_TO_DEVICE)) | |
| 528 | 530 | return; /* DMA success */ |
| 529 | 531 | |
| 530 | 532 | /* do polling transfer */ |
| @@ -4027,14 +4027,19 @@ static bool bond_flow_dissect(struct bonding *bond, struct sk_buff *skb, const v · 4026 unmodified lines | ||
| 4027 | 4027 | return true; |
| 4028 | 4028 | } |
| 4029 | 4029 | |
| 4030 | −static u32 bond_ip_hash(u32 hash, struct flow_keys *flow) | |
| 4030 | +static u32 bond_ip_hash(u32 hash, struct flow_keys *flow, int xmit_policy) | |
| 4031 | 4031 | { |
| 4032 | 4032 | hash ^= (__force u32)flow_get_u32_dst(flow) ^ |
| 4033 | 4033 | (__force u32)flow_get_u32_src(flow); |
| 4034 | 4034 | hash ^= (hash >> 16); |
| 4035 | 4035 | hash ^= (hash >> 8); |
| 4036 | + | |
| 4036 | 4037 | /* discard lowest hash bit to deal with the common even ports pattern */ |
| 4037 | − return hash >> 1; | |
| 4038 | + if (xmit_policy == BOND_XMIT_POLICY_LAYER34 || | |
| 4039 | + xmit_policy == BOND_XMIT_POLICY_ENCAP34) | |
| 4040 | + return hash >> 1; | |
| 4041 | + | |
| 4042 | + return hash; | |
| 4038 | 4043 | } |
| 4039 | 4044 | |
| 4040 | 4045 | /* Generate hash based on xmit policy. If @skb is given it is used to linearize |
| @@ -4064,7 +4069,7 @@ static u32 __bond_xmit_hash(struct bonding *bond, struct sk_buff *skb, const voi · 23 unmodified lines | ||
| 4064 | 4069 | memcpy(&hash, &flow.ports.ports, sizeof(hash)); |
| 4065 | 4070 | } |
| 4066 | 4071 | |
| 4067 | − return bond_ip_hash(hash, &flow); | |
| 4072 | + return bond_ip_hash(hash, &flow, bond->params.xmit_policy); | |
| 4068 | 4073 | } |
| 4069 | 4074 | |
| 4070 | 4075 | /** |
| @@ -5259,7 +5264,7 @@ static u32 bond_sk_hash_l34(struct sock *sk) · 1188 unmodified lines | ||
| 5259 | 5264 | /* L4 */ |
| 5260 | 5265 | memcpy(&hash, &flow.ports.ports, sizeof(hash)); |
| 5261 | 5266 | /* L3 */ |
| 5262 | − return bond_ip_hash(hash, &flow); | |
| 5267 | + return bond_ip_hash(hash, &flow, BOND_XMIT_POLICY_LAYER34); | |
| 5263 | 5268 | } |
| 5264 | 5269 | |
| 5265 | 5270 | static struct net_device *__bond_sk_get_lower_dev(struct bonding *bond, |
| @@ -1681,9 +1681,6 @@ static void gswip_phylink_mac_config(struct dsa_switch *ds, int port, · 1680 unmodified lines | ||
| 1681 | 1681 | break; |
| 1682 | 1682 | case PHY_INTERFACE_MODE_RMII: |
| 1683 | 1683 | miicfg |= GSWIP_MII_CFG_MODE_RMIIM; |
| 1684 | − | |
| 1685 | − /* Configure the RMII clock as output: */ | |
| 1686 | − miicfg |= GSWIP_MII_CFG_RMII_CLK; | |
| 1687 | 1684 | break; |
| 1688 | 1685 | case PHY_INTERFACE_MODE_RGMII: |
| 1689 | 1686 | case PHY_INTERFACE_MODE_RGMII_ID: |
| @@ -40,8 +40,9 @@ int mv88e6xxx_port_hidden_wait(struct mv88e6xxx_chip *chip) · 39 unmodified lines | ||
| 40 | 40 | { |
| 41 | 41 | int bit = __bf_shf(MV88E6XXX_PORT_RESERVED_1A_BUSY); |
| 42 | 42 | |
| 43 | − return mv88e6xxx_wait_bit(chip, MV88E6XXX_PORT_RESERVED_1A_CTRL_PORT, | |
| 44 | − MV88E6XXX_PORT_RESERVED_1A, bit, 0); | |
| 43 | + return mv88e6xxx_port_wait_bit(chip, | |
| 44 | + MV88E6XXX_PORT_RESERVED_1A_CTRL_PORT, | |
| 45 | + MV88E6XXX_PORT_RESERVED_1A, bit, 0); | |
| 45 | 46 | } |
| 46 | 47 | |
| 47 | 48 | int mv88e6xxx_port_hidden_read(struct mv88e6xxx_chip *chip, int block, int port, |
| @@ -670,6 +670,8 @@ static int felix_change_tag_protocol(struct dsa_switch *ds, int cpu, · 669 unmodified lines | ||
| 670 | 670 | struct ocelot *ocelot = ds->priv; |
| 671 | 671 | struct felix *felix = ocelot_to_felix(ocelot); |
| 672 | 672 | enum dsa_tag_protocol old_proto = felix->tag_proto; |
| 673 | + bool cpu_port_active = false; | |
| 674 | + struct dsa_port *dp; | |
| 673 | 675 | int err; |
| 674 | 676 | |
| 675 | 677 | if (proto != DSA_TAG_PROTO_SEVILLE && |
| @@ -677,6 +679,27 @@ static int felix_change_tag_protocol(struct dsa_switch *ds, int cpu, · 1 unmodified line | ||
| 677 | 679 | proto != DSA_TAG_PROTO_OCELOT_8021Q) |
| 678 | 680 | return -EPROTONOSUPPORT; |
| 679 | 681 | |
| 682 | + /* We don't support multiple CPU ports, yet the DT blob may have | |
| 683 | + * multiple CPU ports defined. The first CPU port is the active one, | |
| 684 | + * the others are inactive. In this case, DSA will call | |
| 685 | + * ->change_tag_protocol() multiple times, once per CPU port. | |
| 686 | + * Since we implement the tagging protocol change towards "ocelot" or | |
| 687 | + * "seville" as effectively initializing the NPI port, what we are | |
| 688 | + * doing is effectively changing who the NPI port is to the last @cpu | |
| 689 | + * argument passed, which is an unused DSA CPU port and not the one | |
| 690 | + * that should actively pass traffic. | |
| 691 | + * Suppress DSA's calls on CPU ports that are inactive. | |
| 692 | + */ | |
| 693 | + dsa_switch_for_each_user_port(dp, ds) { | |
| 694 | + if (dp->cpu_dp->index == cpu) { | |
| 695 | + cpu_port_active = true; | |
| 696 | + break; | |
| 697 | + } | |
| 698 | + } | |
| 699 | + | |
| 700 | + if (!cpu_port_active) | |
| 701 | + return 0; | |
| 702 | + | |
| 680 | 703 | felix_del_tag_protocol(ds, cpu, old_proto); |
| 681 | 704 | |
| 682 | 705 | err = felix_set_tag_protocol(ds, cpu, proto); |
| @@ -2316,7 +2316,7 @@ static int felix_pci_probe(struct pci_dev *pdev, · 2315 unmodified lines | ||
| 2316 | 2316 | |
| 2317 | 2317 | err = dsa_register_switch(ds); |
| 2318 | 2318 | if (err) { |
| 2319 | − dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err); | |
| 2319 | + dev_err_probe(&pdev->dev, err, "Failed to register DSA switch\n"); | |
| 2320 | 2320 | goto err_register_ds; |
| 2321 | 2321 | } |
| 2322 | 2322 | |
| @@ -9,34 +9,46 @@ menuconfig NET_DSA_REALTEK · 8 unmodified lines | ||
| 9 | 9 | help |
| 10 | 10 | Select to enable support for Realtek Ethernet switch chips. |
| 11 | 11 | |
| 12 | + Note that at least one interface driver must be enabled for the | |
| 13 | + subdrivers to be loaded. Moreover, an interface driver cannot achieve | |
| 14 | + anything without at least one subdriver enabled. | |
| 15 | + | |
| 16 | +if NET_DSA_REALTEK | |
| 17 | + | |
| 12 | 18 | config NET_DSA_REALTEK_MDIO |
| 13 | − tristate "Realtek MDIO connected switch driver" | |
| 14 | − depends on NET_DSA_REALTEK | |
| 19 | + tristate "Realtek MDIO interface driver" | |
| 15 | 20 | depends on OF |
| 21 | + depends on NET_DSA_REALTEK_RTL8365MB || NET_DSA_REALTEK_RTL8366RB | |
| 22 | + depends on NET_DSA_REALTEK_RTL8365MB || !NET_DSA_REALTEK_RTL8365MB | |
| 23 | + depends on NET_DSA_REALTEK_RTL8366RB || !NET_DSA_REALTEK_RTL8366RB | |
| 16 | 24 | help |
| 17 | 25 | Select to enable support for registering switches configured |
| 18 | 26 | through MDIO. |
| 19 | 27 | |
| 20 | 28 | config NET_DSA_REALTEK_SMI |
| 21 | − tristate "Realtek SMI connected switch driver" | |
| 22 | − depends on NET_DSA_REALTEK | |
| 29 | + tristate "Realtek SMI interface driver" | |
| 23 | 30 | depends on OF |
| 31 | + depends on NET_DSA_REALTEK_RTL8365MB || NET_DSA_REALTEK_RTL8366RB | |
| 32 | + depends on NET_DSA_REALTEK_RTL8365MB || !NET_DSA_REALTEK_RTL8365MB | |
| 33 | + depends on NET_DSA_REALTEK_RTL8366RB || !NET_DSA_REALTEK_RTL8366RB | |
| 24 | 34 | help |
| 25 | 35 | Select to enable support for registering switches connected |
| 26 | 36 | through SMI. |
| 27 | 37 | |
| 28 | 38 | config NET_DSA_REALTEK_RTL8365MB |
| 29 | 39 | tristate "Realtek RTL8365MB switch subdriver" |
| 30 | − depends on NET_DSA_REALTEK | |
| 31 | − depends on NET_DSA_REALTEK_SMI || NET_DSA_REALTEK_MDIO | |
| 40 | + imply NET_DSA_REALTEK_SMI | |
| 41 | + imply NET_DSA_REALTEK_MDIO | |
| 32 | 42 | select NET_DSA_TAG_RTL8_4 |
| 33 | 43 | help |
| 34 | 44 | Select to enable support for Realtek RTL8365MB-VC and RTL8367S. |
| 35 | 45 | |
| 36 | 46 | config NET_DSA_REALTEK_RTL8366RB |
| 37 | 47 | tristate "Realtek RTL8366RB switch subdriver" |
| 38 | − depends on NET_DSA_REALTEK | |
| 39 | − depends on NET_DSA_REALTEK_SMI || NET_DSA_REALTEK_MDIO | |
| 48 | + imply NET_DSA_REALTEK_SMI | |
| 49 | + imply NET_DSA_REALTEK_MDIO | |
| 40 | 50 | select NET_DSA_TAG_RTL4_A |
| 41 | 51 | help |
| 42 | − Select to enable support for Realtek RTL8366RB | |
| 52 | + Select to enable support for Realtek RTL8366RB. | |
| 53 | + | |
| 54 | +endif | |
| @@ -267,7 +267,6 @@ static const struct of_device_id realtek_mdio_of_match[] = { · 266 unmodified lines | ||
| 267 | 267 | #endif |
| 268 | 268 | #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8365MB) |
| 269 | 269 | { .compatible = "realtek,rtl8365mb", .data = &rtl8365mb_variant, }, |
| 270 | − { .compatible = "realtek,rtl8367s", .data = &rtl8365mb_variant, }, | |
| 271 | 270 | #endif |
| 272 | 271 | { /* sentinel */ }, |
| 273 | 272 | }; |
| @@ -546,20 +546,11 @@ static const struct of_device_id realtek_smi_of_match[] = { · 545 unmodified lines | ||
| 546 | 546 | .data = &rtl8366rb_variant, |
| 547 | 547 | }, |
| 548 | 548 | #endif |
| 549 | − { | |
| 550 | − /* FIXME: add support for RTL8366S and more */ | |
| 551 | − .compatible = "realtek,rtl8366s", | |
| 552 | − .data = NULL, | |
| 553 | − }, | |
| 554 | 549 | #if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8365MB) |
| 555 | 550 | { |
| 556 | 551 | .compatible = "realtek,rtl8365mb", |
| 557 | 552 | .data = &rtl8365mb_variant, |
| 558 | 553 | }, |
| 559 | − { | |
| 560 | − .compatible = "realtek,rtl8367s", | |
| 561 | − .data = &rtl8365mb_variant, | |
| 562 | − }, | |
| 563 | 554 | #endif |
| 564 | 555 | { /* sentinel */ }, |
| 565 | 556 | }; |
| @@ -35,15 +35,6 @@ source "drivers/net/ethernet/aquantia/Kconfig" · 34 unmodified lines | ||
| 35 | 35 | source "drivers/net/ethernet/arc/Kconfig" |
| 36 | 36 | source "drivers/net/ethernet/asix/Kconfig" |
| 37 | 37 | source "drivers/net/ethernet/atheros/Kconfig" |
| 38 | −source "drivers/net/ethernet/broadcom/Kconfig" | |
| 39 | −source "drivers/net/ethernet/brocade/Kconfig" | |
| 40 | −source "drivers/net/ethernet/cadence/Kconfig" | |
| 41 | −source "drivers/net/ethernet/calxeda/Kconfig" | |
| 42 | −source "drivers/net/ethernet/cavium/Kconfig" | |
| 43 | −source "drivers/net/ethernet/chelsio/Kconfig" | |
| 44 | −source "drivers/net/ethernet/cirrus/Kconfig" | |
| 45 | −source "drivers/net/ethernet/cisco/Kconfig" | |
| 46 | −source "drivers/net/ethernet/cortina/Kconfig" | |
| 47 | 38 | |
| 48 | 39 | config CX_ECAT |
| 49 | 40 | tristate "Beckhoff CX5020 EtherCAT master support" |
| @@ -57,6 +48,14 @@ config CX_ECAT · 7 unmodified lines | ||
| 57 | 48 | To compile this driver as a module, choose M here. The module |
| 58 | 49 | will be called ec_bhf. |
| 59 | 50 | |
| 51 | +source "drivers/net/ethernet/broadcom/Kconfig" | |
| 52 | +source "drivers/net/ethernet/cadence/Kconfig" | |
| 53 | +source "drivers/net/ethernet/calxeda/Kconfig" | |
| 54 | +source "drivers/net/ethernet/cavium/Kconfig" | |
| 55 | +source "drivers/net/ethernet/chelsio/Kconfig" | |
| 56 | +source "drivers/net/ethernet/cirrus/Kconfig" | |
| 57 | +source "drivers/net/ethernet/cisco/Kconfig" | |
| 58 | +source "drivers/net/ethernet/cortina/Kconfig" | |
| 60 | 59 | source "drivers/net/ethernet/davicom/Kconfig" |
| 61 | 60 | |
| 62 | 61 | config DNET |
| @@ -85,7 +84,6 @@ source "drivers/net/ethernet/huawei/Kconfig" · 22 unmodified lines | ||
| 85 | 84 | source "drivers/net/ethernet/i825xx/Kconfig" |
| 86 | 85 | source "drivers/net/ethernet/ibm/Kconfig" |
| 87 | 86 | source "drivers/net/ethernet/intel/Kconfig" |
| 88 | −source "drivers/net/ethernet/microsoft/Kconfig" | |
| 89 | 87 | source "drivers/net/ethernet/xscale/Kconfig" |
| 90 | 88 | |
| 91 | 89 | config JME |
| @@ -128,8 +126,9 @@ source "drivers/net/ethernet/mediatek/Kconfig" · 36 unmodified lines | ||
| 128 | 126 | source "drivers/net/ethernet/mellanox/Kconfig" |
| 129 | 127 | source "drivers/net/ethernet/micrel/Kconfig" |
| 130 | 128 | source "drivers/net/ethernet/microchip/Kconfig" |
| 131 | −source "drivers/net/ethernet/moxa/Kconfig" | |
| 132 | 129 | source "drivers/net/ethernet/mscc/Kconfig" |
| 130 | +source "drivers/net/ethernet/microsoft/Kconfig" | |
| 131 | +source "drivers/net/ethernet/moxa/Kconfig" | |
| 133 | 132 | source "drivers/net/ethernet/myricom/Kconfig" |
| 134 | 133 | |
| 135 | 134 | config FEALNX |
| @@ -141,10 +140,10 @@ config FEALNX · 5 unmodified lines | ||
| 141 | 140 | Say Y here to support the Myson MTD-800 family of PCI-based Ethernet |
| 142 | 141 | cards. <http://www.myson.com.tw/> |
| 143 | 142 | |
| 143 | +source "drivers/net/ethernet/ni/Kconfig" | |
| 144 | 144 | source "drivers/net/ethernet/natsemi/Kconfig" |
| 145 | 145 | source "drivers/net/ethernet/neterion/Kconfig" |
| 146 | 146 | source "drivers/net/ethernet/netronome/Kconfig" |
| 147 | −source "drivers/net/ethernet/ni/Kconfig" | |
| 148 | 147 | source "drivers/net/ethernet/8390/Kconfig" |
| 149 | 148 | source "drivers/net/ethernet/nvidia/Kconfig" |
| 150 | 149 | source "drivers/net/ethernet/nxp/Kconfig" |
| @@ -164,6 +163,7 @@ source "drivers/net/ethernet/packetengines/Kconfig" · 13 unmodified lines | ||
| 164 | 163 | source "drivers/net/ethernet/pasemi/Kconfig" |
| 165 | 164 | source "drivers/net/ethernet/pensando/Kconfig" |
| 166 | 165 | source "drivers/net/ethernet/qlogic/Kconfig" |
| 166 | +source "drivers/net/ethernet/brocade/Kconfig" | |
| 167 | 167 | source "drivers/net/ethernet/qualcomm/Kconfig" |
| 168 | 168 | source "drivers/net/ethernet/rdc/Kconfig" |
| 169 | 169 | source "drivers/net/ethernet/realtek/Kconfig" |
| @@ -171,10 +171,10 @@ source "drivers/net/ethernet/renesas/Kconfig" · 1 unmodified line | ||
| 171 | 171 | source "drivers/net/ethernet/rocker/Kconfig" |
| 172 | 172 | source "drivers/net/ethernet/samsung/Kconfig" |
| 173 | 173 | source "drivers/net/ethernet/seeq/Kconfig" |
| 174 | −source "drivers/net/ethernet/sfc/Kconfig" | |
| 175 | 174 | source "drivers/net/ethernet/sgi/Kconfig" |
| 176 | 175 | source "drivers/net/ethernet/silan/Kconfig" |
| 177 | 176 | source "drivers/net/ethernet/sis/Kconfig" |
| 177 | +source "drivers/net/ethernet/sfc/Kconfig" | |
| 178 | 178 | source "drivers/net/ethernet/smsc/Kconfig" |
| 179 | 179 | source "drivers/net/ethernet/socionext/Kconfig" |
| 180 | 180 | source "drivers/net/ethernet/stmicro/Kconfig" |
| @@ -486,8 +486,8 @@ int aq_nic_start(struct aq_nic_s *self) · 485 unmodified lines | ||
| 486 | 486 | if (err < 0) |
| 487 | 487 | goto err_exit; |
| 488 | 488 | |
| 489 | − for (i = 0U, aq_vec = self->aq_vec[0]; | |
| 490 | − self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { | |
| 489 | + for (i = 0U; self->aq_vecs > i; ++i) { | |
| 490 | + aq_vec = self->aq_vec[i]; | |
| 491 | 491 | err = aq_vec_start(aq_vec); |
| 492 | 492 | if (err < 0) |
| 493 | 493 | goto err_exit; |
| @@ -517,8 +517,8 @@ int aq_nic_start(struct aq_nic_s *self) · 23 unmodified lines | ||
| 517 | 517 | mod_timer(&self->polling_timer, jiffies + |
| 518 | 518 | AQ_CFG_POLLING_TIMER_INTERVAL); |
| 519 | 519 | } else { |
| 520 | − for (i = 0U, aq_vec = self->aq_vec[0]; | |
| 521 | − self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { | |
| 520 | + for (i = 0U; self->aq_vecs > i; ++i) { | |
| 521 | + aq_vec = self->aq_vec[i]; | |
| 522 | 522 | err = aq_pci_func_alloc_irq(self, i, self->ndev->name, |
| 523 | 523 | aq_vec_isr, aq_vec, |
| 524 | 524 | aq_vec_get_affinity_mask(aq_vec)); |
| @@ -444,22 +444,22 @@ err_exit: · 443 unmodified lines | ||
| 444 | 444 | |
| 445 | 445 | static int aq_pm_freeze(struct device *dev) |
| 446 | 446 | { |
| 447 | − return aq_suspend_common(dev, false); | |
| 447 | + return aq_suspend_common(dev, true); | |
| 448 | 448 | } |
| 449 | 449 | |
| 450 | 450 | static int aq_pm_suspend_poweroff(struct device *dev) |
| 451 | 451 | { |
| 452 | − return aq_suspend_common(dev, true); | |
| 452 | + return aq_suspend_common(dev, false); | |
| 453 | 453 | } |
| 454 | 454 | |
| 455 | 455 | static int aq_pm_thaw(struct device *dev) |
| 456 | 456 | { |
| 457 | − return atl_resume_common(dev, false); | |
| 457 | + return atl_resume_common(dev, true); | |
| 458 | 458 | } |
| 459 | 459 | |
| 460 | 460 | static int aq_pm_resume_restore(struct device *dev) |
| 461 | 461 | { |
| 462 | − return atl_resume_common(dev, true); | |
| 462 | + return atl_resume_common(dev, false); | |
| 463 | 463 | } |
| 464 | 464 | |
| 465 | 465 | static const struct dev_pm_ops aq_pm_ops = { |
| @@ -43,8 +43,8 @@ static int aq_vec_poll(struct napi_struct *napi, int budget) · 42 unmodified lines | ||
| 43 | 43 | if (!self) { |
| 44 | 44 | err = -EINVAL; |
| 45 | 45 | } else { |
| 46 | − for (i = 0U, ring = self->ring[0]; | |
| 47 | − self->tx_rings > i; ++i, ring = self->ring[i]) { | |
| 46 | + for (i = 0U; self->tx_rings > i; ++i) { | |
| 47 | + ring = self->ring[i]; | |
| 48 | 48 | u64_stats_update_begin(&ring[AQ_VEC_RX_ID].stats.rx.syncp); |
| 49 | 49 | ring[AQ_VEC_RX_ID].stats.rx.polls++; |
| 50 | 50 | u64_stats_update_end(&ring[AQ_VEC_RX_ID].stats.rx.syncp); |
| @@ -182,8 +182,8 @@ int aq_vec_init(struct aq_vec_s *self, const struct aq_hw_ops *aq_hw_ops, · 131 unmodified lines | ||
| 182 | 182 | self->aq_hw_ops = aq_hw_ops; |
| 183 | 183 | self->aq_hw = aq_hw; |
| 184 | 184 | |
| 185 | − for (i = 0U, ring = self->ring[0]; | |
| 186 | − self->tx_rings > i; ++i, ring = self->ring[i]) { | |
| 185 | + for (i = 0U; self->tx_rings > i; ++i) { | |
| 186 | + ring = self->ring[i]; | |
| 187 | 187 | err = aq_ring_init(&ring[AQ_VEC_TX_ID], ATL_RING_TX); |
| 188 | 188 | if (err < 0) |
| 189 | 189 | goto err_exit; |
| @@ -224,8 +224,8 @@ int aq_vec_start(struct aq_vec_s *self) · 34 unmodified lines | ||
| 224 | 224 | unsigned int i = 0U; |
| 225 | 225 | int err = 0; |
| 226 | 226 | |
| 227 | − for (i = 0U, ring = self->ring[0]; | |
| 228 | − self->tx_rings > i; ++i, ring = self->ring[i]) { | |
| 227 | + for (i = 0U; self->tx_rings > i; ++i) { | |
| 228 | + ring = self->ring[i]; | |
| 229 | 229 | err = self->aq_hw_ops->hw_ring_tx_start(self->aq_hw, |
| 230 | 230 | &ring[AQ_VEC_TX_ID]); |
| 231 | 231 | if (err < 0) |
| @@ -248,8 +248,8 @@ void aq_vec_stop(struct aq_vec_s *self) · 16 unmodified lines | ||
| 248 | 248 | struct aq_ring_s *ring = NULL; |
| 249 | 249 | unsigned int i = 0U; |
| 250 | 250 | |
| 251 | − for (i = 0U, ring = self->ring[0]; | |
| 252 | − self->tx_rings > i; ++i, ring = self->ring[i]) { | |
| 251 | + for (i = 0U; self->tx_rings > i; ++i) { | |
| 252 | + ring = self->ring[i]; | |
| 253 | 253 | self->aq_hw_ops->hw_ring_tx_stop(self->aq_hw, |
| 254 | 254 | &ring[AQ_VEC_TX_ID]); |
| 255 | 255 | |
| @@ -268,8 +268,8 @@ void aq_vec_deinit(struct aq_vec_s *self) · 12 unmodified lines | ||
| 268 | 268 | if (!self) |
| 269 | 269 | goto err_exit; |
| 270 | 270 | |
| 271 | − for (i = 0U, ring = self->ring[0]; | |
| 272 | − self->tx_rings > i; ++i, ring = self->ring[i]) { | |
| 271 | + for (i = 0U; self->tx_rings > i; ++i) { | |
| 272 | + ring = self->ring[i]; | |
| 273 | 273 | aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]); |
| 274 | 274 | aq_ring_rx_deinit(&ring[AQ_VEC_RX_ID]); |
| 275 | 275 | } |
| @@ -297,8 +297,8 @@ void aq_vec_ring_free(struct aq_vec_s *self) · 21 unmodified lines | ||
| 297 | 297 | if (!self) |
| 298 | 298 | goto err_exit; |
| 299 | 299 | |
| 300 | − for (i = 0U, ring = self->ring[0]; | |
| 301 | − self->tx_rings > i; ++i, ring = self->ring[i]) { | |
| 300 | + for (i = 0U; self->tx_rings > i; ++i) { | |
| 301 | + ring = self->ring[i]; | |
| 302 | 302 | aq_ring_free(&ring[AQ_VEC_TX_ID]); |
| 303 | 303 | if (i < self->rx_rings) |
| 304 | 304 | aq_ring_free(&ring[AQ_VEC_RX_ID]); |
| @@ -14153,10 +14153,6 @@ static int bnx2x_eeh_nic_unload(struct bnx2x *bp) · 14152 unmodified lines | ||
| 14153 | 14153 | |
| 14154 | 14154 | /* Stop Tx */ |
| 14155 | 14155 | bnx2x_tx_disable(bp); |
| 14156 | − /* Delete all NAPI objects */ | |
| 14157 | − bnx2x_del_all_napi(bp); | |
| 14158 | − if (CNIC_LOADED(bp)) | |
| 14159 | − bnx2x_del_all_napi_cnic(bp); | |
| 14160 | 14156 | netdev_reset_tc(bp->dev); |
| 14161 | 14157 | |
| 14162 | 14158 | del_timer_sync(&bp->timer); |
| @@ -14261,6 +14257,11 @@ static pci_ers_result_t bnx2x_io_slot_reset(struct pci_dev *pdev) · 98 unmodified lines | ||
| 14261 | 14257 | bnx2x_drain_tx_queues(bp); |
| 14262 | 14258 | bnx2x_send_unload_req(bp, UNLOAD_RECOVERY); |
| 14263 | 14259 | bnx2x_netif_stop(bp, 1); |
| 14260 | + bnx2x_del_all_napi(bp); | |
| 14261 | + | |
| 14262 | + if (CNIC_LOADED(bp)) | |
| 14263 | + bnx2x_del_all_napi_cnic(bp); | |
| 14264 | + | |
| 14264 | 14265 | bnx2x_free_irq(bp); |
| 14265 | 14266 | |
| 14266 | 14267 | /* Report UNLOAD_DONE to MCP */ |
| @@ -76,7 +76,7 @@ static inline void bcmgenet_writel(u32 value, void __iomem *offset) · 75 unmodified lines | ||
| 76 | 76 | if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) |
| 77 | 77 | __raw_writel(value, offset); |
| 78 | 78 | else |
| 79 | − writel(value, offset); | |
| 79 | + writel_relaxed(value, offset); | |
| 80 | 80 | } |
| 81 | 81 | |
| 82 | 82 | static inline u32 bcmgenet_readl(void __iomem *offset) |
| @@ -84,7 +84,7 @@ static inline u32 bcmgenet_readl(void __iomem *offset) · 1 unmodified line | ||
| 84 | 84 | if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) |
| 85 | 85 | return __raw_readl(offset); |
| 86 | 86 | else |
| 87 | − return readl(offset); | |
| 87 | + return readl_relaxed(offset); | |
| 88 | 88 | } |
| 89 | 89 | |
| 90 | 90 | static inline void dmadesc_set_length_status(struct bcmgenet_priv *priv, |
| @@ -2035,6 +2035,11 @@ static struct sk_buff *bcmgenet_add_tsb(struct net_device *dev, · 1944 unmodified lines | ||
| 2035 | 2035 | return skb; |
| 2036 | 2036 | } |
| 2037 | 2037 | |
| 2038 | +static void bcmgenet_hide_tsb(struct sk_buff *skb) | |
| 2039 | +{ | |
| 2040 | + __skb_pull(skb, sizeof(struct status_64)); | |
| 2041 | +} | |
| 2042 | + | |
| 2038 | 2043 | static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev) |
| 2039 | 2044 | { |
| 2040 | 2045 | struct bcmgenet_priv *priv = netdev_priv(dev); |
| @@ -2141,6 +2146,8 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev) · 100 unmodified lines | ||
| 2141 | 2146 | } |
| 2142 | 2147 | |
| 2143 | 2148 | GENET_CB(skb)->last_cb = tx_cb_ptr; |
| 2149 | + | |
| 2150 | + bcmgenet_hide_tsb(skb); | |
| 2144 | 2151 | skb_tx_timestamp(skb); |
| 2145 | 2152 | |
| 2146 | 2153 | /* Decrement total BD count and advance our write pointer */ |
| @@ -1658,6 +1658,7 @@ static void macb_tx_restart(struct macb_queue *queue) · 1657 unmodified lines | ||
| 1658 | 1658 | unsigned int head = queue->tx_head; |
| 1659 | 1659 | unsigned int tail = queue->tx_tail; |
| 1660 | 1660 | struct macb *bp = queue->bp; |
| 1661 | + unsigned int head_idx, tbqp; | |
| 1661 | 1662 | |
| 1662 | 1663 | if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) |
| 1663 | 1664 | queue_writel(queue, ISR, MACB_BIT(TXUBR)); |
| @@ -1665,6 +1666,13 @@ static void macb_tx_restart(struct macb_queue *queue) · 1 unmodified line | ||
| 1665 | 1666 | if (head == tail) |
| 1666 | 1667 | return; |
| 1667 | 1668 | |
| 1669 | + tbqp = queue_readl(queue, TBQP) / macb_dma_desc_get_size(bp); | |
| 1670 | + tbqp = macb_adj_dma_desc_idx(bp, macb_tx_ring_wrap(bp, tbqp)); | |
| 1671 | + head_idx = macb_adj_dma_desc_idx(bp, macb_tx_ring_wrap(bp, head)); | |
| 1672 | + | |
| 1673 | + if (tbqp == head_idx) | |
| 1674 | + return; | |
| 1675 | + | |
| 1668 | 1676 | macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART)); |
| 1669 | 1677 | } |
| 1670 | 1678 | |
| @@ -1835,11 +1835,6 @@ static int ftgmac100_probe(struct platform_device *pdev) · 1834 unmodified lines | ||
| 1835 | 1835 | priv->rxdes0_edorr_mask = BIT(30); |
| 1836 | 1836 | priv->txdes0_edotr_mask = BIT(30); |
| 1837 | 1837 | priv->is_aspeed = true; |
| 1838 | − /* Disable ast2600 problematic HW arbitration */ | |
| 1839 | − if (of_device_is_compatible(np, "aspeed,ast2600-mac")) { | |
| 1840 | − iowrite32(FTGMAC100_TM_DEFAULT, | |
| 1841 | − priv->base + FTGMAC100_OFFSET_TM); | |
| 1842 | − } | |
| 1843 | 1838 | } else { |
| 1844 | 1839 | priv->rxdes0_edorr_mask = BIT(15); |
| 1845 | 1840 | priv->txdes0_edotr_mask = BIT(15); |
| @@ -1911,6 +1906,11 @@ static int ftgmac100_probe(struct platform_device *pdev) · 65 unmodified lines | ||
| 1911 | 1906 | err = ftgmac100_setup_clk(priv); |
| 1912 | 1907 | if (err) |
| 1913 | 1908 | goto err_phy_connect; |
| 1909 | + | |
| 1910 | + /* Disable ast2600 problematic HW arbitration */ | |
| 1911 | + if (of_device_is_compatible(np, "aspeed,ast2600-mac")) | |
| 1912 | + iowrite32(FTGMAC100_TM_DEFAULT, | |
| 1913 | + priv->base + FTGMAC100_OFFSET_TM); | |
| 1914 | 1914 | } |
| 1915 | 1915 | |
| 1916 | 1916 | /* Default ring sizes */ |
| @@ -489,11 +489,15 @@ static int dpaa_get_ts_info(struct net_device *net_dev, · 488 unmodified lines | ||
| 489 | 489 | info->phc_index = -1; |
| 490 | 490 | |
| 491 | 491 | fman_node = of_get_parent(mac_node); |
| 492 | − if (fman_node) | |
| 492 | + if (fman_node) { | |
| 493 | 493 | ptp_node = of_parse_phandle(fman_node, "ptimer-handle", 0); |
| 494 | + of_node_put(fman_node); | |
| 495 | + } | |
| 494 | 496 | |
| 495 | − if (ptp_node) | |
| 497 | + if (ptp_node) { | |
| 496 | 498 | ptp_dev = of_find_device_by_node(ptp_node); |
| 499 | + of_node_put(ptp_node); | |
| 500 | + } | |
| 497 | 501 | |
| 498 | 502 | if (ptp_dev) |
| 499 | 503 | ptp = platform_get_drvdata(ptp_dev); |
| @@ -297,10 +297,6 @@ int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data) · 296 unmodified lines | ||
| 297 | 297 | if (tc < 0 || tc >= priv->num_tx_rings) |
| 298 | 298 | return -EINVAL; |
| 299 | 299 | |
| 300 | − /* Do not support TXSTART and TX CSUM offload simutaniously */ | |
| 301 | − if (ndev->features & NETIF_F_CSUM_MASK) | |
| 302 | − return -EBUSY; | |
| 303 | − | |
| 304 | 300 | /* TSD and Qbv are mutually exclusive in hardware */ |
| 305 | 301 | if (enetc_rd(&priv->si->hw, ENETC_QBV_PTGCR_OFFSET) & ENETC_QBV_TGE) |
| 306 | 302 | return -EBUSY; |
| @@ -3731,7 +3731,7 @@ static int fec_enet_init_stop_mode(struct fec_enet_private *fep, · 3730 unmodified lines | ||
| 3731 | 3731 | ARRAY_SIZE(out_val)); |
| 3732 | 3732 | if (ret) { |
| 3733 | 3733 | dev_dbg(&fep->pdev->dev, "no stop mode property\n"); |
| 3734 | − return ret; | |
| 3734 | + goto out; | |
| 3735 | 3735 | } |
| 3736 | 3736 | |
| 3737 | 3737 | fep->stop_gpr.gpr = syscon_node_to_regmap(gpr_np); |
| @@ -1065,19 +1065,23 @@ int hns_mac_init(struct dsaf_device *dsaf_dev) · 1064 unmodified lines | ||
| 1065 | 1065 | device_for_each_child_node(dsaf_dev->dev, child) { |
| 1066 | 1066 | ret = fwnode_property_read_u32(child, "reg", &port_id); |
| 1067 | 1067 | if (ret) { |
| 1068 | + fwnode_handle_put(child); | |
| 1068 | 1069 | dev_err(dsaf_dev->dev, |
| 1069 | 1070 | "get reg fail, ret=%d!\n", ret); |
| 1070 | 1071 | return ret; |
| 1071 | 1072 | } |
| 1072 | 1073 | if (port_id >= max_port_num) { |
| 1074 | + fwnode_handle_put(child); | |
| 1073 | 1075 | dev_err(dsaf_dev->dev, |
| 1074 | 1076 | "reg(%u) out of range!\n", port_id); |
| 1075 | 1077 | return -EINVAL; |
| 1076 | 1078 | } |
| 1077 | 1079 | mac_cb = devm_kzalloc(dsaf_dev->dev, sizeof(*mac_cb), |
| 1078 | 1080 | GFP_KERNEL); |
| 1079 | − if (!mac_cb) | |
| 1081 | + if (!mac_cb) { | |
| 1082 | + fwnode_handle_put(child); | |
| 1080 | 1083 | return -ENOMEM; |
| 1084 | + } | |
| 1081 | 1085 | mac_cb->fw_port = child; |
| 1082 | 1086 | mac_cb->mac_id = (u8)port_id; |
| 1083 | 1087 | dsaf_dev->mac_cb[port_id] = mac_cb; |
| @@ -75,7 +75,7 @@ int hclge_comm_tqps_update_stats(struct hnae3_handle *handle, · 74 unmodified lines | ||
| 75 | 75 | ret = hclge_comm_cmd_send(hw, &desc, 1); |
| 76 | 76 | if (ret) { |
| 77 | 77 | dev_err(&hw->cmq.csq.pdev->dev, |
| 78 | − "failed to get tqp stat, ret = %d, tx = %u.\n", | |
| 78 | + "failed to get tqp stat, ret = %d, rx = %u.\n", | |
| 79 | 79 | ret, i); |
| 80 | 80 | return ret; |
| 81 | 81 | } |
| @@ -89,7 +89,7 @@ int hclge_comm_tqps_update_stats(struct hnae3_handle *handle, · 7 unmodified lines | ||
| 89 | 89 | ret = hclge_comm_cmd_send(hw, &desc, 1); |
| 90 | 90 | if (ret) { |
| 91 | 91 | dev_err(&hw->cmq.csq.pdev->dev, |
| 92 | − "failed to get tqp stat, ret = %d, rx = %u.\n", | |
| 92 | + "failed to get tqp stat, ret = %d, tx = %u.\n", | |
| 93 | 93 | ret, i); |
| 94 | 94 | return ret; |
| 95 | 95 | } |
| @@ -562,12 +562,12 @@ static void hns3_dbg_tx_spare_info(struct hns3_enet_ring *ring, char *buf, · 561 unmodified lines | ||
| 562 | 562 | |
| 563 | 563 | for (i = 0; i < ring_num; i++) { |
| 564 | 564 | j = 0; |
| 565 | − sprintf(result[j++], "%8u", i); | |
| 566 | − sprintf(result[j++], "%9u", ring->tx_copybreak); | |
| 567 | − sprintf(result[j++], "%3u", tx_spare->len); | |
| 568 | − sprintf(result[j++], "%3u", tx_spare->next_to_use); | |
| 569 | − sprintf(result[j++], "%3u", tx_spare->next_to_clean); | |
| 570 | − sprintf(result[j++], "%3u", tx_spare->last_to_clean); | |
| 565 | + sprintf(result[j++], "%u", i); | |
| 566 | + sprintf(result[j++], "%u", ring->tx_copybreak); | |
| 567 | + sprintf(result[j++], "%u", tx_spare->len); | |
| 568 | + sprintf(result[j++], "%u", tx_spare->next_to_use); | |
| 569 | + sprintf(result[j++], "%u", tx_spare->next_to_clean); | |
| 570 | + sprintf(result[j++], "%u", tx_spare->last_to_clean); | |
| 571 | 571 | sprintf(result[j++], "%pad", &tx_spare->dma); |
| 572 | 572 | hns3_dbg_fill_content(content, sizeof(content), |
| 573 | 573 | tx_spare_info_items, |
| @@ -598,35 +598,35 @@ static void hns3_dump_rx_queue_info(struct hns3_enet_ring *ring, · 24 unmodified lines | ||
| 598 | 598 | u32 base_add_l, base_add_h; |
| 599 | 599 | u32 j = 0; |
| 600 | 600 | |
| 601 | − sprintf(result[j++], "%8u", index); | |
| 601 | + sprintf(result[j++], "%u", index); | |
| 602 | 602 | |
| 603 | − sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base + | |
| 603 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 604 | 604 | HNS3_RING_RX_RING_BD_NUM_REG)); |
| 605 | 605 | |
| 606 | − sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base + | |
| 606 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 607 | 607 | HNS3_RING_RX_RING_BD_LEN_REG)); |
| 608 | 608 | |
| 609 | − sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base + | |
| 609 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 610 | 610 | HNS3_RING_RX_RING_TAIL_REG)); |
| 611 | 611 | |
| 612 | − sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base + | |
| 612 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 613 | 613 | HNS3_RING_RX_RING_HEAD_REG)); |
| 614 | 614 | |
| 615 | − sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base + | |
| 615 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 616 | 616 | HNS3_RING_RX_RING_FBDNUM_REG)); |
| 617 | 617 | |
| 618 | − sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base + | |
| 618 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 619 | 619 | HNS3_RING_RX_RING_PKTNUM_RECORD_REG)); |
| 620 | − sprintf(result[j++], "%9u", ring->rx_copybreak); | |
| 620 | + sprintf(result[j++], "%u", ring->rx_copybreak); | |
| 621 | 621 | |
| 622 | − sprintf(result[j++], "%7s", readl_relaxed(ring->tqp->io_base + | |
| 622 | + sprintf(result[j++], "%s", readl_relaxed(ring->tqp->io_base + | |
| 623 | 623 | HNS3_RING_EN_REG) ? "on" : "off"); |
| 624 | 624 | |
| 625 | 625 | if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev)) |
| 626 | − sprintf(result[j++], "%10s", readl_relaxed(ring->tqp->io_base + | |
| 626 | + sprintf(result[j++], "%s", readl_relaxed(ring->tqp->io_base + | |
| 627 | 627 | HNS3_RING_RX_EN_REG) ? "on" : "off"); |
| 628 | 628 | else |
| 629 | − sprintf(result[j++], "%10s", "NA"); | |
| 629 | + sprintf(result[j++], "%s", "NA"); | |
| 630 | 630 | |
| 631 | 631 | base_add_h = readl_relaxed(ring->tqp->io_base + |
| 632 | 632 | HNS3_RING_RX_RING_BASEADDR_H_REG); |
| @@ -700,36 +700,36 @@ static void hns3_dump_tx_queue_info(struct hns3_enet_ring *ring, · 67 unmodified lines | ||
| 700 | 700 | u32 base_add_l, base_add_h; |
| 701 | 701 | u32 j = 0; |
| 702 | 702 | |
| 703 | − sprintf(result[j++], "%8u", index); | |
| 704 | − sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base + | |
| 703 | + sprintf(result[j++], "%u", index); | |
| 704 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 705 | 705 | HNS3_RING_TX_RING_BD_NUM_REG)); |
| 706 | 706 | |
| 707 | − sprintf(result[j++], "%2u", readl_relaxed(ring->tqp->io_base + | |
| 707 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 708 | 708 | HNS3_RING_TX_RING_TC_REG)); |
| 709 | 709 | |
| 710 | − sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base + | |
| 710 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 711 | 711 | HNS3_RING_TX_RING_TAIL_REG)); |
| 712 | 712 | |
| 713 | − sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base + | |
| 713 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 714 | 714 | HNS3_RING_TX_RING_HEAD_REG)); |
| 715 | 715 | |
| 716 | − sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base + | |
| 716 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 717 | 717 | HNS3_RING_TX_RING_FBDNUM_REG)); |
| 718 | 718 | |
| 719 | − sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base + | |
| 719 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 720 | 720 | HNS3_RING_TX_RING_OFFSET_REG)); |
| 721 | 721 | |
| 722 | − sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base + | |
| 722 | + sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + | |
| 723 | 723 | HNS3_RING_TX_RING_PKTNUM_RECORD_REG)); |
| 724 | 724 | |
| 725 | − sprintf(result[j++], "%7s", readl_relaxed(ring->tqp->io_base + | |
| 725 | + sprintf(result[j++], "%s", readl_relaxed(ring->tqp->io_base + | |
| 726 | 726 | HNS3_RING_EN_REG) ? "on" : "off"); |
| 727 | 727 | |
| 728 | 728 | if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev)) |
| 729 | − sprintf(result[j++], "%10s", readl_relaxed(ring->tqp->io_base + | |
| 729 | + sprintf(result[j++], "%s", readl_relaxed(ring->tqp->io_base + | |
| 730 | 730 | HNS3_RING_TX_EN_REG) ? "on" : "off"); |
| 731 | 731 | else |
| 732 | − sprintf(result[j++], "%10s", "NA"); | |
| 732 | + sprintf(result[j++], "%s", "NA"); | |
| 733 | 733 | |
| 734 | 734 | base_add_h = readl_relaxed(ring->tqp->io_base + |
| 735 | 735 | HNS3_RING_TX_RING_BASEADDR_H_REG); |
| @@ -848,15 +848,15 @@ static void hns3_dump_rx_bd_info(struct hns3_nic_priv *priv, · 112 unmodified lines | ||
| 848 | 848 | { |
| 849 | 849 | unsigned int j = 0; |
| 850 | 850 | |
| 851 | − sprintf(result[j++], "%5d", idx); | |
| 851 | + sprintf(result[j++], "%d", idx); | |
| 852 | 852 | sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.l234_info)); |
| 853 | − sprintf(result[j++], "%7u", le16_to_cpu(desc->rx.pkt_len)); | |
| 854 | − sprintf(result[j++], "%4u", le16_to_cpu(desc->rx.size)); | |
| 853 | + sprintf(result[j++], "%u", le16_to_cpu(desc->rx.pkt_len)); | |
| 854 | + sprintf(result[j++], "%u", le16_to_cpu(desc->rx.size)); | |
| 855 | 855 | sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.rss_hash)); |
| 856 | − sprintf(result[j++], "%5u", le16_to_cpu(desc->rx.fd_id)); | |
| 857 | − sprintf(result[j++], "%8u", le16_to_cpu(desc->rx.vlan_tag)); | |
| 858 | − sprintf(result[j++], "%15u", le16_to_cpu(desc->rx.o_dm_vlan_id_fb)); | |
| 859 | − sprintf(result[j++], "%11u", le16_to_cpu(desc->rx.ot_vlan_tag)); | |
| 856 | + sprintf(result[j++], "%u", le16_to_cpu(desc->rx.fd_id)); | |
| 857 | + sprintf(result[j++], "%u", le16_to_cpu(desc->rx.vlan_tag)); | |
| 858 | + sprintf(result[j++], "%u", le16_to_cpu(desc->rx.o_dm_vlan_id_fb)); | |
| 859 | + sprintf(result[j++], "%u", le16_to_cpu(desc->rx.ot_vlan_tag)); | |
| 860 | 860 | sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.bd_base_info)); |
| 861 | 861 | if (test_bit(HNS3_NIC_STATE_RXD_ADV_LAYOUT_ENABLE, &priv->state)) { |
| 862 | 862 | u32 ol_info = le32_to_cpu(desc->rx.ol_info); |
| @@ -930,19 +930,19 @@ static void hns3_dump_tx_bd_info(struct hns3_nic_priv *priv, · 67 unmodified lines | ||
| 930 | 930 | { |
| 931 | 931 | unsigned int j = 0; |
| 932 | 932 | |
| 933 | − sprintf(result[j++], "%6d", idx); | |
| 933 | + sprintf(result[j++], "%d", idx); | |
| 934 | 934 | sprintf(result[j++], "%#llx", le64_to_cpu(desc->addr)); |
| 935 | − sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.vlan_tag)); | |
| 936 | − sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.send_size)); | |
| 935 | + sprintf(result[j++], "%u", le16_to_cpu(desc->tx.vlan_tag)); | |
| 936 | + sprintf(result[j++], "%u", le16_to_cpu(desc->tx.send_size)); | |
| 937 | 937 | sprintf(result[j++], "%#x", |
| 938 | 938 | le32_to_cpu(desc->tx.type_cs_vlan_tso_len)); |
| 939 | − sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.outer_vlan_tag)); | |
| 940 | − sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.tv)); | |
| 941 | − sprintf(result[j++], "%10u", | |
| 939 | + sprintf(result[j++], "%u", le16_to_cpu(desc->tx.outer_vlan_tag)); | |
| 940 | + sprintf(result[j++], "%u", le16_to_cpu(desc->tx.tv)); | |
| 941 | + sprintf(result[j++], "%u", | |
| 942 | 942 | le32_to_cpu(desc->tx.ol_type_vlan_len_msec)); |
| 943 | 943 | sprintf(result[j++], "%#x", le32_to_cpu(desc->tx.paylen_ol4cs)); |
| 944 | 944 | sprintf(result[j++], "%#x", le16_to_cpu(desc->tx.bdtp_fe_sc_vld_ra_ri)); |
| 945 | − sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.mss_hw_csum)); | |
| 945 | + sprintf(result[j++], "%u", le16_to_cpu(desc->tx.mss_hw_csum)); | |
| 946 | 946 | } |
| 947 | 947 | |
| 948 | 948 | static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len) |
| @@ -5203,6 +5203,13 @@ static void hns3_state_init(struct hnae3_handle *handle) · 5202 unmodified lines | ||
| 5203 | 5203 | set_bit(HNS3_NIC_STATE_RXD_ADV_LAYOUT_ENABLE, &priv->state); |
| 5204 | 5204 | } |
| 5205 | 5205 | |
| 5206 | +static void hns3_state_uninit(struct hnae3_handle *handle) | |
| 5207 | +{ | |
| 5208 | + struct hns3_nic_priv *priv = handle->priv; | |
| 5209 | + | |
| 5210 | + clear_bit(HNS3_NIC_STATE_INITED, &priv->state); | |
| 5211 | +} | |
| 5212 | + | |
| 5206 | 5213 | static int hns3_client_init(struct hnae3_handle *handle) |
| 5207 | 5214 | { |
| 5208 | 5215 | struct pci_dev *pdev = handle->pdev; |
| @@ -5320,7 +5327,9 @@ static int hns3_client_init(struct hnae3_handle *handle) · 111 unmodified lines | ||
| 5320 | 5327 | return ret; |
| 5321 | 5328 | |
| 5322 | 5329 | out_reg_netdev_fail: |
| 5330 | + hns3_state_uninit(handle); | |
| 5323 | 5331 | hns3_dbg_uninit(handle); |
| 5332 | + hns3_client_stop(handle); | |
| 5324 | 5333 | out_client_start: |
| 5325 | 5334 | hns3_free_rx_cpu_rmap(netdev); |
| 5326 | 5335 | hns3_nic_uninit_irq(priv); |
| @@ -94,6 +94,13 @@ static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len, · 93 unmodified lines | ||
| 94 | 94 | enum hclge_comm_cmd_status status; |
| 95 | 95 | struct hclge_desc desc; |
| 96 | 96 | |
| 97 | + if (msg_len > HCLGE_MBX_MAX_MSG_SIZE) { | |
| 98 | + dev_err(&hdev->pdev->dev, | |
| 99 | + "msg data length(=%u) exceeds maximum(=%u)\n", | |
| 100 | + msg_len, HCLGE_MBX_MAX_MSG_SIZE); | |
| 101 | + return -EMSGSIZE; | |
| 102 | + } | |
| 103 | + | |
| 97 | 104 | resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data; |
| 98 | 105 | |
| 99 | 106 | hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false); |
| @@ -176,7 +183,7 @@ static int hclge_get_ring_chain_from_mbx( · 76 unmodified lines | ||
| 176 | 183 | ring_num = req->msg.ring_num; |
| 177 | 184 | |
| 178 | 185 | if (ring_num > HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM) |
| 179 | − return -ENOMEM; | |
| 186 | + return -EINVAL; | |
| 180 | 187 | |
| 181 | 188 | for (i = 0; i < ring_num; i++) { |
| 182 | 189 | if (req->msg.param[i].tqp_index >= vport->nic.kinfo.rss_size) { |
| @@ -587,9 +594,9 @@ static int hclge_set_vf_mtu(struct hclge_vport *vport, · 404 unmodified lines | ||
| 587 | 594 | return hclge_set_vport_mtu(vport, mtu); |
| 588 | 595 | } |
| 589 | 596 | |
| 590 | −static void hclge_get_queue_id_in_pf(struct hclge_vport *vport, | |
| 591 | − struct hclge_mbx_vf_to_pf_cmd *mbx_req, | |
| 592 | − struct hclge_respond_to_vf_msg *resp_msg) | |
| 597 | +static int hclge_get_queue_id_in_pf(struct hclge_vport *vport, | |
| 598 | + struct hclge_mbx_vf_to_pf_cmd *mbx_req, | |
| 599 | + struct hclge_respond_to_vf_msg *resp_msg) | |
| 593 | 600 | { |
| 594 | 601 | struct hnae3_handle *handle = &vport->nic; |
| 595 | 602 | struct hclge_dev *hdev = vport->back; |
| @@ -599,17 +606,18 @@ static void hclge_get_queue_id_in_pf(struct hclge_vport *vport, · 3 unmodified lines | ||
| 599 | 606 | if (queue_id >= handle->kinfo.num_tqps) { |
| 600 | 607 | dev_err(&hdev->pdev->dev, "Invalid queue id(%u) from VF %u\n", |
| 601 | 608 | queue_id, mbx_req->mbx_src_vfid); |
| 602 | − return; | |
| 609 | + return -EINVAL; | |
| 603 | 610 | } |
| 604 | 611 | |
| 605 | 612 | qid_in_pf = hclge_covert_handle_qid_global(&vport->nic, queue_id); |
| 606 | 613 | memcpy(resp_msg->data, &qid_in_pf, sizeof(qid_in_pf)); |
| 607 | 614 | resp_msg->len = sizeof(qid_in_pf); |
| 615 | + return 0; | |
| 608 | 616 | } |
| 609 | 617 | |
| 610 | −static void hclge_get_rss_key(struct hclge_vport *vport, | |
| 611 | − struct hclge_mbx_vf_to_pf_cmd *mbx_req, | |
| 612 | − struct hclge_respond_to_vf_msg *resp_msg) | |
| 618 | +static int hclge_get_rss_key(struct hclge_vport *vport, | |
| 619 | + struct hclge_mbx_vf_to_pf_cmd *mbx_req, | |
| 620 | + struct hclge_respond_to_vf_msg *resp_msg) | |
| 613 | 621 | { |
| 614 | 622 | #define HCLGE_RSS_MBX_RESP_LEN 8 |
| 615 | 623 | struct hclge_dev *hdev = vport->back; |
| @@ -627,13 +635,14 @@ static void hclge_get_rss_key(struct hclge_vport *vport, · 11 unmodified lines | ||
| 627 | 635 | dev_warn(&hdev->pdev->dev, |
| 628 | 636 | "failed to get the rss hash key, the index(%u) invalid !\n", |
| 629 | 637 | index); |
| 630 | − return; | |
| 638 | + return -EINVAL; | |
| 631 | 639 | } |
| 632 | 640 | |
| 633 | 641 | memcpy(resp_msg->data, |
| 634 | 642 | &rss_cfg->rss_hash_key[index * HCLGE_RSS_MBX_RESP_LEN], |
| 635 | 643 | HCLGE_RSS_MBX_RESP_LEN); |
| 636 | 644 | resp_msg->len = HCLGE_RSS_MBX_RESP_LEN; |
| 645 | + return 0; | |
| 637 | 646 | } |
| 638 | 647 | |
| 639 | 648 | static void hclge_link_fail_parse(struct hclge_dev *hdev, u8 link_fail_code) |
| @@ -809,10 +818,10 @@ void hclge_mbx_handler(struct hclge_dev *hdev) · 169 unmodified lines | ||
| 809 | 818 | "VF fail(%d) to set mtu\n", ret); |
| 810 | 819 | break; |
| 811 | 820 | case HCLGE_MBX_GET_QID_IN_PF: |
| 812 | − hclge_get_queue_id_in_pf(vport, req, &resp_msg); | |
| 821 | + ret = hclge_get_queue_id_in_pf(vport, req, &resp_msg); | |
| 813 | 822 | break; |
| 814 | 823 | case HCLGE_MBX_GET_RSS_KEY: |
| 815 | − hclge_get_rss_key(vport, req, &resp_msg); | |
| 824 | + ret = hclge_get_rss_key(vport, req, &resp_msg); | |
| 816 | 825 | break; |
| 817 | 826 | case HCLGE_MBX_GET_LINK_MODE: |
| 818 | 827 | hclge_get_link_mode(vport, req); |
| @@ -3210,13 +3210,8 @@ static void ibmvnic_get_ringparam(struct net_device *netdev, · 3209 unmodified lines | ||
| 3210 | 3210 | { |
| 3211 | 3211 | struct ibmvnic_adapter *adapter = netdev_priv(netdev); |
| 3212 | 3212 | |
| 3213 | − if (adapter->priv_flags & IBMVNIC_USE_SERVER_MAXES) { | |
| 3214 | − ring->rx_max_pending = adapter->max_rx_add_entries_per_subcrq; | |
| 3215 | − ring->tx_max_pending = adapter->max_tx_entries_per_subcrq; | |
| 3216 | − } else { | |
| 3217 | − ring->rx_max_pending = IBMVNIC_MAX_QUEUE_SZ; | |
| 3218 | − ring->tx_max_pending = IBMVNIC_MAX_QUEUE_SZ; | |
| 3219 | − } | |
| 3213 | + ring->rx_max_pending = adapter->max_rx_add_entries_per_subcrq; | |
| 3214 | + ring->tx_max_pending = adapter->max_tx_entries_per_subcrq; | |
| 3220 | 3215 | ring->rx_mini_max_pending = 0; |
| 3221 | 3216 | ring->rx_jumbo_max_pending = 0; |
| 3222 | 3217 | ring->rx_pending = adapter->req_rx_add_entries_per_subcrq; |
| @@ -3231,23 +3226,21 @@ static int ibmvnic_set_ringparam(struct net_device *netdev, · 8 unmodified lines | ||
| 3231 | 3226 | struct netlink_ext_ack *extack) |
| 3232 | 3227 | { |
| 3233 | 3228 | struct ibmvnic_adapter *adapter = netdev_priv(netdev); |
| 3234 | − int ret; | |
| 3235 | 3229 | |
| 3236 | − ret = 0; | |
| 3230 | + if (ring->rx_pending > adapter->max_rx_add_entries_per_subcrq || | |
| 3231 | + ring->tx_pending > adapter->max_tx_entries_per_subcrq) { | |
| 3232 | + netdev_err(netdev, "Invalid request.\n"); | |
| 3233 | + netdev_err(netdev, "Max tx buffers = %llu\n", | |
| 3234 | + adapter->max_rx_add_entries_per_subcrq); | |
| 3235 | + netdev_err(netdev, "Max rx buffers = %llu\n", | |
| 3236 | + adapter->max_tx_entries_per_subcrq); | |
| 3237 | + return -EINVAL; | |
| 3238 | + } | |
| 3239 | + | |
| 3237 | 3240 | adapter->desired.rx_entries = ring->rx_pending; |
| 3238 | 3241 | adapter->desired.tx_entries = ring->tx_pending; |
| 3239 | 3242 | |
| 3240 | − ret = wait_for_reset(adapter); | |
| 3241 | − | |
| 3242 | − if (!ret && | |
| 3243 | − (adapter->req_rx_add_entries_per_subcrq != ring->rx_pending || | |
| 3244 | − adapter->req_tx_entries_per_subcrq != ring->tx_pending)) | |
| 3245 | − netdev_info(netdev, | |
| 3246 | − "Could not match full ringsize request. Requested: RX %d, TX %d; Allowed: RX %llu, TX %llu\n", | |
| 3247 | − ring->rx_pending, ring->tx_pending, | |
| 3248 | − adapter->req_rx_add_entries_per_subcrq, | |
| 3249 | − adapter->req_tx_entries_per_subcrq); | |
| 3250 | − return ret; | |
| 3243 | + return wait_for_reset(adapter); | |
| 3251 | 3244 | } |
| 3252 | 3245 | |
| 3253 | 3246 | static void ibmvnic_get_channels(struct net_device *netdev, |
| @@ -3255,14 +3248,8 @@ static void ibmvnic_get_channels(struct net_device *netdev, · 1 unmodified line | ||
| 3255 | 3248 | { |
| 3256 | 3249 | struct ibmvnic_adapter *adapter = netdev_priv(netdev); |
| 3257 | 3250 | |
| 3258 | − if (adapter->priv_flags & IBMVNIC_USE_SERVER_MAXES) { | |
| 3259 | − channels->max_rx = adapter->max_rx_queues; | |
| 3260 | − channels->max_tx = adapter->max_tx_queues; | |
| 3261 | − } else { | |
| 3262 | − channels->max_rx = IBMVNIC_MAX_QUEUES; | |
| 3263 | − channels->max_tx = IBMVNIC_MAX_QUEUES; | |
| 3264 | − } | |
| 3265 | − | |
| 3251 | + channels->max_rx = adapter->max_rx_queues; | |
| 3252 | + channels->max_tx = adapter->max_tx_queues; | |
| 3266 | 3253 | channels->max_other = 0; |
| 3267 | 3254 | channels->max_combined = 0; |
| 3268 | 3255 | channels->rx_count = adapter->req_rx_queues; |
| @@ -3275,22 +3262,11 @@ static int ibmvnic_set_channels(struct net_device *netdev, · 6 unmodified lines | ||
| 3275 | 3262 | struct ethtool_channels *channels) |
| 3276 | 3263 | { |
| 3277 | 3264 | struct ibmvnic_adapter *adapter = netdev_priv(netdev); |
| 3278 | − int ret; | |
| 3279 | 3265 | |
| 3280 | − ret = 0; | |
| 3281 | 3266 | adapter->desired.rx_queues = channels->rx_count; |
| 3282 | 3267 | adapter->desired.tx_queues = channels->tx_count; |
| 3283 | 3268 | |
| 3284 | − ret = wait_for_reset(adapter); | |
| 3285 | − | |
| 3286 | − if (!ret && | |
| 3287 | − (adapter->req_rx_queues != channels->rx_count || | |
| 3288 | − adapter->req_tx_queues != channels->tx_count)) | |
| 3289 | − netdev_info(netdev, | |
| 3290 | − "Could not match full channels request. Requested: RX %d, TX %d; Allowed: RX %llu, TX %llu\n", | |
| 3291 | − channels->rx_count, channels->tx_count, | |
| 3292 | − adapter->req_rx_queues, adapter->req_tx_queues); | |
| 3293 | − return ret; | |
| 3269 | + return wait_for_reset(adapter); | |
| 3294 | 3270 | } |
| 3295 | 3271 | |
| 3296 | 3272 | static void ibmvnic_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
| @@ -3298,43 +3274,32 @@ static void ibmvnic_get_strings(struct net_device *dev, u32 stringset, u8 *data) · 1 unmodified line | ||
| 3298 | 3274 | struct ibmvnic_adapter *adapter = netdev_priv(dev); |
| 3299 | 3275 | int i; |
| 3300 | 3276 | |
| 3301 | − switch (stringset) { | |
| 3302 | − case ETH_SS_STATS: | |
| 3303 | − for (i = 0; i < ARRAY_SIZE(ibmvnic_stats); | |
| 3304 | − i++, data += ETH_GSTRING_LEN) | |
| 3305 | − memcpy(data, ibmvnic_stats[i].name, ETH_GSTRING_LEN); | |
| 3277 | + if (stringset != ETH_SS_STATS) | |
| 3278 | + return; | |
| 3306 | 3279 | |
| 3307 | − for (i = 0; i < adapter->req_tx_queues; i++) { | |
| 3308 | − snprintf(data, ETH_GSTRING_LEN, "tx%d_packets", i); | |
| 3309 | − data += ETH_GSTRING_LEN; | |
| 3280 | + for (i = 0; i < ARRAY_SIZE(ibmvnic_stats); i++, data += ETH_GSTRING_LEN) | |
| 3281 | + memcpy(data, ibmvnic_stats[i].name, ETH_GSTRING_LEN); | |
| 3310 | 3282 | |
| 3311 | − snprintf(data, ETH_GSTRING_LEN, "tx%d_bytes", i); | |
| 3312 | − data += ETH_GSTRING_LEN; | |
| 3283 | + for (i = 0; i < adapter->req_tx_queues; i++) { | |
| 3284 | + snprintf(data, ETH_GSTRING_LEN, "tx%d_packets", i); | |
| 3285 | + data += ETH_GSTRING_LEN; | |
| 3313 | 3286 | |
| 3314 | − snprintf(data, ETH_GSTRING_LEN, | |
| 3315 | − "tx%d_dropped_packets", i); | |
| 3316 | − data += ETH_GSTRING_LEN; | |
| 3317 | − } | |
| 3287 | + snprintf(data, ETH_GSTRING_LEN, "tx%d_bytes", i); | |
| 3288 | + data += ETH_GSTRING_LEN; | |
| 3318 | 3289 | |
| 3319 | − for (i = 0; i < adapter->req_rx_queues; i++) { | |
| 3320 | − snprintf(data, ETH_GSTRING_LEN, "rx%d_packets", i); | |
| 3321 | − data += ETH_GSTRING_LEN; | |
| 3290 | + snprintf(data, ETH_GSTRING_LEN, "tx%d_dropped_packets", i); | |
| 3291 | + data += ETH_GSTRING_LEN; | |
| 3292 | + } | |
| 3322 | 3293 | |
| 3323 | − snprintf(data, ETH_GSTRING_LEN, "rx%d_bytes", i); | |
| 3324 | − data += ETH_GSTRING_LEN; | |
| 3294 | + for (i = 0; i < adapter->req_rx_queues; i++) { | |
| 3295 | + snprintf(data, ETH_GSTRING_LEN, "rx%d_packets", i); | |
| 3296 | + data += ETH_GSTRING_LEN; | |
| 3325 | 3297 | |
| 3326 | − snprintf(data, ETH_GSTRING_LEN, "rx%d_interrupts", i); | |
| 3327 | − data += ETH_GSTRING_LEN; | |
| 3328 | − } | |
| 3329 | − break; | |
| 3298 | + snprintf(data, ETH_GSTRING_LEN, "rx%d_bytes", i); | |
| 3299 | + data += ETH_GSTRING_LEN; | |
| 3330 | 3300 | |
| 3331 | − case ETH_SS_PRIV_FLAGS: | |
| 3332 | − for (i = 0; i < ARRAY_SIZE(ibmvnic_priv_flags); i++) | |
| 3333 | − strcpy(data + i * ETH_GSTRING_LEN, | |
| 3334 | − ibmvnic_priv_flags[i]); | |
| 3335 | − break; | |
| 3336 | − default: | |
| 3337 | − return; | |
| 3301 | + snprintf(data, ETH_GSTRING_LEN, "rx%d_interrupts", i); | |
| 3302 | + data += ETH_GSTRING_LEN; | |
| 3338 | 3303 | } |
| 3339 | 3304 | } |
| 3340 | 3305 | |
| @@ -3347,8 +3312,6 @@ static int ibmvnic_get_sset_count(struct net_device *dev, int sset) · 6 unmodified lines | ||
| 3347 | 3312 | return ARRAY_SIZE(ibmvnic_stats) + |
| 3348 | 3313 | adapter->req_tx_queues * NUM_TX_STATS + |
| 3349 | 3314 | adapter->req_rx_queues * NUM_RX_STATS; |
| 3350 | − case ETH_SS_PRIV_FLAGS: | |
| 3351 | − return ARRAY_SIZE(ibmvnic_priv_flags); | |
| 3352 | 3315 | default: |
| 3353 | 3316 | return -EOPNOTSUPP; |
| 3354 | 3317 | } |
| @@ -3401,26 +3364,6 @@ static void ibmvnic_get_ethtool_stats(struct net_device *dev, · 46 unmodified lines | ||
| 3401 | 3364 | } |
| 3402 | 3365 | } |
| 3403 | 3366 | |
| 3404 | −static u32 ibmvnic_get_priv_flags(struct net_device *netdev) | |
| 3405 | −{ | |
| 3406 | − struct ibmvnic_adapter *adapter = netdev_priv(netdev); | |
| 3407 | − | |
| 3408 | − return adapter->priv_flags; | |
| 3409 | −} | |
| 3410 | − | |
| 3411 | −static int ibmvnic_set_priv_flags(struct net_device *netdev, u32 flags) | |
| 3412 | −{ | |
| 3413 | − struct ibmvnic_adapter *adapter = netdev_priv(netdev); | |
| 3414 | − bool which_maxes = !!(flags & IBMVNIC_USE_SERVER_MAXES); | |
| 3415 | − | |
| 3416 | − if (which_maxes) | |
| 3417 | − adapter->priv_flags |= IBMVNIC_USE_SERVER_MAXES; | |
| 3418 | − else | |
| 3419 | − adapter->priv_flags &= ~IBMVNIC_USE_SERVER_MAXES; | |
| 3420 | − | |
| 3421 | − return 0; | |
| 3422 | −} | |
| 3423 | − | |
| 3424 | 3367 | static const struct ethtool_ops ibmvnic_ethtool_ops = { |
| 3425 | 3368 | .get_drvinfo = ibmvnic_get_drvinfo, |
| 3426 | 3369 | .get_msglevel = ibmvnic_get_msglevel, |
| @@ -3434,8 +3377,6 @@ static const struct ethtool_ops ibmvnic_ethtool_ops = { · 7 unmodified lines | ||
| 3434 | 3377 | .get_sset_count = ibmvnic_get_sset_count, |
| 3435 | 3378 | .get_ethtool_stats = ibmvnic_get_ethtool_stats, |
| 3436 | 3379 | .get_link_ksettings = ibmvnic_get_link_ksettings, |
| 3437 | − .get_priv_flags = ibmvnic_get_priv_flags, | |
| 3438 | − .set_priv_flags = ibmvnic_set_priv_flags, | |
| 3439 | 3380 | }; |
| 3440 | 3381 | |
| 3441 | 3382 | /* Routines for managing CRQs/sCRQs */ |
| @@ -41,11 +41,6 @@ · 40 unmodified lines | ||
| 41 | 41 | |
| 42 | 42 | #define IBMVNIC_RESET_DELAY 100 |
| 43 | 43 | |
| 44 | −static const char ibmvnic_priv_flags[][ETH_GSTRING_LEN] = { | |
| 45 | −#define IBMVNIC_USE_SERVER_MAXES 0x1 | |
| 46 | − "use-server-maxes" | |
| 47 | −}; | |
| 48 | − | |
| 49 | 44 | struct ibmvnic_login_buffer { |
| 50 | 45 | __be32 len; |
| 51 | 46 | __be32 version; |
| @@ -883,7 +878,6 @@ struct ibmvnic_adapter { · 831 unmodified lines | ||
| 883 | 878 | struct ibmvnic_control_ip_offload_buffer ip_offload_ctrl; |
| 884 | 879 | dma_addr_t ip_offload_ctrl_tok; |
| 885 | 880 | u32 msg_enable; |
| 886 | − u32 priv_flags; | |
| 887 | 881 | |
| 888 | 882 | /* Vital Product Data (VPD) */ |
| 889 | 883 | struct ibmvnic_vpd *vpd; |
| @@ -1009,8 +1009,8 @@ static s32 e1000_platform_pm_pch_lpt(struct e1000_hw *hw, bool link) · 1008 unmodified lines | ||
| 1009 | 1009 | { |
| 1010 | 1010 | u32 reg = link << (E1000_LTRV_REQ_SHIFT + E1000_LTRV_NOSNOOP_SHIFT) | |
| 1011 | 1011 | link << E1000_LTRV_REQ_SHIFT | E1000_LTRV_SEND; |
| 1012 | − u16 max_ltr_enc_d = 0; /* maximum LTR decoded by platform */ | |
| 1013 | − u16 lat_enc_d = 0; /* latency decoded */ | |
| 1012 | + u32 max_ltr_enc_d = 0; /* maximum LTR decoded by platform */ | |
| 1013 | + u32 lat_enc_d = 0; /* latency decoded */ | |
| 1014 | 1014 | u16 lat_enc = 0; /* latency encoded */ |
| 1015 | 1015 | |
| 1016 | 1016 | if (link) { |
| @@ -2871,7 +2871,6 @@ continue_reset: · 2870 unmodified lines | ||
| 2871 | 2871 | running = adapter->state == __IAVF_RUNNING; |
| 2872 | 2872 | |
| 2873 | 2873 | if (running) { |
| 2874 | − netdev->flags &= ~IFF_UP; | |
| 2875 | 2874 | netif_carrier_off(netdev); |
| 2876 | 2875 | netif_tx_stop_all_queues(netdev); |
| 2877 | 2876 | adapter->link_up = false; |
| @@ -2988,7 +2987,7 @@ continue_reset: · 110 unmodified lines | ||
| 2988 | 2987 | * to __IAVF_RUNNING |
| 2989 | 2988 | */ |
| 2990 | 2989 | iavf_up_complete(adapter); |
| 2991 | − netdev->flags |= IFF_UP; | |
| 2990 | + | |
| 2992 | 2991 | iavf_irq_enable(adapter, true); |
| 2993 | 2992 | } else { |
| 2994 | 2993 | iavf_change_state(adapter, __IAVF_DOWN); |
| @@ -3004,10 +3003,8 @@ continue_reset: · 9 unmodified lines | ||
| 3004 | 3003 | reset_err: |
| 3005 | 3004 | mutex_unlock(&adapter->client_lock); |
| 3006 | 3005 | mutex_unlock(&adapter->crit_lock); |
| 3007 | − if (running) { | |
| 3006 | + if (running) | |
| 3008 | 3007 | iavf_change_state(adapter, __IAVF_RUNNING); |
| 3009 | − netdev->flags |= IFF_UP; | |
| 3010 | − } | |
| 3011 | 3008 | dev_err(&adapter->pdev->dev, "failed to allocate resources during reinit\n"); |
| 3012 | 3009 | iavf_close(netdev); |
| 3013 | 3010 | } |
| @@ -577,7 +577,7 @@ void ice_free_cpu_rx_rmap(struct ice_vsi *vsi) · 576 unmodified lines | ||
| 577 | 577 | { |
| 578 | 578 | struct net_device *netdev; |
| 579 | 579 | |
| 580 | − if (!vsi || vsi->type != ICE_VSI_PF || !vsi->arfs_fltr_list) | |
| 580 | + if (!vsi || vsi->type != ICE_VSI_PF) | |
| 581 | 581 | return; |
| 582 | 582 | |
| 583 | 583 | netdev = vsi->netdev; |
| @@ -599,7 +599,7 @@ int ice_set_cpu_rx_rmap(struct ice_vsi *vsi) · 15 unmodified lines | ||
| 599 | 599 | int base_idx, i; |
| 600 | 600 | |
| 601 | 601 | if (!vsi || vsi->type != ICE_VSI_PF) |
| 602 | − return -EINVAL; | |
| 602 | + return 0; | |
| 603 | 603 | |
| 604 | 604 | pf = vsi->back; |
| 605 | 605 | netdev = vsi->netdev; |
| @@ -636,7 +636,6 @@ void ice_remove_arfs(struct ice_pf *pf) · 30 unmodified lines | ||
| 636 | 636 | if (!pf_vsi) |
| 637 | 637 | return; |
| 638 | 638 | |
| 639 | − ice_free_cpu_rx_rmap(pf_vsi); | |
| 640 | 639 | ice_clear_arfs(pf_vsi); |
| 641 | 640 | } |
| 642 | 641 | |
| @@ -653,9 +652,5 @@ void ice_rebuild_arfs(struct ice_pf *pf) · 10 unmodified lines | ||
| 653 | 652 | return; |
| 654 | 653 | |
| 655 | 654 | ice_remove_arfs(pf); |
| 656 | − if (ice_set_cpu_rx_rmap(pf_vsi)) { | |
| 657 | − dev_err(ice_pf_to_dev(pf), "Failed to rebuild aRFS\n"); | |
| 658 | − return; | |
| 659 | − } | |
| 660 | 655 | ice_init_arfs(pf_vsi); |
| 661 | 656 | } |
| @@ -361,7 +361,8 @@ ice_eswitch_port_start_xmit(struct sk_buff *skb, struct net_device *netdev) · 360 unmodified lines | ||
| 361 | 361 | np = netdev_priv(netdev); |
| 362 | 362 | vsi = np->vsi; |
| 363 | 363 | |
| 364 | − if (ice_is_reset_in_progress(vsi->back->state)) | |
| 364 | + if (ice_is_reset_in_progress(vsi->back->state) || | |
| 365 | + test_bit(ICE_VF_DIS, vsi->back->state)) | |
| 365 | 366 | return NETDEV_TX_BUSY; |
| 366 | 367 | |
| 367 | 368 | repr = ice_netdev_to_repr(netdev); |
| @@ -52,7 +52,7 @@ static inline void ice_eswitch_update_repr(struct ice_vsi *vsi) { } · 51 unmodified lines | ||
| 52 | 52 | |
| 53 | 53 | static inline int ice_eswitch_configure(struct ice_pf *pf) |
| 54 | 54 | { |
| 55 | − return -EOPNOTSUPP; | |
| 55 | + return 0; | |
| 56 | 56 | } |
| 57 | 57 | |
| 58 | 58 | static inline int ice_eswitch_rebuild(struct ice_pf *pf) |
| @@ -2689,6 +2689,8 @@ void ice_vsi_free_irq(struct ice_vsi *vsi) · 2688 unmodified lines | ||
| 2689 | 2689 | return; |
| 2690 | 2690 | |
| 2691 | 2691 | vsi->irqs_ready = false; |
| 2692 | + ice_free_cpu_rx_rmap(vsi); | |
| 2693 | + | |
| 2692 | 2694 | ice_for_each_q_vector(vsi, i) { |
| 2693 | 2695 | u16 vector = i + base; |
| 2694 | 2696 | int irq_num; |
| @@ -2702,7 +2704,8 @@ void ice_vsi_free_irq(struct ice_vsi *vsi) · 7 unmodified lines | ||
| 2702 | 2704 | continue; |
| 2703 | 2705 | |
| 2704 | 2706 | /* clear the affinity notifier in the IRQ descriptor */ |
| 2705 | − irq_set_affinity_notifier(irq_num, NULL); | |
| 2707 | + if (!IS_ENABLED(CONFIG_RFS_ACCEL)) | |
| 2708 | + irq_set_affinity_notifier(irq_num, NULL); | |
| 2706 | 2709 | |
| 2707 | 2710 | /* clear the affinity_mask in the IRQ descriptor */ |
| 2708 | 2711 | irq_set_affinity_hint(irq_num, NULL); |
| @@ -2510,6 +2510,13 @@ static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename) · 2509 unmodified lines | ||
| 2510 | 2510 | irq_set_affinity_hint(irq_num, &q_vector->affinity_mask); |
| 2511 | 2511 | } |
| 2512 | 2512 | |
| 2513 | + err = ice_set_cpu_rx_rmap(vsi); | |
| 2514 | + if (err) { | |
| 2515 | + netdev_err(vsi->netdev, "Failed to setup CPU RMAP on VSI %u: %pe\n", | |
| 2516 | + vsi->vsi_num, ERR_PTR(err)); | |
| 2517 | + goto free_q_irqs; | |
| 2518 | + } | |
| 2519 | + | |
| 2513 | 2520 | vsi->irqs_ready = true; |
| 2514 | 2521 | return 0; |
| 2515 | 2522 | |
| @@ -3692,20 +3699,12 @@ static int ice_setup_pf_sw(struct ice_pf *pf) · 1176 unmodified lines | ||
| 3692 | 3699 | */ |
| 3693 | 3700 | ice_napi_add(vsi); |
| 3694 | 3701 | |
| 3695 | − status = ice_set_cpu_rx_rmap(vsi); | |
| 3696 | − if (status) { | |
| 3697 | − dev_err(dev, "Failed to set CPU Rx map VSI %d error %d\n", | |
| 3698 | − vsi->vsi_num, status); | |
| 3699 | − goto unroll_napi_add; | |
| 3700 | − } | |
| 3701 | 3702 | status = ice_init_mac_fltr(pf); |
| 3702 | 3703 | if (status) |
| 3703 | − goto free_cpu_rx_map; | |
| 3704 | + goto unroll_napi_add; | |
| 3704 | 3705 | |
| 3705 | 3706 | return 0; |
| 3706 | 3707 | |
| 3707 | −free_cpu_rx_map: | |
| 3708 | − ice_free_cpu_rx_rmap(vsi); | |
| 3709 | 3708 | unroll_napi_add: |
| 3710 | 3709 | ice_tc_indir_block_unregister(vsi); |
| 3711 | 3710 | unroll_cfg_netdev: |
| @@ -5167,7 +5166,6 @@ static int __maybe_unused ice_suspend(struct device *dev) · 1455 unmodified lines | ||
| 5167 | 5166 | continue; |
| 5168 | 5167 | ice_vsi_free_q_vectors(pf->vsi[v]); |
| 5169 | 5168 | } |
| 5170 | − ice_free_cpu_rx_rmap(ice_get_main_vsi(pf)); | |
| 5171 | 5169 | ice_clear_interrupt_scheme(pf); |
| 5172 | 5170 | |
| 5173 | 5171 | pci_save_state(pdev); |
| @@ -6931,12 +6929,15 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) · 1757 unmodified lines | ||
| 6931 | 6929 | |
| 6932 | 6930 | dev_dbg(dev, "rebuilding PF after reset_type=%d\n", reset_type); |
| 6933 | 6931 | |
| 6932 | +#define ICE_EMP_RESET_SLEEP_MS 5000 | |
| 6934 | 6933 | if (reset_type == ICE_RESET_EMPR) { |
| 6935 | 6934 | /* If an EMP reset has occurred, any previously pending flash |
| 6936 | 6935 | * update will have completed. We no longer know whether or |
| 6937 | 6936 | * not the NVM update EMP reset is restricted. |
| 6938 | 6937 | */ |
| 6939 | 6938 | pf->fw_emp_reset_disabled = false; |
| 6939 | + | |
| 6940 | + msleep(ICE_EMP_RESET_SLEEP_MS); | |
| 6940 | 6941 | } |
| 6941 | 6942 | |
| 6942 | 6943 | err = ice_init_all_ctrlq(hw); |
| @@ -641,6 +641,7 @@ ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank, · 640 unmodified lines | ||
| 641 | 641 | status = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR, 0, |
| 642 | 642 | orom_data, hw->flash.banks.orom_size); |
| 643 | 643 | if (status) { |
| 644 | + vfree(orom_data); | |
| 644 | 645 | ice_debug(hw, ICE_DBG_NVM, "Unable to read Option ROM data\n"); |
| 645 | 646 | return status; |
| 646 | 647 | } |
| @@ -1046,8 +1046,8 @@ int ice_sriov_configure(struct pci_dev *pdev, int num_vfs) · 1045 unmodified lines | ||
| 1046 | 1046 | |
| 1047 | 1047 | if (!num_vfs) { |
| 1048 | 1048 | if (!pci_vfs_assigned(pdev)) { |
| 1049 | − ice_mbx_deinit_snapshot(&pf->hw); | |
| 1050 | 1049 | ice_free_vfs(pf); |
| 1050 | + ice_mbx_deinit_snapshot(&pf->hw); | |
| 1051 | 1051 | if (pf->lag) |
| 1052 | 1052 | ice_enable_lag(pf->lag); |
| 1053 | 1053 | return 0; |
| @@ -3625,6 +3625,8 @@ void ice_vc_process_vf_msg(struct ice_pf *pf, struct ice_rq_event_info *event) · 3624 unmodified lines | ||
| 3625 | 3625 | return; |
| 3626 | 3626 | } |
| 3627 | 3627 | |
| 3628 | + mutex_lock(&vf->cfg_lock); | |
| 3629 | + | |
| 3628 | 3630 | /* Check if VF is disabled. */ |
| 3629 | 3631 | if (test_bit(ICE_VF_STATE_DIS, vf->vf_states)) { |
| 3630 | 3632 | err = -EPERM; |
| @@ -3642,32 +3644,20 @@ void ice_vc_process_vf_msg(struct ice_pf *pf, struct ice_rq_event_info *event) · 11 unmodified lines | ||
| 3642 | 3644 | err = -EINVAL; |
| 3643 | 3645 | } |
| 3644 | 3646 | |
| 3645 | − if (!ice_vc_is_opcode_allowed(vf, v_opcode)) { | |
| 3646 | − ice_vc_send_msg_to_vf(vf, v_opcode, | |
| 3647 | − VIRTCHNL_STATUS_ERR_NOT_SUPPORTED, NULL, | |
| 3648 | − 0); | |
| 3649 | − ice_put_vf(vf); | |
| 3650 | − return; | |
| 3651 | − } | |
| 3652 | − | |
| 3653 | 3647 | error_handler: |
| 3654 | 3648 | if (err) { |
| 3655 | 3649 | ice_vc_send_msg_to_vf(vf, v_opcode, VIRTCHNL_STATUS_ERR_PARAM, |
| 3656 | 3650 | NULL, 0); |
| 3657 | 3651 | dev_err(dev, "Invalid message from VF %d, opcode %d, len %d, error %d\n", |
| 3658 | 3652 | vf_id, v_opcode, msglen, err); |
| 3659 | − ice_put_vf(vf); | |
| 3660 | − return; | |
| 3653 | + goto finish; | |
| 3661 | 3654 | } |
| 3662 | 3655 | |
| 3663 | − /* VF is being configured in another context that triggers a VFR, so no | |
| 3664 | − * need to process this message | |
| 3665 | − */ | |
| 3666 | − if (!mutex_trylock(&vf->cfg_lock)) { | |
| 3667 | − dev_info(dev, "VF %u is being configured in another context that will trigger a VFR, so there is no need to handle this message\n", | |
| 3668 | − vf->vf_id); | |
| 3669 | − ice_put_vf(vf); | |
| 3670 | − return; | |
| 3656 | + if (!ice_vc_is_opcode_allowed(vf, v_opcode)) { | |
| 3657 | + ice_vc_send_msg_to_vf(vf, v_opcode, | |
| 3658 | + VIRTCHNL_STATUS_ERR_NOT_SUPPORTED, NULL, | |
| 3659 | + 0); | |
| 3660 | + goto finish; | |
| 3671 | 3661 | } |
| 3672 | 3662 | |
| 3673 | 3663 | switch (v_opcode) { |
| @@ -3780,6 +3770,7 @@ error_handler: · 106 unmodified lines | ||
| 3780 | 3770 | vf_id, v_opcode, err); |
| 3781 | 3771 | } |
| 3782 | 3772 | |
| 3773 | +finish: | |
| 3783 | 3774 | mutex_unlock(&vf->cfg_lock); |
| 3784 | 3775 | ice_put_vf(vf); |
| 3785 | 3776 | } |
| @@ -415,8 +415,8 @@ static u16 ice_fill_rx_descs(struct xsk_buff_pool *pool, struct xdp_buff **xdp, · 414 unmodified lines | ||
| 415 | 415 | */ |
| 416 | 416 | static bool __ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count) |
| 417 | 417 | { |
| 418 | + u32 nb_buffs_extra = 0, nb_buffs = 0; | |
| 418 | 419 | union ice_32b_rx_flex_desc *rx_desc; |
| 419 | − u32 nb_buffs_extra = 0, nb_buffs; | |
| 420 | 420 | u16 ntu = rx_ring->next_to_use; |
| 421 | 421 | u16 total_count = count; |
| 422 | 422 | struct xdp_buff **xdp; |
| @@ -428,6 +428,10 @@ static bool __ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count) · 5 unmodified lines | ||
| 428 | 428 | nb_buffs_extra = ice_fill_rx_descs(rx_ring->xsk_pool, xdp, |
| 429 | 429 | rx_desc, |
| 430 | 430 | rx_ring->count - ntu); |
| 431 | + if (nb_buffs_extra != rx_ring->count - ntu) { | |
| 432 | + ntu += nb_buffs_extra; | |
| 433 | + goto exit; | |
| 434 | + } | |
| 431 | 435 | rx_desc = ICE_RX_DESC(rx_ring, 0); |
| 432 | 436 | xdp = ice_xdp_buf(rx_ring, 0); |
| 433 | 437 | ntu = 0; |
| @@ -441,6 +445,7 @@ static bool __ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count) · 7 unmodified lines | ||
| 441 | 445 | if (ntu == rx_ring->count) |
| 442 | 446 | ntu = 0; |
| 443 | 447 | |
| 448 | +exit: | |
| 444 | 449 | if (rx_ring->next_to_use != ntu) |
| 445 | 450 | ice_release_rx_desc(rx_ring, ntu); |
| 446 | 451 | |
| @@ -156,8 +156,15 @@ void igc_release_swfw_sync_i225(struct igc_hw *hw, u16 mask) · 155 unmodified lines | ||
| 156 | 156 | { |
| 157 | 157 | u32 swfw_sync; |
| 158 | 158 | |
| 159 | − while (igc_get_hw_semaphore_i225(hw)) | |
| 160 | − ; /* Empty */ | |
| 159 | + /* Releasing the resource requires first getting the HW semaphore. | |
| 160 | + * If we fail to get the semaphore, there is nothing we can do, | |
| 161 | + * except log an error and quit. We are not allowed to hang here | |
| 162 | + * indefinitely, as it may cause denial of service or system crash. | |
| 163 | + */ | |
| 164 | + if (igc_get_hw_semaphore_i225(hw)) { | |
| 165 | + hw_dbg("Failed to release SW_FW_SYNC.\n"); | |
| 166 | + return; | |
| 167 | + } | |
| 161 | 168 | |
| 162 | 169 | swfw_sync = rd32(IGC_SW_FW_SYNC); |
| 163 | 170 | swfw_sync &= ~mask; |
| @@ -581,7 +581,7 @@ static s32 igc_read_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 *data) · 580 unmodified lines | ||
| 581 | 581 | * the lower time out |
| 582 | 582 | */ |
| 583 | 583 | for (i = 0; i < IGC_GEN_POLL_TIMEOUT; i++) { |
| 584 | − usleep_range(500, 1000); | |
| 584 | + udelay(50); | |
| 585 | 585 | mdic = rd32(IGC_MDIC); |
| 586 | 586 | if (mdic & IGC_MDIC_READY) |
| 587 | 587 | break; |
| @@ -638,7 +638,7 @@ static s32 igc_write_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 data) · 50 unmodified lines | ||
| 638 | 638 | * the lower time out |
| 639 | 639 | */ |
| 640 | 640 | for (i = 0; i < IGC_GEN_POLL_TIMEOUT; i++) { |
| 641 | − usleep_range(500, 1000); | |
| 641 | + udelay(50); | |
| 642 | 642 | mdic = rd32(IGC_MDIC); |
| 643 | 643 | if (mdic & IGC_MDIC_READY) |
| 644 | 644 | break; |
| @@ -992,6 +992,17 @@ static void igc_ptp_time_restore(struct igc_adapter *adapter) · 991 unmodified lines | ||
| 992 | 992 | igc_ptp_write_i225(adapter, &ts); |
| 993 | 993 | } |
| 994 | 994 | |
| 995 | +static void igc_ptm_stop(struct igc_adapter *adapter) | |
| 996 | +{ | |
| 997 | + struct igc_hw *hw = &adapter->hw; | |
| 998 | + u32 ctrl; | |
| 999 | + | |
| 1000 | + ctrl = rd32(IGC_PTM_CTRL); | |
| 1001 | + ctrl &= ~IGC_PTM_CTRL_EN; | |
| 1002 | + | |
| 1003 | + wr32(IGC_PTM_CTRL, ctrl); | |
| 1004 | +} | |
| 1005 | + | |
| 995 | 1006 | /** |
| 996 | 1007 | * igc_ptp_suspend - Disable PTP work items and prepare for suspend |
| 997 | 1008 | * @adapter: Board private structure |
| @@ -1009,8 +1020,10 @@ void igc_ptp_suspend(struct igc_adapter *adapter) · 11 unmodified lines | ||
| 1009 | 1020 | adapter->ptp_tx_skb = NULL; |
| 1010 | 1021 | clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state); |
| 1011 | 1022 | |
| 1012 | − if (pci_device_is_present(adapter->pdev)) | |
| 1023 | + if (pci_device_is_present(adapter->pdev)) { | |
| 1013 | 1024 | igc_ptp_time_save(adapter); |
| 1025 | + igc_ptm_stop(adapter); | |
| 1026 | + } | |
| 1014 | 1027 | } |
| 1015 | 1028 | |
| 1016 | 1029 | /** |
| @@ -903,7 +903,8 @@ int ixgbe_ipsec_vf_add_sa(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf) · 902 unmodified lines | ||
| 903 | 903 | /* Tx IPsec offload doesn't seem to work on this |
| 904 | 904 | * device, so block these requests for now. |
| 905 | 905 | */ |
| 906 | − if (!(sam->flags & XFRM_OFFLOAD_INBOUND)) { | |
| 906 | + sam->flags = sam->flags & ~XFRM_OFFLOAD_IPV6; | |
| 907 | + if (sam->flags != XFRM_OFFLOAD_INBOUND) { | |
| 907 | 908 | err = -EOPNOTSUPP; |
| 908 | 909 | goto err_out; |
| 909 | 910 | } |
| @@ -650,6 +650,7 @@ static int mlxsw_i2c_probe(struct i2c_client *client, · 649 unmodified lines | ||
| 650 | 650 | return 0; |
| 651 | 651 | |
| 652 | 652 | errout: |
| 653 | + mutex_destroy(&mlxsw_i2c->cmd.lock); | |
| 653 | 654 | i2c_set_clientdata(client, NULL); |
| 654 | 655 | |
| 655 | 656 | return err; |
| @@ -423,7 +423,7 @@ mlxsw_sp_span_gretap4_route(const struct net_device *to_dev, · 422 unmodified lines | ||
| 423 | 423 | |
| 424 | 424 | parms = mlxsw_sp_ipip_netdev_parms4(to_dev); |
| 425 | 425 | ip_tunnel_init_flow(&fl4, parms.iph.protocol, *daddrp, *saddrp, |
| 426 | − 0, 0, parms.link, tun->fwmark, 0); | |
| 426 | + 0, 0, dev_net(to_dev), parms.link, tun->fwmark, 0); | |
| 427 | 427 | |
| 428 | 428 | rt = ip_route_output_key(tun->net, &fl4); |
| 429 | 429 | if (IS_ERR(rt)) |
| @@ -346,7 +346,8 @@ static void lan966x_mac_irq_process(struct lan966x *lan966x, u32 row, · 345 unmodified lines | ||
| 346 | 346 | |
| 347 | 347 | lan966x_mac_process_raw_entry(&raw_entries[column], |
| 348 | 348 | mac, &vid, &dest_idx); |
| 349 | − WARN_ON(dest_idx > lan966x->num_phys_ports); | |
| 349 | + if (WARN_ON(dest_idx >= lan966x->num_phys_ports)) | |
| 350 | + continue; | |
| 350 | 351 | |
| 351 | 352 | /* If the entry in SW is found, then there is nothing |
| 352 | 353 | * to do |
| @@ -392,7 +393,8 @@ static void lan966x_mac_irq_process(struct lan966x *lan966x, u32 row, · 39 unmodified lines | ||
| 392 | 393 | |
| 393 | 394 | lan966x_mac_process_raw_entry(&raw_entries[column], |
| 394 | 395 | mac, &vid, &dest_idx); |
| 395 | − WARN_ON(dest_idx > lan966x->num_phys_ports); | |
| 396 | + if (WARN_ON(dest_idx >= lan966x->num_phys_ports)) | |
| 397 | + continue; | |
| 396 | 398 | |
| 397 | 399 | mac_entry = lan966x_mac_alloc_entry(mac, vid, dest_idx); |
| 398 | 400 | if (!mac_entry) |
| @@ -446,6 +446,12 @@ static bool lan966x_hw_offload(struct lan966x *lan966x, u32 port, · 445 unmodified lines | ||
| 446 | 446 | ANA_CPU_FWD_CFG_MLD_REDIR_ENA))) |
| 447 | 447 | return true; |
| 448 | 448 | |
| 449 | + if (eth_type_vlan(skb->protocol)) { | |
| 450 | + skb = skb_vlan_untag(skb); | |
| 451 | + if (unlikely(!skb)) | |
| 452 | + return false; | |
| 453 | + } | |
| 454 | + | |
| 449 | 455 | if (skb->protocol == htons(ETH_P_IP) && |
| 450 | 456 | ip_hdr(skb)->protocol == IPPROTO_IGMP) |
| 451 | 457 | return false; |
| @@ -665,6 +671,9 @@ static void lan966x_cleanup_ports(struct lan966x *lan966x) · 213 unmodified lines | ||
| 665 | 671 | disable_irq(lan966x->ana_irq); |
| 666 | 672 | lan966x->ana_irq = -ENXIO; |
| 667 | 673 | } |
| 674 | + | |
| 675 | + if (lan966x->ptp_irq) | |
| 676 | + devm_free_irq(lan966x->dev, lan966x->ptp_irq, lan966x); | |
| 668 | 677 | } |
| 669 | 678 | |
| 670 | 679 | static int lan966x_probe_port(struct lan966x *lan966x, u32 p, |
| @@ -29,10 +29,10 @@ enum { · 28 unmodified lines | ||
| 29 | 29 | |
| 30 | 30 | static u64 lan966x_ptp_get_nominal_value(void) |
| 31 | 31 | { |
| 32 | − u64 res = 0x304d2df1; | |
| 33 | − | |
| 34 | − res <<= 32; | |
| 35 | − return res; | |
| 32 | + /* This is the default value that for each system clock, the time of day | |
| 33 | + * is increased. It has the format 5.59 nanosecond. | |
| 34 | + */ | |
| 35 | + return 0x304d4873ecade305; | |
| 36 | 36 | } |
| 37 | 37 | |
| 38 | 38 | int lan966x_ptp_hwtstamp_set(struct lan966x_port *port, struct ifreq *ifr) |
| @@ -322,8 +322,7 @@ static int lan966x_port_prechangeupper(struct net_device *dev, · 321 unmodified lines | ||
| 322 | 322 | |
| 323 | 323 | if (netif_is_bridge_master(info->upper_dev) && !info->linking) |
| 324 | 324 | switchdev_bridge_port_unoffload(port->dev, port, |
| 325 | − &lan966x_switchdev_nb, | |
| 326 | − &lan966x_switchdev_blocking_nb); | |
| 325 | + NULL, NULL); | |
| 327 | 326 | |
| 328 | 327 | return NOTIFY_DONE; |
| 329 | 328 | } |
| @@ -551,7 +551,7 @@ int ocelot_port_vlan_filtering(struct ocelot *ocelot, int port, · 550 unmodified lines | ||
| 551 | 551 | struct ocelot_vcap_block *block = &ocelot->block[VCAP_IS1]; |
| 552 | 552 | struct ocelot_port *ocelot_port = ocelot->ports[port]; |
| 553 | 553 | struct ocelot_vcap_filter *filter; |
| 554 | − int err; | |
| 554 | + int err = 0; | |
| 555 | 555 | u32 val; |
| 556 | 556 | |
| 557 | 557 | list_for_each_entry(filter, &block->rules, list) { |
| @@ -570,7 +570,7 @@ int ocelot_port_vlan_filtering(struct ocelot *ocelot, int port, · 12 unmodified lines | ||
| 570 | 570 | if (vlan_aware) |
| 571 | 571 | err = ocelot_del_vlan_unaware_pvid(ocelot, port, |
| 572 | 572 | ocelot_port->bridge); |
| 573 | − else | |
| 573 | + else if (ocelot_port->bridge) | |
| 574 | 574 | err = ocelot_add_vlan_unaware_pvid(ocelot, port, |
| 575 | 575 | ocelot_port->bridge); |
| 576 | 576 | if (err) |
| @@ -629,6 +629,13 @@ int ocelot_vlan_add(struct ocelot *ocelot, int port, u16 vid, bool pvid, · 52 unmodified lines | ||
| 629 | 629 | { |
| 630 | 630 | int err; |
| 631 | 631 | |
| 632 | + /* Ignore VID 0 added to our RX filter by the 8021q module, since | |
| 633 | + * that collides with OCELOT_STANDALONE_PVID and changes it from | |
| 634 | + * egress-untagged to egress-tagged. | |
| 635 | + */ | |
| 636 | + if (!vid) | |
| 637 | + return 0; | |
| 638 | + | |
| 632 | 639 | err = ocelot_vlan_member_add(ocelot, port, vid, untagged); |
| 633 | 640 | if (err) |
| 634 | 641 | return err; |
| @@ -651,6 +658,9 @@ int ocelot_vlan_del(struct ocelot *ocelot, int port, u16 vid) · 16 unmodified lines | ||
| 651 | 658 | bool del_pvid = false; |
| 652 | 659 | int err; |
| 653 | 660 | |
| 661 | + if (!vid) | |
| 662 | + return 0; | |
| 663 | + | |
| 654 | 664 | if (ocelot_port->pvid_vlan && ocelot_port->pvid_vlan->vid == vid) |
| 655 | 665 | del_pvid = true; |
| 656 | 666 | |
| @@ -2859,6 +2869,8 @@ static void ocelot_port_set_mcast_flood(struct ocelot *ocelot, int port, · 2202 unmodified lines | ||
| 2859 | 2869 | val = BIT(port); |
| 2860 | 2870 | |
| 2861 | 2871 | ocelot_rmw_rix(ocelot, val, BIT(port), ANA_PGID_PGID, PGID_MC); |
| 2872 | + ocelot_rmw_rix(ocelot, val, BIT(port), ANA_PGID_PGID, PGID_MCIPV4); | |
| 2873 | + ocelot_rmw_rix(ocelot, val, BIT(port), ANA_PGID_PGID, PGID_MCIPV6); | |
| 2862 | 2874 | } |
| 2863 | 2875 | |
| 2864 | 2876 | static void ocelot_port_set_bcast_flood(struct ocelot *ocelot, int port, |
| @@ -57,10 +57,6 @@ · 56 unmodified lines | ||
| 57 | 57 | #define TSE_PCS_USE_SGMII_ENA BIT(0) |
| 58 | 58 | #define TSE_PCS_IF_USE_SGMII 0x03 |
| 59 | 59 | |
| 60 | −#define SGMII_ADAPTER_CTRL_REG 0x00 | |
| 61 | −#define SGMII_ADAPTER_DISABLE 0x0001 | |
| 62 | −#define SGMII_ADAPTER_ENABLE 0x0000 | |
| 63 | − | |
| 64 | 60 | #define AUTONEGO_LINK_TIMER 20 |
| 65 | 61 | |
| 66 | 62 | static int tse_pcs_reset(void __iomem *base, struct tse_pcs *pcs) |
| @@ -202,12 +198,8 @@ void tse_pcs_fix_mac_speed(struct tse_pcs *pcs, struct phy_device *phy_dev, · 135 unmodified lines | ||
| 202 | 198 | unsigned int speed) |
| 203 | 199 | { |
| 204 | 200 | void __iomem *tse_pcs_base = pcs->tse_pcs_base; |
| 205 | − void __iomem *sgmii_adapter_base = pcs->sgmii_adapter_base; | |
| 206 | 201 | u32 val; |
| 207 | 202 | |
| 208 | − writew(SGMII_ADAPTER_ENABLE, | |
| 209 | − sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG); | |
| 210 | − | |
| 211 | 203 | pcs->autoneg = phy_dev->autoneg; |
| 212 | 204 | |
| 213 | 205 | if (phy_dev->autoneg == AUTONEG_ENABLE) { |
| @@ -10,6 +10,10 @@ · 9 unmodified lines | ||
| 10 | 10 | #include <linux/phy.h> |
| 11 | 11 | #include <linux/timer.h> |
| 12 | 12 | |
| 13 | +#define SGMII_ADAPTER_CTRL_REG 0x00 | |
| 14 | +#define SGMII_ADAPTER_ENABLE 0x0000 | |
| 15 | +#define SGMII_ADAPTER_DISABLE 0x0001 | |
| 16 | + | |
| 13 | 17 | struct tse_pcs { |
| 14 | 18 | struct device *dev; |
| 15 | 19 | void __iomem *tse_pcs_base; |
| @@ -18,9 +18,6 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | #include "altr_tse_pcs.h" |
| 20 | 20 | |
| 21 | −#define SGMII_ADAPTER_CTRL_REG 0x00 | |
| 22 | −#define SGMII_ADAPTER_DISABLE 0x0001 | |
| 23 | − | |
| 24 | 21 | #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0 |
| 25 | 22 | #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1 |
| 26 | 23 | #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII 0x2 |
| @@ -62,14 +59,13 @@ static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed) · 35 unmodified lines | ||
| 62 | 59 | { |
| 63 | 60 | struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv; |
| 64 | 61 | void __iomem *splitter_base = dwmac->splitter_base; |
| 65 | − void __iomem *tse_pcs_base = dwmac->pcs.tse_pcs_base; | |
| 66 | 62 | void __iomem *sgmii_adapter_base = dwmac->pcs.sgmii_adapter_base; |
| 67 | 63 | struct device *dev = dwmac->dev; |
| 68 | 64 | struct net_device *ndev = dev_get_drvdata(dev); |
| 69 | 65 | struct phy_device *phy_dev = ndev->phydev; |
| 70 | 66 | u32 val; |
| 71 | 67 | |
| 72 | − if ((tse_pcs_base) && (sgmii_adapter_base)) | |
| 68 | + if (sgmii_adapter_base) | |
| 73 | 69 | writew(SGMII_ADAPTER_DISABLE, |
| 74 | 70 | sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG); |
| 75 | 71 | |
| @@ -93,8 +89,11 @@ static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed) · 17 unmodified lines | ||
| 93 | 89 | writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG); |
| 94 | 90 | } |
| 95 | 91 | |
| 96 | − if (tse_pcs_base && sgmii_adapter_base) | |
| 92 | + if (phy_dev && sgmii_adapter_base) { | |
| 93 | + writew(SGMII_ADAPTER_ENABLE, | |
| 94 | + sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG); | |
| 97 | 95 | tse_pcs_fix_mac_speed(&dwmac->pcs, phy_dev, speed); |
| 96 | + } | |
| 98 | 97 | } |
| 99 | 98 | |
| 100 | 99 | static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *dev) |
| @@ -71,9 +71,9 @@ static int init_systime(void __iomem *ioaddr, u32 sec, u32 nsec) · 70 unmodified lines | ||
| 71 | 71 | writel(value, ioaddr + PTP_TCR); |
| 72 | 72 | |
| 73 | 73 | /* wait for present system time initialize to complete */ |
| 74 | − return readl_poll_timeout(ioaddr + PTP_TCR, value, | |
| 74 | + return readl_poll_timeout_atomic(ioaddr + PTP_TCR, value, | |
| 75 | 75 | !(value & PTP_TCR_TSINIT), |
| 76 | − 10000, 100000); | |
| 76 | + 10, 100000); | |
| 77 | 77 | } |
| 78 | 78 | |
| 79 | 79 | static int config_addend(void __iomem *ioaddr, u32 addend) |
| @@ -1355,7 +1355,9 @@ static int rr_close(struct net_device *dev) · 1354 unmodified lines | ||
| 1355 | 1355 | |
| 1356 | 1356 | rrpriv->fw_running = 0; |
| 1357 | 1357 | |
| 1358 | + spin_unlock_irqrestore(&rrpriv->lock, flags); | |
| 1358 | 1359 | del_timer_sync(&rrpriv->timer); |
| 1360 | + spin_lock_irqsave(&rrpriv->lock, flags); | |
| 1359 | 1361 | |
| 1360 | 1362 | writel(0, ®s->TxPi); |
| 1361 | 1363 | writel(0, ®s->IpRxPi); |
| @@ -460,8 +460,10 @@ static rx_handler_result_t macvlan_handle_frame(struct sk_buff **pskb) · 459 unmodified lines | ||
| 460 | 460 | return RX_HANDLER_CONSUMED; |
| 461 | 461 | *pskb = skb; |
| 462 | 462 | eth = eth_hdr(skb); |
| 463 | − if (macvlan_forward_source(skb, port, eth->h_source)) | |
| 463 | + if (macvlan_forward_source(skb, port, eth->h_source)) { | |
| 464 | + kfree_skb(skb); | |
| 464 | 465 | return RX_HANDLER_CONSUMED; |
| 466 | + } | |
| 465 | 467 | src = macvlan_hash_lookup(port, eth->h_source); |
| 466 | 468 | if (src && src->mode != MACVLAN_MODE_VEPA && |
| 467 | 469 | src->mode != MACVLAN_MODE_BRIDGE) { |
| @@ -480,8 +482,10 @@ static rx_handler_result_t macvlan_handle_frame(struct sk_buff **pskb) · 12 unmodified lines | ||
| 480 | 482 | return RX_HANDLER_PASS; |
| 481 | 483 | } |
| 482 | 484 | |
| 483 | − if (macvlan_forward_source(skb, port, eth->h_source)) | |
| 485 | + if (macvlan_forward_source(skb, port, eth->h_source)) { | |
| 486 | + kfree_skb(skb); | |
| 484 | 487 | return RX_HANDLER_CONSUMED; |
| 488 | + } | |
| 485 | 489 | if (macvlan_passthru(port)) |
| 486 | 490 | vlan = list_first_or_null_rcu(&port->vlans, |
| 487 | 491 | struct macvlan_dev, list); |
| @@ -43,6 +43,11 @@ int fwnode_mdiobus_phy_device_register(struct mii_bus *mdio, · 42 unmodified lines | ||
| 43 | 43 | int rc; |
| 44 | 44 | |
| 45 | 45 | rc = fwnode_irq_get(child, 0); |
| 46 | + /* Don't wait forever if the IRQ provider doesn't become available, | |
| 47 | + * just fall back to poll mode | |
| 48 | + */ | |
| 49 | + if (rc == -EPROBE_DEFER) | |
| 50 | + rc = driver_deferred_probe_check_state(&phy->mdio.dev); | |
| 46 | 51 | if (rc == -EPROBE_DEFER) |
| 47 | 52 | return rc; |
| 48 | 53 | |
| @@ -880,7 +880,7 @@ static int mv3310_read_status_copper(struct phy_device *phydev) · 879 unmodified lines | ||
| 880 | 880 | |
| 881 | 881 | cssr1 = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSSR1); |
| 882 | 882 | if (cssr1 < 0) |
| 883 | − return val; | |
| 883 | + return cssr1; | |
| 884 | 884 | |
| 885 | 885 | /* If the link settings are not resolved, mark the link down */ |
| 886 | 886 | if (!(cssr1 & MV_PCS_CSSR1_RESOLVED)) { |
| @@ -706,7 +706,6 @@ static int lan87xx_read_status(struct phy_device *phydev) · 705 unmodified lines | ||
| 706 | 706 | static int lan87xx_config_aneg(struct phy_device *phydev) |
| 707 | 707 | { |
| 708 | 708 | u16 ctl = 0; |
| 709 | − int rc; | |
| 710 | 709 | |
| 711 | 710 | switch (phydev->master_slave_set) { |
| 712 | 711 | case MASTER_SLAVE_CFG_MASTER_FORCE: |
| @@ -722,11 +721,7 @@ static int lan87xx_config_aneg(struct phy_device *phydev) · 9 unmodified lines | ||
| 722 | 721 | return -EOPNOTSUPP; |
| 723 | 722 | } |
| 724 | 723 | |
| 725 | − rc = phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl); | |
| 726 | − if (rc == 1) | |
| 727 | − rc = genphy_soft_reset(phydev); | |
| 728 | − | |
| 729 | − return rc; | |
| 724 | + return phy_modify_changed(phydev, MII_CTRL1000, CTL1000_AS_MASTER, ctl); | |
| 730 | 725 | } |
| 731 | 726 | |
| 732 | 727 | static struct phy_driver microchip_t1_phy_driver[] = { |
| @@ -748,6 +743,7 @@ static struct phy_driver microchip_t1_phy_driver[] = { · 15 unmodified lines | ||
| 748 | 743 | { |
| 749 | 744 | PHY_ID_MATCH_MODEL(PHY_ID_LAN937X), |
| 750 | 745 | .name = "Microchip LAN937x T1", |
| 746 | + .flags = PHY_POLL_CABLE_TEST, | |
| 751 | 747 | .features = PHY_BASIC_T1_FEATURES, |
| 752 | 748 | .config_init = lan87xx_config_init, |
| 753 | 749 | .suspend = genphy_suspend, |
| @@ -1124,7 +1124,7 @@ static netdev_tx_t tun_net_xmit(struct sk_buff *skb, struct net_device *dev) · 1123 unmodified lines | ||
| 1124 | 1124 | |
| 1125 | 1125 | /* NETIF_F_LLTX requires to do our own update of trans_start */ |
| 1126 | 1126 | queue = netdev_get_tx_queue(dev, txq); |
| 1127 | − queue->trans_start = jiffies; | |
| 1127 | + txq_trans_cond_update(queue); | |
| 1128 | 1128 | |
| 1129 | 1129 | /* Notify and wake up reader process */ |
| 1130 | 1130 | if (tfile->flags & TUN_FASYNC) |
| @@ -320,7 +320,7 @@ static netdev_tx_t veth_xmit(struct sk_buff *skb, struct net_device *dev) · 319 unmodified lines | ||
| 320 | 320 | |
| 321 | 321 | rcu_read_lock(); |
| 322 | 322 | rcv = rcu_dereference(priv->peer); |
| 323 | − if (unlikely(!rcv)) { | |
| 323 | + if (unlikely(!rcv) || !pskb_may_pull(skb, ETH_HLEN)) { | |
| 324 | 324 | kfree_skb(skb); |
| 325 | 325 | goto drop; |
| 326 | 326 | } |
| @@ -1005,6 +1005,24 @@ static struct sk_buff *receive_mergeable(struct net_device *dev, · 1004 unmodified lines | ||
| 1005 | 1005 | * xdp.data_meta were adjusted |
| 1006 | 1006 | */ |
| 1007 | 1007 | len = xdp.data_end - xdp.data + vi->hdr_len + metasize; |
| 1008 | + | |
| 1009 | + /* recalculate headroom if xdp.data or xdp_data_meta | |
| 1010 | + * were adjusted, note that offset should always point | |
| 1011 | + * to the start of the reserved bytes for virtio_net | |
| 1012 | + * header which are followed by xdp.data, that means | |
| 1013 | + * that offset is equal to the headroom (when buf is | |
| 1014 | + * starting at the beginning of the page, otherwise | |
| 1015 | + * there is a base offset inside the page) but it's used | |
| 1016 | + * with a different starting point (buf start) than | |
| 1017 | + * xdp.data (buf start + vnet hdr size). If xdp.data or | |
| 1018 | + * data_meta were adjusted by the xdp prog then the | |
| 1019 | + * headroom size has changed and so has the offset, we | |
| 1020 | + * can use data_hard_start, which points at buf start + | |
| 1021 | + * vnet hdr size, to calculate the new headroom and use | |
| 1022 | + * it later to compute buf start in page_to_skb() | |
| 1023 | + */ | |
| 1024 | + headroom = xdp.data - xdp.data_hard_start - metasize; | |
| 1025 | + | |
| 1008 | 1026 | /* We can only create skb based on xdp_page. */ |
| 1009 | 1027 | if (unlikely(xdp_page != page)) { |
| 1010 | 1028 | rcu_read_unlock(); |
| @@ -1012,7 +1030,7 @@ static struct sk_buff *receive_mergeable(struct net_device *dev, · 1 unmodified line | ||
| 1012 | 1030 | head_skb = page_to_skb(vi, rq, xdp_page, offset, |
| 1013 | 1031 | len, PAGE_SIZE, false, |
| 1014 | 1032 | metasize, |
| 1015 | − VIRTIO_XDP_HEADROOM); | |
| 1033 | + headroom); | |
| 1016 | 1034 | return head_skb; |
| 1017 | 1035 | } |
| 1018 | 1036 | break; |
| @@ -651,11 +651,11 @@ static int vxlan_fdb_append(struct vxlan_fdb *f, · 650 unmodified lines | ||
| 651 | 651 | |
| 652 | 652 | rd = kmalloc(sizeof(*rd), GFP_ATOMIC); |
| 653 | 653 | if (rd == NULL) |
| 654 | − return -ENOBUFS; | |
| 654 | + return -ENOMEM; | |
| 655 | 655 | |
| 656 | 656 | if (dst_cache_init(&rd->dst_cache, GFP_ATOMIC)) { |
| 657 | 657 | kfree(rd); |
| 658 | − return -ENOBUFS; | |
| 658 | + return -ENOMEM; | |
| 659 | 659 | } |
| 660 | 660 | |
| 661 | 661 | rd->remote_ip = *ip; |
| @@ -349,7 +349,7 @@ static int __init cosa_init(void) · 348 unmodified lines | ||
| 349 | 349 | } |
| 350 | 350 | } else { |
| 351 | 351 | cosa_major = register_chrdev(0, "cosa", &cosa_fops); |
| 352 | − if (!cosa_major) { | |
| 352 | + if (cosa_major < 0) { | |
| 353 | 353 | pr_warn("unable to register chardev\n"); |
| 354 | 354 | err = -EIO; |
| 355 | 355 | goto out; |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/if_arp.h> |
| 20 | 20 | #include <linux/icmp.h> |
| 21 | 21 | #include <linux/suspend.h> |
| 22 | +#include <net/dst_metadata.h> | |
| 22 | 23 | #include <net/icmp.h> |
| 23 | 24 | #include <net/rtnetlink.h> |
| 24 | 25 | #include <net/ip_tunnels.h> |
| @@ -167,7 +168,7 @@ static netdev_tx_t wg_xmit(struct sk_buff *skb, struct net_device *dev) · 142 unmodified lines | ||
| 167 | 168 | goto err_peer; |
| 168 | 169 | } |
| 169 | 170 | |
| 170 | − mtu = skb_dst(skb) ? dst_mtu(skb_dst(skb)) : dev->mtu; | |
| 171 | + mtu = skb_valid_dst(skb) ? dst_mtu(skb_dst(skb)) : dev->mtu; | |
| 171 | 172 | |
| 172 | 173 | __skb_queue_head_init(&packets); |
| 173 | 174 | if (!skb_is_gso(skb)) { |
| @@ -3136,6 +3136,20 @@ static void ath11k_mac_op_bss_info_changed(struct ieee80211_hw *hw, · 3135 unmodified lines | ||
| 3136 | 3136 | arvif->do_not_send_tmpl = true; |
| 3137 | 3137 | else |
| 3138 | 3138 | arvif->do_not_send_tmpl = false; |
| 3139 | + | |
| 3140 | + if (vif->bss_conf.he_support) { | |
| 3141 | + ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, | |
| 3142 | + WMI_VDEV_PARAM_BA_MODE, | |
| 3143 | + WMI_BA_MODE_BUFFER_SIZE_256); | |
| 3144 | + if (ret) | |
| 3145 | + ath11k_warn(ar->ab, | |
| 3146 | + "failed to set BA BUFFER SIZE 256 for vdev: %d\n", | |
| 3147 | + arvif->vdev_id); | |
| 3148 | + else | |
| 3149 | + ath11k_dbg(ar->ab, ATH11K_DBG_MAC, | |
| 3150 | + "Set BA BUFFER SIZE 256 for VDEV: %d\n", | |
| 3151 | + arvif->vdev_id); | |
| 3152 | + } | |
| 3139 | 3153 | } |
| 3140 | 3154 | |
| 3141 | 3155 | if (changed & (BSS_CHANGED_BEACON_INFO | BSS_CHANGED_BEACON)) { |
| @@ -3171,14 +3185,6 @@ static void ath11k_mac_op_bss_info_changed(struct ieee80211_hw *hw, · 29 unmodified lines | ||
| 3171 | 3185 | |
| 3172 | 3186 | if (arvif->is_up && vif->bss_conf.he_support && |
| 3173 | 3187 | vif->bss_conf.he_oper.params) { |
| 3174 | − ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, | |
| 3175 | − WMI_VDEV_PARAM_BA_MODE, | |
| 3176 | − WMI_BA_MODE_BUFFER_SIZE_256); | |
| 3177 | − if (ret) | |
| 3178 | − ath11k_warn(ar->ab, | |
| 3179 | − "failed to set BA BUFFER SIZE 256 for vdev: %d\n", | |
| 3180 | − arvif->vdev_id); | |
| 3181 | − | |
| 3182 | 3188 | param_id = WMI_VDEV_PARAM_HEOPS_0_31; |
| 3183 | 3189 | param_value = vif->bss_conf.he_oper.params; |
| 3184 | 3190 | ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, |
| @@ -839,7 +839,7 @@ static bool ath9k_txq_list_has_key(struct list_head *txq_list, u32 keyix) · 838 unmodified lines | ||
| 839 | 839 | continue; |
| 840 | 840 | |
| 841 | 841 | txinfo = IEEE80211_SKB_CB(bf->bf_mpdu); |
| 842 | − fi = (struct ath_frame_info *)&txinfo->rate_driver_data[0]; | |
| 842 | + fi = (struct ath_frame_info *)&txinfo->status.status_driver_data[0]; | |
| 843 | 843 | if (fi->keyix == keyix) |
| 844 | 844 | return true; |
| 845 | 845 | } |
| @@ -141,8 +141,8 @@ static struct ath_frame_info *get_frame_info(struct sk_buff *skb) · 140 unmodified lines | ||
| 141 | 141 | { |
| 142 | 142 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
| 143 | 143 | BUILD_BUG_ON(sizeof(struct ath_frame_info) > |
| 144 | − sizeof(tx_info->rate_driver_data)); | |
| 145 | − return (struct ath_frame_info *) &tx_info->rate_driver_data[0]; | |
| 144 | + sizeof(tx_info->status.status_driver_data)); | |
| 145 | + return (struct ath_frame_info *) &tx_info->status.status_driver_data[0]; | |
| 146 | 146 | } |
| 147 | 147 | |
| 148 | 148 | static void ath_send_bar(struct ath_atx_tid *tid, u16 seqno) |
| @@ -2542,6 +2542,16 @@ skip_tx_complete: · 2393 unmodified lines | ||
| 2542 | 2542 | spin_unlock_irqrestore(&sc->tx.txbuflock, flags); |
| 2543 | 2543 | } |
| 2544 | 2544 | |
| 2545 | +static void ath_clear_tx_status(struct ieee80211_tx_info *tx_info) | |
| 2546 | +{ | |
| 2547 | + void *ptr = &tx_info->status; | |
| 2548 | + | |
| 2549 | + memset(ptr + sizeof(tx_info->status.rates), 0, | |
| 2550 | + sizeof(tx_info->status) - | |
| 2551 | + sizeof(tx_info->status.rates) - | |
| 2552 | + sizeof(tx_info->status.status_driver_data)); | |
| 2553 | +} | |
| 2554 | + | |
| 2545 | 2555 | static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf, |
| 2546 | 2556 | struct ath_tx_status *ts, int nframes, int nbad, |
| 2547 | 2557 | int txok) |
| @@ -2553,6 +2563,8 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf, · 5 unmodified lines | ||
| 2553 | 2563 | struct ath_hw *ah = sc->sc_ah; |
| 2554 | 2564 | u8 i, tx_rateindex; |
| 2555 | 2565 | |
| 2566 | + ath_clear_tx_status(tx_info); | |
| 2567 | + | |
| 2556 | 2568 | if (txok) |
| 2557 | 2569 | tx_info->status.ack_signal = ts->ts_rssi; |
| 2558 | 2570 | |
| @@ -2567,6 +2579,13 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf, · 8 unmodified lines | ||
| 2567 | 2579 | tx_info->status.ampdu_len = nframes; |
| 2568 | 2580 | tx_info->status.ampdu_ack_len = nframes - nbad; |
| 2569 | 2581 | |
| 2582 | + tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1; | |
| 2583 | + | |
| 2584 | + for (i = tx_rateindex + 1; i < hw->max_rates; i++) { | |
| 2585 | + tx_info->status.rates[i].count = 0; | |
| 2586 | + tx_info->status.rates[i].idx = -1; | |
| 2587 | + } | |
| 2588 | + | |
| 2570 | 2589 | if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 && |
| 2571 | 2590 | (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) == 0) { |
| 2572 | 2591 | /* |
| @@ -2588,16 +2607,6 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf, · 15 unmodified lines | ||
| 2588 | 2607 | tx_info->status.rates[tx_rateindex].count = |
| 2589 | 2608 | hw->max_rate_tries; |
| 2590 | 2609 | } |
| 2591 | − | |
| 2592 | − for (i = tx_rateindex + 1; i < hw->max_rates; i++) { | |
| 2593 | − tx_info->status.rates[i].count = 0; | |
| 2594 | − tx_info->status.rates[i].idx = -1; | |
| 2595 | − } | |
| 2596 | − | |
| 2597 | − tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1; | |
| 2598 | − | |
| 2599 | − /* we report airtime in ath_tx_count_airtime(), don't report twice */ | |
| 2600 | − tx_info->status.tx_time = 0; | |
| 2601 | 2610 | } |
| 2602 | 2611 | |
| 2603 | 2612 | static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) |
| @@ -557,7 +557,7 @@ enum brcmf_sdio_frmtype { · 556 unmodified lines | ||
| 557 | 557 | BRCMF_SDIO_FT_SUB, |
| 558 | 558 | }; |
| 559 | 559 | |
| 560 | −#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu)) | |
| 560 | +#define SDIOD_DRVSTR_KEY(chip, pmu) (((unsigned int)(chip) << 16) | (pmu)) | |
| 561 | 561 | |
| 562 | 562 | /* SDIO Pad drive strength to select value mappings */ |
| 563 | 563 | struct sdiod_drive_str { |
| @@ -80,7 +80,7 @@ mt76x2e_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 79 unmodified lines | ||
| 80 | 80 | mt76_rmw_field(dev, 0x15a10, 0x1f << 16, 0x9); |
| 81 | 81 | |
| 82 | 82 | /* RG_SSUSB_G1_CDR_BIC_LTR = 0xf */ |
| 83 | − mt76_rmw_field(dev, 0x15a0c, 0xf << 28, 0xf); | |
| 83 | + mt76_rmw_field(dev, 0x15a0c, 0xfU << 28, 0xf); | |
| 84 | 84 | |
| 85 | 85 | /* RG_SSUSB_CDR_BR_PE1D = 0x3 */ |
| 86 | 86 | mt76_rmw_field(dev, 0x15c58, 0x3 << 6, 0x3); |
| @@ -366,7 +366,7 @@ static inline void nvme_end_req(struct request *req) · 365 unmodified lines | ||
| 366 | 366 | { |
| 367 | 367 | blk_status_t status = nvme_error_status(nvme_req(req)->status); |
| 368 | 368 | |
| 369 | − if (unlikely(nvme_req(req)->status != NVME_SC_SUCCESS)) | |
| 369 | + if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) | |
| 370 | 370 | nvme_log_error(req); |
| 371 | 371 | nvme_end_req_zoned(req); |
| 372 | 372 | nvme_trace_bio_complete(req); |
| @@ -1015,6 +1015,7 @@ int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, · 642 unmodified lines | ||
| 1015 | 1015 | goto out; |
| 1016 | 1016 | } |
| 1017 | 1017 | |
| 1018 | + req->rq_flags |= RQF_QUIET; | |
| 1018 | 1019 | ret = nvme_execute_rq(req, at_head); |
| 1019 | 1020 | if (result && ret >= 0) |
| 1020 | 1021 | *result = nvme_req(req)->result; |
| @@ -1287,6 +1288,8 @@ static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, · 266 unmodified lines | ||
| 1287 | 1288 | warn_str, cur->nidl); |
| 1288 | 1289 | return -1; |
| 1289 | 1290 | } |
| 1291 | + if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) | |
| 1292 | + return NVME_NIDT_EUI64_LEN; | |
| 1290 | 1293 | memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); |
| 1291 | 1294 | return NVME_NIDT_EUI64_LEN; |
| 1292 | 1295 | case NVME_NIDT_NGUID: |
| @@ -1295,6 +1298,8 @@ static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, · 2 unmodified lines | ||
| 1295 | 1298 | warn_str, cur->nidl); |
| 1296 | 1299 | return -1; |
| 1297 | 1300 | } |
| 1301 | + if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) | |
| 1302 | + return NVME_NIDT_NGUID_LEN; | |
| 1298 | 1303 | memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); |
| 1299 | 1304 | return NVME_NIDT_NGUID_LEN; |
| 1300 | 1305 | case NVME_NIDT_UUID: |
| @@ -1303,6 +1308,8 @@ static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, · 2 unmodified lines | ||
| 1303 | 1308 | warn_str, cur->nidl); |
| 1304 | 1309 | return -1; |
| 1305 | 1310 | } |
| 1311 | + if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) | |
| 1312 | + return NVME_NIDT_UUID_LEN; | |
| 1306 | 1313 | uuid_copy(&ids->uuid, data + sizeof(*cur)); |
| 1307 | 1314 | return NVME_NIDT_UUID_LEN; |
| 1308 | 1315 | case NVME_NIDT_CSI: |
| @@ -1399,12 +1406,18 @@ static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, · 90 unmodified lines | ||
| 1399 | 1406 | if ((*id)->ncap == 0) /* namespace not allocated or attached */ |
| 1400 | 1407 | goto out_free_id; |
| 1401 | 1408 | |
| 1402 | − if (ctrl->vs >= NVME_VS(1, 1, 0) && | |
| 1403 | − !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) | |
| 1404 | − memcpy(ids->eui64, (*id)->eui64, sizeof(ids->eui64)); | |
| 1405 | − if (ctrl->vs >= NVME_VS(1, 2, 0) && | |
| 1406 | − !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) | |
| 1407 | − memcpy(ids->nguid, (*id)->nguid, sizeof(ids->nguid)); | |
| 1409 | + | |
| 1410 | + if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { | |
| 1411 | + dev_info(ctrl->device, | |
| 1412 | + "Ignoring bogus Namespace Identifiers\n"); | |
| 1413 | + } else { | |
| 1414 | + if (ctrl->vs >= NVME_VS(1, 1, 0) && | |
| 1415 | + !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) | |
| 1416 | + memcpy(ids->eui64, (*id)->eui64, sizeof(ids->eui64)); | |
| 1417 | + if (ctrl->vs >= NVME_VS(1, 2, 0) && | |
| 1418 | + !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) | |
| 1419 | + memcpy(ids->nguid, (*id)->nguid, sizeof(ids->nguid)); | |
| 1420 | + } | |
| 1408 | 1421 | |
| 1409 | 1422 | return 0; |
| 1410 | 1423 | |
| @@ -144,6 +144,11 @@ enum nvme_quirks { · 143 unmodified lines | ||
| 144 | 144 | * encoding the generation sequence number. |
| 145 | 145 | */ |
| 146 | 146 | NVME_QUIRK_SKIP_CID_GEN = (1 << 17), |
| 147 | + | |
| 148 | + /* | |
| 149 | + * Reports garbage in the namespace identifiers (eui64, nguid, uuid). | |
| 150 | + */ | |
| 151 | + NVME_QUIRK_BOGUS_NID = (1 << 18), | |
| 147 | 152 | }; |
| 148 | 153 | |
| 149 | 154 | /* |
| @@ -3409,7 +3409,10 @@ static const struct pci_device_id nvme_id_table[] = { · 3408 unmodified lines | ||
| 3409 | 3409 | .driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, }, |
| 3410 | 3410 | { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */ |
| 3411 | 3411 | .driver_data = NVME_QUIRK_IDENTIFY_CNS | |
| 3412 | − NVME_QUIRK_DISABLE_WRITE_ZEROES, }, | |
| 3412 | + NVME_QUIRK_DISABLE_WRITE_ZEROES | | |
| 3413 | + NVME_QUIRK_BOGUS_NID, }, | |
| 3414 | + { PCI_VDEVICE(REDHAT, 0x0010), /* Qemu emulated controller */ | |
| 3415 | + .driver_data = NVME_QUIRK_BOGUS_NID, }, | |
| 3413 | 3416 | { PCI_DEVICE(0x126f, 0x2263), /* Silicon Motion unidentified */ |
| 3414 | 3417 | .driver_data = NVME_QUIRK_NO_NS_DESC_LIST, }, |
| 3415 | 3418 | { PCI_DEVICE(0x1bb1, 0x0100), /* Seagate Nytro Flash Storage */ |
| @@ -3447,6 +3450,10 @@ static const struct pci_device_id nvme_id_table[] = { · 31 unmodified lines | ||
| 3447 | 3450 | .driver_data = NVME_QUIRK_NO_DEEPEST_PS, }, |
| 3448 | 3451 | { PCI_DEVICE(0x2646, 0x2263), /* KINGSTON A2000 NVMe SSD */ |
| 3449 | 3452 | .driver_data = NVME_QUIRK_NO_DEEPEST_PS, }, |
| 3453 | + { PCI_DEVICE(0x1e4B, 0x1002), /* MAXIO MAP1002 */ | |
| 3454 | + .driver_data = NVME_QUIRK_BOGUS_NID, }, | |
| 3455 | + { PCI_DEVICE(0x1e4B, 0x1202), /* MAXIO MAP1202 */ | |
| 3456 | + .driver_data = NVME_QUIRK_BOGUS_NID, }, | |
| 3450 | 3457 | { PCI_DEVICE(PCI_VENDOR_ID_AMAZON, 0x0061), |
| 3451 | 3458 | .driver_data = NVME_QUIRK_DMA_ADDRESS_BITS_48, }, |
| 3452 | 3459 | { PCI_DEVICE(PCI_VENDOR_ID_AMAZON, 0x0065), |
| @@ -400,6 +400,9 @@ validate_group(struct perf_event *event) · 399 unmodified lines | ||
| 400 | 400 | if (!validate_event(event->pmu, &fake_pmu, leader)) |
| 401 | 401 | return -EINVAL; |
| 402 | 402 | |
| 403 | + if (event == leader) | |
| 404 | + return 0; | |
| 405 | + | |
| 403 | 406 | for_each_sibling_event(sibling, leader) { |
| 404 | 407 | if (!validate_event(event->pmu, &fake_pmu, sibling)) |
| 405 | 408 | return -EINVAL; |
| @@ -489,12 +492,7 @@ __hw_perf_event_init(struct perf_event *event) · 83 unmodified lines | ||
| 489 | 492 | local64_set(&hwc->period_left, hwc->sample_period); |
| 490 | 493 | } |
| 491 | 494 | |
| 492 | − if (event->group_leader != event) { | |
| 493 | − if (validate_group(event) != 0) | |
| 494 | − return -EINVAL; | |
| 495 | − } | |
| 496 | − | |
| 497 | − return 0; | |
| 495 | + return validate_group(event); | |
| 498 | 496 | } |
| 499 | 497 | |
| 500 | 498 | static int armpmu_event_init(struct perf_event *event) |
| @@ -414,19 +414,19 @@ static int phy_g12a_usb3_pcie_probe(struct platform_device *pdev) · 413 unmodified lines | ||
| 414 | 414 | |
| 415 | 415 | ret = clk_prepare_enable(priv->clk_ref); |
| 416 | 416 | if (ret) |
| 417 | − goto err_disable_clk_ref; | |
| 417 | + return ret; | |
| 418 | 418 | |
| 419 | 419 | priv->reset = devm_reset_control_array_get_exclusive(dev); |
| 420 | − if (IS_ERR(priv->reset)) | |
| 421 | − return PTR_ERR(priv->reset); | |
| 420 | + if (IS_ERR(priv->reset)) { | |
| 421 | + ret = PTR_ERR(priv->reset); | |
| 422 | + goto err_disable_clk_ref; | |
| 423 | + } | |
| 422 | 424 | |
| 423 | 425 | priv->phy = devm_phy_create(dev, np, &phy_g12a_usb3_pcie_ops); |
| 424 | 426 | if (IS_ERR(priv->phy)) { |
| 425 | 427 | ret = PTR_ERR(priv->phy); |
| 426 | − if (ret != -EPROBE_DEFER) | |
| 427 | − dev_err(dev, "failed to create PHY\n"); | |
| 428 | − | |
| 429 | − return ret; | |
| 428 | + dev_err_probe(dev, ret, "failed to create PHY\n"); | |
| 429 | + goto err_disable_clk_ref; | |
| 430 | 430 | } |
| 431 | 431 | |
| 432 | 432 | phy_set_drvdata(priv->phy, priv); |
| @@ -434,8 +434,12 @@ static int phy_g12a_usb3_pcie_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 434 | 434 | |
| 435 | 435 | phy_provider = devm_of_phy_provider_register(dev, |
| 436 | 436 | phy_g12a_usb3_pcie_xlate); |
| 437 | + if (IS_ERR(phy_provider)) { | |
| 438 | + ret = PTR_ERR(phy_provider); | |
| 439 | + goto err_disable_clk_ref; | |
| 440 | + } | |
| 437 | 441 | |
| 438 | − return PTR_ERR_OR_ZERO(phy_provider); | |
| 442 | + return 0; | |
| 439 | 443 | |
| 440 | 444 | err_disable_clk_ref: |
| 441 | 445 | clk_disable_unprepare(priv->clk_ref); |
| @@ -629,7 +629,8 @@ idle: · 628 unmodified lines | ||
| 629 | 629 | cleanup: |
| 630 | 630 | if (error < 0) |
| 631 | 631 | phy_mdm6600_device_power_off(ddata); |
| 632 | − | |
| 632 | + pm_runtime_disable(ddata->dev); | |
| 633 | + pm_runtime_dont_use_autosuspend(ddata->dev); | |
| 633 | 634 | return error; |
| 634 | 635 | } |
| 635 | 636 | |
| @@ -187,6 +187,7 @@ static int exynos_sata_phy_probe(struct platform_device *pdev) · 186 unmodified lines | ||
| 187 | 187 | return -EINVAL; |
| 188 | 188 | |
| 189 | 189 | sata_phy->client = of_find_i2c_device_by_node(node); |
| 190 | + of_node_put(node); | |
| 190 | 191 | if (!sata_phy->client) |
| 191 | 192 | return -EPROBE_DEFER; |
| 192 | 193 | |
| @@ -195,20 +196,21 @@ static int exynos_sata_phy_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 195 | 196 | sata_phy->phyclk = devm_clk_get(dev, "sata_phyctrl"); |
| 196 | 197 | if (IS_ERR(sata_phy->phyclk)) { |
| 197 | 198 | dev_err(dev, "failed to get clk for PHY\n"); |
| 198 | − return PTR_ERR(sata_phy->phyclk); | |
| 199 | + ret = PTR_ERR(sata_phy->phyclk); | |
| 200 | + goto put_dev; | |
| 199 | 201 | } |
| 200 | 202 | |
| 201 | 203 | ret = clk_prepare_enable(sata_phy->phyclk); |
| 202 | 204 | if (ret < 0) { |
| 203 | 205 | dev_err(dev, "failed to enable source clk\n"); |
| 204 | − return ret; | |
| 206 | + goto put_dev; | |
| 205 | 207 | } |
| 206 | 208 | |
| 207 | 209 | sata_phy->phy = devm_phy_create(dev, NULL, &exynos_sata_phy_ops); |
| 208 | 210 | if (IS_ERR(sata_phy->phy)) { |
| 209 | − clk_disable_unprepare(sata_phy->phyclk); | |
| 210 | 211 | dev_err(dev, "failed to create PHY\n"); |
| 211 | − return PTR_ERR(sata_phy->phy); | |
| 212 | + ret = PTR_ERR(sata_phy->phy); | |
| 213 | + goto clk_disable; | |
| 212 | 214 | } |
| 213 | 215 | |
| 214 | 216 | phy_set_drvdata(sata_phy->phy, sata_phy); |
| @@ -216,11 +218,18 @@ static int exynos_sata_phy_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 216 | 218 | phy_provider = devm_of_phy_provider_register(dev, |
| 217 | 219 | of_phy_simple_xlate); |
| 218 | 220 | if (IS_ERR(phy_provider)) { |
| 219 | − clk_disable_unprepare(sata_phy->phyclk); | |
| 220 | − return PTR_ERR(phy_provider); | |
| 221 | + ret = PTR_ERR(phy_provider); | |
| 222 | + goto clk_disable; | |
| 221 | 223 | } |
| 222 | 224 | |
| 223 | 225 | return 0; |
| 226 | + | |
| 227 | +clk_disable: | |
| 228 | + clk_disable_unprepare(sata_phy->phyclk); | |
| 229 | +put_dev: | |
| 230 | + put_device(&sata_phy->client->dev); | |
| 231 | + | |
| 232 | + return ret; | |
| 224 | 233 | } |
| 225 | 234 | |
| 226 | 235 | static const struct of_device_id exynos_sata_phy_of_match[] = { |
| @@ -838,7 +838,7 @@ static int serdes_am654_probe(struct platform_device *pdev) · 837 unmodified lines | ||
| 838 | 838 | |
| 839 | 839 | clk_err: |
| 840 | 840 | of_clk_del_provider(node); |
| 841 | − | |
| 841 | + pm_runtime_disable(dev); | |
| 842 | 842 | return ret; |
| 843 | 843 | } |
| 844 | 844 | |
| @@ -215,7 +215,7 @@ static int omap_usb2_enable_clocks(struct omap_usb *phy) · 214 unmodified lines | ||
| 215 | 215 | return 0; |
| 216 | 216 | |
| 217 | 217 | err1: |
| 218 | − clk_disable(phy->wkupclk); | |
| 218 | + clk_disable_unprepare(phy->wkupclk); | |
| 219 | 219 | |
| 220 | 220 | err0: |
| 221 | 221 | return ret; |
| @@ -696,6 +696,7 @@ static int ti_pipe3_get_sysctrl(struct ti_pipe3 *phy) · 695 unmodified lines | ||
| 696 | 696 | } |
| 697 | 697 | |
| 698 | 698 | control_pdev = of_find_device_by_node(control_node); |
| 699 | + of_node_put(control_node); | |
| 699 | 700 | if (!control_pdev) { |
| 700 | 701 | dev_err(dev, "Failed to get control device\n"); |
| 701 | 702 | return -EINVAL; |
| @@ -155,7 +155,7 @@ static int tusb1210_set_mode(struct phy *phy, enum phy_mode mode, int submode) · 154 unmodified lines | ||
| 155 | 155 | } |
| 156 | 156 | |
| 157 | 157 | #ifdef CONFIG_POWER_SUPPLY |
| 158 | −const char * const tusb1210_chg_det_states[] = { | |
| 158 | +static const char * const tusb1210_chg_det_states[] = { | |
| 159 | 159 | "CHG_DET_CONNECTING", |
| 160 | 160 | "CHG_DET_START_DET", |
| 161 | 161 | "CHG_DET_READ_DET", |
| @@ -537,12 +537,18 @@ static int tusb1210_probe(struct ulpi *ulpi) · 375 unmodified lines | ||
| 537 | 537 | tusb1210_probe_charger_detect(tusb); |
| 538 | 538 | |
| 539 | 539 | tusb->phy = ulpi_phy_create(ulpi, &phy_ops); |
| 540 | − if (IS_ERR(tusb->phy)) | |
| 541 | − return PTR_ERR(tusb->phy); | |
| 540 | + if (IS_ERR(tusb->phy)) { | |
| 541 | + ret = PTR_ERR(tusb->phy); | |
| 542 | + goto err_remove_charger; | |
| 543 | + } | |
| 542 | 544 | |
| 543 | 545 | phy_set_drvdata(tusb->phy, tusb); |
| 544 | 546 | ulpi_set_drvdata(ulpi, tusb); |
| 545 | 547 | return 0; |
| 548 | + | |
| 549 | +err_remove_charger: | |
| 550 | + tusb1210_remove_charger_detect(tusb); | |
| 551 | + return ret; | |
| 546 | 552 | } |
| 547 | 553 | |
| 548 | 554 | static void tusb1210_remove(struct ulpi *ulpi) |
| @@ -14,11 +14,17 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | #include "pinctrl-intel.h" |
| 16 | 16 | |
| 17 | −#define ADL_PAD_OWN 0x0a0 | |
| 18 | −#define ADL_PADCFGLOCK 0x110 | |
| 19 | −#define ADL_HOSTSW_OWN 0x150 | |
| 20 | −#define ADL_GPI_IS 0x200 | |
| 21 | −#define ADL_GPI_IE 0x220 | |
| 17 | +#define ADL_N_PAD_OWN 0x020 | |
| 18 | +#define ADL_N_PADCFGLOCK 0x080 | |
| 19 | +#define ADL_N_HOSTSW_OWN 0x0b0 | |
| 20 | +#define ADL_N_GPI_IS 0x100 | |
| 21 | +#define ADL_N_GPI_IE 0x120 | |
| 22 | + | |
| 23 | +#define ADL_S_PAD_OWN 0x0a0 | |
| 24 | +#define ADL_S_PADCFGLOCK 0x110 | |
| 25 | +#define ADL_S_HOSTSW_OWN 0x150 | |
| 26 | +#define ADL_S_GPI_IS 0x200 | |
| 27 | +#define ADL_S_GPI_IE 0x220 | |
| 22 | 28 | |
| 23 | 29 | #define ADL_GPP(r, s, e, g) \ |
| 24 | 30 | { \ |
| @@ -28,14 +34,28 @@ · 3 unmodified lines | ||
| 28 | 34 | .gpio_base = (g), \ |
| 29 | 35 | } |
| 30 | 36 | |
| 31 | −#define ADL_COMMUNITY(b, s, e, g) \ | |
| 37 | +#define ADL_N_COMMUNITY(b, s, e, g) \ | |
| 38 | + { \ | |
| 39 | + .barno = (b), \ | |
| 40 | + .padown_offset = ADL_N_PAD_OWN, \ | |
| 41 | + .padcfglock_offset = ADL_N_PADCFGLOCK, \ | |
| 42 | + .hostown_offset = ADL_N_HOSTSW_OWN, \ | |
| 43 | + .is_offset = ADL_N_GPI_IS, \ | |
| 44 | + .ie_offset = ADL_N_GPI_IE, \ | |
| 45 | + .pin_base = (s), \ | |
| 46 | + .npins = ((e) - (s) + 1), \ | |
| 47 | + .gpps = (g), \ | |
| 48 | + .ngpps = ARRAY_SIZE(g), \ | |
| 49 | + } | |
| 50 | + | |
| 51 | +#define ADL_S_COMMUNITY(b, s, e, g) \ | |
| 32 | 52 | { \ |
| 33 | 53 | .barno = (b), \ |
| 34 | − .padown_offset = ADL_PAD_OWN, \ | |
| 35 | − .padcfglock_offset = ADL_PADCFGLOCK, \ | |
| 36 | − .hostown_offset = ADL_HOSTSW_OWN, \ | |
| 37 | − .is_offset = ADL_GPI_IS, \ | |
| 38 | − .ie_offset = ADL_GPI_IE, \ | |
| 54 | + .padown_offset = ADL_S_PAD_OWN, \ | |
| 55 | + .padcfglock_offset = ADL_S_PADCFGLOCK, \ | |
| 56 | + .hostown_offset = ADL_S_HOSTSW_OWN, \ | |
| 57 | + .is_offset = ADL_S_GPI_IS, \ | |
| 58 | + .ie_offset = ADL_S_GPI_IE, \ | |
| 39 | 59 | .pin_base = (s), \ |
| 40 | 60 | .npins = ((e) - (s) + 1), \ |
| 41 | 61 | .gpps = (g), \ |
| @@ -342,10 +362,10 @@ static const struct intel_padgroup adln_community5_gpps[] = { · 300 unmodified lines | ||
| 342 | 362 | }; |
| 343 | 363 | |
| 344 | 364 | static const struct intel_community adln_communities[] = { |
| 345 | − ADL_COMMUNITY(0, 0, 66, adln_community0_gpps), | |
| 346 | − ADL_COMMUNITY(1, 67, 168, adln_community1_gpps), | |
| 347 | − ADL_COMMUNITY(2, 169, 248, adln_community4_gpps), | |
| 348 | − ADL_COMMUNITY(3, 249, 256, adln_community5_gpps), | |
| 365 | + ADL_N_COMMUNITY(0, 0, 66, adln_community0_gpps), | |
| 366 | + ADL_N_COMMUNITY(1, 67, 168, adln_community1_gpps), | |
| 367 | + ADL_N_COMMUNITY(2, 169, 248, adln_community4_gpps), | |
| 368 | + ADL_N_COMMUNITY(3, 249, 256, adln_community5_gpps), | |
| 349 | 369 | }; |
| 350 | 370 | |
| 351 | 371 | static const struct intel_pinctrl_soc_data adln_soc_data = { |
| @@ -713,11 +733,11 @@ static const struct intel_padgroup adls_community5_gpps[] = { · 361 unmodified lines | ||
| 713 | 733 | }; |
| 714 | 734 | |
| 715 | 735 | static const struct intel_community adls_communities[] = { |
| 716 | − ADL_COMMUNITY(0, 0, 94, adls_community0_gpps), | |
| 717 | − ADL_COMMUNITY(1, 95, 150, adls_community1_gpps), | |
| 718 | − ADL_COMMUNITY(2, 151, 199, adls_community3_gpps), | |
| 719 | − ADL_COMMUNITY(3, 200, 269, adls_community4_gpps), | |
| 720 | − ADL_COMMUNITY(4, 270, 303, adls_community5_gpps), | |
| 736 | + ADL_S_COMMUNITY(0, 0, 94, adls_community0_gpps), | |
| 737 | + ADL_S_COMMUNITY(1, 95, 150, adls_community1_gpps), | |
| 738 | + ADL_S_COMMUNITY(2, 151, 199, adls_community3_gpps), | |
| 739 | + ADL_S_COMMUNITY(3, 200, 269, adls_community4_gpps), | |
| 740 | + ADL_S_COMMUNITY(4, 270, 303, adls_community5_gpps), | |
| 721 | 741 | }; |
| 722 | 742 | |
| 723 | 743 | static const struct intel_pinctrl_soc_data adls_soc_data = { |
| @@ -30,6 +30,7 @@ config PINCTRL_MTK_MOORE · 29 unmodified lines | ||
| 30 | 30 | select GENERIC_PINMUX_FUNCTIONS |
| 31 | 31 | select GPIOLIB |
| 32 | 32 | select OF_GPIO |
| 33 | + select EINT_MTK | |
| 33 | 34 | select PINCTRL_MTK_V2 |
| 34 | 35 | |
| 35 | 36 | config PINCTRL_MTK_PARIS |
| @@ -1374,10 +1374,10 @@ static int pistachio_gpio_register(struct pistachio_pinctrl *pctl) · 1373 unmodified lines | ||
| 1374 | 1374 | } |
| 1375 | 1375 | |
| 1376 | 1376 | irq = irq_of_parse_and_map(child, 0); |
| 1377 | − if (irq < 0) { | |
| 1378 | − dev_err(pctl->dev, "No IRQ for bank %u: %d\n", i, irq); | |
| 1377 | + if (!irq) { | |
| 1378 | + dev_err(pctl->dev, "No IRQ for bank %u\n", i); | |
| 1379 | 1379 | of_node_put(child); |
| 1380 | − ret = irq; | |
| 1380 | + ret = -EINVAL; | |
| 1381 | 1381 | goto err; |
| 1382 | 1382 | } |
| 1383 | 1383 | |
| @@ -457,95 +457,110 @@ static struct rockchip_mux_recalced_data rk3128_mux_recalced_data[] = { · 456 unmodified lines | ||
| 457 | 457 | |
| 458 | 458 | static struct rockchip_mux_recalced_data rk3308_mux_recalced_data[] = { |
| 459 | 459 | { |
| 460 | + /* gpio1b6_sel */ | |
| 460 | 461 | .num = 1, |
| 461 | 462 | .pin = 14, |
| 462 | 463 | .reg = 0x28, |
| 463 | 464 | .bit = 12, |
| 464 | 465 | .mask = 0xf |
| 465 | 466 | }, { |
| 467 | + /* gpio1b7_sel */ | |
| 466 | 468 | .num = 1, |
| 467 | 469 | .pin = 15, |
| 468 | 470 | .reg = 0x2c, |
| 469 | 471 | .bit = 0, |
| 470 | 472 | .mask = 0x3 |
| 471 | 473 | }, { |
| 474 | + /* gpio1c2_sel */ | |
| 472 | 475 | .num = 1, |
| 473 | 476 | .pin = 18, |
| 474 | 477 | .reg = 0x30, |
| 475 | 478 | .bit = 4, |
| 476 | 479 | .mask = 0xf |
| 477 | 480 | }, { |
| 481 | + /* gpio1c3_sel */ | |
| 478 | 482 | .num = 1, |
| 479 | 483 | .pin = 19, |
| 480 | 484 | .reg = 0x30, |
| 481 | 485 | .bit = 8, |
| 482 | 486 | .mask = 0xf |
| 483 | 487 | }, { |
| 488 | + /* gpio1c4_sel */ | |
| 484 | 489 | .num = 1, |
| 485 | 490 | .pin = 20, |
| 486 | 491 | .reg = 0x30, |
| 487 | 492 | .bit = 12, |
| 488 | 493 | .mask = 0xf |
| 489 | 494 | }, { |
| 495 | + /* gpio1c5_sel */ | |
| 490 | 496 | .num = 1, |
| 491 | 497 | .pin = 21, |
| 492 | 498 | .reg = 0x34, |
| 493 | 499 | .bit = 0, |
| 494 | 500 | .mask = 0xf |
| 495 | 501 | }, { |
| 502 | + /* gpio1c6_sel */ | |
| 496 | 503 | .num = 1, |
| 497 | 504 | .pin = 22, |
| 498 | 505 | .reg = 0x34, |
| 499 | 506 | .bit = 4, |
| 500 | 507 | .mask = 0xf |
| 501 | 508 | }, { |
| 509 | + /* gpio1c7_sel */ | |
| 502 | 510 | .num = 1, |
| 503 | 511 | .pin = 23, |
| 504 | 512 | .reg = 0x34, |
| 505 | 513 | .bit = 8, |
| 506 | 514 | .mask = 0xf |
| 507 | 515 | }, { |
| 508 | − .num = 3, | |
| 509 | − .pin = 12, | |
| 510 | − .reg = 0x68, | |
| 511 | − .bit = 8, | |
| 512 | − .mask = 0xf | |
| 513 | − }, { | |
| 514 | − .num = 3, | |
| 515 | − .pin = 13, | |
| 516 | − .reg = 0x68, | |
| 517 | − .bit = 12, | |
| 518 | − .mask = 0xf | |
| 519 | − }, { | |
| 516 | + /* gpio2a2_sel */ | |
| 520 | 517 | .num = 2, |
| 521 | 518 | .pin = 2, |
| 522 | − .reg = 0x608, | |
| 523 | − .bit = 0, | |
| 524 | − .mask = 0x7 | |
| 519 | + .reg = 0x40, | |
| 520 | + .bit = 4, | |
| 521 | + .mask = 0x3 | |
| 525 | 522 | }, { |
| 523 | + /* gpio2a3_sel */ | |
| 526 | 524 | .num = 2, |
| 527 | 525 | .pin = 3, |
| 528 | − .reg = 0x608, | |
| 529 | − .bit = 4, | |
| 530 | − .mask = 0x7 | |
| 526 | + .reg = 0x40, | |
| 527 | + .bit = 6, | |
| 528 | + .mask = 0x3 | |
| 531 | 529 | }, { |
| 530 | + /* gpio2c0_sel */ | |
| 532 | 531 | .num = 2, |
| 533 | 532 | .pin = 16, |
| 534 | − .reg = 0x610, | |
| 535 | − .bit = 8, | |
| 536 | − .mask = 0x7 | |
| 533 | + .reg = 0x50, | |
| 534 | + .bit = 0, | |
| 535 | + .mask = 0x3 | |
| 537 | 536 | }, { |
| 537 | + /* gpio3b2_sel */ | |
| 538 | 538 | .num = 3, |
| 539 | 539 | .pin = 10, |
| 540 | − .reg = 0x610, | |
| 541 | − .bit = 0, | |
| 542 | − .mask = 0x7 | |
| 540 | + .reg = 0x68, | |
| 541 | + .bit = 4, | |
| 542 | + .mask = 0x3 | |
| 543 | 543 | }, { |
| 544 | + /* gpio3b3_sel */ | |
| 544 | 545 | .num = 3, |
| 545 | 546 | .pin = 11, |
| 546 | − .reg = 0x610, | |
| 547 | − .bit = 4, | |
| 548 | − .mask = 0x7 | |
| 547 | + .reg = 0x68, | |
| 548 | + .bit = 6, | |
| 549 | + .mask = 0x3 | |
| 550 | + }, { | |
| 551 | + /* gpio3b4_sel */ | |
| 552 | + .num = 3, | |
| 553 | + .pin = 12, | |
| 554 | + .reg = 0x68, | |
| 555 | + .bit = 8, | |
| 556 | + .mask = 0xf | |
| 557 | + }, { | |
| 558 | + /* gpio3b5_sel */ | |
| 559 | + .num = 3, | |
| 560 | + .pin = 13, | |
| 561 | + .reg = 0x68, | |
| 562 | + .bit = 12, | |
| 563 | + .mask = 0xf | |
| 549 | 564 | }, |
| 550 | 565 | }; |
| 551 | 566 | |
| @@ -264,14 +264,14 @@ static const struct pinctrl_pin_desc sm6350_pins[] = { · 263 unmodified lines | ||
| 264 | 264 | PINCTRL_PIN(153, "GPIO_153"), |
| 265 | 265 | PINCTRL_PIN(154, "GPIO_154"), |
| 266 | 266 | PINCTRL_PIN(155, "GPIO_155"), |
| 267 | − PINCTRL_PIN(156, "SDC1_RCLK"), | |
| 268 | − PINCTRL_PIN(157, "SDC1_CLK"), | |
| 269 | − PINCTRL_PIN(158, "SDC1_CMD"), | |
| 270 | − PINCTRL_PIN(159, "SDC1_DATA"), | |
| 271 | − PINCTRL_PIN(160, "SDC2_CLK"), | |
| 272 | − PINCTRL_PIN(161, "SDC2_CMD"), | |
| 273 | − PINCTRL_PIN(162, "SDC2_DATA"), | |
| 274 | − PINCTRL_PIN(163, "UFS_RESET"), | |
| 267 | + PINCTRL_PIN(156, "UFS_RESET"), | |
| 268 | + PINCTRL_PIN(157, "SDC1_RCLK"), | |
| 269 | + PINCTRL_PIN(158, "SDC1_CLK"), | |
| 270 | + PINCTRL_PIN(159, "SDC1_CMD"), | |
| 271 | + PINCTRL_PIN(160, "SDC1_DATA"), | |
| 272 | + PINCTRL_PIN(161, "SDC2_CLK"), | |
| 273 | + PINCTRL_PIN(162, "SDC2_CMD"), | |
| 274 | + PINCTRL_PIN(163, "SDC2_DATA"), | |
| 275 | 275 | }; |
| 276 | 276 | |
| 277 | 277 | #define DECLARE_MSM_GPIO_PINS(pin) \ |
| @@ -4,14 +4,13 @@ · 3 unmodified lines | ||
| 4 | 4 | # |
| 5 | 5 | config PINCTRL_SAMSUNG |
| 6 | 6 | bool |
| 7 | − depends on OF_GPIO | |
| 7 | + select GPIOLIB | |
| 8 | 8 | select PINMUX |
| 9 | 9 | select PINCONF |
| 10 | 10 | |
| 11 | 11 | config PINCTRL_EXYNOS |
| 12 | 12 | bool "Pinctrl common driver part for Samsung Exynos SoCs" |
| 13 | − depends on OF_GPIO | |
| 14 | − depends on ARCH_EXYNOS || ARCH_S5PV210 || COMPILE_TEST | |
| 13 | + depends on ARCH_EXYNOS || ARCH_S5PV210 || (COMPILE_TEST && OF) | |
| 15 | 14 | select PINCTRL_SAMSUNG |
| 16 | 15 | select PINCTRL_EXYNOS_ARM if ARM && (ARCH_EXYNOS || ARCH_S5PV210) |
| 17 | 16 | select PINCTRL_EXYNOS_ARM64 if ARM64 && ARCH_EXYNOS |
| @@ -26,12 +25,10 @@ config PINCTRL_EXYNOS_ARM64 · 8 unmodified lines | ||
| 26 | 25 | |
| 27 | 26 | config PINCTRL_S3C24XX |
| 28 | 27 | bool "Samsung S3C24XX SoC pinctrl driver" |
| 29 | − depends on OF_GPIO | |
| 30 | − depends on ARCH_S3C24XX || COMPILE_TEST | |
| 28 | + depends on ARCH_S3C24XX || (COMPILE_TEST && OF) | |
| 31 | 29 | select PINCTRL_SAMSUNG |
| 32 | 30 | |
| 33 | 31 | config PINCTRL_S3C64XX |
| 34 | 32 | bool "Samsung S3C64XX SoC pinctrl driver" |
| 35 | − depends on OF_GPIO | |
| 36 | − depends on ARCH_S3C64XX || COMPILE_TEST | |
| 33 | + depends on ARCH_S3C64XX || (COMPILE_TEST && OF) | |
| 37 | 34 | select PINCTRL_SAMSUNG |
| @@ -770,7 +770,7 @@ static const struct samsung_pin_bank_data fsd_pin_banks2[] __initconst = { · 769 unmodified lines | ||
| 770 | 770 | EXYNOS850_PIN_BANK_EINTN(3, 0x00, "gpq0"), |
| 771 | 771 | }; |
| 772 | 772 | |
| 773 | −const struct samsung_pin_ctrl fsd_pin_ctrl[] __initconst = { | |
| 773 | +static const struct samsung_pin_ctrl fsd_pin_ctrl[] __initconst = { | |
| 774 | 774 | { |
| 775 | 775 | /* pin-controller instance 0 FSYS0 data */ |
| 776 | 776 | .pin_banks = fsd_pin_banks0, |
| @@ -225,6 +225,13 @@ static void stm32_gpio_free(struct gpio_chip *chip, unsigned offset) · 224 unmodified lines | ||
| 225 | 225 | pinctrl_gpio_free(chip->base + offset); |
| 226 | 226 | } |
| 227 | 227 | |
| 228 | +static int stm32_gpio_get_noclk(struct gpio_chip *chip, unsigned int offset) | |
| 229 | +{ | |
| 230 | + struct stm32_gpio_bank *bank = gpiochip_get_data(chip); | |
| 231 | + | |
| 232 | + return !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset)); | |
| 233 | +} | |
| 234 | + | |
| 228 | 235 | static int stm32_gpio_get(struct gpio_chip *chip, unsigned offset) |
| 229 | 236 | { |
| 230 | 237 | struct stm32_gpio_bank *bank = gpiochip_get_data(chip); |
| @@ -232,7 +239,7 @@ static int stm32_gpio_get(struct gpio_chip *chip, unsigned offset) · 1 unmodified line | ||
| 232 | 239 | |
| 233 | 240 | clk_enable(bank->clk); |
| 234 | 241 | |
| 235 | − ret = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset)); | |
| 242 | + ret = stm32_gpio_get_noclk(chip, offset); | |
| 236 | 243 | |
| 237 | 244 | clk_disable(bank->clk); |
| 238 | 245 | |
| @@ -311,8 +318,12 @@ static void stm32_gpio_irq_trigger(struct irq_data *d) · 72 unmodified lines | ||
| 311 | 318 | struct stm32_gpio_bank *bank = d->domain->host_data; |
| 312 | 319 | int level; |
| 313 | 320 | |
| 321 | + /* Do not access the GPIO if this is not LEVEL triggered IRQ. */ | |
| 322 | + if (!(bank->irq_type[d->hwirq] & IRQ_TYPE_LEVEL_MASK)) | |
| 323 | + return; | |
| 324 | + | |
| 314 | 325 | /* If level interrupt type then retrig */ |
| 315 | − level = stm32_gpio_get(&bank->gpio_chip, d->hwirq); | |
| 326 | + level = stm32_gpio_get_noclk(&bank->gpio_chip, d->hwirq); | |
| 316 | 327 | if ((level == 0 && bank->irq_type[d->hwirq] == IRQ_TYPE_LEVEL_LOW) || |
| 317 | 328 | (level == 1 && bank->irq_type[d->hwirq] == IRQ_TYPE_LEVEL_HIGH)) |
| 318 | 329 | irq_chip_retrigger_hierarchy(d); |
| @@ -354,6 +365,7 @@ static int stm32_gpio_irq_request_resources(struct irq_data *irq_data) · 35 unmodified lines | ||
| 354 | 365 | { |
| 355 | 366 | struct stm32_gpio_bank *bank = irq_data->domain->host_data; |
| 356 | 367 | struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); |
| 368 | + unsigned long flags; | |
| 357 | 369 | int ret; |
| 358 | 370 | |
| 359 | 371 | ret = stm32_gpio_direction_input(&bank->gpio_chip, irq_data->hwirq); |
| @@ -367,6 +379,10 @@ static int stm32_gpio_irq_request_resources(struct irq_data *irq_data) · 7 unmodified lines | ||
| 367 | 379 | return ret; |
| 368 | 380 | } |
| 369 | 381 | |
| 382 | + flags = irqd_get_trigger_type(irq_data); | |
| 383 | + if (flags & IRQ_TYPE_LEVEL_MASK) | |
| 384 | + clk_enable(bank->clk); | |
| 385 | + | |
| 370 | 386 | return 0; |
| 371 | 387 | } |
| 372 | 388 | |
| @@ -374,6 +390,9 @@ static void stm32_gpio_irq_release_resources(struct irq_data *irq_data) · 1 unmodified line | ||
| 374 | 390 | { |
| 375 | 391 | struct stm32_gpio_bank *bank = irq_data->domain->host_data; |
| 376 | 392 | |
| 393 | + if (bank->irq_type[irq_data->hwirq] & IRQ_TYPE_LEVEL_MASK) | |
| 394 | + clk_disable(bank->clk); | |
| 395 | + | |
| 377 | 396 | gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq); |
| 378 | 397 | } |
| 379 | 398 | |
| @@ -419,7 +419,15 @@ static const struct sppctl_grp sp7021grps_prbp[] = { · 418 unmodified lines | ||
| 419 | 419 | EGRP("PROBE_PORT2", 2, pins_prp2), |
| 420 | 420 | }; |
| 421 | 421 | |
| 422 | +/* | |
| 423 | + * Due to compatible reason, the first valid item should start at the third | |
| 424 | + * position of the array. Please keep the first two items of the table | |
| 425 | + * no use (dummy). | |
| 426 | + */ | |
| 422 | 427 | const struct sppctl_func sppctl_list_funcs[] = { |
| 428 | + FNCN("", pinmux_type_fpmx, 0x00, 0, 0), | |
| 429 | + FNCN("", pinmux_type_fpmx, 0x00, 0, 0), | |
| 430 | + | |
| 423 | 431 | FNCN("L2SW_CLK_OUT", pinmux_type_fpmx, 0x00, 0, 7), |
| 424 | 432 | FNCN("L2SW_MAC_SMI_MDC", pinmux_type_fpmx, 0x00, 8, 7), |
| 425 | 433 | FNCN("L2SW_LED_FLASH0", pinmux_type_fpmx, 0x01, 0, 7), |
| @@ -584,21 +584,6 @@ static struct platform_driver acerhdf_driver = { · 583 unmodified lines | ||
| 584 | 584 | .remove = acerhdf_remove, |
| 585 | 585 | }; |
| 586 | 586 | |
| 587 | −/* checks if str begins with start */ | |
| 588 | −static int str_starts_with(const char *str, const char *start) | |
| 589 | −{ | |
| 590 | − unsigned long str_len = 0, start_len = 0; | |
| 591 | − | |
| 592 | − str_len = strlen(str); | |
| 593 | − start_len = strlen(start); | |
| 594 | − | |
| 595 | − if (str_len >= start_len && | |
| 596 | − !strncmp(str, start, start_len)) | |
| 597 | − return 1; | |
| 598 | − | |
| 599 | − return 0; | |
| 600 | −} | |
| 601 | − | |
| 602 | 587 | /* check hardware */ |
| 603 | 588 | static int __init acerhdf_check_hardware(void) |
| 604 | 589 | { |
| @@ -651,9 +636,9 @@ static int __init acerhdf_check_hardware(void) · 46 unmodified lines | ||
| 651 | 636 | * check if actual hardware BIOS vendor, product and version |
| 652 | 637 | * IDs start with the strings of BIOS table entry |
| 653 | 638 | */ |
| 654 | − if (str_starts_with(vendor, bt->vendor) && | |
| 655 | − str_starts_with(product, bt->product) && | |
| 656 | − str_starts_with(version, bt->version)) { | |
| 639 | + if (strstarts(vendor, bt->vendor) && | |
| 640 | + strstarts(product, bt->product) && | |
| 641 | + strstarts(version, bt->version)) { | |
| 657 | 642 | found = 1; |
| 658 | 643 | break; |
| 659 | 644 | } |
| @@ -160,8 +160,10 @@ MODULE_PARM_DESC(enable_stb, "Enable the STB debug mechanism"); · 159 unmodified lines | ||
| 160 | 160 | |
| 161 | 161 | static struct amd_pmc_dev pmc; |
| 162 | 162 | static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, u32 arg, u32 *data, u8 msg, bool ret); |
| 163 | −static int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data); | |
| 164 | 163 | static int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf); |
| 164 | +#ifdef CONFIG_SUSPEND | |
| 165 | +static int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data); | |
| 166 | +#endif | |
| 165 | 167 | |
| 166 | 168 | static inline u32 amd_pmc_reg_read(struct amd_pmc_dev *dev, int reg_offset) |
| 167 | 169 | { |
| @@ -325,6 +327,7 @@ static int get_metrics_table(struct amd_pmc_dev *pdev, struct smu_metrics *table · 157 unmodified lines | ||
| 325 | 327 | return 0; |
| 326 | 328 | } |
| 327 | 329 | |
| 330 | +#ifdef CONFIG_SUSPEND | |
| 328 | 331 | static void amd_pmc_validate_deepest(struct amd_pmc_dev *pdev) |
| 329 | 332 | { |
| 330 | 333 | struct smu_metrics table; |
| @@ -338,6 +341,7 @@ static void amd_pmc_validate_deepest(struct amd_pmc_dev *pdev) · 7 unmodified lines | ||
| 338 | 341 | dev_dbg(pdev->dev, "Last suspend in deepest state for %lluus\n", |
| 339 | 342 | table.timein_s0i3_lastcapture); |
| 340 | 343 | } |
| 344 | +#endif | |
| 341 | 345 | |
| 342 | 346 | #ifdef CONFIG_DEBUG_FS |
| 343 | 347 | static int smu_fw_info_show(struct seq_file *s, void *unused) |
| @@ -569,6 +573,7 @@ out_unlock: · 225 unmodified lines | ||
| 569 | 573 | return rc; |
| 570 | 574 | } |
| 571 | 575 | |
| 576 | +#ifdef CONFIG_SUSPEND | |
| 572 | 577 | static int amd_pmc_get_os_hint(struct amd_pmc_dev *dev) |
| 573 | 578 | { |
| 574 | 579 | switch (dev->cpu_id) { |
| @@ -694,6 +699,7 @@ static struct acpi_s2idle_dev_ops amd_pmc_s2idle_dev_ops = { · 119 unmodified lines | ||
| 694 | 699 | .prepare = amd_pmc_s2idle_prepare, |
| 695 | 700 | .restore = amd_pmc_s2idle_restore, |
| 696 | 701 | }; |
| 702 | +#endif | |
| 697 | 703 | |
| 698 | 704 | static const struct pci_device_id pmc_pci_ids[] = { |
| 699 | 705 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_YC) }, |
| @@ -733,6 +739,7 @@ static int amd_pmc_s2d_init(struct amd_pmc_dev *dev) · 33 unmodified lines | ||
| 733 | 739 | return 0; |
| 734 | 740 | } |
| 735 | 741 | |
| 742 | +#ifdef CONFIG_SUSPEND | |
| 736 | 743 | static int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data) |
| 737 | 744 | { |
| 738 | 745 | int err; |
| @@ -753,6 +760,7 @@ static int amd_pmc_write_stb(struct amd_pmc_dev *dev, u32 data) · 14 unmodified lines | ||
| 753 | 760 | |
| 754 | 761 | return 0; |
| 755 | 762 | } |
| 763 | +#endif | |
| 756 | 764 | |
| 757 | 765 | static int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf) |
| 758 | 766 | { |
| @@ -859,9 +867,11 @@ static int amd_pmc_probe(struct platform_device *pdev) · 100 unmodified lines | ||
| 859 | 867 | |
| 860 | 868 | amd_pmc_get_smu_version(dev); |
| 861 | 869 | platform_set_drvdata(pdev, dev); |
| 870 | +#ifdef CONFIG_SUSPEND | |
| 862 | 871 | err = acpi_register_lps0_dev(&amd_pmc_s2idle_dev_ops); |
| 863 | 872 | if (err) |
| 864 | 873 | dev_warn(dev->dev, "failed to register LPS0 sleep handler, expect increased power consumption\n"); |
| 874 | +#endif | |
| 865 | 875 | |
| 866 | 876 | amd_pmc_dbgfs_register(dev); |
| 867 | 877 | return 0; |
| @@ -875,7 +885,9 @@ static int amd_pmc_remove(struct platform_device *pdev) · 7 unmodified lines | ||
| 875 | 885 | { |
| 876 | 886 | struct amd_pmc_dev *dev = platform_get_drvdata(pdev); |
| 877 | 887 | |
| 888 | +#ifdef CONFIG_SUSPEND | |
| 878 | 889 | acpi_unregister_lps0_dev(&amd_pmc_s2idle_dev_ops); |
| 890 | +#endif | |
| 879 | 891 | amd_pmc_dbgfs_unregister(dev); |
| 880 | 892 | pci_dev_put(dev->rdev); |
| 881 | 893 | mutex_destroy(&dev->lock); |
| @@ -371,10 +371,14 @@ static int asus_wmi_evaluate_method_buf(u32 method_id, · 370 unmodified lines | ||
| 371 | 371 | |
| 372 | 372 | switch (obj->type) { |
| 373 | 373 | case ACPI_TYPE_BUFFER: |
| 374 | − if (obj->buffer.length > size) | |
| 374 | + if (obj->buffer.length > size) { | |
| 375 | 375 | err = -ENOSPC; |
| 376 | − if (obj->buffer.length == 0) | |
| 376 | + break; | |
| 377 | + } | |
| 378 | + if (obj->buffer.length == 0) { | |
| 377 | 379 | err = -ENODATA; |
| 380 | + break; | |
| 381 | + } | |
| 378 | 382 | |
| 379 | 383 | memcpy(ret_buffer, obj->buffer.pointer, obj->buffer.length); |
| 380 | 384 | break; |
| @@ -2223,9 +2227,10 @@ static int fan_curve_check_present(struct asus_wmi *asus, bool *available, · 1842 unmodified lines | ||
| 2223 | 2227 | |
| 2224 | 2228 | err = fan_curve_get_factory_default(asus, fan_dev); |
| 2225 | 2229 | if (err) { |
| 2226 | − if (err == -ENODEV || err == -ENODATA) | |
| 2227 | − return 0; | |
| 2228 | − return err; | |
| 2230 | + pr_debug("fan_curve_get_factory_default(0x%08x) failed: %d\n", | |
| 2231 | + fan_dev, err); | |
| 2232 | + /* Don't cause probe to fail on devices without fan-curves */ | |
| 2233 | + return 0; | |
| 2229 | 2234 | } |
| 2230 | 2235 | |
| 2231 | 2236 | *available = true; |
| @@ -10,7 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | |
| 11 | 11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 12 | 12 | |
| 13 | −#include <linux/io.h> | |
| 14 | 13 | #include <linux/delay.h> |
| 15 | 14 | #include <linux/dmi.h> |
| 16 | 15 | #include <linux/err.h> |
| @@ -80,6 +80,10 @@ static struct quirk_entry quirk_dell_inspiron_1012 = { · 79 unmodified lines | ||
| 80 | 80 | .kbd_led_not_present = true, |
| 81 | 81 | }; |
| 82 | 82 | |
| 83 | +static struct quirk_entry quirk_dell_latitude_7520 = { | |
| 84 | + .kbd_missing_ac_tag = true, | |
| 85 | +}; | |
| 86 | + | |
| 83 | 87 | static struct platform_driver platform_driver = { |
| 84 | 88 | .driver = { |
| 85 | 89 | .name = "dell-laptop", |
| @@ -336,6 +340,15 @@ static const struct dmi_system_id dell_quirks[] __initconst = { · 250 unmodified lines | ||
| 336 | 340 | }, |
| 337 | 341 | .driver_data = &quirk_dell_inspiron_1012, |
| 338 | 342 | }, |
| 343 | + { | |
| 344 | + .callback = dmi_matched, | |
| 345 | + .ident = "Dell Latitude 7520", | |
| 346 | + .matches = { | |
| 347 | + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
| 348 | + DMI_MATCH(DMI_PRODUCT_NAME, "Latitude 7520"), | |
| 349 | + }, | |
| 350 | + .driver_data = &quirk_dell_latitude_7520, | |
| 351 | + }, | |
| 339 | 352 | { } |
| 340 | 353 | }; |
| 341 | 354 | |
| @@ -148,6 +148,7 @@ static const struct dmi_system_id gigabyte_wmi_known_working_platforms[] = { · 147 unmodified lines | ||
| 148 | 148 | DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B550I AORUS PRO AX"), |
| 149 | 149 | DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B550M AORUS PRO-P"), |
| 150 | 150 | DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B550M DS3H"), |
| 151 | + DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("B660 GAMING X DDR4"), | |
| 151 | 152 | DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("Z390 I AORUS PRO WIFI-CF"), |
| 152 | 153 | DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("X570 AORUS ELITE"), |
| 153 | 154 | DMI_EXACT_MATCH_GIGABYTE_BOARD_NAME("X570 GAMING X"), |
| @@ -236,7 +236,7 @@ enum ppfear_regs { · 235 unmodified lines | ||
| 236 | 236 | #define ADL_LPM_STATUS_LATCH_EN_OFFSET 0x1704 |
| 237 | 237 | #define ADL_LPM_LIVE_STATUS_OFFSET 0x1764 |
| 238 | 238 | |
| 239 | −const char *pmc_lpm_modes[] = { | |
| 239 | +static const char *pmc_lpm_modes[] = { | |
| 240 | 240 | "S0i2.0", |
| 241 | 241 | "S0i2.1", |
| 242 | 242 | "S0i2.2", |
| @@ -51,6 +51,8 @@ · 50 unmodified lines | ||
| 51 | 51 | #define MBOX_TIMEOUT_US 2000 |
| 52 | 52 | #define MBOX_TIMEOUT_ACQUIRE_US 1000 |
| 53 | 53 | #define MBOX_POLLING_PERIOD_US 100 |
| 54 | +#define MBOX_ACQUIRE_NUM_RETRIES 5 | |
| 55 | +#define MBOX_ACQUIRE_RETRY_DELAY_MS 500 | |
| 54 | 56 | #define MBOX_MAX_PACKETS 4 |
| 55 | 57 | |
| 56 | 58 | #define MBOX_OWNER_NONE 0x00 |
| @@ -81,7 +83,7 @@ enum sdsi_command { · 24 unmodified lines | ||
| 81 | 83 | |
| 82 | 84 | struct sdsi_mbox_info { |
| 83 | 85 | u64 *payload; |
| 84 | − u64 *buffer; | |
| 86 | + void *buffer; | |
| 85 | 87 | int size; |
| 86 | 88 | }; |
| 87 | 89 | |
| @@ -163,9 +165,7 @@ static int sdsi_mbox_cmd_read(struct sdsi_priv *priv, struct sdsi_mbox_info *inf · 75 unmodified lines | ||
| 163 | 165 | total = 0; |
| 164 | 166 | loop = 0; |
| 165 | 167 | do { |
| 166 | − int offset = SDSI_SIZE_MAILBOX * loop; | |
| 167 | − void __iomem *addr = priv->mbox_addr + offset; | |
| 168 | − u64 *buf = info->buffer + offset / SDSI_SIZE_CMD; | |
| 168 | + void *buf = info->buffer + (SDSI_SIZE_MAILBOX * loop); | |
| 169 | 169 | u32 packet_size; |
| 170 | 170 | |
| 171 | 171 | /* Poll on ready bit */ |
| @@ -196,7 +196,7 @@ static int sdsi_mbox_cmd_read(struct sdsi_priv *priv, struct sdsi_mbox_info *inf · 24 unmodified lines | ||
| 196 | 196 | break; |
| 197 | 197 | } |
| 198 | 198 | |
| 199 | − sdsi_memcpy64_fromio(buf, addr, round_up(packet_size, SDSI_SIZE_CMD)); | |
| 199 | + sdsi_memcpy64_fromio(buf, priv->mbox_addr, round_up(packet_size, SDSI_SIZE_CMD)); | |
| 200 | 200 | |
| 201 | 201 | total += packet_size; |
| 202 | 202 | |
| @@ -243,8 +243,8 @@ static int sdsi_mbox_cmd_write(struct sdsi_priv *priv, struct sdsi_mbox_info *in · 40 unmodified lines | ||
| 243 | 243 | FIELD_PREP(CTRL_PACKET_SIZE, info->size); |
| 244 | 244 | writeq(control, priv->control_addr); |
| 245 | 245 | |
| 246 | − /* Poll on run_busy bit */ | |
| 247 | − ret = readq_poll_timeout(priv->control_addr, control, !(control & CTRL_RUN_BUSY), | |
| 246 | + /* Poll on ready bit */ | |
| 247 | + ret = readq_poll_timeout(priv->control_addr, control, control & CTRL_READY, | |
| 248 | 248 | MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_US); |
| 249 | 249 | |
| 250 | 250 | if (ret) |
| @@ -263,7 +263,7 @@ static int sdsi_mbox_acquire(struct sdsi_priv *priv, struct sdsi_mbox_info *info · 12 unmodified lines | ||
| 263 | 263 | { |
| 264 | 264 | u64 control; |
| 265 | 265 | u32 owner; |
| 266 | − int ret; | |
| 266 | + int ret, retries = 0; | |
| 267 | 267 | |
| 268 | 268 | lockdep_assert_held(&priv->mb_lock); |
| 269 | 269 | |
| @@ -273,13 +273,29 @@ static int sdsi_mbox_acquire(struct sdsi_priv *priv, struct sdsi_mbox_info *info · 3 unmodified lines | ||
| 273 | 273 | if (owner != MBOX_OWNER_NONE) |
| 274 | 274 | return -EBUSY; |
| 275 | 275 | |
| 276 | − /* Write first qword of payload */ | |
| 277 | − writeq(info->payload[0], priv->mbox_addr); | |
| 276 | + /* | |
| 277 | + * If there has been no recent transaction and no one owns the mailbox, | |
| 278 | + * we should acquire it in under 1ms. However, if we've accessed it | |
| 279 | + * recently it may take up to 2.1 seconds to acquire it again. | |
| 280 | + */ | |
| 281 | + do { | |
| 282 | + /* Write first qword of payload */ | |
| 283 | + writeq(info->payload[0], priv->mbox_addr); | |
| 284 | + | |
| 285 | + /* Check for ownership */ | |
| 286 | + ret = readq_poll_timeout(priv->control_addr, control, | |
| 287 | + FIELD_GET(CTRL_OWNER, control) == MBOX_OWNER_INBAND, | |
| 288 | + MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_ACQUIRE_US); | |
| 289 | + | |
| 290 | + if (FIELD_GET(CTRL_OWNER, control) == MBOX_OWNER_NONE && | |
| 291 | + retries++ < MBOX_ACQUIRE_NUM_RETRIES) { | |
| 292 | + msleep(MBOX_ACQUIRE_RETRY_DELAY_MS); | |
| 293 | + continue; | |
| 294 | + } | |
| 278 | 295 | |
| 279 | − /* Check for ownership */ | |
| 280 | − ret = readq_poll_timeout(priv->control_addr, control, | |
| 281 | − FIELD_GET(CTRL_OWNER, control) & MBOX_OWNER_INBAND, | |
| 282 | − MBOX_POLLING_PERIOD_US, MBOX_TIMEOUT_ACQUIRE_US); | |
| 296 | + /* Either we got it or someone else did. */ | |
| 297 | + break; | |
| 298 | + } while (true); | |
| 283 | 299 | |
| 284 | 300 | return ret; |
| 285 | 301 | } |
| @@ -212,6 +212,9 @@ static int __init intel_uncore_init(void) · 211 unmodified lines | ||
| 212 | 212 | const struct x86_cpu_id *id; |
| 213 | 213 | int ret; |
| 214 | 214 | |
| 215 | + if (cpu_feature_enabled(X86_FEATURE_HYPERVISOR)) | |
| 216 | + return -ENODEV; | |
| 217 | + | |
| 215 | 218 | id = x86_match_cpu(intel_uncore_cpu_ids); |
| 216 | 219 | if (!id) |
| 217 | 220 | return -ENODEV; |
| @@ -1121,8 +1121,6 @@ static void kbd_led_set(struct led_classdev *led_cdev, · 1120 unmodified lines | ||
| 1121 | 1121 | |
| 1122 | 1122 | if (value > samsung->kbd_led.max_brightness) |
| 1123 | 1123 | value = samsung->kbd_led.max_brightness; |
| 1124 | − else if (value < 0) | |
| 1125 | − value = 0; | |
| 1126 | 1124 | |
| 1127 | 1125 | samsung->kbd_led_wk = value; |
| 1128 | 1126 | queue_work(samsung->led_workqueue, &samsung->kbd_led_work); |
| @@ -740,16 +740,8 @@ static ssize_t certificate_store(struct kobject *kobj, · 739 unmodified lines | ||
| 740 | 740 | if (!tlmi_priv.certificate_support) |
| 741 | 741 | return -EOPNOTSUPP; |
| 742 | 742 | |
| 743 | − new_cert = kstrdup(buf, GFP_KERNEL); | |
| 744 | − if (!new_cert) | |
| 745 | − return -ENOMEM; | |
| 746 | − /* Strip out CR if one is present */ | |
| 747 | − strip_cr(new_cert); | |
| 748 | − | |
| 749 | 743 | /* If empty then clear installed certificate */ |
| 750 | − if (new_cert[0] == '\0') { /* Clear installed certificate */ | |
| 751 | − kfree(new_cert); | |
| 752 | − | |
| 744 | + if ((buf[0] == '\0') || (buf[0] == '\n')) { /* Clear installed certificate */ | |
| 753 | 745 | /* Check that signature is set */ |
| 754 | 746 | if (!setting->signature || !setting->signature[0]) |
| 755 | 747 | return -EACCES; |
| @@ -763,14 +755,16 @@ static ssize_t certificate_store(struct kobject *kobj, · 7 unmodified lines | ||
| 763 | 755 | |
| 764 | 756 | ret = tlmi_simple_call(LENOVO_CLEAR_BIOS_CERT_GUID, auth_str); |
| 765 | 757 | kfree(auth_str); |
| 766 | − if (ret) | |
| 767 | − return ret; | |
| 768 | 758 | |
| 769 | − kfree(setting->certificate); | |
| 770 | − setting->certificate = NULL; | |
| 771 | − return count; | |
| 759 | + return ret ?: count; | |
| 772 | 760 | } |
| 773 | 761 | |
| 762 | + new_cert = kstrdup(buf, GFP_KERNEL); | |
| 763 | + if (!new_cert) | |
| 764 | + return -ENOMEM; | |
| 765 | + /* Strip out CR if one is present */ | |
| 766 | + strip_cr(new_cert); | |
| 767 | + | |
| 774 | 768 | if (setting->cert_installed) { |
| 775 | 769 | /* Certificate is installed so this is an update */ |
| 776 | 770 | if (!setting->signature || !setting->signature[0]) { |
| @@ -792,21 +786,14 @@ static ssize_t certificate_store(struct kobject *kobj, · 15 unmodified lines | ||
| 792 | 786 | auth_str = kasprintf(GFP_KERNEL, "%s,%s", |
| 793 | 787 | new_cert, setting->password); |
| 794 | 788 | } |
| 795 | − if (!auth_str) { | |
| 796 | − kfree(new_cert); | |
| 789 | + kfree(new_cert); | |
| 790 | + if (!auth_str) | |
| 797 | 791 | return -ENOMEM; |
| 798 | − } | |
| 799 | 792 | |
| 800 | 793 | ret = tlmi_simple_call(guid, auth_str); |
| 801 | 794 | kfree(auth_str); |
| 802 | − if (ret) { | |
| 803 | − kfree(new_cert); | |
| 804 | − return ret; | |
| 805 | − } | |
| 806 | 795 | |
| 807 | − kfree(setting->certificate); | |
| 808 | − setting->certificate = new_cert; | |
| 809 | − return count; | |
| 796 | + return ret ?: count; | |
| 810 | 797 | } |
| 811 | 798 | |
| 812 | 799 | static struct kobj_attribute auth_certificate = __ATTR_WO(certificate); |
| @@ -1194,6 +1181,10 @@ static void tlmi_release_attr(void) · 381 unmodified lines | ||
| 1194 | 1181 | |
| 1195 | 1182 | kset_unregister(tlmi_priv.attribute_kset); |
| 1196 | 1183 | |
| 1184 | + /* Free up any saved signatures */ | |
| 1185 | + kfree(tlmi_priv.pwd_admin->signature); | |
| 1186 | + kfree(tlmi_priv.pwd_admin->save_signature); | |
| 1187 | + | |
| 1197 | 1188 | /* Authentication structures */ |
| 1198 | 1189 | sysfs_remove_group(&tlmi_priv.pwd_admin->kobj, &auth_attr_group); |
| 1199 | 1190 | kobject_put(&tlmi_priv.pwd_admin->kobj); |
| @@ -1210,11 +1201,6 @@ static void tlmi_release_attr(void) · 10 unmodified lines | ||
| 1210 | 1201 | } |
| 1211 | 1202 | |
| 1212 | 1203 | kset_unregister(tlmi_priv.authentication_kset); |
| 1213 | − | |
| 1214 | − /* Free up any saved certificates/signatures */ | |
| 1215 | − kfree(tlmi_priv.pwd_admin->certificate); | |
| 1216 | − kfree(tlmi_priv.pwd_admin->signature); | |
| 1217 | − kfree(tlmi_priv.pwd_admin->save_signature); | |
| 1218 | 1204 | } |
| 1219 | 1205 | |
| 1220 | 1206 | static int tlmi_sysfs_init(void) |
| @@ -63,7 +63,6 @@ struct tlmi_pwd_setting { · 62 unmodified lines | ||
| 63 | 63 | int index; /*Used for HDD and NVME auth */ |
| 64 | 64 | enum level_option level; |
| 65 | 65 | bool cert_installed; |
| 66 | − char *certificate; | |
| 67 | 66 | char *signature; |
| 68 | 67 | char *save_signature; |
| 69 | 68 | }; |
| @@ -604,6 +604,12 @@ int power_supply_get_battery_info(struct power_supply *psy, · 603 unmodified lines | ||
| 604 | 604 | err = samsung_sdi_battery_get_info(&psy->dev, value, &info); |
| 605 | 605 | if (!err) |
| 606 | 606 | goto out_ret_pointer; |
| 607 | + else if (err == -ENODEV) | |
| 608 | + /* | |
| 609 | + * Device does not have a static battery. | |
| 610 | + * Proceed to look for a simple battery. | |
| 611 | + */ | |
| 612 | + err = 0; | |
| 607 | 613 | |
| 608 | 614 | if (strcmp("simple-battery", value)) { |
| 609 | 615 | err = -ENODEV; |
| @@ -824,6 +824,7 @@ static struct samsung_sdi_battery samsung_sdi_batteries[] = { · 823 unmodified lines | ||
| 824 | 824 | .constant_charge_current_max_ua = 900000, |
| 825 | 825 | .constant_charge_voltage_max_uv = 4200000, |
| 826 | 826 | .charge_term_current_ua = 200000, |
| 827 | + .charge_restart_voltage_uv = 4170000, | |
| 827 | 828 | .maintenance_charge = samsung_maint_charge_table, |
| 828 | 829 | .maintenance_charge_size = ARRAY_SIZE(samsung_maint_charge_table), |
| 829 | 830 | .alert_low_temp_charge_current_ua = 300000, |
| @@ -867,6 +868,7 @@ static struct samsung_sdi_battery samsung_sdi_batteries[] = { · 37 unmodified lines | ||
| 867 | 868 | .constant_charge_current_max_ua = 1500000, |
| 868 | 869 | .constant_charge_voltage_max_uv = 4350000, |
| 869 | 870 | .charge_term_current_ua = 120000, |
| 871 | + .charge_restart_voltage_uv = 4300000, | |
| 870 | 872 | .maintenance_charge = samsung_maint_charge_table, |
| 871 | 873 | .maintenance_charge_size = ARRAY_SIZE(samsung_maint_charge_table), |
| 872 | 874 | .alert_low_temp_charge_current_ua = 300000, |
| @@ -121,7 +121,9 @@ static int rzg2l_usbphy_ctrl_probe(struct platform_device *pdev) · 120 unmodified lines | ||
| 121 | 121 | return dev_err_probe(dev, PTR_ERR(priv->rstc), |
| 122 | 122 | "failed to get reset\n"); |
| 123 | 123 | |
| 124 | − reset_control_deassert(priv->rstc); | |
| 124 | + error = reset_control_deassert(priv->rstc); | |
| 125 | + if (error) | |
| 126 | + return error; | |
| 125 | 127 | |
| 126 | 128 | priv->rcdev.ops = &rzg2l_usbphy_ctrl_reset_ops; |
| 127 | 129 | priv->rcdev.of_reset_n_cells = 1; |
| @@ -20,6 +20,7 @@ static int tegra_bpmp_reset_common(struct reset_controller_dev *rstc, · 19 unmodified lines | ||
| 20 | 20 | struct tegra_bpmp *bpmp = to_tegra_bpmp(rstc); |
| 21 | 21 | struct mrq_reset_request request; |
| 22 | 22 | struct tegra_bpmp_message msg; |
| 23 | + int err; | |
| 23 | 24 | |
| 24 | 25 | memset(&request, 0, sizeof(request)); |
| 25 | 26 | request.cmd = command; |
| @@ -30,7 +31,13 @@ static int tegra_bpmp_reset_common(struct reset_controller_dev *rstc, · 4 unmodified lines | ||
| 30 | 31 | msg.tx.data = &request; |
| 31 | 32 | msg.tx.size = sizeof(request); |
| 32 | 33 | |
| 33 | − return tegra_bpmp_transfer(bpmp, &msg); | |
| 34 | + err = tegra_bpmp_transfer(bpmp, &msg); | |
| 35 | + if (err) | |
| 36 | + return err; | |
| 37 | + if (msg.rx.ret) | |
| 38 | + return -EINVAL; | |
| 39 | + | |
| 40 | + return 0; | |
| 34 | 41 | } |
| 35 | 42 | |
| 36 | 43 | static int tegra_bpmp_reset_module(struct reset_controller_dev *rstc, |
| @@ -1977,7 +1977,7 @@ static int bnx2i_process_new_cqes(struct bnx2i_conn *bnx2i_conn) · 1976 unmodified lines | ||
| 1977 | 1977 | if (nopin->cq_req_sn != qp->cqe_exp_seq_sn) |
| 1978 | 1978 | break; |
| 1979 | 1979 | |
| 1980 | − if (unlikely(test_bit(ISCSI_SUSPEND_BIT, &conn->suspend_rx))) { | |
| 1980 | + if (unlikely(test_bit(ISCSI_CONN_FLAG_SUSPEND_RX, &conn->flags))) { | |
| 1981 | 1981 | if (nopin->op_code == ISCSI_OP_NOOP_IN && |
| 1982 | 1982 | nopin->itt == (u16) RESERVED_ITT) { |
| 1983 | 1983 | printk(KERN_ALERT "bnx2i: Unsolicited " |
| @@ -1721,7 +1721,7 @@ static int bnx2i_tear_down_conn(struct bnx2i_hba *hba, · 1720 unmodified lines | ||
| 1721 | 1721 | struct iscsi_conn *conn = ep->conn->cls_conn->dd_data; |
| 1722 | 1722 | |
| 1723 | 1723 | /* Must suspend all rx queue activity for this ep */ |
| 1724 | − set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_rx); | |
| 1724 | + set_bit(ISCSI_CONN_FLAG_SUSPEND_RX, &conn->flags); | |
| 1725 | 1725 | } |
| 1726 | 1726 | /* CONN_DISCONNECT timeout may or may not be an issue depending |
| 1727 | 1727 | * on what transcribed in TCP layer, different targets behave |
| @@ -1634,11 +1634,11 @@ void cxgbi_conn_pdu_ready(struct cxgbi_sock *csk) · 1633 unmodified lines | ||
| 1634 | 1634 | log_debug(1 << CXGBI_DBG_PDU_RX, |
| 1635 | 1635 | "csk 0x%p, conn 0x%p.\n", csk, conn); |
| 1636 | 1636 | |
| 1637 | − if (unlikely(!conn || conn->suspend_rx)) { | |
| 1637 | + if (unlikely(!conn || test_bit(ISCSI_CONN_FLAG_SUSPEND_RX, &conn->flags))) { | |
| 1638 | 1638 | log_debug(1 << CXGBI_DBG_PDU_RX, |
| 1639 | − "csk 0x%p, conn 0x%p, id %d, suspend_rx %lu!\n", | |
| 1639 | + "csk 0x%p, conn 0x%p, id %d, conn flags 0x%lx!\n", | |
| 1640 | 1640 | csk, conn, conn ? conn->id : 0xFF, |
| 1641 | − conn ? conn->suspend_rx : 0xFF); | |
| 1641 | + conn ? conn->flags : 0xFF); | |
| 1642 | 1642 | return; |
| 1643 | 1643 | } |
| 1644 | 1644 | |
| @@ -678,7 +678,8 @@ __iscsi_conn_send_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr, · 677 unmodified lines | ||
| 678 | 678 | struct iscsi_task *task; |
| 679 | 679 | itt_t itt; |
| 680 | 680 | |
| 681 | − if (session->state == ISCSI_STATE_TERMINATE) | |
| 681 | + if (session->state == ISCSI_STATE_TERMINATE || | |
| 682 | + !test_bit(ISCSI_CONN_FLAG_BOUND, &conn->flags)) | |
| 682 | 683 | return NULL; |
| 683 | 684 | |
| 684 | 685 | if (opcode == ISCSI_OP_LOGIN || opcode == ISCSI_OP_TEXT) { |
| @@ -1392,8 +1393,8 @@ static bool iscsi_set_conn_failed(struct iscsi_conn *conn) · 707 unmodified lines | ||
| 1392 | 1393 | if (conn->stop_stage == 0) |
| 1393 | 1394 | session->state = ISCSI_STATE_FAILED; |
| 1394 | 1395 | |
| 1395 | − set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx); | |
| 1396 | − set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_rx); | |
| 1396 | + set_bit(ISCSI_CONN_FLAG_SUSPEND_TX, &conn->flags); | |
| 1397 | + set_bit(ISCSI_CONN_FLAG_SUSPEND_RX, &conn->flags); | |
| 1397 | 1398 | return true; |
| 1398 | 1399 | } |
| 1399 | 1400 | |
| @@ -1454,7 +1455,7 @@ static int iscsi_xmit_task(struct iscsi_conn *conn, struct iscsi_task *task, · 54 unmodified lines | ||
| 1454 | 1455 | * Do this after dropping the extra ref because if this was a requeue |
| 1455 | 1456 | * it's removed from that list and cleanup_queued_task would miss it. |
| 1456 | 1457 | */ |
| 1457 | − if (test_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx)) { | |
| 1458 | + if (test_bit(ISCSI_CONN_FLAG_SUSPEND_TX, &conn->flags)) { | |
| 1458 | 1459 | /* |
| 1459 | 1460 | * Save the task and ref in case we weren't cleaning up this |
| 1460 | 1461 | * task and get woken up again. |
| @@ -1532,7 +1533,7 @@ static int iscsi_data_xmit(struct iscsi_conn *conn) · 71 unmodified lines | ||
| 1532 | 1533 | int rc = 0; |
| 1533 | 1534 | |
| 1534 | 1535 | spin_lock_bh(&conn->session->frwd_lock); |
| 1535 | − if (test_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx)) { | |
| 1536 | + if (test_bit(ISCSI_CONN_FLAG_SUSPEND_TX, &conn->flags)) { | |
| 1536 | 1537 | ISCSI_DBG_SESSION(conn->session, "Tx suspended!\n"); |
| 1537 | 1538 | spin_unlock_bh(&conn->session->frwd_lock); |
| 1538 | 1539 | return -ENODATA; |
| @@ -1746,7 +1747,7 @@ int iscsi_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *sc) · 207 unmodified lines | ||
| 1746 | 1747 | goto fault; |
| 1747 | 1748 | } |
| 1748 | 1749 | |
| 1749 | − if (test_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx)) { | |
| 1750 | + if (test_bit(ISCSI_CONN_FLAG_SUSPEND_TX, &conn->flags)) { | |
| 1750 | 1751 | reason = FAILURE_SESSION_IN_RECOVERY; |
| 1751 | 1752 | sc->result = DID_REQUEUE << 16; |
| 1752 | 1753 | goto fault; |
| @@ -1935,7 +1936,7 @@ static void fail_scsi_tasks(struct iscsi_conn *conn, u64 lun, int error) · 182 unmodified lines | ||
| 1935 | 1936 | void iscsi_suspend_queue(struct iscsi_conn *conn) |
| 1936 | 1937 | { |
| 1937 | 1938 | spin_lock_bh(&conn->session->frwd_lock); |
| 1938 | − set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx); | |
| 1939 | + set_bit(ISCSI_CONN_FLAG_SUSPEND_TX, &conn->flags); | |
| 1939 | 1940 | spin_unlock_bh(&conn->session->frwd_lock); |
| 1940 | 1941 | } |
| 1941 | 1942 | EXPORT_SYMBOL_GPL(iscsi_suspend_queue); |
| @@ -1953,7 +1954,7 @@ void iscsi_suspend_tx(struct iscsi_conn *conn) · 11 unmodified lines | ||
| 1953 | 1954 | struct Scsi_Host *shost = conn->session->host; |
| 1954 | 1955 | struct iscsi_host *ihost = shost_priv(shost); |
| 1955 | 1956 | |
| 1956 | − set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx); | |
| 1957 | + set_bit(ISCSI_CONN_FLAG_SUSPEND_TX, &conn->flags); | |
| 1957 | 1958 | if (ihost->workq) |
| 1958 | 1959 | flush_workqueue(ihost->workq); |
| 1959 | 1960 | } |
| @@ -1961,7 +1962,7 @@ EXPORT_SYMBOL_GPL(iscsi_suspend_tx); · 1 unmodified line | ||
| 1961 | 1962 | |
| 1962 | 1963 | static void iscsi_start_tx(struct iscsi_conn *conn) |
| 1963 | 1964 | { |
| 1964 | − clear_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx); | |
| 1965 | + clear_bit(ISCSI_CONN_FLAG_SUSPEND_TX, &conn->flags); | |
| 1965 | 1966 | iscsi_conn_queue_work(conn); |
| 1966 | 1967 | } |
| 1967 | 1968 | |
| @@ -2214,6 +2215,8 @@ void iscsi_conn_unbind(struct iscsi_cls_conn *cls_conn, bool is_active) · 246 unmodified lines | ||
| 2214 | 2215 | iscsi_suspend_tx(conn); |
| 2215 | 2216 | |
| 2216 | 2217 | spin_lock_bh(&session->frwd_lock); |
| 2218 | + clear_bit(ISCSI_CONN_FLAG_BOUND, &conn->flags); | |
| 2219 | + | |
| 2217 | 2220 | if (!is_active) { |
| 2218 | 2221 | /* |
| 2219 | 2222 | * if logout timed out before userspace could even send a PDU |
| @@ -3317,6 +3320,8 @@ int iscsi_conn_bind(struct iscsi_cls_session *cls_session, · 1097 unmodified lines | ||
| 3317 | 3320 | spin_lock_bh(&session->frwd_lock); |
| 3318 | 3321 | if (is_leading) |
| 3319 | 3322 | session->leadconn = conn; |
| 3323 | + | |
| 3324 | + set_bit(ISCSI_CONN_FLAG_BOUND, &conn->flags); | |
| 3320 | 3325 | spin_unlock_bh(&session->frwd_lock); |
| 3321 | 3326 | |
| 3322 | 3327 | /* |
| @@ -3329,8 +3334,8 @@ int iscsi_conn_bind(struct iscsi_cls_session *cls_session, · 6 unmodified lines | ||
| 3329 | 3334 | /* |
| 3330 | 3335 | * Unblock xmitworker(), Login Phase will pass through. |
| 3331 | 3336 | */ |
| 3332 | − clear_bit(ISCSI_SUSPEND_BIT, &conn->suspend_rx); | |
| 3333 | − clear_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx); | |
| 3337 | + clear_bit(ISCSI_CONN_FLAG_SUSPEND_RX, &conn->flags); | |
| 3338 | + clear_bit(ISCSI_CONN_FLAG_SUSPEND_TX, &conn->flags); | |
| 3334 | 3339 | return 0; |
| 3335 | 3340 | } |
| 3336 | 3341 | EXPORT_SYMBOL_GPL(iscsi_conn_bind); |
| @@ -927,7 +927,7 @@ int iscsi_tcp_recv_skb(struct iscsi_conn *conn, struct sk_buff *skb, · 926 unmodified lines | ||
| 927 | 927 | */ |
| 928 | 928 | conn->last_recv = jiffies; |
| 929 | 929 | |
| 930 | − if (unlikely(conn->suspend_rx)) { | |
| 930 | + if (unlikely(test_bit(ISCSI_CONN_FLAG_SUSPEND_RX, &conn->flags))) { | |
| 931 | 931 | ISCSI_DBG_TCP(conn, "Rx suspended!\n"); |
| 932 | 932 | *status = ISCSI_TCP_SUSPENDED; |
| 933 | 933 | return 0; |
| @@ -766,6 +766,10 @@ static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) · 765 unmodified lines | ||
| 766 | 766 | pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; |
| 767 | 767 | pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; |
| 768 | 768 | |
| 769 | + /* Enable higher IQs and OQs, 32 to 63, bit 16 */ | |
| 770 | + if (pm8001_ha->max_q_num > 32) | |
| 771 | + pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= | |
| 772 | + 1 << 16; | |
| 769 | 773 | /* Disable end to end CRC checking */ |
| 770 | 774 | pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); |
| 771 | 775 | |
| @@ -1027,6 +1031,13 @@ static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) · 255 unmodified lines | ||
| 1027 | 1031 | if (0x0000 != gst_len_mpistate) |
| 1028 | 1032 | return -EBUSY; |
| 1029 | 1033 | |
| 1034 | + /* | |
| 1035 | + * As per controller datasheet, after successful MPI | |
| 1036 | + * initialization minimum 500ms delay is required before | |
| 1037 | + * issuing commands. | |
| 1038 | + */ | |
| 1039 | + msleep(500); | |
| 1040 | + | |
| 1030 | 1041 | return 0; |
| 1031 | 1042 | } |
| 1032 | 1043 | |
| @@ -1727,10 +1738,11 @@ static void · 694 unmodified lines | ||
| 1727 | 1738 | pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) |
| 1728 | 1739 | { |
| 1729 | 1740 | #ifdef PM8001_USE_MSIX |
| 1730 | − u32 mask; | |
| 1731 | − mask = (u32)(1 << vec); | |
| 1732 | − | |
| 1733 | − pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); | |
| 1741 | + if (vec < 32) | |
| 1742 | + pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, 1U << vec); | |
| 1743 | + else | |
| 1744 | + pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR_U, | |
| 1745 | + 1U << (vec - 32)); | |
| 1734 | 1746 | return; |
| 1735 | 1747 | #endif |
| 1736 | 1748 | pm80xx_chip_intx_interrupt_enable(pm8001_ha); |
| @@ -1746,12 +1758,15 @@ static void · 9 unmodified lines | ||
| 1746 | 1758 | pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) |
| 1747 | 1759 | { |
| 1748 | 1760 | #ifdef PM8001_USE_MSIX |
| 1749 | − u32 mask; | |
| 1750 | − if (vec == 0xFF) | |
| 1751 | − mask = 0xFFFFFFFF; | |
| 1761 | + if (vec == 0xFF) { | |
| 1762 | + /* disable all vectors 0-31, 32-63 */ | |
| 1763 | + pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 0xFFFFFFFF); | |
| 1764 | + pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 0xFFFFFFFF); | |
| 1765 | + } else if (vec < 32) | |
| 1766 | + pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 1U << vec); | |
| 1752 | 1767 | else |
| 1753 | − mask = (u32)(1 << vec); | |
| 1754 | − pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF)); | |
| 1768 | + pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, | |
| 1769 | + 1U << (vec - 32)); | |
| 1755 | 1770 | return; |
| 1756 | 1771 | #endif |
| 1757 | 1772 | pm80xx_chip_intx_interrupt_disable(pm8001_ha); |
| @@ -860,6 +860,37 @@ static int qedi_task_xmit(struct iscsi_task *task) · 859 unmodified lines | ||
| 860 | 860 | return qedi_iscsi_send_ioreq(task); |
| 861 | 861 | } |
| 862 | 862 | |
| 863 | +static void qedi_offload_work(struct work_struct *work) | |
| 864 | +{ | |
| 865 | + struct qedi_endpoint *qedi_ep = | |
| 866 | + container_of(work, struct qedi_endpoint, offload_work); | |
| 867 | + struct qedi_ctx *qedi; | |
| 868 | + int wait_delay = 5 * HZ; | |
| 869 | + int ret; | |
| 870 | + | |
| 871 | + qedi = qedi_ep->qedi; | |
| 872 | + | |
| 873 | + ret = qedi_iscsi_offload_conn(qedi_ep); | |
| 874 | + if (ret) { | |
| 875 | + QEDI_ERR(&qedi->dbg_ctx, | |
| 876 | + "offload error: iscsi_cid=%u, qedi_ep=%p, ret=%d\n", | |
| 877 | + qedi_ep->iscsi_cid, qedi_ep, ret); | |
| 878 | + qedi_ep->state = EP_STATE_OFLDCONN_FAILED; | |
| 879 | + return; | |
| 880 | + } | |
| 881 | + | |
| 882 | + ret = wait_event_interruptible_timeout(qedi_ep->tcp_ofld_wait, | |
| 883 | + (qedi_ep->state == | |
| 884 | + EP_STATE_OFLDCONN_COMPL), | |
| 885 | + wait_delay); | |
| 886 | + if (ret <= 0 || qedi_ep->state != EP_STATE_OFLDCONN_COMPL) { | |
| 887 | + qedi_ep->state = EP_STATE_OFLDCONN_FAILED; | |
| 888 | + QEDI_ERR(&qedi->dbg_ctx, | |
| 889 | + "Offload conn TIMEOUT iscsi_cid=%u, qedi_ep=%p\n", | |
| 890 | + qedi_ep->iscsi_cid, qedi_ep); | |
| 891 | + } | |
| 892 | +} | |
| 893 | + | |
| 863 | 894 | static struct iscsi_endpoint * |
| 864 | 895 | qedi_ep_connect(struct Scsi_Host *shost, struct sockaddr *dst_addr, |
| 865 | 896 | int non_blocking) |
| @@ -908,6 +939,7 @@ qedi_ep_connect(struct Scsi_Host *shost, struct sockaddr *dst_addr, · 42 unmodified lines | ||
| 908 | 939 | } |
| 909 | 940 | qedi_ep = ep->dd_data; |
| 910 | 941 | memset(qedi_ep, 0, sizeof(struct qedi_endpoint)); |
| 942 | + INIT_WORK(&qedi_ep->offload_work, qedi_offload_work); | |
| 911 | 943 | qedi_ep->state = EP_STATE_IDLE; |
| 912 | 944 | qedi_ep->iscsi_cid = (u32)-1; |
| 913 | 945 | qedi_ep->qedi = qedi; |
| @@ -1056,12 +1088,11 @@ static void qedi_ep_disconnect(struct iscsi_endpoint *ep) · 142 unmodified lines | ||
| 1056 | 1088 | qedi_ep = ep->dd_data; |
| 1057 | 1089 | qedi = qedi_ep->qedi; |
| 1058 | 1090 | |
| 1091 | + flush_work(&qedi_ep->offload_work); | |
| 1092 | + | |
| 1059 | 1093 | if (qedi_ep->state == EP_STATE_OFLDCONN_START) |
| 1060 | 1094 | goto ep_exit_recover; |
| 1061 | 1095 | |
| 1062 | − if (qedi_ep->state != EP_STATE_OFLDCONN_NONE) | |
| 1063 | − flush_work(&qedi_ep->offload_work); | |
| 1064 | − | |
| 1065 | 1096 | if (qedi_ep->conn) { |
| 1066 | 1097 | qedi_conn = qedi_ep->conn; |
| 1067 | 1098 | abrt_conn = qedi_conn->abrt_conn; |
| @@ -1235,37 +1266,6 @@ static int qedi_data_avail(struct qedi_ctx *qedi, u16 vlanid) · 167 unmodified lines | ||
| 1235 | 1266 | return rc; |
| 1236 | 1267 | } |
| 1237 | 1268 | |
| 1238 | −static void qedi_offload_work(struct work_struct *work) | |
| 1239 | −{ | |
| 1240 | − struct qedi_endpoint *qedi_ep = | |
| 1241 | − container_of(work, struct qedi_endpoint, offload_work); | |
| 1242 | − struct qedi_ctx *qedi; | |
| 1243 | − int wait_delay = 5 * HZ; | |
| 1244 | − int ret; | |
| 1245 | − | |
| 1246 | − qedi = qedi_ep->qedi; | |
| 1247 | − | |
| 1248 | − ret = qedi_iscsi_offload_conn(qedi_ep); | |
| 1249 | − if (ret) { | |
| 1250 | − QEDI_ERR(&qedi->dbg_ctx, | |
| 1251 | − "offload error: iscsi_cid=%u, qedi_ep=%p, ret=%d\n", | |
| 1252 | − qedi_ep->iscsi_cid, qedi_ep, ret); | |
| 1253 | − qedi_ep->state = EP_STATE_OFLDCONN_FAILED; | |
| 1254 | − return; | |
| 1255 | − } | |
| 1256 | − | |
| 1257 | − ret = wait_event_interruptible_timeout(qedi_ep->tcp_ofld_wait, | |
| 1258 | − (qedi_ep->state == | |
| 1259 | − EP_STATE_OFLDCONN_COMPL), | |
| 1260 | − wait_delay); | |
| 1261 | − if ((ret <= 0) || (qedi_ep->state != EP_STATE_OFLDCONN_COMPL)) { | |
| 1262 | − qedi_ep->state = EP_STATE_OFLDCONN_FAILED; | |
| 1263 | − QEDI_ERR(&qedi->dbg_ctx, | |
| 1264 | − "Offload conn TIMEOUT iscsi_cid=%u, qedi_ep=%p\n", | |
| 1265 | − qedi_ep->iscsi_cid, qedi_ep); | |
| 1266 | − } | |
| 1267 | −} | |
| 1268 | − | |
| 1269 | 1269 | static int qedi_set_path(struct Scsi_Host *shost, struct iscsi_path *path_data) |
| 1270 | 1270 | { |
| 1271 | 1271 | struct qedi_ctx *qedi; |
| @@ -1381,7 +1381,6 @@ static int qedi_set_path(struct Scsi_Host *shost, struct iscsi_path *path_data) · 109 unmodified lines | ||
| 1381 | 1381 | qedi_ep->dst_addr, qedi_ep->dst_port); |
| 1382 | 1382 | } |
| 1383 | 1383 | |
| 1384 | − INIT_WORK(&qedi_ep->offload_work, qedi_offload_work); | |
| 1385 | 1384 | queue_work(qedi->offload_thread, &qedi_ep->offload_work); |
| 1386 | 1385 | |
| 1387 | 1386 | ret = 0; |
| @@ -32,7 +32,6 @@ · 31 unmodified lines | ||
| 32 | 32 | #include <linux/blkdev.h> |
| 33 | 33 | #include <linux/crc-t10dif.h> |
| 34 | 34 | #include <linux/spinlock.h> |
| 35 | −#include <linux/mutex.h> | |
| 36 | 35 | #include <linux/interrupt.h> |
| 37 | 36 | #include <linux/atomic.h> |
| 38 | 37 | #include <linux/hrtimer.h> |
| @@ -732,9 +731,7 @@ static const struct opcode_info_t opcode_info_arr[SDEB_I_LAST_ELEM_P1 + 1] = { · 693 unmodified lines | ||
| 732 | 731 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} }, |
| 733 | 732 | }; |
| 734 | 733 | |
| 735 | −static atomic_t sdebug_num_hosts; | |
| 736 | −static DEFINE_MUTEX(add_host_mutex); | |
| 737 | − | |
| 734 | +static int sdebug_num_hosts; | |
| 738 | 735 | static int sdebug_add_host = DEF_NUM_HOST; /* in sysfs this is relative */ |
| 739 | 736 | static int sdebug_ato = DEF_ATO; |
| 740 | 737 | static int sdebug_cdb_len = DEF_CDB_LEN; |
| @@ -781,7 +778,6 @@ static int sdebug_uuid_ctl = DEF_UUID_CTL; · 40 unmodified lines | ||
| 781 | 778 | static bool sdebug_random = DEF_RANDOM; |
| 782 | 779 | static bool sdebug_per_host_store = DEF_PER_HOST_STORE; |
| 783 | 780 | static bool sdebug_removable = DEF_REMOVABLE; |
| 784 | −static bool sdebug_deflect_incoming; | |
| 785 | 781 | static bool sdebug_clustering; |
| 786 | 782 | static bool sdebug_host_lock = DEF_HOST_LOCK; |
| 787 | 783 | static bool sdebug_strict = DEF_STRICT; |
| @@ -5122,10 +5118,6 @@ static int scsi_debug_slave_configure(struct scsi_device *sdp) · 4334 unmodified lines | ||
| 5122 | 5118 | sdp->host->host_no, sdp->channel, sdp->id, sdp->lun); |
| 5123 | 5119 | if (sdp->host->max_cmd_len != SDEBUG_MAX_CMD_LEN) |
| 5124 | 5120 | sdp->host->max_cmd_len = SDEBUG_MAX_CMD_LEN; |
| 5125 | − if (smp_load_acquire(&sdebug_deflect_incoming)) { | |
| 5126 | − pr_info("Exit early due to deflect_incoming\n"); | |
| 5127 | − return 1; | |
| 5128 | − } | |
| 5129 | 5121 | if (devip == NULL) { |
| 5130 | 5122 | devip = find_build_dev_info(sdp); |
| 5131 | 5123 | if (devip == NULL) |
| @@ -5211,7 +5203,7 @@ static bool stop_queued_cmnd(struct scsi_cmnd *cmnd) · 79 unmodified lines | ||
| 5211 | 5203 | } |
| 5212 | 5204 | |
| 5213 | 5205 | /* Deletes (stops) timers or work queues of all queued commands */ |
| 5214 | −static void stop_all_queued(bool done_with_no_conn) | |
| 5206 | +static void stop_all_queued(void) | |
| 5215 | 5207 | { |
| 5216 | 5208 | unsigned long iflags; |
| 5217 | 5209 | int j, k; |
| @@ -5220,15 +5212,13 @@ static void stop_all_queued(bool done_with_no_conn) · 2 unmodified lines | ||
| 5220 | 5212 | struct sdebug_queued_cmd *sqcp; |
| 5221 | 5213 | struct sdebug_dev_info *devip; |
| 5222 | 5214 | struct sdebug_defer *sd_dp; |
| 5223 | − struct scsi_cmnd *scp; | |
| 5224 | 5215 | |
| 5225 | 5216 | for (j = 0, sqp = sdebug_q_arr; j < submit_queues; ++j, ++sqp) { |
| 5226 | 5217 | spin_lock_irqsave(&sqp->qc_lock, iflags); |
| 5227 | 5218 | for (k = 0; k < SDEBUG_CANQUEUE; ++k) { |
| 5228 | 5219 | if (test_bit(k, sqp->in_use_bm)) { |
| 5229 | 5220 | sqcp = &sqp->qc_arr[k]; |
| 5230 | − scp = sqcp->a_cmnd; | |
| 5231 | − if (!scp) | |
| 5221 | + if (sqcp->a_cmnd == NULL) | |
| 5232 | 5222 | continue; |
| 5233 | 5223 | devip = (struct sdebug_dev_info *) |
| 5234 | 5224 | sqcp->a_cmnd->device->hostdata; |
| @@ -5243,10 +5233,6 @@ static void stop_all_queued(bool done_with_no_conn) · 8 unmodified lines | ||
| 5243 | 5233 | l_defer_t = SDEB_DEFER_NONE; |
| 5244 | 5234 | spin_unlock_irqrestore(&sqp->qc_lock, iflags); |
| 5245 | 5235 | stop_qc_helper(sd_dp, l_defer_t); |
| 5246 | − if (done_with_no_conn && l_defer_t != SDEB_DEFER_NONE) { | |
| 5247 | − scp->result = DID_NO_CONNECT << 16; | |
| 5248 | − scsi_done(scp); | |
| 5249 | − } | |
| 5250 | 5236 | clear_bit(k, sqp->in_use_bm); |
| 5251 | 5237 | spin_lock_irqsave(&sqp->qc_lock, iflags); |
| 5252 | 5238 | } |
| @@ -5389,7 +5375,7 @@ static int scsi_debug_host_reset(struct scsi_cmnd *SCpnt) · 136 unmodified lines | ||
| 5389 | 5375 | } |
| 5390 | 5376 | } |
| 5391 | 5377 | spin_unlock(&sdebug_host_list_lock); |
| 5392 | − stop_all_queued(false); | |
| 5378 | + stop_all_queued(); | |
| 5393 | 5379 | if (SDEBUG_OPT_RESET_NOISE & sdebug_opts) |
| 5394 | 5380 | sdev_printk(KERN_INFO, SCpnt->device, |
| 5395 | 5381 | "%s: %d device(s) found\n", __func__, k); |
| @@ -5449,50 +5435,13 @@ static void sdebug_build_parts(unsigned char *ramp, unsigned long store_size) · 53 unmodified lines | ||
| 5449 | 5435 | } |
| 5450 | 5436 | } |
| 5451 | 5437 | |
| 5452 | −static void sdeb_block_all_queues(void) | |
| 5453 | −{ | |
| 5454 | − int j; | |
| 5455 | − struct sdebug_queue *sqp; | |
| 5456 | − | |
| 5457 | − for (j = 0, sqp = sdebug_q_arr; j < submit_queues; ++j, ++sqp) | |
| 5458 | − atomic_set(&sqp->blocked, (int)true); | |
| 5459 | −} | |
| 5460 | − | |
| 5461 | −static void sdeb_unblock_all_queues(void) | |
| 5438 | +static void block_unblock_all_queues(bool block) | |
| 5462 | 5439 | { |
| 5463 | 5440 | int j; |
| 5464 | 5441 | struct sdebug_queue *sqp; |
| 5465 | 5442 | |
| 5466 | 5443 | for (j = 0, sqp = sdebug_q_arr; j < submit_queues; ++j, ++sqp) |
| 5467 | − atomic_set(&sqp->blocked, (int)false); | |
| 5468 | −} | |
| 5469 | − | |
| 5470 | −static void | |
| 5471 | −sdeb_add_n_hosts(int num_hosts) | |
| 5472 | −{ | |
| 5473 | − if (num_hosts < 1) | |
| 5474 | − return; | |
| 5475 | − do { | |
| 5476 | − bool found; | |
| 5477 | − unsigned long idx; | |
| 5478 | − struct sdeb_store_info *sip; | |
| 5479 | − bool want_phs = (sdebug_fake_rw == 0) && sdebug_per_host_store; | |
| 5480 | − | |
| 5481 | − found = false; | |
| 5482 | − if (want_phs) { | |
| 5483 | − xa_for_each_marked(per_store_ap, idx, sip, SDEB_XA_NOT_IN_USE) { | |
| 5484 | − sdeb_most_recent_idx = (int)idx; | |
| 5485 | − found = true; | |
| 5486 | − break; | |
| 5487 | − } | |
| 5488 | − if (found) /* re-use case */ | |
| 5489 | − sdebug_add_host_helper((int)idx); | |
| 5490 | − else | |
| 5491 | − sdebug_do_add_host(true /* make new store */); | |
| 5492 | − } else { | |
| 5493 | − sdebug_do_add_host(false); | |
| 5494 | − } | |
| 5495 | − } while (--num_hosts); | |
| 5444 | + atomic_set(&sqp->blocked, (int)block); | |
| 5496 | 5445 | } |
| 5497 | 5446 | |
| 5498 | 5447 | /* Adjust (by rounding down) the sdebug_cmnd_count so abs(every_nth)-1 |
| @@ -5505,10 +5454,10 @@ static void tweak_cmnd_count(void) · 6 unmodified lines | ||
| 5505 | 5454 | modulo = abs(sdebug_every_nth); |
| 5506 | 5455 | if (modulo < 2) |
| 5507 | 5456 | return; |
| 5508 | − sdeb_block_all_queues(); | |
| 5457 | + block_unblock_all_queues(true); | |
| 5509 | 5458 | count = atomic_read(&sdebug_cmnd_count); |
| 5510 | 5459 | atomic_set(&sdebug_cmnd_count, (count / modulo) * modulo); |
| 5511 | − sdeb_unblock_all_queues(); | |
| 5460 | + block_unblock_all_queues(false); | |
| 5512 | 5461 | } |
| 5513 | 5462 | |
| 5514 | 5463 | static void clear_queue_stats(void) |
| @@ -5526,15 +5475,6 @@ static bool inject_on_this_cmd(void) · 11 unmodified lines | ||
| 5526 | 5475 | return (atomic_read(&sdebug_cmnd_count) % abs(sdebug_every_nth)) == 0; |
| 5527 | 5476 | } |
| 5528 | 5477 | |
| 5529 | −static int process_deflect_incoming(struct scsi_cmnd *scp) | |
| 5530 | −{ | |
| 5531 | − u8 opcode = scp->cmnd[0]; | |
| 5532 | − | |
| 5533 | − if (opcode == SYNCHRONIZE_CACHE || opcode == SYNCHRONIZE_CACHE_16) | |
| 5534 | − return 0; | |
| 5535 | − return DID_NO_CONNECT << 16; | |
| 5536 | −} | |
| 5537 | − | |
| 5538 | 5478 | #define INCLUSIVE_TIMING_MAX_NS 1000000 /* 1 millisecond */ |
| 5539 | 5479 | |
| 5540 | 5480 | /* Complete the processing of the thread that queued a SCSI command to this |
| @@ -5544,7 +5484,8 @@ static int process_deflect_incoming(struct scsi_cmnd *scp) · 3 unmodified lines | ||
| 5544 | 5484 | */ |
| 5545 | 5485 | static int schedule_resp(struct scsi_cmnd *cmnd, struct sdebug_dev_info *devip, |
| 5546 | 5486 | int scsi_result, |
| 5547 | − int (*pfp)(struct scsi_cmnd *, struct sdebug_dev_info *), | |
| 5487 | + int (*pfp)(struct scsi_cmnd *, | |
| 5488 | + struct sdebug_dev_info *), | |
| 5548 | 5489 | int delta_jiff, int ndelay) |
| 5549 | 5490 | { |
| 5550 | 5491 | bool new_sd_dp; |
| @@ -5565,27 +5506,13 @@ static int schedule_resp(struct scsi_cmnd *cmnd, struct sdebug_dev_info *devip, · 14 unmodified lines | ||
| 5565 | 5506 | } |
| 5566 | 5507 | sdp = cmnd->device; |
| 5567 | 5508 | |
| 5568 | − if (delta_jiff == 0) { | |
| 5569 | − sqp = get_queue(cmnd); | |
| 5570 | − if (atomic_read(&sqp->blocked)) { | |
| 5571 | − if (smp_load_acquire(&sdebug_deflect_incoming)) | |
| 5572 | − return process_deflect_incoming(cmnd); | |
| 5573 | − else | |
| 5574 | − return SCSI_MLQUEUE_HOST_BUSY; | |
| 5575 | − } | |
| 5509 | + if (delta_jiff == 0) | |
| 5576 | 5510 | goto respond_in_thread; |
| 5577 | − } | |
| 5578 | 5511 | |
| 5579 | 5512 | sqp = get_queue(cmnd); |
| 5580 | 5513 | spin_lock_irqsave(&sqp->qc_lock, iflags); |
| 5581 | 5514 | if (unlikely(atomic_read(&sqp->blocked))) { |
| 5582 | 5515 | spin_unlock_irqrestore(&sqp->qc_lock, iflags); |
| 5583 | − if (smp_load_acquire(&sdebug_deflect_incoming)) { | |
| 5584 | − scsi_result = process_deflect_incoming(cmnd); | |
| 5585 | − goto respond_in_thread; | |
| 5586 | − } | |
| 5587 | − if (sdebug_verbose) | |
| 5588 | − pr_info("blocked --> SCSI_MLQUEUE_HOST_BUSY\n"); | |
| 5589 | 5516 | return SCSI_MLQUEUE_HOST_BUSY; |
| 5590 | 5517 | } |
| 5591 | 5518 | num_in_q = atomic_read(&devip->num_in_q); |
| @@ -5774,12 +5701,8 @@ static int schedule_resp(struct scsi_cmnd *cmnd, struct sdebug_dev_info *devip, · 182 unmodified lines | ||
| 5774 | 5701 | respond_in_thread: /* call back to mid-layer using invocation thread */ |
| 5775 | 5702 | cmnd->result = pfp != NULL ? pfp(cmnd, devip) : 0; |
| 5776 | 5703 | cmnd->result &= ~SDEG_RES_IMMED_MASK; |
| 5777 | − if (cmnd->result == 0 && scsi_result != 0) { | |
| 5704 | + if (cmnd->result == 0 && scsi_result != 0) | |
| 5778 | 5705 | cmnd->result = scsi_result; |
| 5779 | − if (sdebug_verbose) | |
| 5780 | − pr_info("respond_in_thread: tag=0x%x, scp->result=0x%x\n", | |
| 5781 | − blk_mq_unique_tag(scsi_cmd_to_rq(cmnd)), scsi_result); | |
| 5782 | − } | |
| 5783 | 5706 | scsi_done(cmnd); |
| 5784 | 5707 | return 0; |
| 5785 | 5708 | } |
| @@ -6064,7 +5987,7 @@ static ssize_t delay_store(struct device_driver *ddp, const char *buf, · 278 unmodified lines | ||
| 6064 | 5987 | int j, k; |
| 6065 | 5988 | struct sdebug_queue *sqp; |
| 6066 | 5989 | |
| 6067 | − sdeb_block_all_queues(); | |
| 5990 | + block_unblock_all_queues(true); | |
| 6068 | 5991 | for (j = 0, sqp = sdebug_q_arr; j < submit_queues; |
| 6069 | 5992 | ++j, ++sqp) { |
| 6070 | 5993 | k = find_first_bit(sqp->in_use_bm, |
| @@ -6078,7 +6001,7 @@ static ssize_t delay_store(struct device_driver *ddp, const char *buf, · 7 unmodified lines | ||
| 6078 | 6001 | sdebug_jdelay = jdelay; |
| 6079 | 6002 | sdebug_ndelay = 0; |
| 6080 | 6003 | } |
| 6081 | − sdeb_unblock_all_queues(); | |
| 6004 | + block_unblock_all_queues(false); | |
| 6082 | 6005 | } |
| 6083 | 6006 | return res; |
| 6084 | 6007 | } |
| @@ -6104,7 +6027,7 @@ static ssize_t ndelay_store(struct device_driver *ddp, const char *buf, · 19 unmodified lines | ||
| 6104 | 6027 | int j, k; |
| 6105 | 6028 | struct sdebug_queue *sqp; |
| 6106 | 6029 | |
| 6107 | − sdeb_block_all_queues(); | |
| 6030 | + block_unblock_all_queues(true); | |
| 6108 | 6031 | for (j = 0, sqp = sdebug_q_arr; j < submit_queues; |
| 6109 | 6032 | ++j, ++sqp) { |
| 6110 | 6033 | k = find_first_bit(sqp->in_use_bm, |
| @@ -6119,7 +6042,7 @@ static ssize_t ndelay_store(struct device_driver *ddp, const char *buf, · 8 unmodified lines | ||
| 6119 | 6042 | sdebug_jdelay = ndelay ? JDELAY_OVERRIDDEN |
| 6120 | 6043 | : DEF_JDELAY; |
| 6121 | 6044 | } |
| 6122 | − sdeb_unblock_all_queues(); | |
| 6045 | + block_unblock_all_queues(false); | |
| 6123 | 6046 | } |
| 6124 | 6047 | return res; |
| 6125 | 6048 | } |
| @@ -6433,7 +6356,7 @@ static ssize_t max_queue_store(struct device_driver *ddp, const char *buf, · 307 unmodified lines | ||
| 6433 | 6356 | if ((count > 0) && (1 == sscanf(buf, "%d", &n)) && (n > 0) && |
| 6434 | 6357 | (n <= SDEBUG_CANQUEUE) && |
| 6435 | 6358 | (sdebug_host_max_queue == 0)) { |
| 6436 | − sdeb_block_all_queues(); | |
| 6359 | + block_unblock_all_queues(true); | |
| 6437 | 6360 | k = 0; |
| 6438 | 6361 | for (j = 0, sqp = sdebug_q_arr; j < submit_queues; |
| 6439 | 6362 | ++j, ++sqp) { |
| @@ -6448,7 +6371,7 @@ static ssize_t max_queue_store(struct device_driver *ddp, const char *buf, · 8 unmodified lines | ||
| 6448 | 6371 | atomic_set(&retired_max_queue, k + 1); |
| 6449 | 6372 | else |
| 6450 | 6373 | atomic_set(&retired_max_queue, 0); |
| 6451 | − sdeb_unblock_all_queues(); | |
| 6374 | + block_unblock_all_queues(false); | |
| 6452 | 6375 | return count; |
| 6453 | 6376 | } |
| 6454 | 6377 | return -EINVAL; |
| @@ -6537,48 +6460,43 @@ static DRIVER_ATTR_RW(virtual_gb); · 82 unmodified lines | ||
| 6537 | 6460 | static ssize_t add_host_show(struct device_driver *ddp, char *buf) |
| 6538 | 6461 | { |
| 6539 | 6462 | /* absolute number of hosts currently active is what is shown */ |
| 6540 | − return scnprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&sdebug_num_hosts)); | |
| 6463 | + return scnprintf(buf, PAGE_SIZE, "%d\n", sdebug_num_hosts); | |
| 6541 | 6464 | } |
| 6542 | 6465 | |
| 6543 | −/* | |
| 6544 | − * Accept positive and negative values. Hex values (only positive) may be prefixed by '0x'. | |
| 6545 | − * To remove all hosts use a large negative number (e.g. -9999). The value 0 does nothing. | |
| 6546 | − * Returns -EBUSY if another add_host sysfs invocation is active. | |
| 6547 | − */ | |
| 6548 | 6466 | static ssize_t add_host_store(struct device_driver *ddp, const char *buf, |
| 6549 | 6467 | size_t count) |
| 6550 | 6468 | { |
| 6469 | + bool found; | |
| 6470 | + unsigned long idx; | |
| 6471 | + struct sdeb_store_info *sip; | |
| 6472 | + bool want_phs = (sdebug_fake_rw == 0) && sdebug_per_host_store; | |
| 6551 | 6473 | int delta_hosts; |
| 6552 | 6474 | |
| 6553 | − if (count == 0 || kstrtoint(buf, 0, &delta_hosts)) | |
| 6475 | + if (sscanf(buf, "%d", &delta_hosts) != 1) | |
| 6554 | 6476 | return -EINVAL; |
| 6555 | − if (sdebug_verbose) | |
| 6556 | − pr_info("prior num_hosts=%d, num_to_add=%d\n", | |
| 6557 | − atomic_read(&sdebug_num_hosts), delta_hosts); | |
| 6558 | − if (delta_hosts == 0) | |
| 6559 | − return count; | |
| 6560 | − if (mutex_trylock(&add_host_mutex) == 0) | |
| 6561 | − return -EBUSY; | |
| 6562 | 6477 | if (delta_hosts > 0) { |
| 6563 | − sdeb_add_n_hosts(delta_hosts); | |
| 6564 | − } else if (delta_hosts < 0) { | |
| 6565 | − smp_store_release(&sdebug_deflect_incoming, true); | |
| 6566 | − sdeb_block_all_queues(); | |
| 6567 | − if (delta_hosts >= atomic_read(&sdebug_num_hosts)) | |
| 6568 | − stop_all_queued(true); | |
| 6569 | 6478 | do { |
| 6570 | − if (atomic_read(&sdebug_num_hosts) < 1) { | |
| 6571 | − free_all_queued(); | |
| 6572 | − break; | |
| 6479 | + found = false; | |
| 6480 | + if (want_phs) { | |
| 6481 | + xa_for_each_marked(per_store_ap, idx, sip, | |
| 6482 | + SDEB_XA_NOT_IN_USE) { | |
| 6483 | + sdeb_most_recent_idx = (int)idx; | |
| 6484 | + found = true; | |
| 6485 | + break; | |
| 6486 | + } | |
| 6487 | + if (found) /* re-use case */ | |
| 6488 | + sdebug_add_host_helper((int)idx); | |
| 6489 | + else | |
| 6490 | + sdebug_do_add_host(true); | |
| 6491 | + } else { | |
| 6492 | + sdebug_do_add_host(false); | |
| 6573 | 6493 | } |
| 6494 | + } while (--delta_hosts); | |
| 6495 | + } else if (delta_hosts < 0) { | |
| 6496 | + do { | |
| 6574 | 6497 | sdebug_do_remove_host(false); |
| 6575 | 6498 | } while (++delta_hosts); |
| 6576 | − sdeb_unblock_all_queues(); | |
| 6577 | − smp_store_release(&sdebug_deflect_incoming, false); | |
| 6578 | 6499 | } |
| 6579 | − mutex_unlock(&add_host_mutex); | |
| 6580 | − if (sdebug_verbose) | |
| 6581 | − pr_info("post num_hosts=%d\n", atomic_read(&sdebug_num_hosts)); | |
| 6582 | 6500 | return count; |
| 6583 | 6501 | } |
| 6584 | 6502 | static DRIVER_ATTR_RW(add_host); |
| @@ -7089,10 +7007,6 @@ static int __init scsi_debug_init(void) · 504 unmodified lines | ||
| 7089 | 7007 | sdebug_add_host = 0; |
| 7090 | 7008 | |
| 7091 | 7009 | for (k = 0; k < hosts_to_add; k++) { |
| 7092 | − if (smp_load_acquire(&sdebug_deflect_incoming)) { | |
| 7093 | − pr_info("exit early as sdebug_deflect_incoming is set\n"); | |
| 7094 | − return 0; | |
| 7095 | − } | |
| 7096 | 7010 | if (want_store && k == 0) { |
| 7097 | 7011 | ret = sdebug_add_host_helper(idx); |
| 7098 | 7012 | if (ret < 0) { |
| @@ -7110,12 +7024,8 @@ static int __init scsi_debug_init(void) · 11 unmodified lines | ||
| 7110 | 7024 | } |
| 7111 | 7025 | } |
| 7112 | 7026 | if (sdebug_verbose) |
| 7113 | − pr_info("built %d host(s)\n", atomic_read(&sdebug_num_hosts)); | |
| 7027 | + pr_info("built %d host(s)\n", sdebug_num_hosts); | |
| 7114 | 7028 | |
| 7115 | − /* | |
| 7116 | − * Even though all the hosts have been established, due to async device (LU) scanning | |
| 7117 | − * by the scsi mid-level, there may still be devices (LUs) being set up. | |
| 7118 | − */ | |
| 7119 | 7029 | return 0; |
| 7120 | 7030 | |
| 7121 | 7031 | bus_unreg: |
| @@ -7131,17 +7041,12 @@ free_q_arr: · 9 unmodified lines | ||
| 7131 | 7041 | |
| 7132 | 7042 | static void __exit scsi_debug_exit(void) |
| 7133 | 7043 | { |
| 7134 | − int k; | |
| 7044 | + int k = sdebug_num_hosts; | |
| 7135 | 7045 | |
| 7136 | − /* Possible race with LUs still being set up; stop them asap */ | |
| 7137 | − sdeb_block_all_queues(); | |
| 7138 | − smp_store_release(&sdebug_deflect_incoming, true); | |
| 7139 | − stop_all_queued(false); | |
| 7140 | − for (k = 0; atomic_read(&sdebug_num_hosts) > 0; k++) | |
| 7046 | + stop_all_queued(); | |
| 7047 | + for (; k; k--) | |
| 7141 | 7048 | sdebug_do_remove_host(true); |
| 7142 | 7049 | free_all_queued(); |
| 7143 | − if (sdebug_verbose) | |
| 7144 | − pr_info("removed %d hosts\n", k); | |
| 7145 | 7050 | driver_unregister(&sdebug_driverfs_driver); |
| 7146 | 7051 | bus_unregister(&pseudo_lld_bus); |
| 7147 | 7052 | root_device_unregister(pseudo_primary); |
| @@ -7311,13 +7216,13 @@ static int sdebug_add_host_helper(int per_host_idx) · 163 unmodified lines | ||
| 7311 | 7216 | sdbg_host->dev.bus = &pseudo_lld_bus; |
| 7312 | 7217 | sdbg_host->dev.parent = pseudo_primary; |
| 7313 | 7218 | sdbg_host->dev.release = &sdebug_release_adapter; |
| 7314 | − dev_set_name(&sdbg_host->dev, "adapter%d", atomic_read(&sdebug_num_hosts)); | |
| 7219 | + dev_set_name(&sdbg_host->dev, "adapter%d", sdebug_num_hosts); | |
| 7315 | 7220 | |
| 7316 | 7221 | error = device_register(&sdbg_host->dev); |
| 7317 | 7222 | if (error) |
| 7318 | 7223 | goto clean; |
| 7319 | 7224 | |
| 7320 | − atomic_inc(&sdebug_num_hosts); | |
| 7225 | + ++sdebug_num_hosts; | |
| 7321 | 7226 | return 0; |
| 7322 | 7227 | |
| 7323 | 7228 | clean: |
| @@ -7381,7 +7286,7 @@ static void sdebug_do_remove_host(bool the_end) · 57 unmodified lines | ||
| 7381 | 7286 | return; |
| 7382 | 7287 | |
| 7383 | 7288 | device_unregister(&sdbg_host->dev); |
| 7384 | − atomic_dec(&sdebug_num_hosts); | |
| 7289 | + --sdebug_num_hosts; | |
| 7385 | 7290 | } |
| 7386 | 7291 | |
| 7387 | 7292 | static int sdebug_change_qdepth(struct scsi_device *sdev, int qdepth) |
| @@ -7389,10 +7294,10 @@ static int sdebug_change_qdepth(struct scsi_device *sdev, int qdepth) · 1 unmodified line | ||
| 7389 | 7294 | int num_in_q = 0; |
| 7390 | 7295 | struct sdebug_dev_info *devip; |
| 7391 | 7296 | |
| 7392 | − sdeb_block_all_queues(); | |
| 7297 | + block_unblock_all_queues(true); | |
| 7393 | 7298 | devip = (struct sdebug_dev_info *)sdev->hostdata; |
| 7394 | 7299 | if (NULL == devip) { |
| 7395 | − sdeb_unblock_all_queues(); | |
| 7300 | + block_unblock_all_queues(false); | |
| 7396 | 7301 | return -ENODEV; |
| 7397 | 7302 | } |
| 7398 | 7303 | num_in_q = atomic_read(&devip->num_in_q); |
| @@ -7411,7 +7316,7 @@ static int sdebug_change_qdepth(struct scsi_device *sdev, int qdepth) · 12 unmodified lines | ||
| 7411 | 7316 | sdev_printk(KERN_INFO, sdev, "%s: qdepth=%d, num_in_q=%d\n", |
| 7412 | 7317 | __func__, qdepth, num_in_q); |
| 7413 | 7318 | } |
| 7414 | − sdeb_unblock_all_queues(); | |
| 7319 | + block_unblock_all_queues(false); | |
| 7415 | 7320 | return sdev->queue_depth; |
| 7416 | 7321 | } |
| 7417 | 7322 | |
| @@ -86,6 +86,9 @@ struct iscsi_internal { · 85 unmodified lines | ||
| 86 | 86 | struct transport_container session_cont; |
| 87 | 87 | }; |
| 88 | 88 | |
| 89 | +static DEFINE_IDR(iscsi_ep_idr); | |
| 90 | +static DEFINE_MUTEX(iscsi_ep_idr_mutex); | |
| 91 | + | |
| 89 | 92 | static atomic_t iscsi_session_nr; /* sysfs session id for next new session */ |
| 90 | 93 | |
| 91 | 94 | static struct workqueue_struct *iscsi_conn_cleanup_workq; |
| @@ -168,6 +171,11 @@ struct device_attribute dev_attr_##_prefix##_##_name = \ · 76 unmodified lines | ||
| 168 | 171 | static void iscsi_endpoint_release(struct device *dev) |
| 169 | 172 | { |
| 170 | 173 | struct iscsi_endpoint *ep = iscsi_dev_to_endpoint(dev); |
| 174 | + | |
| 175 | + mutex_lock(&iscsi_ep_idr_mutex); | |
| 176 | + idr_remove(&iscsi_ep_idr, ep->id); | |
| 177 | + mutex_unlock(&iscsi_ep_idr_mutex); | |
| 178 | + | |
| 171 | 179 | kfree(ep); |
| 172 | 180 | } |
| 173 | 181 | |
| @@ -180,7 +188,7 @@ static ssize_t · 6 unmodified lines | ||
| 180 | 188 | show_ep_handle(struct device *dev, struct device_attribute *attr, char *buf) |
| 181 | 189 | { |
| 182 | 190 | struct iscsi_endpoint *ep = iscsi_dev_to_endpoint(dev); |
| 183 | − return sysfs_emit(buf, "%llu\n", (unsigned long long) ep->id); | |
| 191 | + return sysfs_emit(buf, "%d\n", ep->id); | |
| 184 | 192 | } |
| 185 | 193 | static ISCSI_ATTR(ep, handle, S_IRUGO, show_ep_handle, NULL); |
| 186 | 194 | |
| @@ -193,48 +201,32 @@ static struct attribute_group iscsi_endpoint_group = { · 6 unmodified lines | ||
| 193 | 201 | .attrs = iscsi_endpoint_attrs, |
| 194 | 202 | }; |
| 195 | 203 | |
| 196 | −#define ISCSI_MAX_EPID -1 | |
| 197 | − | |
| 198 | −static int iscsi_match_epid(struct device *dev, const void *data) | |
| 199 | −{ | |
| 200 | − struct iscsi_endpoint *ep = iscsi_dev_to_endpoint(dev); | |
| 201 | − const uint64_t *epid = data; | |
| 202 | − | |
| 203 | − return *epid == ep->id; | |
| 204 | −} | |
| 205 | − | |
| 206 | 204 | struct iscsi_endpoint * |
| 207 | 205 | iscsi_create_endpoint(int dd_size) |
| 208 | 206 | { |
| 209 | − struct device *dev; | |
| 210 | 207 | struct iscsi_endpoint *ep; |
| 211 | − uint64_t id; | |
| 212 | − int err; | |
| 213 | − | |
| 214 | − for (id = 1; id < ISCSI_MAX_EPID; id++) { | |
| 215 | − dev = class_find_device(&iscsi_endpoint_class, NULL, &id, | |
| 216 | − iscsi_match_epid); | |
| 217 | − if (!dev) | |
| 218 | − break; | |
| 219 | − else | |
| 220 | − put_device(dev); | |
| 221 | − } | |
| 222 | − if (id == ISCSI_MAX_EPID) { | |
| 223 | − printk(KERN_ERR "Too many connections. Max supported %u\n", | |
| 224 | − ISCSI_MAX_EPID - 1); | |
| 225 | − return NULL; | |
| 226 | − } | |
| 208 | + int err, id; | |
| 227 | 209 | |
| 228 | 210 | ep = kzalloc(sizeof(*ep) + dd_size, GFP_KERNEL); |
| 229 | 211 | if (!ep) |
| 230 | 212 | return NULL; |
| 231 | 213 | |
| 214 | + mutex_lock(&iscsi_ep_idr_mutex); | |
| 215 | + id = idr_alloc(&iscsi_ep_idr, ep, 0, -1, GFP_NOIO); | |
| 216 | + if (id < 0) { | |
| 217 | + mutex_unlock(&iscsi_ep_idr_mutex); | |
| 218 | + printk(KERN_ERR "Could not allocate endpoint ID. Error %d.\n", | |
| 219 | + id); | |
| 220 | + goto free_ep; | |
| 221 | + } | |
| 222 | + mutex_unlock(&iscsi_ep_idr_mutex); | |
| 223 | + | |
| 232 | 224 | ep->id = id; |
| 233 | 225 | ep->dev.class = &iscsi_endpoint_class; |
| 234 | − dev_set_name(&ep->dev, "ep-%llu", (unsigned long long) id); | |
| 226 | + dev_set_name(&ep->dev, "ep-%d", id); | |
| 235 | 227 | err = device_register(&ep->dev); |
| 236 | 228 | if (err) |
| 237 | − goto free_ep; | |
| 229 | + goto free_id; | |
| 238 | 230 | |
| 239 | 231 | err = sysfs_create_group(&ep->dev.kobj, &iscsi_endpoint_group); |
| 240 | 232 | if (err) |
| @@ -248,6 +240,10 @@ unregister_dev: · 7 unmodified lines | ||
| 248 | 240 | device_unregister(&ep->dev); |
| 249 | 241 | return NULL; |
| 250 | 242 | |
| 243 | +free_id: | |
| 244 | + mutex_lock(&iscsi_ep_idr_mutex); | |
| 245 | + idr_remove(&iscsi_ep_idr, id); | |
| 246 | + mutex_unlock(&iscsi_ep_idr_mutex); | |
| 251 | 247 | free_ep: |
| 252 | 248 | kfree(ep); |
| 253 | 249 | return NULL; |
| @@ -275,14 +271,17 @@ EXPORT_SYMBOL_GPL(iscsi_put_endpoint); · 21 unmodified lines | ||
| 275 | 271 | */ |
| 276 | 272 | struct iscsi_endpoint *iscsi_lookup_endpoint(u64 handle) |
| 277 | 273 | { |
| 278 | − struct device *dev; | |
| 274 | + struct iscsi_endpoint *ep; | |
| 279 | 275 | |
| 280 | − dev = class_find_device(&iscsi_endpoint_class, NULL, &handle, | |
| 281 | − iscsi_match_epid); | |
| 282 | − if (!dev) | |
| 283 | − return NULL; | |
| 276 | + mutex_lock(&iscsi_ep_idr_mutex); | |
| 277 | + ep = idr_find(&iscsi_ep_idr, handle); | |
| 278 | + if (!ep) | |
| 279 | + goto unlock; | |
| 284 | 280 | |
| 285 | − return iscsi_dev_to_endpoint(dev); | |
| 281 | + get_device(&ep->dev); | |
| 282 | +unlock: | |
| 283 | + mutex_unlock(&iscsi_ep_idr_mutex); | |
| 284 | + return ep; | |
| 286 | 285 | } |
| 287 | 286 | EXPORT_SYMBOL_GPL(iscsi_lookup_endpoint); |
| 288 | 287 | |
| @@ -2202,10 +2201,10 @@ static void iscsi_stop_conn(struct iscsi_cls_conn *conn, int flag) · 1913 unmodified lines | ||
| 2202 | 2201 | |
| 2203 | 2202 | switch (flag) { |
| 2204 | 2203 | case STOP_CONN_RECOVER: |
| 2205 | − conn->state = ISCSI_CONN_FAILED; | |
| 2204 | + WRITE_ONCE(conn->state, ISCSI_CONN_FAILED); | |
| 2206 | 2205 | break; |
| 2207 | 2206 | case STOP_CONN_TERM: |
| 2208 | − conn->state = ISCSI_CONN_DOWN; | |
| 2207 | + WRITE_ONCE(conn->state, ISCSI_CONN_DOWN); | |
| 2209 | 2208 | break; |
| 2210 | 2209 | default: |
| 2211 | 2210 | iscsi_cls_conn_printk(KERN_ERR, conn, "invalid stop flag %d\n", |
| @@ -2217,6 +2216,49 @@ static void iscsi_stop_conn(struct iscsi_cls_conn *conn, int flag) · 5 unmodified lines | ||
| 2217 | 2216 | ISCSI_DBG_TRANS_CONN(conn, "Stopping conn done.\n"); |
| 2218 | 2217 | } |
| 2219 | 2218 | |
| 2219 | +static void iscsi_ep_disconnect(struct iscsi_cls_conn *conn, bool is_active) | |
| 2220 | +{ | |
| 2221 | + struct iscsi_cls_session *session = iscsi_conn_to_session(conn); | |
| 2222 | + struct iscsi_endpoint *ep; | |
| 2223 | + | |
| 2224 | + ISCSI_DBG_TRANS_CONN(conn, "disconnect ep.\n"); | |
| 2225 | + WRITE_ONCE(conn->state, ISCSI_CONN_FAILED); | |
| 2226 | + | |
| 2227 | + if (!conn->ep || !session->transport->ep_disconnect) | |
| 2228 | + return; | |
| 2229 | + | |
| 2230 | + ep = conn->ep; | |
| 2231 | + conn->ep = NULL; | |
| 2232 | + | |
| 2233 | + session->transport->unbind_conn(conn, is_active); | |
| 2234 | + session->transport->ep_disconnect(ep); | |
| 2235 | + ISCSI_DBG_TRANS_CONN(conn, "disconnect ep done.\n"); | |
| 2236 | +} | |
| 2237 | + | |
| 2238 | +static void iscsi_if_disconnect_bound_ep(struct iscsi_cls_conn *conn, | |
| 2239 | + struct iscsi_endpoint *ep, | |
| 2240 | + bool is_active) | |
| 2241 | +{ | |
| 2242 | + /* Check if this was a conn error and the kernel took ownership */ | |
| 2243 | + spin_lock_irq(&conn->lock); | |
| 2244 | + if (!test_bit(ISCSI_CLS_CONN_BIT_CLEANUP, &conn->flags)) { | |
| 2245 | + spin_unlock_irq(&conn->lock); | |
| 2246 | + iscsi_ep_disconnect(conn, is_active); | |
| 2247 | + } else { | |
| 2248 | + spin_unlock_irq(&conn->lock); | |
| 2249 | + ISCSI_DBG_TRANS_CONN(conn, "flush kernel conn cleanup.\n"); | |
| 2250 | + mutex_unlock(&conn->ep_mutex); | |
| 2251 | + | |
| 2252 | + flush_work(&conn->cleanup_work); | |
| 2253 | + /* | |
| 2254 | + * Userspace is now done with the EP so we can release the ref | |
| 2255 | + * iscsi_cleanup_conn_work_fn took. | |
| 2256 | + */ | |
| 2257 | + iscsi_put_endpoint(ep); | |
| 2258 | + mutex_lock(&conn->ep_mutex); | |
| 2259 | + } | |
| 2260 | +} | |
| 2261 | + | |
| 2220 | 2262 | static int iscsi_if_stop_conn(struct iscsi_transport *transport, |
| 2221 | 2263 | struct iscsi_uevent *ev) |
| 2222 | 2264 | { |
| @@ -2237,12 +2279,25 @@ static int iscsi_if_stop_conn(struct iscsi_transport *transport, · 14 unmodified lines | ||
| 2237 | 2279 | cancel_work_sync(&conn->cleanup_work); |
| 2238 | 2280 | iscsi_stop_conn(conn, flag); |
| 2239 | 2281 | } else { |
| 2282 | + /* | |
| 2283 | + * For offload, when iscsid is restarted it won't know about | |
| 2284 | + * existing endpoints so it can't do a ep_disconnect. We clean | |
| 2285 | + * it up here for userspace. | |
| 2286 | + */ | |
| 2287 | + mutex_lock(&conn->ep_mutex); | |
| 2288 | + if (conn->ep) | |
| 2289 | + iscsi_if_disconnect_bound_ep(conn, conn->ep, true); | |
| 2290 | + mutex_unlock(&conn->ep_mutex); | |
| 2291 | + | |
| 2240 | 2292 | /* |
| 2241 | 2293 | * Figure out if it was the kernel or userspace initiating this. |
| 2242 | 2294 | */ |
| 2295 | + spin_lock_irq(&conn->lock); | |
| 2243 | 2296 | if (!test_and_set_bit(ISCSI_CLS_CONN_BIT_CLEANUP, &conn->flags)) { |
| 2297 | + spin_unlock_irq(&conn->lock); | |
| 2244 | 2298 | iscsi_stop_conn(conn, flag); |
| 2245 | 2299 | } else { |
| 2300 | + spin_unlock_irq(&conn->lock); | |
| 2246 | 2301 | ISCSI_DBG_TRANS_CONN(conn, |
| 2247 | 2302 | "flush kernel conn cleanup.\n"); |
| 2248 | 2303 | flush_work(&conn->cleanup_work); |
| @@ -2251,31 +2306,14 @@ static int iscsi_if_stop_conn(struct iscsi_transport *transport, · 2 unmodified lines | ||
| 2251 | 2306 | * Only clear for recovery to avoid extra cleanup runs during |
| 2252 | 2307 | * termination. |
| 2253 | 2308 | */ |
| 2309 | + spin_lock_irq(&conn->lock); | |
| 2254 | 2310 | clear_bit(ISCSI_CLS_CONN_BIT_CLEANUP, &conn->flags); |
| 2311 | + spin_unlock_irq(&conn->lock); | |
| 2255 | 2312 | } |
| 2256 | 2313 | ISCSI_DBG_TRANS_CONN(conn, "iscsi if conn stop done.\n"); |
| 2257 | 2314 | return 0; |
| 2258 | 2315 | } |
| 2259 | 2316 | |
| 2260 | −static void iscsi_ep_disconnect(struct iscsi_cls_conn *conn, bool is_active) | |
| 2261 | −{ | |
| 2262 | − struct iscsi_cls_session *session = iscsi_conn_to_session(conn); | |
| 2263 | − struct iscsi_endpoint *ep; | |
| 2264 | − | |
| 2265 | − ISCSI_DBG_TRANS_CONN(conn, "disconnect ep.\n"); | |
| 2266 | − conn->state = ISCSI_CONN_FAILED; | |
| 2267 | − | |
| 2268 | − if (!conn->ep || !session->transport->ep_disconnect) | |
| 2269 | − return; | |
| 2270 | − | |
| 2271 | − ep = conn->ep; | |
| 2272 | − conn->ep = NULL; | |
| 2273 | − | |
| 2274 | − session->transport->unbind_conn(conn, is_active); | |
| 2275 | − session->transport->ep_disconnect(ep); | |
| 2276 | − ISCSI_DBG_TRANS_CONN(conn, "disconnect ep done.\n"); | |
| 2277 | −} | |
| 2278 | − | |
| 2279 | 2317 | static void iscsi_cleanup_conn_work_fn(struct work_struct *work) |
| 2280 | 2318 | { |
| 2281 | 2319 | struct iscsi_cls_conn *conn = container_of(work, struct iscsi_cls_conn, |
| @@ -2284,18 +2322,11 @@ static void iscsi_cleanup_conn_work_fn(struct work_struct *work) · 2 unmodified lines | ||
| 2284 | 2322 | |
| 2285 | 2323 | mutex_lock(&conn->ep_mutex); |
| 2286 | 2324 | /* |
| 2287 | − * If we are not at least bound there is nothing for us to do. Userspace | |
| 2288 | − * will do a ep_disconnect call if offload is used, but will not be | |
| 2289 | − * doing a stop since there is nothing to clean up, so we have to clear | |
| 2290 | − * the cleanup bit here. | |
| 2325 | + * Get a ref to the ep, so we don't release its ID until after | |
| 2326 | + * userspace is done referencing it in iscsi_if_disconnect_bound_ep. | |
| 2291 | 2327 | */ |
| 2292 | − if (conn->state != ISCSI_CONN_BOUND && conn->state != ISCSI_CONN_UP) { | |
| 2293 | − ISCSI_DBG_TRANS_CONN(conn, "Got error while conn is already failed. Ignoring.\n"); | |
| 2294 | − clear_bit(ISCSI_CLS_CONN_BIT_CLEANUP, &conn->flags); | |
| 2295 | − mutex_unlock(&conn->ep_mutex); | |
| 2296 | − return; | |
| 2297 | − } | |
| 2298 | − | |
| 2328 | + if (conn->ep) | |
| 2329 | + get_device(&conn->ep->dev); | |
| 2299 | 2330 | iscsi_ep_disconnect(conn, false); |
| 2300 | 2331 | |
| 2301 | 2332 | if (system_state != SYSTEM_RUNNING) { |
| @@ -2340,11 +2371,12 @@ iscsi_alloc_conn(struct iscsi_cls_session *session, int dd_size, uint32_t cid) · 38 unmodified lines | ||
| 2340 | 2371 | conn->dd_data = &conn[1]; |
| 2341 | 2372 | |
| 2342 | 2373 | mutex_init(&conn->ep_mutex); |
| 2374 | + spin_lock_init(&conn->lock); | |
| 2343 | 2375 | INIT_LIST_HEAD(&conn->conn_list); |
| 2344 | 2376 | INIT_WORK(&conn->cleanup_work, iscsi_cleanup_conn_work_fn); |
| 2345 | 2377 | conn->transport = transport; |
| 2346 | 2378 | conn->cid = cid; |
| 2347 | − conn->state = ISCSI_CONN_DOWN; | |
| 2379 | + WRITE_ONCE(conn->state, ISCSI_CONN_DOWN); | |
| 2348 | 2380 | |
| 2349 | 2381 | /* this is released in the dev's release function */ |
| 2350 | 2382 | if (!get_device(&session->dev)) |
| @@ -2542,9 +2574,32 @@ void iscsi_conn_error_event(struct iscsi_cls_conn *conn, enum iscsi_err error) · 191 unmodified lines | ||
| 2542 | 2574 | struct iscsi_uevent *ev; |
| 2543 | 2575 | struct iscsi_internal *priv; |
| 2544 | 2576 | int len = nlmsg_total_size(sizeof(*ev)); |
| 2577 | + unsigned long flags; | |
| 2578 | + int state; | |
| 2545 | 2579 | |
| 2546 | − if (!test_and_set_bit(ISCSI_CLS_CONN_BIT_CLEANUP, &conn->flags)) | |
| 2547 | − queue_work(iscsi_conn_cleanup_workq, &conn->cleanup_work); | |
| 2580 | + spin_lock_irqsave(&conn->lock, flags); | |
| 2581 | + /* | |
| 2582 | + * Userspace will only do a stop call if we are at least bound. And, we | |
| 2583 | + * only need to do the in kernel cleanup if in the UP state so cmds can | |
| 2584 | + * be released to upper layers. If in other states just wait for | |
| 2585 | + * userspace to avoid races that can leave the cleanup_work queued. | |
| 2586 | + */ | |
| 2587 | + state = READ_ONCE(conn->state); | |
| 2588 | + switch (state) { | |
| 2589 | + case ISCSI_CONN_BOUND: | |
| 2590 | + case ISCSI_CONN_UP: | |
| 2591 | + if (!test_and_set_bit(ISCSI_CLS_CONN_BIT_CLEANUP, | |
| 2592 | + &conn->flags)) { | |
| 2593 | + queue_work(iscsi_conn_cleanup_workq, | |
| 2594 | + &conn->cleanup_work); | |
| 2595 | + } | |
| 2596 | + break; | |
| 2597 | + default: | |
| 2598 | + ISCSI_DBG_TRANS_CONN(conn, "Got conn error in state %d\n", | |
| 2599 | + state); | |
| 2600 | + break; | |
| 2601 | + } | |
| 2602 | + spin_unlock_irqrestore(&conn->lock, flags); | |
| 2548 | 2603 | |
| 2549 | 2604 | priv = iscsi_if_transport_lookup(conn->transport); |
| 2550 | 2605 | if (!priv) |
| @@ -2894,7 +2949,7 @@ iscsi_set_param(struct iscsi_transport *transport, struct iscsi_uevent *ev) · 343 unmodified lines | ||
| 2894 | 2949 | char *data = (char*)ev + sizeof(*ev); |
| 2895 | 2950 | struct iscsi_cls_conn *conn; |
| 2896 | 2951 | struct iscsi_cls_session *session; |
| 2897 | − int err = 0, value = 0; | |
| 2952 | + int err = 0, value = 0, state; | |
| 2898 | 2953 | |
| 2899 | 2954 | if (ev->u.set_param.len > PAGE_SIZE) |
| 2900 | 2955 | return -EINVAL; |
| @@ -2911,8 +2966,8 @@ iscsi_set_param(struct iscsi_transport *transport, struct iscsi_uevent *ev) · 10 unmodified lines | ||
| 2911 | 2966 | session->recovery_tmo = value; |
| 2912 | 2967 | break; |
| 2913 | 2968 | default: |
| 2914 | − if ((conn->state == ISCSI_CONN_BOUND) || | |
| 2915 | − (conn->state == ISCSI_CONN_UP)) { | |
| 2969 | + state = READ_ONCE(conn->state); | |
| 2970 | + if (state == ISCSI_CONN_BOUND || state == ISCSI_CONN_UP) { | |
| 2916 | 2971 | err = transport->set_param(conn, ev->u.set_param.param, |
| 2917 | 2972 | data, ev->u.set_param.len); |
| 2918 | 2973 | } else { |
| @@ -2984,16 +3039,7 @@ static int iscsi_if_ep_disconnect(struct iscsi_transport *transport, · 65 unmodified lines | ||
| 2984 | 3039 | } |
| 2985 | 3040 | |
| 2986 | 3041 | mutex_lock(&conn->ep_mutex); |
| 2987 | − /* Check if this was a conn error and the kernel took ownership */ | |
| 2988 | − if (test_bit(ISCSI_CLS_CONN_BIT_CLEANUP, &conn->flags)) { | |
| 2989 | − ISCSI_DBG_TRANS_CONN(conn, "flush kernel conn cleanup.\n"); | |
| 2990 | − mutex_unlock(&conn->ep_mutex); | |
| 2991 | − | |
| 2992 | − flush_work(&conn->cleanup_work); | |
| 2993 | − goto put_ep; | |
| 2994 | − } | |
| 2995 | − | |
| 2996 | − iscsi_ep_disconnect(conn, false); | |
| 3042 | + iscsi_if_disconnect_bound_ep(conn, ep, false); | |
| 2997 | 3043 | mutex_unlock(&conn->ep_mutex); |
| 2998 | 3044 | put_ep: |
| 2999 | 3045 | iscsi_put_endpoint(ep); |
| @@ -3696,24 +3742,17 @@ static int iscsi_if_transport_conn(struct iscsi_transport *transport, · 696 unmodified lines | ||
| 3696 | 3742 | return -EINVAL; |
| 3697 | 3743 | |
| 3698 | 3744 | mutex_lock(&conn->ep_mutex); |
| 3745 | + spin_lock_irq(&conn->lock); | |
| 3699 | 3746 | if (test_bit(ISCSI_CLS_CONN_BIT_CLEANUP, &conn->flags)) { |
| 3747 | + spin_unlock_irq(&conn->lock); | |
| 3700 | 3748 | mutex_unlock(&conn->ep_mutex); |
| 3701 | 3749 | ev->r.retcode = -ENOTCONN; |
| 3702 | 3750 | return 0; |
| 3703 | 3751 | } |
| 3752 | + spin_unlock_irq(&conn->lock); | |
| 3704 | 3753 | |
| 3705 | 3754 | switch (nlh->nlmsg_type) { |
| 3706 | 3755 | case ISCSI_UEVENT_BIND_CONN: |
| 3707 | − if (conn->ep) { | |
| 3708 | − /* | |
| 3709 | − * For offload boot support where iscsid is restarted | |
| 3710 | − * during the pivot root stage, the ep will be intact | |
| 3711 | − * here when the new iscsid instance starts up and | |
| 3712 | − * reconnects. | |
| 3713 | − */ | |
| 3714 | − iscsi_ep_disconnect(conn, true); | |
| 3715 | − } | |
| 3716 | − | |
| 3717 | 3756 | session = iscsi_session_lookup(ev->u.b_conn.sid); |
| 3718 | 3757 | if (!session) { |
| 3719 | 3758 | err = -EINVAL; |
| @@ -3724,7 +3763,7 @@ static int iscsi_if_transport_conn(struct iscsi_transport *transport, · 4 unmodified lines | ||
| 3724 | 3763 | ev->u.b_conn.transport_eph, |
| 3725 | 3764 | ev->u.b_conn.is_leading); |
| 3726 | 3765 | if (!ev->r.retcode) |
| 3727 | − conn->state = ISCSI_CONN_BOUND; | |
| 3766 | + WRITE_ONCE(conn->state, ISCSI_CONN_BOUND); | |
| 3728 | 3767 | |
| 3729 | 3768 | if (ev->r.retcode || !transport->ep_connect) |
| 3730 | 3769 | break; |
| @@ -3743,7 +3782,8 @@ static int iscsi_if_transport_conn(struct iscsi_transport *transport, · 12 unmodified lines | ||
| 3743 | 3782 | case ISCSI_UEVENT_START_CONN: |
| 3744 | 3783 | ev->r.retcode = transport->start_conn(conn); |
| 3745 | 3784 | if (!ev->r.retcode) |
| 3746 | − conn->state = ISCSI_CONN_UP; | |
| 3785 | + WRITE_ONCE(conn->state, ISCSI_CONN_UP); | |
| 3786 | + | |
| 3747 | 3787 | break; |
| 3748 | 3788 | case ISCSI_UEVENT_SEND_PDU: |
| 3749 | 3789 | pdu_len = nlh->nlmsg_len - sizeof(*nlh) - sizeof(*ev); |
| @@ -4050,10 +4090,11 @@ static ssize_t show_conn_state(struct device *dev, · 300 unmodified lines | ||
| 4050 | 4090 | { |
| 4051 | 4091 | struct iscsi_cls_conn *conn = iscsi_dev_to_conn(dev->parent); |
| 4052 | 4092 | const char *state = "unknown"; |
| 4093 | + int conn_state = READ_ONCE(conn->state); | |
| 4053 | 4094 | |
| 4054 | − if (conn->state >= 0 && | |
| 4055 | − conn->state < ARRAY_SIZE(connection_state_names)) | |
| 4056 | − state = connection_state_names[conn->state]; | |
| 4095 | + if (conn_state >= 0 && | |
| 4096 | + conn_state < ARRAY_SIZE(connection_state_names)) | |
| 4097 | + state = connection_state_names[conn_state]; | |
| 4057 | 4098 | |
| 4058 | 4099 | return sysfs_emit(buf, "%s\n", state); |
| 4059 | 4100 | } |
| @@ -41,7 +41,7 @@ static int sr_read_tochdr(struct cdrom_device_info *cdi, · 40 unmodified lines | ||
| 41 | 41 | int result; |
| 42 | 42 | unsigned char *buffer; |
| 43 | 43 | |
| 44 | − buffer = kmalloc(32, GFP_KERNEL); | |
| 44 | + buffer = kzalloc(32, GFP_KERNEL); | |
| 45 | 45 | if (!buffer) |
| 46 | 46 | return -ENOMEM; |
| 47 | 47 | |
| @@ -55,10 +55,13 @@ static int sr_read_tochdr(struct cdrom_device_info *cdi, · 7 unmodified lines | ||
| 55 | 55 | cgc.data_direction = DMA_FROM_DEVICE; |
| 56 | 56 | |
| 57 | 57 | result = sr_do_ioctl(cd, &cgc); |
| 58 | + if (result) | |
| 59 | + goto err; | |
| 58 | 60 | |
| 59 | 61 | tochdr->cdth_trk0 = buffer[2]; |
| 60 | 62 | tochdr->cdth_trk1 = buffer[3]; |
| 61 | 63 | |
| 64 | +err: | |
| 62 | 65 | kfree(buffer); |
| 63 | 66 | return result; |
| 64 | 67 | } |
| @@ -71,7 +74,7 @@ static int sr_read_tocentry(struct cdrom_device_info *cdi, · 6 unmodified lines | ||
| 71 | 74 | int result; |
| 72 | 75 | unsigned char *buffer; |
| 73 | 76 | |
| 74 | − buffer = kmalloc(32, GFP_KERNEL); | |
| 77 | + buffer = kzalloc(32, GFP_KERNEL); | |
| 75 | 78 | if (!buffer) |
| 76 | 79 | return -ENOMEM; |
| 77 | 80 | |
| @@ -86,6 +89,8 @@ static int sr_read_tocentry(struct cdrom_device_info *cdi, · 8 unmodified lines | ||
| 86 | 89 | cgc.data_direction = DMA_FROM_DEVICE; |
| 87 | 90 | |
| 88 | 91 | result = sr_do_ioctl(cd, &cgc); |
| 92 | + if (result) | |
| 93 | + goto err; | |
| 89 | 94 | |
| 90 | 95 | tocentry->cdte_ctrl = buffer[5] & 0xf; |
| 91 | 96 | tocentry->cdte_adr = buffer[5] >> 4; |
| @@ -98,6 +103,7 @@ static int sr_read_tocentry(struct cdrom_device_info *cdi, · 6 unmodified lines | ||
| 98 | 103 | tocentry->cdte_addr.lba = (((((buffer[8] << 8) + buffer[9]) << 8) |
| 99 | 104 | + buffer[10]) << 8) + buffer[11]; |
| 100 | 105 | |
| 106 | +err: | |
| 101 | 107 | kfree(buffer); |
| 102 | 108 | return result; |
| 103 | 109 | } |
| @@ -384,7 +390,7 @@ int sr_get_mcn(struct cdrom_device_info *cdi, struct cdrom_mcn *mcn) · 280 unmodified lines | ||
| 384 | 390 | { |
| 385 | 391 | Scsi_CD *cd = cdi->handle; |
| 386 | 392 | struct packet_command cgc; |
| 387 | − char *buffer = kmalloc(32, GFP_KERNEL); | |
| 393 | + char *buffer = kzalloc(32, GFP_KERNEL); | |
| 388 | 394 | int result; |
| 389 | 395 | |
| 390 | 396 | if (!buffer) |
| @@ -400,10 +406,13 @@ int sr_get_mcn(struct cdrom_device_info *cdi, struct cdrom_mcn *mcn) · 9 unmodified lines | ||
| 400 | 406 | cgc.data_direction = DMA_FROM_DEVICE; |
| 401 | 407 | cgc.timeout = IOCTL_TIMEOUT; |
| 402 | 408 | result = sr_do_ioctl(cd, &cgc); |
| 409 | + if (result) | |
| 410 | + goto err; | |
| 403 | 411 | |
| 404 | 412 | memcpy(mcn->medium_catalog_number, buffer + 9, 13); |
| 405 | 413 | mcn->medium_catalog_number[13] = 0; |
| 406 | 414 | |
| 415 | +err: | |
| 407 | 416 | kfree(buffer); |
| 408 | 417 | return result; |
| 409 | 418 | } |
| @@ -50,7 +50,7 @@ struct imx8m_blk_ctrl_domain_data { · 49 unmodified lines | ||
| 50 | 50 | u32 mipi_phy_rst_mask; |
| 51 | 51 | }; |
| 52 | 52 | |
| 53 | −#define DOMAIN_MAX_CLKS 3 | |
| 53 | +#define DOMAIN_MAX_CLKS 4 | |
| 54 | 54 | |
| 55 | 55 | struct imx8m_blk_ctrl_domain { |
| 56 | 56 | struct generic_pm_domain genpd; |
| @@ -277,6 +277,9 @@ static int atmel_qspi_find_mode(const struct spi_mem_op *op) · 276 unmodified lines | ||
| 277 | 277 | static bool atmel_qspi_supports_op(struct spi_mem *mem, |
| 278 | 278 | const struct spi_mem_op *op) |
| 279 | 279 | { |
| 280 | + if (!spi_mem_default_supports_op(mem, op)) | |
| 281 | + return false; | |
| 282 | + | |
| 280 | 283 | if (atmel_qspi_find_mode(op) < 0) |
| 281 | 284 | return false; |
| 282 | 285 | |
| @@ -1415,9 +1415,24 @@ static bool cqspi_supports_mem_op(struct spi_mem *mem, · 1414 unmodified lines | ||
| 1415 | 1415 | all_false = !op->cmd.dtr && !op->addr.dtr && !op->dummy.dtr && |
| 1416 | 1416 | !op->data.dtr; |
| 1417 | 1417 | |
| 1418 | − /* Mixed DTR modes not supported. */ | |
| 1419 | − if (!(all_true || all_false)) | |
| 1418 | + if (all_true) { | |
| 1419 | + /* Right now we only support 8-8-8 DTR mode. */ | |
| 1420 | + if (op->cmd.nbytes && op->cmd.buswidth != 8) | |
| 1421 | + return false; | |
| 1422 | + if (op->addr.nbytes && op->addr.buswidth != 8) | |
| 1423 | + return false; | |
| 1424 | + if (op->data.nbytes && op->data.buswidth != 8) | |
| 1425 | + return false; | |
| 1426 | + } else if (all_false) { | |
| 1427 | + /* Only 1-1-X ops are supported without DTR */ | |
| 1428 | + if (op->cmd.nbytes && op->cmd.buswidth > 1) | |
| 1429 | + return false; | |
| 1430 | + if (op->addr.nbytes && op->addr.buswidth > 1) | |
| 1431 | + return false; | |
| 1432 | + } else { | |
| 1433 | + /* Mixed DTR modes are not supported. */ | |
| 1420 | 1434 | return false; |
| 1435 | + } | |
| 1421 | 1436 | |
| 1422 | 1437 | return spi_mem_default_supports_op(mem, op); |
| 1423 | 1438 | } |
| @@ -72,6 +72,7 @@ static const struct pci_device_id intel_spi_pci_ids[] = { · 71 unmodified lines | ||
| 72 | 72 | { PCI_VDEVICE(INTEL, 0x4da4), (unsigned long)&bxt_info }, |
| 73 | 73 | { PCI_VDEVICE(INTEL, 0x51a4), (unsigned long)&cnl_info }, |
| 74 | 74 | { PCI_VDEVICE(INTEL, 0x54a4), (unsigned long)&cnl_info }, |
| 75 | + { PCI_VDEVICE(INTEL, 0x7a24), (unsigned long)&cnl_info }, | |
| 75 | 76 | { PCI_VDEVICE(INTEL, 0x7aa4), (unsigned long)&cnl_info }, |
| 76 | 77 | { PCI_VDEVICE(INTEL, 0xa0a4), (unsigned long)&bxt_info }, |
| 77 | 78 | { PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info }, |
| @@ -960,7 +960,17 @@ static int __maybe_unused mtk_nor_suspend(struct device *dev) · 959 unmodified lines | ||
| 960 | 960 | |
| 961 | 961 | static int __maybe_unused mtk_nor_resume(struct device *dev) |
| 962 | 962 | { |
| 963 | − return pm_runtime_force_resume(dev); | |
| 963 | + struct spi_controller *ctlr = dev_get_drvdata(dev); | |
| 964 | + struct mtk_nor *sp = spi_controller_get_devdata(ctlr); | |
| 965 | + int ret; | |
| 966 | + | |
| 967 | + ret = pm_runtime_force_resume(dev); | |
| 968 | + if (ret) | |
| 969 | + return ret; | |
| 970 | + | |
| 971 | + mtk_nor_init(sp); | |
| 972 | + | |
| 973 | + return 0; | |
| 964 | 974 | } |
| 965 | 975 | |
| 966 | 976 | static const struct dev_pm_ops mtk_nor_pm_ops = { |
| @@ -588,7 +588,7 @@ static void pscsi_destroy_device(struct se_device *dev) · 587 unmodified lines | ||
| 588 | 588 | } |
| 589 | 589 | |
| 590 | 590 | static void pscsi_complete_cmd(struct se_cmd *cmd, u8 scsi_status, |
| 591 | − unsigned char *req_sense) | |
| 591 | + unsigned char *req_sense, int valid_data) | |
| 592 | 592 | { |
| 593 | 593 | struct pscsi_dev_virt *pdv = PSCSI_DEV(cmd->se_dev); |
| 594 | 594 | struct scsi_device *sd = pdv->pdv_sd; |
| @@ -681,7 +681,7 @@ after_mode_select: · 86 unmodified lines | ||
| 681 | 681 | * back despite framework assumption that a |
| 682 | 682 | * check condition means there is no data |
| 683 | 683 | */ |
| 684 | − if (sd->type == TYPE_TAPE && | |
| 684 | + if (sd->type == TYPE_TAPE && valid_data && | |
| 685 | 685 | cmd->data_direction == DMA_FROM_DEVICE) { |
| 686 | 686 | /* |
| 687 | 687 | * is sense data valid, fixed format, |
| @@ -1032,6 +1032,7 @@ static void pscsi_req_done(struct request *req, blk_status_t status) · 344 unmodified lines | ||
| 1032 | 1032 | struct se_cmd *cmd = req->end_io_data; |
| 1033 | 1033 | struct scsi_cmnd *scmd = blk_mq_rq_to_pdu(req); |
| 1034 | 1034 | enum sam_status scsi_status = scmd->result & 0xff; |
| 1035 | + int valid_data = cmd->data_length - scmd->resid_len; | |
| 1035 | 1036 | u8 *cdb = cmd->priv; |
| 1036 | 1037 | |
| 1037 | 1038 | if (scsi_status != SAM_STAT_GOOD) { |
| @@ -1039,12 +1040,11 @@ static void pscsi_req_done(struct request *req, blk_status_t status) · 1 unmodified line | ||
| 1039 | 1040 | " 0x%02x Result: 0x%08x\n", cmd, cdb[0], scmd->result); |
| 1040 | 1041 | } |
| 1041 | 1042 | |
| 1042 | − pscsi_complete_cmd(cmd, scsi_status, scmd->sense_buffer); | |
| 1043 | + pscsi_complete_cmd(cmd, scsi_status, scmd->sense_buffer, valid_data); | |
| 1043 | 1044 | |
| 1044 | 1045 | switch (host_byte(scmd->result)) { |
| 1045 | 1046 | case DID_OK: |
| 1046 | − target_complete_cmd_with_length(cmd, scsi_status, | |
| 1047 | − cmd->data_length - scmd->resid_len); | |
| 1047 | + target_complete_cmd_with_length(cmd, scsi_status, valid_data); | |
| 1048 | 1048 | break; |
| 1049 | 1049 | default: |
| 1050 | 1050 | pr_debug("PSCSI Host Byte exception at cmd: %p CDB:" |
| @@ -865,6 +865,7 @@ err_rhashtable_free: · 864 unmodified lines | ||
| 865 | 865 | rhashtable_free_and_destroy(&optee->ffa.global_ids, rh_free_fn, NULL); |
| 866 | 866 | optee_supp_uninit(&optee->supp); |
| 867 | 867 | mutex_destroy(&optee->call_queue.mutex); |
| 868 | + mutex_destroy(&optee->ffa.mutex); | |
| 868 | 869 | err_unreg_supp_teedev: |
| 869 | 870 | tee_device_unregister(optee->supp_teedev); |
| 870 | 871 | err_unreg_teedev: |
| @@ -113,8 +113,10 @@ config THERMAL_DEFAULT_GOV_USER_SPACE · 112 unmodified lines | ||
| 113 | 113 | bool "user_space" |
| 114 | 114 | select THERMAL_GOV_USER_SPACE |
| 115 | 115 | help |
| 116 | − Select this if you want to let the user space manage the | |
| 117 | − platform thermals. | |
| 116 | + The Userspace governor allows to get trip point crossed | |
| 117 | + notification from the kernel via uevents. It is recommended | |
| 118 | + to use the netlink interface instead which gives richer | |
| 119 | + information about the thermal framework events. | |
| 118 | 120 | |
| 119 | 121 | config THERMAL_DEFAULT_GOV_POWER_ALLOCATOR |
| 120 | 122 | bool "power_allocator" |
| @@ -17,8 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | |
| 18 | 18 | static int user_space_bind(struct thermal_zone_device *tz) |
| 19 | 19 | { |
| 20 | − pr_warn_once("Userspace governor deprecated: use thermal netlink " \ | |
| 21 | − "notification instead\n"); | |
| 20 | + pr_info_once("Consider using thermal netlink events interface\n"); | |
| 22 | 21 | |
| 23 | 22 | return 0; |
| 24 | 23 | } |
| @@ -68,7 +68,7 @@ static int evaluate_odvp(struct int3400_thermal_priv *priv); · 67 unmodified lines | ||
| 68 | 68 | struct odvp_attr { |
| 69 | 69 | int odvp; |
| 70 | 70 | struct int3400_thermal_priv *priv; |
| 71 | − struct kobj_attribute attr; | |
| 71 | + struct device_attribute attr; | |
| 72 | 72 | }; |
| 73 | 73 | |
| 74 | 74 | static ssize_t data_vault_read(struct file *file, struct kobject *kobj, |
| @@ -311,7 +311,7 @@ end: · 236 unmodified lines | ||
| 311 | 311 | return result; |
| 312 | 312 | } |
| 313 | 313 | |
| 314 | −static ssize_t odvp_show(struct kobject *kobj, struct kobj_attribute *attr, | |
| 314 | +static ssize_t odvp_show(struct device *dev, struct device_attribute *attr, | |
| 315 | 315 | char *buf) |
| 316 | 316 | { |
| 317 | 317 | struct odvp_attr *odvp_attr; |
| @@ -610,9 +610,6 @@ cur_state_store(struct device *dev, struct device_attribute *attr, · 609 unmodified lines | ||
| 610 | 610 | unsigned long state; |
| 611 | 611 | int result; |
| 612 | 612 | |
| 613 | − dev_warn_once(&cdev->device, | |
| 614 | − "Setting cooling device state is deprecated\n"); | |
| 615 | − | |
| 616 | 613 | if (sscanf(buf, "%ld\n", &state) != 1) |
| 617 | 614 | return -EINVAL; |
| 618 | 615 | |
| @@ -73,6 +73,8 @@ module_param(debug, int, 0600); · 72 unmodified lines | ||
| 73 | 73 | */ |
| 74 | 74 | #define MAX_MRU 1500 |
| 75 | 75 | #define MAX_MTU 1500 |
| 76 | +/* SOF, ADDR, CTRL, LEN1, LEN2, ..., FCS, EOF */ | |
| 77 | +#define PROT_OVERHEAD 7 | |
| 76 | 78 | #define GSM_NET_TX_TIMEOUT (HZ*10) |
| 77 | 79 | |
| 78 | 80 | /* |
| @@ -219,7 +221,6 @@ struct gsm_mux { · 140 unmodified lines | ||
| 219 | 221 | int encoding; |
| 220 | 222 | u8 control; |
| 221 | 223 | u8 fcs; |
| 222 | − u8 received_fcs; | |
| 223 | 224 | u8 *txframe; /* TX framing buffer */ |
| 224 | 225 | |
| 225 | 226 | /* Method for the receiver side */ |
| @@ -231,6 +232,7 @@ struct gsm_mux { · 5 unmodified lines | ||
| 231 | 232 | int initiator; /* Did we initiate connection */ |
| 232 | 233 | bool dead; /* Has the mux been shut down */ |
| 233 | 234 | struct gsm_dlci *dlci[NUM_DLCI]; |
| 235 | + int old_c_iflag; /* termios c_iflag value before attach */ | |
| 234 | 236 | bool constipated; /* Asked by remote to shut up */ |
| 235 | 237 | |
| 236 | 238 | spinlock_t tx_lock; |
| @@ -271,10 +273,6 @@ static DEFINE_SPINLOCK(gsm_mux_lock); · 34 unmodified lines | ||
| 271 | 273 | |
| 272 | 274 | static struct tty_driver *gsm_tty_driver; |
| 273 | 275 | |
| 274 | −/* Save dlci open address */ | |
| 275 | −static int addr_open[256] = { 0 }; | |
| 276 | −/* Save dlci open count */ | |
| 277 | −static int addr_cnt; | |
| 278 | 276 | /* |
| 279 | 277 | * This section of the driver logic implements the GSM encodings |
| 280 | 278 | * both the basic and the 'advanced'. Reliable transport is not |
| @@ -369,6 +367,7 @@ static const u8 gsm_fcs8[256] = { · 88 unmodified lines | ||
| 369 | 367 | #define GOOD_FCS 0xCF |
| 370 | 368 | |
| 371 | 369 | static int gsmld_output(struct gsm_mux *gsm, u8 *data, int len); |
| 370 | +static int gsm_modem_update(struct gsm_dlci *dlci, u8 brk); | |
| 372 | 371 | |
| 373 | 372 | /** |
| 374 | 373 | * gsm_fcs_add - update FCS |
| @@ -832,7 +831,7 @@ static int gsm_dlci_data_output(struct gsm_mux *gsm, struct gsm_dlci *dlci) · 457 unmodified lines | ||
| 832 | 831 | break; |
| 833 | 832 | case 2: /* Unstructed with modem bits. |
| 834 | 833 | Always one byte as we never send inline break data */ |
| 835 | − *dp++ = gsm_encode_modem(dlci); | |
| 834 | + *dp++ = (gsm_encode_modem(dlci) << 1) | EA; | |
| 836 | 835 | break; |
| 837 | 836 | } |
| 838 | 837 | WARN_ON(kfifo_out_locked(&dlci->fifo, dp , len, &dlci->lock) != len); |
| @@ -916,6 +915,66 @@ static int gsm_dlci_data_output_framed(struct gsm_mux *gsm, · 77 unmodified lines | ||
| 916 | 915 | return size; |
| 917 | 916 | } |
| 918 | 917 | |
| 918 | +/** | |
| 919 | + * gsm_dlci_modem_output - try and push modem status out of a DLCI | |
| 920 | + * @gsm: mux | |
| 921 | + * @dlci: the DLCI to pull modem status from | |
| 922 | + * @brk: break signal | |
| 923 | + * | |
| 924 | + * Push an empty frame in to the transmit queue to update the modem status | |
| 925 | + * bits and to transmit an optional break. | |
| 926 | + * | |
| 927 | + * Caller must hold the tx_lock of the mux. | |
| 928 | + */ | |
| 929 | + | |
| 930 | +static int gsm_dlci_modem_output(struct gsm_mux *gsm, struct gsm_dlci *dlci, | |
| 931 | + u8 brk) | |
| 932 | +{ | |
| 933 | + u8 *dp = NULL; | |
| 934 | + struct gsm_msg *msg; | |
| 935 | + int size = 0; | |
| 936 | + | |
| 937 | + /* for modem bits without break data */ | |
| 938 | + switch (dlci->adaption) { | |
| 939 | + case 1: /* Unstructured */ | |
| 940 | + break; | |
| 941 | + case 2: /* Unstructured with modem bits. */ | |
| 942 | + size++; | |
| 943 | + if (brk > 0) | |
| 944 | + size++; | |
| 945 | + break; | |
| 946 | + default: | |
| 947 | + pr_err("%s: unsupported adaption %d\n", __func__, | |
| 948 | + dlci->adaption); | |
| 949 | + return -EINVAL; | |
| 950 | + } | |
| 951 | + | |
| 952 | + msg = gsm_data_alloc(gsm, dlci->addr, size, gsm->ftype); | |
| 953 | + if (!msg) { | |
| 954 | + pr_err("%s: gsm_data_alloc error", __func__); | |
| 955 | + return -ENOMEM; | |
| 956 | + } | |
| 957 | + dp = msg->data; | |
| 958 | + switch (dlci->adaption) { | |
| 959 | + case 1: /* Unstructured */ | |
| 960 | + break; | |
| 961 | + case 2: /* Unstructured with modem bits. */ | |
| 962 | + if (brk == 0) { | |
| 963 | + *dp++ = (gsm_encode_modem(dlci) << 1) | EA; | |
| 964 | + } else { | |
| 965 | + *dp++ = gsm_encode_modem(dlci) << 1; | |
| 966 | + *dp++ = (brk << 4) | 2 | EA; /* Length, Break, EA */ | |
| 967 | + } | |
| 968 | + break; | |
| 969 | + default: | |
| 970 | + /* Handled above */ | |
| 971 | + break; | |
| 972 | + } | |
| 973 | + | |
| 974 | + __gsm_data_queue(dlci, msg); | |
| 975 | + return size; | |
| 976 | +} | |
| 977 | + | |
| 919 | 978 | /** |
| 920 | 979 | * gsm_dlci_data_sweep - look for data to send |
| 921 | 980 | * @gsm: the GSM mux |
| @@ -1093,7 +1152,6 @@ static void gsm_control_modem(struct gsm_mux *gsm, const u8 *data, int clen) · 171 unmodified lines | ||
| 1093 | 1152 | { |
| 1094 | 1153 | unsigned int addr = 0; |
| 1095 | 1154 | unsigned int modem = 0; |
| 1096 | − unsigned int brk = 0; | |
| 1097 | 1155 | struct gsm_dlci *dlci; |
| 1098 | 1156 | int len = clen; |
| 1099 | 1157 | int slen; |
| @@ -1123,17 +1181,8 @@ static void gsm_control_modem(struct gsm_mux *gsm, const u8 *data, int clen) · 23 unmodified lines | ||
| 1123 | 1181 | return; |
| 1124 | 1182 | } |
| 1125 | 1183 | len--; |
| 1126 | − if (len > 0) { | |
| 1127 | − while (gsm_read_ea(&brk, *dp++) == 0) { | |
| 1128 | − len--; | |
| 1129 | − if (len == 0) | |
| 1130 | − return; | |
| 1131 | − } | |
| 1132 | − modem <<= 7; | |
| 1133 | − modem |= (brk & 0x7f); | |
| 1134 | − } | |
| 1135 | 1184 | tty = tty_port_tty_get(&dlci->port); |
| 1136 | − gsm_process_modem(tty, dlci, modem, slen); | |
| 1185 | + gsm_process_modem(tty, dlci, modem, slen - len); | |
| 1137 | 1186 | if (tty) { |
| 1138 | 1187 | tty_wakeup(tty); |
| 1139 | 1188 | tty_kref_put(tty); |
| @@ -1193,7 +1242,6 @@ static void gsm_control_rls(struct gsm_mux *gsm, const u8 *data, int clen) · 53 unmodified lines | ||
| 1193 | 1242 | } |
| 1194 | 1243 | |
| 1195 | 1244 | static void gsm_dlci_begin_close(struct gsm_dlci *dlci); |
| 1196 | −static void gsm_dlci_close(struct gsm_dlci *dlci); | |
| 1197 | 1245 | |
| 1198 | 1246 | /** |
| 1199 | 1247 | * gsm_control_message - DLCI 0 control processing |
| @@ -1212,28 +1260,15 @@ static void gsm_control_message(struct gsm_mux *gsm, unsigned int command, · 12 unmodified lines | ||
| 1212 | 1260 | { |
| 1213 | 1261 | u8 buf[1]; |
| 1214 | 1262 | unsigned long flags; |
| 1215 | − struct gsm_dlci *dlci; | |
| 1216 | − int i; | |
| 1217 | − int address; | |
| 1218 | 1263 | |
| 1219 | 1264 | switch (command) { |
| 1220 | 1265 | case CMD_CLD: { |
| 1221 | − if (addr_cnt > 0) { | |
| 1222 | − for (i = 0; i < addr_cnt; i++) { | |
| 1223 | − address = addr_open[i]; | |
| 1224 | − dlci = gsm->dlci[address]; | |
| 1225 | − gsm_dlci_close(dlci); | |
| 1226 | − addr_open[i] = 0; | |
| 1227 | − } | |
| 1228 | − } | |
| 1266 | + struct gsm_dlci *dlci = gsm->dlci[0]; | |
| 1229 | 1267 | /* Modem wishes to close down */ |
| 1230 | − dlci = gsm->dlci[0]; | |
| 1231 | 1268 | if (dlci) { |
| 1232 | 1269 | dlci->dead = true; |
| 1233 | 1270 | gsm->dead = true; |
| 1234 | − gsm_dlci_close(dlci); | |
| 1235 | − addr_cnt = 0; | |
| 1236 | − gsm_response(gsm, 0, UA|PF); | |
| 1271 | + gsm_dlci_begin_close(dlci); | |
| 1237 | 1272 | } |
| 1238 | 1273 | } |
| 1239 | 1274 | break; |
| @@ -1326,11 +1361,12 @@ static void gsm_control_response(struct gsm_mux *gsm, unsigned int command, · 86 unmodified lines | ||
| 1326 | 1361 | |
| 1327 | 1362 | static void gsm_control_transmit(struct gsm_mux *gsm, struct gsm_control *ctrl) |
| 1328 | 1363 | { |
| 1329 | − struct gsm_msg *msg = gsm_data_alloc(gsm, 0, ctrl->len + 1, gsm->ftype); | |
| 1364 | + struct gsm_msg *msg = gsm_data_alloc(gsm, 0, ctrl->len + 2, gsm->ftype); | |
| 1330 | 1365 | if (msg == NULL) |
| 1331 | 1366 | return; |
| 1332 | − msg->data[0] = (ctrl->cmd << 1) | 2 | EA; /* command */ | |
| 1333 | − memcpy(msg->data + 1, ctrl->data, ctrl->len); | |
| 1367 | + msg->data[0] = (ctrl->cmd << 1) | CR | EA; /* command */ | |
| 1368 | + msg->data[1] = (ctrl->len << 1) | EA; | |
| 1369 | + memcpy(msg->data + 2, ctrl->data, ctrl->len); | |
| 1334 | 1370 | gsm_data_queue(gsm->dlci[0], msg); |
| 1335 | 1371 | } |
| 1336 | 1372 | |
| @@ -1353,7 +1389,6 @@ static void gsm_control_retransmit(struct timer_list *t) · 16 unmodified lines | ||
| 1353 | 1389 | spin_lock_irqsave(&gsm->control_lock, flags); |
| 1354 | 1390 | ctrl = gsm->pending_cmd; |
| 1355 | 1391 | if (ctrl) { |
| 1356 | − gsm->cretries--; | |
| 1357 | 1392 | if (gsm->cretries == 0) { |
| 1358 | 1393 | gsm->pending_cmd = NULL; |
| 1359 | 1394 | ctrl->error = -ETIMEDOUT; |
| @@ -1362,6 +1397,7 @@ static void gsm_control_retransmit(struct timer_list *t) · 2 unmodified lines | ||
| 1362 | 1397 | wake_up(&gsm->event); |
| 1363 | 1398 | return; |
| 1364 | 1399 | } |
| 1400 | + gsm->cretries--; | |
| 1365 | 1401 | gsm_control_transmit(gsm, ctrl); |
| 1366 | 1402 | mod_timer(&gsm->t2_timer, jiffies + gsm->t2 * HZ / 100); |
| 1367 | 1403 | } |
| @@ -1402,7 +1438,7 @@ retry: · 34 unmodified lines | ||
| 1402 | 1438 | |
| 1403 | 1439 | /* If DLCI0 is in ADM mode skip retries, it won't respond */ |
| 1404 | 1440 | if (gsm->dlci[0]->mode == DLCI_MODE_ADM) |
| 1405 | − gsm->cretries = 1; | |
| 1441 | + gsm->cretries = 0; | |
| 1406 | 1442 | else |
| 1407 | 1443 | gsm->cretries = gsm->n2; |
| 1408 | 1444 | |
| @@ -1450,20 +1486,22 @@ static int gsm_control_wait(struct gsm_mux *gsm, struct gsm_control *control) · 41 unmodified lines | ||
| 1450 | 1486 | |
| 1451 | 1487 | static void gsm_dlci_close(struct gsm_dlci *dlci) |
| 1452 | 1488 | { |
| 1489 | + unsigned long flags; | |
| 1490 | + | |
| 1453 | 1491 | del_timer(&dlci->t1); |
| 1454 | 1492 | if (debug & 8) |
| 1455 | 1493 | pr_debug("DLCI %d goes closed.\n", dlci->addr); |
| 1456 | 1494 | dlci->state = DLCI_CLOSED; |
| 1457 | 1495 | if (dlci->addr != 0) { |
| 1458 | 1496 | tty_port_tty_hangup(&dlci->port, false); |
| 1497 | + spin_lock_irqsave(&dlci->lock, flags); | |
| 1459 | 1498 | kfifo_reset(&dlci->fifo); |
| 1499 | + spin_unlock_irqrestore(&dlci->lock, flags); | |
| 1460 | 1500 | /* Ensure that gsmtty_open() can return. */ |
| 1461 | 1501 | tty_port_set_initialized(&dlci->port, 0); |
| 1462 | 1502 | wake_up_interruptible(&dlci->port.open_wait); |
| 1463 | 1503 | } else |
| 1464 | 1504 | dlci->gsm->dead = true; |
| 1465 | − /* Unregister gsmtty driver,report gsmtty dev remove uevent for user */ | |
| 1466 | − tty_unregister_device(gsm_tty_driver, dlci->addr); | |
| 1467 | 1505 | wake_up(&dlci->gsm->event); |
| 1468 | 1506 | /* A DLCI 0 close is a MUX termination so we need to kick that |
| 1469 | 1507 | back to userspace somehow */ |
| @@ -1485,8 +1523,9 @@ static void gsm_dlci_open(struct gsm_dlci *dlci) · 15 unmodified lines | ||
| 1485 | 1523 | dlci->state = DLCI_OPEN; |
| 1486 | 1524 | if (debug & 8) |
| 1487 | 1525 | pr_debug("DLCI %d goes open.\n", dlci->addr); |
| 1488 | − /* Register gsmtty driver,report gsmtty dev add uevent for user */ | |
| 1489 | − tty_register_device(gsm_tty_driver, dlci->addr, NULL); | |
| 1526 | + /* Send current modem state */ | |
| 1527 | + if (dlci->addr) | |
| 1528 | + gsm_modem_update(dlci, 0); | |
| 1490 | 1529 | wake_up(&dlci->gsm->event); |
| 1491 | 1530 | } |
| 1492 | 1531 | |
| @@ -1623,6 +1662,7 @@ static void gsm_dlci_data(struct gsm_dlci *dlci, const u8 *data, int clen) · 130 unmodified lines | ||
| 1623 | 1662 | tty = tty_port_tty_get(port); |
| 1624 | 1663 | if (tty) { |
| 1625 | 1664 | gsm_process_modem(tty, dlci, modem, slen); |
| 1665 | + tty_wakeup(tty); | |
| 1626 | 1666 | tty_kref_put(tty); |
| 1627 | 1667 | } |
| 1628 | 1668 | fallthrough; |
| @@ -1793,19 +1833,7 @@ static void gsm_queue(struct gsm_mux *gsm) · 164 unmodified lines | ||
| 1793 | 1833 | struct gsm_dlci *dlci; |
| 1794 | 1834 | u8 cr; |
| 1795 | 1835 | int address; |
| 1796 | − int i, j, k, address_tmp; | |
| 1797 | − /* We have to sneak a look at the packet body to do the FCS. | |
| 1798 | − A somewhat layering violation in the spec */ | |
| 1799 | 1836 | |
| 1800 | − if ((gsm->control & ~PF) == UI) | |
| 1801 | − gsm->fcs = gsm_fcs_add_block(gsm->fcs, gsm->buf, gsm->len); | |
| 1802 | − if (gsm->encoding == 0) { | |
| 1803 | − /* WARNING: gsm->received_fcs is used for | |
| 1804 | − gsm->encoding = 0 only. | |
| 1805 | − In this case it contain the last piece of data | |
| 1806 | − required to generate final CRC */ | |
| 1807 | − gsm->fcs = gsm_fcs_add(gsm->fcs, gsm->received_fcs); | |
| 1808 | − } | |
| 1809 | 1837 | if (gsm->fcs != GOOD_FCS) { |
| 1810 | 1838 | gsm->bad_fcs++; |
| 1811 | 1839 | if (debug & 4) |
| @@ -1836,11 +1864,6 @@ static void gsm_queue(struct gsm_mux *gsm) · 24 unmodified lines | ||
| 1836 | 1864 | else { |
| 1837 | 1865 | gsm_response(gsm, address, UA|PF); |
| 1838 | 1866 | gsm_dlci_open(dlci); |
| 1839 | − /* Save dlci open address */ | |
| 1840 | − if (address) { | |
| 1841 | − addr_open[addr_cnt] = address; | |
| 1842 | − addr_cnt++; | |
| 1843 | − } | |
| 1844 | 1867 | } |
| 1845 | 1868 | break; |
| 1846 | 1869 | case DISC|PF: |
| @@ -1851,35 +1874,9 @@ static void gsm_queue(struct gsm_mux *gsm) · 4 unmodified lines | ||
| 1851 | 1874 | return; |
| 1852 | 1875 | } |
| 1853 | 1876 | /* Real close complete */ |
| 1854 | − if (!address) { | |
| 1855 | − if (addr_cnt > 0) { | |
| 1856 | − for (i = 0; i < addr_cnt; i++) { | |
| 1857 | − address = addr_open[i]; | |
| 1858 | − dlci = gsm->dlci[address]; | |
| 1859 | − gsm_dlci_close(dlci); | |
| 1860 | − addr_open[i] = 0; | |
| 1861 | − } | |
| 1862 | − } | |
| 1863 | − dlci = gsm->dlci[0]; | |
| 1864 | − gsm_dlci_close(dlci); | |
| 1865 | − addr_cnt = 0; | |
| 1866 | − gsm_response(gsm, 0, UA|PF); | |
| 1867 | − } else { | |
| 1868 | − gsm_response(gsm, address, UA|PF); | |
| 1869 | − gsm_dlci_close(dlci); | |
| 1870 | − /* clear dlci address */ | |
| 1871 | − for (j = 0; j < addr_cnt; j++) { | |
| 1872 | − address_tmp = addr_open[j]; | |
| 1873 | − if (address_tmp == address) { | |
| 1874 | − for (k = j; k < addr_cnt; k++) | |
| 1875 | − addr_open[k] = addr_open[k+1]; | |
| 1876 | − addr_cnt--; | |
| 1877 | − break; | |
| 1878 | − } | |
| 1879 | − } | |
| 1880 | − } | |
| 1877 | + gsm_response(gsm, address, UA|PF); | |
| 1878 | + gsm_dlci_close(dlci); | |
| 1881 | 1879 | break; |
| 1882 | − case UA: | |
| 1883 | 1880 | case UA|PF: |
| 1884 | 1881 | if (cr == 0 || dlci == NULL) |
| 1885 | 1882 | break; |
| @@ -1993,19 +1990,25 @@ static void gsm0_receive(struct gsm_mux *gsm, unsigned char c) · 107 unmodified lines | ||
| 1993 | 1990 | break; |
| 1994 | 1991 | case GSM_DATA: /* Data */ |
| 1995 | 1992 | gsm->buf[gsm->count++] = c; |
| 1996 | − if (gsm->count == gsm->len) | |
| 1993 | + if (gsm->count == gsm->len) { | |
| 1994 | + /* Calculate final FCS for UI frames over all data */ | |
| 1995 | + if ((gsm->control & ~PF) != UIH) { | |
| 1996 | + gsm->fcs = gsm_fcs_add_block(gsm->fcs, gsm->buf, | |
| 1997 | + gsm->count); | |
| 1998 | + } | |
| 1997 | 1999 | gsm->state = GSM_FCS; |
| 2000 | + } | |
| 1998 | 2001 | break; |
| 1999 | 2002 | case GSM_FCS: /* FCS follows the packet */ |
| 2000 | − gsm->received_fcs = c; | |
| 2001 | − gsm_queue(gsm); | |
| 2003 | + gsm->fcs = gsm_fcs_add(gsm->fcs, c); | |
| 2002 | 2004 | gsm->state = GSM_SSOF; |
| 2003 | 2005 | break; |
| 2004 | 2006 | case GSM_SSOF: |
| 2005 | − if (c == GSM0_SOF) { | |
| 2006 | − gsm->state = GSM_SEARCH; | |
| 2007 | − break; | |
| 2008 | − } | |
| 2007 | + gsm->state = GSM_SEARCH; | |
| 2008 | + if (c == GSM0_SOF) | |
| 2009 | + gsm_queue(gsm); | |
| 2010 | + else | |
| 2011 | + gsm->bad_size++; | |
| 2009 | 2012 | break; |
| 2010 | 2013 | default: |
| 2011 | 2014 | pr_debug("%s: unhandled state: %d\n", __func__, gsm->state); |
| @@ -2023,12 +2026,35 @@ static void gsm0_receive(struct gsm_mux *gsm, unsigned char c) · 11 unmodified lines | ||
| 2023 | 2026 | |
| 2024 | 2027 | static void gsm1_receive(struct gsm_mux *gsm, unsigned char c) |
| 2025 | 2028 | { |
| 2029 | + /* handle XON/XOFF */ | |
| 2030 | + if ((c & ISO_IEC_646_MASK) == XON) { | |
| 2031 | + gsm->constipated = true; | |
| 2032 | + return; | |
| 2033 | + } else if ((c & ISO_IEC_646_MASK) == XOFF) { | |
| 2034 | + gsm->constipated = false; | |
| 2035 | + /* Kick the link in case it is idling */ | |
| 2036 | + gsm_data_kick(gsm, NULL); | |
| 2037 | + return; | |
| 2038 | + } | |
| 2026 | 2039 | if (c == GSM1_SOF) { |
| 2027 | − /* EOF is only valid in frame if we have got to the data state | |
| 2028 | − and received at least one byte (the FCS) */ | |
| 2029 | − if (gsm->state == GSM_DATA && gsm->count) { | |
| 2030 | − /* Extract the FCS */ | |
| 2040 | + /* EOF is only valid in frame if we have got to the data state */ | |
| 2041 | + if (gsm->state == GSM_DATA) { | |
| 2042 | + if (gsm->count < 1) { | |
| 2043 | + /* Missing FSC */ | |
| 2044 | + gsm->malformed++; | |
| 2045 | + gsm->state = GSM_START; | |
| 2046 | + return; | |
| 2047 | + } | |
| 2048 | + /* Remove the FCS from data */ | |
| 2031 | 2049 | gsm->count--; |
| 2050 | + if ((gsm->control & ~PF) != UIH) { | |
| 2051 | + /* Calculate final FCS for UI frames over all | |
| 2052 | + * data but FCS | |
| 2053 | + */ | |
| 2054 | + gsm->fcs = gsm_fcs_add_block(gsm->fcs, gsm->buf, | |
| 2055 | + gsm->count); | |
| 2056 | + } | |
| 2057 | + /* Add the FCS itself to test against GOOD_FCS */ | |
| 2032 | 2058 | gsm->fcs = gsm_fcs_add(gsm->fcs, gsm->buf[gsm->count]); |
| 2033 | 2059 | gsm->len = gsm->count; |
| 2034 | 2060 | gsm_queue(gsm); |
| @@ -2037,7 +2063,8 @@ static void gsm1_receive(struct gsm_mux *gsm, unsigned char c) · 2 unmodified lines | ||
| 2037 | 2063 | } |
| 2038 | 2064 | /* Any partial frame was a runt so go back to start */ |
| 2039 | 2065 | if (gsm->state != GSM_START) { |
| 2040 | − gsm->malformed++; | |
| 2066 | + if (gsm->state != GSM_SEARCH) | |
| 2067 | + gsm->malformed++; | |
| 2041 | 2068 | gsm->state = GSM_START; |
| 2042 | 2069 | } |
| 2043 | 2070 | /* A SOF in GSM_START means we are still reading idling or |
| @@ -2106,74 +2133,43 @@ static void gsm_error(struct gsm_mux *gsm) · 62 unmodified lines | ||
| 2106 | 2133 | gsm->io_error++; |
| 2107 | 2134 | } |
| 2108 | 2135 | |
| 2109 | −static int gsm_disconnect(struct gsm_mux *gsm) | |
| 2110 | −{ | |
| 2111 | − struct gsm_dlci *dlci = gsm->dlci[0]; | |
| 2112 | − struct gsm_control *gc; | |
| 2113 | − | |
| 2114 | − if (!dlci) | |
| 2115 | − return 0; | |
| 2116 | − | |
| 2117 | − /* In theory disconnecting DLCI 0 is sufficient but for some | |
| 2118 | − modems this is apparently not the case. */ | |
| 2119 | − gc = gsm_control_send(gsm, CMD_CLD, NULL, 0); | |
| 2120 | − if (gc) | |
| 2121 | − gsm_control_wait(gsm, gc); | |
| 2122 | − | |
| 2123 | − del_timer_sync(&gsm->t2_timer); | |
| 2124 | − /* Now we are sure T2 has stopped */ | |
| 2125 | − | |
| 2126 | − gsm_dlci_begin_close(dlci); | |
| 2127 | − wait_event_interruptible(gsm->event, | |
| 2128 | − dlci->state == DLCI_CLOSED); | |
| 2129 | − | |
| 2130 | − if (signal_pending(current)) | |
| 2131 | − return -EINTR; | |
| 2132 | − | |
| 2133 | − return 0; | |
| 2134 | −} | |
| 2135 | − | |
| 2136 | 2136 | /** |
| 2137 | 2137 | * gsm_cleanup_mux - generic GSM protocol cleanup |
| 2138 | 2138 | * @gsm: our mux |
| 2139 | + * @disc: disconnect link? | |
| 2139 | 2140 | * |
| 2140 | 2141 | * Clean up the bits of the mux which are the same for all framing |
| 2141 | 2142 | * protocols. Remove the mux from the mux table, stop all the timers |
| 2142 | 2143 | * and then shut down each device hanging up the channels as we go. |
| 2143 | 2144 | */ |
| 2144 | 2145 | |
| 2145 | −static void gsm_cleanup_mux(struct gsm_mux *gsm) | |
| 2146 | +static void gsm_cleanup_mux(struct gsm_mux *gsm, bool disc) | |
| 2146 | 2147 | { |
| 2147 | 2148 | int i; |
| 2148 | 2149 | struct gsm_dlci *dlci = gsm->dlci[0]; |
| 2149 | 2150 | struct gsm_msg *txq, *ntxq; |
| 2150 | 2151 | |
| 2151 | 2152 | gsm->dead = true; |
| 2153 | + mutex_lock(&gsm->mutex); | |
| 2152 | 2154 | |
| 2153 | − spin_lock(&gsm_mux_lock); | |
| 2154 | − for (i = 0; i < MAX_MUX; i++) { | |
| 2155 | − if (gsm_mux[i] == gsm) { | |
| 2156 | − gsm_mux[i] = NULL; | |
| 2157 | − break; | |
| 2155 | + if (dlci) { | |
| 2156 | + if (disc && dlci->state != DLCI_CLOSED) { | |
| 2157 | + gsm_dlci_begin_close(dlci); | |
| 2158 | + wait_event(gsm->event, dlci->state == DLCI_CLOSED); | |
| 2158 | 2159 | } |
| 2160 | + dlci->dead = true; | |
| 2159 | 2161 | } |
| 2160 | − spin_unlock(&gsm_mux_lock); | |
| 2161 | − /* open failed before registering => nothing to do */ | |
| 2162 | − if (i == MAX_MUX) | |
| 2163 | − return; | |
| 2164 | 2162 | |
| 2163 | + /* Finish outstanding timers, making sure they are done */ | |
| 2165 | 2164 | del_timer_sync(&gsm->t2_timer); |
| 2166 | − /* Now we are sure T2 has stopped */ | |
| 2167 | − if (dlci) | |
| 2168 | − dlci->dead = true; | |
| 2169 | 2165 | |
| 2170 | − /* Free up any link layer users */ | |
| 2171 | − mutex_lock(&gsm->mutex); | |
| 2172 | − for (i = 0; i < NUM_DLCI; i++) | |
| 2166 | + /* Free up any link layer users and finally the control channel */ | |
| 2167 | + for (i = NUM_DLCI - 1; i >= 0; i--) | |
| 2173 | 2168 | if (gsm->dlci[i]) |
| 2174 | 2169 | gsm_dlci_release(gsm->dlci[i]); |
| 2175 | 2170 | mutex_unlock(&gsm->mutex); |
| 2176 | 2171 | /* Now wipe the queues */ |
| 2172 | + tty_ldisc_flush(gsm->tty); | |
| 2177 | 2173 | list_for_each_entry_safe(txq, ntxq, &gsm->tx_list, list) |
| 2178 | 2174 | kfree(txq); |
| 2179 | 2175 | INIT_LIST_HEAD(&gsm->tx_list); |
| @@ -2191,7 +2187,6 @@ static void gsm_cleanup_mux(struct gsm_mux *gsm) · 11 unmodified lines | ||
| 2191 | 2187 | static int gsm_activate_mux(struct gsm_mux *gsm) |
| 2192 | 2188 | { |
| 2193 | 2189 | struct gsm_dlci *dlci; |
| 2194 | − int i = 0; | |
| 2195 | 2190 | |
| 2196 | 2191 | timer_setup(&gsm->t2_timer, gsm_control_retransmit, 0); |
| 2197 | 2192 | init_waitqueue_head(&gsm->event); |
| @@ -2203,18 +2198,6 @@ static int gsm_activate_mux(struct gsm_mux *gsm) · 5 unmodified lines | ||
| 2203 | 2198 | else |
| 2204 | 2199 | gsm->receive = gsm1_receive; |
| 2205 | 2200 | |
| 2206 | − spin_lock(&gsm_mux_lock); | |
| 2207 | − for (i = 0; i < MAX_MUX; i++) { | |
| 2208 | − if (gsm_mux[i] == NULL) { | |
| 2209 | − gsm->num = i; | |
| 2210 | − gsm_mux[i] = gsm; | |
| 2211 | − break; | |
| 2212 | − } | |
| 2213 | − } | |
| 2214 | − spin_unlock(&gsm_mux_lock); | |
| 2215 | − if (i == MAX_MUX) | |
| 2216 | − return -EBUSY; | |
| 2217 | − | |
| 2218 | 2201 | dlci = gsm_dlci_alloc(gsm, 0); |
| 2219 | 2202 | if (dlci == NULL) |
| 2220 | 2203 | return -ENOMEM; |
| @@ -2230,6 +2213,15 @@ static int gsm_activate_mux(struct gsm_mux *gsm) · 9 unmodified lines | ||
| 2230 | 2213 | */ |
| 2231 | 2214 | static void gsm_free_mux(struct gsm_mux *gsm) |
| 2232 | 2215 | { |
| 2216 | + int i; | |
| 2217 | + | |
| 2218 | + for (i = 0; i < MAX_MUX; i++) { | |
| 2219 | + if (gsm == gsm_mux[i]) { | |
| 2220 | + gsm_mux[i] = NULL; | |
| 2221 | + break; | |
| 2222 | + } | |
| 2223 | + } | |
| 2224 | + mutex_destroy(&gsm->mutex); | |
| 2233 | 2225 | kfree(gsm->txframe); |
| 2234 | 2226 | kfree(gsm->buf); |
| 2235 | 2227 | kfree(gsm); |
| @@ -2249,12 +2241,20 @@ static void gsm_free_muxr(struct kref *ref) · 13 unmodified lines | ||
| 2249 | 2241 | |
| 2250 | 2242 | static inline void mux_get(struct gsm_mux *gsm) |
| 2251 | 2243 | { |
| 2244 | + unsigned long flags; | |
| 2245 | + | |
| 2246 | + spin_lock_irqsave(&gsm_mux_lock, flags); | |
| 2252 | 2247 | kref_get(&gsm->ref); |
| 2248 | + spin_unlock_irqrestore(&gsm_mux_lock, flags); | |
| 2253 | 2249 | } |
| 2254 | 2250 | |
| 2255 | 2251 | static inline void mux_put(struct gsm_mux *gsm) |
| 2256 | 2252 | { |
| 2253 | + unsigned long flags; | |
| 2254 | + | |
| 2255 | + spin_lock_irqsave(&gsm_mux_lock, flags); | |
| 2257 | 2256 | kref_put(&gsm->ref, gsm_free_muxr); |
| 2257 | + spin_unlock_irqrestore(&gsm_mux_lock, flags); | |
| 2258 | 2258 | } |
| 2259 | 2259 | |
| 2260 | 2260 | static inline unsigned int mux_num_to_base(struct gsm_mux *gsm) |
| @@ -2275,6 +2275,7 @@ static inline unsigned int mux_line_to_num(unsigned int line) · 14 unmodified lines | ||
| 2275 | 2275 | |
| 2276 | 2276 | static struct gsm_mux *gsm_alloc_mux(void) |
| 2277 | 2277 | { |
| 2278 | + int i; | |
| 2278 | 2279 | struct gsm_mux *gsm = kzalloc(sizeof(struct gsm_mux), GFP_KERNEL); |
| 2279 | 2280 | if (gsm == NULL) |
| 2280 | 2281 | return NULL; |
| @@ -2283,7 +2284,7 @@ static struct gsm_mux *gsm_alloc_mux(void) · 2 unmodified lines | ||
| 2283 | 2284 | kfree(gsm); |
| 2284 | 2285 | return NULL; |
| 2285 | 2286 | } |
| 2286 | − gsm->txframe = kmalloc(2 * MAX_MRU + 2, GFP_KERNEL); | |
| 2287 | + gsm->txframe = kmalloc(2 * (MAX_MTU + PROT_OVERHEAD - 1), GFP_KERNEL); | |
| 2287 | 2288 | if (gsm->txframe == NULL) { |
| 2288 | 2289 | kfree(gsm->buf); |
| 2289 | 2290 | kfree(gsm); |
| @@ -2304,6 +2305,26 @@ static struct gsm_mux *gsm_alloc_mux(void) · 14 unmodified lines | ||
| 2304 | 2305 | gsm->mtu = 64; |
| 2305 | 2306 | gsm->dead = true; /* Avoid early tty opens */ |
| 2306 | 2307 | |
| 2308 | + /* Store the instance to the mux array or abort if no space is | |
| 2309 | + * available. | |
| 2310 | + */ | |
| 2311 | + spin_lock(&gsm_mux_lock); | |
| 2312 | + for (i = 0; i < MAX_MUX; i++) { | |
| 2313 | + if (!gsm_mux[i]) { | |
| 2314 | + gsm_mux[i] = gsm; | |
| 2315 | + gsm->num = i; | |
| 2316 | + break; | |
| 2317 | + } | |
| 2318 | + } | |
| 2319 | + spin_unlock(&gsm_mux_lock); | |
| 2320 | + if (i == MAX_MUX) { | |
| 2321 | + mutex_destroy(&gsm->mutex); | |
| 2322 | + kfree(gsm->txframe); | |
| 2323 | + kfree(gsm->buf); | |
| 2324 | + kfree(gsm); | |
| 2325 | + return NULL; | |
| 2326 | + } | |
| 2327 | + | |
| 2307 | 2328 | return gsm; |
| 2308 | 2329 | } |
| 2309 | 2330 | |
| @@ -2339,7 +2360,7 @@ static int gsm_config(struct gsm_mux *gsm, struct gsm_config *c) · 29 unmodified lines | ||
| 2339 | 2360 | /* Check the MRU/MTU range looks sane */ |
| 2340 | 2361 | if (c->mru > MAX_MRU || c->mtu > MAX_MTU || c->mru < 8 || c->mtu < 8) |
| 2341 | 2362 | return -EINVAL; |
| 2342 | − if (c->n2 < 3) | |
| 2363 | + if (c->n2 > 255) | |
| 2343 | 2364 | return -EINVAL; |
| 2344 | 2365 | if (c->encapsulation > 1) /* Basic, advanced, no I */ |
| 2345 | 2366 | return -EINVAL; |
| @@ -2370,19 +2391,11 @@ static int gsm_config(struct gsm_mux *gsm, struct gsm_config *c) · 24 unmodified lines | ||
| 2370 | 2391 | |
| 2371 | 2392 | /* |
| 2372 | 2393 | * Close down what is needed, restart and initiate the new |
| 2373 | − * configuration | |
| 2394 | + * configuration. On the first time there is no DLCI[0] | |
| 2395 | + * and closing or cleaning up is not necessary. | |
| 2374 | 2396 | */ |
| 2375 | − | |
| 2376 | − if (gsm->initiator && (need_close || need_restart)) { | |
| 2377 | − int ret; | |
| 2378 | − | |
| 2379 | − ret = gsm_disconnect(gsm); | |
| 2380 | − | |
| 2381 | − if (ret) | |
| 2382 | − return ret; | |
| 2383 | − } | |
| 2384 | − if (need_restart) | |
| 2385 | − gsm_cleanup_mux(gsm); | |
| 2397 | + if (need_close || need_restart) | |
| 2398 | + gsm_cleanup_mux(gsm, true); | |
| 2386 | 2399 | |
| 2387 | 2400 | gsm->initiator = c->initiator; |
| 2388 | 2401 | gsm->mru = c->mru; |
| @@ -2450,25 +2463,26 @@ static int gsmld_attach_gsm(struct tty_struct *tty, struct gsm_mux *gsm) · 61 unmodified lines | ||
| 2450 | 2463 | int ret, i; |
| 2451 | 2464 | |
| 2452 | 2465 | gsm->tty = tty_kref_get(tty); |
| 2466 | + /* Turn off tty XON/XOFF handling to handle it explicitly. */ | |
| 2467 | + gsm->old_c_iflag = tty->termios.c_iflag; | |
| 2468 | + tty->termios.c_iflag &= (IXON | IXOFF); | |
| 2453 | 2469 | ret = gsm_activate_mux(gsm); |
| 2454 | 2470 | if (ret != 0) |
| 2455 | 2471 | tty_kref_put(gsm->tty); |
| 2456 | 2472 | else { |
| 2457 | 2473 | /* Don't register device 0 - this is the control channel and not |
| 2458 | 2474 | a usable tty interface */ |
| 2459 | − if (gsm->initiator) { | |
| 2460 | − base = mux_num_to_base(gsm); /* Base for this MUX */ | |
| 2461 | − for (i = 1; i < NUM_DLCI; i++) { | |
| 2462 | − struct device *dev; | |
| 2475 | + base = mux_num_to_base(gsm); /* Base for this MUX */ | |
| 2476 | + for (i = 1; i < NUM_DLCI; i++) { | |
| 2477 | + struct device *dev; | |
| 2463 | 2478 | |
| 2464 | − dev = tty_register_device(gsm_tty_driver, | |
| 2479 | + dev = tty_register_device(gsm_tty_driver, | |
| 2465 | 2480 | base + i, NULL); |
| 2466 | − if (IS_ERR(dev)) { | |
| 2467 | − for (i--; i >= 1; i--) | |
| 2468 | − tty_unregister_device(gsm_tty_driver, | |
| 2469 | − base + i); | |
| 2470 | − return PTR_ERR(dev); | |
| 2471 | − } | |
| 2481 | + if (IS_ERR(dev)) { | |
| 2482 | + for (i--; i >= 1; i--) | |
| 2483 | + tty_unregister_device(gsm_tty_driver, | |
| 2484 | + base + i); | |
| 2485 | + return PTR_ERR(dev); | |
| 2472 | 2486 | } |
| 2473 | 2487 | } |
| 2474 | 2488 | } |
| @@ -2490,11 +2504,10 @@ static void gsmld_detach_gsm(struct tty_struct *tty, struct gsm_mux *gsm) · 15 unmodified lines | ||
| 2490 | 2504 | int i; |
| 2491 | 2505 | |
| 2492 | 2506 | WARN_ON(tty != gsm->tty); |
| 2493 | − if (gsm->initiator) { | |
| 2494 | − for (i = 1; i < NUM_DLCI; i++) | |
| 2495 | − tty_unregister_device(gsm_tty_driver, base + i); | |
| 2496 | − } | |
| 2497 | − gsm_cleanup_mux(gsm); | |
| 2507 | + for (i = 1; i < NUM_DLCI; i++) | |
| 2508 | + tty_unregister_device(gsm_tty_driver, base + i); | |
| 2509 | + /* Restore tty XON/XOFF handling. */ | |
| 2510 | + gsm->tty->termios.c_iflag = gsm->old_c_iflag; | |
| 2498 | 2511 | tty_kref_put(gsm->tty); |
| 2499 | 2512 | gsm->tty = NULL; |
| 2500 | 2513 | } |
| @@ -2559,6 +2572,12 @@ static void gsmld_close(struct tty_struct *tty) · 58 unmodified lines | ||
| 2559 | 2572 | { |
| 2560 | 2573 | struct gsm_mux *gsm = tty->disc_data; |
| 2561 | 2574 | |
| 2575 | + /* The ldisc locks and closes the port before calling our close. This | |
| 2576 | + * means we have no way to do a proper disconnect. We will not bother | |
| 2577 | + * to do one. | |
| 2578 | + */ | |
| 2579 | + gsm_cleanup_mux(gsm, false); | |
| 2580 | + | |
| 2562 | 2581 | gsmld_detach_gsm(tty, gsm); |
| 2563 | 2582 | |
| 2564 | 2583 | gsmld_flush_buffer(tty); |
| @@ -2597,7 +2616,7 @@ static int gsmld_open(struct tty_struct *tty) · 32 unmodified lines | ||
| 2597 | 2616 | |
| 2598 | 2617 | ret = gsmld_attach_gsm(tty, gsm); |
| 2599 | 2618 | if (ret != 0) { |
| 2600 | − gsm_cleanup_mux(gsm); | |
| 2619 | + gsm_cleanup_mux(gsm, false); | |
| 2601 | 2620 | mux_put(gsm); |
| 2602 | 2621 | } |
| 2603 | 2622 | return ret; |
| @@ -2954,26 +2973,78 @@ static struct tty_ldisc_ops tty_ldisc_packet = { · 350 unmodified lines | ||
| 2954 | 2973 | |
| 2955 | 2974 | #define TX_SIZE 512 |
| 2956 | 2975 | |
| 2957 | −static int gsmtty_modem_update(struct gsm_dlci *dlci, u8 brk) | |
| 2976 | +/** | |
| 2977 | + * gsm_modem_upd_via_data - send modem bits via convergence layer | |
| 2978 | + * @dlci: channel | |
| 2979 | + * @brk: break signal | |
| 2980 | + * | |
| 2981 | + * Send an empty frame to signal mobile state changes and to transmit the | |
| 2982 | + * break signal for adaption 2. | |
| 2983 | + */ | |
| 2984 | + | |
| 2985 | +static void gsm_modem_upd_via_data(struct gsm_dlci *dlci, u8 brk) | |
| 2958 | 2986 | { |
| 2959 | − u8 modembits[5]; | |
| 2987 | + struct gsm_mux *gsm = dlci->gsm; | |
| 2988 | + unsigned long flags; | |
| 2989 | + | |
| 2990 | + if (dlci->state != DLCI_OPEN || dlci->adaption != 2) | |
| 2991 | + return; | |
| 2992 | + | |
| 2993 | + spin_lock_irqsave(&gsm->tx_lock, flags); | |
| 2994 | + gsm_dlci_modem_output(gsm, dlci, brk); | |
| 2995 | + spin_unlock_irqrestore(&gsm->tx_lock, flags); | |
| 2996 | +} | |
| 2997 | + | |
| 2998 | +/** | |
| 2999 | + * gsm_modem_upd_via_msc - send modem bits via control frame | |
| 3000 | + * @dlci: channel | |
| 3001 | + * @brk: break signal | |
| 3002 | + */ | |
| 3003 | + | |
| 3004 | +static int gsm_modem_upd_via_msc(struct gsm_dlci *dlci, u8 brk) | |
| 3005 | +{ | |
| 3006 | + u8 modembits[3]; | |
| 2960 | 3007 | struct gsm_control *ctrl; |
| 2961 | 3008 | int len = 2; |
| 2962 | 3009 | |
| 2963 | − if (brk) | |
| 2964 | − len++; | |
| 3010 | + if (dlci->gsm->encoding != 0) | |
| 3011 | + return 0; | |
| 2965 | 3012 | |
| 2966 | − modembits[0] = len << 1 | EA; /* Data bytes */ | |
| 2967 | − modembits[1] = dlci->addr << 2 | 3; /* DLCI, EA, 1 */ | |
| 2968 | − modembits[2] = gsm_encode_modem(dlci) << 1 | EA; | |
| 2969 | − if (brk) | |
| 2970 | − modembits[3] = brk << 4 | 2 | EA; /* Valid, EA */ | |
| 2971 | − ctrl = gsm_control_send(dlci->gsm, CMD_MSC, modembits, len + 1); | |
| 3013 | + modembits[0] = (dlci->addr << 2) | 2 | EA; /* DLCI, Valid, EA */ | |
| 3014 | + if (!brk) { | |
| 3015 | + modembits[1] = (gsm_encode_modem(dlci) << 1) | EA; | |
| 3016 | + } else { | |
| 3017 | + modembits[1] = gsm_encode_modem(dlci) << 1; | |
| 3018 | + modembits[2] = (brk << 4) | 2 | EA; /* Length, Break, EA */ | |
| 3019 | + len++; | |
| 3020 | + } | |
| 3021 | + ctrl = gsm_control_send(dlci->gsm, CMD_MSC, modembits, len); | |
| 2972 | 3022 | if (ctrl == NULL) |
| 2973 | 3023 | return -ENOMEM; |
| 2974 | 3024 | return gsm_control_wait(dlci->gsm, ctrl); |
| 2975 | 3025 | } |
| 2976 | 3026 | |
| 3027 | +/** | |
| 3028 | + * gsm_modem_update - send modem status line state | |
| 3029 | + * @dlci: channel | |
| 3030 | + * @brk: break signal | |
| 3031 | + */ | |
| 3032 | + | |
| 3033 | +static int gsm_modem_update(struct gsm_dlci *dlci, u8 brk) | |
| 3034 | +{ | |
| 3035 | + if (dlci->adaption == 2) { | |
| 3036 | + /* Send convergence layer type 2 empty data frame. */ | |
| 3037 | + gsm_modem_upd_via_data(dlci, brk); | |
| 3038 | + return 0; | |
| 3039 | + } else if (dlci->gsm->encoding == 0) { | |
| 3040 | + /* Send as MSC control message. */ | |
| 3041 | + return gsm_modem_upd_via_msc(dlci, brk); | |
| 3042 | + } | |
| 3043 | + | |
| 3044 | + /* Modem status lines are not supported. */ | |
| 3045 | + return -EPROTONOSUPPORT; | |
| 3046 | +} | |
| 3047 | + | |
| 2977 | 3048 | static int gsm_carrier_raised(struct tty_port *port) |
| 2978 | 3049 | { |
| 2979 | 3050 | struct gsm_dlci *dlci = container_of(port, struct gsm_dlci, port); |
| @@ -3006,7 +3077,7 @@ static void gsm_dtr_rts(struct tty_port *port, int onoff) · 26 unmodified lines | ||
| 3006 | 3077 | modem_tx &= ~(TIOCM_DTR | TIOCM_RTS); |
| 3007 | 3078 | if (modem_tx != dlci->modem_tx) { |
| 3008 | 3079 | dlci->modem_tx = modem_tx; |
| 3009 | − gsmtty_modem_update(dlci, 0); | |
| 3080 | + gsm_modem_update(dlci, 0); | |
| 3010 | 3081 | } |
| 3011 | 3082 | } |
| 3012 | 3083 | |
| @@ -3155,13 +3226,17 @@ static unsigned int gsmtty_chars_in_buffer(struct tty_struct *tty) · 142 unmodified lines | ||
| 3155 | 3226 | static void gsmtty_flush_buffer(struct tty_struct *tty) |
| 3156 | 3227 | { |
| 3157 | 3228 | struct gsm_dlci *dlci = tty->driver_data; |
| 3229 | + unsigned long flags; | |
| 3230 | + | |
| 3158 | 3231 | if (dlci->state == DLCI_CLOSED) |
| 3159 | 3232 | return; |
| 3160 | 3233 | /* Caution needed: If we implement reliable transport classes |
| 3161 | 3234 | then the data being transmitted can't simply be junked once |
| 3162 | 3235 | it has first hit the stack. Until then we can just blow it |
| 3163 | 3236 | away */ |
| 3237 | + spin_lock_irqsave(&dlci->lock, flags); | |
| 3164 | 3238 | kfifo_reset(&dlci->fifo); |
| 3239 | + spin_unlock_irqrestore(&dlci->lock, flags); | |
| 3165 | 3240 | /* Need to unhook this DLCI from the transmit queue logic */ |
| 3166 | 3241 | } |
| 3167 | 3242 | |
| @@ -3193,7 +3268,7 @@ static int gsmtty_tiocmset(struct tty_struct *tty, · 25 unmodified lines | ||
| 3193 | 3268 | |
| 3194 | 3269 | if (modem_tx != dlci->modem_tx) { |
| 3195 | 3270 | dlci->modem_tx = modem_tx; |
| 3196 | − return gsmtty_modem_update(dlci, 0); | |
| 3271 | + return gsm_modem_update(dlci, 0); | |
| 3197 | 3272 | } |
| 3198 | 3273 | return 0; |
| 3199 | 3274 | } |
| @@ -3254,7 +3329,7 @@ static void gsmtty_throttle(struct tty_struct *tty) · 54 unmodified lines | ||
| 3254 | 3329 | dlci->modem_tx &= ~TIOCM_RTS; |
| 3255 | 3330 | dlci->throttled = true; |
| 3256 | 3331 | /* Send an MSC with RTS cleared */ |
| 3257 | − gsmtty_modem_update(dlci, 0); | |
| 3332 | + gsm_modem_update(dlci, 0); | |
| 3258 | 3333 | } |
| 3259 | 3334 | |
| 3260 | 3335 | static void gsmtty_unthrottle(struct tty_struct *tty) |
| @@ -3266,7 +3341,7 @@ static void gsmtty_unthrottle(struct tty_struct *tty) · 5 unmodified lines | ||
| 3266 | 3341 | dlci->modem_tx |= TIOCM_RTS; |
| 3267 | 3342 | dlci->throttled = false; |
| 3268 | 3343 | /* Send an MSC with RTS set */ |
| 3269 | − gsmtty_modem_update(dlci, 0); | |
| 3344 | + gsm_modem_update(dlci, 0); | |
| 3270 | 3345 | } |
| 3271 | 3346 | |
| 3272 | 3347 | static int gsmtty_break_ctl(struct tty_struct *tty, int state) |
| @@ -3284,7 +3359,7 @@ static int gsmtty_break_ctl(struct tty_struct *tty, int state) · 11 unmodified lines | ||
| 3284 | 3359 | if (encode > 0x0F) |
| 3285 | 3360 | encode = 0x0F; /* Best effort */ |
| 3286 | 3361 | } |
| 3287 | − return gsmtty_modem_update(dlci, encode); | |
| 3362 | + return gsm_modem_update(dlci, encode); | |
| 3288 | 3363 | } |
| 3289 | 3364 | |
| 3290 | 3365 | static void gsmtty_cleanup(struct tty_struct *tty) |
| @@ -2667,7 +2667,7 @@ enum pci_board_num_t { · 2666 unmodified lines | ||
| 2667 | 2667 | pbn_panacom2, |
| 2668 | 2668 | pbn_panacom4, |
| 2669 | 2669 | pbn_plx_romulus, |
| 2670 | − pbn_endrun_2_4000000, | |
| 2670 | + pbn_endrun_2_3906250, | |
| 2671 | 2671 | pbn_oxsemi, |
| 2672 | 2672 | pbn_oxsemi_1_3906250, |
| 2673 | 2673 | pbn_oxsemi_2_3906250, |
| @@ -3195,10 +3195,10 @@ static struct pciserial_board pci_boards[] = { · 521 unmodified lines | ||
| 3195 | 3195 | * signal now many ports are available |
| 3196 | 3196 | * 2 port 952 Uart support |
| 3197 | 3197 | */ |
| 3198 | − [pbn_endrun_2_4000000] = { | |
| 3198 | + [pbn_endrun_2_3906250] = { | |
| 3199 | 3199 | .flags = FL_BASE0, |
| 3200 | 3200 | .num_ports = 2, |
| 3201 | − .base_baud = 4000000, | |
| 3201 | + .base_baud = 3906250, | |
| 3202 | 3202 | .uart_offset = 0x200, |
| 3203 | 3203 | .first_offset = 0x1000, |
| 3204 | 3204 | }, |
| @@ -4115,7 +4115,7 @@ static const struct pci_device_id serial_pci_tbl[] = { · 910 unmodified lines | ||
| 4115 | 4115 | */ |
| 4116 | 4116 | { PCI_VENDOR_ID_ENDRUN, PCI_DEVICE_ID_ENDRUN_1588, |
| 4117 | 4117 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 4118 | − pbn_endrun_2_4000000 }, | |
| 4118 | + pbn_endrun_2_3906250 }, | |
| 4119 | 4119 | /* |
| 4120 | 4120 | * Quatech cards. These actually have configurable clocks but for |
| 4121 | 4121 | * now we just use the default. |
| @@ -1675,11 +1675,11 @@ static void serial8250_start_tx(struct uart_port *port) · 1674 unmodified lines | ||
| 1675 | 1675 | struct uart_8250_port *up = up_to_u8250p(port); |
| 1676 | 1676 | struct uart_8250_em485 *em485 = up->em485; |
| 1677 | 1677 | |
| 1678 | − serial8250_rpm_get_tx(up); | |
| 1679 | − | |
| 1680 | 1678 | if (!port->x_char && uart_circ_empty(&port->state->xmit)) |
| 1681 | 1679 | return; |
| 1682 | 1680 | |
| 1681 | + serial8250_rpm_get_tx(up); | |
| 1682 | + | |
| 1683 | 1683 | if (em485 && |
| 1684 | 1684 | em485->active_timer == &em485->start_tx_timer) |
| 1685 | 1685 | return; |
| @@ -3329,7 +3329,7 @@ static void serial8250_console_restore(struct uart_8250_port *up) · 1643 unmodified lines | ||
| 3329 | 3329 | |
| 3330 | 3330 | serial8250_set_divisor(port, baud, quot, frac); |
| 3331 | 3331 | serial_port_out(port, UART_LCR, up->lcr); |
| 3332 | − serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS); | |
| 3332 | + serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS); | |
| 3333 | 3333 | } |
| 3334 | 3334 | |
| 3335 | 3335 | /* |
| @@ -1255,13 +1255,18 @@ static inline bool pl011_dma_rx_running(struct uart_amba_port *uap) · 1254 unmodified lines | ||
| 1255 | 1255 | |
| 1256 | 1256 | static void pl011_rs485_tx_stop(struct uart_amba_port *uap) |
| 1257 | 1257 | { |
| 1258 | + /* | |
| 1259 | + * To be on the safe side only time out after twice as many iterations | |
| 1260 | + * as fifo size. | |
| 1261 | + */ | |
| 1262 | + const int MAX_TX_DRAIN_ITERS = uap->port.fifosize * 2; | |
| 1258 | 1263 | struct uart_port *port = &uap->port; |
| 1259 | 1264 | int i = 0; |
| 1260 | 1265 | u32 cr; |
| 1261 | 1266 | |
| 1262 | 1267 | /* Wait until hardware tx queue is empty */ |
| 1263 | 1268 | while (!pl011_tx_empty(port)) { |
| 1264 | − if (i == port->fifosize) { | |
| 1269 | + if (i > MAX_TX_DRAIN_ITERS) { | |
| 1265 | 1270 | dev_warn(port->dev, |
| 1266 | 1271 | "timeout while draining hardware tx queue\n"); |
| 1267 | 1272 | break; |
| @@ -2052,7 +2057,7 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, · 784 unmodified lines | ||
| 2052 | 2057 | * with the given baud rate. We use this as the poll interval when we |
| 2053 | 2058 | * wait for the tx queue to empty. |
| 2054 | 2059 | */ |
| 2055 | − uap->rs485_tx_drain_interval = (bits * 1000 * 1000) / baud; | |
| 2060 | + uap->rs485_tx_drain_interval = DIV_ROUND_UP(bits * 1000 * 1000, baud); | |
| 2056 | 2061 | |
| 2057 | 2062 | pl011_setup_status_masks(port, termios); |
| 2058 | 2063 | |
| @@ -1448,7 +1448,7 @@ static int imx_uart_startup(struct uart_port *port) · 1447 unmodified lines | ||
| 1448 | 1448 | imx_uart_writel(sport, ucr1, UCR1); |
| 1449 | 1449 | |
| 1450 | 1450 | ucr4 = imx_uart_readl(sport, UCR4) & ~(UCR4_OREN | UCR4_INVR); |
| 1451 | − if (!sport->dma_is_enabled) | |
| 1451 | + if (!dma_is_inited) | |
| 1452 | 1452 | ucr4 |= UCR4_OREN; |
| 1453 | 1453 | if (sport->inverted_rx) |
| 1454 | 1454 | ucr4 |= UCR4_INVR; |
| @@ -1238,12 +1238,10 @@ static void sc16is7xx_shutdown(struct uart_port *port) · 1237 unmodified lines | ||
| 1238 | 1238 | |
| 1239 | 1239 | /* Disable all interrupts */ |
| 1240 | 1240 | sc16is7xx_port_write(port, SC16IS7XX_IER_REG, 0); |
| 1241 | − /* Disable TX/RX, clear auto RS485 and RTS invert */ | |
| 1241 | + /* Disable TX/RX */ | |
| 1242 | 1242 | sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, |
| 1243 | 1243 | SC16IS7XX_EFCR_RXDISABLE_BIT | |
| 1244 | − SC16IS7XX_EFCR_TXDISABLE_BIT | | |
| 1245 | − SC16IS7XX_EFCR_AUTO_RS485_BIT | | |
| 1246 | − SC16IS7XX_EFCR_RTS_INVERT_BIT, | |
| 1244 | + SC16IS7XX_EFCR_TXDISABLE_BIT, | |
| 1247 | 1245 | SC16IS7XX_EFCR_RXDISABLE_BIT | |
| 1248 | 1246 | SC16IS7XX_EFCR_TXDISABLE_BIT); |
| 1249 | 1247 | |
| @@ -2684,6 +2684,7 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 2683 unmodified lines | ||
| 2684 | 2684 | struct usb_request *request; |
| 2685 | 2685 | struct cdns3_request *priv_req; |
| 2686 | 2686 | struct cdns3_trb *trb = NULL; |
| 2687 | + struct cdns3_trb trb_tmp; | |
| 2687 | 2688 | int ret; |
| 2688 | 2689 | int val; |
| 2689 | 2690 | |
| @@ -2693,8 +2694,10 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 3 unmodified lines | ||
| 2693 | 2694 | if (request) { |
| 2694 | 2695 | priv_req = to_cdns3_request(request); |
| 2695 | 2696 | trb = priv_req->trb; |
| 2696 | − if (trb) | |
| 2697 | + if (trb) { | |
| 2698 | + trb_tmp = *trb; | |
| 2697 | 2699 | trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE); |
| 2700 | + } | |
| 2698 | 2701 | } |
| 2699 | 2702 | |
| 2700 | 2703 | writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd); |
| @@ -2709,7 +2712,7 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 8 unmodified lines | ||
| 2709 | 2712 | |
| 2710 | 2713 | if (request) { |
| 2711 | 2714 | if (trb) |
| 2712 | − trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE); | |
| 2715 | + *trb = trb_tmp; | |
| 2713 | 2716 | |
| 2714 | 2717 | cdns3_rearm_transfer(priv_ep, 1); |
| 2715 | 2718 | } |
| @@ -1209,12 +1209,16 @@ static int do_proc_control(struct usb_dev_state *ps, · 1208 unmodified lines | ||
| 1209 | 1209 | |
| 1210 | 1210 | usb_unlock_device(dev); |
| 1211 | 1211 | i = usbfs_start_wait_urb(urb, tmo, &actlen); |
| 1212 | + | |
| 1213 | + /* Linger a bit, prior to the next control message. */ | |
| 1214 | + if (dev->quirks & USB_QUIRK_DELAY_CTRL_MSG) | |
| 1215 | + msleep(200); | |
| 1212 | 1216 | usb_lock_device(dev); |
| 1213 | 1217 | snoop_urb(dev, NULL, pipe, actlen, i, COMPLETE, tbuf, actlen); |
| 1214 | 1218 | if (!i && actlen) { |
| 1215 | 1219 | if (copy_to_user(ctrl->data, tbuf, actlen)) { |
| 1216 | 1220 | ret = -EFAULT; |
| 1217 | − goto recv_fault; | |
| 1221 | + goto done; | |
| 1218 | 1222 | } |
| 1219 | 1223 | } |
| 1220 | 1224 | } else { |
| @@ -1231,6 +1235,10 @@ static int do_proc_control(struct usb_dev_state *ps, · 10 unmodified lines | ||
| 1231 | 1235 | |
| 1232 | 1236 | usb_unlock_device(dev); |
| 1233 | 1237 | i = usbfs_start_wait_urb(urb, tmo, &actlen); |
| 1238 | + | |
| 1239 | + /* Linger a bit, prior to the next control message. */ | |
| 1240 | + if (dev->quirks & USB_QUIRK_DELAY_CTRL_MSG) | |
| 1241 | + msleep(200); | |
| 1234 | 1242 | usb_lock_device(dev); |
| 1235 | 1243 | snoop_urb(dev, NULL, pipe, actlen, i, COMPLETE, NULL, 0); |
| 1236 | 1244 | } |
| @@ -1242,10 +1250,6 @@ static int do_proc_control(struct usb_dev_state *ps, · 5 unmodified lines | ||
| 1242 | 1250 | } |
| 1243 | 1251 | ret = (i < 0 ? i : actlen); |
| 1244 | 1252 | |
| 1245 | − recv_fault: | |
| 1246 | − /* Linger a bit, prior to the next control message. */ | |
| 1247 | − if (dev->quirks & USB_QUIRK_DELAY_CTRL_MSG) | |
| 1248 | − msleep(200); | |
| 1249 | 1253 | done: |
| 1250 | 1254 | kfree(dr); |
| 1251 | 1255 | usb_free_urb(urb); |
| @@ -404,6 +404,9 @@ static const struct usb_device_id usb_quirk_list[] = { · 403 unmodified lines | ||
| 404 | 404 | { USB_DEVICE(0x0b05, 0x17e0), .driver_info = |
| 405 | 405 | USB_QUIRK_IGNORE_REMOTE_WAKEUP }, |
| 406 | 406 | |
| 407 | + /* Realtek Semiconductor Corp. Mass Storage Device (Multicard Reader)*/ | |
| 408 | + { USB_DEVICE(0x0bda, 0x0151), .driver_info = USB_QUIRK_CONFIG_INTF_STRINGS }, | |
| 409 | + | |
| 407 | 410 | /* Realtek hub in Dell WD19 (Type-C) */ |
| 408 | 411 | { USB_DEVICE(0x0bda, 0x0487), .driver_info = USB_QUIRK_NO_LPM }, |
| 409 | 412 | |
| @@ -507,6 +510,9 @@ static const struct usb_device_id usb_quirk_list[] = { · 97 unmodified lines | ||
| 507 | 510 | /* DJI CineSSD */ |
| 508 | 511 | { USB_DEVICE(0x2ca3, 0x0031), .driver_info = USB_QUIRK_NO_LPM }, |
| 509 | 512 | |
| 513 | + /* VCOM device */ | |
| 514 | + { USB_DEVICE(0x4296, 0x7570), .driver_info = USB_QUIRK_CONFIG_INTF_STRINGS }, | |
| 515 | + | |
| 510 | 516 | /* INTEL VALUE SSD */ |
| 511 | 517 | { USB_DEVICE(0x8086, 0xf1a5), .driver_info = USB_QUIRK_RESET_RESUME }, |
| 512 | 518 | |
| @@ -274,7 +274,8 @@ int dwc3_core_soft_reset(struct dwc3 *dwc) · 273 unmodified lines | ||
| 274 | 274 | |
| 275 | 275 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); |
| 276 | 276 | reg |= DWC3_DCTL_CSFTRST; |
| 277 | − dwc3_writel(dwc->regs, DWC3_DCTL, reg); | |
| 277 | + reg &= ~DWC3_DCTL_RUN_STOP; | |
| 278 | + dwc3_gadget_dctl_write_safe(dwc, reg); | |
| 278 | 279 | |
| 279 | 280 | /* |
| 280 | 281 | * For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit |
| @@ -1377,10 +1378,10 @@ static void dwc3_get_properties(struct dwc3 *dwc) · 1096 unmodified lines | ||
| 1377 | 1378 | u8 lpm_nyet_threshold; |
| 1378 | 1379 | u8 tx_de_emphasis; |
| 1379 | 1380 | u8 hird_threshold; |
| 1380 | − u8 rx_thr_num_pkt_prd; | |
| 1381 | − u8 rx_max_burst_prd; | |
| 1382 | − u8 tx_thr_num_pkt_prd; | |
| 1383 | − u8 tx_max_burst_prd; | |
| 1381 | + u8 rx_thr_num_pkt_prd = 0; | |
| 1382 | + u8 rx_max_burst_prd = 0; | |
| 1383 | + u8 tx_thr_num_pkt_prd = 0; | |
| 1384 | + u8 tx_max_burst_prd = 0; | |
| 1384 | 1385 | u8 tx_fifo_resize_max_num; |
| 1385 | 1386 | const char *usb_psy_name; |
| 1386 | 1387 | int ret; |
| @@ -1690,21 +1691,44 @@ static int dwc3_probe(struct platform_device *pdev) · 303 unmodified lines | ||
| 1690 | 1691 | /* |
| 1691 | 1692 | * Clocks are optional, but new DT platforms should support all |
| 1692 | 1693 | * clocks as required by the DT-binding. |
| 1694 | + * Some devices have different clock names in legacy device trees, | |
| 1695 | + * check for them to retain backwards compatibility. | |
| 1693 | 1696 | */ |
| 1694 | 1697 | dwc->bus_clk = devm_clk_get_optional(dev, "bus_early"); |
| 1695 | 1698 | if (IS_ERR(dwc->bus_clk)) |
| 1696 | 1699 | return dev_err_probe(dev, PTR_ERR(dwc->bus_clk), |
| 1697 | 1700 | "could not get bus clock\n"); |
| 1698 | 1701 | |
| 1702 | + if (dwc->bus_clk == NULL) { | |
| 1703 | + dwc->bus_clk = devm_clk_get_optional(dev, "bus_clk"); | |
| 1704 | + if (IS_ERR(dwc->bus_clk)) | |
| 1705 | + return dev_err_probe(dev, PTR_ERR(dwc->bus_clk), | |
| 1706 | + "could not get bus clock\n"); | |
| 1707 | + } | |
| 1708 | + | |
| 1699 | 1709 | dwc->ref_clk = devm_clk_get_optional(dev, "ref"); |
| 1700 | 1710 | if (IS_ERR(dwc->ref_clk)) |
| 1701 | 1711 | return dev_err_probe(dev, PTR_ERR(dwc->ref_clk), |
| 1702 | 1712 | "could not get ref clock\n"); |
| 1703 | 1713 | |
| 1714 | + if (dwc->ref_clk == NULL) { | |
| 1715 | + dwc->ref_clk = devm_clk_get_optional(dev, "ref_clk"); | |
| 1716 | + if (IS_ERR(dwc->ref_clk)) | |
| 1717 | + return dev_err_probe(dev, PTR_ERR(dwc->ref_clk), | |
| 1718 | + "could not get ref clock\n"); | |
| 1719 | + } | |
| 1720 | + | |
| 1704 | 1721 | dwc->susp_clk = devm_clk_get_optional(dev, "suspend"); |
| 1705 | 1722 | if (IS_ERR(dwc->susp_clk)) |
| 1706 | 1723 | return dev_err_probe(dev, PTR_ERR(dwc->susp_clk), |
| 1707 | 1724 | "could not get suspend clock\n"); |
| 1725 | + | |
| 1726 | + if (dwc->susp_clk == NULL) { | |
| 1727 | + dwc->susp_clk = devm_clk_get_optional(dev, "suspend_clk"); | |
| 1728 | + if (IS_ERR(dwc->susp_clk)) | |
| 1729 | + return dev_err_probe(dev, PTR_ERR(dwc->susp_clk), | |
| 1730 | + "could not get suspend clock\n"); | |
| 1731 | + } | |
| 1708 | 1732 | } |
| 1709 | 1733 | |
| 1710 | 1734 | ret = reset_control_deassert(dwc->reset); |
| @@ -584,16 +584,15 @@ int dwc3_drd_init(struct dwc3 *dwc) · 583 unmodified lines | ||
| 584 | 584 | { |
| 585 | 585 | int ret, irq; |
| 586 | 586 | |
| 587 | + if (ROLE_SWITCH && | |
| 588 | + device_property_read_bool(dwc->dev, "usb-role-switch")) | |
| 589 | + return dwc3_setup_role_switch(dwc); | |
| 590 | + | |
| 587 | 591 | dwc->edev = dwc3_get_extcon(dwc); |
| 588 | 592 | if (IS_ERR(dwc->edev)) |
| 589 | 593 | return PTR_ERR(dwc->edev); |
| 590 | 594 | |
| 591 | − if (ROLE_SWITCH && | |
| 592 | − device_property_read_bool(dwc->dev, "usb-role-switch")) { | |
| 593 | − ret = dwc3_setup_role_switch(dwc); | |
| 594 | − if (ret < 0) | |
| 595 | − return ret; | |
| 596 | − } else if (dwc->edev) { | |
| 595 | + if (dwc->edev) { | |
| 597 | 596 | dwc->edev_nb.notifier_call = dwc3_drd_notifier; |
| 598 | 597 | ret = extcon_register_notifier(dwc->edev, EXTCON_USB_HOST, |
| 599 | 598 | &dwc->edev_nb); |
| @@ -45,6 +45,8 @@ · 44 unmodified lines | ||
| 45 | 45 | #define PCI_DEVICE_ID_INTEL_ADLM 0x54ee |
| 46 | 46 | #define PCI_DEVICE_ID_INTEL_ADLS 0x7ae1 |
| 47 | 47 | #define PCI_DEVICE_ID_INTEL_RPLS 0x7a61 |
| 48 | +#define PCI_DEVICE_ID_INTEL_MTLP 0x7ec1 | |
| 49 | +#define PCI_DEVICE_ID_INTEL_MTL 0x7e7e | |
| 48 | 50 | #define PCI_DEVICE_ID_INTEL_TGL 0x9a15 |
| 49 | 51 | #define PCI_DEVICE_ID_AMD_MR 0x163a |
| 50 | 52 | |
| @@ -456,6 +458,12 @@ static const struct pci_device_id dwc3_pci_id_table[] = { · 405 unmodified lines | ||
| 456 | 458 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_RPLS), |
| 457 | 459 | (kernel_ulong_t) &dwc3_pci_intel_swnode, }, |
| 458 | 460 | |
| 461 | + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MTLP), | |
| 462 | + (kernel_ulong_t) &dwc3_pci_intel_swnode, }, | |
| 463 | + | |
| 464 | + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MTL), | |
| 465 | + (kernel_ulong_t) &dwc3_pci_intel_swnode, }, | |
| 466 | + | |
| 459 | 467 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL), |
| 460 | 468 | (kernel_ulong_t) &dwc3_pci_intel_swnode, }, |
| 461 | 469 | |
| @@ -3274,6 +3274,7 @@ static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep, · 3273 unmodified lines | ||
| 3274 | 3274 | const struct dwc3_event_depevt *event, |
| 3275 | 3275 | struct dwc3_request *req, int status) |
| 3276 | 3276 | { |
| 3277 | + int request_status; | |
| 3277 | 3278 | int ret; |
| 3278 | 3279 | |
| 3279 | 3280 | if (req->request.num_mapped_sgs) |
| @@ -3294,7 +3295,35 @@ static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep, · 14 unmodified lines | ||
| 3294 | 3295 | req->needs_extra_trb = false; |
| 3295 | 3296 | } |
| 3296 | 3297 | |
| 3297 | − dwc3_gadget_giveback(dep, req, status); | |
| 3298 | + /* | |
| 3299 | + * The event status only reflects the status of the TRB with IOC set. | |
| 3300 | + * For the requests that don't set interrupt on completion, the driver | |
| 3301 | + * needs to check and return the status of the completed TRBs associated | |
| 3302 | + * with the request. Use the status of the last TRB of the request. | |
| 3303 | + */ | |
| 3304 | + if (req->request.no_interrupt) { | |
| 3305 | + struct dwc3_trb *trb; | |
| 3306 | + | |
| 3307 | + trb = dwc3_ep_prev_trb(dep, dep->trb_dequeue); | |
| 3308 | + switch (DWC3_TRB_SIZE_TRBSTS(trb->size)) { | |
| 3309 | + case DWC3_TRBSTS_MISSED_ISOC: | |
| 3310 | + /* Isoc endpoint only */ | |
| 3311 | + request_status = -EXDEV; | |
| 3312 | + break; | |
| 3313 | + case DWC3_TRB_STS_XFER_IN_PROG: | |
| 3314 | + /* Applicable when End Transfer with ForceRM=0 */ | |
| 3315 | + case DWC3_TRBSTS_SETUP_PENDING: | |
| 3316 | + /* Control endpoint only */ | |
| 3317 | + case DWC3_TRBSTS_OK: | |
| 3318 | + default: | |
| 3319 | + request_status = 0; | |
| 3320 | + break; | |
| 3321 | + } | |
| 3322 | + } else { | |
| 3323 | + request_status = status; | |
| 3324 | + } | |
| 3325 | + | |
| 3326 | + dwc3_gadget_giveback(dep, req, request_status); | |
| 3298 | 3327 | |
| 3299 | 3328 | out: |
| 3300 | 3329 | return ret; |
| @@ -1438,6 +1438,8 @@ static void configfs_composite_unbind(struct usb_gadget *gadget) · 1437 unmodified lines | ||
| 1438 | 1438 | usb_ep_autoconfig_reset(cdev->gadget); |
| 1439 | 1439 | spin_lock_irqsave(&gi->spinlock, flags); |
| 1440 | 1440 | cdev->gadget = NULL; |
| 1441 | + cdev->deactivations = 0; | |
| 1442 | + gadget->deactivated = false; | |
| 1441 | 1443 | set_gadget_data(gadget, NULL); |
| 1442 | 1444 | spin_unlock_irqrestore(&gi->spinlock, flags); |
| 1443 | 1445 | } |
| @@ -264,6 +264,8 @@ void uvcg_queue_cancel(struct uvc_video_queue *queue, int disconnect) · 263 unmodified lines | ||
| 264 | 264 | buf->state = UVC_BUF_STATE_ERROR; |
| 265 | 265 | vb2_buffer_done(&buf->buf.vb2_buf, VB2_BUF_STATE_ERROR); |
| 266 | 266 | } |
| 267 | + queue->buf_used = 0; | |
| 268 | + | |
| 267 | 269 | /* This must be protected by the irqlock spinlock to avoid race |
| 268 | 270 | * conditions between uvc_queue_buffer and the disconnection event that |
| 269 | 271 | * could result in an interruptible wait in uvc_dequeue_buffer. Do not |
| @@ -1103,6 +1103,26 @@ static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev) · 1102 unmodified lines | ||
| 1103 | 1103 | |
| 1104 | 1104 | #ifdef CONFIG_PM |
| 1105 | 1105 | |
| 1106 | +/* Clear wakeup signal locked in zhaoxin platform when device plug in. */ | |
| 1107 | +static void ehci_zx_wakeup_clear(struct ehci_hcd *ehci) | |
| 1108 | +{ | |
| 1109 | + u32 __iomem *reg = &ehci->regs->port_status[4]; | |
| 1110 | + u32 t1 = ehci_readl(ehci, reg); | |
| 1111 | + | |
| 1112 | + t1 &= (u32)~0xf0000; | |
| 1113 | + t1 |= PORT_TEST_FORCE; | |
| 1114 | + ehci_writel(ehci, t1, reg); | |
| 1115 | + t1 = ehci_readl(ehci, reg); | |
| 1116 | + msleep(1); | |
| 1117 | + t1 &= (u32)~0xf0000; | |
| 1118 | + ehci_writel(ehci, t1, reg); | |
| 1119 | + ehci_readl(ehci, reg); | |
| 1120 | + msleep(1); | |
| 1121 | + t1 = ehci_readl(ehci, reg); | |
| 1122 | + ehci_writel(ehci, t1 | PORT_CSC, reg); | |
| 1123 | + ehci_readl(ehci, reg); | |
| 1124 | +} | |
| 1125 | + | |
| 1106 | 1126 | /* suspend/resume, section 4.3 */ |
| 1107 | 1127 | |
| 1108 | 1128 | /* These routines handle the generic parts of controller suspend/resume */ |
| @@ -1154,6 +1174,9 @@ int ehci_resume(struct usb_hcd *hcd, bool force_reset) · 45 unmodified lines | ||
| 1154 | 1174 | if (ehci->shutdown) |
| 1155 | 1175 | return 0; /* Controller is dead */ |
| 1156 | 1176 | |
| 1177 | + if (ehci->zx_wakeup_clear_needed) | |
| 1178 | + ehci_zx_wakeup_clear(ehci); | |
| 1179 | + | |
| 1157 | 1180 | /* |
| 1158 | 1181 | * If CF is still set and reset isn't forced |
| 1159 | 1182 | * then we maintained suspend power. |
| @@ -231,6 +231,10 @@ static int ehci_pci_setup(struct usb_hcd *hcd) · 230 unmodified lines | ||
| 231 | 231 | ehci->is_aspeed = 1; |
| 232 | 232 | } |
| 233 | 233 | break; |
| 234 | + case PCI_VENDOR_ID_ZHAOXIN: | |
| 235 | + if (pdev->device == 0x3104 && (pdev->revision & 0xf0) == 0x90) | |
| 236 | + ehci->zx_wakeup_clear_needed = 1; | |
| 237 | + break; | |
| 234 | 238 | } |
| 235 | 239 | |
| 236 | 240 | /* optional debug port, normally in the first BAR */ |
| @@ -220,6 +220,7 @@ struct ehci_hcd { /* one per controller */ · 219 unmodified lines | ||
| 220 | 220 | unsigned imx28_write_fix:1; /* For Freescale i.MX28 */ |
| 221 | 221 | unsigned spurious_oc:1; |
| 222 | 222 | unsigned is_aspeed:1; |
| 223 | + unsigned zx_wakeup_clear_needed:1; | |
| 223 | 224 | |
| 224 | 225 | /* required for usb32 quirk */ |
| 225 | 226 | #define OHCI_CTRL_HCFS (3 << 6) |
| @@ -1434,7 +1434,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, · 1433 unmodified lines | ||
| 1434 | 1434 | } |
| 1435 | 1435 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 1436 | 1436 | if (!wait_for_completion_timeout(&bus_state->u3exit_done[wIndex], |
| 1437 | − msecs_to_jiffies(100))) | |
| 1437 | + msecs_to_jiffies(500))) | |
| 1438 | 1438 | xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n", |
| 1439 | 1439 | hcd->self.busnum, wIndex + 1); |
| 1440 | 1440 | spin_lock_irqsave(&xhci->lock, flags); |
| @@ -59,6 +59,7 @@ · 58 unmodified lines | ||
| 59 | 59 | #define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13 |
| 60 | 60 | #define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138 |
| 61 | 61 | #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI 0x461e |
| 62 | +#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI 0x51ed | |
| 62 | 63 | |
| 63 | 64 | #define PCI_DEVICE_ID_AMD_RENOIR_XHCI 0x1639 |
| 64 | 65 | #define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9 |
| @@ -266,7 +267,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) · 201 unmodified lines | ||
| 266 | 267 | pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI || |
| 267 | 268 | pdev->device == PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI || |
| 268 | 269 | pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI || |
| 269 | − pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI)) | |
| 270 | + pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI || | |
| 271 | + pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI)) | |
| 270 | 272 | xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; |
| 271 | 273 | |
| 272 | 274 | if (pdev->vendor == PCI_VENDOR_ID_ETRON && |
| @@ -3141,6 +3141,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd) · 3140 unmodified lines | ||
| 3141 | 3141 | if (event_loop++ < TRBS_PER_SEGMENT / 2) |
| 3142 | 3142 | continue; |
| 3143 | 3143 | xhci_update_erst_dequeue(xhci, event_ring_deq); |
| 3144 | + event_ring_deq = xhci->event_ring->dequeue; | |
| 3144 | 3145 | |
| 3145 | 3146 | /* ring is half-full, force isoc trbs to interrupt more often */ |
| 3146 | 3147 | if (xhci->isoc_bei_interval > AVOID_BEI_INTERVAL_MIN) |
| @@ -1034,13 +1034,13 @@ static int tegra_xusb_unpowergate_partitions(struct tegra_xusb *tegra) · 1033 unmodified lines | ||
| 1034 | 1034 | int rc; |
| 1035 | 1035 | |
| 1036 | 1036 | if (tegra->use_genpd) { |
| 1037 | − rc = pm_runtime_get_sync(tegra->genpd_dev_ss); | |
| 1037 | + rc = pm_runtime_resume_and_get(tegra->genpd_dev_ss); | |
| 1038 | 1038 | if (rc < 0) { |
| 1039 | 1039 | dev_err(dev, "failed to enable XUSB SS partition\n"); |
| 1040 | 1040 | return rc; |
| 1041 | 1041 | } |
| 1042 | 1042 | |
| 1043 | − rc = pm_runtime_get_sync(tegra->genpd_dev_host); | |
| 1043 | + rc = pm_runtime_resume_and_get(tegra->genpd_dev_host); | |
| 1044 | 1044 | if (rc < 0) { |
| 1045 | 1045 | dev_err(dev, "failed to enable XUSB Host partition\n"); |
| 1046 | 1046 | pm_runtime_put_sync(tegra->genpd_dev_ss); |
| @@ -781,6 +781,17 @@ void xhci_shutdown(struct usb_hcd *hcd) · 780 unmodified lines | ||
| 781 | 781 | if (xhci->quirks & XHCI_SPURIOUS_REBOOT) |
| 782 | 782 | usb_disable_xhci_ports(to_pci_dev(hcd->self.sysdev)); |
| 783 | 783 | |
| 784 | + /* Don't poll the roothubs after shutdown. */ | |
| 785 | + xhci_dbg(xhci, "%s: stopping usb%d port polling.\n", | |
| 786 | + __func__, hcd->self.busnum); | |
| 787 | + clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); | |
| 788 | + del_timer_sync(&hcd->rh_timer); | |
| 789 | + | |
| 790 | + if (xhci->shared_hcd) { | |
| 791 | + clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); | |
| 792 | + del_timer_sync(&xhci->shared_hcd->rh_timer); | |
| 793 | + } | |
| 794 | + | |
| 784 | 795 | spin_lock_irq(&xhci->lock); |
| 785 | 796 | xhci_halt(xhci); |
| 786 | 797 | /* Workaround for spurious wakeups at shutdown with HSW */ |
| @@ -186,16 +186,16 @@ static int eud_probe(struct platform_device *pdev) · 185 unmodified lines | ||
| 186 | 186 | |
| 187 | 187 | chip->dev = &pdev->dev; |
| 188 | 188 | |
| 189 | − ret = devm_add_action_or_reset(chip->dev, eud_role_switch_release, chip); | |
| 190 | − if (ret) | |
| 191 | − return dev_err_probe(chip->dev, ret, | |
| 192 | − "failed to add role switch release action\n"); | |
| 193 | − | |
| 194 | 189 | chip->role_sw = usb_role_switch_get(&pdev->dev); |
| 195 | 190 | if (IS_ERR(chip->role_sw)) |
| 196 | 191 | return dev_err_probe(chip->dev, PTR_ERR(chip->role_sw), |
| 197 | 192 | "failed to get role switch\n"); |
| 198 | 193 | |
| 194 | + ret = devm_add_action_or_reset(chip->dev, eud_role_switch_release, chip); | |
| 195 | + if (ret) | |
| 196 | + return dev_err_probe(chip->dev, ret, | |
| 197 | + "failed to add role switch release action\n"); | |
| 198 | + | |
| 199 | 199 | chip->base = devm_platform_ioremap_resource(pdev, 0); |
| 200 | 200 | if (IS_ERR(chip->base)) |
| 201 | 201 | return PTR_ERR(chip->base); |
| @@ -71,6 +71,7 @@ static void destroy_priv(struct kref *kref) · 70 unmodified lines | ||
| 71 | 71 | |
| 72 | 72 | dev_dbg(&priv->usbdev->dev, "destroying priv datastructure\n"); |
| 73 | 73 | usb_put_dev(priv->usbdev); |
| 74 | + priv->usbdev = NULL; | |
| 74 | 75 | kfree(priv); |
| 75 | 76 | } |
| 76 | 77 | |
| @@ -736,7 +737,6 @@ static int uss720_probe(struct usb_interface *intf, · 659 unmodified lines | ||
| 736 | 737 | parport_announce_port(pp); |
| 737 | 738 | |
| 738 | 739 | usb_set_intfdata(intf, pp); |
| 739 | − usb_put_dev(usbdev); | |
| 740 | 740 | return 0; |
| 741 | 741 | |
| 742 | 742 | probe_abort: |
| @@ -754,7 +754,6 @@ static void uss720_disconnect(struct usb_interface *intf) · 11 unmodified lines | ||
| 754 | 754 | usb_set_intfdata(intf, NULL); |
| 755 | 755 | if (pp) { |
| 756 | 756 | priv = pp->private_data; |
| 757 | − priv->usbdev = NULL; | |
| 758 | 757 | priv->pp = NULL; |
| 759 | 758 | dev_dbg(&intf->dev, "parport_remove_port\n"); |
| 760 | 759 | parport_remove_port(pp); |
| @@ -21,10 +21,8 @@ static inline struct ssusb_mtk *otg_sx_to_ssusb(struct otg_switch_mtk *otg_sx) · 20 unmodified lines | ||
| 21 | 21 | |
| 22 | 22 | static void toggle_opstate(struct ssusb_mtk *ssusb) |
| 23 | 23 | { |
| 24 | − if (!ssusb->otg_switch.is_u3_drd) { | |
| 25 | − mtu3_setbits(ssusb->mac_base, U3D_DEVICE_CONTROL, DC_SESSION); | |
| 26 | − mtu3_setbits(ssusb->mac_base, U3D_POWER_MANAGEMENT, SOFT_CONN); | |
| 27 | − } | |
| 24 | + mtu3_setbits(ssusb->mac_base, U3D_DEVICE_CONTROL, DC_SESSION); | |
| 25 | + mtu3_setbits(ssusb->mac_base, U3D_POWER_MANAGEMENT, SOFT_CONN); | |
| 28 | 26 | } |
| 29 | 27 | |
| 30 | 28 | /* only port0 supports dual-role mode */ |
| @@ -268,6 +268,13 @@ int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop) · 267 unmodified lines | ||
| 268 | 268 | return -EPROBE_DEFER; |
| 269 | 269 | } |
| 270 | 270 | |
| 271 | + nop->vbus_draw = devm_regulator_get_exclusive(dev, "vbus"); | |
| 272 | + if (PTR_ERR(nop->vbus_draw) == -ENODEV) | |
| 273 | + nop->vbus_draw = NULL; | |
| 274 | + if (IS_ERR(nop->vbus_draw)) | |
| 275 | + return dev_err_probe(dev, PTR_ERR(nop->vbus_draw), | |
| 276 | + "could not get vbus regulator\n"); | |
| 277 | + | |
| 271 | 278 | nop->dev = dev; |
| 272 | 279 | nop->phy.dev = nop->dev; |
| 273 | 280 | nop->phy.label = "nop-xceiv"; |
| @@ -194,6 +194,8 @@ static const struct usb_device_id id_table[] = { · 193 unmodified lines | ||
| 194 | 194 | { USB_DEVICE(0x16DC, 0x0015) }, /* W-IE-NE-R Plein & Baus GmbH CML Control, Monitoring and Data Logger */ |
| 195 | 195 | { USB_DEVICE(0x17A8, 0x0001) }, /* Kamstrup Optical Eye/3-wire */ |
| 196 | 196 | { USB_DEVICE(0x17A8, 0x0005) }, /* Kamstrup M-Bus Master MultiPort 250D */ |
| 197 | + { USB_DEVICE(0x17A8, 0x0101) }, /* Kamstrup 868 MHz wM-Bus C-Mode Meter Reader (Int Ant) */ | |
| 198 | + { USB_DEVICE(0x17A8, 0x0102) }, /* Kamstrup 868 MHz wM-Bus C-Mode Meter Reader (Ext Ant) */ | |
| 197 | 199 | { USB_DEVICE(0x17F4, 0xAAAA) }, /* Wavesense Jazz blood glucose meter */ |
| 198 | 200 | { USB_DEVICE(0x1843, 0x0200) }, /* Vaisala USB Instrument Cable */ |
| 199 | 201 | { USB_DEVICE(0x18EF, 0xE00F) }, /* ELV USB-I2C-Interface */ |
| @@ -432,6 +432,8 @@ static void option_instat_callback(struct urb *urb); · 431 unmodified lines | ||
| 432 | 432 | #define CINTERION_PRODUCT_CLS8 0x00b0 |
| 433 | 433 | #define CINTERION_PRODUCT_MV31_MBIM 0x00b3 |
| 434 | 434 | #define CINTERION_PRODUCT_MV31_RMNET 0x00b7 |
| 435 | +#define CINTERION_PRODUCT_MV32_WA 0x00f1 | |
| 436 | +#define CINTERION_PRODUCT_MV32_WB 0x00f2 | |
| 435 | 437 | |
| 436 | 438 | /* Olivetti products */ |
| 437 | 439 | #define OLIVETTI_VENDOR_ID 0x0b3c |
| @@ -1217,6 +1219,10 @@ static const struct usb_device_id option_ids[] = { · 779 unmodified lines | ||
| 1217 | 1219 | .driver_info = NCTRL(0) | RSVD(1) }, |
| 1218 | 1220 | { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1056, 0xff), /* Telit FD980 */ |
| 1219 | 1221 | .driver_info = NCTRL(2) | RSVD(3) }, |
| 1222 | + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1057, 0xff), /* Telit FN980 */ | |
| 1223 | + .driver_info = NCTRL(0) | RSVD(1) | RSVD(2) }, | |
| 1224 | + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1058, 0xff), /* Telit FN980 (PCIe) */ | |
| 1225 | + .driver_info = NCTRL(0) | RSVD(1) }, | |
| 1220 | 1226 | { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1060, 0xff), /* Telit LN920 (rmnet) */ |
| 1221 | 1227 | .driver_info = NCTRL(0) | RSVD(1) | RSVD(2) }, |
| 1222 | 1228 | { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1061, 0xff), /* Telit LN920 (MBIM) */ |
| @@ -1233,6 +1239,8 @@ static const struct usb_device_id option_ids[] = { · 10 unmodified lines | ||
| 1233 | 1239 | .driver_info = NCTRL(2) | RSVD(3) }, |
| 1234 | 1240 | { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1073, 0xff), /* Telit FN990 (ECM) */ |
| 1235 | 1241 | .driver_info = NCTRL(0) | RSVD(1) }, |
| 1242 | + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1075, 0xff), /* Telit FN990 (PCIe) */ | |
| 1243 | + .driver_info = RSVD(0) }, | |
| 1236 | 1244 | { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_ME910), |
| 1237 | 1245 | .driver_info = NCTRL(0) | RSVD(1) | RSVD(3) }, |
| 1238 | 1246 | { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_ME910_DUAL_MODEM), |
| @@ -1969,6 +1977,10 @@ static const struct usb_device_id option_ids[] = { · 730 unmodified lines | ||
| 1969 | 1977 | .driver_info = RSVD(3)}, |
| 1970 | 1978 | { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV31_RMNET, 0xff), |
| 1971 | 1979 | .driver_info = RSVD(0)}, |
| 1980 | + { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV32_WA, 0xff), | |
| 1981 | + .driver_info = RSVD(3)}, | |
| 1982 | + { USB_DEVICE_INTERFACE_CLASS(CINTERION_VENDOR_ID, CINTERION_PRODUCT_MV32_WB, 0xff), | |
| 1983 | + .driver_info = RSVD(3)}, | |
| 1972 | 1984 | { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100), |
| 1973 | 1985 | .driver_info = RSVD(4) }, |
| 1974 | 1986 | { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD120), |
| @@ -584,9 +584,8 @@ static int firm_send_command(struct usb_serial_port *port, __u8 command, · 583 unmodified lines | ||
| 584 | 584 | switch (command) { |
| 585 | 585 | case WHITEHEAT_GET_DTR_RTS: |
| 586 | 586 | info = usb_get_serial_port_data(port); |
| 587 | − memcpy(&info->mcr, command_info->result_buffer, | |
| 588 | − sizeof(struct whiteheat_dr_info)); | |
| 589 | − break; | |
| 587 | + info->mcr = command_info->result_buffer[0]; | |
| 588 | + break; | |
| 590 | 589 | } |
| 591 | 590 | } |
| 592 | 591 | exit: |
| @@ -56,6 +56,7 @@ config TYPEC_RT1719 · 55 unmodified lines | ||
| 56 | 56 | tristate "Richtek RT1719 Sink Only Type-C controller driver" |
| 57 | 57 | depends on USB_ROLE_SWITCH || !USB_ROLE_SWITCH |
| 58 | 58 | depends on I2C |
| 59 | + depends on POWER_SUPPLY | |
| 59 | 60 | select REGMAP_I2C |
| 60 | 61 | help |
| 61 | 62 | Say Y or M here if your system has Richtek RT1719 sink only |
| @@ -949,6 +949,8 @@ static int ucsi_dr_swap(struct typec_port *port, enum typec_data_role role) · 948 unmodified lines | ||
| 949 | 949 | role == TYPEC_HOST)) |
| 950 | 950 | goto out_unlock; |
| 951 | 951 | |
| 952 | + reinit_completion(&con->complete); | |
| 953 | + | |
| 952 | 954 | command = UCSI_SET_UOR | UCSI_CONNECTOR_NUMBER(con->num); |
| 953 | 955 | command |= UCSI_SET_UOR_ROLE(role); |
| 954 | 956 | command |= UCSI_SET_UOR_ACCEPT_ROLE_SWAPS; |
| @@ -956,14 +958,18 @@ static int ucsi_dr_swap(struct typec_port *port, enum typec_data_role role) · 1 unmodified line | ||
| 956 | 958 | if (ret < 0) |
| 957 | 959 | goto out_unlock; |
| 958 | 960 | |
| 961 | + mutex_unlock(&con->lock); | |
| 962 | + | |
| 959 | 963 | if (!wait_for_completion_timeout(&con->complete, |
| 960 | − msecs_to_jiffies(UCSI_SWAP_TIMEOUT_MS))) | |
| 961 | − ret = -ETIMEDOUT; | |
| 964 | + msecs_to_jiffies(UCSI_SWAP_TIMEOUT_MS))) | |
| 965 | + return -ETIMEDOUT; | |
| 966 | + | |
| 967 | + return 0; | |
| 962 | 968 | |
| 963 | 969 | out_unlock: |
| 964 | 970 | mutex_unlock(&con->lock); |
| 965 | 971 | |
| 966 | − return ret < 0 ? ret : 0; | |
| 972 | + return ret; | |
| 967 | 973 | } |
| 968 | 974 | |
| 969 | 975 | static int ucsi_pr_swap(struct typec_port *port, enum typec_role role) |
| @@ -985,6 +991,8 @@ static int ucsi_pr_swap(struct typec_port *port, enum typec_role role) · 15 unmodified lines | ||
| 985 | 991 | if (cur_role == role) |
| 986 | 992 | goto out_unlock; |
| 987 | 993 | |
| 994 | + reinit_completion(&con->complete); | |
| 995 | + | |
| 988 | 996 | command = UCSI_SET_PDR | UCSI_CONNECTOR_NUMBER(con->num); |
| 989 | 997 | command |= UCSI_SET_PDR_ROLE(role); |
| 990 | 998 | command |= UCSI_SET_PDR_ACCEPT_ROLE_SWAPS; |
| @@ -992,11 +1000,13 @@ static int ucsi_pr_swap(struct typec_port *port, enum typec_role role) · 1 unmodified line | ||
| 992 | 1000 | if (ret < 0) |
| 993 | 1001 | goto out_unlock; |
| 994 | 1002 | |
| 1003 | + mutex_unlock(&con->lock); | |
| 1004 | + | |
| 995 | 1005 | if (!wait_for_completion_timeout(&con->complete, |
| 996 | − msecs_to_jiffies(UCSI_SWAP_TIMEOUT_MS))) { | |
| 997 | − ret = -ETIMEDOUT; | |
| 998 | − goto out_unlock; | |
| 999 | − } | |
| 1006 | + msecs_to_jiffies(UCSI_SWAP_TIMEOUT_MS))) | |
| 1007 | + return -ETIMEDOUT; | |
| 1008 | + | |
| 1009 | + mutex_lock(&con->lock); | |
| 1000 | 1010 | |
| 1001 | 1011 | /* Something has gone wrong while swapping the role */ |
| 1002 | 1012 | if (UCSI_CONSTAT_PWR_OPMODE(con->status.flags) != |
| @@ -36,6 +36,10 @@ static bool nointxmask; · 35 unmodified lines | ||
| 36 | 36 | static bool disable_vga; |
| 37 | 37 | static bool disable_idle_d3; |
| 38 | 38 | |
| 39 | +/* List of PF's that vfio_pci_core_sriov_configure() has been called on */ | |
| 40 | +static DEFINE_MUTEX(vfio_pci_sriov_pfs_mutex); | |
| 41 | +static LIST_HEAD(vfio_pci_sriov_pfs); | |
| 42 | + | |
| 39 | 43 | static inline bool vfio_vga_disabled(void) |
| 40 | 44 | { |
| 41 | 45 | #ifdef CONFIG_VFIO_PCI_VGA |
| @@ -434,47 +438,17 @@ out: · 392 unmodified lines | ||
| 434 | 438 | } |
| 435 | 439 | EXPORT_SYMBOL_GPL(vfio_pci_core_disable); |
| 436 | 440 | |
| 437 | −static struct vfio_pci_core_device *get_pf_vdev(struct vfio_pci_core_device *vdev) | |
| 438 | −{ | |
| 439 | − struct pci_dev *physfn = pci_physfn(vdev->pdev); | |
| 440 | − struct vfio_device *pf_dev; | |
| 441 | − | |
| 442 | − if (!vdev->pdev->is_virtfn) | |
| 443 | − return NULL; | |
| 444 | − | |
| 445 | − pf_dev = vfio_device_get_from_dev(&physfn->dev); | |
| 446 | − if (!pf_dev) | |
| 447 | − return NULL; | |
| 448 | − | |
| 449 | − if (pci_dev_driver(physfn) != pci_dev_driver(vdev->pdev)) { | |
| 450 | − vfio_device_put(pf_dev); | |
| 451 | − return NULL; | |
| 452 | − } | |
| 453 | − | |
| 454 | − return container_of(pf_dev, struct vfio_pci_core_device, vdev); | |
| 455 | −} | |
| 456 | − | |
| 457 | −static void vfio_pci_vf_token_user_add(struct vfio_pci_core_device *vdev, int val) | |
| 458 | −{ | |
| 459 | − struct vfio_pci_core_device *pf_vdev = get_pf_vdev(vdev); | |
| 460 | − | |
| 461 | − if (!pf_vdev) | |
| 462 | − return; | |
| 463 | − | |
| 464 | − mutex_lock(&pf_vdev->vf_token->lock); | |
| 465 | − pf_vdev->vf_token->users += val; | |
| 466 | − WARN_ON(pf_vdev->vf_token->users < 0); | |
| 467 | − mutex_unlock(&pf_vdev->vf_token->lock); | |
| 468 | − | |
| 469 | − vfio_device_put(&pf_vdev->vdev); | |
| 470 | −} | |
| 471 | − | |
| 472 | 441 | void vfio_pci_core_close_device(struct vfio_device *core_vdev) |
| 473 | 442 | { |
| 474 | 443 | struct vfio_pci_core_device *vdev = |
| 475 | 444 | container_of(core_vdev, struct vfio_pci_core_device, vdev); |
| 476 | 445 | |
| 477 | − vfio_pci_vf_token_user_add(vdev, -1); | |
| 446 | + if (vdev->sriov_pf_core_dev) { | |
| 447 | + mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock); | |
| 448 | + WARN_ON(!vdev->sriov_pf_core_dev->vf_token->users); | |
| 449 | + vdev->sriov_pf_core_dev->vf_token->users--; | |
| 450 | + mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock); | |
| 451 | + } | |
| 478 | 452 | vfio_spapr_pci_eeh_release(vdev->pdev); |
| 479 | 453 | vfio_pci_core_disable(vdev); |
| 480 | 454 | |
| @@ -495,7 +469,12 @@ void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev) · 14 unmodified lines | ||
| 495 | 469 | { |
| 496 | 470 | vfio_pci_probe_mmaps(vdev); |
| 497 | 471 | vfio_spapr_pci_eeh_open(vdev->pdev); |
| 498 | − vfio_pci_vf_token_user_add(vdev, 1); | |
| 472 | + | |
| 473 | + if (vdev->sriov_pf_core_dev) { | |
| 474 | + mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock); | |
| 475 | + vdev->sriov_pf_core_dev->vf_token->users++; | |
| 476 | + mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock); | |
| 477 | + } | |
| 499 | 478 | } |
| 500 | 479 | EXPORT_SYMBOL_GPL(vfio_pci_core_finish_enable); |
| 501 | 480 | |
| @@ -1583,11 +1562,8 @@ static int vfio_pci_validate_vf_token(struct vfio_pci_core_device *vdev, · 1081 unmodified lines | ||
| 1583 | 1562 | * |
| 1584 | 1563 | * If the VF token is provided but unused, an error is generated. |
| 1585 | 1564 | */ |
| 1586 | − if (!vdev->pdev->is_virtfn && !vdev->vf_token && !vf_token) | |
| 1587 | − return 0; /* No VF token provided or required */ | |
| 1588 | − | |
| 1589 | 1565 | if (vdev->pdev->is_virtfn) { |
| 1590 | − struct vfio_pci_core_device *pf_vdev = get_pf_vdev(vdev); | |
| 1566 | + struct vfio_pci_core_device *pf_vdev = vdev->sriov_pf_core_dev; | |
| 1591 | 1567 | bool match; |
| 1592 | 1568 | |
| 1593 | 1569 | if (!pf_vdev) { |
| @@ -1600,7 +1576,6 @@ static int vfio_pci_validate_vf_token(struct vfio_pci_core_device *vdev, · 6 unmodified lines | ||
| 1600 | 1576 | } |
| 1601 | 1577 | |
| 1602 | 1578 | if (!vf_token) { |
| 1603 | − vfio_device_put(&pf_vdev->vdev); | |
| 1604 | 1579 | pci_info_ratelimited(vdev->pdev, |
| 1605 | 1580 | "VF token required to access device\n"); |
| 1606 | 1581 | return -EACCES; |
| @@ -1610,8 +1585,6 @@ static int vfio_pci_validate_vf_token(struct vfio_pci_core_device *vdev, · 3 unmodified lines | ||
| 1610 | 1585 | match = uuid_equal(uuid, &pf_vdev->vf_token->uuid); |
| 1611 | 1586 | mutex_unlock(&pf_vdev->vf_token->lock); |
| 1612 | 1587 | |
| 1613 | − vfio_device_put(&pf_vdev->vdev); | |
| 1614 | − | |
| 1615 | 1588 | if (!match) { |
| 1616 | 1589 | pci_info_ratelimited(vdev->pdev, |
| 1617 | 1590 | "Incorrect VF token provided for device\n"); |
| @@ -1732,8 +1705,30 @@ static int vfio_pci_bus_notifier(struct notifier_block *nb, · 114 unmodified lines | ||
| 1732 | 1705 | static int vfio_pci_vf_init(struct vfio_pci_core_device *vdev) |
| 1733 | 1706 | { |
| 1734 | 1707 | struct pci_dev *pdev = vdev->pdev; |
| 1708 | + struct vfio_pci_core_device *cur; | |
| 1709 | + struct pci_dev *physfn; | |
| 1735 | 1710 | int ret; |
| 1736 | 1711 | |
| 1712 | + if (pdev->is_virtfn) { | |
| 1713 | + /* | |
| 1714 | + * If this VF was created by our vfio_pci_core_sriov_configure() | |
| 1715 | + * then we can find the PF vfio_pci_core_device now, and due to | |
| 1716 | + * the locking in pci_disable_sriov() it cannot change until | |
| 1717 | + * this VF device driver is removed. | |
| 1718 | + */ | |
| 1719 | + physfn = pci_physfn(vdev->pdev); | |
| 1720 | + mutex_lock(&vfio_pci_sriov_pfs_mutex); | |
| 1721 | + list_for_each_entry(cur, &vfio_pci_sriov_pfs, sriov_pfs_item) { | |
| 1722 | + if (cur->pdev == physfn) { | |
| 1723 | + vdev->sriov_pf_core_dev = cur; | |
| 1724 | + break; | |
| 1725 | + } | |
| 1726 | + } | |
| 1727 | + mutex_unlock(&vfio_pci_sriov_pfs_mutex); | |
| 1728 | + return 0; | |
| 1729 | + } | |
| 1730 | + | |
| 1731 | + /* Not a SRIOV PF */ | |
| 1737 | 1732 | if (!pdev->is_physfn) |
| 1738 | 1733 | return 0; |
| 1739 | 1734 | |
| @@ -1805,6 +1800,7 @@ void vfio_pci_core_init_device(struct vfio_pci_core_device *vdev, · 65 unmodified lines | ||
| 1805 | 1800 | INIT_LIST_HEAD(&vdev->ioeventfds_list); |
| 1806 | 1801 | mutex_init(&vdev->vma_lock); |
| 1807 | 1802 | INIT_LIST_HEAD(&vdev->vma_list); |
| 1803 | + INIT_LIST_HEAD(&vdev->sriov_pfs_item); | |
| 1808 | 1804 | init_rwsem(&vdev->memory_lock); |
| 1809 | 1805 | } |
| 1810 | 1806 | EXPORT_SYMBOL_GPL(vfio_pci_core_init_device); |
| @@ -1896,7 +1892,7 @@ void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev) · 85 unmodified lines | ||
| 1896 | 1892 | { |
| 1897 | 1893 | struct pci_dev *pdev = vdev->pdev; |
| 1898 | 1894 | |
| 1899 | − pci_disable_sriov(pdev); | |
| 1895 | + vfio_pci_core_sriov_configure(pdev, 0); | |
| 1900 | 1896 | |
| 1901 | 1897 | vfio_unregister_group_dev(&vdev->vdev); |
| 1902 | 1898 | |
| @@ -1935,21 +1931,49 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_aer_err_detected); · 32 unmodified lines | ||
| 1935 | 1931 | |
| 1936 | 1932 | int vfio_pci_core_sriov_configure(struct pci_dev *pdev, int nr_virtfn) |
| 1937 | 1933 | { |
| 1934 | + struct vfio_pci_core_device *vdev; | |
| 1938 | 1935 | struct vfio_device *device; |
| 1939 | 1936 | int ret = 0; |
| 1940 | 1937 | |
| 1938 | + device_lock_assert(&pdev->dev); | |
| 1939 | + | |
| 1941 | 1940 | device = vfio_device_get_from_dev(&pdev->dev); |
| 1942 | 1941 | if (!device) |
| 1943 | 1942 | return -ENODEV; |
| 1944 | 1943 | |
| 1945 | − if (nr_virtfn == 0) | |
| 1946 | − pci_disable_sriov(pdev); | |
| 1947 | − else | |
| 1944 | + vdev = container_of(device, struct vfio_pci_core_device, vdev); | |
| 1945 | + | |
| 1946 | + if (nr_virtfn) { | |
| 1947 | + mutex_lock(&vfio_pci_sriov_pfs_mutex); | |
| 1948 | + /* | |
| 1949 | + * The thread that adds the vdev to the list is the only thread | |
| 1950 | + * that gets to call pci_enable_sriov() and we will only allow | |
| 1951 | + * it to be called once without going through | |
| 1952 | + * pci_disable_sriov() | |
| 1953 | + */ | |
| 1954 | + if (!list_empty(&vdev->sriov_pfs_item)) { | |
| 1955 | + ret = -EINVAL; | |
| 1956 | + goto out_unlock; | |
| 1957 | + } | |
| 1958 | + list_add_tail(&vdev->sriov_pfs_item, &vfio_pci_sriov_pfs); | |
| 1959 | + mutex_unlock(&vfio_pci_sriov_pfs_mutex); | |
| 1948 | 1960 | ret = pci_enable_sriov(pdev, nr_virtfn); |
| 1961 | + if (ret) | |
| 1962 | + goto out_del; | |
| 1963 | + ret = nr_virtfn; | |
| 1964 | + goto out_put; | |
| 1965 | + } | |
| 1949 | 1966 | |
| 1950 | − vfio_device_put(device); | |
| 1967 | + pci_disable_sriov(pdev); | |
| 1951 | 1968 | |
| 1952 | − return ret < 0 ? ret : nr_virtfn; | |
| 1969 | +out_del: | |
| 1970 | + mutex_lock(&vfio_pci_sriov_pfs_mutex); | |
| 1971 | + list_del_init(&vdev->sriov_pfs_item); | |
| 1972 | +out_unlock: | |
| 1973 | + mutex_unlock(&vfio_pci_sriov_pfs_mutex); | |
| 1974 | +out_put: | |
| 1975 | + vfio_device_put(device); | |
| 1976 | + return ret; | |
| 1953 | 1977 | } |
| 1954 | 1978 | EXPORT_SYMBOL_GPL(vfio_pci_core_sriov_configure); |
| 1955 | 1979 | |
| @@ -566,6 +566,9 @@ static int arkfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) · 565 unmodified lines | ||
| 566 | 566 | { |
| 567 | 567 | int rv, mem, step; |
| 568 | 568 | |
| 569 | + if (!var->pixclock) | |
| 570 | + return -EINVAL; | |
| 571 | + | |
| 569 | 572 | /* Find appropriate format */ |
| 570 | 573 | rv = svga_match_format (arkfb_formats, var, NULL); |
| 571 | 574 | if (rv < 0) |
| @@ -68,7 +68,6 @@ · 67 unmodified lines | ||
| 68 | 68 | #ifdef CONFIG_PPC_PMAC |
| 69 | 69 | #include <asm/machdep.h> |
| 70 | 70 | #include <asm/pmac_feature.h> |
| 71 | −#include <asm/prom.h> | |
| 72 | 71 | #include "../macmodes.h" |
| 73 | 72 | #endif |
| 74 | 73 | |
| @@ -79,7 +79,6 @@ · 78 unmodified lines | ||
| 79 | 79 | |
| 80 | 80 | #ifdef __powerpc__ |
| 81 | 81 | #include <asm/machdep.h> |
| 82 | −#include <asm/prom.h> | |
| 83 | 82 | #include "../macmodes.h" |
| 84 | 83 | #endif |
| 85 | 84 | #ifdef __sparc__ |
| @@ -22,7 +22,6 @@ · 21 unmodified lines | ||
| 22 | 22 | |
| 23 | 23 | #ifdef CONFIG_PPC_PMAC |
| 24 | 24 | #include <asm/machdep.h> |
| 25 | −#include <asm/prom.h> | |
| 26 | 25 | #include <asm/pmac_feature.h> |
| 27 | 26 | #endif |
| 28 | 27 | |
| @@ -21,7 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | |
| 22 | 22 | #include <asm/io.h> |
| 23 | 23 | |
| 24 | −#if defined(CONFIG_PPC) || defined(CONFIG_SPARC) | |
| 24 | +#ifdef CONFIG_SPARC | |
| 25 | 25 | #include <asm/prom.h> |
| 26 | 26 | #endif |
| 27 | 27 | |
| @@ -268,8 +268,7 @@ static int clps711x_fb_probe(struct platform_device *pdev) · 267 unmodified lines | ||
| 268 | 268 | goto out_fb_release; |
| 269 | 269 | } |
| 270 | 270 | |
| 271 | − cfb->syscon = | |
| 272 | − syscon_regmap_lookup_by_compatible("cirrus,ep7209-syscon1"); | |
| 271 | + cfb->syscon = syscon_regmap_lookup_by_phandle(np, "syscon"); | |
| 273 | 272 | if (IS_ERR(cfb->syscon)) { |
| 274 | 273 | ret = PTR_ERR(cfb->syscon); |
| 275 | 274 | goto out_fb_release; |
| @@ -47,9 +47,6 @@ · 46 unmodified lines | ||
| 47 | 47 | #include <linux/nvram.h> |
| 48 | 48 | #include <linux/adb.h> |
| 49 | 49 | #include <linux/cuda.h> |
| 50 | −#ifdef CONFIG_PPC_PMAC | |
| 51 | −#include <asm/prom.h> | |
| 52 | −#endif | |
| 53 | 50 | #ifdef CONFIG_BOOTX_TEXT |
| 54 | 51 | #include <asm/btext.h> |
| 55 | 52 | #endif |
| @@ -657,6 +657,9 @@ static int i740fb_decode_var(const struct fb_var_screeninfo *var, · 656 unmodified lines | ||
| 657 | 657 | |
| 658 | 658 | static int i740fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
| 659 | 659 | { |
| 660 | + if (!var->pixclock) | |
| 661 | + return -EINVAL; | |
| 662 | + | |
| 660 | 663 | switch (var->bits_per_pixel) { |
| 661 | 664 | case 8: |
| 662 | 665 | var->red.offset = var->green.offset = var->blue.offset = 0; |
| @@ -740,7 +743,7 @@ static int i740fb_set_par(struct fb_info *info) · 77 unmodified lines | ||
| 740 | 743 | if (i) |
| 741 | 744 | return i; |
| 742 | 745 | |
| 743 | − memset(info->screen_base, 0, info->screen_size); | |
| 746 | + memset_io(info->screen_base, 0, info->screen_size); | |
| 744 | 747 | |
| 745 | 748 | vga_protect(par); |
| 746 | 749 | |
| @@ -925,10 +925,12 @@ static int imxfb_probe(struct platform_device *pdev) · 924 unmodified lines | ||
| 925 | 925 | sizeof(struct imx_fb_videomode), GFP_KERNEL); |
| 926 | 926 | if (!fbi->mode) { |
| 927 | 927 | ret = -ENOMEM; |
| 928 | + of_node_put(display_np); | |
| 928 | 929 | goto failed_of_parse; |
| 929 | 930 | } |
| 930 | 931 | |
| 931 | 932 | ret = imxfb_of_read_mode(&pdev->dev, display_np, fbi->mode); |
| 933 | + of_node_put(display_np); | |
| 932 | 934 | if (ret) |
| 933 | 935 | goto failed_of_parse; |
| 934 | 936 | } |
| @@ -494,6 +494,8 @@ static int kyrofb_set_par(struct fb_info *info) · 493 unmodified lines | ||
| 494 | 494 | info->var.hsync_len + |
| 495 | 495 | info->var.left_margin)) / 1000; |
| 496 | 496 | |
| 497 | + if (!lineclock) | |
| 498 | + return -EINVAL; | |
| 497 | 499 | |
| 498 | 500 | /* time for a frame in ns (precision in 32bpp) */ |
| 499 | 501 | frameclock = lineclock * (info->var.yres + |
| @@ -47,7 +47,6 @@ · 46 unmodified lines | ||
| 47 | 47 | #include <asm/unaligned.h> |
| 48 | 48 | |
| 49 | 49 | #if defined(CONFIG_PPC_PMAC) |
| 50 | −#include <asm/prom.h> | |
| 51 | 50 | #include "../macmodes.h" |
| 52 | 51 | #endif |
| 53 | 52 | |
| @@ -18,6 +18,8 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/interrupt.h> |
| 19 | 19 | #include <linux/pci.h> |
| 20 | 20 | #if defined(CONFIG_OF) |
| 21 | +#include <linux/of_address.h> | |
| 22 | +#include <linux/of_irq.h> | |
| 21 | 23 | #include <linux/of_platform.h> |
| 22 | 24 | #endif |
| 23 | 25 | #include "mb862xxfb.h" |
| @@ -127,19 +127,18 @@ EXPORT_SYMBOL_GPL(mmp_unregister_panel); · 126 unmodified lines | ||
| 127 | 127 | */ |
| 128 | 128 | struct mmp_path *mmp_get_path(const char *name) |
| 129 | 129 | { |
| 130 | − struct mmp_path *path; | |
| 131 | − int found = 0; | |
| 130 | + struct mmp_path *path = NULL, *iter; | |
| 132 | 131 | |
| 133 | 132 | mutex_lock(&disp_lock); |
| 134 | − list_for_each_entry(path, &path_list, node) { | |
| 135 | − if (!strcmp(name, path->name)) { | |
| 136 | − found = 1; | |
| 133 | + list_for_each_entry(iter, &path_list, node) { | |
| 134 | + if (!strcmp(name, iter->name)) { | |
| 135 | + path = iter; | |
| 137 | 136 | break; |
| 138 | 137 | } |
| 139 | 138 | } |
| 140 | 139 | mutex_unlock(&disp_lock); |
| 141 | 140 | |
| 142 | − return found ? path : NULL; | |
| 141 | + return path; | |
| 143 | 142 | } |
| 144 | 143 | EXPORT_SYMBOL_GPL(mmp_get_path); |
| 145 | 144 | |
| @@ -585,7 +585,7 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) · 584 unmodified lines | ||
| 585 | 585 | |
| 586 | 586 | DBG("neofb_check_var"); |
| 587 | 587 | |
| 588 | − if (var->pixclock && PICOS2KHZ(var->pixclock) > par->maxClock) | |
| 588 | + if (!var->pixclock || PICOS2KHZ(var->pixclock) > par->maxClock) | |
| 589 | 589 | return -EINVAL; |
| 590 | 590 | |
| 591 | 591 | /* Is the mode larger than the LCD panel? */ |
| @@ -964,7 +964,7 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode, · 963 unmodified lines | ||
| 964 | 964 | if ((r = calc_extif_timings(ext_clk, &extif_mem_div)) < 0) |
| 965 | 965 | goto err3; |
| 966 | 966 | hwa742.extif->set_timings(&hwa742.reg_timings); |
| 967 | − clk_enable(hwa742.sys_ck); | |
| 967 | + clk_prepare_enable(hwa742.sys_ck); | |
| 968 | 968 | |
| 969 | 969 | calc_hwa742_clk_rates(ext_clk, &sys_clk, &pix_clk); |
| 970 | 970 | if ((r = calc_extif_timings(sys_clk, &extif_mem_div)) < 0) |
| @@ -1023,7 +1023,7 @@ static int hwa742_init(struct omapfb_device *fbdev, int ext_mode, · 52 unmodified lines | ||
| 1023 | 1023 | |
| 1024 | 1024 | return 0; |
| 1025 | 1025 | err4: |
| 1026 | − clk_disable(hwa742.sys_ck); | |
| 1026 | + clk_disable_unprepare(hwa742.sys_ck); | |
| 1027 | 1027 | err3: |
| 1028 | 1028 | hwa742.extif->cleanup(); |
| 1029 | 1029 | err2: |
| @@ -1037,7 +1037,7 @@ static void hwa742_cleanup(void) · 7 unmodified lines | ||
| 1037 | 1037 | hwa742_set_update_mode(OMAPFB_UPDATE_DISABLED); |
| 1038 | 1038 | hwa742.extif->cleanup(); |
| 1039 | 1039 | hwa742.int_ctrl->cleanup(); |
| 1040 | − clk_disable(hwa742.sys_ck); | |
| 1040 | + clk_disable_unprepare(hwa742.sys_ck); | |
| 1041 | 1041 | } |
| 1042 | 1042 | |
| 1043 | 1043 | struct lcd_ctrl hwa742_ctrl = { |
| @@ -711,7 +711,7 @@ static int omap_lcdc_init(struct omapfb_device *fbdev, int ext_mode, · 710 unmodified lines | ||
| 711 | 711 | dev_err(fbdev->dev, "failed to adjust LCD rate\n"); |
| 712 | 712 | goto fail1; |
| 713 | 713 | } |
| 714 | − clk_enable(lcdc.lcd_ck); | |
| 714 | + clk_prepare_enable(lcdc.lcd_ck); | |
| 715 | 715 | |
| 716 | 716 | r = request_irq(OMAP_LCDC_IRQ, lcdc_irq_handler, 0, MODULE_NAME, fbdev); |
| 717 | 717 | if (r) { |
| @@ -746,7 +746,7 @@ fail4: · 28 unmodified lines | ||
| 746 | 746 | fail3: |
| 747 | 747 | free_irq(OMAP_LCDC_IRQ, lcdc.fbdev); |
| 748 | 748 | fail2: |
| 749 | − clk_disable(lcdc.lcd_ck); | |
| 749 | + clk_disable_unprepare(lcdc.lcd_ck); | |
| 750 | 750 | fail1: |
| 751 | 751 | clk_put(lcdc.lcd_ck); |
| 752 | 752 | fail0: |
| @@ -760,7 +760,7 @@ static void omap_lcdc_cleanup(void) · 7 unmodified lines | ||
| 760 | 760 | free_fbmem(); |
| 761 | 761 | omap_free_lcd_dma(); |
| 762 | 762 | free_irq(OMAP_LCDC_IRQ, lcdc.fbdev); |
| 763 | − clk_disable(lcdc.lcd_ck); | |
| 763 | + clk_disable_unprepare(lcdc.lcd_ck); | |
| 764 | 764 | clk_put(lcdc.lcd_ck); |
| 765 | 765 | } |
| 766 | 766 | |
| @@ -598,7 +598,7 @@ static int sossi_init(struct omapfb_device *fbdev) · 597 unmodified lines | ||
| 598 | 598 | l &= ~CONF_SOSSI_RESET_R; |
| 599 | 599 | omap_writel(l, MOD_CONF_CTRL_1); |
| 600 | 600 | |
| 601 | − clk_enable(sossi.fck); | |
| 601 | + clk_prepare_enable(sossi.fck); | |
| 602 | 602 | l = omap_readl(ARM_IDLECT2); |
| 603 | 603 | l &= ~(1 << 8); /* DMACK_REQ */ |
| 604 | 604 | omap_writel(l, ARM_IDLECT2); |
| @@ -649,7 +649,7 @@ static int sossi_init(struct omapfb_device *fbdev) · 44 unmodified lines | ||
| 649 | 649 | return 0; |
| 650 | 650 | |
| 651 | 651 | err: |
| 652 | − clk_disable(sossi.fck); | |
| 652 | + clk_disable_unprepare(sossi.fck); | |
| 653 | 653 | clk_put(sossi.fck); |
| 654 | 654 | return r; |
| 655 | 655 | } |
| @@ -657,6 +657,7 @@ err: · 1 unmodified line | ||
| 657 | 657 | static void sossi_cleanup(void) |
| 658 | 658 | { |
| 659 | 659 | omap_lcdc_free_dma_callback(); |
| 660 | + clk_unprepare(sossi.fck); | |
| 660 | 661 | clk_put(sossi.fck); |
| 661 | 662 | iounmap(sossi.base); |
| 662 | 663 | } |
| @@ -30,9 +30,9 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <linux/fb.h> |
| 31 | 31 | #include <linux/init.h> |
| 32 | 32 | #include <linux/nvram.h> |
| 33 | +#include <linux/of_address.h> | |
| 33 | 34 | #include <linux/of_device.h> |
| 34 | 35 | #include <linux/of_platform.h> |
| 35 | −#include <asm/prom.h> | |
| 36 | 36 | |
| 37 | 37 | #include "macmodes.h" |
| 38 | 38 | #include "platinumfb.h" |
| @@ -1504,9 +1504,7 @@ static const struct fb_ops pm2fb_ops = { · 1503 unmodified lines | ||
| 1504 | 1504 | |
| 1505 | 1505 | |
| 1506 | 1506 | /** |
| 1507 | − * Device initialisation | |
| 1508 | − * | |
| 1509 | − * Initialise and allocate resource for PCI device. | |
| 1507 | + * pm2fb_probe - Initialise and allocate resource for PCI device. | |
| 1510 | 1508 | * |
| 1511 | 1509 | * @pdev: PCI device. |
| 1512 | 1510 | * @id: PCI device ID. |
| @@ -1711,9 +1709,7 @@ static int pm2fb_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 198 unmodified lines | ||
| 1711 | 1709 | } |
| 1712 | 1710 | |
| 1713 | 1711 | /** |
| 1714 | − * Device removal. | |
| 1715 | − * | |
| 1716 | − * Release all device resources. | |
| 1712 | + * pm2fb_remove - Release all device resources. | |
| 1717 | 1713 | * |
| 1718 | 1714 | * @pdev: PCI device to clean up. |
| 1719 | 1715 | */ |
| @@ -2256,10 +2256,10 @@ static int pxafb_probe(struct platform_device *dev) · 2255 unmodified lines | ||
| 2256 | 2256 | goto failed; |
| 2257 | 2257 | for (i = 0; i < inf->num_modes; i++) |
| 2258 | 2258 | inf->modes[i] = pdata->modes[i]; |
| 2259 | + } else { | |
| 2260 | + inf = of_pxafb_of_mach_info(&dev->dev); | |
| 2259 | 2261 | } |
| 2260 | 2262 | |
| 2261 | − if (!pdata) | |
| 2262 | − inf = of_pxafb_of_mach_info(&dev->dev); | |
| 2263 | 2263 | if (IS_ERR_OR_NULL(inf)) |
| 2264 | 2264 | goto failed; |
| 2265 | 2265 | |
| @@ -549,6 +549,9 @@ static int s3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) · 548 unmodified lines | ||
| 549 | 549 | int rv, mem, step; |
| 550 | 550 | u16 m, n, r; |
| 551 | 551 | |
| 552 | + if (!var->pixclock) | |
| 553 | + return -EINVAL; | |
| 554 | + | |
| 552 | 555 | /* Find appropriate format */ |
| 553 | 556 | rv = svga_match_format (s3fb_formats, var, NULL); |
| 554 | 557 | |
| @@ -531,9 +531,6 @@ static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch) · 530 unmodified lines | ||
| 531 | 531 | ch->tx_dev->ops->display_off(ch->tx_dev); |
| 532 | 532 | } |
| 533 | 533 | |
| 534 | −static int sh_mobile_lcdc_check_var(struct fb_var_screeninfo *var, | |
| 535 | − struct fb_info *info); | |
| 536 | − | |
| 537 | 534 | /* ----------------------------------------------------------------------------- |
| 538 | 535 | * Format helpers |
| 539 | 536 | */ |
| @@ -4463,7 +4463,7 @@ static void sisfb_post_sis300(struct pci_dev *pdev) · 4462 unmodified lines | ||
| 4463 | 4463 | SiS_SetReg(SISCR, 0x37, 0x02); |
| 4464 | 4464 | SiS_SetReg(SISPART2, 0x00, 0x1c); |
| 4465 | 4465 | v4 = 0x00; v5 = 0x00; v6 = 0x10; |
| 4466 | − if(ivideo->SiS_Pr.UseROM) { | |
| 4466 | + if (ivideo->SiS_Pr.UseROM && bios) { | |
| 4467 | 4467 | v4 = bios[0xf5]; |
| 4468 | 4468 | v5 = bios[0xf6]; |
| 4469 | 4469 | v6 = bios[0xf7]; |
| @@ -996,6 +996,9 @@ static int tridentfb_check_var(struct fb_var_screeninfo *var, · 995 unmodified lines | ||
| 996 | 996 | int ramdac = 230000; /* 230MHz for most 3D chips */ |
| 997 | 997 | debug("enter\n"); |
| 998 | 998 | |
| 999 | + if (!var->pixclock) | |
| 1000 | + return -EINVAL; | |
| 1001 | + | |
| 999 | 1002 | /* check color depth */ |
| 1000 | 1003 | if (bpp == 24) |
| 1001 | 1004 | bpp = var->bits_per_pixel = 32; |
| @@ -1650,8 +1650,9 @@ static int dlfb_usb_probe(struct usb_interface *intf, · 1649 unmodified lines | ||
| 1650 | 1650 | const struct device_attribute *attr; |
| 1651 | 1651 | struct dlfb_data *dlfb; |
| 1652 | 1652 | struct fb_info *info; |
| 1653 | − int retval = -ENOMEM; | |
| 1653 | + int retval; | |
| 1654 | 1654 | struct usb_device *usbdev = interface_to_usbdev(intf); |
| 1655 | + struct usb_endpoint_descriptor *out; | |
| 1655 | 1656 | |
| 1656 | 1657 | /* usb initialization */ |
| 1657 | 1658 | dlfb = kzalloc(sizeof(*dlfb), GFP_KERNEL); |
| @@ -1665,6 +1666,12 @@ static int dlfb_usb_probe(struct usb_interface *intf, · 7 unmodified lines | ||
| 1665 | 1666 | dlfb->udev = usb_get_dev(usbdev); |
| 1666 | 1667 | usb_set_intfdata(intf, dlfb); |
| 1667 | 1668 | |
| 1669 | + retval = usb_find_common_endpoints(intf->cur_altsetting, NULL, &out, NULL, NULL); | |
| 1670 | + if (retval) { | |
| 1671 | + dev_err(&intf->dev, "Device should have at lease 1 bulk endpoint!\n"); | |
| 1672 | + goto error; | |
| 1673 | + } | |
| 1674 | + | |
| 1668 | 1675 | dev_dbg(&intf->dev, "console enable=%d\n", console); |
| 1669 | 1676 | dev_dbg(&intf->dev, "fb_defio enable=%d\n", fb_defio); |
| 1670 | 1677 | dev_dbg(&intf->dev, "shadow enable=%d\n", shadow); |
| @@ -1674,6 +1681,7 @@ static int dlfb_usb_probe(struct usb_interface *intf, · 3 unmodified lines | ||
| 1674 | 1681 | if (!dlfb_parse_vendor_descriptor(dlfb, intf)) { |
| 1675 | 1682 | dev_err(&intf->dev, |
| 1676 | 1683 | "firmware not recognized, incompatible device?\n"); |
| 1684 | + retval = -ENODEV; | |
| 1677 | 1685 | goto error; |
| 1678 | 1686 | } |
| 1679 | 1687 | |
| @@ -1687,8 +1695,10 @@ static int dlfb_usb_probe(struct usb_interface *intf, · 7 unmodified lines | ||
| 1687 | 1695 | |
| 1688 | 1696 | /* allocates framebuffer driver structure, not framebuffer memory */ |
| 1689 | 1697 | info = framebuffer_alloc(0, &dlfb->udev->dev); |
| 1690 | − if (!info) | |
| 1698 | + if (!info) { | |
| 1699 | + retval = -ENOMEM; | |
| 1691 | 1700 | goto error; |
| 1701 | + } | |
| 1692 | 1702 | |
| 1693 | 1703 | dlfb->info = info; |
| 1694 | 1704 | info->par = dlfb; |
| @@ -54,10 +54,9 @@ · 53 unmodified lines | ||
| 54 | 54 | #include <linux/nvram.h> |
| 55 | 55 | #include <linux/adb.h> |
| 56 | 56 | #include <linux/cuda.h> |
| 57 | +#include <linux/of_address.h> | |
| 57 | 58 | #ifdef CONFIG_MAC |
| 58 | 59 | #include <asm/macintosh.h> |
| 59 | −#else | |
| 60 | −#include <asm/prom.h> | |
| 61 | 60 | #endif |
| 62 | 61 | |
| 63 | 62 | #include "macmodes.h" |
| @@ -321,6 +321,9 @@ static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *inf · 320 unmodified lines | ||
| 321 | 321 | { |
| 322 | 322 | int rv, mem, step; |
| 323 | 323 | |
| 324 | + if (!var->pixclock) | |
| 325 | + return -EINVAL; | |
| 326 | + | |
| 324 | 327 | /* Find appropriate format */ |
| 325 | 328 | rv = svga_match_format (vt8623fb_formats, var, NULL); |
| 326 | 329 | if (rv < 0) |
| @@ -199,7 +199,7 @@ struct display_timings *of_get_display_timings(const struct device_node *np) · 198 unmodified lines | ||
| 199 | 199 | struct display_timing *dt; |
| 200 | 200 | int r; |
| 201 | 201 | |
| 202 | − dt = kzalloc(sizeof(*dt), GFP_KERNEL); | |
| 202 | + dt = kmalloc(sizeof(*dt), GFP_KERNEL); | |
| 203 | 203 | if (!dt) { |
| 204 | 204 | pr_err("%pOF: could not allocate display_timing struct\n", |
| 205 | 205 | np); |
| @@ -689,29 +689,34 @@ void xen_free_ballooned_pages(unsigned int nr_pages, struct page **pages) · 688 unmodified lines | ||
| 689 | 689 | } |
| 690 | 690 | EXPORT_SYMBOL(xen_free_ballooned_pages); |
| 691 | 691 | |
| 692 | −#if defined(CONFIG_XEN_PV) && !defined(CONFIG_XEN_UNPOPULATED_ALLOC) | |
| 693 | −static void __init balloon_add_region(unsigned long start_pfn, | |
| 694 | − unsigned long pages) | |
| 692 | +static void __init balloon_add_regions(void) | |
| 695 | 693 | { |
| 694 | +#if defined(CONFIG_XEN_PV) | |
| 695 | + unsigned long start_pfn, pages; | |
| 696 | 696 | unsigned long pfn, extra_pfn_end; |
| 697 | + unsigned int i; | |
| 697 | 698 | |
| 698 | − /* | |
| 699 | − * If the amount of usable memory has been limited (e.g., with | |
| 700 | − * the 'mem' command line parameter), don't add pages beyond | |
| 701 | − * this limit. | |
| 702 | − */ | |
| 703 | − extra_pfn_end = min(max_pfn, start_pfn + pages); | |
| 699 | + for (i = 0; i < XEN_EXTRA_MEM_MAX_REGIONS; i++) { | |
| 700 | + pages = xen_extra_mem[i].n_pfns; | |
| 701 | + if (!pages) | |
| 702 | + continue; | |
| 704 | 703 | |
| 705 | − for (pfn = start_pfn; pfn < extra_pfn_end; pfn++) { | |
| 706 | − /* totalram_pages and totalhigh_pages do not | |
| 707 | − include the boot-time balloon extension, so | |
| 708 | − don't subtract from it. */ | |
| 709 | − balloon_append(pfn_to_page(pfn)); | |
| 710 | − } | |
| 704 | + start_pfn = xen_extra_mem[i].start_pfn; | |
| 711 | 705 | |
| 712 | − balloon_stats.total_pages += extra_pfn_end - start_pfn; | |
| 713 | −} | |
| 706 | + /* | |
| 707 | + * If the amount of usable memory has been limited (e.g., with | |
| 708 | + * the 'mem' command line parameter), don't add pages beyond | |
| 709 | + * this limit. | |
| 710 | + */ | |
| 711 | + extra_pfn_end = min(max_pfn, start_pfn + pages); | |
| 712 | + | |
| 713 | + for (pfn = start_pfn; pfn < extra_pfn_end; pfn++) | |
| 714 | + balloon_append(pfn_to_page(pfn)); | |
| 715 | + | |
| 716 | + balloon_stats.total_pages += extra_pfn_end - start_pfn; | |
| 717 | + } | |
| 714 | 718 | #endif |
| 719 | +} | |
| 715 | 720 | |
| 716 | 721 | static int __init balloon_init(void) |
| 717 | 722 | { |
| @@ -745,20 +750,7 @@ static int __init balloon_init(void) · 27 unmodified lines | ||
| 745 | 750 | register_sysctl_table(xen_root); |
| 746 | 751 | #endif |
| 747 | 752 | |
| 748 | −#if defined(CONFIG_XEN_PV) && !defined(CONFIG_XEN_UNPOPULATED_ALLOC) | |
| 749 | − { | |
| 750 | − int i; | |
| 751 | − | |
| 752 | − /* | |
| 753 | − * Initialize the balloon with pages from the extra memory | |
| 754 | − * regions (see arch/x86/xen/setup.c). | |
| 755 | − */ | |
| 756 | − for (i = 0; i < XEN_EXTRA_MEM_MAX_REGIONS; i++) | |
| 757 | − if (xen_extra_mem[i].n_pfns) | |
| 758 | − balloon_add_region(xen_extra_mem[i].start_pfn, | |
| 759 | − xen_extra_mem[i].n_pfns); | |
| 760 | − } | |
| 761 | −#endif | |
| 753 | + balloon_add_regions(); | |
| 762 | 754 | |
| 763 | 755 | task = kthread_run(balloon_thread, NULL, "xen-balloon"); |
| 764 | 756 | if (IS_ERR(task)) { |
| @@ -178,9 +178,9 @@ static void __del_gref(struct gntalloc_gref *gref) · 177 unmodified lines | ||
| 178 | 178 | unsigned long addr; |
| 179 | 179 | |
| 180 | 180 | if (gref->notify.flags & UNMAP_NOTIFY_CLEAR_BYTE) { |
| 181 | − uint8_t *tmp = kmap(gref->page); | |
| 181 | + uint8_t *tmp = kmap_local_page(gref->page); | |
| 182 | 182 | tmp[gref->notify.pgoff] = 0; |
| 183 | − kunmap(gref->page); | |
| 183 | + kunmap_local(tmp); | |
| 184 | 184 | } |
| 185 | 185 | if (gref->notify.flags & UNMAP_NOTIFY_SEND_EVENT) { |
| 186 | 186 | notify_remote_via_evtchn(gref->notify.event); |
| @@ -230,39 +230,6 @@ void xen_free_unpopulated_pages(unsigned int nr_pages, struct page **pages) · 229 unmodified lines | ||
| 230 | 230 | } |
| 231 | 231 | EXPORT_SYMBOL(xen_free_unpopulated_pages); |
| 232 | 232 | |
| 233 | −#ifdef CONFIG_XEN_PV | |
| 234 | −static int __init init(void) | |
| 235 | −{ | |
| 236 | − unsigned int i; | |
| 237 | − | |
| 238 | − if (!xen_domain()) | |
| 239 | − return -ENODEV; | |
| 240 | − | |
| 241 | − if (!xen_pv_domain()) | |
| 242 | − return 0; | |
| 243 | − | |
| 244 | − /* | |
| 245 | − * Initialize with pages from the extra memory regions (see | |
| 246 | − * arch/x86/xen/setup.c). | |
| 247 | − */ | |
| 248 | − for (i = 0; i < XEN_EXTRA_MEM_MAX_REGIONS; i++) { | |
| 249 | − unsigned int j; | |
| 250 | − | |
| 251 | − for (j = 0; j < xen_extra_mem[i].n_pfns; j++) { | |
| 252 | − struct page *pg = | |
| 253 | − pfn_to_page(xen_extra_mem[i].start_pfn + j); | |
| 254 | − | |
| 255 | − pg->zone_device_data = page_list; | |
| 256 | − page_list = pg; | |
| 257 | − list_count++; | |
| 258 | − } | |
| 259 | − } | |
| 260 | − | |
| 261 | − return 0; | |
| 262 | −} | |
| 263 | −subsys_initcall(init); | |
| 264 | −#endif | |
| 265 | − | |
| 266 | 233 | static int __init unpopulated_init(void) |
| 267 | 234 | { |
| 268 | 235 | int ret; |
| @@ -616,8 +616,7 @@ static ssize_t afs_write_back_from_locked_folio(struct address_space *mapping, · 615 unmodified lines | ||
| 616 | 616 | _debug("write discard %x @%llx [%llx]", len, start, i_size); |
| 617 | 617 | |
| 618 | 618 | /* The dirty region was entirely beyond the EOF. */ |
| 619 | − fscache_clear_page_bits(afs_vnode_cache(vnode), | |
| 620 | − mapping, start, len, caching); | |
| 619 | + fscache_clear_page_bits(mapping, start, len, caching); | |
| 621 | 620 | afs_pages_written_back(vnode, start, len); |
| 622 | 621 | ret = 0; |
| 623 | 622 | } |
| @@ -1117,11 +1117,11 @@ out_free_interp: · 1116 unmodified lines | ||
| 1117 | 1117 | * independently randomized mmap region (0 load_bias |
| 1118 | 1118 | * without MAP_FIXED nor MAP_FIXED_NOREPLACE). |
| 1119 | 1119 | */ |
| 1120 | − alignment = maximum_alignment(elf_phdata, elf_ex->e_phnum); | |
| 1121 | − if (interpreter || alignment > ELF_MIN_ALIGN) { | |
| 1120 | + if (interpreter) { | |
| 1122 | 1121 | load_bias = ELF_ET_DYN_BASE; |
| 1123 | 1122 | if (current->flags & PF_RANDOMIZE) |
| 1124 | 1123 | load_bias += arch_mmap_rnd(); |
| 1124 | + alignment = maximum_alignment(elf_phdata, elf_ex->e_phnum); | |
| 1125 | 1125 | if (alignment) |
| 1126 | 1126 | load_bias &= ~(alignment - 1); |
| 1127 | 1127 | elf_flags |= MAP_FIXED_NOREPLACE; |
| @@ -2503,12 +2503,6 @@ struct btrfs_block_group *btrfs_make_block_group(struct btrfs_trans_handle *tran · 2502 unmodified lines | ||
| 2503 | 2503 | return ERR_PTR(ret); |
| 2504 | 2504 | } |
| 2505 | 2505 | |
| 2506 | − /* | |
| 2507 | − * New block group is likely to be used soon. Try to activate it now. | |
| 2508 | − * Failure is OK for now. | |
| 2509 | − */ | |
| 2510 | − btrfs_zone_activate(cache); | |
| 2511 | − | |
| 2512 | 2506 | ret = exclude_super_stripes(cache); |
| 2513 | 2507 | if (ret) { |
| 2514 | 2508 | /* We may have excluded something, so call this just in case */ |
| @@ -2946,7 +2940,6 @@ int btrfs_start_dirty_block_groups(struct btrfs_trans_handle *trans) · 431 unmodified lines | ||
| 2946 | 2940 | struct btrfs_path *path = NULL; |
| 2947 | 2941 | LIST_HEAD(dirty); |
| 2948 | 2942 | struct list_head *io = &cur_trans->io_bgs; |
| 2949 | − int num_started = 0; | |
| 2950 | 2943 | int loops = 0; |
| 2951 | 2944 | |
| 2952 | 2945 | spin_lock(&cur_trans->dirty_bgs_lock); |
| @@ -3012,7 +3005,6 @@ again: · 59 unmodified lines | ||
| 3012 | 3005 | cache->io_ctl.inode = NULL; |
| 3013 | 3006 | ret = btrfs_write_out_cache(trans, cache, path); |
| 3014 | 3007 | if (ret == 0 && cache->io_ctl.inode) { |
| 3015 | − num_started++; | |
| 3016 | 3008 | should_put = 0; |
| 3017 | 3009 | |
| 3018 | 3010 | /* |
| @@ -3113,7 +3105,6 @@ int btrfs_write_dirty_block_groups(struct btrfs_trans_handle *trans) · 94 unmodified lines | ||
| 3113 | 3105 | int should_put; |
| 3114 | 3106 | struct btrfs_path *path; |
| 3115 | 3107 | struct list_head *io = &cur_trans->io_bgs; |
| 3116 | − int num_started = 0; | |
| 3117 | 3108 | |
| 3118 | 3109 | path = btrfs_alloc_path(); |
| 3119 | 3110 | if (!path) |
| @@ -3171,7 +3162,6 @@ int btrfs_write_dirty_block_groups(struct btrfs_trans_handle *trans) · 51 unmodified lines | ||
| 3171 | 3162 | cache->io_ctl.inode = NULL; |
| 3172 | 3163 | ret = btrfs_write_out_cache(trans, cache, path); |
| 3173 | 3164 | if (ret == 0 && cache->io_ctl.inode) { |
| 3174 | − num_started++; | |
| 3175 | 3165 | should_put = 0; |
| 3176 | 3166 | list_add_tail(&cache->io_list, io); |
| 3177 | 3167 | } else { |
| @@ -3455,7 +3445,7 @@ int btrfs_force_chunk_alloc(struct btrfs_trans_handle *trans, u64 type) · 277 unmodified lines | ||
| 3455 | 3445 | return btrfs_chunk_alloc(trans, alloc_flags, CHUNK_ALLOC_FORCE); |
| 3456 | 3446 | } |
| 3457 | 3447 | |
| 3458 | −static int do_chunk_alloc(struct btrfs_trans_handle *trans, u64 flags) | |
| 3448 | +static struct btrfs_block_group *do_chunk_alloc(struct btrfs_trans_handle *trans, u64 flags) | |
| 3459 | 3449 | { |
| 3460 | 3450 | struct btrfs_block_group *bg; |
| 3461 | 3451 | int ret; |
| @@ -3542,7 +3532,11 @@ static int do_chunk_alloc(struct btrfs_trans_handle *trans, u64 flags) · 80 unmodified lines | ||
| 3542 | 3532 | out: |
| 3543 | 3533 | btrfs_trans_release_chunk_metadata(trans); |
| 3544 | 3534 | |
| 3545 | − return ret; | |
| 3535 | + if (ret) | |
| 3536 | + return ERR_PTR(ret); | |
| 3537 | + | |
| 3538 | + btrfs_get_block_group(bg); | |
| 3539 | + return bg; | |
| 3546 | 3540 | } |
| 3547 | 3541 | |
| 3548 | 3542 | /* |
| @@ -3657,10 +3651,17 @@ int btrfs_chunk_alloc(struct btrfs_trans_handle *trans, u64 flags, · 108 unmodified lines | ||
| 3657 | 3651 | { |
| 3658 | 3652 | struct btrfs_fs_info *fs_info = trans->fs_info; |
| 3659 | 3653 | struct btrfs_space_info *space_info; |
| 3654 | + struct btrfs_block_group *ret_bg; | |
| 3660 | 3655 | bool wait_for_alloc = false; |
| 3661 | 3656 | bool should_alloc = false; |
| 3657 | + bool from_extent_allocation = false; | |
| 3662 | 3658 | int ret = 0; |
| 3663 | 3659 | |
| 3660 | + if (force == CHUNK_ALLOC_FORCE_FOR_EXTENT) { | |
| 3661 | + from_extent_allocation = true; | |
| 3662 | + force = CHUNK_ALLOC_FORCE; | |
| 3663 | + } | |
| 3664 | + | |
| 3664 | 3665 | /* Don't re-enter if we're already allocating a chunk */ |
| 3665 | 3666 | if (trans->allocating_chunk) |
| 3666 | 3667 | return -ENOSPC; |
| @@ -3750,9 +3751,22 @@ int btrfs_chunk_alloc(struct btrfs_trans_handle *trans, u64 flags, · 83 unmodified lines | ||
| 3750 | 3751 | force_metadata_allocation(fs_info); |
| 3751 | 3752 | } |
| 3752 | 3753 | |
| 3753 | − ret = do_chunk_alloc(trans, flags); | |
| 3754 | + ret_bg = do_chunk_alloc(trans, flags); | |
| 3754 | 3755 | trans->allocating_chunk = false; |
| 3755 | 3756 | |
| 3757 | + if (IS_ERR(ret_bg)) { | |
| 3758 | + ret = PTR_ERR(ret_bg); | |
| 3759 | + } else if (from_extent_allocation) { | |
| 3760 | + /* | |
| 3761 | + * New block group is likely to be used soon. Try to activate | |
| 3762 | + * it now. Failure is OK for now. | |
| 3763 | + */ | |
| 3764 | + btrfs_zone_activate(ret_bg); | |
| 3765 | + } | |
| 3766 | + | |
| 3767 | + if (!ret) | |
| 3768 | + btrfs_put_block_group(ret_bg); | |
| 3769 | + | |
| 3756 | 3770 | spin_lock(&space_info->lock); |
| 3757 | 3771 | if (ret < 0) { |
| 3758 | 3772 | if (ret == -ENOSPC) |
| @@ -35,11 +35,15 @@ enum btrfs_discard_state { · 34 unmodified lines | ||
| 35 | 35 | * the FS with empty chunks |
| 36 | 36 | * |
| 37 | 37 | * CHUNK_ALLOC_FORCE means it must try to allocate one |
| 38 | + * | |
| 39 | + * CHUNK_ALLOC_FORCE_FOR_EXTENT like CHUNK_ALLOC_FORCE but called from | |
| 40 | + * find_free_extent() that also activaes the zone | |
| 38 | 41 | */ |
| 39 | 42 | enum btrfs_chunk_alloc_enum { |
| 40 | 43 | CHUNK_ALLOC_NO_FORCE, |
| 41 | 44 | CHUNK_ALLOC_LIMITED, |
| 42 | 45 | CHUNK_ALLOC_FORCE, |
| 46 | + CHUNK_ALLOC_FORCE_FOR_EXTENT, | |
| 43 | 47 | }; |
| 44 | 48 | |
| 45 | 49 | struct btrfs_caching_control { |
| @@ -537,6 +537,9 @@ blk_status_t btrfs_submit_compressed_write(struct btrfs_inode *inode, u64 start, · 536 unmodified lines | ||
| 537 | 537 | cb->orig_bio = NULL; |
| 538 | 538 | cb->nr_pages = nr_pages; |
| 539 | 539 | |
| 540 | + if (blkcg_css) | |
| 541 | + kthread_associate_blkcg(blkcg_css); | |
| 542 | + | |
| 540 | 543 | while (cur_disk_bytenr < disk_start + compressed_len) { |
| 541 | 544 | u64 offset = cur_disk_bytenr - disk_start; |
| 542 | 545 | unsigned int index = offset >> PAGE_SHIFT; |
| @@ -555,6 +558,8 @@ blk_status_t btrfs_submit_compressed_write(struct btrfs_inode *inode, u64 start, · 12 unmodified lines | ||
| 555 | 558 | bio = NULL; |
| 556 | 559 | goto finish_cb; |
| 557 | 560 | } |
| 561 | + if (blkcg_css) | |
| 562 | + bio->bi_opf |= REQ_CGROUP_PUNT; | |
| 558 | 563 | } |
| 559 | 564 | /* |
| 560 | 565 | * We should never reach next_stripe_start start as we will |
| @@ -612,6 +617,9 @@ blk_status_t btrfs_submit_compressed_write(struct btrfs_inode *inode, u64 start, · 51 unmodified lines | ||
| 612 | 617 | return 0; |
| 613 | 618 | |
| 614 | 619 | finish_cb: |
| 620 | + if (blkcg_css) | |
| 621 | + kthread_associate_blkcg(NULL); | |
| 622 | + | |
| 615 | 623 | if (bio) { |
| 616 | 624 | bio->bi_status = ret; |
| 617 | 625 | bio_endio(bio); |
| @@ -1060,6 +1060,7 @@ struct btrfs_fs_info { · 1059 unmodified lines | ||
| 1060 | 1060 | */ |
| 1061 | 1061 | spinlock_t relocation_bg_lock; |
| 1062 | 1062 | u64 data_reloc_bg; |
| 1063 | + struct mutex zoned_data_reloc_io_lock; | |
| 1063 | 1064 | |
| 1064 | 1065 | u64 nr_global_roots; |
| 1065 | 1066 | |
| @@ -734,7 +734,12 @@ static int btrfs_dev_replace_start(struct btrfs_fs_info *fs_info, · 733 unmodified lines | ||
| 734 | 734 | |
| 735 | 735 | btrfs_wait_ordered_roots(fs_info, U64_MAX, 0, (u64)-1); |
| 736 | 736 | |
| 737 | − /* Commit dev_replace state and reserve 1 item for it. */ | |
| 737 | + /* | |
| 738 | + * Commit dev_replace state and reserve 1 item for it. | |
| 739 | + * This is crucial to ensure we won't miss copying extents for new block | |
| 740 | + * groups that are allocated after we started the device replace, and | |
| 741 | + * must be done after setting up the device replace state. | |
| 742 | + */ | |
| 738 | 743 | trans = btrfs_start_transaction(root, 1); |
| 739 | 744 | if (IS_ERR(trans)) { |
| 740 | 745 | ret = PTR_ERR(trans); |
| @@ -1850,9 +1850,10 @@ again: · 1849 unmodified lines | ||
| 1850 | 1850 | |
| 1851 | 1851 | ret = btrfs_insert_fs_root(fs_info, root); |
| 1852 | 1852 | if (ret) { |
| 1853 | − btrfs_put_root(root); | |
| 1854 | − if (ret == -EEXIST) | |
| 1853 | + if (ret == -EEXIST) { | |
| 1854 | + btrfs_put_root(root); | |
| 1855 | 1855 | goto again; |
| 1856 | + } | |
| 1856 | 1857 | goto fail; |
| 1857 | 1858 | } |
| 1858 | 1859 | return root; |
| @@ -3156,6 +3157,7 @@ void btrfs_init_fs_info(struct btrfs_fs_info *fs_info) · 1297 unmodified lines | ||
| 3156 | 3157 | mutex_init(&fs_info->reloc_mutex); |
| 3157 | 3158 | mutex_init(&fs_info->delalloc_root_mutex); |
| 3158 | 3159 | mutex_init(&fs_info->zoned_meta_io_lock); |
| 3160 | + mutex_init(&fs_info->zoned_data_reloc_io_lock); | |
| 3159 | 3161 | seqlock_init(&fs_info->profiles_lock); |
| 3160 | 3162 | |
| 3161 | 3163 | INIT_LIST_HEAD(&fs_info->dirty_cowonly_roots); |
| @@ -4082,7 +4082,7 @@ static int find_free_extent_update_loop(struct btrfs_fs_info *fs_info, · 4081 unmodified lines | ||
| 4082 | 4082 | } |
| 4083 | 4083 | |
| 4084 | 4084 | ret = btrfs_chunk_alloc(trans, ffe_ctl->flags, |
| 4085 | − CHUNK_ALLOC_FORCE); | |
| 4085 | + CHUNK_ALLOC_FORCE_FOR_EXTENT); | |
| 4086 | 4086 | |
| 4087 | 4087 | /* Do not bail out on ENOSPC since we can do more. */ |
| 4088 | 4088 | if (ret == -ENOSPC) |
| @@ -2658,6 +2658,7 @@ int btrfs_repair_one_sector(struct inode *inode, · 2657 unmodified lines | ||
| 2658 | 2658 | |
| 2659 | 2659 | repair_bio = btrfs_bio_alloc(1); |
| 2660 | 2660 | repair_bbio = btrfs_bio(repair_bio); |
| 2661 | + repair_bbio->file_offset = start; | |
| 2661 | 2662 | repair_bio->bi_opf = REQ_OP_READ; |
| 2662 | 2663 | repair_bio->bi_end_io = failed_bio->bi_end_io; |
| 2663 | 2664 | repair_bio->bi_iter.bi_sector = failrec->logical >> 9; |
| @@ -3333,24 +3334,37 @@ static int alloc_new_bio(struct btrfs_inode *inode, · 669 unmodified lines | ||
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