Backmerging to get a late RC of v6.10 before moving into v6.11.
Showing the changes to include/uapi (13 of 2694 files). Show all
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| @@ -737,7 +737,7 @@ __SC_COMP(__NR_pselect6_time64, sys_pselect6, compat_sys_pselect6_time64) · 736 unmodified lines | ||
| 737 | 737 | #define __NR_ppoll_time64 414 |
| 738 | 738 | __SC_COMP(__NR_ppoll_time64, sys_ppoll, compat_sys_ppoll_time64) |
| 739 | 739 | #define __NR_io_pgetevents_time64 416 |
| 740 | −__SYSCALL(__NR_io_pgetevents_time64, sys_io_pgetevents) | |
| 740 | +__SC_COMP(__NR_io_pgetevents_time64, sys_io_pgetevents, compat_sys_io_pgetevents_time64) | |
| 741 | 741 | #define __NR_recvmmsg_time64 417 |
| 742 | 742 | __SC_COMP(__NR_recvmmsg_time64, sys_recvmmsg, compat_sys_recvmmsg_time64) |
| 743 | 743 | #define __NR_mq_timedsend_time64 418 |
| @@ -171,6 +171,8 @@ extern "C" { · 170 unmodified lines | ||
| 171 | 171 | * may override the MTYPE selected in AMDGPU_VA_OP_MAP. |
| 172 | 172 | */ |
| 173 | 173 | #define AMDGPU_GEM_CREATE_EXT_COHERENT (1 << 15) |
| 174 | +/* Set PTE.D and recompress during GTT->VRAM moves according to TILING flags. */ | |
| 175 | +#define AMDGPU_GEM_CREATE_GFX12_DCC (1 << 16) | |
| 174 | 176 | |
| 175 | 177 | struct drm_amdgpu_gem_create_in { |
| 176 | 178 | /** the requested memory size */ |
| @@ -392,7 +394,7 @@ struct drm_amdgpu_gem_userptr { · 215 unmodified lines | ||
| 392 | 394 | #define AMDGPU_TILING_NUM_BANKS_SHIFT 21 |
| 393 | 395 | #define AMDGPU_TILING_NUM_BANKS_MASK 0x3 |
| 394 | 396 | |
| 395 | −/* GFX9 and later: */ | |
| 397 | +/* GFX9 - GFX11: */ | |
| 396 | 398 | #define AMDGPU_TILING_SWIZZLE_MODE_SHIFT 0 |
| 397 | 399 | #define AMDGPU_TILING_SWIZZLE_MODE_MASK 0x1f |
| 398 | 400 | #define AMDGPU_TILING_DCC_OFFSET_256B_SHIFT 5 |
| @@ -406,6 +408,17 @@ struct drm_amdgpu_gem_userptr { · 7 unmodified lines | ||
| 406 | 408 | #define AMDGPU_TILING_SCANOUT_SHIFT 63 |
| 407 | 409 | #define AMDGPU_TILING_SCANOUT_MASK 0x1 |
| 408 | 410 | |
| 411 | +/* GFX12 and later: */ | |
| 412 | +#define AMDGPU_TILING_GFX12_SWIZZLE_MODE_SHIFT 0 | |
| 413 | +#define AMDGPU_TILING_GFX12_SWIZZLE_MODE_MASK 0x7 | |
| 414 | +/* These are DCC recompression setting for memory management: */ | |
| 415 | +#define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT 3 | |
| 416 | +#define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3 /* 0:64B, 1:128B, 2:256B */ | |
| 417 | +#define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_SHIFT 5 | |
| 418 | +#define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_MASK 0x7 /* CB_COLOR0_INFO.NUMBER_TYPE */ | |
| 419 | +#define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_SHIFT 8 | |
| 420 | +#define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_MASK 0x3f /* [0:4]:CB_COLOR0_INFO.FORMAT, [5]:MM */ | |
| 421 | + | |
| 409 | 422 | /* Set/Get helpers for tiling flags. */ |
| 410 | 423 | #define AMDGPU_TILING_SET(field, value) \ |
| 411 | 424 | (((__u64)(value) & AMDGPU_TILING_##field##_MASK) << AMDGPU_TILING_##field##_SHIFT) |
| @@ -1268,6 +1281,7 @@ struct drm_amdgpu_info_gpuvm_fault { · 856 unmodified lines | ||
| 1268 | 1281 | #define AMDGPU_FAMILY_GC_10_3_6 149 /* GC 10.3.6 */ |
| 1269 | 1282 | #define AMDGPU_FAMILY_GC_10_3_7 151 /* GC 10.3.7 */ |
| 1270 | 1283 | #define AMDGPU_FAMILY_GC_11_5_0 150 /* GC 11.5.0 */ |
| 1284 | +#define AMDGPU_FAMILY_GC_12_0_0 152 /* GC 12.0.0 */ | |
| 1271 | 1285 | |
| 1272 | 1286 | /* FIXME wrong namespace! */ |
| 1273 | 1287 | struct drm_color_ctm_3x4 { |
| @@ -1476,6 +1476,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) · 1475 unmodified lines | ||
| 1476 | 1476 | #define AMD_FMT_MOD_TILE_VER_GFX10 2 |
| 1477 | 1477 | #define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3 |
| 1478 | 1478 | #define AMD_FMT_MOD_TILE_VER_GFX11 4 |
| 1479 | +#define AMD_FMT_MOD_TILE_VER_GFX12 5 | |
| 1479 | 1480 | |
| 1480 | 1481 | /* |
| 1481 | 1482 | * 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical |
| @@ -1486,6 +1487,8 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) · 4 unmodified lines | ||
| 1486 | 1487 | /* |
| 1487 | 1488 | * 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has |
| 1488 | 1489 | * GFX9 as canonical version. |
| 1490 | + * | |
| 1491 | + * 64K_D_2D on GFX12 is identical to 64K_D on GFX11. | |
| 1489 | 1492 | */ |
| 1490 | 1493 | #define AMD_FMT_MOD_TILE_GFX9_64K_D 10 |
| 1491 | 1494 | #define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25 |
| @@ -1493,6 +1496,21 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) · 1 unmodified line | ||
| 1493 | 1496 | #define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27 |
| 1494 | 1497 | #define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31 |
| 1495 | 1498 | |
| 1499 | +/* Gfx12 swizzle modes: | |
| 1500 | + * 0 - LINEAR | |
| 1501 | + * 1 - 256B_2D - 2D block dimensions | |
| 1502 | + * 2 - 4KB_2D | |
| 1503 | + * 3 - 64KB_2D | |
| 1504 | + * 4 - 256KB_2D | |
| 1505 | + * 5 - 4KB_3D - 3D block dimensions | |
| 1506 | + * 6 - 64KB_3D | |
| 1507 | + * 7 - 256KB_3D | |
| 1508 | + */ | |
| 1509 | +#define AMD_FMT_MOD_TILE_GFX12_256B_2D 1 | |
| 1510 | +#define AMD_FMT_MOD_TILE_GFX12_4K_2D 2 | |
| 1511 | +#define AMD_FMT_MOD_TILE_GFX12_64K_2D 3 | |
| 1512 | +#define AMD_FMT_MOD_TILE_GFX12_256K_2D 4 | |
| 1513 | + | |
| 1496 | 1514 | #define AMD_FMT_MOD_DCC_BLOCK_64B 0 |
| 1497 | 1515 | #define AMD_FMT_MOD_DCC_BLOCK_128B 1 |
| 1498 | 1516 | #define AMD_FMT_MOD_DCC_BLOCK_256B 2 |
| @@ -2163,6 +2163,15 @@ struct drm_i915_gem_context_param { · 2162 unmodified lines | ||
| 2163 | 2163 | * supports this per context flag. |
| 2164 | 2164 | */ |
| 2165 | 2165 | #define I915_CONTEXT_PARAM_LOW_LATENCY 0xe |
| 2166 | + | |
| 2167 | +/* | |
| 2168 | + * I915_CONTEXT_PARAM_CONTEXT_IMAGE: | |
| 2169 | + * | |
| 2170 | + * Allows userspace to provide own context images. | |
| 2171 | + * | |
| 2172 | + * Note that this is a debug API not available on production kernel builds. | |
| 2173 | + */ | |
| 2174 | +#define I915_CONTEXT_PARAM_CONTEXT_IMAGE 0xf | |
| 2166 | 2175 | /* Must be kept compact -- no holes and well documented */ |
| 2167 | 2176 | |
| 2168 | 2177 | /** @value: Context parameter value to be set or queried */ |
| @@ -2564,6 +2573,24 @@ struct i915_context_param_engines { · 395 unmodified lines | ||
| 2564 | 2573 | struct i915_engine_class_instance engines[N__]; \ |
| 2565 | 2574 | } __attribute__((packed)) name__ |
| 2566 | 2575 | |
| 2576 | +struct i915_gem_context_param_context_image { | |
| 2577 | + /** @engine: Engine class & instance to be configured. */ | |
| 2578 | + struct i915_engine_class_instance engine; | |
| 2579 | + | |
| 2580 | + /** @flags: One of the supported flags or zero. */ | |
| 2581 | + __u32 flags; | |
| 2582 | +#define I915_CONTEXT_IMAGE_FLAG_ENGINE_INDEX (1u << 0) | |
| 2583 | + | |
| 2584 | + /** @size: Size of the image blob pointed to by @image. */ | |
| 2585 | + __u32 size; | |
| 2586 | + | |
| 2587 | + /** @mbz: Must be zero. */ | |
| 2588 | + __u32 mbz; | |
| 2589 | + | |
| 2590 | + /** @image: Userspace memory containing the context image. */ | |
| 2591 | + __u64 image; | |
| 2592 | +} __attribute__((packed)); | |
| 2593 | + | |
| 2567 | 2594 | /** |
| 2568 | 2595 | * struct drm_i915_gem_context_create_ext_setparam - Context parameter |
| 2569 | 2596 | * to set or query during context creation. |
| @@ -87,6 +87,7 @@ struct drm_msm_timespec { · 86 unmodified lines | ||
| 87 | 87 | #define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */ |
| 88 | 88 | #define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (bytes) */ |
| 89 | 89 | #define MSM_PARAM_HIGHEST_BANK_BIT 0x10 /* RO */ |
| 90 | +#define MSM_PARAM_RAYTRACING 0x11 /* RO */ | |
| 90 | 91 | |
| 91 | 92 | /* For backwards compat. The original support for preemption was based on |
| 92 | 93 | * a single ring per priority level so # of priority levels equals the # |
| @@ -80,6 +80,7 @@ extern "C" { · 79 unmodified lines | ||
| 80 | 80 | * - &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY |
| 81 | 81 | * - &DRM_IOCTL_XE_EXEC |
| 82 | 82 | * - &DRM_IOCTL_XE_WAIT_USER_FENCE |
| 83 | + * - &DRM_IOCTL_XE_OBSERVATION | |
| 83 | 84 | */ |
| 84 | 85 | |
| 85 | 86 | /* |
| @@ -100,6 +101,8 @@ extern "C" { · 14 unmodified lines | ||
| 100 | 101 | #define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x08 |
| 101 | 102 | #define DRM_XE_EXEC 0x09 |
| 102 | 103 | #define DRM_XE_WAIT_USER_FENCE 0x0a |
| 104 | +#define DRM_XE_OBSERVATION 0x0b | |
| 105 | + | |
| 103 | 106 | /* Must be kept compact -- no holes */ |
| 104 | 107 | |
| 105 | 108 | #define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query) |
| @@ -113,6 +116,7 @@ extern "C" { · 7 unmodified lines | ||
| 113 | 116 | #define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property) |
| 114 | 117 | #define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec) |
| 115 | 118 | #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence) |
| 119 | +#define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param) | |
| 116 | 120 | |
| 117 | 121 | /** |
| 118 | 122 | * DOC: Xe IOCTL Extensions |
| @@ -508,6 +512,7 @@ struct drm_xe_query_gt_list { · 389 unmodified lines | ||
| 508 | 512 | * containing the following in mask: |
| 509 | 513 | * ``DSS_COMPUTE ff ff ff ff 00 00 00 00`` |
| 510 | 514 | * means 32 DSS are available for compute. |
| 515 | + * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks | |
| 511 | 516 | * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU) |
| 512 | 517 | * available per Dual Sub Slices (DSS). For example a query response |
| 513 | 518 | * containing the following in mask: |
| @@ -520,6 +525,7 @@ struct drm_xe_query_topology_mask { · 6 unmodified lines | ||
| 520 | 525 | |
| 521 | 526 | #define DRM_XE_TOPO_DSS_GEOMETRY 1 |
| 522 | 527 | #define DRM_XE_TOPO_DSS_COMPUTE 2 |
| 528 | +#define DRM_XE_TOPO_L3_BANK 3 | |
| 523 | 529 | #define DRM_XE_TOPO_EU_PER_DSS 4 |
| 524 | 530 | /** @type: type of mask */ |
| 525 | 531 | __u16 type; |
| @@ -683,6 +689,7 @@ struct drm_xe_device_query { · 157 unmodified lines | ||
| 683 | 689 | #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5 |
| 684 | 690 | #define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6 |
| 685 | 691 | #define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7 |
| 692 | +#define DRM_XE_DEVICE_QUERY_OA_UNITS 8 | |
| 686 | 693 | /** @query: The type of data to query */ |
| 687 | 694 | __u32 query; |
| 688 | 695 | |
| @@ -1368,6 +1375,311 @@ struct drm_xe_wait_user_fence { · 679 unmodified lines | ||
| 1368 | 1375 | __u64 reserved[2]; |
| 1369 | 1376 | }; |
| 1370 | 1377 | |
| 1378 | +/** | |
| 1379 | + * enum drm_xe_observation_type - Observation stream types | |
| 1380 | + */ | |
| 1381 | +enum drm_xe_observation_type { | |
| 1382 | + /** @DRM_XE_OBSERVATION_TYPE_OA: OA observation stream type */ | |
| 1383 | + DRM_XE_OBSERVATION_TYPE_OA, | |
| 1384 | +}; | |
| 1385 | + | |
| 1386 | +/** | |
| 1387 | + * enum drm_xe_observation_op - Observation stream ops | |
| 1388 | + */ | |
| 1389 | +enum drm_xe_observation_op { | |
| 1390 | + /** @DRM_XE_OBSERVATION_OP_STREAM_OPEN: Open an observation stream */ | |
| 1391 | + DRM_XE_OBSERVATION_OP_STREAM_OPEN, | |
| 1392 | + | |
| 1393 | + /** @DRM_XE_OBSERVATION_OP_ADD_CONFIG: Add observation stream config */ | |
| 1394 | + DRM_XE_OBSERVATION_OP_ADD_CONFIG, | |
| 1395 | + | |
| 1396 | + /** @DRM_XE_OBSERVATION_OP_REMOVE_CONFIG: Remove observation stream config */ | |
| 1397 | + DRM_XE_OBSERVATION_OP_REMOVE_CONFIG, | |
| 1398 | +}; | |
| 1399 | + | |
| 1400 | +/** | |
| 1401 | + * struct drm_xe_observation_param - Input of &DRM_XE_OBSERVATION | |
| 1402 | + * | |
| 1403 | + * The observation layer enables multiplexing observation streams of | |
| 1404 | + * multiple types. The actual params for a particular stream operation are | |
| 1405 | + * supplied via the @param pointer (use __copy_from_user to get these | |
| 1406 | + * params). | |
| 1407 | + */ | |
| 1408 | +struct drm_xe_observation_param { | |
| 1409 | + /** @extensions: Pointer to the first extension struct, if any */ | |
| 1410 | + __u64 extensions; | |
| 1411 | + /** @observation_type: observation stream type, of enum @drm_xe_observation_type */ | |
| 1412 | + __u64 observation_type; | |
| 1413 | + /** @observation_op: observation stream op, of enum @drm_xe_observation_op */ | |
| 1414 | + __u64 observation_op; | |
| 1415 | + /** @param: Pointer to actual stream params */ | |
| 1416 | + __u64 param; | |
| 1417 | +}; | |
| 1418 | + | |
| 1419 | +/** | |
| 1420 | + * enum drm_xe_observation_ioctls - Observation stream fd ioctl's | |
| 1421 | + * | |
| 1422 | + * Information exchanged between userspace and kernel for observation fd | |
| 1423 | + * ioctl's is stream type specific | |
| 1424 | + */ | |
| 1425 | +enum drm_xe_observation_ioctls { | |
| 1426 | + /** @DRM_XE_OBSERVATION_IOCTL_ENABLE: Enable data capture for an observation stream */ | |
| 1427 | + DRM_XE_OBSERVATION_IOCTL_ENABLE = _IO('i', 0x0), | |
| 1428 | + | |
| 1429 | + /** @DRM_XE_OBSERVATION_IOCTL_DISABLE: Disable data capture for a observation stream */ | |
| 1430 | + DRM_XE_OBSERVATION_IOCTL_DISABLE = _IO('i', 0x1), | |
| 1431 | + | |
| 1432 | + /** @DRM_XE_OBSERVATION_IOCTL_CONFIG: Change observation stream configuration */ | |
| 1433 | + DRM_XE_OBSERVATION_IOCTL_CONFIG = _IO('i', 0x2), | |
| 1434 | + | |
| 1435 | + /** @DRM_XE_OBSERVATION_IOCTL_STATUS: Return observation stream status */ | |
| 1436 | + DRM_XE_OBSERVATION_IOCTL_STATUS = _IO('i', 0x3), | |
| 1437 | + | |
| 1438 | + /** @DRM_XE_OBSERVATION_IOCTL_INFO: Return observation stream info */ | |
| 1439 | + DRM_XE_OBSERVATION_IOCTL_INFO = _IO('i', 0x4), | |
| 1440 | +}; | |
| 1441 | + | |
| 1442 | +/** | |
| 1443 | + * enum drm_xe_oa_unit_type - OA unit types | |
| 1444 | + */ | |
| 1445 | +enum drm_xe_oa_unit_type { | |
| 1446 | + /** | |
| 1447 | + * @DRM_XE_OA_UNIT_TYPE_OAG: OAG OA unit. OAR/OAC are considered | |
| 1448 | + * sub-types of OAG. For OAR/OAC, use OAG. | |
| 1449 | + */ | |
| 1450 | + DRM_XE_OA_UNIT_TYPE_OAG, | |
| 1451 | + | |
| 1452 | + /** @DRM_XE_OA_UNIT_TYPE_OAM: OAM OA unit */ | |
| 1453 | + DRM_XE_OA_UNIT_TYPE_OAM, | |
| 1454 | +}; | |
| 1455 | + | |
| 1456 | +/** | |
| 1457 | + * struct drm_xe_oa_unit - describe OA unit | |
| 1458 | + */ | |
| 1459 | +struct drm_xe_oa_unit { | |
| 1460 | + /** @extensions: Pointer to the first extension struct, if any */ | |
| 1461 | + __u64 extensions; | |
| 1462 | + | |
| 1463 | + /** @oa_unit_id: OA unit ID */ | |
| 1464 | + __u32 oa_unit_id; | |
| 1465 | + | |
| 1466 | + /** @oa_unit_type: OA unit type of @drm_xe_oa_unit_type */ | |
| 1467 | + __u32 oa_unit_type; | |
| 1468 | + | |
| 1469 | + /** @capabilities: OA capabilities bit-mask */ | |
| 1470 | + __u64 capabilities; | |
| 1471 | +#define DRM_XE_OA_CAPS_BASE (1 << 0) | |
| 1472 | + | |
| 1473 | + /** @oa_timestamp_freq: OA timestamp freq */ | |
| 1474 | + __u64 oa_timestamp_freq; | |
| 1475 | + | |
| 1476 | + /** @reserved: MBZ */ | |
| 1477 | + __u64 reserved[4]; | |
| 1478 | + | |
| 1479 | + /** @num_engines: number of engines in @eci array */ | |
| 1480 | + __u64 num_engines; | |
| 1481 | + | |
| 1482 | + /** @eci: engines attached to this OA unit */ | |
| 1483 | + struct drm_xe_engine_class_instance eci[]; | |
| 1484 | +}; | |
| 1485 | + | |
| 1486 | +/** | |
| 1487 | + * struct drm_xe_query_oa_units - describe OA units | |
| 1488 | + * | |
| 1489 | + * If a query is made with a struct drm_xe_device_query where .query | |
| 1490 | + * is equal to DRM_XE_DEVICE_QUERY_OA_UNITS, then the reply uses struct | |
| 1491 | + * drm_xe_query_oa_units in .data. | |
| 1492 | + * | |
| 1493 | + * OA unit properties for all OA units can be accessed using a code block | |
| 1494 | + * such as the one below: | |
| 1495 | + * | |
| 1496 | + * .. code-block:: C | |
| 1497 | + * | |
| 1498 | + * struct drm_xe_query_oa_units *qoa; | |
| 1499 | + * struct drm_xe_oa_unit *oau; | |
| 1500 | + * u8 *poau; | |
| 1501 | + * | |
| 1502 | + * // malloc qoa and issue DRM_XE_DEVICE_QUERY_OA_UNITS. Then: | |
| 1503 | + * poau = (u8 *)&qoa->oa_units[0]; | |
| 1504 | + * for (int i = 0; i < qoa->num_oa_units; i++) { | |
| 1505 | + * oau = (struct drm_xe_oa_unit *)poau; | |
| 1506 | + * // Access 'struct drm_xe_oa_unit' fields here | |
| 1507 | + * poau += sizeof(*oau) + oau->num_engines * sizeof(oau->eci[0]); | |
| 1508 | + * } | |
| 1509 | + */ | |
| 1510 | +struct drm_xe_query_oa_units { | |
| 1511 | + /** @extensions: Pointer to the first extension struct, if any */ | |
| 1512 | + __u64 extensions; | |
| 1513 | + /** @num_oa_units: number of OA units returned in oau[] */ | |
| 1514 | + __u32 num_oa_units; | |
| 1515 | + /** @pad: MBZ */ | |
| 1516 | + __u32 pad; | |
| 1517 | + /** | |
| 1518 | + * @oa_units: struct @drm_xe_oa_unit array returned for this device. | |
| 1519 | + * Written below as a u64 array to avoid problems with nested flexible | |
| 1520 | + * arrays with some compilers | |
| 1521 | + */ | |
| 1522 | + __u64 oa_units[]; | |
| 1523 | +}; | |
| 1524 | + | |
| 1525 | +/** | |
| 1526 | + * enum drm_xe_oa_format_type - OA format types as specified in PRM/Bspec | |
| 1527 | + * 52198/60942 | |
| 1528 | + */ | |
| 1529 | +enum drm_xe_oa_format_type { | |
| 1530 | + /** @DRM_XE_OA_FMT_TYPE_OAG: OAG report format */ | |
| 1531 | + DRM_XE_OA_FMT_TYPE_OAG, | |
| 1532 | + /** @DRM_XE_OA_FMT_TYPE_OAR: OAR report format */ | |
| 1533 | + DRM_XE_OA_FMT_TYPE_OAR, | |
| 1534 | + /** @DRM_XE_OA_FMT_TYPE_OAM: OAM report format */ | |
| 1535 | + DRM_XE_OA_FMT_TYPE_OAM, | |
| 1536 | + /** @DRM_XE_OA_FMT_TYPE_OAC: OAC report format */ | |
| 1537 | + DRM_XE_OA_FMT_TYPE_OAC, | |
| 1538 | + /** @DRM_XE_OA_FMT_TYPE_OAM_MPEC: OAM SAMEDIA or OAM MPEC report format */ | |
| 1539 | + DRM_XE_OA_FMT_TYPE_OAM_MPEC, | |
| 1540 | + /** @DRM_XE_OA_FMT_TYPE_PEC: PEC report format */ | |
| 1541 | + DRM_XE_OA_FMT_TYPE_PEC, | |
| 1542 | +}; | |
| 1543 | + | |
| 1544 | +/** | |
| 1545 | + * enum drm_xe_oa_property_id - OA stream property id's | |
| 1546 | + * | |
| 1547 | + * Stream params are specified as a chain of @drm_xe_ext_set_property | |
| 1548 | + * struct's, with @property values from enum @drm_xe_oa_property_id and | |
| 1549 | + * @drm_xe_user_extension base.name set to @DRM_XE_OA_EXTENSION_SET_PROPERTY. | |
| 1550 | + * @param field in struct @drm_xe_observation_param points to the first | |
| 1551 | + * @drm_xe_ext_set_property struct. | |
| 1552 | + * | |
| 1553 | + * Exactly the same mechanism is also used for stream reconfiguration using the | |
| 1554 | + * @DRM_XE_OBSERVATION_IOCTL_CONFIG observation stream fd ioctl, though only a | |
| 1555 | + * subset of properties below can be specified for stream reconfiguration. | |
| 1556 | + */ | |
| 1557 | +enum drm_xe_oa_property_id { | |
| 1558 | +#define DRM_XE_OA_EXTENSION_SET_PROPERTY 0 | |
| 1559 | + /** | |
| 1560 | + * @DRM_XE_OA_PROPERTY_OA_UNIT_ID: ID of the OA unit on which to open | |
| 1561 | + * the OA stream, see @oa_unit_id in 'struct | |
| 1562 | + * drm_xe_query_oa_units'. Defaults to 0 if not provided. | |
| 1563 | + */ | |
| 1564 | + DRM_XE_OA_PROPERTY_OA_UNIT_ID = 1, | |
| 1565 | + | |
| 1566 | + /** | |
| 1567 | + * @DRM_XE_OA_PROPERTY_SAMPLE_OA: A value of 1 requests inclusion of raw | |
| 1568 | + * OA unit reports or stream samples in a global buffer attached to an | |
| 1569 | + * OA unit. | |
| 1570 | + */ | |
| 1571 | + DRM_XE_OA_PROPERTY_SAMPLE_OA, | |
| 1572 | + | |
| 1573 | + /** | |
| 1574 | + * @DRM_XE_OA_PROPERTY_OA_METRIC_SET: OA metrics defining contents of OA | |
| 1575 | + * reports, previously added via @DRM_XE_OBSERVATION_OP_ADD_CONFIG. | |
| 1576 | + */ | |
| 1577 | + DRM_XE_OA_PROPERTY_OA_METRIC_SET, | |
| 1578 | + | |
| 1579 | + /** @DRM_XE_OA_PROPERTY_OA_FORMAT: OA counter report format */ | |
| 1580 | + DRM_XE_OA_PROPERTY_OA_FORMAT, | |
| 1581 | + /* | |
| 1582 | + * OA_FORMAT's are specified the same way as in PRM/Bspec 52198/60942, | |
| 1583 | + * in terms of the following quantities: a. enum @drm_xe_oa_format_type | |
| 1584 | + * b. Counter select c. Counter size and d. BC report. Also refer to the | |
| 1585 | + * oa_formats array in drivers/gpu/drm/xe/xe_oa.c. | |
| 1586 | + */ | |
| 1587 | +#define DRM_XE_OA_FORMAT_MASK_FMT_TYPE (0xff << 0) | |
| 1588 | +#define DRM_XE_OA_FORMAT_MASK_COUNTER_SEL (0xff << 8) | |
| 1589 | +#define DRM_XE_OA_FORMAT_MASK_COUNTER_SIZE (0xff << 16) | |
| 1590 | +#define DRM_XE_OA_FORMAT_MASK_BC_REPORT (0xff << 24) | |
| 1591 | + | |
| 1592 | + /** | |
| 1593 | + * @DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT: Requests periodic OA unit | |
| 1594 | + * sampling with sampling frequency proportional to 2^(period_exponent + 1) | |
| 1595 | + */ | |
| 1596 | + DRM_XE_OA_PROPERTY_OA_PERIOD_EXPONENT, | |
| 1597 | + | |
| 1598 | + /** | |
| 1599 | + * @DRM_XE_OA_PROPERTY_OA_DISABLED: A value of 1 will open the OA | |
| 1600 | + * stream in a DISABLED state (see @DRM_XE_OBSERVATION_IOCTL_ENABLE). | |
| 1601 | + */ | |
| 1602 | + DRM_XE_OA_PROPERTY_OA_DISABLED, | |
| 1603 | + | |
| 1604 | + /** | |
| 1605 | + * @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID: Open the stream for a specific | |
| 1606 | + * @exec_queue_id. OA queries can be executed on this exec queue. | |
| 1607 | + */ | |
| 1608 | + DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID, | |
| 1609 | + | |
| 1610 | + /** | |
| 1611 | + * @DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE: Optional engine instance to | |
| 1612 | + * pass along with @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID or will default to 0. | |
| 1613 | + */ | |
| 1614 | + DRM_XE_OA_PROPERTY_OA_ENGINE_INSTANCE, | |
| 1615 | + | |
| 1616 | + /** | |
| 1617 | + * @DRM_XE_OA_PROPERTY_NO_PREEMPT: Allow preemption and timeslicing | |
| 1618 | + * to be disabled for the stream exec queue. | |
| 1619 | + */ | |
| 1620 | + DRM_XE_OA_PROPERTY_NO_PREEMPT, | |
| 1621 | +}; | |
| 1622 | + | |
| 1623 | +/** | |
| 1624 | + * struct drm_xe_oa_config - OA metric configuration | |
| 1625 | + * | |
| 1626 | + * Multiple OA configs can be added using @DRM_XE_OBSERVATION_OP_ADD_CONFIG. A | |
| 1627 | + * particular config can be specified when opening an OA stream using | |
| 1628 | + * @DRM_XE_OA_PROPERTY_OA_METRIC_SET property. | |
| 1629 | + */ | |
| 1630 | +struct drm_xe_oa_config { | |
| 1631 | + /** @extensions: Pointer to the first extension struct, if any */ | |
| 1632 | + __u64 extensions; | |
| 1633 | + | |
| 1634 | + /** @uuid: String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x" */ | |
| 1635 | + char uuid[36]; | |
| 1636 | + | |
| 1637 | + /** @n_regs: Number of regs in @regs_ptr */ | |
| 1638 | + __u32 n_regs; | |
| 1639 | + | |
| 1640 | + /** | |
| 1641 | + * @regs_ptr: Pointer to (register address, value) pairs for OA config | |
| 1642 | + * registers. Expected length of buffer is: (2 * sizeof(u32) * @n_regs). | |
| 1643 | + */ | |
| 1644 | + __u64 regs_ptr; | |
| 1645 | +}; | |
| 1646 | + | |
| 1647 | +/** | |
| 1648 | + * struct drm_xe_oa_stream_status - OA stream status returned from | |
| 1649 | + * @DRM_XE_OBSERVATION_IOCTL_STATUS observation stream fd ioctl. Userspace can | |
| 1650 | + * call the ioctl to query stream status in response to EIO errno from | |
| 1651 | + * observation fd read(). | |
| 1652 | + */ | |
| 1653 | +struct drm_xe_oa_stream_status { | |
| 1654 | + /** @extensions: Pointer to the first extension struct, if any */ | |
| 1655 | + __u64 extensions; | |
| 1656 | + | |
| 1657 | + /** @oa_status: OA stream status (see Bspec 46717/61226) */ | |
| 1658 | + __u64 oa_status; | |
| 1659 | +#define DRM_XE_OASTATUS_MMIO_TRG_Q_FULL (1 << 3) | |
| 1660 | +#define DRM_XE_OASTATUS_COUNTER_OVERFLOW (1 << 2) | |
| 1661 | +#define DRM_XE_OASTATUS_BUFFER_OVERFLOW (1 << 1) | |
| 1662 | +#define DRM_XE_OASTATUS_REPORT_LOST (1 << 0) | |
| 1663 | + | |
| 1664 | + /** @reserved: reserved for future use */ | |
| 1665 | + __u64 reserved[3]; | |
| 1666 | +}; | |
| 1667 | + | |
| 1668 | +/** | |
| 1669 | + * struct drm_xe_oa_stream_info - OA stream info returned from | |
| 1670 | + * @DRM_XE_OBSERVATION_IOCTL_INFO observation stream fd ioctl | |
| 1671 | + */ | |
| 1672 | +struct drm_xe_oa_stream_info { | |
| 1673 | + /** @extensions: Pointer to the first extension struct, if any */ | |
| 1674 | + __u64 extensions; | |
| 1675 | + | |
| 1676 | + /** @oa_buf_size: OA buffer size */ | |
| 1677 | + __u64 oa_buf_size; | |
| 1678 | + | |
| 1679 | + /** @reserved: reserved for future use */ | |
| 1680 | + __u64 reserved[3]; | |
| 1681 | +}; | |
| 1682 | + | |
| 1371 | 1683 | #if defined(__cplusplus) |
| 1372 | 1684 | } |
| 1373 | 1685 | #endif |
| @@ -69,8 +69,7 @@ struct proc_input { · 68 unmodified lines | ||
| 69 | 69 | |
| 70 | 70 | static inline enum proc_cn_event valid_event(enum proc_cn_event ev_type) |
| 71 | 71 | { |
| 72 | − ev_type &= PROC_EVENT_ALL; | |
| 73 | − return ev_type; | |
| 72 | + return (enum proc_cn_event)(ev_type & PROC_EVENT_ALL); | |
| 74 | 73 | } |
| 75 | 74 | |
| 76 | 75 | /* |
| @@ -618,6 +618,8 @@ · 617 unmodified lines | ||
| 618 | 618 | #define KEY_CAMERA_ACCESS_ENABLE 0x24b /* Enables programmatic access to camera devices. (HUTRR72) */ |
| 619 | 619 | #define KEY_CAMERA_ACCESS_DISABLE 0x24c /* Disables programmatic access to camera devices. (HUTRR72) */ |
| 620 | 620 | #define KEY_CAMERA_ACCESS_TOGGLE 0x24d /* Toggles the current state of the camera access control. (HUTRR72) */ |
| 621 | +#define KEY_ACCESSIBILITY 0x24e /* Toggles the system bound accessibility UI/command (HUTRR116) */ | |
| 622 | +#define KEY_DO_NOT_DISTURB 0x24f /* Toggles the system-wide "Do Not Disturb" control (HUTRR94)*/ | |
| 621 | 623 | |
| 622 | 624 | #define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */ |
| 623 | 625 | #define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */ |
| @@ -5,61 +5,60 @@ · 4 unmodified lines | ||
| 5 | 5 | #include <linux/compiler.h> |
| 6 | 6 | |
| 7 | 7 | /* 0x4B is 'K', to avoid collision with termios and vt */ |
| 8 | −#define KD_IOCTL_BASE 'K' | |
| 9 | 8 | |
| 10 | −#define GIO_FONT _IO(KD_IOCTL_BASE, 0x60) /* gets font in expanded form */ | |
| 11 | −#define PIO_FONT _IO(KD_IOCTL_BASE, 0x61) /* use font in expanded form */ | |
| 9 | +#define GIO_FONT 0x4B60 /* gets font in expanded form */ | |
| 10 | +#define PIO_FONT 0x4B61 /* use font in expanded form */ | |
| 12 | 11 | |
| 13 | −#define GIO_FONTX _IO(KD_IOCTL_BASE, 0x6B) /* get font using struct consolefontdesc */ | |
| 14 | −#define PIO_FONTX _IO(KD_IOCTL_BASE, 0x6C) /* set font using struct consolefontdesc */ | |
| 12 | +#define GIO_FONTX 0x4B6B /* get font using struct consolefontdesc */ | |
| 13 | +#define PIO_FONTX 0x4B6C /* set font using struct consolefontdesc */ | |
| 15 | 14 | struct consolefontdesc { |
| 16 | 15 | unsigned short charcount; /* characters in font (256 or 512) */ |
| 17 | 16 | unsigned short charheight; /* scan lines per character (1-32) */ |
| 18 | 17 | char __user *chardata; /* font data in expanded form */ |
| 19 | 18 | }; |
| 20 | 19 | |
| 21 | −#define PIO_FONTRESET _IO(KD_IOCTL_BASE, 0x6D) /* reset to default font */ | |
| 20 | +#define PIO_FONTRESET 0x4B6D /* reset to default font */ | |
| 22 | 21 | |
| 23 | −#define GIO_CMAP _IO(KD_IOCTL_BASE, 0x70) /* gets colour palette on VGA+ */ | |
| 24 | −#define PIO_CMAP _IO(KD_IOCTL_BASE, 0x71) /* sets colour palette on VGA+ */ | |
| 22 | +#define GIO_CMAP 0x4B70 /* gets colour palette on VGA+ */ | |
| 23 | +#define PIO_CMAP 0x4B71 /* sets colour palette on VGA+ */ | |
| 25 | 24 | |
| 26 | −#define KIOCSOUND _IO(KD_IOCTL_BASE, 0x2F) /* start sound generation (0 for off) */ | |
| 27 | −#define KDMKTONE _IO(KD_IOCTL_BASE, 0x30) /* generate tone */ | |
| 25 | +#define KIOCSOUND 0x4B2F /* start sound generation (0 for off) */ | |
| 26 | +#define KDMKTONE 0x4B30 /* generate tone */ | |
| 28 | 27 | |
| 29 | −#define KDGETLED _IO(KD_IOCTL_BASE, 0x31) /* return current led state */ | |
| 30 | −#define KDSETLED _IO(KD_IOCTL_BASE, 0x32) /* set led state [lights, not flags] */ | |
| 28 | +#define KDGETLED 0x4B31 /* return current led state */ | |
| 29 | +#define KDSETLED 0x4B32 /* set led state [lights, not flags] */ | |
| 31 | 30 | #define LED_SCR 0x01 /* scroll lock led */ |
| 32 | 31 | #define LED_NUM 0x02 /* num lock led */ |
| 33 | 32 | #define LED_CAP 0x04 /* caps lock led */ |
| 34 | 33 | |
| 35 | −#define KDGKBTYPE _IO(KD_IOCTL_BASE, 0x33) /* get keyboard type */ | |
| 34 | +#define KDGKBTYPE 0x4B33 /* get keyboard type */ | |
| 36 | 35 | #define KB_84 0x01 |
| 37 | 36 | #define KB_101 0x02 /* this is what we always answer */ |
| 38 | 37 | #define KB_OTHER 0x03 |
| 39 | 38 | |
| 40 | −#define KDADDIO _IO(KD_IOCTL_BASE, 0x34) /* add i/o port as valid */ | |
| 41 | −#define KDDELIO _IO(KD_IOCTL_BASE, 0x35) /* del i/o port as valid */ | |
| 42 | −#define KDENABIO _IO(KD_IOCTL_BASE, 0x36) /* enable i/o to video board */ | |
| 43 | −#define KDDISABIO _IO(KD_IOCTL_BASE, 0x37) /* disable i/o to video board */ | |
| 39 | +#define KDADDIO 0x4B34 /* add i/o port as valid */ | |
| 40 | +#define KDDELIO 0x4B35 /* del i/o port as valid */ | |
| 41 | +#define KDENABIO 0x4B36 /* enable i/o to video board */ | |
| 42 | +#define KDDISABIO 0x4B37 /* disable i/o to video board */ | |
| 44 | 43 | |
| 45 | −#define KDSETMODE _IO(KD_IOCTL_BASE, 0x3A) /* set text/graphics mode */ | |
| 44 | +#define KDSETMODE 0x4B3A /* set text/graphics mode */ | |
| 46 | 45 | #define KD_TEXT 0x00 |
| 47 | 46 | #define KD_GRAPHICS 0x01 |
| 48 | 47 | #define KD_TEXT0 0x02 /* obsolete */ |
| 49 | 48 | #define KD_TEXT1 0x03 /* obsolete */ |
| 50 | −#define KDGETMODE _IO(KD_IOCTL_BASE, 0x3B) /* get current mode */ | |
| 49 | +#define KDGETMODE 0x4B3B /* get current mode */ | |
| 51 | 50 | |
| 52 | −#define KDMAPDISP _IO(KD_IOCTL_BASE, 0x3C) /* map display into address space */ | |
| 53 | −#define KDUNMAPDISP _IO(KD_IOCTL_BASE, 0x3D) /* unmap display from address space */ | |
| 51 | +#define KDMAPDISP 0x4B3C /* map display into address space */ | |
| 52 | +#define KDUNMAPDISP 0x4B3D /* unmap display from address space */ | |
| 54 | 53 | |
| 55 | 54 | typedef char scrnmap_t; |
| 56 | 55 | #define E_TABSZ 256 |
| 57 | −#define GIO_SCRNMAP _IO(KD_IOCTL_BASE, 0x40) /* get screen mapping from kernel */ | |
| 58 | −#define PIO_SCRNMAP _IO(KD_IOCTL_BASE, 0x41) /* put screen mapping table in kernel */ | |
| 59 | −#define GIO_UNISCRNMAP _IO(KD_IOCTL_BASE, 0x69) /* get full Unicode screen mapping */ | |
| 60 | −#define PIO_UNISCRNMAP _IO(KD_IOCTL_BASE, 0x6A) /* set full Unicode screen mapping */ | |
| 56 | +#define GIO_SCRNMAP 0x4B40 /* get screen mapping from kernel */ | |
| 57 | +#define PIO_SCRNMAP 0x4B41 /* put screen mapping table in kernel */ | |
| 58 | +#define GIO_UNISCRNMAP 0x4B69 /* get full Unicode screen mapping */ | |
| 59 | +#define PIO_UNISCRNMAP 0x4B6A /* set full Unicode screen mapping */ | |
| 61 | 60 | |
| 62 | −#define GIO_UNIMAP _IO(KD_IOCTL_BASE, 0x66) /* get unicode-to-font mapping from kernel */ | |
| 61 | +#define GIO_UNIMAP 0x4B66 /* get unicode-to-font mapping from kernel */ | |
| 63 | 62 | struct unipair { |
| 64 | 63 | unsigned short unicode; |
| 65 | 64 | unsigned short fontpos; |
| @@ -68,8 +67,8 @@ struct unimapdesc { · 2 unmodified lines | ||
| 68 | 67 | unsigned short entry_ct; |
| 69 | 68 | struct unipair __user *entries; |
| 70 | 69 | }; |
| 71 | −#define PIO_UNIMAP _IO(KD_IOCTL_BASE, 0x67) /* put unicode-to-font mapping in kernel */ | |
| 72 | −#define PIO_UNIMAPCLR _IO(KD_IOCTL_BASE, 0x68) /* clear table, possibly advise hash algorithm */ | |
| 70 | +#define PIO_UNIMAP 0x4B67 /* put unicode-to-font mapping in kernel */ | |
| 71 | +#define PIO_UNIMAPCLR 0x4B68 /* clear table, possibly advise hash algorithm */ | |
| 73 | 72 | struct unimapinit { |
| 74 | 73 | unsigned short advised_hashsize; /* 0 if no opinion */ |
| 75 | 74 | unsigned short advised_hashstep; /* 0 if no opinion */ |
| @@ -84,19 +83,19 @@ struct unimapinit { · 8 unmodified lines | ||
| 84 | 83 | #define K_MEDIUMRAW 0x02 |
| 85 | 84 | #define K_UNICODE 0x03 |
| 86 | 85 | #define K_OFF 0x04 |
| 87 | −#define KDGKBMODE _IO(KD_IOCTL_BASE, 0x44) /* gets current keyboard mode */ | |
| 88 | −#define KDSKBMODE _IO(KD_IOCTL_BASE, 0x45) /* sets current keyboard mode */ | |
| 86 | +#define KDGKBMODE 0x4B44 /* gets current keyboard mode */ | |
| 87 | +#define KDSKBMODE 0x4B45 /* sets current keyboard mode */ | |
| 89 | 88 | |
| 90 | 89 | #define K_METABIT 0x03 |
| 91 | 90 | #define K_ESCPREFIX 0x04 |
| 92 | −#define KDGKBMETA _IO(KD_IOCTL_BASE, 0x62) /* gets meta key handling mode */ | |
| 93 | −#define KDSKBMETA _IO(KD_IOCTL_BASE, 0x63) /* sets meta key handling mode */ | |
| 91 | +#define KDGKBMETA 0x4B62 /* gets meta key handling mode */ | |
| 92 | +#define KDSKBMETA 0x4B63 /* sets meta key handling mode */ | |
| 94 | 93 | |
| 95 | 94 | #define K_SCROLLLOCK 0x01 |
| 96 | 95 | #define K_NUMLOCK 0x02 |
| 97 | 96 | #define K_CAPSLOCK 0x04 |
| 98 | −#define KDGKBLED _IO(KD_IOCTL_BASE, 0x64) /* get led flags (not lights) */ | |
| 99 | −#define KDSKBLED _IO(KD_IOCTL_BASE, 0x65) /* set led flags (not lights) */ | |
| 97 | +#define KDGKBLED 0x4B64 /* get led flags (not lights) */ | |
| 98 | +#define KDSKBLED 0x4B65 /* set led flags (not lights) */ | |
| 100 | 99 | |
| 101 | 100 | struct kbentry { |
| 102 | 101 | unsigned char kb_table; |
| @@ -108,15 +107,15 @@ struct kbentry { · 5 unmodified lines | ||
| 108 | 107 | #define K_ALTTAB 0x02 |
| 109 | 108 | #define K_ALTSHIFTTAB 0x03 |
| 110 | 109 | |
| 111 | −#define KDGKBENT _IO(KD_IOCTL_BASE, 0x46) /* gets one entry in translation table */ | |
| 112 | −#define KDSKBENT _IO(KD_IOCTL_BASE, 0x47) /* sets one entry in translation table */ | |
| 110 | +#define KDGKBENT 0x4B46 /* gets one entry in translation table */ | |
| 111 | +#define KDSKBENT 0x4B47 /* sets one entry in translation table */ | |
| 113 | 112 | |
| 114 | 113 | struct kbsentry { |
| 115 | 114 | unsigned char kb_func; |
| 116 | 115 | unsigned char kb_string[512]; |
| 117 | 116 | }; |
| 118 | −#define KDGKBSENT _IO(KD_IOCTL_BASE, 0x48) /* gets one function key string entry */ | |
| 119 | −#define KDSKBSENT _IO(KD_IOCTL_BASE, 0x49) /* sets one function key string entry */ | |
| 117 | +#define KDGKBSENT 0x4B48 /* gets one function key string entry */ | |
| 118 | +#define KDSKBSENT 0x4B49 /* sets one function key string entry */ | |
| 120 | 119 | |
| 121 | 120 | struct kbdiacr { |
| 122 | 121 | unsigned char diacr, base, result; |
| @@ -125,8 +124,8 @@ struct kbdiacrs { · 2 unmodified lines | ||
| 125 | 124 | unsigned int kb_cnt; /* number of entries in following array */ |
| 126 | 125 | struct kbdiacr kbdiacr[256]; /* MAX_DIACR from keyboard.h */ |
| 127 | 126 | }; |
| 128 | −#define KDGKBDIACR _IO(KD_IOCTL_BASE, 0x4A) /* read kernel accent table */ | |
| 129 | −#define KDSKBDIACR _IO(KD_IOCTL_BASE, 0x4B) /* write kernel accent table */ | |
| 127 | +#define KDGKBDIACR 0x4B4A /* read kernel accent table */ | |
| 128 | +#define KDSKBDIACR 0x4B4B /* write kernel accent table */ | |
| 130 | 129 | |
| 131 | 130 | struct kbdiacruc { |
| 132 | 131 | unsigned int diacr, base, result; |
| @@ -135,16 +134,16 @@ struct kbdiacrsuc { · 2 unmodified lines | ||
| 135 | 134 | unsigned int kb_cnt; /* number of entries in following array */ |
| 136 | 135 | struct kbdiacruc kbdiacruc[256]; /* MAX_DIACR from keyboard.h */ |
| 137 | 136 | }; |
| 138 | −#define KDGKBDIACRUC _IO(KD_IOCTL_BASE, 0xFA) /* read kernel accent table - UCS */ | |
| 139 | −#define KDSKBDIACRUC _IO(KD_IOCTL_BASE, 0xFB) /* write kernel accent table - UCS */ | |
| 137 | +#define KDGKBDIACRUC 0x4BFA /* read kernel accent table - UCS */ | |
| 138 | +#define KDSKBDIACRUC 0x4BFB /* write kernel accent table - UCS */ | |
| 140 | 139 | |
| 141 | 140 | struct kbkeycode { |
| 142 | 141 | unsigned int scancode, keycode; |
| 143 | 142 | }; |
| 144 | −#define KDGETKEYCODE _IO(KD_IOCTL_BASE, 0x4C) /* read kernel keycode table entry */ | |
| 145 | −#define KDSETKEYCODE _IO(KD_IOCTL_BASE, 0x4D) /* write kernel keycode table entry */ | |
| 143 | +#define KDGETKEYCODE 0x4B4C /* read kernel keycode table entry */ | |
| 144 | +#define KDSETKEYCODE 0x4B4D /* write kernel keycode table entry */ | |
| 146 | 145 | |
| 147 | −#define KDSIGACCEPT _IO(KD_IOCTL_BASE, 0x4E) /* accept kbd generated signals */ | |
| 146 | +#define KDSIGACCEPT 0x4B4E /* accept kbd generated signals */ | |
| 148 | 147 | |
| 149 | 148 | struct kbd_repeat { |
| 150 | 149 | int delay; /* in msec; <= 0: don't change */ |
| @@ -152,11 +151,10 @@ struct kbd_repeat { · 1 unmodified line | ||
| 152 | 151 | /* earlier this field was misnamed "rate" */ |
| 153 | 152 | }; |
| 154 | 153 | |
| 155 | −#define KDKBDREP _IO(KD_IOCTL_BASE, 0x52) /* set keyboard delay/repeat rate; | |
| 156 | − * actually used values are returned | |
| 157 | − */ | |
| 154 | +#define KDKBDREP 0x4B52 /* set keyboard delay/repeat rate; | |
| 155 | + * actually used values are returned */ | |
| 158 | 156 | |
| 159 | −#define KDFONTOP _IO(KD_IOCTL_BASE, 0x72) /* font operations */ | |
| 157 | +#define KDFONTOP 0x4B72 /* font operations */ | |
| 160 | 158 | |
| 161 | 159 | struct console_font_op { |
| 162 | 160 | unsigned int op; /* operation code KD_FONT_OP_* */ |
| @@ -41,9 +41,10 @@ · 40 unmodified lines | ||
| 41 | 41 | * - 1.13 - Add debugger API |
| 42 | 42 | * - 1.14 - Update kfd_event_data |
| 43 | 43 | * - 1.15 - Enable managing mappings in compute VMs with GEM_VA ioctl |
| 44 | + * - 1.16 - Add contiguous VRAM allocation flag | |
| 44 | 45 | */ |
| 45 | 46 | #define KFD_IOCTL_MAJOR_VERSION 1 |
| 46 | −#define KFD_IOCTL_MINOR_VERSION 15 | |
| 47 | +#define KFD_IOCTL_MINOR_VERSION 16 | |
| 47 | 48 | |
| 48 | 49 | struct kfd_ioctl_get_version_args { |
| 49 | 50 | __u32 major_version; /* from KFD */ |
| @@ -407,6 +408,7 @@ struct kfd_ioctl_acquire_vm_args { · 357 unmodified lines | ||
| 407 | 408 | #define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26) |
| 408 | 409 | #define KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED (1 << 25) |
| 409 | 410 | #define KFD_IOC_ALLOC_MEM_FLAGS_EXT_COHERENT (1 << 24) |
| 411 | +#define KFD_IOC_ALLOC_MEM_FLAGS_CONTIGUOUS (1 << 23) | |
| 410 | 412 | |
| 411 | 413 | /* Allocate memory for later SVM (shared virtual memory) mapping. |
| 412 | 414 | * |
| @@ -852,6 +854,7 @@ enum kfd_dbg_trap_address_watch_mode { · 439 unmodified lines | ||
| 852 | 854 | /* Additional wave settings */ |
| 853 | 855 | enum kfd_dbg_trap_flags { |
| 854 | 856 | KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP = 1, |
| 857 | + KFD_DBG_TRAP_FLAG_SINGLE_ALU_OP = 2, | |
| 855 | 858 | }; |
| 856 | 859 | |
| 857 | 860 | /* Trap exceptions */ |
| @@ -51,15 +51,16 @@ · 50 unmodified lines | ||
| 51 | 51 | /* Old buggy user mode depends on this being 0 */ |
| 52 | 52 | #define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x00080000 |
| 53 | 53 | |
| 54 | −#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000 | |
| 55 | −#define HSA_CAP_RASEVENTNOTIFY 0x00200000 | |
| 56 | −#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000 | |
| 57 | −#define HSA_CAP_ASIC_REVISION_SHIFT 22 | |
| 58 | −#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000 | |
| 59 | −#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000 | |
| 60 | −#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000 | |
| 61 | −#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000 | |
| 62 | −#define HSA_CAP_RESERVED 0xe00f8000 | |
| 54 | +#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000 | |
| 55 | +#define HSA_CAP_RASEVENTNOTIFY 0x00200000 | |
| 56 | +#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000 | |
| 57 | +#define HSA_CAP_ASIC_REVISION_SHIFT 22 | |
| 58 | +#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000 | |
| 59 | +#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000 | |
| 60 | +#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000 | |
| 61 | +#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000 | |
| 62 | +#define HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED 0x40000000 | |
| 63 | +#define HSA_CAP_RESERVED 0x800f8000 | |
| 63 | 64 | |
| 64 | 65 | /* debug_prop bits in node properties */ |
| 65 | 66 | #define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f |
| @@ -148,6 +148,7 @@ enum { · 147 unmodified lines | ||
| 148 | 148 | NETDEV_A_QSTATS_RX_ALLOC_FAIL, |
| 149 | 149 | NETDEV_A_QSTATS_RX_HW_DROPS, |
| 150 | 150 | NETDEV_A_QSTATS_RX_HW_DROP_OVERRUNS, |
| 151 | + NETDEV_A_QSTATS_RX_CSUM_COMPLETE, | |
| 151 | 152 | NETDEV_A_QSTATS_RX_CSUM_UNNECESSARY, |
| 152 | 153 | NETDEV_A_QSTATS_RX_CSUM_NONE, |
| 153 | 154 | NETDEV_A_QSTATS_RX_CSUM_BAD, |
| @@ -126,8 +126,8 @@ struct statx { · 125 unmodified lines | ||
| 126 | 126 | __u64 stx_mnt_id; |
| 127 | 127 | __u32 stx_dio_mem_align; /* Memory buffer alignment for direct I/O */ |
| 128 | 128 | __u32 stx_dio_offset_align; /* File offset alignment for direct I/O */ |
| 129 | − __u64 stx_subvol; /* Subvolume identifier */ | |
| 130 | 129 | /* 0xa0 */ |
| 130 | + __u64 stx_subvol; /* Subvolume identifier */ | |
| 131 | 131 | __u64 __spare3[11]; /* Spare space for future expansion */ |
| 132 | 132 | /* 0x100 */ |
| 133 | 133 | }; |