History

Merge tag 'timers-v7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/daniel.lezcano/linux into timers/clocksource

- Use designated initializers for sh_mtu2, sh_cmt, and sh_tmu, and drop the unused initializer in the platform_device_id table for sh_mtu2 (Uwe Kleine-König) - Remove redundant dev_err()/dev_err_probe() messages when devm_request_*_irq() fails, as the helper already logs an error message (Pan Chuang) - Fix a boot hang on Allwinner D1 when a forced minimum delta is used with the sun4i timer (Felix Yan) - Fix an IRQ leak in the cpuhp_setup_state() error path by freeing the IRQ on failure in the NXP PIT driver (WenTao Liang) - Fix incorrect unmapping of shared MMIO between the clocksource and clockevent drivers. If one of them fails to initialize, the error path unmaps the shared MMIO region, leaving the other driver with an invalid mapping on clps711x (Guangshuo Li) - Make the samsung_pwm driver compatible with PREEMPT_RT by replacing regular spinlocks with raw_spinlock_t in atomic contexts (Marek Szyprowski) - Use __raw_readl() and __raw_writel() instead of ioread32() and iowrite32() to support SWAP_IO_SPACE in the rtl-otto driver (Rustam Adilov) - Fix a missing clk_disable_unprepare() call in the timer initialization error path of the Armada driver (Yuho Choi)

Thomas Gleixner committed 2 months ago

Commit 0eaed892 parents c66494c 8b4127f15916 files · +843124 −257982Browse files

Unified · Split

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  272. Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml +0 −90
  273. Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-interrupt.yaml +188 −0
  274. Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml +20 −0
  275. Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +2 −0
  276. Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml +1 −1
  277. Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +1 −0
  278. Documentation/devicetree/bindings/interrupt-controller/starfive,jhb100-intc.yaml +4 −16
  279. Documentation/devicetree/bindings/interrupt-controller/ti,irq-crossbar.yaml +96 −0
  280. Documentation/devicetree/bindings/iommu/arm,smmu.yaml +43 −1
  281. Documentation/devicetree/bindings/iommu/riscv,iommu.yaml +51 −8
  282. Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml +71 −0
  283. Documentation/devicetree/bindings/leds/backlight/maxim,max25014.yaml +83 −0
  284. Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml +1 −1
  285. Documentation/devicetree/bindings/leds/leds-lp55xx.yaml +1 −1
  286. Documentation/devicetree/bindings/leds/samsung,s2mu005-flash.yaml +52 −0
  287. Documentation/devicetree/bindings/leds/ti,lm3560.yaml +163 −0
  288. Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +1 −0
  289. Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml +2 −0
  290. Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml +2 −0
  291. Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml +10 −0
  292. Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml +6 −0
  293. Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml +6 −0
  294. Documentation/devicetree/bindings/media/cnm,wave521c.yaml +1 −1
  295. Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml +4 −1
  296. Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml +1 −1
  297. Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +1 −1
  298. Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +3 −3
  299. Documentation/devicetree/bindings/media/qcom,msm8939-venus.yaml +79 −0
  300. Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml +5 −1
  301. Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml +15 −0
  302. Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml +2 −8
  303. Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml +471 −0
  304. Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml +17 −6
  305. Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml +22 −1
  306. Documentation/devicetree/bindings/media/qcom,venus-common.yaml +0 −15
  307. Documentation/devicetree/bindings/media/renesas,fcp.yaml +4 −0
  308. Documentation/devicetree/bindings/media/renesas,vsp1.yaml +2 −0
  309. Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml +24 −3
  310. Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml +154 −19
  311. Documentation/devicetree/bindings/media/rockchip,vdec.yaml +2 −3
  312. Documentation/devicetree/bindings/media/rockchip-rga.yaml +9 −1
  313. Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml +3 −3
  314. Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml +36 −3
  315. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml +26 −148
  316. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml +8 −23
  317. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml +31 −0
  318. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.yaml +2 −2
  319. Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml +50 −10
  320. Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml +1 −1
  321. Documentation/devicetree/bindings/mfd/apple,smc.yaml +36 −0
  322. Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +115 −0
  323. Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml +80 −0
  324. Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt +0 −33
  325. Documentation/devicetree/bindings/mfd/khadas,mcu.yaml +17 −0
  326. Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml +64 −0
  327. Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml +2 −0
  328. Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml +1 −2
  329. Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml +120 −0
  330. Documentation/devicetree/bindings/mfd/sprd,sc2731.yaml +3 −1
  331. Documentation/devicetree/bindings/mfd/st,stmpe.yaml +4 −0
  332. Documentation/devicetree/bindings/mfd/ti,bq25703a.yaml +63 −10
  333. Documentation/devicetree/bindings/misc/fsl,qoriq-mc.yaml +1 −1
  334. Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +1 −0
  335. Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml +4 −3
  336. Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yaml +4 −1
  337. Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +1 −0
  338. Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml +15 −0
  339. Documentation/devicetree/bindings/mtd/nand-chip.yaml +9 −0
  340. Documentation/devicetree/bindings/net/airoha,an8801.yaml +120 −0
  341. Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml +55 −1
  342. Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml +2 −5
  343. Documentation/devicetree/bindings/net/dsa/dsa.txt +0 −4
  344. Documentation/devicetree/bindings/net/dsa/dsa.yaml +5 −1
  345. Documentation/devicetree/bindings/net/dsa/lan9303.txt +0 −100
  346. Documentation/devicetree/bindings/net/dsa/nxp,netc-switch.yaml +131 −0
  347. Documentation/devicetree/bindings/net/dsa/smsc,lan9303.yaml +123 −0
  348. Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml +14 −2
  349. Documentation/devicetree/bindings/net/ethernet-phy.yaml +6 −3
  350. Documentation/devicetree/bindings/net/mdio.txt +0 −1
  351. Documentation/devicetree/bindings/net/mediatek,net.yaml +1 −2
  352. Documentation/devicetree/bindings/net/microchip,lan8650.yaml +1 −1
  353. Documentation/devicetree/bindings/net/microchip,lan95xx.yaml +2 −0
  354. Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml +5 −5
  355. Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml +4 −0
  356. Documentation/devicetree/bindings/net/qca,ar803x.yaml +19 −0
  357. Documentation/devicetree/bindings/net/qcom,bam-dmux.yaml +12 −0
  358. Documentation/devicetree/bindings/net/qcom,ipa.yaml +12 −0
  359. Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml +1 −1
  360. Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml +8 −1
  361. Documentation/devicetree/bindings/net/renesas,ether.yaml +1 −2
  362. Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml +20 −11
  363. Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml +1 −1
  364. Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml +1 −1
  365. Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml +7 −1
  366. Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +7 −1
  367. Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml +18 −0
  368. Documentation/devicetree/bindings/net/wireless/st,stlc4560.yaml +61 −0
  369. Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml +2 −0
  370. Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +32 −0
  371. Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml +7 −2
  372. Documentation/devicetree/bindings/pci/mediatek-pcie-mt7623.yaml +2 −2
  373. Documentation/devicetree/bindings/pci/mediatek-pcie.yaml +26 −0
  374. Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml +50 −0
  375. Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml +15 −8
  376. Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml +1 −1
  377. Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml +3 −0
  378. Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml +3 −2
  379. Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml +93 −0
  380. Documentation/devicetree/bindings/phy/axiado,ax3000-emmc-phy.yaml +37 −0
  381. Documentation/devicetree/bindings/phy/econet,en751221-pcie-phy.yaml +50 −0
  382. Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml +139 −0
  383. Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml +45 −3
  384. Documentation/devicetree/bindings/phy/nxp,tja1145.yaml +86 −0
  385. Documentation/devicetree/bindings/phy/qcom,dsi-phy-7nm.yaml +1 −0
  386. Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +1 −0
  387. Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml +4 −0
  388. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +17 −2
  389. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +1 −0
  390. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml +26 −20
  391. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml +4 −0
  392. Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml +1 −0
  393. Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml +40 −4
  394. Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml +4 −2
  395. Documentation/devicetree/bindings/phy/ti,ds125df111.yaml +46 −0
  396. Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml +14 −9
  397. Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml +12 −7
  398. Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml +4 −4
  399. Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml +1 −0
  400. Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml +188 −0
  401. Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc1-pinctrl.yaml +760 −0
  402. Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml +1 −0
  403. Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml +8 −0
  404. Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml +5 −0
  405. Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux-aon.yaml +5 −1
  406. Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux.yaml +5 −1
  407. Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-aon.yaml +102 −0
  408. Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-common.yaml +73 −0
  409. Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux.yaml +219 −0
  410. Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-aon.yaml +80 −0
  411. Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-common.yaml +84 −0
  412. Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml +167 −0
  413. Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-uphy.yaml +78 −0
  414. Documentation/devicetree/bindings/pinctrl/pinctrl-multiplexer.yaml +57 −0
  415. Documentation/devicetree/bindings/pinctrl/pinctrl.yaml +1 −1
  416. Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml +16 −10
  417. Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.yaml +0 −5
  418. Documentation/devicetree/bindings/pinctrl/qcom,ipq9650-tlmm.yaml +118 −0
  419. Documentation/devicetree/bindings/pinctrl/qcom,nord-tlmm.yaml +141 −0
  420. Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +3 −0
  421. Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml +0 −5
  422. Documentation/devicetree/bindings/pinctrl/qcom,shikra-tlmm.yaml +123 −0
  423. Documentation/devicetree/bindings/pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml +124 −0
  424. Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml +6 −0
  425. Documentation/devicetree/bindings/pinctrl/realtek,rtd1625-pinctrl.yaml +1 −1
  426. Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +35 −0
  427. Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml +130 −0
  428. Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +3 −1
  429. Documentation/devicetree/bindings/power/power-domain.yaml +34 −0
  430. Documentation/devicetree/bindings/power/qcom,rpmpd.yaml +2 −0
  431. Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml +1 −0
  432. Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml +38 −3
  433. Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml +51 −0
  434. Documentation/devicetree/bindings/pwm/st,stmpe-pwm.txt +0 −18
  435. Documentation/devicetree/bindings/regulator/mediatek,mt6311-regulator.yaml +70 −0
  436. Documentation/devicetree/bindings/regulator/mt6311-regulator.txt +0 −35
  437. Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml +13 −57
  438. Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml +4 −0
  439. Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +3 −0
  440. Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +8 −0
  441. Documentation/devicetree/bindings/regulator/sgmicro,sgm3804.yaml +77 −0
  442. Documentation/devicetree/bindings/regulator/sprd,sc2730-regulator.yaml +44 −0
  443. Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml +1 −6
  444. Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml +3 −0
  445. Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +6 −0
  446. Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml +7 −0
  447. Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml +6 −0
  448. Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml +6 −0
  449. Documentation/devicetree/bindings/remoteproc/qcom,rpm-proc.yaml +1 −0
  450. Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml +6 −0
  451. Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml +6 −0
  452. Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml +6 −0
  453. Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml +6 −0
  454. Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml +6 −0
  455. Documentation/devicetree/bindings/remoteproc/qcom,shikra-pas.yaml +167 −0
  456. Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml +4 −0
  457. Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml +6 −0
  458. Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml +0 −8
  459. Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml +0 −8
  460. Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml +5 −8
  461. Documentation/devicetree/bindings/reserved-memory/intel,wakeup-mailbox.yaml +49 −0
  462. Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml +2 −1
  463. Documentation/devicetree/bindings/riscv/spacemit.yaml +6 −0
  464. Documentation/devicetree/bindings/rng/mtk-rng.yaml +34 −9
  465. Documentation/devicetree/bindings/rtc/epson,rx6110.txt +0 −39
  466. Documentation/devicetree/bindings/rtc/epson,rx6110.yaml +68 −0
  467. Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml +1 −0
  468. Documentation/devicetree/bindings/rtc/st,m41t93.yaml +50 −0
  469. Documentation/devicetree/bindings/rtc/trivial-rtc.yaml +2 −0
  470. Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml +10 −3
  471. Documentation/devicetree/bindings/serial/rs485.txt +0 −1
  472. Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +1 −0
  473. Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-irqmux.yaml +5 −1
  474. Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +2 −0
  475. Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml +6 −0
  476. Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml +25 −6
  477. Documentation/devicetree/bindings/soc/renesas/renesas,r8a78000-mfis.yaml +221 −0
  478. Documentation/devicetree/bindings/soc/renesas/renesas.yaml +6 −0
  479. Documentation/devicetree/bindings/soc/sophgo/sophgo.yaml +4 −0
  480. Documentation/devicetree/bindings/soc/ti/ti,omap-dmm.yaml +53 −0
  481. Documentation/devicetree/bindings/sound/cdns,xtfpga-i2s.txt +0 −18
  482. Documentation/devicetree/bindings/sound/cdns,xtfpga-i2s.yaml +48 −0
  483. Documentation/devicetree/bindings/sound/cirrus,cs42xx8.yaml +23 −0
  484. Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml +2 −2
  485. Documentation/devicetree/bindings/sound/everest,es8389.yaml +4 −0
  486. Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml +4 −0
  487. Documentation/devicetree/bindings/sound/fsl,sai.yaml +7 −0
  488. Documentation/devicetree/bindings/sound/gpio-audio-amp.yaml +270 −0
  489. Documentation/devicetree/bindings/sound/imx-audio-card.yaml +6 −0
  490. Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml +23 −0
  491. Documentation/devicetree/bindings/sound/mediatek,mt2701-hdmi-audio.yaml +48 −0
  492. Documentation/devicetree/bindings/sound/mediatek,mt6351-sound.yaml +37 −0
  493. Documentation/devicetree/bindings/sound/mediatek,mt8173-rt5650-rt5514.yaml +2 −0
  494. Documentation/devicetree/bindings/sound/mediatek,mt8196-afe.yaml +113 −0
  495. Documentation/devicetree/bindings/sound/mediatek,mt8196-nau8825.yaml +100 −0
  496. Documentation/devicetree/bindings/sound/mt6351.txt +0 −16
  497. Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml +18 −0
  498. Documentation/devicetree/bindings/sound/realtek,rt5677.yaml +2 −2
  499. Documentation/devicetree/bindings/sound/renesas,fsi.yaml +55 −5
  500. Documentation/devicetree/bindings/sound/renesas,r9a09g047-sound.yaml +800 −0
  501. Documentation/devicetree/bindings/sound/rockchip-spdif.yaml +1 −1
  502. Documentation/devicetree/bindings/sound/samsung,tm2.yaml +6 −2
  503. Documentation/devicetree/bindings/sound/simple-card.yaml +3 −3
  504. Documentation/devicetree/bindings/sound/spacemit,k1-i2s.yaml +29 −2
  505. Documentation/devicetree/bindings/sound/ti,tas2781.yaml +5 −0
  506. Documentation/devicetree/bindings/sound/ti,tas67524.yaml +280 −0
  507. Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml +3 −0
  508. Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt +0 −58
  509. Documentation/devicetree/bindings/spi/nuvoton,npcm750-fiu.yaml +93 −0
  510. Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml +18 −3
  511. Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml +1 −0
  512. Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +9 −1
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  857. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts +23 −11
  858. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts +0 −20
  859. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-rainiera6.dts +1012 −0
  860. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-sanmiguel.dts +672 −0
  861. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite5.dts +5 −0
  862. arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts +15 −0
  863. arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +325 −227
  864. arch/arm/boot/dts/broadcom/bcm2711-rpi-4-b.dts +1 −1
  865. arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4-io.dts +1 −1
  866. arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts +4 −0
  867. arch/arm/boot/dts/broadcom/bcm4708-netgear-r6300-v2.dts +4 −0
  868. arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi +3 −3
  869. arch/arm/boot/dts/gemini/Makefile +2 −0
  870. arch/arm/boot/dts/gemini/gemini-nas4210b.dts +205 −0
  871. arch/arm/boot/dts/gemini/gemini-nas4220b.dts +1 −0
  872. arch/arm/boot/dts/gemini/gemini-rut1xx.dts +7 −11
  873. arch/arm/boot/dts/gemini/gemini-sl93512r.dts +1 −1
  874. arch/arm/boot/dts/gemini/gemini-sq201.dts +2 −2
  875. arch/arm/boot/dts/gemini/gemini-verbatim-s08v1901-d1.dts +225 −0
  876. arch/arm/boot/dts/gemini/gemini.dtsi +17 −0
  877. arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi +3 −3
  878. arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +1 −3
  879. arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +1 −3
  880. arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_nand.dts +2 −2
  881. arch/arm/boot/dts/mediatek/mt6589.dtsi +11 −0
  882. arch/arm/boot/dts/mediatek/mt7623.dtsi +32 −32
  883. arch/arm/boot/dts/mediatek/mt8135.dtsi +1 −1
  884. arch/arm/boot/dts/microchip/sam9x7.dtsi +3 −3
  885. arch/arm/boot/dts/microchip/sama7d65.dtsi +8 −0
  886. arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi +1439 −0
  887. arch/arm/boot/dts/nvidia/tegra114.dtsi +157 −0
  888. arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi +5 −0
  889. arch/arm/boot/dts/nvidia/tegra124-venice2.dts +5 −0
  890. arch/arm/boot/dts/nvidia/tegra20-asus-transformer-common.dtsi +19 −3
  891. arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi +128 −0
  892. arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-maxim-pmic.dtsi +2 −2
  893. arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-ti-pmic.dtsi +2 −2
  894. arch/arm/boot/dts/nvidia/tegra30-asus-tf600t.dts +59 −12
  895. arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi +156 −3
  896. arch/arm/boot/dts/nvidia/tegra30-lg-p880.dts +41 −0
  897. arch/arm/boot/dts/nvidia/tegra30-lg-p895.dts +46 −0
  898. arch/arm/boot/dts/nvidia/tegra30-lg-x3.dtsi +142 −15
  899. arch/arm/boot/dts/nxp/imx/Makefile +3 −0
  900. arch/arm/boot/dts/nxp/imx/imx25.dtsi +0 −1
  901. arch/arm/boot/dts/nxp/imx/imx35.dtsi +0 −1
  902. arch/arm/boot/dts/nxp/imx/imx51-babbage.dts +1 −0
  903. arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts +1 −1
  904. arch/arm/boot/dts/nxp/imx/imx53-cx9020.dts +1 −0
  905. arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts +10 −1
  906. arch/arm/boot/dts/nxp/imx/imx53-ppd.dts +2 −0
  907. arch/arm/boot/dts/nxp/imx/imx53-qsb-common.dtsi +10 −0
  908. arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4.dtsi +1 −0
  909. arch/arm/boot/dts/nxp/imx/imx53-sk-imx53.dts +7 −0
  910. arch/arm/boot/dts/nxp/imx/imx53-smd.dts +2 −0
  911. arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts +1 −1
  912. arch/arm/boot/dts/nxp/imx/imx6dl-gw52xx.dts +0 −2
  913. arch/arm/boot/dts/nxp/imx/imx6dl-gw53xx.dts +0 −2
  914. arch/arm/boot/dts/nxp/imx/imx6dl-gw54xx.dts +0 −2
  915. arch/arm/boot/dts/nxp/imx/imx6q-display5.dtsi +1 −1
  916. arch/arm/boot/dts/nxp/imx/imx6q-gw52xx.dts +0 −2
  917. arch/arm/boot/dts/nxp/imx/imx6q-gw53xx.dts +0 −2
  918. arch/arm/boot/dts/nxp/imx/imx6q-gw54xx.dts +0 −4
  919. arch/arm/boot/dts/nxp/imx/imx6q-novena.dts +1 −0
  920. arch/arm/boot/dts/nxp/imx/imx6q-utilite-pro.dts +5 −13
  921. arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dts +1 −1
  922. arch/arm/boot/dts/nxp/imx/imx6qdl-gw51xx.dtsi +0 −2
  923. arch/arm/boot/dts/nxp/imx/imx6qdl-gw551x.dtsi +0 −2
  924. arch/arm/boot/dts/nxp/imx/imx6qdl-gw553x.dtsi +0 −2
  925. arch/arm/boot/dts/nxp/imx/imx6qdl-nit6xlite.dtsi +1 −1
  926. arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi +1 −1
  927. arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_som2.dtsi +1 −1
  928. arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6x.dtsi +1 −1
  929. arch/arm/boot/dts/nxp/imx/imx6qdl-pico.dtsi +1 −1
  930. arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi +0 −2
  931. arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi +5 −0
  932. arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi +2 −3
  933. arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +11 −0
  934. arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts +5 −0
  935. arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi +5 −0
  936. arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +11 −0
  937. arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +1 −0
  938. arch/arm/boot/dts/nxp/imx/imx6ul-pico-hobbit.dts +1 −1
  939. arch/arm/boot/dts/nxp/imx/imx6ul-pico-pi.dts +1 −1
  940. arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi +1 −1
  941. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-audio.dtsi +30 −0
  942. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-common.dtsi +187 −0
  943. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-common.dtsi +215 −0
  944. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto-full.dts +22 −0
  945. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-concerto.dts +10 −308
  946. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-enet1.dtsi +44 −0
  947. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-enet2.dtsi +79 −0
  948. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-lvds-panel.dtsi +112 −0
  949. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-sd.dtsi +27 −0
  950. arch/arm/boot/dts/nxp/imx/imx6ul-var-som-wifi.dtsi +75 −0
  951. arch/arm/boot/dts/nxp/imx/imx6ul-var-som.dtsi +10 −205
  952. arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +1 −0
  953. arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto-full.dts +22 −0
  954. arch/arm/boot/dts/nxp/imx/imx6ull-var-som-concerto.dts +21 −0
  955. arch/arm/boot/dts/nxp/imx/imx6ull-var-som.dtsi +36 −0
  956. arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +10 −0
  957. arch/arm/boot/dts/nxp/imx/imx7d-pico-dwarf.dts +1 −1
  958. arch/arm/boot/dts/nxp/imx/imx7d-pico-pi.dts +67 −1
  959. arch/arm/boot/dts/nxp/imx/imx7d-sdb.dts +5 −0
  960. arch/arm/boot/dts/nxp/imx/imx7d.dtsi +11 −0
  961. arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi +12 −0
  962. arch/arm/boot/dts/renesas/r7s72100-genmai.dts +0 −3
  963. arch/arm/boot/dts/renesas/r7s72100-rskrza1.dts +0 −2
  964. arch/arm/boot/dts/renesas/r7s72100.dtsi +1 −1
  965. arch/arm/boot/dts/renesas/r8a73a4.dtsi +111 −3
  966. arch/arm/boot/dts/renesas/r8a7740.dtsi +112 −4
  967. arch/arm/boot/dts/renesas/r8a7778.dtsi +1 −1
  968. arch/arm/boot/dts/renesas/r8a7779.dtsi +1 −1
  969. arch/arm/boot/dts/renesas/r8a7792.dtsi +1 −1
  970. arch/arm/boot/dts/rockchip/rk3288-veyron-analog-audio.dtsi +0 −2
  971. arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi +5 −0
  972. arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts +4 −0
  973. arch/arm/boot/dts/st/stm32mp135f-dk.dts +24 −4
  974. arch/arm/boot/dts/st/stm32mp151c-mecio1r0.dts +128 −0
  975. arch/arm/boot/dts/st/stm32mp153c-mecio1r1.dts +144 −0
  976. arch/arm/boot/dts/st/stm32mp15x-mecio1-io.dtsi +16 −130
  977. arch/arm/boot/dts/ti/omap/am335x-sl50.dts +2 −2
  978. arch/arm/boot/dts/ti/omap/dm8168-evm.dts +4 −0
  979. arch/arm/boot/dts/ti/omap/motorola-cpcap-mapphone.dtsi +5 −1
  980. arch/arm/boot/dts/ti/omap/omap2.dtsi +4 −0
  981. arch/arm/boot/dts/ti/omap/omap2420-n8x0-common.dtsi +12 −0
  982. arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts +2 −2
  983. arch/arm/boot/dts/zte/Makefile +3 −0
  984. arch/arm/boot/dts/zte/zx297520v3-dlink-dwr932m.dts +22 −0
  985. arch/arm/boot/dts/zte/zx297520v3.dtsi +103 −0
  986. arch/arm/common/sa1111.c +1 −1
  987. arch/arm/configs/am200epdkit_defconfig +0 −1
  988. arch/arm/configs/at91_dt_defconfig +0 −1
  989. arch/arm/configs/axm55xx_defconfig +0 −1
  990. arch/arm/configs/dove_defconfig +0 −2
  991. arch/arm/configs/ep93xx_defconfig +0 −1
  992. arch/arm/configs/exynos_defconfig +0 −1
  993. arch/arm/configs/hisi_defconfig +0 −1
  994. arch/arm/configs/ixp4xx_defconfig +0 −1
  995. arch/arm/configs/mmp2_defconfig +0 −1
  996. arch/arm/configs/multi_v5_defconfig +0 −2
  997. arch/arm/configs/multi_v7_defconfig +46 −61
  998. arch/arm/configs/mv78xx0_defconfig +0 −2
  999. arch/arm/configs/mvebu_v5_defconfig +0 −2
  1000. arch/arm/configs/omap1_defconfig +0 −1
  1001. arch/arm/configs/orion5x_defconfig +0 −1
  1002. arch/arm/configs/pxa_defconfig +0 −7
  1003. arch/arm/configs/qcom_defconfig +0 −15
  1004. arch/arm/configs/sama5_defconfig +0 −1
  1005. arch/arm/configs/sama7_defconfig +2 −1
  1006. arch/arm/configs/socfpga_defconfig +0 −1
  1007. arch/arm/configs/spear13xx_defconfig +0 −1
  1008. arch/arm/configs/spear3xx_defconfig +0 −1
  1009. arch/arm/configs/spear6xx_defconfig +0 −1
  1010. arch/arm/configs/spitz_defconfig +0 −3
  1011. arch/arm/configs/sunxi_defconfig +0 −1
  1012. arch/arm/configs/wpcm450_defconfig +0 −1
  1013. arch/arm/include/asm/Kbuild +1 −0
  1014. arch/arm/include/asm/arch_gicv3.h +2 −2
  1015. arch/arm/include/asm/io.h +13 −2
  1016. arch/arm/include/asm/mach/irq.h +0 −10
  1017. arch/arm/include/asm/module.lds.h +2 −2
  1018. arch/arm/include/asm/neon-intrinsics.h +60 −0
  1019. arch/arm/include/asm/uaccess.h +1 −2
  1020. arch/arm/include/uapi/asm/fcntl.h +4 −4
  1021. arch/arm/kernel/entry-armv.S +1 −1
  1022. arch/arm/kernel/hibernate.c +10 −0
  1023. arch/arm/kernel/smp.c +1 −2
  1024. arch/arm/mach-footbridge/isa-irq.c +1 −1
  1025. arch/arm/mach-highbank/highbank.c +1 −1
  1026. arch/arm/mach-imx/cpu-imx31.c +7 −2
  1027. arch/arm/mach-imx/mm-imx3.c +2 −0
  1028. arch/arm/mach-mv78xx0/Kconfig +1 −0
  1029. arch/arm/mach-mvebu/coherency.c +3 −8
  1030. arch/arm/mach-omap1/board-nokia770.c +5 −28
  1031. arch/arm/mach-omap1/common.h +3 −0
  1032. arch/arm/mach-omap1/gpio16xx.c +40 −40
  1033. arch/arm/mach-omap2/board-generic.c +0 −1
  1034. arch/arm/mach-omap2/board-n8x0.c +0 −18
  1035. arch/arm/mach-omap2/omap_device.c +10 −19
  1036. arch/arm/mach-omap2/omap_device.h +2 −2
  1037. arch/arm/mach-orion5x/Kconfig +1 −0
  1038. arch/arm/mach-orion5x/board-mss2.c +2 −2
  1039. arch/arm/mach-pxa/Kconfig +1 −0
  1040. arch/arm/mach-pxa/devices.c +0 −7
  1041. arch/arm/mach-pxa/gumstix.c +0 −1
  1042. arch/arm/mach-pxa/pxa25x.c +3 −0
  1043. arch/arm/mach-pxa/pxa27x.c +11 −1
  1044. arch/arm/mach-pxa/spitz.c +8 −3
  1045. arch/arm/mach-pxa/udc.h +0 −8
  1046. arch/arm/mach-rockchip/platsmp.c +10 −6
  1047. arch/arm/mach-s3c/Kconfig.s3c64xx +1 −0
  1048. arch/arm/mach-s3c/mach-crag6410.c +16 −8
  1049. arch/arm/mach-sa1100/Kconfig +1 −0
  1050. arch/arm/mach-socfpga/platsmp.c +1 −0
  1051. arch/arm/mach-versatile/integrator_cp.c +4 −9
  1052. arch/arm/mach-zte/Kconfig +29 −0
  1053. arch/arm/mach-zte/Makefile +2 −0
  1054. arch/arm/mach-zte/zx297520v3.c +16 −0
  1055. arch/arm/mm/Kconfig +0 −1
  1056. arch/arm/mm/dma-mapping-nommu.c +2 −2
  1057. arch/arm/mm/dma-mapping.c +14 −14
  1058. arch/arm/mm/idmap.c +12 −0
  1059. arch/arm64/Kconfig +64 −2
  1060. arch/arm64/Kconfig.platforms +6 −1
  1061. arch/arm64/Makefile +3 −0
  1062. arch/arm64/boot/dts/Makefile +1 −0
  1063. arch/arm64/boot/dts/allwinner/Makefile +6 −0
  1064. arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +37 −1
  1065. arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +17 −2
  1066. arch/arm64/boot/dts/amlogic/Makefile +1 −0
  1067. arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts +40 −0
  1068. arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi +128 −0
  1069. arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts +215 −0
  1070. arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi +482 −0
  1071. arch/arm64/boot/dts/amlogic/meson-gxl-s905d-phicomm-n1.dts +15 −0
  1072. arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dts +81 −0
  1073. arch/arm64/boot/dts/amlogic/meson-s4.dtsi +45 −0
  1074. arch/arm64/boot/dts/apple/Makefile +5 −0
  1075. arch/arm64/boot/dts/apple/t8122-j433.dts +19 −0
  1076. arch/arm64/boot/dts/apple/t8122-j434.dts +19 −0
  1077. arch/arm64/boot/dts/apple/t8122-j504.dts +37 −0
  1078. arch/arm64/boot/dts/apple/t8122-j613.dts +35 −0
  1079. arch/arm64/boot/dts/apple/t8122-j615.dts +35 −0
  1080. arch/arm64/boot/dts/apple/t8122-jxxx.dtsi +48 −0
  1081. arch/arm64/boot/dts/apple/t8122-pmgr.dtsi +1149 −0
  1082. arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi +32 −0
  1083. arch/arm64/boot/dts/apple/t8122.dtsi +444 −0
  1084. arch/arm64/boot/dts/aspeed/Makefile +4 −0
  1085. arch/arm64/boot/dts/aspeed/aspeed-evb-flash-layout-128.dtsi +32 −0
  1086. arch/arm64/boot/dts/aspeed/aspeed-g7-a35.dtsi +194 −0
  1087. arch/arm64/boot/dts/aspeed/aspeed-g7-soc0-pinctrl.dtsi +225 −0
  1088. arch/arm64/boot/dts/aspeed/aspeed-g7-soc0.dtsi +230 −0
  1089. arch/arm64/boot/dts/aspeed/aspeed-g7-soc1-pinctrl.dtsi +1011 −0
  1090. arch/arm64/boot/dts/aspeed/aspeed-g7-soc1.dtsi +557 −0
  1091. arch/arm64/boot/dts/aspeed/ast2700-evb.dts +65 −0
  1092. arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts +19 −0
  1093. arch/arm64/boot/dts/bst/bstc1200.dtsi +18 −0
  1094. arch/arm64/boot/dts/cix/sky1-power.h +13 −0
  1095. arch/arm64/boot/dts/cix/sky1.dtsi +70 −0
  1096. arch/arm64/boot/dts/exynos/axis/artpec9.dtsi +2 −1
  1097. arch/arm64/boot/dts/exynos/exynos2200.dtsi +2 −1
  1098. arch/arm64/boot/dts/exynos/exynos850.dtsi +7 −0
  1099. arch/arm64/boot/dts/exynos/exynos990.dtsi +2 −1
  1100. arch/arm64/boot/dts/exynos/exynosautov9.dtsi +2 −1
  1101. arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts +8 −0
  1102. arch/arm64/boot/dts/exynos/exynosautov920.dtsi +27 −0
  1103. arch/arm64/boot/dts/exynos/google/gs101.dtsi +2 −1
  1104. arch/arm64/boot/dts/freescale/Makefile +155 −8
  1105. arch/arm64/boot/dts/freescale/fsl-ls1028a-tqmls1028a-mbls1028a.dtsi +2 −2
  1106. arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi +29 −12
  1107. arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts +2 −0
  1108. arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi +4 −3
  1109. arch/arm64/boot/dts/freescale/fsl-lx2160a-half-twins.dts +830 −0
  1110. arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts +2 −0
  1111. arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi +36 −12
  1112. arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +12 −12
  1113. arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts +15 −22
  1114. arch/arm64/boot/dts/freescale/imx-m2-pcie.dtso +15 −0
  1115. arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi +11 −0
  1116. arch/arm64/boot/dts/freescale/imx8dxl-evk.dts +5 −2
  1117. arch/arm64/boot/dts/freescale/imx8dxl-hummingboard-telematics.dts +560 −0
  1118. arch/arm64/boot/dts/freescale/imx8dxl-sr-som.dtsi +458 −0
  1119. arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +5 −0
  1120. arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts +3 −7
  1121. arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi +3 −4
  1122. arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-zinnia.dts +21 −0
  1123. arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-zinnia.dts +21 −0
  1124. arch/arm64/boot/dts/freescale/imx8mm-verdin-zinnia.dtsi +383 −0
  1125. arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +12 −4
  1126. arch/arm64/boot/dts/freescale/imx8mm.dtsi +11 −0
  1127. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1.dts +1 −1
  1128. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v2.dts +1 −1
  1129. arch/arm64/boot/dts/freescale/imx8mp-ab2.dts +1 −1
  1130. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi +37 −0
  1131. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-clock.dtsi +33 −0
  1132. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-common.dtsi +31 −0
  1133. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-dpi.dtsi +35 −0
  1134. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi +53 −0
  1135. arch/arm64/boot/dts/freescale/imx8mp-dhcom-overlay-panel-lvds.dtsi +22 −0
  1136. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk-overlay-eth2xfast.dtso +10 −0
  1137. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso +40 −0
  1138. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x21.dtso +32 −0
  1139. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-531-100-x22.dtso +32 −0
  1140. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2-overlay-560-300-x12.dtso +25 −0
  1141. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts +1 −1
  1142. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtso +53 −0
  1143. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x40.dtso +32 −0
  1144. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-531-100-x41.dtso +32 −0
  1145. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-560-300-x36.dtso +24 −0
  1146. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-732-100-x36.dtso +36 −0
  1147. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtso +56 −0
  1148. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtso +32 −0
  1149. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtso +32 −0
  1150. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi +64 −0
  1151. arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts +1 −1
  1152. arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso +77 −0
  1153. arch/arm64/boot/dts/freescale/imx8mp-dhcom-picoitx.dts +3 −0
  1154. arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth1xfast.dtso +85 −0
  1155. arch/arm64/boot/dts/freescale/imx8mp-dhcom-som-overlay-eth2xfast.dtso +29 −0
  1156. arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +2 −2
  1157. arch/arm64/boot/dts/freescale/imx8mp-evk.dts +7 −2
  1158. arch/arm64/boot/dts/freescale/imx8mp-kontron-bl-osm-s.dts +11 −3
  1159. arch/arm64/boot/dts/freescale/imx8mp-kontron-osm-s.dtsi +3 −4
  1160. arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +62 −0
  1161. arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +3 −0
  1162. arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso +24 −0
  1163. arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso +18 −1
  1164. arch/arm64/boot/dts/freescale/imx8mp-verdin-nonwifi-zinnia.dts +21 −0
  1165. arch/arm64/boot/dts/freescale/imx8mp-verdin-wifi-zinnia.dts +21 −0
  1166. arch/arm64/boot/dts/freescale/imx8mp-verdin-zinnia.dtsi +422 −0
  1167. arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +11 −3
  1168. arch/arm64/boot/dts/freescale/imx8mp.dtsi +11 −0
  1169. arch/arm64/boot/dts/freescale/imx8mq-evk.dts +10 −0
  1170. arch/arm64/boot/dts/freescale/imx8mq.dtsi +22 −0
  1171. arch/arm64/boot/dts/freescale/imx8qm-mek.dts +10 −0
  1172. arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi +22 −0
  1173. arch/arm64/boot/dts/freescale/imx8qm-tqma8qm-mba8x.dts +871 −0
  1174. arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi +325 −0
  1175. arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +5 −1
  1176. arch/arm64/boot/dts/freescale/imx8ulp-evk.dts +2 −2
  1177. arch/arm64/boot/dts/freescale/imx8ulp.dtsi +67 −0
  1178. arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +2 −2
  1179. arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts +14 −1
  1180. arch/arm64/boot/dts/freescale/imx91-93-phyboard-segin-peb-av-18.dtsi +93 −0
  1181. arch/arm64/boot/dts/freescale/imx91-9x9-qsb.dts +435 −0
  1182. arch/arm64/boot/dts/freescale/imx91-phyboard-segin-peb-av-18.dtso +57 −0
  1183. arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts +21 −3
  1184. arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi +32 −7
  1185. arch/arm64/boot/dts/freescale/imx91-var-dart-sonata.dts +9 −0
  1186. arch/arm64/boot/dts/freescale/imx91-var-som-symphony.dts +527 −0
  1187. arch/arm64/boot/dts/freescale/imx91-var-som.dtsi +456 −0
  1188. arch/arm64/boot/dts/freescale/imx91_93_common.dtsi +3 −0
  1189. arch/arm64/boot/dts/freescale/imx93-11x11-evk-common.dtsi +0 −1
  1190. arch/arm64/boot/dts/freescale/imx93-9x9-qsb-ontat-kd50g21-40nt-a1.dtsi +110 −0
  1191. arch/arm64/boot/dts/freescale/imx93-9x9-qsb-ontat-kd50g21-40nt-a1.dtso +1 −105
  1192. arch/arm64/boot/dts/freescale/imx93-9x9-qsb-tianma-tm050rdh03.dtso +14 −0
  1193. arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts +0 −1
  1194. arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts +35 −4
  1195. arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-av-18.dtso +57 −0
  1196. arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts +21 −3
  1197. arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi +32 −7
  1198. arch/arm64/boot/dts/freescale/imx93-var-dart-sonata.dts +654 −0
  1199. arch/arm64/boot/dts/freescale/imx93-var-dart.dtsi +461 −0
  1200. arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +61 −0
  1201. arch/arm64/boot/dts/freescale/imx94.dtsi +101 −1
  1202. arch/arm64/boot/dts/freescale/imx943-evk-sdwifi.dtso +15 −0
  1203. arch/arm64/boot/dts/freescale/imx943-evk.dts +84 −1
  1204. arch/arm64/boot/dts/freescale/imx943.dtsi +75 −0
  1205. arch/arm64/boot/dts/freescale/imx95-15x15-ab2.dts +669 −0
  1206. arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts +7 −2
  1207. arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +11 −1
  1208. arch/arm64/boot/dts/freescale/imx95-19x19-frdm-pro.dts +1021 −0
  1209. arch/arm64/boot/dts/freescale/imx95-aquila-clover.dts +285 −0
  1210. arch/arm64/boot/dts/freescale/imx95-aquila-dev.dts +389 −0
  1211. arch/arm64/boot/dts/freescale/imx95-aquila.dtsi +1160 −0
  1212. arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts +5 −0
  1213. arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi +45 −1
  1214. arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts +28 −1
  1215. arch/arm64/boot/dts/freescale/imx95-verdin-ivy.dtsi +0 −1
  1216. arch/arm64/boot/dts/freescale/imx95-verdin-nonwifi-zinnia.dts +21 −0
  1217. arch/arm64/boot/dts/freescale/imx95-verdin-wifi-zinnia.dts +21 −0
  1218. arch/arm64/boot/dts/freescale/imx95-verdin-zinnia.dtsi +429 −0
  1219. arch/arm64/boot/dts/freescale/imx95-verdin.dtsi +13 −5
  1220. arch/arm64/boot/dts/freescale/imx95.dtsi +124 −5
  1221. arch/arm64/boot/dts/freescale/imx952.dtsi +47 −0
  1222. arch/arm64/boot/dts/freescale/s32g2.dtsi +65 −1
  1223. arch/arm64/boot/dts/freescale/s32g3.dtsi +68 −2
  1224. arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi +77 −1
  1225. arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +7 −10
  1226. arch/arm64/boot/dts/intel/Makefile +1 −0
  1227. arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts +2 −0
  1228. arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +2 −2
  1229. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts +3 −1
  1230. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts +3 −1
  1231. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts +3 −1
  1232. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts +3 −1
  1233. arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts +103 −0
  1234. arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts +7 −4
  1235. arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi +4 −1
  1236. arch/arm64/boot/dts/mediatek/Makefile +8 −0
  1237. arch/arm64/boot/dts/mediatek/mt6359.dtsi +4 −18
  1238. arch/arm64/boot/dts/mediatek/mt6365.dtsi +26 −0
  1239. arch/arm64/boot/dts/mediatek/mt7981b-xiaomi-ax3000t.dts +36 −0
  1240. arch/arm64/boot/dts/mediatek/mt7981b.dtsi +15 −0
  1241. arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro-cn13.dtso +20 −0
  1242. arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro-cn14.dtso +20 −0
  1243. arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro.dtsi +3 −12
  1244. arch/arm64/boot/dts/mediatek/mt8186-corsola-voltorb.dtsi +4 −0
  1245. arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi +41 −0
  1246. arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +76 −6
  1247. arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +97 −57
  1248. arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts +7 −0
  1249. arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi +74 −6
  1250. arch/arm64/boot/dts/mediatek/mt8390-grinn-genio-som.dtsi +1 −1
  1251. arch/arm64/boot/dts/mediatek/mt8390-tungsten-smarc.dtsi +119 −3
  1252. arch/arm64/boot/dts/mediatek/mt8395-genio-common.dtsi +38 −8
  1253. arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l-8-hd-panel.dtso +2 −2
  1254. arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +4 −4
  1255. arch/arm64/boot/dts/microchip/lan9691.dtsi +5 −0
  1256. arch/arm64/boot/dts/nuvoton/ma35d1-iot-512m.dts +25 −0
  1257. arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts +24 −0
  1258. arch/arm64/boot/dts/nuvoton/ma35d1.dtsi +52 −0
  1259. arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +5 −0
  1260. arch/arm64/boot/dts/nvidia/tegra194.dtsi +15 −2
  1261. arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +7 −0
  1262. arch/arm64/boot/dts/nvidia/tegra234.dtsi +20 −4
  1263. arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834-0008.dts +12 −0
  1264. arch/arm64/boot/dts/nvidia/tegra264.dtsi +44 −44
  1265. arch/arm64/boot/dts/qcom/Makefile +8 −0
  1266. arch/arm64/boot/dts/qcom/agatti.dtsi +63 −0
  1267. arch/arm64/boot/dts/qcom/eliza-mtp.dts +154 −2
  1268. arch/arm64/boot/dts/qcom/eliza.dtsi +2497 −210
  1269. arch/arm64/boot/dts/qcom/glymur-crd.dts +0 −4
  1270. arch/arm64/boot/dts/qcom/glymur-crd.dtsi +32 −1
  1271. arch/arm64/boot/dts/qcom/glymur.dtsi +1673 −191
  1272. arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts +21 −0
  1273. arch/arm64/boot/dts/qcom/hamoa.dtsi +12 −65
  1274. arch/arm64/boot/dts/qcom/ipq5210.dtsi +7 −0
  1275. arch/arm64/boot/dts/qcom/ipq5424.dtsi +2 −2
  1276. arch/arm64/boot/dts/qcom/ipq9650-rdp488.dts +79 −0
  1277. arch/arm64/boot/dts/qcom/ipq9650.dtsi +384 −0
  1278. arch/arm64/boot/dts/qcom/kaanapali-mtp.dts +27 −0
  1279. arch/arm64/boot/dts/qcom/kaanapali-qrd.dts +27 −0
  1280. arch/arm64/boot/dts/qcom/kaanapali.dtsi +164 −6
  1281. arch/arm64/boot/dts/qcom/kodiak.dtsi +12 −5
  1282. arch/arm64/boot/dts/qcom/lemans-evk-ifp-mezzanine.dtso +74 −0
  1283. arch/arm64/boot/dts/qcom/lemans-evk.dts +7 −0
  1284. arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi +110 −0
  1285. arch/arm64/boot/dts/qcom/lemans.dtsi +622 −379
  1286. arch/arm64/boot/dts/qcom/mahua.dtsi +1 −0
  1287. arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts +30 −1
  1288. arch/arm64/boot/dts/qcom/milos-nothing-asteroids.dts +964 −0
  1289. arch/arm64/boot/dts/qcom/milos.dtsi +50 −2
  1290. arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts +11 −0
  1291. arch/arm64/boot/dts/qcom/monaco.dtsi +35 −2
  1292. arch/arm64/boot/dts/qcom/msm8998.dtsi +4 −4
  1293. arch/arm64/boot/dts/qcom/pm4125.dtsi +0 −1
  1294. arch/arm64/boot/dts/qcom/pm7250b.dtsi +0 −1
  1295. arch/arm64/boot/dts/qcom/pm7550ba-eliza.dtsi +70 −0
  1296. arch/arm64/boot/dts/qcom/pm8150b.dtsi +0 −1
  1297. arch/arm64/boot/dts/qcom/pmh0104-glymur.dtsi +1 −1
  1298. arch/arm64/boot/dts/qcom/pmi632.dtsi +0 −1
  1299. arch/arm64/boot/dts/qcom/qcs615-ride.dts +13 −1
  1300. arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +31 −0
  1301. arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +2 −0
  1302. arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +2 −0
  1303. arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +2 −0
  1304. arch/arm64/boot/dts/qcom/sar2130p.dtsi +1 −1
  1305. arch/arm64/boot/dts/qcom/sc7180.dtsi +11 −4
  1306. arch/arm64/boot/dts/qcom/sc7280-qcard.dtsi +1 −1
  1307. arch/arm64/boot/dts/qcom/sc8180x.dtsi +2 −2
  1308. arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +1 −1
  1309. arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts +1 −1
  1310. arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +1 −1
  1311. arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts +1 −1
  1312. arch/arm64/boot/dts/qcom/sc8280xp.dtsi +28 −21
  1313. arch/arm64/boot/dts/qcom/sdm630.dtsi +17 −11
  1314. arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts +2 −0
  1315. arch/arm64/boot/dts/qcom/sdm660.dtsi +18 −18
  1316. arch/arm64/boot/dts/qcom/sdm670-google-bonito-tianma.dts +32 −0
  1317. arch/arm64/boot/dts/qcom/sdm670-google-common.dtsi +712 −0
  1318. arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts +13 −601
  1319. arch/arm64/boot/dts/qcom/sdm670.dtsi +104 −15
  1320. arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso +5 −0
  1321. arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi +31 −0
  1322. arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi +19 −3
  1323. arch/arm64/boot/dts/qcom/sdm845-lg-judyln.dts +2 −2
  1324. arch/arm64/boot/dts/qcom/sdm845-lg-judyp.dts +2 −2
  1325. arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +78 −1
  1326. arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts +4 −3
  1327. arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts +112 −15
  1328. arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +18 −1
  1329. arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-ebbg.dts +1 −1
  1330. arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-tianma.dts +1 −1
  1331. arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +2 −0
  1332. arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts +94 −0
  1333. arch/arm64/boot/dts/qcom/sm6350.dtsi +66 −0
  1334. arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +2 −0
  1335. arch/arm64/boot/dts/qcom/sm7325-motorola-dubai.dts +1456 −0
  1336. arch/arm64/boot/dts/qcom/sm8150-hdk.dts +2 −0
  1337. arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi +2 −0
  1338. arch/arm64/boot/dts/qcom/sm8450-hdk.dts +1 −1
  1339. arch/arm64/boot/dts/qcom/sm8450.dtsi +7 −3
  1340. arch/arm64/boot/dts/qcom/sm8550.dtsi +373 −2
  1341. arch/arm64/boot/dts/qcom/sm8650.dtsi +6 −2
  1342. arch/arm64/boot/dts/qcom/sm8750.dtsi +56 −7
  1343. arch/arm64/boot/dts/qcom/talos-evk.dts +56 −0
  1344. arch/arm64/boot/dts/qcom/talos.dtsi +134 −0
  1345. arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi +1 −6
  1346. arch/arm64/boot/dts/qcom/x1-hp-omnibook-x14.dtsi +1 −1
  1347. arch/arm64/boot/dts/qcom/x1p42100-asus-zenbook-a14.dtsi +1 −1
  1348. arch/arm64/boot/dts/realtek/kent.dtsi +20 −0
  1349. arch/arm64/boot/dts/renesas/Makefile +1 −0
  1350. arch/arm64/boot/dts/renesas/condor-common.dtsi +2 −0
  1351. arch/arm64/boot/dts/renesas/draak-ebisu-panel-aa104xd12.dtso +1 −27
  1352. arch/arm64/boot/dts/renesas/draak.dtsi +3 −1
  1353. arch/arm64/boot/dts/renesas/ebisu.dtsi +20 −18
  1354. arch/arm64/boot/dts/renesas/gray-hawk-single.dtsi +7 −5
  1355. arch/arm64/boot/dts/renesas/hihope-rev4.dtsi +1 −1
  1356. arch/arm64/boot/dts/renesas/panel-aa104xd12.dtsi +45 −19
  1357. arch/arm64/boot/dts/renesas/r8a77960-salvator-x.dts +4 −0
  1358. arch/arm64/boot/dts/renesas/r8a77960-salvator-xs.dts +4 −0
  1359. arch/arm64/boot/dts/renesas/r8a77960-ulcb.dts +4 −0
  1360. arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts +4 −0
  1361. arch/arm64/boot/dts/renesas/r8a77961-ulcb.dts +4 −0
  1362. arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +2 −0
  1363. arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts +2 −0
  1364. arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts +2 −0
  1365. arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts +2 −0
  1366. arch/arm64/boot/dts/renesas/r8a779md-geist.dts +720 −0
  1367. arch/arm64/boot/dts/renesas/r8a779md.dtsi +59 −0
  1368. arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts +62 −3
  1369. arch/arm64/boot/dts/renesas/r8a78000.dtsi +169 −9
  1370. arch/arm64/boot/dts/renesas/r9a07g043.dtsi +5 −3
  1371. arch/arm64/boot/dts/renesas/r9a07g044.dtsi +15 −3
  1372. arch/arm64/boot/dts/renesas/r9a07g054.dtsi +5 −3
  1373. arch/arm64/boot/dts/renesas/r9a08g045.dtsi +1 −0
  1374. arch/arm64/boot/dts/renesas/r9a08g046.dtsi +784 −2
  1375. arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts +134 −6
  1376. arch/arm64/boot/dts/renesas/r9a09g047.dtsi +53 −0
  1377. arch/arm64/boot/dts/renesas/r9a09g056.dtsi +71 −0
  1378. arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts +24 −0
  1379. arch/arm64/boot/dts/renesas/r9a09g057.dtsi +3 −0
  1380. arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts +1 −0
  1381. arch/arm64/boot/dts/renesas/r9a09g077.dtsi +108 −0
  1382. arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +15 −0
  1383. arch/arm64/boot/dts/renesas/r9a09g087.dtsi +108 −0
  1384. arch/arm64/boot/dts/renesas/rz-smarc-cru-csi-ov5645.dtsi +5 −0
  1385. arch/arm64/boot/dts/renesas/rz-smarc-du-adv7513.dtsi +3 −7
  1386. arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +24 −25
  1387. arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi +204 −0
  1388. arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +263 −11
  1389. arch/arm64/boot/dts/renesas/salvator-common.dtsi +16 −14
  1390. arch/arm64/boot/dts/renesas/salvator-panel-aa104xd12.dtso +1 −27
  1391. arch/arm64/boot/dts/renesas/ulcb.dtsi +3 −1
  1392. arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi +2 −0
  1393. arch/arm64/boot/dts/rockchip/Makefile +7 −0
  1394. arch/arm64/boot/dts/rockchip/px30-cobra.dtsi +1 −1
  1395. arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +1 −1
  1396. arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +5 −0
  1397. arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-enterprise.dts +1 −1
  1398. arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi +68 −0
  1399. arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +1 −1
  1400. arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts +25 −0
  1401. arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts +29 −0
  1402. arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts +60 −0
  1403. arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi +17 −0
  1404. arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts +11 −0
  1405. arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts +12 −0
  1406. arch/arm64/boot/dts/rockchip/rk3528.dtsi +88 −0
  1407. arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts +1 −1
  1408. arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts +3 −3
  1409. arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts +14 −0
  1410. arch/arm64/boot/dts/rockchip/rk3568-rock-3b.dts +17 −3
  1411. arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +2 −1
  1412. arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts +10 −0
  1413. arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +10 −0
  1414. arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts +9 −0
  1415. arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts +9 −0
  1416. arch/arm64/boot/dts/rockchip/rk3576-khadas-edge-2l.dts +620 −0
  1417. arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi +4 −18
  1418. arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +9 −0
  1419. arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts +3 −13
  1420. arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts +10 −0
  1421. arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts +10 −0
  1422. arch/arm64/boot/dts/rockchip/rk3576.dtsi +3 −3
  1423. arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts +11 −0
  1424. arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts +19 −0
  1425. arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +204 −6
  1426. arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts +17 −1
  1427. arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +11 −1
  1428. arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi +4 −0
  1429. arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi +1 −0
  1430. arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +20 −0
  1431. arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +11 −0
  1432. arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi +1 −0
  1433. arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi +1 −0
  1434. arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi +1 −0
  1435. arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts +12 −0
  1436. arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts +18 −0
  1437. arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts +11 −0
  1438. arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts +17 −7
  1439. arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts +12 −0
  1440. arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +21 −0
  1441. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts +16 −2
  1442. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts +20 −0
  1443. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts +9 −2
  1444. arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi +1 −0
  1445. arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts +19 −0
  1446. arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts +45 −2
  1447. arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi +18 −1
  1448. arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso +99 −0
  1449. arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso +99 −0
  1450. arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts +3 −1
  1451. arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi +18 −2
  1452. arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts +1 −0
  1453. arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +2 −0
  1454. arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts +16 −0
  1455. arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts +1 −0
  1456. arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts +10 −5
  1457. arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts +12 −1
  1458. arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +11 −4
  1459. arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +11 −0
  1460. arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts +10 −0
  1461. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi +11 −0
  1462. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts +8 −4
  1463. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi +3 −0
  1464. arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts +10 −0
  1465. arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts +14 −3
  1466. arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +11 −2
  1467. arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +11 −2
  1468. arch/arm64/boot/dts/st/stm32mp251.dtsi +4 −4
  1469. arch/arm64/boot/dts/ti/Makefile +67 −0
  1470. arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +1 −0
  1471. arch/arm64/boot/dts/ti/k3-am62-phyboard-lyra-oldi-lcd185.dtso +185 −0
  1472. arch/arm64/boot/dts/ti/k3-am625-tqma62xx-mba62xx.dts +1033 −0
  1473. arch/arm64/boot/dts/ti/k3-am625-tqma62xx.dtsi +360 −0
  1474. arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-can.dtso +28 −0
  1475. arch/arm64/boot/dts/ti/k3-am625-verdin-dev-mezzanine-panel-cap-touch-10inch-lvds.dtso +98 −0
  1476. arch/arm64/boot/dts/ti/k3-am625-verdin-dev-nau8822-btl.dtso +14 −0
  1477. arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-hdmi.dtso +94 −0
  1478. arch/arm64/boot/dts/ti/k3-am625-verdin-dsi-to-lvds-panel-cap-touch-10inch.dtso +124 −0
  1479. arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640-24mhz.dtso +17 −0
  1480. arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtsi +71 −0
  1481. arch/arm64/boot/dts/ti/k3-am625-verdin-ov5640.dtso +18 −0
  1482. arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-dsi.dtso +132 −0
  1483. arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-10inch-lvds.dtso +120 −0
  1484. arch/arm64/boot/dts/ti/k3-am625-verdin-panel-cap-touch-7inch-dsi.dtso +132 −0
  1485. arch/arm64/boot/dts/ti/k3-am625-verdin-uart4-mcu.dtso +13 −0
  1486. arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +2 −0
  1487. arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +1 −0
  1488. arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +12 −20
  1489. arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi +15 −0
  1490. arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi +18 −0
  1491. arch/arm64/boot/dts/ti/k3-j722s.dtsi +2 −0
  1492. arch/arm64/configs/defconfig +208 −223
  1493. arch/arm64/include/asm/arch_timer.h +2 −10
  1494. arch/arm64/include/asm/cpucaps.h +2 −2
  1495. arch/arm64/include/asm/cpufeature.h +7 −0
  1496. arch/arm64/include/asm/cputype.h +4 −0
  1497. arch/arm64/include/asm/daifflags.h +5 −5
  1498. arch/arm64/include/asm/device.h +0 −14
  1499. arch/arm64/include/asm/el2_setup.h +3 −1
  1500. arch/arm64/include/asm/esr.h +2 −0
  1501. arch/arm64/include/asm/fpsimd.h +347 −27
  1502. arch/arm64/include/asm/fpsimdmacros.h +0 −357
  1503. arch/arm64/include/asm/insn.h +1 −1
  1504. arch/arm64/include/asm/io.h +1 −1
  1505. arch/arm64/include/asm/kvm_host.h +9 −28
  1506. arch/arm64/include/asm/kvm_hyp.h +1 −5
  1507. arch/arm64/include/asm/kvm_mmu.h +1 −2
  1508. arch/arm64/include/asm/kvm_nested.h +2 −2
  1509. arch/arm64/include/asm/kvm_pkvm.h +1 −2
  1510. arch/arm64/include/asm/linkage.h +4 −0
  1511. arch/arm64/include/asm/module.lds.h +2 −2
  1512. arch/arm64/include/asm/page.h +1 −1
  1513. arch/arm64/include/asm/pgtable-types.h +7 −7
  1514. arch/arm64/include/asm/pgtable.h +30 −2
  1515. arch/arm64/include/asm/processor.h +5 −2
  1516. arch/arm64/include/asm/ptdump.h +4 −4
  1517. arch/arm64/include/asm/ring_buffer.h +10 −0
  1518. arch/arm64/include/asm/tlb.h +2 −1
  1519. arch/arm64/include/asm/tlbflush.h +2 −2
  1520. arch/arm64/include/asm/uaccess.h +1 −2
  1521. arch/arm64/include/uapi/asm/fcntl.h +4 −4
  1522. arch/arm64/include/uapi/asm/hwcap.h +8 −0
  1523. arch/arm64/kernel/Makefile +1 −1
  1524. arch/arm64/kernel/cpu_errata.c +48 −7
  1525. arch/arm64/kernel/cpufeature.c +25 −6
  1526. arch/arm64/kernel/cpuinfo.c +8 −0
  1527. arch/arm64/kernel/efi.c +2 −2
  1528. arch/arm64/kernel/entry-common.c +2 −6
  1529. arch/arm64/kernel/entry-fpsimd.S +0 −134
  1530. arch/arm64/kernel/fpsimd.c +39 −51
  1531. arch/arm64/kernel/hw_breakpoint.c +9 −0
  1532. arch/arm64/kernel/hyp-stub.S +1 −3
  1533. arch/arm64/kernel/irq.c +20 −9
  1534. arch/arm64/kernel/mte.c +2 −4
  1535. arch/arm64/kernel/patching.c +1 −2
  1536. arch/arm64/kernel/pi/map_kernel.c +1 −1
  1537. arch/arm64/kernel/pi/map_range.c +2 −2
  1538. arch/arm64/kernel/pi/pi.h +1 −1
  1539. arch/arm64/kernel/proton-pack.c +9 −8
  1540. arch/arm64/kernel/smp.c +12 −7
  1541. arch/arm64/kernel/static_call.c +1 −0
  1542. arch/arm64/kernel/vmlinux.lds.S +8 −1
  1543. arch/arm64/kvm/arch_timer.c +63 −74
  1544. arch/arm64/kvm/arm.c +40 −21
  1545. arch/arm64/kvm/at.c +118 −34
  1546. arch/arm64/kvm/emulate-nested.c +12 −0
  1547. arch/arm64/kvm/fpsimd.c +26 −0
  1548. arch/arm64/kvm/guest.c +2 −2
  1549. arch/arm64/kvm/hyp/entry.S +0 −1
  1550. arch/arm64/kvm/hyp/fpsimd.S +0 −33
  1551. arch/arm64/kvm/hyp/include/hyp/switch.h +25 −18
  1552. arch/arm64/kvm/hyp/include/nvhe/mem_protect.h +2 −1
  1553. arch/arm64/kvm/hyp/nvhe/Makefile +1 −1
  1554. arch/arm64/kvm/hyp/nvhe/host.S +1 −1
  1555. arch/arm64/kvm/hyp/nvhe/hyp-main.c +30 −11
  1556. arch/arm64/kvm/hyp/nvhe/mem_protect.c +26 −11
  1557. arch/arm64/kvm/hyp/nvhe/page_alloc.c +16 −5
  1558. arch/arm64/kvm/hyp/nvhe/pkvm.c +3 −1
  1559. arch/arm64/kvm/hyp/nvhe/setup.c +2 −2
  1560. arch/arm64/kvm/hyp/nvhe/switch.c +1 −1
  1561. arch/arm64/kvm/hyp/nvhe/tlb.c +2 −2
  1562. arch/arm64/kvm/hyp/nvhe/trace.c +7 −2
  1563. arch/arm64/kvm/hyp/pgtable.c +3 −1
  1564. arch/arm64/kvm/hyp/vgic-v5-sr.c +16 −66
  1565. arch/arm64/kvm/hyp/vhe/Makefile +1 −1
  1566. arch/arm64/kvm/hyp/vhe/switch.c +1 −1
  1567. arch/arm64/kvm/hyp/vhe/tlb.c +2 −2
  1568. arch/arm64/kvm/hyp_trace.c +10 −7
  1569. arch/arm64/kvm/hypercalls.c +3 −3
  1570. arch/arm64/kvm/mmu.c +38 −6
  1571. arch/arm64/kvm/nested.c +179 −93
  1572. arch/arm64/kvm/pmu-emul.c +11 −24
  1573. arch/arm64/kvm/sys_regs.c +12 −19
  1574. arch/arm64/kvm/vgic/vgic-init.c +18 −27
  1575. arch/arm64/kvm/vgic/vgic-irqfd.c +6 −0
  1576. arch/arm64/kvm/vgic/vgic-its.c +17 −14
  1577. arch/arm64/kvm/vgic/vgic-kvm-device.c +3 −6
  1578. arch/arm64/kvm/vgic/vgic-v5.c +17 −34
  1579. arch/arm64/kvm/vgic/vgic.c +15 −18
  1580. arch/arm64/kvm/vgic/vgic.h +3 −0
  1581. arch/arm64/mm/dma-mapping.c +1 −1
  1582. arch/arm64/mm/fault.c +14 −7
  1583. arch/arm64/mm/fixmap.c +3 −3
  1584. arch/arm64/mm/kasan_init.c +1 −1
  1585. arch/arm64/mm/mmap.c +2 −2
  1586. arch/arm64/mm/mmu.c +81 −87
  1587. arch/arm64/mm/pageattr.c +1 −1
  1588. arch/arm64/mm/ptdump.c +1 −1
  1589. arch/arm64/net/bpf_jit_comp.c +122 −34
  1590. arch/arm64/net/bpf_timed_may_goto.S +4 −4
  1591. arch/arm64/tools/cpucaps +1 −1
  1592. arch/arm64/tools/sysreg +74 −0
  1593. arch/csky/include/asm/Kbuild +1 −0
  1594. arch/hexagon/include/asm/Kbuild +1 −0
  1595. arch/hexagon/include/asm/uaccess.h +1 −2
  1596. arch/loongarch/Kconfig +2 −2
  1597. arch/loongarch/Makefile +0 −2
  1598. arch/loongarch/boot/dts/loongson-2k0500.dtsi +12 −0
  1599. arch/loongarch/boot/dts/loongson-2k1000.dtsi +4 −0
  1600. arch/loongarch/boot/dts/loongson-2k2000.dtsi +4 −0
  1601. arch/loongarch/configs/loongson32_defconfig +0 −4
  1602. arch/loongarch/configs/loongson64_defconfig +0 −4
  1603. arch/loongarch/crypto/Kconfig +0 −5
  1604. arch/loongarch/crypto/Makefile +0 −4
  1605. arch/loongarch/include/asm/Kbuild +1 −0
  1606. arch/loongarch/include/asm/acpi.h +2 −0
  1607. arch/loongarch/include/asm/current.h +31 −0
  1608. arch/loongarch/include/asm/efi.h +3 −1
  1609. arch/loongarch/include/asm/kexec.h +2 −1
  1610. arch/loongarch/include/asm/kvm_host.h +6 −8
  1611. arch/loongarch/include/asm/kvm_vcpu.h +29 −14
  1612. arch/loongarch/include/asm/paravirt.h +6 −0
  1613. arch/loongarch/include/asm/percpu.h +0 −1
  1614. arch/loongarch/include/asm/pgtable.h +4 −0
  1615. arch/loongarch/include/asm/qspinlock.h +1 −4
  1616. arch/loongarch/include/asm/smp.h +2 −1
  1617. arch/loongarch/include/asm/stackframe.h +7 −3
  1618. arch/loongarch/include/asm/switch_to.h +3 −4
  1619. arch/loongarch/include/asm/thread_info.h +0 −10
  1620. arch/loongarch/include/asm/uaccess.h +1 −2
  1621. arch/loongarch/kernel/acpi.c +28 −0
  1622. arch/loongarch/kernel/asm-offsets.c +3 −3
  1623. arch/loongarch/kernel/entry.S +5 −2
  1624. arch/loongarch/kernel/head.S +11 −7
  1625. arch/loongarch/kernel/kprobes.c +8 −6
  1626. arch/loongarch/kernel/process.c +2 −0
  1627. arch/loongarch/kernel/relocate.c +51 −1
  1628. arch/loongarch/kernel/setup.c +3 −0
  1629. arch/loongarch/kernel/smp.c +6 −3
  1630. arch/loongarch/kernel/switch.S +8 −6
  1631. arch/loongarch/kernel/traps.c +8 −0
  1632. arch/loongarch/kvm/exit.c +7 −15
  1633. arch/loongarch/kvm/intc/eiointc.c +6 −0
  1634. arch/loongarch/kvm/intc/ipi.c +2 −0
  1635. arch/loongarch/kvm/intc/pch_pic.c +2 −0
  1636. arch/loongarch/kvm/interrupt.c +27 −71
  1637. arch/loongarch/kvm/irqfd.c +2 −1
  1638. arch/loongarch/kvm/main.c +1 −0
  1639. arch/loongarch/kvm/timer.c +1 −2
  1640. arch/loongarch/kvm/vcpu.c +49 −69
  1641. arch/loongarch/mm/init.c +3 −17
  1642. arch/loongarch/mm/pageattr.c +1 −1
  1643. arch/loongarch/net/bpf_jit.c +76 −35
  1644. arch/loongarch/pci/acpi.c +2 −0
  1645. arch/loongarch/vdso/elf.S +3 −0
  1646. arch/m68k/Kconfig.cpu +1 −0
  1647. arch/m68k/Kconfig.machine +4 −4
  1648. arch/m68k/coldfire/amcore.c +2 −2
  1649. arch/m68k/coldfire/clk.c +4 −4
  1650. arch/m68k/coldfire/device.c +4 −4
  1651. arch/m68k/coldfire/dma_timer.c +6 −6
  1652. arch/m68k/coldfire/intc-2.c +15 −15
  1653. arch/m68k/coldfire/intc-5249.c +5 −5
  1654. arch/m68k/coldfire/intc-525x.c +6 −6
  1655. arch/m68k/coldfire/intc-5272.c +10 −10
  1656. arch/m68k/coldfire/intc-simr.c +19 −19
  1657. arch/m68k/coldfire/intc.c +14 −14
  1658. arch/m68k/coldfire/m5206.c +1 −1
  1659. arch/m68k/coldfire/m520x.c +13 −13
  1660. arch/m68k/coldfire/m523x.c +6 −6
  1661. arch/m68k/coldfire/m5249.c +8 −8
  1662. arch/m68k/coldfire/m525x.c +6 −6
  1663. arch/m68k/coldfire/m5272.c +8 −8
  1664. arch/m68k/coldfire/m527x.c +20 −20
  1665. arch/m68k/coldfire/m528x.c +14 −14
  1666. arch/m68k/coldfire/m5307.c +1 −1
  1667. arch/m68k/coldfire/m53xx.c +61 −61
  1668. arch/m68k/coldfire/m5407.c +1 −1
  1669. arch/m68k/coldfire/m5441x.c +18 −15
  1670. arch/m68k/coldfire/m54xx.c +9 −9
  1671. arch/m68k/coldfire/nettel.c +8 −8
  1672. arch/m68k/coldfire/pci.c +28 −28
  1673. arch/m68k/coldfire/pit.c +10 −10
  1674. arch/m68k/coldfire/reset.c +2 −2
  1675. arch/m68k/coldfire/sltimers.c +9 −9
  1676. arch/m68k/coldfire/stmark2.c +40 −23
  1677. arch/m68k/coldfire/timers.c +15 −15
  1678. arch/m68k/configs/amiga_defconfig +8 −8
  1679. arch/m68k/configs/apollo_defconfig +8 −8
  1680. arch/m68k/configs/atari_defconfig +8 −7
  1681. arch/m68k/configs/bvme6000_defconfig +8 −8
  1682. arch/m68k/configs/hp300_defconfig +8 −8
  1683. arch/m68k/configs/m5208evb_defconfig +5 −4
  1684. arch/m68k/configs/m5249evb_defconfig +5 −4
  1685. arch/m68k/configs/m5272c3_defconfig +5 −4
  1686. arch/m68k/configs/m5275evb_defconfig +5 −4
  1687. arch/m68k/configs/m5307c3_defconfig +5 −5
  1688. arch/m68k/configs/m5329evb_defconfig +61 −0
  1689. arch/m68k/configs/m5407c3_defconfig +4 −5
  1690. arch/m68k/configs/m54418evb_defconfig +70 −0
  1691. arch/m68k/configs/m5475evb_defconfig +6 −6
  1692. arch/m68k/configs/mac_defconfig +8 −8
  1693. arch/m68k/configs/multi_defconfig +8 −8
  1694. arch/m68k/configs/mvme147_defconfig +8 −8
  1695. arch/m68k/configs/mvme16x_defconfig +8 −8
  1696. arch/m68k/configs/nettel_defconfig +56 −0
  1697. arch/m68k/configs/q40_defconfig +8 −8
  1698. arch/m68k/configs/stmark2_defconfig +20 −13
  1699. arch/m68k/configs/sun3_defconfig +8 −8
  1700. arch/m68k/configs/sun3x_defconfig +8 −8
  1701. arch/m68k/include/asm/Kbuild +1 −0
  1702. arch/m68k/include/asm/hash.h +3 −1
  1703. arch/m68k/include/asm/io_no.h +16 −0
  1704. arch/m68k/include/asm/m5441xsim.h +42 −0
  1705. arch/m68k/include/asm/mcfgpio.h +6 −6
  1706. arch/m68k/include/asm/module.lds.h +1 −1
  1707. arch/m68k/include/asm/nettel.h +2 −2
  1708. arch/m68k/include/asm/string.h +0 −17
  1709. arch/m68k/include/asm/uaccess.h +1 −2
  1710. arch/m68k/include/uapi/asm/fcntl.h +4 −4
  1711. arch/m68k/kernel/head.S +1 −1
  1712. arch/microblaze/include/asm/Kbuild +1 −0
  1713. arch/microblaze/include/asm/uaccess.h +1 −2
  1714. arch/mips/Kconfig +16 −18
  1715. arch/mips/Makefile +0 −2
  1716. arch/mips/alchemy/Kconfig +0 −1
  1717. arch/mips/alchemy/board-gpr.c +75 −52
  1718. arch/mips/alchemy/board-mtx1.c +13 −21
  1719. arch/mips/alchemy/common/gpiolib.c +44 −1
  1720. arch/mips/alchemy/devboards/db1000.c +10 −21
  1721. arch/mips/alchemy/devboards/db1200.c +1 −0
  1722. arch/mips/alchemy/devboards/db1300.c +148 −71
  1723. arch/mips/alchemy/devboards/db1550.c +2 −0
  1724. arch/mips/alchemy/devboards/db1xxx.c +1 −10
  1725. arch/mips/alchemy/devboards/db1xxx.h +18 −0
  1726. arch/mips/alchemy/devboards/platform.c +2 −0
  1727. arch/mips/boot/dts/loongson/ls7a-pch.dtsi +13 −4
  1728. arch/mips/boot/dts/qca/ar9132.dtsi +1 −1
  1729. arch/mips/cavium-octeon/executive/cvmx-helper-util.c +1 −1
  1730. arch/mips/cavium-octeon/executive/cvmx-helper.c +4 −4
  1731. arch/mips/cavium-octeon/executive/cvmx-pko.c +3 −3
  1732. arch/mips/cavium-octeon/executive/cvmx-spi.c +8 −8
  1733. arch/mips/configs/bigsur_defconfig +0 −2
  1734. arch/mips/configs/cu1000-neo_defconfig +1 −1
  1735. arch/mips/configs/cu1830-neo_defconfig +1 −1
  1736. arch/mips/configs/decstation_64_defconfig +0 −4
  1737. arch/mips/configs/decstation_defconfig +0 −4
  1738. arch/mips/configs/decstation_r4k_defconfig +0 −4
  1739. arch/mips/configs/fuloong2e_defconfig +0 −2
  1740. arch/mips/configs/gcw0_defconfig +1 −1
  1741. arch/mips/configs/gpr_defconfig +0 −2
  1742. arch/mips/configs/ip22_defconfig +0 −3
  1743. arch/mips/configs/ip27_defconfig +0 −3
  1744. arch/mips/configs/ip30_defconfig +0 −3
  1745. arch/mips/configs/ip32_defconfig +0 −2
  1746. arch/mips/configs/jazz_defconfig +0 −1
  1747. arch/mips/configs/lemote2f_defconfig +0 −2
  1748. arch/mips/configs/malta_defconfig +0 −4
  1749. arch/mips/configs/malta_kvm_defconfig +0 −4
  1750. arch/mips/configs/malta_qemu_32r6_defconfig +0 −2
  1751. arch/mips/configs/maltaaprp_defconfig +0 −2
  1752. arch/mips/configs/maltasmvp_defconfig +0 −2
  1753. arch/mips/configs/maltasmvp_eva_defconfig +0 −2
  1754. arch/mips/configs/maltaup_defconfig +0 −2
  1755. arch/mips/configs/maltaup_xpa_defconfig +0 −4
  1756. arch/mips/configs/mtx1_defconfig +0 −9
  1757. arch/mips/configs/rm200_defconfig +0 −3
  1758. arch/mips/configs/sb1250_swarm_defconfig +0 −3
  1759. arch/mips/crypto/.gitignore +0 −2
  1760. arch/mips/crypto/Kconfig +0 −5
  1761. arch/mips/crypto/Makefile +0 −5
  1762. arch/mips/dec/int-handler.S +1 −1
  1763. arch/mips/dec/ioasic-irq.c +1 −4
  1764. arch/mips/dec/platform.c +112 −1
  1765. arch/mips/dec/prom/console.c +5 −2
  1766. arch/mips/dec/prom/init.c +5 −1
  1767. arch/mips/dec/reset.c +2 −0
  1768. arch/mips/dec/setup.c +1 −11
  1769. arch/mips/fw/lib/call_o32.S +1 −1
  1770. arch/mips/include/asm/Kbuild +1 −0
  1771. arch/mips/include/asm/cdmm.h +1 −1
  1772. arch/mips/include/asm/dec/prom.h +13 −2
  1773. arch/mips/include/asm/dec/reset.h +19 −0
  1774. arch/mips/include/asm/gio_device.h +0 −6
  1775. arch/mips/include/asm/irq.h +1 −1
  1776. arch/mips/include/asm/irq_work.h +9 −0
  1777. arch/mips/include/asm/mach-ath79/kmalloc.h +7 −0
  1778. arch/mips/include/asm/mach-au1x00/gpio-au1000.h +5 −0
  1779. arch/mips/include/asm/mach-au1x00/gpio-au1300.h +3 −0
  1780. arch/mips/include/asm/mach-ralink/kmalloc.h +9 −0
  1781. arch/mips/include/asm/mips_mt.h +0 −1
  1782. arch/mips/include/asm/octeon/cvmx-helper-util.h +1 −1
  1783. arch/mips/include/asm/octeon/cvmx-helper.h +3 −3
  1784. arch/mips/include/asm/octeon/cvmx-pip.h +3 −3
  1785. arch/mips/include/asm/octeon/cvmx-pko.h +13 −13
  1786. arch/mips/include/asm/octeon/cvmx-pow.h +6 −6
  1787. arch/mips/include/asm/octeon/cvmx-spi.h +19 −19
  1788. arch/mips/include/asm/smp.h +2 −0
  1789. arch/mips/include/asm/uaccess.h +1 −2
  1790. arch/mips/include/uapi/asm/errno.h +2 −0
  1791. arch/mips/include/uapi/asm/fcntl.h +11 −11
  1792. arch/mips/kernel/cps-vec.S +6 −0
  1793. arch/mips/kernel/csrc-r4k.c +2 −0
  1794. arch/mips/kernel/irq.c +1 −1
  1795. arch/mips/kernel/mips-mt-fpaff.c +15 −13
  1796. arch/mips/kernel/proc.c +4 −5
  1797. arch/mips/kernel/smp.c +2 −0
  1798. arch/mips/kernel/vdso.c +7 −5
  1799. arch/mips/lantiq/xway/dcdc.c +0 −1
  1800. arch/mips/lantiq/xway/gptu.c +0 −1
  1801. arch/mips/lantiq/xway/vmmc.c +0 −1
  1802. arch/mips/lib/memcpy.S +0 −2
  1803. arch/mips/lib/memset.S +0 −2
  1804. arch/mips/loongson64/smp.c +10 −0
  1805. arch/mips/mm/c-r4k.c +0 −5
  1806. arch/mips/mm/dma-noncoherent.c +1 −1
  1807. arch/mips/mm/init.c +11 −6
  1808. arch/mips/n64/init.c +1 −1
  1809. arch/mips/pci/pci-rt2880.c +0 −1
  1810. arch/mips/ralink/mt7621.c +1 −1
  1811. arch/mips/ralink/timer.c +0 −1
  1812. arch/mips/rb532/devices.c +26 −6
  1813. arch/mips/rb532/gpio.c +21 −20
  1814. arch/mips/rb532/serial.c +1 −1
  1815. arch/mips/sgi-ip22/ip22-gio.c +11 −23
  1816. arch/mips/txx9/Kconfig +1 −0
  1817. arch/mips/vdso/Kconfig +0 −6
  1818. arch/mips/vdso/Makefile +2 −5
  1819. arch/mips/vdso/elf.S +3 −0
  1820. arch/mips/vdso/vdso.lds.S +2 −3
  1821. arch/mips/vdso/vgettimeofday.c +0 −20
  1822. arch/nios2/include/asm/Kbuild +1 −0
  1823. arch/nios2/include/asm/linkage.h +2 −0
  1824. arch/nios2/include/asm/uaccess.h +1 −2
  1825. arch/openrisc/include/asm/Kbuild +1 −0
  1826. arch/openrisc/include/asm/cacheflush.h +4 −0
  1827. arch/openrisc/include/asm/uaccess.h +1 −2
  1828. arch/openrisc/kernel/head.S +0 −10
  1829. arch/openrisc/kernel/jump_label.c +1 −1
  1830. arch/openrisc/kernel/patching.c +3 −0
  1831. arch/openrisc/kernel/smp.c +21 −0
  1832. arch/openrisc/mm/cache.c +16 −0
  1833. arch/openrisc/mm/init.c +1 −1
  1834. arch/parisc/configs/generic-64bit_defconfig +0 −2
  1835. arch/parisc/include/asm/Kbuild +1 −0
  1836. arch/parisc/include/asm/hardware.h +1 −3
  1837. arch/parisc/include/asm/parisc-device.h +1 −0
  1838. arch/parisc/include/asm/ptrace.h +1 −0
  1839. arch/parisc/include/asm/uaccess.h +1 −2
  1840. arch/parisc/include/uapi/asm/errno.h +2 −0
  1841. arch/parisc/include/uapi/asm/fcntl.h +14 −14
  1842. arch/powerpc/Kconfig +1 −1
  1843. arch/powerpc/boot/dts/Makefile +73 −0
  1844. arch/powerpc/boot/dts/fsl/Makefile +43 −0
  1845. arch/powerpc/boot/dts/mpc8308_p1m.dts +1 −0
  1846. arch/powerpc/boot/dts/mpc8308rdb.dts +1 −0
  1847. arch/powerpc/boot/dts/mpc8315erdb.dts +1 −0
  1848. arch/powerpc/boot/dts/mpc836x_rdk.dts +1 −0
  1849. arch/powerpc/boot/dts/mpc8377_rdb.dts +1 −0
  1850. arch/powerpc/boot/dts/mpc8377_wlan.dts +1 −0
  1851. arch/powerpc/boot/dts/mpc8378_rdb.dts +1 −0
  1852. arch/powerpc/boot/dts/mpc8379_rdb.dts +1 −0
  1853. arch/powerpc/boot/hack-coff.c +1 −1
  1854. arch/powerpc/boot/rs6000.h +40 −44
  1855. arch/powerpc/boot/string.S +0 −13
  1856. arch/powerpc/boot/string.h +0 −1
  1857. arch/powerpc/boot/wrapper +1 −0
  1858. arch/powerpc/configs/44x/akebono_defconfig +0 −1
  1859. arch/powerpc/configs/44x/bamboo_defconfig +0 −1
  1860. arch/powerpc/configs/44x/currituck_defconfig +0 −1
  1861. arch/powerpc/configs/44x/ebony_defconfig +0 −1
  1862. arch/powerpc/configs/44x/eiger_defconfig +0 −1
  1863. arch/powerpc/configs/44x/fsp2_defconfig +0 −1
  1864. arch/powerpc/configs/44x/icon_defconfig +0 −1
  1865. arch/powerpc/configs/44x/iss476-smp_defconfig +0 −1
  1866. arch/powerpc/configs/44x/katmai_defconfig +0 −1
  1867. arch/powerpc/configs/44x/rainier_defconfig +0 −1
  1868. arch/powerpc/configs/44x/redwood_defconfig +0 −1
  1869. arch/powerpc/configs/44x/sequoia_defconfig +0 −1
  1870. arch/powerpc/configs/44x/taishan_defconfig +0 −1
  1871. arch/powerpc/configs/52xx/cm5200_defconfig +0 −1
  1872. arch/powerpc/configs/52xx/motionpro_defconfig +0 −1
  1873. arch/powerpc/configs/52xx/tqm5200_defconfig +0 −1
  1874. arch/powerpc/configs/83xx/asp8347_defconfig +0 −1
  1875. arch/powerpc/configs/83xx/mpc8313_rdb_defconfig +0 −1
  1876. arch/powerpc/configs/83xx/mpc8315_rdb_defconfig +0 −1
  1877. arch/powerpc/configs/83xx/mpc832x_rdb_defconfig +0 −1
  1878. arch/powerpc/configs/83xx/mpc834x_itx_defconfig +0 −1
  1879. arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig +0 −1
  1880. arch/powerpc/configs/83xx/mpc837x_rdb_defconfig +0 −1
  1881. arch/powerpc/configs/amigaone_defconfig +0 −1
  1882. arch/powerpc/configs/cell_defconfig +0 −1
  1883. arch/powerpc/configs/chrp32_defconfig +0 −1
  1884. arch/powerpc/configs/ep8248e_defconfig +0 −1
  1885. arch/powerpc/configs/fsl-emb-nonhw.config +0 −1
  1886. arch/powerpc/configs/g5_defconfig +0 −1
  1887. arch/powerpc/configs/linkstation_defconfig +0 −1
  1888. arch/powerpc/configs/mgcoge_defconfig +0 −1
  1889. arch/powerpc/configs/mpc83xx_defconfig +0 −1
  1890. arch/powerpc/configs/mvme5100_defconfig +0 −1
  1891. arch/powerpc/configs/pmac32_defconfig +0 −1
  1892. arch/powerpc/configs/powernv_defconfig +0 −1
  1893. arch/powerpc/configs/ppc44x_defconfig +0 −1
  1894. arch/powerpc/configs/ppc64_defconfig +0 −1
  1895. arch/powerpc/configs/ppc64e_defconfig +0 −1
  1896. arch/powerpc/configs/ppc6xx_defconfig +1 −8
  1897. arch/powerpc/configs/ps3_defconfig +0 −1
  1898. arch/powerpc/crypto/aes-spe-glue.c +5 −4
  1899. arch/powerpc/include/asm/Kbuild +1 −0
  1900. arch/powerpc/include/asm/entry-common.h +534 −0
  1901. arch/powerpc/include/asm/hw_irq.h +2 −2
  1902. arch/powerpc/include/asm/interrupt.h +61 −325
  1903. arch/powerpc/include/asm/kasan.h +10 −5
  1904. arch/powerpc/include/asm/machdep.h +1 −1
  1905. arch/powerpc/include/asm/pci.h +0 −2
  1906. arch/powerpc/include/asm/prom.h +3 −1
  1907. arch/powerpc/include/asm/ptrace.h +3 −3
  1908. arch/powerpc/include/asm/rtas-types.h +3 −2
  1909. arch/powerpc/include/asm/signal.h +0 −1
  1910. arch/powerpc/include/asm/stacktrace.h +6 −0
  1911. arch/powerpc/include/asm/string.h +0 −2
  1912. arch/powerpc/include/asm/syscall.h +5 −0
  1913. arch/powerpc/include/asm/thread_info.h +1 −0
  1914. arch/powerpc/include/asm/topology.h +7 −0
  1915. arch/powerpc/include/asm/uaccess.h +26 −0
  1916. arch/powerpc/include/asm/vga.h +2 −2
  1917. arch/powerpc/include/uapi/asm/fcntl.h +4 −4
  1918. arch/powerpc/include/uapi/asm/ptrace.h +9 −5
  1919. arch/powerpc/kernel/cacheinfo.c +7 −6
  1920. arch/powerpc/kernel/dma-iommu.c +4 −4
  1921. arch/powerpc/kernel/eeh_sysfs.c +4 −4
  1922. arch/powerpc/kernel/fadump.c +7 −7
  1923. arch/powerpc/kernel/interrupt.c +45 −210
  1924. arch/powerpc/kernel/iommu.c +2 −1
  1925. arch/powerpc/kernel/irq.c +1 −4
  1926. arch/powerpc/kernel/pci-common.c +1 −1
  1927. arch/powerpc/kernel/prom_init.c +1 −1
  1928. arch/powerpc/kernel/ptrace/ptrace.c +1 −141
  1929. arch/powerpc/kernel/security.c +7 −6
  1930. arch/powerpc/kernel/setup-common.c +10 −5
  1931. arch/powerpc/kernel/signal.c +8 −17
  1932. arch/powerpc/kernel/syscall.c +3 −116
  1933. arch/powerpc/kernel/sysfs.c +12 −11
  1934. arch/powerpc/kernel/time.c +41 −0
  1935. arch/powerpc/kernel/traps.c +1 −1
  1936. arch/powerpc/kernel/watchdog.c +1 −1
  1937. arch/powerpc/kexec/core_64.c +1 −3
  1938. arch/powerpc/lib/code-patching.c +2 −50
  1939. arch/powerpc/lib/string.S +0 −22
  1940. arch/powerpc/mm/book3s64/hash_utils.c +1 −3
  1941. arch/powerpc/mm/init_64.c +0 −8
  1942. arch/powerpc/mm/mem.c +3 −2
  1943. arch/powerpc/net/Makefile +4 −0
  1944. arch/powerpc/net/bpf_jit_comp.c +34 −29
  1945. arch/powerpc/net/bpf_jit_comp64.c +51 −11
  1946. arch/powerpc/net/bpf_timed_may_goto.S +57 −0
  1947. arch/powerpc/perf/core-book3s.c +3 −2
  1948. arch/powerpc/perf/core-fsl-emb.c +2 −1
  1949. arch/powerpc/perf/hv-24x7.c +7 −11
  1950. arch/powerpc/perf/hv-gpci.c +3 −2
  1951. arch/powerpc/perf/imc-pmu.c +2 −4
  1952. arch/powerpc/perf/kvm-hv-pmu.c +2 −1
  1953. arch/powerpc/perf/vpa-pmu.c +2 −1
  1954. arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c +2 −2
  1955. arch/powerpc/platforms/86xx/common.c +0 −1
  1956. arch/powerpc/platforms/8xx/cpm1.c +26 −0
  1957. arch/powerpc/platforms/cell/spu_base.c +3 −2
  1958. arch/powerpc/platforms/cell/spufs/file.c +1 −1
  1959. arch/powerpc/platforms/powernv/idle.c +2 −1
  1960. arch/powerpc/platforms/powernv/opal-dump.c +6 −5
  1961. arch/powerpc/platforms/powernv/opal-elog.c +4 −5
  1962. arch/powerpc/platforms/powernv/opal-flash.c +2 −2
  1963. arch/powerpc/platforms/powernv/opal-powercap.c +4 −8
  1964. arch/powerpc/platforms/powernv/opal-psr.c +4 −8
  1965. arch/powerpc/platforms/powernv/pci-sriov.c +2 −2
  1966. arch/powerpc/platforms/powernv/pci.h +3 −2
  1967. arch/powerpc/platforms/powernv/setup.c +2 −1
  1968. arch/powerpc/platforms/powernv/subcore.c +2 −1
  1969. arch/powerpc/platforms/ps3/setup.c +2 −1
  1970. arch/powerpc/platforms/pseries/cmm.c +3 −2
  1971. arch/powerpc/platforms/pseries/dlpar.c +2 −1
  1972. arch/powerpc/platforms/pseries/hotplug-memory.c +6 −12
  1973. arch/powerpc/platforms/pseries/ibmebus.c +3 −2
  1974. arch/powerpc/platforms/pseries/lparcfg.c +13 −11
  1975. arch/powerpc/platforms/pseries/papr_scm.c +3 −2
  1976. arch/powerpc/platforms/pseries/power.c +2 −1
  1977. arch/powerpc/platforms/pseries/pseries_energy.c +2 −1
  1978. arch/powerpc/platforms/pseries/rtas-fadump.c +47 −33
  1979. arch/powerpc/platforms/pseries/rtas-fadump.h +6 −0
  1980. arch/powerpc/platforms/pseries/setup.c +3 −2
  1981. arch/powerpc/platforms/pseries/suspend.c +2 −1
  1982. arch/powerpc/platforms/pseries/vas-sysfs.c +2 −1
  1983. arch/powerpc/platforms/pseries/vio.c +13 −16
  1984. arch/powerpc/sysdev/fsl_lbc.c +0 −1
  1985. arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c +2 −1
  1986. arch/powerpc/sysdev/fsl_pmc.c +0 −1
  1987. arch/powerpc/sysdev/xive/common.c +1 −0
  1988. arch/riscv/Kconfig +29 −17
  1989. arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +9 −0
  1990. arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts +19 −18
  1991. arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts +0 −4
  1992. arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi +0 −4
  1993. arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi +0 −10
  1994. arch/riscv/boot/dts/microchip/mpfs-icicle-kit-prod.dts +10 −0
  1995. arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +19 −0
  1996. arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts +0 −4
  1997. arch/riscv/boot/dts/microchip/mpfs-polarberry.dts +0 −4
  1998. arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts +0 −4
  1999. arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts +0 −4
  2000. arch/riscv/boot/dts/microchip/mpfs.dtsi +3 −3
  2001. arch/riscv/boot/dts/microchip/pic64gx-curiosity-kit.dts +37 −30
  2002. arch/riscv/boot/dts/microchip/pic64gx.dtsi +36 −10
  2003. arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi +118 −118
  2004. arch/riscv/boot/dts/sophgo/sg2042.dtsi +5 −1
  2005. arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi +118 −118
  2006. arch/riscv/boot/dts/spacemit/Makefile +2 −0
  2007. arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts +30 −3
  2008. arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts +34 −4
  2009. arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts +328 −1
  2010. arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts +157 −0
  2011. arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts +292 −0
  2012. arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi +60 −0
  2013. arch/riscv/boot/dts/spacemit/k1.dtsi +130 −1
  2014. arch/riscv/boot/dts/spacemit/k3-com260-ifx.dts +21 −0
  2015. arch/riscv/boot/dts/spacemit/k3-com260.dtsi +190 −0
  2016. arch/riscv/boot/dts/spacemit/k3-deepcomputing-fml13v05.dts +31 −0
  2017. arch/riscv/boot/dts/spacemit/k3-pico-itx.dts +24 −0
  2018. arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi +623 −0
  2019. arch/riscv/boot/dts/spacemit/k3.dtsi +272 −9
  2020. arch/riscv/boot/dts/starfive/jh7110-common.dtsi +1 −26
  2021. arch/riscv/boot/dts/starfive/jh7110.dtsi +0 −28
  2022. arch/riscv/boot/dts/tenstorrent/blackhole.dtsi +48 −0
  2023. arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +48 −0
  2024. arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +47 −0
  2025. arch/riscv/boot/dts/thead/th1520.dtsi +11 −0
  2026. arch/riscv/configs/defconfig +1 −0
  2027. arch/riscv/crypto/aes-riscv64-glue.c +2 −2
  2028. arch/riscv/include/asm/Kbuild +1 −0
  2029. arch/riscv/include/asm/asm-prototypes.h +4 −0
  2030. arch/riscv/include/asm/bitrev.h +51 −0
  2031. arch/riscv/include/asm/cacheflush.h +13 −12
  2032. arch/riscv/include/asm/cpu_ops.h +1 −1
  2033. arch/riscv/include/asm/kfence.h +5 −2
  2034. arch/riscv/include/asm/kvm_aia.h +1 −1
  2035. arch/riscv/include/asm/kvm_gstage.h +7 −3
  2036. arch/riscv/include/asm/kvm_host.h +2 −0
  2037. arch/riscv/include/asm/kvm_nacl.h +8 −6
  2038. arch/riscv/include/asm/linkage.h +2 −0
  2039. arch/riscv/include/asm/module.lds.h +3 −3
  2040. arch/riscv/include/asm/pgtable.h +10 −0
  2041. arch/riscv/include/asm/purgatory.h +11 −0
  2042. arch/riscv/include/asm/syscall_wrapper.h +4 −0
  2043. arch/riscv/include/asm/uaccess.h +1 −1
  2044. arch/riscv/include/asm/usercfi.h +1 −0
  2045. arch/riscv/include/asm/vdso.h +5 −5
  2046. arch/riscv/include/asm/vdso/gettimeofday.h +0 −8
  2047. arch/riscv/kernel/alternative.c +7 −7
  2048. arch/riscv/kernel/asm-offsets.c +2 −2
  2049. arch/riscv/kernel/bugs.c +6 −6
  2050. arch/riscv/kernel/cacheinfo.c +1 −1
  2051. arch/riscv/kernel/cpu-hotplug.c +2 −2
  2052. arch/riscv/kernel/cpu_ops_sbi.c +10 −12
  2053. arch/riscv/kernel/entry.S +32 −27
  2054. arch/riscv/kernel/image-vars.h +9 −0
  2055. arch/riscv/kernel/irq.c +14 −8
  2056. arch/riscv/kernel/kexec_elf.c +2 −8
  2057. arch/riscv/kernel/machine_kexec_file.c +2 −1
  2058. arch/riscv/kernel/module-sections.c +2 −4
  2059. arch/riscv/kernel/pi/cmdline_early.c +8 −8
  2060. arch/riscv/kernel/probes/rethook_trampoline.S +3 −0
  2061. arch/riscv/kernel/ptrace.c +1 −1
  2062. arch/riscv/kernel/setup.c +4 −7
  2063. arch/riscv/kernel/smp.c +1 −2
  2064. arch/riscv/kernel/smpboot.c +2 −3
  2065. arch/riscv/kernel/stacktrace.c +2 −2
  2066. arch/riscv/kernel/traps_misaligned.c +2 −2
  2067. arch/riscv/kernel/unaligned_access_speed.c +25 −57
  2068. arch/riscv/kernel/usercfi.c +3 −0
  2069. arch/riscv/kernel/vdso/note.S +3 −0
  2070. arch/riscv/kvm/aia.c +53 −35
  2071. arch/riscv/kvm/aia_aplic.c +3 −12
  2072. arch/riscv/kvm/aia_device.c +2 −2
  2073. arch/riscv/kvm/aia_imsic.c +9 −0
  2074. arch/riscv/kvm/gstage.c +66 −34
  2075. arch/riscv/kvm/main.c +4 −4
  2076. arch/riscv/kvm/mmu.c +171 −40
  2077. arch/riscv/kvm/nacl.c +1 −1
  2078. arch/riscv/kvm/vcpu.c +1 −0
  2079. arch/riscv/kvm/vcpu_insn.c +4 −5
  2080. arch/riscv/kvm/vcpu_pmu.c +8 −4
  2081. arch/riscv/kvm/vcpu_sbi_fwft.c +40 −4
  2082. arch/riscv/kvm/vcpu_sbi_sta.c +1 −1
  2083. arch/riscv/kvm/vcpu_sbi_system.c +14 −0
  2084. arch/riscv/kvm/vcpu_sbi_v01.c +2 −0
  2085. arch/riscv/kvm/vcpu_timer.c +1 −1
  2086. arch/riscv/lib/Makefile +1 −0
  2087. arch/riscv/lib/ashldi3.S +36 −0
  2088. arch/riscv/lib/ashrdi3.S +36 −0
  2089. arch/riscv/lib/lshrdi3.S +36 −0
  2090. arch/riscv/mm/dma-noncoherent.c +1 −1
  2091. arch/riscv/mm/init.c +4 −16
  2092. arch/riscv/mm/ptdump.c +7 −6
  2093. arch/riscv/net/bpf_jit_comp64.c +36 −27
  2094. arch/riscv/net/bpf_jit_core.c +2 −1
  2095. arch/riscv/purgatory/purgatory.c +6 −10
  2096. arch/s390/Kconfig +5 −10
  2097. arch/s390/Makefile +17 −11
  2098. arch/s390/appldata/appldata_base.c +1 −2
  2099. arch/s390/boot/Makefile +6 −1
  2100. arch/s390/boot/mem.S +0 −2
  2101. arch/s390/boot/string.c +1 −5
  2102. arch/s390/boot/vmem.c +17 −15
  2103. arch/s390/boot/vmlinux.lds.S +1 −0
  2104. arch/s390/configs/debug_defconfig +4 −3
  2105. arch/s390/configs/defconfig +4 −3
  2106. arch/s390/crypto/Kconfig +1 −0
  2107. arch/s390/include/asm/Kbuild +1 −0
  2108. arch/s390/include/asm/asm-extable.h +0 −4
  2109. arch/s390/include/asm/asm-prototypes.h +0 −4
  2110. arch/s390/include/asm/barrier.h +4 −8
  2111. arch/s390/include/asm/bug.h +18 −6
  2112. arch/s390/include/asm/ccwdev.h +1 −1
  2113. arch/s390/include/asm/cmpxchg.h +4 −4
  2114. arch/s390/include/asm/debug.h +1 −0
  2115. arch/s390/include/asm/entry-percpu.h +80 −0
  2116. arch/s390/include/asm/fpu-insn-asm.h +2 −174
  2117. arch/s390/include/asm/fpu-insn.h +1 −0
  2118. arch/s390/include/asm/gmap_helpers.h +1 −0
  2119. arch/s390/include/asm/hugetlb.h +1 −1
  2120. arch/s390/include/asm/idle.h +7 −7
  2121. arch/s390/include/asm/insn-common-asm.h +53 −0
  2122. arch/s390/include/asm/jump_label.h +19 −14
  2123. arch/s390/include/asm/kvm_host.h +22 −1
  2124. arch/s390/include/asm/linkage.h +2 −0
  2125. arch/s390/include/asm/lowcore.h +4 −3
  2126. arch/s390/include/asm/percpu.h +207 −39
  2127. arch/s390/include/asm/pgtable.h +65 −38
  2128. arch/s390/include/asm/processor.h +1 −2
  2129. arch/s390/include/asm/ptrace.h +2 −0
  2130. arch/s390/include/asm/sclp.h +2 −0
  2131. arch/s390/include/asm/string.h +0 −2
  2132. arch/s390/include/asm/timex.h +1 −19
  2133. arch/s390/include/asm/tod_types.h +30 −0
  2134. arch/s390/include/asm/trace_clock.h +13 −0
  2135. arch/s390/include/asm/uaccess.h +1 −2
  2136. arch/s390/include/asm/vdso/processor.h +3 −1
  2137. arch/s390/include/asm/vtime.h +2 −2
  2138. arch/s390/include/asm/word-at-a-time.h +0 −22
  2139. arch/s390/include/uapi/asm/kvm.h +1 −0
  2140. arch/s390/kernel/Makefile +1 −0
  2141. arch/s390/kernel/asm-offsets.c +7 −0
  2142. arch/s390/kernel/debug.c +112 −17
  2143. arch/s390/kernel/entry.S +12 −2
  2144. arch/s390/kernel/idle.c +101 −26
  2145. arch/s390/kernel/irq.c +21 −10
  2146. arch/s390/kernel/nmi.c +5 −0
  2147. arch/s390/kernel/perf_pai.c +21 −10
  2148. arch/s390/kernel/process.c +1 −4
  2149. arch/s390/kernel/smp.c +1 −32
  2150. arch/s390/kernel/topology.c +7 −3
  2151. arch/s390/kernel/trace_clock.c +12 −0
  2152. arch/s390/kernel/traps.c +5 −0
  2153. arch/s390/kernel/vmlinux.lds.S +7 −0
  2154. arch/s390/kernel/vtime.c +14 −6
  2155. arch/s390/kvm/Kconfig +1 −0
  2156. arch/s390/kvm/dat.c +6 −2
  2157. arch/s390/kvm/dat.h +3 −1
  2158. arch/s390/kvm/faultin.c +15 −15
  2159. arch/s390/kvm/gaccess.c +49 −34
  2160. arch/s390/kvm/gmap.c +84 −19
  2161. arch/s390/kvm/gmap.h +83 −5
  2162. arch/s390/kvm/intercept.c +3 −2
  2163. arch/s390/kvm/interrupt.c +445 −114
  2164. arch/s390/kvm/kvm-s390.c +206 −59
  2165. arch/s390/kvm/kvm-s390.h +4 −1
  2166. arch/s390/kvm/priv.c +13 −5
  2167. arch/s390/kvm/pv.c +24 −2
  2168. arch/s390/kvm/vsie.c +66 −19
  2169. arch/s390/lib/Makefile +5 −1
  2170. arch/s390/lib/mem.S +0 −192
  2171. arch/s390/lib/string.c +210 −26
  2172. arch/s390/lib/tishift.S +0 −63
  2173. arch/s390/lib/tishift.c +64 −0
  2174. arch/s390/lib/tishift.h +9 −0
  2175. arch/s390/mm/extable.c +0 −18
  2176. arch/s390/mm/gmap_helpers.c +71 −58
  2177. arch/s390/mm/hugetlbpage.c +6 −6
  2178. arch/s390/mm/init.c +5 −2
  2179. arch/s390/mm/pageattr.c +25 −20
  2180. arch/s390/mm/vmem.c +47 −38
  2181. arch/s390/net/bpf_jit_comp.c +59 −22
  2182. arch/s390/purgatory/Makefile +4 −5
  2183. arch/s390/purgatory/purgatory.lds.S +1 −0
  2184. arch/sh/configs/hp6xx_defconfig +0 −1
  2185. arch/sh/configs/landisk_defconfig +0 −1
  2186. arch/sh/configs/r7780mp_defconfig +0 −1
  2187. arch/sh/configs/r7785rp_defconfig +0 −1
  2188. arch/sh/configs/se7712_defconfig +0 −1
  2189. arch/sh/configs/sh2007_defconfig +0 −2
  2190. arch/sh/drivers/platform_early.c +1 −1
  2191. arch/sh/include/asm/Kbuild +1 −0
  2192. arch/sh/include/asm/uaccess.h +1 −2
  2193. arch/sh/kernel/irq.c +1 −1
  2194. arch/sh/mm/cache-sh4.c +1 −1
  2195. arch/sh/mm/init.c +0 −3
  2196. arch/sparc/Kconfig +1 −25
  2197. arch/sparc/configs/sparc32_defconfig +0 −1
  2198. arch/sparc/configs/sparc64_defconfig +0 −4
  2199. arch/sparc/crypto/crop_devid.c +1 −1
  2200. arch/sparc/include/asm/Kbuild +1 −0
  2201. arch/sparc/include/asm/asm-prototypes.h +2 −0
  2202. arch/sparc/include/asm/page_32.h +2 −0
  2203. arch/sparc/include/asm/uaccess_32.h +1 −2
  2204. arch/sparc/include/asm/uaccess_64.h +1 −2
  2205. arch/sparc/include/uapi/asm/errno.h +2 −0
  2206. arch/sparc/include/uapi/asm/fcntl.h +17 −17
  2207. arch/sparc/include/uapi/asm/ucontext.h +3 −0
  2208. arch/sparc/kernel/irq_32.c +6 −6
  2209. arch/sparc/kernel/irq_64.c +2 −2
  2210. arch/sparc/kernel/led.c +1 −1
  2211. arch/sparc/kernel/of_device_32.c +0 −1
  2212. arch/sparc/kernel/of_device_64.c +0 −1
  2213. arch/sparc/kernel/of_device_common.c +0 −1
  2214. arch/sparc/kernel/uprobes.c +1 −0
  2215. arch/sparc/kernel/vio.c +5 −4
  2216. arch/sparc/lib/mcount.S +1 −0
  2217. arch/sparc/mm/init_64.c +0 −31
  2218. arch/sparc/mm/srmmu.c +0 −29
  2219. arch/um/Makefile +2 −1
  2220. arch/um/include/asm/Kbuild +2 −0
  2221. arch/um/include/asm/uaccess.h +1 −2
  2222. arch/um/kernel/irq.c +2 −2
  2223. arch/x86/Kconfig +17 −63
  2224. arch/x86/Kconfig.cpu +8 −56
  2225. arch/x86/Kconfig.cpufeatures +0 −2
  2226. arch/x86/Makefile +4 −6
  2227. arch/x86/Makefile.um +8 −0
  2228. arch/x86/Makefile_32.cpu +0 −6
  2229. arch/x86/boot/compressed/kaslr.c +2 −1
  2230. arch/x86/boot/compressed/pgtable_64.c +1 −0
  2231. arch/x86/boot/startup/sme.c +1 −0
  2232. arch/x86/boot/string.c +5 −25
  2233. arch/x86/boot/string.h +0 −1
  2234. arch/x86/coco/sev/core.c +2 −6
  2235. arch/x86/coco/sev/internal.h +3 −0
  2236. arch/x86/coco/sev/noinstr.c +3 −1
  2237. arch/x86/coco/sev/svsm.c +2 −8
  2238. arch/x86/coco/sev/vc-handle.c +10 −2
  2239. arch/x86/coco/tdx/tdx.c +1 −0
  2240. arch/x86/entry/Makefile +1 −1
  2241. arch/x86/entry/common.c +61 −0
  2242. arch/x86/entry/entry.S +48 −0
  2243. arch/x86/entry/entry_64.S +2 −2
  2244. arch/x86/entry/entry_64_fred.S +0 −1
  2245. arch/x86/entry/entry_fred.c +0 −10
  2246. arch/x86/entry/vdso/common/vfutex.c +71 −0
  2247. arch/x86/entry/vdso/vdso32/Makefile +3 −2
  2248. arch/x86/entry/vdso/vdso32/sigreturn.S +0 −10
  2249. arch/x86/entry/vdso/vdso32/vdso32.lds.S +3 −0
  2250. arch/x86/entry/vdso/vdso32/vfutex.c +1 −0
  2251. arch/x86/entry/vdso/vdso64/Makefile +4 −3
  2252. arch/x86/entry/vdso/vdso64/vdso64.lds.S +7 −0
  2253. arch/x86/entry/vdso/vdso64/vdsox32.lds.S +7 −0
  2254. arch/x86/entry/vdso/vdso64/vfutex.c +1 −0
  2255. arch/x86/entry/vdso/vma.c +30 −1
  2256. arch/x86/events/amd/core.c +6 −4
  2257. arch/x86/events/amd/ibs.c +2 −1
  2258. arch/x86/events/amd/lbr.c +2 −0
  2259. arch/x86/events/amd/power.c +3 −0
  2260. arch/x86/events/amd/uncore.c +6 −5
  2261. arch/x86/events/core.c +1 −1
  2262. arch/x86/events/intel/core.c +412 −84
  2263. arch/x86/events/intel/ds.c +21 −13
  2264. arch/x86/events/intel/knc.c +1 −1
  2265. arch/x86/events/intel/lbr.c +1 −0
  2266. arch/x86/events/intel/p4.c +1 −1
  2267. arch/x86/events/intel/uncore.c +31 −1
  2268. arch/x86/events/intel/uncore.h +2 −1
  2269. arch/x86/events/intel/uncore_discovery.c +31 −15
  2270. arch/x86/events/intel/uncore_snb.c +0 −7
  2271. arch/x86/events/intel/uncore_snbep.c +12 −24
  2272. arch/x86/events/perf_event.h +4 −4
  2273. arch/x86/events/zhaoxin/core.c +2 −1
  2274. arch/x86/hyperv/hv_init.c +1 −1
  2275. arch/x86/hyperv/hv_vtl.c +34 −4
  2276. arch/x86/hyperv/irqdomain.c +104 −94
  2277. arch/x86/include/asm/Kbuild +1 −0
  2278. arch/x86/include/asm/acpi.h +16 −0
  2279. arch/x86/include/asm/acrn.h +2 −0
  2280. arch/x86/include/asm/bug.h +3 −1
  2281. arch/x86/include/asm/cpu_device_id.h +1 −4
  2282. arch/x86/include/asm/cpufeature.h +0 −1
  2283. arch/x86/include/asm/cpufeatures.h +2 −0
  2284. arch/x86/include/asm/cpuid/api.h +250 −3
  2285. arch/x86/include/asm/cpuid/leaf_types.h +2350 −0
  2286. arch/x86/include/asm/cpuid/types.h +98 −0
  2287. arch/x86/include/asm/desc.h +4 −0
  2288. arch/x86/include/asm/desc_defs.h +1 −1
  2289. arch/x86/include/asm/device.h +0 −11
  2290. arch/x86/include/asm/elf.h +2 −3
  2291. arch/x86/include/asm/entry-common.h +2 −0
  2292. arch/x86/include/asm/extable_fixup_types.h +4 −9
  2293. arch/x86/include/asm/fpu/api.h +0 −6
  2294. arch/x86/include/asm/fred.h +0 −1
  2295. arch/x86/include/asm/futex_robust.h +19 −0
  2296. arch/x86/include/asm/hardirq.h +52 −33
  2297. arch/x86/include/asm/hw_irq.h +0 −4
  2298. arch/x86/include/asm/idtentry.h +3 −26
  2299. arch/x86/include/asm/intel-family.h +2 −0
  2300. arch/x86/include/asm/kvm-x86-ops.h +2 −3
  2301. arch/x86/include/asm/kvm-x86-pmu-ops.h +4 −1
  2302. arch/x86/include/asm/kvm_host.h +88 −72
  2303. arch/x86/include/asm/kvm_vcpu_regs.h +101 −8
  2304. arch/x86/include/asm/mce.h +0 −3
  2305. arch/x86/include/asm/microcode.h +1 −0
  2306. arch/x86/include/asm/msr-index.h +1 −0
  2307. arch/x86/include/asm/msr.h +2 −31
  2308. arch/x86/include/asm/nospec-branch.h +4 −0
  2309. arch/x86/include/asm/paravirt.h +4 −5
  2310. arch/x86/include/asm/paravirt_types.h +1 −10
  2311. arch/x86/include/asm/percpu.h +0 −5
  2312. arch/x86/include/asm/percpu_types.h +17 −0
  2313. arch/x86/include/asm/perf_event.h +2 −0
  2314. arch/x86/include/asm/pgtable.h +12 −0
  2315. arch/x86/include/asm/processor.h +8 −1
  2316. arch/x86/include/asm/purgatory.h +1 −1
  2317. arch/x86/include/asm/seamldr.h +38 −0
  2318. arch/x86/include/asm/sev.h +2 −2
  2319. arch/x86/include/asm/shared/tdx.h +1 −0
  2320. arch/x86/include/asm/shared/tdx_errno.h +4 −4
  2321. arch/x86/include/asm/string_32.h +0 −3
  2322. arch/x86/include/asm/svm.h +1 −0
  2323. arch/x86/include/asm/tdx.h +27 −75
  2324. arch/x86/include/asm/tdx_global_metadata.h +4 −0
  2325. arch/x86/include/asm/timex.h +1 −2
  2326. arch/x86/include/asm/topology.h +3 −0
  2327. arch/x86/include/asm/trace_clock.h +0 −8
  2328. arch/x86/include/asm/tsc.h +1 −12
  2329. arch/x86/include/asm/vdso.h +4 −0
  2330. arch/x86/include/asm/vermagic.h +0 −6
  2331. arch/x86/include/asm/vmx.h +13 −2
  2332. arch/x86/include/asm/x86_init.h +3 −0
  2333. arch/x86/include/asm/xen/hypervisor.h +2 −24
  2334. arch/x86/include/uapi/asm/kvm.h +2 −0
  2335. arch/x86/kernel/Makefile +2 −2
  2336. arch/x86/kernel/acpi/madt_wakeup.c +16 −0
  2337. arch/x86/kernel/apic/apic.c +4 −3
  2338. arch/x86/kernel/apic/apic_common.c +0 −1
  2339. arch/x86/kernel/apic/io_apic.c +1 −3
  2340. arch/x86/kernel/apic/ipi.c +1 −1
  2341. arch/x86/kernel/cpu/Makefile +1 −0
  2342. arch/x86/kernel/cpu/acrn.c +1 −1
  2343. arch/x86/kernel/cpu/amd.c +2 −1
  2344. arch/x86/kernel/cpu/bugs.c +45 −5
  2345. arch/x86/kernel/cpu/centaur.c +1 −0
  2346. arch/x86/kernel/cpu/common.c +4 −8
  2347. arch/x86/kernel/cpu/cpu.h +0 −1
  2348. arch/x86/kernel/cpu/cpuid-deps.c +1 −0
  2349. arch/x86/kernel/cpu/cpuid_parser.c +182 −0
  2350. arch/x86/kernel/cpu/cpuid_parser.h +120 −0
  2351. arch/x86/kernel/cpu/hygon.c +1 −0
  2352. arch/x86/kernel/cpu/intel.c +3 −12
  2353. arch/x86/kernel/cpu/mce/amd.c +4 −4
  2354. arch/x86/kernel/cpu/mce/core.c +3 −6
  2355. arch/x86/kernel/cpu/mce/inject.c +5 −4
  2356. arch/x86/kernel/cpu/mce/threshold.c +1 −1
  2357. arch/x86/kernel/cpu/microcode/amd.c +10 −7
  2358. arch/x86/kernel/cpu/microcode/core.c +12 −13
  2359. arch/x86/kernel/cpu/microcode/intel-ucode-defs.h +241 −238
  2360. arch/x86/kernel/cpu/microcode/intel.c +4 −0
  2361. arch/x86/kernel/cpu/microcode/internal.h +0 −1
  2362. arch/x86/kernel/cpu/mshyperv.c +3 −2
  2363. arch/x86/kernel/cpu/resctrl/core.c +1 −0
  2364. arch/x86/kernel/cpu/resctrl/monitor.c +15 −3
  2365. arch/x86/kernel/cpu/scattered.c +1 −0
  2366. arch/x86/kernel/cpu/sgx/driver.c +3 −0
  2367. arch/x86/kernel/cpu/sgx/main.c +3 −0
  2368. arch/x86/kernel/cpu/topology_amd.c +2 −1
  2369. arch/x86/kernel/cpu/topology_common.c +1 −0
  2370. arch/x86/kernel/cpu/topology_ext.c +2 −1
  2371. arch/x86/kernel/cpu/transmeta.c +3 −0
  2372. arch/x86/kernel/cpu/umc.c +0 −26
  2373. arch/x86/kernel/cpu/vmware.c +1 −0
  2374. arch/x86/kernel/cpu/zhaoxin.c +1 −0
  2375. arch/x86/kernel/cpuid.c +3 −3
  2376. arch/x86/kernel/crash.c +2 −0
  2377. arch/x86/kernel/devicetree.c +47 −0
  2378. arch/x86/kernel/fpu/core.c +0 −5
  2379. arch/x86/kernel/fpu/init.c +1 −8
  2380. arch/x86/kernel/fpu/signal.c +8 −3
  2381. arch/x86/kernel/ftrace.c +7 −0
  2382. arch/x86/kernel/i8253.c +1 −1
  2383. arch/x86/kernel/i8259.c +1 −1
  2384. arch/x86/kernel/idt.c +7 −0
  2385. arch/x86/kernel/irq.c +114 −167
  2386. arch/x86/kernel/irq_work.c +1 −1
  2387. arch/x86/kernel/jailhouse.c +1 −0
  2388. arch/x86/kernel/kvm.c +2 −1
  2389. arch/x86/kernel/kvmclock.c +29 −7
  2390. arch/x86/kernel/machine_kexec_64.c +0 −16
  2391. arch/x86/kernel/module.c +0 −15
  2392. arch/x86/kernel/msr.c +4 −4
  2393. arch/x86/kernel/nmi.c +2 −3
  2394. arch/x86/kernel/paravirt.c +2 −5
  2395. arch/x86/kernel/pmem.c +2 −0
  2396. arch/x86/kernel/process.c +4 −3
  2397. arch/x86/kernel/process_64.c +1 −1
  2398. arch/x86/kernel/smp.c +3 −3
  2399. arch/x86/kernel/smpboot.c +20 −0
  2400. arch/x86/kernel/traps.c +0 −21
  2401. arch/x86/kernel/tsc.c +0 −13
  2402. arch/x86/kernel/uprobes.c +18 −8
  2403. arch/x86/kernel/vmlinux.lds.S +1 −4
  2404. arch/x86/kernel/x86_init.c +3 −0
  2405. arch/x86/kvm/cpuid.c +11 −10
  2406. arch/x86/kvm/cpuid.h +10 −6
  2407. arch/x86/kvm/debugfs.c +1 −1
  2408. arch/x86/kvm/emulate.c +6 −16
  2409. arch/x86/kvm/hyperv.c +17 −13
  2410. arch/x86/kvm/hyperv.h +2 −2
  2411. arch/x86/kvm/i8259.c +2 −1
  2412. arch/x86/kvm/ioapic.c +5 −4
  2413. arch/x86/kvm/irq.c +4 −0
  2414. arch/x86/kvm/kvm-asm-offsets.c +1 −0
  2415. arch/x86/kvm/kvm_cache_regs.h +0 −249
  2416. arch/x86/kvm/kvm_emulate.h +8 −9
  2417. arch/x86/kvm/lapic.c +50 −5
  2418. arch/x86/kvm/lapic.h +2 −1
  2419. arch/x86/kvm/mmu.h +22 −10
  2420. arch/x86/kvm/mmu/mmu.c +157 −76
  2421. arch/x86/kvm/mmu/mmutrace.h +12 −9
  2422. arch/x86/kvm/mmu/paging_tmpl.h +72 −35
  2423. arch/x86/kvm/mmu/spte.c +61 −34
  2424. arch/x86/kvm/mmu/spte.h +40 −30
  2425. arch/x86/kvm/mmu/tdp_mmu.c +124 −165
  2426. arch/x86/kvm/pmu.c +22 −5
  2427. arch/x86/kvm/pmu.h +35 −9
  2428. arch/x86/kvm/regs.h +423 −0
  2429. arch/x86/kvm/reverse_cpuid.h +2 −0
  2430. arch/x86/kvm/smm.c +1 −1
  2431. arch/x86/kvm/svm/avic.c +51 −49
  2432. arch/x86/kvm/svm/nested.c +163 −56
  2433. arch/x86/kvm/svm/pmu.c +42 −0
  2434. arch/x86/kvm/svm/sev.c +534 −496
  2435. arch/x86/kvm/svm/svm.c +102 −40
  2436. arch/x86/kvm/svm/svm.h +54 −8
  2437. arch/x86/kvm/svm/vmenter.S +45 −165
  2438. arch/x86/kvm/vmenter.h +111 −0
  2439. arch/x86/kvm/vmx/capabilities.h +7 −5
  2440. arch/x86/kvm/vmx/common.h +17 −9
  2441. arch/x86/kvm/vmx/hyperv_evmcs.h +1 −0
  2442. arch/x86/kvm/vmx/main.c +9 −0
  2443. arch/x86/kvm/vmx/nested.c +73 −26
  2444. arch/x86/kvm/vmx/nested.h +1 −1
  2445. arch/x86/kvm/vmx/pmu_intel.c +15 −4
  2446. arch/x86/kvm/vmx/run_flags.h +0 −9
  2447. arch/x86/kvm/vmx/sgx.c +4 −3
  2448. arch/x86/kvm/vmx/tdx.c +212 −142
  2449. arch/x86/kvm/vmx/tdx.h +0 −1
  2450. arch/x86/kvm/vmx/vmenter.S +58 −171
  2451. arch/x86/kvm/vmx/vmx.c +88 −112
  2452. arch/x86/kvm/vmx/vmx.h +16 −18
  2453. arch/x86/kvm/vmx/x86_ops.h +6 −0
  2454. arch/x86/kvm/x86.c +195 −250
  2455. arch/x86/kvm/x86.h +22 −117
  2456. arch/x86/kvm/xen.c +21 −18
  2457. arch/x86/lib/msr-smp.c +14 −75
  2458. arch/x86/lib/string_32.c +0 −19
  2459. arch/x86/math-emu/Makefile +0 −30
  2460. arch/x86/math-emu/README +0 −427
  2461. arch/x86/math-emu/control_w.h +0 −46
  2462. arch/x86/math-emu/div_Xsig.S +0 −367
  2463. arch/x86/math-emu/div_small.S +0 −48
  2464. arch/x86/math-emu/errors.c +0 −686
  2465. arch/x86/math-emu/exception.h +0 −51
  2466. arch/x86/math-emu/fpu_arith.c +0 −153
  2467. arch/x86/math-emu/fpu_asm.h +0 −32
  2468. arch/x86/math-emu/fpu_aux.c +0 −267
  2469. arch/x86/math-emu/fpu_emu.h +0 −218
  2470. arch/x86/math-emu/fpu_entry.c +0 −718
  2471. arch/x86/math-emu/fpu_etc.c +0 −136
  2472. arch/x86/math-emu/fpu_proto.h +0 −157
  2473. arch/x86/math-emu/fpu_system.h +0 −130
  2474. arch/x86/math-emu/fpu_tags.c +0 −116
  2475. arch/x86/math-emu/fpu_trig.c +0 −1649
  2476. arch/x86/math-emu/get_address.c +0 −401
  2477. arch/x86/math-emu/load_store.c +0 −322
  2478. arch/x86/math-emu/mul_Xsig.S +0 −179
  2479. arch/x86/math-emu/poly.h +0 −115
  2480. arch/x86/math-emu/poly_2xm1.c +0 −146
  2481. arch/x86/math-emu/poly_atan.c +0 −209
  2482. arch/x86/math-emu/poly_l2.c +0 −245
  2483. arch/x86/math-emu/poly_sin.c +0 −379
  2484. arch/x86/math-emu/poly_tan.c +0 −213
  2485. arch/x86/math-emu/polynom_Xsig.S +0 −137
  2486. arch/x86/math-emu/reg_add_sub.c +0 −334
  2487. arch/x86/math-emu/reg_compare.c +0 −479
  2488. arch/x86/math-emu/reg_constant.c +0 −123
  2489. arch/x86/math-emu/reg_constant.h +0 −26
  2490. arch/x86/math-emu/reg_convert.c +0 −47
  2491. arch/x86/math-emu/reg_divide.c +0 −183
  2492. arch/x86/math-emu/reg_ld_str.c +0 −1220
  2493. arch/x86/math-emu/reg_mul.c +0 −116
  2494. arch/x86/math-emu/reg_norm.S +0 −150
  2495. arch/x86/math-emu/reg_round.S +0 −711
  2496. arch/x86/math-emu/reg_u_add.S +0 −169
  2497. arch/x86/math-emu/reg_u_div.S +0 −474
  2498. arch/x86/math-emu/reg_u_mul.S +0 −150
  2499. arch/x86/math-emu/reg_u_sub.S +0 −274
  2500. arch/x86/math-emu/round_Xsig.S +0 −142
  2501. arch/x86/math-emu/shr_Xsig.S +0 −89
  2502. arch/x86/math-emu/status_w.h +0 −68
  2503. arch/x86/math-emu/version.h +0 −12
  2504. arch/x86/math-emu/wm_shrx.S +0 −207
  2505. arch/x86/math-emu/wm_sqrt.S +0 −472
  2506. arch/x86/mm/extable.c +1 −1
  2507. arch/x86/mm/fault.c +13 −4
  2508. arch/x86/mm/init_64.c +29 −16
  2509. arch/x86/mm/pgtable.c +0 −11
  2510. arch/x86/mm/pti.c +1 −0
  2511. arch/x86/mm/tlb.c +8 −13
  2512. arch/x86/net/bpf_jit_comp.c +175 −35
  2513. arch/x86/pci/xen.c +1 −0
  2514. arch/x86/platform/geode/geode-common.c +5 −7
  2515. arch/x86/platform/olpc/olpc-xo15-sci.c +19 −14
  2516. arch/x86/platform/uv/uv_nmi.c +2 −1
  2517. arch/x86/realmode/init.c +3 −4
  2518. arch/x86/tools/vdso2c.c +10 −6
  2519. arch/x86/virt/hw.c +14 −1
  2520. arch/x86/virt/svm/sev.c +16 −2
  2521. arch/x86/virt/vmx/tdx/Makefile +1 −1
  2522. arch/x86/virt/vmx/tdx/seamcall_internal.h +109 −0
  2523. arch/x86/virt/vmx/tdx/seamldr.c +368 −0
  2524. arch/x86/virt/vmx/tdx/tdx.c +188 −95
  2525. arch/x86/virt/vmx/tdx/tdx.h +6 −3
  2526. arch/x86/virt/vmx/tdx/tdx_global_metadata.c +15 −2
  2527. arch/x86/xen/Kconfig +1 −8
  2528. arch/x86/xen/Makefile +0 −2
  2529. arch/x86/xen/debugfs.c +0 −16
  2530. arch/x86/xen/enlighten.c +2 −1
  2531. arch/x86/xen/enlighten_hvm.c +2 −1
  2532. arch/x86/xen/enlighten_pv.c +14 −19
  2533. arch/x86/xen/mmu_pv.c +38 −51
  2534. arch/x86/xen/p2m.c +0 −45
  2535. arch/x86/xen/pmu.c +1 −0
  2536. arch/x86/xen/smp.c +3 −3
  2537. arch/x86/xen/smp_pv.c +1 −1
  2538. arch/x86/xen/time.c +1 −0
  2539. arch/x86/xen/xen-ops.h +117 −127
  2540. arch/xtensa/include/asm/Kbuild +1 −0
  2541. arch/xtensa/include/asm/string.h +0 −25
  2542. arch/xtensa/include/asm/uaccess.h +1 −2
  2543. arch/xtensa/kernel/irq.c +1 −1
  2544. block/Kconfig +8 −0
  2545. block/Makefile +3 −0
  2546. block/bdev.c +7 −6
  2547. block/bfq-cgroup.c +56 −28
  2548. block/bfq-iosched.c +2 −6
  2549. block/bio-integrity-auto.c +1 −1
  2550. block/bio-integrity-fs.c +7 −3
  2551. block/bio-integrity.c +4 −5
  2552. block/bio.c +40 −33
  2553. block/blk-cgroup-rwstat.c +9 −6
  2554. block/blk-cgroup.c +137 −159
  2555. block/blk-cgroup.h +13 −8
  2556. block/blk-core.c +73 −38
  2557. block/blk-crypto-fallback.c +8 −10
  2558. block/blk-crypto-profile.c +2 −0
  2559. block/blk-crypto.c +4 −2
  2560. block/blk-iocost.c +188 −140
  2561. block/blk-iolatency.c +20 −9
  2562. block/blk-merge.c +7 −10
  2563. block/blk-mq-debugfs.c +18 −6
  2564. block/blk-mq-tag.c +6 −0
  2565. block/blk-mq.c +14 −63
  2566. block/blk-settings.c +2 −0
  2567. block/blk-sysfs.c +5 −0
  2568. block/blk-throttle.c +80 −18
  2569. block/blk-zoned.c +4 −5
  2570. block/blk.h +32 −0
  2571. block/bsg-lib.c +1 −1
  2572. block/error-injection.c +315 −0
  2573. block/error-injection.h +21 −0
  2574. block/fops.c +1 −26
  2575. block/genhd.c +4 −0
  2576. block/ioctl.c +1 −1
  2577. block/kyber-iosched.c +5 −2
  2578. block/mq-deadline.c +8 −4
  2579. block/partitions/acorn.c +3 −2
  2580. block/partitions/aix.c +9 −0
  2581. block/partitions/core.c +3 −3
  2582. block/partitions/of.c +4 −1
  2583. certs/Kconfig +8 −8
  2584. crypto/Kconfig +57 −81
  2585. crypto/Makefile +9 −10
  2586. crypto/acompress.c +3 −5
  2587. crypto/aead.c +4 −6
  2588. crypto/aegis128-neon-inner.c +1 −3
  2589. crypto/af_alg.c +30 −80
  2590. crypto/ahash.c +3 −75
  2591. crypto/akcipher.c +3 −5
  2592. crypto/algif_aead.c +14 −37
  2593. crypto/algif_hash.c +2 −2
  2594. crypto/algif_rng.c +2 −2
  2595. crypto/algif_skcipher.c +15 −53
  2596. crypto/api.c +10 −66
  2597. crypto/asymmetric_keys/Kconfig +0 −1
  2598. crypto/asymmetric_keys/verify_pefile.c +2 −0
  2599. crypto/asymmetric_keys/x509_loader.c +1 −1
  2600. crypto/async_tx/async_pq.c +5 −4
  2601. crypto/async_tx/async_raid6_recov.c +5 −4
  2602. crypto/authencesn.c +16 −17
  2603. crypto/chacha20poly1305.c +9 −2
  2604. crypto/cipher.c +0 −28
  2605. crypto/cmac.c +0 −16
  2606. crypto/cryptd.c +0 −16
  2607. crypto/crypto_null.c +2 −33
  2608. crypto/crypto_user.c +6 −8
  2609. crypto/df_sp80090a.c +0 −222
  2610. crypto/drbg.c +243 −1530
  2611. crypto/ecc.c +20 −11
  2612. crypto/ecrdsa.c +1 −6
  2613. crypto/hmac.c +0 −31
  2614. crypto/internal.h +0 −10
  2615. crypto/jitterentropy.c +3 −3
  2616. crypto/kpp.c +3 −5
  2617. crypto/krb5/krb5_api.c +49 −7
  2618. crypto/lskcipher.c +4 −6
  2619. crypto/pcbc.c +0 −195
  2620. crypto/pcrypt.c +4 −0
  2621. crypto/rng.c +14 −5
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  3488. drivers/crypto/caam/key_gen.c +2 −2
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  3498. drivers/crypto/ccree/cc_cipher.c +3 −4
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  3505. drivers/crypto/hisilicon/qm.c +272 −62
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  3507. drivers/crypto/hisilicon/sec2/sec_main.c +6 −7
  3508. drivers/crypto/hisilicon/trng/Makefile +0 −2
  3509. drivers/crypto/hisilicon/trng/trng.c +0 −390
  3510. drivers/crypto/hisilicon/zip/zip_main.c +8 −12
  3511. drivers/crypto/img-hash.c +0 −1
  3512. drivers/crypto/inside-secure/eip93/eip93-main.c +2 −1
  3513. drivers/crypto/inside-secure/eip93/eip93-regs.h +1 −1
  3514. drivers/crypto/inside-secure/safexcel.c +2 −2
  3515. drivers/crypto/intel/ixp4xx/ixp4xx_crypto.c +14 −11
  3516. drivers/crypto/intel/keembay/keembay-ocs-hcu-core.c +0 −1
  3517. drivers/crypto/intel/qat/qat_420xx/adf_drv.c +4 −7
  3518. drivers/crypto/intel/qat/qat_4xxx/adf_drv.c +4 −7
  3519. drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c +20 −1
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  3521. drivers/crypto/intel/qat/qat_6xxx/adf_drv.c +6 −2
  3522. drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c +2 −4
  3523. drivers/crypto/intel/qat/qat_c3xxxvf/adf_drv.c +1 −3
  3524. drivers/crypto/intel/qat/qat_c62x/adf_drv.c +2 −4
  3525. drivers/crypto/intel/qat/qat_c62xvf/adf_drv.c +1 −3
  3526. drivers/crypto/intel/qat/qat_common/Makefile +3 −1
  3527. drivers/crypto/intel/qat/qat_common/adf_accel_devices.h +4 −5
  3528. drivers/crypto/intel/qat/qat_common/adf_admin.c +39 −0
  3529. drivers/crypto/intel/qat/qat_common/adf_admin.h +2 −0
  3530. drivers/crypto/intel/qat/qat_common/adf_aer.c +82 −38
  3531. drivers/crypto/intel/qat/qat_common/adf_cfg.c +0 −10
  3532. drivers/crypto/intel/qat/qat_common/adf_cfg.h +0 −1
  3533. drivers/crypto/intel/qat/qat_common/adf_cfg_common.h +0 −32
  3534. drivers/crypto/intel/qat/qat_common/adf_cfg_services.c +3 −4
  3535. drivers/crypto/intel/qat/qat_common/adf_cfg_user.h +0 −38
  3536. drivers/crypto/intel/qat/qat_common/adf_common_drv.h +3 −11
  3537. drivers/crypto/intel/qat/qat_common/adf_ctl_drv.c +0 −466
  3538. drivers/crypto/intel/qat/qat_common/adf_dev_mgr.c +0 −70
  3539. drivers/crypto/intel/qat/qat_common/adf_heartbeat_inject.c +2 −4
  3540. drivers/crypto/intel/qat/qat_common/adf_hw_arbiter.c +0 −25
  3541. drivers/crypto/intel/qat/qat_common/adf_init.c +26 −0
  3542. drivers/crypto/intel/qat/qat_common/adf_isr.c +39 −0
  3543. drivers/crypto/intel/qat/qat_common/adf_kpt.c +56 −0
  3544. drivers/crypto/intel/qat/qat_common/adf_kpt.h +29 −0
  3545. drivers/crypto/intel/qat/qat_common/adf_module.c +63 −0
  3546. drivers/crypto/intel/qat/qat_common/adf_sriov.c +30 −4
  3547. drivers/crypto/intel/qat/qat_common/adf_sysfs_kpt.c +296 −0
  3548. drivers/crypto/intel/qat/qat_common/adf_sysfs_kpt.h +10 −0
  3549. drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h +8 −0
  3550. drivers/crypto/intel/qat/qat_common/icp_qat_hw.h +2 −1
  3551. drivers/crypto/intel/qat/qat_common/qat_asym_algs.c +5 −5
  3552. drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c +2 −4
  3553. drivers/crypto/intel/qat/qat_dh895xccvf/adf_drv.c +1 −3
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  3557. drivers/crypto/marvell/cesa/cesa.c +6 −10
  3558. drivers/crypto/marvell/cesa/cesa.h +21 −21
  3559. drivers/crypto/marvell/octeontx/otx_cptpf_main.c +1 −1
  3560. drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c +2 −3
  3561. drivers/crypto/marvell/octeontx/otx_cptvf_main.c +3 −3
  3562. drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.c +2 −2
  3563. drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c +1 −1
  3564. drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c +4 −4
  3565. drivers/crypto/nx/nx.c +2 −4
  3566. drivers/crypto/nx/nx.h +1 −1
  3567. drivers/crypto/omap-aes.c +22 −21
  3568. drivers/crypto/omap-des.c +19 −13
  3569. drivers/crypto/omap-sham.c +16 −11
  3570. drivers/crypto/qce/core.c +0 −1
  3571. drivers/crypto/qcom-rng.c +1 −1
  3572. drivers/crypto/starfive/jh7110-cryp.c +6 −12
  3573. drivers/crypto/talitos.c +285 −294
  3574. drivers/crypto/talitos.h +15 −2
  3575. drivers/crypto/tegra/tegra-se-aes.c +18 −15
  3576. drivers/crypto/tegra/tegra-se-main.c +2 −4
  3577. drivers/crypto/ti/dthev2-common.c +0 −1
  3578. drivers/crypto/xilinx/Makefile +0 −1
  3579. drivers/crypto/xilinx/zynqmp-aes-gcm.c +0 −1
  3580. drivers/cxl/acpi.c +5 −5
  3581. drivers/cxl/core/core.h +2 −0
  3582. drivers/cxl/core/features.c +1 −1
  3583. drivers/cxl/core/memdev.c +16 −4
  3584. drivers/cxl/core/pci.c +13 −13
  3585. drivers/cxl/core/port.c +6 −1
  3586. drivers/cxl/core/ras.c +20 −7
  3587. drivers/cxl/core/region.c +210 −60
  3588. drivers/cxl/core/trace.h +16 −8
  3589. drivers/cxl/cxl.h +22 −6
  3590. drivers/cxl/cxlmem.h +28 −6
  3591. drivers/cxl/mem.c +85 −20
  3592. drivers/cxl/pci.c +1 −1
  3593. drivers/cxl/port.c +1 −1
  3594. drivers/dax/bus.c +1 −1
  3595. drivers/dax/kmem.c +6 −0
  3596. drivers/devfreq/devfreq-event.c +13 −10
  3597. drivers/devfreq/hisi_uncore_freq.c +0 −1
  3598. drivers/devfreq/imx8m-ddrc.c +0 −1
  3599. drivers/dibs/Kconfig +5 −5
  3600. drivers/dio/dio.c +8 −7
  3601. drivers/dma-buf/.kunitconfig +2 −0
  3602. drivers/dma-buf/Kconfig +7 −4
  3603. drivers/dma-buf/Makefile +2 −3
  3604. drivers/dma-buf/dma-buf.c +5 −1
  3605. drivers/dma-buf/dma-fence-array.c +4 −9
  3606. drivers/dma-buf/dma-fence-unwrap.c +4 −2
  3607. drivers/dma-buf/dma-fence.c +5 −4
  3608. drivers/dma-buf/dma-heap.c +1 −0
  3609. drivers/dma-buf/dma-resv.c +1 −2
  3610. drivers/dma-buf/heaps/Kconfig +10 −2
  3611. drivers/dma-buf/heaps/cma_heap.c +3 −0
  3612. drivers/dma-buf/heaps/system_heap.c +15 −6
  3613. drivers/dma-buf/selftest.c +0 −167
  3614. drivers/dma-buf/selftest.h +0 −30
  3615. drivers/dma-buf/selftests.h +0 −16
  3616. drivers/dma-buf/st-dma-fence-chain.c +94 −119
.clang-format+2−0
@@ -481,6 +481,7 @@ ForEachMacros: · 480 unmodified lines
481 - 'genradix_for_each'481 - 'genradix_for_each'
482 - 'genradix_for_each_from'482 - 'genradix_for_each_from'
483 - 'genradix_for_each_reverse'483 - 'genradix_for_each_reverse'
484 - 'guard'
484 - 'hash_for_each'485 - 'hash_for_each'
485 - 'hash_for_each_possible'486 - 'hash_for_each_possible'
486 - 'hash_for_each_possible_rcu'487 - 'hash_for_each_possible_rcu'
@@ -674,6 +675,7 @@ ForEachMacros: · 187 unmodified lines
674 - 'rq_list_for_each'675 - 'rq_list_for_each'
675 - 'rq_list_for_each_safe'676 - 'rq_list_for_each_safe'
676 - 'sample_read_group__for_each'677 - 'sample_read_group__for_each'
678 - 'scoped_guard'
677 - 'scsi_for_each_prot_sg'679 - 'scsi_for_each_prot_sg'
678 - 'scsi_for_each_sg'680 - 'scsi_for_each_sg'
679 - 'sctp_for_each_hentry'681 - 'sctp_for_each_hentry'
.gitignore+6−0
@@ -49,6 +49,7 @@ · 48 unmodified lines
49*.s49*.s
50*.so50*.so
51*.so.dbg51*.so.dbg
52*.spdx.json
52*.su53*.su
53*.symtypes54*.symtypes
54*.tab.[ch]55*.tab.[ch]
@@ -57,6 +58,7 @@ · 2 unmodified lines
57*.zst58*.zst
58Module.symvers59Module.symvers
59dtbs-list60dtbs-list
61builtin.order
60modules.order62modules.order
61 63
62#64#
@@ -68,6 +70,7 @@ modules.order · 5 unmodified lines
68/vmlinux.3270/vmlinux.32
69/vmlinux.map71/vmlinux.map
70/vmlinux.symvers72/vmlinux.symvers
73/vmlinux.thinlto-index
71/vmlinux.unstripped74/vmlinux.unstripped
72/vmlinux-gdb.py75/vmlinux-gdb.py
73/vmlinuz76/vmlinuz
@@ -186,5 +189,8 @@ sphinx_*/ · 112 unmodified lines
186# Rust analyzer configuration189# Rust analyzer configuration
187/rust-project.json190/rust-project.json
188 191
192# rustc error message long types
193*.long-type-*.txt
194
189# bc language scripts (not LLVM bitcode)195# bc language scripts (not LLVM bitcode)
190!kernel/time/timeconst.bc196!kernel/time/timeconst.bc
.mailmap+25−13
@@ -36,13 +36,14 @@ Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru> · 35 unmodified lines
36Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo.com>36Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo.com>
37Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>37Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>
38Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@futurfusion.io>38Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@futurfusion.io>
39Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin.ext@nsn.com>39Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin.ext@nsn.com>
40Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@gmx.de>40Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@gmail.com>
41Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@nokia.com>41Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@gmx.de>
42Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@nsn.com>42Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@nokia.com>
43Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@siemens.com>43Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@nsn.com>
44Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@sysgo.com>44Alexander Sverdlin <alex@sverdlin.org> <alexander.sverdlin@sysgo.com>
45Alexander Sverdlin <alexander.sverdlin@gmail.com> <subaparts@yandex.ru>45Alexander Sverdlin <alex@sverdlin.org> <asv@kernel.org>
46Alexander Sverdlin <alex@sverdlin.org> <subaparts@yandex.ru>
46Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com>47Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com>
47Alexandre Ghiti <alex@ghiti.fr> <alexandre.ghiti@canonical.com>48Alexandre Ghiti <alex@ghiti.fr> <alexandre.ghiti@canonical.com>
48Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org>49Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org>
@@ -117,6 +118,7 @@ Asutosh Das <quic_asutoshd@quicinc.com> <asutoshd@codeaurora.org> · 68 unmodified lines
117Atish Patra <atish.patra@linux.dev> <atishp@atishpatra.org>118Atish Patra <atish.patra@linux.dev> <atishp@atishpatra.org>
118Atish Patra <atish.patra@linux.dev> <atish.patra@wdc.com>119Atish Patra <atish.patra@linux.dev> <atish.patra@wdc.com>
119Avaneesh Kumar Dwivedi <quic_akdwived@quicinc.com> <akdwived@codeaurora.org>120Avaneesh Kumar Dwivedi <quic_akdwived@quicinc.com> <akdwived@codeaurora.org>
121Avri Altman <avri.altman@sandisk.com> <avri.altman@wdc.com>
120Axel Dyks <xl@xlsigned.net>122Axel Dyks <xl@xlsigned.net>
121Axel Lin <axel.lin@gmail.com>123Axel Lin <axel.lin@gmail.com>
122Balakrishna Godavarthi <quic_bgodavar@quicinc.com> <bgodavar@codeaurora.org>124Balakrishna Godavarthi <quic_bgodavar@quicinc.com> <bgodavar@codeaurora.org>
@@ -126,6 +128,7 @@ Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@linaro.org> · 3 unmodified lines
126Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@spreadtrum.com>128Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@spreadtrum.com>
127Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@unisoc.com>129Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@unisoc.com>
128Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang7@gmail.com>130Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang7@gmail.com>
131Baoquan He <baoquan.he@linux.dev> <bhe@redhat.com>
129Barry Song <baohua@kernel.org> <21cnbao@gmail.com>132Barry Song <baohua@kernel.org> <21cnbao@gmail.com>
130Barry Song <baohua@kernel.org> <v-songbaohua@oppo.com>133Barry Song <baohua@kernel.org> <v-songbaohua@oppo.com>
131Barry Song <baohua@kernel.org> <song.bao.hua@hisilicon.com>134Barry Song <baohua@kernel.org> <song.bao.hua@hisilicon.com>
@@ -201,9 +204,9 @@ Christophe Ricard <christophe.ricard@gmail.com> · 69 unmodified lines
201Christopher Obbard <christopher.obbard@linaro.org> <chris.obbard@collabora.com>204Christopher Obbard <christopher.obbard@linaro.org> <chris.obbard@collabora.com>
202Christoph Hellwig <hch@lst.de>205Christoph Hellwig <hch@lst.de>
203Christoph Manszewski <c.manszewski@gmail.com> <christoph.manszewski@intel.com>206Christoph Manszewski <c.manszewski@gmail.com> <christoph.manszewski@intel.com>
204Chuck Lever <chuck.lever@oracle.com> <cel@kernel.org>207Chuck Lever <cel@kernel.org> <chuck.lever@oracle.com>
205Chuck Lever <chuck.lever@oracle.com> <cel@netapp.com>208Chuck Lever <cel@kernel.org> <cel@netapp.com>
206Chuck Lever <chuck.lever@oracle.com> <cel@citi.umich.edu>209Chuck Lever <cel@kernel.org> <cel@citi.umich.edu>
207Claudiu Beznea <claudiu.beznea@tuxon.dev> <claudiu.beznea@microchip.com>210Claudiu Beznea <claudiu.beznea@tuxon.dev> <claudiu.beznea@microchip.com>
208Colin Ian King <colin.i.king@gmail.com> <colin.king@canonical.com>211Colin Ian King <colin.i.king@gmail.com> <colin.king@canonical.com>
209Corey Minyard <minyard@acm.org>212Corey Minyard <minyard@acm.org>
@@ -263,8 +266,9 @@ Enric Balletbo i Serra <eballetbo@kernel.org> <enric.balletbo@collabora.com> · 53 unmodified lines
263Enric Balletbo i Serra <eballetbo@kernel.org> <eballetbo@iseebcn.com>266Enric Balletbo i Serra <eballetbo@kernel.org> <eballetbo@iseebcn.com>
264Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>267Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>
265Ethan Carter Edwards <ethan@ethancedwards.com> Ethan Edwards <ethancarteredwards@gmail.com>268Ethan Carter Edwards <ethan@ethancedwards.com> Ethan Edwards <ethancarteredwards@gmail.com>
266Eugen Hristev <eugen.hristev@linaro.org> <eugen.hristev@microchip.com>269Eugen Hristev <ehristev@kernel.org> <eugen.hristev@microchip.com>
267Eugen Hristev <eugen.hristev@linaro.org> <eugen.hristev@collabora.com>270Eugen Hristev <ehristev@kernel.org> <eugen.hristev@linaro.org>
271Eugen Hristev <ehristev@kernel.org> <eugen.hristev@collabora.com>
268Evgeniy Polyakov <johnpol@2ka.mipt.ru>272Evgeniy Polyakov <johnpol@2ka.mipt.ru>
269Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com>273Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com>
270Faith Ekstrand <faith.ekstrand@collabora.com> <jason@jlekstrand.net>274Faith Ekstrand <faith.ekstrand@collabora.com> <jason@jlekstrand.net>
@@ -339,6 +343,7 @@ Henrik Rydberg <rydberg@bitmath.org> · 68 unmodified lines
339Herbert Xu <herbert@gondor.apana.org.au>343Herbert Xu <herbert@gondor.apana.org.au>
340Huacai Chen <chenhuacai@kernel.org> <chenhc@lemote.com>344Huacai Chen <chenhuacai@kernel.org> <chenhc@lemote.com>
341Huacai Chen <chenhuacai@kernel.org> <chenhuacai@loongson.cn>345Huacai Chen <chenhuacai@kernel.org> <chenhuacai@loongson.cn>
346Ian Ray <ian.ray@gehealthcare.com> <ian.ray@ge.com>
342Ignat Korchagin <ignat@linux.win> <ignat@cloudflare.com>347Ignat Korchagin <ignat@linux.win> <ignat@cloudflare.com>
343Igor Korotin <igor.korotin@linux.dev> <igor.korotin.linux@gmail.com>348Igor Korotin <igor.korotin@linux.dev> <igor.korotin.linux@gmail.com>
344Ike Panhc <ikepanhc@gmail.com> <ike.pan@canonical.com>349Ike Panhc <ikepanhc@gmail.com> <ike.pan@canonical.com>
@@ -368,6 +373,7 @@ Jarkko Sakkinen <jarkko@kernel.org> <jarkko.sakkinen@opinsys.com> · 23 unmodified lines
368Jason Gunthorpe <jgg@ziepe.ca> <jgg@mellanox.com>373Jason Gunthorpe <jgg@ziepe.ca> <jgg@mellanox.com>
369Jason Gunthorpe <jgg@ziepe.ca> <jgg@nvidia.com>374Jason Gunthorpe <jgg@ziepe.ca> <jgg@nvidia.com>
370Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com>375Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com>
376Jason Wang <jasowangio@gmail.com> <jasowang@redhat.com>
371Jason Xing <kerneljasonxing@gmail.com> <kernelxing@tencent.com>377Jason Xing <kerneljasonxing@gmail.com> <kernelxing@tencent.com>
372<javier@osg.samsung.com> <javier.martinez@collabora.co.uk>378<javier@osg.samsung.com> <javier.martinez@collabora.co.uk>
373Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com>379Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com>
@@ -399,6 +405,7 @@ Jesper Dangaard Brouer <hawk@kernel.org> <hawk@comx.dk> · 25 unmodified lines
399Jesper Dangaard Brouer <hawk@kernel.org> <jbrouer@redhat.com>405Jesper Dangaard Brouer <hawk@kernel.org> <jbrouer@redhat.com>
400Jesper Dangaard Brouer <hawk@kernel.org> <jdb@comx.dk>406Jesper Dangaard Brouer <hawk@kernel.org> <jdb@comx.dk>
401Jesper Dangaard Brouer <hawk@kernel.org> <netoptimizer@brouer.com>407Jesper Dangaard Brouer <hawk@kernel.org> <netoptimizer@brouer.com>
408Jesse Brandeburg <jbrandeb@kernel.org> <jesse.brandeburg@intel.com>
402Jessica Zhang <jesszhan0024@gmail.com> <jesszhan@codeaurora.org>409Jessica Zhang <jesszhan0024@gmail.com> <jesszhan@codeaurora.org>
403Jessica Zhang <jesszhan0024@gmail.com> <quic_jesszhan@quicinc.com>410Jessica Zhang <jesszhan0024@gmail.com> <quic_jesszhan@quicinc.com>
404Jessica Zhang <jesszhan0024@gmail.com> <jessica.zhang@oss.qualcomm.com>411Jessica Zhang <jesszhan0024@gmail.com> <jessica.zhang@oss.qualcomm.com>
@@ -433,6 +440,7 @@ John Stultz <johnstul@us.ibm.com> · 28 unmodified lines
433Jonas Gorski <jonas.gorski@gmail.com> <jogo@openwrt.org>440Jonas Gorski <jonas.gorski@gmail.com> <jogo@openwrt.org>
434Jonathan Cameron <jic23@kernel.org> <jonathan.cameron@huawei.com>441Jonathan Cameron <jic23@kernel.org> <jonathan.cameron@huawei.com>
435Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>442Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
443Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com> <jorge.ramirez-ortiz@linaro.org>
436<josh@joshtriplett.org> <josh@freedesktop.org>444<josh@joshtriplett.org> <josh@freedesktop.org>
437<josh@joshtriplett.org> <josh@kernel.org>445<josh@joshtriplett.org> <josh@kernel.org>
438<josh@joshtriplett.org> <josht@linux.vnet.ibm.com>446<josh@joshtriplett.org> <josht@linux.vnet.ibm.com>
@@ -446,6 +454,7 @@ Juha Yrjola <juha.yrjola@nokia.com> · 7 unmodified lines
446Juha Yrjola <juha.yrjola@solidboot.com>454Juha Yrjola <juha.yrjola@solidboot.com>
447Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>455Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
448Justin Iurman <justin.iurman@gmail.com> <justin.iurman@uliege.be>456Justin Iurman <justin.iurman@gmail.com> <justin.iurman@uliege.be>
457Ira Weiny <iweiny@kernel.org> <ira.weiny@intel.com>
449Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>458Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>
450Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>459Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>
451Kalle Valo <kvalo@kernel.org> <quic_kvalo@quicinc.com>460Kalle Valo <kvalo@kernel.org> <quic_kvalo@quicinc.com>
@@ -522,7 +531,8 @@ Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net> · 70 unmodified lines
522Luca Weiss <luca@lucaweiss.eu> <luca@z3ntu.xyz>531Luca Weiss <luca@lucaweiss.eu> <luca@z3ntu.xyz>
523Lucas De Marchi <demarchi@kernel.org> <lucas.demarchi@intel.com>532Lucas De Marchi <demarchi@kernel.org> <lucas.demarchi@intel.com>
524Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>533Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
525Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org>534Luo Jie <jie.luo@oss.qualcomm.com> <luoj@codeaurora.org>
535Luo Jie <jie.luo@oss.qualcomm.com> <quic_luoj@quicinc.com>
526Lance Yang <lance.yang@linux.dev> <ioworker0@gmail.com>536Lance Yang <lance.yang@linux.dev> <ioworker0@gmail.com>
527Lance Yang <lance.yang@linux.dev> <mingzhe.yang@ly.com>537Lance Yang <lance.yang@linux.dev> <mingzhe.yang@ly.com>
528Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>538Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
@@ -584,6 +594,8 @@ Mayuresh Janorkar <mayur@ti.com> · 55 unmodified lines
584Md Sadre Alam <quic_mdalam@quicinc.com> <mdalam@codeaurora.org>594Md Sadre Alam <quic_mdalam@quicinc.com> <mdalam@codeaurora.org>
585Miaoqing Pan <quic_miaoqing@quicinc.com> <miaoqing@codeaurora.org>595Miaoqing Pan <quic_miaoqing@quicinc.com> <miaoqing@codeaurora.org>
586Michael Buesch <m@bues.ch>596Michael Buesch <m@bues.ch>
597Michal Grzeschik <mgr@kernel.org> <m.grzeschik@pengutronix.de>
598Michal Grzeschik <mgr@kernel.org> <mgr@pengutronix.de>
587Michael Riesch <michael.riesch@collabora.com> <michael.riesch@wolfvision.net>599Michael Riesch <michael.riesch@collabora.com> <michael.riesch@wolfvision.net>
588Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>600Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>
589Michel Dänzer <michel@tungstengraphics.com>601Michel Dänzer <michel@tungstengraphics.com>
CREDITS+19−0
@@ -197,6 +197,9 @@ S: Hauptstrasse 19 · 196 unmodified lines
197S: 79837 St. Blasien197S: 79837 St. Blasien
198S: Germany198S: Germany
199 199
200N: Ferenc Bakonyi
201D: Hercules graphics adapter framebuffer driver
202
200N: Krishna Balasubramanian203N: Krishna Balasubramanian
201E: balasub@cis.ohio-state.edu204E: balasub@cis.ohio-state.edu
202D: Wrote SYS V IPC (part of standard kernel since 0.99.10)205D: Wrote SYS V IPC (part of standard kernel since 0.99.10)
@@ -2241,6 +2244,7 @@ S: Canada · 2038 unmodified lines
2241N: Krzysztof Kozlowski2244N: Krzysztof Kozlowski
2242E: krzk@kernel.org2245E: krzk@kernel.org
2243D: NFC network subsystem and drivers maintainer2246D: NFC network subsystem and drivers maintainer
2247D: Samsung S2M/S5M Multifunction PMIC device drivers for Exynos platforms
2244 2248
2245N: Christian Krafft2249N: Christian Krafft
2246D: PowerPC Cell support2250D: PowerPC Cell support
@@ -2804,6 +2808,7 @@ D: Some of PAS 16 mixer & PCM support, inet6-apps · 557 unmodified lines
2804 2808
2805N: William (Bill) Metzenthen2809N: William (Bill) Metzenthen
2806E: billm@suburbia.net2810E: billm@suburbia.net
2811E: billm@melbpc.org.au
2807D: Author of the FPU emulator.2812D: Author of the FPU emulator.
2808D: Minor kernel hacker for other lost causes (Hercules mono, etc).2813D: Minor kernel hacker for other lost causes (Hercules mono, etc).
2809S: 22 Parker Street2814S: 22 Parker Street
@@ -3368,6 +3373,10 @@ N: Anil Ravindranath · 558 unmodified lines
3368E: anil_ravindranath@pmc-sierra.com3373E: anil_ravindranath@pmc-sierra.com
3369D: PMC-Sierra MaxRAID driver3374D: PMC-Sierra MaxRAID driver
3370 3375
3376N: Dwaipayan Ray
3377E: dwaipayanray1@gmail.com
3378D: checkpatch improvements
3379
3371N: Eric S. Raymond3380N: Eric S. Raymond
3372E: esr@thyrsus.com3381E: esr@thyrsus.com
3373W: http://www.tuxedo.org/~esr/3382W: http://www.tuxedo.org/~esr/
@@ -3668,7 +3677,17 @@ D: Macintosh IDE Driver · 294 unmodified lines
3668 3677
3669N: Peter De Schrijver3678N: Peter De Schrijver
3670E: stud11@cc4.kuleuven.ac.be3679E: stud11@cc4.kuleuven.ac.be
3680E: p2@mind.be
3681E: peter.de-schrijver@nokia.com
3682E: pdeschrijver@nvidia.com
3683E: p2@psychaos.be
3684D: Apollo Domain workstations
3685D: Ariadne and Hydra Amiga Ethernet drivers
3686D: IBM PS/2, Microchannel, and Token Ring support
3671D: Mitsumi CD-ROM driver patches March version3687D: Mitsumi CD-ROM driver patches March version
3688D: TWL4030 power management and audio codec driver
3689D: OMAP power management
3690D: NVIDIA Tegra clock and BPMP drivers, among many other things
3672S: Molenbaan 293691S: Molenbaan 29
3673S: B2240 Zandhoven3692S: B2240 Zandhoven
3674S: Belgium3693S: Belgium
Documentation/.renames.txt+1−0
@@ -786,6 +786,7 @@ networking/altera_tse networking/device_drivers/ethernet/altera/altera_tse · 785 unmodified lines
786networking/bpf_flow_dissector bpf/prog_flow_dissector786networking/bpf_flow_dissector bpf/prog_flow_dissector
787networking/cxacru networking/device_drivers/atm/cxacru787networking/cxacru networking/device_drivers/atm/cxacru
788networking/defza networking/device_drivers/fddi/defza788networking/defza networking/device_drivers/fddi/defza
789networking/device_drivers/3com/3c509 networking/device_drivers/ethernet/3com/3c509
789networking/device_drivers/3com/vortex networking/device_drivers/ethernet/3com/vortex790networking/device_drivers/3com/vortex networking/device_drivers/ethernet/3com/vortex
790networking/device_drivers/amazon/ena networking/device_drivers/ethernet/amazon/ena791networking/device_drivers/amazon/ena networking/device_drivers/ethernet/amazon/ena
791networking/device_drivers/aquantia/atlantic networking/device_drivers/ethernet/aquantia/atlantic792networking/device_drivers/aquantia/atlantic networking/device_drivers/ethernet/aquantia/atlantic
Documentation/ABI/obsolete/sysfs-driver-ivpu+30−0
@@ -0,0 +1,30 @@
1What: /sys/bus/pci/drivers/intel_vpu/.../sched_mode
2Date: October 2024
3KernelVersion: 6.12
4Contact: dri-devel@lists.freedesktop.org
5Description: Current NPU scheduling mode. Returns one of the following strings:
6 - "HW" - Hardware Scheduler mode
7 - "OS" - Operating System Scheduler mode
8 Read-only.
9 Deprecated since the "OS" scheduling mode is not usable
10 and will be removed from future versions of the driver.
11 Will be removed in 2027
12
13What: /sys/bus/pci/drivers/intel_vpu/.../npu_max_frequency_mhz
14Date: April 2025
15KernelVersion: 6.15
16Contact: dri-devel@lists.freedesktop.org
17Description: Legacy alias for /sys/bus/pci/drivers/intel_vpu/.../freq/hw_max_freq.
18 Shows maximum frequency in MHz of the NPU's data processing unit.
19 Read-only.
20 Will be removed in 2027
21
22What: /sys/bus/pci/drivers/intel_vpu/.../npu_current_frequency_mhz
23Date: April 2025
24KernelVersion: 6.15
25Contact: dri-devel@lists.freedesktop.org
26Description: Legacy alias for /sys/bus/pci/drivers/intel_vpu/.../freq/current_freq.
27 Shows current frequency in MHz of the NPU's data processing unit.
28 The value is read only when the device is active; otherwise it returns 0.
29 Read-only.
30 Will be removed in 2027
Documentation/ABI/stable/sysfs-class-infiniband+4−4
@@ -148,17 +148,17 @@ Description: · 147 unmodified lines
148 **Data info**:148 **Data info**:
149 149
150 port_xmit_data: (RO) Total number of data octets, divided by 4150 port_xmit_data: (RO) Total number of data octets, divided by 4
151 (lanes), transmitted on all VLs. This is 64 bit counter151 (lanes), transmitted on all VLs. This is a 64-bit counter
152 152
153 port_rcv_data: (RO) Total number of data octets, divided by 4153 port_rcv_data: (RO) Total number of data octets, divided by 4
154 (lanes), received on all VLs. This is 64 bit counter.154 (lanes), received on all VLs. This is a 64-bit counter.
155 155
156 port_xmit_packets: (RO) Total number of packets transmitted on156 port_xmit_packets: (RO) Total number of packets transmitted on
157 all VLs from this port. This may include packets with errors.157 all VLs from this port. This may include packets with errors.
158 This is 64 bit counter.158 This is a 64-bit counter.
159 159
160 port_rcv_packets: (RO) Total number of packets (this may include160 port_rcv_packets: (RO) Total number of packets (this may include
161 packets containing Errors. This is 64 bit counter.161 packets containing Errors). This is a 64-bit counter.
162 162
163 link_downed: (RO) Total number of times the Port Training state163 link_downed: (RO) Total number of times the Port Training state
164 machine has failed the link error recovery process and downed164 machine has failed the link error recovery process and downed
Documentation/ABI/testing/configfs-thunderbolt_stream+83−0
@@ -0,0 +1,83 @@
1What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>
2Date: Sep 2026
3KernelVersion: v7.2
4Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
5Description:
6 Configuration group for a stream Thunderbolt/USB4
7 service. It is possible to create groups even if there
8 is no connection yet to the other host. Once a
9 connection established and there is stream service on
10 the remote side that matches, this configuration is
11 applied to it.
12
13 To find the service name you can run tblist from tbtools [1]:
14
15 # tblist -A
16 ...
17 Domain 0 Route 3 Index 0: stream
18
19 [1] https://github.com/intel/tbtools
20
21What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name
22Date: Sep 2026
23KernelVersion: v7.2
24Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
25Description:
26 Creates new stream with $name and fills it with the
27 default values. If there is an advertised remote stream
28 with the same name, uses its values as the default.
29
30What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/index
31Date: Sep 2026
32KernelVersion: v7.2
33Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
34Description:
35 This matches the X in /dev/tbstreamX and allows userspace
36 to map the configfs directory to the corresponding character
37 device.
38
39What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/in_hopid
40Date: Sep 2026
41KernelVersion: v7.2
42Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
43Description:
44 In HopID used with the read path of the tunnel. Available HopIDs
45 for tunneling start from 8. You can pass also -1 for automatic
46 allocation. The allocated value can be read here. Writing 0 will
47 de-allocate if the stream is not in use.
48
49 To figure out the maximum HopID you can run tbget from
50 tbtools for the lane adapter. For example below we check
51 for lane adapter number 1 (first USB4 port):
52
53 # tbget -r 0 -a 1 -D ADP_CS_5.Max\ Input\ HopID
54 19
55
56 This allows to use anything between 8 and 19 inclusive.
57
58What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/out_hopid
59Date: Sep 2026
60KernelVersion: v7.2
61Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
62Description:
63 Out HopID used with the write path of the tunnel. Available HopIDs
64 for tunneling start from 8. You can pass also -1 for automatic
65 allocation. The allocated value can be read here. Writing 0 will
66 de-allocate if the stream is not in use. See @in_hopid
67 for how to figure out the maximum HopID.
68
69What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/ring_size
70Date: Sep 2026
71KernelVersion: v7.2
72Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
73Description:
74 Size of the TX/RX rings. Can be adjusted between 32 and
75 4096. The default is 256.
76
77What: /sys/kernel/config/thunderbolt/stream/<xdomain>.<service>/$name/throttling
78Date: Sep 2026
79KernelVersion: v7.2
80Contact: Mika Westerberg <mika.westerberg@linux.intel.com>
81Description:
82 Interrupt throttling rate in ns. Lower values can give
83 better latency. The default is 8192 ns.
Documentation/ABI/testing/debugfs-vfio+26−0
@@ -29,3 +29,29 @@ Date: Oct 2025 · 28 unmodified lines
29KernelVersion: 6.1829KernelVersion: 6.18
30Contact: Cédric Le Goater <clg@redhat.com>30Contact: Cédric Le Goater <clg@redhat.com>
31Description: Read the migration features of the vfio device.31Description: Read the migration features of the vfio device.
32
33What: /sys/kernel/debug/vfio/<device>/pci
34Date: June 2026
35KernelVersion: 7.2
36Contact: Alex Williamson <alex.williamson@nvidia.com>
37Description: This debugfs file directory is used for debugging
38 VFIO PCI devices.
39
40What: /sys/kernel/debug/vfio/<device>/pci/nointxmask
41Date: June 2026
42KernelVersion: 7.2
43Contact: Alex Williamson <alex.williamson@nvidia.com>
44Description: Read the nointxmask policy latched for this device. This
45 policy governs whether the device may use PCI 2.3 style
46 INTx masking when supported, reporting a value of "N", or
47 requires APIC level INTx masking, reporting a value of "Y".
48
49What: /sys/kernel/debug/vfio/<device>/pci/disable_idle_d3
50Date: June 2026
51KernelVersion: 7.2
52Contact: Alex Williamson <alex.williamson@nvidia.com>
53Description: Read the disable_idle_d3 policy latched for this device. This
54 policy governs whether the device PM runtime usage count is
55 kept elevated while the device is bound to the driver and
56 unused, reporting a value of "Y", or decremented to allow the
57 device to enter a low power state, reporting a value of "N".
Documentation/ABI/testing/sysfs-bus-iio+53−15
@@ -764,10 +764,13 @@ Contact: linux-iio@vger.kernel.org · 763 unmodified lines
764Description:764Description:
765 Specifies the output powerdown mode.765 Specifies the output powerdown mode.
766 DAC output stage is disconnected from the amplifier and766 DAC output stage is disconnected from the amplifier and
767 500ohm_to_gnd: connected to ground via a 500Ohm resistor,
767 1kohm_to_gnd: connected to ground via an 1kOhm resistor,768 1kohm_to_gnd: connected to ground via an 1kOhm resistor,
768 2.5kohm_to_gnd: connected to ground via a 2.5kOhm resistor,769 2.5kohm_to_gnd: connected to ground via a 2.5kOhm resistor,
770 3.85kohm_to_gnd: connected to ground via a 3.85kOhm resistor,
769 6kohm_to_gnd: connected to ground via a 6kOhm resistor,771 6kohm_to_gnd: connected to ground via a 6kOhm resistor,
770 7.7kohm_to_gnd: connected to ground via a 7.7kOhm resistor,772 7.7kohm_to_gnd: connected to ground via a 7.7kOhm resistor,
773 16kohm_to_gnd: connected to ground via a 16kOhm resistor,
771 20kohm_to_gnd: connected to ground via a 20kOhm resistor,774 20kohm_to_gnd: connected to ground via a 20kOhm resistor,
772 32kohm_to_gnd: connected to ground via a 32kOhm resistor,775 32kohm_to_gnd: connected to ground via a 32kOhm resistor,
773 42kohm_to_gnd: connected to ground via a 42kOhm resistor,776 42kohm_to_gnd: connected to ground via a 42kOhm resistor,
@@ -1510,21 +1513,24 @@ Contact: linux-iio@vger.kernel.org · 736 unmodified lines
1510Description:1513Description:
1511 Description of the scan element data storage within the buffer1514 Description of the scan element data storage within the buffer
1512 and hence the form in which it is read from user-space.1515 and hence the form in which it is read from user-space.
1513 Form is [be|le]:[s|u]bits/storagebits[>>shift].1516 Form is [be|le]:[f|s|u]bits/storagebits[>>shift].
1514 be or le specifies big or little endian. s or u specifies if1517 be or le specifies big or little endian. f means floating-point
1515 signed (2's complement) or unsigned. bits is the number of bits1518 (IEEE 754 binary format), s means signed (2's complement), u means
1516 of data and storagebits is the space (after padding) that it1519 unsigned. bits is the number of bits of data and storagebits is the
1517 occupies in the buffer. shift if specified, is the shift that1520 space (after padding) that it occupies in the buffer; when using a
1518 needs to be applied prior to masking out unused bits. Some1521 floating-point format, bits must be one of the width values defined
1519 devices put their data in the middle of the transferred elements1522 in the IEEE 754 standard for binary interchange formats (e.g. 16
1520 with additional information on both sides. Note that some1523 indicates the binary16 format for half-precision numbers). shift,
1521 devices will have additional information in the unused bits1524 if specified, is the shift that needs to be applied prior to
1522 so to get a clean value, the bits value must be used to mask1525 masking out unused bits. Some devices put their data in the middle
1523 the buffer output value appropriately. The storagebits value1526 of the transferred elements with additional information on both
1524 also specifies the data alignment. So s48/64>>2 will be a1527 sides. Note that some devices will have additional information in
1525 signed 48 bit integer stored in a 64 bit location aligned to1528 the unused bits, so to get a clean value the bits value must be
1526 a 64 bit boundary. To obtain the clean value, shift right 21529 used to mask the buffer output value appropriately. The storagebits
1527 and apply a mask to zero the top 16 bits of the result.1530 value also specifies the data alignment. So s48/64>>2 will be a
1531 signed 48 bit integer stored in a 64 bit location aligned to a 64
1532 bit boundary. To obtain the clean value, shift right 2 and apply a
1533 mask to zero the top 16 bits of the result.
1528 For other storage combinations this attribute will be extended1534 For other storage combinations this attribute will be extended
1529 appropriately.1535 appropriately.
1530 1536
@@ -1752,6 +1758,21 @@ Description: · 221 unmodified lines
1752 measurement from channel Y. Units after application of scale and1758 measurement from channel Y. Units after application of scale and
1753 offset are milliamps.1759 offset are milliamps.
1754 1760
1761What: /sys/bus/iio/devices/iio:deviceX/in_rot_quaternionaxis_raw
1762KernelVersion: 7.1
1763Contact: linux-iio@vger.kernel.org
1764Description:
1765 Raw value of {x, y, z} components of the quaternion vector. These
1766 components represent the axis about which a rotation occurs, and are
1767 subject to the following constraints:
1768
1769 - the quaternion vector is normalized, i.e. w^2 + x^2 + y^2 + z^2 = 1
1770 - the rotation angle is within the [-pi, pi] range, i.e. the w
1771 component (which represents the amount of rotation) is non-negative
1772
1773 These constraints allow the w value to be calculated from the other
1774 components: w = sqrt(1 - (x^2 + y^2 + z^2)).
1775
1755What: /sys/.../iio:deviceX/in_energy_en1776What: /sys/.../iio:deviceX/in_energy_en
1756What: /sys/.../iio:deviceX/in_distance_en1777What: /sys/.../iio:deviceX/in_distance_en
1757What: /sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_en1778What: /sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_en
@@ -1959,6 +1980,23 @@ Description: · 201 unmodified lines
1959 Raw (unscaled no offset etc.) resistance reading.1980 Raw (unscaled no offset etc.) resistance reading.
1960 Units after application of scale and offset are ohms.1981 Units after application of scale and offset are ohms.
1961 1982
1983What: /sys/bus/iio/devices/iio:deviceX/in_coverageY_raw
1984KernelVersion: 7.2
1985Contact: linux-iio@vger.kernel.org
1986Description:
1987 Raw (unscaled no offset etc.) coverage reading. Used for sensors
1988 that report fractional coverage as a percentage, such as leak
1989 detectors where the value represents what portion of the sensing
1990 element is wetted. Units after application of scale and offset are
1991 percent.
1992
1993What: /sys/bus/iio/devices/iio:deviceX/in_coverageY_scale
1994KernelVersion: 7.2
1995Contact: linux-iio@vger.kernel.org
1996Description:
1997 Scale to be applied to in_coverageY_raw to obtain coverage
1998 in percent.
1999
1962What: /sys/bus/iio/devices/iio:deviceX/heater_enable2000What: /sys/bus/iio/devices/iio:deviceX/heater_enable
1963KernelVersion: 4.1.02001KernelVersion: 4.1.0
1964Contact: linux-iio@vger.kernel.org2002Contact: linux-iio@vger.kernel.org
Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd+1−1
@@ -22,7 +22,7 @@ Description: · 21 unmodified lines
22 22
23 Reading this attribute gives the state of the DbC. It23 Reading this attribute gives the state of the DbC. It
24 can be one of the following states: disabled, enabled,24 can be one of the following states: disabled, enabled,
25 initialized, connected, configured and stalled.25 initialized, connected or configured.
26 26
27What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_idVendor27What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_idVendor
28Date: March 202328Date: March 2023
Documentation/ABI/testing/sysfs-class-hwmon+14−0
@@ -27,6 +27,20 @@ Description: · 26 unmodified lines
27 Some devices have a variable update rate or interval.27 Some devices have a variable update rate or interval.
28 This attribute can be used to change it to the desired value.28 This attribute can be used to change it to the desired value.
29 29
30What: /sys/class/hwmon/hwmonX/update_interval_us
31Description:
32 The interval at which the chip will update readings,
33 expressed in microseconds.
34 Unit: microsecond
35
36 RW
37
38 Some devices have a variable update rate or interval and
39 require finer-than-millisecond control.
40 This attribute can be used to change it to the desired value.
41 Drivers implementing this attribute should also implement
42 update_interval for millisecond-based userspace interfaces.
43
30What: /sys/class/hwmon/hwmonX/inY_min44What: /sys/class/hwmon/hwmonX/inY_min
31Description:45Description:
32 Voltage min value.46 Voltage min value.
Documentation/ABI/testing/sysfs-class-ieee80211-rtw89+24−0
@@ -0,0 +1,24 @@
1What: /sys/class/ieee80211/phyX/rtw89_usb/serial_number
2Date: May 2026
3Contact: Johnson Tsai <wenjie.tsai@realtek.com>, linux-wireless@vger.kernel.org
4Description: (Read) Serial number burned into EFUSE of the RTL8852CU-based
5 USB Wi-Fi adapter. Only present on devices that set the
6 RTW89_QUIRK_HW_INFO_SYSFS quirk (currently VID 0x28de /
7 PID 0x2432).
8
9 Format: %10phN (5 raw bytes printed as 10 lowercase hex
10 digits, no separators).
11
12 Example: 3642000123
13
14What: /sys/class/ieee80211/phyX/rtw89_usb/uuid
15Date: May 2026
16Contact: Johnson Tsai <wenjie.tsai@realtek.com>, linux-wireless@vger.kernel.org
17Description: (Read) UUID burned into EFUSE of the RTL8852CU-based USB Wi-Fi
18 adapter. Only present on devices that set the
19 RTW89_QUIRK_HW_INFO_SYSFS quirk (currently VID 0x28de /
20 PID 0x2432).
21
22 Format: %pUb (RFC 4122 UUID in lowercase with hyphens).
23
24 Example: aaec2b7c-0a55-4727-8de0-b30febccbbaa
Documentation/ABI/testing/sysfs-class-led+2−2
@@ -22,8 +22,8 @@ Description: · 21 unmodified lines
22 For additional details please refer to22 For additional details please refer to
23 Documentation/leds/leds-class-multicolor.rst.23 Documentation/leds/leds-class-multicolor.rst.
24 24
25 The value is between 0 and25 The value is between 0 and /sys/class/leds/<led>/max_brightness
26 /sys/class/leds/<led>/max_brightness.26 and is represented by as a decimal.
27 27
28 Writing 0 to this file clears active trigger.28 Writing 0 to this file clears active trigger.
29 29
Documentation/ABI/testing/sysfs-class-led-multicolor+16−3
@@ -16,9 +16,22 @@ Date: March 2020 · 15 unmodified lines
16KernelVersion: 5.916KernelVersion: 5.9
17Contact: Dan Murphy <dmurphy@ti.com>17Contact: Dan Murphy <dmurphy@ti.com>
18Description: read/write18Description: read/write
19 This file contains array of integers. Order of components is19 This file contains an array of integers. The order of components
20 described by the multi_index array. The maximum intensity should20 is described by the multi_index array. The maximum intensity value
21 not exceed /sys/class/leds/<led>/max_brightness.21 supported by each color component is described by the multi_max_intensity
22 file. Writing intensity values larger than the maximum value of a
23 given color component will result in those values being clamped.
24
25 For additional details please refer to
26 Documentation/leds/leds-class-multicolor.rst.
27
28What: /sys/class/leds/<led>/multi_max_intensity
29Date: May 2026
30KernelVersion: 7.2
31Contact: Armin Wolf <W_Armin@gmx.de>
32Description: read
33 This file contains an array of integers describing the maximum
34 intensity value for each intensity component.
22 35
23 For additional details please refer to36 For additional details please refer to
24 Documentation/leds/leds-class-multicolor.rst.37 Documentation/leds/leds-class-multicolor.rst.
Documentation/ABI/testing/sysfs-class-power-bd71828+12−0
@@ -0,0 +1,12 @@
1What: /sys/class/power_supply/bd71828_ac/auto_dcin_limit
2Description:
3 Enable/Disable automatic management of input current limit
4 (ILIM_DCIN_EN bit).
5
6 Possible values are:
7
8 ============ ===========================================
9 1 automatic adjustment of input current limit
10 0 no adjustment of input current limit. This
11 helps for more unusual power sources like
12 solar modules.
Documentation/ABI/testing/sysfs-class-reboot-mode-reboot_modes+8−5
@@ -2,33 +2,36 @@ What: /sys/class/reboot-mode/<driver>/reboot_modes · 1 unmodified line
2Date: March 2026(TBD)2Date: March 2026(TBD)
3KernelVersion: TBD3KernelVersion: TBD
4Contact: linux-pm@vger.kernel.org4Contact: linux-pm@vger.kernel.org
5 Description:5Description:
6 This interface exposes the reboot-mode arguments6 This interface exposes the reboot-mode arguments
7 registered with the reboot-mode framework. It is7 registered with the reboot-mode framework. It is
8 a read-only interface and provides a space8 a read-only interface and provides a space
9 separated list of reboot-mode arguments supported9 separated list of reboot-mode arguments supported
10 on the current platform.10 on the current platform.
11 Example:11 Example:
12
12 recovery fastboot bootloader13 recovery fastboot bootloader
13 14
14 The exact sysfs path may vary depending on the15 The exact sysfs path may vary depending on the
15 name of the driver that registers the arguments.16 name of the driver that registers the arguments.
16 Example:17 Example::
18
17 /sys/class/reboot-mode/nvmem-reboot-mode/reboot_modes19 /sys/class/reboot-mode/nvmem-reboot-mode/reboot_modes
18 /sys/class/reboot-mode/syscon-reboot-mode/reboot_modes20 /sys/class/reboot-mode/syscon-reboot-mode/reboot_modes
19 /sys/class/reboot-mode/qcom-pon/reboot_modes21 /sys/class/reboot-mode/qcom-pon/reboot_modes
20 22
21 The supported arguments can be used by userspace to23 The supported arguments can be used by userspace to
22 invoke device reset using the standard reboot() system24 invoke device reset using the standard reboot() system
23 call interface, with the "argument" as string to "*arg"25 call interface, with the "argument" as string to ``*arg``
24 parameter along with LINUX_REBOOT_CMD_RESTART2.26 parameter along with ``LINUX_REBOOT_CMD_RESTART2``.
25 27
26 A driver can expose the supported arguments by28 A driver can expose the supported arguments by
27 registering them with the reboot-mode framework29 registering them with the reboot-mode framework
28 using the property names that follow the30 using the property names that follow the
29 mode-<argument> format.31 mode-<argument> format.
30 Example:32 Example:
31 mode-bootloader, mode-recovery.33
34 mode-bootloader, mode-recovery
32 35
33 This attribute is useful for scripts or initramfs36 This attribute is useful for scripts or initramfs
34 logic that need to programmatically determine37 logic that need to programmatically determine
Documentation/ABI/testing/sysfs-devices-faux-tdx-host+26−0
@@ -0,0 +1,26 @@
1What: /sys/devices/faux/tdx_host/version
2Contact: linux-coco@lists.linux.dev
3Description: (RO) Report the version of the loaded TDX module.
4 Formatted as "major.minor.update". Used by TDX module
5 update tooling. Example: "1.2.03".
6
7What: /sys/devices/faux/tdx_host/seamldr_version
8Contact: linux-coco@lists.linux.dev
9Description: (RO) Report the version of the loaded P-SEAMLDR.
10 Formatted as a TDX module version. Used by TDX module
11 update tooling.
12
13What: /sys/devices/faux/tdx_host/num_remaining_updates
14Contact: linux-coco@lists.linux.dev
15Description: (RO) Report the number of remaining updates. TDX maintains a
16 log about each TDX module that has been loaded. This log has
17 a finite size, which limits the number of TDX module updates
18 that can be performed.
19
20 After each successful update, the number reduces by one. Once it
21 reaches zero, further updates will fail until next reboot. The
22 number is always zero if the P-SEAMLDR doesn't support updates.
23
24 See Intel Trust Domain Extensions - SEAM Loader (SEAMLDR)
25 Interface Specification, Chapter "SEAMLDR_INFO" and Chapter
26 "SEAMLDR.INSTALL" for more information.
Documentation/ABI/testing/sysfs-driver-dell-dw5826e-reset+9−0
@@ -0,0 +1,9 @@
1What: /sys/bus/platform/devices/<PALC0001 device>/wwan_reset
2Date: April 2026
3KernelVersion: 7.2
4Contact: Jackbb Wu <jackbb.wu@compal.com>
5Description:
6 Writing to this file triggers a Platform Level Device Reset
7 (PLDR) of the Dell DW5826e WWAN module via an ACPI _DSM
8 method. This can be used to recover the modem when it is in
9 a frozen state and unable to respond to USB commands.
Documentation/ABI/testing/sysfs-driver-ivpu+65−0
@@ -0,0 +1,65 @@
1What: /sys/bus/pci/drivers/intel_vpu/.../npu_busy_time_us
2Date: May 2024
3KernelVersion: 6.11
4Contact: dri-devel@lists.freedesktop.org
5Description: Time in microseconds that the device spent executing jobs. The time is
6 counted when and only when there are jobs submitted to firmware. This time
7 can be used to measure the utilization of NPU, either by calculating the
8 difference between two timepoints or monitoring utilization percentage by
9 reading periodically. Recommended read period is 1 second to avoid impact
10 on job submission performance. Read-only.
11
12What: /sys/bus/pci/drivers/intel_vpu/.../npu_memory_utilization
13Date: Jan 2025
14KernelVersion: 6.15
15Contact: dri-devel@lists.freedesktop.org
16Description: Current NPU memory utilization in bytes. Reports the total size of all
17 resident buffer objects allocated for NPU use. Read-only.
18
19What: /sys/bus/pci/drivers/intel_vpu/.../freq/hw_min_freq
20Date: April 2026
21KernelVersion: 7.2
22Contact: dri-devel@lists.freedesktop.org
23Description: Minimum frequency in MHz supported by the NPU hardware. This is a
24 hardware capability and cannot be changed. Read-only.
25
26What: /sys/bus/pci/drivers/intel_vpu/.../freq/hw_efficient_freq
27Date: April 2026
28KernelVersion: 7.2
29Contact: dri-devel@lists.freedesktop.org
30Description: Most efficient operating frequency in MHz for the NPU. This represents
31 the frequency at which the NPU operates most efficiently in terms of power
32 and performance. Read-only.
33
34What: /sys/bus/pci/drivers/intel_vpu/.../freq/hw_max_freq
35Date: April 2026
36KernelVersion: 7.2
37Contact: dri-devel@lists.freedesktop.org
38Description: Maximum frequency in MHz supported by the NPU hardware. This is a
39 hardware capability and cannot be changed. Read-only.
40
41What: /sys/bus/pci/drivers/intel_vpu/.../freq/current_freq
42Date: April 2026
43KernelVersion: 7.2
44Contact: dri-devel@lists.freedesktop.org
45Description: Current operating frequency in MHz of the NPU. The value is valid only
46 when the device is active; returns 0 when idle. The actual frequency may
47 be lower than the requested range due to power or thermal constraints.
48 Read-only.
49
50What: /sys/bus/pci/drivers/intel_vpu/.../freq/set_min_freq
51Date: April 2026
52KernelVersion: 7.2
53Contact: dri-devel@lists.freedesktop.org
54Description: Configured minimum operating frequency in MHz (50XX devices and newer).
55 Values written are clamped to hardware limits (hw_min_freq to hw_max_freq).
56 If set_min_freq exceeds set_max_freq, the driver clamps set_min_freq to
57 set_max_freq when selecting the operating frequency. Read-write.
58
59What: /sys/bus/pci/drivers/intel_vpu/.../freq/set_max_freq
60Date: April 2026
61KernelVersion: 7.2
62Contact: dri-devel@lists.freedesktop.org
63Description: Configured maximum operating frequency in MHz (50XX devices and newer).
64 Values written are clamped to hardware limits (hw_min_freq to hw_max_freq).
65 Read-write.
Documentation/ABI/testing/sysfs-driver-qat_kpt+97−0
@@ -0,0 +1,97 @@
1What: /sys/bus/pci/devices/<BDF>/qat_kpt/
2Date: August 2026
3KernelVersion: 7.2
4Contact: qat-linux@intel.com
5Description:
6 Directory containing attributes related to the QAT Key Protection
7 Technology (KPT) feature. KPT allows cryptographic keys to be used
8 by the accelerator without being exposed in plaintext to the host.
9
10What: /sys/bus/pci/devices/<BDF>/qat_kpt/enable
11Date: August 2026
12KernelVersion: 7.2
13Contact: qat-linux@intel.com
14Description:
15 (RW) Enables or disables Key Protection Technology (KPT).
16
17 Write 1 to enable KPT, or 0 to disable it.
18
19 Example usage::
20
21 # cat /sys/bus/pci/devices/<BDF>/qat_kpt/enable
22 0
23 # echo 1 > /sys/bus/pci/devices/<BDF>/qat_kpt/enable
24
25 This attribute is only available on devices that support KPT.
26
27What: /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_fn
28Date: August 2026
29KernelVersion: 7.2
30Contact: qat-linux@intel.com
31Description:
32 (RW) Configures the maximum number of KPT symmetric wrapping keys
33 (SWKs) that a Virtual Function (VF) may be associated with.
34
35 Valid values range from 0 to 128. A value of 0 indicates no limit.
36
37 Example usage::
38
39 # cat /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_fn
40 128
41 # echo 128 > /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_fn
42
43 This attribute is only available on devices that support KPT.
44
45What: /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_pasid
46Date: August 2026
47KernelVersion: 7.2
48Contact: qat-linux@intel.com
49Description:
50 (RW) Configures the maximum number of KPT symmetric wrapping keys
51 (SWKs) per Process Address Space ID (PASID).
52
53 Valid values range from 0 to 128. A value of 0 indicates no limit.
54
55 Example usage::
56
57 # cat /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_pasid
58 128
59 # echo 128 > /sys/bus/pci/devices/<BDF>/qat_kpt/swk_cnt_per_pasid
60
61 This attribute is only available on devices that support KPT.
62
63What: /sys/bus/pci/devices/<BDF>/qat_kpt/swk_max_ttl
64Date: August 2026
65KernelVersion: 7.2
66Contact: qat-linux@intel.com
67Description:
68 (RW) Configures the maximum Time To Live (TTL) for KPT symmetric
69 wrapping keys (SWK).
70
71 Valid values range from 0 to 31536000 seconds. A value of 0
72 indicates that the SWK TTL is unlimited.
73
74 Example usage::
75
76 # cat /sys/bus/pci/devices/<BDF>/qat_kpt/swk_max_ttl
77 1000
78 # echo 1000 > /sys/bus/pci/devices/<BDF>/qat_kpt/swk_max_ttl
79
80 This attribute is only available on devices that support KPT.
81
82What: /sys/bus/pci/devices/<BDF>/qat_kpt/swk_shared
83Date: August 2026
84KernelVersion: 7.2
85Contact: qat-linux@intel.com
86Description:
87 (RW) Controls shared mode for KPT symmetric wrapping keys (SWK).
88
89 Write 1 to enable shared mode, or 0 to disable it (non-shared mode).
90
91 Example usage::
92
93 # cat /sys/bus/pci/devices/<BDF>/qat_kpt/swk_shared
94 0
95 # echo 1 > /sys/bus/pci/devices/<BDF>/qat_kpt/swk_shared
96
97 This attribute is only available on devices that support KPT.
Documentation/ABI/testing/sysfs-driver-qat_rl+1−1
@@ -209,7 +209,7 @@ Date: January 2024 · 208 unmodified lines
209KernelVersion: 6.7209KernelVersion: 6.7
210Contact: qat-linux@intel.com210Contact: qat-linux@intel.com
211Description:211Description:
212 (RW) This file will return the remaining capability for a212 (RW) This file will return the remaining capacity for a
213 particular service/sla. This is the remaining value that a new213 particular service/sla. This is the remaining value that a new
214 SLA can be set to or a current SLA can be increased with.214 SLA can be set to or a current SLA can be increased with.
215 215
Documentation/ABI/testing/sysfs-driver-tegra-fuse+1−1
@@ -1,6 +1,6 @@
1What: /sys/devices/*/<our-device>/fuse1What: /sys/devices/*/<our-device>/fuse
2Date: February 20142Date: February 2014
3Contact: Peter De Schrijver <pdeschrijver@nvidia.com>3Contact: Thierry Reding <thierry.reding@kernel.org>
4Description: read-only access to the efuses on Tegra20, Tegra30, Tegra1144Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
5 and Tegra124 SoC's from NVIDIA. The efuses contain write once5 and Tegra124 SoC's from NVIDIA. The efuses contain write once
6 data programmed at the factory. The data is laid out in 32bit6 data programmed at the factory. The data is laid out in 32bit
Documentation/ABI/testing/sysfs-fs-f2fs+3−2
@@ -270,7 +270,8 @@ Description: Shows all enabled kernel features. · 269 unmodified lines
270 inode_checksum, flexible_inline_xattr, quota_ino,270 inode_checksum, flexible_inline_xattr, quota_ino,
271 inode_crtime, lost_found, verity, sb_checksum,271 inode_crtime, lost_found, verity, sb_checksum,
272 casefold, readonly, compression, test_dummy_encryption_v2,272 casefold, readonly, compression, test_dummy_encryption_v2,
273 atomic_write, pin_file, encrypted_casefold, linear_lookup.273 atomic_write, pin_file, encrypted_casefold, linear_lookup,
274 fserror.
274 275
275What: /sys/fs/f2fs/<disk>/inject_rate276What: /sys/fs/f2fs/<disk>/inject_rate
276Date: May 2016277Date: May 2016
@@ -1000,4 +1001,4 @@ Contact: "Chao Yu" <chao@kernel.org> · 723 unmodified lines
1000Description: It can be used to tune priority of f2fs critical task, e.g. f2fs_ckpt, f2fs_gc1001Description: It can be used to tune priority of f2fs critical task, e.g. f2fs_ckpt, f2fs_gc
1001 threads, limitation as below:1002 threads, limitation as below:
1002 - it requires user has CAP_SYS_NICE capability.1003 - it requires user has CAP_SYS_NICE capability.
1003 - the range is [100, 139], by default the value is 100.1004 - the range is [100, 139], by default the value is 120.
Documentation/ABI/testing/sysfs-kernel-mm-damon+53−28
@@ -84,6 +84,13 @@ Description: Writing an integer to this file sets the 'address unit' · 83 unmodified lines
84 parameter of the given operations set of the context. Reading84 parameter of the given operations set of the context. Reading
85 the file returns the last-written 'address unit' value.85 the file returns the last-written 'address unit' value.
86 86
87What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/pause
88Date: Mar 2026
89Contact: SeongJae Park <sj@kernel.org>
90Description: Writing a boolean keyword to this file sets the 'pause' request
91 parameter for the context. Reading the file returns the
92 last-written 'pause' value.
93
87What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/monitoring_attrs/intervals/sample_us94What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/monitoring_attrs/intervals/sample_us
88Date: Mar 202295Date: Mar 2022
89Contact: SeongJae Park <sj@kernel.org>96Contact: SeongJae Park <sj@kernel.org>
@@ -322,6 +329,18 @@ Contact: SeongJae Park <sj@kernel.org> · 232 unmodified lines
322Description: Writing to and reading from this file sets and gets the329Description: Writing to and reading from this file sets and gets the
323 goal-based effective quota auto-tuning algorithm to use.330 goal-based effective quota auto-tuning algorithm to use.
324 331
332What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/fail_charge_num
333Date: Mar 2026
334Contact: SeongJae Park <sj@kernel.org>
335Description: Writing to and reading from this file sets and gets the
336 action-failed memory quota charging ratio numerator.
337
338What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/fail_charge_denom
339Date: Mar 2026
340Contact: SeongJae Park <sj@kernel.org>
341Description: Writing to and reading from this file sets and gets the
342 action-failed memory quota charging ratio denominator.
343
325What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/weights/sz_permil344What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/quotas/weights/sz_permil
326Date: Mar 2022345Date: Mar 2022
327Contact: SeongJae Park <sj@kernel.org>346Contact: SeongJae Park <sj@kernel.org>
@@ -377,15 +396,20 @@ Contact: SeongJae Park <sj@kernel.org> · 49 unmodified lines
377Description: Writing to and reading from this file sets and gets the low396Description: Writing to and reading from this file sets and gets the low
378 watermark of the scheme in permil.397 watermark of the scheme in permil.
379 398
380What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/nr_filters399What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters
381Date: Dec 2022400Date: Feb 2025
401Contact: SeongJae Park <sj@kernel.org>
402Description: Directory for DAMON core layer-handled DAMOS filters.
403
404What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/nr_filters
405Date: Feb 2025
382Contact: SeongJae Park <sj@kernel.org>406Contact: SeongJae Park <sj@kernel.org>
383Description: Writing a number 'N' to this file creates the number of407Description: Writing a number 'N' to this file creates the number of
384 directories for setting filters of the scheme named '0' to408 directories for setting filters of the scheme named '0' to
385 'N-1' under the filters/ directory.409 'N-1' under the core_filters/ directory.
386 410
387What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/type411What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/type
388Date: Dec 2022412Date: Feb 2025
389Contact: SeongJae Park <sj@kernel.org>413Contact: SeongJae Park <sj@kernel.org>
390Description: Writing to and reading from this file sets and gets the type of414Description: Writing to and reading from this file sets and gets the type of
391 the memory of the interest. 'anon' for anonymous pages,415 the memory of the interest. 'anon' for anonymous pages,
@@ -393,77 +417,78 @@ Description: Writing to and reading from this file sets and gets the type of · 1 unmodified line
393 'addr' for address range (an open-ended interval), or 'target'417 'addr' for address range (an open-ended interval), or 'target'
394 for DAMON monitoring target can be written and read.418 for DAMON monitoring target can be written and read.
395 419
396What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/memcg_path420What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/memcg_path
397Date: Dec 2022421Date: Feb 2025
398Contact: SeongJae Park <sj@kernel.org>422Contact: SeongJae Park <sj@kernel.org>
399Description: If 'memcg' is written to the 'type' file, writing to and423Description: If 'memcg' is written to the 'type' file, writing to and
400 reading from this file sets and gets the path to the memory424 reading from this file sets and gets the path to the memory
401 cgroup of the interest.425 cgroup of the interest.
402 426
403What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/addr_start427What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/addr_start
404Date: Jul 2023428Date: Feb 2025
405Contact: SeongJae Park <sj@kernel.org>429Contact: SeongJae Park <sj@kernel.org>
406Description: If 'addr' is written to the 'type' file, writing to or reading430Description: If 'addr' is written to the 'type' file, writing to or reading
407 from this file sets or gets the start address of the address431 from this file sets or gets the start address of the address
408 range for the filter.432 range for the filter.
409 433
410What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/addr_end434What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/addr_end
411Date: Jul 2023435Date: Feb 2025
412Contact: SeongJae Park <sj@kernel.org>436Contact: SeongJae Park <sj@kernel.org>
413Description: If 'addr' is written to the 'type' file, writing to or reading437Description: If 'addr' is written to the 'type' file, writing to or reading
414 from this file sets or gets the end address of the address438 from this file sets or gets the end address of the address
415 range for the filter.439 range for the filter.
416 440
417What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/min441What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/min
418Date: Feb 2025442Date: Feb 2025
419Contact: SeongJae Park <sj@kernel.org>443Contact: SeongJae Park <sj@kernel.org>
420Description: If 'hugepage_size' is written to the 'type' file, writing to444Description: If 'hugepage_size' is written to the 'type' file, writing to
421 or reading from this file sets or gets the minimum size of the445 or reading from this file sets or gets the minimum size of the
422 hugepage for the filter.446 hugepage for the filter.
423 447
424What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/max448What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/max
425Date: Feb 2025449Date: Feb 2025
426Contact: SeongJae Park <sj@kernel.org>450Contact: SeongJae Park <sj@kernel.org>
427Description: If 'hugepage_size' is written to the 'type' file, writing to451Description: If 'hugepage_size' is written to the 'type' file, writing to
428 or reading from this file sets or gets the maximum size of the452 or reading from this file sets or gets the maximum size of the
429 hugepage for the filter.453 hugepage for the filter.
430 454
431What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/target_idx455What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/damon_target_idx
432Date: Dec 2022456Date: Feb 2025
433Contact: SeongJae Park <sj@kernel.org>457Contact: SeongJae Park <sj@kernel.org>
434Description: If 'target' is written to the 'type' file, writing to or458Description: If 'target' is written to the 'type' file, writing to or
435 reading from this file sets or gets the index of the DAMON459 reading from this file sets or gets the index of the DAMON
436 monitoring target of the interest.460 monitoring target of the interest.
437 461
438What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/matching462What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/matching
439Date: Dec 2022463Date: Feb 2025
440Contact: SeongJae Park <sj@kernel.org>464Contact: SeongJae Park <sj@kernel.org>
441Description: Writing 'Y' or 'N' to this file sets whether the filter is for465Description: Writing 'Y' or 'N' to this file sets whether the filter is for
442 the memory of the 'type', or all except the 'type'.466 the memory of the 'type', or all except the 'type'.
443 467
444What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters/<F>/allow468What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters/<F>/allow
445Date: Jan 2025469Date: Feb 2025
446Contact: SeongJae Park <sj@kernel.org>470Contact: SeongJae Park <sj@kernel.org>
447Description: Writing 'Y' or 'N' to this file sets whether to allow or reject471Description: Writing 'Y' or 'N' to this file sets whether to allow or reject
448 applying the scheme's action to the memory that satisfies the472 applying the scheme's action to the memory that satisfies the
449 'type' and the 'matching' of the directory.473 'type' and the 'matching' of the directory.
450 474
451What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters
452Date: Feb 2025
453Contact: SeongJae Park <sj@kernel.org>
454Description: Directory for DAMON core layer-handled DAMOS filters. Files
455 under this directory works same to those of
456 /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters
457 directory.
458
459What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/ops_filters475What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/ops_filters
460Date: Feb 2025476Date: Feb 2025
461Contact: SeongJae Park <sj@kernel.org>477Contact: SeongJae Park <sj@kernel.org>
462Description: Directory for DAMON operations set layer-handled DAMOS filters.478Description: Directory for DAMON operations set layer-handled DAMOS filters.
463 Files under this directory works same to those of479 Files under this directory works same to those of
464 /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters480 /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/core_filters
465 directory.481 directory.
466 482
483What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/filters
484Date: Dec 2022
485Contact: SeongJae Park <sj@kernel.org>
486Description: Directory for DAMOS filters. Files under this directory works
487 same to those of
488 /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/{core,ops}_filters
489 directory. This is deprecated. Use the core_filters and
490 ops_filters instead.
491
467What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/dests/nr_dests492What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/dests/nr_dests
468Date: Jul 2025493Date: Jul 2025
469Contact: SeongJae Park <sj@kernel.org>494Contact: SeongJae Park <sj@kernel.org>
Documentation/ABI/testing/sysfs-platform-asus-wmi+9−0
@@ -58,6 +58,15 @@ Description: · 57 unmodified lines
58 * 1 - overboost,58 * 1 - overboost,
59 * 2 - silent59 * 2 - silent
60 60
61What: /sys/devices/platform/<platform>/keystone
62Date: Jun 2026
63KernelVersion: 7.2
64Contact: "Dariusz Figzał" <dariuszfigzal@gmail.com>
65Description:
66 Reports the Keystone dongle insert state (read-only):
67 * 0 - not inserted
68 * 1 - inserted
69
61What: /sys/devices/platform/<platform>/gpu_mux_mode70What: /sys/devices/platform/<platform>/gpu_mux_mode
62Date: Aug 202271Date: Aug 2022
63KernelVersion: 6.172KernelVersion: 6.1
Documentation/PCI/pci.rst+1−1
@@ -338,7 +338,7 @@ the PCI_IRQ_MSI and PCI_IRQ_MSIX flags will fail, so try to always · 337 unmodified lines
338specify PCI_IRQ_INTX as well.338specify PCI_IRQ_INTX as well.
339 339
340Drivers that have different interrupt handlers for MSI/MSI-X and340Drivers that have different interrupt handlers for MSI/MSI-X and
341legacy INTx should chose the right one based on the msi_enabled341legacy INTx should choose the right one based on the msi_enabled
342and msix_enabled flags in the pci_dev structure after calling342and msix_enabled flags in the pci_dev structure after calling
343pci_alloc_irq_vectors.343pci_alloc_irq_vectors.
344 344
Documentation/PCI/pciebus-howto.rst+1−1
@@ -97,7 +97,7 @@ register its service with the PCI Express Port Bus driver (see · 96 unmodified lines
97section 5.2.1 & 5.2.2). It is important that a service driver97section 5.2.1 & 5.2.2). It is important that a service driver
98initializes the pcie_port_service_driver data structure, included in98initializes the pcie_port_service_driver data structure, included in
99header file /include/linux/pcieport_if.h, before calling these APIs.99header file /include/linux/pcieport_if.h, before calling these APIs.
100Failure to do so will result an identity mismatch, which prevents100Failure to do so will result in an identity mismatch, which prevents
101the PCI Express Port Bus driver from loading a service driver.101the PCI Express Port Bus driver from loading a service driver.
102 102
103pcie_port_service_register103pcie_port_service_register
Documentation/RCU/Design/Requirements/Requirements.rst+3−3
@@ -206,7 +206,7 @@ non-\ ``NULL``, locklessly accessing the ``->a`` and ``->b`` fields. · 205 unmodified lines
206 206
207 1 bool add_gp_buggy(int a, int b)207 1 bool add_gp_buggy(int a, int b)
208 2 {208 2 {
209 3 p = kmalloc(sizeof(*p), GFP_KERNEL);209 3 p = kmalloc_obj(*p);
210 4 if (!p)210 4 if (!p)
211 5 return -ENOMEM;211 5 return -ENOMEM;
212 6 spin_lock(&gp_lock);212 6 spin_lock(&gp_lock);
@@ -228,7 +228,7 @@ their rights to reorder this code as follows: · 15 unmodified lines
228 228
229 1 bool add_gp_buggy_optimized(int a, int b)229 1 bool add_gp_buggy_optimized(int a, int b)
230 2 {230 2 {
231 3 p = kmalloc(sizeof(*p), GFP_KERNEL);231 3 p = kmalloc_obj(*p);
232 4 if (!p)232 4 if (!p)
233 5 return -ENOMEM;233 5 return -ENOMEM;
234 6 spin_lock(&gp_lock);234 6 spin_lock(&gp_lock);
@@ -264,7 +264,7 @@ shows an example of insertion: · 29 unmodified lines
264 264
265 1 bool add_gp(int a, int b)265 1 bool add_gp(int a, int b)
266 2 {266 2 {
267 3 p = kmalloc(sizeof(*p), GFP_KERNEL);267 3 p = kmalloc_obj(*p);
268 4 if (!p)268 4 if (!p)
269 5 return -ENOMEM;269 5 return -ENOMEM;
270 6 spin_lock(&gp_lock);270 6 spin_lock(&gp_lock);
Documentation/RCU/listRCU.rst+1−1
@@ -276,7 +276,7 @@ The RCU version of audit_upd_rule() is as follows:: · 275 unmodified lines
276 276
277 list_for_each_entry(e, list, list) {277 list_for_each_entry(e, list, list) {
278 if (!audit_compare_rule(rule, &e->rule)) {278 if (!audit_compare_rule(rule, &e->rule)) {
279 ne = kmalloc(sizeof(*entry), GFP_ATOMIC);279 ne = kmalloc_obj(*entry, GFP_ATOMIC);
280 if (ne == NULL)280 if (ne == NULL)
281 return -ENOMEM;281 return -ENOMEM;
282 audit_copy_rule(&ne->rule, &e->rule);282 audit_copy_rule(&ne->rule, &e->rule);
Documentation/RCU/whatisRCU.rst+2−2
@@ -468,7 +468,7 @@ uses of RCU may be found in listRCU.rst and NMI-RCU.rst. · 467 unmodified lines
468 struct foo *new_fp;468 struct foo *new_fp;
469 struct foo *old_fp;469 struct foo *old_fp;
470 470
471 new_fp = kmalloc(sizeof(*new_fp), GFP_KERNEL);471 new_fp = kmalloc_obj(*new_fp);
472 spin_lock(&foo_mutex);472 spin_lock(&foo_mutex);
473 old_fp = rcu_dereference_protected(gbl_foo, lockdep_is_held(&foo_mutex));473 old_fp = rcu_dereference_protected(gbl_foo, lockdep_is_held(&foo_mutex));
474 *new_fp = *old_fp;474 *new_fp = *old_fp;
@@ -570,7 +570,7 @@ The foo_update_a() function might then be written as follows:: · 95 unmodified lines
570 struct foo *new_fp;570 struct foo *new_fp;
571 struct foo *old_fp;571 struct foo *old_fp;
572 572
573 new_fp = kmalloc(sizeof(*new_fp), GFP_KERNEL);573 new_fp = kmalloc_obj(*new_fp);
574 spin_lock(&foo_mutex);574 spin_lock(&foo_mutex);
575 old_fp = rcu_dereference_protected(gbl_foo, lockdep_is_held(&foo_mutex));575 old_fp = rcu_dereference_protected(gbl_foo, lockdep_is_held(&foo_mutex));
576 *new_fp = *old_fp;576 *new_fp = *old_fp;
Documentation/accel/amdxdna/amdnpu.rst+25−0
@@ -270,6 +270,31 @@ MERT can report various kinds of telemetry information like the following: · 269 unmodified lines
270* Deep Sleep counter270* Deep Sleep counter
271* etc.271* etc.
272 272
273.. _amdxdna-usage-stats:
274
275Amdxdna DRM client usage stats implementation
276=============================================
277
278The amdxdna driver implements the DRM client usage stats specification as
279documented in :ref:`drm-client-usage-stats`.
280
281Example of the output showing the implemented key value pairs:
282
283::
284
285 pos: 0
286 flags: 0100002
287 mnt_id: 29
288 ino: 939
289 drm-driver: amdxdna_accel_driver
290 drm-client-id: 3219
291 drm-pdev: 0000:c5:00.1
292 amdxdna_accel_driver-heap-alloc: 60 KiB
293 amdxdna_accel_driver-internal-alloc: 67588 KiB
294 amdxdna_accel_driver-external-alloc: 0
295 drm-total-memory: 67632 KiB
296 drm-shared-memory: 0
297
273 298
274References299References
275==========300==========
Documentation/admin-guide/LSM/landlock.rst+9−4
@@ -6,7 +6,7 @@ Landlock: system-wide management · 5 unmodified lines
6================================6================================
7 7
8:Author: Mickaël Salaün8:Author: Mickaël Salaün
9:Date: January 20269:Date: June 2026
10 10
11Landlock can leverage the audit framework to log events.11Landlock can leverage the audit framework to log events.
12 12
@@ -19,8 +19,10 @@ Audit · 6 unmodified lines
19Denied access requests are logged by default for a sandboxed program if `audit`19Denied access requests are logged by default for a sandboxed program if `audit`
20is enabled. This default behavior can be changed with the20is enabled. This default behavior can be changed with the
21sys_landlock_restrict_self() flags (cf.21sys_landlock_restrict_self() flags (cf.
22Documentation/userspace-api/landlock.rst). Landlock logs can also be masked22Documentation/userspace-api/landlock.rst), or suppressed on a per-object
23thanks to audit rules. Landlock can generate 2 audit record types.23basis by using ``LANDLOCK_ADD_RULE_QUIET`` (ABI 10+). Landlock logs can
24also be masked thanks to audit rules. Landlock can generate 2 audit
25record types.
24 26
25Record types27Record types
26------------28------------
@@ -54,6 +56,8 @@ AUDIT_LANDLOCK_ACCESS · 27 unmodified lines
54 **net.*** - Network access rights (ABI 4+):56 **net.*** - Network access rights (ABI 4+):
55 - net.bind_tcp - TCP port binding was denied57 - net.bind_tcp - TCP port binding was denied
56 - net.connect_tcp - TCP connection was denied58 - net.connect_tcp - TCP connection was denied
59 - net.bind_udp - UDP port binding was denied
60 - net.connect_send_udp - UDP connection and send was denied
57 61
58 **scope.*** - IPC scoping restrictions (ABI 6+):62 **scope.*** - IPC scoping restrictions (ABI 6+):
59 - scope.abstract_unix_socket - Abstract UNIX socket connection denied63 - scope.abstract_unix_socket - Abstract UNIX socket connection denied
@@ -172,7 +176,8 @@ If you get spammed with audit logs related to Landlock, this is either an · 112 unmodified lines
172attack attempt or a bug in the security policy. We can put in place some176attack attempt or a bug in the security policy. We can put in place some
173filters to limit noise with two complementary ways:177filters to limit noise with two complementary ways:
174 178
175- with sys_landlock_restrict_self()'s flags if we can fix the sandboxed179- with sys_landlock_restrict_self()'s flags, or
180 ``LANDLOCK_ADD_RULE_QUIET`` (ABI 10+) if we can fix the sandboxed
176 programs,181 programs,
177- or with audit rules (see :manpage:`auditctl(8)`).182- or with audit rules (see :manpage:`auditctl(8)`).
178 183
Documentation/admin-guide/binfmt-misc.rst+4−4
@@ -68,10 +68,10 @@ Here is what the fields mean: · 67 unmodified lines
68 Legacy behavior of binfmt_misc is to pass the full path68 Legacy behavior of binfmt_misc is to pass the full path
69 of the binary to the interpreter as an argument. When this flag is69 of the binary to the interpreter as an argument. When this flag is
70 included, binfmt_misc will open the file for reading and pass its70 included, binfmt_misc will open the file for reading and pass its
71 descriptor as an argument, instead of the full path, thus allowing71 descriptor into the auxilary vector with the key "AT_EXECFD", thus
72 the interpreter to execute non-readable binaries. This feature72 allowing the interpreter to execute non-readable binaries. This
73 should be used with care - the interpreter has to be trusted not to73 feature should be used with care - the interpreter has to be trusted
74 emit the contents of the non-readable binary.74 not to emit the contents of the non-readable binary.
75 ``C`` - credentials75 ``C`` - credentials
76 Currently, the behavior of binfmt_misc is to calculate76 Currently, the behavior of binfmt_misc is to calculate
77 the credentials and security token of the new process according to77 the credentials and security token of the new process according to
Documentation/admin-guide/bug-hunting.rst+2−2
@@ -63,8 +63,8 @@ Documentation/admin-guide/tainted-kernels.rst, "being loaded" is · 62 unmodified lines
63annotated with "+", and "being unloaded" is annotated with "-".63annotated with "+", and "being unloaded" is annotated with "-".
64 64
65 65
66Where is the Oops message is located?66Where is the Oops message located?
67-------------------------------------67----------------------------------
68 68
69Normally the Oops text is read from the kernel buffers by klogd and69Normally the Oops text is read from the kernel buffers by klogd and
70handed to ``syslogd`` which writes it to a syslog file, typically70handed to ``syslogd`` which writes it to a syslog file, typically
Documentation/admin-guide/cgroup-v1/cgroups.rst+1−1
@@ -525,7 +525,7 @@ cgroup. It may also be taken to prevent cgroups from being · 524 unmodified lines
525modified, but more specific locks may be more appropriate in that525modified, but more specific locks may be more appropriate in that
526situation.526situation.
527 527
528See kernel/cgroup.c for more details.528See kernel/cgroup/cgroup.c for more details.
529 529
530Subsystems can take/release the cgroup_mutex via the functions530Subsystems can take/release the cgroup_mutex via the functions
531cgroup_lock()/cgroup_unlock().531cgroup_lock()/cgroup_unlock().
Documentation/admin-guide/cgroup-v1/memcg_test.rst+1−1
@@ -321,7 +321,7 @@ Under below explanation, we assume CONFIG_SWAP=y. · 320 unmodified lines
321----------------------321----------------------
322 322
323 Memory controller implements memory thresholds using cgroups notification323 Memory controller implements memory thresholds using cgroups notification
324 API. You can use tools/cgroup/cgroup_event_listener.c to test it.324 API. You can use samples/cgroup/cgroup_event_listener.c to test it.
325 325
326 (Shell-A) Create cgroup and run event listener::326 (Shell-A) Create cgroup and run event listener::
327 327
Documentation/admin-guide/cgroup-v2.rst+53−0
@@ -2785,6 +2785,59 @@ RDMA Interface Files · 2784 unmodified lines
2785 mlx4_0 hca_handle=1 hca_object=202785 mlx4_0 hca_handle=1 hca_object=20
2786 ocrdma1 hca_handle=1 hca_object=232786 ocrdma1 hca_handle=1 hca_object=23
2787 2787
2788 rdma.peak
2789 A read-only nested-keyed file that exists for all the cgroups
2790 except root. It shows the historical high watermark of
2791 resource usage per device since the cgroup was created.
2792
2793 An example for mlx4 and ocrdma device follows::
2794
2795 mlx4_0 hca_handle=1 hca_object=20
2796 ocrdma1 hca_handle=0 hca_object=23
2797
2798 rdma.events
2799 A read-only nested-keyed file which exists on non-root
2800 cgroups. The following nested keys are defined.
2801
2802 max
2803 The number of times a process in this cgroup or its
2804 descendants attempted an RDMA resource allocation that
2805 was rejected because a rdma.max limit in the subtree
2806 was reached. This is a hierarchical counter: the event
2807 is propagated upward to all ancestor cgroups. A value
2808 change in this file generates a file modified event.
2809
2810 alloc_fail
2811 The number of RDMA resource allocation attempts that
2812 originated in this cgroup or its descendants and failed
2813 due to a rdma.max limit being reached. This is a
2814 hierarchical counter propagated upward.
2815
2816 An example for mlx4 device follows::
2817
2818 mlx4_0 hca_handle.max=5 hca_handle.alloc_fail=3 hca_object.max=0 hca_object.alloc_fail=0
2819
2820 rdma.events.local
2821 Similar to rdma.events but the fields in the file are local
2822 to the cgroup i.e. not hierarchical. The file modified event
2823 generated on this file reflects only the local events.
2824
2825 The following nested keys are defined.
2826
2827 max
2828 The number of times a process in this cgroup or its
2829 descendants attempted an RDMA resource allocation that
2830 was rejected because this cgroup's own rdma.max limit
2831 was reached.
2832 alloc_fail
2833 The number of RDMA resource allocation attempts
2834 originating from this cgroup that failed due to this
2835 cgroup's or an ancestor's rdma.max limit.
2836
2837 An example for mlx4 device follows::
2838
2839 mlx4_0 hca_handle.max=5 hca_handle.alloc_fail=0 hca_object.max=0 hca_object.alloc_fail=0
2840
2788DMEM2841DMEM
2789----2842----
2790 2843
Documentation/admin-guide/device-mapper/dm-inlinecrypt.rst+129−0
@@ -0,0 +1,129 @@
1==============
2dm-inlinecrypt
3==============
4
5Device-Mapper's "inlinecrypt" target provides transparent encryption of block devices
6using the inline encryption hardware.
7
8For a more detailed description of inline encryption, see:
9https://docs.kernel.org/block/inline-encryption.html
10
11Parameters::
12
13 <cipher> <key> <iv_offset> <device path> \
14 <offset> [<#opt_params> <opt_params>]
15
16<cipher>
17 Encryption cipher type.
18
19 The cipher specifications format is::
20
21 cipher
22
23 Examples::
24
25 aes-xts-plain64
26
27 The cipher type corresponds to the encryption modes supported by
28 inline crypto in the block layer. Currently, only
29 BLK_ENCRYPTION_MODE_AES_256_XTS (i.e. aes-xts-plain64) is supported.
30
31<key>
32 Key used for encryption. It is encoded either as a hexadecimal number
33 or it can be passed as <key_string> prefixed with single colon
34 character (':') for keys residing in kernel keyring service.
35 You can only use key sizes that are valid for the selected cipher.
36 Note that the size in bytes of a valid key must be in bellow range.
37
38 [BLK_CRYPTO_KEY_TYPE_RAW, BLK_CRYPTO_KEY_TYPE_HW_WRAPPED]
39
40<key_string>
41 The kernel keyring key is identified by string in following format:
42 <key_size>:<keyring_type>:<key_description>.
43
44<key_size>
45 The encryption key size in bytes. The kernel key payload size must match
46 the value passed in <key_size>.
47
48<keyring_type>
49 The type of the key inside the kernel keyring. It can be either 'logon',
50 or 'trusted' kernel key type.
51
52<key_description>
53 The kernel keyring key description inlinecrypt target should look for
54 when loading key of <keyring_type>.
55
56<iv_offset>
57 The IV offset is a sector count that is added to the sector number
58 before creating the IV.
59
60<device path>
61 This is the device that is going to be used as backend and contains the
62 encrypted data. You can specify it as a path like /dev/xxx or a device
63 number <major>:<minor>.
64
65<offset>
66 Starting sector within the device where the encrypted data begins.
67
68<#opt_params>
69 Number of optional parameters. If there are no optional parameters,
70 the optional parameters section can be skipped or #opt_params can be zero.
71 Otherwise #opt_params is the number of following arguments.
72
73 Example of optional parameters section:
74 keytype:raw allow_discards sector_size:4096 iv_large_sectors
75
76<key_type>
77 The type of the key as seen by the block layer, either standard or
78 hardware-wrapped. The string is supplied in the table as <keytype:raw>
79 or <keytype:hw-wrapped>.
80
81allow_discards
82 Block discard requests (a.k.a. TRIM) are passed through the inlinecrypt
83 device. The default is to ignore discard requests.
84
85 WARNING: Assess the specific security risks carefully before enabling this
86 option. For example, allowing discards on encrypted devices may lead to
87 the leak of information about the ciphertext device (filesystem type,
88 used space etc.) if the discarded blocks can be located easily on the
89 device later.
90
91sector_size:<bytes>
92 Use <bytes> as the encryption unit instead of 512 bytes sectors.
93 This option can be in range 512 - 4096 bytes and must be power of two.
94 Virtual device will announce this size as a minimal IO and logical sector.
95
96iv_large_sectors
97 Use <sector_size>-based sector numbers for IV generation instead of
98 512-byte sectors.
99
100 For dm-inlinecrypt, this flag must be specified when <sector_size>
101 is larger than 512 bytes. The legacy 512-byte-based IV behavior is
102 not supported.
103
104 When specified, if <sector_size> is 4096 bytes, plain64 IV for the
105 second sector will be 1, and <iv_offset> must be a multiple of
106 <sector_size> (in 512-byte units).
107
108Example scripts
109===============
110Currently, dm-inlinecrypt devices must be set up directly using dmsetup.
111There is no userspace support yet to integrate dm-inlinecrypt with LUKS
112or cryptsetup. In particular, cryptsetup currently only supports
113dm-crypt, and cannot be used to create dm-inlinecrypt mappings.
114
115The following examples demonstrate how to create dm-inlinecrypt devices
116using dmsetup
117
118::
119
120 #!/bin/sh
121 # Create a inlinecrypt device using dmsetup
122 dmsetup create inlinecrypt1 --table "0 `blockdev --getsz $1` inlinecrypt aes-xts-plain64 babebabebabebabebabebabebabebabebabebabebabebabebabebabebabebabe 0 0 $1 0 1 keytype:raw"
123
124::
125
126 #!/bin/sh
127 # Create a inlinecrypt device using dmsetup when encryption key is stored in keyring service
128 dmsetup create inlinecrypt2 --table "0 `blockdev --getsz $1` inlinecrypt aes-xts-plain64 :64:logon:fde:dminlinecrypt_test_key 0 0 $1 0 1 keytype:raw"
129
Documentation/admin-guide/device-mapper/index.rst+1−0
@@ -15,6 +15,7 @@ Device Mapper · 14 unmodified lines
15 dm-flakey15 dm-flakey
16 dm-ima16 dm-ima
17 dm-init17 dm-init
18 dm-inlinecrypt
18 dm-integrity19 dm-integrity
19 dm-io20 dm-io
20 dm-log21 dm-log
Documentation/admin-guide/devices.txt+0−1
@@ -291,7 +291,6 @@ · 290 unmodified lines
291 154 = /dev/pmu Macintosh PowerBook power manager291 154 = /dev/pmu Macintosh PowerBook power manager
292 155 =292 155 =
293 156 = /dev/lcd Front panel LCD display293 156 = /dev/lcd Front panel LCD display
294 157 = /dev/ac Applicom Intl Profibus card
295 158 = /dev/nwbutton Netwinder external button294 158 = /dev/nwbutton Netwinder external button
296 159 = /dev/nwdebug Netwinder debug interface295 159 = /dev/nwdebug Netwinder debug interface
297 160 = /dev/nwflash Netwinder flash memory296 160 = /dev/nwflash Netwinder flash memory
Documentation/admin-guide/dynamic-debug-howto.rst+22−13
@@ -38,12 +38,12 @@ You can view the currently configured behaviour in the *prdbg* catalog:: · 37 unmodified lines
38 38
39 :#> head -n7 /proc/dynamic_debug/control39 :#> head -n7 /proc/dynamic_debug/control
40 # filename:lineno [module]function flags format40 # filename:lineno [module]function flags format
41 init/main.c:1179 [main]initcall_blacklist =_ "blacklisting initcall %s\01241 init/main.c:1179 [main]initcall_blacklist =_ "blacklisting initcall %s\n"
42 init/main.c:1218 [main]initcall_blacklisted =_ "initcall %s blacklisted\012"42 init/main.c:1218 [main]initcall_blacklisted =_ "initcall %s blacklisted\n"
43 init/main.c:1424 [main]run_init_process =_ " with arguments:\012"43 init/main.c:1424 [main]run_init_process =_ " with arguments:\n"
44 init/main.c:1426 [main]run_init_process =_ " %s\012"44 init/main.c:1426 [main]run_init_process =_ " %s\n"
45 init/main.c:1427 [main]run_init_process =_ " with environment:\012"45 init/main.c:1427 [main]run_init_process =_ " with environment:\n"
46 init/main.c:1429 [main]run_init_process =_ " %s\012"46 init/main.c:1429 [main]run_init_process =_ " %s\n"
47 47
48The 3rd space-delimited column shows the current flags, preceded by48The 3rd space-delimited column shows the current flags, preceded by
49a ``=`` for easy use with grep/cut. ``=p`` shows enabled callsites.49a ``=`` for easy use with grep/cut. ``=p`` shows enabled callsites.
@@ -59,10 +59,10 @@ query/commands to the control file. Example:: · 9 unmodified lines
59 59
60 :#> ddcmd '-p; module main func run* +p'60 :#> ddcmd '-p; module main func run* +p'
61 :#> grep =p /proc/dynamic_debug/control61 :#> grep =p /proc/dynamic_debug/control
62 init/main.c:1424 [main]run_init_process =p " with arguments:\012"62 init/main.c:1424 [main]run_init_process =p " with arguments:\n"
63 init/main.c:1426 [main]run_init_process =p " %s\012"63 init/main.c:1426 [main]run_init_process =p " %s\n"
64 init/main.c:1427 [main]run_init_process =p " with environment:\012"64 init/main.c:1427 [main]run_init_process =p " with environment:\n"
65 init/main.c:1429 [main]run_init_process =p " %s\012"65 init/main.c:1429 [main]run_init_process =p " %s\n"
66 66
67Error messages go to console/syslog::67Error messages go to console/syslog::
68 68
@@ -109,10 +109,19 @@ The match-spec's select *prdbgs* from the catalog, upon which to apply · 40 unmodified lines
109the flags-spec, all constraints are ANDed together. An absent keyword109the flags-spec, all constraints are ANDed together. An absent keyword
110is the same as keyword "*".110is the same as keyword "*".
111 111
112Note that since the match-spec can be empty, the flags are checked 1st,
113then the pairs of keyword and value. Flag errs will hide keyword errs::
112 114
113A match specification is a keyword, which selects the attribute of115 bash-5.2# ddcmd mod bar +foo
114the callsite to be compared, and a value to compare against. Possible116 dyndbg: read 13 bytes from userspace
115keywords are:::117 dyndbg: query 0: "mod bar +foo" mod:*
118 dyndbg: unknown flag 'o'
119 dyndbg: flags parse failed
120 dyndbg: processed 1 queries, with 0 matches, 1 errs
121
122So a match-spec is a keyword, which selects the attribute of the
123callsite to be compared, and a value to compare against. Possible
124keywords are::
116 125
117 match-spec ::= 'func' string |126 match-spec ::= 'func' string |
118 'file' string |127 'file' string |
Documentation/admin-guide/kernel-parameters.txt+90−97
@@ -24,7 +24,6 @@ · 23 unmodified lines
24 IP_PNP IP DHCP, BOOTP, or RARP is enabled.24 IP_PNP IP DHCP, BOOTP, or RARP is enabled.
25 IPV6 IPv6 support is enabled.25 IPV6 IPv6 support is enabled.
26 ISAPNP ISA PnP code is enabled.26 ISAPNP ISA PnP code is enabled.
27 ISDN Appropriate ISDN support is enabled.
28 ISOL CPU Isolation is enabled.27 ISOL CPU Isolation is enabled.
29 JOY Appropriate joystick support is enabled.28 JOY Appropriate joystick support is enabled.
30 KGDB Kernel debugger support is enabled.29 KGDB Kernel debugger support is enabled.
@@ -36,7 +35,6 @@ · 5 unmodified lines
36 M68k M68k architecture is enabled.35 M68k M68k architecture is enabled.
37 These options have more detailed description inside of36 These options have more detailed description inside of
38 Documentation/arch/m68k/kernel-options.rst.37 Documentation/arch/m68k/kernel-options.rst.
39 MDA MDA console support is enabled.
40 MIPS MIPS architecture is enabled.38 MIPS MIPS architecture is enabled.
41 MOUSE Appropriate mouse support is enabled.39 MOUSE Appropriate mouse support is enabled.
42 MSI Message Signaled Interrupts (PCI).40 MSI Message Signaled Interrupts (PCI).
@@ -558,9 +556,6 @@ Kernel parameters · 515 unmodified lines
558 1 -- enable.556 1 -- enable.
559 Default value is set via kernel config option.557 Default value is set via kernel config option.
560 558
561 arcrimi= [HW,NET] ARCnet - "RIM I" (entirely mem-mapped) cards
562 Format: <io>,<irq>,<nodeID>
563
564 arm64.no32bit_el0 [ARM64] Unconditionally disable the execution of559 arm64.no32bit_el0 [ARM64] Unconditionally disable the execution of
565 32 bit applications.560 32 bit applications.
566 561
@@ -789,24 +784,6 @@ Kernel parameters · 222 unmodified lines
789 cio_ignore= [S390]784 cio_ignore= [S390]
790 See Documentation/arch/s390/common_io.rst for details.785 See Documentation/arch/s390/common_io.rst for details.
791 786
792 clearcpuid=X[,X...] [X86]
793 Disable CPUID feature X for the kernel. See
794 arch/x86/include/asm/cpufeatures.h for the valid bit
795 numbers X. Note the Linux-specific bits are not necessarily
796 stable over kernel options, but the vendor-specific
797 ones should be.
798 X can also be a string as appearing in the flags: line
799 in /proc/cpuinfo which does not have the above
800 instability issue. However, not all features have names
801 in /proc/cpuinfo.
802 Note that using this option will taint your kernel.
803 Also note that user programs calling CPUID directly
804 or using the feature without checking anything
805 will still see it. This just prevents it from
806 being used by the kernel or shown in /proc/cpuinfo.
807 Also note the kernel might malfunction if you disable
808 some critical bits.
809
810 clk_ignore_unused787 clk_ignore_unused
811 [CLK]788 [CLK]
812 Prevents the clock framework from automatically gating789 Prevents the clock framework from automatically gating
@@ -895,6 +872,10 @@ Kernel parameters · 82 unmodified lines
895 contiguous memory allocations. It will reserve CMA872 contiguous memory allocations. It will reserve CMA
896 area for the specified node.873 area for the specified node.
897 874
875 If it is setup together with upper 'cmd_pernuma='
876 (unlikely), its size setting takes priority for the
877 specified numa nodes.
878
898 With numa CMA enabled, DMA users on node nid will879 With numa CMA enabled, DMA users on node nid will
899 first try to allocate buffer from the numa area880 first try to allocate buffer from the numa area
900 which is located in node nid, if the allocation fails,881 which is located in node nid, if the allocation fails,
@@ -911,17 +892,6 @@ Kernel parameters · 10 unmodified lines
911 Sets the size of memory pool for coherent, atomic dma892 Sets the size of memory pool for coherent, atomic dma
912 allocations, by default set to 256K.893 allocations, by default set to 256K.
913 894
914 com20020= [HW,NET] ARCnet - COM20020 chipset
915 Format:
916 <io>[,<irq>[,<nodeID>[,<backplane>[,<ckp>[,<timeout>]]]]]
917
918 com90io= [HW,NET] ARCnet - COM90xx chipset (IO-mapped buffers)
919 Format: <io>[,<irq>]
920
921 com90xx= [HW,NET]
922 ARCnet - COM90xx chipset (memory-mapped buffers)
923 Format: <io>[,<irq>[,<memstart>]]
924
925 condev= [HW,S390] console device895 condev= [HW,S390] console device
926 conmode=896 conmode=
927 897
@@ -1246,8 +1216,9 @@ Kernel parameters · 318 unmodified lines
1246 deferred probe to give up waiting on dependencies to1216 deferred probe to give up waiting on dependencies to
1247 probe. Only specific dependencies (subsystems or1217 probe. Only specific dependencies (subsystems or
1248 drivers) that have opted in will be ignored. A timeout1218 drivers) that have opted in will be ignored. A timeout
1249 of 0 will timeout at the end of initcalls. If the time1219 of 0 will timeout at the end of initcalls; a negative
1250 out hasn't expired, it'll be restarted by each1220 value is treated as an infinite timeout value. If the
1221 timeout hasn't expired, it'll be restarted by each
1251 successful driver registration. This option will also1222 successful driver registration. This option will also
1252 dump out devices still on the deferred probe list after1223 dump out devices still on the deferred probe list after
1253 retrying.1224 retrying.
@@ -1669,10 +1640,6 @@ Kernel parameters · 415 unmodified lines
1669 very early in the boot process. For early debugging1640 very early in the boot process. For early debugging
1670 via a serial port see kgdboc_earlycon instead.1641 via a serial port see kgdboc_earlycon instead.
1671 1642
1672 elanfreq= [X86-32]
1673 See comment before function elanfreq_setup() in
1674 arch/x86/kernel/cpu/cpufreq/elanfreq.c.
1675
1676 elfcorehdr=[size[KMG]@]offset[KMG] [PPC,SH,X86,S390,EARLY]1643 elfcorehdr=[size[KMG]@]offset[KMG] [PPC,SH,X86,S390,EARLY]
1677 Specifies physical address of start of kernel core1644 Specifies physical address of start of kernel core
1678 image elf header and optionally the size. Generally1645 image elf header and optionally the size. Generally
@@ -2100,6 +2067,10 @@ Kernel parameters · 421 unmodified lines
2100 Format: nn[KMGTPE] or (node format)2067 Format: nn[KMGTPE] or (node format)
2101 <node>:nn[KMGTPE][,<node>:nn[KMGTPE]]2068 <node>:nn[KMGTPE][,<node>:nn[KMGTPE]]
2102 2069
2070 The size must be a multiple of the gigantic page size.
2071 When using node format, this applies to each per-node size.
2072 Missaligned values are dropped with a warning.
2073
2103 Reserve a CMA area of given size and allocate gigantic2074 Reserve a CMA area of given size and allocate gigantic
2104 hugepages using the CMA allocator. If enabled, the2075 hugepages using the CMA allocator. If enabled, the
2105 boot-time allocation of gigantic hugepages is skipped.2076 boot-time allocation of gigantic hugepages is skipped.
@@ -2245,9 +2216,6 @@ Kernel parameters · 139 unmodified lines
2245 syscalls, essentially overriding IA32_EMULATION_DEFAULT_DISABLED at2216 syscalls, essentially overriding IA32_EMULATION_DEFAULT_DISABLED at
2246 boot time. When false, unconditionally disables IA32 emulation.2217 boot time. When false, unconditionally disables IA32 emulation.
2247 2218
2248 icn= [HW,ISDN]
2249 Format: <io>[,<membase>[,<icn_id>[,<icn_id2>]]]
2250
2251 2219
2252 idle= [X86,EARLY]2220 idle= [X86,EARLY]
2253 Format: idle=poll, idle=halt, idle=nomwait2221 Format: idle=poll, idle=halt, idle=nomwait
@@ -2343,6 +2311,12 @@ Kernel parameters · 89 unmodified lines
2343 Use the canonical format for the binary runtime2311 Use the canonical format for the binary runtime
2344 measurements, instead of host native format.2312 measurements, instead of host native format.
2345 2313
2314 ima_flush_htable [IMA]
2315 Flush the IMA hash table when deleting all the
2316 staged measurement records, to achieve maximum
2317 memory saving at the cost of having duplicate
2318 records across the staged measurement lists.
2319
2346 ima_hash= [IMA]2320 ima_hash= [IMA]
2347 Format: { md5 | sha1 | rmd160 | sha256 | sha3842321 Format: { md5 | sha1 | rmd160 | sha256 | sha384
2348 | sha512 | ... }2322 | sha512 | ... }
@@ -2584,23 +2558,41 @@ Kernel parameters · 235 unmodified lines
2584 Don't force hardware IOMMU usage when it is not2558 Don't force hardware IOMMU usage when it is not
2585 needed. (default).2559 needed. (default).
2586 2560
2561 merge
2562 Do scatter-gather (SG) merging. Implies "force"
2563 (experimental).
2564
2565 nomerge
2566 Don't do scatter-gather (SG) merging.
2567
2587 biomerge2568 biomerge
2569 Do scatter-gather (SG) merging. Implies "force"
2570 (experimental). [same as "merge"]
2571
2588 panic2572 panic
2573 Always panic when IOMMU overflows.
2574
2589 nopanic2575 nopanic
2590 merge2576 Don't panic on IOMMU overflows.
2591 nomerge2577
2578 pt
2579 Use passththrough mode by default
2580 (Equivalent to iommu.passthrough=1)
2581
2582 nopt
2583 Use translated mode for DMA by default
2584 (Equivalent to iommu.passthrough=0)
2592 2585
2593 soft2586 soft
2594 Use software bounce buffering (SWIOTLB) (default for2587 Use software bounce buffering (SWIOTLB) (default for
2595 Intel machines). This can be used to prevent the usage2588 Intel machines). This can be used to prevent the usage
2596 of an available hardware IOMMU.2589 of an available hardware IOMMU.
2597 2590
2598 pt2591 usedac
2599 nopt2592 Use the DAC on VIA PCI bridge
2600 nobypass [PPC/POWERNV]2593 (default: disable the VIA PCI bridge DAC)
2601 Disable IOMMU bypass, using IOMMU for PCI devices.
2602 2594
2603 AMD Gart HW IOMMU-specific options:2595 AMD Gart HW IOMMU-specific options: (CONFIG_GART_IOMMU)
2604 2596
2605 <size>2597 <size>
2606 Set the size of the remapping area in bytes.2598 Set the size of the remapping area in bytes.
@@ -2608,6 +2600,9 @@ Kernel parameters · 1 unmodified line
2608 allowed2600 allowed
2609 Overwrite iommu off workarounds for specific chipsets2601 Overwrite iommu off workarounds for specific chipsets
2610 2602
2603 force
2604 Overwrite iommu off workarounds for specific chipsets
2605
2611 fullflush2606 fullflush
2612 Flush IOMMU on each allocation (default).2607 Flush IOMMU on each allocation (default).
2613 2608
@@ -2618,21 +2613,16 @@ Kernel parameters · 4 unmodified lines
2618 Allocate an own aperture over RAM with size2613 Allocate an own aperture over RAM with size
2619 32MB<<order. (default: order=1, i.e. 64MB)2614 32MB<<order. (default: order=1, i.e. 64MB)
2620 2615
2621 merge
2622 Do scatter-gather (SG) merging. Implies "force"
2623 (experimental).
2624
2625 nomerge
2626 Don't do scatter-gather (SG) merging.
2627
2628 noaperture2616 noaperture
2629 Ask the IOMMU not to touch the aperture for AGP.2617 Ask the IOMMU not to touch the aperture for AGP.
2630 2618
2631 noagp2619 noagp
2632 Don't initialize the AGP driver and use full aperture.2620 Don't initialize the AGP driver and use full aperture.
2633 2621
2634 panic2622 iommu= [PPC/POWERNV]
2635 Always panic when IOMMU overflows.2623
2624 nobypass
2625 Disable IOMMU bypass, using IOMMU for PCI devices.
2636 2626
2637 iommu.forcedac= [ARM64,X86,EARLY] Control IOVA allocation for PCI devices.2627 iommu.forcedac= [ARM64,X86,EARLY] Control IOVA allocation for PCI devices.
2638 Format: { "0" | "1" }2628 Format: { "0" | "1" }
@@ -2755,7 +2745,6 @@ Kernel parameters · 116 unmodified lines
2755 Format: <RDP>,<reset>,<pci_scan>,<verbosity>2745 Format: <RDP>,<reset>,<pci_scan>,<verbosity>
2756 2746
2757 isolcpus= [KNL,SMP,ISOL] Isolate a given set of CPUs from disturbance.2747 isolcpus= [KNL,SMP,ISOL] Isolate a given set of CPUs from disturbance.
2758 [Deprecated - use cpusets instead]
2759 Format: [flag-list,]<cpu-list>2748 Format: [flag-list,]<cpu-list>
2760 2749
2761 Specify one or more CPUs to isolate from disturbances2750 Specify one or more CPUs to isolate from disturbances
@@ -2780,11 +2769,10 @@ Kernel parameters · 18 unmodified lines
2780 Isolate from the general SMP balancing and scheduling2769 Isolate from the general SMP balancing and scheduling
2781 algorithms. Note that performing domain isolation this way2770 algorithms. Note that performing domain isolation this way
2782 is irreversible: it's not possible to bring back a CPU to2771 is irreversible: it's not possible to bring back a CPU to
2783 the domains once isolated through isolcpus. It's strongly2772 the domains once isolated through this boot time
2784 advised to use cpusets instead to disable scheduler load2773 configuration. Use cpusets for a dynamic configuration
2785 balancing through the "cpuset.sched_load_balance" file.2774 which can be altered at runtime. For details see
2786 It offers a much more flexible interface where CPUs can2775 Documentation/admin-guide/cpu-isolation.rst.
2787 move in and out of an isolated set anytime.
2788 2776
2789 You can move a process onto or off an "isolated" CPU via2777 You can move a process onto or off an "isolated" CPU via
2790 the CPU affinity syscalls or cpuset.2778 the CPU affinity syscalls or cpuset.
@@ -3816,10 +3804,6 @@ Kernel parameters · 1025 unmodified lines
3816 md= [HW] RAID subsystems devices and level3804 md= [HW] RAID subsystems devices and level
3817 See Documentation/admin-guide/md.rst.3805 See Documentation/admin-guide/md.rst.
3818 3806
3819 mdacon= [MDA]
3820 Format: <first>,<last>
3821 Specifies range of consoles to be captured by the MDA.
3822
3823 mds= [X86,INTEL,EARLY]3807 mds= [X86,INTEL,EARLY]
3824 Control mitigation for the Micro-architectural Data3808 Control mitigation for the Micro-architectural Data
3825 Sampling (MDS) vulnerability.3809 Sampling (MDS) vulnerability.
@@ -4266,12 +4250,8 @@ Kernel parameters · 440 unmodified lines
4266 4250
4267 n2= [NET] SDL Inc. RISCom/N2 synchronous serial card4251 n2= [NET] SDL Inc. RISCom/N2 synchronous serial card
4268 4252
4269 netdev= [NET] Network devices parameters4253 netdev= [NET] NE2000 ISA network devices parameters
4270 Format: <irq>,<io>,<mem_start>,<mem_end>,<name>4254 Format: <irq>,<io>,<mem_start>,<mem_end>,<name>
4271 Note that mem_start is often overloaded to mean
4272 something different and driver-specific.
4273 This usage is only documented in each driver source
4274 file if at all.
4275 4255
4276 netpoll.carrier_timeout=4256 netpoll.carrier_timeout=
4277 [NET] Specifies amount of time (in seconds) that4257 [NET] Specifies amount of time (in seconds) that
@@ -4308,13 +4288,6 @@ Kernel parameters · 30 unmodified lines
4308 Only applies if the softerr mount option is enabled,4288 Only applies if the softerr mount option is enabled,
4309 and the specified value is >= 0.4289 and the specified value is >= 0.
4310 4290
4311 nfs.enable_ino64=
4312 [NFS] enable 64-bit inode numbers.
4313 If zero, the NFS client will fake up a 32-bit inode
4314 number for the readdir() and stat() syscalls instead
4315 of returning the full 64-bit number.
4316 The default is to return 64-bit inode numbers.
4317
4318 nfs.idmap_cache_timeout=4291 nfs.idmap_cache_timeout=
4319 [NFS] set the maximum lifetime for idmapper cache4292 [NFS] set the maximum lifetime for idmapper cache
4320 entries.4293 entries.
@@ -4437,10 +4410,6 @@ Kernel parameters · 116 unmodified lines
4437 These settings can be accessed at runtime via4410 These settings can be accessed at runtime via
4438 the nmi_watchdog and hardlockup_panic sysctls.4411 the nmi_watchdog and hardlockup_panic sysctls.
4439 4412
4440 no387 [BUGS=X86-32] Tells the kernel to use the 387 maths
4441 emulation library even if a 387 maths coprocessor
4442 is present.
4443
4444 no4lvl [RISCV,EARLY] Disable 4-level and 5-level paging modes.4413 no4lvl [RISCV,EARLY] Disable 4-level and 5-level paging modes.
4445 Forces kernel to use 3-level paging instead.4414 Forces kernel to use 3-level paging instead.
4446 4415
@@ -4644,7 +4613,7 @@ Kernel parameters · 197 unmodified lines
4644 nosmt [KNL,MIPS,PPC,EARLY] Disable symmetric multithreading (SMT).4613 nosmt [KNL,MIPS,PPC,EARLY] Disable symmetric multithreading (SMT).
4645 Equivalent to smt=1.4614 Equivalent to smt=1.
4646 4615
4647 [KNL,LOONGARCH,X86,PPC,S390] Disable symmetric multithreading (SMT).4616 [KNL,LOONGARCH,X86,ARM64,PPC,S390] Disable symmetric multithreading (SMT).
4648 nosmt=force: Force disable SMT, cannot be undone4617 nosmt=force: Force disable SMT, cannot be undone
4649 via the sysfs control file.4618 via the sysfs control file.
4650 4619
@@ -5037,8 +5006,6 @@ Kernel parameters · 386 unmodified lines
5037 the specified number of seconds. This is to be used if5006 the specified number of seconds. This is to be used if
5038 your oopses keep scrolling off the screen.5007 your oopses keep scrolling off the screen.
5039 5008
5040 pcbit= [HW,ISDN]
5041
5042 pci=option[,option...] [PCI,EARLY] various PCI subsystem options.5009 pci=option[,option...] [PCI,EARLY] various PCI subsystem options.
5043 5010
5044 Some options herein operate on a specific device5011 Some options herein operate on a specific device
@@ -5862,13 +5829,13 @@ Kernel parameters · 817 unmodified lines
5862 use a call_rcu[_hurry]() path. Please note, this is for a5829 use a call_rcu[_hurry]() path. Please note, this is for a
5863 normal grace period.5830 normal grace period.
5864 5831
5865 How to enable it:5832 How to disable it:
5866 5833
5867 echo 1 > /sys/module/rcutree/parameters/rcu_normal_wake_from_gp5834 echo 0 > /sys/module/rcutree/parameters/rcu_normal_wake_from_gp
5868 or pass a boot parameter "rcutree.rcu_normal_wake_from_gp=1"5835 or pass a boot parameter "rcutree.rcu_normal_wake_from_gp=0"
5869 5836
5870 Default is 1 if num_possible_cpus() <= 16 and it is not explicitly5837 Default is 1 if it is not explicitly disabled by the boot parameter
5871 disabled by the boot parameter passing 0.5838 passing 0.
5872 5839
5873 rcuscale.gp_async= [KNL]5840 rcuscale.gp_async= [KNL]
5874 Measure performance of asynchronous5841 Measure performance of asynchronous
@@ -6778,8 +6745,6 @@ Kernel parameters · 903 unmodified lines
6778 restrictions other than those given by hardware at the6745 restrictions other than those given by hardware at the
6779 cost of significant additional memory use for tables.6746 cost of significant additional memory use for tables.
6780 6747
6781 sa1100ir [NET]
6782 See drivers/net/irda/sa1100_ir.c.
6783 6748
6784 sched_proxy_exec= [KNL]6749 sched_proxy_exec= [KNL]
6785 Enables or disables "proxy execution" style6750 Enables or disables "proxy execution" style
@@ -7236,6 +7201,18 @@ Kernel parameters · 450 unmodified lines
7236 Not specifying this option is equivalent to7201 Not specifying this option is equivalent to
7237 spec_store_bypass_disable=auto.7202 spec_store_bypass_disable=auto.
7238 7203
7204 split_llc=
7205 [X86,EARLY] Split the LLC N-ways
7206
7207 When set, the LLC is split this many ways by matching
7208 'core_id % n'. This is setup before SMP bringup and
7209 used during SMP bringup before it knows the full
7210 topology. If your core count doesn't nicely divide by
7211 the number given, you get to keep the pieces.
7212
7213 This is mostly a debug feature to emulate multiple LLCs
7214 on hardware that only have a single LLC.
7215
7239 split_lock_detect=7216 split_lock_detect=
7240 [X86] Enable split lock detection or bus lock detection7217 [X86] Enable split lock detection or bus lock detection
7241 7218
@@ -7414,10 +7391,10 @@ Kernel parameters · 172 unmodified lines
7414 Set the STI (builtin display/keyboard on the HP-PARISC7391 Set the STI (builtin display/keyboard on the HP-PARISC
7415 machines) console (graphic card) which should be used7392 machines) console (graphic card) which should be used
7416 as the initial boot-console.7393 as the initial boot-console.
7417 See also comment in drivers/video/console/sticore.c.7394 See also comment in drivers/video/sticore.c.
7418 7395
7419 sti_font= [HW]7396 sti_font= [HW]
7420 See comment in drivers/video/console/sticore.c.7397 See comment in drivers/video/sticore.c.
7421 7398
7422 stifb= [HW]7399 stifb= [HW]
7423 Format: bpp:<bpp1>[:<bpp2>[:<bpp3>...]]7400 Format: bpp:<bpp1>[:<bpp2>[:<bpp3>...]]
@@ -7888,6 +7865,22 @@ Kernel parameters · 464 unmodified lines
7888 first trust source as a backend which is initialized7865 first trust source as a backend which is initialized
7889 successfully during iteration.7866 successfully during iteration.
7890 7867
7868 trusted.debug= [KEYS]
7869 Format: <bool>
7870 Enable trusted keys debug traces at runtime when
7871 CONFIG_TRUSTED_KEYS_DEBUG=y.
7872
7873 To make the traces visible after enabling the option,
7874 use trusted.dyndbg='+p' as needed. By convention,
7875 the subsystem uses pr_debug() for these traces.
7876
7877 SAFETY: The traces can leak sensitive data, so be
7878 cautious before enabling this. They remain inactive
7879 unless this parameter is set this option to a true
7880 value.
7881
7882 Default: false
7883
7891 trusted.rng= [KEYS]7884 trusted.rng= [KEYS]
7892 Format: <string>7885 Format: <string>
7893 The RNG used to generate key material for trusted keys.7886 The RNG used to generate key material for trusted keys.
Documentation/admin-guide/laptops/sonypi.rst+1−1
@@ -89,7 +89,7 @@ statically linked into the kernel). Those options are: · 88 unmodified lines
89 set to 0xffffffff, meaning that all possible events89 set to 0xffffffff, meaning that all possible events
90 will be tried. You can use the following bits to90 will be tried. You can use the following bits to
91 construct your own event mask (from91 construct your own event mask (from
92 drivers/char/sonypi.h)::92 include/linux/sonypi.h)::
93 93
94 SONYPI_JOGGER_MASK 0x000194 SONYPI_JOGGER_MASK 0x0001
95 SONYPI_CAPTURE_MASK 0x000295 SONYPI_CAPTURE_MASK 0x0002
Documentation/admin-guide/laptops/uniwill-laptop.rst+22−3
@@ -43,9 +43,23 @@ Support for changing the platform performance mode is currently not implemented. · 42 unmodified lines
43Battery Charging Control43Battery Charging Control
44------------------------44------------------------
45 45
46The ``uniwill-laptop`` driver supports controlling the battery charge limit. This happens over46.. warning:: Some devices do not properly implement the charging threshold interface. Forcing
47the standard ``charge_control_end_threshold`` power supply sysfs attribute. All values47 the driver to enable access to said interface on such devices might damage the
48between 1 and 100 percent are supported.48 battery [1]_. Because of this the driver will not enable said feature even when
49 using the ``force`` module parameter. The charging profile interface will be
50 available instead.
51
52The ``uniwill-laptop`` driver supports controlling the battery charge limit. This either happens
53over the standard ``charge_control_end_threshold`` or ``charge_types`` power supply sysfs attribute,
54depending on the device. When using the ``charge_control_end_threshold`` sysfs attribute, all values
55between 1 and 100 percent are supported. When using the ``charge_types`` sysfs attribute, the driver
56supports switching between the ``Standard``, ``Trickle`` and ``Long Life`` profiles.
57
58Keep in mind that when using the ``charge_types`` sysfs attribute, the EC firmware will hide the
59true charging status of the battery from the operating system, potentially misleading users into
60thinking that the charging profile does not work. Checking the ``current_now`` sysfs attribute
61tells you the true charging status of the battery even when using the ``charge_types`` sysfs
62attribute (0 means that the battery is currently not charging).
49 63
50Additionally the driver signals the presence of battery charging issues through the standard64Additionally the driver signals the presence of battery charging issues through the standard
51``health`` power supply sysfs attribute.65``health`` power supply sysfs attribute.
@@ -70,3 +84,8 @@ The ``uniwill-laptop`` driver allows to set the configurable TGP for devices wit · 18 unmodified lines
70allow it.84allow it.
71 85
72See Documentation/ABI/testing/sysfs-driver-uniwill-laptop for details.86See Documentation/ABI/testing/sysfs-driver-uniwill-laptop for details.
87
88References
89==========
90
91.. [1] https://www.reddit.com/r/XMG_gg/comments/ld9yyf/battery_limit_hidden_function_discovered_on/
Documentation/admin-guide/md.rst+1−1
@@ -734,7 +734,7 @@ also have · 733 unmodified lines
734 They should be scaled by the bitmap_chunksize.734 They should be scaled by the bitmap_chunksize.
735 735
736 sync_speed_min, sync_speed_max736 sync_speed_min, sync_speed_max
737 This are similar to ``/proc/sys/dev/raid/speed_limit_{min,max}``737 These are similar to ``/proc/sys/dev/raid/speed_limit_{min,max}``
738 however they only apply to the particular array.738 however they only apply to the particular array.
739 739
740 If no value has been written to these, or if the word ``system``740 If no value has been written to these, or if the word ``system``
Documentation/admin-guide/media/amdisp4-1.rst+63−0
@@ -0,0 +1,63 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3.. include:: <isonum.txt>
4
5====================================
6AMD Image Signal Processor (amdisp4)
7====================================
8
9Introduction
10============
11
12This file documents the driver for the AMD ISP4 that is part of
13AMD Ryzen AI Max 300 Series.
14
15The driver is located under drivers/media/platform/amd/isp4 and uses
16the Media-Controller API.
17
18The driver exposes one video capture device to userspace and provide
19web camera like interface. Internally the video device is connected
20to the isp4 sub-device responsible for communication with the CCPU FW.
21
22Topology
23========
24
25.. _amdisp4_topology_graph:
26
27.. kernel-figure:: amdisp4.dot
28 :alt: Diagram of the media pipeline topology
29 :align: center
30
31
32
33The driver has 1 sub-device: Representing isp4 image signal processor.
34The driver has 1 video device: Capture device for retrieving images.
35
36- ISP4 Image Signal Processing Subdevice Node
37
38---------------------------------------------
39
40The isp4 is represented as a single V4L2 subdev, the sub-device does not
41provide interface to the user space. The sub-device is connected to one video node
42(isp4_capture) with immutable active link. The sub-device represents ISP with
43connected sensor similar to smart cameras (sensors with integrated ISP).
44sub-device has only one link to the video device for capturing the frames.
45The sub-device communicates with CCPU FW for streaming configuration and
46buffer management.
47
48
49- isp4_capture - Frames Capture Video Node
50
51------------------------------------------
52
53Isp4_capture is a capture device to capture frames to memory.
54The entity is connected to isp4 sub-device. The video device
55provides web camera like interface to userspace. It supports
56mmap and dma buf types of memory.
57
58Capturing Video Frames Example
59==============================
60
61.. code-block:: bash
62
63 v4l2-ctl "-d" "/dev/video0" "--set-fmt-video=width=1920,height=1080,pixelformat=NV12" "--stream-mmap" "--stream-count=10"
Documentation/admin-guide/media/amdisp4.dot+6−0
@@ -0,0 +1,6 @@
1digraph board {
2 rankdir=TB
3 n00000001 [label="{{} | amd isp4\n | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
4 n00000001:port0 -> n00000003 [style=bold]
5 n00000003 [label="Preview\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
6}
Documentation/admin-guide/media/rkcif-rk3588-vicap.dot+29−0
@@ -0,0 +1,29 @@
1digraph board {
2 rankdir=TB
3 n00000007 [label="{{<port0> 0} | rkcif-mipi2\n/dev/v4l-subdev0 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
4 n00000007:port1 -> n0000000a
5 n00000007:port1 -> n00000010 [style=dashed]
6 n00000007:port1 -> n00000016 [style=dashed]
7 n00000007:port1 -> n0000001c [style=dashed]
8 n0000000a [label="rkcif-mipi2-id0\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
9 n00000010 [label="rkcif-mipi2-id1\n/dev/video1", shape=box, style=filled, fillcolor=yellow]
10 n00000016 [label="rkcif-mipi2-id2\n/dev/video2", shape=box, style=filled, fillcolor=yellow]
11 n0000001c [label="rkcif-mipi2-id3\n/dev/video3", shape=box, style=filled, fillcolor=yellow]
12 n00000025 [label="{{<port0> 0} | rkcif-mipi4\n/dev/v4l-subdev1 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
13 n00000025:port1 -> n00000028
14 n00000025:port1 -> n0000002e [style=dashed]
15 n00000025:port1 -> n00000034 [style=dashed]
16 n00000025:port1 -> n0000003a [style=dashed]
17 n00000028 [label="rkcif-mipi4-id0\n/dev/video4", shape=box, style=filled, fillcolor=yellow]
18 n0000002e [label="rkcif-mipi4-id1\n/dev/video5", shape=box, style=filled, fillcolor=yellow]
19 n00000034 [label="rkcif-mipi4-id2\n/dev/video6", shape=box, style=filled, fillcolor=yellow]
20 n0000003a [label="rkcif-mipi4-id3\n/dev/video7", shape=box, style=filled, fillcolor=yellow]
21 n00000043 [label="{{<port0> 0} | dw-mipi-csi2rx fdd30000.csi\n/dev/v4l-subdev2 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
22 n00000043:port1 -> n00000007:port0
23 n00000048 [label="{{<port0> 0} | dw-mipi-csi2rx fdd50000.csi\n/dev/v4l-subdev3 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
24 n00000048:port1 -> n00000025:port0
25 n0000004d [label="{{} | imx415 3-001a\n/dev/v4l-subdev4 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
26 n0000004d:port0 -> n00000043:port0
27 n00000051 [label="{{} | imx415 4-001a\n/dev/v4l-subdev5 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
28 n00000051:port0 -> n00000048:port0
29}
Documentation/admin-guide/media/rkcif.rst+32−0
@@ -77,3 +77,35 @@ and the following video devices: · 76 unmodified lines
77.. kernel-figure:: rkcif-rk3568-vicap.dot77.. kernel-figure:: rkcif-rk3568-vicap.dot
78 :alt: Topology of the RK3568 Video Capture (VICAP) unit78 :alt: Topology of the RK3568 Video Capture (VICAP) unit
79 :align: center79 :align: center
80
81Rockchip RK3588 Video Capture (VICAP)
82-------------------------------------
83
84The RK3588 Video Capture (VICAP) unit features a digital video port and six
85MIPI CSI-2 capture interfaces that can receive video data independently.
86The DVP accepts parallel video data, BT.656 and BT.1120.
87Since the BT.1120 protocol may feature more than one stream, the RK3588 VICAP
88DVP features four DMA engines that can capture different streams.
89Similarly, the RK3588 VICAP MIPI CSI-2 receivers feature four DMA engines each
90to handle different Virtual Channels (VCs).
91
92The rkcif driver represents this hardware variant by exposing the following
93V4L2 subdevices:
94
95* dw-mipi-csi2rx fdd30000.csi: MIPI CSI-2 receiver connected to MIPI DPHY0
96* dw-mipi-csi2rx fdd50000.csi: MIPI CSI-2 receiver connected to MIPI DPHY1
97* rkcif-mipi2: INTERFACE/CROP block for the MIPI CSI-2 receiver connected to
98 MIPI DPHY0
99* rkcif-mipi4: INTERFACE/CROP block for the MIPI CSI-2 receiver connected to
100 MIPI DPHY1
101
102and the following video devices:
103
104* rkcif-mipi2-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi2
105 INTERFACE/CROP block.
106* rkcif-mipi4-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi4
107 INTERFACE/CROP block.
108
109.. kernel-figure:: rkcif-rk3588-vicap.dot
110 :alt: Topology of the RK3588 Video Capture (VICAP) unit
111 :align: center
Documentation/admin-guide/media/v4l-drivers.rst+1−0
@@ -9,6 +9,7 @@ Video4Linux (V4L) driver-specific documentation · 8 unmodified lines
9.. toctree::9.. toctree::
10 :maxdepth: 210 :maxdepth: 2
11 11
12 amdisp4-1
12 bttv13 bttv
13 c3-isp14 c3-isp
14 cafe_ccic15 cafe_ccic
Documentation/admin-guide/mm/damon/lru_sort.rst+5−3
@@ -75,7 +75,7 @@ Make DAMON_LRU_SORT reads the input parameters again, except ``enabled``. · 74 unmodified lines
75 75
76Input parameters that updated while DAMON_LRU_SORT is running are not applied76Input parameters that updated while DAMON_LRU_SORT is running are not applied
77by default. Once this parameter is set as ``Y``, DAMON_LRU_SORT reads values77by default. Once this parameter is set as ``Y``, DAMON_LRU_SORT reads values
78of parametrs except ``enabled`` again. Once the re-reading is done, this78of parameters except ``enabled`` again. Once the re-reading is done, this
79parameter is set as ``N``. If invalid parameters are found while the79parameter is set as ``N``. If invalid parameters are found while the
80re-reading, DAMON_LRU_SORT will be disabled.80re-reading, DAMON_LRU_SORT will be disabled.
81 81
@@ -246,7 +246,8 @@ monitor_region_start · 164 unmodified lines
246Start of target memory region in physical address.246Start of target memory region in physical address.
247 247
248The start physical address of memory region that DAMON_LRU_SORT will do work248The start physical address of memory region that DAMON_LRU_SORT will do work
249against. By default, biggest System RAM is used as the region.249against. By default, the system's entire physical memory is used as the
250region.
250 251
251monitor_region_end252monitor_region_end
252------------------253------------------
@@ -254,7 +255,8 @@ monitor_region_end · 1 unmodified line
254End of target memory region in physical address.255End of target memory region in physical address.
255 256
256The end physical address of memory region that DAMON_LRU_SORT will do work257The end physical address of memory region that DAMON_LRU_SORT will do work
257against. By default, biggest System RAM is used as the region.258against. By default, the system's entire physical memory is used as the
259region.
258 260
259addr_unit261addr_unit
260---------262---------
Documentation/admin-guide/mm/damon/reclaim.rst+16−3
@@ -67,7 +67,7 @@ Make DAMON_RECLAIM reads the input parameters again, except ``enabled``. · 66 unmodified lines
67 67
68Input parameters that updated while DAMON_RECLAIM is running are not applied68Input parameters that updated while DAMON_RECLAIM is running are not applied
69by default. Once this parameter is set as ``Y``, DAMON_RECLAIM reads values69by default. Once this parameter is set as ``Y``, DAMON_RECLAIM reads values
70of parametrs except ``enabled`` again. Once the re-reading is done, this70of parameters except ``enabled`` again. Once the re-reading is done, this
71parameter is set as ``N``. If invalid parameters are found while the71parameter is set as ``N``. If invalid parameters are found while the
72re-reading, DAMON_RECLAIM will be disabled.72re-reading, DAMON_RECLAIM will be disabled.
73 73
@@ -85,6 +85,17 @@ identifies the region as cold, and reclaims it. · 11 unmodified lines
85 85
86120 seconds by default.86120 seconds by default.
87 87
88autotune_monitoring_intervals
89-----------------------------
90
91If this parameter is set as ``Y``, DAMON_RECLAIM automatically tunes DAMON's
92sampling and aggregation intervals. The auto-tuning aims to capture meaningful
93amount of access events in each DAMON-snapshot, while keeping the sampling
94interval 5 milliseconds in minimum, and 10 seconds in maximum. Setting this as
95``N`` disables the auto-tuning.
96
97Disabled by default.
98
88quota_ms99quota_ms
89--------100--------
90 101
@@ -229,7 +240,8 @@ Start of target memory region in physical address. · 138 unmodified lines
229 240
230The start physical address of memory region that DAMON_RECLAIM will do work241The start physical address of memory region that DAMON_RECLAIM will do work
231against. That is, DAMON_RECLAIM will find cold memory regions in this region242against. That is, DAMON_RECLAIM will find cold memory regions in this region
232and reclaims. By default, biggest System RAM is used as the region.243and reclaims. By default, the system's entire physical memory is used as the
244region.
233 245
234monitor_region_end246monitor_region_end
235------------------247------------------
@@ -238,7 +250,8 @@ End of target memory region in physical address. · 2 unmodified lines
238 250
239The end physical address of memory region that DAMON_RECLAIM will do work251The end physical address of memory region that DAMON_RECLAIM will do work
240against. That is, DAMON_RECLAIM will find cold memory regions in this region252against. That is, DAMON_RECLAIM will find cold memory regions in this region
241and reclaims. By default, biggest System RAM is used as the region.253and reclaims. By default, the system's entire physical memory is used as the
254region.
242 255
243addr_unit256addr_unit
244---------257---------
Documentation/admin-guide/mm/damon/stat.rst+7−0
@@ -89,3 +89,10 @@ percentiles of the idle time values via this read-only parameter. Reading the · 88 unmodified lines
89parameter returns 101 idle time values in milliseconds, separated by comma.89parameter returns 101 idle time values in milliseconds, separated by comma.
90Each value represents 0-th, 1st, 2nd, 3rd, ..., 99th and 100th percentile idle90Each value represents 0-th, 1st, 2nd, 3rd, ..., 99th and 100th percentile idle
91times.91times.
92
93kdamond_pid
94-----------
95
96PID of the DAMON thread.
97
98If DAMON_STAT is enabled, this becomes the PID of the worker thread. Else, -1.
Documentation/admin-guide/mm/damon/usage.rst+82−26
@@ -66,11 +66,17 @@ comma (","). · 65 unmodified lines
66 │ :ref:`kdamonds <sysfs_kdamonds>`/nr_kdamonds66 │ :ref:`kdamonds <sysfs_kdamonds>`/nr_kdamonds
67 │ │ :ref:`0 <sysfs_kdamond>`/state,pid,refresh_ms67 │ │ :ref:`0 <sysfs_kdamond>`/state,pid,refresh_ms
68 │ │ │ :ref:`contexts <sysfs_contexts>`/nr_contexts68 │ │ │ :ref:`contexts <sysfs_contexts>`/nr_contexts
69 │ │ │ │ :ref:`0 <sysfs_context>`/avail_operations,operations,addr_unit69 │ │ │ │ :ref:`0 <sysfs_context>`/avail_operations,operations,addr_unit,
70 │ │ │ │ pause
70 │ │ │ │ │ :ref:`monitoring_attrs <sysfs_monitoring_attrs>`/71 │ │ │ │ │ :ref:`monitoring_attrs <sysfs_monitoring_attrs>`/
71 │ │ │ │ │ │ intervals/sample_us,aggr_us,update_us72 │ │ │ │ │ │ intervals/sample_us,aggr_us,update_us
72 │ │ │ │ │ │ │ intervals_goal/access_bp,aggrs,min_sample_us,max_sample_us73 │ │ │ │ │ │ │ intervals_goal/access_bp,aggrs,min_sample_us,max_sample_us
73 │ │ │ │ │ │ nr_regions/min,max74 │ │ │ │ │ │ nr_regions/min,max
75 │ │ │ │ │ │ :ref:`probes <damon_usage_sysfs_probes>`/nr_probes
76 │ │ │ │ │ │ │ 0/filters/nr_filters
77 │ │ │ │ │ │ │ │ 0/type,matching,allow,path
78 │ │ │ │ │ │ │ │ ...
79 │ │ │ │ │ │ │ ...
74 │ │ │ │ │ :ref:`targets <sysfs_targets>`/nr_targets80 │ │ │ │ │ :ref:`targets <sysfs_targets>`/nr_targets
75 │ │ │ │ │ │ :ref:`0 <sysfs_target>`/pid_target,obsolete_target81 │ │ │ │ │ │ :ref:`0 <sysfs_target>`/pid_target,obsolete_target
76 │ │ │ │ │ │ │ :ref:`regions <sysfs_regions>`/nr_regions82 │ │ │ │ │ │ │ :ref:`regions <sysfs_regions>`/nr_regions
@@ -83,18 +89,23 @@ comma (","). · 6 unmodified lines
83 │ │ │ │ │ │ │ │ sz/min,max89 │ │ │ │ │ │ │ │ sz/min,max
84 │ │ │ │ │ │ │ │ nr_accesses/min,max90 │ │ │ │ │ │ │ │ nr_accesses/min,max
85 │ │ │ │ │ │ │ │ age/min,max91 │ │ │ │ │ │ │ │ age/min,max
86 │ │ │ │ │ │ │ :ref:`quotas <sysfs_quotas>`/ms,bytes,reset_interval_ms,effective_bytes,goal_tuner92 │ │ │ │ │ │ │ :ref:`quotas <sysfs_quotas>`/ms,bytes,reset_interval_ms,
93 │ │ │ │ │ │ │ effective_bytes,goal_tuner,
94 │ │ │ │ │ │ │ fail_charge_num,fail_charge_denom
87 │ │ │ │ │ │ │ │ weights/sz_permil,nr_accesses_permil,age_permil95 │ │ │ │ │ │ │ │ weights/sz_permil,nr_accesses_permil,age_permil
88 │ │ │ │ │ │ │ │ :ref:`goals <sysfs_schemes_quota_goals>`/nr_goals96 │ │ │ │ │ │ │ │ :ref:`goals <sysfs_schemes_quota_goals>`/nr_goals
89 │ │ │ │ │ │ │ │ │ 0/target_metric,target_value,current_value,nid,path97 │ │ │ │ │ │ │ │ │ 0/target_metric,target_value,current_value,nid,path
90 │ │ │ │ │ │ │ :ref:`watermarks <sysfs_watermarks>`/metric,interval_us,high,mid,low98 │ │ │ │ │ │ │ :ref:`watermarks <sysfs_watermarks>`/metric,interval_us,high,mid,low
91 │ │ │ │ │ │ │ :ref:`{core_,ops_,}filters <sysfs_filters>`/nr_filters99 │ │ │ │ │ │ │ :ref:`{core_,ops_,}filters <sysfs_filters>`/nr_filters
92 │ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,target_idx,min,max100 │ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,damon_target_idx,min,max
93 │ │ │ │ │ │ │ :ref:`dests <damon_sysfs_dests>`/nr_dests101 │ │ │ │ │ │ │ :ref:`dests <damon_sysfs_dests>`/nr_dests
94 │ │ │ │ │ │ │ │ 0/id,weight102 │ │ │ │ │ │ │ │ 0/id,weight
95 │ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,sz_ops_filter_passed,qt_exceeds,nr_snapshots,max_nr_snapshots103 │ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,sz_ops_filter_passed,qt_exceeds,nr_snapshots,max_nr_snapshots
96 │ │ │ │ │ │ │ :ref:`tried_regions <sysfs_schemes_tried_regions>`/total_bytes104 │ │ │ │ │ │ │ :ref:`tried_regions <sysfs_schemes_tried_regions>`/total_bytes
97 │ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age,sz_filter_passed105 │ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age,sz_filter_passed
106 │ │ │ │ │ │ │ │ │ probes
107 │ │ │ │ │ │ │ │ │ │ 0/hits
108 │ │ │ │ │ │ │ │ │ │ ...
98 │ │ │ │ │ │ │ │ ...109 │ │ │ │ │ │ │ │ ...
99 │ │ │ │ │ │ ...110 │ │ │ │ │ │ ...
100 │ │ │ │ ...111 │ │ │ │ ...
@@ -194,9 +205,9 @@ details). At the moment, only one context per kdamond is supported, so only · 93 unmodified lines
194contexts/<N>/205contexts/<N>/
195-------------206-------------
196 207
197In each context directory, three files (``avail_operations``, ``operations``208In each context directory, four files (``avail_operations``, ``operations``,
198and ``addr_unit``) and three directories (``monitoring_attrs``, ``targets``,209``addr_unit`` and ``pause``) and three directories (``monitoring_attrs``,
199and ``schemes``) exist.210``targets``, and ``schemes``) exist.
200 211
201DAMON supports multiple types of :ref:`monitoring operations212DAMON supports multiple types of :ref:`monitoring operations
202<damon_design_configurable_operations_set>`, including those for virtual address213<damon_design_configurable_operations_set>`, including those for virtual address
@@ -214,6 +225,9 @@ reading from the ``operations`` file. · 11 unmodified lines
214``addr_unit`` file is for setting and getting the :ref:`address unit225``addr_unit`` file is for setting and getting the :ref:`address unit
215<damon_design_addr_unit>` parameter of the operations set.226<damon_design_addr_unit>` parameter of the operations set.
216 227
228``pause`` file is for setting and getting the :ref:`pause request
229<damon_design_execution_model_and_data_structures>` parameter of the context.
230
217.. _sysfs_monitoring_attrs:231.. _sysfs_monitoring_attrs:
218 232
219contexts/<N>/monitoring_attrs/233contexts/<N>/monitoring_attrs/
@@ -221,8 +235,8 @@ contexts/<N>/monitoring_attrs/ · 1 unmodified line
221 235
222Files for specifying attributes of the monitoring including required quality236Files for specifying attributes of the monitoring including required quality
223and efficiency of the monitoring are in ``monitoring_attrs`` directory.237and efficiency of the monitoring are in ``monitoring_attrs`` directory.
224Specifically, two directories, ``intervals`` and ``nr_regions`` exist in this238Specifically, three directories, ``intervals``, ``nr_regions`` and ``probes``
225directory.239exist in this directory.
226 240
227Under ``intervals`` directory, three files for DAMON's sampling interval241Under ``intervals`` directory, three files for DAMON's sampling interval
228(``sample_us``), aggregation interval (``aggr_us``), and update interval242(``sample_us``), aggregation interval (``aggr_us``), and update interval
@@ -256,6 +270,29 @@ tuning-applied current values of the two intervals can be read from the · 27 unmodified lines
256``sample_us`` and ``aggr_us`` files after writing ``update_tuned_intervals`` to270``sample_us`` and ``aggr_us`` files after writing ``update_tuned_intervals`` to
257the ``state`` file.271the ``state`` file.
258 272
273.. _damon_usage_sysfs_probes:
274
275contexts/<N>/monitoring_attrs/probes/
276-------------------------------------
277
278A directory for registering :ref:`data attributes monitoring
279<damon_design_data_attrs_monitoring>` probes.
280
281In the beginning, this directory has only one file, ``nr_probes``. Writing a
282number (``N``) to the file creates the number of child directories named ``0``
283to ``N-1``. Each directory represents each monitoring probe.
284
285In each probe directory, one directory, ``filters`` exists. The directory
286contains files for installing filters for the probe, that is used to determine
287the data attribute for the probe.
288
289In the beginning, ``filters`` directory has only one file, ``nr_filters``.
290Writing a number (``N``) to the file creates the number of child directories
291named ``0`` to ``N-1``. Each directory represents each filter and works in a
292way similar to that for :ref:`DAMOS filter <sysfs_filters>`. When the filter
293``type`` is ``memcg``, ``path`` file acts as ``memcg_path`` for :ref:`DAMOS
294filter <sysfs_filters>`.
295
259.. _sysfs_targets:296.. _sysfs_targets:
260 297
261contexts/<N>/targets/298contexts/<N>/targets/
@@ -337,7 +374,7 @@ to ``N-1``. Each directory represents each DAMON-based operation scheme. · 75 unmodified lines
337schemes/<N>/374schemes/<N>/
338------------375------------
339 376
340In each scheme directory, eight directories (``access_pattern``, ``quotas``,377In each scheme directory, nine directories (``access_pattern``, ``quotas``,
341``watermarks``, ``core_filters``, ``ops_filters``, ``filters``, ``dests``,378``watermarks``, ``core_filters``, ``ops_filters``, ``filters``, ``dests``,
342``stats``, and ``tried_regions``) and three files (``action``, ``target_nid``379``stats``, and ``tried_regions``) and three files (``action``, ``target_nid``
343and ``apply_interval``) exist.380and ``apply_interval``) exist.
@@ -377,9 +414,10 @@ schemes/<N>/quotas/ · 33 unmodified lines
377The directory for the :ref:`quotas <damon_design_damos_quotas>` of the given414The directory for the :ref:`quotas <damon_design_damos_quotas>` of the given
378DAMON-based operation scheme.415DAMON-based operation scheme.
379 416
380Under ``quotas`` directory, five files (``ms``, ``bytes``,417Under ``quotas`` directory, seven files (``ms``, ``bytes``,
381``reset_interval_ms``, ``effective_bytes`` and ``goal_tuner``) and two418``reset_interval_ms``, ``effective_bytes``, ``goal_tuner``, ``fail_charge_num``
382directories (``weights`` and ``goals``) exist.419and ``fail_charge_denom``) and two directories (``weights`` and ``goals``)
420exist.
383 421
384You can set the ``time quota`` in milliseconds, ``size quota`` in bytes, and422You can set the ``time quota`` in milliseconds, ``size quota`` in bytes, and
385``reset interval`` in milliseconds by writing the values to the three files,423``reset interval`` in milliseconds by writing the values to the three files,
@@ -398,6 +436,13 @@ the background design of the feature and the name of the selectable algorithms. · 12 unmodified lines
398Refer to :ref:`goals directory <sysfs_schemes_quota_goals>` for the goals436Refer to :ref:`goals directory <sysfs_schemes_quota_goals>` for the goals
399setup.437setup.
400 438
439You can set the action-failed memory quota charging ratio by writing the
440numerator and the denominator for the ratio to ``fail_charge_num`` and
441``fail_charge_denom`` files, respectively. Reading those files will return the
442current set values. Refer to :ref:`design
443<damon_design_damos_quotas_failed_memory_charging_ratio>` for more details of
444the ratio feature.
445
401The time quota is internally transformed to a size quota. Between the446The time quota is internally transformed to a size quota. Between the
402transformed size quota and user-specified size quota, smaller one is applied.447transformed size quota and user-specified size quota, smaller one is applied.
403Based on the user-specified :ref:`goal <sysfs_schemes_quota_goals>`, the448Based on the user-specified :ref:`goal <sysfs_schemes_quota_goals>`, the
@@ -429,10 +474,12 @@ to ``N-1``. Each directory represents each goal and current achievement. · 25 unmodified lines
429Among the multiple feedback, the best one is used.474Among the multiple feedback, the best one is used.
430 475
431Each goal directory contains five files, namely ``target_metric``,476Each goal directory contains five files, namely ``target_metric``,
432``target_value``, ``current_value`` ``nid`` and ``path``. Users can set and477``target_value``, ``current_value``, ``nid``, and ``path``. Users can set and
433get the five parameters for the quota auto-tuning goals that specified on the478get the five parameters for the quota auto-tuning goals that specified on the
434:ref:`design doc <damon_design_damos_quotas_auto_tuning>` by writing to and479:ref:`design doc <damon_design_damos_quotas_auto_tuning>` by writing to and
435reading from each of the files. Note that users should further write480reading from each of the files. Because the kernel does not update
481``current_value``, reading it only makes sense when ``target_metric`` is
482``user_input``. Note that users should further write
436``commit_schemes_quota_goals`` to the ``state`` file of the :ref:`kdamond483``commit_schemes_quota_goals`` to the ``state`` file of the :ref:`kdamond
437directory <sysfs_kdamond>` to pass the feedback to DAMON.484directory <sysfs_kdamond>` to pass the feedback to DAMON.
438 485
@@ -447,7 +494,7 @@ given DAMON-based operation scheme. · 8 unmodified lines
447Under the watermarks directory, five files (``metric``, ``interval_us``,494Under the watermarks directory, five files (``metric``, ``interval_us``,
448``high``, ``mid``, and ``low``) for setting the metric, the time interval495``high``, ``mid``, and ``low``) for setting the metric, the time interval
449between check of the metric, and the three watermarks exist. You can set and496between check of the metric, and the three watermarks exist. You can set and
450get the five values by writing to the files, respectively.497get the five values by writing to and reading from the files, respectively.
451 498
452Keywords and meanings of those that can be written to the ``metric`` file are499Keywords and meanings of those that can be written to the ``metric`` file are
453as below.500as below.
@@ -455,7 +502,7 @@ as below. · 1 unmodified line
455 - none: Ignore the watermarks502 - none: Ignore the watermarks
456 - free_mem_rate: System's free memory rate (per thousand)503 - free_mem_rate: System's free memory rate (per thousand)
457 504
458The ``interval`` should written in microseconds unit.505The ``interval_us`` should be written in microseconds unit.
459 506
460.. _sysfs_filters:507.. _sysfs_filters:
461 508
@@ -471,10 +518,10 @@ directory can be used for installing filters regardless of their handled · 9 unmodified lines
471layers. Filters that requested by ``core_filters`` and ``ops_filters`` will be518layers. Filters that requested by ``core_filters`` and ``ops_filters`` will be
472installed before those of ``filters``. All three directories have same files.519installed before those of ``filters``. All three directories have same files.
473 520
474Use of ``filters`` directory can make expecting evaluation orders of given521Use of ``filters`` directory can make filters evaluation orders confusing to
475filters with the files under directory bit confusing. Users are hence522expect. For this reason, ``filters`` directory is deprecated. It is still
476recommended to use ``core_filters`` and ``ops_filters`` directories. The523functioning, but is scheduled for removal in the near future. Users should use
477``filters`` directory could be deprecated in future.524``core_filters`` and ``ops_filters`` directories instead.
478 525
479In the beginning, the directory has only one file, ``nr_filters``. Writing a526In the beginning, the directory has only one file, ``nr_filters``. Writing a
480number (``N``) to the file creates the number of child directories named ``0``527number (``N``) to the file creates the number of child directories named ``0``
@@ -483,9 +530,9 @@ in the numeric order. · 2 unmodified lines
483 530
484Each filter directory contains nine files, namely ``type``, ``matching``,531Each filter directory contains nine files, namely ``type``, ``matching``,
485``allow``, ``memcg_path``, ``addr_start``, ``addr_end``, ``min``, ``max``532``allow``, ``memcg_path``, ``addr_start``, ``addr_end``, ``min``, ``max``
486and ``target_idx``. To ``type`` file, you can write the type of the filter.533and ``damon_target_idx``. To ``type`` file, you can write the type of the
487Refer to :ref:`the design doc <damon_design_damos_filters>` for available type534filter. Refer to :ref:`the design doc <damon_design_damos_filters>` for
488names, their meaning and on what layer those are handled.535available type names, their meaning and on what layer those are handled.
489 536
490For ``memcg`` type, you can specify the memory cgroup of the interest by537For ``memcg`` type, you can specify the memory cgroup of the interest by
491writing the path of the memory cgroup from the cgroups mount point to538writing the path of the memory cgroup from the cgroups mount point to
@@ -495,7 +542,7 @@ files, respectively. For ``hugepage_size`` type, you can specify the minimum · 3 unmodified lines
495and maximum size of the range (closed interval) to ``min`` and ``max`` files,542and maximum size of the range (closed interval) to ``min`` and ``max`` files,
496respectively. For ``target`` type, you can specify the index of the target543respectively. For ``target`` type, you can specify the index of the target
497between the list of the DAMON context's monitoring targets list to544between the list of the DAMON context's monitoring targets list to
498``target_idx`` file.545``damon_target_idx`` file.
499 546
500You can write ``Y`` or ``N`` to ``matching`` file to specify whether the filter547You can write ``Y`` or ``N`` to ``matching`` file to specify whether the filter
501is for memory that matches the ``type``. You can write ``Y`` or ``N`` to548is for memory that matches the ``type``. You can write ``Y`` or ``N`` to
@@ -601,10 +648,19 @@ tried_regions/<N>/ · 99 unmodified lines
601------------------648------------------
602 649
603In each region directory, you will find five files (``start``, ``end``,650In each region directory, you will find five files (``start``, ``end``,
604``nr_accesses``, ``age``, and ``sz_filter_passed``). Reading the files will651``nr_accesses``, ``age`` and ``sz_filter_passed``). Reading the files will
605show the properties of the region that corresponding DAMON-based operation652show the properties of the region that corresponding DAMON-based operation
606scheme ``action`` has tried to be applied.653scheme ``action`` has tried to be applied.
607 654
655tried_regions/<N>/probes/
656-------------------------
657
658In each region directory, one directory (``probes``) also exists. In the
659directory, subdirectories named ``0`` to ``N-1`` exists. ``N`` is the number
660of installed probes. In each number-named directory, a file (``hits``) exist.
661Reading the file shows the number of data attributes monitoring probe-hit
662positive samples of the region.
663
608Example664Example
609~~~~~~~665~~~~~~~
610 666
@@ -677,7 +733,7 @@ show results using tracepoint supporting tools like ``perf``. For example:: · 66 unmodified lines
677 733
678Each line of the perf script output represents each monitoring region. The734Each line of the perf script output represents each monitoring region. The
679first five fields are as usual other tracepoint outputs. The sixth field735first five fields are as usual other tracepoint outputs. The sixth field
680(``target_id=X``) shows the ide of the monitoring target of the region. The736(``target_id=X``) shows the id of the monitoring target of the region. The
681seventh field (``nr_regions=X``) shows the total number of monitoring regions737seventh field (``nr_regions=X``) shows the total number of monitoring regions
682for the target. The eighth field (``X-Y:``) shows the start (``X``) and end738for the target. The eighth field (``X-Y:``) shows the start (``X``) and end
683(``Y``) addresses of the region in bytes. The ninth field (``X``) shows the739(``Y``) addresses of the region in bytes. The ninth field (``X``) shows the
Documentation/admin-guide/mm/hugetlbpage.rst+6−9
@@ -455,7 +455,7 @@ used to change the file attributes on hugetlbfs. · 454 unmodified lines
455Also, it is important to note that no such mount command is required if455Also, it is important to note that no such mount command is required if
456applications are going to use only shmat/shmget system calls or mmap with456applications are going to use only shmat/shmget system calls or mmap with
457MAP_HUGETLB. For an example of how to use mmap with MAP_HUGETLB see457MAP_HUGETLB. For an example of how to use mmap with MAP_HUGETLB see
458:ref:`map_hugetlb <map_hugetlb>` below.458:ref:`examples <examples>` below.
459 459
460Users who wish to use hugetlb memory via shared memory segment should be460Users who wish to use hugetlb memory via shared memory segment should be
461members of a supplementary group and system admin needs to configure that gid461members of a supplementary group and system admin needs to configure that gid
@@ -473,16 +473,13 @@ a hugetlb page and the length is smaller than the hugepage size. · 11 unmodified lines
473Examples473Examples
474========474========
475 475
476.. _map_hugetlb:476.. _examples:
477 477
478``map_hugetlb``478``hugetlb-shm``
479 see tools/testing/selftests/mm/map_hugetlb.c479 see tools/testing/selftests/mm/hugetlb-shm.c
480 480
481``hugepage-shm``481``hugetlb-mmap``
482 see tools/testing/selftests/mm/hugepage-shm.c482 see tools/testing/selftests/mm/hugetlb-mmap.c
483
484``hugepage-mmap``
485 see tools/testing/selftests/mm/hugepage-mmap.c
486 483
487The `libhugetlbfs`_ library provides a wide range of userspace tools484The `libhugetlbfs`_ library provides a wide range of userspace tools
488to help with huge page usability, environment setup, and control.485to help with huge page usability, environment setup, and control.
Documentation/admin-guide/mm/transhuge.rst+56−19
@@ -57,13 +57,14 @@ prominent because the size of each page isn't as huge as the PMD-sized · 56 unmodified lines
57variant and there is less memory to clear in each page fault. Some57variant and there is less memory to clear in each page fault. Some
58architectures also employ TLB compression mechanisms to squeeze more58architectures also employ TLB compression mechanisms to squeeze more
59entries in when a set of PTEs are virtually and physically contiguous59entries in when a set of PTEs are virtually and physically contiguous
60and approporiately aligned. In this case, TLB misses will occur less60and appropriately aligned. In this case, TLB misses will occur less
61often.61often.
62 62
63THP can be enabled system wide or restricted to certain tasks or even63THP can be enabled system wide or restricted to certain tasks or even
64memory ranges inside task's address space. Unless THP is completely64memory ranges inside task's address space. Unless THP is completely
65disabled, there is ``khugepaged`` daemon that scans memory and65disabled, there is ``khugepaged`` daemon that scans memory and
66collapses sequences of basic pages into PMD-sized huge pages.66collapses sequences of basic pages into huge pages of either PMD size
67or mTHP sizes, if the system is configured to do so.
67 68
68The THP behaviour is controlled via :ref:`sysfs <thp_sysfs>`69The THP behaviour is controlled via :ref:`sysfs <thp_sysfs>`
69interface and using madvise(2) and prctl(2) system calls.70interface and using madvise(2) and prctl(2) system calls.
@@ -210,7 +211,7 @@ PMD-mappable transparent hugepage:: · 140 unmodified lines
210 cat /sys/kernel/mm/transparent_hugepage/hpage_pmd_size211 cat /sys/kernel/mm/transparent_hugepage/hpage_pmd_size
211 212
212All THPs at fault and collapse time will be added to _deferred_list,213All THPs at fault and collapse time will be added to _deferred_list,
213and will therefore be split under memory presure if they are considered214and will therefore be split under memory pressure if they are considered
214"underused". A THP is underused if the number of zero-filled pages in215"underused". A THP is underused if the number of zero-filled pages in
215the THP is above max_ptes_none (see below). It is possible to disable216the THP is above max_ptes_none (see below). It is possible to disable
216this behaviour by writing 0 to shrink_underused, and enable it by writing217this behaviour by writing 0 to shrink_underused, and enable it by writing
@@ -219,10 +220,10 @@ this behaviour by writing 0 to shrink_underused, and enable it by writing · 2 unmodified lines
219 echo 0 > /sys/kernel/mm/transparent_hugepage/shrink_underused220 echo 0 > /sys/kernel/mm/transparent_hugepage/shrink_underused
220 echo 1 > /sys/kernel/mm/transparent_hugepage/shrink_underused221 echo 1 > /sys/kernel/mm/transparent_hugepage/shrink_underused
221 222
222khugepaged will be automatically started when PMD-sized THP is enabled223khugepaged will be automatically started when any THP size is enabled
223(either of the per-size anon control or the top-level control are set224(either of the per-size anon control or the top-level control are set
224to "always" or "madvise"), and it'll be automatically shutdown when225to "always" or "madvise"), and it'll be automatically shutdown when
225PMD-sized THP is disabled (when both the per-size anon control and the226all THP sizes are disabled (when both the per-size anon control and the
226top-level control are "never")227top-level control are "never")
227 228
228process THP controls229process THP controls
@@ -265,8 +266,8 @@ Khugepaged controls · 36 unmodified lines
265-------------------266-------------------
266 267
267.. note::268.. note::
268 khugepaged currently only searches for opportunities to collapse to269 khugepaged currently only searches for opportunities to collapse file/shmem
269 PMD-sized THP and no attempt is made to collapse to other THP270 to PMD-sized THP. Only anonymous memory will attempt to collapse to other THP
270 sizes.271 sizes.
271 272
272khugepaged runs usually at low frequency so while one may not want to273khugepaged runs usually at low frequency so while one may not want to
@@ -296,11 +297,11 @@ allocation failure to throttle the next allocation attempt:: · 23 unmodified lines
296The khugepaged progress can be seen in the number of pages collapsed (note297The khugepaged progress can be seen in the number of pages collapsed (note
297that this counter may not be an exact count of the number of pages298that this counter may not be an exact count of the number of pages
298collapsed, since "collapsed" could mean multiple things: (1) A PTE mapping299collapsed, since "collapsed" could mean multiple things: (1) A PTE mapping
299being replaced by a PMD mapping, or (2) All 4K physical pages replaced by300being replaced by a PMD mapping, or (2) physical pages replaced by one
300one 2M hugepage. Each may happen independently, or together, depending on301hugepage of various sizes (PMD-sized or mTHP). Each may happen independently,
301the type of memory and the failures that occur. As such, this value should302or together, depending on the type of memory and the failures that occur.
302be interpreted roughly as a sign of progress, and counters in /proc/vmstat303As such, this value should be interpreted roughly as a sign of progress,
303consulted for more accurate accounting)::304and counters in /proc/vmstat consulted for more accurate accounting)::
304 305
305 /sys/kernel/mm/transparent_hugepage/khugepaged/pages_collapsed306 /sys/kernel/mm/transparent_hugepage/khugepaged/pages_collapsed
306 307
@@ -308,16 +309,21 @@ for each pass:: · 1 unmodified line
308 309
309 /sys/kernel/mm/transparent_hugepage/khugepaged/full_scans310 /sys/kernel/mm/transparent_hugepage/khugepaged/full_scans
310 311
311``max_ptes_none`` specifies how many extra small pages (that are312``max_ptes_none`` specifies how many empty (none/zero) pages are allowed
312not already mapped) can be allocated when collapsing a group313when collapsing a group of small pages into one large page::
313of small pages into one large page::
314 314
315 /sys/kernel/mm/transparent_hugepage/khugepaged/max_ptes_none315 /sys/kernel/mm/transparent_hugepage/khugepaged/max_ptes_none
316 316
317A higher value leads to use additional memory for programs.317For PMD-sized THP collapse, this directly limits the number of empty pages
318A lower value leads to gain less thp performance. Value of318allowed in the 2MB region.
319max_ptes_none can waste cpu time very little, you can319
320ignore it.320For mTHP collapse, only 0 or (HPAGE_PMD_NR - 1) are supported. At
321HPAGE_PMD_NR - 1, we collapse to the highest possible order. Any intermediate
322value will emit a warning and mTHP collapse will default to max_ptes_none=0.
323
324A higher value allows more empty pages, potentially leading to more memory
325usage but better THP performance. A lower value is more conservative and
326may result in fewer THP collapses.
321 327
322``max_ptes_swap`` specifies how many pages can be brought in from328``max_ptes_swap`` specifies how many pages can be brought in from
323swap when collapsing a group of pages into a transparent huge page::329swap when collapsing a group of pages into a transparent huge page::
@@ -337,6 +343,15 @@ that THP is shared. Exceeding the number would block the collapse:: · 13 unmodified lines
337 343
338A higher value may increase memory footprint for some workloads.344A higher value may increase memory footprint for some workloads.
339 345
346.. note::
347 For mTHP collapse, khugepaged does not support collapsing regions that
348 contain shared or swapped out pages, as this could lead to continuous
349 promotion to higher orders. The collapse will fail if any shared or
350 swapped PTEs are encountered during the scan.
351
352 Currently, madvise_collapse only supports collapsing to PMD-sized THPs
353 and does not attempt mTHP collapses.
354
340Boot parameters355Boot parameters
341===============356===============
342 357
@@ -639,6 +654,14 @@ anon_fault_fallback_charge · 296 unmodified lines
639 instead falls back to using huge pages with lower orders or654 instead falls back to using huge pages with lower orders or
640 small pages even though the allocation was successful.655 small pages even though the allocation was successful.
641 656
657collapse_alloc
658 is incremented every time a huge page is successfully allocated for a
659 khugepaged collapse.
660
661collapse_alloc_failed
662 is incremented every time a huge page allocation fails during a
663 khugepaged collapse.
664
642zswpout665zswpout
643 is incremented every time a huge page is swapped out to zswap in one666 is incremented every time a huge page is swapped out to zswap in one
644 piece without splitting.667 piece without splitting.
@@ -706,6 +729,20 @@ nr_anon_partially_mapped · 61 unmodified lines
706 an anonymous THP as "partially mapped" and count it here, even though it729 an anonymous THP as "partially mapped" and count it here, even though it
707 is not actually partially mapped anymore.730 is not actually partially mapped anymore.
708 731
732collapse_exceed_none_pte
733 The number of collapse attempts that failed due to exceeding the
734 max_ptes_none threshold.
735
736collapse_exceed_swap_pte
737 The number of collapse attempts that failed due to exceeding the
738 max_ptes_swap threshold. For non-PMD orders this occurs if a mTHP range
739 contains at least one swap PTE.
740
741collapse_exceed_shared_pte
742 The number of collapse attempts that failed due to exceeding the
743 max_ptes_shared threshold. For non-PMD orders this occurs if a mTHP range
744 contains at least one shared PTE.
745
709As the system ages, allocating huge pages may be expensive as the746As the system ages, allocating huge pages may be expensive as the
710system uses memory compaction to copy data around memory to free a747system uses memory compaction to copy data around memory to free a
711huge page for use. There are some counters in ``/proc/vmstat`` to help748huge page for use. There are some counters in ``/proc/vmstat`` to help
Documentation/admin-guide/pm/amd-pstate.rst+5−6
@@ -358,9 +358,9 @@ Dynamic energy performance profile · 357 unmodified lines
358The amd-pstate driver supports dynamically selecting the energy performance358The amd-pstate driver supports dynamically selecting the energy performance
359profile based on whether the machine is running on AC or DC power.359profile based on whether the machine is running on AC or DC power.
360 360
361Whether this behavior is enabled by default depends on the kernel361Whether this behavior is enabled by default depends on the kernel command line option
362config option `CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP`. This behavior can also be overridden362``amd_dynamic_epp`` is set. This behavior can also be overridden
363at runtime by the sysfs file ``/sys/devices/system/cpu/cpufreq/policyX/dynamic_epp``.363at runtime by the sysfs file ``/sys/devices/system/cpu/amd_pstate/dynamic_epp``.
364 364
365When set to enabled, the driver will select a different energy performance365When set to enabled, the driver will select a different energy performance
366profile when the machine is running on battery or AC power. The driver will366profile when the machine is running on battery or AC power. The driver will
@@ -485,9 +485,8 @@ kernel parameter ``amd_prefcore=disable``. · 118 unmodified lines
485``amd_dynamic_epp``485``amd_dynamic_epp``
486 486
487When AMD pstate is in auto mode, dynamic EPP will control whether the kernel487When AMD pstate is in auto mode, dynamic EPP will control whether the kernel
488autonomously changes the EPP mode. The default is configured by488autonomously changes the EPP mode. The default is disabled. It can be enabled
489``CONFIG_X86_AMD_PSTATE_DYNAMIC_EPP`` but can be explicitly enabled with489with the kernel parameter ``amd_dynamic_epp=enable``.
490``amd_dynamic_epp=enable`` or disabled with ``amd_dynamic_epp=disable``.
491 490
492User Space Interface in ``sysfs`` - General491User Space Interface in ``sysfs`` - General
493===========================================492===========================================
Documentation/admin-guide/pm/cpufreq.rst+3−3
@@ -516,7 +516,7 @@ This governor exposes the following tunables: · 515 unmodified lines
516 of those tasks above 0 and set this attribute to 1.516 of those tasks above 0 and set this attribute to 1.
517 517
518``sampling_down_factor``518``sampling_down_factor``
519 Temporary multiplier, between 1 (default) and 100 inclusive, to apply to519 Temporary multiplier, between 1 (default) and 100000 inclusive, to apply to
520 the ``sampling_rate`` value if the CPU load goes above ``up_threshold``.520 the ``sampling_rate`` value if the CPU load goes above ``up_threshold``.
521 521
522 This causes the next execution of the governor's worker routine (after522 This causes the next execution of the governor's worker routine (after
@@ -586,8 +586,8 @@ This governor exposes the following tunables: · 63 unmodified lines
586 100 (5 by default).586 100 (5 by default).
587 587
588 This is how much the frequency is allowed to change in one go. Setting588 This is how much the frequency is allowed to change in one go. Setting
589 it to 0 will cause the default frequency step (5 percent) to be used589 it to 0 disables frequency changes by the governor entirely and setting
590 and setting it to 100 effectively causes the governor to periodically590 it to 100 effectively causes the governor to periodically
591 switch the frequency between the ``scaling_min_freq`` and591 switch the frequency between the ``scaling_min_freq`` and
592 ``scaling_max_freq`` policy limits.592 ``scaling_max_freq`` policy limits.
593 593
Documentation/admin-guide/pm/intel_pstate.rst+6−5
@@ -355,11 +355,12 @@ HyperThreading (HT) in the context of Intel processors, is enabled on at least · 354 unmodified lines
355one core, ``intel_pstate`` assigns performance-based priorities to CPUs. Namely,355one core, ``intel_pstate`` assigns performance-based priorities to CPUs. Namely,
356the priority of a given CPU reflects its highest HWP performance level which356the priority of a given CPU reflects its highest HWP performance level which
357causes the CPU scheduler to generally prefer more performant CPUs, so the less357causes the CPU scheduler to generally prefer more performant CPUs, so the less
358performant CPUs are used when the other ones are fully loaded. However, SMT358performant CPUs are used when the other ones are fully loaded. SMT siblings
359siblings (that is, logical CPUs sharing one physical core) are treated in a359(that is, logical CPUs sharing one physical core) are given the same priority.
360special way such that if one of them is in use, the effective priority of the360The scheduler can pull tasks from lower-priority cores and place them on any
361other ones is lowered below the priorities of the CPUs located in the other361sibling. Since the scheduler spreads tasks among physical cores, tasks will be
362physical cores.362placed on the SMT siblings of physical cores only after all physical cores are
363busy.
363 364
364This approach maximizes performance in the majority of cases, but unfortunately365This approach maximizes performance in the majority of cases, but unfortunately
365it also leads to excessive energy usage in some important scenarios, like video366it also leads to excessive energy usage in some important scenarios, like video
Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst+7−0
@@ -88,8 +88,15 @@ and "fabric_cluster_id" in the directory. · 87 unmodified lines
88 88
89Attributes in each directory:89Attributes in each directory:
90 90
91``instance_id``
92 This attribute is used to get die indices in userspace mapped MMIO
93 blocks. Indices are local to a single TPMI partition. Needed for direct
94 TPMI register access.
95
91``domain_id``96``domain_id``
92 This attribute is used to get the power domain id of this instance.97 This attribute is used to get the power domain id of this instance.
98 Indices are unique in all TPMI partitions on a given CPU package. Can be
99 used to map compute dies to corresponding CPUs.
93 100
94``die_id``101``die_id``
95 This attribute is used to get the Linux die id of this instance.102 This attribute is used to get the Linux die id of this instance.
Documentation/admin-guide/quickly-build-trimmed-linux.rst+1−1
@@ -217,7 +217,7 @@ again. · 216 unmodified lines
217 217
218 There is a catch: 'localmodconfig' is likely to disable kernel features you218 There is a catch: 'localmodconfig' is likely to disable kernel features you
219 did not use since you booted your Linux -- like drivers for currently219 did not use since you booted your Linux -- like drivers for currently
220 disconnected peripherals or a virtualization software not haven't used yet.220 disconnected peripherals or virtualization software not currently in use.
221 You can reduce or nearly eliminate that risk with tricks the reference221 You can reduce or nearly eliminate that risk with tricks the reference
222 section outlines; but when building a kernel just for quick testing purposes222 section outlines; but when building a kernel just for quick testing purposes
223 it is often negligible if such features are missing. But you should keep that223 it is often negligible if such features are missing. But you should keep that
Documentation/admin-guide/reporting-issues.rst+2−2
@@ -129,7 +129,7 @@ After these preparations you'll now enter the main part: · 128 unmodified lines
129 situations; during the merge window that actually might be even the best129 situations; during the merge window that actually might be even the best
130 approach, but in that development phase it can be an even better idea to130 approach, but in that development phase it can be an even better idea to
131 suspend your efforts for a few days anyway. Whatever version you choose,131 suspend your efforts for a few days anyway. Whatever version you choose,
132 ideally use a 'vanilla' build. Ignoring these advices will dramatically132 ideally use a 'vanilla' build. Ignoring all of this advice will dramatically
133 increase the risk your report will be rejected or ignored.133 increase the risk your report will be rejected or ignored.
134 134
135 * Ensure the kernel you just installed does not 'taint' itself when135 * Ensure the kernel you just installed does not 'taint' itself when
@@ -795,7 +795,7 @@ Install a fresh kernel for testing · 659 unmodified lines
795 situations; during the merge window that actually might be even the best795 situations; during the merge window that actually might be even the best
796 approach, but in that development phase it can be an even better idea to796 approach, but in that development phase it can be an even better idea to
797 suspend your efforts for a few days anyway. Whatever version you choose,797 suspend your efforts for a few days anyway. Whatever version you choose,
798 ideally use a 'vanilla' built. Ignoring these advices will dramatically798 ideally use a 'vanilla' built. Ignoring all of this advice will dramatically
799 increase the risk your report will be rejected or ignored.*799 increase the risk your report will be rejected or ignored.*
800 800
801As mentioned in the detailed explanation for the first step already: Like most801As mentioned in the detailed explanation for the first step already: Like most
Documentation/admin-guide/sysctl/net.rst+6−51
@@ -36,12 +36,11 @@ Table : Subdirectories in /proc/sys/net · 35 unmodified lines
36 ========= =================== = ========== ===================36 ========= =================== = ========== ===================
37 802 E802 protocol mptcp Multipath TCP37 802 E802 protocol mptcp Multipath TCP
38 appletalk Appletalk protocol netfilter Network Filter38 appletalk Appletalk protocol netfilter Network Filter
39 ax25 AX25 netrom NET/ROM39 bridge Bridging tipc TIPC
40 bridge Bridging rose X.25 PLP layer40 core General parameter unix Unix domain sockets
41 core General parameter tipc TIPC41 ethernet Ethernet protocol vsock VSOCK sockets
42 ethernet Ethernet protocol unix Unix domain sockets42 ipv4 IP version 4 x25 X.25 protocol
43 ipv4 IP version 4 vsock VSOCK sockets43 ipv6 IP version 6
44 ipv6 IP version 6 x25 X.25 protocol
45 ========= =================== = ========== ===================44 ========= =================== = ========== ===================
46 45
471. /proc/sys/net/core - Network core options461. /proc/sys/net/core - Network core options
@@ -475,51 +474,7 @@ Please see: Documentation/networking/ip-sysctl.rst and · 427 unmodified lines
475Documentation/admin-guide/sysctl/net.rst for descriptions of these entries.474Documentation/admin-guide/sysctl/net.rst for descriptions of these entries.
476 475
477 476
4784. Appletalk4774. TIPC
479------------
480
481The /proc/sys/net/appletalk directory holds the Appletalk configuration data
482when Appletalk is loaded. The configurable parameters are:
483
484aarp-expiry-time
485----------------
486
487The amount of time we keep an ARP entry before expiring it. Used to age out
488old hosts.
489
490aarp-resolve-time
491-----------------
492
493The amount of time we will spend trying to resolve an Appletalk address.
494
495aarp-retransmit-limit
496---------------------
497
498The number of times we will retransmit a query before giving up.
499
500aarp-tick-time
501--------------
502
503Controls the rate at which expires are checked.
504
505The directory /proc/net/appletalk holds the list of active Appletalk sockets
506on a machine.
507
508The fields indicate the DDP type, the local address (in network:node format)
509the remote address, the size of the transmit pending queue, the size of the
510received queue (bytes waiting for applications to read) the state and the uid
511owning the socket.
512
513/proc/net/atalk_iface lists all the interfaces configured for appletalk.It
514shows the name of the interface, its Appletalk address, the network range on
515that address (or network number for phase 1 networks), and the status of the
516interface.
517
518/proc/net/atalk_route lists each known network route. It lists the target
519(network) that the route leads to, the router (may be directly connected), the
520route flags, and the device the route is using.
521
5225. TIPC
523-------478-------
524 479
525tipc_rmem480tipc_rmem
Documentation/admin-guide/sysctl/vm.rst+2−0
@@ -1034,6 +1034,8 @@ min(3% of current process size, user_reserve_kbytes) of free memory. · 1033 unmodified lines
1034This is intended to prevent a user from starting a single memory hogging1034This is intended to prevent a user from starting a single memory hogging
1035process, such that they cannot recover (kill the hog).1035process, such that they cannot recover (kill the hog).
1036 1036
1037This setting has no effect when overcommit_memory is set to 0 or 1.
1038
1037user_reserve_kbytes defaults to min(3% of the current process size, 128MB).1039user_reserve_kbytes defaults to min(3% of the current process size, 128MB).
1038 1040
1039If this is reduced to zero, then the user will be allowed to allocate1041If this is reduced to zero, then the user will be allowed to allocate
Documentation/admin-guide/thunderbolt.rst+61−0
@@ -373,6 +373,67 @@ port which are named like ``thunderbolt0`` and so on. From this point · 372 unmodified lines
373you can either use standard userspace tools like ``ip`` to373you can either use standard userspace tools like ``ip`` to
374configure the interface or let your GUI handle it automatically.374configure the interface or let your GUI handle it automatically.
375 375
376Streaming data directly over Thunderbolt cable
377----------------------------------------------
378In addition to Thunderbolt networking (aka. USB4NET) Linux supports
379streaming data directly over a cable as well (aka. USB4STREAM). This is
380possible through ``thunderbolt-stream`` driver.
381
382Similarly to ``thunderbolt-net`` you load the driver first on one end::
383
384 host1 # modprobe thunderbolt-stream
385
386Then you configure it via ``ConfigFS``::
387
388 host1 # cd /sys/kernel/config/thunderbolt/stream
389 host1 # mkdir -p 0-1.0/data
390 host1 # cd 0-1.0
391 host1 # echo -1 > data/in_hopid
392 host1 # echo -1 > data/out_hopid
393
394This information is automatically announced to the other side via
395XDomain properties so if you have cable connected the other side knows
396that there is a stream named ``data`` available and can configure it for
397you automatically::
398
399 host2 # cd /sys/kernel/config/thunderbolt/stream
400 host2 # mkdir -p 0-3.0/data
401
402Here we used auto-configuration but you can configure it manually too.
403In that case you need to fill ``in_hopid`` and ``out_hopid`` accordingly.
404If you set them to ``-1`` the next available HopID is used which is
405typically what we want.
406
407Once they are configured you can use ``/dev/tbstreamX`` on both sides to
408transfer data::
409
410 host2 # cat /dev/tbstream0
411 host1 # dmesg > /dev/tbstream0
412
413Once you are done with the stream you can remove them::
414
415 host2 # cd /sys/kernel/config/thunderbolt/stream
416 host2 # rmdir -p 0-1.0/data
417 host1 # cd /sys/kernel/config/thunderbolt/stream
418 host1 # rmdir -p 0-3.0/data
419
420Since streams are essentially files you can use any existing application
421that supports ``read(2)`` and ``write(2)`` in some form.
422
423It is possible to have more than one stream and you can have both stream
424and ``thunderbolt-net`` in use simultaneously. For example we can create
425two streams with name ``control`` and ``data`` like this::
426
427 host1 # cd /sys/kernel/config/thunderbolt/stream
428 host1 # mkdir 0-1.0
429 host1 # cd 0-1.0
430 host1 # mkdir control
431 host1 # mkdir data
432
433Then you have ``/dev/tbstream0`` for ``control`` and ``/dev/tbstream1``
434for ``data``. Before you can use them you need to configure them as
435shown above for the one stream case.
436
376Forcing power437Forcing power
377-------------438-------------
378Many OEMs include a method that can be used to force the power of a439Many OEMs include a method that can be used to force the power of a
Documentation/admin-guide/workload-tracing.rst+29−12
@@ -202,6 +202,15 @@ database. To get out of this mode press ctrl+d. -p option is used to · 201 unmodified lines
202specify the number of file path components to display. -p10 is optimal202specify the number of file path components to display. -p10 is optimal
203for browsing kernel sources.203for browsing kernel sources.
204 204
205Alternatively, the kernel build system can generate the cscope database::
206
207 make cscope
208
209To exclude directories from the generated database, pass IGNORE_DIRS to
210the cscope target. For example, to exclude Documentation/, run::
211
212 make IGNORE_DIRS="Documentation" cscope
213
205What is perf and how do we use it?214What is perf and how do we use it?
206==================================215==================================
207 216
@@ -243,13 +252,21 @@ which can help mitigate performance regressions. It also acts as a common · 35 unmodified lines
243benchmarking framework, enabling developers to easily create test cases,252benchmarking framework, enabling developers to easily create test cases,
244integrate transparently, and use performance-rich tooling.253integrate transparently, and use performance-rich tooling.
245 254
246"perf bench all" command runs the following benchmarks:255"perf bench all" runs all available benchmarks in the perf bench
256framework. The exact set of benchmarks depends on the perf version and on
257the features enabled when perf was built.
258
259To list the benchmark collections available on the current system, run::
260
261 perf bench
262
263To list benchmarks in a collection, run::
264
265 perf bench <collection>
266
267For example, to list the benchmarks in the mem collection, run::
247 268
248 * sched/messaging269 perf bench mem
249 * sched/pipe
250 * syscall/basic
251 * mem/memcpy
252 * mem/memset
253 270
254What is stress-ng and how do we use it?271What is stress-ng and how do we use it?
255=======================================272=======================================
@@ -271,17 +288,17 @@ exercised: · 15 unmodified lines
271 288
272The following command runs the stressor::289The following command runs the stressor::
273 290
274 stress-ng --netdev 1 -t 60 --metrics command.291 stress-ng --netdev 1 -t 60 --metrics
275 292
276We can use the perf record command to record the events and information293We can use the perf record command to record the events and information
277associated with a process. This command records the profiling data in the294associated with a process. This command records the profiling data in the
278perf.data file in the same directory.295perf.data file in the same directory.
279 296
280Using the following commands you can record the events associated with the297Using the following commands you can record the events associated with the
281netdev stressor, view the generated report perf.data and annotate the to298netdev stressor, view the generated report perf.data and annotate the output
282view the statistics of each instruction of the program::299to view the statistics of each instruction of the program::
283 300
284 perf record stress-ng --netdev 1 -t 60 --metrics command.301 perf record -- stress-ng --netdev 1 -t 60 --metrics
285 perf report302 perf report
286 perf annotate303 perf annotate
287 304
@@ -349,13 +366,13 @@ times each system call is invoked, and the corresponding Linux subsystem. · 61 unmodified lines
349+-------------------+-----------+-----------------+-------------------------+366+-------------------+-----------+-----------------+-------------------------+
350| geteuid | 1 | Process Mgmt. | sys_geteuid() |367| geteuid | 1 | Process Mgmt. | sys_geteuid() |
351+-------------------+-----------+-----------------+-------------------------+368+-------------------+-----------+-----------------+-------------------------+
352| getegid | 1 | Process Mgmt. | sys_getegid |369| getegid | 1 | Process Mgmt. | sys_getegid() |
353+-------------------+-----------+-----------------+-------------------------+370+-------------------+-----------+-----------------+-------------------------+
354| close | 49951 | Filesystem | sys_close() |371| close | 49951 | Filesystem | sys_close() |
355+-------------------+-----------+-----------------+-------------------------+372+-------------------+-----------+-----------------+-------------------------+
356| pipe | 604 | Filesystem | sys_pipe() |373| pipe | 604 | Filesystem | sys_pipe() |
357+-------------------+-----------+-----------------+-------------------------+374+-------------------+-----------+-----------------+-------------------------+
358| openat | 48560 | Filesystem | sys_opennat() |375| openat | 48560 | Filesystem | sys_openat() |
359+-------------------+-----------+-----------------+-------------------------+376+-------------------+-----------+-----------------+-------------------------+
360| fstat | 8338 | Filesystem | sys_fstat() |377| fstat | 8338 | Filesystem | sys_fstat() |
361+-------------------+-----------+-----------------+-------------------------+378+-------------------+-----------+-----------------+-------------------------+
Documentation/arch/arc/arc.rst+1−1
@@ -36,7 +36,7 @@ Important note on ARC processors configurability · 35 unmodified lines
36 36
37ARC processors are highly configurable and several configurable options37ARC processors are highly configurable and several configurable options
38are supported in Linux. Some options are transparent to software38are supported in Linux. Some options are transparent to software
39(i.e cache geometries, some can be detected at runtime and configured39(e.g., cache geometries), some can be detected at runtime and configured
40and used accordingly, while some need to be explicitly selected or configured40and used accordingly, while some need to be explicitly selected or configured
41in the kernel's configuration utility (AKA "make menuconfig").41in the kernel's configuration utility (AKA "make menuconfig").
42 42
Documentation/arch/arm/index.rst+2−0
@@ -75,3 +75,5 @@ SoC-specific documents · 74 unmodified lines
75 sti/overview75 sti/overview
76 76
77 vfp/release-notes77 vfp/release-notes
78
79 zte/index
Documentation/arch/arm/kernel_mode_neon.rst+3−1
@@ -121,4 +121,6 @@ observe the following in addition to the rules above: · 120 unmodified lines
121* Compile the unit containing the NEON intrinsics with '-ffreestanding' so GCC121* Compile the unit containing the NEON intrinsics with '-ffreestanding' so GCC
122 uses its builtin version of <stdint.h> (this is a C99 header which the kernel122 uses its builtin version of <stdint.h> (this is a C99 header which the kernel
123 does not supply);123 does not supply);
124* Include <arm_neon.h> last, or at least after <linux/types.h>124* Do not include <arm_neon.h> directly: instead, include <asm/neon-intrinsics.h>,
125 which tweaks some macro definitions so that system headers can be included
126 safely.
Documentation/arch/arm/omap/dss.rst+1−1
@@ -314,7 +314,7 @@ Kernel boot arguments · 313 unmodified lines
314 314
315omapfb.mode=<display>:<mode>[,...]315omapfb.mode=<display>:<mode>[,...]
316 - Default video mode for specified displays. For example,316 - Default video mode for specified displays. For example,
317 "dvi:800x400MR-24@60". See drivers/video/modedb.c.317 "dvi:800x400MR-24@60". See drivers/video/fbdev/core/modedb.c.
318 There are also two special modes: "pal" and "ntsc" that318 There are also two special modes: "pal" and "ntsc" that
319 can be used to tv out.319 can be used to tv out.
320 320
Documentation/arch/arm/samsung/clksrc-change-registers.awk+1−1
@@ -163,4 +163,4 @@ BEGIN { · 162 unmodified lines
163 }163 }
164}164}
165 165
166// && ! /clksrc_clk.*=.*{/ { print $0 }166// && ! /clksrc_clk.*=.*{/ { print $0 }}
Documentation/arch/arm/vlocks.rst+2−2
@@ -102,10 +102,10 @@ Features and limitations · 101 unmodified lines
102 if (I_won) {102 if (I_won) {
103 /* we won the town election, let's go for the state */103 /* we won the town election, let's go for the state */
104 my_state = states[(this_cpu >> 8) & 0xf];104 my_state = states[(this_cpu >> 8) & 0xf];
105 I_won = vlock_lock(my_state, this_cpu & 0xf));105 I_won = vlock_lock(my_state, this_cpu & 0xf);
106 if (I_won) {106 if (I_won) {
107 /* and so on */107 /* and so on */
108 I_won = vlock_lock(the_whole_country, this_cpu & 0xf];108 I_won = vlock_lock(the_whole_country, this_cpu & 0xf);
109 if (I_won) {109 if (I_won) {
110 /* ... */110 /* ... */
111 }111 }
Documentation/arch/arm/zte/index.rst+10−0
@@ -0,0 +1,10 @@
1.. SPDX-License-Identifier: GPL-2.0-only
2
3=======
4ZTE SoC
5=======
6
7.. toctree::
8 :maxdepth: 1
9
10 zx297520v3
Documentation/arch/arm/zte/zx297520v3.rst+166−0
@@ -0,0 +1,166 @@
1.. SPDX-License-Identifier: GPL-2.0-only
2
3====================================
4Booting Linux on ZTE zx297520v3 SoCs
5====================================
6
7Author: Stefan Dösinger
8
9Date : 27 Jan 2026
10
111. Hardware description
12---------------------------
13Zx297520v3 SoCs use a 64-bit capable Cortex-A53 CPU and GICv3, although they
14run in arm32 mode only. The CPU has support EL3, but no hypervisor (EL2) and
15it seems to lack VFP and NEON.
16
17The SoC is used in a number of cheap LTE to WiFi routers, both battery powered
18MiFis and stationary CPEs. In addition to the CPU these devices usually have
1964 MB Ram (although some is shared with the LTE chip), 128 MB NAND flash, an
20SDIO connected RTL8192-type Wifi chip limited to 2.4 ghz operation, USB 2,
21and buttons. Devices with as low as 32 MB or as high as 128 MB ram exist, as
22do devices with 8 or 16 MB of NOR flash.
23
24Some devices, especially the stationary ones, have 100 mbit Ethernet and an
25Ethernet switch.
26
27Usually the devices have LEDs for status indication, although some have SPI or
28I2C connected displays.
29
30Some have an SD card slot. If it exists, it is a better choice for the root
31file system because it easily outperforms the built-in NAND.
32
33The LTE interface runs on a separate DSP called ZSP880. It is probably derived
34from LSI ZSPs and has an undocumented instruction set. The ZSP communicates
35with the main CPU via SRAM and DRAM and a mailbox hardware that can generate
36IRQs on either ends.
37
38There is also a Cortex M0 CPU, which is responsible for early HW initialization
39and starting the Cortex A53 CPU. It does not have any essential purpose once
40U-Boot is started. An SRAM-based handover protocol exists to run custom code on
41this CPU.
42
432. Booting via USB
44---------------------------
45
46The Boot ROM has support for booting custom code via USB. This mode can be
47entered by connecting a Boot PIN to GND or by modifying the third byte on NAND
48(set it to anything other than 0x5A aka 'Z'). A free software tool to start
49custom U-Boot and kernels can be found here:
50
51https://github.com/zx297520v3-mainline/zx297520v3-loader
52
53If USB download mode is entered but no boot commands are sent through USB, the
54device will proceed to boot normally after a few seconds. It is therefore
55possible to enable USB boot permanently and still leave the default boot files
56in place.
57
58https://github.com/zx297520v3-mainline/u-boot-mainline
59
60Contains an U-Boot version that can be used with the USB loader and sets up the
61CPU and interrupt controller to comply with Linux's booting requirements.
62
633. Building for built-in U-Boot
64-------------------------------
65The devices come with an ancient U-Boot that loads legacy uImages from NAND and
66boots them without a chance for the user to interrupt. The images are stored in
67files ap_cpuap.bin and ap_recovery.bin on a jffs2 partition named imagefs,
68usually mtd4. A file named "fotaflag" switches between the two modes.
69
70In addition to the uImage header, those files have a 384-byte signature header,
71which is used for authenticating the images on some devices. Most devices have
72this authentication disabled and it is enough to pad the uImage files with 384
73zero bytes.
74
75Builtin U-Boot also poorly sets up the CPU. Read the next section for details
76on this. It has no support for loading DTBs, so CONFIG_ARM_APPENDED_DTB is
77needed.
78
79So to build an image that boots from NAND the following steps are necessary:
80
811) Patch the assembly code from section 3 into arch/arm/kernel/head.S.
822) make zx29_defconfig
833) make [-j x]
844) cat arch/arm/boot/zImage arch/arm/boot/dts/zte/[device].dtb > kernel+dtb
855) mkimage -A arm -O linux -T kernel -C none -a 0x20008000 -d kernel+dtb uimg
866) dd if=/dev/zero bs=1 count=384 of=ap_recovery.bin
877) cat uimg >> ap_recovery.bin
888) Place this file onto imagefs on the device. Delete ap_cpuap.bin if the
89 free space is not enough.
909) Create the file fotaflag: echo -n FOTA-RECOVERY > fotaflag
91
92For development, booting ap_recovery.bin is recommended because the normal boot
93mode arms the watchdog before starting the kernel.
94
954. CPU and GIC Setup
96---------------------------
97
98Generally CPU and GICv3 need to be set up according to the requirements spelled
99out in Documentation/arch/arm64/booting.rst. For zx297520v3 this means:
100
1011. GICD_CTLR.DS=1 to disable GIC security
1022. Enable access to ICC_SRE
1033. Disable trapping IRQs into monitor mode
1044. Configure EL2 and below to run in insecure mode.
1055. Configure timer PPIs to active-low.
106
107The kernel sources provided by ZTE do not boot either (interrupts do not work
108at all). They are incomplete in other aspects too, so it is assumed that there
109is some workaround similar to the one described in this document somewhere in
110the binary blobs.
111
112The assembly code below is given as an example of how to achieve this:
113
114::
115
116 #include <linux/irqchip/arm-gic-v3.h>
117 #include <asm/assembler.h>
118 #include <asm/cp15.h>
119
120 @ Detect sane bootloaders and skip the hack
121 ldr r3, =0xf2000000
122 ldr r3, [r3]
123 ldr r4, =(GICD_CTLR_ARE_NS | GICD_CTLR_DS)
124 cmp r3, r4
125 beq skip_zx_hack
126 @ This allows EL1 to handle ints hat are normally handled by EL2/3.
127 ldr r3, =0xf2000000
128 str r4, [r3]
129
130 cps #MON_MODE
131
132 @ Work in non-secure physical address space: SCR_EL3.NS = 1. At least the UART
133 @ seems to respond only to non-secure addresses. I have taken insipiration from
134 @ Raspberry pi's armstub7.S here.
135 mov r3, #0x131 @ non-secure, Make F, A bits in CPSR writeable
136 @ Allow hypervisor call.
137 mcr p15, 0, r3, c1, c1, 0
138
139 @ AP_PPI_MODE_REG: Configure timer PPIs (10, 11, 13, 14) to active-low.
140 ldr r3, =0xF22020a8
141 ldr r4, =0x50
142 str r4, [r3]
143 ldr r3, =0xF22020ac
144 ldr r4, =0x14
145 str r4, [r3]
146
147 @ Enable EL2 access to ICC_SRE (bit 3, ICC_SRE_EL3.Enable). Enable system reg
148 @ access to GICv3 registers (bit 0, ICC_SRE_EL3.SRE) for EL1 and EL3.
149 mrc p15, 6, r3, c12, c12, 5 @ ICC_SRE_EL3
150 orr r3, #0x9 @ FIXME: No defines for SRE_EL3 values?
151 mcr p15, 6, r3, c12, c12, 5
152 mrc p15, 0, r3, c12, c12, 5 @ ICC_SRE_EL1
153 orr r3, #(ICC_SRE_EL1_SRE)
154 mcr p15, 0, r3, c12, c12, 5
155
156 @ Like ICC_SRE_EL3, enable EL1 access to ICC_SRE and system register access
157 @ for EL2.
158 mrc p15, 4, r3, c12, c9, 5 @ ICC_SRE_EL2 aka ICC_HSRE
159 orr r3, r3, #(ICC_SRE_EL2_ENABLE | ICC_SRE_EL2_SRE)
160 mcr p15, 4, r3, c12, c9, 5
161 isb
162
163 @ Back to SVC mode
164 cps #SVC_MODE
165 skip_zx_hack:
166
Documentation/arch/arm64/elf_hwcaps.rst+27−0
@@ -451,6 +451,33 @@ HWCAP3_LS64 · 450 unmodified lines
451 of CPU. User should only use ld64b/st64b on supported target (device)451 of CPU. User should only use ld64b/st64b on supported target (device)
452 memory location, otherwise fallback to the non-atomic alternatives.452 memory location, otherwise fallback to the non-atomic alternatives.
453 453
454HWCAP3_SVE_B16MM
455 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
456 ID_AA64ZFR0_EL1.B16B16 == 0b0011
457
458HWCAP3_SVE2P3
459 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
460 ID_AA64ZFR0_EL1.SVEver == 0b0100
461
462HWCAP3_SME_LUT6
463 Functionality implied by ID_AA64SMFR0_EL1.LUT6 == 0b1
464
465HWCAP3_SME2P3
466 Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0100
467
468HWCAP3_F16MM
469 Functionality implied by ID_AA64FPFR0_EL1.F16MM2 == 0b1
470
471HWCAP3_F16F32DOT
472 Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0010
473
474HWCAP3_F16F32MM
475 Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0011
476
477HWCAP3_SVE_LUT6
478 Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
479 ID_AA64ISAR2_EL1.LUT == 0b0010.
480
454 481
4554. Unused AT_HWCAP bits4824. Unused AT_HWCAP bits
456-----------------------483-----------------------
Documentation/arch/arm64/memory-tagging-extension.rst+1−1
@@ -222,7 +222,7 @@ programs should not retry in case of a non-zero system call return. · 221 unmodified lines
222address ABI control and MTE configuration of a process as per the222address ABI control and MTE configuration of a process as per the
223``prctl()`` options described in223``prctl()`` options described in
224Documentation/arch/arm64/tagged-address-abi.rst and above. The corresponding224Documentation/arch/arm64/tagged-address-abi.rst and above. The corresponding
225``regset`` is 1 element of 8 bytes (``sizeof(long))``).225``regset`` is 1 element of 8 bytes (``sizeof(long)``).
226 226
227Core dump support227Core dump support
228-----------------228-----------------
Documentation/arch/arm64/silicon-errata.rst+72−21
@@ -116,7 +116,8 @@ stable kernels. · 115 unmodified lines
116+----------------+-----------------+-----------------+-----------------------------+116+----------------+-----------------+-----------------+-----------------------------+
117| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |117| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
118+----------------+-----------------+-----------------+-----------------------------+118+----------------+-----------------+-----------------+-----------------------------+
119| ARM | Cortex-A76 | #1188873,1418040| ARM64_ERRATUM_1418040 |119| ARM | Cortex-A76 | #1188873, | ARM64_ERRATUM_1418040 |
120| | | #1418040 | |
120+----------------+-----------------+-----------------+-----------------------------+121+----------------+-----------------+-----------------+-----------------------------+
121| ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 |122| ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 |
122+----------------+-----------------+-----------------+-----------------------------+123+----------------+-----------------+-----------------+-----------------------------+
@@ -128,15 +129,28 @@ stable kernels. · 5 unmodified lines
128+----------------+-----------------+-----------------+-----------------------------+129+----------------+-----------------+-----------------+-----------------------------+
129| ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 |130| ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 |
130+----------------+-----------------+-----------------+-----------------------------+131+----------------+-----------------+-----------------+-----------------------------+
132| ARM | Cortex-A76 | #4193800 | ARM64_ERRATUM_4118414 |
133+----------------+-----------------+-----------------+-----------------------------+
134| ARM | Cortex-A76AE | #4193801 | ARM64_ERRATUM_4118414 |
135+----------------+-----------------+-----------------+-----------------------------+
131| ARM | Cortex-A77 | #1491015 | N/A |136| ARM | Cortex-A77 | #1491015 | N/A |
132+----------------+-----------------+-----------------+-----------------------------+137+----------------+-----------------+-----------------+-----------------------------+
133| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |138| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
134+----------------+-----------------+-----------------+-----------------------------+139+----------------+-----------------+-----------------+-----------------------------+
135| ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 |140| ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 |
136+----------------+-----------------+-----------------+-----------------------------+141+----------------+-----------------+-----------------+-----------------------------+
142| ARM | Cortex-A77 | #4193798 | ARM64_ERRATUM_4118414 |
143+----------------+-----------------+-----------------+-----------------------------+
137| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 |144| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 |
138+----------------+-----------------+-----------------+-----------------------------+145+----------------+-----------------+-----------------+-----------------------------+
139| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 |146| ARM | Cortex-A78 | #4193791 | ARM64_ERRATUM_4118414 |
147+----------------+-----------------+-----------------+-----------------------------+
148| ARM | Cortex-A78AE | #4193793 | ARM64_ERRATUM_4118414 |
149+----------------+-----------------+-----------------+-----------------------------+
150| ARM | Cortex-A78C | #3324346, | ARM64_ERRATUM_3194386 |
151| | | #3324347 | |
152+----------------+-----------------+-----------------+-----------------------------+
153| ARM | Cortex-A78C | #4193794 | ARM64_ERRATUM_4118414 |
140+----------------+-----------------+-----------------+-----------------------------+154+----------------+-----------------+-----------------+-----------------------------+
141| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |155| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
142+----------------+-----------------+-----------------+-----------------------------+156+----------------+-----------------+-----------------+-----------------------------+
@@ -146,6 +160,8 @@ stable kernels. · 3 unmodified lines
146+----------------+-----------------+-----------------+-----------------------------+160+----------------+-----------------+-----------------+-----------------------------+
147| ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 |161| ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 |
148+----------------+-----------------+-----------------+-----------------------------+162+----------------+-----------------+-----------------+-----------------------------+
163| ARM | Cortex-A710 | #4193788 | ARM64_ERRATUM_4118414 |
164+----------------+-----------------+-----------------+-----------------------------+
149| ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 |165| ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 |
150+----------------+-----------------+-----------------+-----------------------------+166+----------------+-----------------+-----------------+-----------------------------+
151| ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 |167| ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 |
@@ -158,30 +174,44 @@ stable kernels. · 6 unmodified lines
158+----------------+-----------------+-----------------+-----------------------------+174+----------------+-----------------+-----------------+-----------------------------+
159| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 |175| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 |
160+----------------+-----------------+-----------------+-----------------------------+176+----------------+-----------------+-----------------+-----------------------------+
177| ARM | Cortex-X1 | #4193791 | ARM64_ERRATUM_4118414 |
178+----------------+-----------------+-----------------+-----------------------------+
161| ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 |179| ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 |
162+----------------+-----------------+-----------------+-----------------------------+180+----------------+-----------------+-----------------+-----------------------------+
181| ARM | Cortex-X1C | #4193792 | ARM64_ERRATUM_4118414 |
182+----------------+-----------------+-----------------+-----------------------------+
163| ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |183| ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
164+----------------+-----------------+-----------------+-----------------------------+184+----------------+-----------------+-----------------+-----------------------------+
165| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |185| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
166+----------------+-----------------+-----------------+-----------------------------+186+----------------+-----------------+-----------------+-----------------------------+
167| ARM | Cortex-X2 | #3324338 | ARM64_ERRATUM_3194386 |187| ARM | Cortex-X2 | #3324338 | ARM64_ERRATUM_3194386 |
168+----------------+-----------------+-----------------+-----------------------------+188+----------------+-----------------+-----------------+-----------------------------+
189| ARM | Cortex-X2 | #4193788 | ARM64_ERRATUM_4118414 |
190+----------------+-----------------+-----------------+-----------------------------+
169| ARM | Cortex-X3 | #3324335 | ARM64_ERRATUM_3194386 |191| ARM | Cortex-X3 | #3324335 | ARM64_ERRATUM_3194386 |
170+----------------+-----------------+-----------------+-----------------------------+192+----------------+-----------------+-----------------+-----------------------------+
193| ARM | Cortex-X3 | #4193786 | ARM64_ERRATUM_4118414 |
194+----------------+-----------------+-----------------+-----------------------------+
171| ARM | Cortex-X4 | #3194386 | ARM64_ERRATUM_3194386 |195| ARM | Cortex-X4 | #3194386 | ARM64_ERRATUM_3194386 |
172+----------------+-----------------+-----------------+-----------------------------+196+----------------+-----------------+-----------------+-----------------------------+
197| ARM | Cortex-X4 | #4118414 | ARM64_ERRATUM_4118414 |
198+----------------+-----------------+-----------------+-----------------------------+
173| ARM | Cortex-X925 | #3324334 | ARM64_ERRATUM_3194386 |199| ARM | Cortex-X925 | #3324334 | ARM64_ERRATUM_3194386 |
174+----------------+-----------------+-----------------+-----------------------------+200+----------------+-----------------+-----------------+-----------------------------+
175| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |201| ARM | Cortex-X925 | #4193781 | ARM64_ERRATUM_4118414 |
176+----------------+-----------------+-----------------+-----------------------------+202+----------------+-----------------+-----------------+-----------------------------+
177| ARM | Neoverse-N1 | #1349291 | N/A |203| ARM | Neoverse-N1 | #1188873, | ARM64_ERRATUM_1418040 |
204| | | #1418040 | |
178+----------------+-----------------+-----------------+-----------------------------+205+----------------+-----------------+-----------------+-----------------------------+
179| ARM | Neoverse-N1 | #1490853 | N/A |206| ARM | Neoverse-N1 | #1349291, | N/A |
207| | | #1490853 | |
180+----------------+-----------------+-----------------+-----------------------------+208+----------------+-----------------+-----------------+-----------------------------+
181| ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |209| ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |
182+----------------+-----------------+-----------------+-----------------------------+210+----------------+-----------------+-----------------+-----------------------------+
183| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 |211| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 |
184+----------------+-----------------+-----------------+-----------------------------+212+----------------+-----------------+-----------------+-----------------------------+
213| ARM | Neoverse-N1 | #4193800 | ARM64_ERRATUM_4118414 |
214+----------------+-----------------+-----------------+-----------------------------+
185| ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |215| ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |
186+----------------+-----------------+-----------------+-----------------------------+216+----------------+-----------------+-----------------+-----------------------------+
187| ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 |217| ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 |
@@ -190,24 +220,41 @@ stable kernels. · 2 unmodified lines
190+----------------+-----------------+-----------------+-----------------------------+220+----------------+-----------------+-----------------+-----------------------------+
191| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 |221| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 |
192+----------------+-----------------+-----------------+-----------------------------+222+----------------+-----------------+-----------------+-----------------------------+
223| ARM | Neoverse-N2 | #4193789 | ARM64_ERRATUM_4118414 |
224+----------------+-----------------+-----------------+-----------------------------+
193| ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 |225| ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 |
194+----------------+-----------------+-----------------+-----------------------------+226+----------------+-----------------+-----------------+-----------------------------+
195| ARM | Neoverse-V1 | #1619801 | N/A |227| ARM | Neoverse-V1 | #1619801 | N/A |
196+----------------+-----------------+-----------------+-----------------------------+228+----------------+-----------------+-----------------+-----------------------------+
197| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |229| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |
198+----------------+-----------------+-----------------+-----------------------------+230+----------------+-----------------+-----------------+-----------------------------+
231| ARM | Neoverse-V1 | #4193790 | ARM64_ERRATUM_4118414 |
232+----------------+-----------------+-----------------+-----------------------------+
199| ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 |233| ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 |
200+----------------+-----------------+-----------------+-----------------------------+234+----------------+-----------------+-----------------+-----------------------------+
235| ARM | Neoverse-V2 | #4193787 | ARM64_ERRATUM_4118414 |
236+----------------+-----------------+-----------------+-----------------------------+
201| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 |237| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 |
202+----------------+-----------------+-----------------+-----------------------------+238+----------------+-----------------+-----------------+-----------------------------+
239| ARM | Neoverse-V3 | #4193784 | ARM64_ERRATUM_4118414 |
240+----------------+-----------------+-----------------+-----------------------------+
203| ARM | Neoverse-V3AE | #3312417 | ARM64_ERRATUM_3194386 |241| ARM | Neoverse-V3AE | #3312417 | ARM64_ERRATUM_3194386 |
204+----------------+-----------------+-----------------+-----------------------------+242+----------------+-----------------+-----------------+-----------------------------+
243| ARM | Neoverse-V3AE | #4193784 | ARM64_ERRATUM_4118414 |
244+----------------+-----------------+-----------------+-----------------------------+
245| ARM | C1-Premium | #4193780 | ARM64_ERRATUM_4118414 |
246+----------------+-----------------+-----------------+-----------------------------+
205| ARM | C1-Pro | #4193714 | ARM64_ERRATUM_4193714 |247| ARM | C1-Pro | #4193714 | ARM64_ERRATUM_4193714 |
206+----------------+-----------------+-----------------+-----------------------------+248+----------------+-----------------+-----------------+-----------------------------+
207| ARM | MMU-500 | #841119,826419 | ARM_SMMU_MMU_500_CPRE_ERRATA|249| ARM | C1-Ultra | #4193780 | ARM64_ERRATUM_4118414 |
208| | | #562869,1047329 | |250+----------------+-----------------+-----------------+-----------------------------+
251| ARM | MMU-500 | #562869, | ARM_SMMU_MMU_500_CPRE_ERRATA|
252| | | #841119, | |
253| | | #826419, | |
254| | | #1047329 | |
209+----------------+-----------------+-----------------+-----------------------------+255+----------------+-----------------+-----------------+-----------------------------+
210| ARM | MMU-600 | #1076982,1209401| N/A |256| ARM | MMU-600 | #1076982, | N/A |
257| | | #1209401 | |
211+----------------+-----------------+-----------------+-----------------------------+258+----------------+-----------------+-----------------+-----------------------------+
212| ARM | MMU-700 | #2133013, | N/A |259| ARM | MMU-700 | #2133013, | N/A |
213| | | #2268618, | |260| | | #2268618, | |
@@ -230,11 +277,13 @@ stable kernels. · 16 unmodified lines
230| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |277| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |
231+----------------+-----------------+-----------------+-----------------------------+278+----------------+-----------------+-----------------+-----------------------------+
232+----------------+-----------------+-----------------+-----------------------------+279+----------------+-----------------+-----------------+-----------------------------+
233| Cavium | ThunderX ITS | #22375,24313 | CAVIUM_ERRATUM_22375 |280| Cavium | ThunderX ITS | #22375, | CAVIUM_ERRATUM_22375 |
281| | | #24313 | |
234+----------------+-----------------+-----------------+-----------------------------+282+----------------+-----------------+-----------------+-----------------------------+
235| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |283| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
236+----------------+-----------------+-----------------+-----------------------------+284+----------------+-----------------+-----------------+-----------------------------+
237| Cavium | ThunderX GICv3 | #23154,38545 | CAVIUM_ERRATUM_23154 |285| Cavium | ThunderX GICv3 | #23154, | CAVIUM_ERRATUM_23154 |
286| | | #38545 | |
238+----------------+-----------------+-----------------+-----------------------------+287+----------------+-----------------+-----------------+-----------------------------+
239| Cavium | ThunderX GICv3 | #38539 | N/A |288| Cavium | ThunderX GICv3 | #38539 | N/A |
240+----------------+-----------------+-----------------+-----------------------------+289+----------------+-----------------+-----------------+-----------------------------+
@@ -244,9 +293,8 @@ stable kernels. · 3 unmodified lines
244+----------------+-----------------+-----------------+-----------------------------+293+----------------+-----------------+-----------------+-----------------------------+
245| Cavium | ThunderX SMMUv2 | #27704 | N/A |294| Cavium | ThunderX SMMUv2 | #27704 | N/A |
246+----------------+-----------------+-----------------+-----------------------------+295+----------------+-----------------+-----------------+-----------------------------+
247| Cavium | ThunderX2 SMMUv3| #74 | N/A |296| Cavium | ThunderX2 SMMUv3| #74, | N/A |
248+----------------+-----------------+-----------------+-----------------------------+297| | | #126 | |
249| Cavium | ThunderX2 SMMUv3| #126 | N/A |
250+----------------+-----------------+-----------------+-----------------------------+298+----------------+-----------------+-----------------+-----------------------------+
251| Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 |299| Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 |
252+----------------+-----------------+-----------------+-----------------------------+300+----------------+-----------------+-----------------+-----------------------------+
@@ -256,13 +304,13 @@ stable kernels. · 3 unmodified lines
256+----------------+-----------------+-----------------+-----------------------------+304+----------------+-----------------+-----------------+-----------------------------+
257| NVIDIA | Carmel Core | N/A | NVIDIA_CARMEL_CNP_ERRATUM |305| NVIDIA | Carmel Core | N/A | NVIDIA_CARMEL_CNP_ERRATUM |
258+----------------+-----------------+-----------------+-----------------------------+306+----------------+-----------------+-----------------+-----------------------------+
259| NVIDIA | T241 GICv3/4.x | T241-FABRIC-4 | N/A |307| NVIDIA | Olympus core | T410-OLY-1029 | ARM64_ERRATUM_4118414 |
260+----------------+-----------------+-----------------+-----------------------------+
261| NVIDIA | T241 MPAM | T241-MPAM-1 | N/A |
262+----------------+-----------------+-----------------+-----------------------------+308+----------------+-----------------+-----------------+-----------------------------+
263| NVIDIA | T241 MPAM | T241-MPAM-4 | N/A |309| NVIDIA | T241 GICv3/4.x | T241-FABRIC-4 | N/A |
264+----------------+-----------------+-----------------+-----------------------------+310+----------------+-----------------+-----------------+-----------------------------+
265| NVIDIA | T241 MPAM | T241-MPAM-6 | N/A |311| NVIDIA | T241 MPAM | T241-MPAM-1, | N/A |
312| | | T241-MPAM-4, | |
313| | | T241-MPAM-6 | |
266+----------------+-----------------+-----------------+-----------------------------+314+----------------+-----------------+-----------------+-----------------------------+
267+----------------+-----------------+-----------------+-----------------------------+315+----------------+-----------------+-----------------+-----------------------------+
268| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |316| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
@@ -270,9 +318,8 @@ stable kernels. · 1 unmodified line
270+----------------+-----------------+-----------------+-----------------------------+318+----------------+-----------------+-----------------+-----------------------------+
271| Hisilicon | Hip0{5,6,7} | #161010101 | HISILICON_ERRATUM_161010101 |319| Hisilicon | Hip0{5,6,7} | #161010101 | HISILICON_ERRATUM_161010101 |
272+----------------+-----------------+-----------------+-----------------------------+320+----------------+-----------------+-----------------+-----------------------------+
273| Hisilicon | Hip0{6,7} | #161010701 | N/A |321| Hisilicon | Hip0{6,7} | #161010701, | N/A |
274+----------------+-----------------+-----------------+-----------------------------+322| | | #161010803 | |
275| Hisilicon | Hip0{6,7} | #161010803 | N/A |
276+----------------+-----------------+-----------------+-----------------------------+323+----------------+-----------------+-----------------+-----------------------------+
277| Hisilicon | Hip07 | #161600802 | HISILICON_ERRATUM_161600802 |324| Hisilicon | Hip07 | #161600802 | HISILICON_ERRATUM_161600802 |
278+----------------+-----------------+-----------------+-----------------------------+325+----------------+-----------------+-----------------+-----------------------------+
@@ -284,6 +331,8 @@ stable kernels. · 5 unmodified lines
284+----------------+-----------------+-----------------+-----------------------------+331+----------------+-----------------+-----------------+-----------------------------+
285| Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 |332| Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 |
286+----------------+-----------------+-----------------+-----------------------------+333+----------------+-----------------+-----------------+-----------------------------+
334| Hisilicon | Hip09 | #162100125 | HISILICON_ERRATUM_162100125 |
335+----------------+-----------------+-----------------+-----------------------------+
287+----------------+-----------------+-----------------+-----------------------------+336+----------------+-----------------+-----------------+-----------------------------+
288| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |337| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
289+----------------+-----------------+-----------------+-----------------------------+338+----------------+-----------------+-----------------+-----------------------------+
@@ -323,3 +372,5 @@ stable kernels. · 33 unmodified lines
323+----------------+-----------------+-----------------+-----------------------------+372+----------------+-----------------+-----------------+-----------------------------+
324| Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 |373| Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 |
325+----------------+-----------------+-----------------+-----------------------------+374+----------------+-----------------+-----------------+-----------------------------+
375| Microsoft | Azure Cobalt 100| #4193789 | ARM64_ERRATUM_4118414 |
376+----------------+-----------------+-----------------+-----------------------------+
Documentation/arch/loongarch/irq-chip-model.rst+35−0
@@ -181,6 +181,41 @@ go to PCH-PIC/PCH-LPC and gathered by EIOINTC, and then go to CPUINTC directly:: · 180 unmodified lines
181 | Devices |181 | Devices |
182 +---------+182 +---------+
183 183
184Advanced Extended IRQ model (with redirection)
185==============================================
186
187In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
188to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, PCH-MSI interrupts go
189to REDIRECT for remapping it to AVECINTC, and then go to CPUINTC directly, while
190all other devices interrupts go to PCH-PIC/PCH-LPC and gathered by EIOINTC, and
191then go to CPUINTC directly::
192
193 +-----+ +-----------------------+ +-------+
194 | IPI | --> | CPUINTC | <-- | Timer |
195 +-----+ +-----------------------+ +-------+
196 ^ ^ ^
197 | | |
198 | +----------+ |
199 +---------+ | AVECINTC | +---------+ +-------+
200 | EIOINTC | +----------+ | LIOINTC | <-- | UARTs |
201 +---------+ | REDIRECT | +---------+ +-------+
202 ^ +----------+
203 | ^
204 | |
205 +---------+ +---------+
206 | PCH-PIC | | PCH-MSI |
207 +---------+ +---------+
208 ^ ^ ^
209 | | |
210 +---------+ +---------+ +---------+
211 | Devices | | PCH-LPC | | Devices |
212 +---------+ +---------+ +---------+
213 ^
214 |
215 +---------+
216 | Devices |
217 +---------+
218
184ACPI-related definitions219ACPI-related definitions
185========================220========================
186 221
Documentation/arch/m68k/kernel-options.rst+4−20
@@ -244,23 +244,7 @@ drive (with "root="). · 243 unmodified lines
2443) General Device Options (Amiga and Atari)2443) General Device Options (Amiga and Atari)
245===========================================245===========================================
246 246
2473.1) ether=2473.1) hd=
248-----------
249
250:Syntax: ether=[<irq>[,<base_addr>[,<mem_start>[,<mem_end>]]]],<dev-name>
251
252<dev-name> is the name of a net driver, as specified in
253drivers/net/Space.c in the Linux source. Most prominent are eth0, ...
254eth3, sl0, ... sl3, ppp0, ..., ppp3, dummy, and lo.
255
256The non-ethernet drivers (sl, ppp, dummy, lo) obviously ignore the
257settings by this options. Also, the existing ethernet drivers for
258Linux/m68k (ariadne, a2065, hydra) don't use them because Zorro boards
259are really Plug-'n-Play, so the "ether=" option is useless altogether
260for Linux/m68k.
261
262
2633.2) hd=
264--------248--------
265 249
266:Syntax: hd=<cylinders>,<heads>,<sectors>250:Syntax: hd=<cylinders>,<heads>,<sectors>
@@ -273,7 +257,7 @@ itself. It exists just for the case that this fails for one of your · 6 unmodified lines
273disks.257disks.
274 258
275 259
2763.3) max_scsi_luns=2603.2) max_scsi_luns=
277-------------------261-------------------
278 262
279:Syntax: max_scsi_luns=<n>263:Syntax: max_scsi_luns=<n>
@@ -284,7 +268,7 @@ be scanned. Valid values for <n> are between 1 and 8. Default is 8 if · 4 unmodified lines
284configuration, else 1.268configuration, else 1.
285 269
286 270
2873.4) st=2713.3) st=
288--------272--------
289 273
290:Syntax: st=<buffer_size>,[<write_thres>,[<max_buffers>]]274:Syntax: st=<buffer_size>,[<write_thres>,[<max_buffers>]]
@@ -297,7 +281,7 @@ total number of buffers. <max_buffer> limits the total number of · 6 unmodified lines
297buffers allocated for all tape devices.281buffers allocated for all tape devices.
298 282
299 283
3003.5) dmasound=2843.4) dmasound=
301--------------285--------------
302 286
303:Syntax: dmasound=[<buffers>,<buffer-size>[,<catch-radius>]]287:Syntax: dmasound=[<buffers>,<buffer-size>[,<catch-radius>]]
Documentation/arch/powerpc/vas-api.rst+1−1
@@ -293,7 +293,7 @@ Simple example · 292 unmodified lines
293 //Format CRB request with compression or293 //Format CRB request with compression or
294 //uncompression294 //uncompression
295 // Refer tests for vas_copy/vas_paste295 // Refer tests for vas_copy/vas_paste
296 vas_copy((&crb, 0, 1);296 vas_copy(&crb, 0, 1);
297 vas_paste(addr, 0, 1);297 vas_paste(addr, 0, 1);
298 // Poll on csb.flags with timeout298 // Poll on csb.flags with timeout
299 // csb address is listed in CRB299 // csb address is listed in CRB
Documentation/arch/s390/s390dbf.rst+30−0
@@ -106,6 +106,36 @@ the ``debug_stoppable`` sysctl. If you set ``debug_stoppable`` to 0 the debug · 105 unmodified lines
106feature cannot be stopped. If the debug feature is already stopped, it106feature cannot be stopped. If the debug feature is already stopped, it
107will stay deactivated.107will stay deactivated.
108 108
109Kernel parameters
110-----------------
111The size and log levels of debug logs can be configured early during boot using
112the ``s390dbf`` kernel parameter. The parameter accepts a debug log name, a log
113level, and a log size, separated by colon characters (``:``). To configure only
114a single attribute, either the log level or the log size may be omitted.
115
116To configure multiple debug logs, the parameter may be specified multiple times,
117or multiple parameter sets may be provided in a single instance, separated by
118commas.
119
120Parameter format::
121
122 s390dbf=<name|pattern>:[<level>|-]:[<pages>][,...]
123
124where:
125
126- ``name`` specifies either an exact debug log name or a shell-style wildcard
127 pattern
128- ``level`` specifies the log level, or ``-`` to completely deactivate the log
129- ``pages`` specifies the debug area size in pages
130
131Example::
132
133 s390dbf=cio*:6:128,sclp_err::2
134
135This example sets the log level to 6 and the log size to 128 pages for all debug
136logs whose names start with ``cio``. It also sets the log level of the
137``sclp_err`` debug log to 2.
138
109Kernel Interfaces:139Kernel Interfaces:
110------------------140------------------
111 141
Documentation/arch/sparc/oradax/dax-hv-api.txt+9−9
@@ -457,7 +457,7 @@ bits set, and terminate at a CCB that has the Conditional bit set, but not the P · 456 unmodified lines
457Offset Size Field Description457Offset Size Field Description
458 Bits Field Description458 Bits Field Description
459 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,459 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,
460 “Secondary Input Element Size”460 “Secondary Input Element Size”)
461 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)461 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)
462 [9] Padding Direction selector: A value of 1 causes padding bytes462 [9] Padding Direction selector: A value of 1 causes padding bytes
463 to be added to the left side of output elements. A value of 0463 to be added to the left side of output elements. A value of 0
@@ -656,7 +656,7 @@ Offset Size Field Description · 192 unmodified lines
656 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input656 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input
657 Element Offsets”)657 Element Offsets”)
658 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,658 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,
659 “Secondary Input Element Size”659 “Secondary Input Element Size”)
660 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)660 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)
661 [9:5] Operand size for first scan criteria value. In a scan value661 [9:5] Operand size for first scan criteria value. In a scan value
662 operation, this is one of two potential exact match values.662 operation, this is one of two potential exact match values.
@@ -793,13 +793,13 @@ Offset Size Field Description · 130 unmodified lines
793 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input793 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input
794 Element Offsets”)794 Element Offsets”)
795 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,795 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,
796 “Secondary Input Element Size”796 “Secondary Input Element Size”)
797 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)797 [13:10] Output Format (see Section 36.2.1.1.6, “Output Format”)
798 [9] Reserved798 [9] Reserved
799 [8:0] Test value used for comparison against the most significant bits799 [8:0] Test value used for comparison against the most significant bits
800 in the input values, when using 2 or 3 byte input elements.800 in the input values, when using 2 or 3 byte input elements.
8018 8 Completion (same fields as Section 36.2.1.2, “Extract command”8018 8 Completion (same fields as Section 36.2.1.2, “Extract command”)
80216 8 Primary Input (same fields as Section 36.2.1.2, “Extract command”80216 8 Primary Input (same fields as Section 36.2.1.2, “Extract command”)
80324 8 Data Access Control (same fields as Section 36.2.1.2, “Extract command”,80324 8 Data Access Control (same fields as Section 36.2.1.2, “Extract command”,
804 except Primary Input Length Format may not use the 0x0 value)804 except Primary Input Length Format may not use the 0x0 value)
80532 8 Secondary Input, if used by Primary Input Format. Same fields as Primary80532 8 Secondary Input, if used by Primary Input Format. Same fields as Primary
@@ -880,7 +880,7 @@ Offset Size Field Description · 74 unmodified lines
880 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input880 [18:16] Secondary Input Starting Offset (see Section 36.2.1.1.5, “Input
881 Element Offsets”)881 Element Offsets”)
882 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,882 [15:14] Secondary Input Element Size (see Section 36.2.1.1.4,
883 “Secondary Input Element Size”883 “Secondary Input Element Size”)
884 884
885 885
886 524886 524
@@ -895,8 +895,8 @@ Offset Size Field Description · 8 unmodified lines
895 causes padding bytes to be added to the right side of output895 causes padding bytes to be added to the right side of output
896 elements.896 elements.
897 [8:0] Reserved897 [8:0] Reserved
898 8 8 Completion (same fields as Section 36.2.1.2, “Extract command”898 8 8 Completion (same fields as Section 36.2.1.2, “Extract command”)
899 16 8 Primary Input (same fields as Section 36.2.1.2, “Extract command”899 16 8 Primary Input (same fields as Section 36.2.1.2, “Extract command”)
900 24 8 Data Access Control (same fields as Section 36.2.1.2, “Extract command”)900 24 8 Data Access Control (same fields as Section 36.2.1.2, “Extract command”)
901 32 8 Secondary Bit Vector Input. Same fields as Primary Input.901 32 8 Secondary Bit Vector Input. Same fields as Primary Input.
902 40 8 Reserved902 40 8 Reserved
@@ -949,7 +949,7 @@ Offset Size Field Description · 46 unmodified lines
949 [31] If set, this CCB functions as a Sync command. If clear, this949 [31] If set, this CCB functions as a Sync command. If clear, this
950 CCB functions as a No-op command.950 CCB functions as a No-op command.
951 [30:0] Reserved951 [30:0] Reserved
952 8 8 Completion (same fields as Section 36.2.1.2, “Extract command”952 8 8 Completion (same fields as Section 36.2.1.2, “Extract command”)
953 16 46 Reserved953 16 46 Reserved
954 954
95536.2.2. CCB Completion Area95536.2.2. CCB Completion Area
Documentation/arch/sparc/oradax/oracle-dax.rst+1−1
@@ -438,7 +438,7 @@ that in user land:: · 437 unmodified lines
438The output bitmap is ready for consumption immediately after the438The output bitmap is ready for consumption immediately after the
439completion status indicates success.439completion status indicates success.
440 440
441Excer[t from UltraSPARC Virtual Machine Specification441Excerpt from UltraSPARC Virtual Machine Specification
442=====================================================442=====================================================
443 443
444 .. include:: dax-hv-api.txt444 .. include:: dax-hv-api.txt
Documentation/arch/x86/cpuinfo.rst+4−0
@@ -187,6 +187,10 @@ to disable features using the feature number as defined in · 186 unmodified lines
187Protection can be disabled using clearcpuid=514. The number 514 is calculated187Protection can be disabled using clearcpuid=514. The number 514 is calculated
188from #define X86_FEATURE_UMIP (16*32 + 2).188from #define X86_FEATURE_UMIP (16*32 + 2).
189 189
190DO NOT USE this cmdline option in production - it is meant to be used only as
191a quick'n'dirty debugging aid to rule out a feature-enabling code is the
192culprit. If you use it, it'll taint the kernel.
193
190In addition, there exists a variety of custom command-line parameters that194In addition, there exists a variety of custom command-line parameters that
191disable specific features. The list of parameters includes, but is not limited195disable specific features. The list of parameters includes, but is not limited
192to, nofsgsbase, nosgx, noxsave, etc. 5-level paging can also be disabled using196to, nofsgsbase, nosgx, noxsave, etc. 5-level paging can also be disabled using
Documentation/arch/x86/tdx.rst+127−7
@@ -73,6 +73,133 @@ initialize:: · 72 unmodified lines
73 73
74 [..] virt/tdx: TDX-Module initialization failed ...74 [..] virt/tdx: TDX-Module initialization failed ...
75 75
76TDX module Runtime Update
77-------------------------
78
79Similar to microcode, the BIOS generally has a copy of the TDX module
80in flash. It loads this module image in to RAM at boot. However, just
81like microcode, the BIOS-loaded TDX module might be out of date either
82because the BIOS is old or the system has been up a long time. The
83kernel can replace the BIOS version in RAM and load a different TDX
84module. Kernel-loaded TDX modules do not affect the BIOS flash and do
85not survive reboots.
86
87The TDX module is normally the only piece of software running in SEAM
88mode with which the kernel interacts. But there is a second piece of
89software which is used to load or update the TDX module: a persistent
90SEAM loader (P-SEAMLDR). It runs in SEAM mode separately from the TDX
91module. The kernel communicates with the P-SEAMLDR to perform TDX
92module runtime updates.
93
94How to update the TDX module
95~~~~~~~~~~~~~~~~~~~~~~~~~~~~
96
97Updating the TDX module is a complex process. Much of the logic and
98policy is left to userspace. End users should use existing update
99infrastructure provided by their distro. The Intel TDX Module Binaries
100repository has a reference implementation of this logic:
101
102 https://github.com/intel/confidential-computing.tdx.tdx-module.binaries/blob/main/version_select_and_load.py
103
104This section will now lay out roughly what is needed to implement a
105userspace-driven TDX module update. Detailed documentation on the
106tdx_host ABIs is available here::
107
108 Documentation/ABI/testing/sysfs-devices-faux-tdx-host
109
110and is not duplicated in this document.
111
1121. Check whether runtime update is supported at all
113
114 Verify that the TDX module firmware upload interface is available::
115
116 /sys/class/firmware/tdx_module
117
118 Note that this is the generic kernel firmware update ABI. It is
119 separate from the "tdx_host" device ABI itself.
120
1212. Check whether additional updates are possible. Verify that::
122
123 /sys/devices/faux/tdx_host/num_remaining_updates
124
125 has a value greater than 0. If it is 0, the TDX update log might be
126 full. Reboot to reset this to a nonzero value.
127
1283. Choose a compatible TDX module image
129
130 Choosing a compatible TDX module image is not trivial. There are both
131 hard compatibility requirements and policy choices to make.
132
133 Hard compatibility requirements:
134
135 - The update must be compatible with the kernel.
136
137 The update must not change any TDX ABIs in any non-backward-compatible
138 way. It can introduce new features but must not require that the kernel
139 use new ABIs for existing features. It must ensure that the rest of the
140 system is not affected in any way. Software on the system must never
141 notice any behavioral changes. Attestation results should be identical
142 except for version changes.
143
144 - The update must be compatible with the CPU.
145
146 The set of supported CPU FMS values (family, model, stepping) is
147 encoded in the module image itself. In practice, module version series
148 are platform-specific. For example, the 1.5.x series runs on Sapphire
149 Rapids but not Granite Rapids, which needs 2.0.x.
150
151 - The update must be compatible with the P-SEAMLDR.
152
153 This information is provided in a metadata file, typically
154 mapping_file.json, released with the module image. Each module image
155 specifies the minimum required P-SEAMLDR version, and the update is
156 compatible only if the running P-SEAMLDR meets that requirement.
157
158 The current version of the P-SEAMLDR can be read here::
159
160 /sys/devices/faux/tdx_host/seamldr_version
161
162 - The update must be compatible with the running TDX module.
163
164 Like P-SEAMLDR, each module image also specifies a minimum required
165 TDX module version. The running module must satisfy that requirement.
166
167 The update software can read the current TDX module version here::
168
169 /sys/devices/faux/tdx_host/version
170
171 Policy choices:
172
173 - The update software chooses how to optimize its update. For instance,
174 it can optimize for fewer updates or for smaller version steps,
175 for example, 1.2.3 => 1.2.5 versus 1.2.3 => 1.2.4 => 1.2.5.
176
1774. Perform the update
178
179 Run::
180
181 echo 1 > /sys/class/firmware/tdx_module/loading
182 cat <path_to_module_image> > /sys/class/firmware/tdx_module/data
183 echo 0 > /sys/class/firmware/tdx_module/loading
184
185 The files /sys/class/firmware/tdx_module/status and
186 /sys/class/firmware/tdx_module/error report update progress and error
187 information.
188
189 After the update completes, the new module version is visible in
190 /sys/devices/faux/tdx_host/version.
191
192Impact on running TDs
193~~~~~~~~~~~~~~~~~~~~~
194
195TDX module runtime updates must have virtually no visible impact on running
196TDs. Any TD visible impact is a TDX module bug.
197
198The main exception is the TEE_TCB_SVN_2 field in TD quotes, which
199reflects the TCB of the currently running TDX module and therefore
200changes after an update. By contrast, TEE_TCB_SVN reflects the TCB at TD
201launch time and is not affected.
202
76TDX Interaction to Other Kernel Components203TDX Interaction to Other Kernel Components
77------------------------------------------204------------------------------------------
78 205
@@ -138,13 +265,6 @@ If the platform has such erratum, the kernel prints additional message in · 59 unmodified lines
138machine check handler to tell user the machine check may be caused by265machine check handler to tell user the machine check may be caused by
139kernel bug on TDX private memory.266kernel bug on TDX private memory.
140 267
141Kexec
142~~~~~~~
143
144Currently kexec doesn't work on the TDX platforms with the aforementioned
145erratum. It fails when loading the kexec kernel image. Otherwise it
146works normally.
147
148Interaction vs S3 and deeper states268Interaction vs S3 and deeper states
149~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~269~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
150 270
Documentation/arch/x86/x86_64/fsgs.rst+2−2
@@ -182,8 +182,8 @@ address spaces via an attribute based mechanism in Clang 2.6 and newer · 181 unmodified lines
182versions:182versions:
183 183
184 ==================================== =====================================184 ==================================== =====================================
185 __attribute__((address_space(256)) Variable is addressed relative to GS185 __attribute__(address_space(256)) Variable is addressed relative to GS
186 __attribute__((address_space(257)) Variable is addressed relative to FS186 __attribute__(address_space(257)) Variable is addressed relative to FS
187 ==================================== =====================================187 ==================================== =====================================
188 188
189FS/GS based addressing with inline assembly189FS/GS based addressing with inline assembly
Documentation/block/data-integrity.rst+1−1
@@ -154,7 +154,7 @@ bio_free() will automatically free the bip. · 153 unmodified lines
154----------------154----------------
155 155
156Block devices can set up the integrity information in the integrity156Block devices can set up the integrity information in the integrity
157sub-struture of the queue_limits structure.157sub-structure of the queue_limits structure.
158 158
159Layered block devices will need to pick a profile that's appropriate159Layered block devices will need to pick a profile that's appropriate
160for all subdevices. queue_limits_stack_integrity() can help with that. DM160for all subdevices. queue_limits_stack_integrity() can help with that. DM
Documentation/block/error-injection.rst+59−0
@@ -0,0 +1,59 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3============================
4Configurable Error Injection
5============================
6
7Overview
8--------
9
10Configurable error injection allows injecting specific block layer status codes
11for sector ranges of a block device. Errors can be injected unconditionally, or
12with a given probability.
13
14To use configurable error injection, CONFIG_BLK_ERROR_INJECTION must be enabled.
15
16The only interface is the error_injection debugfs file, which is created for
17each registered gendisk. Writes to this file are used to create or delete rules
18and reads return a list of the current error injection sites.
19
20Options
21-------
22
23The following options specify the operations:
24
25=================== =======================================================
26add add a new rule
27removeall remove all existing rules
28=================== =======================================================
29
30The following options specify the details of the rule for the add operation:
31
32=================== =======================================================
33op=<string> block layer operation this rule applies to. This uses
34 the XYZ for each REQ_OP_XYZ operation, e.g. READ, WRITE
35 or DISCARD. Mandatory.
36status=<string> Status to return. This uses XYZ for each BLK_STS_XYZ
37 code, e.g. IOERR or MEDIUM. Mandatory.
38start=<number> First block layer sector the rule applies to.
39 Optional, defaults to 0.
40nr_sectors=<number> Number of sectors this rule applies.
41 Optional, defaults to the remainder of the device.
42chance=<number> Only return a failure with a likelihood of 1/chance.
43 Optional, defaults to 1 (always).
44=================== =======================================================
45
46Example
47-------
48
49Return BLK_STS_IOERR for one in 10 reads of sector 0 of /dev/nvme0n1:
50
51 $ echo 'add,op=READ,start=0,status=IOERR,chance=10' > /sys/kernel/debug/block/nvme0n1/error_injection
52
53Return BLK_STS_MEDIUM for every write to /dev/nvme0n1:
54
55 $ echo 'add,op=WRITE,start=0,status=MEDIUM' > /sys/kernel/debug/block/nvme0n1/error_injection
56
57Remove all rules for /dev/nvme0n1:
58
59 $ echo 'removeall' > /sys/kernel/debug/block/nvme0n1/error_injection
Documentation/block/index.rst+1−0
@@ -22,3 +22,4 @@ Block · 21 unmodified lines
22 switching-sched22 switching-sched
23 writeback_cache_control23 writeback_cache_control
24 ublk24 ublk
25 error-injection
Documentation/bpf/btf.rst+2−4
@@ -97,10 +97,8 @@ Each type contains the following common data:: · 96 unmodified lines
97 struct btf_type {97 struct btf_type {
98 __u32 name_off;98 __u32 name_off;
99 /* "info" bits arrangement99 /* "info" bits arrangement
100 * bits 0-15: vlen (e.g. # of struct's members)100 * bits 0-23: vlen (e.g. # of struct's members)
101 * bits 16-23: unused101 * bits 24-30: kind (e.g. int, ptr, array...etc)
102 * bits 24-28: kind (e.g. int, ptr, array...etc)
103 * bits 29-30: unused
104 * bit 31: kind_flag, currently used by102 * bit 31: kind_flag, currently used by
105 * struct, union, enum, fwd, enum64,103 * struct, union, enum, fwd, enum64,
106 * decl_tag and type_tag104 * decl_tag and type_tag
Documentation/bpf/kfuncs.rst+34−2
@@ -207,8 +207,26 @@ Here, the buffer may be NULL. If the buffer is not NULL, it must be at least · 206 unmodified lines
207buffer__szk bytes in size. The kfunc is responsible for checking if the buffer207buffer__szk bytes in size. The kfunc is responsible for checking if the buffer
208is NULL before using it.208is NULL before using it.
209 209
2102.3.5 __str Annotation2102.3.5 __nonown_allowed Annotation
211----------------------------211---------------------------------
212
213This annotation is used to indicate that the parameter may be a non-owning reference.
214
215An example is given below::
216
217 __bpf_kfunc int bpf_list_add(..., struct bpf_list_node
218 *prev__nonown_allowed, ...)
219 {
220 ...
221 }
222
223For the ``prev__nonown_allowed`` parameter (resolved as ``KF_ARG_PTR_TO_LIST_NODE``),
224suffix ``__nonown_allowed`` retains the usual owning-pointer rules and also
225permits a non-owning reference with no ref_obj_id (e.g. the return value of
226bpf_list_front() / bpf_list_back()).
227
2282.3.6 __str Annotation
229----------------------
212This annotation is used to indicate that the argument is a constant string.230This annotation is used to indicate that the argument is a constant string.
213 231
214An example is given below::232An example is given below::
@@ -462,6 +480,20 @@ In order to accommodate such requirements, the verifier will enforce strict · 247 unmodified lines
462PTR_TO_BTF_ID type matching if two types have the exact same name, with one480PTR_TO_BTF_ID type matching if two types have the exact same name, with one
463being suffixed with ``___init``.481being suffixed with ``___init``.
464 482
4832.8 Accessing arena memory through kfunc arguments
484--------------------------------------------------
485
486A read or write at any address inside an arena does not oops the kernel.
487Unallocated arena pages are lazily backed by a scratch page and the
488access is reported through the program's BPF stream as an error. Only
489the BPF program's correctness is affected; the kernel itself remains
490intact.
491
492The arena is followed by a ``GUARD_SZ / 2`` (32 KiB) guard region that
493is also covered by this recovery. A kfunc handed an arena pointer may
494therefore access up to ``GUARD_SZ / 2`` past it without bounds-checking
495against the arena. Larger accesses must verify the range explicitly.
496
465.. _BPF_kfunc_lifecycle_expectations:497.. _BPF_kfunc_lifecycle_expectations:
466 498
4673. kfunc lifecycle expectations4993. kfunc lifecycle expectations
Documentation/bpf/map_lru_hash_update.dot+42−2
@@ -21,10 +21,18 @@ digraph { · 20 unmodified lines
21 // names that initiate the corresponding logic in kernel/bpf/bpf_lru_list.c.21 // names that initiate the corresponding logic in kernel/bpf/bpf_lru_list.c.
22 // Number suffixes and errno suffixes handle subsections of the corresponding22 // Number suffixes and errno suffixes handle subsections of the corresponding
23 // logic in the function as of the writing of this dot.23 // logic in the function as of the writing of this dot.
24 //
25 // All LRU locks are rqspinlock_t. Every acquire can fail (AA self-deadlock
26 // or contention timeout); on failure the corresponding helper returns NULL
27 // and the caller propagates -ENOMEM. The "rqspinlock acquire failed"
28 // terminal below is reached via the dashed arrows from each acquire site.
29
30 rqspinlock_failed [shape=rectangle,
31 label="Any LRU rqspinlock\nacquire fails\n(AA or timeout)"]
24 32
25 // cf. __local_list_pop_free() / bpf_percpu_lru_pop_free()33 // cf. __local_list_pop_free() / bpf_percpu_lru_pop_free()
26 local_freelist_check [shape=diamond,fillcolor=1,34 local_freelist_check [shape=diamond,fillcolor=1,
27 label="Local freelist\nnode available?"];35 label="Local freelist\nnode available?\n(lockless free_llist)"];
28 use_local_node [shape=rectangle,36 use_local_node [shape=rectangle,
29 label="Use node owned\nby this CPU"]37 label="Use node owned\nby this CPU"]
30 38
@@ -82,6 +90,15 @@ digraph { · 51 unmodified lines
82 // fn__local_list_pop_pending()90 // fn__local_list_pop_pending()
83 }91 }
84 92
93 // Post-steal: re-acquire local loc_l->lock to insert the stolen node into
94 // the local pending list. If the acquire fails, the stolen node is published
95 // to the lockless local free_llist so the next pop on this CPU picks it up
96 // instead of orphaning it.
97 post_steal_lock [shape=diamond,fillcolor=1,
98 label="Acquire local\nloc_l->lock\nto add pending"]
99 post_steal_to_free_llist [shape=rectangle,
100 label="Publish stolen node to\nlocal free_llist (lockless)"]
101
85 fn_bpf_lru_list_pop_free_to_local2 [shape=rectangle,102 fn_bpf_lru_list_pop_free_to_local2 [shape=rectangle,
86 label="Use node that was\nnot recently referenced"]103 label="Use node that was\nnot recently referenced"]
87 local_freelist_check4 [shape=rectangle,104 local_freelist_check4 [shape=rectangle,
@@ -97,10 +114,19 @@ digraph { · 9 unmodified lines
97 fn_htab_lru_map_update_elem_ENOENT [shape=oval,label="return -ENOENT"]114 fn_htab_lru_map_update_elem_ENOENT [shape=oval,label="return -ENOENT"]
98 115
99 begin -> local_freelist_check116 begin -> local_freelist_check
117 // The initial per-CPU lock (loc_l->lock for common, l->lock for percpu) is
118 // acquired before the local freelist check; rqspinlock failure here exits
119 // directly to -ENOMEM (no recovery needed: nothing was removed yet).
120 local_freelist_check -> rqspinlock_failed [style=dashed,
121 xlabel="acquire fails"]
100 local_freelist_check -> use_local_node [xlabel="Y"]122 local_freelist_check -> use_local_node [xlabel="Y"]
101 local_freelist_check -> common_lru_check [xlabel="N"]123 local_freelist_check -> common_lru_check [xlabel="N"]
102 common_lru_check -> fn_bpf_lru_list_pop_free_to_local [xlabel="Y"]124 common_lru_check -> fn_bpf_lru_list_pop_free_to_local [xlabel="Y"]
103 common_lru_check -> fn___bpf_lru_list_shrink_inactive [xlabel="N"]125 common_lru_check -> fn___bpf_lru_list_shrink_inactive [xlabel="N"]
126 // Global lru_list lock acquire failure in pop_free_to_local: skip refill,
127 // fall through to the steal path. Not ENOMEM by itself.
128 fn_bpf_lru_list_pop_free_to_local -> common_lru_check2 [style=dashed,
129 xlabel="global lru_lock\nacquire fails"]
104 fn_bpf_lru_list_pop_free_to_local -> fn___bpf_lru_node_move_to_free130 fn_bpf_lru_list_pop_free_to_local -> fn___bpf_lru_node_move_to_free
105 fn___bpf_lru_node_move_to_free ->131 fn___bpf_lru_node_move_to_free ->
106 fn_bpf_lru_list_pop_free_to_local2 [xlabel="Y"]132 fn_bpf_lru_list_pop_free_to_local2 [xlabel="Y"]
@@ -120,13 +146,27 @@ digraph { · 13 unmodified lines
120 local_freelist_check6 -> local_freelist_check7146 local_freelist_check6 -> local_freelist_check7
121 local_freelist_check7 -> fn_htab_lru_map_update_elem147 local_freelist_check7 -> fn_htab_lru_map_update_elem
122 148
123 fn_htab_lru_map_update_elem -> fn_htab_lru_map_update_elem3 [xlabel = "Y"]149 // Steal-loop victim lock failure is silent: treat as "no node found here"
150 // and continue to next CPU; same edge as the existing "N" path.
151 local_freelist_check5 -> fn_htab_lru_map_update_elem2 [style=dashed,
152 xlabel="victim's lock\nfails: skip"]
153 // After a successful steal, re-acquire the local loc_l->lock. On failure
154 // the stolen node is published to free_llist (recovered, not orphaned)
155 // and the update returns -ENOMEM.
156 fn_htab_lru_map_update_elem -> post_steal_lock [xlabel = "Y"]
157 post_steal_lock -> fn_htab_lru_map_update_elem3 [xlabel = "OK"]
158 post_steal_lock -> post_steal_to_free_llist [style=dashed,
159 xlabel="loc_l->lock\nacquire fails"]
160 post_steal_to_free_llist -> fn_htab_lru_map_update_elem_ENOMEM
124 fn_htab_lru_map_update_elem -> fn_htab_lru_map_update_elem2 [xlabel = "N"]161 fn_htab_lru_map_update_elem -> fn_htab_lru_map_update_elem2 [xlabel = "N"]
125 fn_htab_lru_map_update_elem2 ->162 fn_htab_lru_map_update_elem2 ->
126 fn_htab_lru_map_update_elem_ENOMEM [xlabel = "Y"]163 fn_htab_lru_map_update_elem_ENOMEM [xlabel = "Y"]
127 fn_htab_lru_map_update_elem2 -> local_freelist_check5 [xlabel = "N"]164 fn_htab_lru_map_update_elem2 -> local_freelist_check5 [xlabel = "N"]
128 fn_htab_lru_map_update_elem3 -> fn_htab_lru_map_update_elem4165 fn_htab_lru_map_update_elem3 -> fn_htab_lru_map_update_elem4
129 166
167 // Shared rqspinlock-failure terminal collapses to the same -ENOMEM exit.
168 rqspinlock_failed -> fn_htab_lru_map_update_elem_ENOMEM
169
130 use_local_node -> fn_htab_lru_map_update_elem4170 use_local_node -> fn_htab_lru_map_update_elem4
131 fn_bpf_lru_list_pop_free_to_local2 -> fn_htab_lru_map_update_elem4171 fn_bpf_lru_list_pop_free_to_local2 -> fn_htab_lru_map_update_elem4
132 local_freelist_check4 -> fn_htab_lru_map_update_elem4172 local_freelist_check4 -> fn_htab_lru_map_update_elem4
Documentation/core-api/cpu_hotplug.rst+0−5
@@ -45,11 +45,6 @@ Command Line Switches · 44 unmodified lines
45 45
46 This option is limited to the X86 and S390 architecture.46 This option is limited to the X86 and S390 architecture.
47 47
48``cpu0_hotplug``
49 Allow to shutdown CPU0.
50
51 This option is limited to the X86 architecture.
52
53CPU maps48CPU maps
54========49========
55 50
Documentation/core-api/housekeeping.rst+1−1
@@ -99,7 +99,7 @@ the same RCU read side critical section. · 98 unmodified lines
99A typical layout example would look like this on the update side99A typical layout example would look like this on the update side
100(``housekeeping_update()``)::100(``housekeeping_update()``)::
101 101
102 rcu_assign_pointer(housekeeping_cpumasks[type], trial);102 rcu_assign_pointer(housekeeping.cpumasks[type], trial);
103 synchronize_rcu();103 synchronize_rcu();
104 flush_workqueue(example_workqueue);104 flush_workqueue(example_workqueue);
105 105
Documentation/core-api/kernel-api.rst+1−0
@@ -307,6 +307,7 @@ Accounting Framework · 306 unmodified lines
307Block Devices307Block Devices
308=============308=============
309 309
310.. kernel-doc:: include/linux/bvec.h
310.. kernel-doc:: include/linux/bio.h311.. kernel-doc:: include/linux/bio.h
311.. kernel-doc:: block/blk-core.c312.. kernel-doc:: block/blk-core.c
312 :export:313 :export:
Documentation/core-api/kho/abi.rst+5−0
@@ -28,6 +28,11 @@ KHO persistent memory tracker ABI · 27 unmodified lines
28.. kernel-doc:: include/linux/kho/abi/kexec_handover.h28.. kernel-doc:: include/linux/kho/abi/kexec_handover.h
29 :doc: KHO persistent memory tracker29 :doc: KHO persistent memory tracker
30 30
31KHO serialization block ABI
32===========================
33
34.. kernel-doc:: include/linux/kho/abi/block.h
35
31See Also36See Also
32========37========
33 38
Documentation/core-api/kho/index.rst+11−0
@@ -83,6 +83,17 @@ Public API · 82 unmodified lines
83.. kernel-doc:: kernel/liveupdate/kexec_handover.c83.. kernel-doc:: kernel/liveupdate/kexec_handover.c
84 :export:84 :export:
85 85
86KHO Serialization Blocks API
87============================
88
89.. kernel-doc:: kernel/liveupdate/kho_block.c
90 :doc: KHO Serialization Blocks
91
92.. kernel-doc:: include/linux/kho_block.h
93
94.. kernel-doc:: kernel/liveupdate/kho_block.c
95 :internal:
96
86See Also97See Also
87========98========
88 99
Documentation/core-api/kref.rst+2−2
@@ -40,7 +40,7 @@ kref_init as so:: · 39 unmodified lines
40 40
41 struct my_data *data;41 struct my_data *data;
42 42
43 data = kmalloc(sizeof(*data), GFP_KERNEL);43 data = kmalloc_obj(*data);
44 if (!data)44 if (!data)
45 return -ENOMEM;45 return -ENOMEM;
46 kref_init(&data->refcount);46 kref_init(&data->refcount);
@@ -100,7 +100,7 @@ thread to process:: · 53 unmodified lines
100 int rv = 0;100 int rv = 0;
101 struct my_data *data;101 struct my_data *data;
102 struct task_struct *task;102 struct task_struct *task;
103 data = kmalloc(sizeof(*data), GFP_KERNEL);103 data = kmalloc_obj(*data);
104 if (!data)104 if (!data)
105 return -ENOMEM;105 return -ENOMEM;
106 kref_init(&data->refcount);106 kref_init(&data->refcount);
Documentation/core-api/list.rst+3−3
@@ -112,7 +112,7 @@ list: · 111 unmodified lines
112 112
113 /* State 1 */113 /* State 1 */
114 114
115 grock = kzalloc(sizeof(*grock), GFP_KERNEL);115 grock = kzalloc_obj(*grock);
116 if (!grock)116 if (!grock)
117 return -ENOMEM;117 return -ENOMEM;
118 grock->name = "Grock";118 grock->name = "Grock";
@@ -123,7 +123,7 @@ list: · 4 unmodified lines
123 123
124 /* State 2 */124 /* State 2 */
125 125
126 dimitri = kzalloc(sizeof(*dimitri), GFP_KERNEL);126 dimitri = kzalloc_obj(*dimitri);
127 if (!dimitri)127 if (!dimitri)
128 return -ENOMEM;128 return -ENOMEM;
129 dimitri->name = "Dimitri";129 dimitri->name = "Dimitri";
@@ -752,7 +752,7 @@ This is because list_splice() did not reinitialize the list_head it took · 622 unmodified lines
752entries from, leaving its pointer pointing into what is now a different list.752entries from, leaving its pointer pointing into what is now a different list.
753 753
754If we want to avoid this situation, list_splice_init() can be used. It does the754If we want to avoid this situation, list_splice_init() can be used. It does the
755same thing as list_splice(), except reinitalizes the donor list_head after the755same thing as list_splice(), except reinitializes the donor list_head after the
756transplant.756transplant.
757 757
758Concurrency considerations758Concurrency considerations
Documentation/core-api/printk-formats.rst+3−0
@@ -322,6 +322,7 @@ MAC/FDDI addresses · 321 unmodified lines
322 %pMF 00-01-02-03-04-05322 %pMF 00-01-02-03-04-05
323 %pm 000102030405323 %pm 000102030405
324 %pmR 050403020100324 %pmR 050403020100
325 %p[mM][FR][U]
325 326
326For printing 6-byte MAC/FDDI addresses in hex notation. The ``M`` and ``m``327For printing 6-byte MAC/FDDI addresses in hex notation. The ``M`` and ``m``
327specifiers result in a printed address with (M) or without (m) byte328specifiers result in a printed address with (M) or without (m) byte
@@ -335,6 +336,8 @@ For Bluetooth addresses the ``R`` specifier shall be used after the ``M`` · 7 unmodified lines
335specifier to use reversed byte order suitable for visual interpretation336specifier to use reversed byte order suitable for visual interpretation
336of Bluetooth addresses which are in the little endian order.337of Bluetooth addresses which are in the little endian order.
337 338
339When ``U`` is passed, the result is printed in the upper case.
340
338Passed by reference.341Passed by reference.
339 342
340IPv4 addresses343IPv4 addresses
Documentation/core-api/real-time/theory.rst+1−1
@@ -25,7 +25,7 @@ Scheduling · 24 unmodified lines
25==========25==========
26 26
27The core principles of Linux scheduling and the associated user-space API are27The core principles of Linux scheduling and the associated user-space API are
28documented in the man page sched(7)28documented in the man page
29`sched(7) <https://man7.org/linux/man-pages/man7/sched.7.html>`_.29`sched(7) <https://man7.org/linux/man-pages/man7/sched.7.html>`_.
30By default, the Linux kernel uses the SCHED_OTHER scheduling policy. Under30By default, the Linux kernel uses the SCHED_OTHER scheduling policy. Under
31this policy, a task is preempted when the scheduler determines that it has31this policy, a task is preempted when the scheduler determines that it has
Documentation/cpu-freq/cpu-drivers.rst+7−2
@@ -114,8 +114,13 @@ Then, the driver must fill in the following values: · 113 unmodified lines
114|policy->cur | The current operating frequency of |114|policy->cur | The current operating frequency of |
115| | this CPU (if appropriate) |115| | this CPU (if appropriate) |
116+-----------------------------------+--------------------------------------+116+-----------------------------------+--------------------------------------+
117|policy->min, | |117|policy->min, | The min/max scaling frequency. |
118|policy->max, | |118|policy->max | If set by the driver in ->init(), |
119| | used as the lower/upper bound for |
120| | policy frequency QoS requests; |
121| | otherwise, reflects the min/max |
122| | frequency the driver can set |
123+-----------------------------------+--------------------------------------+
119|policy->policy and, if necessary, | |124|policy->policy and, if necessary, | |
120|policy->governor | must contain the "default policy" for|125|policy->governor | must contain the "default policy" for|
121| | this CPU. A few moments later, |126| | this CPU. A few moments later, |
Documentation/crypto/api-samples.rst+1−1
@@ -159,7 +159,7 @@ Code Example For Random Number Generator Usage · 158 unmodified lines
159 static int get_random_numbers(u8 *buf, unsigned int len)159 static int get_random_numbers(u8 *buf, unsigned int len)
160 {160 {
161 struct crypto_rng *rng = NULL;161 struct crypto_rng *rng = NULL;
162 char *drbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */162 char *drbg = "stdrng";
163 int ret;163 int ret;
164 164
165 if (!buf || !len) {165 if (!buf || !len) {
Documentation/crypto/async-tx-api.rst+2−2
@@ -82,9 +82,9 @@ xor_val xor a series of source buffers and set a flag if the · 81 unmodified lines
82pq generate the p+q (raid6 syndrome) from a series of source buffers82pq generate the p+q (raid6 syndrome) from a series of source buffers
83pq_val validate that a p and or q buffer are in sync with a given series of83pq_val validate that a p and or q buffer are in sync with a given series of
84 sources84 sources
85datap (raid6_datap_recov) recover a raid6 data block and the p block85datap (raid6_recov_datap) recover a raid6 data block and the p block
86 from the given sources86 from the given sources
872data (raid6_2data_recov) recover 2 raid6 data blocks from the given872data (raid6_recov_2data) recover 2 raid6 data blocks from the given
88 sources88 sources
89======== ====================================================================89======== ====================================================================
90 90
Documentation/crypto/krb5.rst+13−4
@@ -158,13 +158,22 @@ returned. · 157 unmodified lines
158When a message has been received, the location and size of the data with the158When a message has been received, the location and size of the data with the
159message can be determined by calling::159message can be determined by calling::
160 160
161 void crypto_krb5_where_is_the_data(const struct krb5_enctype *krb5,161 int crypto_krb5_where_is_the_data(const struct krb5_enctype *krb5,
162 enum krb5_crypto_mode mode,162 enum krb5_crypto_mode mode,
163 size_t *_offset, size_t *_len);163 size_t *_offset, size_t *_len);
164 164
165The caller provides the offset and length of the message to the function, which165The caller provides the offset and length of the message to the function, which
166then alters those values to indicate the region containing the data (plus any166then alters those values to indicate the region containing the data (plus any
167padding). It is up to the caller to determine how much padding there is.167padding). It is up to the caller to determine how much padding there is. The
168function returns an error if the length is too small or if the mode is
169unsupported. An additional function::
170
171 int crypto_krb5_check_data_len(const struct krb5_enctype *krb5,
172 enum krb5_crypto_mode mode,
173 size_t len, size_t min_content);
174
175is provided to just do a basic check that the decrypted/verified message would
176have a sufficient minimum payload.
168 177
169Preparation Functions178Preparation Functions
170---------------------179---------------------
Documentation/crypto/userspace-if.rst+87−48
@@ -4,26 +4,88 @@ User Space Interface · 3 unmodified lines
4Introduction4Introduction
5------------5------------
6 6
7The concepts of the kernel crypto API visible to kernel space is fully7AF_ALG provides unprivileged userspace programs access to arbitrary hash,
8applicable to the user space interface as well. Therefore, the kernel8symmetric cipher, AEAD, and RNG algorithms that are implemented in kernel-mode
9crypto API high level discussion for the in-kernel use cases applies9code.
10here as well.10
11 11AF_ALG is insecure and is deprecated. Originally added to the kernel in 2010,
12The major difference, however, is that user space can only act as a12most kernel developers now consider it to be a mistake. Support for hardware
13consumer and never as a provider of a transformation or cipher13accelerators, which was the original purpose of AF_ALG, has been removed.
14algorithm.14
15 15AF_ALG continues to be supported only for backwards compatibility. On systems
16The following covers the user space interface exported by the kernel16where no programs using AF_ALG remain, the support for it should be disabled by
17crypto API. A working example of this description is libkcapi that can17disabling ``CONFIG_CRYPTO_USER_API_*``.
18be obtained from [1]. That library can be used by user space18
19applications that require cryptographic services from the kernel.19Deprecation
20 20-----------
21Some details of the in-kernel kernel crypto API aspects do not apply to21
22user space, however. This includes the difference between synchronous22AF_ALG was originally intended to provide userspace programs access to crypto
23and asynchronous invocations. The user space API call is fully23accelerators that they wouldn't otherwise have access to.
24synchronous.24
25 25However, that capability turned out to not be useful on very many systems. More
26[1] https://www.chronox.de/libkcapi/index.html26significantly, the actual implementation exposes a vastly greater amount of
27functionality than that. It actually provides access to all software algorithms.
28
29This includes arbitrary compositions of different algorithms created via a
30complex template system, as well as algorithms that only make sense as internal
31implementation details of other algorithms. In the past, it also included full
32zero-copy support, which was difficult for the kernel to implement securely.
33
34Ultimately, these algorithms are just math computations. They use the same
35instructions that userspace programs already have access to, just accessed in a
36much more convoluted and less efficient way.
37
38Indeed, userspace code is nearly always what is being used anyway. These same
39algorithms are widely implemented in userspace crypto libraries.
40
41Even when zero-copy and off-CPU accelerators were supported, AF_ALG was usually
42much slower than optimized software cryptography in userspace. This was
43especially true for the small message sizes usually seen in performance-critical
44workloads. While it was possible to demonstrate performance wins for hashing
45large files on embedded devices, it is hard to imagine a situation where this
46would be performance-critical.
47
48Nowadays, AF_ALG no longer supports zero-copy or off-CPU accelerators.
49Therefore, it is *always* slower than an optimized userspace implementation,
50even for large messages. The only possible advantage left is that it avoids
51duplicating code between kernel and userspace. However, userspace
52implementations, especially hardware-accelerated ones, do not need to be large.
53Just because OpenSSL is huge does not mean that all userspace cryptography
54libraries are.
55
56Meanwhile, AF_ALG hasn't been withstanding modern vulnerability discovery tools
57such as syzbot and large language models. It receives a steady stream of CVEs.
58Some of the examples include:
59
60- CVE-2026-31677
61- CVE-2026-31431 (https://copy.fail)
62- CVE-2025-38079
63- CVE-2025-37808
64- CVE-2024-26824
65- CVE-2022-48781
66- CVE-2019-8912
67- CVE-2018-14619
68- CVE-2017-18075
69- CVE-2017-17806
70- CVE-2017-17805
71- CVE-2016-10147
72- CVE-2015-8970
73- CVE-2015-3331
74- CVE-2014-9644
75- CVE-2013-7421
76- CVE-2011-4081
77
78Hardware accelerator drivers are frequently buggy. To reduce attack surface,
79AF_ALG now only provides access to algorithms implemented in software. This
80means that AF_ALG no longer fulfills its original purpose.
81
82It is recommended that, whenever possible, userspace programs be migrated to
83userspace crypto code (which again, is what is normally used anyway) and
84``CONFIG_CRYPTO_USER_API_*`` be disabled. On systems that use SELinux, SELinux
85can also be used to restrict the use of AF_ALG to trusted programs.
86
87The remainder of this documentation provides the historical documentation for
88the deprecated AF_ALG interface.
27 89
28User Space API General Remarks90User Space API General Remarks
29------------------------------91------------------------------
@@ -297,7 +359,7 @@ follows: · 267 unmodified lines
297 struct sockaddr_alg sa = {359 struct sockaddr_alg sa = {
298 .salg_family = AF_ALG,360 .salg_family = AF_ALG,
299 .salg_type = "rng", /* this selects the random number generator */361 .salg_type = "rng", /* this selects the random number generator */
300 .salg_name = "drbg_nopr_sha256" /* this is the RNG name */362 .salg_name = "stdrng" /* this is the RNG name */
301 };363 };
302 364
303 365
@@ -327,33 +389,10 @@ CRYPTO_USER_API_RNG_CAVP option: · 23 unmodified lines
327Zero-Copy Interface389Zero-Copy Interface
328-------------------390-------------------
329 391
330In addition to the send/write/read/recv system call family, the AF_ALG392AF_ALG used to have zero-copy support, but it was removed due to it being a
331interface can be accessed with the zero-copy interface of393frequent source of vulnerabilities. For backwards compatibility the splice()
332splice/vmsplice. As the name indicates, the kernel tries to avoid a copy394and sendfile() system calls are still supported, but the kernel will make an
333operation into kernel space.395internal copy of the data before passing it to the crypto code.
334
335The zero-copy operation requires data to be aligned at the page
336boundary. Non-aligned data can be used as well, but may require more
337operations of the kernel which would defeat the speed gains obtained
338from the zero-copy interface.
339
340The system-inherent limit for the size of one zero-copy operation is 16
341pages. If more data is to be sent to AF_ALG, user space must slice the
342input into segments with a maximum size of 16 pages.
343
344Zero-copy can be used with the following code example (a complete
345working example is provided with libkcapi):
346
347::
348
349 int pipes[2];
350
351 pipe(pipes);
352 /* input data in iov */
353 vmsplice(pipes[1], iov, iovlen, SPLICE_F_GIFT);
354 /* opfd is the file descriptor returned from accept() system call */
355 splice(pipes[0], NULL, opfd, NULL, ret, 0);
356 read(opfd, out, outlen);
357 396
358 397
359Setsockopt Interface398Setsockopt Interface
Documentation/dev-tools/autofdo.rst+41−0
@@ -61,6 +61,9 @@ process consists of the following steps: · 60 unmodified lines
61 the AutoFDO profile via offline tools.61 the AutoFDO profile via offline tools.
62 62
63The support requires a Clang compiler LLVM 17 or later.63The support requires a Clang compiler LLVM 17 or later.
64Current supported architectures include x86/x86_64 (via LBR) and
65arm64 (via SPE or ETM).
66
64 67
65Preparation68Preparation
66===========69===========
@@ -141,6 +144,35 @@ Here is an example workflow for AutoFDO kernel: · 74 unmodified lines
141 144
142 $ perf record --pfm-events RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>145 $ perf record --pfm-events RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
143 146
147 - For arm64 with SPE:
148
149 There are a few kernel features that must be enabled to collect SPE profiles on Arm.
150 Below is a list of the required features:
151
152 - CONFIG_ARM_SPE_PMU=y
153 - CONFIG_PID_IN_CONTEXTIDR=y
154 - kpti=off
155
156 Use the following command to generate SPE perf data file::
157
158 $ perf record -e ' arm_spe_0/branch_filter=1,load_filter=0,store_filter=0/' -a -c <count> -N --no-switch-events -o <perf_file> -- <loadtest>
159
160 - For arm64 with ETM trace:
161
162 Follow the instructions in `Linaro OpenCSD document
163 <https://github.com/Linaro/OpenCSD/blob/master/decoder/tests/auto-fdo/autofdo.md>`_
164 to record ETM traces for AutoFDO::
165
166 $ perf record -e cs_etm/@tmc_etr0/k -a -o <etm_perf_file> -- <loadtest>
167 $ perf inject -i <etm_perf_file> -o <perf_file> --itrace=i500009il
168
169 For ARM platforms running Android, follow the instructions in `Android simpleperf
170 document <https://android.googlesource.com/kernel/common/+/refs/heads/android-mainline/gki/aarch64/afdo>`_
171 to record ETM traces for AutoFDO::
172
173 $ simpleperf record -e cs-etm:k -a -o <etm_perf_file> -- <loadtest>
174 $ simpleperf inject -i <etm_perf_file> -o <text_perf_file> --symdir <vmlinux_dir>
175
1444) (Optional) Download the raw perf file to the host machine.1764) (Optional) Download the raw perf file to the host machine.
145 177
1465) To generate an AutoFDO profile, two offline tools are available:1785) To generate an AutoFDO profile, two offline tools are available:
@@ -162,6 +194,15 @@ Here is an example workflow for AutoFDO kernel: · 15 unmodified lines
162 194
163 $ llvm-profdata merge -o <profile_file> <profile_1> <profile_2> ... <profile_n>195 $ llvm-profdata merge -o <profile_file> <profile_1> <profile_2> ... <profile_n>
164 196
197 For arm64 SPE, use the following command::
198
199 $ create_llvm_prof --binary=<vmlinux> --profile=<perf_file> --profiler=perf_spe --format=extbinary --out=<profile_file>
200
201 For arm64 ETM, use the following command::
202
203 $ create_llvm_prof --binary=<vmlinux> --profile=<text_perf_file> --profiler=text -format=extbinary -out=<profile_file>
204
205
1656) Rebuild the kernel using the AutoFDO profile file with the same config as step 1,2066) Rebuild the kernel using the AutoFDO profile file with the same config as step 1,
166 (Note CONFIG_AUTOFDO_CLANG needs to be enabled)::207 (Note CONFIG_AUTOFDO_CLANG needs to be enabled)::
167 208
Documentation/dev-tools/checkpatch.rst+14−0
@@ -184,6 +184,13 @@ Available options: · 183 unmodified lines
184 Override checking of perl version. Runtime errors may be encountered after184 Override checking of perl version. Runtime errors may be encountered after
185 enabling this flag if the perl version does not meet the minimum specified.185 enabling this flag if the perl version does not meet the minimum specified.
186 186
187 - --spdx-cxx-comments
188
189 Don't force C comments ``/* */`` for SPDX license (required by old
190 toolchains), allow also C++ comments ``//``.
191
192 NOTE: it should *not* be used for Linux mainline.
193
187 - --codespell194 - --codespell
188 195
189 Use the codespell dictionary for checking spelling errors.196 Use the codespell dictionary for checking spelling errors.
@@ -210,6 +217,13 @@ Available options: · 20 unmodified lines
210 217
211 Display the help text.218 Display the help text.
212 219
220Configuration file
221==================
222
223Default configuration options can be stored in ``.checkpatch.conf``, search
224path: ``.:$HOME:.scripts`` or in a directory specified by ``$CHECKPATCH_CONFIG_DIR``
225environment variable (falling back to the default search path).
226
213Message Levels227Message Levels
214==============228==============
215 229
Documentation/dev-tools/context-analysis.rst+1−1
@@ -17,7 +17,7 @@ features. To enable for Clang, configure the kernel with:: · 16 unmodified lines
17 17
18 CONFIG_WARN_CONTEXT_ANALYSIS=y18 CONFIG_WARN_CONTEXT_ANALYSIS=y
19 19
20The feature requires Clang 22 or later.20The feature requires Clang 23 or later.
21 21
22The analysis is *opt-in by default*, and requires declaring which modules and22The analysis is *opt-in by default*, and requires declaring which modules and
23subsystems should be analyzed in the respective `Makefile`::23subsystems should be analyzed in the respective `Makefile`::
Documentation/dev-tools/kcov.rst+6−0
@@ -237,6 +237,9 @@ Both ``kcov_remote_start`` and ``kcov_remote_stop`` annotations and the · 236 unmodified lines
237collection sections. The way a handle is used depends on the context where the237collection sections. The way a handle is used depends on the context where the
238matching code section executes.238matching code section executes.
239 239
240A thread can use two separate KCOV instances to collect remote coverage and
241normal coverage at the same time.
242
240KCOV supports collecting remote coverage from the following contexts:243KCOV supports collecting remote coverage from the following contexts:
241 244
2421. Global kernel background tasks. These are the tasks that are spawned during2451. Global kernel background tasks. These are the tasks that are spawned during
@@ -262,6 +265,9 @@ gets saved to the ``kcov_handle`` field in the current ``task_struct`` and · 19 unmodified lines
262needs to be passed to the newly spawned local tasks via custom kernel code265needs to be passed to the newly spawned local tasks via custom kernel code
263modifications. Those tasks should in turn use the passed handle in their266modifications. Those tasks should in turn use the passed handle in their
264``kcov_remote_start`` and ``kcov_remote_stop`` annotations.267``kcov_remote_start`` and ``kcov_remote_stop`` annotations.
268In the kernel, common handles are wrapped in a ``kcov_common_handle_id``, which
269consumes no space in builds without ``CONFIG_KCOV``; subsystems that integrate
270with this mechanism should not need to use any ``#ifdef CONFIG_KCOV`` or such.
265 271
266KCOV follows a predefined format for both global and common handles. Each272KCOV follows a predefined format for both global and common handles. Each
267handle is a ``u64`` integer. Currently, only the one top and the lower 4 bytes273handle is a ``u64`` integer. Currently, only the one top and the lower 4 bytes
Documentation/dev-tools/kselftest.rst+12−5
@@ -15,11 +15,6 @@ able to run that test on an older kernel. Hence, it is important to keep · 14 unmodified lines
15code that can still test an older kernel and make sure it skips the test15code that can still test an older kernel and make sure it skips the test
16gracefully on newer releases.16gracefully on newer releases.
17 17
18You can find additional information on Kselftest framework, how to
19write new tests using the framework on Kselftest wiki:
20
21https://kselftest.wiki.kernel.org/
22
23On some systems, hot-plug tests could hang forever waiting for cpu and18On some systems, hot-plug tests could hang forever waiting for cpu and
24memory to be ready to be offlined. A special hot-plug target is created19memory to be ready to be offlined. A special hot-plug target is created
25to run the full range of hot-plug tests. In default mode, hot-plug tests run20to run the full range of hot-plug tests. In default mode, hot-plug tests run
@@ -126,6 +121,18 @@ dedicated skiplist:: · 100 unmodified lines
126See the top-level tools/testing/selftests/Makefile for the list of all121See the top-level tools/testing/selftests/Makefile for the list of all
127possible targets.122possible targets.
128 123
124Requiring all targets to build successfully
125===========================================
126
127By default, the build succeeds as long as at least one target builds
128without error. Set ``FORCE_TARGETS=1`` to instead require every target to
129build successfully; make will abort as soon as any target fails::
130
131 $ make -C tools/testing/selftests FORCE_TARGETS=1
132
133This applies to both the ``all`` and ``install`` targets and is useful in
134CI environments where a silent partial build would be misleading.
135
129Running the full range hotplug selftests136Running the full range hotplug selftests
130========================================137========================================
131 138
Documentation/dev-tools/kunit/run_wrapper.rst+3−0
@@ -324,6 +324,9 @@ command line arguments: · 323 unmodified lines
324- ``--json``: If set, stores the test results in a JSON format and prints to `stdout` or324- ``--json``: If set, stores the test results in a JSON format and prints to `stdout` or
325 saves to a file if a filename is specified.325 saves to a file if a filename is specified.
326 326
327- ``--junit``: If set, stores the test results in JUnit XML format and prints to `stdout` or
328 saves to a file if a filename is specified.
329
327- ``--filter``: Specifies filters on test attributes, for example, ``speed!=slow``.330- ``--filter``: Specifies filters on test attributes, for example, ``speed!=slow``.
328 Multiple filters can be used by wrapping input in quotes and separating filters331 Multiple filters can be used by wrapping input in quotes and separating filters
329 by commas. Example: ``--filter "speed>slow, module=example"``.332 by commas. Example: ``--filter "speed>slow, module=example"``.
Documentation/dev-tools/kunit/usage.rst+45−1
@@ -157,6 +157,50 @@ Alternatively, one can take full control over the error message by using · 156 unmodified lines
157 if (some_setup_function())157 if (some_setup_function())
158 KUNIT_FAIL(test, "Failed to setup thing for testing");158 KUNIT_FAIL(test, "Failed to setup thing for testing");
159 159
160Suppressing warning backtraces
161------------------------------
162
163Some unit tests trigger warning backtraces either intentionally or as a side
164effect. Such backtraces are normally undesirable since they distract from
165the actual test and may result in the impression that there is a problem.
166
167Backtraces can be suppressed with **task-scoped suppression**: while
168suppression is active on the current task, the backtrace and stack dump from
169``WARN*()``, ``WARN_ON*()``, and related macros on that task are suppressed.
170Two API forms are available.
171
172- Scoped suppression is the simplest form. Wrap the code that triggers
173 warnings in a ``kunit_warning_suppress()`` block:
174
175.. code-block:: c
176
177 static void some_test(struct kunit *test)
178 {
179 kunit_warning_suppress(test) {
180 trigger_backtrace();
181 KUNIT_EXPECT_SUPPRESSED_WARNING_COUNT(test, 1);
182 }
183 }
184
185.. note::
186 The warning count must be checked inside the block; the suppression handle
187 is not accessible after the block exits.
188
189- Direct functions return an explicit handle pointer. Use them when the handle
190 needs to be retained or passed across helper functions:
191
192.. code-block:: c
193
194 static void some_test(struct kunit *test)
195 {
196 struct kunit_suppressed_warning *w;
197
198 w = kunit_start_suppress_warning(test);
199 trigger_backtrace();
200 kunit_end_suppress_warning(test, w);
201
202 KUNIT_EXPECT_EQ(test, kunit_suppressed_warning_count(w), 1);
203 }
160 204
161Test Suites205Test Suites
162~~~~~~~~~~~206~~~~~~~~~~~
@@ -1211,4 +1255,4 @@ For example: · 1048 unmodified lines
1211 dev_managed_string = devm_kstrdup(fake_device, "Hello, World!");1255 dev_managed_string = devm_kstrdup(fake_device, "Hello, World!");
1212 1256
1213 // Everything is cleaned up automatically when the test ends.1257 // Everything is cleaned up automatically when the test ends.
1214 }1258 }
Documentation/dev-tools/propeller.rst+37−12
@@ -28,8 +28,10 @@ A few important notes about adopting Propeller optimization: · 27 unmodified lines
28 and the linker(ld.lld).28 and the linker(ld.lld).
29 29
30#. In addition to LLVM toolchain, Propeller requires a profiling30#. In addition to LLVM toolchain, Propeller requires a profiling
31 conversion tool: https://github.com/google/autofdo with a release31 conversion tool: https://github.com/google/llvm-propeller.
32 after v0.30.1: https://github.com/google/autofdo/releases/tag/v0.30.1.32
33Current supported architectures include x86/X86_64 (via LBR),
34and arm64 (via SPE).
33 35
34The Propeller optimization process involves the following steps:36The Propeller optimization process involves the following steps:
35 37
@@ -124,17 +126,30 @@ Here is an example workflow for building an AutoFDO+Propeller kernel: · 88 unmodified lines
124 126
125 $ perf record --pfm-event RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>127 $ perf record --pfm-event RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
126 128
127 Note you can repeat the above steps to collect multiple <perf_file>s.129 - For arm64 with SPE::
130 There are a few kernel features that must be enabled to collect SPE profiles on Arm.
131 Below is a list of the required features:
132
133 - CONFIG_ARM_SPE_PMU=y
134 - CONFIG_PID_IN_CONTEXTIDR=y
135 - kpti=off
136
137 Use the following command to generate SPE perf data file::
138
139 $ perf record -e 'arm_spe_0/branch_filter=1,load_filter=0,store_filter=0/' -a -N -c <count> --no-switch-events -o <perf_file> -- <loadtest>
140
141 Note you can repeat the above steps to collect multiple <perf_file>s.
128 142
1294) (Optional) Download the raw perf file(s) to the host machine.1434) (Optional) Download the raw perf file(s) to the host machine.
130 144
1315) Use the create_llvm_prof tool (https://github.com/google/autofdo) to1455) Use the generate_propeller_profiles tool (https://github.com/google/llvm-propeller) to
132 generate Propeller profile. ::146 generate Propeller profile. ::
133 147
134 $ create_llvm_prof --binary=<vmlinux> --profile=<perf_file>148 $ generate_propeller_profiles \
135 --format=propeller --propeller_output_module_name149 --binary=<vmlinux> --profile=<perf_file> \
136 --out=<propeller_profile_prefix>_cc_profile.txt150 --format=propeller --propeller_output_module_name \
137 --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt151 --out=<propeller_profile_prefix>_cc_profile.txt \
152 --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
138 153
139 "<propeller_profile_prefix>" can be something like "/home/user/dir/any_string".154 "<propeller_profile_prefix>" can be something like "/home/user/dir/any_string".
140 155
@@ -146,10 +161,20 @@ Here is an example workflow for building an AutoFDO+Propeller kernel: · 5 unmodified lines
146 you can create a temp list file "<perf_file_list>" with each line161 you can create a temp list file "<perf_file_list>" with each line
147 containing one perf file name and run::162 containing one perf file name and run::
148 163
149 $ create_llvm_prof --binary=<vmlinux> --profile=@<perf_file_list>164 $ generate_propeller_profiles \
150 --format=propeller --propeller_output_module_name165 --binary=<vmlinux> --profile=@<perf_file_list> \
151 --out=<propeller_profile_prefix>_cc_profile.txt166 --format=propeller --propeller_output_module_name \
152 --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt167 --out=<propeller_profile_prefix>_cc_profile.txt \
168 --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
169
170 For arm64 SPE, add the option '--profiler=perf_spe', like::
171
172 $ generate_propeller_profiles \
173 --binary=<vmlinux> --profile=<perf_file> \
174 --profiler=perf_spe \
175 --format=propeller --propeller_output_module_name \
176 --out=<propeller_profile_prefix>_cc_profile.txt \
177 --propeller_symorder=<propeller_profile_prefix>_ld_profile.txt
153 178
1546) Rebuild the kernel using the AutoFDO and Propeller1796) Rebuild the kernel using the AutoFDO and Propeller
155 profiles. ::180 profiles. ::
Documentation/devicetree/bindings/Makefile+17−2
@@ -46,6 +46,18 @@ quiet_cmd_chk_bindings = CHKDT $(src) · 45 unmodified lines
46 xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(src)) \46 xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(src)) \
47 && touch $@ || true47 && touch $@ || true
48 48
49DT_CHK_STYLE = $(srctree)/scripts/dtc/dt-check-style
50
51# Feed the file list to the checker via @argfile in a single Python
52# process so the ruamel.yaml import is paid once. scripts/jobserver-exec
53# claims slots from the GNU make jobserver and exposes the count via
54# $PARALLELISM, which dt-check-style picks up to size its worker pool.
55quiet_cmd_chk_style = STYLE $(src)
56 cmd_chk_style = f=$$(mktemp) && $(find_cmd) > $$f && \
57 $(PYTHON3) $(srctree)/scripts/jobserver-exec \
58 $(PYTHON3) $(DT_CHK_STYLE) @$$f \
59 && touch $@ || true; rm -f $$f
60
49quiet_cmd_mk_schema = SCHEMA $@61quiet_cmd_mk_schema = SCHEMA $@
50 cmd_mk_schema = f=$$(mktemp) ; \62 cmd_mk_schema = f=$$(mktemp) ; \
51 $(find_all_cmd) > $$f ; \63 $(find_all_cmd) > $$f ; \
@@ -62,13 +74,16 @@ override DTC_FLAGS := \ · 10 unmodified lines
62$(obj)/processed-schema.json: $(DT_DOCS) check_dtschema_version FORCE74$(obj)/processed-schema.json: $(DT_DOCS) check_dtschema_version FORCE
63 $(call if_changed,mk_schema)75 $(call if_changed,mk_schema)
64 76
65targets += .dt-binding.checked .yamllint.checked77targets += .dt-binding.checked .yamllint.checked .dt-style.checked
66$(obj)/.yamllint.checked: $(DT_DOCS) $(src)/.yamllint FORCE78$(obj)/.yamllint.checked: $(DT_DOCS) $(src)/.yamllint FORCE
67 $(if $(DT_SCHEMA_LINT),$(call if_changed,yamllint),)79 $(if $(DT_SCHEMA_LINT),$(call if_changed,yamllint),)
68 80
69$(obj)/.dt-binding.checked: $(DT_DOCS) FORCE81$(obj)/.dt-binding.checked: $(DT_DOCS) FORCE
70 $(call if_changed,chk_bindings)82 $(call if_changed,chk_bindings)
71 83
84$(obj)/.dt-style.checked: $(DT_DOCS) FORCE
85 $(call if_changed,chk_style)
86
72always-y += processed-schema.json87always-y += processed-schema.json
73targets += $(patsubst $(obj)/%,%, $(CHK_DT_EXAMPLES))88targets += $(patsubst $(obj)/%,%, $(CHK_DT_EXAMPLES))
74targets += $(patsubst $(obj)/%.dtb,%.dts, $(CHK_DT_EXAMPLES))89targets += $(patsubst $(obj)/%.dtb,%.dts, $(CHK_DT_EXAMPLES))
@@ -82,7 +97,7 @@ dt_compatible_check: $(obj)/processed-schema.json · 7 unmodified lines
82 $(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $<97 $(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $<
83 98
84PHONY += dt_binding_check_one99PHONY += dt_binding_check_one
85dt_binding_check_one: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked100dt_binding_check_one: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked $(obj)/.dt-style.checked
86 101
87PHONY += dt_binding_check102PHONY += dt_binding_check
88dt_binding_check: dt_binding_check_one $(CHK_DT_EXAMPLES)103dt_binding_check: dt_binding_check_one $(CHK_DT_EXAMPLES)
Documentation/devicetree/bindings/arm/altera.yaml+7−0
@@ -111,10 +111,17 @@ properties: · 110 unmodified lines
111 - enum:111 - enum:
112 - intel,socfpga-agilex5-socdk112 - intel,socfpga-agilex5-socdk
113 - intel,socfpga-agilex5-socdk-013b113 - intel,socfpga-agilex5-socdk-013b
114 - intel,socfpga-agilex5-socdk-debug
114 - intel,socfpga-agilex5-socdk-modular115 - intel,socfpga-agilex5-socdk-modular
115 - intel,socfpga-agilex5-socdk-nand116 - intel,socfpga-agilex5-socdk-nand
116 - const: intel,socfpga-agilex5117 - const: intel,socfpga-agilex5
117 118
119 - description: Agilex7m boards
120 items:
121 - enum:
122 - altr,socfpga-agilex7m-socdk
123 - const: altr,socfpga-agilex7m
124
118 - description: SoCFPGA VT125 - description: SoCFPGA VT
119 items:126 items:
120 - const: altr,socfpga-vt127 - const: altr,socfpga-vt
Documentation/devicetree/bindings/arm/amlogic.yaml+6−0
@@ -234,6 +234,12 @@ properties: · 233 unmodified lines
234 - amlogic,av400234 - amlogic,av400
235 - const: amlogic,a5235 - const: amlogic,a5
236 236
237 - description: Boards with the Amlogic A9 A311Y3 SoC
238 items:
239 - enum:
240 - amlogic,by401
241 - const: amlogic,a9
242
237 - description: Boards with the Amlogic C3 C302X/C308L SoC243 - description: Boards with the Amlogic C3 C302X/C308L SoC
238 items:244 items:
239 - enum:245 - enum:
Documentation/devicetree/bindings/arm/apple.yaml+18−0
@@ -96,6 +96,13 @@ description: | · 95 unmodified lines
96 - MacBook Pro (13-inch, M2, 2022)96 - MacBook Pro (13-inch, M2, 2022)
97 - Mac mini (M2, 2023)97 - Mac mini (M2, 2023)
98 98
99 Devices based on the "M3" SoC:
100
101 - MacBook Air (13-inch, M3, 2024)
102 - MacBook Air (15-inch, M3, 2024)
103 - MacBook Pro (14-inch, M3, 2023)
104 - iMac (24-inch, M3, 2023)
105
99 Devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:106 Devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:
100 107
101 - MacBook Pro (14-inch, M1 Pro, 2021)108 - MacBook Pro (14-inch, M1 Pro, 2021)
@@ -297,6 +304,17 @@ properties: · 195 unmodified lines
297 - const: apple,t8112304 - const: apple,t8112
298 - const: apple,arm-platform305 - const: apple,arm-platform
299 306
307 - description: Apple M3 SoC based platforms
308 items:
309 - enum:
310 - apple,j433 # iMac (24-inch, 2x USB-C, M3, 2023)
311 - apple,j434 # iMac (24-inch, 4x USB-C, M3, 2023)
312 - apple,j504 # MacBook Pro (14-inch, M3, 2023)
313 - apple,j613 # MacBook Air (13-inch, M3, 2024)
314 - apple,j615 # MacBook Air (15-inch, M3, 2024)
315 - const: apple,t8122
316 - const: apple,arm-platform
317
300 - description: Apple M1 Pro SoC based platforms318 - description: Apple M1 Pro SoC based platforms
301 items:319 items:
302 - enum:320 - enum:
Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml+3−1
@@ -36,7 +36,9 @@ properties: · 35 unmodified lines
36 - const: syscon36 - const: syscon
37 - const: simple-mfd37 - const: simple-mfd
38 - items:38 - items:
39 - const: apple,t6020-pmgr39 - enum:
40 - apple,t6020-pmgr
41 - apple,t8122-pmgr
40 - const: apple,t8103-pmgr42 - const: apple,t8103-pmgr
41 - const: syscon43 - const: syscon
42 - const: simple-mfd44 - const: simple-mfd
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml+8−0
@@ -95,6 +95,8 @@ properties: · 94 unmodified lines
95 - facebook,greatlakes-bmc95 - facebook,greatlakes-bmc
96 - facebook,harma-bmc96 - facebook,harma-bmc
97 - facebook,minerva-cmc97 - facebook,minerva-cmc
98 - facebook,rainiera6-bmc
99 - facebook,sanmiguel-bmc
98 - facebook,santabarbara-bmc100 - facebook,santabarbara-bmc
99 - facebook,yosemite4-bmc101 - facebook,yosemite4-bmc
100 - facebook,yosemite5-bmc102 - facebook,yosemite5-bmc
@@ -117,4 +119,10 @@ properties: · 16 unmodified lines
117 - ufispace,ncplite-bmc119 - ufispace,ncplite-bmc
118 - const: aspeed,ast2600120 - const: aspeed,ast2600
119 121
122 - description: AST2700 based boards
123 items:
124 - enum:
125 - aspeed,ast2700-evb
126 - const: aspeed,ast2700
127
120additionalProperties: true128additionalProperties: true
Documentation/devicetree/bindings/arm/cpus.yaml+1−0
@@ -223,6 +223,7 @@ properties: · 222 unmodified lines
223 - qcom,oryon-1-2223 - qcom,oryon-1-2
224 - qcom,oryon-1-3224 - qcom,oryon-1-3
225 - qcom,oryon-1-4225 - qcom,oryon-1-4
226 - qcom,oryon-1-5
226 - qcom,oryon-2-1227 - qcom,oryon-2-1
227 - qcom,oryon-2-2228 - qcom,oryon-2-2
228 - qcom,oryon-2-3229 - qcom,oryon-2-3
Documentation/devicetree/bindings/arm/fsl.yaml+44−1
@@ -688,7 +688,7 @@ properties: · 687 unmodified lines
688 - const: phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL688 - const: phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL
689 - const: fsl,imx6ul689 - const: fsl,imx6ul
690 690
691 - description: i.MX6UL Variscite VAR-SOM-MX6 Boards691 - description: i.MX6UL Variscite VAR-SOM-6UL Boards
692 items:692 items:
693 - const: variscite,mx6ulconcerto693 - const: variscite,mx6ulconcerto
694 - const: variscite,var-som-imx6ul694 - const: variscite,var-som-imx6ul
@@ -797,6 +797,12 @@ properties: · 102 unmodified lines
797 - const: phytec,imx6ull-pcl063 # PHYTEC phyCORE-i.MX 6ULL797 - const: phytec,imx6ull-pcl063 # PHYTEC phyCORE-i.MX 6ULL
798 - const: fsl,imx6ull798 - const: fsl,imx6ull
799 799
800 - description: i.MX6ULL Variscite VAR-SOM-6UL Boards
801 items:
802 - const: variscite,mx6ullconcerto # Variscite VAR-SOM-6UL dev kit board
803 - const: variscite,var-som-imx6ull # Variscite VAR-SOM-6UL SoM (6ULL variant)
804 - const: fsl,imx6ull
805
800 - description: i.MX6ULL Boards with Toradex Colibri iMX6ULL Modules806 - description: i.MX6ULL Boards with Toradex Colibri iMX6ULL Modules
801 items:807 items:
802 - enum:808 - enum:
@@ -1025,6 +1031,7 @@ properties: · 222 unmodified lines
1025 - toradex,verdin-imx8mm-nonwifi-ivy # Verdin iMX8M Mini Module on Ivy1031 - toradex,verdin-imx8mm-nonwifi-ivy # Verdin iMX8M Mini Module on Ivy
1026 - toradex,verdin-imx8mm-nonwifi-mallow # Verdin iMX8M Mini Module on Mallow1032 - toradex,verdin-imx8mm-nonwifi-mallow # Verdin iMX8M Mini Module on Mallow
1027 - toradex,verdin-imx8mm-nonwifi-yavia # Verdin iMX8M Mini Module on Yavia1033 - toradex,verdin-imx8mm-nonwifi-yavia # Verdin iMX8M Mini Module on Yavia
1034 - toradex,verdin-imx8mm-nonwifi-zinnia # Verdin iMX8M Mini Module on Zinnia
1028 - const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT1035 - const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT
1029 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module1036 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
1030 - const: fsl,imx8mm1037 - const: fsl,imx8mm
@@ -1037,6 +1044,7 @@ properties: · 6 unmodified lines
1037 - toradex,verdin-imx8mm-wifi-ivy # Verdin iMX8M Mini Wi-Fi / BT Module on Ivy1044 - toradex,verdin-imx8mm-wifi-ivy # Verdin iMX8M Mini Wi-Fi / BT Module on Ivy
1038 - toradex,verdin-imx8mm-wifi-mallow # Verdin iMX8M Mini Wi-Fi / BT Module on Mallow1045 - toradex,verdin-imx8mm-wifi-mallow # Verdin iMX8M Mini Wi-Fi / BT Module on Mallow
1039 - toradex,verdin-imx8mm-wifi-yavia # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia1046 - toradex,verdin-imx8mm-wifi-yavia # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia
1047 - toradex,verdin-imx8mm-wifi-zinnia # Verdin iMX8M Mini Wi-Fi / BT Module on Zinnia
1040 - const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module1048 - const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module
1041 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module1049 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
1042 - const: fsl,imx8mm1050 - const: fsl,imx8mm
@@ -1271,6 +1279,7 @@ properties: · 228 unmodified lines
1271 - toradex,verdin-imx8mp-nonwifi-ivy # Verdin iMX8M Plus Module on Ivy1279 - toradex,verdin-imx8mp-nonwifi-ivy # Verdin iMX8M Plus Module on Ivy
1272 - toradex,verdin-imx8mp-nonwifi-mallow # Verdin iMX8M Plus Module on Mallow1280 - toradex,verdin-imx8mp-nonwifi-mallow # Verdin iMX8M Plus Module on Mallow
1273 - toradex,verdin-imx8mp-nonwifi-yavia # Verdin iMX8M Plus Module on Yavia1281 - toradex,verdin-imx8mp-nonwifi-yavia # Verdin iMX8M Plus Module on Yavia
1282 - toradex,verdin-imx8mp-nonwifi-zinnia # Verdin iMX8M Plus Module on Zinnia
1274 - const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT1283 - const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT
1275 - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module1284 - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
1276 - const: fsl,imx8mp1285 - const: fsl,imx8mp
@@ -1283,6 +1292,7 @@ properties: · 6 unmodified lines
1283 - toradex,verdin-imx8mp-wifi-ivy # Verdin iMX8M Plus Wi-Fi / BT Module on Ivy1292 - toradex,verdin-imx8mp-wifi-ivy # Verdin iMX8M Plus Wi-Fi / BT Module on Ivy
1284 - toradex,verdin-imx8mp-wifi-mallow # Verdin iMX8M Plus Wi-Fi / BT Module on Mallow1293 - toradex,verdin-imx8mp-wifi-mallow # Verdin iMX8M Plus Wi-Fi / BT Module on Mallow
1285 - toradex,verdin-imx8mp-wifi-yavia # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia1294 - toradex,verdin-imx8mp-wifi-yavia # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia
1295 - toradex,verdin-imx8mp-wifi-zinnia # Verdin iMX8M Plus Wi-Fi / BT Module on Zinnia
1286 - const: toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Module1296 - const: toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Module
1287 - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module1297 - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
1288 - const: fsl,imx8mp1298 - const: fsl,imx8mp
@@ -1394,6 +1404,13 @@ properties: · 105 unmodified lines
1394 - fsl,imx8dxl-evk # i.MX8DXL EVK Board1404 - fsl,imx8dxl-evk # i.MX8DXL EVK Board
1395 - const: fsl,imx8dxl1405 - const: fsl,imx8dxl
1396 1406
1407 - description: SolidRun i.MX8DXL SoM based boards
1408 items:
1409 - enum:
1410 - solidrun,imx8dxl-hummingboard-telematics # SolidRun i.MX8DXL SoM EVK Board
1411 - const: solidrun,imx8dxl-sr-som
1412 - const: fsl,imx8dxl
1413
1397 - description: i.MX8QXP/i.MX8DX Boards with Toradex Colibri iMX8X Modules1414 - description: i.MX8QXP/i.MX8DX Boards with Toradex Colibri iMX8X Modules
1398 items:1415 items:
1399 - enum:1416 - enum:
@@ -1458,6 +1475,7 @@ properties: · 58 unmodified lines
1458 - description: i.MX91 based Boards1475 - description: i.MX91 based Boards
1459 items:1476 items:
1460 - enum:1477 - enum:
1478 - fsl,imx91-9x9-qsb # i.MX91 9x9 QSB Board
1461 - fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board1479 - fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board
1462 - fsl,imx91-11x11-frdm # FRDM i.MX91 Development Board1480 - fsl,imx91-11x11-frdm # FRDM i.MX91 Development Board
1463 - fsl,imx91-11x11-frdm-s # FRDM i.MX91S Development Board1481 - fsl,imx91-11x11-frdm-s # FRDM i.MX91S Development Board
@@ -1482,9 +1500,11 @@ properties: · 18 unmodified lines
1482 - description: i.MX95 based Boards1500 - description: i.MX95 based Boards
1483 items:1501 items:
1484 - enum:1502 - enum:
1503 - fsl,imx95-15x15-ab2 # i.MX95 15x15 Audio Board V2
1485 - fsl,imx95-15x15-evk # i.MX95 15x15 EVK Board1504 - fsl,imx95-15x15-evk # i.MX95 15x15 EVK Board
1486 - fsl,imx95-15x15-frdm # i.MX95 15x15 FRDM Board1505 - fsl,imx95-15x15-frdm # i.MX95 15x15 FRDM Board
1487 - fsl,imx95-19x19-evk # i.MX95 19x19 EVK Board1506 - fsl,imx95-19x19-evk # i.MX95 19x19 EVK Board
1507 - fsl,imx95-19x19-frdm-pro # i.MX95 19x19 FRDM PRO Board
1488 - toradex,verdin-imx95-19x19-evk # i.MX95 Verdin Evaluation Kit (EVK)1508 - toradex,verdin-imx95-19x19-evk # i.MX95 Verdin Evaluation Kit (EVK)
1489 - const: fsl,imx951509 - const: fsl,imx95
1490 1510
@@ -1501,6 +1521,14 @@ properties: · 10 unmodified lines
1501 - const: phytec,imx95-phycore-fpsc # phyCORE-i.MX 95 FPSC1521 - const: phytec,imx95-phycore-fpsc # phyCORE-i.MX 95 FPSC
1502 - const: fsl,imx951522 - const: fsl,imx95
1503 1523
1524 - description: Toradex Boards with Aquila iMX95 Modules
1525 items:
1526 - enum:
1527 - toradex,aquila-imx95-clover # Aquila iMX95 Module on Clover Board
1528 - toradex,aquila-imx95-dev # Aquila iMX95 Module on Aquila Development Board
1529 - const: toradex,aquila-imx95 # Aquila iMX95 Module
1530 - const: fsl,imx95
1531
1504 - description: Toradex Boards with SMARC iMX95 Modules1532 - description: Toradex Boards with SMARC iMX95 Modules
1505 items:1533 items:
1506 - const: toradex,smarc-imx95-dev # Toradex SMARC iMX95 on Toradex SMARC Development Board1534 - const: toradex,smarc-imx95-dev # Toradex SMARC iMX95 on Toradex SMARC Development Board
@@ -1515,6 +1543,7 @@ properties: · 8 unmodified lines
1515 - toradex,verdin-imx95-nonwifi-ivy # Verdin iMX95 Module on Ivy1543 - toradex,verdin-imx95-nonwifi-ivy # Verdin iMX95 Module on Ivy
1516 - toradex,verdin-imx95-nonwifi-mallow # Verdin iMX95 Module on Mallow1544 - toradex,verdin-imx95-nonwifi-mallow # Verdin iMX95 Module on Mallow
1517 - toradex,verdin-imx95-nonwifi-yavia # Verdin iMX95 Module on Yavia1545 - toradex,verdin-imx95-nonwifi-yavia # Verdin iMX95 Module on Yavia
1546 - toradex,verdin-imx95-nonwifi-zinnia # Verdin iMX95 Module on Zinnia
1518 - const: toradex,verdin-imx95-nonwifi # Verdin iMX95 Module without Wi-Fi / BT1547 - const: toradex,verdin-imx95-nonwifi # Verdin iMX95 Module without Wi-Fi / BT
1519 - const: toradex,verdin-imx95 # Verdin iMX95 Module1548 - const: toradex,verdin-imx95 # Verdin iMX95 Module
1520 - const: fsl,imx951549 - const: fsl,imx95
@@ -1527,6 +1556,7 @@ properties: · 6 unmodified lines
1527 - toradex,verdin-imx95-wifi-ivy # Verdin iMX95 Wi-Fi / BT Module on Ivy1556 - toradex,verdin-imx95-wifi-ivy # Verdin iMX95 Wi-Fi / BT Module on Ivy
1528 - toradex,verdin-imx95-wifi-mallow # Verdin iMX95 Wi-Fi / BT Module on Mallow1557 - toradex,verdin-imx95-wifi-mallow # Verdin iMX95 Wi-Fi / BT Module on Mallow
1529 - toradex,verdin-imx95-wifi-yavia # Verdin iMX95 Wi-Fi / BT Module on Yavia1558 - toradex,verdin-imx95-wifi-yavia # Verdin iMX95 Wi-Fi / BT Module on Yavia
1559 - toradex,verdin-imx95-wifi-zinnia # Verdin iMX95 Wi-Fi / BT Module on Zinnia
1530 - const: toradex,verdin-imx95-wifi # Verdin iMX95 Wi-Fi / BT Module1560 - const: toradex,verdin-imx95-wifi # Verdin iMX95 Wi-Fi / BT Module
1531 - const: toradex,verdin-imx95 # Verdin iMX95 Module1561 - const: toradex,verdin-imx95 # Verdin iMX95 Module
1532 - const: fsl,imx951562 - const: fsl,imx95
@@ -1614,6 +1644,18 @@ properties: · 81 unmodified lines
1614 - const: variscite,var-dart-mx91 # Variscite DART-MX91 SOM1644 - const: variscite,var-dart-mx91 # Variscite DART-MX91 SOM
1615 - const: fsl,imx911645 - const: fsl,imx91
1616 1646
1647 - description: Variscite VAR-SOM-MX91 based boards
1648 items:
1649 - const: variscite,var-som-mx91-symphony # Variscite VAR-SOM-MX91 on Symphony
1650 - const: variscite,var-som-mx91 # Variscite VAR-SOM-MX91
1651 - const: fsl,imx91
1652
1653 - description: Variscite DART-MX93 based boards
1654 items:
1655 - const: variscite,var-dart-mx93-sonata # Variscite DART-MX93 on Sonata Development Board
1656 - const: variscite,var-dart-mx93 # Variscite DART-MX93 SOM
1657 - const: fsl,imx93
1658
1617 - description: Variscite VAR-SOM-MX93 based boards1659 - description: Variscite VAR-SOM-MX93 based boards
1618 items:1660 items:
1619 - const: variscite,var-som-mx93-symphony1661 - const: variscite,var-som-mx93-symphony
@@ -1868,6 +1910,7 @@ properties: · 248 unmodified lines
1868 - enum:1910 - enum:
1869 - solidrun,clearfog-cx1911 - solidrun,clearfog-cx
1870 - solidrun,honeycomb1912 - solidrun,honeycomb
1913 - solidrun,twins-single
1871 - const: solidrun,lx2160a-cex71914 - const: solidrun,lx2160a-cex7
1872 - const: fsl,lx2160a1915 - const: fsl,lx2160a
1873 1916
Documentation/devicetree/bindings/arm/gemini.yaml+10−0
@@ -55,6 +55,11 @@ properties: · 54 unmodified lines
55 - const: itian,sq20155 - const: itian,sq201
56 - const: cortina,gemini56 - const: cortina,gemini
57 57
58 - description: Raidsonic NAS IB-4210-B
59 items:
60 - const: raidsonic,ib-4210-b
61 - const: cortina,gemini
62
58 - description: Raidsonic NAS IB-4220-B63 - description: Raidsonic NAS IB-4220-B
59 items:64 items:
60 - const: raidsonic,ib-4220-b65 - const: raidsonic,ib-4220-b
@@ -70,6 +75,11 @@ properties: · 9 unmodified lines
70 - const: teltonika,rut1xx75 - const: teltonika,rut1xx
71 - const: cortina,gemini76 - const: cortina,gemini
72 77
78 - description: Verbatim S08V1901-D1 NAS
79 items:
80 - const: verbatim,s08v1901-d1
81 - const: cortina,gemini
82
73 - description: Wiligear Wiliboard WBD-11183 - description: Wiligear Wiliboard WBD-111
74 items:84 items:
75 - const: wiligear,wiliboard-wbd11185 - const: wiligear,wiliboard-wbd111
Documentation/devicetree/bindings/arm/omap/crossbar.txt+0−55
@@ -1,55 +0,0 @@
1Some socs have a large number of interrupts requests to service
2the needs of its many peripherals and subsystems. All of the
3interrupt lines from the subsystems are not needed at the same
4time, so they have to be muxed to the irq-controller appropriately.
5In such places a interrupt controllers are preceded by an CROSSBAR
6that provides flexibility in muxing the device requests to the controller
7inputs.
8
9Required properties:
10- compatible : Should be "ti,irq-crossbar"
11- reg: Base address and the size of the crossbar registers.
12- interrupt-controller: indicates that this block is an interrupt controller.
13- ti,max-irqs: Total number of irqs available at the parent interrupt controller.
14- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
15- ti,reg-size: Size of a individual register in bytes. Every individual
16 register is assumed to be of same size. Valid sizes are 1, 2, 4.
17- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
18 crossbar. These interrupt lines are reserved in the soc,
19 so crossbar bar driver should not consider them as free
20 lines.
21
22Optional properties:
23- ti,irqs-skip: This is similar to "ti,irqs-reserved", but these are for
24 SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
25 crossbar. These irqs have a crossbar register, but still cannot be used.
26
27- ti,irqs-safe-map: integer which maps to a safe configuration to use
28 when the interrupt controller irq is unused (when not provided, default is 0)
29
30Examples:
31 crossbar_mpu: crossbar@4a002a48 {
32 compatible = "ti,irq-crossbar";
33 reg = <0x4a002a48 0x130>;
34 ti,max-irqs = <160>;
35 ti,max-crossbar-sources = <400>;
36 ti,reg-size = <2>;
37 ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
38 ti,irqs-skip = <10 133 139 140>;
39 };
40
41Consumer:
42========
43See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
44Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml for
45further details.
46
47An interrupt consumer on an SoC using crossbar will use:
48 interrupts = <GIC_SPI request_number interrupt_level>
49
50Example:
51 device_x@4a023000 {
52 /* Crossbar 8 used */
53 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
54 ...
55 };
Documentation/devicetree/bindings/arm/omap/dmm.txt+0−22
@@ -1,22 +0,0 @@
1OMAP Dynamic Memory Manager (DMM) bindings
2
3The dynamic memory manager (DMM) is a module located immediately in front of the
4SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
5accesses such as priority generation amongst initiators, configuration of SDRAM
6interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
7translation for initiators which need contiguous dma bus addresses.
8
9Required properties:
10- compatible: Should contain "ti,omap4-dmm" for OMAP4 family
11 Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
12- reg: Contains DMM register address range (base address and length)
13- interrupts: Should contain an interrupt-specifier for DMM_IRQ.
14- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm"
15
16Example:
17
18dmm@4e000000 {
19 compatible = "ti,omap4-dmm";
20 reg = <0x4e000000 0x800>;
21 ti,hwmods = "dmm";
22};
Documentation/devicetree/bindings/arm/qcom.yaml+19−2
@@ -79,6 +79,7 @@ properties: · 78 unmodified lines
79 - items:79 - items:
80 - enum:80 - enum:
81 - fairphone,fp681 - fairphone,fp6
82 - nothing,asteroids
82 - const: qcom,milos83 - const: qcom,milos
83 84
84 - items:85 - items:
@@ -365,6 +366,11 @@ properties: · 280 unmodified lines
365 - qcom,ipq9574-ap-al02-c9366 - qcom,ipq9574-ap-al02-c9
366 - const: qcom,ipq9574367 - const: qcom,ipq9574
367 368
369 - items:
370 - enum:
371 - qcom,ipq9650-rdp488
372 - const: qcom,ipq9650
373
368 - items:374 - items:
369 - enum:375 - enum:
370 - qcom,kaanapali-mtp376 - qcom,kaanapali-mtp
@@ -822,6 +828,14 @@ properties: · 451 unmodified lines
822 - const: google,zombie-sku514828 - const: google,zombie-sku514
823 - const: qcom,sc7280829 - const: qcom,sc7280
824 830
831 - description: Xiaomi Poco F1
832 items:
833 - enum:
834 - xiaomi,beryllium-ebbg
835 - xiaomi,beryllium-tianma
836 - const: xiaomi,beryllium
837 - const: qcom,sdm845
838
825 - items:839 - items:
826 - enum:840 - enum:
827 - lenovo,flex-5g841 - lenovo,flex-5g
@@ -972,8 +986,6 @@ properties: · 144 unmodified lines
972 - sony,akatsuki-row986 - sony,akatsuki-row
973 - sony,apollo-row987 - sony,apollo-row
974 - thundercomm,db845c988 - thundercomm,db845c
975 - xiaomi,beryllium
976 - xiaomi,beryllium-ebbg
977 - xiaomi,polaris989 - xiaomi,polaris
978 - const: qcom,sdm845990 - const: qcom,sdm845
979 991
@@ -1040,6 +1052,7 @@ properties: · 60 unmodified lines
1040 1052
1041 - items:1053 - items:
1042 - enum:1054 - enum:
1055 - motorola,dubai
1043 - nothing,spacewar1056 - nothing,spacewar
1044 - const: qcom,sm73251057 - const: qcom,sm7325
1045 1058
@@ -1168,6 +1181,10 @@ properties: · 122 unmodified lines
1168 - const: microsoft,denali1181 - const: microsoft,denali
1169 - const: qcom,x1e801001182 - const: qcom,x1e80100
1170 1183
1184 - items:
1185 - const: microsoft,surface-pro-12in
1186 - const: qcom,x1p42100
1187
1171 - items:1188 - items:
1172 - enum:1189 - enum:
1173 - qcom,purwa-iot-evk1190 - qcom,purwa-iot-evk
Documentation/devicetree/bindings/arm/st,nomadik.yaml+23−0
@@ -0,0 +1,23 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/st,nomadik.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ST Nomadik SoC based Boards
8
9maintainers:
10 - Linus Walleij <linusw@kernel.org>
11
12description:
13 Boards using the Nomadik SoC platform
14
15properties:
16 $nodename:
17 const: '/'
18 compatible:
19 enum:
20 - st,nomadik-nhk-15
21 - calaosystems,usb-s8815
22
23additionalProperties: true
Documentation/devicetree/bindings/arm/ste-nomadik.txt+0−38
@@ -1,38 +0,0 @@
1ST-Ericsson Nomadik Device Tree Bindings
2
3For various board the "board" node may contain specific properties
4that pertain to this particular board, such as board-specific GPIOs.
5
6Required root node property: src
7- Nomadik System and reset controller used for basic chip control, clock
8 and reset line control.
9- compatible: must be "stericsson,nomadik,src"
10
11Boards with the Nomadik SoC include:
12
13Nomadik NHK-15 board manufactured by ST Microelectronics:
14
15Required root node property:
16
17compatible="st,nomadik-nhk-15";
18
19S8815 "MiniKit" manufactured by Calao Systems:
20
21Required root node property:
22
23compatible="calaosystems,usb-s8815";
24
25Required node: usb-s8815
26
27Example:
28
29usb-s8815 {
30 ethernet-gpio {
31 gpios = <&gpio3 19 0x1>;
32 interrupts = <19 0x1>;
33 interrupt-parent = <&gpio3>;
34 };
35 mmcsd-gpio {
36 gpios = <&gpio3 16 0x1>;
37 };
38};
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml+2−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
16 - nvidia,tegra186-pmc16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc18 - nvidia,tegra234-pmc
19 - nvidia,tegra238-pmc
19 - nvidia,tegra264-pmc20 - nvidia,tegra264-pmc
20 21
21 reg:22 reg:
@@ -76,6 +77,7 @@ allOf: · 54 unmodified lines
76 contains:77 contains:
77 enum:78 enum:
78 - nvidia,tegra234-pmc79 - nvidia,tegra234-pmc
80 - nvidia,tegra238-pmc
79 - nvidia,tegra264-pmc81 - nvidia,tegra264-pmc
80 then:82 then:
81 properties:83 properties:
Documentation/devicetree/bindings/arm/ti/k3.yaml+7−0
@@ -97,6 +97,13 @@ properties: · 96 unmodified lines
97 - const: toradex,verdin-am62 # Verdin AM62 Module97 - const: toradex,verdin-am62 # Verdin AM62 Module
98 - const: ti,am62598 - const: ti,am625
99 99
100 - description: K3 AM625 SoC on TQ-Systems TQMa62xx SoM
101 items:
102 - enum:
103 - tq,am625-tqma6254-mba62xx # MBa62xx base board
104 - const: tq,am625-tqma6254
105 - const: ti,am625
106
100 - description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards107 - description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards
101 items:108 items:
102 - enum:109 - enum:
Documentation/devicetree/bindings/arm/zte.yaml+26−0
@@ -0,0 +1,26 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/zte.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ZTE zx platforms
8
9maintainers:
10 - Stefan Dösinger <stefandoesinger@gmail.com>
11
12description: |
13 ARM platforms using SoCs designed by ZTE. Currently this supports devices
14 based on the zx297520v3 SoC which is found in LTE routers.
15
16properties:
17 $nodename:
18 const: "/"
19 compatible:
20 oneOf:
21 - items:
22 - enum:
23 - dlink,dwr932m
24 - const: zte,zx297520v3
25
26additionalProperties: true
Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml+4−0
@@ -26,8 +26,10 @@ select: · 25 unmodified lines
26 compatible:26 compatible:
27 contains:27 contains:
28 enum:28 enum:
29 - fsl,aipi-bus
29 - fsl,aips30 - fsl,aips
30 - fsl,emi31 - fsl,emi
32 - fsl,emi-bus
31 - fsl,spba-bus33 - fsl,spba-bus
32 required:34 required:
33 - compatible35 - compatible
@@ -39,8 +41,10 @@ properties: · 5 unmodified lines
39 compatible:41 compatible:
40 items:42 items:
41 - enum:43 - enum:
44 - fsl,aipi-bus
42 - fsl,aips45 - fsl,aips
43 - fsl,emi46 - fsl,emi
47 - fsl,emi-bus
44 - fsl,spba-bus48 - fsl,spba-bus
45 - const: simple-bus49 - const: simple-bus
46 50
Documentation/devicetree/bindings/cache/l2c2x0.yaml+3−0
@@ -66,6 +66,9 @@ properties: · 65 unmodified lines
66 reg:66 reg:
67 maxItems: 167 maxItems: 1
68 68
69 power-domains:
70 maxItems: 1
71
69 arm,data-latency:72 arm,data-latency:
70 description: Cycles of latency for Data RAM accesses. Specifies 3 cells of73 description: Cycles of latency for Data RAM accesses. Specifies 3 cells of
71 read, write and setup latencies. Minimum valid values are 1. Controllers74 read, write and setup latencies. Minimum valid values are 1. Controllers
Documentation/devicetree/bindings/cache/qcom,llcc.yaml+43−0
@@ -20,7 +20,9 @@ description: | · 19 unmodified lines
20properties:20properties:
21 compatible:21 compatible:
22 enum:22 enum:
23 - qcom,eliza-llcc
23 - qcom,glymur-llcc24 - qcom,glymur-llcc
25 - qcom,hawi-llcc
24 - qcom,ipq5424-llcc26 - qcom,ipq5424-llcc
25 - qcom,kaanapali-llcc27 - qcom,kaanapali-llcc
26 - qcom,qcs615-llcc28 - qcom,qcs615-llcc
@@ -35,6 +37,7 @@ properties: · 8 unmodified lines
35 - qcom,sc8280xp-llcc37 - qcom,sc8280xp-llcc
36 - qcom,sdm670-llcc38 - qcom,sdm670-llcc
37 - qcom,sdm845-llcc39 - qcom,sdm845-llcc
40 - qcom,shikra-llcc
38 - qcom,sm6350-llcc41 - qcom,sm6350-llcc
39 - qcom,sm7150-llcc42 - qcom,sm7150-llcc
40 - qcom,sm8150-llcc43 - qcom,sm8150-llcc
@@ -57,6 +60,11 @@ properties: · 16 unmodified lines
57 interrupts:60 interrupts:
58 maxItems: 161 maxItems: 1
59 62
63 memory-region:
64 maxItems: 1
65 description: handle to a reserved-memory node used for firmware-populated
66 SLC/SCT shared memory.
67
60 nvmem-cells:68 nvmem-cells:
61 items:69 items:
62 - description: Reference to an nvmem node for multi channel DDR70 - description: Reference to an nvmem node for multi channel DDR
@@ -206,6 +214,7 @@ allOf: · 143 unmodified lines
206 enum:214 enum:
207 - qcom,sc7280-llcc215 - qcom,sc7280-llcc
208 - qcom,sdm670-llcc216 - qcom,sdm670-llcc
217 - qcom,shikra-llcc
209 then:218 then:
210 properties:219 properties:
211 reg:220 reg:
@@ -318,6 +327,7 @@ allOf: · 106 unmodified lines
318 contains:327 contains:
319 enum:328 enum:
320 - qcom,kaanapali-llcc329 - qcom,kaanapali-llcc
330 - qcom,hawi-llcc
321 - qcom,sm8450-llcc331 - qcom,sm8450-llcc
322 - qcom,sm8550-llcc332 - qcom,sm8550-llcc
323 - qcom,sm8650-llcc333 - qcom,sm8650-llcc
@@ -340,6 +350,39 @@ allOf: · 16 unmodified lines
340 - const: llcc3_base350 - const: llcc3_base
341 - const: llcc_broadcast_base351 - const: llcc_broadcast_base
342 - const: llcc_broadcast_and_base352 - const: llcc_broadcast_and_base
353 - if:
354 properties:
355 compatible:
356 contains:
357 enum:
358 - qcom,hawi-llcc
359 then:
360 required:
361 - memory-region
362 else:
363 properties:
364 memory-region: false
365
366 - if:
367 properties:
368 compatible:
369 contains:
370 enum:
371 - qcom,eliza-llcc
372 then:
373 properties:
374 reg:
375 items:
376 - description: LLCC0 base register region
377 - description: LLCC2 base register region
378 - description: LLCC broadcast OR register region
379 - description: LLCC broadcast AND register region
380 reg-names:
381 items:
382 - const: llcc0_base
383 - const: llcc2_base
384 - const: llcc_broadcast_base
385 - const: llcc_broadcast_and_base
343 386
344additionalProperties: false387additionalProperties: false
345 388
Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml+8−4
@@ -24,7 +24,7 @@ properties: · 23 unmodified lines
24 const: 124 const: 1
25 25
26 clocks:26 clocks:
27 minItems: 1427 minItems: 15
28 items:28 items:
29 - description: input oscillator29 - description: input oscillator
30 - description: input sys clk30 - description: input sys clk
@@ -40,12 +40,13 @@ properties: · 9 unmodified lines
40 - description: input gp1 pll40 - description: input gp1 pll
41 - description: input mpll141 - description: input mpll1
42 - description: input mpll242 - description: input mpll2
43 - description: input mpll3
43 - description: external input rmii oscillator (optional)44 - description: external input rmii oscillator (optional)
44 - description: input video pll0 (optional)45 - description: input video pll0 (optional)
45 - description: external pad input for rtc (optional)46 - description: external pad input for rtc (optional)
46 47
47 clock-names:48 clock-names:
48 minItems: 1449 minItems: 15
49 items:50 items:
50 - const: xtal51 - const: xtal
51 - const: sys52 - const: sys
@@ -61,6 +62,7 @@ properties: · 9 unmodified lines
61 - const: gp162 - const: gp1
62 - const: mpll163 - const: mpll1
63 - const: mpll264 - const: mpll2
65 - const: mpll3
64 - const: ext_rmii66 - const: ext_rmii
65 - const: vid_pll067 - const: vid_pll0
66 - const: ext_rtc68 - const: ext_rtc
@@ -97,7 +99,8 @@ examples: · 30 unmodified lines
97 <&gp0 1>,99 <&gp0 1>,
98 <&gp1 1>,100 <&gp1 1>,
99 <&mpll 4>,101 <&mpll 4>,
100 <&mpll 6>;102 <&mpll 6>,
103 <&mpll 8>;
101 clock-names = "xtal",104 clock-names = "xtal",
102 "sys",105 "sys",
103 "fix",106 "fix",
@@ -111,6 +114,7 @@ examples: · 7 unmodified lines
111 "gp0",114 "gp0",
112 "gp1",115 "gp1",
113 "mpll1",116 "mpll1",
114 "mpll2";117 "mpll2",
118 "mpll3";
115 };119 };
116 };120 };
Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml+1−1
@@ -72,7 +72,7 @@ allOf: · 71 unmodified lines
72 contains:72 contains:
73 enum:73 enum:
74 - amlogic,t7-gp0-pll74 - amlogic,t7-gp0-pll
75 - amlogic,t7-gp1--pll75 - amlogic,t7-gp1-pll
76 - amlogic,t7-hifi-pll76 - amlogic,t7-hifi-pll
77 - amlogic,t7-pcie-pll77 - amlogic,t7-pcie-pll
78 - amlogic,t7-mpll78 - amlogic,t7-mpll
Documentation/devicetree/bindings/clock/canaan,k230-clk.yaml+59−0
@@ -0,0 +1,59 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/canaan,k230-clk.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Canaan Kendryte K230 Clock
8
9maintainers:
10 - Xukai Wang <kingxukai@zohomail.com>
11
12description:
13 The Canaan K230 clock controller generates various clocks for SoC
14 peripherals. See include/dt-bindings/clock/canaan,k230-clk.h for
15 valid clock IDs.
16
17properties:
18 compatible:
19 const: canaan,k230-clk
20
21 reg:
22 items:
23 - description: PLL control registers
24 - description: Sysclk control registers
25
26 clocks:
27 items:
28 - description: Main external reference clock
29 - description:
30 External clock which used as the pulse input
31 for the timer to provide timing signals.
32
33 clock-names:
34 items:
35 - const: osc24m
36 - const: timer-pulse-in
37
38 '#clock-cells':
39 const: 1
40
41required:
42 - compatible
43 - reg
44 - clocks
45 - clock-names
46 - '#clock-cells'
47
48additionalProperties: false
49
50examples:
51 - |
52 clock-controller@91102000 {
53 compatible = "canaan,k230-clk";
54 reg = <0x91102000 0x40>,
55 <0x91100000 0x108>;
56 clocks = <&osc24m>, <&timerx_pulse_in>;
57 clock-names = "osc24m", "timer-pulse-in";
58 #clock-cells = <1>;
59 };
Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml+8−3
@@ -11,14 +11,19 @@ maintainers: · 10 unmodified lines
11 11
12description: |12description: |
13 The CS2000-CP is an extremely versatile system clocking device that13 The CS2000-CP is an extremely versatile system clocking device that
14 utilizes a programmable phase lock loop.14 utilizes a programmable phase lock loop. CS2500 is a compatible
15 drop-in replacement for CS2000-CP.
15 16
16 Link: https://www.cirrus.com/products/cs2000/17 Link: https://www.cirrus.com/products/cs2000/
18 Link: https://www.cirrus.com/products/cs2500/
17 19
18properties:20properties:
19 compatible:21 compatible:
20 enum:22 oneOf:
21 - cirrus,cs2000-cp23 - items:
24 - const: cirrus,cs2500
25 - const: cirrus,cs2000-cp
26 - const: cirrus,cs2000-cp
22 27
23 clocks:28 clocks:
24 description:29 description:
Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml+24−10
@@ -37,6 +37,9 @@ properties: · 36 unmodified lines
37 '#power-domain-cells':37 '#power-domain-cells':
38 const: 138 const: 1
39 39
40 '#reset-cells':
41 const: 1
42
40required:43required:
41 - compatible44 - compatible
42 - reg45 - reg
@@ -44,16 +47,27 @@ required: · 1 unmodified line
44 47
45additionalProperties: false48additionalProperties: false
46 49
47if:50allOf:
48 not:51 - if:
49 properties:52 not:
50 compatible:53 properties:
51 contains:54 compatible:
52 const: marvell,pxa1908-apmu55 contains:
53 56 const: marvell,pxa1908-apmu
54then:57 then:
55 properties:58 properties:
56 '#power-domain-cells': false59 '#power-domain-cells': false
60 - if:
61 not:
62 properties:
63 compatible:
64 contains:
65 enum:
66 - marvell,pxa1908-apbc
67 - marvell,pxa1908-apbcp
68 then:
69 properties:
70 '#reset-cells': false
57 71
58examples:72examples:
59 # APMU block:73 # APMU block:
Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml+5−12
@@ -42,12 +42,6 @@ properties: · 41 unmodified lines
42 - const: cfg_ahb_clk42 - const: cfg_ahb_clk
43 - const: gcc_disp_gpll0_div_clk_src43 - const: gcc_disp_gpll0_div_clk_src
44 44
45 '#clock-cells':
46 const: 1
47
48 '#power-domain-cells':
49 const: 1
50
51 power-domains:45 power-domains:
52 description:46 description:
53 A phandle and PM domain specifier for the CX power domain.47 A phandle and PM domain specifier for the CX power domain.
@@ -58,18 +52,16 @@ properties: · 4 unmodified lines
58 A phandle to an OPP node describing the power domain's performance point.52 A phandle to an OPP node describing the power domain's performance point.
59 maxItems: 153 maxItems: 1
60 54
61 reg:
62 maxItems: 1
63
64required:55required:
65 - compatible56 - compatible
66 - reg
67 - clocks57 - clocks
68 - clock-names58 - clock-names
69 - '#clock-cells'
70 - '#power-domain-cells'59 - '#power-domain-cells'
71 60
72additionalProperties: false61allOf:
62 - $ref: qcom,gcc.yaml#
63
64unevaluatedProperties: false
73 65
74examples:66examples:
75 - |67 - |
@@ -101,6 +93,7 @@ examples: · 25 unmodified lines
101 power-domains = <&rpmpd SM6125_VDDCX>;93 power-domains = <&rpmpd SM6125_VDDCX>;
102 94
103 #clock-cells = <1>;95 #clock-cells = <1>;
96 #reset-cells = <1>;
104 #power-domain-cells = <1>;97 #power-domain-cells = <1>;
105 };98 };
106...99...
Documentation/devicetree/bindings/clock/qcom,hawi-gcc.yaml+63−0
@@ -0,0 +1,63 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,hawi-gcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller on Hawi
8
9maintainers:
10 - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
11
12description: |
13 Qualcomm global clock control module provides the clocks, resets and power
14 domains on Hawi.
15
16 See also: include/dt-bindings/clock/qcom,hawi-gcc.h
17
18properties:
19 compatible:
20 const: qcom,hawi-gcc
21
22 clocks:
23 items:
24 - description: Board XO source
25 - description: Board Always On XO source
26 - description: Sleep clock source
27 - description: PCIE 0 Pipe clock source
28 - description: PCIE 1 Pipe clock source
29 - description: UFS PHY RX symbol 0 clock
30 - description: UFS PHY RX symbol 1 clock
31 - description: UFS PHY TX symbol 0 clock
32 - description: USB3 PHY wrapper pipe clock
33
34required:
35 - compatible
36 - clocks
37 - '#power-domain-cells'
38
39allOf:
40 - $ref: qcom,gcc.yaml#
41
42unevaluatedProperties: false
43
44examples:
45 - |
46 #include <dt-bindings/clock/qcom,rpmh.h>
47 clock-controller@100000 {
48 compatible = "qcom,hawi-gcc";
49 reg = <0x00100000 0x1f4200>;
50 clocks = <&rpmhcc RPMH_CXO_CLK>,
51 <&rpmhcc RPMH_CXO_CLK_A>,
52 <&sleep_clk>,
53 <&pcie0_phy>,
54 <&pcie1_phy>,
55 <&ufs_mem_phy 0>,
56 <&ufs_mem_phy 1>,
57 <&ufs_mem_phy 2>,
58 <&usb_1_qmpphy>;
59 #clock-cells = <1>;
60 #reset-cells = <1>;
61 #power-domain-cells = <1>;
62 };
63...
Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml+2−1
@@ -8,7 +8,7 @@ title: Qualcomm CMN PLL Clock Controller on IPQ SoC · 7 unmodified lines
8 8
9maintainers:9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>10 - Bjorn Andersson <andersson@kernel.org>
11 - Luo Jie <quic_luoj@quicinc.com>11 - Luo Jie <jie.luo@oss.qualcomm.com>
12 12
13description:13description:
14 The CMN (or common) PLL clock controller expects a reference14 The CMN (or common) PLL clock controller expects a reference
@@ -25,6 +25,7 @@ properties: · 10 unmodified lines
25 compatible:25 compatible:
26 enum:26 enum:
27 - qcom,ipq5018-cmn-pll27 - qcom,ipq5018-cmn-pll
28 - qcom,ipq5332-cmn-pll
28 - qcom,ipq5424-cmn-pll29 - qcom,ipq5424-cmn-pll
29 - qcom,ipq6018-cmn-pll30 - qcom,ipq6018-cmn-pll
30 - qcom,ipq8074-cmn-pll31 - qcom,ipq8074-cmn-pll
Documentation/devicetree/bindings/clock/qcom,ipq9650-gcc.yaml+68−0
@@ -0,0 +1,68 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,ipq9650-gcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller on IPQ9650
8
9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11 - Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
12
13description: |
14 Qualcomm global clock control module provides the clocks, resets and power
15 domains on IPQ9650
16
17 See also:
18 include/dt-bindings/clock/qcom,ipq9650-gcc.h
19 include/dt-bindings/reset/qcom,ipq9650-gcc.h
20
21properties:
22 compatible:
23 const: qcom,ipq9650-gcc
24
25 clocks:
26 items:
27 - description: Board XO source
28 - description: Sleep clock source
29 - description: PCIE30 PHY0 pipe clock source
30 - description: PCIE30 PHY1 pipe clock source
31 - description: PCIE30 PHY2 pipe clock source
32 - description: PCIE30 PHY3 pipe clock source
33 - description: PCIE30 PHY4 pipe clock source
34 - description: USB PCIE wrapper pipe clock source
35 - description: NSS common clock source
36
37 '#power-domain-cells': false
38
39 '#interconnect-cells':
40 const: 1
41
42required:
43 - compatible
44 - clocks
45
46allOf:
47 - $ref: qcom,gcc.yaml#
48
49unevaluatedProperties: false
50
51examples:
52 - |
53 clock-controller@1800000 {
54 compatible = "qcom,ipq9650-gcc";
55 reg = <0x01800000 0x40000>;
56 clocks = <&xo_board_clk>,
57 <&sleep_clk>,
58 <&pcie30_phy0_pipe_clk>,
59 <&pcie30_phy1_pipe_clk>,
60 <&pcie30_phy2_pipe_clk>,
61 <&pcie30_phy3_pipe_clk>,
62 <&pcie30_phy4_pipe_clk>,
63 <&usb3phy_0_cc_pipe_clk>,
64 <&nss_cmn_clk>;
65 #clock-cells = <1>;
66 #reset-cells = <1>;
67 };
68...
Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml+1−1
@@ -44,7 +44,7 @@ required: · 43 unmodified lines
44 - power-domains44 - power-domains
45 - '#power-domain-cells'45 - '#power-domain-cells'
46 46
47unevaluatedProperties: false47additionalProperties: false
48 48
49examples:49examples:
50 - |50 - |
Documentation/devicetree/bindings/clock/qcom,milos-camcc.yaml+8−0
@@ -25,6 +25,10 @@ properties: · 24 unmodified lines
25 - description: Sleep clock source25 - description: Sleep clock source
26 - description: Camera AHB clock from GCC26 - description: Camera AHB clock from GCC
27 27
28 interconnects:
29 items:
30 - description: Interconnect path to enable the MultiMedia NoC
31
28required:32required:
29 - compatible33 - compatible
30 - clocks34 - clocks
@@ -37,12 +41,16 @@ unevaluatedProperties: false · 6 unmodified lines
37examples:41examples:
38 - |42 - |
39 #include <dt-bindings/clock/qcom,milos-gcc.h>43 #include <dt-bindings/clock/qcom,milos-gcc.h>
44 #include <dt-bindings/interconnect/qcom,icc.h>
45 #include <dt-bindings/interconnect/qcom,milos-rpmh.h>
40 clock-controller@adb0000 {46 clock-controller@adb0000 {
41 compatible = "qcom,milos-camcc";47 compatible = "qcom,milos-camcc";
42 reg = <0x0adb0000 0x40000>;48 reg = <0x0adb0000 0x40000>;
43 clocks = <&bi_tcxo_div2>,49 clocks = <&bi_tcxo_div2>,
44 <&sleep_clk>,50 <&sleep_clk>,
45 <&gcc GCC_CAMERA_AHB_CLK>;51 <&gcc GCC_CAMERA_AHB_CLK>;
52 interconnects = <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
53 &mmss_noc SLAVE_MNOC_HF_MEM_NOC QCOM_ICC_TAG_ALWAYS>;
46 #clock-cells = <1>;54 #clock-cells = <1>;
47 #reset-cells = <1>;55 #reset-cells = <1>;
48 #power-domain-cells = <1>;56 #power-domain-cells = <1>;
Documentation/devicetree/bindings/clock/qcom,milos-gxclkctl.yaml+61−0
@@ -0,0 +1,61 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,milos-gxclkctl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Graphics Power Domain Controller on Milos
8
9maintainers:
10 - Luca Weiss <luca.weiss@fairphone.com>
11
12description: |
13 Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and
14 Power domains (GDSC). This module provides the power domains control
15 of gxclkctl on Qualcomm SoCs which helps the recovery of Graphics subsystem.
16
17 See also:
18 include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h
19
20properties:
21 compatible:
22 enum:
23 - qcom,milos-gxclkctl
24
25 reg:
26 maxItems: 1
27
28 power-domains:
29 description:
30 Power domains required for the clock controller to operate
31 items:
32 - description: GFX power domain
33 - description: GPUCC(CX) power domain
34
35 '#power-domain-cells':
36 const: 1
37
38required:
39 - compatible
40 - reg
41 - power-domains
42 - '#power-domain-cells'
43
44additionalProperties: false
45
46examples:
47 - |
48 #include <dt-bindings/power/qcom,rpmhpd.h>
49 soc {
50 #address-cells = <2>;
51 #size-cells = <2>;
52
53 clock-controller@3d64000 {
54 compatible = "qcom,milos-gxclkctl";
55 reg = <0x0 0x03d64000 0x0 0x6000>;
56 power-domains = <&rpmhpd RPMHPD_GFX>,
57 <&gpucc 0>;
58 #power-domain-cells = <1>;
59 };
60 };
61...
Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml+1−1
@@ -8,7 +8,7 @@ title: Qualcomm NSS Clock & Reset Controller on QCA8386/QCA8084 · 7 unmodified lines
8 8
9maintainers:9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>10 - Bjorn Andersson <andersson@kernel.org>
11 - Luo Jie <quic_luoj@quicinc.com>11 - Luo Jie <jie.luo@oss.qualcomm.com>
12 12
13description: |13description: |
14 Qualcomm NSS clock control module provides the clocks and resets14 Qualcomm NSS clock control module provides the clocks and resets
Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml+1−0
@@ -19,6 +19,7 @@ properties: · 18 unmodified lines
19 enum:19 enum:
20 - qcom,eliza-rpmh-clk20 - qcom,eliza-rpmh-clk
21 - qcom,glymur-rpmh-clk21 - qcom,glymur-rpmh-clk
22 - qcom,hawi-rpmh-clk
22 - qcom,kaanapali-rpmh-clk23 - qcom,kaanapali-rpmh-clk
23 - qcom,milos-rpmh-clk24 - qcom,milos-rpmh-clk
24 - qcom,nord-rpmh-clk25 - qcom,nord-rpmh-clk
Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml+3−0
@@ -20,6 +20,7 @@ description: | · 19 unmodified lines
20 include/dt-bindings/clock/qcom,sm8450-videocc.h20 include/dt-bindings/clock/qcom,sm8450-videocc.h
21 include/dt-bindings/clock/qcom,sm8650-videocc.h21 include/dt-bindings/clock/qcom,sm8650-videocc.h
22 include/dt-bindings/clock/qcom,sm8750-videocc.h22 include/dt-bindings/clock/qcom,sm8750-videocc.h
23 include/dt-bindings/clock/qcom,x1p42100-videocc.h
23 24
24properties:25properties:
25 compatible:26 compatible:
@@ -32,6 +33,7 @@ properties: · 6 unmodified lines
32 - qcom,sm8650-videocc33 - qcom,sm8650-videocc
33 - qcom,sm8750-videocc34 - qcom,sm8750-videocc
34 - qcom,x1e80100-videocc35 - qcom,x1e80100-videocc
36 - qcom,x1p42100-videocc
35 37
36 clocks:38 clocks:
37 items:39 items:
@@ -70,6 +72,7 @@ allOf: · 32 unmodified lines
70 - qcom,sm8450-videocc72 - qcom,sm8450-videocc
71 - qcom,sm8550-videocc73 - qcom,sm8550-videocc
72 - qcom,sm8750-videocc74 - qcom,sm8750-videocc
75 - qcom,x1p42100-videocc
73 then:76 then:
74 required:77 required:
75 - required-opps78 - required-opps
Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml+2−0
@@ -17,6 +17,7 @@ description: | · 16 unmodified lines
17 See also:17 See also:
18 - include/dt-bindings/clock/qcom,eliza-tcsr.h18 - include/dt-bindings/clock/qcom,eliza-tcsr.h
19 - include/dt-bindings/clock/qcom,glymur-tcsr.h19 - include/dt-bindings/clock/qcom,glymur-tcsr.h
20 - include/dt-bindings/clock/qcom,hawi-tcsrcc.h
20 - include/dt-bindings/clock/qcom,nord-tcsrcc.h21 - include/dt-bindings/clock/qcom,nord-tcsrcc.h
21 - include/dt-bindings/clock/qcom,sm8550-tcsr.h22 - include/dt-bindings/clock/qcom,sm8550-tcsr.h
22 - include/dt-bindings/clock/qcom,sm8650-tcsr.h23 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
@@ -28,6 +29,7 @@ properties: · 5 unmodified lines
28 - enum:29 - enum:
29 - qcom,eliza-tcsr30 - qcom,eliza-tcsr
30 - qcom,glymur-tcsr31 - qcom,glymur-tcsr
32 - qcom,hawi-tcsrcc
31 - qcom,kaanapali-tcsr33 - qcom,kaanapali-tcsr
32 - qcom,milos-tcsr34 - qcom,milos-tcsr
33 - qcom,nord-tcsrcc35 - qcom,nord-tcsrcc
Documentation/devicetree/bindings/clock/qcom,x1e80100-camcc.yaml+1−0
@@ -23,6 +23,7 @@ properties: · 22 unmodified lines
23 compatible:23 compatible:
24 enum:24 enum:
25 - qcom,x1e80100-camcc25 - qcom,x1e80100-camcc
26 - qcom,x1p42100-camcc
26 27
27 reg:28 reg:
28 maxItems: 129 maxItems: 1
Documentation/devicetree/bindings/clock/renesas,cpg-clocks.yaml+6−2
@@ -41,7 +41,7 @@ properties: · 40 unmodified lines
41 41
42 clock-output-names:42 clock-output-names:
43 minItems: 343 minItems: 3
44 maxItems: 1744 maxItems: 19
45 45
46 renesas,mode:46 renesas,mode:
47 description: Board-specific settings of the MD_CK* bits on R-Mobile A147 description: Board-specific settings of the MD_CK* bits on R-Mobile A1
@@ -90,6 +90,8 @@ allOf: · 42 unmodified lines
90 - const: zx90 - const: zx
91 - const: zs91 - const: zs
92 - const: hp92 - const: hp
93 - const: ztr
94 - const: zt
93 95
94 - if:96 - if:
95 properties:97 properties:
@@ -123,6 +125,8 @@ allOf: · 27 unmodified lines
123 - const: zb125 - const: zb
124 - const: m3126 - const: m3
125 - const: cp127 - const: cp
128 - const: ztr
129 - const: zt
126 130
127 required:131 required:
128 - renesas,mode132 - renesas,mode
@@ -240,6 +244,6 @@ examples: · 111 unmodified lines
240 #clock-cells = <1>;244 #clock-cells = <1>;
241 clock-output-names = "system", "pllc0", "pllc1", "pllc2", "r",245 clock-output-names = "system", "pllc0", "pllc1", "pllc2", "r",
242 "usb24s", "i", "zg", "b", "m1", "hp", "hpp",246 "usb24s", "i", "zg", "b", "m1", "hp", "hpp",
243 "usbp", "s", "zb", "m3", "cp";247 "usbp", "s", "zb", "m3", "cp", "ztr", "zt";
244 renesas,mode = <0x05>;248 renesas,mode = <0x05>;
245 };249 };
Documentation/devicetree/bindings/clock/renesas,cpg-div6-clock.yaml+1−1
@@ -60,7 +60,7 @@ examples: · 59 unmodified lines
60 clock-output-names = "main", "pll0", "pll1", "pll2",60 clock-output-names = "main", "pll0", "pll1", "pll2",
61 "pll2s", "pll2h", "z", "z2",61 "pll2s", "pll2h", "z", "z2",
62 "i", "m3", "b", "m1", "m2",62 "i", "m3", "b", "m1", "m2",
63 "zx", "zs", "hp";63 "zx", "zs", "hp", "ztr", "zt";
64 };64 };
65 65
66 sdhi2_clk: sdhi2_clk@e615007c {66 sdhi2_clk: sdhi2_clk@e615007c {
Documentation/devicetree/bindings/cpufreq/qcom,shikra-epss.yaml+96−0
@@ -0,0 +1,96 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/cpufreq/qcom,shikra-epss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Shikra SoC EPSS
8
9maintainers:
10 - Imran Shaik <imran.shaik@oss.qualcomm.com>
11 - Taniya Das <taniya.das@oss.qualcomm.com>
12
13description: |
14 EPSS is a hardware engine used by some Qualcomm SoCs to manage
15 frequency in hardware. It is capable of controlling frequency for
16 multiple clusters.
17
18 The Qualcomm Shikra SoC EPSS supports up to 12 frequency lookup table
19 (LUT) entries.
20
21properties:
22 compatible:
23 enum:
24 - qcom,shikra-epss
25
26 reg:
27 items:
28 - description: Frequency domain 0 register region
29 - description: Frequency domain 1 register region
30
31 reg-names:
32 items:
33 - const: freq-domain0
34 - const: freq-domain1
35
36 clocks:
37 items:
38 - description: XO Clock
39 - description: GPLL0 Clock
40
41 clock-names:
42 items:
43 - const: xo
44 - const: alternate
45
46 interrupts:
47 items:
48 - description: IRQ line for DCVSH 0
49 - description: IRQ line for DCVSH 1
50
51 interrupt-names:
52 items:
53 - const: dcvsh-irq-0
54 - const: dcvsh-irq-1
55
56 '#freq-domain-cells':
57 const: 1
58
59 '#clock-cells':
60 const: 1
61
62required:
63 - compatible
64 - reg
65 - clocks
66 - clock-names
67 - interrupts
68 - interrupt-names
69 - '#freq-domain-cells'
70 - '#clock-cells'
71
72additionalProperties: false
73
74examples:
75 - |
76 #include <dt-bindings/clock/qcom,rpmcc.h>
77 #include <dt-bindings/interrupt-controller/arm-gic.h>
78
79 soc {
80 #address-cells = <1>;
81 #size-cells = <1>;
82
83 cpufreq@fd91000 {
84 compatible = "qcom,shikra-epss";
85 reg = <0x0fd91000 0x1000>, <0x0fd92000 0x1000>;
86 reg-names = "freq-domain0", "freq-domain1";
87 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gpll0>;
88 clock-names = "xo", "alternate";
89 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
90 <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
91 interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1";
92 #freq-domain-cells = <1>;
93 #clock-cells = <1>;
94 };
95 };
96...
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml+35−1
@@ -14,6 +14,7 @@ properties: · 13 unmodified lines
14 items:14 items:
15 - enum:15 - enum:
16 - qcom,eliza-inline-crypto-engine16 - qcom,eliza-inline-crypto-engine
17 - qcom,hawi-inline-crypto-engine
17 - qcom,kaanapali-inline-crypto-engine18 - qcom,kaanapali-inline-crypto-engine
18 - qcom,milos-inline-crypto-engine19 - qcom,milos-inline-crypto-engine
19 - qcom,qcs8300-inline-crypto-engine20 - qcom,qcs8300-inline-crypto-engine
@@ -30,6 +31,16 @@ properties: · 10 unmodified lines
30 maxItems: 131 maxItems: 1
31 32
32 clocks:33 clocks:
34 minItems: 1
35 maxItems: 2
36
37 clock-names:
38 minItems: 1
39 items:
40 - const: core
41 - const: iface
42
43 power-domains:
33 maxItems: 144 maxItems: 1
34 45
35 operating-points-v2: true46 operating-points-v2: true
@@ -44,6 +55,25 @@ required: · 8 unmodified lines
44 55
45additionalProperties: false56additionalProperties: false
46 57
58allOf:
59 - if:
60 properties:
61 compatible:
62 contains:
63 enum:
64 - qcom,eliza-inline-crypto-engine
65 - qcom,milos-inline-crypto-engine
66
67 then:
68 required:
69 - power-domains
70 - clock-names
71 properties:
72 clocks:
73 minItems: 2
74 clock-names:
75 minItems: 2
76
47examples:77examples:
48 - |78 - |
49 #include <dt-bindings/clock/qcom,sm8550-gcc.h>79 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
@@ -52,7 +82,11 @@ examples: · 2 unmodified lines
52 compatible = "qcom,sm8550-inline-crypto-engine",82 compatible = "qcom,sm8550-inline-crypto-engine",
53 "qcom,inline-crypto-engine";83 "qcom,inline-crypto-engine";
54 reg = <0x01d88000 0x8000>;84 reg = <0x01d88000 0x8000>;
55 clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;85 clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
86 <&gcc GCC_UFS_PHY_AHB_CLK>;
87 clock-names = "core",
88 "iface";
89 power-domains = <&gcc UFS_PHY_GDSC>;
56 90
57 operating-points-v2 = <&ice_opp_table>;91 operating-points-v2 = <&ice_opp_table>;
58 92
Documentation/devicetree/bindings/crypto/qcom,prng.yaml+3−0
@@ -17,11 +17,14 @@ properties: · 16 unmodified lines
17 - qcom,prng-ee # 8996 and later using EE17 - qcom,prng-ee # 8996 and later using EE
18 - items:18 - items:
19 - enum:19 - enum:
20 - qcom,glymur-trng
21 - qcom,hawi-trng
20 - qcom,ipq5332-trng22 - qcom,ipq5332-trng
21 - qcom,ipq5424-trng23 - qcom,ipq5424-trng
22 - qcom,ipq9574-trng24 - qcom,ipq9574-trng
23 - qcom,kaanapali-trng25 - qcom,kaanapali-trng
24 - qcom,milos-trng26 - qcom,milos-trng
27 - qcom,nord-trng
25 - qcom,qcs615-trng28 - qcom,qcs615-trng
26 - qcom,qcs8300-trng29 - qcom,qcs8300-trng
27 - qcom,sa8255p-trng30 - qcom,sa8255p-trng
Documentation/devicetree/bindings/crypto/qcom-qce.yaml+4−0
@@ -45,7 +45,11 @@ properties: · 44 unmodified lines
45 45
46 - items:46 - items:
47 - enum:47 - enum:
48 - qcom,eliza-qce
49 - qcom,glymur-qce
48 - qcom,kaanapali-qce50 - qcom,kaanapali-qce
51 - qcom,milos-qce
52 - qcom,nord-qce
49 - qcom,qcs615-qce53 - qcom,qcs615-qce
50 - qcom,qcs8300-qce54 - qcom,qcs8300-qce
51 - qcom,sa8775p-qce55 - qcom,sa8775p-qce
Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml+41−2
@@ -36,18 +36,56 @@ properties: · 35 unmodified lines
36 36
37 properties:37 properties:
38 port@0:38 port@0:
39 $ref: /schemas/graph.yaml#/properties/port39 $ref: /schemas/graph.yaml#/$defs/port-base
40 unevaluatedProperties: false
40 description:41 description:
41 Primary MIPI DSI port-1 for MIPI input or42 Primary MIPI DSI port-1 for MIPI input or
42 LVDS port-1 for LVDS input or DPI input.43 LVDS port-1 for LVDS input or DPI input.
43 44
45 properties:
46 endpoint:
47 $ref: /schemas/media/video-interfaces.yaml#
48 unevaluatedProperties: false
49
50 properties:
51 data-lanes:
52 description: array of physical DSI data lane indexes.
53 minItems: 1
54 items:
55 - const: 1
56 - const: 2
57 - const: 3
58 - const: 4
59
60 required:
61 - data-lanes
62
44 port@1:63 port@1:
45 $ref: /schemas/graph.yaml#/properties/port64 $ref: /schemas/graph.yaml#/$defs/port-base
65 unevaluatedProperties: false
46 description:66 description:
47 Additional MIPI port-2 for MIPI input or LVDS port-267 Additional MIPI port-2 for MIPI input or LVDS port-2
48 for LVDS input. Used in combination with primary68 for LVDS input. Used in combination with primary
49 port-1 to drive higher resolution displays69 port-1 to drive higher resolution displays
50 70
71 properties:
72 endpoint:
73 $ref: /schemas/media/video-interfaces.yaml#
74 unevaluatedProperties: false
75
76 properties:
77 data-lanes:
78 description: array of physical DSI data lane indexes.
79 minItems: 1
80 items:
81 - const: 1
82 - const: 2
83 - const: 3
84 - const: 4
85
86 required:
87 - data-lanes
88
51 port@2:89 port@2:
52 $ref: /schemas/graph.yaml#/properties/port90 $ref: /schemas/graph.yaml#/properties/port
53 description:91 description:
@@ -99,6 +137,7 @@ examples: · 45 unmodified lines
99 reg = <0>;137 reg = <0>;
100 138
101 endpoint {139 endpoint {
140 data-lanes = <1 2 3 4>;
102 remote-endpoint = <&dsi0_out>;141 remote-endpoint = <&dsi0_out>;
103 };142 };
104 };143 };
Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml+2−0
@@ -34,10 +34,12 @@ properties: · 33 unmodified lines
34 - items:34 - items:
35 - enum:35 - enum:
36 - doestek,dtc34lm85am # For the Doestek DTC34LM85AM Flat Panel Display (FPD) Transmitter36 - doestek,dtc34lm85am # For the Doestek DTC34LM85AM Flat Panel Display (FPD) Transmitter
37 - idt,v103 # For the Triple 10-BIT LVDS Transmitter
37 - onnn,fin3385 # OnSemi FIN338538 - onnn,fin3385 # OnSemi FIN3385
38 - ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer39 - ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer
39 - ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer40 - ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer
40 - ti,sn75lvds83 # For the TI SN75LVDS83 FlatLink transmitter41 - ti,sn75lvds83 # For the TI SN75LVDS83 FlatLink transmitter
42 - ti,sn75lvds93 # For the TI SN75LVDS93 FlatLink transmitter
41 - const: lvds-encoder # Generic LVDS encoder compatible fallback43 - const: lvds-encoder # Generic LVDS encoder compatible fallback
42 - items:44 - items:
43 - enum:45 - enum:
Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml+1−0
@@ -30,6 +30,7 @@ properties: · 29 unmodified lines
30 - algoltek,ag631130 - algoltek,ag6311
31 - asl-tek,cs526331 - asl-tek,cs5263
32 - dumb-vga-dac32 - dumb-vga-dac
33 - mstar,tsumu88adt3-lf-1
33 - parade,ps185hdm34 - parade,ps185hdm
34 - radxa,ra62035 - radxa,ra620
35 - realtek,rtd217136 - realtek,rtd2171
Documentation/devicetree/bindings/display/bridge/solomon,ssd2825.yaml+2−1
@@ -10,6 +10,7 @@ maintainers: · 9 unmodified lines
10 - Svyatoslav Ryhel <clamor95@gmail.com>10 - Svyatoslav Ryhel <clamor95@gmail.com>
11 11
12allOf:12allOf:
13 - $ref: /schemas/display/dsi-controller.yaml#
13 - $ref: /schemas/spi/spi-peripheral-props.yaml#14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
14 15
15properties:16properties:
@@ -86,7 +87,7 @@ required: · 70 unmodified lines
86 - compatible87 - compatible
87 - ports88 - ports
88 89
89additionalProperties: false90unevaluatedProperties: false
90 91
91examples:92examples:
92 - |93 - |
Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml+6−3
@@ -10,11 +10,14 @@ maintainers: · 9 unmodified lines
10 - Joseph Guo <qijian.guo@nxp.com>10 - Joseph Guo <qijian.guo@nxp.com>
11 11
12description:12description:
13 Waveshare bridge board is part of Waveshare panel which converts DSI to DPI.13 Waveshare bridge board is part of Waveshare panel which converts DSI to DPI
14 or LVDS.
14 15
15properties:16properties:
16 compatible:17 compatible:
17 const: waveshare,dsi2dpi18 enum:
19 - waveshare,dsi2dpi
20 - waveshare,dsi2lvds
18 21
19 reg:22 reg:
20 maxItems: 123 maxItems: 1
@@ -53,7 +56,7 @@ properties: · 32 unmodified lines
53 port@1:56 port@1:
54 $ref: /schemas/graph.yaml#/properties/port57 $ref: /schemas/graph.yaml#/properties/port
55 description:58 description:
56 Video port for MIPI DPI output panel.59 Video port for MIPI DPI or LVDS output to the panel.
57 60
58 required:61 required:
59 - port@062 - port@0
Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml+11−0
@@ -42,6 +42,17 @@ properties: · 41 unmodified lines
42 unevaluatedProperties: false42 unevaluatedProperties: false
43 description: output port connected to a panel43 description: output port connected to a panel
44 44
45 port:
46 $ref: /schemas/graph.yaml#/properties/port
47 unevaluatedProperties: false
48 deprecated: true
49 description: input port connected to the IPU display interface, see port@0
50
51 display-timings:
52 $ref: /schemas/display/panel/display-timings.yaml#
53 unevaluatedProperties: false
54 deprecated: true
55
45required:56required:
46 - compatible57 - compatible
47 58
Documentation/devicetree/bindings/display/imx/fsl,imx53-tve.yaml+104−0
@@ -0,0 +1,104 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/imx/fsl,imx53-tve.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX53 Television Encoder (TVE)
8
9maintainers:
10 - Frank Li <Frank.Li@nxp.com>
11
12description:
13 The Television Encoder (TVE) is a hardware block in the i.MX53 SoC that
14 converts digital video data into analog TV signals (NTSC/PAL).
15
16properties:
17 compatible:
18 const: fsl,imx53-tve
19
20 reg:
21 maxItems: 1
22
23 interrupts:
24 maxItems: 1
25
26 clocks:
27 items:
28 - description: TVE gate clock
29 - description: Display interface selector clock
30
31 clock-names:
32 items:
33 - const: tve
34 - const: di_sel
35
36 ddc-i2c-bus:
37 $ref: /schemas/types.yaml#/definitions/phandle
38 description:
39 Phandle to the I2C bus used for DDC (Display Data Channel) communication
40 to read EDID information from the connected display.
41
42 dac-supply:
43 description:
44 Regulator supply for the TVE DAC (Digital-to-Analog Converter).
45
46 fsl,tve-mode:
47 $ref: /schemas/types.yaml#/definitions/string
48 description:
49 TVE output mode selection.
50 enum:
51 - ntsc
52 - pal
53 - vga
54
55 fsl,hsync-pin:
56 $ref: /schemas/types.yaml#/definitions/uint32
57 description:
58 Pin number for horizontal sync signal in VGA mode.
59 minimum: 0
60 maximum: 8
61
62 fsl,vsync-pin:
63 $ref: /schemas/types.yaml#/definitions/uint32
64 description:
65 Pin number for vertical sync signal in VGA mode.
66 minimum: 0
67 maximum: 8
68
69 port:
70 $ref: /schemas/graph.yaml#/properties/port
71 description:
72 Port node with one endpoint connected to the IPU display interface.
73
74required:
75 - compatible
76 - reg
77 - interrupts
78 - clocks
79 - clock-names
80 - fsl,tve-mode
81
82additionalProperties: false
83
84examples:
85 - |
86 #include <dt-bindings/clock/imx5-clock.h>
87 #include <dt-bindings/interrupt-controller/irq.h>
88
89 tve@63ff0000 {
90 compatible = "fsl,imx53-tve";
91 reg = <0x63ff0000 0x1000>;
92 interrupts = <92>;
93 clocks = <&clks IMX5_CLK_TVE_GATE>,
94 <&clks IMX5_CLK_IPU_DI1_SEL>;
95 clock-names = "tve", "di_sel";
96 fsl,tve-mode = "vga";
97
98 port {
99 endpoint {
100 remote-endpoint = <&ipu_di1_tve>;
101 };
102 };
103 };
104
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml+1−1
@@ -41,7 +41,7 @@ properties: · 40 unmodified lines
41 - const: sw341 - const: sw3
42 42
43 sram:43 sram:
44 $ref: /schemas/types.yaml#/definitions/phandle44 maxItems: 1
45 description: phandle pointing to the mmio-sram device node45 description: phandle pointing to the mmio-sram device node
46 46
47required:47required:
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml+2−3
@@ -45,9 +45,8 @@ properties: · 44 unmodified lines
45 - description: OVL-2L Clock45 - description: OVL-2L Clock
46 46
47 iommus:47 iommus:
48 description:48 minItems: 1
49 This property should point to the respective IOMMU block with master port as argument,49 maxItems: 2
50 see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
51 50
52 mediatek,gce-client-reg:51 mediatek,gce-client-reg:
53 description: The register of client driver can be configured by gce with52 description: The register of client driver can be configured by gce with
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml+2−3
@@ -66,9 +66,8 @@ properties: · 65 unmodified lines
66 - description: OVL Clock66 - description: OVL Clock
67 67
68 iommus:68 iommus:
69 description:69 minItems: 1
70 This property should point to the respective IOMMU block with master port as argument,70 maxItems: 2
71 see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
72 71
73 mediatek,gce-client-reg:72 mediatek,gce-client-reg:
74 description: The register of client driver can be configured by gce with73 description: The register of client driver can be configured by gce with
Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml+1−3
@@ -65,9 +65,7 @@ properties: · 64 unmodified lines
65 - description: RDMA Clock65 - description: RDMA Clock
66 66
67 iommus:67 iommus:
68 description:68 maxItems: 1
69 This property should point to the respective IOMMU block with master port as argument,
70 see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
71 69
72 mediatek,rdma-fifo-size:70 mediatek,rdma-fifo-size:
73 description:71 description:
Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml+1−3
@@ -45,9 +45,7 @@ properties: · 44 unmodified lines
45 - description: WDMA Clock45 - description: WDMA Clock
46 46
47 iommus:47 iommus:
48 description:48 maxItems: 1
49 This property should point to the respective IOMMU block with master port as argument,
50 see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
51 49
52 mediatek,gce-client-reg:50 mediatek,gce-client-reg:
53 description: The register of client driver can be configured by gce with51 description: The register of client driver can be configured by gce with
Documentation/devicetree/bindings/display/msm/dp-controller.yaml+23−5
@@ -219,6 +219,7 @@ allOf: · 218 unmodified lines
219 - required:219 - required:
220 - "#sound-dai-cells"220 - "#sound-dai-cells"
221 else:221 else:
222 $ref: /schemas/sound/dai-common.yaml#
222 properties:223 properties:
223 aux-bus: false224 aux-bus: false
224 required:225 required:
@@ -243,7 +244,7 @@ allOf: · 18 unmodified lines
243 clocks:244 clocks:
244 minItems: 5245 minItems: 5
245 maxItems: 5246 maxItems: 5
246 clocks-names:247 clock-names:
247 minItems: 5248 minItems: 5
248 maxItems: 5249 maxItems: 5
249 250
@@ -264,7 +265,7 @@ allOf: · 14 unmodified lines
264 clocks:265 clocks:
265 minItems: 5266 minItems: 5
266 maxItems: 6267 maxItems: 6
267 clocks-names:268 clock-names:
268 minItems: 5269 minItems: 5
269 maxItems: 6270 maxItems: 6
270 271
@@ -277,7 +278,6 @@ allOf: · 6 unmodified lines
277 - qcom,sc8180x-dp278 - qcom,sc8180x-dp
278 - qcom,sdm845-dp279 - qcom,sdm845-dp
279 - qcom,sm8350-dp280 - qcom,sm8350-dp
280 - qcom,sm8650-dp
281 then:281 then:
282 properties:282 properties:
283 reg:283 reg:
@@ -286,6 +286,24 @@ allOf: · 2 unmodified lines
286 clocks:286 clocks:
287 minItems: 6287 minItems: 6
288 maxItems: 6288 maxItems: 6
289 clock-names:
290 minItems: 6
291 maxItems: 6
292
293 - if:
294 properties:
295 compatible:
296 contains:
297 enum:
298 - qcom,sm8650-dp
299 then:
300 properties:
301 reg:
302 minItems: 5
303 maxItems: 9
304 clocks:
305 minItems: 6
306 maxItems: 6
289 clocks-names:307 clocks-names:
290 minItems: 6308 minItems: 6
291 maxItems: 6309 maxItems: 6
@@ -306,7 +324,7 @@ allOf: · 14 unmodified lines
306 clocks:324 clocks:
307 minItems: 6325 minItems: 6
308 maxItems: 8326 maxItems: 8
309 clocks-names:327 clock-names:
310 minItems: 6328 minItems: 6
311 maxItems: 8329 maxItems: 8
312 330
@@ -326,7 +344,7 @@ allOf: · 13 unmodified lines
326 clocks:344 clocks:
327 minItems: 5345 minItems: 5
328 maxItems: 6346 maxItems: 6
329 clocks-names:347 clock-names:
330 minItems: 5348 minItems: 5
331 maxItems: 6349 maxItems: 6
332 350
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml+2−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
16 - enum:16 - enum:
17 - qcom,apq8064-dsi-ctrl17 - qcom,apq8064-dsi-ctrl
18 - qcom,kaanapali-dsi-ctrl18 - qcom,kaanapali-dsi-ctrl
19 - qcom,milos-dsi-ctrl
19 - qcom,msm8226-dsi-ctrl20 - qcom,msm8226-dsi-ctrl
20 - qcom,msm8916-dsi-ctrl21 - qcom,msm8916-dsi-ctrl
21 - qcom,msm8953-dsi-ctrl22 - qcom,msm8953-dsi-ctrl
@@ -339,6 +340,7 @@ allOf: · 317 unmodified lines
339 compatible:340 compatible:
340 contains:341 contains:
341 enum:342 enum:
343 - qcom,milos-dsi-ctrl
342 - qcom,msm8998-dsi-ctrl344 - qcom,msm8998-dsi-ctrl
343 - qcom,sa8775p-dsi-ctrl345 - qcom,sa8775p-dsi-ctrl
344 - qcom,sar2130p-dsi-ctrl346 - qcom,sar2130p-dsi-ctrl
Documentation/devicetree/bindings/display/msm/gmu.yaml+30−0
@@ -300,6 +300,36 @@ allOf: · 299 unmodified lines
300 required:300 required:
301 - qcom,qmp301 - qcom,qmp
302 302
303 - if:
304 properties:
305 compatible:
306 contains:
307 const: qcom,adreno-gmu-810.0
308 then:
309 properties:
310 reg:
311 items:
312 - description: Core GMU registers
313 reg-names:
314 items:
315 - const: gmu
316 clocks:
317 items:
318 - description: GPU AHB clock
319 - description: GMU clock
320 - description: GPU CX clock
321 - description: GPU AXI clock
322 - description: GPU MEMNOC clock
323 - description: GMU HUB clock
324 clock-names:
325 items:
326 - const: ahb
327 - const: gmu
328 - const: cxo
329 - const: axi
330 - const: memnoc
331 - const: hub
332
303 - if:333 - if:
304 properties:334 properties:
305 compatible:335 compatible:
Documentation/devicetree/bindings/display/msm/gpu.yaml+20−5
@@ -84,13 +84,9 @@ properties: · 83 unmodified lines
84 maxItems: 6484 maxItems: 64
85 85
86 sram:86 sram:
87 $ref: /schemas/types.yaml#/definitions/phandle-array
88 minItems: 187 minItems: 1
89 maxItems: 488 maxItems: 4
90 items:89 description:
91 maxItems: 1
92 description: |
93 phandles to one or more reserved on-chip SRAM regions.
94 phandle to the On Chip Memory (OCMEM) that's present on some a3xx and90 phandle to the On Chip Memory (OCMEM) that's present on some a3xx and
95 a4xx Snapdragon SoCs. See91 a4xx Snapdragon SoCs. See
96 Documentation/devicetree/bindings/sram/qcom,ocmem.yaml92 Documentation/devicetree/bindings/sram/qcom,ocmem.yaml
@@ -411,6 +407,23 @@ allOf: · 314 unmodified lines
411 - clocks407 - clocks
412 - clock-names408 - clock-names
413 409
410 - if:
411 properties:
412 compatible:
413 contains:
414 enum:
415 - qcom,adreno-44010000
416 - qcom,adreno-44070001
417 then:
418 properties:
419 reg:
420 minItems: 2
421 maxItems: 2
422
423 reg-names:
424 minItems: 2
425 maxItems: 2
426
414 - if:427 - if:
415 properties:428 properties:
416 compatible:429 compatible:
@@ -434,6 +447,8 @@ allOf: · 17 unmodified lines
434 - qcom,adreno-43050a01447 - qcom,adreno-43050a01
435 - qcom,adreno-43050c01448 - qcom,adreno-43050c01
436 - qcom,adreno-43051401449 - qcom,adreno-43051401
450 - qcom,adreno-44010000
451 - qcom,adreno-44070001
437 452
438 then: # Starting with A6xx, the clocks are usually defined in the GMU node453 then: # Starting with A6xx, the clocks are usually defined in the GMU node
439 properties:454 properties:
Documentation/devicetree/bindings/display/msm/qcom,eliza-mdss.yaml+12−8
@@ -119,7 +119,7 @@ examples: · 118 unmodified lines
119 mdss_mdp: display-controller@ae01000 {119 mdss_mdp: display-controller@ae01000 {
120 compatible = "qcom,eliza-dpu";120 compatible = "qcom,eliza-dpu";
121 reg = <0x0ae01000 0x93000>,121 reg = <0x0ae01000 0x93000>,
122 <0x0aeb0000 0x2008>;122 <0x0aeb0000 0x3000>;
123 reg-names = "mdp",123 reg-names = "mdp",
124 "vbif";124 "vbif";
125 125
@@ -304,7 +304,7 @@ examples: · 178 unmodified lines
304 mdss_dsi0_phy: phy@ae95000 {304 mdss_dsi0_phy: phy@ae95000 {
305 compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";305 compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
306 reg = <0x0ae95000 0x200>,306 reg = <0x0ae95000 0x200>,
307 <0x0ae95200 0x280>,307 <0x0ae95200 0x300>,
308 <0x0ae95500 0x400>;308 <0x0ae95500 0x400>;
309 reg-names = "dsi_phy",309 reg-names = "dsi_phy",
310 "dsi_phy_lane",310 "dsi_phy_lane",
@@ -388,7 +388,7 @@ examples: · 77 unmodified lines
388 mdss_dsi1_phy: phy@ae97000 {388 mdss_dsi1_phy: phy@ae97000 {
389 compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";389 compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
390 reg = <0x0ae97000 0x200>,390 reg = <0x0ae97000 0x200>,
391 <0x0ae97200 0x280>,391 <0x0ae97200 0x300>,
392 <0x0ae97500 0x400>;392 <0x0ae97500 0x400>;
393 reg-names = "dsi_phy",393 reg-names = "dsi_phy",
394 "dsi_phy_lane",394 "dsi_phy_lane",
@@ -407,11 +407,15 @@ examples: · 12 unmodified lines
407 407
408 displayport-controller@af54000 {408 displayport-controller@af54000 {
409 compatible = "qcom,eliza-dp", "qcom,sm8650-dp";409 compatible = "qcom,eliza-dp", "qcom,sm8650-dp";
410 reg = <0xaf54000 0x104>,410 reg = <0x0af54000 0x200>,
411 <0xaf54200 0xc0>,411 <0x0af54200 0x200>,
412 <0xaf55000 0x770>,412 <0x0af55000 0xc00>,
413 <0xaf56000 0x9c>,413 <0x0af56000 0x400>,
414 <0xaf57000 0x9c>;414 <0x0af57000 0x400>,
415 <0x0af58000 0x400>,
416 <0x0af59000 0x400>,
417 <0x0af5a000 0x600>,
418 <0x0af5b000 0x600>;
415 419
416 interrupts-extended = <&mdss 12>;420 interrupts-extended = <&mdss 12>;
417 421
Documentation/devicetree/bindings/display/msm/qcom,milos-mdss.yaml+286−0
@@ -0,0 +1,286 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/qcom,milos-mdss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Milos Display MDSS
8
9maintainers:
10 - Luca Weiss <luca.weiss@fairphone.com>
11
12description:
13 Milos MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
14 DPU display controller, DSI and DP interfaces etc.
15
16$ref: /schemas/display/msm/mdss-common.yaml#
17
18properties:
19 compatible:
20 const: qcom,milos-mdss
21
22 clocks:
23 items:
24 - description: Display AHB
25 - description: Display hf AXI
26 - description: Display core
27
28 iommus:
29 maxItems: 1
30
31 interconnects:
32 items:
33 - description: Interconnect path from mdp0 port to the data bus
34 - description: Interconnect path from CPU to the reg bus
35
36 interconnect-names:
37 items:
38 - const: mdp0-mem
39 - const: cpu-cfg
40
41patternProperties:
42 "^display-controller@[0-9a-f]+$":
43 type: object
44 additionalProperties: true
45 properties:
46 compatible:
47 const: qcom,milos-dpu
48
49 "^displayport-controller@[0-9a-f]+$":
50 type: object
51 additionalProperties: true
52 properties:
53 compatible:
54 const: qcom,milos-dp
55
56 "^dsi@[0-9a-f]+$":
57 type: object
58 additionalProperties: true
59 properties:
60 compatible:
61 contains:
62 const: qcom,milos-dsi-ctrl
63
64 "^phy@[0-9a-f]+$":
65 type: object
66 additionalProperties: true
67 properties:
68 compatible:
69 const: qcom,milos-dsi-phy-4nm
70
71required:
72 - compatible
73
74unevaluatedProperties: false
75
76examples:
77 - |
78 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
79 #include <dt-bindings/clock/qcom,milos-dispcc.h>
80 #include <dt-bindings/clock/qcom,milos-gcc.h>
81 #include <dt-bindings/clock/qcom,rpmh.h>
82 #include <dt-bindings/interconnect/qcom,icc.h>
83 #include <dt-bindings/interconnect/qcom,milos-rpmh.h>
84 #include <dt-bindings/interrupt-controller/arm-gic.h>
85 #include <dt-bindings/power/qcom,rpmhpd.h>
86
87 display-subsystem@ae00000 {
88 compatible = "qcom,milos-mdss";
89 reg = <0x0ae00000 0x1000>;
90 reg-names = "mdss";
91
92 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH 0>;
93
94 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
95 <&gcc GCC_DISP_HF_AXI_CLK>,
96 <&dispcc DISP_CC_MDSS_MDP_CLK>;
97
98 resets = <&dispcc DISP_CC_MDSS_CORE_BCR>;
99
100 interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS
101 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
102 <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
103 &cnoc_main SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
104 interconnect-names = "mdp0-mem",
105 "cpu-cfg";
106
107 power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
108
109 iommus = <&apps_smmu 0x1c00 0x2>;
110
111 interrupt-controller;
112 #interrupt-cells = <1>;
113
114 #address-cells = <1>;
115 #size-cells = <1>;
116 ranges;
117
118 display-controller@ae01000 {
119 compatible = "qcom,milos-dpu";
120 reg = <0x0ae01000 0x8f000>,
121 <0x0aeb0000 0x3000>;
122 reg-names = "mdp",
123 "vbif";
124
125 interrupts-extended = <&mdss 0>;
126
127 clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
128 <&dispcc DISP_CC_MDSS_AHB_CLK>,
129 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
130 <&dispcc DISP_CC_MDSS_MDP_CLK>,
131 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
132 clock-names = "nrt_bus",
133 "iface",
134 "lut",
135 "core",
136 "vsync";
137
138 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
139 assigned-clock-rates = <19200000>;
140
141 operating-points-v2 = <&mdp_opp_table>;
142
143 power-domains = <&rpmhpd RPMHPD_CX>;
144
145 ports {
146 #address-cells = <1>;
147 #size-cells = <0>;
148
149 port@0 {
150 reg = <0>;
151
152 dpu_intf1_out: endpoint {
153 remote-endpoint = <&mdss_dsi0_in>;
154 };
155 };
156 };
157
158 mdp_opp_table: opp-table {
159 compatible = "operating-points-v2";
160
161 opp-200000000 {
162 opp-hz = /bits/ 64 <200000000>;
163 required-opps = <&rpmhpd_opp_low_svs>;
164 };
165
166 opp-342000000 {
167 opp-hz = /bits/ 64 <342000000>;
168 required-opps = <&rpmhpd_opp_svs>;
169 };
170
171 opp-402000000 {
172 opp-hz = /bits/ 64 <402000000>;
173 required-opps = <&rpmhpd_opp_svs_l1>;
174 };
175
176 opp-535000000 {
177 opp-hz = /bits/ 64 <535000000>;
178 required-opps = <&rpmhpd_opp_nom>;
179 };
180
181 opp-600000000 {
182 opp-hz = /bits/ 64 <600000000>;
183 required-opps = <&rpmhpd_opp_nom_l1>;
184 };
185
186 opp-630000000 {
187 opp-hz = /bits/ 64 <630000000>;
188 required-opps = <&rpmhpd_opp_turbo>;
189 };
190 };
191 };
192
193 dsi@ae94000 {
194 compatible = "qcom,milos-dsi-ctrl", "qcom,mdss-dsi-ctrl";
195 reg = <0x0ae94000 0x1000>;
196 reg-names = "dsi_ctrl";
197
198 interrupts-extended = <&mdss 4>;
199
200 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
201 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
202 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
203 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
204 <&dispcc DISP_CC_MDSS_AHB_CLK>,
205 <&gcc GCC_DISP_HF_AXI_CLK>;
206 clock-names = "byte",
207 "byte_intf",
208 "pixel",
209 "core",
210 "iface",
211 "bus";
212
213 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
214 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
215 assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
216 <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
217
218 operating-points-v2 = <&mdss_dsi_opp_table>;
219
220 power-domains = <&rpmhpd RPMHPD_CX>;
221
222 phys = <&mdss_dsi0_phy>;
223 phy-names = "dsi";
224
225 #address-cells = <1>;
226 #size-cells = <0>;
227
228 ports {
229 #address-cells = <1>;
230 #size-cells = <0>;
231
232 port@0 {
233 reg = <0>;
234
235 mdss_dsi0_in: endpoint {
236 remote-endpoint = <&dpu_intf1_out>;
237 };
238 };
239
240 port@1 {
241 reg = <1>;
242
243 mdss_dsi0_out: endpoint {
244 };
245 };
246 };
247
248 mdss_dsi_opp_table: opp-table {
249 compatible = "operating-points-v2";
250
251 opp-187500000 {
252 opp-hz = /bits/ 64 <187500000>;
253 required-opps = <&rpmhpd_opp_low_svs>;
254 };
255
256 opp-300000000 {
257 opp-hz = /bits/ 64 <300000000>;
258 required-opps = <&rpmhpd_opp_svs>;
259 };
260
261 opp-358000000 {
262 opp-hz = /bits/ 64 <358000000>;
263 required-opps = <&rpmhpd_opp_svs_l1>;
264 };
265 };
266 };
267
268 mdss_dsi0_phy: phy@ae95000 {
269 compatible = "qcom,milos-dsi-phy-4nm";
270 reg = <0x0ae95000 0x200>,
271 <0x0ae95200 0x300>,
272 <0x0ae95500 0x400>;
273 reg-names = "dsi_phy",
274 "dsi_phy_lane",
275 "dsi_pll";
276
277 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
278 <&rpmhcc RPMH_CXO_CLK>;
279 clock-names = "iface",
280 "ref";
281
282 #clock-cells = <1>;
283 #phy-cells = <0>;
284 };
285 };
286...
Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml+4−2
@@ -200,9 +200,11 @@ examples: · 199 unmodified lines
200 <0x0aec2000 0x1c8>;200 <0x0aec2000 0x1c8>;
201 201
202 clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,202 clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
203 <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>;203 <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
204 <&gcc GCC_EDP_REF_CLKREF_EN>;
204 clock-names = "aux",205 clock-names = "aux",
205 "cfg_ahb";206 "cfg_ahb",
207 "ref";
206 208
207 #clock-cells = <1>;209 #clock-cells = <1>;
208 #phy-cells = <0>;210 #phy-cells = <0>;
Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml+2−1
@@ -18,6 +18,7 @@ properties: · 17 unmodified lines
18 - qcom,eliza-dpu18 - qcom,eliza-dpu
19 - qcom,glymur-dpu19 - qcom,glymur-dpu
20 - qcom,kaanapali-dpu20 - qcom,kaanapali-dpu
21 - qcom,milos-dpu
21 - qcom,sa8775p-dpu22 - qcom,sa8775p-dpu
22 - qcom,sm8650-dpu23 - qcom,sm8650-dpu
23 - qcom,sm8750-dpu24 - qcom,sm8750-dpu
@@ -70,7 +71,7 @@ examples: · 46 unmodified lines
70 display-controller@ae01000 {71 display-controller@ae01000 {
71 compatible = "qcom,sm8650-dpu";72 compatible = "qcom,sm8650-dpu";
72 reg = <0x0ae01000 0x8f000>,73 reg = <0x0ae01000 0x8f000>,
73 <0x0aeb0000 0x2008>;74 <0x0aeb0000 0x3000>;
74 reg-names = "mdp", "vbif";75 reg-names = "mdp", "vbif";
75 76
76 clocks = <&gcc_axi_clk>,77 clocks = <&gcc_axi_clk>,
Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.yaml+1−1
@@ -112,7 +112,7 @@ examples: · 111 unmodified lines
112 display-controller@ae01000 {112 display-controller@ae01000 {
113 compatible = "qcom,sm8650-dpu";113 compatible = "qcom,sm8650-dpu";
114 reg = <0x0ae01000 0x8f000>,114 reg = <0x0ae01000 0x8f000>,
115 <0x0aeb0000 0x2008>;115 <0x0aeb0000 0x3000>;
116 reg-names = "mdp", "vbif";116 reg-names = "mdp", "vbif";
117 117
118 clocks = <&gcc_axi_clk>,118 clocks = <&gcc_axi_clk>,
Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml+10−6
@@ -117,7 +117,7 @@ examples: · 116 unmodified lines
117 display-controller@ae01000 {117 display-controller@ae01000 {
118 compatible = "qcom,sm8750-dpu";118 compatible = "qcom,sm8750-dpu";
119 reg = <0x0ae01000 0x93000>,119 reg = <0x0ae01000 0x93000>,
120 <0x0aeb0000 0x2008>;120 <0x0aeb0000 0x3000>;
121 reg-names = "mdp",121 reg-names = "mdp",
122 "vbif";122 "vbif";
123 123
@@ -389,11 +389,15 @@ examples: · 265 unmodified lines
389 389
390 displayport-controller@af54000 {390 displayport-controller@af54000 {
391 compatible = "qcom,sm8750-dp", "qcom,sm8650-dp";391 compatible = "qcom,sm8750-dp", "qcom,sm8650-dp";
392 reg = <0xaf54000 0x104>,392 reg = <0x0af54000 0x200>,
393 <0xaf54200 0xc0>,393 <0x0af54200 0x200>,
394 <0xaf55000 0x770>,394 <0x0af55000 0xc00>,
395 <0xaf56000 0x9c>,395 <0x0af56000 0x400>,
396 <0xaf57000 0x9c>;396 <0x0af57000 0x400>,
397 <0x0af58000 0x400>,
398 <0x0af59000 0x400>,
399 <0x0af5a000 0x600>,
400 <0x0af5b000 0x600>;
397 401
398 interrupts-extended = <&mdss 12>;402 interrupts-extended = <&mdss 12>;
399 403
Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml+67−0
@@ -0,0 +1,67 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/panel/chipwealth,ch13726a.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Chip Wealth Technology CH13726A AMOLED driver
8
9maintainers:
10 - Neil Armstrong <neil.armstrong@linaro.org>
11
12description:
13 Chip Wealth Technology CH13726A is a single-chip solution
14 for AMOLED connected using a MIPI-DSI video interface.
15
16allOf:
17 - $ref: panel-common.yaml#
18
19properties:
20 compatible:
21 items:
22 - const: ayntec,thor-panel-bottom
23 - const: chipwealth,ch13726a
24
25 reg:
26 maxItems: 1
27 description: DSI virtual channel
28
29 vdd-supply: true
30 vddio-supply: true
31 vdd1v2-supply: true
32 avdd-supply: true
33
34 port: true
35 reset-gpios: true
36 rotation: true
37
38required:
39 - compatible
40 - reg
41 - vdd-supply
42 - vddio-supply
43 - vdd1v2-supply
44 - avdd-supply
45 - reset-gpios
46
47additionalProperties: false
48
49examples:
50 - |
51 #include <dt-bindings/gpio/gpio.h>
52
53 dsi {
54 #address-cells = <1>;
55 #size-cells = <0>;
56 panel@0 {
57 compatible = "ayntec,thor-panel-bottom", "chipwealth,ch13726a";
58 reg = <0>;
59 vdd1v2-supply = <&vreg_l11b_1p2>;
60 vddio-supply = <&vdd_disp_1v8>;
61 vdd-supply = <&vreg_l13b_3p0>;
62 avdd-supply = <&vdd_disp2_2v8>;
63 reset-gpios = <&tlmm 133 GPIO_ACTIVE_HIGH>;
64 };
65 };
66
67...
Documentation/devicetree/bindings/display/panel/focaltech,ota7290b.yaml+70−0
@@ -0,0 +1,70 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/panel/focaltech,ota7290b.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Focaltech OTA7290B DSI panels
8
9maintainers:
10 - Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
11
12allOf:
13 - $ref: panel-common.yaml#
14
15properties:
16 compatible:
17 const: waveshare,8.8-dsi-touch-a
18
19 reg:
20 maxItems: 1
21
22 vdd-supply:
23 description: supply regulator for VDD, usually 3.3V
24
25 vdda-supply:
26 description: supply regulator for VDDA, 7-10V
27
28 vcc-supply:
29 description: supply regulator for VCCIO, usually 1.5V
30
31 reset-gpios: true
32 backlight: true
33 rotation: true
34 port: true
35
36required:
37 - compatible
38 - reg
39 - vdd-supply
40 - vcc-supply
41 - reset-gpios
42
43additionalProperties: false
44
45examples:
46 - |
47 #include <dt-bindings/gpio/gpio.h>
48
49 dsi {
50 #address-cells = <1>;
51 #size-cells = <0>;
52
53 panel@0 {
54 compatible = "waveshare,8.8-dsi-touch-a";
55 reg = <0>;
56 vdd-supply = <&vdd>;
57 vcc-supply = <&vccio>;
58 reset-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
59 backlight = <&backlight>;
60
61 port {
62 endpoint {
63 remote-endpoint = <&mipi_out_panel>;
64 };
65 };
66 };
67 };
68
69...
70
Documentation/devicetree/bindings/display/panel/himax,hx83102.yaml+2−0
@@ -30,6 +30,8 @@ properties: · 29 unmodified lines
30 - starry,2082109qfh040022-50e30 - starry,2082109qfh040022-50e
31 # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel31 # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
32 - starry,himax83102-j0232 - starry,himax83102-j02
33 # Waveshare 12.3-DSI-TOUCH-A panel
34 - waveshare,12.3-dsi-touch-a
33 - const: himax,hx8310235 - const: himax,hx83102
34 36
35 reg:37 reg:
Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml+2−0
@@ -23,6 +23,8 @@ properties: · 22 unmodified lines
23 - hannstar,hsd060bhw423 - hannstar,hsd060bhw4
24 - microchip,ac40t08a-mipi-panel24 - microchip,ac40t08a-mipi-panel
25 - powkiddy,x55-panel25 - powkiddy,x55-panel
26 - waveshare,5.0-dsi-touch-a
27 - waveshare,5.5-dsi-touch-a
26 - const: himax,hx839428 - const: himax,hx8394
27 - items:29 - items:
28 - enum:30 - enum:
Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml+2−0
@@ -24,6 +24,7 @@ properties: · 23 unmodified lines
24 - raspberrypi,dsi-7inch24 - raspberrypi,dsi-7inch
25 - startek,kd050hdfia02025 - startek,kd050hdfia020
26 - tdo,tl050hdv3526 - tdo,tl050hdv35
27 - waveshare,7.0-dsi-touch-a
27 - wanchanglong,w552946aaa28 - wanchanglong,w552946aaa
28 - wanchanglong,w552946aba29 - wanchanglong,w552946aba
29 - const: ilitek,ili9881c30 - const: ilitek,ili9881c
@@ -34,6 +35,7 @@ properties: · 4 unmodified lines
34 backlight: true35 backlight: true
35 port: true36 port: true
36 power-supply: true37 power-supply: true
38 iovcc-supply: true
37 reset-gpios: true39 reset-gpios: true
38 rotation: true40 rotation: true
39 41
Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml+6−0
@@ -24,6 +24,12 @@ properties: · 23 unmodified lines
24 - radxa,display-10hd-ad00124 - radxa,display-10hd-ad001
25 - radxa,display-8hd-ad00225 - radxa,display-8hd-ad002
26 - taiguanck,xti05101-01a26 - taiguanck,xti05101-01a
27 - waveshare,3.4-dsi-touch-c
28 - waveshare,4.0-dsi-touch-c
29 - waveshare,8.0-dsi-touch-a
30 - waveshare,9.0-dsi-touch-b
31 - waveshare,10.1-dsi-touch-a
32 - waveshare,10.1-dsi-touch-b
27 - const: jadard,jd9365da-h333 - const: jadard,jd9365da-h3
28 34
29 reg:35 reg:
Documentation/devicetree/bindings/display/panel/novatek,nt35532.yaml+80−0
@@ -0,0 +1,80 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/panel/novatek,nt35532.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Novatek NT35532-based DSI display panels
8
9maintainers:
10 - Cristian Cozzolino <cristian_ci@protonmail.com>
11
12allOf:
13 - $ref: panel-common.yaml#
14
15properties:
16 compatible:
17 items:
18 - enum:
19 - flipkart,rimob-panel-nt35532-cs
20 - const: novatek,nt35532
21
22 reg:
23 maxItems: 1
24
25 backlight: true
26 reset-gpios: true
27
28 avdd-supply:
29 description: positive boost supply regulator
30
31 avee-supply:
32 description: negative boost supply regulator
33
34 vci-supply:
35 description: regulator that supplies the analog voltage
36
37 vddam-supply:
38 description: power supply for MIPI interface
39
40 vddi-supply:
41 description: regulator that supplies the I/O voltage
42
43 port: true
44
45required:
46 - compatible
47 - reg
48 - reset-gpios
49 - vddi-supply
50 - port
51
52additionalProperties: false
53
54examples:
55 - |
56 #include <dt-bindings/gpio/gpio.h>
57
58 dsi {
59 #address-cells = <1>;
60 #size-cells = <0>;
61
62 panel@0 {
63 compatible = "flipkart,rimob-panel-nt35532-cs", "novatek,nt35532";
64 reg = <0>;
65
66 backlight = <&pmi8950_wled>;
67 reset-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
68 avdd-supply = <&lab>;
69 avee-supply = <&ibb>;
70 vci-supply = <&pm8953_l17>;
71 vddi-supply = <&pm8953_l6>;
72
73 port {
74 panel_in: endpoint {
75 remote-endpoint = <&dsi0_out>;
76 };
77 };
78 };
79 };
80...
Documentation/devicetree/bindings/display/panel/panel-lvds.yaml+4−0
@@ -58,6 +58,10 @@ properties: · 57 unmodified lines
58 - hydis,hv070wx2-1e058 - hydis,hv070wx2-1e0
59 # Jenson Display BL-JT60050-01A 7" WSVGA (1024x600) color TFT LCD LVDS panel59 # Jenson Display BL-JT60050-01A 7" WSVGA (1024x600) color TFT LCD LVDS panel
60 - jenson,bl-jt60050-01a60 - jenson,bl-jt60050-01a
61 # Riverdi RVT101HVLNWC00 10.1" WXGA (1280x800) TFT LCD LVDS panel
62 - riverdi,rvt101hvlnwc00
63 # Riverdi RVT70HSLNWCA0 7.0" WSVGA (1024x600) TFT LCD LVDS panel
64 - riverdi,rvt70hslnwca0
61 # Samsung LTN070NL01 7.0" WSVGA (1024x600) TFT LCD LVDS panel65 # Samsung LTN070NL01 7.0" WSVGA (1024x600) TFT LCD LVDS panel
62 - samsung,ltn070nl0166 - samsung,ltn070nl01
63 # Samsung LTN101AL03 10.1" WXGA (800x1280) TFT LCD LVDS panel67 # Samsung LTN101AL03 10.1" WXGA (800x1280) TFT LCD LVDS panel
Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml+2−0
@@ -63,6 +63,8 @@ properties: · 62 unmodified lines
63 - samsung,s6e3fa7-ams559nk0663 - samsung,s6e3fa7-ams559nk06
64 # Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel64 # Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel
65 - tdo,tl070wsh3065 - tdo,tl070wsh30
66 # Team Source Display Technology 7" TST070WSBE-196C 1024x600 TFT LCD panel
67 - team-source-display,tst070wsbe-196c
66 68
67 reg:69 reg:
68 maxItems: 170 maxItems: 1
Documentation/devicetree/bindings/display/panel/panel-simple.yaml+36−0
@@ -31,6 +31,8 @@ properties: · 30 unmodified lines
31 31
32 # Ampire AM-1280800N3TZQW-T00H 10.1" WQVGA TFT LCD panel32 # Ampire AM-1280800N3TZQW-T00H 10.1" WQVGA TFT LCD panel
33 - ampire,am-1280800n3tzqw-t00h33 - ampire,am-1280800n3tzqw-t00h
34 # Ampire AM-1280800W8TZQW-T00H 10.1" WXGA TFT LCD panel
35 - ampire,am-1280800w8tzqw-t00h
34 # Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel36 # Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel
35 - ampire,am-480272h3tmqw-t01h37 - ampire,am-480272h3tmqw-t01h
36 # Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel38 # Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel
@@ -97,6 +99,8 @@ properties: · 60 unmodified lines
97 - dataimage,fg1001l0dsswmg0199 - dataimage,fg1001l0dsswmg01
98 # DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface.100 # DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface.
99 - dataimage,scf0700c48ggu18101 - dataimage,scf0700c48ggu18
102 # Displaytech DT050BTFT-PTS 5.0" 800x480 TFT LCD Panel
103 - displaytech,dt050btft-pts
100 # DLC Display Co. DLC1010GIG 10.1" WXGA TFT LCD Panel104 # DLC Display Co. DLC1010GIG 10.1" WXGA TFT LCD Panel
101 - dlc,dlc1010gig105 - dlc,dlc1010gig
102 # Emerging Display Technology Corp. 3.5" QVGA TFT LCD panel106 # Emerging Display Technology Corp. 3.5" QVGA TFT LCD panel
@@ -232,6 +236,8 @@ properties: · 129 unmodified lines
232 - nec,nl12880bc20-05236 - nec,nl12880bc20-05
233 # NEC LCD Technologies,Ltd. WQVGA TFT LCD panel237 # NEC LCD Technologies,Ltd. WQVGA TFT LCD panel
234 - nec,nl4827hc19-05b238 - nec,nl4827hc19-05b
239 # NEC LCD Technologies,Ltd. VGA TFT LCD panel
240 - nec,nl6448bc33-70c
235 # Netron-DY E231732 7.0" WSVGA TFT LCD panel241 # Netron-DY E231732 7.0" WSVGA TFT LCD panel
236 - netron-dy,e231732242 - netron-dy,e231732
237 # Newhaven Display International 480 x 272 TFT LCD panel243 # Newhaven Display International 480 x 272 TFT LCD panel
@@ -304,6 +310,8 @@ properties: · 66 unmodified lines
304 - shelly,sca07010-bfn-lnn310 - shelly,sca07010-bfn-lnn
305 # Starry KR070PE2T 7" WVGA TFT LCD panel311 # Starry KR070PE2T 7" WVGA TFT LCD panel
306 - starry,kr070pe2t312 - starry,kr070pe2t
313 # Startek KD070HDFLD092 7" WSVGA TFT LCD panel
314 - startek,kd070hdfld092
307 # Startek KD070WVFPA043-C069A 7" TFT LCD panel315 # Startek KD070WVFPA043-C069A 7" TFT LCD panel
308 - startek,kd070wvfpa316 - startek,kd070wvfpa
309 # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel317 # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel
@@ -341,10 +349,38 @@ properties: · 31 unmodified lines
341 - vivax,tpc9150-panel349 - vivax,tpc9150-panel
342 # VXT 800x480 color TFT LCD panel350 # VXT 800x480 color TFT LCD panel
343 - vxt,vl050-8048nt-c01351 - vxt,vl050-8048nt-c01
352 # Waveshare 10.1" WXGA (1280x800) LCD panel
353 - waveshare,10.1inch-c-panel
354 # Waveshare 11.9" (320x1480) LCD panel
355 - waveshare,11.9inch-panel
344 # Waveshare 13.3" FHD (1920x1080) LCD panel356 # Waveshare 13.3" FHD (1920x1080) LCD panel
345 - waveshare,13.3inch-panel357 - waveshare,13.3inch-panel
358 # Waveshare 2.8" VGA (480x640) LCD panel
359 - waveshare,2.8inch-panel
360 # Waveshare 3.4" (800x800) LCD panel
361 - waveshare,3.4inch-c-panel
362 # Waveshare 4.0" WVGA (480x800) LCD panel
363 - waveshare,4.0inch-panel
364 # Waveshare 4.0" (720x720) LCD panel
365 - waveshare,4.0inch-c-panel
366 # Waveshare 5.0" WSVGA (1024x600) LCD panel
367 - waveshare,5.0inch-c-panel
368 # Waveshare 5.0" HD 720p (720x1280) LCD panel
369 - waveshare,5.0inch-d-panel
370 # Waveshare 6.25" (720x1560) LCD panel
371 - waveshare,6.25inch-panel
346 # Waveshare 7.0" WSVGA (1024x600) LCD panel372 # Waveshare 7.0" WSVGA (1024x600) LCD panel
347 - waveshare,7.0inch-c-panel373 - waveshare,7.0inch-c-panel
374 # Waveshare 7.0" WXGA (1280x800) LCD panel
375 - waveshare,7.0inch-e-panel
376 # Waveshare 7.0" HD 720p (720x1280) LCD panel
377 - waveshare,7.0inch-h-panel
378 # Waveshare 7.9" (400x1280) LCD panel
379 - waveshare,7.9inch-panel
380 # Waveshare 8.0" WXGA (1280x800) LCD panel
381 - waveshare,8.0inch-c-panel
382 # Waveshare 8.8" (480x1920) LCD panel
383 - waveshare,8.8inch-panel
348 # Winstar Display Corporation 3.5" QVGA (320x240) TFT LCD panel384 # Winstar Display Corporation 3.5" QVGA (320x240) TFT LCD panel
349 - winstar,wf35ltiacd385 - winstar,wf35ltiacd
350 # Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel386 # Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel
Documentation/devicetree/bindings/display/panel/samsung,sofef01-m.yaml+94−0
@@ -0,0 +1,94 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/panel/samsung,sofef01-m.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung SOFEF01-M DDI for 1080x2520@60Hz 6.0"/6.1" OLED DSI panels
8
9maintainers:
10 - Marijn Suijten <marijn.suijten@somainline.org>
11
12description: |
13 Samsung SOFEF01-M Display-Driver-IC found in multiple Sony smartphones, paired with
14 the following panel:
15 - Sony Xperia 5 (kumano bahamut): amb609tc01
16 - Sony Xperia 10 II (seine pdx201): ams597ut01
17 - Sony Xperia 10 III (lena pdx213): ams597ut04
18 - Sony Xperia 10 IV (murray pdx225): ams597ut05
19 - Sony Xperia 10 V (zambezi pdx235): ams605dk01
20 - Sony Xperia 10 VI (columbia pdx246): ams605dk01
21
22 The assembly features a Samsung touchscreen compatible with
23 samsung,s6sy761.
24
25properties:
26 compatible:
27 enum:
28 - samsung,sofef01-m-amb609tc01 # 6.1"
29 - samsung,sofef01-m-ams597ut01 # 6.0"
30 - samsung,sofef01-m-ams597ut04 # 6.0"
31 - samsung,sofef01-m-ams597ut05 # 6.0"
32 - samsung,sofef01-m-ams605dk01 # 6.1"
33
34 port: true
35
36 reg:
37 maxItems: 1
38 description: DSI virtual channel
39
40 reset-gpios: true
41
42 vci-supply:
43 description: DisplayIC Operation supply (3.0V)
44
45 vddio-supply:
46 description: I/O voltage supply (1.8V)
47
48required:
49 - compatible
50 - port
51 - reg
52 - reset-gpios
53 - vddio-supply
54
55allOf:
56 - $ref: panel-common.yaml#
57 - if:
58 properties:
59 compatible:
60 contains:
61 const: samsung,sofef01-m-amb609tc01
62 then:
63 required:
64 - vci-supply
65 else:
66 properties:
67 vci-supply: false
68
69unevaluatedProperties: false
70
71examples:
72 - |
73 #include <dt-bindings/gpio/gpio.h>
74
75 dsi {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 panel@0 {
79 compatible = "samsung,sofef01-m-amb609tc01";
80 reg = <0>;
81
82 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
83
84 vci-supply = <&vreg_l17a_3p0>;
85 vddio-supply = <&vreg_l14a_1p8>;
86
87 port {
88 endpoint {
89 remote-endpoint = <&dsi0_out>;
90 };
91 };
92 };
93 };
94...
Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml+19−2
@@ -21,6 +21,7 @@ properties: · 20 unmodified lines
21 - renesas,r9a07g043u-du # RZ/G2UL21 - renesas,r9a07g043u-du # RZ/G2UL
22 - renesas,r9a07g044-du # RZ/G2{L,LC}22 - renesas,r9a07g044-du # RZ/G2{L,LC}
23 - renesas,r9a09g057-du # RZ/V2H(P)23 - renesas,r9a09g057-du # RZ/V2H(P)
24 - renesas,r9a09g077-du # RZ/T2H
24 - items:25 - items:
25 - enum:26 - enum:
26 - renesas,r9a07g054-du # RZ/V2L27 - renesas,r9a07g054-du # RZ/V2L
@@ -28,6 +29,9 @@ properties: · 1 unmodified line
28 - items:29 - items:
29 - const: renesas,r9a09g056-du # RZ/V2N30 - const: renesas,r9a09g056-du # RZ/V2N
30 - const: renesas,r9a09g057-du # RZ/V2H(P) fallback31 - const: renesas,r9a09g057-du # RZ/V2H(P) fallback
32 - items:
33 - const: renesas,r9a09g087-du # RZ/N2H
34 - const: renesas,r9a09g077-du # RZ/T2H fallback
31 35
32 reg:36 reg:
33 maxItems: 137 maxItems: 1
@@ -83,7 +87,6 @@ required: · 49 unmodified lines
83 - interrupts87 - interrupts
84 - clocks88 - clocks
85 - clock-names89 - clock-names
86 - resets
87 - power-domains90 - power-domains
88 - ports91 - ports
89 - renesas,vsps92 - renesas,vsps
@@ -95,13 +98,16 @@ allOf: · 5 unmodified lines
95 properties:98 properties:
96 compatible:99 compatible:
97 contains:100 contains:
98 const: renesas,r9a07g043u-du101 enum:
102 - renesas,r9a07g043u-du
103 - renesas,r9a09g077-du
99 then:104 then:
100 properties:105 properties:
101 ports:106 ports:
102 properties:107 properties:
103 port@0:108 port@0:
104 description: DPI109 description: DPI
110 port@1: false
105 111
106 required:112 required:
107 - port@0113 - port@0
@@ -137,6 +143,17 @@ allOf: · 29 unmodified lines
137 143
138 required:144 required:
139 - port@0145 - port@0
146 - if:
147 properties:
148 compatible:
149 contains:
150 const: renesas,r9a09g077-du
151 then:
152 properties:
153 resets: false
154 else:
155 required:
156 - resets
140 157
141examples:158examples:
142 # RZ/G2L DU159 # RZ/G2L DU
Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml+2−0
@@ -41,7 +41,9 @@ properties: · 40 unmodified lines
41 minItems: 141 minItems: 1
42 items:42 items:
43 - description: Extcon device providing the cable state for DP PHY device 043 - description: Extcon device providing the cable state for DP PHY device 0
44 maxItems: 1
44 - description: Extcon device providing the cable state for DP PHY device 145 - description: Extcon device providing the cable state for DP PHY device 1
46 maxItems: 1
45 description:47 description:
46 List of phandle to the extcon device providing the cable state for the DP PHY.48 List of phandle to the extcon device providing the cable state for the DP PHY.
47 49
Documentation/devicetree/bindings/dma/fsl,edma.yaml+9−0
@@ -12,6 +12,9 @@ description: | · 11 unmodified lines
12 DMAMUX0 and DMAMUX1, specific DMA request source can only be multiplexed12 DMAMUX0 and DMAMUX1, specific DMA request source can only be multiplexed
13 by any channel of certain group, DMAMUX0 or DMAMUX1, but not both.13 by any channel of certain group, DMAMUX0 or DMAMUX1, but not both.
14 14
15 This binding has an inverted dma-channel-mask definition compared to
16 the common DMA binding for historical reasons.
17
15maintainers:18maintainers:
16 - Peng Fan <peng.fan@nxp.com>19 - Peng Fan <peng.fan@nxp.com>
17 20
@@ -95,6 +98,12 @@ properties: · 77 unmodified lines
95 eDMA are implemented in big endian mode, otherwise in little mode.98 eDMA are implemented in big endian mode, otherwise in little mode.
96 type: boolean99 type: boolean
97 100
101 dma-channel-mask:
102 description: |
103 Bitmask of available DMA channels (inverted definition).
104 Bit semantics: 0 means channel available, 1 means channel unavailable
105 default: 0
106
98required:107required:
99 - "#dma-cells"108 - "#dma-cells"
100 - compatible109 - compatible
Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml+25−7
@@ -14,17 +14,16 @@ description: | · 13 unmodified lines
14maintainers:14maintainers:
15 - Jon Hunter <jonathanh@nvidia.com>15 - Jon Hunter <jonathanh@nvidia.com>
16 - Rajesh Gumasta <rgumasta@nvidia.com>16 - Rajesh Gumasta <rgumasta@nvidia.com>
17 17 - Akhil R <akhilrajeev@nvidia.com>
18allOf:
19 - $ref: dma-controller.yaml#
20 18
21properties:19properties:
22 compatible:20 compatible:
23 oneOf:21 oneOf:
24 - const: nvidia,tegra186-gpcdma22 - enum:
23 - nvidia,tegra264-gpcdma
24 - nvidia,tegra186-gpcdma
25 - items:25 - items:
26 - enum:26 - enum:
27 - nvidia,tegra264-gpcdma
28 - nvidia,tegra234-gpcdma27 - nvidia,tegra234-gpcdma
29 - nvidia,tegra194-gpcdma28 - nvidia,tegra194-gpcdma
30 - const: nvidia,tegra186-gpcdma29 - const: nvidia,tegra186-gpcdma
@@ -51,6 +50,14 @@ properties: · 20 unmodified lines
51 iommus:50 iommus:
52 maxItems: 151 maxItems: 1
53 52
53 iommu-map:
54 description:
55 Maps DMA channel numbers to IOMMU stream IDs. A single entry can map all
56 channels when stream IDs are contiguous. In systems where the channels or
57 stream IDs are not contiguous, multiple entries may be needed.
58 minItems: 1
59 maxItems: 32
60
54 dma-coherent: true61 dma-coherent: true
55 62
56 dma-channel-mask:63 dma-channel-mask:
@@ -60,12 +67,23 @@ required: · 3 unmodified lines
60 - compatible67 - compatible
61 - reg68 - reg
62 - interrupts69 - interrupts
63 - resets
64 - reset-names
65 - "#dma-cells"70 - "#dma-cells"
66 - iommus71 - iommus
67 - dma-channel-mask72 - dma-channel-mask
68 73
74allOf:
75 - $ref: dma-controller.yaml#
76 - if:
77 properties:
78 compatible:
79 contains:
80 enum:
81 - nvidia,tegra186-gpcdma
82 then:
83 required:
84 - resets
85 - reset-names
86
69additionalProperties: false87additionalProperties: false
70 88
71examples:89examples:
Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml+21−0
@@ -23,6 +23,8 @@ properties: · 22 unmodified lines
23 - qcom,bam-v1.4.023 - qcom,bam-v1.4.0
24 # MSM8916, SDM63024 # MSM8916, SDM630
25 - qcom,bam-v1.7.025 - qcom,bam-v1.7.0
26 # Kaanapali
27 - qcom,bam-v2.0.0
26 - items:28 - items:
27 - enum:29 - enum:
28 # SDM845, SM6115, SM8150, SM8250 and QCM229030 # SDM845, SM6115, SM8150, SM8250 and QCM2290
@@ -118,4 +120,23 @@ examples: · 89 unmodified lines
118 #dma-cells = <1>;120 #dma-cells = <1>;
119 qcom,ee = <0>;121 qcom,ee = <0>;
120 };122 };
123 - |
124 #include <dt-bindings/interrupt-controller/arm-gic.h>
125
126 soc {
127 #address-cells = <2>;
128 #size-cells = <2>;
129
130 dma-controller@1dc4000 {
131 compatible = "qcom,bam-v2.0.0";
132 reg = <0x0 0x01dc4000 0x0 0x22000>;
133 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
134 #dma-cells = <1>;
135 iommus = <&apps_smmu 0xc0 0>, <&apps_smmu 0xc1 0>;
136 qcom,ee = <0>;
137 qcom,num-ees = <4>;
138 num-channels = <20>;
139 qcom,controlled-remotely;
140 };
141 };
121...142...
Documentation/devicetree/bindings/dma/qcom,gpi.yaml+3−0
@@ -24,7 +24,9 @@ properties: · 23 unmodified lines
24 - qcom,sm6350-gpi-dma24 - qcom,sm6350-gpi-dma
25 - items:25 - items:
26 - enum:26 - enum:
27 - qcom,eliza-gpi-dma
27 - qcom,glymur-gpi-dma28 - qcom,glymur-gpi-dma
29 - qcom,hawi-gpi-dma
28 - qcom,kaanapali-gpi-dma30 - qcom,kaanapali-gpi-dma
29 - qcom,milos-gpi-dma31 - qcom,milos-gpi-dma
30 - qcom,qcm2290-gpi-dma32 - qcom,qcm2290-gpi-dma
@@ -35,6 +37,7 @@ properties: · 4 unmodified lines
35 - qcom,sc7280-gpi-dma37 - qcom,sc7280-gpi-dma
36 - qcom,sc8280xp-gpi-dma38 - qcom,sc8280xp-gpi-dma
37 - qcom,sdx75-gpi-dma39 - qcom,sdx75-gpi-dma
40 - qcom,shikra-gpi-dma
38 - qcom,sm6115-gpi-dma41 - qcom,sm6115-gpi-dma
39 - qcom,sm6375-gpi-dma42 - qcom,sm6375-gpi-dma
40 - qcom,sm8350-gpi-dma43 - qcom,sm8350-gpi-dma
Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml+3−2
@@ -21,11 +21,12 @@ properties: · 20 unmodified lines
21 - enum:21 - enum:
22 - snps,axi-dma-1.01a22 - snps,axi-dma-1.01a
23 - intel,kmb-axi-dma23 - intel,kmb-axi-dma
24 - sophgo,cv1800b-axi-dma
25 - starfive,jh7110-axi-dma24 - starfive,jh7110-axi-dma
26 - starfive,jh8100-axi-dma25 - starfive,jh8100-axi-dma
27 - items:26 - items:
28 - const: altr,agilex5-axi-dma27 - enum:
28 - altr,agilex5-axi-dma
29 - sophgo,cv1800b-axi-dma
29 - const: snps,axi-dma-1.01a30 - const: snps,axi-dma-1.01a
30 31
31 reg:32 reg:
Documentation/devicetree/bindings/dma/spacemit,k1-pdma.yaml+3−1
@@ -14,7 +14,9 @@ allOf: · 13 unmodified lines
14 14
15properties:15properties:
16 compatible:16 compatible:
17 const: spacemit,k1-pdma17 enum:
18 - spacemit,k1-pdma
19 - spacemit,k3-pdma
18 20
19 reg:21 reg:
20 maxItems: 122 maxItems: 1
Documentation/devicetree/bindings/dma/stericsson,dma40.yaml+2−6
@@ -136,13 +136,9 @@ properties: · 135 unmodified lines
136 maxItems: 1136 maxItems: 1
137 137
138 sram:138 sram:
139 $ref: /schemas/types.yaml#/definitions/phandle-array
140 description: A phandle array with inner size 1 (no arg cells).
141 First phandle is the LCPA (Logical Channel Parameter Address) memory.
142 Second phandle is the LCLA (Logical Channel Link base Address) memory.
143 maxItems: 2
144 items:139 items:
145 maxItems: 1140 - description: LCPA (Logical Channel Parameter Address) memory.
141 - description: LCLA (Logical Channel Link base Address) memory.
146 142
147 memcpy-channels:143 memcpy-channels:
148 $ref: /schemas/types.yaml#/definitions/uint32-array144 $ref: /schemas/types.yaml#/definitions/uint32-array
Documentation/devicetree/bindings/embedded-controller/microsoft,surface-rt-ec.yaml+63−0
@@ -0,0 +1,63 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/embedded-controller/microsoft,surface-rt-ec.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microsoft Surface RT fuel gauge and charger EC
8
9maintainers:
10 - Jonas Schwöbel <jonasschwoebel@yahoo.de>
11 - Svyatoslav Ryhel <clamor95@gmail.com>
12
13description:
14 An Embedded Controller used in Microsoft Surface RT for monitoring
15 battery properties and charger status.
16
17allOf:
18 - $ref: /schemas/power/supply/power-supply.yaml#
19
20properties:
21 compatible:
22 const: microsoft,surface-rt-ec
23
24 reg:
25 maxItems: 1
26
27 interrupts:
28 maxItems: 1
29
30 enable-gpios:
31 maxItems: 1
32
33 monitored-battery: true
34
35required:
36 - compatible
37 - reg
38 - interrupts
39 - enable-gpios
40
41additionalProperties: false
42
43examples:
44 - |
45 #include <dt-bindings/gpio/gpio.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
47
48 i2c {
49 #address-cells = <1>;
50 #size-cells = <0>;
51
52 embedded-controller@a {
53 compatible = "microsoft,surface-rt-ec";
54 reg = <0x0a>;
55
56 interrupt-parent = <&gpio>;
57 interrupts = <74 IRQ_TYPE_EDGE_RISING>;
58
59 enable-gpios = <&gpio 88 GPIO_ACTIVE_HIGH>;
60 monitored-battery = <&battery>;
61 };
62 };
63...
Documentation/devicetree/bindings/embedded-controller/qcom,hamoa-crd-ec.yaml+56−0
@@ -0,0 +1,56 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/embedded-controller/qcom,hamoa-crd-ec.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Hamoa Embedded Controller
8
9maintainers:
10 - Sibi Sankar <sibi.sankar@oss.qualcomm.com>
11 - Anvesh Jain P <anvesh.p@oss.qualcomm.com>
12
13description:
14 Qualcomm Snapdragon based Hamoa/Purwa and Glymur reference devices have an
15 EC running on different MCU chips. The EC handles things like fan control,
16 temperature sensors, access to EC internal state changes.
17
18properties:
19 compatible:
20 oneOf:
21 - items:
22 - enum:
23 - qcom,glymur-crd-ec
24 - qcom,hamoa-iot-evk-ec
25 - const: qcom,hamoa-crd-ec
26 - enum:
27 - qcom,hamoa-crd-ec
28
29 reg:
30 const: 0x76
31
32 interrupts:
33 maxItems: 1
34
35required:
36 - compatible
37 - reg
38 - interrupts
39
40additionalProperties: false
41
42examples:
43 - |
44 #include <dt-bindings/interrupt-controller/irq.h>
45 i2c {
46 #address-cells = <1>;
47 #size-cells = <0>;
48
49 embedded-controller@76 {
50 compatible = "qcom,hamoa-crd-ec";
51 reg = <0x76>;
52
53 interrupts-extended = <&tlmm 66 IRQ_TYPE_LEVEL_HIGH>;
54 };
55 };
56...
Documentation/devicetree/bindings/extcon/samsung,s2mu005-muic.yaml+40−0
@@ -0,0 +1,40 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/extcon/samsung,s2mu005-muic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MUIC Device for Samsung S2M series PMICs
8
9maintainers:
10 - Kaustabh Chakraborty <kauschluss@disroot.org>
11
12description: |
13 The Samsung S2M series PMIC MUIC device is a USB port accessory
14 detector. It reports multiple states depending on the ID-GND
15 resistance measured by an internal ADC.
16
17 This is a part of device tree bindings for S2M and S5M family of Power
18 Management IC (PMIC).
19
20 See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
21 additional information and example.
22
23properties:
24 compatible:
25 enum:
26 - samsung,s2mu005-muic
27
28 connector:
29 $ref: /schemas/connector/usb-connector.yaml#
30
31 port:
32 $ref: /schemas/graph.yaml#/properties/port
33 description: Port connecting to the USB controller or PHY.
34
35required:
36 - compatible
37 - connector
38 - port
39
40additionalProperties: false
Documentation/devicetree/bindings/firmware/qcom,scm.yaml+3−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
25 - qcom,scm-apq808425 - qcom,scm-apq8084
26 - qcom,scm-eliza26 - qcom,scm-eliza
27 - qcom,scm-glymur27 - qcom,scm-glymur
28 - qcom,scm-hawi
28 - qcom,scm-ipq401929 - qcom,scm-ipq4019
29 - qcom,scm-ipq501830 - qcom,scm-ipq5018
30 - qcom,scm-ipq521031 - qcom,scm-ipq5210
@@ -49,6 +50,7 @@ properties: · 18 unmodified lines
49 - qcom,scm-msm899450 - qcom,scm-msm8994
50 - qcom,scm-msm899651 - qcom,scm-msm8996
51 - qcom,scm-msm899852 - qcom,scm-msm8998
53 - qcom,scm-nord
52 - qcom,scm-qcm229054 - qcom,scm-qcm2290
53 - qcom,scm-qcs61555 - qcom,scm-qcs615
54 - qcom,scm-qcs830056 - qcom,scm-qcs8300
@@ -208,6 +210,7 @@ allOf: · 153 unmodified lines
208 contains:210 contains:
209 enum:211 enum:
210 - qcom,scm-eliza212 - qcom,scm-eliza
213 - qcom,scm-hawi
211 - qcom,scm-kaanapali214 - qcom,scm-kaanapali
212 - qcom,scm-milos215 - qcom,scm-milos
213 - qcom,scm-sm8450216 - qcom,scm-sm8450
Documentation/devicetree/bindings/fpga/altera-pr-ip.txt+0−12
@@ -1,12 +0,0 @@
1Altera Arria10 Partial Reconfiguration IP
2
3Required properties:
4- compatible : should contain "altr,a10-pr-ip"
5- reg : base address and size for memory mapped io.
6
7Example:
8
9 fpga_mgr: fpga-mgr@ff20c000 {
10 compatible = "altr,a10-pr-ip";
11 reg = <0xff20c000 0x10>;
12 };
Documentation/devicetree/bindings/fpga/altera-socfpga-fpga-mgr.txt+0−17
@@ -1,17 +0,0 @@
1Altera SOCFPGA FPGA Manager
2
3Required properties:
4- compatible : should contain "altr,socfpga-fpga-mgr"
5- reg : base address and size for memory mapped io.
6 - The first index is for FPGA manager register access.
7 - The second index is for writing FPGA configuration data.
8- interrupts : interrupt for the FPGA Manager device.
9
10Example:
11
12 hps_0_fpgamgr: fpgamgr@ff706000 {
13 compatible = "altr,socfpga-fpga-mgr";
14 reg = <0xFF706000 0x1000
15 0xFFB90000 0x1000>;
16 interrupts = <0 175 4>;
17 };
Documentation/devicetree/bindings/fpga/altr,a10-pr-ip.yaml+34−0
@@ -0,0 +1,34 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/fpga/altr,a10-pr-ip.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Altera Arria10 Partial Reconfiguration IP
8
9maintainers:
10 - Matthew Gerlach <matthew.gerlach@linux.intel.com>
11
12description:
13 The Altera Arria 10 Partial Reconfiguration IP core allows the host
14 processor to perform partial reconfiguration of the FPGA fabric.
15
16properties:
17 compatible:
18 const: altr,a10-pr-ip
19
20 reg:
21 maxItems: 1
22
23required:
24 - compatible
25 - reg
26
27additionalProperties: false
28
29examples:
30 - |
31 fpga-mgr@ff20c000 {
32 compatible = "altr,a10-pr-ip";
33 reg = <0xff20c000 0x10>;
34 };
Documentation/devicetree/bindings/fpga/altr,socfpga-fpga-mgr.yaml+38−0
@@ -0,0 +1,38 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/fpga/altr,socfpga-fpga-mgr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Altera SOCFPGA FPGA Manager
8
9maintainers:
10 - Steffen Trumtrar <s.trumtrar@pengutronix.de>
11
12properties:
13 compatible:
14 const: altr,socfpga-fpga-mgr
15
16 reg:
17 items:
18 - description: FPGA manager register access
19 - description: Writing FPGA configuration data
20
21 interrupts:
22 maxItems: 1
23
24required:
25 - compatible
26 - reg
27 - interrupts
28
29additionalProperties: false
30
31examples:
32 - |
33 fpgamgr@ff706000 {
34 compatible = "altr,socfpga-fpga-mgr";
35 reg = <0xff706000 0x1000>,
36 <0xffb90000 0x1000>;
37 interrupts = <0 175 4>;
38 };
Documentation/devicetree/bindings/fpga/efinix,trion-config.yaml+98−0
@@ -0,0 +1,98 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/fpga/efinix,trion-config.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Efinix SPI FPGA Manager
8
9maintainers:
10 - Ian Dannapel <iansdannapel@gmail.com>
11
12description: |
13 Efinix FPGAs (Trion, Topaz, and Titanium families) support loading bitstreams
14 through "SPI Passive Mode".
15 Additional pin hogs for bus width configuration should be set
16 elsewhere, if necessary.
17
18 References:
19 - https://www.efinixinc.com/docs/an006-configuring-trion-fpgas-v6.3.pdf
20 - https://www.efinixinc.com/docs/an033-configuring-titanium-fpgas-v2.8.pdf
21 - https://www.efinixinc.com/docs/an061-configuring-topaz-fpgas-v1.1.pdf
22
23allOf:
24 - $ref: /schemas/spi/spi-peripheral-props.yaml#
25
26properties:
27 compatible:
28 oneOf:
29 - items:
30 - enum:
31 - efinix,titanium-config
32 - efinix,topaz-config
33 - const: efinix,trion-config
34 - const: efinix,trion-config
35
36 spi-cpha: true
37
38 spi-cpol: true
39
40 spi-max-frequency:
41 maximum: 25000000
42
43 reg:
44 maxItems: 1
45
46 reset-gpios:
47 description:
48 reset and re-configuration trigger pin (low active)
49 maxItems: 1
50
51 cdone-gpios:
52 description:
53 optional configuration done status pin (high active)
54 maxItems: 1
55
56required:
57 - compatible
58 - reg
59 - reset-gpios
60 - spi-cpha
61 - spi-cpol
62
63unevaluatedProperties: false
64
65examples:
66 - |
67 #include <dt-bindings/gpio/gpio.h>
68 spi {
69 #address-cells = <1>;
70 #size-cells = <0>;
71 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
72 fpga-mgr@0 {
73 compatible = "efinix,trion-config";
74 reg = <0>;
75 spi-max-frequency = <25000000>;
76 spi-cpha;
77 spi-cpol;
78 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
79 cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
80 };
81 };
82 - |
83 #include <dt-bindings/gpio/gpio.h>
84 spi {
85 #address-cells = <1>;
86 #size-cells = <0>;
87 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
88 fpga-mgr@0 {
89 compatible = "efinix,titanium-config", "efinix,trion-config";
90 reg = <0>;
91 spi-max-frequency = <25000000>;
92 spi-cpha;
93 spi-cpol;
94 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
95 cdone-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
96 };
97 };
98...
Documentation/devicetree/bindings/fpga/technologic,ts7300-fpga.yaml+36−0
@@ -0,0 +1,36 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/fpga/technologic,ts7300-fpga.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Technologic Systems TS-7300 FPGA Manager
8
9maintainers:
10 - Florian Fainelli <f.fainelli@gmail.com>
11
12description:
13 FPGA manager for the Altera Cyclone II FPGA on Technologic Systems
14 TS-7300 board. The FPGA is programmed via the memory-mapped interface
15 implemented in the CPLD.
16
17properties:
18 compatible:
19 const: technologic,ts7300-fpga
20
21 reg:
22 maxItems: 1
23
24required:
25 - compatible
26 - reg
27
28additionalProperties: false
29
30examples:
31 - |
32 fpga-mgr@13c00000 {
33 compatible = "technologic,ts7300-fpga";
34 reg = <0x13c00000 0x2>;
35 };
36...
Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml+13−0
@@ -45,6 +45,18 @@ properties: · 44 unmodified lines
45 $ref: /schemas/types.yaml#/definitions/uint3245 $ref: /schemas/types.yaml#/definitions/uint32
46 description: Number of daisy-chained shift registers46 description: Number of daisy-chained shift registers
47 47
48 lines-initial-states:
49 $ref: /schemas/types.yaml#/definitions/uint32
50 description:
51 Bitmask that specifies the initial state of each output line, written
52 by the driver before the gpiochip is registered. Bit N corresponds to
53 GPIO line N, following the convention already documented for
54 nxp,pcf8575. Because the 74HC595/74LVC594 family is push-pull output
55 only, a bit set to zero drives the line low and a bit set to one
56 drives it high. The bitmask covers up to 32 lines (four cascaded
57 registers); outputs beyond that come up zeroed. When the property is
58 absent all outputs come up low, preserving the previous behaviour.
59
48 enable-gpios:60 enable-gpios:
49 description: GPIO connected to the OE (Output Enable) pin.61 description: GPIO connected to the OE (Output Enable) pin.
50 maxItems: 162 maxItems: 1
@@ -79,6 +91,7 @@ examples: · 28 unmodified lines
79 gpio-controller;91 gpio-controller;
80 #gpio-cells = <2>;92 #gpio-cells = <2>;
81 registers-number = <4>;93 registers-number = <4>;
94 lines-initial-states = <0xffff0000>;
82 spi-max-frequency = <100000>;95 spi-max-frequency = <100000>;
83 };96 };
84 };97 };
Documentation/devicetree/bindings/gpio/gpio-zynq.yaml+14−3
@@ -12,10 +12,11 @@ maintainers: · 11 unmodified lines
12properties:12properties:
13 compatible:13 compatible:
14 enum:14 enum:
15 - xlnx,eio-gpio-1.0
16 - xlnx,pmc-gpio-1.0
17 - xlnx,versal-gpio-1.0
15 - xlnx,zynq-gpio-1.018 - xlnx,zynq-gpio-1.0
16 - xlnx,zynqmp-gpio-1.019 - xlnx,zynqmp-gpio-1.0
17 - xlnx,versal-gpio-1.0
18 - xlnx,pmc-gpio-1.0
19 20
20 reg:21 reg:
21 maxItems: 122 maxItems: 1
@@ -30,7 +31,7 @@ properties: · 8 unmodified lines
30 31
31 gpio-line-names:32 gpio-line-names:
32 description: strings describing the names of each gpio line33 description: strings describing the names of each gpio line
33 minItems: 5834 minItems: 52
34 maxItems: 17435 maxItems: 174
35 36
36 interrupt-controller: true37 interrupt-controller: true
@@ -89,6 +90,16 @@ allOf: · 52 unmodified lines
89 minItems: 11690 minItems: 116
90 maxItems: 11691 maxItems: 116
91 92
93 - if:
94 properties:
95 compatible:
96 enum:
97 - xlnx,eio-gpio-1.0
98 then:
99 properties:
100 gpio-line-names:
101 maxItems: 52
102
92required:103required:
93 - compatible104 - compatible
94 - reg105 - reg
Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml+6−0
@@ -85,6 +85,8 @@ properties: · 84 unmodified lines
85 - nvidia,tegra194-gpio-aon85 - nvidia,tegra194-gpio-aon
86 - nvidia,tegra234-gpio86 - nvidia,tegra234-gpio
87 - nvidia,tegra234-gpio-aon87 - nvidia,tegra234-gpio-aon
88 - nvidia,tegra238-gpio
89 - nvidia,tegra238-gpio-aon
88 - nvidia,tegra256-gpio90 - nvidia,tegra256-gpio
89 - nvidia,tegra264-gpio91 - nvidia,tegra264-gpio
90 - nvidia,tegra264-gpio-uphy92 - nvidia,tegra264-gpio-uphy
@@ -163,6 +165,7 @@ allOf: · 72 unmodified lines
163 - nvidia,tegra186-gpio165 - nvidia,tegra186-gpio
164 - nvidia,tegra194-gpio166 - nvidia,tegra194-gpio
165 - nvidia,tegra234-gpio167 - nvidia,tegra234-gpio
168 - nvidia,tegra238-gpio
166 - nvidia,tegra256-gpio169 - nvidia,tegra256-gpio
167 - nvidia,tegra264-gpio170 - nvidia,tegra264-gpio
168 - nvidia,tegra264-gpio-uphy171 - nvidia,tegra264-gpio-uphy
@@ -180,6 +183,7 @@ allOf: · 11 unmodified lines
180 - nvidia,tegra186-gpio-aon183 - nvidia,tegra186-gpio-aon
181 - nvidia,tegra194-gpio-aon184 - nvidia,tegra194-gpio-aon
182 - nvidia,tegra234-gpio-aon185 - nvidia,tegra234-gpio-aon
186 - nvidia,tegra238-gpio-aon
183 - nvidia,tegra264-gpio-aon187 - nvidia,tegra264-gpio-aon
184 then:188 then:
185 properties:189 properties:
@@ -192,6 +196,8 @@ allOf: · 6 unmodified lines
192 compatible:196 compatible:
193 contains:197 contains:
194 enum:198 enum:
199 - nvidia,tegra238-gpio
200 - nvidia,tegra238-gpio-aon
195 - nvidia,tegra264-gpio201 - nvidia,tegra264-gpio
196 - nvidia,tegra264-gpio-uphy202 - nvidia,tegra264-gpio-uphy
197 - nvidia,tegra264-gpio-aon203 - nvidia,tegra264-gpio-aon
Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml+6−0
@@ -95,6 +95,12 @@ patternProperties: · 94 unmodified lines
95 '#interrupt-cells':95 '#interrupt-cells':
96 const: 296 const: 2
97 97
98 patternProperties:
99 "^.+-hog(-[0-9]+)?$":
100 type: object
101 required:
102 - gpio-hog
103
98 required:104 required:
99 - compatible105 - compatible
100 - reg106 - reg
Documentation/devicetree/bindings/gpio/waveshare,dsi-touch-gpio.yaml+73−0
@@ -0,0 +1,73 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/waveshare,dsi-touch-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Waveshare GPIO controller on DSI TOUCH panels
8
9maintainers:
10 - Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
11
12description:
13 Waveshare DSI TOUCH panel kits contain separate GPIO controller for toggling
14 power supplies and panel / touchscreen resets.
15
16properties:
17 compatible:
18 const: waveshare,dsi-touch-gpio
19
20 reg:
21 maxItems: 1
22
23 gpio-controller: true
24
25 '#gpio-cells':
26 const: 2
27
28required:
29 - compatible
30 - reg
31 - gpio-controller
32 - "#gpio-cells"
33
34additionalProperties: false
35
36examples:
37 - |
38 #include <dt-bindings/gpio/gpio.h>
39
40 i2c {
41 #address-cells = <1>;
42 #size-cells = <0>;
43
44 wsgpio: gpio@45 {
45 compatible = "waveshare,dsi-touch-gpio";
46 reg = <0x45>;
47 gpio-controller;
48 #gpio-cells = <2>;
49 };
50 };
51
52 panel_avdd: regulator-panel-avdd {
53 compatible = "regulator-fixed";
54 regulator-name = "panel-avdd";
55 gpios = <&wsgpio 0 GPIO_ACTIVE_HIGH>;
56 enable-active-high;
57 };
58
59 panel_iovcc: regulator-panel-iovcc {
60 compatible = "regulator-fixed";
61 regulator-name = "panel-iovcc";
62 gpios = <&wsgpio 4 GPIO_ACTIVE_HIGH>;
63 enable-active-high;
64 };
65
66 panel_vcc: regulator-panel-vcc {
67 compatible = "regulator-fixed";
68 regulator-name = "panel-vcc";
69 gpios = <&wsgpio 8 GPIO_ACTIVE_HIGH>;
70 enable-active-high;
71 regulator-always-on;
72 };
73...
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml+2−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - realtek,rtd1619-mali26 - realtek,rtd1619-mali
27 - renesas,r9a07g044-mali27 - renesas,r9a07g044-mali
28 - renesas,r9a07g054-mali28 - renesas,r9a07g054-mali
29 - renesas,r9a08g046-mali
29 - renesas,r9a09g047-mali30 - renesas,r9a09g047-mali
30 - renesas,r9a09g056-mali31 - renesas,r9a09g056-mali
31 - renesas,r9a09g057-mali32 - renesas,r9a09g057-mali
@@ -150,6 +151,7 @@ allOf: · 118 unmodified lines
150 enum:151 enum:
151 - renesas,r9a07g044-mali152 - renesas,r9a07g044-mali
152 - renesas,r9a07g054-mali153 - renesas,r9a07g054-mali
154 - renesas,r9a08g046-mali
153 - renesas,r9a09g047-mali155 - renesas,r9a09g047-mali
154 - renesas,r9a09g056-mali156 - renesas,r9a09g056-mali
155 - renesas,r9a09g057-mali157 - renesas,r9a09g057-mali
Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml+11−0
@@ -15,6 +15,9 @@ description: | · 14 unmodified lines
15 represented by CTRLMMR_xxx_JTAGID register which contains information about15 represented by CTRLMMR_xxx_JTAGID register which contains information about
16 SoC id and revision.16 SoC id and revision.
17 17
18 On some SoCs like AM62P, the silicon revision is determined by reading
19 alternative registers via NVMEM cells.
20
18properties:21properties:
19 $nodename:22 $nodename:
20 pattern: "^chipid@[0-9a-f]+$"23 pattern: "^chipid@[0-9a-f]+$"
@@ -26,6 +29,14 @@ properties: · 5 unmodified lines
26 reg:29 reg:
27 maxItems: 130 maxItems: 1
28 31
32 nvmem-cells:
33 items:
34 - description: Alternate silicon revision register
35
36 nvmem-cell-names:
37 items:
38 - const: gpsw1
39
29required:40required:
30 - compatible41 - compatible
31 - reg42 - reg
Documentation/devicetree/bindings/hwmon/adi,ltc4283.yaml+272−0
@@ -0,0 +1,272 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/hwmon/adi,ltc4283.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: LTC4283 Negative Voltage Hot Swap Controller
8
9maintainers:
10 - Nuno Sá <nuno.sa@analog.com>
11
12description: |
13 The LTC4283 negative voltage hot swap controller drives an external N-channel
14 MOSFET to allow a board to be safely inserted and removed from a live
15 backplane.
16
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4283.pdf
18
19properties:
20 compatible:
21 enum:
22 - adi,ltc4283
23
24 reg:
25 maxItems: 1
26
27 adi,rsense-nano-ohms:
28 description: Value of the sense resistor.
29
30 adi,current-limit-sense-microvolt:
31 description:
32 The current limit sense voltage of the chip is adjustable between
33 15mV and 30mV in 1mV steps. This effectively limits the current
34 on the load.
35 minimum: 15000
36 maximum: 30000
37 default: 15000
38
39 adi,current-limit-foldback-factor:
40 description:
41 Specifies the foldback factor for the current limit. The current limit
42 can be reduced (folded back) to one of four preset levels. The value
43 represents the percentage of the current limit sense voltage to use
44 during foldback. A value of 100 means no foldback.
45 $ref: /schemas/types.yaml#/definitions/uint32
46 enum: [10, 20, 50, 100]
47 default: 100
48
49 adi,cooling-delay-ms:
50 description:
51 Cooling time to apply after an overcurrent fault, FET bad or
52 external fault.
53 enum: [512, 1002, 2005, 4100, 8190, 16400, 32800, 65600]
54 default: 512
55
56 adi,fet-bad-timer-delay-ms:
57 description:
58 FET bad timer delay. After a FET bad status condition is detected,
59 this timer is started. If the condition persists for the
60 specified time, the FET is turned off and a fault is logged.
61 enum: [256, 512, 1002, 2005]
62 default: 256
63
64 adi,power-good-reset-on-fet:
65 description:
66 If set, resets the power good status when the MOSFET is turned off.
67 Otherwise, it resets when a low output voltage is detected.
68 type: boolean
69
70 adi,fet-turn-off-disable:
71 description:
72 If set, the MOSFET is not turned off when a FET fault is detected.
73 type: boolean
74
75 adi,tmr-pull-down-disable:
76 description: Disables 2uA pull-down current on the TMR pin.
77 type: boolean
78
79 adi,dvdt-inrush-control-disable:
80 description:
81 Disables dV/dt inrush control during startup. In dV/dt mode, the inrush
82 current is limited by controlling a constant output voltage ramp rate.
83 When disabled, the inrush control mechanism is active current limiting.
84 type: boolean
85
86 adi,fault-log-enable:
87 description:
88 If set, enables logging fault registers and ADC data into EEPROM upon a
89 fault.
90 type: boolean
91
92 adi,vpower-drns-enable:
93 description:
94 If set, enables the attenuated MOSFET drain voltage to be monitored. This
95 effectively means that the MOSFET power is monitored. If not set, the
96 attenuated input voltage (and hence input power) is monitored.
97 type: boolean
98
99 adi,external-fault-fet-off-enable:
100 description: Turns MOSFET off following an external fault.
101 type: boolean
102
103 adi,undervoltage-retry-disable:
104 description: Do not retry to turn on the MOSFET after an undervoltage fault.
105 type: boolean
106
107 adi,overvoltage-retry-disable:
108 description: Do not retry to turn on the MOSFET after an overvoltage fault.
109 type: boolean
110
111 adi,external-fault-retry-enable:
112 description: Retry to turn on the MOSFET after an external fault.
113 type: boolean
114
115 adi,overcurrent-retries:
116 description: Configures auto-retry following an Overcurrent fault.
117 $ref: /schemas/types.yaml#/definitions/string
118 enum: [latch-off, "1", "7", unlimited]
119 default: latch-off
120
121 adi,fet-bad-retries:
122 description:
123 Configures auto-retry following a FET bad fault and a consequent MOSFET
124 turn off.
125 $ref: /schemas/types.yaml#/definitions/string
126 enum: [latch-off, "1", "7", unlimited]
127 default: latch-off
128
129 adi,pgio1-func:
130 description: Configures the function of the PGIO1 pin.
131 $ref: /schemas/types.yaml#/definitions/string
132 enum: [inverted_power_good, power_good, gpio]
133 default: inverted_power_good
134
135 adi,pgio2-func:
136 description: Configures the function of the PGIO2 pin.
137 $ref: /schemas/types.yaml#/definitions/string
138 enum: [inverted_power_good, power_good, gpio, active_current_limiting]
139 default: inverted_power_good
140
141 adi,pgio3-func:
142 description: Configures the function of the PGIO3 pin.
143 $ref: /schemas/types.yaml#/definitions/string
144 enum: [inverted_power_good_input, power_good_input, gpio]
145 default: inverted_power_good_input
146
147 adi,pgio4-func:
148 description: Configures the function of the PGIO4 pin.
149 $ref: /schemas/types.yaml#/definitions/string
150 enum: [inverted_external_fault, external_fault, gpio]
151 default: inverted_external_fault
152
153 adi,gpio-on-adio1:
154 description: If set, the ADIO1 pin is used as a GPIO.
155 type: boolean
156
157 adi,gpio-on-adio2:
158 description: If set, the ADIO2 pin is used as a GPIO.
159 type: boolean
160
161 adi,gpio-on-adio3:
162 description: If set, the ADIO3 pin is used as a GPIO.
163 type: boolean
164
165 adi,gpio-on-adio4:
166 description: If set, the ADIO4 pin is used as a GPIO.
167 type: boolean
168
169 gpio-controller: true
170
171 '#gpio-cells':
172 const: 2
173
174dependencies:
175 adi,gpio-on-adio1:
176 - gpio-controller
177 - '#gpio-cells'
178 adi,gpio-on-adio2:
179 - gpio-controller
180 - '#gpio-cells'
181 adi,gpio-on-adio3:
182 - gpio-controller
183 - '#gpio-cells'
184 adi,gpio-on-adio4:
185 - gpio-controller
186 - '#gpio-cells'
187 adi,external-fault-retry-enable:
188 - adi,pgio4-func
189 adi,external-fault-fet-off-enable:
190 - adi,pgio4-func
191
192required:
193 - compatible
194 - reg
195 - adi,rsense-nano-ohms
196
197allOf:
198 - if:
199 properties:
200 adi,pgio1-func:
201 const: gpio
202 required:
203 - adi,pgio1-func
204 then:
205 required:
206 - gpio-controller
207 - '#gpio-cells'
208
209 - if:
210 properties:
211 adi,pgio2-func:
212 const: gpio
213 required:
214 - adi,pgio2-func
215 then:
216 required:
217 - gpio-controller
218 - '#gpio-cells'
219
220 - if:
221 properties:
222 adi,pgio3-func:
223 const: gpio
224 required:
225 - adi,pgio3-func
226 then:
227 required:
228 - gpio-controller
229 - '#gpio-cells'
230
231 - if:
232 properties:
233 adi,pgio4-func:
234 const: gpio
235 required:
236 - adi,pgio4-func
237 then:
238 properties:
239 adi,external-fault-retry-enable: false
240 adi,external-fault-fet-off-enable: false
241 required:
242 - gpio-controller
243 - '#gpio-cells'
244
245additionalProperties: false
246
247examples:
248 - |
249 i2c {
250 #address-cells = <1>;
251 #size-cells = <0>;
252
253 swap-controller@15 {
254 compatible = "adi,ltc4283";
255 reg = <0x15>;
256
257 adi,rsense-nano-ohms = <500>;
258 adi,current-limit-sense-microvolt = <25000>;
259 adi,current-limit-foldback-factor = <10>;
260 adi,cooling-delay-ms = <8190>;
261 adi,fet-bad-timer-delay-ms = <512>;
262
263 adi,external-fault-fet-off-enable;
264 adi,pgio4-func = "external_fault";
265
266 adi,gpio-on-adio1;
267 adi,pgio1-func = "gpio";
268 gpio-controller;
269 #gpio-cells = <2>;
270 };
271 };
272...
Documentation/devicetree/bindings/hwmon/apple,smc-hwmon.yaml+85−0
@@ -0,0 +1,85 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/hwmon/apple,smc-hwmon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Apple SMC Hardware Monitoring
8
9description:
10 Apple's System Management Controller (SMC) exposes a vast array of
11 hardware monitoring sensors, including temperature probes, current and
12 voltage sense, power meters, and fan speeds. It also provides endpoints
13 to manually control the speed of each fan individually. Each Apple
14 Silicon device exposes a different set of endpoints via SMC keys. This
15 is true even when two machines share an SoC. The CPU core temperature
16 sensor keys on an M1 Mac mini are different to those on an M1 MacBook
17 Pro, for example.
18
19maintainers:
20 - James Calligeros <jcalligeros99@gmail.com>
21
22$defs:
23 sensor:
24 type: object
25
26 properties:
27 apple,key-id:
28 $ref: /schemas/types.yaml#/definitions/string
29 pattern: "^[A-Za-z0-9]{4}$"
30 description: The SMC FourCC key of the desired sensor.
31 Must match the node's suffix.
32
33 label:
34 description: Human-readable name for the sensor
35
36 required:
37 - apple,key-id
38
39properties:
40 compatible:
41 const: apple,smc-hwmon
42
43patternProperties:
44 "^current-[A-Za-z0-9]{4}$":
45 $ref: "#/$defs/sensor"
46 unevaluatedProperties: false
47
48 "^fan-[A-Za-z0-9]{4}$":
49 $ref: "#/$defs/sensor"
50 unevaluatedProperties: false
51
52 properties:
53 apple,fan-minimum:
54 $ref: /schemas/types.yaml#/definitions/string
55 pattern: "^[A-Za-z0-9]{4}$"
56 description: SMC key containing the fan's minimum speed
57
58 apple,fan-maximum:
59 $ref: /schemas/types.yaml#/definitions/string
60 pattern: "^[A-Za-z0-9]{4}$"
61 description: SMC key containing the fan's maximum speed
62
63 apple,fan-target:
64 $ref: /schemas/types.yaml#/definitions/string
65 pattern: "^[A-Za-z0-9]{4}$"
66 description: Writeable endpoint for setting desired fan speed
67
68 apple,fan-mode:
69 $ref: /schemas/types.yaml#/definitions/string
70 pattern: "^[A-Za-z0-9]{4}$"
71 description: Writeable key to enable/disable manual fan control
72
73 "^power-[A-Za-z0-9]{4}$":
74 $ref: "#/$defs/sensor"
75 unevaluatedProperties: false
76
77 "^temperature-[A-Za-z0-9]{4}$":
78 $ref: "#/$defs/sensor"
79 unevaluatedProperties: false
80
81 "^voltage-[A-Za-z0-9]{4}$":
82 $ref: "#/$defs/sensor"
83 unevaluatedProperties: false
84
85additionalProperties: false
Documentation/devicetree/bindings/hwmon/lm75.yaml+7−0
@@ -54,6 +54,13 @@ properties: · 53 unmodified lines
54 interrupts:54 interrupts:
55 maxItems: 155 maxItems: 1
56 56
57 ti,alert-polarity-active-high:
58 description: Alert pin is asserted based on the value of alert polarity
59 bit of configuration register. Default value is normal (0 which maps to
60 active-low). The other value is inverted (1 which maps to active-high).
61 Specify this property to set the alert polarity to active-high.
62 $ref: /schemas/types.yaml#/definitions/flag
63
57required:64required:
58 - compatible65 - compatible
59 - reg66 - reg
Documentation/devicetree/bindings/hwmon/microchip,emc1812.yaml+193−0
@@ -0,0 +1,193 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/hwmon/microchip,emc1812.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip EMC1812/13/14/15/33 multichannel temperature sensor
8
9maintainers:
10 - Marius Cristea <marius.cristea@microchip.com>
11
12description: |
13 The Microchip EMC1812/13/14/15/33 is a high-accuracy 2-wire multichannel
14 low-voltage remote diode temperature monitor.
15
16 The datasheet can be found here:
17 https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/EMC1812-3-4-5-33-Data-Sheet-DS20005751.pdf
18
19 EMC1812 has one external remote temperature monitoring channel
20 EMC1813 has two external remote temperature monitoring channels
21 EMC1814 has three external remote temperature monitoring channels and
22 channels 2 and 3 support anti parallel diode
23 EMC1815 has four external remote temperature monitoring channels and
24 channels 1/2 and 3/4 support anti parallel diode
25 EMC1833 has two external remote temperature monitoring channels and
26 channels 1 and 2 support anti parallel diode
27
28properties:
29 compatible:
30 enum:
31 - microchip,emc1812
32 - microchip,emc1813
33 - microchip,emc1814
34 - microchip,emc1815
35 - microchip,emc1833
36
37 reg:
38 maxItems: 1
39
40 interrupts:
41 items:
42 - description: alert-therm2 asserts when the ALERT limit is exceeded.
43 - description: therm-addr asserts when the THERM limit is exceeded.
44 minItems: 1
45
46 interrupt-names:
47 items:
48 - const: alert-therm2
49 - const: therm-addr
50 minItems: 1
51
52 "#address-cells":
53 const: 1
54
55 "#size-cells":
56 const: 0
57
58 microchip,enable-anti-parallel:
59 description:
60 Enable anti-parallel diode mode operation. EMC1814, EMC1815 and EMC1833
61 support reading two external diodes in anti-parallel connection on the
62 same set of pins. Disabling APD functionality to implement substrate
63 diodes on devices that support APD eliminates the benefit of APD
64 (two diodes on one channel).
65 type: boolean
66
67 microchip,parasitic-res-on-channel1-2:
68 description:
69 Indicates that the chip and the diodes/transistors are sufficiently
70 far apart that a parasitic resistance is added to the wires, which can
71 affect the measurements. Due to the availability of only a single
72 configuration bit in hardware, channels 1 and 2 are affected together.
73 If channel 2 is not available in hardware, this setting affects only
74 channel 1.
75 type: boolean
76
77 microchip,parasitic-res-on-channel3-4:
78 description:
79 Indicates that the chip and the diodes/transistors are sufficiently
80 far apart that a parasitic resistance is added to the wires, which can
81 affect the measurements. Due to the availability of only a single
82 configuration bit in hardware, channels 3 and 4 are affected together.
83 If channel 4 is not available in hardware, this setting affects only
84 channel 3.
85 type: boolean
86
87 vdd-supply: true
88
89patternProperties:
90 "^channel@[0-4]$":
91 description: |
92 Represents the temperature channels.
93 0: Internal sensor
94 1-4: External remote diodes
95 type: object
96
97 properties:
98 reg:
99 maxItems: 1
100
101 label:
102 description: Unique name to identify which channel this is.
103
104 required:
105 - reg
106
107 additionalProperties: false
108
109required:
110 - compatible
111 - reg
112 - vdd-supply
113
114allOf:
115 # EMC1812: 1 Internal, 1 External Channels, No APD,
116 # parasitic-res-on-channel1-2: for channel 1
117 - if:
118 properties:
119 compatible:
120 const: microchip,emc1812
121 then:
122 properties:
123 microchip,enable-anti-parallel: false
124 microchip,parasitic-res-on-channel3-4: false
125 patternProperties:
126 "^channel@[2-4]$": false
127
128 # EMC1813: 1 Internal, 2 External Channels, No APD,
129 # parasitic-res-on-channel1-2: on both channel 1 & 2
130 - if:
131 properties:
132 compatible:
133 const: microchip,emc1813
134 then:
135 properties:
136 microchip,enable-anti-parallel: false
137 microchip,parasitic-res-on-channel3-4: false
138 patternProperties:
139 "^channel@[3-4]$": false
140
141 # EMC1833: 1 Internal, 2 External Channels, Supports APD,
142 # parasitic-res-on-channel1-2: on both channel 1 & 2
143 - if:
144 properties:
145 compatible:
146 const: microchip,emc1833
147 then:
148 properties:
149 microchip,parasitic-res-on-channel3-4: false
150 patternProperties:
151 "^channel@[3-4]$": false
152
153 # EMC1814: 1 Internal, 3 External Channels, Supports APD,
154 # parasitic-res-on-channel1-2: on both channel 1 & 2
155 # parasitic-res-on-channel3-4: for channel 3
156 - if:
157 properties:
158 compatible:
159 const: microchip,emc1814
160 then:
161 properties:
162 channel@4: false
163
164unevaluatedProperties: false
165
166examples:
167 - |
168 i2c {
169 #address-cells = <1>;
170 #size-cells = <0>;
171
172 temperature-sensor@4c {
173 compatible = "microchip,emc1813";
174 reg = <0x4c>;
175
176 #address-cells = <1>;
177 #size-cells = <0>;
178
179 microchip,parasitic-res-on-channel1-2;
180
181 vdd-supply = <&vdd>;
182
183 channel@1 {
184 reg = <1>;
185 label = "External CH1 Temperature";
186 };
187
188 channel@2 {
189 reg = <2>;
190 label = "External CH2 Temperature";
191 };
192 };
193 };
Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml+8−0
@@ -54,6 +54,12 @@ patternProperties: · 53 unmodified lines
54 The fan number used to determine the associated PWM channel.54 The fan number used to determine the associated PWM channel.
55 maxItems: 155 maxItems: 1
56 56
57 fan-shutdown-percent:
58 description:
59 PWM duty cycle in percent applied to the fan during shutdown.
60 minimum: 0
61 maximum: 100
62
57 required:63 required:
58 - reg64 - reg
59 65
@@ -80,12 +86,14 @@ examples: · 20 unmodified lines
80 fan@0 {86 fan@0 {
81 reg = <0x0>;87 reg = <0x0>;
82 pwms = <&fan_controller 26000 PWM_POLARITY_INVERTED 1>;88 pwms = <&fan_controller 26000 PWM_POLARITY_INVERTED 1>;
89 fan-shutdown-percent = <100>;
83 #cooling-cells = <2>;90 #cooling-cells = <2>;
84 };91 };
85 92
86 fan@1 {93 fan@1 {
87 reg = <0x1>;94 reg = <0x1>;
88 pwms = <&fan_controller 26000 0 1>;95 pwms = <&fan_controller 26000 0 1>;
96 fan-shutdown-percent = <50>;
89 #cooling-cells = <2>;97 #cooling-cells = <2>;
90 };98 };
91 99
Documentation/devicetree/bindings/hwmon/nsa320-mcu.txt+0−20
@@ -1,20 +0,0 @@
1Bindings for the fan / temperature monitor microcontroller used on
2the Zyxel NSA 320 and several subsequent models.
3
4Required properties:
5- compatible : "zyxel,nsa320-mcu"
6- data-gpios : The GPIO pin connected to the data line on the MCU
7- clk-gpios : The GPIO pin connected to the clock line on the MCU
8- act-gpios : The GPIO pin connected to the active line on the MCU
9
10Example:
11
12 hwmon {
13 compatible = "zyxel,nsa320-mcu";
14 pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act>;
15 pinctrl-names = "default";
16
17 data-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
18 clk-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
19 act-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
20 };
Documentation/devicetree/bindings/hwmon/pmbus/adi,max20830.yaml+66−0
@@ -0,0 +1,66 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/hwmon/pmbus/adi,max20830.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices MAX20830 Step-Down Switching Regulator with PMBus
8
9maintainers:
10 - Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
11
12description: |
13 The MAX20830 is a fully integrated step-down DC-DC switching regulator with
14 PMBus interface. It provides 2.7V to 16V input, 0.4V to 5.8V adjustable
15 output, and up to 30A output current. It allows monitoring of input/output
16 voltage, output current and temperature through the PMBus serial interface.
17 Datasheet:
18 https://www.analog.com/en/products/max20830.html
19
20allOf:
21 - $ref: /schemas/regulator/regulator.yaml#
22
23properties:
24 compatible:
25 const: adi,max20830
26
27 reg:
28 maxItems: 1
29
30 vddh-supply:
31 description:
32 Phandle to the regulator that provides the VDDH power supply.
33
34 avdd-supply:
35 description:
36 Phandle to the regulator that provides the AVDD power supply.
37
38 ldoin-supply:
39 description:
40 Optional 2.5V to 5.5V LDO input supply.
41
42 pwr-good-gpios:
43 description:
44 GPIO connected to the power-good status output pin.
45 maxItems: 1
46
47required:
48 - compatible
49 - reg
50 - vddh-supply
51
52unevaluatedProperties: false
53
54examples:
55 - |
56 i2c {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 regulator@30 {
61 compatible = "adi,max20830";
62 reg = <0x30>;
63 vddh-supply = <&vddh>;
64 };
65 };
66...
Documentation/devicetree/bindings/hwmon/pmbus/adi,max20860a.yaml+45−0
@@ -0,0 +1,45 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/hwmon/pmbus/adi,max20860a.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices MAX20860A Step-Down Converter
8
9maintainers:
10 - Sanman Pradhan <psanman@juniper.net>
11
12description: |
13 The MAX20860A is a fully integrated step-down DC-DC switching regulator
14 with PMBus interface for monitoring input/output voltage, output current
15 and temperature.
16
17 Datasheet: https://www.analog.com/en/products/max20860a.html
18
19allOf:
20 - $ref: /schemas/regulator/regulator.yaml#
21
22properties:
23 compatible:
24 const: adi,max20860a
25
26 reg:
27 maxItems: 1
28
29required:
30 - compatible
31 - reg
32
33unevaluatedProperties: false
34
35examples:
36 - |
37 i2c {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 regulator@40 {
42 compatible = "adi,max20860a";
43 reg = <0x40>;
44 };
45 };
Documentation/devicetree/bindings/hwmon/pmbus/infineon,xdp720.yaml+18−10
@@ -5,23 +5,31 @@ · 4 unmodified lines
5$id: http://devicetree.org/schemas/hwmon/pmbus/infineon,xdp720.yaml#5$id: http://devicetree.org/schemas/hwmon/pmbus/infineon,xdp720.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
8title: Infineon XDP720 Digital eFuse Controller8title: Infineon XDP720 / XDP730 Digital eFuse Controllers
9 9
10maintainers:10maintainers:
11 - Ashish Yadav <ashish.yadav@infineon.com>11 - Ashish Yadav <ashish.yadav@infineon.com>
12 12
13description: |13description: |
14 The XDP720 is an eFuse with integrated current sensor and digital14 The XDP720 and XDP730 are PMBus-compliant digital eFuse controllers
15 controller. It provides accurate system telemetry (V, I, P, T) and15 with an integrated current sensor. They provide accurate system
16 reports analog current at the IMON pin for post-processing.16 telemetry (V, I, P, T) and report analog current at the IMON pin for
17 post-processing.
17 18
18 Datasheet:19 Both parts share the same PMBus register map and direct-format
19 https://www.infineon.com/assets/row/public/documents/24/49/infineon-xdp720-001-datasheet-en.pdf20 coefficients; they differ in the GIMON gain step exposed via the
21 TELEMETRY_AVG register (bit 10) and in the VDD_VIN pin number
22 (XDP720: pin 9, XDP730: pin 20).
23
24 Datasheets:
25 - XDP720: https://www.infineon.com/assets/row/public/documents/24/49/infineon-xdp720-001-datasheet-en.pdf
26 - XDP730: https://www.infineon.com/assets/row/public/documents/24/49/infineon-xdp730-001-datasheet-en.pdf
20 27
21properties:28properties:
22 compatible:29 compatible:
23 enum:30 enum:
24 - infineon,xdp72031 - infineon,xdp720
32 - infineon,xdp730
25 33
26 reg:34 reg:
27 maxItems: 135 maxItems: 1
@@ -33,9 +41,9 @@ properties: · 5 unmodified lines
33 41
34 vdd-vin-supply:42 vdd-vin-supply:
35 description:43 description:
36 Supply for the VDD_VIN pin (pin 9), the IC controller power supply.44 Supply for the VDD_VIN pin (XDP720 pin 9, XDP730 pin 20), the IC
37 Typically connected to the input bus (VIN) through a 100 ohm / 100 nF45 controller power supply. Typically connected to the input bus
38 RC filter.46 (VIN) through a 100 ohm / 100 nF RC filter.
39 47
40required:48required:
41 - compatible49 - compatible
@@ -50,7 +58,7 @@ examples: · 8 unmodified lines
50 #address-cells = <1>;58 #address-cells = <1>;
51 #size-cells = <0>;59 #size-cells = <0>;
52 60
53 hwmon@11 {61 efuse@11 {
54 compatible = "infineon,xdp720";62 compatible = "infineon,xdp720";
55 reg = <0x11>;63 reg = <0x11>;
56 vdd-vin-supply = <&vdd_vin>;64 vdd-vin-supply = <&vdd_vin>;
Documentation/devicetree/bindings/hwmon/pwm-fan.yaml+2−1
@@ -63,7 +63,8 @@ properties: · 62 unmodified lines
63 description: The PWM that is used to control the fan.63 description: The PWM that is used to control the fan.
64 maxItems: 164 maxItems: 1
65 65
66 "#cooling-cells": true66 "#cooling-cells":
67 const: 2
67 68
68required:69required:
69 - compatible70 - compatible
Documentation/devicetree/bindings/hwmon/zyxel,nsa320-mcu.yaml+54−0
@@ -0,0 +1,54 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/hwmon/zyxel,nsa320-mcu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ZyXEL NSA320 MCU
8
9maintainers:
10 - Adam Baker <linux@baker-net.org.uk>
11 - Guenter Roeck <linux@roeck-us.net>
12
13description:
14 The ZyXEL NSA320 uses a dedicated microcontroller to manage system-critical
15 functions like fan speed and power monitoring. It is connected to the SoC
16 via a GPIO-based serial protocol.
17
18properties:
19 compatible:
20 const: zyxel,nsa320-mcu
21
22 data-gpios:
23 maxItems: 1
24 description: GPIO pin connected to the data line on the MCU.
25
26 clk-gpios:
27 maxItems: 1
28 description: GPIO pin connected to the clock line on the MCU.
29
30 act-gpios:
31 maxItems: 1
32 description: GPIO pin connected to the active line on the MCU.
33
34required:
35 - compatible
36 - data-gpios
37 - clk-gpios
38 - act-gpios
39
40additionalProperties: false
41
42examples:
43 - |
44 #include <dt-bindings/gpio/gpio.h>
45
46 hwmon {
47 compatible = "zyxel,nsa320-mcu";
48 pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act>;
49 pinctrl-names = "default";
50
51 data-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
52 clk-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
53 act-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
54 };
Documentation/devicetree/bindings/i2c/i2c-davinci.txt+0−43
@@ -1,43 +0,0 @@
1* Texas Instruments Davinci/Keystone I2C
2
3This file provides information, what the device node for the
4davinci/keystone i2c interface contains.
5
6Required properties:
7- compatible: "ti,davinci-i2c" or "ti,keystone-i2c";
8- reg : Offset and length of the register set for the device
9- clocks: I2C functional clock phandle.
10 For 66AK2G this property should be set per binding,
11 Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
12
13SoC-specific Required Properties:
14
15The following are mandatory properties for Keystone 2 66AK2G SoCs only:
16
17- power-domains: Should contain a phandle to a PM domain provider node
18 and an args specifier containing the I2C device id
19 value. This property is as per the binding,
20 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
21
22Recommended properties :
23- interrupts : standard interrupt property.
24- clock-frequency : desired I2C bus clock frequency in Hz.
25- ti,has-pfunc: boolean; if defined, it indicates that SoC supports PFUNC
26 registers. PFUNC registers allow to switch I2C pins to function as
27 GPIOs, so they can be toggled manually.
28
29Example (enbw_cmc board):
30 i2c@1c22000 {
31 compatible = "ti,davinci-i2c";
32 reg = <0x22000 0x1000>;
33 clock-frequency = <100000>;
34 interrupts = <15>;
35 interrupt-parent = <&intc>;
36 #address-cells = <1>;
37 #size-cells = <0>;
38
39 dtt@48 {
40 compatible = "national,lm75";
41 reg = <0x48>;
42 };
43 };
Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.yaml+1−0
@@ -40,6 +40,7 @@ properties: · 39 unmodified lines
40 40
41 i2c-parent:41 i2c-parent:
42 $ref: /schemas/types.yaml#/definitions/phandle-array42 $ref: /schemas/types.yaml#/definitions/phandle-array
43 minItems: 2
43 items:44 items:
44 maxItems: 145 maxItems: 1
45 description:46 description:
Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: GPIO-based I2C Bus Mux7title: GPIO-based I2C Bus Mux
8 8
9maintainers:9maintainers:
10 - Wolfram Sang <wsa@kernel.org>10 - Peter Korsgaard <peter.korsgaard@barco.com>
11 11
12description: |12description: |
13 This binding describes an I2C bus multiplexer that uses GPIOs to route the I2C signals.13 This binding describes an I2C bus multiplexer that uses GPIOs to route the I2C signals.
Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: Pinctrl-based I2C Bus Mux7title: Pinctrl-based I2C Bus Mux
8 8
9maintainers:9maintainers:
10 - Wolfram Sang <wsa@kernel.org>10 - Thierry Reding <thierry.reding@kernel.org>
11 11
12description: |12description: |
13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
Documentation/devicetree/bindings/i2c/i2c-mux-reg.txt+0−74
@@ -1,74 +0,0 @@
1Register-based I2C Bus Mux
2
3This binding describes an I2C bus multiplexer that uses a single register
4to route the I2C signals.
5
6Required properties:
7- compatible: i2c-mux-reg
8- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
9 port is connected to.
10* Standard I2C mux properties. See i2c-mux.yaml in this directory.
11* I2C child bus nodes. See i2c-mux.yaml in this directory.
12
13Optional properties:
14- reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
16 address. The size must be either 1, 2, or 4 bytes. If reg is omitted, the
17 resource of this device will be used.
18- little-endian: The existence indicates the register is in little endian.
19- big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
21 CPU will be used.
22- write-only: The existence indicates the register is write-only.
23- idle-state: value to set the muxer to when idle. When no value is
24 given, it defaults to the last value used.
25
26Whenever an access is made to a device on a child bus, the value set
27in the relevant node's reg property will be output to the register.
28
29If an idle state is defined, using the idle-state (optional) property,
30whenever an access is not being made to a device on a child bus, the
31register will be set according to the idle value.
32
33If an idle state is not defined, the most recently used value will be
34left programmed into the register.
35
36Example of a mux on PCIe card, the host is a powerpc SoC (big endian):
37
38 i2c-mux {
39 /* the <offset size> depends on the address translation
40 * of the parent device. If omitted, device resource
41 * will be used instead. The size is to determine
42 * whether iowrite32, iowrite16, or iowrite8 will be used.
43 */
44 reg = <0x6028 0x4>;
45 little-endian; /* little endian register on PCIe */
46 compatible = "i2c-mux-reg";
47 #address-cells = <1>;
48 #size-cells = <0>;
49 i2c-parent = <&i2c1>;
50 i2c@0 {
51 reg = <0>;
52 #address-cells = <1>;
53 #size-cells = <0>;
54
55 si5338: clock-generator@70 {
56 compatible = "silabs,si5338";
57 reg = <0x70>;
58 /* other stuff */
59 };
60 };
61
62 i2c@1 {
63 /* data is written using iowrite32 */
64 reg = <1>;
65 #address-cells = <1>;
66 #size-cells = <0>;
67
68 si5338: clock-generator@70 {
69 compatible = "silabs,si5338";
70 reg = <0x70>;
71 /* other stuff */
72 };
73 };
74 };
Documentation/devicetree/bindings/i2c/i2c-mux-reg.yaml+92−0
@@ -0,0 +1,92 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-mux-reg.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Register-based I2C Bus Mux
8
9maintainers:
10 - Peter Rosin <peda@axentia.se>
11
12description: |
13 This binding describes an I2C bus multiplexer that uses a single
14 memory-mapped register to route the I2C signals.
15
16 Whenever an access is made to a device on a child bus, the value
17 set in the relevant node's reg property is output to the register.
18
19 If an idle state is defined via the idle-state property, the
20 register is set to that value whenever no access is being made.
21 Otherwise the most recently used value is left programmed.
22
23allOf:
24 - $ref: /schemas/i2c/i2c-mux.yaml#
25
26properties:
27 compatible:
28 const: i2c-mux-reg
29
30 reg:
31 maxItems: 1
32 description: |
33 Offset and size of the register that selects the active child
34 bus, relative to the parent node's address space. The size
35 determines the access width and must be 1, 2, or 4 bytes. If
36 omitted, the platform device's own memory resource is used
37 instead.
38
39 i2c-parent:
40 $ref: /schemas/types.yaml#/definitions/phandle
41 description:
42 Phandle of the I2C bus that this multiplexer's master-side port
43 is connected to.
44
45 little-endian:
46 type: boolean
47 description: Register is accessed in little-endian byte order.
48
49 big-endian:
50 type: boolean
51 description: Register is accessed in big-endian byte order.
52
53 write-only:
54 type: boolean
55 description:
56 Register is write-only; the driver must not read back the
57 current selection.
58
59 idle-state:
60 $ref: /schemas/types.yaml#/definitions/uint32
61 description:
62 Value to write to the register when no child bus is selected.
63
64required:
65 - compatible
66 - i2c-parent
67
68unevaluatedProperties: false
69
70examples:
71 - |
72 i2c-mux@6028 {
73 compatible = "i2c-mux-reg";
74 reg = <0x6028 0x4>;
75 little-endian;
76 #address-cells = <1>;
77 #size-cells = <0>;
78 i2c-parent = <&i2c1>;
79
80 i2c@0 {
81 reg = <0>;
82 #address-cells = <1>;
83 #size-cells = <0>;
84 };
85
86 i2c@1 {
87 reg = <1>;
88 #address-cells = <1>;
89 #size-cells = <0>;
90 };
91 };
92...
Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml+4−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
16 compatible:16 compatible:
17 enum:17 enum:
18 - loongson,ls2k-i2c18 - loongson,ls2k-i2c
19 - loongson,ls2k0300-i2c
19 - loongson,ls7a-i2c20 - loongson,ls7a-i2c
20 21
21 reg:22 reg:
@@ -24,6 +25,9 @@ properties: · 2 unmodified lines
24 interrupts:25 interrupts:
25 maxItems: 126 maxItems: 1
26 27
28 clocks:
29 maxItems: 1
30
27required:31required:
28 - compatible32 - compatible
29 - reg33 - reg
Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml+3−0
@@ -37,6 +37,9 @@ properties: · 36 unmodified lines
37 modes are supported, possible values are 100000 and 400000.37 modes are supported, possible values are 100000 and 400000.
38 enum: [100000, 400000]38 enum: [100000, 400000]
39 39
40 resets:
41 maxItems: 1
42
40required:43required:
41 - compatible44 - compatible
42 - reg45 - reg
Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml+4−4
@@ -95,8 +95,8 @@ examples: · 94 unmodified lines
95 interrupts = <10>;95 interrupts = <10>;
96 opencores,ip-clock-frequency = <20000000>;96 opencores,ip-clock-frequency = <20000000>;
97 97
98 reg-shift = <0>; /* 8 bit registers */98 reg-shift = <0>; /* 8 bit registers */
99 reg-io-width = <1>; /* 8 bit read/write */99 reg-io-width = <1>; /* 8 bit read/write */
100 };100 };
101 101
102 i2c@b0000000 {102 i2c@b0000000 {
@@ -108,7 +108,7 @@ examples: · 5 unmodified lines
108 clocks = <&osc>;108 clocks = <&osc>;
109 clock-frequency = <400000>; /* i2c bus frequency 400 KHz */109 clock-frequency = <400000>; /* i2c bus frequency 400 KHz */
110 110
111 reg-shift = <0>; /* 8 bit registers */111 reg-shift = <0>; /* 8 bit registers */
112 reg-io-width = <1>; /* 8 bit read/write */112 reg-io-width = <1>; /* 8 bit read/write */
113 };113 };
114...114...
Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml+4−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 26
27 - items:27 - items:
28 - enum:28 - enum:
29 - qcom,glymur-cci
29 - qcom,kaanapali-cci30 - qcom,kaanapali-cci
30 - qcom,milos-cci31 - qcom,milos-cci
31 - qcom,qcm2290-cci32 - qcom,qcm2290-cci
@@ -35,6 +36,7 @@ properties: · 3 unmodified lines
35 - qcom,sc8280xp-cci36 - qcom,sc8280xp-cci
36 - qcom,sdm670-cci37 - qcom,sdm670-cci
37 - qcom,sdm845-cci38 - qcom,sdm845-cci
39 - qcom,shikra-cci
38 - qcom,sm6150-cci40 - qcom,sm6150-cci
39 - qcom,sm6350-cci41 - qcom,sm6350-cci
40 - qcom,sm8250-cci42 - qcom,sm8250-cci
@@ -134,9 +136,11 @@ allOf: · 93 unmodified lines
134 compatible:136 compatible:
135 contains:137 contains:
136 enum:138 enum:
139 - qcom,glymur-cci
137 - qcom,kaanapali-cci140 - qcom,kaanapali-cci
138 - qcom,qcm2290-cci141 - qcom,qcm2290-cci
139 - qcom,qcs8300-cci142 - qcom,qcs8300-cci
143 - qcom,shikra-cci
140 - qcom,sm8750-cci144 - qcom,sm8750-cci
141 then:145 then:
142 properties:146 properties:
Documentation/devicetree/bindings/i2c/ti,davinci-i2c.yaml+70−0
@@ -0,0 +1,70 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/ti,davinci-i2c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments DaVinci/Keystone I2C
8
9maintainers:
10 - Chaitanya Sabnis <chaitanya.msabnis@gmail.com>
11
12allOf:
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
15 properties:
16 compatible:
17 contains:
18 const: ti,keystone-i2c
19 then:
20 required:
21 - power-domains
22
23properties:
24 compatible:
25 enum:
26 - ti,davinci-i2c
27 - ti,keystone-i2c
28
29 reg:
30 maxItems: 1
31
32 interrupts:
33 maxItems: 1
34
35 clocks:
36 maxItems: 1
37
38 power-domains:
39 maxItems: 1
40
41 ti,has-pfunc:
42 description:
43 Indicates that the SoC supports PFUNC registers, allowing I2C pins
44 to function as GPIOs for manual toggling.
45 type: boolean
46
47required:
48 - compatible
49 - reg
50 - interrupts
51 - clocks
52
53unevaluatedProperties: false
54
55examples:
56 - |
57 i2c@1c22000 {
58 compatible = "ti,davinci-i2c";
59 reg = <0x01c22000 0x1000>;
60 clocks = <&i2c_clk>;
61 clock-frequency = <100000>;
62 interrupts = <15>;
63 #address-cells = <1>;
64 #size-cells = <0>;
65
66 sensor@48 {
67 compatible = "national,lm75";
68 reg = <0x48>;
69 };
70 };
Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml+23−4
@@ -9,9 +9,6 @@ title: MIPI I3C HCI · 8 unmodified lines
9maintainers:9maintainers:
10 - Nicolas Pitre <npitre@baylibre.com>10 - Nicolas Pitre <npitre@baylibre.com>
11 11
12allOf:
13 - $ref: /schemas/i3c/i3c.yaml#
14
15description: |12description: |
16 MIPI I3C Host Controller Interface13 MIPI I3C Host Controller Interface
17 14
@@ -28,9 +25,17 @@ description: | · 10 unmodified lines
28 25
29properties:26properties:
30 compatible:27 compatible:
31 const: mipi-i3c-hci28 enum:
29 - mipi-i3c-hci
30 - microchip,sama7d65-i3c-hci
32 reg:31 reg:
33 maxItems: 132 maxItems: 1
33
34 clocks:
35 items:
36 - description: Peripheral bus clock
37 - description: System Generic clock
38
34 interrupts:39 interrupts:
35 maxItems: 140 maxItems: 1
36 41
@@ -39,6 +44,20 @@ required: · 2 unmodified lines
39 - reg44 - reg
40 - interrupts45 - interrupts
41 46
47allOf:
48 - $ref: /schemas/i3c/i3c.yaml#
49 - if:
50 properties:
51 compatible:
52 contains:
53 const: microchip,sama7d65-i3c-hci
54 then:
55 required:
56 - clocks
57 else:
58 properties:
59 clocks: false
60
42unevaluatedProperties: false61unevaluatedProperties: false
43 62
44examples:63examples:
Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml+54−2
@@ -18,7 +18,11 @@ description: | · 17 unmodified lines
18 service a wide variety of precision, wide bandwidth data acquisition18 service a wide variety of precision, wide bandwidth data acquisition
19 applications.19 applications.
20 20
21 The AD4880 is a dual-channel variant with two independent ADC channels,
22 each with its own SPI configuration interface.
23
21 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf24 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
25 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4880.pdf
22 26
23$ref: /schemas/spi/spi-peripheral-props.yaml#27$ref: /schemas/spi/spi-peripheral-props.yaml#
24 28
@@ -34,9 +38,16 @@ properties: · 9 unmodified lines
34 - adi,ad408638 - adi,ad4086
35 - adi,ad408739 - adi,ad4087
36 - adi,ad408840 - adi,ad4088
41 - adi,ad4880
42 - adi,ad4884
37 43
38 reg:44 reg:
39 maxItems: 145 minItems: 1
46 maxItems: 2
47 description:
48 SPI chip select(s). For single-channel devices, one chip select.
49 For multi-channel devices like AD4880, two chip selects are required
50 as each channel has its own SPI configuration interface.
40 51
41 spi-max-frequency:52 spi-max-frequency:
42 description: Configuration of the SPI bus.53 description: Configuration of the SPI bus.
@@ -60,7 +71,10 @@ properties: · 17 unmodified lines
60 vrefin-supply: true71 vrefin-supply: true
61 72
62 io-backends:73 io-backends:
63 maxItems: 174 minItems: 1
75 items:
76 - description: Backend for channel A (primary)
77 - description: Backend for channel B (secondary)
64 78
65 adi,lvds-cnv-enable:79 adi,lvds-cnv-enable:
66 description: Enable the LVDS signal type on the CNV pin. Default is CMOS.80 description: Enable the LVDS signal type on the CNV pin. Default is CMOS.
@@ -81,6 +95,27 @@ required: · 14 unmodified lines
81 - vdd33-supply95 - vdd33-supply
82 - vrefin-supply96 - vrefin-supply
83 97
98allOf:
99 - if:
100 properties:
101 compatible:
102 contains:
103 enum:
104 - adi,ad4880
105 - adi,ad4884
106 then:
107 properties:
108 reg:
109 minItems: 2
110 io-backends:
111 minItems: 2
112 else:
113 properties:
114 reg:
115 maxItems: 1
116 io-backends:
117 maxItems: 1
118
84additionalProperties: false119additionalProperties: false
85 120
86examples:121examples:
@@ -101,4 +136,21 @@ examples: · 14 unmodified lines
101 io-backends = <&iio_backend>;136 io-backends = <&iio_backend>;
102 };137 };
103 };138 };
139 - |
140 spi {
141 #address-cells = <1>;
142 #size-cells = <0>;
143
144 adc@0 {
145 compatible = "adi,ad4880";
146 reg = <0>, <1>;
147 spi-max-frequency = <10000000>;
148 vdd33-supply = <&vdd33>;
149 vddldo-supply = <&vddldo>;
150 vrefin-supply = <&vrefin>;
151 clocks = <&cnv>;
152 clock-names = "cnv";
153 io-backends = <&iio_backend_cha>, <&iio_backend_chb>;
154 };
155 };
104...156...
Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml+17−2
@@ -5,19 +5,30 @@ · 4 unmodified lines
5$id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#5$id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
8title: Analog Devices AD4130 ADC device driver8title: Analog Devices AD4130 family ADCs
9 9
10maintainers:10maintainers:
11 - Cosmin Tanislav <cosmin.tanislav@analog.com>11 - Cosmin Tanislav <cosmin.tanislav@analog.com>
12 12
13description: |13description: |
14 Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here:14 Bindings for the Analog Devices AD4130 family ADCs.
15 Datasheets can be found here:
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4129-4.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4129-8.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf19 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
20 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4131-4.pdf
21 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4131-8.pdf
16 22
17properties:23properties:
18 compatible:24 compatible:
19 enum:25 enum:
26 - adi,ad4129-4
27 - adi,ad4129-8
28 - adi,ad4130-4
20 - adi,ad413029 - adi,ad4130
30 - adi,ad4131-4
31 - adi,ad4131-8
21 32
22 reg:33 reg:
23 maxItems: 134 maxItems: 1
@@ -32,6 +43,10 @@ properties: · 8 unmodified lines
32 43
33 interrupts:44 interrupts:
34 maxItems: 145 maxItems: 1
46 description: |
47 Data Ready / FIFO interrupt. For devices with FIFO support, the
48 interrupt polarity specified here is inverted when the device enters
49 FIFO mode, and normal for data ready.
35 50
36 interrupt-names:51 interrupt-names:
37 description: |52 description: |
Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml+180−0
@@ -0,0 +1,180 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/adi,ad4691.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices AD4691 Family Multichannel SAR ADCs
8
9maintainers:
10 - Radu Sabau <radu.sabau@analog.com>
11
12description: |
13 The AD4691 family are high-speed, low-power, multichannel successive
14 approximation register (SAR) analog-to-digital converters (ADCs) with
15 an SPI-compatible serial interface. The ADC supports CNV Burst Mode,
16 where an external PWM drives the CNV pin, and Manual Mode, where CNV
17 is directly tied to the SPI chip-select.
18
19 Datasheets:
20 * https://www.analog.com/en/products/ad4691.html
21 * https://www.analog.com/en/products/ad4692.html
22 * https://www.analog.com/en/products/ad4693.html
23 * https://www.analog.com/en/products/ad4694.html
24
25$ref: /schemas/spi/spi-peripheral-props.yaml#
26
27properties:
28 compatible:
29 enum:
30 - adi,ad4691
31 - adi,ad4692
32 - adi,ad4693
33 - adi,ad4694
34
35 reg:
36 maxItems: 1
37
38 spi-max-frequency:
39 maximum: 40000000
40
41 spi-cpol: true
42 spi-cpha: true
43
44 avdd-supply:
45 description: Analog power supply (4.5V to 5.5V).
46
47 vdd-supply:
48 description:
49 External 1.8V digital core supply. When present, the internal LDO is
50 disabled (LDO_EN = 0). Mutually exclusive with ldo-in-supply.
51
52 ldo-in-supply:
53 description:
54 LDO input supply (2.4V to 5.5V). When present and vdd-supply is absent,
55 the internal LDO generates 1.8V VDD from this input (LDO_EN = 1).
56 Mutually exclusive with vdd-supply.
57
58 vio-supply:
59 description: I/O voltage supply (1.71V to 1.89V or VDD).
60
61 ref-supply:
62 description: External reference voltage supply (2.4V to 5.25V).
63
64 refin-supply:
65 description: Internal reference buffer input supply.
66
67 reset-gpios:
68 description:
69 GPIO line controlling the hardware reset pin (active-low).
70 maxItems: 1
71
72 pwms:
73 description:
74 PWM connected to the CNV pin. When present, selects CNV Burst Mode where
75 the PWM drives the conversion rate. When absent, Manual Mode is used
76 (CNV tied to SPI CS).
77 maxItems: 1
78
79 interrupts:
80 description:
81 Interrupt lines connected to the ADC GP pins. Each GP pin can be
82 physically wired to an interrupt-capable input on the SoC.
83 maxItems: 4
84
85 interrupt-names:
86 description: Names of the interrupt lines, matching the GP pin names.
87 minItems: 1
88 maxItems: 4
89 items:
90 enum:
91 - gp0
92 - gp1
93 - gp2
94 - gp3
95
96 gpio-controller: true
97
98 '#gpio-cells':
99 const: 2
100
101 '#trigger-source-cells':
102 description:
103 This node can act as a trigger source. The single cell in a consumer
104 reference specifies the GP pin number (0-3) used as the trigger output.
105 const: 1
106
107required:
108 - compatible
109 - reg
110 - avdd-supply
111 - vio-supply
112
113allOf:
114 # vdd-supply and ldo-in-supply are mutually exclusive, one is required:
115 # either an external 1.8V VDD is provided or the internal LDO is fed from
116 # ldo-in-supply to generate VDD.
117 - oneOf:
118 - required:
119 - vdd-supply
120 - required:
121 - ldo-in-supply
122 # ref-supply and refin-supply are mutually exclusive, one is required
123 - oneOf:
124 - required:
125 - ref-supply
126 - required:
127 - refin-supply
128
129unevaluatedProperties: false
130
131examples:
132 - |
133 #include <dt-bindings/gpio/gpio.h>
134 /* AD4692 in CNV Burst Mode with SPI offload */
135 spi {
136 #address-cells = <1>;
137 #size-cells = <0>;
138
139 adc@0 {
140 compatible = "adi,ad4692";
141 reg = <0>;
142 spi-cpol;
143 spi-cpha;
144 spi-max-frequency = <40000000>;
145
146 avdd-supply = <&avdd_supply>;
147 ldo-in-supply = <&avdd_supply>;
148 vio-supply = <&vio_supply>;
149 ref-supply = <&ref_5v>;
150
151 reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
152
153 pwms = <&pwm_gen 0 0>;
154
155 #trigger-source-cells = <1>;
156 };
157 };
158
159 - |
160 #include <dt-bindings/gpio/gpio.h>
161 /* AD4692 in Manual Mode (CNV tied to SPI CS) */
162 spi {
163 #address-cells = <1>;
164 #size-cells = <0>;
165
166 adc@0 {
167 compatible = "adi,ad4692";
168 reg = <0>;
169 spi-cpol;
170 spi-cpha;
171 spi-max-frequency = <31250000>;
172
173 avdd-supply = <&avdd_supply>;
174 ldo-in-supply = <&avdd_supply>;
175 vio-supply = <&vio_supply>;
176 refin-supply = <&refin_supply>;
177
178 reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
179 };
180 };
Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml+31−1
@@ -14,6 +14,7 @@ properties: · 13 unmodified lines
14 oneOf:14 oneOf:
15 - enum:15 - enum:
16 - allwinner,sun20i-d1-gpadc16 - allwinner,sun20i-d1-gpadc
17 - allwinner,sun55i-a523-gpadc
17 - items:18 - items:
18 - enum:19 - enum:
19 - allwinner,sun50i-h616-gpadc20 - allwinner,sun50i-h616-gpadc
@@ -29,7 +30,12 @@ properties: · 9 unmodified lines
29 const: 030 const: 0
30 31
31 clocks:32 clocks:
32 maxItems: 133 minItems: 1
34 maxItems: 2
35
36 clock-names:
37 minItems: 1
38 maxItems: 2
33 39
34 interrupts:40 interrupts:
35 maxItems: 141 maxItems: 1
@@ -40,6 +46,30 @@ properties: · 4 unmodified lines
40 resets:46 resets:
41 maxItems: 147 maxItems: 1
42 48
49allOf:
50 - if:
51 properties:
52 compatible:
53 enum:
54 - allwinner,sun55i-a523-gpadc
55 then:
56 properties:
57 clocks:
58 items:
59 - description: Bus clock
60 - description: Module clock
61 clock-names:
62 items:
63 - const: bus
64 - const: mod
65 required:
66 - clock-names
67 else:
68 properties:
69 clocks:
70 maxItems: 1
71 clock-names: false
72
43patternProperties:73patternProperties:
44 "^channel@[0-9a-f]+$":74 "^channel@[0-9a-f]+$":
45 $ref: adc.yaml75 $ref: adc.yaml
Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml+10−15
@@ -10,14 +10,9 @@ maintainers: · 9 unmodified lines
10 - Andreas Klinger <ak@it-klinger.de>10 - Andreas Klinger <ak@it-klinger.de>
11 11
12description: |12description: |
13 Bit-banging driver using two GPIOs:13 The HX711 is a 24-bit ADC with selectable gain (32/64/128) and two
14 - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval14 differential input channels. Channel A supports gain 64 and 128;
15 and up to 3 cycles for selection of the input channel and gain for the15 channel B supports gain 32.
16 next measurement
17 - dout-gpio is the sensor data the sensor responds to the clock
18
19 Specifications about the driver can be found at:
20 http://www.aviaic.com/ENProducts.aspx
21 16
22properties:17properties:
23 compatible:18 compatible:
@@ -26,23 +21,23 @@ properties: · 2 unmodified lines
26 21
27 sck-gpios:22 sck-gpios:
28 description:23 description:
29 Definition of the GPIO for the clock (output). In the datasheet it is24 GPIO for the clock output (PD_SCK in the datasheet).
30 named PD_SCK
31 maxItems: 125 maxItems: 1
32 26
33 dout-gpios:27 dout-gpios:
34 description:28 description:
35 Definition of the GPIO for the data-out sent by the sensor in29 GPIO for the data output from the sensor (DOUT in the datasheet).
36 response to the clock (input).
37 See Documentation/devicetree/bindings/gpio/gpio.txt for information
38 on how to specify a consumer gpio.
39 maxItems: 130 maxItems: 1
40 31
41 avdd-supply:32 avdd-supply:
42 description:33 description:
43 Definition of the regulator used as analog supply34 Analog supply voltage (AVDD).
44 35
45 clock-frequency:36 clock-frequency:
37 description:
38 Controls the SCK bit-bang timing. The value is used to derive the
39 delay between SCK edges; keep the SCK high time below 60 us to
40 avoid triggering chip power-down mode.
46 minimum: 2000041 minimum: 20000
47 maximum: 250000042 maximum: 2500000
48 default: 40000043 default: 400000
Documentation/devicetree/bindings/iio/adc/mediatek,mt6359-auxadc.yaml+11−6
@@ -18,12 +18,17 @@ description: · 17 unmodified lines
18 18
19properties:19properties:
20 compatible:20 compatible:
21 enum:21 oneOf:
22 - mediatek,mt6357-auxadc22 - enum:
23 - mediatek,mt6358-auxadc23 - mediatek,mt6357-auxadc
24 - mediatek,mt6359-auxadc24 - mediatek,mt6358-auxadc
25 - mediatek,mt6363-auxadc25 - mediatek,mt6359-auxadc
26 - mediatek,mt6373-auxadc26 - mediatek,mt6363-auxadc
27 - mediatek,mt6373-auxadc
28 - items:
29 - enum:
30 - mediatek,mt6365-auxadc
31 - const: mediatek,mt6359-auxadc
27 32
28 "#io-channel-cells":33 "#io-channel-cells":
29 const: 134 const: 1
Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml+15−0
@@ -78,6 +78,10 @@ patternProperties: · 77 unmodified lines
78 reg:78 reg:
79 maxItems: 179 maxItems: 1
80 80
81 label:
82 description: |
83 Unique name to identify which channel this is.
84
81 qcom,decimation:85 qcom,decimation:
82 $ref: /schemas/types.yaml#/definitions/uint3286 $ref: /schemas/types.yaml#/definitions/uint32
83 description: |87 description: |
@@ -130,36 +134,47 @@ examples: · 46 unmodified lines
130 134
131 vcoin: adc-channel@0 {135 vcoin: adc-channel@0 {
132 reg = <0x00 0x00>;136 reg = <0x00 0x00>;
137 label = "vcoin";
133 };138 };
134 vbat: adc-channel@1 {139 vbat: adc-channel@1 {
135 reg = <0x00 0x01>;140 reg = <0x00 0x01>;
141 label = "vbat";
136 };142 };
137 dcin: adc-channel@2 {143 dcin: adc-channel@2 {
138 reg = <0x00 0x02>;144 reg = <0x00 0x02>;
145 label = "dcin";
139 };146 };
140 ichg: adc-channel@3 {147 ichg: adc-channel@3 {
141 reg = <0x00 0x03>;148 reg = <0x00 0x03>;
149 label = "ichg";
142 };150 };
143 vph_pwr: adc-channel@4 {151 vph_pwr: adc-channel@4 {
144 reg = <0x00 0x04>;152 reg = <0x00 0x04>;
153 label = "vph_pwr";
145 };154 };
146 usb_vbus: adc-channel@a {155 usb_vbus: adc-channel@a {
147 reg = <0x00 0x0a>;156 reg = <0x00 0x0a>;
157 label = "usb_vbus";
148 };158 };
149 die_temp: adc-channel@b {159 die_temp: adc-channel@b {
150 reg = <0x00 0x0b>;160 reg = <0x00 0x0b>;
161 label = "die_temp";
151 };162 };
152 ref_625mv: adc-channel@c {163 ref_625mv: adc-channel@c {
153 reg = <0x00 0x0c>;164 reg = <0x00 0x0c>;
165 label = "ref_625mv";
154 };166 };
155 ref_1250mv: adc-channel@d {167 ref_1250mv: adc-channel@d {
156 reg = <0x00 0x0d>;168 reg = <0x00 0x0d>;
169 label = "ref_1250mv";
157 };170 };
158 ref_325mv: adc-channel@e {171 ref_325mv: adc-channel@e {
159 reg = <0x00 0x0e>;172 reg = <0x00 0x0e>;
173 label = "ref_325mv";
160 };174 };
161 ref_muxoff: adc-channel@f {175 ref_muxoff: adc-channel@f {
162 reg = <0x00 0x0f>;176 reg = <0x00 0x0f>;
177 label = "ref_muxoff";
163 };178 };
164 };179 };
165 };180 };
Documentation/devicetree/bindings/iio/adc/st,spear600-adc.yaml+1−1
@@ -65,5 +65,5 @@ examples: · 64 unmodified lines
65 interrupt-parent = <&vic1>;65 interrupt-parent = <&vic1>;
66 interrupts = <6>;66 interrupts = <6>;
67 sampling-frequency = <5000000>;67 sampling-frequency = <5000000>;
68 vref-external = <2500>; /* 2.5V VRef */68 vref-external = <2500>; /* 2.5V VRef */
69 };69 };
Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: Sensirion SCD30 carbon dioxide sensor7title: Sensirion SCD30 carbon dioxide sensor
8 8
9maintainers:9maintainers:
10 - Tomasz Duszynski <tomasz.duszynski@octakon.com>10 - Maxwell Doose <m32285159@gmail.com>
11 11
12description: |12description: |
13 Air quality sensor capable of measuring co2 concentration, temperature13 Air quality sensor capable of measuring co2 concentration, temperature
Documentation/devicetree/bindings/iio/dac/adi,ad5706r.yaml+105−0
@@ -0,0 +1,105 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/dac/adi,ad5706r.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices AD5706R 4-Channel Current Output DAC
8
9maintainers:
10 - Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
11
12description: |
13 The AD5706R is a 4-channel, 16-bit resolution, current output
14 digital-to-analog converter (DAC) with programmable output current
15 ranges (50mA, 150mA, 200mA, 300mA), an integrated 2.5V voltage
16 reference, and load DAC, A/B toggle, and dither functions.
17
18 Datasheet:
19 https://www.analog.com/en/products/ad5706r.html
20
21properties:
22 compatible:
23 enum:
24 - adi,ad5706r
25
26 reg:
27 maxItems: 1
28
29 avdd-supply:
30 description: Analog power supply (2.9V to 3.6V).
31
32 iovdd-supply:
33 description: Logic power supply (1.14V to 1.89V).
34
35 pvdd0-supply:
36 description: Power supply for IDAC0 channel (1.65V to AVDD).
37
38 pvdd1-supply:
39 description: Power supply for IDAC1 channel (1.65V to AVDD).
40
41 pvdd2-supply:
42 description: Power supply for IDAC2 channel (1.65V to AVDD).
43
44 pvdd3-supply:
45 description: Power supply for IDAC3 channel (1.65V to AVDD).
46
47 vref-supply:
48 description:
49 Optional external 2.5V voltage reference. If not provided, the
50 internal 2.5V reference is used.
51
52 pwms:
53 maxItems: 1
54 description:
55 Optional PWM connected to the LDAC/TGP/DCK pin for hardware
56 triggered DAC updates, toggle, or dither clock generation.
57
58 reset-gpios:
59 maxItems: 1
60 description:
61 GPIO connected to the active low RESET pin. If not provided,
62 software reset is used.
63
64 enable-gpios:
65 maxItems: 1
66 description:
67 GPIO connected to the active low OUT_EN pin. Controls whether
68 the current outputs are enabled or in high-Z/ground state.
69
70required:
71 - compatible
72 - reg
73 - avdd-supply
74 - iovdd-supply
75
76allOf:
77 - $ref: /schemas/spi/spi-peripheral-props.yaml#
78
79unevaluatedProperties: false
80
81examples:
82 - |
83 #include <dt-bindings/gpio/gpio.h>
84
85 spi {
86 #address-cells = <1>;
87 #size-cells = <0>;
88
89 dac@0 {
90 compatible = "adi,ad5706r";
91 reg = <0>;
92 avdd-supply = <&avdd>;
93 iovdd-supply = <&iovdd>;
94 pvdd0-supply = <&pvdd>;
95 pvdd1-supply = <&pvdd>;
96 pvdd2-supply = <&pvdd>;
97 pvdd3-supply = <&pvdd>;
98 vref-supply = <&vref>;
99 spi-max-frequency = <50000000>;
100 pwms = <&pwm0 0 1000000 0>;
101 reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
102 enable-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
103 };
104 };
105...
Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml+18−18
@@ -161,8 +161,8 @@ patternProperties: · 160 unmodified lines
161 properties:161 properties:
162 reg:162 reg:
163 description: The channel number.163 description: The channel number.
164 minItems: 1164 minimum: 0
165 maxItems: 8165 maximum: 7
166 166
167 label:167 label:
168 description: Unique name to identify which channel this is.168 description: Unique name to identify which channel this is.
@@ -280,23 +280,23 @@ examples: · 111 unmodified lines
280 280
281 #address-cells = <1>;281 #address-cells = <1>;
282 #size-cells = <0>;282 #size-cells = <0>;
283 dac@0 {283 dac@60 {
284 compatible = "microchip,mcp47feb02";284 compatible = "microchip,mcp47feb02";
285 reg = <0>;285 reg = <0x60>;
286 vdd-supply = <&vdac_vdd>;286 vdd-supply = <&vdac_vdd>;
287 vref-supply = <&vref_reg>;287 vref-supply = <&vref_reg>;
288 288
289 #address-cells = <1>;289 #address-cells = <1>;
290 #size-cells = <0>;290 #size-cells = <0>;
291 channel@0 {291 channel@0 {
292 reg = <0>;292 reg = <0>;
293 label = "Adjustable_voltage_ch0";293 label = "Adjustable_voltage_ch0";
294 };294 };
295 295
296 channel@1 {296 channel@1 {
297 reg = <0x1>;297 reg = <0x1>;
298 label = "Adjustable_voltage_ch1";298 label = "Adjustable_voltage_ch1";
299 };299 };
300 };300 };
301 };301 };
302...302...
Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml+6−0
@@ -26,6 +26,9 @@ properties: · 25 unmodified lines
26 vdd-supply: true26 vdd-supply: true
27 vddio-supply: true27 vddio-supply: true
28 28
29 mount-matrix:
30 description: an optional 3x3 mounting rotation matrix.
31
29 spi-max-frequency:32 spi-max-frequency:
30 maximum: 1000000033 maximum: 10000000
31 34
@@ -56,6 +59,9 @@ examples: · 24 unmodified lines
56 reg = <0x69>;59 reg = <0x69>;
57 interrupt-parent = <&gpio6>;60 interrupt-parent = <&gpio6>;
58 interrupts = <18 IRQ_TYPE_EDGE_RISING>;61 interrupts = <18 IRQ_TYPE_EDGE_RISING>;
62 mount-matrix = "0", "1", "0",
63 "1", "0", "0",
64 "0", "0", "1";
59 };65 };
60 };66 };
61...67...
Documentation/devicetree/bindings/iio/light/brcm,apds9999.yaml+54−0
@@ -0,0 +1,54 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/light/brcm,apds9999.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6title: Broadcom APDS-9999 Digital Proximity and RGB Sensor
7
8maintainers:
9 - Jose A. Perez de Azpillaga <azpijr@gmail.com>
10
11description: |
12 Broadcom APDS-9999 is a digital proximity and RGB sensor with
13 ambient light sensing (ALS) capability. The device uses individual
14 R, G, B, and IR channels plus a Vertical Cavity Surface Emitting
15 Laser (VCSEL) for proximity detection.
16
17 Datasheet: https://docs.broadcom.com/docs/APDS-9999-DS
18
19properties:
20 compatible:
21 enum:
22 - brcm,apds9999
23
24 reg:
25 maxItems: 1
26
27 vdd-supply: true
28
29 vcsel-supply:
30 description: VCSEL power supply (VVCSEL pin)
31
32 interrupts:
33 maxItems: 1
34
35additionalProperties: false
36
37required:
38 - compatible
39 - reg
40 - vdd-supply
41
42examples:
43 - |
44 i2c {
45 #address-cells = <1>;
46 #size-cells = <0>;
47
48 light-sensor@52 {
49 compatible = "brcm,apds9999";
50 reg = <0x52>;
51 vdd-supply = <&vdd_reg>;
52 vcsel-supply = <&vcsel_reg>;
53 };
54 };
Documentation/devicetree/bindings/iio/light/tsl2772.yaml+2−0
@@ -26,6 +26,8 @@ properties: · 25 unmodified lines
26 - amstaos,tmd267226 - amstaos,tmd2672
27 - amstaos,tsl277227 - amstaos,tsl2772
28 - amstaos,tmd277228 - amstaos,tmd2772
29 - avago,apds9900
30 - avago,apds9901
29 - avago,apds993031 - avago,apds9930
30 32
31 reg:33 reg:
Documentation/devicetree/bindings/iio/light/vishay,veml6030.yaml+4−1
@@ -4,7 +4,7 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/iio/light/vishay,veml6030.yaml#4$id: http://devicetree.org/schemas/iio/light/vishay,veml6030.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: VEML3235, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS)7title: VEML3235, VEML3328, VEML6030, VEML6035 and VEML7700 Ambient Light Sensors (ALS)
8 8
9maintainers:9maintainers:
10 - Rishi Gupta <gupt21@gmail.com>10 - Rishi Gupta <gupt21@gmail.com>
@@ -21,6 +21,7 @@ description: | · 10 unmodified lines
21 21
22 Specifications about the sensors can be found at:22 Specifications about the sensors can be found at:
23 https://www.vishay.com/docs/80131/veml3235.pdf23 https://www.vishay.com/docs/80131/veml3235.pdf
24 https://www.vishay.com/docs/84968/veml3328.pdf
24 https://www.vishay.com/docs/84366/veml6030.pdf25 https://www.vishay.com/docs/84366/veml6030.pdf
25 https://www.vishay.com/docs/84889/veml6035.pdf26 https://www.vishay.com/docs/84889/veml6035.pdf
26 https://www.vishay.com/docs/84286/veml7700.pdf27 https://www.vishay.com/docs/84286/veml7700.pdf
@@ -29,6 +30,7 @@ properties: · 2 unmodified lines
29 compatible:30 compatible:
30 enum:31 enum:
31 - vishay,veml323532 - vishay,veml3235
33 - vishay,veml3328
32 - vishay,veml603034 - vishay,veml6030
33 - vishay,veml603535 - vishay,veml6035
34 - vishay,veml770036 - vishay,veml7700
@@ -79,6 +81,7 @@ allOf: · 44 unmodified lines
79 compatible:81 compatible:
80 enum:82 enum:
81 - vishay,veml323583 - vishay,veml3235
84 - vishay,veml3328
82 - vishay,veml770085 - vishay,veml7700
83 then:86 then:
84 properties:87 properties:
Documentation/devicetree/bindings/iio/magnetometer/memsic,mmc5983.yaml+63−0
@@ -0,0 +1,63 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/magnetometer/memsic,mmc5983.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MEMSIC MMC5983MA 3-axis magnetic sensor
8
9maintainers:
10 - Vladislav Kulikov <vlad.kulikov.c@gmail.com>
11
12properties:
13 compatible:
14 const: memsic,mmc5983
15
16 reg:
17 maxItems: 1
18
19 interrupts:
20 maxItems: 1
21
22 vdd-supply:
23 description: Regulator that provides power to the sensor
24
25 vddio-supply:
26 description: Regulator that provides power to the digital interface and INT pin
27
28required:
29 - compatible
30 - reg
31 - vdd-supply
32
33allOf:
34 - $ref: /schemas/spi/spi-peripheral-props.yaml#
35
36unevaluatedProperties: false
37
38examples:
39 - |
40 i2c {
41 #address-cells = <1>;
42 #size-cells = <0>;
43
44 magnetometer@30 {
45 compatible = "memsic,mmc5983";
46 reg = <0x30>;
47 vdd-supply = <&vdd_3v3_reg>;
48 vddio-supply = <&vdd_3v3_reg>;
49 };
50 };
51 - |
52 spi {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 magnetometer@0 {
57 compatible = "memsic,mmc5983";
58 reg = <0>;
59 spi-max-frequency = <10000000>;
60 vdd-supply = <&vdd_3v3_reg>;
61 vddio-supply = <&vdd_3v3_reg>;
62 };
63 };
Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml+214−3
@@ -4,14 +4,18 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/iio/temperature/adi,ltc2983.yaml#4$id: http://devicetree.org/schemas/iio/temperature/adi,ltc2983.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: Analog Devices LTC2983, LTC2986, LTM2985 Multi-sensor Temperature system7title: Analog Devices LTC2983 and similar Multi-sensor Temperature systems
8 8
9maintainers:9maintainers:
10 - Nuno Sá <nuno.sa@analog.com>10 - Nuno Sá <nuno.sa@analog.com>
11 11
12description: |12description: |
13 Analog Devices LTC2983, LTC2984, LTC2986, LTM2985 Multi-Sensor Digital13 Analog Devices Multi-Sensor Digital Temperature Measurement Systems:
14 Temperature Measurement Systems14 - ADT7604
15 - LTC2983
16 - LTC2984
17 - LTC2986
18 - LTM2985
15 19
16 https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf20 https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/2984fb.pdf21 https://www.analog.com/media/en/technical-documentation/data-sheets/2984fb.pdf
@@ -43,6 +47,7 @@ properties: · 25 unmodified lines
43 compatible:47 compatible:
44 oneOf:48 oneOf:
45 - enum:49 - enum:
50 - adi,adt7604
46 - adi,ltc298351 - adi,ltc2983
47 - adi,ltc298652 - adi,ltc2986
48 - adi,ltm298553 - adi,ltm2985
@@ -436,6 +441,121 @@ patternProperties: · 387 unmodified lines
436 required:441 required:
437 - adi,custom-temp442 - adi,custom-temp
438 443
444 '^copper-trace@':
445 $ref: '#/$defs/sensor-node'
446 unevaluatedProperties: false
447 description: |
448 Copper trace resistance sensor (some parts only). Two variants exist:
449 sub-ohm (< 1 ohm, no custom table allowed) and standard (> 1 ohm,
450 required custom table).
451
452 properties:
453 reg:
454 minimum: 2
455 maximum: 20
456
457 adi,sensor-type:
458 description: Sensor type for copper trace sensors.
459 $ref: /schemas/types.yaml#/definitions/uint32
460 const: 32
461
462 adi,rsense-handle:
463 description: Associated sense resistor sensor.
464 $ref: /schemas/types.yaml#/definitions/phandle
465
466 adi,copper-trace-sub-ohm:
467 description:
468 Select the sub-ohm (< 1 ohm) copper trace variant. Custom table
469 and excitation current are not allowed in this mode.
470 type: boolean
471
472 adi,excitation-current-microamp:
473 description:
474 Excitation current applied to the copper trace. Not used in
475 sub-ohm mode. The datasheet recommends 1mA for copper trace
476 sensors due to their typically small resistance.
477 enum: [5, 10, 25, 50, 100, 250, 500, 1000]
478 default: 1000
479
480 adi,custom-copper-trace:
481 description:
482 Resistance-to-temperature table for copper trace sensors with
483 resistance > 1 ohm. Required when adi,copper-trace-sub-ohm is not
484 set. See Page 36 of the datasheet.
485 $ref: /schemas/types.yaml#/definitions/uint64-matrix
486 minItems: 3
487 maxItems: 64
488 items:
489 items:
490 - description: Resistance point in uOhms.
491 - description: Temperature point in uK.
492
493 required:
494 - adi,rsense-handle
495
496 allOf:
497 - if:
498 required:
499 - adi,copper-trace-sub-ohm
500 then:
501 properties:
502 adi,custom-copper-trace: false
503 adi,excitation-current-microamp: false
504 - if:
505 not:
506 required:
507 - adi,copper-trace-sub-ohm
508 then:
509 required:
510 - adi,custom-copper-trace
511
512 '^leak-detector@':
513 $ref: '#/$defs/sensor-node'
514 unevaluatedProperties: false
515 description: |
516 Leak detector sensor (some parts only). Outputs resistance in ohms and
517 a coverage percentage via IIO_COVERAGE (raw/1024 = coverage %).
518
519 properties:
520 reg:
521 minimum: 2
522 maximum: 20
523
524 adi,sensor-type:
525 description: Sensor type for leak detector sensors.
526 $ref: /schemas/types.yaml#/definitions/uint32
527 const: 33
528
529 adi,rsense-handle:
530 description: Associated sense resistor sensor.
531 $ref: /schemas/types.yaml#/definitions/phandle
532
533 adi,excitation-current-nanoamp:
534 description:
535 Excitation current applied to the leak detector. The correct value
536 depends on the electrical characteristics of the liquid being sensed.
537 For example, 10000 (10µA) is recommended for PG25 (see datasheet
538 Table 39).
539 enum: [250, 500, 1000, 5000, 10000, 25000, 50000, 100000, 250000,
540 500000, 1000000]
541
542 adi,custom-leak-detector:
543 description: |
544 Lookup table mapping resistance to coverage percentage. Entries must
545 be in ascending resistance order.
546 $ref: /schemas/types.yaml#/definitions/uint64-matrix
547 minItems: 3
548 maxItems: 64
549 items:
550 items:
551 - description: Resistance point in uOhms.
552 - description: Coverage data percentage (0 to 100).
553
554 required:
555 - adi,rsense-handle
556 - adi,excitation-current-nanoamp
557 - adi,custom-leak-detector
558
439 '^rsense@':559 '^rsense@':
440 $ref: '#/$defs/sensor-node'560 $ref: '#/$defs/sensor-node'
441 unevaluatedProperties: false561 unevaluatedProperties: false
@@ -477,6 +597,32 @@ allOf: · 35 unmodified lines
477 patternProperties:597 patternProperties:
478 '^temp@': false598 '^temp@': false
479 599
600 - if:
601 properties:
602 compatible:
603 contains:
604 const: adi,adt7604
605 then:
606 patternProperties:
607 '^thermocouple@': false
608 '^diode@': false
609 '^adc@': false
610 '^temp@': false
611 '^rtd@':
612 properties:
613 adi,sensor-type:
614 not:
615 const: 18
616 '^thermistor@':
617 properties:
618 adi,sensor-type:
619 not:
620 const: 27
621 else:
622 patternProperties:
623 '^copper-trace@': false
624 '^leak-detector@': false
625
480examples:626examples:
481 - |627 - |
482 #include <dt-bindings/interrupt-controller/irq.h>628 #include <dt-bindings/interrupt-controller/irq.h>
@@ -556,4 +702,69 @@ examples: · 73 unmodified lines
556 };702 };
557 };703 };
558 };704 };
705
706 - |
707 #include <dt-bindings/interrupt-controller/irq.h>
708 spi {
709 #address-cells = <1>;
710 #size-cells = <0>;
711
712 temperature-sensor@0 {
713 compatible = "adi,adt7604";
714 reg = <0>;
715 interrupt-parent = <&gpio>;
716 interrupts = <25 IRQ_TYPE_EDGE_RISING>;
717
718 #address-cells = <1>;
719 #size-cells = <0>;
720 vdd-supply = <&supply>;
721
722 trace_rsense: rsense@2 {
723 reg = <2>;
724 adi,sensor-type = <29>;
725 adi,rsense-val-milli-ohms = <100000>; // 100 ohm
726 };
727
728 copper-trace@4 {
729 reg = <4>;
730 adi,sensor-type = <32>;
731 adi,rsense-handle = <&trace_rsense>;
732 adi,copper-trace-sub-ohm;
733 };
734
735 r_sense: rsense@12 {
736 reg = <12>;
737 adi,sensor-type = <29>;
738 adi,rsense-val-milli-ohms = <1000000>; // 1 kohm
739 };
740
741 leak-detector@14 {
742 reg = <14>;
743 adi,sensor-type = <33>;
744 adi,rsense-handle = <&r_sense>;
745 adi,excitation-current-nanoamp = <10000>;
746 adi,custom-leak-detector =
747 /bits/ 64 < 0 100>,
748 /bits/ 64 < 202020000 99>,
749 /bits/ 64 < 285710000 70>,
750 /bits/ 64 < 333330000 60>,
751 /bits/ 64 < 400000000 50>,
752 /bits/ 64 < 500000000 40>,
753 /bits/ 64 < 666670000 30>,
754 /bits/ 64 < 1000000000 20>,
755 /bits/ 64 < 2000000000 10>,
756 /bits/ 64 <1000000000000 0>;
757 };
758
759 rtd@18 {
760 reg = <18>;
761 adi,sensor-type = <12>; // PT100
762 adi,rsense-handle = <&r_sense>;
763 adi,number-of-wires = <2>;
764 adi,rsense-share;
765 adi,excitation-current-microamp = <500>;
766 adi,rtd-curve = <0>;
767 };
768 };
769 };
559...770...
Documentation/devicetree/bindings/input/atmel,maxtouch.yaml+1−2
@@ -88,8 +88,7 @@ properties: · 87 unmodified lines
88 - 2 # ATMEL_MXT_WAKEUP_GPIO88 - 2 # ATMEL_MXT_WAKEUP_GPIO
89 default: 089 default: 0
90 90
91 wakeup-source:91 wakeup-source: true
92 type: boolean
93 92
94required:93required:
95 - compatible94 - compatible
Documentation/devicetree/bindings/input/imx-keypad.yaml+16−16
@@ -66,20 +66,20 @@ examples: · 65 unmodified lines
66 clocks = <&clks 0>;66 clocks = <&clks 0>;
67 pinctrl-names = "default";67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_kpp_1>;68 pinctrl-0 = <&pinctrl_kpp_1>;
69 linux,keymap = <0x00000067 /* KEY_UP */69 linux,keymap = <0x00000067 /* KEY_UP */
70 0x0001006c /* KEY_DOWN */70 0x0001006c /* KEY_DOWN */
71 0x00020072 /* KEY_VOLUMEDOWN */71 0x00020072 /* KEY_VOLUMEDOWN */
72 0x00030066 /* KEY_HOME */72 0x00030066 /* KEY_HOME */
73 0x0100006a /* KEY_RIGHT */73 0x0100006a /* KEY_RIGHT */
74 0x01010069 /* KEY_LEFT */74 0x01010069 /* KEY_LEFT */
75 0x0102001c /* KEY_ENTER */75 0x0102001c /* KEY_ENTER */
76 0x01030073 /* KEY_VOLUMEUP */76 0x01030073 /* KEY_VOLUMEUP */
77 0x02000040 /* KEY_F6 */77 0x02000040 /* KEY_F6 */
78 0x02010042 /* KEY_F8 */78 0x02010042 /* KEY_F8 */
79 0x02020043 /* KEY_F9 */79 0x02020043 /* KEY_F9 */
80 0x02030044 /* KEY_F10 */80 0x02030044 /* KEY_F10 */
81 0x0300003b /* KEY_F1 */81 0x0300003b /* KEY_F1 */
82 0x0301003c /* KEY_F2 */82 0x0301003c /* KEY_F2 */
83 0x0302003d /* KEY_F3 */83 0x0302003d /* KEY_F3 */
84 0x03030074>; /* KEY_POWER */84 0x03030074>; /* KEY_POWER */
85 };85 };
Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml+13−8
@@ -23,14 +23,19 @@ description: | · 22 unmodified lines
23 23
24properties:24properties:
25 compatible:25 compatible:
26 enum:26 oneOf:
27 - mediatek,mt6323-keys27 - enum:
28 - mediatek,mt6328-keys28 - mediatek,mt6323-keys
29 - mediatek,mt6331-keys29 - mediatek,mt6328-keys
30 - mediatek,mt6357-keys30 - mediatek,mt6331-keys
31 - mediatek,mt6358-keys31 - mediatek,mt6357-keys
32 - mediatek,mt6359-keys32 - mediatek,mt6358-keys
33 - mediatek,mt6397-keys33 - mediatek,mt6359-keys
34 - mediatek,mt6397-keys
35 - items:
36 - enum:
37 - mediatek,mt6365-keys
38 - const: mediatek,mt6359-keys
34 39
35 power-off-time-sec: true40 power-off-time-sec: true
36 41
Documentation/devicetree/bindings/input/microchip,cap11xx.yaml+6−6
@@ -197,12 +197,12 @@ examples: · 196 unmodified lines
197 microchip,sensitivity-delta-sense = <16>;197 microchip,sensitivity-delta-sense = <16>;
198 microchip,input-threshold = <21>, <18>, <46>, <46>, <46>, <21>;198 microchip,input-threshold = <21>, <18>, <46>, <46>, <46>, <21>;
199 199
200 linux,keycodes = <103>, /* KEY_UP */200 linux,keycodes = <103>, /* KEY_UP */
201 <106>, /* KEY_RIGHT */201 <106>, /* KEY_RIGHT */
202 <108>, /* KEY_DOWN */202 <108>, /* KEY_DOWN */
203 <105>, /* KEY_LEFT */203 <105>, /* KEY_LEFT */
204 <109>, /* KEY_PAGEDOWN */204 <109>, /* KEY_PAGEDOWN */
205 <104>; /* KEY_PAGEUP */205 <104>; /* KEY_PAGEUP */
206 206
207 #address-cells = <1>;207 #address-cells = <1>;
208 #size-cells = <0>;208 #size-cells = <0>;
Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml+4−0
@@ -40,6 +40,10 @@ properties: · 39 unmodified lines
40 vdd-supply:40 vdd-supply:
41 description: Power supply41 description: Power supply
42 42
43 reset-gpios:
44 description: Reset GPIO (active-low)
45 maxItems: 1
46
43required:47required:
44 - compatible48 - compatible
45 - reg49 - reg
Documentation/devicetree/bindings/input/touchscreen/ti,ads7843.yaml+2−2
@@ -165,9 +165,9 @@ examples: · 164 unmodified lines
165 165
166 touchscreen@0 {166 touchscreen@0 {
167 compatible = "ti,tsc2046";167 compatible = "ti,tsc2046";
168 reg = <0>; /* CS0 */168 reg = <0>; /* CS0 */
169 interrupt-parent = <&gpio1>;169 interrupt-parent = <&gpio1>;
170 interrupts = <8 0>; /* BOOT6 / GPIO 8 */170 interrupts = <8 0>; /* BOOT6 / GPIO 8 */
171 pendown-gpio = <&gpio1 8 0>;171 pendown-gpio = <&gpio1 8 0>;
172 spi-max-frequency = <1000000>;172 spi-max-frequency = <1000000>;
173 vcc-supply = <&reg_vcc3>;173 vcc-supply = <&reg_vcc3>;
Documentation/devicetree/bindings/input/touchscreen/wacom,w9007a-lt03.yaml+73−0
@@ -0,0 +1,73 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/input/touchscreen/wacom,w9007a-lt03.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Wacom W9000-series penabled I2C touchscreen
8
9maintainers:
10 - Hendrik Noack <hendrik-noack@gmx.de>
11
12description: |
13 The W9000-series are penabled touchscreen controllers by Wacom.
14
15 The firmware of controllers in different devices may differ. This can also
16 affect the controller's behavior.
17
18allOf:
19 - $ref: touchscreen.yaml#
20
21properties:
22 compatible:
23 enum:
24 - wacom,w9002
25 - wacom,w9007a-lt03
26 - wacom,w9007a-v1
27
28 reg:
29 maxItems: 1
30
31 interrupts:
32 maxItems: 1
33
34 vdd-supply: true
35
36 flash-mode-gpios:
37 maxItems: 1
38
39 reset-gpios:
40 maxItems: 1
41
42required:
43 - compatible
44 - reg
45 - interrupts
46
47unevaluatedProperties: false
48
49examples:
50 - |
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
53
54 i2c {
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 digitizer@56 {
59 compatible = "wacom,w9007a-lt03";
60 reg = <0x56>;
61 interrupt-parent = <&gpd1>;
62 interrupts = <1 IRQ_TYPE_EDGE_RISING>;
63
64 vdd-supply = <&stylus_reg>;
65
66 flash-mode-gpios = <&gpd1 3 GPIO_ACTIVE_HIGH>;
67 reset-gpios = <&gpx0 1 GPIO_ACTIVE_LOW>;
68
69 touchscreen-x-mm = <216>;
70 touchscreen-y-mm = <135>;
71 touchscreen-inverted-x;
72 };
73 };
Documentation/devicetree/bindings/interconnect/qcom,hawi-rpmh.yaml+131−0
@@ -0,0 +1,131 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,hawi-rpmh.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm RPMh Network-On-Chip Interconnect on Hawi
8
9maintainers:
10 - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
11
12description: |
13 RPMh interconnect providers support system bandwidth requirements through
14 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
15 able to communicate with the BCM through the Resource State Coordinator (RSC)
16 associated with each execution environment. Provider nodes must point to at
17 least one RPMh device child node pertaining to their RSC and each provider
18 can map to multiple RPMh resources.
19
20 See also: include/dt-bindings/interconnect/qcom,hawi-rpmh.h
21
22properties:
23 compatible:
24 enum:
25 - qcom,hawi-aggre1-noc
26 - qcom,hawi-clk-virt
27 - qcom,hawi-cnoc-main
28 - qcom,hawi-gem-noc
29 - qcom,hawi-llclpi-noc
30 - qcom,hawi-lpass-ag-noc
31 - qcom,hawi-lpass-lpiaon-noc
32 - qcom,hawi-lpass-lpicx-noc
33 - qcom,hawi-mc-virt
34 - qcom,hawi-mmss-noc
35 - qcom,hawi-nsp-noc
36 - qcom,hawi-pcie-anoc
37 - qcom,hawi-stdst-cfg
38 - qcom,hawi-stdst-main
39 - qcom,hawi-system-noc
40
41 reg:
42 maxItems: 1
43
44 clocks:
45 minItems: 2
46 maxItems: 3
47
48required:
49 - compatible
50
51allOf:
52 - $ref: qcom,rpmh-common.yaml#
53 - if:
54 properties:
55 compatible:
56 contains:
57 enum:
58 - qcom,hawi-clk-virt
59 - qcom,hawi-mc-virt
60 then:
61 properties:
62 reg: false
63 else:
64 required:
65 - reg
66
67 - if:
68 properties:
69 compatible:
70 contains:
71 enum:
72 - qcom,hawi-pcie-anoc
73 then:
74 properties:
75 clocks:
76 items:
77 - description: aggre-NOC PCIe AXI clock
78 - description: cfg-NOC PCIe a-NOC AHB clock
79
80 - if:
81 properties:
82 compatible:
83 contains:
84 enum:
85 - qcom,hawi-aggre1-noc
86 then:
87 properties:
88 clocks:
89 items:
90 - description: aggre UFS PHY AXI clock
91 - description: aggre USB3 PRIM AXI clock
92 - description: RPMH CC IPA clock
93
94 - if:
95 properties:
96 compatible:
97 contains:
98 enum:
99 - qcom,hawi-aggre1-noc
100 - qcom,hawi-pcie-anoc
101 then:
102 required:
103 - clocks
104 else:
105 properties:
106 clocks: false
107
108unevaluatedProperties: false
109
110examples:
111 - |
112 soc {
113 #address-cells = <2>;
114 #size-cells = <2>;
115
116 clk_virt: interconnect-0 {
117 compatible = "qcom,hawi-clk-virt";
118 #interconnect-cells = <2>;
119 qcom,bcm-voters = <&apps_bcm_voter>;
120 };
121
122 aggre_noc: interconnect@f00000 {
123 compatible = "qcom,hawi-aggre1-noc";
124 reg = <0x0 0xf00000 0x0 0x54400>;
125 #interconnect-cells = <2>;
126 clocks = <&gcc_aggre_ufs_phy_axi_clk>,
127 <&gcc_aggre_usb3_prim_axi_clk>,
128 <&rpmhcc_ipa_clk>;
129 qcom,bcm-voters = <&apps_bcm_voter>;
130 };
131 };
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml+2−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - items:26 - items:
27 - enum:27 - enum:
28 - qcom,glymur-cpu-bwmon28 - qcom,glymur-cpu-bwmon
29 - qcom,hawi-cpu-bwmon
29 - qcom,kaanapali-cpu-bwmon30 - qcom,kaanapali-cpu-bwmon
30 - qcom,qcm2290-cpu-bwmon31 - qcom,qcm2290-cpu-bwmon
31 - qcom,qcs615-cpu-bwmon32 - qcom,qcs615-cpu-bwmon
@@ -45,6 +46,7 @@ properties: · 13 unmodified lines
45 - const: qcom,sdm845-bwmon # BWMON v4, unified register space46 - const: qcom,sdm845-bwmon # BWMON v4, unified register space
46 - items:47 - items:
47 - enum:48 - enum:
49 - qcom,hawi-llcc-bwmon
48 - qcom,qcs615-llcc-bwmon50 - qcom,qcs615-llcc-bwmon
49 - qcom,qcs8300-llcc-bwmon51 - qcom,qcs8300-llcc-bwmon
50 - qcom,sa8775p-llcc-bwmon52 - qcom,sa8775p-llcc-bwmon
Documentation/devicetree/bindings/interconnect/qcom,nord-rpmh.yaml+131−0
@@ -0,0 +1,131 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,nord-rpmh.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm RPMh Network-On-Chip Interconnect on Nord
8
9maintainers:
10 - Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
11
12description: |
13 RPMh interconnect providers support system bandwidth requirements through
14 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
15 able to communicate with the BCM through the Resource State Coordinator (RSC)
16 associated with each execution environment. Provider nodes must point to at
17 least one RPMh device child node pertaining to their RSC and each provider
18 can map to multiple RPMh resources.
19
20 See also: include/dt-bindings/interconnect/qcom,nord-rpmh.h
21
22properties:
23 compatible:
24 enum:
25 - qcom,nord-aggre1-noc
26 - qcom,nord-aggre1-noc-tile
27 - qcom,nord-aggre2-noc
28 - qcom,nord-aggre2-noc-tile
29 - qcom,nord-clk-virt
30 - qcom,nord-cnoc-cfg
31 - qcom,nord-cnoc-main
32 - qcom,nord-hpass-ag-noc
33 - qcom,nord-hscnoc
34 - qcom,nord-mc-virt
35 - qcom,nord-mmss-noc
36 - qcom,nord-nsp-data-noc-0
37 - qcom,nord-nsp-data-noc-1
38 - qcom,nord-nsp-data-noc-2
39 - qcom,nord-nsp-data-noc-3
40 - qcom,nord-pcie-cfg
41 - qcom,nord-pcie-data-inbound
42 - qcom,nord-pcie-data-outbound
43 - qcom,nord-system-noc
44
45 reg:
46 maxItems: 1
47
48 clocks:
49 minItems: 1
50 maxItems: 4
51
52required:
53 - compatible
54
55allOf:
56 - $ref: qcom,rpmh-common.yaml#
57 - if:
58 properties:
59 compatible:
60 contains:
61 enum:
62 - qcom,nord-clk-virt
63 - qcom,nord-mc-virt
64 then:
65 properties:
66 reg: false
67 else:
68 required:
69 - reg
70
71 - if:
72 properties:
73 compatible:
74 contains:
75 enum:
76 - qcom,nord-aggre1-noc-tile
77 then:
78 properties:
79 clocks:
80 items:
81 - description: aggre UFS PHY AXI clock
82 - description: aggre USB2 AXI clock
83 - description: aggre USB3 PRIM AXI clock
84 - description: aggre USB3 SEC AXI clock
85
86 - if:
87 properties:
88 compatible:
89 contains:
90 enum:
91 - qcom,nord-aggre2-noc
92 then:
93 properties:
94 clocks:
95 items:
96 - description: RPMH CC IPA clock
97
98 - if:
99 properties:
100 compatible:
101 contains:
102 enum:
103 - qcom,nord-aggre1-noc-tile
104 - qcom,nord-aggre2-noc
105 then:
106 required:
107 - clocks
108 else:
109 properties:
110 clocks: false
111
112unevaluatedProperties: false
113
114examples:
115 - |
116 clk_virt: interconnect-clk-virt {
117 compatible = "qcom,nord-clk-virt";
118 #interconnect-cells = <2>;
119 qcom,bcm-voters = <&apps_bcm_voter>;
120 };
121
122 aggre1_noc_tile: interconnect@1720000 {
123 compatible = "qcom,nord-aggre1-noc-tile";
124 reg = <0x01720000 0x23400>;
125 #interconnect-cells = <2>;
126 qcom,bcm-voters = <&apps_bcm_voter>;
127 clocks = <&ne_gcc_aggre_noc_ufs_phy_axi_clk>,
128 <&ne_gcc_aggre_noc_usb2_axi_clk>,
129 <&ne_gcc_aggre_noc_usb3_prim_axi_clk>,
130 <&ne_gcc_aggre_noc_usb3_sec_axi_clk>;
131 };
Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml+13−0
@@ -79,6 +79,19 @@ allOf: · 78 unmodified lines
79 - const: aggre2_usb3_axi79 - const: aggre2_usb3_axi
80 - const: cfg_noc_usb2_axi80 - const: cfg_noc_usb2_axi
81 81
82 - if:
83 properties:
84 compatible:
85 enum:
86 - qcom,sdm660-bimc
87 - qcom,sdm660-cnoc
88 - qcom,sdm660-gnoc
89 - qcom,sdm660-snoc
90 then:
91 properties:
92 clocks: false
93 clock-names: false
94
82examples:95examples:
83 - |96 - |
84 #include <dt-bindings/clock/qcom,gcc-sdm660.h>97 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
Documentation/devicetree/bindings/interconnect/qcom,shikra.yaml+134−0
@@ -0,0 +1,134 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,shikra.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Shikra Network-On-Chip interconnect
8
9maintainers:
10 - Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
11
12description:
13 The Qualcomm Shikra interconnect providers support adjusting the
14 bandwidth requirements between the various NoC fabrics.
15
16properties:
17 compatible:
18 enum:
19 - qcom,shikra-config-noc
20 - qcom,shikra-mem-noc-core
21 - qcom,shikra-sys-noc
22
23 reg:
24 maxItems: 1
25
26 clocks:
27 minItems: 1
28 maxItems: 4
29
30 clock-names:
31 minItems: 1
32 maxItems: 4
33
34# Child node's properties
35patternProperties:
36 '^interconnect-[a-z0-9]+$':
37 type: object
38 description:
39 The interconnect providers do not have a separate QoS register space,
40 but share parent's space.
41
42 $ref: qcom,rpm-common.yaml#
43
44 properties:
45 compatible:
46 enum:
47 - qcom,shikra-clk-virt
48 - qcom,shikra-mc-virt
49 - qcom,shikra-mmrt-virt
50 - qcom,shikra-mmnrt-virt
51
52 required:
53 - compatible
54
55 unevaluatedProperties: false
56
57required:
58 - compatible
59 - reg
60
61allOf:
62 - $ref: qcom,rpm-common.yaml#
63 - if:
64 properties:
65 compatible:
66 const: qcom,shikra-mem-noc-core
67
68 then:
69 properties:
70 clocks:
71 items:
72 - description: GPU-NoC AXI clock
73
74 clock-names:
75 items:
76 - const: gpu_axi
77 patternProperties:
78 '^interconnect-[a-z0-9]+$': false
79
80 - if:
81 properties:
82 compatible:
83 const: qcom,shikra-sys-noc
84
85 then:
86 properties:
87 clocks:
88 items:
89 - description: EMAC0-NoC AXI clock.
90 - description: EMAC1-NoC AXI clock.
91 - description: USB2-NoC AXI clock.
92 - description: USB3-NoC AXI clock.
93
94 clock-names:
95 items:
96 - const: emac0_axi
97 - const: emac1_axi
98 - const: usb2_axi
99 - const: usb3_axi
100
101 - if:
102 properties:
103 compatible:
104 const: qcom,shikra-config-noc
105
106 then:
107 properties:
108 clocks: false
109 clock-names: false
110 patternProperties:
111 '^interconnect-[a-z0-9]+$': false
112
113unevaluatedProperties: false
114
115examples:
116 - |
117 interconnect@1880000 {
118 compatible = "qcom,shikra-sys-noc";
119 reg = <0x01880000 0x6a080>;
120 #interconnect-cells = <2>;
121 clocks = <&gcc_emac0_axi_sys_noc_clk>,
122 <&gcc_emac1_axi_sys_noc_clk>,
123 <&gcc_sys_noc_usb2_prim_axi_clk>,
124 <&gcc_sys_noc_usb3_prim_axi_clk>;
125 clock-names = "emac0_axi",
126 "emac1_axi",
127 "usb2_axi",
128 "usb3_axi";
129
130 interconnect-clk {
131 compatible = "qcom,shikra-clk-virt";
132 #interconnect-cells = <2>;
133 };
134 };
Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml+15−18
@@ -62,23 +62,33 @@ allOf: · 61 unmodified lines
62 - if:62 - if:
63 properties:63 properties:
64 compatible:64 compatible:
65 const: qcom,sm6115-cnoc65 const: qcom,sm6115-bimc
66 then:
67 properties:
68 clocks: false
69 clock-names: false
70 patternProperties:
71 '^interconnect-[a-z0-9]+$': false
66 72
73 - if:
74 properties:
75 compatible:
76 const: qcom,sm6115-cnoc
67 then:77 then:
68 properties:78 properties:
69 clocks:79 clocks:
70 items:80 items:
71 - description: USB-NoC AXI clock81 - description: USB-NoC AXI clock
72
73 clock-names:82 clock-names:
74 items:83 items:
75 - const: usb_axi84 - const: usb_axi
85 patternProperties:
86 '^interconnect-[a-z0-9]+$': false
76 87
77 - if:88 - if:
78 properties:89 properties:
79 compatible:90 compatible:
80 const: qcom,sm6115-snoc91 const: qcom,sm6115-snoc
81
82 then:92 then:
83 properties:93 properties:
84 clocks:94 clocks:
@@ -87,7 +97,6 @@ allOf: · 2 unmodified lines
87 - description: UFS-NoC AXI clock.97 - description: UFS-NoC AXI clock.
88 - description: USB-NoC AXI clock.98 - description: USB-NoC AXI clock.
89 - description: IPA clock.99 - description: IPA clock.
90
91 clock-names:100 clock-names:
92 items:101 items:
93 - const: cpu_axi102 - const: cpu_axi
@@ -95,20 +104,6 @@ allOf: · 1 unmodified line
95 - const: usb_axi104 - const: usb_axi
96 - const: ipa105 - const: ipa
97 106
98 - if:
99 properties:
100 compatible:
101 enum:
102 - qcom,sm6115-bimc
103 - qcom,sm6115-clk-virt
104 - qcom,sm6115-mmrt-virt
105 - qcom,sm6115-mmnrt-virt
106
107 then:
108 properties:
109 clocks: false
110 clock-names: false
111
112unevaluatedProperties: false107unevaluatedProperties: false
113 108
114examples:109examples:
@@ -149,4 +144,6 @@ examples: · 34 unmodified lines
149 compatible = "qcom,sm6115-cnoc";144 compatible = "qcom,sm6115-cnoc";
150 reg = <0x01900000 0x8200>;145 reg = <0x01900000 0x8200>;
151 #interconnect-cells = <1>;146 #interconnect-cells = <1>;
147 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>;
148 clock-names = "usb_axi";
152 };149 };
Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml+17−4
@@ -38,6 +38,8 @@ properties: · 37 unmodified lines
38 - amlogic,a4-gpio-intc38 - amlogic,a4-gpio-intc
39 - amlogic,a4-gpio-ao-intc39 - amlogic,a4-gpio-ao-intc
40 - amlogic,a5-gpio-intc40 - amlogic,a5-gpio-intc
41 - amlogic,a9-gpio-intc
42 - amlogic,a9-gpio-ao-intc
41 - amlogic,c3-gpio-intc43 - amlogic,c3-gpio-intc
42 - amlogic,s6-gpio-intc44 - amlogic,s6-gpio-intc
43 - amlogic,s7-gpio-intc45 - amlogic,s7-gpio-intc
@@ -56,7 +58,7 @@ properties: · 12 unmodified lines
56 amlogic,channel-interrupts:58 amlogic,channel-interrupts:
57 description: Array with the upstream hwirq numbers59 description: Array with the upstream hwirq numbers
58 minItems: 260 minItems: 2
59 maxItems: 1261 maxItems: 20
60 $ref: /schemas/types.yaml#/definitions/uint32-array62 $ref: /schemas/types.yaml#/definitions/uint32-array
61 63
62required:64required:
@@ -76,9 +78,20 @@ then: · 13 unmodified lines
76 amlogic,channel-interrupts:78 amlogic,channel-interrupts:
77 maxItems: 279 maxItems: 2
78else:80else:
79 properties:81 if:
80 amlogic,channel-interrupts:82 properties:
81 minItems: 883 compatible:
84 contains:
85 const: amlogic,a9-gpio-ao-intc
86 then:
87 properties:
88 amlogic,channel-interrupts:
89 minItems: 20
90 else:
91 properties:
92 amlogic,channel-interrupts:
93 minItems: 8
94 maxItems: 12
82 95
83additionalProperties: false96additionalProperties: false
84 97
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-intc.yaml+0−90
@@ -1,90 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-intc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Aspeed AST2700 Interrupt Controller
8
9description:
10 This interrupt controller hardware is second level interrupt controller that
11 is hooked to a parent interrupt controller. It's useful to combine multiple
12 interrupt sources into 1 interrupt to parent interrupt controller.
13
14maintainers:
15 - Kevin Chen <kevin_chen@aspeedtech.com>
16
17properties:
18 compatible:
19 enum:
20 - aspeed,ast2700-intc-ic
21
22 reg:
23 maxItems: 1
24
25 interrupt-controller: true
26
27 '#interrupt-cells':
28 const: 1
29 description:
30 The first cell is the IRQ number, the second cell is the trigger
31 type as defined in interrupt.txt in this directory.
32
33 interrupts:
34 minItems: 1
35 maxItems: 10
36 description: |
37 Depend to which INTC0 or INTC1 used.
38 INTC0 and INTC1 are two kinds of interrupt controller with enable and raw
39 status registers for use.
40 INTC0 is used to assert GIC if interrupt in INTC1 asserted.
41 INTC1 is used to assert INTC0 if interrupt of modules asserted.
42 +-----+ +-------+ +---------+---module0
43 | GIC |---| INTC0 |--+--| INTC1_0 |---module2
44 | | | | | | |---...
45 +-----+ +-------+ | +---------+---module31
46 |
47 | +---------+---module0
48 +---| INTC1_1 |---module2
49 | | |---...
50 | +---------+---module31
51 ...
52 | +---------+---module0
53 +---| INTC1_5 |---module2
54 | |---...
55 +---------+---module31
56
57required:
58 - compatible
59 - reg
60 - interrupt-controller
61 - '#interrupt-cells'
62 - interrupts
63
64additionalProperties: false
65
66examples:
67 - |
68 #include <dt-bindings/interrupt-controller/arm-gic.h>
69
70 bus {
71 #address-cells = <2>;
72 #size-cells = <2>;
73
74 interrupt-controller@12101b00 {
75 compatible = "aspeed,ast2700-intc-ic";
76 reg = <0 0x12101b00 0 0x10>;
77 #interrupt-cells = <1>;
78 interrupt-controller;
79 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
80 <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
81 <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
82 <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
83 <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
84 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
85 <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
86 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
87 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
88 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
89 };
90 };
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2700-interrupt.yaml+188−0
@@ -0,0 +1,188 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2700-interrupt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ASPEED AST2700 Interrupt Controllers (INTC0/INTC1)
8
9description: |
10 The ASPEED AST2700 SoC integrates two interrupt controller designs:
11
12 - INTC0: Primary controller that routes interrupt sources to upstream,
13 processor-specific interrupt controllers
14
15 - INTC1: Secondary controller whose interrupt outputs feed into INTC0
16
17 The SoC contains four processors to which interrupts can be routed:
18
19 - PSP: Primary Service Processor (Cortex-A35)
20 - SSP: Secondary Service Processor (Cortex-M4)
21 - TSP: Tertiary Service Processor (Cortex-M4)
22 - BMCU: Boot MCU (a RISC-V microcontroller)
23
24 The following diagram illustrates the overall architecture of the
25 ASPEED AST2700 interrupt controllers:
26
27 +-----------+ +-----------+
28 | INTC0 | | INTC1(0) |
29 +-----------+ +-----------+
30 | Router | +-----------+ | Router |
31 | out int | +Peripheral + | out int |
32 +-----------+ | 0 0 <-+Controllers+ | INTM | +-----------+
33 |PSP GIC <-|---+ . . | +-----------+ | . . <-+Peripheral +
34 +-----------+ | . . | | . . | +Controllers+
35 +-----------+ | . . | | . . | +-----------+
36 |SSP NVIC <-|---+ . . <----------------+ . . |
37 +-----------+ | . . | | . . |
38 +-----------+ | . . <-------- | . . |
39 |TSP NVIC <-|---+ . . | | ----+ . . |
40 +-----------+ | . . | | | | O P |
41 | . . | | | +-----------+
42 | . . <---- | --------------------
43 | . . | | | +-----------+ |
44 | M N | | ---------+ INTC1(1) | |
45 +-----------+ | +-----------+ |
46 | . |
47 | +-----------+ |
48 -------------+ INTC1(N) | |
49 +-----------+ |
50 +--------------+ |
51 + BMCU APLIC <-+---------------------------------------------
52 +--------------+
53
54 INTC0 supports:
55 - 128 local peripheral interrupt inputs
56 - Fan-in from up to three INTC1 instances via banked interrupt lines (INTM)
57 - Local peripheral interrupt outputs
58 - Merged interrupt outputs
59 - Software interrupt outputs (SWINT)
60 - Configurable interrupt routes targeting the PSP, SSP, and TSP
61
62 INTC1 supports:
63 - 192 local peripheral interrupt inputs
64 - Banked interrupt outputs (INTM, 5 x 6 banks x 32 interrupts per bank)
65 - Configurable interrupt routes targeting the PSP, SSP, TSP, and BMCU
66
67 One INTC1 instance is always present, on the SoC's IO die. A further two
68 instances may be attached to the SoC's one INTC0 instance via LTPI (LVDS
69 Tunneling Protocol & Interface).
70
71 Interrupt numbering model
72 -------------------------
73 The binding uses a controller-local numbering model. Peripheral device
74 nodes use the INTCx local interrupt number (hwirq) in their 'interrupts' or
75 'interrupts-extended' properties.
76
77 For AST2700, INTC0 exposes the following (inclusive) input ranges:
78
79 - 000..479: Independent interrupts
80 - 480..489: INTM0-INTM9
81 - 490..499: INTM10-INTM19
82 - 500..509: INTM20-INTM29
83 - 510..519: INTM30-INTM39
84 - 520..529: INTM40-INTM49
85
86 INTC0's (inclusive) output ranges are as follows:
87
88 - 000..127: 1:1 local peripheral interrupt output to PSP
89 - 144..151: Software interrupts from the SSP output to PSP
90 - 152..159: Software interrupts from the TSP output to PSP
91 - 192..201: INTM0-INTM9 banked outputs to PSP
92 - 208..217: INTM30-INTM39 banked outputs to PSP
93 - 224..233: INTM40-INTM49 banked outputs to PSP
94 - 256..383: 1:1 local peripheral interrupt output to SSP
95 - 384..393: INTM10-INTM19 banked outputs to SSP
96 - 400..407: Software interrupts from the PSP output to SSP
97 - 408..415: Software interrupts from the TSP output to SSP
98 - 426..553: 1:1 local peripheral interrupt output to TSP
99 - 554..563: INTM20-INTM29 banked outputs to TSP
100 - 570..577: Software interrupts from the PSP output to TSP
101 - 578..585: Software interrupts from the SSP output to TSP
102
103 Inputs and outputs for INTC1 instances are context-dependent. However, for the
104 first instance of INTC1, the (inclusive) output ranges are:
105
106 - 00..05: INTM0-INTM5
107 - 10..15: INTM10-INTM15
108 - 20..25: INTM20-INTM25
109 - 30..35: INTM30-INTM35
110 - 40..45: INTM40-INTM45
111 - 50..50: BootMCU
112
113maintainers:
114 - Ryan Chen <ryan_chen@aspeedtech.com>
115 - Andrew Jeffery <andrew@codeconstruct.com.au>
116
117properties:
118 compatible:
119 enum:
120 - aspeed,ast2700-intc0
121 - aspeed,ast2700-intc1
122
123 reg:
124 maxItems: 1
125
126 interrupt-controller: true
127
128 '#interrupt-cells':
129 const: 1
130 description: Single cell encoding the INTC local interrupt number (hwirq).
131
132 aspeed,interrupt-ranges:
133 description: |
134 Describes how ranges of controller output pins are routed to a parent
135 interrupt controller.
136
137 Each range entry is encoded as:
138
139 <out count phandle parent-specifier...>
140
141 where:
142 - out: First controller interrupt output index in the range.
143 - count: Number of consecutive controller interrupt outputs and parent
144 interrupt inputs in this range.
145 - phandle: Phandle to the parent interrupt controller node.
146 - parent-specifier: Interrupt specifier, as defined by the parent
147 interrupt controller binding.
148 $ref: /schemas/types.yaml#/definitions/uint32-array
149 minItems: 3
150 items:
151 description: Range descriptors with a parent interrupt specifier.
152
153required:
154 - compatible
155 - reg
156 - interrupt-controller
157 - '#interrupt-cells'
158 - aspeed,interrupt-ranges
159
160additionalProperties: false
161
162examples:
163 - |
164 #include <dt-bindings/interrupt-controller/arm-gic.h>
165
166 interrupt-controller@12100000 {
167 compatible = "aspeed,ast2700-intc0";
168 reg = <0x12100000 0x3b00>;
169 interrupt-parent = <&gic>;
170 interrupt-controller;
171 #interrupt-cells = <1>;
172
173 aspeed,interrupt-ranges =
174 <0 128 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
175 <144 8 &gic GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
176 <152 8 &gic GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
177 <192 10 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
178 <208 10 &gic GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
179 <224 10 &gic GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
180 <256 128 &ssp_nvic 0 0>,
181 <384 10 &ssp_nvic 160 0>,
182 <400 8 &ssp_nvic 144 0>,
183 <408 8 &ssp_nvic 152 0>,
184 <426 128 &tsp_nvic 0 0>,
185 <554 10 &tsp_nvic 160 0>,
186 <570 8 &tsp_nvic 144 0>,
187 <578 8 &tsp_nvic 152 0>;
188 };
Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml+20−0
@@ -52,6 +52,25 @@ properties: · 51 unmodified lines
52 - description: primary per-CPU IRQ52 - description: primary per-CPU IRQ
53 - description: shadow IRQ number53 - description: shadow IRQ number
54 54
55 econet,cpu-interrupt-map:
56 $ref: /schemas/types.yaml#/definitions/uint32-matrix
57 description:
58 When running in VEIC mode, the hardware re-routes interrupts from the
59 CPU interrupt controller core to the "external" interrupt controller
60 (this device). It then prioritizes them and sends them back to the CPU
61 along with its own interrupts. The CPU hardware handles interrupts using
62 a special dispatch table (the normal interrupt handler is not invoked).
63 In this interrupt controller, the CPU interrupts are renumbered as they
64 are merged with this controller's own hardware interrupts.
65
66 This is the inverse of an interrupt-map, mapping which interrupts from
67 this controller must be routed back to the CPU interrupt domain for
68 correct handling there.
69 items:
70 items:
71 - description: The interrupt number as received in this controller
72 - description: The interrupt number to be dispatched on the CPU intc
73
55required:74required:
56 - compatible75 - compatible
57 - reg76 - reg
@@ -74,5 +93,6 @@ examples: · 16 unmodified lines
74 interrupts = <2>;93 interrupts = <2>;
75 94
76 econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;95 econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
96 econet,cpu-interrupt-map = <7 0>, <8 1>;
77 };97 };
78...98...
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml+2−0
@@ -30,7 +30,9 @@ properties: · 29 unmodified lines
30 - qcom,glymur-pdc30 - qcom,glymur-pdc
31 - qcom,hawi-pdc31 - qcom,hawi-pdc
32 - qcom,kaanapali-pdc32 - qcom,kaanapali-pdc
33 - qcom,maili-pdc
33 - qcom,milos-pdc34 - qcom,milos-pdc
35 - qcom,nord-pdc
34 - qcom,qcs615-pdc36 - qcom,qcs615-pdc
35 - qcom,qcs8300-pdc37 - qcom,qcs8300-pdc
36 - qcom,qdu1000-pdc38 - qcom,qdu1000-pdc
Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml+1−1
@@ -165,7 +165,7 @@ examples: · 164 unmodified lines
165 icu: interrupt-controller@802a0000 {165 icu: interrupt-controller@802a0000 {
166 compatible = "renesas,r9a09g077-icu";166 compatible = "renesas,r9a09g077-icu";
167 reg = <0x802a0000 0x10000>,167 reg = <0x802a0000 0x10000>,
168 <0x812a0000 0x50>;168 <0x812a0000 0x10000>;
169 #interrupt-cells = <2>;169 #interrupt-cells = <2>;
170 #address-cells = <0>;170 #address-cells = <0>;
171 interrupt-controller;171 interrupt-controller;
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml+1−0
@@ -73,6 +73,7 @@ properties: · 72 unmodified lines
73 - allwinner,sun20i-d1-plic73 - allwinner,sun20i-d1-plic
74 - sophgo,cv1800b-plic74 - sophgo,cv1800b-plic
75 - sophgo,cv1812h-plic75 - sophgo,cv1812h-plic
76 - sophgo,sg2000-plic
76 - sophgo,sg2002-plic77 - sophgo,sg2002-plic
77 - sophgo,sg2042-plic78 - sophgo,sg2042-plic
78 - sophgo,sg2044-plic79 - sophgo,sg2044-plic
Documentation/devicetree/bindings/interrupt-controller/starfive,jhb100-intc.yamlrenamed from Documentation/devicetree/bindings/interrupt-controller/starfive,jh8100-intc.yaml+4−16
@@ -1,13 +1,13 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.22%YAML 1.2
3---3---
4$id: http://devicetree.org/schemas/interrupt-controller/starfive,jh8100-intc.yaml#4$id: http://devicetree.org/schemas/interrupt-controller/starfive,jhb100-intc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: StarFive External Interrupt Controller7title: StarFive External Interrupt Controller
8 8
9description:9description:
10 StarFive SoC JH8100 contain a external interrupt controller. It can be used10 StarFive SoC JHB100 contain a external interrupt controller. It can be used
11 to handle high-level input interrupt signals. It also send the output11 to handle high-level input interrupt signals. It also send the output
12 interrupt signal to RISC-V PLIC.12 interrupt signal to RISC-V PLIC.
13 13
@@ -16,19 +16,11 @@ maintainers: · 2 unmodified lines
16 16
17properties:17properties:
18 compatible:18 compatible:
19 const: starfive,jh8100-intc19 const: starfive,jhb100-intc
20 20
21 reg:21 reg:
22 maxItems: 122 maxItems: 1
23 23
24 clocks:
25 description: APB clock for the interrupt controller
26 maxItems: 1
27
28 resets:
29 description: APB reset for the interrupt controller
30 maxItems: 1
31
32 interrupts:24 interrupts:
33 maxItems: 125 maxItems: 1
34 26
@@ -40,8 +32,6 @@ properties: · 5 unmodified lines
40required:32required:
41 - compatible33 - compatible
42 - reg34 - reg
43 - clocks
44 - resets
45 - interrupts35 - interrupts
46 - interrupt-controller36 - interrupt-controller
47 - "#interrupt-cells"37 - "#interrupt-cells"
@@ -51,10 +41,8 @@ additionalProperties: false · 3 unmodified lines
51examples:41examples:
52 - |42 - |
53 interrupt-controller@12260000 {43 interrupt-controller@12260000 {
54 compatible = "starfive,jh8100-intc";44 compatible = "starfive,jhb100-intc";
55 reg = <0x12260000 0x10000>;45 reg = <0x12260000 0x10000>;
56 clocks = <&syscrg_ne 76>;
57 resets = <&syscrg_ne 13>;
58 interrupts = <45>;46 interrupts = <45>;
59 interrupt-controller;47 interrupt-controller;
60 #interrupt-cells = <1>;48 #interrupt-cells = <1>;
Documentation/devicetree/bindings/interrupt-controller/ti,irq-crossbar.yaml+96−0
@@ -0,0 +1,96 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/ti,irq-crossbar.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments IRQ Crossbar
8
9maintainers:
10 - Sricharan R <r.sricharan@ti.com>
11
12description:
13 Some socs have a large number of interrupts requests to service the needs of
14 its many peripherals and subsystems. All of the interrupt lines from the
15 subsystems are not needed at the same time, so they have to be muxed to the
16 irq-controller appropriately. In such places a interrupt controllers are
17 preceded by an CROSSBAR that provides flexibility in muxing the device
18 requests to the controller inputs.
19
20properties:
21 compatible:
22 const: ti,irq-crossbar
23
24 reg:
25 maxItems: 1
26
27 interrupt-controller: true
28
29 '#interrupt-cells':
30 const: 3
31
32 ti,max-irqs:
33 $ref: /schemas/types.yaml#/definitions/uint32
34 description:
35 Total number of irqs available at the parent interrupt controller.
36 minimum: 1
37
38 ti,max-crossbar-sources:
39 $ref: /schemas/types.yaml#/definitions/uint32
40 description:
41 Maximum number of crossbar sources that can be routed.
42 minimum: 1
43
44 ti,reg-size:
45 $ref: /schemas/types.yaml#/definitions/uint32
46 description:
47 Size of a individual register in bytes. Every individual
48 register is assumed to be of same size.
49 enum: [1, 2, 4]
50
51 ti,irqs-reserved:
52 $ref: /schemas/types.yaml#/definitions/uint32-array
53 description:
54 List of the reserved irq lines that are not muxed using crossbar. These
55 interrupt lines are reserved in the soc, so crossbar bar driver should not
56 consider them as free lines.
57
58 ti,irqs-skip:
59 $ref: /schemas/types.yaml#/definitions/uint32-array
60 description:
61 Similar to "ti,irqs-reserved", but these are for SOC-specific hard-wiring
62 of those irqs which unexpectedly bypasses the crossbar. These irqs have a
63 crossbar register, but still cannot be used.
64
65 ti,irqs-safe-map:
66 $ref: /schemas/types.yaml#/definitions/uint32
67 description:
68 integer which maps to a safe configuration to use when the interrupt
69 controller irq is unused.
70 default: 0
71
72required:
73 - compatible
74 - reg
75 - interrupt-controller
76 - '#interrupt-cells'
77 - ti,max-irqs
78 - ti,max-crossbar-sources
79 - ti,reg-size
80 - ti,irqs-reserved
81
82additionalProperties: false
83
84examples:
85 - |
86 crossbar@4a002a48 {
87 compatible = "ti,irq-crossbar";
88 reg = <0x4a002a48 0x130>;
89 interrupt-controller;
90 #interrupt-cells = <3>;
91 ti,max-irqs = <160>;
92 ti,max-crossbar-sources = <400>;
93 ti,reg-size = <2>;
94 ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
95 ti,irqs-skip = <10 133 139 140>;
96 };
Documentation/devicetree/bindings/iommu/arm,smmu.yaml+43−1
@@ -37,8 +37,10 @@ properties: · 36 unmodified lines
37 - enum:37 - enum:
38 - qcom,eliza-smmu-50038 - qcom,eliza-smmu-500
39 - qcom,glymur-smmu-50039 - qcom,glymur-smmu-500
40 - qcom,hawi-smmu-500
40 - qcom,kaanapali-smmu-50041 - qcom,kaanapali-smmu-500
41 - qcom,milos-smmu-50042 - qcom,milos-smmu-500
43 - qcom,nord-smmu-500
42 - qcom,qcm2290-smmu-50044 - qcom,qcm2290-smmu-500
43 - qcom,qcs615-smmu-50045 - qcom,qcs615-smmu-500
44 - qcom,qcs8300-smmu-50046 - qcom,qcs8300-smmu-500
@@ -55,6 +57,7 @@ properties: · 10 unmodified lines
55 - qcom,sdx55-smmu-50057 - qcom,sdx55-smmu-500
56 - qcom,sdx65-smmu-50058 - qcom,sdx65-smmu-500
57 - qcom,sdx75-smmu-50059 - qcom,sdx75-smmu-500
60 - qcom,shikra-smmu-500
58 - qcom,sm6115-smmu-50061 - qcom,sm6115-smmu-500
59 - qcom,sm6125-smmu-50062 - qcom,sm6125-smmu-500
60 - qcom,sm6350-smmu-50063 - qcom,sm6350-smmu-500
@@ -566,7 +569,11 @@ allOf: · 505 unmodified lines
566 properties:569 properties:
567 compatible:570 compatible:
568 items:571 items:
569 - const: qcom,sm8750-smmu-500572 - enum:
573 - qcom,glymur-smmu-500
574 - qcom,hawi-smmu-500
575 - qcom,kaanapali-smmu-500
576 - qcom,sm8750-smmu-500
570 - const: qcom,adreno-smmu577 - const: qcom,adreno-smmu
571 - const: qcom,smmu-500578 - const: qcom,smmu-500
572 - const: arm,mmu-500579 - const: arm,mmu-500
@@ -595,6 +602,7 @@ allOf: · 22 unmodified lines
595 - qcom,sdm845-smmu-500602 - qcom,sdm845-smmu-500
596 - qcom,sdx55-smmu-500603 - qcom,sdx55-smmu-500
597 - qcom,sdx65-smmu-500604 - qcom,sdx65-smmu-500
605 - qcom,sdx75-smmu-500
598 - qcom,sm6350-smmu-500606 - qcom,sm6350-smmu-500
599 - qcom,sm6375-smmu-500607 - qcom,sm6375-smmu-500
600 then:608 then:
@@ -602,6 +610,40 @@ allOf: · 1 unmodified line
602 clock-names: false610 clock-names: false
603 clocks: false611 clocks: false
604 612
613 # Disallow clocks for all other platforms where specific compatible is used
614 # with different fallbacks and only one combination has no clocks
615 - if:
616 properties:
617 compatible:
618 items:
619 - enum:
620 - qcom,eliza-smmu-500
621 - qcom,glymur-smmu-500
622 - qcom,hawi-smmu-500
623 - qcom,kaanapali-smmu-500
624 - qcom,milos-smmu-500
625 - qcom,nord-smmu-500
626 - qcom,qcs615-smmu-500
627 - qcom,qcs8300-smmu-500
628 - qcom,sa8775p-smmu-500
629 - qcom,shikra-smmu-500
630 - qcom,sm6115-smmu-500
631 - qcom,sm6125-smmu-500
632 - qcom,sm8150-smmu-500
633 - qcom,sm8250-smmu-500
634 - qcom,sm8350-smmu-500
635 - qcom,sm8450-smmu-500
636 - qcom,sm8550-smmu-500
637 - qcom,sm8650-smmu-500
638 - qcom,sm8750-smmu-500
639 - qcom,x1e80100-smmu-500
640 - const: qcom,smmu-500
641 - const: arm,mmu-500
642 then:
643 properties:
644 clock-names: false
645 clocks: false
646
605 - if:647 - if:
606 properties:648 properties:
607 compatible:649 compatible:
Documentation/devicetree/bindings/iommu/riscv,iommu.yaml+51−8
@@ -32,22 +32,35 @@ properties: · 31 unmodified lines
32 # should be specified along with 'reg' property providing MMIO location.32 # should be specified along with 'reg' property providing MMIO location.
33 compatible:33 compatible:
34 oneOf:34 oneOf:
35 - items:35 - description: Platform (non-PCIe) IOMMU implementations
36 items:
36 - enum:37 - enum:
37 - qemu,riscv-iommu38 - qemu,riscv-iommu
39 - tenstorrent,riscv-iommu
38 - const: riscv,iommu40 - const: riscv,iommu
39 - items:41 - description: PCIe IOMMU implementations
42 items:
40 - enum:43 - enum:
41 - pci1efd,edf144 - pci1efd,edf1
42 - const: riscv,pci-iommu45 - const: riscv,pci-iommu
43 46
44 reg:47 reg:
45 maxItems: 148 minItems: 1
46 description:49 items:
47 For non-PCI devices this represents base address and size of for the50 - description:
48 IOMMU memory mapped registers interface.51 For non-PCI devices, base address and size of the IOMMU memory
49 For PCI IOMMU hardware implementation this should represent an address52 mapped registers interface. For PCI IOMMU hardware
50 of the IOMMU, as defined in the PCI Bus Binding reference.53 implementation, an address of the IOMMU, as defined in the PCI
54 Bus Binding reference.
55 - description:
56 Region containing platform specific MMRs for machine-mode
57 configuration, such as PMA and PMP registers.
58
59 reg-names:
60 minItems: 1
61 items:
62 - const: base
63 - const: machine
51 64
52 '#iommu-cells':65 '#iommu-cells':
53 const: 166 const: 1
@@ -75,6 +88,26 @@ required: · 21 unmodified lines
75 88
76additionalProperties: false89additionalProperties: false
77 90
91allOf:
92 - if:
93 properties:
94 compatible:
95 contains:
96 enum:
97 - tenstorrent,riscv-iommu
98 then:
99 properties:
100 reg:
101 minItems: 2
102 reg-names:
103 minItems: 2
104 else:
105 properties:
106 reg:
107 maxItems: 1
108 reg-names:
109 maxItems: 1
110
78examples:111examples:
79 - |+112 - |+
80 /* Example 1 (IOMMU device with wired interrupts) */113 /* Example 1 (IOMMU device with wired interrupts) */
@@ -145,3 +178,13 @@ examples: · 64 unmodified lines
145 };178 };
146 };179 };
147 };180 };
181
182 - |+
183 /* Example 5 (Tenstorrent IOMMU device with MSIs) */
184 iommu5: iommu@d2020000 {
185 compatible = "tenstorrent,riscv-iommu", "riscv,iommu";
186 reg = <0xd2020000 0x10000>, <0xaa000000 0x10000>;
187 reg-names = "base", "machine";
188 msi-parent = <&imsics_smode>;
189 #iommu-cells = <1>;
190 };
Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml+71−0
@@ -0,0 +1,71 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iommu/verisilicon,iommu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Verisilicon IOMMU
8
9maintainers:
10 - Benjamin Gaignard <benjamin.gaignard@collabora.com>
11
12description: |+
13 A Versilicon iommu translates io virtual addresses to physical addresses for
14 its associated video decoder.
15
16properties:
17 compatible:
18 items:
19 - const: rockchip,rk3588-av1-iommu
20 - const: verisilicon,iommu-1.2
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 clocks:
29 items:
30 - description: Core clock
31 - description: Interface clock
32
33 clock-names:
34 items:
35 - const: core
36 - const: iface
37
38 "#iommu-cells":
39 const: 0
40
41 power-domains:
42 maxItems: 1
43
44required:
45 - compatible
46 - reg
47 - interrupts
48 - clocks
49 - clock-names
50 - "#iommu-cells"
51
52additionalProperties: false
53
54examples:
55 - |
56 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
57 #include <dt-bindings/interrupt-controller/arm-gic.h>
58
59 bus {
60 #address-cells = <2>;
61 #size-cells = <2>;
62
63 iommu@fdca0000 {
64 compatible = "rockchip,rk3588-av1-iommu","verisilicon,iommu-1.2";
65 reg = <0x0 0xfdca0000 0x0 0x600>;
66 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
67 clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>;
68 clock-names = "core", "iface";
69 #iommu-cells = <0>;
70 };
71 };
Documentation/devicetree/bindings/leds/backlight/maxim,max25014.yaml+83−0
@@ -0,0 +1,83 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/leds/backlight/maxim,max25014.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Maxim max25014 backlight controller
8
9maintainers:
10 - Maud Spierings <maudspierings@gocontroll.com>
11
12properties:
13 compatible:
14 enum:
15 - maxim,max25014
16
17 reg:
18 maxItems: 1
19
20 default-brightness:
21 minimum: 0
22 maximum: 100
23 default: 50
24
25 enable-gpios:
26 maxItems: 1
27
28 interrupts:
29 maxItems: 1
30
31 power-supply:
32 description: Regulator which controls the boost converter input rail.
33
34 pwms:
35 maxItems: 1
36
37 maxim,iset:
38 $ref: /schemas/types.yaml#/definitions/uint32
39 maximum: 15
40 default: 11
41 description:
42 Value of the ISET field in the ISET register. This controls the current
43 scale of the outputs, a higher number means more current.
44
45 maxim,strings:
46 $ref: /schemas/types.yaml#/definitions/uint32-array
47 description:
48 A 4-bit bitfield that describes which led strings to turn on.
49 minItems: 4
50 maxItems: 4
51 items:
52 maximum: 1
53 default:
54 [1 1 1 1]
55
56required:
57 - compatible
58 - reg
59
60additionalProperties: false
61
62examples:
63 - |
64 #include <dt-bindings/gpio/gpio.h>
65 #include <dt-bindings/interrupt-controller/irq.h>
66
67 i2c {
68 #address-cells = <1>;
69 #size-cells = <0>;
70
71 backlight@6f {
72 compatible = "maxim,max25014";
73 reg = <0x6f>;
74 default-brightness = <50>;
75 enable-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
76 interrupt-parent = <&gpio1>;
77 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
78 power-supply = <&reg_backlight>;
79 pwms = <&pwm1>;
80 maxim,iset = <7>;
81 maxim,strings = <1 1 1 0>;
82 };
83 };
Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml+1−1
@@ -25,7 +25,7 @@ properties: · 24 unmodified lines
25 25
26 duty-cycle:26 duty-cycle:
27 $ref: /schemas/types.yaml#/definitions/uint827 $ref: /schemas/types.yaml#/definitions/uint8
28 enum: [50, 60, 70, 75, 80, 90]28 enum: [30, 50, 60, 70, 75, 80, 90]
29 description:29 description:
30 Percentage of one period in which the signal is active.30 Percentage of one period in which the signal is active.
31 31
Documentation/devicetree/bindings/leds/leds-lp55xx.yaml+1−1
@@ -183,7 +183,7 @@ examples: · 182 unmodified lines
183 compatible = "ti,lp8501";183 compatible = "ti,lp8501";
184 reg = <0x32>;184 reg = <0x32>;
185 clock-mode = /bits/ 8 <2>;185 clock-mode = /bits/ 8 <2>;
186 pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */186 pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
187 ti,charge-pump-mode = <LP55XX_CP_BYPASS>;187 ti,charge-pump-mode = <LP55XX_CP_BYPASS>;
188 188
189 led@0 {189 led@0 {
Documentation/devicetree/bindings/leds/samsung,s2mu005-flash.yaml+52−0
@@ -0,0 +1,52 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/leds/samsung,s2mu005-flash.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Flash and Torch LED Controller for Samsung S2M series PMICs
8
9maintainers:
10 - Kaustabh Chakraborty <kauschluss@disroot.org>
11
12description: |
13 The Samsung S2M series PMIC flash LED has two led channels (typically
14 as back and front camera flashes), with support for both torch and
15 flash modes.
16
17 This is a part of device tree bindings for S2M and S5M family of Power
18 Management IC (PMIC).
19
20 See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
21 additional information and example.
22
23properties:
24 compatible:
25 enum:
26 - samsung,s2mu005-flash
27
28 "#address-cells":
29 const: 1
30
31 "#size-cells":
32 const: 0
33
34patternProperties:
35 "^led@[0-1]$":
36 type: object
37 $ref: common.yaml#
38 unevaluatedProperties: false
39
40 properties:
41 reg:
42 enum: [0, 1]
43
44 required:
45 - reg
46
47required:
48 - compatible
49 - "#address-cells"
50 - "#size-cells"
51
52additionalProperties: false
Documentation/devicetree/bindings/leds/ti,lm3560.yaml+163−0
@@ -0,0 +1,163 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/leds/ti,lm3560.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TI LM3560 Synchronous Boost Flash Driver
8
9maintainers:
10 - Svyatoslav Ryhel <clamor95@gmail.com>
11
12description:
13 The LM3560 is a 2-MHz fixed frequency synchronous boost converter with two
14 1000-mA constant current drivers for high-current white LEDs. The dual high-
15 side current sources allow for grounded cathode LED operation and can be
16 tied together for providing flash currents at up to 2 A through a single LED.
17 An adaptive regulation method ensures the current for each LED remains in
18 regulation and maximizes efficiency.
19
20properties:
21 compatible:
22 enum:
23 - ti,lm3559
24 - ti,lm3560
25
26 reg:
27 maxItems: 1
28
29 '#address-cells':
30 const: 1
31
32 '#size-cells':
33 const: 0
34
35 enable-gpios:
36 description: GPIO connected to the HWEN pin.
37 maxItems: 1
38
39 vin-supply:
40 description: Supply connected to the IN line.
41
42 flash-max-timeout-us:
43 minimum: 32000
44 maximum: 1024000
45 default: 32000
46
47 ti,peak-current-microamp:
48 description:
49 The LM3560 features 4 selectable current limits 1.6A, 2.3A, 3A, and 3.6A
50 (in case of LM3559 - 1.4A, 2.1A, 2.7A, and 3.2A). When the current limit
51 is reached, the LM3559/LM3560 stops switching for the remainder of the
52 switching cycle.
53
54patternProperties:
55 '^led@[01]$':
56 type: object
57 $ref: /schemas/leds/common.yaml#
58 description: LED control bank nodes.
59 unevaluatedProperties: false
60
61 properties:
62 reg:
63 description: Control bank selection (0 = bank A, 1 = bank B).
64 maximum: 1
65
66 required:
67 - reg
68 - flash-max-microamp
69 - led-max-microamp
70
71allOf:
72 - $ref: /schemas/leds/common.yaml#
73 - if:
74 properties:
75 compatible:
76 contains:
77 const: ti,lm3559
78 then:
79 properties:
80 ti,peak-current-microamp:
81 enum: [1400000, 2100000, 2700000, 3200000]
82 default: 1400000
83 patternProperties:
84 '^led@[01]$':
85 properties:
86 flash-max-microamp:
87 minimum: 56250
88 maximum: 900000
89 led-max-microamp:
90 minimum: 28125
91 maximum: 225000
92
93 - if:
94 properties:
95 compatible:
96 contains:
97 const: ti,lm3560
98 then:
99 properties:
100 ti,peak-current-microamp:
101 enum: [1600000, 2300000, 3000000, 3600000]
102 default: 1600000
103 patternProperties:
104 '^led@[01]$':
105 properties:
106 flash-max-microamp:
107 minimum: 62500
108 maximum: 1000000
109 led-max-microamp:
110 minimum: 31250
111 maximum: 250000
112
113required:
114 - compatible
115 - reg
116 - '#address-cells'
117 - '#size-cells'
118
119additionalProperties: false
120
121examples:
122 - |
123 #include <dt-bindings/gpio/gpio.h>
124 #include <dt-bindings/leds/common.h>
125
126 i2c {
127 #address-cells = <1>;
128 #size-cells = <0>;
129
130 led-controller@53 {
131 compatible = "ti,lm3560";
132 reg = <0x53>;
133
134 enable-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
135 vin-supply = <&vdd_3v3_sys>;
136
137 flash-max-timeout-us = <1024000>;
138 ti,peak-current-microamp = <1600000>;
139
140 #address-cells = <1>;
141 #size-cells = <0>;
142
143 led@0 {
144 reg = <0>;
145
146 function = LED_FUNCTION_FLASH;
147 color = <LED_COLOR_ID_WHITE>;
148
149 flash-max-microamp = <562500>;
150 led-max-microamp = <156250>;
151 };
152
153 led@1 {
154 reg = <1>;
155
156 function = LED_FUNCTION_FLASH;
157 color = <LED_COLOR_ID_YELLOW>;
158
159 flash-max-microamp = <562500>;
160 led-max-microamp = <156250>;
161 };
162 };
163 };
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml+1−0
@@ -49,6 +49,7 @@ properties: · 48 unmodified lines
49 - qcom,qcs615-apss-shared49 - qcom,qcs615-apss-shared
50 - qcom,sc7180-apss-shared50 - qcom,sc7180-apss-shared
51 - qcom,sc8180x-apss-shared51 - qcom,sc8180x-apss-shared
52 - qcom,shikra-apss-shared
52 - qcom,sm7150-apss-shared53 - qcom,sm7150-apss-shared
53 - qcom,sm8150-apss-shared54 - qcom,sm8150-apss-shared
54 - const: qcom,sdm845-apss-shared55 - const: qcom,sdm845-apss-shared
Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml+2−0
@@ -19,7 +19,9 @@ properties: · 18 unmodified lines
19 - items:19 - items:
20 - enum:20 - enum:
21 - qcom,glymur-cpucp-mbox21 - qcom,glymur-cpucp-mbox
22 - qcom,hawi-cpucp-mbox
22 - qcom,kaanapali-cpucp-mbox23 - qcom,kaanapali-cpucp-mbox
24 - qcom,nord-cpucp-mbox
23 - qcom,sm8750-cpucp-mbox25 - qcom,sm8750-cpucp-mbox
24 - const: qcom,x1e80100-cpucp-mbox26 - const: qcom,x1e80100-cpucp-mbox
25 - enum:27 - enum:
Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml+2−0
@@ -26,7 +26,9 @@ properties: · 25 unmodified lines
26 - enum:26 - enum:
27 - qcom,eliza-ipcc27 - qcom,eliza-ipcc
28 - qcom,glymur-ipcc28 - qcom,glymur-ipcc
29 - qcom,hawi-ipcc
29 - qcom,kaanapali-ipcc30 - qcom,kaanapali-ipcc
31 - qcom,maili-ipcc
30 - qcom,milos-ipcc32 - qcom,milos-ipcc
31 - qcom,qcs8300-ipcc33 - qcom,qcs8300-ipcc
32 - qcom,qdu1000-ipcc34 - qcom,qdu1000-ipcc
Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml+10−0
@@ -63,6 +63,16 @@ properties: · 62 unmodified lines
63 CMA pool to use for buffers allocation instead of the default63 CMA pool to use for buffers allocation instead of the default
64 CMA pool.64 CMA pool.
65 65
66 # FIXME: This should be made required eventually once every SoC will
67 # have the MBUS declared.
68 interconnects:
69 maxItems: 1
70
71 # FIXME: This should be made required eventually once every SoC will
72 # have the MBUS declared.
73 interconnect-names:
74 const: dma-mem
75
66required:76required:
67 - compatible77 - compatible
68 - reg78 - reg
Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml+6−0
@@ -40,6 +40,12 @@ properties: · 39 unmodified lines
40 resets:40 resets:
41 maxItems: 141 maxItems: 1
42 42
43 interconnects:
44 maxItems: 1
45
46 interconnect-names:
47 const: dma-mem
48
43 port:49 port:
44 $ref: /schemas/graph.yaml#/$defs/port-base50 $ref: /schemas/graph.yaml#/$defs/port-base
45 description: Parallel input port, connect to a parallel sensor51 description: Parallel input port, connect to a parallel sensor
Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml+6−0
@@ -36,6 +36,12 @@ properties: · 35 unmodified lines
36 resets:36 resets:
37 maxItems: 137 maxItems: 1
38 38
39 interconnects:
40 maxItems: 1
41
42 interconnect-names:
43 const: dma-mem
44
39 ports:45 ports:
40 $ref: /schemas/graph.yaml#/properties/ports46 $ref: /schemas/graph.yaml#/properties/ports
41 47
Documentation/devicetree/bindings/media/cnm,wave521c.yaml+1−1
@@ -37,7 +37,7 @@ properties: · 36 unmodified lines
37 maxItems: 137 maxItems: 1
38 38
39 sram:39 sram:
40 $ref: /schemas/types.yaml#/definitions/phandle40 maxItems: 1
41 description:41 description:
42 The VPU uses the SRAM to store some of the reference data instead of42 The VPU uses the SRAM to store some of the reference data instead of
43 storing it on DMA memory. It is mainly used for the purpose of reducing43 storing it on DMA memory. It is mainly used for the purpose of reducing
Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml+4−1
@@ -15,6 +15,9 @@ description: |- · 14 unmodified lines
15 an I2C interface and outputs image data over a 8-bit parallel or 1-lane MIPI15 an I2C interface and outputs image data over a 8-bit parallel or 1-lane MIPI
16 CSI-2 connection.16 CSI-2 connection.
17 17
18allOf:
19 - $ref: /schemas/media/video-interface-devices.yaml#
20
18properties:21properties:
19 compatible:22 compatible:
20 enum:23 enum:
@@ -90,7 +93,7 @@ required: · 69 unmodified lines
90 - vaa-supply93 - vaa-supply
91 - port94 - port
92 95
93additionalProperties: false96unevaluatedProperties: false
94 97
95examples:98examples:
96 - |99 - |
Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml+1−1
@@ -160,7 +160,7 @@ examples: · 159 unmodified lines
160 160
161 vcodec_enc_vp8: vcodec@19002000 {161 vcodec_enc_vp8: vcodec@19002000 {
162 compatible = "mediatek,mt8173-vcodec-enc-vp8";162 compatible = "mediatek,mt8173-vcodec-enc-vp8";
163 reg = <0x19002000 0x1000>; /* VENC_LT_SYS */163 reg = <0x19002000 0x1000>; /* VENC_LT_SYS */
164 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;164 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>;
165 iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>,165 iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>,
166 <&iommu M4U_PORT_VENC_REC_FRM_SET2>,166 <&iommu M4U_PORT_VENC_REC_FRM_SET2>,
Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml+1−1
@@ -232,7 +232,7 @@ examples: · 231 unmodified lines
232 #address-cells = <2>;232 #address-cells = <2>;
233 #size-cells = <2>;233 #size-cells = <2>;
234 ranges = <0 0 0 0x16000000 0 0x40000>;234 ranges = <0 0 0 0x16000000 0 0x40000>;
235 reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */235 reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */
236 video-codec@10000 {236 video-codec@10000 {
237 compatible = "mediatek,mtk-vcodec-lat";237 compatible = "mediatek,mtk-vcodec-lat";
238 reg = <0 0x10000 0 0x800>;238 reg = <0 0x10000 0 0x800>;
Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml+3−3
@@ -56,10 +56,10 @@ properties: · 55 unmodified lines
56 maxItems: 5 # Wrapper and 4 slots56 maxItems: 5 # Wrapper and 4 slots
57 57
58 sram:58 sram:
59 $ref: /schemas/types.yaml#/definitions/phandle59 maxItems: 1
60 description:60 description:
61 Optional phandle to a reserved on-chip SRAM regions. The SRAM can61 The SRAM can be used for descriptor storage, which may improve bus
62 be used for descriptor storage, which may improve bus utilization.62 utilization.
63 63
64required:64required:
65 - compatible65 - compatible
Documentation/devicetree/bindings/media/qcom,msm8939-venus.yaml+79−0
@@ -0,0 +1,79 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,msm8939-venus.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8939 Venus video encode and decode accelerators
8
9maintainers:
10 - André Apitzsch <git@apitzsch.eu>
11 - Erikas Bitovtas <xerikasxx@gmail.com>
12
13description:
14 The Venus IP is a video encode and decode accelerator present
15 on Qualcomm platforms
16
17allOf:
18 - $ref: qcom,venus-common.yaml#
19
20properties:
21 compatible:
22 const: qcom,msm8939-venus
23
24 power-domains:
25 maxItems: 3
26
27 power-domain-names:
28 items:
29 - const: venus
30 - const: vcodec0
31 - const: vcodec1
32
33 clocks:
34 maxItems: 5
35
36 clock-names:
37 items:
38 - const: core
39 - const: iface
40 - const: bus
41 - const: vcodec0_core
42 - const: vcodec1_core
43
44 iommus:
45 maxItems: 1
46
47required:
48 - compatible
49 - iommus
50 - power-domain-names
51
52unevaluatedProperties: false
53
54examples:
55 - |
56 #include <dt-bindings/interrupt-controller/arm-gic.h>
57 #include <dt-bindings/clock/qcom,gcc-msm8939.h>
58
59 video-codec@1d00000 {
60 compatible = "qcom,msm8939-venus";
61 reg = <0x01d00000 0xff000>;
62 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
63 clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
64 <&gcc GCC_VENUS0_AHB_CLK>,
65 <&gcc GCC_VENUS0_AXI_CLK>,
66 <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>,
67 <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>;
68 clock-names = "core",
69 "iface",
70 "bus",
71 "vcodec0_core",
72 "vcodec1_core";
73 power-domains = <&gcc VENUS_GDSC>,
74 <&gcc VENUS_CORE0_GDSC>,
75 <&gcc VENUS_CORE1_GDSC>;
76 power-domain-names = "venus", "vcodec0", "vcodec1";
77 iommus = <&apps_iommu 5>;
78 memory-region = <&venus_mem>;
79 };
Documentation/devicetree/bindings/media/qcom,qcm2290-venus.yaml+5−1
@@ -18,7 +18,11 @@ allOf: · 17 unmodified lines
18 18
19properties:19properties:
20 compatible:20 compatible:
21 const: qcom,qcm2290-venus21 oneOf:
22 - items:
23 - const: qcom,sm6115-venus
24 - const: qcom,qcm2290-venus
25 - const: qcom,qcm2290-venus
22 26
23 power-domains:27 power-domains:
24 maxItems: 328 maxItems: 3
Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml+15−0
@@ -91,6 +91,21 @@ properties: · 90 unmodified lines
91 deprecated: true91 deprecated: true
92 additionalProperties: false92 additionalProperties: false
93 93
94 video-firmware:
95 type: object
96 additionalProperties: false
97
98 description: |
99 Firmware subnode is needed when the platform does not
100 have TrustZone.
101
102 properties:
103 iommus:
104 maxItems: 1
105
106 required:
107 - iommus
108
94required:109required:
95 - compatible110 - compatible
96 - power-domain-names111 - power-domain-names
Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml+2−8
@@ -43,8 +43,7 @@ properties: · 42 unmodified lines
43 - const: vcodec_bus43 - const: vcodec_bus
44 44
45 iommus:45 iommus:
46 minItems: 146 maxItems: 1
47 maxItems: 2
48 47
49 interconnects:48 interconnects:
50 maxItems: 249 maxItems: 2
@@ -120,12 +119,7 @@ examples: · 69 unmodified lines
120 <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;119 <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
121 interconnect-names = "cpu-cfg", "video-mem";120 interconnect-names = "cpu-cfg", "video-mem";
122 121
123 iommus = <&apps_smmu 0x2180 0x20>,122 iommus = <&apps_smmu 0x2180 0x20>;
124 <&apps_smmu 0x2184 0x20>;
125 123
126 memory-region = <&video_mem>;124 memory-region = <&video_mem>;
127
128 video-firmware {
129 iommus = <&apps_smmu 0x21a2 0x0>;
130 };
131 };125 };
Documentation/devicetree/bindings/media/qcom,sm6350-camss.yaml+471−0
@@ -0,0 +1,471 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,sm6350-camss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM6350 Camera Subsystem (CAMSS)
8
9maintainers:
10 - Luca Weiss <luca.weiss@fairphone.com>
11
12description:
13 The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
14
15properties:
16 compatible:
17 const: qcom,sm6350-camss
18
19 reg:
20 maxItems: 24
21
22 reg-names:
23 items:
24 - const: csid0
25 - const: csid1
26 - const: csid2
27 - const: csid_lite
28 - const: csiphy0
29 - const: csiphy1
30 - const: csiphy2
31 - const: csiphy3
32 - const: vfe0
33 - const: vfe1
34 - const: vfe2
35 - const: vfe_lite
36 - const: a5_csr
37 - const: a5_qgic
38 - const: a5_sierra
39 - const: bps
40 - const: camnoc
41 - const: core_top_csr_tcsr
42 - const: cpas_cdm
43 - const: cpas_top
44 - const: ipe
45 - const: jpeg_dma
46 - const: jpeg_enc
47 - const: lrme
48
49 clocks:
50 maxItems: 39
51
52 clock-names:
53 items:
54 - const: cam_axi
55 - const: soc_ahb
56 - const: camnoc_axi
57 - const: core_ahb
58 - const: cpas_ahb
59 - const: csiphy0
60 - const: csiphy0_timer
61 - const: csiphy1
62 - const: csiphy1_timer
63 - const: csiphy2
64 - const: csiphy2_timer
65 - const: csiphy3
66 - const: csiphy3_timer
67 - const: vfe0_axi
68 - const: vfe0
69 - const: vfe0_cphy_rx
70 - const: vfe0_csid
71 - const: vfe1_axi
72 - const: vfe1
73 - const: vfe1_cphy_rx
74 - const: vfe1_csid
75 - const: vfe2_axi
76 - const: vfe2
77 - const: vfe2_cphy_rx
78 - const: vfe2_csid
79 - const: vfe_lite
80 - const: vfe_lite_cphy_rx
81 - const: vfe_lite_csid
82 - const: bps
83 - const: bps_ahb
84 - const: bps_areg
85 - const: bps_axi
86 - const: icp
87 - const: ipe0
88 - const: ipe0_ahb
89 - const: ipe0_areg
90 - const: ipe0_axi
91 - const: jpeg
92 - const: lrme
93
94 interrupts:
95 maxItems: 18
96
97 interrupt-names:
98 items:
99 - const: csid0
100 - const: csid1
101 - const: csid2
102 - const: csid_lite
103 - const: csiphy0
104 - const: csiphy1
105 - const: csiphy2
106 - const: csiphy3
107 - const: vfe0
108 - const: vfe1
109 - const: vfe2
110 - const: vfe_lite
111 - const: a5
112 - const: cpas
113 - const: cpas_cdm
114 - const: jpeg_dma
115 - const: jpeg_enc
116 - const: lrme
117
118 interconnects:
119 maxItems: 4
120
121 interconnect-names:
122 items:
123 - const: ahb
124 - const: hf_mnoc
125 - const: sf_mnoc
126 - const: sf_icp_mnoc
127
128 iommus:
129 maxItems: 14
130
131 power-domains:
132 maxItems: 6
133
134 power-domain-names:
135 items:
136 - const: ife0
137 - const: ife1
138 - const: ife2
139 - const: top
140 - const: bps
141 - const: ipe
142
143 vdd-csiphy0-0p9-supply:
144 description:
145 Phandle to a 0.9V regulator supply to CSIPHY0.
146
147 vdd-csiphy0-1p25-supply:
148 description:
149 Phandle to a 1.25V regulator supply to CSIPHY0.
150
151 vdd-csiphy1-0p9-supply:
152 description:
153 Phandle to a 0.9V regulator supply to CSIPHY1.
154
155 vdd-csiphy1-1p25-supply:
156 description:
157 Phandle to a 1.25V regulator supply to CSIPHY1.
158
159 vdd-csiphy2-0p9-supply:
160 description:
161 Phandle to a 0.9V regulator supply to CSIPHY2.
162
163 vdd-csiphy2-1p25-supply:
164 description:
165 Phandle to a 1.25V regulator supply to CSIPHY2.
166
167 vdd-csiphy3-0p9-supply:
168 description:
169 Phandle to a 0.9V regulator supply to CSIPHY3.
170
171 vdd-csiphy3-1p25-supply:
172 description:
173 Phandle to a 1.25V regulator supply to CSIPHY3.
174
175 ports:
176 $ref: /schemas/graph.yaml#/properties/ports
177
178 description:
179 CSI input ports.
180
181 patternProperties:
182 "^port@[0-3]$":
183 $ref: /schemas/graph.yaml#/$defs/port-base
184 unevaluatedProperties: false
185
186 description:
187 Input port for receiving CSI data from a CSIPHY.
188
189 properties:
190 endpoint:
191 $ref: video-interfaces.yaml#
192 unevaluatedProperties: false
193
194 properties:
195 data-lanes:
196 minItems: 1
197 maxItems: 4
198
199 bus-type:
200 enum:
201 - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
202 - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
203
204 required:
205 - data-lanes
206
207required:
208 - compatible
209 - reg
210 - reg-names
211 - clocks
212 - clock-names
213 - interrupts
214 - interrupt-names
215 - interconnects
216 - interconnect-names
217 - iommus
218 - power-domains
219 - power-domain-names
220 - ports
221
222additionalProperties: false
223
224examples:
225 - |
226 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
227 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
228 #include <dt-bindings/interconnect/qcom,icc.h>
229 #include <dt-bindings/interconnect/qcom,sm6350.h>
230 #include <dt-bindings/interrupt-controller/arm-gic.h>
231 #include <dt-bindings/media/video-interfaces.h>
232 #include <dt-bindings/power/qcom-rpmpd.h>
233
234 soc {
235 #address-cells = <2>;
236 #size-cells = <2>;
237
238 isp@acb3000 {
239 compatible = "qcom,sm6350-camss";
240
241 reg = <0x0 0x0acb3000 0x0 0x1000>,
242 <0x0 0x0acba000 0x0 0x1000>,
243 <0x0 0x0acc1000 0x0 0x1000>,
244 <0x0 0x0acc8000 0x0 0x1000>,
245 <0x0 0x0ac65000 0x0 0x1000>,
246 <0x0 0x0ac66000 0x0 0x1000>,
247 <0x0 0x0ac67000 0x0 0x1000>,
248 <0x0 0x0ac68000 0x0 0x1000>,
249 <0x0 0x0acaf000 0x0 0x4000>,
250 <0x0 0x0acb6000 0x0 0x4000>,
251 <0x0 0x0acbd000 0x0 0x4000>,
252 <0x0 0x0acc4000 0x0 0x4000>,
253 <0x0 0x0ac18000 0x0 0x3000>,
254 <0x0 0x0ac00000 0x0 0x6000>,
255 <0x0 0x0ac10000 0x0 0x8000>,
256 <0x0 0x0ac6f000 0x0 0x8000>,
257 <0x0 0x0ac42000 0x0 0x4600>,
258 <0x0 0x01fc0000 0x0 0x40000>,
259 <0x0 0x0ac48000 0x0 0x1000>,
260 <0x0 0x0ac40000 0x0 0x1000>,
261 <0x0 0x0ac87000 0x0 0xa000>,
262 <0x0 0x0ac52000 0x0 0x4000>,
263 <0x0 0x0ac4e000 0x0 0x4000>,
264 <0x0 0x0ac6b000 0x0 0xa00>;
265 reg-names = "csid0",
266 "csid1",
267 "csid2",
268 "csid_lite",
269 "csiphy0",
270 "csiphy1",
271 "csiphy2",
272 "csiphy3",
273 "vfe0",
274 "vfe1",
275 "vfe2",
276 "vfe_lite",
277 "a5_csr",
278 "a5_qgic",
279 "a5_sierra",
280 "bps",
281 "camnoc",
282 "core_top_csr_tcsr",
283 "cpas_cdm",
284 "cpas_top",
285 "ipe",
286 "jpeg_dma",
287 "jpeg_enc",
288 "lrme";
289
290 clocks = <&gcc GCC_CAMERA_AXI_CLK>,
291 <&camcc CAMCC_SOC_AHB_CLK>,
292 <&camcc CAMCC_CAMNOC_AXI_CLK>,
293 <&camcc CAMCC_CORE_AHB_CLK>,
294 <&camcc CAMCC_CPAS_AHB_CLK>,
295 <&camcc CAMCC_CSIPHY0_CLK>,
296 <&camcc CAMCC_CSI0PHYTIMER_CLK>,
297 <&camcc CAMCC_CSIPHY1_CLK>,
298 <&camcc CAMCC_CSI1PHYTIMER_CLK>,
299 <&camcc CAMCC_CSIPHY2_CLK>,
300 <&camcc CAMCC_CSI2PHYTIMER_CLK>,
301 <&camcc CAMCC_CSIPHY3_CLK>,
302 <&camcc CAMCC_CSI3PHYTIMER_CLK>,
303 <&camcc CAMCC_IFE_0_AXI_CLK>,
304 <&camcc CAMCC_IFE_0_CLK>,
305 <&camcc CAMCC_IFE_0_CPHY_RX_CLK>,
306 <&camcc CAMCC_IFE_0_CSID_CLK>,
307 <&camcc CAMCC_IFE_1_AXI_CLK>,
308 <&camcc CAMCC_IFE_1_CLK>,
309 <&camcc CAMCC_IFE_1_CPHY_RX_CLK>,
310 <&camcc CAMCC_IFE_1_CSID_CLK>,
311 <&camcc CAMCC_IFE_2_AXI_CLK>,
312 <&camcc CAMCC_IFE_2_CLK>,
313 <&camcc CAMCC_IFE_2_CPHY_RX_CLK>,
314 <&camcc CAMCC_IFE_2_CSID_CLK>,
315 <&camcc CAMCC_IFE_LITE_CLK>,
316 <&camcc CAMCC_IFE_LITE_CPHY_RX_CLK>,
317 <&camcc CAMCC_IFE_LITE_CSID_CLK>,
318 <&camcc CAMCC_BPS_CLK>,
319 <&camcc CAMCC_BPS_AHB_CLK>,
320 <&camcc CAMCC_BPS_AREG_CLK>,
321 <&camcc CAMCC_BPS_AXI_CLK>,
322 <&camcc CAMCC_ICP_CLK>,
323 <&camcc CAMCC_IPE_0_CLK>,
324 <&camcc CAMCC_IPE_0_AHB_CLK>,
325 <&camcc CAMCC_IPE_0_AREG_CLK>,
326 <&camcc CAMCC_IPE_0_AXI_CLK>,
327 <&camcc CAMCC_JPEG_CLK>,
328 <&camcc CAMCC_LRME_CLK>;
329 clock-names = "cam_axi",
330 "soc_ahb",
331 "camnoc_axi",
332 "core_ahb",
333 "cpas_ahb",
334 "csiphy0",
335 "csiphy0_timer",
336 "csiphy1",
337 "csiphy1_timer",
338 "csiphy2",
339 "csiphy2_timer",
340 "csiphy3",
341 "csiphy3_timer",
342 "vfe0_axi",
343 "vfe0",
344 "vfe0_cphy_rx",
345 "vfe0_csid",
346 "vfe1_axi",
347 "vfe1",
348 "vfe1_cphy_rx",
349 "vfe1_csid",
350 "vfe2_axi",
351 "vfe2",
352 "vfe2_cphy_rx",
353 "vfe2_csid",
354 "vfe_lite",
355 "vfe_lite_cphy_rx",
356 "vfe_lite_csid",
357 "bps",
358 "bps_ahb",
359 "bps_areg",
360 "bps_axi",
361 "icp",
362 "ipe0",
363 "ipe0_ahb",
364 "ipe0_areg",
365 "ipe0_axi",
366 "jpeg",
367 "lrme";
368
369 interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
370 <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
371 <GIC_SPI 717 IRQ_TYPE_EDGE_RISING>,
372 <GIC_SPI 473 IRQ_TYPE_EDGE_RISING>,
373 <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
374 <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
375 <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
376 <GIC_SPI 461 IRQ_TYPE_EDGE_RISING>,
377 <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
378 <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
379 <GIC_SPI 718 IRQ_TYPE_EDGE_RISING>,
380 <GIC_SPI 472 IRQ_TYPE_EDGE_RISING>,
381 <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>,
382 <GIC_SPI 459 IRQ_TYPE_EDGE_RISING>,
383 <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
384 <GIC_SPI 475 IRQ_TYPE_EDGE_RISING>,
385 <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>,
386 <GIC_SPI 476 IRQ_TYPE_EDGE_RISING>;
387 interrupt-names = "csid0",
388 "csid1",
389 "csid2",
390 "csid_lite",
391 "csiphy0",
392 "csiphy1",
393 "csiphy2",
394 "csiphy3",
395 "vfe0",
396 "vfe1",
397 "vfe2",
398 "vfe_lite",
399 "a5",
400 "cpas",
401 "cpas_cdm",
402 "jpeg_dma",
403 "jpeg_enc",
404 "lrme";
405
406 interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
407 &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
408 <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
409 &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
410 <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS
411 &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
412 <&mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS
413 &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>;
414 interconnect-names = "ahb",
415 "hf_mnoc",
416 "sf_mnoc",
417 "sf_icp_mnoc";
418
419 iommus = <&apps_smmu 0x820 0xc0>,
420 <&apps_smmu 0x840 0x0>,
421 <&apps_smmu 0x860 0xc0>,
422 <&apps_smmu 0x880 0x0>,
423 <&apps_smmu 0xc40 0x20>,
424 <&apps_smmu 0xc60 0x20>,
425 <&apps_smmu 0xc80 0x0>,
426 <&apps_smmu 0xca2 0x0>,
427 <&apps_smmu 0xcc0 0x20>,
428 <&apps_smmu 0xce0 0x20>,
429 <&apps_smmu 0xd00 0x20>,
430 <&apps_smmu 0xd20 0x20>,
431 <&apps_smmu 0xd40 0x20>,
432 <&apps_smmu 0xd60 0x20>;
433
434 power-domains = <&camcc IFE_0_GDSC>,
435 <&camcc IFE_1_GDSC>,
436 <&camcc IFE_2_GDSC>,
437 <&camcc TITAN_TOP_GDSC>,
438 <&camcc BPS_GDSC>,
439 <&camcc IPE_0_GDSC>;
440 power-domain-names = "ife0",
441 "ife1",
442 "ife2",
443 "top",
444 "bps",
445 "ipe";
446
447 vdd-csiphy0-0p9-supply = <&vreg_l18a>;
448 vdd-csiphy0-1p25-supply = <&vreg_l22a>;
449 vdd-csiphy1-0p9-supply = <&vreg_l18a>;
450 vdd-csiphy1-1p25-supply = <&vreg_l22a>;
451 vdd-csiphy2-0p9-supply = <&vreg_l18a>;
452 vdd-csiphy2-1p25-supply = <&vreg_l22a>;
453 vdd-csiphy3-0p9-supply = <&vreg_l18a>;
454 vdd-csiphy3-1p25-supply = <&vreg_l22a>;
455
456 ports {
457 #address-cells = <1>;
458 #size-cells = <0>;
459
460 port@0 {
461 reg = <0>;
462
463 csiphy0_ep: endpoint {
464 data-lanes = <0 1 2 3>;
465 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
466 remote-endpoint = <&sensor_ep>;
467 };
468 };
469 };
470 };
471 };
Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml+17−6
@@ -10,19 +10,25 @@ maintainers: · 9 unmodified lines
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
11 11
12description: |12description: |
13 The Venus IP is a video encode and decode accelerator present13 The Iris v2.xx IP is a video encode and decode accelerator present on
14 on Qualcomm platforms14 Qualcomm platforms
15 15
16allOf:16allOf:
17 - $ref: qcom,venus-common.yaml#17 - $ref: qcom,venus-common.yaml#
18 18
19properties:19properties:
20 compatible:20 compatible:
21 const: qcom,sm8250-venus21 oneOf:
22 - const: qcom,sm8250-venus
23 - items:
24 - enum:
25 - qcom,sc8280xp-iris
26 - qcom,sm8350-iris
27 - const: qcom,sm8250-venus
22 28
23 power-domains:29 power-domains:
24 minItems: 230 minItems: 2
25 maxItems: 331 maxItems: 4
26 32
27 power-domain-names:33 power-domain-names:
28 minItems: 234 minItems: 2
@@ -30,6 +36,7 @@ properties: · 1 unmodified line
30 - const: venus36 - const: venus
31 - const: vcodec037 - const: vcodec0
32 - const: mx38 - const: mx
39 - const: mmcx
33 40
34 clocks:41 clocks:
35 maxItems: 342 maxItems: 3
@@ -114,8 +121,12 @@ examples: · 78 unmodified lines
114 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;121 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
115 power-domains = <&videocc MVS0C_GDSC>,122 power-domains = <&videocc MVS0C_GDSC>,
116 <&videocc MVS0_GDSC>,123 <&videocc MVS0_GDSC>,
117 <&rpmhpd RPMHPD_MX>;124 <&rpmhpd RPMHPD_MX>,
118 power-domain-names = "venus", "vcodec0", "mx";125 <&rpmhpd RPMHPD_MMCX>;
126 power-domain-names = "venus",
127 "vcodec0",
128 "mx",
129 "mmcx";
119 130
120 clocks = <&gcc GCC_VIDEO_AXI0_CLK>,131 clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
121 <&videocc VIDEO_CC_MVS0C_CLK>,132 <&videocc VIDEO_CC_MVS0C_CLK>,
Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml+22−1
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - qcom,qcs8300-iris26 - qcom,qcs8300-iris
27 - qcom,sm8550-iris27 - qcom,sm8550-iris
28 - qcom,sm8650-iris28 - qcom,sm8650-iris
29 - qcom,x1p42100-iris
29 30
30 reg:31 reg:
31 maxItems: 132 maxItems: 1
@@ -41,13 +42,16 @@ properties: · 9 unmodified lines
41 - const: mmcx42 - const: mmcx
42 43
43 clocks:44 clocks:
44 maxItems: 345 minItems: 3
46 maxItems: 4
45 47
46 clock-names:48 clock-names:
49 minItems: 3
47 items:50 items:
48 - const: iface51 - const: iface
49 - const: core52 - const: core
50 - const: vcodec0_core53 - const: vcodec0_core
54 - const: vcodec0_bse
51 55
52 firmware-name:56 firmware-name:
53 maxItems: 157 maxItems: 1
@@ -115,6 +119,23 @@ allOf: · 61 unmodified lines
115 maxItems: 1119 maxItems: 1
116 reset-names:120 reset-names:
117 maxItems: 1121 maxItems: 1
122 - if:
123 properties:
124 compatible:
125 enum:
126 - qcom,x1p42100-iris
127 then:
128 properties:
129 clocks:
130 minItems: 4
131 clock-names:
132 minItems: 4
133 else:
134 properties:
135 clocks:
136 maxItems: 3
137 clock-names:
138 maxItems: 3
118 139
119unevaluatedProperties: false140unevaluatedProperties: false
120 141
Documentation/devicetree/bindings/media/qcom,venus-common.yaml+0−15
@@ -47,21 +47,6 @@ properties: · 46 unmodified lines
47 minItems: 147 minItems: 1
48 maxItems: 448 maxItems: 4
49 49
50 video-firmware:
51 type: object
52 additionalProperties: false
53
54 description: |
55 Firmware subnode is needed when the platform does not
56 have TrustZone.
57
58 properties:
59 iommus:
60 maxItems: 1
61
62 required:
63 - iommus
64
65required:50required:
66 - reg51 - reg
67 - clocks52 - clocks
Documentation/devicetree/bindings/media/renesas,fcp.yaml+4−0
@@ -30,6 +30,8 @@ properties: · 29 unmodified lines
30 - renesas,r9a07g043u-fcpvd # RZ/G2UL30 - renesas,r9a07g043u-fcpvd # RZ/G2UL
31 - renesas,r9a07g044-fcpvd # RZ/G2{L,LC}31 - renesas,r9a07g044-fcpvd # RZ/G2{L,LC}
32 - renesas,r9a07g054-fcpvd # RZ/V2L32 - renesas,r9a07g054-fcpvd # RZ/V2L
33 - renesas,r9a08g046-fcpvd # RZ/G3L
34 - renesas,r9a09g047-fcpvd # RZ/G3E
33 - renesas,r9a09g056-fcpvd # RZ/V2N35 - renesas,r9a09g056-fcpvd # RZ/V2N
34 - renesas,r9a09g057-fcpvd # RZ/V2H(P)36 - renesas,r9a09g057-fcpvd # RZ/V2H(P)
35 - const: renesas,fcpv # Generic FCP for VSP fallback37 - const: renesas,fcpv # Generic FCP for VSP fallback
@@ -77,6 +79,8 @@ allOf: · 41 unmodified lines
77 - renesas,r9a07g043u-fcpvd79 - renesas,r9a07g043u-fcpvd
78 - renesas,r9a07g044-fcpvd80 - renesas,r9a07g044-fcpvd
79 - renesas,r9a07g054-fcpvd81 - renesas,r9a07g054-fcpvd
82 - renesas,r9a08g046-fcpvd
83 - renesas,r9a09g047-fcpvd
80 - renesas,r9a09g056-fcpvd84 - renesas,r9a09g056-fcpvd
81 - renesas,r9a09g057-fcpvd85 - renesas,r9a09g057-fcpvd
82 then:86 then:
Documentation/devicetree/bindings/media/renesas,vsp1.yaml+2−0
@@ -25,6 +25,8 @@ properties: · 24 unmodified lines
25 - enum:25 - enum:
26 - renesas,r9a07g043u-vsp2 # RZ/G2UL26 - renesas,r9a07g043u-vsp2 # RZ/G2UL
27 - renesas,r9a07g054-vsp2 # RZ/V2L27 - renesas,r9a07g054-vsp2 # RZ/V2L
28 - renesas,r9a08g046-vsp2 # RZ/G3L
29 - renesas,r9a09g047-vsp2 # RZ/G3E
28 - renesas,r9a09g056-vsp2 # RZ/V2N30 - renesas,r9a09g056-vsp2 # RZ/V2N
29 - renesas,r9a09g057-vsp2 # RZ/V2H(P)31 - renesas,r9a09g057-vsp2 # RZ/V2H(P)
30 - const: renesas,r9a07g044-vsp2 # RZ/G2L fallback32 - const: renesas,r9a07g044-vsp2 # RZ/G2L fallback
Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml+24−3
@@ -16,9 +16,15 @@ description: · 15 unmodified lines
16 16
17properties:17properties:
18 compatible:18 compatible:
19 enum:19 oneOf:
20 - fsl,imx93-mipi-csi220 - enum:
21 - rockchip,rk3568-mipi-csi221 - fsl,imx93-mipi-csi2
22 - fsl,imx95-mipi-csi2
23 - rockchip,rk3568-mipi-csi2
24 - items:
25 - enum:
26 - rockchip,rk3588-mipi-csi2
27 - const: rockchip,rk3568-mipi-csi2
22 28
23 reg:29 reg:
24 maxItems: 130 maxItems: 1
@@ -135,6 +141,21 @@ allOf: · 110 unmodified lines
135 clock-names:141 clock-names:
136 minItems: 2142 minItems: 2
137 143
144 - if:
145 properties:
146 compatible:
147 contains:
148 const: fsl,imx95-mipi-csi2
149 then:
150 properties:
151 interrupts:
152 maxItems: 1
153 interrupt-names: false
154 clocks:
155 maxItems: 1
156 clock-names:
157 maxItems: 1
158
138examples:159examples:
139 - |160 - |
140 #include <dt-bindings/clock/rk3568-cru.h>161 #include <dt-bindings/clock/rk3568-cru.h>
Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml+154−19
@@ -15,9 +15,15 @@ description: · 14 unmodified lines
15 the data from camera sensors, video decoders, or other companion ICs and15 the data from camera sensors, video decoders, or other companion ICs and
16 transfers it into system main memory by AXI bus.16 transfers it into system main memory by AXI bus.
17 17
18 The Rockchip RK3588 Video Capture (VICAP) is similar to its RK3568
19 counterpart, but features six MIPI CSI-2 ports and additional connections
20 to the image signal processor (ISP) blocks.
21
18properties:22properties:
19 compatible:23 compatible:
20 const: rockchip,rk3568-vicap24 enum:
25 - rockchip,rk3568-vicap
26 - rockchip,rk3588-vicap
21 27
22 reg:28 reg:
23 maxItems: 129 maxItems: 1
@@ -26,11 +32,8 @@ properties: · 2 unmodified lines
26 maxItems: 132 maxItems: 1
27 33
28 clocks:34 clocks:
29 items:35 minItems: 4
30 - description: ACLK36 maxItems: 5
31 - description: HCLK
32 - description: DCLK
33 - description: ICLK
34 37
35 clock-names:38 clock-names:
36 items:39 items:
@@ -38,25 +41,19 @@ properties: · 1 unmodified line
38 - const: hclk41 - const: hclk
39 - const: dclk42 - const: dclk
40 - const: iclk43 - const: iclk
44 - const: iclk1
45 minItems: 4
41 46
42 iommus:47 iommus:
43 maxItems: 148 maxItems: 1
44 49
45 resets:50 resets:
46 items:51 minItems: 5
47 - description: ARST52 maxItems: 9
48 - description: HRST
49 - description: DRST
50 - description: PRST
51 - description: IRST
52 53
53 reset-names:54 reset-names:
54 items:55 minItems: 5
55 - const: arst56 maxItems: 9
56 - const: hrst
57 - const: drst
58 - const: prst
59 - const: irst
60 57
61 rockchip,grf:58 rockchip,grf:
62 $ref: /schemas/types.yaml#/definitions/phandle59 $ref: /schemas/types.yaml#/definitions/phandle
@@ -67,8 +64,15 @@ properties: · 4 unmodified lines
67 64
68 ports:65 ports:
69 $ref: /schemas/graph.yaml#/properties/ports66 $ref: /schemas/graph.yaml#/properties/ports
67 additionalProperties: false
70 68
71 properties:69 properties:
70 "#address-cells":
71 const: 1
72
73 "#size-cells":
74 const: 0
75
72 port@0:76 port@0:
73 $ref: /schemas/graph.yaml#/$defs/port-base77 $ref: /schemas/graph.yaml#/$defs/port-base
74 unevaluatedProperties: false78 unevaluatedProperties: false
@@ -100,13 +104,75 @@ properties: · 25 unmodified lines
100 104
101 port@1:105 port@1:
102 $ref: /schemas/graph.yaml#/properties/port106 $ref: /schemas/graph.yaml#/properties/port
103 description: Port connected to the MIPI CSI-2 receiver output.107 description: Port connected to the MIPI CSI-2 receiver 0 output.
108
109 properties:
110 endpoint:
111 $ref: video-interfaces.yaml#
112 unevaluatedProperties: false
113
114 port@2:
115 $ref: /schemas/graph.yaml#/properties/port
116 description: Port connected to the MIPI CSI-2 receiver 1 output.
104 117
105 properties:118 properties:
106 endpoint:119 endpoint:
107 $ref: video-interfaces.yaml#120 $ref: video-interfaces.yaml#
108 unevaluatedProperties: false121 unevaluatedProperties: false
109 122
123 port@3:
124 $ref: /schemas/graph.yaml#/properties/port
125 description: Port connected to the MIPI CSI-2 receiver 2 output.
126
127 properties:
128 endpoint:
129 $ref: video-interfaces.yaml#
130 unevaluatedProperties: false
131
132 port@4:
133 $ref: /schemas/graph.yaml#/properties/port
134 description: Port connected to the MIPI CSI-2 receiver 3 output.
135
136 properties:
137 endpoint:
138 $ref: video-interfaces.yaml#
139 unevaluatedProperties: false
140
141 port@5:
142 $ref: /schemas/graph.yaml#/properties/port
143 description: Port connected to the MIPI CSI-2 receiver 4 output.
144
145 properties:
146 endpoint:
147 $ref: video-interfaces.yaml#
148 unevaluatedProperties: false
149
150 port@6:
151 $ref: /schemas/graph.yaml#/properties/port
152 description: Port connected to the MIPI CSI-2 receiver 5 output.
153
154 properties:
155 endpoint:
156 $ref: video-interfaces.yaml#
157 unevaluatedProperties: false
158
159 port@10:
160 $ref: /schemas/graph.yaml#/properties/port
161 description: Port connected to the ISP0 input.
162
163 properties:
164 endpoint:
165 $ref: video-interfaces.yaml#
166 unevaluatedProperties: false
167
168 port@11:
169 $ref: /schemas/graph.yaml#/properties/port
170 description: Port connected to the ISP1 input.
171
172 properties:
173 endpoint:
174 $ref: video-interfaces.yaml#
175 unevaluatedProperties: false
110required:176required:
111 - compatible177 - compatible
112 - reg178 - reg
@@ -114,6 +180,75 @@ required: · 1 unmodified line
114 - clocks180 - clocks
115 - ports181 - ports
116 182
183allOf:
184 - if:
185 properties:
186 compatible:
187 contains:
188 const: rockchip,rk3568-vicap
189 then:
190 properties:
191 clocks:
192 maxItems: 4
193
194 clock-names:
195 maxItems: 4
196
197 resets:
198 maxItems: 5
199
200 reset-names:
201 items:
202 - const: arst
203 - const: hrst
204 - const: drst
205 - const: prst
206 - const: irst
207
208 ports:
209 properties:
210 port@2: false
211
212 port@3: false
213
214 port@4: false
215
216 port@5: false
217
218 port@6: false
219
220 port@10: false
221
222 port@11: false
223
224 - if:
225 properties:
226 compatible:
227 contains:
228 const: rockchip,rk3588-vicap
229 then:
230 properties:
231 clocks:
232 minItems: 5
233
234 clock-names:
235 minItems: 5
236
237 resets:
238 minItems: 9
239
240 reset-names:
241 items:
242 - const: arst
243 - const: hrst
244 - const: drst
245 - const: irst0
246 - const: irst1
247 - const: irst2
248 - const: irst3
249 - const: irst4
250 - const: irst5
251
117additionalProperties: false252additionalProperties: false
118 253
119examples:254examples:
Documentation/devicetree/bindings/media/rockchip,vdec.yaml+2−3
@@ -91,9 +91,8 @@ properties: · 90 unmodified lines
91 maxItems: 191 maxItems: 1
92 92
93 sram:93 sram:
94 $ref: /schemas/types.yaml#/definitions/phandle94 maxItems: 1
95 description: |95 description:
96 phandle to a reserved on-chip SRAM regions.
97 Some SoCs, like rk3588 provide on-chip SRAM to store temporary96 Some SoCs, like rk3588 provide on-chip SRAM to store temporary
98 buffers during decoding.97 buffers during decoding.
99 98
Documentation/devicetree/bindings/media/rockchip-rga.yaml+9−1
@@ -9,7 +9,11 @@ title: Rockchip 2D raster graphic acceleration controller (RGA) · 8 unmodified lines
9description:9description:
10 RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D10 RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D
11 graphics operations, such as point/line drawing, image scaling, rotation,11 graphics operations, such as point/line drawing, image scaling, rotation,
12 BitBLT, alpha blending and image blur/sharpness.12 BitBLT, alpha blending and image blur/sharpness. There exist many versions
13 of this unit that differ in the supported inputs/output formats,
14 the attached IOMMU and the supported operations on the input. As some SoCs
15 include multiple RGA units with different versions, a more specific
16 compatible name to differentiate the concrete unit is used for them.
13 17
14maintainers:18maintainers:
15 - Jacob Chen <jacob-chen@iotwrt.com>19 - Jacob Chen <jacob-chen@iotwrt.com>
@@ -20,6 +24,7 @@ properties: · 4 unmodified lines
20 oneOf:24 oneOf:
21 - const: rockchip,rk3288-rga25 - const: rockchip,rk3288-rga
22 - const: rockchip,rk3399-rga26 - const: rockchip,rk3399-rga
27 - const: rockchip,rk3588-rga3
23 - items:28 - items:
24 - enum:29 - enum:
25 - rockchip,rk3228-rga30 - rockchip,rk3228-rga
@@ -45,6 +50,9 @@ properties: · 19 unmodified lines
45 power-domains:50 power-domains:
46 maxItems: 151 maxItems: 1
47 52
53 iommus:
54 maxItems: 1
55
48 resets:56 resets:
49 maxItems: 357 maxItems: 3
50 58
Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml+3−3
@@ -47,10 +47,10 @@ properties: · 46 unmodified lines
47 maxItems: 147 maxItems: 1
48 48
49 sram:49 sram:
50 $ref: /schemas/types.yaml#/definitions/phandle50 maxItems: 1
51 description:51 description:
52 phandle to a reserved SRAM region which is used as temporary52 SRAM region which is used as temporary storage memory between DMA and
53 storage memory between DMA and MDMA engines.53 MDMA engines.
54 54
55 port:55 port:
56 $ref: /schemas/graph.yaml#/$defs/port-base56 $ref: /schemas/graph.yaml#/$defs/port-base
Documentation/devicetree/bindings/media/ti,j721e-csi2rx-shim.yaml+36−3
@@ -20,11 +20,44 @@ properties: · 19 unmodified lines
20 const: ti,j721e-csi2rx-shim20 const: ti,j721e-csi2rx-shim
21 21
22 dmas:22 dmas:
23 maxItems: 123 minItems: 1
24 maxItems: 32
24 25
25 dma-names:26 dma-names:
27 minItems: 1
26 items:28 items:
27 - const: rx029 - const: rx0
30 - const: rx1
31 - const: rx2
32 - const: rx3
33 - const: rx4
34 - const: rx5
35 - const: rx6
36 - const: rx7
37 - const: rx8
38 - const: rx9
39 - const: rx10
40 - const: rx11
41 - const: rx12
42 - const: rx13
43 - const: rx14
44 - const: rx15
45 - const: rx16
46 - const: rx17
47 - const: rx18
48 - const: rx19
49 - const: rx20
50 - const: rx21
51 - const: rx22
52 - const: rx23
53 - const: rx24
54 - const: rx25
55 - const: rx26
56 - const: rx27
57 - const: rx28
58 - const: rx29
59 - const: rx30
60 - const: rx31
28 61
29 reg:62 reg:
30 maxItems: 163 maxItems: 1
@@ -62,8 +95,8 @@ examples: · 31 unmodified lines
62 95
63 ti_csi2rx0: ticsi2rx@4500000 {96 ti_csi2rx0: ticsi2rx@4500000 {
64 compatible = "ti,j721e-csi2rx-shim";97 compatible = "ti,j721e-csi2rx-shim";
65 dmas = <&main_udmap 0x4940>;98 dmas = <&main_udmap 0x4940>, <&main_udmap 0x4941>;
66 dma-names = "rx0";99 dma-names = "rx0", "rx1";
67 reg = <0x4500000 0x1000>;100 reg = <0x4500000 0x1000>;
68 power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;101 power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
69 #address-cells = <1>;102 #address-cells = <1>;
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml+26−148
@@ -16,7 +16,9 @@ description: | · 15 unmodified lines
16 16
17properties:17properties:
18 compatible:18 compatible:
19 const: nvidia,tegra124-emc19 enum:
20 - nvidia,tegra114-emc
21 - nvidia,tegra124-emc
20 22
21 reg:23 reg:
22 maxItems: 124 maxItems: 1
@@ -29,6 +31,9 @@ properties: · 6 unmodified lines
29 items:31 items:
30 - const: emc32 - const: emc
31 33
34 interrupts:
35 maxItems: 1
36
32 "#interconnect-cells":37 "#interconnect-cells":
33 const: 038 const: 0
34 39
@@ -164,153 +169,12 @@ patternProperties: · 129 unmodified lines
164 nvidia,emc-configuration:169 nvidia,emc-configuration:
165 description:170 description:
166 EMC timing characterization data. These are the registers (see171 EMC timing characterization data. These are the registers (see
167 section "15.6.2 EMC Registers" in the TRM) whose values need to172 section "20.11.2 EMC Registers" in the Tegra114 TRM or section
173 "15.6.2 EMC Registers" in the Tegra124 TRM) whose values need to
168 be specified, according to the board documentation.174 be specified, according to the board documentation.
169 $ref: /schemas/types.yaml#/definitions/uint32-array175 $ref: /schemas/types.yaml#/definitions/uint32-array
170 items:176 minItems: 97
171 - description: EMC_RC177 maxItems: 143
172 - description: EMC_RFC
173 - description: EMC_RFC_SLR
174 - description: EMC_RAS
175 - description: EMC_RP
176 - description: EMC_R2W
177 - description: EMC_W2R
178 - description: EMC_R2P
179 - description: EMC_W2P
180 - description: EMC_RD_RCD
181 - description: EMC_WR_RCD
182 - description: EMC_RRD
183 - description: EMC_REXT
184 - description: EMC_WEXT
185 - description: EMC_WDV
186 - description: EMC_WDV_MASK
187 - description: EMC_QUSE
188 - description: EMC_QUSE_WIDTH
189 - description: EMC_IBDLY
190 - description: EMC_EINPUT
191 - description: EMC_EINPUT_DURATION
192 - description: EMC_PUTERM_EXTRA
193 - description: EMC_PUTERM_WIDTH
194 - description: EMC_PUTERM_ADJ
195 - description: EMC_CDB_CNTL_1
196 - description: EMC_CDB_CNTL_2
197 - description: EMC_CDB_CNTL_3
198 - description: EMC_QRST
199 - description: EMC_QSAFE
200 - description: EMC_RDV
201 - description: EMC_RDV_MASK
202 - description: EMC_REFRESH
203 - description: EMC_BURST_REFRESH_NUM
204 - description: EMC_PRE_REFRESH_REQ_CNT
205 - description: EMC_PDEX2WR
206 - description: EMC_PDEX2RD
207 - description: EMC_PCHG2PDEN
208 - description: EMC_ACT2PDEN
209 - description: EMC_AR2PDEN
210 - description: EMC_RW2PDEN
211 - description: EMC_TXSR
212 - description: EMC_TXSRDLL
213 - description: EMC_TCKE
214 - description: EMC_TCKESR
215 - description: EMC_TPD
216 - description: EMC_TFAW
217 - description: EMC_TRPAB
218 - description: EMC_TCLKSTABLE
219 - description: EMC_TCLKSTOP
220 - description: EMC_TREFBW
221 - description: EMC_FBIO_CFG6
222 - description: EMC_ODT_WRITE
223 - description: EMC_ODT_READ
224 - description: EMC_FBIO_CFG5
225 - description: EMC_CFG_DIG_DLL
226 - description: EMC_CFG_DIG_DLL_PERIOD
227 - description: EMC_DLL_XFORM_DQS0
228 - description: EMC_DLL_XFORM_DQS1
229 - description: EMC_DLL_XFORM_DQS2
230 - description: EMC_DLL_XFORM_DQS3
231 - description: EMC_DLL_XFORM_DQS4
232 - description: EMC_DLL_XFORM_DQS5
233 - description: EMC_DLL_XFORM_DQS6
234 - description: EMC_DLL_XFORM_DQS7
235 - description: EMC_DLL_XFORM_DQS8
236 - description: EMC_DLL_XFORM_DQS9
237 - description: EMC_DLL_XFORM_DQS10
238 - description: EMC_DLL_XFORM_DQS11
239 - description: EMC_DLL_XFORM_DQS12
240 - description: EMC_DLL_XFORM_DQS13
241 - description: EMC_DLL_XFORM_DQS14
242 - description: EMC_DLL_XFORM_DQS15
243 - description: EMC_DLL_XFORM_QUSE0
244 - description: EMC_DLL_XFORM_QUSE1
245 - description: EMC_DLL_XFORM_QUSE2
246 - description: EMC_DLL_XFORM_QUSE3
247 - description: EMC_DLL_XFORM_QUSE4
248 - description: EMC_DLL_XFORM_QUSE5
249 - description: EMC_DLL_XFORM_QUSE6
250 - description: EMC_DLL_XFORM_QUSE7
251 - description: EMC_DLL_XFORM_ADDR0
252 - description: EMC_DLL_XFORM_ADDR1
253 - description: EMC_DLL_XFORM_ADDR2
254 - description: EMC_DLL_XFORM_ADDR3
255 - description: EMC_DLL_XFORM_ADDR4
256 - description: EMC_DLL_XFORM_ADDR5
257 - description: EMC_DLL_XFORM_QUSE8
258 - description: EMC_DLL_XFORM_QUSE9
259 - description: EMC_DLL_XFORM_QUSE10
260 - description: EMC_DLL_XFORM_QUSE11
261 - description: EMC_DLL_XFORM_QUSE12
262 - description: EMC_DLL_XFORM_QUSE13
263 - description: EMC_DLL_XFORM_QUSE14
264 - description: EMC_DLL_XFORM_QUSE15
265 - description: EMC_DLI_TRIM_TXDQS0
266 - description: EMC_DLI_TRIM_TXDQS1
267 - description: EMC_DLI_TRIM_TXDQS2
268 - description: EMC_DLI_TRIM_TXDQS3
269 - description: EMC_DLI_TRIM_TXDQS4
270 - description: EMC_DLI_TRIM_TXDQS5
271 - description: EMC_DLI_TRIM_TXDQS6
272 - description: EMC_DLI_TRIM_TXDQS7
273 - description: EMC_DLI_TRIM_TXDQS8
274 - description: EMC_DLI_TRIM_TXDQS9
275 - description: EMC_DLI_TRIM_TXDQS10
276 - description: EMC_DLI_TRIM_TXDQS11
277 - description: EMC_DLI_TRIM_TXDQS12
278 - description: EMC_DLI_TRIM_TXDQS13
279 - description: EMC_DLI_TRIM_TXDQS14
280 - description: EMC_DLI_TRIM_TXDQS15
281 - description: EMC_DLL_XFORM_DQ0
282 - description: EMC_DLL_XFORM_DQ1
283 - description: EMC_DLL_XFORM_DQ2
284 - description: EMC_DLL_XFORM_DQ3
285 - description: EMC_DLL_XFORM_DQ4
286 - description: EMC_DLL_XFORM_DQ5
287 - description: EMC_DLL_XFORM_DQ6
288 - description: EMC_DLL_XFORM_DQ7
289 - description: EMC_XM2CMDPADCTRL
290 - description: EMC_XM2CMDPADCTRL4
291 - description: EMC_XM2CMDPADCTRL5
292 - description: EMC_XM2DQPADCTRL2
293 - description: EMC_XM2DQPADCTRL3
294 - description: EMC_XM2CLKPADCTRL
295 - description: EMC_XM2CLKPADCTRL2
296 - description: EMC_XM2COMPPADCTRL
297 - description: EMC_XM2VTTGENPADCTRL
298 - description: EMC_XM2VTTGENPADCTRL2
299 - description: EMC_XM2VTTGENPADCTRL3
300 - description: EMC_XM2DQSPADCTRL3
301 - description: EMC_XM2DQSPADCTRL4
302 - description: EMC_XM2DQSPADCTRL5
303 - description: EMC_XM2DQSPADCTRL6
304 - description: EMC_DSR_VTTGEN_DRV
305 - description: EMC_TXDSRVTTGEN
306 - description: EMC_FBIO_SPARE
307 - description: EMC_ZCAL_WAIT_CNT
308 - description: EMC_MRS_WAIT_CNT2
309 - description: EMC_CTT
310 - description: EMC_CTT_DURATION
311 - description: EMC_CFG_PIPE
312 - description: EMC_DYN_SELF_REF_CONTROL
313 - description: EMC_QPOP
314 178
315 required:179 required:
316 - clock-frequency180 - clock-frequency
@@ -318,9 +182,7 @@ patternProperties: · 1 unmodified line
318 - nvidia,emc-auto-cal-config2182 - nvidia,emc-auto-cal-config2
319 - nvidia,emc-auto-cal-config3183 - nvidia,emc-auto-cal-config3
320 - nvidia,emc-auto-cal-interval184 - nvidia,emc-auto-cal-interval
321 - nvidia,emc-bgbias-ctl0
322 - nvidia,emc-cfg185 - nvidia,emc-cfg
323 - nvidia,emc-cfg-2
324 - nvidia,emc-ctt-term-ctrl186 - nvidia,emc-ctt-term-ctrl
325 - nvidia,emc-mode-1187 - nvidia,emc-mode-1
326 - nvidia,emc-mode-2188 - nvidia,emc-mode-2
@@ -344,6 +206,22 @@ required: · 17 unmodified lines
344 - "#interconnect-cells"206 - "#interconnect-cells"
345 - operating-points-v2207 - operating-points-v2
346 208
209allOf:
210 - if:
211 properties:
212 compatible:
213 contains:
214 enum:
215 - nvidia,tegra124-emc
216 then:
217 patternProperties:
218 "^emc-timings-[0-9]+$":
219 patternProperties:
220 "^timing-[0-9]+$":
221 required:
222 - nvidia,emc-bgbias-ctl0
223 - nvidia,emc-cfg-2
224
347additionalProperties: false225additionalProperties: false
348 226
349examples:227examples:
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.yaml+8−23
@@ -19,7 +19,9 @@ description: | · 18 unmodified lines
19 19
20properties:20properties:
21 compatible:21 compatible:
22 const: nvidia,tegra124-mc22 enum:
23 - nvidia,tegra114-mc
24 - nvidia,tegra124-mc
23 25
24 reg:26 reg:
25 maxItems: 127 maxItems: 1
@@ -64,29 +66,12 @@ patternProperties: · 38 unmodified lines
64 66
65 nvidia,emem-configuration:67 nvidia,emem-configuration:
66 $ref: /schemas/types.yaml#/definitions/uint32-array68 $ref: /schemas/types.yaml#/definitions/uint32-array
67 description: |69 description:
68 Values to be written to the EMEM register block. See section70 Values to be written to the EMEM register block. See section
69 "15.6.1 MC Registers" in the TRM.71 "20.11.1 MC Registers" in the Tegea114 TRM or
70 items:72 "15.6.1 MC Registers" in the Tegra124 TRM.
71 - description: MC_EMEM_ARB_CFG73 minItems: 18
72 - description: MC_EMEM_ARB_OUTSTANDING_REQ74 maxItems: 19
73 - description: MC_EMEM_ARB_TIMING_RCD
74 - description: MC_EMEM_ARB_TIMING_RP
75 - description: MC_EMEM_ARB_TIMING_RC
76 - description: MC_EMEM_ARB_TIMING_RAS
77 - description: MC_EMEM_ARB_TIMING_FAW
78 - description: MC_EMEM_ARB_TIMING_RRD
79 - description: MC_EMEM_ARB_TIMING_RAP2PRE
80 - description: MC_EMEM_ARB_TIMING_WAP2PRE
81 - description: MC_EMEM_ARB_TIMING_R2R
82 - description: MC_EMEM_ARB_TIMING_W2W
83 - description: MC_EMEM_ARB_TIMING_R2W
84 - description: MC_EMEM_ARB_TIMING_W2R
85 - description: MC_EMEM_ARB_DA_TURNS
86 - description: MC_EMEM_ARB_DA_COVERS
87 - description: MC_EMEM_ARB_MISC0
88 - description: MC_EMEM_ARB_MISC1
89 - description: MC_EMEM_ARB_RING1_THROTTLE
90 75
91 required:76 required:
92 - clock-frequency77 - clock-frequency
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml+31−0
@@ -32,6 +32,7 @@ properties: · 31 unmodified lines
32 - nvidia,tegra186-mc32 - nvidia,tegra186-mc
33 - nvidia,tegra194-mc33 - nvidia,tegra194-mc
34 - nvidia,tegra234-mc34 - nvidia,tegra234-mc
35 - nvidia,tegra238-mc
35 - nvidia,tegra264-mc36 - nvidia,tegra264-mc
36 37
37 reg:38 reg:
@@ -266,6 +267,36 @@ allOf: · 228 unmodified lines
266 267
267 interrupt-names: false268 interrupt-names: false
268 269
270 - if:
271 properties:
272 compatible:
273 const: nvidia,tegra238-mc
274 then:
275 properties:
276 reg:
277 minItems: 10
278 maxItems: 10
279 description: 9 memory controller channels and 1 for stream-id registers
280
281 reg-names:
282 items:
283 - const: sid
284 - const: broadcast
285 - const: ch0
286 - const: ch1
287 - const: ch2
288 - const: ch3
289 - const: ch4
290 - const: ch5
291 - const: ch6
292 - const: ch7
293
294 interrupts:
295 items:
296 - description: MC general interrupt
297
298 interrupt-names: false
299
269 - if:300 - if:
270 properties:301 properties:
271 compatible:302 compatible:
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.yaml+2−2
@@ -66,8 +66,8 @@ examples: · 65 unmodified lines
66 - |66 - |
67 memory-controller@7000f000 {67 memory-controller@7000f000 {
68 compatible = "nvidia,tegra20-mc-gart";68 compatible = "nvidia,tegra20-mc-gart";
69 reg = <0x7000f000 0x400>, /* Controller registers */69 reg = <0x7000f000 0x400>, /* Controller registers */
70 <0x58000000 0x02000000>; /* GART aperture */70 <0x58000000 0x02000000>; /* GART aperture */
71 clocks = <&clock_controller 32>;71 clocks = <&clock_controller 32>;
72 clock-names = "mc";72 clock-names = "mc";
73 73
Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml+50−10
@@ -30,6 +30,8 @@ properties: · 29 unmodified lines
30 - enum:30 - enum:
31 - renesas,r9a09g056-xspi # RZ/V2N31 - renesas,r9a09g056-xspi # RZ/V2N
32 - renesas,r9a09g057-xspi # RZ/V2H(P)32 - renesas,r9a09g057-xspi # RZ/V2H(P)
33 - renesas,r9a09g077-xspi # RZ/T2H
34 - renesas,r9a09g087-xspi # RZ/N2H
33 - const: renesas,r9a09g047-xspi35 - const: renesas,r9a09g047-xspi
34 36
35 reg:37 reg:
@@ -53,28 +55,38 @@ properties: · 17 unmodified lines
53 - const: err_pulse55 - const: err_pulse
54 56
55 clocks:57 clocks:
56 items:58 oneOf:
57 - description: AHB clock59 - items:
58 - description: AXI clock60 - description: AHB clock
59 - description: SPI clock61 - description: AXI clock
60 - description: Double speed SPI clock62 - description: SPI clock
63 - description: Double speed SPI clock
64 - items:
65 - description: AHB clock
66 - description: SPI clock
61 67
62 clock-names:68 clock-names:
63 items:69 oneOf:
64 - const: ahb70 - items:
65 - const: axi71 - const: ahb
66 - const: spi72 - const: axi
67 - const: spix273 - const: spi
74 - const: spix2
75 - items:
76 - const: ahb
77 - const: spi
68 78
69 power-domains:79 power-domains:
70 maxItems: 180 maxItems: 1
71 81
72 resets:82 resets:
83 minItems: 1
73 items:84 items:
74 - description: Hardware reset85 - description: Hardware reset
75 - description: AXI reset86 - description: AXI reset
76 87
77 reset-names:88 reset-names:
89 minItems: 1
78 items:90 items:
79 - const: hresetn91 - const: hresetn
80 - const: aresetn92 - const: aresetn
@@ -109,6 +121,34 @@ required: · 28 unmodified lines
109 - '#address-cells'121 - '#address-cells'
110 - '#size-cells'122 - '#size-cells'
111 123
124if:
125 properties:
126 compatible:
127 contains:
128 enum:
129 - renesas,r9a09g077-xspi
130 - renesas,r9a09g087-xspi
131then:
132 properties:
133 clocks:
134 maxItems: 2
135 clock-names:
136 maxItems: 2
137 resets:
138 maxItems: 1
139 reset-names:
140 maxItems: 1
141else:
142 properties:
143 clocks:
144 minItems: 4
145 clock-names:
146 minItems: 4
147 resets:
148 minItems: 2
149 reset-names:
150 minItems: 2
151
112unevaluatedProperties: false152unevaluatedProperties: false
113 153
114examples:154examples:
Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml+1−1
@@ -128,7 +128,7 @@ examples: · 127 unmodified lines
128 "mout_mx_mspll_ccore",128 "mout_mx_mspll_ccore",
129 "mout_mclk_cdrex";129 "mout_mclk_cdrex";
130 operating-points-v2 = <&dmc_opp_table>;130 operating-points-v2 = <&dmc_opp_table>;
131 devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>,131 devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>,
132 <&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>;132 <&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>;
133 device-handle = <&samsung_K3QF2F20DB>;133 device-handle = <&samsung_K3QF2F20DB>;
134 vdd-supply = <&buck1_reg>;134 vdd-supply = <&buck1_reg>;
Documentation/devicetree/bindings/mfd/apple,smc.yaml+36−0
@@ -49,6 +49,9 @@ properties: · 48 unmodified lines
49 rtc:49 rtc:
50 $ref: /schemas/rtc/apple,smc-rtc.yaml50 $ref: /schemas/rtc/apple,smc-rtc.yaml
51 51
52 hwmon:
53 $ref: /schemas/hwmon/apple,smc-hwmon.yaml
54
52additionalProperties: false55additionalProperties: false
53 56
54required:57required:
@@ -89,5 +92,38 @@ examples: · 34 unmodified lines
89 nvmem-cells = <&rtc_offset>;92 nvmem-cells = <&rtc_offset>;
90 nvmem-cell-names = "rtc_offset";93 nvmem-cell-names = "rtc_offset";
91 };94 };
95
96 hwmon {
97 compatible = "apple,smc-hwmon";
98
99 current-ID0R {
100 apple,key-id = "ID0R";
101 label = "AC Input Current";
102 };
103
104 fan-F0Ac {
105 apple,key-id = "F0Ac";
106 apple,fan-minimum = "F0Mn";
107 apple,fan-maximum = "F0Mx";
108 apple,fan-target = "F0Tg";
109 apple,fan-mode = "F0Md";
110 label = "Fan 1";
111 };
112
113 power-PSTR {
114 apple,key-id = "PSTR";
115 label = "Total System Power";
116 };
117
118 temperature-TW0P {
119 apple,key-id = "TW0P";
120 label = "WiFi/BT Module Temperature";
121 };
122
123 voltage-VD0R {
124 apple,key-id = "VD0R";
125 label = "AC Input Voltage";
126 };
127 };
92 };128 };
93 };129 };
Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml+115−0
@@ -46,6 +46,18 @@ properties: · 45 unmodified lines
46 '#reset-cells':46 '#reset-cells':
47 const: 147 const: 1
48 48
49 memory-region:
50 items:
51 - description: Region mapped through the first SSP address window.
52 - description: Region mapped through the second SSP address window.
53 - description: Region mapped through the TSP address window.
54
55 memory-region-names:
56 items:
57 - const: ssp-0
58 - const: ssp-1
59 - const: tsp
60
49patternProperties:61patternProperties:
50 '^p2a-control@[0-9a-f]+$':62 '^p2a-control@[0-9a-f]+$':
51 description: >63 description: >
@@ -87,6 +99,8 @@ patternProperties: · 35 unmodified lines
87 - aspeed,ast2400-pinctrl99 - aspeed,ast2400-pinctrl
88 - aspeed,ast2500-pinctrl100 - aspeed,ast2500-pinctrl
89 - aspeed,ast2600-pinctrl101 - aspeed,ast2600-pinctrl
102 - aspeed,ast2700-soc0-pinctrl
103 - aspeed,ast2700-soc1-pinctrl
90 104
91 required:105 required:
92 - compatible106 - compatible
@@ -156,6 +170,30 @@ required: · 63 unmodified lines
156 - '#clock-cells'170 - '#clock-cells'
157 - '#reset-cells'171 - '#reset-cells'
158 172
173allOf:
174 - if:
175 properties:
176 compatible:
177 contains:
178 enum:
179 - aspeed,ast2700-scu0
180 - aspeed,ast2700-scu1
181 then:
182 patternProperties:
183 '^p2a-control@[0-9a-f]+$': false
184 '^smp-memram@[0-9a-f]+$': false
185
186 - if:
187 not:
188 properties:
189 compatible:
190 contains:
191 const: aspeed,ast2700-scu0
192 then:
193 properties:
194 memory-region: false
195 memory-region-names: false
196
159additionalProperties: false197additionalProperties: false
160 198
161examples:199examples:
@@ -180,4 +218,81 @@ examples: · 18 unmodified lines
180 reg = <0x7c 0x4>, <0x150 0x8>;218 reg = <0x7c 0x4>, <0x150 0x8>;
181 };219 };
182 };220 };
221
222 - |
223 / {
224 #address-cells = <2>;
225 #size-cells = <2>;
226
227 reserved-memory {
228 #address-cells = <2>;
229 #size-cells = <2>;
230 ranges;
231
232 ssp_region_0: memory@400000000 {
233 reg = <0x4 0x00000000 0x0 0x01000000>;
234 no-map;
235 };
236
237 ssp_region_1: memory@401000000 {
238 reg = <0x4 0x01000000 0x0 0x01000000>;
239 no-map;
240 };
241
242 tsp_region: memory@402000000 {
243 reg = <0x4 0x02000000 0x0 0x01000000>;
244 no-map;
245 };
246 };
247
248 bus {
249 #address-cells = <2>;
250 #size-cells = <2>;
251
252 syscon@12c02000 {
253 compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd";
254 reg = <0 0x12c02000 0 0x1000>;
255 ranges = <0x0 0x0 0x12c02000 0x1000>;
256 #address-cells = <1>;
257 #size-cells = <1>;
258 #clock-cells = <1>;
259 #reset-cells = <1>;
260
261 memory-region = <&ssp_region_0>, <&ssp_region_1>,
262 <&tsp_region>;
263 memory-region-names = "ssp-0", "ssp-1", "tsp";
264
265 silicon-id@0 {
266 compatible = "aspeed,ast2700-silicon-id", "aspeed,silicon-id";
267 reg = <0x0 0x4>;
268 };
269
270 interrupt-controller@1b0 {
271 compatible = "aspeed,ast2700-scu-ic0";
272 reg = <0x1b0 0x4>;
273 #interrupt-cells = <1>;
274 interrupts-extended = <&intc0 97>;
275 interrupt-controller;
276 };
277
278 interrupt-controller@1e0 {
279 compatible = "aspeed,ast2700-scu-ic1";
280 reg = <0x1e0 0x4>;
281 #interrupt-cells = <1>;
282 interrupts-extended = <&intc0 98>;
283 interrupt-controller;
284 };
285
286 pinctrl@400 {
287 compatible = "aspeed,ast2700-soc0-pinctrl";
288 reg = <0x400 0x318>;
289 emmc-state {
290 function = "EMMC";
291 groups = "EMMCG1";
292 };
293 };
294 };
295 };
296 };
297
183...298...
Documentation/devicetree/bindings/mfd/hisilicon,hi655x-pmic.yaml+80−0
@@ -0,0 +1,80 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/hisilicon,hi655x-pmic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Hisilicon Hi655x Power Management Integrated Circuit
8
9maintainers:
10 - Chen Feng <puck.chen@hisilicon.com>
11 - Daniel Lezcano <daniel.lezcano@kernel.org>
12
13description:
14 The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
15 Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
16 We can use memory-mapped I/O to communicate.
17
18properties:
19 compatible:
20 const: hisilicon,hi655x-pmic
21
22 reg:
23 maxItems: 1
24
25 interrupt-controller: true
26
27 '#interrupt-cells':
28 const: 2
29
30 pmic-gpios:
31 maxItems: 1
32 description: The GPIO used by PMIC IRQ
33
34 '#clock-cells':
35 const: 0
36
37 clock-output-names:
38 maxItems: 1
39
40 regulators:
41 type: object
42 additionalProperties: false
43
44 patternProperties:
45 '^LDO(2|7|10|13|14|15|17|19|21|22)$':
46 type: object
47 $ref: /schemas/regulator/regulator.yaml#
48 unevaluatedProperties: false
49
50required:
51 - compatible
52 - reg
53 - interrupt-controller
54 - '#interrupt-cells'
55 - pmic-gpios
56 - '#clock-cells'
57
58additionalProperties: false
59
60examples:
61 - |
62 #include <dt-bindings/gpio/gpio.h>
63
64 pmic: pmic@f8000000 {
65 compatible = "hisilicon,hi655x-pmic";
66 reg = <0xf8000000 0x1000>;
67 #clock-cells = <0>;
68 interrupt-controller;
69 #interrupt-cells = <2>;
70 pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
71
72 regulators {
73 ldo2: LDO2 {
74 regulator-name = "LDO2_2V8";
75 regulator-min-microvolt = <2500000>;
76 regulator-max-microvolt = <3200000>;
77 regulator-enable-ramp-delay = <120>;
78 };
79 };
80 };
Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt+0−33
@@ -1,33 +0,0 @@
1Hisilicon Hi655x Power Management Integrated Circuit (PMIC)
2
3The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
4Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
5We can use memory-mapped I/O to communicate.
6
7+----------------+ +-------------+
8| | | |
9| Hi6220 | SSI bus | Hi655x |
10| |-------------| |
11| |(REGMAP_MMIO)| |
12+----------------+ +-------------+
13
14Required properties:
15- compatible: Should be "hisilicon,hi655x-pmic".
16- reg: Base address of PMIC on Hi6220 SoC.
17- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
18- pmic-gpios: The GPIO used by PMIC IRQ.
19- #clock-cells: From common clock binding; shall be set to 0
20
21Optional properties:
22- clock-output-names: From common clock binding to override the
23 default output clock name
24
25Example:
26 pmic: pmic@f8000000 {
27 compatible = "hisilicon,hi655x-pmic";
28 reg = <0x0 0xf8000000 0x0 0x1000>;
29 interrupt-controller;
30 #interrupt-cells = <2>;
31 pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
32 #clock-cells = <0>;
33 }
Documentation/devicetree/bindings/mfd/khadas,mcu.yaml+17−0
@@ -18,6 +18,7 @@ properties: · 17 unmodified lines
18 compatible:18 compatible:
19 enum:19 enum:
20 - khadas,mcu # MCU revision is discoverable20 - khadas,mcu # MCU revision is discoverable
21 - khadas,vim4-mcu # Different MCU variant, not discoverable
21 22
22 "#cooling-cells": # Only needed for boards having FAN control feature23 "#cooling-cells": # Only needed for boards having FAN control feature
23 const: 224 const: 2
@@ -25,10 +26,26 @@ properties: · 1 unmodified line
25 reg:26 reg:
26 maxItems: 127 maxItems: 1
27 28
29 fan-supply:
30 description: Phandle to the regulator that powers the fan.
31
28required:32required:
29 - compatible33 - compatible
30 - reg34 - reg
31 35
36allOf:
37 - if:
38 properties:
39 compatible:
40 contains:
41 const: khadas,vim4-mcu
42 then:
43 required:
44 - fan-supply
45 else:
46 properties:
47 fan-supply: false
48
32additionalProperties: false49additionalProperties: false
33 50
34examples:51examples:
Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml+64−0
@@ -44,6 +44,10 @@ properties: · 43 unmodified lines
44 - enum:44 - enum:
45 - mediatek,mt636645 - mediatek,mt6366
46 - const: mediatek,mt635846 - const: mediatek,mt6358
47 - items:
48 - enum:
49 - mediatek,mt6365
50 - const: mediatek,mt6359
47 51
48 interrupts:52 interrupts:
49 maxItems: 153 maxItems: 1
@@ -70,6 +74,8 @@ properties: · 20 unmodified lines
70 - mediatek,mt6397-rtc74 - mediatek,mt6397-rtc
71 - items:75 - items:
72 - enum:76 - enum:
77 - mediatek,mt6359-rtc
78 - mediatek,mt6365-rtc
73 - mediatek,mt6366-rtc79 - mediatek,mt6366-rtc
74 - const: mediatek,mt6358-rtc80 - const: mediatek,mt6358-rtc
75 81
@@ -98,6 +104,10 @@ properties: · 22 unmodified lines
98 - enum:104 - enum:
99 - mediatek,mt6366-regulator105 - mediatek,mt6366-regulator
100 - const: mediatek,mt6358-regulator106 - const: mediatek,mt6358-regulator
107 - items:
108 - enum:
109 - mediatek,mt6365-regulator
110 - const: mediatek,mt6359-regulator
101 111
102 required:112 required:
103 - compatible113 - compatible
@@ -124,6 +134,10 @@ properties: · 20 unmodified lines
124 - enum:134 - enum:
125 - mediatek,mt6366-sound135 - mediatek,mt6366-sound
126 - const: mediatek,mt6358-sound136 - const: mediatek,mt6358-sound
137 - items:
138 - enum:
139 - mediatek,mt6365-codec
140 - const: mediatek,mt6359-codec
127 141
128 required:142 required:
129 - compatible143 - compatible
@@ -225,12 +239,62 @@ properties: · 95 unmodified lines
225 description:239 description:
226 Pin controller240 Pin controller
227 241
242 vsys-smps-supply:
243 description: Supply for regulator control logic
244
245patternProperties:
246 "^vsys-v[a-z]+[0-9]*-supply$":
247 description: Supplies for PMIC buck regulators
248 "^vs(ys|[12])-ldo[1-9]-supply$":
249 description: Supplies for PMIC LDO regulators
250
228required:251required:
229 - compatible252 - compatible
230 - regulators253 - regulators
231 254
232additionalProperties: false255additionalProperties: false
233 256
257allOf:
258 - if:
259 properties:
260 "compatible":
261 contains:
262 const: mediatek,mt6359
263 then:
264 properties:
265 vsys-ldo1-supply:
266 description: Supply for LDOs vcn33_[12], vio28, vfe28, vibr
267 vsys-ldo2-supply:
268 description: Supply for LDOs vaux18, vbif28, vxo22, vrfck, vrfck_1,
269 vemc, vsim1, vsim2, vusb
270 vsys-vcore-supply:
271 description: Supply for buck regulator vcore
272 vsys-vgpu11-supply:
273 description: Supply for buck regulator vgpu11
274 vsys-vmodem-supply:
275 description: Supply for buck regulator vmodem
276 vsys-vpa-supply:
277 description: Supply for buck regulator vpa
278 vsys-vproc1-supply:
279 description: Supply for buck regulator vproc1
280 vsys-vproc2-supply:
281 description: Supply for buck regulator vproc2
282 vsys-vpu-supply:
283 description: Supply for buck regulator vpu
284 vsys-vs1-supply:
285 description: Supply for buck regulator vs1
286 vsys-vs2-supply:
287 description: Supply for buck regulator vs2
288 vs1-ldo1-supply:
289 description: Supply for LDOs vaud18, vcamio, vm18, vufs
290 vs1-ldo2-supply:
291 description: Supply for LDOs vcn18, vefuse, vio18, vrf18
292 vs2-ldo1-supply:
293 description:
294 Supply for LDOs vsram_proc1, vsram_proc2, vsram_others, vsram_md
295 vs2-ldo2-supply:
296 description: Supply for LDOs va09, va12, vcn13, vrf12
297
234examples:298examples:
235 - |299 - |
236 #include <dt-bindings/interrupt-controller/arm-gic.h>300 #include <dt-bindings/interrupt-controller/arm-gic.h>
Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml+2−0
@@ -19,6 +19,7 @@ properties: · 18 unmodified lines
19 - enum:19 - enum:
20 - qcom,msm8976-tcsr20 - qcom,msm8976-tcsr
21 - qcom,msm8998-tcsr21 - qcom,msm8998-tcsr
22 - qcom,nord-tcsr
22 - qcom,qcm2290-tcsr23 - qcom,qcm2290-tcsr
23 - qcom,qcs404-tcsr24 - qcom,qcs404-tcsr
24 - qcom,qcs615-tcsr25 - qcom,qcs615-tcsr
@@ -42,6 +43,7 @@ properties: · 17 unmodified lines
42 - qcom,tcsr-apq806443 - qcom,tcsr-apq8064
43 - qcom,tcsr-apq808444 - qcom,tcsr-apq8084
44 - qcom,tcsr-ipq501845 - qcom,tcsr-ipq5018
46 - qcom,tcsr-ipq5210
45 - qcom,tcsr-ipq533247 - qcom,tcsr-ipq5332
46 - qcom,tcsr-ipq542448 - qcom,tcsr-ipq5424
47 - qcom,tcsr-ipq601849 - qcom,tcsr-ipq6018
Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml+1−2
@@ -44,8 +44,7 @@ properties: · 43 unmodified lines
44 description:44 description:
45 Telling whether or not this PMIC is controlling the system power.45 Telling whether or not this PMIC is controlling the system power.
46 46
47 wakeup-source:47 wakeup-source: true
48 type: boolean
49 48
50 vcc1-supply:49 vcc1-supply:
51 description:50 description:
Documentation/devicetree/bindings/mfd/samsung,s2mu005-pmic.yaml+120−0
@@ -0,0 +1,120 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/samsung,s2mu005-pmic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S2MU005 Power Management IC
8
9maintainers:
10 - Kaustabh Chakraborty <kauschluss@disroot.org>
11
12description: |
13 The S2MU005 is a companion power management IC which includes subdevices for
14 a charger controller, an MUIC (Micro USB Interface Controller), and flash and
15 RGB LED controllers.
16
17allOf:
18 - $ref: /schemas/power/supply/power-supply.yaml#
19
20properties:
21 compatible:
22 const: samsung,s2mu005-pmic
23
24 flash:
25 $ref: /schemas/leds/samsung,s2mu005-flash.yaml#
26 description:
27 Child node describing flash LEDs.
28
29 interrupts:
30 maxItems: 1
31
32 muic:
33 $ref: /schemas/extcon/samsung,s2mu005-muic.yaml#
34 description:
35 Child node describing MUIC device.
36
37 multi-led:
38 type: object
39
40 allOf:
41 - $ref: /schemas/leds/leds-class-multicolor.yaml#
42
43 properties:
44 compatible:
45 const: samsung,s2mu005-rgb
46
47 required:
48 - compatible
49
50 unevaluatedProperties: false
51
52 reg:
53 maxItems: 1
54
55required:
56 - compatible
57 - reg
58
59unevaluatedProperties: false
60
61examples:
62 - |
63 #include <dt-bindings/interrupt-controller/irq.h>
64 #include <dt-bindings/leds/common.h>
65
66 i2c {
67 #address-cells = <1>;
68 #size-cells = <0>;
69
70 pmic@3d {
71 compatible = "samsung,s2mu005-pmic";
72 reg = <0x3d>;
73 interrupt-parent = <&gpa2>;
74 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
75
76 monitored-battery = <&battery>;
77
78 flash {
79 compatible = "samsung,s2mu005-flash";
80 #address-cells = <1>;
81 #size-cells = <0>;
82
83 led@0 {
84 reg = <0>;
85 color = <LED_COLOR_ID_WHITE>;
86 function = LED_FUNCTION_FLASH;
87 };
88
89 led@1 {
90 reg = <1>;
91 color = <LED_COLOR_ID_WHITE>;
92 function = LED_FUNCTION_FLASH;
93 function-enumerator = <1>;
94 };
95 };
96
97 muic {
98 compatible = "samsung,s2mu005-muic";
99
100 connector {
101 compatible = "usb-b-connector";
102 label = "micro-USB";
103 type = "micro";
104 };
105
106 port {
107 muic_to_usb: endpoint {
108 remote-endpoint = <&usb_to_muic>;
109 };
110 };
111 };
112
113 multi-led {
114 compatible = "samsung,s2mu005-rgb";
115 color = <LED_COLOR_ID_RGB>;
116 function = LED_FUNCTION_INDICATOR;
117 linux,default-trigger = "pattern";
118 };
119 };
120 };
Documentation/devicetree/bindings/mfd/sprd,sc2731.yaml+3−1
@@ -54,7 +54,9 @@ properties: · 53 unmodified lines
54 54
55 regulators:55 regulators:
56 type: object56 type: object
57 $ref: /schemas/regulator/sprd,sc2731-regulator.yaml#57 oneOf:
58 - $ref: /schemas/regulator/sprd,sc2730-regulator.yaml#
59 - $ref: /schemas/regulator/sprd,sc2731-regulator.yaml#
58 60
59patternProperties:61patternProperties:
60 "^adc@[0-9a-f]+$":62 "^adc@[0-9a-f]+$":
Documentation/devicetree/bindings/mfd/st,stmpe.yaml+4−0
@@ -127,6 +127,10 @@ properties: · 126 unmodified lines
127 "#pwm-cells":127 "#pwm-cells":
128 const: 2128 const: 2
129 129
130 required:
131 - compatible
132 - "#pwm-cells"
133
130 touchscreen:134 touchscreen:
131 type: object135 type: object
132 $ref: /schemas/input/touchscreen/touchscreen.yaml#136 $ref: /schemas/input/touchscreen/touchscreen.yaml#
Documentation/devicetree/bindings/mfd/ti,bq25703a.yaml+63−10
@@ -4,17 +4,16 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/mfd/ti,bq25703a.yaml#4$id: http://devicetree.org/schemas/mfd/ti,bq25703a.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: BQ25703A Charger Manager/Buck/Boost Converter7title: BQ257xx Charger Manager/Buck/Boost Converter
8 8
9maintainers:9maintainers:
10 - Chris Morgan <macromorgan@hotmail.com>10 - Chris Morgan <macromorgan@hotmail.com>
11 11
12allOf:
13 - $ref: /schemas/power/supply/power-supply.yaml#
14
15properties:12properties:
16 compatible:13 compatible:
17 const: ti,bq25703a14 enum:
15 - ti,bq25703a
16 - ti,bq25792
18 17
19 reg:18 reg:
20 const: 0x6b19 const: 0x6b
@@ -25,7 +24,6 @@ properties: · 4 unmodified lines
25 powering the device.24 powering the device.
26 minimum: 5000025 minimum: 50000
27 maximum: 640000026 maximum: 6400000
28 default: 3250000
29 27
30 interrupts:28 interrupts:
31 maxItems: 129 maxItems: 1
@@ -57,11 +55,11 @@ properties: · 25 unmodified lines
57 minimum: 055 minimum: 0
58 maximum: 635000056 maximum: 6350000
59 regulator-min-microvolt:57 regulator-min-microvolt:
60 minimum: 448000058 minimum: 2800000
61 maximum: 2080000059 maximum: 22000000
62 regulator-max-microvolt:60 regulator-max-microvolt:
63 minimum: 448000061 minimum: 2800000
64 maximum: 2080000062 maximum: 22000000
65 enable-gpios:63 enable-gpios:
66 description:64 description:
67 The BQ25703 may require both a register write and a GPIO65 The BQ25703 may require both a register write and a GPIO
@@ -74,6 +72,61 @@ properties: · 6 unmodified lines
74 - regulator-min-microvolt72 - regulator-min-microvolt
75 - regulator-max-microvolt73 - regulator-max-microvolt
76 74
75allOf:
76 - $ref: /schemas/power/supply/power-supply.yaml#
77 - if:
78 properties:
79 compatible:
80 const: ti,bq25703a
81 then:
82 properties:
83 input-current-limit-microamp:
84 minimum: 50000
85 maximum: 6400000
86 default: 3250000
87 regulators:
88 properties:
89 vbus:
90 properties:
91 regulator-min-microamp:
92 minimum: 0
93 maximum: 6350000
94 regulator-max-microamp:
95 minimum: 0
96 maximum: 6350000
97 regulator-min-microvolt:
98 minimum: 4480000
99 maximum: 20800000
100 regulator-max-microvolt:
101 minimum: 4480000
102 maximum: 20800000
103 - if:
104 properties:
105 compatible:
106 const: ti,bq25792
107 then:
108 properties:
109 input-current-limit-microamp:
110 minimum: 100000
111 maximum: 3300000
112 default: 3000000
113 regulators:
114 properties:
115 vbus:
116 properties:
117 regulator-min-microamp:
118 minimum: 0
119 maximum: 3320000
120 regulator-max-microamp:
121 minimum: 0
122 maximum: 3320000
123 regulator-min-microvolt:
124 minimum: 2800000
125 maximum: 22000000
126 regulator-max-microvolt:
127 minimum: 2800000
128 maximum: 22000000
129
77unevaluatedProperties: false130unevaluatedProperties: false
78 131
79required:132required:
Documentation/devicetree/bindings/misc/fsl,qoriq-mc.yaml+1−1
@@ -166,7 +166,7 @@ examples: · 165 unmodified lines
166 */166 */
167 ranges = <0x0 0x0 0x8 0x0c000000 0x4000000167 ranges = <0x0 0x0 0x8 0x0c000000 0x4000000
168 0x1 0x0 0x8 0x18000000 0x8000000>;168 0x1 0x0 0x8 0x18000000 0x8000000>;
169 169
170 /* define map for ICIDs 23-64 */170 /* define map for ICIDs 23-64 */
171 iommu-map = <23 &smmu 23 41>;171 iommu-map = <23 &smmu 23 41>;
172 /* define msi map for ICIDs 23-64 */172 /* define msi map for ICIDs 23-64 */
Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml+1−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
25 - items:25 - items:
26 - enum:26 - enum:
27 - qcom,glymur-fastrpc27 - qcom,glymur-fastrpc
28 - qcom,hawi-fastrpc
28 - const: qcom,kaanapali-fastrpc29 - const: qcom,kaanapali-fastrpc
29 30
30 label:31 label:
Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml+4−3
@@ -39,10 +39,11 @@ properties: · 38 unmodified lines
39 $ref: /schemas/types.yaml#/definitions/phandle-array39 $ref: /schemas/types.yaml#/definitions/phandle-array
40 description: |40 description: |
41 DWMMC core on Hi3798MV2x SoCs has a delay-locked-loop(DLL) attached to card data input path.41 DWMMC core on Hi3798MV2x SoCs has a delay-locked-loop(DLL) attached to card data input path.
42 It is integrated into CRG core on the SoC and has to be controlled during tuning.42 It is integrated into CRG core on the SoC and has to be controlled during tuning
43 items:43 items:
44 - description: A phandle pointed to the CRG syscon node44 - items:
45 - description: Sample DLL register offset in CRG address space45 - description: A phandle pointed to the CRG syscon node
46 - description: Sample DLL register offset in CRG address space
46 47
47required:48required:
48 - compatible49 - compatible
Documentation/devicetree/bindings/mmc/qcom,sdhci-msm.yamlrenamed from Documentation/devicetree/bindings/mmc/sdhci-msm.yaml+4−1
@@ -1,7 +1,7 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.22%YAML 1.2
3---3---
4$id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#4$id: http://devicetree.org/schemas/mmc/qcom,sdhci-msm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: Qualcomm SDHCI controller (sdhci-msm)7title: Qualcomm SDHCI controller (sdhci-msm)
@@ -37,6 +37,8 @@ properties: · 29 unmodified lines
37 - const: qcom,sdhci-msm-v4 # for sdcc versions less than 5.037 - const: qcom,sdhci-msm-v4 # for sdcc versions less than 5.0
38 - items:38 - items:
39 - enum:39 - enum:
40 - qcom,eliza-sdhci
41 - qcom,hawi-sdhci
40 - qcom,ipq5018-sdhci42 - qcom,ipq5018-sdhci
41 - qcom,ipq5210-sdhci43 - qcom,ipq5210-sdhci
42 - qcom,ipq5332-sdhci44 - qcom,ipq5332-sdhci
@@ -62,6 +64,7 @@ properties: · 19 unmodified lines
62 - qcom,sdx55-sdhci64 - qcom,sdx55-sdhci
63 - qcom,sdx65-sdhci65 - qcom,sdx65-sdhci
64 - qcom,sdx75-sdhci66 - qcom,sdx75-sdhci
67 - qcom,shikra-sdhci
65 - qcom,sm6115-sdhci68 - qcom,sm6115-sdhci
66 - qcom,sm6125-sdhci69 - qcom,sm6125-sdhci
67 - qcom,sm6350-sdhci70 - qcom,sm6350-sdhci
Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml+1−0
@@ -52,6 +52,7 @@ properties: · 51 unmodified lines
52 - renesas,sdhi-r8a77980 # R-Car V3H52 - renesas,sdhi-r8a77980 # R-Car V3H
53 - renesas,sdhi-r8a77990 # R-Car E353 - renesas,sdhi-r8a77990 # R-Car E3
54 - renesas,sdhi-r8a77995 # R-Car D354 - renesas,sdhi-r8a77995 # R-Car D3
55 - renesas,sdhi-r8a779md # R-Car M3Le
55 - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G256 - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
56 - items:57 - items:
57 - enum:58 - enum:
Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml+15−0
@@ -44,6 +44,18 @@ properties: · 43 unmodified lines
44 - const: axi44 - const: axi
45 - const: sdh45 - const: sdh
46 46
47 pinctrl-names:
48 minItems: 1
49 items:
50 - const: default
51 - const: uhs
52
53 pinctrl-0:
54 description: Default pinctrl state for 3.3V operation
55
56 pinctrl-1:
57 description: Optional pinctrl state for 1.8V UHS operation with "uhs" name
58
47required:59required:
48 - compatible60 - compatible
49 - reg61 - reg
@@ -62,4 +74,7 @@ examples: · 12 unmodified lines
62 interrupt-parent = <&plic>;74 interrupt-parent = <&plic>;
63 clocks = <&clk_apmu 10>, <&clk_apmu 13>;75 clocks = <&clk_apmu 10>, <&clk_apmu 13>;
64 clock-names = "core", "io";76 clock-names = "core", "io";
77 pinctrl-names = "default", "uhs";
78 pinctrl-0 = <&sdhci_default_cfg>;
79 pinctrl-1 = <&sdhci_uhs_cfg>;
65 };80 };
Documentation/devicetree/bindings/mtd/nand-chip.yaml+9−0
@@ -23,6 +23,15 @@ properties: · 22 unmodified lines
23 description:23 description:
24 Contains the chip-select IDs.24 Contains the chip-select IDs.
25 25
26 nand-randomizer:
27 description: |
28 Control the data randomizer feature.
29 0: Disable randomizer.
30 1: Enable randomizer.
31 If absent, the current hardware state is left unchanged.
32 $ref: /schemas/types.yaml#/definitions/uint32
33 enum: [0, 1]
34
26required:35required:
27 - reg36 - reg
28 37
Documentation/devicetree/bindings/net/airoha,an8801.yaml+120−0
@@ -0,0 +1,120 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/airoha,an8801.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Airoha AN8801R Series PHY
8
9maintainers:
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11
12description:
13 The Airoha AN8801R is a low power single-port Ethernet PHY Transceiver
14 with Single-port serdes interface for 1000Base-X/RGMII; this chip is
15 compliant with 10Base-T, 100Base-TX and 1000Base-T IEEE 802.3(u,ab)
16 and supports Energy Efficient Ethernet (802.3az), Full Duplex Control
17 Flow (802.3x), auto-negotiation, crossover detect and autocorrection,
18 Wake-on-LAN with Magic Packet, and Jumbo Frame up to 9 Kilobytes.
19 This PHY also supports up to three user-configurable LEDs, which are
20 usually used for LAN Activity, 100M, 1000M indication.
21
22allOf:
23 - $ref: ethernet-phy.yaml#
24
25properties:
26 compatible:
27 enum:
28 - ethernet-phy-idc0ff.0421
29
30 reg:
31 maxItems: 1
32
33 leds:
34 type: object
35 description:
36 Describes the LEDs associated to the PHY
37
38 properties:
39 "#address-cells":
40 const: 1
41
42 "#size-cells":
43 const: 0
44
45 patternProperties:
46 "^led@[0-2]$":
47 type: object
48 description: PHY LEDs
49 $ref: /schemas/leds/common.yaml#
50
51 properties:
52 reg:
53 enum: [0, 1, 2]
54
55 function-enumerator:
56 enum: [0, 1, 2]
57 description: |
58 Specifies a function for offloading LED functionality to the PHY:
59 0 - No offloading
60 1 - Link Availability
61 2 - Network Activity
62
63 required:
64 - reg
65
66 unevaluatedProperties: false
67
68 additionalProperties: false
69
70 wakeup-source:
71 $ref: /schemas/types.yaml#/definitions/flag
72 description:
73 Enable Wake-on-LAN support
74
75required:
76 - reg
77
78unevaluatedProperties: false
79
80examples:
81 - |
82 #include <dt-bindings/leds/common.h>
83
84 mdio {
85 #address-cells = <1>;
86 #size-cells = <0>;
87
88 ethernet-phy@0 {
89 compatible = "ethernet-phy-idc0ff.0421";
90 reg = <0>;
91
92 leds {
93 #address-cells = <1>;
94 #size-cells = <0>;
95
96 led@0 {
97 reg = <0>;
98 color = <LED_COLOR_ID_GREEN>;
99 function = LED_FUNCTION_LAN;
100 default-state = "keep";
101 };
102
103 led@1 {
104 reg = <1>;
105 color = <LED_COLOR_ID_GREEN>;
106 function = LED_FUNCTION_LAN;
107 function-enumerator = <1>;
108 default-state = "keep";
109 };
110
111 led@2 {
112 reg = <2>;
113 color = <LED_COLOR_ID_YELLOW>;
114 function = LED_FUNCTION_LAN;
115 function-enumerator = <2>;
116 default-state = "keep";
117 };
118 };
119 };
120 };
Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml+55−1
@@ -130,6 +130,42 @@ patternProperties: · 129 unmodified lines
130 maximum: 4130 maximum: 4
131 description: GMAC port identifier131 description: GMAC port identifier
132 132
133 allOf:
134 - if:
135 properties:
136 reg:
137 contains:
138 items:
139 - enum:
140 - 3
141 - 4
142 then:
143 properties:
144 '#address-cells':
145 const: 1
146
147 '#size-cells':
148 const: 0
149
150 patternProperties:
151 "^ethernet@[0-5]$":
152 type: object
153 unevaluatedProperties: false
154 $ref: ethernet-controller.yaml#
155 description: External ethernet port ID available on the GDM port
156
157 properties:
158 compatible:
159 const: airoha,eth-port
160
161 reg:
162 maximum: 5
163 description: External ethernet port identifier
164
165 required:
166 - reg
167 - compatible
168
133 required:169 required:
134 - reg170 - reg
135 - compatible171 - compatible
@@ -191,9 +227,27 @@ examples: · 55 unmodified lines
191 #address-cells = <1>;227 #address-cells = <1>;
192 #size-cells = <0>;228 #size-cells = <0>;
193 229
194 mac: ethernet@1 {230 ethernet@1 {
195 compatible = "airoha,eth-mac";231 compatible = "airoha,eth-mac";
196 reg = <1>;232 reg = <1>;
197 };233 };
234
235 ethernet@4 {
236 compatible = "airoha,eth-mac";
237 reg = <4>;
238
239 #address-cells = <1>;
240 #size-cells = <0>;
241
242 ethernet@0 {
243 compatible = "airoha,eth-port";
244 reg = <0>;
245 };
246
247 ethernet@1 {
248 compatible = "airoha,eth-port";
249 reg = <1>;
250 };
251 };
198 };252 };
199 };253 };
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml+2−5
@@ -50,9 +50,6 @@ properties: · 49 unmodified lines
50 description: VDD_RFA_1P7 supply regulator handle50 description: VDD_RFA_1P7 supply regulator handle
51 deprecated: true51 deprecated: true
52 52
53 vddrfa1p8-supply:
54 description: VDD_RFA_1P8 supply regulator handle
55
56 vddrfacmn-supply:53 vddrfacmn-supply:
57 description: VDD_RFA_CMN supply regulator handle54 description: VDD_RFA_CMN supply regulator handle
58 55
@@ -68,7 +65,7 @@ required: · 9 unmodified lines
68 - vddbtcmx-supply65 - vddbtcmx-supply
69 - vddrfa0p8-supply66 - vddrfa0p8-supply
70 - vddrfa1p2-supply67 - vddrfa1p2-supply
71 - vddrfa1p8-supply68 - vddrfa1p7-supply
72 - vddrfacmn-supply69 - vddrfacmn-supply
73 - vddwlcx-supply70 - vddwlcx-supply
74 - vddwlmx-supply71 - vddwlmx-supply
@@ -91,7 +88,7 @@ examples: · 16 unmodified lines
91 vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>;88 vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>;
92 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;89 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
93 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;90 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
94 vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;91 vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
95 vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;92 vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
96 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;93 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
97 vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;94 vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
Documentation/devicetree/bindings/net/dsa/dsa.txt+0−4
@@ -1,4 +0,0 @@
1Distributed Switch Architecture Device Tree Bindings
2----------------------------------------------------
3
4See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documentation.
Documentation/devicetree/bindings/net/dsa/dsa.yaml+5−1
@@ -28,7 +28,11 @@ properties: · 27 unmodified lines
28 A two element list indicates which DSA cluster, and position within the28 A two element list indicates which DSA cluster, and position within the
29 cluster a switch takes. <0 0> is cluster 0, switch 0. <0 1> is cluster 0,29 cluster a switch takes. <0 0> is cluster 0, switch 0. <0 1> is cluster 0,
30 switch 1. <1 0> is cluster 1, switch 0. A switch not part of any cluster30 switch 1. <1 0> is cluster 1, switch 0. A switch not part of any cluster
31 (single device hanging off a CPU port) must not specify this property31 (single device hanging off a CPU port) does not usually need to specify
32 this property, and then it becomes cluster 0, switch 0. For a topology
33 aware switch, its switch index can be specified through this property,
34 even if it is not part of any cluster. Also, topology-unaware switches
35 must always be defined as index 0 of their cluster.
32 $ref: /schemas/types.yaml#/definitions/uint32-array36 $ref: /schemas/types.yaml#/definitions/uint32-array
33 37
34additionalProperties: true38additionalProperties: true
Documentation/devicetree/bindings/net/dsa/lan9303.txt+0−100
@@ -1,100 +0,0 @@
1SMSC/MicroChip LAN9303 three port ethernet switch
2-------------------------------------------------
3
4Required properties:
5
6- compatible: should be
7 - "smsc,lan9303-i2c" for I2C managed mode
8 or
9 - "smsc,lan9303-mdio" for mdio managed mode
10
11Optional properties:
12
13- reset-gpios: GPIO to be used to reset the whole device
14- reset-duration: reset duration in milliseconds, defaults to 200 ms
15
16Subnodes:
17
18The integrated switch subnode should be specified according to the binding
19described in dsa/dsa.txt. The CPU port of this switch is always port 0.
20
21Note: always use 'reg = <0/1/2>;' for the three DSA ports, even if the device is
22configured to use 1/2/3 instead. This hardware configuration will be
23auto-detected and mapped accordingly.
24
25Example:
26
27I2C managed mode:
28
29 master: masterdevice@X {
30
31 fixed-link { /* RMII fixed link to LAN9303 */
32 speed = <100>;
33 full-duplex;
34 };
35 };
36
37 switch: switch@a {
38 compatible = "smsc,lan9303-i2c";
39 reg = <0xa>;
40 reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
41 reset-duration = <200>;
42
43 ports {
44 #address-cells = <1>;
45 #size-cells = <0>;
46
47 port@0 { /* RMII fixed link to master */
48 reg = <0>;
49 ethernet = <&master>;
50 };
51
52 port@1 { /* external port 1 */
53 reg = <1>;
54 label = "lan1";
55 };
56
57 port@2 { /* external port 2 */
58 reg = <2>;
59 label = "lan2";
60 };
61 };
62 };
63
64MDIO managed mode:
65
66 master: masterdevice@X {
67 phy-handle = <&switch>;
68
69 mdio {
70 #address-cells = <1>;
71 #size-cells = <0>;
72
73 switch: switch-phy@0 {
74 compatible = "smsc,lan9303-mdio";
75 reg = <0>;
76 reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
77 reset-duration = <100>;
78
79 ports {
80 #address-cells = <1>;
81 #size-cells = <0>;
82
83 port@0 {
84 reg = <0>;
85 ethernet = <&master>;
86 };
87
88 port@1 { /* external port 1 */
89 reg = <1>;
90 label = "lan1";
91 };
92
93 port@2 { /* external port 2 */
94 reg = <2>;
95 label = "lan2";
96 };
97 };
98 };
99 };
100 };
Documentation/devicetree/bindings/net/dsa/nxp,netc-switch.yaml+131−0
@@ -0,0 +1,131 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/nxp,netc-switch.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NETC Switch family
8
9description: >
10 The NETC presents itself as a multi-function PCIe Root Complex Integrated
11 Endpoint (RCiEP) and provides full 802.1Q Ethernet switch functionality,
12 advanced QoS with 8 traffic classes and 4 drop resilience levels, and a
13 full range of TSN standards capabilities.
14
15 The CPU port of the switch connects to an internal ENETC. The switch and
16 the internal ENETC are fully integrated into the NETC IP, a back-to-back
17 MAC is not required. Instead, a light-weight "pseudo MAC" provides the
18 delineation between the switch and ENETC. This translates to lower power
19 (less logic and memory) and lower delay (as there is no serialization
20 delay across this link).
21
22maintainers:
23 - Wei Fang <wei.fang@nxp.com>
24
25properties:
26 compatible:
27 enum:
28 - pci1131,eef2
29
30 reg:
31 maxItems: 1
32
33 dsa,member:
34 description: >
35 The property indicates DSA cluster and switch index. For NETC switch,
36 the valid range of the switch index is 1 ~ 7, the index is reflected
37 in the switch tag as an indication of the switch ID where the frame
38 originated. The value 0 is reserved for ENETC VEPA switch, whose ID
39 is hardwired to zero.
40 items:
41 - true
42 - minimum: 1
43 maximum: 7
44
45 ethernet-ports:
46 type: object
47 patternProperties:
48 "^ethernet-port@[0-9a-f]$":
49 type: object
50 $ref: dsa-port.yaml#
51
52 properties:
53 clocks:
54 items:
55 - description: MAC transmit/receive reference clock.
56
57 clock-names:
58 items:
59 - const: ref
60
61 mdio:
62 $ref: /schemas/net/mdio.yaml#
63 unevaluatedProperties: false
64 description:
65 Optional child node for switch port, otherwise use NETC EMDIO.
66
67 unevaluatedProperties: false
68
69required:
70 - compatible
71 - reg
72 - dsa,member
73 - ethernet-ports
74
75allOf:
76 - $ref: /schemas/pci/pci-device.yaml
77 - $ref: dsa.yaml#
78
79unevaluatedProperties: false
80
81examples:
82 - |
83 pcie {
84 #address-cells = <3>;
85 #size-cells = <2>;
86
87 ethernet-switch@0,2 {
88 compatible = "pci1131,eef2";
89 reg = <0x200 0 0 0 0>;
90 dsa,member = <0 1>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_switch>;
93
94 ethernet-ports {
95 #address-cells = <1>;
96 #size-cells = <0>;
97
98 ethernet-port@0 {
99 reg = <0>;
100 phy-handle = <&ethphy0>;
101 phy-mode = "mii";
102 };
103
104 ethernet-port@1 {
105 reg = <1>;
106 phy-handle = <&ethphy1>;
107 phy-mode = "mii";
108 };
109
110 ethernet-port@2 {
111 reg = <2>;
112 clocks = <&scmi_clk 103>;
113 clock-names = "ref";
114 phy-handle = <&ethphy2>;
115 phy-mode = "rgmii-id";
116 };
117
118 ethernet-port@3 {
119 reg = <3>;
120 ethernet = <&enetc3>;
121 phy-mode = "internal";
122
123 fixed-link {
124 speed = <2500>;
125 full-duplex;
126 pause;
127 };
128 };
129 };
130 };
131 };
Documentation/devicetree/bindings/net/dsa/smsc,lan9303.yaml+123−0
@@ -0,0 +1,123 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/smsc,lan9303.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: SMSC/MicroChip LAN9303 three port ethernet switch
8
9maintainers:
10 - Frank Li <Frank.Li@nxp.com>
11
12description:
13 The LAN9303 is a three port ethernet switch with integrated PHYs for the
14 two external ports. The third port is an RMII/MII interface to a host
15 processor. The device can be managed via I2C or MDIO.
16
17 Note - always use 'reg = <0/1/2>;' for the three DSA ports, even if the
18 device is configured to use 1/2/3 instead. This hardware configuration
19 will be auto-detected and mapped accordingly.
20
21properties:
22 compatible:
23 enum:
24 - smsc,lan9303-i2c
25 - smsc,lan9303-mdio
26
27 reg:
28 maxItems: 1
29
30 reset-gpios:
31 description:
32 GPIO to be used to reset the whole device
33 maxItems: 1
34
35 reset-duration:
36 description:
37 Reset duration in milliseconds
38 default: 200
39 $ref: /schemas/types.yaml#/definitions/uint32
40
41required:
42 - compatible
43 - reg
44
45unevaluatedProperties: false
46
47allOf:
48 - $ref: dsa.yaml#
49
50examples:
51 - |
52 #include <dt-bindings/gpio/gpio.h>
53
54 /* I2C managed mode */
55 i2c {
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 switch@a {
60 compatible = "smsc,lan9303-i2c";
61 reg = <0xa>;
62 reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
63 reset-duration = <200>;
64
65 ports {
66 #address-cells = <1>;
67 #size-cells = <0>;
68
69 port@0 {
70 reg = <0>;
71 label = "cpu";
72 ethernet = <&master>;
73 };
74
75 port@1 {
76 reg = <1>;
77 label = "lan1";
78 };
79
80 port@2 {
81 reg = <2>;
82 label = "lan2";
83 };
84 };
85 };
86 };
87
88 - |
89 #include <dt-bindings/gpio/gpio.h>
90
91 /* MDIO managed mode */
92 mdio {
93 #address-cells = <1>;
94 #size-cells = <0>;
95
96 switch@0 {
97 compatible = "smsc,lan9303-mdio";
98 reg = <0>;
99 reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
100 reset-duration = <100>;
101
102 ports {
103 #address-cells = <1>;
104 #size-cells = <0>;
105
106 port@0 {
107 reg = <0>;
108 label = "cpu";
109 ethernet = <&master>;
110 };
111
112 port@1 {
113 reg = <1>;
114 label = "lan1";
115 };
116
117 port@2 {
118 reg = <2>;
119 label = "lan2";
120 };
121 };
122 };
123 };
Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml+14−2
@@ -73,15 +73,27 @@ properties: · 72 unmodified lines
73 HSP CSR is to control and get status of different high-speed peripherals73 HSP CSR is to control and get status of different high-speed peripherals
74 (such as Ethernet, USB, SATA, etc.) via register, which can tune74 (such as Ethernet, USB, SATA, etc.) via register, which can tune
75 board-level's parameters of PHY, etc.75 board-level's parameters of PHY, etc.
76
77 Additional background information about the High-Speed Subsystem
78 and the HSP CSR block is available in Chapter 10 ("High-Speed Interface")
79 of the EIC7700X SoC Technical Reference Manual, Part 4
80 (EIC7700X_SoC_Technical_Reference_Manual_Part4.pdf). The manual is
81 publicly available at
82 https://github.com/eswincomputing/EIC7700X-SoC-Technical-Reference-Manual/releases
83
84 This reference is provided for background information only.
76 $ref: /schemas/types.yaml#/definitions/phandle-array85 $ref: /schemas/types.yaml#/definitions/phandle-array
77 items:86 items:
78 - items:87 - minItems: 4
88 items:
79 - description: Phandle to HSP(High-Speed Peripheral) device89 - description: Phandle to HSP(High-Speed Peripheral) device
80 - description: Offset of phy control register for internal90 - description: Offset of phy control register for internal
81 or external clock selection91 or external clock selection
82 - description: Offset of AXI clock controller Low-Power request92 - description: Offset of AXI clock controller Low-Power request
83 register93 register
84 - description: Offset of register controlling TX/RX clock delay94 - description: Offset of register controlling TX/RX clock delay
95 - description: Optional offset of register controlling TXD delay
96 - description: Optional offset of register controlling RXD delay
85 97
86required:98required:
87 - compatible99 - compatible
@@ -116,7 +128,7 @@ examples: · 28 unmodified lines
116 reset-names = "stmmaceth";128 reset-names = "stmmaceth";
117 rx-internal-delay-ps = <200>;129 rx-internal-delay-ps = <200>;
118 tx-internal-delay-ps = <200>;130 tx-internal-delay-ps = <200>;
119 eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118>;131 eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118 0x114 0x11c>;
120 snps,axi-config = <&stmmac_axi_setup>;132 snps,axi-config = <&stmmac_axi_setup>;
121 snps,aal;133 snps,aal;
122 snps,fixed-burst;134 snps,fixed-burst;
Documentation/devicetree/bindings/net/ethernet-phy.yaml+6−3
@@ -106,10 +106,13 @@ properties: · 105 unmodified lines
106 by software.106 by software.
107 107
108 clocks:108 clocks:
109 maxItems: 1109 minItems: 1
110 maxItems: 2
110 description:111 description:
111 External clock connected to the PHY. If not specified it is assumed112 External clock connected to the PHY or RX and TX clocks that the PHY
112 that the PHY uses a fixed crystal or an internal oscillator.113 requires to enable explicitly. If not specified it is assumed
114 that the PHY uses a fixed crystal or an internal oscillator or that the
115 RX/TX clocks are hardware enabled by default.
113 116
114 enet-phy-lane-swap:117 enet-phy-lane-swap:
115 $ref: /schemas/types.yaml#/definitions/flag118 $ref: /schemas/types.yaml#/definitions/flag
Documentation/devicetree/bindings/net/mdio.txt+0−1
@@ -1 +0,0 @@
1This file has moved to mdio.yaml.
Documentation/devicetree/bindings/net/mediatek,net.yaml+1−2
@@ -67,8 +67,7 @@ properties: · 66 unmodified lines
67 - const: ppe67 - const: ppe
68 68
69 sram:69 sram:
70 $ref: /schemas/types.yaml#/definitions/phandle70 maxItems: 1
71 description: phandle to mmio SRAM
72 71
73 mediatek,ethsys:72 mediatek,ethsys:
74 $ref: /schemas/types.yaml#/definitions/phandle73 $ref: /schemas/types.yaml#/definitions/phandle
Documentation/devicetree/bindings/net/microchip,lan8650.yaml+1−1
@@ -67,7 +67,7 @@ examples: · 66 unmodified lines
67 pinctrl-names = "default";67 pinctrl-names = "default";
68 pinctrl-0 = <&eth0_pins>;68 pinctrl-0 = <&eth0_pins>;
69 interrupt-parent = <&gpio>;69 interrupt-parent = <&gpio>;
70 interrupts = <6 IRQ_TYPE_EDGE_FALLING>;70 interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
71 local-mac-address = [04 05 06 01 02 03];71 local-mac-address = [04 05 06 01 02 03];
72 spi-max-frequency = <15000000>;72 spi-max-frequency = <15000000>;
73 };73 };
Documentation/devicetree/bindings/net/microchip,lan95xx.yaml+2−0
@@ -20,6 +20,8 @@ properties: · 19 unmodified lines
20 compatible:20 compatible:
21 items:21 items:
22 - enum:22 - enum:
23 - usb424,7500 # SMSC LAN7500 USB Ethernet Device
24 - usb424,7505 # SMSC LAN7505 USB Ethernet Device
23 - usb424,9500 # SMSC9500 USB Ethernet Device25 - usb424,9500 # SMSC9500 USB Ethernet Device
24 - usb424,9505 # SMSC9505 USB Ethernet Device26 - usb424,9505 # SMSC9505 USB Ethernet Device
25 - usb424,9530 # SMSC LAN9530 USB Ethernet Device27 - usb424,9530 # SMSC LAN9530 USB Ethernet Device
Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml+5−5
@@ -17,7 +17,7 @@ description: | · 16 unmodified lines
17 17
18properties:18properties:
19 $nodename:19 $nodename:
20 pattern: "^switch@[0-9a-f]+$"20 pattern: "^(ethernet-)?switch@[0-9a-f]+$"
21 21
22 compatible:22 compatible:
23 const: microchip,lan966x-switch23 const: microchip,lan966x-switch
@@ -70,7 +70,7 @@ properties: · 46 unmodified lines
70 additionalProperties: false70 additionalProperties: false
71 71
72 patternProperties:72 patternProperties:
73 "^port@[0-9a-f]+$":73 "^(ethernet-)?port@[0-9a-f]+$":
74 type: object74 type: object
75 75
76 $ref: /schemas/net/ethernet-controller.yaml#76 $ref: /schemas/net/ethernet-controller.yaml#
@@ -138,7 +138,7 @@ additionalProperties: false · 61 unmodified lines
138examples:138examples:
139 - |139 - |
140 #include <dt-bindings/interrupt-controller/arm-gic.h>140 #include <dt-bindings/interrupt-controller/arm-gic.h>
141 switch: switch@e0000000 {141 switch: ethernet-switch@e0000000 {
142 compatible = "microchip,lan966x-switch";142 compatible = "microchip,lan966x-switch";
143 reg = <0xe0000000 0x0100000>,143 reg = <0xe0000000 0x0100000>,
144 <0xe2000000 0x0800000>;144 <0xe2000000 0x0800000>;
@@ -151,14 +151,14 @@ examples: · 6 unmodified lines
151 #address-cells = <1>;151 #address-cells = <1>;
152 #size-cells = <0>;152 #size-cells = <0>;
153 153
154 port0: port@0 {154 port0: ethernet-port@0 {
155 reg = <0>;155 reg = <0>;
156 phy-handle = <&phy0>;156 phy-handle = <&phy0>;
157 phys = <&serdes 0 0>;157 phys = <&serdes 0 0>;
158 phy-mode = "gmii";158 phy-mode = "gmii";
159 };159 };
160 160
161 port1: port@1 {161 port1: ethernet-port@1 {
162 reg = <1>;162 reg = <1>;
163 sfp = <&sfp_eth1>;163 sfp = <&sfp_eth1>;
164 managed = "in-band-status";164 managed = "in-band-status";
Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml+4−0
@@ -22,6 +22,10 @@ properties: · 21 unmodified lines
22 reg:22 reg:
23 maxItems: 123 maxItems: 1
24 24
25 disable-ports-gpios:
26 description: GPIO pin to disable PoE on all ports
27 maxItems: 1
28
25 vdd-supply:29 vdd-supply:
26 description: Regulator that provides 3.3V VDD power supply.30 description: Regulator that provides 3.3V VDD power supply.
27 31
Documentation/devicetree/bindings/net/qca,ar803x.yaml+19−0
@@ -28,6 +28,16 @@ allOf: · 27 unmodified lines
28 reg:28 reg:
29 const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC29 const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC
30 30
31 clocks:
32 items:
33 - description: RX clock
34 - description: TX clock
35
36 clock-names:
37 items:
38 - const: rx
39 - const: tx
40
31 resets:41 resets:
32 items:42 items:
33 - description:43 - description:
@@ -42,6 +52,11 @@ allOf: · 8 unmodified lines
42 of this PHY are directly connected to an RJ45 connector.52 of this PHY are directly connected to an RJ45 connector.
43 type: boolean53 type: boolean
44 54
55 required:
56 - clocks
57 - clock-names
58 - resets
59
45properties:60properties:
46 compatible:61 compatible:
47 enum:62 enum:
@@ -162,6 +177,7 @@ examples: · 114 unmodified lines
162 };177 };
163 };178 };
164 - |179 - |
180 #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
165 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>181 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
166 182
167 mdio {183 mdio {
@@ -172,6 +188,9 @@ examples: · 4 unmodified lines
172 compatible = "ethernet-phy-id004d.d0c0";188 compatible = "ethernet-phy-id004d.d0c0";
173 reg = <7>;189 reg = <7>;
174 190
191 clocks = <&gcc GCC_GEPHY_RX_CLK>,
192 <&gcc GCC_GEPHY_TX_CLK>;
193 clock-names = "rx", "tx";
175 resets = <&gcc GCC_GEPHY_MISC_ARES>;194 resets = <&gcc GCC_GEPHY_MISC_ARES>;
176 };195 };
177 };196 };
Documentation/devicetree/bindings/net/qcom,bam-dmux.yaml+12−0
@@ -42,7 +42,19 @@ properties: · 41 unmodified lines
42 description: State bits used by the AP to signal the modem.42 description: State bits used by the AP to signal the modem.
43 items:43 items:
44 - description: Power control44 - description: Power control
45 items:
46 - description: Phandle to the Shared Memory Point 2 Point device
47 handling the communication with a remote processor
48 - description: Single bit index to toggle in the value sent to
49 the remote processor
50 maximum: 32
45 - description: Power control acknowledgment51 - description: Power control acknowledgment
52 items:
53 - description: Phandle to the Shared Memory Point 2 Point device
54 handling the communication with a remote processor
55 - description: Single bit index to toggle in the value sent to
56 the remote processor
57 maximum: 32
46 58
47 qcom,smem-state-names:59 qcom,smem-state-names:
48 description: Names for the state bits used by the AP to signal the modem.60 description: Names for the state bits used by the AP to signal the modem.
Documentation/devicetree/bindings/net/qcom,ipa.yaml+12−0
@@ -128,7 +128,19 @@ properties: · 127 unmodified lines
128 description: State bits used in by the AP to signal the modem.128 description: State bits used in by the AP to signal the modem.
129 items:129 items:
130 - description: Whether the "ipa-clock-enabled" state bit is valid130 - description: Whether the "ipa-clock-enabled" state bit is valid
131 items:
132 - description: Phandle to the Shared Memory Point 2 Point device
133 handling the communication with a remote processor
134 - description: Single bit index to toggle in the value sent to
135 the remote processor
136 maximum: 32
131 - description: Whether the IPA clock is enabled (if valid)137 - description: Whether the IPA clock is enabled (if valid)
138 items:
139 - description: Phandle to the Shared Memory Point 2 Point device
140 handling the communication with a remote processor
141 - description: Single bit index to toggle in the value sent to
142 the remote processor
143 maximum: 32
132 144
133 qcom,smem-state-names:145 qcom,smem-state-names:
134 description: The names of the state bits used for SMP2P output146 description: The names of the state bits used for SMP2P output
Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: Qualcomm IPQ packet process engine (PPE)7title: Qualcomm IPQ packet process engine (PPE)
8 8
9maintainers:9maintainers:
10 - Luo Jie <quic_luoj@quicinc.com>10 - Luo Jie <jie.luo@oss.qualcomm.com>
11 - Lei Wei <quic_leiwei@quicinc.com>11 - Lei Wei <quic_leiwei@quicinc.com>
12 - Suruchi Agarwal <quic_suruchia@quicinc.com>12 - Suruchi Agarwal <quic_suruchia@quicinc.com>
13 - Pavithra R <quic_pavir@quicinc.com>13 - Pavithra R <quic_pavir@quicinc.com>
Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml+8−1
@@ -18,7 +18,14 @@ properties: · 17 unmodified lines
18 - realtek,rtl9302c-mdio18 - realtek,rtl9302c-mdio
19 - realtek,rtl9303-mdio19 - realtek,rtl9303-mdio
20 - const: realtek,rtl9301-mdio20 - const: realtek,rtl9301-mdio
21 - const: realtek,rtl9301-mdio21 - items:
22 - enum:
23 - realtek,rtl9312-mdio
24 - realtek,rtl9313-mdio
25 - const: realtek,rtl9311-mdio
26 - enum:
27 - realtek,rtl9301-mdio
28 - realtek,rtl9311-mdio
22 29
23 '#address-cells':30 '#address-cells':
24 const: 131 const: 1
Documentation/devicetree/bindings/net/renesas,ether.yaml+1−2
@@ -121,8 +121,7 @@ examples: · 120 unmodified lines
121 #size-cells = <0>;121 #size-cells = <0>;
122 122
123 phy1: ethernet-phy@1 {123 phy1: ethernet-phy@1 {
124 compatible = "ethernet-phy-id0022.1537",124 compatible = "ethernet-phy-id0022.1537";
125 "ethernet-phy-ieee802.3-c22";
126 reg = <1>;125 reg = <1>;
127 interrupt-parent = <&irqc0>;126 interrupt-parent = <&irqc0>;
128 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;127 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml+20−11
@@ -31,7 +31,7 @@ properties: · 30 unmodified lines
31 - const: starfive,jh7110-dwmac31 - const: starfive,jh7110-dwmac
32 - const: snps,dwmac-5.2032 - const: snps,dwmac-5.20
33 - items:33 - items:
34 - const: starfive,jh8100-dwmac34 - const: starfive,jhb100-dwmac
35 - const: starfive,jh7110-dwmac35 - const: starfive,jh7110-dwmac
36 - const: snps,dwmac-5.2036 - const: snps,dwmac-5.20
37 37
@@ -39,20 +39,24 @@ properties: · 1 unmodified line
39 maxItems: 139 maxItems: 1
40 40
41 clocks:41 clocks:
42 minItems: 5
42 items:43 items:
43 - description: GMAC main clock44 - description: GMAC main clock
44 - description: GMAC AHB clock45 - description: GMAC AHB clock
45 - description: PTP clock46 - description: PTP clock
46 - description: TX clock47 - description: TX clock
47 - description: GTX clock48 - description: GTX clock
49 - description: SGMII RX clock
48 50
49 clock-names:51 clock-names:
52 minItems: 5
50 items:53 items:
51 - const: stmmaceth54 - const: stmmaceth
52 - const: pclk55 - const: pclk
53 - const: ptp_ref56 - const: ptp_ref
54 - const: tx57 - const: tx
55 - const: gtx58 - const: gtx
59 - const: sgmii_rx
56 60
57 starfive,tx-use-rgmii-clk:61 starfive,tx-use-rgmii-clk:
58 description:62 description:
@@ -111,22 +115,19 @@ allOf: · 52 unmodified lines
111 contains:115 contains:
112 const: starfive,jh7110-dwmac116 const: starfive,jh7110-dwmac
113 then:117 then:
114 properties:
115 interrupts:
116 minItems: 3
117 maxItems: 3
118
119 interrupt-names:
120 minItems: 3
121 maxItems: 3
122
123 if:118 if:
124 properties:119 properties:
125 compatible:120 compatible:
126 contains:121 contains:
127 const: starfive,jh8100-dwmac122 const: starfive,jhb100-dwmac
128 then:123 then:
129 properties:124 properties:
125 interrupts:
126 maxItems: 1
127
128 interrupt-names:
129 const: macirq
130
130 resets:131 resets:
131 maxItems: 1132 maxItems: 1
132 133
@@ -134,6 +135,14 @@ allOf: · 1 unmodified line
134 const: stmmaceth135 const: stmmaceth
135 else:136 else:
136 properties:137 properties:
138 interrupts:
139 minItems: 3
140 maxItems: 3
141
142 interrupt-names:
143 minItems: 3
144 maxItems: 3
145
137 resets:146 resets:
138 minItems: 2147 minItems: 2
139 148
Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml+1−1
@@ -21,7 +21,7 @@ properties: · 20 unmodified lines
21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.021 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
22 22
23 sram:23 sram:
24 $ref: /schemas/types.yaml#/definitions/phandle24 maxItems: 1
25 description:25 description:
26 phandle to MSMC SRAM node26 phandle to MSMC SRAM node
27 27
Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml+1−1
@@ -24,7 +24,7 @@ properties: · 23 unmodified lines
24 - ti,am3359-prueth # for AM33x SoC family24 - ti,am3359-prueth # for AM33x SoC family
25 25
26 sram:26 sram:
27 $ref: /schemas/types.yaml#/definitions/phandle27 maxItems: 1
28 description:28 description:
29 phandle to OCMC SRAM node29 phandle to OCMC SRAM node
30 30
Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml+7−1
@@ -158,7 +158,13 @@ properties: · 157 unmodified lines
158 description: State bits used by the AP to signal the WLAN Q6.158 description: State bits used by the AP to signal the WLAN Q6.
159 items:159 items:
160 - description: Signal bits used to enable/disable low power mode160 - description: Signal bits used to enable/disable low power mode
161 on WCN in the case of WoW (Wake on Wireless).161 on WCN in the case of WoW (Wake on Wireless).
162 items:
163 - description: Phandle to the Shared Memory Point 2 Point device
164 handling the communication with a remote processor
165 - description: Single bit index to toggle in the value sent to
166 the remote processor
167 maximum: 32
162 168
163 qcom,smem-state-names:169 qcom,smem-state-names:
164 description: The names of the state bits used for SMP2P output.170 description: The names of the state bits used for SMP2P output.
Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml+7−1
@@ -80,7 +80,13 @@ properties: · 79 unmodified lines
80 description: State bits used by the AP to signal the WLAN Q6.80 description: State bits used by the AP to signal the WLAN Q6.
81 items:81 items:
82 - description: Signal bits used to enable/disable low power mode82 - description: Signal bits used to enable/disable low power mode
83 on WCN6750 in the case of WoW (Wake on Wireless).83 on WCN6750 in the case of WoW (Wake on Wireless).
84 items:
85 - description: Phandle to the Shared Memory Point 2 Point device
86 handling the communication with a remote processor
87 - description: Single bit index to toggle in the value sent to
88 the remote processor
89 maximum: 32
84 90
85 qcom,smem-state-names:91 qcom,smem-state-names:
86 description: The names of the state bits used for SMP2P output.92 description: The names of the state bits used for SMP2P output.
Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml+18−0
@@ -168,8 +168,26 @@ properties: · 167 unmodified lines
168 description: States used by the AP to signal the remote processor168 description: States used by the AP to signal the remote processor
169 items:169 items:
170 - description: Shutdown WCSS pd170 - description: Shutdown WCSS pd
171 items:
172 - description: Phandle to the Shared Memory Point 2 Point device
173 handling the communication with a remote processor
174 - description: Single bit index to toggle in the value sent to
175 the remote processor
176 maximum: 32
171 - description: Stop WCSS pd177 - description: Stop WCSS pd
178 items:
179 - description: Phandle to the Shared Memory Point 2 Point device
180 handling the communication with a remote processor
181 - description: Single bit index to toggle in the value sent to
182 the remote processor
183 maximum: 32
172 - description: Spawn WCSS pd184 - description: Spawn WCSS pd
185 items:
186 - description: Phandle to the Shared Memory Point 2 Point device
187 handling the communication with a remote processor
188 - description: Single bit index to toggle in the value sent to
189 the remote processor
190 maximum: 32
173 191
174 qcom,smem-state-names:192 qcom,smem-state-names:
175 description:193 description:
Documentation/devicetree/bindings/net/wireless/st,stlc4560.yaml+61−0
@@ -0,0 +1,61 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/wireless/st,stlc4560.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ST/Intersil/Conexant stlc45xx/p54spi/cx3110x SPI wireless device
8
9maintainers:
10 - Christian Lamparter <chunkeey@gmail.com>
11
12description:
13 The SPI variant of the Intersil Prism54 wireless device was sold
14 under a variety of names, including Conexant CX3110x and
15 ST Microelectronics STLC5460.
16
17allOf:
18 - $ref: ieee80211.yaml#
19 - $ref: /schemas/spi/spi-peripheral-props.yaml#
20
21properties:
22 compatible:
23 oneOf:
24 - const: st,stlc4560
25 - items:
26 - enum:
27 - cnxt,3110x
28 - isil,p54spi
29 - st,stlc4550
30 - const: st,stlc4560
31
32 reg:
33 maxItems: 1
34
35 interrupts:
36 maxItems: 1
37
38 powerdown-gpios:
39 maxItems: 1
40
41required:
42 - compatible
43 - reg
44 - interrupts
45
46unevaluatedProperties: false
47
48examples:
49 - |
50 spi {
51 #address-cells = <1>;
52 #size-cells = <0>;
53
54 wifi@0 {
55 compatible = "st,stlc4560";
56 reg = <0>;
57 spi-max-frequency = <48000000>;
58 interrupts-extended = <&gpio 23>;
59 powerdown-gpios = <&gpio 1>;
60 };
61 };
Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml+2−0
@@ -16,6 +16,8 @@ properties: · 15 unmodified lines
16 $ref: /schemas/types.yaml#/definitions/phandle-array16 $ref: /schemas/types.yaml#/definitions/phandle-array
17 description:17 description:
18 List of phandle to the nvmem providers.18 List of phandle to the nvmem providers.
19 items:
20 maxItems: 1
19 21
20 nvmem-cells:22 nvmem-cells:
21 $ref: /schemas/types.yaml#/definitions/phandle-array23 $ref: /schemas/types.yaml#/definitions/phandle-array
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml+32−0
@@ -66,16 +66,34 @@ properties: · 65 unmodified lines
66 - const: dma66 - const: dma
67 67
68 reset-gpio:68 reset-gpio:
69 deprecated: true
69 description: Should specify the GPIO for controlling the PCI bus device70 description: Should specify the GPIO for controlling the PCI bus device
70 reset signal. It's not polarity aware and defaults to active-low reset71 reset signal. It's not polarity aware and defaults to active-low reset
71 sequence (L=reset state, H=operation state) (optional required).72 sequence (L=reset state, H=operation state) (optional required).
73 This property is deprecated, instead of referencing this property from the
74 host bridge node, use the reset-gpios property from the root port node.
72 75
73 reset-gpio-active-high:76 reset-gpio-active-high:
77 deprecated: true
74 description: If present then the reset sequence using the GPIO78 description: If present then the reset sequence using the GPIO
75 specified in the "reset-gpio" property is reversed (H=reset state,79 specified in the "reset-gpio" property is reversed (H=reset state,
76 L=operation state) (optional required).80 L=operation state) (optional required).
81 This property is deprecated along with the reset-gpio property above, use
82 the reset-gpios property from the root port node.
77 type: boolean83 type: boolean
78 84
85 pcie@0:
86 description:
87 Describe the i.MX6 PCIe Root Port.
88 type: object
89 $ref: /schemas/pci/pci-pci-bridge.yaml#
90
91 properties:
92 reg:
93 maxItems: 1
94
95 unevaluatedProperties: false
96
79required:97required:
80 - compatible98 - compatible
81 - reg99 - reg
@@ -236,6 +254,7 @@ unevaluatedProperties: false · 154 unmodified lines
236examples:254examples:
237 - |255 - |
238 #include <dt-bindings/clock/imx6qdl-clock.h>256 #include <dt-bindings/clock/imx6qdl-clock.h>
257 #include <dt-bindings/gpio/gpio.h>
239 #include <dt-bindings/interrupt-controller/arm-gic.h>258 #include <dt-bindings/interrupt-controller/arm-gic.h>
240 259
241 pcie: pcie@1ffc000 {260 pcie: pcie@1ffc000 {
@@ -262,5 +281,18 @@ examples: · 20 unmodified lines
262 <&clks IMX6QDL_CLK_LVDS1_GATE>,281 <&clks IMX6QDL_CLK_LVDS1_GATE>,
263 <&clks IMX6QDL_CLK_PCIE_REF_125M>;282 <&clks IMX6QDL_CLK_PCIE_REF_125M>;
264 clock-names = "pcie", "pcie_bus", "pcie_phy";283 clock-names = "pcie", "pcie_bus", "pcie_phy";
284
285 pcie_port0: pcie@0 {
286 compatible = "pciclass,0604";
287 device_type = "pci";
288 reg = <0x0 0x0 0x0 0x0 0x0>;
289 bus-range = <0x01 0xff>;
290
291 #address-cells = <3>;
292 #size-cells = <2>;
293 ranges;
294
295 reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
296 };
265 };297 };
266...298...
Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml+7−2
@@ -27,16 +27,20 @@ properties: · 26 unmodified lines
27 - const: snps,dw-pcie27 - const: snps,dw-pcie
28 28
29 reg:29 reg:
30 minItems: 3
30 items:31 items:
31 - description: Controller control and status registers.32 - description: Controller control and status registers.
32 - description: PCIe configuration registers.33 - description: PCIe configuration registers.
33 - description: Controller application registers.34 - description: Controller application registers.
35 - description: Internal Address Translation Unit (iATU) registers.
34 36
35 reg-names:37 reg-names:
38 minItems: 3
36 items:39 items:
37 - const: dbi40 - const: dbi
38 - const: config41 - const: config
39 - const: app42 - const: app
43 - const: atu
40 44
41 ranges:45 ranges:
42 maxItems: 146 maxItems: 1
@@ -95,8 +99,9 @@ examples: · 52 unmodified lines
95 #size-cells = <2>;99 #size-cells = <2>;
96 reg = <0xd0e00000 0x1000>,100 reg = <0xd0e00000 0x1000>,
97 <0xd2000000 0x800000>,101 <0xd2000000 0x800000>,
98 <0xd0a41000 0x1000>;102 <0xd0a41000 0x1000>,
99 reg-names = "dbi", "config", "app";103 <0xd0ec0000 0x1000>;
104 reg-names = "dbi", "config", "app", "atu";
100 linux,pci-domain = <0>;105 linux,pci-domain = <0>;
101 max-link-speed = <4>;106 max-link-speed = <4>;
102 bus-range = <0x00 0x08>;107 bus-range = <0x00 0x08>;
Documentation/devicetree/bindings/pci/mediatek-pcie-mt7623.yaml+2−2
@@ -125,8 +125,8 @@ examples: · 124 unmodified lines
125 phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";125 phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
126 power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;126 power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
127 bus-range = <0x00 0xff>;127 bus-range = <0x00 0xff>;
128 ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000>, /* I/O space */128 ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000>, /* I/O space */
129 <0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* memory space */129 <0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* memory space */
130 130
131 pcie@0,0 {131 pcie@0,0 {
132 device_type = "pci";132 device_type = "pci";
Documentation/devicetree/bindings/pci/mediatek-pcie.yaml+26−0
@@ -14,6 +14,7 @@ properties: · 13 unmodified lines
14 oneOf:14 oneOf:
15 - enum:15 - enum:
16 - airoha,an7583-pcie16 - airoha,an7583-pcie
17 - econet,en7528-pcie
17 - mediatek,mt2712-pcie18 - mediatek,mt2712-pcie
18 - mediatek,mt7622-pcie19 - mediatek,mt7622-pcie
19 - mediatek,mt7629-pcie20 - mediatek,mt7629-pcie
@@ -226,6 +227,31 @@ allOf: · 206 unmodified lines
226 227
227 mediatek,pbus-csr: false228 mediatek,pbus-csr: false
228 229
230 - if:
231 properties:
232 compatible:
233 contains:
234 const: econet,en7528-pcie
235 then:
236 properties:
237 clocks:
238 maxItems: 1
239
240 clock-names:
241 maxItems: 1
242
243 resets: false
244
245 reset-names: false
246
247 power-domains: false
248
249 mediatek,pbus-csr: false
250
251 required:
252 - phys
253 - phy-names
254
229unevaluatedProperties: false255unevaluatedProperties: false
230 256
231examples:257examples:
Documentation/devicetree/bindings/pci/qcom,pcie-sm8550.yaml+50−0
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
20 - const: qcom,pcie-sm855020 - const: qcom,pcie-sm8550
21 - items:21 - items:
22 - enum:22 - enum:
23 - qcom,eliza-pcie
23 - qcom,kaanapali-pcie24 - qcom,kaanapali-pcie
24 - qcom,sar2130p-pcie25 - qcom,sar2130p-pcie
25 - qcom,pcie-sm865026 - qcom,pcie-sm8650
@@ -91,6 +92,55 @@ required: · 65 unmodified lines
91 92
92allOf:93allOf:
93 - $ref: qcom,pcie-common.yaml#94 - $ref: qcom,pcie-common.yaml#
95 - if:
96 properties:
97 compatible:
98 contains:
99 const: qcom,eliza-pcie
100 then:
101 properties:
102 reg:
103 minItems: 6
104 reg-names:
105 minItems: 6
106
107 - if:
108 properties:
109 compatible:
110 contains:
111 const: qcom,eliza-pcie
112 then:
113 properties:
114 clocks:
115 minItems: 8
116 maxItems: 8
117 clock-names:
118 minItems: 8
119 maxItems: 8
120
121 - if:
122 properties:
123 compatible:
124 contains:
125 const: qcom,eliza-pcie
126 then:
127 properties:
128 interrupts:
129 minItems: 9
130 interrupt-names:
131 minItems: 9
132
133 - if:
134 properties:
135 compatible:
136 contains:
137 const: qcom,eliza-pcie
138 then:
139 properties:
140 resets:
141 minItems: 2
142 reset-names:
143 minItems: 2
94 144
95unevaluatedProperties: false145unevaluatedProperties: false
96 146
Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml+15−8
@@ -4,21 +4,27 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/pci/renesas,r9a08g045-pcie.yaml#4$id: http://devicetree.org/schemas/pci/renesas,r9a08g045-pcie.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: Renesas RZ/G3S PCIe host controller7title: Renesas RZ/G3S PCIe host controller (and similar SoCs)
8 8
9maintainers:9maintainers:
10 - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>10 - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
11 11
12description:12description: |
13 Renesas RZ/G3{E,S} PCIe host controllers comply with PCIe13 PCIe host controller found in Renesas RZ/G3S and similar SoCs complies
14 Base Specification 4.0 and support up to 5 GT/s (Gen2) for RZ/G3S and14 with PCIe Base Specification 4.0 and supports different link speeds
15 up to 8 GT/s (Gen3) for RZ/G3E.15 depending on the SoC variant:
16 - Gen2 (5 GT/s): RZ/G3S
17 - Gen3 (8 GT/s): RZ/G3E, RZ/V2N
16 18
17properties:19properties:
18 compatible:20 compatible:
19 enum:21 oneOf:
20 - renesas,r9a08g045-pcie # RZ/G3S22 - enum:
21 - renesas,r9a09g047-pcie # RZ/G3E23 - renesas,r9a08g045-pcie # RZ/G3S
24 - renesas,r9a09g047-pcie # RZ/G3E
25 - items:
26 - const: renesas,r9a09g056-pcie # RZ/V2N
27 - const: renesas,r9a09g047-pcie
22 28
23 reg:29 reg:
24 maxItems: 130 maxItems: 1
@@ -152,6 +158,7 @@ patternProperties: · 127 unmodified lines
152 enum:158 enum:
153 - 0x0033159 - 0x0033
154 - 0x0039160 - 0x0039
161 - 0x003b
155 162
156 clocks:163 clocks:
157 items:164 items:
Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml+1−1
@@ -109,7 +109,7 @@ examples: · 108 unmodified lines
109 num-lanes = <1>;109 num-lanes = <1>;
110 num-viewport = <3>;110 num-viewport = <3>;
111 bus-range = <0x00 0xff>;111 bus-range = <0x00 0xff>;
112 ranges = <0x81000000 0 0 0x0c001000 0 0x00010000>,112 ranges = <0x81000000 0 0 0x0c001000 0 0x00010000>,
113 <0x82000000 0 0x0c011000 0x0c011000 0 0x03feefff>;113 <0x82000000 0 0x0c011000 0x0c011000 0 0x03feefff>;
114 vdd10-supply = <&ldo6_reg>;114 vdd10-supply = <&ldo6_reg>;
115 vdd18-supply = <&ldo7_reg>;115 vdd18-supply = <&ldo7_reg>;
Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml+3−0
@@ -30,6 +30,8 @@ properties: · 29 unmodified lines
30 device-id:30 device-id:
31 const: 0x204231 const: 0x2042
32 32
33 dma-coherent: true
34
33 msi-parent: true35 msi-parent: true
34 36
35allOf:37allOf:
@@ -60,5 +62,6 @@ examples: · 24 unmodified lines
60 vendor-id = <0x1f1c>;62 vendor-id = <0x1f1c>;
61 device-id = <0x2042>;63 device-id = <0x2042>;
62 cdns,no-bar-match-nbits = <48>;64 cdns,no-bar-match-nbits = <48>;
65 dma-coherent;
63 msi-parent = <&msi>;66 msi-parent = <&msi>;
64 };67 };
Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml+3−2
@@ -49,8 +49,9 @@ properties: · 48 unmodified lines
49 A phandle to the parent I2C node and the slave address of the device49 A phandle to the parent I2C node and the slave address of the device
50 used to configure tc9563 to change FTS, tx amplitude etc.50 used to configure tc9563 to change FTS, tx amplitude etc.
51 items:51 items:
52 - description: Phandle to the I2C controller node52 - items:
53 - description: I2C slave address53 - description: Phandle to the I2C controller node
54 - description: I2C slave address
54 55
55patternProperties:56patternProperties:
56 "^pcie@[1-3],0$":57 "^pcie@[1-3],0$":
Documentation/devicetree/bindings/pci/ultrarisc,dp1000-pcie.yaml+93−0
@@ -0,0 +1,93 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/ultrarisc,dp1000-pcie.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: UltraRISC DP1000 PCIe Host Controller
8
9description:
10 UltraRISC DP1000 SoC PCIe host controller is based on the DesignWare PCIe IP.
11
12maintainers:
13 - Xincheng Zhang <zhangxincheng@ultrarisc.com>
14 - Jia Wang <wangjia@ultrarisc.com>
15
16allOf:
17 - $ref: /schemas/pci/snps,dw-pcie.yaml#
18
19properties:
20 compatible:
21 const: ultrarisc,dp1000-pcie
22
23 reg:
24 items:
25 - description: Data Bus Interface (DBI) registers.
26 - description: PCIe configuration space region.
27
28 reg-names:
29 items:
30 - const: dbi
31 - const: config
32
33 num-lanes:
34 $ref: /schemas/types.yaml#/definitions/uint32
35 enum: [4, 16]
36 description: Number of lanes to use.
37
38 interrupts:
39 items:
40 - description: MSI interrupt
41 - description: Legacy INTA interrupt
42 - description: Legacy INTB interrupt
43 - description: Legacy INTC interrupt
44 - description: Legacy INTD interrupt
45
46 interrupt-names:
47 items:
48 - const: msi
49 - const: inta
50 - const: intb
51 - const: intc
52 - const: intd
53
54required:
55 - compatible
56 - reg
57 - reg-names
58 - interrupts
59 - interrupt-names
60
61unevaluatedProperties: false
62
63examples:
64 - |
65 soc {
66 #address-cells = <2>;
67 #size-cells = <2>;
68
69 pcie@21000000 {
70 compatible = "ultrarisc,dp1000-pcie";
71 reg = <0x0 0x21000000 0x0 0x01000000>,
72 <0x0 0x4fff0000 0x0 0x00010000>;
73 reg-names = "dbi", "config";
74 ranges = <0x81000000 0x0 0x4fbf0000 0x0 0x4fbf0000 0x0 0x00400000>,
75 <0x82000000 0x0 0x40000000 0x0 0x40000000 0x0 0x0fbf0000>,
76 <0xc3000000 0x40 0x00000000 0x40 0x00000000 0xd 0x00000000>;
77 #address-cells = <3>;
78 #size-cells = <2>;
79 #interrupt-cells = <1>;
80 device_type = "pci";
81 dma-coherent;
82 bus-range = <0x0 0xff>;
83 num-lanes = <16>;
84 interrupt-parent = <&plic>;
85 interrupts = <43>, <44>, <45>, <46>, <47>;
86 interrupt-names = "msi", "inta", "intb", "intc", "intd";
87 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
88 interrupt-map = <0x0 0x0 0x0 0x1 &plic 44>,
89 <0x0 0x0 0x0 0x2 &plic 45>,
90 <0x0 0x0 0x0 0x3 &plic 46>,
91 <0x0 0x0 0x0 0x4 &plic 47>;
92 };
93 };
Documentation/devicetree/bindings/phy/axiado,ax3000-emmc-phy.yaml+37−0
@@ -0,0 +1,37 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/axiado,ax3000-emmc-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Axiado AX3000 Arasan eMMC PHY
8
9maintainers:
10 - SriNavmani A <srinavmani@axiado.com>
11 - Tzu-Hao Wei <twei@axiado.com>
12 - Prasad Bolisetty <pbolisetty@axiado.com>
13
14properties:
15 compatible:
16 const: axiado,ax3000-emmc-phy
17
18 reg:
19 maxItems: 1
20
21 "#phy-cells":
22 const: 0
23
24required:
25 - compatible
26 - reg
27 - "#phy-cells"
28
29additionalProperties: false
30
31examples:
32 - |
33 phy@80801c00 {
34 compatible = "axiado,ax3000-emmc-phy";
35 reg = <0x80801c00 0x1000>;
36 #phy-cells = <0>;
37 };
Documentation/devicetree/bindings/phy/econet,en751221-pcie-phy.yaml+50−0
@@ -0,0 +1,50 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/econet,en751221-pcie-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: EcoNet PCI-Express PHY for EcoNet EN751221 and EN7528
8
9maintainers:
10 - Caleb James DeLisle <cjd@cjdns.fr>
11
12description:
13 The PCIe PHY supports physical layer functionality for PCIe Gen1 and
14 Gen1/Gen2 ports. On these SoCs, port 0 is a Gen1-only port while
15 port 1 is Gen1/Gen2 capable.
16
17properties:
18 compatible:
19 enum:
20 - econet,en751221-pcie-gen1
21 - econet,en751221-pcie-gen2
22 - econet,en7528-pcie-gen1
23 - econet,en7528-pcie-gen2
24
25 reg:
26 maxItems: 1
27
28 "#phy-cells":
29 const: 0
30
31required:
32 - compatible
33 - reg
34 - "#phy-cells"
35
36additionalProperties: false
37
38examples:
39 - |
40 soc {
41 #address-cells = <1>;
42 #size-cells = <1>;
43
44 pcie-phy@1faf2000 {
45 compatible = "econet,en7528-pcie-gen1";
46 reg = <0x1faf2000 0x1000>;
47 #phy-cells = <0>;
48 };
49 };
50...
Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml+139−0
@@ -0,0 +1,139 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/fsl,lynx-10g.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Lynx 10G SerDes PHY
8
9maintainers:
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11
12description:
13 The 10G Lynx is a multi-protocol SerDes block which handles networking, PCIe,
14 SATA and other high-speed interfaces. It is present on most QorIQ and
15 Layerscape SoCs. The register map is common, but the integration is
16 SoC-specific, with the differences consisting in register endianness, the
17 number of lanes, protocol converters available per lane and their location in
18 the PCCR registers. Some SoCs have multiple SerDes blocks and those differ in
19 their protocol capabilities per lane.
20
21properties:
22 compatible:
23 enum:
24 - fsl,ls1028a-serdes
25 - fsl,ls1046a-serdes1
26 - fsl,ls1046a-serdes2
27 - fsl,ls1088a-serdes1
28 - fsl,ls1088a-serdes2
29 - fsl,ls2088a-serdes1
30 - fsl,ls2088a-serdes2
31
32 reg:
33 maxItems: 1
34
35 big-endian: true
36
37 "#phy-cells":
38 const: 1
39
40 "#address-cells":
41 const: 1
42
43 "#size-cells":
44 const: 0
45
46patternProperties:
47 "^phy@[0-7]$":
48 type: object
49 description: SerDes lane (single RX/TX differential pair)
50
51 properties:
52 reg:
53 minimum: 0
54 maximum: 7
55 description: Lane index as seen in register map
56
57 "#phy-cells":
58 const: 0
59
60 required:
61 - reg
62 - "#phy-cells"
63
64 additionalProperties: false
65
66required:
67 - compatible
68 - reg
69 - "#phy-cells"
70 - "#address-cells"
71 - "#size-cells"
72
73allOf:
74 - if:
75 properties:
76 compatible:
77 contains:
78 enum:
79 - fsl,ls1028a-serdes
80 - fsl,ls1046a-serdes1
81 - fsl,ls1046a-serdes2
82 - fsl,ls1088a-serdes1
83 - fsl,ls1088a-serdes2
84 then:
85 patternProperties:
86 "^phy@[0-7]$":
87 properties:
88 reg:
89 minimum: 0
90 maximum: 3
91 - if:
92 properties:
93 compatible:
94 enum:
95 - fsl,ls1046a-serdes1
96 - fsl,ls1046a-serdes2
97 then:
98 required:
99 - big-endian
100 else:
101 properties:
102 big-endian: false
103
104additionalProperties: false
105
106examples:
107 - |
108 soc {
109 #address-cells = <2>;
110 #size-cells = <2>;
111
112 serdes@1ea0000 {
113 compatible = "fsl,ls1028a-serdes";
114 reg = <0x0 0x1ea0000 0x0 0xffff>;
115 #address-cells = <1>;
116 #size-cells = <0>;
117 #phy-cells = <1>;
118
119 phy@0 {
120 reg = <0>;
121 #phy-cells = <0>;
122 };
123
124 phy@1 {
125 reg = <1>;
126 #phy-cells = <0>;
127 };
128
129 phy@2 {
130 reg = <2>;
131 #phy-cells = <0>;
132 };
133
134 phy@3 {
135 reg = <3>;
136 #phy-cells = <0>;
137 };
138 };
139 };
Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml+45−3
@@ -9,10 +9,37 @@ title: Freescale Lynx 28G SerDes PHY · 8 unmodified lines
9maintainers:9maintainers:
10 - Ioana Ciornei <ioana.ciornei@nxp.com>10 - Ioana Ciornei <ioana.ciornei@nxp.com>
11 11
12description:
13 The Lynx 28G is a multi-lane, multi-protocol SerDes (PCIe, SATA, Ethernet)
14 present in multiple instances on NXP LX2160A and LX2162A SoCs. All instances
15 share a common register map and programming model, however they differ in
16 supported protocols per lane in a way that is not detectable by said
17 programming model without prior knowledge. The distinction is made through
18 the compatible string.
19
12properties:20properties:
13 compatible:21 compatible:
14 enum:22 oneOf:
15 - fsl,lynx-28g23 - const: fsl,lynx-28g
24 deprecated: true
25 description:
26 Legacy compatibility string for Lynx 28G SerDes. Any assumption
27 regarding whether a certain lane supports a certain protocol may
28 be incorrect. Deprecated except when used as a fallback. Use
29 device-specific strings instead.
30 - items:
31 - const: fsl,lx2160a-serdes1
32 - const: fsl,lynx-28g
33 - items:
34 - const: fsl,lx2160a-serdes2
35 - const: fsl,lynx-28g
36 - items:
37 - const: fsl,lx2162a-serdes1
38 - const: fsl,lynx-28g
39 - items:
40 - const: fsl,lx2162a-serdes2
41 - const: fsl,lynx-28g
42 - const: fsl,lx2160a-serdes3
16 43
17 reg:44 reg:
18 maxItems: 145 maxItems: 1
@@ -51,6 +78,21 @@ required: · 32 unmodified lines
51 - reg78 - reg
52 - "#phy-cells"79 - "#phy-cells"
53 80
81allOf:
82 # LX2162A SerDes 1 has fewer lanes than the others
83 - if:
84 properties:
85 compatible:
86 contains:
87 const: fsl,lx2162a-serdes1
88 then:
89 patternProperties:
90 "^phy@[0-7]$":
91 properties:
92 reg:
93 minimum: 4
94 maximum: 7
95
54additionalProperties: false96additionalProperties: false
55 97
56examples:98examples:
@@ -60,7 +102,7 @@ examples: · 3 unmodified lines
60 #size-cells = <2>;102 #size-cells = <2>;
61 103
62 serdes@1ea0000 {104 serdes@1ea0000 {
63 compatible = "fsl,lynx-28g";105 compatible = "fsl,lx2160a-serdes1", "fsl,lynx-28g";
64 reg = <0x0 0x1ea0000 0x0 0x1e30>;106 reg = <0x0 0x1ea0000 0x0 0x1e30>;
65 #address-cells = <1>;107 #address-cells = <1>;
66 #size-cells = <0>;108 #size-cells = <0>;
Documentation/devicetree/bindings/phy/nxp,tja1145.yaml+86−0
@@ -0,0 +1,86 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/nxp,tja1145.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TJA1145 CAN transceiver
8
9maintainers:
10 - Dimitri Fedrau <dimitri.fedrau@liebherr.com>
11
12allOf:
13 - $ref: /schemas/spi/spi-peripheral-props.yaml#
14
15properties:
16 compatible:
17 const: nxp,tja1145
18
19 interrupts:
20 maxItems: 1
21
22 reg:
23 maxItems: 1
24
25 "#phy-cells":
26 const: 0
27
28 spi-cpha: true
29
30 spi-max-frequency:
31 maximum: 4000000
32
33 spi-cs-setup-delay-ns:
34 minimum: 50
35 default: 50
36
37 spi-cs-hold-delay-ns:
38 minimum: 50
39 default: 50
40
41 spi-cs-inactive-delay-ns:
42 minimum: 250
43 default: 250
44
45 vcc-supply:
46 description:
47 CAN transceiver supply voltage
48
49 vio-supply:
50 description:
51 Supply voltage for I/O level adaptor
52
53 vbat-supply:
54 description:
55 Battery supply voltage
56
57required:
58 - compatible
59 - reg
60 - "#phy-cells"
61 - spi-cpha
62
63additionalProperties: false
64
65examples:
66 - |
67 #include <dt-bindings/interrupt-controller/irq.h>
68 spi {
69 #address-cells = <1>;
70 #size-cells = <0>;
71 can-phy@0 {
72 compatible = "nxp,tja1145";
73 interrupt-parent = <&gpio0>;
74 interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
75 reg = <0>;
76 #phy-cells = <0>;
77 spi-cpha;
78 spi-max-frequency = <4000000>;
79 spi-cs-setup-delay-ns = <50>;
80 spi-cs-hold-delay-ns = <50>;
81 spi-cs-inactive-delay-ns = <250>;
82 vcc-supply = <&reg_5v0>;
83 vio-supply = <&reg_3v3>;
84 vbat-supply = <&reg_24v0>;
85 };
86 };
Documentation/devicetree/bindings/phy/qcom,dsi-phy-7nm.yaml+1−0
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
20 - qcom,dsi-phy-7nm20 - qcom,dsi-phy-7nm
21 - qcom,dsi-phy-7nm-815021 - qcom,dsi-phy-7nm-8150
22 - qcom,kaanapali-dsi-phy-3nm22 - qcom,kaanapali-dsi-phy-3nm
23 - qcom,milos-dsi-phy-4nm
23 - qcom,sa8775p-dsi-phy-5nm24 - qcom,sa8775p-dsi-phy-5nm
24 - qcom,sar2130p-dsi-phy-5nm25 - qcom,sar2130p-dsi-phy-5nm
25 - qcom,sc7280-dsi-phy-7nm26 - qcom,sc7280-dsi-phy-7nm
Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml+1−0
@@ -74,6 +74,7 @@ allOf: · 73 unmodified lines
74 compatible:74 compatible:
75 enum:75 enum:
76 - qcom,glymur-dp-phy76 - qcom,glymur-dp-phy
77 - qcom,sa8775p-edp-phy
77 - qcom,x1e80100-dp-phy78 - qcom,x1e80100-dp-phy
78 then:79 then:
79 properties:80 properties:
Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml+4−0
@@ -30,6 +30,10 @@ properties: · 29 unmodified lines
30 - qcom,sdm660-qusb2-phy30 - qcom,sdm660-qusb2-phy
31 - qcom,sm4250-qusb2-phy31 - qcom,sm4250-qusb2-phy
32 - qcom,sm6115-qusb2-phy32 - qcom,sm6115-qusb2-phy
33 - items:
34 - enum:
35 - qcom,ipq5210-qusb2-phy
36 - const: qcom,ipq6018-qusb2-phy
33 - items:37 - items:
34 - enum:38 - enum:
35 - qcom,sc7180-qusb2-phy39 - qcom,sc7180-qusb2-phy
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml+17−2
@@ -16,6 +16,8 @@ description: · 15 unmodified lines
16properties:16properties:
17 compatible:17 compatible:
18 enum:18 enum:
19 - qcom,eliza-qmp-gen3x1-pcie-phy
20 - qcom,eliza-qmp-gen3x2-pcie-phy
19 - qcom,glymur-qmp-gen4x2-pcie-phy21 - qcom,glymur-qmp-gen4x2-pcie-phy
20 - qcom,glymur-qmp-gen5x4-pcie-phy22 - qcom,glymur-qmp-gen5x4-pcie-phy
21 - qcom,kaanapali-qmp-gen3x2-pcie-phy23 - qcom,kaanapali-qmp-gen3x2-pcie-phy
@@ -136,13 +138,22 @@ allOf: · 114 unmodified lines
136 items:138 items:
137 - description: port a139 - description: port a
138 - description: port b140 - description: port b
139 required:
140 - qcom,4ln-config-sel
141 else:141 else:
142 properties:142 properties:
143 reg:143 reg:
144 maxItems: 1144 maxItems: 1
145 145
146 - if:
147 properties:
148 compatible:
149 contains:
150 enum:
151 - qcom,sc8280xp-qmp-gen3x4-pcie-phy
152 - qcom,x1e80100-qmp-gen4x4-pcie-phy
153 then:
154 required:
155 - qcom,4ln-config-sel
156
146 - if:157 - if:
147 properties:158 properties:
148 compatible:159 compatible:
@@ -181,6 +192,8 @@ allOf: · 32 unmodified lines
181 compatible:192 compatible:
182 contains:193 contains:
183 enum:194 enum:
195 - qcom,eliza-qmp-gen3x1-pcie-phy
196 - qcom,eliza-qmp-gen3x2-pcie-phy
184 - qcom,glymur-qmp-gen4x2-pcie-phy197 - qcom,glymur-qmp-gen4x2-pcie-phy
185 - qcom,glymur-qmp-gen5x4-pcie-phy198 - qcom,glymur-qmp-gen5x4-pcie-phy
186 - qcom,qcs8300-qmp-gen4x2-pcie-phy199 - qcom,qcs8300-qmp-gen4x2-pcie-phy
@@ -206,6 +219,8 @@ allOf: · 19 unmodified lines
206 compatible:219 compatible:
207 contains:220 contains:
208 enum:221 enum:
222 - qcom,eliza-qmp-gen3x1-pcie-phy
223 - qcom,eliza-qmp-gen3x2-pcie-phy
209 - qcom,glymur-qmp-gen4x2-pcie-phy224 - qcom,glymur-qmp-gen4x2-pcie-phy
210 - qcom,glymur-qmp-gen5x4-pcie-phy225 - qcom,glymur-qmp-gen5x4-pcie-phy
211 - qcom,kaanapali-qmp-gen3x2-pcie-phy226 - qcom,kaanapali-qmp-gen3x2-pcie-phy
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml+1−0
@@ -31,6 +31,7 @@ properties: · 30 unmodified lines
31 - items:31 - items:
32 - enum:32 - enum:
33 - qcom,eliza-qmp-ufs-phy33 - qcom,eliza-qmp-ufs-phy
34 - qcom,nord-qmp-ufs-phy
34 - const: qcom,sm8650-qmp-ufs-phy35 - const: qcom,sm8650-qmp-ufs-phy
35 - items:36 - items:
36 - enum:37 - enum:
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml+26−20
@@ -15,26 +15,32 @@ description: · 14 unmodified lines
15 15
16properties:16properties:
17 compatible:17 compatible:
18 enum:18 oneOf:
19 - qcom,glymur-qmp-usb3-uni-phy19 - items:
20 - qcom,ipq5424-qmp-usb3-phy20 - enum:
21 - qcom,ipq6018-qmp-usb3-phy21 - qcom,glymur-qmp-usb3-uni-phy
22 - qcom,ipq8074-qmp-usb3-phy22 - qcom,ipq5424-qmp-usb3-phy
23 - qcom,ipq9574-qmp-usb3-phy23 - qcom,ipq6018-qmp-usb3-phy
24 - qcom,msm8996-qmp-usb3-phy24 - qcom,ipq8074-qmp-usb3-phy
25 - qcom,qcs8300-qmp-usb3-uni-phy25 - qcom,ipq9574-qmp-usb3-phy
26 - qcom,qdu1000-qmp-usb3-uni-phy26 - qcom,msm8996-qmp-usb3-phy
27 - qcom,sa8775p-qmp-usb3-uni-phy27 - qcom,qcs8300-qmp-usb3-uni-phy
28 - qcom,sc8180x-qmp-usb3-uni-phy28 - qcom,qdu1000-qmp-usb3-uni-phy
29 - qcom,sc8280xp-qmp-usb3-uni-phy29 - qcom,sa8775p-qmp-usb3-uni-phy
30 - qcom,sdm845-qmp-usb3-uni-phy30 - qcom,sc8180x-qmp-usb3-uni-phy
31 - qcom,sdx55-qmp-usb3-uni-phy31 - qcom,sc8280xp-qmp-usb3-uni-phy
32 - qcom,sdx65-qmp-usb3-uni-phy32 - qcom,sdm845-qmp-usb3-uni-phy
33 - qcom,sdx75-qmp-usb3-uni-phy33 - qcom,sdx55-qmp-usb3-uni-phy
34 - qcom,sm8150-qmp-usb3-uni-phy34 - qcom,sdx65-qmp-usb3-uni-phy
35 - qcom,sm8250-qmp-usb3-uni-phy35 - qcom,sdx75-qmp-usb3-uni-phy
36 - qcom,sm8350-qmp-usb3-uni-phy36 - qcom,sm8150-qmp-usb3-uni-phy
37 - qcom,x1e80100-qmp-usb3-uni-phy37 - qcom,sm8250-qmp-usb3-uni-phy
38 - qcom,sm8350-qmp-usb3-uni-phy
39 - qcom,x1e80100-qmp-usb3-uni-phy
40 - items:
41 - enum:
42 - qcom,ipq5210-qmp-usb3-phy
43 - const: qcom,ipq9574-qmp-usb3-phy
38 44
39 reg:45 reg:
40 maxItems: 146 maxItems: 1
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml+4−0
@@ -16,6 +16,10 @@ description: · 15 unmodified lines
16properties:16properties:
17 compatible:17 compatible:
18 oneOf:18 oneOf:
19 - items:
20 - enum:
21 - qcom,eliza-qmp-usb3-dp-phy
22 - const: qcom,sm8650-qmp-usb3-dp-phy
19 - items:23 - items:
20 - enum:24 - enum:
21 - qcom,kaanapali-qmp-usb3-dp-phy25 - qcom,kaanapali-qmp-usb3-dp-phy
Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml+1−0
@@ -17,6 +17,7 @@ properties: · 16 unmodified lines
17 oneOf:17 oneOf:
18 - items:18 - items:
19 - enum:19 - enum:
20 - qcom,eliza-snps-eusb2-phy
20 - qcom,milos-snps-eusb2-phy21 - qcom,milos-snps-eusb2-phy
21 - qcom,sar2130p-snps-eusb2-phy22 - qcom,sar2130p-snps-eusb2-phy
22 - qcom,sdx75-snps-eusb2-phy23 - qcom,sdx75-snps-eusb2-phy
Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml+40−4
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
20 - rockchip,rk3328-usb2phy20 - rockchip,rk3328-usb2phy
21 - rockchip,rk3366-usb2phy21 - rockchip,rk3366-usb2phy
22 - rockchip,rk3399-usb2phy22 - rockchip,rk3399-usb2phy
23 - rockchip,rk3528-usb2phy
23 - rockchip,rk3562-usb2phy24 - rockchip,rk3562-usb2phy
24 - rockchip,rk3568-usb2phy25 - rockchip,rk3568-usb2phy
25 - rockchip,rk3576-usb2phy26 - rockchip,rk3576-usb2phy
@@ -41,11 +42,15 @@ properties: · 15 unmodified lines
41 maxItems: 342 maxItems: 3
42 43
43 clock-names:44 clock-names:
44 minItems: 145 oneOf:
45 items:
46 - const: phyclk46 - const: phyclk
47 - const: aclk47 - items:
48 - const: aclk_slv48 - const: phyclk
49 - const: pclk
50 - items:
51 - const: phyclk
52 - const: aclk
53 - const: aclk_slv
49 54
50 assigned-clocks:55 assigned-clocks:
51 description:56 description:
@@ -65,6 +70,9 @@ properties: · 13 unmodified lines
65 description: Muxed interrupt for both ports70 description: Muxed interrupt for both ports
66 maxItems: 171 maxItems: 1
67 72
73 power-domains:
74 maxItems: 1
75
68 resets:76 resets:
69 maxItems: 277 maxItems: 2
70 78
@@ -145,6 +153,21 @@ anyOf: · 74 unmodified lines
145 - host-port153 - host-port
146 154
147allOf:155allOf:
156 - if:
157 properties:
158 compatible:
159 contains:
160 enum:
161 - rockchip,rk3528-usb2phy
162 - rockchip,rk3568-usb2phy
163 - rockchip,rv1108-usb2phy
164 then:
165 required:
166 - rockchip,usbgrf
167 else:
168 properties:
169 rockchip,usbgrf: false
170
148 - if:171 - if:
149 properties:172 properties:
150 compatible:173 compatible:
@@ -204,6 +227,19 @@ allOf: · 53 unmodified lines
204 clock-names:227 clock-names:
205 maxItems: 1228 maxItems: 1
206 229
230 - if:
231 properties:
232 compatible:
233 contains:
234 enum:
235 - rockchip,rk3528-usb2phy
236 then:
237 properties:
238 clocks:
239 minItems: 2
240 clock-names:
241 minItems: 2
242
207 - if:243 - if:
208 properties:244 properties:
209 compatible:245 compatible:
Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml+4−2
@@ -4,14 +4,16 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/phy/spacemit,usb2-phy.yaml#4$id: http://devicetree.org/schemas/phy/spacemit,usb2-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: SpacemiT K1 SoC USB 2.0 PHY7title: SpacemiT K1/K3 SoC USB 2.0 PHY
8 8
9maintainers:9maintainers:
10 - Ze Huang <huang.ze@linux.dev>10 - Ze Huang <huang.ze@linux.dev>
11 11
12properties:12properties:
13 compatible:13 compatible:
14 const: spacemit,k1-usb2-phy14 enum:
15 - spacemit,k1-usb2-phy
16 - spacemit,k3-usb2-phy
15 17
16 reg:18 reg:
17 maxItems: 119 maxItems: 1
Documentation/devicetree/bindings/phy/ti,ds125df111.yaml+46−0
@@ -0,0 +1,46 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/ti,ds125df111.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TI DS125DF111 Retimer PHY
8
9description:
10 This binding describes the TI DS125DF111 multi-protocol Retimer PHY.
11
12maintainers:
13 - Ioana Ciornei <ioana.ciornei@nxp.com>
14
15properties:
16 compatible:
17 const: ti,ds125df111
18
19 reg:
20 maxItems: 1
21
22 "#phy-cells":
23 const: 1
24 description: |
25 The phandle's argument in the PHY specifier selects one of the two
26 channels of the retimer
27
28required:
29 - compatible
30 - reg
31 - "#phy-cells"
32
33additionalProperties: false
34
35examples:
36 - |
37 i2c {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 phy@18 {
42 compatible = "ti,ds125df111";
43 reg = <0x18>;
44 #phy-cells = <1>;
45 };
46 };
Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml+14−9
@@ -47,15 +47,20 @@ description: | · 46 unmodified lines
47 47
48properties:48properties:
49 compatible:49 compatible:
50 enum:50 oneOf:
51 - ti,am3352-phy-gmii-sel51 - enum:
52 - ti,dra7xx-phy-gmii-sel52 - ti,am3352-phy-gmii-sel
53 - ti,am43xx-phy-gmii-sel53 - ti,dra7xx-phy-gmii-sel
54 - ti,dm814-phy-gmii-sel54 - ti,am43xx-phy-gmii-sel
55 - ti,am654-phy-gmii-sel55 - ti,dm814-phy-gmii-sel
56 - ti,j7200-cpsw5g-phy-gmii-sel56 - ti,am654-phy-gmii-sel
57 - ti,j721e-cpsw9g-phy-gmii-sel57 - ti,j7200-cpsw5g-phy-gmii-sel
58 - ti,j784s4-cpsw9g-phy-gmii-sel58 - ti,j721e-cpsw9g-phy-gmii-sel
59 - ti,j784s4-cpsw9g-phy-gmii-sel
60 - items:
61 - enum:
62 - ti,j722s-phy-gmii-sel
63 - const: ti,am654-phy-gmii-sel
59 64
60 reg:65 reg:
61 maxItems: 166 maxItems: 1
Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml+12−7
@@ -12,13 +12,18 @@ maintainers: · 11 unmodified lines
12 12
13properties:13properties:
14 compatible:14 compatible:
15 enum:15 oneOf:
16 - ti,j721e-wiz-16g16 - enum:
17 - ti,j721e-wiz-10g17 - ti,j721e-wiz-16g
18 - ti,j721s2-wiz-10g18 - ti,j721e-wiz-10g
19 - ti,am64-wiz-10g19 - ti,j721s2-wiz-10g
20 - ti,j7200-wiz-10g20 - ti,am64-wiz-10g
21 - ti,j784s4-wiz-10g21 - ti,j7200-wiz-10g
22 - ti,j784s4-wiz-10g
23 - items:
24 - enum:
25 - ti,j722s-wiz-10g
26 - const: ti,am64-wiz-10g
22 27
23 power-domains:28 power-domains:
24 maxItems: 129 maxItems: 1
Documentation/devicetree/bindings/pinctrl/allwinner,sun55i-a523-pinctrl.yaml+4−4
@@ -34,7 +34,7 @@ properties: · 33 unmodified lines
34 34
35 interrupts:35 interrupts:
36 minItems: 236 minItems: 2
37 maxItems: 1037 maxItems: 11
38 description:38 description:
39 One interrupt per external interrupt bank supported on the39 One interrupt per external interrupt bank supported on the
40 controller, sorted by bank number ascending order.40 controller, sorted by bank number ascending order.
@@ -61,7 +61,7 @@ properties: · 20 unmodified lines
61 bank found in the controller61 bank found in the controller
62 $ref: /schemas/types.yaml#/definitions/uint32-array62 $ref: /schemas/types.yaml#/definitions/uint32-array
63 minItems: 263 minItems: 2
64 maxItems: 1064 maxItems: 11
65 65
66patternProperties:66patternProperties:
67 # It's pretty scary, but the basic idea is that:67 # It's pretty scary, but the basic idea is that:
@@ -130,8 +130,8 @@ allOf: · 62 unmodified lines
130 then:130 then:
131 properties:131 properties:
132 interrupts:132 interrupts:
133 minItems: 10133 minItems: 11
134 maxItems: 10134 maxItems: 11
135 135
136 - if:136 - if:
137 properties:137 properties:
Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml+1−0
@@ -17,6 +17,7 @@ properties: · 16 unmodified lines
17 oneOf:17 oneOf:
18 - enum:18 - enum:
19 - amlogic,pinctrl-a419 - amlogic,pinctrl-a4
20 - amlogic,pinctrl-a9
20 - amlogic,pinctrl-s621 - amlogic,pinctrl-s6
21 - amlogic,pinctrl-s722 - amlogic,pinctrl-s7
22 - items:23 - items:
Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml+188−0
@@ -0,0 +1,188 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ASPEED AST2700 SoC0 Pin Controller
8
9maintainers:
10 - Billy Tsai <billy_tsai@aspeedtech.com>
11
12description: >
13 The AST2700 features a dual-SoC architecture with two interconnected SoCs,
14 each having its own System Control Unit (SCU) for independent pin control.
15 This pin controller manages the pin multiplexing for SoC0.
16
17 The SoC0 pin controller manages pin functions including eMMC, VGA DDC,
18 dual USB3/USB2 ports (A and B), JTAG, and PCIe root complex interfaces.
19
20properties:
21 compatible:
22 const: aspeed,ast2700-soc0-pinctrl
23
24 reg:
25 maxItems: 1
26
27patternProperties:
28 '-state$':
29 description: |
30 Pin control state.
31
32 If 'function' is present, the node describes a pinmux state and must
33 specify 'groups'.
34
35 For pin configuration, exactly one of 'groups' or 'pins' must be
36 specified in each state node. Group-level configuration applies to all
37 pins in the group. Pin-level configuration may be supplied in a
38 separate state node for individual pins; when both group-level and
39 pin-level configuration apply to the same pin, the pin-level
40 configuration takes precedence.
41
42 type: object
43 allOf:
44 - $ref: pinmux-node.yaml#
45 - $ref: pincfg-node.yaml#
46 - if:
47 required:
48 - function
49 then:
50 required:
51 - groups
52 - oneOf:
53 - required:
54 - groups
55 - required:
56 - pins
57
58 additionalProperties: false
59
60 properties:
61 function:
62 enum:
63 - EMMC
64 - JTAGDDR
65 - JTAGM0
66 - JTAGPCIEA
67 - JTAGPCIEB
68 - JTAGPSP
69 - JTAGSSP
70 - JTAGTSP
71 - JTAGUSB3A
72 - JTAGUSB3B
73 - PCIERC0PERST
74 - PCIERC1PERST
75 - TSPRSTN
76 - UFSCLKI
77 - USB2AD0
78 - USB2AD1
79 - USB2AH
80 - USB2AHP
81 - USB2AHPD0
82 - USB2AXH
83 - USB2AXH2B
84 - USB2AXHD1
85 - USB2AXHP
86 - USB2AXHP2B
87 - USB2AXHPD1
88 - USB2BD0
89 - USB2BD1
90 - USB2BH
91 - USB2BHP
92 - USB2BHPD0
93 - USB2BXH
94 - USB2BXH2A
95 - USB2BXHD1
96 - USB2BXHP
97 - USB2BXHP2A
98 - USB2BXHPD1
99 - USB3AXH
100 - USB3AXH2B
101 - USB3AXHD
102 - USB3AXHP
103 - USB3AXHP2B
104 - USB3AXHPD
105 - USB3BXH
106 - USB3BXH2A
107 - USB3BXHD
108 - USB3BXHP
109 - USB3BXHP2A
110 - USB3BXHPD
111 - VB
112 - VGADDC
113
114 groups:
115 enum:
116 - EMMCCDN
117 - EMMCG1
118 - EMMCG4
119 - EMMCG8
120 - EMMCWPN
121 - JTAG0
122 - PCIERC0PERST
123 - PCIERC1PERST
124 - TSPRSTN
125 - UFSCLKI
126 - USB2A
127 - USB2AAP
128 - USB2ABP
129 - USB2ADAP
130 - USB2AH
131 - USB2AHAP
132 - USB2B
133 - USB2BAP
134 - USB2BBP
135 - USB2BDBP
136 - USB2BH
137 - USB2BHBP
138 - USB3A
139 - USB3AAP
140 - USB3ABP
141 - USB3B
142 - USB3BAP
143 - USB3BBP
144 - VB0
145 - VB1
146 - VGADDC
147
148 pins:
149 enum:
150 - AB13
151 - AB14
152 - AC13
153 - AC14
154 - AD13
155 - AD14
156 - AE13
157 - AE14
158 - AE15
159 - AF13
160 - AF14
161 - AF15
162
163 drive-strength:
164 enum: [3, 6, 8, 11, 16, 18, 20, 23, 30, 32, 33, 35, 37, 38, 39, 41]
165
166 bias-disable: true
167 bias-pull-up: true
168 bias-pull-down: true
169
170required:
171 - compatible
172 - reg
173
174allOf:
175 - $ref: pinctrl.yaml#
176
177additionalProperties: false
178
179examples:
180 - |
181 pinctrl@400 {
182 compatible = "aspeed,ast2700-soc0-pinctrl";
183 reg = <0x400 0x318>;
184 emmc-state {
185 function = "EMMC";
186 groups = "EMMCG1";
187 };
188 };
Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc1-pinctrl.yaml+760−0
@@ -0,0 +1,760 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2700-soc1-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ASPEED AST2700 SoC1 Pin Controller
8
9maintainers:
10 - Billy Tsai <billy_tsai@aspeedtech.com>
11
12description:
13 The AST2700 features a dual-SoC architecture with two interconnected SoCs,
14 each having its own System Control Unit (SCU) for independent pin control.
15 This pin controller manages the pin multiplexing for SoC1.
16
17 The SoC1 pin controller manages pin functions including eSPI, LPC and I2C,
18 among others.
19
20properties:
21 compatible:
22 const: aspeed,ast2700-soc1-pinctrl
23 reg:
24 maxItems: 1
25
26patternProperties:
27 '-state$':
28 description: |
29 Pin control state.
30
31 If `function` is present, the node describes a pinmux state and must
32 specify `groups`.
33
34 For pin configuration, exactly one of `groups` or `pins` must be
35 specified in each state node. Group-level configuration applies to all
36 pins in the group. Pin-level configuration may be supplied in a
37 separate state node for individual pins; when both group-level and
38 pin-level configuration apply to the same pin, the pin-level
39 configuration takes precedence.
40
41 type: object
42 allOf:
43 - $ref: pinmux-node.yaml#
44 - $ref: pincfg-node.yaml#
45 - if:
46 required:
47 - function
48 then:
49 required:
50 - groups
51 - oneOf:
52 - required:
53 - groups
54 - required:
55 - pins
56 additionalProperties: false
57
58 properties:
59 function:
60 enum:
61 - ADC0
62 - ADC1
63 - ADC10
64 - ADC11
65 - ADC12
66 - ADC13
67 - ADC14
68 - ADC15
69 - ADC2
70 - ADC3
71 - ADC4
72 - ADC5
73 - ADC6
74 - ADC7
75 - ADC8
76 - ADC9
77 - AUXPWRGOOD0
78 - AUXPWRGOOD1
79 - CANBUS
80 - ESPI0
81 - ESPI1
82 - FSI0
83 - FSI1
84 - FSI2
85 - FSI3
86 - FWQSPI
87 - FWSPIABR
88 - FWWPN
89 - HBLED
90 - I2C0
91 - I2C1
92 - I2C10
93 - I2C11
94 - I2C12
95 - I2C13
96 - I2C14
97 - I2C15
98 - I2C2
99 - I2C3
100 - I2C4
101 - I2C5
102 - I2C6
103 - I2C7
104 - I2C8
105 - I2C9
106 - I2CF0
107 - I2CF1
108 - I2CF2
109 - I3C0
110 - I3C1
111 - I3C10
112 - I3C11
113 - I3C12
114 - I3C13
115 - I3C14
116 - I3C15
117 - I3C2
118 - I3C3
119 - I3C4
120 - I3C5
121 - I3C6
122 - I3C7
123 - I3C8
124 - I3C9
125 - JTAGM1
126 - LPC0
127 - LPC1
128 - LTPI
129 - MACLINK0
130 - MACLINK1
131 - MACLINK2
132 - MDIO0
133 - MDIO1
134 - MDIO2
135 - NCTS0
136 - NCTS1
137 - NCTS5
138 - NCTS6
139 - NDCD0
140 - NDCD1
141 - NDCD5
142 - NDCD6
143 - NDSR0
144 - NDSR1
145 - NDSR5
146 - NDSR6
147 - NDTR0
148 - NDTR1
149 - NDTR5
150 - NDTR6
151 - NRI0
152 - NRI1
153 - NRI5
154 - NRI6
155 - NRTS0
156 - NRTS1
157 - NRTS5
158 - NRTS6
159 - OSCCLK
160 - PCIERC
161 - PWM0
162 - PWM1
163 - PWM10
164 - PWM11
165 - PWM12
166 - PWM13
167 - PWM14
168 - PWM15
169 - PWM2
170 - PWM3
171 - PWM4
172 - PWM5
173 - PWM6
174 - PWM7
175 - PWM8
176 - PWM9
177 - QSPI0
178 - QSPI1
179 - QSPI2
180 - RGMII0
181 - RGMII1
182 - RMII0
183 - RMII0RCLKO
184 - RMII1
185 - RMII1RCLKO
186 - SALT0
187 - SALT1
188 - SALT10
189 - SALT11
190 - SALT12
191 - SALT13
192 - SALT14
193 - SALT15
194 - SALT2
195 - SALT3
196 - SALT4
197 - SALT5
198 - SALT6
199 - SALT7
200 - SALT8
201 - SALT9
202 - SD
203 - SGMII
204 - SGPM0
205 - SGPM1
206 - SGPS
207 - SIOONCTRLN0
208 - SIOONCTRLN1
209 - SIOPBIN0
210 - SIOPBIN1
211 - SIOPBON0
212 - SIOPBON1
213 - SIOPWREQN0
214 - SIOPWREQN1
215 - SIOPWRGD1
216 - SIOS3N0
217 - SIOS3N1
218 - SIOS5N0
219 - SIOS5N1
220 - SIOSCIN0
221 - SIOSCIN1
222 - SMON0
223 - SMON1
224 - SPI0
225 - SPI0ABR
226 - SPI0CS1
227 - SPI0WPN
228 - SPI1
229 - SPI1ABR
230 - SPI1CS1
231 - SPI1WPN
232 - SPI2
233 - SPI2CS1
234 - TACH0
235 - TACH1
236 - TACH10
237 - TACH11
238 - TACH12
239 - TACH13
240 - TACH14
241 - TACH15
242 - TACH2
243 - TACH3
244 - TACH4
245 - TACH5
246 - TACH6
247 - TACH7
248 - TACH8
249 - TACH9
250 - THRU0
251 - THRU1
252 - THRU2
253 - THRU3
254 - UART0
255 - UART1
256 - UART10
257 - UART11
258 - UART2
259 - UART3
260 - UART5
261 - UART6
262 - UART7
263 - UART8
264 - UART9
265 - USB2C
266 - USB2D
267 - USBUART
268 - VGA
269 - VPI
270 - WDTRST0N
271 - WDTRST1N
272 - WDTRST2N
273 - WDTRST3N
274 - WDTRST4N
275 - WDTRST5N
276 - WDTRST6N
277 - WDTRST7N
278
279 groups:
280 enum:
281 - ADC0
282 - ADC1
283 - ADC10
284 - ADC11
285 - ADC12
286 - ADC13
287 - ADC14
288 - ADC15
289 - ADC2
290 - ADC3
291 - ADC4
292 - ADC5
293 - ADC6
294 - ADC7
295 - ADC8
296 - ADC9
297 - AUXPWRGOOD0
298 - AUXPWRGOOD1
299 - CANBUS
300 - DI2C0
301 - DI2C1
302 - DI2C10
303 - DI2C11
304 - DI2C12
305 - DI2C13
306 - DI2C14
307 - DI2C15
308 - DI2C2
309 - DI2C3
310 - DI2C8
311 - DI2C9
312 - DSGPM0
313 - ESPI0
314 - ESPI1
315 - FSI0
316 - FSI1
317 - FSI2
318 - FSI3
319 - FWQSPI
320 - FWSPIABR
321 - FWWPN
322 - HBLED
323 - HVI3C0
324 - HVI3C1
325 - HVI3C12
326 - HVI3C13
327 - HVI3C14
328 - HVI3C15
329 - HVI3C2
330 - HVI3C3
331 - I2C0
332 - I2C1
333 - I2C10
334 - I2C11
335 - I2C12
336 - I2C13
337 - I2C14
338 - I2C15
339 - I2C2
340 - I2C3
341 - I2C4
342 - I2C5
343 - I2C6
344 - I2C7
345 - I2C8
346 - I2C9
347 - I2CF0
348 - I2CF1
349 - I2CF2
350 - I3C10
351 - I3C11
352 - I3C4
353 - I3C5
354 - I3C6
355 - I3C7
356 - I3C8
357 - I3C9
358 - JTAGM1
359 - LPC0
360 - LPC1
361 - LTPI
362 - LTPI_PS_I2C0
363 - LTPI_PS_I2C1
364 - LTPI_PS_I2C2
365 - LTPI_PS_I2C3
366 - MACLINK0
367 - MACLINK1
368 - MACLINK2
369 - MDIO0
370 - MDIO1
371 - MDIO2
372 - NCTS0
373 - NCTS1
374 - NCTS5
375 - NCTS6
376 - NDCD0
377 - NDCD1
378 - NDCD5
379 - NDCD6
380 - NDSR0
381 - NDSR1
382 - NDSR5
383 - NDSR6
384 - NDTR0
385 - NDTR1
386 - NDTR5
387 - NDTR6
388 - NRI0
389 - NRI1
390 - NRI5
391 - NRI6
392 - NRTS0
393 - NRTS1
394 - NRTS5
395 - NRTS6
396 - OSCCLK
397 - PE2SGRSTN
398 - PWM0
399 - PWM1
400 - PWM10
401 - PWM11
402 - PWM12
403 - PWM13
404 - PWM14
405 - PWM15
406 - PWM2
407 - PWM3
408 - PWM4
409 - PWM5
410 - PWM6
411 - PWM7
412 - PWM8
413 - PWM9
414 - QSPI0
415 - QSPI1
416 - QSPI2
417 - RGMII0
418 - RGMII1
419 - RMII0
420 - RMII0RCLKO
421 - RMII1
422 - RMII1RCLKO
423 - SALT0
424 - SALT1
425 - SALT10
426 - SALT11
427 - SALT12
428 - SALT13
429 - SALT14
430 - SALT15
431 - SALT2
432 - SALT3
433 - SALT4
434 - SALT5
435 - SALT6
436 - SALT7
437 - SALT8
438 - SALT9
439 - SD
440 - SGMII
441 - SGPM0
442 - SGPM1
443 - SGPS
444 - SIOONCTRLN0
445 - SIOONCTRLN1
446 - SIOPBIN0
447 - SIOPBIN1
448 - SIOPBON0
449 - SIOPBON1
450 - SIOPWREQN0
451 - SIOPWREQN1
452 - SIOPWRGD1
453 - SIOS3N0
454 - SIOS3N1
455 - SIOS5N0
456 - SIOS5N1
457 - SIOSCIN0
458 - SIOSCIN1
459 - SMON0
460 - SMON1
461 - SPI0
462 - SPI0ABR
463 - SPI0CS1
464 - SPI0WPN
465 - SPI1
466 - SPI1ABR
467 - SPI1CS1
468 - SPI1WPN
469 - SPI2
470 - SPI2CS1
471 - TACH0
472 - TACH1
473 - TACH10
474 - TACH11
475 - TACH12
476 - TACH13
477 - TACH14
478 - TACH15
479 - TACH2
480 - TACH3
481 - TACH4
482 - TACH5
483 - TACH6
484 - TACH7
485 - TACH8
486 - TACH9
487 - THRU0
488 - THRU1
489 - THRU2
490 - THRU3
491 - UART0
492 - UART1
493 - UART10
494 - UART11
495 - UART2
496 - UART3
497 - UART5
498 - UART6
499 - UART7
500 - UART8
501 - UART9
502 - USB2CD
503 - USB2CH
504 - USB2CU
505 - USB2CUD
506 - USB2DD
507 - USB2DH
508 - USBUART
509 - VGA
510 - VPI
511 - WDTRST0N
512 - WDTRST1N
513 - WDTRST2N
514 - WDTRST3N
515 - WDTRST4N
516 - WDTRST5N
517 - WDTRST6N
518 - WDTRST7N
519
520 pins:
521 enum:
522 - A14
523 - A15
524 - A18
525 - A19
526 - A21
527 - A22
528 - A23
529 - A24
530 - A25
531 - A26
532 - A6
533 - A7
534 - A8
535 - AA12
536 - AA13
537 - AA14
538 - AA15
539 - AA16
540 - AA17
541 - AA18
542 - AA20
543 - AA21
544 - AA22
545 - AA23
546 - AA24
547 - AA25
548 - AA26
549 - AB15
550 - AB16
551 - AB17
552 - AB18
553 - AB19
554 - AB20
555 - AB21
556 - AB22
557 - AB23
558 - AB24
559 - AB25
560 - AB26
561 - AC15
562 - AC16
563 - AC17
564 - AC18
565 - AC19
566 - AC20
567 - AC22
568 - AC24
569 - AC25
570 - AC26
571 - AD15
572 - AD16
573 - AD17
574 - AD18
575 - AD19
576 - AD20
577 - AD22
578 - AD25
579 - AD26
580 - AE16
581 - AE17
582 - AE18
583 - AE19
584 - AE20
585 - AE21
586 - AE23
587 - AE25
588 - AE26
589 - AF16
590 - AF17
591 - AF18
592 - AF19
593 - AF20
594 - AF21
595 - AF23
596 - AF25
597 - AF26
598 - B10
599 - B11
600 - B12
601 - B13
602 - B14
603 - B15
604 - B16
605 - B18
606 - B19
607 - B21
608 - B22
609 - B23
610 - B24
611 - B25
612 - B26
613 - B6
614 - B7
615 - B8
616 - B9
617 - C10
618 - C11
619 - C12
620 - C13
621 - C14
622 - C15
623 - C16
624 - C17
625 - C18
626 - C19
627 - C20
628 - C23
629 - C26
630 - C6
631 - C7
632 - C8
633 - C9
634 - D10
635 - D12
636 - D14
637 - D15
638 - D19
639 - D20
640 - D24
641 - D26
642 - D7
643 - D8
644 - D9
645 - E10
646 - E11
647 - E12
648 - E13
649 - E14
650 - E26
651 - E7
652 - E8
653 - E9
654 - F10
655 - F11
656 - F12
657 - F13
658 - F14
659 - F26
660 - F7
661 - F8
662 - F9
663 - G10
664 - G11
665 - G7
666 - G8
667 - G9
668 - H10
669 - H11
670 - H7
671 - H8
672 - H9
673 - J10
674 - J11
675 - J12
676 - J13
677 - J9
678 - K12
679 - K13
680 - L12
681 - M13
682 - M14
683 - M15
684 - M16
685 - N13
686 - N14
687 - N15
688 - N25
689 - N26
690 - P13
691 - P14
692 - P25
693 - P26
694 - R14
695 - R25
696 - R26
697 - T23
698 - T24
699 - U21
700 - U22
701 - U25
702 - U26
703 - V14
704 - V16
705 - V17
706 - V18
707 - V19
708 - V20
709 - V21
710 - V22
711 - V23
712 - V24
713 - W14
714 - W16
715 - W17
716 - W18
717 - W20
718 - W21
719 - W22
720 - W25
721 - W26
722 - Y11
723 - Y15
724 - Y16
725 - Y17
726 - Y18
727 - Y20
728 - Y21
729 - Y22
730 - Y23
731 - Y24
732 - Y25
733 - Y26
734
735 drive-strength:
736 enum: [4, 8, 12, 16]
737
738 bias-disable: true
739 bias-pull-up: true
740 bias-pull-down: true
741
742required:
743 - compatible
744 - reg
745
746allOf:
747 - $ref: pinctrl.yaml#
748
749additionalProperties: false
750
751examples:
752 - |
753 pinctrl@400 {
754 compatible = "aspeed,ast2700-soc1-pinctrl";
755 reg = <0x400 0x2A0>;
756 sgpm0-state {
757 function = "SGPM0";
758 groups = "SGPM0";
759 };
760 };
Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml+1−0
@@ -17,6 +17,7 @@ properties: · 16 unmodified lines
17 enum:17 enum:
18 - mediatek,mt2701-pinctrl18 - mediatek,mt2701-pinctrl
19 - mediatek,mt2712-pinctrl19 - mediatek,mt2712-pinctrl
20 - mediatek,mt6392-pinctrl
20 - mediatek,mt6397-pinctrl21 - mediatek,mt6397-pinctrl
21 - mediatek,mt7623-pinctrl22 - mediatek,mt7623-pinctrl
22 - mediatek,mt8127-pinctrl23 - mediatek,mt8127-pinctrl
Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml+8−0
@@ -152,6 +152,14 @@ patternProperties: · 151 unmodified lines
152 $ref: /schemas/types.yaml#/definitions/uint32152 $ref: /schemas/types.yaml#/definitions/uint32
153 enum: [0, 1, 2, 3]153 enum: [0, 1, 2, 3]
154 154
155 slew-rate:
156 description: |
157 Set the slew rate. Valid arguments are described as below:
158 0: Normal slew rate
159 1: Slower slew
160 $ref: /schemas/types.yaml#/definitions/uint32
161 enum: [0, 1]
162
155 required:163 required:
156 - pinmux164 - pinmux
157 165
Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml+5−0
@@ -67,6 +67,11 @@ properties: · 66 unmodified lines
67 67
68# PIN CONFIGURATION NODES68# PIN CONFIGURATION NODES
69patternProperties:69patternProperties:
70 "-hog(-[0-9]+)?$":
71 type: object
72 required:
73 - gpio-hog
74
70 '-pins$':75 '-pins$':
71 type: object76 type: object
72 additionalProperties: false77 additionalProperties: false
Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux-aon.yaml+5−1
@@ -58,7 +58,11 @@ patternProperties: · 57 unmodified lines
58 drive_soc_gpio27_pee6, drive_ao_retention_n_pee2,58 drive_soc_gpio27_pee6, drive_ao_retention_n_pee2,
59 drive_vcomp_alert_pee1, drive_hdmi_cec_pgg0 ]59 drive_vcomp_alert_pee1, drive_hdmi_cec_pgg0 ]
60 60
61unevaluatedProperties: false61required:
62 - compatible
63 - reg
64
65additionalProperties: false
62 66
63examples:67examples:
64 - |68 - |
Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux.yaml+5−1
@@ -115,7 +115,11 @@ patternProperties: · 114 unmodified lines
115 drive_sdmmc1_dat2_pj4, drive_sdmmc1_dat1_pj3,115 drive_sdmmc1_dat2_pj4, drive_sdmmc1_dat1_pj3,
116 drive_sdmmc1_dat0_pj2 ]116 drive_sdmmc1_dat0_pj2 ]
117 117
118unevaluatedProperties: false118required:
119 - compatible
120 - reg
121
122additionalProperties: false
119 123
120examples:124examples:
121 - |125 - |
Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-aon.yaml+102−0
@@ -0,0 +1,102 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra238-pinmux-aon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra238 AON Pinmux Controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14 compatible:
15 const: nvidia,tegra238-pinmux-aon
16
17 reg:
18 maxItems: 1
19
20patternProperties:
21 "^pinmux(-[a-z0-9-]+)?$":
22 type: object
23
24 # pin groups
25 additionalProperties:
26 $ref: nvidia,tegra238-pinmux-common.yaml
27
28 properties:
29 nvidia,pins:
30 items:
31 enum: [ bootv_ctl_n_paa0, soc_gpio00_paa1, vcomp_alert_paa2,
32 pwm1_paa3, batt_oc_paa4, soc_gpio04_paa5,
33 soc_gpio25_paa6, soc_gpio26_paa7,
34 hdmi_cec_pbb0,
35 spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
36 spi2_cs0_pcc3, spi2_cs1_pcc4, uart3_tx_pcc5,
37 uart3_rx_pcc6, gen2_i2c_scl_pcc7,
38 gen2_i2c_sda_pdd0, gen8_i2c_scl_pdd1,
39 gen8_i2c_sda_pdd2, touch_clk_pdd3, dmic1_clk_pdd4,
40 dmic1_dat_pdd5, soc_gpio19_pdd6, pwm2_pdd7,
41 pwm3_pee0, pwm7_pee1, soc_gpio49_pee2,
42 soc_gpio82_pee3, soc_gpio50_pee4, soc_gpio83_pee5,
43 soc_gpio69_pff0, soc_gpio70_pff1, soc_gpio71_pff2,
44 soc_gpio72_pff3, soc_gpio73_pff4, soc_gpio74_pff5,
45 soc_gpio80_pff6, soc_gpio76_pff7, soc_gpio77_pgg0,
46 soc_gpio84_pgg1, uart2_tx_pgg2, uart2_rx_pgg3,
47 uart2_rts_pgg4, uart2_cts_pgg5, soc_gpio85_pgg6,
48 uart5_tx_pgg7, uart5_rx_phh0, uart5_rts_phh1,
49 uart5_cts_phh2, soc_gpio86_phh3,
50 # drive groups (ordered PAA, PBB, PCC, PDD, PEE, PFF, PGG, PHH)
51 drive_bootv_ctl_n_paa0, drive_soc_gpio00_paa1,
52 drive_vcomp_alert_paa2, drive_pwm1_paa3,
53 drive_batt_oc_paa4, drive_soc_gpio04_paa5,
54 drive_soc_gpio25_paa6, drive_soc_gpio26_paa7,
55 drive_hdmi_cec_pbb0,
56 drive_spi2_sck_pcc0, drive_spi2_miso_pcc1,
57 drive_spi2_mosi_pcc2, drive_spi2_cs0_pcc3,
58 drive_spi2_cs1_pcc4, drive_uart3_tx_pcc5,
59 drive_uart3_rx_pcc6, drive_gen2_i2c_scl_pcc7,
60 drive_gen2_i2c_sda_pdd0, drive_gen8_i2c_scl_pdd1,
61 drive_gen8_i2c_sda_pdd2, drive_touch_clk_pdd3,
62 drive_dmic1_clk_pdd4, drive_dmic1_dat_pdd5,
63 drive_soc_gpio19_pdd6, drive_pwm2_pdd7,
64 drive_pwm3_pee0, drive_pwm7_pee1,
65 drive_soc_gpio49_pee2, drive_soc_gpio50_pee4,
66 drive_soc_gpio82_pee3, drive_soc_gpio71_pff2,
67 drive_soc_gpio76_pff7, drive_soc_gpio74_pff5,
68 drive_soc_gpio86_phh3, drive_soc_gpio72_pff3,
69 drive_soc_gpio77_pgg0, drive_soc_gpio80_pff6,
70 drive_soc_gpio84_pgg1, drive_soc_gpio83_pee5,
71 drive_soc_gpio73_pff4, drive_soc_gpio70_pff1,
72 drive_soc_gpio85_pgg6, drive_soc_gpio69_pff0,
73 drive_uart5_tx_pgg7, drive_uart5_rx_phh0,
74 drive_uart2_tx_pgg2, drive_uart2_rx_pgg3,
75 drive_uart2_cts_pgg5, drive_uart2_rts_pgg4,
76 drive_uart5_cts_phh2, drive_uart5_rts_phh1 ]
77
78required:
79 - compatible
80 - reg
81
82additionalProperties: false
83
84examples:
85 - |
86 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
87
88 pinmux@c300000 {
89 compatible = "nvidia,tegra238-pinmux-aon";
90 reg = <0x0c300000 0x4000>;
91
92 pinctrl-names = "cec";
93 pinctrl-0 = <&cec_state>;
94
95 cec_state: pinmux-cec {
96 cec {
97 nvidia,pins = "hdmi_cec_pbb0";
98 nvidia,function = "hdmi_cec";
99 };
100 };
101 };
102...
Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux-common.yaml+73−0
@@ -0,0 +1,73 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra238-pinmux-common.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra238 Pinmux Controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13$ref: nvidia,tegra-pinmux-common.yaml
14
15properties:
16 nvidia,function:
17 enum: [ dca_vsync, dca_hsync, displaya, rsvd0, i2c7_clk, i2c7_dat,
18 i2c4_dat, i2c4_clk, i2c9_dat, i2c9_clk, usb_vbus_en0,
19 usb_vbus_en1, spi3_din, spi1_cs0, spi3_cs0, spi1_din,
20 spi3_cs1, spi1_sck, spi3_sck, spi1_cs1, spi1_dout, spi3_dout,
21 gp_pwm5, gp_pwm6, extperiph2_clk, extperiph1_clk, i2c3_dat,
22 i2c3_clk, extperiph4_clk, extperiph3_clk, dmic2_dat,
23 dmic2_clk, uarta_cts, uarta_rts, uarta_rxd, uarta_txd,
24 i2c5_clk, i2c5_dat, uartd_cts, uartd_rts, uartd_rxd,
25 uartd_txd, i2c1_clk, i2c1_dat, sdmmc1_cd, i2s2_sclk,
26 i2s2_sdata_out, i2s2_sdata_in, i2s2_lrck, i2s4_sclk,
27 i2s4_sdata_out, i2s4_sdata_in, i2s4_lrck, i2s1_sclk,
28 i2s1_sdata_out, i2s1_sdata_in, i2s1_lrck, aud_mclk,
29 i2s3_lrck, i2s3_sclk, i2s3_sdata_in, i2s3_sdata_out,
30 pe2_clkreq_l, pe1_clkreq_l, pe1_rst_l, pe0_clkreq_l,
31 pe0_rst_l, pe2_rst_l, pe3_clkreq_l, pe3_rst_l,
32 dp_aux_ch0_hpd, qspi0_io0, qspi0_io1, qspi0_sck, qspi0_cs_n,
33 uartg_cts, uartg_rts, uartg_txd, uartg_rxd, sdmmc1_clk,
34 sdmmc1_cmd, sdmmc1_comp, sdmmc1_dat3, sdmmc1_dat2,
35 sdmmc1_dat1, sdmmc1_dat0, ufs0, soc_therm_oc1, hdmi_cec,
36 gp_pwm4, uartc_rxd, uartc_txd, i2c8_dat, i2c8_clk,
37 spi2_dout, i2c2_clk, spi2_cs0, i2c2_dat, spi2_sck, spi2_din,
38 ppc_mode_1, ppc_ready, ppc_mode_2, ppc_cc, ppc_mode_0,
39 ppc_int_n, uarte_txd, uarte_rxd, uartb_txd, uartb_rxd,
40 uartb_cts, uartb_rts, uarte_cts, uarte_rts, gp_pwm7,
41 gp_pwm2, gp_pwm3, gp_pwm1, spi2_cs1, dmic1_clk, dmic1_dat,
42 rsvd1, dcb_hsync, dcb_vsync, soc_therm_oc4, gp_pwm8,
43 nv_therm_fan_tach0, wdt_reset_outa, ccla_la_trigger_mux,
44 dspk1_dat, dspk1_clk, nv_therm_fan_tach1, dspk0_dat,
45 dspk0_clk, i2s5_sclk, i2s6_lrck, i2s6_sdata_in, i2s6_sclk,
46 i2s6_sdata_out, i2s5_lrck, i2s5_sdata_out, i2s5_sdata_in,
47 sdmmc1_pe3_rst_l, sdmmc1_pe3_clkreq_l, touch_clk,
48 ppc_i2c_dat, wdt_reset_outb, spi5_cs1, ppc_rst_n,
49 ppc_i2c_clk, spi4_cs1, soc_therm_oc3, spi5_sck, spi5_miso,
50 spi4_sck, spi4_miso, spi4_cs0, spi4_mosi, spi5_cs0,
51 spi5_mosi, led_blink, rsvd2, dmic3_clk, dmic3_dat,
52 dmic4_clk, dmic4_dat, tsc_edge_out0, tsc_edge_out3,
53 tsc_edge_out1, tsc_edge_out2, dmic5_clk, dmic5_dat, rsvd3,
54 sdmmc1_wp, tsc_edge_out0a, tsc_edge_out0d, tsc_edge_out0b,
55 tsc_edge_out0c, soc_therm_oc2 ]
56
57 # out of the common properties, only these are allowed for Tegra238
58 nvidia,pins: true
59 nvidia,pull: true
60 nvidia,tristate: true
61 nvidia,schmitt: true
62 nvidia,enable-input: true
63 nvidia,open-drain: true
64 nvidia,lock: true
65 nvidia,drive-type: true
66 nvidia,io-hv: true
67
68required:
69 - nvidia,pins
70
71additionalProperties: false
72
73...
Documentation/devicetree/bindings/pinctrl/nvidia,tegra238-pinmux.yaml+219−0
@@ -0,0 +1,219 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra238-pinmux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra238 Pinmux Controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14 compatible:
15 const: nvidia,tegra238-pinmux
16
17 reg:
18 maxItems: 1
19
20patternProperties:
21 "^pinmux(-[a-z0-9-]+)?$":
22 type: object
23
24 # pin groups
25 additionalProperties:
26 $ref: nvidia,tegra238-pinmux-common.yaml
27
28 properties:
29 nvidia,pins:
30 items:
31 enum: [ gpu_pwr_req_pa0, gp_pwm5_pa1, gp_pwm6_pa2, spi3_sck_pa3,
32 spi3_miso_pa4, spi3_mosi_pa5, spi3_cs0_pa6, spi3_cs1_pa7,
33 spi1_sck_pb0, spi1_miso_pb1, spi1_mosi_pb2, spi1_cs0_pb3,
34 spi1_cs1_pb4, pwr_i2c_scl_pc0, pwr_i2c_sda_pc1,
35 extperiph1_clk_pc2, extperiph2_clk_pc3, cam_i2c_scl_pc4,
36 cam_i2c_sda_pc5, soc_gpio23_pc6, soc_gpio24_pc7,
37 soc_gpio27_pd0, soc_gpio55_pd1, soc_gpio29_pd2,
38 soc_gpio33_pd3, soc_gpio32_pd4, soc_gpio35_pd5,
39 soc_gpio37_pd6, soc_gpio56_pd7, uart1_tx_pe0,
40 uart1_rx_pe1, uart1_rts_pe2, uart1_cts_pe3,
41 soc_gpio13_pf0, soc_gpio14_pf1, soc_gpio15_pf2,
42 soc_gpio16_pf3, soc_gpio17_pf4, soc_gpio18_pf5,
43 soc_gpio20_pf6, soc_gpio21_pf7, soc_gpio22_pg0,
44 soc_gpio06_pg1, uart4_tx_pg2, uart4_rx_pg3,
45 uart4_rts_pg4, uart4_cts_pg5, soc_gpio41_pg6,
46 soc_gpio42_pg7, soc_gpio43_ph0, soc_gpio44_ph1,
47 gen1_i2c_scl_ph2, gen1_i2c_sda_ph3, cpu_pwr_req_ph4,
48 soc_gpio07_ph5, dap3_clk_pj0, dap3_dout_pj1,
49 dap3_din_pj2, dap3_fs_pj3, soc_gpio57_pj4,
50 soc_gpio58_pj5, soc_gpio59_pj6, soc_gpio60_pj7,
51 soc_gpio45_pk0, soc_gpio46_pk1, soc_gpio47_pk2,
52 soc_gpio48_pk3, qspi0_sck_pl0, qspi0_io0_pl1,
53 qspi0_io1_pl2, qspi0_cs_n_pl3, soc_gpio152_pl4,
54 soc_gpio153_pl5, soc_gpio154_pl6, soc_gpio155_pl7,
55 soc_gpio156_pm0, soc_gpio157_pm1, soc_gpio158_pm2,
56 soc_gpio159_pm3, soc_gpio160_pm4, soc_gpio161_pm5,
57 soc_gpio162_pm6, uart7_tx_pm7, uart7_rx_pn0,
58 uart7_rts_pn1, uart7_cts_pn2, soc_gpio167_pp0,
59 soc_gpio168_pp1, soc_gpio169_pp2, soc_gpio170_pp3,
60 dap4_sclk_pp4, dap4_dout_pp5, dap4_din_pp6, dap4_fs_pp7,
61 soc_gpio171_pq0, soc_gpio172_pq1, soc_gpio173_pq2,
62 soc_gpio61_pr0, soc_gpio62_pr1, soc_gpio63_pr2,
63 soc_gpio64_pr3, soc_gpio65_pr4, soc_gpio66_pr5,
64 soc_gpio67_pr6, soc_gpio68_pr7, gen4_i2c_scl_ps0,
65 gen4_i2c_sda_ps1, soc_gpio75_ps2, gen7_i2c_scl_ps3,
66 gen7_i2c_sda_ps4, soc_gpio78_ps5, gen9_i2c_scl_ps6,
67 gen9_i2c_sda_ps7, soc_gpio81_pt0, soc_gpio36_pt1,
68 soc_gpio53_pt2, soc_gpio38_pt3, soc_gpio40_pt4,
69 soc_gpio34_pt5, usb_vbus_en0_pt6, usb_vbus_en1_pt7,
70 sdmmc1_clk_pu0, sdmmc1_cmd_pu1, sdmmc1_dat0_pu2,
71 sdmmc1_dat1_pu3, sdmmc1_dat2_pu4, sdmmc1_dat3_pu5,
72 ufs0_ref_clk_pv0, ufs0_rst_n_pv1, pex_l0_clkreq_n_pw0,
73 pex_l0_rst_n_pw1, pex_l1_clkreq_n_pw2,
74 pex_l1_rst_n_pw3, pex_l2_clkreq_n_pw4,
75 pex_l2_rst_n_pw5, pex_l3_clkreq_n_pw6,
76 pex_l3_rst_n_pw7, pex_wake_n_px0, dp_aux_ch0_hpd_px1,
77 bootv_ctl_n_paa0, soc_gpio00_paa1, vcomp_alert_paa2,
78 pwm1_paa3, batt_oc_paa4, soc_gpio04_paa5,
79 soc_gpio25_paa6, soc_gpio26_paa7, hdmi_cec_pbb0,
80 spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,
81 spi2_cs0_pcc3, spi2_cs1_pcc4, uart3_tx_pcc5,
82 uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0,
83 gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2, touch_clk_pdd3,
84 dmic1_clk_pdd4, dmic1_dat_pdd5, soc_gpio19_pdd6,
85 pwm2_pdd7, pwm3_pee0, pwm7_pee1, soc_gpio49_pee2,
86 soc_gpio82_pee3, soc_gpio50_pee4, soc_gpio83_pee5,
87 soc_gpio69_pff0, soc_gpio70_pff1, soc_gpio71_pff2,
88 soc_gpio72_pff3, soc_gpio73_pff4, soc_gpio74_pff5,
89 soc_gpio80_pff6, soc_gpio76_pff7, soc_gpio77_pgg0,
90 soc_gpio84_pgg1, uart2_tx_pgg2, uart2_rx_pgg3,
91 uart2_rts_pgg4, uart2_cts_pgg5, soc_gpio85_pgg6,
92 uart5_tx_pgg7, uart5_rx_phh0, uart5_rts_phh1,
93 uart5_cts_phh2, soc_gpio86_phh3, sdmmc1_comp,
94 # drive groups
95 drive_soc_gpio36_pt1, drive_soc_gpio53_pt2,
96 drive_soc_gpio38_pt3, drive_soc_gpio40_pt4,
97 drive_soc_gpio75_ps2, drive_soc_gpio81_pt0,
98 drive_soc_gpio78_ps5, drive_soc_gpio34_pt5,
99 drive_gen7_i2c_scl_ps3, drive_gen7_i2c_sda_ps4,
100 drive_gen4_i2c_sda_ps1, drive_gen4_i2c_scl_ps0,
101 drive_gen9_i2c_sda_ps7, drive_gen9_i2c_scl_ps6,
102 drive_usb_vbus_en0_pt6, drive_usb_vbus_en1_pt7,
103 drive_soc_gpio61_pr0, drive_soc_gpio62_pr1,
104 drive_soc_gpio63_pr2, drive_soc_gpio64_pr3,
105 drive_soc_gpio65_pr4, drive_soc_gpio66_pr5,
106 drive_soc_gpio67_pr6, drive_soc_gpio68_pr7,
107 drive_spi3_miso_pa4, drive_spi1_cs0_pb3,
108 drive_spi3_cs0_pa6, drive_spi1_miso_pb1,
109 drive_spi3_cs1_pa7, drive_spi1_sck_pb0,
110 drive_spi3_sck_pa3, drive_spi1_cs1_pb4,
111 drive_spi1_mosi_pb2, drive_spi3_mosi_pa5,
112 drive_gpu_pwr_req_pa0, drive_gp_pwm5_pa1,
113 drive_gp_pwm6_pa2, drive_extperiph2_clk_pc3,
114 drive_extperiph1_clk_pc2, drive_cam_i2c_sda_pc5,
115 drive_cam_i2c_scl_pc4, drive_soc_gpio23_pc6,
116 drive_soc_gpio24_pc7, drive_soc_gpio27_pd0,
117 drive_soc_gpio29_pd2, drive_soc_gpio32_pd4,
118 drive_soc_gpio33_pd3, drive_soc_gpio35_pd5,
119 drive_soc_gpio37_pd6, drive_soc_gpio56_pd7,
120 drive_soc_gpio55_pd1, drive_uart1_cts_pe3,
121 drive_uart1_rts_pe2, drive_uart1_rx_pe1,
122 drive_uart1_tx_pe0, drive_pwr_i2c_scl_pc0,
123 drive_pwr_i2c_sda_pc1, drive_cpu_pwr_req_ph4,
124 drive_uart4_cts_pg5, drive_uart4_rts_pg4,
125 drive_uart4_rx_pg3, drive_uart4_tx_pg2,
126 drive_gen1_i2c_scl_ph2, drive_gen1_i2c_sda_ph3,
127 drive_soc_gpio20_pf6, drive_soc_gpio21_pf7,
128 drive_soc_gpio22_pg0, drive_soc_gpio13_pf0,
129 drive_soc_gpio14_pf1, drive_soc_gpio15_pf2,
130 drive_soc_gpio16_pf3, drive_soc_gpio17_pf4,
131 drive_soc_gpio18_pf5, drive_soc_gpio41_pg6,
132 drive_soc_gpio42_pg7, drive_soc_gpio43_ph0,
133 drive_soc_gpio44_ph1, drive_soc_gpio06_pg1,
134 drive_soc_gpio07_ph5, drive_dap4_sclk_pp4,
135 drive_dap4_dout_pp5, drive_dap4_din_pp6,
136 drive_dap4_fs_pp7, drive_soc_gpio167_pp0,
137 drive_soc_gpio168_pp1, drive_soc_gpio169_pp2,
138 drive_soc_gpio170_pp3, drive_soc_gpio171_pq0,
139 drive_soc_gpio172_pq1, drive_soc_gpio173_pq2,
140 drive_soc_gpio45_pk0, drive_soc_gpio46_pk1,
141 drive_soc_gpio47_pk2, drive_soc_gpio48_pk3,
142 drive_soc_gpio57_pj4, drive_soc_gpio58_pj5,
143 drive_soc_gpio59_pj6, drive_soc_gpio60_pj7,
144 drive_dap3_fs_pj3, drive_dap3_clk_pj0,
145 drive_dap3_din_pj2, drive_dap3_dout_pj1,
146 drive_pex_l2_clkreq_n_pw4, drive_pex_wake_n_px0,
147 drive_pex_l1_clkreq_n_pw2, drive_pex_l1_rst_n_pw3,
148 drive_pex_l0_clkreq_n_pw0, drive_pex_l0_rst_n_pw1,
149 drive_pex_l2_rst_n_pw5, drive_pex_l3_clkreq_n_pw6,
150 drive_pex_l3_rst_n_pw7, drive_dp_aux_ch0_hpd_px1,
151 drive_qspi0_io0_pl1, drive_qspi0_io1_pl2,
152 drive_qspi0_sck_pl0, drive_qspi0_cs_n_pl3,
153 drive_soc_gpio156_pm0, drive_soc_gpio155_pl7,
154 drive_soc_gpio160_pm4, drive_soc_gpio154_pl6,
155 drive_soc_gpio152_pl4, drive_soc_gpio153_pl5,
156 drive_soc_gpio161_pm5, drive_soc_gpio162_pm6,
157 drive_soc_gpio159_pm3, drive_soc_gpio157_pm1,
158 drive_soc_gpio158_pm2, drive_uart7_cts_pn2,
159 drive_uart7_rts_pn1, drive_uart7_tx_pm7,
160 drive_uart7_rx_pn0, drive_sdmmc1_clk_pu0,
161 drive_sdmmc1_cmd_pu1, drive_sdmmc1_dat3_pu5,
162 drive_sdmmc1_dat2_pu4, drive_sdmmc1_dat1_pu3,
163 drive_sdmmc1_dat0_pu2, drive_ufs0_rst_n_pv1,
164 drive_ufs0_ref_clk_pv0, drive_batt_oc_paa4,
165 drive_bootv_ctl_n_paa0, drive_vcomp_alert_paa2,
166 drive_hdmi_cec_pbb0, drive_touch_clk_pdd3,
167 drive_uart3_rx_pcc6, drive_uart3_tx_pcc5,
168 drive_gen8_i2c_sda_pdd2, drive_gen8_i2c_scl_pdd1,
169 drive_spi2_mosi_pcc2, drive_gen2_i2c_scl_pcc7,
170 drive_spi2_cs0_pcc3, drive_gen2_i2c_sda_pdd0,
171 drive_spi2_sck_pcc0, drive_spi2_miso_pcc1,
172 drive_soc_gpio49_pee2, drive_soc_gpio50_pee4,
173 drive_soc_gpio82_pee3, drive_soc_gpio71_pff2,
174 drive_soc_gpio76_pff7, drive_soc_gpio74_pff5,
175 drive_soc_gpio00_paa1, drive_soc_gpio19_pdd6,
176 drive_soc_gpio86_phh3, drive_soc_gpio72_pff3,
177 drive_soc_gpio77_pgg0, drive_soc_gpio80_pff6,
178 drive_soc_gpio84_pgg1, drive_soc_gpio83_pee5,
179 drive_soc_gpio73_pff4, drive_soc_gpio70_pff1,
180 drive_soc_gpio04_paa5, drive_soc_gpio85_pgg6,
181 drive_soc_gpio69_pff0, drive_soc_gpio25_paa6,
182 drive_soc_gpio26_paa7, drive_uart5_tx_pgg7,
183 drive_uart5_rx_phh0, drive_uart2_tx_pgg2,
184 drive_uart2_rx_pgg3, drive_uart2_cts_pgg5,
185 drive_uart2_rts_pgg4, drive_uart5_cts_phh2,
186 drive_uart5_rts_phh1, drive_pwm7_pee1,
187 drive_pwm2_pdd7, drive_pwm3_pee0, drive_pwm1_paa3,
188 drive_spi2_cs1_pcc4, drive_dmic1_clk_pdd4,
189 drive_dmic1_dat_pdd5, drive_sdmmc1_comp ]
190
191required:
192 - compatible
193 - reg
194
195additionalProperties: false
196
197examples:
198 - |
199 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
200
201 pinmux@2430000 {
202 compatible = "nvidia,tegra238-pinmux";
203 reg = <0x2430000 0x17000>;
204
205 pinctrl-names = "pex_rst";
206 pinctrl-0 = <&pex_rst_c5_out_state>;
207
208 pex_rst_c5_out_state: pinmux-pex-rst-c5-out {
209 pexrst {
210 nvidia,pins = "pex_l3_rst_n_pw7";
211 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
212 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
213 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
214 nvidia,tristate = <TEGRA_PIN_DISABLE>;
215 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216 };
217 };
218 };
219...
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-aon.yaml+80−0
@@ -0,0 +1,80 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-aon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra264 AON Pinmux Controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14 compatible:
15 const: nvidia,tegra264-pinmux-aon
16
17 reg:
18 maxItems: 1
19
20patternProperties:
21 "^pinmux(-[a-z0-9-]+)?$":
22 type: object
23
24 # pin groups
25 additionalProperties:
26 $ref: nvidia,tegra264-pinmux-common.yaml
27
28 properties:
29 nvidia,pins:
30 items:
31 enum: [ soc_gpio00_paa0, vcomp_alert_paa1, ao_retention_n_paa2,
32 batt_oc_paa3, bootv_ctl_n_paa4, power_on_paa5,
33 hdmi_cec_paa6, soc_gpio07_paa7, soc_gpio08_pbb0,
34 soc_gpio09_pbb1, gen2_i2c_scl_pcc0, gen2_i2c_sda_pcc1,
35 gen3_i2c_scl_pcc2, gen3_i2c_sda_pcc3, gp_pwm4_pcc4,
36 uart0_tx_pcc5, uart0_rx_pcc6, spi2_sck_pcc7,
37 spi2_miso_pdd0, spi2_mosi_pdd1, spi2_cs0_n_pdd2,
38 soc_gpio21_pdd3, soc_gpio22_pdd4, soc_gpio23_pdd5,
39 soc_gpio24_pdd6, soc_gpio25_pdd7, soc_gpio26_pee0,
40 soc_gpio27_pee1, soc_gpio28_pee2, soc_gpio29_pee3,
41 drive_ao_retention_n_paa2, drive_batt_oc_paa3,
42 drive_power_on_paa5, drive_vcomp_alert_paa1,
43 drive_bootv_ctl_n_paa4, drive_soc_gpio00_paa0,
44 drive_soc_gpio07_paa7, drive_soc_gpio08_pbb0,
45 drive_soc_gpio09_pbb1, drive_hdmi_cec_paa6,
46 drive_gen2_i2c_scl_pcc0, drive_gen2_i2c_sda_pcc1,
47 drive_gen3_i2c_scl_pcc2, drive_gen3_i2c_sda_pcc3,
48 drive_gp_pwm4_pcc4, drive_uart0_tx_pcc5,
49 drive_uart0_rx_pcc6, drive_spi2_sck_pcc7,
50 drive_spi2_miso_pdd0, drive_spi2_mosi_pdd1,
51 drive_spi2_cs0_n_pdd2, drive_soc_gpio21_pdd3,
52 drive_soc_gpio22_pdd4, drive_soc_gpio23_pdd5,
53 drive_soc_gpio24_pdd6, drive_soc_gpio25_pdd7,
54 drive_soc_gpio26_pee0, drive_soc_gpio27_pee1,
55 drive_soc_gpio28_pee2, drive_soc_gpio29_pee3 ]
56
57required:
58 - compatible
59 - reg
60
61additionalProperties: false
62
63examples:
64 - |
65 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
66
67 pinmux@c7a2000 {
68 compatible = "nvidia,tegra264-pinmux-aon";
69 reg = <0xc7a2000 0x2000>;
70
71 pinctrl-names = "default";
72 pinctrl-0 = <&state_default>;
73
74 state_default: pinmux-default {
75 uart0 {
76 nvidia,pins = "uart0_tx_pcc5";
77 nvidia,function = "uarta_txd";
78 };
79 };
80 };
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-common.yaml+84−0
@@ -0,0 +1,84 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-common.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra264 Pinmux Common Properties
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13$ref: nvidia,tegra-pinmux-common.yaml
14
15properties:
16 nvidia,function:
17 enum: [ dca_vsync, dca_hsync, rsvd0, dp_aux_ch0_hpd, dp_aux_ch1_hpd,
18 dp_aux_ch2_hpd, dp_aux_ch3_hpd, gp_pwm2, gp_pwm3, i2c7_clk,
19 i2c7_dat, i2c9_clk, i2c9_dat, uartk_cts, uartk_rts, uartk_rxd,
20 uartk_txd, spi3_cs0, spi3_cs3, spi3_din, spi3_dout, spi3_sck,
21 uartf_cts, uartf_rts, uartf_rxd, uartf_txd, spi1_cs0, spi1_cs1,
22 spi1_din, spi1_dout, spi1_sck, extperiph2_clk, extperiph1_clk,
23 i2c12_clk, i2c12_dat, nv_therm_fan_tach0, gp_pwm9, uartj_cts,
24 uartj_rts, uartj_rxd, uartj_txd, i2c0_clk, i2c0_dat, i2c1_clk,
25 i2c1_dat, i2s2_lrck, i2s2_sclk, i2s2_sdata_out, i2s2_sdata_in,
26 gp_pwm10, uarte_cts, uarte_rts, uarte_rxd, uarte_txd, i2c5_dat,
27 i2c5_clk, i2s6_sdata_in, i2s6_sdata_out, i2s6_lrck, i2s6_sclk,
28 i2s4_sdata_out, i2s4_sclk, i2s4_sdata_in, i2s4_lrck, spi5_cs0,
29 spi5_din, spi5_dout, spi5_sck, aud_mclk, i2s1_sclk, i2s1_sdata_in,
30 i2s1_sdata_out, i2s1_lrck, i2c11_clk, i2c11_dat, xhalt_trig,
31 gp_pwm1, gp_pwm6, gp_pwm7, gp_pwm8, ufs0, pe1_clkreq_l, pe1_rst_l,
32 pe2_rst_l, pe2_clkreq_l, pe3_clkreq_l, pe3_rst_l, sgmii0_sma_mdio,
33 sgmii0_sma_mdc, usb_vbus_en0, usb_vbus_en1, eth1_mdio, pe4_clkreq_l,
34 pe4_rst_l, pe5_clkreq_l, pe5_rst_l, eth0_mdio, eth0_mdc, eth1_mdc,
35 eth2_mdio, eth2_mdc, eth3_mdio, eth3_mdc, qspi0_cs_n, qspi0_io0,
36 qspi0_io1, qspi0_io2, qspi0_io3, qspi0_sck, sdmmc1_clk, sdmmc1_cmd,
37 sdmmc1_comp, sdmmc1_dat3, sdmmc1_dat2, sdmmc1_dat1, sdmmc1_dat0,
38 qspi3_sck, qspi3_cs0, qspi3_io0, qspi3_io1, dcb_vsync, dcb_hsync,
39 dsa_lspii, dce_vsync, dce_hsync, dch_vsync, dch_hsync, bl_en,
40 bl_pwm_dim0, rsvd1, soc_therm_oc3, i2s5_sclk, i2s5_sdata_in,
41 extperiph3_clk, extperiph4_clk, i2s5_sdata_out, i2s5_lrck,
42 sdmmc1_cd, i2s7_sdata_in, spi4_sck, spi4_din, spi4_dout, spi4_cs0,
43 spi4_cs1, gp_pwm5, i2c14_clk, i2c14_dat, i2s8_sclk, i2s8_sdata_out,
44 i2s8_lrck, i2s8_sdata_in, i2c16_clk, i2c16_dat, i2s3_sclk,
45 i2s3_sdata_out, i2s3_sdata_in, i2s3_lrck, pm_trig1, pm_trig0,
46 qspi2_sck, qspi2_cs0, qspi2_io0, qspi2_io1, dcc_vsync, dcc_hsync,
47 rsvd2, dcf_vsync, dcf_hsync, soundwire1_clk, soundwire1_dat0,
48 soundwire1_dat1, soundwire1_dat2, dmic2_clk, dmic2_dat,
49 nv_therm_fan_tach1, i2c15_clk, i2c15_dat, i2s7_lrck,
50 ccla_la_trigger_mux, i2s7_sclk, i2s7_sdata_out, dmic1_dat,
51 dmic1_clk, dcd_vsync, dcd_hsync, rsvd3, dcg_vsync, dcg_hsync,
52 dspk1_clk, dspk1_dat, soc_therm_oc2, istctrl_ist_done_n,
53 soc_therm_oc1, tsc_edge_out0c, tsc_edge_out0d, tsc_edge_out0a,
54 tsc_edge_out0b, touch_clk, hdmi_cec, i2c2_clk, i2c2_dat, i2c3_clk,
55 i2c3_dat, gp_pwm4, uarta_txd, uarta_rxd, spi2_sck, spi2_din,
56 spi2_dout, spi2_cs0, tsc_sync1, tsc_edge_out3, tsc_edge_out0,
57 tsc_edge_out1, tsc_sync0, soundwire0_clk, soundwire0_dat0,
58 l0l1_rst_out_n, l2_rst_out_n, uartl_txd, uartl_rxd, i2s9_sclk,
59 i2s9_sdata_out, i2s9_sdata_in, i2s9_lrck, dmic5_dat, dmic5_clk,
60 tsc_edge_out2 ]
61
62 # out of the common properties, only these are allowed for Tegra264
63 nvidia,pins: true
64 nvidia,pull: true
65 nvidia,tristate: true
66 nvidia,schmitt: true
67 nvidia,enable-input: true
68 nvidia,open-drain: true
69 nvidia,lock: true
70 nvidia,drive-type: true
71 nvidia,io-hv: true
72
73required:
74 - nvidia,pins
75
76# We would typically use unevaluatedProperties here but that has the
77# downside that all the properties in the common bindings become valid
78# for all chip generations. In this case, however, we want the per-SoC
79# bindings to be able to override which of the common properties are
80# allowed, since not all pinmux generations support the same sets of
81# properties. This way, the common bindings define the format of the
82# properties but the per-SoC bindings define which of them apply to a
83# given chip.
84additionalProperties: false
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml+167−0
@@ -0,0 +1,167 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-main.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra264 Main Pinmux Controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14 compatible:
15 const: nvidia,tegra264-pinmux-main
16
17 reg:
18 maxItems: 1
19
20patternProperties:
21 "^pinmux(-[a-z0-9-]+)?$":
22 type: object
23
24 # pin groups
25 additionalProperties:
26 $ref: nvidia,tegra264-pinmux-common.yaml
27
28 properties:
29 nvidia,pins:
30 items:
31 enum: [ pwm1_pa0, pwm6_pa1, pwm7_pa2, pwm8_pa3, ufs0_ref_clk_pa4,
32 ufs0_rst_n_pa5, soc_gpio250_pf0, soc_gpio251_pf1,
33 soc_gpio252_pf2, dp_aux_ch0_hpd_pf3, dp_aux_ch1_hpd_pf4,
34 dp_aux_ch2_hpd_pf5, dp_aux_ch3_hpd_pf6, pwm2_pf7, pwm3_pg0,
35 gen7_i2c_scl_pg1, gen7_i2c_sda_pg2, gen9_i2c_scl_pg3,
36 gen9_i2c_sda_pg4, sdmmc1_clk_px0, sdmmc1_cmd_px1,
37 sdmmc1_dat0_px2, sdmmc1_dat1_px3, sdmmc1_dat2_px4,
38 sdmmc1_dat3_px5, sdmmc1_comp, soc_gpio124_pl0,
39 soc_gpio125_pl1, fan_tach0_pl2, soc_gpio127_pl3,
40 soc_gpio128_pl4, soc_gpio129_pl5, soc_gpio130_pl6,
41 soc_gpio131_pl7, gp_pwm9_pm0, soc_gpio133_pm1, uart9_tx_pm2,
42 uart9_rx_pm3, uart9_rts_n_pm4, uart9_cts_n_pm5,
43 soc_gpio170_pu0, soc_gpio171_pu1, soc_gpio172_pu2,
44 soc_gpio173_pu3, soc_gpio174_pu4, soc_gpio175_pu5,
45 soc_gpio176_pu6, soc_gpio177_pu7, soc_gpio178_pv0,
46 pwm10_pv1, uart4_tx_pv2, uart4_rx_pv3, uart4_rts_n_pv4,
47 uart4_cts_n_pv5, dap2_clk_pv6, dap2_din_pv7, dap2_dout_pw0,
48 dap2_fs_pw1, gen1_i2c_scl_pw2, gen1_i2c_sda_pw3,
49 gen0_i2c_scl_pw4, gen0_i2c_sda_pw5, pwr_i2c_scl_pw6,
50 pwr_i2c_sda_pw7, soc_gpio138_pp0, soc_gpio139_pp1,
51 dap6_sclk_pp2, dap6_dout_pp3, dap6_din_pp4, dap6_fs_pp5,
52 dap4_sclk_pp6, dap4_dout_pp7, dap4_din_pq0, dap4_fs_pq1,
53 spi5_sck_pq2, spi5_miso_pq3, spi5_mosi_pq4, spi5_cs0_pq5,
54 soc_gpio152_pq6, soc_gpio153_pq7, aud_mclk_pr0,
55 soc_gpio155_pr1, dap1_sclk_pr2, dap1_out_pr3, dap1_in_pr4,
56 dap1_fs_pr5, gen11_i2c_scl_pr6, gen11_i2c_sda_pr7,
57 soc_gpio350_ps0, soc_gpio351_ps1, qspi0_sck_pt0,
58 qspi0_cs_n_pt1, qspi0_io0_pt2, qspi0_io1_pt3, qspi0_io2_pt4,
59 qspi0_io3_pt5, soc_gpio192_pt6, soc_gpio270_py0,
60 soc_gpio271_py1, soc_gpio272_py2, soc_gpio273_py3,
61 soc_gpio274_py4, soc_gpio275_py5, soc_gpio276_py6,
62 soc_gpio277_py7, soc_gpio278_pz0, soc_gpio279_pz1,
63 xhalt_trig_pz2, soc_gpio281_pz3, soc_gpio282_pz4,
64 soc_gpio283_pz5, soc_gpio284_pz6, soc_gpio285_pz7,
65 soc_gpio286_pal0, soc_gpio287_pal1, soc_gpio288_pal2,
66 cpu_pwr_req_ph0, gpu_pwr_req_ph1, uart10_tx_ph2,
67 uart10_rx_ph3, uart10_rts_n_ph4, uart10_cts_n_ph5,
68 spi3_sck_ph6, spi3_miso_ph7, spi3_mosi_pj0, spi3_cs0_pj1,
69 spi3_cs3_pj2, uart5_tx_pj3, uart5_rx_pj4, uart5_rts_n_pj5,
70 uart5_cts_n_pj6, spi1_sck_pj7, spi1_miso_pk0, spi1_mosi_pk1,
71 spi1_cs0_pk2, spi1_cs1_pk3, extperiph1_clk_pk4,
72 extperiph2_clk_pk5, gen12_i2c_scl_pk6, gen12_i2c_sda_pk7,
73 drive_cpu_pwr_req_ph0, drive_gpu_pwr_req_ph1,
74 drive_uart10_cts_n_ph5, drive_uart10_rts_n_ph4,
75 drive_uart10_rx_ph3, drive_uart10_tx_ph2,
76 drive_spi3_cs0_pj1, drive_spi3_cs3_pj2,
77 drive_spi3_miso_ph7, drive_spi3_mosi_pj0,
78 drive_spi3_sck_ph6, drive_uart5_cts_n_pj6,
79 drive_uart5_rts_n_pj5, drive_uart5_rx_pj4,
80 drive_uart5_tx_pj3, drive_spi1_cs0_pk2,
81 drive_spi1_cs1_pk3, drive_spi1_miso_pk0,
82 drive_spi1_mosi_pk1, drive_spi1_sck_pj7,
83 drive_extperiph2_clk_pk5, drive_extperiph1_clk_pk4,
84 drive_gen12_i2c_scl_pk6, drive_gen12_i2c_sda_pk7,
85 drive_soc_gpio124_pl0, drive_soc_gpio125_pl1,
86 drive_fan_tach0_pl2, drive_soc_gpio127_pl3,
87 drive_soc_gpio128_pl4, drive_soc_gpio129_pl5,
88 drive_soc_gpio130_pl6, drive_soc_gpio131_pl7,
89 drive_gp_pwm9_pm0, drive_soc_gpio133_pm1,
90 drive_uart9_cts_n_pm5, drive_uart9_rts_n_pm4,
91 drive_uart9_rx_pm3, drive_uart9_tx_pm2,
92 drive_sdmmc1_clk_px0, drive_sdmmc1_cmd_px1,
93 drive_sdmmc1_dat3_px5, drive_sdmmc1_dat2_px4,
94 drive_sdmmc1_dat1_px3, drive_sdmmc1_dat0_px2,
95 drive_qspi0_cs_n_pt1, drive_qspi0_io0_pt2,
96 drive_qspi0_io1_pt3, drive_qspi0_io2_pt4,
97 drive_qspi0_io3_pt5, drive_qspi0_sck_pt0,
98 drive_soc_gpio192_pt6, drive_soc_gpio138_pp0,
99 drive_soc_gpio139_pp1, drive_dap6_din_pp4,
100 drive_dap6_dout_pp3, drive_dap6_fs_pp5,
101 drive_dap6_sclk_pp2, drive_dap4_dout_pp7,
102 drive_dap4_sclk_pp6, drive_dap4_din_pq0,
103 drive_dap4_fs_pq1, drive_spi5_cs0_pq5,
104 drive_spi5_miso_pq3, drive_spi5_mosi_pq4,
105 drive_spi5_sck_pq2, drive_soc_gpio152_pq6,
106 drive_soc_gpio153_pq7, drive_soc_gpio155_pr1,
107 drive_aud_mclk_pr0, drive_dap1_sclk_pr2,
108 drive_dap1_in_pr4, drive_dap1_out_pr3,
109 drive_dap1_fs_pr5, drive_gen11_i2c_scl_pr6,
110 drive_gen11_i2c_sda_pr7, drive_soc_gpio350_ps0,
111 drive_soc_gpio351_ps1, drive_gen0_i2c_scl_pw4,
112 drive_gen0_i2c_sda_pw5, drive_gen1_i2c_scl_pw2,
113 drive_gen1_i2c_sda_pw3, drive_dap2_fs_pw1,
114 drive_dap2_clk_pv6, drive_dap2_din_pv7,
115 drive_dap2_dout_pw0, drive_pwm10_pv1,
116 drive_soc_gpio170_pu0, drive_soc_gpio171_pu1,
117 drive_soc_gpio172_pu2, drive_soc_gpio173_pu3,
118 drive_soc_gpio174_pu4, drive_soc_gpio175_pu5,
119 drive_soc_gpio176_pu6, drive_soc_gpio177_pu7,
120 drive_soc_gpio178_pv0, drive_uart4_cts_n_pv5,
121 drive_uart4_rts_n_pv4, drive_uart4_rx_pv3,
122 drive_uart4_tx_pv2, drive_pwr_i2c_sda_pw7,
123 drive_pwr_i2c_scl_pw6, drive_soc_gpio250_pf0,
124 drive_soc_gpio251_pf1, drive_soc_gpio252_pf2,
125 drive_dp_aux_ch0_hpd_pf3, drive_dp_aux_ch1_hpd_pf4,
126 drive_dp_aux_ch2_hpd_pf5, drive_dp_aux_ch3_hpd_pf6,
127 drive_pwm2_pf7, drive_pwm3_pg0,
128 drive_gen7_i2c_scl_pg1, drive_gen7_i2c_sda_pg2,
129 drive_gen9_i2c_scl_pg3, drive_gen9_i2c_sda_pg4,
130 drive_soc_gpio270_py0, drive_soc_gpio271_py1,
131 drive_soc_gpio272_py2, drive_soc_gpio273_py3,
132 drive_soc_gpio274_py4, drive_soc_gpio275_py5,
133 drive_soc_gpio276_py6, drive_soc_gpio277_py7,
134 drive_soc_gpio278_pz0, drive_soc_gpio279_pz1,
135 drive_soc_gpio282_pz4, drive_soc_gpio283_pz5,
136 drive_soc_gpio284_pz6, drive_soc_gpio285_pz7,
137 drive_soc_gpio286_pal0, drive_soc_gpio287_pal1,
138 drive_soc_gpio288_pal2, drive_xhalt_trig_pz2,
139 drive_soc_gpio281_pz3 ]
140
141required:
142 - compatible
143 - reg
144
145additionalProperties: false
146
147examples:
148 - |
149 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
150
151 pinmux@c281000 {
152 compatible = "nvidia,tegra264-pinmux-main";
153 reg = <0xc281000 0xc000>;
154
155 pinctrl-names = "default";
156 pinctrl-0 = <&state_default>;
157
158 state_default: pinmux-default {
159 sdmmc1 {
160 nvidia,pins = "sdmmc1_clk_px0";
161 nvidia,function = "sdmmc1_cd";
162 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
163 nvidia,tristate = <TEGRA_PIN_DISABLE>;
164 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
165 };
166 };
167 };
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-uphy.yaml+78−0
@@ -0,0 +1,78 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-uphy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra264 UPHY Pinmux Controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14 compatible:
15 const: nvidia,tegra264-pinmux-uphy
16
17 reg:
18 maxItems: 1
19
20patternProperties:
21 "^pinmux(-[a-z0-9-]+)?$":
22 type: object
23
24 # pin groups
25 additionalProperties:
26 $ref: nvidia,tegra264-pinmux-common.yaml
27
28 properties:
29 nvidia,pins:
30 items:
31 enum: [ eth1_mdio_pe0, pex_l4_clkreq_n_pd0, pex_l4_rst_n_pd1,
32 pex_l5_clkreq_n_pd2, pex_l5_rst_n_pd3, eth0_mdio_pd4,
33 eth0_mdc_pd5, eth1_mdc_pe1, eth2_mdio_pe2, eth2_mdc_pe3,
34 eth3_mdio_pd6, eth3_mdc_pd7, pex_l1_clkreq_n_pb0,
35 pex_l1_rst_n_pb1, pex_wake_n_pc2, pex_l2_rst_n_pb3,
36 pex_l2_clkreq_n_pb2, pex_l3_clkreq_n_pb4, pex_l3_rst_n_pb5,
37 sgmii0_sma_mdio_pc0, sgmii0_sma_mdc_pc1, soc_gpio113_pb6,
38 soc_gpio114_pb7, pwm1_pa0, pwm6_pa1, pwm7_pa2, pwm8_pa3,
39 ufs0_ref_clk_pa4, ufs0_rst_n_pa5, drive_eth1_mdio_pe0,
40 drive_pex_l4_clkreq_n_pd0, drive_pex_l4_rst_n_pd1,
41 drive_pex_l5_clkreq_n_pd2, drive_pex_l5_rst_n_pd3,
42 drive_eth0_mdio_pd4, drive_eth0_mdc_pd5, drive_eth1_mdc_pe1,
43 drive_eth2_mdio_pe2, drive_eth2_mdc_pe3, drive_eth3_mdio_pd6,
44 drive_eth3_mdc_pd7, drive_pex_l1_clkreq_n_pb0,
45 drive_pex_l1_rst_n_pb1, drive_pex_wake_n_pc2,
46 drive_pex_l2_rst_n_pb3, drive_pex_l2_clkreq_n_pb2,
47 drive_pex_l3_clkreq_n_pb4, drive_pex_l3_rst_n_pb5,
48 drive_sgmii0_sma_mdio_pc0, drive_sgmii0_sma_mdc_pc1,
49 drive_soc_gpio113_pb6, drive_soc_gpio114_pb7,
50 drive_pwm1_pa0, drive_pwm6_pa1, drive_pwm7_pa2,
51 drive_pwm8_pa3, drive_ufs0_ref_clk_pa4, drive_ufs0_rst_n_pa5 ]
52
53required:
54 - compatible
55 - reg
56
57additionalProperties: false
58
59examples:
60 - |
61 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
62
63 pinmux@82e0000 {
64 compatible = "nvidia,tegra264-pinmux-uphy";
65 reg = <0x82e0000 0x4000>;
66
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinmux_default>;
69
70 pinmux_default: pinmux-default {
71 pex {
72 nvidia,pins = "pex_l1_rst_n_pb1";
73 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
74 nvidia,tristate = <TEGRA_PIN_DISABLE>;
75 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
76 };
77 };
78 };
Documentation/devicetree/bindings/pinctrl/pinctrl-multiplexer.yaml+57−0
@@ -0,0 +1,57 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/pinctrl-multiplexer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Generic pinctrl device for on-board MUX Chips
8
9maintainers:
10 - Frank Li <Frank.Li@nxp.com>
11
12description:
13 Generic pinctrl device for on-board MUX Chips, which switch SoC signals
14 between different peripherals (e.g. MMC and UART).
15
16 The MUX select lines are often driven by a I2C GPIO expander.
17
18properties:
19 compatible:
20 const: pinctrl-multiplexer
21
22patternProperties:
23 '-grp$':
24 type: object
25 additionalProperties: false
26 properties:
27 mux-states:
28 maxItems: 1
29
30 required:
31 - mux-states
32
33required:
34 - compatible
35
36allOf:
37 - $ref: pinctrl.yaml#
38
39unevaluatedProperties: false
40
41examples:
42 - |
43 pinctrl-mux {
44 compatible = "pinctrl-multiplexer";
45
46 uart-grp {
47 mux-states = <&mux 0>;
48 };
49
50 spi-grp {
51 mux-states = <&mux 1>;
52 };
53
54 i2c-grp {
55 mux-states = <&mux 2>;
56 };
57 };
Documentation/devicetree/bindings/pinctrl/pinctrl.yaml+1−1
@@ -27,7 +27,7 @@ description: | · 26 unmodified lines
27 27
28properties:28properties:
29 $nodename:29 $nodename:
30 pattern: "^(pinctrl|pinmux)(@[0-9a-f]+)?$"30 pattern: "^(pinctrl|pinmux)(@[0-9a-f]+|-[a-z0-9]+)?$"
31 31
32 "#pinctrl-cells":32 "#pinctrl-cells":
33 description: >33 description: >
Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml+16−10
@@ -86,16 +86,22 @@ $defs: · 85 unmodified lines
86 qdss_gpio_tracectl, qdss_gpio_tracedata, qlink_big_enable,86 qdss_gpio_tracectl, qdss_gpio_tracedata, qlink_big_enable,
87 qlink_big_request, qlink_little_enable,87 qlink_big_request, qlink_little_enable,
88 qlink_little_request, qlink_wmss, qspi0, qspi_clk,88 qlink_little_request, qlink_wmss, qspi0, qspi_clk,
89 qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se3, qup1_se4,89 qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se2_l2_mira,
90 qup1_se5, qup1_se6, qup1_se7, qup2_se0, qup2_se1,90 qup1_se2_l2_mirb, qup1_se2_l3_mira, qup1_se2_l3_mirb,
91 qup2_se2, qup2_se3, qup2_se4, qup2_se5, qup2_se6,91 qup1_se3, qup1_se4_01, qup1_se4_23,
92 qup2_se7, resout_gpio, sd_write_protect, sdc1, sdc2,92 qup1_se5, qup1_se6, qup1_se6_l1_mira,
93 sdc2_fb_clk, tb_trig_sdc1, tb_trig_sdc2, tmess_prng0,93 qup1_se6_l1_mirb, qup1_se6_l3_mira, qup1_se6_l3_mirb,
94 tmess_prng1, tmess_prng2, tmess_prng3, tsense_pwm1,94 qup1_se7, qup1_se7_l0_mira, qup1_se7_l0_mirb,
95 tsense_pwm2, tsense_pwm3, tsense_pwm4, uim0_clk,95 qup1_se7_l1_mira, qup1_se7_l1_mirb, qup2_se0, qup2_se1,
96 uim0_data, uim0_present, uim0_reset, uim1_clk, uim1_data,96 qup2_se2, qup2_se3, qup2_se3_l0_mira, qup2_se3_l0_mirb,
97 uim1_present, uim1_reset, usb0_hs, usb_phy, vfr_0, vfr_1,97 qup2_se3_l1_mira, qup2_se3_l1_mirb, qup2_se4, qup2_se5,
98 vsense_trigger_mirnat, wcn_sw_ctrl ]98 qup2_se6, qup2_se7, resout_gpio, sd_write_protect, sdc1,
99 sdc2, sdc2_fb_clk, tb_trig_sdc1, tb_trig_sdc2,
100 tmess_prng0, tmess_prng1, tmess_prng2, tmess_prng3,
101 tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4,
102 uim0_clk, uim0_data, uim0_present, uim0_reset, uim1_clk,
103 uim1_data, uim1_present, uim1_reset, usb0_hs, usb_phy,
104 vfr_0, vfr_1, vsense_trigger_mirnat, wcn_sw_ctrl ]
99 required:105 required:
100 - pins106 - pins
101 107
Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.yaml+0−5
@@ -36,11 +36,6 @@ patternProperties: · 35 unmodified lines
36 $ref: "#/$defs/qcom-ipq4019-tlmm-state"36 $ref: "#/$defs/qcom-ipq4019-tlmm-state"
37 additionalProperties: false37 additionalProperties: false
38 38
39 "-hog(-[0-9]+)?$":
40 type: object
41 required:
42 - gpio-hog
43
44$defs:39$defs:
45 qcom-ipq4019-tlmm-state:40 qcom-ipq4019-tlmm-state:
46 type: object41 type: object
Documentation/devicetree/bindings/pinctrl/qcom,ipq9650-tlmm.yaml+118−0
@@ -0,0 +1,118 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,ipq9650-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm IPQ9650 TLMM pin controller
8
9maintainers:
10 - Bjorn Andersson <andersson@kernel.org>
11 - Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
12
13description:
14 Top Level Mode Multiplexer pin controller in Qualcomm IPQ9650 SoC.
15
16allOf:
17 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
18
19properties:
20 compatible:
21 const: qcom,ipq9650-tlmm
22
23 reg:
24 maxItems: 1
25
26 interrupts:
27 maxItems: 1
28
29 gpio-reserved-ranges:
30 minItems: 1
31 maxItems: 27
32
33 gpio-line-names:
34 maxItems: 54
35
36patternProperties:
37 "-state$":
38 oneOf:
39 - $ref: "#/$defs/qcom-ipq9650-tlmm-state"
40 - patternProperties:
41 "-pins$":
42 $ref: "#/$defs/qcom-ipq9650-tlmm-state"
43 additionalProperties: false
44
45$defs:
46 qcom-ipq9650-tlmm-state:
47 type: object
48 description:
49 Pinctrl node's client devices use subnodes for desired pin configuration.
50 Client device subnodes use below standard properties.
51 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
52 unevaluatedProperties: false
53
54 properties:
55 pins:
56 description:
57 List of gpio pins affected by the properties specified in this
58 subnode.
59 items:
60 pattern: "^gpio([0-9]|[1-4][0-9]|5[0-3])$"
61 minItems: 1
62 maxItems: 36
63
64 function:
65 description:
66 Specify the alternative function to be configured for the specified
67 pins.
68
69 enum: [ atest_char_start, atest_char_status0, atest_char_status1,
70 atest_char_status2, atest_char_status3, atest_tic_en,
71 audio_pri_mclk_in0, audio_pri_mclk_out0, audio_pri_mclk_in1,
72 audio_pri_mclk_out1, audio_pri, audio_sec, audio_sec_mclk_in0,
73 audio_sec_mclk_out0, audio_sec_mclk_in1, audio_sec_mclk_out1,
74 core_voltage_0, core_voltage_1, core_voltage_2, core_voltage_3,
75 core_voltage_4, cri_rng0, cri_rng1, cri_rng2, dbg_out_clk,
76 gcc_plltest_bypassnl, gcc_plltest_resetn, gcc_tlmm, gpio,
77 mdc_mst, mdc_slv0, mdc_slv1, mdio_mst, mdio_slv, mdio_slv0,
78 mdio_slv1, pcie0_clk_req_n, pcie0_wake, pcie1_clk_req_n,
79 pcie1_wake, pcie2_clk_req_n, pcie2_wake, pcie3_clk_req_n,
80 pcie3_wake, pcie4_clk_req_n, pcie4_wake, pll_bist_sync,
81 pll_test, pwm, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
82 qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,
83 qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, qdss_cti_trig_out_b1,
84 qdss_traceclk_a, qdss_tracectl_a, qdss_tracedata_a, qspi_data,
85 qspi_clk, qspi_cs_n, qup_se0, qup_se1, qup_se2, qup_se3,
86 qup_se4, qup_se5, qup_se6, qup_se7, resout, rx_los0, rx_los1,
87 rx_los2, sdc_clk, sdc_cmd, sdc_data, tsens_max, tsn ]
88
89 required:
90 - pins
91
92required:
93 - compatible
94 - reg
95
96unevaluatedProperties: false
97
98examples:
99 - |
100 #include <dt-bindings/interrupt-controller/arm-gic.h>
101
102 tlmm: pinctrl@1000000 {
103 compatible = "qcom,ipq9650-tlmm";
104 reg = <0x01000000 0x300000>;
105 gpio-controller;
106 #gpio-cells = <2>;
107 gpio-ranges = <&tlmm 0 0 54>;
108 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
109 interrupt-controller;
110 #interrupt-cells = <2>;
111
112 qup-uart1-default-state {
113 pins = "gpio43", "gpio44";
114 function = "qup_se6";
115 drive-strength = <8>;
116 bias-pull-down;
117 };
118 };
Documentation/devicetree/bindings/pinctrl/qcom,nord-tlmm.yaml+141−0
@@ -0,0 +1,141 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,nord-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. SA8797P TLMM block
8
9maintainers:
10 - Bartosz Golaszewski <brgl@kernel.org>
11
12description:
13 Top Level Mode Multiplexer pin controller in Qualcomm SA8797P SoC.
14
15allOf:
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19 compatible:
20 const: qcom,nord-tlmm
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 gpio-reserved-ranges:
29 minItems: 1
30 maxItems: 90
31
32 gpio-line-names:
33 maxItems: 181
34
35patternProperties:
36 "-state$":
37 oneOf:
38 - $ref: "#/$defs/qcom-nord-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-nord-tlmm-state"
42 additionalProperties: false
43
44$defs:
45 qcom-nord-tlmm-state:
46 type: object
47 description:
48 Pinctrl node's client devices use subnodes for desired pin configuration.
49 Client device subnodes use below standard properties.
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51 unevaluatedProperties: false
52
53 properties:
54 pins:
55 description:
56 List of gpio pins affected by the properties specified in this
57 subnode.
58 items:
59 oneOf:
60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9]|180)$"
61 - enum: [ ufs_reset ]
62 minItems: 1
63 maxItems: 16
64
65 function:
66 description:
67 Specify the alternative function to be configured for the specified
68 pins.
69
70 enum: [ aoss_cti, atest_char, atest_usb20, atest_usb21,
71 aud_intfc0_clk, aud_intfc0_data, aud_intfc0_ws,
72 aud_intfc10_clk, aud_intfc10_data, aud_intfc10_ws,
73 aud_intfc1_clk, aud_intfc1_data, aud_intfc1_ws,
74 aud_intfc2_clk, aud_intfc2_data, aud_intfc2_ws,
75 aud_intfc3_clk, aud_intfc3_data, aud_intfc3_ws,
76 aud_intfc4_clk, aud_intfc4_data, aud_intfc4_ws,
77 aud_intfc5_clk, aud_intfc5_data, aud_intfc5_ws,
78 aud_intfc6_clk, aud_intfc6_data, aud_intfc6_ws,
79 aud_intfc7_clk, aud_intfc7_data, aud_intfc7_ws,
80 aud_intfc8_clk, aud_intfc8_data, aud_intfc8_ws,
81 aud_intfc9_clk, aud_intfc9_data, aud_intfc9_ws,
82 aud_mclk0_mira, aud_mclk0_mirb, aud_mclk1_mira, aud_mclk1_mirb,
83 aud_mclk2_mira, aud_mclk2_mirb, aud_refclk0, aud_refclk1,
84 bist_done, ccu_async_in, ccu_i2c_scl, ccu_i2c_sda, ccu_timer,
85 clink_debug, dbg_out, dbg_out_clk,
86 ddr_bist_complete, ddr_bist_fail, ddr_bist_start, ddr_bist_stop,
87 ddr_pxi, dp_rx0, dp_rx00, dp_rx01, dp_rx0_mute, dp_rx1, dp_rx10,
88 dp_rx11, dp_rx1_mute,
89 edp0_hot, edp0_lcd, edp1_hot, edp1_lcd, edp2_hot, edp2_lcd,
90 edp3_hot, edp3_lcd,
91 emac0_mcg, emac0_mdc, emac0_mdio, emac0_ptp, emac1_mcg,
92 emac1_mdc, emac1_mdio, emac1_ptp,
93 gcc_gp1_clk, gcc_gp2_clk, gcc_gp3_clk, gcc_gp4_clk, gcc_gp5_clk,
94 gcc_gp6_clk, gcc_gp7_clk, gcc_gp8_clk, jitter_bist, lbist_pass,
95 mbist_pass, mdp0_vsync_out, mdp1_vsync_out, mdp_vsync_e,
96 mdp_vsync_p, mdp_vsync_s,
97 pcie0_clk_req_n, pcie1_clk_req_n, pcie2_clk_req_n,
98 pcie3_clk_req_n, phase_flag, pll_bist_sync, pll_clk_aux,
99 prng_rosc0, prng_rosc1, pwrbrk_i_n, qdss, qdss_cti, qspi,
100 qup0_se0, qup0_se1, qup0_se2, qup0_se3, qup0_se4, qup0_se5,
101 qup1_se0, qup1_se1, qup1_se3, qup1_se2, qup1_se4, qup1_se5,
102 qup1_se6, qup2_se0, qup2_se1, qup2_se2, qup2_se3, qup2_se4,
103 qup2_se5, qup2_se6,
104 sailss_ospi, sdc4_clk, sdc4_cmd, sdc4_data, smb_alert,
105 smb_alert_n, smb_clk, smb_dat, tb_trig_sdc4, tmess_prng0,
106 tmess_prng1, tsc_timer, tsense_pwm, usb0_hs,
107 usb0_phy_ps, usb1_hs, usb1_phy_ps, usb2_hs, usxgmii0_phy,
108 usxgmii1_phy, vsense_trigger_mirnat, wcn_sw, wcn_sw_ctrl]
109
110 required:
111 - pins
112
113required:
114 - compatible
115 - reg
116
117unevaluatedProperties: false
118
119examples:
120 - |
121 #include <dt-bindings/interrupt-controller/arm-gic.h>
122
123 tlmm: pinctrl@f100000 {
124 compatible = "qcom,nord-tlmm";
125 reg = <0x0f100000 0xc0000>;
126 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
127 gpio-controller;
128 #gpio-cells = <2>;
129 interrupt-controller;
130 #interrupt-cells = <2>;
131 gpio-ranges = <&tlmm 0 0 181>;
132 wakeup-parent = <&pdc>;
133
134 qup_uart15_default: qup-uart15-default-state {
135 pins = "gpio147", "gpio148";
136 function = "qup2_se2";
137 drive-strength = <2>;
138 bias-disable;
139 };
140 };
141...
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml+3−0
@@ -30,6 +30,7 @@ properties: · 29 unmodified lines
30 - qcom,pm7550-gpio30 - qcom,pm7550-gpio
31 - qcom,pm7550ba-gpio31 - qcom,pm7550ba-gpio
32 - qcom,pm8005-gpio32 - qcom,pm8005-gpio
33 - qcom,pm8010-gpio
33 - qcom,pm8018-gpio34 - qcom,pm8018-gpio
34 - qcom,pm8019-gpio35 - qcom,pm8019-gpio
35 - qcom,pm8038-gpio36 - qcom,pm8038-gpio
@@ -134,6 +135,7 @@ allOf: · 98 unmodified lines
134 compatible:135 compatible:
135 contains:136 contains:
136 enum:137 enum:
138 - qcom,pm8010-gpio
137 - qcom,pmi8950-gpio139 - qcom,pmi8950-gpio
138 - qcom,pmr735d-gpio140 - qcom,pmr735d-gpio
139 then:141 then:
@@ -465,6 +467,7 @@ $defs: · 325 unmodified lines
465 - gpio1-gpio10 for pm7325467 - gpio1-gpio10 for pm7325
466 - gpio1-gpio8 for pm7550ba468 - gpio1-gpio8 for pm7550ba
467 - gpio1-gpio4 for pm8005469 - gpio1-gpio4 for pm8005
470 - gpio1-gpio2 for pm8010
468 - gpio1-gpio6 for pm8018471 - gpio1-gpio6 for pm8018
469 - gpio1-gpio12 for pm8038472 - gpio1-gpio12 for pm8038
470 - gpio1-gpio40 for pm8058473 - gpio1-gpio40 for pm8058
Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml+0−5
@@ -42,11 +42,6 @@ patternProperties: · 41 unmodified lines
42 $ref: "#/$defs/qcom-sdm845-tlmm-state"42 $ref: "#/$defs/qcom-sdm845-tlmm-state"
43 additionalProperties: false43 additionalProperties: false
44 44
45 "-hog(-[0-9]+)?$":
46 type: object
47 required:
48 - gpio-hog
49
50$defs:45$defs:
51 qcom-sdm845-tlmm-state:46 qcom-sdm845-tlmm-state:
52 type: object47 type: object
Documentation/devicetree/bindings/pinctrl/qcom,shikra-tlmm.yaml+123−0
@@ -0,0 +1,123 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,shikra-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. Shikra TLMM block
8
9maintainers:
10 - Komal Bajaj <komal.bajaj@oss.qualcomm.com>
11
12description: |
13 Top Level Mode Multiplexer pin controller in Qualcomm Shikra SoC.
14
15allOf:
16 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19 compatible:
20 const: qcom,shikra-tlmm
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 gpio-reserved-ranges:
29 minItems: 1
30 maxItems: 83
31
32 gpio-line-names:
33 maxItems: 166
34
35patternProperties:
36 "-state$":
37 oneOf:
38 - $ref: "#/$defs/qcom-shikra-tlmm-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-shikra-tlmm-state"
42 additionalProperties: false
43
44$defs:
45 qcom-shikra-tlmm-state:
46 type: object
47 description:
48 Pinctrl node's client devices use subnodes for desired pin configuration.
49 Client device subnodes use below standard properties.
50 $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
51 unevaluatedProperties: false
52
53 properties:
54 pins:
55 description:
56 List of gpio pins affected by the properties specified in this
57 subnode.
58 items:
59 oneOf:
60 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-5][0-9]|16[0-5])$"
61 - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,
62 sdc2_clk, sdc2_cmd, sdc2_data ]
63 minItems: 1
64 maxItems: 36
65
66 function:
67 description:
68 Specify the alternative function to be configured for the specified
69 pins.
70
71 enum: [ gpio, agera_pll, atest_bbrx, atest_char, atest_gpsadc,
72 atest_tsens, atest_usb, cam_mclk, cci_async, cci_i2c0,
73 cci_i2c1, cci_timer, char_exec, cri_trng, dac_calib,
74 dbg_out_clk, ddr_bist, ddr_pxi, dmic, emac_dll, emac_mcg,
75 emac_phy, emac0_ptp_aux, emac0_ptp_pps, emac1_ptp_aux,
76 emac1_ptp_pps, ext_mclk, gcc_gp, gsm0_tx, i2s0, i2s1,
77 i2s2, i2s3, jitter_bist, m_voc, mdp_vsync_e, mdp_vsync_out0,
78 mdp_vsync_out1, mdp_vsync_p, mdp_vsync_s, mpm_pwr, mss_lte,
79 nav_gpio, pa_indicator_or, pbs_in, pbs_out, pcie0_clk_req_n,
80 phase_flag, pll, prng_rosc, pwm, qdss_cti, qup0_se0,
81 qup0_se1, qup0_se1_01, qup0_se1_23, qup0_se2, qup0_se3_01,
82 qup0_se3_23, qup0_se4_01, qup0_se4_23, qup0_se5, qup0_se6,
83 qup0_se7_01, qup0_se7_23, qup0_se8, qup0_se9, qup0_se9_01,
84 qup0_se9_23, rgmii, sd_write_protect, sdc_cdc, sdc_tb_trig,
85 ssbi_wtr, swr0_rx, swr0_tx, tgu_ch_trigout, tsc_async,
86 tsense_pwm, uim1, uim2, unused_adsp, unused_gsm1, usb0_phy_ps,
87 vfr, vsense_trigger_mirnat, wlan ]
88
89 required:
90 - pins
91
92required:
93 - compatible
94 - reg
95
96unevaluatedProperties: false
97
98examples:
99 - |
100 #include <dt-bindings/interrupt-controller/arm-gic.h>
101
102 tlmm: pinctrl@500000 {
103 compatible = "qcom,shikra-tlmm";
104 reg = <0x00500000 0x800000>;
105
106 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
107
108 gpio-controller;
109 #gpio-cells = <2>;
110
111 interrupt-controller;
112 #interrupt-cells = <2>;
113
114 gpio-ranges = <&tlmm 0 0 166>;
115
116 qup-uart0-default-state {
117 pins = "gpio0", "gpio1";
118 function = "qup0_se1";
119 drive-strength = <2>;
120 bias-disable;
121 };
122 };
123...
Documentation/devicetree/bindings/pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml+124−0
@@ -0,0 +1,124 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM6350 SoC LPASS LPI TLMM
8
9maintainers:
10 - Luca Weiss <luca.weiss@fairphone.com>
11
12description:
13 Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
14 (LPASS) Low Power Island (LPI) of Qualcomm SM6350 SoC.
15
16properties:
17 compatible:
18 const: qcom,sm6350-lpass-lpi-pinctrl
19
20 reg:
21 items:
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
24
25 clocks:
26 items:
27 - description: LPASS Core voting clock
28 - description: LPASS Audio voting clock
29
30 clock-names:
31 items:
32 - const: core
33 - const: audio
34
35patternProperties:
36 "-state$":
37 oneOf:
38 - $ref: "#/$defs/qcom-sm6350-lpass-state"
39 - patternProperties:
40 "-pins$":
41 $ref: "#/$defs/qcom-sm6350-lpass-state"
42 additionalProperties: false
43
44$defs:
45 qcom-sm6350-lpass-state:
46 type: object
47 description:
48 Pinctrl node's client devices use subnodes for desired pin configuration.
49 Client device subnodes use below standard properties.
50 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
51 unevaluatedProperties: false
52
53 properties:
54 pins:
55 description:
56 List of gpio pins affected by the properties specified in this
57 subnode.
58 items:
59 pattern: "^gpio([0-9]|1[0-4])$"
60
61 function:
62 enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk,
63 dmic3_data, gpio, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk,
64 i2s2_data, i2s2_ws, qua_mi2s_data, qua_mi2s_sclk, qua_mi2s_ws,
65 swr_rx_clk, swr_rx_data, swr_tx_clk, swr_tx_data, wsa_swr_clk,
66 wsa_swr_data ]
67 description:
68 Specify the alternative function to be configured for the specified
69 pins.
70
71allOf:
72 - $ref: qcom,lpass-lpi-common.yaml#
73
74required:
75 - compatible
76 - reg
77 - clocks
78 - clock-names
79
80unevaluatedProperties: false
81
82examples:
83 - |
84 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
85
86 lpass_tlmm: pinctrl@33c0000 {
87 compatible = "qcom,sm6350-lpass-lpi-pinctrl";
88 reg = <0x033c0000 0x20000>,
89 <0x03550000 0x10000>;
90 gpio-controller;
91 #gpio-cells = <2>;
92 gpio-ranges = <&lpass_tlmm 0 0 15>;
93
94 clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
95 <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
96 clock-names = "core",
97 "audio";
98
99 i2s1_active: i2s1-active-state {
100 clk-pins {
101 pins = "gpio6";
102 function = "i2s1_clk";
103 drive-strength = <8>;
104 bias-disable;
105 output-high;
106 };
107
108 ws-pins {
109 pins = "gpio7";
110 function = "i2s1_ws";
111 drive-strength = <8>;
112 bias-disable;
113 output-high;
114 };
115
116 data-pins {
117 pins = "gpio8", "gpio9";
118 function = "i2s1_data";
119 drive-strength = <8>;
120 bias-disable;
121 output-high;
122 };
123 };
124 };
Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml+6−0
@@ -51,6 +51,12 @@ properties: · 50 unmodified lines
51 should not be accessed by the OS. Please see the ../gpio/gpio.txt for more51 should not be accessed by the OS. Please see the ../gpio/gpio.txt for more
52 information.52 information.
53 53
54patternProperties:
55 "-hog(-[0-9]+)?$":
56 type: object
57 required:
58 - gpio-hog
59
54allOf:60allOf:
55 - $ref: pinctrl.yaml#61 - $ref: pinctrl.yaml#
56 62
Documentation/devicetree/bindings/pinctrl/realtek,rtd1625-pinctrl.yaml+1−1
@@ -110,7 +110,7 @@ patternProperties: · 109 unmodified lines
110 110
111 input-schmitt-disable: true111 input-schmitt-disable: true
112 112
113 input-voltage-microvolt:113 input-threshold-voltage-microvolt:
114 description: |114 description: |
115 Select the input receiver voltage domain for the pin.115 Select the input receiver voltage domain for the pin.
116 Valid arguments are:116 Valid arguments are:
Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml+35−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
27 - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}27 - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
28 - renesas,r9a08g045-pinctrl # RZ/G3S28 - renesas,r9a08g045-pinctrl # RZ/G3S
29 - renesas,r9a08g046-pinctrl # RZ/G3L
29 - renesas,r9a09g047-pinctrl # RZ/G3E30 - renesas,r9a09g047-pinctrl # RZ/G3E
30 - renesas,r9a09g056-pinctrl # RZ/V2N31 - renesas,r9a09g056-pinctrl # RZ/V2N
31 - renesas,r9a09g057-pinctrl # RZ/V2H(P)32 - renesas,r9a09g057-pinctrl # RZ/V2H(P)
@@ -78,6 +79,26 @@ properties: · 46 unmodified lines
78 - description: PFC main reset79 - description: PFC main reset
79 - description: Reset for the control register related to WDTUDFCA and WDTUDFFCM pins80 - description: Reset for the control register related to WDTUDFCA and WDTUDFFCM pins
80 81
82 reset-names:
83 oneOf:
84 - items:
85 - const: rstn
86 - const: port
87 - const: spare
88 - items:
89 - const: main
90 - const: error
91
92 renesas,clonech:
93 $ref: /schemas/types.yaml#/definitions/phandle-array
94 items:
95 - items:
96 - description: phandle to system controller
97 - description: offset of clone channel control register
98 description:
99 Phandle and offset to the system controller containing the clone channel
100 control values.
101
81additionalProperties:102additionalProperties:
82 anyOf:103 anyOf:
83 - type: object104 - type: object
@@ -140,6 +161,15 @@ additionalProperties: · 56 unmodified lines
140allOf:161allOf:
141 - $ref: pinctrl.yaml#162 - $ref: pinctrl.yaml#
142 163
164 - if:
165 properties:
166 compatible:
167 contains:
168 const: renesas,r9a08g046-pinctrl
169 then:
170 required:
171 - renesas,clonech
172
143 - if:173 - if:
144 properties:174 properties:
145 compatible:175 compatible:
@@ -152,10 +182,14 @@ allOf: · 6 unmodified lines
152 properties:182 properties:
153 resets:183 resets:
154 maxItems: 2184 maxItems: 2
185 reset-names:
186 maxItems: 2
155 else:187 else:
156 properties:188 properties:
157 resets:189 resets:
158 minItems: 3190 minItems: 3
191 reset-names:
192 minItems: 3
159 193
160required:194required:
161 - compatible195 - compatible
@@ -187,6 +221,7 @@ examples: · 25 unmodified lines
187 resets = <&cpg R9A07G044_GPIO_RSTN>,221 resets = <&cpg R9A07G044_GPIO_RSTN>,
188 <&cpg R9A07G044_GPIO_PORT_RESETN>,222 <&cpg R9A07G044_GPIO_PORT_RESETN>,
189 <&cpg R9A07G044_GPIO_SPARE_RESETN>;223 <&cpg R9A07G044_GPIO_SPARE_RESETN>;
224 reset-names = "rstn", "port", "spare";
190 power-domains = <&cpg>;225 power-domains = <&cpg>;
191 226
192 scif0_pins: serial0 {227 scif0_pins: serial0 {
Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml+130−0
@@ -0,0 +1,130 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/ultrarisc,dp1000-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: UltraRISC DP1000 Pin Controller
8
9maintainers:
10 - Jia Wang <wangjia@ultrarisc.com>
11
12description: |
13 UltraRISC RISC-V SoC DP1000 pin controller.
14 The controller manages ports A, B, C, D and LPC. Ports A-D default to
15 GPIO and provide additional SPI, UART, I2C, and PWM mux functions.
16 LPC pins default to the LPC interface and can be muxed to eSPI.
17 All pins also support pin configuration, including drive strength,
18 pull-up, and pull-down settings.
19
20properties:
21 compatible:
22 const: ultrarisc,dp1000-pinctrl
23
24 reg:

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crypto/algif_skcipher.c+15−53

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crypto/api.c+10−66

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crypto/async_tx/async_raid6_recov.c+5−4

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crypto/df_sp80090a.c+0−222

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crypto/drbg.c+243−1530

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crypto/testmgr.c+29−148

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drivers/accel/amdxdna/aie2_ctx.c+162−58

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drivers/accel/amdxdna/aie2_error.c+14−10

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drivers/accel/amdxdna/aie2_message.c+185−153

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drivers/accel/amdxdna/aie2_pci.c+133−155

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drivers/accel/amdxdna/aie2_pci.h+42−119

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drivers/accel/amdxdna/aie2_pm.c+15−7

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drivers/accel/amdxdna/aie2_smu.c+0−156

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drivers/accel/amdxdna/aie2_solver.c+9−1

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drivers/accel/amdxdna/aie4_ctx.c+333−0

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drivers/accel/amdxdna/aie4_host_queue.h+24−0

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drivers/accel/amdxdna/aie4_message.c+83−0

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drivers/accel/amdxdna/aie4_pci.c+667−0

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drivers/accel/amdxdna/amdxdna_cbuf.c+280−0

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drivers/accel/amdxdna/amdxdna_ctx.c+121−4

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drivers/accel/amdxdna/amdxdna_gem.c+343−97

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drivers/accel/amdxdna/amdxdna_gem.h+15−3

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drivers/accel/amdxdna/amdxdna_iommu.c+80−39

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drivers/accel/amdxdna/amdxdna_mailbox.c+25−5

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drivers/accel/amdxdna/amdxdna_mailbox.h+4−4

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drivers/accel/amdxdna/amdxdna_pci_drv.c+159−53

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drivers/accel/amdxdna/amdxdna_pci_drv.h+33−4

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drivers/accel/amdxdna/amdxdna_sysfs.c+4−1

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drivers/accel/amdxdna/amdxdna_ubuf.c+8−54

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drivers/accel/amdxdna/npu1_regs.c+27−4

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drivers/accel/amdxdna/npu6_regs.c+6−5

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drivers/accel/ethosu/ethosu_drv.c+0−1

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drivers/accel/ethosu/ethosu_gem.c+26−9

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drivers/accel/ethosu/ethosu_job.c+15−4

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drivers/accel/ivpu/ivpu_hw_ip.c+8−8

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drivers/accel/ivpu/vpu_jsm_api.h+33−1

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drivers/accel/rocket/rocket_gem.c+12−5

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drivers/acpi/acpi_pad.c+16−22

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drivers/acpi/acpi_tad.c+1−1

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drivers/acpi/acpi_video.c+69−70

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drivers/acpi/acpica/acapps.h+2−2

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drivers/acpi/acpica/dsmethod.c+44−1

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drivers/acpi/acpica/dspkginit.c+1−1

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drivers/acpi/acpica/dswload2.c+1−1

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drivers/bluetooth/hci_h5.c+1−1

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drivers/bluetooth/hci_ldisc.c+40−8

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drivers/bluetooth/hci_qca.c+25−24

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drivers/bluetooth/hci_vhci.c+10−0

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drivers/bus/Kconfig+1−1

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drivers/bus/fsl-mc/dprc-driver.c+5−9

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drivers/bus/fsl-mc/fsl-mc-bus.c+47−3

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drivers/bus/fsl-mc/fsl-mc-msi.c+25−141

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drivers/bus/fsl-mc/fsl-mc-private.h+1−1

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drivers/bus/imx-weim.c+0−6

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drivers/bus/mhi/ep/main.c+7−5

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drivers/bus/mhi/host/init.c+0−1

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drivers/bus/mhi/host/pci_generic.c+25−11

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drivers/bus/sunxi-rsb.c+3−0

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drivers/bus/tegra-aconnect.c+6−8

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drivers/cache/hisi_soc_hha.c+0−1

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drivers/cache/sifive_ccache.c+2−0

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drivers/cdx/cdx.c+5−35

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drivers/cdx/cdx_msi.c+5−5

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drivers/cdx/controller/cdx_controller.c+0−1

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drivers/char/Kconfig+0−26

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drivers/char/Makefile+0−2

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drivers/char/agp/amd64-agp.c+1−1

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drivers/char/agp/efficeon-agp.c+1−0

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drivers/char/applicom.c+0−857

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drivers/char/applicom.h+0−86

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drivers/char/dtlk.c+0−663

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drivers/char/hpet.c+5−1

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drivers/char/hw_random/Kconfig+21−0

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drivers/char/hw_random/Makefile+2−0

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drivers/char/hw_random/airoha-trng.c+0−1

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drivers/char/hw_random/amd-rng.c+3−3

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drivers/char/hw_random/atmel-rng.c+0−1

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drivers/char/hw_random/ba431-rng.c+0−1

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drivers/char/hw_random/bcm74110-rng.c+0−1

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drivers/char/hw_random/cavium-rng.c+2−2

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drivers/char/hw_random/core.c+11−19

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drivers/char/hw_random/exynos-trng.c+0−1

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drivers/char/hw_random/geode-rng.c+2−2

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drivers/char/hw_random/hisi-trng-v2.c+98−0

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drivers/char/hw_random/histb-rng.c+0−1

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drivers/char/hw_random/imx-rngc.c+0−1

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drivers/char/hw_random/ingenic-trng.c+0−1

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drivers/char/hw_random/iproc-rng200.c+0−1

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drivers/char/hw_random/jh7110-trng.c+8−5

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drivers/char/hw_random/mtk-rng.c+106−21

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drivers/char/hw_random/pasemi-rng.c+0−1

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drivers/char/hw_random/pic32-rng.c+0−1

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drivers/char/hw_random/powernv-rng.c+0−1

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drivers/char/hw_random/s390-trng.c+3−2

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drivers/char/hw_random/virtio-rng.c+21−2

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drivers/char/hw_random/xgene-rng.c+0−1

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drivers/char/hw_random/xilinx-trng.crenamed from drivers/crypto/xilinx/xilinx-trng.c+23−113

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drivers/char/hw_random/xiphera-trng.c+0−1

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drivers/char/ipmi/ipmb_dev_int.c+2−2

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drivers/char/ipmi/ipmi_ipmb.c+2−2

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drivers/char/ipmi/ipmi_kcs_sm.c+1−1

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drivers/char/ipmi/ipmi_msghandler.c+12−12

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drivers/char/ipmi/ipmi_si_platform.c+7−4

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drivers/char/ipmi/ipmi_ssif.c+2−2

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drivers/char/ipmi/ssif_bmc.c+1−1

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drivers/char/mem.c+6−19

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drivers/char/nvram.c+3−13

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drivers/char/sonypi.c+8−3

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drivers/char/tlclk.c+4−0

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drivers/char/tpm/eventlog/tpm1.c+2−2

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drivers/char/tpm/tpm2-cmd.c+3−3

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drivers/char/tpm/tpm2-sessions.c+41−15

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drivers/char/tpm/tpm_crb.c+5−1

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drivers/char/tpm/tpm_crb_ffa.c+3−15

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drivers/char/tpm/tpm_svsm.c+1−1

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drivers/char/tpm/tpm_tis_core.c+41−22

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drivers/char/tpm/tpm_tis_core.h+2−1

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drivers/char/virtio_console.c+31−21

This diff is large: its 71 lines aren’t shown here.

drivers/clk/Kconfig+6−0

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drivers/clk/Makefile+2−1

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drivers/clk/aspeed/clk-ast2600.c+0−1

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drivers/clk/aspeed/clk-ast2700.c+0−1

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drivers/clk/at91/pmc.c+1−1

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drivers/clk/at91/sam9x7.c+10−11

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drivers/clk/at91/sama7d65.c+1−0

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drivers/clk/bcm/clk-iproc-asiu.c+10−17

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drivers/clk/clk-axi-clkgen.c+4−2

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drivers/clk/clk-bm1880.c+0−1

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drivers/clk/clk-bulk.c+8−6

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drivers/clk/clk-cdce706.c+0−1

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drivers/clk/clk-eyeq.c+0−1

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drivers/clk/clk-k230.c+2452−0

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drivers/clk/clk-max77686.c+13−19

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drivers/clk/clk-renesas-pcie.c+0−1

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drivers/clk/clk-scmi.c+8−40

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drivers/clk/clk-scpi.c+1−1

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drivers/clk/clk-si521xx.c+0−1

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drivers/clk/clk-versaclock5.c+0−1

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drivers/clk/hisilicon/clk.c+3−1

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drivers/clk/hisilicon/clkdivider-hi6220.c+9−17

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drivers/clk/imx/clk-imx8mp-audiomix.c+0−1

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drivers/clk/keystone/sci-clk.c+46−9

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drivers/clk/mediatek/clk-mt2701-g3d.c+0−1

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drivers/clk/mediatek/clk-mt2701.c+0−1

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drivers/clk/mediatek/clk-mt2712.c+0−1

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drivers/clk/mediatek/clk-mt6765.c+0−1

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drivers/clk/mediatek/clk-mt6779-aud.c+0−1

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drivers/clk/mediatek/clk-mt7622-eth.c+0−1

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drivers/clk/mediatek/clk-mt7622-hif.c+0−1

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drivers/clk/mediatek/clk-mt7622.c+0−1

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drivers/clk/mediatek/clk-mt7629-hif.c+0−1

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drivers/clk/mediatek/clk-mt7981-apmixed.c+0−1

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drivers/clk/mediatek/clk-mt7981-eth.c+0−1

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drivers/clk/mediatek/clk-mt7981-infracfg.c+0−1

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drivers/clk/mediatek/clk-mt7981-topckgen.c+0−1

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drivers/clk/mediatek/clk-mt7986-apmixed.c+0−1

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drivers/clk/mediatek/clk-mt7986-eth.c+0−1

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drivers/clk/mediatek/clk-mt7986-infracfg.c+0−1

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drivers/clk/mediatek/clk-mt7986-topckgen.c+0−1

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drivers/clk/mediatek/clk-mt7988-infracfg.c+38−42

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drivers/clk/mediatek/clk-mt8167-aud.c+0−1

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drivers/clk/mediatek/clk-mt8167-img.c+0−1

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drivers/clk/mediatek/clk-mt8167-mfgcfg.c+0−1

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drivers/clk/mediatek/clk-mt8167-mm.c+0−1

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drivers/clk/mediatek/clk-mt8167-vdec.c+0−1

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drivers/clk/mediatek/clk-mt8173-mm.c+0−1

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drivers/clk/mediatek/clk-mt8183.c+0−1

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drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c+0−1

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drivers/clk/mediatek/clk-mt8188-apmixedsys.c+0−1

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drivers/clk/mediatek/clk-mt8188-imp_iic_wrap.c+0−1

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drivers/clk/mediatek/clk-mt8188-topckgen.c+0−1

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drivers/clk/mediatek/clk-mt8188-vdo0.c+0−1

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drivers/clk/mediatek/clk-mt8188-vdo1.c+0−1

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drivers/clk/mediatek/clk-mt8188-venc.c+0−1

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drivers/clk/mediatek/clk-mt8188-wpe.c+0−1

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drivers/clk/mediatek/clk-mt8192-cam.c+0−1

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drivers/clk/mediatek/clk-mt8192-img.c+0−1

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drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c+0−1

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drivers/clk/mediatek/clk-mt8192-ipe.c+0−1

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drivers/clk/mediatek/clk-mt8192-mdp.c+0−1

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drivers/clk/mediatek/clk-mt8192-mfg.c+0−1

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drivers/clk/mediatek/clk-mt8192-msdc.c+0−1

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drivers/clk/mediatek/clk-mt8192-scp_adsp.c+0−1

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drivers/clk/mediatek/clk-mt8192-vdec.c+0−1

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drivers/clk/mediatek/clk-mt8192-venc.c+0−1

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drivers/clk/mediatek/clk-mt8192.c+2−3

This diff is large: its 19 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8195-apmixedsys.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8195-topckgen.c+0−1

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drivers/clk/mediatek/clk-mt8365.c+0−1

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drivers/clk/mediatek/clk-mt8516-aud.c+0−1

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drivers/clk/mediatek/clk-mux.h+5−0

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drivers/clk/meson/a1-peripherals.c+0−1

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drivers/clk/meson/a1-pll.c+0−1

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drivers/clk/meson/axg.c+0−1

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drivers/clk/meson/gxbb.c+0−1

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drivers/clk/microchip/Makefile+1−1

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drivers/clk/microchip/clk-mpfs-ccc.c+4−11

This diff is large: its 45 lines aren’t shown here.

drivers/clk/microchip/clk-pic32.crenamed from drivers/clk/microchip/clk-core.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/microchip/clk-pic32.hrenamed from drivers/clk/microchip/clk-core.h+0−0

File renamed without changes.

drivers/clk/microchip/clk-pic32mzda.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mmp/clk-pxa1908-apbc.c+44−14

This diff is large: its 88 lines aren’t shown here.

drivers/clk/mmp/clk-pxa1908-apbcp.c+28−3

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drivers/clk/mvebu/common.c+8−13

This diff is large: its 53 lines aren’t shown here.

drivers/clk/nxp/clk-lpc18xx-ccu.c+5−9

This diff is large: its 41 lines aren’t shown here.

drivers/clk/qcom/Kconfig+48−0

This diff is large: its 76 lines aren’t shown here.

drivers/clk/qcom/Makefile+6−1

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drivers/clk/qcom/a53-pll.c+1−1

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drivers/clk/qcom/cambistmclkcc-kaanapali.c+0−1

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drivers/clk/qcom/cambistmclkcc-sm8750.c+0−1

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drivers/clk/qcom/camcc-kaanapali.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-milos.c+7−1

This diff is large: its 29 lines aren’t shown here.

drivers/clk/qcom/camcc-qcs615.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sc7180.c+0−1

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drivers/clk/qcom/camcc-sc7280.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-sc8180x.c+0−1

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drivers/clk/qcom/camcc-sc8280xp.c+0−1

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drivers/clk/qcom/camcc-sdm845.c+0−1

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drivers/clk/qcom/camcc-sm4450.c+0−1

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drivers/clk/qcom/camcc-sm6350.c+0−1

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drivers/clk/qcom/camcc-sm7150.c+0−1

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drivers/clk/qcom/camcc-sm8150.c+0−1

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drivers/clk/qcom/camcc-sm8250.c+0−1

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drivers/clk/qcom/camcc-sm8450.c+0−1

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drivers/clk/qcom/camcc-sm8550.c+0−1

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drivers/clk/qcom/camcc-sm8650.c+0−1

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drivers/clk/qcom/camcc-sm8750.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/camcc-x1e80100.c+64−1

This diff is large: its 93 lines aren’t shown here.

drivers/clk/qcom/camcc-x1p42100.c+2222−0

This diff is large: its 2223 lines aren’t shown here.

drivers/clk/qcom/clk-alpha-pll.h+6−0

This diff is large: its 37 lines aren’t shown here.

drivers/clk/qcom/clk-regmap-phy-mux.c+35−17

This diff is large: its 84 lines aren’t shown here.

drivers/clk/qcom/clk-rpmh.c+34−7

This diff is large: its 98 lines aren’t shown here.

drivers/clk/qcom/dispcc-eliza.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-glymur.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-kaanapali.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-milos.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-qcm2290.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-qcs615.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sc7180.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sc7280.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sc8280xp.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/clk/qcom/dispcc-sdm845.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm4450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm6115.c+0−1

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drivers/clk/qcom/dispcc-sm6125.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm6350.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm6375.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm7150.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm8250.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm8450.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm8550.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-sm8750.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc-x1e80100.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/clk/qcom/dispcc0-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/dispcc1-sa8775p.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/ecpricc-qdu1000.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-eliza.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-glymur.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-hawi.c+3656−0

This diff is large: its 3657 lines aren’t shown here.

drivers/clk/qcom/gcc-ipq5018.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-ipq5332.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/gcc-ipq9650.c+3445−0

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drivers/clk/qcom/gcc-kaanapali.c+0−1

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drivers/clk/qcom/gcc-milos.c+0−1

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drivers/clk/qcom/gcc-nord.c+1−2

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drivers/clk/qcom/gcc-qcs615.c+0−1

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drivers/clk/qcom/gcc-qcs8300.c+0−1

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drivers/clk/qcom/gcc-sa8775p.c+0−1

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drivers/clk/qcom/gcc-sdx75.c+0−1

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drivers/clk/qcom/gcc-sm4450.c+0−1

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drivers/clk/qcom/gcc-sm7150.c+0−1

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drivers/clk/qcom/gcc-sm8650.c+0−1

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drivers/clk/qcom/gcc-sm8750.c+0−1

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drivers/clk/qcom/gcc-x1e80100.c+0−1

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drivers/clk/qcom/gdsc.c+33−0

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drivers/clk/qcom/gdsc.h+5−0

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drivers/clk/qcom/gpucc-glymur.c+0−1

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drivers/clk/qcom/gpucc-kaanapali.c+0−1

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drivers/clk/qcom/gpucc-milos.c+0−1

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drivers/clk/qcom/gpucc-msm8998.c+0−1

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drivers/clk/qcom/gpucc-qcm2290.c+0−1

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drivers/clk/qcom/gpucc-qcs615.c+0−1

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drivers/clk/qcom/gpucc-sa8775p.c+0−1

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drivers/clk/qcom/gpucc-sar2130p.c+0−1

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drivers/clk/qcom/gpucc-sc7180.c+0−1

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drivers/clk/qcom/gpucc-sc7280.c+0−1

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drivers/clk/qcom/gpucc-sc8280xp.c+0−1

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drivers/clk/qcom/gpucc-sdm660.c+0−1

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drivers/clk/qcom/gpucc-sdm845.c+0−1

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drivers/clk/qcom/gpucc-sm4450.c+0−1

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drivers/clk/qcom/gpucc-sm6115.c+0−1

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drivers/clk/qcom/gpucc-sm6125.c+0−1

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drivers/clk/qcom/gpucc-sm6350.c+0−1

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drivers/clk/qcom/gpucc-sm6375.c+0−1

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drivers/clk/qcom/gpucc-sm8150.c+0−1

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drivers/clk/qcom/gpucc-sm8250.c+0−1

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drivers/clk/qcom/gpucc-sm8350.c+0−1

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drivers/clk/qcom/gpucc-sm8450.c+0−1

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drivers/clk/qcom/gpucc-sm8550.c+0−1

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drivers/clk/qcom/gpucc-sm8650.c+0−1

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drivers/clk/qcom/gpucc-sm8750.c+2−3

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drivers/clk/qcom/gpucc-x1e80100.c+0−1

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drivers/clk/qcom/gpucc-x1p42100.c+0−1

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drivers/clk/qcom/gxclkctl-kaanapali.c+1−1

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drivers/clk/qcom/ipq-cmn-pll.c+27−4

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drivers/clk/qcom/lpasscc-sc8280xp.c+0−1

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drivers/clk/qcom/lpasscc-sm6115.c+0−1

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drivers/clk/qcom/mmcc-apq8084.c+0−1

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drivers/clk/qcom/mmcc-msm8960.c+0−1

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drivers/clk/qcom/mmcc-msm8974.c+0−1

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drivers/clk/qcom/mmcc-msm8994.c+0−1

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drivers/clk/qcom/mmcc-msm8996.c+0−1

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drivers/clk/qcom/mmcc-msm8998.c+0−1

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drivers/clk/qcom/mmcc-sdm660.c+0−1

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drivers/clk/qcom/negcc-nord.c+2−2

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drivers/clk/qcom/nwgcc-nord.c+2−3

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drivers/clk/qcom/segcc-nord.c+1−2

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drivers/clk/qcom/tcsrcc-eliza.c+0−1

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drivers/clk/qcom/tcsrcc-glymur.c+0−1

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drivers/clk/qcom/tcsrcc-hawi.c+157−0

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drivers/clk/qcom/tcsrcc-nord.c+0−1

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drivers/clk/qcom/tcsrcc-sm8650.c+0−1

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drivers/clk/qcom/tcsrcc-sm8750.c+0−1

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drivers/clk/qcom/tcsrcc-x1e80100.c+0−1

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drivers/clk/qcom/videocc-glymur.c+0−1

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drivers/clk/qcom/videocc-kaanapali.c+0−1

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drivers/clk/qcom/videocc-milos.c+0−1

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drivers/clk/qcom/videocc-qcs615.c+0−1

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drivers/clk/qcom/videocc-sa8775p.c+0−1

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drivers/clk/qcom/videocc-sm7150.c+0−1

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drivers/clk/qcom/videocc-sm8450.c+0−1

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drivers/clk/qcom/videocc-sm8550.c+0−1

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drivers/clk/qcom/videocc-sm8750.c+0−1

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drivers/clk/qcom/videocc-x1p42100.c+584−0

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drivers/clk/renesas/clk-r8a73a4.c+2−0

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drivers/clk/renesas/clk-r8a7740.c+2−0

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drivers/clk/renesas/clk-vbattb.c+0−1

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drivers/clk/renesas/r8a779g0-cpg-mssr.c+1−0

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drivers/clk/renesas/r9a07g043-cpg.c+1−1

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drivers/clk/renesas/r9a07g044-cpg.c+1−1

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drivers/clk/renesas/r9a08g045-cpg.c+1−12

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drivers/clk/renesas/r9a08g046-cpg.c+355−0

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drivers/clk/renesas/r9a09g011-cpg.c+1−6

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drivers/clk/renesas/r9a09g047-cpg.c+84−0

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drivers/clk/renesas/r9a09g077-cpg.c+1−0

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drivers/clk/renesas/renesas-cpg-mssr.c+3−1

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drivers/clk/renesas/rzg2l-cpg.c+75−14

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drivers/clk/renesas/rzg2l-cpg.h+11−7

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drivers/clk/renesas/rzv2h-cpg.c+181−1

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drivers/clk/renesas/rzv2h-cpg.h+12−0

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drivers/clk/rockchip/Kconfig+1−1

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drivers/clk/rockchip/clk-rk3588.c+16−0

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drivers/clk/rockchip/clk.c+21−4

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drivers/clk/rockchip/clk.h+3−0

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drivers/clk/samsung/Kconfig+1−1

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drivers/clk/samsung/clk-acpm.c+4−4

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drivers/clk/samsung/clk-exynos-audss.c+0−1

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drivers/clk/samsung/clk-exynos-clkout.c+0−1

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drivers/clk/samsung/clk-exynos2200.c+0−1

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drivers/clk/samsung/clk-exynos3250.c+0−1

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drivers/clk/samsung/clk-exynos4.c+0−1

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drivers/clk/samsung/clk-exynos4412-isp.c+0−1

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drivers/clk/samsung/clk-exynos5-subcmu.c+0−1

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drivers/clk/samsung/clk-exynos5250.c+0−1

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drivers/clk/samsung/clk-exynos5420.c+0−1

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drivers/clk/samsung/clk-exynos5433.c+0−1

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drivers/clk/samsung/clk-exynos7870.c+0−1

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drivers/clk/samsung/clk-exynos7885.c+0−1

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drivers/clk/samsung/clk-exynos850.c+3−3

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drivers/clk/samsung/clk-exynos8895.c+0−1

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drivers/clk/samsung/clk-exynos990.c+143−165

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drivers/clk/samsung/clk-exynosautov9.c+0−1

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drivers/clk/samsung/clk-exynosautov920.c+0−1

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drivers/clk/samsung/clk-fsd.c+0−1

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drivers/clk/samsung/clk-gs101.c+1−2

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drivers/clk/samsung/clk-s5pv210-audss.c+0−1

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drivers/clk/samsung/clk.c+0−1

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drivers/clk/socfpga/clk-agilex.c+2−0

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drivers/clk/spacemit/ccu-k3.c+20−10

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drivers/clk/sprd/ums512-clk.c+0−1

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drivers/clk/starfive/clk-starfive-jh7100-audio.c+0−1

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drivers/clk/starfive/clk-starfive-jh7100.c+0−1

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drivers/clk/tegra/clk-device.c+0−1

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drivers/clk/visconti/pll.c+7−10

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drivers/clk/xilinx/xlnx_vcu.c+0−1

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drivers/clocksource/arm_arch_timer_mmio.c+1−3

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drivers/clocksource/clps711x-timer.c+1−1

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drivers/clocksource/em_sti.c+1−3

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drivers/clocksource/hyperv_timer.c+27−10

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drivers/clocksource/mips-gic-timer.c+2−0

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drivers/clocksource/samsung_pwm_timer.c+11−11

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drivers/clocksource/sh_cmt.c+2−2

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drivers/clocksource/sh_mtu2.c+2−2

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drivers/clocksource/sh_tmu.c+2−2

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drivers/clocksource/timer-armada-370-xp.c+15−3

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drivers/clocksource/timer-nxp-pit.c+3−1

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drivers/clocksource/timer-nxp-stm.c+1−1

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drivers/clocksource/timer-rtl-otto.c+7−7

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drivers/clocksource/timer-sun4i.c+1−1

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drivers/clocksource/timer-sun5i.c+1−3

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drivers/clocksource/timer-tegra186.c+1−3

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drivers/clocksource/timer-ti-dm.c+1−3

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drivers/comedi/drivers/8255_pci.c+16−16

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drivers/comedi/drivers/addi_apci_1032.c+2−2

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drivers/comedi/drivers/addi_apci_1500.c+2−2

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drivers/comedi/drivers/addi_apci_1516.c+4−4

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drivers/comedi/drivers/addi_apci_1564.c+2−2

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drivers/comedi/drivers/addi_apci_16xx.c+3−3

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drivers/comedi/drivers/addi_apci_2032.c+2−2

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drivers/comedi/drivers/addi_apci_2200.c+2−2

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drivers/comedi/drivers/addi_apci_3120.c+3−3

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drivers/comedi/drivers/addi_apci_3501.c+2−2

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drivers/comedi/drivers/addi_apci_3xxx.c+26−26

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drivers/comedi/drivers/adl_pci6208.c+3−4

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drivers/comedi/drivers/adl_pci7250.c+9−9

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drivers/comedi/drivers/adl_pci7x3x.c+7−7

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drivers/comedi/drivers/adl_pci8164.c+2−2

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drivers/comedi/drivers/adl_pci9111.c+3−3

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drivers/comedi/drivers/adl_pci9118.c+4−4

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drivers/comedi/drivers/adv_pci1710.c+34−28

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drivers/comedi/drivers/adv_pci1720.c+2−2

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drivers/comedi/drivers/adv_pci1723.c+2−2

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drivers/comedi/drivers/adv_pci1724.c+2−2

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drivers/comedi/drivers/adv_pci1760.c+2−2

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drivers/comedi/drivers/adv_pci_dio.c+15−15

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drivers/comedi/drivers/amplc_dio200_pci.c+6−6

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drivers/comedi/drivers/amplc_pci224.c+3−3

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drivers/comedi/drivers/amplc_pci230.c+3−3

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drivers/comedi/drivers/amplc_pci236.c+2−2

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drivers/comedi/drivers/amplc_pci263.c+2−2

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drivers/comedi/drivers/cb_pcidas.c+9−9

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drivers/comedi/drivers/cb_pcidas64.c+22−22

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drivers/comedi/drivers/cb_pcidda.c+7−7

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drivers/comedi/drivers/cb_pcimdas.c+3−3

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drivers/comedi/drivers/cb_pcimdda.c+2−2

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drivers/comedi/drivers/comedi_test.c+3−2

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drivers/comedi/drivers/contec_pci_dio.c+2−2

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drivers/comedi/drivers/daqboard2000.c+5−5

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drivers/comedi/drivers/das08_pci.c+2−2

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drivers/comedi/drivers/dt3000.c+8−8

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drivers/comedi/drivers/dyna_pci10xx.c+2−2

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drivers/comedi/drivers/gsc_hpdi.c+3−3

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drivers/comedi/drivers/icp_multi.c+2−2

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drivers/comedi/drivers/jr3_pci.c+6−6

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drivers/comedi/drivers/ke_counter.c+2−2

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drivers/comedi/drivers/me4000.c+14−14

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drivers/comedi/drivers/me_daq.c+3−3

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drivers/comedi/drivers/mf6x4.c+8−3

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drivers/comedi/drivers/ni_6527.c+3−3

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drivers/comedi/drivers/ni_65xx.c+23−23

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drivers/comedi/drivers/ni_660x.c+8−8

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drivers/comedi/drivers/ni_670x.c+4−4

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drivers/comedi/drivers/ni_labpc_pci.c+2−2

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drivers/comedi/drivers/ni_pcidio.c+4−4

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drivers/comedi/drivers/ni_pcimio.c+66−66

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drivers/comedi/drivers/rtd520.c+3−3

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drivers/comedi/drivers/s626.c+3−3

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drivers/counter/counter-core.c+2−1

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drivers/counter/ftm-quaddec.c+3−1

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drivers/counter/intel-qep.c+21−33

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drivers/counter/interrupt-cnt.c+3−2

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drivers/counter/stm32-lptimer-cnt.c+0−1

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drivers/counter/stm32-timer-cnt.c+0−1

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drivers/counter/ti-ecap-capture.c+0−1

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drivers/counter/ti-eqep.c+0−1

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drivers/cpufreq/Kconfig.arm+1−1

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drivers/cpufreq/Kconfig.x86+2−41

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drivers/cpufreq/Makefile+0−2

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drivers/cpufreq/amd-pstate-ut.c+38−12

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drivers/cpufreq/amd-pstate.c+38−36

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drivers/cpufreq/amd-pstate.h+0−1

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drivers/cpufreq/amd_freq_sensitivity.c+2−5

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drivers/cpufreq/apple-soc-cpufreq.c+2−4

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drivers/cpufreq/armada-37xx-cpufreq.c+0−1

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