History

Merge tag 'v6.8-rc4' into gpio/for-next

Linux 6.8-rc4 Pulling this for a bugfix upstream with which the gpio/for-next branch conflicts.

Bartosz Golaszewski committed 2 years ago

Commit 104e00b2 parents aab5c6f 841c3511138 files · +12223 −6875Browse files

Unified · Split

1138 files
  1. .mailmap +2 −0
  2. CREDITS +13 −0
  3. Documentation/ABI/testing/sysfs-class-net-queues +11 −11
  4. Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon +7 −7
  5. Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon +7 −7
  6. Documentation/ABI/testing/sysfs-platform-silicom +1 −0
  7. Documentation/accel/introduction.rst +2 −2
  8. Documentation/admin-guide/kernel-parameters.rst +0 −5
  9. Documentation/admin-guide/kernel-per-CPU-kthreads.rst +6 −10
  10. Documentation/dev-tools/kunit/usage.rst +17 −2
  11. Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml +3 −3
  12. Documentation/devicetree/bindings/media/cnm,wave521c.yaml +2 −2
  13. Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml +4 −1
  14. Documentation/filesystems/overlayfs.rst +13 −3
  15. Documentation/netlink/specs/rt_link.yaml +10 −0
  16. Documentation/sphinx/templates/kernel-toc.html +3 −1
  17. Documentation/usb/gadget-testing.rst +11 −11
  18. MAINTAINERS +26 −27
  19. Makefile +12 −8
  20. arch/Kconfig +1 −0
  21. arch/arc/include/asm/jump_label.h +2 −2
  22. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts +2 −2
  23. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts +2 −2
  24. arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts +1 −1
  25. arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi +2 −2
  26. arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi +1 −1
  27. arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts +1 −1
  28. arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi +1 −0
  29. arch/arm/boot/dts/ti/omap/am335x-moxa-uc-2100-common.dtsi +1 −1
  30. arch/arm/include/asm/jump_label.h +2 −2
  31. arch/arm/mm/fault.c +2 −0
  32. arch/arm64/Makefile +1 −1
  33. arch/arm64/boot/dts/exynos/google/gs101.dtsi +1 −1
  34. arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts +1 −1
  35. arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi +1 −1
  36. arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi +1 −1
  37. arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts +1 −1
  38. arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi +1 −1
  39. arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi +1 −1
  40. arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts +1 −1
  41. arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts +1 −1
  42. arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +1 −1
  43. arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +1 −1
  44. arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts +1 −1
  45. arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi +1 −1
  46. arch/arm64/include/asm/alternative-macros.h +2 −2
  47. arch/arm64/include/asm/jump_label.h +2 −2
  48. arch/arm64/include/asm/vdso.h +0 −3
  49. arch/arm64/kernel/Makefile +3 −3
  50. arch/arm64/kernel/vdso32/Makefile +0 −9
  51. arch/csky/include/asm/jump_label.h +2 −2
  52. arch/loongarch/Kconfig +2 −21
  53. arch/loongarch/include/asm/acpi.h +3 −1
  54. arch/loongarch/include/asm/jump_label.h +2 −2
  55. arch/loongarch/include/asm/kvm_vcpu.h +2 −2
  56. arch/loongarch/kernel/acpi.c +1 −3
  57. arch/loongarch/kernel/smp.c +0 −1
  58. arch/loongarch/kvm/mmu.c +2 −2
  59. arch/loongarch/mm/kasan_init.c +3 −0
  60. arch/loongarch/mm/tlb.c +10 −6
  61. arch/loongarch/vdso/Makefile +1 −0
  62. arch/m68k/Makefile +2 −2
  63. arch/mips/alchemy/common/prom.c +1 −0
  64. arch/mips/alchemy/common/setup.c +1 −3
  65. arch/mips/bcm63xx/boards/board_bcm963xx.c +1 −1
  66. arch/mips/bcm63xx/dev-rng.c +1 −1
  67. arch/mips/bcm63xx/dev-uart.c +1 −0
  68. arch/mips/bcm63xx/dev-wdt.c +1 −1
  69. arch/mips/bcm63xx/irq.c +1 −1
  70. arch/mips/bcm63xx/setup.c +1 −1
  71. arch/mips/bcm63xx/timer.c +1 −1
  72. arch/mips/cobalt/setup.c +0 −3
  73. arch/mips/fw/arc/memory.c +1 −1
  74. arch/mips/include/asm/jump_label.h +2 −2
  75. arch/mips/include/asm/mach-au1x00/au1000.h +3 −0
  76. arch/mips/include/asm/mach-cobalt/cobalt.h +3 −0
  77. arch/mips/kernel/elf.c +6 −0
  78. arch/mips/kernel/traps.c +7 −1
  79. arch/mips/lantiq/prom.c +3 −4
  80. arch/mips/loongson64/init.c +3 −0
  81. arch/mips/loongson64/numa.c +2 −0
  82. arch/mips/sgi-ip27/Makefile +1 −1
  83. arch/mips/sgi-ip27/ip27-berr.c +3 −1
  84. arch/mips/sgi-ip27/ip27-common.h +2 −0
  85. arch/mips/sgi-ip27/ip27-hubio.c +0 −185
  86. arch/mips/sgi-ip27/ip27-irq.c +2 −0
  87. arch/mips/sgi-ip27/ip27-memory.c +1 −0
  88. arch/mips/sgi-ip27/ip27-nmi.c +8 −17
  89. arch/mips/sgi-ip30/ip30-console.c +1 −0
  90. arch/mips/sgi-ip30/ip30-setup.c +1 −0
  91. arch/mips/sgi-ip32/crime.c +4 −2
  92. arch/mips/sgi-ip32/ip32-berr.c +2 −0
  93. arch/mips/sgi-ip32/ip32-common.h +15 −0
  94. arch/mips/sgi-ip32/ip32-irq.c +2 −4
  95. arch/mips/sgi-ip32/ip32-memory.c +1 −0
  96. arch/mips/sgi-ip32/ip32-reset.c +2 −0
  97. arch/mips/sgi-ip32/ip32-setup.c +1 −2
  98. arch/parisc/Kconfig +0 −1
  99. arch/parisc/Makefile +2 −2
  100. arch/parisc/include/asm/assembly.h +1 −0
  101. arch/parisc/include/asm/extable.h +64 −0
  102. arch/parisc/include/asm/jump_label.h +2 −2
  103. arch/parisc/include/asm/special_insns.h +4 −2
  104. arch/parisc/include/asm/uaccess.h +7 −41
  105. arch/parisc/kernel/cache.c +7 −3
  106. arch/parisc/kernel/drivers.c +4 −1
  107. arch/parisc/kernel/unaligned.c +22 −22
  108. arch/parisc/kernel/vmlinux.lds.S +1 −1
  109. arch/parisc/mm/fault.c +8 −3
  110. arch/powerpc/include/asm/jump_label.h +2 −2
  111. arch/powerpc/include/asm/uaccess.h +6 −6
  112. arch/powerpc/kernel/iommu.c +28 −9
  113. arch/powerpc/kernel/irq_64.c +1 −1
  114. arch/riscv/boot/dts/sophgo/sg2042.dtsi +48 −32
  115. arch/riscv/include/asm/arch_hweight.h +2 −2
  116. arch/riscv/include/asm/bitops.h +4 −4
  117. arch/riscv/include/asm/checksum.h +1 −1
  118. arch/riscv/include/asm/cpufeature.h +2 −2
  119. arch/riscv/include/asm/hugetlb.h +3 −0
  120. arch/riscv/include/asm/jump_label.h +2 −2
  121. arch/riscv/include/asm/stacktrace.h +5 −0
  122. arch/riscv/include/asm/tlb.h +1 −1
  123. arch/riscv/include/asm/tlbflush.h +1 −0
  124. arch/riscv/include/uapi/asm/kvm.h +27 −0
  125. arch/riscv/kvm/vcpu_onereg.c +54 −0
  126. arch/riscv/lib/csum.c +5 −5
  127. arch/riscv/mm/hugetlbpage.c +73 −5
  128. arch/riscv/mm/init.c +4 −0
  129. arch/riscv/mm/tlbflush.c +3 −1
  130. arch/riscv/net/bpf_jit_comp64.c +3 −2
  131. arch/s390/include/asm/jump_label.h +2 −2
  132. arch/s390/kvm/priv.c +6 −2
  133. arch/s390/kvm/vsie.c +0 −1
  134. arch/s390/mm/gmap.c +1 −0
  135. arch/sparc/include/asm/jump_label.h +2 −2
  136. arch/um/Makefile +3 −1
  137. arch/um/include/asm/cpufeature.h +1 −1
  138. arch/x86/Kconfig.cpu +1 −1
  139. arch/x86/Makefile +5 −5
  140. arch/x86/boot/header.S +6 −8
  141. arch/x86/boot/setup.ld +3 −3
  142. arch/x86/include/asm/coco.h +3 −2
  143. arch/x86/include/asm/cpufeature.h +1 −1
  144. arch/x86/include/asm/cpufeatures.h +1 −3
  145. arch/x86/include/asm/intel-family.h +2 −0
  146. arch/x86/include/asm/jump_label.h +3 −3
  147. arch/x86/include/asm/kmsan.h +16 −1
  148. arch/x86/include/asm/kvm_host.h +2 −0
  149. arch/x86/include/asm/rmwcc.h +1 −1
  150. arch/x86/include/asm/special_insns.h +1 −1
  151. arch/x86/include/asm/syscall_wrapper.h +21 −4
  152. arch/x86/include/asm/uaccess.h +5 −5
  153. arch/x86/kernel/alternative.c +1 −1
  154. arch/x86/kernel/cpu/amd.c +24 −4
  155. arch/x86/kernel/fpu/signal.c +5 −8
  156. arch/x86/kernel/kvm.c +2 −1
  157. arch/x86/kvm/hyperv.c +50 −0
  158. arch/x86/kvm/hyperv.h +3 −0
  159. arch/x86/kvm/svm/svm_ops.h +3 −3
  160. arch/x86/kvm/vmx/vmx.c +2 −2
  161. arch/x86/kvm/vmx/vmx_ops.h +3 −3
  162. arch/x86/kvm/x86.c +7 −0
  163. arch/x86/lib/getuser.S +12 −12
  164. arch/x86/lib/putuser.S +10 −10
  165. arch/xtensa/include/asm/jump_label.h +2 −2
  166. block/blk-core.c +10 −0
  167. block/blk-iocost.c +7 −0
  168. block/blk-map.c +10 −3
  169. block/blk-mq.c +0 −10
  170. block/blk-wbt.c +2 −2
  171. block/ioctl.c +0 −2
  172. block/partitions/core.c +5 −0
  173. crypto/algif_hash.c +3 −2
  174. crypto/cbc.c +3 −0
  175. drivers/accel/ivpu/ivpu_debugfs.c +16 −4
  176. drivers/accel/ivpu/ivpu_drv.c +73 −58
  177. drivers/accel/ivpu/ivpu_drv.h +3 −2
  178. drivers/accel/ivpu/ivpu_fw.c +0 −1
  179. drivers/accel/ivpu/ivpu_gem.c +52 −90
  180. drivers/accel/ivpu/ivpu_gem.h +1 −2
  181. drivers/accel/ivpu/ivpu_hw_37xx.c +5 −11
  182. drivers/accel/ivpu/ivpu_hw_40xx.c +24 −12
  183. drivers/accel/ivpu/ivpu_ipc.c +2 −4
  184. drivers/accel/ivpu/ivpu_job.c +74 −88
  185. drivers/accel/ivpu/ivpu_job.h +1 −2
  186. drivers/accel/ivpu/ivpu_mmu.c +37 −21
  187. drivers/accel/ivpu/ivpu_mmu.h +1 −0
  188. drivers/accel/ivpu/ivpu_mmu_context.c +9 −0
  189. drivers/accel/ivpu/ivpu_pm.c +35 −17
  190. drivers/accel/ivpu/ivpu_pm.h +4 −2
  191. drivers/acpi/apei/ghes.c +0 −26
  192. drivers/android/binder.c +10 −0
  193. drivers/ata/ahci.c +33 −11
  194. drivers/ata/ahci.h +1 −0
  195. drivers/ata/libata-sata.c +1 −1
  196. drivers/atm/idt77252.c +2 −0
  197. drivers/block/aoe/aoeblk.c +4 −1
  198. drivers/block/rbd.c +19 −13
  199. drivers/block/virtio_blk.c +4 −3
  200. drivers/cpufreq/amd-pstate.c +3 −4
  201. drivers/cpufreq/intel_pstate.c +34 −21
  202. drivers/crypto/caam/caamalg_qi2.c +5 −2
  203. drivers/crypto/caam/caamhash.c +5 −2
  204. drivers/crypto/ccp/sev-dev.c +8 −2
  205. drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c +1 −0
  206. drivers/cxl/core/region.c +2 −2
  207. drivers/cxl/core/trace.h +3 −3
  208. drivers/cxl/pci.c +15 −11
  209. drivers/dma-buf/heaps/cma_heap.c +3 −4
  210. drivers/dma/at_hdmac.c +21 −11
  211. drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c +6 −4
  212. drivers/dma/fsl-qdma.c +12 −21
  213. drivers/dma/ti/edma.c +10 −0
  214. drivers/dma/ti/k3-udma.c +8 −2
  215. drivers/dpll/dpll_core.c +57 −11
  216. drivers/dpll/dpll_core.h +2 −2
  217. drivers/dpll/dpll_netlink.c +41 −16
  218. drivers/firewire/core-card.c +17 −1
  219. drivers/firewire/core-device.c +13 −5
  220. drivers/firmware/arm_ffa/driver.c +57 −28
  221. drivers/firmware/arm_scmi/clock.c +2 −3
  222. drivers/firmware/arm_scmi/common.h +1 −0
  223. drivers/firmware/arm_scmi/mailbox.c +14 −0
  224. drivers/firmware/arm_scmi/perf.c +18 −5
  225. drivers/firmware/arm_scmi/raw_mode.c +8 −4
  226. drivers/firmware/arm_scmi/shmem.c +7 −1
  227. drivers/firmware/efi/arm-runtime.c +1 −1
  228. drivers/firmware/efi/cper.c +19 −0
  229. drivers/firmware/efi/efi-init.c +10 −9
  230. drivers/firmware/efi/libstub/Makefile +2 −2
  231. drivers/firmware/efi/libstub/alignedmem.c +1 −0
  232. drivers/firmware/efi/libstub/efistub.h +2 −1
  233. drivers/firmware/efi/libstub/kaslr.c +1 −1
  234. drivers/firmware/efi/libstub/randomalloc.c +7 −5
  235. drivers/firmware/efi/libstub/x86-stub.c +15 −10
  236. drivers/firmware/efi/libstub/x86-stub.h +2 −2
  237. drivers/firmware/efi/libstub/zboot.c +1 −1
  238. drivers/firmware/efi/riscv-runtime.c +1 −1
  239. drivers/firmware/sysfb.c +1 −1
  240. drivers/gpio/gpio-eic-sprd.c +28 −4
  241. drivers/gpio/gpiolib-acpi.c +14 −0
  242. drivers/gpio/gpiolib.c +4 −4
  243. drivers/gpu/drm/amd/amdgpu/amdgpu.h +2 −0
  244. drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +21 −11
  245. drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h +3 −1
  246. drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c +1 −1
  247. drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +17 −3
  248. drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +4 −4
  249. drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +13 −23
  250. drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +6 −0
  251. drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c +8 −0
  252. drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c +1 −1
  253. drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +12 −0
  254. drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +1 −1
  255. drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c +16 −1
  256. drivers/gpu/drm/amd/amdgpu/cik_ih.c +6 −0
  257. drivers/gpu/drm/amd/amdgpu/cz_ih.c +5 −0
  258. drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +1 −3
  259. drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +1 −23
  260. drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +8 −0
  261. drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c +2 −2
  262. drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c +2 −2
  263. drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +2 −2
  264. drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +2 −9
  265. drivers/gpu/drm/amd/amdgpu/iceland_ih.c +5 −0
  266. drivers/gpu/drm/amd/amdgpu/ih_v6_0.c +6 −0
  267. drivers/gpu/drm/amd/amdgpu/ih_v6_1.c +7 −0
  268. drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c +0 −9
  269. drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c +0 −10
  270. drivers/gpu/drm/amd/amdgpu/navi10_ih.c +6 −0
  271. drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c +6 −0
  272. drivers/gpu/drm/amd/amdgpu/si_ih.c +6 −0
  273. drivers/gpu/drm/amd/amdgpu/soc15.c +22 −0
  274. drivers/gpu/drm/amd/amdgpu/tonga_ih.c +6 −0
  275. drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c +0 −17
  276. drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c +0 −19
  277. drivers/gpu/drm/amd/amdgpu/vega10_ih.c +6 −0
  278. drivers/gpu/drm/amd/amdgpu/vega20_ih.c +6 −0
  279. drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h +7 −7
  280. drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm +1 −1
  281. drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm +1 −1
  282. drivers/gpu/drm/amd/amdkfd/kfd_chardev.c +3 −1
  283. drivers/gpu/drm/amd/amdkfd/kfd_migrate.c +1 −1
  284. drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c +1 −0
  285. drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c +1 −0
  286. drivers/gpu/drm/amd/amdkfd/kfd_priv.h +7 −2
  287. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +21 −16
  288. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c +4 −1
  289. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c +16 −16
  290. drivers/gpu/drm/amd/display/dc/core/dc.c +3 −1
  291. drivers/gpu/drm/amd/display/dc/core/dc_state.c +3 −0
  292. drivers/gpu/drm/amd/display/dc/dc.h +1 −0
  293. drivers/gpu/drm/amd/display/dc/dc_types.h +5 −0
  294. drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c +2 −2
  295. drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c +2 −2
  296. drivers/gpu/drm/amd/display/dc/dml/Makefile +3 −3
  297. drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +13 −6
  298. drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c +2 −2
  299. drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c +12 −21
  300. drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c +3 −3
  301. drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h +4 −0
  302. drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c +6 −7
  303. drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h +4 −0
  304. drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c +34 −29
  305. drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +67 −9
  306. drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h +2 −0
  307. drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c +3 −0
  308. drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c +8 −1
  309. drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h +1 −0
  310. drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h +7 −0
  311. drivers/gpu/drm/amd/display/dc/inc/core_types.h +2 −0
  312. drivers/gpu/drm/amd/display/dc/inc/resource.h +8 −12
  313. drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c +1 −1
  314. drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c +2 −2
  315. drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c +1 −1
  316. drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c +15 −1
  317. drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c +3 −2
  318. drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +47 −0
  319. drivers/gpu/drm/amd/display/modules/power/power_helpers.c +5 −0
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  1031. sound/soc/codecs/cs35l56-shared.c +122 −18
  1032. sound/soc/codecs/cs35l56.c +256 −45
  1033. sound/soc/codecs/cs35l56.h +2 −0
  1034. sound/soc/codecs/es8326.c +139 −47
  1035. sound/soc/codecs/es8326.h +2 −1
  1036. sound/soc/codecs/lpass-wsa-macro.c +0 −7
  1037. sound/soc/codecs/wcd9335.c +0 −4
  1038. sound/soc/codecs/wcd934x.c +0 −1
  1039. sound/soc/codecs/wcd938x.c +3 −5
  1040. sound/soc/codecs/wm_adsp.c +31 −42
  1041. sound/soc/codecs/wsa883x.c +5 −1
  1042. sound/soc/qcom/sc8280xp.c +7 −5
  1043. sound/soc/soc-core.c +4 −1
  1044. sound/soc/sunxi/sun4i-spdif.c +5 −0
  1045. sound/usb/clock.c +32 −2
  1046. sound/usb/format.c +20 −0
  1047. sound/usb/midi2.c +1 −1
  1048. sound/usb/quirks.c +22 −16
  1049. sound/virtio/virtio_card.c +0 −2
  1050. sound/virtio/virtio_ctl_msg.c +0 −2
  1051. sound/virtio/virtio_pcm_msg.c +0 −2
  1052. tools/arch/x86/include/asm/cpufeatures.h +7 −1
  1053. tools/arch/x86/include/asm/msr-index.h +8 −0
  1054. tools/arch/x86/include/asm/rmwcc.h +1 −1
  1055. tools/arch/x86/include/uapi/asm/kvm.h +3 −0
  1056. tools/arch/x86/lib/memcpy_64.S +2 −2
  1057. tools/arch/x86/lib/memset_64.S +2 −2
  1058. tools/include/asm-generic/unaligned.h +12 −12
  1059. tools/include/linux/compiler_types.h +2 −2
  1060. tools/include/uapi/asm-generic/unistd.h +14 −1
  1061. tools/include/uapi/drm/drm.h +71 −1
  1062. tools/include/uapi/drm/i915_drm.h +6 −6
  1063. tools/include/uapi/linux/fcntl.h +3 −0
  1064. tools/include/uapi/linux/kvm.h +50 −90
  1065. tools/include/uapi/linux/mount.h +70 −0
  1066. tools/include/uapi/linux/stat.h +1 −0
  1067. tools/perf/Documentation/perf-list.txt +4 −0
  1068. tools/perf/Makefile.perf +10 −0
  1069. tools/perf/builtin-list.c +129 −82
  1070. tools/perf/builtin-record.c +2 −2
  1071. tools/perf/builtin-top.c +1 −1
  1072. tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json +118 −136
  1073. tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json +0 −4
  1074. tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json +5 −20
  1075. tools/perf/tests/shell/daemon.sh +24 −10
  1076. tools/perf/tests/shell/list.sh +18 −3
  1077. tools/perf/tests/shell/script.sh +9 −3
  1078. tools/perf/trace/beauty/statx.c +1 −0
  1079. tools/perf/util/evlist.c +8 −1
  1080. tools/perf/util/hist.c +2 −2
  1081. tools/perf/util/include/linux/linkage.h +4 −0
  1082. tools/perf/util/metricgroup.c +1 −1
  1083. tools/perf/util/print-events.c +1 −1
  1084. tools/perf/util/synthetic-events.c +2 −2
  1085. tools/power/cpupower/bench/Makefile +1 −1
  1086. tools/testing/cxl/Kbuild +2 −0
  1087. tools/testing/cxl/test/Kbuild +2 −0
  1088. tools/testing/nvdimm/Kbuild +2 −0
  1089. tools/testing/selftests/core/close_range_test.c +1 −0
  1090. tools/testing/selftests/drivers/net/bonding/bond_options.sh +4 −4
  1091. tools/testing/selftests/drivers/net/bonding/lag_lib.sh +11 −0
  1092. tools/testing/selftests/drivers/net/bonding/settings +1 −1
  1093. tools/testing/selftests/drivers/net/netdevsim/udp_tunnel_nic.sh +9 −0
  1094. tools/testing/selftests/drivers/net/team/config +3 −1
  1095. tools/testing/selftests/hid/tests/test_wacom_generic.py +4 −4
  1096. tools/testing/selftests/kvm/riscv/get-reg-list.c +108 −0
  1097. tools/testing/selftests/livepatch/functions.sh +17 −20
  1098. tools/testing/selftests/mm/charge_reserved_hugetlb.sh +1 −1
  1099. tools/testing/selftests/mm/ksm_tests.c +1 −1
  1100. tools/testing/selftests/mm/map_hugetlb.c +7 −0
  1101. tools/testing/selftests/mm/mremap_test.c +14 −13
  1102. tools/testing/selftests/mm/va_high_addr_switch.sh +6 −0
  1103. tools/testing/selftests/mm/write_hugetlb_memory.sh +1 −1
  1104. tools/testing/selftests/net/Makefile +5 −4
  1105. tools/testing/selftests/net/big_tcp.sh +3 −1
  1106. tools/testing/selftests/net/cmsg_ipv6.sh +2 −2
  1107. tools/testing/selftests/net/config +44 −0
  1108. tools/testing/selftests/net/forwarding/Makefile +1 −1
  1109. tools/testing/selftests/net/lib.sh +4 −1
  1110. tools/testing/selftests/net/mptcp/config +3 −0
  1111. tools/testing/selftests/net/mptcp/mptcp_join.sh +11 −16
  1112. tools/testing/selftests/net/mptcp/mptcp_lib.sh +1 −1
  1113. tools/testing/selftests/net/mptcp/settings +1 −1
  1114. tools/testing/selftests/net/mptcp/simult_flows.sh +4 −4
  1115. tools/testing/selftests/net/net_helper.sh +0 −0
  1116. tools/testing/selftests/net/pmtu.sh +26 −15
  1117. tools/testing/selftests/net/rps_default_mask.sh +5 −1
  1118. tools/testing/selftests/net/rtnetlink.sh +2 −4
  1119. tools/testing/selftests/net/setup_loopback.sh +0 −0
  1120. tools/testing/selftests/net/setup_veth.sh +1 −1
  1121. tools/testing/selftests/net/so_incoming_cpu.c +50 −18
  1122. tools/testing/selftests/net/tcp_ao/config +10 −0
  1123. tools/testing/selftests/net/tcp_ao/key-management.c +26 −20
  1124. tools/testing/selftests/net/tcp_ao/lib/sock.c +8 −4
  1125. tools/testing/selftests/net/tcp_ao/rst.c +90 −48
  1126. tools/testing/selftests/net/tcp_ao/settings +1 −0
  1127. tools/testing/selftests/net/tcp_ao/unsigned-md5.c +6 −6
  1128. tools/testing/selftests/net/udpgro.sh +2 −2
  1129. tools/testing/selftests/net/udpgro_bench.sh +2 −2
  1130. tools/testing/selftests/net/udpgro_frglist.sh +3 −3
  1131. tools/testing/selftests/net/udpgro_fwd.sh +17 −5
  1132. tools/testing/selftests/net/udpgso_bench_rx.c +1 −1
  1133. tools/testing/selftests/net/veth.sh +2 −2
  1134. tools/testing/selftests/net/xdp_dummy.c +13 −0
  1135. tools/testing/selftests/netfilter/conntrack_dump_flush.c +42 −1
  1136. tools/testing/selftests/rseq/basic_percpu_ops_test.c +12 −2
  1137. tools/testing/selftests/rseq/param_test.c +16 −6
  1138. tools/testing/selftests/seccomp/seccomp_benchmark.c +64 −40
.mailmap+2−0
@@ -289,6 +289,7 @@ Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com> · 288 unmodified lines
289289 John Crispin <john@phrozen.org> <blogic@openwrt.org>
290290 John Fastabend <john.fastabend@gmail.com> <john.r.fastabend@intel.com>
291291 John Keeping <john@keeping.me.uk> <john@metanate.com>
292+John Moon <john@jmoon.dev> <quic_johmoo@quicinc.com>
292293 John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
293294 John Stultz <johnstul@us.ibm.com>
294295 <jon.toppins+linux@gmail.com> <jtoppins@cumulusnetworks.com>
@@ -344,6 +345,7 @@ Leonid I Ananiev <leonid.i.ananiev@intel.com> · 49 unmodified lines
344345 Leon Romanovsky <leon@kernel.org> <leon@leon.nu>
345346 Leon Romanovsky <leon@kernel.org> <leonro@mellanox.com>
346347 Leon Romanovsky <leon@kernel.org> <leonro@nvidia.com>
348+Leo Yan <leo.yan@linux.dev> <leo.yan@linaro.org>
347349 Liam Mark <quic_lmark@quicinc.com> <lmark@codeaurora.org>
348350 Linas Vepstas <linas@austin.ibm.com>
349351 Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
CREDITS+13−0
@@ -2161,6 +2161,19 @@ N: Mike Kravetz · 2160 unmodified lines
21612161 E: mike.kravetz@oracle.com
21622162 D: Maintenance and development of the hugetlb subsystem
21632163
2164+N: Seth Jennings
2165+E: sjenning@redhat.com
2166+D: Creation and maintenance of zswap
2167+
2168+N: Dan Streetman
2169+E: ddstreet@ieee.org
2170+D: Maintenance and development of zswap
2171+D: Creation and maintenance of the zpool API
2172+
2173+N: Vitaly Wool
2174+E: vitaly.wool@konsulko.com
2175+D: Maintenance and development of zswap
2176+
21642177 N: Andreas S. Krebs
21652178 E: akrebs@altavista.net
21662179 D: CYPRESS CY82C693 chipset IDE, Digital's PC-Alpha 164SX boards
Documentation/ABI/testing/sysfs-class-net-queues+11−11
@@ -1,4 +1,4 @@
1−What: /sys/class/<iface>/queues/rx-<queue>/rps_cpus
1+What: /sys/class/net/<iface>/queues/rx-<queue>/rps_cpus
22 Date: March 2010
33 KernelVersion: 2.6.35
44 Contact: netdev@vger.kernel.org
@@ -8,7 +8,7 @@ Description: · 3 unmodified lines
88 network device queue. Possible values depend on the number
99 of available CPU(s) in the system.
1010
11−What: /sys/class/<iface>/queues/rx-<queue>/rps_flow_cnt
11+What: /sys/class/net/<iface>/queues/rx-<queue>/rps_flow_cnt
1212 Date: April 2010
1313 KernelVersion: 2.6.35
1414 Contact: netdev@vger.kernel.org
@@ -16,7 +16,7 @@ Description: · 1 unmodified line
1616 Number of Receive Packet Steering flows being currently
1717 processed by this particular network device receive queue.
1818
19−What: /sys/class/<iface>/queues/tx-<queue>/tx_timeout
19+What: /sys/class/net/<iface>/queues/tx-<queue>/tx_timeout
2020 Date: November 2011
2121 KernelVersion: 3.3
2222 Contact: netdev@vger.kernel.org
@@ -24,7 +24,7 @@ Description: · 1 unmodified line
2424 Indicates the number of transmit timeout events seen by this
2525 network interface transmit queue.
2626
27−What: /sys/class/<iface>/queues/tx-<queue>/tx_maxrate
27+What: /sys/class/net/<iface>/queues/tx-<queue>/tx_maxrate
2828 Date: March 2015
2929 KernelVersion: 4.1
3030 Contact: netdev@vger.kernel.org
@@ -32,7 +32,7 @@ Description: · 1 unmodified line
3232 A Mbps max-rate set for the queue, a value of zero means disabled,
3333 default is disabled.
3434
35−What: /sys/class/<iface>/queues/tx-<queue>/xps_cpus
35+What: /sys/class/net/<iface>/queues/tx-<queue>/xps_cpus
3636 Date: November 2010
3737 KernelVersion: 2.6.38
3838 Contact: netdev@vger.kernel.org
@@ -42,7 +42,7 @@ Description: · 3 unmodified lines
4242 network device transmit queue. Possible values depend on the
4343 number of available CPU(s) in the system.
4444
45−What: /sys/class/<iface>/queues/tx-<queue>/xps_rxqs
45+What: /sys/class/net/<iface>/queues/tx-<queue>/xps_rxqs
4646 Date: June 2018
4747 KernelVersion: 4.18.0
4848 Contact: netdev@vger.kernel.org
@@ -53,7 +53,7 @@ Description: · 4 unmodified lines
5353 number of available receive queue(s) in the network device.
5454 Default is disabled.
5555
56−What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time
56+What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time
5757 Date: November 2011
5858 KernelVersion: 3.3
5959 Contact: netdev@vger.kernel.org
@@ -62,7 +62,7 @@ Description: · 2 unmodified lines
6262 of this particular network device transmit queue.
6363 Default value is 1000.
6464
65−What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/inflight
65+What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/inflight
6666 Date: November 2011
6767 KernelVersion: 3.3
6868 Contact: netdev@vger.kernel.org
@@ -70,7 +70,7 @@ Description: · 1 unmodified line
7070 Indicates the number of bytes (objects) in flight on this
7171 network device transmit queue.
7272
73−What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit
73+What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit
7474 Date: November 2011
7575 KernelVersion: 3.3
7676 Contact: netdev@vger.kernel.org
@@ -79,7 +79,7 @@ Description: · 2 unmodified lines
7979 on this network device transmit queue. This value is clamped
8080 to be within the bounds defined by limit_max and limit_min.
8181
82−What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit_max
82+What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit_max
8383 Date: November 2011
8484 KernelVersion: 3.3
8585 Contact: netdev@vger.kernel.org
@@ -88,7 +88,7 @@ Description: · 2 unmodified lines
8888 queued on this network device transmit queue. See
8989 include/linux/dynamic_queue_limits.h for the default value.
9090
91−What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/limit_min
91+What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit_min
9292 Date: November 2011
9393 KernelVersion: 3.3
9494 Contact: netdev@vger.kernel.org
Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon+7−7
@@ -1,4 +1,4 @@
1−What: /sys/devices/.../hwmon/hwmon<i>/in0_input
1+What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/in0_input
22 Date: February 2023
33 KernelVersion: 6.2
44 Contact: intel-gfx@lists.freedesktop.org
@@ -6,7 +6,7 @@ Description: RO. Current Voltage in millivolt. · 1 unmodified line
66
77 Only supported for particular Intel i915 graphics platforms.
88
9−What: /sys/devices/.../hwmon/hwmon<i>/power1_max
9+What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max
1010 Date: February 2023
1111 KernelVersion: 6.2
1212 Contact: intel-gfx@lists.freedesktop.org
@@ -20,7 +20,7 @@ Description: RW. Card reactive sustained (PL1/Tau) power limit in microwatts. · 7 unmodified lines
2020
2121 Only supported for particular Intel i915 graphics platforms.
2222
23−What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max
23+What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_rated_max
2424 Date: February 2023
2525 KernelVersion: 6.2
2626 Contact: intel-gfx@lists.freedesktop.org
@@ -28,7 +28,7 @@ Description: RO. Card default power limit (default TDP setting). · 1 unmodified line
2828
2929 Only supported for particular Intel i915 graphics platforms.
3030
31−What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval
31+What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max_interval
3232 Date: February 2023
3333 KernelVersion: 6.2
3434 Contact: intel-gfx@lists.freedesktop.org
@@ -37,7 +37,7 @@ Description: RW. Sustained power limit interval (Tau in PL1/Tau) in · 2 unmodified lines
3737
3838 Only supported for particular Intel i915 graphics platforms.
3939
40−What: /sys/devices/.../hwmon/hwmon<i>/power1_crit
40+What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_crit
4141 Date: February 2023
4242 KernelVersion: 6.2
4343 Contact: intel-gfx@lists.freedesktop.org
@@ -50,7 +50,7 @@ Description: RW. Card reactive critical (I1) power limit in microwatts. · 6 unmodified lines
5050
5151 Only supported for particular Intel i915 graphics platforms.
5252
53−What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit
53+What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/curr1_crit
5454 Date: February 2023
5555 KernelVersion: 6.2
5656 Contact: intel-gfx@lists.freedesktop.org
@@ -63,7 +63,7 @@ Description: RW. Card reactive critical (I1) power limit in milliamperes. · 6 unmodified lines
6363
6464 Only supported for particular Intel i915 graphics platforms.
6565
66−What: /sys/devices/.../hwmon/hwmon<i>/energy1_input
66+What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/energy1_input
6767 Date: February 2023
6868 KernelVersion: 6.2
6969 Contact: intel-gfx@lists.freedesktop.org
Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon+7−7
@@ -1,4 +1,4 @@
1−What: /sys/devices/.../hwmon/hwmon<i>/power1_max
1+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max
22 Date: September 2023
33 KernelVersion: 6.5
44 Contact: intel-xe@lists.freedesktop.org
@@ -12,7 +12,7 @@ Description: RW. Card reactive sustained (PL1) power limit in microwatts. · 7 unmodified lines
1212
1313 Only supported for particular Intel xe graphics platforms.
1414
15−What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max
15+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_rated_max
1616 Date: September 2023
1717 KernelVersion: 6.5
1818 Contact: intel-xe@lists.freedesktop.org
@@ -20,7 +20,7 @@ Description: RO. Card default power limit (default TDP setting). · 1 unmodified line
2020
2121 Only supported for particular Intel xe graphics platforms.
2222
23−What: /sys/devices/.../hwmon/hwmon<i>/power1_crit
23+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit
2424 Date: September 2023
2525 KernelVersion: 6.5
2626 Contact: intel-xe@lists.freedesktop.org
@@ -33,7 +33,7 @@ Description: RW. Card reactive critical (I1) power limit in microwatts. · 6 unmodified lines
3333
3434 Only supported for particular Intel xe graphics platforms.
3535
36−What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit
36+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr1_crit
3737 Date: September 2023
3838 KernelVersion: 6.5
3939 Contact: intel-xe@lists.freedesktop.org
@@ -44,7 +44,7 @@ Description: RW. Card reactive critical (I1) power limit in milliamperes. · 4 unmodified lines
4444 the operating frequency if the power averaged over a window
4545 exceeds this limit.
4646
47−What: /sys/devices/.../hwmon/hwmon<i>/in0_input
47+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/in0_input
4848 Date: September 2023
4949 KernelVersion: 6.5
5050 Contact: intel-xe@lists.freedesktop.org
@@ -52,7 +52,7 @@ Description: RO. Current Voltage in millivolt. · 1 unmodified line
5252
5353 Only supported for particular Intel xe graphics platforms.
5454
55−What: /sys/devices/.../hwmon/hwmon<i>/energy1_input
55+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy1_input
5656 Date: September 2023
5757 KernelVersion: 6.5
5858 Contact: intel-xe@lists.freedesktop.org
@@ -60,7 +60,7 @@ Description: RO. Energy input of device in microjoules. · 1 unmodified line
6060
6161 Only supported for particular Intel xe graphics platforms.
6262
63−What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval
63+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max_interval
6464 Date: October 2023
6565 KernelVersion: 6.6
6666 Contact: intel-xe@lists.freedesktop.org
Documentation/ABI/testing/sysfs-platform-silicom+1−0
@@ -10,6 +10,7 @@ What: /sys/devices/platform/silicom-platform/power_cycle · 9 unmodified lines
1010 Date: November 2023
1111 KernelVersion: 6.7
1212 Contact: Henry Shi <henrys@silicom-usa.com>
13+Description:
1314 This file allow user to power cycle the platform.
1415 Default value is 0; when set to 1, it powers down
1516 the platform, waits 5 seconds, then powers on the
Documentation/accel/introduction.rst+2−2
@@ -101,8 +101,8 @@ External References · 100 unmodified lines
101101 email threads
102102 -------------
103103
104−* `Initial discussion on the New subsystem for acceleration devices <https://lkml.org/lkml/2022/7/31/83>`_ - Oded Gabbay (2022)
105−* `patch-set to add the new subsystem <https://lkml.org/lkml/2022/10/22/544>`_ - Oded Gabbay (2022)
104+* `Initial discussion on the New subsystem for acceleration devices <https://lore.kernel.org/lkml/CAFCwf11=9qpNAepL7NL+YAV_QO=Wv6pnWPhKHKAepK3fNn+2Dg@mail.gmail.com/>`_ - Oded Gabbay (2022)
105+* `patch-set to add the new subsystem <https://lore.kernel.org/lkml/20221022214622.18042-1-ogabbay@kernel.org/>`_ - Oded Gabbay (2022)
106106
107107 Conference talks
108108 ----------------
Documentation/admin-guide/kernel-parameters.rst+0−5
@@ -218,8 +218,3 @@ bytes respectively. Such letter suffixes can also be entirely omitted: · 217 unmodified lines
218218
219219 .. include:: kernel-parameters.txt
220220 :literal:
221−
222−Todo
223−----
224−
225− Add more DRM drivers.
Documentation/admin-guide/kernel-per-CPU-kthreads.rst+6−10
@@ -243,13 +243,9 @@ To reduce its OS jitter, do any of the following: · 242 unmodified lines
243243 3. Do any of the following needed to avoid jitter that your
244244 application cannot tolerate:
245245
246− a. Build your kernel with CONFIG_SLUB=y rather than
247− CONFIG_SLAB=y, thus avoiding the slab allocator's periodic
248− use of each CPU's workqueues to run its cache_reap()
249− function.
250− b. Avoid using oprofile, thus avoiding OS jitter from
246+ a. Avoid using oprofile, thus avoiding OS jitter from
251247 wq_sync_buffer().
252− c. Limit your CPU frequency so that a CPU-frequency
248+ b. Limit your CPU frequency so that a CPU-frequency
253249 governor is not required, possibly enlisting the aid of
254250 special heatsinks or other cooling technologies. If done
255251 correctly, and if you CPU architecture permits, you should
@@ -259,7 +255,7 @@ To reduce its OS jitter, do any of the following: · 3 unmodified lines
259255
260256 WARNING: Please check your CPU specifications to
261257 make sure that this is safe on your particular system.
262− d. As of v3.18, Christoph Lameter's on-demand vmstat workers
258+ c. As of v3.18, Christoph Lameter's on-demand vmstat workers
263259 commit prevents OS jitter due to vmstat_update() on
264260 CONFIG_SMP=y systems. Before v3.18, is not possible
265261 to entirely get rid of the OS jitter, but you can
@@ -274,7 +270,7 @@ To reduce its OS jitter, do any of the following: · 8 unmodified lines
274270 (based on an earlier one from Gilad Ben-Yossef) that
275271 reduces or even eliminates vmstat overhead for some
276272 workloads at https://lore.kernel.org/r/00000140e9dfd6bd-40db3d4f-c1be-434f-8132-7820f81bb586-000000@email.amazonses.com.
277− e. If running on high-end powerpc servers, build with
273+ d. If running on high-end powerpc servers, build with
278274 CONFIG_PPC_RTAS_DAEMON=n. This prevents the RTAS
279275 daemon from running on each CPU every second or so.
280276 (This will require editing Kconfig files and will defeat
@@ -282,12 +278,12 @@ To reduce its OS jitter, do any of the following: · 1 unmodified line
282278 due to the rtas_event_scan() function.
283279 WARNING: Please check your CPU specifications to
284280 make sure that this is safe on your particular system.
285− f. If running on Cell Processor, build your kernel with
281+ e. If running on Cell Processor, build your kernel with
286282 CBE_CPUFREQ_SPU_GOVERNOR=n to avoid OS jitter from
287283 spu_gov_work().
288284 WARNING: Please check your CPU specifications to
289285 make sure that this is safe on your particular system.
290− g. If running on PowerMAC, build your kernel with
286+ f. If running on PowerMAC, build your kernel with
291287 CONFIG_PMAC_RACKMETER=n to disable the CPU-meter,
292288 avoiding OS jitter from rackmeter_do_timer().
293289
Documentation/dev-tools/kunit/usage.rst+17−2
@@ -671,8 +671,23 @@ Testing Static Functions · 670 unmodified lines
671671 ------------------------
672672
673673 If we do not want to expose functions or variables for testing, one option is to
674−conditionally ``#include`` the test file at the end of your .c file. For
675−example:
674+conditionally export the used symbol. For example:
675+
676+.. code-block:: c
677+
678+ /* In my_file.c */
679+
680+ VISIBLE_IF_KUNIT int do_interesting_thing();
681+ EXPORT_SYMBOL_IF_KUNIT(do_interesting_thing);
682+
683+ /* In my_file.h */
684+
685+ #if IS_ENABLED(CONFIG_KUNIT)
686+ int do_interesting_thing(void);
687+ #endif
688+
689+Alternatively, you could conditionally ``#include`` the test file at the end of
690+your .c file. For example:
676691
677692 .. code-block:: c
678693
Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml+3−3
@@ -85,7 +85,7 @@ allOf: · 84 unmodified lines
8585 clocks:
8686 minItems: 6
8787 maxItems: 6
88− regs:
88+ reg:
8989 minItems: 2
9090 maxItems: 2
9191
@@ -99,7 +99,7 @@ allOf: · 7 unmodified lines
9999 clocks:
100100 minItems: 4
101101 maxItems: 4
102− regs:
102+ reg:
103103 minItems: 2
104104 maxItems: 2
105105
@@ -116,7 +116,7 @@ allOf: · 10 unmodified lines
116116 clocks:
117117 minItems: 3
118118 maxItems: 3
119− regs:
119+ reg:
120120 minItems: 1
121121 maxItems: 1
122122
Documentation/devicetree/bindings/media/cnm,wave521c.yaml+2−2
@@ -17,7 +17,7 @@ properties: · 16 unmodified lines
1717 compatible:
1818 items:
1919 - enum:
20− - ti,k3-j721s2-wave521c
20+ - ti,j721s2-wave521c
2121 - const: cnm,wave521c
2222
2323 reg:
@@ -53,7 +53,7 @@ additionalProperties: false · 29 unmodified lines
5353 examples:
5454 - |
5555 vpu: video-codec@12345678 {
56− compatible = "ti,k3-j721s2-wave521c", "cnm,wave521c";
56+ compatible = "ti,j721s2-wave521c", "cnm,wave521c";
5757 reg = <0x12345678 0x1000>;
5858 clocks = <&clks 42>;
5959 interrupts = <42>;
Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml+4−1
@@ -22,6 +22,7 @@ properties: · 21 unmodified lines
2222 - const: allwinner,sun6i-a31-spdif
2323 - const: allwinner,sun8i-h3-spdif
2424 - const: allwinner,sun50i-h6-spdif
25+ - const: allwinner,sun50i-h616-spdif
2526 - items:
2627 - const: allwinner,sun8i-a83t-spdif
2728 - const: allwinner,sun8i-h3-spdif
@@ -62,6 +63,8 @@ allOf: · 34 unmodified lines
6263 enum:
6364 - allwinner,sun6i-a31-spdif
6465 - allwinner,sun8i-h3-spdif
66+ - allwinner,sun50i-h6-spdif
67+ - allwinner,sun50i-h616-spdif
6568
6669 then:
6770 required:
@@ -73,7 +76,7 @@ allOf: · 5 unmodified lines
7376 contains:
7477 enum:
7578 - allwinner,sun8i-h3-spdif
76− - allwinner,sun50i-h6-spdif
79+ - allwinner,sun50i-h616-spdif
7780
7881 then:
7982 properties:
Documentation/filesystems/overlayfs.rst+13−3
@@ -145,7 +145,9 @@ filesystem, an overlay filesystem needs to record in the upper filesystem · 144 unmodified lines
145145 that files have been removed. This is done using whiteouts and opaque
146146 directories (non-directories are always opaque).
147147
148−A whiteout is created as a character device with 0/0 device number.
148+A whiteout is created as a character device with 0/0 device number or
149+as a zero-size regular file with the xattr "trusted.overlay.whiteout".
150+
149151 When a whiteout is found in the upper level of a merged directory, any
150152 matching name in the lower level is ignored, and the whiteout itself
151153 is also hidden.
@@ -154,6 +156,13 @@ A directory is made opaque by setting the xattr "trusted.overlay.opaque" · 2 unmodified lines
154156 to "y". Where the upper filesystem contains an opaque directory, any
155157 directory in the lower filesystem with the same name is ignored.
156158
159+An opaque directory should not conntain any whiteouts, because they do not
160+serve any purpose. A merge directory containing regular files with the xattr
161+"trusted.overlay.whiteout", should be additionally marked by setting the xattr
162+"trusted.overlay.opaque" to "x" on the merge directory itself.
163+This is needed to avoid the overhead of checking the "trusted.overlay.whiteout"
164+on all entries during readdir in the common case.
165+
157166 readdir
158167 -------
159168
@@ -534,8 +543,9 @@ A lower dir with a regular whiteout will always be handled by the overlayfs · 374 unmodified lines
534543 mount, so to support storing an effective whiteout file in an overlayfs mount an
535544 alternative form of whiteout is supported. This form is a regular, zero-size
536545 file with the "overlay.whiteout" xattr set, inside a directory with the
537−"overlay.whiteouts" xattr set. Such whiteouts are never created by overlayfs,
538−but can be used by userspace tools (like containers) that generate lower layers.
546+"overlay.opaque" xattr set to "x" (see `whiteouts and opaque directories`_).
547+These alternative whiteouts are never created by overlayfs, but can be used by
548+userspace tools (like containers) that generate lower layers.
539549 These alternative whiteouts can be escaped using the standard xattr escape
540550 mechanism in order to properly nest to any depth.
541551
Documentation/netlink/specs/rt_link.yaml+10−0
@@ -942,6 +942,10 @@ attribute-sets: · 941 unmodified lines
942942 -
943943 name: gro-ipv4-max-size
944944 type: u32
945+ -
946+ name: dpll-pin
947+ type: nest
948+ nested-attributes: link-dpll-pin-attrs
945949 -
946950 name: af-spec-attrs
947951 attributes:
@@ -1627,6 +1631,12 @@ attribute-sets: · 679 unmodified lines
16271631 -
16281632 name: used
16291633 type: u8
1634+ -
1635+ name: link-dpll-pin-attrs
1636+ attributes:
1637+ -
1638+ name: id
1639+ type: u32
16301640
16311641 sub-messages:
16321642 -
Documentation/sphinx/templates/kernel-toc.html+3−1
@@ -12,5 +12,7 @@ · 11 unmodified lines
1212 <script type="text/javascript"> <!--
1313 var sbar = document.getElementsByClassName("sphinxsidebar")[0];
1414 let currents = document.getElementsByClassName("current")
15− sbar.scrollTop = currents[currents.length - 1].offsetTop;
15+ if (currents.length) {
16+ sbar.scrollTop = currents[currents.length - 1].offsetTop;
17+ }
1618 --> </script>
Documentation/usb/gadget-testing.rst+11−11
@@ -448,17 +448,17 @@ Function-specific configfs interface · 447 unmodified lines
448448 The function name to use when creating the function directory is "ncm".
449449 The NCM function provides these attributes in its function directory:
450450
451− =============== ==================================================
452− ifname network device interface name associated with this
453− function instance
454− qmult queue length multiplier for high and super speed
455− host_addr MAC address of host's end of this
456− Ethernet over USB link
457− dev_addr MAC address of device's end of this
458− Ethernet over USB link
459− max_segment_size Segment size required for P2P connections. This
460− will set MTU to (max_segment_size - 14 bytes)
461− =============== ==================================================
451+ ======================= ==================================================
452+ ifname network device interface name associated with this
453+ function instance
454+ qmult queue length multiplier for high and super speed
455+ host_addr MAC address of host's end of this
456+ Ethernet over USB link
457+ dev_addr MAC address of device's end of this
458+ Ethernet over USB link
459+ max_segment_size Segment size required for P2P connections. This
460+ will set MTU to 14 bytes
461+ ======================= ==================================================
462462
463463 and after creating the functions/ncm.<instance name> they contain default
464464 values: qmult is 5, dev_addr and host_addr are randomly selected.
MAINTAINERS+26−27
@@ -3168,10 +3168,10 @@ F: drivers/hwmon/asus-ec-sensors.c · 3167 unmodified lines
31683168
31693169 ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
31703170 M: Corentin Chary <corentin.chary@gmail.com>
3171−L: acpi4asus-user@lists.sourceforge.net
3171+M: Luke D. Jones <luke@ljones.dev>
31723172 L: platform-driver-x86@vger.kernel.org
31733173 S: Maintained
3174−W: http://acpi4asus.sf.net
3174+W: https://asus-linux.org/
31753175 F: drivers/platform/x86/asus*.c
31763176 F: drivers/platform/x86/eeepc*.c
31773177
@@ -4169,14 +4169,14 @@ F: drivers/firmware/broadcom/tee_bnxt_fw.c · 991 unmodified lines
41694169 F: drivers/net/ethernet/broadcom/bnxt/
41704170 F: include/linux/firmware/broadcom/tee_bnxt_fw.h
41714171
4172−BROADCOM BRCM80211 IEEE802.11n WIRELESS DRIVER
4173−M: Arend van Spriel <aspriel@gmail.com>
4174−M: Franky Lin <franky.lin@broadcom.com>
4175−M: Hante Meuleman <hante.meuleman@broadcom.com>
4172+BROADCOM BRCM80211 IEEE802.11 WIRELESS DRIVERS
4173+M: Arend van Spriel <arend.vanspriel@broadcom.com>
41764174 L: linux-wireless@vger.kernel.org
4175+L: brcm80211@lists.linux.dev
41774176 L: brcm80211-dev-list.pdl@broadcom.com
41784177 S: Supported
41794178 F: drivers/net/wireless/broadcom/brcm80211/
4179+F: include/linux/platform_data/brcmfmac.h
41804180
41814181 BROADCOM BRCMSTB GPIO DRIVER
41824182 M: Doug Berger <opendmb@gmail.com>
@@ -4547,7 +4547,7 @@ F: drivers/net/ieee802154/ca8210.c · 364 unmodified lines
45474547
45484548 CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS
45494549 M: David Howells <dhowells@redhat.com>
4550−L: linux-cachefs@redhat.com (moderated for non-subscribers)
4550+L: netfs@lists.linux.dev
45514551 S: Supported
45524552 F: Documentation/filesystems/caching/cachefiles.rst
45534553 F: fs/cachefiles/
@@ -5958,7 +5958,6 @@ S: Maintained · 1404 unmodified lines
59585958 F: drivers/platform/x86/dell/dell-wmi-descriptor.c
59595959
59605960 DELL WMI HARDWARE PRIVACY SUPPORT
5961−M: Perry Yuan <Perry.Yuan@dell.com>
59625961 L: Dell.Client.Kernel@dell.com
59635962 L: platform-driver-x86@vger.kernel.org
59645963 S: Maintained
@@ -7955,12 +7954,13 @@ L: rust-for-linux@vger.kernel.org · 1990 unmodified lines
79557954 S: Maintained
79567955 F: rust/kernel/net/phy.rs
79577956
7958−EXEC & BINFMT API
7957+EXEC & BINFMT API, ELF
79597958 R: Eric Biederman <ebiederm@xmission.com>
79607959 R: Kees Cook <keescook@chromium.org>
79617960 L: linux-mm@kvack.org
79627961 S: Supported
79637962 T: git git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git for-next/execve
7963+F: Documentation/userspace-api/ELF.rst
79647964 F: fs/*binfmt_*.c
79657965 F: fs/exec.c
79667966 F: include/linux/binfmts.h
@@ -8223,7 +8223,8 @@ F: include/linux/iomap.h · 256 unmodified lines
82238223
82248224 FILESYSTEMS [NETFS LIBRARY]
82258225 M: David Howells <dhowells@redhat.com>
8226−L: linux-cachefs@redhat.com (moderated for non-subscribers)
8226+R: Jeff Layton <jlayton@kernel.org>
8227+L: netfs@lists.linux.dev
82278228 L: linux-fsdevel@vger.kernel.org
82288229 S: Supported
82298230 F: Documentation/filesystems/caching/
@@ -10091,7 +10092,7 @@ L: linux-i2c@vger.kernel.org · 1861 unmodified lines
1009110092 S: Maintained
1009210093 W: https://i2c.wiki.kernel.org/
1009310094 Q: https://patchwork.ozlabs.org/project/linux-i2c/list/
10094−T: git git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git
10095+T: git git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux.git
1009510096 F: Documentation/devicetree/bindings/i2c/
1009610097 F: drivers/i2c/algos/
1009710098 F: drivers/i2c/busses/
@@ -10283,7 +10284,7 @@ F: drivers/scsi/ibmvscsi/ibmvscsi* · 185 unmodified lines
1028310284 F: include/scsi/viosrp.h
1028410285
1028510286 IBM Power Virtual SCSI Device Target Driver
10286−M: Michael Cyr <mikecyr@linux.ibm.com>
10287+M: Tyrel Datwyler <tyreld@linux.ibm.com>
1028710288 L: linux-scsi@vger.kernel.org
1028810289 L: target-devel@vger.kernel.org
1028910290 S: Supported
@@ -10801,11 +10802,11 @@ F: drivers/gpio/gpio-tangier.h · 511 unmodified lines
1080110802
1080210803 INTEL GVT-g DRIVERS (Intel GPU Virtualization)
1080310804 M: Zhenyu Wang <zhenyuw@linux.intel.com>
10804−M: Zhi Wang <zhi.a.wang@intel.com>
10805+M: Zhi Wang <zhi.wang.linux@gmail.com>
1080510806 L: intel-gvt-dev@lists.freedesktop.org
1080610807 L: intel-gfx@lists.freedesktop.org
1080710808 S: Supported
10808−W: https://01.org/igvt-g
10809+W: https://github.com/intel/gvt-linux/wiki
1080910810 T: git https://github.com/intel/gvt-linux.git
1081010811 F: drivers/gpu/drm/i915/gvt/
1081110812
@@ -11127,7 +11128,6 @@ S: Supported · 315 unmodified lines
1112711128 F: drivers/net/wireless/intel/iwlegacy/
1112811129
1112911130 INTEL WIRELESS WIFI LINK (iwlwifi)
11130−M: Gregory Greenman <gregory.greenman@intel.com>
1113111131 M: Miri Korenblit <miriam.rachel.korenblit@intel.com>
1113211132 L: linux-wireless@vger.kernel.org
1113311133 S: Supported
@@ -11725,6 +11725,7 @@ F: fs/smb/server/ · 591 unmodified lines
1172511725 KERNEL UNIT TESTING FRAMEWORK (KUnit)
1172611726 M: Brendan Higgins <brendanhiggins@google.com>
1172711727 M: David Gow <davidgow@google.com>
11728+R: Rae Moar <rmoar@google.com>
1172811729 L: linux-kselftest@vger.kernel.org
1172911730 L: kunit-dev@googlegroups.com
1173011731 S: Maintained
@@ -12903,6 +12904,8 @@ M: Alejandro Colomar <alx@kernel.org> · 1172 unmodified lines
1290312904 L: linux-man@vger.kernel.org
1290412905 S: Maintained
1290512906 W: http://www.kernel.org/doc/man-pages
12907+T: git git://git.kernel.org/pub/scm/docs/man-pages/man-pages.git
12908+T: git git://www.alejandro-colomar.es/src/alx/linux/man-pages/man-pages.git
1290612909
1290712910 MANAGEMENT COMPONENT TRANSPORT PROTOCOL (MCTP)
1290812911 M: Jeremy Kerr <jk@codeconstruct.com.au>
@@ -15178,6 +15181,7 @@ F: Documentation/networking/net_cachelines/net_device.rst · 2269 unmodified lines
1517815181 F: drivers/connector/
1517915182 F: drivers/net/
1518015183 F: include/dt-bindings/net/
15184+F: include/linux/cn_proc.h
1518115185 F: include/linux/etherdevice.h
1518215186 F: include/linux/fcdevice.h
1518315187 F: include/linux/fddidevice.h
@@ -15185,6 +15189,7 @@ F: include/linux/hippidevice.h · 1 unmodified line
1518515189 F: include/linux/if_*
1518615190 F: include/linux/inetdevice.h
1518715191 F: include/linux/netdevice.h
15192+F: include/uapi/linux/cn_proc.h
1518815193 F: include/uapi/linux/if_*
1518915194 F: include/uapi/linux/netdevice.h
1519015195 X: drivers/net/wireless/
@@ -16857,9 +16862,8 @@ F: Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml · 1666 unmodified lines
1685716862 F: drivers/pci/controller/pcie-xilinx-cpm.c
1685816863
1685916864 PCI ENDPOINT SUBSYSTEM
16860−M: Lorenzo Pieralisi <lpieralisi@kernel.org>
16865+M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
1686116866 M: Krzysztof Wilczyński <kw@linux.com>
16862−R: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
1686316867 R: Kishon Vijay Abraham I <kishon@kernel.org>
1686416868 L: linux-pci@vger.kernel.org
1686516869 S: Supported
@@ -17179,7 +17183,7 @@ R: John Garry <john.g.garry@oracle.com> · 313 unmodified lines
1717917183 R: Will Deacon <will@kernel.org>
1718017184 R: James Clark <james.clark@arm.com>
1718117185 R: Mike Leach <mike.leach@linaro.org>
17182−R: Leo Yan <leo.yan@linaro.org>
17186+R: Leo Yan <leo.yan@linux.dev>
1718317187 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1718417188 S: Supported
1718517189 F: tools/build/feature/test-libopencsd.c
@@ -18082,7 +18086,6 @@ F: drivers/net/ethernet/qualcomm/emac/ · 896 unmodified lines
1808218086
1808318087 QUALCOMM ETHQOS ETHERNET DRIVER
1808418088 M: Vinod Koul <vkoul@kernel.org>
18085−R: Bhupesh Sharma <bhupesh.sharma@linaro.org>
1808618089 L: netdev@vger.kernel.org
1808718090 L: linux-arm-msm@vger.kernel.org
1808818091 S: Maintained
@@ -18429,7 +18432,7 @@ S: Supported · 340 unmodified lines
1842918432 F: drivers/infiniband/sw/rdmavt
1843018433
1843118434 RDS - RELIABLE DATAGRAM SOCKETS
18432−M: Santosh Shilimkar <santosh.shilimkar@oracle.com>
18435+M: Allison Henderson <allison.henderson@oracle.com>
1843318436 L: netdev@vger.kernel.org
1843418437 L: linux-rdma@vger.kernel.org
1843518438 L: rds-devel@oss.oracle.com (moderated for non-subscribers)
@@ -20550,6 +20553,7 @@ F: Documentation/translations/sp_SP/ · 2114 unmodified lines
2055020553
2055120554 SPARC + UltraSPARC (sparc/sparc64)
2055220555 M: "David S. Miller" <davem@davemloft.net>
20556+M: Andreas Larsson <andreas@gaisler.com>
2055320557 L: sparclinux@vger.kernel.org
2055420558 S: Maintained
2055520559 Q: http://patchwork.ozlabs.org/project/sparclinux/list/
@@ -24340,13 +24344,6 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/zonefs.git · 3784 unmodified lines
2434024344 F: Documentation/filesystems/zonefs.rst
2434124345 F: fs/zonefs/
2434224346
24343−ZPOOL COMPRESSED PAGE STORAGE API
24344−M: Dan Streetman <ddstreet@ieee.org>
24345−L: linux-mm@kvack.org
24346−S: Maintained
24347−F: include/linux/zpool.h
24348−F: mm/zpool.c
24349−
2435024347 ZR36067 VIDEO FOR LINUX DRIVER
2435124348 M: Corentin Labbe <clabbe@baylibre.com>
2435224349 L: mjpeg-users@lists.sourceforge.net
@@ -24398,7 +24395,9 @@ M: Nhat Pham <nphamcs@gmail.com> · 45 unmodified lines
2439824395 L: linux-mm@kvack.org
2439924396 S: Maintained
2440024397 F: Documentation/admin-guide/mm/zswap.rst
24398+F: include/linux/zpool.h
2440124399 F: include/linux/zswap.h
24400+F: mm/zpool.c
2440224401 F: mm/zswap.c
2440324402
2440424403 THE REST
Makefile+12−8
@@ -2,7 +2,7 @@ · 1 unmodified line
22 VERSION = 6
33 PATCHLEVEL = 8
44 SUBLEVEL = 0
5−EXTRAVERSION = -rc1
5+EXTRAVERSION = -rc4
66 NAME = Hurr durr I'ma ninja sloth
77
88 # *DOCUMENTATION*
@@ -294,15 +294,15 @@ may-sync-config := 1 · 285 unmodified lines
294294 single-build :=
295295
296296 ifneq ($(filter $(no-dot-config-targets), $(MAKECMDGOALS)),)
297− ifeq ($(filter-out $(no-dot-config-targets), $(MAKECMDGOALS)),)
297+ ifeq ($(filter-out $(no-dot-config-targets), $(MAKECMDGOALS)),)
298298 need-config :=
299− endif
299+ endif
300300 endif
301301
302302 ifneq ($(filter $(no-sync-config-targets), $(MAKECMDGOALS)),)
303− ifeq ($(filter-out $(no-sync-config-targets), $(MAKECMDGOALS)),)
303+ ifeq ($(filter-out $(no-sync-config-targets), $(MAKECMDGOALS)),)
304304 may-sync-config :=
305− endif
305+ endif
306306 endif
307307
308308 need-compiler := $(may-sync-config)
@@ -323,9 +323,9 @@ endif · 14 unmodified lines
323323 # We cannot build single targets and the others at the same time
324324 ifneq ($(filter $(single-targets), $(MAKECMDGOALS)),)
325325 single-build := 1
326− ifneq ($(filter-out $(single-targets), $(MAKECMDGOALS)),)
326+ ifneq ($(filter-out $(single-targets), $(MAKECMDGOALS)),)
327327 mixed-build := 1
328− endif
328+ endif
329329 endif
330330
331331 # For "make -j clean all", "make -j mrproper defconfig all", etc.
@@ -986,6 +986,10 @@ NOSTDINC_FLAGS += -nostdinc · 654 unmodified lines
986986 # perform bounds checking.
987987 KBUILD_CFLAGS += $(call cc-option, -fstrict-flex-arrays=3)
988988
989+#Currently, disable -Wstringop-overflow for GCC 11, globally.
990+KBUILD_CFLAGS-$(CONFIG_CC_NO_STRINGOP_OVERFLOW) += $(call cc-option, -Wno-stringop-overflow)
991+KBUILD_CFLAGS-$(CONFIG_CC_STRINGOP_OVERFLOW) += $(call cc-option, -Wstringop-overflow)
992+
989993 # disable invalid "can't wrap" optimizations for signed / pointers
990994 KBUILD_CFLAGS += -fno-strict-overflow
991995
@@ -1662,7 +1666,7 @@ help: · 670 unmodified lines
16621666 @echo ' (sparse by default)'
16631667 @echo ' make C=2 [targets] Force check of all c source with $$CHECK'
16641668 @echo ' make RECORDMCOUNT_WARN=1 [targets] Warn about ignored mcount sections'
1665− @echo ' make W=n [targets] Enable extra build checks, n=1,2,3 where'
1669+ @echo ' make W=n [targets] Enable extra build checks, n=1,2,3,c,e where'
16661670 @echo ' 1: warnings which may be relevant and do not occur too often'
16671671 @echo ' 2: warnings which occur quite often but may still be relevant'
16681672 @echo ' 3: more obscure warnings, can most likely be ignored'
arch/Kconfig+1−0
@@ -673,6 +673,7 @@ config SHADOW_CALL_STACK · 672 unmodified lines
673673 bool "Shadow Call Stack"
674674 depends on ARCH_SUPPORTS_SHADOW_CALL_STACK
675675 depends on DYNAMIC_FTRACE_WITH_ARGS || DYNAMIC_FTRACE_WITH_REGS || !FUNCTION_GRAPH_TRACER
676+ depends on MMU
676677 help
677678 This option enables the compiler's Shadow Call Stack, which
678679 uses a shadow stack to protect function return addresses from
arch/arc/include/asm/jump_label.h+2−2
@@ -31,7 +31,7 @@ · 30 unmodified lines
3131 static __always_inline bool arch_static_branch(struct static_key *key,
3232 bool branch)
3333 {
34− asm_volatile_goto(".balign "__stringify(JUMP_LABEL_NOP_SIZE)" \n"
34+ asm goto(".balign "__stringify(JUMP_LABEL_NOP_SIZE)" \n"
3535 "1: \n"
3636 "nop \n"
3737 ".pushsection __jump_table, \"aw\" \n"
@@ -47,7 +47,7 @@ l_yes: · 9 unmodified lines
4747 static __always_inline bool arch_static_branch_jump(struct static_key *key,
4848 bool branch)
4949 {
50− asm_volatile_goto(".balign "__stringify(JUMP_LABEL_NOP_SIZE)" \n"
50+ asm goto(".balign "__stringify(JUMP_LABEL_NOP_SIZE)" \n"
5151 "1: \n"
5252 "b %l[l_yes] \n"
5353 ".pushsection __jump_table, \"aw\" \n"
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts+2−2
@@ -45,8 +45,8 @@ · 44 unmodified lines
4545 num-chipselects = <1>;
4646 cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
4747
48− tpmdev@0 {
49− compatible = "tcg,tpm_tis-spi";
48+ tpm@0 {
49+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
5050 spi-max-frequency = <33000000>;
5151 reg = <0>;
5252 };
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts+2−2
@@ -80,8 +80,8 @@ · 79 unmodified lines
8080 gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>;
8181 num-chipselects = <1>;
8282
83− tpmdev@0 {
84− compatible = "tcg,tpm_tis-spi";
83+ tpm@0 {
84+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
8585 spi-max-frequency = <33000000>;
8686 reg = <0>;
8787 };
arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts+1−1
@@ -456,7 +456,7 @@ · 455 unmodified lines
456456 status = "okay";
457457
458458 tpm: tpm@2e {
459− compatible = "tcg,tpm-tis-i2c";
459+ compatible = "nuvoton,npct75x", "tcg,tpm-tis-i2c";
460460 reg = <0x2e>;
461461 };
462462 };
arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi+2−2
@@ -35,8 +35,8 @@ · 34 unmodified lines
3535 gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
3636 gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
3737
38− tpmdev@0 {
39− compatible = "tcg,tpm_tis-spi";
38+ tpm@0 {
39+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
4040 spi-max-frequency = <33000000>;
4141 reg = <0>;
4242 };
arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi+1−1
@@ -116,7 +116,7 @@ · 115 unmodified lines
116116 tpm_tis: tpm@1 {
117117 pinctrl-names = "default";
118118 pinctrl-0 = <&pinctrl_tpm>;
119− compatible = "tcg,tpm_tis-spi";
119+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
120120 reg = <1>;
121121 spi-max-frequency = <20000000>;
122122 interrupt-parent = <&gpio5>;
arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts+1−1
@@ -130,7 +130,7 @@ · 129 unmodified lines
130130 * TCG specification - Section 6.4.1 Clocking:
131131 * TPM shall support a SPI clock frequency range of 10-24 MHz.
132132 */
133− st33htph: tpm-tis@0 {
133+ st33htph: tpm@0 {
134134 compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
135135 reg = <0>;
136136 spi-max-frequency = <24000000>;
arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi+1−0
@@ -434,6 +434,7 @@ · 433 unmodified lines
434434 };
435435
436436 &fimd {
437+ samsung,invert-vclk;
437438 status = "okay";
438439 };
439440
arch/arm/boot/dts/ti/omap/am335x-moxa-uc-2100-common.dtsi+1−1
@@ -217,7 +217,7 @@ · 216 unmodified lines
217217 pinctrl-names = "default";
218218 pinctrl-0 = <&spi1_pins>;
219219
220− tpm_spi_tis@0 {
220+ tpm@0 {
221221 compatible = "tcg,tpm_tis-spi";
222222 reg = <0>;
223223 spi-max-frequency = <500000>;
arch/arm/include/asm/jump_label.h+2−2
@@ -11,7 +11,7 @@ · 10 unmodified lines
1111
1212 static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
1313 {
14− asm_volatile_goto("1:\n\t"
14+ asm goto("1:\n\t"
1515 WASM(nop) "\n\t"
1616 ".pushsection __jump_table, \"aw\"\n\t"
1717 ".word 1b, %l[l_yes], %c0\n\t"
@@ -25,7 +25,7 @@ l_yes: · 7 unmodified lines
2525
2626 static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch)
2727 {
28− asm_volatile_goto("1:\n\t"
28+ asm goto("1:\n\t"
2929 WASM(b) " %l[l_yes]\n\t"
3030 ".pushsection __jump_table, \"aw\"\n\t"
3131 ".word 1b, %l[l_yes], %c0\n\t"
arch/arm/mm/fault.c+2−0
@@ -298,6 +298,8 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) · 297 unmodified lines
298298 goto done;
299299 }
300300 count_vm_vma_lock_event(VMA_LOCK_RETRY);
301+ if (fault & VM_FAULT_MAJOR)
302+ flags |= FAULT_FLAG_TRIED;
301303
302304 /* Quick path to respond to signals */
303305 if (fault_signal_pending(fault, regs)) {
arch/arm64/Makefile+1−1
@@ -195,7 +195,7 @@ vdso_prepare: prepare0 · 194 unmodified lines
195195 include/generated/vdso-offsets.h arch/arm64/kernel/vdso/vdso.so
196196 ifdef CONFIG_COMPAT_VDSO
197197 $(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 \
198− include/generated/vdso32-offsets.h arch/arm64/kernel/vdso32/vdso.so
198+ arch/arm64/kernel/vdso32/vdso.so
199199 endif
200200 endif
201201
arch/arm64/boot/dts/exynos/google/gs101.dtsi+1−1
@@ -289,7 +289,7 @@ · 288 unmodified lines
289289 #clock-cells = <1>;
290290 clocks = <&cmu_top CLK_DOUT_CMU_MISC_BUS>,
291291 <&cmu_top CLK_DOUT_CMU_MISC_SSS>;
292− clock-names = "dout_cmu_misc_bus", "dout_cmu_misc_sss";
292+ clock-names = "bus", "sss";
293293 };
294294
295295 watchdog_cl0: watchdog@10060000 {
arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts+1−1
@@ -120,7 +120,7 @@ · 119 unmodified lines
120120 };
121121
122122 tpm: tpm@1 {
123− compatible = "tcg,tpm_tis-spi";
123+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
124124 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
125125 interrupt-parent = <&gpio2>;
126126 pinctrl-names = "default";
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi+1−1
@@ -89,7 +89,7 @@ · 88 unmodified lines
8989 status = "okay";
9090
9191 tpm@1 {
92− compatible = "tcg,tpm_tis-spi";
92+ compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
9393 reg = <0x1>;
9494 spi-max-frequency = <36000000>;
9595 };
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi+1−1
@@ -109,7 +109,7 @@ · 108 unmodified lines
109109 status = "okay";
110110
111111 tpm@1 {
112− compatible = "tcg,tpm_tis-spi";
112+ compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
113113 reg = <0x1>;
114114 spi-max-frequency = <36000000>;
115115 };
arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts+1−1
@@ -234,7 +234,7 @@ · 233 unmodified lines
234234 status = "okay";
235235
236236 tpm: tpm@0 {
237− compatible = "infineon,slb9670";
237+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
238238 reg = <0>;
239239 pinctrl-names = "default";
240240 pinctrl-0 = <&pinctrl_tpm>;
arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi+1−1
@@ -103,7 +103,7 @@ · 102 unmodified lines
103103 status = "okay";
104104
105105 tpm@1 {
106− compatible = "tcg,tpm_tis-spi";
106+ compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
107107 reg = <0x1>;
108108 spi-max-frequency = <36000000>;
109109 };
arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi+1−1
@@ -115,7 +115,7 @@ · 114 unmodified lines
115115 status = "okay";
116116
117117 tpm@1 {
118− compatible = "tcg,tpm_tis-spi";
118+ compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
119119 reg = <0x1>;
120120 spi-max-frequency = <36000000>;
121121 };
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts+1−1
@@ -196,7 +196,7 @@ · 195 unmodified lines
196196 status = "okay";
197197
198198 tpm@0 {
199− compatible = "tcg,tpm_tis-spi";
199+ compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
200200 reg = <0x0>;
201201 spi-max-frequency = <36000000>;
202202 };
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dts+1−1
@@ -65,7 +65,7 @@ · 64 unmodified lines
6565 status = "okay";
6666
6767 tpm@0 {
68− compatible = "infineon,slb9670";
68+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
6969 reg = <0>;
7070 spi-max-frequency = <43000000>;
7171 };
arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi+1−1
@@ -888,7 +888,7 @@ · 887 unmodified lines
888888 status = "okay";
889889 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
890890
891− cr50@0 {
891+ tpm@0 {
892892 compatible = "google,cr50";
893893 reg = <0>;
894894 spi-max-frequency = <1000000>;
arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi+1−1
@@ -1402,7 +1402,7 @@ · 1401 unmodified lines
14021402 pinctrl-names = "default";
14031403 pinctrl-0 = <&spi5_pins>;
14041404
1405− cr50@0 {
1405+ tpm@0 {
14061406 compatible = "google,cr50";
14071407 reg = <0>;
14081408 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts+1−1
@@ -70,7 +70,7 @@ · 69 unmodified lines
7070 &spi0 {
7171 status = "okay";
7272
73− cr50@0 {
73+ tpm@0 {
7474 compatible = "google,cr50";
7575 reg = <0>;
7676 interrupt-parent = <&gpio0>;
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi+1−1
@@ -706,7 +706,7 @@ camera: &i2c7 { · 705 unmodified lines
706706 &spi2 {
707707 status = "okay";
708708
709− cr50@0 {
709+ tpm@0 {
710710 compatible = "google,cr50";
711711 reg = <0>;
712712 interrupt-parent = <&gpio1>;
arch/arm64/include/asm/alternative-macros.h+2−2
@@ -229,7 +229,7 @@ alternative_has_cap_likely(const unsigned long cpucap) · 228 unmodified lines
229229 if (!cpucap_is_possible(cpucap))
230230 return false;
231231
232− asm_volatile_goto(
232+ asm goto(
233233 ALTERNATIVE_CB("b %l[l_no]", %[cpucap], alt_cb_patch_nops)
234234 :
235235 : [cpucap] "i" (cpucap)
@@ -247,7 +247,7 @@ alternative_has_cap_unlikely(const unsigned long cpucap) · 11 unmodified lines
247247 if (!cpucap_is_possible(cpucap))
248248 return false;
249249
250− asm_volatile_goto(
250+ asm goto(
251251 ALTERNATIVE("nop", "b %l[l_yes]", %[cpucap])
252252 :
253253 : [cpucap] "i" (cpucap)
arch/arm64/include/asm/jump_label.h+2−2
@@ -18,7 +18,7 @@ · 17 unmodified lines
1818 static __always_inline bool arch_static_branch(struct static_key * const key,
1919 const bool branch)
2020 {
21− asm_volatile_goto(
21+ asm goto(
2222 "1: nop \n\t"
2323 " .pushsection __jump_table, \"aw\" \n\t"
2424 " .align 3 \n\t"
@@ -35,7 +35,7 @@ l_yes: · 10 unmodified lines
3535 static __always_inline bool arch_static_branch_jump(struct static_key * const key,
3636 const bool branch)
3737 {
38− asm_volatile_goto(
38+ asm goto(
3939 "1: b %l[l_yes] \n\t"
4040 " .pushsection __jump_table, \"aw\" \n\t"
4141 " .align 3 \n\t"
arch/arm64/include/asm/vdso.h+0−3
@@ -17,9 +17,6 @@ · 16 unmodified lines
1717 #ifndef __ASSEMBLY__
1818
1919 #include <generated/vdso-offsets.h>
20−#ifdef CONFIG_COMPAT_VDSO
21−#include <generated/vdso32-offsets.h>
22−#endif
2320
2421 #define VDSO_SYMBOL(base, name) \
2522 ({ \
arch/arm64/kernel/Makefile+3−3
@@ -77,9 +77,9 @@ obj-$(CONFIG_UNWIND_PATCH_PAC_INTO_SCS) += patch-scs.o · 76 unmodified lines
7777 # We need to prevent the SCS patching code from patching itself. Using
7878 # -mbranch-protection=none here to avoid the patchable PAC opcodes from being
7979 # generated triggers an issue with full LTO on Clang, which stops emitting PAC
80−# instructions altogether. So instead, omit the unwind tables used by the
81−# patching code, so it will not be able to locate its own PAC instructions.
82−CFLAGS_patch-scs.o += -fno-asynchronous-unwind-tables -fno-unwind-tables
80+# instructions altogether. So disable LTO as well for the compilation unit.
81+CFLAGS_patch-scs.o += -mbranch-protection=none
82+CFLAGS_REMOVE_patch-scs.o += $(CC_FLAGS_LTO)
8383
8484 # Force dependency (vdso*-wrap.S includes vdso.so through incbin)
8585 $(obj)/vdso-wrap.o: $(obj)/vdso/vdso.so
arch/arm64/kernel/vdso32/Makefile+0−9
@@ -127,9 +127,6 @@ obj-vdso := $(c-obj-vdso) $(c-obj-vdso-gettimeofday) $(asm-obj-vdso) · 126 unmodified lines
127127 targets += vdso.lds
128128 CPPFLAGS_vdso.lds += -P -C -U$(ARCH)
129129
130−include/generated/vdso32-offsets.h: $(obj)/vdso32.so.dbg FORCE
131− $(call if_changed,vdsosym)
132−
133130 # Strip rule for vdso.so
134131 $(obj)/vdso.so: OBJCOPYFLAGS := -S
135132 $(obj)/vdso.so: $(obj)/vdso32.so.dbg FORCE
@@ -166,9 +163,3 @@ quiet_cmd_vdsoas = AS32 $@ · 30 unmodified lines
166163
167164 quiet_cmd_vdsomunge = MUNGE $@
168165 cmd_vdsomunge = $(obj)/$(munge) $< $@
169−
170−# Generate vDSO offsets using helper script (borrowed from the 64-bit vDSO)
171−gen-vdsosym := $(srctree)/$(src)/../vdso/gen_vdso_offsets.sh
172−quiet_cmd_vdsosym = VDSOSYM $@
173−# The AArch64 nm should be able to read an AArch32 binary
174− cmd_vdsosym = $(NM) $< | $(gen-vdsosym) | LC_ALL=C sort > $@
arch/csky/include/asm/jump_label.h+2−2
@@ -12,7 +12,7 @@ · 11 unmodified lines
1212 static __always_inline bool arch_static_branch(struct static_key *key,
1313 bool branch)
1414 {
15− asm_volatile_goto(
15+ asm goto(
1616 "1: nop32 \n"
1717 " .pushsection __jump_table, \"aw\" \n"
1818 " .align 2 \n"
@@ -29,7 +29,7 @@ label: · 10 unmodified lines
2929 static __always_inline bool arch_static_branch_jump(struct static_key *key,
3030 bool branch)
3131 {
32− asm_volatile_goto(
32+ asm goto(
3333 "1: bsr32 %l[label] \n"
3434 " .pushsection __jump_table, \"aw\" \n"
3535 " .align 2 \n"
arch/loongarch/Kconfig+2−21
@@ -12,6 +12,7 @@ config LOONGARCH · 11 unmodified lines
1212 select ARCH_DISABLE_KASAN_INLINE
1313 select ARCH_ENABLE_MEMORY_HOTPLUG
1414 select ARCH_ENABLE_MEMORY_HOTREMOVE
15+ select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
1516 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
1617 select ARCH_HAS_CPU_FINALIZE_INIT
1718 select ARCH_HAS_FORTIFY_SOURCE
@@ -99,6 +100,7 @@ config LOONGARCH · 81 unmodified lines
99100 select HAVE_ARCH_KFENCE
100101 select HAVE_ARCH_KGDB if PERF_EVENTS
101102 select HAVE_ARCH_MMAP_RND_BITS if MMU
103+ select HAVE_ARCH_SECCOMP
102104 select HAVE_ARCH_SECCOMP_FILTER
103105 select HAVE_ARCH_TRACEHOOK
104106 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
@@ -632,23 +634,6 @@ config RANDOMIZE_BASE_MAX_OFFSET · 527 unmodified lines
632634
633635 This is limited by the size of the lower address memory, 256MB.
634636
635−config SECCOMP
636− bool "Enable seccomp to safely compute untrusted bytecode"
637− depends on PROC_FS
638− default y
639− help
640− This kernel feature is useful for number crunching applications
641− that may need to compute untrusted bytecode during their
642− execution. By using pipes or other transports made available to
643− the process as file descriptors supporting the read/write
644− syscalls, it's possible to isolate those applications in
645− their own address space using seccomp. Once seccomp is
646− enabled via /proc/<pid>/seccomp, it cannot be disabled
647− and the task is only allowed to execute a few safe syscalls
648− defined by each seccomp mode.
649−
650− If unsure, say Y. Only embedded should say N here.
651−
652637 endmenu
653638
654639 config ARCH_SELECT_MEMORY_MODEL
@@ -667,10 +652,6 @@ config ARCH_SPARSEMEM_ENABLE · 12 unmodified lines
667652 or have huge holes in the physical address space for other reasons.
668653 See <file:Documentation/mm/numa.rst> for more.
669654
670−config ARCH_ENABLE_THP_MIGRATION
671− def_bool y
672− depends on TRANSPARENT_HUGEPAGE
673−
674655 config ARCH_MEMORY_PROBE
675656 def_bool y
676657 depends on MEMORY_HOTPLUG
arch/loongarch/include/asm/acpi.h+3−1
@@ -32,8 +32,10 @@ static inline bool acpi_has_cpu_in_madt(void) · 31 unmodified lines
3232 return true;
3333 }
3434
35+#define MAX_CORE_PIC 256
36+
3537 extern struct list_head acpi_wakeup_device_list;
36−extern struct acpi_madt_core_pic acpi_core_pic[NR_CPUS];
38+extern struct acpi_madt_core_pic acpi_core_pic[MAX_CORE_PIC];
3739
3840 extern int __init parse_acpi_topology(void);
3941
arch/loongarch/include/asm/jump_label.h+2−2
@@ -22,7 +22,7 @@ · 21 unmodified lines
2222
2323 static __always_inline bool arch_static_branch(struct static_key * const key, const bool branch)
2424 {
25− asm_volatile_goto(
25+ asm goto(
2626 "1: nop \n\t"
2727 JUMP_TABLE_ENTRY
2828 : : "i"(&((char *)key)[branch]) : : l_yes);
@@ -35,7 +35,7 @@ l_yes: · 6 unmodified lines
3535
3636 static __always_inline bool arch_static_branch_jump(struct static_key * const key, const bool branch)
3737 {
38− asm_volatile_goto(
38+ asm goto(
3939 "1: b %l[l_yes] \n\t"
4040 JUMP_TABLE_ENTRY
4141 : : "i"(&((char *)key)[branch]) : : l_yes);
arch/loongarch/include/asm/kvm_vcpu.h+2−2
@@ -60,7 +60,7 @@ int kvm_own_lsx(struct kvm_vcpu *vcpu); · 59 unmodified lines
6060 void kvm_save_lsx(struct loongarch_fpu *fpu);
6161 void kvm_restore_lsx(struct loongarch_fpu *fpu);
6262 #else
63−static inline int kvm_own_lsx(struct kvm_vcpu *vcpu) { }
63+static inline int kvm_own_lsx(struct kvm_vcpu *vcpu) { return -EINVAL; }
6464 static inline void kvm_save_lsx(struct loongarch_fpu *fpu) { }
6565 static inline void kvm_restore_lsx(struct loongarch_fpu *fpu) { }
6666 #endif
@@ -70,7 +70,7 @@ int kvm_own_lasx(struct kvm_vcpu *vcpu); · 3 unmodified lines
7070 void kvm_save_lasx(struct loongarch_fpu *fpu);
7171 void kvm_restore_lasx(struct loongarch_fpu *fpu);
7272 #else
73−static inline int kvm_own_lasx(struct kvm_vcpu *vcpu) { }
73+static inline int kvm_own_lasx(struct kvm_vcpu *vcpu) { return -EINVAL; }
7474 static inline void kvm_save_lasx(struct loongarch_fpu *fpu) { }
7575 static inline void kvm_restore_lasx(struct loongarch_fpu *fpu) { }
7676 #endif
arch/loongarch/kernel/acpi.c+1−3
@@ -29,11 +29,9 @@ int disabled_cpus; · 28 unmodified lines
2929
3030 u64 acpi_saved_sp;
3131
32−#define MAX_CORE_PIC 256
33−
3432 #define PREFIX "ACPI: "
3533
36−struct acpi_madt_core_pic acpi_core_pic[NR_CPUS];
34+struct acpi_madt_core_pic acpi_core_pic[MAX_CORE_PIC];
3735
3836 void __init __iomem * __acpi_map_table(unsigned long phys, unsigned long size)
3937 {
arch/loongarch/kernel/smp.c+0−1
@@ -509,7 +509,6 @@ asmlinkage void start_secondary(void) · 508 unmodified lines
509509 sync_counter();
510510 cpu = raw_smp_processor_id();
511511 set_my_cpu_offset(per_cpu_offset(cpu));
512− rcutree_report_cpu_starting(cpu);
513512
514513 cpu_probe();
515514 constant_clockevent_init();
arch/loongarch/kvm/mmu.c+2−2
@@ -675,7 +675,7 @@ static bool fault_supports_huge_mapping(struct kvm_memory_slot *memslot, · 674 unmodified lines
675675 *
676676 * There are several ways to safely use this helper:
677677 *
678− * - Check mmu_invalidate_retry_hva() after grabbing the mapping level, before
678+ * - Check mmu_invalidate_retry_gfn() after grabbing the mapping level, before
679679 * consuming it. In this case, mmu_lock doesn't need to be held during the
680680 * lookup, but it does need to be held while checking the MMU notifier.
681681 *
@@ -855,7 +855,7 @@ retry: · 173 unmodified lines
855855
856856 /* Check if an invalidation has taken place since we got pfn */
857857 spin_lock(&kvm->mmu_lock);
858− if (mmu_invalidate_retry_hva(kvm, mmu_seq, hva)) {
858+ if (mmu_invalidate_retry_gfn(kvm, mmu_seq, gfn)) {
859859 /*
860860 * This can happen when mappings are changed asynchronously, but
861861 * also synchronously if a COW is triggered by
arch/loongarch/mm/kasan_init.c+3−0
@@ -44,6 +44,9 @@ void *kasan_mem_to_shadow(const void *addr) · 43 unmodified lines
4444 unsigned long xrange = (maddr >> XRANGE_SHIFT) & 0xffff;
4545 unsigned long offset = 0;
4646
47+ if (maddr >= FIXADDR_START)
48+ return (void *)(kasan_early_shadow_page);
49+
4750 maddr &= XRANGE_SHADOW_MASK;
4851 switch (xrange) {
4952 case XKPRANGE_CC_SEG:
arch/loongarch/mm/tlb.c+10−6
@@ -284,12 +284,16 @@ static void setup_tlb_handler(int cpu) · 283 unmodified lines
284284 set_handler(EXCCODE_TLBNR * VECSIZE, handle_tlb_protect, VECSIZE);
285285 set_handler(EXCCODE_TLBNX * VECSIZE, handle_tlb_protect, VECSIZE);
286286 set_handler(EXCCODE_TLBPE * VECSIZE, handle_tlb_protect, VECSIZE);
287− }
287+ } else {
288+ int vec_sz __maybe_unused;
289+ void *addr __maybe_unused;
290+ struct page *page __maybe_unused;
291+
292+ /* Avoid lockdep warning */
293+ rcutree_report_cpu_starting(cpu);
294+
288295 #ifdef CONFIG_NUMA
289− else {
290− void *addr;
291− struct page *page;
292− const int vec_sz = sizeof(exception_handlers);
296+ vec_sz = sizeof(exception_handlers);
293297
294298 if (pcpu_handlers[cpu])
295299 return;
@@ -305,8 +309,8 @@ static void setup_tlb_handler(int cpu) · 9 unmodified lines
305309 csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_EENTRY);
306310 csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_MERRENTRY);
307311 csr_write64(pcpu_handlers[cpu] + 80*VECSIZE, LOONGARCH_CSR_TLBRENTRY);
308− }
309312 #endif
313+ }
310314 }
311315
312316 void tlb_init(int cpu)
arch/loongarch/vdso/Makefile+1−0
@@ -2,6 +2,7 @@ · 1 unmodified line
22 # Objects to go into the VDSO.
33
44 KASAN_SANITIZE := n
5+UBSAN_SANITIZE := n
56 KCOV_INSTRUMENT := n
67
78 # Include the generic Makefile to check the built vdso.
arch/m68k/Makefile+2−2
@@ -15,10 +15,10 @@ · 14 unmodified lines
1515 KBUILD_DEFCONFIG := multi_defconfig
1616
1717 ifdef cross_compiling
18− ifeq ($(CROSS_COMPILE),)
18+ ifeq ($(CROSS_COMPILE),)
1919 CROSS_COMPILE := $(call cc-cross-prefix, \
2020 m68k-linux-gnu- m68k-linux- m68k-unknown-linux-gnu-)
21− endif
21+ endif
2222 endif
2323
2424 #
arch/mips/alchemy/common/prom.c+1−0
@@ -40,6 +40,7 @@ · 39 unmodified lines
4040 #include <linux/string.h>
4141
4242 #include <asm/bootinfo.h>
43+#include <prom.h>
4344
4445 int prom_argc;
4546 char **prom_argv;
arch/mips/alchemy/common/setup.c+1−3
@@ -30,13 +30,11 @@ · 29 unmodified lines
3030 #include <linux/mm.h>
3131 #include <linux/dma-map-ops.h> /* for dma_default_coherent */
3232
33+#include <asm/bootinfo.h>
3334 #include <asm/mipsregs.h>
3435
3536 #include <au1000.h>
3637
37−extern void __init board_setup(void);
38−extern void __init alchemy_set_lpj(void);
39−
4038 static bool alchemy_dma_coherent(void)
4139 {
4240 switch (alchemy_get_cputype()) {
arch/mips/bcm63xx/boards/board_bcm963xx.c+1−1
@@ -702,7 +702,7 @@ static struct ssb_sprom bcm63xx_sprom = { · 701 unmodified lines
702702 .boardflags_hi = 0x0000,
703703 };
704704
705−int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
705+static int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
706706 {
707707 if (bus->bustype == SSB_BUSTYPE_PCI) {
708708 memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
arch/mips/bcm63xx/dev-rng.c+1−1
@@ -26,7 +26,7 @@ static struct platform_device bcm63xx_rng_device = { · 25 unmodified lines
2626 .resource = rng_resources,
2727 };
2828
29−int __init bcm63xx_rng_register(void)
29+static int __init bcm63xx_rng_register(void)
3030 {
3131 if (!BCMCPU_IS_6368())
3232 return -ENODEV;
arch/mips/bcm63xx/dev-uart.c+1−0
@@ -10,6 +10,7 @@ · 9 unmodified lines
1010 #include <linux/kernel.h>
1111 #include <linux/platform_device.h>
1212 #include <bcm63xx_cpu.h>
13+#include <bcm63xx_dev_uart.h>
1314
1415 static struct resource uart0_resources[] = {
1516 {
arch/mips/bcm63xx/dev-wdt.c+1−1
@@ -34,7 +34,7 @@ static struct platform_device bcm63xx_wdt_device = { · 33 unmodified lines
3434 },
3535 };
3636
37−int __init bcm63xx_wdt_register(void)
37+static int __init bcm63xx_wdt_register(void)
3838 {
3939 wdt_resources[0].start = bcm63xx_regset_address(RSET_WDT);
4040 wdt_resources[0].end = wdt_resources[0].start;
arch/mips/bcm63xx/irq.c+1−1
@@ -72,7 +72,7 @@ static inline int enable_irq_for_cpu(int cpu, struct irq_data *d, · 71 unmodified lines
7272 */
7373
7474 #define BUILD_IPIC_INTERNAL(width) \
75−void __dispatch_internal_##width(int cpu) \
75+static void __dispatch_internal_##width(int cpu) \
7676 { \
7777 u32 pending[width / 32]; \
7878 unsigned int src, tgt; \
arch/mips/bcm63xx/setup.c+1−1
@@ -159,7 +159,7 @@ void __init plat_mem_setup(void) · 158 unmodified lines
159159 board_setup();
160160 }
161161
162−int __init bcm63xx_register_devices(void)
162+static int __init bcm63xx_register_devices(void)
163163 {
164164 /* register gpiochip */
165165 bcm63xx_gpio_init();
arch/mips/bcm63xx/timer.c+1−1
@@ -178,7 +178,7 @@ int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us) · 177 unmodified lines
178178
179179 EXPORT_SYMBOL(bcm63xx_timer_set);
180180
181−int bcm63xx_timer_init(void)
181+static int bcm63xx_timer_init(void)
182182 {
183183 int ret, irq;
184184 u32 reg;
arch/mips/cobalt/setup.c+0−3
@@ -23,9 +23,6 @@ · 22 unmodified lines
2323
2424 #include <cobalt.h>
2525
26−extern void cobalt_machine_restart(char *command);
27−extern void cobalt_machine_halt(void);
28−
2926 const char *get_system_type(void)
3027 {
3128 switch (cobalt_board_id) {
arch/mips/fw/arc/memory.c+1−1
@@ -37,7 +37,7 @@ static unsigned int nr_prom_mem __initdata; · 36 unmodified lines
3737 */
3838 #define ARC_PAGE_SHIFT 12
3939
40−struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current)
40+static struct linux_mdesc * __init ArcGetMemoryDescriptor(struct linux_mdesc *Current)
4141 {
4242 return (struct linux_mdesc *) ARC_CALL1(get_mdesc, Current);
4343 }
arch/mips/include/asm/jump_label.h+2−2
@@ -39,7 +39,7 @@ extern void jump_label_apply_nops(struct module *mod); · 38 unmodified lines
3939
4040 static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
4141 {
42− asm_volatile_goto("1:\t" B_INSN " 2f\n\t"
42+ asm goto("1:\t" B_INSN " 2f\n\t"
4343 "2:\t.insn\n\t"
4444 ".pushsection __jump_table, \"aw\"\n\t"
4545 WORD_INSN " 1b, %l[l_yes], %0\n\t"
@@ -53,7 +53,7 @@ l_yes: · 7 unmodified lines
5353
5454 static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch)
5555 {
56− asm_volatile_goto("1:\t" J_INSN " %l[l_yes]\n\t"
56+ asm goto("1:\t" J_INSN " %l[l_yes]\n\t"
5757 ".pushsection __jump_table, \"aw\"\n\t"
5858 WORD_INSN " 1b, %l[l_yes], %0\n\t"
5959 ".popsection\n\t"
arch/mips/include/asm/mach-au1x00/au1000.h+3−0
@@ -597,6 +597,9 @@ · 596 unmodified lines
597597
598598 #include <asm/cpu.h>
599599
600+void alchemy_set_lpj(void);
601+void board_setup(void);
602+
600603 /* helpers to access the SYS_* registers */
601604 static inline unsigned long alchemy_rdsys(int regofs)
602605 {
arch/mips/include/asm/mach-cobalt/cobalt.h+3−0
@@ -19,4 +19,7 @@ extern int cobalt_board_id; · 18 unmodified lines
1919 #define COBALT_BRD_ID_QUBE2 0x5
2020 #define COBALT_BRD_ID_RAQ2 0x6
2121
22+void cobalt_machine_halt(void);
23+void cobalt_machine_restart(char *command);
24+
2225 #endif /* __ASM_COBALT_H */
arch/mips/kernel/elf.c+6−0
@@ -11,6 +11,7 @@ · 10 unmodified lines
1111
1212 #include <asm/cpu-features.h>
1313 #include <asm/cpu-info.h>
14+#include <asm/fpu.h>
1415
1516 #ifdef CONFIG_MIPS_FP_SUPPORT
1617
@@ -309,6 +310,11 @@ void mips_set_personality_nan(struct arch_elf_state *state) · 292 unmodified lines
309310 struct cpuinfo_mips *c = &boot_cpu_data;
310311 struct task_struct *t = current;
311312
313+ /* Do this early so t->thread.fpu.fcr31 won't be clobbered in case
314+ * we are preempted before the lose_fpu(0) in start_thread.
315+ */
316+ lose_fpu(0);
317+
312318 t->thread.fpu.fcr31 = c->fpu_csr31;
313319 switch (state->nan_2008) {
314320 case 0:
arch/mips/kernel/traps.c+7−1
@@ -2007,7 +2007,13 @@ unsigned long vi_handlers[64]; · 2006 unmodified lines
20072007
20082008 void reserve_exception_space(phys_addr_t addr, unsigned long size)
20092009 {
2010− memblock_reserve(addr, size);
2010+ /*
2011+ * reserve exception space on CPUs other than CPU0
2012+ * is too late, since memblock is unavailable when APs
2013+ * up
2014+ */
2015+ if (smp_processor_id() == 0)
2016+ memblock_reserve(addr, size);
20112017 }
20122018
20132019 void __init *set_except_vector(int n, void *addr)
arch/mips/lantiq/prom.c+3−4
@@ -108,10 +108,9 @@ void __init prom_init(void) · 107 unmodified lines
108108 prom_init_cmdline();
109109
110110 #if defined(CONFIG_MIPS_MT_SMP)
111− if (cpu_has_mipsmt) {
112− lantiq_smp_ops = vsmp_smp_ops;
111+ lantiq_smp_ops = vsmp_smp_ops;
112+ if (cpu_has_mipsmt)
113113 lantiq_smp_ops.init_secondary = lantiq_init_secondary;
114− register_smp_ops(&lantiq_smp_ops);
115− }
114+ register_smp_ops(&lantiq_smp_ops);
116115 #endif
117116 }
arch/mips/loongson64/init.c+3−0
@@ -103,6 +103,9 @@ void __init szmem(unsigned int node) · 102 unmodified lines
103103 if (loongson_sysconf.vgabios_addr)
104104 memblock_reserve(virt_to_phys((void *)loongson_sysconf.vgabios_addr),
105105 SZ_256K);
106+ /* set nid for reserved memory */
107+ memblock_set_node((u64)node << 44, (u64)(node + 1) << 44,
108+ &memblock.reserved, node);
106109 }
107110
108111 #ifndef CONFIG_NUMA
arch/mips/loongson64/numa.c+2−0
@@ -132,6 +132,8 @@ static void __init node_mem_init(unsigned int node) · 131 unmodified lines
132132
133133 /* Reserve pfn range 0~node[0]->node_start_pfn */
134134 memblock_reserve(0, PAGE_SIZE * start_pfn);
135+ /* set nid for reserved memory on node 0 */
136+ memblock_set_node(0, 1ULL << 44, &memblock.reserved, 0);
135137 }
136138 }
137139
arch/mips/sgi-ip27/Makefile+1−1
@@ -5,7 +5,7 @@ · 4 unmodified lines
55
66 obj-y := ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o \
77 ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o \
8− ip27-hubio.o ip27-xtalk.o
8+ ip27-xtalk.o
99
1010 obj-$(CONFIG_EARLY_PRINTK) += ip27-console.o
1111 obj-$(CONFIG_SMP) += ip27-smp.o
arch/mips/sgi-ip27/ip27-berr.c+3−1
@@ -22,6 +22,8 @@ · 21 unmodified lines
2222 #include <asm/traps.h>
2323 #include <linux/uaccess.h>
2424
25+#include "ip27-common.h"
26+
2527 static void dump_hub_information(unsigned long errst0, unsigned long errst1)
2628 {
2729 static char *err_type[2][8] = {
@@ -57,7 +59,7 @@ static void dump_hub_information(unsigned long errst0, unsigned long errst1) · 29 unmodified lines
5759 [st0.pi_stat0_fmt.s0_err_type] ? : "invalid");
5860 }
5961
60−int ip27_be_handler(struct pt_regs *regs, int is_fixup)
62+static int ip27_be_handler(struct pt_regs *regs, int is_fixup)
6163 {
6264 unsigned long errst0, errst1;
6365 int data = regs->cp0_cause & 4;
arch/mips/sgi-ip27/ip27-common.h+2−0
@@ -10,6 +10,7 @@ extern void hub_rt_clock_event_init(void); · 9 unmodified lines
1010 extern void hub_rtc_init(nasid_t nasid);
1111 extern void install_cpu_nmi_handler(int slice);
1212 extern void install_ipi(void);
13+extern void ip27_be_init(void);
1314 extern void ip27_reboot_setup(void);
1415 extern const struct plat_smp_ops ip27_smp_ops;
1516 extern unsigned long node_getfirstfree(nasid_t nasid);
@@ -17,4 +18,5 @@ extern void per_cpu_init(void); · 1 unmodified line
1718 extern void replicate_kernel_text(void);
1819 extern void setup_replication_mask(void);
1920
21+
2022 #endif /* __IP27_COMMON_H */
arch/mips/sgi-ip27/ip27-hubio.c+0−185
@@ -1,185 +0,0 @@
1−// SPDX-License-Identifier: GPL-2.0-only
2−/*
3− * Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc.
4− * Copyright (C) 2004 Christoph Hellwig.
5− *
6− * Support functions for the HUB ASIC - mostly PIO mapping related.
7− */
8−
9−#include <linux/bitops.h>
10−#include <linux/string.h>
11−#include <linux/mmzone.h>
12−#include <asm/sn/addrs.h>
13−#include <asm/sn/arch.h>
14−#include <asm/sn/agent.h>
15−#include <asm/sn/io.h>
16−#include <asm/xtalk/xtalk.h>
17−
18−
19−static int force_fire_and_forget = 1;
20−
21−/**
22− * hub_pio_map - establish a HUB PIO mapping
23− *
24− * @nasid: nasid to perform PIO mapping on
25− * @widget: widget ID to perform PIO mapping for
26− * @xtalk_addr: xtalk_address that needs to be mapped
27− * @size: size of the PIO mapping
28− *
29− **/
30−unsigned long hub_pio_map(nasid_t nasid, xwidgetnum_t widget,
31− unsigned long xtalk_addr, size_t size)
32−{
33− unsigned i;
34−
35− /* use small-window mapping if possible */
36− if ((xtalk_addr % SWIN_SIZE) + size <= SWIN_SIZE)
37− return NODE_SWIN_BASE(nasid, widget) + (xtalk_addr % SWIN_SIZE);
38−
39− if ((xtalk_addr % BWIN_SIZE) + size > BWIN_SIZE) {
40− printk(KERN_WARNING "PIO mapping at hub %d widget %d addr 0x%lx"
41− " too big (%ld)\n",
42− nasid, widget, xtalk_addr, size);
43− return 0;
44− }
45−
46− xtalk_addr &= ~(BWIN_SIZE-1);
47− for (i = 0; i < HUB_NUM_BIG_WINDOW; i++) {
48− if (test_and_set_bit(i, hub_data(nasid)->h_bigwin_used))
49− continue;
50−
51− /*
52− * The code below does a PIO write to setup an ITTE entry.
53− *
54− * We need to prevent other CPUs from seeing our updated
55− * memory shadow of the ITTE (in the piomap) until the ITTE
56− * entry is actually set up; otherwise, another CPU might
57− * attempt a PIO prematurely.
58− *
59− * Also, the only way we can know that an entry has been
60− * received by the hub and can be used by future PIO reads/
61− * writes is by reading back the ITTE entry after writing it.
62− *
63− * For these two reasons, we PIO read back the ITTE entry
64− * after we write it.
65− */
66− IIO_ITTE_PUT(nasid, i, HUB_PIO_MAP_TO_MEM, widget, xtalk_addr);
67− __raw_readq(IIO_ITTE_GET(nasid, i));
68−
69− return NODE_BWIN_BASE(nasid, widget) + (xtalk_addr % BWIN_SIZE);
70− }
71−
72− printk(KERN_WARNING "unable to establish PIO mapping for at"
73− " hub %d widget %d addr 0x%lx\n",
74− nasid, widget, xtalk_addr);
75− return 0;
76−}
77−
78−
79−/*
80− * hub_setup_prb(nasid, prbnum, credits, conveyor)
81− *
82− * Put a PRB into fire-and-forget mode if conveyor isn't set. Otherwise,
83− * put it into conveyor belt mode with the specified number of credits.
84− */
85−static void hub_setup_prb(nasid_t nasid, int prbnum, int credits)
86−{
87− union iprb_u prb;
88− int prb_offset;
89−
90− /*
91− * Get the current register value.
92− */
93− prb_offset = IIO_IOPRB(prbnum);
94− prb.iprb_regval = REMOTE_HUB_L(nasid, prb_offset);
95−
96− /*
97− * Clear out some fields.
98− */
99− prb.iprb_ovflow = 1;
100− prb.iprb_bnakctr = 0;
101− prb.iprb_anakctr = 0;
102−
103− /*
104− * Enable or disable fire-and-forget mode.
105− */
106− prb.iprb_ff = force_fire_and_forget ? 1 : 0;
107−
108− /*
109− * Set the appropriate number of PIO credits for the widget.
110− */
111− prb.iprb_xtalkctr = credits;
112−
113− /*
114− * Store the new value to the register.
115− */
116− REMOTE_HUB_S(nasid, prb_offset, prb.iprb_regval);
117−}
118−
119−/**
120− * hub_set_piomode - set pio mode for a given hub
121− *
122− * @nasid: physical node ID for the hub in question
123− *
124− * Put the hub into either "PIO conveyor belt" mode or "fire-and-forget" mode.
125− * To do this, we have to make absolutely sure that no PIOs are in progress
126− * so we turn off access to all widgets for the duration of the function.
127− *
128− * XXX - This code should really check what kind of widget we're talking
129− * to. Bridges can only handle three requests, but XG will do more.
130− * How many can crossbow handle to widget 0? We're assuming 1.
131− *
132− * XXX - There is a bug in the crossbow that link reset PIOs do not
133− * return write responses. The easiest solution to this problem is to
134− * leave widget 0 (xbow) in fire-and-forget mode at all times. This
135− * only affects pio's to xbow registers, which should be rare.
136− **/
137−static void hub_set_piomode(nasid_t nasid)
138−{
139− u64 ii_iowa;
140− union hubii_wcr_u ii_wcr;
141− unsigned i;
142−
143− ii_iowa = REMOTE_HUB_L(nasid, IIO_OUTWIDGET_ACCESS);
144− REMOTE_HUB_S(nasid, IIO_OUTWIDGET_ACCESS, 0);
145−
146− ii_wcr.wcr_reg_value = REMOTE_HUB_L(nasid, IIO_WCR);
147−
148− if (ii_wcr.iwcr_dir_con) {
149− /*
150− * Assume a bridge here.
151− */
152− hub_setup_prb(nasid, 0, 3);
153− } else {
154− /*
155− * Assume a crossbow here.
156− */
157− hub_setup_prb(nasid, 0, 1);
158− }
159−
160− /*
161− * XXX - Here's where we should take the widget type into
162− * when account assigning credits.
163− */
164− for (i = HUB_WIDGET_ID_MIN; i <= HUB_WIDGET_ID_MAX; i++)
165− hub_setup_prb(nasid, i, 3);
166−
167− REMOTE_HUB_S(nasid, IIO_OUTWIDGET_ACCESS, ii_iowa);
168−}
169−
170−/*
171− * hub_pio_init - PIO-related hub initialization
172− *
173− * @hub: hubinfo structure for our hub
174− */
175−void hub_pio_init(nasid_t nasid)
176−{
177− unsigned i;
178−
179− /* initialize big window piomaps for this hub */
180− bitmap_zero(hub_data(nasid)->h_bigwin_used, HUB_NUM_BIG_WINDOW);
181− for (i = 0; i < HUB_NUM_BIG_WINDOW; i++)
182− IIO_ITTE_DISABLE(nasid, i);
183−
184− hub_set_piomode(nasid);
185−}
arch/mips/sgi-ip27/ip27-irq.c+2−0
@@ -23,6 +23,8 @@ · 22 unmodified lines
2323 #include <asm/sn/intr.h>
2424 #include <asm/sn/irq_alloc.h>
2525
26+#include "ip27-common.h"
27+
2628 struct hub_irq_data {
2729 u64 *irq_mask[2];
2830 cpuid_t cpu;
arch/mips/sgi-ip27/ip27-memory.c+1−0
@@ -23,6 +23,7 @@ · 22 unmodified lines
2323 #include <asm/page.h>
2424 #include <asm/pgalloc.h>
2525 #include <asm/sections.h>
26+#include <asm/sgialib.h>
2627
2728 #include <asm/sn/arch.h>
2829 #include <asm/sn/agent.h>
arch/mips/sgi-ip27/ip27-nmi.c+8−17
@@ -11,6 +11,8 @@ · 10 unmodified lines
1111 #include <asm/sn/arch.h>
1212 #include <asm/sn/agent.h>
1313
14+#include "ip27-common.h"
15+
1416 #if 0
1517 #define NODE_NUM_CPUS(n) CNODE_NUM_CPUS(n)
1618 #else
@@ -23,16 +25,7 @@ · 6 unmodified lines
2325 typedef unsigned long machreg_t;
2426
2527 static arch_spinlock_t nmi_lock = __ARCH_SPIN_LOCK_UNLOCKED;
26−
27−/*
28− * Let's see what else we need to do here. Set up sp, gp?
29− */
30−void nmi_dump(void)
31−{
32− void cont_nmi_dump(void);
33−
34− cont_nmi_dump();
35−}
28+static void nmi_dump(void);
3629
3730 void install_cpu_nmi_handler(int slice)
3831 {
@@ -53,7 +46,7 @@ void install_cpu_nmi_handler(int slice) · 14 unmodified lines
5346 * into the eframe format for the node under consideration.
5447 */
5548
56−void nmi_cpu_eframe_save(nasid_t nasid, int slice)
49+static void nmi_cpu_eframe_save(nasid_t nasid, int slice)
5750 {
5851 struct reg_struct *nr;
5952 int i;
@@ -129,7 +122,7 @@ void nmi_cpu_eframe_save(nasid_t nasid, int slice) · 69 unmodified lines
129122 pr_emerg("\n");
130123 }
131124
132−void nmi_dump_hub_irq(nasid_t nasid, int slice)
125+static void nmi_dump_hub_irq(nasid_t nasid, int slice)
133126 {
134127 u64 mask0, mask1, pend0, pend1;
135128
@@ -153,7 +146,7 @@ void nmi_dump_hub_irq(nasid_t nasid, int slice) · 17 unmodified lines
153146 * Copy the cpu registers which have been saved in the IP27prom format
154147 * into the eframe format for the node under consideration.
155148 */
156−void nmi_node_eframe_save(nasid_t nasid)
149+static void nmi_node_eframe_save(nasid_t nasid)
157150 {
158151 int slice;
159152
@@ -170,8 +163,7 @@ void nmi_node_eframe_save(nasid_t nasid) · 10 unmodified lines
170163 /*
171164 * Save the nmi cpu registers for all cpus in the system.
172165 */
173−void
174−nmi_eframes_save(void)
166+static void nmi_eframes_save(void)
175167 {
176168 nasid_t nasid;
177169
@@ -179,8 +171,7 @@ nmi_eframes_save(void) · 1 unmodified line
179171 nmi_node_eframe_save(nasid);
180172 }
181173
182−void
183−cont_nmi_dump(void)
174+static void nmi_dump(void)
184175 {
185176 #ifndef REAL_NMI_SIGNAL
186177 static atomic_t nmied_cpus = ATOMIC_INIT(0);
arch/mips/sgi-ip30/ip30-console.c+1−0
@@ -3,6 +3,7 @@ · 2 unmodified lines
33 #include <linux/io.h>
44
55 #include <asm/sn/ioc3.h>
6+#include <asm/setup.h>
67
78 static inline struct ioc3_uartregs *console_uart(void)
89 {
arch/mips/sgi-ip30/ip30-setup.c+1−0
@@ -14,6 +14,7 @@ · 13 unmodified lines
1414 #include <linux/percpu.h>
1515 #include <linux/memblock.h>
1616
17+#include <asm/bootinfo.h>
1718 #include <asm/smp-ops.h>
1819 #include <asm/sgialib.h>
1920 #include <asm/time.h>
arch/mips/sgi-ip32/crime.c+4−2
@@ -18,6 +18,8 @@ · 17 unmodified lines
1818 #include <asm/ip32/crime.h>
1919 #include <asm/ip32/mace.h>
2020
21+#include "ip32-common.h"
22+
2123 struct sgi_crime __iomem *crime;
2224 struct sgi_mace __iomem *mace;
2325
@@ -39,7 +41,7 @@ void __init crime_init(void) · 15 unmodified lines
3941 id, rev, field, (unsigned long) CRIME_BASE);
4042 }
4143
42−irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id)
44+irqreturn_t crime_memerr_intr(int irq, void *dev_id)
4345 {
4446 unsigned long stat, addr;
4547 int fatal = 0;
@@ -90,7 +92,7 @@ irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id) · 44 unmodified lines
9092 return IRQ_HANDLED;
9193 }
9294
93−irqreturn_t crime_cpuerr_intr(unsigned int irq, void *dev_id)
95+irqreturn_t crime_cpuerr_intr(int irq, void *dev_id)
9496 {
9597 unsigned long stat = crime->cpu_error_stat & CRIME_CPU_ERROR_MASK;
9698 unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
arch/mips/sgi-ip32/ip32-berr.c+2−0
@@ -18,6 +18,8 @@ · 17 unmodified lines
1818 #include <asm/ptrace.h>
1919 #include <asm/tlbdebug.h>
2020
21+#include "ip32-common.h"
22+
2123 static int ip32_be_handler(struct pt_regs *regs, int is_fixup)
2224 {
2325 int data = regs->cp0_cause & 4;
arch/mips/sgi-ip32/ip32-common.h+15−0
@@ -0,0 +1,15 @@
1+/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+#ifndef __IP32_COMMON_H
4+#define __IP32_COMMON_H
5+
6+#include <linux/init.h>
7+#include <linux/interrupt.h>
8+
9+void __init crime_init(void);
10+irqreturn_t crime_memerr_intr(int irq, void *dev_id);
11+irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
12+void __init ip32_be_init(void);
13+void ip32_prepare_poweroff(void);
14+
15+#endif /* __IP32_COMMON_H */
arch/mips/sgi-ip32/ip32-irq.c+2−4
@@ -28,6 +28,8 @@ · 27 unmodified lines
2828 #include <asm/ip32/mace.h>
2929 #include <asm/ip32/ip32_ints.h>
3030
31+#include "ip32-common.h"
32+
3133 /* issue a PIO read to make sure no PIO writes are pending */
3234 static inline void flush_crime_bus(void)
3335 {
@@ -107,10 +109,6 @@ static inline void flush_mace_bus(void) · 73 unmodified lines
107109 * is quite different anyway.
108110 */
109111
110−/* Some initial interrupts to set up */
111−extern irqreturn_t crime_memerr_intr(int irq, void *dev_id);
112−extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
113−
114112 /*
115113 * This is for pure CRIME interrupts - ie not MACE. The advantage?
116114 * We get to split the register in half and do faster lookups.
arch/mips/sgi-ip32/ip32-memory.c+1−0
@@ -15,6 +15,7 @@ · 14 unmodified lines
1515 #include <asm/ip32/crime.h>
1616 #include <asm/bootinfo.h>
1717 #include <asm/page.h>
18+#include <asm/sgialib.h>
1819
1920 extern void crime_init(void);
2021
arch/mips/sgi-ip32/ip32-reset.c+2−0
@@ -29,6 +29,8 @@ · 28 unmodified lines
2929 #include <asm/ip32/crime.h>
3030 #include <asm/ip32/ip32_ints.h>
3131
32+#include "ip32-common.h"
33+
3234 #define POWERDOWN_TIMEOUT 120
3335 /*
3436 * Blink frequency during reboot grace period and when panicked.
arch/mips/sgi-ip32/ip32-setup.c+1−2
@@ -26,8 +26,7 @@ · 25 unmodified lines
2626 #include <asm/ip32/mace.h>
2727 #include <asm/ip32/ip32_ints.h>
2828
29−extern void ip32_be_init(void);
30−extern void crime_init(void);
29+#include "ip32-common.h"
3130
3231 #ifdef CONFIG_SGI_O2MACE_ETH
3332 /*
arch/parisc/Kconfig+0−1
@@ -25,7 +25,6 @@ config PARISC · 24 unmodified lines
2525 select RTC_DRV_GENERIC
2626 select INIT_ALL_POSSIBLE
2727 select BUG
28− select BUILDTIME_TABLE_SORT
2928 select HAVE_KERNEL_UNCOMPRESSED
3029 select HAVE_PCI
3130 select HAVE_PERF_EVENTS
arch/parisc/Makefile+2−2
@@ -50,12 +50,12 @@ export CROSS32CC · 49 unmodified lines
5050
5151 # Set default cross compiler for kernel build
5252 ifdef cross_compiling
53− ifeq ($(CROSS_COMPILE),)
53+ ifeq ($(CROSS_COMPILE),)
5454 CC_SUFFIXES = linux linux-gnu unknown-linux-gnu suse-linux
5555 CROSS_COMPILE := $(call cc-cross-prefix, \
5656 $(foreach a,$(CC_ARCHES), \
5757 $(foreach s,$(CC_SUFFIXES),$(a)-$(s)-)))
58− endif
58+ endif
5959 endif
6060
6161 ifdef CONFIG_DYNAMIC_FTRACE
arch/parisc/include/asm/assembly.h+1−0
@@ -576,6 +576,7 @@ · 575 unmodified lines
576576 .section __ex_table,"aw" ! \
577577 .align 4 ! \
578578 .word (fault_addr - .), (except_addr - .) ! \
579+ or %r0,%r0,%r0 ! \
579580 .previous
580581
581582
arch/parisc/include/asm/extable.h+64−0
@@ -0,0 +1,64 @@
1+/* SPDX-License-Identifier: GPL-2.0 */
2+#ifndef __PARISC_EXTABLE_H
3+#define __PARISC_EXTABLE_H
4+
5+#include <asm/ptrace.h>
6+#include <linux/compiler.h>
7+
8+/*
9+ * The exception table consists of three addresses:
10+ *
11+ * - A relative address to the instruction that is allowed to fault.
12+ * - A relative address at which the program should continue (fixup routine)
13+ * - An asm statement which specifies which CPU register will
14+ * receive -EFAULT when an exception happens if the lowest bit in
15+ * the fixup address is set.
16+ *
17+ * Note: The register specified in the err_opcode instruction will be
18+ * modified at runtime if a fault happens. Register %r0 will be ignored.
19+ *
20+ * Since relative addresses are used, 32bit values are sufficient even on
21+ * 64bit kernel.
22+ */
23+
24+struct pt_regs;
25+int fixup_exception(struct pt_regs *regs);
26+
27+#define ARCH_HAS_RELATIVE_EXTABLE
28+struct exception_table_entry {
29+ int insn; /* relative address of insn that is allowed to fault. */
30+ int fixup; /* relative address of fixup routine */
31+ int err_opcode; /* sample opcode with register which holds error code */
32+};
33+
34+#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr, opcode )\
35+ ".section __ex_table,\"aw\"\n" \
36+ ".align 4\n" \
37+ ".word (" #fault_addr " - .), (" #except_addr " - .)\n" \
38+ opcode "\n" \
39+ ".previous\n"
40+
41+/*
42+ * ASM_EXCEPTIONTABLE_ENTRY_EFAULT() creates a special exception table entry
43+ * (with lowest bit set) for which the fault handler in fixup_exception() will
44+ * load -EFAULT on fault into the register specified by the err_opcode instruction,
45+ * and zeroes the target register in case of a read fault in get_user().
46+ */
47+#define ASM_EXCEPTIONTABLE_VAR(__err_var) \
48+ int __err_var = 0
49+#define ASM_EXCEPTIONTABLE_ENTRY_EFAULT( fault_addr, except_addr, register )\
50+ ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr + 1, "or %%r0,%%r0," register)
51+
52+static inline void swap_ex_entry_fixup(struct exception_table_entry *a,
53+ struct exception_table_entry *b,
54+ struct exception_table_entry tmp,
55+ int delta)
56+{
57+ a->fixup = b->fixup + delta;
58+ b->fixup = tmp.fixup - delta;
59+ a->err_opcode = b->err_opcode;
60+ b->err_opcode = tmp.err_opcode;
61+}
62+#define swap_ex_entry_fixup swap_ex_entry_fixup
63+
64+#endif
arch/parisc/include/asm/jump_label.h+2−2
@@ -12,7 +12,7 @@ · 11 unmodified lines
1212
1313 static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
1414 {
15− asm_volatile_goto("1:\n\t"
15+ asm goto("1:\n\t"
1616 "nop\n\t"
1717 ".pushsection __jump_table, \"aw\"\n\t"
1818 ".align %1\n\t"
@@ -29,7 +29,7 @@ l_yes: · 10 unmodified lines
2929
3030 static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch)
3131 {
32− asm_volatile_goto("1:\n\t"
32+ asm goto("1:\n\t"
3333 "b,n %l[l_yes]\n\t"
3434 ".pushsection __jump_table, \"aw\"\n\t"
3535 ".align %1\n\t"
arch/parisc/include/asm/special_insns.h+4−2
@@ -8,7 +8,8 @@ · 7 unmodified lines
88 "copy %%r0,%0\n" \
99 "8:\tlpa %%r0(%1),%0\n" \
1010 "9:\n" \
11− ASM_EXCEPTIONTABLE_ENTRY(8b, 9b) \
11+ ASM_EXCEPTIONTABLE_ENTRY(8b, 9b, \
12+ "or %%r0,%%r0,%%r0") \
1213 : "=&r" (pa) \
1314 : "r" (va) \
1415 : "memory" \
@@ -22,7 +23,8 @@ · 7 unmodified lines
2223 "copy %%r0,%0\n" \
2324 "8:\tlpa %%r0(%%sr3,%1),%0\n" \
2425 "9:\n" \
25− ASM_EXCEPTIONTABLE_ENTRY(8b, 9b) \
26+ ASM_EXCEPTIONTABLE_ENTRY(8b, 9b, \
27+ "or %%r0,%%r0,%%r0") \
2628 : "=&r" (pa) \
2729 : "r" (va) \
2830 : "memory" \
arch/parisc/include/asm/uaccess.h+7−41
@@ -7,6 +7,7 @@ · 6 unmodified lines
77 */
88 #include <asm/page.h>
99 #include <asm/cache.h>
10+#include <asm/extable.h>
1011
1112 #include <linux/bug.h>
1213 #include <linux/string.h>
@@ -26,37 +27,6 @@ · 13 unmodified lines
2627 #define STD_USER(sr, x, ptr) __put_user_asm(sr, "std", x, ptr)
2728 #endif
2829
29−/*
30− * The exception table contains two values: the first is the relative offset to
31− * the address of the instruction that is allowed to fault, and the second is
32− * the relative offset to the address of the fixup routine. Since relative
33− * addresses are used, 32bit values are sufficient even on 64bit kernel.
34− */
35−
36−#define ARCH_HAS_RELATIVE_EXTABLE
37−struct exception_table_entry {
38− int insn; /* relative address of insn that is allowed to fault. */
39− int fixup; /* relative address of fixup routine */
40−};
41−
42−#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\
43− ".section __ex_table,\"aw\"\n" \
44− ".align 4\n" \
45− ".word (" #fault_addr " - .), (" #except_addr " - .)\n\t" \
46− ".previous\n"
47−
48−/*
49− * ASM_EXCEPTIONTABLE_ENTRY_EFAULT() creates a special exception table entry
50− * (with lowest bit set) for which the fault handler in fixup_exception() will
51− * load -EFAULT into %r29 for a read or write fault, and zeroes the target
52− * register in case of a read fault in get_user().
53− */
54−#define ASM_EXCEPTIONTABLE_REG 29
55−#define ASM_EXCEPTIONTABLE_VAR(__variable) \
56− register long __variable __asm__ ("r29") = 0
57−#define ASM_EXCEPTIONTABLE_ENTRY_EFAULT( fault_addr, except_addr )\
58− ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr + 1)
59−
6030 #define __get_user_internal(sr, val, ptr) \
6131 ({ \
6232 ASM_EXCEPTIONTABLE_VAR(__gu_err); \
@@ -83,7 +53,7 @@ struct exception_table_entry { · 20 unmodified lines
8353 \
8454 __asm__("1: " ldx " 0(%%sr%2,%3),%0\n" \
8555 "9:\n" \
86− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
56+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b, "%1") \
8757 : "=r"(__gu_val), "+r"(__gu_err) \
8858 : "i"(sr), "r"(ptr)); \
8959 \
@@ -115,8 +85,8 @@ struct exception_table_entry { · 25 unmodified lines
11585 "1: ldw 0(%%sr%2,%3),%0\n" \
11686 "2: ldw 4(%%sr%2,%3),%R0\n" \
11787 "9:\n" \
118− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
119− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \
88+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b, "%1") \
89+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b, "%1") \
12090 : "=&r"(__gu_tmp.l), "+r"(__gu_err) \
12191 : "i"(sr), "r"(ptr)); \
12292 \
@@ -174,7 +144,7 @@ struct exception_table_entry { · 51 unmodified lines
174144 __asm__ __volatile__ ( \
175145 "1: " stx " %1,0(%%sr%2,%3)\n" \
176146 "9:\n" \
177− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
147+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b, "%0") \
178148 : "+r"(__pu_err) \
179149 : "r"(x), "i"(sr), "r"(ptr))
180150
@@ -186,15 +156,14 @@ struct exception_table_entry { · 5 unmodified lines
186156 "1: stw %1,0(%%sr%2,%3)\n" \
187157 "2: stw %R1,4(%%sr%2,%3)\n" \
188158 "9:\n" \
189− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b) \
190− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b) \
159+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 9b, "%0") \
160+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 9b, "%0") \
191161 : "+r"(__pu_err) \
192162 : "r"(__val), "i"(sr), "r"(ptr)); \
193163 } while (0)
194164
195165 #endif /* !defined(CONFIG_64BIT) */
196166
197−
198167 /*
199168 * Complex access routines -- external declarations
200169 */
@@ -216,7 +185,4 @@ unsigned long __must_check raw_copy_from_user(void *dst, const void __user *src, · 15 unmodified lines
216185 #define INLINE_COPY_TO_USER
217186 #define INLINE_COPY_FROM_USER
218187
219−struct pt_regs;
220−int fixup_exception(struct pt_regs *regs);
221−
222188 #endif /* __PARISC_UACCESS_H */
arch/parisc/kernel/cache.c+7−3
@@ -58,7 +58,7 @@ int pa_serialize_tlb_flushes __ro_after_init; · 57 unmodified lines
5858
5959 struct pdc_cache_info cache_info __ro_after_init;
6060 #ifndef CONFIG_PA20
61−struct pdc_btlb_info btlb_info __ro_after_init;
61+struct pdc_btlb_info btlb_info;
6262 #endif
6363
6464 DEFINE_STATIC_KEY_TRUE(parisc_has_cache);
@@ -264,6 +264,10 @@ parisc_cache_init(void) · 199 unmodified lines
264264 icache_stride = CAFL_STRIDE(cache_info.ic_conf);
265265 #undef CAFL_STRIDE
266266
267+ /* stride needs to be non-zero, otherwise cache flushes will not work */
268+ WARN_ON(cache_info.dc_size && dcache_stride == 0);
269+ WARN_ON(cache_info.ic_size && icache_stride == 0);
270+
267271 if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) ==
268272 PDC_MODEL_NVA_UNSUPPORTED) {
269273 printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n");
@@ -850,7 +854,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes, · 580 unmodified lines
850854 #endif
851855 " fic,m %3(%4,%0)\n"
852856 "2: sync\n"
853− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b)
857+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1")
854858 : "+r" (start), "+r" (error)
855859 : "r" (end), "r" (dcache_stride), "i" (SR_USER));
856860 }
@@ -865,7 +869,7 @@ SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes, · 8 unmodified lines
865869 #endif
866870 " fdc,m %3(%4,%0)\n"
867871 "2: sync\n"
868− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b)
872+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 2b, "%1")
869873 : "+r" (start), "+r" (error)
870874 : "r" (end), "r" (icache_stride), "i" (SR_USER));
871875 }
arch/parisc/kernel/drivers.c+4−1
@@ -742,7 +742,7 @@ parse_tree_node(struct device *parent, int index, struct hardware_path *modpath) · 741 unmodified lines
742742 };
743743
744744 if (device_for_each_child(parent, &recurse_data, descend_children))
745− { /* nothing */ };
745+ { /* nothing */ }
746746
747747 return d.dev;
748748 }
@@ -1004,6 +1004,9 @@ static __init int qemu_print_iodc_data(struct device *lin_dev, void *data) · 255 unmodified lines
10041004
10051005 pr_info("\n");
10061006
1007+ /* Prevent hung task messages when printing on serial console */
1008+ cond_resched();
1009+
10071010 pr_info("#define HPA_%08lx_DESCRIPTION \"%s\"\n",
10081011 hpa, parisc_hardware_description(&dev->id));
10091012
arch/parisc/kernel/unaligned.c+22−22
@@ -120,8 +120,8 @@ static int emulate_ldh(struct pt_regs *regs, int toreg) · 119 unmodified lines
120120 "2: ldbs 1(%%sr1,%3), %0\n"
121121 " depw %2, 23, 24, %0\n"
122122 "3: \n"
123− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b)
124− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b)
123+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%1")
124+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%1")
125125 : "+r" (val), "+r" (ret), "=&r" (temp1)
126126 : "r" (saddr), "r" (regs->isr) );
127127
@@ -152,8 +152,8 @@ static int emulate_ldw(struct pt_regs *regs, int toreg, int flop) · 24 unmodified lines
152152 " mtctl %2,11\n"
153153 " vshd %0,%3,%0\n"
154154 "3: \n"
155− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b)
156− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b)
155+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%1")
156+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%1")
157157 : "+r" (val), "+r" (ret), "=&r" (temp1), "=&r" (temp2)
158158 : "r" (saddr), "r" (regs->isr) );
159159
@@ -189,8 +189,8 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop) · 29 unmodified lines
189189 " mtsar %%r19\n"
190190 " shrpd %0,%%r20,%%sar,%0\n"
191191 "3: \n"
192− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b)
193− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b)
192+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%1")
193+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%1")
194194 : "=r" (val), "+r" (ret)
195195 : "0" (val), "r" (saddr), "r" (regs->isr)
196196 : "r19", "r20" );
@@ -209,9 +209,9 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop) · 12 unmodified lines
209209 " vshd %0,%R0,%0\n"
210210 " vshd %R0,%4,%R0\n"
211211 "4: \n"
212− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 4b)
213− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 4b)
214− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 4b)
212+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 4b, "%1")
213+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 4b, "%1")
214+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 4b, "%1")
215215 : "+r" (val), "+r" (ret), "+r" (saddr), "=&r" (shift), "=&r" (temp1)
216216 : "r" (regs->isr) );
217217 }
@@ -244,8 +244,8 @@ static int emulate_sth(struct pt_regs *regs, int frreg) · 26 unmodified lines
244244 "1: stb %1, 0(%%sr1, %3)\n"
245245 "2: stb %2, 1(%%sr1, %3)\n"
246246 "3: \n"
247− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b)
248− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b)
247+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%0")
248+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%0")
249249 : "+r" (ret), "=&r" (temp1)
250250 : "r" (val), "r" (regs->ior), "r" (regs->isr) );
251251
@@ -285,8 +285,8 @@ static int emulate_stw(struct pt_regs *regs, int frreg, int flop) · 33 unmodified lines
285285 " stw %%r20,0(%%sr1,%2)\n"
286286 " stw %%r21,4(%%sr1,%2)\n"
287287 "3: \n"
288− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b)
289− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b)
288+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 3b, "%0")
289+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 3b, "%0")
290290 : "+r" (ret)
291291 : "r" (val), "r" (regs->ior), "r" (regs->isr)
292292 : "r19", "r20", "r21", "r22", "r1" );
@@ -329,10 +329,10 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop) · 36 unmodified lines
329329 "3: std %%r20,0(%%sr1,%2)\n"
330330 "4: std %%r21,8(%%sr1,%2)\n"
331331 "5: \n"
332− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 5b)
333− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 5b)
334− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 5b)
335− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(4b, 5b)
332+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 5b, "%0")
333+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 5b, "%0")
334+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 5b, "%0")
335+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(4b, 5b, "%0")
336336 : "+r" (ret)
337337 : "r" (val), "r" (regs->ior), "r" (regs->isr)
338338 : "r19", "r20", "r21", "r22", "r1" );
@@ -357,11 +357,11 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop) · 18 unmodified lines
357357 "4: stw %%r1,4(%%sr1,%2)\n"
358358 "5: stw %R1,8(%%sr1,%2)\n"
359359 "6: \n"
360− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 6b)
361− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 6b)
362− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 6b)
363− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(4b, 6b)
364− ASM_EXCEPTIONTABLE_ENTRY_EFAULT(5b, 6b)
360+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(1b, 6b, "%0")
361+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(2b, 6b, "%0")
362+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(3b, 6b, "%0")
363+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(4b, 6b, "%0")
364+ ASM_EXCEPTIONTABLE_ENTRY_EFAULT(5b, 6b, "%0")
365365 : "+r" (ret)
366366 : "r" (val), "r" (regs->ior), "r" (regs->isr)
367367 : "r19", "r20", "r21", "r1" );
arch/parisc/kernel/vmlinux.lds.S+1−1
@@ -127,7 +127,7 @@ SECTIONS · 126 unmodified lines
127127 }
128128 #endif
129129
130− RO_DATA(8)
130+ RO_DATA(PAGE_SIZE)
131131
132132 /* unwind info */
133133 . = ALIGN(4);
arch/parisc/mm/fault.c+8−3
@@ -150,11 +150,16 @@ int fixup_exception(struct pt_regs *regs) · 149 unmodified lines
150150 * Fix up get_user() and put_user().
151151 * ASM_EXCEPTIONTABLE_ENTRY_EFAULT() sets the least-significant
152152 * bit in the relative address of the fixup routine to indicate
153− * that gr[ASM_EXCEPTIONTABLE_REG] should be loaded with
154− * -EFAULT to report a userspace access error.
153+ * that the register encoded in the "or %r0,%r0,register"
154+ * opcode should be loaded with -EFAULT to report a userspace
155+ * access error.
155156 */
156157 if (fix->fixup & 1) {
157− regs->gr[ASM_EXCEPTIONTABLE_REG] = -EFAULT;
158+ int fault_error_reg = fix->err_opcode & 0x1f;
159+ if (!WARN_ON(!fault_error_reg))
160+ regs->gr[fault_error_reg] = -EFAULT;
161+ pr_debug("Unalignment fixup of register %d at %pS\n",
162+ fault_error_reg, (void*)regs->iaoq[0]);
158163
159164 /* zero target register for get_user() */
160165 if (parisc_acctyp(0, regs->iir) == VM_READ) {
arch/powerpc/include/asm/jump_label.h+2−2
@@ -17,7 +17,7 @@ · 16 unmodified lines
1717
1818 static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
1919 {
20− asm_volatile_goto("1:\n\t"
20+ asm goto("1:\n\t"
2121 "nop # arch_static_branch\n\t"
2222 ".pushsection __jump_table, \"aw\"\n\t"
2323 ".long 1b - ., %l[l_yes] - .\n\t"
@@ -32,7 +32,7 @@ l_yes: · 8 unmodified lines
3232
3333 static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch)
3434 {
35− asm_volatile_goto("1:\n\t"
35+ asm goto("1:\n\t"
3636 "b %l[l_yes] # arch_static_branch_jump\n\t"
3737 ".pushsection __jump_table, \"aw\"\n\t"
3838 ".long 1b - ., %l[l_yes] - .\n\t"
arch/powerpc/include/asm/uaccess.h+6−6
@@ -74,7 +74,7 @@ __pu_failed: \ · 73 unmodified lines
7474 /* -mprefixed can generate offsets beyond range, fall back hack */
7575 #ifdef CONFIG_PPC_KERNEL_PREFIXED
7676 #define __put_user_asm_goto(x, addr, label, op) \
77− asm_volatile_goto( \
77+ asm goto( \
7878 "1: " op " %0,0(%1) # put_user\n" \
7979 EX_TABLE(1b, %l2) \
8080 : \
@@ -83,7 +83,7 @@ __pu_failed: \ · 2 unmodified lines
8383 : label)
8484 #else
8585 #define __put_user_asm_goto(x, addr, label, op) \
86− asm_volatile_goto( \
86+ asm goto( \
8787 "1: " op "%U1%X1 %0,%1 # put_user\n" \
8888 EX_TABLE(1b, %l2) \
8989 : \
@@ -97,7 +97,7 @@ __pu_failed: \ · 7 unmodified lines
9797 __put_user_asm_goto(x, ptr, label, "std")
9898 #else /* __powerpc64__ */
9999 #define __put_user_asm2_goto(x, addr, label) \
100− asm_volatile_goto( \
100+ asm goto( \
101101 "1: stw%X1 %0, %1\n" \
102102 "2: stw%X1 %L0, %L1\n" \
103103 EX_TABLE(1b, %l2) \
@@ -146,7 +146,7 @@ do { \ · 42 unmodified lines
146146 /* -mprefixed can generate offsets beyond range, fall back hack */
147147 #ifdef CONFIG_PPC_KERNEL_PREFIXED
148148 #define __get_user_asm_goto(x, addr, label, op) \
149− asm_volatile_goto( \
149+ asm_goto_output( \
150150 "1: "op" %0,0(%1) # get_user\n" \
151151 EX_TABLE(1b, %l2) \
152152 : "=r" (x) \
@@ -155,7 +155,7 @@ do { \ · 2 unmodified lines
155155 : label)
156156 #else
157157 #define __get_user_asm_goto(x, addr, label, op) \
158− asm_volatile_goto( \
158+ asm_goto_output( \
159159 "1: "op"%U1%X1 %0, %1 # get_user\n" \
160160 EX_TABLE(1b, %l2) \
161161 : "=r" (x) \
@@ -169,7 +169,7 @@ do { \ · 7 unmodified lines
169169 __get_user_asm_goto(x, addr, label, "ld")
170170 #else /* __powerpc64__ */
171171 #define __get_user_asm2_goto(x, addr, label) \
172− asm_volatile_goto( \
172+ asm_goto_output( \
173173 "1: lwz%X1 %0, %1\n" \
174174 "2: lwz%X1 %L0, %L1\n" \
175175 EX_TABLE(1b, %l2) \
arch/powerpc/kernel/iommu.c+28−9
@@ -1287,20 +1287,20 @@ spapr_tce_platform_iommu_attach_dev(struct iommu_domain *platform_domain, · 1286 unmodified lines
12871287 struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
12881288 struct iommu_group *grp = iommu_group_get(dev);
12891289 struct iommu_table_group *table_group;
1290− int ret = -EINVAL;
12911290
12921291 /* At first attach the ownership is already set */
12931292 if (!domain)
12941293 return 0;
12951294
1296− if (!grp)
1297− return -ENODEV;
1298−
12991295 table_group = iommu_group_get_iommudata(grp);
1300− ret = table_group->ops->take_ownership(table_group);
1296+ /*
1297+ * The domain being set to PLATFORM from earlier
1298+ * BLOCKED. The table_group ownership has to be released.
1299+ */
1300+ table_group->ops->release_ownership(table_group);
13011301 iommu_group_put(grp);
13021302
1303− return ret;
1303+ return 0;
13041304 }
13051305
13061306 static const struct iommu_domain_ops spapr_tce_platform_domain_ops = {
@@ -1312,13 +1312,32 @@ static struct iommu_domain spapr_tce_platform_domain = { · 5 unmodified lines
13121312 .ops = &spapr_tce_platform_domain_ops,
13131313 };
13141314
1315−static struct iommu_domain spapr_tce_blocked_domain = {
1316− .type = IOMMU_DOMAIN_BLOCKED,
1315+static int
1316+spapr_tce_blocked_iommu_attach_dev(struct iommu_domain *platform_domain,
1317+ struct device *dev)
1318+{
1319+ struct iommu_group *grp = iommu_group_get(dev);
1320+ struct iommu_table_group *table_group;
1321+ int ret = -EINVAL;
1322+
13171323 /*
13181324 * FIXME: SPAPR mixes blocked and platform behaviors, the blocked domain
13191325 * also sets the dma_api ops
13201326 */
1321− .ops = &spapr_tce_platform_domain_ops,
1327+ table_group = iommu_group_get_iommudata(grp);
1328+ ret = table_group->ops->take_ownership(table_group);
1329+ iommu_group_put(grp);
1330+
1331+ return ret;
1332+}
1333+
1334+static const struct iommu_domain_ops spapr_tce_blocked_domain_ops = {
1335+ .attach_dev = spapr_tce_blocked_iommu_attach_dev,
1336+};
1337+
1338+static struct iommu_domain spapr_tce_blocked_domain = {
1339+ .type = IOMMU_DOMAIN_BLOCKED,
1340+ .ops = &spapr_tce_blocked_domain_ops,
13221341 };
13231342
13241343 static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap)
arch/powerpc/kernel/irq_64.c+1−1
@@ -230,7 +230,7 @@ again: · 229 unmodified lines
230230 * This allows interrupts to be unmasked without hard disabling, and
231231 * also without new hard interrupts coming in ahead of pending ones.
232232 */
233− asm_volatile_goto(
233+ asm goto(
234234 "1: \n"
235235 " lbz 9,%0(13) \n"
236236 " cmpwi 9,0 \n"
arch/riscv/boot/dts/sophgo/sg2042.dtsi+48−32
@@ -93,144 +93,160 @@ · 92 unmodified lines
9393 <&cpu63_intc 3>;
9494 };
9595
96− clint_mtimer0: timer@70ac000000 {
96+ clint_mtimer0: timer@70ac004000 {
9797 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
98− reg = <0x00000070 0xac000000 0x00000000 0x00007ff8>;
98+ reg = <0x00000070 0xac004000 0x00000000 0x0000c000>;
99+ reg-names = "mtimecmp";
99100 interrupts-extended = <&cpu0_intc 7>,
100101 <&cpu1_intc 7>,
101102 <&cpu2_intc 7>,
102103 <&cpu3_intc 7>;
103104 };
104105
105− clint_mtimer1: timer@70ac010000 {
106+ clint_mtimer1: timer@70ac014000 {
106107 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
107− reg = <0x00000070 0xac010000 0x00000000 0x00007ff8>;
108+ reg = <0x00000070 0xac014000 0x00000000 0x0000c000>;
109+ reg-names = "mtimecmp";
108110 interrupts-extended = <&cpu4_intc 7>,
109111 <&cpu5_intc 7>,
110112 <&cpu6_intc 7>,
111113 <&cpu7_intc 7>;
112114 };
113115
114− clint_mtimer2: timer@70ac020000 {
116+ clint_mtimer2: timer@70ac024000 {
115117 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
116− reg = <0x00000070 0xac020000 0x00000000 0x00007ff8>;
118+ reg = <0x00000070 0xac024000 0x00000000 0x0000c000>;
119+ reg-names = "mtimecmp";
117120 interrupts-extended = <&cpu8_intc 7>,
118121 <&cpu9_intc 7>,
119122 <&cpu10_intc 7>,
120123 <&cpu11_intc 7>;
121124 };
122125
123− clint_mtimer3: timer@70ac030000 {
126+ clint_mtimer3: timer@70ac034000 {
124127 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
125− reg = <0x00000070 0xac030000 0x00000000 0x00007ff8>;
128+ reg = <0x00000070 0xac034000 0x00000000 0x0000c000>;
129+ reg-names = "mtimecmp";
126130 interrupts-extended = <&cpu12_intc 7>,
127131 <&cpu13_intc 7>,
128132 <&cpu14_intc 7>,
129133 <&cpu15_intc 7>;
130134 };
131135
132− clint_mtimer4: timer@70ac040000 {
136+ clint_mtimer4: timer@70ac044000 {
133137 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
134− reg = <0x00000070 0xac040000 0x00000000 0x00007ff8>;
138+ reg = <0x00000070 0xac044000 0x00000000 0x0000c000>;
139+ reg-names = "mtimecmp";
135140 interrupts-extended = <&cpu16_intc 7>,
136141 <&cpu17_intc 7>,
137142 <&cpu18_intc 7>,
138143 <&cpu19_intc 7>;
139144 };
140145
141− clint_mtimer5: timer@70ac050000 {
146+ clint_mtimer5: timer@70ac054000 {
142147 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
143− reg = <0x00000070 0xac050000 0x00000000 0x00007ff8>;
148+ reg = <0x00000070 0xac054000 0x00000000 0x0000c000>;
149+ reg-names = "mtimecmp";
144150 interrupts-extended = <&cpu20_intc 7>,
145151 <&cpu21_intc 7>,
146152 <&cpu22_intc 7>,
147153 <&cpu23_intc 7>;
148154 };
149155
150− clint_mtimer6: timer@70ac060000 {
156+ clint_mtimer6: timer@70ac064000 {
151157 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
152− reg = <0x00000070 0xac060000 0x00000000 0x00007ff8>;
158+ reg = <0x00000070 0xac064000 0x00000000 0x0000c000>;
159+ reg-names = "mtimecmp";
153160 interrupts-extended = <&cpu24_intc 7>,
154161 <&cpu25_intc 7>,
155162 <&cpu26_intc 7>,
156163 <&cpu27_intc 7>;
157164 };
158165
159− clint_mtimer7: timer@70ac070000 {
166+ clint_mtimer7: timer@70ac074000 {
160167 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
161− reg = <0x00000070 0xac070000 0x00000000 0x00007ff8>;
168+ reg = <0x00000070 0xac074000 0x00000000 0x0000c000>;
169+ reg-names = "mtimecmp";
162170 interrupts-extended = <&cpu28_intc 7>,
163171 <&cpu29_intc 7>,
164172 <&cpu30_intc 7>,
165173 <&cpu31_intc 7>;
166174 };
167175
168− clint_mtimer8: timer@70ac080000 {
176+ clint_mtimer8: timer@70ac084000 {
169177 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
170− reg = <0x00000070 0xac080000 0x00000000 0x00007ff8>;
178+ reg = <0x00000070 0xac084000 0x00000000 0x0000c000>;
179+ reg-names = "mtimecmp";
171180 interrupts-extended = <&cpu32_intc 7>,
172181 <&cpu33_intc 7>,
173182 <&cpu34_intc 7>,
174183 <&cpu35_intc 7>;
175184 };
176185
177− clint_mtimer9: timer@70ac090000 {
186+ clint_mtimer9: timer@70ac094000 {
178187 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
179− reg = <0x00000070 0xac090000 0x00000000 0x00007ff8>;
188+ reg = <0x00000070 0xac094000 0x00000000 0x0000c000>;
189+ reg-names = "mtimecmp";
180190 interrupts-extended = <&cpu36_intc 7>,
181191 <&cpu37_intc 7>,
182192 <&cpu38_intc 7>,
183193 <&cpu39_intc 7>;
184194 };
185195
186− clint_mtimer10: timer@70ac0a0000 {
196+ clint_mtimer10: timer@70ac0a4000 {
187197 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
188− reg = <0x00000070 0xac0a0000 0x00000000 0x00007ff8>;
198+ reg = <0x00000070 0xac0a4000 0x00000000 0x0000c000>;
199+ reg-names = "mtimecmp";
189200 interrupts-extended = <&cpu40_intc 7>,
190201 <&cpu41_intc 7>,
191202 <&cpu42_intc 7>,
192203 <&cpu43_intc 7>;
193204 };
194205
195− clint_mtimer11: timer@70ac0b0000 {
206+ clint_mtimer11: timer@70ac0b4000 {
196207 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
197− reg = <0x00000070 0xac0b0000 0x00000000 0x00007ff8>;
208+ reg = <0x00000070 0xac0b4000 0x00000000 0x0000c000>;
209+ reg-names = "mtimecmp";
198210 interrupts-extended = <&cpu44_intc 7>,
199211 <&cpu45_intc 7>,
200212 <&cpu46_intc 7>,
201213 <&cpu47_intc 7>;
202214 };
203215
204− clint_mtimer12: timer@70ac0c0000 {
216+ clint_mtimer12: timer@70ac0c4000 {
205217 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
206− reg = <0x00000070 0xac0c0000 0x00000000 0x00007ff8>;
218+ reg = <0x00000070 0xac0c4000 0x00000000 0x0000c000>;
219+ reg-names = "mtimecmp";
207220 interrupts-extended = <&cpu48_intc 7>,
208221 <&cpu49_intc 7>,
209222 <&cpu50_intc 7>,
210223 <&cpu51_intc 7>;
211224 };
212225
213− clint_mtimer13: timer@70ac0d0000 {
226+ clint_mtimer13: timer@70ac0d4000 {
214227 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
215− reg = <0x00000070 0xac0d0000 0x00000000 0x00007ff8>;
228+ reg = <0x00000070 0xac0d4000 0x00000000 0x0000c000>;
229+ reg-names = "mtimecmp";
216230 interrupts-extended = <&cpu52_intc 7>,
217231 <&cpu53_intc 7>,
218232 <&cpu54_intc 7>,
219233 <&cpu55_intc 7>;
220234 };
221235
222− clint_mtimer14: timer@70ac0e0000 {
236+ clint_mtimer14: timer@70ac0e4000 {
223237 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
224− reg = <0x00000070 0xac0e0000 0x00000000 0x00007ff8>;
238+ reg = <0x00000070 0xac0e4000 0x00000000 0x0000c000>;
239+ reg-names = "mtimecmp";
225240 interrupts-extended = <&cpu56_intc 7>,
226241 <&cpu57_intc 7>,
227242 <&cpu58_intc 7>,
228243 <&cpu59_intc 7>;
229244 };
230245
231− clint_mtimer15: timer@70ac0f0000 {
246+ clint_mtimer15: timer@70ac0f4000 {
232247 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
233− reg = <0x00000070 0xac0f0000 0x00000000 0x00007ff8>;
248+ reg = <0x00000070 0xac0f4000 0x00000000 0x0000c000>;
249+ reg-names = "mtimecmp";
234250 interrupts-extended = <&cpu60_intc 7>,
235251 <&cpu61_intc 7>,
236252 <&cpu62_intc 7>,
arch/riscv/include/asm/arch_hweight.h+2−2
@@ -20,7 +20,7 @@ · 19 unmodified lines
2020 static __always_inline unsigned int __arch_hweight32(unsigned int w)
2121 {
2222 #ifdef CONFIG_RISCV_ISA_ZBB
23− asm_volatile_goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
23+ asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
2424 RISCV_ISA_EXT_ZBB, 1)
2525 : : : : legacy);
2626
@@ -51,7 +51,7 @@ static inline unsigned int __arch_hweight8(unsigned int w) · 24 unmodified lines
5151 static __always_inline unsigned long __arch_hweight64(__u64 w)
5252 {
5353 # ifdef CONFIG_RISCV_ISA_ZBB
54− asm_volatile_goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
54+ asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
5555 RISCV_ISA_EXT_ZBB, 1)
5656 : : : : legacy);
5757
arch/riscv/include/asm/bitops.h+4−4
@@ -39,7 +39,7 @@ static __always_inline unsigned long variable__ffs(unsigned long word) · 38 unmodified lines
3939 {
4040 int num;
4141
42− asm_volatile_goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
42+ asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
4343 RISCV_ISA_EXT_ZBB, 1)
4444 : : : : legacy);
4545
@@ -95,7 +95,7 @@ static __always_inline unsigned long variable__fls(unsigned long word) · 49 unmodified lines
9595 {
9696 int num;
9797
98− asm_volatile_goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
98+ asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
9999 RISCV_ISA_EXT_ZBB, 1)
100100 : : : : legacy);
101101
@@ -154,7 +154,7 @@ static __always_inline int variable_ffs(int x) · 52 unmodified lines
154154 if (!x)
155155 return 0;
156156
157− asm_volatile_goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
157+ asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
158158 RISCV_ISA_EXT_ZBB, 1)
159159 : : : : legacy);
160160
@@ -209,7 +209,7 @@ static __always_inline int variable_fls(unsigned int x) · 48 unmodified lines
209209 if (!x)
210210 return 0;
211211
212− asm_volatile_goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
212+ asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
213213 RISCV_ISA_EXT_ZBB, 1)
214214 : : : : legacy);
215215
arch/riscv/include/asm/checksum.h+1−1
@@ -53,7 +53,7 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) · 52 unmodified lines
5353 IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) {
5454 unsigned long fold_temp;
5555
56− asm_volatile_goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
56+ asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
5757 RISCV_ISA_EXT_ZBB, 1)
5858 :
5959 :
arch/riscv/include/asm/cpufeature.h+2−2
@@ -80,7 +80,7 @@ riscv_has_extension_likely(const unsigned long ext) · 79 unmodified lines
8080 "ext must be < RISCV_ISA_EXT_MAX");
8181
8282 if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) {
83− asm_volatile_goto(
83+ asm goto(
8484 ALTERNATIVE("j %l[l_no]", "nop", 0, %[ext], 1)
8585 :
8686 : [ext] "i" (ext)
@@ -103,7 +103,7 @@ riscv_has_extension_unlikely(const unsigned long ext) · 16 unmodified lines
103103 "ext must be < RISCV_ISA_EXT_MAX");
104104
105105 if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) {
106− asm_volatile_goto(
106+ asm goto(
107107 ALTERNATIVE("nop", "j %l[l_yes]", 0, %[ext], 1)
108108 :
109109 : [ext] "i" (ext)
arch/riscv/include/asm/hugetlb.h+3−0
@@ -11,6 +11,9 @@ static inline void arch_clear_hugepage_flags(struct page *page) · 10 unmodified lines
1111 }
1212 #define arch_clear_hugepage_flags arch_clear_hugepage_flags
1313
14+bool arch_hugetlb_migration_supported(struct hstate *h);
15+#define arch_hugetlb_migration_supported arch_hugetlb_migration_supported
16+
1417 #ifdef CONFIG_RISCV_ISA_SVNAPOT
1518 #define __HAVE_ARCH_HUGE_PTE_CLEAR
1619 void huge_pte_clear(struct mm_struct *mm, unsigned long addr,
arch/riscv/include/asm/jump_label.h+2−2
@@ -17,7 +17,7 @@ · 16 unmodified lines
1717 static __always_inline bool arch_static_branch(struct static_key * const key,
1818 const bool branch)
1919 {
20− asm_volatile_goto(
20+ asm goto(
2121 " .align 2 \n\t"
2222 " .option push \n\t"
2323 " .option norelax \n\t"
@@ -39,7 +39,7 @@ label: · 15 unmodified lines
3939 static __always_inline bool arch_static_branch_jump(struct static_key * const key,
4040 const bool branch)
4141 {
42− asm_volatile_goto(
42+ asm goto(
4343 " .align 2 \n\t"
4444 " .option push \n\t"
4545 " .option norelax \n\t"
arch/riscv/include/asm/stacktrace.h+5−0
@@ -21,4 +21,9 @@ static inline bool on_thread_stack(void) · 20 unmodified lines
2121 return !(((unsigned long)(current->stack) ^ current_stack_pointer) & ~(THREAD_SIZE - 1));
2222 }
2323
24+
25+#ifdef CONFIG_VMAP_STACK
26+DECLARE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack);
27+#endif /* CONFIG_VMAP_STACK */
28+
2429 #endif /* _ASM_RISCV_STACKTRACE_H */
arch/riscv/include/asm/tlb.h+1−1
@@ -16,7 +16,7 @@ static void tlb_flush(struct mmu_gather *tlb); · 15 unmodified lines
1616 static inline void tlb_flush(struct mmu_gather *tlb)
1717 {
1818 #ifdef CONFIG_MMU
19− if (tlb->fullmm || tlb->need_flush_all)
19+ if (tlb->fullmm || tlb->need_flush_all || tlb->freed_tables)
2020 flush_tlb_mm(tlb->mm);
2121 else
2222 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end,
arch/riscv/include/asm/tlbflush.h+1−0
@@ -75,6 +75,7 @@ static inline void flush_tlb_kernel_range(unsigned long start, · 74 unmodified lines
7575
7676 #define flush_tlb_mm(mm) flush_tlb_all()
7777 #define flush_tlb_mm_range(mm, start, end, page_size) flush_tlb_all()
78+#define local_flush_tlb_kernel_range(start, end) flush_tlb_all()
7879 #endif /* !CONFIG_SMP || !CONFIG_MMU */
7980
8081 #endif /* _ASM_RISCV_TLBFLUSH_H */
arch/riscv/include/uapi/asm/kvm.h+27−0
@@ -139,6 +139,33 @@ enum KVM_RISCV_ISA_EXT_ID { · 138 unmodified lines
139139 KVM_RISCV_ISA_EXT_ZIHPM,
140140 KVM_RISCV_ISA_EXT_SMSTATEEN,
141141 KVM_RISCV_ISA_EXT_ZICOND,
142+ KVM_RISCV_ISA_EXT_ZBC,
143+ KVM_RISCV_ISA_EXT_ZBKB,
144+ KVM_RISCV_ISA_EXT_ZBKC,
145+ KVM_RISCV_ISA_EXT_ZBKX,
146+ KVM_RISCV_ISA_EXT_ZKND,
147+ KVM_RISCV_ISA_EXT_ZKNE,
148+ KVM_RISCV_ISA_EXT_ZKNH,
149+ KVM_RISCV_ISA_EXT_ZKR,
150+ KVM_RISCV_ISA_EXT_ZKSED,
151+ KVM_RISCV_ISA_EXT_ZKSH,
152+ KVM_RISCV_ISA_EXT_ZKT,
153+ KVM_RISCV_ISA_EXT_ZVBB,
154+ KVM_RISCV_ISA_EXT_ZVBC,
155+ KVM_RISCV_ISA_EXT_ZVKB,
156+ KVM_RISCV_ISA_EXT_ZVKG,
157+ KVM_RISCV_ISA_EXT_ZVKNED,
158+ KVM_RISCV_ISA_EXT_ZVKNHA,
159+ KVM_RISCV_ISA_EXT_ZVKNHB,
160+ KVM_RISCV_ISA_EXT_ZVKSED,
161+ KVM_RISCV_ISA_EXT_ZVKSH,
162+ KVM_RISCV_ISA_EXT_ZVKT,
163+ KVM_RISCV_ISA_EXT_ZFH,
164+ KVM_RISCV_ISA_EXT_ZFHMIN,
165+ KVM_RISCV_ISA_EXT_ZIHINTNTL,
166+ KVM_RISCV_ISA_EXT_ZVFH,
167+ KVM_RISCV_ISA_EXT_ZVFHMIN,
168+ KVM_RISCV_ISA_EXT_ZFA,
142169 KVM_RISCV_ISA_EXT_MAX,
143170 };
144171
arch/riscv/kvm/vcpu_onereg.c+54−0
@@ -42,15 +42,42 @@ static const unsigned long kvm_isa_ext_arr[] = { · 41 unmodified lines
4242 KVM_ISA_EXT_ARR(SVPBMT),
4343 KVM_ISA_EXT_ARR(ZBA),
4444 KVM_ISA_EXT_ARR(ZBB),
45+ KVM_ISA_EXT_ARR(ZBC),
46+ KVM_ISA_EXT_ARR(ZBKB),
47+ KVM_ISA_EXT_ARR(ZBKC),
48+ KVM_ISA_EXT_ARR(ZBKX),
4549 KVM_ISA_EXT_ARR(ZBS),
50+ KVM_ISA_EXT_ARR(ZFA),
51+ KVM_ISA_EXT_ARR(ZFH),
52+ KVM_ISA_EXT_ARR(ZFHMIN),
4653 KVM_ISA_EXT_ARR(ZICBOM),
4754 KVM_ISA_EXT_ARR(ZICBOZ),
4855 KVM_ISA_EXT_ARR(ZICNTR),
4956 KVM_ISA_EXT_ARR(ZICOND),
5057 KVM_ISA_EXT_ARR(ZICSR),
5158 KVM_ISA_EXT_ARR(ZIFENCEI),
59+ KVM_ISA_EXT_ARR(ZIHINTNTL),
5260 KVM_ISA_EXT_ARR(ZIHINTPAUSE),
5361 KVM_ISA_EXT_ARR(ZIHPM),
62+ KVM_ISA_EXT_ARR(ZKND),
63+ KVM_ISA_EXT_ARR(ZKNE),
64+ KVM_ISA_EXT_ARR(ZKNH),
65+ KVM_ISA_EXT_ARR(ZKR),
66+ KVM_ISA_EXT_ARR(ZKSED),
67+ KVM_ISA_EXT_ARR(ZKSH),
68+ KVM_ISA_EXT_ARR(ZKT),
69+ KVM_ISA_EXT_ARR(ZVBB),
70+ KVM_ISA_EXT_ARR(ZVBC),
71+ KVM_ISA_EXT_ARR(ZVFH),
72+ KVM_ISA_EXT_ARR(ZVFHMIN),
73+ KVM_ISA_EXT_ARR(ZVKB),
74+ KVM_ISA_EXT_ARR(ZVKG),
75+ KVM_ISA_EXT_ARR(ZVKNED),
76+ KVM_ISA_EXT_ARR(ZVKNHA),
77+ KVM_ISA_EXT_ARR(ZVKNHB),
78+ KVM_ISA_EXT_ARR(ZVKSED),
79+ KVM_ISA_EXT_ARR(ZVKSH),
80+ KVM_ISA_EXT_ARR(ZVKT),
5481 };
5582
5683 static unsigned long kvm_riscv_vcpu_base2isa_ext(unsigned long base_ext)
@@ -92,13 +119,40 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) · 35 unmodified lines
92119 case KVM_RISCV_ISA_EXT_SVNAPOT:
93120 case KVM_RISCV_ISA_EXT_ZBA:
94121 case KVM_RISCV_ISA_EXT_ZBB:
122+ case KVM_RISCV_ISA_EXT_ZBC:
123+ case KVM_RISCV_ISA_EXT_ZBKB:
124+ case KVM_RISCV_ISA_EXT_ZBKC:
125+ case KVM_RISCV_ISA_EXT_ZBKX:
95126 case KVM_RISCV_ISA_EXT_ZBS:
127+ case KVM_RISCV_ISA_EXT_ZFA:
128+ case KVM_RISCV_ISA_EXT_ZFH:
129+ case KVM_RISCV_ISA_EXT_ZFHMIN:
96130 case KVM_RISCV_ISA_EXT_ZICNTR:
97131 case KVM_RISCV_ISA_EXT_ZICOND:
98132 case KVM_RISCV_ISA_EXT_ZICSR:
99133 case KVM_RISCV_ISA_EXT_ZIFENCEI:
134+ case KVM_RISCV_ISA_EXT_ZIHINTNTL:
100135 case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:
101136 case KVM_RISCV_ISA_EXT_ZIHPM:
137+ case KVM_RISCV_ISA_EXT_ZKND:
138+ case KVM_RISCV_ISA_EXT_ZKNE:
139+ case KVM_RISCV_ISA_EXT_ZKNH:
140+ case KVM_RISCV_ISA_EXT_ZKR:
141+ case KVM_RISCV_ISA_EXT_ZKSED:
142+ case KVM_RISCV_ISA_EXT_ZKSH:
143+ case KVM_RISCV_ISA_EXT_ZKT:
144+ case KVM_RISCV_ISA_EXT_ZVBB:
145+ case KVM_RISCV_ISA_EXT_ZVBC:
146+ case KVM_RISCV_ISA_EXT_ZVFH:
147+ case KVM_RISCV_ISA_EXT_ZVFHMIN:
148+ case KVM_RISCV_ISA_EXT_ZVKB:
149+ case KVM_RISCV_ISA_EXT_ZVKG:
150+ case KVM_RISCV_ISA_EXT_ZVKNED:
151+ case KVM_RISCV_ISA_EXT_ZVKNHA:
152+ case KVM_RISCV_ISA_EXT_ZVKNHB:
153+ case KVM_RISCV_ISA_EXT_ZVKSED:
154+ case KVM_RISCV_ISA_EXT_ZVKSH:
155+ case KVM_RISCV_ISA_EXT_ZVKT:
102156 return false;
103157 /* Extensions which can be disabled using Smstateen */
104158 case KVM_RISCV_ISA_EXT_SSAIA:
arch/riscv/lib/csum.c+5−5
@@ -53,7 +53,7 @@ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, · 52 unmodified lines
5353 * support, so nop when Zbb is available and jump when Zbb is
5454 * not available.
5555 */
56− asm_volatile_goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
56+ asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
5757 RISCV_ISA_EXT_ZBB, 1)
5858 :
5959 :
@@ -170,7 +170,7 @@ do_csum_with_alignment(const unsigned char *buff, int len) · 110 unmodified lines
170170 * support, so nop when Zbb is available and jump when Zbb is
171171 * not available.
172172 */
173− asm_volatile_goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
173+ asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
174174 RISCV_ISA_EXT_ZBB, 1)
175175 :
176176 :
@@ -178,7 +178,7 @@ do_csum_with_alignment(const unsigned char *buff, int len) · 1 unmodified line
178178 : no_zbb);
179179
180180 #ifdef CONFIG_32BIT
181− asm_volatile_goto(".option push \n\
181+ asm_goto_output(".option push \n\
182182 .option arch,+zbb \n\
183183 rori %[fold_temp], %[csum], 16 \n\
184184 andi %[offset], %[offset], 1 \n\
@@ -193,7 +193,7 @@ do_csum_with_alignment(const unsigned char *buff, int len) · 8 unmodified lines
193193
194194 return (unsigned short)csum;
195195 #else /* !CONFIG_32BIT */
196− asm_volatile_goto(".option push \n\
196+ asm_goto_output(".option push \n\
197197 .option arch,+zbb \n\
198198 rori %[fold_temp], %[csum], 32 \n\
199199 add %[csum], %[fold_temp], %[csum] \n\
@@ -257,7 +257,7 @@ do_csum_no_alignment(const unsigned char *buff, int len) · 57 unmodified lines
257257 * support, so nop when Zbb is available and jump when Zbb is
258258 * not available.
259259 */
260− asm_volatile_goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
260+ asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
261261 RISCV_ISA_EXT_ZBB, 1)
262262 :
263263 :
arch/riscv/mm/hugetlbpage.c+73−5
@@ -125,6 +125,26 @@ pte_t *huge_pte_offset(struct mm_struct *mm, · 124 unmodified lines
125125 return pte;
126126 }
127127
128+unsigned long hugetlb_mask_last_page(struct hstate *h)
129+{
130+ unsigned long hp_size = huge_page_size(h);
131+
132+ switch (hp_size) {
133+#ifndef __PAGETABLE_PMD_FOLDED
134+ case PUD_SIZE:
135+ return P4D_SIZE - PUD_SIZE;
136+#endif
137+ case PMD_SIZE:
138+ return PUD_SIZE - PMD_SIZE;
139+ case napot_cont_size(NAPOT_CONT64KB_ORDER):
140+ return PMD_SIZE - napot_cont_size(NAPOT_CONT64KB_ORDER);
141+ default:
142+ break;
143+ }
144+
145+ return 0UL;
146+}
147+
128148 static pte_t get_clear_contig(struct mm_struct *mm,
129149 unsigned long addr,
130150 pte_t *ptep,
@@ -177,13 +197,36 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags) · 46 unmodified lines
177197 return entry;
178198 }
179199
200+static void clear_flush(struct mm_struct *mm,
201+ unsigned long addr,
202+ pte_t *ptep,
203+ unsigned long pgsize,
204+ unsigned long ncontig)
205+{
206+ struct vm_area_struct vma = TLB_FLUSH_VMA(mm, 0);
207+ unsigned long i, saddr = addr;
208+
209+ for (i = 0; i < ncontig; i++, addr += pgsize, ptep++)
210+ ptep_get_and_clear(mm, addr, ptep);
211+
212+ flush_tlb_range(&vma, saddr, addr);
213+}
214+
215+/*
216+ * When dealing with NAPOT mappings, the privileged specification indicates that
217+ * "if an update needs to be made, the OS generally should first mark all of the
218+ * PTEs invalid, then issue SFENCE.VMA instruction(s) covering all 4 KiB regions
219+ * within the range, [...] then update the PTE(s), as described in Section
220+ * 4.2.1.". That's the equivalent of the Break-Before-Make approach used by
221+ * arm64.
222+ */
180223 void set_huge_pte_at(struct mm_struct *mm,
181224 unsigned long addr,
182225 pte_t *ptep,
183226 pte_t pte,
184227 unsigned long sz)
185228 {
186− unsigned long hugepage_shift;
229+ unsigned long hugepage_shift, pgsize;
187230 int i, pte_num;
188231
189232 if (sz >= PGDIR_SIZE)
@@ -198,7 +241,22 @@ void set_huge_pte_at(struct mm_struct *mm, · 8 unmodified lines
198241 hugepage_shift = PAGE_SHIFT;
199242
200243 pte_num = sz >> hugepage_shift;
201− for (i = 0; i < pte_num; i++, ptep++, addr += (1 << hugepage_shift))
244+ pgsize = 1 << hugepage_shift;
245+
246+ if (!pte_present(pte)) {
247+ for (i = 0; i < pte_num; i++, ptep++, addr += pgsize)
248+ set_ptes(mm, addr, ptep, pte, 1);
249+ return;
250+ }
251+
252+ if (!pte_napot(pte)) {
253+ set_ptes(mm, addr, ptep, pte, 1);
254+ return;
255+ }
256+
257+ clear_flush(mm, addr, ptep, pgsize, pte_num);
258+
259+ for (i = 0; i < pte_num; i++, ptep++, addr += pgsize)
202260 set_pte_at(mm, addr, ptep, pte);
203261 }
204262
@@ -306,7 +364,7 @@ void huge_pte_clear(struct mm_struct *mm, · 101 unmodified lines
306364 pte_clear(mm, addr, ptep);
307365 }
308366
309−static __init bool is_napot_size(unsigned long size)
367+static bool is_napot_size(unsigned long size)
310368 {
311369 unsigned long order;
312370
@@ -334,7 +392,7 @@ arch_initcall(napot_hugetlbpages_init); · 21 unmodified lines
334392
335393 #else
336394
337−static __init bool is_napot_size(unsigned long size)
395+static bool is_napot_size(unsigned long size)
338396 {
339397 return false;
340398 }
@@ -351,7 +409,7 @@ int pmd_huge(pmd_t pmd) · 10 unmodified lines
351409 return pmd_leaf(pmd);
352410 }
353411
354−bool __init arch_hugetlb_valid_size(unsigned long size)
412+static bool __hugetlb_valid_size(unsigned long size)
355413 {
356414 if (size == HPAGE_SIZE)
357415 return true;
@@ -363,6 +421,16 @@ bool __init arch_hugetlb_valid_size(unsigned long size) · 5 unmodified lines
363421 return false;
364422 }
365423
424+bool __init arch_hugetlb_valid_size(unsigned long size)
425+{
426+ return __hugetlb_valid_size(size);
427+}
428+
429+bool arch_hugetlb_migration_supported(struct hstate *h)
430+{
431+ return __hugetlb_valid_size(huge_page_size(h));
432+}
433+
366434 #ifdef CONFIG_CONTIG_ALLOC
367435 static __init int gigantic_pages_init(void)
368436 {
arch/riscv/mm/init.c+4−0
@@ -1385,6 +1385,10 @@ void __init misc_mem_init(void) · 1384 unmodified lines
13851385 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
13861386 arch_numa_init();
13871387 sparse_init();
1388+#ifdef CONFIG_SPARSEMEM_VMEMMAP
1389+ /* The entire VMEMMAP region has been populated. Flush TLB for this region */
1390+ local_flush_tlb_kernel_range(VMEMMAP_START, VMEMMAP_END);
1391+#endif
13881392 zone_sizes_init();
13891393 arch_reserve_crashkernel();
13901394 memblock_dump_all();
arch/riscv/mm/tlbflush.c+3−1
@@ -66,9 +66,10 @@ static inline void local_flush_tlb_range_asid(unsigned long start, · 65 unmodified lines
6666 local_flush_tlb_range_threshold_asid(start, size, stride, asid);
6767 }
6868
69+/* Flush a range of kernel pages without broadcasting */
6970 void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
7071 {
71− local_flush_tlb_range_asid(start, end, PAGE_SIZE, FLUSH_TLB_NO_ASID);
72+ local_flush_tlb_range_asid(start, end - start, PAGE_SIZE, FLUSH_TLB_NO_ASID);
7273 }
7374
7475 static void __ipi_flush_tlb_all(void *info)
@@ -233,4 +234,5 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) · 158 unmodified lines
233234 {
234235 __flush_tlb_range(&batch->cpumask, FLUSH_TLB_NO_ASID, 0,
235236 FLUSH_TLB_MAX_SIZE, PAGE_SIZE);
237+ cpumask_clear(&batch->cpumask);
236238 }
arch/riscv/net/bpf_jit_comp64.c+3−2
@@ -795,6 +795,7 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, · 794 unmodified lines
795795 struct bpf_tramp_links *fentry = &tlinks[BPF_TRAMP_FENTRY];
796796 struct bpf_tramp_links *fexit = &tlinks[BPF_TRAMP_FEXIT];
797797 struct bpf_tramp_links *fmod_ret = &tlinks[BPF_TRAMP_MODIFY_RETURN];
798+ bool is_struct_ops = flags & BPF_TRAMP_F_INDIRECT;
798799 void *orig_call = func_addr;
799800 bool save_ret;
800801 u32 insn;
@@ -878,7 +879,7 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, · 77 unmodified lines
878879
879880 stack_size = round_up(stack_size, 16);
880881
881− if (func_addr) {
882+ if (!is_struct_ops) {
882883 /* For the trampoline called from function entry,
883884 * the frame of traced function and the frame of
884885 * trampoline need to be considered.
@@ -998,7 +999,7 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, · 113 unmodified lines
998999
9991000 emit_ld(RV_REG_S1, -sreg_off, RV_REG_FP, ctx);
10001001
1001− if (func_addr) {
1002+ if (!is_struct_ops) {
10021003 /* trampoline called from function entry */
10031004 emit_ld(RV_REG_T0, stack_size - 8, RV_REG_SP, ctx);
10041005 emit_ld(RV_REG_FP, stack_size - 16, RV_REG_SP, ctx);
arch/s390/include/asm/jump_label.h+2−2
@@ -25,7 +25,7 @@ · 24 unmodified lines
2525 */
2626 static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
2727 {
28− asm_volatile_goto("0: brcl 0,%l[label]\n"
28+ asm goto("0: brcl 0,%l[label]\n"
2929 ".pushsection __jump_table,\"aw\"\n"
3030 ".balign 8\n"
3131 ".long 0b-.,%l[label]-.\n"
@@ -39,7 +39,7 @@ label: · 7 unmodified lines
3939
4040 static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch)
4141 {
42− asm_volatile_goto("0: brcl 15,%l[label]\n"
42+ asm goto("0: brcl 15,%l[label]\n"
4343 ".pushsection __jump_table,\"aw\"\n"
4444 ".balign 8\n"
4545 ".long 0b-.,%l[label]-.\n"
arch/s390/kvm/priv.c+6−2
@@ -676,8 +676,12 @@ static int handle_pqap(struct kvm_vcpu *vcpu) · 675 unmodified lines
676676 if (vcpu->kvm->arch.crypto.pqap_hook) {
677677 pqap_hook = *vcpu->kvm->arch.crypto.pqap_hook;
678678 ret = pqap_hook(vcpu);
679− if (!ret && vcpu->run->s.regs.gprs[1] & 0x00ff0000)
680− kvm_s390_set_psw_cc(vcpu, 3);
679+ if (!ret) {
680+ if (vcpu->run->s.regs.gprs[1] & 0x00ff0000)
681+ kvm_s390_set_psw_cc(vcpu, 3);
682+ else
683+ kvm_s390_set_psw_cc(vcpu, 0);
684+ }
681685 up_read(&vcpu->kvm->arch.crypto.pqap_hook_rwsem);
682686 return ret;
683687 }
arch/s390/kvm/vsie.c+0−1
@@ -1235,7 +1235,6 @@ static int acquire_gmap_shadow(struct kvm_vcpu *vcpu, · 1234 unmodified lines
12351235 gmap = gmap_shadow(vcpu->arch.gmap, asce, edat);
12361236 if (IS_ERR(gmap))
12371237 return PTR_ERR(gmap);
1238− gmap->private = vcpu->kvm;
12391238 vcpu->kvm->stat.gmap_shadow_create++;
12401239 WRITE_ONCE(vsie_page->gmap, gmap);
12411240 return 0;
arch/s390/mm/gmap.c+1−0
@@ -1691,6 +1691,7 @@ struct gmap *gmap_shadow(struct gmap *parent, unsigned long asce, · 1690 unmodified lines
16911691 return ERR_PTR(-ENOMEM);
16921692 new->mm = parent->mm;
16931693 new->parent = gmap_get(parent);
1694+ new->private = parent->private;
16941695 new->orig_asce = asce;
16951696 new->edat_level = edat_level;
16961697 new->initialized = false;
arch/sparc/include/asm/jump_label.h+2−2
@@ -10,7 +10,7 @@ · 9 unmodified lines
1010
1111 static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
1212 {
13− asm_volatile_goto("1:\n\t"
13+ asm goto("1:\n\t"
1414 "nop\n\t"
1515 "nop\n\t"
1616 ".pushsection __jump_table, \"aw\"\n\t"
@@ -26,7 +26,7 @@ l_yes: · 9 unmodified lines
2626
2727 static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch)
2828 {
29− asm_volatile_goto("1:\n\t"
29+ asm goto("1:\n\t"
3030 "b %l[l_yes]\n\t"
3131 "nop\n\t"
3232 ".pushsection __jump_table, \"aw\"\n\t"
arch/um/Makefile+3−1
@@ -115,7 +115,9 @@ archprepare: · 114 unmodified lines
115115 $(Q)$(MAKE) $(build)=$(HOST_DIR)/um include/generated/user_constants.h
116116
117117 LINK-$(CONFIG_LD_SCRIPT_STATIC) += -static
118−LINK-$(CONFIG_LD_SCRIPT_DYN) += $(call cc-option, -no-pie)
118+ifdef CONFIG_LD_SCRIPT_DYN
119+LINK-$(call gcc-min-version, 60100)$(CONFIG_CC_IS_CLANG) += -no-pie
120+endif
119121 LINK-$(CONFIG_LD_SCRIPT_DYN_RPATH) += -Wl,-rpath,/lib
120122
121123 CFLAGS_NO_HARDENING := $(call cc-option, -fno-PIC,) $(call cc-option, -fno-pic,) \
arch/um/include/asm/cpufeature.h+1−1
@@ -75,7 +75,7 @@ extern void setup_clear_cpu_cap(unsigned int bit); · 74 unmodified lines
7575 */
7676 static __always_inline bool _static_cpu_has(u16 bit)
7777 {
78− asm_volatile_goto("1: jmp 6f\n"
78+ asm goto("1: jmp 6f\n"
7979 "2:\n"
8080 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
8181 "((5f-4f) - (2b-1b)),0x90\n"
arch/x86/Kconfig.cpu+1−1
@@ -379,7 +379,7 @@ config X86_CMOV · 378 unmodified lines
379379 config X86_MINIMUM_CPU_FAMILY
380380 int
381381 default "64" if X86_64
382− default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCRUSOE || MCORE2 || MK7 || MK8)
382+ default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCORE2 || MK7 || MK8)
383383 default "5" if X86_32 && X86_CMPXCHG64
384384 default "4"
385385
arch/x86/Makefile+5−5
@@ -112,13 +112,13 @@ ifeq ($(CONFIG_X86_32),y) · 111 unmodified lines
112112 # temporary until string.h is fixed
113113 KBUILD_CFLAGS += -ffreestanding
114114
115− ifeq ($(CONFIG_STACKPROTECTOR),y)
116− ifeq ($(CONFIG_SMP),y)
115+ ifeq ($(CONFIG_STACKPROTECTOR),y)
116+ ifeq ($(CONFIG_SMP),y)
117117 KBUILD_CFLAGS += -mstack-protector-guard-reg=fs -mstack-protector-guard-symbol=__stack_chk_guard
118− else
118+ else
119119 KBUILD_CFLAGS += -mstack-protector-guard=global
120− endif
121− endif
120+ endif
121+ endif
122122 else
123123 BITS := 64
124124 UTS_MACHINE := x86_64
arch/x86/boot/header.S+6−8
@@ -106,8 +106,7 @@ extra_header_fields: · 105 unmodified lines
106106 .word 0 # MinorSubsystemVersion
107107 .long 0 # Win32VersionValue
108108
109− .long setup_size + ZO__end + pecompat_vsize
110− # SizeOfImage
109+ .long setup_size + ZO__end # SizeOfImage
111110
112111 .long salign # SizeOfHeaders
113112 .long 0 # CheckSum
@@ -143,7 +142,7 @@ section_table: · 29 unmodified lines
143142 .ascii ".setup"
144143 .byte 0
145144 .byte 0
146− .long setup_size - salign # VirtualSize
145+ .long pecompat_fstart - salign # VirtualSize
147146 .long salign # VirtualAddress
148147 .long pecompat_fstart - salign # SizeOfRawData
149148 .long salign # PointerToRawData
@@ -156,8 +155,8 @@ section_table: · 6 unmodified lines
156155 #ifdef CONFIG_EFI_MIXED
157156 .asciz ".compat"
158157
159− .long 8 # VirtualSize
160− .long setup_size + ZO__end # VirtualAddress
158+ .long pecompat_fsize # VirtualSize
159+ .long pecompat_fstart # VirtualAddress
161160 .long pecompat_fsize # SizeOfRawData
162161 .long pecompat_fstart # PointerToRawData
163162
@@ -172,17 +171,16 @@ section_table: · 8 unmodified lines
172171 * modes this image supports.
173172 */
174173 .pushsection ".pecompat", "a", @progbits
175− .balign falign
176− .set pecompat_vsize, salign
174+ .balign salign
177175 .globl pecompat_fstart
178176 pecompat_fstart:
179177 .byte 0x1 # Version
180178 .byte 8 # Size
181179 .word IMAGE_FILE_MACHINE_I386 # PE machine type
182180 .long setup_size + ZO_efi32_pe_entry # Entrypoint
181+ .byte 0x0 # Sentinel
183182 .popsection
184183 #else
185− .set pecompat_vsize, 0
186184 .set pecompat_fstart, setup_size
187185 #endif
188186 .ascii ".text"
arch/x86/boot/setup.ld+3−3
@@ -24,6 +24,9 @@ SECTIONS · 23 unmodified lines
2424 .text : { *(.text .text.*) }
2525 .text32 : { *(.text32) }
2626
27+ .pecompat : { *(.pecompat) }
28+ PROVIDE(pecompat_fsize = setup_size - pecompat_fstart);
29+
2730 . = ALIGN(16);
2831 .rodata : { *(.rodata*) }
2932
@@ -36,9 +39,6 @@ SECTIONS · 6 unmodified lines
3639 . = ALIGN(16);
3740 .data : { *(.data*) }
3841
39− .pecompat : { *(.pecompat) }
40− PROVIDE(pecompat_fsize = setup_size - pecompat_fstart);
41−
4242 .signature : {
4343 setup_sig = .;
4444 LONG(0x5a5aaa55)
arch/x86/include/asm/coco.h+3−2
@@ -10,13 +10,14 @@ enum cc_vendor { · 9 unmodified lines
1010 CC_VENDOR_INTEL,
1111 };
1212
13−extern enum cc_vendor cc_vendor;
14−
1513 #ifdef CONFIG_ARCH_HAS_CC_PLATFORM
14+extern enum cc_vendor cc_vendor;
1615 void cc_set_mask(u64 mask);
1716 u64 cc_mkenc(u64 val);
1817 u64 cc_mkdec(u64 val);
1918 #else
19+#define cc_vendor (CC_VENDOR_NONE)
20+
2021 static inline u64 cc_mkenc(u64 val)
2122 {
2223 return val;
arch/x86/include/asm/cpufeature.h+1−1
@@ -168,7 +168,7 @@ extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit); · 167 unmodified lines
168168 */
169169 static __always_inline bool _static_cpu_has(u16 bit)
170170 {
171− asm_volatile_goto(
171+ asm goto(
172172 ALTERNATIVE_TERNARY("jmp 6f", %P[feature], "", "jmp %l[t_no]")
173173 ".pushsection .altinstr_aux,\"ax\"\n"
174174 "6:\n"
arch/x86/include/asm/cpufeatures.h+1−3
@@ -81,10 +81,8 @@ · 80 unmodified lines
8181 #define X86_FEATURE_K6_MTRR ( 3*32+ 1) /* AMD K6 nonstandard MTRRs */
8282 #define X86_FEATURE_CYRIX_ARR ( 3*32+ 2) /* Cyrix ARRs (= MTRRs) */
8383 #define X86_FEATURE_CENTAUR_MCR ( 3*32+ 3) /* Centaur MCRs (= MTRRs) */
84−
85−/* CPU types for specific tunings: */
8684 #define X86_FEATURE_K8 ( 3*32+ 4) /* "" Opteron, Athlon64 */
87−/* FREE, was #define X86_FEATURE_K7 ( 3*32+ 5) "" Athlon */
85+#define X86_FEATURE_ZEN5 ( 3*32+ 5) /* "" CPU based on Zen5 microarchitecture */
8886 #define X86_FEATURE_P3 ( 3*32+ 6) /* "" P3 */
8987 #define X86_FEATURE_P4 ( 3*32+ 7) /* "" P4 */
9088 #define X86_FEATURE_CONSTANT_TSC ( 3*32+ 8) /* TSC ticks at a constant rate */
arch/x86/include/asm/intel-family.h+2−0
@@ -162,6 +162,8 @@ · 161 unmodified lines
162162 #define INTEL_FAM6_ATOM_CRESTMONT_X 0xAF /* Sierra Forest */
163163 #define INTEL_FAM6_ATOM_CRESTMONT 0xB6 /* Grand Ridge */
164164
165+#define INTEL_FAM6_ATOM_DARKMONT_X 0xDD /* Clearwater Forest */
166+
165167 /* Xeon Phi */
166168
167169 #define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */
arch/x86/include/asm/jump_label.h+3−3
@@ -24,7 +24,7 @@ · 23 unmodified lines
2424
2525 static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
2626 {
27− asm_volatile_goto("1:"
27+ asm goto("1:"
2828 "jmp %l[l_yes] # objtool NOPs this \n\t"
2929 JUMP_TABLE_ENTRY
3030 : : "i" (key), "i" (2 | branch) : : l_yes);
@@ -38,7 +38,7 @@ l_yes: · 7 unmodified lines
3838
3939 static __always_inline bool arch_static_branch(struct static_key * const key, const bool branch)
4040 {
41− asm_volatile_goto("1:"
41+ asm goto("1:"
4242 ".byte " __stringify(BYTES_NOP5) "\n\t"
4343 JUMP_TABLE_ENTRY
4444 : : "i" (key), "i" (branch) : : l_yes);
@@ -52,7 +52,7 @@ l_yes: · 7 unmodified lines
5252
5353 static __always_inline bool arch_static_branch_jump(struct static_key * const key, const bool branch)
5454 {
55− asm_volatile_goto("1:"
55+ asm goto("1:"
5656 "jmp %l[l_yes]\n\t"
5757 JUMP_TABLE_ENTRY
5858 : : "i" (key), "i" (branch) : : l_yes);
arch/x86/include/asm/kmsan.h+16−1
@@ -64,6 +64,7 @@ static inline bool kmsan_virt_addr_valid(void *addr) · 63 unmodified lines
6464 {
6565 unsigned long x = (unsigned long)addr;
6666 unsigned long y = x - __START_KERNEL_map;
67+ bool ret;
6768
6869 /* use the carry flag to determine if x was < __START_KERNEL_map */
6970 if (unlikely(x > y)) {
@@ -79,7 +80,21 @@ static inline bool kmsan_virt_addr_valid(void *addr) · 9 unmodified lines
7980 return false;
8081 }
8182
82− return pfn_valid(x >> PAGE_SHIFT);
83+ /*
84+ * pfn_valid() relies on RCU, and may call into the scheduler on exiting
85+ * the critical section. However, this would result in recursion with
86+ * KMSAN. Therefore, disable preemption here, and re-enable preemption
87+ * below while suppressing reschedules to avoid recursion.
88+ *
89+ * Note, this sacrifices occasionally breaking scheduling guarantees.
90+ * Although, a kernel compiled with KMSAN has already given up on any
91+ * performance guarantees due to being heavily instrumented.
92+ */
93+ preempt_disable();
94+ ret = pfn_valid(x >> PAGE_SHIFT);
95+ preempt_enable_no_resched();
96+
97+ return ret;
8398 }
8499
85100 #endif /* !MODULE */
arch/x86/include/asm/kvm_host.h+2−0
@@ -1145,6 +1145,8 @@ struct kvm_hv { · 1144 unmodified lines
11451145 unsigned int synic_auto_eoi_used;
11461146
11471147 struct kvm_hv_syndbg hv_syndbg;
1148+
1149+ bool xsaves_xsavec_checked;
11481150 };
11491151 #endif
11501152
arch/x86/include/asm/rmwcc.h+1−1
@@ -13,7 +13,7 @@ · 12 unmodified lines
1313 #define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \
1414 ({ \
1515 bool c = false; \
16− asm_volatile_goto (fullop "; j" #cc " %l[cc_label]" \
16+ asm goto (fullop "; j" #cc " %l[cc_label]" \
1717 : : [var] "m" (_var), ## __VA_ARGS__ \
1818 : clobbers : cc_label); \
1919 if (0) { \
arch/x86/include/asm/special_insns.h+1−1
@@ -205,7 +205,7 @@ static inline void clwb(volatile void *__p) · 204 unmodified lines
205205 #ifdef CONFIG_X86_USER_SHADOW_STACK
206206 static inline int write_user_shstk_64(u64 __user *addr, u64 val)
207207 {
208− asm_volatile_goto("1: wrussq %[val], (%[addr])\n"
208+ asm goto("1: wrussq %[val], (%[addr])\n"
209209 _ASM_EXTABLE(1b, %l[fail])
210210 :: [addr] "r" (addr), [val] "r" (val)
211211 :: fail);
arch/x86/include/asm/syscall_wrapper.h+21−4
@@ -58,12 +58,29 @@ extern long __ia32_sys_ni_syscall(const struct pt_regs *regs); · 57 unmodified lines
5858 ,,regs->di,,regs->si,,regs->dx \
5959 ,,regs->r10,,regs->r8,,regs->r9) \
6060
61+
62+/* SYSCALL_PT_ARGS is Adapted from s390x */
63+#define SYSCALL_PT_ARG6(m, t1, t2, t3, t4, t5, t6) \
64+ SYSCALL_PT_ARG5(m, t1, t2, t3, t4, t5), m(t6, (regs->bp))
65+#define SYSCALL_PT_ARG5(m, t1, t2, t3, t4, t5) \
66+ SYSCALL_PT_ARG4(m, t1, t2, t3, t4), m(t5, (regs->di))
67+#define SYSCALL_PT_ARG4(m, t1, t2, t3, t4) \
68+ SYSCALL_PT_ARG3(m, t1, t2, t3), m(t4, (regs->si))
69+#define SYSCALL_PT_ARG3(m, t1, t2, t3) \
70+ SYSCALL_PT_ARG2(m, t1, t2), m(t3, (regs->dx))
71+#define SYSCALL_PT_ARG2(m, t1, t2) \
72+ SYSCALL_PT_ARG1(m, t1), m(t2, (regs->cx))
73+#define SYSCALL_PT_ARG1(m, t1) m(t1, (regs->bx))
74+#define SYSCALL_PT_ARGS(x, ...) SYSCALL_PT_ARG##x(__VA_ARGS__)
75+
76+#define __SC_COMPAT_CAST(t, a) \
77+ (__typeof(__builtin_choose_expr(__TYPE_IS_L(t), 0, 0U))) \
78+ (unsigned int)a
79+
6180 /* Mapping of registers to parameters for syscalls on i386 */
6281 #define SC_IA32_REGS_TO_ARGS(x, ...) \
63− __MAP(x,__SC_ARGS \
64− ,,(unsigned int)regs->bx,,(unsigned int)regs->cx \
65− ,,(unsigned int)regs->dx,,(unsigned int)regs->si \
66− ,,(unsigned int)regs->di,,(unsigned int)regs->bp)
82+ SYSCALL_PT_ARGS(x, __SC_COMPAT_CAST, \
83+ __MAP(x, __SC_TYPE, __VA_ARGS__)) \
6784
6885 #define __SYS_STUB0(abi, name) \
6986 long __##abi##_##name(const struct pt_regs *regs); \
arch/x86/include/asm/uaccess.h+5−5
@@ -133,7 +133,7 @@ extern int __get_user_bad(void); · 132 unmodified lines
133133
134134 #ifdef CONFIG_X86_32
135135 #define __put_user_goto_u64(x, addr, label) \
136− asm_volatile_goto("\n" \
136+ asm goto("\n" \
137137 "1: movl %%eax,0(%1)\n" \
138138 "2: movl %%edx,4(%1)\n" \
139139 _ASM_EXTABLE_UA(1b, %l2) \
@@ -295,7 +295,7 @@ do { \ · 155 unmodified lines
295295 } while (0)
296296
297297 #define __get_user_asm(x, addr, itype, ltype, label) \
298− asm_volatile_goto("\n" \
298+ asm_goto_output("\n" \
299299 "1: mov"itype" %[umem],%[output]\n" \
300300 _ASM_EXTABLE_UA(1b, %l2) \
301301 : [output] ltype(x) \
@@ -375,7 +375,7 @@ do { \ · 73 unmodified lines
375375 __typeof__(_ptr) _old = (__typeof__(_ptr))(_pold); \
376376 __typeof__(*(_ptr)) __old = *_old; \
377377 __typeof__(*(_ptr)) __new = (_new); \
378− asm_volatile_goto("\n" \
378+ asm_goto_output("\n" \
379379 "1: " LOCK_PREFIX "cmpxchg"itype" %[new], %[ptr]\n"\
380380 _ASM_EXTABLE_UA(1b, %l[label]) \
381381 : CC_OUT(z) (success), \
@@ -394,7 +394,7 @@ do { \ · 12 unmodified lines
394394 __typeof__(_ptr) _old = (__typeof__(_ptr))(_pold); \
395395 __typeof__(*(_ptr)) __old = *_old; \
396396 __typeof__(*(_ptr)) __new = (_new); \
397− asm_volatile_goto("\n" \
397+ asm_goto_output("\n" \
398398 "1: " LOCK_PREFIX "cmpxchg8b %[ptr]\n" \
399399 _ASM_EXTABLE_UA(1b, %l[label]) \
400400 : CC_OUT(z) (success), \
@@ -477,7 +477,7 @@ struct __large_struct { unsigned long buf[100]; }; · 76 unmodified lines
477477 * aliasing issues.
478478 */
479479 #define __put_user_goto(x, addr, itype, ltype, label) \
480− asm_volatile_goto("\n" \
480+ asm goto("\n" \
481481 "1: mov"itype" %0,%1\n" \
482482 _ASM_EXTABLE_UA(1b, %l2) \
483483 : : ltype(x), "m" (__m(addr)) \
arch/x86/kernel/alternative.c+1−1
@@ -403,7 +403,7 @@ noinstr void BUG_func(void) · 402 unmodified lines
403403 {
404404 BUG();
405405 }
406−EXPORT_SYMBOL_GPL(BUG_func);
406+EXPORT_SYMBOL(BUG_func);
407407
408408 #define CALL_RIP_REL_OPCODE 0xff
409409 #define CALL_RIP_REL_MODRM 0x15
arch/x86/kernel/cpu/amd.c+24−4
@@ -538,7 +538,7 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) · 537 unmodified lines
538538
539539 /* Figure out Zen generations: */
540540 switch (c->x86) {
541− case 0x17: {
541+ case 0x17:
542542 switch (c->x86_model) {
543543 case 0x00 ... 0x2f:
544544 case 0x50 ... 0x5f:
@@ -554,8 +554,8 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) · 9 unmodified lines
554554 goto warn;
555555 }
556556 break;
557− }
558− case 0x19: {
557+
558+ case 0x19:
559559 switch (c->x86_model) {
560560 case 0x00 ... 0x0f:
561561 case 0x20 ... 0x5f:
@@ -569,7 +569,20 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) · 7 unmodified lines
569569 goto warn;
570570 }
571571 break;
572− }
572+
573+ case 0x1a:
574+ switch (c->x86_model) {
575+ case 0x00 ... 0x0f:
576+ case 0x20 ... 0x2f:
577+ case 0x40 ... 0x4f:
578+ case 0x70 ... 0x7f:
579+ setup_force_cpu_cap(X86_FEATURE_ZEN5);
580+ break;
581+ default:
582+ goto warn;
583+ }
584+ break;
585+
573586 default:
574587 break;
575588 }
@@ -1039,6 +1052,11 @@ static void init_amd_zen4(struct cpuinfo_x86 *c) · 463 unmodified lines
10391052 msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);
10401053 }
10411054
1055+static void init_amd_zen5(struct cpuinfo_x86 *c)
1056+{
1057+ init_amd_zen_common();
1058+}
1059+
10421060 static void init_amd(struct cpuinfo_x86 *c)
10431061 {
10441062 u64 vm_cr;
@@ -1084,6 +1102,8 @@ static void init_amd(struct cpuinfo_x86 *c) · 39 unmodified lines
10841102 init_amd_zen3(c);
10851103 else if (boot_cpu_has(X86_FEATURE_ZEN4))
10861104 init_amd_zen4(c);
1105+ else if (boot_cpu_has(X86_FEATURE_ZEN5))
1106+ init_amd_zen5(c);
10871107
10881108 /*
10891109 * Enable workaround for FXSAVE leak on CPUs
arch/x86/kernel/fpu/signal.c+5−8
@@ -274,12 +274,13 @@ static int __restore_fpregs_from_user(void __user *buf, u64 ufeatures, · 273 unmodified lines
274274 * Attempt to restore the FPU registers directly from user memory.
275275 * Pagefaults are handled and any errors returned are fatal.
276276 */
277−static bool restore_fpregs_from_user(void __user *buf, u64 xrestore,
278− bool fx_only, unsigned int size)
277+static bool restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
279278 {
280279 struct fpu *fpu = &current->thread.fpu;
281280 int ret;
282281
282+ /* Restore enabled features only. */
283+ xrestore &= fpu->fpstate->user_xfeatures;
283284 retry:
284285 fpregs_lock();
285286 /* Ensure that XFD is up to date */
@@ -309,7 +310,7 @@ retry: · 23 unmodified lines
309310 if (ret != X86_TRAP_PF)
310311 return false;
311312
312− if (!fault_in_readable(buf, size))
313+ if (!fault_in_readable(buf, fpu->fpstate->user_size))
313314 goto retry;
314315 return false;
315316 }
@@ -339,7 +340,6 @@ static bool __fpu_restore_sig(void __user *buf, void __user *buf_fx, · 23 unmodified lines
339340 struct user_i387_ia32_struct env;
340341 bool success, fx_only = false;
341342 union fpregs_state *fpregs;
342− unsigned int state_size;
343343 u64 user_xfeatures = 0;
344344
345345 if (use_xsave()) {
@@ -349,17 +349,14 @@ static bool __fpu_restore_sig(void __user *buf, void __user *buf_fx, · 3 unmodified lines
349349 return false;
350350
351351 fx_only = !fx_sw_user.magic1;
352− state_size = fx_sw_user.xstate_size;
353352 user_xfeatures = fx_sw_user.xfeatures;
354353 } else {
355354 user_xfeatures = XFEATURE_MASK_FPSSE;
356− state_size = fpu->fpstate->user_size;
357355 }
358356
359357 if (likely(!ia32_fxstate)) {
360358 /* Restore the FPU registers directly from user memory. */
361− return restore_fpregs_from_user(buf_fx, user_xfeatures, fx_only,
362− state_size);
359+ return restore_fpregs_from_user(buf_fx, user_xfeatures, fx_only);
363360 }
364361
365362 /*
arch/x86/kernel/kvm.c+2−1
@@ -434,7 +434,8 @@ static void __init sev_map_percpu_data(void) · 433 unmodified lines
434434 {
435435 int cpu;
436436
437− if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
437+ if (cc_vendor != CC_VENDOR_AMD ||
438+ !cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
438439 return;
439440
440441 for_each_possible_cpu(cpu) {
arch/x86/kvm/hyperv.c+50−0
@@ -1322,6 +1322,56 @@ static bool hv_check_msr_access(struct kvm_vcpu_hv *hv_vcpu, u32 msr) · 1321 unmodified lines
13221322 return false;
13231323 }
13241324
1325+#define KVM_HV_WIN2016_GUEST_ID 0x1040a00003839
1326+#define KVM_HV_WIN2016_GUEST_ID_MASK (~GENMASK_ULL(23, 16)) /* mask out the service version */
1327+
1328+/*
1329+ * Hyper-V enabled Windows Server 2016 SMP VMs fail to boot in !XSAVES && XSAVEC
1330+ * configuration.
1331+ * Such configuration can result from, for example, AMD Erratum 1386 workaround.
1332+ *
1333+ * Print a notice so users aren't left wondering what's suddenly gone wrong.
1334+ */
1335+static void __kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu)
1336+{
1337+ struct kvm *kvm = vcpu->kvm;
1338+ struct kvm_hv *hv = to_kvm_hv(kvm);
1339+
1340+ /* Check again under the hv_lock. */
1341+ if (hv->xsaves_xsavec_checked)
1342+ return;
1343+
1344+ if ((hv->hv_guest_os_id & KVM_HV_WIN2016_GUEST_ID_MASK) !=
1345+ KVM_HV_WIN2016_GUEST_ID)
1346+ return;
1347+
1348+ hv->xsaves_xsavec_checked = true;
1349+
1350+ /* UP configurations aren't affected */
1351+ if (atomic_read(&kvm->online_vcpus) < 2)
1352+ return;
1353+
1354+ if (guest_cpuid_has(vcpu, X86_FEATURE_XSAVES) ||
1355+ !guest_cpuid_has(vcpu, X86_FEATURE_XSAVEC))
1356+ return;
1357+
1358+ pr_notice_ratelimited("Booting SMP Windows KVM VM with !XSAVES && XSAVEC. "
1359+ "If it fails to boot try disabling XSAVEC in the VM config.\n");
1360+}
1361+
1362+void kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu)
1363+{
1364+ struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
1365+
1366+ if (!vcpu->arch.hyperv_enabled ||
1367+ hv->xsaves_xsavec_checked)
1368+ return;
1369+
1370+ mutex_lock(&hv->hv_lock);
1371+ __kvm_hv_xsaves_xsavec_maybe_warn(vcpu);
1372+ mutex_unlock(&hv->hv_lock);
1373+}
1374+
13251375 static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
13261376 bool host)
13271377 {
arch/x86/kvm/hyperv.h+3−0
@@ -182,6 +182,8 @@ void kvm_hv_setup_tsc_page(struct kvm *kvm, · 181 unmodified lines
182182 struct pvclock_vcpu_time_info *hv_clock);
183183 void kvm_hv_request_tsc_page_update(struct kvm *kvm);
184184
185+void kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu);
186+
185187 void kvm_hv_init_vm(struct kvm *kvm);
186188 void kvm_hv_destroy_vm(struct kvm *kvm);
187189 int kvm_hv_vcpu_init(struct kvm_vcpu *vcpu);
@@ -267,6 +269,7 @@ int kvm_hv_vcpu_flush_tlb(struct kvm_vcpu *vcpu); · 79 unmodified lines
267269 static inline void kvm_hv_setup_tsc_page(struct kvm *kvm,
268270 struct pvclock_vcpu_time_info *hv_clock) {}
269271 static inline void kvm_hv_request_tsc_page_update(struct kvm *kvm) {}
272+static inline void kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu) {}
270273 static inline void kvm_hv_init_vm(struct kvm *kvm) {}
271274 static inline void kvm_hv_destroy_vm(struct kvm *kvm) {}
272275 static inline int kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
arch/x86/kvm/svm/svm_ops.h+3−3
@@ -8,7 +8,7 @@ · 7 unmodified lines
88
99 #define svm_asm(insn, clobber...) \
1010 do { \
11− asm_volatile_goto("1: " __stringify(insn) "\n\t" \
11+ asm goto("1: " __stringify(insn) "\n\t" \
1212 _ASM_EXTABLE(1b, %l[fault]) \
1313 ::: clobber : fault); \
1414 return; \
@@ -18,7 +18,7 @@ fault: \ · 3 unmodified lines
1818
1919 #define svm_asm1(insn, op1, clobber...) \
2020 do { \
21− asm_volatile_goto("1: " __stringify(insn) " %0\n\t" \
21+ asm goto("1: " __stringify(insn) " %0\n\t" \
2222 _ASM_EXTABLE(1b, %l[fault]) \
2323 :: op1 : clobber : fault); \
2424 return; \
@@ -28,7 +28,7 @@ fault: \ · 3 unmodified lines
2828
2929 #define svm_asm2(insn, op1, op2, clobber...) \
3030 do { \
31− asm_volatile_goto("1: " __stringify(insn) " %1, %0\n\t" \
31+ asm goto("1: " __stringify(insn) " %1, %0\n\t" \
3232 _ASM_EXTABLE(1b, %l[fault]) \
3333 :: op1, op2 : clobber : fault); \
3434 return; \
arch/x86/kvm/vmx/vmx.c+2−2
@@ -738,7 +738,7 @@ static int vmx_set_guest_uret_msr(struct vcpu_vmx *vmx, · 737 unmodified lines
738738 */
739739 static int kvm_cpu_vmxoff(void)
740740 {
741− asm_volatile_goto("1: vmxoff\n\t"
741+ asm goto("1: vmxoff\n\t"
742742 _ASM_EXTABLE(1b, %l[fault])
743743 ::: "cc", "memory" : fault);
744744
@@ -2784,7 +2784,7 @@ static int kvm_cpu_vmxon(u64 vmxon_pointer) · 2039 unmodified lines
27842784
27852785 cr4_set_bits(X86_CR4_VMXE);
27862786
2787− asm_volatile_goto("1: vmxon %[vmxon_pointer]\n\t"
2787+ asm goto("1: vmxon %[vmxon_pointer]\n\t"
27882788 _ASM_EXTABLE(1b, %l[fault])
27892789 : : [vmxon_pointer] "m"(vmxon_pointer)
27902790 : : fault);
arch/x86/kvm/vmx/vmx_ops.h+3−3
@@ -94,7 +94,7 @@ static __always_inline unsigned long __vmcs_readl(unsigned long field) · 93 unmodified lines
9494
9595 #ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
9696
97− asm_volatile_goto("1: vmread %[field], %[output]\n\t"
97+ asm_goto_output("1: vmread %[field], %[output]\n\t"
9898 "jna %l[do_fail]\n\t"
9999
100100 _ASM_EXTABLE(1b, %l[do_exception])
@@ -188,7 +188,7 @@ static __always_inline unsigned long vmcs_readl(unsigned long field) · 87 unmodified lines
188188
189189 #define vmx_asm1(insn, op1, error_args...) \
190190 do { \
191− asm_volatile_goto("1: " __stringify(insn) " %0\n\t" \
191+ asm goto("1: " __stringify(insn) " %0\n\t" \
192192 ".byte 0x2e\n\t" /* branch not taken hint */ \
193193 "jna %l[error]\n\t" \
194194 _ASM_EXTABLE(1b, %l[fault]) \
@@ -205,7 +205,7 @@ fault: \ · 10 unmodified lines
205205
206206 #define vmx_asm2(insn, op1, op2, error_args...) \
207207 do { \
208− asm_volatile_goto("1: " __stringify(insn) " %1, %0\n\t" \
208+ asm goto("1: " __stringify(insn) " %1, %0\n\t" \
209209 ".byte 0x2e\n\t" /* branch not taken hint */ \
210210 "jna %l[error]\n\t" \
211211 _ASM_EXTABLE(1b, %l[fault]) \
arch/x86/kvm/x86.c+7−0
@@ -1782,6 +1782,10 @@ static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 1781 unmodified lines
17821782 if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
17831783 kvm_mmu_reset_context(vcpu);
17841784
1785+ if (!static_cpu_has(X86_FEATURE_XSAVES) &&
1786+ (efer & EFER_SVME))
1787+ kvm_hv_xsaves_xsavec_maybe_warn(vcpu);
1788+
17851789 return 0;
17861790 }
17871791
@@ -7016,6 +7020,9 @@ set_identity_unlock: · 5228 unmodified lines
70167020 r = -EEXIST;
70177021 if (kvm->arch.vpit)
70187022 goto create_pit_unlock;
7023+ r = -ENOENT;
7024+ if (!pic_in_kernel(kvm))
7025+ goto create_pit_unlock;
70197026 r = -ENOMEM;
70207027 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
70217028 if (kvm->arch.vpit)
arch/x86/lib/getuser.S+12−12
@@ -163,23 +163,23 @@ SYM_CODE_END(__get_user_8_handle_exception) · 162 unmodified lines
163163 #endif
164164
165165 /* get_user */
166− _ASM_EXTABLE(1b, __get_user_handle_exception)
167− _ASM_EXTABLE(2b, __get_user_handle_exception)
168− _ASM_EXTABLE(3b, __get_user_handle_exception)
166+ _ASM_EXTABLE_UA(1b, __get_user_handle_exception)
167+ _ASM_EXTABLE_UA(2b, __get_user_handle_exception)
168+ _ASM_EXTABLE_UA(3b, __get_user_handle_exception)
169169 #ifdef CONFIG_X86_64
170− _ASM_EXTABLE(4b, __get_user_handle_exception)
170+ _ASM_EXTABLE_UA(4b, __get_user_handle_exception)
171171 #else
172− _ASM_EXTABLE(4b, __get_user_8_handle_exception)
173− _ASM_EXTABLE(5b, __get_user_8_handle_exception)
172+ _ASM_EXTABLE_UA(4b, __get_user_8_handle_exception)
173+ _ASM_EXTABLE_UA(5b, __get_user_8_handle_exception)
174174 #endif
175175
176176 /* __get_user */
177− _ASM_EXTABLE(6b, __get_user_handle_exception)
178− _ASM_EXTABLE(7b, __get_user_handle_exception)
179− _ASM_EXTABLE(8b, __get_user_handle_exception)
177+ _ASM_EXTABLE_UA(6b, __get_user_handle_exception)
178+ _ASM_EXTABLE_UA(7b, __get_user_handle_exception)
179+ _ASM_EXTABLE_UA(8b, __get_user_handle_exception)
180180 #ifdef CONFIG_X86_64
181− _ASM_EXTABLE(9b, __get_user_handle_exception)
181+ _ASM_EXTABLE_UA(9b, __get_user_handle_exception)
182182 #else
183− _ASM_EXTABLE(9b, __get_user_8_handle_exception)
184− _ASM_EXTABLE(10b, __get_user_8_handle_exception)
183+ _ASM_EXTABLE_UA(9b, __get_user_8_handle_exception)
184+ _ASM_EXTABLE_UA(10b, __get_user_8_handle_exception)
185185 #endif
arch/x86/lib/putuser.S+10−10
@@ -133,15 +133,15 @@ SYM_CODE_START_LOCAL(__put_user_handle_exception) · 132 unmodified lines
133133 RET
134134 SYM_CODE_END(__put_user_handle_exception)
135135
136− _ASM_EXTABLE(1b, __put_user_handle_exception)
137− _ASM_EXTABLE(2b, __put_user_handle_exception)
138− _ASM_EXTABLE(3b, __put_user_handle_exception)
139− _ASM_EXTABLE(4b, __put_user_handle_exception)
140− _ASM_EXTABLE(5b, __put_user_handle_exception)
141− _ASM_EXTABLE(6b, __put_user_handle_exception)
142− _ASM_EXTABLE(7b, __put_user_handle_exception)
143− _ASM_EXTABLE(9b, __put_user_handle_exception)
136+ _ASM_EXTABLE_UA(1b, __put_user_handle_exception)
137+ _ASM_EXTABLE_UA(2b, __put_user_handle_exception)
138+ _ASM_EXTABLE_UA(3b, __put_user_handle_exception)
139+ _ASM_EXTABLE_UA(4b, __put_user_handle_exception)
140+ _ASM_EXTABLE_UA(5b, __put_user_handle_exception)
141+ _ASM_EXTABLE_UA(6b, __put_user_handle_exception)
142+ _ASM_EXTABLE_UA(7b, __put_user_handle_exception)
143+ _ASM_EXTABLE_UA(9b, __put_user_handle_exception)
144144 #ifdef CONFIG_X86_32
145− _ASM_EXTABLE(8b, __put_user_handle_exception)
146− _ASM_EXTABLE(10b, __put_user_handle_exception)
145+ _ASM_EXTABLE_UA(8b, __put_user_handle_exception)
146+ _ASM_EXTABLE_UA(10b, __put_user_handle_exception)
147147 #endif
arch/xtensa/include/asm/jump_label.h+2−2
@@ -13,7 +13,7 @@ · 12 unmodified lines
1313 static __always_inline bool arch_static_branch(struct static_key *key,
1414 bool branch)
1515 {
16− asm_volatile_goto("1:\n\t"
16+ asm goto("1:\n\t"
1717 "_nop\n\t"
1818 ".pushsection __jump_table, \"aw\"\n\t"
1919 ".word 1b, %l[l_yes], %c0\n\t"
@@ -38,7 +38,7 @@ static __always_inline bool arch_static_branch_jump(struct static_key *key, · 18 unmodified lines
3838 * make it reachable and wrap both into a no-transform block
3939 * to avoid any assembler interference with this.
4040 */
41− asm_volatile_goto("1:\n\t"
41+ asm goto("1:\n\t"
4242 ".begin no-transform\n\t"
4343 "_j %l[l_yes]\n\t"
4444 "2:\n\t"
block/blk-core.c+10−0
@@ -49,6 +49,7 @@ · 48 unmodified lines
4949 #include "blk-pm.h"
5050 #include "blk-cgroup.h"
5151 #include "blk-throttle.h"
52+#include "blk-ioprio.h"
5253
5354 struct dentry *blk_debugfs_root;
5455
@@ -833,6 +834,14 @@ end_io: · 778 unmodified lines
833834 }
834835 EXPORT_SYMBOL(submit_bio_noacct);
835836
837+static void bio_set_ioprio(struct bio *bio)
838+{
839+ /* Nobody set ioprio so far? Initialize it based on task's nice value */
840+ if (IOPRIO_PRIO_CLASS(bio->bi_ioprio) == IOPRIO_CLASS_NONE)
841+ bio->bi_ioprio = get_current_ioprio();
842+ blkcg_set_ioprio(bio);
843+}
844+
836845 /**
837846 * submit_bio - submit a bio to the block device layer for I/O
838847 * @bio: The &struct bio which describes the I/O
@@ -855,6 +864,7 @@ void submit_bio(struct bio *bio) · 16 unmodified lines
855864 count_vm_events(PGPGOUT, bio_sectors(bio));
856865 }
857866
867+ bio_set_ioprio(bio);
858868 submit_bio_noacct(bio);
859869 }
860870 EXPORT_SYMBOL(submit_bio);
block/blk-iocost.c+7−0
@@ -1353,6 +1353,13 @@ static bool iocg_kick_delay(struct ioc_gq *iocg, struct ioc_now *now) · 1352 unmodified lines
13531353
13541354 lockdep_assert_held(&iocg->waitq.lock);
13551355
1356+ /*
1357+ * If the delay is set by another CPU, we may be in the past. No need to
1358+ * change anything if so. This avoids decay calculation underflow.
1359+ */
1360+ if (time_before64(now->now, iocg->delay_at))
1361+ return false;
1362+
13561363 /* calculate the current delay in effect - 1/2 every second */
13571364 tdelta = now->now - iocg->delay_at;
13581365 if (iocg->delay)
block/blk-map.c+10−3
@@ -205,12 +205,19 @@ static int bio_copy_user_iov(struct request *rq, struct rq_map_data *map_data, · 204 unmodified lines
205205 /*
206206 * success
207207 */
208− if ((iov_iter_rw(iter) == WRITE &&
209− (!map_data || !map_data->null_mapped)) ||
210− (map_data && map_data->from_user)) {
208+ if (iov_iter_rw(iter) == WRITE &&
209+ (!map_data || !map_data->null_mapped)) {
211210 ret = bio_copy_from_iter(bio, iter);
212211 if (ret)
213212 goto cleanup;
213+ } else if (map_data && map_data->from_user) {
214+ struct iov_iter iter2 = *iter;
215+
216+ /* This is the copy-in part of SG_DXFER_TO_FROM_DEV. */
217+ iter2.data_source = ITER_SOURCE;
218+ ret = bio_copy_from_iter(bio, &iter2);
219+ if (ret)
220+ goto cleanup;
214221 } else {
215222 if (bmd->is_our_pages)
216223 zero_fill_bio(bio);
block/blk-mq.c+0−10
@@ -40,7 +40,6 @@ · 39 unmodified lines
4040 #include "blk-stat.h"
4141 #include "blk-mq-sched.h"
4242 #include "blk-rq-qos.h"
43−#include "blk-ioprio.h"
4443
4544 static DEFINE_PER_CPU(struct llist_head, blk_cpu_done);
4645 static DEFINE_PER_CPU(call_single_data_t, blk_cpu_csd);
@@ -2944,14 +2943,6 @@ static bool blk_mq_use_cached_rq(struct request *rq, struct blk_plug *plug, · 2897 unmodified lines
29442943 return true;
29452944 }
29462945
2947−static void bio_set_ioprio(struct bio *bio)
2948−{
2949− /* Nobody set ioprio so far? Initialize it based on task's nice value */
2950− if (IOPRIO_PRIO_CLASS(bio->bi_ioprio) == IOPRIO_CLASS_NONE)
2951− bio->bi_ioprio = get_current_ioprio();
2952− blkcg_set_ioprio(bio);
2953−}
2954−
29552946 /**
29562947 * blk_mq_submit_bio - Create and send a request to block device.
29572948 * @bio: Bio pointer.
@@ -2976,7 +2967,6 @@ void blk_mq_submit_bio(struct bio *bio) · 18 unmodified lines
29762967 blk_status_t ret;
29772968
29782969 bio = blk_queue_bounce(bio, q);
2979− bio_set_ioprio(bio);
29802970
29812971 if (plug) {
29822972 rq = rq_list_peek(&plug->cached_rq);
block/blk-wbt.c+2−2
@@ -163,9 +163,9 @@ static void wb_timestamp(struct rq_wb *rwb, unsigned long *var) · 162 unmodified lines
163163 */
164164 static bool wb_recent_wait(struct rq_wb *rwb)
165165 {
166− struct bdi_writeback *wb = &rwb->rqos.disk->bdi->wb;
166+ struct backing_dev_info *bdi = rwb->rqos.disk->bdi;
167167
168− return time_before(jiffies, wb->dirty_sleep + HZ);
168+ return time_before(jiffies, bdi->last_bdp_sleep + HZ);
169169 }
170170
171171 static inline struct rq_wait *get_rq_wait(struct rq_wb *rwb,
block/ioctl.c+0−2
@@ -20,8 +20,6 @@ static int blkpg_do_ioctl(struct block_device *bdev, · 19 unmodified lines
2020 struct blkpg_partition p;
2121 sector_t start, length;
2222
23− if (disk->flags & GENHD_FL_NO_PART)
24− return -EINVAL;
2523 if (!capable(CAP_SYS_ADMIN))
2624 return -EACCES;
2725 if (copy_from_user(&p, upart, sizeof(struct blkpg_partition)))
block/partitions/core.c+5−0
@@ -439,6 +439,11 @@ int bdev_add_partition(struct gendisk *disk, int partno, sector_t start, · 438 unmodified lines
439439 goto out;
440440 }
441441
442+ if (disk->flags & GENHD_FL_NO_PART) {
443+ ret = -EINVAL;
444+ goto out;
445+ }
446+
442447 if (partition_overlaps(disk, start, length, -1)) {
443448 ret = -EBUSY;
444449 goto out;
crypto/algif_hash.c+3−2
@@ -91,13 +91,13 @@ static int hash_sendmsg(struct socket *sock, struct msghdr *msg, · 90 unmodified lines
9191 if (!(msg->msg_flags & MSG_MORE)) {
9292 err = hash_alloc_result(sk, ctx);
9393 if (err)
94− goto unlock_free;
94+ goto unlock_free_result;
9595 ahash_request_set_crypt(&ctx->req, NULL,
9696 ctx->result, 0);
9797 err = crypto_wait_req(crypto_ahash_final(&ctx->req),
9898 &ctx->wait);
9999 if (err)
100− goto unlock_free;
100+ goto unlock_free_result;
101101 }
102102 goto done_more;
103103 }
@@ -170,6 +170,7 @@ unlock: · 66 unmodified lines
170170
171171 unlock_free:
172172 af_alg_free_sg(&ctx->sgl);
173+unlock_free_result:
173174 hash_free_result(sk, ctx);
174175 ctx->more = false;
175176 goto unlock;
crypto/cbc.c+3−0
@@ -148,6 +148,9 @@ static int crypto_cbc_create(struct crypto_template *tmpl, struct rtattr **tb) · 147 unmodified lines
148148 if (!is_power_of_2(inst->alg.co.base.cra_blocksize))
149149 goto out_free_inst;
150150
151+ if (inst->alg.co.statesize)
152+ goto out_free_inst;
153+
151154 inst->alg.encrypt = crypto_cbc_encrypt;
152155 inst->alg.decrypt = crypto_cbc_decrypt;
153156
drivers/accel/ivpu/ivpu_debugfs.c+16−4
@@ -102,7 +102,7 @@ static int reset_pending_show(struct seq_file *s, void *v) · 101 unmodified lines
102102 {
103103 struct ivpu_device *vdev = seq_to_ivpu(s);
104104
105− seq_printf(s, "%d\n", atomic_read(&vdev->pm->in_reset));
105+ seq_printf(s, "%d\n", atomic_read(&vdev->pm->reset_pending));
106106 return 0;
107107 }
108108
@@ -130,7 +130,9 @@ dvfs_mode_fops_write(struct file *file, const char __user *user_buf, size_t size · 21 unmodified lines
130130
131131 fw->dvfs_mode = dvfs_mode;
132132
133− ivpu_pm_schedule_recovery(vdev);
133+ ret = pci_try_reset_function(to_pci_dev(vdev->drm.dev));
134+ if (ret)
135+ return ret;
134136
135137 return size;
136138 }
@@ -190,7 +192,10 @@ fw_profiling_freq_fops_write(struct file *file, const char __user *user_buf, · 53 unmodified lines
190192 return ret;
191193
192194 ivpu_hw_profiling_freq_drive(vdev, enable);
193− ivpu_pm_schedule_recovery(vdev);
195+
196+ ret = pci_try_reset_function(to_pci_dev(vdev->drm.dev));
197+ if (ret)
198+ return ret;
194199
195200 return size;
196201 }
@@ -301,11 +306,18 @@ static ssize_t · 104 unmodified lines
301306 ivpu_force_recovery_fn(struct file *file, const char __user *user_buf, size_t size, loff_t *pos)
302307 {
303308 struct ivpu_device *vdev = file->private_data;
309+ int ret;
304310
305311 if (!size)
306312 return -EINVAL;
307313
308− ivpu_pm_schedule_recovery(vdev);
314+ ret = ivpu_rpm_get(vdev);
315+ if (ret)
316+ return ret;
317+
318+ ivpu_pm_trigger_recovery(vdev, "debugfs");
319+ flush_work(&vdev->pm->recovery_work);
320+ ivpu_rpm_put(vdev);
309321 return size;
310322 }
311323
drivers/accel/ivpu/ivpu_drv.c+73−58
@@ -6,6 +6,7 @@ · 5 unmodified lines
66 #include <linux/firmware.h>
77 #include <linux/module.h>
88 #include <linux/pci.h>
9+#include <linux/pm_runtime.h>
910
1011 #include <drm/drm_accel.h>
1112 #include <drm/drm_file.h>
@@ -17,6 +18,7 @@ · 5 unmodified lines
1718 #include "ivpu_debugfs.h"
1819 #include "ivpu_drv.h"
1920 #include "ivpu_fw.h"
21+#include "ivpu_fw_log.h"
2022 #include "ivpu_gem.h"
2123 #include "ivpu_hw.h"
2224 #include "ivpu_ipc.h"
@@ -65,22 +67,20 @@ struct ivpu_file_priv *ivpu_file_priv_get(struct ivpu_file_priv *file_priv) · 42 unmodified lines
6567 return file_priv;
6668 }
6769
68−struct ivpu_file_priv *ivpu_file_priv_get_by_ctx_id(struct ivpu_device *vdev, unsigned long id)
70+static void file_priv_unbind(struct ivpu_device *vdev, struct ivpu_file_priv *file_priv)
6971 {
70− struct ivpu_file_priv *file_priv;
71−
72− xa_lock_irq(&vdev->context_xa);
73− file_priv = xa_load(&vdev->context_xa, id);
74− /* file_priv may still be in context_xa during file_priv_release() */
75− if (file_priv && !kref_get_unless_zero(&file_priv->ref))
76− file_priv = NULL;
77− xa_unlock_irq(&vdev->context_xa);
78−
79− if (file_priv)
80− ivpu_dbg(vdev, KREF, "file_priv get by id: ctx %u refcount %u\n",
81− file_priv->ctx.id, kref_read(&file_priv->ref));
82−
83− return file_priv;
72+ mutex_lock(&file_priv->lock);
73+ if (file_priv->bound) {
74+ ivpu_dbg(vdev, FILE, "file_priv unbind: ctx %u\n", file_priv->ctx.id);
75+
76+ ivpu_cmdq_release_all_locked(file_priv);
77+ ivpu_jsm_context_release(vdev, file_priv->ctx.id);
78+ ivpu_bo_unbind_all_bos_from_context(vdev, &file_priv->ctx);
79+ ivpu_mmu_user_context_fini(vdev, &file_priv->ctx);
80+ file_priv->bound = false;
81+ drm_WARN_ON(&vdev->drm, !xa_erase_irq(&vdev->context_xa, file_priv->ctx.id));
82+ }
83+ mutex_unlock(&file_priv->lock);
8484 }
8585
8686 static void file_priv_release(struct kref *ref)
@@ -88,13 +88,15 @@ static void file_priv_release(struct kref *ref) · 1 unmodified line
8888 struct ivpu_file_priv *file_priv = container_of(ref, struct ivpu_file_priv, ref);
8989 struct ivpu_device *vdev = file_priv->vdev;
9090
91− ivpu_dbg(vdev, FILE, "file_priv release: ctx %u\n", file_priv->ctx.id);
91+ ivpu_dbg(vdev, FILE, "file_priv release: ctx %u bound %d\n",
92+ file_priv->ctx.id, (bool)file_priv->bound);
93+
94+ pm_runtime_get_sync(vdev->drm.dev);
95+ mutex_lock(&vdev->context_list_lock);
96+ file_priv_unbind(vdev, file_priv);
97+ mutex_unlock(&vdev->context_list_lock);
98+ pm_runtime_put_autosuspend(vdev->drm.dev);
9299
93− ivpu_cmdq_release_all(file_priv);
94− ivpu_jsm_context_release(vdev, file_priv->ctx.id);
95− ivpu_bo_remove_all_bos_from_context(vdev, &file_priv->ctx);
96− ivpu_mmu_user_context_fini(vdev, &file_priv->ctx);
97− drm_WARN_ON(&vdev->drm, xa_erase_irq(&vdev->context_xa, file_priv->ctx.id) != file_priv);
98100 mutex_destroy(&file_priv->lock);
99101 kfree(file_priv);
100102 }
@@ -176,9 +178,6 @@ static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_f · 75 unmodified lines
176178 case DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS:
177179 args->value = vdev->hw->ranges.user.start;
178180 break;
179− case DRM_IVPU_PARAM_CONTEXT_PRIORITY:
180− args->value = file_priv->priority;
181− break;
182181 case DRM_IVPU_PARAM_CONTEXT_ID:
183182 args->value = file_priv->ctx.id;
184183 break;
@@ -218,17 +217,10 @@ static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_f · 33 unmodified lines
218217
219218 static int ivpu_set_param_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
220219 {
221− struct ivpu_file_priv *file_priv = file->driver_priv;
222220 struct drm_ivpu_param *args = data;
223221 int ret = 0;
224222
225223 switch (args->param) {
226− case DRM_IVPU_PARAM_CONTEXT_PRIORITY:
227− if (args->value <= DRM_IVPU_CONTEXT_PRIORITY_REALTIME)
228− file_priv->priority = args->value;
229− else
230− ret = -EINVAL;
231− break;
232224 default:
233225 ret = -EINVAL;
234226 }
@@ -241,50 +233,53 @@ static int ivpu_open(struct drm_device *dev, struct drm_file *file) · 6 unmodified lines
241233 struct ivpu_device *vdev = to_ivpu_device(dev);
242234 struct ivpu_file_priv *file_priv;
243235 u32 ctx_id;
244− void *old;
245− int ret;
236+ int idx, ret;
246237
247− ret = xa_alloc_irq(&vdev->context_xa, &ctx_id, NULL, vdev->context_xa_limit, GFP_KERNEL);
248− if (ret) {
249− ivpu_err(vdev, "Failed to allocate context id: %d\n", ret);
250− return ret;
251− }
238+ if (!drm_dev_enter(dev, &idx))
239+ return -ENODEV;
252240
253241 file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
254242 if (!file_priv) {
255243 ret = -ENOMEM;
256− goto err_xa_erase;
244+ goto err_dev_exit;
257245 }
258246
259247 file_priv->vdev = vdev;
260− file_priv->priority = DRM_IVPU_CONTEXT_PRIORITY_NORMAL;
248+ file_priv->bound = true;
261249 kref_init(&file_priv->ref);
262250 mutex_init(&file_priv->lock);
263251
252+ mutex_lock(&vdev->context_list_lock);
253+
254+ ret = xa_alloc_irq(&vdev->context_xa, &ctx_id, file_priv,
255+ vdev->context_xa_limit, GFP_KERNEL);
256+ if (ret) {
257+ ivpu_err(vdev, "Failed to allocate context id: %d\n", ret);
258+ goto err_unlock;
259+ }
260+
264261 ret = ivpu_mmu_user_context_init(vdev, &file_priv->ctx, ctx_id);
265262 if (ret)
266− goto err_mutex_destroy;
263+ goto err_xa_erase;
267264
268− old = xa_store_irq(&vdev->context_xa, ctx_id, file_priv, GFP_KERNEL);
269− if (xa_is_err(old)) {
270− ret = xa_err(old);
271− ivpu_err(vdev, "Failed to store context %u: %d\n", ctx_id, ret);
272− goto err_ctx_fini;
273− }
265+ mutex_unlock(&vdev->context_list_lock);
266+ drm_dev_exit(idx);
267+
268+ file->driver_priv = file_priv;
274269
275270 ivpu_dbg(vdev, FILE, "file_priv create: ctx %u process %s pid %d\n",
276271 ctx_id, current->comm, task_pid_nr(current));
277272
278− file->driver_priv = file_priv;
279273 return 0;
280274
281−err_ctx_fini:
282− ivpu_mmu_user_context_fini(vdev, &file_priv->ctx);
283−err_mutex_destroy:
284− mutex_destroy(&file_priv->lock);
285− kfree(file_priv);
286275 err_xa_erase:
287276 xa_erase_irq(&vdev->context_xa, ctx_id);
277+err_unlock:
278+ mutex_unlock(&vdev->context_list_lock);
279+ mutex_destroy(&file_priv->lock);
280+ kfree(file_priv);
281+err_dev_exit:
282+ drm_dev_exit(idx);
288283 return ret;
289284 }
290285
@@ -340,8 +335,6 @@ static int ivpu_wait_for_ready(struct ivpu_device *vdev) · 49 unmodified lines
340335
341336 if (!ret)
342337 ivpu_dbg(vdev, PM, "VPU ready message received successfully\n");
343− else
344− ivpu_hw_diagnose_failure(vdev);
345338
346339 return ret;
347340 }
@@ -369,6 +362,9 @@ int ivpu_boot(struct ivpu_device *vdev) · 21 unmodified lines
369362 ret = ivpu_wait_for_ready(vdev);
370363 if (ret) {
371364 ivpu_err(vdev, "Failed to boot the firmware: %d\n", ret);
365+ ivpu_hw_diagnose_failure(vdev);
366+ ivpu_mmu_evtq_dump(vdev);
367+ ivpu_fw_log_dump(vdev);
372368 return ret;
373369 }
374370
@@ -484,9 +480,8 @@ static int ivpu_pci_init(struct ivpu_device *vdev) · 109 unmodified lines
484480 /* Clear any pending errors */
485481 pcie_capability_clear_word(pdev, PCI_EXP_DEVSTA, 0x3f);
486482
487− /* VPU 37XX does not require 10m D3hot delay */
488− if (ivpu_hw_gen(vdev) == IVPU_HW_37XX)
489− pdev->d3hot_delay = 0;
483+ /* NPU does not require 10m D3hot delay */
484+ pdev->d3hot_delay = 0;
490485
491486 ret = pcim_enable_device(pdev);
492487 if (ret) {
@@ -540,6 +535,10 @@ static int ivpu_dev_init(struct ivpu_device *vdev) · 47 unmodified lines
540535 lockdep_set_class(&vdev->submitted_jobs_xa.xa_lock, &submitted_jobs_xa_lock_class_key);
541536 INIT_LIST_HEAD(&vdev->bo_list);
542537
538+ ret = drmm_mutex_init(&vdev->drm, &vdev->context_list_lock);
539+ if (ret)
540+ goto err_xa_destroy;
541+
543542 ret = drmm_mutex_init(&vdev->drm, &vdev->bo_list_lock);
544543 if (ret)
545544 goto err_xa_destroy;
@@ -611,14 +610,30 @@ err_xa_destroy: · 65 unmodified lines
611610 return ret;
612611 }
613612
613+static void ivpu_bo_unbind_all_user_contexts(struct ivpu_device *vdev)
614+{
615+ struct ivpu_file_priv *file_priv;
616+ unsigned long ctx_id;
617+
618+ mutex_lock(&vdev->context_list_lock);
619+
620+ xa_for_each(&vdev->context_xa, ctx_id, file_priv)
621+ file_priv_unbind(vdev, file_priv);
622+
623+ mutex_unlock(&vdev->context_list_lock);
624+}
625+
614626 static void ivpu_dev_fini(struct ivpu_device *vdev)
615627 {
616628 ivpu_pm_disable(vdev);
617629 ivpu_shutdown(vdev);
618630 if (IVPU_WA(d3hot_after_power_off))
619631 pci_set_power_state(to_pci_dev(vdev->drm.dev), PCI_D3hot);
632+
633+ ivpu_jobs_abort_all(vdev);
620634 ivpu_job_done_consumer_fini(vdev);
621635 ivpu_pm_cancel_recovery(vdev);
636+ ivpu_bo_unbind_all_user_contexts(vdev);
622637
623638 ivpu_ipc_fini(vdev);
624639 ivpu_fw_fini(vdev);
drivers/accel/ivpu/ivpu_drv.h+3−2
@@ -56,6 +56,7 @@ · 55 unmodified lines
5656 #define IVPU_DBG_JSM BIT(10)
5757 #define IVPU_DBG_KREF BIT(11)
5858 #define IVPU_DBG_RPM BIT(12)
59+#define IVPU_DBG_MMU_MAP BIT(13)
5960
6061 #define ivpu_err(vdev, fmt, ...) \
6162 drm_err(&(vdev)->drm, "%s(): " fmt, __func__, ##__VA_ARGS__)
@@ -114,6 +115,7 @@ struct ivpu_device { · 52 unmodified lines
114115
115116 struct ivpu_mmu_context gctx;
116117 struct ivpu_mmu_context rctx;
118+ struct mutex context_list_lock; /* Protects user context addition/removal */
117119 struct xarray context_xa;
118120 struct xa_limit context_xa_limit;
119121
@@ -145,8 +147,8 @@ struct ivpu_file_priv { · 25 unmodified lines
145147 struct mutex lock; /* Protects cmdq */
146148 struct ivpu_cmdq *cmdq[IVPU_NUM_ENGINES];
147149 struct ivpu_mmu_context ctx;
148− u32 priority;
149150 bool has_mmu_faults;
151+ bool bound;
150152 };
151153
152154 extern int ivpu_dbg_mask;
@@ -162,7 +164,6 @@ extern bool ivpu_disable_mmu_cont_pages; · 9 unmodified lines
162164 extern int ivpu_test_mode;
163165
164166 struct ivpu_file_priv *ivpu_file_priv_get(struct ivpu_file_priv *file_priv);
165−struct ivpu_file_priv *ivpu_file_priv_get_by_ctx_id(struct ivpu_device *vdev, unsigned long id);
166167 void ivpu_file_priv_put(struct ivpu_file_priv **link);
167168
168169 int ivpu_boot(struct ivpu_device *vdev);
drivers/accel/ivpu/ivpu_fw.c+0−1
@@ -222,7 +222,6 @@ ivpu_fw_init_wa(struct ivpu_device *vdev) · 221 unmodified lines
222222 const struct vpu_firmware_header *fw_hdr = (const void *)vdev->fw->file->data;
223223
224224 if (IVPU_FW_CHECK_API_VER_LT(vdev, fw_hdr, BOOT, 3, 17) ||
225− (ivpu_hw_gen(vdev) > IVPU_HW_37XX) ||
226225 (ivpu_test_mode & IVPU_TEST_MODE_D0I3_MSG_DISABLE))
227226 vdev->wa.disable_d0i3_msg = true;
228227
drivers/accel/ivpu/ivpu_gem.c+52−90
@@ -24,14 +24,11 @@ static const struct drm_gem_object_funcs ivpu_gem_funcs; · 23 unmodified lines
2424
2525 static inline void ivpu_dbg_bo(struct ivpu_device *vdev, struct ivpu_bo *bo, const char *action)
2626 {
27− if (bo->ctx)
28− ivpu_dbg(vdev, BO, "%6s: size %zu has_pages %d dma_mapped %d handle %u ctx %d vpu_addr 0x%llx mmu_mapped %d\n",
29− action, ivpu_bo_size(bo), (bool)bo->base.pages, (bool)bo->base.sgt,
30− bo->handle, bo->ctx->id, bo->vpu_addr, bo->mmu_mapped);
31− else
32− ivpu_dbg(vdev, BO, "%6s: size %zu has_pages %d dma_mapped %d handle %u (not added to context)\n",
33− action, ivpu_bo_size(bo), (bool)bo->base.pages, (bool)bo->base.sgt,
34− bo->handle);
27+ ivpu_dbg(vdev, BO,
28+ "%6s: bo %8p vpu_addr %9llx size %8zu ctx %d has_pages %d dma_mapped %d mmu_mapped %d wc %d imported %d\n",
29+ action, bo, bo->vpu_addr, ivpu_bo_size(bo), bo->ctx ? bo->ctx->id : 0,
30+ (bool)bo->base.pages, (bool)bo->base.sgt, bo->mmu_mapped, bo->base.map_wc,
31+ (bool)bo->base.base.import_attach);
3532 }
3633
3734 /*
@@ -49,12 +46,7 @@ int __must_check ivpu_bo_pin(struct ivpu_bo *bo) · 11 unmodified lines
4946 mutex_lock(&bo->lock);
5047
5148 ivpu_dbg_bo(vdev, bo, "pin");
52−
53− if (!bo->ctx) {
54− ivpu_err(vdev, "vpu_addr not allocated for BO %d\n", bo->handle);
55− ret = -EINVAL;
56− goto unlock;
57− }
49+ drm_WARN_ON(&vdev->drm, !bo->ctx);
5850
5951 if (!bo->mmu_mapped) {
6052 struct sg_table *sgt = drm_gem_shmem_get_pages_sgt(&bo->base);
@@ -85,7 +77,10 @@ ivpu_bo_alloc_vpu_addr(struct ivpu_bo *bo, struct ivpu_mmu_context *ctx, · 24 unmodified lines
8577 const struct ivpu_addr_range *range)
8678 {
8779 struct ivpu_device *vdev = ivpu_bo_to_vdev(bo);
88− int ret;
80+ int idx, ret;
81+
82+ if (!drm_dev_enter(&vdev->drm, &idx))
83+ return -ENODEV;
8984
9085 mutex_lock(&bo->lock);
9186
@@ -101,6 +96,8 @@ ivpu_bo_alloc_vpu_addr(struct ivpu_bo *bo, struct ivpu_mmu_context *ctx, · 9 unmodified lines
10196
10297 mutex_unlock(&bo->lock);
10398
99+ drm_dev_exit(idx);
100+
104101 return ret;
105102 }
106103
@@ -108,11 +105,7 @@ static void ivpu_bo_unbind_locked(struct ivpu_bo *bo) · 1 unmodified line
108105 {
109106 struct ivpu_device *vdev = ivpu_bo_to_vdev(bo);
110107
111− lockdep_assert_held(&bo->lock);
112−
113− ivpu_dbg_bo(vdev, bo, "unbind");
114−
115− /* TODO: dma_unmap */
108+ lockdep_assert(lockdep_is_held(&bo->lock) || !kref_read(&bo->base.base.refcount));
116109
117110 if (bo->mmu_mapped) {
118111 drm_WARN_ON(&vdev->drm, !bo->ctx);
@@ -124,19 +117,23 @@ static void ivpu_bo_unbind_locked(struct ivpu_bo *bo) · 5 unmodified lines
124117
125118 if (bo->ctx) {
126119 ivpu_mmu_context_remove_node(bo->ctx, &bo->mm_node);
127− bo->vpu_addr = 0;
128120 bo->ctx = NULL;
129121 }
130−}
131122
132−static void ivpu_bo_unbind(struct ivpu_bo *bo)
133−{
134− mutex_lock(&bo->lock);
135− ivpu_bo_unbind_locked(bo);
136− mutex_unlock(&bo->lock);
123+ if (bo->base.base.import_attach)
124+ return;
125+
126+ dma_resv_lock(bo->base.base.resv, NULL);
127+ if (bo->base.sgt) {
128+ dma_unmap_sgtable(vdev->drm.dev, bo->base.sgt, DMA_BIDIRECTIONAL, 0);
129+ sg_free_table(bo->base.sgt);
130+ kfree(bo->base.sgt);
131+ bo->base.sgt = NULL;
132+ }
133+ dma_resv_unlock(bo->base.base.resv);
137134 }
138135
139−void ivpu_bo_remove_all_bos_from_context(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx)
136+void ivpu_bo_unbind_all_bos_from_context(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx)
140137 {
141138 struct ivpu_bo *bo;
142139
@@ -146,8 +143,10 @@ void ivpu_bo_remove_all_bos_from_context(struct ivpu_device *vdev, struct ivpu_m · 3 unmodified lines
146143 mutex_lock(&vdev->bo_list_lock);
147144 list_for_each_entry(bo, &vdev->bo_list, bo_list_node) {
148145 mutex_lock(&bo->lock);
149− if (bo->ctx == ctx)
146+ if (bo->ctx == ctx) {
147+ ivpu_dbg_bo(vdev, bo, "unbind");
150148 ivpu_bo_unbind_locked(bo);
149+ }
151150 mutex_unlock(&bo->lock);
152151 }
153152 mutex_unlock(&vdev->bo_list_lock);
@@ -199,9 +198,6 @@ ivpu_bo_create(struct ivpu_device *vdev, u64 size, u32 flags) · 45 unmodified lines
199198 list_add_tail(&bo->bo_list_node, &vdev->bo_list);
200199 mutex_unlock(&vdev->bo_list_lock);
201200
202− ivpu_dbg(vdev, BO, "create: vpu_addr 0x%llx size %zu flags 0x%x\n",
203− bo->vpu_addr, bo->base.base.size, flags);
204−
205201 return bo;
206202 }
207203
@@ -212,6 +208,12 @@ static int ivpu_bo_open(struct drm_gem_object *obj, struct drm_file *file) · 4 unmodified lines
212208 struct ivpu_bo *bo = to_ivpu_bo(obj);
213209 struct ivpu_addr_range *range;
214210
211+ if (bo->ctx) {
212+ ivpu_warn(vdev, "Can't add BO to ctx %u: already in ctx %u\n",
213+ file_priv->ctx.id, bo->ctx->id);
214+ return -EALREADY;
215+ }
216+
215217 if (bo->flags & DRM_IVPU_BO_SHAVE_MEM)
216218 range = &vdev->hw->ranges.shave;
217219 else if (bo->flags & DRM_IVPU_BO_DMA_MEM)
@@ -227,62 +229,24 @@ static void ivpu_bo_free(struct drm_gem_object *obj) · 9 unmodified lines
227229 struct ivpu_device *vdev = to_ivpu_device(obj->dev);
228230 struct ivpu_bo *bo = to_ivpu_bo(obj);
229231
232+ ivpu_dbg_bo(vdev, bo, "free");
233+
230234 mutex_lock(&vdev->bo_list_lock);
231235 list_del(&bo->bo_list_node);
232236 mutex_unlock(&vdev->bo_list_lock);
233237
234238 drm_WARN_ON(&vdev->drm, !dma_resv_test_signaled(obj->resv, DMA_RESV_USAGE_READ));
235239
236− ivpu_dbg_bo(vdev, bo, "free");
237−
238− ivpu_bo_unbind(bo);
240+ ivpu_bo_unbind_locked(bo);
239241 mutex_destroy(&bo->lock);
240242
241243 drm_WARN_ON(obj->dev, bo->base.pages_use_count > 1);
242244 drm_gem_shmem_free(&bo->base);
243245 }
244246
245−static const struct dma_buf_ops ivpu_bo_dmabuf_ops = {
246− .cache_sgt_mapping = true,
247− .attach = drm_gem_map_attach,
248− .detach = drm_gem_map_detach,
249− .map_dma_buf = drm_gem_map_dma_buf,
250− .unmap_dma_buf = drm_gem_unmap_dma_buf,
251− .release = drm_gem_dmabuf_release,
252− .mmap = drm_gem_dmabuf_mmap,
253− .vmap = drm_gem_dmabuf_vmap,
254− .vunmap = drm_gem_dmabuf_vunmap,
255−};
256−
257−static struct dma_buf *ivpu_bo_export(struct drm_gem_object *obj, int flags)
258−{
259− struct drm_device *dev = obj->dev;
260− struct dma_buf_export_info exp_info = {
261− .exp_name = KBUILD_MODNAME,
262− .owner = dev->driver->fops->owner,
263− .ops = &ivpu_bo_dmabuf_ops,
264− .size = obj->size,
265− .flags = flags,
266− .priv = obj,
267− .resv = obj->resv,
268− };
269− void *sgt;
270−
271− /*
272− * Make sure that pages are allocated and dma-mapped before exporting the bo.
273− * DMA-mapping is required if the bo will be imported to the same device.
274− */
275− sgt = drm_gem_shmem_get_pages_sgt(to_drm_gem_shmem_obj(obj));
276− if (IS_ERR(sgt))
277− return sgt;
278−
279− return drm_gem_dmabuf_export(dev, &exp_info);
280−}
281−
282247 static const struct drm_gem_object_funcs ivpu_gem_funcs = {
283248 .free = ivpu_bo_free,
284249 .open = ivpu_bo_open,
285− .export = ivpu_bo_export,
286250 .print_info = drm_gem_shmem_object_print_info,
287251 .pin = drm_gem_shmem_object_pin,
288252 .unpin = drm_gem_shmem_object_unpin,
@@ -315,11 +279,9 @@ int ivpu_bo_create_ioctl(struct drm_device *dev, void *data, struct drm_file *fi · 26 unmodified lines
315279 return PTR_ERR(bo);
316280 }
317281
318− ret = drm_gem_handle_create(file, &bo->base.base, &bo->handle);
319− if (!ret) {
282+ ret = drm_gem_handle_create(file, &bo->base.base, &args->handle);
283+ if (!ret)
320284 args->vpu_addr = bo->vpu_addr;
321− args->handle = bo->handle;
322− }
323285
324286 drm_gem_object_put(&bo->base.base);
325287
@@ -361,7 +323,9 @@ ivpu_bo_alloc_internal(struct ivpu_device *vdev, u64 vpu_addr, u64 size, u32 fla · 35 unmodified lines
361323 if (ret)
362324 goto err_put;
363325
326+ dma_resv_lock(bo->base.base.resv, NULL);
364327 ret = drm_gem_shmem_vmap(&bo->base, &map);
328+ dma_resv_unlock(bo->base.base.resv);
365329 if (ret)
366330 goto err_put;
367331
@@ -376,7 +340,10 @@ void ivpu_bo_free_internal(struct ivpu_bo *bo) · 8 unmodified lines
376340 {
377341 struct iosys_map map = IOSYS_MAP_INIT_VADDR(bo->base.vaddr);
378342
343+ dma_resv_lock(bo->base.base.resv, NULL);
379344 drm_gem_shmem_vunmap(&bo->base, &map);
345+ dma_resv_unlock(bo->base.base.resv);
346+
380347 drm_gem_object_put(&bo->base.base);
381348 }
382349
@@ -432,19 +399,11 @@ int ivpu_bo_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file · 49 unmodified lines
432399
433400 static void ivpu_bo_print_info(struct ivpu_bo *bo, struct drm_printer *p)
434401 {
435− unsigned long dma_refcount = 0;
436−
437402 mutex_lock(&bo->lock);
438403
439− if (bo->base.base.dma_buf && bo->base.base.dma_buf->file)
440− dma_refcount = atomic_long_read(&bo->base.base.dma_buf->file->f_count);
441−
442− drm_printf(p, "%-3u %-6d 0x%-12llx %-10lu 0x%-8x %-4u %-8lu",
443− bo->ctx->id, bo->handle, bo->vpu_addr, bo->base.base.size,
444− bo->flags, kref_read(&bo->base.base.refcount), dma_refcount);
445−
446− if (bo->base.base.import_attach)
447− drm_printf(p, " imported");
404+ drm_printf(p, "%-9p %-3u 0x%-12llx %-10lu 0x%-8x %-4u",
405+ bo, bo->ctx->id, bo->vpu_addr, bo->base.base.size,
406+ bo->flags, kref_read(&bo->base.base.refcount));
448407
449408 if (bo->base.pages)
450409 drm_printf(p, " has_pages");
@@ -452,6 +411,9 @@ static void ivpu_bo_print_info(struct ivpu_bo *bo, struct drm_printer *p) · 1 unmodified line
452411 if (bo->mmu_mapped)
453412 drm_printf(p, " mmu_mapped");
454413
414+ if (bo->base.base.import_attach)
415+ drm_printf(p, " imported");
416+
455417 drm_printf(p, "\n");
456418
457419 mutex_unlock(&bo->lock);
@@ -462,8 +424,8 @@ void ivpu_bo_list(struct drm_device *dev, struct drm_printer *p) · 4 unmodified lines
462424 struct ivpu_device *vdev = to_ivpu_device(dev);
463425 struct ivpu_bo *bo;
464426
465− drm_printf(p, "%-3s %-6s %-14s %-10s %-10s %-4s %-8s %s\n",
466− "ctx", "handle", "vpu_addr", "size", "flags", "refs", "dma_refs", "attribs");
427+ drm_printf(p, "%-9s %-3s %-14s %-10s %-10s %-4s %s\n",
428+ "bo", "ctx", "vpu_addr", "size", "flags", "refs", "attribs");
467429
468430 mutex_lock(&vdev->bo_list_lock);
469431 list_for_each_entry(bo, &vdev->bo_list, bo_list_node)
drivers/accel/ivpu/ivpu_gem.h+1−2
@@ -19,14 +19,13 @@ struct ivpu_bo { · 18 unmodified lines
1919
2020 struct mutex lock; /* Protects: ctx, mmu_mapped, vpu_addr */
2121 u64 vpu_addr;
22− u32 handle;
2322 u32 flags;
2423 u32 job_status; /* Valid only for command buffer */
2524 bool mmu_mapped;
2625 };
2726
2827 int ivpu_bo_pin(struct ivpu_bo *bo);
29−void ivpu_bo_remove_all_bos_from_context(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx);
28+void ivpu_bo_unbind_all_bos_from_context(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx);
3029
3130 struct drm_gem_object *ivpu_gem_create_object(struct drm_device *dev, size_t size);
3231 struct ivpu_bo *ivpu_bo_alloc_internal(struct ivpu_device *vdev, u64 vpu_addr, u64 size, u32 flags);
drivers/accel/ivpu/ivpu_hw_37xx.c+5−11
@@ -525,7 +525,7 @@ static void ivpu_boot_no_snoop_enable(struct ivpu_device *vdev) · 524 unmodified lines
525525 u32 val = REGV_RD32(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES);
526526
527527 val = REG_SET_FLD(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, NOSNOOP_OVERRIDE_EN, val);
528− val = REG_SET_FLD(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, AW_NOSNOOP_OVERRIDE, val);
528+ val = REG_CLR_FLD(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, AW_NOSNOOP_OVERRIDE, val);
529529 val = REG_SET_FLD(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, AR_NOSNOOP_OVERRIDE, val);
530530
531531 REGV_WR32(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, val);
@@ -875,24 +875,18 @@ static void ivpu_hw_37xx_irq_disable(struct ivpu_device *vdev) · 343 unmodified lines
875875
876876 static void ivpu_hw_37xx_irq_wdt_nce_handler(struct ivpu_device *vdev)
877877 {
878− ivpu_err_ratelimited(vdev, "WDT NCE irq\n");
879−
880− ivpu_pm_schedule_recovery(vdev);
878+ ivpu_pm_trigger_recovery(vdev, "WDT NCE IRQ");
881879 }
882880
883881 static void ivpu_hw_37xx_irq_wdt_mss_handler(struct ivpu_device *vdev)
884882 {
885− ivpu_err_ratelimited(vdev, "WDT MSS irq\n");
886−
887883 ivpu_hw_wdt_disable(vdev);
888− ivpu_pm_schedule_recovery(vdev);
884+ ivpu_pm_trigger_recovery(vdev, "WDT MSS IRQ");
889885 }
890886
891887 static void ivpu_hw_37xx_irq_noc_firewall_handler(struct ivpu_device *vdev)
892888 {
893− ivpu_err_ratelimited(vdev, "NOC Firewall irq\n");
894−
895− ivpu_pm_schedule_recovery(vdev);
889+ ivpu_pm_trigger_recovery(vdev, "NOC Firewall IRQ");
896890 }
897891
898892 /* Handler for IRQs from VPU core (irqV) */
@@ -970,7 +964,7 @@ static bool ivpu_hw_37xx_irqb_handler(struct ivpu_device *vdev, int irq) · 71 unmodified lines
970964 REGB_WR32(VPU_37XX_BUTTRESS_INTERRUPT_STAT, status);
971965
972966 if (schedule_recovery)
973− ivpu_pm_schedule_recovery(vdev);
967+ ivpu_pm_trigger_recovery(vdev, "Buttress IRQ");
974968
975969 return true;
976970 }
drivers/accel/ivpu/ivpu_hw_40xx.c+24−12
@@ -530,7 +530,7 @@ static void ivpu_boot_no_snoop_enable(struct ivpu_device *vdev) · 529 unmodified lines
530530 u32 val = REGV_RD32(VPU_40XX_HOST_IF_TCU_PTW_OVERRIDES);
531531
532532 val = REG_SET_FLD(VPU_40XX_HOST_IF_TCU_PTW_OVERRIDES, SNOOP_OVERRIDE_EN, val);
533− val = REG_CLR_FLD(VPU_40XX_HOST_IF_TCU_PTW_OVERRIDES, AW_SNOOP_OVERRIDE, val);
533+ val = REG_SET_FLD(VPU_40XX_HOST_IF_TCU_PTW_OVERRIDES, AW_SNOOP_OVERRIDE, val);
534534 val = REG_CLR_FLD(VPU_40XX_HOST_IF_TCU_PTW_OVERRIDES, AR_SNOOP_OVERRIDE, val);
535535
536536 REGV_WR32(VPU_40XX_HOST_IF_TCU_PTW_OVERRIDES, val);
@@ -704,7 +704,6 @@ static int ivpu_hw_40xx_info_init(struct ivpu_device *vdev) · 167 unmodified lines
704704 {
705705 struct ivpu_hw_info *hw = vdev->hw;
706706 u32 tile_disable;
707− u32 tile_enable;
708707 u32 fuse;
709708
710709 fuse = REGB_RD32(VPU_40XX_BUTTRESS_TILE_FUSE);
@@ -725,10 +724,6 @@ static int ivpu_hw_40xx_info_init(struct ivpu_device *vdev) · 14 unmodified lines
725724 else
726725 ivpu_dbg(vdev, MISC, "Fuse: All %d tiles enabled\n", TILE_MAX_NUM);
727726
728− tile_enable = (~tile_disable) & TILE_MAX_MASK;
729−
730− hw->sku = REG_SET_FLD_NUM(SKU, HW_ID, LNL_HW_ID, hw->sku);
731− hw->sku = REG_SET_FLD_NUM(SKU, TILE, tile_enable, hw->sku);
732727 hw->tile_fuse = tile_disable;
733728 hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT;
734729
@@ -746,7 +741,7 @@ static int ivpu_hw_40xx_info_init(struct ivpu_device *vdev) · 11 unmodified lines
746741 return 0;
747742 }
748743
749−static int ivpu_hw_40xx_reset(struct ivpu_device *vdev)
744+static int ivpu_hw_40xx_ip_reset(struct ivpu_device *vdev)
750745 {
751746 int ret;
752747 u32 val;
@@ -768,6 +763,23 @@ static int ivpu_hw_40xx_reset(struct ivpu_device *vdev) · 15 unmodified lines
768763 return ret;
769764 }
770765
766+static int ivpu_hw_40xx_reset(struct ivpu_device *vdev)
767+{
768+ int ret = 0;
769+
770+ if (ivpu_hw_40xx_ip_reset(vdev)) {
771+ ivpu_err(vdev, "Failed to reset VPU IP\n");
772+ ret = -EIO;
773+ }
774+
775+ if (ivpu_pll_disable(vdev)) {
776+ ivpu_err(vdev, "Failed to disable PLL\n");
777+ ret = -EIO;
778+ }
779+
780+ return ret;
781+}
782+
771783 static int ivpu_hw_40xx_d0i3_enable(struct ivpu_device *vdev)
772784 {
773785 int ret;
@@ -913,7 +925,7 @@ static int ivpu_hw_40xx_power_down(struct ivpu_device *vdev) · 139 unmodified lines
913925
914926 ivpu_hw_40xx_save_d0i3_entry_timestamp(vdev);
915927
916− if (!ivpu_hw_40xx_is_idle(vdev) && ivpu_hw_40xx_reset(vdev))
928+ if (!ivpu_hw_40xx_is_idle(vdev) && ivpu_hw_40xx_ip_reset(vdev))
917929 ivpu_warn(vdev, "Failed to reset the VPU\n");
918930
919931 if (ivpu_pll_disable(vdev)) {
@@ -1032,18 +1044,18 @@ static void ivpu_hw_40xx_irq_disable(struct ivpu_device *vdev) · 112 unmodified lines
10321044 static void ivpu_hw_40xx_irq_wdt_nce_handler(struct ivpu_device *vdev)
10331045 {
10341046 /* TODO: For LNN hang consider engine reset instead of full recovery */
1035− ivpu_pm_schedule_recovery(vdev);
1047+ ivpu_pm_trigger_recovery(vdev, "WDT NCE IRQ");
10361048 }
10371049
10381050 static void ivpu_hw_40xx_irq_wdt_mss_handler(struct ivpu_device *vdev)
10391051 {
10401052 ivpu_hw_wdt_disable(vdev);
1041− ivpu_pm_schedule_recovery(vdev);
1053+ ivpu_pm_trigger_recovery(vdev, "WDT MSS IRQ");
10421054 }
10431055
10441056 static void ivpu_hw_40xx_irq_noc_firewall_handler(struct ivpu_device *vdev)
10451057 {
1046− ivpu_pm_schedule_recovery(vdev);
1058+ ivpu_pm_trigger_recovery(vdev, "NOC Firewall IRQ");
10471059 }
10481060
10491061 /* Handler for IRQs from VPU core (irqV) */
@@ -1137,7 +1149,7 @@ static bool ivpu_hw_40xx_irqb_handler(struct ivpu_device *vdev, int irq) · 87 unmodified lines
11371149 REGB_WR32(VPU_40XX_BUTTRESS_INTERRUPT_STAT, status);
11381150
11391151 if (schedule_recovery)
1140− ivpu_pm_schedule_recovery(vdev);
1152+ ivpu_pm_trigger_recovery(vdev, "Buttress IRQ");
11411153
11421154 return true;
11431155 }
drivers/accel/ivpu/ivpu_ipc.c+2−4
@@ -343,10 +343,8 @@ int ivpu_ipc_send_receive_active(struct ivpu_device *vdev, struct vpu_jsm_msg *r · 342 unmodified lines
343343 hb_ret = ivpu_ipc_send_receive_internal(vdev, &hb_req, VPU_JSM_MSG_QUERY_ENGINE_HB_DONE,
344344 &hb_resp, VPU_IPC_CHAN_ASYNC_CMD,
345345 vdev->timeout.jsm);
346− if (hb_ret == -ETIMEDOUT) {
347− ivpu_hw_diagnose_failure(vdev);
348− ivpu_pm_schedule_recovery(vdev);
349− }
346+ if (hb_ret == -ETIMEDOUT)
347+ ivpu_pm_trigger_recovery(vdev, "IPC timeout");
350348
351349 return ret;
352350 }
drivers/accel/ivpu/ivpu_job.c+74−88
@@ -112,22 +112,20 @@ static void ivpu_cmdq_release_locked(struct ivpu_file_priv *file_priv, u16 engin · 111 unmodified lines
112112 }
113113 }
114114
115−void ivpu_cmdq_release_all(struct ivpu_file_priv *file_priv)
115+void ivpu_cmdq_release_all_locked(struct ivpu_file_priv *file_priv)
116116 {
117117 int i;
118118
119− mutex_lock(&file_priv->lock);
119+ lockdep_assert_held(&file_priv->lock);
120120
121121 for (i = 0; i < IVPU_NUM_ENGINES; i++)
122122 ivpu_cmdq_release_locked(file_priv, i);
123−
124− mutex_unlock(&file_priv->lock);
125123 }
126124
127125 /*
128126 * Mark the doorbell as unregistered and reset job queue pointers.
129127 * This function needs to be called when the VPU hardware is restarted
130− * and FW looses job queue state. The next time job queue is used it
128+ * and FW loses job queue state. The next time job queue is used it
131129 * will be registered again.
132130 */
133131 static void ivpu_cmdq_reset_locked(struct ivpu_file_priv *file_priv, u16 engine)
@@ -161,15 +159,13 @@ void ivpu_cmdq_reset_all_contexts(struct ivpu_device *vdev) · 27 unmodified lines
161159 struct ivpu_file_priv *file_priv;
162160 unsigned long ctx_id;
163161
164− xa_for_each(&vdev->context_xa, ctx_id, file_priv) {
165− file_priv = ivpu_file_priv_get_by_ctx_id(vdev, ctx_id);
166− if (!file_priv)
167− continue;
162+ mutex_lock(&vdev->context_list_lock);
168163
164+ xa_for_each(&vdev->context_xa, ctx_id, file_priv)
169165 ivpu_cmdq_reset_all(file_priv);
170166
171− ivpu_file_priv_put(&file_priv);
172− }
167+ mutex_unlock(&vdev->context_list_lock);
168+
173169 }
174170
175171 static int ivpu_cmdq_push_job(struct ivpu_cmdq *cmdq, struct ivpu_job *job)
@@ -243,60 +239,32 @@ static struct dma_fence *ivpu_fence_create(struct ivpu_device *vdev) · 67 unmodified lines
243239 return &fence->base;
244240 }
245241
246−static void job_get(struct ivpu_job *job, struct ivpu_job **link)
242+static void ivpu_job_destroy(struct ivpu_job *job)
247243 {
248244 struct ivpu_device *vdev = job->vdev;
249−
250− kref_get(&job->ref);
251− *link = job;
252−
253− ivpu_dbg(vdev, KREF, "Job get: id %u refcount %u\n", job->job_id, kref_read(&job->ref));
254−}
255−
256−static void job_release(struct kref *ref)
257−{
258− struct ivpu_job *job = container_of(ref, struct ivpu_job, ref);
259− struct ivpu_device *vdev = job->vdev;
260245 u32 i;
261246
247+ ivpu_dbg(vdev, JOB, "Job destroyed: id %3u ctx %2d engine %d",
248+ job->job_id, job->file_priv->ctx.id, job->engine_idx);
249+
262250 for (i = 0; i < job->bo_count; i++)
263251 if (job->bos[i])
264252 drm_gem_object_put(&job->bos[i]->base.base);
265253
266254 dma_fence_put(job->done_fence);
267255 ivpu_file_priv_put(&job->file_priv);
268−
269− ivpu_dbg(vdev, KREF, "Job released: id %u\n", job->job_id);
270256 kfree(job);
271−
272− /* Allow the VPU to get suspended, must be called after ivpu_file_priv_put() */
273− ivpu_rpm_put(vdev);
274−}
275−
276−static void job_put(struct ivpu_job *job)
277−{
278− struct ivpu_device *vdev = job->vdev;
279−
280− ivpu_dbg(vdev, KREF, "Job put: id %u refcount %u\n", job->job_id, kref_read(&job->ref));
281− kref_put(&job->ref, job_release);
282257 }
283258
284259 static struct ivpu_job *
285−ivpu_create_job(struct ivpu_file_priv *file_priv, u32 engine_idx, u32 bo_count)
260+ivpu_job_create(struct ivpu_file_priv *file_priv, u32 engine_idx, u32 bo_count)
286261 {
287262 struct ivpu_device *vdev = file_priv->vdev;
288263 struct ivpu_job *job;
289− int ret;
290−
291− ret = ivpu_rpm_get(vdev);
292− if (ret < 0)
293− return NULL;
294264
295265 job = kzalloc(struct_size(job, bos, bo_count), GFP_KERNEL);
296266 if (!job)
297− goto err_rpm_put;
298−
299− kref_init(&job->ref);
267+ return NULL;
300268
301269 job->vdev = vdev;
302270 job->engine_idx = engine_idx;
@@ -310,17 +278,14 @@ ivpu_create_job(struct ivpu_file_priv *file_priv, u32 engine_idx, u32 bo_count) · 7 unmodified lines
310278 job->file_priv = ivpu_file_priv_get(file_priv);
311279
312280 ivpu_dbg(vdev, JOB, "Job created: ctx %2d engine %d", file_priv->ctx.id, job->engine_idx);
313−
314281 return job;
315282
316283 err_free_job:
317284 kfree(job);
318−err_rpm_put:
319− ivpu_rpm_put(vdev);
320285 return NULL;
321286 }
322287
323−static int ivpu_job_done(struct ivpu_device *vdev, u32 job_id, u32 job_status)
288+static int ivpu_job_signal_and_destroy(struct ivpu_device *vdev, u32 job_id, u32 job_status)
324289 {
325290 struct ivpu_job *job;
326291
@@ -329,7 +294,7 @@ static int ivpu_job_done(struct ivpu_device *vdev, u32 job_id, u32 job_status) · 2 unmodified lines
329294 return -ENOENT;
330295
331296 if (job->file_priv->has_mmu_faults)
332− job_status = VPU_JSM_STATUS_ABORTED;
297+ job_status = DRM_IVPU_JOB_STATUS_ABORTED;
333298
334299 job->bos[CMD_BUF_IDX]->job_status = job_status;
335300 dma_fence_signal(job->done_fence);
@@ -337,9 +302,10 @@ static int ivpu_job_done(struct ivpu_device *vdev, u32 job_id, u32 job_status) · 1 unmodified line
337302 ivpu_dbg(vdev, JOB, "Job complete: id %3u ctx %2d engine %d status 0x%x\n",
338303 job->job_id, job->file_priv->ctx.id, job->engine_idx, job_status);
339304
305+ ivpu_job_destroy(job);
340306 ivpu_stop_job_timeout_detection(vdev);
341307
342− job_put(job);
308+ ivpu_rpm_put(vdev);
343309 return 0;
344310 }
345311
@@ -349,10 +315,10 @@ void ivpu_jobs_abort_all(struct ivpu_device *vdev) · 3 unmodified lines
349315 unsigned long id;
350316
351317 xa_for_each(&vdev->submitted_jobs_xa, id, job)
352− ivpu_job_done(vdev, id, VPU_JSM_STATUS_ABORTED);
318+ ivpu_job_signal_and_destroy(vdev, id, DRM_IVPU_JOB_STATUS_ABORTED);
353319 }
354320
355−static int ivpu_direct_job_submission(struct ivpu_job *job)
321+static int ivpu_job_submit(struct ivpu_job *job)
356322 {
357323 struct ivpu_file_priv *file_priv = job->file_priv;
358324 struct ivpu_device *vdev = job->vdev;
@@ -360,53 +326,65 @@ static int ivpu_direct_job_submission(struct ivpu_job *job) · 1 unmodified line
360326 struct ivpu_cmdq *cmdq;
361327 int ret;
362328
329+ ret = ivpu_rpm_get(vdev);
330+ if (ret < 0)
331+ return ret;
332+
363333 mutex_lock(&file_priv->lock);
364334
365335 cmdq = ivpu_cmdq_acquire(job->file_priv, job->engine_idx);
366336 if (!cmdq) {
367− ivpu_warn(vdev, "Failed get job queue, ctx %d engine %d\n",
368− file_priv->ctx.id, job->engine_idx);
337+ ivpu_warn_ratelimited(vdev, "Failed get job queue, ctx %d engine %d\n",
338+ file_priv->ctx.id, job->engine_idx);
369339 ret = -EINVAL;
370− goto err_unlock;
340+ goto err_unlock_file_priv;
371341 }
372342
373343 job_id_range.min = FIELD_PREP(JOB_ID_CONTEXT_MASK, (file_priv->ctx.id - 1));
374344 job_id_range.max = job_id_range.min | JOB_ID_JOB_MASK;
375345
376− job_get(job, &job);
377− ret = xa_alloc(&vdev->submitted_jobs_xa, &job->job_id, job, job_id_range, GFP_KERNEL);
346+ xa_lock(&vdev->submitted_jobs_xa);
347+ ret = __xa_alloc(&vdev->submitted_jobs_xa, &job->job_id, job, job_id_range, GFP_KERNEL);
378348 if (ret) {
379− ivpu_warn_ratelimited(vdev, "Failed to allocate job id: %d\n", ret);
380− goto err_job_put;
349+ ivpu_dbg(vdev, JOB, "Too many active jobs in ctx %d\n",
350+ file_priv->ctx.id);
351+ ret = -EBUSY;
352+ goto err_unlock_submitted_jobs_xa;
381353 }
382354
383355 ret = ivpu_cmdq_push_job(cmdq, job);
384356 if (ret)
385− goto err_xa_erase;
357+ goto err_erase_xa;
386358
387359 ivpu_start_job_timeout_detection(vdev);
388360
389− ivpu_dbg(vdev, JOB, "Job submitted: id %3u addr 0x%llx ctx %2d engine %d next %d\n",
390− job->job_id, job->cmd_buf_vpu_addr, file_priv->ctx.id,
391− job->engine_idx, cmdq->jobq->header.tail);
392−
393− if (ivpu_test_mode & IVPU_TEST_MODE_NULL_HW) {
394− ivpu_job_done(vdev, job->job_id, VPU_JSM_STATUS_SUCCESS);
361+ if (unlikely(ivpu_test_mode & IVPU_TEST_MODE_NULL_HW)) {
395362 cmdq->jobq->header.head = cmdq->jobq->header.tail;
396363 wmb(); /* Flush WC buffer for jobq header */
397364 } else {
398365 ivpu_cmdq_ring_db(vdev, cmdq);
399366 }
400367
368+ ivpu_dbg(vdev, JOB, "Job submitted: id %3u ctx %2d engine %d addr 0x%llx next %d\n",
369+ job->job_id, file_priv->ctx.id, job->engine_idx,
370+ job->cmd_buf_vpu_addr, cmdq->jobq->header.tail);
371+
372+ xa_unlock(&vdev->submitted_jobs_xa);
373+
401374 mutex_unlock(&file_priv->lock);
375+
376+ if (unlikely(ivpu_test_mode & IVPU_TEST_MODE_NULL_HW))
377+ ivpu_job_signal_and_destroy(vdev, job->job_id, VPU_JSM_STATUS_SUCCESS);
378+
402379 return 0;
403380
404−err_xa_erase:
405− xa_erase(&vdev->submitted_jobs_xa, job->job_id);
406−err_job_put:
407− job_put(job);
408−err_unlock:
381+err_erase_xa:
382+ __xa_erase(&vdev->submitted_jobs_xa, job->job_id);
383+err_unlock_submitted_jobs_xa:
384+ xa_unlock(&vdev->submitted_jobs_xa);
385+err_unlock_file_priv:
409386 mutex_unlock(&file_priv->lock);
387+ ivpu_rpm_put(vdev);
410388 return ret;
411389 }
412390
@@ -488,6 +466,9 @@ int ivpu_submit_ioctl(struct drm_device *dev, void *data, struct drm_file *file) · 75 unmodified lines
488466 if (params->engine > DRM_IVPU_ENGINE_COPY)
489467 return -EINVAL;
490468
469+ if (params->priority > DRM_IVPU_JOB_PRIORITY_REALTIME)
470+ return -EINVAL;
471+
491472 if (params->buffer_count == 0 || params->buffer_count > JOB_MAX_BUFFER_COUNT)
492473 return -EINVAL;
493474
@@ -509,44 +490,49 @@ int ivpu_submit_ioctl(struct drm_device *dev, void *data, struct drm_file *file) · 15 unmodified lines
509490 params->buffer_count * sizeof(u32));
510491 if (ret) {
511492 ret = -EFAULT;
512− goto free_handles;
493+ goto err_free_handles;
513494 }
514495
515496 if (!drm_dev_enter(&vdev->drm, &idx)) {
516497 ret = -ENODEV;
517− goto free_handles;
498+ goto err_free_handles;
518499 }
519500
520501 ivpu_dbg(vdev, JOB, "Submit ioctl: ctx %u buf_count %u\n",
521502 file_priv->ctx.id, params->buffer_count);
522503
523− job = ivpu_create_job(file_priv, params->engine, params->buffer_count);
504+ job = ivpu_job_create(file_priv, params->engine, params->buffer_count);
524505 if (!job) {
525506 ivpu_err(vdev, "Failed to create job\n");
526507 ret = -ENOMEM;
527− goto dev_exit;
508+ goto err_exit_dev;
528509 }
529510
530511 ret = ivpu_job_prepare_bos_for_submit(file, job, buf_handles, params->buffer_count,
531512 params->commands_offset);
532513 if (ret) {
533− ivpu_err(vdev, "Failed to prepare job, ret %d\n", ret);
534− goto job_put;
514+ ivpu_err(vdev, "Failed to prepare job: %d\n", ret);
515+ goto err_destroy_job;
535516 }
536517
537− ret = ivpu_direct_job_submission(job);
538− if (ret) {
539− dma_fence_signal(job->done_fence);
540− ivpu_err(vdev, "Failed to submit job to the HW, ret %d\n", ret);
541− }
518+ down_read(&vdev->pm->reset_lock);
519+ ret = ivpu_job_submit(job);
520+ up_read(&vdev->pm->reset_lock);
521+ if (ret)
522+ goto err_signal_fence;
542523
543−job_put:
544− job_put(job);
545−dev_exit:
546524 drm_dev_exit(idx);
547−free_handles:
548525 kfree(buf_handles);
526+ return ret;
549527
528+err_signal_fence:
529+ dma_fence_signal(job->done_fence);
530+err_destroy_job:
531+ ivpu_job_destroy(job);
532+err_exit_dev:
533+ drm_dev_exit(idx);
534+err_free_handles:
535+ kfree(buf_handles);
550536 return ret;
551537 }
552538
@@ -568,7 +554,7 @@ ivpu_job_done_callback(struct ivpu_device *vdev, struct ivpu_ipc_hdr *ipc_hdr, · 15 unmodified lines
568554 }
569555
570556 payload = (struct vpu_ipc_msg_payload_job_done *)&jsm_msg->payload;
571− ret = ivpu_job_done(vdev, payload->job_id, payload->job_status);
557+ ret = ivpu_job_signal_and_destroy(vdev, payload->job_id, payload->job_status);
572558 if (!ret && !xa_empty(&vdev->submitted_jobs_xa))
573559 ivpu_start_job_timeout_detection(vdev);
574560 }
drivers/accel/ivpu/ivpu_job.h+1−2
@@ -43,7 +43,6 @@ struct ivpu_cmdq { · 42 unmodified lines
4343 will update the job status
4444 */
4545 struct ivpu_job {
46− struct kref ref;
4746 struct ivpu_device *vdev;
4847 struct ivpu_file_priv *file_priv;
4948 struct dma_fence *done_fence;
@@ -56,7 +55,7 @@ struct ivpu_job { · 6 unmodified lines
5655
5756 int ivpu_submit_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
5857
59−void ivpu_cmdq_release_all(struct ivpu_file_priv *file_priv);
58+void ivpu_cmdq_release_all_locked(struct ivpu_file_priv *file_priv);
6059 void ivpu_cmdq_reset_all_contexts(struct ivpu_device *vdev);
6160
6261 void ivpu_job_done_consumer_init(struct ivpu_device *vdev);
drivers/accel/ivpu/ivpu_mmu.c+37−21
@@ -7,6 +7,7 @@ · 6 unmodified lines
77 #include <linux/highmem.h>
88
99 #include "ivpu_drv.h"
10+#include "ivpu_hw.h"
1011 #include "ivpu_hw_reg_io.h"
1112 #include "ivpu_mmu.h"
1213 #include "ivpu_mmu_context.h"
@@ -71,10 +72,10 @@ · 58 unmodified lines
7172
7273 #define IVPU_MMU_Q_COUNT_LOG2 4 /* 16 entries */
7374 #define IVPU_MMU_Q_COUNT ((u32)1 << IVPU_MMU_Q_COUNT_LOG2)
74−#define IVPU_MMU_Q_WRAP_BIT (IVPU_MMU_Q_COUNT << 1)
75−#define IVPU_MMU_Q_WRAP_MASK (IVPU_MMU_Q_WRAP_BIT - 1)
76−#define IVPU_MMU_Q_IDX_MASK (IVPU_MMU_Q_COUNT - 1)
75+#define IVPU_MMU_Q_WRAP_MASK GENMASK(IVPU_MMU_Q_COUNT_LOG2, 0)
76+#define IVPU_MMU_Q_IDX_MASK (IVPU_MMU_Q_COUNT - 1)
7777 #define IVPU_MMU_Q_IDX(val) ((val) & IVPU_MMU_Q_IDX_MASK)
78+#define IVPU_MMU_Q_WRP(val) ((val) & IVPU_MMU_Q_COUNT)
7879
7980 #define IVPU_MMU_CMDQ_CMD_SIZE 16
8081 #define IVPU_MMU_CMDQ_SIZE (IVPU_MMU_Q_COUNT * IVPU_MMU_CMDQ_CMD_SIZE)
@@ -474,20 +475,32 @@ static int ivpu_mmu_cmdq_wait_for_cons(struct ivpu_device *vdev) · 393 unmodified lines
474475 return 0;
475476 }
476477
478+static bool ivpu_mmu_queue_is_full(struct ivpu_mmu_queue *q)
479+{
480+ return ((IVPU_MMU_Q_IDX(q->prod) == IVPU_MMU_Q_IDX(q->cons)) &&
481+ (IVPU_MMU_Q_WRP(q->prod) != IVPU_MMU_Q_WRP(q->cons)));
482+}
483+
484+static bool ivpu_mmu_queue_is_empty(struct ivpu_mmu_queue *q)
485+{
486+ return ((IVPU_MMU_Q_IDX(q->prod) == IVPU_MMU_Q_IDX(q->cons)) &&
487+ (IVPU_MMU_Q_WRP(q->prod) == IVPU_MMU_Q_WRP(q->cons)));
488+}
489+
477490 static int ivpu_mmu_cmdq_cmd_write(struct ivpu_device *vdev, const char *name, u64 data0, u64 data1)
478491 {
479− struct ivpu_mmu_queue *q = &vdev->mmu->cmdq;
480− u64 *queue_buffer = q->base;
481− int idx = IVPU_MMU_Q_IDX(q->prod) * (IVPU_MMU_CMDQ_CMD_SIZE / sizeof(*queue_buffer));
492+ struct ivpu_mmu_queue *cmdq = &vdev->mmu->cmdq;
493+ u64 *queue_buffer = cmdq->base;
494+ int idx = IVPU_MMU_Q_IDX(cmdq->prod) * (IVPU_MMU_CMDQ_CMD_SIZE / sizeof(*queue_buffer));
482495
483− if (!CIRC_SPACE(IVPU_MMU_Q_IDX(q->prod), IVPU_MMU_Q_IDX(q->cons), IVPU_MMU_Q_COUNT)) {
496+ if (ivpu_mmu_queue_is_full(cmdq)) {
484497 ivpu_err(vdev, "Failed to write MMU CMD %s\n", name);
485498 return -EBUSY;
486499 }
487500
488501 queue_buffer[idx] = data0;
489502 queue_buffer[idx + 1] = data1;
490− q->prod = (q->prod + 1) & IVPU_MMU_Q_WRAP_MASK;
503+ cmdq->prod = (cmdq->prod + 1) & IVPU_MMU_Q_WRAP_MASK;
491504
492505 ivpu_dbg(vdev, MMU, "CMD write: %s data: 0x%llx 0x%llx\n", name, data0, data1);
493506
@@ -518,6 +531,7 @@ static int ivpu_mmu_cmdq_sync(struct ivpu_device *vdev) · 24 unmodified lines
518531
519532 ivpu_err(vdev, "Timed out waiting for MMU consumer: %d, error: %s\n", ret,
520533 ivpu_mmu_cmdq_err_to_str(err));
534+ ivpu_hw_diagnose_failure(vdev);
521535 }
522536
523537 return ret;
@@ -558,7 +572,6 @@ static int ivpu_mmu_reset(struct ivpu_device *vdev) · 34 unmodified lines
558572 mmu->cmdq.cons = 0;
559573
560574 memset(mmu->evtq.base, 0, IVPU_MMU_EVTQ_SIZE);
561− clflush_cache_range(mmu->evtq.base, IVPU_MMU_EVTQ_SIZE);
562575 mmu->evtq.prod = 0;
563576 mmu->evtq.cons = 0;
564577
@@ -872,20 +885,15 @@ static u32 *ivpu_mmu_get_event(struct ivpu_device *vdev) · 307 unmodified lines
872885 u32 *evt = evtq->base + (idx * IVPU_MMU_EVTQ_CMD_SIZE);
873886
874887 evtq->prod = REGV_RD32(IVPU_MMU_REG_EVTQ_PROD_SEC);
875− if (!CIRC_CNT(IVPU_MMU_Q_IDX(evtq->prod), IVPU_MMU_Q_IDX(evtq->cons), IVPU_MMU_Q_COUNT))
888+ if (ivpu_mmu_queue_is_empty(evtq))
876889 return NULL;
877890
878− clflush_cache_range(evt, IVPU_MMU_EVTQ_CMD_SIZE);
879−
880891 evtq->cons = (evtq->cons + 1) & IVPU_MMU_Q_WRAP_MASK;
881− REGV_WR32(IVPU_MMU_REG_EVTQ_CONS_SEC, evtq->cons);
882−
883892 return evt;
884893 }
885894
886895 void ivpu_mmu_irq_evtq_handler(struct ivpu_device *vdev)
887896 {
888− bool schedule_recovery = false;
889897 u32 *event;
890898 u32 ssid;
891899
@@ -895,14 +903,22 @@ void ivpu_mmu_irq_evtq_handler(struct ivpu_device *vdev) · 3 unmodified lines
895903 ivpu_mmu_dump_event(vdev, event);
896904
897905 ssid = FIELD_GET(IVPU_MMU_EVT_SSID_MASK, event[0]);
898− if (ssid == IVPU_GLOBAL_CONTEXT_MMU_SSID)
899− schedule_recovery = true;
900− else
901− ivpu_mmu_user_context_mark_invalid(vdev, ssid);
906+ if (ssid == IVPU_GLOBAL_CONTEXT_MMU_SSID) {
907+ ivpu_pm_trigger_recovery(vdev, "MMU event");
908+ return;
909+ }
910+
911+ ivpu_mmu_user_context_mark_invalid(vdev, ssid);
912+ REGV_WR32(IVPU_MMU_REG_EVTQ_CONS_SEC, vdev->mmu->evtq.cons);
902913 }
914+}
903915
904− if (schedule_recovery)
905− ivpu_pm_schedule_recovery(vdev);
916+void ivpu_mmu_evtq_dump(struct ivpu_device *vdev)
917+{
918+ u32 *event;
919+
920+ while ((event = ivpu_mmu_get_event(vdev)) != NULL)
921+ ivpu_mmu_dump_event(vdev, event);
906922 }
907923
908924 void ivpu_mmu_irq_gerr_handler(struct ivpu_device *vdev)
drivers/accel/ivpu/ivpu_mmu.h+1−0
@@ -46,5 +46,6 @@ int ivpu_mmu_invalidate_tlb(struct ivpu_device *vdev, u16 ssid); · 45 unmodified lines
4646
4747 void ivpu_mmu_irq_evtq_handler(struct ivpu_device *vdev);
4848 void ivpu_mmu_irq_gerr_handler(struct ivpu_device *vdev);
49+void ivpu_mmu_evtq_dump(struct ivpu_device *vdev);
4950
5051 #endif /* __IVPU_MMU_H__ */
drivers/accel/ivpu/ivpu_mmu_context.c+9−0
@@ -355,6 +355,9 @@ ivpu_mmu_context_map_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, · 354 unmodified lines
355355 dma_addr_t dma_addr = sg_dma_address(sg) - sg->offset;
356356 size_t size = sg_dma_len(sg) + sg->offset;
357357
358+ ivpu_dbg(vdev, MMU_MAP, "Map ctx: %u dma_addr: 0x%llx vpu_addr: 0x%llx size: %lu\n",
359+ ctx->id, dma_addr, vpu_addr, size);
360+
358361 ret = ivpu_mmu_context_map_pages(vdev, ctx, vpu_addr, dma_addr, size, prot);
359362 if (ret) {
360363 ivpu_err(vdev, "Failed to map context pages\n");
@@ -366,6 +369,7 @@ ivpu_mmu_context_map_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx, · 5 unmodified lines
366369
367370 /* Ensure page table modifications are flushed from wc buffers to memory */
368371 wmb();
372+
369373 mutex_unlock(&ctx->lock);
370374
371375 ret = ivpu_mmu_invalidate_tlb(vdev, ctx->id);
@@ -388,14 +392,19 @@ ivpu_mmu_context_unmap_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ct · 16 unmodified lines
388392 mutex_lock(&ctx->lock);
389393
390394 for_each_sgtable_dma_sg(sgt, sg, i) {
395+ dma_addr_t dma_addr = sg_dma_address(sg) - sg->offset;
391396 size_t size = sg_dma_len(sg) + sg->offset;
392397
398+ ivpu_dbg(vdev, MMU_MAP, "Unmap ctx: %u dma_addr: 0x%llx vpu_addr: 0x%llx size: %lu\n",
399+ ctx->id, dma_addr, vpu_addr, size);
400+
393401 ivpu_mmu_context_unmap_pages(ctx, vpu_addr, size);
394402 vpu_addr += size;
395403 }
396404
397405 /* Ensure page table modifications are flushed from wc buffers to memory */
398406 wmb();
407+
399408 mutex_unlock(&ctx->lock);
400409
401410 ret = ivpu_mmu_invalidate_tlb(vdev, ctx->id);
drivers/accel/ivpu/ivpu_pm.c+35−17
@@ -13,6 +13,7 @@ · 12 unmodified lines
1313 #include "ivpu_drv.h"
1414 #include "ivpu_hw.h"
1515 #include "ivpu_fw.h"
16+#include "ivpu_fw_log.h"
1617 #include "ivpu_ipc.h"
1718 #include "ivpu_job.h"
1819 #include "ivpu_jsm_msg.h"
@@ -111,6 +112,14 @@ static void ivpu_pm_recovery_work(struct work_struct *work) · 92 unmodified lines
111112 char *evt[2] = {"IVPU_PM_EVENT=IVPU_RECOVER", NULL};
112113 int ret;
113114
115+ ivpu_err(vdev, "Recovering the VPU (reset #%d)\n", atomic_read(&vdev->pm->reset_counter));
116+
117+ ret = pm_runtime_resume_and_get(vdev->drm.dev);
118+ if (ret)
119+ ivpu_err(vdev, "Failed to resume VPU: %d\n", ret);
120+
121+ ivpu_fw_log_dump(vdev);
122+
114123 retry:
115124 ret = pci_try_reset_function(to_pci_dev(vdev->drm.dev));
116125 if (ret == -EAGAIN && !drm_dev_is_unplugged(&vdev->drm)) {
@@ -122,11 +131,13 @@ retry: · 5 unmodified lines
122131 ivpu_err(vdev, "Failed to reset VPU: %d\n", ret);
123132
124133 kobject_uevent_env(&vdev->drm.dev->kobj, KOBJ_CHANGE, evt);
134+ pm_runtime_mark_last_busy(vdev->drm.dev);
135+ pm_runtime_put_autosuspend(vdev->drm.dev);
125136 }
126137
127−void ivpu_pm_schedule_recovery(struct ivpu_device *vdev)
138+void ivpu_pm_trigger_recovery(struct ivpu_device *vdev, const char *reason)
128139 {
129− struct ivpu_pm_info *pm = vdev->pm;
140+ ivpu_err(vdev, "Recovery triggered by %s\n", reason);
130141
131142 if (ivpu_disable_recovery) {
132143 ivpu_err(vdev, "Recovery not available when disable_recovery param is set\n");
@@ -138,10 +149,11 @@ void ivpu_pm_schedule_recovery(struct ivpu_device *vdev) · 5 unmodified lines
138149 return;
139150 }
140151
141− /* Schedule recovery if it's not in progress */
142− if (atomic_cmpxchg(&pm->in_reset, 0, 1) == 0) {
143− ivpu_hw_irq_disable(vdev);
144− queue_work(system_long_wq, &pm->recovery_work);
152+ /* Trigger recovery if it's not in progress */
153+ if (atomic_cmpxchg(&vdev->pm->reset_pending, 0, 1) == 0) {
154+ ivpu_hw_diagnose_failure(vdev);
155+ ivpu_hw_irq_disable(vdev); /* Disable IRQ early to protect from IRQ storm */
156+ queue_work(system_long_wq, &vdev->pm->recovery_work);
145157 }
146158 }
147159
@@ -149,12 +161,8 @@ static void ivpu_job_timeout_work(struct work_struct *work) · 1 unmodified line
149161 {
150162 struct ivpu_pm_info *pm = container_of(work, struct ivpu_pm_info, job_timeout_work.work);
151163 struct ivpu_device *vdev = pm->vdev;
152− unsigned long timeout_ms = ivpu_tdr_timeout_ms ? ivpu_tdr_timeout_ms : vdev->timeout.tdr;
153164
154− ivpu_err(vdev, "TDR detected, timeout %lu ms", timeout_ms);
155− ivpu_hw_diagnose_failure(vdev);
156−
157− ivpu_pm_schedule_recovery(vdev);
165+ ivpu_pm_trigger_recovery(vdev, "TDR");
158166 }
159167
160168 void ivpu_start_job_timeout_detection(struct ivpu_device *vdev)
@@ -227,6 +235,9 @@ int ivpu_pm_runtime_suspend_cb(struct device *dev) · 66 unmodified lines
227235 bool hw_is_idle = true;
228236 int ret;
229237
238+ drm_WARN_ON(&vdev->drm, !xa_empty(&vdev->submitted_jobs_xa));
239+ drm_WARN_ON(&vdev->drm, work_pending(&vdev->pm->recovery_work));
240+
230241 ivpu_dbg(vdev, PM, "Runtime suspend..\n");
231242
232243 if (!ivpu_hw_is_idle(vdev) && vdev->pm->suspend_reschedule_counter) {
@@ -247,7 +258,8 @@ int ivpu_pm_runtime_suspend_cb(struct device *dev) · 14 unmodified lines
247258 ivpu_err(vdev, "Failed to set suspend VPU: %d\n", ret);
248259
249260 if (!hw_is_idle) {
250− ivpu_warn(vdev, "VPU failed to enter idle, force suspended.\n");
261+ ivpu_err(vdev, "VPU failed to enter idle, force suspended.\n");
262+ ivpu_fw_log_dump(vdev);
251263 ivpu_pm_prepare_cold_boot(vdev);
252264 } else {
253265 ivpu_pm_prepare_warm_boot(vdev);
@@ -308,11 +320,12 @@ void ivpu_pm_reset_prepare_cb(struct pci_dev *pdev) · 54 unmodified lines
308320 {
309321 struct ivpu_device *vdev = pci_get_drvdata(pdev);
310322
311− pm_runtime_get_sync(vdev->drm.dev);
312−
313323 ivpu_dbg(vdev, PM, "Pre-reset..\n");
314324 atomic_inc(&vdev->pm->reset_counter);
315− atomic_set(&vdev->pm->in_reset, 1);
325+ atomic_set(&vdev->pm->reset_pending, 1);
326+
327+ pm_runtime_get_sync(vdev->drm.dev);
328+ down_write(&vdev->pm->reset_lock);
316329 ivpu_prepare_for_reset(vdev);
317330 ivpu_hw_reset(vdev);
318331 ivpu_pm_prepare_cold_boot(vdev);
@@ -329,9 +342,11 @@ void ivpu_pm_reset_done_cb(struct pci_dev *pdev) · 10 unmodified lines
329342 ret = ivpu_resume(vdev);
330343 if (ret)
331344 ivpu_err(vdev, "Failed to set RESUME state: %d\n", ret);
332− atomic_set(&vdev->pm->in_reset, 0);
345+ up_write(&vdev->pm->reset_lock);
346+ atomic_set(&vdev->pm->reset_pending, 0);
333347 ivpu_dbg(vdev, PM, "Post-reset done.\n");
334348
349+ pm_runtime_mark_last_busy(vdev->drm.dev);
335350 pm_runtime_put_autosuspend(vdev->drm.dev);
336351 }
337352
@@ -344,7 +359,10 @@ void ivpu_pm_init(struct ivpu_device *vdev) · 6 unmodified lines
344359 pm->vdev = vdev;
345360 pm->suspend_reschedule_counter = PM_RESCHEDULE_LIMIT;
346361
347− atomic_set(&pm->in_reset, 0);
362+ init_rwsem(&pm->reset_lock);
363+ atomic_set(&pm->reset_pending, 0);
364+ atomic_set(&pm->reset_counter, 0);
365+
348366 INIT_WORK(&pm->recovery_work, ivpu_pm_recovery_work);
349367 INIT_DELAYED_WORK(&pm->job_timeout_work, ivpu_job_timeout_work);
350368
drivers/accel/ivpu/ivpu_pm.h+4−2
@@ -6,6 +6,7 @@ · 5 unmodified lines
66 #ifndef __IVPU_PM_H__
77 #define __IVPU_PM_H__
88
9+#include <linux/rwsem.h>
910 #include <linux/types.h>
1011
1112 struct ivpu_device;
@@ -14,8 +15,9 @@ struct ivpu_pm_info { · 2 unmodified lines
1415 struct ivpu_device *vdev;
1516 struct delayed_work job_timeout_work;
1617 struct work_struct recovery_work;
17− atomic_t in_reset;
18+ struct rw_semaphore reset_lock;
1819 atomic_t reset_counter;
20+ atomic_t reset_pending;
1921 bool is_warmboot;
2022 u32 suspend_reschedule_counter;
2123 };
@@ -37,7 +39,7 @@ int __must_check ivpu_rpm_get(struct ivpu_device *vdev); · 15 unmodified lines
3739 int __must_check ivpu_rpm_get_if_active(struct ivpu_device *vdev);
3840 void ivpu_rpm_put(struct ivpu_device *vdev);
3941
40−void ivpu_pm_schedule_recovery(struct ivpu_device *vdev);
42+void ivpu_pm_trigger_recovery(struct ivpu_device *vdev, const char *reason);
4143 void ivpu_start_job_timeout_detection(struct ivpu_device *vdev);
4244 void ivpu_stop_job_timeout_detection(struct ivpu_device *vdev);
4345
drivers/acpi/apei/ghes.c+0−26
@@ -680,32 +680,6 @@ static void ghes_defer_non_standard_event(struct acpi_hest_generic_data *gdata, · 679 unmodified lines
680680 static DECLARE_RWSEM(cxl_cper_rw_sem);
681681 static cxl_cper_callback cper_callback;
682682
683−/* CXL Event record UUIDs are formatted as GUIDs and reported in section type */
684−
685−/*
686− * General Media Event Record
687− * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
688− */
689−#define CPER_SEC_CXL_GEN_MEDIA_GUID \
690− GUID_INIT(0xfbcd0a77, 0xc260, 0x417f, \
691− 0x85, 0xa9, 0x08, 0x8b, 0x16, 0x21, 0xeb, 0xa6)
692−
693−/*
694− * DRAM Event Record
695− * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
696− */
697−#define CPER_SEC_CXL_DRAM_GUID \
698− GUID_INIT(0x601dcbb3, 0x9c06, 0x4eab, \
699− 0xb8, 0xaf, 0x4e, 0x9b, 0xfb, 0x5c, 0x96, 0x24)
700−
701−/*
702− * Memory Module Event Record
703− * CXL rev 3.0 section 8.2.9.2.1.3; Table 8-45
704− */
705−#define CPER_SEC_CXL_MEM_MODULE_GUID \
706− GUID_INIT(0xfe927475, 0xdd59, 0x4339, \
707− 0xa5, 0x86, 0x79, 0xba, 0xb1, 0x13, 0xb7, 0x74)
708−
709683 static void cxl_cper_post_event(enum cxl_event_type event_type,
710684 struct cxl_cper_event_rec *rec)
711685 {
drivers/android/binder.c+10−0
@@ -478,6 +478,16 @@ binder_enqueue_thread_work_ilocked(struct binder_thread *thread, · 477 unmodified lines
478478 {
479479 WARN_ON(!list_empty(&thread->waiting_thread_node));
480480 binder_enqueue_work_ilocked(work, &thread->todo);
481+
482+ /* (e)poll-based threads require an explicit wakeup signal when
483+ * queuing their own work; they rely on these events to consume
484+ * messages without I/O block. Without it, threads risk waiting
485+ * indefinitely without handling the work.
486+ */
487+ if (thread->looper & BINDER_LOOPER_STATE_POLL &&
488+ thread->pid == current->pid && !thread->process_todo)
489+ wake_up_interruptible_sync(&thread->wait);
490+
481491 thread->process_todo = true;
482492 }
483493
drivers/ata/ahci.c+33−11
@@ -48,6 +48,7 @@ enum { · 47 unmodified lines
4848 enum board_ids {
4949 /* board IDs by feature in alphabetical order */
5050 board_ahci,
51+ board_ahci_43bit_dma,
5152 board_ahci_ign_iferr,
5253 board_ahci_low_power,
5354 board_ahci_no_debounce_delay,
@@ -128,6 +129,13 @@ static const struct ata_port_info ahci_port_info[] = { · 74 unmodified lines
128129 .udma_mask = ATA_UDMA6,
129130 .port_ops = &ahci_ops,
130131 },
132+ [board_ahci_43bit_dma] = {
133+ AHCI_HFLAGS (AHCI_HFLAG_43BIT_ONLY),
134+ .flags = AHCI_FLAG_COMMON,
135+ .pio_mask = ATA_PIO4,
136+ .udma_mask = ATA_UDMA6,
137+ .port_ops = &ahci_ops,
138+ },
131139 [board_ahci_ign_iferr] = {
132140 AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR),
133141 .flags = AHCI_FLAG_COMMON,
@@ -597,14 +605,14 @@ static const struct pci_device_id ahci_pci_tbl[] = { · 463 unmodified lines
597605 { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */
598606 { PCI_VDEVICE(PROMISE, 0x3781), board_ahci }, /* FastTrak TX8660 ahci-mode */
599607
600− /* Asmedia */
601− { PCI_VDEVICE(ASMEDIA, 0x0601), board_ahci }, /* ASM1060 */
602− { PCI_VDEVICE(ASMEDIA, 0x0602), board_ahci }, /* ASM1060 */
603− { PCI_VDEVICE(ASMEDIA, 0x0611), board_ahci }, /* ASM1061 */
604− { PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci }, /* ASM1062 */
605− { PCI_VDEVICE(ASMEDIA, 0x0621), board_ahci }, /* ASM1061R */
606− { PCI_VDEVICE(ASMEDIA, 0x0622), board_ahci }, /* ASM1062R */
607− { PCI_VDEVICE(ASMEDIA, 0x0624), board_ahci }, /* ASM1062+JMB575 */
608+ /* ASMedia */
609+ { PCI_VDEVICE(ASMEDIA, 0x0601), board_ahci_43bit_dma }, /* ASM1060 */
610+ { PCI_VDEVICE(ASMEDIA, 0x0602), board_ahci_43bit_dma }, /* ASM1060 */
611+ { PCI_VDEVICE(ASMEDIA, 0x0611), board_ahci_43bit_dma }, /* ASM1061 */
612+ { PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci_43bit_dma }, /* ASM1061/1062 */
613+ { PCI_VDEVICE(ASMEDIA, 0x0621), board_ahci_43bit_dma }, /* ASM1061R */
614+ { PCI_VDEVICE(ASMEDIA, 0x0622), board_ahci_43bit_dma }, /* ASM1062R */
615+ { PCI_VDEVICE(ASMEDIA, 0x0624), board_ahci_43bit_dma }, /* ASM1062+JMB575 */
608616 { PCI_VDEVICE(ASMEDIA, 0x1062), board_ahci }, /* ASM1062A */
609617 { PCI_VDEVICE(ASMEDIA, 0x1064), board_ahci }, /* ASM1064 */
610618 { PCI_VDEVICE(ASMEDIA, 0x1164), board_ahci }, /* ASM1164 */
@@ -663,6 +671,11 @@ MODULE_PARM_DESC(mobile_lpm_policy, "Default LPM policy for mobile chipsets"); · 52 unmodified lines
663671 static void ahci_pci_save_initial_config(struct pci_dev *pdev,
664672 struct ahci_host_priv *hpriv)
665673 {
674+ if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && pdev->device == 0x1166) {
675+ dev_info(&pdev->dev, "ASM1166 has only six ports\n");
676+ hpriv->saved_port_map = 0x3f;
677+ }
678+
666679 if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361) {
667680 dev_info(&pdev->dev, "JMB361 has only one port\n");
668681 hpriv->saved_port_map = 1;
@@ -949,11 +962,20 @@ static int ahci_pci_device_resume(struct device *dev) · 280 unmodified lines
949962
950963 #endif /* CONFIG_PM */
951964
952−static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
965+static int ahci_configure_dma_masks(struct pci_dev *pdev,
966+ struct ahci_host_priv *hpriv)
953967 {
954− const int dma_bits = using_dac ? 64 : 32;
968+ int dma_bits;
955969 int rc;
956970
971+ if (hpriv->cap & HOST_CAP_64) {
972+ dma_bits = 64;
973+ if (hpriv->flags & AHCI_HFLAG_43BIT_ONLY)
974+ dma_bits = 43;
975+ } else {
976+ dma_bits = 32;
977+ }
978+
957979 /*
958980 * If the device fixup already set the dma_mask to some non-standard
959981 * value, don't extend it here. This happens on STA2X11, for example.
@@ -1926,7 +1948,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 966 unmodified lines
19261948 ahci_gtf_filter_workaround(host);
19271949
19281950 /* initialize adapter */
1929− rc = ahci_configure_dma_masks(pdev, hpriv->cap & HOST_CAP_64);
1951+ rc = ahci_configure_dma_masks(pdev, hpriv);
19301952 if (rc)
19311953 return rc;
19321954
drivers/ata/ahci.h+1−0
@@ -247,6 +247,7 @@ enum { · 246 unmodified lines
247247 AHCI_HFLAG_SUSPEND_PHYS = BIT(26), /* handle PHYs during
248248 suspend/resume */
249249 AHCI_HFLAG_NO_SXS = BIT(28), /* SXS not supported */
250+ AHCI_HFLAG_43BIT_ONLY = BIT(29), /* 43bit DMA addr limit */
250251
251252 /* ap->flags bits */
252253
drivers/ata/libata-sata.c+1−1
@@ -784,7 +784,7 @@ bool sata_lpm_ignore_phy_events(struct ata_link *link) · 783 unmodified lines
784784 EXPORT_SYMBOL_GPL(sata_lpm_ignore_phy_events);
785785
786786 static const char *ata_lpm_policy_names[] = {
787− [ATA_LPM_UNKNOWN] = "max_performance",
787+ [ATA_LPM_UNKNOWN] = "keep_firmware_settings",
788788 [ATA_LPM_MAX_POWER] = "max_performance",
789789 [ATA_LPM_MED_POWER] = "medium_power",
790790 [ATA_LPM_MED_POWER_WITH_DIPM] = "med_power_with_dipm",
drivers/atm/idt77252.c+2−0
@@ -2930,6 +2930,8 @@ open_card_ubr0(struct idt77252_dev *card) · 2929 unmodified lines
29302930 vc->scq = alloc_scq(card, vc->class);
29312931 if (!vc->scq) {
29322932 printk("%s: can't get SCQ.\n", card->name);
2933+ kfree(card->vcs[0]);
2934+ card->vcs[0] = NULL;
29332935 return -ENOMEM;
29342936 }
29352937
drivers/block/aoe/aoeblk.c+4−1
@@ -333,6 +333,7 @@ aoeblk_gdalloc(void *vp) · 332 unmodified lines
333333 struct gendisk *gd;
334334 mempool_t *mp;
335335 struct blk_mq_tag_set *set;
336+ sector_t ssize;
336337 ulong flags;
337338 int late = 0;
338339 int err;
@@ -396,7 +397,7 @@ aoeblk_gdalloc(void *vp) · 57 unmodified lines
396397 gd->minors = AOE_PARTITIONS;
397398 gd->fops = &aoe_bdops;
398399 gd->private_data = d;
399− set_capacity(gd, d->ssize);
400+ ssize = d->ssize;
400401 snprintf(gd->disk_name, sizeof gd->disk_name, "etherd/e%ld.%d",
401402 d->aoemajor, d->aoeminor);
402403
@@ -405,6 +406,8 @@ aoeblk_gdalloc(void *vp) · 2 unmodified lines
405406
406407 spin_unlock_irqrestore(&d->lock, flags);
407408
409+ set_capacity(gd, ssize);
410+
408411 err = device_add_disk(NULL, gd, aoe_attr_groups);
409412 if (err)
410413 goto out_disk_cleanup;
drivers/block/rbd.c+19−13
@@ -3452,14 +3452,15 @@ static bool rbd_lock_add_request(struct rbd_img_request *img_req) · 3451 unmodified lines
34523452 static void rbd_lock_del_request(struct rbd_img_request *img_req)
34533453 {
34543454 struct rbd_device *rbd_dev = img_req->rbd_dev;
3455− bool need_wakeup;
3455+ bool need_wakeup = false;
34563456
34573457 lockdep_assert_held(&rbd_dev->lock_rwsem);
34583458 spin_lock(&rbd_dev->lock_lists_lock);
3459− rbd_assert(!list_empty(&img_req->lock_item));
3460− list_del_init(&img_req->lock_item);
3461− need_wakeup = (rbd_dev->lock_state == RBD_LOCK_STATE_RELEASING &&
3462− list_empty(&rbd_dev->running_list));
3459+ if (!list_empty(&img_req->lock_item)) {
3460+ list_del_init(&img_req->lock_item);
3461+ need_wakeup = (rbd_dev->lock_state == RBD_LOCK_STATE_RELEASING &&
3462+ list_empty(&rbd_dev->running_list));
3463+ }
34633464 spin_unlock(&rbd_dev->lock_lists_lock);
34643465 if (need_wakeup)
34653466 complete(&rbd_dev->releasing_wait);
@@ -3842,14 +3843,19 @@ static void wake_lock_waiters(struct rbd_device *rbd_dev, int result) · 376 unmodified lines
38423843 return;
38433844 }
38443845
3845− list_for_each_entry(img_req, &rbd_dev->acquiring_list, lock_item) {
3846+ while (!list_empty(&rbd_dev->acquiring_list)) {
3847+ img_req = list_first_entry(&rbd_dev->acquiring_list,
3848+ struct rbd_img_request, lock_item);
38463849 mutex_lock(&img_req->state_mutex);
38473850 rbd_assert(img_req->state == RBD_IMG_EXCLUSIVE_LOCK);
3851+ if (!result)
3852+ list_move_tail(&img_req->lock_item,
3853+ &rbd_dev->running_list);
3854+ else
3855+ list_del_init(&img_req->lock_item);
38483856 rbd_img_schedule(img_req, result);
38493857 mutex_unlock(&img_req->state_mutex);
38503858 }
3851−
3852− list_splice_tail_init(&rbd_dev->acquiring_list, &rbd_dev->running_list);
38533859 }
38543860
38553861 static bool locker_equal(const struct ceph_locker *lhs,
@@ -5326,7 +5332,7 @@ static void rbd_dev_release(struct device *dev) · 1470 unmodified lines
53265332
53275333 if (need_put) {
53285334 destroy_workqueue(rbd_dev->task_wq);
5329− ida_simple_remove(&rbd_dev_id_ida, rbd_dev->dev_id);
5335+ ida_free(&rbd_dev_id_ida, rbd_dev->dev_id);
53305336 }
53315337
53325338 rbd_dev_free(rbd_dev);
@@ -5402,9 +5408,9 @@ static struct rbd_device *rbd_dev_create(struct rbd_client *rbdc, · 69 unmodified lines
54025408 return NULL;
54035409
54045410 /* get an id and fill in device name */
5405− rbd_dev->dev_id = ida_simple_get(&rbd_dev_id_ida, 0,
5406− minor_to_rbd_dev_id(1 << MINORBITS),
5407− GFP_KERNEL);
5411+ rbd_dev->dev_id = ida_alloc_max(&rbd_dev_id_ida,
5412+ minor_to_rbd_dev_id(1 << MINORBITS) - 1,
5413+ GFP_KERNEL);
54085414 if (rbd_dev->dev_id < 0)
54095415 goto fail_rbd_dev;
54105416
@@ -5425,7 +5431,7 @@ static struct rbd_device *rbd_dev_create(struct rbd_client *rbdc, · 14 unmodified lines
54255431 return rbd_dev;
54265432
54275433 fail_dev_id:
5428− ida_simple_remove(&rbd_dev_id_ida, rbd_dev->dev_id);
5434+ ida_free(&rbd_dev_id_ida, rbd_dev->dev_id);
54295435 fail_rbd_dev:
54305436 rbd_dev_free(rbd_dev);
54315437 return NULL;
drivers/block/virtio_blk.c+4−3
@@ -1593,14 +1593,15 @@ static int virtblk_freeze(struct virtio_device *vdev) · 1592 unmodified lines
15931593 {
15941594 struct virtio_blk *vblk = vdev->priv;
15951595
1596+ /* Ensure no requests in virtqueues before deleting vqs. */
1597+ blk_mq_freeze_queue(vblk->disk->queue);
1598+
15961599 /* Ensure we don't receive any more interrupts */
15971600 virtio_reset_device(vdev);
15981601
15991602 /* Make sure no work handler is accessing the device. */
16001603 flush_work(&vblk->config_work);
16011604
1602− blk_mq_quiesce_queue(vblk->disk->queue);
1603−
16041605 vdev->config->del_vqs(vdev);
16051606 kfree(vblk->vqs);
16061607
@@ -1618,7 +1619,7 @@ static int virtblk_restore(struct virtio_device *vdev) · 11 unmodified lines
16181619
16191620 virtio_device_ready(vdev);
16201621
1621− blk_mq_unquiesce_queue(vblk->disk->queue);
1622+ blk_mq_unfreeze_queue(vblk->disk->queue);
16221623 return 0;
16231624 }
16241625 #endif
drivers/cpufreq/amd-pstate.c+3−4
@@ -1232,14 +1232,13 @@ static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy) · 1231 unmodified lines
12321232 max_limit_perf = div_u64(policy->max * cpudata->highest_perf, cpudata->max_freq);
12331233 min_limit_perf = div_u64(policy->min * cpudata->highest_perf, cpudata->max_freq);
12341234
1235+ WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);
1236+ WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);
1237+
12351238 max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf,
12361239 cpudata->max_limit_perf);
12371240 min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf,
12381241 cpudata->max_limit_perf);
1239−
1240− WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);
1241− WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);
1242−
12431242 value = READ_ONCE(cpudata->cppc_req_cached);
12441243
12451244 if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
drivers/cpufreq/intel_pstate.c+34−21
@@ -529,6 +529,30 @@ static int intel_pstate_cppc_get_scaling(int cpu) · 528 unmodified lines
529529 }
530530 #endif /* CONFIG_ACPI_CPPC_LIB */
531531
532+static int intel_pstate_freq_to_hwp_rel(struct cpudata *cpu, int freq,
533+ unsigned int relation)
534+{
535+ if (freq == cpu->pstate.turbo_freq)
536+ return cpu->pstate.turbo_pstate;
537+
538+ if (freq == cpu->pstate.max_freq)
539+ return cpu->pstate.max_pstate;
540+
541+ switch (relation) {
542+ case CPUFREQ_RELATION_H:
543+ return freq / cpu->pstate.scaling;
544+ case CPUFREQ_RELATION_C:
545+ return DIV_ROUND_CLOSEST(freq, cpu->pstate.scaling);
546+ }
547+
548+ return DIV_ROUND_UP(freq, cpu->pstate.scaling);
549+}
550+
551+static int intel_pstate_freq_to_hwp(struct cpudata *cpu, int freq)
552+{
553+ return intel_pstate_freq_to_hwp_rel(cpu, freq, CPUFREQ_RELATION_L);
554+}
555+
532556 /**
533557 * intel_pstate_hybrid_hwp_adjust - Calibrate HWP performance levels.
534558 * @cpu: Target CPU.
@@ -546,6 +570,7 @@ static void intel_pstate_hybrid_hwp_adjust(struct cpudata *cpu) · 11 unmodified lines
546570 int perf_ctl_scaling = cpu->pstate.perf_ctl_scaling;
547571 int perf_ctl_turbo = pstate_funcs.get_turbo(cpu->cpu);
548572 int scaling = cpu->pstate.scaling;
573+ int freq;
549574
550575 pr_debug("CPU%d: perf_ctl_max_phys = %d\n", cpu->cpu, perf_ctl_max_phys);
551576 pr_debug("CPU%d: perf_ctl_turbo = %d\n", cpu->cpu, perf_ctl_turbo);
@@ -559,16 +584,16 @@ static void intel_pstate_hybrid_hwp_adjust(struct cpudata *cpu) · 7 unmodified lines
559584 cpu->pstate.max_freq = rounddown(cpu->pstate.max_pstate * scaling,
560585 perf_ctl_scaling);
561586
562− cpu->pstate.max_pstate_physical =
563− DIV_ROUND_UP(perf_ctl_max_phys * perf_ctl_scaling,
564− scaling);
587+ freq = perf_ctl_max_phys * perf_ctl_scaling;
588+ cpu->pstate.max_pstate_physical = intel_pstate_freq_to_hwp(cpu, freq);
565589
566− cpu->pstate.min_freq = cpu->pstate.min_pstate * perf_ctl_scaling;
590+ freq = cpu->pstate.min_pstate * perf_ctl_scaling;
591+ cpu->pstate.min_freq = freq;
567592 /*
568593 * Cast the min P-state value retrieved via pstate_funcs.get_min() to
569594 * the effective range of HWP performance levels.
570595 */
571− cpu->pstate.min_pstate = DIV_ROUND_UP(cpu->pstate.min_freq, scaling);
596+ cpu->pstate.min_pstate = intel_pstate_freq_to_hwp(cpu, freq);
572597 }
573598
574599 static inline void update_turbo_state(void)
@@ -2528,13 +2553,12 @@ static void intel_pstate_update_perf_limits(struct cpudata *cpu, · 1953 unmodified lines
25282553 * abstract values to represent performance rather than pure ratios.
25292554 */
25302555 if (hwp_active && cpu->pstate.scaling != perf_ctl_scaling) {
2531− int scaling = cpu->pstate.scaling;
25322556 int freq;
25332557
25342558 freq = max_policy_perf * perf_ctl_scaling;
2535− max_policy_perf = DIV_ROUND_UP(freq, scaling);
2559+ max_policy_perf = intel_pstate_freq_to_hwp(cpu, freq);
25362560 freq = min_policy_perf * perf_ctl_scaling;
2537− min_policy_perf = DIV_ROUND_UP(freq, scaling);
2561+ min_policy_perf = intel_pstate_freq_to_hwp(cpu, freq);
25382562 }
25392563
25402564 pr_debug("cpu:%d min_policy_perf:%d max_policy_perf:%d\n",
@@ -2908,18 +2932,7 @@ static int intel_cpufreq_target(struct cpufreq_policy *policy, · 367 unmodified lines
29082932
29092933 cpufreq_freq_transition_begin(policy, &freqs);
29102934
2911− switch (relation) {
2912− case CPUFREQ_RELATION_L:
2913− target_pstate = DIV_ROUND_UP(freqs.new, cpu->pstate.scaling);
2914− break;
2915− case CPUFREQ_RELATION_H:
2916− target_pstate = freqs.new / cpu->pstate.scaling;
2917− break;
2918− default:
2919− target_pstate = DIV_ROUND_CLOSEST(freqs.new, cpu->pstate.scaling);
2920− break;
2921− }
2922−
2935+ target_pstate = intel_pstate_freq_to_hwp_rel(cpu, freqs.new, relation);
29232936 target_pstate = intel_cpufreq_update_pstate(policy, target_pstate, false);
29242937
29252938 freqs.new = target_pstate * cpu->pstate.scaling;
@@ -2937,7 +2950,7 @@ static unsigned int intel_cpufreq_fast_switch(struct cpufreq_policy *policy, · 11 unmodified lines
29372950
29382951 update_turbo_state();
29392952
2940− target_pstate = DIV_ROUND_UP(target_freq, cpu->pstate.scaling);
2953+ target_pstate = intel_pstate_freq_to_hwp(cpu, target_freq);
29412954
29422955 target_pstate = intel_cpufreq_update_pstate(policy, target_pstate, true);
29432956
drivers/crypto/caam/caamalg_qi2.c+5−2
@@ -4545,6 +4545,7 @@ struct caam_hash_alg { · 4544 unmodified lines
45454545 struct list_head entry;
45464546 struct device *dev;
45474547 int alg_type;
4548+ bool is_hmac;
45484549 struct ahash_alg ahash_alg;
45494550 };
45504551
@@ -4571,7 +4572,7 @@ static int caam_hash_cra_init(struct crypto_tfm *tfm) · 20 unmodified lines
45714572
45724573 ctx->dev = caam_hash->dev;
45734574
4574− if (alg->setkey) {
4575+ if (caam_hash->is_hmac) {
45754576 ctx->adata.key_dma = dma_map_single_attrs(ctx->dev, ctx->key,
45764577 ARRAY_SIZE(ctx->key),
45774578 DMA_TO_DEVICE,
@@ -4611,7 +4612,7 @@ static int caam_hash_cra_init(struct crypto_tfm *tfm) · 33 unmodified lines
46114612 * For keyed hash algorithms shared descriptors
46124613 * will be created later in setkey() callback
46134614 */
4614− return alg->setkey ? 0 : ahash_set_sh_desc(ahash);
4615+ return caam_hash->is_hmac ? 0 : ahash_set_sh_desc(ahash);
46154616 }
46164617
46174618 static void caam_hash_cra_exit(struct crypto_tfm *tfm)
@@ -4646,12 +4647,14 @@ static struct caam_hash_alg *caam_hash_alloc(struct device *dev, · 28 unmodified lines
46464647 template->hmac_name);
46474648 snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
46484649 template->hmac_driver_name);
4650+ t_alg->is_hmac = true;
46494651 } else {
46504652 snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s",
46514653 template->name);
46524654 snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
46534655 template->driver_name);
46544656 t_alg->ahash_alg.setkey = NULL;
4657+ t_alg->is_hmac = false;
46554658 }
46564659 alg->cra_module = THIS_MODULE;
46574660 alg->cra_init = caam_hash_cra_init;
drivers/crypto/caam/caamhash.c+5−2
@@ -1753,6 +1753,7 @@ static struct caam_hash_template driver_hash[] = { · 1752 unmodified lines
17531753 struct caam_hash_alg {
17541754 struct list_head entry;
17551755 int alg_type;
1756+ bool is_hmac;
17561757 struct ahash_engine_alg ahash_alg;
17571758 };
17581759
@@ -1804,7 +1805,7 @@ static int caam_hash_cra_init(struct crypto_tfm *tfm) · 45 unmodified lines
18041805 } else {
18051806 if (priv->era >= 6) {
18061807 ctx->dir = DMA_BIDIRECTIONAL;
1807− ctx->key_dir = alg->setkey ? DMA_TO_DEVICE : DMA_NONE;
1808+ ctx->key_dir = caam_hash->is_hmac ? DMA_TO_DEVICE : DMA_NONE;
18081809 } else {
18091810 ctx->dir = DMA_TO_DEVICE;
18101811 ctx->key_dir = DMA_NONE;
@@ -1862,7 +1863,7 @@ static int caam_hash_cra_init(struct crypto_tfm *tfm) · 51 unmodified lines
18621863 * For keyed hash algorithms shared descriptors
18631864 * will be created later in setkey() callback
18641865 */
1865− return alg->setkey ? 0 : ahash_set_sh_desc(ahash);
1866+ return caam_hash->is_hmac ? 0 : ahash_set_sh_desc(ahash);
18661867 }
18671868
18681869 static void caam_hash_cra_exit(struct crypto_tfm *tfm)
@@ -1915,12 +1916,14 @@ caam_hash_alloc(struct caam_hash_template *template, · 46 unmodified lines
19151916 template->hmac_name);
19161917 snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
19171918 template->hmac_driver_name);
1919+ t_alg->is_hmac = true;
19181920 } else {
19191921 snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s",
19201922 template->name);
19211923 snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
19221924 template->driver_name);
19231925 halg->setkey = NULL;
1926+ t_alg->is_hmac = false;
19241927 }
19251928 alg->cra_module = THIS_MODULE;
19261929 alg->cra_init = caam_hash_cra_init;
drivers/crypto/ccp/sev-dev.c+8−2
@@ -534,10 +534,16 @@ EXPORT_SYMBOL_GPL(sev_platform_init); · 533 unmodified lines
534534
535535 static int __sev_platform_shutdown_locked(int *error)
536536 {
537− struct sev_device *sev = psp_master->sev_data;
537+ struct psp_device *psp = psp_master;
538+ struct sev_device *sev;
538539 int ret;
539540
540− if (!sev || sev->state == SEV_STATE_UNINIT)
541+ if (!psp || !psp->sev_data)
542+ return 0;
543+
544+ sev = psp->sev_data;
545+
546+ if (sev->state == SEV_STATE_UNINIT)
541547 return 0;
542548
543549 ret = __sev_do_cmd_locked(SEV_CMD_SHUTDOWN, NULL, error);
drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c+1−0
@@ -463,6 +463,7 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id) · 462 unmodified lines
463463 hw_data->fw_name = ADF_402XX_FW;
464464 hw_data->fw_mmp_name = ADF_402XX_MMP;
465465 hw_data->uof_get_name = uof_get_name_402xx;
466+ hw_data->get_ena_thd_mask = get_ena_thd_mask;
466467 break;
467468 case ADF_401XX_PCI_DEVICE_ID:
468469 hw_data->fw_name = ADF_4XXX_FW;
drivers/cxl/core/region.c+2−2
@@ -525,7 +525,7 @@ static int alloc_hpa(struct cxl_region *cxlr, resource_size_t size) · 524 unmodified lines
525525 struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent);
526526 struct cxl_region_params *p = &cxlr->params;
527527 struct resource *res;
528− u32 remainder = 0;
528+ u64 remainder = 0;
529529
530530 lockdep_assert_held_write(&cxl_region_rwsem);
531531
@@ -545,7 +545,7 @@ static int alloc_hpa(struct cxl_region *cxlr, resource_size_t size) · 13 unmodified lines
545545 (cxlr->mode == CXL_DECODER_PMEM && uuid_is_null(&p->uuid)))
546546 return -ENXIO;
547547
548− div_u64_rem(size, SZ_256M * p->interleave_ways, &remainder);
548+ div64_u64_rem(size, (u64)SZ_256M * p->interleave_ways, &remainder);
549549 if (remainder)
550550 return -EINVAL;
551551
drivers/cxl/core/trace.h+3−3
@@ -338,7 +338,7 @@ TRACE_EVENT(cxl_general_media, · 337 unmodified lines
338338
339339 TP_fast_assign(
340340 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
341− memcpy(&__entry->hdr_uuid, &CXL_EVENT_GEN_MEDIA_UUID, sizeof(uuid_t));
341+ __entry->hdr_uuid = CXL_EVENT_GEN_MEDIA_UUID;
342342
343343 /* General Media */
344344 __entry->dpa = le64_to_cpu(rec->phys_addr);
@@ -425,7 +425,7 @@ TRACE_EVENT(cxl_dram, · 80 unmodified lines
425425
426426 TP_fast_assign(
427427 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
428− memcpy(&__entry->hdr_uuid, &CXL_EVENT_DRAM_UUID, sizeof(uuid_t));
428+ __entry->hdr_uuid = CXL_EVENT_DRAM_UUID;
429429
430430 /* DRAM */
431431 __entry->dpa = le64_to_cpu(rec->phys_addr);
@@ -573,7 +573,7 @@ TRACE_EVENT(cxl_memory_module, · 141 unmodified lines
573573
574574 TP_fast_assign(
575575 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
576− memcpy(&__entry->hdr_uuid, &CXL_EVENT_MEM_MODULE_UUID, sizeof(uuid_t));
576+ __entry->hdr_uuid = CXL_EVENT_MEM_MODULE_UUID;
577577
578578 /* Memory Module Event */
579579 __entry->event_type = rec->event_type;
drivers/cxl/pci.c+15−11
@@ -382,7 +382,7 @@ static int cxl_pci_mbox_send(struct cxl_memdev_state *mds, · 381 unmodified lines
382382 return rc;
383383 }
384384
385−static int cxl_pci_setup_mailbox(struct cxl_memdev_state *mds)
385+static int cxl_pci_setup_mailbox(struct cxl_memdev_state *mds, bool irq_avail)
386386 {
387387 struct cxl_dev_state *cxlds = &mds->cxlds;
388388 const int cap = readl(cxlds->regs.mbox + CXLDEV_MBOX_CAPS_OFFSET);
@@ -441,7 +441,7 @@ static int cxl_pci_setup_mailbox(struct cxl_memdev_state *mds) · 52 unmodified lines
441441 INIT_DELAYED_WORK(&mds->security.poll_dwork, cxl_mbox_sanitize_work);
442442
443443 /* background command interrupts are optional */
444− if (!(cap & CXLDEV_MBOX_CAP_BG_CMD_IRQ))
444+ if (!(cap & CXLDEV_MBOX_CAP_BG_CMD_IRQ) || !irq_avail)
445445 return 0;
446446
447447 msgnum = FIELD_GET(CXLDEV_MBOX_CAP_IRQ_MSGNUM_MASK, cap);
@@ -588,7 +588,7 @@ static int cxl_mem_alloc_event_buf(struct cxl_memdev_state *mds) · 140 unmodified lines
588588 return devm_add_action_or_reset(mds->cxlds.dev, free_event_buf, buf);
589589 }
590590
591−static int cxl_alloc_irq_vectors(struct pci_dev *pdev)
591+static bool cxl_alloc_irq_vectors(struct pci_dev *pdev)
592592 {
593593 int nvecs;
594594
@@ -605,9 +605,9 @@ static int cxl_alloc_irq_vectors(struct pci_dev *pdev) · 10 unmodified lines
605605 PCI_IRQ_MSIX | PCI_IRQ_MSI);
606606 if (nvecs < 1) {
607607 dev_dbg(&pdev->dev, "Failed to alloc irq vectors: %d\n", nvecs);
608− return -ENXIO;
608+ return false;
609609 }
610− return 0;
610+ return true;
611611 }
612612
613613 static irqreturn_t cxl_event_thread(int irq, void *id)
@@ -743,7 +743,7 @@ static bool cxl_event_int_is_fw(u8 setting) · 129 unmodified lines
743743 }
744744
745745 static int cxl_event_config(struct pci_host_bridge *host_bridge,
746− struct cxl_memdev_state *mds)
746+ struct cxl_memdev_state *mds, bool irq_avail)
747747 {
748748 struct cxl_event_interrupt_policy policy;
749749 int rc;
@@ -755,6 +755,11 @@ static int cxl_event_config(struct pci_host_bridge *host_bridge, · 5 unmodified lines
755755 if (!host_bridge->native_cxl_error)
756756 return 0;
757757
758+ if (!irq_avail) {
759+ dev_info(mds->cxlds.dev, "No interrupt support, disable event processing.\n");
760+ return 0;
761+ }
762+
758763 rc = cxl_mem_alloc_event_buf(mds);
759764 if (rc)
760765 return rc;
@@ -789,6 +794,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 28 unmodified lines
789794 struct cxl_register_map map;
790795 struct cxl_memdev *cxlmd;
791796 int i, rc, pmu_count;
797+ bool irq_avail;
792798
793799 /*
794800 * Double check the anonymous union trickery in struct cxl_regs
@@ -846,11 +852,9 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 51 unmodified lines
846852 else
847853 dev_warn(&pdev->dev, "Media not active (%d)\n", rc);
848854
849− rc = cxl_alloc_irq_vectors(pdev);
850− if (rc)
851− return rc;
855+ irq_avail = cxl_alloc_irq_vectors(pdev);
852856
853− rc = cxl_pci_setup_mailbox(mds);
857+ rc = cxl_pci_setup_mailbox(mds, irq_avail);
854858 if (rc)
855859 return rc;
856860
@@ -909,7 +913,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 52 unmodified lines
909913 }
910914 }
911915
912− rc = cxl_event_config(host_bridge, mds);
916+ rc = cxl_event_config(host_bridge, mds, irq_avail);
913917 if (rc)
914918 return rc;
915919
drivers/dma-buf/heaps/cma_heap.c+3−4
@@ -168,10 +168,7 @@ static vm_fault_t cma_heap_vm_fault(struct vm_fault *vmf) · 167 unmodified lines
168168 if (vmf->pgoff > buffer->pagecount)
169169 return VM_FAULT_SIGBUS;
170170
171− vmf->page = buffer->pages[vmf->pgoff];
172− get_page(vmf->page);
173−
174− return 0;
171+ return vmf_insert_pfn(vma, vmf->address, page_to_pfn(buffer->pages[vmf->pgoff]));
175172 }
176173
177174 static const struct vm_operations_struct dma_heap_vm_ops = {
@@ -185,6 +182,8 @@ static int cma_heap_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) · 7 unmodified lines
185182 if ((vma->vm_flags & (VM_SHARED | VM_MAYSHARE)) == 0)
186183 return -EINVAL;
187184
185+ vm_flags_set(vma, VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP);
186+
188187 vma->vm_ops = &dma_heap_vm_ops;
189188 vma->vm_private_data = buffer;
190189
drivers/dma/at_hdmac.c+21−11
@@ -222,8 +222,14 @@ struct atdma_sg { · 221 unmodified lines
222222 * @vd: pointer to the virtual dma descriptor.
223223 * @atchan: pointer to the atmel dma channel.
224224 * @total_len: total transaction byte count
225− * @sg_len: number of sg entries.
225+ * @sglen: number of sg entries.
226226 * @sg: array of sgs.
227+ * @boundary: number of transfers to perform before the automatic address increment operation
228+ * @dst_hole: value to add to the destination address when the boundary has been reached
229+ * @src_hole: value to add to the source address when the boundary has been reached
230+ * @memset_buffer: buffer used for the memset operation
231+ * @memset_paddr: physical address of the buffer used for the memset operation
232+ * @memset_vaddr: virtual address of the buffer used for the memset operation
227233 */
228234 struct at_desc {
229235 struct virt_dma_desc vd;
@@ -245,7 +251,10 @@ struct at_desc { · 15 unmodified lines
245251 /*-- Channels --------------------------------------------------------*/
246252
247253 /**
248− * atc_status - information bits stored in channel status flag
254+ * enum atc_status - information bits stored in channel status flag
255+ *
256+ * @ATC_IS_PAUSED: If channel is pauses
257+ * @ATC_IS_CYCLIC: If channel is cyclic
249258 *
250259 * Manipulated with atomic operations.
251260 */
@@ -282,7 +291,6 @@ struct at_dma_chan { · 30 unmodified lines
282291 u32 save_cfg;
283292 u32 save_dscr;
284293 struct dma_slave_config dma_sconfig;
285− bool cyclic;
286294 struct at_desc *desc;
287295 };
288296
@@ -328,12 +336,12 @@ static inline u8 convert_buswidth(enum dma_slave_buswidth addr_width) · 39 unmodified lines
328336 /**
329337 * struct at_dma - internal representation of an Atmel HDMA Controller
330338 * @dma_device: dmaengine dma_device object members
331− * @atdma_devtype: identifier of DMA controller compatibility
332− * @ch_regs: memory mapped register base
339+ * @regs: memory mapped register base
333340 * @clk: dma controller clock
334341 * @save_imr: interrupt mask register that is saved on suspend/resume cycle
335342 * @all_chan_mask: all channels availlable in a mask
336343 * @lli_pool: hw lli table
344+ * @memset_pool: hw memset pool
337345 * @chan: channels table to store at_dma_chan structures
338346 */
339347 struct at_dma {
@@ -626,6 +634,9 @@ static inline u32 atc_calc_bytes_left(u32 current_len, u32 ctrla) · 286 unmodified lines
626634
627635 /**
628636 * atc_get_llis_residue - Get residue for a hardware linked list transfer
637+ * @atchan: pointer to an atmel hdmac channel.
638+ * @desc: pointer to the descriptor for which the residue is calculated.
639+ * @residue: residue to be set to dma_tx_state.
629640 *
630641 * Calculate the residue by removing the length of the Linked List Item (LLI)
631642 * already transferred from the total length. To get the current LLI we can use
@@ -661,10 +672,8 @@ static inline u32 atc_calc_bytes_left(u32 current_len, u32 ctrla) · 29 unmodified lines
661672 * two DSCR values are different, we read again the CTRLA then the DSCR till two
662673 * consecutive read values from DSCR are equal or till the maximum trials is
663674 * reach. This algorithm is very unlikely not to find a stable value for DSCR.
664− * @atchan: pointer to an atmel hdmac channel.
665− * @desc: pointer to the descriptor for which the residue is calculated.
666− * @residue: residue to be set to dma_tx_state.
667− * Returns 0 on success, -errno otherwise.
675+ *
676+ * Returns: %0 on success, -errno otherwise.
668677 */
669678 static int atc_get_llis_residue(struct at_dma_chan *atchan,
670679 struct at_desc *desc, u32 *residue)
@@ -731,7 +740,8 @@ static int atc_get_llis_residue(struct at_dma_chan *atchan, · 60 unmodified lines
731740 * @chan: DMA channel
732741 * @cookie: transaction identifier to check status of
733742 * @residue: residue to be updated.
734− * Return 0 on success, -errono otherwise.
743+ *
744+ * Return: %0 on success, -errno otherwise.
735745 */
736746 static int atc_get_residue(struct dma_chan *chan, dma_cookie_t cookie,
737747 u32 *residue)
@@ -1710,7 +1720,7 @@ static void atc_issue_pending(struct dma_chan *chan) · 972 unmodified lines
17101720 * atc_alloc_chan_resources - allocate resources for DMA channel
17111721 * @chan: allocate descriptor resources for this channel
17121722 *
1713− * return - the number of allocated descriptors
1723+ * Return: the number of allocated descriptors
17141724 */
17151725 static int atc_alloc_chan_resources(struct dma_chan *chan)
17161726 {
drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c+6−4
@@ -38,15 +38,17 @@ static int dpaa2_qdma_alloc_chan_resources(struct dma_chan *chan) · 37 unmodified lines
3838 if (!dpaa2_chan->fd_pool)
3939 goto err;
4040
41− dpaa2_chan->fl_pool = dma_pool_create("fl_pool", dev,
42− sizeof(struct dpaa2_fl_entry),
43− sizeof(struct dpaa2_fl_entry), 0);
41+ dpaa2_chan->fl_pool =
42+ dma_pool_create("fl_pool", dev,
43+ sizeof(struct dpaa2_fl_entry) * 3,
44+ sizeof(struct dpaa2_fl_entry), 0);
45+
4446 if (!dpaa2_chan->fl_pool)
4547 goto err_fd;
4648
4749 dpaa2_chan->sdd_pool =
4850 dma_pool_create("sdd_pool", dev,
49− sizeof(struct dpaa2_qdma_sd_d),
51+ sizeof(struct dpaa2_qdma_sd_d) * 2,
5052 sizeof(struct dpaa2_qdma_sd_d), 0);
5153 if (!dpaa2_chan->sdd_pool)
5254 goto err_fl;
drivers/dma/fsl-qdma.c+12−21
@@ -514,11 +514,11 @@ static struct fsl_qdma_queue · 513 unmodified lines
514514 queue_temp = queue_head + i + (j * queue_num);
515515
516516 queue_temp->cq =
517− dma_alloc_coherent(&pdev->dev,
518− sizeof(struct fsl_qdma_format) *
519− queue_size[i],
520− &queue_temp->bus_addr,
521− GFP_KERNEL);
517+ dmam_alloc_coherent(&pdev->dev,
518+ sizeof(struct fsl_qdma_format) *
519+ queue_size[i],
520+ &queue_temp->bus_addr,
521+ GFP_KERNEL);
522522 if (!queue_temp->cq)
523523 return NULL;
524524 queue_temp->block_base = fsl_qdma->block_base +
@@ -563,15 +563,14 @@ static struct fsl_qdma_queue · 38 unmodified lines
563563 /*
564564 * Buffer for queue command
565565 */
566− status_head->cq = dma_alloc_coherent(&pdev->dev,
567− sizeof(struct fsl_qdma_format) *
568− status_size,
569− &status_head->bus_addr,
570− GFP_KERNEL);
571− if (!status_head->cq) {
572− devm_kfree(&pdev->dev, status_head);
566+ status_head->cq = dmam_alloc_coherent(&pdev->dev,
567+ sizeof(struct fsl_qdma_format) *
568+ status_size,
569+ &status_head->bus_addr,
570+ GFP_KERNEL);
571+ if (!status_head->cq)
573572 return NULL;
574− }
573+
575574 status_head->n_cq = status_size;
576575 status_head->virt_head = status_head->cq;
577576 status_head->virt_tail = status_head->cq;
@@ -1268,8 +1267,6 @@ static void fsl_qdma_cleanup_vchan(struct dma_device *dmadev) · 690 unmodified lines
12681267
12691268 static void fsl_qdma_remove(struct platform_device *pdev)
12701269 {
1271− int i;
1272− struct fsl_qdma_queue *status;
12731270 struct device_node *np = pdev->dev.of_node;
12741271 struct fsl_qdma_engine *fsl_qdma = platform_get_drvdata(pdev);
12751272
@@ -1277,12 +1274,6 @@ static void fsl_qdma_remove(struct platform_device *pdev) · 1 unmodified line
12771274 fsl_qdma_cleanup_vchan(&fsl_qdma->dma_dev);
12781275 of_dma_controller_free(np);
12791276 dma_async_device_unregister(&fsl_qdma->dma_dev);
1280−
1281− for (i = 0; i < fsl_qdma->block_number; i++) {
1282− status = fsl_qdma->status[i];
1283− dma_free_coherent(&pdev->dev, sizeof(struct fsl_qdma_format) *
1284− status->n_cq, status->cq, status->bus_addr);
1285− }
12861277 }
12871278
12881279 static const struct of_device_id fsl_qdma_dt_ids[] = {
drivers/dma/ti/edma.c+10−0
@@ -2404,6 +2404,11 @@ static int edma_probe(struct platform_device *pdev) · 2403 unmodified lines
24042404 if (irq > 0) {
24052405 irq_name = devm_kasprintf(dev, GFP_KERNEL, "%s_ccint",
24062406 dev_name(dev));
2407+ if (!irq_name) {
2408+ ret = -ENOMEM;
2409+ goto err_disable_pm;
2410+ }
2411+
24072412 ret = devm_request_irq(dev, irq, dma_irq_handler, 0, irq_name,
24082413 ecc);
24092414 if (ret) {
@@ -2420,6 +2425,11 @@ static int edma_probe(struct platform_device *pdev) · 10 unmodified lines
24202425 if (irq > 0) {
24212426 irq_name = devm_kasprintf(dev, GFP_KERNEL, "%s_ccerrint",
24222427 dev_name(dev));
2428+ if (!irq_name) {
2429+ ret = -ENOMEM;
2430+ goto err_disable_pm;
2431+ }
2432+
24232433 ret = devm_request_irq(dev, irq, dma_ccerr_handler, 0, irq_name,
24242434 ecc);
24252435 if (ret) {
drivers/dma/ti/k3-udma.c+8−2
@@ -3968,6 +3968,7 @@ static void udma_desc_pre_callback(struct virt_dma_chan *vc, · 3967 unmodified lines
39683968 {
39693969 struct udma_chan *uc = to_udma_chan(&vc->chan);
39703970 struct udma_desc *d;
3971+ u8 status;
39713972
39723973 if (!vd)
39733974 return;
@@ -3977,12 +3978,12 @@ static void udma_desc_pre_callback(struct virt_dma_chan *vc, · 3 unmodified lines
39773978 if (d->metadata_size)
39783979 udma_fetch_epib(uc, d);
39793980
3980− /* Provide residue information for the client */
39813981 if (result) {
39823982 void *desc_vaddr = udma_curr_cppi5_desc_vaddr(d, d->desc_idx);
39833983
39843984 if (cppi5_desc_get_type(desc_vaddr) ==
39853985 CPPI5_INFO0_DESC_TYPE_VAL_HOST) {
3986+ /* Provide residue information for the client */
39863987 result->residue = d->residue -
39873988 cppi5_hdesc_get_pktlen(desc_vaddr);
39883989 if (result->residue)
@@ -3991,7 +3992,12 @@ static void udma_desc_pre_callback(struct virt_dma_chan *vc, · 2 unmodified lines
39913992 result->result = DMA_TRANS_NOERROR;
39923993 } else {
39933994 result->residue = 0;
3994− result->result = DMA_TRANS_NOERROR;
3995+ /* Propagate TR Response errors to the client */
3996+ status = d->hwdesc[0].tr_resp_base->status;
3997+ if (status)
3998+ result->result = DMA_TRANS_ABORTED;
3999+ else
4000+ result->result = DMA_TRANS_NOERROR;
39954001 }
39964002 }
39974003 }
drivers/dpll/dpll_core.c+57−11
@@ -29,8 +29,6 @@ static u32 dpll_pin_xa_id; · 28 unmodified lines
2929 WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED))
3030 #define ASSERT_DPLL_NOT_REGISTERED(d) \
3131 WARN_ON_ONCE(xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED))
32−#define ASSERT_PIN_REGISTERED(p) \
33− WARN_ON_ONCE(!xa_get_mark(&dpll_pin_xa, (p)->id, DPLL_REGISTERED))
3432
3533 struct dpll_device_registration {
3634 struct list_head list;
@@ -425,6 +423,53 @@ void dpll_device_unregister(struct dpll_device *dpll, · 388 unmodified lines
425423 }
426424 EXPORT_SYMBOL_GPL(dpll_device_unregister);
427425
426+static void dpll_pin_prop_free(struct dpll_pin_properties *prop)
427+{
428+ kfree(prop->package_label);
429+ kfree(prop->panel_label);
430+ kfree(prop->board_label);
431+ kfree(prop->freq_supported);
432+}
433+
434+static int dpll_pin_prop_dup(const struct dpll_pin_properties *src,
435+ struct dpll_pin_properties *dst)
436+{
437+ memcpy(dst, src, sizeof(*dst));
438+ if (src->freq_supported && src->freq_supported_num) {
439+ size_t freq_size = src->freq_supported_num *
440+ sizeof(*src->freq_supported);
441+ dst->freq_supported = kmemdup(src->freq_supported,
442+ freq_size, GFP_KERNEL);
443+ if (!src->freq_supported)
444+ return -ENOMEM;
445+ }
446+ if (src->board_label) {
447+ dst->board_label = kstrdup(src->board_label, GFP_KERNEL);
448+ if (!dst->board_label)
449+ goto err_board_label;
450+ }
451+ if (src->panel_label) {
452+ dst->panel_label = kstrdup(src->panel_label, GFP_KERNEL);
453+ if (!dst->panel_label)
454+ goto err_panel_label;
455+ }
456+ if (src->package_label) {
457+ dst->package_label = kstrdup(src->package_label, GFP_KERNEL);
458+ if (!dst->package_label)
459+ goto err_package_label;
460+ }
461+
462+ return 0;
463+
464+err_package_label:
465+ kfree(dst->panel_label);
466+err_panel_label:
467+ kfree(dst->board_label);
468+err_board_label:
469+ kfree(dst->freq_supported);
470+ return -ENOMEM;
471+}
472+
428473 static struct dpll_pin *
429474 dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
430475 const struct dpll_pin_properties *prop)
@@ -441,20 +486,24 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, · 10 unmodified lines
441486 if (WARN_ON(prop->type < DPLL_PIN_TYPE_MUX ||
442487 prop->type > DPLL_PIN_TYPE_MAX)) {
443488 ret = -EINVAL;
444− goto err;
489+ goto err_pin_prop;
445490 }
446− pin->prop = prop;
491+ ret = dpll_pin_prop_dup(prop, &pin->prop);
492+ if (ret)
493+ goto err_pin_prop;
447494 refcount_set(&pin->refcount, 1);
448495 xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC);
449496 xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC);
450497 ret = xa_alloc_cyclic(&dpll_pin_xa, &pin->id, pin, xa_limit_32b,
451498 &dpll_pin_xa_id, GFP_KERNEL);
452499 if (ret)
453− goto err;
500+ goto err_xa_alloc;
454501 return pin;
455−err:
502+err_xa_alloc:
456503 xa_destroy(&pin->dpll_refs);
457504 xa_destroy(&pin->parent_refs);
505+ dpll_pin_prop_free(&pin->prop);
506+err_pin_prop:
458507 kfree(pin);
459508 return ERR_PTR(ret);
460509 }
@@ -514,6 +563,7 @@ void dpll_pin_put(struct dpll_pin *pin) · 53 unmodified lines
514563 xa_destroy(&pin->dpll_refs);
515564 xa_destroy(&pin->parent_refs);
516565 xa_erase(&dpll_pin_xa, pin->id);
566+ dpll_pin_prop_free(&pin->prop);
517567 kfree(pin);
518568 }
519569 mutex_unlock(&dpll_lock);
@@ -564,8 +614,6 @@ dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, · 44 unmodified lines
564614 WARN_ON(!ops->state_on_dpll_get) ||
565615 WARN_ON(!ops->direction_get))
566616 return -EINVAL;
567− if (ASSERT_DPLL_REGISTERED(dpll))
568− return -EINVAL;
569617
570618 mutex_lock(&dpll_lock);
571619 if (WARN_ON(!(dpll->module == pin->module &&
@@ -636,15 +684,13 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, · 64 unmodified lines
636684 unsigned long i, stop;
637685 int ret;
638686
639− if (WARN_ON(parent->prop->type != DPLL_PIN_TYPE_MUX))
687+ if (WARN_ON(parent->prop.type != DPLL_PIN_TYPE_MUX))
640688 return -EINVAL;
641689
642690 if (WARN_ON(!ops) ||
643691 WARN_ON(!ops->state_on_pin_get) ||
644692 WARN_ON(!ops->direction_get))
645693 return -EINVAL;
646− if (ASSERT_PIN_REGISTERED(parent))
647− return -EINVAL;
648694
649695 mutex_lock(&dpll_lock);
650696 ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv);
drivers/dpll/dpll_core.h+2−2
@@ -44,7 +44,7 @@ struct dpll_device { · 43 unmodified lines
4444 * @module: module of creator
4545 * @dpll_refs: hold referencees to dplls pin was registered with
4646 * @parent_refs: hold references to parent pins pin was registered with
47− * @prop: pointer to pin properties given by registerer
47+ * @prop: pin properties copied from the registerer
4848 * @rclk_dev_name: holds name of device when pin can recover clock from it
4949 * @refcount: refcount
5050 **/
@@ -55,7 +55,7 @@ struct dpll_pin { · 4 unmodified lines
5555 struct module *module;
5656 struct xarray dpll_refs;
5757 struct xarray parent_refs;
58− const struct dpll_pin_properties *prop;
58+ struct dpll_pin_properties prop;
5959 refcount_t refcount;
6060 };
6161
drivers/dpll/dpll_netlink.c+41−16
@@ -303,17 +303,17 @@ dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, · 302 unmodified lines
303303 if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY, sizeof(freq), &freq,
304304 DPLL_A_PIN_PAD))
305305 return -EMSGSIZE;
306− for (fs = 0; fs < pin->prop->freq_supported_num; fs++) {
306+ for (fs = 0; fs < pin->prop.freq_supported_num; fs++) {
307307 nest = nla_nest_start(msg, DPLL_A_PIN_FREQUENCY_SUPPORTED);
308308 if (!nest)
309309 return -EMSGSIZE;
310− freq = pin->prop->freq_supported[fs].min;
310+ freq = pin->prop.freq_supported[fs].min;
311311 if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MIN, sizeof(freq),
312312 &freq, DPLL_A_PIN_PAD)) {
313313 nla_nest_cancel(msg, nest);
314314 return -EMSGSIZE;
315315 }
316− freq = pin->prop->freq_supported[fs].max;
316+ freq = pin->prop.freq_supported[fs].max;
317317 if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MAX, sizeof(freq),
318318 &freq, DPLL_A_PIN_PAD)) {
319319 nla_nest_cancel(msg, nest);
@@ -329,9 +329,9 @@ static bool dpll_pin_is_freq_supported(struct dpll_pin *pin, u32 freq) · 9 unmodified lines
329329 {
330330 int fs;
331331
332− for (fs = 0; fs < pin->prop->freq_supported_num; fs++)
333− if (freq >= pin->prop->freq_supported[fs].min &&
334− freq <= pin->prop->freq_supported[fs].max)
332+ for (fs = 0; fs < pin->prop.freq_supported_num; fs++)
333+ if (freq >= pin->prop.freq_supported[fs].min &&
334+ freq <= pin->prop.freq_supported[fs].max)
335335 return true;
336336 return false;
337337 }
@@ -421,7 +421,7 @@ static int · 83 unmodified lines
421421 dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin,
422422 struct netlink_ext_ack *extack)
423423 {
424− const struct dpll_pin_properties *prop = pin->prop;
424+ const struct dpll_pin_properties *prop = &pin->prop;
425425 struct dpll_pin_ref *ref;
426426 int ret;
427427
@@ -553,6 +553,24 @@ __dpll_device_change_ntf(struct dpll_device *dpll) · 125 unmodified lines
553553 return dpll_device_event_send(DPLL_CMD_DEVICE_CHANGE_NTF, dpll);
554554 }
555555
556+static bool dpll_pin_available(struct dpll_pin *pin)
557+{
558+ struct dpll_pin_ref *par_ref;
559+ unsigned long i;
560+
561+ if (!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED))
562+ return false;
563+ xa_for_each(&pin->parent_refs, i, par_ref)
564+ if (xa_get_mark(&dpll_pin_xa, par_ref->pin->id,
565+ DPLL_REGISTERED))
566+ return true;
567+ xa_for_each(&pin->dpll_refs, i, par_ref)
568+ if (xa_get_mark(&dpll_device_xa, par_ref->dpll->id,
569+ DPLL_REGISTERED))
570+ return true;
571+ return false;
572+}
573+
556574 /**
557575 * dpll_device_change_ntf - notify that the dpll device has been changed
558576 * @dpll: registered dpll pointer
@@ -579,7 +597,7 @@ dpll_pin_event_send(enum dpll_cmd event, struct dpll_pin *pin) · 20 unmodified lines
579597 int ret = -ENOMEM;
580598 void *hdr;
581599
582− if (WARN_ON(!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED)))
600+ if (!dpll_pin_available(pin))
583601 return -ENODEV;
584602
585603 msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL);
@@ -717,7 +735,7 @@ dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, · 131 unmodified lines
717735 int ret;
718736
719737 if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE &
720− pin->prop->capabilities)) {
738+ pin->prop.capabilities)) {
721739 NL_SET_ERR_MSG(extack, "state changing is not allowed");
722740 return -EOPNOTSUPP;
723741 }
@@ -753,7 +771,7 @@ dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, · 29 unmodified lines
753771 int ret;
754772
755773 if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE &
756− pin->prop->capabilities)) {
774+ pin->prop.capabilities)) {
757775 NL_SET_ERR_MSG(extack, "state changing is not allowed");
758776 return -EOPNOTSUPP;
759777 }
@@ -780,7 +798,7 @@ dpll_pin_prio_set(struct dpll_device *dpll, struct dpll_pin *pin, · 20 unmodified lines
780798 int ret;
781799
782800 if (!(DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE &
783− pin->prop->capabilities)) {
801+ pin->prop.capabilities)) {
784802 NL_SET_ERR_MSG(extack, "prio changing is not allowed");
785803 return -EOPNOTSUPP;
786804 }
@@ -808,7 +826,7 @@ dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, · 21 unmodified lines
808826 int ret;
809827
810828 if (!(DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE &
811− pin->prop->capabilities)) {
829+ pin->prop.capabilities)) {
812830 NL_SET_ERR_MSG(extack, "direction changing is not allowed");
813831 return -EOPNOTSUPP;
814832 }
@@ -838,8 +856,8 @@ dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, · 23 unmodified lines
838856 int ret;
839857
840858 phase_adj = nla_get_s32(phase_adj_attr);
841− if (phase_adj > pin->prop->phase_range.max ||
842− phase_adj < pin->prop->phase_range.min) {
859+ if (phase_adj > pin->prop.phase_range.max ||
860+ phase_adj < pin->prop.phase_range.min) {
843861 NL_SET_ERR_MSG_ATTR(extack, phase_adj_attr,
844862 "phase adjust value not supported");
845863 return -EINVAL;
@@ -1023,7 +1041,7 @@ dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, · 177 unmodified lines
10231041 unsigned long i;
10241042
10251043 xa_for_each_marked(&dpll_pin_xa, i, pin, DPLL_REGISTERED) {
1026− prop = pin->prop;
1044+ prop = &pin->prop;
10271045 cid_match = clock_id ? pin->clock_id == clock_id : true;
10281046 mod_match = mod_name_attr && module_name(pin->module) ?
10291047 !nla_strcmp(mod_name_attr,
@@ -1130,6 +1148,10 @@ int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info) · 100 unmodified lines
11301148 }
11311149 pin = dpll_pin_find_from_nlattr(info);
11321150 if (!IS_ERR(pin)) {
1151+ if (!dpll_pin_available(pin)) {
1152+ nlmsg_free(msg);
1153+ return -ENODEV;
1154+ }
11331155 ret = dpll_msg_add_pin_handle(msg, pin);
11341156 if (ret) {
11351157 nlmsg_free(msg);
@@ -1179,6 +1201,8 @@ int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) · 43 unmodified lines
11791201
11801202 xa_for_each_marked_start(&dpll_pin_xa, i, pin, DPLL_REGISTERED,
11811203 ctx->idx) {
1204+ if (!dpll_pin_available(pin))
1205+ continue;
11821206 hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid,
11831207 cb->nlh->nlmsg_seq,
11841208 &dpll_nl_family, NLM_F_MULTI,
@@ -1441,7 +1465,8 @@ int dpll_pin_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb, · 256 unmodified lines
14411465 }
14421466 info->user_ptr[0] = xa_load(&dpll_pin_xa,
14431467 nla_get_u32(info->attrs[DPLL_A_PIN_ID]));
1444− if (!info->user_ptr[0]) {
1468+ if (!info->user_ptr[0] ||
1469+ !dpll_pin_available(info->user_ptr[0])) {
14451470 NL_SET_ERR_MSG(info->extack, "pin not found");
14461471 ret = -ENODEV;
14471472 goto unlock_dev;
drivers/firewire/core-card.c+17−1
@@ -429,7 +429,23 @@ static void bm_work(struct work_struct *work) · 428 unmodified lines
429429 */
430430 card->bm_generation = generation;
431431
432− if (root_device == NULL) {
432+ if (card->gap_count == 0) {
433+ /*
434+ * If self IDs have inconsistent gap counts, do a
435+ * bus reset ASAP. The config rom read might never
436+ * complete, so don't wait for it. However, still
437+ * send a PHY configuration packet prior to the
438+ * bus reset. The PHY configuration packet might
439+ * fail, but 1394-2008 8.4.5.2 explicitly permits
440+ * it in this case, so it should be safe to try.
441+ */
442+ new_root_id = local_id;
443+ /*
444+ * We must always send a bus reset if the gap count
445+ * is inconsistent, so bypass the 5-reset limit.
446+ */
447+ card->bm_retries = 0;
448+ } else if (root_device == NULL) {
433449 /*
434450 * Either link_on is false, or we failed to read the
435451 * config rom. In either case, pick another root.
drivers/firewire/core-device.c+13−5
@@ -118,10 +118,9 @@ static int textual_leaf_to_string(const u32 *block, char *buf, size_t size) · 117 unmodified lines
118118 * @buf: where to put the string
119119 * @size: size of @buf, in bytes
120120 *
121− * The string is taken from a minimal ASCII text descriptor leaf after
122− * the immediate entry with @key. The string is zero-terminated.
123− * An overlong string is silently truncated such that it and the
124− * zero byte fit into @size.
121+ * The string is taken from a minimal ASCII text descriptor leaf just after the entry with the
122+ * @key. The string is zero-terminated. An overlong string is silently truncated such that it
123+ * and the zero byte fit into @size.
125124 *
126125 * Returns strlen(buf) or a negative error code.
127126 */
@@ -368,8 +367,17 @@ static ssize_t show_text_leaf(struct device *dev, · 240 unmodified lines
368367 for (i = 0; i < ARRAY_SIZE(directories) && !!directories[i]; ++i) {
369368 int result = fw_csr_string(directories[i], attr->key, buf, bufsize);
370369 // Detected.
371− if (result >= 0)
370+ if (result >= 0) {
372371 ret = result;
372+ } else if (i == 0 && attr->key == CSR_VENDOR) {
373+ // Sony DVMC-DA1 has configuration ROM such that the descriptor leaf entry
374+ // in the root directory follows to the directory entry for vendor ID
375+ // instead of the immediate value for vendor ID.
376+ result = fw_csr_string(directories[i], CSR_DIRECTORY | attr->key, buf,
377+ bufsize);
378+ if (result >= 0)
379+ ret = result;
380+ }
373381 }
374382
375383 if (ret >= 0) {
drivers/firmware/arm_ffa/driver.c+57−28
@@ -107,12 +107,12 @@ struct ffa_drv_info { · 106 unmodified lines
107107 struct work_struct notif_pcpu_work;
108108 struct work_struct irq_work;
109109 struct xarray partition_info;
110− unsigned int partition_count;
111110 DECLARE_HASHTABLE(notifier_hash, ilog2(FFA_MAX_NOTIFICATIONS));
112111 struct mutex notify_lock; /* lock to protect notifier hashtable */
113112 };
114113
115114 static struct ffa_drv_info *drv_info;
115+static void ffa_partitions_cleanup(void);
116116
117117 /*
118118 * The driver must be able to support all the versions from the earliest
@@ -733,6 +733,11 @@ static void __do_sched_recv_cb(u16 part_id, u16 vcpu, bool is_per_vcpu) · 614 unmodified lines
733733 void *cb_data;
734734
735735 partition = xa_load(&drv_info->partition_info, part_id);
736+ if (!partition) {
737+ pr_err("%s: Invalid partition ID 0x%x\n", __func__, part_id);
738+ return;
739+ }
740+
736741 read_lock(&partition->rw_lock);
737742 callback = partition->callback;
738743 cb_data = partition->cb_data;
@@ -915,6 +920,11 @@ static int ffa_sched_recv_cb_update(u16 part_id, ffa_sched_recv_cb callback, · 176 unmodified lines
915920 return -EOPNOTSUPP;
916921
917922 partition = xa_load(&drv_info->partition_info, part_id);
923+ if (!partition) {
924+ pr_err("%s: Invalid partition ID 0x%x\n", __func__, part_id);
925+ return -EINVAL;
926+ }
927+
918928 write_lock(&partition->rw_lock);
919929
920930 cb_valid = !!partition->callback;
@@ -1186,9 +1196,9 @@ void ffa_device_match_uuid(struct ffa_device *ffa_dev, const uuid_t *uuid) · 265 unmodified lines
11861196 kfree(pbuf);
11871197 }
11881198
1189−static void ffa_setup_partitions(void)
1199+static int ffa_setup_partitions(void)
11901200 {
1191− int count, idx;
1201+ int count, idx, ret;
11921202 uuid_t uuid;
11931203 struct ffa_device *ffa_dev;
11941204 struct ffa_dev_part_info *info;
@@ -1197,7 +1207,7 @@ static void ffa_setup_partitions(void) · 2 unmodified lines
11971207 count = ffa_partition_probe(&uuid_null, &pbuf);
11981208 if (count <= 0) {
11991209 pr_info("%s: No partitions found, error %d\n", __func__, count);
1200− return;
1210+ return -EINVAL;
12011211 }
12021212
12031213 xa_init(&drv_info->partition_info);
@@ -1226,40 +1236,53 @@ static void ffa_setup_partitions(void) · 22 unmodified lines
12261236 ffa_device_unregister(ffa_dev);
12271237 continue;
12281238 }
1229− xa_store(&drv_info->partition_info, tpbuf->id, info, GFP_KERNEL);
1239+ rwlock_init(&info->rw_lock);
1240+ ret = xa_insert(&drv_info->partition_info, tpbuf->id,
1241+ info, GFP_KERNEL);
1242+ if (ret) {
1243+ pr_err("%s: failed to save partition ID 0x%x - ret:%d\n",
1244+ __func__, tpbuf->id, ret);
1245+ ffa_device_unregister(ffa_dev);
1246+ kfree(info);
1247+ }
12301248 }
1231− drv_info->partition_count = count;
12321249
12331250 kfree(pbuf);
12341251
12351252 /* Allocate for the host */
12361253 info = kzalloc(sizeof(*info), GFP_KERNEL);
1237− if (!info)
1238− return;
1239− xa_store(&drv_info->partition_info, drv_info->vm_id, info, GFP_KERNEL);
1240− drv_info->partition_count++;
1254+ if (!info) {
1255+ pr_err("%s: failed to alloc Host partition ID 0x%x. Abort.\n",
1256+ __func__, drv_info->vm_id);
1257+ /* Already registered devices are freed on bus_exit */
1258+ ffa_partitions_cleanup();
1259+ return -ENOMEM;
1260+ }
1261+
1262+ rwlock_init(&info->rw_lock);
1263+ ret = xa_insert(&drv_info->partition_info, drv_info->vm_id,
1264+ info, GFP_KERNEL);
1265+ if (ret) {
1266+ pr_err("%s: failed to save Host partition ID 0x%x - ret:%d. Abort.\n",
1267+ __func__, drv_info->vm_id, ret);
1268+ kfree(info);
1269+ /* Already registered devices are freed on bus_exit */
1270+ ffa_partitions_cleanup();
1271+ }
1272+
1273+ return ret;
12411274 }
12421275
12431276 static void ffa_partitions_cleanup(void)
12441277 {
1245− struct ffa_dev_part_info **info;
1246− int idx, count = drv_info->partition_count;
1247−
1248− if (!count)
1249− return;
1250−
1251− info = kcalloc(count, sizeof(*info), GFP_KERNEL);
1252− if (!info)
1253− return;
1254−
1255− xa_extract(&drv_info->partition_info, (void **)info, 0, VM_ID_MASK,
1256− count, XA_PRESENT);
1278+ struct ffa_dev_part_info *info;
1279+ unsigned long idx;
12571280
1258− for (idx = 0; idx < count; idx++)
1259− kfree(info[idx]);
1260− kfree(info);
1281+ xa_for_each(&drv_info->partition_info, idx, info) {
1282+ xa_erase(&drv_info->partition_info, idx);
1283+ kfree(info);
1284+ }
12611285
1262− drv_info->partition_count = 0;
12631286 xa_destroy(&drv_info->partition_info);
12641287 }
12651288
@@ -1508,7 +1531,11 @@ static int __init ffa_init(void) · 242 unmodified lines
15081531
15091532 ffa_notifications_setup();
15101533
1511− ffa_setup_partitions();
1534+ ret = ffa_setup_partitions();
1535+ if (ret) {
1536+ pr_err("failed to setup partitions\n");
1537+ goto cleanup_notifs;
1538+ }
15121539
15131540 ret = ffa_sched_recv_cb_update(drv_info->vm_id, ffa_self_notif_handle,
15141541 drv_info, true);
@@ -1516,6 +1543,9 @@ static int __init ffa_init(void) · 1 unmodified line
15161543 pr_info("Failed to register driver sched callback %d\n", ret);
15171544
15181545 return 0;
1546+
1547+cleanup_notifs:
1548+ ffa_notifications_cleanup();
15191549 free_pages:
15201550 if (drv_info->tx_buffer)
15211551 free_pages_exact(drv_info->tx_buffer, RXTX_BUFFER_SIZE);
@@ -1535,7 +1565,6 @@ static void __exit ffa_exit(void) · 13 unmodified lines
15351565 ffa_rxtx_unmap(drv_info->vm_id);
15361566 free_pages_exact(drv_info->tx_buffer, RXTX_BUFFER_SIZE);
15371567 free_pages_exact(drv_info->rx_buffer, RXTX_BUFFER_SIZE);
1538− xa_destroy(&drv_info->partition_info);
15391568 kfree(drv_info);
15401569 arm_ffa_bus_exit();
15411570 }
drivers/firmware/arm_scmi/clock.c+2−3
@@ -13,7 +13,7 @@ · 12 unmodified lines
1313 #include "notify.h"
1414
1515 /* Updated only after ALL the mandatory features for that version are merged */
16−#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x20001
16+#define SCMI_PROTOCOL_SUPPORTED_VERSION 0x20000
1717
1818 enum scmi_clock_protocol_cmd {
1919 CLOCK_ATTRIBUTES = 0x3,
@@ -954,8 +954,7 @@ static int scmi_clock_protocol_init(const struct scmi_protocol_handle *ph) · 934 unmodified lines
954954 scmi_clock_describe_rates_get(ph, clkid, clk);
955955 }
956956
957− if (PROTOCOL_REV_MAJOR(version) >= 0x2 &&
958− PROTOCOL_REV_MINOR(version) >= 0x1) {
957+ if (PROTOCOL_REV_MAJOR(version) >= 0x3) {
959958 cinfo->clock_config_set = scmi_clock_config_set_v2;
960959 cinfo->clock_config_get = scmi_clock_config_get_v2;
961960 } else {
drivers/firmware/arm_scmi/common.h+1−0
@@ -314,6 +314,7 @@ void shmem_fetch_notification(struct scmi_shared_mem __iomem *shmem, · 313 unmodified lines
314314 void shmem_clear_channel(struct scmi_shared_mem __iomem *shmem);
315315 bool shmem_poll_done(struct scmi_shared_mem __iomem *shmem,
316316 struct scmi_xfer *xfer);
317+bool shmem_channel_free(struct scmi_shared_mem __iomem *shmem);
317318
318319 /* declarations for message passing transports */
319320 struct scmi_msg_payld;
drivers/firmware/arm_scmi/mailbox.c+14−0
@@ -45,6 +45,20 @@ static void rx_callback(struct mbox_client *cl, void *m) · 44 unmodified lines
4545 {
4646 struct scmi_mailbox *smbox = client_to_scmi_mailbox(cl);
4747
48+ /*
49+ * An A2P IRQ is NOT valid when received while the platform still has
50+ * the ownership of the channel, because the platform at first releases
51+ * the SMT channel and then sends the completion interrupt.
52+ *
53+ * This addresses a possible race condition in which a spurious IRQ from
54+ * a previous timed-out reply which arrived late could be wrongly
55+ * associated with the next pending transaction.
56+ */
57+ if (cl->knows_txdone && !shmem_channel_free(smbox->shmem)) {
58+ dev_warn(smbox->cinfo->dev, "Ignoring spurious A2P IRQ !\n");
59+ return;
60+ }
61+
4862 scmi_rx_callback(smbox->cinfo, shmem_read_header(smbox->shmem), NULL);
4963 }
5064
drivers/firmware/arm_scmi/perf.c+18−5
@@ -350,8 +350,8 @@ process_response_opp(struct scmi_opp *opp, unsigned int loop_idx, · 349 unmodified lines
350350 }
351351
352352 static inline void
353−process_response_opp_v4(struct perf_dom_info *dom, struct scmi_opp *opp,
354− unsigned int loop_idx,
353+process_response_opp_v4(struct device *dev, struct perf_dom_info *dom,
354+ struct scmi_opp *opp, unsigned int loop_idx,
355355 const struct scmi_msg_resp_perf_describe_levels_v4 *r)
356356 {
357357 opp->perf = le32_to_cpu(r->opp[loop_idx].perf_val);
@@ -362,10 +362,23 @@ process_response_opp_v4(struct perf_dom_info *dom, struct scmi_opp *opp, · 4 unmodified lines
362362 /* Note that PERF v4 reports always five 32-bit words */
363363 opp->indicative_freq = le32_to_cpu(r->opp[loop_idx].indicative_freq);
364364 if (dom->level_indexing_mode) {
365+ int ret;
366+
365367 opp->level_index = le32_to_cpu(r->opp[loop_idx].level_index);
366368
367− xa_store(&dom->opps_by_idx, opp->level_index, opp, GFP_KERNEL);
368− xa_store(&dom->opps_by_lvl, opp->perf, opp, GFP_KERNEL);
369+ ret = xa_insert(&dom->opps_by_idx, opp->level_index, opp,
370+ GFP_KERNEL);
371+ if (ret)
372+ dev_warn(dev,
373+ "Failed to add opps_by_idx at %d - ret:%d\n",
374+ opp->level_index, ret);
375+
376+ ret = xa_insert(&dom->opps_by_lvl, opp->perf, opp, GFP_KERNEL);
377+ if (ret)
378+ dev_warn(dev,
379+ "Failed to add opps_by_lvl at %d - ret:%d\n",
380+ opp->perf, ret);
381+
369382 hash_add(dom->opps_by_freq, &opp->hash, opp->indicative_freq);
370383 }
371384 }
@@ -382,7 +395,7 @@ iter_perf_levels_process_response(const struct scmi_protocol_handle *ph, · 10 unmodified lines
382395 if (PROTOCOL_REV_MAJOR(p->version) <= 0x3)
383396 process_response_opp(opp, st->loop_idx, response);
384397 else
385− process_response_opp_v4(p->perf_dom, opp, st->loop_idx,
398+ process_response_opp_v4(ph->dev, p->perf_dom, opp, st->loop_idx,
386399 response);
387400 p->perf_dom->opp_count++;
388401
drivers/firmware/arm_scmi/raw_mode.c+8−4
@@ -1111,7 +1111,6 @@ static int scmi_raw_mode_setup(struct scmi_raw_mode_info *raw, · 1110 unmodified lines
11111111 int i;
11121112
11131113 for (i = 0; i < num_chans; i++) {
1114− void *xret;
11151114 struct scmi_raw_queue *q;
11161115
11171116 q = scmi_raw_queue_init(raw);
@@ -1120,13 +1119,12 @@ static int scmi_raw_mode_setup(struct scmi_raw_mode_info *raw, · 2 unmodified lines
11201119 goto err_xa;
11211120 }
11221121
1123− xret = xa_store(&raw->chans_q, channels[i], q,
1122+ ret = xa_insert(&raw->chans_q, channels[i], q,
11241123 GFP_KERNEL);
1125− if (xa_err(xret)) {
1124+ if (ret) {
11261125 dev_err(dev,
11271126 "Fail to allocate Raw queue 0x%02X\n",
11281127 channels[i]);
1129− ret = xa_err(xret);
11301128 goto err_xa;
11311129 }
11321130 }
@@ -1322,6 +1320,12 @@ void scmi_raw_message_report(void *r, struct scmi_xfer *xfer, · 189 unmodified lines
13221320 dev = raw->handle->dev;
13231321 q = scmi_raw_queue_select(raw, idx,
13241322 SCMI_XFER_IS_CHAN_SET(xfer) ? chan_id : 0);
1323+ if (!q) {
1324+ dev_warn(dev,
1325+ "RAW[%d] - NO queue for chan 0x%X. Dropping report.\n",
1326+ idx, chan_id);
1327+ return;
1328+ }
13251329
13261330 /*
13271331 * Grab the msg_q_lock upfront to avoid a possible race between
drivers/firmware/arm_scmi/shmem.c+7−1
@@ -10,7 +10,7 @@ · 9 unmodified lines
1010 #include <linux/processor.h>
1111 #include <linux/types.h>
1212
13−#include <asm-generic/bug.h>
13+#include <linux/bug.h>
1414
1515 #include "common.h"
1616
@@ -122,3 +122,9 @@ bool shmem_poll_done(struct scmi_shared_mem __iomem *shmem, · 105 unmodified lines
122122 (SCMI_SHMEM_CHAN_STAT_CHANNEL_ERROR |
123123 SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE);
124124 }
125+
126+bool shmem_channel_free(struct scmi_shared_mem __iomem *shmem)
127+{
128+ return (ioread32(&shmem->channel_status) &
129+ SCMI_SHMEM_CHAN_STAT_CHANNEL_FREE);
130+}
drivers/firmware/efi/arm-runtime.c+1−1
@@ -107,7 +107,7 @@ static int __init arm_enable_runtime_services(void) · 106 unmodified lines
107107 efi_memory_desc_t *md;
108108
109109 for_each_efi_memory_desc(md) {
110− int md_size = md->num_pages << EFI_PAGE_SHIFT;
110+ u64 md_size = md->num_pages << EFI_PAGE_SHIFT;
111111 struct resource *res;
112112
113113 if (!(md->attribute & EFI_MEMORY_SP))
drivers/firmware/efi/cper.c+19−0
@@ -523,6 +523,17 @@ static void cper_print_tstamp(const char *pfx, · 522 unmodified lines
523523 }
524524 }
525525
526+struct ignore_section {
527+ guid_t guid;
528+ const char *name;
529+};
530+
531+static const struct ignore_section ignore_sections[] = {
532+ { .guid = CPER_SEC_CXL_GEN_MEDIA_GUID, .name = "CXL General Media Event" },
533+ { .guid = CPER_SEC_CXL_DRAM_GUID, .name = "CXL DRAM Event" },
534+ { .guid = CPER_SEC_CXL_MEM_MODULE_GUID, .name = "CXL Memory Module Event" },
535+};
536+
526537 static void
527538 cper_estatus_print_section(const char *pfx, struct acpi_hest_generic_data *gdata,
528539 int sec_no)
@@ -543,6 +554,14 @@ cper_estatus_print_section(const char *pfx, struct acpi_hest_generic_data *gdata · 14 unmodified lines
543554 printk("%s""fru_text: %.20s\n", pfx, gdata->fru_text);
544555
545556 snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
557+
558+ for (int i = 0; i < ARRAY_SIZE(ignore_sections); i++) {
559+ if (guid_equal(sec_type, &ignore_sections[i].guid)) {
560+ printk("%ssection_type: %s\n", newpfx, ignore_sections[i].name);
561+ return;
562+ }
563+ }
564+
546565 if (guid_equal(sec_type, &CPER_SEC_PROC_GENERIC)) {
547566 struct cper_sec_proc_generic *proc_err = acpi_hest_get_payload(gdata);
548567
drivers/firmware/efi/efi-init.c+10−9
@@ -143,15 +143,6 @@ static __init int is_usable_memory(efi_memory_desc_t *md) · 142 unmodified lines
143143 case EFI_BOOT_SERVICES_DATA:
144144 case EFI_CONVENTIONAL_MEMORY:
145145 case EFI_PERSISTENT_MEMORY:
146− /*
147− * Special purpose memory is 'soft reserved', which means it
148− * is set aside initially, but can be hotplugged back in or
149− * be assigned to the dax driver after boot.
150− */
151− if (efi_soft_reserve_enabled() &&
152− (md->attribute & EFI_MEMORY_SP))
153− return false;
154−
155146 /*
156147 * According to the spec, these regions are no longer reserved
157148 * after calling ExitBootServices(). However, we can only use
@@ -196,6 +187,16 @@ static __init void reserve_regions(void) · 38 unmodified lines
196187 size = npages << PAGE_SHIFT;
197188
198189 if (is_memory(md)) {
190+ /*
191+ * Special purpose memory is 'soft reserved', which
192+ * means it is set aside initially. Don't add a memblock
193+ * for it now so that it can be hotplugged back in or
194+ * be assigned to the dax driver after boot.
195+ */
196+ if (efi_soft_reserve_enabled() &&
197+ (md->attribute & EFI_MEMORY_SP))
198+ continue;
199+
199200 early_init_dt_add_memory_arch(paddr, size);
200201
201202 if (!is_usable_memory(md))
drivers/firmware/efi/libstub/Makefile+2−2
@@ -28,7 +28,7 @@ cflags-$(CONFIG_ARM) += -DEFI_HAVE_STRLEN -DEFI_HAVE_STRNLEN \ · 27 unmodified lines
2828 -DEFI_HAVE_MEMCHR -DEFI_HAVE_STRRCHR \
2929 -DEFI_HAVE_STRCMP -fno-builtin -fpic \
3030 $(call cc-option,-mno-single-pic-base)
31−cflags-$(CONFIG_RISCV) += -fpic -DNO_ALTERNATIVE
31+cflags-$(CONFIG_RISCV) += -fpic -DNO_ALTERNATIVE -mno-relax
3232 cflags-$(CONFIG_LOONGARCH) += -fpie
3333
3434 cflags-$(CONFIG_EFI_PARAMS_FROM_FDT) += -I$(srctree)/scripts/dtc/libfdt
@@ -143,7 +143,7 @@ STUBCOPY_RELOC-$(CONFIG_ARM64) := R_AARCH64_ABS · 108 unmodified lines
143143 # exist.
144144 STUBCOPY_FLAGS-$(CONFIG_RISCV) += --prefix-alloc-sections=.init \
145145 --prefix-symbols=__efistub_
146−STUBCOPY_RELOC-$(CONFIG_RISCV) := R_RISCV_HI20
146+STUBCOPY_RELOC-$(CONFIG_RISCV) := -E R_RISCV_HI20\|R_RISCV_$(BITS)\|R_RISCV_RELAX
147147
148148 # For LoongArch, keep all the symbols in .init section and make sure that no
149149 # absolute symbols references exist.
drivers/firmware/efi/libstub/alignedmem.c+1−0
@@ -14,6 +14,7 @@ · 13 unmodified lines
1414 * @max: the address that the last allocated memory page shall not
1515 * exceed
1616 * @align: minimum alignment of the base of the allocation
17+ * @memory_type: the type of memory to allocate
1718 *
1819 * Allocate pages as EFI_LOADER_DATA. The allocated pages are aligned according
1920 * to @align, which should be >= EFI_ALLOC_ALIGN. The last allocated page will
drivers/firmware/efi/libstub/efistub.h+2−1
@@ -956,7 +956,8 @@ efi_status_t efi_get_random_bytes(unsigned long size, u8 *out); · 955 unmodified lines
956956
957957 efi_status_t efi_random_alloc(unsigned long size, unsigned long align,
958958 unsigned long *addr, unsigned long random_seed,
959− int memory_type, unsigned long alloc_limit);
959+ int memory_type, unsigned long alloc_min,
960+ unsigned long alloc_max);
960961
961962 efi_status_t efi_random_get_seed(void);
962963
drivers/firmware/efi/libstub/kaslr.c+1−1
@@ -119,7 +119,7 @@ efi_status_t efi_kaslr_relocate_kernel(unsigned long *image_addr, · 118 unmodified lines
119119 */
120120 status = efi_random_alloc(*reserve_size, min_kimg_align,
121121 reserve_addr, phys_seed,
122− EFI_LOADER_CODE, EFI_ALLOC_LIMIT);
122+ EFI_LOADER_CODE, 0, EFI_ALLOC_LIMIT);
123123 if (status != EFI_SUCCESS)
124124 efi_warn("efi_random_alloc() failed: 0x%lx\n", status);
125125 } else {
drivers/firmware/efi/libstub/randomalloc.c+7−5
@@ -17,7 +17,7 @@ · 16 unmodified lines
1717 static unsigned long get_entry_num_slots(efi_memory_desc_t *md,
1818 unsigned long size,
1919 unsigned long align_shift,
20− u64 alloc_limit)
20+ u64 alloc_min, u64 alloc_max)
2121 {
2222 unsigned long align = 1UL << align_shift;
2323 u64 first_slot, last_slot, region_end;
@@ -30,11 +30,11 @@ static unsigned long get_entry_num_slots(efi_memory_desc_t *md, · 6 unmodified lines
3030 return 0;
3131
3232 region_end = min(md->phys_addr + md->num_pages * EFI_PAGE_SIZE - 1,
33− alloc_limit);
33+ alloc_max);
3434 if (region_end < size)
3535 return 0;
3636
37− first_slot = round_up(md->phys_addr, align);
37+ first_slot = round_up(max(md->phys_addr, alloc_min), align);
3838 last_slot = round_down(region_end - size + 1, align);
3939
4040 if (first_slot > last_slot)
@@ -56,7 +56,8 @@ efi_status_t efi_random_alloc(unsigned long size, · 15 unmodified lines
5656 unsigned long *addr,
5757 unsigned long random_seed,
5858 int memory_type,
59− unsigned long alloc_limit)
59+ unsigned long alloc_min,
60+ unsigned long alloc_max)
6061 {
6162 unsigned long total_slots = 0, target_slot;
6263 unsigned long total_mirrored_slots = 0;
@@ -78,7 +79,8 @@ efi_status_t efi_random_alloc(unsigned long size, · 15 unmodified lines
7879 efi_memory_desc_t *md = (void *)map->map + map_offset;
7980 unsigned long slots;
8081
81− slots = get_entry_num_slots(md, size, ilog2(align), alloc_limit);
82+ slots = get_entry_num_slots(md, size, ilog2(align), alloc_min,
83+ alloc_max);
8284 MD_NUM_SLOTS(md) = slots;
8385 total_slots += slots;
8486 if (md->attribute & EFI_MEMORY_MORE_RELIABLE)
drivers/firmware/efi/libstub/x86-stub.c+15−10
@@ -223,8 +223,8 @@ static void retrieve_apple_device_properties(struct boot_params *boot_params) · 222 unmodified lines
223223 }
224224 }
225225
226−void efi_adjust_memory_range_protection(unsigned long start,
227− unsigned long size)
226+efi_status_t efi_adjust_memory_range_protection(unsigned long start,
227+ unsigned long size)
228228 {
229229 efi_status_t status;
230230 efi_gcd_memory_space_desc_t desc;
@@ -236,13 +236,17 @@ void efi_adjust_memory_range_protection(unsigned long start, · 5 unmodified lines
236236 rounded_end = roundup(start + size, EFI_PAGE_SIZE);
237237
238238 if (memattr != NULL) {
239− efi_call_proto(memattr, clear_memory_attributes, rounded_start,
240− rounded_end - rounded_start, EFI_MEMORY_XP);
241− return;
239+ status = efi_call_proto(memattr, clear_memory_attributes,
240+ rounded_start,
241+ rounded_end - rounded_start,
242+ EFI_MEMORY_XP);
243+ if (status != EFI_SUCCESS)
244+ efi_warn("Failed to clear EFI_MEMORY_XP attribute\n");
245+ return status;
242246 }
243247
244248 if (efi_dxe_table == NULL)
245− return;
249+ return EFI_SUCCESS;
246250
247251 /*
248252 * Don't modify memory region attributes, they are
@@ -255,7 +259,7 @@ void efi_adjust_memory_range_protection(unsigned long start, · 6 unmodified lines
255259 status = efi_dxe_call(get_memory_space_descriptor, start, &desc);
256260
257261 if (status != EFI_SUCCESS)
258− return;
262+ break;
259263
260264 next = desc.base_address + desc.length;
261265
@@ -280,8 +284,10 @@ void efi_adjust_memory_range_protection(unsigned long start, · 18 unmodified lines
280284 unprotect_start,
281285 unprotect_start + unprotect_size,
282286 status);
287+ break;
283288 }
284289 }
290+ return EFI_SUCCESS;
285291 }
286292
287293 static void setup_unaccepted_memory(void)
@@ -793,6 +799,7 @@ static efi_status_t efi_decompress_kernel(unsigned long *kernel_entry) · 505 unmodified lines
793799
794800 status = efi_random_alloc(alloc_size, CONFIG_PHYSICAL_ALIGN, &addr,
795801 seed[0], EFI_LOADER_CODE,
802+ LOAD_PHYSICAL_ADDR,
796803 EFI_X86_KERNEL_ALLOC_LIMIT);
797804 if (status != EFI_SUCCESS)
798805 return status;
@@ -805,9 +812,7 @@ static efi_status_t efi_decompress_kernel(unsigned long *kernel_entry) · 6 unmodified lines
805812
806813 *kernel_entry = addr + entry;
807814
808− efi_adjust_memory_range_protection(addr, kernel_total_size);
809−
810− return EFI_SUCCESS;
815+ return efi_adjust_memory_range_protection(addr, kernel_total_size);
811816 }
812817
813818 static void __noreturn enter_kernel(unsigned long kernel_addr,
drivers/firmware/efi/libstub/x86-stub.h+2−2
@@ -5,8 +5,8 @@ · 4 unmodified lines
55 extern void trampoline_32bit_src(void *, bool);
66 extern const u16 trampoline_ljmp_imm_offset;
77
8−void efi_adjust_memory_range_protection(unsigned long start,
9− unsigned long size);
8+efi_status_t efi_adjust_memory_range_protection(unsigned long start,
9+ unsigned long size);
1010
1111 #ifdef CONFIG_X86_64
1212 efi_status_t efi_setup_5level_paging(void);
drivers/firmware/efi/libstub/zboot.c+1−1
@@ -119,7 +119,7 @@ efi_zboot_entry(efi_handle_t handle, efi_system_table_t *systab) · 118 unmodified lines
119119 }
120120
121121 status = efi_random_alloc(alloc_size, min_kimg_align, &image_base,
122− seed, EFI_LOADER_CODE, EFI_ALLOC_LIMIT);
122+ seed, EFI_LOADER_CODE, 0, EFI_ALLOC_LIMIT);
123123 if (status != EFI_SUCCESS) {
124124 efi_err("Failed to allocate memory\n");
125125 goto free_cmdline;
drivers/firmware/efi/riscv-runtime.c+1−1
@@ -85,7 +85,7 @@ static int __init riscv_enable_runtime_services(void) · 84 unmodified lines
8585 efi_memory_desc_t *md;
8686
8787 for_each_efi_memory_desc(md) {
88− int md_size = md->num_pages << EFI_PAGE_SHIFT;
88+ u64 md_size = md->num_pages << EFI_PAGE_SHIFT;
8989 struct resource *res;
9090
9191 if (!(md->attribute & EFI_MEMORY_SP))
drivers/firmware/sysfb.c+1−1
@@ -128,4 +128,4 @@ unlock_mutex: · 127 unmodified lines
128128 }
129129
130130 /* must execute after PCI subsystem for EFI quirks */
131−subsys_initcall_sync(sysfb_init);
131+device_initcall(sysfb_init);
drivers/gpio/gpio-eic-sprd.c+28−4
@@ -325,20 +325,27 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) · 324 unmodified lines
325325 switch (flow_type) {
326326 case IRQ_TYPE_LEVEL_HIGH:
327327 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 1);
328+ sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IC, 1);
328329 break;
329330 case IRQ_TYPE_LEVEL_LOW:
330331 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 0);
332+ sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IC, 1);
331333 break;
332334 case IRQ_TYPE_EDGE_RISING:
333335 case IRQ_TYPE_EDGE_FALLING:
334336 case IRQ_TYPE_EDGE_BOTH:
335337 state = sprd_eic_get(chip, offset);
336− if (state)
338+ if (state) {
337339 sprd_eic_update(chip, offset,
338340 SPRD_EIC_DBNC_IEV, 0);
339− else
341+ sprd_eic_update(chip, offset,
342+ SPRD_EIC_DBNC_IC, 1);
343+ } else {
340344 sprd_eic_update(chip, offset,
341345 SPRD_EIC_DBNC_IEV, 1);
346+ sprd_eic_update(chip, offset,
347+ SPRD_EIC_DBNC_IC, 1);
348+ }
342349 break;
343350 default:
344351 return -ENOTSUPP;
@@ -350,20 +357,27 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) · 5 unmodified lines
350357 switch (flow_type) {
351358 case IRQ_TYPE_LEVEL_HIGH:
352359 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 0);
360+ sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTCLR, 1);
353361 break;
354362 case IRQ_TYPE_LEVEL_LOW:
355363 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 1);
364+ sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTCLR, 1);
356365 break;
357366 case IRQ_TYPE_EDGE_RISING:
358367 case IRQ_TYPE_EDGE_FALLING:
359368 case IRQ_TYPE_EDGE_BOTH:
360369 state = sprd_eic_get(chip, offset);
361− if (state)
370+ if (state) {
362371 sprd_eic_update(chip, offset,
363372 SPRD_EIC_LATCH_INTPOL, 0);
364− else
373+ sprd_eic_update(chip, offset,
374+ SPRD_EIC_LATCH_INTCLR, 1);
375+ } else {
365376 sprd_eic_update(chip, offset,
366377 SPRD_EIC_LATCH_INTPOL, 1);
378+ sprd_eic_update(chip, offset,
379+ SPRD_EIC_LATCH_INTCLR, 1);
380+ }
367381 break;
368382 default:
369383 return -ENOTSUPP;
@@ -377,29 +391,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) · 7 unmodified lines
377391 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
378392 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
379393 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
394+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
380395 irq_set_handler_locked(data, handle_edge_irq);
381396 break;
382397 case IRQ_TYPE_EDGE_FALLING:
383398 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
384399 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
385400 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
401+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
386402 irq_set_handler_locked(data, handle_edge_irq);
387403 break;
388404 case IRQ_TYPE_EDGE_BOTH:
389405 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
390406 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1);
407+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
391408 irq_set_handler_locked(data, handle_edge_irq);
392409 break;
393410 case IRQ_TYPE_LEVEL_HIGH:
394411 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
395412 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
396413 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
414+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
397415 irq_set_handler_locked(data, handle_level_irq);
398416 break;
399417 case IRQ_TYPE_LEVEL_LOW:
400418 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
401419 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
402420 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
421+ sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
403422 irq_set_handler_locked(data, handle_level_irq);
404423 break;
405424 default:
@@ -412,29 +431,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) · 6 unmodified lines
412431 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
413432 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
414433 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
434+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
415435 irq_set_handler_locked(data, handle_edge_irq);
416436 break;
417437 case IRQ_TYPE_EDGE_FALLING:
418438 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
419439 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
420440 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
441+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
421442 irq_set_handler_locked(data, handle_edge_irq);
422443 break;
423444 case IRQ_TYPE_EDGE_BOTH:
424445 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
425446 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1);
447+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
426448 irq_set_handler_locked(data, handle_edge_irq);
427449 break;
428450 case IRQ_TYPE_LEVEL_HIGH:
429451 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
430452 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
431453 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
454+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
432455 irq_set_handler_locked(data, handle_level_irq);
433456 break;
434457 case IRQ_TYPE_LEVEL_LOW:
435458 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
436459 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
437460 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
461+ sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
438462 irq_set_handler_locked(data, handle_level_irq);
439463 break;
440464 default:
drivers/gpio/gpiolib-acpi.c+14−0
@@ -1651,6 +1651,20 @@ static const struct dmi_system_id gpiolib_acpi_quirks[] __initconst = { · 1650 unmodified lines
16511651 .ignore_interrupt = "INT33FC:00@3",
16521652 },
16531653 },
1654+ {
1655+ /*
1656+ * Spurious wakeups from TP_ATTN# pin
1657+ * Found in BIOS 0.35
1658+ * https://gitlab.freedesktop.org/drm/amd/-/issues/3073
1659+ */
1660+ .matches = {
1661+ DMI_MATCH(DMI_SYS_VENDOR, "GPD"),
1662+ DMI_MATCH(DMI_PRODUCT_NAME, "G1619-04"),
1663+ },
1664+ .driver_data = &(struct acpi_gpiolib_dmi_quirk) {
1665+ .ignore_wake = "PNP0C50:00@8",
1666+ },
1667+ },
16541668 {} /* Terminating entry */
16551669 };
16561670
drivers/gpio/gpiolib.c+4−4
@@ -1010,15 +1010,15 @@ err_remove_of_chip: · 1009 unmodified lines
10101010 err_free_gpiochip_mask:
10111011 gpiochip_remove_pin_ranges(gc);
10121012 gpiochip_free_valid_mask(gc);
1013+err_remove_from_list:
1014+ spin_lock_irqsave(&gpio_lock, flags);
1015+ list_del(&gdev->list);
1016+ spin_unlock_irqrestore(&gpio_lock, flags);
10131017 if (gdev->dev.release) {
10141018 /* release() has been registered by gpiochip_setup_dev() */
10151019 gpio_device_put(gdev);
10161020 goto err_print_message;
10171021 }
1018−err_remove_from_list:
1019− spin_lock_irqsave(&gpio_lock, flags);
1020− list_del(&gdev->list);
1021− spin_unlock_irqrestore(&gpio_lock, flags);
10221022 err_free_label:
10231023 kfree_const(gdev->label);
10241024 err_free_descs:
drivers/gpu/drm/amd/amdgpu/amdgpu.h+2−0
@@ -1078,6 +1078,8 @@ struct amdgpu_device { · 1077 unmodified lines
10781078 bool in_s3;
10791079 bool in_s4;
10801080 bool in_s0ix;
1081+ /* indicate amdgpu suspension status */
1082+ bool suspend_complete;
10811083
10821084 enum pp_mp1_state mp1_state;
10831085 struct amdgpu_doorbell_index doorbell_index;
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c+21−11
@@ -141,11 +141,31 @@ static void amdgpu_amdkfd_reset_work(struct work_struct *work) · 140 unmodified lines
141141 static const struct drm_client_funcs kfd_client_funcs = {
142142 .unregister = drm_client_release,
143143 };
144+
145+int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev)
146+{
147+ int ret;
148+
149+ if (!adev->kfd.init_complete)
150+ return 0;
151+
152+ ret = drm_client_init(&adev->ddev, &adev->kfd.client, "kfd",
153+ &kfd_client_funcs);
154+ if (ret) {
155+ dev_err(adev->dev, "Failed to init DRM client: %d\n",
156+ ret);
157+ return ret;
158+ }
159+
160+ drm_client_register(&adev->kfd.client);
161+
162+ return 0;
163+}
164+
144165 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
145166 {
146167 int i;
147168 int last_valid_bit;
148− int ret;
149169
150170 amdgpu_amdkfd_gpuvm_init_mem_limits();
151171
@@ -164,12 +184,6 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) · 12 unmodified lines
164184 .enable_mes = adev->enable_mes,
165185 };
166186
167− ret = drm_client_init(&adev->ddev, &adev->kfd.client, "kfd", &kfd_client_funcs);
168− if (ret) {
169− dev_err(adev->dev, "Failed to init DRM client: %d\n", ret);
170− return;
171− }
172−
173187 /* this is going to have a few of the MSBs set that we need to
174188 * clear
175189 */
@@ -208,10 +222,6 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) · 32 unmodified lines
208222
209223 adev->kfd.init_complete = kgd2kfd_device_init(adev->kfd.dev,
210224 &gpu_resources);
211− if (adev->kfd.init_complete)
212− drm_client_register(&adev->kfd.client);
213− else
214− drm_client_release(&adev->kfd.client);
215225
216226 amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size;
217227
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h+3−1
@@ -182,6 +182,8 @@ int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev, · 181 unmodified lines
182182 struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
183183 struct mm_struct *mm,
184184 struct svm_range_bo *svm_bo);
185+
186+int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev);
185187 #if defined(CONFIG_DEBUG_FS)
186188 int kfd_debugfs_kfd_mem_limits(struct seq_file *m, void *data);
187189 #endif
@@ -301,7 +303,7 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(struct amdgpu_device *adev, · 113 unmodified lines
301303 struct kgd_mem *mem, void *drm_priv);
302304 int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
303305 struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv);
304−void amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv);
306+int amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv);
305307 int amdgpu_amdkfd_gpuvm_sync_memory(
306308 struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);
307309 int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_mem *mem,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c+1−1
@@ -290,7 +290,7 @@ static int suspend_resume_compute_scheduler(struct amdgpu_device *adev, bool sus · 289 unmodified lines
290290 for (i = 0; i < adev->gfx.num_compute_rings; i++) {
291291 struct amdgpu_ring *ring = &adev->gfx.compute_ring[i];
292292
293− if (!(ring && drm_sched_wqueue_ready(&ring->sched)))
293+ if (!amdgpu_ring_sched_ready(ring))
294294 continue;
295295
296296 /* stop secheduler and drain ring. */
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c+17−3
@@ -2085,21 +2085,35 @@ out: · 2084 unmodified lines
20852085 return ret;
20862086 }
20872087
2088−void amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv)
2088+int amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv)
20892089 {
20902090 struct kfd_mem_attachment *entry;
20912091 struct amdgpu_vm *vm;
2092+ int ret;
20922093
20932094 vm = drm_priv_to_vm(drm_priv);
20942095
20952096 mutex_lock(&mem->lock);
20962097
2098+ ret = amdgpu_bo_reserve(mem->bo, true);
2099+ if (ret)
2100+ goto out;
2101+
20972102 list_for_each_entry(entry, &mem->attachments, list) {
2098− if (entry->bo_va->base.vm == vm)
2099− kfd_mem_dmaunmap_attachment(mem, entry);
2103+ if (entry->bo_va->base.vm != vm)
2104+ continue;
2105+ if (entry->bo_va->base.bo->tbo.ttm &&
2106+ !entry->bo_va->base.bo->tbo.ttm->sg)
2107+ continue;
2108+
2109+ kfd_mem_dmaunmap_attachment(mem, entry);
21002110 }
21012111
2112+ amdgpu_bo_unreserve(mem->bo);
2113+out:
21022114 mutex_unlock(&mem->lock);
2115+
2116+ return ret;
21032117 }
21042118
21052119 int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c+4−4
@@ -1678,7 +1678,7 @@ static int amdgpu_debugfs_test_ib_show(struct seq_file *m, void *unused) · 1677 unmodified lines
16781678 for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
16791679 struct amdgpu_ring *ring = adev->rings[i];
16801680
1681− if (!ring || !drm_sched_wqueue_ready(&ring->sched))
1681+ if (!amdgpu_ring_sched_ready(ring))
16821682 continue;
16831683 drm_sched_wqueue_stop(&ring->sched);
16841684 }
@@ -1694,7 +1694,7 @@ static int amdgpu_debugfs_test_ib_show(struct seq_file *m, void *unused) · 9 unmodified lines
16941694 for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
16951695 struct amdgpu_ring *ring = adev->rings[i];
16961696
1697− if (!ring || !drm_sched_wqueue_ready(&ring->sched))
1697+ if (!amdgpu_ring_sched_ready(ring))
16981698 continue;
16991699 drm_sched_wqueue_start(&ring->sched);
17001700 }
@@ -1916,8 +1916,8 @@ static int amdgpu_debugfs_ib_preempt(void *data, u64 val) · 215 unmodified lines
19161916
19171917 ring = adev->rings[val];
19181918
1919− if (!ring || !ring->funcs->preempt_ib ||
1920− !drm_sched_wqueue_ready(&ring->sched))
1919+ if (!amdgpu_ring_sched_ready(ring) ||
1920+ !ring->funcs->preempt_ib)
19211921 return -EINVAL;
19221922
19231923 /* the last preemption failed */
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+13−23
@@ -4121,23 +4121,13 @@ int amdgpu_device_init(struct amdgpu_device *adev, · 4120 unmodified lines
41214121 }
41224122 }
41234123 } else {
4124− switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
4125− case IP_VERSION(13, 0, 0):
4126− case IP_VERSION(13, 0, 7):
4127− case IP_VERSION(13, 0, 10):
4128− r = psp_gpu_reset(adev);
4129− break;
4130− default:
4131− tmp = amdgpu_reset_method;
4132− /* It should do a default reset when loading or reloading the driver,
4133− * regardless of the module parameter reset_method.
4134− */
4135− amdgpu_reset_method = AMD_RESET_METHOD_NONE;
4136− r = amdgpu_asic_reset(adev);
4137− amdgpu_reset_method = tmp;
4138− break;
4139− }
4140−
4124+ tmp = amdgpu_reset_method;
4125+ /* It should do a default reset when loading or reloading the driver,
4126+ * regardless of the module parameter reset_method.
4127+ */
4128+ amdgpu_reset_method = AMD_RESET_METHOD_NONE;
4129+ r = amdgpu_asic_reset(adev);
4130+ amdgpu_reset_method = tmp;
41414131 if (r) {
41424132 dev_err(adev->dev, "asic reset on init failed\n");
41434133 goto failed;
@@ -5031,7 +5021,7 @@ bool amdgpu_device_has_job_running(struct amdgpu_device *adev) · 887 unmodified lines
50315021 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
50325022 struct amdgpu_ring *ring = adev->rings[i];
50335023
5034− if (!ring || !drm_sched_wqueue_ready(&ring->sched))
5024+ if (!amdgpu_ring_sched_ready(ring))
50355025 continue;
50365026
50375027 spin_lock(&ring->sched.job_list_lock);
@@ -5170,7 +5160,7 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev, · 132 unmodified lines
51705160 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
51715161 struct amdgpu_ring *ring = adev->rings[i];
51725162
5173− if (!ring || !drm_sched_wqueue_ready(&ring->sched))
5163+ if (!amdgpu_ring_sched_ready(ring))
51745164 continue;
51755165
51765166 /* Clear job fence from fence drv to avoid force_completion
@@ -5637,7 +5627,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, · 460 unmodified lines
56375627 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
56385628 struct amdgpu_ring *ring = tmp_adev->rings[i];
56395629
5640− if (!ring || !drm_sched_wqueue_ready(&ring->sched))
5630+ if (!amdgpu_ring_sched_ready(ring))
56415631 continue;
56425632
56435633 drm_sched_stop(&ring->sched, job ? &job->base : NULL);
@@ -5706,7 +5696,7 @@ skip_hw_reset: · 62 unmodified lines
57065696 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
57075697 struct amdgpu_ring *ring = tmp_adev->rings[i];
57085698
5709− if (!ring || !drm_sched_wqueue_ready(&ring->sched))
5699+ if (!amdgpu_ring_sched_ready(ring))
57105700 continue;
57115701
57125702 drm_sched_start(&ring->sched, true);
@@ -6061,7 +6051,7 @@ pci_ers_result_t amdgpu_pci_error_detected(struct pci_dev *pdev, pci_channel_sta · 348 unmodified lines
60616051 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
60626052 struct amdgpu_ring *ring = adev->rings[i];
60636053
6064− if (!ring || !drm_sched_wqueue_ready(&ring->sched))
6054+ if (!amdgpu_ring_sched_ready(ring))
60656055 continue;
60666056
60676057 drm_sched_stop(&ring->sched, NULL);
@@ -6189,7 +6179,7 @@ void amdgpu_pci_resume(struct pci_dev *pdev) · 121 unmodified lines
61896179 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
61906180 struct amdgpu_ring *ring = adev->rings[i];
61916181
6192− if (!ring || !drm_sched_wqueue_ready(&ring->sched))
6182+ if (!amdgpu_ring_sched_ready(ring))
61936183 continue;
61946184
61956185 drm_sched_start(&ring->sched, true);
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+6−0
@@ -2255,6 +2255,10 @@ retry_init: · 2254 unmodified lines
22552255 if (ret)
22562256 goto err_pci;
22572257
2258+ ret = amdgpu_amdkfd_drm_client_create(adev);
2259+ if (ret)
2260+ goto err_pci;
2261+
22582262 /*
22592263 * 1. don't init fbdev on hw without DCE
22602264 * 2. don't init fbdev if there are no connectors
@@ -2472,6 +2476,7 @@ static int amdgpu_pmops_suspend(struct device *dev) · 211 unmodified lines
24722476 struct drm_device *drm_dev = dev_get_drvdata(dev);
24732477 struct amdgpu_device *adev = drm_to_adev(drm_dev);
24742478
2479+ adev->suspend_complete = false;
24752480 if (amdgpu_acpi_is_s0ix_active(adev))
24762481 adev->in_s0ix = true;
24772482 else if (amdgpu_acpi_is_s3_active(adev))
@@ -2486,6 +2491,7 @@ static int amdgpu_pmops_suspend_noirq(struct device *dev) · 8 unmodified lines
24862491 struct drm_device *drm_dev = dev_get_drvdata(dev);
24872492 struct amdgpu_device *adev = drm_to_adev(drm_dev);
24882493
2494+ adev->suspend_complete = true;
24892495 if (amdgpu_acpi_should_gpu_reset(adev))
24902496 return amdgpu_asic_reset(adev);
24912497
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c+8−0
@@ -121,6 +121,7 @@ int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev) · 120 unmodified lines
121121 struct amdgpu_bo_param bp;
122122 dma_addr_t dma_addr;
123123 struct page *p;
124+ unsigned long x;
124125 int ret;
125126
126127 if (adev->gart.bo != NULL)
@@ -130,6 +131,10 @@ int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev) · 3 unmodified lines
130131 if (!p)
131132 return -ENOMEM;
132133
134+ /* assign pages to this device */
135+ for (x = 0; x < (1UL << order); x++)
136+ p[x].mapping = adev->mman.bdev.dev_mapping;
137+
133138 /* If the hardware does not support UTCL2 snooping of the CPU caches
134139 * then set_memory_wc() could be used as a workaround to mark the pages
135140 * as write combine memory.
@@ -223,6 +228,7 @@ void amdgpu_gart_table_ram_free(struct amdgpu_device *adev) · 87 unmodified lines
223228 unsigned int order = get_order(adev->gart.table_size);
224229 struct sg_table *sg = adev->gart.bo->tbo.sg;
225230 struct page *p;
231+ unsigned long x;
226232 int ret;
227233
228234 ret = amdgpu_bo_reserve(adev->gart.bo, false);
@@ -234,6 +240,8 @@ void amdgpu_gart_table_ram_free(struct amdgpu_device *adev) · 5 unmodified lines
234240 sg_free_table(sg);
235241 kfree(sg);
236242 p = virt_to_page(adev->gart.ptr);
243+ for (x = 0; x < (1UL << order); x++)
244+ p[x].mapping = NULL;
237245 __free_pages(p, order);
238246
239247 adev->gart.ptr = NULL;
drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c+1−1
@@ -362,7 +362,7 @@ static ssize_t ta_if_invoke_debugfs_write(struct file *fp, const char *buf, size · 361 unmodified lines
362362 }
363363 }
364364
365− if (copy_to_user((char *)buf, context->mem_context.shared_buf, shared_buf_len))
365+ if (copy_to_user((char *)&buf[copy_pos], context->mem_context.shared_buf, shared_buf_len))
366366 ret = -EFAULT;
367367
368368 err_free_shared_buf:
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c+12−0
@@ -635,6 +635,7 @@ int amdgpu_ring_test_helper(struct amdgpu_ring *ring) · 634 unmodified lines
635635 ring->name);
636636
637637 ring->sched.ready = !r;
638+
638639 return r;
639640 }
640641
@@ -717,3 +718,14 @@ void amdgpu_ring_ib_on_emit_de(struct amdgpu_ring *ring) · 76 unmodified lines
717718 if (ring->is_sw_ring)
718719 amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_DE);
719720 }
721+
722+bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring)
723+{
724+ if (!ring)
725+ return false;
726+
727+ if (ring->no_scheduler || !drm_sched_wqueue_ready(&ring->sched))
728+ return false;
729+
730+ return true;
731+}
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h+1−1
@@ -450,5 +450,5 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, · 449 unmodified lines
450450 int amdgpu_ib_pool_init(struct amdgpu_device *adev);
451451 void amdgpu_ib_pool_fini(struct amdgpu_device *adev);
452452 int amdgpu_ib_ring_tests(struct amdgpu_device *adev);
453−
453+bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring);
454454 #endif
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c+16−1
@@ -221,8 +221,23 @@ static struct attribute *amdgpu_vram_mgr_attributes[] = { · 220 unmodified lines
221221 NULL
222222 };
223223
224+static umode_t amdgpu_vram_attrs_is_visible(struct kobject *kobj,
225+ struct attribute *attr, int i)
226+{
227+ struct device *dev = kobj_to_dev(kobj);
228+ struct drm_device *ddev = dev_get_drvdata(dev);
229+ struct amdgpu_device *adev = drm_to_adev(ddev);
230+
231+ if (attr == &dev_attr_mem_info_vram_vendor.attr &&
232+ !adev->gmc.vram_vendor)
233+ return 0;
234+
235+ return attr->mode;
236+}
237+
224238 const struct attribute_group amdgpu_vram_mgr_attr_group = {
225− .attrs = amdgpu_vram_mgr_attributes
239+ .attrs = amdgpu_vram_mgr_attributes,
240+ .is_visible = amdgpu_vram_attrs_is_visible
226241 };
227242
228243 /**
drivers/gpu/drm/amd/amdgpu/cik_ih.c+6−0
@@ -204,6 +204,12 @@ static u32 cik_ih_get_wptr(struct amdgpu_device *adev, · 203 unmodified lines
204204 tmp = RREG32(mmIH_RB_CNTL);
205205 tmp |= IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK;
206206 WREG32(mmIH_RB_CNTL, tmp);
207+
208+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
209+ * can be detected.
210+ */
211+ tmp &= ~IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK;
212+ WREG32(mmIH_RB_CNTL, tmp);
207213 }
208214 return (wptr & ih->ptr_mask);
209215 }
drivers/gpu/drm/amd/amdgpu/cz_ih.c+5−0
@@ -216,6 +216,11 @@ static u32 cz_ih_get_wptr(struct amdgpu_device *adev, · 215 unmodified lines
216216 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
217217 WREG32(mmIH_RB_CNTL, tmp);
218218
219+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
220+ * can be detected.
221+ */
222+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
223+ WREG32(mmIH_RB_CNTL, tmp);
219224
220225 out:
221226 return (wptr & ih->ptr_mask);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+1−3
@@ -4027,8 +4027,6 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev) · 4026 unmodified lines
40274027 err = 0;
40284028 adev->gfx.mec2_fw = NULL;
40294029 }
4030− amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2);
4031− amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2_JT);
40324030
40334031 gfx_v10_0_check_fw_write_wait(adev);
40344032 out:
@@ -6589,7 +6587,7 @@ static int gfx_v10_0_compute_mqd_init(struct amdgpu_device *adev, void *m, · 2554 unmodified lines
65896587 #ifdef __BIG_ENDIAN
65906588 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, ENDIAN_SWAP, 1);
65916589 #endif
6592− tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 0);
6590+ tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);
65936591 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH,
65946592 prop->allow_tunneling);
65956593 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c+1−23
@@ -107,23 +107,6 @@ static const struct soc15_reg_golden golden_settings_gc_11_0_1[] = · 106 unmodified lines
107107 SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL2, 0xfcffffff, 0x0000000a)
108108 };
109109
110−static const struct soc15_reg_golden golden_settings_gc_11_5_0[] = {
111− SOC15_REG_GOLDEN_VALUE(GC, 0, regDB_DEBUG5, 0xffffffff, 0x00000800),
112− SOC15_REG_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0x0c1807ff, 0x00000242),
113− SOC15_REG_GOLDEN_VALUE(GC, 0, regGCR_GENERAL_CNTL, 0x1ff1ffff, 0x00000500),
114− SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),
115− SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),
116− SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL, 0xffffffff, 0xf37fff3f),
117− SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL3, 0xfffffffb, 0x00f40188),
118− SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL4, 0xf0ffffff, 0x80009007),
119− SOC15_REG_GOLDEN_VALUE(GC, 0, regPA_CL_ENHANCE, 0xf1ffffff, 0x00880007),
120− SOC15_REG_GOLDEN_VALUE(GC, 0, regPC_CONFIG_CNTL_1, 0xffffffff, 0x00010000),
121− SOC15_REG_GOLDEN_VALUE(GC, 0, regTA_CNTL_AUX, 0xf7f7ffff, 0x01030000),
122− SOC15_REG_GOLDEN_VALUE(GC, 0, regTA_CNTL2, 0x007f0000, 0x00000000),
123− SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL2, 0xffcfffff, 0x0000200a),
124− SOC15_REG_GOLDEN_VALUE(GC, 0, regUTCL1_CTRL_2, 0xffffffff, 0x0000048f)
125−};
126−
127110 #define DEFAULT_SH_MEM_CONFIG \
128111 ((SH_MEM_ADDRESS_MODE_64 << SH_MEM_CONFIG__ADDRESS_MODE__SHIFT) | \
129112 (SH_MEM_ALIGNMENT_MODE_UNALIGNED << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) | \
@@ -304,11 +287,6 @@ static void gfx_v11_0_init_golden_registers(struct amdgpu_device *adev) · 174 unmodified lines
304287 golden_settings_gc_11_0_1,
305288 (const u32)ARRAY_SIZE(golden_settings_gc_11_0_1));
306289 break;
307− case IP_VERSION(11, 5, 0):
308− soc15_program_register_sequence(adev,
309− golden_settings_gc_11_5_0,
310− (const u32)ARRAY_SIZE(golden_settings_gc_11_5_0));
311− break;
312290 default:
313291 break;
314292 }
@@ -3846,7 +3824,7 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m, · 3531 unmodified lines
38463824 (order_base_2(prop->queue_size / 4) - 1));
38473825 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, RPTR_BLOCK_SIZE,
38483826 (order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));
3849− tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 0);
3827+ tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);
38503828 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH,
38513829 prop->allow_tunneling);
38523830 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c+8−0
@@ -3034,6 +3034,14 @@ static int gfx_v9_0_cp_gfx_start(struct amdgpu_device *adev) · 3033 unmodified lines
30343034
30353035 gfx_v9_0_cp_gfx_enable(adev, true);
30363036
3037+ /* Now only limit the quirk on the APU gfx9 series and already
3038+ * confirmed that the APU gfx10/gfx11 needn't such update.
3039+ */
3040+ if (adev->flags & AMD_IS_APU &&
3041+ adev->in_s3 && !adev->suspend_complete) {
3042+ DRM_INFO(" Will skip the CSB packet resubmit\n");
3043+ return 0;
3044+ }
30373045 r = amdgpu_ring_alloc(ring, gfx_v9_0_get_csb_size(adev) + 4 + 3);
30383046 if (r) {
30393047 DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c+2−2
@@ -915,8 +915,8 @@ static int gmc_v6_0_hw_init(void *handle) · 914 unmodified lines
915915
916916 if (amdgpu_emu_mode == 1)
917917 return amdgpu_gmc_vram_checking(adev);
918− else
919− return r;
918+
919+ return 0;
920920 }
921921
922922 static int gmc_v6_0_hw_fini(void *handle)
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c+2−2
@@ -1099,8 +1099,8 @@ static int gmc_v7_0_hw_init(void *handle) · 1098 unmodified lines
10991099
11001100 if (amdgpu_emu_mode == 1)
11011101 return amdgpu_gmc_vram_checking(adev);
1102− else
1103− return r;
1102+
1103+ return 0;
11041104 }
11051105
11061106 static int gmc_v7_0_hw_fini(void *handle)
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c+2−2
@@ -1219,8 +1219,8 @@ static int gmc_v8_0_hw_init(void *handle) · 1218 unmodified lines
12191219
12201220 if (amdgpu_emu_mode == 1)
12211221 return amdgpu_gmc_vram_checking(adev);
1222− else
1223− return r;
1222+
1223+ return 0;
12241224 }
12251225
12261226 static int gmc_v8_0_hw_fini(void *handle)
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c+2−9
@@ -1947,13 +1947,6 @@ static int gmc_v9_0_init_mem_ranges(struct amdgpu_device *adev) · 1946 unmodified lines
19471947
19481948 static void gmc_v9_4_3_init_vram_info(struct amdgpu_device *adev)
19491949 {
1950− static const u32 regBIF_BIOS_SCRATCH_4 = 0x50;
1951− u32 vram_info;
1952−
1953− if (!amdgpu_sriov_vf(adev)) {
1954− vram_info = RREG32(regBIF_BIOS_SCRATCH_4);
1955− adev->gmc.vram_vendor = vram_info & 0xF;
1956− }
19571950 adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM;
19581951 adev->gmc.vram_width = 128 * 64;
19591952 }
@@ -2340,8 +2333,8 @@ static int gmc_v9_0_hw_init(void *handle) · 380 unmodified lines
23402333
23412334 if (amdgpu_emu_mode == 1)
23422335 return amdgpu_gmc_vram_checking(adev);
2343− else
2344− return r;
2336+
2337+ return 0;
23452338 }
23462339
23472340 /**
drivers/gpu/drm/amd/amdgpu/iceland_ih.c+5−0
@@ -215,6 +215,11 @@ static u32 iceland_ih_get_wptr(struct amdgpu_device *adev, · 214 unmodified lines
215215 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
216216 WREG32(mmIH_RB_CNTL, tmp);
217217
218+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
219+ * can be detected.
220+ */
221+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
222+ WREG32(mmIH_RB_CNTL, tmp);
218223
219224 out:
220225 return (wptr & ih->ptr_mask);
drivers/gpu/drm/amd/amdgpu/ih_v6_0.c+6−0
@@ -418,6 +418,12 @@ static u32 ih_v6_0_get_wptr(struct amdgpu_device *adev, · 417 unmodified lines
418418 tmp = RREG32_NO_KIQ(ih_regs->ih_rb_cntl);
419419 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
420420 WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
421+
422+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
423+ * can be detected.
424+ */
425+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
426+ WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
421427 out:
422428 return (wptr & ih->ptr_mask);
423429 }
drivers/gpu/drm/amd/amdgpu/ih_v6_1.c+7−0
@@ -418,6 +418,13 @@ static u32 ih_v6_1_get_wptr(struct amdgpu_device *adev, · 417 unmodified lines
418418 tmp = RREG32_NO_KIQ(ih_regs->ih_rb_cntl);
419419 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
420420 WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
421+
422+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
423+ * can be detected.
424+ */
425+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
426+ WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
427+
421428 out:
422429 return (wptr & ih->ptr_mask);
423430 }
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c+0−9
@@ -674,14 +674,6 @@ static int jpeg_v4_0_set_powergating_state(void *handle, · 673 unmodified lines
674674 return ret;
675675 }
676676
677−static int jpeg_v4_0_set_interrupt_state(struct amdgpu_device *adev,
678− struct amdgpu_irq_src *source,
679− unsigned type,
680− enum amdgpu_interrupt_state state)
681−{
682− return 0;
683−}
684−
685677 static int jpeg_v4_0_set_ras_interrupt_state(struct amdgpu_device *adev,
686678 struct amdgpu_irq_src *source,
687679 unsigned int type,
@@ -765,7 +757,6 @@ static void jpeg_v4_0_set_dec_ring_funcs(struct amdgpu_device *adev) · 77 unmodified lines
765757 }
766758
767759 static const struct amdgpu_irq_src_funcs jpeg_v4_0_irq_funcs = {
768− .set = jpeg_v4_0_set_interrupt_state,
769760 .process = jpeg_v4_0_process_interrupt,
770761 };
771762
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c+0−10
@@ -181,7 +181,6 @@ static int jpeg_v4_0_5_hw_fini(void *handle) · 180 unmodified lines
181181 RREG32_SOC15(JPEG, 0, regUVD_JRBC_STATUS))
182182 jpeg_v4_0_5_set_powergating_state(adev, AMD_PG_STATE_GATE);
183183 }
184− amdgpu_irq_put(adev, &adev->jpeg.inst->irq, 0);
185184
186185 return 0;
187186 }
@@ -516,14 +515,6 @@ static int jpeg_v4_0_5_set_powergating_state(void *handle, · 328 unmodified lines
516515 return ret;
517516 }
518517
519−static int jpeg_v4_0_5_set_interrupt_state(struct amdgpu_device *adev,
520− struct amdgpu_irq_src *source,
521− unsigned type,
522− enum amdgpu_interrupt_state state)
523−{
524− return 0;
525−}
526−
527518 static int jpeg_v4_0_5_process_interrupt(struct amdgpu_device *adev,
528519 struct amdgpu_irq_src *source,
529520 struct amdgpu_iv_entry *entry)
@@ -603,7 +594,6 @@ static void jpeg_v4_0_5_set_dec_ring_funcs(struct amdgpu_device *adev) · 73 unmodified lines
603594 }
604595
605596 static const struct amdgpu_irq_src_funcs jpeg_v4_0_5_irq_funcs = {
606− .set = jpeg_v4_0_5_set_interrupt_state,
607597 .process = jpeg_v4_0_5_process_interrupt,
608598 };
609599
drivers/gpu/drm/amd/amdgpu/navi10_ih.c+6−0
@@ -442,6 +442,12 @@ static u32 navi10_ih_get_wptr(struct amdgpu_device *adev, · 441 unmodified lines
442442 tmp = RREG32_NO_KIQ(ih_regs->ih_rb_cntl);
443443 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
444444 WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
445+
446+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
447+ * can be detected.
448+ */
449+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
450+ WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
445451 out:
446452 return (wptr & ih->ptr_mask);
447453 }
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c+6−0
@@ -431,6 +431,12 @@ static void nbio_v7_9_init_registers(struct amdgpu_device *adev) · 430 unmodified lines
431431 u32 inst_mask;
432432 int i;
433433
434+ if (amdgpu_sriov_vf(adev))
435+ adev->rmmio_remap.reg_offset =
436+ SOC15_REG_OFFSET(
437+ NBIO, 0,
438+ regBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL)
439+ << 2;
434440 WREG32_SOC15(NBIO, 0, regXCC_DOORBELL_FENCE,
435441 0xff & ~(adev->gfx.xcc_mask));
436442
drivers/gpu/drm/amd/amdgpu/si_ih.c+6−0
@@ -119,6 +119,12 @@ static u32 si_ih_get_wptr(struct amdgpu_device *adev, · 118 unmodified lines
119119 tmp = RREG32(IH_RB_CNTL);
120120 tmp |= IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK;
121121 WREG32(IH_RB_CNTL, tmp);
122+
123+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
124+ * can be detected.
125+ */
126+ tmp &= ~IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK;
127+ WREG32(IH_RB_CNTL, tmp);
122128 }
123129 return (wptr & ih->ptr_mask);
124130 }
drivers/gpu/drm/amd/amdgpu/soc15.c+22−0
@@ -1298,10 +1298,32 @@ static int soc15_common_suspend(void *handle) · 1297 unmodified lines
12981298 return soc15_common_hw_fini(adev);
12991299 }
13001300
1301+static bool soc15_need_reset_on_resume(struct amdgpu_device *adev)
1302+{
1303+ u32 sol_reg;
1304+
1305+ sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81);
1306+
1307+ /* Will reset for the following suspend abort cases.
1308+ * 1) Only reset limit on APU side, dGPU hasn't checked yet.
1309+ * 2) S3 suspend abort and TOS already launched.
1310+ */
1311+ if (adev->flags & AMD_IS_APU && adev->in_s3 &&
1312+ !adev->suspend_complete &&
1313+ sol_reg)
1314+ return true;
1315+
1316+ return false;
1317+}
1318+
13011319 static int soc15_common_resume(void *handle)
13021320 {
13031321 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
13041322
1323+ if (soc15_need_reset_on_resume(adev)) {
1324+ dev_info(adev->dev, "S3 suspend abort case, let's reset ASIC.\n");
1325+ soc15_asic_reset(adev);
1326+ }
13051327 return soc15_common_hw_init(adev);
13061328 }
13071329
drivers/gpu/drm/amd/amdgpu/tonga_ih.c+6−0
@@ -219,6 +219,12 @@ static u32 tonga_ih_get_wptr(struct amdgpu_device *adev, · 218 unmodified lines
219219 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
220220 WREG32(mmIH_RB_CNTL, tmp);
221221
222+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
223+ * can be detected.
224+ */
225+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
226+ WREG32(mmIH_RB_CNTL, tmp);
227+
222228 out:
223229 return (wptr & ih->ptr_mask);
224230 }
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c+0−17
@@ -2017,22 +2017,6 @@ static int vcn_v4_0_set_powergating_state(void *handle, enum amd_powergating_sta · 2016 unmodified lines
20172017 return ret;
20182018 }
20192019
2020−/**
2021− * vcn_v4_0_set_interrupt_state - set VCN block interrupt state
2022− *
2023− * @adev: amdgpu_device pointer
2024− * @source: interrupt sources
2025− * @type: interrupt types
2026− * @state: interrupt states
2027− *
2028− * Set VCN block interrupt state
2029− */
2030−static int vcn_v4_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source,
2031− unsigned type, enum amdgpu_interrupt_state state)
2032−{
2033− return 0;
2034−}
2035−
20362020 /**
20372021 * vcn_v4_0_set_ras_interrupt_state - set VCN block RAS interrupt state
20382022 *
@@ -2097,7 +2081,6 @@ static int vcn_v4_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_ · 58 unmodified lines
20972081 }
20982082
20992083 static const struct amdgpu_irq_src_funcs vcn_v4_0_irq_funcs = {
2100− .set = vcn_v4_0_set_interrupt_state,
21012084 .process = vcn_v4_0_process_interrupt,
21022085 };
21032086
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c+0−19
@@ -269,8 +269,6 @@ static int vcn_v4_0_5_hw_fini(void *handle) · 268 unmodified lines
269269 vcn_v4_0_5_set_powergating_state(adev, AMD_PG_STATE_GATE);
270270 }
271271 }
272−
273− amdgpu_irq_put(adev, &adev->vcn.inst[i].irq, 0);
274272 }
275273
276274 return 0;
@@ -1668,22 +1666,6 @@ static int vcn_v4_0_5_set_powergating_state(void *handle, enum amd_powergating_s · 1391 unmodified lines
16681666 return ret;
16691667 }
16701668
1671−/**
1672− * vcn_v4_0_5_set_interrupt_state - set VCN block interrupt state
1673− *
1674− * @adev: amdgpu_device pointer
1675− * @source: interrupt sources
1676− * @type: interrupt types
1677− * @state: interrupt states
1678− *
1679− * Set VCN block interrupt state
1680− */
1681−static int vcn_v4_0_5_set_interrupt_state(struct amdgpu_device *adev, struct amdgpu_irq_src *source,
1682− unsigned type, enum amdgpu_interrupt_state state)
1683−{
1684− return 0;
1685−}
1686−
16871669 /**
16881670 * vcn_v4_0_5_process_interrupt - process VCN block interrupt
16891671 *
@@ -1726,7 +1708,6 @@ static int vcn_v4_0_5_process_interrupt(struct amdgpu_device *adev, struct amdgp · 36 unmodified lines
17261708 }
17271709
17281710 static const struct amdgpu_irq_src_funcs vcn_v4_0_5_irq_funcs = {
1729− .set = vcn_v4_0_5_set_interrupt_state,
17301711 .process = vcn_v4_0_5_process_interrupt,
17311712 };
17321713
drivers/gpu/drm/amd/amdgpu/vega10_ih.c+6−0
@@ -373,6 +373,12 @@ static u32 vega10_ih_get_wptr(struct amdgpu_device *adev, · 372 unmodified lines
373373 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
374374 WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
375375
376+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
377+ * can be detected.
378+ */
379+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
380+ WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
381+
376382 out:
377383 return (wptr & ih->ptr_mask);
378384 }
drivers/gpu/drm/amd/amdgpu/vega20_ih.c+6−0
@@ -421,6 +421,12 @@ static u32 vega20_ih_get_wptr(struct amdgpu_device *adev, · 420 unmodified lines
421421 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
422422 WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
423423
424+ /* Unset the CLEAR_OVERFLOW bit immediately so new overflows
425+ * can be detected.
426+ */
427+ tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
428+ WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
429+
424430 out:
425431 return (wptr & ih->ptr_mask);
426432 }
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h+7−7
@@ -674,7 +674,7 @@ static const uint32_t cwsr_trap_gfx9_hex[] = { · 673 unmodified lines
674674 0x86ea6a6a, 0x8f6e837a,
675675 0xb96ee0c2, 0xbf800002,
676676 0xb97a0002, 0xbf8a0000,
677− 0xbe801f6c, 0xbf810000,
677+ 0xbe801f6c, 0xbf9b0000,
678678 };
679679
680680 static const uint32_t cwsr_trap_nv1x_hex[] = {
@@ -1091,7 +1091,7 @@ static const uint32_t cwsr_trap_nv1x_hex[] = { · 410 unmodified lines
10911091 0xb9eef807, 0x876dff6d,
10921092 0x0000ffff, 0x87fe7e7e,
10931093 0x87ea6a6a, 0xb9faf802,
1094− 0xbe80226c, 0xbf810000,
1094+ 0xbe80226c, 0xbf9b0000,
10951095 0xbf9f0000, 0xbf9f0000,
10961096 0xbf9f0000, 0xbf9f0000,
10971097 0xbf9f0000, 0x00000000,
@@ -1574,7 +1574,7 @@ static const uint32_t cwsr_trap_arcturus_hex[] = { · 476 unmodified lines
15741574 0x86ea6a6a, 0x8f6e837a,
15751575 0xb96ee0c2, 0xbf800002,
15761576 0xb97a0002, 0xbf8a0000,
1577− 0xbe801f6c, 0xbf810000,
1577+ 0xbe801f6c, 0xbf9b0000,
15781578 };
15791579
15801580 static const uint32_t cwsr_trap_aldebaran_hex[] = {
@@ -2065,7 +2065,7 @@ static const uint32_t cwsr_trap_aldebaran_hex[] = { · 484 unmodified lines
20652065 0x86ea6a6a, 0x8f6e837a,
20662066 0xb96ee0c2, 0xbf800002,
20672067 0xb97a0002, 0xbf8a0000,
2068− 0xbe801f6c, 0xbf810000,
2068+ 0xbe801f6c, 0xbf9b0000,
20692069 };
20702070
20712071 static const uint32_t cwsr_trap_gfx10_hex[] = {
@@ -2500,7 +2500,7 @@ static const uint32_t cwsr_trap_gfx10_hex[] = { · 428 unmodified lines
25002500 0x876dff6d, 0x0000ffff,
25012501 0x87fe7e7e, 0x87ea6a6a,
25022502 0xb9faf802, 0xbe80226c,
2503− 0xbf810000, 0xbf9f0000,
2503+ 0xbf9b0000, 0xbf9f0000,
25042504 0xbf9f0000, 0xbf9f0000,
25052505 0xbf9f0000, 0xbf9f0000,
25062506 };
@@ -2944,7 +2944,7 @@ static const uint32_t cwsr_trap_gfx11_hex[] = { · 437 unmodified lines
29442944 0xb8eef802, 0xbf0d866e,
29452945 0xbfa20002, 0xb97af802,
29462946 0xbe80486c, 0xb97af802,
2947− 0xbe804a6c, 0xbfb00000,
2947+ 0xbe804a6c, 0xbfb10000,
29482948 0xbf9f0000, 0xbf9f0000,
29492949 0xbf9f0000, 0xbf9f0000,
29502950 0xbf9f0000, 0x00000000,
@@ -3436,5 +3436,5 @@ static const uint32_t cwsr_trap_gfx9_4_3_hex[] = { · 485 unmodified lines
34363436 0x86ea6a6a, 0x8f6e837a,
34373437 0xb96ee0c2, 0xbf800002,
34383438 0xb97a0002, 0xbf8a0000,
3439− 0xbe801f6c, 0xbf810000,
3439+ 0xbe801f6c, 0xbf9b0000,
34403440 };
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm+1−1
@@ -1104,7 +1104,7 @@ L_RETURN_WITHOUT_PRIV: · 1103 unmodified lines
11041104 s_rfe_b64 s_restore_pc_lo //Return to the main shader program and resume execution
11051105
11061106 L_END_PGM:
1107− s_endpgm
1107+ s_endpgm_saved
11081108 end
11091109
11101110 function write_hwreg_to_mem(s, s_rsrc, s_mem_offset)
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm+1−1
@@ -921,7 +921,7 @@ L_RESTORE: · 920 unmodified lines
921921 /* the END */
922922 /**************************************************************************/
923923 L_END_PGM:
924− s_endpgm
924+ s_endpgm_saved
925925
926926 end
927927
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c+3−1
@@ -1442,7 +1442,9 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, · 1441 unmodified lines
14421442 kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT);
14431443
14441444 /* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */
1445− amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv);
1445+ err = amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv);
1446+ if (err)
1447+ goto sync_memory_failed;
14461448 }
14471449
14481450 mutex_unlock(&p->mutex);
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c+1−1
@@ -574,7 +574,7 @@ svm_migrate_copy_to_ram(struct amdgpu_device *adev, struct svm_range *prange, · 573 unmodified lines
574574 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, prange->start,
575575 prange->last);
576576
577− addr = prange->start << PAGE_SHIFT;
577+ addr = migrate->start;
578578
579579 src = (uint64_t *)(scratch + npages);
580580 dst = scratch;
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c+1−0
@@ -170,6 +170,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd, · 169 unmodified lines
170170 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT;
171171 m->cp_hqd_pq_control |=
172172 ffs(q->queue_size / sizeof(unsigned int)) - 1 - 1;
173+ m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__UNORD_DISPATCH_MASK;
173174 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control);
174175
175176 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c+1−0
@@ -224,6 +224,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd, · 223 unmodified lines
224224 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT;
225225 m->cp_hqd_pq_control |=
226226 ffs(q->queue_size / sizeof(unsigned int)) - 1 - 1;
227+ m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__UNORD_DISPATCH_MASK;
227228 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control);
228229
229230 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
drivers/gpu/drm/amd/amdkfd/kfd_priv.h+7−2
@@ -1488,10 +1488,15 @@ void kfd_dec_compute_active(struct kfd_node *dev); · 1487 unmodified lines
14881488
14891489 /* Cgroup Support */
14901490 /* Check with device cgroup if @kfd device is accessible */
1491−static inline int kfd_devcgroup_check_permission(struct kfd_node *kfd)
1491+static inline int kfd_devcgroup_check_permission(struct kfd_node *node)
14921492 {
14931493 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF)
1494− struct drm_device *ddev = adev_to_drm(kfd->adev);
1494+ struct drm_device *ddev;
1495+
1496+ if (node->xcp)
1497+ ddev = node->xcp->ddev;
1498+ else
1499+ ddev = adev_to_drm(node->adev);
14951500
14961501 return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR,
14971502 ddev->render->index,
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+21−16
@@ -272,6 +272,7 @@ static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, · 271 unmodified lines
272272 {
273273 u32 v_blank_start, v_blank_end, h_position, v_position;
274274 struct amdgpu_crtc *acrtc = NULL;
275+ struct dc *dc = adev->dm.dc;
275276
276277 if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc))
277278 return -EINVAL;
@@ -284,6 +285,9 @@ static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc, · 6 unmodified lines
284285 return 0;
285286 }
286287
288+ if (dc && dc->caps.ips_support && dc->idle_optimizations_allowed)
289+ dc_allow_idle_optimizations(dc, false);
290+
287291 /*
288292 * TODO rework base driver to use values directly.
289293 * for now parse it back into reg-format
@@ -1715,7 +1719,10 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) · 1425 unmodified lines
17151719 init_data.nbio_reg_offsets = adev->reg_offset[NBIO_HWIP][0];
17161720 init_data.clk_reg_offsets = adev->reg_offset[CLK_HWIP][0];
17171721
1718− init_data.flags.disable_ips = DMUB_IPS_DISABLE_ALL;
1722+ if (amdgpu_dc_debug_mask & DC_DISABLE_IPS)
1723+ init_data.flags.disable_ips = DMUB_IPS_DISABLE_ALL;
1724+
1725+ init_data.flags.disable_ips_in_vpb = 1;
17191726
17201727 /* Enable DWB for tested platforms only */
17211728 if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0))
@@ -8976,16 +8983,8 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) · 7254 unmodified lines
89768983
89778984 trace_amdgpu_dm_atomic_commit_tail_begin(state);
89788985
8979− if (dm->dc->caps.ips_support) {
8980− for_each_oldnew_connector_in_state(state, connector, old_con_state, new_con_state, i) {
8981− if (new_con_state->crtc &&
8982− new_con_state->crtc->state->active &&
8983− drm_atomic_crtc_needs_modeset(new_con_state->crtc->state)) {
8984− dc_dmub_srv_apply_idle_power_optimizations(dm->dc, false);
8985− break;
8986− }
8987− }
8988− }
8986+ if (dm->dc->caps.ips_support && dm->dc->idle_optimizations_allowed)
8987+ dc_allow_idle_optimizations(dm->dc, false);
89898988
89908989 drm_atomic_helper_update_legacy_modeset_state(dev, state);
89918990 drm_dp_mst_atomic_wait_for_dependencies(state);
@@ -9188,6 +9187,10 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) · 196 unmodified lines
91889187 * To fix this, DC should permit updating only stream properties.
91899188 */
91909189 dummy_updates = kzalloc(sizeof(struct dc_surface_update) * MAX_SURFACES, GFP_ATOMIC);
9190+ if (!dummy_updates) {
9191+ DRM_ERROR("Failed to allocate memory for dummy_updates.\n");
9192+ continue;
9193+ }
91919194 for (j = 0; j < status->plane_count; j++)
91929195 dummy_updates[j].surface = status->plane_states[0];
91939196
@@ -10728,11 +10731,13 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, · 1534 unmodified lines
1072810731 goto fail;
1072910732 }
1073010733
10731− ret = compute_mst_dsc_configs_for_state(state, dm_state->context, vars);
10732− if (ret) {
10733− DRM_DEBUG_DRIVER("compute_mst_dsc_configs_for_state() failed\n");
10734− ret = -EINVAL;
10735− goto fail;
10734+ if (dc_resource_is_dsc_encoding_supported(dc)) {
10735+ ret = compute_mst_dsc_configs_for_state(state, dm_state->context, vars);
10736+ if (ret) {
10737+ DRM_DEBUG_DRIVER("compute_mst_dsc_configs_for_state() failed\n");
10738+ ret = -EINVAL;
10739+ goto fail;
10740+ }
1073610741 }
1073710742
1073810743 ret = dm_update_mst_vcpi_slots_for_dsc(state, dm_state->context, vars);
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c+4−1
@@ -711,7 +711,7 @@ static inline int dm_irq_state(struct amdgpu_device *adev, · 710 unmodified lines
711711 {
712712 bool st;
713713 enum dc_irq_source irq_source;
714−
714+ struct dc *dc = adev->dm.dc;
715715 struct amdgpu_crtc *acrtc = adev->mode_info.crtcs[crtc_id];
716716
717717 if (!acrtc) {
@@ -729,6 +729,9 @@ static inline int dm_irq_state(struct amdgpu_device *adev, · 11 unmodified lines
729729
730730 st = (state == AMDGPU_IRQ_STATE_ENABLE);
731731
732+ if (dc && dc->caps.ips_support && dc->idle_optimizations_allowed)
733+ dc_allow_idle_optimizations(dc, false);
734+
732735 dc_interrupt_set(adev->dm.dc, irq_source, st);
733736 return 0;
734737 }
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c+16−16
@@ -437,32 +437,32 @@ static struct wm_table ddr5_wm_table = { · 436 unmodified lines
437437 .wm_inst = WM_A,
438438 .wm_type = WM_TYPE_PSTATE_CHG,
439439 .pstate_latency_us = 11.72,
440− .sr_exit_time_us = 14.0,
441− .sr_enter_plus_exit_time_us = 16.0,
440+ .sr_exit_time_us = 28.0,
441+ .sr_enter_plus_exit_time_us = 30.0,
442442 .valid = true,
443443 },
444444 {
445445 .wm_inst = WM_B,
446446 .wm_type = WM_TYPE_PSTATE_CHG,
447447 .pstate_latency_us = 11.72,
448− .sr_exit_time_us = 14.0,
449− .sr_enter_plus_exit_time_us = 16.0,
448+ .sr_exit_time_us = 28.0,
449+ .sr_enter_plus_exit_time_us = 30.0,
450450 .valid = true,
451451 },
452452 {
453453 .wm_inst = WM_C,
454454 .wm_type = WM_TYPE_PSTATE_CHG,
455455 .pstate_latency_us = 11.72,
456− .sr_exit_time_us = 14.0,
457− .sr_enter_plus_exit_time_us = 16.0,
456+ .sr_exit_time_us = 28.0,
457+ .sr_enter_plus_exit_time_us = 30.0,
458458 .valid = true,
459459 },
460460 {
461461 .wm_inst = WM_D,
462462 .wm_type = WM_TYPE_PSTATE_CHG,
463463 .pstate_latency_us = 11.72,
464− .sr_exit_time_us = 14.0,
465− .sr_enter_plus_exit_time_us = 16.0,
464+ .sr_exit_time_us = 28.0,
465+ .sr_enter_plus_exit_time_us = 30.0,
466466 .valid = true,
467467 },
468468 }
@@ -474,32 +474,32 @@ static struct wm_table lpddr5_wm_table = { · 5 unmodified lines
474474 .wm_inst = WM_A,
475475 .wm_type = WM_TYPE_PSTATE_CHG,
476476 .pstate_latency_us = 11.65333,
477− .sr_exit_time_us = 14.0,
478− .sr_enter_plus_exit_time_us = 16.0,
477+ .sr_exit_time_us = 28.0,
478+ .sr_enter_plus_exit_time_us = 30.0,
479479 .valid = true,
480480 },
481481 {
482482 .wm_inst = WM_B,
483483 .wm_type = WM_TYPE_PSTATE_CHG,
484484 .pstate_latency_us = 11.65333,
485− .sr_exit_time_us = 14.0,
486− .sr_enter_plus_exit_time_us = 16.0,
485+ .sr_exit_time_us = 28.0,
486+ .sr_enter_plus_exit_time_us = 30.0,
487487 .valid = true,
488488 },
489489 {
490490 .wm_inst = WM_C,
491491 .wm_type = WM_TYPE_PSTATE_CHG,
492492 .pstate_latency_us = 11.65333,
493− .sr_exit_time_us = 14.0,
494− .sr_enter_plus_exit_time_us = 16.0,
493+ .sr_exit_time_us = 28.0,
494+ .sr_enter_plus_exit_time_us = 30.0,
495495 .valid = true,
496496 },
497497 {
498498 .wm_inst = WM_D,
499499 .wm_type = WM_TYPE_PSTATE_CHG,
500500 .pstate_latency_us = 11.65333,
501− .sr_exit_time_us = 14.0,
502− .sr_enter_plus_exit_time_us = 16.0,
501+ .sr_exit_time_us = 28.0,
502+ .sr_enter_plus_exit_time_us = 30.0,
503503 .valid = true,
504504 },
505505 }
drivers/gpu/drm/amd/display/dc/core/dc.c+3−1
@@ -3817,7 +3817,9 @@ static void commit_planes_for_stream(struct dc *dc, · 3816 unmodified lines
38173817 * programming has completed (we turn on phantom OTG in order
38183818 * to complete the plane disable for phantom pipes).
38193819 */
3820− dc->hwss.apply_ctx_to_hw(dc, context);
3820+
3821+ if (dc->hwss.disable_phantom_streams)
3822+ dc->hwss.disable_phantom_streams(dc, context);
38213823 }
38223824
38233825 if (update_type != UPDATE_TYPE_FAST)
drivers/gpu/drm/amd/display/dc/core/dc_state.c+3−0
@@ -291,11 +291,14 @@ void dc_state_destruct(struct dc_state *state) · 290 unmodified lines
291291 dc_stream_release(state->phantom_streams[i]);
292292 state->phantom_streams[i] = NULL;
293293 }
294+ state->phantom_stream_count = 0;
294295
295296 for (i = 0; i < state->phantom_plane_count; i++) {
296297 dc_plane_state_release(state->phantom_planes[i]);
297298 state->phantom_planes[i] = NULL;
298299 }
300+ state->phantom_plane_count = 0;
301+
299302 state->stream_mask = 0;
300303 memset(&state->res_ctx, 0, sizeof(state->res_ctx));
301304 memset(&state->pp_display_cfg, 0, sizeof(state->pp_display_cfg));
drivers/gpu/drm/amd/display/dc/dc.h+1−0
@@ -434,6 +434,7 @@ struct dc_config { · 433 unmodified lines
434434 bool EnableMinDispClkODM;
435435 bool enable_auto_dpm_test_logs;
436436 unsigned int disable_ips;
437+ unsigned int disable_ips_in_vpb;
437438 };
438439
439440 enum visual_confirm {
drivers/gpu/drm/amd/display/dc/dc_types.h+5−0
@@ -1034,6 +1034,7 @@ enum replay_FW_Message_type { · 1033 unmodified lines
10341034 Replay_Msg_Not_Support = -1,
10351035 Replay_Set_Timing_Sync_Supported,
10361036 Replay_Set_Residency_Frameupdate_Timer,
1037+ Replay_Set_Pseudo_VTotal,
10371038 };
10381039
10391040 union replay_error_status {
@@ -1089,6 +1090,10 @@ struct replay_settings { · 49 unmodified lines
10891090 uint16_t coasting_vtotal_table[PR_COASTING_TYPE_NUM];
10901091 /* Maximum link off frame count */
10911092 enum replay_link_off_frame_count_level link_off_frame_count_level;
1093+ /* Replay pseudo vtotal for abm + ips on full screen video which can improve ips residency */
1094+ uint16_t abm_with_ips_on_full_screen_video_pseudo_vtotal;
1095+ /* Replay last pseudo vtotal set to DMUB */
1096+ uint16_t last_pseudo_vtotal;
10921097 };
10931098
10941099 /* To split out "global" and "per-panel" config settings.
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c+2−2
@@ -203,12 +203,12 @@ void dcn32_link_encoder_construct( · 202 unmodified lines
203203 enc10->base.hpd_source = init_data->hpd_source;
204204 enc10->base.connector = init_data->connector;
205205
206− if (enc10->base.connector.id == CONNECTOR_ID_USBC)
207− enc10->base.features.flags.bits.DP_IS_USB_C = 1;
208206
209207 enc10->base.preferred_engine = ENGINE_ID_UNKNOWN;
210208
211209 enc10->base.features = *enc_features;
210+ if (enc10->base.connector.id == CONNECTOR_ID_USBC)
211+ enc10->base.features.flags.bits.DP_IS_USB_C = 1;
212212
213213 enc10->base.transmitter = init_data->transmitter;
214214
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c+2−2
@@ -184,8 +184,6 @@ void dcn35_link_encoder_construct( · 183 unmodified lines
184184 enc10->base.hpd_source = init_data->hpd_source;
185185 enc10->base.connector = init_data->connector;
186186
187− if (enc10->base.connector.id == CONNECTOR_ID_USBC)
188− enc10->base.features.flags.bits.DP_IS_USB_C = 1;
189187
190188 enc10->base.preferred_engine = ENGINE_ID_UNKNOWN;
191189
@@ -240,6 +238,8 @@ void dcn35_link_encoder_construct( · 48 unmodified lines
240238 }
241239
242240 enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
241+ if (enc10->base.connector.id == CONNECTOR_ID_USBC)
242+ enc10->base.features.flags.bits.DP_IS_USB_C = 1;
243243
244244 if (bp_funcs->get_connector_speed_cap_info)
245245 result = bp_funcs->get_connector_speed_cap_info(enc10->base.ctx->dc_bios,
drivers/gpu/drm/amd/display/dc/dml/Makefile+3−3
@@ -72,11 +72,11 @@ CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_lib.o := $(dml_ccflags) · 71 unmodified lines
7272 CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_vba.o := $(dml_ccflags)
7373 CFLAGS_$(AMDDALPATH)/dc/dml/dcn10/dcn10_fpu.o := $(dml_ccflags)
7474 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/dcn20_fpu.o := $(dml_ccflags)
75−CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_mode_vba_20.o := $(dml_ccflags)
75+CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_mode_vba_20.o := $(dml_ccflags) $(frame_warn_flag)
7676 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_rq_dlg_calc_20.o := $(dml_ccflags)
77−CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_mode_vba_20v2.o := $(dml_ccflags)
77+CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_mode_vba_20v2.o := $(dml_ccflags) $(frame_warn_flag)
7878 CFLAGS_$(AMDDALPATH)/dc/dml/dcn20/display_rq_dlg_calc_20v2.o := $(dml_ccflags)
79−CFLAGS_$(AMDDALPATH)/dc/dml/dcn21/display_mode_vba_21.o := $(dml_ccflags)
79+CFLAGS_$(AMDDALPATH)/dc/dml/dcn21/display_mode_vba_21.o := $(dml_ccflags) $(frame_warn_flag)
8080 CFLAGS_$(AMDDALPATH)/dc/dml/dcn21/display_rq_dlg_calc_21.o := $(dml_ccflags)
8181 CFLAGS_$(AMDDALPATH)/dc/dml/dcn30/display_mode_vba_30.o := $(dml_ccflags) $(frame_warn_flag)
8282 CFLAGS_$(AMDDALPATH)/dc/dml/dcn30/display_rq_dlg_calc_30.o := $(dml_ccflags)
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c+13−6
@@ -1112,7 +1112,7 @@ struct pipe_slice_table { · 1111 unmodified lines
11121112 struct pipe_ctx *pri_pipe;
11131113 struct dc_plane_state *plane;
11141114 int slice_count;
1115− } mpc_combines[MAX_SURFACES];
1115+ } mpc_combines[MAX_PLANES];
11161116 int mpc_combine_count;
11171117 };
11181118
@@ -1288,7 +1288,7 @@ static bool update_pipes_with_split_flags(struct dc *dc, struct dc_state *contex · 169 unmodified lines
12881288 return updated;
12891289 }
12901290
1291−static bool should_allow_odm_power_optimization(struct dc *dc,
1291+static bool should_apply_odm_power_optimization(struct dc *dc,
12921292 struct dc_state *context, struct vba_vars_st *v, int *split,
12931293 bool *merge)
12941294 {
@@ -1392,9 +1392,12 @@ static void try_odm_power_optimization_and_revalidate( · 97 unmodified lines
13921392 {
13931393 int i;
13941394 unsigned int new_vlevel;
1395+ unsigned int cur_policy[MAX_PIPES];
13951396
1396− for (i = 0; i < pipe_cnt; i++)
1397+ for (i = 0; i < pipe_cnt; i++) {
1398+ cur_policy[i] = pipes[i].pipe.dest.odm_combine_policy;
13971399 pipes[i].pipe.dest.odm_combine_policy = dm_odm_combine_policy_2to1;
1400+ }
13981401
13991402 new_vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt);
14001403
@@ -1403,6 +1406,9 @@ static void try_odm_power_optimization_and_revalidate( · 2 unmodified lines
14031406 memset(merge, 0, MAX_PIPES * sizeof(bool));
14041407 *vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, new_vlevel, split, merge);
14051408 context->bw_ctx.dml.vba.VoltageLevel = *vlevel;
1409+ } else {
1410+ for (i = 0; i < pipe_cnt; i++)
1411+ pipes[i].pipe.dest.odm_combine_policy = cur_policy[i];
14061412 }
14071413 }
14081414
@@ -1580,7 +1586,7 @@ static void dcn32_full_validate_bw_helper(struct dc *dc, · 171 unmodified lines
15801586 }
15811587 }
15821588
1583− if (should_allow_odm_power_optimization(dc, context, vba, split, merge))
1589+ if (should_apply_odm_power_optimization(dc, context, vba, split, merge))
15841590 try_odm_power_optimization_and_revalidate(
15851591 dc, context, pipes, split, merge, vlevel, *pipe_cnt);
15861592
@@ -2209,7 +2215,8 @@ bool dcn32_internal_validate_bw(struct dc *dc, · 622 unmodified lines
22092215 int i;
22102216
22112217 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
2212− dcn32_update_dml_pipes_odm_policy_based_on_context(dc, context, pipes);
2218+ if (!dc->config.enable_windowed_mpo_odm)
2219+ dcn32_update_dml_pipes_odm_policy_based_on_context(dc, context, pipes);
22132220
22142221 /* repopulate_pipes = 1 means the pipes were either split or merged. In this case
22152222 * we have to re-calculate the DET allocation and run through DML once more to
@@ -2753,7 +2760,7 @@ static int build_synthetic_soc_states(bool disable_dc_mode_overwrite, struct clk · 537 unmodified lines
27532760 struct _vcs_dpi_voltage_scaling_st entry = {0};
27542761 struct clk_limit_table_entry max_clk_data = {0};
27552762
2756− unsigned int min_dcfclk_mhz = 199, min_fclk_mhz = 299;
2763+ unsigned int min_dcfclk_mhz = 399, min_fclk_mhz = 599;
27572764
27582765 static const unsigned int num_dcfclk_stas = 5;
27592766 unsigned int dcfclk_sta_targets[DC__VOLTAGE_STATES] = {199, 615, 906, 1324, 1564};
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c+2−2
@@ -164,8 +164,8 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = { · 163 unmodified lines
164164 },
165165 },
166166 .num_states = 5,
167− .sr_exit_time_us = 14.0,
168− .sr_enter_plus_exit_time_us = 16.0,
167+ .sr_exit_time_us = 28.0,
168+ .sr_enter_plus_exit_time_us = 30.0,
169169 .sr_exit_z8_time_us = 210.0,
170170 .sr_enter_plus_exit_z8_time_us = 320.0,
171171 .fclk_change_latency_us = 24.0,
drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c+12−21
@@ -341,9 +341,6 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc, · 340 unmodified lines
341341 break;
342342 }
343343
344− if (dml2->config.bbox_overrides.clks_table.num_states)
345− p->in_states->num_states = dml2->config.bbox_overrides.clks_table.num_states;
346−
347344 /* Override from passed values, if available */
348345 for (i = 0; i < p->in_states->num_states; i++) {
349346 if (dml2->config.bbox_overrides.sr_exit_latency_us) {
@@ -400,6 +397,7 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc, · 50 unmodified lines
400397 }
401398 /* Copy clocks tables entries, if available */
402399 if (dml2->config.bbox_overrides.clks_table.num_states) {
400+ p->in_states->num_states = dml2->config.bbox_overrides.clks_table.num_states;
403401
404402 for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels; i++) {
405403 p->in_states->state_array[i].dcfclk_mhz = dml2->config.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz;
@@ -793,35 +791,28 @@ static void populate_dml_surface_cfg_from_plane_state(enum dml_project_id dml2_p · 387 unmodified lines
793791 }
794792 }
795793
796−/*TODO no support for mpc combine, need rework - should calculate scaling params based on plane+stream*/
797−static struct scaler_data get_scaler_data_for_plane(const struct dc_plane_state *in, const struct dc_state *context)
794+static struct scaler_data get_scaler_data_for_plane(const struct dc_plane_state *in, struct dc_state *context)
798795 {
799796 int i;
800− struct scaler_data data = { 0 };
797+ struct pipe_ctx *temp_pipe = &context->res_ctx.temp_pipe;
798+
799+ memset(temp_pipe, 0, sizeof(struct pipe_ctx));
801800
802801 for (i = 0; i < MAX_PIPES; i++) {
803802 const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
804803
805804 if (pipe->plane_state == in && !pipe->prev_odm_pipe) {
806− const struct pipe_ctx *next_pipe = pipe->next_odm_pipe;
807−
808− data = context->res_ctx.pipe_ctx[i].plane_res.scl_data;
809− while (next_pipe) {
810− data.h_active += next_pipe->plane_res.scl_data.h_active;
811− data.recout.width += next_pipe->plane_res.scl_data.recout.width;
812− if (in->rotation == ROTATION_ANGLE_0 || in->rotation == ROTATION_ANGLE_180) {
813− data.viewport.width += next_pipe->plane_res.scl_data.viewport.width;
814− } else {
815− data.viewport.height += next_pipe->plane_res.scl_data.viewport.height;
816− }
817− next_pipe = next_pipe->next_odm_pipe;
818− }
805+ temp_pipe->stream = pipe->stream;
806+ temp_pipe->plane_state = pipe->plane_state;
807+ temp_pipe->plane_res.scl_data.taps = pipe->plane_res.scl_data.taps;
808+
809+ resource_build_scaling_params(temp_pipe);
819810 break;
820811 }
821812 }
822813
823814 ASSERT(i < MAX_PIPES);
824− return data;
815+ return temp_pipe->plane_res.scl_data;
825816 }
826817
827818 static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_stream_state *in)
@@ -866,7 +857,7 @@ static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned · 38 unmodified lines
866857 out->ScalerEnabled[location] = false;
867858 }
868859
869−static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_plane_state *in, const struct dc_state *context)
860+static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out, unsigned int location, const struct dc_plane_state *in, struct dc_state *context)
870861 {
871862 const struct scaler_data scaler_data = get_scaler_data_for_plane(in, context);
872863
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c+3−3
@@ -1183,9 +1183,9 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx) · 1182 unmodified lines
11831183 dto_params.timing = &pipe_ctx->stream->timing;
11841184 dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
11851185 if (dccg) {
1186− dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
11871186 dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);
11881187 dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);
1188+ dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
11891189 }
11901190 } else if (dccg && dccg->funcs->disable_symclk_se) {
11911191 dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,
@@ -1476,7 +1476,7 @@ static enum dc_status dce110_enable_stream_timing( · 284 unmodified lines
14761476 return DC_OK;
14771477 }
14781478
1479−static enum dc_status apply_single_controller_ctx_to_hw(
1479+enum dc_status dce110_apply_single_controller_ctx_to_hw(
14801480 struct pipe_ctx *pipe_ctx,
14811481 struct dc_state *context,
14821482 struct dc *dc)
@@ -2302,7 +2302,7 @@ enum dc_status dce110_apply_ctx_to_hw( · 819 unmodified lines
23022302 if (pipe_ctx->top_pipe || pipe_ctx->prev_odm_pipe)
23032303 continue;
23042304
2305− status = apply_single_controller_ctx_to_hw(
2305+ status = dce110_apply_single_controller_ctx_to_hw(
23062306 pipe_ctx,
23072307 context,
23082308 dc);
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h+4−0
@@ -39,6 +39,10 @@ enum dc_status dce110_apply_ctx_to_hw( · 38 unmodified lines
3939 struct dc *dc,
4040 struct dc_state *context);
4141
42+enum dc_status dce110_apply_single_controller_ctx_to_hw(
43+ struct pipe_ctx *pipe_ctx,
44+ struct dc_state *context,
45+ struct dc *dc);
4246
4347 void dce110_enable_stream(struct pipe_ctx *pipe_ctx);
4448
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c+6−7
@@ -2561,7 +2561,7 @@ void dcn20_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx) · 2560 unmodified lines
25612561 tg->funcs->setup_vertical_interrupt2(tg, start_line);
25622562 }
25632563
2564−static void dcn20_reset_back_end_for_pipe(
2564+void dcn20_reset_back_end_for_pipe(
25652565 struct dc *dc,
25662566 struct pipe_ctx *pipe_ctx,
25672567 struct dc_state *context)
@@ -2790,18 +2790,17 @@ void dcn20_enable_stream(struct pipe_ctx *pipe_ctx) · 222 unmodified lines
27902790 }
27912791
27922792 if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {
2793− dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
2794− dccg->funcs->set_dpstreamclk(dccg, DTBCLK0, tg->inst, dp_hpo_inst);
2795−
2796− phyd32clk = get_phyd32clk_src(link);
2797− dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk);
2798−
27992793 dto_params.otg_inst = tg->inst;
28002794 dto_params.pixclk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10;
28012795 dto_params.num_odm_segments = get_odm_segment_count(pipe_ctx);
28022796 dto_params.timing = &pipe_ctx->stream->timing;
28032797 dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);
28042798 dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
2799+ dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
2800+ dccg->funcs->set_dpstreamclk(dccg, DTBCLK0, tg->inst, dp_hpo_inst);
2801+
2802+ phyd32clk = get_phyd32clk_src(link);
2803+ dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk);
28052804 } else {
28062805 if (dccg->funcs->enable_symclk_se)
28072806 dccg->funcs->enable_symclk_se(dccg, stream_enc->stream_enc_inst,
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h+4−0
@@ -84,6 +84,10 @@ enum dc_status dcn20_enable_stream_timing( · 83 unmodified lines
8484 void dcn20_disable_stream_gating(struct dc *dc, struct pipe_ctx *pipe_ctx);
8585 void dcn20_enable_stream_gating(struct dc *dc, struct pipe_ctx *pipe_ctx);
8686 void dcn20_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx);
87+void dcn20_reset_back_end_for_pipe(
88+ struct dc *dc,
89+ struct pipe_ctx *pipe_ctx,
90+ struct dc_state *context);
8791 void dcn20_init_blank(
8892 struct dc *dc,
8993 struct timing_generator *tg);
drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c+34−29
@@ -206,28 +206,32 @@ void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx) · 205 unmodified lines
206206 void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)
207207 {
208208 struct abm *abm = pipe_ctx->stream_res.abm;
209− uint32_t otg_inst = pipe_ctx->stream_res.tg->inst;
209+ struct timing_generator *tg = pipe_ctx->stream_res.tg;
210210 struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;
211211 struct dmcu *dmcu = pipe_ctx->stream->ctx->dc->res_pool->dmcu;
212+ uint32_t otg_inst;
213+
214+ if (!abm && !tg && !panel_cntl)
215+ return;
216+
217+ otg_inst = tg->inst;
212218
213219 if (dmcu) {
214220 dce110_set_pipe(pipe_ctx);
215221 return;
216222 }
217223
218− if (abm && panel_cntl) {
219− if (abm->funcs && abm->funcs->set_pipe_ex) {
220− abm->funcs->set_pipe_ex(abm,
224+ if (abm->funcs && abm->funcs->set_pipe_ex) {
225+ abm->funcs->set_pipe_ex(abm,
221226 otg_inst,
222227 SET_ABM_PIPE_NORMAL,
223228 panel_cntl->inst,
224229 panel_cntl->pwrseq_inst);
225− } else {
226− dmub_abm_set_pipe(abm, otg_inst,
227− SET_ABM_PIPE_NORMAL,
228− panel_cntl->inst,
229− panel_cntl->pwrseq_inst);
230− }
230+ } else {
231+ dmub_abm_set_pipe(abm, otg_inst,
232+ SET_ABM_PIPE_NORMAL,
233+ panel_cntl->inst,
234+ panel_cntl->pwrseq_inst);
231235 }
232236 }
233237
@@ -237,34 +241,35 @@ bool dcn21_set_backlight_level(struct pipe_ctx *pipe_ctx, · 3 unmodified lines
237241 {
238242 struct dc_context *dc = pipe_ctx->stream->ctx;
239243 struct abm *abm = pipe_ctx->stream_res.abm;
244+ struct timing_generator *tg = pipe_ctx->stream_res.tg;
240245 struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;
246+ uint32_t otg_inst;
247+
248+ if (!abm && !tg && !panel_cntl)
249+ return false;
250+
251+ otg_inst = tg->inst;
241252
242253 if (dc->dc->res_pool->dmcu) {
243254 dce110_set_backlight_level(pipe_ctx, backlight_pwm_u16_16, frame_ramp);
244255 return true;
245256 }
246257
247− if (abm != NULL) {
248− uint32_t otg_inst = pipe_ctx->stream_res.tg->inst;
249−
250− if (abm && panel_cntl) {
251− if (abm->funcs && abm->funcs->set_pipe_ex) {
252− abm->funcs->set_pipe_ex(abm,
253− otg_inst,
254− SET_ABM_PIPE_NORMAL,
255− panel_cntl->inst,
256− panel_cntl->pwrseq_inst);
257− } else {
258− dmub_abm_set_pipe(abm,
259− otg_inst,
260− SET_ABM_PIPE_NORMAL,
261− panel_cntl->inst,
262− panel_cntl->pwrseq_inst);
263− }
264− }
258+ if (abm->funcs && abm->funcs->set_pipe_ex) {
259+ abm->funcs->set_pipe_ex(abm,
260+ otg_inst,
261+ SET_ABM_PIPE_NORMAL,
262+ panel_cntl->inst,
263+ panel_cntl->pwrseq_inst);
264+ } else {
265+ dmub_abm_set_pipe(abm,
266+ otg_inst,
267+ SET_ABM_PIPE_NORMAL,
268+ panel_cntl->inst,
269+ panel_cntl->pwrseq_inst);
265270 }
266271
267− if (abm && abm->funcs && abm->funcs->set_backlight_level_pwm)
272+ if (abm->funcs && abm->funcs->set_backlight_level_pwm)
268273 abm->funcs->set_backlight_level_pwm(abm, backlight_pwm_u16_16,
269274 frame_ramp, 0, panel_cntl->inst);
270275 else
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c+67−9
@@ -1474,9 +1474,44 @@ void dcn32_update_dsc_pg(struct dc *dc, · 1473 unmodified lines
14741474 }
14751475 }
14761476
1477+void dcn32_disable_phantom_streams(struct dc *dc, struct dc_state *context)
1478+{
1479+ struct dce_hwseq *hws = dc->hwseq;
1480+ int i;
1481+
1482+ for (i = dc->res_pool->pipe_count - 1; i >= 0 ; i--) {
1483+ struct pipe_ctx *pipe_ctx_old =
1484+ &dc->current_state->res_ctx.pipe_ctx[i];
1485+ struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
1486+
1487+ if (!pipe_ctx_old->stream)
1488+ continue;
1489+
1490+ if (dc_state_get_pipe_subvp_type(dc->current_state, pipe_ctx_old) != SUBVP_PHANTOM)
1491+ continue;
1492+
1493+ if (pipe_ctx_old->top_pipe || pipe_ctx_old->prev_odm_pipe)
1494+ continue;
1495+
1496+ if (!pipe_ctx->stream || pipe_need_reprogram(pipe_ctx_old, pipe_ctx) ||
1497+ (pipe_ctx->stream && dc_state_get_pipe_subvp_type(context, pipe_ctx) != SUBVP_PHANTOM)) {
1498+ struct clock_source *old_clk = pipe_ctx_old->clock_source;
1499+
1500+ if (hws->funcs.reset_back_end_for_pipe)
1501+ hws->funcs.reset_back_end_for_pipe(dc, pipe_ctx_old, dc->current_state);
1502+ if (hws->funcs.enable_stream_gating)
1503+ hws->funcs.enable_stream_gating(dc, pipe_ctx_old);
1504+ if (old_clk)
1505+ old_clk->funcs->cs_power_down(old_clk);
1506+ }
1507+ }
1508+}
1509+
14771510 void dcn32_enable_phantom_streams(struct dc *dc, struct dc_state *context)
14781511 {
14791512 unsigned int i;
1513+ enum dc_status status = DC_OK;
1514+ struct dce_hwseq *hws = dc->hwseq;
14801515
14811516 for (i = 0; i < dc->res_pool->pipe_count; i++) {
14821517 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
@@ -1497,16 +1532,39 @@ void dcn32_enable_phantom_streams(struct dc *dc, struct dc_state *context) · 14 unmodified lines
14971532 }
14981533 }
14991534 for (i = 0; i < dc->res_pool->pipe_count; i++) {
1500− struct pipe_ctx *new_pipe = &context->res_ctx.pipe_ctx[i];
1501−
1502− if (new_pipe->stream && dc_state_get_pipe_subvp_type(context, new_pipe) == SUBVP_PHANTOM) {
1503− // If old context or new context has phantom pipes, apply
1504− // the phantom timings now. We can't change the phantom
1505− // pipe configuration safely without driver acquiring
1506− // the DMCUB lock first.
1507− dc->hwss.apply_ctx_to_hw(dc, context);
1508− break;
1535+ struct pipe_ctx *pipe_ctx_old =
1536+ &dc->current_state->res_ctx.pipe_ctx[i];
1537+ struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
1538+
1539+ if (pipe_ctx->stream == NULL)
1540+ continue;
1541+
1542+ if (dc_state_get_pipe_subvp_type(context, pipe_ctx) != SUBVP_PHANTOM)
1543+ continue;
1544+
1545+ if (pipe_ctx->stream == pipe_ctx_old->stream &&
1546+ pipe_ctx->stream->link->link_state_valid) {
1547+ continue;
15091548 }
1549+
1550+ if (pipe_ctx_old->stream && !pipe_need_reprogram(pipe_ctx_old, pipe_ctx))
1551+ continue;
1552+
1553+ if (pipe_ctx->top_pipe || pipe_ctx->prev_odm_pipe)
1554+ continue;
1555+
1556+ if (hws->funcs.apply_single_controller_ctx_to_hw)
1557+ status = hws->funcs.apply_single_controller_ctx_to_hw(
1558+ pipe_ctx,
1559+ context,
1560+ dc);
1561+
1562+ ASSERT(status == DC_OK);
1563+
1564+#ifdef CONFIG_DRM_AMD_DC_FP
1565+ if (hws->funcs.resync_fifo_dccg_dio)
1566+ hws->funcs.resync_fifo_dccg_dio(hws, dc, context);
1567+#endif
15101568 }
15111569 }
15121570
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h+2−0
@@ -111,6 +111,8 @@ void dcn32_update_dsc_pg(struct dc *dc, · 110 unmodified lines
111111
112112 void dcn32_enable_phantom_streams(struct dc *dc, struct dc_state *context);
113113
114+void dcn32_disable_phantom_streams(struct dc *dc, struct dc_state *context);
115+
114116 void dcn32_init_blank(
115117 struct dc *dc,
116118 struct timing_generator *tg);
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c+3−0
@@ -109,6 +109,7 @@ static const struct hw_sequencer_funcs dcn32_funcs = { · 108 unmodified lines
109109 .get_dcc_en_bits = dcn10_get_dcc_en_bits,
110110 .commit_subvp_config = dcn32_commit_subvp_config,
111111 .enable_phantom_streams = dcn32_enable_phantom_streams,
112+ .disable_phantom_streams = dcn32_disable_phantom_streams,
112113 .subvp_pipe_control_lock = dcn32_subvp_pipe_control_lock,
113114 .update_visual_confirm_color = dcn10_update_visual_confirm_color,
114115 .subvp_pipe_control_lock_fast = dcn32_subvp_pipe_control_lock_fast,
@@ -159,6 +160,8 @@ static const struct hwseq_private_funcs dcn32_private_funcs = { · 44 unmodified lines
159160 .set_pixels_per_cycle = dcn32_set_pixels_per_cycle,
160161 .resync_fifo_dccg_dio = dcn32_resync_fifo_dccg_dio,
161162 .is_dp_dig_pixel_rate_div_policy = dcn32_is_dp_dig_pixel_rate_div_policy,
163+ .apply_single_controller_ctx_to_hw = dce110_apply_single_controller_ctx_to_hw,
164+ .reset_back_end_for_pipe = dcn20_reset_back_end_for_pipe,
162165 };
163166
164167 void dcn32_hw_sequencer_init_functions(struct dc *dc)
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c+8−1
@@ -680,7 +680,7 @@ void dcn35_power_down_on_boot(struct dc *dc) · 679 unmodified lines
680680 bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable)
681681 {
682682 struct dc_link *edp_links[MAX_NUM_EDP];
683− int edp_num;
683+ int i, edp_num;
684684 if (dc->debug.dmcub_emulation)
685685 return true;
686686
@@ -688,6 +688,13 @@ bool dcn35_apply_idle_power_optimizations(struct dc *dc, bool enable) · 1 unmodified line
688688 dc_get_edp_links(dc, edp_links, &edp_num);
689689 if (edp_num == 0 || edp_num > 1)
690690 return false;
691+
692+ for (i = 0; i < dc->current_state->stream_count; ++i) {
693+ struct dc_stream_state *stream = dc->current_state->streams[i];
694+
695+ if (!stream->dpms_off && !dc_is_embedded_signal(stream->signal))
696+ return false;
697+ }
691698 }
692699
693700 // TODO: review other cases when idle optimization is allowed
drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h+1−0
@@ -379,6 +379,7 @@ struct hw_sequencer_funcs { · 378 unmodified lines
379379 struct dc_cursor_attributes *cursor_attr);
380380 void (*commit_subvp_config)(struct dc *dc, struct dc_state *context);
381381 void (*enable_phantom_streams)(struct dc *dc, struct dc_state *context);
382+ void (*disable_phantom_streams)(struct dc *dc, struct dc_state *context);
382383 void (*subvp_pipe_control_lock)(struct dc *dc,
383384 struct dc_state *context,
384385 bool lock,
drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h+7−0
@@ -165,8 +165,15 @@ struct hwseq_private_funcs { · 164 unmodified lines
165165 void (*set_pixels_per_cycle)(struct pipe_ctx *pipe_ctx);
166166 void (*resync_fifo_dccg_dio)(struct dce_hwseq *hws, struct dc *dc,
167167 struct dc_state *context);
168+ enum dc_status (*apply_single_controller_ctx_to_hw)(
169+ struct pipe_ctx *pipe_ctx,
170+ struct dc_state *context,
171+ struct dc *dc);
168172 bool (*is_dp_dig_pixel_rate_div_policy)(struct pipe_ctx *pipe_ctx);
169173 #endif
174+ void (*reset_back_end_for_pipe)(struct dc *dc,
175+ struct pipe_ctx *pipe_ctx,
176+ struct dc_state *context);
170177 };
171178
172179 struct dce_hwseq {
drivers/gpu/drm/amd/display/dc/inc/core_types.h+2−0
@@ -469,6 +469,8 @@ struct resource_context { · 468 unmodified lines
469469 unsigned int hpo_dp_link_enc_to_link_idx[MAX_HPO_DP2_LINK_ENCODERS];
470470 int hpo_dp_link_enc_ref_cnts[MAX_HPO_DP2_LINK_ENCODERS];
471471 bool is_mpc_3dlut_acquired[MAX_PIPES];
472+ /* solely used for build scalar data in dml2 */
473+ struct pipe_ctx temp_pipe;
472474 };
473475
474476 struct dce_bw_output {
drivers/gpu/drm/amd/display/dc/inc/resource.h+8−12
@@ -427,22 +427,18 @@ struct pipe_ctx *resource_get_primary_dpp_pipe(const struct pipe_ctx *dpp_pipe); · 426 unmodified lines
427427 int resource_get_mpc_slice_index(const struct pipe_ctx *dpp_pipe);
428428
429429 /*
430− * Get number of MPC "cuts" of the plane associated with the pipe. MPC slice
431− * count is equal to MPC splits + 1. For example if a plane is cut 3 times, it
432− * will have 4 pieces of slice.
433− * return - 0 if pipe is not used for a plane with MPCC combine. otherwise
434− * the number of MPC "cuts" for the plane.
430+ * Get the number of MPC slices associated with the pipe.
431+ * The function returns 0 if the pipe is not associated with an MPC combine
432+ * pipe topology.
435433 */
436−int resource_get_mpc_slice_count(const struct pipe_ctx *opp_head);
434+int resource_get_mpc_slice_count(const struct pipe_ctx *pipe);
437435
438436 /*
439− * Get number of ODM "cuts" of the timing associated with the pipe. ODM slice
440− * count is equal to ODM splits + 1. For example if a timing is cut 3 times, it
441− * will have 4 pieces of slice.
442− * return - 0 if pipe is not used for ODM combine. otherwise
443− * the number of ODM "cuts" for the timing.
437+ * Get the number of ODM slices associated with the pipe.
438+ * The function returns 0 if the pipe is not associated with an ODM combine
439+ * pipe topology.
444440 */
445−int resource_get_odm_slice_count(const struct pipe_ctx *otg_master);
441+int resource_get_odm_slice_count(const struct pipe_ctx *pipe);
446442
447443 /* Get the ODM slice index counting from 0 from left most slice */
448444 int resource_get_odm_slice_index(const struct pipe_ctx *opp_head);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c+1−1
@@ -196,7 +196,7 @@ static int get_host_router_total_dp_tunnel_bw(const struct dc *dc, uint8_t hr_in · 195 unmodified lines
196196 struct dc_link *link_dpia_primary, *link_dpia_secondary;
197197 int total_bw = 0;
198198
199− for (uint8_t i = 0; i < MAX_PIPES * 2; ++i) {
199+ for (uint8_t i = 0; i < (MAX_PIPES * 2) - 1; ++i) {
200200
201201 if (!dc->links[i] || dc->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA)
202202 continue;
drivers/gpu/drm/amd/display/dc/link/protocols/link_dpcd.c+2−2
@@ -205,7 +205,7 @@ enum dc_status core_link_read_dpcd( · 204 unmodified lines
205205 uint32_t extended_size;
206206 /* size of the remaining partitioned address space */
207207 uint32_t size_left_to_read;
208− enum dc_status status;
208+ enum dc_status status = DC_ERROR_UNEXPECTED;
209209 /* size of the next partition to be read from */
210210 uint32_t partition_size;
211211 uint32_t data_index = 0;
@@ -234,7 +234,7 @@ enum dc_status core_link_write_dpcd( · 22 unmodified lines
234234 {
235235 uint32_t partition_size;
236236 uint32_t data_index = 0;
237− enum dc_status status;
237+ enum dc_status status = DC_ERROR_UNEXPECTED;
238238
239239 while (size) {
240240 partition_size = dpcd_get_next_partition_size(address, size);
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c+1−1
@@ -999,7 +999,7 @@ static struct stream_encoder *dcn301_stream_encoder_create(enum engine_id eng_id · 998 unmodified lines
999999 vpg = dcn301_vpg_create(ctx, vpg_inst);
10001000 afmt = dcn301_afmt_create(ctx, afmt_inst);
10011001
1002− if (!enc1 || !vpg || !afmt) {
1002+ if (!enc1 || !vpg || !afmt || eng_id >= ARRAY_SIZE(stream_enc_regs)) {
10031003 kfree(enc1);
10041004 kfree(vpg);
10051005 kfree(afmt);
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c+15−1
@@ -1829,7 +1829,21 @@ int dcn32_populate_dml_pipes_from_context( · 1828 unmodified lines
18291829 dcn32_zero_pipe_dcc_fraction(pipes, pipe_cnt);
18301830 DC_FP_END();
18311831 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch;
1832− pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_dal;
1832+ if (dc->config.enable_windowed_mpo_odm &&
1833+ dc->debug.enable_single_display_2to1_odm_policy) {
1834+ switch (resource_get_odm_slice_count(pipe)) {
1835+ case 2:
1836+ pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_2to1;
1837+ break;
1838+ case 4:
1839+ pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_4to1;
1840+ break;
1841+ default:
1842+ pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_dal;
1843+ }
1844+ } else {
1845+ pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_dal;
1846+ }
18331847 pipes[pipe_cnt].pipe.src.gpuvm_min_page_size_kbytes = 256; // according to spreadsheet
18341848 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;
18351849 pipes[pipe_cnt].pipe.scale_ratio_depth.lb_depth = dm_lb_19;
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c+3−2
@@ -780,8 +780,8 @@ static const struct dc_debug_options debug_defaults_drv = { · 779 unmodified lines
780780 .disable_z10 = false,
781781 .ignore_pg = true,
782782 .psp_disabled_wa = true,
783− .ips2_eval_delay_us = 200,
784− .ips2_entry_delay_us = 400,
783+ .ips2_eval_delay_us = 1650,
784+ .ips2_entry_delay_us = 800,
785785 .static_screen_wait_frames = 2,
786786 };
787787
@@ -2130,6 +2130,7 @@ static bool dcn35_resource_construct( · 1342 unmodified lines
21302130 dc->dml2_options.dcn_pipe_count = pool->base.pipe_count;
21312131 dc->dml2_options.use_native_pstate_optimization = true;
21322132 dc->dml2_options.use_native_soc_bb_construction = true;
2133+ dc->dml2_options.minimize_dispclk_using_odm = false;
21332134 if (dc->config.EnableMinDispClkODM)
21342135 dc->dml2_options.minimize_dispclk_using_odm = true;
21352136 dc->dml2_options.enable_windowed_mpo_odm = dc->config.enable_windowed_mpo_odm;
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h+47−0
@@ -2832,6 +2832,7 @@ struct dmub_rb_cmd_psr_set_power_opt { · 2831 unmodified lines
28322832 #define REPLAY_RESIDENCY_MODE_MASK (0x1 << REPLAY_RESIDENCY_MODE_SHIFT)
28332833 # define REPLAY_RESIDENCY_MODE_PHY (0x0 << REPLAY_RESIDENCY_MODE_SHIFT)
28342834 # define REPLAY_RESIDENCY_MODE_ALPM (0x1 << REPLAY_RESIDENCY_MODE_SHIFT)
2835+# define REPLAY_RESIDENCY_MODE_IPS 0x10
28352836
28362837 #define REPLAY_RESIDENCY_ENABLE_MASK (0x1 << REPLAY_RESIDENCY_ENABLE_SHIFT)
28372838 # define REPLAY_RESIDENCY_DISABLE (0x0 << REPLAY_RESIDENCY_ENABLE_SHIFT)
@@ -2894,6 +2895,10 @@ enum dmub_cmd_replay_type { · 56 unmodified lines
28942895 * Set Residency Frameupdate Timer.
28952896 */
28962897 DMUB_CMD__REPLAY_SET_RESIDENCY_FRAMEUPDATE_TIMER = 6,
2898+ /**
2899+ * Set pseudo vtotal
2900+ */
2901+ DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL = 7,
28972902 };
28982903
28992904 /**
@@ -3076,6 +3081,26 @@ struct dmub_cmd_replay_set_timing_sync_data { · 176 unmodified lines
30763081 uint8_t pad[2];
30773082 };
30783083
3084+/**
3085+ * Data passed from driver to FW in a DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL command.
3086+ */
3087+struct dmub_cmd_replay_set_pseudo_vtotal {
3088+ /**
3089+ * Panel Instance.
3090+ * Panel isntance to identify which replay_state to use
3091+ * Currently the support is only for 0 or 1
3092+ */
3093+ uint8_t panel_inst;
3094+ /**
3095+ * Source Vtotal that Replay + IPS + ABM full screen video src vtotal
3096+ */
3097+ uint16_t vtotal;
3098+ /**
3099+ * Explicit padding to 4 byte boundary.
3100+ */
3101+ uint8_t pad;
3102+};
3103+
30793104 /**
30803105 * Definition of a DMUB_CMD__SET_REPLAY_POWER_OPT command.
30813106 */
@@ -3156,6 +3181,20 @@ struct dmub_rb_cmd_replay_set_timing_sync { · 74 unmodified lines
31563181 struct dmub_cmd_replay_set_timing_sync_data replay_set_timing_sync_data;
31573182 };
31583183
3184+/**
3185+ * Definition of a DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL command.
3186+ */
3187+struct dmub_rb_cmd_replay_set_pseudo_vtotal {
3188+ /**
3189+ * Command header.
3190+ */
3191+ struct dmub_cmd_header header;
3192+ /**
3193+ * Definition of DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL command.
3194+ */
3195+ struct dmub_cmd_replay_set_pseudo_vtotal data;
3196+};
3197+
31593198 /**
31603199 * Data passed from driver to FW in DMUB_CMD__REPLAY_SET_RESIDENCY_FRAMEUPDATE_TIMER command.
31613200 */
@@ -3207,6 +3246,10 @@ union dmub_replay_cmd_set { · 45 unmodified lines
32073246 * Definition of DMUB_CMD__REPLAY_SET_RESIDENCY_FRAMEUPDATE_TIMER command data.
32083247 */
32093248 struct dmub_cmd_replay_frameupdate_timer_data timer_data;
3249+ /**
3250+ * Definition of DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL command data.
3251+ */
3252+ struct dmub_cmd_replay_set_pseudo_vtotal pseudo_vtotal_data;
32103253 };
32113254
32123255 /**
@@ -4358,6 +4401,10 @@ union dmub_rb_cmd { · 1145 unmodified lines
43584401 * Definition of a DMUB_CMD__REPLAY_SET_RESIDENCY_FRAMEUPDATE_TIMER command.
43594402 */
43604403 struct dmub_rb_cmd_replay_set_frameupdate_timer replay_set_frameupdate_timer;
4404+ /**
4405+ * Definition of a DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL command.
4406+ */
4407+ struct dmub_rb_cmd_replay_set_pseudo_vtotal replay_set_pseudo_vtotal;
43614408 };
43624409
43634410 /**
drivers/gpu/drm/amd/display/modules/power/power_helpers.c+5−0
@@ -980,6 +980,11 @@ void set_replay_coasting_vtotal(struct dc_link *link, · 979 unmodified lines
980980 link->replay_settings.coasting_vtotal_table[type] = vtotal;
981981 }
982982
983+void set_replay_ips_full_screen_video_src_vtotal(struct dc_link *link, uint16_t vtotal)
984+{
985+ link->replay_settings.abm_with_ips_on_full_screen_video_pseudo_vtotal = vtotal;
986+}
987+
983988 void calculate_replay_link_off_frame_count(struct dc_link *link,
984989 uint16_t vtotal, uint16_t htotal)
985990 {
drivers/gpu/drm/amd/display/modules/power/power_helpers.h+1−0
@@ -57,6 +57,7 @@ void init_replay_config(struct dc_link *link, struct replay_config *pr_config); · 56 unmodified lines
5757 void set_replay_coasting_vtotal(struct dc_link *link,
5858 enum replay_coasting_vtotal_type type,
5959 uint16_t vtotal);
60+void set_replay_ips_full_screen_video_src_vtotal(struct dc_link *link, uint16_t vtotal);
6061 void calculate_replay_link_off_frame_count(struct dc_link *link,
6162 uint16_t vtotal, uint16_t htotal);
6263
drivers/gpu/drm/amd/include/amd_shared.h+1−0
@@ -258,6 +258,7 @@ enum DC_DEBUG_MASK { · 257 unmodified lines
258258 DC_ENABLE_DML2 = 0x100,
259259 DC_DISABLE_PSR_SU = 0x200,
260260 DC_DISABLE_REPLAY = 0x400,
261+ DC_DISABLE_IPS = 0x800,
261262 };
262263
263264 enum amd_dpm_forced_level;
drivers/gpu/drm/amd/include/amdgpu_reg_state.h+1−1
@@ -138,7 +138,7 @@ static inline size_t amdgpu_reginst_size(uint16_t num_inst, size_t inst_size, · 137 unmodified lines
138138 }
139139
140140 #define amdgpu_asic_get_reg_state_supported(adev) \
141− ((adev)->asic_funcs->get_reg_state ? 1 : 0)
141+ (((adev)->asic_funcs && (adev)->asic_funcs->get_reg_state) ? 1 : 0)
142142
143143 #define amdgpu_asic_get_reg_state(adev, state, buf, size) \
144144 ((adev)->asic_funcs->get_reg_state ? \
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c+6−41
@@ -24,6 +24,7 @@ · 23 unmodified lines
2424
2525 #include <linux/firmware.h>
2626 #include <linux/pci.h>
27+#include <linux/power_supply.h>
2728 #include <linux/reboot.h>
2829
2930 #include "amdgpu.h"
@@ -733,7 +734,7 @@ static int smu_early_init(void *handle) · 703 unmodified lines
733734 smu->adev = adev;
734735 smu->pm_enabled = !!amdgpu_dpm;
735736 smu->is_apu = false;
736− smu->smu_baco.state = SMU_BACO_STATE_NONE;
737+ smu->smu_baco.state = SMU_BACO_STATE_EXIT;
737738 smu->smu_baco.platform_support = false;
738739 smu->user_dpm_profile.fan_mode = -1;
739740
@@ -817,16 +818,8 @@ static int smu_late_init(void *handle) · 77 unmodified lines
817818 * handle the switch automatically. Driver involvement
818819 * is unnecessary.
819820 */
820− if (!smu->dc_controlled_by_gpio) {
821− ret = smu_set_power_source(smu,
822− adev->pm.ac_power ? SMU_POWER_SOURCE_AC :
823− SMU_POWER_SOURCE_DC);
824− if (ret) {
825− dev_err(adev->dev, "Failed to switch to %s mode!\n",
826− adev->pm.ac_power ? "AC" : "DC");
827− return ret;
828− }
829− }
821+ adev->pm.ac_power = power_supply_is_system_supplied() > 0;
822+ smu_set_ac_dc(smu);
830823
831824 if ((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 1)) ||
832825 (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 3)))
@@ -1961,31 +1954,10 @@ static int smu_smc_hw_cleanup(struct smu_context *smu) · 1128 unmodified lines
19611954 return 0;
19621955 }
19631956
1964−static int smu_reset_mp1_state(struct smu_context *smu)
1965−{
1966− struct amdgpu_device *adev = smu->adev;
1967− int ret = 0;
1968−
1969− if ((!adev->in_runpm) && (!adev->in_suspend) &&
1970− (!amdgpu_in_reset(adev)))
1971− switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
1972− case IP_VERSION(13, 0, 0):
1973− case IP_VERSION(13, 0, 7):
1974− case IP_VERSION(13, 0, 10):
1975− ret = smu_set_mp1_state(smu, PP_MP1_STATE_UNLOAD);
1976− break;
1977− default:
1978− break;
1979− }
1980−
1981− return ret;
1982−}
1983−
19841957 static int smu_hw_fini(void *handle)
19851958 {
19861959 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
19871960 struct smu_context *smu = adev->powerplay.pp_handle;
1988− int ret;
19891961
19901962 if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
19911963 return 0;
@@ -2003,15 +1975,7 @@ static int smu_hw_fini(void *handle) · 11 unmodified lines
20031975
20041976 adev->pm.dpm_enabled = false;
20051977
2006− ret = smu_smc_hw_cleanup(smu);
2007− if (ret)
2008− return ret;
2009−
2010− ret = smu_reset_mp1_state(smu);
2011− if (ret)
2012− return ret;
2013−
2014− return 0;
1978+ return smu_smc_hw_cleanup(smu);
20151979 }
20161980
20171981 static void smu_late_fini(void *handle)
@@ -2710,6 +2674,7 @@ int smu_get_power_limit(void *handle, · 692 unmodified lines
27102674 case SMU_PPT_LIMIT_CURRENT:
27112675 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
27122676 case IP_VERSION(13, 0, 2):
2677+ case IP_VERSION(13, 0, 6):
27132678 case IP_VERSION(11, 0, 7):
27142679 case IP_VERSION(11, 0, 11):
27152680 case IP_VERSION(11, 0, 12):
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h+0−1
@@ -424,7 +424,6 @@ enum smu_reset_mode { · 423 unmodified lines
424424 enum smu_baco_state {
425425 SMU_BACO_STATE_ENTER = 0,
426426 SMU_BACO_STATE_EXIT,
427− SMU_BACO_STATE_NONE,
428427 };
429428
430429 struct smu_baco_context {
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c+2−0
@@ -1442,10 +1442,12 @@ static int smu_v11_0_irq_process(struct amdgpu_device *adev, · 1441 unmodified lines
14421442 case 0x3:
14431443 dev_dbg(adev->dev, "Switched to AC mode!\n");
14441444 schedule_work(&smu->interrupt_work);
1445+ adev->pm.ac_power = true;
14451446 break;
14461447 case 0x4:
14471448 dev_dbg(adev->dev, "Switched to DC mode!\n");
14481449 schedule_work(&smu->interrupt_work);
1450+ adev->pm.ac_power = false;
14491451 break;
14501452 case 0x7:
14511453 /*
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c+2−0
@@ -1379,10 +1379,12 @@ static int smu_v13_0_irq_process(struct amdgpu_device *adev, · 1378 unmodified lines
13791379 case 0x3:
13801380 dev_dbg(adev->dev, "Switched to AC mode!\n");
13811381 smu_v13_0_ack_ac_dc_interrupt(smu);
1382+ adev->pm.ac_power = true;
13821383 break;
13831384 case 0x4:
13841385 dev_dbg(adev->dev, "Switched to DC mode!\n");
13851386 smu_v13_0_ack_ac_dc_interrupt(smu);
1387+ adev->pm.ac_power = false;
13861388 break;
13871389 case 0x7:
13881390 /*
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c+54−10
@@ -2357,6 +2357,7 @@ static int smu_v13_0_0_get_power_limit(struct smu_context *smu, · 2356 unmodified lines
23572357 PPTable_t *pptable = table_context->driver_pptable;
23582358 SkuTable_t *skutable = &pptable->SkuTable;
23592359 uint32_t power_limit, od_percent_upper, od_percent_lower;
2360+ uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC];
23602361
23612362 if (smu_v13_0_get_current_power_limit(smu, &power_limit))
23622363 power_limit = smu->adev->pm.ac_power ?
@@ -2380,7 +2381,7 @@ static int smu_v13_0_0_get_power_limit(struct smu_context *smu, · 17 unmodified lines
23802381 od_percent_upper, od_percent_lower, power_limit);
23812382
23822383 if (max_power_limit) {
2383− *max_power_limit = power_limit * (100 + od_percent_upper);
2384+ *max_power_limit = msg_limit * (100 + od_percent_upper);
23842385 *max_power_limit /= 100;
23852386 }
23862387
@@ -2747,13 +2748,7 @@ static int smu_v13_0_0_set_mp1_state(struct smu_context *smu, · 360 unmodified lines
27472748
27482749 switch (mp1_state) {
27492750 case PP_MP1_STATE_UNLOAD:
2750− ret = smu_cmn_send_smc_msg_with_param(smu,
2751− SMU_MSG_PrepareMp1ForUnload,
2752− 0x55, NULL);
2753−
2754− if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT)
2755− ret = smu_v13_0_disable_pmfw_state(smu);
2756−
2751+ ret = smu_cmn_set_mp1_state(smu, mp1_state);
27572752 break;
27582753 default:
27592754 /* Ignore others */
@@ -2949,7 +2944,7 @@ static bool smu_v13_0_0_wbrf_support_check(struct smu_context *smu) · 189 unmodified lines
29492944 {
29502945 struct amdgpu_device *adev = smu->adev;
29512946
2952− switch (adev->ip_versions[MP1_HWIP][0]) {
2947+ switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
29532948 case IP_VERSION(13, 0, 0):
29542949 return smu->smc_fw_version >= 0x004e6300;
29552950 case IP_VERSION(13, 0, 10):
@@ -2959,6 +2954,55 @@ static bool smu_v13_0_0_wbrf_support_check(struct smu_context *smu) · 3 unmodified lines
29592954 }
29602955 }
29612956
2957+static int smu_v13_0_0_set_power_limit(struct smu_context *smu,
2958+ enum smu_ppt_limit_type limit_type,
2959+ uint32_t limit)
2960+{
2961+ PPTable_t *pptable = smu->smu_table.driver_pptable;
2962+ SkuTable_t *skutable = &pptable->SkuTable;
2963+ uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC];
2964+ struct smu_table_context *table_context = &smu->smu_table;
2965+ OverDriveTableExternal_t *od_table =
2966+ (OverDriveTableExternal_t *)table_context->overdrive_table;
2967+ int ret = 0;
2968+
2969+ if (limit_type != SMU_DEFAULT_PPT_LIMIT)
2970+ return -EINVAL;
2971+
2972+ if (limit <= msg_limit) {
2973+ if (smu->current_power_limit > msg_limit) {
2974+ od_table->OverDriveTable.Ppt = 0;
2975+ od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT;
2976+
2977+ ret = smu_v13_0_0_upload_overdrive_table(smu, od_table);
2978+ if (ret) {
2979+ dev_err(smu->adev->dev, "Failed to upload overdrive table!\n");
2980+ return ret;
2981+ }
2982+ }
2983+ return smu_v13_0_set_power_limit(smu, limit_type, limit);
2984+ } else if (smu->od_enabled) {
2985+ ret = smu_v13_0_set_power_limit(smu, limit_type, msg_limit);
2986+ if (ret)
2987+ return ret;
2988+
2989+ od_table->OverDriveTable.Ppt = (limit * 100) / msg_limit - 100;
2990+ od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT;
2991+
2992+ ret = smu_v13_0_0_upload_overdrive_table(smu, od_table);
2993+ if (ret) {
2994+ dev_err(smu->adev->dev, "Failed to upload overdrive table!\n");
2995+ return ret;
2996+ }
2997+
2998+ smu->current_power_limit = limit;
2999+ } else {
3000+ return -EINVAL;
3001+ }
3002+
3003+ return 0;
3004+}
3005+
29623006 static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
29633007 .get_allowed_feature_mask = smu_v13_0_0_get_allowed_feature_mask,
29643008 .set_default_dpm_table = smu_v13_0_0_set_default_dpm_table,
@@ -3013,7 +3057,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = { · 48 unmodified lines
30133057 .set_fan_control_mode = smu_v13_0_set_fan_control_mode,
30143058 .enable_mgpu_fan_boost = smu_v13_0_0_enable_mgpu_fan_boost,
30153059 .get_power_limit = smu_v13_0_0_get_power_limit,
3016− .set_power_limit = smu_v13_0_set_power_limit,
3060+ .set_power_limit = smu_v13_0_0_set_power_limit,
30173061 .set_power_source = smu_v13_0_set_power_source,
30183062 .get_power_profile_mode = smu_v13_0_0_get_power_profile_mode,
30193063 .set_power_profile_mode = smu_v13_0_0_set_power_profile_mode,
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c+2−2
@@ -160,8 +160,8 @@ static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COU · 159 unmodified lines
160160 MSG_MAP(GfxDriverResetRecovery, PPSMC_MSG_GfxDriverResetRecovery, 0),
161161 MSG_MAP(GetMinGfxclkFrequency, PPSMC_MSG_GetMinGfxDpmFreq, 1),
162162 MSG_MAP(GetMaxGfxclkFrequency, PPSMC_MSG_GetMaxGfxDpmFreq, 1),
163− MSG_MAP(SetSoftMinGfxclk, PPSMC_MSG_SetSoftMinGfxClk, 0),
164− MSG_MAP(SetSoftMaxGfxClk, PPSMC_MSG_SetSoftMaxGfxClk, 0),
163+ MSG_MAP(SetSoftMinGfxclk, PPSMC_MSG_SetSoftMinGfxClk, 1),
164+ MSG_MAP(SetSoftMaxGfxClk, PPSMC_MSG_SetSoftMaxGfxClk, 1),
165165 MSG_MAP(PrepareMp1ForUnload, PPSMC_MSG_PrepareForDriverUnload, 0),
166166 MSG_MAP(GetCTFLimit, PPSMC_MSG_GetCTFLimit, 0),
167167 MSG_MAP(GetThermalLimit, PPSMC_MSG_ReadThrottlerLimit, 0),
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c+53−9
@@ -2321,6 +2321,7 @@ static int smu_v13_0_7_get_power_limit(struct smu_context *smu, · 2320 unmodified lines
23212321 PPTable_t *pptable = table_context->driver_pptable;
23222322 SkuTable_t *skutable = &pptable->SkuTable;
23232323 uint32_t power_limit, od_percent_upper, od_percent_lower;
2324+ uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC];
23242325
23252326 if (smu_v13_0_get_current_power_limit(smu, &power_limit))
23262327 power_limit = smu->adev->pm.ac_power ?
@@ -2344,7 +2345,7 @@ static int smu_v13_0_7_get_power_limit(struct smu_context *smu, · 17 unmodified lines
23442345 od_percent_upper, od_percent_lower, power_limit);
23452346
23462347 if (max_power_limit) {
2347− *max_power_limit = power_limit * (100 + od_percent_upper);
2348+ *max_power_limit = msg_limit * (100 + od_percent_upper);
23482349 *max_power_limit /= 100;
23492350 }
23502351
@@ -2504,13 +2505,7 @@ static int smu_v13_0_7_set_mp1_state(struct smu_context *smu, · 153 unmodified lines
25042505
25052506 switch (mp1_state) {
25062507 case PP_MP1_STATE_UNLOAD:
2507− ret = smu_cmn_send_smc_msg_with_param(smu,
2508− SMU_MSG_PrepareMp1ForUnload,
2509− 0x55, NULL);
2510−
2511− if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT)
2512− ret = smu_v13_0_disable_pmfw_state(smu);
2513−
2508+ ret = smu_cmn_set_mp1_state(smu, mp1_state);
25142509 break;
25152510 default:
25162511 /* Ignore others */
@@ -2545,6 +2540,55 @@ static bool smu_v13_0_7_wbrf_support_check(struct smu_context *smu) · 28 unmodified lines
25452540 return smu->smc_fw_version > 0x00524600;
25462541 }
25472542
2543+static int smu_v13_0_7_set_power_limit(struct smu_context *smu,
2544+ enum smu_ppt_limit_type limit_type,
2545+ uint32_t limit)
2546+{
2547+ PPTable_t *pptable = smu->smu_table.driver_pptable;
2548+ SkuTable_t *skutable = &pptable->SkuTable;
2549+ uint32_t msg_limit = skutable->MsgLimits.Power[PPT_THROTTLER_PPT0][POWER_SOURCE_AC];
2550+ struct smu_table_context *table_context = &smu->smu_table;
2551+ OverDriveTableExternal_t *od_table =
2552+ (OverDriveTableExternal_t *)table_context->overdrive_table;
2553+ int ret = 0;
2554+
2555+ if (limit_type != SMU_DEFAULT_PPT_LIMIT)
2556+ return -EINVAL;
2557+
2558+ if (limit <= msg_limit) {
2559+ if (smu->current_power_limit > msg_limit) {
2560+ od_table->OverDriveTable.Ppt = 0;
2561+ od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT;
2562+
2563+ ret = smu_v13_0_7_upload_overdrive_table(smu, od_table);
2564+ if (ret) {
2565+ dev_err(smu->adev->dev, "Failed to upload overdrive table!\n");
2566+ return ret;
2567+ }
2568+ }
2569+ return smu_v13_0_set_power_limit(smu, limit_type, limit);
2570+ } else if (smu->od_enabled) {
2571+ ret = smu_v13_0_set_power_limit(smu, limit_type, msg_limit);
2572+ if (ret)
2573+ return ret;
2574+
2575+ od_table->OverDriveTable.Ppt = (limit * 100) / msg_limit - 100;
2576+ od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT;
2577+
2578+ ret = smu_v13_0_7_upload_overdrive_table(smu, od_table);
2579+ if (ret) {
2580+ dev_err(smu->adev->dev, "Failed to upload overdrive table!\n");
2581+ return ret;
2582+ }
2583+
2584+ smu->current_power_limit = limit;
2585+ } else {
2586+ return -EINVAL;
2587+ }
2588+
2589+ return 0;
2590+}
2591+
25482592 static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
25492593 .get_allowed_feature_mask = smu_v13_0_7_get_allowed_feature_mask,
25502594 .set_default_dpm_table = smu_v13_0_7_set_default_dpm_table,
@@ -2596,7 +2640,7 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = { · 45 unmodified lines
25962640 .set_fan_control_mode = smu_v13_0_set_fan_control_mode,
25972641 .enable_mgpu_fan_boost = smu_v13_0_7_enable_mgpu_fan_boost,
25982642 .get_power_limit = smu_v13_0_7_get_power_limit,
2599− .set_power_limit = smu_v13_0_set_power_limit,
2643+ .set_power_limit = smu_v13_0_7_set_power_limit,
26002644 .set_power_source = smu_v13_0_set_power_source,
26012645 .get_power_profile_mode = smu_v13_0_7_get_power_profile_mode,
26022646 .set_power_profile_mode = smu_v13_0_7_set_power_profile_mode,
drivers/gpu/drm/bridge/analogix/anx7625.c+6−1
@@ -1762,6 +1762,7 @@ static ssize_t anx7625_aux_transfer(struct drm_dp_aux *aux, · 1761 unmodified lines
17621762 u8 request = msg->request & ~DP_AUX_I2C_MOT;
17631763 int ret = 0;
17641764
1765+ mutex_lock(&ctx->aux_lock);
17651766 pm_runtime_get_sync(dev);
17661767 msg->reply = 0;
17671768 switch (request) {
@@ -1778,6 +1779,7 @@ static ssize_t anx7625_aux_transfer(struct drm_dp_aux *aux, · 10 unmodified lines
17781779 msg->size, msg->buffer);
17791780 pm_runtime_mark_last_busy(dev);
17801781 pm_runtime_put_autosuspend(dev);
1782+ mutex_unlock(&ctx->aux_lock);
17811783
17821784 return ret;
17831785 }
@@ -2474,7 +2476,9 @@ static void anx7625_bridge_atomic_disable(struct drm_bridge *bridge, · 690 unmodified lines
24742476 ctx->connector = NULL;
24752477 anx7625_dp_stop(ctx);
24762478
2477− pm_runtime_put_sync(dev);
2479+ mutex_lock(&ctx->aux_lock);
2480+ pm_runtime_put_sync_suspend(dev);
2481+ mutex_unlock(&ctx->aux_lock);
24782482 }
24792483
24802484 static enum drm_connector_status
@@ -2668,6 +2672,7 @@ static int anx7625_i2c_probe(struct i2c_client *client) · 187 unmodified lines
26682672
26692673 mutex_init(&platform->lock);
26702674 mutex_init(&platform->hdcp_wq_lock);
2675+ mutex_init(&platform->aux_lock);
26712676
26722677 INIT_DELAYED_WORK(&platform->hdcp_work, hdcp_check_work_func);
26732678 platform->hdcp_workqueue = create_workqueue("hdcp workqueue");
drivers/gpu/drm/bridge/analogix/anx7625.h+2−0
@@ -475,6 +475,8 @@ struct anx7625_data { · 474 unmodified lines
475475 struct workqueue_struct *hdcp_workqueue;
476476 /* Lock for hdcp work queue */
477477 struct mutex hdcp_wq_lock;
478+ /* Lock for aux transfer and disable */
479+ struct mutex aux_lock;
478480 char edid_block;
479481 struct display_timing dt;
480482 u8 display_timing_valid;
drivers/gpu/drm/bridge/parade-ps8640.c+23−0
@@ -107,6 +107,7 @@ struct ps8640 { · 106 unmodified lines
107107 struct device_link *link;
108108 bool pre_enabled;
109109 bool need_post_hpd_delay;
110+ struct mutex aux_lock;
110111 };
111112
112113 static const struct regmap_config ps8640_regmap_config[] = {
@@ -345,11 +346,20 @@ static ssize_t ps8640_aux_transfer(struct drm_dp_aux *aux, · 232 unmodified lines
345346 struct device *dev = &ps_bridge->page[PAGE0_DP_CNTL]->dev;
346347 int ret;
347348
349+ mutex_lock(&ps_bridge->aux_lock);
348350 pm_runtime_get_sync(dev);
351+ ret = _ps8640_wait_hpd_asserted(ps_bridge, 200 * 1000);
352+ if (ret) {
353+ pm_runtime_put_sync_suspend(dev);
354+ goto exit;
355+ }
349356 ret = ps8640_aux_transfer_msg(aux, msg);
350357 pm_runtime_mark_last_busy(dev);
351358 pm_runtime_put_autosuspend(dev);
352359
360+exit:
361+ mutex_unlock(&ps_bridge->aux_lock);
362+
353363 return ret;
354364 }
355365
@@ -470,7 +480,18 @@ static void ps8640_atomic_post_disable(struct drm_bridge *bridge, · 114 unmodified lines
470480 ps_bridge->pre_enabled = false;
471481
472482 ps8640_bridge_vdo_control(ps_bridge, DISABLE);
483+
484+ /*
485+ * The bridge seems to expect everything to be power cycled at the
486+ * disable process, so grab a lock here to make sure
487+ * ps8640_aux_transfer() is not holding a runtime PM reference and
488+ * preventing the bridge from suspend.
489+ */
490+ mutex_lock(&ps_bridge->aux_lock);
491+
473492 pm_runtime_put_sync_suspend(&ps_bridge->page[PAGE0_DP_CNTL]->dev);
493+
494+ mutex_unlock(&ps_bridge->aux_lock);
474495 }
475496
476497 static int ps8640_bridge_attach(struct drm_bridge *bridge,
@@ -619,6 +640,8 @@ static int ps8640_probe(struct i2c_client *client) · 142 unmodified lines
619640 if (!ps_bridge)
620641 return -ENOMEM;
621642
643+ mutex_init(&ps_bridge->aux_lock);
644+
622645 ps_bridge->supplies[0].supply = "vdd12";
623646 ps_bridge->supplies[1].supply = "vdd33";
624647 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ps_bridge->supplies),
drivers/gpu/drm/bridge/samsung-dsim.c+2−30
@@ -969,10 +969,6 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi) · 968 unmodified lines
969969 reg = samsung_dsim_read(dsi, DSIM_ESCMODE_REG);
970970 reg &= ~DSIM_STOP_STATE_CNT_MASK;
971971 reg |= DSIM_STOP_STATE_CNT(driver_data->reg_values[STOP_STATE_CNT]);
972−
973− if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
974− reg |= DSIM_FORCE_STOP_STATE;
975−
976972 samsung_dsim_write(dsi, DSIM_ESCMODE_REG, reg);
977973
978974 reg = DSIM_BTA_TIMEOUT(0xff) | DSIM_LPDR_TIMEOUT(0xffff);
@@ -1431,18 +1427,6 @@ static void samsung_dsim_disable_irq(struct samsung_dsim *dsi) · 452 unmodified lines
14311427 disable_irq(dsi->irq);
14321428 }
14331429
1434−static void samsung_dsim_set_stop_state(struct samsung_dsim *dsi, bool enable)
1435−{
1436− u32 reg = samsung_dsim_read(dsi, DSIM_ESCMODE_REG);
1437−
1438− if (enable)
1439− reg |= DSIM_FORCE_STOP_STATE;
1440− else
1441− reg &= ~DSIM_FORCE_STOP_STATE;
1442−
1443− samsung_dsim_write(dsi, DSIM_ESCMODE_REG, reg);
1444−}
1445−
14461430 static int samsung_dsim_init(struct samsung_dsim *dsi)
14471431 {
14481432 const struct samsung_dsim_driver_data *driver_data = dsi->driver_data;
@@ -1492,9 +1476,6 @@ static void samsung_dsim_atomic_pre_enable(struct drm_bridge *bridge, · 43 unmodified lines
14921476 ret = samsung_dsim_init(dsi);
14931477 if (ret)
14941478 return;
1495−
1496− samsung_dsim_set_display_mode(dsi);
1497− samsung_dsim_set_display_enable(dsi, true);
14981479 }
14991480 }
15001481
@@ -1503,12 +1484,8 @@ static void samsung_dsim_atomic_enable(struct drm_bridge *bridge, · 2 unmodified lines
15031484 {
15041485 struct samsung_dsim *dsi = bridge_to_dsi(bridge);
15051486
1506− if (samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) {
1507− samsung_dsim_set_display_mode(dsi);
1508− samsung_dsim_set_display_enable(dsi, true);
1509− } else {
1510− samsung_dsim_set_stop_state(dsi, false);
1511− }
1487+ samsung_dsim_set_display_mode(dsi);
1488+ samsung_dsim_set_display_enable(dsi, true);
15121489
15131490 dsi->state |= DSIM_STATE_VIDOUT_AVAILABLE;
15141491 }
@@ -1521,9 +1498,6 @@ static void samsung_dsim_atomic_disable(struct drm_bridge *bridge, · 6 unmodified lines
15211498 if (!(dsi->state & DSIM_STATE_ENABLED))
15221499 return;
15231500
1524− if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
1525− samsung_dsim_set_stop_state(dsi, true);
1526−
15271501 dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE;
15281502 }
15291503
@@ -1828,8 +1802,6 @@ static ssize_t samsung_dsim_host_transfer(struct mipi_dsi_host *host, · 298 unmodified lines
18281802 if (ret)
18291803 return ret;
18301804
1831− samsung_dsim_set_stop_state(dsi, false);
1832−
18331805 ret = mipi_dsi_create_packet(&xfer.packet, msg);
18341806 if (ret < 0)
18351807 return ret;
drivers/gpu/drm/bridge/sii902x.c+29−13
@@ -1080,6 +1080,26 @@ static int sii902x_init(struct sii902x *sii902x) · 1079 unmodified lines
10801080 return ret;
10811081 }
10821082
1083+ ret = sii902x_audio_codec_init(sii902x, dev);
1084+ if (ret)
1085+ return ret;
1086+
1087+ i2c_set_clientdata(sii902x->i2c, sii902x);
1088+
1089+ sii902x->i2cmux = i2c_mux_alloc(sii902x->i2c->adapter, dev,
1090+ 1, 0, I2C_MUX_GATE,
1091+ sii902x_i2c_bypass_select,
1092+ sii902x_i2c_bypass_deselect);
1093+ if (!sii902x->i2cmux) {
1094+ ret = -ENOMEM;
1095+ goto err_unreg_audio;
1096+ }
1097+
1098+ sii902x->i2cmux->priv = sii902x;
1099+ ret = i2c_mux_add_adapter(sii902x->i2cmux, 0, 0, 0);
1100+ if (ret)
1101+ goto err_unreg_audio;
1102+
10831103 sii902x->bridge.funcs = &sii902x_bridge_funcs;
10841104 sii902x->bridge.of_node = dev->of_node;
10851105 sii902x->bridge.timings = &default_sii902x_timings;
@@ -1090,19 +1110,13 @@ static int sii902x_init(struct sii902x *sii902x) · 4 unmodified lines
10901110
10911111 drm_bridge_add(&sii902x->bridge);
10921112
1093− sii902x_audio_codec_init(sii902x, dev);
1094−
1095− i2c_set_clientdata(sii902x->i2c, sii902x);
1113+ return 0;
10961114
1097− sii902x->i2cmux = i2c_mux_alloc(sii902x->i2c->adapter, dev,
1098− 1, 0, I2C_MUX_GATE,
1099− sii902x_i2c_bypass_select,
1100− sii902x_i2c_bypass_deselect);
1101− if (!sii902x->i2cmux)
1102− return -ENOMEM;
1115+err_unreg_audio:
1116+ if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
1117+ platform_device_unregister(sii902x->audio.pdev);
11031118
1104− sii902x->i2cmux->priv = sii902x;
1105− return i2c_mux_add_adapter(sii902x->i2cmux, 0, 0, 0);
1119+ return ret;
11061120 }
11071121
11081122 static int sii902x_probe(struct i2c_client *client)
@@ -1170,12 +1184,14 @@ static int sii902x_probe(struct i2c_client *client) · 61 unmodified lines
11701184 }
11711185
11721186 static void sii902x_remove(struct i2c_client *client)
1173−
11741187 {
11751188 struct sii902x *sii902x = i2c_get_clientdata(client);
11761189
1177− i2c_mux_del_adapters(sii902x->i2cmux);
11781190 drm_bridge_remove(&sii902x->bridge);
1191+ i2c_mux_del_adapters(sii902x->i2cmux);
1192+
1193+ if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
1194+ platform_device_unregister(sii902x->audio.pdev);
11791195 }
11801196
11811197 static const struct of_device_id sii902x_dt_ids[] = {
drivers/gpu/drm/display/drm_dp_mst_topology.c+2−0
@@ -5491,6 +5491,7 @@ EXPORT_SYMBOL(drm_dp_mst_atomic_enable_dsc); · 5490 unmodified lines
54915491 * - 0 if the new state is valid
54925492 * - %-ENOSPC, if the new state is invalid, because of BW limitation
54935493 * @failing_port is set to:
5494+ *
54945495 * - The non-root port where a BW limit check failed
54955496 * with all the ports downstream of @failing_port passing
54965497 * the BW limit check.
@@ -5499,6 +5500,7 @@ EXPORT_SYMBOL(drm_dp_mst_atomic_enable_dsc); · 2 unmodified lines
54995500 * - %NULL if the BW limit check failed at the root port
55005501 * with all the ports downstream of the root port passing
55015502 * the BW limit check.
5503+ *
55025504 * - %-EINVAL, if the new state is invalid, because the root port has
55035505 * too many payloads.
55045506 */
drivers/gpu/drm/exynos/exynos5433_drm_decon.c+2−2
@@ -319,9 +319,9 @@ static void decon_win_set_bldmod(struct decon_context *ctx, unsigned int win, · 318 unmodified lines
319319 static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win,
320320 struct drm_framebuffer *fb)
321321 {
322− struct exynos_drm_plane plane = ctx->planes[win];
322+ struct exynos_drm_plane *plane = &ctx->planes[win];
323323 struct exynos_drm_plane_state *state =
324− to_exynos_plane_state(plane.base.state);
324+ to_exynos_plane_state(plane->base.state);
325325 unsigned int alpha = state->base.alpha;
326326 unsigned int pixel_alpha;
327327 unsigned long val;
drivers/gpu/drm/exynos/exynos_drm_fimd.c+3−3
@@ -480,7 +480,7 @@ static void fimd_commit(struct exynos_drm_crtc *crtc) · 479 unmodified lines
480480 struct fimd_context *ctx = crtc->ctx;
481481 struct drm_display_mode *mode = &crtc->base.state->adjusted_mode;
482482 const struct fimd_driver_data *driver_data = ctx->driver_data;
483− void *timing_base = ctx->regs + driver_data->timing_base;
483+ void __iomem *timing_base = ctx->regs + driver_data->timing_base;
484484 u32 val;
485485
486486 if (ctx->suspended)
@@ -661,9 +661,9 @@ static void fimd_win_set_bldmod(struct fimd_context *ctx, unsigned int win, · 174 unmodified lines
661661 static void fimd_win_set_pixfmt(struct fimd_context *ctx, unsigned int win,
662662 struct drm_framebuffer *fb, int width)
663663 {
664− struct exynos_drm_plane plane = ctx->planes[win];
664+ struct exynos_drm_plane *plane = &ctx->planes[win];
665665 struct exynos_drm_plane_state *state =
666− to_exynos_plane_state(plane.base.state);
666+ to_exynos_plane_state(plane->base.state);
667667 uint32_t pixel_format = fb->format->format;
668668 unsigned int alpha = state->base.alpha;
669669 u32 val = WINCONx_ENWIN;
drivers/gpu/drm/exynos/exynos_drm_gsc.c+1−1
@@ -1341,7 +1341,7 @@ static int __maybe_unused gsc_runtime_resume(struct device *dev) · 1340 unmodified lines
13411341 for (i = 0; i < ctx->num_clocks; i++) {
13421342 ret = clk_prepare_enable(ctx->clocks[i]);
13431343 if (ret) {
1344− while (--i > 0)
1344+ while (--i >= 0)
13451345 clk_disable_unprepare(ctx->clocks[i]);
13461346 return ret;
13471347 }
drivers/gpu/drm/i915/Kconfig+1−1
@@ -140,7 +140,7 @@ config DRM_I915_GVT_KVMGT · 139 unmodified lines
140140
141141 Note that this driver only supports newer device from Broadwell on.
142142 For further information and setup guide, you can visit:
143− http://01.org/igvt-g.
143+ https://github.com/intel/gvt-linux/wiki.
144144
145145 If in doubt, say "N".
146146
drivers/gpu/drm/i915/Makefile+0−1
@@ -17,7 +17,6 @@ subdir-ccflags-y += $(call cc-option, -Wunused-const-variable) · 16 unmodified lines
1717 subdir-ccflags-y += $(call cc-option, -Wpacked-not-aligned)
1818 subdir-ccflags-y += $(call cc-option, -Wformat-overflow)
1919 subdir-ccflags-y += $(call cc-option, -Wformat-truncation)
20−subdir-ccflags-y += $(call cc-option, -Wstringop-overflow)
2120 subdir-ccflags-y += $(call cc-option, -Wstringop-truncation)
2221 # The following turn off the warnings enabled by -Wextra
2322 ifeq ($(findstring 2, $(KBUILD_EXTRA_WARN)),)
drivers/gpu/drm/i915/display/icl_dsi.c+1−2
@@ -1155,6 +1155,7 @@ static void gen11_dsi_powerup_panel(struct intel_encoder *encoder) · 1154 unmodified lines
11551155 }
11561156
11571157 intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);
1158+ intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
11581159
11591160 /* ensure all panel commands dispatched before enabling transcoder */
11601161 wait_for_cmds_dispatched_to_panel(encoder);
@@ -1255,8 +1256,6 @@ static void gen11_dsi_enable(struct intel_atomic_state *state, · 94 unmodified lines
12551256 /* step6d: enable dsi transcoder */
12561257 gen11_dsi_enable_transcoder(encoder);
12571258
1258− intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
1259−
12601259 /* step7: enable backlight */
12611260 intel_backlight_enable(crtc_state, conn_state);
12621261 intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
drivers/gpu/drm/i915/display/intel_psr.c+12−2
@@ -1525,8 +1525,18 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, · 1524 unmodified lines
15251525 * can rely on frontbuffer tracking.
15261526 */
15271527 mask = EDP_PSR_DEBUG_MASK_MEMUP |
1528− EDP_PSR_DEBUG_MASK_HPD |
1529− EDP_PSR_DEBUG_MASK_LPSP;
1528+ EDP_PSR_DEBUG_MASK_HPD;
1529+
1530+ /*
1531+ * For some unknown reason on HSW non-ULT (or at least on
1532+ * Dell Latitude E6540) external displays start to flicker
1533+ * when PSR is enabled on the eDP. SR/PC6 residency is much
1534+ * higher than should be possible with an external display.
1535+ * As a workaround leave LPSP unmasked to prevent PSR entry
1536+ * when external displays are active.
1537+ */
1538+ if (DISPLAY_VER(dev_priv) >= 8 || IS_HASWELL_ULT(dev_priv))
1539+ mask |= EDP_PSR_DEBUG_MASK_LPSP;
15301540
15311541 if (DISPLAY_VER(dev_priv) < 20)
15321542 mask |= EDP_PSR_DEBUG_MASK_MAX_SLEEP;
drivers/gpu/drm/i915/gvt/handlers.c+1−2
@@ -2849,8 +2849,7 @@ static int handle_mmio(struct intel_gvt_mmio_table_iter *iter, u32 offset, · 2848 unmodified lines
28492849 for (i = start; i < end; i += 4) {
28502850 p = intel_gvt_find_mmio_info(gvt, i);
28512851 if (p) {
2852− WARN(1, "dup mmio definition offset %x\n",
2853− info->offset);
2852+ WARN(1, "dup mmio definition offset %x\n", i);
28542853
28552854 /* We return -EEXIST here to make GVT-g load fail.
28562855 * So duplicated MMIO can be found as soon as
drivers/gpu/drm/i915/intel_gvt.c+1−1
@@ -41,7 +41,7 @@ · 40 unmodified lines
4141 * To virtualize GPU resources GVT-g driver depends on hypervisor technology
4242 * e.g KVM/VFIO/mdev, Xen, etc. to provide resource access trapping capability
4343 * and be virtualized within GVT-g device module. More architectural design
44− * doc is available on https://01.org/group/2230/documentation-list.
44+ * doc is available on https://github.com/intel/gvt-linux/wiki.
4545 */
4646
4747 static LIST_HEAD(intel_gvt_devices);
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c+2−6
@@ -144,10 +144,6 @@ enum dpu_enc_rc_states { · 143 unmodified lines
144144 * to track crtc in the disable() hook which is called
145145 * _after_ encoder_mask is cleared.
146146 * @connector: If a mode is set, cached pointer to the active connector
147− * @crtc_kickoff_cb: Callback into CRTC that will flush & start
148− * all CTL paths
149− * @crtc_kickoff_cb_data: Opaque user data given to crtc_kickoff_cb
150− * @debugfs_root: Debug file system root file node
151147 * @enc_lock: Lock around physical encoder
152148 * create/destroy/enable/disable
153149 * @frame_busy_mask: Bitmask tracking which phys_enc we are still
@@ -2072,7 +2068,7 @@ void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc) · 1918 unmodified lines
20722068 }
20732069
20742070 /* reset the merge 3D HW block */
2075− if (phys_enc->hw_pp->merge_3d) {
2071+ if (phys_enc->hw_pp && phys_enc->hw_pp->merge_3d) {
20762072 phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d,
20772073 BLEND_3D_NONE);
20782074 if (phys_enc->hw_ctl->ops.update_pending_flush_merge_3d)
@@ -2103,7 +2099,7 @@ void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc) · 24 unmodified lines
21032099 if (phys_enc->hw_wb)
21042100 intf_cfg.wb = phys_enc->hw_wb->idx;
21052101
2106− if (phys_enc->hw_pp->merge_3d)
2102+ if (phys_enc->hw_pp && phys_enc->hw_pp->merge_3d)
21072103 intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx;
21082104
21092105 if (ctl->ops.reset_intf_cfg)
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c+2−1
@@ -29,7 +29,6 @@ static inline bool reserved_by_other(uint32_t *res_map, int idx, · 28 unmodified lines
2929 /**
3030 * struct dpu_rm_requirements - Reservation requirements parameter bundle
3131 * @topology: selected topology for the display
32− * @hw_res: Hardware resources required as reported by the encoders
3332 */
3433 struct dpu_rm_requirements {
3534 struct msm_display_topology topology;
@@ -204,6 +203,8 @@ static bool _dpu_rm_needs_split_display(const struct msm_display_topology *top) · 168 unmodified lines
204203 * _dpu_rm_get_lm_peer - get the id of a mixer which is a peer of the primary
205204 * @rm: dpu resource manager handle
206205 * @primary_idx: index of primary mixer in rm->mixer_blks[]
206+ *
207+ * Returns: lm peer mixed id on success or %-EINVAL on error
207208 */
208209 static int _dpu_rm_get_lm_peer(struct dpu_rm *rm, int primary_idx)
209210 {
drivers/gpu/drm/msm/dp/dp_ctrl.c+0−5
@@ -135,11 +135,6 @@ static void dp_ctrl_config_ctrl(struct dp_ctrl_private *ctrl) · 134 unmodified lines
135135 tbd = dp_link_get_test_bits_depth(ctrl->link,
136136 ctrl->panel->dp_mode.bpp);
137137
138− if (tbd == DP_TEST_BIT_DEPTH_UNKNOWN) {
139− pr_debug("BIT_DEPTH not set. Configure default\n");
140− tbd = DP_TEST_BIT_DEPTH_8;
141− }
142−
143138 config |= tbd << DP_CONFIGURATION_CTRL_BPC_SHIFT;
144139
145140 /* Num of Lanes */
drivers/gpu/drm/msm/dp/dp_link.c+14−8
@@ -7,6 +7,7 @@ · 6 unmodified lines
77
88 #include <drm/drm_print.h>
99
10+#include "dp_reg.h"
1011 #include "dp_link.h"
1112 #include "dp_panel.h"
1213
@@ -1082,7 +1083,7 @@ int dp_link_process_request(struct dp_link *dp_link) · 1069 unmodified lines
10821083
10831084 int dp_link_get_colorimetry_config(struct dp_link *dp_link)
10841085 {
1085− u32 cc;
1086+ u32 cc = DP_MISC0_COLORIMERY_CFG_LEGACY_RGB;
10861087 struct dp_link_private *link;
10871088
10881089 if (!dp_link) {
@@ -1096,10 +1097,11 @@ int dp_link_get_colorimetry_config(struct dp_link *dp_link) · 7 unmodified lines
10961097 * Unless a video pattern CTS test is ongoing, use RGB_VESA
10971098 * Only RGB_VESA and RGB_CEA supported for now
10981099 */
1099− if (dp_link_is_video_pattern_requested(link))
1100− cc = link->dp_link.test_video.test_dyn_range;
1101− else
1102− cc = DP_TEST_DYNAMIC_RANGE_VESA;
1100+ if (dp_link_is_video_pattern_requested(link)) {
1101+ if (link->dp_link.test_video.test_dyn_range &
1102+ DP_TEST_DYNAMIC_RANGE_CEA)
1103+ cc = DP_MISC0_COLORIMERY_CFG_CEA_RGB;
1104+ }
11031105
11041106 return cc;
11051107 }
@@ -1179,6 +1181,9 @@ void dp_link_reset_phy_params_vx_px(struct dp_link *dp_link) · 73 unmodified lines
11791181 u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp)
11801182 {
11811183 u32 tbd;
1184+ struct dp_link_private *link;
1185+
1186+ link = container_of(dp_link, struct dp_link_private, dp_link);
11821187
11831188 /*
11841189 * Few simplistic rules and assumptions made here:
@@ -1196,12 +1201,13 @@ u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp) · 11 unmodified lines
11961201 tbd = DP_TEST_BIT_DEPTH_10;
11971202 break;
11981203 default:
1199− tbd = DP_TEST_BIT_DEPTH_UNKNOWN;
1204+ drm_dbg_dp(link->drm_dev, "bpp=%d not supported, use bpc=8\n",
1205+ bpp);
1206+ tbd = DP_TEST_BIT_DEPTH_8;
12001207 break;
12011208 }
12021209
1203− if (tbd != DP_TEST_BIT_DEPTH_UNKNOWN)
1204− tbd = (tbd >> DP_TEST_BIT_DEPTH_SHIFT);
1210+ tbd = (tbd >> DP_TEST_BIT_DEPTH_SHIFT);
12051211
12061212 return tbd;
12071213 }
drivers/gpu/drm/msm/dp/dp_reg.h+3−0
@@ -143,6 +143,9 @@ · 142 unmodified lines
143143 #define DP_MISC0_COLORIMETRY_CFG_SHIFT (0x00000001)
144144 #define DP_MISC0_TEST_BITS_DEPTH_SHIFT (0x00000005)
145145
146+#define DP_MISC0_COLORIMERY_CFG_LEGACY_RGB (0)
147+#define DP_MISC0_COLORIMERY_CFG_CEA_RGB (0x04)
148+
146149 #define REG_DP_VALID_BOUNDARY (0x00000030)
147150 #define REG_DP_VALID_BOUNDARY_2 (0x00000034)
148151
drivers/gpu/drm/msm/msm_mdss.c+1−0
@@ -562,6 +562,7 @@ static const struct msm_mdss_data sdm670_data = { · 561 unmodified lines
562562 .ubwc_enc_version = UBWC_2_0,
563563 .ubwc_dec_version = UBWC_2_0,
564564 .highest_bank_bit = 1,
565+ .reg_bus_bw = 76800,
565566 };
566567
567568 static const struct msm_mdss_data sdm845_data = {
drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h+1−1
@@ -9,7 +9,7 @@ · 8 unmodified lines
99 #define GSP_PAGE_SIZE BIT(GSP_PAGE_SHIFT)
1010
1111 struct nvkm_gsp_mem {
12− u32 size;
12+ size_t size;
1313 void *data;
1414 dma_addr_t addr;
1515 };
drivers/gpu/drm/nouveau/nouveau_fence.c+21−27
@@ -62,7 +62,7 @@ nouveau_fence_signal(struct nouveau_fence *fence) · 61 unmodified lines
6262 if (test_bit(DMA_FENCE_FLAG_USER_BITS, &fence->base.flags)) {
6363 struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
6464
65− if (atomic_dec_and_test(&fctx->notify_ref))
65+ if (!--fctx->notify_ref)
6666 drop = 1;
6767 }
6868
@@ -103,7 +103,7 @@ nouveau_fence_context_kill(struct nouveau_fence_chan *fctx, int error) · 34 unmodified lines
103103 void
104104 nouveau_fence_context_del(struct nouveau_fence_chan *fctx)
105105 {
106− cancel_work_sync(&fctx->allow_block_work);
106+ cancel_work_sync(&fctx->uevent_work);
107107 nouveau_fence_context_kill(fctx, 0);
108108 nvif_event_dtor(&fctx->event);
109109 fctx->dead = 1;
@@ -146,12 +146,13 @@ nouveau_fence_update(struct nouveau_channel *chan, struct nouveau_fence_chan *fc · 36 unmodified lines
146146 return drop;
147147 }
148148
149−static int
150−nouveau_fence_wait_uevent_handler(struct nvif_event *event, void *repv, u32 repc)
149+static void
150+nouveau_fence_uevent_work(struct work_struct *work)
151151 {
152− struct nouveau_fence_chan *fctx = container_of(event, typeof(*fctx), event);
152+ struct nouveau_fence_chan *fctx = container_of(work, struct nouveau_fence_chan,
153+ uevent_work);
153154 unsigned long flags;
154− int ret = NVIF_EVENT_KEEP;
155+ int drop = 0;
155156
156157 spin_lock_irqsave(&fctx->lock, flags);
157158 if (!list_empty(&fctx->pending)) {
@@ -161,23 +162,20 @@ nouveau_fence_wait_uevent_handler(struct nvif_event *event, void *repv, u32 repc · 3 unmodified lines
161162 fence = list_entry(fctx->pending.next, typeof(*fence), head);
162163 chan = rcu_dereference_protected(fence->channel, lockdep_is_held(&fctx->lock));
163164 if (nouveau_fence_update(chan, fctx))
164− ret = NVIF_EVENT_DROP;
165+ drop = 1;
165166 }
166− spin_unlock_irqrestore(&fctx->lock, flags);
167+ if (drop)
168+ nvif_event_block(&fctx->event);
167169
168− return ret;
170+ spin_unlock_irqrestore(&fctx->lock, flags);
169171 }
170172
171−static void
172−nouveau_fence_work_allow_block(struct work_struct *work)
173+static int
174+nouveau_fence_wait_uevent_handler(struct nvif_event *event, void *repv, u32 repc)
173175 {
174− struct nouveau_fence_chan *fctx = container_of(work, struct nouveau_fence_chan,
175− allow_block_work);
176−
177− if (atomic_read(&fctx->notify_ref) == 0)
178− nvif_event_block(&fctx->event);
179− else
180− nvif_event_allow(&fctx->event);
176+ struct nouveau_fence_chan *fctx = container_of(event, typeof(*fctx), event);
177+ schedule_work(&fctx->uevent_work);
178+ return NVIF_EVENT_KEEP;
181179 }
182180
183181 void
@@ -191,7 +189,7 @@ nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_cha · 7 unmodified lines
191189 } args;
192190 int ret;
193191
194− INIT_WORK(&fctx->allow_block_work, nouveau_fence_work_allow_block);
192+ INIT_WORK(&fctx->uevent_work, nouveau_fence_uevent_work);
195193 INIT_LIST_HEAD(&fctx->flip);
196194 INIT_LIST_HEAD(&fctx->pending);
197195 spin_lock_init(&fctx->lock);
@@ -535,19 +533,15 @@ static bool nouveau_fence_enable_signaling(struct dma_fence *f) · 337 unmodified lines
535533 struct nouveau_fence *fence = from_fence(f);
536534 struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
537535 bool ret;
538− bool do_work;
539536
540− if (atomic_inc_return(&fctx->notify_ref) == 0)
541− do_work = true;
537+ if (!fctx->notify_ref++)
538+ nvif_event_allow(&fctx->event);
542539
543540 ret = nouveau_fence_no_signaling(f);
544541 if (ret)
545542 set_bit(DMA_FENCE_FLAG_USER_BITS, &fence->base.flags);
546− else if (atomic_dec_and_test(&fctx->notify_ref))
547− do_work = true;
548−
549− if (do_work)
550− schedule_work(&fctx->allow_block_work);
543+ else if (!--fctx->notify_ref)
544+ nvif_event_block(&fctx->event);
551545
552546 return ret;
553547 }
drivers/gpu/drm/nouveau/nouveau_fence.h+2−4
@@ -3,7 +3,6 @@ · 2 unmodified lines
33 #define __NOUVEAU_FENCE_H__
44
55 #include <linux/dma-fence.h>
6−#include <linux/workqueue.h>
76 #include <nvif/event.h>
87
98 struct nouveau_drm;
@@ -45,10 +44,9 @@ struct nouveau_fence_chan { · 35 unmodified lines
4544 u32 context;
4645 char name[32];
4746
47+ struct work_struct uevent_work;
4848 struct nvif_event event;
49− struct work_struct allow_block_work;
50− atomic_t notify_ref;
51− int dead, killed;
49+ int notify_ref, dead, killed;
5250 };
5351
5452 struct nouveau_fence_priv {
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c+48−31
@@ -997,6 +997,32 @@ r535_gsp_rpc_get_gsp_static_info(struct nvkm_gsp *gsp) · 996 unmodified lines
997997 return 0;
998998 }
999999
1000+static void
1001+nvkm_gsp_mem_dtor(struct nvkm_gsp *gsp, struct nvkm_gsp_mem *mem)
1002+{
1003+ if (mem->data) {
1004+ /*
1005+ * Poison the buffer to catch any unexpected access from
1006+ * GSP-RM if the buffer was prematurely freed.
1007+ */
1008+ memset(mem->data, 0xFF, mem->size);
1009+
1010+ dma_free_coherent(gsp->subdev.device->dev, mem->size, mem->data, mem->addr);
1011+ memset(mem, 0, sizeof(*mem));
1012+ }
1013+}
1014+
1015+static int
1016+nvkm_gsp_mem_ctor(struct nvkm_gsp *gsp, size_t size, struct nvkm_gsp_mem *mem)
1017+{
1018+ mem->size = size;
1019+ mem->data = dma_alloc_coherent(gsp->subdev.device->dev, size, &mem->addr, GFP_KERNEL);
1020+ if (WARN_ON(!mem->data))
1021+ return -ENOMEM;
1022+
1023+ return 0;
1024+}
1025+
10001026 static int
10011027 r535_gsp_postinit(struct nvkm_gsp *gsp)
10021028 {
@@ -1024,6 +1050,13 @@ r535_gsp_postinit(struct nvkm_gsp *gsp) · 21 unmodified lines
10241050
10251051 nvkm_inth_allow(&gsp->subdev.inth);
10261052 nvkm_wr32(device, 0x110004, 0x00000040);
1053+
1054+ /* Release the DMA buffers that were needed only for boot and init */
1055+ nvkm_gsp_mem_dtor(gsp, &gsp->boot.fw);
1056+ nvkm_gsp_mem_dtor(gsp, &gsp->libos);
1057+ nvkm_gsp_mem_dtor(gsp, &gsp->rmargs);
1058+ nvkm_gsp_mem_dtor(gsp, &gsp->wpr_meta);
1059+
10271060 return ret;
10281061 }
10291062
@@ -1078,7 +1111,6 @@ r535_gsp_rpc_set_registry(struct nvkm_gsp *gsp) · 48 unmodified lines
10781111 if (IS_ERR(rpc))
10791112 return PTR_ERR(rpc);
10801113
1081− rpc->size = sizeof(*rpc);
10821114 rpc->numEntries = NV_GSP_REG_NUM_ENTRIES;
10831115
10841116 str_offset = offsetof(typeof(*rpc), entries[NV_GSP_REG_NUM_ENTRIES]);
@@ -1094,6 +1126,7 @@ r535_gsp_rpc_set_registry(struct nvkm_gsp *gsp) · 9 unmodified lines
10941126 strings += name_len;
10951127 str_offset += name_len;
10961128 }
1129+ rpc->size = str_offset;
10971130
10981131 return nvkm_gsp_rpc_wr(gsp, rpc, false);
10991132 }
@@ -1532,27 +1565,6 @@ r535_gsp_msg_run_cpu_sequencer(void *priv, u32 fn, void *repv, u32 repc) · 432 unmodified lines
15321565 return 0;
15331566 }
15341567
1535−static void
1536−nvkm_gsp_mem_dtor(struct nvkm_gsp *gsp, struct nvkm_gsp_mem *mem)
1537−{
1538− if (mem->data) {
1539− dma_free_coherent(gsp->subdev.device->dev, mem->size, mem->data, mem->addr);
1540− mem->data = NULL;
1541− }
1542−}
1543−
1544−static int
1545−nvkm_gsp_mem_ctor(struct nvkm_gsp *gsp, u32 size, struct nvkm_gsp_mem *mem)
1546−{
1547− mem->size = size;
1548− mem->data = dma_alloc_coherent(gsp->subdev.device->dev, size, &mem->addr, GFP_KERNEL);
1549− if (WARN_ON(!mem->data))
1550− return -ENOMEM;
1551−
1552− return 0;
1553−}
1554−
1555−
15561568 static int
15571569 r535_gsp_booter_unload(struct nvkm_gsp *gsp, u32 mbox0, u32 mbox1)
15581570 {
@@ -1938,20 +1950,20 @@ nvkm_gsp_radix3_dtor(struct nvkm_gsp *gsp, struct nvkm_gsp_radix3 *rx3) · 379 unmodified lines
19381950 * See kgspCreateRadix3_IMPL
19391951 */
19401952 static int
1941−nvkm_gsp_radix3_sg(struct nvkm_device *device, struct sg_table *sgt, u64 size,
1953+nvkm_gsp_radix3_sg(struct nvkm_gsp *gsp, struct sg_table *sgt, u64 size,
19421954 struct nvkm_gsp_radix3 *rx3)
19431955 {
19441956 u64 addr;
19451957
19461958 for (int i = ARRAY_SIZE(rx3->mem) - 1; i >= 0; i--) {
19471959 u64 *ptes;
1948− int idx;
1960+ size_t bufsize;
1961+ int ret, idx;
19491962
1950− rx3->mem[i].size = ALIGN((size / GSP_PAGE_SIZE) * sizeof(u64), GSP_PAGE_SIZE);
1951− rx3->mem[i].data = dma_alloc_coherent(device->dev, rx3->mem[i].size,
1952− &rx3->mem[i].addr, GFP_KERNEL);
1953− if (WARN_ON(!rx3->mem[i].data))
1954− return -ENOMEM;
1963+ bufsize = ALIGN((size / GSP_PAGE_SIZE) * sizeof(u64), GSP_PAGE_SIZE);
1964+ ret = nvkm_gsp_mem_ctor(gsp, bufsize, &rx3->mem[i]);
1965+ if (ret)
1966+ return ret;
19551967
19561968 ptes = rx3->mem[i].data;
19571969 if (i == 2) {
@@ -1991,7 +2003,7 @@ r535_gsp_fini(struct nvkm_gsp *gsp, bool suspend) · 33 unmodified lines
19912003 if (ret)
19922004 return ret;
19932005
1994− ret = nvkm_gsp_radix3_sg(gsp->subdev.device, &gsp->sr.sgt, len, &gsp->sr.radix3);
2006+ ret = nvkm_gsp_radix3_sg(gsp, &gsp->sr.sgt, len, &gsp->sr.radix3);
19952007 if (ret)
19962008 return ret;
19972009
@@ -2150,6 +2162,11 @@ r535_gsp_dtor(struct nvkm_gsp *gsp) · 152 unmodified lines
21502162 mutex_destroy(&gsp->cmdq.mutex);
21512163
21522164 r535_gsp_dtor_fws(gsp);
2165+
2166+ nvkm_gsp_mem_dtor(gsp, &gsp->shm.mem);
2167+ nvkm_gsp_mem_dtor(gsp, &gsp->loginit);
2168+ nvkm_gsp_mem_dtor(gsp, &gsp->logintr);
2169+ nvkm_gsp_mem_dtor(gsp, &gsp->logrm);
21532170 }
21542171
21552172 int
@@ -2194,7 +2211,7 @@ r535_gsp_oneinit(struct nvkm_gsp *gsp) · 38 unmodified lines
21942211 memcpy(gsp->sig.data, data, size);
21952212
21962213 /* Build radix3 page table for ELF image. */
2197− ret = nvkm_gsp_radix3_sg(device, &gsp->fw.mem.sgt, gsp->fw.len, &gsp->radix3);
2214+ ret = nvkm_gsp_radix3_sg(gsp, &gsp->fw.mem.sgt, gsp->fw.len, &gsp->radix3);
21982215 if (ret)
21992216 return ret;
22002217
drivers/gpu/drm/panel/Kconfig+2−0
@@ -539,6 +539,8 @@ config DRM_PANEL_RAYDIUM_RM692E5 · 538 unmodified lines
539539 depends on OF
540540 depends on DRM_MIPI_DSI
541541 depends on BACKLIGHT_CLASS_DEVICE
542+ select DRM_DISPLAY_DP_HELPER
543+ select DRM_DISPLAY_HELPER
542544 help
543545 Say Y here if you want to enable support for Raydium RM692E5-based
544546 display panels, such as the one found in the Fairphone 5 smartphone.
drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c+1−1
@@ -309,7 +309,7 @@ static const struct s6d7aa0_panel_desc s6d7aa0_lsl080al02_desc = { · 308 unmodified lines
309309 .off_func = s6d7aa0_lsl080al02_off,
310310 .drm_mode = &s6d7aa0_lsl080al02_mode,
311311 .mode_flags = MIPI_DSI_MODE_VSYNC_FLUSH | MIPI_DSI_MODE_VIDEO_NO_HFP,
312− .bus_flags = DRM_BUS_FLAG_DE_HIGH,
312+ .bus_flags = 0,
313313
314314 .has_backlight = false,
315315 .use_passwd3 = false,
drivers/gpu/drm/panel/panel-simple.c+2−0
@@ -3948,6 +3948,7 @@ static const struct panel_desc tianma_tm070jdhg30 = { · 3947 unmodified lines
39483948 },
39493949 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
39503950 .connector_type = DRM_MODE_CONNECTOR_LVDS,
3951+ .bus_flags = DRM_BUS_FLAG_DE_HIGH,
39513952 };
39523953
39533954 static const struct panel_desc tianma_tm070jvhg33 = {
@@ -3960,6 +3961,7 @@ static const struct panel_desc tianma_tm070jvhg33 = { · 6 unmodified lines
39603961 },
39613962 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
39623963 .connector_type = DRM_MODE_CONNECTOR_LVDS,
3964+ .bus_flags = DRM_BUS_FLAG_DE_HIGH,
39633965 };
39643966
39653967 static const struct display_timing tianma_tm070rvhg71_timing = {
drivers/gpu/drm/scheduler/sched_main.c+4−2
@@ -1184,14 +1184,16 @@ static void drm_sched_run_job_work(struct work_struct *w) · 1183 unmodified lines
11841184 if (READ_ONCE(sched->pause_submit))
11851185 return;
11861186
1187+ /* Find entity with a ready job */
11871188 entity = drm_sched_select_entity(sched);
11881189 if (!entity)
1189− return;
1190+ return; /* No more work */
11901191
11911192 sched_job = drm_sched_entity_pop_job(entity);
11921193 if (!sched_job) {
11931194 complete_all(&entity->entity_idle);
1194− return; /* No more work */
1195+ drm_sched_run_job_queue(sched);
1196+ return;
11951197 }
11961198
11971199 s_fence = sched_job->s_fence;
drivers/gpu/drm/tegra/drm.c+2−1
@@ -960,7 +960,8 @@ int host1x_client_iommu_attach(struct host1x_client *client) · 959 unmodified lines
960960 * not the shared IOMMU domain, don't try to attach it to a different
961961 * domain. This allows using the IOMMU-backed DMA API.
962962 */
963− if (domain && domain != tegra->domain)
963+ if (domain && domain->type != IOMMU_DOMAIN_IDENTITY &&
964+ domain != tegra->domain)
964965 return 0;
965966
966967 if (tegra->domain) {
drivers/gpu/drm/tests/drm_mm_test.c+4−1
@@ -188,13 +188,13 @@ out: · 187 unmodified lines
188188
189189 static void drm_test_mm_debug(struct kunit *test)
190190 {
191+ struct drm_printer p = drm_debug_printer(test->name);
191192 struct drm_mm mm;
192193 struct drm_mm_node nodes[2];
193194
194195 /* Create a small drm_mm with a couple of nodes and a few holes, and
195196 * check that the debug iterator doesn't explode over a trivial drm_mm.
196197 */
197−
198198 drm_mm_init(&mm, 0, 4096);
199199
200200 memset(nodes, 0, sizeof(nodes));
@@ -209,6 +209,9 @@ static void drm_test_mm_debug(struct kunit *test) · 8 unmodified lines
209209 KUNIT_ASSERT_FALSE_MSG(test, drm_mm_reserve_node(&mm, &nodes[1]),
210210 "failed to reserve node[0] {start=%lld, size=%lld)\n",
211211 nodes[0].start, nodes[0].size);
212+
213+ drm_mm_print(&mm, &p);
214+ KUNIT_SUCCEED(test);
212215 }
213216
214217 static bool expect_insert(struct kunit *test, struct drm_mm *mm,
drivers/gpu/drm/ttm/ttm_device.c+16−5
@@ -95,11 +95,17 @@ static int ttm_global_init(void) · 94 unmodified lines
9595 ttm_pool_mgr_init(num_pages);
9696 ttm_tt_mgr_init(num_pages, num_dma32);
9797
98− glob->dummy_read_page = alloc_page(__GFP_ZERO | GFP_DMA32);
98+ glob->dummy_read_page = alloc_page(__GFP_ZERO | GFP_DMA32 |
99+ __GFP_NOWARN);
99100
101+ /* Retry without GFP_DMA32 for platforms DMA32 is not available */
100102 if (unlikely(glob->dummy_read_page == NULL)) {
101− ret = -ENOMEM;
102− goto out;
103+ glob->dummy_read_page = alloc_page(__GFP_ZERO);
104+ if (unlikely(glob->dummy_read_page == NULL)) {
105+ ret = -ENOMEM;
106+ goto out;
107+ }
108+ pr_warn("Using GFP_DMA32 fallback for dummy_read_page\n");
103109 }
104110
105111 INIT_LIST_HEAD(&glob->device_list);
@@ -195,7 +201,7 @@ int ttm_device_init(struct ttm_device *bdev, const struct ttm_device_funcs *func · 89 unmodified lines
195201 bool use_dma_alloc, bool use_dma32)
196202 {
197203 struct ttm_global *glob = &ttm_glob;
198− int ret;
204+ int ret, nid;
199205
200206 if (WARN_ON(vma_manager == NULL))
201207 return -EINVAL;
@@ -215,7 +221,12 @@ int ttm_device_init(struct ttm_device *bdev, const struct ttm_device_funcs *func · 13 unmodified lines
215221
216222 ttm_sys_man_init(bdev);
217223
218− ttm_pool_init(&bdev->pool, dev, dev_to_node(dev), use_dma_alloc, use_dma32);
224+ if (dev)
225+ nid = dev_to_node(dev);
226+ else
227+ nid = NUMA_NO_NODE;
228+
229+ ttm_pool_init(&bdev->pool, dev, nid, use_dma_alloc, use_dma32);
219230
220231 bdev->vma_manager = vma_manager;
221232 spin_lock_init(&bdev->lru_lock);
drivers/gpu/drm/v3d/v3d_submit.c+28−7
@@ -147,6 +147,13 @@ v3d_job_allocate(void **container, size_t size) · 146 unmodified lines
147147 return 0;
148148 }
149149
150+static void
151+v3d_job_deallocate(void **container)
152+{
153+ kfree(*container);
154+ *container = NULL;
155+}
156+
150157 static int
151158 v3d_job_init(struct v3d_dev *v3d, struct drm_file *file_priv,
152159 struct v3d_job *job, void (*free)(struct kref *ref),
@@ -273,8 +280,10 @@ v3d_setup_csd_jobs_and_bos(struct drm_file *file_priv, · 120 unmodified lines
273280
274281 ret = v3d_job_init(v3d, file_priv, &(*job)->base,
275282 v3d_job_free, args->in_sync, se, V3D_CSD);
276− if (ret)
283+ if (ret) {
284+ v3d_job_deallocate((void *)job);
277285 return ret;
286+ }
278287
279288 ret = v3d_job_allocate((void *)clean_job, sizeof(**clean_job));
280289 if (ret)
@@ -282,8 +291,10 @@ v3d_setup_csd_jobs_and_bos(struct drm_file *file_priv, · 1 unmodified line
282291
283292 ret = v3d_job_init(v3d, file_priv, *clean_job,
284293 v3d_job_free, 0, NULL, V3D_CACHE_CLEAN);
285− if (ret)
294+ if (ret) {
295+ v3d_job_deallocate((void *)clean_job);
286296 return ret;
297+ }
287298
288299 (*job)->args = *args;
289300
@@ -860,8 +871,10 @@ v3d_submit_cl_ioctl(struct drm_device *dev, void *data, · 570 unmodified lines
860871
861872 ret = v3d_job_init(v3d, file_priv, &render->base,
862873 v3d_render_job_free, args->in_sync_rcl, &se, V3D_RENDER);
863− if (ret)
874+ if (ret) {
875+ v3d_job_deallocate((void *)&render);
864876 goto fail;
877+ }
865878
866879 render->start = args->rcl_start;
867880 render->end = args->rcl_end;
@@ -874,8 +887,10 @@ v3d_submit_cl_ioctl(struct drm_device *dev, void *data, · 6 unmodified lines
874887
875888 ret = v3d_job_init(v3d, file_priv, &bin->base,
876889 v3d_job_free, args->in_sync_bcl, &se, V3D_BIN);
877− if (ret)
890+ if (ret) {
891+ v3d_job_deallocate((void *)&bin);
878892 goto fail;
893+ }
879894
880895 bin->start = args->bcl_start;
881896 bin->end = args->bcl_end;
@@ -892,8 +907,10 @@ v3d_submit_cl_ioctl(struct drm_device *dev, void *data, · 10 unmodified lines
892907
893908 ret = v3d_job_init(v3d, file_priv, clean_job,
894909 v3d_job_free, 0, NULL, V3D_CACHE_CLEAN);
895− if (ret)
910+ if (ret) {
911+ v3d_job_deallocate((void *)&clean_job);
896912 goto fail;
913+ }
897914
898915 last_job = clean_job;
899916 } else {
@@ -1015,8 +1032,10 @@ v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, · 115 unmodified lines
10151032
10161033 ret = v3d_job_init(v3d, file_priv, &job->base,
10171034 v3d_job_free, args->in_sync, &se, V3D_TFU);
1018− if (ret)
1035+ if (ret) {
1036+ v3d_job_deallocate((void *)&job);
10191037 goto fail;
1038+ }
10201039
10211040 job->base.bo = kcalloc(ARRAY_SIZE(args->bo_handles),
10221041 sizeof(*job->base.bo), GFP_KERNEL);
@@ -1233,8 +1252,10 @@ v3d_submit_cpu_ioctl(struct drm_device *dev, void *data, · 210 unmodified lines
12331252
12341253 ret = v3d_job_init(v3d, file_priv, &cpu_job->base,
12351254 v3d_job_free, 0, &se, V3D_CPU);
1236− if (ret)
1255+ if (ret) {
1256+ v3d_job_deallocate((void *)&cpu_job);
12371257 goto fail;
1258+ }
12381259
12391260 clean_job = cpu_job->indirect_csd.clean_job;
12401261 csd_job = cpu_job->indirect_csd.job;
drivers/gpu/drm/virtio/virtgpu_drv.c+1−0
@@ -94,6 +94,7 @@ static int virtio_gpu_probe(struct virtio_device *vdev) · 93 unmodified lines
9494 goto err_free;
9595 }
9696
97+ dma_set_max_seg_size(dev->dev, dma_max_mapping_size(dev->dev) ?: UINT_MAX);
9798 ret = virtio_gpu_init(vdev, dev);
9899 if (ret)
99100 goto err_free;
drivers/gpu/drm/xe/abi/guc_actions_abi.h+2−2
@@ -50,8 +50,8 @@ · 49 unmodified lines
5050
5151 #define HOST2GUC_SELF_CFG_REQUEST_MSG_LEN (GUC_HXG_REQUEST_MSG_MIN_LEN + 3u)
5252 #define HOST2GUC_SELF_CFG_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
53−#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY (0xffff << 16)
54−#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN (0xffff << 0)
53+#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY (0xffffu << 16)
54+#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN (0xffffu << 0)
5555 #define HOST2GUC_SELF_CFG_REQUEST_MSG_2_VALUE32 GUC_HXG_REQUEST_MSG_n_DATAn
5656 #define HOST2GUC_SELF_CFG_REQUEST_MSG_3_VALUE64 GUC_HXG_REQUEST_MSG_n_DATAn
5757
drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h+2−2
@@ -242,8 +242,8 @@ struct slpc_shared_data { · 241 unmodified lines
242242 (HOST2GUC_PC_SLPC_REQUEST_REQUEST_MSG_MIN_LEN + \
243243 HOST2GUC_PC_SLPC_EVENT_MAX_INPUT_ARGS)
244244 #define HOST2GUC_PC_SLPC_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
245−#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID (0xff << 8)
246−#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC (0xff << 0)
245+#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID (0xffu << 8)
246+#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC (0xffu << 0)
247247 #define HOST2GUC_PC_SLPC_REQUEST_MSG_N_EVENT_DATA_N GUC_HXG_REQUEST_MSG_n_DATAn
248248
249249 #endif
drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h+4−4
@@ -82,11 +82,11 @@ static_assert(sizeof(struct guc_ct_buffer_desc) == 64); · 81 unmodified lines
8282 #define GUC_CTB_HDR_LEN 1u
8383 #define GUC_CTB_MSG_MIN_LEN GUC_CTB_HDR_LEN
8484 #define GUC_CTB_MSG_MAX_LEN 256u
85−#define GUC_CTB_MSG_0_FENCE (0xffff << 16)
86−#define GUC_CTB_MSG_0_FORMAT (0xf << 12)
85+#define GUC_CTB_MSG_0_FENCE (0xffffu << 16)
86+#define GUC_CTB_MSG_0_FORMAT (0xfu << 12)
8787 #define GUC_CTB_FORMAT_HXG 0u
88−#define GUC_CTB_MSG_0_RESERVED (0xf << 8)
89−#define GUC_CTB_MSG_0_NUM_DWORDS (0xff << 0)
88+#define GUC_CTB_MSG_0_RESERVED (0xfu << 8)
89+#define GUC_CTB_MSG_0_NUM_DWORDS (0xffu << 0)
9090
9191 /**
9292 * DOC: CTB HXG Message
drivers/gpu/drm/xe/abi/guc_klvs_abi.h+3−3
@@ -31,9 +31,9 @@ · 30 unmodified lines
3131 */
3232
3333 #define GUC_KLV_LEN_MIN 1u
34−#define GUC_KLV_0_KEY (0xffff << 16)
35−#define GUC_KLV_0_LEN (0xffff << 0)
36−#define GUC_KLV_n_VALUE (0xffffffff << 0)
34+#define GUC_KLV_0_KEY (0xffffu << 16)
35+#define GUC_KLV_0_LEN (0xffffu << 0)
36+#define GUC_KLV_n_VALUE (0xffffffffu << 0)
3737
3838 /**
3939 * DOC: GuC Self Config KLVs
drivers/gpu/drm/xe/abi/guc_messages_abi.h+10−10
@@ -40,18 +40,18 @@ · 39 unmodified lines
4040 */
4141
4242 #define GUC_HXG_MSG_MIN_LEN 1u
43−#define GUC_HXG_MSG_0_ORIGIN (0x1 << 31)
43+#define GUC_HXG_MSG_0_ORIGIN (0x1u << 31)
4444 #define GUC_HXG_ORIGIN_HOST 0u
4545 #define GUC_HXG_ORIGIN_GUC 1u
46−#define GUC_HXG_MSG_0_TYPE (0x7 << 28)
46+#define GUC_HXG_MSG_0_TYPE (0x7u << 28)
4747 #define GUC_HXG_TYPE_REQUEST 0u
4848 #define GUC_HXG_TYPE_EVENT 1u
4949 #define GUC_HXG_TYPE_NO_RESPONSE_BUSY 3u
5050 #define GUC_HXG_TYPE_NO_RESPONSE_RETRY 5u
5151 #define GUC_HXG_TYPE_RESPONSE_FAILURE 6u
5252 #define GUC_HXG_TYPE_RESPONSE_SUCCESS 7u
53−#define GUC_HXG_MSG_0_AUX (0xfffffff << 0)
54−#define GUC_HXG_MSG_n_PAYLOAD (0xffffffff << 0)
53+#define GUC_HXG_MSG_0_AUX (0xfffffffu << 0)
54+#define GUC_HXG_MSG_n_PAYLOAD (0xffffffffu << 0)
5555
5656 /**
5757 * DOC: HXG Request
@@ -85,8 +85,8 @@ · 27 unmodified lines
8585 */
8686
8787 #define GUC_HXG_REQUEST_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN
88−#define GUC_HXG_REQUEST_MSG_0_DATA0 (0xfff << 16)
89−#define GUC_HXG_REQUEST_MSG_0_ACTION (0xffff << 0)
88+#define GUC_HXG_REQUEST_MSG_0_DATA0 (0xfffu << 16)
89+#define GUC_HXG_REQUEST_MSG_0_ACTION (0xffffu << 0)
9090 #define GUC_HXG_REQUEST_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD
9191
9292 /**
@@ -117,8 +117,8 @@ · 24 unmodified lines
117117 */
118118
119119 #define GUC_HXG_EVENT_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN
120−#define GUC_HXG_EVENT_MSG_0_DATA0 (0xfff << 16)
121−#define GUC_HXG_EVENT_MSG_0_ACTION (0xffff << 0)
120+#define GUC_HXG_EVENT_MSG_0_DATA0 (0xfffu << 16)
121+#define GUC_HXG_EVENT_MSG_0_ACTION (0xffffu << 0)
122122 #define GUC_HXG_EVENT_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD
123123
124124 /**
@@ -188,8 +188,8 @@ · 63 unmodified lines
188188 */
189189
190190 #define GUC_HXG_FAILURE_MSG_LEN GUC_HXG_MSG_MIN_LEN
191−#define GUC_HXG_FAILURE_MSG_0_HINT (0xfff << 16)
192−#define GUC_HXG_FAILURE_MSG_0_ERROR (0xffff << 0)
191+#define GUC_HXG_FAILURE_MSG_0_HINT (0xfffu << 16)
192+#define GUC_HXG_FAILURE_MSG_0_ERROR (0xffffu << 0)
193193
194194 /**
195195 * DOC: HXG Response
drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h+5−6
@@ -35,12 +35,10 @@ static inline int i915_gem_object_read_from_page(struct xe_bo *bo, · 34 unmodified lines
3535 u32 ofs, u64 *ptr, u32 size)
3636 {
3737 struct ttm_bo_kmap_obj map;
38− void *virtual;
38+ void *src;
3939 bool is_iomem;
4040 int ret;
4141
42− XE_WARN_ON(size != 8);
43−
4442 ret = xe_bo_lock(bo, true);
4543 if (ret)
4644 return ret;
@@ -50,11 +48,12 @@ static inline int i915_gem_object_read_from_page(struct xe_bo *bo, · 3 unmodified lines
5048 goto out_unlock;
5149
5250 ofs &= ~PAGE_MASK;
53− virtual = ttm_kmap_obj_virtual(&map, &is_iomem);
51+ src = ttm_kmap_obj_virtual(&map, &is_iomem);
52+ src += ofs;
5453 if (is_iomem)
55− *ptr = readq((void __iomem *)(virtual + ofs));
54+ memcpy_fromio(ptr, (void __iomem *)src, size);
5655 else
57− *ptr = *(u64 *)(virtual + ofs);
56+ memcpy(ptr, src, size);
5857
5958 ttm_bo_kunmap(&map);
6059 out_unlock:
drivers/gpu/drm/xe/tests/xe_wa_test.c+0−3
@@ -74,9 +74,6 @@ static const struct platform_test_case cases[] = { · 73 unmodified lines
7474 SUBPLATFORM_CASE(DG2, G11, B1),
7575 SUBPLATFORM_CASE(DG2, G12, A0),
7676 SUBPLATFORM_CASE(DG2, G12, A1),
77− PLATFORM_CASE(PVC, B0),
78− PLATFORM_CASE(PVC, B1),
79− PLATFORM_CASE(PVC, C0),
8077 GMDID_CASE(METEORLAKE, 1270, A0, 1300, A0),
8178 GMDID_CASE(METEORLAKE, 1271, A0, 1300, A0),
8279 GMDID_CASE(LUNARLAKE, 2004, A0, 2000, A0),
drivers/gpu/drm/xe/xe_device.c+1−1
@@ -613,7 +613,7 @@ void xe_device_wmb(struct xe_device *xe) · 612 unmodified lines
613613 u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size)
614614 {
615615 return xe_device_has_flat_ccs(xe) ?
616− DIV_ROUND_UP(size, NUM_BYTES_PER_CCS_BYTE(xe)) : 0;
616+ DIV_ROUND_UP_ULL(size, NUM_BYTES_PER_CCS_BYTE(xe)) : 0;
617617 }
618618
619619 bool xe_device_mem_access_ongoing(struct xe_device *xe)
drivers/gpu/drm/xe/xe_display.c+0−6
@@ -134,8 +134,6 @@ static void xe_display_fini_nommio(struct drm_device *dev, void *dummy) · 133 unmodified lines
134134
135135 int xe_display_init_nommio(struct xe_device *xe)
136136 {
137− int err;
138−
139137 if (!xe->info.enable_display)
140138 return 0;
141139
@@ -145,10 +143,6 @@ int xe_display_init_nommio(struct xe_device *xe) · 3 unmodified lines
145143 /* This must be called before any calls to HAS_PCH_* */
146144 intel_detect_pch(xe);
147145
148− err = intel_power_domains_init(xe);
149− if (err)
150− return err;
151−
152146 return drmm_add_action_or_reset(&xe->drm, xe_display_fini_nommio, xe);
153147 }
154148
drivers/gpu/drm/xe/xe_dma_buf.c+1−1
@@ -175,7 +175,7 @@ static int xe_dma_buf_begin_cpu_access(struct dma_buf *dma_buf, · 174 unmodified lines
175175 return 0;
176176 }
177177
178−const struct dma_buf_ops xe_dmabuf_ops = {
178+static const struct dma_buf_ops xe_dmabuf_ops = {
179179 .attach = xe_dma_buf_attach,
180180 .detach = xe_dma_buf_detach,
181181 .pin = xe_dma_buf_pin,
drivers/gpu/drm/xe/xe_exec.c+9−1
@@ -111,7 +111,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file) · 110 unmodified lines
111111 u64 addresses[XE_HW_ENGINE_MAX_INSTANCE];
112112 struct drm_gpuvm_exec vm_exec = {.extra.fn = xe_exec_fn};
113113 struct drm_exec *exec = &vm_exec.exec;
114− u32 i, num_syncs = 0;
114+ u32 i, num_syncs = 0, num_ufence = 0;
115115 struct xe_sched_job *job;
116116 struct dma_fence *rebind_fence;
117117 struct xe_vm *vm;
@@ -157,6 +157,14 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file) · 39 unmodified lines
157157 SYNC_PARSE_FLAG_LR_MODE : 0));
158158 if (err)
159159 goto err_syncs;
160+
161+ if (xe_sync_is_ufence(&syncs[i]))
162+ num_ufence++;
163+ }
164+
165+ if (XE_IOCTL_DBG(xe, num_ufence > 1)) {
166+ err = -EINVAL;
167+ goto err_syncs;
160168 }
161169
162170 if (xe_exec_queue_is_parallel(q)) {
drivers/gpu/drm/xe/xe_exec_queue.c+6−2
@@ -926,20 +926,24 @@ void xe_exec_queue_last_fence_put_unlocked(struct xe_exec_queue *q) · 925 unmodified lines
926926 * @q: The exec queue
927927 * @vm: The VM the engine does a bind or exec for
928928 *
929− * Get last fence, does not take a ref
929+ * Get last fence, takes a ref
930930 *
931931 * Returns: last fence if not signaled, dma fence stub if signaled
932932 */
933933 struct dma_fence *xe_exec_queue_last_fence_get(struct xe_exec_queue *q,
934934 struct xe_vm *vm)
935935 {
936+ struct dma_fence *fence;
937+
936938 xe_exec_queue_last_fence_lockdep_assert(q, vm);
937939
938940 if (q->last_fence &&
939941 test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &q->last_fence->flags))
940942 xe_exec_queue_last_fence_put(q, vm);
941943
942− return q->last_fence ? q->last_fence : dma_fence_get_stub();
944+ fence = q->last_fence ? q->last_fence : dma_fence_get_stub();
945+ dma_fence_get(fence);
946+ return fence;
943947 }
944948
945949 /**
drivers/gpu/drm/xe/xe_gt.c+4−1
@@ -437,7 +437,10 @@ static int all_fw_domain_init(struct xe_gt *gt) · 436 unmodified lines
437437 * USM has its only SA pool to non-block behind user operations
438438 */
439439 if (gt_to_xe(gt)->info.has_usm) {
440− gt->usm.bb_pool = xe_sa_bo_manager_init(gt_to_tile(gt), SZ_1M, 16);
440+ struct xe_device *xe = gt_to_xe(gt);
441+
442+ gt->usm.bb_pool = xe_sa_bo_manager_init(gt_to_tile(gt),
443+ IS_DGFX(xe) ? SZ_1M : SZ_512K, 16);
441444 if (IS_ERR(gt->usm.bb_pool)) {
442445 err = PTR_ERR(gt->usm.bb_pool);
443446 goto err_force_wake;
drivers/gpu/drm/xe/xe_gt_mcr.c+2−2
@@ -480,7 +480,7 @@ static bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt, · 479 unmodified lines
480480 * to synchronize with external clients (e.g., firmware), so a semaphore
481481 * register will also need to be taken.
482482 */
483−static void mcr_lock(struct xe_gt *gt)
483+static void mcr_lock(struct xe_gt *gt) __acquires(&gt->mcr_lock)
484484 {
485485 struct xe_device *xe = gt_to_xe(gt);
486486 int ret = 0;
@@ -500,7 +500,7 @@ static void mcr_lock(struct xe_gt *gt) · 13 unmodified lines
500500 drm_WARN_ON_ONCE(&xe->drm, ret == -ETIMEDOUT);
501501 }
502502
503−static void mcr_unlock(struct xe_gt *gt)
503+static void mcr_unlock(struct xe_gt *gt) __releases(&gt->mcr_lock)
504504 {
505505 /* Release hardware semaphore - this is done by writing 1 to the register */
506506 if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270)
drivers/gpu/drm/xe/xe_gt_pagefault.c+8−5
@@ -165,7 +165,8 @@ retry_userptr: · 164 unmodified lines
165165 goto unlock_vm;
166166 }
167167
168− if (!xe_vma_is_userptr(vma) || !xe_vma_userptr_check_repin(vma)) {
168+ if (!xe_vma_is_userptr(vma) ||
169+ !xe_vma_userptr_check_repin(to_userptr_vma(vma))) {
169170 downgrade_write(&vm->lock);
170171 write_locked = false;
171172 }
@@ -181,11 +182,13 @@ retry_userptr: · 9 unmodified lines
181182 /* TODO: Validate fault */
182183
183184 if (xe_vma_is_userptr(vma) && write_locked) {
185+ struct xe_userptr_vma *uvma = to_userptr_vma(vma);
186+
184187 spin_lock(&vm->userptr.invalidated_lock);
185− list_del_init(&vma->userptr.invalidate_link);
188+ list_del_init(&uvma->userptr.invalidate_link);
186189 spin_unlock(&vm->userptr.invalidated_lock);
187190
188− ret = xe_vma_userptr_pin_pages(vma);
191+ ret = xe_vma_userptr_pin_pages(uvma);
189192 if (ret)
190193 goto unlock_vm;
191194
@@ -220,7 +223,7 @@ retry_userptr: · 28 unmodified lines
220223 dma_fence_put(fence);
221224
222225 if (xe_vma_is_userptr(vma))
223− ret = xe_vma_userptr_check_repin(vma);
226+ ret = xe_vma_userptr_check_repin(to_userptr_vma(vma));
224227 vma->usm.tile_invalidated &= ~BIT(tile->id);
225228
226229 unlock_dma_resv:
@@ -332,7 +335,7 @@ int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len) · 105 unmodified lines
332335 return -EPROTO;
333336
334337 asid = FIELD_GET(PFD_ASID, msg[1]);
335− pf_queue = &gt->usm.pf_queue[asid % NUM_PF_QUEUE];
338+ pf_queue = gt->usm.pf_queue + (asid % NUM_PF_QUEUE);
336339
337340 spin_lock_irqsave(&pf_queue->lock, flags);
338341 full = pf_queue_full(pf_queue);
drivers/gpu/drm/xe/xe_guc_pc.c+2−0
@@ -963,7 +963,9 @@ void xe_guc_pc_fini(struct xe_guc_pc *pc) · 962 unmodified lines
963963 struct xe_device *xe = pc_to_xe(pc);
964964
965965 if (xe->info.skip_guc_pc) {
966+ xe_device_mem_access_get(xe);
966967 xe_gt_idle_disable_c6(pc_to_gt(pc));
968+ xe_device_mem_access_put(xe);
967969 return;
968970 }
969971
drivers/gpu/drm/xe/xe_hw_fence.c+3−3
@@ -217,13 +217,13 @@ struct xe_hw_fence *xe_hw_fence_create(struct xe_hw_fence_ctx *ctx, · 216 unmodified lines
217217 if (!fence)
218218 return ERR_PTR(-ENOMEM);
219219
220− dma_fence_init(&fence->dma, &xe_hw_fence_ops, &ctx->irq->lock,
221− ctx->dma_fence_ctx, ctx->next_seqno++);
222−
223220 fence->ctx = ctx;
224221 fence->seqno_map = seqno_map;
225222 INIT_LIST_HEAD(&fence->irq_link);
226223
224+ dma_fence_init(&fence->dma, &xe_hw_fence_ops, &ctx->irq->lock,
225+ ctx->dma_fence_ctx, ctx->next_seqno++);
226+
227227 trace_xe_hw_fence_create(fence);
228228
229229 return fence;
drivers/gpu/drm/xe/xe_hwmon.c+1−1
@@ -419,7 +419,7 @@ static int xe_hwmon_pcode_read_i1(struct xe_gt *gt, u32 *uval) · 418 unmodified lines
419419
420420 return xe_pcode_read(gt, PCODE_MBOX(PCODE_POWER_SETUP,
421421 POWER_SETUP_SUBCOMMAND_READ_I1, 0),
422− uval, 0);
422+ uval, NULL);
423423 }
424424
425425 static int xe_hwmon_pcode_write_i1(struct xe_gt *gt, u32 uval)
drivers/gpu/drm/xe/xe_lrc.c+7−7
@@ -21,10 +21,10 @@ · 20 unmodified lines
2121 #include "xe_map.h"
2222 #include "xe_vm.h"
2323
24−#define CTX_VALID (1 << 0)
25−#define CTX_PRIVILEGE (1 << 8)
26−#define CTX_ADDRESSING_MODE_SHIFT 3
27−#define LEGACY_64B_CONTEXT 3
24+#define LRC_VALID (1 << 0)
25+#define LRC_PRIVILEGE (1 << 8)
26+#define LRC_ADDRESSING_MODE_SHIFT 3
27+#define LRC_LEGACY_64B_CONTEXT 3
2828
2929 #define ENGINE_CLASS_SHIFT 61
3030 #define ENGINE_INSTANCE_SHIFT 48
@@ -762,15 +762,15 @@ int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, · 731 unmodified lines
762762 (q->usm.acc_notify << ACC_NOTIFY_S) |
763763 q->usm.acc_trigger);
764764
765− lrc->desc = CTX_VALID;
766− lrc->desc |= LEGACY_64B_CONTEXT << CTX_ADDRESSING_MODE_SHIFT;
765+ lrc->desc = LRC_VALID;
766+ lrc->desc |= LRC_LEGACY_64B_CONTEXT << LRC_ADDRESSING_MODE_SHIFT;
767767 /* TODO: Priority */
768768
769769 /* While this appears to have something about privileged batches or
770770 * some such, it really just means PPGTT mode.
771771 */
772772 if (vm)
773− lrc->desc |= CTX_PRIVILEGE;
773+ lrc->desc |= LRC_PRIVILEGE;
774774
775775 if (GRAPHICS_VERx100(xe) < 1250) {
776776 lrc->desc |= (u64)hwe->instance << ENGINE_INSTANCE_SHIFT;
drivers/gpu/drm/xe/xe_migrate.c+29−13
@@ -170,11 +170,6 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, · 169 unmodified lines
170170 if (!IS_DGFX(xe)) {
171171 /* Write out batch too */
172172 m->batch_base_ofs = NUM_PT_SLOTS * XE_PAGE_SIZE;
173− if (xe->info.has_usm) {
174− batch = tile->primary_gt->usm.bb_pool->bo;
175− m->usm_batch_base_ofs = m->batch_base_ofs;
176− }
177−
178173 for (i = 0; i < batch->size;
179174 i += vm->flags & XE_VM_FLAG_64K ? XE_64K_PAGE_SIZE :
180175 XE_PAGE_SIZE) {
@@ -185,6 +180,24 @@ static int xe_migrate_prepare_vm(struct xe_tile *tile, struct xe_migrate *m, · 4 unmodified lines
185180 entry);
186181 level++;
187182 }
183+ if (xe->info.has_usm) {
184+ xe_tile_assert(tile, batch->size == SZ_1M);
185+
186+ batch = tile->primary_gt->usm.bb_pool->bo;
187+ m->usm_batch_base_ofs = m->batch_base_ofs + SZ_1M;
188+ xe_tile_assert(tile, batch->size == SZ_512K);
189+
190+ for (i = 0; i < batch->size;
191+ i += vm->flags & XE_VM_FLAG_64K ? XE_64K_PAGE_SIZE :
192+ XE_PAGE_SIZE) {
193+ entry = vm->pt_ops->pte_encode_bo(batch, i,
194+ pat_index, 0);
195+
196+ xe_map_wr(xe, &bo->vmap, map_ofs + level * 8, u64,
197+ entry);
198+ level++;
199+ }
200+ }
188201 } else {
189202 u64 batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE);
190203
@@ -472,7 +485,7 @@ static void emit_pte(struct xe_migrate *m, · 281 unmodified lines
472485 /* Indirect access needs compression enabled uncached PAT index */
473486 if (GRAPHICS_VERx100(xe) >= 2000)
474487 pat_index = is_comp_pte ? xe->pat.idx[XE_CACHE_NONE_COMPRESSION] :
475− xe->pat.idx[XE_CACHE_NONE];
488+ xe->pat.idx[XE_CACHE_WB];
476489 else
477490 pat_index = xe->pat.idx[XE_CACHE_WB];
478491
@@ -760,14 +773,14 @@ struct dma_fence *xe_migrate_copy(struct xe_migrate *m, · 281 unmodified lines
760773 if (src_is_vram && xe_migrate_allow_identity(src_L0, &src_it))
761774 xe_res_next(&src_it, src_L0);
762775 else
763− emit_pte(m, bb, src_L0_pt, src_is_vram, true, &src_it, src_L0,
764− src);
776+ emit_pte(m, bb, src_L0_pt, src_is_vram, copy_system_ccs,
777+ &src_it, src_L0, src);
765778
766779 if (dst_is_vram && xe_migrate_allow_identity(src_L0, &dst_it))
767780 xe_res_next(&dst_it, src_L0);
768781 else
769− emit_pte(m, bb, dst_L0_pt, dst_is_vram, true, &dst_it, src_L0,
770− dst);
782+ emit_pte(m, bb, dst_L0_pt, dst_is_vram, copy_system_ccs,
783+ &dst_it, src_L0, dst);
771784
772785 if (copy_system_ccs)
773786 emit_pte(m, bb, ccs_pt, false, false, &ccs_it, ccs_size, src);
@@ -1009,8 +1022,8 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, · 235 unmodified lines
10091022 if (clear_vram && xe_migrate_allow_identity(clear_L0, &src_it))
10101023 xe_res_next(&src_it, clear_L0);
10111024 else
1012− emit_pte(m, bb, clear_L0_pt, clear_vram, true, &src_it, clear_L0,
1013− dst);
1025+ emit_pte(m, bb, clear_L0_pt, clear_vram, clear_system_ccs,
1026+ &src_it, clear_L0, dst);
10141027
10151028 bb->cs[bb->len++] = MI_BATCH_BUFFER_END;
10161029 update_idx = bb->len;
@@ -1204,8 +1217,11 @@ static bool no_in_syncs(struct xe_vm *vm, struct xe_exec_queue *q, · 187 unmodified lines
12041217 }
12051218 if (q) {
12061219 fence = xe_exec_queue_last_fence_get(q, vm);
1207− if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
1220+ if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
1221+ dma_fence_put(fence);
12081222 return false;
1223+ }
1224+ dma_fence_put(fence);
12091225 }
12101226
12111227 return true;
drivers/gpu/drm/xe/xe_mmio.c+2−2
@@ -272,8 +272,8 @@ int xe_mmio_probe_vram(struct xe_device *xe) · 271 unmodified lines
272272 drm_info(&xe->drm, "VRAM[%u, %u]: Actual physical size %pa, usable size exclude stolen %pa, CPU accessible size %pa\n", id,
273273 tile->id, &tile->mem.vram.actual_physical_size, &tile->mem.vram.usable_size, &tile->mem.vram.io_size);
274274 drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", id, tile->id,
275− &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + tile->mem.vram.actual_physical_size,
276− &tile->mem.vram.io_start, tile->mem.vram.io_start + tile->mem.vram.io_size);
275+ &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + (u64)tile->mem.vram.actual_physical_size,
276+ &tile->mem.vram.io_start, tile->mem.vram.io_start + (u64)tile->mem.vram.io_size);
277277
278278 /* calculate total size using tile size to get the correct HW sizing */
279279 total_size += tile_size;
drivers/gpu/drm/xe/xe_pt.c+16−16
@@ -618,8 +618,8 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma, · 617 unmodified lines
618618
619619 if (!xe_vma_is_null(vma)) {
620620 if (xe_vma_is_userptr(vma))
621− xe_res_first_sg(vma->userptr.sg, 0, xe_vma_size(vma),
622− &curs);
621+ xe_res_first_sg(to_userptr_vma(vma)->userptr.sg, 0,
622+ xe_vma_size(vma), &curs);
623623 else if (xe_bo_is_vram(bo) || xe_bo_is_stolen(bo))
624624 xe_res_first(bo->ttm.resource, xe_vma_bo_offset(vma),
625625 xe_vma_size(vma), &curs);
@@ -906,17 +906,17 @@ static void xe_vm_dbg_print_entries(struct xe_device *xe, · 280 unmodified lines
906906
907907 #ifdef CONFIG_DRM_XE_USERPTR_INVAL_INJECT
908908
909−static int xe_pt_userptr_inject_eagain(struct xe_vma *vma)
909+static int xe_pt_userptr_inject_eagain(struct xe_userptr_vma *uvma)
910910 {
911− u32 divisor = vma->userptr.divisor ? vma->userptr.divisor : 2;
911+ u32 divisor = uvma->userptr.divisor ? uvma->userptr.divisor : 2;
912912 static u32 count;
913913
914914 if (count++ % divisor == divisor - 1) {
915− struct xe_vm *vm = xe_vma_vm(vma);
915+ struct xe_vm *vm = xe_vma_vm(&uvma->vma);
916916
917− vma->userptr.divisor = divisor << 1;
917+ uvma->userptr.divisor = divisor << 1;
918918 spin_lock(&vm->userptr.invalidated_lock);
919− list_move_tail(&vma->userptr.invalidate_link,
919+ list_move_tail(&uvma->userptr.invalidate_link,
920920 &vm->userptr.invalidated);
921921 spin_unlock(&vm->userptr.invalidated_lock);
922922 return true;
@@ -927,7 +927,7 @@ static int xe_pt_userptr_inject_eagain(struct xe_vma *vma) · 4 unmodified lines
927927
928928 #else
929929
930−static bool xe_pt_userptr_inject_eagain(struct xe_vma *vma)
930+static bool xe_pt_userptr_inject_eagain(struct xe_userptr_vma *uvma)
931931 {
932932 return false;
933933 }
@@ -1000,9 +1000,9 @@ static int xe_pt_userptr_pre_commit(struct xe_migrate_pt_update *pt_update) · 66 unmodified lines
10001000 {
10011001 struct xe_pt_migrate_pt_update *userptr_update =
10021002 container_of(pt_update, typeof(*userptr_update), base);
1003− struct xe_vma *vma = pt_update->vma;
1004− unsigned long notifier_seq = vma->userptr.notifier_seq;
1005− struct xe_vm *vm = xe_vma_vm(vma);
1003+ struct xe_userptr_vma *uvma = to_userptr_vma(pt_update->vma);
1004+ unsigned long notifier_seq = uvma->userptr.notifier_seq;
1005+ struct xe_vm *vm = xe_vma_vm(&uvma->vma);
10061006 int err = xe_pt_vm_dependencies(pt_update->job,
10071007 &vm->rftree[pt_update->tile_id],
10081008 pt_update->start,
@@ -1023,7 +1023,7 @@ static int xe_pt_userptr_pre_commit(struct xe_migrate_pt_update *pt_update) · 14 unmodified lines
10231023 */
10241024 do {
10251025 down_read(&vm->userptr.notifier_lock);
1026− if (!mmu_interval_read_retry(&vma->userptr.notifier,
1026+ if (!mmu_interval_read_retry(&uvma->userptr.notifier,
10271027 notifier_seq))
10281028 break;
10291029
@@ -1032,11 +1032,11 @@ static int xe_pt_userptr_pre_commit(struct xe_migrate_pt_update *pt_update) · 2 unmodified lines
10321032 if (userptr_update->bind)
10331033 return -EAGAIN;
10341034
1035− notifier_seq = mmu_interval_read_begin(&vma->userptr.notifier);
1035+ notifier_seq = mmu_interval_read_begin(&uvma->userptr.notifier);
10361036 } while (true);
10371037
10381038 /* Inject errors to test_whether they are handled correctly */
1039− if (userptr_update->bind && xe_pt_userptr_inject_eagain(vma)) {
1039+ if (userptr_update->bind && xe_pt_userptr_inject_eagain(uvma)) {
10401040 up_read(&vm->userptr.notifier_lock);
10411041 return -EAGAIN;
10421042 }
@@ -1297,7 +1297,7 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue · 254 unmodified lines
12971297 vma->tile_present |= BIT(tile->id);
12981298
12991299 if (bind_pt_update.locked) {
1300− vma->userptr.initial_bind = true;
1300+ to_userptr_vma(vma)->userptr.initial_bind = true;
13011301 up_read(&vm->userptr.notifier_lock);
13021302 xe_bo_put_commit(&deferred);
13031303 }
@@ -1642,7 +1642,7 @@ __xe_pt_unbind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queu · 338 unmodified lines
16421642
16431643 if (!vma->tile_present) {
16441644 spin_lock(&vm->userptr.invalidated_lock);
1645− list_del_init(&vma->userptr.invalidate_link);
1645+ list_del_init(&to_userptr_vma(vma)->userptr.invalidate_link);
16461646 spin_unlock(&vm->userptr.invalidated_lock);
16471647 }
16481648 up_read(&vm->userptr.notifier_lock);
drivers/gpu/drm/xe/xe_query.c+25−25
@@ -459,21 +459,21 @@ static size_t calc_topo_query_size(struct xe_device *xe) · 458 unmodified lines
459459 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss));
460460 }
461461
462−static void __user *copy_mask(void __user *ptr,
463− struct drm_xe_query_topology_mask *topo,
464− void *mask, size_t mask_size)
462+static int copy_mask(void __user **ptr,
463+ struct drm_xe_query_topology_mask *topo,
464+ void *mask, size_t mask_size)
465465 {
466466 topo->num_bytes = mask_size;
467467
468− if (copy_to_user(ptr, topo, sizeof(*topo)))
469− return ERR_PTR(-EFAULT);
470− ptr += sizeof(topo);
468+ if (copy_to_user(*ptr, topo, sizeof(*topo)))
469+ return -EFAULT;
470+ *ptr += sizeof(topo);
471471
472− if (copy_to_user(ptr, mask, mask_size))
473− return ERR_PTR(-EFAULT);
474− ptr += mask_size;
472+ if (copy_to_user(*ptr, mask, mask_size))
473+ return -EFAULT;
474+ *ptr += mask_size;
475475
476− return ptr;
476+ return 0;
477477 }
478478
479479 static int query_gt_topology(struct xe_device *xe,
@@ -493,28 +493,28 @@ static int query_gt_topology(struct xe_device *xe, · 13 unmodified lines
493493 }
494494
495495 for_each_gt(gt, xe, id) {
496+ int err;
497+
496498 topo.gt_id = id;
497499
498500 topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
499− query_ptr = copy_mask(query_ptr, &topo,
500− gt->fuse_topo.g_dss_mask,
501− sizeof(gt->fuse_topo.g_dss_mask));
502− if (IS_ERR(query_ptr))
503− return PTR_ERR(query_ptr);
501+ err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask,
502+ sizeof(gt->fuse_topo.g_dss_mask));
503+ if (err)
504+ return err;
504505
505506 topo.type = DRM_XE_TOPO_DSS_COMPUTE;
506− query_ptr = copy_mask(query_ptr, &topo,
507− gt->fuse_topo.c_dss_mask,
508− sizeof(gt->fuse_topo.c_dss_mask));
509− if (IS_ERR(query_ptr))
510− return PTR_ERR(query_ptr);
507+ err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask,
508+ sizeof(gt->fuse_topo.c_dss_mask));
509+ if (err)
510+ return err;
511511
512512 topo.type = DRM_XE_TOPO_EU_PER_DSS;
513− query_ptr = copy_mask(query_ptr, &topo,
514− gt->fuse_topo.eu_mask_per_dss,
515− sizeof(gt->fuse_topo.eu_mask_per_dss));
516− if (IS_ERR(query_ptr))
517− return PTR_ERR(query_ptr);
513+ err = copy_mask(&query_ptr, &topo,
514+ gt->fuse_topo.eu_mask_per_dss,
515+ sizeof(gt->fuse_topo.eu_mask_per_dss));
516+ if (err)
517+ return err;
518518 }
519519
520520 return 0;
drivers/gpu/drm/xe/xe_sched_job.c+0−1
@@ -274,7 +274,6 @@ int xe_sched_job_last_fence_add_dep(struct xe_sched_job *job, struct xe_vm *vm) · 273 unmodified lines
274274 struct dma_fence *fence;
275275
276276 fence = xe_exec_queue_last_fence_get(job->q, vm);
277− dma_fence_get(fence);
278277
279278 return drm_sched_job_add_dependency(&job->drm, fence);
280279 }
drivers/gpu/drm/xe/xe_sync.c+0−2
@@ -307,7 +307,6 @@ xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync, · 306 unmodified lines
307307 /* Easy case... */
308308 if (!num_in_fence) {
309309 fence = xe_exec_queue_last_fence_get(q, vm);
310− dma_fence_get(fence);
311310 return fence;
312311 }
313312
@@ -322,7 +321,6 @@ xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync, · 8 unmodified lines
322321 }
323322 }
324323 fences[current_fence++] = xe_exec_queue_last_fence_get(q, vm);
325− dma_fence_get(fences[current_fence - 1]);
326324 cf = dma_fence_array_create(num_in_fence, fences,
327325 vm->composite_fence_ctx,
328326 vm->composite_fence_seqno++,
drivers/gpu/drm/xe/xe_sync.h+5−0
@@ -33,4 +33,9 @@ struct dma_fence * · 32 unmodified lines
3333 xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
3434 struct xe_exec_queue *q, struct xe_vm *vm);
3535
36+static inline bool xe_sync_is_ufence(struct xe_sync_entry *sync)
37+{
38+ return !!sync->ufence;
39+}
40+
3641 #endif
drivers/gpu/drm/xe/xe_vm.c+136−112
@@ -37,8 +37,6 @@ · 36 unmodified lines
3737 #include "generated/xe_wa_oob.h"
3838 #include "xe_wa.h"
3939
40−#define TEST_VM_ASYNC_OPS_ERROR
41−
4240 static struct drm_gem_object *xe_vm_obj(struct xe_vm *vm)
4341 {
4442 return vm->gpuvm.r_obj;
@@ -46,7 +44,7 @@ static struct drm_gem_object *xe_vm_obj(struct xe_vm *vm) · 1 unmodified line
4644
4745 /**
4846 * xe_vma_userptr_check_repin() - Advisory check for repin needed
49− * @vma: The userptr vma
47+ * @uvma: The userptr vma
5048 *
5149 * Check if the userptr vma has been invalidated since last successful
5250 * repin. The check is advisory only and can the function can be called
@@ -56,15 +54,17 @@ static struct drm_gem_object *xe_vm_obj(struct xe_vm *vm) · 3 unmodified lines
5654 *
5755 * Return: 0 if userptr vma is valid, -EAGAIN otherwise; repin recommended.
5856 */
59−int xe_vma_userptr_check_repin(struct xe_vma *vma)
57+int xe_vma_userptr_check_repin(struct xe_userptr_vma *uvma)
6058 {
61− return mmu_interval_check_retry(&vma->userptr.notifier,
62− vma->userptr.notifier_seq) ?
59+ return mmu_interval_check_retry(&uvma->userptr.notifier,
60+ uvma->userptr.notifier_seq) ?
6361 -EAGAIN : 0;
6462 }
6563
66−int xe_vma_userptr_pin_pages(struct xe_vma *vma)
64+int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma)
6765 {
66+ struct xe_userptr *userptr = &uvma->userptr;
67+ struct xe_vma *vma = &uvma->vma;
6868 struct xe_vm *vm = xe_vma_vm(vma);
6969 struct xe_device *xe = vm->xe;
7070 const unsigned long num_pages = xe_vma_size(vma) >> PAGE_SHIFT;
@@ -80,30 +80,30 @@ retry: · 9 unmodified lines
8080 if (vma->gpuva.flags & XE_VMA_DESTROYED)
8181 return 0;
8282
83− notifier_seq = mmu_interval_read_begin(&vma->userptr.notifier);
84− if (notifier_seq == vma->userptr.notifier_seq)
83+ notifier_seq = mmu_interval_read_begin(&userptr->notifier);
84+ if (notifier_seq == userptr->notifier_seq)
8585 return 0;
8686
8787 pages = kvmalloc_array(num_pages, sizeof(*pages), GFP_KERNEL);
8888 if (!pages)
8989 return -ENOMEM;
9090
91− if (vma->userptr.sg) {
91+ if (userptr->sg) {
9292 dma_unmap_sgtable(xe->drm.dev,
93− vma->userptr.sg,
93+ userptr->sg,
9494 read_only ? DMA_TO_DEVICE :
9595 DMA_BIDIRECTIONAL, 0);
96− sg_free_table(vma->userptr.sg);
97− vma->userptr.sg = NULL;
96+ sg_free_table(userptr->sg);
97+ userptr->sg = NULL;
9898 }
9999
100100 pinned = ret = 0;
101101 if (in_kthread) {
102− if (!mmget_not_zero(vma->userptr.notifier.mm)) {
102+ if (!mmget_not_zero(userptr->notifier.mm)) {
103103 ret = -EFAULT;
104104 goto mm_closed;
105105 }
106− kthread_use_mm(vma->userptr.notifier.mm);
106+ kthread_use_mm(userptr->notifier.mm);
107107 }
108108
109109 while (pinned < num_pages) {
@@ -112,43 +112,40 @@ retry: · 2 unmodified lines
112112 num_pages - pinned,
113113 read_only ? 0 : FOLL_WRITE,
114114 &pages[pinned]);
115− if (ret < 0) {
116− if (in_kthread)
117− ret = 0;
115+ if (ret < 0)
118116 break;
119− }
120117
121118 pinned += ret;
122119 ret = 0;
123120 }
124121
125122 if (in_kthread) {
126− kthread_unuse_mm(vma->userptr.notifier.mm);
127− mmput(vma->userptr.notifier.mm);
123+ kthread_unuse_mm(userptr->notifier.mm);
124+ mmput(userptr->notifier.mm);
128125 }
129126 mm_closed:
130127 if (ret)
131128 goto out;
132129
133− ret = sg_alloc_table_from_pages_segment(&vma->userptr.sgt, pages,
130+ ret = sg_alloc_table_from_pages_segment(&userptr->sgt, pages,
134131 pinned, 0,
135132 (u64)pinned << PAGE_SHIFT,
136133 xe_sg_segment_size(xe->drm.dev),
137134 GFP_KERNEL);
138135 if (ret) {
139− vma->userptr.sg = NULL;
136+ userptr->sg = NULL;
140137 goto out;
141138 }
142− vma->userptr.sg = &vma->userptr.sgt;
139+ userptr->sg = &userptr->sgt;
143140
144− ret = dma_map_sgtable(xe->drm.dev, vma->userptr.sg,
141+ ret = dma_map_sgtable(xe->drm.dev, userptr->sg,
145142 read_only ? DMA_TO_DEVICE :
146143 DMA_BIDIRECTIONAL,
147144 DMA_ATTR_SKIP_CPU_SYNC |
148145 DMA_ATTR_NO_KERNEL_MAPPING);
149146 if (ret) {
150− sg_free_table(vma->userptr.sg);
151− vma->userptr.sg = NULL;
147+ sg_free_table(userptr->sg);
148+ userptr->sg = NULL;
152149 goto out;
153150 }
154151
@@ -167,8 +164,8 @@ out: · 12 unmodified lines
167164 kvfree(pages);
168165
169166 if (!(ret < 0)) {
170− vma->userptr.notifier_seq = notifier_seq;
171− if (xe_vma_userptr_check_repin(vma) == -EAGAIN)
167+ userptr->notifier_seq = notifier_seq;
168+ if (xe_vma_userptr_check_repin(uvma) == -EAGAIN)
172169 goto retry;
173170 }
174171
@@ -635,7 +632,9 @@ static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni, · 460 unmodified lines
635632 const struct mmu_notifier_range *range,
636633 unsigned long cur_seq)
637634 {
638− struct xe_vma *vma = container_of(mni, struct xe_vma, userptr.notifier);
635+ struct xe_userptr *userptr = container_of(mni, typeof(*userptr), notifier);
636+ struct xe_userptr_vma *uvma = container_of(userptr, typeof(*uvma), userptr);
637+ struct xe_vma *vma = &uvma->vma;
639638 struct xe_vm *vm = xe_vma_vm(vma);
640639 struct dma_resv_iter cursor;
641640 struct dma_fence *fence;
@@ -651,7 +650,7 @@ static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni, · 9 unmodified lines
651650 mmu_interval_set_seq(mni, cur_seq);
652651
653652 /* No need to stop gpu access if the userptr is not yet bound. */
654− if (!vma->userptr.initial_bind) {
653+ if (!userptr->initial_bind) {
655654 up_write(&vm->userptr.notifier_lock);
656655 return true;
657656 }
@@ -663,7 +662,7 @@ static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni, · 5 unmodified lines
663662 if (!xe_vm_in_fault_mode(vm) &&
664663 !(vma->gpuva.flags & XE_VMA_DESTROYED) && vma->tile_present) {
665664 spin_lock(&vm->userptr.invalidated_lock);
666− list_move_tail(&vma->userptr.invalidate_link,
665+ list_move_tail(&userptr->invalidate_link,
667666 &vm->userptr.invalidated);
668667 spin_unlock(&vm->userptr.invalidated_lock);
669668 }
@@ -703,7 +702,7 @@ static const struct mmu_interval_notifier_ops vma_userptr_notifier_ops = { · 33 unmodified lines
703702
704703 int xe_vm_userptr_pin(struct xe_vm *vm)
705704 {
706− struct xe_vma *vma, *next;
705+ struct xe_userptr_vma *uvma, *next;
707706 int err = 0;
708707 LIST_HEAD(tmp_evict);
709708
@@ -711,22 +710,23 @@ int xe_vm_userptr_pin(struct xe_vm *vm) · 1 unmodified line
711710
712711 /* Collect invalidated userptrs */
713712 spin_lock(&vm->userptr.invalidated_lock);
714− list_for_each_entry_safe(vma, next, &vm->userptr.invalidated,
713+ list_for_each_entry_safe(uvma, next, &vm->userptr.invalidated,
715714 userptr.invalidate_link) {
716− list_del_init(&vma->userptr.invalidate_link);
717− list_move_tail(&vma->combined_links.userptr,
715+ list_del_init(&uvma->userptr.invalidate_link);
716+ list_move_tail(&uvma->userptr.repin_link,
718717 &vm->userptr.repin_list);
719718 }
720719 spin_unlock(&vm->userptr.invalidated_lock);
721720
722721 /* Pin and move to temporary list */
723− list_for_each_entry_safe(vma, next, &vm->userptr.repin_list,
724− combined_links.userptr) {
725− err = xe_vma_userptr_pin_pages(vma);
722+ list_for_each_entry_safe(uvma, next, &vm->userptr.repin_list,
723+ userptr.repin_link) {
724+ err = xe_vma_userptr_pin_pages(uvma);
726725 if (err < 0)
727726 return err;
728727
729− list_move_tail(&vma->combined_links.userptr, &vm->rebind_list);
728+ list_del_init(&uvma->userptr.repin_link);
729+ list_move_tail(&uvma->vma.combined_links.rebind, &vm->rebind_list);
730730 }
731731
732732 return 0;
@@ -782,6 +782,14 @@ struct dma_fence *xe_vm_rebind(struct xe_vm *vm, bool rebind_worker) · 49 unmodified lines
782782 return fence;
783783 }
784784
785+static void xe_vma_free(struct xe_vma *vma)
786+{
787+ if (xe_vma_is_userptr(vma))
788+ kfree(to_userptr_vma(vma));
789+ else
790+ kfree(vma);
791+}
792+
785793 #define VMA_CREATE_FLAG_READ_ONLY BIT(0)
786794 #define VMA_CREATE_FLAG_IS_NULL BIT(1)
787795
@@ -800,14 +808,26 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm, · 12 unmodified lines
800808 xe_assert(vm->xe, start < end);
801809 xe_assert(vm->xe, end < vm->size);
802810
803− if (!bo && !is_null) /* userptr */
811+ /*
812+ * Allocate and ensure that the xe_vma_is_userptr() return
813+ * matches what was allocated.
814+ */
815+ if (!bo && !is_null) {
816+ struct xe_userptr_vma *uvma = kzalloc(sizeof(*uvma), GFP_KERNEL);
817+
818+ if (!uvma)
819+ return ERR_PTR(-ENOMEM);
820+
821+ vma = &uvma->vma;
822+ } else {
804823 vma = kzalloc(sizeof(*vma), GFP_KERNEL);
805− else
806− vma = kzalloc(sizeof(*vma) - sizeof(struct xe_userptr),
807− GFP_KERNEL);
808− if (!vma) {
809− vma = ERR_PTR(-ENOMEM);
810− return vma;
824+ if (!vma)
825+ return ERR_PTR(-ENOMEM);
826+
827+ if (is_null)
828+ vma->gpuva.flags |= DRM_GPUVA_SPARSE;
829+ if (bo)
830+ vma->gpuva.gem.obj = &bo->ttm.base;
811831 }
812832
813833 INIT_LIST_HEAD(&vma->combined_links.rebind);
@@ -818,8 +838,6 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm, · 4 unmodified lines
818838 vma->gpuva.va.range = end - start + 1;
819839 if (read_only)
820840 vma->gpuva.flags |= XE_VMA_READ_ONLY;
821− if (is_null)
822− vma->gpuva.flags |= DRM_GPUVA_SPARSE;
823841
824842 for_each_tile(tile, vm->xe, id)
825843 vma->tile_mask |= 0x1 << id;
@@ -836,35 +854,35 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm, · 10 unmodified lines
836854
837855 vm_bo = drm_gpuvm_bo_obtain(vma->gpuva.vm, &bo->ttm.base);
838856 if (IS_ERR(vm_bo)) {
839− kfree(vma);
857+ xe_vma_free(vma);
840858 return ERR_CAST(vm_bo);
841859 }
842860
843861 drm_gpuvm_bo_extobj_add(vm_bo);
844862 drm_gem_object_get(&bo->ttm.base);
845− vma->gpuva.gem.obj = &bo->ttm.base;
846863 vma->gpuva.gem.offset = bo_offset_or_userptr;
847864 drm_gpuva_link(&vma->gpuva, vm_bo);
848865 drm_gpuvm_bo_put(vm_bo);
849866 } else /* userptr or null */ {
850867 if (!is_null) {
868+ struct xe_userptr *userptr = &to_userptr_vma(vma)->userptr;
851869 u64 size = end - start + 1;
852870 int err;
853871
854− INIT_LIST_HEAD(&vma->userptr.invalidate_link);
872+ INIT_LIST_HEAD(&userptr->invalidate_link);
873+ INIT_LIST_HEAD(&userptr->repin_link);
855874 vma->gpuva.gem.offset = bo_offset_or_userptr;
856875
857− err = mmu_interval_notifier_insert(&vma->userptr.notifier,
876+ err = mmu_interval_notifier_insert(&userptr->notifier,
858877 current->mm,
859878 xe_vma_userptr(vma), size,
860879 &vma_userptr_notifier_ops);
861880 if (err) {
862− kfree(vma);
863− vma = ERR_PTR(err);
864− return vma;
881+ xe_vma_free(vma);
882+ return ERR_PTR(err);
865883 }
866884
867− vma->userptr.notifier_seq = LONG_MAX;
885+ userptr->notifier_seq = LONG_MAX;
868886 }
869887
870888 xe_vm_get(vm);
@@ -880,13 +898,15 @@ static void xe_vma_destroy_late(struct xe_vma *vma) · 9 unmodified lines
880898 bool read_only = xe_vma_read_only(vma);
881899
882900 if (xe_vma_is_userptr(vma)) {
883− if (vma->userptr.sg) {
901+ struct xe_userptr *userptr = &to_userptr_vma(vma)->userptr;
902+
903+ if (userptr->sg) {
884904 dma_unmap_sgtable(xe->drm.dev,
885− vma->userptr.sg,
905+ userptr->sg,
886906 read_only ? DMA_TO_DEVICE :
887907 DMA_BIDIRECTIONAL, 0);
888− sg_free_table(vma->userptr.sg);
889− vma->userptr.sg = NULL;
908+ sg_free_table(userptr->sg);
909+ userptr->sg = NULL;
890910 }
891911
892912 /*
@@ -894,7 +914,7 @@ static void xe_vma_destroy_late(struct xe_vma *vma) · 1 unmodified line
894914 * the notifer until we're sure the GPU is not accessing
895915 * them anymore
896916 */
897− mmu_interval_notifier_remove(&vma->userptr.notifier);
917+ mmu_interval_notifier_remove(&userptr->notifier);
898918 xe_vm_put(vm);
899919 } else if (xe_vma_is_null(vma)) {
900920 xe_vm_put(vm);
@@ -902,7 +922,7 @@ static void xe_vma_destroy_late(struct xe_vma *vma) · 1 unmodified line
902922 xe_bo_put(xe_vma_bo(vma));
903923 }
904924
905− kfree(vma);
925+ xe_vma_free(vma);
906926 }
907927
908928 static void vma_destroy_work_func(struct work_struct *w)
@@ -933,7 +953,7 @@ static void xe_vma_destroy(struct xe_vma *vma, struct dma_fence *fence) · 24 unmodified lines
933953 xe_assert(vm->xe, vma->gpuva.flags & XE_VMA_DESTROYED);
934954
935955 spin_lock(&vm->userptr.invalidated_lock);
936− list_del(&vma->userptr.invalidate_link);
956+ list_del(&to_userptr_vma(vma)->userptr.invalidate_link);
937957 spin_unlock(&vm->userptr.invalidated_lock);
938958 } else if (!xe_vma_is_null(vma)) {
939959 xe_bo_assert_held(xe_vma_bo(vma));
@@ -1855,10 +1875,8 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data, · 915 unmodified lines
18551875 mutex_lock(&xef->vm.lock);
18561876 err = xa_alloc(&xef->vm.xa, &id, vm, xa_limit_32b, GFP_KERNEL);
18571877 mutex_unlock(&xef->vm.lock);
1858− if (err) {
1859− xe_vm_close_and_put(vm);
1860− return err;
1861− }
1878+ if (err)
1879+ goto err_close_and_put;
18621880
18631881 if (xe->info.has_asid) {
18641882 mutex_lock(&xe->usm.lock);
@@ -1866,11 +1884,9 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data, · 1 unmodified line
18661884 XA_LIMIT(1, XE_MAX_ASID - 1),
18671885 &xe->usm.next_asid, GFP_KERNEL);
18681886 mutex_unlock(&xe->usm.lock);
1869− if (err < 0) {
1870− xe_vm_close_and_put(vm);
1871− return err;
1872− }
1873− err = 0;
1887+ if (err < 0)
1888+ goto err_free_id;
1889+
18741890 vm->usm.asid = asid;
18751891 }
18761892
@@ -1888,6 +1904,15 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data, · 11 unmodified lines
18881904 #endif
18891905
18901906 return 0;
1907+
1908+err_free_id:
1909+ mutex_lock(&xef->vm.lock);
1910+ xa_erase(&xef->vm.xa, id);
1911+ mutex_unlock(&xef->vm.lock);
1912+err_close_and_put:
1913+ xe_vm_close_and_put(vm);
1914+
1915+ return err;
18911916 }
18921917
18931918 int xe_vm_destroy_ioctl(struct drm_device *dev, void *data,
@@ -1954,6 +1979,7 @@ static int xe_vm_prefetch(struct xe_vm *vm, struct xe_vma *vma, · 60 unmodified lines
19541979 xe_exec_queue_last_fence_get(wait_exec_queue, vm);
19551980
19561981 xe_sync_entry_signal(&syncs[i], NULL, fence);
1982+ dma_fence_put(fence);
19571983 }
19581984 }
19591985
@@ -2034,7 +2060,6 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo, · 74 unmodified lines
20342060 struct drm_gem_object *obj = bo ? &bo->ttm.base : NULL;
20352061 struct drm_gpuva_ops *ops;
20362062 struct drm_gpuva_op *__op;
2037− struct xe_vma_op *op;
20382063 struct drm_gpuvm_bo *vm_bo;
20392064 int err;
20402065
@@ -2081,15 +2106,6 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo, · 40 unmodified lines
20812106 if (IS_ERR(ops))
20822107 return ops;
20832108
2084−#ifdef TEST_VM_ASYNC_OPS_ERROR
2085− if (operation & FORCE_ASYNC_OP_ERROR) {
2086− op = list_first_entry_or_null(&ops->list, struct xe_vma_op,
2087− base.entry);
2088− if (op)
2089− op->inject_error = true;
2090− }
2091−#endif
2092−
20932109 drm_gpuva_for_each_op(__op, ops) {
20942110 struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
20952111
@@ -2145,7 +2161,7 @@ static struct xe_vma *new_vma(struct xe_vm *vm, struct drm_gpuva_op_map *op, · 49 unmodified lines
21452161 drm_exec_fini(&exec);
21462162
21472163 if (xe_vma_is_userptr(vma)) {
2148− err = xe_vma_userptr_pin_pages(vma);
2164+ err = xe_vma_userptr_pin_pages(to_userptr_vma(vma));
21492165 if (err) {
21502166 prep_vma_destroy(vm, vma, false);
21512167 xe_vma_destroy_unlocked(vma);
@@ -2169,8 +2185,10 @@ static u64 xe_vma_max_pte_size(struct xe_vma *vma) · 17 unmodified lines
21692185 return SZ_1G;
21702186 else if (vma->gpuva.flags & XE_VMA_PTE_2M)
21712187 return SZ_2M;
2188+ else if (vma->gpuva.flags & XE_VMA_PTE_4K)
2189+ return SZ_4K;
21722190
2173− return SZ_4K;
2191+ return SZ_1G; /* Uninitialized, used max size */
21742192 }
21752193
21762194 static u64 xe_vma_set_pte_size(struct xe_vma *vma, u64 size)
@@ -2500,13 +2518,25 @@ retry_userptr: · 323 unmodified lines
25002518 }
25012519 drm_exec_fini(&exec);
25022520
2503− if (err == -EAGAIN && xe_vma_is_userptr(vma)) {
2521+ if (err == -EAGAIN) {
25042522 lockdep_assert_held_write(&vm->lock);
2505− err = xe_vma_userptr_pin_pages(vma);
2506− if (!err)
2507− goto retry_userptr;
25082523
2509− trace_xe_vma_fail(vma);
2524+ if (op->base.op == DRM_GPUVA_OP_REMAP) {
2525+ if (!op->remap.unmap_done)
2526+ vma = gpuva_to_vma(op->base.remap.unmap->va);
2527+ else if (op->remap.prev)
2528+ vma = op->remap.prev;
2529+ else
2530+ vma = op->remap.next;
2531+ }
2532+
2533+ if (xe_vma_is_userptr(vma)) {
2534+ err = xe_vma_userptr_pin_pages(to_userptr_vma(vma));
2535+ if (!err)
2536+ goto retry_userptr;
2537+
2538+ trace_xe_vma_fail(vma);
2539+ }
25102540 }
25112541
25122542 return err;
@@ -2518,13 +2548,6 @@ static int xe_vma_op_execute(struct xe_vm *vm, struct xe_vma_op *op) · 5 unmodified lines
25182548
25192549 lockdep_assert_held_write(&vm->lock);
25202550
2521−#ifdef TEST_VM_ASYNC_OPS_ERROR
2522− if (op->inject_error) {
2523− op->inject_error = false;
2524− return -ENOMEM;
2525− }
2526−#endif
2527−
25282551 switch (op->base.op) {
25292552 case DRM_GPUVA_OP_MAP:
25302553 ret = __xe_vma_op_execute(vm, op->map.vma, op);
@@ -2639,7 +2662,7 @@ static void vm_bind_ioctl_ops_unwind(struct xe_vm *vm, · 108 unmodified lines
26392662 {
26402663 int i;
26412664
2642− for (i = num_ops_list - 1; i; ++i) {
2665+ for (i = num_ops_list - 1; i >= 0; --i) {
26432666 struct drm_gpuva_ops *__ops = ops[i];
26442667 struct drm_gpuva_op *__op;
26452668
@@ -2684,16 +2707,9 @@ static int vm_bind_ioctl_ops_execute(struct xe_vm *vm, · 38 unmodified lines
26842707 return 0;
26852708 }
26862709
2687−#ifdef TEST_VM_ASYNC_OPS_ERROR
2688−#define SUPPORTED_FLAGS \
2689− (FORCE_ASYNC_OP_ERROR | DRM_XE_VM_BIND_FLAG_READONLY | \
2690− DRM_XE_VM_BIND_FLAG_IMMEDIATE | DRM_XE_VM_BIND_FLAG_NULL | 0xffff)
2691−#else
26922710 #define SUPPORTED_FLAGS \
26932711 (DRM_XE_VM_BIND_FLAG_READONLY | \
2694− DRM_XE_VM_BIND_FLAG_IMMEDIATE | DRM_XE_VM_BIND_FLAG_NULL | \
2695− 0xffff)
2696−#endif
2712+ DRM_XE_VM_BIND_FLAG_IMMEDIATE | DRM_XE_VM_BIND_FLAG_NULL)
26972713 #define XE_64K_PAGE_MASK 0xffffull
26982714 #define ALL_DRM_XE_SYNCS_FLAGS (DRM_XE_SYNCS_FLAG_WAIT_FOR_OP)
26992715
@@ -2846,7 +2862,7 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file) · 146 unmodified lines
28462862 struct drm_gpuva_ops **ops = NULL;
28472863 struct xe_vm *vm;
28482864 struct xe_exec_queue *q = NULL;
2849− u32 num_syncs;
2865+ u32 num_syncs, num_ufence = 0;
28502866 struct xe_sync_entry *syncs = NULL;
28512867 struct drm_xe_vm_bind_op *bind_ops;
28522868 LIST_HEAD(ops_list);
@@ -2983,6 +2999,14 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file) · 130 unmodified lines
29832999 SYNC_PARSE_FLAG_DISALLOW_USER_FENCE : 0));
29843000 if (err)
29853001 goto free_syncs;
3002+
3003+ if (xe_sync_is_ufence(&syncs[num_syncs]))
3004+ num_ufence++;
3005+ }
3006+
3007+ if (XE_IOCTL_DBG(xe, num_ufence > 1)) {
3008+ err = -EINVAL;
3009+ goto free_syncs;
29863010 }
29873011
29883012 if (!args->num_binds) {
@@ -3125,8 +3149,8 @@ int xe_vm_invalidate_vma(struct xe_vma *vma) · 136 unmodified lines
31253149 if (IS_ENABLED(CONFIG_PROVE_LOCKING)) {
31263150 if (xe_vma_is_userptr(vma)) {
31273151 WARN_ON_ONCE(!mmu_interval_check_retry
3128− (&vma->userptr.notifier,
3129− vma->userptr.notifier_seq));
3152+ (&to_userptr_vma(vma)->userptr.notifier,
3153+ to_userptr_vma(vma)->userptr.notifier_seq));
31303154 WARN_ON_ONCE(!dma_resv_test_signaled(xe_vm_resv(xe_vma_vm(vma)),
31313155 DMA_RESV_USAGE_BOOKKEEP));
31323156
@@ -3187,11 +3211,11 @@ int xe_analyze_vm(struct drm_printer *p, struct xe_vm *vm, int gt_id) · 54 unmodified lines
31873211 if (is_null) {
31883212 addr = 0;
31893213 } else if (is_userptr) {
3214+ struct sg_table *sg = to_userptr_vma(vma)->userptr.sg;
31903215 struct xe_res_cursor cur;
31913216
3192− if (vma->userptr.sg) {
3193− xe_res_first_sg(vma->userptr.sg, 0, XE_PAGE_SIZE,
3194− &cur);
3217+ if (sg) {
3218+ xe_res_first_sg(sg, 0, XE_PAGE_SIZE, &cur);
31953219 addr = xe_res_dma(&cur);
31963220 } else {
31973221 addr = 0;
drivers/gpu/drm/xe/xe_vm.h+14−2
@@ -160,6 +160,18 @@ static inline bool xe_vma_is_userptr(struct xe_vma *vma) · 159 unmodified lines
160160 return xe_vma_has_no_bo(vma) && !xe_vma_is_null(vma);
161161 }
162162
163+/**
164+ * to_userptr_vma() - Return a pointer to an embedding userptr vma
165+ * @vma: Pointer to the embedded struct xe_vma
166+ *
167+ * Return: Pointer to the embedding userptr vma
168+ */
169+static inline struct xe_userptr_vma *to_userptr_vma(struct xe_vma *vma)
170+{
171+ xe_assert(xe_vma_vm(vma)->xe, xe_vma_is_userptr(vma));
172+ return container_of(vma, struct xe_userptr_vma, vma);
173+}
174+
163175 u64 xe_vm_pdp4_descriptor(struct xe_vm *vm, struct xe_tile *tile);
164176
165177 int xe_vm_create_ioctl(struct drm_device *dev, void *data,
@@ -224,9 +236,9 @@ static inline void xe_vm_reactivate_rebind(struct xe_vm *vm) · 58 unmodified lines
224236 }
225237 }
226238
227−int xe_vma_userptr_pin_pages(struct xe_vma *vma);
239+int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma);
228240
229−int xe_vma_userptr_check_repin(struct xe_vma *vma);
241+int xe_vma_userptr_check_repin(struct xe_userptr_vma *uvma);
230242
231243 bool xe_vm_validate_should_retry(struct drm_exec *exec, int err, ktime_t *end);
232244
drivers/gpu/drm/xe/xe_vm_types.h+10−14
@@ -21,9 +21,6 @@ struct xe_bo; · 20 unmodified lines
2121 struct xe_sync_entry;
2222 struct xe_vm;
2323
24−#define TEST_VM_ASYNC_OPS_ERROR
25−#define FORCE_ASYNC_OP_ERROR BIT(31)
26−
2724 #define XE_VMA_READ_ONLY DRM_GPUVA_USERBITS
2825 #define XE_VMA_DESTROYED (DRM_GPUVA_USERBITS << 1)
2926 #define XE_VMA_ATOMIC_PTE_BIT (DRM_GPUVA_USERBITS << 2)
@@ -37,6 +34,8 @@ struct xe_vm; · 7 unmodified lines
3734 struct xe_userptr {
3835 /** @invalidate_link: Link for the vm::userptr.invalidated list */
3936 struct list_head invalidate_link;
37+ /** @userptr: link into VM repin list if userptr. */
38+ struct list_head repin_link;
4039 /**
4140 * @notifier: MMU notifier for user pointer (invalidation call back)
4241 */
@@ -68,8 +67,6 @@ struct xe_vma { · 25 unmodified lines
6867 * resv.
6968 */
7069 union {
71− /** @userptr: link into VM repin list if userptr. */
72− struct list_head userptr;
7370 /** @rebind: link into VM if this VMA needs rebinding. */
7471 struct list_head rebind;
7572 /** @destroy: link to contested list when VM is being closed. */
@@ -105,11 +102,15 @@ struct xe_vma { · 29 unmodified lines
105102 * @pat_index: The pat index to use when encoding the PTEs for this vma.
106103 */
107104 u16 pat_index;
105+};
108106
109− /**
110− * @userptr: user pointer state, only allocated for VMAs that are
111− * user pointers
112− */
107+/**
108+ * struct xe_userptr_vma - A userptr vma subclass
109+ * @vma: The vma.
110+ * @userptr: Additional userptr information.
111+ */
112+struct xe_userptr_vma {
113+ struct xe_vma vma;
113114 struct xe_userptr userptr;
114115 };
115116
@@ -356,11 +357,6 @@ struct xe_vma_op { · 240 unmodified lines
356357 /** @flags: operation flags */
357358 enum xe_vma_op_flags flags;
358359
359−#ifdef TEST_VM_ASYNC_OPS_ERROR
360− /** @inject_error: inject error to test async op error handling */
361− bool inject_error;
362−#endif
363−
364360 union {
365361 /** @map: VMA map operation specific data */
366362 struct xe_vma_op_map map;
drivers/hid/bpf/hid_bpf_dispatch.c+74−27
@@ -143,6 +143,9 @@ u8 *call_hid_bpf_rdesc_fixup(struct hid_device *hdev, u8 *rdesc, unsigned int *s · 142 unmodified lines
143143 }
144144 EXPORT_SYMBOL_GPL(call_hid_bpf_rdesc_fixup);
145145
146+/* Disables missing prototype warnings */
147+__bpf_kfunc_start_defs();
148+
146149 /**
147150 * hid_bpf_get_data - Get the kernel memory pointer associated with the context @ctx
148151 *
@@ -152,7 +155,7 @@ EXPORT_SYMBOL_GPL(call_hid_bpf_rdesc_fixup); · 3 unmodified lines
152155 *
153156 * @returns %NULL on error, an %__u8 memory pointer on success
154157 */
155−noinline __u8 *
158+__bpf_kfunc __u8 *
156159 hid_bpf_get_data(struct hid_bpf_ctx *ctx, unsigned int offset, const size_t rdwr_buf_size)
157160 {
158161 struct hid_bpf_ctx_kern *ctx_kern;
@@ -167,6 +170,7 @@ hid_bpf_get_data(struct hid_bpf_ctx *ctx, unsigned int offset, const size_t rdwr · 8 unmodified lines
167170
168171 return ctx_kern->data + offset;
169172 }
173+__bpf_kfunc_end_defs();
170174
171175 /*
172176 * The following set contains all functions we agree BPF programs
@@ -241,6 +245,42 @@ int hid_bpf_reconnect(struct hid_device *hdev) · 68 unmodified lines
241245 return 0;
242246 }
243247
248+static int do_hid_bpf_attach_prog(struct hid_device *hdev, int prog_fd, struct bpf_prog *prog,
249+ __u32 flags)
250+{
251+ int fd, err, prog_type;
252+
253+ prog_type = hid_bpf_get_prog_attach_type(prog);
254+ if (prog_type < 0)
255+ return prog_type;
256+
257+ if (prog_type >= HID_BPF_PROG_TYPE_MAX)
258+ return -EINVAL;
259+
260+ if (prog_type == HID_BPF_PROG_TYPE_DEVICE_EVENT) {
261+ err = hid_bpf_allocate_event_data(hdev);
262+ if (err)
263+ return err;
264+ }
265+
266+ fd = __hid_bpf_attach_prog(hdev, prog_type, prog_fd, prog, flags);
267+ if (fd < 0)
268+ return fd;
269+
270+ if (prog_type == HID_BPF_PROG_TYPE_RDESC_FIXUP) {
271+ err = hid_bpf_reconnect(hdev);
272+ if (err) {
273+ close_fd(fd);
274+ return err;
275+ }
276+ }
277+
278+ return fd;
279+}
280+
281+/* Disables missing prototype warnings */
282+__bpf_kfunc_start_defs();
283+
244284 /**
245285 * hid_bpf_attach_prog - Attach the given @prog_fd to the given HID device
246286 *
@@ -253,22 +293,17 @@ int hid_bpf_reconnect(struct hid_device *hdev) · 6 unmodified lines
253293 * is pinned to the BPF file system).
254294 */
255295 /* called from syscall */
256−noinline int
296+__bpf_kfunc int
257297 hid_bpf_attach_prog(unsigned int hid_id, int prog_fd, __u32 flags)
258298 {
259299 struct hid_device *hdev;
300+ struct bpf_prog *prog;
260301 struct device *dev;
261− int fd, err, prog_type = hid_bpf_get_prog_attach_type(prog_fd);
302+ int err, fd;
262303
263304 if (!hid_bpf_ops)
264305 return -EINVAL;
265306
266− if (prog_type < 0)
267− return prog_type;
268−
269− if (prog_type >= HID_BPF_PROG_TYPE_MAX)
270− return -EINVAL;
271−
272307 if ((flags & ~HID_BPF_FLAG_MASK))
273308 return -EINVAL;
274309
@@ -278,25 +313,29 @@ hid_bpf_attach_prog(unsigned int hid_id, int prog_fd, __u32 flags) · 3 unmodified lines
278313
279314 hdev = to_hid_device(dev);
280315
281− if (prog_type == HID_BPF_PROG_TYPE_DEVICE_EVENT) {
282− err = hid_bpf_allocate_event_data(hdev);
283− if (err)
284− return err;
316+ /*
317+ * take a ref on the prog itself, it will be released
318+ * on errors or when it'll be detached
319+ */
320+ prog = bpf_prog_get(prog_fd);
321+ if (IS_ERR(prog)) {
322+ err = PTR_ERR(prog);
323+ goto out_dev_put;
285324 }
286325
287− fd = __hid_bpf_attach_prog(hdev, prog_type, prog_fd, flags);
288− if (fd < 0)
289− return fd;
290−
291− if (prog_type == HID_BPF_PROG_TYPE_RDESC_FIXUP) {
292− err = hid_bpf_reconnect(hdev);
293− if (err) {
294− close_fd(fd);
295− return err;
296− }
326+ fd = do_hid_bpf_attach_prog(hdev, prog_fd, prog, flags);
327+ if (fd < 0) {
328+ err = fd;
329+ goto out_prog_put;
297330 }
298331
299332 return fd;
333+
334+ out_prog_put:
335+ bpf_prog_put(prog);
336+ out_dev_put:
337+ put_device(dev);
338+ return err;
300339 }
301340
302341 /**
@@ -306,7 +345,7 @@ hid_bpf_attach_prog(unsigned int hid_id, int prog_fd, __u32 flags) · 3 unmodified lines
306345 *
307346 * @returns A pointer to &struct hid_bpf_ctx on success, %NULL on error.
308347 */
309−noinline struct hid_bpf_ctx *
348+__bpf_kfunc struct hid_bpf_ctx *
310349 hid_bpf_allocate_context(unsigned int hid_id)
311350 {
312351 struct hid_device *hdev;
@@ -323,8 +362,10 @@ hid_bpf_allocate_context(unsigned int hid_id) · 10 unmodified lines
323362 hdev = to_hid_device(dev);
324363
325364 ctx_kern = kzalloc(sizeof(*ctx_kern), GFP_KERNEL);
326− if (!ctx_kern)
365+ if (!ctx_kern) {
366+ put_device(dev);
327367 return NULL;
368+ }
328369
329370 ctx_kern->ctx.hid = hdev;
330371
@@ -337,14 +378,19 @@ hid_bpf_allocate_context(unsigned int hid_id) · 6 unmodified lines
337378 * @ctx: the HID-BPF context to release
338379 *
339380 */
340−noinline void
381+__bpf_kfunc void
341382 hid_bpf_release_context(struct hid_bpf_ctx *ctx)
342383 {
343384 struct hid_bpf_ctx_kern *ctx_kern;
385+ struct hid_device *hid;
344386
345387 ctx_kern = container_of(ctx, struct hid_bpf_ctx_kern, ctx);
388+ hid = (struct hid_device *)ctx_kern->ctx.hid; /* ignore const */
346389
347390 kfree(ctx_kern);
391+
392+ /* get_device() is called by bus_find_device() */
393+ put_device(&hid->dev);
348394 }
349395
350396 /**
@@ -358,7 +404,7 @@ hid_bpf_release_context(struct hid_bpf_ctx *ctx) · 7 unmodified lines
358404 *
359405 * @returns %0 on success, a negative error code otherwise.
360406 */
361−noinline int
407+__bpf_kfunc int
362408 hid_bpf_hw_request(struct hid_bpf_ctx *ctx, __u8 *buf, size_t buf__sz,
363409 enum hid_report_type rtype, enum hid_class_request reqtype)
364410 {
@@ -426,6 +472,7 @@ hid_bpf_hw_request(struct hid_bpf_ctx *ctx, __u8 *buf, size_t buf__sz, · 61 unmodified lines
426472 kfree(dma_data);
427473 return ret;
428474 }
475+__bpf_kfunc_end_defs();
429476
430477 /* our HID-BPF entrypoints */
431478 BTF_SET8_START(hid_bpf_fmodret_ids)
drivers/hid/bpf/hid_bpf_dispatch.h+2−2
@@ -12,9 +12,9 @@ struct hid_bpf_ctx_kern { · 11 unmodified lines
1212
1313 int hid_bpf_preload_skel(void);
1414 void hid_bpf_free_links_and_skel(void);
15−int hid_bpf_get_prog_attach_type(int prog_fd);
15+int hid_bpf_get_prog_attach_type(struct bpf_prog *prog);
1616 int __hid_bpf_attach_prog(struct hid_device *hdev, enum hid_bpf_prog_type prog_type, int prog_fd,
17− __u32 flags);
17+ struct bpf_prog *prog, __u32 flags);
1818 void __hid_bpf_destroy_device(struct hid_device *hdev);
1919 int hid_bpf_prog_run(struct hid_device *hdev, enum hid_bpf_prog_type type,
2020 struct hid_bpf_ctx_kern *ctx_kern);
drivers/hid/bpf/hid_bpf_jmp_table.c+20−20
@@ -196,6 +196,7 @@ static void __hid_bpf_do_release_prog(int map_fd, unsigned int idx) · 195 unmodified lines
196196 static void hid_bpf_release_progs(struct work_struct *work)
197197 {
198198 int i, j, n, map_fd = -1;
199+ bool hdev_destroyed;
199200
200201 if (!jmp_table.map)
201202 return;
@@ -220,6 +221,12 @@ static void hid_bpf_release_progs(struct work_struct *work) · 18 unmodified lines
220221 if (entry->hdev) {
221222 hdev = entry->hdev;
222223 type = entry->type;
224+ /*
225+ * hdev is still valid, even if we are called after hid_destroy_device():
226+ * when hid_bpf_attach() gets called, it takes a ref on the dev through
227+ * bus_find_device()
228+ */
229+ hdev_destroyed = hdev->bpf.destroyed;
223230
224231 hid_bpf_populate_hdev(hdev, type);
225232
@@ -232,12 +239,19 @@ static void hid_bpf_release_progs(struct work_struct *work) · 6 unmodified lines
232239 if (test_bit(next->idx, jmp_table.enabled))
233240 continue;
234241
235− if (next->hdev == hdev && next->type == type)
242+ if (next->hdev == hdev && next->type == type) {
243+ /*
244+ * clear the hdev reference and decrement the device ref
245+ * that was taken during bus_find_device() while calling
246+ * hid_bpf_attach()
247+ */
236248 next->hdev = NULL;
249+ put_device(&hdev->dev);
250+ }
237251 }
238252
239− /* if type was rdesc fixup, reconnect device */
240− if (type == HID_BPF_PROG_TYPE_RDESC_FIXUP)
253+ /* if type was rdesc fixup and the device is not gone, reconnect device */
254+ if (type == HID_BPF_PROG_TYPE_RDESC_FIXUP && !hdev_destroyed)
241255 hid_bpf_reconnect(hdev);
242256 }
243257 }
@@ -333,15 +347,10 @@ static int hid_bpf_insert_prog(int prog_fd, struct bpf_prog *prog) · 89 unmodified lines
333347 return err;
334348 }
335349
336−int hid_bpf_get_prog_attach_type(int prog_fd)
350+int hid_bpf_get_prog_attach_type(struct bpf_prog *prog)
337351 {
338− struct bpf_prog *prog = NULL;
339− int i;
340352 int prog_type = HID_BPF_PROG_TYPE_UNDEF;
341−
342− prog = bpf_prog_get(prog_fd);
343− if (IS_ERR(prog))
344− return PTR_ERR(prog);
353+ int i;
345354
346355 for (i = 0; i < HID_BPF_PROG_TYPE_MAX; i++) {
347356 if (hid_bpf_btf_ids[i] == prog->aux->attach_btf_id) {
@@ -350,8 +359,6 @@ int hid_bpf_get_prog_attach_type(int prog_fd) · 2 unmodified lines
350359 }
351360 }
352361
353− bpf_prog_put(prog);
354−
355362 return prog_type;
356363 }
357364
@@ -388,19 +395,13 @@ static const struct bpf_link_ops hid_bpf_link_lops = { · 30 unmodified lines
388395 /* called from syscall */
389396 noinline int
390397 __hid_bpf_attach_prog(struct hid_device *hdev, enum hid_bpf_prog_type prog_type,
391− int prog_fd, __u32 flags)
398+ int prog_fd, struct bpf_prog *prog, __u32 flags)
392399 {
393400 struct bpf_link_primer link_primer;
394401 struct hid_bpf_link *link;
395− struct bpf_prog *prog = NULL;
396402 struct hid_bpf_prog_entry *prog_entry;
397403 int cnt, err = -EINVAL, prog_table_idx = -1;
398404
399− /* take a ref on the prog itself */
400− prog = bpf_prog_get(prog_fd);
401− if (IS_ERR(prog))
402− return PTR_ERR(prog);
403−
404405 mutex_lock(&hid_bpf_attach_lock);
405406
406407 link = kzalloc(sizeof(*link), GFP_USER);
@@ -467,7 +468,6 @@ __hid_bpf_attach_prog(struct hid_device *hdev, enum hid_bpf_prog_type prog_type, · 60 unmodified lines
467468 err_unlock:
468469 mutex_unlock(&hid_bpf_attach_lock);
469470
470− bpf_prog_put(prog);
471471 kfree(link);
472472
473473 return err;
drivers/hid/hid-ids.h+3−0
@@ -298,6 +298,9 @@ · 297 unmodified lines
298298
299299 #define USB_VENDOR_ID_CIDC 0x1677
300300
301+#define I2C_VENDOR_ID_CIRQUE 0x0488
302+#define I2C_PRODUCT_ID_CIRQUE_1063 0x1063
303+
301304 #define USB_VENDOR_ID_CJTOUCH 0x24b8
302305 #define USB_DEVICE_ID_CJTOUCH_MULTI_TOUCH_0020 0x0020
303306 #define USB_DEVICE_ID_CJTOUCH_MULTI_TOUCH_0040 0x0040
drivers/hid/hid-logitech-hidpp.c+2−0
@@ -4610,6 +4610,8 @@ static const struct hid_device_id hidpp_devices[] = { · 4609 unmodified lines
46104610 HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC088) },
46114611 { /* Logitech G Pro X Superlight Gaming Mouse over USB */
46124612 HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC094) },
4613+ { /* Logitech G Pro X Superlight 2 Gaming Mouse over USB */
4614+ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC09b) },
46134615
46144616 { /* G935 Gaming Headset */
46154617 HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0x0a87),
drivers/hid/hid-nvidia-shield.c+4−0
@@ -800,6 +800,8 @@ static inline int thunderstrike_led_create(struct thunderstrike *ts) · 799 unmodified lines
800800
801801 led->name = devm_kasprintf(&ts->base.hdev->dev, GFP_KERNEL,
802802 "thunderstrike%d:blue:led", ts->id);
803+ if (!led->name)
804+ return -ENOMEM;
803805 led->max_brightness = 1;
804806 led->flags = LED_CORE_SUSPENDRESUME | LED_RETAIN_AT_SHUTDOWN;
805807 led->brightness_get = &thunderstrike_led_get_brightness;
@@ -831,6 +833,8 @@ static inline int thunderstrike_psy_create(struct shield_device *shield_dev) · 25 unmodified lines
831833 shield_dev->battery_dev.desc.name =
832834 devm_kasprintf(&ts->base.hdev->dev, GFP_KERNEL,
833835 "thunderstrike_%d", ts->id);
836+ if (!shield_dev->battery_dev.desc.name)
837+ return -ENOMEM;
834838
835839 shield_dev->battery_dev.psy = power_supply_register(
836840 &hdev->dev, &shield_dev->battery_dev.desc, &psy_cfg);
drivers/hid/hid-steam.c+18−18
@@ -1109,10 +1109,9 @@ static int steam_probe(struct hid_device *hdev, · 1108 unmodified lines
11091109 return hid_hw_start(hdev, HID_CONNECT_DEFAULT);
11101110
11111111 steam = devm_kzalloc(&hdev->dev, sizeof(*steam), GFP_KERNEL);
1112− if (!steam) {
1113− ret = -ENOMEM;
1114− goto steam_alloc_fail;
1115− }
1112+ if (!steam)
1113+ return -ENOMEM;
1114+
11161115 steam->hdev = hdev;
11171116 hid_set_drvdata(hdev, steam);
11181117 spin_lock_init(&steam->lock);
@@ -1129,14 +1128,14 @@ static int steam_probe(struct hid_device *hdev, · 10 unmodified lines
11291128 */
11301129 ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT & ~HID_CONNECT_HIDRAW);
11311130 if (ret)
1132− goto hid_hw_start_fail;
1131+ goto err_cancel_work;
11331132
11341133 ret = hid_hw_open(hdev);
11351134 if (ret) {
11361135 hid_err(hdev,
11371136 "%s:hid_hw_open\n",
11381137 __func__);
1139− goto hid_hw_open_fail;
1138+ goto err_hw_stop;
11401139 }
11411140
11421141 if (steam->quirks & STEAM_QUIRK_WIRELESS) {
@@ -1152,36 +1151,37 @@ static int steam_probe(struct hid_device *hdev, · 9 unmodified lines
11521151 hid_err(hdev,
11531152 "%s:steam_register failed with error %d\n",
11541153 __func__, ret);
1155− goto input_register_fail;
1154+ goto err_hw_close;
11561155 }
11571156 }
11581157
11591158 steam->client_hdev = steam_create_client_hid(hdev);
11601159 if (IS_ERR(steam->client_hdev)) {
11611160 ret = PTR_ERR(steam->client_hdev);
1162− goto client_hdev_fail;
1161+ goto err_stream_unregister;
11631162 }
11641163 steam->client_hdev->driver_data = steam;
11651164
11661165 ret = hid_add_device(steam->client_hdev);
11671166 if (ret)
1168− goto client_hdev_add_fail;
1167+ goto err_destroy;
11691168
11701169 return 0;
11711170
1172−client_hdev_add_fail:
1173− hid_hw_stop(hdev);
1174−client_hdev_fail:
1171+err_destroy:
11751172 hid_destroy_device(steam->client_hdev);
1176−input_register_fail:
1177−hid_hw_open_fail:
1178−hid_hw_start_fail:
1173+err_stream_unregister:
1174+ if (steam->connected)
1175+ steam_unregister(steam);
1176+err_hw_close:
1177+ hid_hw_close(hdev);
1178+err_hw_stop:
1179+ hid_hw_stop(hdev);
1180+err_cancel_work:
11791181 cancel_work_sync(&steam->work_connect);
11801182 cancel_delayed_work_sync(&steam->mode_switch);
11811183 cancel_work_sync(&steam->rumble_work);
1182−steam_alloc_fail:
1183− hid_err(hdev, "%s: failed with error %d\n",
1184− __func__, ret);
1184+
11851185 return ret;
11861186 }
11871187
drivers/hid/hidraw.c+5−2
@@ -357,8 +357,11 @@ static int hidraw_release(struct inode * inode, struct file * file) · 356 unmodified lines
357357 down_write(&minors_rwsem);
358358
359359 spin_lock_irqsave(&hidraw_table[minor]->list_lock, flags);
360− for (int i = list->tail; i < list->head; i++)
361− kfree(list->buffer[i].value);
360+ while (list->tail != list->head) {
361+ kfree(list->buffer[list->tail].value);
362+ list->buffer[list->tail].value = NULL;
363+ list->tail = (list->tail + 1) & (HIDRAW_BUFFER_SIZE - 1);
364+ }
362365 list_del(&list->node);
363366 spin_unlock_irqrestore(&hidraw_table[minor]->list_lock, flags);
364367 kfree(list);
drivers/hid/i2c-hid/i2c-hid-core.c+5−1
@@ -49,6 +49,7 @@ · 48 unmodified lines
4949 #define I2C_HID_QUIRK_RESET_ON_RESUME BIT(2)
5050 #define I2C_HID_QUIRK_BAD_INPUT_SIZE BIT(3)
5151 #define I2C_HID_QUIRK_NO_WAKEUP_AFTER_RESET BIT(4)
52+#define I2C_HID_QUIRK_NO_SLEEP_ON_SUSPEND BIT(5)
5253
5354 /* Command opcodes */
5455 #define I2C_HID_OPCODE_RESET 0x01
@@ -131,6 +132,8 @@ static const struct i2c_hid_quirks { · 76 unmodified lines
131132 I2C_HID_QUIRK_RESET_ON_RESUME },
132133 { USB_VENDOR_ID_ITE, I2C_DEVICE_ID_ITE_LENOVO_LEGION_Y720,
133134 I2C_HID_QUIRK_BAD_INPUT_SIZE },
135+ { I2C_VENDOR_ID_CIRQUE, I2C_PRODUCT_ID_CIRQUE_1063,
136+ I2C_HID_QUIRK_NO_SLEEP_ON_SUSPEND },
134137 /*
135138 * Sending the wakeup after reset actually break ELAN touchscreen controller
136139 */
@@ -956,7 +959,8 @@ static int i2c_hid_core_suspend(struct i2c_hid *ihid, bool force_poweroff) · 819 unmodified lines
956959 return ret;
957960
958961 /* Save some power */
959− i2c_hid_set_power(ihid, I2C_HID_PWR_SLEEP);
962+ if (!(ihid->quirks & I2C_HID_QUIRK_NO_SLEEP_ON_SUSPEND))
963+ i2c_hid_set_power(ihid, I2C_HID_PWR_SLEEP);
960964
961965 disable_irq(client->irq);
962966
drivers/hid/i2c-hid/i2c-hid-of.c+1−0
@@ -87,6 +87,7 @@ static int i2c_hid_of_probe(struct i2c_client *client) · 86 unmodified lines
8787 if (!ihid_of)
8888 return -ENOMEM;
8989
90+ ihid_of->client = client;
9091 ihid_of->ops.power_up = i2c_hid_of_power_up;
9192 ihid_of->ops.power_down = i2c_hid_of_power_down;
9293
drivers/hwmon/aspeed-pwm-tacho.c+7−0
@@ -195,6 +195,8 @@ struct aspeed_pwm_tacho_data { · 194 unmodified lines
195195 u8 fan_tach_ch_source[MAX_ASPEED_FAN_TACH_CHANNELS];
196196 struct aspeed_cooling_device *cdev[8];
197197 const struct attribute_group *groups[3];
198+ /* protects access to shared ASPEED_PTCR_RESULT */
199+ struct mutex tach_lock;
198200 };
199201
200202 enum type { TYPEM, TYPEN, TYPEO };
@@ -529,6 +531,8 @@ static int aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv, · 328 unmodified lines
529531 u8 fan_tach_ch_source, type, mode, both;
530532 int ret;
531533
534+ mutex_lock(&priv->tach_lock);
535+
532536 regmap_write(priv->regmap, ASPEED_PTCR_TRIGGER, 0);
533537 regmap_write(priv->regmap, ASPEED_PTCR_TRIGGER, 0x1 << fan_tach_ch);
534538
@@ -546,6 +550,8 @@ static int aspeed_get_fan_tach_ch_rpm(struct aspeed_pwm_tacho_data *priv, · 11 unmodified lines
546550 ASPEED_RPM_STATUS_SLEEP_USEC,
547551 usec);
548552
553+ mutex_unlock(&priv->tach_lock);
554+
549555 /* return -ETIMEDOUT if we didn't get an answer. */
550556 if (ret)
551557 return ret;
@@ -915,6 +921,7 @@ static int aspeed_pwm_tacho_probe(struct platform_device *pdev) · 363 unmodified lines
915921 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
916922 if (!priv)
917923 return -ENOMEM;
924+ mutex_init(&priv->tach_lock);
918925 priv->regmap = devm_regmap_init(dev, NULL, (__force void *)regs,
919926 &aspeed_pwm_tacho_regmap_config);
920927 if (IS_ERR(priv->regmap))
drivers/hwmon/coretemp.c+22−20
@@ -41,7 +41,7 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); · 40 unmodified lines
4141
4242 #define PKG_SYSFS_ATTR_NO 1 /* Sysfs attribute for package temp */
4343 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
44−#define NUM_REAL_CORES 128 /* Number of Real cores per cpu */
44+#define NUM_REAL_CORES 512 /* Number of Real cores per cpu */
4545 #define CORETEMP_NAME_LENGTH 28 /* String Length of attrs */
4646 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
4747 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
@@ -419,7 +419,7 @@ static ssize_t show_temp(struct device *dev, · 371 unmodified lines
419419 }
420420
421421 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
422− int attr_no)
422+ int index)
423423 {
424424 int i;
425425 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
@@ -431,13 +431,20 @@ static int create_core_attrs(struct temp_data *tdata, struct device *dev, · 5 unmodified lines
431431 };
432432
433433 for (i = 0; i < tdata->attr_size; i++) {
434+ /*
435+ * We map the attr number to core id of the CPU
436+ * The attr number is always core id + 2
437+ * The Pkgtemp will always show up as temp1_*, if available
438+ */
439+ int attr_no = tdata->is_pkg_data ? 1 : tdata->cpu_core_id + 2;
440+
434441 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH,
435442 "temp%d_%s", attr_no, suffixes[i]);
436443 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
437444 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
438445 tdata->sd_attrs[i].dev_attr.attr.mode = 0444;
439446 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
440− tdata->sd_attrs[i].index = attr_no;
447+ tdata->sd_attrs[i].index = index;
441448 tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr;
442449 }
443450 tdata->attr_group.attrs = tdata->attrs;
@@ -495,30 +502,25 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu, · 51 unmodified lines
495502 struct platform_data *pdata = platform_get_drvdata(pdev);
496503 struct cpuinfo_x86 *c = &cpu_data(cpu);
497504 u32 eax, edx;
498− int err, index, attr_no;
505+ int err, index;
499506
500507 if (!housekeeping_cpu(cpu, HK_TYPE_MISC))
501508 return 0;
502509
503510 /*
504− * Find attr number for sysfs:
505− * We map the attr number to core id of the CPU
506− * The attr number is always core id + 2
507− * The Pkgtemp will always show up as temp1_*, if available
511+ * Get the index of tdata in pdata->core_data[]
512+ * tdata for package: pdata->core_data[1]
513+ * tdata for core: pdata->core_data[2] .. pdata->core_data[NUM_REAL_CORES + 1]
508514 */
509515 if (pkg_flag) {
510− attr_no = PKG_SYSFS_ATTR_NO;
516+ index = PKG_SYSFS_ATTR_NO;
511517 } else {
512− index = ida_alloc(&pdata->ida, GFP_KERNEL);
518+ index = ida_alloc_max(&pdata->ida, NUM_REAL_CORES - 1, GFP_KERNEL);
513519 if (index < 0)
514520 return index;
515− pdata->cpu_map[index] = topology_core_id(cpu);
516− attr_no = index + BASE_SYSFS_ATTR_NO;
517− }
518521
519− if (attr_no > MAX_CORE_DATA - 1) {
520− err = -ERANGE;
521− goto ida_free;
522+ pdata->cpu_map[index] = topology_core_id(cpu);
523+ index += BASE_SYSFS_ATTR_NO;
522524 }
523525
524526 tdata = init_temp_data(cpu, pkg_flag);
@@ -544,20 +546,20 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu, · 19 unmodified lines
544546 if (get_ttarget(tdata, &pdev->dev) >= 0)
545547 tdata->attr_size++;
546548
547− pdata->core_data[attr_no] = tdata;
549+ pdata->core_data[index] = tdata;
548550
549551 /* Create sysfs interfaces */
550− err = create_core_attrs(tdata, pdata->hwmon_dev, attr_no);
552+ err = create_core_attrs(tdata, pdata->hwmon_dev, index);
551553 if (err)
552554 goto exit_free;
553555
554556 return 0;
555557 exit_free:
556− pdata->core_data[attr_no] = NULL;
558+ pdata->core_data[index] = NULL;
557559 kfree(tdata);
558560 ida_free:
559561 if (!pkg_flag)
560− ida_free(&pdata->ida, index);
562+ ida_free(&pdata->ida, index - BASE_SYSFS_ATTR_NO);
561563 return err;
562564 }
563565
drivers/hwmon/gigabyte_waterforce.c+1−1
@@ -146,7 +146,7 @@ static int waterforce_get_status(struct waterforce_data *priv) · 145 unmodified lines
146146 /* Send command for getting status */
147147 ret = waterforce_write_expanded(priv, get_status_cmd, GET_STATUS_CMD_LENGTH);
148148 if (ret < 0)
149− return ret;
149+ goto unlock_and_return;
150150
151151 ret = wait_for_completion_interruptible_timeout(&priv->status_report_received,
152152 msecs_to_jiffies(STATUS_VALIDITY));
drivers/hwmon/pmbus/mp2975.c+16−0
@@ -126,6 +126,21 @@ static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = { · 125 unmodified lines
126126
127127 #define to_mp2975_data(x) container_of(x, struct mp2975_data, info)
128128
129+static int mp2975_read_byte_data(struct i2c_client *client, int page, int reg)
130+{
131+ switch (reg) {
132+ case PMBUS_VOUT_MODE:
133+ /*
134+ * Report direct format as configured by MFR_DC_LOOP_CTRL.
135+ * Unlike on MP2971/MP2973 the reported VOUT_MODE isn't automatically
136+ * internally updated, but always reads as PB_VOUT_MODE_VID.
137+ */
138+ return PB_VOUT_MODE_DIRECT;
139+ default:
140+ return -ENODATA;
141+ }
142+}
143+
129144 static int
130145 mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg,
131146 u16 mask)
@@ -869,6 +884,7 @@ static struct pmbus_driver_info mp2975_info = { · 737 unmodified lines
869884 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
870885 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT |
871886 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL,
887+ .read_byte_data = mp2975_read_byte_data,
872888 .read_word_data = mp2975_read_word_data,
873889 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)
874890 .num_regulators = 1,
drivers/input/joystick/xpad.c+2−0
@@ -294,6 +294,7 @@ static const struct xpad_device { · 293 unmodified lines
294294 { 0x1689, 0xfd00, "Razer Onza Tournament Edition", 0, XTYPE_XBOX360 },
295295 { 0x1689, 0xfd01, "Razer Onza Classic Edition", 0, XTYPE_XBOX360 },
296296 { 0x1689, 0xfe00, "Razer Sabertooth", 0, XTYPE_XBOX360 },
297+ { 0x17ef, 0x6182, "Lenovo Legion Controller for Windows", 0, XTYPE_XBOX360 },
297298 { 0x1949, 0x041a, "Amazon Game Controller", 0, XTYPE_XBOX360 },
298299 { 0x1bad, 0x0002, "Harmonix Rock Band Guitar", 0, XTYPE_XBOX360 },
299300 { 0x1bad, 0x0003, "Harmonix Rock Band Drumkit", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX360 },
@@ -491,6 +492,7 @@ static const struct usb_device_id xpad_table[] = { · 191 unmodified lines
491492 XPAD_XBOX360_VENDOR(0x15e4), /* Numark Xbox 360 controllers */
492493 XPAD_XBOX360_VENDOR(0x162e), /* Joytech Xbox 360 controllers */
493494 XPAD_XBOX360_VENDOR(0x1689), /* Razer Onza */
495+ XPAD_XBOX360_VENDOR(0x17ef), /* Lenovo */
494496 XPAD_XBOX360_VENDOR(0x1949), /* Amazon controllers */
495497 XPAD_XBOX360_VENDOR(0x1bad), /* Harmonix Rock Band guitar and drums */
496498 XPAD_XBOX360_VENDOR(0x20d6), /* PowerA controllers */
drivers/input/keyboard/atkbd.c+9−5
@@ -811,7 +811,6 @@ static int atkbd_probe(struct atkbd *atkbd) · 810 unmodified lines
811811 {
812812 struct ps2dev *ps2dev = &atkbd->ps2dev;
813813 unsigned char param[2];
814− bool skip_getid;
815814
816815 /*
817816 * Some systems, where the bit-twiddling when testing the io-lines of the
@@ -825,6 +824,11 @@ static int atkbd_probe(struct atkbd *atkbd) · 7 unmodified lines
825824 "keyboard reset failed on %s\n",
826825 ps2dev->serio->phys);
827826
827+ if (atkbd_skip_getid(atkbd)) {
828+ atkbd->id = 0xab83;
829+ goto deactivate_kbd;
830+ }
831+
828832 /*
829833 * Then we check the keyboard ID. We should get 0xab83 under normal conditions.
830834 * Some keyboards report different values, but the first byte is always 0xab or
@@ -833,18 +837,17 @@ static int atkbd_probe(struct atkbd *atkbd) · 2 unmodified lines
833837 */
834838
835839 param[0] = param[1] = 0xa5; /* initialize with invalid values */
836− skip_getid = atkbd_skip_getid(atkbd);
837− if (skip_getid || ps2_command(ps2dev, param, ATKBD_CMD_GETID)) {
840+ if (ps2_command(ps2dev, param, ATKBD_CMD_GETID)) {
838841
839842 /*
840− * If the get ID command was skipped or failed, we check if we can at least set
843+ * If the get ID command failed, we check if we can at least set
841844 * the LEDs on the keyboard. This should work on every keyboard out there.
842845 * It also turns the LEDs off, which we want anyway.
843846 */
844847 param[0] = 0;
845848 if (ps2_command(ps2dev, param, ATKBD_CMD_SETLEDS))
846849 return -1;
847− atkbd->id = skip_getid ? 0xab83 : 0xabba;
850+ atkbd->id = 0xabba;
848851 return 0;
849852 }
850853
@@ -860,6 +863,7 @@ static int atkbd_probe(struct atkbd *atkbd) · 9 unmodified lines
860863 return -1;
861864 }
862865
866+deactivate_kbd:
863867 /*
864868 * Make sure nothing is coming from the keyboard and disturbs our
865869 * internal state.
drivers/input/mouse/bcm5974.c+20−0
@@ -19,6 +19,7 @@ · 18 unmodified lines
1919 * Copyright (C) 2006 Nicolas Boichat (nicolas@boichat.ch)
2020 */
2121
22+#include "linux/usb.h"
2223 #include <linux/kernel.h>
2324 #include <linux/errno.h>
2425 #include <linux/slab.h>
@@ -193,6 +194,8 @@ enum tp_type { · 168 unmodified lines
193194
194195 /* list of device capability bits */
195196 #define HAS_INTEGRATED_BUTTON 1
197+/* maximum number of supported endpoints (currently trackpad and button) */
198+#define MAX_ENDPOINTS 2
196199
197200 /* trackpad finger data block size */
198201 #define FSIZE_TYPE1 (14 * sizeof(__le16))
@@ -891,6 +894,18 @@ static int bcm5974_resume(struct usb_interface *iface) · 692 unmodified lines
891894 return error;
892895 }
893896
897+static bool bcm5974_check_endpoints(struct usb_interface *iface,
898+ const struct bcm5974_config *cfg)
899+{
900+ u8 ep_addr[MAX_ENDPOINTS + 1] = {0};
901+
902+ ep_addr[0] = cfg->tp_ep;
903+ if (cfg->tp_type == TYPE1)
904+ ep_addr[1] = cfg->bt_ep;
905+
906+ return usb_check_int_endpoints(iface, ep_addr);
907+}
908+
894909 static int bcm5974_probe(struct usb_interface *iface,
895910 const struct usb_device_id *id)
896911 {
@@ -903,6 +918,11 @@ static int bcm5974_probe(struct usb_interface *iface, · 6 unmodified lines
903918 /* find the product index */
904919 cfg = bcm5974_get_config(udev);
905920
921+ if (!bcm5974_check_endpoints(iface, cfg)) {
922+ dev_err(&iface->dev, "Unexpected non-int endpoint\n");
923+ return -ENODEV;
924+ }
925+
906926 /* allocate memory for our device state and initialize it */
907927 dev = kzalloc(sizeof(struct bcm5974), GFP_KERNEL);
908928 input_dev = input_allocate_device();
drivers/input/serio/i8042-acpipnpio.h+14−0
@@ -634,6 +634,14 @@ static const struct dmi_system_id i8042_dmi_quirk_table[] __initconst = { · 633 unmodified lines
634634 },
635635 .driver_data = (void *)(SERIO_QUIRK_NOAUX)
636636 },
637+ {
638+ /* Fujitsu Lifebook U728 */
639+ .matches = {
640+ DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
641+ DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK U728"),
642+ },
643+ .driver_data = (void *)(SERIO_QUIRK_NOAUX)
644+ },
637645 {
638646 /* Gigabyte M912 */
639647 .matches = {
@@ -1208,6 +1216,12 @@ static const struct dmi_system_id i8042_dmi_quirk_table[] __initconst = { · 568 unmodified lines
12081216 SERIO_QUIRK_RESET_ALWAYS | SERIO_QUIRK_NOLOOP |
12091217 SERIO_QUIRK_NOPNP)
12101218 },
1219+ {
1220+ .matches = {
1221+ DMI_MATCH(DMI_BOARD_NAME, "NS5x_7xPU"),
1222+ },
1223+ .driver_data = (void *)(SERIO_QUIRK_NOAUX)
1224+ },
12111225 {
12121226 .matches = {
12131227 DMI_MATCH(DMI_BOARD_NAME, "NJ50_70CU"),
drivers/input/touchscreen/goodix.c+2−1
@@ -884,7 +884,8 @@ static int goodix_add_acpi_gpio_mappings(struct goodix_ts_data *ts) · 883 unmodified lines
884884 }
885885 }
886886
887− if (ts->gpio_count == 2 && ts->gpio_int_idx == 0) {
887+ /* Some devices with gpio_int_idx 0 list a third unused GPIO */
888+ if ((ts->gpio_count == 2 || ts->gpio_count == 3) && ts->gpio_int_idx == 0) {
888889 ts->irq_pin_access_method = IRQ_PIN_ACCESS_ACPI_GPIO;
889890 gpio_mapping = acpi_goodix_int_first_gpios;
890891 } else if (ts->gpio_count == 2 && ts->gpio_int_idx == 1) {
drivers/iommu/iommu.c+13−5
@@ -1799,7 +1799,7 @@ iommu_group_alloc_default_domain(struct iommu_group *group, int req_type) · 1798 unmodified lines
17991799 * domain. Do not use in new drivers.
18001800 */
18011801 if (ops->default_domain) {
1802− if (req_type)
1802+ if (req_type != ops->default_domain->type)
18031803 return ERR_PTR(-EINVAL);
18041804 return ops->default_domain;
18051805 }
@@ -1871,10 +1871,18 @@ static int iommu_get_def_domain_type(struct iommu_group *group, · 65 unmodified lines
18711871 const struct iommu_ops *ops = dev_iommu_ops(dev);
18721872 int type;
18731873
1874− if (!ops->def_domain_type)
1875− return cur_type;
1876−
1877− type = ops->def_domain_type(dev);
1874+ if (ops->default_domain) {
1875+ /*
1876+ * Drivers that declare a global static default_domain will
1877+ * always choose that.
1878+ */
1879+ type = ops->default_domain->type;
1880+ } else {
1881+ if (ops->def_domain_type)
1882+ type = ops->def_domain_type(dev);
1883+ else
1884+ return cur_type;
1885+ }
18781886 if (!type || cur_type == type)
18791887 return cur_type;
18801888 if (!cur_type)
drivers/md/dm-core.h+2−0
@@ -22,6 +22,8 @@ · 21 unmodified lines
2222 #include "dm-ima.h"
2323
2424 #define DM_RESERVED_MAX_IOS 1024
25+#define DM_MAX_TARGETS 1048576
26+#define DM_MAX_TARGET_PARAMS 1024
2527
2628 struct dm_io;
2729
drivers/md/dm-crypt.c+2−36
@@ -73,10 +73,8 @@ struct dm_crypt_io { · 72 unmodified lines
7373 struct bio *base_bio;
7474 u8 *integrity_metadata;
7575 bool integrity_metadata_from_pool:1;
76− bool in_tasklet:1;
7776
7877 struct work_struct work;
79− struct tasklet_struct tasklet;
8078
8179 struct convert_context ctx;
8280
@@ -1762,7 +1760,6 @@ static void crypt_io_init(struct dm_crypt_io *io, struct crypt_config *cc, · 1679 unmodified lines
17621760 io->ctx.r.req = NULL;
17631761 io->integrity_metadata = NULL;
17641762 io->integrity_metadata_from_pool = false;
1765− io->in_tasklet = false;
17661763 atomic_set(&io->io_pending, 0);
17671764 }
17681765
@@ -1771,13 +1768,6 @@ static void crypt_inc_pending(struct dm_crypt_io *io) · 2 unmodified lines
17711768 atomic_inc(&io->io_pending);
17721769 }
17731770
1774−static void kcryptd_io_bio_endio(struct work_struct *work)
1775−{
1776− struct dm_crypt_io *io = container_of(work, struct dm_crypt_io, work);
1777−
1778− bio_endio(io->base_bio);
1779−}
1780−
17811771 /*
17821772 * One of the bios was finished. Check for completion of
17831773 * the whole request and correctly clean up the buffer.
@@ -1801,20 +1791,6 @@ static void crypt_dec_pending(struct dm_crypt_io *io) · 17 unmodified lines
18011791
18021792 base_bio->bi_status = error;
18031793
1804− /*
1805− * If we are running this function from our tasklet,
1806− * we can't call bio_endio() here, because it will call
1807− * clone_endio() from dm.c, which in turn will
1808− * free the current struct dm_crypt_io structure with
1809− * our tasklet. In this case we need to delay bio_endio()
1810− * execution to after the tasklet is done and dequeued.
1811− */
1812− if (io->in_tasklet) {
1813− INIT_WORK(&io->work, kcryptd_io_bio_endio);
1814− queue_work(cc->io_queue, &io->work);
1815− return;
1816− }
1817−
18181794 bio_endio(base_bio);
18191795 }
18201796
@@ -2246,11 +2222,6 @@ static void kcryptd_crypt(struct work_struct *work) · 425 unmodified lines
22462222 kcryptd_crypt_write_convert(io);
22472223 }
22482224
2249−static void kcryptd_crypt_tasklet(unsigned long work)
2250−{
2251− kcryptd_crypt((struct work_struct *)work);
2252−}
2253−
22542225 static void kcryptd_queue_crypt(struct dm_crypt_io *io)
22552226 {
22562227 struct crypt_config *cc = io->cc;
@@ -2262,15 +2233,10 @@ static void kcryptd_queue_crypt(struct dm_crypt_io *io) · 5 unmodified lines
22622233 * irqs_disabled(): the kernel may run some IO completion from the idle thread, but
22632234 * it is being executed with irqs disabled.
22642235 */
2265− if (in_hardirq() || irqs_disabled()) {
2266− io->in_tasklet = true;
2267− tasklet_init(&io->tasklet, kcryptd_crypt_tasklet, (unsigned long)&io->work);
2268− tasklet_schedule(&io->tasklet);
2236+ if (!(in_hardirq() || irqs_disabled())) {
2237+ kcryptd_crypt(&io->work);
22692238 return;
22702239 }
2271−
2272− kcryptd_crypt(&io->work);
2273− return;
22742240 }
22752241
22762242 INIT_WORK(&io->work, kcryptd_crypt);
drivers/md/dm-ioctl.c+2−1
@@ -1941,7 +1941,8 @@ static int copy_params(struct dm_ioctl __user *user, struct dm_ioctl *param_kern · 1940 unmodified lines
19411941 minimum_data_size - sizeof(param_kernel->version)))
19421942 return -EFAULT;
19431943
1944− if (param_kernel->data_size < minimum_data_size) {
1944+ if (unlikely(param_kernel->data_size < minimum_data_size) ||
1945+ unlikely(param_kernel->data_size > DM_MAX_TARGETS * DM_MAX_TARGET_PARAMS)) {
19451946 DMERR("Invalid data size in the ioctl structure: %u",
19461947 param_kernel->data_size);
19471948 return -EINVAL;
drivers/md/dm-stats.c+9−0
@@ -66,6 +66,9 @@ struct dm_stats_last_position { · 65 unmodified lines
6666 unsigned int last_rw;
6767 };
6868
69+#define DM_STAT_MAX_ENTRIES 8388608
70+#define DM_STAT_MAX_HISTOGRAM_ENTRIES 134217728
71+
6972 /*
7073 * A typo on the command line could possibly make the kernel run out of memory
7174 * and crash. To prevent the crash we account all used memory. We fail if we
@@ -285,6 +288,9 @@ static int dm_stats_create(struct dm_stats *stats, sector_t start, sector_t end, · 213 unmodified lines
285288 if (n_entries != (size_t)n_entries || !(size_t)(n_entries + 1))
286289 return -EOVERFLOW;
287290
291+ if (n_entries > DM_STAT_MAX_ENTRIES)
292+ return -EOVERFLOW;
293+
288294 shared_alloc_size = struct_size(s, stat_shared, n_entries);
289295 if ((shared_alloc_size - sizeof(struct dm_stat)) / sizeof(struct dm_stat_shared) != n_entries)
290296 return -EOVERFLOW;
@@ -297,6 +303,9 @@ static int dm_stats_create(struct dm_stats *stats, sector_t start, sector_t end, · 6 unmodified lines
297303 if (histogram_alloc_size / (n_histogram_entries + 1) != (size_t)n_entries * sizeof(unsigned long long))
298304 return -EOVERFLOW;
299305
306+ if ((n_histogram_entries + 1) * (size_t)n_entries > DM_STAT_MAX_HISTOGRAM_ENTRIES)
307+ return -EOVERFLOW;
308+
300309 if (!check_shared_memory(shared_alloc_size + histogram_alloc_size +
301310 num_possible_cpus() * (percpu_alloc_size + histogram_alloc_size)))
302311 return -ENOMEM;
drivers/md/dm-table.c+7−2
@@ -129,7 +129,12 @@ static int alloc_targets(struct dm_table *t, unsigned int num) · 128 unmodified lines
129129 int dm_table_create(struct dm_table **result, blk_mode_t mode,
130130 unsigned int num_targets, struct mapped_device *md)
131131 {
132− struct dm_table *t = kzalloc(sizeof(*t), GFP_KERNEL);
132+ struct dm_table *t;
133+
134+ if (num_targets > DM_MAX_TARGETS)
135+ return -EOVERFLOW;
136+
137+ t = kzalloc(sizeof(*t), GFP_KERNEL);
133138
134139 if (!t)
135140 return -ENOMEM;
@@ -144,7 +149,7 @@ int dm_table_create(struct dm_table **result, blk_mode_t mode, · 8 unmodified lines
144149
145150 if (!num_targets) {
146151 kfree(t);
147− return -ENOMEM;
152+ return -EOVERFLOW;
148153 }
149154
150155 if (alloc_targets(t, num_targets)) {
drivers/md/dm-verity-target.c+2−24
@@ -645,23 +645,6 @@ static void verity_work(struct work_struct *w) · 644 unmodified lines
645645 verity_finish_io(io, errno_to_blk_status(verity_verify_io(io)));
646646 }
647647
648−static void verity_tasklet(unsigned long data)
649−{
650− struct dm_verity_io *io = (struct dm_verity_io *)data;
651− int err;
652−
653− io->in_tasklet = true;
654− err = verity_verify_io(io);
655− if (err == -EAGAIN || err == -ENOMEM) {
656− /* fallback to retrying with work-queue */
657− INIT_WORK(&io->work, verity_work);
658− queue_work(io->v->verify_wq, &io->work);
659− return;
660− }
661−
662− verity_finish_io(io, errno_to_blk_status(err));
663−}
664−
665648 static void verity_end_io(struct bio *bio)
666649 {
667650 struct dm_verity_io *io = bio->bi_private;
@@ -674,13 +657,8 @@ static void verity_end_io(struct bio *bio) · 6 unmodified lines
674657 return;
675658 }
676659
677− if (static_branch_unlikely(&use_tasklet_enabled) && io->v->use_tasklet) {
678− tasklet_init(&io->tasklet, verity_tasklet, (unsigned long)io);
679− tasklet_schedule(&io->tasklet);
680− } else {
681− INIT_WORK(&io->work, verity_work);
682− queue_work(io->v->verify_wq, &io->work);
683− }
660+ INIT_WORK(&io->work, verity_work);
661+ queue_work(io->v->verify_wq, &io->work);
684662 }
685663
686664 /*
drivers/md/dm-verity.h+0−1
@@ -83,7 +83,6 @@ struct dm_verity_io { · 82 unmodified lines
8383 struct bvec_iter iter;
8484
8585 struct work_struct work;
86− struct tasklet_struct tasklet;
8786
8887 /*
8988 * Three variably-size fields follow this struct:
drivers/md/dm-writecache.c+4−4
@@ -299,7 +299,7 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 298 unmodified lines
299299 long i;
300300
301301 wc->memory_map = NULL;
302− pages = kvmalloc_array(p, sizeof(struct page *), GFP_KERNEL);
302+ pages = vmalloc_array(p, sizeof(struct page *));
303303 if (!pages) {
304304 r = -ENOMEM;
305305 goto err2;
@@ -330,7 +330,7 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 24 unmodified lines
330330 r = -ENOMEM;
331331 goto err3;
332332 }
333− kvfree(pages);
333+ vfree(pages);
334334 wc->memory_vmapped = true;
335335 }
336336
@@ -341,7 +341,7 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 4 unmodified lines
341341
342342 return 0;
343343 err3:
344− kvfree(pages);
344+ vfree(pages);
345345 err2:
346346 dax_read_unlock(id);
347347 err1:
@@ -962,7 +962,7 @@ static int writecache_alloc_entries(struct dm_writecache *wc) · 614 unmodified lines
962962
963963 if (wc->entries)
964964 return 0;
965− wc->entries = vmalloc(array_size(sizeof(struct wc_entry), wc->n_blocks));
965+ wc->entries = vmalloc_array(wc->n_blocks, sizeof(struct wc_entry));
966966 if (!wc->entries)
967967 return -ENOMEM;
968968 for (b = 0; b < wc->n_blocks; b++) {
drivers/md/raid1.c+1−1
@@ -2262,7 +2262,7 @@ static void fix_read_error(struct r1conf *conf, struct r1bio *r1_bio) · 2261 unmodified lines
22622262 int sectors = r1_bio->sectors;
22632263 int read_disk = r1_bio->read_disk;
22642264 struct mddev *mddev = conf->mddev;
2265− struct md_rdev *rdev = rcu_dereference(conf->mirrors[read_disk].rdev);
2265+ struct md_rdev *rdev = conf->mirrors[read_disk].rdev;
22662266
22672267 if (exceed_read_errors(mddev, rdev)) {
22682268 r1_bio->bios[r1_bio->read_disk] = IO_BLOCKED;
drivers/media/common/videobuf2/videobuf2-core.c+1−1
@@ -989,7 +989,7 @@ int vb2_core_create_bufs(struct vb2_queue *q, enum vb2_memory memory, · 988 unmodified lines
989989 bool no_previous_buffers = !q_num_bufs;
990990 int ret = 0;
991991
992− if (q->num_buffers == q->max_num_buffers) {
992+ if (q_num_bufs == q->max_num_buffers) {
993993 dprintk(q, 1, "maximum number of buffers already allocated\n");
994994 return -ENOBUFS;
995995 }
drivers/media/common/videobuf2/videobuf2-v4l2.c+26−29
@@ -671,8 +671,20 @@ int vb2_querybuf(struct vb2_queue *q, struct v4l2_buffer *b) · 670 unmodified lines
671671 }
672672 EXPORT_SYMBOL(vb2_querybuf);
673673
674−static void fill_buf_caps(struct vb2_queue *q, u32 *caps)
674+static void vb2_set_flags_and_caps(struct vb2_queue *q, u32 memory,
675+ u32 *flags, u32 *caps, u32 *max_num_bufs)
675676 {
677+ if (!q->allow_cache_hints || memory != V4L2_MEMORY_MMAP) {
678+ /*
679+ * This needs to clear V4L2_MEMORY_FLAG_NON_COHERENT only,
680+ * but in order to avoid bugs we zero out all bits.
681+ */
682+ *flags = 0;
683+ } else {
684+ /* Clear all unknown flags. */
685+ *flags &= V4L2_MEMORY_FLAG_NON_COHERENT;
686+ }
687+
676688 *caps = V4L2_BUF_CAP_SUPPORTS_ORPHANED_BUFS;
677689 if (q->io_modes & VB2_MMAP)
678690 *caps |= V4L2_BUF_CAP_SUPPORTS_MMAP;
@@ -686,21 +698,9 @@ static void fill_buf_caps(struct vb2_queue *q, u32 *caps) · 7 unmodified lines
686698 *caps |= V4L2_BUF_CAP_SUPPORTS_MMAP_CACHE_HINTS;
687699 if (q->supports_requests)
688700 *caps |= V4L2_BUF_CAP_SUPPORTS_REQUESTS;
689−}
690−
691−static void validate_memory_flags(struct vb2_queue *q,
692− int memory,
693− u32 *flags)
694−{
695− if (!q->allow_cache_hints || memory != V4L2_MEMORY_MMAP) {
696− /*
697− * This needs to clear V4L2_MEMORY_FLAG_NON_COHERENT only,
698− * but in order to avoid bugs we zero out all bits.
699− */
700− *flags = 0;
701− } else {
702− /* Clear all unknown flags. */
703− *flags &= V4L2_MEMORY_FLAG_NON_COHERENT;
701+ if (max_num_bufs) {
702+ *max_num_bufs = q->max_num_buffers;
703+ *caps |= V4L2_BUF_CAP_SUPPORTS_MAX_NUM_BUFFERS;
704704 }
705705 }
706706
@@ -709,8 +709,8 @@ int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req) · 2 unmodified lines
709709 int ret = vb2_verify_memory_type(q, req->memory, req->type);
710710 u32 flags = req->flags;
711711
712− fill_buf_caps(q, &req->capabilities);
713− validate_memory_flags(q, req->memory, &flags);
712+ vb2_set_flags_and_caps(q, req->memory, &flags,
713+ &req->capabilities, NULL);
714714 req->flags = flags;
715715 return ret ? ret : vb2_core_reqbufs(q, req->memory,
716716 req->flags, &req->count);
@@ -751,11 +751,9 @@ int vb2_create_bufs(struct vb2_queue *q, struct v4l2_create_buffers *create) · 34 unmodified lines
751751 int ret = vb2_verify_memory_type(q, create->memory, f->type);
752752 unsigned i;
753753
754− fill_buf_caps(q, &create->capabilities);
755− validate_memory_flags(q, create->memory, &create->flags);
756754 create->index = vb2_get_num_buffers(q);
757− create->max_num_buffers = q->max_num_buffers;
758− create->capabilities |= V4L2_BUF_CAP_SUPPORTS_MAX_NUM_BUFFERS;
755+ vb2_set_flags_and_caps(q, create->memory, &create->flags,
756+ &create->capabilities, &create->max_num_buffers);
759757 if (create->count == 0)
760758 return ret != -EBUSY ? ret : 0;
761759
@@ -1006,8 +1004,8 @@ int vb2_ioctl_reqbufs(struct file *file, void *priv, · 244 unmodified lines
10061004 int res = vb2_verify_memory_type(vdev->queue, p->memory, p->type);
10071005 u32 flags = p->flags;
10081006
1009− fill_buf_caps(vdev->queue, &p->capabilities);
1010− validate_memory_flags(vdev->queue, p->memory, &flags);
1007+ vb2_set_flags_and_caps(vdev->queue, p->memory, &flags,
1008+ &p->capabilities, NULL);
10111009 p->flags = flags;
10121010 if (res)
10131011 return res;
@@ -1026,12 +1024,11 @@ int vb2_ioctl_create_bufs(struct file *file, void *priv, · 12 unmodified lines
10261024 struct v4l2_create_buffers *p)
10271025 {
10281026 struct video_device *vdev = video_devdata(file);
1029− int res = vb2_verify_memory_type(vdev->queue, p->memory,
1030− p->format.type);
1027+ int res = vb2_verify_memory_type(vdev->queue, p->memory, p->format.type);
10311028
1032− p->index = vdev->queue->num_buffers;
1033− fill_buf_caps(vdev->queue, &p->capabilities);
1034− validate_memory_flags(vdev->queue, p->memory, &p->flags);
1029+ p->index = vb2_get_num_buffers(vdev->queue);
1030+ vb2_set_flags_and_caps(vdev->queue, p->memory, &p->flags,
1031+ &p->capabilities, &p->max_num_buffers);
10351032 /*
10361033 * If count == 0, then just check if memory and type are valid.
10371034 * Any -EBUSY result from vb2_verify_memory_type can be mapped to 0.
drivers/media/platform/chips-media/wave5/wave5-vpu.c+1−1
@@ -272,7 +272,7 @@ static const struct wave5_match_data ti_wave521c_data = { · 271 unmodified lines
272272 };
273273
274274 static const struct of_device_id wave5_dt_ids[] = {
275− { .compatible = "ti,k3-j721s2-wave521c", .data = &ti_wave521c_data },
275+ { .compatible = "ti,j721s2-wave521c", .data = &ti_wave521c_data },
276276 { /* sentinel */ }
277277 };
278278 MODULE_DEVICE_TABLE(of, wave5_dt_ids);
drivers/misc/fastrpc.c+1−1
@@ -2191,7 +2191,7 @@ static int fastrpc_cb_remove(struct platform_device *pdev) · 2190 unmodified lines
21912191 int i;
21922192
21932193 spin_lock_irqsave(&cctx->lock, flags);
2194− for (i = 1; i < FASTRPC_MAX_SESSIONS; i++) {
2194+ for (i = 0; i < FASTRPC_MAX_SESSIONS; i++) {
21952195 if (cctx->session[i].sid == sess->sid) {
21962196 cctx->session[i].valid = false;
21972197 cctx->sesscount--;
drivers/misc/open-dice.c+1−1
@@ -140,7 +140,6 @@ static int __init open_dice_probe(struct platform_device *pdev) · 139 unmodified lines
140140 return -ENOMEM;
141141
142142 *drvdata = (struct open_dice_drvdata){
143− .lock = __MUTEX_INITIALIZER(drvdata->lock),
144143 .rmem = rmem,
145144 .misc = (struct miscdevice){
146145 .parent = dev,
@@ -150,6 +149,7 @@ static int __init open_dice_probe(struct platform_device *pdev) · 3 unmodified lines
150149 .mode = 0600,
151150 },
152151 };
152+ mutex_init(&drvdata->lock);
153153
154154 /* Index overflow check not needed, misc_register() will fail. */
155155 snprintf(drvdata->name, sizeof(drvdata->name), DRIVER_NAME"%u", dev_idx++);
drivers/mmc/core/slot-gpio.c+5−1
@@ -75,11 +75,15 @@ EXPORT_SYMBOL(mmc_gpio_set_cd_irq); · 74 unmodified lines
7575 int mmc_gpio_get_ro(struct mmc_host *host)
7676 {
7777 struct mmc_gpio *ctx = host->slot.handler_priv;
78+ int cansleep;
7879
7980 if (!ctx || !ctx->ro_gpio)
8081 return -ENOSYS;
8182
82− return gpiod_get_value_cansleep(ctx->ro_gpio);
83+ cansleep = gpiod_cansleep(ctx->ro_gpio);
84+ return cansleep ?
85+ gpiod_get_value_cansleep(ctx->ro_gpio) :
86+ gpiod_get_value(ctx->ro_gpio);
8387 }
8488 EXPORT_SYMBOL(mmc_gpio_get_ro);
8589
drivers/mmc/host/sdhci-pci-o2micro.c+30−0
@@ -693,6 +693,35 @@ static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *io · 692 unmodified lines
693693 return 0;
694694 }
695695
696+static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd)
697+{
698+ struct sdhci_pci_chip *chip;
699+ struct sdhci_pci_slot *slot = sdhci_priv(host);
700+ u32 scratch_32 = 0;
701+ u8 scratch_8 = 0;
702+
703+ chip = slot->chip;
704+
705+ if (mode == MMC_POWER_OFF) {
706+ /* UnLock WP */
707+ pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
708+ scratch_8 &= 0x7f;
709+ pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
710+
711+ /* Set PCR 0x354[16] to switch Clock Source back to OPE Clock */
712+ pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
713+ scratch_32 &= ~(O2_SD_SEL_DLL);
714+ pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
715+
716+ /* Lock WP */
717+ pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
718+ scratch_8 |= 0x80;
719+ pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
720+ }
721+
722+ sdhci_set_power(host, mode, vdd);
723+}
724+
696725 static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
697726 {
698727 struct sdhci_pci_chip *chip;
@@ -1051,6 +1080,7 @@ static const struct sdhci_ops sdhci_pci_o2_ops = { · 352 unmodified lines
10511080 .set_bus_width = sdhci_set_bus_width,
10521081 .reset = sdhci_reset,
10531082 .set_uhs_signaling = sdhci_set_uhs_signaling,
1083+ .set_power = sdhci_pci_o2_set_power,
10541084 };
10551085
10561086 const struct sdhci_pci_fixes sdhci_o2 = {
drivers/net/dsa/mt7530.c+1−2
@@ -2838,8 +2838,7 @@ static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port, · 2837 unmodified lines
28382838 /* MT753x MAC works in 1G full duplex mode for all up-clocked
28392839 * variants.
28402840 */
2841− if (interface == PHY_INTERFACE_MODE_INTERNAL ||
2842− interface == PHY_INTERFACE_MODE_TRGMII ||
2841+ if (interface == PHY_INTERFACE_MODE_TRGMII ||
28432842 (phy_interface_mode_is_8023z(interface))) {
28442843 speed = SPEED_1000;
28452844 duplex = DUPLEX_FULL;
drivers/net/dsa/mv88e6xxx/chip.c+1−1
@@ -3659,7 +3659,7 @@ static int mv88e6xxx_mdio_read_c45(struct mii_bus *bus, int phy, int devad, · 3658 unmodified lines
36593659 int err;
36603660
36613661 if (!chip->info->ops->phy_read_c45)
3662− return -EOPNOTSUPP;
3662+ return 0xffff;
36633663
36643664 mv88e6xxx_reg_lock(chip);
36653665 err = chip->info->ops->phy_read_c45(chip, bus, phy, devad, reg, &val);
drivers/net/dsa/qca/qca8k-8xxx.c+1−2
@@ -2051,12 +2051,11 @@ qca8k_sw_probe(struct mdio_device *mdiodev) · 2050 unmodified lines
20512051 priv->info = of_device_get_match_data(priv->dev);
20522052
20532053 priv->reset_gpio = devm_gpiod_get_optional(priv->dev, "reset",
2054− GPIOD_ASIS);
2054+ GPIOD_OUT_HIGH);
20552055 if (IS_ERR(priv->reset_gpio))
20562056 return PTR_ERR(priv->reset_gpio);
20572057
20582058 if (priv->reset_gpio) {
2059− gpiod_set_value_cansleep(priv->reset_gpio, 1);
20602059 /* The active low duration must be greater than 10 ms
20612060 * and checkpatch.pl wants 20 ms.
20622061 */
drivers/net/ethernet/8390/8390.c+1−0
@@ -100,4 +100,5 @@ static void __exit ns8390_module_exit(void) · 99 unmodified lines
100100 module_init(ns8390_module_init);
101101 module_exit(ns8390_module_exit);
102102 #endif /* MODULE */
103+MODULE_DESCRIPTION("National Semiconductor 8390 core driver");
103104 MODULE_LICENSE("GPL");
drivers/net/ethernet/8390/8390p.c+1−0
@@ -102,4 +102,5 @@ static void __exit NS8390p_cleanup_module(void) · 101 unmodified lines
102102
103103 module_init(NS8390p_init_module);
104104 module_exit(NS8390p_cleanup_module);
105+MODULE_DESCRIPTION("National Semiconductor 8390 core for ISA driver");
105106 MODULE_LICENSE("GPL");
drivers/net/ethernet/8390/apne.c+1−0
@@ -610,4 +610,5 @@ static int init_pcmcia(void) · 609 unmodified lines
610610 return 1;
611611 }
612612
613+MODULE_DESCRIPTION("National Semiconductor 8390 Amiga PCMCIA ethernet driver");
613614 MODULE_LICENSE("GPL");
drivers/net/ethernet/8390/hydra.c+1−0
@@ -270,4 +270,5 @@ static void __exit hydra_cleanup_module(void) · 269 unmodified lines
270270 module_init(hydra_init_module);
271271 module_exit(hydra_cleanup_module);
272272
273+MODULE_DESCRIPTION("Zorro-II Hydra 8390 ethernet driver");
273274 MODULE_LICENSE("GPL");
drivers/net/ethernet/8390/stnic.c+1−0
@@ -296,4 +296,5 @@ static void __exit stnic_cleanup(void) · 295 unmodified lines
296296
297297 module_init(stnic_probe);
298298 module_exit(stnic_cleanup);
299+MODULE_DESCRIPTION("National Semiconductor DP83902AV ethernet driver");
299300 MODULE_LICENSE("GPL");
drivers/net/ethernet/8390/zorro8390.c+1−0
@@ -443,4 +443,5 @@ static void __exit zorro8390_cleanup_module(void) · 442 unmodified lines
443443 module_init(zorro8390_init_module);
444444 module_exit(zorro8390_cleanup_module);
445445
446+MODULE_DESCRIPTION("Zorro NS8390-based ethernet driver");
446447 MODULE_LICENSE("GPL");
drivers/net/ethernet/amd/pds_core/adminq.c+48−16
@@ -63,6 +63,15 @@ static int pdsc_process_notifyq(struct pdsc_qcq *qcq) · 62 unmodified lines
6363 return nq_work;
6464 }
6565
66+static bool pdsc_adminq_inc_if_up(struct pdsc *pdsc)
67+{
68+ if (pdsc->state & BIT_ULL(PDSC_S_STOPPING_DRIVER) ||
69+ pdsc->state & BIT_ULL(PDSC_S_FW_DEAD))
70+ return false;
71+
72+ return refcount_inc_not_zero(&pdsc->adminq_refcnt);
73+}
74+
6675 void pdsc_process_adminq(struct pdsc_qcq *qcq)
6776 {
6877 union pds_core_adminq_comp *comp;
@@ -75,9 +84,9 @@ void pdsc_process_adminq(struct pdsc_qcq *qcq) · 6 unmodified lines
7584 int aq_work = 0;
7685 int credits;
7786
78− /* Don't process AdminQ when shutting down */
79− if (pdsc->state & BIT_ULL(PDSC_S_STOPPING_DRIVER)) {
80− dev_err(pdsc->dev, "%s: called while PDSC_S_STOPPING_DRIVER\n",
87+ /* Don't process AdminQ when it's not up */
88+ if (!pdsc_adminq_inc_if_up(pdsc)) {
89+ dev_err(pdsc->dev, "%s: called while adminq is unavailable\n",
8190 __func__);
8291 return;
8392 }
@@ -124,6 +133,7 @@ credits: · 40 unmodified lines
124133 pds_core_intr_credits(&pdsc->intr_ctrl[qcq->intx],
125134 credits,
126135 PDS_CORE_INTR_CRED_REARM);
136+ refcount_dec(&pdsc->adminq_refcnt);
127137 }
128138
129139 void pdsc_work_thread(struct work_struct *work)
@@ -135,18 +145,20 @@ void pdsc_work_thread(struct work_struct *work) · 5 unmodified lines
135145
136146 irqreturn_t pdsc_adminq_isr(int irq, void *data)
137147 {
138− struct pdsc_qcq *qcq = data;
139− struct pdsc *pdsc = qcq->pdsc;
148+ struct pdsc *pdsc = data;
149+ struct pdsc_qcq *qcq;
140150
141− /* Don't process AdminQ when shutting down */
142− if (pdsc->state & BIT_ULL(PDSC_S_STOPPING_DRIVER)) {
143− dev_err(pdsc->dev, "%s: called while PDSC_S_STOPPING_DRIVER\n",
151+ /* Don't process AdminQ when it's not up */
152+ if (!pdsc_adminq_inc_if_up(pdsc)) {
153+ dev_err(pdsc->dev, "%s: called while adminq is unavailable\n",
144154 __func__);
145155 return IRQ_HANDLED;
146156 }
147157
158+ qcq = &pdsc->adminqcq;
148159 queue_work(pdsc->wq, &qcq->work);
149160 pds_core_intr_mask(&pdsc->intr_ctrl[qcq->intx], PDS_CORE_INTR_MASK_CLEAR);
161+ refcount_dec(&pdsc->adminq_refcnt);
150162
151163 return IRQ_HANDLED;
152164 }
@@ -179,10 +191,16 @@ static int __pdsc_adminq_post(struct pdsc *pdsc, · 26 unmodified lines
179191
180192 /* Check that the FW is running */
181193 if (!pdsc_is_fw_running(pdsc)) {
182− u8 fw_status = ioread8(&pdsc->info_regs->fw_status);
183−
184− dev_info(pdsc->dev, "%s: post failed - fw not running %#02x:\n",
185− __func__, fw_status);
194+ if (pdsc->info_regs) {
195+ u8 fw_status =
196+ ioread8(&pdsc->info_regs->fw_status);
197+
198+ dev_info(pdsc->dev, "%s: post failed - fw not running %#02x:\n",
199+ __func__, fw_status);
200+ } else {
201+ dev_info(pdsc->dev, "%s: post failed - BARs not setup\n",
202+ __func__);
203+ }
186204 ret = -ENXIO;
187205
188206 goto err_out_unlock;
@@ -230,6 +248,12 @@ int pdsc_adminq_post(struct pdsc *pdsc, · 41 unmodified lines
230248 int err = 0;
231249 int index;
232250
251+ if (!pdsc_adminq_inc_if_up(pdsc)) {
252+ dev_dbg(pdsc->dev, "%s: preventing adminq cmd %u\n",
253+ __func__, cmd->opcode);
254+ return -ENXIO;
255+ }
256+
233257 wc.qcq = &pdsc->adminqcq;
234258 index = __pdsc_adminq_post(pdsc, &pdsc->adminqcq, cmd, comp, &wc);
235259 if (index < 0) {
@@ -248,10 +272,16 @@ int pdsc_adminq_post(struct pdsc *pdsc, · 12 unmodified lines
248272 break;
249273
250274 if (!pdsc_is_fw_running(pdsc)) {
251− u8 fw_status = ioread8(&pdsc->info_regs->fw_status);
252−
253− dev_dbg(pdsc->dev, "%s: post wait failed - fw not running %#02x:\n",
254− __func__, fw_status);
275+ if (pdsc->info_regs) {
276+ u8 fw_status =
277+ ioread8(&pdsc->info_regs->fw_status);
278+
279+ dev_dbg(pdsc->dev, "%s: post wait failed - fw not running %#02x:\n",
280+ __func__, fw_status);
281+ } else {
282+ dev_dbg(pdsc->dev, "%s: post wait failed - BARs not setup\n",
283+ __func__);
284+ }
255285 err = -ENXIO;
256286 break;
257287 }
@@ -285,6 +315,8 @@ err_out: · 27 unmodified lines
285315 queue_work(pdsc->wq, &pdsc->health_work);
286316 }
287317
318+ refcount_dec(&pdsc->adminq_refcnt);
319+
288320 return err;
289321 }
290322 EXPORT_SYMBOL_GPL(pdsc_adminq_post);
drivers/net/ethernet/amd/pds_core/core.c+36−10
@@ -125,7 +125,7 @@ static int pdsc_qcq_intr_alloc(struct pdsc *pdsc, struct pdsc_qcq *qcq) · 124 unmodified lines
125125
126126 snprintf(name, sizeof(name), "%s-%d-%s",
127127 PDS_CORE_DRV_NAME, pdsc->pdev->bus->number, qcq->q.name);
128− index = pdsc_intr_alloc(pdsc, name, pdsc_adminq_isr, qcq);
128+ index = pdsc_intr_alloc(pdsc, name, pdsc_adminq_isr, pdsc);
129129 if (index < 0)
130130 return index;
131131 qcq->intx = index;
@@ -404,10 +404,7 @@ int pdsc_setup(struct pdsc *pdsc, bool init) · 272 unmodified lines
404404 int numdescs;
405405 int err;
406406
407− if (init)
408− err = pdsc_dev_init(pdsc);
409− else
410− err = pdsc_dev_reinit(pdsc);
407+ err = pdsc_dev_init(pdsc);
411408 if (err)
412409 return err;
413410
@@ -450,6 +447,7 @@ int pdsc_setup(struct pdsc *pdsc, bool init) · 36 unmodified lines
450447 pdsc_debugfs_add_viftype(pdsc);
451448 }
452449
450+ refcount_set(&pdsc->adminq_refcnt, 1);
453451 clear_bit(PDSC_S_FW_DEAD, &pdsc->state);
454452 return 0;
455453
@@ -464,6 +462,8 @@ void pdsc_teardown(struct pdsc *pdsc, bool removing) · 8 unmodified lines
464462
465463 if (!pdsc->pdev->is_virtfn)
466464 pdsc_devcmd_reset(pdsc);
465+ if (pdsc->adminqcq.work.func)
466+ cancel_work_sync(&pdsc->adminqcq.work);
467467 pdsc_qcq_free(pdsc, &pdsc->notifyqcq);
468468 pdsc_qcq_free(pdsc, &pdsc->adminqcq);
469469
@@ -476,10 +476,9 @@ void pdsc_teardown(struct pdsc *pdsc, bool removing) · 6 unmodified lines
476476 for (i = 0; i < pdsc->nintrs; i++)
477477 pdsc_intr_free(pdsc, i);
478478
479− if (removing) {
480− kfree(pdsc->intr_info);
481− pdsc->intr_info = NULL;
482− }
479+ kfree(pdsc->intr_info);
480+ pdsc->intr_info = NULL;
481+ pdsc->nintrs = 0;
483482 }
484483
485484 if (pdsc->kern_dbpage) {
@@ -487,6 +486,7 @@ void pdsc_teardown(struct pdsc *pdsc, bool removing) · 1 unmodified line
487486 pdsc->kern_dbpage = NULL;
488487 }
489488
489+ pci_free_irq_vectors(pdsc->pdev);
490490 set_bit(PDSC_S_FW_DEAD, &pdsc->state);
491491 }
492492
@@ -512,6 +512,24 @@ void pdsc_stop(struct pdsc *pdsc) · 19 unmodified lines
512512 PDS_CORE_INTR_MASK_SET);
513513 }
514514
515+static void pdsc_adminq_wait_and_dec_once_unused(struct pdsc *pdsc)
516+{
517+ /* The driver initializes the adminq_refcnt to 1 when the adminq is
518+ * allocated and ready for use. Other users/requesters will increment
519+ * the refcnt while in use. If the refcnt is down to 1 then the adminq
520+ * is not in use and the refcnt can be cleared and adminq freed. Before
521+ * calling this function the driver will set PDSC_S_FW_DEAD, which
522+ * prevent subsequent attempts to use the adminq and increment the
523+ * refcnt to fail. This guarantees that this function will eventually
524+ * exit.
525+ */
526+ while (!refcount_dec_if_one(&pdsc->adminq_refcnt)) {
527+ dev_dbg_ratelimited(pdsc->dev, "%s: adminq in use\n",
528+ __func__);
529+ cpu_relax();
530+ }
531+}
532+
515533 void pdsc_fw_down(struct pdsc *pdsc)
516534 {
517535 union pds_core_notifyq_comp reset_event = {
@@ -527,6 +545,8 @@ void pdsc_fw_down(struct pdsc *pdsc) · 9 unmodified lines
527545 if (pdsc->pdev->is_virtfn)
528546 return;
529547
548+ pdsc_adminq_wait_and_dec_once_unused(pdsc);
549+
530550 /* Notify clients of fw_down */
531551 if (pdsc->fw_reporter)
532552 devlink_health_report(pdsc->fw_reporter, "FW down reported", pdsc);
@@ -577,7 +597,13 @@ err_out: · 44 unmodified lines
577597
578598 static void pdsc_check_pci_health(struct pdsc *pdsc)
579599 {
580− u8 fw_status = ioread8(&pdsc->info_regs->fw_status);
600+ u8 fw_status;
601+
602+ /* some sort of teardown already in progress */
603+ if (!pdsc->info_regs)
604+ return;
605+
606+ fw_status = ioread8(&pdsc->info_regs->fw_status);
581607
582608 /* is PCI broken? */
583609 if (fw_status != PDS_RC_BAD_PCI)
drivers/net/ethernet/amd/pds_core/core.h+1−1
@@ -184,6 +184,7 @@ struct pdsc { · 183 unmodified lines
184184 struct mutex devcmd_lock; /* lock for dev_cmd operations */
185185 struct mutex config_lock; /* lock for configuration operations */
186186 spinlock_t adminq_lock; /* lock for adminq operations */
187+ refcount_t adminq_refcnt;
187188 struct pds_core_dev_info_regs __iomem *info_regs;
188189 struct pds_core_dev_cmd_regs __iomem *cmd_regs;
189190 struct pds_core_intr __iomem *intr_ctrl;
@@ -280,7 +281,6 @@ int pdsc_devcmd_locked(struct pdsc *pdsc, union pds_core_dev_cmd *cmd, · 90 unmodified lines
280281 union pds_core_dev_comp *comp, int max_seconds);
281282 int pdsc_devcmd_init(struct pdsc *pdsc);
282283 int pdsc_devcmd_reset(struct pdsc *pdsc);
283−int pdsc_dev_reinit(struct pdsc *pdsc);
284284 int pdsc_dev_init(struct pdsc *pdsc);
285285
286286 void pdsc_reset_prepare(struct pci_dev *pdev);
drivers/net/ethernet/amd/pds_core/debugfs.c+4−0
@@ -64,6 +64,10 @@ DEFINE_SHOW_ATTRIBUTE(identity); · 63 unmodified lines
6464
6565 void pdsc_debugfs_add_ident(struct pdsc *pdsc)
6666 {
67+ /* This file will already exist in the reset flow */
68+ if (debugfs_lookup("identity", pdsc->dentry))
69+ return;
70+
6771 debugfs_create_file("identity", 0400, pdsc->dentry,
6872 pdsc, &identity_fops);
6973 }
drivers/net/ethernet/amd/pds_core/dev.c+8−8
@@ -57,6 +57,9 @@ int pdsc_err_to_errno(enum pds_core_status_code code) · 56 unmodified lines
5757
5858 bool pdsc_is_fw_running(struct pdsc *pdsc)
5959 {
60+ if (!pdsc->info_regs)
61+ return false;
62+
6063 pdsc->fw_status = ioread8(&pdsc->info_regs->fw_status);
6164 pdsc->last_fw_time = jiffies;
6265 pdsc->last_hb = ioread32(&pdsc->info_regs->fw_heartbeat);
@@ -182,13 +185,17 @@ int pdsc_devcmd_locked(struct pdsc *pdsc, union pds_core_dev_cmd *cmd, · 119 unmodified lines
182185 {
183186 int err;
184187
188+ if (!pdsc->cmd_regs)
189+ return -ENXIO;
190+
185191 memcpy_toio(&pdsc->cmd_regs->cmd, cmd, sizeof(*cmd));
186192 pdsc_devcmd_dbell(pdsc);
187193 err = pdsc_devcmd_wait(pdsc, cmd->opcode, max_seconds);
188− memcpy_fromio(comp, &pdsc->cmd_regs->comp, sizeof(*comp));
189194
190195 if ((err == -ENXIO || err == -ETIMEDOUT) && pdsc->wq)
191196 queue_work(pdsc->wq, &pdsc->health_work);
197+ else
198+ memcpy_fromio(comp, &pdsc->cmd_regs->comp, sizeof(*comp));
192199
193200 return err;
194201 }
@@ -309,13 +316,6 @@ static int pdsc_identify(struct pdsc *pdsc) · 114 unmodified lines
309316 return 0;
310317 }
311318
312−int pdsc_dev_reinit(struct pdsc *pdsc)
313−{
314− pdsc_init_devinfo(pdsc);
315−
316− return pdsc_identify(pdsc);
317−}
318−
319319 int pdsc_dev_init(struct pdsc *pdsc)
320320 {
321321 unsigned int nintrs;
drivers/net/ethernet/amd/pds_core/devlink.c+2−1
@@ -111,7 +111,8 @@ int pdsc_dl_info_get(struct devlink *dl, struct devlink_info_req *req, · 110 unmodified lines
111111
112112 mutex_lock(&pdsc->devcmd_lock);
113113 err = pdsc_devcmd_locked(pdsc, &cmd, &comp, pdsc->devcmd_timeout * 2);
114− memcpy_fromio(&fw_list, pdsc->cmd_regs->data, sizeof(fw_list));
114+ if (!err)
115+ memcpy_fromio(&fw_list, pdsc->cmd_regs->data, sizeof(fw_list));
115116 mutex_unlock(&pdsc->devcmd_lock);
116117 if (err && err != -EIO)
117118 return err;
drivers/net/ethernet/amd/pds_core/fw.c+3−0
@@ -107,6 +107,9 @@ int pdsc_firmware_update(struct pdsc *pdsc, const struct firmware *fw, · 106 unmodified lines
107107
108108 dev_info(pdsc->dev, "Installing firmware\n");
109109
110+ if (!pdsc->cmd_regs)
111+ return -ENXIO;
112+
110113 dl = priv_to_devlink(pdsc);
111114 devlink_flash_update_status_notify(dl, "Preparing to flash",
112115 NULL, 0, 0);
drivers/net/ethernet/amd/pds_core/main.c+22−4
@@ -37,6 +37,11 @@ static void pdsc_unmap_bars(struct pdsc *pdsc) · 36 unmodified lines
3737 struct pdsc_dev_bar *bars = pdsc->bars;
3838 unsigned int i;
3939
40+ pdsc->info_regs = NULL;
41+ pdsc->cmd_regs = NULL;
42+ pdsc->intr_status = NULL;
43+ pdsc->intr_ctrl = NULL;
44+
4045 for (i = 0; i < PDS_CORE_BARS_MAX; i++) {
4146 if (bars[i].vaddr)
4247 pci_iounmap(pdsc->pdev, bars[i].vaddr);
@@ -293,7 +298,7 @@ err_out_stop: · 250 unmodified lines
293298 err_out_teardown:
294299 pdsc_teardown(pdsc, PDSC_TEARDOWN_REMOVING);
295300 err_out_unmap_bars:
296− del_timer_sync(&pdsc->wdtimer);
301+ timer_shutdown_sync(&pdsc->wdtimer);
297302 if (pdsc->wq)
298303 destroy_workqueue(pdsc->wq);
299304 mutex_destroy(&pdsc->config_lock);
@@ -420,7 +425,7 @@ static void pdsc_remove(struct pci_dev *pdev) · 120 unmodified lines
420425 */
421426 pdsc_sriov_configure(pdev, 0);
422427
423− del_timer_sync(&pdsc->wdtimer);
428+ timer_shutdown_sync(&pdsc->wdtimer);
424429 if (pdsc->wq)
425430 destroy_workqueue(pdsc->wq);
426431
@@ -433,7 +438,6 @@ static void pdsc_remove(struct pci_dev *pdev) · 6 unmodified lines
433438 mutex_destroy(&pdsc->config_lock);
434439 mutex_destroy(&pdsc->devcmd_lock);
435440
436− pci_free_irq_vectors(pdev);
437441 pdsc_unmap_bars(pdsc);
438442 pci_release_regions(pdev);
439443 }
@@ -445,13 +449,26 @@ static void pdsc_remove(struct pci_dev *pdev) · 5 unmodified lines
445449 devlink_free(dl);
446450 }
447451
452+static void pdsc_stop_health_thread(struct pdsc *pdsc)
453+{
454+ timer_shutdown_sync(&pdsc->wdtimer);
455+ if (pdsc->health_work.func)
456+ cancel_work_sync(&pdsc->health_work);
457+}
458+
459+static void pdsc_restart_health_thread(struct pdsc *pdsc)
460+{
461+ timer_setup(&pdsc->wdtimer, pdsc_wdtimer_cb, 0);
462+ mod_timer(&pdsc->wdtimer, jiffies + 1);
463+}
464+
448465 void pdsc_reset_prepare(struct pci_dev *pdev)
449466 {
450467 struct pdsc *pdsc = pci_get_drvdata(pdev);
451468
469+ pdsc_stop_health_thread(pdsc);
452470 pdsc_fw_down(pdsc);
453471
454− pci_free_irq_vectors(pdev);
455472 pdsc_unmap_bars(pdsc);
456473 pci_release_regions(pdev);
457474 pci_disable_device(pdev);
@@ -486,6 +503,7 @@ void pdsc_reset_done(struct pci_dev *pdev) · 28 unmodified lines
486503 }
487504
488505 pdsc_fw_up(pdsc);
506+ pdsc_restart_health_thread(pdsc);
489507 }
490508
491509 static const struct pci_error_handlers pdsc_err_handler = {
drivers/net/ethernet/aquantia/atlantic/aq_ptp.c+2−2
@@ -993,7 +993,7 @@ int aq_ptp_ring_alloc(struct aq_nic_s *aq_nic) · 992 unmodified lines
993993 return 0;
994994
995995 err_exit_hwts_rx:
996− aq_ring_free(&aq_ptp->hwts_rx);
996+ aq_ring_hwts_rx_free(&aq_ptp->hwts_rx);
997997 err_exit_ptp_rx:
998998 aq_ring_free(&aq_ptp->ptp_rx);
999999 err_exit_ptp_tx:
@@ -1011,7 +1011,7 @@ void aq_ptp_ring_free(struct aq_nic_s *aq_nic) · 11 unmodified lines
10111011
10121012 aq_ring_free(&aq_ptp->ptp_tx);
10131013 aq_ring_free(&aq_ptp->ptp_rx);
1014− aq_ring_free(&aq_ptp->hwts_rx);
1014+ aq_ring_hwts_rx_free(&aq_ptp->hwts_rx);
10151015
10161016 aq_ptp_skb_ring_release(&aq_ptp->skb_ring);
10171017 }
drivers/net/ethernet/aquantia/atlantic/aq_ring.c+13−0
@@ -919,6 +919,19 @@ void aq_ring_free(struct aq_ring_s *self) · 918 unmodified lines
919919 }
920920 }
921921
922+void aq_ring_hwts_rx_free(struct aq_ring_s *self)
923+{
924+ if (!self)
925+ return;
926+
927+ if (self->dx_ring) {
928+ dma_free_coherent(aq_nic_get_dev(self->aq_nic),
929+ self->size * self->dx_size + AQ_CFG_RXDS_DEF,
930+ self->dx_ring, self->dx_ring_pa);
931+ self->dx_ring = NULL;
932+ }
933+}
934+
922935 unsigned int aq_ring_fill_stats_data(struct aq_ring_s *self, u64 *data)
923936 {
924937 unsigned int count;
drivers/net/ethernet/aquantia/atlantic/aq_ring.h+1−0
@@ -210,6 +210,7 @@ int aq_ring_rx_fill(struct aq_ring_s *self); · 209 unmodified lines
210210 int aq_ring_hwts_rx_alloc(struct aq_ring_s *self,
211211 struct aq_nic_s *aq_nic, unsigned int idx,
212212 unsigned int size, unsigned int dx_size);
213+void aq_ring_hwts_rx_free(struct aq_ring_s *self);
213214 void aq_ring_hwts_rx_clean(struct aq_ring_s *self, struct aq_nic_s *aq_nic);
214215
215216 unsigned int aq_ring_fill_stats_data(struct aq_ring_s *self, u64 *data);
drivers/net/ethernet/broadcom/bcm4908_enet.c+1−0
@@ -793,5 +793,6 @@ static struct platform_driver bcm4908_enet_driver = { · 792 unmodified lines
793793 };
794794 module_platform_driver(bcm4908_enet_driver);
795795
796+MODULE_DESCRIPTION("Broadcom BCM4908 Gigabit Ethernet driver");
796797 MODULE_LICENSE("GPL v2");
797798 MODULE_DEVICE_TABLE(of, bcm4908_enet_of_match);
drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c+1−0
@@ -260,4 +260,5 @@ void bcma_mdio_mii_unregister(struct mii_bus *mii_bus) · 259 unmodified lines
260260 EXPORT_SYMBOL_GPL(bcma_mdio_mii_unregister);
261261
262262 MODULE_AUTHOR("Rafał Miłecki");
263+MODULE_DESCRIPTION("Broadcom iProc GBit BCMA MDIO helpers");
263264 MODULE_LICENSE("GPL");
drivers/net/ethernet/broadcom/bgmac-bcma.c+1−0
@@ -362,4 +362,5 @@ module_init(bgmac_init) · 361 unmodified lines
362362 module_exit(bgmac_exit)
363363
364364 MODULE_AUTHOR("Rafał Miłecki");
365+MODULE_DESCRIPTION("Broadcom iProc GBit BCMA interface driver");
365366 MODULE_LICENSE("GPL");
drivers/net/ethernet/broadcom/bgmac-platform.c+1−0
@@ -298,4 +298,5 @@ static struct platform_driver bgmac_enet_driver = { · 297 unmodified lines
298298 };
299299
300300 module_platform_driver(bgmac_enet_driver);
301+MODULE_DESCRIPTION("Broadcom iProc GBit platform interface driver");
301302 MODULE_LICENSE("GPL");
drivers/net/ethernet/broadcom/bgmac.c+1−0
@@ -1626,4 +1626,5 @@ int bgmac_enet_resume(struct bgmac *bgmac) · 1625 unmodified lines
16261626 EXPORT_SYMBOL_GPL(bgmac_enet_resume);
16271627
16281628 MODULE_AUTHOR("Rafał Miłecki");
1629+MODULE_DESCRIPTION("Broadcom iProc GBit driver");
16291630 MODULE_LICENSE("GPL");
drivers/net/ethernet/broadcom/bnxt/bnxt.c+35−14
@@ -3817,7 +3817,7 @@ static int bnxt_alloc_cp_rings(struct bnxt *bp) · 3816 unmodified lines
38173817 {
38183818 bool sh = !!(bp->flags & BNXT_FLAG_SHARED_RINGS);
38193819 int i, j, rc, ulp_base_vec, ulp_msix;
3820− int tcs = netdev_get_num_tc(bp->dev);
3820+ int tcs = bp->num_tc;
38213821
38223822 if (!tcs)
38233823 tcs = 1;
@@ -5935,8 +5935,12 @@ static u16 bnxt_get_max_rss_ring(struct bnxt *bp) · 2111 unmodified lines
59355935
59365936 int bnxt_get_nr_rss_ctxs(struct bnxt *bp, int rx_rings)
59375937 {
5938− if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
5939− return DIV_ROUND_UP(rx_rings, BNXT_RSS_TABLE_ENTRIES_P5);
5938+ if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
5939+ if (!rx_rings)
5940+ return 0;
5941+ return bnxt_calc_nr_ring_pages(rx_rings - 1,
5942+ BNXT_RSS_TABLE_ENTRIES_P5);
5943+ }
59405944 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
59415945 return 2;
59425946 return 1;
@@ -6926,7 +6930,7 @@ static int bnxt_hwrm_get_rings(struct bnxt *bp) · 983 unmodified lines
69266930 if (cp < (rx + tx)) {
69276931 rc = __bnxt_trim_rings(bp, &rx, &tx, cp, false);
69286932 if (rc)
6929− return rc;
6933+ goto get_rings_exit;
69306934 if (bp->flags & BNXT_FLAG_AGG_RINGS)
69316935 rx <<= 1;
69326936 hw_resc->resv_rx_rings = rx;
@@ -6938,8 +6942,9 @@ static int bnxt_hwrm_get_rings(struct bnxt *bp) · 5 unmodified lines
69386942 hw_resc->resv_cp_rings = cp;
69396943 hw_resc->resv_stat_ctxs = stats;
69406944 }
6945+get_rings_exit:
69416946 hwrm_req_drop(bp, req);
6942− return 0;
6947+ return rc;
69436948 }
69446949
69456950 int __bnxt_hwrm_get_tx_rings(struct bnxt *bp, u16 fid, int *tx_rings)
@@ -7000,10 +7005,11 @@ __bnxt_hwrm_reserve_pf_rings(struct bnxt *bp, int tx_rings, int rx_rings, · 54 unmodified lines
70007005
70017006 req->num_rx_rings = cpu_to_le16(rx_rings);
70027007 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
7008+ u16 rss_ctx = bnxt_get_nr_rss_ctxs(bp, ring_grps);
7009+
70037010 req->num_cmpl_rings = cpu_to_le16(tx_rings + ring_grps);
70047011 req->num_msix = cpu_to_le16(cp_rings);
7005− req->num_rsscos_ctxs =
7006− cpu_to_le16(DIV_ROUND_UP(ring_grps, 64));
7012+ req->num_rsscos_ctxs = cpu_to_le16(rss_ctx);
70077013 } else {
70087014 req->num_cmpl_rings = cpu_to_le16(cp_rings);
70097015 req->num_hw_ring_grps = cpu_to_le16(ring_grps);
@@ -7050,8 +7056,10 @@ __bnxt_hwrm_reserve_vf_rings(struct bnxt *bp, int tx_rings, int rx_rings, · 40 unmodified lines
70507056 req->num_tx_rings = cpu_to_le16(tx_rings);
70517057 req->num_rx_rings = cpu_to_le16(rx_rings);
70527058 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
7059+ u16 rss_ctx = bnxt_get_nr_rss_ctxs(bp, ring_grps);
7060+
70537061 req->num_cmpl_rings = cpu_to_le16(tx_rings + ring_grps);
7054− req->num_rsscos_ctxs = cpu_to_le16(DIV_ROUND_UP(ring_grps, 64));
7062+ req->num_rsscos_ctxs = cpu_to_le16(rss_ctx);
70557063 } else {
70567064 req->num_cmpl_rings = cpu_to_le16(cp_rings);
70577065 req->num_hw_ring_grps = cpu_to_le16(ring_grps);
@@ -9938,7 +9946,7 @@ static int __bnxt_num_tx_to_cp(struct bnxt *bp, int tx, int tx_sets, int tx_xdp) · 2880 unmodified lines
99389946
99399947 int bnxt_num_tx_to_cp(struct bnxt *bp, int tx)
99409948 {
9941− int tcs = netdev_get_num_tc(bp->dev);
9949+ int tcs = bp->num_tc;
99429950
99439951 if (!tcs)
99449952 tcs = 1;
@@ -9947,7 +9955,7 @@ int bnxt_num_tx_to_cp(struct bnxt *bp, int tx) · 2 unmodified lines
99479955
99489956 static int bnxt_num_cp_to_tx(struct bnxt *bp, int tx_cp)
99499957 {
9950− int tcs = netdev_get_num_tc(bp->dev);
9958+ int tcs = bp->num_tc;
99519959
99529960 return (tx_cp - bp->tx_nr_rings_xdp) * tcs +
99539961 bp->tx_nr_rings_xdp;
@@ -9977,7 +9985,7 @@ static void bnxt_setup_msix(struct bnxt *bp) · 23 unmodified lines
99779985 struct net_device *dev = bp->dev;
99789986 int tcs, i;
99799987
9980− tcs = netdev_get_num_tc(dev);
9988+ tcs = bp->num_tc;
99819989 if (tcs) {
99829990 int i, off, count;
99839991
@@ -10009,8 +10017,10 @@ static void bnxt_setup_inta(struct bnxt *bp) · 25 unmodified lines
1000910017 {
1001010018 const int len = sizeof(bp->irq_tbl[0].name);
1001110019
10012− if (netdev_get_num_tc(bp->dev))
10020+ if (bp->num_tc) {
1001310021 netdev_reset_tc(bp->dev);
10022+ bp->num_tc = 0;
10023+ }
1001410024
1001510025 snprintf(bp->irq_tbl[0].name, len, "%s-%s-%d", bp->dev->name, "TxRx",
1001610026 0);
@@ -10236,8 +10246,8 @@ static void bnxt_clear_int_mode(struct bnxt *bp) · 219 unmodified lines
1023610246
1023710247 int bnxt_reserve_rings(struct bnxt *bp, bool irq_re_init)
1023810248 {
10239− int tcs = netdev_get_num_tc(bp->dev);
1024010249 bool irq_cleared = false;
10250+ int tcs = bp->num_tc;
1024110251 int rc;
1024210252
1024310253 if (!bnxt_need_reserve_rings(bp))
@@ -10263,6 +10273,7 @@ int bnxt_reserve_rings(struct bnxt *bp, bool irq_re_init) · 19 unmodified lines
1026310273 bp->tx_nr_rings - bp->tx_nr_rings_xdp)) {
1026410274 netdev_err(bp->dev, "tx ring reservation failure\n");
1026510275 netdev_reset_tc(bp->dev);
10276+ bp->num_tc = 0;
1026610277 if (bp->tx_nr_rings_xdp)
1026710278 bp->tx_nr_rings_per_tc = bp->tx_nr_rings_xdp;
1026810279 else
@@ -11564,10 +11575,12 @@ int bnxt_half_open_nic(struct bnxt *bp) · 1295 unmodified lines
1156411575 netdev_err(bp->dev, "bnxt_alloc_mem err: %x\n", rc);
1156511576 goto half_open_err;
1156611577 }
11578+ bnxt_init_napi(bp);
1156711579 set_bit(BNXT_STATE_HALF_OPEN, &bp->state);
1156811580 rc = bnxt_init_nic(bp, true);
1156911581 if (rc) {
1157011582 clear_bit(BNXT_STATE_HALF_OPEN, &bp->state);
11583+ bnxt_del_napi(bp);
1157111584 netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc);
1157211585 goto half_open_err;
1157311586 }
@@ -11586,6 +11599,7 @@ half_open_err: · 12 unmodified lines
1158611599 void bnxt_half_close_nic(struct bnxt *bp)
1158711600 {
1158811601 bnxt_hwrm_resource_free(bp, false, true);
11602+ bnxt_del_napi(bp);
1158911603 bnxt_free_skbs(bp);
1159011604 bnxt_free_mem(bp, true);
1159111605 clear_bit(BNXT_STATE_HALF_OPEN, &bp->state);
@@ -13232,6 +13246,11 @@ static int bnxt_fw_init_one_p1(struct bnxt *bp) · 1640 unmodified lines
1323213246
1323313247 bp->fw_cap = 0;
1323413248 rc = bnxt_hwrm_ver_get(bp);
13249+ /* FW may be unresponsive after FLR. FLR must complete within 100 msec
13250+ * so wait before continuing with recovery.
13251+ */
13252+ if (rc)
13253+ msleep(100);
1323513254 bnxt_try_map_fw_health_reg(bp);
1323613255 if (rc) {
1323713256 rc = bnxt_try_recover_fw(bp);
@@ -13784,7 +13803,7 @@ int bnxt_setup_mq_tc(struct net_device *dev, u8 tc) · 546 unmodified lines
1378413803 return -EINVAL;
1378513804 }
1378613805
13787− if (netdev_get_num_tc(dev) == tc)
13806+ if (bp->num_tc == tc)
1378813807 return 0;
1378913808
1379013809 if (bp->flags & BNXT_FLAG_SHARED_RINGS)
@@ -13802,9 +13821,11 @@ int bnxt_setup_mq_tc(struct net_device *dev, u8 tc) · 11 unmodified lines
1380213821 if (tc) {
1380313822 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tc;
1380413823 netdev_set_num_tc(dev, tc);
13824+ bp->num_tc = tc;
1380513825 } else {
1380613826 bp->tx_nr_rings = bp->tx_nr_rings_per_tc;
1380713827 netdev_reset_tc(dev);
13828+ bp->num_tc = 0;
1380813829 }
1380913830 bp->tx_nr_rings += bp->tx_nr_rings_xdp;
1381013831 tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings);
drivers/net/ethernet/broadcom/bnxt/bnxt.h+1−0
@@ -2225,6 +2225,7 @@ struct bnxt { · 2224 unmodified lines
22252225 u8 tc_to_qidx[BNXT_MAX_QUEUE];
22262226 u8 q_ids[BNXT_MAX_QUEUE];
22272227 u8 max_q;
2228+ u8 num_tc;
22282229
22292230 unsigned int current_interval;
22302231 #define BNXT_TIMER_INTERVAL HZ
drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c+1−1
@@ -228,7 +228,7 @@ static int bnxt_queue_remap(struct bnxt *bp, unsigned int lltc_mask) · 227 unmodified lines
228228 }
229229 }
230230 if (bp->ieee_ets) {
231− int tc = netdev_get_num_tc(bp->dev);
231+ int tc = bp->num_tc;
232232
233233 if (!tc)
234234 tc = 1;
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c+4−3
@@ -884,7 +884,7 @@ static void bnxt_get_channels(struct net_device *dev, · 883 unmodified lines
884884 if (max_tx_sch_inputs)
885885 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
886886
887− tcs = netdev_get_num_tc(dev);
887+ tcs = bp->num_tc;
888888 tx_grps = max(tcs, 1);
889889 if (bp->tx_nr_rings_xdp)
890890 tx_grps++;
@@ -944,7 +944,7 @@ static int bnxt_set_channels(struct net_device *dev, · 53 unmodified lines
944944 if (channel->combined_count)
945945 sh = true;
946946
947− tcs = netdev_get_num_tc(dev);
947+ tcs = bp->num_tc;
948948
949949 req_tx_rings = sh ? channel->combined_count : channel->tx_count;
950950 req_rx_rings = sh ? channel->combined_count : channel->rx_count;
@@ -1574,7 +1574,8 @@ u32 bnxt_get_rxfh_indir_size(struct net_device *dev) · 623 unmodified lines
15741574 struct bnxt *bp = netdev_priv(dev);
15751575
15761576 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
1577− return ALIGN(bp->rx_nr_rings, BNXT_RSS_TABLE_ENTRIES_P5);
1577+ return bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) *
1578+ BNXT_RSS_TABLE_ENTRIES_P5;
15781579 return HW_HASH_INDEX_SIZE;
15791580 }
15801581
drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c+1−1
@@ -684,7 +684,7 @@ static void bnxt_stamp_tx_skb(struct bnxt *bp, struct sk_buff *skb) · 683 unmodified lines
684684 timestamp.hwtstamp = ns_to_ktime(ns);
685685 skb_tstamp_tx(ptp->tx_skb, &timestamp);
686686 } else {
687− netdev_WARN_ONCE(bp->dev,
687+ netdev_warn_once(bp->dev,
688688 "TS query for TX timer failed rc = %x\n", rc);
689689 }
690690
drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c+1−1
@@ -407,7 +407,7 @@ static int bnxt_xdp_set(struct bnxt *bp, struct bpf_prog *prog) · 406 unmodified lines
407407 if (prog)
408408 tx_xdp = bp->rx_nr_rings;
409409
410− tc = netdev_get_num_tc(dev);
410+ tc = bp->num_tc;
411411 if (!tc)
412412 tc = 1;
413413 rc = bnxt_check_rings(bp, bp->tx_nr_rings_per_tc, bp->rx_nr_rings,
drivers/net/ethernet/cavium/liquidio/lio_core.c+1−0
@@ -27,6 +27,7 @@ · 26 unmodified lines
2727 #include "octeon_network.h"
2828
2929 MODULE_AUTHOR("Cavium Networks, <support@cavium.com>");
30+MODULE_DESCRIPTION("Cavium LiquidIO Intelligent Server Adapter Core");
3031 MODULE_LICENSE("GPL");
3132
3233 /* OOM task polling interval */
drivers/net/ethernet/cirrus/ep93xx_eth.c+1−0
@@ -868,5 +868,6 @@ static struct platform_driver ep93xx_eth_driver = { · 867 unmodified lines
868868
869869 module_platform_driver(ep93xx_eth_driver);
870870
871+MODULE_DESCRIPTION("Cirrus EP93xx Ethernet driver");
871872 MODULE_LICENSE("GPL");
872873 MODULE_ALIAS("platform:ep93xx-eth");
drivers/net/ethernet/engleder/tsnep_main.c+27−6
@@ -719,17 +719,25 @@ static void tsnep_xdp_xmit_flush(struct tsnep_tx *tx) · 718 unmodified lines
719719
720720 static bool tsnep_xdp_xmit_back(struct tsnep_adapter *adapter,
721721 struct xdp_buff *xdp,
722− struct netdev_queue *tx_nq, struct tsnep_tx *tx)
722+ struct netdev_queue *tx_nq, struct tsnep_tx *tx,
723+ bool zc)
723724 {
724725 struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
725726 bool xmit;
727+ u32 type;
726728
727729 if (unlikely(!xdpf))
728730 return false;
729731
732+ /* no page pool for zero copy */
733+ if (zc)
734+ type = TSNEP_TX_TYPE_XDP_NDO;
735+ else
736+ type = TSNEP_TX_TYPE_XDP_TX;
737+
730738 __netif_tx_lock(tx_nq, smp_processor_id());
731739
732− xmit = tsnep_xdp_xmit_frame_ring(xdpf, tx, TSNEP_TX_TYPE_XDP_TX);
740+ xmit = tsnep_xdp_xmit_frame_ring(xdpf, tx, type);
733741
734742 /* Avoid transmit queue timeout since we share it with the slow path */
735743 if (xmit)
@@ -1273,7 +1281,7 @@ static bool tsnep_xdp_run_prog(struct tsnep_rx *rx, struct bpf_prog *prog, · 537 unmodified lines
12731281 case XDP_PASS:
12741282 return false;
12751283 case XDP_TX:
1276− if (!tsnep_xdp_xmit_back(rx->adapter, xdp, tx_nq, tx))
1284+ if (!tsnep_xdp_xmit_back(rx->adapter, xdp, tx_nq, tx, false))
12771285 goto out_failure;
12781286 *status |= TSNEP_XDP_TX;
12791287 return true;
@@ -1323,7 +1331,7 @@ static bool tsnep_xdp_run_prog_zc(struct tsnep_rx *rx, struct bpf_prog *prog, · 43 unmodified lines
13231331 case XDP_PASS:
13241332 return false;
13251333 case XDP_TX:
1326− if (!tsnep_xdp_xmit_back(rx->adapter, xdp, tx_nq, tx))
1334+ if (!tsnep_xdp_xmit_back(rx->adapter, xdp, tx_nq, tx, true))
13271335 goto out_failure;
13281336 *status |= TSNEP_XDP_TX;
13291337 return true;
@@ -1485,7 +1493,7 @@ static int tsnep_rx_poll(struct tsnep_rx *rx, struct napi_struct *napi, · 155 unmodified lines
14851493
14861494 xdp_prepare_buff(&xdp, page_address(entry->page),
14871495 XDP_PACKET_HEADROOM + TSNEP_RX_INLINE_METADATA_SIZE,
1488− length, false);
1496+ length - ETH_FCS_LEN, false);
14891497
14901498 consume = tsnep_xdp_run_prog(rx, prog, &xdp,
14911499 &xdp_status, tx_nq, tx);
@@ -1568,7 +1576,7 @@ static int tsnep_rx_poll_zc(struct tsnep_rx *rx, struct napi_struct *napi, · 76 unmodified lines
15681576 prefetch(entry->xdp->data);
15691577 length = __le32_to_cpu(entry->desc_wb->properties) &
15701578 TSNEP_DESC_LENGTH_MASK;
1571− xsk_buff_set_size(entry->xdp, length);
1579+ xsk_buff_set_size(entry->xdp, length - ETH_FCS_LEN);
15721580 xsk_buff_dma_sync_for_cpu(entry->xdp, rx->xsk_pool);
15731581
15741582 /* RX metadata with timestamps is in front of actual data,
@@ -1762,6 +1770,19 @@ static void tsnep_rx_reopen_xsk(struct tsnep_rx *rx) · 187 unmodified lines
17621770 allocated--;
17631771 }
17641772 }
1773+
1774+ /* set need wakeup flag immediately if ring is not filled completely,
1775+ * first polling would be too late as need wakeup signalisation would
1776+ * be delayed for an indefinite time
1777+ */
1778+ if (xsk_uses_need_wakeup(rx->xsk_pool)) {
1779+ int desc_available = tsnep_rx_desc_available(rx);
1780+
1781+ if (desc_available)
1782+ xsk_set_rx_need_wakeup(rx->xsk_pool);
1783+ else
1784+ xsk_clear_rx_need_wakeup(rx->xsk_pool);
1785+ }
17651786 }
17661787
17671788 static bool tsnep_pending(struct tsnep_queue *queue)
drivers/net/ethernet/ezchip/nps_enet.c+1−0
@@ -661,4 +661,5 @@ static struct platform_driver nps_enet_driver = { · 660 unmodified lines
661661 module_platform_driver(nps_enet_driver);
662662
663663 MODULE_AUTHOR("EZchip Semiconductor");
664+MODULE_DESCRIPTION("EZchip NPS Ethernet driver");
664665 MODULE_LICENSE("GPL v2");
drivers/net/ethernet/freescale/enetc/enetc.c+1−0
@@ -3216,4 +3216,5 @@ void enetc_pci_remove(struct pci_dev *pdev) · 3215 unmodified lines
32163216 }
32173217 EXPORT_SYMBOL_GPL(enetc_pci_remove);
32183218
3219+MODULE_DESCRIPTION("NXP ENETC Ethernet driver");
32193220 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/ethernet/freescale/fec_main.c+3−0
@@ -2036,6 +2036,7 @@ static void fec_enet_adjust_link(struct net_device *ndev) · 2035 unmodified lines
20362036
20372037 /* if any of the above changed restart the FEC */
20382038 if (status_change) {
2039+ netif_stop_queue(ndev);
20392040 napi_disable(&fep->napi);
20402041 netif_tx_lock_bh(ndev);
20412042 fec_restart(ndev);
@@ -2045,6 +2046,7 @@ static void fec_enet_adjust_link(struct net_device *ndev) · 3 unmodified lines
20452046 }
20462047 } else {
20472048 if (fep->link) {
2049+ netif_stop_queue(ndev);
20482050 napi_disable(&fep->napi);
20492051 netif_tx_lock_bh(ndev);
20502052 fec_stop(ndev);
@@ -4769,4 +4771,5 @@ static struct platform_driver fec_driver = { · 2718 unmodified lines
47694771
47704772 module_platform_driver(fec_driver);
47714773
4774+MODULE_DESCRIPTION("NXP Fast Ethernet Controller (FEC) driver");
47724775 MODULE_LICENSE("GPL");
drivers/net/ethernet/freescale/fsl_pq_mdio.c+1−0
@@ -531,4 +531,5 @@ static struct platform_driver fsl_pq_mdio_driver = { · 530 unmodified lines
531531
532532 module_platform_driver(fsl_pq_mdio_driver);
533533
534+MODULE_DESCRIPTION("Freescale PQ MDIO helpers");
534535 MODULE_LICENSE("GPL");
drivers/net/ethernet/google/gve/gve_rx.c+4−4
@@ -356,7 +356,7 @@ static enum pkt_hash_types gve_rss_type(__be16 pkt_flags) · 355 unmodified lines
356356
357357 static struct sk_buff *gve_rx_add_frags(struct napi_struct *napi,
358358 struct gve_rx_slot_page_info *page_info,
359− u16 packet_buffer_size, u16 len,
359+ unsigned int truesize, u16 len,
360360 struct gve_rx_ctx *ctx)
361361 {
362362 u32 offset = page_info->page_offset + page_info->pad;
@@ -389,10 +389,10 @@ static struct sk_buff *gve_rx_add_frags(struct napi_struct *napi, · 26 unmodified lines
389389 if (skb != ctx->skb_head) {
390390 ctx->skb_head->len += len;
391391 ctx->skb_head->data_len += len;
392− ctx->skb_head->truesize += packet_buffer_size;
392+ ctx->skb_head->truesize += truesize;
393393 }
394394 skb_add_rx_frag(skb, num_frags, page_info->page,
395− offset, len, packet_buffer_size);
395+ offset, len, truesize);
396396
397397 return ctx->skb_head;
398398 }
@@ -486,7 +486,7 @@ static struct sk_buff *gve_rx_copy_to_pool(struct gve_rx_ring *rx, · 87 unmodified lines
486486
487487 memcpy(alloc_page_info.page_address, src, page_info->pad + len);
488488 skb = gve_rx_add_frags(napi, &alloc_page_info,
489− rx->packet_buffer_size,
489+ PAGE_SIZE,
490490 len, ctx);
491491
492492 u64_stats_update_begin(&rx->statss);
drivers/net/ethernet/intel/e1000e/e1000.h+20−0
@@ -360,23 +360,43 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca); · 359 unmodified lines
360360 * As a result, a shift of INCVALUE_SHIFT_n is used to fit a value of
361361 * INCVALUE_n into the TIMINCA register allowing 32+8+(24-INCVALUE_SHIFT_n)
362362 * bits to count nanoseconds leaving the rest for fractional nonseconds.
363+ *
364+ * Any given INCVALUE also has an associated maximum adjustment value. This
365+ * maximum adjustment value is the largest increase (or decrease) which can be
366+ * safely applied without overflowing the INCVALUE. Since INCVALUE has
367+ * a maximum range of 24 bits, its largest value is 0xFFFFFF.
368+ *
369+ * To understand where the maximum value comes from, consider the following
370+ * equation:
371+ *
372+ * new_incval = base_incval + (base_incval * adjustment) / 1billion
373+ *
374+ * To avoid overflow that means:
375+ * max_incval = base_incval + (base_incval * max_adj) / billion
376+ *
377+ * Re-arranging:
378+ * max_adj = floor(((max_incval - base_incval) * 1billion) / 1billion)
363379 */
364380 #define INCVALUE_96MHZ 125
365381 #define INCVALUE_SHIFT_96MHZ 17
366382 #define INCPERIOD_SHIFT_96MHZ 2
367383 #define INCPERIOD_96MHZ (12 >> INCPERIOD_SHIFT_96MHZ)
384+#define MAX_PPB_96MHZ 23999900 /* 23,999,900 ppb */
368385
369386 #define INCVALUE_25MHZ 40
370387 #define INCVALUE_SHIFT_25MHZ 18
371388 #define INCPERIOD_25MHZ 1
389+#define MAX_PPB_25MHZ 599999900 /* 599,999,900 ppb */
372390
373391 #define INCVALUE_24MHZ 125
374392 #define INCVALUE_SHIFT_24MHZ 14
375393 #define INCPERIOD_24MHZ 3
394+#define MAX_PPB_24MHZ 999999999 /* 999,999,999 ppb */
376395
377396 #define INCVALUE_38400KHZ 26
378397 #define INCVALUE_SHIFT_38400KHZ 19
379398 #define INCPERIOD_38400KHZ 1
399+#define MAX_PPB_38400KHZ 230769100 /* 230,769,100 ppb */
380400
381401 /* Another drawback of scaling the incvalue by a large factor is the
382402 * 64-bit SYSTIM register overflows more quickly. This is dealt with
drivers/net/ethernet/intel/e1000e/ptp.c+15−7
@@ -280,8 +280,17 @@ void e1000e_ptp_init(struct e1000_adapter *adapter) · 279 unmodified lines
280280
281281 switch (hw->mac.type) {
282282 case e1000_pch2lan:
283+ adapter->ptp_clock_info.max_adj = MAX_PPB_96MHZ;
284+ break;
283285 case e1000_pch_lpt:
286+ if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)
287+ adapter->ptp_clock_info.max_adj = MAX_PPB_96MHZ;
288+ else
289+ adapter->ptp_clock_info.max_adj = MAX_PPB_25MHZ;
290+ break;
284291 case e1000_pch_spt:
292+ adapter->ptp_clock_info.max_adj = MAX_PPB_24MHZ;
293+ break;
285294 case e1000_pch_cnp:
286295 case e1000_pch_tgp:
287296 case e1000_pch_adp:
@@ -289,15 +298,14 @@ void e1000e_ptp_init(struct e1000_adapter *adapter) · 1 unmodified line
289298 case e1000_pch_lnp:
290299 case e1000_pch_ptp:
291300 case e1000_pch_nvp:
292− if ((hw->mac.type < e1000_pch_lpt) ||
293− (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
294− adapter->ptp_clock_info.max_adj = 24000000 - 1;
295− break;
296− }
297− fallthrough;
301+ if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)
302+ adapter->ptp_clock_info.max_adj = MAX_PPB_24MHZ;
303+ else
304+ adapter->ptp_clock_info.max_adj = MAX_PPB_38400KHZ;
305+ break;
298306 case e1000_82574:
299307 case e1000_82583:
300− adapter->ptp_clock_info.max_adj = 600000000 - 1;
308+ adapter->ptp_clock_info.max_adj = MAX_PPB_25MHZ;
301309 break;
302310 default:
303311 break;
drivers/net/ethernet/intel/i40e/i40e_dcb.h+1−1
@@ -43,7 +43,7 @@ · 42 unmodified lines
4343 #define I40E_LLDP_TLV_SUBTYPE_SHIFT 0
4444 #define I40E_LLDP_TLV_SUBTYPE_MASK (0xFF << I40E_LLDP_TLV_SUBTYPE_SHIFT)
4545 #define I40E_LLDP_TLV_OUI_SHIFT 8
46−#define I40E_LLDP_TLV_OUI_MASK (0xFFFFFF << I40E_LLDP_TLV_OUI_SHIFT)
46+#define I40E_LLDP_TLV_OUI_MASK (0xFFFFFFU << I40E_LLDP_TLV_OUI_SHIFT)
4747
4848 /* Defines for IEEE ETS TLV */
4949 #define I40E_IEEE_ETS_MAXTC_SHIFT 0
drivers/net/ethernet/intel/i40e/i40e_main.c+31−16
@@ -3588,40 +3588,55 @@ static int i40e_configure_rx_ring(struct i40e_ring *ring) · 3587 unmodified lines
35883588 struct i40e_hmc_obj_rxq rx_ctx;
35893589 int err = 0;
35903590 bool ok;
3591− int ret;
35923591
35933592 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
35943593
35953594 /* clear the context structure first */
35963595 memset(&rx_ctx, 0, sizeof(rx_ctx));
35973596
3598− if (ring->vsi->type == I40E_VSI_MAIN)
3599− xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3597+ ring->rx_buf_len = vsi->rx_buf_len;
3598+
3599+ /* XDP RX-queue info only needed for RX rings exposed to XDP */
3600+ if (ring->vsi->type != I40E_VSI_MAIN)
3601+ goto skip;
3602+
3603+ if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
3604+ err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
3605+ ring->queue_index,
3606+ ring->q_vector->napi.napi_id,
3607+ ring->rx_buf_len);
3608+ if (err)
3609+ return err;
3610+ }
36003611
36013612 ring->xsk_pool = i40e_xsk_pool(ring);
36023613 if (ring->xsk_pool) {
3603− ring->rx_buf_len =
3604− xsk_pool_get_rx_frame_size(ring->xsk_pool);
3605− ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3614+ xdp_rxq_info_unreg(&ring->xdp_rxq);
3615+ ring->rx_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool);
3616+ err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
3617+ ring->queue_index,
3618+ ring->q_vector->napi.napi_id,
3619+ ring->rx_buf_len);
3620+ if (err)
3621+ return err;
3622+ err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
36063623 MEM_TYPE_XSK_BUFF_POOL,
36073624 NULL);
3608− if (ret)
3609− return ret;
3625+ if (err)
3626+ return err;
36103627 dev_info(&vsi->back->pdev->dev,
36113628 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
36123629 ring->queue_index);
36133630
36143631 } else {
3615− ring->rx_buf_len = vsi->rx_buf_len;
3616− if (ring->vsi->type == I40E_VSI_MAIN) {
3617− ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3618− MEM_TYPE_PAGE_SHARED,
3619− NULL);
3620− if (ret)
3621− return ret;
3622− }
3632+ err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3633+ MEM_TYPE_PAGE_SHARED,
3634+ NULL);
3635+ if (err)
3636+ return err;
36233637 }
36243638
3639+skip:
36253640 xdp_init_buff(&ring->xdp, i40e_rx_pg_size(ring) / 2, &ring->xdp_rxq);
36263641
36273642 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
drivers/net/ethernet/intel/i40e/i40e_txrx.c+23−26
@@ -1548,7 +1548,6 @@ void i40e_free_rx_resources(struct i40e_ring *rx_ring) · 1547 unmodified lines
15481548 int i40e_setup_rx_descriptors(struct i40e_ring *rx_ring)
15491549 {
15501550 struct device *dev = rx_ring->dev;
1551− int err;
15521551
15531552 u64_stats_init(&rx_ring->syncp);
15541553
@@ -1569,14 +1568,6 @@ int i40e_setup_rx_descriptors(struct i40e_ring *rx_ring) · 14 unmodified lines
15691568 rx_ring->next_to_process = 0;
15701569 rx_ring->next_to_use = 0;
15711570
1572− /* XDP RX-queue info only needed for RX rings exposed to XDP */
1573− if (rx_ring->vsi->type == I40E_VSI_MAIN) {
1574− err = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
1575− rx_ring->queue_index, rx_ring->q_vector->napi.napi_id);
1576− if (err < 0)
1577− return err;
1578− }
1579−
15801571 rx_ring->xdp_prog = rx_ring->vsi->xdp_prog;
15811572
15821573 rx_ring->rx_bi =
@@ -2087,7 +2078,8 @@ static void i40e_put_rx_buffer(struct i40e_ring *rx_ring, · 504 unmodified lines
20872078 static void i40e_process_rx_buffs(struct i40e_ring *rx_ring, int xdp_res,
20882079 struct xdp_buff *xdp)
20892080 {
2090− u32 next = rx_ring->next_to_clean;
2081+ u32 nr_frags = xdp_get_shared_info_from_buff(xdp)->nr_frags;
2082+ u32 next = rx_ring->next_to_clean, i = 0;
20912083 struct i40e_rx_buffer *rx_buffer;
20922084
20932085 xdp->flags = 0;
@@ -2100,10 +2092,10 @@ static void i40e_process_rx_buffs(struct i40e_ring *rx_ring, int xdp_res, · 6 unmodified lines
21002092 if (!rx_buffer->page)
21012093 continue;
21022094
2103− if (xdp_res == I40E_XDP_CONSUMED)
2104− rx_buffer->pagecnt_bias++;
2105− else
2095+ if (xdp_res != I40E_XDP_CONSUMED)
21062096 i40e_rx_buffer_flip(rx_buffer, xdp->frame_sz);
2097+ else if (i++ <= nr_frags)
2098+ rx_buffer->pagecnt_bias++;
21072099
21082100 /* EOP buffer will be put in i40e_clean_rx_irq() */
21092101 if (next == rx_ring->next_to_process)
@@ -2117,20 +2109,20 @@ static void i40e_process_rx_buffs(struct i40e_ring *rx_ring, int xdp_res, · 7 unmodified lines
21172109 * i40e_construct_skb - Allocate skb and populate it
21182110 * @rx_ring: rx descriptor ring to transact packets on
21192111 * @xdp: xdp_buff pointing to the data
2120− * @nr_frags: number of buffers for the packet
21212112 *
21222113 * This function allocates an skb. It then populates it with the page
21232114 * data from the current receive descriptor, taking care to set up the
21242115 * skb correctly.
21252116 */
21262117 static struct sk_buff *i40e_construct_skb(struct i40e_ring *rx_ring,
2127− struct xdp_buff *xdp,
2128− u32 nr_frags)
2118+ struct xdp_buff *xdp)
21292119 {
21302120 unsigned int size = xdp->data_end - xdp->data;
21312121 struct i40e_rx_buffer *rx_buffer;
2122+ struct skb_shared_info *sinfo;
21322123 unsigned int headlen;
21332124 struct sk_buff *skb;
2125+ u32 nr_frags = 0;
21342126
21352127 /* prefetch first cache line of first page */
21362128 net_prefetch(xdp->data);
@@ -2168,6 +2160,10 @@ static struct sk_buff *i40e_construct_skb(struct i40e_ring *rx_ring, · 31 unmodified lines
21682160 memcpy(__skb_put(skb, headlen), xdp->data,
21692161 ALIGN(headlen, sizeof(long)));
21702162
2163+ if (unlikely(xdp_buff_has_frags(xdp))) {
2164+ sinfo = xdp_get_shared_info_from_buff(xdp);
2165+ nr_frags = sinfo->nr_frags;
2166+ }
21712167 rx_buffer = i40e_rx_bi(rx_ring, rx_ring->next_to_clean);
21722168 /* update all of the pointers */
21732169 size -= headlen;
@@ -2187,9 +2183,8 @@ static struct sk_buff *i40e_construct_skb(struct i40e_ring *rx_ring, · 13 unmodified lines
21872183 }
21882184
21892185 if (unlikely(xdp_buff_has_frags(xdp))) {
2190− struct skb_shared_info *sinfo, *skinfo = skb_shinfo(skb);
2186+ struct skb_shared_info *skinfo = skb_shinfo(skb);
21912187
2192− sinfo = xdp_get_shared_info_from_buff(xdp);
21932188 memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
21942189 sizeof(skb_frag_t) * nr_frags);
21952190
@@ -2212,17 +2207,17 @@ static struct sk_buff *i40e_construct_skb(struct i40e_ring *rx_ring, · 16 unmodified lines
22122207 * i40e_build_skb - Build skb around an existing buffer
22132208 * @rx_ring: Rx descriptor ring to transact packets on
22142209 * @xdp: xdp_buff pointing to the data
2215− * @nr_frags: number of buffers for the packet
22162210 *
22172211 * This function builds an skb around an existing Rx buffer, taking care
22182212 * to set up the skb correctly and avoid any memcpy overhead.
22192213 */
22202214 static struct sk_buff *i40e_build_skb(struct i40e_ring *rx_ring,
2221− struct xdp_buff *xdp,
2222− u32 nr_frags)
2215+ struct xdp_buff *xdp)
22232216 {
22242217 unsigned int metasize = xdp->data - xdp->data_meta;
2218+ struct skb_shared_info *sinfo;
22252219 struct sk_buff *skb;
2220+ u32 nr_frags;
22262221
22272222 /* Prefetch first cache line of first page. If xdp->data_meta
22282223 * is unused, this points exactly as xdp->data, otherwise we
@@ -2231,6 +2226,11 @@ static struct sk_buff *i40e_build_skb(struct i40e_ring *rx_ring, · 2 unmodified lines
22312226 */
22322227 net_prefetch(xdp->data_meta);
22332228
2229+ if (unlikely(xdp_buff_has_frags(xdp))) {
2230+ sinfo = xdp_get_shared_info_from_buff(xdp);
2231+ nr_frags = sinfo->nr_frags;
2232+ }
2233+
22342234 /* build an skb around the page buffer */
22352235 skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
22362236 if (unlikely(!skb))
@@ -2243,9 +2243,6 @@ static struct sk_buff *i40e_build_skb(struct i40e_ring *rx_ring, · 6 unmodified lines
22432243 skb_metadata_set(skb, metasize);
22442244
22452245 if (unlikely(xdp_buff_has_frags(xdp))) {
2246− struct skb_shared_info *sinfo;
2247−
2248− sinfo = xdp_get_shared_info_from_buff(xdp);
22492246 xdp_update_skb_shared_info(skb, nr_frags,
22502247 sinfo->xdp_frags_size,
22512248 nr_frags * xdp->frame_sz,
@@ -2589,9 +2586,9 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget, · 337 unmodified lines
25892586 total_rx_bytes += size;
25902587 } else {
25912588 if (ring_uses_build_skb(rx_ring))
2592− skb = i40e_build_skb(rx_ring, xdp, nfrags);
2589+ skb = i40e_build_skb(rx_ring, xdp);
25932590 else
2594− skb = i40e_construct_skb(rx_ring, xdp, nfrags);
2591+ skb = i40e_construct_skb(rx_ring, xdp);
25952592
25962593 /* drop if we failed to retrieve a buffer */
25972594 if (!skb) {
drivers/net/ethernet/intel/i40e/i40e_xsk.c+2−2
@@ -414,7 +414,8 @@ i40e_add_xsk_frag(struct i40e_ring *rx_ring, struct xdp_buff *first, · 413 unmodified lines
414414 }
415415
416416 __skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++,
417− virt_to_page(xdp->data_hard_start), 0, size);
417+ virt_to_page(xdp->data_hard_start),
418+ XDP_PACKET_HEADROOM, size);
418419 sinfo->xdp_frags_size += size;
419420 xsk_buff_add_frag(xdp);
420421
@@ -498,7 +499,6 @@ int i40e_clean_rx_irq_zc(struct i40e_ring *rx_ring, int budget) · 77 unmodified lines
498499 xdp_res = i40e_run_xdp_zc(rx_ring, first, xdp_prog);
499500 i40e_handle_xdp_result_zc(rx_ring, first, rx_desc, &rx_packets,
500501 &rx_bytes, xdp_res, &failure);
501− first->flags = 0;
502502 next_to_clean = next_to_process;
503503 if (failure)
504504 break;
drivers/net/ethernet/intel/ice/ice_base.c+23−14
@@ -547,19 +547,27 @@ int ice_vsi_cfg_rxq(struct ice_rx_ring *ring) · 546 unmodified lines
547547 ring->rx_buf_len = ring->vsi->rx_buf_len;
548548
549549 if (ring->vsi->type == ICE_VSI_PF) {
550− if (!xdp_rxq_info_is_reg(&ring->xdp_rxq))
551− /* coverity[check_return] */
552− __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
553− ring->q_index,
554− ring->q_vector->napi.napi_id,
555− ring->vsi->rx_buf_len);
550+ if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
551+ err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
552+ ring->q_index,
553+ ring->q_vector->napi.napi_id,
554+ ring->rx_buf_len);
555+ if (err)
556+ return err;
557+ }
556558
557559 ring->xsk_pool = ice_xsk_pool(ring);
558560 if (ring->xsk_pool) {
559− xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
561+ xdp_rxq_info_unreg(&ring->xdp_rxq);
560562
561563 ring->rx_buf_len =
562564 xsk_pool_get_rx_frame_size(ring->xsk_pool);
565+ err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
566+ ring->q_index,
567+ ring->q_vector->napi.napi_id,
568+ ring->rx_buf_len);
569+ if (err)
570+ return err;
563571 err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
564572 MEM_TYPE_XSK_BUFF_POOL,
565573 NULL);
@@ -571,13 +579,14 @@ int ice_vsi_cfg_rxq(struct ice_rx_ring *ring) · 5 unmodified lines
571579 dev_info(dev, "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
572580 ring->q_index);
573581 } else {
574− if (!xdp_rxq_info_is_reg(&ring->xdp_rxq))
575− /* coverity[check_return] */
576− __xdp_rxq_info_reg(&ring->xdp_rxq,
577− ring->netdev,
578− ring->q_index,
579− ring->q_vector->napi.napi_id,
580− ring->vsi->rx_buf_len);
582+ if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
583+ err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
584+ ring->q_index,
585+ ring->q_vector->napi.napi_id,
586+ ring->rx_buf_len);
587+ if (err)
588+ return err;
589+ }
581590
582591 err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
583592 MEM_TYPE_PAGE_SHARED,
drivers/net/ethernet/intel/ice/ice_osdep.h+1−1
@@ -24,7 +24,7 @@ · 23 unmodified lines
2424 #define rd64(a, reg) readq((a)->hw_addr + (reg))
2525
2626 #define ice_flush(a) rd32((a), GLGEN_STAT)
27−#define ICE_M(m, s) ((m) << (s))
27+#define ICE_M(m, s) ((m ## U) << (s))
2828
2929 struct ice_dma_mem {
3030 void *va;
drivers/net/ethernet/intel/ice/ice_txrx.c+9−10
@@ -513,11 +513,6 @@ int ice_setup_rx_ring(struct ice_rx_ring *rx_ring) · 512 unmodified lines
513513 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
514514 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
515515
516− if (rx_ring->vsi->type == ICE_VSI_PF &&
517− !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
518− if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
519− rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
520− goto err;
521516 return 0;
522517
523518 err:
@@ -603,9 +598,7 @@ out_failure: · 79 unmodified lines
603598 ret = ICE_XDP_CONSUMED;
604599 }
605600 exit:
606− rx_buf->act = ret;
607− if (unlikely(xdp_buff_has_frags(xdp)))
608− ice_set_rx_bufs_act(xdp, rx_ring, ret);
601+ ice_set_rx_bufs_act(xdp, rx_ring, ret);
609602 }
610603
611604 /**
@@ -893,14 +886,17 @@ ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp, · 281 unmodified lines
893886 }
894887
895888 if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS)) {
896− if (unlikely(xdp_buff_has_frags(xdp)))
897− ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
889+ ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
898890 return -ENOMEM;
899891 }
900892
901893 __skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
902894 rx_buf->page_offset, size);
903895 sinfo->xdp_frags_size += size;
896+ /* remember frag count before XDP prog execution; bpf_xdp_adjust_tail()
897+ * can pop off frags but driver has to handle it on its own
898+ */
899+ rx_ring->nr_frags = sinfo->nr_frags;
904900
905901 if (page_is_pfmemalloc(rx_buf->page))
906902 xdp_buff_set_frag_pfmemalloc(xdp);
@@ -1251,6 +1247,7 @@ int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget) · 344 unmodified lines
12511247
12521248 xdp->data = NULL;
12531249 rx_ring->first_desc = ntc;
1250+ rx_ring->nr_frags = 0;
12541251 continue;
12551252 construct_skb:
12561253 if (likely(ice_ring_uses_build_skb(rx_ring)))
@@ -1266,10 +1263,12 @@ construct_skb: · 9 unmodified lines
12661263 ICE_XDP_CONSUMED);
12671264 xdp->data = NULL;
12681265 rx_ring->first_desc = ntc;
1266+ rx_ring->nr_frags = 0;
12691267 break;
12701268 }
12711269 xdp->data = NULL;
12721270 rx_ring->first_desc = ntc;
1271+ rx_ring->nr_frags = 0;
12731272
12741273 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
12751274 if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
drivers/net/ethernet/intel/ice/ice_txrx.h+1−0
@@ -358,6 +358,7 @@ struct ice_rx_ring { · 357 unmodified lines
358358 struct ice_tx_ring *xdp_ring;
359359 struct ice_rx_ring *next; /* pointer to next ring in q_vector */
360360 struct xsk_buff_pool *xsk_pool;
361+ u32 nr_frags;
361362 dma_addr_t dma; /* physical address of ring */
362363 u16 rx_buf_len;
363364 u8 dcb_tc; /* Traffic class of ring */
drivers/net/ethernet/intel/ice/ice_txrx_lib.h+22−9
@@ -12,26 +12,39 @@ · 11 unmodified lines
1212 * act: action to store onto Rx buffers related to XDP buffer parts
1313 *
1414 * Set action that should be taken before putting Rx buffer from first frag
15− * to one before last. Last one is handled by caller of this function as it
16− * is the EOP frag that is currently being processed. This function is
17− * supposed to be called only when XDP buffer contains frags.
15+ * to the last.
1816 */
1917 static inline void
2018 ice_set_rx_bufs_act(struct xdp_buff *xdp, const struct ice_rx_ring *rx_ring,
2119 const unsigned int act)
2220 {
23− const struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
24− u32 first = rx_ring->first_desc;
25− u32 nr_frags = sinfo->nr_frags;
21+ u32 sinfo_frags = xdp_get_shared_info_from_buff(xdp)->nr_frags;
22+ u32 nr_frags = rx_ring->nr_frags + 1;
23+ u32 idx = rx_ring->first_desc;
2624 u32 cnt = rx_ring->count;
2725 struct ice_rx_buf *buf;
2826
2927 for (int i = 0; i < nr_frags; i++) {
30− buf = &rx_ring->rx_buf[first];
28+ buf = &rx_ring->rx_buf[idx];
3129 buf->act = act;
3230
33− if (++first == cnt)
34− first = 0;
31+ if (++idx == cnt)
32+ idx = 0;
33+ }
34+
35+ /* adjust pagecnt_bias on frags freed by XDP prog */
36+ if (sinfo_frags < rx_ring->nr_frags && act == ICE_XDP_CONSUMED) {
37+ u32 delta = rx_ring->nr_frags - sinfo_frags;
38+
39+ while (delta) {
40+ if (idx == 0)
41+ idx = cnt - 1;
42+ else
43+ idx--;
44+ buf = &rx_ring->rx_buf[idx];
45+ buf->pagecnt_bias--;
46+ delta--;
47+ }
3548 }
3649 }
3750
drivers/net/ethernet/intel/ice/ice_type.h+1−1
@@ -1072,7 +1072,7 @@ struct ice_aq_get_set_rss_lut_params { · 1071 unmodified lines
10721072 #define ICE_OROM_VER_BUILD_SHIFT 8
10731073 #define ICE_OROM_VER_BUILD_MASK (0xffff << ICE_OROM_VER_BUILD_SHIFT)
10741074 #define ICE_OROM_VER_SHIFT 24
1075−#define ICE_OROM_VER_MASK (0xff << ICE_OROM_VER_SHIFT)
1075+#define ICE_OROM_VER_MASK (0xffU << ICE_OROM_VER_SHIFT)
10761076 #define ICE_SR_PFA_PTR 0x40
10771077 #define ICE_SR_1ST_NVM_BANK_PTR 0x42
10781078 #define ICE_SR_NVM_BANK_SIZE 0x43
drivers/net/ethernet/intel/ice/ice_xsk.c+2−2
@@ -825,7 +825,8 @@ ice_add_xsk_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *first, · 824 unmodified lines
825825 }
826826
827827 __skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++,
828− virt_to_page(xdp->data_hard_start), 0, size);
828+ virt_to_page(xdp->data_hard_start),
829+ XDP_PACKET_HEADROOM, size);
829830 sinfo->xdp_frags_size += size;
830831 xsk_buff_add_frag(xdp);
831832
@@ -895,7 +896,6 @@ int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring, int budget) · 63 unmodified lines
895896
896897 if (!first) {
897898 first = xdp;
898− xdp_buff_clear_frags_flag(first);
899899 } else if (ice_add_xsk_frag(rx_ring, first, xdp, size)) {
900900 break;
901901 }
drivers/net/ethernet/intel/idpf/idpf_lib.c+2−0
@@ -783,6 +783,8 @@ static int idpf_cfg_netdev(struct idpf_vport *vport) · 782 unmodified lines
783783 /* setup watchdog timeout value to be 5 second */
784784 netdev->watchdog_timeo = 5 * HZ;
785785
786+ netdev->dev_port = idx;
787+
786788 /* configure default MTU size */
787789 netdev->min_mtu = ETH_MIN_MTU;
788790 netdev->max_mtu = vport->max_mtu;
drivers/net/ethernet/intel/idpf/virtchnl2.h+1−1
@@ -978,7 +978,7 @@ struct virtchnl2_ptype { · 977 unmodified lines
978978 u8 proto_id_count;
979979 __le16 pad;
980980 __le16 proto_id[];
981−};
981+} __packed __aligned(2);
982982 VIRTCHNL2_CHECK_STRUCT_LEN(6, virtchnl2_ptype);
983983
984984 /**
drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c+2−1
@@ -716,7 +716,8 @@ static s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, · 715 unmodified lines
716716 if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
717717 error = FIELD_GET(IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK, command);
718718 hw_dbg(hw, "Failed to read, error %x\n", error);
719− return -EIO;
719+ ret = -EIO;
720+ goto out;
720721 }
721722
722723 if (!ret)
drivers/net/ethernet/litex/litex_liteeth.c+1−0
@@ -318,4 +318,5 @@ static struct platform_driver liteeth_driver = { · 317 unmodified lines
318318 module_platform_driver(liteeth_driver);
319319
320320 MODULE_AUTHOR("Joel Stanley <joel@jms.id.au>");
321+MODULE_DESCRIPTION("LiteX Liteeth Ethernet driver");
321322 MODULE_LICENSE("GPL");
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c+26−1
@@ -614,12 +614,38 @@ static void mvpp23_bm_set_8pool_mode(struct mvpp2 *priv) · 613 unmodified lines
614614 mvpp2_write(priv, MVPP22_BM_POOL_BASE_ADDR_HIGH_REG, val);
615615 }
616616
617+/* Cleanup pool before actual initialization in the OS */
618+static void mvpp2_bm_pool_cleanup(struct mvpp2 *priv, int pool_id)
619+{
620+ unsigned int thread = mvpp2_cpu_to_thread(priv, get_cpu());
621+ u32 val;
622+ int i;
623+
624+ /* Drain the BM from all possible residues left by firmware */
625+ for (i = 0; i < MVPP2_BM_POOL_SIZE_MAX; i++)
626+ mvpp2_thread_read(priv, thread, MVPP2_BM_PHY_ALLOC_REG(pool_id));
627+
628+ put_cpu();
629+
630+ /* Stop the BM pool */
631+ val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(pool_id));
632+ val |= MVPP2_BM_STOP_MASK;
633+ mvpp2_write(priv, MVPP2_BM_POOL_CTRL_REG(pool_id), val);
634+}
635+
617636 static int mvpp2_bm_init(struct device *dev, struct mvpp2 *priv)
618637 {
619638 enum dma_data_direction dma_dir = DMA_FROM_DEVICE;
620639 int i, err, poolnum = MVPP2_BM_POOLS_NUM;
621640 struct mvpp2_port *port;
622641
642+ if (priv->percpu_pools)
643+ poolnum = mvpp2_get_nrxqs(priv) * 2;
644+
645+ /* Clean up the pool state in case it contains stale state */
646+ for (i = 0; i < poolnum; i++)
647+ mvpp2_bm_pool_cleanup(priv, i);
648+
623649 if (priv->percpu_pools) {
624650 for (i = 0; i < priv->port_count; i++) {
625651 port = priv->port_list[i];
@@ -629,7 +655,6 @@ static int mvpp2_bm_init(struct device *dev, struct mvpp2 *priv) · 3 unmodified lines
629655 }
630656 }
631657
632− poolnum = mvpp2_get_nrxqs(priv) * 2;
633658 for (i = 0; i < poolnum; i++) {
634659 /* the pool in use */
635660 int pn = i / (poolnum / 2);
drivers/net/ethernet/marvell/octeontx2/af/mbox.c+1−0
@@ -413,4 +413,5 @@ const char *otx2_mbox_id2name(u16 id) · 412 unmodified lines
413413 EXPORT_SYMBOL(otx2_mbox_id2name);
414414
415415 MODULE_AUTHOR("Marvell.");
416+MODULE_DESCRIPTION("Marvell RVU NIC Mbox helpers");
416417 MODULE_LICENSE("GPL v2");
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c+15−16
@@ -1850,8 +1850,8 @@ void npc_mcam_rsrcs_deinit(struct rvu *rvu) · 1849 unmodified lines
18501850 {
18511851 struct npc_mcam *mcam = &rvu->hw->mcam;
18521852
1853− kfree(mcam->bmap);
1854− kfree(mcam->bmap_reverse);
1853+ bitmap_free(mcam->bmap);
1854+ bitmap_free(mcam->bmap_reverse);
18551855 kfree(mcam->entry2pfvf_map);
18561856 kfree(mcam->cntr2pfvf_map);
18571857 kfree(mcam->entry2cntr_map);
@@ -1904,21 +1904,20 @@ int npc_mcam_rsrcs_init(struct rvu *rvu, int blkaddr) · 46 unmodified lines
19041904 mcam->pf_offset = mcam->nixlf_offset + nixlf_count;
19051905
19061906 /* Allocate bitmaps for managing MCAM entries */
1907− mcam->bmap = kmalloc_array(BITS_TO_LONGS(mcam->bmap_entries),
1908− sizeof(long), GFP_KERNEL);
1907+ mcam->bmap = bitmap_zalloc(mcam->bmap_entries, GFP_KERNEL);
19091908 if (!mcam->bmap)
19101909 return -ENOMEM;
19111910
1912− mcam->bmap_reverse = kmalloc_array(BITS_TO_LONGS(mcam->bmap_entries),
1913− sizeof(long), GFP_KERNEL);
1911+ mcam->bmap_reverse = bitmap_zalloc(mcam->bmap_entries, GFP_KERNEL);
19141912 if (!mcam->bmap_reverse)
19151913 goto free_bmap;
19161914
19171915 mcam->bmap_fcnt = mcam->bmap_entries;
19181916
19191917 /* Alloc memory for saving entry to RVU PFFUNC allocation mapping */
1920− mcam->entry2pfvf_map = kmalloc_array(mcam->bmap_entries,
1921− sizeof(u16), GFP_KERNEL);
1918+ mcam->entry2pfvf_map = kcalloc(mcam->bmap_entries, sizeof(u16),
1919+ GFP_KERNEL);
1920+
19221921 if (!mcam->entry2pfvf_map)
19231922 goto free_bmap_reverse;
19241923
@@ -1941,21 +1940,21 @@ int npc_mcam_rsrcs_init(struct rvu *rvu, int blkaddr) · 16 unmodified lines
19411940 if (err)
19421941 goto free_entry_map;
19431942
1944− mcam->cntr2pfvf_map = kmalloc_array(mcam->counters.max,
1945− sizeof(u16), GFP_KERNEL);
1943+ mcam->cntr2pfvf_map = kcalloc(mcam->counters.max, sizeof(u16),
1944+ GFP_KERNEL);
19461945 if (!mcam->cntr2pfvf_map)
19471946 goto free_cntr_bmap;
19481947
19491948 /* Alloc memory for MCAM entry to counter mapping and for tracking
19501949 * counter's reference count.
19511950 */
1952− mcam->entry2cntr_map = kmalloc_array(mcam->bmap_entries,
1953− sizeof(u16), GFP_KERNEL);
1951+ mcam->entry2cntr_map = kcalloc(mcam->bmap_entries, sizeof(u16),
1952+ GFP_KERNEL);
19541953 if (!mcam->entry2cntr_map)
19551954 goto free_cntr_map;
19561955
1957− mcam->cntr_refcnt = kmalloc_array(mcam->counters.max,
1958− sizeof(u16), GFP_KERNEL);
1956+ mcam->cntr_refcnt = kcalloc(mcam->counters.max, sizeof(u16),
1957+ GFP_KERNEL);
19591958 if (!mcam->cntr_refcnt)
19601959 goto free_entry_cntr_map;
19611960
@@ -1988,9 +1987,9 @@ free_cntr_bmap: · 26 unmodified lines
19881987 free_entry_map:
19891988 kfree(mcam->entry2pfvf_map);
19901989 free_bmap_reverse:
1991− kfree(mcam->bmap_reverse);
1990+ bitmap_free(mcam->bmap_reverse);
19921991 free_bmap:
1993− kfree(mcam->bmap);
1992+ bitmap_free(mcam->bmap);
19941993
19951994 return -ENOMEM;
19961995 }
drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c+12−2
@@ -951,8 +951,11 @@ int otx2_sq_init(struct otx2_nic *pfvf, u16 qidx, u16 sqb_aura) · 950 unmodified lines
951951 if (pfvf->ptp && qidx < pfvf->hw.tx_queues) {
952952 err = qmem_alloc(pfvf->dev, &sq->timestamps, qset->sqe_cnt,
953953 sizeof(*sq->timestamps));
954− if (err)
954+ if (err) {
955+ kfree(sq->sg);
956+ sq->sg = NULL;
955957 return err;
958+ }
956959 }
957960
958961 sq->head = 0;
@@ -968,7 +971,14 @@ int otx2_sq_init(struct otx2_nic *pfvf, u16 qidx, u16 sqb_aura) · 9 unmodified lines
968971 sq->stats.bytes = 0;
969972 sq->stats.pkts = 0;
970973
971− return pfvf->hw_ops->sq_aq_init(pfvf, qidx, sqb_aura);
974+ err = pfvf->hw_ops->sq_aq_init(pfvf, qidx, sqb_aura);
975+ if (err) {
976+ kfree(sq->sg);
977+ sq->sg = NULL;
978+ return err;
979+ }
980+
981+ return 0;
972982
973983 }
974984
drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c+0−1
@@ -314,7 +314,6 @@ static int otx2_set_channels(struct net_device *dev, · 313 unmodified lines
314314 pfvf->hw.tx_queues = channel->tx_count;
315315 if (pfvf->xdp_prog)
316316 pfvf->hw.xdp_queues = channel->rx_count;
317− pfvf->hw.non_qos_queues = pfvf->hw.tx_queues + pfvf->hw.xdp_queues;
318317
319318 if (if_up)
320319 err = dev->netdev_ops->ndo_open(dev);
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c+1−2
@@ -1744,6 +1744,7 @@ int otx2_open(struct net_device *netdev) · 1743 unmodified lines
17441744 /* RQ and SQs are mapped to different CQs,
17451745 * so find out max CQ IRQs (i.e CINTs) needed.
17461746 */
1747+ pf->hw.non_qos_queues = pf->hw.tx_queues + pf->hw.xdp_queues;
17471748 pf->hw.cint_cnt = max3(pf->hw.rx_queues, pf->hw.tx_queues,
17481749 pf->hw.tc_tx_queues);
17491750
@@ -2643,8 +2644,6 @@ static int otx2_xdp_setup(struct otx2_nic *pf, struct bpf_prog *prog) · 893 unmodified lines
26432644 xdp_features_clear_redirect_target(dev);
26442645 }
26452646
2646− pf->hw.non_qos_queues += pf->hw.xdp_queues;
2647−
26482647 if (if_up)
26492648 otx2_open(pf->netdev);
26502649
drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c+3−4
@@ -1403,7 +1403,7 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf, · 1402 unmodified lines
14031403 struct otx2_cq_queue *cq,
14041404 bool *need_xdp_flush)
14051405 {
1406− unsigned char *hard_start, *data;
1406+ unsigned char *hard_start;
14071407 int qidx = cq->cq_idx;
14081408 struct xdp_buff xdp;
14091409 struct page *page;
@@ -1417,9 +1417,8 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf, · 7 unmodified lines
14171417
14181418 xdp_init_buff(&xdp, pfvf->rbsize, &cq->xdp_rxq);
14191419
1420− data = (unsigned char *)phys_to_virt(pa);
1421− hard_start = page_address(page);
1422− xdp_prepare_buff(&xdp, hard_start, data - hard_start,
1420+ hard_start = (unsigned char *)phys_to_virt(pa);
1421+ xdp_prepare_buff(&xdp, hard_start, OTX2_HEAD_ROOM,
14231422 cqe->sg.seg_size, false);
14241423
14251424 act = bpf_prog_run_xdp(prog, &xdp);
drivers/net/ethernet/mediatek/mtk_eth_soc.c+4−1
@@ -4761,7 +4761,10 @@ static int mtk_probe(struct platform_device *pdev) · 4760 unmodified lines
47614761 }
47624762
47634763 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) {
4764− err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36));
4764+ err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(36));
4765+ if (!err)
4766+ err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
4767+
47654768 if (err) {
47664769 dev_err(&pdev->dev, "Wrong DMA config\n");
47674770 return -EINVAL;
drivers/net/ethernet/mellanox/mlx5/core/cmd.c+3−2
@@ -1923,6 +1923,7 @@ static void cmd_status_log(struct mlx5_core_dev *dev, u16 opcode, u8 status, · 1922 unmodified lines
19231923 {
19241924 const char *namep = mlx5_command_str(opcode);
19251925 struct mlx5_cmd_stats *stats;
1926+ unsigned long flags;
19261927
19271928 if (!err || !(strcmp(namep, "unknown command opcode")))
19281929 return;
@@ -1930,7 +1931,7 @@ static void cmd_status_log(struct mlx5_core_dev *dev, u16 opcode, u8 status, · 1 unmodified line
19301931 stats = xa_load(&dev->cmd.stats, opcode);
19311932 if (!stats)
19321933 return;
1933− spin_lock_irq(&stats->lock);
1934+ spin_lock_irqsave(&stats->lock, flags);
19341935 stats->failed++;
19351936 if (err < 0)
19361937 stats->last_failed_errno = -err;
@@ -1939,7 +1940,7 @@ static void cmd_status_log(struct mlx5_core_dev *dev, u16 opcode, u8 status, · 2 unmodified lines
19391940 stats->last_failed_mbox_status = status;
19401941 stats->last_failed_syndrome = syndrome;
19411942 }
1942− spin_unlock_irq(&stats->lock);
1943+ spin_unlock_irqrestore(&stats->lock, flags);
19431944 }
19441945
19451946 /* preserve -EREMOTEIO for outbox.status != OK, otherwise return err as is */
drivers/net/ethernet/mellanox/mlx5/core/en.h+1−1
@@ -1124,7 +1124,7 @@ static inline bool mlx5_tx_swp_supported(struct mlx5_core_dev *mdev) · 1123 unmodified lines
11241124 extern const struct ethtool_ops mlx5e_ethtool_ops;
11251125
11261126 int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn, u32 *mkey);
1127−int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev);
1127+int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises);
11281128 void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev);
11291129 int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb,
11301130 bool enable_mc_lb);
drivers/net/ethernet/mellanox/mlx5/core/en/fs_tt_redirect.c+1−0
@@ -436,6 +436,7 @@ static int fs_any_create_groups(struct mlx5e_flow_table *ft) · 435 unmodified lines
436436 in = kvzalloc(inlen, GFP_KERNEL);
437437 if (!in || !ft->g) {
438438 kfree(ft->g);
439+ ft->g = NULL;
439440 kvfree(in);
440441 return -ENOMEM;
441442 }
drivers/net/ethernet/mellanox/mlx5/core/en/params.c+2−2
@@ -1064,8 +1064,8 @@ void mlx5e_build_sq_param(struct mlx5_core_dev *mdev, · 1063 unmodified lines
10641064 void *wq = MLX5_ADDR_OF(sqc, sqc, wq);
10651065 bool allow_swp;
10661066
1067− allow_swp =
1068− mlx5_geneve_tx_allowed(mdev) || !!mlx5_ipsec_device_caps(mdev);
1067+ allow_swp = mlx5_geneve_tx_allowed(mdev) ||
1068+ (mlx5_ipsec_device_caps(mdev) & MLX5_IPSEC_CAP_CRYPTO);
10691069 mlx5e_build_sq_param_common(mdev, param);
10701070 MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);
10711071 MLX5_SET(sqc, sqc, allow_swp, allow_swp);
drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c+1−1
@@ -213,7 +213,7 @@ static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq, · 212 unmodified lines
213213 mlx5e_ptpsq_mark_ts_cqes_undelivered(ptpsq, hwtstamp);
214214 out:
215215 napi_consume_skb(skb, budget);
216− md_buff[*md_buff_sz++] = metadata_id;
216+ md_buff[(*md_buff_sz)++] = metadata_id;
217217 if (unlikely(mlx5e_ptp_metadata_map_unhealthy(&ptpsq->metadata_map)) &&
218218 !test_and_set_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state))
219219 queue_work(ptpsq->txqsq.priv->wq, &ptpsq->report_unhealthy_work);
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c+8−2
@@ -336,12 +336,17 @@ void mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry, · 335 unmodified lines
336336 /* iv len */
337337 aes_gcm->icv_len = x->aead->alg_icv_len;
338338
339+ attrs->dir = x->xso.dir;
340+
339341 /* esn */
340342 if (x->props.flags & XFRM_STATE_ESN) {
341343 attrs->replay_esn.trigger = true;
342344 attrs->replay_esn.esn = sa_entry->esn_state.esn;
343345 attrs->replay_esn.esn_msb = sa_entry->esn_state.esn_msb;
344346 attrs->replay_esn.overlap = sa_entry->esn_state.overlap;
347+ if (attrs->dir == XFRM_DEV_OFFLOAD_OUT)
348+ goto skip_replay_window;
349+
345350 switch (x->replay_esn->replay_window) {
346351 case 32:
347352 attrs->replay_esn.replay_window =
@@ -365,7 +370,7 @@ void mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry, · 17 unmodified lines
365370 }
366371 }
367372
368− attrs->dir = x->xso.dir;
373+skip_replay_window:
369374 /* spi */
370375 attrs->spi = be32_to_cpu(x->id.spi);
371376
@@ -501,7 +506,8 @@ static int mlx5e_xfrm_validate_state(struct mlx5_core_dev *mdev, · 129 unmodified lines
501506 return -EINVAL;
502507 }
503508
504− if (x->replay_esn && x->replay_esn->replay_window != 32 &&
509+ if (x->replay_esn && x->xso.dir == XFRM_DEV_OFFLOAD_IN &&
510+ x->replay_esn->replay_window != 32 &&
505511 x->replay_esn->replay_window != 64 &&
506512 x->replay_esn->replay_window != 128 &&
507513 x->replay_esn->replay_window != 256) {
drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c+15−11
@@ -254,11 +254,13 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft, · 253 unmodified lines
254254
255255 ft->g = kcalloc(MLX5E_ARFS_NUM_GROUPS,
256256 sizeof(*ft->g), GFP_KERNEL);
257− in = kvzalloc(inlen, GFP_KERNEL);
258− if (!in || !ft->g) {
259− kfree(ft->g);
260− kvfree(in);
257+ if (!ft->g)
261258 return -ENOMEM;
259+
260+ in = kvzalloc(inlen, GFP_KERNEL);
261+ if (!in) {
262+ err = -ENOMEM;
263+ goto err_free_g;
262264 }
263265
264266 mc = MLX5_ADDR_OF(create_flow_group_in, in, match_criteria);
@@ -278,7 +280,7 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft, · 13 unmodified lines
278280 break;
279281 default:
280282 err = -EINVAL;
281− goto out;
283+ goto err_free_in;
282284 }
283285
284286 switch (type) {
@@ -300,7 +302,7 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft, · 15 unmodified lines
300302 break;
301303 default:
302304 err = -EINVAL;
303− goto out;
305+ goto err_free_in;
304306 }
305307
306308 MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
@@ -309,7 +311,7 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft, · 2 unmodified lines
309311 MLX5_SET_CFG(in, end_flow_index, ix - 1);
310312 ft->g[ft->num_groups] = mlx5_create_flow_group(ft->t, in);
311313 if (IS_ERR(ft->g[ft->num_groups]))
312− goto err;
314+ goto err_clean_group;
313315 ft->num_groups++;
314316
315317 memset(in, 0, inlen);
@@ -318,18 +320,20 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft, · 2 unmodified lines
318320 MLX5_SET_CFG(in, end_flow_index, ix - 1);
319321 ft->g[ft->num_groups] = mlx5_create_flow_group(ft->t, in);
320322 if (IS_ERR(ft->g[ft->num_groups]))
321− goto err;
323+ goto err_clean_group;
322324 ft->num_groups++;
323325
324326 kvfree(in);
325327 return 0;
326328
327−err:
329+err_clean_group:
328330 err = PTR_ERR(ft->g[ft->num_groups]);
329331 ft->g[ft->num_groups] = NULL;
330−out:
332+err_free_in:
331333 kvfree(in);
332−
334+err_free_g:
335+ kfree(ft->g);
336+ ft->g = NULL;
333337 return err;
334338 }
335339
drivers/net/ethernet/mellanox/mlx5/core/en_common.c+13−8
@@ -95,7 +95,7 @@ static void mlx5e_destroy_tises(struct mlx5_core_dev *mdev, u32 tisn[MLX5_MAX_PO · 94 unmodified lines
9595 {
9696 int tc, i;
9797
98− for (i = 0; i < MLX5_MAX_PORTS; i++)
98+ for (i = 0; i < mlx5e_get_num_lag_ports(mdev); i++)
9999 for (tc = 0; tc < MLX5_MAX_NUM_TC; tc++)
100100 mlx5e_destroy_tis(mdev, tisn[i][tc]);
101101 }
@@ -110,7 +110,7 @@ static int mlx5e_create_tises(struct mlx5_core_dev *mdev, u32 tisn[MLX5_MAX_PORT · 8 unmodified lines
110110 int tc, i;
111111 int err;
112112
113− for (i = 0; i < MLX5_MAX_PORTS; i++) {
113+ for (i = 0; i < mlx5e_get_num_lag_ports(mdev); i++) {
114114 for (tc = 0; tc < MLX5_MAX_NUM_TC; tc++) {
115115 u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {};
116116 void *tisc;
@@ -140,7 +140,7 @@ err_close_tises: · 23 unmodified lines
140140 return err;
141141 }
142142
143−int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev)
143+int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises)
144144 {
145145 struct mlx5e_hw_objs *res = &mdev->mlx5e_res.hw_objs;
146146 int err;
@@ -169,11 +169,15 @@ int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev) · 22 unmodified lines
169169 goto err_destroy_mkey;
170170 }
171171
172− err = mlx5e_create_tises(mdev, res->tisn);
173− if (err) {
174− mlx5_core_err(mdev, "alloc tises failed, %d\n", err);
175− goto err_destroy_bfreg;
172+ if (create_tises) {
173+ err = mlx5e_create_tises(mdev, res->tisn);
174+ if (err) {
175+ mlx5_core_err(mdev, "alloc tises failed, %d\n", err);
176+ goto err_destroy_bfreg;
177+ }
178+ res->tisn_valid = true;
176179 }
180+
177181 INIT_LIST_HEAD(&res->td.tirs_list);
178182 mutex_init(&res->td.list_lock);
179183
@@ -203,7 +207,8 @@ void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev) · 23 unmodified lines
203207
204208 mlx5_crypto_dek_cleanup(mdev->mlx5e_res.dek_priv);
205209 mdev->mlx5e_res.dek_priv = NULL;
206− mlx5e_destroy_tises(mdev, res->tisn);
210+ if (res->tisn_valid)
211+ mlx5e_destroy_tises(mdev, res->tisn);
207212 mlx5_free_bfreg(mdev, &res->bfreg);
208213 mlx5_core_destroy_mkey(mdev, res->mkey);
209214 mlx5_core_dealloc_transport_domain(mdev, res->td.tdn);
drivers/net/ethernet/mellanox/mlx5/core/en_main.c+1−1
@@ -5992,7 +5992,7 @@ static int mlx5e_resume(struct auxiliary_device *adev) · 5991 unmodified lines
59925992 if (netif_device_present(netdev))
59935993 return 0;
59945994
5995− err = mlx5e_create_mdev_resources(mdev);
5995+ err = mlx5e_create_mdev_resources(mdev, true);
59965996 if (err)
59975997 return err;
59985998
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+3−2
@@ -761,7 +761,7 @@ static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp) · 760 unmodified lines
761761
762762 err = mlx5e_rss_params_indir_init(&indir, mdev,
763763 mlx5e_rqt_size(mdev, hp->num_channels),
764− mlx5e_rqt_size(mdev, priv->max_nch));
764+ mlx5e_rqt_size(mdev, hp->num_channels));
765765 if (err)
766766 return err;
767767
@@ -2014,9 +2014,10 @@ static void mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow, · 1246 unmodified lines
20142014 list_for_each_entry_safe(peer_flow, tmp, &flow->peer_flows, peer_flows) {
20152015 if (peer_index != mlx5_get_dev_index(peer_flow->priv->mdev))
20162016 continue;
2017+
2018+ list_del(&peer_flow->peer_flows);
20172019 if (refcount_dec_and_test(&peer_flow->refcnt)) {
20182020 mlx5e_tc_del_fdb_flow(peer_flow->priv, peer_flow);
2019− list_del(&peer_flow->peer_flows);
20202021 kfree(peer_flow);
20212022 }
20222023 }
drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_mcast.c+3−0
@@ -83,6 +83,7 @@ mlx5_esw_bridge_mdb_flow_create(u16 esw_owner_vhca_id, struct mlx5_esw_bridge_md · 82 unmodified lines
8383 i++;
8484 }
8585
86+ rule_spec->flow_context.flags |= FLOW_CONTEXT_UPLINK_HAIRPIN_EN;
8687 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
8788 dmac_v = MLX5_ADDR_OF(fte_match_param, rule_spec->match_value, outer_headers.dmac_47_16);
8889 ether_addr_copy(dmac_v, entry->key.addr);
@@ -587,6 +588,7 @@ mlx5_esw_bridge_mcast_vlan_flow_create(u16 vlan_proto, struct mlx5_esw_bridge_po · 498 unmodified lines
587588 if (!rule_spec)
588589 return ERR_PTR(-ENOMEM);
589590
591+ rule_spec->flow_context.flags |= FLOW_CONTEXT_UPLINK_HAIRPIN_EN;
590592 rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
591593
592594 flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT;
@@ -662,6 +664,7 @@ mlx5_esw_bridge_mcast_fwd_flow_create(struct mlx5_esw_bridge_port *port) · 69 unmodified lines
662664 dest.vport.flags = MLX5_FLOW_DEST_VPORT_VHCA_ID;
663665 dest.vport.vhca_id = port->esw_owner_vhca_id;
664666 }
667+ rule_spec->flow_context.flags |= FLOW_CONTEXT_UPLINK_HAIRPIN_EN;
665668 handle = mlx5_add_flow_rules(port->mcast.ft, rule_spec, &flow_act, &dest, 1);
666669
667670 kvfree(rule_spec);
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c+2−0
@@ -566,6 +566,8 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev, · 565 unmodified lines
566566 fte->flow_context.flow_tag);
567567 MLX5_SET(flow_context, in_flow_context, flow_source,
568568 fte->flow_context.flow_source);
569+ MLX5_SET(flow_context, in_flow_context, uplink_hairpin_en,
570+ !!(fte->flow_context.flags & FLOW_CONTEXT_UPLINK_HAIRPIN_EN));
569571
570572 MLX5_SET(flow_context, in_flow_context, extended_destination,
571573 extended_dest);
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c+1−1
@@ -783,7 +783,7 @@ static int mlx5_rdma_setup_rn(struct ib_device *ibdev, u32 port_num, · 782 unmodified lines
783783 }
784784
785785 /* This should only be called once per mdev */
786− err = mlx5e_create_mdev_resources(mdev);
786+ err = mlx5e_create_mdev_resources(mdev, false);
787787 if (err)
788788 goto destroy_ht;
789789 }
drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c+1−1
@@ -98,7 +98,7 @@ static int create_aso_cq(struct mlx5_aso_cq *cq, void *cqc_data) · 97 unmodified lines
9898 mlx5_fill_page_frag_array(&cq->wq_ctrl.buf,
9999 (__be64 *)MLX5_ADDR_OF(create_cq_in, in, pas));
100100
101− MLX5_SET(cqc, cqc, cq_period_mode, DIM_CQ_PERIOD_MODE_START_FROM_EQE);
101+ MLX5_SET(cqc, cqc, cq_period_mode, MLX5_CQ_PERIOD_MODE_START_FROM_EQE);
102102 MLX5_SET(cqc, cqc, c_eqn_or_apu_element, eqn);
103103 MLX5_SET(cqc, cqc, uar_page, mdev->priv.uar->index);
104104 MLX5_SET(cqc, cqc, log_page_size, cq->wq_ctrl.buf.page_shift -
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c+12−5
@@ -788,6 +788,7 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher, · 787 unmodified lines
788788 switch (action_type) {
789789 case DR_ACTION_TYP_DROP:
790790 attr.final_icm_addr = nic_dmn->drop_icm_addr;
791+ attr.hit_gvmi = nic_dmn->drop_icm_addr >> 48;
791792 break;
792793 case DR_ACTION_TYP_FT:
793794 dest_action = action;
@@ -873,11 +874,17 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher, · 79 unmodified lines
873874 action->sampler->tx_icm_addr;
874875 break;
875876 case DR_ACTION_TYP_VPORT:
876− attr.hit_gvmi = action->vport->caps->vhca_gvmi;
877− dest_action = action;
878− attr.final_icm_addr = rx_rule ?
879− action->vport->caps->icm_address_rx :
880− action->vport->caps->icm_address_tx;
877+ if (unlikely(rx_rule && action->vport->caps->num == MLX5_VPORT_UPLINK)) {
878+ /* can't go to uplink on RX rule - dropping instead */
879+ attr.final_icm_addr = nic_dmn->drop_icm_addr;
880+ attr.hit_gvmi = nic_dmn->drop_icm_addr >> 48;
881+ } else {
882+ attr.hit_gvmi = action->vport->caps->vhca_gvmi;
883+ dest_action = action;
884+ attr.final_icm_addr = rx_rule ?
885+ action->vport->caps->icm_address_rx :
886+ action->vport->caps->icm_address_tx;
887+ }
881888 break;
882889 case DR_ACTION_TYP_POP_VLAN:
883890 if (!rx_rule && !(dmn->ste_ctx->actions_caps &
drivers/net/ethernet/mellanox/mlx5/core/vport.c+21−0
@@ -440,6 +440,27 @@ out: · 439 unmodified lines
440440 }
441441 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
442442
443+int mlx5_query_nic_vport_sd_group(struct mlx5_core_dev *mdev, u8 *sd_group)
444+{
445+ int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
446+ u32 *out;
447+ int err;
448+
449+ out = kvzalloc(outlen, GFP_KERNEL);
450+ if (!out)
451+ return -ENOMEM;
452+
453+ err = mlx5_query_nic_vport_context(mdev, 0, out);
454+ if (err)
455+ goto out;
456+
457+ *sd_group = MLX5_GET(query_nic_vport_context_out, out,
458+ nic_vport_context.sd_group);
459+out:
460+ kvfree(out);
461+ return err;
462+}
463+
443464 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
444465 {
445466 u32 *out;
drivers/net/ethernet/microchip/lan966x/lan966x_port.c+3−2
@@ -168,9 +168,10 @@ static void lan966x_port_link_up(struct lan966x_port *port) · 167 unmodified lines
168168 lan966x_taprio_speed_set(port, config->speed);
169169
170170 /* Also the GIGA_MODE_ENA(1) needs to be set regardless of the
171− * port speed for QSGMII ports.
171+ * port speed for QSGMII or SGMII ports.
172172 */
173− if (phy_interface_num_ports(config->portmode) == 4)
173+ if (phy_interface_num_ports(config->portmode) == 4 ||
174+ config->portmode == PHY_INTERFACE_MODE_SGMII)
174175 mode = DEV_MAC_MODE_CFG_GIGA_MODE_ENA_SET(1);
175176
176177 lan_wr(config->duplex | mode,
drivers/net/ethernet/netronome/nfp/flower/conntrack.c+43−3
@@ -1424,10 +1424,30 @@ static void nfp_nft_ct_translate_mangle_action(struct flow_action_entry *mangle_ · 1423 unmodified lines
14241424 mangle_action->mangle.mask = (__force u32)cpu_to_be32(mangle_action->mangle.mask);
14251425 return;
14261426
1427+ /* Both struct tcphdr and struct udphdr start with
1428+ * __be16 source;
1429+ * __be16 dest;
1430+ * so we can use the same code for both.
1431+ */
14271432 case FLOW_ACT_MANGLE_HDR_TYPE_TCP:
14281433 case FLOW_ACT_MANGLE_HDR_TYPE_UDP:
1429− mangle_action->mangle.val = (__force u16)cpu_to_be16(mangle_action->mangle.val);
1430− mangle_action->mangle.mask = (__force u16)cpu_to_be16(mangle_action->mangle.mask);
1434+ if (mangle_action->mangle.offset == offsetof(struct tcphdr, source)) {
1435+ mangle_action->mangle.val =
1436+ (__force u32)cpu_to_be32(mangle_action->mangle.val << 16);
1437+ /* The mask of mangle action is inverse mask,
1438+ * so clear the dest tp port with 0xFFFF to
1439+ * instead of rotate-left operation.
1440+ */
1441+ mangle_action->mangle.mask =
1442+ (__force u32)cpu_to_be32(mangle_action->mangle.mask << 16 | 0xFFFF);
1443+ }
1444+ if (mangle_action->mangle.offset == offsetof(struct tcphdr, dest)) {
1445+ mangle_action->mangle.offset = 0;
1446+ mangle_action->mangle.val =
1447+ (__force u32)cpu_to_be32(mangle_action->mangle.val);
1448+ mangle_action->mangle.mask =
1449+ (__force u32)cpu_to_be32(mangle_action->mangle.mask);
1450+ }
14311451 return;
14321452
14331453 default:
@@ -1864,10 +1884,30 @@ int nfp_fl_ct_handle_post_ct(struct nfp_flower_priv *priv, · 430 unmodified lines
18641884 {
18651885 struct flow_rule *rule = flow_cls_offload_flow_rule(flow);
18661886 struct nfp_fl_ct_flow_entry *ct_entry;
1887+ struct flow_action_entry *ct_goto;
18671888 struct nfp_fl_ct_zone_entry *zt;
1889+ struct flow_action_entry *act;
18681890 bool wildcarded = false;
18691891 struct flow_match_ct ct;
1870− struct flow_action_entry *ct_goto;
1892+ int i;
1893+
1894+ flow_action_for_each(i, act, &rule->action) {
1895+ switch (act->id) {
1896+ case FLOW_ACTION_REDIRECT:
1897+ case FLOW_ACTION_REDIRECT_INGRESS:
1898+ case FLOW_ACTION_MIRRED:
1899+ case FLOW_ACTION_MIRRED_INGRESS:
1900+ if (act->dev->rtnl_link_ops &&
1901+ !strcmp(act->dev->rtnl_link_ops->kind, "openvswitch")) {
1902+ NL_SET_ERR_MSG_MOD(extack,
1903+ "unsupported offload: out port is openvswitch internal port");
1904+ return -EOPNOTSUPP;
1905+ }
1906+ break;
1907+ default:
1908+ break;
1909+ }
1910+ }
18711911
18721912 flow_rule_match_ct(rule, &ct);
18731913 if (!ct.mask->ct_zone) {
drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c+1−1
@@ -1084,7 +1084,7 @@ nfp_tunnel_add_shared_mac(struct nfp_app *app, struct net_device *netdev, · 1083 unmodified lines
10841084 u16 nfp_mac_idx = 0;
10851085
10861086 entry = nfp_tunnel_lookup_offloaded_macs(app, netdev->dev_addr);
1087− if (entry && nfp_tunnel_is_mac_idx_global(entry->index)) {
1087+ if (entry && (nfp_tunnel_is_mac_idx_global(entry->index) || netif_is_lag_port(netdev))) {
10881088 if (entry->bridge_count ||
10891089 !nfp_flower_is_supported_bridge(netdev)) {
10901090 nfp_tunnel_offloaded_macs_inc_ref_and_link(entry,
drivers/net/ethernet/netronome/nfp/nfp_net_common.c+1−0
@@ -2776,6 +2776,7 @@ static void nfp_net_netdev_init(struct nfp_net *nn) · 2775 unmodified lines
27762776 case NFP_NFD_VER_NFD3:
27772777 netdev->netdev_ops = &nfp_nfd3_netdev_ops;
27782778 netdev->xdp_features |= NETDEV_XDP_ACT_XSK_ZEROCOPY;
2779+ netdev->xdp_features |= NETDEV_XDP_ACT_REDIRECT;
27792780 break;
27802781 case NFP_NFD_VER_NFDK:
27812782 netdev->netdev_ops = &nfp_nfdk_netdev_ops;
drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c+4−2
@@ -537,11 +537,13 @@ static int enable_bars(struct nfp6000_pcie *nfp, u16 interface) · 536 unmodified lines
537537 const u32 barcfg_msix_general =
538538 NFP_PCIE_BAR_PCIE2CPP_MapType(
539539 NFP_PCIE_BAR_PCIE2CPP_MapType_GENERAL) |
540− NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT;
540+ NFP_PCIE_BAR_PCIE2CPP_LengthSelect(
541+ NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT);
541542 const u32 barcfg_msix_xpb =
542543 NFP_PCIE_BAR_PCIE2CPP_MapType(
543544 NFP_PCIE_BAR_PCIE2CPP_MapType_BULK) |
544− NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT |
545+ NFP_PCIE_BAR_PCIE2CPP_LengthSelect(
546+ NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT) |
545547 NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress(
546548 NFP_CPP_TARGET_ISLAND_XPB);
547549 const u32 barcfg_explicit[4] = {
drivers/net/ethernet/stmicro/stmmac/common.h+41−16
@@ -59,28 +59,51 @@ · 58 unmodified lines
5959 #undef FRAME_FILTER_DEBUG
6060 /* #define FRAME_FILTER_DEBUG */
6161
62+struct stmmac_q_tx_stats {
63+ u64_stats_t tx_bytes;
64+ u64_stats_t tx_set_ic_bit;
65+ u64_stats_t tx_tso_frames;
66+ u64_stats_t tx_tso_nfrags;
67+};
68+
69+struct stmmac_napi_tx_stats {
70+ u64_stats_t tx_packets;
71+ u64_stats_t tx_pkt_n;
72+ u64_stats_t poll;
73+ u64_stats_t tx_clean;
74+ u64_stats_t tx_set_ic_bit;
75+};
76+
6277 struct stmmac_txq_stats {
63− u64 tx_bytes;
64− u64 tx_packets;
65− u64 tx_pkt_n;
66− u64 tx_normal_irq_n;
67− u64 napi_poll;
68− u64 tx_clean;
69− u64 tx_set_ic_bit;
70− u64 tx_tso_frames;
71− u64 tx_tso_nfrags;
72− struct u64_stats_sync syncp;
78+ /* Updates protected by tx queue lock. */
79+ struct u64_stats_sync q_syncp;
80+ struct stmmac_q_tx_stats q;
81+
82+ /* Updates protected by NAPI poll logic. */
83+ struct u64_stats_sync napi_syncp;
84+ struct stmmac_napi_tx_stats napi;
7385 } ____cacheline_aligned_in_smp;
7486
87+struct stmmac_napi_rx_stats {
88+ u64_stats_t rx_bytes;
89+ u64_stats_t rx_packets;
90+ u64_stats_t rx_pkt_n;
91+ u64_stats_t poll;
92+};
93+
7594 struct stmmac_rxq_stats {
76− u64 rx_bytes;
77− u64 rx_packets;
78− u64 rx_pkt_n;
79− u64 rx_normal_irq_n;
80− u64 napi_poll;
81− struct u64_stats_sync syncp;
95+ /* Updates protected by NAPI poll logic. */
96+ struct u64_stats_sync napi_syncp;
97+ struct stmmac_napi_rx_stats napi;
8298 } ____cacheline_aligned_in_smp;
8399
100+/* Updates on each CPU protected by not allowing nested irqs. */
101+struct stmmac_pcpu_stats {
102+ struct u64_stats_sync syncp;
103+ u64_stats_t rx_normal_irq_n[MTL_MAX_TX_QUEUES];
104+ u64_stats_t tx_normal_irq_n[MTL_MAX_RX_QUEUES];
105+};
106+
84107 /* Extra statistic and debug information exposed by ethtool */
85108 struct stmmac_extra_stats {
86109 /* Transmit errors */
@@ -205,6 +228,7 @@ struct stmmac_extra_stats { · 118 unmodified lines
205228 /* per queue statistics */
206229 struct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];
207230 struct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];
231+ struct stmmac_pcpu_stats __percpu *pcpu_stats;
208232 unsigned long rx_dropped;
209233 unsigned long rx_errors;
210234 unsigned long tx_dropped;
@@ -216,6 +240,7 @@ struct stmmac_safety_stats { · 5 unmodified lines
216240 unsigned long mac_errors[32];
217241 unsigned long mtl_errors[32];
218242 unsigned long dma_errors[32];
243+ unsigned long dma_dpp_errors[32];
219244 };
220245
221246 /* Number of fields in Safety Stats */
drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c+4−0
@@ -353,6 +353,10 @@ static int imx_dwmac_probe(struct platform_device *pdev) · 352 unmodified lines
353353 if (data->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY)
354354 plat_dat->flags |= STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY;
355355
356+ /* Default TX Q0 to use TSO and rest TXQ for TBS */
357+ for (int i = 1; i < plat_dat->tx_queues_to_use; i++)
358+ plat_dat->tx_queues_cfg[i].tbs_en = 1;
359+
356360 plat_dat->host_dma_width = dwmac->ops->addr_width;
357361 plat_dat->init = imx_dwmac_init;
358362 plat_dat->exit = imx_dwmac_exit;
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c+7−8
@@ -441,8 +441,7 @@ static int sun8i_dwmac_dma_interrupt(struct stmmac_priv *priv, · 440 unmodified lines
441441 struct stmmac_extra_stats *x, u32 chan,
442442 u32 dir)
443443 {
444− struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
445− struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
444+ struct stmmac_pcpu_stats *stats = this_cpu_ptr(priv->xstats.pcpu_stats);
446445 int ret = 0;
447446 u32 v;
448447
@@ -455,9 +454,9 @@ static int sun8i_dwmac_dma_interrupt(struct stmmac_priv *priv, · 6 unmodified lines
455454
456455 if (v & EMAC_TX_INT) {
457456 ret |= handle_tx;
458− u64_stats_update_begin(&txq_stats->syncp);
459− txq_stats->tx_normal_irq_n++;
460− u64_stats_update_end(&txq_stats->syncp);
457+ u64_stats_update_begin(&stats->syncp);
458+ u64_stats_inc(&stats->tx_normal_irq_n[chan]);
459+ u64_stats_update_end(&stats->syncp);
461460 }
462461
463462 if (v & EMAC_TX_DMA_STOP_INT)
@@ -479,9 +478,9 @@ static int sun8i_dwmac_dma_interrupt(struct stmmac_priv *priv, · 15 unmodified lines
479478
480479 if (v & EMAC_RX_INT) {
481480 ret |= handle_rx;
482− u64_stats_update_begin(&rxq_stats->syncp);
483− rxq_stats->rx_normal_irq_n++;
484− u64_stats_update_end(&rxq_stats->syncp);
481+ u64_stats_update_begin(&stats->syncp);
482+ u64_stats_inc(&stats->rx_normal_irq_n[chan]);
483+ u64_stats_update_end(&stats->syncp);
485484 }
486485
487486 if (v & EMAC_RX_BUF_UA_INT)
drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c+7−8
@@ -171,8 +171,7 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr, · 170 unmodified lines
171171 const struct dwmac4_addrs *dwmac4_addrs = priv->plat->dwmac4_addrs;
172172 u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(dwmac4_addrs, chan));
173173 u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));
174− struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
175− struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
174+ struct stmmac_pcpu_stats *stats = this_cpu_ptr(priv->xstats.pcpu_stats);
176175 int ret = 0;
177176
178177 if (dir == DMA_DIR_RX)
@@ -201,15 +200,15 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr, · 22 unmodified lines
201200 }
202201 /* TX/RX NORMAL interrupts */
203202 if (likely(intr_status & DMA_CHAN_STATUS_RI)) {
204− u64_stats_update_begin(&rxq_stats->syncp);
205− rxq_stats->rx_normal_irq_n++;
206− u64_stats_update_end(&rxq_stats->syncp);
203+ u64_stats_update_begin(&stats->syncp);
204+ u64_stats_inc(&stats->rx_normal_irq_n[chan]);
205+ u64_stats_update_end(&stats->syncp);
207206 ret |= handle_rx;
208207 }
209208 if (likely(intr_status & DMA_CHAN_STATUS_TI)) {
210− u64_stats_update_begin(&txq_stats->syncp);
211− txq_stats->tx_normal_irq_n++;
212− u64_stats_update_end(&txq_stats->syncp);
209+ u64_stats_update_begin(&stats->syncp);
210+ u64_stats_inc(&stats->tx_normal_irq_n[chan]);
211+ u64_stats_update_end(&stats->syncp);
213212 ret |= handle_tx;
214213 }
215214
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c+7−8
@@ -162,8 +162,7 @@ static void show_rx_process_state(unsigned int status) · 161 unmodified lines
162162 int dwmac_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr,
163163 struct stmmac_extra_stats *x, u32 chan, u32 dir)
164164 {
165− struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
166− struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
165+ struct stmmac_pcpu_stats *stats = this_cpu_ptr(priv->xstats.pcpu_stats);
167166 int ret = 0;
168167 /* read the status register (CSR5) */
169168 u32 intr_status = readl(ioaddr + DMA_STATUS);
@@ -215,16 +214,16 @@ int dwmac_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr, · 45 unmodified lines
215214 u32 value = readl(ioaddr + DMA_INTR_ENA);
216215 /* to schedule NAPI on real RIE event. */
217216 if (likely(value & DMA_INTR_ENA_RIE)) {
218− u64_stats_update_begin(&rxq_stats->syncp);
219− rxq_stats->rx_normal_irq_n++;
220− u64_stats_update_end(&rxq_stats->syncp);
217+ u64_stats_update_begin(&stats->syncp);
218+ u64_stats_inc(&stats->rx_normal_irq_n[chan]);
219+ u64_stats_update_end(&stats->syncp);
221220 ret |= handle_rx;
222221 }
223222 }
224223 if (likely(intr_status & DMA_STATUS_TI)) {
225− u64_stats_update_begin(&txq_stats->syncp);
226− txq_stats->tx_normal_irq_n++;
227− u64_stats_update_end(&txq_stats->syncp);
224+ u64_stats_update_begin(&stats->syncp);
225+ u64_stats_inc(&stats->tx_normal_irq_n[chan]);
226+ u64_stats_update_end(&stats->syncp);
228227 ret |= handle_tx;
229228 }
230229 if (unlikely(intr_status & DMA_STATUS_ERI))
drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h+3−0
@@ -303,6 +303,8 @@ · 302 unmodified lines
303303 #define XGMAC_RXCEIE BIT(4)
304304 #define XGMAC_TXCEIE BIT(0)
305305 #define XGMAC_MTL_ECC_INT_STATUS 0x000010cc
306+#define XGMAC_MTL_DPP_CONTROL 0x000010e0
307+#define XGMAC_DPP_DISABLE BIT(0)
306308 #define XGMAC_MTL_TXQ_OPMODE(x) (0x00001100 + (0x80 * (x)))
307309 #define XGMAC_TQS GENMASK(25, 16)
308310 #define XGMAC_TQS_SHIFT 16
@@ -385,6 +387,7 @@ · 76 unmodified lines
385387 #define XGMAC_DCEIE BIT(1)
386388 #define XGMAC_TCEIE BIT(0)
387389 #define XGMAC_DMA_ECC_INT_STATUS 0x0000306c
390+#define XGMAC_DMA_DPP_INT_STATUS 0x00003074
388391 #define XGMAC_DMA_CH_CONTROL(x) (0x00003100 + (0x80 * (x)))
389392 #define XGMAC_SPH BIT(24)
390393 #define XGMAC_PBLx8 BIT(16)
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c+56−1
@@ -830,6 +830,43 @@ static const struct dwxgmac3_error_desc dwxgmac3_dma_errors[32]= { · 829 unmodified lines
830830 { false, "UNKNOWN", "Unknown Error" }, /* 31 */
831831 };
832832
833+static const char * const dpp_rx_err = "Read Rx Descriptor Parity checker Error";
834+static const char * const dpp_tx_err = "Read Tx Descriptor Parity checker Error";
835+static const struct dwxgmac3_error_desc dwxgmac3_dma_dpp_errors[32] = {
836+ { true, "TDPES0", dpp_tx_err },
837+ { true, "TDPES1", dpp_tx_err },
838+ { true, "TDPES2", dpp_tx_err },
839+ { true, "TDPES3", dpp_tx_err },
840+ { true, "TDPES4", dpp_tx_err },
841+ { true, "TDPES5", dpp_tx_err },
842+ { true, "TDPES6", dpp_tx_err },
843+ { true, "TDPES7", dpp_tx_err },
844+ { true, "TDPES8", dpp_tx_err },
845+ { true, "TDPES9", dpp_tx_err },
846+ { true, "TDPES10", dpp_tx_err },
847+ { true, "TDPES11", dpp_tx_err },
848+ { true, "TDPES12", dpp_tx_err },
849+ { true, "TDPES13", dpp_tx_err },
850+ { true, "TDPES14", dpp_tx_err },
851+ { true, "TDPES15", dpp_tx_err },
852+ { true, "RDPES0", dpp_rx_err },
853+ { true, "RDPES1", dpp_rx_err },
854+ { true, "RDPES2", dpp_rx_err },
855+ { true, "RDPES3", dpp_rx_err },
856+ { true, "RDPES4", dpp_rx_err },
857+ { true, "RDPES5", dpp_rx_err },
858+ { true, "RDPES6", dpp_rx_err },
859+ { true, "RDPES7", dpp_rx_err },
860+ { true, "RDPES8", dpp_rx_err },
861+ { true, "RDPES9", dpp_rx_err },
862+ { true, "RDPES10", dpp_rx_err },
863+ { true, "RDPES11", dpp_rx_err },
864+ { true, "RDPES12", dpp_rx_err },
865+ { true, "RDPES13", dpp_rx_err },
866+ { true, "RDPES14", dpp_rx_err },
867+ { true, "RDPES15", dpp_rx_err },
868+};
869+
833870 static void dwxgmac3_handle_dma_err(struct net_device *ndev,
834871 void __iomem *ioaddr, bool correctable,
835872 struct stmmac_safety_stats *stats)
@@ -841,6 +878,13 @@ static void dwxgmac3_handle_dma_err(struct net_device *ndev, · 5 unmodified lines
841878
842879 dwxgmac3_log_error(ndev, value, correctable, "DMA",
843880 dwxgmac3_dma_errors, STAT_OFF(dma_errors), stats);
881+
882+ value = readl(ioaddr + XGMAC_DMA_DPP_INT_STATUS);
883+ writel(value, ioaddr + XGMAC_DMA_DPP_INT_STATUS);
884+
885+ dwxgmac3_log_error(ndev, value, false, "DMA_DPP",
886+ dwxgmac3_dma_dpp_errors,
887+ STAT_OFF(dma_dpp_errors), stats);
844888 }
845889
846890 static int
@@ -881,6 +925,12 @@ dwxgmac3_safety_feat_config(void __iomem *ioaddr, unsigned int asp, · 34 unmodified lines
881925 value |= XGMAC_TMOUTEN; /* FSM Timeout Feature */
882926 writel(value, ioaddr + XGMAC_MAC_FSM_CONTROL);
883927
928+ /* 5. Enable Data Path Parity Protection */
929+ value = readl(ioaddr + XGMAC_MTL_DPP_CONTROL);
930+ /* already enabled by default, explicit enable it again */
931+ value &= ~XGMAC_DPP_DISABLE;
932+ writel(value, ioaddr + XGMAC_MTL_DPP_CONTROL);
933+
884934 return 0;
885935 }
886936
@@ -914,7 +964,11 @@ static int dwxgmac3_safety_feat_irq_status(struct net_device *ndev, · 27 unmodified lines
914964 ret |= !corr;
915965 }
916966
917− err = dma & (XGMAC_DEUIS | XGMAC_DECIS);
967+ /* DMA_DPP_Interrupt_Status is indicated by MCSIS bit in
968+ * DMA_Safety_Interrupt_Status, so we handle DMA Data Path
969+ * Parity Errors here
970+ */
971+ err = dma & (XGMAC_DEUIS | XGMAC_DECIS | XGMAC_MCSIS);
918972 corr = dma & XGMAC_DECIS;
919973 if (err) {
920974 dwxgmac3_handle_dma_err(ndev, ioaddr, corr, stats);
@@ -930,6 +984,7 @@ static const struct dwxgmac3_error { · 9 unmodified lines
930984 { dwxgmac3_mac_errors },
931985 { dwxgmac3_mtl_errors },
932986 { dwxgmac3_dma_errors },
987+ { dwxgmac3_dma_dpp_errors },
933988 };
934989
935990 static int dwxgmac3_safety_feat_dump(struct stmmac_safety_stats *stats,
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c+7−8
@@ -337,8 +337,7 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv, · 336 unmodified lines
337337 struct stmmac_extra_stats *x, u32 chan,
338338 u32 dir)
339339 {
340− struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
341− struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
340+ struct stmmac_pcpu_stats *stats = this_cpu_ptr(priv->xstats.pcpu_stats);
342341 u32 intr_status = readl(ioaddr + XGMAC_DMA_CH_STATUS(chan));
343342 u32 intr_en = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));
344343 int ret = 0;
@@ -367,15 +366,15 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv, · 22 unmodified lines
367366 /* TX/RX NORMAL interrupts */
368367 if (likely(intr_status & XGMAC_NIS)) {
369368 if (likely(intr_status & XGMAC_RI)) {
370− u64_stats_update_begin(&rxq_stats->syncp);
371− rxq_stats->rx_normal_irq_n++;
372− u64_stats_update_end(&rxq_stats->syncp);
369+ u64_stats_update_begin(&stats->syncp);
370+ u64_stats_inc(&stats->rx_normal_irq_n[chan]);
371+ u64_stats_update_end(&stats->syncp);
373372 ret |= handle_rx;
374373 }
375374 if (likely(intr_status & (XGMAC_TI | XGMAC_TBU))) {
376− u64_stats_update_begin(&txq_stats->syncp);
377− txq_stats->tx_normal_irq_n++;
378− u64_stats_update_end(&txq_stats->syncp);
375+ u64_stats_update_begin(&stats->syncp);
376+ u64_stats_inc(&stats->tx_normal_irq_n[chan]);
377+ u64_stats_update_end(&stats->syncp);
379378 ret |= handle_tx;
380379 }
381380 }
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c+87−42
@@ -549,44 +549,79 @@ stmmac_set_pauseparam(struct net_device *netdev, · 548 unmodified lines
549549 }
550550 }
551551
552+static u64 stmmac_get_rx_normal_irq_n(struct stmmac_priv *priv, int q)
553+{
554+ u64 total;
555+ int cpu;
556+
557+ total = 0;
558+ for_each_possible_cpu(cpu) {
559+ struct stmmac_pcpu_stats *pcpu;
560+ unsigned int start;
561+ u64 irq_n;
562+
563+ pcpu = per_cpu_ptr(priv->xstats.pcpu_stats, cpu);
564+ do {
565+ start = u64_stats_fetch_begin(&pcpu->syncp);
566+ irq_n = u64_stats_read(&pcpu->rx_normal_irq_n[q]);
567+ } while (u64_stats_fetch_retry(&pcpu->syncp, start));
568+ total += irq_n;
569+ }
570+ return total;
571+}
572+
573+static u64 stmmac_get_tx_normal_irq_n(struct stmmac_priv *priv, int q)
574+{
575+ u64 total;
576+ int cpu;
577+
578+ total = 0;
579+ for_each_possible_cpu(cpu) {
580+ struct stmmac_pcpu_stats *pcpu;
581+ unsigned int start;
582+ u64 irq_n;
583+
584+ pcpu = per_cpu_ptr(priv->xstats.pcpu_stats, cpu);
585+ do {
586+ start = u64_stats_fetch_begin(&pcpu->syncp);
587+ irq_n = u64_stats_read(&pcpu->tx_normal_irq_n[q]);
588+ } while (u64_stats_fetch_retry(&pcpu->syncp, start));
589+ total += irq_n;
590+ }
591+ return total;
592+}
593+
552594 static void stmmac_get_per_qstats(struct stmmac_priv *priv, u64 *data)
553595 {
554596 u32 tx_cnt = priv->plat->tx_queues_to_use;
555597 u32 rx_cnt = priv->plat->rx_queues_to_use;
556598 unsigned int start;
557− int q, stat;
558− char *p;
599+ int q;
559600
560601 for (q = 0; q < tx_cnt; q++) {
561602 struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[q];
562− struct stmmac_txq_stats snapshot;
603+ u64 pkt_n;
563604
564605 do {
565− start = u64_stats_fetch_begin(&txq_stats->syncp);
566− snapshot = *txq_stats;
567− } while (u64_stats_fetch_retry(&txq_stats->syncp, start));
606+ start = u64_stats_fetch_begin(&txq_stats->napi_syncp);
607+ pkt_n = u64_stats_read(&txq_stats->napi.tx_pkt_n);
608+ } while (u64_stats_fetch_retry(&txq_stats->napi_syncp, start));
568609
569− p = (char *)&snapshot + offsetof(struct stmmac_txq_stats, tx_pkt_n);
570− for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
571− *data++ = (*(u64 *)p);
572− p += sizeof(u64);
573− }
610+ *data++ = pkt_n;
611+ *data++ = stmmac_get_tx_normal_irq_n(priv, q);
574612 }
575613
576614 for (q = 0; q < rx_cnt; q++) {
577615 struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[q];
578− struct stmmac_rxq_stats snapshot;
616+ u64 pkt_n;
579617
580618 do {
581− start = u64_stats_fetch_begin(&rxq_stats->syncp);
582− snapshot = *rxq_stats;
583− } while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
619+ start = u64_stats_fetch_begin(&rxq_stats->napi_syncp);
620+ pkt_n = u64_stats_read(&rxq_stats->napi.rx_pkt_n);
621+ } while (u64_stats_fetch_retry(&rxq_stats->napi_syncp, start));
584622
585− p = (char *)&snapshot + offsetof(struct stmmac_rxq_stats, rx_pkt_n);
586− for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
587− *data++ = (*(u64 *)p);
588− p += sizeof(u64);
589− }
623+ *data++ = pkt_n;
624+ *data++ = stmmac_get_rx_normal_irq_n(priv, q);
590625 }
591626 }
592627
@@ -645,39 +680,49 @@ static void stmmac_get_ethtool_stats(struct net_device *dev, · 52 unmodified lines
645680 pos = j;
646681 for (i = 0; i < rx_queues_count; i++) {
647682 struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[i];
648− struct stmmac_rxq_stats snapshot;
683+ struct stmmac_napi_rx_stats snapshot;
684+ u64 n_irq;
649685
650686 j = pos;
651687 do {
652− start = u64_stats_fetch_begin(&rxq_stats->syncp);
653− snapshot = *rxq_stats;
654− } while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
655−
656− data[j++] += snapshot.rx_pkt_n;
657− data[j++] += snapshot.rx_normal_irq_n;
658− normal_irq_n += snapshot.rx_normal_irq_n;
659− napi_poll += snapshot.napi_poll;
688+ start = u64_stats_fetch_begin(&rxq_stats->napi_syncp);
689+ snapshot = rxq_stats->napi;
690+ } while (u64_stats_fetch_retry(&rxq_stats->napi_syncp, start));
691+
692+ data[j++] += u64_stats_read(&snapshot.rx_pkt_n);
693+ n_irq = stmmac_get_rx_normal_irq_n(priv, i);
694+ data[j++] += n_irq;
695+ normal_irq_n += n_irq;
696+ napi_poll += u64_stats_read(&snapshot.poll);
660697 }
661698
662699 pos = j;
663700 for (i = 0; i < tx_queues_count; i++) {
664701 struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[i];
665− struct stmmac_txq_stats snapshot;
702+ struct stmmac_napi_tx_stats napi_snapshot;
703+ struct stmmac_q_tx_stats q_snapshot;
704+ u64 n_irq;
666705
667706 j = pos;
668707 do {
669− start = u64_stats_fetch_begin(&txq_stats->syncp);
670− snapshot = *txq_stats;
671− } while (u64_stats_fetch_retry(&txq_stats->syncp, start));
672−
673− data[j++] += snapshot.tx_pkt_n;
674− data[j++] += snapshot.tx_normal_irq_n;
675− normal_irq_n += snapshot.tx_normal_irq_n;
676− data[j++] += snapshot.tx_clean;
677− data[j++] += snapshot.tx_set_ic_bit;
678− data[j++] += snapshot.tx_tso_frames;
679− data[j++] += snapshot.tx_tso_nfrags;
680− napi_poll += snapshot.napi_poll;
708+ start = u64_stats_fetch_begin(&txq_stats->q_syncp);
709+ q_snapshot = txq_stats->q;
710+ } while (u64_stats_fetch_retry(&txq_stats->q_syncp, start));
711+ do {
712+ start = u64_stats_fetch_begin(&txq_stats->napi_syncp);
713+ napi_snapshot = txq_stats->napi;
714+ } while (u64_stats_fetch_retry(&txq_stats->napi_syncp, start));
715+
716+ data[j++] += u64_stats_read(&napi_snapshot.tx_pkt_n);
717+ n_irq = stmmac_get_tx_normal_irq_n(priv, i);
718+ data[j++] += n_irq;
719+ normal_irq_n += n_irq;
720+ data[j++] += u64_stats_read(&napi_snapshot.tx_clean);
721+ data[j++] += u64_stats_read(&q_snapshot.tx_set_ic_bit) +
722+ u64_stats_read(&napi_snapshot.tx_set_ic_bit);
723+ data[j++] += u64_stats_read(&q_snapshot.tx_tso_frames);
724+ data[j++] += u64_stats_read(&q_snapshot.tx_tso_nfrags);
725+ napi_poll += u64_stats_read(&napi_snapshot.poll);
681726 }
682727 normal_irq_n += priv->xstats.rx_early_irq;
683728 data[j++] = normal_irq_n;
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+72−67
@@ -2482,7 +2482,6 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget) · 2481 unmodified lines
24822482 struct xdp_desc xdp_desc;
24832483 bool work_done = true;
24842484 u32 tx_set_ic_bit = 0;
2485− unsigned long flags;
24862485
24872486 /* Avoids TX time-out as we are sharing with slow path */
24882487 txq_trans_cond_update(nq);
@@ -2566,9 +2565,9 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget) · 77 unmodified lines
25662565 tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size);
25672566 entry = tx_q->cur_tx;
25682567 }
2569− flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
2570− txq_stats->tx_set_ic_bit += tx_set_ic_bit;
2571− u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
2568+ u64_stats_update_begin(&txq_stats->napi_syncp);
2569+ u64_stats_add(&txq_stats->napi.tx_set_ic_bit, tx_set_ic_bit);
2570+ u64_stats_update_end(&txq_stats->napi_syncp);
25722571
25732572 if (tx_desc) {
25742573 stmmac_flush_tx_descriptors(priv, queue);
@@ -2616,7 +2615,6 @@ static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue, · 41 unmodified lines
26162615 unsigned int bytes_compl = 0, pkts_compl = 0;
26172616 unsigned int entry, xmits = 0, count = 0;
26182617 u32 tx_packets = 0, tx_errors = 0;
2619− unsigned long flags;
26202618
26212619 __netif_tx_lock_bh(netdev_get_tx_queue(priv->dev, queue));
26222620
@@ -2782,11 +2780,11 @@ static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue, · 159 unmodified lines
27822780 if (tx_q->dirty_tx != tx_q->cur_tx)
27832781 *pending_packets = true;
27842782
2785− flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
2786− txq_stats->tx_packets += tx_packets;
2787− txq_stats->tx_pkt_n += tx_packets;
2788− txq_stats->tx_clean++;
2789− u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
2783+ u64_stats_update_begin(&txq_stats->napi_syncp);
2784+ u64_stats_add(&txq_stats->napi.tx_packets, tx_packets);
2785+ u64_stats_add(&txq_stats->napi.tx_pkt_n, tx_packets);
2786+ u64_stats_inc(&txq_stats->napi.tx_clean);
2787+ u64_stats_update_end(&txq_stats->napi_syncp);
27902788
27912789 priv->xstats.tx_errors += tx_errors;
27922790
@@ -3932,6 +3930,9 @@ static int __stmmac_open(struct net_device *dev, · 1139 unmodified lines
39323930 priv->rx_copybreak = STMMAC_RX_COPYBREAK;
39333931
39343932 buf_sz = dma_conf->dma_buf_sz;
3933+ for (int i = 0; i < MTL_MAX_TX_QUEUES; i++)
3934+ if (priv->dma_conf.tx_queue[i].tbs & STMMAC_TBS_EN)
3935+ dma_conf->tx_queue[i].tbs = priv->dma_conf.tx_queue[i].tbs;
39353936 memcpy(&priv->dma_conf, dma_conf, sizeof(*dma_conf));
39363937
39373938 stmmac_reset_queues_param(priv);
@@ -4210,7 +4211,6 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev) · 272 unmodified lines
42104211 struct stmmac_tx_queue *tx_q;
42114212 bool has_vlan, set_ic;
42124213 u8 proto_hdr_len, hdr;
4213− unsigned long flags;
42144214 u32 pay_len, mss;
42154215 dma_addr_t des;
42164216 int i;
@@ -4375,13 +4375,13 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev) · 158 unmodified lines
43754375 netif_tx_stop_queue(netdev_get_tx_queue(priv->dev, queue));
43764376 }
43774377
4378− flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
4379− txq_stats->tx_bytes += skb->len;
4380− txq_stats->tx_tso_frames++;
4381− txq_stats->tx_tso_nfrags += nfrags;
4378+ u64_stats_update_begin(&txq_stats->q_syncp);
4379+ u64_stats_add(&txq_stats->q.tx_bytes, skb->len);
4380+ u64_stats_inc(&txq_stats->q.tx_tso_frames);
4381+ u64_stats_add(&txq_stats->q.tx_tso_nfrags, nfrags);
43824382 if (set_ic)
4383− txq_stats->tx_set_ic_bit++;
4384− u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
4383+ u64_stats_inc(&txq_stats->q.tx_set_ic_bit);
4384+ u64_stats_update_end(&txq_stats->q_syncp);
43854385
43864386 if (priv->sarc_type)
43874387 stmmac_set_desc_sarc(priv, first, priv->sarc_type);
@@ -4480,7 +4480,6 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) · 92 unmodified lines
44804480 struct stmmac_tx_queue *tx_q;
44814481 bool has_vlan, set_ic;
44824482 int entry, first_tx;
4483− unsigned long flags;
44844483 dma_addr_t des;
44854484
44864485 tx_q = &priv->dma_conf.tx_queue[queue];
@@ -4650,11 +4649,11 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) · 163 unmodified lines
46504649 netif_tx_stop_queue(netdev_get_tx_queue(priv->dev, queue));
46514650 }
46524651
4653− flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
4654− txq_stats->tx_bytes += skb->len;
4652+ u64_stats_update_begin(&txq_stats->q_syncp);
4653+ u64_stats_add(&txq_stats->q.tx_bytes, skb->len);
46554654 if (set_ic)
4656− txq_stats->tx_set_ic_bit++;
4657− u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
4655+ u64_stats_inc(&txq_stats->q.tx_set_ic_bit);
4656+ u64_stats_update_end(&txq_stats->q_syncp);
46584657
46594658 if (priv->sarc_type)
46604659 stmmac_set_desc_sarc(priv, first, priv->sarc_type);
@@ -4918,12 +4917,11 @@ static int stmmac_xdp_xmit_xdpf(struct stmmac_priv *priv, int queue, · 257 unmodified lines
49184917 set_ic = false;
49194918
49204919 if (set_ic) {
4921− unsigned long flags;
49224920 tx_q->tx_count_frames = 0;
49234921 stmmac_set_tx_ic(priv, tx_desc);
4924− flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
4925− txq_stats->tx_set_ic_bit++;
4926− u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
4922+ u64_stats_update_begin(&txq_stats->q_syncp);
4923+ u64_stats_inc(&txq_stats->q.tx_set_ic_bit);
4924+ u64_stats_update_end(&txq_stats->q_syncp);
49274925 }
49284926
49294927 stmmac_enable_dma_transmission(priv, priv->ioaddr);
@@ -5073,7 +5071,6 @@ static void stmmac_dispatch_skb_zc(struct stmmac_priv *priv, u32 queue, · 143 unmodified lines
50735071 unsigned int len = xdp->data_end - xdp->data;
50745072 enum pkt_hash_types hash_type;
50755073 int coe = priv->hw->rx_csum;
5076− unsigned long flags;
50775074 struct sk_buff *skb;
50785075 u32 hash;
50795076
@@ -5103,10 +5100,10 @@ static void stmmac_dispatch_skb_zc(struct stmmac_priv *priv, u32 queue, · 23 unmodified lines
51035100 skb_record_rx_queue(skb, queue);
51045101 napi_gro_receive(&ch->rxtx_napi, skb);
51055102
5106− flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
5107− rxq_stats->rx_pkt_n++;
5108− rxq_stats->rx_bytes += len;
5109− u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
5103+ u64_stats_update_begin(&rxq_stats->napi_syncp);
5104+ u64_stats_inc(&rxq_stats->napi.rx_pkt_n);
5105+ u64_stats_add(&rxq_stats->napi.rx_bytes, len);
5106+ u64_stats_update_end(&rxq_stats->napi_syncp);
51105107 }
51115108
51125109 static bool stmmac_rx_refill_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
@@ -5188,7 +5185,6 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue) · 75 unmodified lines
51885185 unsigned int desc_size;
51895186 struct bpf_prog *prog;
51905187 bool failure = false;
5191− unsigned long flags;
51925188 int xdp_status = 0;
51935189 int status = 0;
51945190
@@ -5343,9 +5339,9 @@ read_again: · 148 unmodified lines
53435339
53445340 stmmac_finalize_xdp_rx(priv, xdp_status);
53455341
5346− flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
5347− rxq_stats->rx_pkt_n += count;
5348− u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
5342+ u64_stats_update_begin(&rxq_stats->napi_syncp);
5343+ u64_stats_add(&rxq_stats->napi.rx_pkt_n, count);
5344+ u64_stats_update_end(&rxq_stats->napi_syncp);
53495345
53505346 priv->xstats.rx_dropped += rx_dropped;
53515347 priv->xstats.rx_errors += rx_errors;
@@ -5383,7 +5379,6 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue) · 31 unmodified lines
53835379 unsigned int desc_size;
53845380 struct sk_buff *skb = NULL;
53855381 struct stmmac_xdp_buff ctx;
5386− unsigned long flags;
53875382 int xdp_status = 0;
53885383 int buf_sz;
53895384
@@ -5643,11 +5638,11 @@ drain_data: · 253 unmodified lines
56435638
56445639 stmmac_rx_refill(priv, queue);
56455640
5646− flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
5647− rxq_stats->rx_packets += rx_packets;
5648− rxq_stats->rx_bytes += rx_bytes;
5649− rxq_stats->rx_pkt_n += count;
5650− u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
5641+ u64_stats_update_begin(&rxq_stats->napi_syncp);
5642+ u64_stats_add(&rxq_stats->napi.rx_packets, rx_packets);
5643+ u64_stats_add(&rxq_stats->napi.rx_bytes, rx_bytes);
5644+ u64_stats_add(&rxq_stats->napi.rx_pkt_n, count);
5645+ u64_stats_update_end(&rxq_stats->napi_syncp);
56515646
56525647 priv->xstats.rx_dropped += rx_dropped;
56535648 priv->xstats.rx_errors += rx_errors;
@@ -5662,13 +5657,12 @@ static int stmmac_napi_poll_rx(struct napi_struct *napi, int budget) · 8 unmodified lines
56625657 struct stmmac_priv *priv = ch->priv_data;
56635658 struct stmmac_rxq_stats *rxq_stats;
56645659 u32 chan = ch->index;
5665− unsigned long flags;
56665660 int work_done;
56675661
56685662 rxq_stats = &priv->xstats.rxq_stats[chan];
5669− flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
5670− rxq_stats->napi_poll++;
5671− u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
5663+ u64_stats_update_begin(&rxq_stats->napi_syncp);
5664+ u64_stats_inc(&rxq_stats->napi.poll);
5665+ u64_stats_update_end(&rxq_stats->napi_syncp);
56725666
56735667 work_done = stmmac_rx(priv, budget, chan);
56745668 if (work_done < budget && napi_complete_done(napi, work_done)) {
@@ -5690,13 +5684,12 @@ static int stmmac_napi_poll_tx(struct napi_struct *napi, int budget) · 15 unmodified lines
56905684 struct stmmac_txq_stats *txq_stats;
56915685 bool pending_packets = false;
56925686 u32 chan = ch->index;
5693− unsigned long flags;
56945687 int work_done;
56955688
56965689 txq_stats = &priv->xstats.txq_stats[chan];
5697− flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
5698− txq_stats->napi_poll++;
5699− u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
5690+ u64_stats_update_begin(&txq_stats->napi_syncp);
5691+ u64_stats_inc(&txq_stats->napi.poll);
5692+ u64_stats_update_end(&txq_stats->napi_syncp);
57005693
57015694 work_done = stmmac_tx_clean(priv, budget, chan, &pending_packets);
57025695 work_done = min(work_done, budget);
@@ -5726,17 +5719,16 @@ static int stmmac_napi_poll_rxtx(struct napi_struct *napi, int budget) · 23 unmodified lines
57265719 struct stmmac_rxq_stats *rxq_stats;
57275720 struct stmmac_txq_stats *txq_stats;
57285721 u32 chan = ch->index;
5729− unsigned long flags;
57305722
57315723 rxq_stats = &priv->xstats.rxq_stats[chan];
5732− flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
5733− rxq_stats->napi_poll++;
5734− u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
5724+ u64_stats_update_begin(&rxq_stats->napi_syncp);
5725+ u64_stats_inc(&rxq_stats->napi.poll);
5726+ u64_stats_update_end(&rxq_stats->napi_syncp);
57355727
57365728 txq_stats = &priv->xstats.txq_stats[chan];
5737− flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
5738− txq_stats->napi_poll++;
5739− u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
5729+ u64_stats_update_begin(&txq_stats->napi_syncp);
5730+ u64_stats_inc(&txq_stats->napi.poll);
5731+ u64_stats_update_end(&txq_stats->napi_syncp);
57405732
57415733 tx_done = stmmac_tx_clean(priv, budget, chan, &tx_pending_packets);
57425734 tx_done = min(tx_done, budget);
@@ -7062,10 +7054,13 @@ static void stmmac_get_stats64(struct net_device *dev, struct rtnl_link_stats64 · 1319 unmodified lines
70627054 u64 tx_bytes;
70637055
70647056 do {
7065− start = u64_stats_fetch_begin(&txq_stats->syncp);
7066− tx_packets = txq_stats->tx_packets;
7067− tx_bytes = txq_stats->tx_bytes;
7068− } while (u64_stats_fetch_retry(&txq_stats->syncp, start));
7057+ start = u64_stats_fetch_begin(&txq_stats->q_syncp);
7058+ tx_bytes = u64_stats_read(&txq_stats->q.tx_bytes);
7059+ } while (u64_stats_fetch_retry(&txq_stats->q_syncp, start));
7060+ do {
7061+ start = u64_stats_fetch_begin(&txq_stats->napi_syncp);
7062+ tx_packets = u64_stats_read(&txq_stats->napi.tx_packets);
7063+ } while (u64_stats_fetch_retry(&txq_stats->napi_syncp, start));
70697064
70707065 stats->tx_packets += tx_packets;
70717066 stats->tx_bytes += tx_bytes;
@@ -7077,10 +7072,10 @@ static void stmmac_get_stats64(struct net_device *dev, struct rtnl_link_stats64 · 5 unmodified lines
70777072 u64 rx_bytes;
70787073
70797074 do {
7080− start = u64_stats_fetch_begin(&rxq_stats->syncp);
7081− rx_packets = rxq_stats->rx_packets;
7082− rx_bytes = rxq_stats->rx_bytes;
7083− } while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
7075+ start = u64_stats_fetch_begin(&rxq_stats->napi_syncp);
7076+ rx_packets = u64_stats_read(&rxq_stats->napi.rx_packets);
7077+ rx_bytes = u64_stats_read(&rxq_stats->napi.rx_bytes);
7078+ } while (u64_stats_fetch_retry(&rxq_stats->napi_syncp, start));
70847079
70857080 stats->rx_packets += rx_packets;
70867081 stats->rx_bytes += rx_bytes;
@@ -7474,9 +7469,16 @@ int stmmac_dvr_probe(struct device *device, · 387 unmodified lines
74747469 priv->dev = ndev;
74757470
74767471 for (i = 0; i < MTL_MAX_RX_QUEUES; i++)
7477− u64_stats_init(&priv->xstats.rxq_stats[i].syncp);
7478− for (i = 0; i < MTL_MAX_TX_QUEUES; i++)
7479− u64_stats_init(&priv->xstats.txq_stats[i].syncp);
7472+ u64_stats_init(&priv->xstats.rxq_stats[i].napi_syncp);
7473+ for (i = 0; i < MTL_MAX_TX_QUEUES; i++) {
7474+ u64_stats_init(&priv->xstats.txq_stats[i].q_syncp);
7475+ u64_stats_init(&priv->xstats.txq_stats[i].napi_syncp);
7476+ }
7477+
7478+ priv->xstats.pcpu_stats =
7479+ devm_netdev_alloc_pcpu_stats(device, struct stmmac_pcpu_stats);
7480+ if (!priv->xstats.pcpu_stats)
7481+ return -ENOMEM;
74807482
74817483 stmmac_set_ethtool_ops(ndev);
74827484 priv->pause = pause;
@@ -7542,6 +7544,9 @@ int stmmac_dvr_probe(struct device *device, · 59 unmodified lines
75427544 dev_err(priv->device, "unable to bring out of ahb reset: %pe\n",
75437545 ERR_PTR(ret));
75447546
7547+ /* Wait a bit for the reset to take effect */
7548+ udelay(10);
7549+
75457550 /* Init MAC and get the capabilities */
75467551 ret = stmmac_hw_init(priv);
75477552 if (ret)
drivers/net/ethernet/ti/cpsw.c+2−0
@@ -631,6 +631,8 @@ static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) · 630 unmodified lines
631631 }
632632 }
633633
634+ phy->mac_managed_pm = true;
635+
634636 slave->phy = phy;
635637
636638 phy_attached_info(slave->phy);
drivers/net/ethernet/ti/cpsw_new.c+3−0
@@ -773,6 +773,9 @@ static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) · 772 unmodified lines
773773 slave->slave_num);
774774 return;
775775 }
776+
777+ phy->mac_managed_pm = true;
778+
776779 slave->phy = phy;
777780
778781 phy_attached_info(slave->phy);
drivers/net/fjes/fjes_hw.c+30−7
@@ -221,21 +221,25 @@ static int fjes_hw_setup(struct fjes_hw *hw) · 220 unmodified lines
221221
222222 mem_size = FJES_DEV_REQ_BUF_SIZE(hw->max_epid);
223223 hw->hw_info.req_buf = kzalloc(mem_size, GFP_KERNEL);
224− if (!(hw->hw_info.req_buf))
225− return -ENOMEM;
224+ if (!(hw->hw_info.req_buf)) {
225+ result = -ENOMEM;
226+ goto free_ep_info;
227+ }
226228
227229 hw->hw_info.req_buf_size = mem_size;
228230
229231 mem_size = FJES_DEV_RES_BUF_SIZE(hw->max_epid);
230232 hw->hw_info.res_buf = kzalloc(mem_size, GFP_KERNEL);
231− if (!(hw->hw_info.res_buf))
232− return -ENOMEM;
233+ if (!(hw->hw_info.res_buf)) {
234+ result = -ENOMEM;
235+ goto free_req_buf;
236+ }
233237
234238 hw->hw_info.res_buf_size = mem_size;
235239
236240 result = fjes_hw_alloc_shared_status_region(hw);
237241 if (result)
238− return result;
242+ goto free_res_buf;
239243
240244 hw->hw_info.buffer_share_bit = 0;
241245 hw->hw_info.buffer_unshare_reserve_bit = 0;
@@ -246,11 +250,11 @@ static int fjes_hw_setup(struct fjes_hw *hw) · 4 unmodified lines
246250
247251 result = fjes_hw_alloc_epbuf(&buf_pair->tx);
248252 if (result)
249− return result;
253+ goto free_epbuf;
250254
251255 result = fjes_hw_alloc_epbuf(&buf_pair->rx);
252256 if (result)
253− return result;
257+ goto free_epbuf;
254258
255259 spin_lock_irqsave(&hw->rx_status_lock, flags);
256260 fjes_hw_setup_epbuf(&buf_pair->tx, mac,
@@ -273,6 +277,25 @@ static int fjes_hw_setup(struct fjes_hw *hw) · 16 unmodified lines
273277 fjes_hw_init_command_registers(hw, &param);
274278
275279 return 0;
280+
281+free_epbuf:
282+ for (epidx = 0; epidx < hw->max_epid ; epidx++) {
283+ if (epidx == hw->my_epid)
284+ continue;
285+ fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].tx);
286+ fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].rx);
287+ }
288+ fjes_hw_free_shared_status_region(hw);
289+free_res_buf:
290+ kfree(hw->hw_info.res_buf);
291+ hw->hw_info.res_buf = NULL;
292+free_req_buf:
293+ kfree(hw->hw_info.req_buf);
294+ hw->hw_info.req_buf = NULL;
295+free_ep_info:
296+ kfree(hw->ep_shm_info);
297+ hw->ep_shm_info = NULL;
298+ return result;
276299 }
277300
278301 static void fjes_hw_cleanup(struct fjes_hw *hw)
drivers/net/hyperv/netvsc.c+4−1
@@ -708,7 +708,10 @@ void netvsc_device_remove(struct hv_device *device) · 707 unmodified lines
708708 /* Disable NAPI and disassociate its context from the device. */
709709 for (i = 0; i < net_device->num_chn; i++) {
710710 /* See also vmbus_reset_channel_cb(). */
711− napi_disable(&net_device->chan_table[i].napi);
711+ /* only disable enabled NAPI channel */
712+ if (i < ndev->real_num_rx_queues)
713+ napi_disable(&net_device->chan_table[i].napi);
714+
712715 netif_napi_del(&net_device->chan_table[i].napi);
713716 }
714717
drivers/net/hyperv/netvsc_drv.c+64−22
@@ -42,9 +42,13 @@ · 41 unmodified lines
4242 #define LINKCHANGE_INT (2 * HZ)
4343 #define VF_TAKEOVER_INT (HZ / 10)
4444
45+/* Macros to define the context of vf registration */
46+#define VF_REG_IN_PROBE 1
47+#define VF_REG_IN_NOTIFIER 2
48+
4549 static unsigned int ring_size __ro_after_init = 128;
4650 module_param(ring_size, uint, 0444);
47−MODULE_PARM_DESC(ring_size, "Ring buffer size (# of pages)");
51+MODULE_PARM_DESC(ring_size, "Ring buffer size (# of 4K pages)");
4852 unsigned int netvsc_ring_bytes __ro_after_init;
4953
5054 static const u32 default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
@@ -2185,7 +2189,7 @@ static rx_handler_result_t netvsc_vf_handle_frame(struct sk_buff **pskb) · 2134 unmodified lines
21852189 }
21862190
21872191 static int netvsc_vf_join(struct net_device *vf_netdev,
2188− struct net_device *ndev)
2192+ struct net_device *ndev, int context)
21892193 {
21902194 struct net_device_context *ndev_ctx = netdev_priv(ndev);
21912195 int ret;
@@ -2208,7 +2212,11 @@ static int netvsc_vf_join(struct net_device *vf_netdev, · 16 unmodified lines
22082212 goto upper_link_failed;
22092213 }
22102214
2211− schedule_delayed_work(&ndev_ctx->vf_takeover, VF_TAKEOVER_INT);
2215+ /* If this registration is called from probe context vf_takeover
2216+ * is taken care of later in probe itself.
2217+ */
2218+ if (context == VF_REG_IN_NOTIFIER)
2219+ schedule_delayed_work(&ndev_ctx->vf_takeover, VF_TAKEOVER_INT);
22122220
22132221 call_netdevice_notifiers(NETDEV_JOIN, vf_netdev);
22142222
@@ -2346,7 +2354,7 @@ static int netvsc_prepare_bonding(struct net_device *vf_netdev) · 131 unmodified lines
23462354 return NOTIFY_DONE;
23472355 }
23482356
2349−static int netvsc_register_vf(struct net_device *vf_netdev)
2357+static int netvsc_register_vf(struct net_device *vf_netdev, int context)
23502358 {
23512359 struct net_device_context *net_device_ctx;
23522360 struct netvsc_device *netvsc_dev;
@@ -2386,7 +2394,7 @@ static int netvsc_register_vf(struct net_device *vf_netdev) · 33 unmodified lines
23862394
23872395 netdev_info(ndev, "VF registering: %s\n", vf_netdev->name);
23882396
2389− if (netvsc_vf_join(vf_netdev, ndev) != 0)
2397+ if (netvsc_vf_join(vf_netdev, ndev, context) != 0)
23902398 return NOTIFY_DONE;
23912399
23922400 dev_hold(vf_netdev);
@@ -2484,10 +2492,31 @@ static int netvsc_unregister_vf(struct net_device *vf_netdev) · 91 unmodified lines
24842492 return NOTIFY_OK;
24852493 }
24862494
2495+static int check_dev_is_matching_vf(struct net_device *event_ndev)
2496+{
2497+ /* Skip NetVSC interfaces */
2498+ if (event_ndev->netdev_ops == &device_ops)
2499+ return -ENODEV;
2500+
2501+ /* Avoid non-Ethernet type devices */
2502+ if (event_ndev->type != ARPHRD_ETHER)
2503+ return -ENODEV;
2504+
2505+ /* Avoid Vlan dev with same MAC registering as VF */
2506+ if (is_vlan_dev(event_ndev))
2507+ return -ENODEV;
2508+
2509+ /* Avoid Bonding master dev with same MAC registering as VF */
2510+ if (netif_is_bond_master(event_ndev))
2511+ return -ENODEV;
2512+
2513+ return 0;
2514+}
2515+
24872516 static int netvsc_probe(struct hv_device *dev,
24882517 const struct hv_vmbus_device_id *dev_id)
24892518 {
2490− struct net_device *net = NULL;
2519+ struct net_device *net = NULL, *vf_netdev;
24912520 struct net_device_context *net_device_ctx;
24922521 struct netvsc_device_info *device_info = NULL;
24932522 struct netvsc_device *nvdev;
@@ -2599,6 +2628,30 @@ static int netvsc_probe(struct hv_device *dev, · 105 unmodified lines
25992628 }
26002629
26012630 list_add(&net_device_ctx->list, &netvsc_dev_list);
2631+
2632+ /* When the hv_netvsc driver is unloaded and reloaded, the
2633+ * NET_DEVICE_REGISTER for the vf device is replayed before probe
2634+ * is complete. This is because register_netdevice_notifier() gets
2635+ * registered before vmbus_driver_register() so that callback func
2636+ * is set before probe and we don't miss events like NETDEV_POST_INIT
2637+ * So, in this section we try to register the matching vf device that
2638+ * is present as a netdevice, knowing that its register call is not
2639+ * processed in the netvsc_netdev_notifier(as probing is progress and
2640+ * get_netvsc_byslot fails).
2641+ */
2642+ for_each_netdev(dev_net(net), vf_netdev) {
2643+ ret = check_dev_is_matching_vf(vf_netdev);
2644+ if (ret != 0)
2645+ continue;
2646+
2647+ if (net != get_netvsc_byslot(vf_netdev))
2648+ continue;
2649+
2650+ netvsc_prepare_bonding(vf_netdev);
2651+ netvsc_register_vf(vf_netdev, VF_REG_IN_PROBE);
2652+ __netvsc_vf_setup(net, vf_netdev);
2653+ break;
2654+ }
26022655 rtnl_unlock();
26032656
26042657 netvsc_devinfo_put(device_info);
@@ -2754,28 +2807,17 @@ static int netvsc_netdev_event(struct notifier_block *this, · 149 unmodified lines
27542807 unsigned long event, void *ptr)
27552808 {
27562809 struct net_device *event_dev = netdev_notifier_info_to_dev(ptr);
2810+ int ret = 0;
27572811
2758− /* Skip our own events */
2759− if (event_dev->netdev_ops == &device_ops)
2760− return NOTIFY_DONE;
2761−
2762− /* Avoid non-Ethernet type devices */
2763− if (event_dev->type != ARPHRD_ETHER)
2764− return NOTIFY_DONE;
2765−
2766− /* Avoid Vlan dev with same MAC registering as VF */
2767− if (is_vlan_dev(event_dev))
2768− return NOTIFY_DONE;
2769−
2770− /* Avoid Bonding master dev with same MAC registering as VF */
2771− if (netif_is_bond_master(event_dev))
2812+ ret = check_dev_is_matching_vf(event_dev);
2813+ if (ret != 0)
27722814 return NOTIFY_DONE;
27732815
27742816 switch (event) {
27752817 case NETDEV_POST_INIT:
27762818 return netvsc_prepare_bonding(event_dev);
27772819 case NETDEV_REGISTER:
2778− return netvsc_register_vf(event_dev);
2820+ return netvsc_register_vf(event_dev, VF_REG_IN_NOTIFIER);
27792821 case NETDEV_UNREGISTER:
27802822 return netvsc_unregister_vf(event_dev);
27812823 case NETDEV_UP:
@@ -2807,7 +2849,7 @@ static int __init netvsc_drv_init(void) · 25 unmodified lines
28072849 pr_info("Increased ring_size to %u (min allowed)\n",
28082850 ring_size);
28092851 }
2810− netvsc_ring_bytes = ring_size * PAGE_SIZE;
2852+ netvsc_ring_bytes = VMBUS_RING_SIZE(ring_size * 4096);
28112853
28122854 register_netdevice_notifier(&netvsc_netdev_notifier);
28132855
drivers/net/macsec.c+20−5
@@ -607,11 +607,26 @@ static struct sk_buff *macsec_encrypt(struct sk_buff *skb, · 606 unmodified lines
607607 return ERR_PTR(-EINVAL);
608608 }
609609
610− ret = skb_ensure_writable_head_tail(skb, dev);
611− if (unlikely(ret < 0)) {
612− macsec_txsa_put(tx_sa);
613− kfree_skb(skb);
614− return ERR_PTR(ret);
610+ if (unlikely(skb_headroom(skb) < MACSEC_NEEDED_HEADROOM ||
611+ skb_tailroom(skb) < MACSEC_NEEDED_TAILROOM)) {
612+ struct sk_buff *nskb = skb_copy_expand(skb,
613+ MACSEC_NEEDED_HEADROOM,
614+ MACSEC_NEEDED_TAILROOM,
615+ GFP_ATOMIC);
616+ if (likely(nskb)) {
617+ consume_skb(skb);
618+ skb = nskb;
619+ } else {
620+ macsec_txsa_put(tx_sa);
621+ kfree_skb(skb);
622+ return ERR_PTR(-ENOMEM);
623+ }
624+ } else {
625+ skb = skb_unshare(skb, GFP_ATOMIC);
626+ if (!skb) {
627+ macsec_txsa_put(tx_sa);
628+ return ERR_PTR(-ENOMEM);
629+ }
615630 }
616631
617632 unprotected_len = skb->len;
drivers/net/netdevsim/dev.c+4−4
@@ -835,14 +835,14 @@ static void nsim_dev_trap_report_work(struct work_struct *work) · 834 unmodified lines
835835 trap_report_dw.work);
836836 nsim_dev = nsim_trap_data->nsim_dev;
837837
838− /* For each running port and enabled packet trap, generate a UDP
839− * packet with a random 5-tuple and report it.
840− */
841838 if (!devl_trylock(priv_to_devlink(nsim_dev))) {
842− schedule_delayed_work(&nsim_dev->trap_data->trap_report_dw, 0);
839+ schedule_delayed_work(&nsim_dev->trap_data->trap_report_dw, 1);
843840 return;
844841 }
845842
843+ /* For each running port and enabled packet trap, generate a UDP
844+ * packet with a random 5-tuple and report it.
845+ */
846846 list_for_each_entry(nsim_dev_port, &nsim_dev->port_list, list) {
847847 if (!netif_running(nsim_dev_port->ns->netdev))
848848 continue;
drivers/net/phy/mediatek-ge-soc.c+81−66
@@ -489,7 +489,7 @@ static int tx_r50_fill_result(struct phy_device *phydev, u16 tx_r50_cal_val, · 488 unmodified lines
489489 u16 reg, val;
490490
491491 if (phydev->drv->phy_id == MTK_GPHY_ID_MT7988)
492− bias = -2;
492+ bias = -1;
493493
494494 val = clamp_val(bias + tx_r50_cal_val, 0, 63);
495495
@@ -705,6 +705,11 @@ restore: · 209 unmodified lines
705705 static void mt798x_phy_common_finetune(struct phy_device *phydev)
706706 {
707707 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
708+ /* SlvDSPreadyTime = 24, MasDSPreadyTime = 24 */
709+ __phy_write(phydev, 0x11, 0xc71);
710+ __phy_write(phydev, 0x12, 0xc);
711+ __phy_write(phydev, 0x10, 0x8fae);
712+
708713 /* EnabRandUpdTrig = 1 */
709714 __phy_write(phydev, 0x11, 0x2f00);
710715 __phy_write(phydev, 0x12, 0xe);
@@ -715,15 +720,56 @@ static void mt798x_phy_common_finetune(struct phy_device *phydev) · 4 unmodified lines
715720 __phy_write(phydev, 0x12, 0x0);
716721 __phy_write(phydev, 0x10, 0x83aa);
717722
718− /* TrFreeze = 0 */
723+ /* FfeUpdGainForce = 1(Enable), FfeUpdGainForceVal = 4 */
724+ __phy_write(phydev, 0x11, 0x240);
725+ __phy_write(phydev, 0x12, 0x0);
726+ __phy_write(phydev, 0x10, 0x9680);
727+
728+ /* TrFreeze = 0 (mt7988 default) */
719729 __phy_write(phydev, 0x11, 0x0);
720730 __phy_write(phydev, 0x12, 0x0);
721731 __phy_write(phydev, 0x10, 0x9686);
722732
733+ /* SSTrKp100 = 5 */
734+ /* SSTrKf100 = 6 */
735+ /* SSTrKp1000Mas = 5 */
736+ /* SSTrKf1000Mas = 6 */
723737 /* SSTrKp1000Slv = 5 */
738+ /* SSTrKf1000Slv = 6 */
724739 __phy_write(phydev, 0x11, 0xbaef);
725740 __phy_write(phydev, 0x12, 0x2e);
726741 __phy_write(phydev, 0x10, 0x968c);
742+ phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
743+}
744+
745+static void mt7981_phy_finetune(struct phy_device *phydev)
746+{
747+ u16 val[8] = { 0x01ce, 0x01c1,
748+ 0x020f, 0x0202,
749+ 0x03d0, 0x03c0,
750+ 0x0013, 0x0005 };
751+ int i, k;
752+
753+ /* 100M eye finetune:
754+ * Keep middle level of TX MLT3 shapper as default.
755+ * Only change TX MLT3 overshoot level here.
756+ */
757+ for (k = 0, i = 1; i < 12; i++) {
758+ if (i % 3 == 0)
759+ continue;
760+ phy_write_mmd(phydev, MDIO_MMD_VEND1, i, val[k++]);
761+ }
762+
763+ phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
764+ /* ResetSyncOffset = 6 */
765+ __phy_write(phydev, 0x11, 0x600);
766+ __phy_write(phydev, 0x12, 0x0);
767+ __phy_write(phydev, 0x10, 0x8fc0);
768+
769+ /* VgaDecRate = 1 */
770+ __phy_write(phydev, 0x11, 0x4c2a);
771+ __phy_write(phydev, 0x12, 0x3e);
772+ __phy_write(phydev, 0x10, 0x8fa4);
727773
728774 /* MrvlTrFix100Kp = 3, MrvlTrFix100Kf = 2,
729775 * MrvlTrFix1000Kp = 3, MrvlTrFix1000Kf = 2
@@ -738,7 +784,7 @@ static void mt798x_phy_common_finetune(struct phy_device *phydev) · 8 unmodified lines
738784 __phy_write(phydev, 0x10, 0x8ec0);
739785 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
740786
741− /* TR_OPEN_LOOP_EN = 1, lpf_x_average = 9*/
787+ /* TR_OPEN_LOOP_EN = 1, lpf_x_average = 9 */
742788 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG234,
743789 MTK_PHY_TR_OPEN_LOOP_EN_MASK | MTK_PHY_LPF_X_AVERAGE_MASK,
744790 BIT(0) | FIELD_PREP(MTK_PHY_LPF_X_AVERAGE_MASK, 0x9));
@@ -771,48 +817,6 @@ static void mt798x_phy_common_finetune(struct phy_device *phydev) · 26 unmodified lines
771817 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LDO_OUTPUT_V, 0x2222);
772818 }
773819
774−static void mt7981_phy_finetune(struct phy_device *phydev)
775−{
776− u16 val[8] = { 0x01ce, 0x01c1,
777− 0x020f, 0x0202,
778− 0x03d0, 0x03c0,
779− 0x0013, 0x0005 };
780− int i, k;
781−
782− /* 100M eye finetune:
783− * Keep middle level of TX MLT3 shapper as default.
784− * Only change TX MLT3 overshoot level here.
785− */
786− for (k = 0, i = 1; i < 12; i++) {
787− if (i % 3 == 0)
788− continue;
789− phy_write_mmd(phydev, MDIO_MMD_VEND1, i, val[k++]);
790− }
791−
792− phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
793− /* SlvDSPreadyTime = 24, MasDSPreadyTime = 24 */
794− __phy_write(phydev, 0x11, 0xc71);
795− __phy_write(phydev, 0x12, 0xc);
796− __phy_write(phydev, 0x10, 0x8fae);
797−
798− /* ResetSyncOffset = 6 */
799− __phy_write(phydev, 0x11, 0x600);
800− __phy_write(phydev, 0x12, 0x0);
801− __phy_write(phydev, 0x10, 0x8fc0);
802−
803− /* VgaDecRate = 1 */
804− __phy_write(phydev, 0x11, 0x4c2a);
805− __phy_write(phydev, 0x12, 0x3e);
806− __phy_write(phydev, 0x10, 0x8fa4);
807−
808− /* FfeUpdGainForce = 4 */
809− __phy_write(phydev, 0x11, 0x240);
810− __phy_write(phydev, 0x12, 0x0);
811− __phy_write(phydev, 0x10, 0x9680);
812−
813− phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
814−}
815−
816820 static void mt7988_phy_finetune(struct phy_device *phydev)
817821 {
818822 u16 val[12] = { 0x0187, 0x01cd, 0x01c8, 0x0182,
@@ -827,17 +831,7 @@ static void mt7988_phy_finetune(struct phy_device *phydev) · 8 unmodified lines
827831 /* TCT finetune */
828832 phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_TX_FILTER, 0x5);
829833
830− /* Disable TX power saving */
831− phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RXADC_CTRL_RG7,
832− MTK_PHY_DA_AD_BUF_BIAS_LP_MASK, 0x3 << 8);
833−
834834 phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);
835−
836− /* SlvDSPreadyTime = 24, MasDSPreadyTime = 12 */
837− __phy_write(phydev, 0x11, 0x671);
838− __phy_write(phydev, 0x12, 0xc);
839− __phy_write(phydev, 0x10, 0x8fae);
840−
841835 /* ResetSyncOffset = 5 */
842836 __phy_write(phydev, 0x11, 0x500);
843837 __phy_write(phydev, 0x12, 0x0);
@@ -845,13 +839,27 @@ static void mt7988_phy_finetune(struct phy_device *phydev) · 1 unmodified line
845839
846840 /* VgaDecRate is 1 at default on mt7988 */
847841
848− phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
842+ /* MrvlTrFix100Kp = 6, MrvlTrFix100Kf = 7,
843+ * MrvlTrFix1000Kp = 6, MrvlTrFix1000Kf = 7
844+ */
845+ __phy_write(phydev, 0x11, 0xb90a);
846+ __phy_write(phydev, 0x12, 0x6f);
847+ __phy_write(phydev, 0x10, 0x8f82);
848+
849+ /* RemAckCntLimitCtrl = 1 */
850+ __phy_write(phydev, 0x11, 0xfbba);
851+ __phy_write(phydev, 0x12, 0xc3);
852+ __phy_write(phydev, 0x10, 0x87f8);
849853
850− phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_2A30);
851− /* TxClkOffset = 2 */
852− __phy_modify(phydev, MTK_PHY_ANARG_RG, MTK_PHY_TCLKOFFSET_MASK,
853− FIELD_PREP(MTK_PHY_TCLKOFFSET_MASK, 0x2));
854854 phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
855+
856+ /* TR_OPEN_LOOP_EN = 1, lpf_x_average = 10 */
857+ phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG234,
858+ MTK_PHY_TR_OPEN_LOOP_EN_MASK | MTK_PHY_LPF_X_AVERAGE_MASK,
859+ BIT(0) | FIELD_PREP(MTK_PHY_LPF_X_AVERAGE_MASK, 0xa));
860+
861+ /* rg_tr_lpf_cnt_val = 1023 */
862+ phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_LPF_CNT_VAL, 0x3ff);
855863 }
856864
857865 static void mt798x_phy_eee(struct phy_device *phydev)
@@ -884,11 +892,11 @@ static void mt798x_phy_eee(struct phy_device *phydev) · 26 unmodified lines
884892 MTK_PHY_LPI_SLV_SEND_TX_EN,
885893 FIELD_PREP(MTK_PHY_LPI_SLV_SEND_TX_TIMER_MASK, 0x120));
886894
887− phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG239,
888− MTK_PHY_LPI_SEND_LOC_TIMER_MASK |
889− MTK_PHY_LPI_TXPCS_LOC_RCV,
890− FIELD_PREP(MTK_PHY_LPI_SEND_LOC_TIMER_MASK, 0x117));
895+ /* Keep MTK_PHY_LPI_SEND_LOC_TIMER as 375 */
896+ phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG239,
897+ MTK_PHY_LPI_TXPCS_LOC_RCV);
891898
899+ /* This also fixes some IoT issues, such as CH340 */
892900 phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG2C7,
893901 MTK_PHY_MAX_GAIN_MASK | MTK_PHY_MIN_GAIN_MASK,
894902 FIELD_PREP(MTK_PHY_MAX_GAIN_MASK, 0x8) |
@@ -922,7 +930,7 @@ static void mt798x_phy_eee(struct phy_device *phydev) · 27 unmodified lines
922930 __phy_write(phydev, 0x12, 0x0);
923931 __phy_write(phydev, 0x10, 0x9690);
924932
925− /* REG_EEE_st2TrKf1000 = 3 */
933+ /* REG_EEE_st2TrKf1000 = 2 */
926934 __phy_write(phydev, 0x11, 0x114f);
927935 __phy_write(phydev, 0x12, 0x2);
928936 __phy_write(phydev, 0x10, 0x969a);
@@ -947,7 +955,7 @@ static void mt798x_phy_eee(struct phy_device *phydev) · 18 unmodified lines
947955 __phy_write(phydev, 0x12, 0x0);
948956 __phy_write(phydev, 0x10, 0x96b8);
949957
950− /* REGEEE_wake_slv_tr_wait_dfesigdet_en = 1 */
958+ /* REGEEE_wake_slv_tr_wait_dfesigdet_en = 0 */
951959 __phy_write(phydev, 0x11, 0x1463);
952960 __phy_write(phydev, 0x12, 0x0);
953961 __phy_write(phydev, 0x10, 0x96ca);
@@ -1459,6 +1467,13 @@ static int mt7988_phy_probe(struct phy_device *phydev) · 505 unmodified lines
14591467 if (err)
14601468 return err;
14611469
1470+ /* Disable TX power saving at probing to:
1471+ * 1. Meet common mode compliance test criteria
1472+ * 2. Make sure that TX-VCM calibration works fine
1473+ */
1474+ phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RXADC_CTRL_RG7,
1475+ MTK_PHY_DA_AD_BUF_BIAS_LP_MASK, 0x3 << 8);
1476+
14621477 return mt798x_phy_calibration(phydev);
14631478 }
14641479
drivers/net/phy/micrel.c+11−0
@@ -120,6 +120,11 @@ · 119 unmodified lines
120120 */
121121 #define LAN8814_1PPM_FORMAT 17179
122122
123+#define PTP_RX_VERSION 0x0248
124+#define PTP_TX_VERSION 0x0288
125+#define PTP_MAX_VERSION(x) (((x) & GENMASK(7, 0)) << 8)
126+#define PTP_MIN_VERSION(x) ((x) & GENMASK(7, 0))
127+
123128 #define PTP_RX_MOD 0x024F
124129 #define PTP_RX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_ BIT(3)
125130 #define PTP_RX_TIMESTAMP_EN 0x024D
@@ -3150,6 +3155,12 @@ static void lan8814_ptp_init(struct phy_device *phydev) · 3024 unmodified lines
31503155 lanphy_write_page_reg(phydev, 5, PTP_TX_PARSE_IP_ADDR_EN, 0);
31513156 lanphy_write_page_reg(phydev, 5, PTP_RX_PARSE_IP_ADDR_EN, 0);
31523157
3158+ /* Disable checking for minorVersionPTP field */
3159+ lanphy_write_page_reg(phydev, 5, PTP_RX_VERSION,
3160+ PTP_MAX_VERSION(0xff) | PTP_MIN_VERSION(0x0));
3161+ lanphy_write_page_reg(phydev, 5, PTP_TX_VERSION,
3162+ PTP_MAX_VERSION(0xff) | PTP_MIN_VERSION(0x0));
3163+
31533164 skb_queue_head_init(&ptp_priv->tx_queue);
31543165 skb_queue_head_init(&ptp_priv->rx_queue);
31553166 INIT_LIST_HEAD(&ptp_priv->rx_ts_list);
drivers/net/ppp/ppp_async.c+4−0
@@ -460,6 +460,10 @@ ppp_async_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg) · 459 unmodified lines
460460 case PPPIOCSMRU:
461461 if (get_user(val, p))
462462 break;
463+ if (val > U16_MAX) {
464+ err = -EINVAL;
465+ break;
466+ }
463467 if (val < PPP_MRU)
464468 val = PPP_MRU;
465469 ap->mru = val;
drivers/net/tun.c+8−2
@@ -1630,13 +1630,19 @@ static int tun_xdp_act(struct tun_struct *tun, struct bpf_prog *xdp_prog, · 1629 unmodified lines
16301630 switch (act) {
16311631 case XDP_REDIRECT:
16321632 err = xdp_do_redirect(tun->dev, xdp, xdp_prog);
1633− if (err)
1633+ if (err) {
1634+ dev_core_stats_rx_dropped_inc(tun->dev);
16341635 return err;
1636+ }
1637+ dev_sw_netstats_rx_add(tun->dev, xdp->data_end - xdp->data);
16351638 break;
16361639 case XDP_TX:
16371640 err = tun_xdp_tx(tun->dev, xdp);
1638− if (err < 0)
1641+ if (err < 0) {
1642+ dev_core_stats_rx_dropped_inc(tun->dev);
16391643 return err;
1644+ }
1645+ dev_sw_netstats_rx_add(tun->dev, xdp->data_end - xdp->data);
16401646 break;
16411647 case XDP_PASS:
16421648 break;
drivers/net/wireless/ath/ar5523/ar5523.c+1−0
@@ -1803,5 +1803,6 @@ static struct usb_driver ar5523_driver = { · 1802 unmodified lines
18031803
18041804 module_usb_driver(ar5523_driver);
18051805
1806+MODULE_DESCRIPTION("Atheros AR5523 wireless driver");
18061807 MODULE_LICENSE("Dual BSD/GPL");
18071808 MODULE_FIRMWARE(AR5523_FIRMWARE_FILE);
drivers/net/wireless/ath/ath11k/core.h+0−4
@@ -368,10 +368,6 @@ struct ath11k_vif { · 367 unmodified lines
368368 struct ieee80211_chanctx_conf chanctx;
369369 struct ath11k_arp_ns_offload arp_ns_offload;
370370 struct ath11k_rekey_data rekey_data;
371−
372−#ifdef CONFIG_ATH11K_DEBUGFS
373− struct dentry *debugfs_twt;
374−#endif /* CONFIG_ATH11K_DEBUGFS */
375371 };
376372
377373 struct ath11k_vif_iter {
drivers/net/wireless/ath/ath11k/debugfs.c+10−15
@@ -1894,35 +1894,30 @@ static const struct file_operations ath11k_fops_twt_resume_dialog = { · 1893 unmodified lines
18941894 .open = simple_open
18951895 };
18961896
1897−void ath11k_debugfs_add_interface(struct ath11k_vif *arvif)
1897+void ath11k_debugfs_op_vif_add(struct ieee80211_hw *hw,
1898+ struct ieee80211_vif *vif)
18981899 {
1900+ struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
18991901 struct ath11k_base *ab = arvif->ar->ab;
1902+ struct dentry *debugfs_twt;
19001903
19011904 if (arvif->vif->type != NL80211_IFTYPE_AP &&
19021905 !(arvif->vif->type == NL80211_IFTYPE_STATION &&
19031906 test_bit(WMI_TLV_SERVICE_STA_TWT, ab->wmi_ab.svc_map)))
19041907 return;
19051908
1906− arvif->debugfs_twt = debugfs_create_dir("twt",
1907− arvif->vif->debugfs_dir);
1908− debugfs_create_file("add_dialog", 0200, arvif->debugfs_twt,
1909+ debugfs_twt = debugfs_create_dir("twt",
1910+ arvif->vif->debugfs_dir);
1911+ debugfs_create_file("add_dialog", 0200, debugfs_twt,
19091912 arvif, &ath11k_fops_twt_add_dialog);
19101913
1911− debugfs_create_file("del_dialog", 0200, arvif->debugfs_twt,
1914+ debugfs_create_file("del_dialog", 0200, debugfs_twt,
19121915 arvif, &ath11k_fops_twt_del_dialog);
19131916
1914− debugfs_create_file("pause_dialog", 0200, arvif->debugfs_twt,
1917+ debugfs_create_file("pause_dialog", 0200, debugfs_twt,
19151918 arvif, &ath11k_fops_twt_pause_dialog);
19161919
1917− debugfs_create_file("resume_dialog", 0200, arvif->debugfs_twt,
1920+ debugfs_create_file("resume_dialog", 0200, debugfs_twt,
19181921 arvif, &ath11k_fops_twt_resume_dialog);
19191922 }
19201923
1921−void ath11k_debugfs_remove_interface(struct ath11k_vif *arvif)
1922−{
1923− if (!arvif->debugfs_twt)
1924− return;
1925−
1926− debugfs_remove_recursive(arvif->debugfs_twt);
1927− arvif->debugfs_twt = NULL;
1928−}
drivers/net/wireless/ath/ath11k/debugfs.h+2−10
@@ -307,8 +307,8 @@ static inline int ath11k_debugfs_rx_filter(struct ath11k *ar) · 306 unmodified lines
307307 return ar->debug.rx_filter;
308308 }
309309
310−void ath11k_debugfs_add_interface(struct ath11k_vif *arvif);
311−void ath11k_debugfs_remove_interface(struct ath11k_vif *arvif);
310+void ath11k_debugfs_op_vif_add(struct ieee80211_hw *hw,
311+ struct ieee80211_vif *vif);
312312 void ath11k_debugfs_add_dbring_entry(struct ath11k *ar,
313313 enum wmi_direct_buffer_module id,
314314 enum ath11k_dbg_dbr_event event,
@@ -387,14 +387,6 @@ static inline int ath11k_debugfs_get_fw_stats(struct ath11k *ar, · 72 unmodified lines
387387 return 0;
388388 }
389389
390−static inline void ath11k_debugfs_add_interface(struct ath11k_vif *arvif)
391−{
392−}
393−
394−static inline void ath11k_debugfs_remove_interface(struct ath11k_vif *arvif)
395−{
396−}
397−
398390 static inline void
399391 ath11k_debugfs_add_dbring_entry(struct ath11k *ar,
400392 enum wmi_direct_buffer_module id,
drivers/net/wireless/ath/ath11k/mac.c+1−11
@@ -6756,13 +6756,6 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw, · 6755 unmodified lines
67566756 goto err;
67576757 }
67586758
6759− /* In the case of hardware recovery, debugfs files are
6760− * not deleted since ieee80211_ops.remove_interface() is
6761− * not invoked. In such cases, try to delete the files.
6762− * These will be re-created later.
6763− */
6764− ath11k_debugfs_remove_interface(arvif);
6765−
67666759 memset(arvif, 0, sizeof(*arvif));
67676760
67686761 arvif->ar = ar;
@@ -6939,8 +6932,6 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw, · 170 unmodified lines
69396932
69406933 ath11k_dp_vdev_tx_attach(ar, arvif);
69416934
6942− ath11k_debugfs_add_interface(arvif);
6943−
69446935 if (vif->type != NL80211_IFTYPE_MONITOR &&
69456936 test_bit(ATH11K_FLAG_MONITOR_CONF_ENABLED, &ar->monitor_flags)) {
69466937 ret = ath11k_mac_monitor_vdev_create(ar);
@@ -7056,8 +7047,6 @@ err_vdev_del: · 109 unmodified lines
70567047 /* Recalc txpower for remaining vdev */
70577048 ath11k_mac_txpower_recalc(ar);
70587049
7059− ath11k_debugfs_remove_interface(arvif);
7060−
70617050 /* TODO: recal traffic pause state based on the available vdevs */
70627051
70637052 mutex_unlock(&ar->conf_mutex);
@@ -9153,6 +9142,7 @@ static const struct ieee80211_ops ath11k_ops = { · 2089 unmodified lines
91539142 #endif
91549143
91559144 #ifdef CONFIG_ATH11K_DEBUGFS
9145+ .vif_add_debugfs = ath11k_debugfs_op_vif_add,
91569146 .sta_add_debugfs = ath11k_debugfs_sta_op_add,
91579147 #endif
91589148
drivers/net/wireless/ath/wcn36xx/main.c+1−0
@@ -1685,6 +1685,7 @@ static struct platform_driver wcn36xx_driver = { · 1684 unmodified lines
16851685
16861686 module_platform_driver(wcn36xx_driver);
16871687
1688+MODULE_DESCRIPTION("Qualcomm Atheros WCN3660/3680 wireless driver");
16881689 MODULE_LICENSE("Dual BSD/GPL");
16891690 MODULE_AUTHOR("Eugene Krasnikov k.eugene.e@gmail.com");
16901691 MODULE_FIRMWARE(WLAN_NV_FILE);
drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/module.c+1−0
@@ -20,6 +20,7 @@ static void __exit brcmf_bca_exit(void) · 19 unmodified lines
2020 brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_BCA, THIS_MODULE);
2121 }
2222
23+MODULE_DESCRIPTION("Broadcom FullMAC WLAN driver plugin for Broadcom AP chipsets");
2324 MODULE_LICENSE("Dual BSD/GPL");
2425 MODULE_IMPORT_NS(BRCMFMAC);
2526
drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c+4−2
@@ -3779,8 +3779,10 @@ static int brcmf_internal_escan_add_info(struct cfg80211_scan_request *req, · 3778 unmodified lines
37793779 if (req->channels[i] == chan)
37803780 break;
37813781 }
3782− if (i == req->n_channels)
3783− req->channels[req->n_channels++] = chan;
3782+ if (i == req->n_channels) {
3783+ req->n_channels++;
3784+ req->channels[i] = chan;
3785+ }
37843786
37853787 for (i = 0; i < req->n_ssids; i++) {
37863788 if (req->ssids[i].ssid_len == ssid_len &&
drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/module.c+1−0
@@ -20,6 +20,7 @@ static void __exit brcmf_cyw_exit(void) · 19 unmodified lines
2020 brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_CYW, THIS_MODULE);
2121 }
2222
23+MODULE_DESCRIPTION("Broadcom FullMAC WLAN driver plugin for Cypress/Infineon chipsets");
2324 MODULE_LICENSE("Dual BSD/GPL");
2425 MODULE_IMPORT_NS(BRCMFMAC);
2526
drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/module.c+1−0
@@ -20,6 +20,7 @@ static void __exit brcmf_wcc_exit(void) · 19 unmodified lines
2020 brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_WCC, THIS_MODULE);
2121 }
2222
23+MODULE_DESCRIPTION("Broadcom FullMAC WLAN driver plugin for Broadcom mobility chipsets");
2324 MODULE_LICENSE("Dual BSD/GPL");
2425 MODULE_IMPORT_NS(BRCMFMAC);
2526
drivers/net/wireless/intel/iwlwifi/fw/api/debug.h+1−1
@@ -537,7 +537,7 @@ enum iwl_fw_dbg_config_cmd_type { · 536 unmodified lines
537537 }; /* LDBG_CFG_CMD_TYPE_API_E_VER_1 */
538538
539539 /* this token disables debug asserts in the firmware */
540−#define IWL_FW_DBG_CONFIG_TOKEN 0x00011301
540+#define IWL_FW_DBG_CONFIG_TOKEN 0x00010001
541541
542542 /**
543543 * struct iwl_fw_dbg_config_cmd - configure FW debug
drivers/net/wireless/intel/iwlwifi/fw/dbg.c+1−2
@@ -1,6 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
22 /*
3− * Copyright (C) 2005-2014, 2018-2023 Intel Corporation
3+ * Copyright (C) 2005-2014, 2018-2024 Intel Corporation
44 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
55 * Copyright (C) 2015-2017 Intel Deutschland GmbH
66 */
@@ -19,7 +19,6 @@ · 12 unmodified lines
1919 * @fwrt_ptr: pointer to the buffer coming from fwrt
2020 * @trans_ptr: pointer to struct %iwl_trans_dump_data which contains the
2121 * transport's data.
22− * @trans_len: length of the valid data in trans_ptr
2322 * @fwrt_len: length of the valid data in fwrt_ptr
2423 */
2524 struct iwl_fw_dump_ptrs {
drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c+2−2
@@ -1,6 +1,6 @@
11 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
22 /*
3− * Copyright (C) 2018-2023 Intel Corporation
3+ * Copyright (C) 2018-2024 Intel Corporation
44 */
55 #include <linux/firmware.h>
66 #include "iwl-drv.h"
@@ -1096,7 +1096,7 @@ static int iwl_dbg_tlv_override_trig_node(struct iwl_fw_runtime *fwrt, · 1089 unmodified lines
10961096 node_trig = (void *)node_tlv->data;
10971097 }
10981098
1099− memcpy(node_trig->data + offset, trig->data, trig_data_len);
1099+ memcpy((u8 *)node_trig->data + offset, trig->data, trig_data_len);
11001100 node_tlv->length = cpu_to_le32(size);
11011101
11021102 if (policy & IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG) {
drivers/net/wireless/intel/iwlwifi/iwl-drv.c+1−0
@@ -128,6 +128,7 @@ static void iwl_dealloc_ucode(struct iwl_drv *drv) · 127 unmodified lines
128128 kfree(drv->fw.ucode_capa.cmd_versions);
129129 kfree(drv->fw.phy_integration_ver);
130130 kfree(drv->trans->dbg.pc_data);
131+ drv->trans->dbg.pc_data = NULL;
131132
132133 for (i = 0; i < IWL_UCODE_TYPE_MAX; i++)
133134 iwl_free_fw_img(drv, drv->fw.img + i);
drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c+1−4
@@ -668,7 +668,6 @@ static const struct ieee80211_sband_iftype_data iwl_he_eht_capa[] = { · 667 unmodified lines
668668 .has_eht = true,
669669 .eht_cap_elem = {
670670 .mac_cap_info[0] =
671− IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
672671 IEEE80211_EHT_MAC_CAP0_OM_CONTROL |
673672 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
674673 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2 |
@@ -793,7 +792,6 @@ static const struct ieee80211_sband_iftype_data iwl_he_eht_capa[] = { · 118 unmodified lines
793792 .has_eht = true,
794793 .eht_cap_elem = {
795794 .mac_cap_info[0] =
796− IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
797795 IEEE80211_EHT_MAC_CAP0_OM_CONTROL |
798796 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
799797 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2,
@@ -1020,8 +1018,7 @@ iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans, · 220 unmodified lines
10201018 if (CSR_HW_REV_TYPE(trans->hw_rev) == IWL_CFG_MAC_TYPE_GL &&
10211019 iftype_data->eht_cap.has_eht) {
10221020 iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] &=
1023− ~(IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
1024− IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
1021+ ~(IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
10251022 IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2);
10261023 iftype_data->eht_cap.eht_cap_elem.phy_cap_info[3] &=
10271024 ~(IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO |
drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c+4−2
@@ -1600,7 +1600,8 @@ static int iwl_mvm_mac_add_interface(struct ieee80211_hw *hw, · 1599 unmodified lines
16001600 */
16011601 if (vif->type == NL80211_IFTYPE_AP ||
16021602 vif->type == NL80211_IFTYPE_ADHOC) {
1603− iwl_mvm_vif_dbgfs_add_link(mvm, vif);
1603+ if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1604+ iwl_mvm_vif_dbgfs_add_link(mvm, vif);
16041605 ret = 0;
16051606 goto out;
16061607 }
@@ -1640,7 +1641,8 @@ static int iwl_mvm_mac_add_interface(struct ieee80211_hw *hw, · 33 unmodified lines
16401641 iwl_mvm_chandef_get_primary_80(&vif->bss_conf.chandef);
16411642 }
16421643
1643− iwl_mvm_vif_dbgfs_add_link(mvm, vif);
1644+ if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1645+ iwl_mvm_vif_dbgfs_add_link(mvm, vif);
16441646
16451647 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status) &&
16461648 vif->type == NL80211_IFTYPE_STATION && !vif->p2p &&
drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c+5−4
@@ -81,7 +81,8 @@ static int iwl_mvm_mld_mac_add_interface(struct ieee80211_hw *hw, · 80 unmodified lines
8181 ieee80211_hw_set(mvm->hw, RX_INCLUDES_FCS);
8282 }
8383
84− iwl_mvm_vif_dbgfs_add_link(mvm, vif);
84+ if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
85+ iwl_mvm_vif_dbgfs_add_link(mvm, vif);
8586
8687 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status) &&
8788 vif->type == NL80211_IFTYPE_STATION && !vif->p2p &&
@@ -437,6 +438,9 @@ __iwl_mvm_mld_unassign_vif_chanctx(struct iwl_mvm *mvm, · 349 unmodified lines
437438 mvmvif->ap_ibss_active = false;
438439 }
439440
441+ iwl_mvm_link_changed(mvm, vif, link_conf,
442+ LINK_CONTEXT_MODIFY_ACTIVE, false);
443+
440444 if (iwl_mvm_is_esr_supported(mvm->fwrt.trans) && n_active > 1) {
441445 int ret = iwl_mvm_esr_mode_inactive(mvm, vif);
442446
@@ -448,9 +452,6 @@ __iwl_mvm_mld_unassign_vif_chanctx(struct iwl_mvm *mvm, · 5 unmodified lines
448452 if (vif->type == NL80211_IFTYPE_MONITOR)
449453 iwl_mvm_mld_rm_snif_sta(mvm, vif);
450454
451− iwl_mvm_link_changed(mvm, vif, link_conf,
452− LINK_CONTEXT_MODIFY_ACTIVE, false);
453−
454455 if (switching_chanctx)
455456 return;
456457 mvmvif->link[link_id]->phy_ctxt = NULL;
drivers/net/wireless/intersil/p54/fwio.c+1−1
@@ -125,7 +125,7 @@ int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw) · 124 unmodified lines
125125 "FW rev %s - Softmac protocol %x.%x\n",
126126 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
127127 snprintf(dev->wiphy->fw_version, sizeof(dev->wiphy->fw_version),
128− "%s - %x.%x", fw_version,
128+ "%.19s - %x.%x", fw_version,
129129 priv->fw_var >> 8, priv->fw_var & 0xff);
130130 }
131131
drivers/net/wireless/intersil/p54/p54spi.c+1−0
@@ -700,6 +700,7 @@ static struct spi_driver p54spi_driver = { · 699 unmodified lines
700700
701701 module_spi_driver(p54spi_driver);
702702
703+MODULE_DESCRIPTION("Prism54 SPI wireless driver");
703704 MODULE_LICENSE("GPL");
704705 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
705706 MODULE_ALIAS("spi:cx3110x");
drivers/net/wireless/mediatek/mt76/mt7603/main.c+1−0
@@ -728,6 +728,7 @@ const struct ieee80211_ops mt7603_ops = { · 727 unmodified lines
728728 .set_sar_specs = mt7603_set_sar_specs,
729729 };
730730
731+MODULE_DESCRIPTION("MediaTek MT7603E and MT76x8 wireless driver");
731732 MODULE_LICENSE("Dual BSD/GPL");
732733
733734 static int __init mt7603_init(void)
drivers/net/wireless/mediatek/mt76/mt7615/main.c+1−0
@@ -1375,4 +1375,5 @@ const struct ieee80211_ops mt7615_ops = { · 1374 unmodified lines
13751375 };
13761376 EXPORT_SYMBOL_GPL(mt7615_ops);
13771377
1378+MODULE_DESCRIPTION("MediaTek MT7615E and MT7663E wireless driver");
13781379 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7615/mmio.c+1−0
@@ -270,4 +270,5 @@ static void __exit mt7615_exit(void) · 269 unmodified lines
270270
271271 module_init(mt7615_init);
272272 module_exit(mt7615_exit);
273+MODULE_DESCRIPTION("MediaTek MT7615E MMIO helpers");
273274 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7615/sdio.c+1−0
@@ -253,4 +253,5 @@ module_sdio_driver(mt7663s_driver); · 252 unmodified lines
253253
254254 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
255255 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
256+MODULE_DESCRIPTION("MediaTek MT7663S (SDIO) wireless driver");
256257 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7615/usb.c+1−0
@@ -281,4 +281,5 @@ module_usb_driver(mt7663u_driver); · 280 unmodified lines
281281
282282 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
283283 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
284+MODULE_DESCRIPTION("MediaTek MT7663U (USB) wireless driver");
284285 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c+1−0
@@ -349,4 +349,5 @@ EXPORT_SYMBOL_GPL(mt7663_usb_sdio_register_device); · 348 unmodified lines
349349
350350 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
351351 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
352+MODULE_DESCRIPTION("MediaTek MT7663 SDIO/USB helpers");
352353 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c+1−0
@@ -3160,4 +3160,5 @@ exit: · 3159 unmodified lines
31603160 EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message);
31613161
31623162 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
3163+MODULE_DESCRIPTION("MediaTek MT76x connac layer helpers");
31633164 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c+1−0
@@ -342,4 +342,5 @@ int mt76x0_eeprom_init(struct mt76x02_dev *dev) · 341 unmodified lines
342342 return 0;
343343 }
344344
345+MODULE_DESCRIPTION("MediaTek MT76x EEPROM helpers");
345346 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt76x0/pci.c+1−0
@@ -302,6 +302,7 @@ static const struct pci_device_id mt76x0e_device_table[] = { · 301 unmodified lines
302302 MODULE_DEVICE_TABLE(pci, mt76x0e_device_table);
303303 MODULE_FIRMWARE(MT7610E_FIRMWARE);
304304 MODULE_FIRMWARE(MT7650E_FIRMWARE);
305+MODULE_DESCRIPTION("MediaTek MT76x0E (PCIe) wireless driver");
305306 MODULE_LICENSE("Dual BSD/GPL");
306307
307308 static struct pci_driver mt76x0e_driver = {
drivers/net/wireless/mediatek/mt76/mt76x0/usb.c+1−0
@@ -336,6 +336,7 @@ err: · 335 unmodified lines
336336 MODULE_DEVICE_TABLE(usb, mt76x0_device_table);
337337 MODULE_FIRMWARE(MT7610E_FIRMWARE);
338338 MODULE_FIRMWARE(MT7610U_FIRMWARE);
339+MODULE_DESCRIPTION("MediaTek MT76x0U (USB) wireless driver");
339340 MODULE_LICENSE("GPL");
340341
341342 static struct usb_driver mt76x0_driver = {
drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c+1−0
@@ -293,4 +293,5 @@ void mt76x02u_init_mcu(struct mt76_dev *dev) · 292 unmodified lines
293293 EXPORT_SYMBOL_GPL(mt76x02u_init_mcu);
294294
295295 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
296+MODULE_DESCRIPTION("MediaTek MT76x02 MCU helpers");
296297 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt76x02_util.c+1−0
@@ -696,4 +696,5 @@ void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev) · 695 unmodified lines
696696 }
697697 EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);
698698
699+MODULE_DESCRIPTION("MediaTek MT76x02 helpers");
699700 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c+1−0
@@ -506,4 +506,5 @@ int mt76x2_eeprom_init(struct mt76x02_dev *dev) · 505 unmodified lines
506506 }
507507 EXPORT_SYMBOL_GPL(mt76x2_eeprom_init);
508508
509+MODULE_DESCRIPTION("MediaTek MT76x2 EEPROM helpers");
509510 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt76x2/pci.c+1−0
@@ -165,6 +165,7 @@ mt76x2e_resume(struct pci_dev *pdev) · 164 unmodified lines
165165 MODULE_DEVICE_TABLE(pci, mt76x2e_device_table);
166166 MODULE_FIRMWARE(MT7662_FIRMWARE);
167167 MODULE_FIRMWARE(MT7662_ROM_PATCH);
168+MODULE_DESCRIPTION("MediaTek MT76x2E (PCIe) wireless driver");
168169 MODULE_LICENSE("Dual BSD/GPL");
169170
170171 static struct pci_driver mt76pci_driver = {
drivers/net/wireless/mediatek/mt76/mt76x2/usb.c+1−0
@@ -147,4 +147,5 @@ static struct usb_driver mt76x2u_driver = { · 146 unmodified lines
147147 module_usb_driver(mt76x2u_driver);
148148
149149 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
150+MODULE_DESCRIPTION("MediaTek MT76x2U (USB) wireless driver");
150151 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7915/mmio.c+1−0
@@ -958,4 +958,5 @@ static void __exit mt7915_exit(void) · 957 unmodified lines
958958
959959 module_init(mt7915_init);
960960 module_exit(mt7915_exit);
961+MODULE_DESCRIPTION("MediaTek MT7915E MMIO helpers");
961962 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7921/main.c+1−0
@@ -1418,5 +1418,6 @@ const struct ieee80211_ops mt7921_ops = { · 1417 unmodified lines
14181418 };
14191419 EXPORT_SYMBOL_GPL(mt7921_ops);
14201420
1421+MODULE_DESCRIPTION("MediaTek MT7921 core driver");
14211422 MODULE_LICENSE("Dual BSD/GPL");
14221423 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
drivers/net/wireless/mediatek/mt76/mt7921/pci.c+1−0
@@ -544,4 +544,5 @@ MODULE_FIRMWARE(MT7922_FIRMWARE_WM); · 543 unmodified lines
544544 MODULE_FIRMWARE(MT7922_ROM_PATCH);
545545 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
546546 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
547+MODULE_DESCRIPTION("MediaTek MT7921E (PCIe) wireless driver");
547548 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7921/sdio.c+1−0
@@ -323,5 +323,6 @@ static struct sdio_driver mt7921s_driver = { · 322 unmodified lines
323323 .drv.pm = pm_sleep_ptr(&mt7921s_pm_ops),
324324 };
325325 module_sdio_driver(mt7921s_driver);
326+MODULE_DESCRIPTION("MediaTek MT7921S (SDIO) wireless driver");
326327 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
327328 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7921/usb.c+1−0
@@ -336,5 +336,6 @@ static struct usb_driver mt7921u_driver = { · 335 unmodified lines
336336 };
337337 module_usb_driver(mt7921u_driver);
338338
339+MODULE_DESCRIPTION("MediaTek MT7921U (USB) wireless driver");
339340 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
340341 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7925/main.c+1−0
@@ -1450,4 +1450,5 @@ const struct ieee80211_ops mt7925_ops = { · 1449 unmodified lines
14501450 EXPORT_SYMBOL_GPL(mt7925_ops);
14511451
14521452 MODULE_AUTHOR("Deren Wu <deren.wu@mediatek.com>");
1453+MODULE_DESCRIPTION("MediaTek MT7925 core driver");
14531454 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7925/pci.c+1−0
@@ -583,4 +583,5 @@ MODULE_FIRMWARE(MT7925_FIRMWARE_WM); · 582 unmodified lines
583583 MODULE_FIRMWARE(MT7925_ROM_PATCH);
584584 MODULE_AUTHOR("Deren Wu <deren.wu@mediatek.com>");
585585 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
586+MODULE_DESCRIPTION("MediaTek MT7925E (PCIe) wireless driver");
586587 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt7925/usb.c+1−0
@@ -329,4 +329,5 @@ static struct usb_driver mt7925u_driver = { · 328 unmodified lines
329329 module_usb_driver(mt7925u_driver);
330330
331331 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
332+MODULE_DESCRIPTION("MediaTek MT7925U (USB) wireless driver");
332333 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/mt792x_core.c+1−0
@@ -862,5 +862,6 @@ int mt792x_load_firmware(struct mt792x_dev *dev) · 861 unmodified lines
862862 }
863863 EXPORT_SYMBOL_GPL(mt792x_load_firmware);
864864
865+MODULE_DESCRIPTION("MediaTek MT792x core driver");
865866 MODULE_LICENSE("Dual BSD/GPL");
866867 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
drivers/net/wireless/mediatek/mt76/mt792x_usb.c+1−0
@@ -314,5 +314,6 @@ void mt792xu_disconnect(struct usb_interface *usb_intf) · 313 unmodified lines
314314 }
315315 EXPORT_SYMBOL_GPL(mt792xu_disconnect);
316316
317+MODULE_DESCRIPTION("MediaTek MT792x USB helpers");
317318 MODULE_LICENSE("Dual BSD/GPL");
318319 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
drivers/net/wireless/mediatek/mt76/mt7996/mcu.c+2−1
@@ -4477,7 +4477,8 @@ int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy) · 4476 unmodified lines
44774477
44784478 skb_put_data(skb, &req, sizeof(req));
44794479 /* cck and ofdm */
4480− skb_put_data(skb, &la.cck, sizeof(la.cck) + sizeof(la.ofdm));
4480+ skb_put_data(skb, &la.cck, sizeof(la.cck));
4481+ skb_put_data(skb, &la.ofdm, sizeof(la.ofdm));
44814482 /* ht20 */
44824483 skb_put_data(skb, &la.mcs[0], 8);
44834484 /* ht40 */
drivers/net/wireless/mediatek/mt76/mt7996/mmio.c+1−0
@@ -650,4 +650,5 @@ static void __exit mt7996_exit(void) · 649 unmodified lines
650650
651651 module_init(mt7996_init);
652652 module_exit(mt7996_exit);
653+MODULE_DESCRIPTION("MediaTek MT7996 MMIO helpers");
653654 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/sdio.c+1−0
@@ -672,4 +672,5 @@ EXPORT_SYMBOL_GPL(mt76s_init); · 671 unmodified lines
672672
673673 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
674674 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
675+MODULE_DESCRIPTION("MediaTek MT76x SDIO helpers");
675676 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/usb.c+1−0
@@ -1128,4 +1128,5 @@ int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf) · 1127 unmodified lines
11281128 EXPORT_SYMBOL_GPL(mt76u_init);
11291129
11301130 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
1131+MODULE_DESCRIPTION("MediaTek MT76x USB helpers");
11311132 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/mediatek/mt76/util.c+1−0
@@ -138,4 +138,5 @@ int __mt76_worker_fn(void *ptr) · 137 unmodified lines
138138 }
139139 EXPORT_SYMBOL_GPL(__mt76_worker_fn);
140140
141+MODULE_DESCRIPTION("MediaTek MT76x helpers");
141142 MODULE_LICENSE("Dual BSD/GPL");
drivers/net/wireless/microchip/wilc1000/netdev.c+1−0
@@ -1018,5 +1018,6 @@ unregister_netdev: · 1017 unmodified lines
10181018 return ERR_PTR(ret);
10191019 }
10201020
1021+MODULE_DESCRIPTION("Atmel WILC1000 core wireless driver");
10211022 MODULE_LICENSE("GPL");
10221023 MODULE_FIRMWARE(WILC1000_FW(WILC1000_API_VER));
drivers/net/wireless/microchip/wilc1000/sdio.c+1−0
@@ -984,4 +984,5 @@ static struct sdio_driver wilc_sdio_driver = { · 983 unmodified lines
984984 module_driver(wilc_sdio_driver,
985985 sdio_register_driver,
986986 sdio_unregister_driver);
987+MODULE_DESCRIPTION("Atmel WILC1000 SDIO wireless driver");
987988 MODULE_LICENSE("GPL");
drivers/net/wireless/microchip/wilc1000/spi.c+1−0
@@ -273,6 +273,7 @@ static struct spi_driver wilc_spi_driver = { · 272 unmodified lines
273273 .remove = wilc_bus_remove,
274274 };
275275 module_spi_driver(wilc_spi_driver);
276+MODULE_DESCRIPTION("Atmel WILC1000 SPI wireless driver");
276277 MODULE_LICENSE("GPL");
277278
278279 static int wilc_spi_tx(struct wilc *wilc, u8 *b, u32 len)
drivers/net/wireless/ti/wl1251/sdio.c+1−0
@@ -343,5 +343,6 @@ static void __exit wl1251_sdio_exit(void) · 342 unmodified lines
343343 module_init(wl1251_sdio_init);
344344 module_exit(wl1251_sdio_exit);
345345
346+MODULE_DESCRIPTION("TI WL1251 SDIO helpers");
346347 MODULE_LICENSE("GPL");
347348 MODULE_AUTHOR("Kalle Valo <kvalo@adurom.com>");
drivers/net/wireless/ti/wl1251/spi.c+1−0
@@ -342,6 +342,7 @@ static struct spi_driver wl1251_spi_driver = { · 341 unmodified lines
342342
343343 module_spi_driver(wl1251_spi_driver);
344344
345+MODULE_DESCRIPTION("TI WL1251 SPI helpers");
345346 MODULE_LICENSE("GPL");
346347 MODULE_AUTHOR("Kalle Valo <kvalo@adurom.com>");
347348 MODULE_ALIAS("spi:wl1251");
drivers/net/wireless/ti/wl12xx/main.c+1−0
@@ -1955,6 +1955,7 @@ module_param_named(tcxo, tcxo_param, charp, 0); · 1954 unmodified lines
19551955 MODULE_PARM_DESC(tcxo,
19561956 "TCXO clock: 19.2, 26, 38.4, 52, 16.368, 32.736, 16.8, 33.6");
19571957
1958+MODULE_DESCRIPTION("TI WL12xx wireless driver");
19581959 MODULE_LICENSE("GPL v2");
19591960 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
19601961 MODULE_FIRMWARE(WL127X_FW_NAME_SINGLE);
drivers/net/wireless/ti/wl18xx/main.c+1−0
@@ -2086,6 +2086,7 @@ module_param_named(num_rx_desc, num_rx_desc_param, int, 0400); · 2085 unmodified lines
20862086 MODULE_PARM_DESC(num_rx_desc_param,
20872087 "Number of Rx descriptors: u8 (default is 32)");
20882088
2089+MODULE_DESCRIPTION("TI WiLink 8 wireless driver");
20892090 MODULE_LICENSE("GPL v2");
20902091 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
20912092 MODULE_FIRMWARE(WL18XX_FW_NAME);
drivers/net/wireless/ti/wlcore/main.c+1−0
@@ -6793,6 +6793,7 @@ MODULE_PARM_DESC(bug_on_recovery, "BUG() on fw recovery"); · 6792 unmodified lines
67936793 module_param(no_recovery, int, 0600);
67946794 MODULE_PARM_DESC(no_recovery, "Prevent HW recovery. FW will remain stuck.");
67956795
6796+MODULE_DESCRIPTION("TI WLAN core driver");
67966797 MODULE_LICENSE("GPL");
67976798 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
67986799 MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
drivers/net/wireless/ti/wlcore/sdio.c+1−0
@@ -447,6 +447,7 @@ module_sdio_driver(wl1271_sdio_driver); · 446 unmodified lines
447447 module_param(dump, bool, 0600);
448448 MODULE_PARM_DESC(dump, "Enable sdio read/write dumps.");
449449
450+MODULE_DESCRIPTION("TI WLAN SDIO helpers");
450451 MODULE_LICENSE("GPL");
451452 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
452453 MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
drivers/net/wireless/ti/wlcore/spi.c+1−0
@@ -562,6 +562,7 @@ static struct spi_driver wl1271_spi_driver = { · 561 unmodified lines
562562 };
563563
564564 module_spi_driver(wl1271_spi_driver);
565+MODULE_DESCRIPTION("TI WLAN SPI helpers");
565566 MODULE_LICENSE("GPL");
566567 MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
567568 MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
drivers/net/xen-netback/netback.c+67−39
@@ -104,13 +104,12 @@ bool provides_xdp_headroom = true; · 103 unmodified lines
104104 module_param(provides_xdp_headroom, bool, 0644);
105105
106106 static void xenvif_idx_release(struct xenvif_queue *queue, u16 pending_idx,
107− u8 status);
107+ s8 status);
108108
109109 static void make_tx_response(struct xenvif_queue *queue,
110− struct xen_netif_tx_request *txp,
110+ const struct xen_netif_tx_request *txp,
111111 unsigned int extra_count,
112− s8 st);
113−static void push_tx_responses(struct xenvif_queue *queue);
112+ s8 status);
114113
115114 static void xenvif_idx_unmap(struct xenvif_queue *queue, u16 pending_idx);
116115
@@ -208,13 +207,9 @@ static void xenvif_tx_err(struct xenvif_queue *queue, · 91 unmodified lines
208207 unsigned int extra_count, RING_IDX end)
209208 {
210209 RING_IDX cons = queue->tx.req_cons;
211− unsigned long flags;
212210
213211 do {
214− spin_lock_irqsave(&queue->response_lock, flags);
215212 make_tx_response(queue, txp, extra_count, XEN_NETIF_RSP_ERROR);
216− push_tx_responses(queue);
217− spin_unlock_irqrestore(&queue->response_lock, flags);
218213 if (cons == end)
219214 break;
220215 RING_COPY_REQUEST(&queue->tx, cons++, txp);
@@ -463,12 +458,20 @@ static void xenvif_get_requests(struct xenvif_queue *queue, · 242 unmodified lines
463458 }
464459
465460 for (shinfo->nr_frags = 0; nr_slots > 0 && shinfo->nr_frags < MAX_SKB_FRAGS;
466− shinfo->nr_frags++, gop++, nr_slots--) {
461+ nr_slots--) {
462+ if (unlikely(!txp->size)) {
463+ make_tx_response(queue, txp, 0, XEN_NETIF_RSP_OKAY);
464+ ++txp;
465+ continue;
466+ }
467+
467468 index = pending_index(queue->pending_cons++);
468469 pending_idx = queue->pending_ring[index];
469470 xenvif_tx_create_map_op(queue, pending_idx, txp,
470471 txp == first ? extra_count : 0, gop);
471472 frag_set_pending_idx(&frags[shinfo->nr_frags], pending_idx);
473+ ++shinfo->nr_frags;
474+ ++gop;
472475
473476 if (txp == first)
474477 txp = txfrags;
@@ -481,20 +484,33 @@ static void xenvif_get_requests(struct xenvif_queue *queue, · 6 unmodified lines
481484 shinfo = skb_shinfo(nskb);
482485 frags = shinfo->frags;
483486
484− for (shinfo->nr_frags = 0; shinfo->nr_frags < nr_slots;
485− shinfo->nr_frags++, txp++, gop++) {
487+ for (shinfo->nr_frags = 0; shinfo->nr_frags < nr_slots; ++txp) {
488+ if (unlikely(!txp->size)) {
489+ make_tx_response(queue, txp, 0,
490+ XEN_NETIF_RSP_OKAY);
491+ continue;
492+ }
493+
486494 index = pending_index(queue->pending_cons++);
487495 pending_idx = queue->pending_ring[index];
488496 xenvif_tx_create_map_op(queue, pending_idx, txp, 0,
489497 gop);
490498 frag_set_pending_idx(&frags[shinfo->nr_frags],
491499 pending_idx);
500+ ++shinfo->nr_frags;
501+ ++gop;
502+ }
503+
504+ if (shinfo->nr_frags) {
505+ skb_shinfo(skb)->frag_list = nskb;
506+ nskb = NULL;
492507 }
508+ }
493509
494− skb_shinfo(skb)->frag_list = nskb;
495− } else if (nskb) {
510+ if (nskb) {
496511 /* A frag_list skb was allocated but it is no longer needed
497− * because enough slots were converted to copy ops above.
512+ * because enough slots were converted to copy ops above or some
513+ * were empty.
498514 */
499515 kfree_skb(nskb);
500516 }
@@ -963,7 +979,6 @@ static void xenvif_tx_build_gops(struct xenvif_queue *queue, · 462 unmodified lines
963979 (ret == 0) ?
964980 XEN_NETIF_RSP_OKAY :
965981 XEN_NETIF_RSP_ERROR);
966− push_tx_responses(queue);
967982 continue;
968983 }
969984
@@ -975,7 +990,6 @@ static void xenvif_tx_build_gops(struct xenvif_queue *queue, · 5 unmodified lines
975990
976991 make_tx_response(queue, &txreq, extra_count,
977992 XEN_NETIF_RSP_OKAY);
978− push_tx_responses(queue);
979993 continue;
980994 }
981995
@@ -1401,8 +1415,35 @@ int xenvif_tx_action(struct xenvif_queue *queue, int budget) · 419 unmodified lines
14011415 return work_done;
14021416 }
14031417
1418+static void _make_tx_response(struct xenvif_queue *queue,
1419+ const struct xen_netif_tx_request *txp,
1420+ unsigned int extra_count,
1421+ s8 status)
1422+{
1423+ RING_IDX i = queue->tx.rsp_prod_pvt;
1424+ struct xen_netif_tx_response *resp;
1425+
1426+ resp = RING_GET_RESPONSE(&queue->tx, i);
1427+ resp->id = txp->id;
1428+ resp->status = status;
1429+
1430+ while (extra_count-- != 0)
1431+ RING_GET_RESPONSE(&queue->tx, ++i)->status = XEN_NETIF_RSP_NULL;
1432+
1433+ queue->tx.rsp_prod_pvt = ++i;
1434+}
1435+
1436+static void push_tx_responses(struct xenvif_queue *queue)
1437+{
1438+ int notify;
1439+
1440+ RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(&queue->tx, notify);
1441+ if (notify)
1442+ notify_remote_via_irq(queue->tx_irq);
1443+}
1444+
14041445 static void xenvif_idx_release(struct xenvif_queue *queue, u16 pending_idx,
1405− u8 status)
1446+ s8 status)
14061447 {
14071448 struct pending_tx_info *pending_tx_info;
14081449 pending_ring_idx_t index;
@@ -1412,8 +1453,8 @@ static void xenvif_idx_release(struct xenvif_queue *queue, u16 pending_idx, · 3 unmodified lines
14121453
14131454 spin_lock_irqsave(&queue->response_lock, flags);
14141455
1415− make_tx_response(queue, &pending_tx_info->req,
1416− pending_tx_info->extra_count, status);
1456+ _make_tx_response(queue, &pending_tx_info->req,
1457+ pending_tx_info->extra_count, status);
14171458
14181459 /* Release the pending index before pusing the Tx response so
14191460 * its available before a new Tx request is pushed by the
@@ -1427,32 +1468,19 @@ static void xenvif_idx_release(struct xenvif_queue *queue, u16 pending_idx, · 7 unmodified lines
14271468 spin_unlock_irqrestore(&queue->response_lock, flags);
14281469 }
14291470
1430−
14311471 static void make_tx_response(struct xenvif_queue *queue,
1432− struct xen_netif_tx_request *txp,
1472+ const struct xen_netif_tx_request *txp,
14331473 unsigned int extra_count,
1434− s8 st)
1474+ s8 status)
14351475 {
1436− RING_IDX i = queue->tx.rsp_prod_pvt;
1437− struct xen_netif_tx_response *resp;
1438−
1439− resp = RING_GET_RESPONSE(&queue->tx, i);
1440− resp->id = txp->id;
1441− resp->status = st;
1442−
1443− while (extra_count-- != 0)
1444− RING_GET_RESPONSE(&queue->tx, ++i)->status = XEN_NETIF_RSP_NULL;
1476+ unsigned long flags;
14451477
1446− queue->tx.rsp_prod_pvt = ++i;
1447−}
1478+ spin_lock_irqsave(&queue->response_lock, flags);
14481479
1449−static void push_tx_responses(struct xenvif_queue *queue)
1450−{
1451− int notify;
1480+ _make_tx_response(queue, txp, extra_count, status);
1481+ push_tx_responses(queue);
14521482
1453− RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(&queue->tx, notify);
1454− if (notify)
1455− notify_remote_via_irq(queue->tx_irq);
1483+ spin_unlock_irqrestore(&queue->response_lock, flags);
14561484 }
14571485
14581486 static void xenvif_idx_unmap(struct xenvif_queue *queue, u16 pending_idx)
drivers/nvme/common/auth.c+1−0
@@ -471,4 +471,5 @@ int nvme_auth_generate_key(u8 *secret, struct nvme_dhchap_key **ret_key) · 470 unmodified lines
471471 }
472472 EXPORT_SYMBOL_GPL(nvme_auth_generate_key);
473473
474+MODULE_DESCRIPTION("NVMe Authentication framework");
474475 MODULE_LICENSE("GPL v2");
drivers/nvme/common/keyring.c+1−0
@@ -181,5 +181,6 @@ static void __exit nvme_keyring_exit(void) · 180 unmodified lines
181181
182182 MODULE_LICENSE("GPL v2");
183183 MODULE_AUTHOR("Hannes Reinecke <hare@suse.de>");
184+MODULE_DESCRIPTION("NVMe Keyring implementation");
184185 module_init(nvme_keyring_init);
185186 module_exit(nvme_keyring_exit);
drivers/nvme/host/apple.c+7−6
@@ -797,6 +797,7 @@ static int apple_nvme_init_request(struct blk_mq_tag_set *set, · 796 unmodified lines
797797
798798 static void apple_nvme_disable(struct apple_nvme *anv, bool shutdown)
799799 {
800+ enum nvme_ctrl_state state = nvme_ctrl_state(&anv->ctrl);
800801 u32 csts = readl(anv->mmio_nvme + NVME_REG_CSTS);
801802 bool dead = false, freeze = false;
802803 unsigned long flags;
@@ -808,8 +809,8 @@ static void apple_nvme_disable(struct apple_nvme *anv, bool shutdown) · 5 unmodified lines
808809 if (csts & NVME_CSTS_CFS)
809810 dead = true;
810811
811− if (anv->ctrl.state == NVME_CTRL_LIVE ||
812− anv->ctrl.state == NVME_CTRL_RESETTING) {
812+ if (state == NVME_CTRL_LIVE ||
813+ state == NVME_CTRL_RESETTING) {
813814 freeze = true;
814815 nvme_start_freeze(&anv->ctrl);
815816 }
@@ -881,7 +882,7 @@ static enum blk_eh_timer_return apple_nvme_timeout(struct request *req) · 65 unmodified lines
881882 unsigned long flags;
882883 u32 csts = readl(anv->mmio_nvme + NVME_REG_CSTS);
883884
884− if (anv->ctrl.state != NVME_CTRL_LIVE) {
885+ if (nvme_ctrl_state(&anv->ctrl) != NVME_CTRL_LIVE) {
885886 /*
886887 * From rdma.c:
887888 * If we are resetting, connecting or deleting we should
@@ -985,10 +986,10 @@ static void apple_nvme_reset_work(struct work_struct *work) · 97 unmodified lines
985986 u32 boot_status, aqa;
986987 struct apple_nvme *anv =
987988 container_of(work, struct apple_nvme, ctrl.reset_work);
989+ enum nvme_ctrl_state state = nvme_ctrl_state(&anv->ctrl);
988990
989− if (anv->ctrl.state != NVME_CTRL_RESETTING) {
990− dev_warn(anv->dev, "ctrl state %d is not RESETTING\n",
991− anv->ctrl.state);
991+ if (state != NVME_CTRL_RESETTING) {
992+ dev_warn(anv->dev, "ctrl state %d is not RESETTING\n", state);
992993 ret = -ENODEV;
993994 goto out;
994995 }
drivers/nvme/host/auth.c+9−10
@@ -48,11 +48,6 @@ struct nvme_dhchap_queue_context { · 47 unmodified lines
4848
4949 static struct workqueue_struct *nvme_auth_wq;
5050
51−#define nvme_auth_flags_from_qid(qid) \
52− (qid == 0) ? 0 : BLK_MQ_REQ_NOWAIT | BLK_MQ_REQ_RESERVED
53−#define nvme_auth_queue_from_qid(ctrl, qid) \
54− (qid == 0) ? (ctrl)->fabrics_q : (ctrl)->connect_q
55−
5651 static inline int ctrl_max_dhchaps(struct nvme_ctrl *ctrl)
5752 {
5853 return ctrl->opts->nr_io_queues + ctrl->opts->nr_write_queues +
@@ -63,10 +58,15 @@ static int nvme_auth_submit(struct nvme_ctrl *ctrl, int qid, · 4 unmodified lines
6358 void *data, size_t data_len, bool auth_send)
6459 {
6560 struct nvme_command cmd = {};
66− blk_mq_req_flags_t flags = nvme_auth_flags_from_qid(qid);
67− struct request_queue *q = nvme_auth_queue_from_qid(ctrl, qid);
61+ nvme_submit_flags_t flags = NVME_SUBMIT_RETRY;
62+ struct request_queue *q = ctrl->fabrics_q;
6863 int ret;
6964
65+ if (qid != 0) {
66+ flags |= NVME_SUBMIT_NOWAIT | NVME_SUBMIT_RESERVED;
67+ q = ctrl->connect_q;
68+ }
69+
7070 cmd.auth_common.opcode = nvme_fabrics_command;
7171 cmd.auth_common.secp = NVME_AUTH_DHCHAP_PROTOCOL_IDENTIFIER;
7272 cmd.auth_common.spsp0 = 0x01;
@@ -80,8 +80,7 @@ static int nvme_auth_submit(struct nvme_ctrl *ctrl, int qid, · 7 unmodified lines
8080 }
8181
8282 ret = __nvme_submit_sync_cmd(q, &cmd, NULL, data, data_len,
83− qid == 0 ? NVME_QID_ANY : qid,
84− 0, flags);
83+ qid == 0 ? NVME_QID_ANY : qid, flags);
8584 if (ret > 0)
8685 dev_warn(ctrl->device,
8786 "qid %d auth_send failed with status %d\n", qid, ret);
@@ -897,7 +896,7 @@ static void nvme_ctrl_auth_work(struct work_struct *work) · 809 unmodified lines
897896 * If the ctrl is no connected, bail as reconnect will handle
898897 * authentication.
899898 */
900− if (ctrl->state != NVME_CTRL_LIVE)
899+ if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
901900 return;
902901
903902 /* Authenticate admin queue first */
drivers/nvme/host/constants.c+5−5
@@ -171,15 +171,15 @@ static const char * const nvme_statuses[] = { · 170 unmodified lines
171171 [NVME_SC_HOST_ABORTED_CMD] = "Host Aborted Command",
172172 };
173173
174−const unsigned char *nvme_get_error_status_str(u16 status)
174+const char *nvme_get_error_status_str(u16 status)
175175 {
176176 status &= 0x7ff;
177177 if (status < ARRAY_SIZE(nvme_statuses) && nvme_statuses[status])
178− return nvme_statuses[status & 0x7ff];
178+ return nvme_statuses[status];
179179 return "Unknown";
180180 }
181181
182−const unsigned char *nvme_get_opcode_str(u8 opcode)
182+const char *nvme_get_opcode_str(u8 opcode)
183183 {
184184 if (opcode < ARRAY_SIZE(nvme_ops) && nvme_ops[opcode])
185185 return nvme_ops[opcode];
@@ -187,7 +187,7 @@ const unsigned char *nvme_get_opcode_str(u8 opcode) · 1 unmodified line
187187 }
188188 EXPORT_SYMBOL_GPL(nvme_get_opcode_str);
189189
190−const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
190+const char *nvme_get_admin_opcode_str(u8 opcode)
191191 {
192192 if (opcode < ARRAY_SIZE(nvme_admin_ops) && nvme_admin_ops[opcode])
193193 return nvme_admin_ops[opcode];
@@ -195,7 +195,7 @@ const unsigned char *nvme_get_admin_opcode_str(u8 opcode) · 1 unmodified line
195195 }
196196 EXPORT_SYMBOL_GPL(nvme_get_admin_opcode_str);
197197
198−const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) {
198+const char *nvme_get_fabrics_opcode_str(u8 opcode) {
199199 if (opcode < ARRAY_SIZE(nvme_fabrics_ops) && nvme_fabrics_ops[opcode])
200200 return nvme_fabrics_ops[opcode];
201201 return "Unknown";
drivers/nvme/host/core.c+74−17
@@ -338,6 +338,30 @@ static void nvme_log_error(struct request *req) · 337 unmodified lines
338338 nr->status & NVME_SC_DNR ? "DNR " : "");
339339 }
340340
341+static void nvme_log_err_passthru(struct request *req)
342+{
343+ struct nvme_ns *ns = req->q->queuedata;
344+ struct nvme_request *nr = nvme_req(req);
345+
346+ pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
347+ "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
348+ ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
349+ ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
350+ nvme_get_admin_opcode_str(nr->cmd->common.opcode),
351+ nr->cmd->common.opcode,
352+ nvme_get_error_status_str(nr->status),
353+ nr->status >> 8 & 7, /* Status Code Type */
354+ nr->status & 0xff, /* Status Code */
355+ nr->status & NVME_SC_MORE ? "MORE " : "",
356+ nr->status & NVME_SC_DNR ? "DNR " : "",
357+ nr->cmd->common.cdw10,
358+ nr->cmd->common.cdw11,
359+ nr->cmd->common.cdw12,
360+ nr->cmd->common.cdw13,
361+ nr->cmd->common.cdw14,
362+ nr->cmd->common.cdw14);
363+}
364+
341365 enum nvme_disposition {
342366 COMPLETE,
343367 RETRY,
@@ -385,8 +409,12 @@ static inline void nvme_end_req(struct request *req) · 41 unmodified lines
385409 {
386410 blk_status_t status = nvme_error_status(nvme_req(req)->status);
387411
388− if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET)))
389− nvme_log_error(req);
412+ if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
413+ if (blk_rq_is_passthrough(req))
414+ nvme_log_err_passthru(req);
415+ else
416+ nvme_log_error(req);
417+ }
390418 nvme_end_req_zoned(req);
391419 nvme_trace_bio_complete(req);
392420 if (req->cmd_flags & REQ_NVME_MPATH)
@@ -679,10 +707,21 @@ static inline void nvme_clear_nvme_request(struct request *req) · 286 unmodified lines
679707 /* initialize a passthrough request */
680708 void nvme_init_request(struct request *req, struct nvme_command *cmd)
681709 {
682− if (req->q->queuedata)
710+ struct nvme_request *nr = nvme_req(req);
711+ bool logging_enabled;
712+
713+ if (req->q->queuedata) {
714+ struct nvme_ns *ns = req->q->disk->private_data;
715+
716+ logging_enabled = ns->head->passthru_err_log_enabled;
683717 req->timeout = NVME_IO_TIMEOUT;
684− else /* no queuedata implies admin queue */
718+ } else { /* no queuedata implies admin queue */
719+ logging_enabled = nr->ctrl->passthru_err_log_enabled;
685720 req->timeout = NVME_ADMIN_TIMEOUT;
721+ }
722+
723+ if (!logging_enabled)
724+ req->rq_flags |= RQF_QUIET;
686725
687726 /* passthru commands should let the driver set the SGL flags */
688727 cmd->common.flags &= ~NVME_CMD_SGL_ALL;
@@ -691,8 +730,7 @@ void nvme_init_request(struct request *req, struct nvme_command *cmd) · 2 unmodified lines
691730 if (req->mq_hctx->type == HCTX_TYPE_POLL)
692731 req->cmd_flags |= REQ_POLLED;
693732 nvme_clear_nvme_request(req);
694− req->rq_flags |= RQF_QUIET;
695− memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd));
733+ memcpy(nr->cmd, cmd, sizeof(*cmd));
696734 }
697735 EXPORT_SYMBOL_GPL(nvme_init_request);
698736
@@ -721,7 +759,7 @@ blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, · 22 unmodified lines
721759 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
722760
723761 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
724− bool queue_live)
762+ bool queue_live, enum nvme_ctrl_state state)
725763 {
726764 struct nvme_request *req = nvme_req(rq);
727765
@@ -742,7 +780,7 @@ bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, · 14 unmodified lines
742780 * command, which is require to set the queue live in the
743781 * appropinquate states.
744782 */
745− switch (nvme_ctrl_state(ctrl)) {
783+ switch (state) {
746784 case NVME_CTRL_CONNECTING:
747785 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
748786 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
@@ -1051,20 +1089,27 @@ EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); · 302 unmodified lines
10511089 */
10521090 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
10531091 union nvme_result *result, void *buffer, unsigned bufflen,
1054− int qid, int at_head, blk_mq_req_flags_t flags)
1092+ int qid, nvme_submit_flags_t flags)
10551093 {
10561094 struct request *req;
10571095 int ret;
1096+ blk_mq_req_flags_t blk_flags = 0;
10581097
1098+ if (flags & NVME_SUBMIT_NOWAIT)
1099+ blk_flags |= BLK_MQ_REQ_NOWAIT;
1100+ if (flags & NVME_SUBMIT_RESERVED)
1101+ blk_flags |= BLK_MQ_REQ_RESERVED;
10591102 if (qid == NVME_QID_ANY)
1060− req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags);
1103+ req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
10611104 else
1062− req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags,
1105+ req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
10631106 qid - 1);
10641107
10651108 if (IS_ERR(req))
10661109 return PTR_ERR(req);
10671110 nvme_init_request(req, cmd);
1111+ if (flags & NVME_SUBMIT_RETRY)
1112+ req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
10681113
10691114 if (buffer && bufflen) {
10701115 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
@@ -1072,7 +1117,7 @@ int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, · 1 unmodified line
10721117 goto out;
10731118 }
10741119
1075− ret = nvme_execute_rq(req, at_head);
1120+ ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
10761121 if (result && ret >= 0)
10771122 *result = nvme_req(req)->result;
10781123 out:
@@ -1085,7 +1130,7 @@ int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, · 6 unmodified lines
10851130 void *buffer, unsigned bufflen)
10861131 {
10871132 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1088− NVME_QID_ANY, 0, 0);
1133+ NVME_QID_ANY, 0);
10891134 }
10901135 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
10911136
@@ -1560,7 +1605,7 @@ static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, · 468 unmodified lines
15601605 c.features.dword11 = cpu_to_le32(dword11);
15611606
15621607 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1563− buffer, buflen, NVME_QID_ANY, 0, 0);
1608+ buffer, buflen, NVME_QID_ANY, 0);
15641609 if (ret >= 0 && result)
15651610 *result = le32_to_cpu(res.u32);
15661611 return ret;
@@ -2172,7 +2217,7 @@ static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t l · 605 unmodified lines
21722217 cmd.common.cdw11 = cpu_to_le32(len);
21732218
21742219 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2175− NVME_QID_ANY, 1, 0);
2220+ NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
21762221 }
21772222
21782223 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
@@ -3714,6 +3759,13 @@ static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) · 1535 unmodified lines
37143759 nvme_mpath_add_disk(ns, info->anagrpid);
37153760 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
37163761
3762+ /*
3763+ * Set ns->disk->device->driver_data to ns so we can access
3764+ * ns->head->passthru_err_log_enabled in
3765+ * nvme_io_passthru_err_log_enabled_[store | show]().
3766+ */
3767+ dev_set_drvdata(disk_to_dev(ns->disk), ns);
3768+
37173769 return;
37183770
37193771 out_cleanup_ns_from_list:
@@ -4138,6 +4190,7 @@ static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) · 418 unmodified lines
41384190 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
41394191 {
41404192 struct nvme_fw_slot_info_log *log;
4193+ u8 next_fw_slot, cur_fw_slot;
41414194
41424195 log = kmalloc(sizeof(*log), GFP_KERNEL);
41434196 if (!log)
@@ -4149,13 +4202,15 @@ static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) · 5 unmodified lines
41494202 goto out_free_log;
41504203 }
41514204
4152− if (log->afi & 0x70 || !(log->afi & 0x7)) {
4205+ cur_fw_slot = log->afi & 0x7;
4206+ next_fw_slot = (log->afi & 0x70) >> 4;
4207+ if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) {
41534208 dev_info(ctrl->device,
41544209 "Firmware is activated after next Controller Level Reset\n");
41554210 goto out_free_log;
41564211 }
41574212
4158− memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1],
4213+ memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1],
41594214 sizeof(ctrl->subsys->firmware_rev));
41604215
41614216 out_free_log:
@@ -4514,6 +4569,7 @@ int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, · 352 unmodified lines
45144569 int ret;
45154570
45164571 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4572+ ctrl->passthru_err_log_enabled = false;
45174573 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
45184574 spin_lock_init(&ctrl->lock);
45194575 mutex_init(&ctrl->scan_lock);
@@ -4851,5 +4907,6 @@ static void __exit nvme_core_exit(void) · 331 unmodified lines
48514907
48524908 MODULE_LICENSE("GPL");
48534909 MODULE_VERSION("1.0");
4910+MODULE_DESCRIPTION("NVMe host core framework");
48544911 module_init(nvme_core_init);
48554912 module_exit(nvme_core_exit);
drivers/nvme/host/fabrics.c+12−7
@@ -180,7 +180,7 @@ int nvmf_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) · 179 unmodified lines
180180 cmd.prop_get.offset = cpu_to_le32(off);
181181
182182 ret = __nvme_submit_sync_cmd(ctrl->fabrics_q, &cmd, &res, NULL, 0,
183− NVME_QID_ANY, 0, 0);
183+ NVME_QID_ANY, 0);
184184
185185 if (ret >= 0)
186186 *val = le64_to_cpu(res.u64);
@@ -226,7 +226,7 @@ int nvmf_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) · 39 unmodified lines
226226 cmd.prop_get.offset = cpu_to_le32(off);
227227
228228 ret = __nvme_submit_sync_cmd(ctrl->fabrics_q, &cmd, &res, NULL, 0,
229− NVME_QID_ANY, 0, 0);
229+ NVME_QID_ANY, 0);
230230
231231 if (ret >= 0)
232232 *val = le64_to_cpu(res.u64);
@@ -271,7 +271,7 @@ int nvmf_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) · 38 unmodified lines
271271 cmd.prop_set.value = cpu_to_le64(val);
272272
273273 ret = __nvme_submit_sync_cmd(ctrl->fabrics_q, &cmd, NULL, NULL, 0,
274− NVME_QID_ANY, 0, 0);
274+ NVME_QID_ANY, 0);
275275 if (unlikely(ret))
276276 dev_err(ctrl->device,
277277 "Property Set error: %d, offset %#x\n",
@@ -450,8 +450,10 @@ int nvmf_connect_admin_queue(struct nvme_ctrl *ctrl) · 172 unmodified lines
450450 return -ENOMEM;
451451
452452 ret = __nvme_submit_sync_cmd(ctrl->fabrics_q, &cmd, &res,
453− data, sizeof(*data), NVME_QID_ANY, 1,
454− BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
453+ data, sizeof(*data), NVME_QID_ANY,
454+ NVME_SUBMIT_AT_HEAD |
455+ NVME_SUBMIT_NOWAIT |
456+ NVME_SUBMIT_RESERVED);
455457 if (ret) {
456458 nvmf_log_connect_error(ctrl, ret, le32_to_cpu(res.u32),
457459 &cmd, data);
@@ -525,8 +527,10 @@ int nvmf_connect_io_queue(struct nvme_ctrl *ctrl, u16 qid) · 67 unmodified lines
525527 return -ENOMEM;
526528
527529 ret = __nvme_submit_sync_cmd(ctrl->connect_q, &cmd, &res,
528− data, sizeof(*data), qid, 1,
529− BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
530+ data, sizeof(*data), qid,
531+ NVME_SUBMIT_AT_HEAD |
532+ NVME_SUBMIT_RESERVED |
533+ NVME_SUBMIT_NOWAIT);
530534 if (ret) {
531535 nvmf_log_connect_error(ctrl, ret, le32_to_cpu(res.u32),
532536 &cmd, data);
@@ -1488,6 +1492,7 @@ static void __exit nvmf_exit(void) · 955 unmodified lines
14881492 }
14891493
14901494 MODULE_LICENSE("GPL v2");
1495+MODULE_DESCRIPTION("NVMe host fabrics library");
14911496
14921497 module_init(nvmf_init);
14931498 module_exit(nvmf_exit);
drivers/nvme/host/fabrics.h+5−3
@@ -185,9 +185,11 @@ static inline bool · 184 unmodified lines
185185 nvmf_ctlr_matches_baseopts(struct nvme_ctrl *ctrl,
186186 struct nvmf_ctrl_options *opts)
187187 {
188− if (ctrl->state == NVME_CTRL_DELETING ||
189− ctrl->state == NVME_CTRL_DELETING_NOIO ||
190− ctrl->state == NVME_CTRL_DEAD ||
188+ enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
189+
190+ if (state == NVME_CTRL_DELETING ||
191+ state == NVME_CTRL_DELETING_NOIO ||
192+ state == NVME_CTRL_DEAD ||
191193 strcmp(opts->subsysnqn, ctrl->opts->subsysnqn) ||
192194 strcmp(opts->host->nqn, ctrl->opts->host->nqn) ||
193195 !uuid_equal(&opts->host->id, &ctrl->opts->host->id))
drivers/nvme/host/fc.c+14−46
@@ -221,11 +221,6 @@ static LIST_HEAD(nvme_fc_lport_list); · 220 unmodified lines
221221 static DEFINE_IDA(nvme_fc_local_port_cnt);
222222 static DEFINE_IDA(nvme_fc_ctrl_cnt);
223223
224−static struct workqueue_struct *nvme_fc_wq;
225−
226−static bool nvme_fc_waiting_to_unload;
227−static DECLARE_COMPLETION(nvme_fc_unload_proceed);
228−
229224 /*
230225 * These items are short-term. They will eventually be moved into
231226 * a generic FC class. See comments in module init.
@@ -255,8 +250,6 @@ nvme_fc_free_lport(struct kref *ref) · 23 unmodified lines
255250 /* remove from transport list */
256251 spin_lock_irqsave(&nvme_fc_lock, flags);
257252 list_del(&lport->port_list);
258− if (nvme_fc_waiting_to_unload && list_empty(&nvme_fc_lport_list))
259− complete(&nvme_fc_unload_proceed);
260253 spin_unlock_irqrestore(&nvme_fc_lock, flags);
261254
262255 ida_free(&nvme_fc_local_port_cnt, lport->localport.port_num);
@@ -2574,6 +2567,7 @@ static enum blk_eh_timer_return nvme_fc_timeout(struct request *rq) · 2311 unmodified lines
25742567 {
25752568 struct nvme_fc_fcp_op *op = blk_mq_rq_to_pdu(rq);
25762569 struct nvme_fc_ctrl *ctrl = op->ctrl;
2570+ u16 qnum = op->queue->qnum;
25772571 struct nvme_fc_cmd_iu *cmdiu = &op->cmd_iu;
25782572 struct nvme_command *sqe = &cmdiu->sqe;
25792573
@@ -2582,10 +2576,11 @@ static enum blk_eh_timer_return nvme_fc_timeout(struct request *rq) · 2 unmodified lines
25822576 * will detect the aborted io and will fail the connection.
25832577 */
25842578 dev_info(ctrl->ctrl.device,
2585− "NVME-FC{%d.%d}: io timeout: opcode %d fctype %d w10/11: "
2579+ "NVME-FC{%d.%d}: io timeout: opcode %d fctype %d (%s) w10/11: "
25862580 "x%08x/x%08x\n",
2587− ctrl->cnum, op->queue->qnum, sqe->common.opcode,
2588− sqe->connect.fctype, sqe->common.cdw10, sqe->common.cdw11);
2581+ ctrl->cnum, qnum, sqe->common.opcode, sqe->fabrics.fctype,
2582+ nvme_fabrics_opcode_str(qnum, sqe),
2583+ sqe->common.cdw10, sqe->common.cdw11);
25892584 if (__nvme_fc_abort_op(ctrl, op))
25902585 nvme_fc_error_recovery(ctrl, "io timeout abort failed");
25912586
@@ -3575,8 +3570,8 @@ nvme_fc_init_ctrl(struct device *dev, struct nvmf_ctrl_options *opts, · 983 unmodified lines
35753570 flush_delayed_work(&ctrl->connect_work);
35763571
35773572 dev_info(ctrl->ctrl.device,
3578− "NVME-FC{%d}: new ctrl: NQN \"%s\"\n",
3579− ctrl->cnum, nvmf_ctrl_subsysnqn(&ctrl->ctrl));
3573+ "NVME-FC{%d}: new ctrl: NQN \"%s\", hostnqn: %s\n",
3574+ ctrl->cnum, nvmf_ctrl_subsysnqn(&ctrl->ctrl), opts->host->nqn);
35803575
35813576 return &ctrl->ctrl;
35823577
@@ -3894,10 +3889,6 @@ static int __init nvme_fc_init_module(void) · 311 unmodified lines
38943889 {
38953890 int ret;
38963891
3897− nvme_fc_wq = alloc_workqueue("nvme_fc_wq", WQ_MEM_RECLAIM, 0);
3898− if (!nvme_fc_wq)
3899− return -ENOMEM;
3900−
39013892 /*
39023893 * NOTE:
39033894 * It is expected that in the future the kernel will combine
@@ -3915,7 +3906,7 @@ static int __init nvme_fc_init_module(void) · 11 unmodified lines
39153906 ret = class_register(&fc_class);
39163907 if (ret) {
39173908 pr_err("couldn't register class fc\n");
3918− goto out_destroy_wq;
3909+ return ret;
39193910 }
39203911
39213912 /*
@@ -3939,8 +3930,6 @@ out_destroy_device: · 17 unmodified lines
39393930 device_destroy(&fc_class, MKDEV(0, 0));
39403931 out_destroy_class:
39413932 class_unregister(&fc_class);
3942−out_destroy_wq:
3943− destroy_workqueue(nvme_fc_wq);
39443933
39453934 return ret;
39463935 }
@@ -3960,48 +3949,27 @@ nvme_fc_delete_controllers(struct nvme_fc_rport *rport) · 13 unmodified lines
39603949 spin_unlock(&rport->lock);
39613950 }
39623951
3963−static void
3964−nvme_fc_cleanup_for_unload(void)
3952+static void __exit nvme_fc_exit_module(void)
39653953 {
39663954 struct nvme_fc_lport *lport;
39673955 struct nvme_fc_rport *rport;
3968−
3969− list_for_each_entry(lport, &nvme_fc_lport_list, port_list) {
3970− list_for_each_entry(rport, &lport->endp_list, endp_list) {
3971− nvme_fc_delete_controllers(rport);
3972− }
3973− }
3974−}
3975−
3976−static void __exit nvme_fc_exit_module(void)
3977−{
39783956 unsigned long flags;
3979− bool need_cleanup = false;
39803957
39813958 spin_lock_irqsave(&nvme_fc_lock, flags);
3982− nvme_fc_waiting_to_unload = true;
3983− if (!list_empty(&nvme_fc_lport_list)) {
3984− need_cleanup = true;
3985− nvme_fc_cleanup_for_unload();
3986− }
3959+ list_for_each_entry(lport, &nvme_fc_lport_list, port_list)
3960+ list_for_each_entry(rport, &lport->endp_list, endp_list)
3961+ nvme_fc_delete_controllers(rport);
39873962 spin_unlock_irqrestore(&nvme_fc_lock, flags);
3988− if (need_cleanup) {
3989− pr_info("%s: waiting for ctlr deletes\n", __func__);
3990− wait_for_completion(&nvme_fc_unload_proceed);
3991− pr_info("%s: ctrl deletes complete\n", __func__);
3992− }
3963+ flush_workqueue(nvme_delete_wq);
39933964
39943965 nvmf_unregister_transport(&nvme_fc_transport);
39953966
3996− ida_destroy(&nvme_fc_local_port_cnt);
3997− ida_destroy(&nvme_fc_ctrl_cnt);
3998−
39993967 device_destroy(&fc_class, MKDEV(0, 0));
40003968 class_unregister(&fc_class);
4001− destroy_workqueue(nvme_fc_wq);
40023969 }
40033970
40043971 module_init(nvme_fc_init_module);
40053972 module_exit(nvme_fc_exit_module);
40063973
3974+MODULE_DESCRIPTION("NVMe host FC transport driver");
40073975 MODULE_LICENSE("GPL v2");
drivers/nvme/host/ioctl.c+1−1
@@ -228,7 +228,7 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) · 227 unmodified lines
228228 length = (io.nblocks + 1) << ns->head->lba_shift;
229229
230230 if ((io.control & NVME_RW_PRINFO_PRACT) &&
231− ns->head->ms == sizeof(struct t10_pi_tuple)) {
231+ (ns->head->ms == ns->head->pi_size)) {
232232 /*
233233 * Protection information is stripped/inserted by the
234234 * controller.
drivers/nvme/host/multipath.c+8−7
@@ -156,7 +156,7 @@ void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) · 155 unmodified lines
156156 if (!ns->head->disk)
157157 continue;
158158 kblockd_schedule_work(&ns->head->requeue_work);
159− if (ctrl->state == NVME_CTRL_LIVE)
159+ if (nvme_ctrl_state(ns->ctrl) == NVME_CTRL_LIVE)
160160 disk_uevent(ns->head->disk, KOBJ_CHANGE);
161161 }
162162 up_read(&ctrl->namespaces_rwsem);
@@ -223,13 +223,14 @@ void nvme_mpath_revalidate_paths(struct nvme_ns *ns) · 60 unmodified lines
223223
224224 static bool nvme_path_is_disabled(struct nvme_ns *ns)
225225 {
226+ enum nvme_ctrl_state state = nvme_ctrl_state(ns->ctrl);
227+
226228 /*
227229 * We don't treat NVME_CTRL_DELETING as a disabled path as I/O should
228230 * still be able to complete assuming that the controller is connected.
229231 * Otherwise it will fail immediately and return to the requeue list.
230232 */
231− if (ns->ctrl->state != NVME_CTRL_LIVE &&
232− ns->ctrl->state != NVME_CTRL_DELETING)
233+ if (state != NVME_CTRL_LIVE && state != NVME_CTRL_DELETING)
233234 return true;
234235 if (test_bit(NVME_NS_ANA_PENDING, &ns->flags) ||
235236 !test_bit(NVME_NS_READY, &ns->flags))
@@ -331,7 +332,7 @@ out: · 95 unmodified lines
331332
332333 static inline bool nvme_path_is_optimized(struct nvme_ns *ns)
333334 {
334− return ns->ctrl->state == NVME_CTRL_LIVE &&
335+ return nvme_ctrl_state(ns->ctrl) == NVME_CTRL_LIVE &&
335336 ns->ana_state == NVME_ANA_OPTIMIZED;
336337 }
337338
@@ -358,7 +359,7 @@ static bool nvme_available_path(struct nvme_ns_head *head) · 20 unmodified lines
358359 list_for_each_entry_rcu(ns, &head->list, siblings) {
359360 if (test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ns->ctrl->flags))
360361 continue;
361− switch (ns->ctrl->state) {
362+ switch (nvme_ctrl_state(ns->ctrl)) {
362363 case NVME_CTRL_LIVE:
363364 case NVME_CTRL_RESETTING:
364365 case NVME_CTRL_CONNECTING:
@@ -667,7 +668,7 @@ static void nvme_update_ns_ana_state(struct nvme_ana_group_desc *desc, · 302 unmodified lines
667668 * controller is ready.
668669 */
669670 if (nvme_state_is_live(ns->ana_state) &&
670− ns->ctrl->state == NVME_CTRL_LIVE)
671+ nvme_ctrl_state(ns->ctrl) == NVME_CTRL_LIVE)
671672 nvme_mpath_set_live(ns);
672673 }
673674
@@ -748,7 +749,7 @@ static void nvme_ana_work(struct work_struct *work) · 74 unmodified lines
748749 {
749750 struct nvme_ctrl *ctrl = container_of(work, struct nvme_ctrl, ana_work);
750751
751− if (ctrl->state != NVME_CTRL_LIVE)
752+ if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
752753 return;
753754
754755 nvme_read_ana_log(ctrl);
drivers/nvme/host/nvme.h+43−19
@@ -263,6 +263,7 @@ enum nvme_ctrl_flags { · 262 unmodified lines
263263 struct nvme_ctrl {
264264 bool comp_seen;
265265 bool identified;
266+ bool passthru_err_log_enabled;
266267 enum nvme_ctrl_state state;
267268 spinlock_t lock;
268269 struct mutex scan_lock;
@@ -454,6 +455,7 @@ struct nvme_ns_head { · 185 unmodified lines
454455 struct list_head entry;
455456 struct kref ref;
456457 bool shared;
458+ bool passthru_err_log_enabled;
457459 int instance;
458460 struct nvme_effects_log *effects;
459461 u64 nuse;
@@ -522,7 +524,6 @@ struct nvme_ns { · 62 unmodified lines
522524 struct device cdev_device;
523525
524526 struct nvme_fault_inject fault_inject;
525−
526527 };
527528
528529 /* NVMe ns supports metadata actions by the controller (generate/strip) */
@@ -805,17 +806,18 @@ blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); · 276 unmodified lines
805806 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
806807 struct request *req);
807808 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
808− bool queue_live);
809+ bool queue_live, enum nvme_ctrl_state state);
809810
810811 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
811812 bool queue_live)
812813 {
813− if (likely(ctrl->state == NVME_CTRL_LIVE))
814+ enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
815+
816+ if (likely(state == NVME_CTRL_LIVE))
814817 return true;
815− if (ctrl->ops->flags & NVME_F_FABRICS &&
816− ctrl->state == NVME_CTRL_DELETING)
818+ if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING)
817819 return queue_live;
818− return __nvme_check_ready(ctrl, rq, queue_live);
820+ return __nvme_check_ready(ctrl, rq, queue_live, state);
819821 }
820822
821823 /*
@@ -836,12 +838,27 @@ static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, · 14 unmodified lines
836838 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
837839 }
838840
841+/*
842+ * Flags for __nvme_submit_sync_cmd()
843+ */
844+typedef __u32 __bitwise nvme_submit_flags_t;
845+
846+enum {
847+ /* Insert request at the head of the queue */
848+ NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0),
849+ /* Set BLK_MQ_REQ_NOWAIT when allocating request */
850+ NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1),
851+ /* Set BLK_MQ_REQ_RESERVED when allocating request */
852+ NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2),
853+ /* Retry command when NVME_SC_DNR is not set in the result */
854+ NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3),
855+};
856+
839857 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
840858 void *buf, unsigned bufflen);
841859 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
842860 union nvme_result *result, void *buffer, unsigned bufflen,
843− int qid, int at_head,
844− blk_mq_req_flags_t flags);
861+ int qid, nvme_submit_flags_t flags);
845862 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
846863 unsigned int dword11, void *buffer, size_t buflen,
847864 u32 *result);
@@ -1124,35 +1141,42 @@ static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) · 276 unmodified lines
11241141 }
11251142
11261143 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1127−const unsigned char *nvme_get_error_status_str(u16 status);
1128−const unsigned char *nvme_get_opcode_str(u8 opcode);
1129−const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1130−const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode);
1144+const char *nvme_get_error_status_str(u16 status);
1145+const char *nvme_get_opcode_str(u8 opcode);
1146+const char *nvme_get_admin_opcode_str(u8 opcode);
1147+const char *nvme_get_fabrics_opcode_str(u8 opcode);
11311148 #else /* CONFIG_NVME_VERBOSE_ERRORS */
1132−static inline const unsigned char *nvme_get_error_status_str(u16 status)
1149+static inline const char *nvme_get_error_status_str(u16 status)
11331150 {
11341151 return "I/O Error";
11351152 }
1136−static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1153+static inline const char *nvme_get_opcode_str(u8 opcode)
11371154 {
11381155 return "I/O Cmd";
11391156 }
1140−static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1157+static inline const char *nvme_get_admin_opcode_str(u8 opcode)
11411158 {
11421159 return "Admin Cmd";
11431160 }
11441161
1145−static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode)
1162+static inline const char *nvme_get_fabrics_opcode_str(u8 opcode)
11461163 {
11471164 return "Fabrics Cmd";
11481165 }
11491166 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
11501167
1151−static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype)
1168+static inline const char *nvme_opcode_str(int qid, u8 opcode)
11521169 {
1153− if (opcode == nvme_fabrics_command)
1154− return nvme_get_fabrics_opcode_str(fctype);
11551170 return qid ? nvme_get_opcode_str(opcode) :
11561171 nvme_get_admin_opcode_str(opcode);
11571172 }
1173+
1174+static inline const char *nvme_fabrics_opcode_str(
1175+ int qid, const struct nvme_command *cmd)
1176+{
1177+ if (nvme_is_fabrics(cmd))
1178+ return nvme_get_fabrics_opcode_str(cmd->fabrics.fctype);
1179+
1180+ return nvme_opcode_str(qid, cmd->common.opcode);
1181+}
11581182 #endif /* _NVME_H */
drivers/nvme/host/pci.c+2−1
@@ -1349,7 +1349,7 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req) · 1348 unmodified lines
13491349 dev_warn(dev->ctrl.device,
13501350 "I/O tag %d (%04x) opcode %#x (%s) QID %d timeout, reset controller\n",
13511351 req->tag, nvme_cid(req), opcode,
1352− nvme_opcode_str(nvmeq->qid, opcode, 0), nvmeq->qid);
1352+ nvme_opcode_str(nvmeq->qid, opcode), nvmeq->qid);
13531353 nvme_req(req)->flags |= NVME_REQ_CANCELLED;
13541354 goto disable;
13551355 }
@@ -3543,5 +3543,6 @@ static void __exit nvme_exit(void) · 2187 unmodified lines
35433543 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
35443544 MODULE_LICENSE("GPL");
35453545 MODULE_VERSION("1.0");
3546+MODULE_DESCRIPTION("NVMe host PCIe transport driver");
35463547 module_init(nvme_init);
35473548 module_exit(nvme_exit);
drivers/nvme/host/rdma.c+14−9
@@ -1410,6 +1410,8 @@ static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, · 1409 unmodified lines
14101410 struct nvme_ns *ns = rq->q->queuedata;
14111411 struct bio *bio = rq->bio;
14121412 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1413+ struct blk_integrity *bi = blk_get_integrity(bio->bi_bdev->bd_disk);
1414+ u32 xfer_len;
14131415 int nr;
14141416
14151417 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
@@ -1422,8 +1424,7 @@ static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, · 6 unmodified lines
14221424 if (unlikely(nr))
14231425 goto mr_put;
14241426
1425− nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c,
1426− req->mr->sig_attrs, ns->head->pi_type);
1427+ nvme_rdma_set_sig_attrs(bi, c, req->mr->sig_attrs, ns->head->pi_type);
14271428 nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
14281429
14291430 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
@@ -1441,7 +1442,11 @@ static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, · 11 unmodified lines
14411442 IB_ACCESS_REMOTE_WRITE;
14421443
14431444 sg->addr = cpu_to_le64(req->mr->iova);
1444− put_unaligned_le24(req->mr->length, sg->length);
1445+ xfer_len = req->mr->length;
1446+ /* Check if PI is added by the HW */
1447+ if (!pi_count)
1448+ xfer_len += (xfer_len >> bi->interval_exp) * ns->head->pi_size;
1449+ put_unaligned_le24(xfer_len, sg->length);
14451450 put_unaligned_le32(req->mr->rkey, sg->key);
14461451 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
14471452
@@ -1946,14 +1951,13 @@ static enum blk_eh_timer_return nvme_rdma_timeout(struct request *rq) · 498 unmodified lines
19461951 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
19471952 struct nvme_rdma_queue *queue = req->queue;
19481953 struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1949− u8 opcode = req->req.cmd->common.opcode;
1950− u8 fctype = req->req.cmd->fabrics.fctype;
1954+ struct nvme_command *cmd = req->req.cmd;
19511955 int qid = nvme_rdma_queue_idx(queue);
19521956
19531957 dev_warn(ctrl->ctrl.device,
19541958 "I/O tag %d (%04x) opcode %#x (%s) QID %d timeout\n",
1955− rq->tag, nvme_cid(rq), opcode,
1956− nvme_opcode_str(qid, opcode, fctype), qid);
1959+ rq->tag, nvme_cid(rq), cmd->common.opcode,
1960+ nvme_fabrics_opcode_str(qid, cmd), qid);
19571961
19581962 if (nvme_ctrl_state(&ctrl->ctrl) != NVME_CTRL_LIVE) {
19591963 /*
@@ -2296,8 +2300,8 @@ static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, · 336 unmodified lines
22962300 if (ret)
22972301 goto out_uninit_ctrl;
22982302
2299− dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
2300− nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr);
2303+ dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs, hostnqn: %s\n",
2304+ nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr, opts->host->nqn);
23012305
23022306 mutex_lock(&nvme_rdma_ctrl_mutex);
23032307 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
@@ -2400,4 +2404,5 @@ static void __exit nvme_rdma_cleanup_module(void) · 96 unmodified lines
24002404 module_init(nvme_rdma_init_module);
24012405 module_exit(nvme_rdma_cleanup_module);
24022406
2407+MODULE_DESCRIPTION("NVMe host RDMA transport driver");
24032408 MODULE_LICENSE("GPL v2");
drivers/nvme/host/sysfs.c+61−3
@@ -35,6 +35,31 @@ static ssize_t nvme_sysfs_rescan(struct device *dev, · 34 unmodified lines
3535 }
3636 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
3737
38+static ssize_t nvme_adm_passthru_err_log_enabled_show(struct device *dev,
39+ struct device_attribute *attr, char *buf)
40+{
41+ struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
42+
43+ return sysfs_emit(buf,
44+ ctrl->passthru_err_log_enabled ? "on\n" : "off\n");
45+}
46+
47+static ssize_t nvme_adm_passthru_err_log_enabled_store(struct device *dev,
48+ struct device_attribute *attr, const char *buf, size_t count)
49+{
50+ struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
51+ bool passthru_err_log_enabled;
52+ int err;
53+
54+ err = kstrtobool(buf, &passthru_err_log_enabled);
55+ if (err)
56+ return -EINVAL;
57+
58+ ctrl->passthru_err_log_enabled = passthru_err_log_enabled;
59+
60+ return count;
61+}
62+
3863 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev)
3964 {
4065 struct gendisk *disk = dev_to_disk(dev);
@@ -44,6 +69,37 @@ static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev) · 3 unmodified lines
4469 return nvme_get_ns_from_dev(dev)->head;
4570 }
4671
72+static ssize_t nvme_io_passthru_err_log_enabled_show(struct device *dev,
73+ struct device_attribute *attr, char *buf)
74+{
75+ struct nvme_ns_head *head = dev_to_ns_head(dev);
76+
77+ return sysfs_emit(buf, head->passthru_err_log_enabled ? "on\n" : "off\n");
78+}
79+
80+static ssize_t nvme_io_passthru_err_log_enabled_store(struct device *dev,
81+ struct device_attribute *attr, const char *buf, size_t count)
82+{
83+ struct nvme_ns_head *head = dev_to_ns_head(dev);
84+ bool passthru_err_log_enabled;
85+ int err;
86+
87+ err = kstrtobool(buf, &passthru_err_log_enabled);
88+ if (err)
89+ return -EINVAL;
90+ head->passthru_err_log_enabled = passthru_err_log_enabled;
91+
92+ return count;
93+}
94+
95+static struct device_attribute dev_attr_adm_passthru_err_log_enabled = \
96+ __ATTR(passthru_err_log_enabled, S_IRUGO | S_IWUSR, \
97+ nvme_adm_passthru_err_log_enabled_show, nvme_adm_passthru_err_log_enabled_store);
98+
99+static struct device_attribute dev_attr_io_passthru_err_log_enabled = \
100+ __ATTR(passthru_err_log_enabled, S_IRUGO | S_IWUSR, \
101+ nvme_io_passthru_err_log_enabled_show, nvme_io_passthru_err_log_enabled_store);
102+
47103 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
48104 char *buf)
49105 {
@@ -208,6 +264,7 @@ static struct attribute *nvme_ns_attrs[] = { · 158 unmodified lines
208264 &dev_attr_ana_grpid.attr,
209265 &dev_attr_ana_state.attr,
210266 #endif
267+ &dev_attr_io_passthru_err_log_enabled.attr,
211268 NULL,
212269 };
213270
@@ -311,6 +368,7 @@ static ssize_t nvme_sysfs_show_state(struct device *dev, · 97 unmodified lines
311368 char *buf)
312369 {
313370 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
371+ unsigned state = (unsigned)nvme_ctrl_state(ctrl);
314372 static const char *const state_name[] = {
315373 [NVME_CTRL_NEW] = "new",
316374 [NVME_CTRL_LIVE] = "live",
@@ -321,9 +379,8 @@ static ssize_t nvme_sysfs_show_state(struct device *dev, · 4 unmodified lines
321379 [NVME_CTRL_DEAD] = "dead",
322380 };
323381
324− if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
325− state_name[ctrl->state])
326− return sysfs_emit(buf, "%s\n", state_name[ctrl->state]);
382+ if (state < ARRAY_SIZE(state_name) && state_name[state])
383+ return sysfs_emit(buf, "%s\n", state_name[state]);
327384
328385 return sysfs_emit(buf, "unknown state\n");
329386 }
@@ -655,6 +712,7 @@ static struct attribute *nvme_dev_attrs[] = { · 325 unmodified lines
655712 #ifdef CONFIG_NVME_TCP_TLS
656713 &dev_attr_tls_key.attr,
657714 #endif
715+ &dev_attr_adm_passthru_err_log_enabled.attr,
658716 NULL
659717 };
660718
drivers/nvme/host/tcp.c+6−5
@@ -2428,13 +2428,13 @@ static enum blk_eh_timer_return nvme_tcp_timeout(struct request *rq) · 2427 unmodified lines
24282428 struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq);
24292429 struct nvme_ctrl *ctrl = &req->queue->ctrl->ctrl;
24302430 struct nvme_tcp_cmd_pdu *pdu = nvme_tcp_req_cmd_pdu(req);
2431− u8 opc = pdu->cmd.common.opcode, fctype = pdu->cmd.fabrics.fctype;
2431+ struct nvme_command *cmd = &pdu->cmd;
24322432 int qid = nvme_tcp_queue_id(req->queue);
24332433
24342434 dev_warn(ctrl->device,
24352435 "I/O tag %d (%04x) type %d opcode %#x (%s) QID %d timeout\n",
2436− rq->tag, nvme_cid(rq), pdu->hdr.type, opc,
2437− nvme_opcode_str(qid, opc, fctype), qid);
2436+ rq->tag, nvme_cid(rq), pdu->hdr.type, cmd->common.opcode,
2437+ nvme_fabrics_opcode_str(qid, cmd), qid);
24382438
24392439 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) {
24402440 /*
@@ -2753,8 +2753,8 @@ static struct nvme_ctrl *nvme_tcp_create_ctrl(struct device *dev, · 312 unmodified lines
27532753 if (ret)
27542754 goto out_uninit_ctrl;
27552755
2756− dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISp\n",
2757− nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr);
2756+ dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISp, hostnqn: %s\n",
2757+ nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr, opts->host->nqn);
27582758
27592759 mutex_lock(&nvme_tcp_ctrl_mutex);
27602760 list_add_tail(&ctrl->list, &nvme_tcp_ctrl_list);
@@ -2826,4 +2826,5 @@ static void __exit nvme_tcp_cleanup_module(void) · 65 unmodified lines
28262826 module_init(nvme_tcp_init_module);
28272827 module_exit(nvme_tcp_cleanup_module);
28282828
2829+MODULE_DESCRIPTION("NVMe host TCP transport driver");
28292830 MODULE_LICENSE("GPL v2");
drivers/nvme/target/core.c+3−2
@@ -248,7 +248,7 @@ void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid) · 247 unmodified lines
248248 nvmet_add_to_changed_ns_log(ctrl, cpu_to_le32(nsid));
249249 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_NS_ATTR))
250250 continue;
251− nvmet_add_async_event(ctrl, NVME_AER_TYPE_NOTICE,
251+ nvmet_add_async_event(ctrl, NVME_AER_NOTICE,
252252 NVME_AER_NOTICE_NS_CHANGED,
253253 NVME_LOG_CHANGED_NS);
254254 }
@@ -265,7 +265,7 @@ void nvmet_send_ana_event(struct nvmet_subsys *subsys, · 10 unmodified lines
265265 continue;
266266 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_ANA_CHANGE))
267267 continue;
268− nvmet_add_async_event(ctrl, NVME_AER_TYPE_NOTICE,
268+ nvmet_add_async_event(ctrl, NVME_AER_NOTICE,
269269 NVME_AER_NOTICE_ANA, NVME_LOG_ANA);
270270 }
271271 mutex_unlock(&subsys->lock);
@@ -1705,4 +1705,5 @@ static void __exit nvmet_exit(void) · 1433 unmodified lines
17051705 module_init(nvmet_init);
17061706 module_exit(nvmet_exit);
17071707
1708+MODULE_DESCRIPTION("NVMe target core framework");
17081709 MODULE_LICENSE("GPL v2");
drivers/nvme/target/discovery.c+1−1
@@ -21,7 +21,7 @@ static void __nvmet_disc_changed(struct nvmet_port *port, · 20 unmodified lines
2121 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_DISC_CHANGE))
2222 return;
2323
24− nvmet_add_async_event(ctrl, NVME_AER_TYPE_NOTICE,
24+ nvmet_add_async_event(ctrl, NVME_AER_NOTICE,
2525 NVME_AER_NOTICE_DISC_CHANGED, NVME_LOG_DISC);
2626 }
2727
drivers/nvme/target/fc.c+103−83
@@ -111,6 +111,8 @@ struct nvmet_fc_tgtport { · 110 unmodified lines
111111 struct nvmet_fc_port_entry *pe;
112112 struct kref ref;
113113 u32 max_sg_cnt;
114+
115+ struct work_struct put_work;
114116 };
115117
116118 struct nvmet_fc_port_entry {
@@ -145,7 +147,6 @@ struct nvmet_fc_tgt_queue { · 28 unmodified lines
145147 struct list_head avail_defer_list;
146148 struct workqueue_struct *work_q;
147149 struct kref ref;
148− struct rcu_head rcu;
149150 /* array of fcp_iods */
150151 struct nvmet_fc_fcp_iod fod[] __counted_by(sqsize);
151152 } __aligned(sizeof(unsigned long long));
@@ -166,10 +167,9 @@ struct nvmet_fc_tgt_assoc { · 14 unmodified lines
166167 struct nvmet_fc_hostport *hostport;
167168 struct nvmet_fc_ls_iod *rcv_disconn;
168169 struct list_head a_list;
169− struct nvmet_fc_tgt_queue __rcu *queues[NVMET_NR_QUEUES + 1];
170+ struct nvmet_fc_tgt_queue *queues[NVMET_NR_QUEUES + 1];
170171 struct kref ref;
171172 struct work_struct del_work;
172− struct rcu_head rcu;
173173 };
174174
175175
@@ -249,6 +249,13 @@ static int nvmet_fc_tgt_a_get(struct nvmet_fc_tgt_assoc *assoc); · 73 unmodified lines
249249 static void nvmet_fc_tgt_q_put(struct nvmet_fc_tgt_queue *queue);
250250 static int nvmet_fc_tgt_q_get(struct nvmet_fc_tgt_queue *queue);
251251 static void nvmet_fc_tgtport_put(struct nvmet_fc_tgtport *tgtport);
252+static void nvmet_fc_put_tgtport_work(struct work_struct *work)
253+{
254+ struct nvmet_fc_tgtport *tgtport =
255+ container_of(work, struct nvmet_fc_tgtport, put_work);
256+
257+ nvmet_fc_tgtport_put(tgtport);
258+}
252259 static int nvmet_fc_tgtport_get(struct nvmet_fc_tgtport *tgtport);
253260 static void nvmet_fc_handle_fcp_rqst(struct nvmet_fc_tgtport *tgtport,
254261 struct nvmet_fc_fcp_iod *fod);
@@ -360,7 +367,7 @@ __nvmet_fc_finish_ls_req(struct nvmet_fc_ls_req_op *lsop) · 105 unmodified lines
360367
361368 if (!lsop->req_queued) {
362369 spin_unlock_irqrestore(&tgtport->lock, flags);
363− return;
370+ goto out_putwork;
364371 }
365372
366373 list_del(&lsop->lsreq_list);
@@ -373,7 +380,8 @@ __nvmet_fc_finish_ls_req(struct nvmet_fc_ls_req_op *lsop) · 6 unmodified lines
373380 (lsreq->rqstlen + lsreq->rsplen),
374381 DMA_BIDIRECTIONAL);
375382
376− nvmet_fc_tgtport_put(tgtport);
383+out_putwork:
384+ queue_work(nvmet_wq, &tgtport->put_work);
377385 }
378386
379387 static int
@@ -489,8 +497,7 @@ nvmet_fc_xmt_disconnect_assoc(struct nvmet_fc_tgt_assoc *assoc) · 109 unmodified lines
489497 * message is normal. Otherwise, send unless the hostport has
490498 * already been invalidated by the lldd.
491499 */
492− if (!tgtport->ops->ls_req || !assoc->hostport ||
493− assoc->hostport->invalid)
500+ if (!tgtport->ops->ls_req || assoc->hostport->invalid)
494501 return;
495502
496503 lsop = kzalloc((sizeof(*lsop) +
@@ -802,14 +809,11 @@ nvmet_fc_alloc_target_queue(struct nvmet_fc_tgt_assoc *assoc, · 305 unmodified lines
802809 if (!queue)
803810 return NULL;
804811
805− if (!nvmet_fc_tgt_a_get(assoc))
806− goto out_free_queue;
807−
808812 queue->work_q = alloc_workqueue("ntfc%d.%d.%d", 0, 0,
809813 assoc->tgtport->fc_target_port.port_num,
810814 assoc->a_id, qid);
811815 if (!queue->work_q)
812− goto out_a_put;
816+ goto out_free_queue;
813817
814818 queue->qid = qid;
815819 queue->sqsize = sqsize;
@@ -831,15 +835,13 @@ nvmet_fc_alloc_target_queue(struct nvmet_fc_tgt_assoc *assoc, · 15 unmodified lines
831835 goto out_fail_iodlist;
832836
833837 WARN_ON(assoc->queues[qid]);
834− rcu_assign_pointer(assoc->queues[qid], queue);
838+ assoc->queues[qid] = queue;
835839
836840 return queue;
837841
838842 out_fail_iodlist:
839843 nvmet_fc_destroy_fcp_iodlist(assoc->tgtport, queue);
840844 destroy_workqueue(queue->work_q);
841−out_a_put:
842− nvmet_fc_tgt_a_put(assoc);
843845 out_free_queue:
844846 kfree(queue);
845847 return NULL;
@@ -852,15 +854,11 @@ nvmet_fc_tgt_queue_free(struct kref *ref) · 6 unmodified lines
852854 struct nvmet_fc_tgt_queue *queue =
853855 container_of(ref, struct nvmet_fc_tgt_queue, ref);
854856
855− rcu_assign_pointer(queue->assoc->queues[queue->qid], NULL);
856−
857857 nvmet_fc_destroy_fcp_iodlist(queue->assoc->tgtport, queue);
858858
859− nvmet_fc_tgt_a_put(queue->assoc);
860−
861859 destroy_workqueue(queue->work_q);
862860
863− kfree_rcu(queue, rcu);
861+ kfree(queue);
864862 }
865863
866864 static void
@@ -969,7 +967,7 @@ nvmet_fc_find_target_queue(struct nvmet_fc_tgtport *tgtport, · 102 unmodified lines
969967 rcu_read_lock();
970968 list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {
971969 if (association_id == assoc->association_id) {
972− queue = rcu_dereference(assoc->queues[qid]);
970+ queue = assoc->queues[qid];
973971 if (queue &&
974972 (!atomic_read(&queue->connected) ||
975973 !nvmet_fc_tgt_q_get(queue)))
@@ -1078,8 +1076,6 @@ nvmet_fc_alloc_hostport(struct nvmet_fc_tgtport *tgtport, void *hosthandle) · 102 unmodified lines
10781076 /* new allocation not needed */
10791077 kfree(newhost);
10801078 newhost = match;
1081− /* no new allocation - release reference */
1082− nvmet_fc_tgtport_put(tgtport);
10831079 } else {
10841080 newhost->tgtport = tgtport;
10851081 newhost->hosthandle = hosthandle;
@@ -1094,23 +1090,54 @@ nvmet_fc_alloc_hostport(struct nvmet_fc_tgtport *tgtport, void *hosthandle) · 8 unmodified lines
10941090 }
10951091
10961092 static void
1097−nvmet_fc_delete_assoc(struct work_struct *work)
1093+nvmet_fc_delete_assoc(struct nvmet_fc_tgt_assoc *assoc)
1094+{
1095+ nvmet_fc_delete_target_assoc(assoc);
1096+ nvmet_fc_tgt_a_put(assoc);
1097+}
1098+
1099+static void
1100+nvmet_fc_delete_assoc_work(struct work_struct *work)
10981101 {
10991102 struct nvmet_fc_tgt_assoc *assoc =
11001103 container_of(work, struct nvmet_fc_tgt_assoc, del_work);
1104+ struct nvmet_fc_tgtport *tgtport = assoc->tgtport;
11011105
1102− nvmet_fc_delete_target_assoc(assoc);
1103− nvmet_fc_tgt_a_put(assoc);
1106+ nvmet_fc_delete_assoc(assoc);
1107+ nvmet_fc_tgtport_put(tgtport);
1108+}
1109+
1110+static void
1111+nvmet_fc_schedule_delete_assoc(struct nvmet_fc_tgt_assoc *assoc)
1112+{
1113+ nvmet_fc_tgtport_get(assoc->tgtport);
1114+ queue_work(nvmet_wq, &assoc->del_work);
1115+}
1116+
1117+static bool
1118+nvmet_fc_assoc_exits(struct nvmet_fc_tgtport *tgtport, u64 association_id)
1119+{
1120+ struct nvmet_fc_tgt_assoc *a;
1121+
1122+ list_for_each_entry_rcu(a, &tgtport->assoc_list, a_list) {
1123+ if (association_id == a->association_id)
1124+ return true;
1125+ }
1126+
1127+ return false;
11041128 }
11051129
11061130 static struct nvmet_fc_tgt_assoc *
11071131 nvmet_fc_alloc_target_assoc(struct nvmet_fc_tgtport *tgtport, void *hosthandle)
11081132 {
1109− struct nvmet_fc_tgt_assoc *assoc, *tmpassoc;
1133+ struct nvmet_fc_tgt_assoc *assoc;
11101134 unsigned long flags;
1135+ bool done;
11111136 u64 ran;
11121137 int idx;
1113− bool needrandom = true;
1138+
1139+ if (!tgtport->pe)
1140+ return NULL;
11141141
11151142 assoc = kzalloc(sizeof(*assoc), GFP_KERNEL);
11161143 if (!assoc)
@@ -1120,43 +1147,35 @@ nvmet_fc_alloc_target_assoc(struct nvmet_fc_tgtport *tgtport, void *hosthandle) · 3 unmodified lines
11201147 if (idx < 0)
11211148 goto out_free_assoc;
11221149
1123− if (!nvmet_fc_tgtport_get(tgtport))
1124− goto out_ida;
1125−
11261150 assoc->hostport = nvmet_fc_alloc_hostport(tgtport, hosthandle);
11271151 if (IS_ERR(assoc->hostport))
1128− goto out_put;
1152+ goto out_ida;
11291153
11301154 assoc->tgtport = tgtport;
11311155 assoc->a_id = idx;
11321156 INIT_LIST_HEAD(&assoc->a_list);
11331157 kref_init(&assoc->ref);
1134− INIT_WORK(&assoc->del_work, nvmet_fc_delete_assoc);
1158+ INIT_WORK(&assoc->del_work, nvmet_fc_delete_assoc_work);
11351159 atomic_set(&assoc->terminating, 0);
11361160
1137− while (needrandom) {
1161+ done = false;
1162+ do {
11381163 get_random_bytes(&ran, sizeof(ran) - BYTES_FOR_QID);
11391164 ran = ran << BYTES_FOR_QID_SHIFT;
11401165
11411166 spin_lock_irqsave(&tgtport->lock, flags);
1142− needrandom = false;
1143− list_for_each_entry(tmpassoc, &tgtport->assoc_list, a_list) {
1144− if (ran == tmpassoc->association_id) {
1145− needrandom = true;
1146− break;
1147− }
1148− }
1149− if (!needrandom) {
1167+ rcu_read_lock();
1168+ if (!nvmet_fc_assoc_exits(tgtport, ran)) {
11501169 assoc->association_id = ran;
11511170 list_add_tail_rcu(&assoc->a_list, &tgtport->assoc_list);
1171+ done = true;
11521172 }
1173+ rcu_read_unlock();
11531174 spin_unlock_irqrestore(&tgtport->lock, flags);
1154− }
1175+ } while (!done);
11551176
11561177 return assoc;
11571178
1158−out_put:
1159− nvmet_fc_tgtport_put(tgtport);
11601179 out_ida:
11611180 ida_free(&tgtport->assoc_cnt, idx);
11621181 out_free_assoc:
@@ -1172,13 +1191,18 @@ nvmet_fc_target_assoc_free(struct kref *ref) · 9 unmodified lines
11721191 struct nvmet_fc_tgtport *tgtport = assoc->tgtport;
11731192 struct nvmet_fc_ls_iod *oldls;
11741193 unsigned long flags;
1194+ int i;
1195+
1196+ for (i = NVMET_NR_QUEUES; i >= 0; i--) {
1197+ if (assoc->queues[i])
1198+ nvmet_fc_delete_target_queue(assoc->queues[i]);
1199+ }
11751200
11761201 /* Send Disconnect now that all i/o has completed */
11771202 nvmet_fc_xmt_disconnect_assoc(assoc);
11781203
11791204 nvmet_fc_free_hostport(assoc->hostport);
11801205 spin_lock_irqsave(&tgtport->lock, flags);
1181− list_del_rcu(&assoc->a_list);
11821206 oldls = assoc->rcv_disconn;
11831207 spin_unlock_irqrestore(&tgtport->lock, flags);
11841208 /* if pending Rcv Disconnect Association LS, send rsp now */
@@ -1188,8 +1212,7 @@ nvmet_fc_target_assoc_free(struct kref *ref) · 3 unmodified lines
11881212 dev_info(tgtport->dev,
11891213 "{%d:%d} Association freed\n",
11901214 tgtport->fc_target_port.port_num, assoc->a_id);
1191− kfree_rcu(assoc, rcu);
1192− nvmet_fc_tgtport_put(tgtport);
1215+ kfree(assoc);
11931216 }
11941217
11951218 static void
@@ -1208,7 +1231,7 @@ static void · 12 unmodified lines
12081231 nvmet_fc_delete_target_assoc(struct nvmet_fc_tgt_assoc *assoc)
12091232 {
12101233 struct nvmet_fc_tgtport *tgtport = assoc->tgtport;
1211− struct nvmet_fc_tgt_queue *queue;
1234+ unsigned long flags;
12121235 int i, terminating;
12131236
12141237 terminating = atomic_xchg(&assoc->terminating, 1);
@@ -1217,29 +1240,21 @@ nvmet_fc_delete_target_assoc(struct nvmet_fc_tgt_assoc *assoc) · 2 unmodified lines
12171240 if (terminating)
12181241 return;
12191242
1243+ spin_lock_irqsave(&tgtport->lock, flags);
1244+ list_del_rcu(&assoc->a_list);
1245+ spin_unlock_irqrestore(&tgtport->lock, flags);
12201246
1221− for (i = NVMET_NR_QUEUES; i >= 0; i--) {
1222− rcu_read_lock();
1223− queue = rcu_dereference(assoc->queues[i]);
1224− if (!queue) {
1225− rcu_read_unlock();
1226− continue;
1227− }
1247+ synchronize_rcu();
12281248
1229− if (!nvmet_fc_tgt_q_get(queue)) {
1230− rcu_read_unlock();
1231− continue;
1232− }
1233− rcu_read_unlock();
1234− nvmet_fc_delete_target_queue(queue);
1235− nvmet_fc_tgt_q_put(queue);
1249+ /* ensure all in-flight I/Os have been processed */
1250+ for (i = NVMET_NR_QUEUES; i >= 0; i--) {
1251+ if (assoc->queues[i])
1252+ flush_workqueue(assoc->queues[i]->work_q);
12361253 }
12371254
12381255 dev_info(tgtport->dev,
12391256 "{%d:%d} Association deleted\n",
12401257 tgtport->fc_target_port.port_num, assoc->a_id);
1241−
1242− nvmet_fc_tgt_a_put(assoc);
12431258 }
12441259
12451260 static struct nvmet_fc_tgt_assoc *
@@ -1415,6 +1430,7 @@ nvmet_fc_register_targetport(struct nvmet_fc_port_info *pinfo, · 169 unmodified lines
14151430 kref_init(&newrec->ref);
14161431 ida_init(&newrec->assoc_cnt);
14171432 newrec->max_sg_cnt = template->max_sgl_segments;
1433+ INIT_WORK(&newrec->put_work, nvmet_fc_put_tgtport_work);
14181434
14191435 ret = nvmet_fc_alloc_ls_iodlist(newrec);
14201436 if (ret) {
@@ -1492,9 +1508,8 @@ __nvmet_fc_free_assocs(struct nvmet_fc_tgtport *tgtport) · 71 unmodified lines
14921508 list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {
14931509 if (!nvmet_fc_tgt_a_get(assoc))
14941510 continue;
1495− if (!queue_work(nvmet_wq, &assoc->del_work))
1496− /* already deleting - release local reference */
1497− nvmet_fc_tgt_a_put(assoc);
1511+ nvmet_fc_schedule_delete_assoc(assoc);
1512+ nvmet_fc_tgt_a_put(assoc);
14981513 }
14991514 rcu_read_unlock();
15001515 }
@@ -1540,16 +1555,14 @@ nvmet_fc_invalidate_host(struct nvmet_fc_target_port *target_port, · 39 unmodified lines
15401555 spin_lock_irqsave(&tgtport->lock, flags);
15411556 list_for_each_entry_safe(assoc, next,
15421557 &tgtport->assoc_list, a_list) {
1543− if (!assoc->hostport ||
1544− assoc->hostport->hosthandle != hosthandle)
1558+ if (assoc->hostport->hosthandle != hosthandle)
15451559 continue;
15461560 if (!nvmet_fc_tgt_a_get(assoc))
15471561 continue;
15481562 assoc->hostport->invalid = 1;
15491563 noassoc = false;
1550− if (!queue_work(nvmet_wq, &assoc->del_work))
1551− /* already deleting - release local reference */
1552− nvmet_fc_tgt_a_put(assoc);
1564+ nvmet_fc_schedule_delete_assoc(assoc);
1565+ nvmet_fc_tgt_a_put(assoc);
15531566 }
15541567 spin_unlock_irqrestore(&tgtport->lock, flags);
15551568
@@ -1581,7 +1594,7 @@ nvmet_fc_delete_ctrl(struct nvmet_ctrl *ctrl) · 25 unmodified lines
15811594
15821595 rcu_read_lock();
15831596 list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {
1584− queue = rcu_dereference(assoc->queues[0]);
1597+ queue = assoc->queues[0];
15851598 if (queue && queue->nvme_sq.ctrl == ctrl) {
15861599 if (nvmet_fc_tgt_a_get(assoc))
15871600 found_ctrl = true;
@@ -1593,9 +1606,8 @@ nvmet_fc_delete_ctrl(struct nvmet_ctrl *ctrl) · 5 unmodified lines
15931606 nvmet_fc_tgtport_put(tgtport);
15941607
15951608 if (found_ctrl) {
1596− if (!queue_work(nvmet_wq, &assoc->del_work))
1597− /* already deleting - release local reference */
1598− nvmet_fc_tgt_a_put(assoc);
1609+ nvmet_fc_schedule_delete_assoc(assoc);
1610+ nvmet_fc_tgt_a_put(assoc);
15991611 return;
16001612 }
16011613
@@ -1625,6 +1637,8 @@ nvmet_fc_unregister_targetport(struct nvmet_fc_target_port *target_port) · 23 unmodified lines
16251637 /* terminate any outstanding associations */
16261638 __nvmet_fc_free_assocs(tgtport);
16271639
1640+ flush_workqueue(nvmet_wq);
1641+
16281642 /*
16291643 * should terminate LS's as well. However, LS's will be generated
16301644 * at the tail end of association termination, so they likely don't
@@ -1870,9 +1884,6 @@ nvmet_fc_ls_disconnect(struct nvmet_fc_tgtport *tgtport, · 239 unmodified lines
18701884 sizeof(struct fcnvme_ls_disconnect_assoc_acc)),
18711885 FCNVME_LS_DISCONNECT_ASSOC);
18721886
1873− /* release get taken in nvmet_fc_find_target_assoc */
1874− nvmet_fc_tgt_a_put(assoc);
1875−
18761887 /*
18771888 * The rules for LS response says the response cannot
18781889 * go back until ABTS's have been sent for all outstanding
@@ -1887,8 +1898,6 @@ nvmet_fc_ls_disconnect(struct nvmet_fc_tgtport *tgtport, · 8 unmodified lines
18871898 assoc->rcv_disconn = iod;
18881899 spin_unlock_irqrestore(&tgtport->lock, flags);
18891900
1890− nvmet_fc_delete_target_assoc(assoc);
1891−
18921901 if (oldls) {
18931902 dev_info(tgtport->dev,
18941903 "{%d:%d} Multiple Disconnect Association LS's "
@@ -1904,6 +1913,9 @@ nvmet_fc_ls_disconnect(struct nvmet_fc_tgtport *tgtport, · 9 unmodified lines
19041913 nvmet_fc_xmt_ls_rsp(tgtport, oldls);
19051914 }
19061915
1916+ nvmet_fc_schedule_delete_assoc(assoc);
1917+ nvmet_fc_tgt_a_put(assoc);
1918+
19071919 return false;
19081920 }
19091921
@@ -2540,8 +2552,9 @@ nvmet_fc_handle_fcp_rqst(struct nvmet_fc_tgtport *tgtport, · 630 unmodified lines
25402552
25412553 fod->req.cmd = &fod->cmdiubuf.sqe;
25422554 fod->req.cqe = &fod->rspiubuf.cqe;
2543− if (tgtport->pe)
2544− fod->req.port = tgtport->pe->port;
2555+ if (!tgtport->pe)
2556+ goto transport_error;
2557+ fod->req.port = tgtport->pe->port;
25452558
25462559 /* clear any response payload */
25472560 memset(&fod->rspiubuf, 0, sizeof(fod->rspiubuf));
@@ -2902,6 +2915,9 @@ nvmet_fc_remove_port(struct nvmet_port *port) · 354 unmodified lines
29022915
29032916 nvmet_fc_portentry_unbind(pe);
29042917
2918+ /* terminate any outstanding associations */
2919+ __nvmet_fc_free_assocs(pe->tgtport);
2920+
29052921 kfree(pe);
29062922 }
29072923
@@ -2933,6 +2949,9 @@ static int __init nvmet_fc_init_module(void) · 25 unmodified lines
29332949
29342950 static void __exit nvmet_fc_exit_module(void)
29352951 {
2952+ /* ensure any shutdown operation, e.g. delete ctrls have finished */
2953+ flush_workqueue(nvmet_wq);
2954+
29362955 /* sanity check - all lports should be removed */
29372956 if (!list_empty(&nvmet_fc_target_list))
29382957 pr_warn("%s: targetport list not empty\n", __func__);
@@ -2945,4 +2964,5 @@ static void __exit nvmet_fc_exit_module(void) · 6 unmodified lines
29452964 module_init(nvmet_fc_init_module);
29462965 module_exit(nvmet_fc_exit_module);
29472966
2967+MODULE_DESCRIPTION("NVMe target FC transport driver");
29482968 MODULE_LICENSE("GPL v2");
drivers/nvme/target/fcloop.c+4−3
@@ -358,7 +358,7 @@ fcloop_h2t_ls_req(struct nvme_fc_local_port *localport, · 357 unmodified lines
358358 if (!rport->targetport) {
359359 tls_req->status = -ECONNREFUSED;
360360 spin_lock(&rport->lock);
361− list_add_tail(&rport->ls_list, &tls_req->ls_list);
361+ list_add_tail(&tls_req->ls_list, &rport->ls_list);
362362 spin_unlock(&rport->lock);
363363 queue_work(nvmet_wq, &rport->ls_work);
364364 return ret;
@@ -391,7 +391,7 @@ fcloop_h2t_xmt_ls_rsp(struct nvmet_fc_target_port *targetport, · 26 unmodified lines
391391 if (remoteport) {
392392 rport = remoteport->private;
393393 spin_lock(&rport->lock);
394− list_add_tail(&rport->ls_list, &tls_req->ls_list);
394+ list_add_tail(&tls_req->ls_list, &rport->ls_list);
395395 spin_unlock(&rport->lock);
396396 queue_work(nvmet_wq, &rport->ls_work);
397397 }
@@ -446,7 +446,7 @@ fcloop_t2h_ls_req(struct nvmet_fc_target_port *targetport, void *hosthandle, · 48 unmodified lines
446446 if (!tport->remoteport) {
447447 tls_req->status = -ECONNREFUSED;
448448 spin_lock(&tport->lock);
449− list_add_tail(&tport->ls_list, &tls_req->ls_list);
449+ list_add_tail(&tls_req->ls_list, &tport->ls_list);
450450 spin_unlock(&tport->lock);
451451 queue_work(nvmet_wq, &tport->ls_work);
452452 return ret;
@@ -1650,4 +1650,5 @@ static void __exit fcloop_exit(void) · 1197 unmodified lines
16501650 module_init(fcloop_init);
16511651 module_exit(fcloop_exit);
16521652
1653+MODULE_DESCRIPTION("NVMe target FC loop transport driver");
16531654 MODULE_LICENSE("GPL v2");
drivers/nvme/target/loop.c+6−3
@@ -400,7 +400,7 @@ static void nvme_loop_shutdown_ctrl(struct nvme_loop_ctrl *ctrl) · 399 unmodified lines
400400 }
401401
402402 nvme_quiesce_admin_queue(&ctrl->ctrl);
403− if (ctrl->ctrl.state == NVME_CTRL_LIVE)
403+ if (nvme_ctrl_state(&ctrl->ctrl) == NVME_CTRL_LIVE)
404404 nvme_disable_ctrl(&ctrl->ctrl, true);
405405
406406 nvme_cancel_admin_tagset(&ctrl->ctrl);
@@ -434,8 +434,10 @@ static void nvme_loop_reset_ctrl_work(struct work_struct *work) · 27 unmodified lines
434434 nvme_loop_shutdown_ctrl(ctrl);
435435
436436 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
437− if (ctrl->ctrl.state != NVME_CTRL_DELETING &&
438− ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO)
437+ enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
438+
439+ if (state != NVME_CTRL_DELETING &&
440+ state != NVME_CTRL_DELETING_NOIO)
439441 /* state change failure for non-deleted ctrl? */
440442 WARN_ON_ONCE(1);
441443 return;
@@ -688,5 +690,6 @@ static void __exit nvme_loop_cleanup_module(void) · 246 unmodified lines
688690 module_init(nvme_loop_init_module);
689691 module_exit(nvme_loop_cleanup_module);
690692
693+MODULE_DESCRIPTION("NVMe target loop transport driver");
691694 MODULE_LICENSE("GPL v2");
692695 MODULE_ALIAS("nvmet-transport-254"); /* 254 == NVMF_TRTYPE_LOOP */
drivers/nvme/target/rdma.c+1−0
@@ -2104,5 +2104,6 @@ static void __exit nvmet_rdma_exit(void) · 2103 unmodified lines
21042104 module_init(nvmet_rdma_init);
21052105 module_exit(nvmet_rdma_exit);
21062106
2107+MODULE_DESCRIPTION("NVMe target RDMA transport driver");
21072108 MODULE_LICENSE("GPL v2");
21082109 MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */
drivers/nvme/target/tcp.c+2−0
@@ -2216,10 +2216,12 @@ static void __exit nvmet_tcp_exit(void) · 2215 unmodified lines
22162216 flush_workqueue(nvmet_wq);
22172217
22182218 destroy_workqueue(nvmet_tcp_wq);
2219+ ida_destroy(&nvmet_tcp_queue_ida);
22192220 }
22202221
22212222 module_init(nvmet_tcp_init);
22222223 module_exit(nvmet_tcp_exit);
22232224
2225+MODULE_DESCRIPTION("NVMe target TCP transport driver");
22242226 MODULE_LICENSE("GPL v2");
22252227 MODULE_ALIAS("nvmet-transport-3"); /* 3 == NVMF_TRTYPE_TCP */
drivers/pci/bus.c+32−17
@@ -386,21 +386,8 @@ void pci_bus_add_devices(const struct pci_bus *bus) · 385 unmodified lines
386386 }
387387 EXPORT_SYMBOL(pci_bus_add_devices);
388388
389−/** pci_walk_bus - walk devices on/under bus, calling callback.
390− * @top bus whose devices should be walked
391− * @cb callback to be called for each device found
392− * @userdata arbitrary pointer to be passed to callback.
393− *
394− * Walk the given bus, including any bridged devices
395− * on buses under this bus. Call the provided callback
396− * on each device found.
397− *
398− * We check the return of @cb each time. If it returns anything
399− * other than 0, we break out.
400− *
401− */
402−void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
403− void *userdata)
389+static void __pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
390+ void *userdata, bool locked)
404391 {
405392 struct pci_dev *dev;
406393 struct pci_bus *bus;
@@ -408,7 +395,8 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), · 1 unmodified line
408395 int retval;
409396
410397 bus = top;
411− down_read(&pci_bus_sem);
398+ if (!locked)
399+ down_read(&pci_bus_sem);
412400 next = top->devices.next;
413401 for (;;) {
414402 if (next == &bus->devices) {
@@ -431,10 +419,37 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), · 16 unmodified lines
431419 if (retval)
432420 break;
433421 }
434− up_read(&pci_bus_sem);
422+ if (!locked)
423+ up_read(&pci_bus_sem);
424+}
425+
426+/**
427+ * pci_walk_bus - walk devices on/under bus, calling callback.
428+ * @top: bus whose devices should be walked
429+ * @cb: callback to be called for each device found
430+ * @userdata: arbitrary pointer to be passed to callback
431+ *
432+ * Walk the given bus, including any bridged devices
433+ * on buses under this bus. Call the provided callback
434+ * on each device found.
435+ *
436+ * We check the return of @cb each time. If it returns anything
437+ * other than 0, we break out.
438+ */
439+void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata)
440+{
441+ __pci_walk_bus(top, cb, userdata, false);
435442 }
436443 EXPORT_SYMBOL_GPL(pci_walk_bus);
437444
445+void pci_walk_bus_locked(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata)
446+{
447+ lockdep_assert_held(&pci_bus_sem);
448+
449+ __pci_walk_bus(top, cb, userdata, true);
450+}
451+EXPORT_SYMBOL_GPL(pci_walk_bus_locked);
452+
438453 struct pci_bus *pci_bus_get(struct pci_bus *bus)
439454 {
440455 if (bus)
drivers/pci/controller/dwc/pcie-designware-ep.c+6−4
@@ -6,6 +6,7 @@ · 5 unmodified lines
66 * Author: Kishon Vijay Abraham I <kishon@ti.com>
77 */
88
9+#include <linux/align.h>
910 #include <linux/bitfield.h>
1011 #include <linux/of.h>
1112 #include <linux/platform_device.h>
@@ -482,9 +483,10 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, · 470 unmodified lines
482483 reg = ep_func->msi_cap + PCI_MSI_DATA_32;
483484 msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg);
484485 }
485− aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1);
486− msg_addr = ((u64)msg_addr_upper) << 32 |
487− (msg_addr_lower & ~aligned_offset);
486+ msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower;
487+
488+ aligned_offset = msg_addr & (epc->mem->window.page_size - 1);
489+ msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);
488490 ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
489491 epc->mem->window.page_size);
490492 if (ret)
@@ -551,7 +553,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, · 60 unmodified lines
551553 }
552554
553555 aligned_offset = msg_addr & (epc->mem->window.page_size - 1);
554− msg_addr &= ~aligned_offset;
556+ msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);
555557 ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
556558 epc->mem->window.page_size);
557559 if (ret)
drivers/pci/controller/dwc/pcie-qcom.c+1−1
@@ -972,7 +972,7 @@ static int qcom_pcie_enable_aspm(struct pci_dev *pdev, void *userdata) · 971 unmodified lines
972972 * Downstream devices need to be in D0 state before enabling PCI PM
973973 * substates.
974974 */
975− pci_set_power_state(pdev, PCI_D0);
975+ pci_set_power_state_locked(pdev, PCI_D0);
976976 pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL);
977977
978978 return 0;
drivers/pci/pci.c+52−26
@@ -1354,6 +1354,7 @@ end: · 1353 unmodified lines
13541354 /**
13551355 * pci_set_full_power_state - Put a PCI device into D0 and update its state
13561356 * @dev: PCI device to power up
1357+ * @locked: whether pci_bus_sem is held
13571358 *
13581359 * Call pci_power_up() to put @dev into D0, read from its PCI_PM_CTRL register
13591360 * to confirm the state change, restore its BARs if they might be lost and
@@ -1363,7 +1364,7 @@ end: · 3 unmodified lines
13631364 * to D0, it is more efficient to use pci_power_up() directly instead of this
13641365 * function.
13651366 */
1366−static int pci_set_full_power_state(struct pci_dev *dev)
1367+static int pci_set_full_power_state(struct pci_dev *dev, bool locked)
13671368 {
13681369 u16 pmcsr;
13691370 int ret;
@@ -1399,7 +1400,7 @@ static int pci_set_full_power_state(struct pci_dev *dev) · 29 unmodified lines
13991400 }
14001401
14011402 if (dev->bus->self)
1402− pcie_aspm_pm_state_change(dev->bus->self);
1403+ pcie_aspm_pm_state_change(dev->bus->self, locked);
14031404
14041405 return 0;
14051406 }
@@ -1428,10 +1429,22 @@ void pci_bus_set_current_state(struct pci_bus *bus, pci_power_t state) · 22 unmodified lines
14281429 pci_walk_bus(bus, __pci_dev_set_current_state, &state);
14291430 }
14301431
1432+static void __pci_bus_set_current_state(struct pci_bus *bus, pci_power_t state, bool locked)
1433+{
1434+ if (!bus)
1435+ return;
1436+
1437+ if (locked)
1438+ pci_walk_bus_locked(bus, __pci_dev_set_current_state, &state);
1439+ else
1440+ pci_walk_bus(bus, __pci_dev_set_current_state, &state);
1441+}
1442+
14311443 /**
14321444 * pci_set_low_power_state - Put a PCI device into a low-power state.
14331445 * @dev: PCI device to handle.
14341446 * @state: PCI power state (D1, D2, D3hot) to put the device into.
1447+ * @locked: whether pci_bus_sem is held
14351448 *
14361449 * Use the device's PCI_PM_CTRL register to put it into a low-power state.
14371450 *
@@ -1442,7 +1455,7 @@ void pci_bus_set_current_state(struct pci_bus *bus, pci_power_t state) · 4 unmodified lines
14421455 * 0 if device already is in the requested state.
14431456 * 0 if device's power state has been successfully changed.
14441457 */
1445−static int pci_set_low_power_state(struct pci_dev *dev, pci_power_t state)
1458+static int pci_set_low_power_state(struct pci_dev *dev, pci_power_t state, bool locked)
14461459 {
14471460 u16 pmcsr;
14481461
@@ -1496,29 +1509,12 @@ static int pci_set_low_power_state(struct pci_dev *dev, pci_power_t state) · 47 unmodified lines
14961509 pci_power_name(state));
14971510
14981511 if (dev->bus->self)
1499− pcie_aspm_pm_state_change(dev->bus->self);
1512+ pcie_aspm_pm_state_change(dev->bus->self, locked);
15001513
15011514 return 0;
15021515 }
15031516
1504−/**
1505− * pci_set_power_state - Set the power state of a PCI device
1506− * @dev: PCI device to handle.
1507− * @state: PCI power state (D0, D1, D2, D3hot) to put the device into.
1508− *
1509− * Transition a device to a new power state, using the platform firmware and/or
1510− * the device's PCI PM registers.
1511− *
1512− * RETURN VALUE:
1513− * -EINVAL if the requested state is invalid.
1514− * -EIO if device does not support PCI PM or its PM capabilities register has a
1515− * wrong version, or device doesn't support the requested state.
1516− * 0 if the transition is to D1 or D2 but D1 and D2 are not supported.
1517− * 0 if device already is in the requested state.
1518− * 0 if the transition is to D3 but D3 is not supported.
1519− * 0 if device's power state has been successfully changed.
1520− */
1521−int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1517+static int __pci_set_power_state(struct pci_dev *dev, pci_power_t state, bool locked)
15221518 {
15231519 int error;
15241520
@@ -1542,7 +1538,7 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state) · 17 unmodified lines
15421538 return 0;
15431539
15441540 if (state == PCI_D0)
1545− return pci_set_full_power_state(dev);
1541+ return pci_set_full_power_state(dev, locked);
15461542
15471543 /*
15481544 * This device is quirked not to be put into D3, so don't put it in
@@ -1556,16 +1552,16 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state) · 7 unmodified lines
15561552 * To put the device in D3cold, put it into D3hot in the native
15571553 * way, then put it into D3cold using platform ops.
15581554 */
1559− error = pci_set_low_power_state(dev, PCI_D3hot);
1555+ error = pci_set_low_power_state(dev, PCI_D3hot, locked);
15601556
15611557 if (pci_platform_power_transition(dev, PCI_D3cold))
15621558 return error;
15631559
15641560 /* Powering off a bridge may power off the whole hierarchy */
15651561 if (dev->current_state == PCI_D3cold)
1566− pci_bus_set_current_state(dev->subordinate, PCI_D3cold);
1562+ __pci_bus_set_current_state(dev->subordinate, PCI_D3cold, locked);
15671563 } else {
1568− error = pci_set_low_power_state(dev, state);
1564+ error = pci_set_low_power_state(dev, state, locked);
15691565
15701566 if (pci_platform_power_transition(dev, state))
15711567 return error;
@@ -1573,8 +1569,38 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state) · 1 unmodified line
15731569
15741570 return 0;
15751571 }
1572+
1573+/**
1574+ * pci_set_power_state - Set the power state of a PCI device
1575+ * @dev: PCI device to handle.
1576+ * @state: PCI power state (D0, D1, D2, D3hot) to put the device into.
1577+ *
1578+ * Transition a device to a new power state, using the platform firmware and/or
1579+ * the device's PCI PM registers.
1580+ *
1581+ * RETURN VALUE:
1582+ * -EINVAL if the requested state is invalid.
1583+ * -EIO if device does not support PCI PM or its PM capabilities register has a
1584+ * wrong version, or device doesn't support the requested state.
1585+ * 0 if the transition is to D1 or D2 but D1 and D2 are not supported.
1586+ * 0 if device already is in the requested state.
1587+ * 0 if the transition is to D3 but D3 is not supported.
1588+ * 0 if device's power state has been successfully changed.
1589+ */
1590+int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1591+{
1592+ return __pci_set_power_state(dev, state, false);
1593+}
15761594 EXPORT_SYMBOL(pci_set_power_state);
15771595

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