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| @@ -502,15 +502,15 @@ struct drm_amdgpu_gem_op { · 501 unmodified lines | ||
| 502 | 502 | #define AMDGPU_VM_MTYPE_MASK (0xf << 5) |
| 503 | 503 | /* Default MTYPE. Pre-AI must use this. Recommended for newer ASICs. */ |
| 504 | 504 | #define AMDGPU_VM_MTYPE_DEFAULT (0 << 5) |
| 505 | −/* Use NC MTYPE instead of default MTYPE */ | |
| 505 | +/* Use Non Coherent MTYPE instead of default MTYPE */ | |
| 506 | 506 | #define AMDGPU_VM_MTYPE_NC (1 << 5) |
| 507 | −/* Use WC MTYPE instead of default MTYPE */ | |
| 507 | +/* Use Write Combine MTYPE instead of default MTYPE */ | |
| 508 | 508 | #define AMDGPU_VM_MTYPE_WC (2 << 5) |
| 509 | −/* Use CC MTYPE instead of default MTYPE */ | |
| 509 | +/* Use Cache Coherent MTYPE instead of default MTYPE */ | |
| 510 | 510 | #define AMDGPU_VM_MTYPE_CC (3 << 5) |
| 511 | −/* Use UC MTYPE instead of default MTYPE */ | |
| 511 | +/* Use UnCached MTYPE instead of default MTYPE */ | |
| 512 | 512 | #define AMDGPU_VM_MTYPE_UC (4 << 5) |
| 513 | −/* Use RW MTYPE instead of default MTYPE */ | |
| 513 | +/* Use Read Write MTYPE instead of default MTYPE */ | |
| 514 | 514 | #define AMDGPU_VM_MTYPE_RW (5 << 5) |
| 515 | 515 | |
| 516 | 516 | struct drm_amdgpu_gem_va { |