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perf/x86/intel: Support Haswell/v4 LBR format

Haswell has two additional LBR from flags for TSX: in_tx and abort_tx, implemented as a new "v4" version of the LBR format. Handle those in and adjust the sign extension code to still correctly extend. The flags are exported similarly in the LBR record to the existing misprediction flag

Andi Kleen committed 13 years ago

Commit 135c5611 parent 72db5593 files · +61 −7Browse files

Showing the changes to include/uapi (1 of 3 files). Show all

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include/uapi/linux/perf_event.h+4−1
@@ -157,8 +157,11 @@ enum perf_branch_sample_type { · 156 unmodified lines
157157 PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */
158158 PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */
159159 PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */
160+ PERF_SAMPLE_BRANCH_ABORT_TX = 1U << 7, /* transaction aborts */
161+ PERF_SAMPLE_BRANCH_IN_TX = 1U << 8, /* in transaction */
162+ PERF_SAMPLE_BRANCH_NO_TX = 1U << 9, /* not in transaction */
160163
161− PERF_SAMPLE_BRANCH_MAX = 1U << 7, /* non-ABI */
164+ PERF_SAMPLE_BRANCH_MAX = 1U << 10, /* non-ABI */
162165 };
163166
164167 #define PERF_SAMPLE_BRANCH_PLM_ALL \

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