Pull arm64 and cross-arch updates from Catalin Marinas: "Here's a slightly wider-spread set of updates for 5.9. Going outside the usual arch/arm64/ area is the removal of read_barrier_depends() series from Will and the MSI/IOMMU ID translation series from Lorenzo. The notable arm64 updates include ARMv8.4 TLBI range operations and translation level hint, time namespace support, and perf. Summary: - Removal of the tremendously unpopular read_barrier_depends() barrier, which is a NOP on all architectures apart from Alpha, in favour of allowing architectures to override READ_ONCE() and do whatever dance they need to do to ensure address dependencies provide LOAD -> LOAD/STORE ordering. This work also offers a potential solution if compilers are shown to convert LOAD -> LOAD address dependencies into control dependencies (e.g. under LTO), as weakly ordered architectures will effectively be able to upgrade READ_ONCE() to smp_load_acquire(). The latter case is not used yet, but will be discussed further at LPC. - Make the MSI/IOMMU input/output ID translation PCI agnostic, augment the MSI/IOMMU ACPI/OF ID mapping APIs to accept an input ID bus-specific parameter and apply the resulting changes to the device ID space provided by the Freescale FSL bus. - arm64 support for TLBI range operations and translation table level hints (part of the ARMv8.4 architecture version). - Time namespace support for arm64. - Export the virtual and physical address sizes in vmcoreinfo for makedumpfile and crash utilities. - CPU feature handling cleanups and checks for programmer errors (overlapping bit-fields). - ACPI updates for arm64: disallow AML accesses to EFI code regions and kernel memory. - perf updates for arm64. - Miscellaneous fixes and cleanups, most notably PLT counting optimisation for module loading, recordmcount fix to ignore relocations other than R_AARCH64_CALL26, CMA areas reserved for gigantic pages on 16K and 64K configurations. - Trivial typos, duplicate words" Link: http://lkml.kernel.org/r/20200710165203.31284-1-will@kernel.org Link: http://lkml.kernel.org/r/20200619082013.13661-1-lorenzo.pieralisi@arm.com * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (82 commits) arm64: use IRQ_STACK_SIZE instead of THREAD_SIZE for irq stack arm64/mm: save memory access in check_and_switch_context() fast switch path arm64: sigcontext.h: delete duplicated word arm64: ptrace.h: delete duplicated word arm64: pgtable-hwdef.h: delete duplicated words bus: fsl-mc: Add ACPI support for fsl-mc bus/fsl-mc: Refactor the MSI domain creation in the DPRC driver of/irq: Make of_msi_map_rid() PCI bus agnostic of/irq: make of_msi_map_get_device_domain() bus agnostic dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus of/device: Add input id to of_dma_configure() of/iommu: Make of_map_rid() PCI agnostic ACPI/IORT: Add an input ID to acpi_dma_configure() ACPI/IORT: Remove useless PCI bus walk ACPI/IORT: Make iort_msi_map_rid() PCI agnostic ACPI/IORT: Make iort_get_device_domain IRQ domain agnostic ACPI/IORT: Make iort_match_node_callback walk the ACPI namespace for NC arm64: enable time namespace support arm64/vdso: Restrict splitting VVAR VMA arm64/vdso: Handle faults on timens page ...
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| @@ -5903,8 +5903,7 @@ sub process { · 5902 unmodified lines | |||
| 5903 | my $barriers = qr{ | 5903 | my $barriers = qr{ |
| 5904 | mb| | 5904 | mb| |
| 5905 | rmb| | 5905 | rmb| |
| 5906 | wmb| | 5906 | wmb |
| 5907 | read_barrier_depends | ||
| 5908 | }x; | 5907 | }x; |
| 5909 | my $barrier_stems = qr{ | 5908 | my $barrier_stems = qr{ |
| 5910 | mb__before_atomic| | 5909 | mb__before_atomic| |
| @@ -5953,12 +5952,6 @@ sub process { · 42 unmodified lines | |||
| 5953 | } | 5952 | } |
| 5954 | } | 5953 | } |
| 5955 | 5954 | ||
| 5956 | # check for smp_read_barrier_depends and read_barrier_depends | ||
| 5957 | if (!$file && $line =~ /\b(smp_|)read_barrier_depends\s*\(/) { | ||
| 5958 | WARN("READ_BARRIER_DEPENDS", | ||
| 5959 | "$1read_barrier_depends should only be used in READ_ONCE or DEC Alpha code\n" . $herecurr); | ||
| 5960 | } | ||
| 5961 | |||
| 5962 | # check of hardware specific defines | 5955 | # check of hardware specific defines |
| 5963 | if ($line =~ m@^.\s*\#\s*if.*\b(__i386__|__powerpc64__|__sun__|__s390x__)\b@ && $realfile !~ m@include/asm-@) { | 5956 | if ($line =~ m@^.\s*\#\s*if.*\b(__i386__|__powerpc64__|__sun__|__s390x__)\b@ && $realfile !~ m@include/asm-@) { |
| 5964 | CHK("ARCH_DEFINES", | 5957 | CHK("ARCH_DEFINES", |
| @@ -434,6 +434,11 @@ static int arm_is_fake_mcount(Elf32_Rel const *rp) · 433 unmodified lines | |||
| 434 | return 1; | 434 | return 1; |
| 435 | } | 435 | } |
| 436 | 436 | ||
| 437 | static int arm64_is_fake_mcount(Elf64_Rel const *rp) | ||
| 438 | { | ||
| 439 | return ELF64_R_TYPE(w(rp->r_info)) != R_AARCH64_CALL26; | ||
| 440 | } | ||
| 441 | |||
| 437 | /* 64-bit EM_MIPS has weird ELF64_Rela.r_info. | 442 | /* 64-bit EM_MIPS has weird ELF64_Rela.r_info. |
| 438 | * http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf | 443 | * http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf |
| 439 | * We interpret Table 29 Relocation Operation (Elf64_Rel, Elf64_Rela) [p.40] | 444 | * We interpret Table 29 Relocation Operation (Elf64_Rel, Elf64_Rela) [p.40] |
| @@ -547,6 +552,7 @@ static int do_file(char const *const fname) · 107 unmodified lines | |||
| 547 | make_nop = make_nop_arm64; | 552 | make_nop = make_nop_arm64; |
| 548 | rel_type_nop = R_AARCH64_NONE; | 553 | rel_type_nop = R_AARCH64_NONE; |
| 549 | ideal_nop = ideal_nop4_arm64; | 554 | ideal_nop = ideal_nop4_arm64; |
| 555 | is_fake_mcount64 = arm64_is_fake_mcount; | ||
| 550 | break; | 556 | break; |
| 551 | case EM_IA_64: reltype = R_IA64_IMM64; break; | 557 | case EM_IA_64: reltype = R_IA64_IMM64; break; |
| 552 | case EM_MIPS: /* reltype: e_class */ break; | 558 | case EM_MIPS: /* reltype: e_class */ break; |