Pull arm64 and cross-arch updates from Catalin Marinas: "Here's a slightly wider-spread set of updates for 5.9. Going outside the usual arch/arm64/ area is the removal of read_barrier_depends() series from Will and the MSI/IOMMU ID translation series from Lorenzo. The notable arm64 updates include ARMv8.4 TLBI range operations and translation level hint, time namespace support, and perf. Summary: - Removal of the tremendously unpopular read_barrier_depends() barrier, which is a NOP on all architectures apart from Alpha, in favour of allowing architectures to override READ_ONCE() and do whatever dance they need to do to ensure address dependencies provide LOAD -> LOAD/STORE ordering. This work also offers a potential solution if compilers are shown to convert LOAD -> LOAD address dependencies into control dependencies (e.g. under LTO), as weakly ordered architectures will effectively be able to upgrade READ_ONCE() to smp_load_acquire(). The latter case is not used yet, but will be discussed further at LPC. - Make the MSI/IOMMU input/output ID translation PCI agnostic, augment the MSI/IOMMU ACPI/OF ID mapping APIs to accept an input ID bus-specific parameter and apply the resulting changes to the device ID space provided by the Freescale FSL bus. - arm64 support for TLBI range operations and translation table level hints (part of the ARMv8.4 architecture version). - Time namespace support for arm64. - Export the virtual and physical address sizes in vmcoreinfo for makedumpfile and crash utilities. - CPU feature handling cleanups and checks for programmer errors (overlapping bit-fields). - ACPI updates for arm64: disallow AML accesses to EFI code regions and kernel memory. - perf updates for arm64. - Miscellaneous fixes and cleanups, most notably PLT counting optimisation for module loading, recordmcount fix to ignore relocations other than R_AARCH64_CALL26, CMA areas reserved for gigantic pages on 16K and 64K configurations. - Trivial typos, duplicate words" Link: http://lkml.kernel.org/r/20200710165203.31284-1-will@kernel.org Link: http://lkml.kernel.org/r/20200619082013.13661-1-lorenzo.pieralisi@arm.com * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (82 commits) arm64: use IRQ_STACK_SIZE instead of THREAD_SIZE for irq stack arm64/mm: save memory access in check_and_switch_context() fast switch path arm64: sigcontext.h: delete duplicated word arm64: ptrace.h: delete duplicated word arm64: pgtable-hwdef.h: delete duplicated words bus: fsl-mc: Add ACPI support for fsl-mc bus/fsl-mc: Refactor the MSI domain creation in the DPRC driver of/irq: Make of_msi_map_rid() PCI bus agnostic of/irq: make of_msi_map_get_device_domain() bus agnostic dt-bindings: arm: fsl: Add msi-map device-tree binding for fsl-mc bus of/device: Add input id to of_dma_configure() of/iommu: Make of_map_rid() PCI agnostic ACPI/IORT: Add an input ID to acpi_dma_configure() ACPI/IORT: Remove useless PCI bus walk ACPI/IORT: Make iort_msi_map_rid() PCI agnostic ACPI/IORT: Make iort_get_device_domain IRQ domain agnostic ACPI/IORT: Make iort_match_node_callback walk the ACPI namespace for NC arm64: enable time namespace support arm64/vdso: Restrict splitting VVAR VMA arm64/vdso: Handle faults on timens page ...
Showing the changes to kernel (2 of 98 files). Show all
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| @@ -413,6 +413,7 @@ static int __init crash_save_vmcoreinfo_init(void) · 412 unmodified lines | ||
| 413 | 413 | VMCOREINFO_LENGTH(mem_section, NR_SECTION_ROOTS); |
| 414 | 414 | VMCOREINFO_STRUCT_SIZE(mem_section); |
| 415 | 415 | VMCOREINFO_OFFSET(mem_section, section_mem_map); |
| 416 | + VMCOREINFO_NUMBER(MAX_PHYSMEM_BITS); | |
| 416 | 417 | #endif |
| 417 | 418 | VMCOREINFO_STRUCT_SIZE(page); |
| 418 | 419 | VMCOREINFO_STRUCT_SIZE(pglist_data); |
| @@ -19,31 +19,6 @@ · 18 unmodified lines | ||
| 19 | 19 | |
| 20 | 20 | #include "timekeeping.h" |
| 21 | 21 | |
| 22 | −/** | |
| 23 | − * struct clock_read_data - data required to read from sched_clock() | |
| 24 | − * | |
| 25 | − * @epoch_ns: sched_clock() value at last update | |
| 26 | − * @epoch_cyc: Clock cycle value at last update. | |
| 27 | − * @sched_clock_mask: Bitmask for two's complement subtraction of non 64bit | |
| 28 | − * clocks. | |
| 29 | − * @read_sched_clock: Current clock source (or dummy source when suspended). | |
| 30 | − * @mult: Multipler for scaled math conversion. | |
| 31 | − * @shift: Shift value for scaled math conversion. | |
| 32 | − * | |
| 33 | − * Care must be taken when updating this structure; it is read by | |
| 34 | − * some very hot code paths. It occupies <=40 bytes and, when combined | |
| 35 | − * with the seqcount used to synchronize access, comfortably fits into | |
| 36 | − * a 64 byte cache line. | |
| 37 | − */ | |
| 38 | −struct clock_read_data { | |
| 39 | − u64 epoch_ns; | |
| 40 | − u64 epoch_cyc; | |
| 41 | − u64 sched_clock_mask; | |
| 42 | − u64 (*read_sched_clock)(void); | |
| 43 | − u32 mult; | |
| 44 | − u32 shift; | |
| 45 | −}; | |
| 46 | − | |
| 47 | 22 | /** |
| 48 | 23 | * struct clock_data - all data needed for sched_clock() (including |
| 49 | 24 | * registration of a new clock source) |
| @@ -93,6 +68,17 @@ static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift) · 43 unmodified lines | ||
| 93 | 68 | return (cyc * mult) >> shift; |
| 94 | 69 | } |
| 95 | 70 | |
| 71 | +struct clock_read_data *sched_clock_read_begin(unsigned int *seq) | |
| 72 | +{ | |
| 73 | + *seq = raw_read_seqcount_latch(&cd.seq); | |
| 74 | + return cd.read_data + (*seq & 1); | |
| 75 | +} | |
| 76 | + | |
| 77 | +int sched_clock_read_retry(unsigned int seq) | |
| 78 | +{ | |
| 79 | + return read_seqcount_retry(&cd.seq, seq); | |
| 80 | +} | |
| 81 | + | |
| 96 | 82 | unsigned long long notrace sched_clock(void) |
| 97 | 83 | { |
| 98 | 84 | u64 cyc, res; |
| @@ -100,13 +86,12 @@ unsigned long long notrace sched_clock(void) · 1 unmodified line | ||
| 100 | 86 | struct clock_read_data *rd; |
| 101 | 87 | |
| 102 | 88 | do { |
| 103 | − seq = raw_read_seqcount(&cd.seq); | |
| 104 | − rd = cd.read_data + (seq & 1); | |
| 89 | + rd = sched_clock_read_begin(&seq); | |
| 105 | 90 | |
| 106 | 91 | cyc = (rd->read_sched_clock() - rd->epoch_cyc) & |
| 107 | 92 | rd->sched_clock_mask; |
| 108 | 93 | res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift); |
| 109 | − } while (read_seqcount_retry(&cd.seq, seq)); | |
| 94 | + } while (sched_clock_read_retry(seq)); | |
| 110 | 95 | |
| 111 | 96 | return res; |
| 112 | 97 | } |