History

phy: rename struct omap_control_usb to struct omap_control_phy

Rename struct omap_control_usb to struct omap_control_phy since it can be used to control PHY of USB, SATA and PCIE. Also move the driver and include files under *phy* and made the corresponding changes in the users of phy-omap-control.

Kishon Vijay Abraham I committed 12 years ago

Commit 14da6991 parent db68e809 files · +123 −122Browse files

Showing the changes to include/linux/phy (1 of 9 files). Show all

Unified · Split

include/linux/phy/omap_control_phy.h+89−0
@@ -0,0 +1,89 @@
1+/*
2+ * omap_control_phy.h - Header file for the PHY part of control module.
3+ *
4+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
5+ * This program is free software; you can redistribute it and/or modify
6+ * it under the terms of the GNU General Public License as published by
7+ * the Free Software Foundation; either version 2 of the License, or
8+ * (at your option) any later version.
9+ *
10+ * Author: Kishon Vijay Abraham I <kishon@ti.com>
11+ *
12+ * This program is distributed in the hope that it will be useful,
13+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
14+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15+ * GNU General Public License for more details.
16+ *
17+ */
18+
19+#ifndef __OMAP_CONTROL_PHY_H__
20+#define __OMAP_CONTROL_PHY_H__
21+
22+enum omap_control_phy_type {
23+ OMAP_CTRL_TYPE_OTGHS = 1, /* Mailbox OTGHS_CONTROL */
24+ OMAP_CTRL_TYPE_USB2, /* USB2_PHY, power down in CONTROL_DEV_CONF */
25+ OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & seperate Rx/Tx power */
26+ OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */
27+ OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */
28+};
29+
30+struct omap_control_phy {
31+ struct device *dev;
32+
33+ u32 __iomem *otghs_control;
34+ u32 __iomem *power;
35+ u32 __iomem *power_aux;
36+
37+ struct clk *sys_clk;
38+
39+ enum omap_control_phy_type type;
40+};
41+
42+enum omap_control_usb_mode {
43+ USB_MODE_UNDEFINED = 0,
44+ USB_MODE_HOST,
45+ USB_MODE_DEVICE,
46+ USB_MODE_DISCONNECT,
47+};
48+
49+#define OMAP_CTRL_DEV_PHY_PD BIT(0)
50+
51+#define OMAP_CTRL_DEV_AVALID BIT(0)
52+#define OMAP_CTRL_DEV_BVALID BIT(1)
53+#define OMAP_CTRL_DEV_VBUSVALID BIT(2)
54+#define OMAP_CTRL_DEV_SESSEND BIT(3)
55+#define OMAP_CTRL_DEV_IDDIG BIT(4)
56+
57+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK 0x003FC000
58+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 0xE
59+
60+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC00000
61+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT 0x16
62+
63+#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON 0x3
64+#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF 0x0
65+
66+#define OMAP_CTRL_USB2_PHY_PD BIT(28)
67+
68+#define AM437X_CTRL_USB2_PHY_PD BIT(0)
69+#define AM437X_CTRL_USB2_OTG_PD BIT(1)
70+#define AM437X_CTRL_USB2_OTGVDET_EN BIT(19)
71+#define AM437X_CTRL_USB2_OTGSESSEND_EN BIT(20)
72+
73+#if IS_ENABLED(CONFIG_OMAP_CONTROL_PHY)
74+void omap_control_phy_power(struct device *dev, int on);
75+void omap_control_usb_set_mode(struct device *dev,
76+ enum omap_control_usb_mode mode);
77+#else
78+
79+static inline void omap_control_phy_power(struct device *dev, int on)
80+{
81+}
82+
83+static inline void omap_control_usb_set_mode(struct device *dev,
84+ enum omap_control_usb_mode mode)
85+{
86+}
87+#endif
88+
89+#endif /* __OMAP_CONTROL_PHY_H__ */