RDMA/mlx5: Allow creating RAW ethernet QP with loopback support

Expose two new flags: MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC Those flags can be used at creation time in order to allow a QP to be able to receive loopback traffic (unicast and multicast). We store the state in the QP to be used on the destroy path to indicate with which flags the QP was created with.

Mark Bloch committed 8 years ago

Commit 175edba1 parent a560f1d3 files · +52 −14Browse files

Unified · Split

3 files

drivers/infiniband/hw/mlx5/mlx5_ib.h +1 −1
drivers/infiniband/hw/mlx5/qp.c +49 −13
include/uapi/rdma/mlx5-abi.h +2 −0

drivers/infiniband/hw/mlx5/mlx5_ib.h+1−1

@@ -428,7 +428,7 @@ struct mlx5_ib_qp { · 427 unmodified lines
428	struct list_head cq_send_list;	428	struct list_head cq_send_list;
429	struct mlx5_rate_limit rl;	429	struct mlx5_rate_limit rl;
430	u32 underlay_qpn;	430	u32 underlay_qpn;
431	bool tunnel_offload_en;	431	u32 flags_en;
432	/* storage for qp sub type when core qp type is IB_QPT_DRIVER */	432	/* storage for qp sub type when core qp type is IB_QPT_DRIVER */
433	enum ib_qp_type qp_sub_type;	433	enum ib_qp_type qp_sub_type;
434	};	434	};

drivers/infiniband/hw/mlx5/qp.c+49−13

@@ -1258,8 +1258,9 @@ static bool tunnel_offload_supported(struct mlx5_core_dev *dev) · 1257 unmodified lines
1258		1258
1259	static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev,	1259	static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
1260	struct mlx5_ib_rq *rq, u32 tdn,	1260	struct mlx5_ib_rq *rq, u32 tdn,
1261	bool tunnel_offload_en)	1261	u32 *qp_flags_en)
1262	{	1262	{
		1263	u8 lb_flag = 0;
1263	u32 *in;	1264	u32 *in;
1264	void *tirc;	1265	void *tirc;
1265	int inlen;	1266	int inlen;
@@ -1274,12 +1275,21 @@ static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, · 8 unmodified lines
1274	MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);	1275	MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
1275	MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn);	1276	MLX5_SET(tirc, tirc, inline_rqn, rq->base.mqp.qpn);
1276	MLX5_SET(tirc, tirc, transport_domain, tdn);	1277	MLX5_SET(tirc, tirc, transport_domain, tdn);
1277	if (tunnel_offload_en)	1278	if (*qp_flags_en & MLX5_QP_FLAG_TUNNEL_OFFLOADS)
1278	MLX5_SET(tirc, tirc, tunneled_offload_en, 1);	1279	MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
1279		1280
1280	if (dev->rep)	1281	if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC)
1281	MLX5_SET(tirc, tirc, self_lb_block,	1282	lb_flag \|= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
1282	MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST);	1283
		1284	if (*qp_flags_en & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)
		1285	lb_flag \|= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
		1286
		1287	if (dev->rep) {
		1288	lb_flag \|= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
		1289	*qp_flags_en \|= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
		1290	}
		1291
		1292	MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
1283		1293
1284	err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn);	1294	err = mlx5_core_create_tir(dev->mdev, in, inlen, &rq->tirn);
1285		1295
@@ -1332,8 +1342,7 @@ static int create_raw_packet_qp(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 46 unmodified lines
1332	goto err_destroy_sq;	1342	goto err_destroy_sq;
1333		1343
1334		1344
1335	err = create_raw_packet_qp_tir(dev, rq, tdn,	1345	err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en);
1336	qp->tunnel_offload_en);
1337	if (err)	1346	if (err)
1338	goto err_destroy_rq;	1347	goto err_destroy_rq;
1339	}	1348	}
@@ -1410,6 +1419,7 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 70 unmodified lines
1410	u32 tdn = mucontext->tdn;	1419	u32 tdn = mucontext->tdn;
1411	struct mlx5_ib_create_qp_rss ucmd = {};	1420	struct mlx5_ib_create_qp_rss ucmd = {};
1412	size_t required_cmd_sz;	1421	size_t required_cmd_sz;
		1422	u8 lb_flag = 0;
1413		1423
1414	if (init_attr->qp_type != IB_QPT_RAW_PACKET)	1424	if (init_attr->qp_type != IB_QPT_RAW_PACKET)
1415	return -EOPNOTSUPP;	1425	return -EOPNOTSUPP;
@@ -1444,7 +1454,9 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 28 unmodified lines
1444	return -EOPNOTSUPP;	1454	return -EOPNOTSUPP;
1445	}	1455	}
1446		1456
1447	if (ucmd.flags & ~MLX5_QP_FLAG_TUNNEL_OFFLOADS) {	1457	if (ucmd.flags & ~(MLX5_QP_FLAG_TUNNEL_OFFLOADS \|
		1458	MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC \|
		1459	MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC)) {
1448	mlx5_ib_dbg(dev, "invalid flags\n");	1460	mlx5_ib_dbg(dev, "invalid flags\n");
1449	return -EOPNOTSUPP;	1461	return -EOPNOTSUPP;
1450	}	1462	}
@@ -1461,6 +1473,16 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 10 unmodified lines
1461	return -EOPNOTSUPP;	1473	return -EOPNOTSUPP;
1462	}	1474	}
1463		1475
		1476	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC \|\| dev->rep) {
		1477	lb_flag \|= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
		1478	qp->flags_en \|= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
		1479	}
		1480
		1481	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) {
		1482	lb_flag \|= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
		1483	qp->flags_en \|= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC;
		1484	}
		1485
1464	err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));	1486	err = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));
1465	if (err) {	1487	if (err) {
1466	mlx5_ib_dbg(dev, "copy failed\n");	1488	mlx5_ib_dbg(dev, "copy failed\n");
@@ -1484,6 +1506,8 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 17 unmodified lines
1484	if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)	1506	if (ucmd.flags & MLX5_QP_FLAG_TUNNEL_OFFLOADS)
1485	MLX5_SET(tirc, tirc, tunneled_offload_en, 1);	1507	MLX5_SET(tirc, tirc, tunneled_offload_en, 1);
1486		1508
		1509	MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
		1510
1487	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER)	1511	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_INNER)
1488	hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner);	1512	hfso = MLX5_ADDR_OF(tirc, tirc, rx_hash_field_selector_inner);
1489	else	1513	else
@@ -1580,10 +1604,6 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev dev, struct mlx5_ib_qp qp, · 90 unmodified lines
1580	MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields);	1604	MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields);
1581		1605
1582	create_tir:	1606	create_tir:
1583	if (dev->rep)
1584	MLX5_SET(tirc, tirc, self_lb_block,
1585	MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST);
1586
1587	err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn);	1607	err = mlx5_core_create_tir(dev->mdev, in, inlen, &qp->rss_qp.tirn);
1588		1608
1589	if (err)	1609	if (err)
@@ -1710,7 +1730,23 @@ static int create_qp_common(struct mlx5_ib_dev dev, struct ib_pd pd, · 120 unmodified lines
1710	mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n");	1730	mlx5_ib_dbg(dev, "Tunnel offload isn't supported\n");
1711	return -EOPNOTSUPP;	1731	return -EOPNOTSUPP;
1712	}	1732	}
1713	qp->tunnel_offload_en = true;	1733	qp->flags_en \|= MLX5_QP_FLAG_TUNNEL_OFFLOADS;
		1734	}
		1735
		1736	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC) {
		1737	if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
		1738	mlx5_ib_dbg(dev, "Self-LB UC isn't supported\n");
		1739	return -EOPNOTSUPP;
		1740	}
		1741	qp->flags_en \|= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC;
		1742	}
		1743
		1744	if (ucmd.flags & MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC) {
		1745	if (init_attr->qp_type != IB_QPT_RAW_PACKET) {
		1746	mlx5_ib_dbg(dev, "Self-LB UM isn't supported\n");
		1747	return -EOPNOTSUPP;
		1748	}
		1749	qp->flags_en \|= MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC;
1714	}	1750	}
1715		1751
1716	if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) {	1752	if (init_attr->create_flags & IB_QP_CREATE_SOURCE_QPN) {

include/uapi/rdma/mlx5-abi.h+2−0

@@ -45,6 +45,8 @@ enum { · 44 unmodified lines
45	MLX5_QP_FLAG_BFREG_INDEX = 1 << 3,	45	MLX5_QP_FLAG_BFREG_INDEX = 1 << 3,
46	MLX5_QP_FLAG_TYPE_DCT = 1 << 4,	46	MLX5_QP_FLAG_TYPE_DCT = 1 << 4,
47	MLX5_QP_FLAG_TYPE_DCI = 1 << 5,	47	MLX5_QP_FLAG_TYPE_DCI = 1 << 5,
		48	MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC = 1 << 6,
		49	MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC = 1 << 7,
48	};	50	};
49		51
50	enum {	52	enum {

RDMA/mlx5: Allow creating RAW ethernet QP with loopback support

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