Merge tag 'char-misc-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH: "Here is the large set of char and misc and other driver subsystem patches for 5.9-rc1. Lots of new driver submissions in here, and cleanups and features for existing drivers. Highlights are: - habanalabs driver updates - coresight driver updates - nvmem driver updates - huge number of "W=1" build warning cleanups from Lee Jones - dyndbg updates - virtbox driver fixes and updates - soundwire driver updates - mei driver updates - phy driver updates - fpga driver updates - lots of smaller individual misc/char driver cleanups and fixes Full details are in the shortlog. All of these have been in linux-next with no reported issues" * tag 'char-misc-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (322 commits) habanalabs: remove unused but set variable 'ctx_asid' nvmem: qcom-spmi-sdam: Enable multiple devices dt-bindings: nvmem: SID: add binding for A100's SID controller nvmem: update Kconfig description nvmem: qfprom: Add fuse blowing support dt-bindings: nvmem: Add properties needed for blowing fuses dt-bindings: nvmem: qfprom: Convert to yaml nvmem: qfprom: use NVMEM_DEVID_AUTO for multiple instances nvmem: core: add support to auto devid nvmem: core: Add nvmem_cell_read_u8() nvmem: core: Grammar fixes for help text nvmem: sc27xx: add sc2730 efuse support nvmem: Enforce nvmem stride in the sysfs interface MAINTAINERS: Add git tree for NVMEM FRAMEWORK nvmem: sprd: Fix return value of sprd_efuse_probe() drivers: android: Fix the SPDX comment style drivers: android: Fix a variable declaration coding style issue drivers: android: Remove braces for a single statement if-else block drivers: android: Remove the use of else after return drivers: android: Fix a variable declaration coding style issue ...

Linus Torvalds committed 6 years ago

Commit 1785d112 parents 060a72a 22362aa291 files · +10369 −4128Browse files

Showing the changes to include/linux (16 of 291 files). Show all

Unified · Split

16 files

include/linux/coresight.h +5 −1
include/linux/dynamic_debug.h +2 −2
include/linux/firmware/intel/stratix10-smc.h +43 −0
include/linux/firmware/intel/stratix10-svc-client.h +12 −5
include/linux/fsl/mc.h +31 −1
include/linux/interconnect-provider.h +12 −4
include/linux/mic_bus.h +1 −1
include/linux/mod_devicetable.h +2 −0
include/linux/nvmem-consumer.h +1 −0
include/linux/nvmem-provider.h +3 −0
include/linux/rtsx_pci.h +11 −22
include/linux/soundwire/sdw.h +19 −14
include/linux/soundwire/sdw_intel.h +2 −0
include/linux/soundwire/sdw_registers.h +116 −1
include/linux/vbox_utils.h +1 −0
include/linux/vmw_vmci_defs.h +1 −1

include/linux/coresight.h+5−1

@@ -48,6 +48,7 @@ enum coresight_dev_subtype_sink { · 47 unmodified lines
48	48	CORESIGHT_DEV_SUBTYPE_SINK_NONE,
49	49	CORESIGHT_DEV_SUBTYPE_SINK_PORT,
50	50	CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
	51	+ CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM,
51	52	};
52	53
53	54	enum coresight_dev_subtype_link {
@@ -179,8 +180,10 @@ struct coresight_sysfs_link { · 125 unmodified lines
179	180	* @enable: 'true' if component is currently part of an active path.
180	181	* @activated: 'true' only if a _sink_ has been activated. A sink can be
181	182	* activated but not yet enabled. Enabling for a _sink_
182		− * appens when a source has been selected for that it.
	183	+ * happens when a source has been selected and a path is enabled
	184	+ * from source to that sink.
183	185	* @ea: Device attribute for sink representation under PMU directory.
	186	+ * @def_sink: cached reference to default sink found for this device.
184	187	* @ect_dev: Associated cross trigger device. Not part of the trace data
185	188	* path or connections.
186	189	* @nr_links: number of sysfs links created to other components from this
@@ -199,6 +202,7 @@ struct coresight_device { · 12 unmodified lines
199	202	/* sink specific fields */
200	203	bool activated; /* true only if a sink is part of a path */
201	204	struct dev_ext_attribute *ea;
	205	+ struct coresight_device *def_sink;
202	206	/* cross trigger handling */
203	207	struct coresight_device *ect_dev;
204	208	/* sysfs links between components */

include/linux/dynamic_debug.h+2−2

@@ -80,7 +80,7 @@ void __dynamic_ibdev_dbg(struct _ddebug *descriptor, · 79 unmodified lines
80	80
81	81	#define DEFINE_DYNAMIC_DEBUG_METADATA(name, fmt) \
82	82	static struct _ddebug __aligned(8) \
83		− __attribute__((section("__verbose"))) name = { \
	83	+ __section(__dyndbg) name = { \
84	84	.modname = KBUILD_MODNAME, \
85	85	.function = __func__, \
86	86	.filename = __FILE__, \
@@ -133,7 +133,7 @@ void __dynamic_ibdev_dbg(struct _ddebug *descriptor, · 46 unmodified lines
133	133
134	134	/*
135	135	* "Factory macro" for generating a call to func, guarded by a
136		− * DYNAMIC_DEBUG_BRANCH. The dynamic debug decriptor will be
	136	+ * DYNAMIC_DEBUG_BRANCH. The dynamic debug descriptor will be
137	137	* initialized using the fmt argument. The function will be called with
138	138	* the address of the descriptor as first argument, followed by all
139	139	* the varargs. Note that fmt is repeated in invocations of this

include/linux/firmware/intel/stratix10-smc.h+43−0

@@ -361,3 +361,46 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE) · 360 unmodified lines
361	361	#define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
362	362	#define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
363	363	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)
	364	+
	365	+/**
	366	+ * Request INTEL_SIP_SMC_RSU_DCMF_VERSION
	367	+ *
	368	+ * Sync call used by service driver at EL1 to query DCMF (Decision
	369	+ * Configuration Management Firmware) version from FW
	370	+ *
	371	+ * Call register usage:
	372	+ * a0 INTEL_SIP_SMC_RSU_DCMF_VERSION
	373	+ * a1-7 not used
	374	+ *
	375	+ * Return status
	376	+ * a0 INTEL_SIP_SMC_STATUS_OK
	377	+ * a1 dcmf1 \| dcmf0
	378	+ * a2 dcmf3 \| dcmf2
	379	+ *
	380	+ * Or
	381	+ *
	382	+ * a0 INTEL_SIP_SMC_RSU_ERROR
	383	+ */
	384	+#define INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION 16
	385	+#define INTEL_SIP_SMC_RSU_DCMF_VERSION \
	386	+ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION)
	387	+
	388	+/**
	389	+ * Request INTEL_SIP_SMC_RSU_MAX_RETRY
	390	+ *
	391	+ * Sync call used by service driver at EL1 to query max retry value from FW
	392	+ *
	393	+ * Call register usage:
	394	+ * a0 INTEL_SIP_SMC_RSU_MAX_RETRY
	395	+ * a1-7 not used
	396	+ *
	397	+ * Return status
	398	+ * a0 INTEL_SIP_SMC_STATUS_OK
	399	+ * a1 max retry value
	400	+ *
	401	+ * Or
	402	+ * a0 INTEL_SIP_SMC_RSU_ERROR
	403	+ */
	404	+#define INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY 18
	405	+#define INTEL_SIP_SMC_RSU_MAX_RETRY \
	406	+ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY)

include/linux/firmware/intel/stratix10-svc-client.h+12−5

@@ -54,18 +54,17 @@ · 53 unmodified lines
54	54	* Flag bit for COMMAND_RECONFIG
55	55	*
56	56	* COMMAND_RECONFIG_FLAG_PARTIAL:
57		− * Set to FPGA configuration type (full or partial), the default
58		− * is full reconfig.
	57	+ * Set to FPGA configuration type (full or partial).
59	58	*/
60		−#define COMMAND_RECONFIG_FLAG_PARTIAL 0
	59	+#define COMMAND_RECONFIG_FLAG_PARTIAL 1
61	60
62	61	/**
63	62	* Timeout settings for service clients:
64	63	* timeout value used in Stratix10 FPGA manager driver.
65	64	* timeout value used in RSU driver
66	65	*/
67		−#define SVC_RECONFIG_REQUEST_TIMEOUT_MS 100
68		−#define SVC_RECONFIG_BUFFER_TIMEOUT_MS 240
	66	+#define SVC_RECONFIG_REQUEST_TIMEOUT_MS 300
	67	+#define SVC_RECONFIG_BUFFER_TIMEOUT_MS 720
69	68	#define SVC_RSU_REQUEST_TIMEOUT_MS 300
70	69
71	70	struct stratix10_svc_chan;
@@ -99,6 +98,12 @@ struct stratix10_svc_chan; · 27 unmodified lines
99	98	*
100	99	* @COMMAND_RSU_RETRY: query firmware for the current image's retry counter,
101	100	* return status is SVC_STATUS_OK or SVC_STATUS_ERROR
	101	+ *
	102	+ * @COMMAND_RSU_MAX_RETRY: query firmware for the max retry value,
	103	+ * return status is SVC_STATUS_OK or SVC_STATUS_ERROR
	104	+ *
	105	+ * @COMMAND_RSU_DCMF_VERSION: query firmware for the DCMF version, return status
	106	+ * is SVC_STATUS_OK or SVC_STATUS_ERROR
102	107	*/
103	108	enum stratix10_svc_command_code {
104	109	COMMAND_NOOP = 0,
@@ -110,6 +115,8 @@ enum stratix10_svc_command_code { · 5 unmodified lines
110	115	COMMAND_RSU_UPDATE,
111	116	COMMAND_RSU_NOTIFY,
112	117	COMMAND_RSU_RETRY,
	118	+ COMMAND_RSU_MAX_RETRY,
	119	+ COMMAND_RSU_DCMF_VERSION,
113	120	};
114	121
115	122	/**

include/linux/fsl/mc.h+31−1

@@ -339,7 +339,7 @@ struct fsl_mc_io { · 338 unmodified lines
339	339	* This field is only meaningful if the
340	340	* FSL_MC_IO_ATOMIC_CONTEXT_PORTAL flag is set
341	341	*/
342		− spinlock_t spinlock; /* serializes mc_send_command() */
	342	+ raw_spinlock_t spinlock; /* serializes mc_send_command() */
343	343	};
344	344	};
345	345
@@ -433,6 +433,11 @@ extern struct device_type fsl_mc_bus_dpmcp_type; · 87 unmodified lines
433	433	extern struct device_type fsl_mc_bus_dpmac_type;
434	434	extern struct device_type fsl_mc_bus_dprtc_type;
435	435	extern struct device_type fsl_mc_bus_dpseci_type;
	436	+extern struct device_type fsl_mc_bus_dpdmux_type;
	437	+extern struct device_type fsl_mc_bus_dpdcei_type;
	438	+extern struct device_type fsl_mc_bus_dpaiop_type;
	439	+extern struct device_type fsl_mc_bus_dpci_type;
	440	+extern struct device_type fsl_mc_bus_dpdmai_type;
436	441
437	442	static inline bool is_fsl_mc_bus_dprc(const struct fsl_mc_device *mc_dev)
438	443	{
@@ -454,6 +459,11 @@ static inline bool is_fsl_mc_bus_dpsw(const struct fsl_mc_device *mc_dev) · 15 unmodified lines
454	459	return mc_dev->dev.type == &fsl_mc_bus_dpsw_type;
455	460	}
456	461
	462	+static inline bool is_fsl_mc_bus_dpdmux(const struct fsl_mc_device *mc_dev)
	463	+{
	464	+ return mc_dev->dev.type == &fsl_mc_bus_dpdmux_type;
	465	+}
	466	+
457	467	static inline bool is_fsl_mc_bus_dpbp(const struct fsl_mc_device *mc_dev)
458	468	{
459	469	return mc_dev->dev.type == &fsl_mc_bus_dpbp_type;
@@ -484,6 +494,26 @@ static inline bool is_fsl_mc_bus_dpseci(const struct fsl_mc_device *mc_dev) · 24 unmodified lines
484	494	return mc_dev->dev.type == &fsl_mc_bus_dpseci_type;
485	495	}
486	496
	497	+static inline bool is_fsl_mc_bus_dpdcei(const struct fsl_mc_device *mc_dev)
	498	+{
	499	+ return mc_dev->dev.type == &fsl_mc_bus_dpdcei_type;
	500	+}
	501	+
	502	+static inline bool is_fsl_mc_bus_dpaiop(const struct fsl_mc_device *mc_dev)
	503	+{
	504	+ return mc_dev->dev.type == &fsl_mc_bus_dpaiop_type;
	505	+}
	506	+
	507	+static inline bool is_fsl_mc_bus_dpci(const struct fsl_mc_device *mc_dev)
	508	+{
	509	+ return mc_dev->dev.type == &fsl_mc_bus_dpci_type;
	510	+}
	511	+
	512	+static inline bool is_fsl_mc_bus_dpdmai(const struct fsl_mc_device *mc_dev)
	513	+{
	514	+ return mc_dev->dev.type == &fsl_mc_bus_dpdmai_type;
	515	+}
	516	+
487	517	/*
488	518	* Data Path Buffer Pool (DPBP) API
489	519	* Contains initialization APIs and runtime control APIs for DPBP

include/linux/interconnect-provider.h+12−4

@@ -41,6 +41,7 @@ struct icc_node of_icc_xlate_onecell(struct of_phandle_args spec, · 40 unmodified lines
41	41	* @xlate: provider-specific callback for mapping nodes from phandle arguments
42	42	* @dev: the device this interconnect provider belongs to
43	43	* @users: count of active users
	44	+ * @inter_set: whether inter-provider pairs will be configured with @set
44	45	* @data: pointer to private data
45	46	*/
46	47	struct icc_provider {
@@ -53,6 +54,7 @@ struct icc_provider { · 6 unmodified lines
53	54	struct icc_node* (xlate)(struct of_phandle_args spec, void *data);
54	55	struct device *dev;
55	56	int users;
	57	+ bool inter_set;
56	58	void *data;
57	59	};
58	60
@@ -103,6 +105,7 @@ void icc_node_del(struct icc_node *node); · 44 unmodified lines
103	105	int icc_nodes_remove(struct icc_provider *provider);
104	106	int icc_provider_add(struct icc_provider *provider);
105	107	int icc_provider_del(struct icc_provider *provider);
	108	+struct icc_node of_icc_get_from_provider(struct of_phandle_args spec);
106	109
107	110	#else
108	111
@@ -117,7 +120,7 @@ static inline struct icc_node *icc_node_create(int id) · 8 unmodified lines
117	120	return ERR_PTR(-ENOTSUPP);
118	121	}
119	122
120		−void icc_node_destroy(int id)
	123	+static inline void icc_node_destroy(int id)
121	124	{
122	125	}
123	126
@@ -126,16 +129,16 @@ static inline int icc_link_create(struct icc_node *node, const int dst_id) · 2 unmodified lines
126	129	return -ENOTSUPP;
127	130	}
128	131
129		−int icc_link_destroy(struct icc_node src, struct icc_node dst)
	132	+static inline int icc_link_destroy(struct icc_node src, struct icc_node dst)
130	133	{
131	134	return -ENOTSUPP;
132	135	}
133	136
134		−void icc_node_add(struct icc_node node, struct icc_provider provider)
	137	+static inline void icc_node_add(struct icc_node node, struct icc_provider provider)
135	138	{
136	139	}
137	140
138		−void icc_node_del(struct icc_node *node)
	141	+static inline void icc_node_del(struct icc_node *node)
139	142	{
140	143	}
141	144
@@ -154,6 +157,11 @@ static inline int icc_provider_del(struct icc_provider *provider) · 12 unmodified lines
154	157	return -ENOTSUPP;
155	158	}
156	159
	160	+static inline struct icc_node of_icc_get_from_provider(struct of_phandle_args spec)
	161	+{
	162	+ return ERR_PTR(-ENOTSUPP);
	163	+}
	164	+
157	165	#endif /* CONFIG_INTERCONNECT */
158	166
159	167	#endif /* __LINUX_INTERCONNECT_PROVIDER_H */

include/linux/mic_bus.h+1−1

@@ -6,7 +6,7 @@ · 5 unmodified lines
6	6	*
7	7	* Intel MIC Bus driver.
8	8	*
9		− * This implementation is very similar to the the virtio bus driver
	9	+ * This implementation is very similar to the virtio bus driver
10	10	* implementation @ include/linux/virtio.h.
11	11	*/
12	12	#ifndef _MIC_BUS_H_

include/linux/mod_devicetable.h+2−0

@@ -251,6 +251,8 @@ struct hda_device_id { · 250 unmodified lines
251	251	struct sdw_device_id {
252	252	__u16 mfg_id;
253	253	__u16 part_id;
	254	+ __u8 sdw_version;
	255	+ __u8 class_id;
254	256	kernel_ulong_t driver_data;
255	257	};
256	258

include/linux/nvmem-consumer.h+1−0

@@ -61,6 +61,7 @@ void nvmem_cell_put(struct nvmem_cell *cell); · 60 unmodified lines
61	61	void devm_nvmem_cell_put(struct device dev, struct nvmem_cell cell);
62	62	void nvmem_cell_read(struct nvmem_cell cell, size_t *len);
63	63	int nvmem_cell_write(struct nvmem_cell cell, void buf, size_t len);
	64	+int nvmem_cell_read_u8(struct device dev, const char cell_id, u8 *val);
64	65	int nvmem_cell_read_u16(struct device dev, const char cell_id, u16 *val);
65	66	int nvmem_cell_read_u32(struct device dev, const char cell_id, u32 *val);
66	67	int nvmem_cell_read_u64(struct device dev, const char cell_id, u64 *val);

include/linux/nvmem-provider.h+3−0

@@ -27,6 +27,9 @@ enum nvmem_type { · 26 unmodified lines
27	27	NVMEM_TYPE_BATTERY_BACKED,
28	28	};
29	29
	30	+#define NVMEM_DEVID_NONE (-1)
	31	+#define NVMEM_DEVID_AUTO (-2)
	32	+
30	33	/**
31	34	* struct nvmem_config - NVMEM device configuration
32	35	*

include/linux/rtsx_pci.h+11−22

@@ -99,18 +99,6 @@ · 98 unmodified lines
99	99	#define rtsx_pci_readb(pcr, reg) \
100	100	ioread8((pcr)->remap_addr + reg)
101	101
102		−#define rtsx_pci_read_config_byte(pcr, where, val) \
103		− pci_read_config_byte((pcr)->pci, where, val)
104		−
105		−#define rtsx_pci_write_config_byte(pcr, where, val) \
106		− pci_write_config_byte((pcr)->pci, where, val)
107		−
108		−#define rtsx_pci_read_config_dword(pcr, where, val) \
109		− pci_read_config_dword((pcr)->pci, where, val)
110		−
111		−#define rtsx_pci_write_config_dword(pcr, where, val) \
112		− pci_write_config_dword((pcr)->pci, where, val)
113		−
114	102	#define STATE_TRANS_NONE 0
115	103	#define STATE_TRANS_CMD 1
116	104	#define STATE_TRANS_BUF 2
@@ -305,6 +293,8 @@ · 188 unmodified lines
305	293	#define SD30_CLK_STOP_CFG0 0x01
306	294	#define REG_PRE_RW_MODE 0xFD70
307	295	#define EN_INFINITE_MODE 0x01
	296	+#define REG_CRC_DUMMY_0 0xFD71
	297	+#define CFG_SD_POW_AUTO_PD (1<<0)
308	298
309	299	#define SRCTL 0xFC13
310	300
@@ -599,6 +589,7 @@ · 288 unmodified lines
599	589
600	590	#define ASPM_FORCE_CTL 0xFE57
601	591	#define FORCE_ASPM_CTL0 0x10
	592	+#define FORCE_ASPM_CTL1 0x20
602	593	#define FORCE_ASPM_VAL_MASK 0x03
603	594	#define FORCE_ASPM_L1_EN 0x02
604	595	#define FORCE_ASPM_L0_EN 0x01
@@ -667,6 +658,11 @@ · 62 unmodified lines
667	658	#define PM_WAKE_EN 0x01
668	659	#define PM_CTRL4 0xFF47
669	660
	661	+#define REG_CFG_OOBS_OFF_TIMER 0xFEA6
	662	+#define REG_CFG_OOBS_ON_TIMER 0xFEA7
	663	+#define REG_CFG_VCM_ON_TIMER 0xFEA8
	664	+#define REG_CFG_OOBS_POLLING 0xFEA9
	665	+
670	666	/* Memory mapping */
671	667	#define SRAM_BASE 0xE600
672	668	#define RBUF_BASE 0xF400
@@ -1041,10 +1037,6 @@ · 368 unmodified lines
1041	1037	#define PHY_DIG1E_RX_EN_KEEP 0x0001
1042	1038	#define PHY_DUM_REG 0x1F
1043	1039
1044		−#define PCR_ASPM_SETTING_REG1 0x160
1045		−#define PCR_ASPM_SETTING_REG2 0x168
1046		−#define PCR_ASPM_SETTING_5260 0x178
1047		−
1048	1040	#define PCR_SETTING_REG1 0x724
1049	1041	#define PCR_SETTING_REG2 0x814
1050	1042	#define PCR_SETTING_REG3 0x747
@@ -1091,11 +1083,6 @@ struct pcr_ops { · 40 unmodified lines
1091	1083
1092	1084	enum PDEV_STAT {PDEV_STAT_IDLE, PDEV_STAT_RUN};
1093	1085
1094		−#define ASPM_L1_1_EN_MASK BIT(3)
1095		−#define ASPM_L1_2_EN_MASK BIT(2)
1096		−#define PM_L1_1_EN_MASK BIT(1)
1097		−#define PM_L1_2_EN_MASK BIT(0)
1098		−
1099	1086	#define ASPM_L1_1_EN BIT(0)
1100	1087	#define ASPM_L1_2_EN BIT(1)
1101	1088	#define PM_L1_1_EN BIT(2)
@@ -1158,7 +1145,6 @@ struct rtsx_hw_param { · 56 unmodified lines
1158	1145	struct rtsx_pcr {
1159	1146	struct pci_dev *pci;
1160	1147	unsigned int id;
1161		− int pcie_cap;
1162	1148	struct rtsx_cr_option option;
1163	1149	struct rtsx_hw_param hw_param;
1164	1150
@@ -1204,6 +1190,7 @@ struct rtsx_pcr { · 39 unmodified lines
1204	1190	#define EXTRA_CAPS_MMC_HSDDR (1 << 3)
1205	1191	#define EXTRA_CAPS_MMC_HS200 (1 << 4)
1206	1192	#define EXTRA_CAPS_MMC_8BIT (1 << 5)
	1193	+#define EXTRA_CAPS_NO_MMC (1 << 7)
1207	1194	u32 extra_caps;
1208	1195
1209	1196	#define IC_VER_A 0
@@ -1242,6 +1229,7 @@ struct rtsx_pcr { · 32 unmodified lines
1242	1229	u8 dma_error_count;
1243	1230	u8 ocp_stat;
1244	1231	u8 ocp_stat2;
	1232	+ u8 rtd3_en;
1245	1233	};
1246	1234
1247	1235	#define PID_524A 0x524A
@@ -1250,6 +1238,7 @@ struct rtsx_pcr { · 2 unmodified lines
1250	1238	#define PID_525A 0x525A
1251	1239	#define PID_5260 0x5260
1252	1240	#define PID_5261 0x5261
	1241	+#define PID_5228 0x5228
1253	1242
1254	1243	#define CHK_PCI_PID(pcr, pid) ((pcr)->pci->device == (pid))
1255	1244	#define PCI_VID(pcr) ((pcr)->pci->vendor)

include/linux/soundwire/sdw.h+19−14

@@ -88,10 +88,10 @@ enum sdw_slave_status { · 87 unmodified lines
88	88	* @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
89	89	*/
90	90	enum sdw_clk_stop_type {
91		− SDW_CLK_PRE_PREPARE = 0,
92		− SDW_CLK_POST_PREPARE,
93		− SDW_CLK_PRE_DEPREPARE,
94		− SDW_CLK_POST_DEPREPARE,
	91	+ SDW_CLK_PRE_PREPARE = 0,
	92	+ SDW_CLK_POST_PREPARE,
	93	+ SDW_CLK_PRE_DEPREPARE,
	94	+ SDW_CLK_POST_DEPREPARE,
95	95	};
96	96
97	97	/**
@@ -152,19 +152,19 @@ enum sdw_data_direction { · 54 unmodified lines
152	152	*
153	153	* @SDW_PORT_DATA_MODE_NORMAL: Normal data mode where audio data is received
154	154	* and transmitted.
	155	+ * @SDW_PORT_DATA_MODE_PRBS: Test mode which uses a PRBS generator to produce
	156	+ * a pseudo random data pattern that is transferred
	157	+ * @SDW_PORT_DATA_MODE_STATIC_0: Simple test mode which uses static value of
	158	+ * logic 0. The encoding will result in no signal transitions
155	159	* @SDW_PORT_DATA_MODE_STATIC_1: Simple test mode which uses static value of
156	160	* logic 1. The encoding will result in signal transitions at every bitslot
157	161	* owned by this Port
158		− * @SDW_PORT_DATA_MODE_STATIC_0: Simple test mode which uses static value of
159		− * logic 0. The encoding will result in no signal transitions
160		− * @SDW_PORT_DATA_MODE_PRBS: Test mode which uses a PRBS generator to produce
161		− * a pseudo random data pattern that is transferred
162	162	*/
163	163	enum sdw_port_data_mode {
164	164	SDW_PORT_DATA_MODE_NORMAL = 0,
165		− SDW_PORT_DATA_MODE_STATIC_1 = 1,
	165	+ SDW_PORT_DATA_MODE_PRBS = 1,
166	166	SDW_PORT_DATA_MODE_STATIC_0 = 2,
167		− SDW_PORT_DATA_MODE_PRBS = 3,
	167	+ SDW_PORT_DATA_MODE_STATIC_1 = 3,
168	168	};
169	169
170	170	/*
@@ -426,8 +426,7 @@ int sdw_slave_read_prop(struct sdw_slave *slave); · 255 unmodified lines
426	426	* struct sdw_slave_id - Slave ID
427	427	* @mfg_id: MIPI Manufacturer ID
428	428	* @part_id: Device Part ID
429		− * @class_id: MIPI Class ID, unused now.
430		− * Currently a placeholder in MIPI SoundWire Spec
	429	+ * @class_id: MIPI Class ID (defined starting with SoundWire 1.2 spec)
431	430	* @unique_id: Device unique ID
432	431	* @sdw_version: SDW version implemented
433	432	*
@@ -659,10 +658,14 @@ struct sdw_driver { · 225 unmodified lines
659	658	struct device_driver driver;
660	659	};
661	660
662		−#define SDW_SLAVE_ENTRY(_mfg_id, _part_id, _drv_data) \
663		− { .mfg_id = (_mfg_id), .part_id = (_part_id), \
	661	+#define SDW_SLAVE_ENTRY_EXT(_mfg_id, _part_id, _version, _c_id, _drv_data) \
	662	+ { .mfg_id = (_mfg_id), .part_id = (_part_id), \
	663	+ .sdw_version = (_version), .class_id = (_c_id), \
664	664	.driver_data = (unsigned long)(_drv_data) }
665	665
	666	+#define SDW_SLAVE_ENTRY(_mfg_id, _part_id, _drv_data) \
	667	+ SDW_SLAVE_ENTRY_EXT((_mfg_id), (_part_id), 0, 0, (_drv_data))
	668	+
666	669	int sdw_handle_slave_status(struct sdw_bus *bus,
667	670	enum sdw_slave_status status[]);
668	671
@@ -952,10 +955,12 @@ int sdw_stream_remove_master(struct sdw_bus *bus, · 283 unmodified lines
952	955	struct sdw_stream_runtime *stream);
953	956	int sdw_stream_remove_slave(struct sdw_slave *slave,
954	957	struct sdw_stream_runtime *stream);
	958	+int sdw_startup_stream(void *sdw_substream);
955	959	int sdw_prepare_stream(struct sdw_stream_runtime *stream);
956	960	int sdw_enable_stream(struct sdw_stream_runtime *stream);
957	961	int sdw_disable_stream(struct sdw_stream_runtime *stream);
958	962	int sdw_deprepare_stream(struct sdw_stream_runtime *stream);
	963	+void sdw_shutdown_stream(void *sdw_substream);
959	964	int sdw_bus_prep_clk_stop(struct sdw_bus *bus);
960	965	int sdw_bus_clk_stop(struct sdw_bus *bus);
961	966	int sdw_bus_exit_clk_stop(struct sdw_bus *bus);

include/linux/soundwire/sdw_intel.h+2−0

@@ -115,6 +115,7 @@ struct sdw_intel_slave_id { · 114 unmodified lines
115	115	* links
116	116	* @link_list: list to handle interrupts across all links
117	117	* @shim_lock: mutex to handle concurrent rmw access to shared SHIM registers.
	118	+ * @shim_mask: flags to track initialization of SHIM shared registers
118	119	*/
119	120	struct sdw_intel_ctx {
120	121	int count;
@@ -126,6 +127,7 @@ struct sdw_intel_ctx { · 5 unmodified lines
126	127	struct sdw_intel_slave_id *ids;
127	128	struct list_head link_list;
128	129	struct mutex shim_lock; /* lock for access to shared SHIM registers */
	130	+ u32 shim_mask;
129	131	};
130	132
131	133	/**

include/linux/soundwire/sdw_registers.h+116−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	12	#define SDW_REG_SHIFT(n) (ffs(n) - 1)
13	13
14	14	/*
15		− * SDW registers as defined by MIPI 1.1 Spec
	15	+ * SDW registers as defined by MIPI 1.2 Spec
16	16	*/
17	17	#define SDW_REGADDR GENMASK(14, 0)
18	18	#define SDW_SCP_ADDRPAGE2_MASK GENMASK(22, 15)
@@ -43,6 +43,8 @@ · 24 unmodified lines
43	43	#define SDW_DP0_INT_TEST_FAIL BIT(0)
44	44	#define SDW_DP0_INT_PORT_READY BIT(1)
45	45	#define SDW_DP0_INT_BRA_FAILURE BIT(2)
	46	+#define SDW_DP0_SDCA_CASCADE BIT(3)
	47	+/* BIT(4) not allocated in SoundWire specification 1.2 */
46	48	#define SDW_DP0_INT_IMPDEF1 BIT(5)
47	49	#define SDW_DP0_INT_IMPDEF2 BIT(6)
48	50	#define SDW_DP0_INT_IMPDEF3 BIT(7)
@@ -106,6 +108,20 @@ · 57 unmodified lines
106	108	#define SDW_SCP_ADDRPAGE2 0x49
107	109	#define SDW_SCP_KEEPEREN 0x4A
108	110	#define SDW_SCP_BANKDELAY 0x4B
	111	+#define SDW_SCP_COMMIT 0x4C
	112	+
	113	+#define SDW_SCP_BUS_CLOCK_BASE 0x4D
	114	+#define SDW_SCP_BASE_CLOCK_FREQ GENMASK(2, 0)
	115	+#define SDW_SCP_BASE_CLOCK_UNKNOWN 0x0
	116	+#define SDW_SCP_BASE_CLOCK_19200000_HZ 0x1
	117	+#define SDW_SCP_BASE_CLOCK_24000000_HZ 0x2
	118	+#define SDW_SCP_BASE_CLOCK_24576000_HZ 0x3
	119	+#define SDW_SCP_BASE_CLOCK_22579200_HZ 0x4
	120	+#define SDW_SCP_BASE_CLOCK_32000000_HZ 0x5
	121	+#define SDW_SCP_BASE_CLOCK_RESERVED 0x6
	122	+#define SDW_SCP_BASE_CLOCK_IMP_DEF 0x7
	123	+
	124	+/* 0x4E is not allocated in SoundWire specification 1.2 */
109	125	#define SDW_SCP_TESTMODE 0x4F
110	126	#define SDW_SCP_DEVID_0 0x50
111	127	#define SDW_SCP_DEVID_1 0x51
@@ -114,12 +130,111 @@ · 2 unmodified lines
114	130	#define SDW_SCP_DEVID_4 0x54
115	131	#define SDW_SCP_DEVID_5 0x55
116	132
	133	+/* Both INT and STATUS register are same */
	134	+#define SDW_SCP_SDCA_INT1 0x58
	135	+#define SDW_SCP_SDCA_INT_SDCA_0 BIT(0)
	136	+#define SDW_SCP_SDCA_INT_SDCA_1 BIT(1)
	137	+#define SDW_SCP_SDCA_INT_SDCA_2 BIT(2)
	138	+#define SDW_SCP_SDCA_INT_SDCA_3 BIT(3)
	139	+#define SDW_SCP_SDCA_INT_SDCA_4 BIT(4)
	140	+#define SDW_SCP_SDCA_INT_SDCA_5 BIT(5)
	141	+#define SDW_SCP_SDCA_INT_SDCA_6 BIT(6)
	142	+#define SDW_SCP_SDCA_INT_SDCA_7 BIT(7)
	143	+
	144	+#define SDW_SCP_SDCA_INT2 0x59
	145	+#define SDW_SCP_SDCA_INT_SDCA_8 BIT(0)
	146	+#define SDW_SCP_SDCA_INT_SDCA_9 BIT(1)
	147	+#define SDW_SCP_SDCA_INT_SDCA_10 BIT(2)
	148	+#define SDW_SCP_SDCA_INT_SDCA_11 BIT(3)
	149	+#define SDW_SCP_SDCA_INT_SDCA_12 BIT(4)
	150	+#define SDW_SCP_SDCA_INT_SDCA_13 BIT(5)
	151	+#define SDW_SCP_SDCA_INT_SDCA_14 BIT(6)
	152	+#define SDW_SCP_SDCA_INT_SDCA_15 BIT(7)
	153	+
	154	+#define SDW_SCP_SDCA_INT3 0x5A
	155	+#define SDW_SCP_SDCA_INT_SDCA_16 BIT(0)
	156	+#define SDW_SCP_SDCA_INT_SDCA_17 BIT(1)
	157	+#define SDW_SCP_SDCA_INT_SDCA_18 BIT(2)
	158	+#define SDW_SCP_SDCA_INT_SDCA_19 BIT(3)
	159	+#define SDW_SCP_SDCA_INT_SDCA_20 BIT(4)
	160	+#define SDW_SCP_SDCA_INT_SDCA_21 BIT(5)
	161	+#define SDW_SCP_SDCA_INT_SDCA_22 BIT(6)
	162	+#define SDW_SCP_SDCA_INT_SDCA_23 BIT(7)
	163	+
	164	+#define SDW_SCP_SDCA_INT4 0x5B
	165	+#define SDW_SCP_SDCA_INT_SDCA_24 BIT(0)
	166	+#define SDW_SCP_SDCA_INT_SDCA_25 BIT(1)
	167	+#define SDW_SCP_SDCA_INT_SDCA_26 BIT(2)
	168	+#define SDW_SCP_SDCA_INT_SDCA_27 BIT(3)
	169	+#define SDW_SCP_SDCA_INT_SDCA_28 BIT(4)
	170	+#define SDW_SCP_SDCA_INT_SDCA_29 BIT(5)
	171	+#define SDW_SCP_SDCA_INT_SDCA_30 BIT(6)
	172	+/* BIT(7) not allocated in SoundWire 1.2 specification */
	173	+
	174	+#define SDW_SCP_SDCA_INTMASK1 0x5C
	175	+#define SDW_SCP_SDCA_INTMASK_SDCA_0 BIT(0)
	176	+#define SDW_SCP_SDCA_INTMASK_SDCA_1 BIT(1)
	177	+#define SDW_SCP_SDCA_INTMASK_SDCA_2 BIT(2)
	178	+#define SDW_SCP_SDCA_INTMASK_SDCA_3 BIT(3)
	179	+#define SDW_SCP_SDCA_INTMASK_SDCA_4 BIT(4)
	180	+#define SDW_SCP_SDCA_INTMASK_SDCA_5 BIT(5)
	181	+#define SDW_SCP_SDCA_INTMASK_SDCA_6 BIT(6)
	182	+#define SDW_SCP_SDCA_INTMASK_SDCA_7 BIT(7)
	183	+
	184	+#define SDW_SCP_SDCA_INTMASK2 0x5D
	185	+#define SDW_SCP_SDCA_INTMASK_SDCA_8 BIT(0)
	186	+#define SDW_SCP_SDCA_INTMASK_SDCA_9 BIT(1)
	187	+#define SDW_SCP_SDCA_INTMASK_SDCA_10 BIT(2)
	188	+#define SDW_SCP_SDCA_INTMASK_SDCA_11 BIT(3)
	189	+#define SDW_SCP_SDCA_INTMASK_SDCA_12 BIT(4)
	190	+#define SDW_SCP_SDCA_INTMASK_SDCA_13 BIT(5)
	191	+#define SDW_SCP_SDCA_INTMASK_SDCA_14 BIT(6)
	192	+#define SDW_SCP_SDCA_INTMASK_SDCA_15 BIT(7)
	193	+
	194	+#define SDW_SCP_SDCA_INTMASK3 0x5E
	195	+#define SDW_SCP_SDCA_INTMASK_SDCA_16 BIT(0)
	196	+#define SDW_SCP_SDCA_INTMASK_SDCA_17 BIT(1)
	197	+#define SDW_SCP_SDCA_INTMASK_SDCA_18 BIT(2)
	198	+#define SDW_SCP_SDCA_INTMASK_SDCA_19 BIT(3)
	199	+#define SDW_SCP_SDCA_INTMASK_SDCA_20 BIT(4)
	200	+#define SDW_SCP_SDCA_INTMASK_SDCA_21 BIT(5)
	201	+#define SDW_SCP_SDCA_INTMASK_SDCA_22 BIT(6)
	202	+#define SDW_SCP_SDCA_INTMASK_SDCA_23 BIT(7)
	203	+
	204	+#define SDW_SCP_SDCA_INTMASK4 0x5F
	205	+#define SDW_SCP_SDCA_INTMASK_SDCA_24 BIT(0)
	206	+#define SDW_SCP_SDCA_INTMASK_SDCA_25 BIT(1)
	207	+#define SDW_SCP_SDCA_INTMASK_SDCA_26 BIT(2)
	208	+#define SDW_SCP_SDCA_INTMASK_SDCA_27 BIT(3)
	209	+#define SDW_SCP_SDCA_INTMASK_SDCA_28 BIT(4)
	210	+#define SDW_SCP_SDCA_INTMASK_SDCA_29 BIT(5)
	211	+#define SDW_SCP_SDCA_INTMASK_SDCA_30 BIT(6)
	212	+/* BIT(7) not allocated in SoundWire 1.2 specification */
	213	+
117	214	/* Banked Registers */
118	215	#define SDW_SCP_FRAMECTRL_B0 0x60
119	216	#define SDW_SCP_FRAMECTRL_B1 (0x60 + SDW_BANK1_OFFSET)
120	217	#define SDW_SCP_NEXTFRAME_B0 0x61
121	218	#define SDW_SCP_NEXTFRAME_B1 (0x61 + SDW_BANK1_OFFSET)
122	219
	220	+#define SDW_SCP_BUSCLOCK_SCALE_B0 0x62
	221	+#define SDW_SCP_BUSCLOCK_SCALE_B1 (0x62 + SDW_BANK1_OFFSET)
	222	+#define SDW_SCP_CLOCK_SCALE GENMASK(3, 0)
	223	+
	224	+/* PHY registers - CTRL and STAT are the same address */
	225	+#define SDW_SCP_PHY_OUT_CTRL_0 0x80
	226	+#define SDW_SCP_PHY_OUT_CTRL_1 0x81
	227	+#define SDW_SCP_PHY_OUT_CTRL_2 0x82
	228	+#define SDW_SCP_PHY_OUT_CTRL_3 0x83
	229	+#define SDW_SCP_PHY_OUT_CTRL_4 0x84
	230	+#define SDW_SCP_PHY_OUT_CTRL_5 0x85
	231	+#define SDW_SCP_PHY_OUT_CTRL_6 0x86
	232	+#define SDW_SCP_PHY_OUT_CTRL_7 0x87
	233	+
	234	+#define SDW_SCP_CAP_LOAD_CTRL GENMASK(2, 0)
	235	+#define SDW_SCP_DRIVE_STRENGTH_CTRL GENMASK(5, 3)
	236	+#define SDW_SCP_SLEW_TIME_CTRL GENMASK(7, 6)
	237	+
123	238	/* Both INT and STATUS register is same */
124	239	#define SDW_DPN_INT(n) (0x0 + SDW_DPN_SIZE * (n))
125	240	#define SDW_DPN_INTMASK(n) (0x1 + SDW_DPN_SIZE * (n))

include/linux/vbox_utils.h+1−0

@@ -16,6 +16,7 @@ struct vbg_dev; · 15 unmodified lines
16	16	__printf(1, 2) void vbg_info(const char *fmt, ...);
17	17	__printf(1, 2) void vbg_warn(const char *fmt, ...);
18	18	__printf(1, 2) void vbg_err(const char *fmt, ...);
	19	+__printf(1, 2) void vbg_err_ratelimited(const char *fmt, ...);
19	20
20	21	/* Only use backdoor logging for non-dynamic debug builds */
21	22	#if defined(DEBUG) && !defined(CONFIG_DYNAMIC_DEBUG)

include/linux/vmw_vmci_defs.h+1−1

@@ -159,7 +159,7 @@ static inline bool vmci_handle_is_invalid(struct vmci_handle h) · 158 unmodified lines
159	159	*/
160	160	#define VMCI_ANON_SRC_CONTEXT_ID VMCI_INVALID_ID
161	161	#define VMCI_ANON_SRC_RESOURCE_ID VMCI_INVALID_ID
162		−static const struct vmci_handle VMCI_ANON_SRC_HANDLE = {
	162	+static const struct vmci_handle __maybe_unused VMCI_ANON_SRC_HANDLE = {
163	163	.context = VMCI_ANON_SRC_CONTEXT_ID,
164	164	.resource = VMCI_ANON_SRC_RESOURCE_ID
165	165	};