lael-labs/linux

Documentation/devicetree/bindings/dma/apm-xgene-dma.txt+1−1

@@ -35,7 +35,7 @@ Example: · 34 unmodified lines
35	device_type = "dma";	35	device_type = "dma";
36	reg = <0x0 0x1f270000 0x0 0x10000>,	36	reg = <0x0 0x1f270000 0x0 0x10000>,
37	<0x0 0x1f200000 0x0 0x10000>,	37	<0x0 0x1f200000 0x0 0x10000>,
38	<0x0 0x1b008000 0x0 0x2000>,	38	<0x0 0x1b000000 0x0 0x400000>,
39	<0x0 0x1054a000 0x0 0x100>;	39	<0x0 0x1054a000 0x0 0x100>;
40	interrupts = <0x0 0x82 0x4>,	40	interrupts = <0x0 0x82 0x4>,
41	<0x0 0xb8 0x4>,	41	<0x0 0xb8 0x4>,

Documentation/devicetree/bindings/phy/ti-phy.txt+16−0

@@ -82,6 +82,9 @@ Optional properties: · 81 unmodified lines
82	- id: If there are multiple instance of the same type, in order to	82	- id: If there are multiple instance of the same type, in order to
83	differentiate between each instance "id" can be used (e.g., multi-lane PCIe	83	differentiate between each instance "id" can be used (e.g., multi-lane PCIe
84	PHY). If "id" is not provided, it is set to default value of '1'.	84	PHY). If "id" is not provided, it is set to default value of '1'.
		85	- syscon-pllreset: Handle to system control region that contains the
		86	CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
		87	register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
85		88
86	This is usually a subnode of ocp2scp to which it is connected.	89	This is usually a subnode of ocp2scp to which it is connected.
87		90
@@ -100,3 +103,16 @@ usb3phy@4a084400 { · 12 unmodified lines
100	"sysclk",	103	"sysclk",
101	"refclk";	104	"refclk";
102	};	105	};
		106
		107	sata_phy: phy@4A096000 {
		108	compatible = "ti,phy-pipe3-sata";
		109	reg = <0x4A096000 0x80>, /* phy_rx */
		110	<0x4A096400 0x64>, /* phy_tx */
		111	<0x4A096800 0x40>; /* pll_ctrl */
		112	reg-names = "phy_rx", "phy_tx", "pll_ctrl";
		113	ctrl-module = <&omap_control_sata>;
		114	clocks = <&sys_clkin1>, <&sata_ref_clk>;
		115	clock-names = "sysclk", "refclk";
		116	syscon-pllreset = <&scm_conf 0x3fc>;
		117	#phy-cells = <0>;
		118	};

Documentation/input/alps.txt+4−2

@@ -119,8 +119,10 @@ ALPS Absolute Mode - Protocol Version 2 · 118 unmodified lines
119	byte 5: 0 z6 z5 z4 z3 z2 z1 z0	119	byte 5: 0 z6 z5 z4 z3 z2 z1 z0
120		120
121	Protocol Version 2 DualPoint devices send standard PS/2 mouse packets for	121	Protocol Version 2 DualPoint devices send standard PS/2 mouse packets for
122	the DualPoint Stick. For non interleaved dualpoint devices the pointingstick	122	the DualPoint Stick. The M, R and L bits signal the combined status of both
123	buttons get reported separately in the PSM, PSR and PSL bits.	123	the pointingstick and touchpad buttons, except for Dell dualpoint devices
		124	where the pointingstick buttons get reported separately in the PSM, PSR
		125	and PSL bits.
124		126
125	Dualpoint device -- interleaved packet format	127	Dualpoint device -- interleaved packet format
126	---------------------------------------------	128	---------------------------------------------

MAINTAINERS+5−1

 IRQCHIP DRIVERS
 M:	Thomas Gleixner <tglx@linutronix.de>
 M:	Jason Cooper <jason@lakedaemon.net>
+M:	Marc Zyngier <marc.zyngier@arm.com>
 L:	linux-kernel@vger.kernel.org
 S:	Maintained
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
 F:	drivers/irqchip/
 IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
-M:	Benjamin Herrenschmidt <benh@kernel.crashing.org>
+M:	Jiang Liu <jiang.liu@linux.intel.com>
+M:	Marc Zyngier <marc.zyngier@arm.com>
 S:	Maintained
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
 F:	Documentation/IRQ-domain.txt
 F:	include/linux/irqdomain.h
 F:	kernel/irq/irqdomain.c
+F:	kernel/irq/msi.c
 ISAPNP
 M:	Jaroslav Kysela <perex@perex.cz>

Makefile+8−3

 VERSION = 4
 PATCHLEVEL = 2
 SUBLEVEL = 0
-EXTRAVERSION = -rc4
+EXTRAVERSION = -rc6
 NAME = Hurr durr I'ma sheep
 # *DOCUMENTATION*
 # Defaults to vmlinux, but the arch makefile usually adds further targets
 all: vmlinux
+# The arch Makefile can set ARCH_{CPP,A,C}FLAGS to override the default
+# values of the respective KBUILD_* variables
+ARCH_CPPFLAGS :=
+ARCH_AFLAGS :=
+ARCH_CFLAGS :=
 include arch/$(SRCARCH)/Makefile
 KBUILD_CFLAGS	+= $(call cc-option,-fno-delete-null-pointer-checks,)
 mod_compress_cmd = true
 ifdef CONFIG_MODULE_COMPRESS
   ifdef CONFIG_MODULE_COMPRESS_GZIP
-    mod_compress_cmd = gzip -n
+    mod_compress_cmd = gzip -n -f
   endif # CONFIG_MODULE_COMPRESS_GZIP
   ifdef CONFIG_MODULE_COMPRESS_XZ
-    mod_compress_cmd = xz
+    mod_compress_cmd = xz -f
   endif # CONFIG_MODULE_COMPRESS_XZ
 endif # CONFIG_MODULE_COMPRESS
 export mod_compress_cmd

arch/arc/Kconfig+11−2

 config ARC_PAGE_SIZE_16K
 	bool "16KB"
-	depends on ARC_MMU_V3
+	depends on ARC_MMU_V3 || ARC_MMU_V4
 config ARC_PAGE_SIZE_4K
 	bool "4KB"
-	depends on ARC_MMU_V3
+	depends on ARC_MMU_V3 || ARC_MMU_V4
 endchoice
 	default y
 	depends on !ARC_CANT_LLSC
+config ARC_STAR_9000923308
+	bool "Workaround for llock/scond livelock"
+	default y
+	depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
 config ARC_HAS_SWAPE
 	bool "Insn: SWAPE (endian-swap)"
 	default y
 	  dest operands with 2 possible source operands.
 	default y
+config ARC_HAS_DIV_REM
+	bool "Insn: div, divu, rem, remu"
+	default y
 config ARC_HAS_RTC
 	bool "Local 64-bit r/o cycle counter"
 	default n

arch/arc/Makefile+9−1

 cflags-$(CONFIG_ARC_HAS_LLSC)		+= -mlock
 cflags-$(CONFIG_ARC_HAS_SWAPE)		+= -mswape
+ifdef CONFIG_ISA_ARCV2
 ifndef CONFIG_ARC_HAS_LL64
-cflags-$(CONFIG_ISA_ARCV2)		+= -mno-ll64
+cflags-y				+= -mno-ll64
+endif
+ifndef CONFIG_ARC_HAS_DIV_REM
+cflags-y				+= -mno-div-rem
+endif
 endif
 cflags-$(CONFIG_ARC_DW2_UNWIND)		+= -fasynchronous-unwind-tables

arch/arc/include/asm/arcregs.h+3−4

@@ -89,11 +89,10 @@ · 88 unmodified lines
89	#define ECR_C_BIT_DTLB_LD_MISS 8	89	#define ECR_C_BIT_DTLB_LD_MISS 8
90	#define ECR_C_BIT_DTLB_ST_MISS 9	90	#define ECR_C_BIT_DTLB_ST_MISS 9
91		91
92
93	/* Auxiliary registers */	92	/* Auxiliary registers */
94	#define AUX_IDENTITY 4	93	#define AUX_IDENTITY 4
95	#define AUX_INTR_VEC_BASE 0x25	94	#define AUX_INTR_VEC_BASE 0x25
96		95	#define AUX_NON_VOL 0x5e
97		96
98	/*	97	/*
99	* Floating Pt Registers	98	* Floating Pt Registers
@@ -240,9 +239,9 @@ struct bcr_extn_xymem { · 140 unmodified lines
240		239
241	struct bcr_perip {	240	struct bcr_perip {
242	#ifdef CONFIG_CPU_BIG_ENDIAN	241	#ifdef CONFIG_CPU_BIG_ENDIAN
243	unsigned int start:8, pad2:8, sz:8, pad:8;	242	unsigned int start:8, pad2:8, sz:8, ver:8;
244	#else	243	#else
245	unsigned int pad:8, sz:8, pad2:8, start:8;	244	unsigned int ver:8, sz:8, pad2:8, start:8;
246	#endif	245	#endif
247	};	246	};
248		247

arch/arc/include/asm/atomic.h+55−23

@@ -23,33 +23,60 @@ · 22 unmodified lines
23		23
24	#define atomic_set(v, i) (((v)->counter) = (i))	24	#define atomic_set(v, i) (((v)->counter) = (i))
25		25
26	#ifdef CONFIG_ISA_ARCV2	26	#ifdef CONFIG_ARC_STAR_9000923308
27	#define PREFETCHW " prefetchw [%1] \n"	27
28	#else	28	#define SCOND_FAIL_RETRY_VAR_DEF \
29	#define PREFETCHW	29	unsigned int delay = 1, tmp; \
		30
		31	#define SCOND_FAIL_RETRY_ASM \
		32	" bz 4f \n" \
		33	" ; --- scond fail delay --- \n" \
		34	" mov %[tmp], %[delay] \n" /* tmp = delay */ \
		35	"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
		36	" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
		37	" rol %[delay], %[delay] \n" /* delay = 2 / \
		38	" b 1b \n" /* start over */ \
		39	"4: ; --- success --- \n" \
		40
		41	#define SCOND_FAIL_RETRY_VARS \
		42	,[delay] "+&r" (delay),[tmp] "=&r" (tmp) \
		43
		44	#else /* !CONFIG_ARC_STAR_9000923308 */
		45
		46	#define SCOND_FAIL_RETRY_VAR_DEF
		47
		48	#define SCOND_FAIL_RETRY_ASM \
		49	" bnz 1b \n" \
		50
		51	#define SCOND_FAIL_RETRY_VARS
		52
30	#endif	53	#endif
31		54
32	#define ATOMIC_OP(op, c_op, asm_op) \	55	#define ATOMIC_OP(op, c_op, asm_op) \
33	static inline void atomic_##op(int i, atomic_t *v) \	56	static inline void atomic_##op(int i, atomic_t *v) \
34	{ \	57	{ \
35	unsigned int temp; \	58	unsigned int val; \
		59	SCOND_FAIL_RETRY_VAR_DEF \
36	\	60	\
37	__asm__ __volatile__( \	61	__asm__ __volatile__( \
38	"1: \n" \	62	"1: llock %[val], [%[ctr]] \n" \
39	PREFETCHW \	63	" " #asm_op " %[val], %[val], %[i] \n" \
40	" llock %0, [%1] \n" \	64	" scond %[val], [%[ctr]] \n" \
41	" " #asm_op " %0, %0, %2 \n" \	65	" \n" \
42	" scond %0, [%1] \n" \	66	SCOND_FAIL_RETRY_ASM \
43	" bnz 1b \n" \	67	\
44	: "=&r"(temp) /* Early clobber, to prevent reg reuse */ \	68	: [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \
45	: "r"(&v->counter), "ir"(i) \	69	SCOND_FAIL_RETRY_VARS \
		70	: [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
		71	[i] "ir" (i) \
46	: "cc"); \	72	: "cc"); \
47	} \	73	} \
48		74
49	#define ATOMIC_OP_RETURN(op, c_op, asm_op) \	75	#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
50	static inline int atomic_##op##_return(int i, atomic_t *v) \	76	static inline int atomic_##op##_return(int i, atomic_t *v) \
51	{ \	77	{ \
52	unsigned int temp; \	78	unsigned int val; \
		79	SCOND_FAIL_RETRY_VAR_DEF \
53	\	80	\
54	/* \	81	/* \
55	* Explicit full memory barrier needed before/after as \	82	* Explicit full memory barrier needed before/after as \
@@ -58,19 +85,21 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \ · 2 unmodified lines
58	smp_mb(); \	85	smp_mb(); \
59	\	86	\
60	__asm__ __volatile__( \	87	__asm__ __volatile__( \
61	"1: \n" \	88	"1: llock %[val], [%[ctr]] \n" \
62	PREFETCHW \	89	" " #asm_op " %[val], %[val], %[i] \n" \
63	" llock %0, [%1] \n" \	90	" scond %[val], [%[ctr]] \n" \
64	" " #asm_op " %0, %0, %2 \n" \	91	" \n" \
65	" scond %0, [%1] \n" \	92	SCOND_FAIL_RETRY_ASM \
66	" bnz 1b \n" \	93	\
67	: "=&r"(temp) \	94	: [val] "=&r" (val) \
68	: "r"(&v->counter), "ir"(i) \	95	SCOND_FAIL_RETRY_VARS \
		96	: [ctr] "r" (&v->counter), \
		97	[i] "ir" (i) \
69	: "cc"); \	98	: "cc"); \
70	\	99	\
71	smp_mb(); \	100	smp_mb(); \
72	\	101	\
73	return temp; \	102	return val; \
74	}	103	}
75		104
76	#else /* !CONFIG_ARC_HAS_LLSC */	105	#else /* !CONFIG_ARC_HAS_LLSC */
@@ -150,6 +179,9 @@ ATOMIC_OP(and, &=, and) · 73 unmodified lines
150	#undef ATOMIC_OPS	179	#undef ATOMIC_OPS
151	#undef ATOMIC_OP_RETURN	180	#undef ATOMIC_OP_RETURN
152	#undef ATOMIC_OP	181	#undef ATOMIC_OP
		182	#undef SCOND_FAIL_RETRY_VAR_DEF
		183	#undef SCOND_FAIL_RETRY_ASM
		184	#undef SCOND_FAIL_RETRY_VARS
153		185
154	/**	186	/**
155	* __atomic_add_unless - add unless the number is a given value	187	* __atomic_add_unless - add unless the number is a given value

arch/arc/include/asm/ptrace.h+27−27

@@ -20,20 +20,20 @@ · 19 unmodified lines
20	struct pt_regs {	20	struct pt_regs {
21		21
22	/* Real registers */	22	/* Real registers */
23	long bta; /* bta_l1, bta_l2, erbta */	23	unsigned long bta; /* bta_l1, bta_l2, erbta */
24		24
25	long lp_start, lp_end, lp_count;	25	unsigned long lp_start, lp_end, lp_count;
26		26
27	long status32; /* status32_l1, status32_l2, erstatus */	27	unsigned long status32; /* status32_l1, status32_l2, erstatus */
28	long ret; /* ilink1, ilink2 or eret */	28	unsigned long ret; /* ilink1, ilink2 or eret */
29	long blink;	29	unsigned long blink;
30	long fp;	30	unsigned long fp;
31	long r26; /* gp */	31	unsigned long r26; /* gp */
32		32
33	long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;	33	unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
34		34
35	long sp; /* user/kernel sp depending on where we came from */	35	unsigned long sp; /* User/Kernel depending on where we came from */
36	long orig_r0;	36	unsigned long orig_r0;
37		37
38	/*	38	/*
39	* To distinguish bet excp, syscall, irq	39	* To distinguish bet excp, syscall, irq
@@ -55,13 +55,13 @@ struct pt_regs { · 15 unmodified lines
55	unsigned long event;	55	unsigned long event;
56	};	56	};
57		57
58	long user_r25;	58	unsigned long user_r25;
59	};	59	};
60	#else	60	#else
61		61
62	struct pt_regs {	62	struct pt_regs {
63		63
64	long orig_r0;	64	unsigned long orig_r0;
65		65
66	union {	66	union {
67	struct {	67	struct {
@@ -76,26 +76,26 @@ struct pt_regs { · 8 unmodified lines
76	unsigned long event;	76	unsigned long event;
77	};	77	};
78		78
79	long bta; /* bta_l1, bta_l2, erbta */	79	unsigned long bta; /* bta_l1, bta_l2, erbta */
80		80
81	long user_r25;	81	unsigned long user_r25;
82		82
83	long r26; /* gp */	83	unsigned long r26; /* gp */
84	long fp;	84	unsigned long fp;
85	long sp; /* user/kernel sp depending on where we came from */	85	unsigned long sp; /* user/kernel sp depending on where we came from */
86		86
87	long r12;	87	unsigned long r12;
88		88
89	/------- Below list auto saved by h/w -----------/	89	/------- Below list auto saved by h/w -----------/
90	long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;	90	unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
91		91
92	long blink;	92	unsigned long blink;
93	long lp_end, lp_start, lp_count;	93	unsigned long lp_end, lp_start, lp_count;
94		94
95	long ei, ldi, jli;	95	unsigned long ei, ldi, jli;
96		96
97	long ret;	97	unsigned long ret;
98	long status32;	98	unsigned long status32;
99	};	99	};
100		100
101	#endif	101	#endif
@@ -103,10 +103,10 @@ struct pt_regs { · 1 unmodified line
103	/* Callee saved registers - need to be saved only when you are scheduled out */	103	/* Callee saved registers - need to be saved only when you are scheduled out */
104		104
105	struct callee_regs {	105	struct callee_regs {
106	long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;	106	unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
107	};	107	};
108		108
109	#define instruction_pointer(regs) (unsigned long)((regs)->ret)	109	#define instruction_pointer(regs) ((regs)->ret)
110	#define profile_pc(regs) instruction_pointer(regs)	110	#define profile_pc(regs) instruction_pointer(regs)
111		111
112	/* return 1 if user mode or 0 if kernel mode */	112	/* return 1 if user mode or 0 if kernel mode */
@@ -142,7 +142,7 @@ struct callee_regs { · 29 unmodified lines
142		142
143	static inline long regs_return_value(struct pt_regs *regs)	143	static inline long regs_return_value(struct pt_regs *regs)
144	{	144	{
145	return regs->r0;	145	return (long)regs->r0;
146	}	146	}
147		147
148	#endif /* !__ASSEMBLY__ */	148	#endif /* !__ASSEMBLY__ */

arch/arc/include/asm/spinlock.h+523−15

@@ -18,9 +18,518 @@ · 17 unmodified lines
18	#define arch_spin_unlock_wait(x) \	18	#define arch_spin_unlock_wait(x) \
19	do { while (arch_spin_is_locked(x)) cpu_relax(); } while (0)	19	do { while (arch_spin_is_locked(x)) cpu_relax(); } while (0)
20		20
		21	#ifdef CONFIG_ARC_HAS_LLSC
		22
		23	/*
		24	* A normal LLOCK/SCOND based system, w/o need for livelock workaround
		25	*/
		26	#ifndef CONFIG_ARC_STAR_9000923308
		27
21	static inline void arch_spin_lock(arch_spinlock_t *lock)	28	static inline void arch_spin_lock(arch_spinlock_t *lock)
22	{	29	{
23	unsigned int tmp = __ARCH_SPIN_LOCK_LOCKED__;	30	unsigned int val;
		31
		32	smp_mb();
		33
		34	__asm__ __volatile__(
		35	"1: llock %[val], [%[slock]] \n"
		36	" breq %[val], %[LOCKED], 1b \n" /* spin while LOCKED */
		37	" scond %[LOCKED], [%[slock]] \n" /* acquire */
		38	" bnz 1b \n"
		39	" \n"
		40	: [val] "=&r" (val)
		41	: [slock] "r" (&(lock->slock)),
		42	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
		43	: "memory", "cc");
		44
		45	smp_mb();
		46	}
		47
		48	/* 1 - lock taken successfully */
		49	static inline int arch_spin_trylock(arch_spinlock_t *lock)
		50	{
		51	unsigned int val, got_it = 0;
		52
		53	smp_mb();
		54
		55	__asm__ __volatile__(
		56	"1: llock %[val], [%[slock]] \n"
		57	" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
		58	" scond %[LOCKED], [%[slock]] \n" /* acquire */
		59	" bnz 1b \n"
		60	" mov %[got_it], 1 \n"
		61	"4: \n"
		62	" \n"
		63	: [val] "=&r" (val),
		64	[got_it] "+&r" (got_it)
		65	: [slock] "r" (&(lock->slock)),
		66	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
		67	: "memory", "cc");
		68
		69	smp_mb();
		70
		71	return got_it;
		72	}
		73
		74	static inline void arch_spin_unlock(arch_spinlock_t *lock)
		75	{
		76	smp_mb();
		77
		78	lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
		79
		80	smp_mb();
		81	}
		82
		83	/*
		84	* Read-write spinlocks, allowing multiple readers but only one writer.
		85	* Unfair locking as Writers could be starved indefinitely by Reader(s)
		86	*/
		87
		88	static inline void arch_read_lock(arch_rwlock_t *rw)
		89	{
		90	unsigned int val;
		91
		92	smp_mb();
		93
		94	/*
		95	* zero means writer holds the lock exclusively, deny Reader.
		96	* Otherwise grant lock to first/subseq reader
		97	*
		98	* if (rw->counter > 0) {
		99	* rw->counter--;
		100	* ret = 1;
		101	* }
		102	*/
		103
		104	__asm__ __volatile__(
		105	"1: llock %[val], [%[rwlock]] \n"
		106	" brls %[val], %[WR_LOCKED], 1b\n" /* <= 0: spin while write locked */
		107	" sub %[val], %[val], 1 \n" /* reader lock */
		108	" scond %[val], [%[rwlock]] \n"
		109	" bnz 1b \n"
		110	" \n"
		111	: [val] "=&r" (val)
		112	: [rwlock] "r" (&(rw->counter)),
		113	[WR_LOCKED] "ir" (0)
		114	: "memory", "cc");
		115
		116	smp_mb();
		117	}
		118
		119	/* 1 - lock taken successfully */
		120	static inline int arch_read_trylock(arch_rwlock_t *rw)
		121	{
		122	unsigned int val, got_it = 0;
		123
		124	smp_mb();
		125
		126	__asm__ __volatile__(
		127	"1: llock %[val], [%[rwlock]] \n"
		128	" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
		129	" sub %[val], %[val], 1 \n" /* counter-- */
		130	" scond %[val], [%[rwlock]] \n"
		131	" bnz 1b \n" /* retry if collided with someone */
		132	" mov %[got_it], 1 \n"
		133	" \n"
		134	"4: ; --- done --- \n"
		135
		136	: [val] "=&r" (val),
		137	[got_it] "+&r" (got_it)
		138	: [rwlock] "r" (&(rw->counter)),
		139	[WR_LOCKED] "ir" (0)
		140	: "memory", "cc");
		141
		142	smp_mb();
		143
		144	return got_it;
		145	}
		146
		147	static inline void arch_write_lock(arch_rwlock_t *rw)
		148	{
		149	unsigned int val;
		150
		151	smp_mb();
		152
		153	/*
		154	* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
		155	* deny writer. Otherwise if unlocked grant to writer
		156	* Hence the claim that Linux rwlocks are unfair to writers.
		157	* (can be starved for an indefinite time by readers).
		158	*
		159	* if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) {
		160	* rw->counter = 0;
		161	* ret = 1;
		162	* }
		163	*/
		164
		165	__asm__ __volatile__(
		166	"1: llock %[val], [%[rwlock]] \n"
		167	" brne %[val], %[UNLOCKED], 1b \n" /* while !UNLOCKED spin */
		168	" mov %[val], %[WR_LOCKED] \n"
		169	" scond %[val], [%[rwlock]] \n"
		170	" bnz 1b \n"
		171	" \n"
		172	: [val] "=&r" (val)
		173	: [rwlock] "r" (&(rw->counter)),
		174	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
		175	[WR_LOCKED] "ir" (0)
		176	: "memory", "cc");
		177
		178	smp_mb();
		179	}
		180
		181	/* 1 - lock taken successfully */
		182	static inline int arch_write_trylock(arch_rwlock_t *rw)
		183	{
		184	unsigned int val, got_it = 0;
		185
		186	smp_mb();
		187
		188	__asm__ __volatile__(
		189	"1: llock %[val], [%[rwlock]] \n"
		190	" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
		191	" mov %[val], %[WR_LOCKED] \n"
		192	" scond %[val], [%[rwlock]] \n"
		193	" bnz 1b \n" /* retry if collided with someone */
		194	" mov %[got_it], 1 \n"
		195	" \n"
		196	"4: ; --- done --- \n"
		197
		198	: [val] "=&r" (val),
		199	[got_it] "+&r" (got_it)
		200	: [rwlock] "r" (&(rw->counter)),
		201	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
		202	[WR_LOCKED] "ir" (0)
		203	: "memory", "cc");
		204
		205	smp_mb();
		206
		207	return got_it;
		208	}
		209
		210	static inline void arch_read_unlock(arch_rwlock_t *rw)
		211	{
		212	unsigned int val;
		213
		214	smp_mb();
		215
		216	/*
		217	* rw->counter++;
		218	*/
		219	__asm__ __volatile__(
		220	"1: llock %[val], [%[rwlock]] \n"
		221	" add %[val], %[val], 1 \n"
		222	" scond %[val], [%[rwlock]] \n"
		223	" bnz 1b \n"
		224	" \n"
		225	: [val] "=&r" (val)
		226	: [rwlock] "r" (&(rw->counter))
		227	: "memory", "cc");
		228
		229	smp_mb();
		230	}
		231
		232	static inline void arch_write_unlock(arch_rwlock_t *rw)
		233	{
		234	smp_mb();
		235
		236	rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
		237
		238	smp_mb();
		239	}
		240
		241	#else /* CONFIG_ARC_STAR_9000923308 */
		242
		243	/*
		244	* HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping
		245	* coherency transactions in the SCU. The exclusive line state keeps rotating
		246	* among contenting cores leading to a never ending cycle. So break the cycle
		247	* by deferring the retry of failed exclusive access (SCOND). The actual delay
		248	* needed is function of number of contending cores as well as the unrelated
		249	* coherency traffic from other cores. To keep the code simple, start off with
		250	* small delay of 1 which would suffice most cases and in case of contention
		251	* double the delay. Eventually the delay is sufficient such that the coherency
		252	* pipeline is drained, thus a subsequent exclusive access would succeed.
		253	*/
		254
		255	#define SCOND_FAIL_RETRY_VAR_DEF \
		256	unsigned int delay, tmp; \
		257
		258	#define SCOND_FAIL_RETRY_ASM \
		259	" ; --- scond fail delay --- \n" \
		260	" mov %[tmp], %[delay] \n" /* tmp = delay */ \
		261	"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
		262	" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
		263	" rol %[delay], %[delay] \n" /* delay = 2 / \
		264	" b 1b \n" /* start over */ \
		265	" \n" \
		266	"4: ; --- done --- \n" \
		267
		268	#define SCOND_FAIL_RETRY_VARS \
		269	,[delay] "=&r" (delay), [tmp] "=&r" (tmp) \
		270
		271	static inline void arch_spin_lock(arch_spinlock_t *lock)
		272	{
		273	unsigned int val;
		274	SCOND_FAIL_RETRY_VAR_DEF;
		275
		276	smp_mb();
		277
		278	__asm__ __volatile__(
		279	"0: mov %[delay], 1 \n"
		280	"1: llock %[val], [%[slock]] \n"
		281	" breq %[val], %[LOCKED], 0b \n" /* spin while LOCKED */
		282	" scond %[LOCKED], [%[slock]] \n" /* acquire */
		283	" bz 4f \n" /* done */
		284	" \n"
		285	SCOND_FAIL_RETRY_ASM
		286
		287	: [val] "=&r" (val)
		288	SCOND_FAIL_RETRY_VARS
		289	: [slock] "r" (&(lock->slock)),
		290	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
		291	: "memory", "cc");
		292
		293	smp_mb();
		294	}
		295
		296	/* 1 - lock taken successfully */
		297	static inline int arch_spin_trylock(arch_spinlock_t *lock)
		298	{
		299	unsigned int val, got_it = 0;
		300	SCOND_FAIL_RETRY_VAR_DEF;
		301
		302	smp_mb();
		303
		304	__asm__ __volatile__(
		305	"0: mov %[delay], 1 \n"
		306	"1: llock %[val], [%[slock]] \n"
		307	" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
		308	" scond %[LOCKED], [%[slock]] \n" /* acquire */
		309	" bz.d 4f \n"
		310	" mov.z %[got_it], 1 \n" /* got it */
		311	" \n"
		312	SCOND_FAIL_RETRY_ASM
		313
		314	: [val] "=&r" (val),
		315	[got_it] "+&r" (got_it)
		316	SCOND_FAIL_RETRY_VARS
		317	: [slock] "r" (&(lock->slock)),
		318	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
		319	: "memory", "cc");
		320
		321	smp_mb();
		322
		323	return got_it;
		324	}
		325
		326	static inline void arch_spin_unlock(arch_spinlock_t *lock)
		327	{
		328	smp_mb();
		329
		330	lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
		331
		332	smp_mb();
		333	}
		334
		335	/*
		336	* Read-write spinlocks, allowing multiple readers but only one writer.
		337	* Unfair locking as Writers could be starved indefinitely by Reader(s)
		338	*/
		339
		340	static inline void arch_read_lock(arch_rwlock_t *rw)
		341	{
		342	unsigned int val;
		343	SCOND_FAIL_RETRY_VAR_DEF;
		344
		345	smp_mb();
		346
		347	/*
		348	* zero means writer holds the lock exclusively, deny Reader.
		349	* Otherwise grant lock to first/subseq reader
		350	*
		351	* if (rw->counter > 0) {
		352	* rw->counter--;
		353	* ret = 1;
		354	* }
		355	*/
		356
		357	__asm__ __volatile__(
		358	"0: mov %[delay], 1 \n"
		359	"1: llock %[val], [%[rwlock]] \n"
		360	" brls %[val], %[WR_LOCKED], 0b\n" /* <= 0: spin while write locked */
		361	" sub %[val], %[val], 1 \n" /* reader lock */
		362	" scond %[val], [%[rwlock]] \n"
		363	" bz 4f \n" /* done */
		364	" \n"
		365	SCOND_FAIL_RETRY_ASM
		366
		367	: [val] "=&r" (val)
		368	SCOND_FAIL_RETRY_VARS
		369	: [rwlock] "r" (&(rw->counter)),
		370	[WR_LOCKED] "ir" (0)
		371	: "memory", "cc");
		372
		373	smp_mb();
		374	}
		375
		376	/* 1 - lock taken successfully */
		377	static inline int arch_read_trylock(arch_rwlock_t *rw)
		378	{
		379	unsigned int val, got_it = 0;
		380	SCOND_FAIL_RETRY_VAR_DEF;
		381
		382	smp_mb();
		383
		384	__asm__ __volatile__(
		385	"0: mov %[delay], 1 \n"
		386	"1: llock %[val], [%[rwlock]] \n"
		387	" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
		388	" sub %[val], %[val], 1 \n" /* counter-- */
		389	" scond %[val], [%[rwlock]] \n"
		390	" bz.d 4f \n"
		391	" mov.z %[got_it], 1 \n" /* got it */
		392	" \n"
		393	SCOND_FAIL_RETRY_ASM
		394
		395	: [val] "=&r" (val),
		396	[got_it] "+&r" (got_it)
		397	SCOND_FAIL_RETRY_VARS
		398	: [rwlock] "r" (&(rw->counter)),
		399	[WR_LOCKED] "ir" (0)
		400	: "memory", "cc");
		401
		402	smp_mb();
		403
		404	return got_it;
		405	}
		406
		407	static inline void arch_write_lock(arch_rwlock_t *rw)
		408	{
		409	unsigned int val;
		410	SCOND_FAIL_RETRY_VAR_DEF;
		411
		412	smp_mb();
		413
		414	/*
		415	* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
		416	* deny writer. Otherwise if unlocked grant to writer
		417	* Hence the claim that Linux rwlocks are unfair to writers.
		418	* (can be starved for an indefinite time by readers).
		419	*
		420	* if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) {
		421	* rw->counter = 0;
		422	* ret = 1;
		423	* }
		424	*/
		425
		426	__asm__ __volatile__(
		427	"0: mov %[delay], 1 \n"
		428	"1: llock %[val], [%[rwlock]] \n"
		429	" brne %[val], %[UNLOCKED], 0b \n" /* while !UNLOCKED spin */
		430	" mov %[val], %[WR_LOCKED] \n"
		431	" scond %[val], [%[rwlock]] \n"
		432	" bz 4f \n"
		433	" \n"
		434	SCOND_FAIL_RETRY_ASM
		435
		436	: [val] "=&r" (val)
		437	SCOND_FAIL_RETRY_VARS
		438	: [rwlock] "r" (&(rw->counter)),
		439	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
		440	[WR_LOCKED] "ir" (0)
		441	: "memory", "cc");
		442
		443	smp_mb();
		444	}
		445
		446	/* 1 - lock taken successfully */
		447	static inline int arch_write_trylock(arch_rwlock_t *rw)
		448	{
		449	unsigned int val, got_it = 0;
		450	SCOND_FAIL_RETRY_VAR_DEF;
		451
		452	smp_mb();
		453
		454	__asm__ __volatile__(
		455	"0: mov %[delay], 1 \n"
		456	"1: llock %[val], [%[rwlock]] \n"
		457	" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
		458	" mov %[val], %[WR_LOCKED] \n"
		459	" scond %[val], [%[rwlock]] \n"
		460	" bz.d 4f \n"
		461	" mov.z %[got_it], 1 \n" /* got it */
		462	" \n"
		463	SCOND_FAIL_RETRY_ASM
		464
		465	: [val] "=&r" (val),
		466	[got_it] "+&r" (got_it)
		467	SCOND_FAIL_RETRY_VARS
		468	: [rwlock] "r" (&(rw->counter)),
		469	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
		470	[WR_LOCKED] "ir" (0)
		471	: "memory", "cc");
		472
		473	smp_mb();
		474
		475	return got_it;
		476	}
		477
		478	static inline void arch_read_unlock(arch_rwlock_t *rw)
		479	{
		480	unsigned int val;
		481
		482	smp_mb();
		483
		484	/*
		485	* rw->counter++;
		486	*/
		487	__asm__ __volatile__(
		488	"1: llock %[val], [%[rwlock]] \n"
		489	" add %[val], %[val], 1 \n"
		490	" scond %[val], [%[rwlock]] \n"
		491	" bnz 1b \n"
		492	" \n"
		493	: [val] "=&r" (val)
		494	: [rwlock] "r" (&(rw->counter))
		495	: "memory", "cc");
		496
		497	smp_mb();
		498	}
		499
		500	static inline void arch_write_unlock(arch_rwlock_t *rw)
		501	{
		502	unsigned int val;
		503
		504	smp_mb();
		505
		506	/*
		507	* rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
		508	*/
		509	__asm__ __volatile__(
		510	"1: llock %[val], [%[rwlock]] \n"
		511	" scond %[UNLOCKED], [%[rwlock]]\n"
		512	" bnz 1b \n"
		513	" \n"
		514	: [val] "=&r" (val)
		515	: [rwlock] "r" (&(rw->counter)),
		516	[UNLOCKED] "r" (__ARCH_RW_LOCK_UNLOCKED__)
		517	: "memory", "cc");
		518
		519	smp_mb();
		520	}
		521
		522	#undef SCOND_FAIL_RETRY_VAR_DEF
		523	#undef SCOND_FAIL_RETRY_ASM
		524	#undef SCOND_FAIL_RETRY_VARS
		525
		526	#endif /* CONFIG_ARC_STAR_9000923308 */
		527
		528	#else /* !CONFIG_ARC_HAS_LLSC */
		529
		530	static inline void arch_spin_lock(arch_spinlock_t *lock)
		531	{
		532	unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
24		533
25	/*	534	/*
26	* This smp_mb() is technically superfluous, we only need the one	535	* This smp_mb() is technically superfluous, we only need the one
@@ -33,7 +542,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) · 6 unmodified lines
33	__asm__ __volatile__(	542	__asm__ __volatile__(
34	"1: ex %0, [%1] \n"	543	"1: ex %0, [%1] \n"
35	" breq %0, %2, 1b \n"	544	" breq %0, %2, 1b \n"
36	: "+&r" (tmp)	545	: "+&r" (val)
37	: "r"(&(lock->slock)), "ir"(__ARCH_SPIN_LOCK_LOCKED__)	546	: "r"(&(lock->slock)), "ir"(__ARCH_SPIN_LOCK_LOCKED__)
38	: "memory");	547	: "memory");
39		548
@@ -48,26 +557,27 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) · 8 unmodified lines
48	smp_mb();	557	smp_mb();
49	}	558	}
50		559
		560	/* 1 - lock taken successfully */
51	static inline int arch_spin_trylock(arch_spinlock_t *lock)	561	static inline int arch_spin_trylock(arch_spinlock_t *lock)
52	{	562	{
53	unsigned int tmp = __ARCH_SPIN_LOCK_LOCKED__;	563	unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
54		564
55	smp_mb();	565	smp_mb();
56		566
57	__asm__ __volatile__(	567	__asm__ __volatile__(
58	"1: ex %0, [%1] \n"	568	"1: ex %0, [%1] \n"
59	: "+r" (tmp)	569	: "+r" (val)
60	: "r"(&(lock->slock))	570	: "r"(&(lock->slock))
61	: "memory");	571	: "memory");
62		572
63	smp_mb();	573	smp_mb();
64		574
65	return (tmp == __ARCH_SPIN_LOCK_UNLOCKED__);	575	return (val == __ARCH_SPIN_LOCK_UNLOCKED__);
66	}	576	}
67		577
68	static inline void arch_spin_unlock(arch_spinlock_t *lock)	578	static inline void arch_spin_unlock(arch_spinlock_t *lock)
69	{	579	{
70	unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__;	580	unsigned int val = __ARCH_SPIN_LOCK_UNLOCKED__;
71		581
72	/*	582	/*
73	* RELEASE barrier: given the instructions avail on ARCv2, full barrier	583	* RELEASE barrier: given the instructions avail on ARCv2, full barrier
@@ -77,7 +587,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) · 3 unmodified lines
77		587
78	__asm__ __volatile__(	588	__asm__ __volatile__(
79	" ex %0, [%1] \n"	589	" ex %0, [%1] \n"
80	: "+r" (tmp)	590	: "+r" (val)
81	: "r"(&(lock->slock))	591	: "r"(&(lock->slock))
82	: "memory");	592	: "memory");
83		593
@@ -90,19 +600,12 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) · 6 unmodified lines
90		600
91	/*	601	/*
92	* Read-write spinlocks, allowing multiple readers but only one writer.	602	* Read-write spinlocks, allowing multiple readers but only one writer.
		603	* Unfair locking as Writers could be starved indefinitely by Reader(s)
93	*	604	*
94	* The spinlock itself is contained in @counter and access to it is	605	* The spinlock itself is contained in @counter and access to it is
95	* serialized with @lock_mutex.	606	* serialized with @lock_mutex.
96	*
97	* Unfair locking as Writers could be starved indefinitely by Reader(s)
98	*/	607	*/
99		608
100	/* Would read_trylock() succeed? */
101	#define arch_read_can_lock(x) ((x)->counter > 0)
102
103	/* Would write_trylock() succeed? */
104	#define arch_write_can_lock(x) ((x)->counter == __ARCH_RW_LOCK_UNLOCKED__)
105
106	/* 1 - lock taken successfully */	609	/* 1 - lock taken successfully */
107	static inline int arch_read_trylock(arch_rwlock_t *rw)	610	static inline int arch_read_trylock(arch_rwlock_t *rw)
108	{	611	{
@@ -173,6 +676,11 @@ static inline void arch_write_unlock(arch_rwlock_t *rw) · 64 unmodified lines
173	arch_spin_unlock(&(rw->lock_mutex));	676	arch_spin_unlock(&(rw->lock_mutex));
174	}	677	}
175		678
		679	#endif
		680
		681	#define arch_read_can_lock(x) ((x)->counter > 0)
		682	#define arch_write_can_lock(x) ((x)->counter == __ARCH_RW_LOCK_UNLOCKED__)
		683
176	#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)	684	#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
177	#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)	685	#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
178		686

arch/arc/include/asm/spinlock_types.h+2−0

  */
 typedef struct {
 	volatile unsigned int	counter;
+#ifndef CONFIG_ARC_HAS_LLSC
 	arch_spinlock_t		lock_mutex;
+#endif
 } arch_rwlock_t;
 #define __ARCH_RW_LOCK_UNLOCKED__	0x01000000

arch/arc/include/uapi/asm/ptrace.h+10−10

@@ -32,20 +32,20 @@ · 31 unmodified lines
32	*/	32	*/
33	struct user_regs_struct {	33	struct user_regs_struct {
34		34
35	long pad;	35	unsigned long pad;
36	struct {	36	struct {
37	long bta, lp_start, lp_end, lp_count;	37	unsigned long bta, lp_start, lp_end, lp_count;
38	long status32, ret, blink, fp, gp;	38	unsigned long status32, ret, blink, fp, gp;
39	long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;	39	unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
40	long sp;	40	unsigned long sp;
41	} scratch;	41	} scratch;
42	long pad2;	42	unsigned long pad2;
43	struct {	43	struct {
44	long r25, r24, r23, r22, r21, r20;	44	unsigned long r25, r24, r23, r22, r21, r20;
45	long r19, r18, r17, r16, r15, r14, r13;	45	unsigned long r19, r18, r17, r16, r15, r14, r13;
46	} callee;	46	} callee;
47	long efa; /* break pt addr, for break points in delay slots */	47	unsigned long efa; /* break pt addr, for break points in delay slots */
48	long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */	48	unsigned long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */
49	};	49	};
50	#endif /* !__ASSEMBLY__ */	50	#endif /* !__ASSEMBLY__ */
51		51

arch/arc/kernel/setup.c+11−1

 	struct bcr_perip uncached_space;
 	struct bcr_generic bcr;
 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
+	unsigned long perip_space;
 	FIX_PTR(cpu);
 	READ_BCR(AUX_IDENTITY, cpu->core);
 	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
-	BUG_ON((uncached_space.start << 24) != ARC_UNCACHED_ADDR_SPACE);
+        if (uncached_space.ver < 3)
+		perip_space = uncached_space.start << 24;
+	else
+		perip_space = read_aux_reg(AUX_NON_VOL) & 0xF0000000;
+	BUG_ON(perip_space != ARC_UNCACHED_ADDR_SPACE);
 	READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 		pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 	else if (!cpu->extn.fpu_dp && fpu_enabled)
 		panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
+	if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic &&
+	    !IS_ENABLED(CONFIG_ARC_STAR_9000923308))
+		panic("llock/scond livelock workaround missing\n");
 }
 /*

arch/arc/kernel/time.c+15−25

@@ -203,34 +203,24 @@ static int arc_clkevent_set_next_event(unsigned long delta, · 202 unmodified lines
203	return 0;	203	return 0;
204	}	204	}
205		205
206	static void arc_clkevent_set_mode(enum clock_event_mode mode,	206	static int arc_clkevent_set_periodic(struct clock_event_device *dev)
207	struct clock_event_device *dev)
208	{	207	{
209	switch (mode) {	208	/*
210	case CLOCK_EVT_MODE_PERIODIC:	209	* At X Hz, 1 sec = 1000ms -> X cycles;
211	/*	210	* 10ms -> X / 100 cycles
212	* At X Hz, 1 sec = 1000ms -> X cycles;	211	*/
213	* 10ms -> X / 100 cycles	212	arc_timer_event_setup(arc_get_core_freq() / HZ);
214	*/	213	return 0;
215	arc_timer_event_setup(arc_get_core_freq() / HZ);
216	break;
217	case CLOCK_EVT_MODE_ONESHOT:
218	break;
219	default:
220	break;
221	}
222
223	return;
224	}	214	}
225		215
226	static DEFINE_PER_CPU(struct clock_event_device, arc_clockevent_device) = {	216	static DEFINE_PER_CPU(struct clock_event_device, arc_clockevent_device) = {
227	.name = "ARC Timer0",	217	.name = "ARC Timer0",
228	.features = CLOCK_EVT_FEAT_ONESHOT \| CLOCK_EVT_FEAT_PERIODIC,	218	.features = CLOCK_EVT_FEAT_ONESHOT \|
229	.mode = CLOCK_EVT_MODE_UNUSED,	219	CLOCK_EVT_FEAT_PERIODIC,
230	.rating = 300,	220	.rating = 300,
231	.irq = TIMER0_IRQ, /* hardwired, no need for resources */	221	.irq = TIMER0_IRQ, /* hardwired, no need for resources */
232	.set_next_event = arc_clkevent_set_next_event,	222	.set_next_event = arc_clkevent_set_next_event,
233	.set_mode = arc_clkevent_set_mode,	223	.set_state_periodic = arc_clkevent_set_periodic,
234	};	224	};
235		225
236	static irqreturn_t timer_irq_handler(int irq, void *dev_id)	226	static irqreturn_t timer_irq_handler(int irq, void *dev_id)
@@ -240,7 +230,7 @@ static irqreturn_t timer_irq_handler(int irq, void *dev_id) · 3 unmodified lines
240	* irq_set_chip_and_handler() asked for handle_percpu_devid_irq()	230	* irq_set_chip_and_handler() asked for handle_percpu_devid_irq()
241	*/	231	*/
242	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);	232	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
243	int irq_reenable = evt->mode == CLOCK_EVT_MODE_PERIODIC;	233	int irq_reenable = clockevent_state_periodic(evt);
244		234
245	/*	235	/*
246	* Any write to CTRL reg ACks the interrupt, we rewrite the	236	* Any write to CTRL reg ACks the interrupt, we rewrite the

arch/arc/lib/memcpy-archs.S+1−1

@@ -206,7 +206,7 @@ unalignedOffby3: · 205 unmodified lines
206	ld.ab r6, [r1, 4]	206	ld.ab r6, [r1, 4]
207	prefetch [r1, 28] ;Prefetch the next read location	207	prefetch [r1, 28] ;Prefetch the next read location
208	ld.ab r8, [r1,4]	208	ld.ab r8, [r1,4]
209	prefetch [r3, 32] ;Prefetch the next write location	209	prefetchw [r3, 32] ;Prefetch the next write location
210		210
211	SHIFT_1 (r7, r6, 8)	211	SHIFT_1 (r7, r6, 8)
212	or r7, r7, r5	212	or r7, r7, r5

arch/arc/lib/memset-archs.S+36−7

 #undef PREALLOC_NOT_AVAIL
-#ifdef PREALLOC_NOT_AVAIL
-#define PREWRITE(A,B)	prefetchw [(A),(B)]
-#else
-#define PREWRITE(A,B)	prealloc [(A),(B)]
-#endif
 ENTRY(memset)
 	prefetchw [r0]		; Prefetch the write location
 	mov.f	0, r2
 ;;; Convert len to Dwords, unfold x8
 	lsr.f	lp_count, lp_count, 6
 	lpnz	@.Lset64bytes
 	;; LOOP START
-	PREWRITE(r3, 64)	;Prefetch the next write location
+#ifdef PREALLOC_NOT_AVAIL
+	prefetchw [r3, 64]	;Prefetch the next write location
+#else
+	prealloc  [r3, 64]
+#endif
+#ifdef CONFIG_ARC_HAS_LL64
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
+#else
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+#endif
 .Lset64bytes:
 	lsr.f	lp_count, r2, 5 ;Last remaining  max 124 bytes
 	lpnz	.Lset32bytes
 	;; LOOP START
 	prefetchw   [r3, 32]	;Prefetch the next write location
+#ifdef CONFIG_ARC_HAS_LL64
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
+#else
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+#endif
 .Lset32bytes:
 	and.f	lp_count, r2, 0x1F ;Last remaining 31 bytes

arch/arc/plat-axs10x/axs10x.c+15−0

@@ -389,6 +389,21 @@ axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od) · 388 unmodified lines
389		389
390	static void __init axs103_early_init(void)	390	static void __init axs103_early_init(void)
391	{	391	{
		392	/*
		393	* AXS103 configurations for SMP/QUAD configurations share device tree
		394	* which defaults to 90 MHz. However recent failures of Quad config
		395	* revealed P&R timing violations so clamp it down to safe 50 MHz
		396	* Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack
		397	*
		398	* This hack is really hacky as of now. Fix it properly by getting the
		399	* number of cores as return value of platform's early SMP callback
		400	*/
		401	#ifdef CONFIG_ARC_MCIP
		402	unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
		403	if (num_cores > 2)
		404	arc_set_core_freq(50 * 1000000);
		405	#endif
		406
392	switch (arc_get_core_freq()/1000000) {	407	switch (arc_get_core_freq()/1000000) {
393	case 33:	408	case 33:
394	axs103_set_freq(1, 1, 1);	409	axs103_set_freq(1, 1, 1);

arch/arm/boot/dts/dra7.dtsi+1−0

@@ -1140,6 +1140,7 @@ · 1139 unmodified lines
1140	ctrl-module = <&omap_control_sata>;	1140	ctrl-module = <&omap_control_sata>;
1141	clocks = <&sys_clkin1>, <&sata_ref_clk>;	1141	clocks = <&sys_clkin1>, <&sata_ref_clk>;
1142	clock-names = "sysclk", "refclk";	1142	clock-names = "sysclk", "refclk";
		1143	syscon-pllreset = <&scm_conf 0x3fc>;
1143	#phy-cells = <0>;	1144	#phy-cells = <0>;
1144	};	1145	};
1145		1146

arch/arm/boot/dts/exynos3250.dtsi+1−1

@@ -138,8 +138,8 @@ · 137 unmodified lines
138		138
139	mipi_phy: video-phy@10020710 {	139	mipi_phy: video-phy@10020710 {
140	compatible = "samsung,s5pv210-mipi-video-phy";	140	compatible = "samsung,s5pv210-mipi-video-phy";
141	reg = <0x10020710 8>;
142	#phy-cells = <1>;	141	#phy-cells = <1>;
		142	syscon = <&pmu_system_controller>;
143	};	143	};
144		144
145	pd_cam: cam-power-domain@10023C00 {	145	pd_cam: cam-power-domain@10023C00 {

arch/arm/boot/dts/exynos4210-origen.dts+4−0

 	};
 };
+&cpu0 {
+	cpu0-supply = <&buck1_reg>;
+};
 &fimd {
 	pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
 	pinctrl-names = "default";

arch/arm/boot/dts/exynos4210-trats.dts+4−0

 	};
 };
+&cpu0 {
+	cpu0-supply = <&varm_breg>;
+};
 &dsi_0 {
 	vddcore-supply = <&vusb_reg>;
 	vddio-supply = <&vmipi_reg>;

arch/arm/boot/dts/exynos4210-universal_c210.dts+4−0

 	};
 };
+&cpu0 {
+	cpu0-supply = <&vdd_arm_reg>;
+};
 &pinctrl_1 {
 	hdmi_hpd: hdmi-hpd {
 		samsung,pins = "gpx3-7";

arch/arm/boot/dts/exynos4210.dtsi+12−0

@@ -40,6 +40,18 @@ · 39 unmodified lines
40	device_type = "cpu";	40	device_type = "cpu";
41	compatible = "arm,cortex-a9";	41	compatible = "arm,cortex-a9";
42	reg = <0x900>;	42	reg = <0x900>;
		43	clocks = <&clock CLK_ARM_CLK>;
		44	clock-names = "cpu";
		45	clock-latency = <160000>;
		46
		47	operating-points = <
		48	1200000 1250000
		49	1000000 1150000
		50	800000 1075000
		51	500000 975000
		52	400000 975000
		53	200000 950000
		54	>;
43	cooling-min-level = <4>;	55	cooling-min-level = <4>;
44	cooling-max-level = <2>;	56	cooling-max-level = <2>;
45	#cooling-cells = <2>; /* min followed by max */	57	#cooling-cells = <2>; /* min followed by max */

arch/arm/boot/dts/imx35.dtsi+4−4

@@ -286,8 +286,8 @@ · 285 unmodified lines
286	can1: can@53fe4000 {	286	can1: can@53fe4000 {
287	compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";	287	compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
288	reg = <0x53fe4000 0x1000>;	288	reg = <0x53fe4000 0x1000>;
289	clocks = <&clks 33>;	289	clocks = <&clks 33>, <&clks 33>;
290	clock-names = "ipg";	290	clock-names = "ipg", "per";
291	interrupts = <43>;	291	interrupts = <43>;
292	status = "disabled";	292	status = "disabled";
293	};	293	};
@@ -295,8 +295,8 @@ · 1 unmodified line
295	can2: can@53fe8000 {	295	can2: can@53fe8000 {
296	compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";	296	compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
297	reg = <0x53fe8000 0x1000>;	297	reg = <0x53fe8000 0x1000>;
298	clocks = <&clks 34>;	298	clocks = <&clks 34>, <&clks 34>;
299	clock-names = "ipg";	299	clock-names = "ipg", "per";
300	interrupts = <44>;	300	interrupts = <44>;
301	status = "disabled";	301	status = "disabled";
302	};	302	};

arch/arm/boot/dts/k2e-clocks.dtsi+2−3

 		#clock-cells = <0>;
 		compatible = "ti,keystone,main-pll-clock";
 		clocks = <&refclksys>;
-		reg = <0x02620350 4>, <0x02310110 4>;
+		reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
-		reg-names = "control", "multiplier";
+		reg-names = "control", "multiplier", "post-divider";
-		fixed-postdiv = <2>;
 	};
 	papllclk: papllclk@2620358 {

arch/arm/boot/dts/k2hk-clocks.dtsi+2−3

 		#clock-cells = <0>;
 		compatible = "ti,keystone,main-pll-clock";
 		clocks = <&refclksys>;
-		reg = <0x02620350 4>, <0x02310110 4>;
+		reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
-		reg-names = "control", "multiplier";
+		reg-names = "control", "multiplier", "post-divider";
-		fixed-postdiv = <2>;
 	};
 	papllclk: papllclk@2620358 {

arch/arm/boot/dts/k2l-clocks.dtsi+2−3

 		#clock-cells = <0>;
 		compatible = "ti,keystone,main-pll-clock";
 		clocks = <&refclksys>;
-		reg = <0x02620350 4>, <0x02310110 4>;
+		reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
-		reg-names = "control", "multiplier";
+		reg-names = "control", "multiplier", "post-divider";
-		fixed-postdiv = <2>;
 	};
 	papllclk: papllclk@2620358 {

arch/arm/boot/dts/ste-nomadik-nhk15.dts+1−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	};	17	};
18		18
19	aliases {	19	aliases {
		20	serial1 = &uart1;
20	stmpe-i2c0 = &stmpe0;	21	stmpe-i2c0 = &stmpe0;
21	stmpe-i2c1 = &stmpe1;	22	stmpe-i2c1 = &stmpe1;
22	};	23	};

arch/arm/boot/dts/ste-nomadik-s8815.dts+4−0

 		bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
 	};
+	aliases {
+		serial1 = &uart1;
+	};
 	src@101e0000 {
 		/* These chrystal drivers are not used on this board */
 		disable-sxtalo;

arch/arm/boot/dts/ste-nomadik-stn8815.dtsi+1−0

@@ -757,6 +757,7 @@ · 756 unmodified lines
757	clock-names = "uartclk", "apb_pclk";	757	clock-names = "uartclk", "apb_pclk";
758	pinctrl-names = "default";	758	pinctrl-names = "default";
759	pinctrl-0 = <&uart0_default_mux>;	759	pinctrl-0 = <&uart0_default_mux>;
		760	status = "disabled";
760	};	761	};
761		762
762	uart1: uart@101fb000 {	763	uart1: uart@101fb000 {

arch/arm/mach-omap2/omap_hwmod.c+16−8

  * registers.  This address is needed early so the OCP registers that
  * are part of the device's address space can be ioremapped properly.
  *
+ * If SYSC access is not needed, the registers will not be remapped
+ * and non-availability of MPU access is not treated as an error.
+ *
  * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
  * -ENXIO on absent or invalid register target address space.
  */
 	_save_mpu_port_index(oh);
+	/* if we don't need sysc access we don't need to ioremap */
+	if (!oh->class->sysc)
+		return 0;
+	/* we can't continue without MPU PORT if we need sysc access */
 	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
 		return -ENXIO;
 			 oh->name);
 		/* Extract the IO space from device tree blob */
-		if (!np)
+		if (!np) {
+			pr_err("omap_hwmod: %s: no dt node\n", oh->name);
 			return -ENXIO;
+		}
 		va_start = of_iomap(np, index + oh->mpu_rt_idx);
 	} else {
 				oh->name, np->name);
 	}
-	if (oh->class->sysc) {
+	r = _init_mpu_rt_base(oh, NULL, index, np);
-		r = _init_mpu_rt_base(oh, NULL, index, np);
+	if (r < 0) {
-		if (r < 0) {
+		WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
-			WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
+		     oh->name);
-			     oh->name);
+		return 0;
-			return 0;
-		}
 	}
 	r = _init_clocks(oh, NULL);

arch/arm/mach-omap2/omap_hwmod_7xx_data.c+2−3

 	.syss_offs	= 0x0014,
 	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
 			   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-			   SIDLE_SMART_WKUP),
 	.sysc_fields	= &omap_hwmod_sysc_type1,
 };
 	.class		= &dra7xx_gpmc_hwmod_class,
 	.clkdm_name	= "l3main1_clkdm",
 	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
-	.flags		= HWMOD_SWSUP_SIDLE | DEBUG_OMAP_GPMC_HWMOD_FLAGS,
+	.flags		= DEBUG_OMAP_GPMC_HWMOD_FLAGS,
 	.main_clk	= "l3_iclk_div",
 	.prcm = {
 		.omap4 = {

arch/arm64/boot/dts/apm/apm-storm.dtsi+1−1

@@ -823,7 +823,7 @@ · 822 unmodified lines
823	device_type = "dma";	823	device_type = "dma";
824	reg = <0x0 0x1f270000 0x0 0x10000>,	824	reg = <0x0 0x1f270000 0x0 0x10000>,
825	<0x0 0x1f200000 0x0 0x10000>,	825	<0x0 0x1f200000 0x0 0x10000>,
826	<0x0 0x1b008000 0x0 0x2000>,	826	<0x0 0x1b000000 0x0 0x400000>,
827	<0x0 0x1054a000 0x0 0x100>;	827	<0x0 0x1054a000 0x0 0x100>;
828	interrupts = <0x0 0x82 0x4>,	828	interrupts = <0x0 0x82 0x4>,
829	<0x0 0xb8 0x4>,	829	<0x0 0xb8 0x4>,

arch/arm64/kernel/signal32.c+2−3

 		 * Other callers might not initialize the si_lsb field,
 		 * so check explicitely for the right codes here.
 		 */
-		if (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO)
+		if (from->si_signo == SIGBUS &&
+		    (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO))
 			err |= __put_user(from->si_addr_lsb, &to->si_addr_lsb);
 #endif
 		break;
 int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
 {
-	memset(to, 0, sizeof *to);
 	if (copy_from_user(to, from, __ARCH_SI_PREAMBLE_SIZE) ||
 	    copy_from_user(to->_sifields._pad,
 			   from->_sifields._pad, SI_PAD_SIZE))

arch/arm64/kernel/vdso.c+3−4

  */
 void update_vsyscall(struct timekeeper *tk)
 {
-	struct timespec xtime_coarse;
 	u32 use_syscall = strcmp(tk->tkr_mono.clock->name, "arch_sys_counter");
 	++vdso_data->tb_seq_count;
 	smp_wmb();
-	xtime_coarse = __current_kernel_time();
 	vdso_data->use_syscall			= use_syscall;
-	vdso_data->xtime_coarse_sec		= xtime_coarse.tv_sec;
+	vdso_data->xtime_coarse_sec		= tk->xtime_sec;
-	vdso_data->xtime_coarse_nsec		= xtime_coarse.tv_nsec;
+	vdso_data->xtime_coarse_nsec		= tk->tkr_mono.xtime_nsec >>
+							tk->tkr_mono.shift;
 	vdso_data->wtm_clock_sec		= tk->wall_to_monotonic.tv_sec;
 	vdso_data->wtm_clock_nsec		= tk->wall_to_monotonic.tv_nsec;

arch/mips/Kconfig+0−1

@@ -151,7 +151,6 @@ config BMIPS_GENERIC · 150 unmodified lines
151	select BCM7120_L2_IRQ	151	select BCM7120_L2_IRQ
152	select BRCMSTB_L2_IRQ	152	select BRCMSTB_L2_IRQ
153	select IRQ_MIPS_CPU	153	select IRQ_MIPS_CPU
154	select RAW_IRQ_ACCESSORS
155	select DMA_NONCOHERENT	154	select DMA_NONCOHERENT
156	select SYS_SUPPORTS_32BIT_KERNEL	155	select SYS_SUPPORTS_32BIT_KERNEL
157	select SYS_SUPPORTS_LITTLE_ENDIAN	156	select SYS_SUPPORTS_LITTLE_ENDIAN

arch/mips/ath79/setup.c+1−0

@@ -190,6 +190,7 @@ int get_c0_perfcount_int(void) · 189 unmodified lines
190	{	190	{
191	return ATH79_MISC_IRQ(5);	191	return ATH79_MISC_IRQ(5);
192	}	192	}
		193	EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
193		194
194	unsigned int get_c0_compare_int(void)	195	unsigned int get_c0_compare_int(void)
195	{	196	{

arch/mips/cavium-octeon/smp.c+1−1

@@ -42,7 +42,7 @@ static irqreturn_t mailbox_interrupt(int irq, void *dev_id) · 41 unmodified lines
42	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action);	42	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action);
43		43
44	if (action & SMP_CALL_FUNCTION)	44	if (action & SMP_CALL_FUNCTION)
45	smp_call_function_interrupt();	45	generic_smp_call_function_interrupt();
46	if (action & SMP_RESCHEDULE_YOURSELF)	46	if (action & SMP_RESCHEDULE_YOURSELF)
47	scheduler_ipi();	47	scheduler_ipi();
48		48

arch/mips/include/asm/mach-bcm63xx/dma-coherence.h+0−10

@@ -1,10 +0,0 @@
1	#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H
2	#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H
3
4	#include <asm/bmips.h>
5
6	#define plat_post_dma_flush bmips_post_dma_flush
7
8	#include <asm/mach-generic/dma-coherence.h>
9
10	#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */

arch/mips/include/asm/pgtable.h+31−0

@@ -182,8 +182,39 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) · 181 unmodified lines
182	* Make sure the buddy is global too (if it's !none,	182	* Make sure the buddy is global too (if it's !none,
183	* it better already be global)	183	* it better already be global)
184	*/	184	*/
		185	#ifdef CONFIG_SMP
		186	/*
		187	* For SMP, multiple CPUs can race, so we need to do
		188	* this atomically.
		189	*/
		190	#ifdef CONFIG_64BIT
		191	#define LL_INSN "lld"
		192	#define SC_INSN "scd"
		193	#else /* CONFIG_32BIT */
		194	#define LL_INSN "ll"
		195	#define SC_INSN "sc"
		196	#endif
		197	unsigned long page_global = _PAGE_GLOBAL;
		198	unsigned long tmp;
		199
		200	__asm__ __volatile__ (
		201	" .set push\n"
		202	" .set noreorder\n"
		203	"1: " LL_INSN " %[tmp], %[buddy]\n"
		204	" bnez %[tmp], 2f\n"
		205	" or %[tmp], %[tmp], %[global]\n"
		206	" " SC_INSN " %[tmp], %[buddy]\n"
		207	" beqz %[tmp], 1b\n"
		208	" nop\n"
		209	"2:\n"
		210	" .set pop"
		211	: [buddy] "+m" (buddy->pte),
		212	[tmp] "=&r" (tmp)
		213	: [global] "r" (page_global));
		214	#else /* !CONFIG_SMP */
185	if (pte_none(*buddy))	215	if (pte_none(*buddy))
186	pte_val(buddy) = pte_val(buddy) \| _PAGE_GLOBAL;	216	pte_val(buddy) = pte_val(buddy) \| _PAGE_GLOBAL;
		217	#endif /* CONFIG_SMP */
187	}	218	}
188	#endif	219	#endif
189	}	220	}

arch/mips/include/asm/smp.h+0−2

@@ -83,8 +83,6 @@ static inline void __cpu_die(unsigned int cpu) · 82 unmodified lines
83	extern void play_dead(void);	83	extern void play_dead(void);
84	#endif	84	#endif
85		85
86	extern asmlinkage void smp_call_function_interrupt(void);
87
88	static inline void arch_send_call_function_single_ipi(int cpu)	86	static inline void arch_send_call_function_single_ipi(int cpu)
89	{	87	{
90	extern struct plat_smp_ops mp_ops; / private */	88	extern struct plat_smp_ops mp_ops; / private */

arch/mips/include/asm/stackframe.h+25−0

@@ -152,6 +152,31 @@ · 151 unmodified lines
152	.set noreorder	152	.set noreorder
153	bltz k0, 8f	153	bltz k0, 8f
154	move k1, sp	154	move k1, sp
		155	#ifdef CONFIG_EVA
		156	/*
		157	* Flush interAptiv's Return Prediction Stack (RPS) by writing
		158	* EntryHi. Toggling Config7.RPS is slower and less portable.
		159	*
		160	* The RPS isn't automatically flushed when exceptions are
		161	* taken, which can result in kernel mode speculative accesses
		162	* to user addresses if the RPS mispredicts. That's harmless
		163	* when user and kernel share the same address space, but with
		164	* EVA the same user segments may be unmapped to kernel mode,
		165	* even containing sensitive MMIO regions or invalid memory.
		166	*
		167	* This can happen when the kernel sets the return address to
		168	* ret_from_* and jr's to the exception handler, which looks
		169	* more like a tail call than a function call. If nested calls
		170	* don't evict the last user address in the RPS, it will
		171	* mispredict the return and fetch from a user controlled
		172	* address into the icache.
		173	*
		174	* More recent EVA-capable cores with MAAR to restrict
		175	* speculative accesses aren't affected.
		176	*/
		177	MFC0 k0, CP0_ENTRYHI
		178	MTC0 k0, CP0_ENTRYHI
		179	#endif
155	.set reorder	180	.set reorder
156	/* Called from user mode, new stack. */	181	/* Called from user mode, new stack. */
157	get_saved_sp	182	get_saved_sp

arch/mips/kernel/mips-mt-fpaff.c+3−2

 				      unsigned long __user *user_mask_ptr)
 {
 	unsigned int real_len;
-	cpumask_t mask;
+	cpumask_t allowed, mask;
 	int retval;
 	struct task_struct *p;
 	if (retval)
 		goto out_unlock;
-	cpumask_and(&mask, &p->thread.user_cpus_allowed, cpu_possible_mask);
+	cpumask_or(&allowed, &p->thread.user_cpus_allowed, &p->cpus_allowed);
+	cpumask_and(&mask, &allowed, cpu_active_mask);
 out_unlock:
 	read_unlock(&tasklist_lock);

arch/mips/kernel/prom.c+1−1

@@ -38,7 +38,7 @@ char *mips_get_machine_name(void) · 37 unmodified lines
38	return mips_machine_name;	38	return mips_machine_name;
39	}	39	}
40		40
41	#ifdef CONFIG_OF	41	#ifdef CONFIG_USE_OF
42	void __init early_init_dt_add_memory_arch(u64 base, u64 size)	42	void __init early_init_dt_add_memory_arch(u64 base, u64 size)
43	{	43	{
44	return add_memory_region(base, size, BOOT_MEM_RAM);	44	return add_memory_region(base, size, BOOT_MEM_RAM);

arch/mips/kernel/relocate_kernel.S+4−4

@@ -24,7 +24,7 @@ LEAF(relocate_new_kernel) · 23 unmodified lines
24		24
25	process_entry:	25	process_entry:
26	PTR_L s2, (s0)	26	PTR_L s2, (s0)
27	PTR_ADD s0, s0, SZREG	27	PTR_ADDIU s0, s0, SZREG
28		28
29	/*	29	/*
30	* In case of a kdump/crash kernel, the indirection page is not	30	* In case of a kdump/crash kernel, the indirection page is not
@@ -61,9 +61,9 @@ copy_word: · 30 unmodified lines
61	/* copy page word by word */	61	/* copy page word by word */
62	REG_L s5, (s2)	62	REG_L s5, (s2)
63	REG_S s5, (s4)	63	REG_S s5, (s4)
64	PTR_ADD s4, s4, SZREG	64	PTR_ADDIU s4, s4, SZREG
65	PTR_ADD s2, s2, SZREG	65	PTR_ADDIU s2, s2, SZREG
66	LONG_SUB s6, s6, 1	66	LONG_ADDIU s6, s6, -1
67	beq s6, zero, process_entry	67	beq s6, zero, process_entry
68	b copy_word	68	b copy_word
69	b process_entry	69	b process_entry

arch/mips/kernel/signal32.c+0−2

@@ -409,8 +409,6 @@ int copy_siginfo_to_user32(compat_siginfo_t __user to, const siginfo_t from) · 408 unmodified lines
409		409
410	int copy_siginfo_from_user32(siginfo_t to, compat_siginfo_t __user from)	410	int copy_siginfo_from_user32(siginfo_t to, compat_siginfo_t __user from)
411	{	411	{
412	memset(to, 0, sizeof *to);
413
414	if (copy_from_user(to, from, 3*sizeof(int)) \|\|	412	if (copy_from_user(to, from, 3*sizeof(int)) \|\|
415	copy_from_user(to->_sifields._pad,	413	copy_from_user(to->_sifields._pad,
416	from->_sifields._pad, SI_PAD_SIZE32))	414	from->_sifields._pad, SI_PAD_SIZE32))

arch/mips/kernel/smp-bmips.c+2−2

@@ -284,7 +284,7 @@ static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id) · 283 unmodified lines
284	if (action == 0)	284	if (action == 0)
285	scheduler_ipi();	285	scheduler_ipi();
286	else	286	else
287	smp_call_function_interrupt();	287	generic_smp_call_function_interrupt();
288		288
289	return IRQ_HANDLED;	289	return IRQ_HANDLED;
290	}	290	}
@@ -336,7 +336,7 @@ static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id) · 45 unmodified lines
336	if (action & SMP_RESCHEDULE_YOURSELF)	336	if (action & SMP_RESCHEDULE_YOURSELF)
337	scheduler_ipi();	337	scheduler_ipi();
338	if (action & SMP_CALL_FUNCTION)	338	if (action & SMP_CALL_FUNCTION)
339	smp_call_function_interrupt();	339	generic_smp_call_function_interrupt();
340		340
341	return IRQ_HANDLED;	341	return IRQ_HANDLED;
342	}	342	}

arch/mips/kernel/smp.c+0−10

@@ -192,16 +192,6 @@ asmlinkage void start_secondary(void) · 191 unmodified lines
192	cpu_startup_entry(CPUHP_ONLINE);	192	cpu_startup_entry(CPUHP_ONLINE);
193	}	193	}
194		194
195	/*
196	* Call into both interrupt handlers, as we share the IPI for them
197	*/
198	void __irq_entry smp_call_function_interrupt(void)
199	{
200	irq_enter();
201	generic_smp_call_function_interrupt();
202	irq_exit();
203	}
204
205	static void stop_this_cpu(void *dummy)	195	static void stop_this_cpu(void *dummy)
206	{	196	{
207	/*	197	/*

arch/mips/kernel/traps.c+13−0

 void show_stack(struct task_struct *task, unsigned long *sp)
 {
 	struct pt_regs regs;
+	mm_segment_t old_fs = get_fs();
 	if (sp) {
 		regs.regs[29] = (unsigned long)sp;
 		regs.regs[31] = 0;
 			prepare_frametrace(&regs);
 		}
 	}
+	/*
+	 * show_stack() deals exclusively with kernel mode, so be sure to access
+	 * the stack in the kernel (not user) address space.
+	 */
+	set_fs(KERNEL_DS);
 	show_stacktrace(task, &regs);
+	set_fs(old_fs);
 }
 static void show_code(unsigned int __user *pc)
 	const int field = 2 * sizeof(unsigned long);
 	int multi_match = regs->cp0_status & ST0_TS;
 	enum ctx_state prev_state;
+	mm_segment_t old_fs = get_fs();
 	prev_state = exception_enter();
 	show_regs(regs);
 		dump_tlb_all();
 	}
+	if (!user_mode(regs))
+		set_fs(KERNEL_DS);
 	show_code((unsigned int __user *) regs->cp0_epc);
+	set_fs(old_fs);
 	/*
 	 * Some chips may have other causes of machine check (e.g. SB1
 	 * graduation timer)

arch/mips/kernel/unaligned.c+1−1

@@ -438,7 +438,7 @@ do { \ · 437 unmodified lines
438	: "memory"); \	438	: "memory"); \
439	} while(0)	439	} while(0)
440		440
441	#define StoreDW(addr, value, res) \	441	#define _StoreDW(addr, value, res) \
442	do { \	442	do { \
443	__asm__ __volatile__ ( \	443	__asm__ __volatile__ ( \
444	".set\tpush\n\t" \	444	".set\tpush\n\t" \

arch/mips/lantiq/irq.c+2−1

 static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
 {
-	smp_call_function_interrupt();
+	generic_smp_call_function_interrupt();
 	return IRQ_HANDLED;
 }
 {
 	return ltq_perfcount_irq;
 }
+EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
 unsigned int get_c0_compare_int(void)
 {

arch/mips/loongson64/loongson-3/smp.c+5−2

 	if (action & SMP_RESCHEDULE_YOURSELF)
 		scheduler_ipi();
-	if (action & SMP_CALL_FUNCTION)
+	if (action & SMP_CALL_FUNCTION) {
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
+	}
 	if (action & SMP_ASK_C0COUNT) {
 		BUG_ON(cpu != 0);

arch/mips/mm/cache.c+4−4

arch/mips/mm/fault.c+2−1

 #endif
 				goto bad_area;
 			}
-			if (!(vma->vm_flags & VM_READ)) {
+			if (!(vma->vm_flags & VM_READ) &&
+			    exception_epc(regs) != address) {
 #if 0
 				pr_notice("Cpu%d[%s:%d:%0*lx:%ld:%0*lx] RI violation\n",
 					  raw_smp_processor_id(),

arch/mips/mti-malta/malta-int.c+1−1

@@ -222,7 +222,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 221 unmodified lines
222		222
223	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)	223	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
224	{	224	{
225	smp_call_function_interrupt();	225	generic_smp_call_function_interrupt();
226		226
227	return IRQ_HANDLED;	227	return IRQ_HANDLED;
228	}	228	}

arch/mips/mti-malta/malta-time.c+10−6

 	return mips_cpu_perf_irq;
 }
+EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
 unsigned int get_c0_compare_int(void)
 {
 static void __init init_rtc(void)
 {
-	/* stop the clock whilst setting it up */
+	unsigned char freq, ctrl;
-	CMOS_WRITE(RTC_SET | RTC_24H, RTC_CONTROL);
-	/* 32KHz time base */
+	/* Set 32KHz time base if not already set */
-	CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT);
+	freq = CMOS_READ(RTC_FREQ_SELECT);
+	if ((freq & RTC_DIV_CTL) != RTC_REF_CLCK_32KHZ)
+		CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT);
-	/* start the clock */
+	/* Ensure SET bit is clear so RTC can run */
-	CMOS_WRITE(RTC_24H, RTC_CONTROL);
+	ctrl = CMOS_READ(RTC_CONTROL);
+	if (ctrl & RTC_SET)
+		CMOS_WRITE(ctrl & ~RTC_SET, RTC_CONTROL);
 }
 void __init plat_time_init(void)

arch/mips/mti-sead3/sead3-time.c+1−0

@@ -77,6 +77,7 @@ int get_c0_perfcount_int(void) · 76 unmodified lines
77	return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;	77	return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
78	return -1;	78	return -1;
79	}	79	}
		80	EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
80		81
81	unsigned int get_c0_compare_int(void)	82	unsigned int get_c0_compare_int(void)
82	{	83	{

arch/mips/netlogic/common/smp.c+1−1

@@ -86,7 +86,7 @@ void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc) · 85 unmodified lines
86	{	86	{
87	clear_c0_eimr(irq);	87	clear_c0_eimr(irq);
88	ack_c0_eirr(irq);	88	ack_c0_eirr(irq);
89	smp_call_function_interrupt();	89	generic_smp_call_function_interrupt();
90	set_c0_eimr(irq);	90	set_c0_eimr(irq);
91	}	91	}
92		92

arch/mips/paravirt/paravirt-smp.c+1−1

@@ -114,7 +114,7 @@ static irqreturn_t paravirt_reched_interrupt(int irq, void *dev_id) · 113 unmodified lines
114		114
115	static irqreturn_t paravirt_function_interrupt(int irq, void *dev_id)	115	static irqreturn_t paravirt_function_interrupt(int irq, void *dev_id)
116	{	116	{
117	smp_call_function_interrupt();	117	generic_smp_call_function_interrupt();
118	return IRQ_HANDLED;	118	return IRQ_HANDLED;
119	}	119	}
120		120

arch/mips/pistachio/time.c+1−0

@@ -26,6 +26,7 @@ int get_c0_perfcount_int(void) · 25 unmodified lines
26	{	26	{
27	return gic_get_c0_perfcount_int();	27	return gic_get_c0_perfcount_int();
28	}	28	}
		29	EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
29		30
30	int get_c0_fdc_int(void)	31	int get_c0_fdc_int(void)
31	{	32	{

arch/mips/pmcs-msp71xx/msp_smp.c+1−1

@@ -44,7 +44,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 43 unmodified lines
44		44
45	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)	45	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
46	{	46	{
47	smp_call_function_interrupt();	47	generic_smp_call_function_interrupt();
48		48
49	return IRQ_HANDLED;	49	return IRQ_HANDLED;
50	}	50	}

arch/mips/ralink/irq.c+1−0

@@ -89,6 +89,7 @@ int get_c0_perfcount_int(void) · 88 unmodified lines
89	{	89	{
90	return rt_perfcount_irq;	90	return rt_perfcount_irq;
91	}	91	}
		92	EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
92		93
93	unsigned int get_c0_compare_int(void)	94	unsigned int get_c0_compare_int(void)
94	{	95	{

arch/mips/sgi-ip27/ip27-irq.c+6−2

 		scheduler_ipi();
 	} else if (pend0 & (1UL << CPU_CALL_A_IRQ)) {
 		LOCAL_HUB_CLR_INTR(CPU_CALL_A_IRQ);
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
 	} else if (pend0 & (1UL << CPU_CALL_B_IRQ)) {
 		LOCAL_HUB_CLR_INTR(CPU_CALL_B_IRQ);
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
 	} else
 #endif
 	{

arch/mips/sibyte/bcm1480/smp.c+5−4

 #include <asm/sibyte/bcm1480_regs.h>
 #include <asm/sibyte/bcm1480_int.h>
-extern void smp_call_function_interrupt(void);
 /*
  * These are routines for dealing with the bcm1480 smp capabilities
  * independent of board/firmware
 	if (action & SMP_RESCHEDULE_YOURSELF)
 		scheduler_ipi();
-	if (action & SMP_CALL_FUNCTION)
+	if (action & SMP_CALL_FUNCTION) {
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
+	}
 }

arch/mips/sibyte/sb1250/smp.c+5−2

 	if (action & SMP_RESCHEDULE_YOURSELF)
 		scheduler_ipi();
-	if (action & SMP_CALL_FUNCTION)
+	if (action & SMP_CALL_FUNCTION) {
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
+	}
 }

arch/powerpc/kernel/signal_32.c+0−2

@@ -966,8 +966,6 @@ int copy_siginfo_to_user32(struct compat_siginfo __user d, const siginfo_t s) · 965 unmodified lines
966		966
967	int copy_siginfo_from_user32(siginfo_t to, struct compat_siginfo __user from)	967	int copy_siginfo_from_user32(siginfo_t to, struct compat_siginfo __user from)
968	{	968	{
969	memset(to, 0, sizeof *to);
970
971	if (copy_from_user(to, from, 3*sizeof(int)) \|\|	969	if (copy_from_user(to, from, 3*sizeof(int)) \|\|
972	copy_from_user(to->_sifields._pad,	970	copy_from_user(to->_sifields._pad,
973	from->_sifields._pad, SI_PAD_SIZE32))	971	from->_sifields._pad, SI_PAD_SIZE32))

arch/powerpc/platforms/powernv/eeh-powernv.c+1−1

@@ -1478,7 +1478,7 @@ static int pnv_eeh_next_error(struct eeh_pe **pe) · 1477 unmodified lines
1478	}	1478	}
1479		1479
1480	/* Unmask the event */	1480	/* Unmask the event */
1481	if (eeh_enabled())	1481	if (ret == EEH_NEXT_ERR_NONE && eeh_enabled())
1482	enable_irq(eeh_event_irq);	1482	enable_irq(eeh_event_irq);
1483		1483
1484	return ret;	1484	return ret;

arch/powerpc/platforms/powernv/pci-ioda.c+6−5

 static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned shift,
 		unsigned levels, unsigned long limit,
-		unsigned long *current_offset)
+		unsigned long *current_offset, unsigned long *total_allocated)
 {
 	struct page *tce_mem = NULL;
 	__be64 *addr, *tmp;
 	}
 	addr = page_address(tce_mem);
 	memset(addr, 0, allocated);
+	*total_allocated += allocated;
 	--levels;
 	if (!levels) {
 	for (i = 0; i < entries; ++i) {
 		tmp = pnv_pci_ioda2_table_do_alloc_pages(nid, shift,
-				levels, limit, current_offset);
+				levels, limit, current_offset, total_allocated);
 		if (!tmp)
 			break;
 		struct iommu_table *tbl)
 {
 	void *addr;
-	unsigned long offset = 0, level_shift;
+	unsigned long offset = 0, level_shift, total_allocated = 0;
 	const unsigned window_shift = ilog2(window_size);
 	unsigned entries_shift = window_shift - page_shift;
 	unsigned table_shift = max_t(unsigned, entries_shift + 3, PAGE_SHIFT);
 	/* Allocate TCE table */
 	addr = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift,
-			levels, tce_table_size, &offset);
+			levels, tce_table_size, &offset, &total_allocated);
 	/* addr==NULL means that the first level allocation failed */
 	if (!addr)
 			page_shift);
 	tbl->it_level_size = 1ULL << (level_shift - 3);
 	tbl->it_indirect_levels = levels - 1;
-	tbl->it_allocated_size = offset;
+	tbl->it_allocated_size = total_allocated;
 	pr_devel("Created TCE table: ws=%08llx ts=%lx @%08llx\n",
 			window_size, tce_table_size, bus_offset);

arch/s390/kvm/kvm-s390.c+2−2

 static int kvm_s390_handle_requests(struct kvm_vcpu *vcpu)
 {
-	if (!vcpu->requests)
-		return 0;
 retry:
 	kvm_s390_vcpu_request_handled(vcpu);
+	if (!vcpu->requests)
+		return 0;
 	/*
 	 * We use MMU_RELOAD just to re-arm the ipte notifier for the
 	 * guest prefix page. gmap_ipte_notify will wait on the ptl lock.

arch/sparc/include/asm/visasm.h+5−11

@@ -28,16 +28,10 @@ · 27 unmodified lines
28	* Must preserve %o5 between VISEntryHalf and VISExitHalf */	28	* Must preserve %o5 between VISEntryHalf and VISExitHalf */
29		29
30	#define VISEntryHalf \	30	#define VISEntryHalf \
31	rd %fprs, %o5; \	31	VISEntry
32	andcc %o5, FPRS_FEF, %g0; \	32
33	be,pt %icc, 297f; \	33	#define VISExitHalf \
34	sethi %hi(298f), %g7; \	34	VISExit
35	sethi %hi(VISenterhalf), %g1; \
36	jmpl %g1 + %lo(VISenterhalf), %g0; \
37	or %g7, %lo(298f), %g7; \
38	clr %o5; \
39	297: wr %o5, FPRS_FEF, %fprs; \
40	298:
41		35
42	#define VISEntryHalfFast(fail_label) \	36	#define VISEntryHalfFast(fail_label) \
43	rd %fprs, %o5; \	37	rd %fprs, %o5; \
@@ -47,7 +41,7 @@ · 3 unmodified lines
47	ba,a,pt %xcc, fail_label; \	41	ba,a,pt %xcc, fail_label; \
48	297: wr %o5, FPRS_FEF, %fprs;	42	297: wr %o5, FPRS_FEF, %fprs;
49		43
50	#define VISExitHalf \	44	#define VISExitHalfFast \
51	wr %o5, 0, %fprs;	45	wr %o5, 0, %fprs;
52		46
53	#ifndef __ASSEMBLY__	47	#ifndef __ASSEMBLY__

arch/sparc/lib/NG4memcpy.S+4−1

@@ -240,8 +240,11 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */ · 239 unmodified lines
240	add %o0, 0x40, %o0	240	add %o0, 0x40, %o0
241	bne,pt %icc, 1b	241	bne,pt %icc, 1b
242	LOAD(prefetch, %g1 + 0x200, #n_reads_strong)	242	LOAD(prefetch, %g1 + 0x200, #n_reads_strong)
		243	#ifdef NON_USER_COPY
		244	VISExitHalfFast
		245	#else
243	VISExitHalf	246	VISExitHalf
244		247	#endif
245	brz,pn %o2, .Lexit	248	brz,pn %o2, .Lexit
246	cmp %o2, 19	249	cmp %o2, 19
247	ble,pn %icc, .Lsmall_unaligned	250	ble,pn %icc, .Lsmall_unaligned

arch/sparc/lib/VISsave.S+2−65

@@ -44,9 +44,8 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3 · 43 unmodified lines
44		44
45	stx %g3, [%g6 + TI_GSR]	45	stx %g3, [%g6 + TI_GSR]
46	2: add %g6, %g1, %g3	46	2: add %g6, %g1, %g3
47	cmp %o5, FPRS_DU	47	mov FPRS_DU \| FPRS_DL \| FPRS_FEF, %o5
48	be,pn %icc, 6f	48	sll %g1, 3, %g1
49	sll %g1, 3, %g1
50	stb %o5, [%g3 + TI_FPSAVED]	49	stb %o5, [%g3 + TI_FPSAVED]
51	rd %gsr, %g2	50	rd %gsr, %g2
52	add %g6, %g1, %g3	51	add %g6, %g1, %g3
@@ -80,65 +79,3 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3 · 27 unmodified lines
80	.align 32	79	.align 32
81	80: jmpl %g7 + %g0, %g0	80	80: jmpl %g7 + %g0, %g0
82	nop	81	nop
83
84	6: ldub [%g3 + TI_FPSAVED], %o5
85	or %o5, FPRS_DU, %o5
86	add %g6, TI_FPREGS+0x80, %g2
87	stb %o5, [%g3 + TI_FPSAVED]
88
89	sll %g1, 5, %g1
90	add %g6, TI_FPREGS+0xc0, %g3
91	wr %g0, FPRS_FEF, %fprs
92	membar #Sync
93	stda %f32, [%g2 + %g1] ASI_BLK_P
94	stda %f48, [%g3 + %g1] ASI_BLK_P
95	membar #Sync
96	ba,pt %xcc, 80f
97	nop
98
99	.align 32
100	80: jmpl %g7 + %g0, %g0
101	nop
102
103	.align 32
104	VISenterhalf:
105	ldub [%g6 + TI_FPDEPTH], %g1
106	brnz,a,pn %g1, 1f
107	cmp %g1, 1
108	stb %g0, [%g6 + TI_FPSAVED]
109	stx %fsr, [%g6 + TI_XFSR]
110	clr %o5
111	jmpl %g7 + %g0, %g0
112	wr %g0, FPRS_FEF, %fprs
113
114	1: bne,pn %icc, 2f
115	srl %g1, 1, %g1
116	ba,pt %xcc, vis1
117	sub %g7, 8, %g7
118	2: addcc %g6, %g1, %g3
119	sll %g1, 3, %g1
120	andn %o5, FPRS_DU, %g2
121	stb %g2, [%g3 + TI_FPSAVED]
122
123	rd %gsr, %g2
124	add %g6, %g1, %g3
125	stx %g2, [%g3 + TI_GSR]
126	add %g6, %g1, %g2
127	stx %fsr, [%g2 + TI_XFSR]
128	sll %g1, 5, %g1
129	3: andcc %o5, FPRS_DL, %g0
130	be,pn %icc, 4f
131	add %g6, TI_FPREGS, %g2
132
133	add %g6, TI_FPREGS+0x40, %g3
134	membar #Sync
135	stda %f0, [%g2 + %g1] ASI_BLK_P
136	stda %f16, [%g3 + %g1] ASI_BLK_P
137	membar #Sync
138	ba,pt %xcc, 4f
139	nop
140
141	.align 32
142	4: and %o5, FPRS_DU, %o5
143	jmpl %g7 + %g0, %g0
144	wr %o5, FPRS_FEF, %fprs

arch/sparc/lib/ksyms.c+0−4

 void VISenter(void);
 EXPORT_SYMBOL(VISenter);
-/* CRYPTO code needs this */
-void VISenterhalf(void);
-EXPORT_SYMBOL(VISenterhalf);
 extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *);
 extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *,
 		unsigned long *);

arch/tile/kernel/compat_signal.c+0−2

@@ -113,8 +113,6 @@ int copy_siginfo_from_user32(siginfo_t to, struct compat_siginfo __user from) · 112 unmodified lines
113	if (!access_ok(VERIFY_READ, from, sizeof(struct compat_siginfo)))	113	if (!access_ok(VERIFY_READ, from, sizeof(struct compat_siginfo)))
114	return -EFAULT;	114	return -EFAULT;
115		115
116	memset(to, 0, sizeof(*to));
117
118	err = __get_user(to->si_signo, &from->si_signo);	116	err = __get_user(to->si_signo, &from->si_signo);
119	err \|= __get_user(to->si_errno, &from->si_errno);	117	err \|= __get_user(to->si_errno, &from->si_errno);
120	err \|= __get_user(to->si_code, &from->si_code);	118	err \|= __get_user(to->si_code, &from->si_code);

arch/x86/boot/compressed/eboot.c+4−0

 		unsigned int e820_type = 0;
 		unsigned long m = efi->efi_memmap;
+#ifdef CONFIG_X86_64
+		m |= (u64)efi->efi_memmap_hi << 32;
+#endif
 		d = (efi_memory_desc_t *)(m + (i * efi->efi_memdesc_size));
 		switch (d->type) {
 		case EFI_RESERVED_TYPE:

arch/x86/include/asm/desc.h+0−15

@@ -280,21 +280,6 @@ static inline void clear_LDT(void) · 279 unmodified lines
280	set_ldt(NULL, 0);	280	set_ldt(NULL, 0);
281	}	281	}
282		282
283	/*
284	* load one particular LDT into the current CPU
285	*/
286	static inline void load_LDT_nolock(mm_context_t *pc)
287	{
288	set_ldt(pc->ldt, pc->size);
289	}
290
291	static inline void load_LDT(mm_context_t *pc)
292	{
293	preempt_disable();
294	load_LDT_nolock(pc);
295	preempt_enable();
296	}
297
298	static inline unsigned long get_desc_base(const struct desc_struct *desc)	283	static inline unsigned long get_desc_base(const struct desc_struct *desc)
299	{	284	{
300	return (unsigned)(desc->base0 \| ((desc->base1) << 16) \| ((desc->base2) << 24));	285	return (unsigned)(desc->base0 \| ((desc->base1) << 16) \| ((desc->base2) << 24));

arch/x86/include/asm/mmu.h+1−2

@@ -9,8 +9,7 @@ · 8 unmodified lines
9	* we put the segment information here.	9	* we put the segment information here.
10	*/	10	*/
11	typedef struct {	11	typedef struct {
12	void *ldt;	12	struct ldt_struct *ldt;
13	int size;
14		13
15	#ifdef CONFIG_X86_64	14	#ifdef CONFIG_X86_64
16	/* True if mm supports a task running in 32 bit compatibility mode. */	15	/* True if mm supports a task running in 32 bit compatibility mode. */

arch/x86/include/asm/mmu_context.h+49−5

@@ -33,6 +33,50 @@ static inline void load_mm_cr4(struct mm_struct *mm) · 32 unmodified lines
33	static inline void load_mm_cr4(struct mm_struct *mm) {}	33	static inline void load_mm_cr4(struct mm_struct *mm) {}
34	#endif	34	#endif
35		35
		36	/*
		37	* ldt_structs can be allocated, used, and freed, but they are never
		38	* modified while live.
		39	*/
		40	struct ldt_struct {
		41	/*
		42	* Xen requires page-aligned LDTs with special permissions. This is
		43	* needed to prevent us from installing evil descriptors such as
		44	* call gates. On native, we could merge the ldt_struct and LDT
		45	* allocations, but it's not worth trying to optimize.
		46	*/
		47	struct desc_struct *entries;
		48	int size;
		49	};
		50
		51	static inline void load_mm_ldt(struct mm_struct *mm)
		52	{
		53	struct ldt_struct *ldt;
		54
		55	/* lockless_dereference synchronizes with smp_store_release */
		56	ldt = lockless_dereference(mm->context.ldt);
		57
		58	/*
		59	* Any change to mm->context.ldt is followed by an IPI to all
		60	* CPUs with the mm active. The LDT will not be freed until
		61	* after the IPI is handled by all such CPUs. This means that,
		62	* if the ldt_struct changes before we return, the values we see
		63	* will be safe, and the new values will be loaded before we run
		64	* any user code.
		65	*
		66	* NB: don't try to convert this to use RCU without extreme care.
		67	* We would still need IRQs off, because we don't want to change
		68	* the local LDT after an IPI loaded a newer value than the one
		69	* that we can see.
		70	*/
		71
		72	if (unlikely(ldt))
		73	set_ldt(ldt->entries, ldt->size);
		74	else
		75	clear_LDT();
		76
		77	DEBUG_LOCKS_WARN_ON(preemptible());
		78	}
		79
36	/*	80	/*
37	* Used for LDT copy/destruction.	81	* Used for LDT copy/destruction.
38	*/	82	*/
@@ -78,12 +122,12 @@ static inline void switch_mm(struct mm_struct prev, struct mm_struct next, · 39 unmodified lines
78	* was called and then modify_ldt changed	122	* was called and then modify_ldt changed
79	* prev->context.ldt but suppressed an IPI to this CPU.	123	* prev->context.ldt but suppressed an IPI to this CPU.
80	* In this case, prev->context.ldt != NULL, because we	124	* In this case, prev->context.ldt != NULL, because we
81	* never free an LDT while the mm still exists. That	125	* never set context.ldt to NULL while the mm still
82	* means that next->context.ldt != prev->context.ldt,	126	* exists. That means that next->context.ldt !=
83	* because mms never share an LDT.	127	* prev->context.ldt, because mms never share an LDT.
84	*/	128	*/
85	if (unlikely(prev->context.ldt != next->context.ldt))	129	if (unlikely(prev->context.ldt != next->context.ldt))
86	load_LDT_nolock(&next->context);	130	load_mm_ldt(next);
87	}	131	}
88	#ifdef CONFIG_SMP	132	#ifdef CONFIG_SMP
89	else {	133	else {
@@ -106,7 +150,7 @@ static inline void switch_mm(struct mm_struct prev, struct mm_struct next, · 16 unmodified lines
106	load_cr3(next->pgd);	150	load_cr3(next->pgd);
107	trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);	151	trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
108	load_mm_cr4(next);	152	load_mm_cr4(next);
109	load_LDT_nolock(&next->context);	153	load_mm_ldt(next);
110	}	154	}
111	}	155	}
112	#endif	156	#endif

arch/x86/include/asm/sigcontext.h+3−3

@@ -57,9 +57,9 @@ struct sigcontext { · 56 unmodified lines
57	unsigned long ip;	57	unsigned long ip;
58	unsigned long flags;	58	unsigned long flags;
59	unsigned short cs;	59	unsigned short cs;
60	unsigned short __pad2; /* Was called gs, but was always zero. */	60	unsigned short gs;
61	unsigned short __pad1; /* Was called fs, but was always zero. */	61	unsigned short fs;
62	unsigned short ss;	62	unsigned short __pad0;
63	unsigned long err;	63	unsigned long err;
64	unsigned long trapno;	64	unsigned long trapno;
65	unsigned long oldmask;	65	unsigned long oldmask;

arch/x86/include/uapi/asm/sigcontext.h+3−18

@@ -177,24 +177,9 @@ struct sigcontext { · 176 unmodified lines
177	__u64 rip;	177	__u64 rip;
178	__u64 eflags; /* RFLAGS */	178	__u64 eflags; /* RFLAGS */
179	__u16 cs;	179	__u16 cs;
180		180	__u16 gs;
181	/*	181	__u16 fs;
182	* Prior to 2.5.64 ("[PATCH] x86-64 updates for 2.5.64-bk3"),	182	__u16 __pad0;
183	* Linux saved and restored fs and gs in these slots. This
184	* was counterproductive, as fsbase and gsbase were never
185	* saved, so arch_prctl was presumably unreliable.
186	*
187	* If these slots are ever needed for any other purpose, there
188	* is some risk that very old 64-bit binaries could get
189	* confused. I doubt that many such binaries still work,
190	* though, since the same patch in 2.5.64 also removed the
191	* 64-bit set_thread_area syscall, so it appears that there is
192	* no TLS API that works in both pre- and post-2.5.64 kernels.
193	*/
194	__u16 __pad2; /* Was gs. */
195	__u16 __pad1; /* Was fs. */
196
197	__u16 ss;
198	__u64 err;	183	__u64 err;
199	__u64 trapno;	184	__u64 trapno;
200	__u64 oldmask;	185	__u64 oldmask;

arch/x86/kernel/apic/io_apic.c+1−1

@@ -943,7 +943,7 @@ static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info) · 942 unmodified lines
943	*/	943	*/
944	if (irq < nr_legacy_irqs() && data->count == 1) {	944	if (irq < nr_legacy_irqs() && data->count == 1) {
945	if (info->ioapic_trigger != data->trigger)	945	if (info->ioapic_trigger != data->trigger)
946	mp_register_handler(irq, data->trigger);	946	mp_register_handler(irq, info->ioapic_trigger);
947	data->entry.trigger = data->trigger = info->ioapic_trigger;	947	data->entry.trigger = data->trigger = info->ioapic_trigger;
948	data->entry.polarity = data->polarity = info->ioapic_polarity;	948	data->entry.polarity = data->polarity = info->ioapic_polarity;
949	}	949	}

arch/x86/kernel/cpu/common.c+2−2

@@ -1410,7 +1410,7 @@ void cpu_init(void) · 1409 unmodified lines
1410	load_sp0(t, &current->thread);	1410	load_sp0(t, &current->thread);
1411	set_tss_desc(cpu, t);	1411	set_tss_desc(cpu, t);
1412	load_TR_desc();	1412	load_TR_desc();
1413	load_LDT(&init_mm.context);	1413	load_mm_ldt(&init_mm);
1414		1414
1415	clear_all_debug_regs();	1415	clear_all_debug_regs();
1416	dbg_restore_debug_regs();	1416	dbg_restore_debug_regs();
@@ -1459,7 +1459,7 @@ void cpu_init(void) · 42 unmodified lines
1459	load_sp0(t, thread);	1459	load_sp0(t, thread);
1460	set_tss_desc(cpu, t);	1460	set_tss_desc(cpu, t);
1461	load_TR_desc();	1461	load_TR_desc();
1462	load_LDT(&init_mm.context);	1462	load_mm_ldt(&init_mm);
1463		1463
1464	t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);	1464	t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
1465		1465

arch/x86/kernel/cpu/perf_event.c+8−4

 	int idx = segment >> 3;
 	if ((segment & SEGMENT_TI_MASK) == SEGMENT_LDT) {
+		struct ldt_struct *ldt;
 		if (idx > LDT_ENTRIES)
 			return 0;
-		if (idx > current->active_mm->context.size)
+		/* IRQs are off, so this synchronizes with smp_store_release */
+		ldt = lockless_dereference(current->active_mm->context.ldt);
+		if (!ldt || idx > ldt->size)
 			return 0;
-		desc = current->active_mm->context.ldt;
+		desc = &ldt->entries[idx];
 	} else {
 		if (idx > GDT_ENTRIES)
 			return 0;
-		desc = raw_cpu_ptr(gdt_page.gdt);
+		desc = raw_cpu_ptr(gdt_page.gdt) + idx;
 	}
-	return get_desc_base(desc + idx);
+	return get_desc_base(desc);
 }
 #ifdef CONFIG_COMPAT

arch/x86/kernel/ldt.c+142−120

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	#include <linux/string.h>	12	#include <linux/string.h>
13	#include <linux/mm.h>	13	#include <linux/mm.h>
14	#include <linux/smp.h>	14	#include <linux/smp.h>
		15	#include <linux/slab.h>
15	#include <linux/vmalloc.h>	16	#include <linux/vmalloc.h>
16	#include <linux/uaccess.h>	17	#include <linux/uaccess.h>
17		18
@@ -20,82 +21,82 @@ · 2 unmodified lines
20	#include <asm/mmu_context.h>	21	#include <asm/mmu_context.h>
21	#include <asm/syscalls.h>	22	#include <asm/syscalls.h>
22		23
23	#ifdef CONFIG_SMP	24	/* context.lock is held for us, so we don't need any locking. */
24	static void flush_ldt(void *current_mm)	25	static void flush_ldt(void *current_mm)
25	{	26	{
26	if (current->active_mm == current_mm)	27	mm_context_t *pc;
27	load_LDT(&current->active_mm->context);	28
		29	if (current->active_mm != current_mm)
		30	return;
		31
		32	pc = &current->active_mm->context;
		33	set_ldt(pc->ldt->entries, pc->ldt->size);
28	}	34	}
29	#endif
30		35
31	static int alloc_ldt(mm_context_t *pc, int mincount, int reload)	36	/* The caller must call finalize_ldt_struct on the result. LDT starts zeroed. */
		37	static struct ldt_struct *alloc_ldt_struct(int size)
32	{	38	{
33	void oldldt, newldt;	39	struct ldt_struct *new_ldt;
34	int oldsize;	40	int alloc_size;
35		41
36	if (mincount <= pc->size)	42	if (size > LDT_ENTRIES)
37	return 0;	43	return NULL;
38	oldsize = pc->size;	44
39	mincount = (mincount + (PAGE_SIZE / LDT_ENTRY_SIZE - 1)) &	45	new_ldt = kmalloc(sizeof(struct ldt_struct), GFP_KERNEL);
40	(~(PAGE_SIZE / LDT_ENTRY_SIZE - 1));	46	if (!new_ldt)
41	if (mincount * LDT_ENTRY_SIZE > PAGE_SIZE)	47	return NULL;
42	newldt = vmalloc(mincount * LDT_ENTRY_SIZE);	48
		49	BUILD_BUG_ON(LDT_ENTRY_SIZE != sizeof(struct desc_struct));
		50	alloc_size = size * LDT_ENTRY_SIZE;
		51
		52	/*
		53	* Xen is very picky: it requires a page-aligned LDT that has no
		54	* trailing nonzero bytes in any page that contains LDT descriptors.
		55	* Keep it simple: zero the whole allocation and never allocate less
		56	* than PAGE_SIZE.
		57	*/
		58	if (alloc_size > PAGE_SIZE)
		59	new_ldt->entries = vzalloc(alloc_size);
43	else	60	else
44	newldt = (void *)__get_free_page(GFP_KERNEL);	61	new_ldt->entries = kzalloc(PAGE_SIZE, GFP_KERNEL);
45
46	if (!newldt)
47	return -ENOMEM;
48		62
49	if (oldsize)	63	if (!new_ldt->entries) {
50	memcpy(newldt, pc->ldt, oldsize * LDT_ENTRY_SIZE);	64	kfree(new_ldt);
51	oldldt = pc->ldt;	65	return NULL;
52	memset(newldt + oldsize * LDT_ENTRY_SIZE, 0,	66	}
53	(mincount - oldsize) * LDT_ENTRY_SIZE);
54		67
55	paravirt_alloc_ldt(newldt, mincount);	68	new_ldt->size = size;
		69	return new_ldt;
		70	}
56		71
57	#ifdef CONFIG_X86_64	72	/* After calling this, the LDT is immutable. */
58	/* CHECKME: Do we really need this ? */	73	static void finalize_ldt_struct(struct ldt_struct *ldt)
59	wmb();	74	{
60	#endif	75	paravirt_alloc_ldt(ldt->entries, ldt->size);
61	pc->ldt = newldt;
62	wmb();
63	pc->size = mincount;
64	wmb();
65
66	if (reload) {
67	#ifdef CONFIG_SMP
68	preempt_disable();
69	load_LDT(pc);
70	if (!cpumask_equal(mm_cpumask(current->mm),
71	cpumask_of(smp_processor_id())))
72	smp_call_function(flush_ldt, current->mm, 1);
73	preempt_enable();
74	#else
75	load_LDT(pc);
76	#endif
77	}
78	if (oldsize) {
79	paravirt_free_ldt(oldldt, oldsize);
80	if (oldsize * LDT_ENTRY_SIZE > PAGE_SIZE)
81	vfree(oldldt);
82	else
83	put_page(virt_to_page(oldldt));
84	}
85	return 0;
86	}	76	}
87		77
88	static inline int copy_ldt(mm_context_t new, mm_context_t old)	78	/* context.lock is held */
		79	static void install_ldt(struct mm_struct *current_mm,
		80	struct ldt_struct *ldt)
89	{	81	{
90	int err = alloc_ldt(new, old->size, 0);	82	/* Synchronizes with lockless_dereference in load_mm_ldt. */
91	int i;	83	smp_store_release(&current_mm->context.ldt, ldt);
		84
		85	/* Activate the LDT for all CPUs using current_mm. */
		86	on_each_cpu_mask(mm_cpumask(current_mm), flush_ldt, current_mm, true);
		87	}
92		88
93	if (err < 0)	89	static void free_ldt_struct(struct ldt_struct *ldt)
94	return err;	90	{
		91	if (likely(!ldt))
		92	return;
95		93
96	for (i = 0; i < old->size; i++)	94	paravirt_free_ldt(ldt->entries, ldt->size);
97	write_ldt_entry(new->ldt, i, old->ldt + i * LDT_ENTRY_SIZE);	95	if (ldt->size * LDT_ENTRY_SIZE > PAGE_SIZE)
98	return 0;	96	vfree(ldt->entries);
		97	else
		98	kfree(ldt->entries);
		99	kfree(ldt);
99	}	100	}
100		101
101	/*	102	/*
@@ -104,17 +105,37 @@ static inline int copy_ldt(mm_context_t new, mm_context_t old) · 2 unmodified lines
104	*/	105	*/
105	int init_new_context(struct task_struct tsk, struct mm_struct mm)	106	int init_new_context(struct task_struct tsk, struct mm_struct mm)
106	{	107	{
		108	struct ldt_struct *new_ldt;
107	struct mm_struct *old_mm;	109	struct mm_struct *old_mm;
108	int retval = 0;	110	int retval = 0;
109		111
110	mutex_init(&mm->context.lock);	112	mutex_init(&mm->context.lock);
111	mm->context.size = 0;
112	old_mm = current->mm;	113	old_mm = current->mm;
113	if (old_mm && old_mm->context.size > 0) {	114	if (!old_mm) {
114	mutex_lock(&old_mm->context.lock);	115	mm->context.ldt = NULL;
115	retval = copy_ldt(&mm->context, &old_mm->context);	116	return 0;
116	mutex_unlock(&old_mm->context.lock);
117	}	117	}
		118
		119	mutex_lock(&old_mm->context.lock);
		120	if (!old_mm->context.ldt) {
		121	mm->context.ldt = NULL;
		122	goto out_unlock;
		123	}
		124
		125	new_ldt = alloc_ldt_struct(old_mm->context.ldt->size);
		126	if (!new_ldt) {
		127	retval = -ENOMEM;
		128	goto out_unlock;
		129	}
		130
		131	memcpy(new_ldt->entries, old_mm->context.ldt->entries,
		132	new_ldt->size * LDT_ENTRY_SIZE);
		133	finalize_ldt_struct(new_ldt);
		134
		135	mm->context.ldt = new_ldt;
		136
		137	out_unlock:
		138	mutex_unlock(&old_mm->context.lock);
118	return retval;	139	return retval;
119	}	140	}
120		141
@@ -125,53 +146,47 @@ int init_new_context(struct task_struct tsk, struct mm_struct mm) · 4 unmodified lines
125	*/	146	*/
126	void destroy_context(struct mm_struct *mm)	147	void destroy_context(struct mm_struct *mm)
127	{	148	{
128	if (mm->context.size) {	149	free_ldt_struct(mm->context.ldt);
129	#ifdef CONFIG_X86_32	150	mm->context.ldt = NULL;
130	/* CHECKME: Can this ever happen ? */
131	if (mm == current->active_mm)
132	clear_LDT();
133	#endif
134	paravirt_free_ldt(mm->context.ldt, mm->context.size);
135	if (mm->context.size * LDT_ENTRY_SIZE > PAGE_SIZE)
136	vfree(mm->context.ldt);
137	else
138	put_page(virt_to_page(mm->context.ldt));
139	mm->context.size = 0;
140	}
141	}	151	}
142		152
143	static int read_ldt(void __user *ptr, unsigned long bytecount)	153	static int read_ldt(void __user *ptr, unsigned long bytecount)
144	{	154	{
145	int err;	155	int retval;
146	unsigned long size;	156	unsigned long size;
147	struct mm_struct *mm = current->mm;	157	struct mm_struct *mm = current->mm;
148		158
149	if (!mm->context.size)	159	mutex_lock(&mm->context.lock);
150	return 0;	160
		161	if (!mm->context.ldt) {
		162	retval = 0;
		163	goto out_unlock;
		164	}
		165
151	if (bytecount > LDT_ENTRY_SIZE * LDT_ENTRIES)	166	if (bytecount > LDT_ENTRY_SIZE * LDT_ENTRIES)
152	bytecount = LDT_ENTRY_SIZE * LDT_ENTRIES;	167	bytecount = LDT_ENTRY_SIZE * LDT_ENTRIES;
153		168
154	mutex_lock(&mm->context.lock);	169	size = mm->context.ldt->size * LDT_ENTRY_SIZE;
155	size = mm->context.size * LDT_ENTRY_SIZE;
156	if (size > bytecount)	170	if (size > bytecount)
157	size = bytecount;	171	size = bytecount;
158		172
159	err = 0;	173	if (copy_to_user(ptr, mm->context.ldt->entries, size)) {
160	if (copy_to_user(ptr, mm->context.ldt, size))	174	retval = -EFAULT;
161	err = -EFAULT;	175	goto out_unlock;
162	mutex_unlock(&mm->context.lock);	176	}
163	if (err < 0)	177
164	goto error_return;
165	if (size != bytecount) {	178	if (size != bytecount) {
166	/* zero-fill the rest */	179	/* Zero-fill the rest and pretend we read bytecount bytes. */
167	if (clear_user(ptr + size, bytecount - size) != 0) {	180	if (clear_user(ptr + size, bytecount - size)) {
168	err = -EFAULT;	181	retval = -EFAULT;
169	goto error_return;	182	goto out_unlock;
170	}	183	}
171	}	184	}
172	return bytecount;	185	retval = bytecount;
173	error_return:	186
174	return err;	187	out_unlock:
		188	mutex_unlock(&mm->context.lock);
		189	return retval;
175	}	190	}
176		191
177	static int read_default_ldt(void __user *ptr, unsigned long bytecount)	192	static int read_default_ldt(void __user *ptr, unsigned long bytecount)
@@ -195,6 +210,8 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) · 17 unmodified lines
195	struct desc_struct ldt;	210	struct desc_struct ldt;
196	int error;	211	int error;
197	struct user_desc ldt_info;	212	struct user_desc ldt_info;
		213	int oldsize, newsize;
		214	struct ldt_struct new_ldt, old_ldt;
198		215
199	error = -EINVAL;	216	error = -EINVAL;
200	if (bytecount != sizeof(ldt_info))	217	if (bytecount != sizeof(ldt_info))
@@ -213,34 +230,39 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) · 12 unmodified lines
213	goto out;	230	goto out;
214	}	231	}
215		232
216	mutex_lock(&mm->context.lock);	233	if ((oldmode && !ldt_info.base_addr && !ldt_info.limit) \|\|
217	if (ldt_info.entry_number >= mm->context.size) {	234	LDT_empty(&ldt_info)) {
218	error = alloc_ldt(&current->mm->context,	235	/* The user wants to clear the entry. */
219	ldt_info.entry_number + 1, 1);	236	memset(&ldt, 0, sizeof(ldt));
220	if (error < 0)	237	} else {
221	goto out_unlock;	238	if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) {
222	}	239	error = -EINVAL;
223		240	goto out;
224	/* Allow LDTs to be cleared by the user. */
225	if (ldt_info.base_addr == 0 && ldt_info.limit == 0) {
226	if (oldmode \|\| LDT_empty(&ldt_info)) {
227	memset(&ldt, 0, sizeof(ldt));
228	goto install;
229	}	241	}
		242
		243	fill_ldt(&ldt, &ldt_info);
		244	if (oldmode)
		245	ldt.avl = 0;
230	}	246	}
231		247
232	if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) {	248	mutex_lock(&mm->context.lock);
233	error = -EINVAL;	249
		250	old_ldt = mm->context.ldt;
		251	oldsize = old_ldt ? old_ldt->size : 0;
		252	newsize = max((int)(ldt_info.entry_number + 1), oldsize);
		253
		254	error = -ENOMEM;
		255	new_ldt = alloc_ldt_struct(newsize);
		256	if (!new_ldt)
234	goto out_unlock;	257	goto out_unlock;
235	}
236		258
237	fill_ldt(&ldt, &ldt_info);	259	if (old_ldt)
238	if (oldmode)	260	memcpy(new_ldt->entries, old_ldt->entries, oldsize * LDT_ENTRY_SIZE);
239	ldt.avl = 0;	261	new_ldt->entries[ldt_info.entry_number] = ldt;
		262	finalize_ldt_struct(new_ldt);
240		263
241	/* Install the new entry ... */	264	install_ldt(mm, new_ldt);
242	install:	265	free_ldt_struct(old_ldt);
243	write_ldt_entry(mm->context.ldt, ldt_info.entry_number, &ldt);
244	error = 0;	266	error = 0;
245		267
246	out_unlock:	268	out_unlock:

arch/x86/kernel/process_64.c+2−2

@@ -121,11 +121,11 @@ void __show_regs(struct pt_regs *regs, int all) · 120 unmodified lines
121	void release_thread(struct task_struct *dead_task)	121	void release_thread(struct task_struct *dead_task)
122	{	122	{
123	if (dead_task->mm) {	123	if (dead_task->mm) {
124	if (dead_task->mm->context.size) {	124	if (dead_task->mm->context.ldt) {
125	pr_warn("WARNING: dead process %s still has LDT? <%p/%d>\n",	125	pr_warn("WARNING: dead process %s still has LDT? <%p/%d>\n",
126	dead_task->comm,	126	dead_task->comm,
127	dead_task->mm->context.ldt,	127	dead_task->mm->context.ldt,
128	dead_task->mm->context.size);	128	dead_task->mm->context.ldt->size);
129	BUG();	129	BUG();
130	}	130	}
131	}	131	}

arch/x86/kernel/signal.c+11−15

 		COPY(r15);
 #endif /* CONFIG_X86_64 */
+#ifdef CONFIG_X86_32
 		COPY_SEG_CPL3(cs);
 		COPY_SEG_CPL3(ss);
+#else /* !CONFIG_X86_32 */
+		/* Kernel saves and restores only the CS segment register on signals,
+		 * which is the bare minimum needed to allow mixed 32/64-bit code.
+		 * App's signal handler can save/restore other segments if needed. */
+		COPY_SEG_CPL3(cs);
+#endif /* CONFIG_X86_32 */
 		get_user_ex(tmpflags, &sc->flags);
 		regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
 #else /* !CONFIG_X86_32 */
 		put_user_ex(regs->flags, &sc->flags);
 		put_user_ex(regs->cs, &sc->cs);
-		put_user_ex(0, &sc->__pad2);
+		put_user_ex(0, &sc->gs);
-		put_user_ex(0, &sc->__pad1);
+		put_user_ex(0, &sc->fs);
-		put_user_ex(regs->ss, &sc->ss);
 #endif /* CONFIG_X86_32 */
 		put_user_ex(fpstate, &sc->fpstate);
 	regs->sp = (unsigned long)frame;
-	/*
+	/* Set up the CS register to run signal handlers in 64-bit mode,
-	 * Set up the CS and SS registers to run signal handlers in
+	   even if the handler happens to be interrupting 32-bit code. */
-	 * 64-bit mode, even if the handler happens to be interrupting
-	 * 32-bit or 16-bit code.
-	 *
-	 * SS is subtle.  In 64-bit mode, we don't need any particular
-	 * SS descriptor, but we do need SS to be valid.  It's possible
-	 * that the old SS is entirely bogus -- this can happen if the
-	 * signal we're trying to deliver is #GP or #SS caused by a bad
-	 * SS value.
-	 */
 	regs->cs = __USER_CS;
-	regs->ss = __USER_DS;
 	return 0;
 }

arch/x86/kernel/step.c+4−2

 #include <linux/mm.h>
 #include <linux/ptrace.h>
 #include <asm/desc.h>
+#include <asm/mmu_context.h>
 unsigned long convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs)
 {
 		seg &= ~7UL;
 		mutex_lock(&child->mm->context.lock);
-		if (unlikely((seg >> 3) >= child->mm->context.size))
+		if (unlikely(!child->mm->context.ldt ||
+			     (seg >> 3) >= child->mm->context.ldt->size))
 			addr = -1L; /* bogus selector, access would fault */
 		else {
-			desc = child->mm->context.ldt + seg;
+			desc = &child->mm->context.ldt->entries[seg];
 			base = get_desc_base(desc);
 			/* 16-bit code segment? */

arch/x86/kvm/mtrr.c+4−4

 	if (iter.mtrr_disabled)
 		return mtrr_disabled_type();
+	/* not contained in any MTRRs. */
+	if (type == -1)
+		return mtrr_default_type(mtrr_state);
 	/*
 	 * We just check one page, partially covered by MTRRs is
 	 * impossible.
 	 */
 	WARN_ON(iter.partial_map);
-	/* not contained in any MTRRs. */
-	if (type == -1)
-		return mtrr_default_type(mtrr_state);
 	return type;
 }
 EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);

arch/x86/platform/efi/efi.c+5−0

 static int __init arch_parse_efi_cmdline(char *str)
 {
+	if (!str) {
+		pr_warn("need at least one option\n");
+		return -EINVAL;
+	}
 	if (parse_option_str(str, "old_map"))
 		set_bit(EFI_OLD_MEMMAP, &efi.flags);
 	if (parse_option_str(str, "debug"))

arch/x86/power/cpu.c+2−1

 #include <asm/fpu/internal.h>
 #include <asm/debugreg.h>
 #include <asm/cpu.h>
+#include <asm/mmu_context.h>
 #ifdef CONFIG_X86_32
 __visible unsigned long saved_context_ebx;
 	syscall_init();				/* This sets MSR_*STAR and related */
 #endif
 	load_TR_desc();				/* This does ltr */
-	load_LDT(&current->active_mm->context);	/* This does lldt */
+	load_mm_ldt(current->active_mm);	/* This does lldt */
 	fpu__resume_cpu();
 }

arch/x86/xen/Makefile+2−2

@@ -13,13 +13,13 @@ CFLAGS_mmu.o := $(nostackp) · 12 unmodified lines
13	obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \	13	obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \
14	time.o xen-asm.o xen-asm_$(BITS).o \	14	time.o xen-asm.o xen-asm_$(BITS).o \
15	grant-table.o suspend.o platform-pci-unplug.o \	15	grant-table.o suspend.o platform-pci-unplug.o \
16	p2m.o	16	p2m.o apic.o
17		17
18	obj-$(CONFIG_EVENT_TRACING) += trace.o	18	obj-$(CONFIG_EVENT_TRACING) += trace.o
19		19
20	obj-$(CONFIG_SMP) += smp.o	20	obj-$(CONFIG_SMP) += smp.o
21	obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o	21	obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o
22	obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o	22	obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o
23	obj-$(CONFIG_XEN_DOM0) += apic.o vga.o	23	obj-$(CONFIG_XEN_DOM0) += vga.o
24	obj-$(CONFIG_SWIOTLB_XEN) += pci-swiotlb-xen.o	24	obj-$(CONFIG_SWIOTLB_XEN) += pci-swiotlb-xen.o
25	obj-$(CONFIG_XEN_EFI) += efi.o	25	obj-$(CONFIG_XEN_EFI) += efi.o

arch/x86/xen/enlighten.c+40−0

@@ -483,6 +483,7 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 482 unmodified lines
483	pte_t pte;	483	pte_t pte;
484	unsigned long pfn;	484	unsigned long pfn;
485	struct page *page;	485	struct page *page;
		486	unsigned char dummy;
486		487
487	ptep = lookup_address((unsigned long)v, &level);	488	ptep = lookup_address((unsigned long)v, &level);
488	BUG_ON(ptep == NULL);	489	BUG_ON(ptep == NULL);
@@ -492,6 +493,32 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 3 unmodified lines
492		493
493	pte = pfn_pte(pfn, prot);	494	pte = pfn_pte(pfn, prot);
494		495
		496	/*
		497	* Careful: update_va_mapping() will fail if the virtual address
		498	* we're poking isn't populated in the page tables. We don't
		499	* need to worry about the direct map (that's always in the page
		500	* tables), but we need to be careful about vmap space. In
		501	* particular, the top level page table can lazily propagate
		502	* entries between processes, so if we've switched mms since we
		503	* vmapped the target in the first place, we might not have the
		504	* top-level page table entry populated.
		505	*
		506	* We disable preemption because we want the same mm active when
		507	* we probe the target and when we issue the hypercall. We'll
		508	* have the same nominal mm, but if we're a kernel thread, lazy
		509	* mm dropping could change our pgd.
		510	*
		511	* Out of an abundance of caution, this uses __get_user() to fault
		512	* in the target address just in case there's some obscure case
		513	* in which the target address isn't readable.
		514	*/
		515
		516	preempt_disable();
		517
		518	pagefault_disable(); /* Avoid warnings due to being atomic. */
		519	__get_user(dummy, (unsigned char __user __force *)v);
		520	pagefault_enable();
		521
495	if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))	522	if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
496	BUG();	523	BUG();
497		524
@@ -503,6 +530,8 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 5 unmodified lines
503	BUG();	530	BUG();
504	} else	531	} else
505	kmap_flush_unused();	532	kmap_flush_unused();
		533
		534	preempt_enable();
506	}	535	}
507		536
508	static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)	537	static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
@@ -510,6 +539,17 @@ static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) · 1 unmodified line
510	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;	539	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
511	int i;	540	int i;
512		541
		542	/*
		543	* We need to mark the all aliases of the LDT pages RO. We
		544	* don't need to call vm_flush_aliases(), though, since that's
		545	* only responsible for flushing aliases out the TLBs, not the
		546	* page tables, and Xen will flush the TLB for us if needed.
		547	*
		548	* To avoid confusing future readers: none of this is necessary
		549	* to load the LDT. The hypervisor only checks this when the
		550	* LDT is faulted in due to subsequent descriptor access.
		551	*/
		552
513	for(i = 0; i < entries; i += entries_per_page)	553	for(i = 0; i < entries; i += entries_per_page)
514	set_aliased_prot(ldt + i, PAGE_KERNEL_RO);	554	set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
515	}	555	}

arch/x86/xen/xen-ops.h+2−4

 #ifdef CONFIG_XEN_DOM0
 void __init xen_init_vga(const struct dom0_vga_console_info *, size_t size);
-void __init xen_init_apic(void);
 #else
 static inline void __init xen_init_vga(const struct dom0_vga_console_info *info,
 				       size_t size)
 {
 }
-static inline void __init xen_init_apic(void)
-{
-}
 #endif
+void __init xen_init_apic(void);
 #ifdef CONFIG_XEN_EFI
 extern void xen_efi_init(void);
 #else

drivers/base/regmap/regcache-rbtree.c+14−5

 	if (!blk)
 		return -ENOMEM;
-	present = krealloc(rbnode->cache_present,
+	if (BITS_TO_LONGS(blklen) > BITS_TO_LONGS(rbnode->blklen)) {
-		    BITS_TO_LONGS(blklen) * sizeof(*present), GFP_KERNEL);
+		present = krealloc(rbnode->cache_present,
-	if (!present) {
+				   BITS_TO_LONGS(blklen) * sizeof(*present),
-		kfree(blk);
+				   GFP_KERNEL);
-		return -ENOMEM;
+		if (!present) {
+			kfree(blk);
+			return -ENOMEM;
+		}
+		memset(present + BITS_TO_LONGS(rbnode->blklen), 0,
+		       (BITS_TO_LONGS(blklen) - BITS_TO_LONGS(rbnode->blklen))
+		       * sizeof(*present));
+	} else {
+		present = rbnode->cache_present;
 	}
 	/* insert the register value in the correct place in the rbnode block */

drivers/block/rbd.c+17−5

 #  define rbd_assert(expr)	((void) 0)
 #endif /* !RBD_DEBUG */
+static void rbd_osd_copyup_callback(struct rbd_obj_request *obj_request);
 static int rbd_img_obj_request_submit(struct rbd_obj_request *obj_request);
 static void rbd_img_parent_read(struct rbd_obj_request *obj_request);
 static void rbd_dev_remove_parent(struct rbd_device *rbd_dev);
 	obj_request_done_set(obj_request);
 }
+static void rbd_osd_call_callback(struct rbd_obj_request *obj_request)
+{
+	dout("%s: obj %p\n", __func__, obj_request);
+	if (obj_request_img_data_test(obj_request))
+		rbd_osd_copyup_callback(obj_request);
+	else
+		obj_request_done_set(obj_request);
+}
 static void rbd_osd_req_callback(struct ceph_osd_request *osd_req,
 				struct ceph_msg *msg)
 {
 		rbd_osd_discard_callback(obj_request);
 		break;
 	case CEPH_OSD_OP_CALL:
+		rbd_osd_call_callback(obj_request);
+		break;
 	case CEPH_OSD_OP_NOTIFY_ACK:
 	case CEPH_OSD_OP_WATCH:
 		rbd_osd_trivial_callback(obj_request);
 }
 static void
-rbd_img_obj_copyup_callback(struct rbd_obj_request *obj_request)
+rbd_osd_copyup_callback(struct rbd_obj_request *obj_request)
 {
 	struct rbd_img_request *img_request;
 	struct rbd_device *rbd_dev;
 	struct page **pages;
 	u32 page_count;
+	dout("%s: obj %p\n", __func__, obj_request);
 	rbd_assert(obj_request->type == OBJ_REQUEST_BIO ||
 		obj_request->type == OBJ_REQUEST_NODATA);
 	rbd_assert(obj_request_img_data_test(obj_request));
 	if (!obj_request->result)
 		obj_request->xferred = obj_request->length;
-	/* Finish up with the normal image object callback */
+	obj_request_done_set(obj_request);
-	rbd_img_obj_callback(obj_request);
 }
 static void
 	/* All set, send it off. */
-	orig_request->callback = rbd_img_obj_copyup_callback;
 	osdc = &rbd_dev->rbd_client->client->osdc;
 	img_result = rbd_obj_request_submit(osdc, orig_request);
 	if (!img_result)

drivers/block/xen-blkback/blkback.c+2−2

@@ -369,8 +369,8 @@ static void purge_persistent_gnt(struct xen_blkif *blkif) · 368 unmodified lines
369	return;	369	return;
370	}	370	}
371		371
372	if (work_pending(&blkif->persistent_purge_work)) {	372	if (work_busy(&blkif->persistent_purge_work)) {
373	pr_alert_ratelimited("Scheduled work from previous purge is still pending, cannot purge list\n");	373	pr_alert_ratelimited("Scheduled work from previous purge is still busy, cannot purge list\n");
374	return;	374	return;
375	}	375	}
376		376

drivers/block/xen-blkfront.c+72−56

 	((_segs + SEGS_PER_INDIRECT_FRAME - 1)/SEGS_PER_INDIRECT_FRAME)
 static int blkfront_setup_indirect(struct blkfront_info *info);
+static int blkfront_gather_backend_features(struct blkfront_info *info);
 static int get_id_from_freelist(struct blkfront_info *info)
 {
 				 * Add the used indirect page back to the list of
 				 * available pages for indirect grefs.
 				 */
-				indirect_page = pfn_to_page(s->indirect_grants[i]->pfn);
+				if (!info->feature_persistent) {
-				list_add(&indirect_page->lru, &info->indirect_pages);
+					indirect_page = pfn_to_page(s->indirect_grants[i]->pfn);
+					list_add(&indirect_page->lru, &info->indirect_pages);
+				}
 				s->indirect_grants[i]->gref = GRANT_INVALID_REF;
 				list_add_tail(&s->indirect_grants[i]->node, &info->grants);
 			}
 	info->shadow_free = info->ring.req_prod_pvt;
 	info->shadow[BLK_RING_SIZE(info)-1].req.u.rw.id = 0x0fffffff;
-	rc = blkfront_setup_indirect(info);
+	rc = blkfront_gather_backend_features(info);
 	if (rc) {
 		kfree(copy);
 		return rc;
 static int blkfront_setup_indirect(struct blkfront_info *info)
 {
-	unsigned int indirect_segments, segs;
+	unsigned int segs;
 	int err, i;
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+	if (info->max_indirect_segments == 0)
-			    "feature-max-indirect-segments", "%u", &indirect_segments,
-			    NULL);
-	if (err) {
-		info->max_indirect_segments = 0;
 		segs = BLKIF_MAX_SEGMENTS_PER_REQUEST;
-	} else {
+	else
-		info->max_indirect_segments = min(indirect_segments,
-						  xen_blkif_max_segments);
 		segs = info->max_indirect_segments;
-	}
 	err = fill_grant_buffer(info, (segs + INDIRECT_GREFS(segs)) * BLK_RING_SIZE(info));
 	if (err)
 	return -ENOMEM;
 }
+/*
+ * Gather all backend feature-*
+ */
+static int blkfront_gather_backend_features(struct blkfront_info *info)
+{
+	int err;
+	int barrier, flush, discard, persistent;
+	unsigned int indirect_segments;
+	info->feature_flush = 0;
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			"feature-barrier", "%d", &barrier,
+			NULL);
+	/*
+	 * If there's no "feature-barrier" defined, then it means
+	 * we're dealing with a very old backend which writes
+	 * synchronously; nothing to do.
+	 *
+	 * If there are barriers, then we use flush.
+	 */
+	if (!err && barrier)
+		info->feature_flush = REQ_FLUSH | REQ_FUA;
+	/*
+	 * And if there is "feature-flush-cache" use that above
+	 * barriers.
+	 */
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			"feature-flush-cache", "%d", &flush,
+			NULL);
+	if (!err && flush)
+		info->feature_flush = REQ_FLUSH;
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			"feature-discard", "%d", &discard,
+			NULL);
+	if (!err && discard)
+		blkfront_setup_discard(info);
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			"feature-persistent", "%u", &persistent,
+			NULL);
+	if (err)
+		info->feature_persistent = 0;
+	else
+		info->feature_persistent = persistent;
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			    "feature-max-indirect-segments", "%u", &indirect_segments,
+			    NULL);
+	if (err)
+		info->max_indirect_segments = 0;
+	else
+		info->max_indirect_segments = min(indirect_segments,
+						  xen_blkif_max_segments);
+	return blkfront_setup_indirect(info);
+}
 /*
  * Invoked when the backend is finally 'ready' (and has told produced
  * the details about the physical device - #sectors, size, etc).
 	unsigned int physical_sector_size;
 	unsigned int binfo;
 	int err;
-	int barrier, flush, discard, persistent;
 	switch (info->connected) {
 	case BLKIF_STATE_CONNECTED:
 	if (err != 1)
 		physical_sector_size = sector_size;
-	info->feature_flush = 0;
+	err = blkfront_gather_backend_features(info);
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
-			    "feature-barrier", "%d", &barrier,
-			    NULL);
-	/*
-	 * If there's no "feature-barrier" defined, then it means
-	 * we're dealing with a very old backend which writes
-	 * synchronously; nothing to do.
-	 *
-	 * If there are barriers, then we use flush.
-	 */
-	if (!err && barrier)
-		info->feature_flush = REQ_FLUSH | REQ_FUA;
-	/*
-	 * And if there is "feature-flush-cache" use that above
-	 * barriers.
-	 */
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
-			    "feature-flush-cache", "%d", &flush,
-			    NULL);
-	if (!err && flush)
-		info->feature_flush = REQ_FLUSH;
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
-			    "feature-discard", "%d", &discard,
-			    NULL);
-	if (!err && discard)
-		blkfront_setup_discard(info);
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
-			    "feature-persistent", "%u", &persistent,
-			    NULL);
-	if (err)
-		info->feature_persistent = 0;
-	else
-		info->feature_persistent = persistent;
-	err = blkfront_setup_indirect(info);
 	if (err) {
 		xenbus_dev_fatal(info->xbdev, err, "setup_indirect at %s",
 				 info->xbdev->otherend);

drivers/char/hw_random/core.c+1−1

@@ -429,7 +429,7 @@ static int hwrng_fillfn(void *unused) · 428 unmodified lines
429	static void start_khwrngd(void)	429	static void start_khwrngd(void)
430	{	430	{
431	hwrng_fill = kthread_run(hwrng_fillfn, NULL, "hwrng");	431	hwrng_fill = kthread_run(hwrng_fillfn, NULL, "hwrng");
432	if (hwrng_fill == ERR_PTR(-ENOMEM)) {	432	if (IS_ERR(hwrng_fill)) {
433	pr_err("hwrng_fill thread creation failed");	433	pr_err("hwrng_fill thread creation failed");
434	hwrng_fill = NULL;	434	hwrng_fill = NULL;
435	}	435	}

drivers/cpufreq/loongson2_cpufreq.c+1−1

@@ -20,7 +20,7 @@ · 19 unmodified lines
20	#include <asm/clock.h>	20	#include <asm/clock.h>
21	#include <asm/idle.h>	21	#include <asm/idle.h>
22		22
23	#include <asm/mach-loongson/loongson.h>	23	#include <asm/mach-loongson64/loongson.h>
24		24
25	static uint nowait;	25	static uint nowait;
26		26

drivers/crypto/ixp4xx_crypto.c+0−1

@@ -905,7 +905,6 @@ static int ablk_perform(struct ablkcipher_request *req, int encrypt) · 904 unmodified lines
905	crypt->mode \|= NPE_OP_NOT_IN_PLACE;	905	crypt->mode \|= NPE_OP_NOT_IN_PLACE;
906	/* This was never tested by Intel	906	/* This was never tested by Intel
907	* for more than one dst buffer, I think. */	907	* for more than one dst buffer, I think. */
908	BUG_ON(req->dst->length < nbytes);
909	req_ctx->dst = NULL;	908	req_ctx->dst = NULL;
910	if (!chainup_buffers(dev, req->dst, nbytes, &dst_hook,	909	if (!chainup_buffers(dev, req->dst, nbytes, &dst_hook,
911	flags, DMA_FROM_DEVICE))	910	flags, DMA_FROM_DEVICE))

drivers/crypto/qat/qat_common/qat_algs.c+16−8

@@ -73,7 +73,8 @@ · 72 unmodified lines
73	ICP_QAT_HW_CIPHER_KEY_CONVERT, \	73	ICP_QAT_HW_CIPHER_KEY_CONVERT, \
74	ICP_QAT_HW_CIPHER_DECRYPT)	74	ICP_QAT_HW_CIPHER_DECRYPT)
75		75
76	static atomic_t active_dev;	76	static DEFINE_MUTEX(algs_lock);
		77	static unsigned int active_devs;
77		78
78	struct qat_alg_buf {	79	struct qat_alg_buf {
79	uint32_t len;	80	uint32_t len;
@@ -1280,7 +1281,10 @@ static struct crypto_alg qat_algs[] = { { · 1200 unmodified lines
1280		1281
1281	int qat_algs_register(void)	1282	int qat_algs_register(void)
1282	{	1283	{
1283	if (atomic_add_return(1, &active_dev) == 1) {	1284	int ret = 0;
		1285
		1286	mutex_lock(&algs_lock);
		1287	if (++active_devs == 1) {
1284	int i;	1288	int i;
1285		1289
1286	for (i = 0; i < ARRAY_SIZE(qat_algs); i++)	1290	for (i = 0; i < ARRAY_SIZE(qat_algs); i++)
@@ -1289,21 +1293,25 @@ int qat_algs_register(void) · 2 unmodified lines
1289	CRYPTO_ALG_TYPE_AEAD \| CRYPTO_ALG_ASYNC :	1293	CRYPTO_ALG_TYPE_AEAD \| CRYPTO_ALG_ASYNC :
1290	CRYPTO_ALG_TYPE_ABLKCIPHER \| CRYPTO_ALG_ASYNC;	1294	CRYPTO_ALG_TYPE_ABLKCIPHER \| CRYPTO_ALG_ASYNC;
1291		1295
1292	return crypto_register_algs(qat_algs, ARRAY_SIZE(qat_algs));	1296	ret = crypto_register_algs(qat_algs, ARRAY_SIZE(qat_algs));
1293	}	1297	}
1294	return 0;	1298	mutex_unlock(&algs_lock);
		1299	return ret;
1295	}	1300	}
1296		1301
1297	int qat_algs_unregister(void)	1302	int qat_algs_unregister(void)
1298	{	1303	{
1299	if (atomic_sub_return(1, &active_dev) == 0)	1304	int ret = 0;
1300	return crypto_unregister_algs(qat_algs, ARRAY_SIZE(qat_algs));	1305
1301	return 0;	1306	mutex_lock(&algs_lock);
		1307	if (--active_devs == 0)
		1308	ret = crypto_unregister_algs(qat_algs, ARRAY_SIZE(qat_algs));
		1309	mutex_unlock(&algs_lock);
		1310	return ret;
1302	}	1311	}
1303		1312
1304	int qat_algs_init(void)	1313	int qat_algs_init(void)
1305	{	1314	{
1306	atomic_set(&active_dev, 0);
1307	crypto_get_default_rng();	1315	crypto_get_default_rng();
1308	return 0;	1316	return 0;
1309	}	1317	}

drivers/dma/at_hdmac.c+87−45

 	BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\
 	BIT(DMA_SLAVE_BUSWIDTH_4_BYTES))
+#define ATC_MAX_DSCR_TRIALS	10
 /*
  * Initial number of descriptors to allocate for each channel. This could
  * be increased during dma usage.
  *
  * @current_len: the number of bytes left before reading CTRLA
  * @ctrla: the value of CTRLA
- * @desc: the descriptor containing the transfer width
  */
-static inline int atc_calc_bytes_left(int current_len, u32 ctrla,
+static inline int atc_calc_bytes_left(int current_len, u32 ctrla)
-					struct at_desc *desc)
 {
-	return current_len - ((ctrla & ATC_BTSIZE_MAX) << desc->tx_width);
+	u32 btsize = (ctrla & ATC_BTSIZE_MAX);
-}
+	u32 src_width = ATC_REG_TO_SRC_WIDTH(ctrla);
-/**
+	/*
- * atc_calc_bytes_left_from_reg - calculates the number of bytes left according
+	 * According to the datasheet, when reading the Control A Register
- * to the current value of CTRLA.
+	 * (ctrla), the Buffer Transfer Size (btsize) bitfield refers to the
- *
+	 * number of transfers completed on the Source Interface.
- * @current_len: the number of bytes left before reading CTRLA
+	 * So btsize is always a number of source width transfers.
- * @atchan: the channel to read CTRLA for
+	 */
- * @desc: the descriptor containing the transfer width
+	return current_len - (btsize << src_width);
- */
-static inline int atc_calc_bytes_left_from_reg(int current_len,
-			struct at_dma_chan *atchan, struct at_desc *desc)
-{
-	u32 ctrla = channel_readl(atchan, CTRLA);
-	return atc_calc_bytes_left(current_len, ctrla, desc);
 }
 /**
 	struct at_desc *desc_first = atc_first_active(atchan);
 	struct at_desc *desc;
 	int ret;
-	u32 ctrla, dscr;
+	u32 ctrla, dscr, trials;
 	/*
 	 * If the cookie doesn't match to the currently running transfer then
 		 * the channel's DSCR register and compare it against the value
 		 * of the hardware linked list structure of each child
 		 * descriptor.
+		 *
+		 * The CTRLA register provides us with the amount of data
+		 * already read from the source for the current child
+		 * descriptor. So we can compute a more accurate residue by also
+		 * removing the number of bytes corresponding to this amount of
+		 * data.
+		 *
+		 * However, the DSCR and CTRLA registers cannot be read both
+		 * atomically. Hence a race condition may occur: the first read
+		 * register may refer to one child descriptor whereas the second
+		 * read may refer to a later child descriptor in the list
+		 * because of the DMA transfer progression inbetween the two
+		 * reads.
+		 *
+		 * One solution could have been to pause the DMA transfer, read
+		 * the DSCR and CTRLA then resume the DMA transfer. Nonetheless,
+		 * this approach presents some drawbacks:
+		 * - If the DMA transfer is paused, RX overruns or TX underruns
+		 *   are more likey to occur depending on the system latency.
+		 *   Taking the USART driver as an example, it uses a cyclic DMA
+		 *   transfer to read data from the Receive Holding Register
+		 *   (RHR) to avoid RX overruns since the RHR is not protected
+		 *   by any FIFO on most Atmel SoCs. So pausing the DMA transfer
+		 *   to compute the residue would break the USART driver design.
+		 * - The atc_pause() function masks interrupts but we'd rather
+		 *   avoid to do so for system latency purpose.
+		 *
+		 * Then we'd rather use another solution: the DSCR is read a
+		 * first time, the CTRLA is read in turn, next the DSCR is read
+		 * a second time. If the two consecutive read values of the DSCR
+		 * are the same then we assume both refers to the very same
+		 * child descriptor as well as the CTRLA value read inbetween
+		 * does. For cyclic tranfers, the assumption is that a full loop
+		 * is "not so fast".
+		 * If the two DSCR values are different, we read again the CTRLA
+		 * then the DSCR till two consecutive read values from DSCR are
+		 * equal or till the maxium trials is reach.
+		 * This algorithm is very unlikely not to find a stable value for
+		 * DSCR.
 		 */
-		ctrla = channel_readl(atchan, CTRLA);
-		rmb(); /* ensure CTRLA is read before DSCR */
 		dscr = channel_readl(atchan, DSCR);
+		rmb(); /* ensure DSCR is read before CTRLA */
+		ctrla = channel_readl(atchan, CTRLA);
+		for (trials = 0; trials < ATC_MAX_DSCR_TRIALS; ++trials) {
+			u32 new_dscr;
+			rmb(); /* ensure DSCR is read after CTRLA */
+			new_dscr = channel_readl(atchan, DSCR);
+			/*
+			 * If the DSCR register value has not changed inside the
+			 * DMA controller since the previous read, we assume
+			 * that both the dscr and ctrla values refers to the
+			 * very same descriptor.
+			 */
+			if (likely(new_dscr == dscr))
+				break;
+			/*
+			 * DSCR has changed inside the DMA controller, so the
+			 * previouly read value of CTRLA may refer to an already
+			 * processed descriptor hence could be outdated.
+			 * We need to update ctrla to match the current
+			 * descriptor.
+			 */
+			dscr = new_dscr;
+			rmb(); /* ensure DSCR is read before CTRLA */
+			ctrla = channel_readl(atchan, CTRLA);
+		}
+		if (unlikely(trials >= ATC_MAX_DSCR_TRIALS))
+			return -ETIMEDOUT;
 		/* for the first descriptor we can be more accurate */
 		if (desc_first->lli.dscr == dscr)
-			return atc_calc_bytes_left(ret, ctrla, desc_first);
+			return atc_calc_bytes_left(ret, ctrla);
 		ret -= desc_first->len;
 		list_for_each_entry(desc, &desc_first->tx_list, desc_node) {
 		}
 		/*
-		 * For the last descriptor in the chain we can calculate
+		 * For the current descriptor in the chain we can calculate
 		 * the remaining bytes using the channel's register.
-		 * Note that the transfer width of the first and last
-		 * descriptor may differ.
 		 */
-		if (!desc->lli.dscr)
+		ret = atc_calc_bytes_left(ret, ctrla);
-			ret = atc_calc_bytes_left_from_reg(ret, atchan, desc);
 	} else {
 		/* single transfer */
-		ret = atc_calc_bytes_left_from_reg(ret, atchan, desc_first);
+		ctrla = channel_readl(atchan, CTRLA);
+		ret = atc_calc_bytes_left(ret, ctrla);
 	}
 	return ret;
 	desc->txd.cookie = -EBUSY;
 	desc->total_len = desc->len = len;
-	desc->tx_width = dwidth;
 	/* set end-of-link to the last link descriptor of list*/
 	set_desc_eol(desc);
 	first->txd.cookie = -EBUSY;
 	first->total_len = len;
-	/* set transfer width for the calculation of the residue */
-	first->tx_width = src_width;
-	prev->tx_width = src_width;
 	/* set end-of-link to the last link descriptor of list*/
 	set_desc_eol(desc);
 	first->txd.cookie = -EBUSY;
 	first->total_len = total_len;
-	/* set transfer width for the calculation of the residue */
-	first->tx_width = reg_width;
-	prev->tx_width = reg_width;
 	/* first link descriptor of list is responsible of flags */
 	first->txd.flags = flags; /* client is in control of this ack */
 		desc->txd.cookie = 0;
 		desc->len = len;
-		/*
-		 * Although we only need the transfer width for the first and
-		 * the last descriptor, its easier to set it to all descriptors.
-		 */
-		desc->tx_width = src_width;
 		atc_desc_chain(&first, &prev, desc);
 		/* update the lengths and addresses for the next loop cycle */
 	/* First descriptor of the chain embedds additional information */
 	first->txd.cookie = -EBUSY;
 	first->total_len = buf_len;
-	first->tx_width = reg_width;
 	return &first->txd;

drivers/dma/at_hdmac_regs.h+1−2

 #define		ATC_SRC_WIDTH_BYTE	(0x0 << 24)
 #define		ATC_SRC_WIDTH_HALFWORD	(0x1 << 24)
 #define		ATC_SRC_WIDTH_WORD	(0x2 << 24)
+#define		ATC_REG_TO_SRC_WIDTH(r)	(((r) >> 24) & 0x3)
 #define	ATC_DST_WIDTH_MASK	(0x3 << 28)	/* Destination Single Transfer Size */
 #define		ATC_DST_WIDTH(x)	((x) << 28)
 #define		ATC_DST_WIDTH_BYTE	(0x0 << 28)
  * @txd: support for the async_tx api
  * @desc_node: node on the channed descriptors list
  * @len: descriptor byte count
- * @tx_width: transfer width
  * @total_len: total transaction byte count
  */
 struct at_desc {
 	struct dma_async_tx_descriptor	txd;
 	struct list_head		desc_node;
 	size_t				len;
-	u32				tx_width;
 	size_t				total_len;
 	/* Interleaved data */

drivers/dma/at_xdmac.c+14−12

 	 * descriptor view 2 since some fields of the configuration register
 	 * depend on transfer size and src/dest addresses.
 	 */
-	if (at_xdmac_chan_is_cyclic(atchan)) {
+	if (at_xdmac_chan_is_cyclic(atchan))
 		reg = AT_XDMAC_CNDC_NDVIEW_NDV1;
-		at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);
+	else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3)
-	} else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3) {
 		reg = AT_XDMAC_CNDC_NDVIEW_NDV3;
-	} else {
+	else
-		/*
-		 * No need to write AT_XDMAC_CC reg, it will be done when the
-		 * descriptor is fecthed.
-		 */
 		reg = AT_XDMAC_CNDC_NDVIEW_NDV2;
-	}
+	/*
+	 * Even if the register will be updated from the configuration in the
+	 * descriptor when using view 2 or higher, the PROT bit won't be set
+	 * properly. This bit can be modified only by using the channel
+	 * configuration register.
+	 */
+	at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);
 	reg |= AT_XDMAC_CNDC_NDDUP
 	       | AT_XDMAC_CNDC_NDSUP
 			desc->lld.mbr_sa = mem;
 			desc->lld.mbr_da = atchan->sconfig.dst_addr;
 		}
-		desc->lld.mbr_cfg = atchan->cfg;
+		dwidth = at_xdmac_get_dwidth(atchan->cfg);
-		dwidth = at_xdmac_get_dwidth(desc->lld.mbr_cfg);
 		fixed_dwidth = IS_ALIGNED(len, 1 << dwidth)
-			       ? at_xdmac_get_dwidth(desc->lld.mbr_cfg)
+			       ? dwidth
 			       : AT_XDMAC_CC_DWIDTH_BYTE;
 		desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV2			/* next descriptor view */
 			| AT_XDMAC_MBR_UBC_NDEN					/* next descriptor dst parameter update */
 			| AT_XDMAC_MBR_UBC_NSEN					/* next descriptor src parameter update */
 			| (len >> fixed_dwidth);				/* microblock length */
+		desc->lld.mbr_cfg = (atchan->cfg & ~AT_XDMAC_CC_DWIDTH_MASK) |
+				    AT_XDMAC_CC_DWIDTH(fixed_dwidth);
 		dev_dbg(chan2dev(chan),
 			 "%s: lld: mbr_sa=%pad, mbr_da=%pad, mbr_ubc=0x%08x\n",
 			 __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc);

drivers/dma/mv_xor.c+5−4

@@ -162,10 +162,11 @@ static void mv_chan_set_mode(struct mv_xor_chan *chan, · 161 unmodified lines
162	config &= ~0x7;	162	config &= ~0x7;
163	config \|= op_mode;	163	config \|= op_mode;
164		164
165	if (IS_ENABLED(__BIG_ENDIAN))	165	#if defined(__BIG_ENDIAN)
166	config \|= XOR_DESCRIPTOR_SWAP;	166	config \|= XOR_DESCRIPTOR_SWAP;
167	else	167	#else
168	config &= ~XOR_DESCRIPTOR_SWAP;	168	config &= ~XOR_DESCRIPTOR_SWAP;
		169	#endif
169		170
170	writel_relaxed(config, XOR_CONFIG(chan));	171	writel_relaxed(config, XOR_CONFIG(chan));
171	chan->current_type = type;	172	chan->current_type = type;

drivers/dma/pl330.c+2−1

 			desc->txd.callback = last->txd.callback;
 			desc->txd.callback_param = last->txd.callback_param;
 		}
-		last->last = false;
+		desc->last = false;
 		dma_cookie_assign(&desc->txd);
 		desc->rqcfg.brst_len = 1;
 	desc->rqcfg.brst_len = get_burst_len(desc, len);
+	desc->bytes_requested = len;
 	desc->txd.flags = flags;

drivers/dma/virt-dma.c+6−13

@@ -29,7 +29,7 @@ dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx) · 28 unmodified lines
29	spin_lock_irqsave(&vc->lock, flags);	29	spin_lock_irqsave(&vc->lock, flags);
30	cookie = dma_cookie_assign(tx);	30	cookie = dma_cookie_assign(tx);
31		31
32	list_move_tail(&vd->node, &vc->desc_submitted);	32	list_add_tail(&vd->node, &vc->desc_submitted);
33	spin_unlock_irqrestore(&vc->lock, flags);	33	spin_unlock_irqrestore(&vc->lock, flags);
34		34
35	dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n",	35	dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n",
@@ -83,10 +83,8 @@ static void vchan_complete(unsigned long arg) · 47 unmodified lines
83	cb_data = vd->tx.callback_param;	83	cb_data = vd->tx.callback_param;
84		84
85	list_del(&vd->node);	85	list_del(&vd->node);
86	if (async_tx_test_ack(&vd->tx))	86
87	list_add(&vd->node, &vc->desc_allocated);	87	vc->desc_free(vd);
88	else
89	vc->desc_free(vd);
90		88
91	if (cb)	89	if (cb)
92	cb(cb_data);	90	cb(cb_data);
@@ -98,13 +96,9 @@ void vchan_dma_desc_free_list(struct virt_dma_chan vc, struct list_head head) · 5 unmodified lines
98	while (!list_empty(head)) {	96	while (!list_empty(head)) {
99	struct virt_dma_desc *vd = list_first_entry(head,	97	struct virt_dma_desc *vd = list_first_entry(head,
100	struct virt_dma_desc, node);	98	struct virt_dma_desc, node);
101	if (async_tx_test_ack(&vd->tx)) {	99	list_del(&vd->node);
102	list_move_tail(&vd->node, &vc->desc_allocated);	100	dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
103	} else {	101	vc->desc_free(vd);
104	dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
105	list_del(&vd->node);
106	vc->desc_free(vd);
107	}
108	}	102	}
109	}	103	}
110	EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list);	104	EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list);
@@ -114,7 +108,6 @@ void vchan_init(struct virt_dma_chan vc, struct dma_device dmadev) · 3 unmodified lines
114	dma_cookie_init(&vc->chan);	108	dma_cookie_init(&vc->chan);
115		109
116	spin_lock_init(&vc->lock);	110	spin_lock_init(&vc->lock);
117	INIT_LIST_HEAD(&vc->desc_allocated);
118	INIT_LIST_HEAD(&vc->desc_submitted);	111	INIT_LIST_HEAD(&vc->desc_submitted);
119	INIT_LIST_HEAD(&vc->desc_issued);	112	INIT_LIST_HEAD(&vc->desc_issued);
120	INIT_LIST_HEAD(&vc->desc_completed);	113	INIT_LIST_HEAD(&vc->desc_completed);

drivers/dma/virt-dma.h+1−12

 	spinlock_t lock;
 	/* protected by vc.lock */
-	struct list_head desc_allocated;
 	struct list_head desc_submitted;
 	struct list_head desc_issued;
 	struct list_head desc_completed;
 	struct virt_dma_desc *vd, unsigned long tx_flags)
 {
 	extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *);
-	unsigned long flags;
 	dma_async_tx_descriptor_init(&vd->tx, &vc->chan);
 	vd->tx.flags = tx_flags;
 	vd->tx.tx_submit = vchan_tx_submit;
-	spin_lock_irqsave(&vc->lock, flags);
-	list_add_tail(&vd->node, &vc->desc_allocated);
-	spin_unlock_irqrestore(&vc->lock, flags);
 	return &vd->tx;
 }
 }
 /**
- * vchan_get_all_descriptors - obtain all allocated, submitted and issued
+ * vchan_get_all_descriptors - obtain all submitted and issued descriptors
- *                             descriptors
  * vc: virtual channel to get descriptors from
  * head: list of descriptors found
  *
 static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc,
 	struct list_head *head)
 {
-	list_splice_tail_init(&vc->desc_allocated, head);
 	list_splice_tail_init(&vc->desc_submitted, head);
 	list_splice_tail_init(&vc->desc_issued, head);
 	list_splice_tail_init(&vc->desc_completed, head);
 static inline void vchan_free_chan_resources(struct virt_dma_chan *vc)
 {
-	struct virt_dma_desc *vd;
 	unsigned long flags;
 	LIST_HEAD(head);
 	spin_lock_irqsave(&vc->lock, flags);
 	vchan_get_all_descriptors(vc, &head);
-	list_for_each_entry(vd, &head, node)
-		async_tx_clear_ack(&vd->tx);
 	spin_unlock_irqrestore(&vc->lock, flags);
 	vchan_dma_desc_free_list(vc, &head);

drivers/dma/xgene-dma.c+3−0

 #define XGENE_DMA_MEM_RAM_SHUTDOWN		0xD070
 #define XGENE_DMA_BLK_MEM_RDY			0xD074
 #define XGENE_DMA_BLK_MEM_RDY_VAL		0xFFFFFFFF
+#define XGENE_DMA_RING_CMD_SM_OFFSET		0x8000
 /* X-Gene SoC EFUSE csr register and bit defination */
 #define XGENE_SOC_JTAG1_SHADOW			0x18
 		return -ENOMEM;
 	}
+	pdma->csr_ring_cmd += XGENE_DMA_RING_CMD_SM_OFFSET;
 	/* Get efuse csr region */
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
 	if (!res) {

drivers/edac/ppc4xx_edac.c+1−1

@@ -920,7 +920,7 @@ static int ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) · 919 unmodified lines
920	*/	920	*/
921		921
922	for (row = 0; row < mci->nr_csrows; row++) {	922	for (row = 0; row < mci->nr_csrows; row++) {
923	struct csrow_info *csi = &mci->csrows[row];	923	struct csrow_info *csi = mci->csrows[row];
924		924
925	/*	925	/*
926	* Get the configuration settings for this	926	* Get the configuration settings for this

drivers/extcon/extcon-palmas.c+0−13

 	status = devm_extcon_dev_register(&pdev->dev, palmas_usb->edev);
 	if (status) {
 		dev_err(&pdev->dev, "failed to register extcon device\n");
-		kfree(palmas_usb->edev->name);
 		return status;
 	}
 		if (status < 0) {
 			dev_err(&pdev->dev, "can't get IRQ %d, err %d\n",
 					palmas_usb->id_irq, status);
-			kfree(palmas_usb->edev->name);
 			return status;
 		}
 	}
 		if (status < 0) {
 			dev_err(&pdev->dev, "can't get IRQ %d, err %d\n",
 					palmas_usb->vbus_irq, status);
-			kfree(palmas_usb->edev->name);
 			return status;
 		}
 	}
 	return 0;
 }
-static int palmas_usb_remove(struct platform_device *pdev)
-{
-	struct palmas_usb *palmas_usb = platform_get_drvdata(pdev);
-	kfree(palmas_usb->edev->name);
-	return 0;
-}
 #ifdef CONFIG_PM_SLEEP
 static int palmas_usb_suspend(struct device *dev)
 {
 static struct platform_driver palmas_usb_driver = {
 	.probe = palmas_usb_probe,
-	.remove = palmas_usb_remove,
 	.driver = {
 		.name = "palmas-usb",
 		.of_match_table = of_palmas_match_tbl,

drivers/extcon/extcon.c+44−17

@@ -124,25 +124,35 @@ static int find_cable_index_by_id(struct extcon_dev *edev, const unsigned int id · 123 unmodified lines
124	return -EINVAL;	124	return -EINVAL;
125	}	125	}
126		126
127	static int find_cable_index_by_name(struct extcon_dev edev, const char name)	127	static int find_cable_id_by_name(struct extcon_dev edev, const char name)
128	{	128	{
129	unsigned int id = EXTCON_NONE;	129	unsigned int id = -EINVAL;
130	int i = 0;	130	int i = 0;
131		131
132	if (edev->max_supported == 0)	132	/* Find the id of extcon cable */
133	return -EINVAL;
134
135	/* Find the the number of extcon cable */
136	while (extcon_name[i]) {	133	while (extcon_name[i]) {
137	if (!strncmp(extcon_name[i], name, CABLE_NAME_MAX)) {	134	if (!strncmp(extcon_name[i], name, CABLE_NAME_MAX)) {
138	id = i;	135	id = i;
139	break;	136	break;
140	}	137	}
		138	i++;
141	}	139	}
142		140
143	if (id == EXTCON_NONE)	141	return id;
		142	}
		143
		144	static int find_cable_index_by_name(struct extcon_dev edev, const char name)
		145	{
		146	unsigned int id;
		147
		148	if (edev->max_supported == 0)
144	return -EINVAL;	149	return -EINVAL;
145		150
		151	/* Find the the number of extcon cable */
		152	id = find_cable_id_by_name(edev, name);
		153	if (id < 0)
		154	return id;
		155
146	return find_cable_index_by_id(edev, id);	156	return find_cable_index_by_id(edev, id);
147	}	157	}
148		158
@@ -228,9 +238,11 @@ static ssize_t cable_state_show(struct device *dev, · 79 unmodified lines
228	struct extcon_cable *cable = container_of(attr, struct extcon_cable,	238	struct extcon_cable *cable = container_of(attr, struct extcon_cable,
229	attr_state);	239	attr_state);
230		240
		241	int i = cable->cable_index;
		242
231	return sprintf(buf, "%d\n",	243	return sprintf(buf, "%d\n",
232	extcon_get_cable_state_(cable->edev,	244	extcon_get_cable_state_(cable->edev,
233	cable->cable_index));	245	cable->edev->supported_cable[i]));
234	}	246	}
235		247
236	/**	248	/**
@@ -263,20 +275,25 @@ int extcon_update_state(struct extcon_dev *edev, u32 mask, u32 state) · 26 unmodified lines
263	spin_lock_irqsave(&edev->lock, flags);	275	spin_lock_irqsave(&edev->lock, flags);
264		276
265	if (edev->state != ((edev->state & ~mask) \| (state & mask))) {	277	if (edev->state != ((edev->state & ~mask) \| (state & mask))) {
		278	u32 old_state;
		279
266	if (check_mutually_exclusive(edev, (edev->state & ~mask) \|	280	if (check_mutually_exclusive(edev, (edev->state & ~mask) \|
267	(state & mask))) {	281	(state & mask))) {
268	spin_unlock_irqrestore(&edev->lock, flags);	282	spin_unlock_irqrestore(&edev->lock, flags);
269	return -EPERM;	283	return -EPERM;
270	}	284	}
271		285
272	for (index = 0; index < edev->max_supported; index++) {	286	old_state = edev->state;
273	if (is_extcon_changed(edev->state, state, index, &attached))
274	raw_notifier_call_chain(&edev->nh[index], attached, edev);
275	}
276
277	edev->state &= ~mask;	287	edev->state &= ~mask;
278	edev->state \|= state & mask;	288	edev->state \|= state & mask;
279		289
		290	for (index = 0; index < edev->max_supported; index++) {
		291	if (is_extcon_changed(old_state, edev->state, index,
		292	&attached))
		293	raw_notifier_call_chain(&edev->nh[index],
		294	attached, edev);
		295	}
		296
280	/* This could be in interrupt handler */	297	/* This could be in interrupt handler */
281	prop_buf = (char *)get_zeroed_page(GFP_ATOMIC);	298	prop_buf = (char *)get_zeroed_page(GFP_ATOMIC);
282	if (prop_buf) {	299	if (prop_buf) {
@@ -361,8 +378,13 @@ EXPORT_SYMBOL_GPL(extcon_get_cable_state_); · 78 unmodified lines
361	*/	378	*/
362	int extcon_get_cable_state(struct extcon_dev edev, const char cable_name)	379	int extcon_get_cable_state(struct extcon_dev edev, const char cable_name)
363	{	380	{
364	return extcon_get_cable_state_(edev, find_cable_index_by_name	381	unsigned int id;
365	(edev, cable_name));	382
		383	id = find_cable_id_by_name(edev, cable_name);
		384	if (id < 0)
		385	return id;
		386
		387	return extcon_get_cable_state_(edev, id);
366	}	388	}
367	EXPORT_SYMBOL_GPL(extcon_get_cable_state);	389	EXPORT_SYMBOL_GPL(extcon_get_cable_state);
368		390
@@ -404,8 +426,13 @@ EXPORT_SYMBOL_GPL(extcon_set_cable_state_); · 35 unmodified lines
404	int extcon_set_cable_state(struct extcon_dev *edev,	426	int extcon_set_cable_state(struct extcon_dev *edev,
405	const char *cable_name, bool cable_state)	427	const char *cable_name, bool cable_state)
406	{	428	{
407	return extcon_set_cable_state_(edev, find_cable_index_by_name	429	unsigned int id;
408	(edev, cable_name), cable_state);	430
		431	id = find_cable_id_by_name(edev, cable_name);
		432	if (id < 0)
		433	return id;
		434
		435	return extcon_set_cable_state_(edev, id, cable_state);
409	}	436	}
410	EXPORT_SYMBOL_GPL(extcon_set_cable_state);	437	EXPORT_SYMBOL_GPL(extcon_set_cable_state);
411		438

drivers/firmware/efi/efi.c+5−0

 static int __init parse_efi_cmdline(char *str)
 {
+	if (!str) {
+		pr_warn("need at least one option\n");
+		return -EINVAL;
+	}
 	if (parse_option_str(str, "noruntime"))
 		disable_runtime = true;

drivers/gpu/drm/amd/amdgpu/amdgpu.h+4−0

 	uint32_t			me_feature_version;
 	uint32_t			ce_feature_version;
 	uint32_t			pfp_feature_version;
+	uint32_t			rlc_feature_version;
+	uint32_t			mec_feature_version;
+	uint32_t			mec2_feature_version;
 	struct amdgpu_ring		gfx_ring[AMDGPU_MAX_GFX_RINGS];
 	unsigned			num_gfx_rings;
 	struct amdgpu_ring		compute_ring[AMDGPU_MAX_COMPUTE_RINGS];
 	/* SDMA firmware */
 	const struct firmware	*fw;
 	uint32_t		fw_version;
+	uint32_t		feature_version;
 	struct amdgpu_ring	ring;
 };

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+7−6

 			break;
 		case AMDGPU_INFO_FW_GFX_RLC:
 			fw_info.ver = adev->gfx.rlc_fw_version;
-			fw_info.feature = 0;
+			fw_info.feature = adev->gfx.rlc_feature_version;
 			break;
 		case AMDGPU_INFO_FW_GFX_MEC:
-			if (info->query_fw.index == 0)
+			if (info->query_fw.index == 0) {
 				fw_info.ver = adev->gfx.mec_fw_version;
-			else if (info->query_fw.index == 1)
+				fw_info.feature = adev->gfx.mec_feature_version;
+			} else if (info->query_fw.index == 1) {
 				fw_info.ver = adev->gfx.mec2_fw_version;
-			else
+				fw_info.feature = adev->gfx.mec2_feature_version;
+			} else
 				return -EINVAL;
-			fw_info.feature = 0;
 			break;
 		case AMDGPU_INFO_FW_SMC:
 			fw_info.ver = adev->pm.fw_version;
 			if (info->query_fw.index >= 2)
 				return -EINVAL;
 			fw_info.ver = adev->sdma[info->query_fw.index].fw_version;
-			fw_info.feature = 0;
+			fw_info.feature = adev->sdma[info->query_fw.index].feature_version;
 			break;
 		default:
 			return -EINVAL;

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c+14−3

 	unsigned height_in_mb = ALIGN(height / 16, 2);
 	unsigned fs_in_mb = width_in_mb * height_in_mb;
-	unsigned image_size, tmp, min_dpb_size, num_dpb_buffer;
+	unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size;
 	image_size = width * height;
 	image_size += image_size / 2;
 		num_dpb_buffer = (le32_to_cpu(msg[59]) & 0xff) + 2;
 		min_dpb_size = image_size * num_dpb_buffer;
+		min_ctx_size = ((width + 255) / 16) * ((height + 255) / 16)
+					   * 16 * num_dpb_buffer + 52 * 1024;
 		break;
 	default:
 	buf_sizes[0x1] = dpb_size;
 	buf_sizes[0x2] = image_size;
+	buf_sizes[0x4] = min_ctx_size;
 	return 0;
 }
 			return -EINVAL;
 		}
+	} else if (cmd == 0x206) {
+		if ((end - start) < ctx->buf_sizes[4]) {
+			DRM_ERROR("buffer (%d) to small (%d / %d)!\n", cmd,
+					  (unsigned)(end - start),
+					  ctx->buf_sizes[4]);
+			return -EINVAL;
+		}
 	} else if ((cmd != 0x100) && (cmd != 0x204)) {
 		DRM_ERROR("invalid UVD command %X!\n", cmd);
 		return -EINVAL;
 	struct amdgpu_uvd_cs_ctx ctx = {};
 	unsigned buf_sizes[] = {
 		[0x00000000]	=	2048,
-		[0x00000001]	=	32 * 1024 * 1024,
+		[0x00000001]	=	0xFFFFFFFF,
-		[0x00000002]	=	2048 * 1152 * 3,
+		[0x00000002]	=	0xFFFFFFFF,
 		[0x00000003]	=	2048,
+		[0x00000004]	=	0xFFFFFFFF,
 	};
 	struct amdgpu_ib *ib = &parser->ibs[ib_idx];
 	int r;

drivers/gpu/drm/amd/amdgpu/cik_sdma.c+1−0

@@ -500,6 +500,7 @@ static int cik_sdma_load_microcode(struct amdgpu_device *adev) · 499 unmodified lines
500	amdgpu_ucode_print_sdma_hdr(&hdr->header);	500	amdgpu_ucode_print_sdma_hdr(&hdr->header);
501	fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;	501	fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
502	adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);	502	adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
		503	adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);
503	fw_data = (const __le32 *)	504	fw_data = (const __le32 *)
504	(adev->sdma[i].fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));	505	(adev->sdma[i].fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
505	WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], 0);	506	WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c+7−1

 	mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;
 	amdgpu_ucode_print_gfx_hdr(&mec_hdr->header);
 	adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version);
+	adev->gfx.mec_feature_version = le32_to_cpu(
+					mec_hdr->ucode_feature_version);
 	gfx_v7_0_cp_compute_enable(adev, false);
 		mec2_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data;
 		amdgpu_ucode_print_gfx_hdr(&mec2_hdr->header);
 		adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version);
+		adev->gfx.mec2_feature_version = le32_to_cpu(
+				mec2_hdr->ucode_feature_version);
 		/* MEC2 */
 		fw_data = (const __le32 *)
 	hdr = (const struct rlc_firmware_header_v1_0 *)adev->gfx.rlc_fw->data;
 	amdgpu_ucode_print_rlc_hdr(&hdr->header);
 	adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version);
+	adev->gfx.rlc_feature_version = le32_to_cpu(
+					hdr->ucode_feature_version);
 	gfx_v7_0_rlc_stop(adev);
 		dev_info(adev->dev, "  CP_HPD_EOP_CONTROL=0x%08X\n",
 			 RREG32(mmCP_HPD_EOP_CONTROL));
-		for (queue = 0; queue < 8; i++) {
+		for (queue = 0; queue < 8; queue++) {
 			cik_srbm_select(adev, me, pipe, queue, 0);
 			dev_info(adev->dev, "  queue: %d\n", queue);
 			dev_info(adev->dev, "  CP_PQ_WPTR_POLL_CNTL=0x%08X\n",

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+24−14

 	int err;
 	struct amdgpu_firmware_info *info = NULL;
 	const struct common_firmware_header *header = NULL;
+	const struct gfx_firmware_header_v1_0 *cp_hdr;
 	DRM_DEBUG("\n");
 	err = amdgpu_ucode_validate(adev->gfx.pfp_fw);
 	if (err)
 		goto out;
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data;
+	adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name);
 	err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev);
 	err = amdgpu_ucode_validate(adev->gfx.me_fw);
 	if (err)
 		goto out;
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data;
+	adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name);
 	err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev);
 	err = amdgpu_ucode_validate(adev->gfx.ce_fw);
 	if (err)
 		goto out;
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data;
+	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
 	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
 	if (err)
 		goto out;
 	err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.rlc_fw->data;
+	adev->gfx.rlc_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.rlc_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name);
 	err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
 	err = amdgpu_ucode_validate(adev->gfx.mec_fw);
 	if (err)
 		goto out;
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;
+	adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
 	err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev);
 		err = amdgpu_ucode_validate(adev->gfx.mec2_fw);
 		if (err)
 			goto out;
+		cp_hdr = (const struct gfx_firmware_header_v1_0 *)
+						adev->gfx.mec2_fw->data;
+		adev->gfx.mec2_fw_version = le32_to_cpu(
+						cp_hdr->header.ucode_version);
+		adev->gfx.mec2_feature_version = le32_to_cpu(
+						cp_hdr->ucode_feature_version);
 	} else {
 		err = 0;
 		adev->gfx.mec2_fw = NULL;
 		adev->gfx.config.max_shader_engines = 1;
 		adev->gfx.config.max_tile_pipes = 2;
 		adev->gfx.config.max_sh_per_se = 1;
+		adev->gfx.config.max_backends_per_se = 2;
 		switch (adev->pdev->revision) {
 		case 0xc4:
 		case 0xcc:
 			/* B10 */
 			adev->gfx.config.max_cu_per_sh = 8;
-			adev->gfx.config.max_backends_per_se = 2;
 			break;
 		case 0xc5:
 		case 0x81:
 		case 0xcd:
 			/* B8 */
 			adev->gfx.config.max_cu_per_sh = 6;
-			adev->gfx.config.max_backends_per_se = 2;
 			break;
 		case 0xc6:
 		case 0xca:
 		case 0xce:
 			/* B6 */
 			adev->gfx.config.max_cu_per_sh = 6;
-			adev->gfx.config.max_backends_per_se = 2;
 			break;
 		case 0xc7:
 		case 0x87:
 		default:
 			/* B4 */
 			adev->gfx.config.max_cu_per_sh = 4;
-			adev->gfx.config.max_backends_per_se = 1;
 			break;
 		}
 	hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
 	amdgpu_ucode_print_rlc_hdr(&hdr->header);
-	adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version);
 	fw_data = (const __le32 *)(adev->gfx.rlc_fw->data +
 			   le32_to_cpu(hdr->header.ucode_array_offset_bytes));
 	amdgpu_ucode_print_gfx_hdr(&pfp_hdr->header);
 	amdgpu_ucode_print_gfx_hdr(&ce_hdr->header);
 	amdgpu_ucode_print_gfx_hdr(&me_hdr->header);
-	adev->gfx.pfp_fw_version = le32_to_cpu(pfp_hdr->header.ucode_version);
-	adev->gfx.ce_fw_version = le32_to_cpu(ce_hdr->header.ucode_version);
-	adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version);
-	adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version);
-	adev->gfx.ce_feature_version = le32_to_cpu(ce_hdr->ucode_feature_version);
-	adev->gfx.pfp_feature_version = le32_to_cpu(pfp_hdr->ucode_feature_version);
 	gfx_v8_0_cp_gfx_enable(adev, false);
 	mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;
 	amdgpu_ucode_print_gfx_hdr(&mec_hdr->header);
-	adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version);
 	fw_data = (const __le32 *)
 		(adev->gfx.mec_fw->data +
 		mec2_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data;
 		amdgpu_ucode_print_gfx_hdr(&mec2_hdr->header);
-		adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version);
 		fw_data = (const __le32 *)
 			(adev->gfx.mec2_fw->data +
 				WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER,
 				       AMDGPU_DOORBELL_KIQ << 2);
 				WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,
-						0x7FFFF << 2);
+				       AMDGPU_DOORBELL_MEC_RING7 << 2);
 			}
 			tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
 			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c+4−2

 	int err, i;
 	struct amdgpu_firmware_info *info = NULL;
 	const struct common_firmware_header *header = NULL;
+	const struct sdma_firmware_header_v1_0 *hdr;
 	DRM_DEBUG("\n");
 		err = amdgpu_ucode_validate(adev->sdma[i].fw);
 		if (err)
 			goto out;
+		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data;
+		adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
+		adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);
 		if (adev->firmware.smu_load) {
 			info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i];
 			hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data;
 			amdgpu_ucode_print_sdma_hdr(&hdr->header);
 			fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
-			adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
 			fw_data = (const __le32 *)
 				(adev->sdma[i].fw->data +
 				 le32_to_cpu(hdr->header.ucode_array_offset_bytes));

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c+4−2

 	int err, i;
 	struct amdgpu_firmware_info *info = NULL;
 	const struct common_firmware_header *header = NULL;
+	const struct sdma_firmware_header_v1_0 *hdr;
 	DRM_DEBUG("\n");
 		err = amdgpu_ucode_validate(adev->sdma[i].fw);
 		if (err)
 			goto out;
+		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data;
+		adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
+		adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);
 		if (adev->firmware.smu_load) {
 			info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i];
 		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data;
 		amdgpu_ucode_print_sdma_hdr(&hdr->header);
 		fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
-		adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
 		fw_data = (const __le32 *)
 			(adev->sdma[i].fw->data +
 				le32_to_cpu(hdr->header.ucode_array_offset_bytes));

drivers/gpu/drm/drm_atomic_helper.c+9−1

@@ -196,7 +196,12 @@ update_connector_routing(struct drm_atomic_state *state, int conn_idx) · 195 unmodified lines
196	}	196	}
197		197
198	funcs = connector->helper_private;	198	funcs = connector->helper_private;
199	new_encoder = funcs->best_encoder(connector);	199
		200	if (funcs->atomic_best_encoder)
		201	new_encoder = funcs->atomic_best_encoder(connector,
		202	connector_state);
		203	else
		204	new_encoder = funcs->best_encoder(connector);
200		205
201	if (!new_encoder) {	206	if (!new_encoder) {
202	DRM_DEBUG_ATOMIC("No suitable encoder found for [CONNECTOR:%d:%s]\n",	207	DRM_DEBUG_ATOMIC("No suitable encoder found for [CONNECTOR:%d:%s]\n",
@@ -229,6 +234,9 @@ update_connector_routing(struct drm_atomic_state *state, int conn_idx) · 26 unmodified lines
229	}	234	}
230	}	235	}
231		236
		237	if (WARN_ON(!connector_state->crtc))
		238	return -EINVAL;
		239
232	connector_state->best_encoder = new_encoder;	240	connector_state->best_encoder = new_encoder;
233	idx = drm_crtc_index(connector_state->crtc);	241	idx = drm_crtc_index(connector_state->crtc);
234		242

drivers/gpu/drm/drm_dp_mst_topology.c+0−1

@@ -1294,7 +1294,6 @@ retry: · 1293 unmodified lines
1294	goto retry;	1294	goto retry;
1295	}	1295	}
1296	DRM_DEBUG_KMS("failed to dpcd write %d %d\n", tosend, ret);	1296	DRM_DEBUG_KMS("failed to dpcd write %d %d\n", tosend, ret);
1297	WARN(1, "fail\n");
1298		1297
1299	return -EIO;	1298	return -EIO;
1300	}	1299	}

drivers/gpu/drm/drm_irq.c+1−1

@@ -75,7 +75,7 @@ module_param_named(timestamp_precision_usec, drm_timestamp_precision, int, 0600) · 74 unmodified lines
75	module_param_named(timestamp_monotonic, drm_timestamp_monotonic, int, 0600);	75	module_param_named(timestamp_monotonic, drm_timestamp_monotonic, int, 0600);
76		76
77	static void store_vblank(struct drm_device *dev, int crtc,	77	static void store_vblank(struct drm_device *dev, int crtc,
78	unsigned vblank_count_inc,	78	u32 vblank_count_inc,
79	struct timeval *t_vblank)	79	struct timeval *t_vblank)
80	{	80	{
81	struct drm_vblank_crtc *vblank = &dev->vblank[crtc];	81	struct drm_vblank_crtc *vblank = &dev->vblank[crtc];

drivers/gpu/drm/i2c/tda998x_drv.c+2−2

 tda998x_write_if(struct tda998x_priv *priv, uint8_t bit, uint16_t addr,
 		 uint8_t *buf, size_t size)
 {
-	buf[PB(0)] = tda998x_cksum(buf, size);
 	reg_clear(priv, REG_DIP_IF_FLAGS, bit);
 	reg_write_range(priv, addr, buf, size);
 	reg_set(priv, REG_DIP_IF_FLAGS, bit);
 	buf[PB(4)] = p->audio_frame[4];
 	buf[PB(5)] = p->audio_frame[5] & 0xf8; /* DM_INH + LSV */
+	buf[PB(0)] = tda998x_cksum(buf, sizeof(buf));
 	tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf,
 			 sizeof(buf));
 }

drivers/gpu/drm/i915/intel_bios.c+23−4

 	const union child_device_config *p_child;
 	union child_device_config *child_dev_ptr;
 	int i, child_device_num, count;
-	u16	block_size;
+	u8 expected_size;
+	u16 block_size;
 	p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
 	if (!p_defs) {
 		DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
 		return;
 	}
-	if (p_defs->child_dev_size < sizeof(*p_child)) {
+	if (bdb->version < 195) {
-		DRM_ERROR("General definiton block child device size is too small.\n");
+		expected_size = 33;
+	} else if (bdb->version == 195) {
+		expected_size = 37;
+	} else if (bdb->version <= 197) {
+		expected_size = 38;
+	} else {
+		expected_size = 38;
+		DRM_DEBUG_DRIVER("Expected child_device_config size for BDB version %u not known; assuming %u\n",
+				 expected_size, bdb->version);
+	}
+	if (expected_size > sizeof(*p_child)) {
+		DRM_ERROR("child_device_config cannot fit in p_child\n");
+		return;
+	}
+	if (p_defs->child_dev_size != expected_size) {
+		DRM_ERROR("Size mismatch; child_device_config size=%u (expected %u); bdb->version: %u\n",
+			  p_defs->child_dev_size, expected_size, bdb->version);
 		return;
 	}
 	/* get the block size of general definitions */
 		child_dev_ptr = dev_priv->vbt.child_dev + count;
 		count++;
-		memcpy(child_dev_ptr, p_child, sizeof(*p_child));
+		memcpy(child_dev_ptr, p_child, p_defs->child_dev_size);
 	}
 	return;
 }

drivers/gpu/drm/i915/intel_dp_mst.c+11−0

 	return MODE_OK;
 }
+static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
+							 struct drm_connector_state *state)
+{
+	struct intel_connector *intel_connector = to_intel_connector(connector);
+	struct intel_dp *intel_dp = intel_connector->mst_port;
+	struct intel_crtc *crtc = to_intel_crtc(state->crtc);
+	return &intel_dp->mst_encoders[crtc->pipe]->base.base;
+}
 static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
 {
 	struct intel_connector *intel_connector = to_intel_connector(connector);
 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
 	.get_modes = intel_dp_mst_get_modes,
 	.mode_valid = intel_dp_mst_mode_valid,
+	.atomic_best_encoder = intel_mst_atomic_best_encoder,
 	.best_encoder = intel_mst_best_encoder,
 };

drivers/hid/hid-input.c+5−2

 static void hidinput_cleanup_battery(struct hid_device *dev)
 {
+	const struct power_supply_desc *psy_desc;
 	if (!dev->battery)
 		return;
+	psy_desc = dev->battery->desc;
 	power_supply_unregister(dev->battery);
-	kfree(dev->battery->desc->name);
+	kfree(psy_desc->name);
-	kfree(dev->battery->desc);
+	kfree(psy_desc);
 	dev->battery = NULL;
 }
 #else  /* !CONFIG_HID_BATTERY_STRENGTH */

drivers/hid/hid-uclogic.c+1−1

@@ -858,7 +858,7 @@ static int uclogic_tablet_enable(struct hid_device *hdev) · 857 unmodified lines
858	for (p = drvdata->rdesc;	858	for (p = drvdata->rdesc;
859	p <= drvdata->rdesc + drvdata->rsize - 4;) {	859	p <= drvdata->rdesc + drvdata->rsize - 4;) {
860	if (p[0] == 0xFE && p[1] == 0xED && p[2] == 0x1D &&	860	if (p[0] == 0xFE && p[1] == 0xED && p[2] == 0x1D &&
861	p[3] < sizeof(params)) {	861	p[3] < ARRAY_SIZE(params)) {
862	v = params[p[3]];	862	v = params[p[3]];
863	put_unaligned(cpu_to_le32(v), (s32 *)p);	863	put_unaligned(cpu_to_le32(v), (s32 *)p);
864	p += 4;	864	p += 4;

drivers/hid/wacom_sys.c+37−33

 	return error;
 }
+/*
+ * Not all devices report physical dimensions from HID.
+ * Compute the default from hardcoded logical dimension
+ * and resolution before driver overwrites them.
+ */
+static void wacom_set_default_phy(struct wacom_features *features)
+{
+	if (features->x_resolution) {
+		features->x_phy = (features->x_max * 100) /
+					features->x_resolution;
+		features->y_phy = (features->y_max * 100) /
+					features->y_resolution;
+	}
+}
+static void wacom_calculate_res(struct wacom_features *features)
+{
+	/* set unit to "100th of a mm" for devices not reported by HID */
+	if (!features->unit) {
+		features->unit = 0x11;
+		features->unitExpo = -3;
+	}
+	features->x_resolution = wacom_calc_hid_res(features->x_max,
+						    features->x_phy,
+						    features->unit,
+						    features->unitExpo);
+	features->y_resolution = wacom_calc_hid_res(features->y_max,
+						    features->y_phy,
+						    features->unit,
+						    features->unitExpo);
+}
 static void wacom_wireless_work(struct work_struct *work)
 {
 	struct wacom *wacom = container_of(work, struct wacom, work);
 		if (wacom_wac1->features.type != INTUOSHT &&
 		    wacom_wac1->features.type != BAMBOO_PT)
 			wacom_wac1->features.device_type |= WACOM_DEVICETYPE_PAD;
+		wacom_set_default_phy(&wacom_wac1->features);
+		wacom_calculate_res(&wacom_wac1->features);
 		snprintf(wacom_wac1->pen_name, WACOM_NAME_MAX, "%s (WL) Pen",
 			 wacom_wac1->features.name);
 		snprintf(wacom_wac1->pad_name, WACOM_NAME_MAX, "%s (WL) Pad",
 			wacom_wac2->features =
 				*((struct wacom_features *)id->driver_data);
 			wacom_wac2->features.pktlen = WACOM_PKGLEN_BBTOUCH3;
+			wacom_set_default_phy(&wacom_wac2->features);
 			wacom_wac2->features.x_max = wacom_wac2->features.y_max = 4096;
+			wacom_calculate_res(&wacom_wac2->features);
 			snprintf(wacom_wac2->touch_name, WACOM_NAME_MAX,
 				 "%s (WL) Finger",wacom_wac2->features.name);
 			snprintf(wacom_wac2->pad_name, WACOM_NAME_MAX,
 	}
 }
-/*
- * Not all devices report physical dimensions from HID.
- * Compute the default from hardcoded logical dimension
- * and resolution before driver overwrites them.
- */
-static void wacom_set_default_phy(struct wacom_features *features)
-{
-	if (features->x_resolution) {
-		features->x_phy = (features->x_max * 100) /
-					features->x_resolution;
-		features->y_phy = (features->y_max * 100) /
-					features->y_resolution;
-	}
-}
-static void wacom_calculate_res(struct wacom_features *features)
-{
-	/* set unit to "100th of a mm" for devices not reported by HID */
-	if (!features->unit) {
-		features->unit = 0x11;
-		features->unitExpo = -3;
-	}
-	features->x_resolution = wacom_calc_hid_res(features->x_max,
-						    features->x_phy,
-						    features->unit,
-						    features->unitExpo);
-	features->y_resolution = wacom_calc_hid_res(features->y_max,
-						    features->y_phy,
-						    features->unit,
-						    features->unitExpo);
-}
 static size_t wacom_compute_pktlen(struct hid_device *hdev)
 {
 	struct hid_report_enum *report_enum;

drivers/hwmon/dell-smm-hwmon.c+17−1

@@ -929,6 +929,21 @@ static struct dmi_system_id i8k_dmi_table[] __initdata = { · 928 unmodified lines
929		929
930	MODULE_DEVICE_TABLE(dmi, i8k_dmi_table);	930	MODULE_DEVICE_TABLE(dmi, i8k_dmi_table);
931		931
		932	static struct dmi_system_id i8k_blacklist_dmi_table[] __initdata = {
		933	{
		934	/*
		935	* CPU fan speed going up and down on Dell Studio XPS 8100
		936	* for unknown reasons.
		937	*/
		938	.ident = "Dell Studio XPS 8100",
		939	.matches = {
		940	DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
		941	DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Studio XPS 8100"),
		942	},
		943	},
		944	{ }
		945	};
		946
932	/*	947	/*
933	* Probe for the presence of a supported laptop.	948	* Probe for the presence of a supported laptop.
934	*/	949	*/
@@ -940,7 +955,8 @@ static int __init i8k_probe(void) · 5 unmodified lines
940	/*	955	/*
941	* Get DMI information	956	* Get DMI information
942	*/	957	*/
943	if (!dmi_check_system(i8k_dmi_table)) {	958	if (!dmi_check_system(i8k_dmi_table) \|\|
		959	dmi_check_system(i8k_blacklist_dmi_table)) {
944	if (!ignore_dmi && !force)	960	if (!ignore_dmi && !force)
945	return -ENODEV;	961	return -ENODEV;
946		962

drivers/hwmon/g762.c+1−0

@@ -582,6 +582,7 @@ static const struct of_device_id g762_dt_match[] = { · 581 unmodified lines
582	{ .compatible = "gmt,g763" },	582	{ .compatible = "gmt,g763" },
583	{ },	583	{ },
584	};	584	};
		585	MODULE_DEVICE_TABLE(of, g762_dt_match);
585		586
586	/*	587	/*
587	* Grab clock (a required property), enable it, get (fixed) clock frequency	588	* Grab clock (a required property), enable it, get (fixed) clock frequency

drivers/hwmon/nct7904.c+1−0

@@ -575,6 +575,7 @@ static const struct i2c_device_id nct7904_id[] = { · 574 unmodified lines
575	{"nct7904", 0},	575	{"nct7904", 0},
576	{}	576	{}
577	};	577	};
		578	MODULE_DEVICE_TABLE(i2c, nct7904_id);
578		579
579	static struct i2c_driver nct7904_driver = {	580	static struct i2c_driver nct7904_driver = {
580	.class = I2C_CLASS_HWMON,	581	.class = I2C_CLASS_HWMON,

drivers/i2c/busses/i2c-bfin-twi.c+2−2

@@ -692,7 +692,7 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev) · 691 unmodified lines
692		692
693	platform_set_drvdata(pdev, iface);	693	platform_set_drvdata(pdev, iface);
694		694
695	dev_info(&pdev->dev, "Blackfin BF5xx on-chip I2C TWI Contoller, "	695	dev_info(&pdev->dev, "Blackfin BF5xx on-chip I2C TWI Controller, "
696	"regs_base@%p\n", iface->regs_base);	696	"regs_base@%p\n", iface->regs_base);
697		697
698	return 0;	698	return 0;
@@ -735,6 +735,6 @@ subsys_initcall(i2c_bfin_twi_init); · 36 unmodified lines
735	module_exit(i2c_bfin_twi_exit);	735	module_exit(i2c_bfin_twi_exit);
736		736
737	MODULE_AUTHOR("Bryan Wu, Sonic Zhang");	737	MODULE_AUTHOR("Bryan Wu, Sonic Zhang");
738	MODULE_DESCRIPTION("Blackfin BF5xx on-chip I2C TWI Contoller Driver");	738	MODULE_DESCRIPTION("Blackfin BF5xx on-chip I2C TWI Controller Driver");
739	MODULE_LICENSE("GPL");	739	MODULE_LICENSE("GPL");
740	MODULE_ALIAS("platform:i2c-bfin-twi");	740	MODULE_ALIAS("platform:i2c-bfin-twi");

drivers/i2c/busses/i2c-omap.c+11−0

 	u32 reg;
 	reg = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG);
+	/* enable test mode */
 	reg |= OMAP_I2C_SYSTEST_ST_EN;
+	/* select SDA/SCL IO mode */
+	reg |= 3 << OMAP_I2C_SYSTEST_TMODE_SHIFT;
+	/* set SCL to high-impedance state (reset value is 0) */
+	reg |= OMAP_I2C_SYSTEST_SCL_O;
+	/* set SDA to high-impedance state (reset value is 0) */
+	reg |= OMAP_I2C_SYSTEST_SDA_O;
 	omap_i2c_write_reg(dev, OMAP_I2C_SYSTEST_REG, reg);
 }
 	u32 reg;
 	reg = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG);
+	/* restore reset values */
 	reg &= ~OMAP_I2C_SYSTEST_ST_EN;
+	reg &= ~OMAP_I2C_SYSTEST_TMODE_MASK;
+	reg &= ~OMAP_I2C_SYSTEST_SCL_O;
+	reg &= ~OMAP_I2C_SYSTEST_SDA_O;
 	omap_i2c_write_reg(dev, OMAP_I2C_SYSTEST_REG, reg);
 }

drivers/i2c/i2c-core.c+17−7

 	if (bri->prepare_recovery)
 		bri->prepare_recovery(adap);
+	bri->set_scl(adap, val);
+	ndelay(RECOVERY_NDELAY);
 	/*
 	 * By this time SCL is high, as we need to give 9 falling-rising edges
 	 */
 int i2c_generic_scl_recovery(struct i2c_adapter *adap)
 {
-	adap->bus_recovery_info->set_scl(adap, 1);
 	return i2c_generic_recovery(adap);
 }
 EXPORT_SYMBOL_GPL(i2c_generic_scl_recovery);
 struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
 {
 	struct device *dev;
+	struct i2c_client *client;
-	dev = bus_find_device(&i2c_bus_type, NULL, node,
+	dev = bus_find_device(&i2c_bus_type, NULL, node, of_dev_node_match);
-					 of_dev_node_match);
 	if (!dev)
 		return NULL;
-	return i2c_verify_client(dev);
+	client = i2c_verify_client(dev);
+	if (!client)
+		put_device(dev);
+	return client;
 }
 EXPORT_SYMBOL(of_find_i2c_device_by_node);
 struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)
 {
 	struct device *dev;
+	struct i2c_adapter *adapter;
-	dev = bus_find_device(&i2c_bus_type, NULL, node,
+	dev = bus_find_device(&i2c_bus_type, NULL, node, of_dev_node_match);
-					 of_dev_node_match);
 	if (!dev)
 		return NULL;
-	return i2c_verify_adapter(dev);
+	adapter = i2c_verify_adapter(dev);
+	if (!adapter)
+		put_device(dev);
+	return adapter;
 }
 EXPORT_SYMBOL(of_find_i2c_adapter_by_node);
 #else

drivers/i2c/i2c-slave-eeprom.c+0−6

 	struct eeprom_data *eeprom;
 	unsigned long flags;
-	if (off + count > attr->size)
-		return -EFBIG;
 	eeprom = dev_get_drvdata(container_of(kobj, struct device, kobj));
 	spin_lock_irqsave(&eeprom->buffer_lock, flags);
 	struct eeprom_data *eeprom;
 	unsigned long flags;
-	if (off + count > attr->size)
-		return -EFBIG;
 	eeprom = dev_get_drvdata(container_of(kobj, struct device, kobj));
 	spin_lock_irqsave(&eeprom->buffer_lock, flags);

drivers/input/joystick/turbografx.c+1−1

@@ -196,7 +196,7 @@ static struct tgfx __init tgfx_probe(int parport, int n_buttons, int n_devs) · 195 unmodified lines
196	if (n_buttons[i] < 1)	196	if (n_buttons[i] < 1)
197	continue;	197	continue;
198		198
199	if (n_buttons[i] > 6) {	199	if (n_buttons[i] > ARRAY_SIZE(tgfx_buttons)) {
200	printk(KERN_ERR "turbografx.c: Invalid number of buttons %d\n", n_buttons[i]);	200	printk(KERN_ERR "turbografx.c: Invalid number of buttons %d\n", n_buttons[i]);
201	err = -EINVAL;	201	err = -EINVAL;
202	goto err_unreg_devs;	202	goto err_unreg_devs;

drivers/input/misc/axp20x-pek.c+1−0

@@ -292,3 +292,4 @@ module_platform_driver(axp20x_pek_driver); · 291 unmodified lines
292	MODULE_DESCRIPTION("axp20x Power Button");	292	MODULE_DESCRIPTION("axp20x Power Button");
293	MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");	293	MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
294	MODULE_LICENSE("GPL");	294	MODULE_LICENSE("GPL");
		295	MODULE_ALIAS("platform:axp20x-pek");

drivers/input/misc/twl4030-vibra.c+2−1

@@ -183,7 +183,8 @@ static bool twl4030_vibra_check_coexist(struct twl4030_vibra_data *pdata, · 182 unmodified lines
183	if (pdata && pdata->coexist)	183	if (pdata && pdata->coexist)
184	return true;	184	return true;
185		185
186	if (of_find_node_by_name(node, "codec")) {	186	node = of_find_node_by_name(node, "codec");
		187	if (node) {
187	of_node_put(node);	188	of_node_put(node);
188	return true;	189	return true;
189	}	190	}

drivers/input/mouse/alps.c+6−2

 #include <linux/input/mt.h>
 #include <linux/serio.h>
 #include <linux/libps2.h>
+#include <linux/dmi.h>
 #include "psmouse.h"
 #include "alps.h"
 #define ALPS_FOUR_BUTTONS	0x40	/* 4 direction button present */
 #define ALPS_PS2_INTERLEAVED	0x80	/* 3-byte PS/2 packet interleaved with
 					   6-byte ALPS packet */
+#define ALPS_DELL		0x100	/* device is a Dell laptop */
 #define ALPS_BUTTONPAD		0x200	/* device is a clickpad */
 static const struct alps_model_info alps_model_data[] = {
 		return;
 	}
-	/* Non interleaved V2 dualpoint has separate stick button bits */
+	/* Dell non interleaved V2 dualpoint has separate stick button bits */
 	if (priv->proto_version == ALPS_PROTO_V2 &&
-	    priv->flags == (ALPS_PASS | ALPS_DUALPOINT)) {
+	    priv->flags == (ALPS_DELL | ALPS_PASS | ALPS_DUALPOINT)) {
 		left |= packet[0] & 1;
 		right |= packet[0] & 2;
 		middle |= packet[0] & 4;
 	priv->byte0 = protocol->byte0;
 	priv->mask0 = protocol->mask0;
 	priv->flags = protocol->flags;
+	if (dmi_name_in_vendors("Dell"))
+		priv->flags |= ALPS_DELL;
 	priv->x_max = 2000;
 	priv->y_max = 1400;

drivers/input/mouse/elantech.c+20−2

 	struct elantech_data *etd = psmouse->private;
 	unsigned char *packet = psmouse->packet;
 	unsigned char packet_type = packet[3] & 0x03;
+	unsigned int ic_version;
 	bool sanity_check;
 	if (etd->tp_dev && (packet[3] & 0x0f) == 0x06)
 		return PACKET_TRACKPOINT;
+	/* This represents the version of IC body. */
+	ic_version = (etd->fw_version & 0x0f0000) >> 16;
 	/*
 	 * Sanity check based on the constant bits of a packet.
 	 * The constant bits change depending on the value of
-	 * the hardware flag 'crc_enabled' but are the same for
+	 * the hardware flag 'crc_enabled' and the version of
-	 * every packet, regardless of the type.
+	 * the IC body, but are the same for every packet,
+	 * regardless of the type.
 	 */
 	if (etd->crc_enabled)
 		sanity_check = ((packet[3] & 0x08) == 0x00);
+	else if (ic_version == 7 && etd->samples[1] == 0x2A)
+		sanity_check = ((packet[3] & 0x1c) == 0x10);
 	else
 		sanity_check = ((packet[0] & 0x0c) == 0x04 &&
 				(packet[3] & 0x1c) == 0x10);
  * Avatar AVIU-145A2       0x361f00        ?               clickpad
  * Fujitsu LIFEBOOK E544   0x470f00        d0, 12, 09      2 hw buttons
  * Fujitsu LIFEBOOK E554   0x570f01        40, 14, 0c      2 hw buttons
+ * Fujitsu T725            0x470f01        05, 12, 09      2 hw buttons
  * Fujitsu H730            0x570f00        c0, 14, 0c      3 hw buttons (**)
  * Gigabyte U2442          0x450f01        58, 17, 0c      2 hw buttons
  * Lenovo L430             0x350f02        b9, 15, 0c      2 hw buttons (*)
 		     etd->capabilities[0], etd->capabilities[1],
 		     etd->capabilities[2]);
+	if (etd->hw_version != 1) {
+		if (etd->send_cmd(psmouse, ETP_SAMPLE_QUERY, etd->samples)) {
+			psmouse_err(psmouse, "failed to query sample data\n");
+			goto init_fail;
+		}
+		psmouse_info(psmouse,
+			     "Elan sample query result %02x, %02x, %02x\n",
+			     etd->samples[0], etd->samples[1], etd->samples[2]);
+	}
 	if (elantech_set_absolute_mode(psmouse)) {
 		psmouse_err(psmouse,
 			    "failed to put touchpad into absolute mode.\n");

drivers/input/mouse/elantech.h+1−0

@@ -129,6 +129,7 @@ struct elantech_data { · 128 unmodified lines
129	unsigned char reg_26;	129	unsigned char reg_26;
130	unsigned char debug;	130	unsigned char debug;
131	unsigned char capabilities[3];	131	unsigned char capabilities[3];
		132	unsigned char samples[3];
132	bool paritycheck;	133	bool paritycheck;
133	bool jumpy_cursor;	134	bool jumpy_cursor;
134	bool reports_pressure;	135	bool reports_pressure;

drivers/irqchip/irq-mips-gic.c+1−1

@@ -538,7 +538,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 537 unmodified lines
538		538
539	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)	539	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
540	{	540	{
541	smp_call_function_interrupt();	541	generic_smp_call_function_interrupt();
542		542
543	return IRQ_HANDLED;	543	return IRQ_HANDLED;
544	}	544	}

drivers/macintosh/ans-lcd.c+1−1

@@ -7,7 +7,7 @@ · 6 unmodified lines
7	#include <linux/kernel.h>	7	#include <linux/kernel.h>
8	#include <linux/miscdevice.h>	8	#include <linux/miscdevice.h>
9	#include <linux/fcntl.h>	9	#include <linux/fcntl.h>
10	#include <linux/init.h>	10	#include <linux/module.h>
11	#include <linux/delay.h>	11	#include <linux/delay.h>
12	#include <linux/fs.h>	12	#include <linux/fs.h>
13		13

drivers/md/dm-cache-policy-mq.c+0−2

@@ -1471,5 +1471,3 @@ module_exit(mq_exit); · 1470 unmodified lines
1471	MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>");	1471	MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>");
1472	MODULE_LICENSE("GPL");	1472	MODULE_LICENSE("GPL");
1473	MODULE_DESCRIPTION("mq cache policy");	1473	MODULE_DESCRIPTION("mq cache policy");
1474
1475	MODULE_ALIAS("dm-cache-default");

drivers/md/dm-cache-policy-smq.c+2−0

@@ -1789,3 +1789,5 @@ module_exit(smq_exit); · 1788 unmodified lines
1789	MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>");	1789	MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>");
1790	MODULE_LICENSE("GPL");	1790	MODULE_LICENSE("GPL");
1791	MODULE_DESCRIPTION("smq cache policy");	1791	MODULE_DESCRIPTION("smq cache policy");
		1792
		1793	MODULE_ALIAS("dm-cache-default");

drivers/md/dm-thin-metadata.c+2−2

@@ -1293,8 +1293,8 @@ static int __release_metadata_snap(struct dm_pool_metadata *pmd) · 1292 unmodified lines
1293	return r;	1293	return r;
1294		1294
1295	disk_super = dm_block_data(copy);	1295	disk_super = dm_block_data(copy);
1296	dm_sm_dec_block(pmd->metadata_sm, le64_to_cpu(disk_super->data_mapping_root));	1296	dm_btree_del(&pmd->info, le64_to_cpu(disk_super->data_mapping_root));
1297	dm_sm_dec_block(pmd->metadata_sm, le64_to_cpu(disk_super->device_details_root));	1297	dm_btree_del(&pmd->details_info, le64_to_cpu(disk_super->device_details_root));
1298	dm_sm_dec_block(pmd->metadata_sm, held_root);	1298	dm_sm_dec_block(pmd->metadata_sm, held_root);
1299		1299
1300	return dm_tm_unlock(pmd->tm, copy);	1300	return dm_tm_unlock(pmd->tm, copy);

drivers/md/dm.c+10−17

@@ -1729,7 +1729,8 @@ static int dm_merge_bvec(struct request_queue *q, · 1728 unmodified lines
1729	struct mapped_device *md = q->queuedata;	1729	struct mapped_device *md = q->queuedata;
1730	struct dm_table *map = dm_get_live_table_fast(md);	1730	struct dm_table *map = dm_get_live_table_fast(md);
1731	struct dm_target *ti;	1731	struct dm_target *ti;
1732	sector_t max_sectors, max_size = 0;	1732	sector_t max_sectors;
		1733	int max_size = 0;
1733		1734
1734	if (unlikely(!map))	1735	if (unlikely(!map))
1735	goto out;	1736	goto out;
@@ -1742,18 +1743,10 @@ static int dm_merge_bvec(struct request_queue *q, · 6 unmodified lines
1742	* Find maximum amount of I/O that won't need splitting	1743	* Find maximum amount of I/O that won't need splitting
1743	*/	1744	*/
1744	max_sectors = min(max_io_len(bvm->bi_sector, ti),	1745	max_sectors = min(max_io_len(bvm->bi_sector, ti),
1745	(sector_t) queue_max_sectors(q));	1746	(sector_t) BIO_MAX_SECTORS);
1746	max_size = (max_sectors << SECTOR_SHIFT) - bvm->bi_size;	1747	max_size = (max_sectors << SECTOR_SHIFT) - bvm->bi_size;
1747		1748	if (max_size < 0)
1748	/*	1749	max_size = 0;
1749	* FIXME: this stop-gap fix _must_ be cleaned up (by passing a sector_t
1750	* to the targets' merge function since it holds sectors not bytes).
1751	* Just doing this as an interim fix for stable@ because the more
1752	* comprehensive cleanup of switching to sector_t will impact every
1753	* DM target that implements a ->merge hook.
1754	*/
1755	if (max_size > INT_MAX)
1756	max_size = INT_MAX;
1757		1750
1758	/*	1751	/*
1759	* merge_bvec_fn() returns number of bytes	1752	* merge_bvec_fn() returns number of bytes
@@ -1761,13 +1754,13 @@ static int dm_merge_bvec(struct request_queue *q, · 1 unmodified line
1761	* max is precomputed maximal io size	1754	* max is precomputed maximal io size
1762	*/	1755	*/
1763	if (max_size && ti->type->merge)	1756	if (max_size && ti->type->merge)
1764	max_size = ti->type->merge(ti, bvm, biovec, (int) max_size);	1757	max_size = ti->type->merge(ti, bvm, biovec, max_size);
1765	/*	1758	/*
1766	* If the target doesn't support merge method and some of the devices	1759	* If the target doesn't support merge method and some of the devices
1767	* provided their merge_bvec method (we know this by looking for the	1760	* provided their merge_bvec method (we know this by looking at
1768	* max_hw_sectors that dm_set_device_limits may set), then we can't	1761	* queue_max_hw_sectors), then we can't allow bios with multiple vector
1769	* allow bios with multiple vector entries. So always set max_size	1762	* entries. So always set max_size to 0, and the code below allows
1770	* to 0, and the code below allows just one page.	1763	* just one page.
1771	*/	1764	*/
1772	else if (queue_max_hw_sectors(q) <= PAGE_SIZE >> 9)	1765	else if (queue_max_hw_sectors(q) <= PAGE_SIZE >> 9)
1773	max_size = 0;	1766	max_size = 0;

drivers/md/md.c+1−1

@@ -5759,7 +5759,7 @@ static int get_bitmap_file(struct mddev mddev, void __user arg) · 5758 unmodified lines
5759	char *ptr;	5759	char *ptr;
5760	int err;	5760	int err;
5761		5761
5762	file = kmalloc(sizeof(*file), GFP_NOIO);	5762	file = kzalloc(sizeof(*file), GFP_NOIO);
5763	if (!file)	5763	if (!file)
5764	return -ENOMEM;	5764	return -ENOMEM;
5765		5765

drivers/md/persistent-data/dm-btree-internal.h+6−0

@@ -138,4 +138,10 @@ int lower_bound(struct btree_node *n, uint64_t key); · 137 unmodified lines
138		138
139	extern struct dm_block_validator btree_node_validator;	139	extern struct dm_block_validator btree_node_validator;
140		140
		141	/*
		142	* Value type for upper levels of multi-level btrees.
		143	*/
		144	extern void init_le64_type(struct dm_transaction_manager *tm,
		145	struct dm_btree_value_type *vt);
		146
141	#endif /* DM_BTREE_INTERNAL_H */	147	#endif /* DM_BTREE_INTERNAL_H */

drivers/md/persistent-data/dm-btree-remove.c+7−10

 	return r;
 }
-static struct dm_btree_value_type le64_type = {
-	.context = NULL,
-	.size = sizeof(__le64),
-	.inc = NULL,
-	.dec = NULL,
-	.equal = NULL
-};
 int dm_btree_remove(struct dm_btree_info *info, dm_block_t root,
 		    uint64_t *keys, dm_block_t *new_root)
 {
 	int index = 0, r = 0;
 	struct shadow_spine spine;
 	struct btree_node *n;
+	struct dm_btree_value_type le64_vt;
+	init_le64_type(info->tm, &le64_vt);
 	init_shadow_spine(&spine, info);
 	for (level = 0; level < info->levels; level++) {
 		r = remove_raw(&spine, info,
 			       (level == last_level ?
-				&info->value_type : &le64_type),
+				&info->value_type : &le64_vt),
 			       root, keys[level], (unsigned *)&index);
 		if (r < 0)
 			break;
 	int index = 0, r = 0;
 	struct shadow_spine spine;
 	struct btree_node *n;
+	struct dm_btree_value_type le64_vt;
 	uint64_t k;
+	init_le64_type(info->tm, &le64_vt);
 	init_shadow_spine(&spine, info);
 	for (level = 0; level < last_level; level++) {
-		r = remove_raw(&spine, info, &le64_type,
+		r = remove_raw(&spine, info, &le64_vt,
 			       root, keys[level], (unsigned *) &index);
 		if (r < 0)
 			goto out;
 					     value_ptr(n, index));
 		delete_at(n, index);
+		keys[last_level] = k + 1ull;
 	} else
 		r = -ENODATA;

drivers/md/persistent-data/dm-btree-spine.c+37−0

@@ -249,3 +249,40 @@ int shadow_root(struct shadow_spine *s) · 248 unmodified lines
249	{	249	{
250	return s->root;	250	return s->root;
251	}	251	}
		252
		253	static void le64_inc(void context, const void value_le)
		254	{
		255	struct dm_transaction_manager *tm = context;
		256	__le64 v_le;
		257
		258	memcpy(&v_le, value_le, sizeof(v_le));
		259	dm_tm_inc(tm, le64_to_cpu(v_le));
		260	}
		261
		262	static void le64_dec(void context, const void value_le)
		263	{
		264	struct dm_transaction_manager *tm = context;
		265	__le64 v_le;
		266
		267	memcpy(&v_le, value_le, sizeof(v_le));
		268	dm_tm_dec(tm, le64_to_cpu(v_le));
		269	}
		270
		271	static int le64_equal(void context, const void value1_le, const void *value2_le)
		272	{
		273	__le64 v1_le, v2_le;
		274
		275	memcpy(&v1_le, value1_le, sizeof(v1_le));
		276	memcpy(&v2_le, value2_le, sizeof(v2_le));
		277	return v1_le == v2_le;
		278	}
		279
		280	void init_le64_type(struct dm_transaction_manager *tm,
		281	struct dm_btree_value_type *vt)
		282	{
		283	vt->context = tm;
		284	vt->size = sizeof(__le64);
		285	vt->inc = le64_inc;
		286	vt->dec = le64_dec;
		287	vt->equal = le64_equal;
		288	}

drivers/md/persistent-data/dm-btree.c+1−6

 	struct btree_node *n;
 	struct dm_btree_value_type le64_type;
-	le64_type.context = NULL;
+	init_le64_type(info->tm, &le64_type);
-	le64_type.size = sizeof(__le64);
-	le64_type.inc = NULL;
-	le64_type.dec = NULL;
-	le64_type.equal = NULL;
 	init_shadow_spine(&spine, info);
 	for (level = 0; level < (info->levels - 1); level++) {

drivers/md/raid1.c+6−4

 {
 	char b[BDEVNAME_SIZE];
 	struct r1conf *conf = mddev->private;
+	unsigned long flags;
 	/*
 	 * If it is not operational, then we have already marked it as dead
 		return;
 	}
 	set_bit(Blocked, &rdev->flags);
+	spin_lock_irqsave(&conf->device_lock, flags);
 	if (test_and_clear_bit(In_sync, &rdev->flags)) {
-		unsigned long flags;
-		spin_lock_irqsave(&conf->device_lock, flags);
 		mddev->degraded++;
 		set_bit(Faulty, &rdev->flags);
-		spin_unlock_irqrestore(&conf->device_lock, flags);
 	} else
 		set_bit(Faulty, &rdev->flags);
+	spin_unlock_irqrestore(&conf->device_lock, flags);
 	/*
 	 * if recovery is running, make sure it aborts.
 	 */
 	 * Find all failed disks within the RAID1 configuration
 	 * and mark them readable.
 	 * Called under mddev lock, so rcu protection not needed.
+	 * device_lock used to avoid races with raid1_end_read_request
+	 * which expects 'In_sync' flags and ->degraded to be consistent.
 	 */
+	spin_lock_irqsave(&conf->device_lock, flags);
 	for (i = 0; i < conf->raid_disks; i++) {
 		struct md_rdev *rdev = conf->mirrors[i].rdev;
 		struct md_rdev *repl = conf->mirrors[conf->raid_disks + i].rdev;
 			sysfs_notify_dirent_safe(rdev->sysfs_state);
 		}
 	}
-	spin_lock_irqsave(&conf->device_lock, flags);
 	mddev->degraded -= count;
 	spin_unlock_irqrestore(&conf->device_lock, flags);

drivers/md/raid5.c+3−2

 static int drop_one_stripe(struct r5conf *conf)
 {
 	struct stripe_head *sh;
-	int hash = (conf->max_nr_stripes - 1) % NR_STRIPE_HASH_LOCKS;
+	int hash = (conf->max_nr_stripes - 1) & STRIPE_HASH_LOCKS_MASK;
 	spin_lock_irq(conf->hash_locks + hash);
 	sh = get_free_stripe(conf, hash);
 	if (mutex_trylock(&conf->cache_size_mutex)) {
 		ret= 0;
-		while (ret < sc->nr_to_scan) {
+		while (ret < sc->nr_to_scan &&
+		       conf->max_nr_stripes > conf->min_nr_stripes) {
 			if (drop_one_stripe(conf) == 0) {
 				ret = SHRINK_STOP;
 				break;

drivers/mfd/Kconfig+1−1

@@ -115,7 +115,7 @@ config MFD_CROS_EC_I2C · 114 unmodified lines
115		115
116	config MFD_CROS_EC_SPI	116	config MFD_CROS_EC_SPI
117	tristate "ChromeOS Embedded Controller (SPI)"	117	tristate "ChromeOS Embedded Controller (SPI)"
118	depends on MFD_CROS_EC && CROS_EC_PROTO && SPI && OF	118	depends on MFD_CROS_EC && CROS_EC_PROTO && SPI
119		119
120	---help---	120	---help---
121	If you say Y here, you get support for talking to the ChromeOS EC	121	If you say Y here, you get support for talking to the ChromeOS EC

drivers/mfd/arizona-core.c+7−9

 		arizona->has_fully_powered_off = true;
-		disable_irq(arizona->irq);
+		disable_irq_nosync(arizona->irq);
 		arizona_enable_reset(arizona);
 		regulator_bulk_disable(arizona->num_core_supplies,
 				       arizona->core_supplies);
 			     arizona->pdata.gpio_defaults[i]);
 	}
-	pm_runtime_set_autosuspend_delay(arizona->dev, 100);
-	pm_runtime_use_autosuspend(arizona->dev);
-	pm_runtime_enable(arizona->dev);
 	/* Chip default */
 	if (!arizona->pdata.clk32k_src)
 		arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
 					   arizona->pdata.spk_fmt[i]);
 	}
+	pm_runtime_set_active(arizona->dev);
+	pm_runtime_enable(arizona->dev);
 	/* Set up for interrupts */
 	ret = arizona_irq_init(arizona);
 	if (ret != 0)
 		goto err_reset;
+	pm_runtime_set_autosuspend_delay(arizona->dev, 100);
+	pm_runtime_use_autosuspend(arizona->dev);
 	arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
 			    arizona_clkgen_err, arizona);
 	arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
 		goto err_irq;
 	}
-#ifdef CONFIG_PM
-	regulator_disable(arizona->dcvdd);
-#endif
 	return 0;
 err_irq:

drivers/misc/eeprom/at24.c+0−3

@@ -438,9 +438,6 @@ static ssize_t at24_bin_write(struct file filp, struct kobject kobj, · 437 unmodified lines
438	{	438	{
439	struct at24_data *at24;	439	struct at24_data *at24;
440		440
441	if (unlikely(off >= attr->size))
442	return -EFBIG;
443
444	at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));	441	at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
445	return at24_write(at24, buf, off, count);	442	return at24_write(at24, buf, off, count);
446	}	443	}

drivers/net/bonding/bond_main.c+1−0

@@ -786,6 +786,7 @@ static bool bond_should_notify_peers(struct bonding *bond) · 785 unmodified lines
786	slave ? slave->dev->name : "NULL");	786	slave ? slave->dev->name : "NULL");
787		787
788	if (!slave \|\| !bond->send_peer_notif \|\|	788	if (!slave \|\| !bond->send_peer_notif \|\|
		789	!netif_carrier_ok(bond->dev) \|\|
789	test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state))	790	test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state))
790	return false;	791	return false;
791		792

drivers/net/ethernet/3com/3c59x.c+8−9

 			vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
 		}
 		if (i != RX_RING_SIZE) {
-			int j;
 			pr_emerg("%s: no memory for rx ring\n", dev->name);
-			for (j = 0; j < i; j++) {
-				if (vp->rx_skbuff[j]) {
-					dev_kfree_skb(vp->rx_skbuff[j]);
-					vp->rx_skbuff[j] = NULL;
-				}
-			}
 			retval = -ENOMEM;
-			goto err_free_irq;
+			goto err_free_skb;
 		}
 		/* Wrap the ring. */
 		vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
 	if (!retval)
 		goto out;
-err_free_irq:
+err_free_skb:
+	for (i = 0; i < RX_RING_SIZE; i++) {
+		if (vp->rx_skbuff[i]) {
+			dev_kfree_skb(vp->rx_skbuff[i]);
+			vp->rx_skbuff[i] = NULL;
+		}
+	}
 	free_irq(dev->irq, dev);
 err:
 	if (vortex_debug > 1)

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c+1−1

 	if (likely(skb)) {
 		(*pkts_compl)++;
 		(*bytes_compl) += skb->len;
+		dev_kfree_skb_any(skb);
 	}
-	dev_kfree_skb_any(skb);
 	tx_buf->first_bd = 0;
 	tx_buf->skb = NULL;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c+16−0

@@ -1723,6 +1723,22 @@ static int bnx2x_nvram_write(struct bnx2x bp, u32 offset, u8 data_buf, · 1722 unmodified lines
1723	offset += sizeof(u32);	1723	offset += sizeof(u32);
1724	data_buf += sizeof(u32);	1724	data_buf += sizeof(u32);
1725	written_so_far += sizeof(u32);	1725	written_so_far += sizeof(u32);
		1726
		1727	/* At end of each 4Kb page, release nvram lock to allow MFW
		1728	* chance to take it for its own use.
		1729	*/
		1730	if ((cmd_flags & MCPR_NVM_COMMAND_LAST) &&
		1731	(written_so_far < buf_size)) {
		1732	DP(BNX2X_MSG_ETHTOOL \| BNX2X_MSG_NVM,
		1733	"Releasing NVM lock after offset 0x%x\n",
		1734	(u32)(offset - sizeof(u32)));
		1735	bnx2x_release_nvram_lock(bp);
		1736	usleep_range(1000, 2000);
		1737	rc = bnx2x_acquire_nvram_lock(bp);
		1738	if (rc)
		1739	return rc;
		1740	}
		1741
1726	cmd_flags = 0;	1742	cmd_flags = 0;
1727	}	1743	}
1728		1744

drivers/net/ethernet/brocade/bna/bnad.c+1−1

 			if (!next_cmpl->valid)
 				break;
 		}
+		packets++;
 		/* TODO: BNA_CQ_EF_LOCAL ? */
 		if (unlikely(flags & (BNA_CQ_EF_MAC_ERROR |
 		else
 			bnad_cq_setup_skb_frags(rcb, skb, sop_ci, nvecs, len);
-		packets++;
 		rcb->rxq->rx_packets++;
 		rcb->rxq->rx_bytes += totlen;
 		ccb->bytes_per_intr += totlen;

drivers/net/ethernet/cavium/Kconfig+0−3

 config THUNDER_NIC_PF
 	tristate "Thunder Physical function driver"
 	depends on 64BIT
-	default ARCH_THUNDER
 	select THUNDER_NIC_BGX
 	---help---
 	  This driver supports Thunder's NIC physical function.
 config THUNDER_NIC_VF
 	tristate "Thunder Virtual function driver"
 	depends on 64BIT
-	default ARCH_THUNDER
 	---help---
 	  This driver supports Thunder's NIC virtual function
 config	THUNDER_NIC_BGX
 	tristate "Thunder MAC interface driver (BGX)"
 	depends on 64BIT
-	default ARCH_THUNDER
 	select PHYLIB
 	select MDIO_OCTEON
 	---help---

drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c+2−1

 					EXT_MEM1_SIZE_G(size));
 		}
 	} else {
-		if (i & EXT_MEM_ENABLE_F)
+		if (i & EXT_MEM_ENABLE_F) {
 			size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
 			add_debugfs_mem(adap, "mc", MEM_MC,
 					EXT_MEM_SIZE_G(size));
+		}
 	}
 	de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap,

drivers/net/ethernet/emulex/benet/be_cmds.h+5−0

 					 BE_IF_FLAGS_VLAN_PROMISCUOUS |\
 					 BE_IF_FLAGS_MCAST_PROMISCUOUS)
+#define BE_IF_EN_FLAGS	(BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PASS_L3L4_ERRORS |\
+			BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_UNTAGGED)
+#define BE_IF_ALL_FILT_FLAGS	(BE_IF_EN_FLAGS | BE_IF_FLAGS_ALL_PROMISCUOUS)
 /* An RX interface is an object with one or more MAC addresses and
  * filtering capabilities. */
 struct be_cmd_req_if_create {

drivers/net/ethernet/emulex/benet/be_main.c+120−67

@@ -273,6 +273,10 @@ static int be_mac_addr_set(struct net_device netdev, void p) · 272 unmodified lines
273	if (ether_addr_equal(addr->sa_data, netdev->dev_addr))	273	if (ether_addr_equal(addr->sa_data, netdev->dev_addr))
274	return 0;	274	return 0;
275		275
		276	/* if device is not running, copy MAC to netdev->dev_addr */
		277	if (!netif_running(netdev))
		278	goto done;
		279
276	/* The PMAC_ADD cmd may fail if the VF doesn't have FILTMGMT	280	/* The PMAC_ADD cmd may fail if the VF doesn't have FILTMGMT
277	* privilege or if PF did not provision the new MAC address.	281	* privilege or if PF did not provision the new MAC address.
278	* On BE3, this cmd will always fail if the VF doesn't have the	282	* On BE3, this cmd will always fail if the VF doesn't have the
@@ -307,9 +311,9 @@ static int be_mac_addr_set(struct net_device netdev, void p) · 28 unmodified lines
307	status = -EPERM;	311	status = -EPERM;
308	goto err;	312	goto err;
309	}	313	}
310		314	done:
311	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);	315	ether_addr_copy(netdev->dev_addr, addr->sa_data);
312	dev_info(dev, "MAC address changed to %pM\n", mac);	316	dev_info(dev, "MAC address changed to %pM\n", addr->sa_data);
313	return 0;	317	return 0;
314	err:	318	err:
315	dev_warn(dev, "MAC address change to %pM failed\n", addr->sa_data);	319	dev_warn(dev, "MAC address change to %pM failed\n", addr->sa_data);
@@ -2452,10 +2456,24 @@ static void be_eq_clean(struct be_eq_obj *eqo) · 2136 unmodified lines
2452	be_eq_notify(eqo->adapter, eqo->q.id, false, true, num, 0);	2456	be_eq_notify(eqo->adapter, eqo->q.id, false, true, num, 0);
2453	}	2457	}
2454		2458
2455	static void be_rx_cq_clean(struct be_rx_obj *rxo)	2459	/* Free posted rx buffers that were not used */
		2460	static void be_rxq_clean(struct be_rx_obj *rxo)
2456	{	2461	{
2457	struct be_rx_page_info *page_info;
2458	struct be_queue_info *rxq = &rxo->q;	2462	struct be_queue_info *rxq = &rxo->q;
		2463	struct be_rx_page_info *page_info;
		2464
		2465	while (atomic_read(&rxq->used) > 0) {
		2466	page_info = get_rx_page_info(rxo);
		2467	put_page(page_info->page);
		2468	memset(page_info, 0, sizeof(*page_info));
		2469	}
		2470	BUG_ON(atomic_read(&rxq->used));
		2471	rxq->tail = 0;
		2472	rxq->head = 0;
		2473	}
		2474
		2475	static void be_rx_cq_clean(struct be_rx_obj *rxo)
		2476	{
2459	struct be_queue_info *rx_cq = &rxo->cq;	2477	struct be_queue_info *rx_cq = &rxo->cq;
2460	struct be_rx_compl_info *rxcp;	2478	struct be_rx_compl_info *rxcp;
2461	struct be_adapter *adapter = rxo->adapter;	2479	struct be_adapter *adapter = rxo->adapter;
@@ -2492,16 +2510,6 @@ static void be_rx_cq_clean(struct be_rx_obj *rxo) · 30 unmodified lines
2492		2510
2493	/* After cleanup, leave the CQ in unarmed state */	2511	/* After cleanup, leave the CQ in unarmed state */
2494	be_cq_notify(adapter, rx_cq->id, false, 0);	2512	be_cq_notify(adapter, rx_cq->id, false, 0);
2495
2496	/* Then free posted rx buffers that were not used */
2497	while (atomic_read(&rxq->used) > 0) {
2498	page_info = get_rx_page_info(rxo);
2499	put_page(page_info->page);
2500	memset(page_info, 0, sizeof(*page_info));
2501	}
2502	BUG_ON(atomic_read(&rxq->used));
2503	rxq->tail = 0;
2504	rxq->head = 0;
2505	}	2513	}
2506		2514
2507	static void be_tx_compl_clean(struct be_adapter *adapter)	2515	static void be_tx_compl_clean(struct be_adapter *adapter)
@@ -2581,8 +2589,8 @@ static void be_evt_queues_destroy(struct be_adapter *adapter) · 73 unmodified lines
2581	be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);	2589	be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);
2582	napi_hash_del(&eqo->napi);	2590	napi_hash_del(&eqo->napi);
2583	netif_napi_del(&eqo->napi);	2591	netif_napi_del(&eqo->napi);
		2592	free_cpumask_var(eqo->affinity_mask);
2584	}	2593	}
2585	free_cpumask_var(eqo->affinity_mask);
2586	be_queue_free(adapter, &eqo->q);	2594	be_queue_free(adapter, &eqo->q);
2587	}	2595	}
2588	}	2596	}
@@ -2599,13 +2607,7 @@ static int be_evt_queues_create(struct be_adapter *adapter) · 10 unmodified lines
2599		2607
2600	for_all_evt_queues(adapter, eqo, i) {	2608	for_all_evt_queues(adapter, eqo, i) {
2601	int numa_node = dev_to_node(&adapter->pdev->dev);	2609	int numa_node = dev_to_node(&adapter->pdev->dev);
2602	if (!zalloc_cpumask_var(&eqo->affinity_mask, GFP_KERNEL))	2610
2603	return -ENOMEM;
2604	cpumask_set_cpu(cpumask_local_spread(i, numa_node),
2605	eqo->affinity_mask);
2606	netif_napi_add(adapter->netdev, &eqo->napi, be_poll,
2607	BE_NAPI_WEIGHT);
2608	napi_hash_add(&eqo->napi);
2609	aic = &adapter->aic_obj[i];	2611	aic = &adapter->aic_obj[i];
2610	eqo->adapter = adapter;	2612	eqo->adapter = adapter;
2611	eqo->idx = i;	2613	eqo->idx = i;
@@ -2621,6 +2623,14 @@ static int be_evt_queues_create(struct be_adapter *adapter) · 9 unmodified lines
2621	rc = be_cmd_eq_create(adapter, eqo);	2623	rc = be_cmd_eq_create(adapter, eqo);
2622	if (rc)	2624	if (rc)
2623	return rc;	2625	return rc;
		2626
		2627	if (!zalloc_cpumask_var(&eqo->affinity_mask, GFP_KERNEL))
		2628	return -ENOMEM;
		2629	cpumask_set_cpu(cpumask_local_spread(i, numa_node),
		2630	eqo->affinity_mask);
		2631	netif_napi_add(adapter->netdev, &eqo->napi, be_poll,
		2632	BE_NAPI_WEIGHT);
		2633	napi_hash_add(&eqo->napi);
2624	}	2634	}
2625	return 0;	2635	return 0;
2626	}	2636	}
@@ -3359,13 +3369,54 @@ static void be_rx_qs_destroy(struct be_adapter *adapter) · 732 unmodified lines
3359	for_all_rx_queues(adapter, rxo, i) {	3369	for_all_rx_queues(adapter, rxo, i) {
3360	q = &rxo->q;	3370	q = &rxo->q;
3361	if (q->created) {	3371	if (q->created) {
		3372	/* If RXQs are destroyed while in an "out of buffer"
		3373	* state, there is a possibility of an HW stall on
		3374	* Lancer. So, post 64 buffers to each queue to relieve
		3375	* the "out of buffer" condition.
		3376	* Make sure there's space in the RXQ before posting.
		3377	*/
		3378	if (lancer_chip(adapter)) {
		3379	be_rx_cq_clean(rxo);
		3380	if (atomic_read(&q->used) == 0)
		3381	be_post_rx_frags(rxo, GFP_KERNEL,
		3382	MAX_RX_POST);
		3383	}
		3384
3362	be_cmd_rxq_destroy(adapter, q);	3385	be_cmd_rxq_destroy(adapter, q);
3363	be_rx_cq_clean(rxo);	3386	be_rx_cq_clean(rxo);
		3387	be_rxq_clean(rxo);
3364	}	3388	}
3365	be_queue_free(adapter, q);	3389	be_queue_free(adapter, q);
3366	}	3390	}
3367	}	3391	}
3368		3392
		3393	static void be_disable_if_filters(struct be_adapter *adapter)
		3394	{
		3395	be_cmd_pmac_del(adapter, adapter->if_handle,
		3396	adapter->pmac_id[0], 0);
		3397
		3398	be_clear_uc_list(adapter);
		3399
		3400	/* The IFACE flags are enabled in the open path and cleared
		3401	* in the close path. When a VF gets detached from the host and
		3402	* assigned to a VM the following happens:
		3403	* - VF's IFACE flags get cleared in the detach path
		3404	* - IFACE create is issued by the VF in the attach path
		3405	* Due to a bug in the BE3/Skyhawk-R FW
		3406	* (Lancer FW doesn't have the bug), the IFACE capability flags
		3407	* specified along with the IFACE create cmd issued by a VF are not
		3408	* honoured by FW. As a consequence, if a new driver
		3409	* (that enables/disables IFACE flags in open/close)
		3410	* is loaded in the host and an old driver is * used by a VM/VF,
		3411	* the IFACE gets created without the needed flags.
		3412	* To avoid this, disable RX-filter flags only for Lancer.
		3413	*/
		3414	if (lancer_chip(adapter)) {
		3415	be_cmd_rx_filter(adapter, BE_IF_ALL_FILT_FLAGS, OFF);
		3416	adapter->if_flags &= ~BE_IF_ALL_FILT_FLAGS;
		3417	}
		3418	}
		3419
3369	static int be_close(struct net_device *netdev)	3420	static int be_close(struct net_device *netdev)
3370	{	3421	{
3371	struct be_adapter *adapter = netdev_priv(netdev);	3422	struct be_adapter *adapter = netdev_priv(netdev);
@@ -3378,6 +3429,8 @@ static int be_close(struct net_device *netdev) · 6 unmodified lines
3378	if (!(adapter->flags & BE_FLAGS_SETUP_DONE))	3429	if (!(adapter->flags & BE_FLAGS_SETUP_DONE))
3379	return 0;	3430	return 0;
3380		3431
		3432	be_disable_if_filters(adapter);
		3433
3381	be_roce_dev_close(adapter);	3434	be_roce_dev_close(adapter);
3382		3435
3383	if (adapter->flags & BE_FLAGS_NAPI_ENABLED) {	3436	if (adapter->flags & BE_FLAGS_NAPI_ENABLED) {
@@ -3397,7 +3450,6 @@ static int be_close(struct net_device *netdev) · 13 unmodified lines
3397	be_tx_compl_clean(adapter);	3450	be_tx_compl_clean(adapter);
3398		3451
3399	be_rx_qs_destroy(adapter);	3452	be_rx_qs_destroy(adapter);
3400	be_clear_uc_list(adapter);
3401		3453
3402	for_all_evt_queues(adapter, eqo, i) {	3454	for_all_evt_queues(adapter, eqo, i) {
3403	if (msix_enabled(adapter))	3455	if (msix_enabled(adapter))
@@ -3482,6 +3534,31 @@ static int be_rx_qs_create(struct be_adapter *adapter) · 78 unmodified lines
3482	return 0;	3534	return 0;
3483	}	3535	}
3484		3536
		3537	static int be_enable_if_filters(struct be_adapter *adapter)
		3538	{
		3539	int status;
		3540
		3541	status = be_cmd_rx_filter(adapter, BE_IF_EN_FLAGS, ON);
		3542	if (status)
		3543	return status;
		3544
		3545	/* For BE3 VFs, the PF programs the initial MAC address */
		3546	if (!(BEx_chip(adapter) && be_virtfn(adapter))) {
		3547	status = be_cmd_pmac_add(adapter, adapter->netdev->dev_addr,
		3548	adapter->if_handle,
		3549	&adapter->pmac_id[0], 0);
		3550	if (status)
		3551	return status;
		3552	}
		3553
		3554	if (adapter->vlans_added)
		3555	be_vid_config(adapter);
		3556
		3557	be_set_rx_mode(adapter->netdev);
		3558
		3559	return 0;
		3560	}
		3561
3485	static int be_open(struct net_device *netdev)	3562	static int be_open(struct net_device *netdev)
3486	{	3563	{
3487	struct be_adapter *adapter = netdev_priv(netdev);	3564	struct be_adapter *adapter = netdev_priv(netdev);
@@ -3495,6 +3572,10 @@ static int be_open(struct net_device *netdev) · 7 unmodified lines
3495	if (status)	3572	if (status)
3496	goto err;	3573	goto err;
3497		3574
		3575	status = be_enable_if_filters(adapter);
		3576	if (status)
		3577	goto err;
		3578
3498	status = be_irq_register(adapter);	3579	status = be_irq_register(adapter);
3499	if (status)	3580	if (status)
3500	goto err;	3581	goto err;
@@ -3685,16 +3766,6 @@ static void be_cancel_err_detection(struct be_adapter *adapter) · 184 unmodified lines
3685	}	3766	}
3686	}	3767	}
3687		3768
3688	static void be_mac_clear(struct be_adapter *adapter)
3689	{
3690	if (adapter->pmac_id) {
3691	be_cmd_pmac_del(adapter, adapter->if_handle,
3692	adapter->pmac_id[0], 0);
3693	kfree(adapter->pmac_id);
3694	adapter->pmac_id = NULL;
3695	}
3696	}
3697
3698	#ifdef CONFIG_BE2NET_VXLAN	3769	#ifdef CONFIG_BE2NET_VXLAN
3699	static void be_disable_vxlan_offloads(struct be_adapter *adapter)	3770	static void be_disable_vxlan_offloads(struct be_adapter *adapter)
3700	{	3771	{
@@ -3769,8 +3840,8 @@ static int be_clear(struct be_adapter *adapter) · 68 unmodified lines
3769	#ifdef CONFIG_BE2NET_VXLAN	3840	#ifdef CONFIG_BE2NET_VXLAN
3770	be_disable_vxlan_offloads(adapter);	3841	be_disable_vxlan_offloads(adapter);
3771	#endif	3842	#endif
3772	/* delete the primary mac along with the uc-mac list */	3843	kfree(adapter->pmac_id);
3773	be_mac_clear(adapter);	3844	adapter->pmac_id = NULL;
3774		3845
3775	be_cmd_if_destroy(adapter, adapter->if_handle, 0);	3846	be_cmd_if_destroy(adapter, adapter->if_handle, 0);
3776		3847
@@ -3781,25 +3852,11 @@ static int be_clear(struct be_adapter *adapter) · 4 unmodified lines
3781	return 0;	3852	return 0;
3782	}	3853	}
3783		3854
3784	static int be_if_create(struct be_adapter adapter, u32 if_handle,
3785	u32 cap_flags, u32 vf)
3786	{
3787	u32 en_flags;
3788
3789	en_flags = BE_IF_FLAGS_UNTAGGED \| BE_IF_FLAGS_BROADCAST \|
3790	BE_IF_FLAGS_MULTICAST \| BE_IF_FLAGS_PASS_L3L4_ERRORS \|
3791	BE_IF_FLAGS_RSS \| BE_IF_FLAGS_DEFQ_RSS;
3792
3793	en_flags &= cap_flags;
3794
3795	return be_cmd_if_create(adapter, cap_flags, en_flags, if_handle, vf);
3796	}
3797
3798	static int be_vfs_if_create(struct be_adapter *adapter)	3855	static int be_vfs_if_create(struct be_adapter *adapter)
3799	{	3856	{
3800	struct be_resources res = {0};	3857	struct be_resources res = {0};
		3858	u32 cap_flags, en_flags, vf;
3801	struct be_vf_cfg *vf_cfg;	3859	struct be_vf_cfg *vf_cfg;
3802	u32 cap_flags, vf;
3803	int status;	3860	int status;
3804		3861
3805	/* If a FW profile exists, then cap_flags are updated */	3862	/* If a FW profile exists, then cap_flags are updated */
@@ -3820,8 +3877,12 @@ static int be_vfs_if_create(struct be_adapter *adapter) · 14 unmodified lines
3820	}	3877	}
3821	}	3878	}
3822		3879
3823	status = be_if_create(adapter, &vf_cfg->if_handle,	3880	en_flags = cap_flags & (BE_IF_FLAGS_UNTAGGED \|
3824	cap_flags, vf + 1);	3881	BE_IF_FLAGS_BROADCAST \|
		3882	BE_IF_FLAGS_MULTICAST \|
		3883	BE_IF_FLAGS_PASS_L3L4_ERRORS);
		3884	status = be_cmd_if_create(adapter, cap_flags, en_flags,
		3885	&vf_cfg->if_handle, vf + 1);
3825	if (status)	3886	if (status)
3826	return status;	3887	return status;
3827	}	3888	}
@@ -4193,15 +4254,8 @@ static int be_mac_setup(struct be_adapter *adapter) · 365 unmodified lines
4193		4254
4194	memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);	4255	memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
4195	memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);	4256	memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
4196	} else {
4197	/* Maybe the HW was reset; dev_addr must be re-programmed */
4198	memcpy(mac, adapter->netdev->dev_addr, ETH_ALEN);
4199	}	4257	}
4200		4258
4201	/* For BE3-R VFs, the PF programs the initial MAC address */
4202	if (!(BEx_chip(adapter) && be_virtfn(adapter)))
4203	be_cmd_pmac_add(adapter, mac, adapter->if_handle,
4204	&adapter->pmac_id[0], 0);
4205	return 0;	4259	return 0;
4206	}	4260	}
4207		4261
@@ -4341,6 +4395,7 @@ static int be_func_init(struct be_adapter *adapter) · 133 unmodified lines
4341	static int be_setup(struct be_adapter *adapter)	4395	static int be_setup(struct be_adapter *adapter)
4342	{	4396	{
4343	struct device *dev = &adapter->pdev->dev;	4397	struct device *dev = &adapter->pdev->dev;
		4398	u32 en_flags;
4344	int status;	4399	int status;
4345		4400
4346	status = be_func_init(adapter);	4401	status = be_func_init(adapter);
@@ -4363,8 +4418,11 @@ static int be_setup(struct be_adapter *adapter) · 16 unmodified lines
4363	if (status)	4418	if (status)
4364	goto err;	4419	goto err;
4365		4420
4366	status = be_if_create(adapter, &adapter->if_handle,	4421	/* will enable all the needed filter flags in be_open() */
4367	be_if_cap_flags(adapter), 0);	4422	en_flags = BE_IF_FLAGS_RSS \| BE_IF_FLAGS_DEFQ_RSS;
		4423	en_flags = en_flags & be_if_cap_flags(adapter);
		4424	status = be_cmd_if_create(adapter, be_if_cap_flags(adapter), en_flags,
		4425	&adapter->if_handle, 0);
4368	if (status)	4426	if (status)
4369	goto err;	4427	goto err;
4370		4428
@@ -4390,11 +4448,6 @@ static int be_setup(struct be_adapter *adapter) · 19 unmodified lines
4390	dev_err(dev, "Please upgrade firmware to version >= 4.0\n");	4448	dev_err(dev, "Please upgrade firmware to version >= 4.0\n");
4391	}	4449	}
4392		4450
4393	if (adapter->vlans_added)
4394	be_vid_config(adapter);
4395
4396	be_set_rx_mode(adapter->netdev);
4397
4398	status = be_cmd_set_flow_control(adapter, adapter->tx_fc,	4451	status = be_cmd_set_flow_control(adapter, adapter->tx_fc,
4399	adapter->rx_fc);	4452	adapter->rx_fc);
4400	if (status)	4453	if (status)

drivers/net/ethernet/freescale/fec_main.c+1−0

@@ -3438,6 +3438,7 @@ fec_probe(struct platform_device *pdev) · 3437 unmodified lines
3438		3438
3439	pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT);	3439	pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT);
3440	pm_runtime_use_autosuspend(&pdev->dev);	3440	pm_runtime_use_autosuspend(&pdev->dev);
		3441	pm_runtime_get_noresume(&pdev->dev);
3441	pm_runtime_set_active(&pdev->dev);	3442	pm_runtime_set_active(&pdev->dev);
3442	pm_runtime_enable(&pdev->dev);	3443	pm_runtime_enable(&pdev->dev);
3443		3444

drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c+2−1

@@ -586,7 +586,8 @@ static int fs_enet_start_xmit(struct sk_buff skb, struct net_device dev) · 585 unmodified lines
586	frag = skb_shinfo(skb)->frags;	586	frag = skb_shinfo(skb)->frags;
587	while (nr_frags) {	587	while (nr_frags) {
588	CBDC_SC(bdp,	588	CBDC_SC(bdp,
589	BD_ENET_TX_STATS \| BD_ENET_TX_LAST \| BD_ENET_TX_TC);	589	BD_ENET_TX_STATS \| BD_ENET_TX_INTR \| BD_ENET_TX_LAST \|
		590	BD_ENET_TX_TC);
590	CBDS_SC(bdp, BD_ENET_TX_READY);	591	CBDS_SC(bdp, BD_ENET_TX_READY);
591		592
592	if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)	593	if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)

drivers/net/ethernet/freescale/fs_enet/mac-fec.c+1−1

@@ -110,7 +110,7 @@ static int do_pd_setup(struct fs_enet_private *fep) · 109 unmodified lines
110	}	110	}
111		111
112	#define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF \| FEC_ENET_RXB)	112	#define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF \| FEC_ENET_RXB)
113	#define FEC_NAPI_TX_EVENT_MSK (FEC_ENET_TXF \| FEC_ENET_TXB)	113	#define FEC_NAPI_TX_EVENT_MSK (FEC_ENET_TXF)
114	#define FEC_RX_EVENT (FEC_ENET_RXF)	114	#define FEC_RX_EVENT (FEC_ENET_RXF)
115	#define FEC_TX_EVENT (FEC_ENET_TXF)	115	#define FEC_TX_EVENT (FEC_ENET_TXF)
116	#define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR \| FEC_ENET_BABR \| \	116	#define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR \| FEC_ENET_BABR \| \

drivers/net/ethernet/freescale/gianfar_ethtool.c+4−341

@@ -902,27 +902,6 @@ static int gfar_check_filer_hardware(struct gfar_private *priv) · 901 unmodified lines
902	return 0;	902	return 0;
903	}	903	}
904		904
905	static int gfar_comp_asc(const void a, const void b)
906	{
907	return memcmp(a, b, 4);
908	}
909
910	static int gfar_comp_desc(const void a, const void b)
911	{
912	return -memcmp(a, b, 4);
913	}
914
915	static void gfar_swap(void a, void b, int size)
916	{
917	u32 *_a = a;
918	u32 *_b = b;
919
920	swap(_a[0], _b[0]);
921	swap(_a[1], _b[1]);
922	swap(_a[2], _b[2]);
923	swap(_a[3], _b[3]);
924	}
925
926	/* Write a mask to filer cache */	905	/* Write a mask to filer cache */
927	static void gfar_set_mask(u32 mask, struct filer_table *tab)	906	static void gfar_set_mask(u32 mask, struct filer_table *tab)
928	{	907	{
@@ -1272,310 +1251,6 @@ static int gfar_convert_to_filer(struct ethtool_rx_flow_spec *rule, · 343 unmodified lines
1272	return 0;	1251	return 0;
1273	}	1252	}
1274		1253
1275	/* Copy size filer entries */
1276	static void gfar_copy_filer_entries(struct gfar_filer_entry dst[0],
1277	struct gfar_filer_entry src[0], s32 size)
1278	{
1279	while (size > 0) {
1280	size--;
1281	dst[size].ctrl = src[size].ctrl;
1282	dst[size].prop = src[size].prop;
1283	}
1284	}
1285
1286	/* Delete the contents of the filer-table between start and end
1287	* and collapse them
1288	*/
1289	static int gfar_trim_filer_entries(u32 begin, u32 end, struct filer_table *tab)
1290	{
1291	int length;
1292
1293	if (end > MAX_FILER_CACHE_IDX \|\| end < begin)
1294	return -EINVAL;
1295
1296	end++;
1297	length = end - begin;
1298
1299	/* Copy */
1300	while (end < tab->index) {
1301	tab->fe[begin].ctrl = tab->fe[end].ctrl;
1302	tab->fe[begin++].prop = tab->fe[end++].prop;
1303
1304	}
1305	/* Fill up with don't cares */
1306	while (begin < tab->index) {
1307	tab->fe[begin].ctrl = 0x60;
1308	tab->fe[begin].prop = 0xFFFFFFFF;
1309	begin++;
1310	}
1311
1312	tab->index -= length;
1313	return 0;
1314	}
1315
1316	/* Make space on the wanted location */
1317	static int gfar_expand_filer_entries(u32 begin, u32 length,
1318	struct filer_table *tab)
1319	{
1320	if (length == 0 \|\| length + tab->index > MAX_FILER_CACHE_IDX \|\|
1321	begin > MAX_FILER_CACHE_IDX)
1322	return -EINVAL;
1323
1324	gfar_copy_filer_entries(&(tab->fe[begin + length]), &(tab->fe[begin]),
1325	tab->index - length + 1);
1326
1327	tab->index += length;
1328	return 0;
1329	}
1330
1331	static int gfar_get_next_cluster_start(int start, struct filer_table *tab)
1332	{
1333	for (; (start < tab->index) && (start < MAX_FILER_CACHE_IDX - 1);
1334	start++) {
1335	if ((tab->fe[start].ctrl & (RQFCR_AND \| RQFCR_CLE)) ==
1336	(RQFCR_AND \| RQFCR_CLE))
1337	return start;
1338	}
1339	return -1;
1340	}
1341
1342	static int gfar_get_next_cluster_end(int start, struct filer_table *tab)
1343	{
1344	for (; (start < tab->index) && (start < MAX_FILER_CACHE_IDX - 1);
1345	start++) {
1346	if ((tab->fe[start].ctrl & (RQFCR_AND \| RQFCR_CLE)) ==
1347	(RQFCR_CLE))
1348	return start;
1349	}
1350	return -1;
1351	}
1352
1353	/* Uses hardwares clustering option to reduce
1354	* the number of filer table entries
1355	*/
1356	static void gfar_cluster_filer(struct filer_table *tab)
1357	{
1358	s32 i = -1, j, iend, jend;
1359
1360	while ((i = gfar_get_next_cluster_start(++i, tab)) != -1) {
1361	j = i;
1362	while ((j = gfar_get_next_cluster_start(++j, tab)) != -1) {
1363	/* The cluster entries self and the previous one
1364	* (a mask) must be identical!
1365	*/
1366	if (tab->fe[i].ctrl != tab->fe[j].ctrl)
1367	break;
1368	if (tab->fe[i].prop != tab->fe[j].prop)
1369	break;
1370	if (tab->fe[i - 1].ctrl != tab->fe[j - 1].ctrl)
1371	break;
1372	if (tab->fe[i - 1].prop != tab->fe[j - 1].prop)
1373	break;
1374	iend = gfar_get_next_cluster_end(i, tab);
1375	jend = gfar_get_next_cluster_end(j, tab);
1376	if (jend == -1 \|\| iend == -1)
1377	break;
1378
1379	/* First we make some free space, where our cluster
1380	* element should be. Then we copy it there and finally
1381	* delete in from its old location.
1382	*/
1383	if (gfar_expand_filer_entries(iend, (jend - j), tab) ==
1384	-EINVAL)
1385	break;
1386
1387	gfar_copy_filer_entries(&(tab->fe[iend + 1]),
1388	&(tab->fe[jend + 1]), jend - j);
1389
1390	if (gfar_trim_filer_entries(jend - 1,
1391	jend + (jend - j),
1392	tab) == -EINVAL)
1393	return;
1394
1395	/* Mask out cluster bit */
1396	tab->fe[iend].ctrl &= ~(RQFCR_CLE);
1397	}
1398	}
1399	}
1400
1401	/* Swaps the masked bits of a1<>a2 and b1<>b2 */
1402	static void gfar_swap_bits(struct gfar_filer_entry *a1,
1403	struct gfar_filer_entry *a2,
1404	struct gfar_filer_entry *b1,
1405	struct gfar_filer_entry *b2, u32 mask)
1406	{
1407	u32 temp[4];
1408	temp[0] = a1->ctrl & mask;
1409	temp[1] = a2->ctrl & mask;
1410	temp[2] = b1->ctrl & mask;
1411	temp[3] = b2->ctrl & mask;
1412
1413	a1->ctrl &= ~mask;
1414	a2->ctrl &= ~mask;
1415	b1->ctrl &= ~mask;
1416	b2->ctrl &= ~mask;
1417
1418	a1->ctrl \|= temp[1];
1419	a2->ctrl \|= temp[0];
1420	b1->ctrl \|= temp[3];
1421	b2->ctrl \|= temp[2];
1422	}
1423
1424	/* Generate a list consisting of masks values with their start and
1425	* end of validity and block as indicator for parts belonging
1426	* together (glued by ANDs) in mask_table
1427	*/
1428	static u32 gfar_generate_mask_table(struct gfar_mask_entry *mask_table,
1429	struct filer_table *tab)
1430	{
1431	u32 i, and_index = 0, block_index = 1;
1432
1433	for (i = 0; i < tab->index; i++) {
1434
1435	/* LSByte of control = 0 sets a mask */
1436	if (!(tab->fe[i].ctrl & 0xF)) {
1437	mask_table[and_index].mask = tab->fe[i].prop;
1438	mask_table[and_index].start = i;
1439	mask_table[and_index].block = block_index;
1440	if (and_index >= 1)
1441	mask_table[and_index - 1].end = i - 1;
1442	and_index++;
1443	}
1444	/* cluster starts and ends will be separated because they should
1445	* hold their position
1446	*/
1447	if (tab->fe[i].ctrl & RQFCR_CLE)
1448	block_index++;
1449	/* A not set AND indicates the end of a depended block */
1450	if (!(tab->fe[i].ctrl & RQFCR_AND))
1451	block_index++;
1452	}
1453
1454	mask_table[and_index - 1].end = i - 1;
1455
1456	return and_index;
1457	}
1458
1459	/* Sorts the entries of mask_table by the values of the masks.
1460	* Important: The 0xFF80 flags of the first and last entry of a
1461	* block must hold their position (which queue, CLusterEnable, ReJEct,
1462	* AND)
1463	*/
1464	static void gfar_sort_mask_table(struct gfar_mask_entry *mask_table,
1465	struct filer_table *temp_table, u32 and_index)
1466	{
1467	/* Pointer to compare function (_asc or _desc) */
1468	int (gfar_comp)(const void , const void *);
1469
1470	u32 i, size = 0, start = 0, prev = 1;
1471	u32 old_first, old_last, new_first, new_last;
1472
1473	gfar_comp = &gfar_comp_desc;
1474
1475	for (i = 0; i < and_index; i++) {
1476	if (prev != mask_table[i].block) {
1477	old_first = mask_table[start].start + 1;
1478	old_last = mask_table[i - 1].end;
1479	sort(mask_table + start, size,
1480	sizeof(struct gfar_mask_entry),
1481	gfar_comp, &gfar_swap);
1482
1483	/* Toggle order for every block. This makes the
1484	* thing more efficient!
1485	*/
1486	if (gfar_comp == gfar_comp_desc)
1487	gfar_comp = &gfar_comp_asc;
1488	else
1489	gfar_comp = &gfar_comp_desc;
1490
1491	new_first = mask_table[start].start + 1;
1492	new_last = mask_table[i - 1].end;
1493
1494	gfar_swap_bits(&temp_table->fe[new_first],
1495	&temp_table->fe[old_first],
1496	&temp_table->fe[new_last],
1497	&temp_table->fe[old_last],
1498	RQFCR_QUEUE \| RQFCR_CLE \|
1499	RQFCR_RJE \| RQFCR_AND);
1500
1501	start = i;
1502	size = 0;
1503	}
1504	size++;
1505	prev = mask_table[i].block;
1506	}
1507	}
1508
1509	/* Reduces the number of masks needed in the filer table to save entries
1510	* This is done by sorting the masks of a depended block. A depended block is
1511	* identified by gluing ANDs or CLE. The sorting order toggles after every
1512	* block. Of course entries in scope of a mask must change their location with
1513	* it.
1514	*/
1515	static int gfar_optimize_filer_masks(struct filer_table *tab)
1516	{
1517	struct filer_table *temp_table;
1518	struct gfar_mask_entry *mask_table;
1519
1520	u32 and_index = 0, previous_mask = 0, i = 0, j = 0, size = 0;
1521	s32 ret = 0;
1522
1523	/* We need a copy of the filer table because
1524	* we want to change its order
1525	*/
1526	temp_table = kmemdup(tab, sizeof(*temp_table), GFP_KERNEL);
1527	if (temp_table == NULL)
1528	return -ENOMEM;
1529
1530	mask_table = kcalloc(MAX_FILER_CACHE_IDX / 2 + 1,
1531	sizeof(struct gfar_mask_entry), GFP_KERNEL);
1532
1533	if (mask_table == NULL) {
1534	ret = -ENOMEM;
1535	goto end;
1536	}
1537
1538	and_index = gfar_generate_mask_table(mask_table, tab);
1539
1540	gfar_sort_mask_table(mask_table, temp_table, and_index);
1541
1542	/* Now we can copy the data from our duplicated filer table to
1543	* the real one in the order the mask table says
1544	*/
1545	for (i = 0; i < and_index; i++) {
1546	size = mask_table[i].end - mask_table[i].start + 1;
1547	gfar_copy_filer_entries(&(tab->fe[j]),
1548	&(temp_table->fe[mask_table[i].start]), size);
1549	j += size;
1550	}
1551
1552	/* And finally we just have to check for duplicated masks and drop the
1553	* second ones
1554	*/
1555	for (i = 0; i < tab->index && i < MAX_FILER_CACHE_IDX; i++) {
1556	if (tab->fe[i].ctrl == 0x80) {
1557	previous_mask = i++;
1558	break;
1559	}
1560	}
1561	for (; i < tab->index && i < MAX_FILER_CACHE_IDX; i++) {
1562	if (tab->fe[i].ctrl == 0x80) {
1563	if (tab->fe[i].prop == tab->fe[previous_mask].prop) {
1564	/* Two identical ones found!
1565	* So drop the second one!
1566	*/
1567	gfar_trim_filer_entries(i, i, tab);
1568	} else
1569	/* Not identical! */
1570	previous_mask = i;
1571	}
1572	}
1573
1574	kfree(mask_table);
1575	end: kfree(temp_table);
1576	return ret;
1577	}
1578
1579	/* Write the bit-pattern from software's buffer to hardware registers */	1254	/* Write the bit-pattern from software's buffer to hardware registers */
1580	static int gfar_write_filer_table(struct gfar_private *priv,	1255	static int gfar_write_filer_table(struct gfar_private *priv,
1581	struct filer_table *tab)	1256	struct filer_table *tab)
@@ -1585,11 +1260,10 @@ static int gfar_write_filer_table(struct gfar_private *priv, · 3 unmodified lines
1585	return -EBUSY;	1260	return -EBUSY;
1586		1261
1587	/* Fill regular entries */	1262	/* Fill regular entries */
1588	for (; i < MAX_FILER_IDX - 1 && (tab->fe[i].ctrl \| tab->fe[i].prop);	1263	for (; i < MAX_FILER_IDX && (tab->fe[i].ctrl \| tab->fe[i].prop); i++)
1589	i++)
1590	gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop);	1264	gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop);
1591	/* Fill the rest with fall-troughs */	1265	/* Fill the rest with fall-troughs */
1592	for (; i < MAX_FILER_IDX - 1; i++)	1266	for (; i < MAX_FILER_IDX; i++)
1593	gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF);	1267	gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF);
1594	/* Last entry must be default accept	1268	/* Last entry must be default accept
1595	* because that's what people expect	1269	* because that's what people expect
@@ -1623,7 +1297,6 @@ static int gfar_process_filer_changes(struct gfar_private *priv) · 27 unmodified lines
1623	{	1297	{
1624	struct ethtool_flow_spec_container *j;	1298	struct ethtool_flow_spec_container *j;
1625	struct filer_table *tab;	1299	struct filer_table *tab;
1626	s32 i = 0;
1627	s32 ret = 0;	1300	s32 ret = 0;
1628		1301
1629	/* So index is set to zero, too! */	1302	/* So index is set to zero, too! */
@@ -1648,17 +1321,6 @@ static int gfar_process_filer_changes(struct gfar_private *priv) · 18 unmodified lines
1648	}	1321	}
1649	}	1322	}
1650		1323
1651	i = tab->index;
1652
1653	/* Optimizations to save entries */
1654	gfar_cluster_filer(tab);
1655	gfar_optimize_filer_masks(tab);
1656
1657	pr_debug("\tSummary:\n"
1658	"\tData on hardware: %d\n"
1659	"\tCompression rate: %d%%\n",
1660	tab->index, 100 - (100 * tab->index) / i);
1661
1662	/* Write everything to hardware */	1324	/* Write everything to hardware */
1663	ret = gfar_write_filer_table(priv, tab);	1325	ret = gfar_write_filer_table(priv, tab);
1664	if (ret == -EBUSY) {	1326	if (ret == -EBUSY) {
@@ -1724,13 +1386,14 @@ static int gfar_add_cls(struct gfar_private *priv, · 59 unmodified lines
1724	}	1386	}
1725		1387
1726	process:	1388	process:
		1389	priv->rx_list.count++;
1727	ret = gfar_process_filer_changes(priv);	1390	ret = gfar_process_filer_changes(priv);
1728	if (ret)	1391	if (ret)
1729	goto clean_list;	1392	goto clean_list;
1730	priv->rx_list.count++;
1731	return ret;	1393	return ret;
1732		1394
1733	clean_list:	1395	clean_list:
		1396	priv->rx_list.count--;
1734	list_del(&temp->list);	1397	list_del(&temp->list);
1735	clean_mem:	1398	clean_mem:
1736	kfree(temp);	1399	kfree(temp);

drivers/net/ethernet/marvell/mvpp2.c+167−77

@@ -27,6 +27,8 @@ · 26 unmodified lines
27	#include <linux/of_address.h>	27	#include <linux/of_address.h>
28	#include <linux/phy.h>	28	#include <linux/phy.h>
29	#include <linux/clk.h>	29	#include <linux/clk.h>
		30	#include <linux/hrtimer.h>
		31	#include <linux/ktime.h>
30	#include <uapi/linux/ppp_defs.h>	32	#include <uapi/linux/ppp_defs.h>
31	#include <net/ip.h>	33	#include <net/ip.h>
32	#include <net/ipv6.h>	34	#include <net/ipv6.h>
@@ -299,6 +301,7 @@ · 266 unmodified lines
299		301
300	/* Coalescing */	302	/* Coalescing */
301	#define MVPP2_TXDONE_COAL_PKTS_THRESH 15	303	#define MVPP2_TXDONE_COAL_PKTS_THRESH 15
		304	#define MVPP2_TXDONE_HRTIMER_PERIOD_NS 1000000UL
302	#define MVPP2_RX_COAL_PKTS 32	305	#define MVPP2_RX_COAL_PKTS 32
303	#define MVPP2_RX_COAL_USEC 100	306	#define MVPP2_RX_COAL_USEC 100
304		307
@@ -660,6 +663,14 @@ struct mvpp2_pcpu_stats { · 355 unmodified lines
660	u64 tx_bytes;	663	u64 tx_bytes;
661	};	664	};
662		665
		666	/* Per-CPU port control */
		667	struct mvpp2_port_pcpu {
		668	struct hrtimer tx_done_timer;
		669	bool timer_scheduled;
		670	/* Tasklet for egress finalization */
		671	struct tasklet_struct tx_done_tasklet;
		672	};
		673
663	struct mvpp2_port {	674	struct mvpp2_port {
664	u8 id;	675	u8 id;
665		676
@@ -679,6 +690,9 @@ struct mvpp2_port { · 13 unmodified lines
679	u32 pending_cause_rx;	690	u32 pending_cause_rx;
680	struct napi_struct napi;	691	struct napi_struct napi;
681		692
		693	/* Per-CPU port control */
		694	struct mvpp2_port_pcpu __percpu *pcpu;
		695
682	/* Flags */	696	/* Flags */
683	unsigned long flags;	697	unsigned long flags;
684		698
@@ -776,6 +790,9 @@ struct mvpp2_txq_pcpu { · 91 unmodified lines
776	/* Array of transmitted skb */	790	/* Array of transmitted skb */
777	struct sk_buff **tx_skb;	791	struct sk_buff **tx_skb;
778		792
		793	/* Array of transmitted buffers' physical addresses */
		794	dma_addr_t *tx_buffs;
		795
779	/* Index of last TX DMA descriptor that was inserted */	796	/* Index of last TX DMA descriptor that was inserted */
780	int txq_put_index;	797	int txq_put_index;
781		798
@@ -913,8 +930,6 @@ struct mvpp2_bm_pool { · 131 unmodified lines
913	/* Occupied buffers indicator */	930	/* Occupied buffers indicator */
914	atomic_t in_use;	931	atomic_t in_use;
915	int in_use_thresh;	932	int in_use_thresh;
916
917	spinlock_t lock;
918	};	933	};
919		934
920	struct mvpp2_buff_hdr {	935	struct mvpp2_buff_hdr {
@@ -963,9 +978,13 @@ static void mvpp2_txq_inc_get(struct mvpp2_txq_pcpu *txq_pcpu) · 42 unmodified lines
963	}	978	}
964		979
965	static void mvpp2_txq_inc_put(struct mvpp2_txq_pcpu *txq_pcpu,	980	static void mvpp2_txq_inc_put(struct mvpp2_txq_pcpu *txq_pcpu,
966	struct sk_buff *skb)	981	struct sk_buff *skb,
		982	struct mvpp2_tx_desc *tx_desc)
967	{	983	{
968	txq_pcpu->tx_skb[txq_pcpu->txq_put_index] = skb;	984	txq_pcpu->tx_skb[txq_pcpu->txq_put_index] = skb;
		985	if (skb)
		986	txq_pcpu->tx_buffs[txq_pcpu->txq_put_index] =
		987	tx_desc->buf_phys_addr;
969	txq_pcpu->txq_put_index++;	988	txq_pcpu->txq_put_index++;
970	if (txq_pcpu->txq_put_index == txq_pcpu->size)	989	if (txq_pcpu->txq_put_index == txq_pcpu->size)
971	txq_pcpu->txq_put_index = 0;	990	txq_pcpu->txq_put_index = 0;
@@ -3376,7 +3395,6 @@ static int mvpp2_bm_pool_create(struct platform_device *pdev, · 2404 unmodified lines
3376	bm_pool->pkt_size = 0;	3395	bm_pool->pkt_size = 0;
3377	bm_pool->buf_num = 0;	3396	bm_pool->buf_num = 0;
3378	atomic_set(&bm_pool->in_use, 0);	3397	atomic_set(&bm_pool->in_use, 0);
3379	spin_lock_init(&bm_pool->lock);
3380		3398
3381	return 0;	3399	return 0;
3382	}	3400	}
@@ -3647,7 +3665,6 @@ static struct mvpp2_bm_pool * · 264 unmodified lines
3647	mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,	3665	mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,
3648	int pkt_size)	3666	int pkt_size)
3649	{	3667	{
3650	unsigned long flags = 0;
3651	struct mvpp2_bm_pool *new_pool = &port->priv->bm_pools[pool];	3668	struct mvpp2_bm_pool *new_pool = &port->priv->bm_pools[pool];
3652	int num;	3669	int num;
3653		3670
@@ -3656,8 +3673,6 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 2 unmodified lines
3656	return NULL;	3673	return NULL;
3657	}	3674	}
3658		3675
3659	spin_lock_irqsave(&new_pool->lock, flags);
3660
3661	if (new_pool->type == MVPP2_BM_FREE)	3676	if (new_pool->type == MVPP2_BM_FREE)
3662	new_pool->type = type;	3677	new_pool->type = type;
3663		3678
@@ -3686,8 +3701,6 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 22 unmodified lines
3686	if (num != pkts_num) {	3701	if (num != pkts_num) {
3687	WARN(1, "pool %d: %d of %d allocated\n",	3702	WARN(1, "pool %d: %d of %d allocated\n",
3688	new_pool->id, num, pkts_num);	3703	new_pool->id, num, pkts_num);
3689	/* We need to undo the bufs_add() allocations */
3690	spin_unlock_irqrestore(&new_pool->lock, flags);
3691	return NULL;	3704	return NULL;
3692	}	3705	}
3693	}	3706	}
@@ -3695,15 +3708,12 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 1 unmodified line
3695	mvpp2_bm_pool_bufsize_set(port->priv, new_pool,	3708	mvpp2_bm_pool_bufsize_set(port->priv, new_pool,
3696	MVPP2_RX_BUF_SIZE(new_pool->pkt_size));	3709	MVPP2_RX_BUF_SIZE(new_pool->pkt_size));
3697		3710
3698	spin_unlock_irqrestore(&new_pool->lock, flags);
3699
3700	return new_pool;	3711	return new_pool;
3701	}	3712	}
3702		3713
3703	/* Initialize pools for swf */	3714	/* Initialize pools for swf */
3704	static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port)	3715	static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port)
3705	{	3716	{
3706	unsigned long flags = 0;
3707	int rxq;	3717	int rxq;
3708		3718
3709	if (!port->pool_long) {	3719	if (!port->pool_long) {
@@ -3714,9 +3724,7 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port) · 4 unmodified lines
3714	if (!port->pool_long)	3724	if (!port->pool_long)
3715	return -ENOMEM;	3725	return -ENOMEM;
3716		3726
3717	spin_lock_irqsave(&port->pool_long->lock, flags);
3718	port->pool_long->port_map \|= (1 << port->id);	3727	port->pool_long->port_map \|= (1 << port->id);
3719	spin_unlock_irqrestore(&port->pool_long->lock, flags);
3720		3728
3721	for (rxq = 0; rxq < rxq_number; rxq++)	3729	for (rxq = 0; rxq < rxq_number; rxq++)
3722	mvpp2_rxq_long_pool_set(port, rxq, port->pool_long->id);	3730	mvpp2_rxq_long_pool_set(port, rxq, port->pool_long->id);
@@ -3730,9 +3738,7 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port) · 7 unmodified lines
3730	if (!port->pool_short)	3738	if (!port->pool_short)
3731	return -ENOMEM;	3739	return -ENOMEM;
3732		3740
3733	spin_lock_irqsave(&port->pool_short->lock, flags);
3734	port->pool_short->port_map \|= (1 << port->id);	3741	port->pool_short->port_map \|= (1 << port->id);
3735	spin_unlock_irqrestore(&port->pool_short->lock, flags);
3736		3742
3737	for (rxq = 0; rxq < rxq_number; rxq++)	3743	for (rxq = 0; rxq < rxq_number; rxq++)
3738	mvpp2_rxq_short_pool_set(port, rxq,	3744	mvpp2_rxq_short_pool_set(port, rxq,
@@ -3806,7 +3812,6 @@ static void mvpp2_interrupts_unmask(void *arg) · 67 unmodified lines
3806		3812
3807	mvpp2_write(port->priv, MVPP2_ISR_RX_TX_MASK_REG(port->id),	3813	mvpp2_write(port->priv, MVPP2_ISR_RX_TX_MASK_REG(port->id),
3808	(MVPP2_CAUSE_MISC_SUM_MASK \|	3814	(MVPP2_CAUSE_MISC_SUM_MASK \|
3809	MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK \|
3810	MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK));	3815	MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK));
3811	}	3816	}
3812		3817
@@ -4382,23 +4387,6 @@ static void mvpp2_rx_time_coal_set(struct mvpp2_port *port, · 569 unmodified lines
4382	rxq->time_coal = usec;	4387	rxq->time_coal = usec;
4383	}	4388	}
4384		4389
4385	/* Set threshold for TX_DONE pkts coalescing */
4386	static void mvpp2_tx_done_pkts_coal_set(void *arg)
4387	{
4388	struct mvpp2_port *port = arg;
4389	int queue;
4390	u32 val;
4391
4392	for (queue = 0; queue < txq_number; queue++) {
4393	struct mvpp2_tx_queue *txq = port->txqs[queue];
4394
4395	val = (txq->done_pkts_coal << MVPP2_TRANSMITTED_THRESH_OFFSET) &
4396	MVPP2_TRANSMITTED_THRESH_MASK;
4397	mvpp2_write(port->priv, MVPP2_TXQ_NUM_REG, txq->id);
4398	mvpp2_write(port->priv, MVPP2_TXQ_THRESH_REG, val);
4399	}
4400	}
4401
4402	/* Free Tx queue skbuffs */	4390	/* Free Tx queue skbuffs */
4403	static void mvpp2_txq_bufs_free(struct mvpp2_port *port,	4391	static void mvpp2_txq_bufs_free(struct mvpp2_port *port,
4404	struct mvpp2_tx_queue *txq,	4392	struct mvpp2_tx_queue *txq,
@@ -4407,8 +4395,8 @@ static void mvpp2_txq_bufs_free(struct mvpp2_port *port, · 2 unmodified lines
4407	int i;	4395	int i;
4408		4396
4409	for (i = 0; i < num; i++) {	4397	for (i = 0; i < num; i++) {
4410	struct mvpp2_tx_desc *tx_desc = txq->descs +	4398	dma_addr_t buf_phys_addr =
4411	txq_pcpu->txq_get_index;	4399	txq_pcpu->tx_buffs[txq_pcpu->txq_get_index];
4412	struct sk_buff *skb = txq_pcpu->tx_skb[txq_pcpu->txq_get_index];	4400	struct sk_buff *skb = txq_pcpu->tx_skb[txq_pcpu->txq_get_index];
4413		4401
4414	mvpp2_txq_inc_get(txq_pcpu);	4402	mvpp2_txq_inc_get(txq_pcpu);
@@ -4416,8 +4404,8 @@ static void mvpp2_txq_bufs_free(struct mvpp2_port *port, · 1 unmodified line
4416	if (!skb)	4404	if (!skb)
4417	continue;	4405	continue;
4418		4406
4419	dma_unmap_single(port->dev->dev.parent, tx_desc->buf_phys_addr,	4407	dma_unmap_single(port->dev->dev.parent, buf_phys_addr,
4420	tx_desc->data_size, DMA_TO_DEVICE);	4408	skb_headlen(skb), DMA_TO_DEVICE);
4421	dev_kfree_skb_any(skb);	4409	dev_kfree_skb_any(skb);
4422	}	4410	}
4423	}	4411	}
@@ -4433,7 +4421,7 @@ static inline struct mvpp2_rx_queue mvpp2_get_rx_queue(struct mvpp2_port port, · 9 unmodified lines
4433	static inline struct mvpp2_tx_queue mvpp2_get_tx_queue(struct mvpp2_port port,	4421	static inline struct mvpp2_tx_queue mvpp2_get_tx_queue(struct mvpp2_port port,
4434	u32 cause)	4422	u32 cause)
4435	{	4423	{
4436	int queue = fls(cause >> 16) - 1;	4424	int queue = fls(cause) - 1;
4437		4425
4438	return port->txqs[queue];	4426	return port->txqs[queue];
4439	}	4427	}
@@ -4460,6 +4448,29 @@ static void mvpp2_txq_done(struct mvpp2_port port, struct mvpp2_tx_queue txq, · 20 unmodified lines
4460	netif_tx_wake_queue(nq);	4448	netif_tx_wake_queue(nq);
4461	}	4449	}
4462		4450
		4451	static unsigned int mvpp2_tx_done(struct mvpp2_port *port, u32 cause)
		4452	{
		4453	struct mvpp2_tx_queue *txq;
		4454	struct mvpp2_txq_pcpu *txq_pcpu;
		4455	unsigned int tx_todo = 0;
		4456
		4457	while (cause) {
		4458	txq = mvpp2_get_tx_queue(port, cause);
		4459	if (!txq)
		4460	break;
		4461
		4462	txq_pcpu = this_cpu_ptr(txq->pcpu);
		4463
		4464	if (txq_pcpu->count) {
		4465	mvpp2_txq_done(port, txq, txq_pcpu);
		4466	tx_todo += txq_pcpu->count;
		4467	}
		4468
		4469	cause &= ~(1 << txq->log_id);
		4470	}
		4471	return tx_todo;
		4472	}
		4473
4463	/* Rx/Tx queue initialization/cleanup methods */	4474	/* Rx/Tx queue initialization/cleanup methods */
4464		4475
4465	/* Allocate and initialize descriptors for aggr TXQ */	4476	/* Allocate and initialize descriptors for aggr TXQ */
@@ -4649,12 +4660,13 @@ static int mvpp2_txq_init(struct mvpp2_port *port, · 183 unmodified lines
4649	txq_pcpu->tx_skb = kmalloc(txq_pcpu->size *	4660	txq_pcpu->tx_skb = kmalloc(txq_pcpu->size *
4650	sizeof(*txq_pcpu->tx_skb),	4661	sizeof(*txq_pcpu->tx_skb),
4651	GFP_KERNEL);	4662	GFP_KERNEL);
4652	if (!txq_pcpu->tx_skb) {	4663	if (!txq_pcpu->tx_skb)
4653	dma_free_coherent(port->dev->dev.parent,	4664	goto error;
4654	txq->size * MVPP2_DESC_ALIGNED_SIZE,	4665
4655	txq->descs, txq->descs_phys);	4666	txq_pcpu->tx_buffs = kmalloc(txq_pcpu->size *
4656	return -ENOMEM;	4667	sizeof(dma_addr_t), GFP_KERNEL);
4657	}	4668	if (!txq_pcpu->tx_buffs)
		4669	goto error;
4658		4670
4659	txq_pcpu->count = 0;	4671	txq_pcpu->count = 0;
4660	txq_pcpu->reserved_num = 0;	4672	txq_pcpu->reserved_num = 0;
@@ -4663,6 +4675,19 @@ static int mvpp2_txq_init(struct mvpp2_port *port, · 2 unmodified lines
4663	}	4675	}
4664		4676
4665	return 0;	4677	return 0;
		4678
		4679	error:
		4680	for_each_present_cpu(cpu) {
		4681	txq_pcpu = per_cpu_ptr(txq->pcpu, cpu);
		4682	kfree(txq_pcpu->tx_skb);
		4683	kfree(txq_pcpu->tx_buffs);
		4684	}
		4685
		4686	dma_free_coherent(port->dev->dev.parent,
		4687	txq->size * MVPP2_DESC_ALIGNED_SIZE,
		4688	txq->descs, txq->descs_phys);
		4689
		4690	return -ENOMEM;
4666	}	4691	}
4667		4692
4668	/* Free allocated TXQ resources */	4693	/* Free allocated TXQ resources */
@@ -4675,6 +4700,7 @@ static void mvpp2_txq_deinit(struct mvpp2_port *port, · 6 unmodified lines
4675	for_each_present_cpu(cpu) {	4700	for_each_present_cpu(cpu) {
4676	txq_pcpu = per_cpu_ptr(txq->pcpu, cpu);	4701	txq_pcpu = per_cpu_ptr(txq->pcpu, cpu);
4677	kfree(txq_pcpu->tx_skb);	4702	kfree(txq_pcpu->tx_skb);
		4703	kfree(txq_pcpu->tx_buffs);
4678	}	4704	}
4679		4705
4680	if (txq->descs)	4706	if (txq->descs)
@@ -4805,7 +4831,6 @@ static int mvpp2_setup_txqs(struct mvpp2_port *port) · 124 unmodified lines
4805	goto err_cleanup;	4831	goto err_cleanup;
4806	}	4832	}
4807		4833
4808	on_each_cpu(mvpp2_tx_done_pkts_coal_set, port, 1);
4809	on_each_cpu(mvpp2_txq_sent_counter_clear, port, 1);	4834	on_each_cpu(mvpp2_txq_sent_counter_clear, port, 1);
4810	return 0;	4835	return 0;
4811		4836
@@ -4887,6 +4912,49 @@ static void mvpp2_link_event(struct net_device *dev) · 75 unmodified lines
4887	}	4912	}
4888	}	4913	}
4889		4914
		4915	static void mvpp2_timer_set(struct mvpp2_port_pcpu *port_pcpu)
		4916	{
		4917	ktime_t interval;
		4918
		4919	if (!port_pcpu->timer_scheduled) {
		4920	port_pcpu->timer_scheduled = true;
		4921	interval = ktime_set(0, MVPP2_TXDONE_HRTIMER_PERIOD_NS);
		4922	hrtimer_start(&port_pcpu->tx_done_timer, interval,
		4923	HRTIMER_MODE_REL_PINNED);
		4924	}
		4925	}
		4926
		4927	static void mvpp2_tx_proc_cb(unsigned long data)
		4928	{
		4929	struct net_device dev = (struct net_device )data;
		4930	struct mvpp2_port *port = netdev_priv(dev);
		4931	struct mvpp2_port_pcpu *port_pcpu = this_cpu_ptr(port->pcpu);
		4932	unsigned int tx_todo, cause;
		4933
		4934	if (!netif_running(dev))
		4935	return;
		4936	port_pcpu->timer_scheduled = false;
		4937
		4938	/* Process all the Tx queues */
		4939	cause = (1 << txq_number) - 1;
		4940	tx_todo = mvpp2_tx_done(port, cause);
		4941
		4942	/* Set the timer in case not all the packets were processed */
		4943	if (tx_todo)
		4944	mvpp2_timer_set(port_pcpu);
		4945	}
		4946
		4947	static enum hrtimer_restart mvpp2_hr_timer_cb(struct hrtimer *timer)
		4948	{
		4949	struct mvpp2_port_pcpu *port_pcpu = container_of(timer,
		4950	struct mvpp2_port_pcpu,
		4951	tx_done_timer);
		4952
		4953	tasklet_schedule(&port_pcpu->tx_done_tasklet);
		4954
		4955	return HRTIMER_NORESTART;
		4956	}
		4957
4890	/* Main RX/TX processing routines */	4958	/* Main RX/TX processing routines */
4891		4959
4892	/* Display more error info */	4960	/* Display more error info */
@@ -5144,11 +5212,11 @@ static int mvpp2_tx_frag_process(struct mvpp2_port port, struct sk_buff skb, · 251 unmodified lines
5144	if (i == (skb_shinfo(skb)->nr_frags - 1)) {	5212	if (i == (skb_shinfo(skb)->nr_frags - 1)) {
5145	/* Last descriptor */	5213	/* Last descriptor */
5146	tx_desc->command = MVPP2_TXD_L_DESC;	5214	tx_desc->command = MVPP2_TXD_L_DESC;
5147	mvpp2_txq_inc_put(txq_pcpu, skb);	5215	mvpp2_txq_inc_put(txq_pcpu, skb, tx_desc);
5148	} else {	5216	} else {
5149	/* Descriptor in the middle: Not First, Not Last */	5217	/* Descriptor in the middle: Not First, Not Last */
5150	tx_desc->command = 0;	5218	tx_desc->command = 0;
5151	mvpp2_txq_inc_put(txq_pcpu, NULL);	5219	mvpp2_txq_inc_put(txq_pcpu, NULL, tx_desc);
5152	}	5220	}
5153	}	5221	}
5154		5222
@@ -5214,12 +5282,12 @@ static int mvpp2_tx(struct sk_buff skb, struct net_device dev) · 59 unmodified lines
5214	/* First and Last descriptor */	5282	/* First and Last descriptor */
5215	tx_cmd \|= MVPP2_TXD_F_DESC \| MVPP2_TXD_L_DESC;	5283	tx_cmd \|= MVPP2_TXD_F_DESC \| MVPP2_TXD_L_DESC;
5216	tx_desc->command = tx_cmd;	5284	tx_desc->command = tx_cmd;
5217	mvpp2_txq_inc_put(txq_pcpu, skb);	5285	mvpp2_txq_inc_put(txq_pcpu, skb, tx_desc);
5218	} else {	5286	} else {
5219	/* First but not Last */	5287	/* First but not Last */
5220	tx_cmd \|= MVPP2_TXD_F_DESC \| MVPP2_TXD_PADDING_DISABLE;	5288	tx_cmd \|= MVPP2_TXD_F_DESC \| MVPP2_TXD_PADDING_DISABLE;
5221	tx_desc->command = tx_cmd;	5289	tx_desc->command = tx_cmd;
5222	mvpp2_txq_inc_put(txq_pcpu, NULL);	5290	mvpp2_txq_inc_put(txq_pcpu, NULL, tx_desc);
5223		5291
5224	/* Continue with other skb fragments */	5292	/* Continue with other skb fragments */
5225	if (mvpp2_tx_frag_process(port, skb, aggr_txq, txq)) {	5293	if (mvpp2_tx_frag_process(port, skb, aggr_txq, txq)) {
@@ -5255,6 +5323,17 @@ out: · 29 unmodified lines
5255	dev_kfree_skb_any(skb);	5323	dev_kfree_skb_any(skb);
5256	}	5324	}
5257		5325
		5326	/* Finalize TX processing */
		5327	if (txq_pcpu->count >= txq->done_pkts_coal)
		5328	mvpp2_txq_done(port, txq, txq_pcpu);
		5329
		5330	/* Set the timer in case not all frags were processed */
		5331	if (txq_pcpu->count <= frags && txq_pcpu->count > 0) {
		5332	struct mvpp2_port_pcpu *port_pcpu = this_cpu_ptr(port->pcpu);
		5333
		5334	mvpp2_timer_set(port_pcpu);
		5335	}
		5336
5258	return NETDEV_TX_OK;	5337	return NETDEV_TX_OK;
5259	}	5338	}
5260		5339
@@ -5268,10 +5347,11 @@ static inline void mvpp2_cause_error(struct net_device *dev, int cause) · 7 unmodified lines
5268	netdev_err(dev, "tx fifo underrun error\n");	5347	netdev_err(dev, "tx fifo underrun error\n");
5269	}	5348	}
5270		5349
5271	static void mvpp2_txq_done_percpu(void *arg)	5350	static int mvpp2_poll(struct napi_struct *napi, int budget)
5272	{	5351	{
5273	struct mvpp2_port *port = arg;	5352	u32 cause_rx_tx, cause_rx, cause_misc;
5274	u32 cause_rx_tx, cause_tx, cause_misc;	5353	int rx_done = 0;
		5354	struct mvpp2_port *port = netdev_priv(napi->dev);
5275		5355
5276	/* Rx/Tx cause register	5356	/* Rx/Tx cause register
5277	*	5357	*
@@ -5285,7 +5365,7 @@ static void mvpp2_txq_done_percpu(void *arg) · 7 unmodified lines
5285	*/	5365	*/
5286	cause_rx_tx = mvpp2_read(port->priv,	5366	cause_rx_tx = mvpp2_read(port->priv,
5287	MVPP2_ISR_RX_TX_CAUSE_REG(port->id));	5367	MVPP2_ISR_RX_TX_CAUSE_REG(port->id));
5288	cause_tx = cause_rx_tx & MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;	5368	cause_rx_tx &= ~MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;
5289	cause_misc = cause_rx_tx & MVPP2_CAUSE_MISC_SUM_MASK;	5369	cause_misc = cause_rx_tx & MVPP2_CAUSE_MISC_SUM_MASK;
5290		5370
5291	if (cause_misc) {	5371	if (cause_misc) {
@@ -5297,26 +5377,6 @@ static void mvpp2_txq_done_percpu(void *arg) · 5 unmodified lines
5297	cause_rx_tx & ~MVPP2_CAUSE_MISC_SUM_MASK);	5377	cause_rx_tx & ~MVPP2_CAUSE_MISC_SUM_MASK);
5298	}	5378	}
5299		5379
5300	/* Release TX descriptors */
5301	if (cause_tx) {
5302	struct mvpp2_tx_queue *txq = mvpp2_get_tx_queue(port, cause_tx);
5303	struct mvpp2_txq_pcpu *txq_pcpu = this_cpu_ptr(txq->pcpu);
5304
5305	if (txq_pcpu->count)
5306	mvpp2_txq_done(port, txq, txq_pcpu);
5307	}
5308	}
5309
5310	static int mvpp2_poll(struct napi_struct *napi, int budget)
5311	{
5312	u32 cause_rx_tx, cause_rx;
5313	int rx_done = 0;
5314	struct mvpp2_port *port = netdev_priv(napi->dev);
5315
5316	on_each_cpu(mvpp2_txq_done_percpu, port, 1);
5317
5318	cause_rx_tx = mvpp2_read(port->priv,
5319	MVPP2_ISR_RX_TX_CAUSE_REG(port->id));
5320	cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK;	5380	cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK;
5321		5381
5322	/* Process RX packets */	5382	/* Process RX packets */
@@ -5561,6 +5621,8 @@ err_cleanup_rxqs: · 238 unmodified lines
5561	static int mvpp2_stop(struct net_device *dev)	5621	static int mvpp2_stop(struct net_device *dev)
5562	{	5622	{
5563	struct mvpp2_port *port = netdev_priv(dev);	5623	struct mvpp2_port *port = netdev_priv(dev);
		5624	struct mvpp2_port_pcpu *port_pcpu;
		5625	int cpu;
5564		5626
5565	mvpp2_stop_dev(port);	5627	mvpp2_stop_dev(port);
5566	mvpp2_phy_disconnect(port);	5628	mvpp2_phy_disconnect(port);
@@ -5569,6 +5631,13 @@ static int mvpp2_stop(struct net_device *dev) · 2 unmodified lines
5569	on_each_cpu(mvpp2_interrupts_mask, port, 1);	5631	on_each_cpu(mvpp2_interrupts_mask, port, 1);
5570		5632
5571	free_irq(port->irq, port);	5633	free_irq(port->irq, port);
		5634	for_each_present_cpu(cpu) {
		5635	port_pcpu = per_cpu_ptr(port->pcpu, cpu);
		5636
		5637	hrtimer_cancel(&port_pcpu->tx_done_timer);
		5638	port_pcpu->timer_scheduled = false;
		5639	tasklet_kill(&port_pcpu->tx_done_tasklet);
		5640	}
5572	mvpp2_cleanup_rxqs(port);	5641	mvpp2_cleanup_rxqs(port);
5573	mvpp2_cleanup_txqs(port);	5642	mvpp2_cleanup_txqs(port);
5574		5643
@@ -5784,7 +5853,6 @@ static int mvpp2_ethtool_set_coalesce(struct net_device *dev, · 209 unmodified lines
5784	txq->done_pkts_coal = c->tx_max_coalesced_frames;	5853	txq->done_pkts_coal = c->tx_max_coalesced_frames;
5785	}	5854	}
5786		5855
5787	on_each_cpu(mvpp2_tx_done_pkts_coal_set, port, 1);
5788	return 0;	5856	return 0;
5789	}	5857	}
5790		5858
@@ -6035,6 +6103,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 244 unmodified lines
6035	{	6103	{
6036	struct device_node *phy_node;	6104	struct device_node *phy_node;
6037	struct mvpp2_port *port;	6105	struct mvpp2_port *port;
		6106	struct mvpp2_port_pcpu *port_pcpu;
6038	struct net_device *dev;	6107	struct net_device *dev;
6039	struct resource *res;	6108	struct resource *res;
6040	const char *dt_mac_addr;	6109	const char *dt_mac_addr;
@@ -6044,7 +6113,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 3 unmodified lines
6044	int features;	6113	int features;
6045	int phy_mode;	6114	int phy_mode;
6046	int priv_common_regs_num = 2;	6115	int priv_common_regs_num = 2;
6047	int err, i;	6116	int err, i, cpu;
6048		6117
6049	dev = alloc_etherdev_mqs(sizeof(struct mvpp2_port), txq_number,	6118	dev = alloc_etherdev_mqs(sizeof(struct mvpp2_port), txq_number,
6050	rxq_number);	6119	rxq_number);
@@ -6135,6 +6204,24 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 84 unmodified lines
6135	}	6204	}
6136	mvpp2_port_power_up(port);	6205	mvpp2_port_power_up(port);
6137		6206
		6207	port->pcpu = alloc_percpu(struct mvpp2_port_pcpu);
		6208	if (!port->pcpu) {
		6209	err = -ENOMEM;
		6210	goto err_free_txq_pcpu;
		6211	}
		6212
		6213	for_each_present_cpu(cpu) {
		6214	port_pcpu = per_cpu_ptr(port->pcpu, cpu);
		6215
		6216	hrtimer_init(&port_pcpu->tx_done_timer, CLOCK_MONOTONIC,
		6217	HRTIMER_MODE_REL_PINNED);
		6218	port_pcpu->tx_done_timer.function = mvpp2_hr_timer_cb;
		6219	port_pcpu->timer_scheduled = false;
		6220
		6221	tasklet_init(&port_pcpu->tx_done_tasklet, mvpp2_tx_proc_cb,
		6222	(unsigned long)dev);
		6223	}
		6224
6138	netif_napi_add(dev, &port->napi, mvpp2_poll, NAPI_POLL_WEIGHT);	6225	netif_napi_add(dev, &port->napi, mvpp2_poll, NAPI_POLL_WEIGHT);
6139	features = NETIF_F_SG \| NETIF_F_IP_CSUM;	6226	features = NETIF_F_SG \| NETIF_F_IP_CSUM;
6140	dev->features = features \| NETIF_F_RXCSUM;	6227	dev->features = features \| NETIF_F_RXCSUM;
@@ -6144,7 +6231,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 3 unmodified lines
6144	err = register_netdev(dev);	6231	err = register_netdev(dev);
6145	if (err < 0) {	6232	if (err < 0) {
6146	dev_err(&pdev->dev, "failed to register netdev\n");	6233	dev_err(&pdev->dev, "failed to register netdev\n");
6147	goto err_free_txq_pcpu;	6234	goto err_free_port_pcpu;
6148	}	6235	}
6149	netdev_info(dev, "Using %s mac address %pM\n", mac_from, dev->dev_addr);	6236	netdev_info(dev, "Using %s mac address %pM\n", mac_from, dev->dev_addr);
6150		6237
@@ -6153,6 +6240,8 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 2 unmodified lines
6153	priv->port_list[id] = port;	6240	priv->port_list[id] = port;
6154	return 0;	6241	return 0;
6155		6242
		6243	err_free_port_pcpu:
		6244	free_percpu(port->pcpu);
6156	err_free_txq_pcpu:	6245	err_free_txq_pcpu:
6157	for (i = 0; i < txq_number; i++)	6246	for (i = 0; i < txq_number; i++)
6158	free_percpu(port->txqs[i]->pcpu);	6247	free_percpu(port->txqs[i]->pcpu);
@@ -6171,6 +6260,7 @@ static void mvpp2_port_remove(struct mvpp2_port *port) · 12 unmodified lines
6171	int i;	6260	int i;
6172		6261
6173	unregister_netdev(port->dev);	6262	unregister_netdev(port->dev);
		6263	free_percpu(port->pcpu);
6174	free_percpu(port->stats);	6264	free_percpu(port->stats);
6175	for (i = 0; i < txq_number; i++)	6265	for (i = 0; i < txq_number; i++)
6176	free_percpu(port->txqs[i]->pcpu);	6266	free_percpu(port->txqs[i]->pcpu);

drivers/net/ethernet/mellanox/mlx5/core/main.c+2−0

@@ -391,6 +391,8 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) · 390 unmodified lines
391	/* disable cmdif checksum */	391	/* disable cmdif checksum */
392	MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0);	392	MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0);
393		393
		394	MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12);
		395
394	err = set_caps(dev, set_ctx, set_sz);	396	err = set_caps(dev, set_ctx, set_sz);
395		397
396	query_ex:	398	query_ex:

drivers/net/ethernet/realtek/r8169.c+3−1

 	case RTL_GIGA_MAC_VER_46:
 	case RTL_GIGA_MAC_VER_47:
 	case RTL_GIGA_MAC_VER_48:
+		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST | RX_EARLY_OFF);
+		break;
 	case RTL_GIGA_MAC_VER_49:
 	case RTL_GIGA_MAC_VER_50:
 	case RTL_GIGA_MAC_VER_51:
-		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST | RX_EARLY_OFF);
+		RTL_W32(RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST | RX_EARLY_OFF);
 		break;
 	default:
 		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST);

drivers/net/ethernet/rocker/rocker.c+1−0

@@ -4927,6 +4927,7 @@ static void rocker_remove_ports(const struct rocker *rocker) · 4926 unmodified lines
4927	rocker_port_ig_tbl(rocker_port, SWITCHDEV_TRANS_NONE,	4927	rocker_port_ig_tbl(rocker_port, SWITCHDEV_TRANS_NONE,
4928	ROCKER_OP_FLAG_REMOVE);	4928	ROCKER_OP_FLAG_REMOVE);
4929	unregister_netdev(rocker_port->dev);	4929	unregister_netdev(rocker_port->dev);
		4930	free_netdev(rocker_port->dev);
4930	}	4931	}
4931	kfree(rocker->ports);	4932	kfree(rocker->ports);
4932	}	4933	}

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c+2−2

@@ -42,7 +42,7 @@ · 41 unmodified lines
42	#define NSS_COMMON_CLK_DIV_MASK 0x7f	42	#define NSS_COMMON_CLK_DIV_MASK 0x7f
43		43
44	#define NSS_COMMON_CLK_SRC_CTRL 0x14	44	#define NSS_COMMON_CLK_SRC_CTRL 0x14
45	#define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (1 << x)	45	#define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (x)
46	/* Mode is coded on 1 bit but is different depending on the MAC ID:	46	/* Mode is coded on 1 bit but is different depending on the MAC ID:
47	* MAC0: QSGMII=0 RGMII=1	47	* MAC0: QSGMII=0 RGMII=1
48	* MAC1: QSGMII=0 SGMII=0 RGMII=1	48	* MAC1: QSGMII=0 SGMII=0 RGMII=1
@@ -308,7 +308,7 @@ static int ipq806x_gmac_probe(struct platform_device *pdev) · 259 unmodified lines
308		308
309	/* Configure the clock src according to the mode */	309	/* Configure the clock src according to the mode */
310	regmap_read(gmac->nss_common, NSS_COMMON_CLK_SRC_CTRL, &val);	310	regmap_read(gmac->nss_common, NSS_COMMON_CLK_SRC_CTRL, &val);
311	val &= ~NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id);	311	val &= ~(1 << NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id));
312	switch (gmac->phy_mode) {	312	switch (gmac->phy_mode) {
313	case PHY_INTERFACE_MODE_RGMII:	313	case PHY_INTERFACE_MODE_RGMII:
314	val \|= NSS_COMMON_CLK_SRC_CTRL_RGMII(gmac->id) <<	314	val \|= NSS_COMMON_CLK_SRC_CTRL_RGMII(gmac->id) <<

drivers/net/ethernet/ti/netcp.h+0−1

@@ -85,7 +85,6 @@ struct netcp_intf { · 84 unmodified lines
85	struct list_head rxhook_list_head;	85	struct list_head rxhook_list_head;
86	unsigned int rx_queue_id;	86	unsigned int rx_queue_id;
87	void *rx_fdq[KNAV_DMA_FDQ_PER_CHAN];	87	void *rx_fdq[KNAV_DMA_FDQ_PER_CHAN];
88	u32 rx_buffer_sizes[KNAV_DMA_FDQ_PER_CHAN];
89	struct napi_struct rx_napi;	88	struct napi_struct rx_napi;
90	struct napi_struct tx_napi;	89	struct napi_struct tx_napi;
91		90

drivers/net/ethernet/ti/netcp_core.c+13−22

 #define NETCP_SOP_OFFSET	(NET_IP_ALIGN + NET_SKB_PAD)
 #define NETCP_NAPI_WEIGHT	64
 #define NETCP_TX_TIMEOUT	(5 * HZ)
+#define NETCP_PACKET_SIZE	(ETH_FRAME_LEN + ETH_FCS_LEN)
 #define NETCP_MIN_PACKET_SIZE	ETH_ZLEN
 #define NETCP_MAX_MCAST_ADDR	16
 	if (likely(fdq == 0)) {
 		unsigned int primary_buf_len;
 		/* Allocate a primary receive queue entry */
-		buf_len = netcp->rx_buffer_sizes[0] + NETCP_SOP_OFFSET;
+		buf_len = NETCP_PACKET_SIZE + NETCP_SOP_OFFSET;
 		primary_buf_len = SKB_DATA_ALIGN(buf_len) +
 				SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
-		if (primary_buf_len <= PAGE_SIZE) {
+		bufptr = netdev_alloc_frag(primary_buf_len);
-			bufptr = netdev_alloc_frag(primary_buf_len);
+		pad[1] = primary_buf_len;
-			pad[1] = primary_buf_len;
-		} else {
-			bufptr = kmalloc(primary_buf_len, GFP_ATOMIC |
-					 GFP_DMA32 | __GFP_COLD);
-			pad[1] = 0;
-		}
 		if (unlikely(!bufptr)) {
-			dev_warn_ratelimited(netcp->ndev_dev, "Primary RX buffer alloc failed\n");
+			dev_warn_ratelimited(netcp->ndev_dev,
+					     "Primary RX buffer alloc failed\n");
 			goto fail;
 		}
 		dma = dma_map_single(netcp->dev, bufptr, buf_len,
 				     DMA_TO_DEVICE);
+		if (unlikely(dma_mapping_error(netcp->dev, dma)))
+			goto fail;
 		pad[0] = (u32)bufptr;
 	} else {
 		/* Allocate a secondary receive queue entry */
-		page = alloc_page(GFP_ATOMIC | GFP_DMA32 | __GFP_COLD);
+		page = alloc_page(GFP_ATOMIC | GFP_DMA | __GFP_COLD);
 		if (unlikely(!page)) {
 			dev_warn_ratelimited(netcp->ndev_dev, "Secondary page alloc failed\n");
 			goto fail;
 	/* Map the linear buffer */
 	dma_addr = dma_map_single(dev, skb->data, pkt_len, DMA_TO_DEVICE);
-	if (unlikely(!dma_addr)) {
+	if (unlikely(dma_mapping_error(dev, dma_addr))) {
 		dev_err(netcp->ndev_dev, "Failed to map skb buffer\n");
 		return NULL;
 	}
 	knav_queue_disable_notify(netcp->rx_queue);
 	/* open Rx FDQs */
-	for (i = 0; i < KNAV_DMA_FDQ_PER_CHAN &&
+	for (i = 0; i < KNAV_DMA_FDQ_PER_CHAN && netcp->rx_queue_depths[i];
-	     netcp->rx_queue_depths[i] && netcp->rx_buffer_sizes[i]; ++i) {
+	     ++i) {
 		snprintf(name, sizeof(name), "rx-fdq-%s-%d", ndev->name, i);
 		netcp->rx_fdq[i] = knav_queue_open(name, KNAV_QUEUE_GP, 0);
 		if (IS_ERR_OR_NULL(netcp->rx_fdq[i])) {
 		netcp->rx_queue_depths[0] = 128;
 	}
-	ret = of_property_read_u32_array(node_interface, "rx-buffer-size",
-					 netcp->rx_buffer_sizes,
-					 KNAV_DMA_FDQ_PER_CHAN);
-	if (ret) {
-		dev_err(dev, "missing \"rx-buffer-size\" parameter\n");
-		netcp->rx_buffer_sizes[0] = 1536;
-	}
 	ret = of_property_read_u32_array(node_interface, "rx-pool", temp, 2);
 	if (ret < 0) {
 		dev_err(dev, "missing \"rx-pool\" parameter\n");

drivers/net/hamradio/mkiss.c+4−3

 	dev->type = ARPHRD_AX25;
 	/* Perform the low-level AX25 initialization. */
-	if ((err = ax_open(ax->dev))) {
+	err = ax_open(ax->dev);
+	if (err)
 		goto out_free_netdev;
-	}
-	if (register_netdev(dev))
+	err = register_netdev(dev);
+	if (err)
 		goto out_free_buffers;
 	/* after register_netdev() - because else printk smashes the kernel */

drivers/net/ntb_netdev.c+8−1

 	netdev_dbg(ndev, "%s: %d byte payload received\n", __func__, len);
+	if (len < 0) {
+		ndev->stats.rx_errors++;
+		ndev->stats.rx_length_errors++;
+		goto enqueue_again;
+	}
 	skb_put(skb, len);
 	skb->protocol = eth_type_trans(skb, ndev);
 	skb->ip_summed = CHECKSUM_NONE;
 		return;
 	}
+enqueue_again:
 	rc = ntb_transport_rx_enqueue(qp, skb, skb->data, ndev->mtu + ETH_HLEN);
 	if (rc) {
 		dev_kfree_skb(skb);
 		rc = ntb_transport_rx_enqueue(dev->qp, skb, skb->data,
 					      ndev->mtu + ETH_HLEN);
-		if (rc == -EINVAL) {
+		if (rc) {
 			dev_kfree_skb(skb);
 			goto err;
 		}

drivers/net/virtio_net.c+2−2

@@ -1756,9 +1756,9 @@ static int virtnet_probe(struct virtio_device *vdev) · 1755 unmodified lines
1756	/* Do we support "hardware" checksums? */	1756	/* Do we support "hardware" checksums? */
1757	if (virtio_has_feature(vdev, VIRTIO_NET_F_CSUM)) {	1757	if (virtio_has_feature(vdev, VIRTIO_NET_F_CSUM)) {
1758	/* This opens up the world of extra features. */	1758	/* This opens up the world of extra features. */
1759	dev->hw_features \|= NETIF_F_HW_CSUM\|NETIF_F_SG\|NETIF_F_FRAGLIST;	1759	dev->hw_features \|= NETIF_F_HW_CSUM \| NETIF_F_SG;
1760	if (csum)	1760	if (csum)
1761	dev->features \|= NETIF_F_HW_CSUM\|NETIF_F_SG\|NETIF_F_FRAGLIST;	1761	dev->features \|= NETIF_F_HW_CSUM \| NETIF_F_SG;
1762		1762
1763	if (virtio_has_feature(vdev, VIRTIO_NET_F_GSO)) {	1763	if (virtio_has_feature(vdev, VIRTIO_NET_F_GSO)) {
1764	dev->hw_features \|= NETIF_F_TSO \| NETIF_F_UFO	1764	dev->hw_features \|= NETIF_F_TSO \| NETIF_F_UFO

drivers/net/wan/cosa.c+2−1

 		chan->netdev->base_addr = chan->cosa->datareg;
 		chan->netdev->irq = chan->cosa->irq;
 		chan->netdev->dma = chan->cosa->dma;
-		if (register_hdlc_device(chan->netdev)) {
+		err = register_hdlc_device(chan->netdev);
+		if (err) {
 			netdev_warn(chan->netdev,
 				    "register_hdlc_device() failed\n");
 			free_netdev(chan->netdev);

drivers/net/wireless/b43/tables_nphy.c+1−1

@@ -3728,7 +3728,7 @@ const u32 b43_nphy_get_tx_gain_table(struct b43_wldev dev) · 3727 unmodified lines
3728	switch (phy->rev) {	3728	switch (phy->rev) {
3729	case 6:	3729	case 6:
3730	case 5:	3730	case 5:
3731	if (sprom->fem.ghz5.extpa_gain == 3)	3731	if (sprom->fem.ghz2.extpa_gain == 3)
3732	return b43_ntab_tx_gain_epa_rev3_hi_pwr_2g;	3732	return b43_ntab_tx_gain_epa_rev3_hi_pwr_2g;
3733	/* fall through */	3733	/* fall through */
3734	case 4:	3734	case 4:

drivers/net/wireless/iwlwifi/mvm/scan.c+1−1

@@ -1023,7 +1023,7 @@ static void iwl_mvm_scan_umac_dwell(struct iwl_mvm *mvm, · 1022 unmodified lines
1023	cmd->scan_priority =	1023	cmd->scan_priority =
1024	iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6);	1024	iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6);
1025		1025
1026	if (iwl_mvm_scan_total_iterations(params) == 0)	1026	if (iwl_mvm_scan_total_iterations(params) == 1)
1027	cmd->ooc_priority =	1027	cmd->ooc_priority =
1028	iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6);	1028	iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6);
1029	else	1029	else

drivers/net/wireless/iwlwifi/pcie/trans.c+19−3

 		if (trans->cfg->device_family == IWL_DEVICE_FAMILY_7000)
 			iwl_set_bits_prph(trans, APMG_PCIDEV_STT_REG,
 					  APMG_PCIDEV_STT_VAL_WAKE_ME);
-		else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
+		else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
+			iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+				    CSR_RESET_LINK_PWR_MGMT_DISABLED);
 			iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
 				    CSR_HW_IF_CONFIG_REG_PREPARE |
 				    CSR_HW_IF_CONFIG_REG_ENABLE_PME);
+			mdelay(1);
+			iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+				      CSR_RESET_LINK_PWR_MGMT_DISABLED);
+		}
 		mdelay(5);
 	}
 	if (ret >= 0)
 		return 0;
+	iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+		    CSR_RESET_LINK_PWR_MGMT_DISABLED);
+	msleep(1);
 	for (iter = 0; iter < 10; iter++) {
 		/* If HW is not ready, prepare the conditions to check again */
 		iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
 		do {
 			ret = iwl_pcie_set_hw_ready(trans);
-			if (ret >= 0)
+			if (ret >= 0) {
-				return 0;
+				ret = 0;
+				goto out;
+			}
 			usleep_range(200, 1000);
 			t += 200;
 	IWL_ERR(trans, "Couldn't prepare the card\n");
+out:
+	iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+		      CSR_RESET_LINK_PWR_MGMT_DISABLED);
 	return ret;
 }

drivers/net/wireless/iwlwifi/pcie/tx.c+13−2

@@ -1875,8 +1875,19 @@ int iwl_trans_pcie_tx(struct iwl_trans trans, struct sk_buff skb, · 1874 unmodified lines
1875		1875
1876	/* start timer if queue currently empty */	1876	/* start timer if queue currently empty */
1877	if (q->read_ptr == q->write_ptr) {	1877	if (q->read_ptr == q->write_ptr) {
1878	if (txq->wd_timeout)	1878	if (txq->wd_timeout) {
1879	mod_timer(&txq->stuck_timer, jiffies + txq->wd_timeout);	1879	/*
		1880	* If the TXQ is active, then set the timer, if not,
		1881	* set the timer in remainder so that the timer will
		1882	* be armed with the right value when the station will
		1883	* wake up.
		1884	*/
		1885	if (!txq->frozen)
		1886	mod_timer(&txq->stuck_timer,
		1887	jiffies + txq->wd_timeout);
		1888	else
		1889	txq->frozen_expiry_remainder = txq->wd_timeout;
		1890	}
1880	IWL_DEBUG_RPM(trans, "Q: %d first tx - take ref\n", q->id);	1891	IWL_DEBUG_RPM(trans, "Q: %d first tx - take ref\n", q->id);
1881	iwl_trans_pcie_ref(trans);	1892	iwl_trans_pcie_ref(trans);
1882	}	1893	}

drivers/net/wireless/rsi/rsi_91x_sdio_ops.c+7−1

 		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	u32 len;
 	u32 num_blocks;
+	const u8 *fw;
 	const struct firmware *fw_entry = NULL;
 	u32 block_size = dev->tx_blk_size;
 	int status = 0;
 		return status;
 	}
+	/* Copy firmware into DMA-accessible memory */
+	fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
+	if (!fw)
+		return -ENOMEM;
 	len = fw_entry->size;
 	if (len % 4)
 	rsi_dbg(INIT_ZONE, "%s: Instruction size:%d\n", __func__, len);
 	rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks);
-	status = rsi_copy_to_card(common, fw_entry->data, len, num_blocks);
+	status = rsi_copy_to_card(common, fw, len, num_blocks);
+	kfree(fw);
 	release_firmware(fw_entry);
 	return status;
 }

drivers/net/wireless/rsi/rsi_91x_usb_ops.c+4−0

 		return status;
 	}
+	/* Copy firmware into DMA-accessible memory */
 	fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
+	if (!fw)
+		return -ENOMEM;
 	len = fw_entry->size;
 	if (len % 4)
 	rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks);
 	status = rsi_copy_to_card(common, fw, len, num_blocks);
+	kfree(fw);
 	release_firmware(fw_entry);
 	return status;
 }

drivers/net/wireless/rtlwifi/core.c+5−2

 {
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
 	struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
+	struct rtl_tcb_desc tcb_desc;
-	if (skb)
+	if (skb) {
-		rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, NULL);
+		memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
+		rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
+	}
 }
 static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,

drivers/net/wireless/rtlwifi/rtl8723be/sw.c+1−0

@@ -385,6 +385,7 @@ module_param_named(debug, rtl8723be_mod_params.debug, int, 0444); · 384 unmodified lines
385	module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444);	385	module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444);
386	module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444);	386	module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444);
387	module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444);	387	module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444);
		388	module_param_named(msi, rtl8723be_mod_params.msi_support, bool, 0444);
388	module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog,	389	module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog,
389	bool, 0444);	390	bool, 0444);
390	MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");	391	MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");

drivers/net/xen-netback/interface.c+6−0

 void xenvif_skb_zerocopy_complete(struct xenvif_queue *queue)
 {
 	atomic_dec(&queue->inflight_packets);
+	/* Wake the dealloc thread _after_ decrementing inflight_packets so
+	 * that if kthread_stop() has already been called, the dealloc thread
+	 * does not wait forever with nothing to wake it.
+	 */
+	wake_up(&queue->dealloc_wq);
 }
 int xenvif_schedulable(struct xenvif *vif)

drivers/net/xen-netback/netback.c+33−29

 static struct gnttab_map_grant_ref *xenvif_get_requests(struct xenvif_queue *queue,
 							struct sk_buff *skb,
 							struct xen_netif_tx_request *txp,
-							struct gnttab_map_grant_ref *gop)
+							struct gnttab_map_grant_ref *gop,
+							unsigned int frag_overflow,
+							struct sk_buff *nskb)
 {
 	struct skb_shared_info *shinfo = skb_shinfo(skb);
 	skb_frag_t *frags = shinfo->frags;
 	u16 pending_idx = XENVIF_TX_CB(skb)->pending_idx;
 	int start;
 	pending_ring_idx_t index;
-	unsigned int nr_slots, frag_overflow = 0;
+	unsigned int nr_slots;
-	/* At this point shinfo->nr_frags is in fact the number of
-	 * slots, which can be as large as XEN_NETBK_LEGACY_SLOTS_MAX.
-	 */
-	if (shinfo->nr_frags > MAX_SKB_FRAGS) {
-		frag_overflow = shinfo->nr_frags - MAX_SKB_FRAGS;
-		BUG_ON(frag_overflow > MAX_SKB_FRAGS);
-		shinfo->nr_frags = MAX_SKB_FRAGS;
-	}
 	nr_slots = shinfo->nr_frags;
 	/* Skip first skb fragment if it is on same page as header fragment. */
 	}
 	if (frag_overflow) {
-		struct sk_buff *nskb = xenvif_alloc_skb(0);
-		if (unlikely(nskb == NULL)) {
-			if (net_ratelimit())
-				netdev_err(queue->vif->dev,
-					   "Can't allocate the frag_list skb.\n");
-			return NULL;
-		}
 		shinfo = skb_shinfo(nskb);
 		frags = shinfo->frags;
 				     unsigned *copy_ops,
 				     unsigned *map_ops)
 {
-	struct gnttab_map_grant_ref *gop = queue->tx_map_ops, *request_gop;
+	struct gnttab_map_grant_ref *gop = queue->tx_map_ops;
-	struct sk_buff *skb;
+	struct sk_buff *skb, *nskb;
 	int ret;
+	unsigned int frag_overflow;
 	while (skb_queue_len(&queue->tx_queue) < budget) {
 		struct xen_netif_tx_request txreq;
 			break;
 		}
+		skb_shinfo(skb)->nr_frags = ret;
+		if (data_len < txreq.size)
+			skb_shinfo(skb)->nr_frags++;
+		/* At this point shinfo->nr_frags is in fact the number of
+		 * slots, which can be as large as XEN_NETBK_LEGACY_SLOTS_MAX.
+		 */
+		frag_overflow = 0;
+		nskb = NULL;
+		if (skb_shinfo(skb)->nr_frags > MAX_SKB_FRAGS) {
+			frag_overflow = skb_shinfo(skb)->nr_frags - MAX_SKB_FRAGS;
+			BUG_ON(frag_overflow > MAX_SKB_FRAGS);
+			skb_shinfo(skb)->nr_frags = MAX_SKB_FRAGS;
+			nskb = xenvif_alloc_skb(0);
+			if (unlikely(nskb == NULL)) {
+				kfree_skb(skb);
+				xenvif_tx_err(queue, &txreq, idx);
+				if (net_ratelimit())
+					netdev_err(queue->vif->dev,
+						   "Can't allocate the frag_list skb.\n");
+				break;
+			}
+		}
 		if (extras[XEN_NETIF_EXTRA_TYPE_GSO - 1].type) {
 			struct xen_netif_extra_info *gso;
 			gso = &extras[XEN_NETIF_EXTRA_TYPE_GSO - 1];
 			if (xenvif_set_skb_gso(queue->vif, skb, gso)) {
 				/* Failure in xenvif_set_skb_gso is fatal. */
 				kfree_skb(skb);
+				kfree_skb(nskb);
 				break;
 			}
 		}
 		(*copy_ops)++;
-		skb_shinfo(skb)->nr_frags = ret;
 		if (data_len < txreq.size) {
-			skb_shinfo(skb)->nr_frags++;
 			frag_set_pending_idx(&skb_shinfo(skb)->frags[0],
 					     pending_idx);
 			xenvif_tx_create_map_op(queue, pending_idx, &txreq, gop);
 		queue->pending_cons++;
-		request_gop = xenvif_get_requests(queue, skb, txfrags, gop);
+		gop = xenvif_get_requests(queue, skb, txfrags, gop,
-		if (request_gop == NULL) {
+				          frag_overflow, nskb);
-			kfree_skb(skb);
-			xenvif_tx_err(queue, &txreq, idx);
-			break;
-		}
-		gop = request_gop;
 		__skb_queue_tail(&queue->tx_queue, skb);
 		smp_wmb();
 		queue->dealloc_prod++;
 	} while (ubuf);
-	wake_up(&queue->dealloc_wq);
 	spin_unlock_irqrestore(&queue->callback_lock, flags);
 	if (likely(zerocopy_success))

drivers/ntb/ntb.c+1−1

@@ -114,7 +114,7 @@ int ntb_register_device(struct ntb_dev *ntb) · 113 unmodified lines
114	ntb->dev.bus = &ntb_bus;	114	ntb->dev.bus = &ntb_bus;
115	ntb->dev.parent = &ntb->pdev->dev;	115	ntb->dev.parent = &ntb->pdev->dev;
116	ntb->dev.release = ntb_dev_release;	116	ntb->dev.release = ntb_dev_release;
117	dev_set_name(&ntb->dev, pci_name(ntb->pdev));	117	dev_set_name(&ntb->dev, "%s", pci_name(ntb->pdev));
118		118
119	ntb->ctx = NULL;	119	ntb->ctx = NULL;
120	ntb->ctx_ops = NULL;	120	ntb->ctx_ops = NULL;

drivers/ntb/ntb_transport.c+124−77

@@ -142,10 +142,11 @@ struct ntb_transport_qp { · 141 unmodified lines
142		142
143	void (rx_handler)(struct ntb_transport_qp qp, void *qp_data,	143	void (rx_handler)(struct ntb_transport_qp qp, void *qp_data,
144	void *data, int len);	144	void *data, int len);
		145	struct list_head rx_post_q;
145	struct list_head rx_pend_q;	146	struct list_head rx_pend_q;
146	struct list_head rx_free_q;	147	struct list_head rx_free_q;
147	spinlock_t ntb_rx_pend_q_lock;	148	/* ntb_rx_q_lock: synchronize access to rx_XXXX_q */
148	spinlock_t ntb_rx_free_q_lock;	149	spinlock_t ntb_rx_q_lock;
149	void *rx_buff;	150	void *rx_buff;
150	unsigned int rx_index;	151	unsigned int rx_index;
151	unsigned int rx_max_entry;	152	unsigned int rx_max_entry;
@@ -211,6 +212,8 @@ struct ntb_transport_ctx { · 59 unmodified lines
211	bool link_is_up;	212	bool link_is_up;
212	struct delayed_work link_work;	213	struct delayed_work link_work;
213	struct work_struct link_cleanup;	214	struct work_struct link_cleanup;
		215
		216	struct dentry *debugfs_node_dir;
214	};	217	};
215		218
216	enum {	219	enum {
@@ -436,13 +439,17 @@ static ssize_t debugfs_read(struct file filp, char __user ubuf, size_t count, · 219 unmodified lines
436	char *buf;	439	char *buf;
437	ssize_t ret, out_offset, out_count;	440	ssize_t ret, out_offset, out_count;
438		441
		442	qp = filp->private_data;
		443
		444	if (!qp \|\| !qp->link_is_up)
		445	return 0;
		446
439	out_count = 1000;	447	out_count = 1000;
440		448
441	buf = kmalloc(out_count, GFP_KERNEL);	449	buf = kmalloc(out_count, GFP_KERNEL);
442	if (!buf)	450	if (!buf)
443	return -ENOMEM;	451	return -ENOMEM;
444		452
445	qp = filp->private_data;
446	out_offset = 0;	453	out_offset = 0;
447	out_offset += snprintf(buf + out_offset, out_count - out_offset,	454	out_offset += snprintf(buf + out_offset, out_count - out_offset,
448	"NTB QP stats\n");	455	"NTB QP stats\n");
@@ -534,6 +541,27 @@ out: · 85 unmodified lines
534	return entry;	541	return entry;
535	}	542	}
536		543
		544	static struct ntb_queue_entry ntb_list_mv(spinlock_t lock,
		545	struct list_head *list,
		546	struct list_head *to_list)
		547	{
		548	struct ntb_queue_entry *entry;
		549	unsigned long flags;
		550
		551	spin_lock_irqsave(lock, flags);
		552
		553	if (list_empty(list)) {
		554	entry = NULL;
		555	} else {
		556	entry = list_first_entry(list, struct ntb_queue_entry, entry);
		557	list_move_tail(&entry->entry, to_list);
		558	}
		559
		560	spin_unlock_irqrestore(lock, flags);
		561
		562	return entry;
		563	}
		564
537	static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,	565	static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,
538	unsigned int qp_num)	566	unsigned int qp_num)
539	{	567	{
@@ -601,13 +629,16 @@ static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw) · 61 unmodified lines
601	}	629	}
602		630
603	static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,	631	static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,
604	unsigned int size)	632	resource_size_t size)
605	{	633	{
606	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];	634	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
607	struct pci_dev *pdev = nt->ndev->pdev;	635	struct pci_dev *pdev = nt->ndev->pdev;
608	unsigned int xlat_size, buff_size;	636	size_t xlat_size, buff_size;
609	int rc;	637	int rc;
610		638
		639	if (!size)
		640	return -EINVAL;
		641
611	xlat_size = round_up(size, mw->xlat_align_size);	642	xlat_size = round_up(size, mw->xlat_align_size);
612	buff_size = round_up(size, mw->xlat_align);	643	buff_size = round_up(size, mw->xlat_align);
613		644
@@ -627,7 +658,7 @@ static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw, · 13 unmodified lines
627	if (!mw->virt_addr) {	658	if (!mw->virt_addr) {
628	mw->xlat_size = 0;	659	mw->xlat_size = 0;
629	mw->buff_size = 0;	660	mw->buff_size = 0;
630	dev_err(&pdev->dev, "Unable to alloc MW buff of size %d\n",	661	dev_err(&pdev->dev, "Unable to alloc MW buff of size %zu\n",
631	buff_size);	662	buff_size);
632	return -ENOMEM;	663	return -ENOMEM;
633	}	664	}
@@ -867,6 +898,8 @@ static void ntb_qp_link_work(struct work_struct *work) · 233 unmodified lines
867		898
868	if (qp->event_handler)	899	if (qp->event_handler)
869	qp->event_handler(qp->cb_data, qp->link_is_up);	900	qp->event_handler(qp->cb_data, qp->link_is_up);
		901
		902	tasklet_schedule(&qp->rxc_db_work);
870	} else if (nt->link_is_up)	903	} else if (nt->link_is_up)
871	schedule_delayed_work(&qp->link_work,	904	schedule_delayed_work(&qp->link_work,
872	msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));	905	msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
@@ -923,12 +956,12 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt, · 50 unmodified lines
923	qp->tx_max_frame = min(transport_mtu, tx_size / 2);	956	qp->tx_max_frame = min(transport_mtu, tx_size / 2);
924	qp->tx_max_entry = tx_size / qp->tx_max_frame;	957	qp->tx_max_entry = tx_size / qp->tx_max_frame;
925		958
926	if (nt_debugfs_dir) {	959	if (nt->debugfs_node_dir) {
927	char debugfs_name[4];	960	char debugfs_name[4];
928		961
929	snprintf(debugfs_name, 4, "qp%d", qp_num);	962	snprintf(debugfs_name, 4, "qp%d", qp_num);
930	qp->debugfs_dir = debugfs_create_dir(debugfs_name,	963	qp->debugfs_dir = debugfs_create_dir(debugfs_name,
931	nt_debugfs_dir);	964	nt->debugfs_node_dir);
932		965
933	qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,	966	qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,
934	qp->debugfs_dir, qp,	967	qp->debugfs_dir, qp,
@@ -941,10 +974,10 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt, · 6 unmodified lines
941	INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);	974	INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);
942	INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);	975	INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);
943		976
944	spin_lock_init(&qp->ntb_rx_pend_q_lock);	977	spin_lock_init(&qp->ntb_rx_q_lock);
945	spin_lock_init(&qp->ntb_rx_free_q_lock);
946	spin_lock_init(&qp->ntb_tx_free_q_lock);	978	spin_lock_init(&qp->ntb_tx_free_q_lock);
947		979
		980	INIT_LIST_HEAD(&qp->rx_post_q);
948	INIT_LIST_HEAD(&qp->rx_pend_q);	981	INIT_LIST_HEAD(&qp->rx_pend_q);
949	INIT_LIST_HEAD(&qp->rx_free_q);	982	INIT_LIST_HEAD(&qp->rx_free_q);
950	INIT_LIST_HEAD(&qp->tx_free_q);	983	INIT_LIST_HEAD(&qp->tx_free_q);
@@ -1031,6 +1064,12 @@ static int ntb_transport_probe(struct ntb_client self, struct ntb_dev ndev) · 80 unmodified lines
1031	goto err2;	1064	goto err2;
1032	}	1065	}
1033		1066
		1067	if (nt_debugfs_dir) {
		1068	nt->debugfs_node_dir =
		1069	debugfs_create_dir(pci_name(ndev->pdev),
		1070	nt_debugfs_dir);
		1071	}
		1072
1034	for (i = 0; i < qp_count; i++) {	1073	for (i = 0; i < qp_count; i++) {
1035	rc = ntb_transport_init_queue(nt, i);	1074	rc = ntb_transport_init_queue(nt, i);
1036	if (rc)	1075	if (rc)
@@ -1107,22 +1146,47 @@ static void ntb_transport_free(struct ntb_client self, struct ntb_dev ndev) · 70 unmodified lines
1107	kfree(nt);	1146	kfree(nt);
1108	}	1147	}
1109		1148
1110	static void ntb_rx_copy_callback(void *data)	1149	static void ntb_complete_rxc(struct ntb_transport_qp *qp)
1111	{	1150	{
1112	struct ntb_queue_entry *entry = data;	1151	struct ntb_queue_entry *entry;
1113	struct ntb_transport_qp *qp = entry->qp;	1152	void *cb_data;
1114	void *cb_data = entry->cb_data;	1153	unsigned int len;
1115	unsigned int len = entry->len;	1154	unsigned long irqflags;
1116	struct ntb_payload_header *hdr = entry->rx_hdr;	1155
		1156	spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
		1157
		1158	while (!list_empty(&qp->rx_post_q)) {
		1159	entry = list_first_entry(&qp->rx_post_q,
		1160	struct ntb_queue_entry, entry);
		1161	if (!(entry->flags & DESC_DONE_FLAG))
		1162	break;
		1163
		1164	entry->rx_hdr->flags = 0;
		1165	iowrite32(entry->index, &qp->rx_info->entry);
1117		1166
1118	hdr->flags = 0;	1167	cb_data = entry->cb_data;
		1168	len = entry->len;
1119		1169
1120	iowrite32(entry->index, &qp->rx_info->entry);	1170	list_move_tail(&entry->entry, &qp->rx_free_q);
1121		1171
1122	ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry, &qp->rx_free_q);	1172	spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
1123		1173
1124	if (qp->rx_handler && qp->client_ready)	1174	if (qp->rx_handler && qp->client_ready)
1125	qp->rx_handler(qp, qp->cb_data, cb_data, len);	1175	qp->rx_handler(qp, qp->cb_data, cb_data, len);
		1176
		1177	spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
		1178	}
		1179
		1180	spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
		1181	}
		1182
		1183	static void ntb_rx_copy_callback(void *data)
		1184	{
		1185	struct ntb_queue_entry *entry = data;
		1186
		1187	entry->flags \|= DESC_DONE_FLAG;
		1188
		1189	ntb_complete_rxc(entry->qp);
1126	}	1190	}
1127		1191
1128	static void ntb_memcpy_rx(struct ntb_queue_entry entry, void offset)	1192	static void ntb_memcpy_rx(struct ntb_queue_entry entry, void offset)
@@ -1138,19 +1202,18 @@ static void ntb_memcpy_rx(struct ntb_queue_entry entry, void offset) · 9 unmodified lines
1138	ntb_rx_copy_callback(entry);	1202	ntb_rx_copy_callback(entry);
1139	}	1203	}
1140		1204
1141	static void ntb_async_rx(struct ntb_queue_entry entry, void offset,	1205	static void ntb_async_rx(struct ntb_queue_entry entry, void offset)
1142	size_t len)
1143	{	1206	{
1144	struct dma_async_tx_descriptor *txd;	1207	struct dma_async_tx_descriptor *txd;
1145	struct ntb_transport_qp *qp = entry->qp;	1208	struct ntb_transport_qp *qp = entry->qp;
1146	struct dma_chan *chan = qp->dma_chan;	1209	struct dma_chan *chan = qp->dma_chan;
1147	struct dma_device *device;	1210	struct dma_device *device;
1148	size_t pay_off, buff_off;	1211	size_t pay_off, buff_off, len;
1149	struct dmaengine_unmap_data *unmap;	1212	struct dmaengine_unmap_data *unmap;
1150	dma_cookie_t cookie;	1213	dma_cookie_t cookie;
1151	void *buf = entry->buf;	1214	void *buf = entry->buf;
1152		1215
1153	entry->len = len;	1216	len = entry->len;
1154		1217
1155	if (!chan)	1218	if (!chan)
1156	goto err;	1219	goto err;
@@ -1226,7 +1289,6 @@ static int ntb_process_rxc(struct ntb_transport_qp *qp) · 69 unmodified lines
1226	struct ntb_payload_header *hdr;	1289	struct ntb_payload_header *hdr;
1227	struct ntb_queue_entry *entry;	1290	struct ntb_queue_entry *entry;
1228	void *offset;	1291	void *offset;
1229	int rc;
1230		1292
1231	offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;	1293	offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;
1232	hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);	1294	hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);
@@ -1255,65 +1317,43 @@ static int ntb_process_rxc(struct ntb_transport_qp *qp) · 22 unmodified lines
1255	return -EIO;	1317	return -EIO;
1256	}	1318	}
1257		1319
1258	entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q);	1320	entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q);
1259	if (!entry) {	1321	if (!entry) {
1260	dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");	1322	dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");
1261	qp->rx_err_no_buf++;	1323	qp->rx_err_no_buf++;
1262		1324	return -EAGAIN;
1263	rc = -ENOMEM;
1264	goto err;
1265	}	1325	}
1266		1326
		1327	entry->rx_hdr = hdr;
		1328	entry->index = qp->rx_index;
		1329
1267	if (hdr->len > entry->len) {	1330	if (hdr->len > entry->len) {
1268	dev_dbg(&qp->ndev->pdev->dev,	1331	dev_dbg(&qp->ndev->pdev->dev,
1269	"receive buffer overflow! Wanted %d got %d\n",	1332	"receive buffer overflow! Wanted %d got %d\n",
1270	hdr->len, entry->len);	1333	hdr->len, entry->len);
1271	qp->rx_err_oflow++;	1334	qp->rx_err_oflow++;
1272		1335
1273	rc = -EIO;	1336	entry->len = -EIO;
1274	goto err;	1337	entry->flags \|= DESC_DONE_FLAG;
1275	}
1276		1338
1277	dev_dbg(&qp->ndev->pdev->dev,	1339	ntb_complete_rxc(qp);
1278	"RX OK index %u ver %u size %d into buf size %d\n",	1340	} else {
1279	qp->rx_index, hdr->ver, hdr->len, entry->len);	1341	dev_dbg(&qp->ndev->pdev->dev,
		1342	"RX OK index %u ver %u size %d into buf size %d\n",
		1343	qp->rx_index, hdr->ver, hdr->len, entry->len);
1280		1344
1281	qp->rx_bytes += hdr->len;	1345	qp->rx_bytes += hdr->len;
1282	qp->rx_pkts++;	1346	qp->rx_pkts++;
1283		1347
1284	entry->index = qp->rx_index;	1348	entry->len = hdr->len;
1285	entry->rx_hdr = hdr;
1286		1349
1287	ntb_async_rx(entry, offset, hdr->len);	1350	ntb_async_rx(entry, offset);
		1351	}
1288		1352
1289	qp->rx_index++;	1353	qp->rx_index++;
1290	qp->rx_index %= qp->rx_max_entry;	1354	qp->rx_index %= qp->rx_max_entry;
1291		1355
1292	return 0;	1356	return 0;
1293
1294	err:
1295	/* FIXME: if this syncrhonous update of the rx_index gets ahead of
1296	* asyncrhonous ntb_rx_copy_callback of previous entry, there are three
1297	* scenarios:
1298	*
1299	* 1) The peer might miss this update, but observe the update
1300	* from the memcpy completion callback. In this case, the buffer will
1301	* not be freed on the peer to be reused for a different packet. The
1302	* successful rx of a later packet would clear the condition, but the
1303	* condition could persist if several rx fail in a row.
1304	*
1305	* 2) The peer may observe this update before the asyncrhonous copy of
1306	* prior packets is completed. The peer may overwrite the buffers of
1307	* the prior packets before they are copied.
1308	*
1309	* 3) Both: the peer may observe the update, and then observe the index
1310	* decrement by the asynchronous completion callback. Who knows what
1311	* badness that will cause.
1312	*/
1313	hdr->flags = 0;
1314	iowrite32(qp->rx_index, &qp->rx_info->entry);
1315
1316	return rc;
1317	}	1357	}
1318		1358
1319	static void ntb_transport_rxc_db(unsigned long data)	1359	static void ntb_transport_rxc_db(unsigned long data)
@@ -1333,7 +1373,7 @@ static void ntb_transport_rxc_db(unsigned long data) · 13 unmodified lines
1333	break;	1373	break;
1334	}	1374	}
1335		1375
1336	if (qp->dma_chan)	1376	if (i && qp->dma_chan)
1337	dma_async_issue_pending(qp->dma_chan);	1377	dma_async_issue_pending(qp->dma_chan);
1338		1378
1339	if (i == qp->rx_max_entry) {	1379	if (i == qp->rx_max_entry) {
@@ -1609,7 +1649,7 @@ ntb_transport_create_queue(void data, struct device client_dev, · 269 unmodified lines
1609	goto err1;	1649	goto err1;
1610		1650
1611	entry->qp = qp;	1651	entry->qp = qp;
1612	ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry,	1652	ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
1613	&qp->rx_free_q);	1653	&qp->rx_free_q);
1614	}	1654	}
1615		1655
@@ -1634,7 +1674,7 @@ err2: · 18 unmodified lines
1634	while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))	1674	while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
1635	kfree(entry);	1675	kfree(entry);
1636	err1:	1676	err1:
1637	while ((entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q)))	1677	while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
1638	kfree(entry);	1678	kfree(entry);
1639	if (qp->dma_chan)	1679	if (qp->dma_chan)
1640	dma_release_channel(qp->dma_chan);	1680	dma_release_channel(qp->dma_chan);
@@ -1652,7 +1692,6 @@ EXPORT_SYMBOL_GPL(ntb_transport_create_queue); · 11 unmodified lines
1652	*/	1692	*/
1653	void ntb_transport_free_queue(struct ntb_transport_qp *qp)	1693	void ntb_transport_free_queue(struct ntb_transport_qp *qp)
1654	{	1694	{
1655	struct ntb_transport_ctx *nt = qp->transport;
1656	struct pci_dev *pdev;	1695	struct pci_dev *pdev;
1657	struct ntb_queue_entry *entry;	1696	struct ntb_queue_entry *entry;
1658	u64 qp_bit;	1697	u64 qp_bit;
@@ -1689,18 +1728,23 @@ void ntb_transport_free_queue(struct ntb_transport_qp *qp) · 30 unmodified lines
1689	qp->tx_handler = NULL;	1728	qp->tx_handler = NULL;
1690	qp->event_handler = NULL;	1729	qp->event_handler = NULL;
1691		1730
1692	while ((entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q)))	1731	while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
1693	kfree(entry);	1732	kfree(entry);
1694		1733
1695	while ((entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q))) {	1734	while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) {
1696	dev_warn(&pdev->dev, "Freeing item from a non-empty queue\n");	1735	dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n");
		1736	kfree(entry);
		1737	}
		1738
		1739	while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) {
		1740	dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n");
1697	kfree(entry);	1741	kfree(entry);
1698	}	1742	}
1699		1743
1700	while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))	1744	while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
1701	kfree(entry);	1745	kfree(entry);
1702		1746
1703	nt->qp_bitmap_free \|= qp_bit;	1747	qp->transport->qp_bitmap_free \|= qp_bit;
1704		1748
1705	dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);	1749	dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);
1706	}	1750	}
@@ -1724,14 +1768,14 @@ void ntb_transport_rx_remove(struct ntb_transport_qp qp, unsigned int *len) · 17 unmodified lines
1724	if (!qp \|\| qp->client_ready)	1768	if (!qp \|\| qp->client_ready)
1725	return NULL;	1769	return NULL;
1726		1770
1727	entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q);	1771	entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q);
1728	if (!entry)	1772	if (!entry)
1729	return NULL;	1773	return NULL;
1730		1774
1731	buf = entry->cb_data;	1775	buf = entry->cb_data;
1732	*len = entry->len;	1776	*len = entry->len;
1733		1777
1734	ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry, &qp->rx_free_q);	1778	ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q);
1735		1779
1736	return buf;	1780	return buf;
1737	}	1781	}
@@ -1757,15 +1801,18 @@ int ntb_transport_rx_enqueue(struct ntb_transport_qp qp, void cb, void *data, · 19 unmodified lines
1757	if (!qp)	1801	if (!qp)
1758	return -EINVAL;	1802	return -EINVAL;
1759		1803
1760	entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q);	1804	entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q);
1761	if (!entry)	1805	if (!entry)
1762	return -ENOMEM;	1806	return -ENOMEM;
1763		1807
1764	entry->cb_data = cb;	1808	entry->cb_data = cb;
1765	entry->buf = data;	1809	entry->buf = data;
1766	entry->len = len;	1810	entry->len = len;
		1811	entry->flags = 0;
		1812
		1813	ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q);
1767		1814
1768	ntb_list_add(&qp->ntb_rx_pend_q_lock, &entry->entry, &qp->rx_pend_q);	1815	tasklet_schedule(&qp->rxc_db_work);
1769		1816
1770	return 0;	1817	return 0;
1771	}	1818	}

drivers/phy/phy-sun4i-usb.c+1−0

@@ -212,6 +212,7 @@ void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled) · 211 unmodified lines
212		212
213	sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);	213	sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
214	}	214	}
		215	EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
215		216
216	static struct phy_ops sun4i_usb_phy_ops = {	217	static struct phy_ops sun4i_usb_phy_ops = {
217	.init = sun4i_usb_phy_init,	218	.init = sun4i_usb_phy_init,

drivers/phy/phy-ti-pipe3.c+55−6

@@ -28,6 +28,8 @@ · 27 unmodified lines
28	#include <linux/delay.h>	28	#include <linux/delay.h>
29	#include <linux/phy/omap_control_phy.h>	29	#include <linux/phy/omap_control_phy.h>
30	#include <linux/of_platform.h>	30	#include <linux/of_platform.h>
		31	#include <linux/mfd/syscon.h>
		32	#include <linux/regmap.h>
31		33
32	#define PLL_STATUS 0x00000004	34	#define PLL_STATUS 0x00000004
33	#define PLL_GO 0x00000008	35	#define PLL_GO 0x00000008
@@ -52,6 +54,8 @@ · 18 unmodified lines
52	#define PLL_LOCK 0x2	54	#define PLL_LOCK 0x2
53	#define PLL_IDLE 0x1	55	#define PLL_IDLE 0x1
54		56
		57	#define SATA_PLL_SOFT_RESET BIT(18)
		58
55	/*	59	/*
56	* This is an Empirical value that works, need to confirm the actual	60	* This is an Empirical value that works, need to confirm the actual
57	* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status	61	* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -82,6 +86,9 @@ struct ti_pipe3 { · 24 unmodified lines
82	struct clk *refclk;	86	struct clk *refclk;
83	struct clk *div_clk;	87	struct clk *div_clk;
84	struct pipe3_dpll_map *dpll_map;	88	struct pipe3_dpll_map *dpll_map;
		89	struct regmap dpll_reset_syscon; / ctrl. reg. acces */
		90	unsigned int dpll_reset_reg; /* reg. index within syscon */
		91	bool sata_refclk_enabled;
85	};	92	};
86		93
87	static struct pipe3_dpll_map dpll_map_usb[] = {	94	static struct pipe3_dpll_map dpll_map_usb[] = {
@@ -249,8 +256,11 @@ static int ti_pipe3_exit(struct phy *x) · 161 unmodified lines
249	u32 val;	256	u32 val;
250	unsigned long timeout;	257	unsigned long timeout;
251		258
252	/* SATA DPLL can't be powered down due to Errata i783 */	259	/* If dpll_reset_syscon is not present we wont power down SATA DPLL
253	if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata"))	260	* due to Errata i783
		261	*/
		262	if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata") &&
		263	!phy->dpll_reset_syscon)
254	return 0;	264	return 0;
255		265
256	/* PCIe doesn't have internal DPLL */	266	/* PCIe doesn't have internal DPLL */
@@ -276,6 +286,14 @@ static int ti_pipe3_exit(struct phy *x) · 19 unmodified lines
276	}	286	}
277	}	287	}
278		288
		289	/* i783: SATA needs control bit toggle after PLL unlock */
		290	if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata")) {
		291	regmap_update_bits(phy->dpll_reset_syscon, phy->dpll_reset_reg,
		292	SATA_PLL_SOFT_RESET, SATA_PLL_SOFT_RESET);
		293	regmap_update_bits(phy->dpll_reset_syscon, phy->dpll_reset_reg,
		294	SATA_PLL_SOFT_RESET, 0);
		295	}
		296
279	ti_pipe3_disable_clocks(phy);	297	ti_pipe3_disable_clocks(phy);
280		298
281	return 0;	299	return 0;
@@ -350,6 +368,21 @@ static int ti_pipe3_probe(struct platform_device *pdev) · 68 unmodified lines
350	}	368	}
351	} else {	369	} else {
352	phy->wkupclk = ERR_PTR(-ENODEV);	370	phy->wkupclk = ERR_PTR(-ENODEV);
		371	phy->dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,
		372	"syscon-pllreset");
		373	if (IS_ERR(phy->dpll_reset_syscon)) {
		374	dev_info(&pdev->dev,
		375	"can't get syscon-pllreset, sata dpll won't idle\n");
		376	phy->dpll_reset_syscon = NULL;
		377	} else {
		378	if (of_property_read_u32_index(node,
		379	"syscon-pllreset", 1,
		380	&phy->dpll_reset_reg)) {
		381	dev_err(&pdev->dev,
		382	"couldn't get pllreset reg. offset\n");
		383	return -EINVAL;
		384	}
		385	}
353	}	386	}
354		387
355	if (of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {	388	if (of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
@@ -402,10 +435,16 @@ static int ti_pipe3_probe(struct platform_device *pdev) · 46 unmodified lines
402		435
403	platform_set_drvdata(pdev, phy);	436	platform_set_drvdata(pdev, phy);
404	pm_runtime_enable(phy->dev);	437	pm_runtime_enable(phy->dev);
405	/* Prevent auto-disable of refclk for SATA PHY due to Errata i783 */	438
406	if (of_device_is_compatible(node, "ti,phy-pipe3-sata"))	439	/*
407	if (!IS_ERR(phy->refclk))	440	* Prevent auto-disable of refclk for SATA PHY due to Errata i783
		441	*/
		442	if (of_device_is_compatible(node, "ti,phy-pipe3-sata")) {
		443	if (!IS_ERR(phy->refclk)) {
408	clk_prepare_enable(phy->refclk);	444	clk_prepare_enable(phy->refclk);
		445	phy->sata_refclk_enabled = true;
		446	}
		447	}
409		448
410	generic_phy = devm_phy_create(phy->dev, NULL, &ops);	449	generic_phy = devm_phy_create(phy->dev, NULL, &ops);
411	if (IS_ERR(generic_phy))	450	if (IS_ERR(generic_phy))
@@ -472,8 +511,18 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy) · 60 unmodified lines
472	{	511	{
473	if (!IS_ERR(phy->wkupclk))	512	if (!IS_ERR(phy->wkupclk))
474	clk_disable_unprepare(phy->wkupclk);	513	clk_disable_unprepare(phy->wkupclk);
475	if (!IS_ERR(phy->refclk))	514	if (!IS_ERR(phy->refclk)) {
476	clk_disable_unprepare(phy->refclk);	515	clk_disable_unprepare(phy->refclk);
		516	/*
		517	* SATA refclk needs an additional disable as we left it
		518	* on in probe to avoid Errata i783
		519	*/
		520	if (phy->sata_refclk_enabled) {
		521	clk_disable_unprepare(phy->refclk);
		522	phy->sata_refclk_enabled = false;
		523	}
		524	}
		525
477	if (!IS_ERR(phy->div_clk))	526	if (!IS_ERR(phy->div_clk))
478	clk_disable_unprepare(phy->div_clk);	527	clk_disable_unprepare(phy->div_clk);
479	}	528	}

drivers/platform/chrome/Kconfig+0−1

@@ -4,7 +4,6 @@ · 3 unmodified lines
4		4
5	menuconfig CHROME_PLATFORMS	5	menuconfig CHROME_PLATFORMS
6	bool "Platform support for Chrome hardware"	6	bool "Platform support for Chrome hardware"
7	depends on X86 \|\| ARM
8	---help---	7	---help---
9	Say Y here to get to see options for platform support for	8	Say Y here to get to see options for platform support for
10	various Chromebooks and Chromeboxes. This option alone does	9	various Chromebooks and Chromeboxes. This option alone does

drivers/scsi/ipr.c+18−10

 {
 	struct ipr_trace_entry *trace_entry;
 	struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
+	unsigned int trace_index;
-	trace_entry = &ioa_cfg->trace[atomic_add_return
+	trace_index = atomic_add_return(1, &ioa_cfg->trace_index) & IPR_TRACE_INDEX_MASK;
-			(1, &ioa_cfg->trace_index)%IPR_NUM_TRACE_ENTRIES];
+	trace_entry = &ioa_cfg->trace[trace_index];
 	trace_entry->time = jiffies;
 	trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
 	trace_entry->type = type;
 static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
 {
+	unsigned int hrrq;
 	if (ioa_cfg->hrrq_num == 1)
-		return 0;
+		hrrq = 0;
-	else
+	else {
-		return (atomic_add_return(1, &ioa_cfg->hrrq_index) % (ioa_cfg->hrrq_num - 1)) + 1;
+		hrrq = atomic_add_return(1, &ioa_cfg->hrrq_index);
+		hrrq = (hrrq % (ioa_cfg->hrrq_num - 1)) + 1;
+	}
+	return hrrq;
 }
 /**
 	struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
 	struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
 	u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
-	unsigned long hrrq_flags;
+	unsigned long lock_flags;
 	scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
 	if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
 		scsi_dma_unmap(scsi_cmd);
-		spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
+		spin_lock_irqsave(ipr_cmd->hrrq->lock, lock_flags);
 		list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
 		scsi_cmd->scsi_done(scsi_cmd);
-		spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
+		spin_unlock_irqrestore(ipr_cmd->hrrq->lock, lock_flags);
 	} else {
-		spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
+		spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
+		spin_lock(&ipr_cmd->hrrq->_lock);
 		ipr_erp_start(ioa_cfg, ipr_cmd);
-		spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
+		spin_unlock(&ipr_cmd->hrrq->_lock);
+		spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
 	}
 }

drivers/scsi/ipr.h+1−0

@@ -1486,6 +1486,7 @@ struct ipr_ioa_cfg { · 1485 unmodified lines
1486		1486
1487	#define IPR_NUM_TRACE_INDEX_BITS 8	1487	#define IPR_NUM_TRACE_INDEX_BITS 8
1488	#define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)	1488	#define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
		1489	#define IPR_TRACE_INDEX_MASK (IPR_NUM_TRACE_ENTRIES - 1)
1489	#define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)	1490	#define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
1490	char trace_start[8];	1491	char trace_start[8];
1491	#define IPR_TRACE_START_LABEL "trace"	1492	#define IPR_TRACE_START_LABEL "trace"

drivers/scsi/scsi_error.c+1−1

@@ -944,7 +944,7 @@ void scsi_eh_prep_cmnd(struct scsi_cmnd scmd, struct scsi_eh_save ses, · 943 unmodified lines
944	scmd->sdb.length);	944	scmd->sdb.length);
945	scmd->sdb.table.sgl = &ses->sense_sgl;	945	scmd->sdb.table.sgl = &ses->sense_sgl;
946	scmd->sc_data_direction = DMA_FROM_DEVICE;	946	scmd->sc_data_direction = DMA_FROM_DEVICE;
947	scmd->sdb.table.nents = 1;	947	scmd->sdb.table.nents = scmd->sdb.table.orig_nents = 1;
948	scmd->cmnd[0] = REQUEST_SENSE;	948	scmd->cmnd[0] = REQUEST_SENSE;
949	scmd->cmnd[4] = scmd->sdb.length;	949	scmd->cmnd[4] = scmd->sdb.length;
950	scmd->cmd_len = COMMAND_SIZE(scmd->cmnd[0]);	950	scmd->cmd_len = COMMAND_SIZE(scmd->cmnd[0]);

drivers/scsi/scsi_lib.c+3−3

@@ -583,7 +583,7 @@ static struct scatterlist *scsi_sg_alloc(unsigned int nents, gfp_t gfp_mask) · 582 unmodified lines
583		583
584	static void scsi_free_sgtable(struct scsi_data_buffer *sdb, bool mq)	584	static void scsi_free_sgtable(struct scsi_data_buffer *sdb, bool mq)
585	{	585	{
586	if (mq && sdb->table.nents <= SCSI_MAX_SG_SEGMENTS)	586	if (mq && sdb->table.orig_nents <= SCSI_MAX_SG_SEGMENTS)
587	return;	587	return;
588	__sg_free_table(&sdb->table, SCSI_MAX_SG_SEGMENTS, mq, scsi_sg_free);	588	__sg_free_table(&sdb->table, SCSI_MAX_SG_SEGMENTS, mq, scsi_sg_free);
589	}	589	}
@@ -597,8 +597,8 @@ static int scsi_alloc_sgtable(struct scsi_data_buffer *sdb, int nents, bool mq) · 7 unmodified lines
597		597
598	if (mq) {	598	if (mq) {
599	if (nents <= SCSI_MAX_SG_SEGMENTS) {	599	if (nents <= SCSI_MAX_SG_SEGMENTS) {
600	sdb->table.nents = nents;	600	sdb->table.nents = sdb->table.orig_nents = nents;
601	sg_init_table(sdb->table.sgl, sdb->table.nents);	601	sg_init_table(sdb->table.sgl, nents);
602	return 0;	602	return 0;
603	}	603	}
604	first_chunk = sdb->table.sgl;	604	first_chunk = sdb->table.sgl;

drivers/staging/comedi/drivers/das1800.c+1−0

@@ -1266,6 +1266,7 @@ static const struct das1800_board das1800_probe(struct comedi_device dev) · 1265 unmodified lines
1266	if (index == das1801hc \|\| index == das1802hc)	1266	if (index == das1801hc \|\| index == das1802hc)
1267	return board;	1267	return board;
1268	index = das1801hc;	1268	index = das1801hc;
		1269	break;
1269	default:	1270	default:
1270	dev_err(dev->class_dev,	1271	dev_err(dev->class_dev,
1271	"Board model: probe returned 0x%x (unknown, please report)\n",	1272	"Board model: probe returned 0x%x (unknown, please report)\n",

drivers/staging/lustre/lustre/obdclass/debug.c+1−1

@@ -40,7 +40,7 @@ · 39 unmodified lines
40		40
41	#define DEBUG_SUBSYSTEM D_OTHER	41	#define DEBUG_SUBSYSTEM D_OTHER
42		42
43	#include <linux/unaligned/access_ok.h>	43	#include <asm/unaligned.h>
44		44
45	#include "../include/obd_support.h"	45	#include "../include/obd_support.h"
46	#include "../include/lustre_debug.h"	46	#include "../include/lustre_debug.h"

drivers/staging/vt6655/device_main.c+3−2

@@ -1483,8 +1483,9 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw, · 1482 unmodified lines
1483	}	1483	}
1484	}	1484	}
1485		1485
1486	if (changed & BSS_CHANGED_ASSOC && priv->op_mode != NL80211_IFTYPE_AP) {	1486	if (changed & (BSS_CHANGED_ASSOC \| BSS_CHANGED_BEACON_INFO) &&
1487	if (conf->assoc) {	1487	priv->op_mode != NL80211_IFTYPE_AP) {
		1488	if (conf->assoc && conf->beacon_rate) {
1488	CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,	1489	CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1489	conf->sync_tsf);	1490	conf->sync_tsf);
1490		1491

drivers/thermal/hisi_thermal.c+0−1

@@ -405,7 +405,6 @@ static SIMPLE_DEV_PM_OPS(hisi_thermal_pm_ops, · 404 unmodified lines
405	static struct platform_driver hisi_thermal_driver = {	405	static struct platform_driver hisi_thermal_driver = {
406	.driver = {	406	.driver = {
407	.name = "hisi_thermal",	407	.name = "hisi_thermal",
408	.owner = THIS_MODULE,
409	.pm = &hisi_thermal_pm_ops,	408	.pm = &hisi_thermal_pm_ops,
410	.of_match_table = of_hisi_thermal_match,	409	.of_match_table = of_hisi_thermal_match,
411	},	410	},

drivers/thermal/power_allocator.c+16−10

 	struct thermal_instance *instance;
 	struct power_allocator_params *params = tz->governor_data;
 	u32 *req_power, *max_power, *granted_power, *extra_actor_power;
-	u32 total_req_power, max_allocatable_power;
+	u32 *weighted_req_power;
+	u32 total_req_power, max_allocatable_power, total_weighted_req_power;
 	u32 total_granted_power, power_range;
 	int i, num_actors, total_weight, ret = 0;
 	int trip_max_desired_temperature = params->trip_max_desired_temperature;
 	}
 	/*
-	 * We need to allocate three arrays of the same size:
+	 * We need to allocate five arrays of the same size:
-	 * req_power, max_power and granted_power.  They are going to
+	 * req_power, max_power, granted_power, extra_actor_power and
-	 * be needed until this function returns.  Allocate them all
+	 * weighted_req_power.  They are going to be needed until this
-	 * in one go to simplify the allocation and deallocation
+	 * function returns.  Allocate them all in one go to simplify
-	 * logic.
+	 * the allocation and deallocation logic.
 	 */
 	BUILD_BUG_ON(sizeof(*req_power) != sizeof(*max_power));
 	BUILD_BUG_ON(sizeof(*req_power) != sizeof(*granted_power));
 	BUILD_BUG_ON(sizeof(*req_power) != sizeof(*extra_actor_power));
-	req_power = devm_kcalloc(&tz->device, num_actors * 4,
+	BUILD_BUG_ON(sizeof(*req_power) != sizeof(*weighted_req_power));
+	req_power = devm_kcalloc(&tz->device, num_actors * 5,
 				 sizeof(*req_power), GFP_KERNEL);
 	if (!req_power) {
 		ret = -ENOMEM;
 	max_power = &req_power[num_actors];
 	granted_power = &req_power[2 * num_actors];
 	extra_actor_power = &req_power[3 * num_actors];
+	weighted_req_power = &req_power[4 * num_actors];
 	i = 0;
+	total_weighted_req_power = 0;
 	total_req_power = 0;
 	max_allocatable_power = 0;
 		else
 			weight = instance->weight;
-		req_power[i] = frac_to_int(weight * req_power[i]);
+		weighted_req_power[i] = frac_to_int(weight * req_power[i]);
 		if (power_actor_get_max_power(cdev, tz, &max_power[i]))
 			continue;
 		total_req_power += req_power[i];
 		max_allocatable_power += max_power[i];
+		total_weighted_req_power += weighted_req_power[i];
 		i++;
 	}
 	power_range = pid_controller(tz, current_temp, control_temp,
 				     max_allocatable_power);
-	divvy_up_power(req_power, max_power, num_actors, total_req_power,
+	divvy_up_power(weighted_req_power, max_power, num_actors,
-		       power_range, granted_power, extra_actor_power);
+		       total_weighted_req_power, power_range, granted_power,
+		       extra_actor_power);
 	total_granted_power = 0;
 	i = 0;

drivers/thermal/samsung/Kconfig+1−1

@@ -1,6 +1,6 @@
1	config EXYNOS_THERMAL	1	config EXYNOS_THERMAL
2	tristate "Exynos thermal management unit driver"	2	tristate "Exynos thermal management unit driver"
3	depends on OF	3	depends on THERMAL_OF
4	help	4	help
5	If you say yes here you get support for the TMU (Thermal Management	5	If you say yes here you get support for the TMU (Thermal Management
6	Unit) driver for SAMSUNG EXYNOS series of SoCs. This driver initialises	6	Unit) driver for SAMSUNG EXYNOS series of SoCs. This driver initialises

drivers/thermal/samsung/exynos_tmu.c+2−3

 static int exynos_tmu_probe(struct platform_device *pdev)
 {
-	struct exynos_tmu_platform_data *pdata;
 	struct exynos_tmu_data *data;
 	int ret;
 	if (ret)
 		goto err_sensor;
-	pdata = data->pdata;
 	INIT_WORK(&data->irq_work, exynos_tmu_work);
 	data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
 	if (!IS_ERR(data->clk_sec))
 		clk_unprepare(data->clk_sec);
 err_sensor:
+	if (!IS_ERR_OR_NULL(data->regulator))
+		regulator_disable(data->regulator);
 	thermal_zone_of_sensor_unregister(&pdev->dev, data->tzd);
 	return ret;

drivers/thermal/thermal_core.c+1−0

@@ -1333,6 +1333,7 @@ int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz, · 1332 unmodified lines
1333	return -ENODEV;	1333	return -ENODEV;
1334		1334
1335	unbind:	1335	unbind:
		1336	device_remove_file(&tz->device, &pos->weight_attr);
1336	device_remove_file(&tz->device, &pos->attr);	1337	device_remove_file(&tz->device, &pos->attr);
1337	sysfs_remove_link(&tz->device.kobj, pos->name);	1338	sysfs_remove_link(&tz->device.kobj, pos->name);
1338	release_idr(&tz->idr, &tz->lock, pos->id);	1339	release_idr(&tz->idr, &tz->lock, pos->id);

drivers/usb/chipidea/core.c+12−1

@@ -1024,7 +1024,18 @@ static struct platform_driver ci_hdrc_driver = { · 1023 unmodified lines
1024	},	1024	},
1025	};	1025	};
1026		1026
1027	module_platform_driver(ci_hdrc_driver);	1027	static int __init ci_hdrc_platform_register(void)
		1028	{
		1029	ci_hdrc_host_driver_init();
		1030	return platform_driver_register(&ci_hdrc_driver);
		1031	}
		1032	module_init(ci_hdrc_platform_register);
		1033
		1034	static void __exit ci_hdrc_platform_unregister(void)
		1035	{
		1036	platform_driver_unregister(&ci_hdrc_driver);
		1037	}
		1038	module_exit(ci_hdrc_platform_unregister);
1028		1039
1029	MODULE_ALIAS("platform:ci_hdrc");	1040	MODULE_ALIAS("platform:ci_hdrc");
1030	MODULE_LICENSE("GPL v2");	1041	MODULE_LICENSE("GPL v2");

drivers/usb/chipidea/host.c+5−2

 	rdrv->name	= "host";
 	ci->roles[CI_ROLE_HOST] = rdrv;
+	return 0;
+}
+void ci_hdrc_host_driver_init(void)
+{
 	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
 	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
 	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
-	return 0;
 }

drivers/usb/chipidea/host.h+6−0

 int ci_hdrc_host_init(struct ci_hdrc *ci);
 void ci_hdrc_host_destroy(struct ci_hdrc *ci);
+void ci_hdrc_host_driver_init(void);
 #else
 }
+static void ci_hdrc_host_driver_init(void)
+{
+}
 #endif
 #endif /* __DRIVERS_USB_CHIPIDEA_HOST_H */

drivers/usb/gadget/function/f_hid.c+4−0

 	int ret;
 	ret = ida_simple_get(&hidg_ida, 0, 0, GFP_KERNEL);
+	if (ret >= HIDG_MINORS) {
+		ida_simple_remove(&hidg_ida, ret);
+		ret = -ENODEV;
+	}
 	return ret;
 }

drivers/usb/gadget/function/f_printer.c+9−1

@@ -1248,7 +1248,15 @@ static struct config_item_type printer_func_type = { · 1247 unmodified lines
1248		1248
1249	static inline int gprinter_get_minor(void)	1249	static inline int gprinter_get_minor(void)
1250	{	1250	{
1251	return ida_simple_get(&printer_ida, 0, 0, GFP_KERNEL);	1251	int ret;
		1252
		1253	ret = ida_simple_get(&printer_ida, 0, 0, GFP_KERNEL);
		1254	if (ret >= PRINTER_MINORS) {
		1255	ida_simple_remove(&printer_ida, ret);
		1256	ret = -ENODEV;
		1257	}
		1258
		1259	return ret;
1252	}	1260	}
1253		1261
1254	static inline void gprinter_put_minor(int minor)	1262	static inline void gprinter_put_minor(int minor)

drivers/usb/gadget/function/f_uac2.c+2−2

@@ -1162,14 +1162,14 @@ afunc_set_alt(struct usb_function *fn, unsigned intf, unsigned alt) · 1161 unmodified lines
1162	factor = 1000;	1162	factor = 1000;
1163	} else {	1163	} else {
1164	ep_desc = &hs_epin_desc;	1164	ep_desc = &hs_epin_desc;
1165	factor = 125;	1165	factor = 8000;
1166	}	1166	}
1167		1167
1168	/* pre-compute some values for iso_complete() */	1168	/* pre-compute some values for iso_complete() */
1169	uac2->p_framesize = opts->p_ssize *	1169	uac2->p_framesize = opts->p_ssize *
1170	num_channels(opts->p_chmask);	1170	num_channels(opts->p_chmask);
1171	rate = opts->p_srate * uac2->p_framesize;	1171	rate = opts->p_srate * uac2->p_framesize;
1172	uac2->p_interval = (1 << (ep_desc->bInterval - 1)) * factor;	1172	uac2->p_interval = factor / (1 << (ep_desc->bInterval - 1));
1173	uac2->p_pktsize = min_t(unsigned int, rate / uac2->p_interval,	1173	uac2->p_pktsize = min_t(unsigned int, rate / uac2->p_interval,
1174	prm->max_psize);	1174	prm->max_psize);
1175		1175

drivers/usb/gadget/udc/bdc/bdc_ep.c+1−1

@@ -779,7 +779,7 @@ static int ep_dequeue(struct bdc_ep ep, struct bdc_req req) · 778 unmodified lines
779	/* The current hw dequeue pointer */	779	/* The current hw dequeue pointer */
780	tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS0(0));	780	tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS0(0));
781	deq_ptr_64 = tmp_32;	781	deq_ptr_64 = tmp_32;
782	tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS0(1));	782	tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS1(0));
783	deq_ptr_64 \|= ((u64)tmp_32 << 32);	783	deq_ptr_64 \|= ((u64)tmp_32 << 32);
784		784
785	/* we have the dma addr of next bd that will be fetched by hardware */	785	/* we have the dma addr of next bd that will be fetched by hardware */

drivers/usb/gadget/udc/udc-core.c+1−0

@@ -323,6 +323,7 @@ err4: · 322 unmodified lines
323		323
324	err3:	324	err3:
325	put_device(&udc->dev);	325	put_device(&udc->dev);
		326	device_del(&gadget->dev);
326		327
327	err2:	328	err2:
328	put_device(&gadget->dev);	329	put_device(&gadget->dev);

drivers/usb/host/xhci-mem.c+2−1

@@ -1792,7 +1792,8 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci) · 1791 unmodified lines
1792	int size;	1792	int size;
1793	int i, j, num_ports;	1793	int i, j, num_ports;
1794		1794
1795	del_timer_sync(&xhci->cmd_timer);	1795	if (timer_pending(&xhci->cmd_timer))
		1796	del_timer_sync(&xhci->cmd_timer);
1796		1797
1797	/* Free the Event Ring Segment Table and the actual Event Ring */	1798	/* Free the Event Ring Segment Table and the actual Event Ring */
1798	size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);	1799	size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);

drivers/usb/host/xhci-ring.c+1−1

@@ -82,7 +82,7 @@ dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg, · 81 unmodified lines
82	return 0;	82	return 0;
83	/* offset in TRBs */	83	/* offset in TRBs */
84	segment_offset = trb - seg->trbs;	84	segment_offset = trb - seg->trbs;
85	if (segment_offset > TRBS_PER_SEGMENT)	85	if (segment_offset >= TRBS_PER_SEGMENT)
86	return 0;	86	return 0;
87	return seg->dma + (segment_offset * sizeof(*trb));	87	return seg->dma + (segment_offset * sizeof(*trb));
88	}	88	}

drivers/usb/serial/option.c+2−0

 	{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000)}, /* SIMCom SIM5218 */
 	{ USB_DEVICE_INTERFACE_CLASS(SIERRA_VENDOR_ID, 0x68c0, 0xff),
 	  .driver_info = (kernel_ulong_t)&sierra_mc73xx_blacklist }, /* MC73xx */
+	{ USB_DEVICE_INTERFACE_CLASS(SIERRA_VENDOR_ID, 0x9041, 0xff),
+	  .driver_info = (kernel_ulong_t)&sierra_mc73xx_blacklist }, /* MC7305/MC7355 */
 	{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) },
 	{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) },
 	{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6003),

drivers/usb/serial/qcserial.c+1−1

 	{DEVICE_SWI(0x1199, 0x901c)},	/* Sierra Wireless EM7700 */
 	{DEVICE_SWI(0x1199, 0x901f)},	/* Sierra Wireless EM7355 */
 	{DEVICE_SWI(0x1199, 0x9040)},	/* Sierra Wireless Modem */
-	{DEVICE_SWI(0x1199, 0x9041)},	/* Sierra Wireless MC7305/MC7355 */
 	{DEVICE_SWI(0x1199, 0x9051)},	/* Netgear AirCard 340U */
 	{DEVICE_SWI(0x1199, 0x9053)},	/* Sierra Wireless Modem */
 	{DEVICE_SWI(0x1199, 0x9054)},	/* Sierra Wireless Modem */
 	{DEVICE_SWI(0x413c, 0x81a4)},	/* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card */
 	{DEVICE_SWI(0x413c, 0x81a8)},	/* Dell Wireless 5808 Gobi(TM) 4G LTE Mobile Broadband Card */
 	{DEVICE_SWI(0x413c, 0x81a9)},	/* Dell Wireless 5808e Gobi(TM) 4G LTE Mobile Broadband Card */
+	{DEVICE_SWI(0x413c, 0x81b1)},	/* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card */
 	/* Huawei devices */
 	{DEVICE_HWI(0x03f0, 0x581d)},	/* HP lt4112 LTE/HSPA+ Gobi 4G Modem (Huawei me906e) */

drivers/usb/serial/sierra.c+1−0

@@ -289,6 +289,7 @@ static const struct usb_device_id id_table[] = { · 288 unmodified lines
289	{ USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x68AA, 0xFF, 0xFF, 0xFF),	289	{ USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x68AA, 0xFF, 0xFF, 0xFF),
290	.driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist	290	.driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist
291	},	291	},
		292	{ USB_DEVICE(0x1199, 0x68AB) }, /* Sierra Wireless AR8550 */
292	/* AT&T Direct IP LTE modems */	293	/* AT&T Direct IP LTE modems */
293	{ USB_DEVICE_AND_INTERFACE_INFO(0x0F3D, 0x68AA, 0xFF, 0xFF, 0xFF),	294	{ USB_DEVICE_AND_INTERFACE_INFO(0x0F3D, 0x68AA, 0xFF, 0xFF, 0xFF),
294	.driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist	295	.driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist

drivers/video/console/fbcon.c+2−1

 	int y;
  	int c = scr_readw((u16 *) vc->vc_pos);
+	ops->cur_blink_jiffies = msecs_to_jiffies(vc->vc_cur_blink_ms);
 	if (fbcon_is_inactive(vc, info) || vc->vc_deccm != 1)
 		return;
-	ops->cur_blink_jiffies = msecs_to_jiffies(vc->vc_cur_blink_ms);
 	if (vc->vc_cursor_type & 0x10)
 		fbcon_del_cursor_timer(info);
 	else

drivers/video/fbdev/Kconfig+1−1

@@ -298,7 +298,7 @@ config FB_ARMCLCD · 297 unmodified lines
298		298
299	# Helper logic selected only by the ARM Versatile platform family.	299	# Helper logic selected only by the ARM Versatile platform family.
300	config PLAT_VERSATILE_CLCD	300	config PLAT_VERSATILE_CLCD
301	def_bool ARCH_VERSATILE \|\| ARCH_REALVIEW \|\| ARCH_VEXPRESS	301	def_bool ARCH_VERSATILE \|\| ARCH_REALVIEW \|\| ARCH_VEXPRESS \|\| ARCH_INTEGRATOR
302	depends on ARM	302	depends on ARM
303	depends on FB_ARMCLCD && FB=y	303	depends on FB_ARMCLCD && FB=y
304		304

drivers/video/fbdev/omap2/dss/dss-of.c+3−1

 			}
 			prev = port;
 		} while (of_node_cmp(port->name, "port") != 0);
+		of_node_put(ports);
 	}
 	return port;
 	if (!port)
 		return NULL;
-	np = of_get_next_parent(port);
+	np = of_get_parent(port);
 	for (i = 0; i < 2 && np; ++i) {
 		struct property *prop;

drivers/video/fbdev/pxa3xx-gcu.c+2−2

@@ -653,7 +653,7 @@ static int pxa3xx_gcu_probe(struct platform_device *pdev) · 652 unmodified lines
653	goto err_free_dma;	653	goto err_free_dma;
654	}	654	}
655		655
656	ret = clk_enable(priv->clk);	656	ret = clk_prepare_enable(priv->clk);
657	if (ret < 0) {	657	if (ret < 0) {
658	dev_err(dev, "failed to enable clock\n");	658	dev_err(dev, "failed to enable clock\n");
659	goto err_misc_deregister;	659	goto err_misc_deregister;
@@ -685,7 +685,7 @@ err_misc_deregister: · 25 unmodified lines
685	misc_deregister(&priv->misc_dev);	685	misc_deregister(&priv->misc_dev);
686		686
687	err_disable_clk:	687	err_disable_clk:
688	clk_disable(priv->clk);	688	clk_disable_unprepare(priv->clk);
689		689
690	return ret;	690	return ret;
691	}	691	}

drivers/video/of_videomode.c+1−3

 		index = disp->native_mode;
 	ret = videomode_from_timings(disp, vm, index);
-	if (ret)
-		return ret;
 	display_timings_release(disp);
-	return 0;
+	return ret;
 }
 EXPORT_SYMBOL_GPL(of_get_videomode);

drivers/virtio/virtio_input.c+4−0

 static void virtinput_remove(struct virtio_device *vdev)
 {
 	struct virtio_input *vi = vdev->priv;
+	void *buf;
 	unsigned long flags;
 	spin_lock_irqsave(&vi->lock, flags);
 	spin_unlock_irqrestore(&vi->lock, flags);
 	input_unregister_device(vi->idev);
+	vdev->config->reset(vdev);
+	while ((buf = virtqueue_detach_unused_buf(vi->sts)) != NULL)
+		kfree(buf);
 	vdev->config->del_vqs(vdev);
 	kfree(vi);
 }

drivers/xen/balloon.c+7−8

@@ -472,7 +472,7 @@ static enum bp_state decrease_reservation(unsigned long nr_pages, gfp_t gfp) · 471 unmodified lines
472	}	472	}
473		473
474	/*	474	/*
475	* We avoid multiple worker processes conflicting via the balloon mutex.	475	* As this is a work item it is guaranteed to run as a single instance only.
476	* We may of course race updates of the target counts (which are protected	476	* We may of course race updates of the target counts (which are protected
477	* by the balloon lock), or with changes to the Xen hard limit, but we will	477	* by the balloon lock), or with changes to the Xen hard limit, but we will
478	* recover from these in time.	478	* recover from these in time.
@@ -482,9 +482,10 @@ static void balloon_process(struct work_struct *work) · 3 unmodified lines
482	enum bp_state state = BP_DONE;	482	enum bp_state state = BP_DONE;
483	long credit;	483	long credit;
484		484
485	mutex_lock(&balloon_mutex);
486		485
487	do {	486	do {
		487	mutex_lock(&balloon_mutex);
		488
488	credit = current_credit();	489	credit = current_credit();
489		490
490	if (credit > 0) {	491	if (credit > 0) {
@@ -499,17 +500,15 @@ static void balloon_process(struct work_struct *work) · 8 unmodified lines
499		500
500	state = update_schedule(state);	501	state = update_schedule(state);
501		502
502	#ifndef CONFIG_PREEMPT	503	mutex_unlock(&balloon_mutex);
503	if (need_resched())	504
504	schedule();	505	cond_resched();
505	#endif	506
506	} while (credit && state == BP_DONE);	507	} while (credit && state == BP_DONE);
507		508
508	/* Schedule more work if there is some still to be done. */	509	/* Schedule more work if there is some still to be done. */
509	if (state == BP_EAGAIN)	510	if (state == BP_EAGAIN)
510	schedule_delayed_work(&balloon_worker, balloon_stats.schedule_delay * HZ);	511	schedule_delayed_work(&balloon_worker, balloon_stats.schedule_delay * HZ);
511
512	mutex_unlock(&balloon_mutex);
513	}	512	}
514		513
515	/* Resets the Xen limit, sets new target, and kicks off processing. */	514	/* Resets the Xen limit, sets new target, and kicks off processing. */

drivers/xen/gntdev.c+2−0

 	pr_debug("priv %p\n", priv);
+	mutex_lock(&priv->lock);
 	while (!list_empty(&priv->maps)) {
 		map = list_entry(priv->maps.next, struct grant_map, next);
 		list_del(&map->next);
 		gntdev_put_map(NULL /* already removed */, map);
 	}
 	WARN_ON(!list_empty(&priv->freeable_maps));
+	mutex_unlock(&priv->lock);
 	if (use_ptemod)
 		mmu_notifier_unregister(&priv->mn, priv->mm);

drivers/xen/xenbus/xenbus_client.c+3−1

 	rv = xenbus_unmap_ring(dev, node->handles, node->nr_handles,
 			       addrs);
-	if (!rv)
+	if (!rv) {
 		vunmap(vaddr);
+		free_xenballooned_pages(node->nr_handles, node->hvm.pages);
+	}
 	else
 		WARN(1, "Leaking %p, size %u page(s)\n", vaddr,
 		     node->nr_handles);

fs/btrfs/qgroup.c+5−0

 				/* Exclusive -> exclusive, nothing changed */
 			}
 		}
+		/* For exclusive extent, free its reserved bytes too */
+		if (nr_old_roots == 0 && nr_new_roots == 1 &&
+		    cur_new_count == nr_new_roots)
+			qg->reserved -= num_bytes;
 		if (dirty)
 			qgroup_dirty(fs_info, qg);
 	}

fs/ceph/caps.c+5−17

 	swap(cf, ci->i_prealloc_cap_flush);
 	cf->caps = flushing;
-	cf->kick = false;
 	spin_lock(&mdsc->cap_dirty_lock);
 	list_del_init(&ci->i_dirty_item);
 static int __kick_flushing_caps(struct ceph_mds_client *mdsc,
 				struct ceph_mds_session *session,
-				struct ceph_inode_info *ci,
+				struct ceph_inode_info *ci)
-				bool kick_all)
 {
 	struct inode *inode = &ci->vfs_inode;
 	struct ceph_cap *cap;
 		for (n = rb_first(&ci->i_cap_flush_tree); n; n = rb_next(n)) {
 			cf = rb_entry(n, struct ceph_cap_flush, i_node);
-			if (cf->tid < first_tid)
+			if (cf->tid >= first_tid)
-				continue;
-			if (kick_all || cf->kick)
 				break;
 		}
 		if (!n) {
 		}
 		cf = rb_entry(n, struct ceph_cap_flush, i_node);
-		cf->kick = false;
 		first_tid = cf->tid + 1;
 {
 	struct ceph_inode_info *ci;
 	struct ceph_cap *cap;
-	struct ceph_cap_flush *cf;
-	struct rb_node *n;
 	dout("early_kick_flushing_caps mds%d\n", session->s_mds);
 	list_for_each_entry(ci, &session->s_cap_flushing, i_flushing_item) {
 		if ((cap->issued & ci->i_flushing_caps) !=
 		    ci->i_flushing_caps) {
 			spin_unlock(&ci->i_ceph_lock);
-			if (!__kick_flushing_caps(mdsc, session, ci, true))
+			if (!__kick_flushing_caps(mdsc, session, ci))
 				continue;
 			spin_lock(&ci->i_ceph_lock);
 		}
-		for (n = rb_first(&ci->i_cap_flush_tree); n; n = rb_next(n)) {
-			cf = rb_entry(n, struct ceph_cap_flush, i_node);
-			cf->kick = true;
-		}
 		spin_unlock(&ci->i_ceph_lock);
 	}
 }
 	dout("kick_flushing_caps mds%d\n", session->s_mds);
 	list_for_each_entry(ci, &session->s_cap_flushing, i_flushing_item) {
-		int delayed = __kick_flushing_caps(mdsc, session, ci, false);
+		int delayed = __kick_flushing_caps(mdsc, session, ci);
 		if (delayed) {
 			spin_lock(&ci->i_ceph_lock);
 			__cap_delay_requeue(mdsc, ci);
 		spin_unlock(&ci->i_ceph_lock);
-		delayed = __kick_flushing_caps(mdsc, session, ci, true);
+		delayed = __kick_flushing_caps(mdsc, session, ci);
 		if (delayed) {
 			spin_lock(&ci->i_ceph_lock);
 			__cap_delay_requeue(mdsc, ci);

fs/ceph/locks.c+1−1

@@ -287,7 +287,7 @@ int ceph_encode_locks_to_buffer(struct inode *inode, · 286 unmodified lines
287	return 0;	287	return 0;
288		288
289	spin_lock(&ctx->flc_lock);	289	spin_lock(&ctx->flc_lock);
290	list_for_each_entry(lock, &ctx->flc_flock, fl_list) {	290	list_for_each_entry(lock, &ctx->flc_posix, fl_list) {
291	++seen_fcntl;	291	++seen_fcntl;
292	if (seen_fcntl > num_fcntl_locks) {	292	if (seen_fcntl > num_fcntl_locks) {
293	err = -ENOSPC;	293	err = -ENOSPC;

fs/ceph/super.h+0−1

@@ -189,7 +189,6 @@ static inline void ceph_put_cap_snap(struct ceph_cap_snap *capsnap) · 188 unmodified lines
189	struct ceph_cap_flush {	189	struct ceph_cap_flush {
190	u64 tid;	190	u64 tid;
191	int caps;	191	int caps;
192	bool kick;
193	struct rb_node g_node; // global	192	struct rb_node g_node; // global
194	union {	193	union {
195	struct rb_node i_node; // inode	194	struct rb_node i_node; // inode

fs/dcache.c+3−10

 	inode_init_early();
 }
-void __init vfs_caches_init(unsigned long mempages)
+void __init vfs_caches_init(void)
 {
-	unsigned long reserve;
-	/* Base hash sizes on available memory, with a reserve equal to
-           150% of current kernel size */
-	reserve = min((mempages - nr_free_pages()) * 3/2, mempages - 1);
-	mempages -= reserve;
 	names_cachep = kmem_cache_create("names_cache", PATH_MAX, 0,
 			SLAB_HWCACHE_ALIGN|SLAB_PANIC, NULL);
 	dcache_init();
 	inode_init();
-	files_init(mempages);
+	files_init();
+	files_maxfiles_init();
 	mnt_init();
 	bdev_cache_init();
 	chrdev_init();

fs/file_table.c+15−9

 #include <linux/hardirq.h>
 #include <linux/task_work.h>
 #include <linux/ima.h>
+#include <linux/swap.h>
 #include <linux/atomic.h>
 	}
 }
-void __init files_init(unsigned long mempages)
+void __init files_init(void)
 {
-	unsigned long n;
 	filp_cachep = kmem_cache_create("filp", sizeof(struct file), 0,
 			SLAB_HWCACHE_ALIGN | SLAB_PANIC, NULL);
+	percpu_counter_init(&nr_files, 0, GFP_KERNEL);
+}
-	/*
+/*
-	 * One file with associated inode and dcache is very roughly 1K.
+ * One file with associated inode and dcache is very roughly 1K. Per default
-	 * Per default don't use more than 10% of our memory for files.
+ * do not use more than 10% of our memory for files.
-	 */
+ */
+void __init files_maxfiles_init(void)
+{
+	unsigned long n;
+	unsigned long memreserve = (totalram_pages - nr_free_pages()) * 3/2;
+	memreserve = min(memreserve, totalram_pages - 1);
+	n = ((totalram_pages - memreserve) * (PAGE_SIZE / 1024)) / 10;
-	n = (mempages * (PAGE_SIZE / 1024)) / 10;
 	files_stat.max_files = max_t(unsigned long, n, NR_FILE);
-	percpu_counter_init(&nr_files, 0, GFP_KERNEL);
 }

fs/hugetlbfs/inode.c+2−0

@@ -1010,6 +1010,8 @@ struct file hugetlb_file_setup(const char name, size_t size, · 1009 unmodified lines
1010	inode = hugetlbfs_get_inode(sb, NULL, S_IFREG \| S_IRWXUGO, 0);	1010	inode = hugetlbfs_get_inode(sb, NULL, S_IFREG \| S_IRWXUGO, 0);
1011	if (!inode)	1011	if (!inode)
1012	goto out_dentry;	1012	goto out_dentry;
		1013	if (creat_flags == HUGETLB_SHMFS_INODE)
		1014	inode->i_flags \|= S_PRIVATE;
1013		1015
1014	file = ERR_PTR(-ENOMEM);	1016	file = ERR_PTR(-ENOMEM);
1015	if (hugetlb_reserve_pages(inode, 0,	1017	if (hugetlb_reserve_pages(inode, 0,

fs/namei.c+7−2

 		return 0;
 	/* Allowed if parent directory not sticky and world-writable. */
-	parent = nd->path.dentry->d_inode;
+	parent = nd->inode;
 	if ((parent->i_mode & (S_ISVTX|S_IWOTH)) != (S_ISVTX|S_IWOTH))
 		return 0;
 				continue;
 			}
 		}
-		if (unlikely(!d_can_lookup(nd->path.dentry)))
+		if (unlikely(!d_can_lookup(nd->path.dentry))) {
+			if (nd->flags & LOOKUP_RCU) {
+				if (unlazy_walk(nd, NULL, 0))
+					return -ECHILD;
+			}
 			return -ENOTDIR;
+		}
 	}
 }

fs/nfsd/nfs4layouts.c+1−0

@@ -212,6 +212,7 @@ nfsd4_alloc_layout_stateid(struct nfsd4_compound_state *cstate, · 211 unmodified lines
212	BUG_ON(!ls->ls_file);	212	BUG_ON(!ls->ls_file);
213		213
214	if (nfsd4_layout_setlease(ls)) {	214	if (nfsd4_layout_setlease(ls)) {
		215	fput(ls->ls_file);
215	put_nfs4_file(fp);	216	put_nfs4_file(fp);
216	kmem_cache_free(nfs4_layout_stateid_cache, ls);	217	kmem_cache_free(nfs4_layout_stateid_cache, ls);
217	return NULL;	218	return NULL;

fs/nfsd/nfs4state.c+6−6

 	queue_delayed_work(laundry_wq, &nn->laundromat_work, t*HZ);
 }
-static inline __be32 nfs4_check_fh(struct svc_fh *fhp, struct nfs4_ol_stateid *stp)
+static inline __be32 nfs4_check_fh(struct svc_fh *fhp, struct nfs4_stid *stp)
 {
-	if (!fh_match(&fhp->fh_handle, &stp->st_stid.sc_file->fi_fhandle))
+	if (!fh_match(&fhp->fh_handle, &stp->sc_file->fi_fhandle))
 		return nfserr_bad_stateid;
 	return nfs_ok;
 }
 {
 	__be32 status;
-	status = nfs4_check_fh(fhp, ols);
-	if (status)
-		return status;
 	status = nfsd4_check_openowner_confirmed(ols);
 	if (status)
 		return status;
 		status = nfserr_bad_stateid;
 		break;
 	}
+	if (status)
+		goto out;
+	status = nfs4_check_fh(fhp, s);
 done:
 	if (!status && filpp)
 	status = check_stateid_generation(stateid, &stp->st_stid.sc_stateid, nfsd4_has_session(cstate));
 	if (status)
 		return status;
-	return nfs4_check_fh(current_fh, stp);
+	return nfs4_check_fh(current_fh, &stp->st_stid);
 }
 /*

fs/nfsd/nfs4xdr.c+6−5

 #define WORD0_ABSENT_FS_ATTRS (FATTR4_WORD0_FS_LOCATIONS | FATTR4_WORD0_FSID | \
 			      FATTR4_WORD0_RDATTR_ERROR)
 #define WORD1_ABSENT_FS_ATTRS FATTR4_WORD1_MOUNTED_ON_FILEID
+#define WORD2_ABSENT_FS_ATTRS 0
 #ifdef CONFIG_NFSD_V4_SECURITY_LABEL
 static inline __be32
 { return 0; }
 #endif
-static __be32 fattr_handle_absent_fs(u32 *bmval0, u32 *bmval1, u32 *rdattr_err)
+static __be32 fattr_handle_absent_fs(u32 *bmval0, u32 *bmval1, u32 *bmval2, u32 *rdattr_err)
 {
 	/* As per referral draft:  */
 	if (*bmval0 & ~WORD0_ABSENT_FS_ATTRS ||
 	}
 	*bmval0 &= WORD0_ABSENT_FS_ATTRS;
 	*bmval1 &= WORD1_ABSENT_FS_ATTRS;
+	*bmval2 &= WORD2_ABSENT_FS_ATTRS;
 	return 0;
 }
 	BUG_ON(bmval2 & ~nfsd_suppattrs2(minorversion));
 	if (exp->ex_fslocs.migrated) {
-		BUG_ON(bmval[2]);
+		status = fattr_handle_absent_fs(&bmval0, &bmval1, &bmval2, &rdattr_err);
-		status = fattr_handle_absent_fs(&bmval0, &bmval1, &rdattr_err);
 		if (status)
 			goto out;
 	}
 	}
 #ifdef CONFIG_NFSD_V4_SECURITY_LABEL
-	if ((bmval[2] & FATTR4_WORD2_SECURITY_LABEL) ||
+	if ((bmval2 & FATTR4_WORD2_SECURITY_LABEL) ||
-			bmval[0] & FATTR4_WORD0_SUPPORTED_ATTRS) {
+	     bmval0 & FATTR4_WORD0_SUPPORTED_ATTRS) {
 		err = security_inode_getsecctx(d_inode(dentry),
 						&context, &contextlen);
 		contextsupport = (err == 0);

fs/notify/mark.c+25−5

@@ -412,16 +412,36 @@ void fsnotify_clear_marks_by_group_flags(struct fsnotify_group *group, · 411 unmodified lines
412	unsigned int flags)	412	unsigned int flags)
413	{	413	{
414	struct fsnotify_mark lmark, mark;	414	struct fsnotify_mark lmark, mark;
		415	LIST_HEAD(to_free);
415		416
		417	/*
		418	* We have to be really careful here. Anytime we drop mark_mutex, e.g.
		419	* fsnotify_clear_marks_by_inode() can come and free marks. Even in our
		420	* to_free list so we have to use mark_mutex even when accessing that
		421	* list. And freeing mark requires us to drop mark_mutex. So we can
		422	* reliably free only the first mark in the list. That's why we first
		423	* move marks to free to to_free list in one go and then free marks in
		424	* to_free list one by one.
		425	*/
416	mutex_lock_nested(&group->mark_mutex, SINGLE_DEPTH_NESTING);	426	mutex_lock_nested(&group->mark_mutex, SINGLE_DEPTH_NESTING);
417	list_for_each_entry_safe(mark, lmark, &group->marks_list, g_list) {	427	list_for_each_entry_safe(mark, lmark, &group->marks_list, g_list) {
418	if (mark->flags & flags) {	428	if (mark->flags & flags)
419	fsnotify_get_mark(mark);	429	list_move(&mark->g_list, &to_free);
420	fsnotify_destroy_mark_locked(mark, group);
421	fsnotify_put_mark(mark);
422	}
423	}	430	}
424	mutex_unlock(&group->mark_mutex);	431	mutex_unlock(&group->mark_mutex);
		432
		433	while (1) {
		434	mutex_lock_nested(&group->mark_mutex, SINGLE_DEPTH_NESTING);
		435	if (list_empty(&to_free)) {
		436	mutex_unlock(&group->mark_mutex);
		437	break;
		438	}
		439	mark = list_first_entry(&to_free, struct fsnotify_mark, g_list);
		440	fsnotify_get_mark(mark);
		441	fsnotify_destroy_mark_locked(mark, group);
		442	mutex_unlock(&group->mark_mutex);
		443	fsnotify_put_mark(mark);
		444	}
425	}	445	}
426		446
427	/*	447	/*

fs/ocfs2/aops.c+2−2

@@ -685,7 +685,7 @@ static int ocfs2_direct_IO_zero_extend(struct ocfs2_super *osb, · 684 unmodified lines
685		685
686	if (p_cpos && !(ext_flags & OCFS2_EXT_UNWRITTEN)) {	686	if (p_cpos && !(ext_flags & OCFS2_EXT_UNWRITTEN)) {
687	u64 s = i_size_read(inode);	687	u64 s = i_size_read(inode);
688	sector_t sector = (p_cpos << (osb->s_clustersize_bits - 9)) +	688	sector_t sector = ((u64)p_cpos << (osb->s_clustersize_bits - 9)) +
689	(do_div(s, osb->s_clustersize) >> 9);	689	(do_div(s, osb->s_clustersize) >> 9);
690		690
691	ret = blkdev_issue_zeroout(osb->sb->s_bdev, sector,	691	ret = blkdev_issue_zeroout(osb->sb->s_bdev, sector,
@@ -910,7 +910,7 @@ static ssize_t ocfs2_direct_IO_write(struct kiocb *iocb, · 218 unmodified lines
910	BUG_ON(!p_cpos \|\| (ext_flags & OCFS2_EXT_UNWRITTEN));	910	BUG_ON(!p_cpos \|\| (ext_flags & OCFS2_EXT_UNWRITTEN));
911		911
912	ret = blkdev_issue_zeroout(osb->sb->s_bdev,	912	ret = blkdev_issue_zeroout(osb->sb->s_bdev,
913	p_cpos << (osb->s_clustersize_bits - 9),	913	(u64)p_cpos << (osb->s_clustersize_bits - 9),
914	zero_len_head >> 9, GFP_NOFS, false);	914	zero_len_head >> 9, GFP_NOFS, false);
915	if (ret < 0)	915	if (ret < 0)
916	mlog_errno(ret);	916	mlog_errno(ret);

fs/ocfs2/dlmglue.c+7−3

@@ -4025,9 +4025,13 @@ static void ocfs2_downconvert_thread_do_work(struct ocfs2_super *osb) · 4024 unmodified lines
4025	osb->dc_work_sequence = osb->dc_wake_sequence;	4025	osb->dc_work_sequence = osb->dc_wake_sequence;
4026		4026
4027	processed = osb->blocked_lock_count;	4027	processed = osb->blocked_lock_count;
4028	while (processed) {	4028	/*
4029	BUG_ON(list_empty(&osb->blocked_lock_list));	4029	* blocked lock processing in this loop might call iput which can
4030		4030	* remove items off osb->blocked_lock_list. Downconvert up to
		4031	* 'processed' number of locks, but stop short if we had some
		4032	* removed in ocfs2_mark_lockres_freeing when downconverting.
		4033	*/
		4034	while (processed && !list_empty(&osb->blocked_lock_list)) {
4031	lockres = list_entry(osb->blocked_lock_list.next,	4035	lockres = list_entry(osb->blocked_lock_list.next,
4032	struct ocfs2_lock_res, l_blocked_list);	4036	struct ocfs2_lock_res, l_blocked_list);
4033	list_del_init(&lockres->l_blocked_list);	4037	list_del_init(&lockres->l_blocked_list);

fs/signalfd.c+3−2

 		 * Other callers might not initialize the si_lsb field,
 		 * so check explicitly for the right codes here.
 		 */
-		if (kinfo->si_code == BUS_MCEERR_AR ||
+		if (kinfo->si_signo == SIGBUS &&
-		    kinfo->si_code == BUS_MCEERR_AO)
+		    (kinfo->si_code == BUS_MCEERR_AR ||
+		     kinfo->si_code == BUS_MCEERR_AO))
 			err |= __put_user((short) kinfo->si_addr_lsb,
 					  &uinfo->ssi_addr_lsb);
 #endif

include/drm/drmP.h+1−1

@@ -691,7 +691,7 @@ struct drm_vblank_crtc { · 690 unmodified lines
691	struct timer_list disable_timer; /* delayed disable timer */	691	struct timer_list disable_timer; /* delayed disable timer */
692		692
693	/* vblank counter, protected by dev->vblank_time_lock for writes */	693	/* vblank counter, protected by dev->vblank_time_lock for writes */
694	unsigned long count;	694	u32 count;
695	/* vblank timestamps, protected by dev->vblank_time_lock for writes */	695	/* vblank timestamps, protected by dev->vblank_time_lock for writes */
696	struct timeval time[DRM_VBLANKTIME_RBSIZE];	696	struct timeval time[DRM_VBLANKTIME_RBSIZE];
697		697

include/drm/drm_crtc_helper.h+3−0

  * @get_modes: get mode list for this connector
  * @mode_valid: is this mode valid on the given connector? (optional)
  * @best_encoder: return the preferred encoder for this connector
+ * @atomic_best_encoder: atomic version of @best_encoder
  *
  * The helper operations are called by the mid-layer CRTC helper.
  */
 	enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
 					   struct drm_display_mode *mode);
 	struct drm_encoder *(*best_encoder)(struct drm_connector *connector);
+	struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector,
+						   struct drm_connector_state *connector_state);
 };
 extern void drm_helper_disable_unused_functions(struct drm_device *dev);

include/drm/drm_pciids.h+1−0

@@ -172,6 +172,7 @@ · 171 unmodified lines
172	{0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \	172	{0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \
173	{0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \	173	{0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \
174	{0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \	174	{0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \
		175	{0x1002, 0x6617, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \
175	{0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \	176	{0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \
176	{0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \	177	{0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \
177	{0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \	178	{0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \

include/linux/fs.h+3−2

 extern void __init inode_init(void);
 extern void __init inode_init_early(void);
-extern void __init files_init(unsigned long);
+extern void __init files_init(void);
+extern void __init files_maxfiles_init(void);
 extern struct files_stat_struct files_stat;
 extern unsigned long get_max_files(void);
 /* fs/dcache.c */
 extern void __init vfs_caches_init_early(void);
-extern void __init vfs_caches_init(unsigned long);
+extern void __init vfs_caches_init(void);
 extern struct kmem_cache *names_cachep;

include/linux/page-flags.h+7−3

 	 1 << PG_private | 1 << PG_private_2 | \
 	 1 << PG_writeback | 1 << PG_reserved | \
 	 1 << PG_slab	 | 1 << PG_swapcache | 1 << PG_active | \
-	 1 << PG_unevictable | __PG_MLOCKED | __PG_HWPOISON | \
+	 1 << PG_unevictable | __PG_MLOCKED | \
 	 __PG_COMPOUND_LOCK)
 /*
  * Flags checked when a page is prepped for return by the page allocator.
- * Pages being prepped should not have any flags set.  It they are set,
+ * Pages being prepped should not have these flags set.  It they are set,
  * there has been a kernel bug or struct page corruption.
+ *
+ * __PG_HWPOISON is exceptional because it needs to be kept beyond page's
+ * alloc-free cycle to prevent from reusing the page.
  */
-#define PAGE_FLAGS_CHECK_AT_PREP	((1 << NR_PAGEFLAGS) - 1)
+#define PAGE_FLAGS_CHECK_AT_PREP	\
+	(((1 << NR_PAGEFLAGS) - 1) & ~__PG_HWPOISON)
 #define PAGE_FLAGS_PRIVATE				\
 	(1 << PG_private | 1 << PG_private_2)

include/linux/skbuff.h+3−3

@@ -2913,11 +2913,11 @@ static inline bool skb_defer_rx_timestamp(struct sk_buff *skb) · 2912 unmodified lines
2913	*	2913	*
2914	* PHY drivers may accept clones of transmitted packets for	2914	* PHY drivers may accept clones of transmitted packets for
2915	* timestamping via their phy_driver.txtstamp method. These drivers	2915	* timestamping via their phy_driver.txtstamp method. These drivers
2916	* must call this function to return the skb back to the stack, with	2916	* must call this function to return the skb back to the stack with a
2917	* or without a timestamp.	2917	* timestamp.
2918	*	2918	*
2919	* @skb: clone of the the original outgoing packet	2919	* @skb: clone of the the original outgoing packet
2920	* @hwtstamps: hardware time stamps, may be NULL if not available	2920	* @hwtstamps: hardware time stamps
2921	*	2921	*
2922	*/	2922	*/
2923	void skb_complete_tx_timestamp(struct sk_buff *skb,	2923	void skb_complete_tx_timestamp(struct sk_buff *skb,

include/uapi/linux/pci_regs.h+1−0

@@ -319,6 +319,7 @@ · 318 unmodified lines
319	#define PCI_MSIX_PBA 8 /* Pending Bit Array offset */	319	#define PCI_MSIX_PBA 8 /* Pending Bit Array offset */
320	#define PCI_MSIX_PBA_BIR 0x00000007 /* BAR index */	320	#define PCI_MSIX_PBA_BIR 0x00000007 /* BAR index */
321	#define PCI_MSIX_PBA_OFFSET 0xfffffff8 /* Offset into specified BAR */	321	#define PCI_MSIX_PBA_OFFSET 0xfffffff8 /* Offset into specified BAR */
		322	#define PCI_MSIX_FLAGS_BIRMASK PCI_MSIX_PBA_BIR /* deprecated */
322	#define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */	323	#define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */
323		324
324	/* MSI-X Table entry format */	325	/* MSI-X Table entry format */

include/uapi/sound/asoc.h+24−11

 #define SND_SOC_TPLG_NUM_TEXTS		16
 /* ABI version */
-#define SND_SOC_TPLG_ABI_VERSION	0x2
+#define SND_SOC_TPLG_ABI_VERSION	0x3
 /* Max size of TLV data */
 #define SND_SOC_TPLG_TLV_SIZE		32
 #define SND_SOC_TPLG_TYPE_PCM		7
 #define SND_SOC_TPLG_TYPE_MANIFEST	8
 #define SND_SOC_TPLG_TYPE_CODEC_LINK	9
-#define SND_SOC_TPLG_TYPE_MAX	SND_SOC_TPLG_TYPE_CODEC_LINK
+#define SND_SOC_TPLG_TYPE_PDATA		10
+#define SND_SOC_TPLG_TYPE_MAX	SND_SOC_TPLG_TYPE_PDATA
 /* vendor block IDs - please add new vendor types to end */
 #define SND_SOC_TPLG_TYPE_VENDOR_FW	1000
 /*
  * Kcontrol TLV data.
  */
+struct snd_soc_tplg_tlv_dbscale {
+	__le32 min;
+	__le32 step;
+	__le32 mute;
+} __attribute__((packed));
 struct snd_soc_tplg_ctl_tlv {
-	__le32 size;	/* in bytes aligned to 4 */
+	__le32 size;	/* in bytes of this structure */
-	__le32 numid;	/* control element numeric identification */
+	__le32 type;	/* SNDRV_CTL_TLVT_*, type of TLV */
-	__le32 count;	/* number of elem in data array */
+	union {
-	__le32 data[SND_SOC_TPLG_TLV_SIZE];
+		__le32 data[SND_SOC_TPLG_TLV_SIZE];
+		struct snd_soc_tplg_tlv_dbscale scale;
+	};
 } __attribute__((packed));
 /*
 } __attribute__((packed));
 /*
- * Kcontrol Operations IDs
+ * Genericl Operations IDs, for binding Kcontrol or Bytes ext ops
+ * Kcontrol ops need get/put/info.
+ * Bytes ext ops need get/put.
  */
-struct snd_soc_tplg_kcontrol_ops_id {
+struct snd_soc_tplg_io_ops {
 	__le32 get;
 	__le32 put;
 	__le32 info;
 	__le32 type;
 	char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
 	__le32 access;
-	struct snd_soc_tplg_kcontrol_ops_id ops;
+	struct snd_soc_tplg_io_ops ops;
-	__le32 tlv_size;	/* non zero means control has TLV data */
+	struct snd_soc_tplg_ctl_tlv tlv;
 } __attribute__((packed));
 /*
 	__le32 graph_elems;	/* number of graph elements */
 	__le32 dai_elems;	/* number of DAI elements */
 	__le32 dai_link_elems;	/* number of DAI link elements */
+	struct snd_soc_tplg_private priv;
 } __attribute__((packed));
 /*
 	__le32 invert;
 	__le32 num_channels;
 	struct snd_soc_tplg_channel channel[SND_SOC_TPLG_MAX_CHAN];
-	struct snd_soc_tplg_ctl_tlv tlv;
 	struct snd_soc_tplg_private priv;
 } __attribute__((packed));
 	__le32 mask;
 	__le32 base;
 	__le32 num_regs;
+	struct snd_soc_tplg_io_ops ext_ops;
 	struct snd_soc_tplg_private priv;
 } __attribute__((packed));
 	__le32 reg;		/* negative reg = no direct dapm */
 	__le32 shift;		/* bits to shift */
 	__le32 mask;		/* non-shifted mask */
+	__le32 subseq;		/* sort within widget type */
 	__u32 invert;		/* invert the power bit */
 	__u32 ignore_suspend;	/* kept enabled over suspend */
 	__u16 event_flags;

init/main.c+1−1

@@ -656,7 +656,7 @@ asmlinkage __visible void __init start_kernel(void) · 655 unmodified lines
656	key_init();	656	key_init();
657	security_init();	657	security_init();
658	dbg_late_init();	658	dbg_late_init();
659	vfs_caches_init(totalram_pages);	659	vfs_caches_init();
660	signals_init();	660	signals_init();
661	/* rootfs populating might need page-writeback */	661	/* rootfs populating might need page-writeback */
662	page_writeback_init();	662	page_writeback_init();

ipc/mqueue.c+0−5

 		if (!leaf)
 			return -ENOMEM;
 		INIT_LIST_HEAD(&leaf->msg_list);
-		info->qsize += sizeof(*leaf);
 	}
 	leaf->priority = msg->m_type;
 	rb_link_node(&leaf->rb_node, parent, p);
 			     "lazy leaf delete!\n");
 		rb_erase(&leaf->rb_node, &info->msg_tree);
 		if (info->node_cache) {
-			info->qsize -= sizeof(*leaf);
 			kfree(leaf);
 		} else {
 			info->node_cache = leaf;
 		if (list_empty(&leaf->msg_list)) {
 			rb_erase(&leaf->rb_node, &info->msg_tree);
 			if (info->node_cache) {
-				info->qsize -= sizeof(*leaf);
 				kfree(leaf);
 			} else {
 				info->node_cache = leaf;
 		/* Save our speculative allocation into the cache */
 		INIT_LIST_HEAD(&new_leaf->msg_list);
 		info->node_cache = new_leaf;
-		info->qsize += sizeof(*new_leaf);
 		new_leaf = NULL;
 	} else {
 		kfree(new_leaf);
 		/* Save our speculative allocation into the cache */
 		INIT_LIST_HEAD(&new_leaf->msg_list);
 		info->node_cache = new_leaf;
-		info->qsize += sizeof(*new_leaf);
 	} else {
 		kfree(new_leaf);
 	}

ipc/shm.c+1−1

@@ -545,7 +545,7 @@ static int newseg(struct ipc_namespace ns, struct ipc_params params) · 544 unmodified lines
545	if ((shmflg & SHM_NORESERVE) &&	545	if ((shmflg & SHM_NORESERVE) &&
546	sysctl_overcommit_memory != OVERCOMMIT_NEVER)	546	sysctl_overcommit_memory != OVERCOMMIT_NEVER)
547	acctflag = VM_NORESERVE;	547	acctflag = VM_NORESERVE;
548	file = shmem_file_setup(name, size, acctflag);	548	file = shmem_kernel_file_setup(name, size, acctflag);
549	}	549	}
550	error = PTR_ERR(file);	550	error = PTR_ERR(file);
551	if (IS_ERR(file))	551	if (IS_ERR(file))

kernel/kthread.c+4−0

 {
 	return test_bit(KTHREAD_SHOULD_PARK, &to_kthread(current)->flags);
 }
+EXPORT_SYMBOL_GPL(kthread_should_park);
 /**
  * kthread_freezable_should_stop - should this freezable kthread return now?
 {
 	__kthread_parkme(to_kthread(current));
 }
+EXPORT_SYMBOL_GPL(kthread_parkme);
 static int kthread(void *_create)
 {
 	if (kthread)
 		__kthread_unpark(k, kthread);
 }
+EXPORT_SYMBOL_GPL(kthread_unpark);
 /**
  * kthread_park - park a thread created by kthread_create().
 	}
 	return ret;
 }
+EXPORT_SYMBOL_GPL(kthread_park);
 /**
  * kthread_stop - stop a thread created by kthread_create().

kernel/module.c+6−2

 }
 EXPORT_SYMBOL_GPL(find_symbol);
-/* Search for module by name: must hold module_mutex. */
+/*
+ * Search for module by name: must hold module_mutex (or preempt disabled
+ * for read-only access).
+ */
 static struct module *find_module_all(const char *name, size_t len,
 				      bool even_unformed)
 {
 	struct module *mod;
-	module_assert_mutex();
+	module_assert_mutex_or_preempt();
 	list_for_each_entry(mod, &modules, list) {
 		if (!even_unformed && mod->state == MODULE_STATE_UNFORMED)
 struct module *find_module(const char *name)
 {
+	module_assert_mutex();
 	return find_module_all(name, strlen(name), false);
 }
 EXPORT_SYMBOL_GPL(find_module);

kernel/signal.c+8−5

 		 * Other callers might not initialize the si_lsb field,
 		 * so check explicitly for the right codes here.
 		 */
-		if (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO)
+		if (from->si_signo == SIGBUS &&
+		    (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO))
 			err |= __put_user(from->si_addr_lsb, &to->si_addr_lsb);
 #endif
 #ifdef SEGV_BNDERR
-		err |= __put_user(from->si_lower, &to->si_lower);
+		if (from->si_signo == SIGSEGV && from->si_code == SEGV_BNDERR) {
-		err |= __put_user(from->si_upper, &to->si_upper);
+			err |= __put_user(from->si_lower, &to->si_lower);
+			err |= __put_user(from->si_upper, &to->si_upper);
+		}
 #endif
 		break;
 	case __SI_CHLD:
 			int, sig,
 			struct compat_siginfo __user *, uinfo)
 {
-	siginfo_t info;
+	siginfo_t info = {};
 	int ret = copy_siginfo_from_user32(&info, uinfo);
 	if (unlikely(ret))
 		return ret;
 			int, sig,
 			struct compat_siginfo __user *, uinfo)
 {
-	siginfo_t info;
+	siginfo_t info = {};
 	if (copy_siginfo_from_user32(&info, uinfo))
 		return -EFAULT;

lib/iommu-common.c+1−1

@@ -119,7 +119,7 @@ unsigned long iommu_tbl_range_alloc(struct device *dev, · 118 unmodified lines
119	unsigned long align_mask = 0;	119	unsigned long align_mask = 0;
120		120
121	if (align_order > 0)	121	if (align_order > 0)
122	align_mask = 0xffffffffffffffffl >> (64 - align_order);	122	align_mask = ~0ul >> (BITS_PER_LONG - align_order);
123		123
124	/* Sanity check */	124	/* Sanity check */
125	if (unlikely(npages == 0)) {	125	if (unlikely(npages == 0)) {

mm/huge_memory.c+1−6

 		/* after clearing PageTail the gup refcount can be released */
 		smp_mb__after_atomic();
-		/*
+		page_tail->flags &= ~PAGE_FLAGS_CHECK_AT_PREP;
-		 * retain hwpoison flag of the poisoned tail page:
-		 *   fix for the unsuitable process killed on Guest Machine(KVM)
-		 *   by the memory-failure.
-		 */
-		page_tail->flags &= ~PAGE_FLAGS_CHECK_AT_PREP | __PG_HWPOISON;
 		page_tail->flags |= (page->flags &
 				     ((1L << PG_referenced) |
 				      (1L << PG_swapbacked) |

mm/memory-failure.c+18−14

 	 * directly for tail pages.
 	 */
 	if (PageTransHuge(head)) {
+		/*
+		 * Non anonymous thp exists only in allocation/free time. We
+		 * can't handle such a case correctly, so let's give it up.
+		 * This should be better than triggering BUG_ON when kernel
+		 * tries to touch the "partially handled" page.
+		 */
+		if (!PageAnon(head)) {
+			pr_err("MCE: %#lx: non anonymous thp\n",
+				page_to_pfn(page));
+			return 0;
+		}
 		if (get_page_unless_zero(head)) {
 			if (PageTail(page))
 				get_page(page);
 	}
 	if (!PageHuge(p) && PageTransHuge(hpage)) {
-		if (!PageAnon(hpage)) {
-			pr_err("MCE: %#lx: non anonymous thp\n", pfn);
-			if (TestClearPageHWPoison(p))
-				atomic_long_sub(nr_pages, &num_poisoned_pages);
-			put_page(p);
-			if (p != hpage)
-				put_page(hpage);
-			return -EBUSY;
-		}
 		if (unlikely(split_huge_page(hpage))) {
 			pr_err("MCE: %#lx: thp split failed\n", pfn);
 			if (TestClearPageHWPoison(p))
 	if (!PageHWPoison(p)) {
 		printk(KERN_ERR "MCE %#lx: just unpoisoned\n", pfn);
 		atomic_long_sub(nr_pages, &num_poisoned_pages);
+		unlock_page(hpage);
 		put_page(hpage);
-		res = 0;
+		return 0;
-		goto out;
 	}
 	if (hwpoison_filter(p)) {
 		if (TestClearPageHWPoison(p))
 		inc_zone_page_state(page, NR_ISOLATED_ANON +
 					page_is_file_cache(page));
 		list_add(&page->lru, &pagelist);
+		if (!TestSetPageHWPoison(page))
+			atomic_long_inc(&num_poisoned_pages);
 		ret = migrate_pages(&pagelist, new_page, NULL, MPOL_MF_MOVE_ALL,
 					MIGRATE_SYNC, MR_MEMORY_FAILURE);
 		if (ret) {
 				pfn, ret, page->flags);
 			if (ret > 0)
 				ret = -EIO;
-		} else {
+			if (TestClearPageHWPoison(page))
-			SetPageHWPoison(page);
+				atomic_long_dec(&num_poisoned_pages);
-			atomic_long_inc(&num_poisoned_pages);
 		}
 	} else {
 		pr_info("soft offline: %#lx: isolation failed: %d, page count %d, type %lx\n",

mm/memory_hotplug.c+9−1

 	int nr_pages = PAGES_PER_SECTION;
 	int nid = pgdat->node_id;
 	int zone_type;
-	unsigned long flags;
+	unsigned long flags, pfn;
 	int ret;
 	zone_type = zone - pgdat->node_zones;
 	pgdat_resize_unlock(zone->zone_pgdat, &flags);
 	memmap_init_zone(nr_pages, nid, zone_type,
 			 phys_start_pfn, MEMMAP_HOTPLUG);
+	/* online_page_range is called later and expects pages reserved */
+	for (pfn = phys_start_pfn; pfn < phys_start_pfn + nr_pages; pfn++) {
+		if (!pfn_valid(pfn))
+			continue;
+		SetPageReserved(pfn_to_page(pfn));
+	}
 	return 0;
 }

mm/migrate.c+6−2

 	/* Establish migration ptes or remove ptes */
 	if (page_mapped(page)) {
 		try_to_unmap(page,
-			TTU_MIGRATION|TTU_IGNORE_MLOCK|TTU_IGNORE_ACCESS);
+			TTU_MIGRATION|TTU_IGNORE_MLOCK|TTU_IGNORE_ACCESS|
+			TTU_IGNORE_HWPOISON);
 		page_was_mapped = 1;
 	}
 		list_del(&page->lru);
 		dec_zone_page_state(page, NR_ISOLATED_ANON +
 				page_is_file_cache(page));
-		if (reason != MR_MEMORY_FAILURE)
+		/* Soft-offlined page shouldn't go through lru cache list */
+		if (reason == MR_MEMORY_FAILURE)
+			put_page(page);
+		else
 			putback_lru_page(page);
 	}

mm/page-writeback.c+2−2

  */
 void __init page_writeback_init(void)
 {
+	BUG_ON(wb_domain_init(&global_wb_domain, GFP_KERNEL));
 	writeback_set_ratelimit();
 	register_cpu_notifier(&ratelimit_nb);
-	BUG_ON(wb_domain_init(&global_wb_domain, GFP_KERNEL));
 }
 /**

mm/page_alloc.c+30−15

@@ -18,7 +18,6 @@ · 17 unmodified lines
18	#include <linux/mm.h>	18	#include <linux/mm.h>
19	#include <linux/swap.h>	19	#include <linux/swap.h>
20	#include <linux/interrupt.h>	20	#include <linux/interrupt.h>
21	#include <linux/rwsem.h>
22	#include <linux/pagemap.h>	21	#include <linux/pagemap.h>
23	#include <linux/jiffies.h>	22	#include <linux/jiffies.h>
24	#include <linux/bootmem.h>	23	#include <linux/bootmem.h>
@@ -981,21 +980,21 @@ static void __init __free_pages_boot_core(struct page *page, · 956 unmodified lines
981		980
982	#if defined(CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID) \|\| \	981	#if defined(CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID) \|\| \
983	defined(CONFIG_HAVE_MEMBLOCK_NODE_MAP)	982	defined(CONFIG_HAVE_MEMBLOCK_NODE_MAP)
984	/* Only safe to use early in boot when initialisation is single-threaded */	983
985	static struct mminit_pfnnid_cache early_pfnnid_cache __meminitdata;	984	static struct mminit_pfnnid_cache early_pfnnid_cache __meminitdata;
986		985
987	int __meminit early_pfn_to_nid(unsigned long pfn)	986	int __meminit early_pfn_to_nid(unsigned long pfn)
988	{	987	{
		988	static DEFINE_SPINLOCK(early_pfn_lock);
989	int nid;	989	int nid;
990		990
991	/* The system will behave unpredictably otherwise */	991	spin_lock(&early_pfn_lock);
992	BUG_ON(system_state != SYSTEM_BOOTING);
993
994	nid = __early_pfn_to_nid(pfn, &early_pfnnid_cache);	992	nid = __early_pfn_to_nid(pfn, &early_pfnnid_cache);
995	if (nid >= 0)	993	if (nid < 0)
996	return nid;	994	nid = 0;
997	/* just returns 0 */	995	spin_unlock(&early_pfn_lock);
998	return 0;	996
		997	return nid;
999	}	998	}
1000	#endif	999	#endif
1001		1000
@@ -1060,7 +1059,15 @@ static void __init deferred_free_range(struct page *page, · 58 unmodified lines
1060	__free_pages_boot_core(page, pfn, 0);	1059	__free_pages_boot_core(page, pfn, 0);
1061	}	1060	}
1062		1061
1063	static __initdata DECLARE_RWSEM(pgdat_init_rwsem);	1062	/* Completion tracking for deferred_init_memmap() threads */
		1063	static atomic_t pgdat_init_n_undone __initdata;
		1064	static __initdata DECLARE_COMPLETION(pgdat_init_all_done_comp);
		1065
		1066	static inline void __init pgdat_init_report_one_done(void)
		1067	{
		1068	if (atomic_dec_and_test(&pgdat_init_n_undone))
		1069	complete(&pgdat_init_all_done_comp);
		1070	}
1064		1071
1065	/* Initialise remaining memory on a node */	1072	/* Initialise remaining memory on a node */
1066	static int __init deferred_init_memmap(void *data)	1073	static int __init deferred_init_memmap(void *data)
@@ -1077,7 +1084,7 @@ static int __init deferred_init_memmap(void *data) · 10 unmodified lines
1077	const struct cpumask *cpumask = cpumask_of_node(pgdat->node_id);	1084	const struct cpumask *cpumask = cpumask_of_node(pgdat->node_id);
1078		1085
1079	if (first_init_pfn == ULONG_MAX) {	1086	if (first_init_pfn == ULONG_MAX) {
1080	up_read(&pgdat_init_rwsem);	1087	pgdat_init_report_one_done();
1081	return 0;	1088	return 0;
1082	}	1089	}
1083		1090
@@ -1177,7 +1184,8 @@ free_range: · 93 unmodified lines
1177		1184
1178	pr_info("node %d initialised, %lu pages in %ums\n", nid, nr_pages,	1185	pr_info("node %d initialised, %lu pages in %ums\n", nid, nr_pages,
1179	jiffies_to_msecs(jiffies - start));	1186	jiffies_to_msecs(jiffies - start));
1180	up_read(&pgdat_init_rwsem);	1187
		1188	pgdat_init_report_one_done();
1181	return 0;	1189	return 0;
1182	}	1190	}
1183		1191
@@ -1185,14 +1193,17 @@ void __init page_alloc_init_late(void) · 1 unmodified line
1185	{	1193	{
1186	int nid;	1194	int nid;
1187		1195
		1196	/* There will be num_node_state(N_MEMORY) threads */
		1197	atomic_set(&pgdat_init_n_undone, num_node_state(N_MEMORY));
1188	for_each_node_state(nid, N_MEMORY) {	1198	for_each_node_state(nid, N_MEMORY) {
1189	down_read(&pgdat_init_rwsem);
1190	kthread_run(deferred_init_memmap, NODE_DATA(nid), "pgdatinit%d", nid);	1199	kthread_run(deferred_init_memmap, NODE_DATA(nid), "pgdatinit%d", nid);
1191	}	1200	}
1192		1201
1193	/* Block until all are initialised */	1202	/* Block until all are initialised */
1194	down_write(&pgdat_init_rwsem);	1203	wait_for_completion(&pgdat_init_all_done_comp);
1195	up_write(&pgdat_init_rwsem);	1204
		1205	/* Reinit limits that are based on free pages after the kernel is up */
		1206	files_maxfiles_init();
1196	}	1207	}
1197	#endif /* CONFIG_DEFERRED_STRUCT_PAGE_INIT */	1208	#endif /* CONFIG_DEFERRED_STRUCT_PAGE_INIT */
1198		1209
@@ -1285,6 +1296,10 @@ static inline int check_new_page(struct page *page) · 86 unmodified lines
1285	bad_reason = "non-NULL mapping";	1296	bad_reason = "non-NULL mapping";
1286	if (unlikely(atomic_read(&page->_count) != 0))	1297	if (unlikely(atomic_read(&page->_count) != 0))
1287	bad_reason = "nonzero _count";	1298	bad_reason = "nonzero _count";
		1299	if (unlikely(page->flags & __PG_HWPOISON)) {
		1300	bad_reason = "HWPoisoned (hardware-corrupted)";
		1301	bad_flags = __PG_HWPOISON;
		1302	}
1288	if (unlikely(page->flags & PAGE_FLAGS_CHECK_AT_PREP)) {	1303	if (unlikely(page->flags & PAGE_FLAGS_CHECK_AT_PREP)) {
1289	bad_reason = "PAGE_FLAGS_CHECK_AT_PREP flag set";	1304	bad_reason = "PAGE_FLAGS_CHECK_AT_PREP flag set";
1290	bad_flags = PAGE_FLAGS_CHECK_AT_PREP;	1305	bad_flags = PAGE_FLAGS_CHECK_AT_PREP;

mm/shmem.c+2−2

@@ -3363,8 +3363,8 @@ put_path: · 3362 unmodified lines
3363	* shmem_kernel_file_setup - get an unlinked file living in tmpfs which must be	3363	* shmem_kernel_file_setup - get an unlinked file living in tmpfs which must be
3364	* kernel internal. There will be NO LSM permission checks against the	3364	* kernel internal. There will be NO LSM permission checks against the
3365	* underlying inode. So users of this interface must do LSM checks at a	3365	* underlying inode. So users of this interface must do LSM checks at a
3366	* higher layer. The one user is the big_key implementation. LSM checks	3366	* higher layer. The users are the big_key and shm implementations. LSM
3367	* are provided at the key level rather than the inode level.	3367	* checks are provided at the key or shm level rather than the inode.
3368	* @name: name for dentry (to be seen in /proc/<pid>/maps	3368	* @name: name for dentry (to be seen in /proc/<pid>/maps
3369	* @size: size to be set for the file	3369	* @size: size to be set for the file
3370	* @flags: VM_NORESERVE suppresses pre-accounting of the entire object size	3370	* @flags: VM_NORESERVE suppresses pre-accounting of the entire object size

mm/slab_common.c+1−2

@@ -37,8 +37,7 @@ struct kmem_cache *kmem_cache; · 36 unmodified lines
37	SLAB_TRACE \| SLAB_DESTROY_BY_RCU \| SLAB_NOLEAKTRACE \| \	37	SLAB_TRACE \| SLAB_DESTROY_BY_RCU \| SLAB_NOLEAKTRACE \| \
38	SLAB_FAILSLAB)	38	SLAB_FAILSLAB)
39		39
40	#define SLAB_MERGE_SAME (SLAB_DEBUG_FREE \| SLAB_RECLAIM_ACCOUNT \| \	40	#define SLAB_MERGE_SAME (SLAB_RECLAIM_ACCOUNT \| SLAB_CACHE_DMA \| SLAB_NOTRACK)
41	SLAB_CACHE_DMA \| SLAB_NOTRACK)
42		41
43	/*	42	/*
44	* Merge control. If this is set then no merging of slab caches will occur.	43	* Merge control. If this is set then no merging of slab caches will occur.

mm/vmscan.c+6−10

 		 *    caller can stall after page list has been processed.
 		 *
 		 * 2) Global or new memcg reclaim encounters a page that is
-		 *    not marked for immediate reclaim or the caller does not
+		 *    not marked for immediate reclaim, or the caller does not
-		 *    have __GFP_IO. In this case mark the page for immediate
+		 *    have __GFP_FS (or __GFP_IO if it's simply going to swap,
+		 *    not to fs). In this case mark the page for immediate
 		 *    reclaim and continue scanning.
 		 *
-		 *    __GFP_IO is checked  because a loop driver thread might
+		 *    Require may_enter_fs because we would wait on fs, which
+		 *    may not have submitted IO yet. And the loop driver might
 		 *    enter reclaim, and deadlock if it waits on a page for
 		 *    which it is needed to do the write (loop masks off
 		 *    __GFP_IO|__GFP_FS for this reason); but more thought
 		 *    would probably show more reasons.
 		 *
-		 *    Don't require __GFP_FS, since we're not going into the
-		 *    FS, just waiting on its writeback completion. Worryingly,
-		 *    ext4 gfs2 and xfs allocate pages with
-		 *    grab_cache_page_write_begin(,,AOP_FLAG_NOFS), so testing
-		 *    may_enter_fs here is liable to OOM on them.
-		 *
 		 * 3) Legacy memcg encounters a page that is not already marked
 		 *    PageReclaim. memcg does not have any dirty pages
 		 *    throttling so we could easily OOM just because too many
 			/* Case 2 above */
 			} else if (sane_reclaim(sc) ||
-			    !PageReclaim(page) || !(sc->gfp_mask & __GFP_IO)) {
+			    !PageReclaim(page) || !may_enter_fs) {
 				/*
 				 * This is slightly racy - end_page_writeback()
 				 * might have just cleared PageReclaim, then

net/batman-adv/distributed-arp-table.c+13−5

  * @bat_priv: the bat priv with all the soft interface information
  * @skb: packet to check
  * @hdr_size: size of the encapsulation header
+ *
+ * Returns true if the packet was snooped and consumed by DAT. False if the
+ * packet has to be delivered to the interface
  */
 bool batadv_dat_snoop_incoming_arp_reply(struct batadv_priv *bat_priv,
 					 struct sk_buff *skb, int hdr_size)
 	uint16_t type;
 	__be32 ip_src, ip_dst;
 	uint8_t *hw_src, *hw_dst;
-	bool ret = false;
+	bool dropped = false;
 	unsigned short vid;
 	if (!atomic_read(&bat_priv->distributed_arp_table))
 	/* if this REPLY is directed to a client of mine, let's deliver the
 	 * packet to the interface
 	 */
-	ret = !batadv_is_my_client(bat_priv, hw_dst, vid);
+	dropped = !batadv_is_my_client(bat_priv, hw_dst, vid);
+	/* if this REPLY is sent on behalf of a client of mine, let's drop the
+	 * packet because the client will reply by itself
+	 */
+	dropped |= batadv_is_my_client(bat_priv, hw_src, vid);
 out:
-	if (ret)
+	if (dropped)
 		kfree_skb(skb);
-	/* if ret == false -> packet has to be delivered to the interface */
+	/* if dropped == false -> deliver to the interface */
-	return ret;
+	return dropped;
 }
 /**

net/batman-adv/gateway_client.c+2−0

@@ -439,6 +439,8 @@ static void batadv_gw_node_add(struct batadv_priv *bat_priv, · 438 unmodified lines
439		439
440	INIT_HLIST_NODE(&gw_node->list);	440	INIT_HLIST_NODE(&gw_node->list);
441	gw_node->orig_node = orig_node;	441	gw_node->orig_node = orig_node;
		442	gw_node->bandwidth_down = ntohl(gateway->bandwidth_down);
		443	gw_node->bandwidth_up = ntohl(gateway->bandwidth_up);
442	atomic_set(&gw_node->refcount, 1);	444	atomic_set(&gw_node->refcount, 1);
443		445
444	spin_lock_bh(&bat_priv->gw.list_lock);	446	spin_lock_bh(&bat_priv->gw.list_lock);

net/batman-adv/soft-interface.c+3−0

  */
 void batadv_softif_vlan_free_ref(struct batadv_softif_vlan *vlan)
 {
+	if (!vlan)
+		return;
 	if (atomic_dec_and_test(&vlan->refcount)) {
 		spin_lock_bh(&vlan->bat_priv->softif_vlan_list_lock);
 		hlist_del_rcu(&vlan->list);

net/batman-adv/translation-table.c+24−5

@@ -594,6 +594,9 @@ bool batadv_tt_local_add(struct net_device soft_iface, const uint8_t addr, · 593 unmodified lines
594		594
595	/* increase the refcounter of the related vlan */	595	/* increase the refcounter of the related vlan */
596	vlan = batadv_softif_vlan_get(bat_priv, vid);	596	vlan = batadv_softif_vlan_get(bat_priv, vid);
		597	if (WARN(!vlan, "adding TT local entry %pM to non-existent VLAN %d",
		598	addr, BATADV_PRINT_VID(vid)))
		599	goto out;
597		600
598	batadv_dbg(BATADV_DBG_TT, bat_priv,	601	batadv_dbg(BATADV_DBG_TT, bat_priv,
599	"Creating new local tt entry: %pM (vid: %d, ttvn: %d)\n",	602	"Creating new local tt entry: %pM (vid: %d, ttvn: %d)\n",
@@ -1034,6 +1037,7 @@ uint16_t batadv_tt_local_remove(struct batadv_priv *bat_priv, · 434 unmodified lines
1034	struct batadv_tt_local_entry *tt_local_entry;	1037	struct batadv_tt_local_entry *tt_local_entry;
1035	uint16_t flags, curr_flags = BATADV_NO_FLAGS;	1038	uint16_t flags, curr_flags = BATADV_NO_FLAGS;
1036	struct batadv_softif_vlan *vlan;	1039	struct batadv_softif_vlan *vlan;
		1040	void *tt_entry_exists;
1037		1041
1038	tt_local_entry = batadv_tt_local_hash_find(bat_priv, addr, vid);	1042	tt_local_entry = batadv_tt_local_hash_find(bat_priv, addr, vid);
1039	if (!tt_local_entry)	1043	if (!tt_local_entry)
@@ -1061,11 +1065,22 @@ uint16_t batadv_tt_local_remove(struct batadv_priv *bat_priv, · 21 unmodified lines
1061	* immediately purge it	1065	* immediately purge it
1062	*/	1066	*/
1063	batadv_tt_local_event(bat_priv, tt_local_entry, BATADV_TT_CLIENT_DEL);	1067	batadv_tt_local_event(bat_priv, tt_local_entry, BATADV_TT_CLIENT_DEL);
1064	hlist_del_rcu(&tt_local_entry->common.hash_entry);	1068
		1069	tt_entry_exists = batadv_hash_remove(bat_priv->tt.local_hash,
		1070	batadv_compare_tt,
		1071	batadv_choose_tt,
		1072	&tt_local_entry->common);
		1073	if (!tt_entry_exists)
		1074	goto out;
		1075
		1076	/* extra call to free the local tt entry */
1065	batadv_tt_local_entry_free_ref(tt_local_entry);	1077	batadv_tt_local_entry_free_ref(tt_local_entry);
1066		1078
1067	/* decrease the reference held for this vlan */	1079	/* decrease the reference held for this vlan */
1068	vlan = batadv_softif_vlan_get(bat_priv, vid);	1080	vlan = batadv_softif_vlan_get(bat_priv, vid);
		1081	if (!vlan)
		1082	goto out;
		1083
1069	batadv_softif_vlan_free_ref(vlan);	1084	batadv_softif_vlan_free_ref(vlan);
1070	batadv_softif_vlan_free_ref(vlan);	1085	batadv_softif_vlan_free_ref(vlan);
1071		1086
@@ -1166,8 +1181,10 @@ static void batadv_tt_local_table_free(struct batadv_priv *bat_priv) · 94 unmodified lines
1166	/* decrease the reference held for this vlan */	1181	/* decrease the reference held for this vlan */
1167	vlan = batadv_softif_vlan_get(bat_priv,	1182	vlan = batadv_softif_vlan_get(bat_priv,
1168	tt_common_entry->vid);	1183	tt_common_entry->vid);
1169	batadv_softif_vlan_free_ref(vlan);	1184	if (vlan) {
1170	batadv_softif_vlan_free_ref(vlan);	1185	batadv_softif_vlan_free_ref(vlan);
		1186	batadv_softif_vlan_free_ref(vlan);
		1187	}
1171		1188
1172	batadv_tt_local_entry_free_ref(tt_local);	1189	batadv_tt_local_entry_free_ref(tt_local);
1173	}	1190	}
@@ -3207,8 +3224,10 @@ static void batadv_tt_local_purge_pending_clients(struct batadv_priv *bat_priv) · 2033 unmodified lines
3207		3224
3208	/* decrease the reference held for this vlan */	3225	/* decrease the reference held for this vlan */
3209	vlan = batadv_softif_vlan_get(bat_priv, tt_common->vid);	3226	vlan = batadv_softif_vlan_get(bat_priv, tt_common->vid);
3210	batadv_softif_vlan_free_ref(vlan);	3227	if (vlan) {
3211	batadv_softif_vlan_free_ref(vlan);	3228	batadv_softif_vlan_free_ref(vlan);
		3229	batadv_softif_vlan_free_ref(vlan);
		3230	}
3212		3231
3213	batadv_tt_local_entry_free_ref(tt_local);	3232	batadv_tt_local_entry_free_ref(tt_local);
3214	}	3233	}

net/bluetooth/mgmt.c+1−1

@@ -7843,7 +7843,7 @@ void mgmt_new_ltk(struct hci_dev hdev, struct smp_ltk key, bool persistent) · 7842 unmodified lines
7843	/* Make sure we copy only the significant bytes based on the	7843	/* Make sure we copy only the significant bytes based on the
7844	* encryption key size, and set the rest of the value to zeroes.	7844	* encryption key size, and set the rest of the value to zeroes.
7845	*/	7845	*/
7846	memcpy(ev.key.val, key->val, sizeof(key->enc_size));	7846	memcpy(ev.key.val, key->val, key->enc_size);
7847	memset(ev.key.val + key->enc_size, 0,	7847	memset(ev.key.val + key->enc_size, 0,
7848	sizeof(ev.key.val) - key->enc_size);	7848	sizeof(ev.key.val) - key->enc_size);
7849		7849

net/bridge/br_netlink.c+4−0

 		+ nla_total_size(1)	/* IFLA_BRPORT_FAST_LEAVE */
 		+ nla_total_size(1)	/* IFLA_BRPORT_LEARNING */
 		+ nla_total_size(1)	/* IFLA_BRPORT_UNICAST_FLOOD */
+		+ nla_total_size(1)	/* IFLA_BRPORT_PROXYARP */
+		+ nla_total_size(1)	/* IFLA_BRPORT_PROXYARP_WIFI */
 		+ 0;
 }
 	[IFLA_BRPORT_FAST_LEAVE]= { .type = NLA_U8 },
 	[IFLA_BRPORT_LEARNING]	= { .type = NLA_U8 },
 	[IFLA_BRPORT_UNICAST_FLOOD] = { .type = NLA_U8 },
+	[IFLA_BRPORT_PROXYARP]	= { .type = NLA_U8 },
+	[IFLA_BRPORT_PROXYARP_WIFI] = { .type = NLA_U8 },
 };
 /* Change the state of the port and notify spanning tree */

net/core/datagram.c+7−6

 	goto out;
 }
-static int skb_set_peeked(struct sk_buff *skb)
+static struct sk_buff *skb_set_peeked(struct sk_buff *skb)
 {
 	struct sk_buff *nskb;
 	if (skb->peeked)
-		return 0;
+		return skb;
 	/* We have to unshare an skb before modifying it. */
 	if (!skb_shared(skb))
 	nskb = skb_clone(skb, GFP_ATOMIC);
 	if (!nskb)
-		return -ENOMEM;
+		return ERR_PTR(-ENOMEM);
 	skb->prev->next = nskb;
 	skb->next->prev = nskb;
 done:
 	skb->peeked = 1;
-	return 0;
+	return skb;
 }
 /**
 					continue;
 				}
-				error = skb_set_peeked(skb);
+				skb = skb_set_peeked(skb);
-				if (error)
+				error = PTR_ERR(skb);
+				if (IS_ERR(skb))
 					goto unlock_err;
 				atomic_inc(&skb->users);

net/core/pktgen.c+0−3

 	set_freezable();
-	__set_current_state(TASK_RUNNING);
 	while (!kthread_should_stop()) {
 		pkt_dev = next_to_run(t);
 		try_to_freeze();
 	}
-	set_current_state(TASK_INTERRUPTIBLE);
 	pr_debug("%s stopping all device\n", t->tsk->comm);
 	pktgen_stop(t);

net/core/request_sock.c+7−1

 			spin_lock_bh(&queue->syn_wait_lock);
 			while ((req = lopt->syn_table[i]) != NULL) {
 				lopt->syn_table[i] = req->dl_next;
+				/* Because of following del_timer_sync(),
+				 * we must release the spinlock here
+				 * or risk a dead lock.
+				 */
+				spin_unlock_bh(&queue->syn_wait_lock);
 				atomic_inc(&lopt->qlen_dec);
-				if (del_timer(&req->rsk_timer))
+				if (del_timer_sync(&req->rsk_timer))
 					reqsk_put(req);
 				reqsk_put(req);
+				spin_lock_bh(&queue->syn_wait_lock);
 			}
 			spin_unlock_bh(&queue->syn_wait_lock);
 		}

net/dsa/slave.c+2−1

@@ -856,7 +856,8 @@ static int dsa_slave_phy_connect(struct dsa_slave_priv *p, · 855 unmodified lines
856	return -ENODEV;	856	return -ENODEV;
857		857
858	/* Use already configured phy mode */	858	/* Use already configured phy mode */
859	p->phy_interface = p->phy->interface;	859	if (p->phy_interface == PHY_INTERFACE_MODE_NA)
		860	p->phy_interface = p->phy->interface;
860	phy_connect_direct(slave_dev, p->phy, dsa_slave_adjust_link,	861	phy_connect_direct(slave_dev, p->phy, dsa_slave_adjust_link,
861	p->phy_interface);	862	p->phy_interface);
862		863

net/ipv4/inet_connection_sock.c+1−1

@@ -593,7 +593,7 @@ static bool reqsk_queue_unlink(struct request_sock_queue *queue, · 592 unmodified lines
593	}	593	}
594		594
595	spin_unlock(&queue->syn_wait_lock);	595	spin_unlock(&queue->syn_wait_lock);
596	if (del_timer(&req->rsk_timer))	596	if (del_timer_sync(&req->rsk_timer))
597	reqsk_put(req);	597	reqsk_put(req);
598	return found;	598	return found;
599	}	599	}

net/ipv4/netfilter/ipt_SYNPROXY.c+2−1

@@ -226,7 +226,8 @@ synproxy_send_client_ack(const struct synproxy_net *snet, · 225 unmodified lines
226		226
227	synproxy_build_options(nth, opts);	227	synproxy_build_options(nth, opts);
228		228
229	synproxy_send_tcp(skb, nskb, NULL, 0, niph, nth, tcp_hdr_size);	229	synproxy_send_tcp(skb, nskb, skb->nfct, IP_CT_ESTABLISHED_REPLY,
		230	niph, nth, tcp_hdr_size);
230	}	231	}
231		232
232	static bool	233	static bool

net/ipv4/tcp_ipv4.c+1−1

@@ -1348,7 +1348,7 @@ static struct sock tcp_v4_hnd_req(struct sock sk, struct sk_buff *skb) · 1347 unmodified lines
1348	req = inet_csk_search_req(sk, th->source, iph->saddr, iph->daddr);	1348	req = inet_csk_search_req(sk, th->source, iph->saddr, iph->daddr);
1349	if (req) {	1349	if (req) {
1350	nsk = tcp_check_req(sk, skb, req, false);	1350	nsk = tcp_check_req(sk, skb, req, false);
1351	if (!nsk)	1351	if (!nsk \|\| nsk == sk)
1352	reqsk_put(req);	1352	reqsk_put(req);
1353	return nsk;	1353	return nsk;
1354	}	1354	}

net/ipv4/udp.c+10−3

 	skb->sk = sk;
 	skb->destructor = sock_efree;
-	dst = sk->sk_rx_dst;
+	dst = READ_ONCE(sk->sk_rx_dst);
 	if (dst)
 		dst = dst_check(dst, 0);
-	if (dst)
+	if (dst) {
-		skb_dst_set_noref(skb, dst);
+		/* DST_NOCACHE can not be used without taking a reference */
+		if (dst->flags & DST_NOCACHE) {
+			if (likely(atomic_inc_not_zero(&dst->__refcnt)))
+				skb_dst_set(skb, dst);
+		} else {
+			skb_dst_set_noref(skb, dst);
+		}
+	}
 }
 int udp_rcv(struct sk_buff *skb)

net/ipv6/netfilter/ip6t_SYNPROXY.c+11−8

 }
 static void
-synproxy_send_tcp(const struct sk_buff *skb, struct sk_buff *nskb,
+synproxy_send_tcp(const struct synproxy_net *snet,
+		  const struct sk_buff *skb, struct sk_buff *nskb,
 		  struct nf_conntrack *nfct, enum ip_conntrack_info ctinfo,
 		  struct ipv6hdr *niph, struct tcphdr *nth,
 		  unsigned int tcp_hdr_size)
 {
-	struct net *net = nf_ct_net((struct nf_conn *)nfct);
+	struct net *net = nf_ct_net(snet->tmpl);
 	struct dst_entry *dst;
 	struct flowi6 fl6;
 }
 static void
-synproxy_send_client_synack(const struct sk_buff *skb, const struct tcphdr *th,
+synproxy_send_client_synack(const struct synproxy_net *snet,
+			    const struct sk_buff *skb, const struct tcphdr *th,
 			    const struct synproxy_options *opts)
 {
 	struct sk_buff *nskb;
 	synproxy_build_options(nth, opts);
-	synproxy_send_tcp(skb, nskb, skb->nfct, IP_CT_ESTABLISHED_REPLY,
+	synproxy_send_tcp(snet, skb, nskb, skb->nfct, IP_CT_ESTABLISHED_REPLY,
 			  niph, nth, tcp_hdr_size);
 }
 	synproxy_build_options(nth, opts);
-	synproxy_send_tcp(skb, nskb, &snet->tmpl->ct_general, IP_CT_NEW,
+	synproxy_send_tcp(snet, skb, nskb, &snet->tmpl->ct_general, IP_CT_NEW,
 			  niph, nth, tcp_hdr_size);
 }
 	synproxy_build_options(nth, opts);
-	synproxy_send_tcp(skb, nskb, NULL, 0, niph, nth, tcp_hdr_size);
+	synproxy_send_tcp(snet, skb, nskb, NULL, 0, niph, nth, tcp_hdr_size);
 }
 static void
 	synproxy_build_options(nth, opts);
-	synproxy_send_tcp(skb, nskb, NULL, 0, niph, nth, tcp_hdr_size);
+	synproxy_send_tcp(snet, skb, nskb, skb->nfct, IP_CT_ESTABLISHED_REPLY,
+	                  niph, nth, tcp_hdr_size);
 }
 static bool
 					  XT_SYNPROXY_OPT_SACK_PERM |
 					  XT_SYNPROXY_OPT_ECN);
-		synproxy_send_client_synack(skb, th, &opts);
+		synproxy_send_client_synack(snet, skb, th, &opts);
 		return NF_DROP;
 	} else if (th->ack && !(th->fin || th->rst || th->syn)) {

net/ipv6/route.c+4−2

 		int gwa_type;
 		gw_addr = &cfg->fc_gateway;
+		gwa_type = ipv6_addr_type(gw_addr);
 		/* if gw_addr is local we will fail to detect this in case
 		 * address is still TENTATIVE (DAD in progress). rt6_lookup()
 		 * prefix route was assigned to, which might be non-loopback.
 		 */
 		err = -EINVAL;
-		if (ipv6_chk_addr_and_flags(net, gw_addr, NULL, 0, 0))
+		if (ipv6_chk_addr_and_flags(net, gw_addr,
+					    gwa_type & IPV6_ADDR_LINKLOCAL ?
+					    dev : NULL, 0, 0))
 			goto out;
 		rt->rt6i_gateway = *gw_addr;
-		gwa_type = ipv6_addr_type(gw_addr);
 		if (gwa_type != (IPV6_ADDR_LINKLOCAL|IPV6_ADDR_UNICAST)) {
 			struct rt6_info *grt;

net/ipv6/tcp_ipv6.c+1−1

@@ -943,7 +943,7 @@ static struct sock tcp_v6_hnd_req(struct sock sk, struct sk_buff *skb) · 942 unmodified lines
943	&ipv6_hdr(skb)->daddr, tcp_v6_iif(skb));	943	&ipv6_hdr(skb)->daddr, tcp_v6_iif(skb));
944	if (req) {	944	if (req) {
945	nsk = tcp_check_req(sk, skb, req, false);	945	nsk = tcp_check_req(sk, skb, req, false);
946	if (!nsk)	946	if (!nsk \|\| nsk == sk)
947	reqsk_put(req);	947	reqsk_put(req);
948	return nsk;	948	return nsk;
949	}	949	}

net/netfilter/nf_conntrack_core.c+3−5

 {
 	struct nf_conn *tmpl;
-	tmpl = kzalloc(sizeof(struct nf_conn), GFP_KERNEL);
+	tmpl = kzalloc(sizeof(*tmpl), flags);
 	if (tmpl == NULL)
 		return NULL;
 	if (zone) {
 		struct nf_conntrack_zone *nf_ct_zone;
-		nf_ct_zone = nf_ct_ext_add(tmpl, NF_CT_EXT_ZONE, GFP_ATOMIC);
+		nf_ct_zone = nf_ct_ext_add(tmpl, NF_CT_EXT_ZONE, flags);
 		if (!nf_ct_zone)
 			goto out_free;
 		nf_ct_zone->id = zone;
 	sz = nr_slots * sizeof(struct hlist_nulls_head);
 	hash = (void *)__get_free_pages(GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO,
 					get_order(sz));
-	if (!hash) {
+	if (!hash)
-		printk(KERN_WARNING "nf_conntrack: falling back to vmalloc.\n");
 		hash = vzalloc(sz);
-	}
 	if (hash && nulls)
 		for (i = 0; i < nr_slots; i++)

net/netfilter/nf_synproxy_core.c+1−3

 	int err = -ENOMEM;
 	ct = nf_ct_tmpl_alloc(net, 0, GFP_KERNEL);
-	if (IS_ERR(ct)) {
+	if (!ct)
-		err = PTR_ERR(ct);
 		goto err1;
-	}
 	if (!nfct_seqadj_ext_add(ct))
 		goto err2;

net/netfilter/xt_CT.c+3−2

 		goto err1;
 	ct = nf_ct_tmpl_alloc(par->net, info->zone, GFP_KERNEL);
-	ret = PTR_ERR(ct);
+	if (!ct) {
-	if (IS_ERR(ct))
+		ret = -ENOMEM;
 		goto err2;
+	}
 	ret = 0;
 	if ((info->ct_events || info->exp_events) &&

net/netlink/af_netlink.c+5−0

 	err = __netlink_insert(table, sk);
 	if (err) {
+		/* In case the hashtable backend returns with -EBUSY
+		 * from here, it must not escape to the caller.
+		 */
+		if (unlikely(err == -EBUSY))
+			err = -EOVERFLOW;
 		if (err == -EEXIST)
 			err = -EADDRINUSE;
 		nlk_sk(sk)->portid = 0;

net/openvswitch/actions.c+12−4

 	return 0;
 }
-static void set_ip_addr(struct sk_buff *skb, struct iphdr *nh,
+static void update_ip_l4_checksum(struct sk_buff *skb, struct iphdr *nh,
-			__be32 *addr, __be32 new_addr)
+				  __be32 addr, __be32 new_addr)
 {
 	int transport_len = skb->len - skb_transport_offset(skb);
+	if (nh->frag_off & htons(IP_OFFSET))
+		return;
 	if (nh->protocol == IPPROTO_TCP) {
 		if (likely(transport_len >= sizeof(struct tcphdr)))
 			inet_proto_csum_replace4(&tcp_hdr(skb)->check, skb,
-						 *addr, new_addr, 1);
+						 addr, new_addr, 1);
 	} else if (nh->protocol == IPPROTO_UDP) {
 		if (likely(transport_len >= sizeof(struct udphdr))) {
 			struct udphdr *uh = udp_hdr(skb);
 			if (uh->check || skb->ip_summed == CHECKSUM_PARTIAL) {
 				inet_proto_csum_replace4(&uh->check, skb,
-							 *addr, new_addr, 1);
+							 addr, new_addr, 1);
 				if (!uh->check)
 					uh->check = CSUM_MANGLED_0;
 			}
 		}
 	}
+}
+static void set_ip_addr(struct sk_buff *skb, struct iphdr *nh,
+			__be32 *addr, __be32 new_addr)
+{
+	update_ip_l4_checksum(skb, nh, *addr, new_addr);
 	csum_replace4(&nh->check, *addr, new_addr);
 	skb_clear_hash(skb);
 	*addr = new_addr;

net/rds/info.c+1−1

@@ -176,7 +176,7 @@ int rds_info_getsockopt(struct socket sock, int optname, char __user optval, · 175 unmodified lines
176		176
177	/* check for all kinds of wrapping and the like */	177	/* check for all kinds of wrapping and the like */
178	start = (unsigned long)optval;	178	start = (unsigned long)optval;
179	if (len < 0 \|\| len + PAGE_SIZE - 1 < len \|\| start + len < start) {	179	if (len < 0 \|\| len > INT_MAX - PAGE_SIZE + 1 \|\| start + len < start) {
180	ret = -EINVAL;	180	ret = -EINVAL;
181	goto out;	181	goto out;
182	}	182	}

net/sched/act_mirred.c+2−0

 			return ret;
 		ret = ACT_P_CREATED;
 	} else {
+		if (bind)
+			return 0;
 		if (!ovr) {
 			tcf_hash_release(a, bind);
 			return -EEXIST;

net/sched/sch_fq_codel.c+19−3

@@ -288,10 +288,26 @@ begin: · 287 unmodified lines
288		288
289	static void fq_codel_reset(struct Qdisc *sch)	289	static void fq_codel_reset(struct Qdisc *sch)
290	{	290	{
291	struct sk_buff *skb;	291	struct fq_codel_sched_data *q = qdisc_priv(sch);
		292	int i;
292		293
293	while ((skb = fq_codel_dequeue(sch)) != NULL)	294	INIT_LIST_HEAD(&q->new_flows);
294	kfree_skb(skb);	295	INIT_LIST_HEAD(&q->old_flows);
		296	for (i = 0; i < q->flows_cnt; i++) {
		297	struct fq_codel_flow *flow = q->flows + i;
		298
		299	while (flow->head) {
		300	struct sk_buff *skb = dequeue_head(flow);
		301
		302	qdisc_qstats_backlog_dec(sch, skb);
		303	kfree_skb(skb);
		304	}
		305
		306	INIT_LIST_HEAD(&flow->flowchain);
		307	codel_vars_init(&flow->cvars);
		308	}
		309	memset(q->backlogs, 0, q->flows_cnt * sizeof(u32));
		310	sch->q.qlen = 0;
295	}	311	}
296		312
297	static const struct nla_policy fq_codel_policy[TCA_FQ_CODEL_MAX + 1] = {	313	static const struct nla_policy fq_codel_policy[TCA_FQ_CODEL_MAX + 1] = {

scripts/kconfig/streamline_config.pl+1−1

@@ -137,7 +137,7 @@ my $ksource = ($ARGV[0] ? $ARGV[0] : '.'); · 136 unmodified lines
137	my $kconfig = $ARGV[1];	137	my $kconfig = $ARGV[1];
138	my $lsmod_file = $ENV{'LSMOD'};	138	my $lsmod_file = $ENV{'LSMOD'};
139		139
140	my @makefiles = `find $ksource -name Makefile 2>/dev/null`;	140	my @makefiles = `find $ksource -name Makefile -or -name Kbuild 2>/dev/null`;
141	chomp @makefiles;	141	chomp @makefiles;
142		142
143	my %depends;	143	my %depends;

security/yama/yama_lsm.c+1−0

@@ -406,6 +406,7 @@ static __init int yama_init(void) · 405 unmodified lines
406	*/	406	*/
407	if (!security_module_enable("yama"))	407	if (!security_module_enable("yama"))
408	return 0;	408	return 0;
		409	yama_add_hooks();
409	#endif	410	#endif
410	pr_info("Yama: becoming mindful.\n");	411	pr_info("Yama: becoming mindful.\n");
411		412

sound/firewire/amdtp.c+3−2

 	    s->data_block_counter != UINT_MAX)
 		data_block_counter = s->data_block_counter;
-	if (((s->flags & CIP_SKIP_DBC_ZERO_CHECK) && data_block_counter == 0) ||
+	if (((s->flags & CIP_SKIP_DBC_ZERO_CHECK) &&
-	    (s->data_block_counter == UINT_MAX)) {
+	     data_block_counter == s->tx_first_dbc) ||
+	    s->data_block_counter == UINT_MAX) {
 		lost = false;
 	} else if (!(s->flags & CIP_DBC_IS_END_EVENT)) {
 		lost = data_block_counter != s->data_block_counter;

sound/firewire/amdtp.h+2−0

@@ -157,6 +157,8 @@ struct amdtp_stream { · 156 unmodified lines
157		157
158	/* quirk: fixed interval of dbc between previos/current packets. */	158	/* quirk: fixed interval of dbc between previos/current packets. */
159	unsigned int tx_dbc_interval;	159	unsigned int tx_dbc_interval;
		160	/* quirk: indicate the value of dbc field in a first packet. */
		161	unsigned int tx_first_dbc;
160		162
161	bool callbacked;	163	bool callbacked;
162	wait_queue_head_t callback_wait;	164	wait_queue_head_t callback_wait;

sound/firewire/fireworks/fireworks.c+8−2

 	err = get_hardware_info(efw);
 	if (err < 0)
 		goto error;
-	if (entry->model_id == MODEL_ECHO_AUDIOFIRE_2)
+	/* AudioFire8 (since 2009) and AudioFirePre8 */
-		efw->is_af2 = true;
 	if (entry->model_id == MODEL_ECHO_AUDIOFIRE_9)
 		efw->is_af9 = true;
+	/* These models uses the same firmware. */
+	if (entry->model_id == MODEL_ECHO_AUDIOFIRE_2 ||
+	    entry->model_id == MODEL_ECHO_AUDIOFIRE_4 ||
+	    entry->model_id == MODEL_ECHO_AUDIOFIRE_9 ||
+	    entry->model_id == MODEL_GIBSON_RIP ||
+	    entry->model_id == MODEL_GIBSON_GOLDTOP)
+		efw->is_fireworks3 = true;
 	snd_efw_proc_init(efw);

sound/firewire/fireworks/fireworks.h+1−1

@@ -70,8 +70,8 @@ struct snd_efw { · 69 unmodified lines
70	bool resp_addr_changable;	70	bool resp_addr_changable;
71		71
72	/* for quirks */	72	/* for quirks */
73	bool is_af2;
74	bool is_af9;	73	bool is_af9;
		74	bool is_fireworks3;
75	u32 firmware_version;	75	u32 firmware_version;
76		76
77	unsigned int midi_in_ports;	77	unsigned int midi_in_ports;

sound/firewire/fireworks/fireworks_stream.c+9−3

 	efw->tx_stream.flags |= CIP_DBC_IS_END_EVENT;
 	/* Fireworks reset dbc at bus reset. */
 	efw->tx_stream.flags |= CIP_SKIP_DBC_ZERO_CHECK;
-	/* AudioFire2 starts packets with non-zero dbc. */
+	/*
-	if (efw->is_af2)
+	 * But Recent firmwares starts packets with non-zero dbc.
-		efw->tx_stream.flags |= CIP_SKIP_INIT_DBC_CHECK;
+	 * Driver version 5.7.6 installs firmware version 5.7.3.
+	 */
+	if (efw->is_fireworks3 &&
+	    (efw->firmware_version == 0x5070000 ||
+	     efw->firmware_version == 0x5070300 ||
+	     efw->firmware_version == 0x5080000))
+		efw->tx_stream.tx_first_dbc = 0x02;
 	/* AudioFire9 always reports wrong dbs. */
 	if (efw->is_af9)
 		efw->tx_stream.flags |= CIP_WRONG_DBS;

sound/hda/ext/hdac_ext_controller.c+0−6

 	offset = snd_hdac_chip_readl(bus, LLCH);
-	if (offset < 0)
-		return -EIO;
 	/* Lets walk the linked capabilities list */
 	do {
 		cur_cap = _snd_hdac_chip_read(l, bus, offset);
-		if (cur_cap < 0)
-			return -EIO;
 		dev_dbg(bus->dev, "Capability version: 0x%x\n",
 				((cur_cap & AZX_CAP_HDR_VER_MASK) >> AZX_CAP_HDR_VER_OFF));

sound/hda/ext/hdac_ext_stream.c+1−1

@@ -299,7 +299,7 @@ hdac_ext_host_stream_assign(struct hdac_ext_bus *ebus, · 298 unmodified lines
299	if (stream->direction != substream->stream)	299	if (stream->direction != substream->stream)
300	continue;	300	continue;
301		301
302	if (stream->opened) {	302	if (!stream->opened) {
303	if (!hstream->decoupled)	303	if (!hstream->decoupled)
304	snd_hdac_ext_stream_decouple(ebus, hstream, true);	304	snd_hdac_ext_stream_decouple(ebus, hstream, true);
305	res = hstream;	305	res = hstream;

sound/pci/hda/patch_realtek.c+1−0

@@ -5189,6 +5189,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 5188 unmodified lines
5189	SND_PCI_QUIRK(0x1028, 0x06c7, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),	5189	SND_PCI_QUIRK(0x1028, 0x06c7, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
5190	SND_PCI_QUIRK(0x1028, 0x06d9, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),	5190	SND_PCI_QUIRK(0x1028, 0x06d9, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
5191	SND_PCI_QUIRK(0x1028, 0x06da, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),	5191	SND_PCI_QUIRK(0x1028, 0x06da, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
		5192	SND_PCI_QUIRK(0x1028, 0x06de, "Dell", ALC292_FIXUP_DISABLE_AAMIX),
5192	SND_PCI_QUIRK(0x1028, 0x164a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),	5193	SND_PCI_QUIRK(0x1028, 0x164a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
5193	SND_PCI_QUIRK(0x1028, 0x164b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),	5194	SND_PCI_QUIRK(0x1028, 0x164b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
5194	SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2),	5195	SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2),

sound/pci/oxygen/oxygen_mixer.c+1−1

@@ -88,7 +88,7 @@ static int dac_mute_put(struct snd_kcontrol *ctl, · 87 unmodified lines
88	int changed;	88	int changed;
89		89
90	mutex_lock(&chip->mutex);	90	mutex_lock(&chip->mutex);
91	changed = !value->value.integer.value[0] != chip->dac_mute;	91	changed = (!value->value.integer.value[0]) != chip->dac_mute;
92	if (changed) {	92	if (changed) {
93	chip->dac_mute = !value->value.integer.value[0];	93	chip->dac_mute = !value->value.integer.value[0];
94	chip->model.update_dac_mute(chip);	94	chip->model.update_dac_mute(chip);

sound/soc/codecs/cs4265.c+5−5

@@ -457,14 +457,14 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream, · 456 unmodified lines
457	case SND_SOC_DAIFMT_RIGHT_J:	457	case SND_SOC_DAIFMT_RIGHT_J:
458	if (params_width(params) == 16) {	458	if (params_width(params) == 16) {
459	snd_soc_update_bits(codec, CS4265_DAC_CTL,	459	snd_soc_update_bits(codec, CS4265_DAC_CTL,
460	CS4265_DAC_CTL_DIF, (1 << 5));	460	CS4265_DAC_CTL_DIF, (2 << 4));
461	snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,	461	snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
462	CS4265_SPDIF_CTL2_DIF, (1 << 7));	462	CS4265_SPDIF_CTL2_DIF, (2 << 6));
463	} else {	463	} else {
464	snd_soc_update_bits(codec, CS4265_DAC_CTL,	464	snd_soc_update_bits(codec, CS4265_DAC_CTL,
465	CS4265_DAC_CTL_DIF, (3 << 5));	465	CS4265_DAC_CTL_DIF, (3 << 4));
466	snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,	466	snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
467	CS4265_SPDIF_CTL2_DIF, (1 << 7));	467	CS4265_SPDIF_CTL2_DIF, (3 << 6));
468	}	468	}
469	break;	469	break;
470	case SND_SOC_DAIFMT_LEFT_J:	470	case SND_SOC_DAIFMT_LEFT_J:
@@ -473,7 +473,7 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream, · 2 unmodified lines
473	snd_soc_update_bits(codec, CS4265_ADC_CTL,	473	snd_soc_update_bits(codec, CS4265_ADC_CTL,
474	CS4265_ADC_DIF, 0);	474	CS4265_ADC_DIF, 0);
475	snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,	475	snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
476	CS4265_SPDIF_CTL2_DIF, (1 << 6));	476	CS4265_SPDIF_CTL2_DIF, 0);
477		477
478	break;	478	break;
479	default:	479	default:

sound/soc/codecs/rt5645.c+2−0

@@ -3341,6 +3341,8 @@ static int rt5645_i2c_probe(struct i2c_client *i2c, · 3340 unmodified lines
3341	break;	3341	break;
3342		3342
3343	case RT5645_DMIC_DATA_GPIO5:	3343	case RT5645_DMIC_DATA_GPIO5:
		3344	regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
		3345	RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
3344	regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,	3346	regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3345	RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);	3347	RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
3346	regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,	3348	regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,

sound/soc/codecs/rt5645.h+4−0

 #define RT5645_GP6_PIN_SFT			6
 #define RT5645_GP6_PIN_GPIO6			(0x0 << 6)
 #define RT5645_GP6_PIN_DMIC2_SDA		(0x1 << 6)
+#define RT5645_I2S2_DAC_PIN_MASK		(0x1 << 4)
+#define RT5645_I2S2_DAC_PIN_SFT			4
+#define RT5645_I2S2_DAC_PIN_I2S			(0x0 << 4)
+#define RT5645_I2S2_DAC_PIN_GPIO		(0x1 << 4)
 #define RT5645_GP8_PIN_MASK			(0x1 << 3)
 #define RT5645_GP8_PIN_SFT			3
 #define RT5645_GP8_PIN_GPIO8			(0x0 << 3)

sound/soc/intel/baytrail/sst-baytrail-ipc.c+2−0

@@ -701,6 +701,8 @@ int sst_byt_dsp_init(struct device dev, struct sst_pdata pdata) · 700 unmodified lines
701	if (byt == NULL)	701	if (byt == NULL)
702	return -ENOMEM;	702	return -ENOMEM;
703		703
		704	byt->dev = dev;
		705
704	ipc = &byt->ipc;	706	ipc = &byt->ipc;
705	ipc->dev = dev;	707	ipc->dev = dev;
706	ipc->ops.tx_msg = byt_tx_msg;	708	ipc->ops.tx_msg = byt_tx_msg;

sound/soc/intel/haswell/sst-haswell-ipc.c+2−0

@@ -2119,6 +2119,8 @@ int sst_hsw_dsp_init(struct device dev, struct sst_pdata pdata) · 2118 unmodified lines
2119	if (hsw == NULL)	2119	if (hsw == NULL)
2120	return -ENOMEM;	2120	return -ENOMEM;
2121		2121
		2122	hsw->dev = dev;
		2123
2122	ipc = &hsw->ipc;	2124	ipc = &hsw->ipc;
2123	ipc->dev = dev;	2125	ipc->dev = dev;
2124	ipc->ops.tx_msg = hsw_tx_msg;	2126	ipc->ops.tx_msg = hsw_tx_msg;

sound/soc/soc-topology.c+43−18

@@ -33,6 +33,7 @@ · 32 unmodified lines
33	#include <sound/soc.h>	33	#include <sound/soc.h>
34	#include <sound/soc-dapm.h>	34	#include <sound/soc-dapm.h>
35	#include <sound/soc-topology.h>	35	#include <sound/soc-topology.h>
		36	#include <sound/tlv.h>
36		37
37	/*	38	/*
38	* We make several passes over the data (since it wont necessarily be ordered)	39	* We make several passes over the data (since it wont necessarily be ordered)
@@ -534,7 +535,7 @@ static int soc_tplg_kcontrol_bind_io(struct snd_soc_tplg_ctl_hdr *hdr, · 495 unmodified lines
534	k->put = bops[i].put;	535	k->put = bops[i].put;
535	if (k->get == NULL && bops[i].id == hdr->ops.get)	536	if (k->get == NULL && bops[i].id == hdr->ops.get)
536	k->get = bops[i].get;	537	k->get = bops[i].get;
537	if (k->info == NULL && ops[i].id == hdr->ops.info)	538	if (k->info == NULL && bops[i].id == hdr->ops.info)
538	k->info = bops[i].info;	539	k->info = bops[i].info;
539	}	540	}
540		541
@@ -579,28 +580,51 @@ static int soc_tplg_init_kcontrol(struct soc_tplg *tplg, · 38 unmodified lines
579	return 0;	580	return 0;
580	}	581	}
581		582
		583
		584	static int soc_tplg_create_tlv_db_scale(struct soc_tplg *tplg,
		585	struct snd_kcontrol_new kc, struct snd_soc_tplg_tlv_dbscale scale)
		586	{
		587	unsigned int item_len = 2 * sizeof(unsigned int);
		588	unsigned int *p;
		589
		590	p = kzalloc(item_len + 2 * sizeof(unsigned int), GFP_KERNEL);
		591	if (!p)
		592	return -ENOMEM;
		593
		594	p[0] = SNDRV_CTL_TLVT_DB_SCALE;
		595	p[1] = item_len;
		596	p[2] = scale->min;
		597	p[3] = (scale->step & TLV_DB_SCALE_MASK)
		598	\| (scale->mute ? TLV_DB_SCALE_MUTE : 0);
		599
		600	kc->tlv.p = (void *)p;
		601	return 0;
		602	}
		603
582	static int soc_tplg_create_tlv(struct soc_tplg *tplg,	604	static int soc_tplg_create_tlv(struct soc_tplg *tplg,
583	struct snd_kcontrol_new kc, struct snd_soc_tplg_ctl_tlv tplg_tlv)	605	struct snd_kcontrol_new kc, struct snd_soc_tplg_ctl_hdr tc)
584	{	606	{
585	struct snd_ctl_tlv *tlv;	607	struct snd_soc_tplg_ctl_tlv *tplg_tlv;
586	int size;
587		608
588	if (tplg_tlv->count == 0)	609	if (!(tc->access & SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE))
589	return 0;	610	return 0;
590		611
591	size = ((tplg_tlv->count + (sizeof(unsigned int) - 1)) &	612	if (tc->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
592	~(sizeof(unsigned int) - 1));	613	kc->tlv.c = snd_soc_bytes_tlv_callback;
593	tlv = kzalloc(sizeof(*tlv) + size, GFP_KERNEL);	614	} else {
594	if (tlv == NULL)	615	tplg_tlv = &tc->tlv;
595	return -ENOMEM;	616	switch (tplg_tlv->type) {
596		617	case SNDRV_CTL_TLVT_DB_SCALE:
597	dev_dbg(tplg->dev, " created TLV type %d size %d bytes\n",	618	return soc_tplg_create_tlv_db_scale(tplg, kc,
598	tplg_tlv->numid, size);	619	&tplg_tlv->scale);
599		620
600	tlv->numid = tplg_tlv->numid;	621	/* TODO: add support for other TLV types */
601	tlv->length = size;	622	default:
602	memcpy(&tlv->tlv[0], tplg_tlv->data, size);	623	dev_dbg(tplg->dev, "Unsupported TLV type %d\n",
603	kc->tlv.p = (void *)tlv;	624	tplg_tlv->type);
		625	return -EINVAL;
		626	}
		627	}
604		628
605	return 0;	629	return 0;
606	}	630	}
@@ -772,7 +796,7 @@ static int soc_tplg_dmixer_create(struct soc_tplg *tplg, unsigned int count, · 165 unmodified lines
772	}	796	}
773		797
774	/* create any TLV data */	798	/* create any TLV data */
775	soc_tplg_create_tlv(tplg, &kc, &mc->tlv);	799	soc_tplg_create_tlv(tplg, &kc, &mc->hdr);
776		800
777	/* register control here */	801	/* register control here */
778	err = soc_tplg_add_kcontrol(tplg, &kc,	802	err = soc_tplg_add_kcontrol(tplg, &kc,
@@ -1350,6 +1374,7 @@ static int soc_tplg_dapm_widget_create(struct soc_tplg *tplg, · 571 unmodified lines
1350	template.reg = w->reg;	1374	template.reg = w->reg;
1351	template.shift = w->shift;	1375	template.shift = w->shift;
1352	template.mask = w->mask;	1376	template.mask = w->mask;
		1377	template.subseq = w->subseq;
1353	template.on_val = w->invert ? 0 : 1;	1378	template.on_val = w->invert ? 0 : 1;
1354	template.off_val = w->invert ? 1 : 0;	1379	template.off_val = w->invert ? 1 : 0;
1355	template.ignore_suspend = w->ignore_suspend;	1380	template.ignore_suspend = w->ignore_suspend;

@@ -160,18 +160,18 @@ static inline void setup_protection_map(void) · 159 unmodified lines
160	protection_map[1] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);	160	protection_map[1] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
161	protection_map[2] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);	161	protection_map[2] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
162	protection_map[3] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);	162	protection_map[3] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
163	protection_map[4] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);	163	protection_map[4] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
164	protection_map[5] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);	164	protection_map[5] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
165	protection_map[6] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);	165	protection_map[6] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
166	protection_map[7] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);	166	protection_map[7] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
167		167
168	protection_map[8] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);	168	protection_map[8] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
169	protection_map[9] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);	169	protection_map[9] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
170	protection_map[10] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE \| _PAGE_NO_READ);	170	protection_map[10] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE \| _PAGE_NO_READ);
171	protection_map[11] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE);	171	protection_map[11] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE);
172	protection_map[12] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);	172	protection_map[12] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
173	protection_map[13] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);	173	protection_map[13] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
174	protection_map[14] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE \| _PAGE_NO_READ);	174	protection_map[14] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);
175	protection_map[15] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);	175	protection_map[15] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);
176		176
177	} else {	177	} else {