lael-labs/linux

.mailmap+4−0

 Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com>
 Axel Dyks <xl@xlsigned.net>
 Axel Lin <axel.lin@gmail.com>
+Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@linaro.org>
+Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@spreadtrum.com>
+Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@unisoc.com>
+Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang7@gmail.com>
 Bart Van Assche <bvanassche@acm.org> <bart.vanassche@sandisk.com>
 Bart Van Assche <bvanassche@acm.org> <bart.vanassche@wdc.com>
 Ben Gardner <bgardner@wabtec.com>

Documentation/admin-guide/kernel-parameters.txt+2−0

 					       no_entry_flush [PPC]
 					       no_uaccess_flush [PPC]
 					       mmio_stale_data=off [X86]
+					       retbleed=off [X86]
 				Exceptions:
 					       This does not have any effect on
 					       mds=full,nosmt [X86]
 					       tsx_async_abort=full,nosmt [X86]
 					       mmio_stale_data=full,nosmt [X86]
+					       retbleed=auto,nosmt [X86]
 	mminit_loglevel=
 			[KNL] When CONFIG_DEBUG_MEMORY_INIT is set, this

Documentation/devicetree/bindings/net/ethernet-controller.yaml+59−64

@@ -167,70 +167,65 @@ properties: · 166 unmodified lines
167	- in-band-status	167	- in-band-status
168		168
169	fixed-link:	169	fixed-link:
170	allOf:	170	oneOf:
171	- if:	171	- $ref: /schemas/types.yaml#/definitions/uint32-array
172	type: array	172	deprecated: true
173	then:	173	items:
174	deprecated: true	174	- minimum: 0
175	items:	175	maximum: 31
176	- minimum: 0	176	description:
177	maximum: 31	177	Emulated PHY ID, choose any but unique to the all
178	description:	178	specified fixed-links
179	Emulated PHY ID, choose any but unique to the all	179
180	specified fixed-links	180	- enum: [0, 1]
181		181	description:
182	- enum: [0, 1]	182	Duplex configuration. 0 for half duplex or 1 for
183	description:	183	full duplex
184	Duplex configuration. 0 for half duplex or 1 for	184
185	full duplex	185	- enum: [10, 100, 1000, 2500, 10000]
186		186	description:
187	- enum: [10, 100, 1000, 2500, 10000]	187	Link speed in Mbits/sec.
188	description:	188
189	Link speed in Mbits/sec.	189	- enum: [0, 1]
190		190	description:
191	- enum: [0, 1]	191	Pause configuration. 0 for no pause, 1 for pause
192	description:	192
193	Pause configuration. 0 for no pause, 1 for pause	193	- enum: [0, 1]
194		194	description:
195	- enum: [0, 1]	195	Asymmetric pause configuration. 0 for no asymmetric
196	description:	196	pause, 1 for asymmetric pause
197	Asymmetric pause configuration. 0 for no asymmetric	197	- type: object
198	pause, 1 for asymmetric pause	198	additionalProperties: false
199		199	properties:
200		200	speed:
201	- if:	201	description:
202	type: object	202	Link speed.
203	then:	203	$ref: /schemas/types.yaml#/definitions/uint32
204	properties:	204	enum: [10, 100, 1000, 2500, 10000]
205	speed:	205
206	description:	206	full-duplex:
207	Link speed.	207	$ref: /schemas/types.yaml#/definitions/flag
208	$ref: /schemas/types.yaml#/definitions/uint32	208	description:
209	enum: [10, 100, 1000, 2500, 10000]	209	Indicates that full-duplex is used. When absent, half
210		210	duplex is assumed.
211	full-duplex:	211
212	$ref: /schemas/types.yaml#/definitions/flag	212	pause:
213	description:	213	$ref: /schemas/types.yaml#definitions/flag
214	Indicates that full-duplex is used. When absent, half	214	description:
215	duplex is assumed.	215	Indicates that pause should be enabled.
216		216
217	pause:	217	asym-pause:
218	$ref: /schemas/types.yaml#definitions/flag	218	$ref: /schemas/types.yaml#/definitions/flag
219	description:	219	description:
220	Indicates that pause should be enabled.	220	Indicates that asym_pause should be enabled.
221		221
222	asym-pause:	222	link-gpios:
223	$ref: /schemas/types.yaml#/definitions/flag	223	maxItems: 1
224	description:	224	description:
225	Indicates that asym_pause should be enabled.	225	GPIO to determine if the link is up
226		226
227	link-gpios:	227	required:
228	maxItems: 1	228	- speed
229	description:
230	GPIO to determine if the link is up
231
232	required:
233	- speed
234		229
235	additionalProperties: true	230	additionalProperties: true
236		231

Documentation/devicetree/bindings/net/fsl,fec.yaml+3−0

       Should specify the gpio for phy reset.
   phy-reset-duration:
+    $ref: /schemas/types.yaml#/definitions/uint32
     deprecated: true
     description:
       Reset duration in milliseconds.  Should present only if property
       and 1 millisecond will be used instead.
   phy-reset-active-high:
+    type: boolean
     deprecated: true
     description:
       If present then the reset sequence using the GPIO specified in the
       "phy-reset-gpios" property is reversed (H=reset state, L=operation state).
   phy-reset-post-delay:
+    $ref: /schemas/types.yaml#/definitions/uint32
     deprecated: true
     description:
       Post reset delay in milliseconds. If present then a delay of phy-reset-post-delay

Documentation/networking/ip-sysctl.rst+8−1

 	Default: 4K
 sctp_wmem  - vector of 3 INTEGERs: min, default, max
-	Currently this tunable has no effect.
+	Only the first value ("min") is used, "default" and "max" are
+	ignored.
+	min: Minimum size of send buffer that can be used by SCTP sockets.
+	It is guaranteed to each SCTP socket (but not association) even
+	under moderate memory pressure.
+	Default: 4K
 addr_scope_policy - INTEGER
 	Control IPv4 address scoping - draft-stewart-tsvwg-sctp-ipv4-00

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 5	2	VERSION = 5
3	PATCHLEVEL = 19	3	PATCHLEVEL = 19
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc8	5	EXTRAVERSION =
6	NAME = Superb Owl	6	NAME = Superb Owl
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION

arch/arm/boot/dts/lan966x.dtsi+1−1

@@ -38,7 +38,7 @@ · 37 unmodified lines
38	sys_clk: sys_clk {	38	sys_clk: sys_clk {
39	compatible = "fixed-clock";	39	compatible = "fixed-clock";
40	#clock-cells = <0>;	40	#clock-cells = <0>;
41	clock-frequency = <162500000>;	41	clock-frequency = <165625000>;
42	};	42	};
43		43
44	cpu_clk: cpu_clk {	44	cpu_clk: cpu_clk {

arch/arm/include/asm/dma.h+1−1

@@ -10,7 +10,7 @@ · 9 unmodified lines
10	#else	10	#else
11	#define MAX_DMA_ADDRESS ({ \	11	#define MAX_DMA_ADDRESS ({ \
12	extern phys_addr_t arm_dma_zone_size; \	12	extern phys_addr_t arm_dma_zone_size; \
13	arm_dma_zone_size && arm_dma_zone_size < (0x10000000 - PAGE_OFFSET) ? \	13	arm_dma_zone_size && arm_dma_zone_size < (0x100000000ULL - PAGE_OFFSET) ? \
14	(PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; })	14	(PAGE_OFFSET + arm_dma_zone_size) : 0xffffffffUL; })
15	#endif	15	#endif
16		16

arch/arm/lib/findbit.S+8−8

@@ -40,8 +40,8 @@ ENDPROC(_find_first_zero_bit_le) · 39 unmodified lines
40	* Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)	40	* Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
41	*/	41	*/
42	ENTRY(_find_next_zero_bit_le)	42	ENTRY(_find_next_zero_bit_le)
43	teq r1, #0	43	cmp r2, r1
44	beq 3b	44	bhs 3b
45	ands ip, r2, #7	45	ands ip, r2, #7
46	beq 1b @ If new byte, goto old routine	46	beq 1b @ If new byte, goto old routine
47	ARM( ldrb r3, [r0, r2, lsr #3] )	47	ARM( ldrb r3, [r0, r2, lsr #3] )
@@ -81,8 +81,8 @@ ENDPROC(_find_first_bit_le) · 33 unmodified lines
81	* Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)	81	* Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset)
82	*/	82	*/
83	ENTRY(_find_next_bit_le)	83	ENTRY(_find_next_bit_le)
84	teq r1, #0	84	cmp r2, r1
85	beq 3b	85	bhs 3b
86	ands ip, r2, #7	86	ands ip, r2, #7
87	beq 1b @ If new byte, goto old routine	87	beq 1b @ If new byte, goto old routine
88	ARM( ldrb r3, [r0, r2, lsr #3] )	88	ARM( ldrb r3, [r0, r2, lsr #3] )
@@ -115,8 +115,8 @@ ENTRY(_find_first_zero_bit_be) · 26 unmodified lines
115	ENDPROC(_find_first_zero_bit_be)	115	ENDPROC(_find_first_zero_bit_be)
116		116
117	ENTRY(_find_next_zero_bit_be)	117	ENTRY(_find_next_zero_bit_be)
118	teq r1, #0	118	cmp r2, r1
119	beq 3b	119	bhs 3b
120	ands ip, r2, #7	120	ands ip, r2, #7
121	beq 1b @ If new byte, goto old routine	121	beq 1b @ If new byte, goto old routine
122	eor r3, r2, #0x18 @ big endian byte ordering	122	eor r3, r2, #0x18 @ big endian byte ordering
@@ -149,8 +149,8 @@ ENTRY(_find_first_bit_be) · 26 unmodified lines
149	ENDPROC(_find_first_bit_be)	149	ENDPROC(_find_first_bit_be)
150		150
151	ENTRY(_find_next_bit_be)	151	ENTRY(_find_next_bit_be)
152	teq r1, #0	152	cmp r2, r1
153	beq 3b	153	bhs 3b
154	ands ip, r2, #7	154	ands ip, r2, #7
155	beq 1b @ If new byte, goto old routine	155	beq 1b @ If new byte, goto old routine
156	eor r3, r2, #0x18 @ big endian byte ordering	156	eor r3, r2, #0x18 @ big endian byte ordering

arch/arm/mach-pxa/corgi.c+1−1

@@ -549,7 +549,7 @@ static struct pxa2xx_spi_controller corgi_spi_info = { · 548 unmodified lines
549	};	549	};
550		550
551	static struct gpiod_lookup_table corgi_spi_gpio_table = {	551	static struct gpiod_lookup_table corgi_spi_gpio_table = {
552	.dev_id = "pxa2xx-spi.1",	552	.dev_id = "spi1",
553	.table = {	553	.table = {
554	GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_ADS7846_CS, "cs", 0, GPIO_ACTIVE_LOW),	554	GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_ADS7846_CS, "cs", 0, GPIO_ACTIVE_LOW),
555	GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_LCDCON_CS, "cs", 1, GPIO_ACTIVE_LOW),	555	GPIO_LOOKUP_IDX("gpio-pxa", CORGI_GPIO_LCDCON_CS, "cs", 1, GPIO_ACTIVE_LOW),

arch/arm/mach-pxa/hx4700.c+1−1

@@ -635,7 +635,7 @@ static struct pxa2xx_spi_controller pxa_ssp2_master_info = { · 634 unmodified lines
635	};	635	};
636		636
637	static struct gpiod_lookup_table pxa_ssp2_gpio_table = {	637	static struct gpiod_lookup_table pxa_ssp2_gpio_table = {
638	.dev_id = "pxa2xx-spi.2",	638	.dev_id = "spi2",
639	.table = {	639	.table = {
640	GPIO_LOOKUP_IDX("gpio-pxa", GPIO88_HX4700_TSC2046_CS, "cs", 0, GPIO_ACTIVE_LOW),	640	GPIO_LOOKUP_IDX("gpio-pxa", GPIO88_HX4700_TSC2046_CS, "cs", 0, GPIO_ACTIVE_LOW),
641	{ },	641	{ },

arch/arm/mach-pxa/icontrol.c+2−2

@@ -140,7 +140,7 @@ struct platform_device pxa_spi_ssp4 = { · 139 unmodified lines
140	};	140	};
141		141
142	static struct gpiod_lookup_table pxa_ssp3_gpio_table = {	142	static struct gpiod_lookup_table pxa_ssp3_gpio_table = {
143	.dev_id = "pxa2xx-spi.3",	143	.dev_id = "spi3",
144	.table = {	144	.table = {
145	GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS1, "cs", 0, GPIO_ACTIVE_LOW),	145	GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS1, "cs", 0, GPIO_ACTIVE_LOW),
146	GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS2, "cs", 1, GPIO_ACTIVE_LOW),	146	GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS2, "cs", 1, GPIO_ACTIVE_LOW),
@@ -149,7 +149,7 @@ static struct gpiod_lookup_table pxa_ssp3_gpio_table = { · 2 unmodified lines
149	};	149	};
150		150
151	static struct gpiod_lookup_table pxa_ssp4_gpio_table = {	151	static struct gpiod_lookup_table pxa_ssp4_gpio_table = {
152	.dev_id = "pxa2xx-spi.4",	152	.dev_id = "spi4",
153	.table = {	153	.table = {
154	GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS3, "cs", 0, GPIO_ACTIVE_LOW),	154	GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS3, "cs", 0, GPIO_ACTIVE_LOW),
155	GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS4, "cs", 1, GPIO_ACTIVE_LOW),	155	GPIO_LOOKUP_IDX("gpio-pxa", ICONTROL_MCP251x_nCS4, "cs", 1, GPIO_ACTIVE_LOW),

arch/arm/mach-pxa/littleton.c+1−1

@@ -207,7 +207,7 @@ static struct spi_board_info littleton_spi_devices[] __initdata = { · 206 unmodified lines
207	};	207	};
208		208
209	static struct gpiod_lookup_table littleton_spi_gpio_table = {	209	static struct gpiod_lookup_table littleton_spi_gpio_table = {
210	.dev_id = "pxa2xx-spi.2",	210	.dev_id = "spi2",
211	.table = {	211	.table = {
212	GPIO_LOOKUP_IDX("gpio-pxa", LITTLETON_GPIO_LCD_CS, "cs", 0, GPIO_ACTIVE_LOW),	212	GPIO_LOOKUP_IDX("gpio-pxa", LITTLETON_GPIO_LCD_CS, "cs", 0, GPIO_ACTIVE_LOW),
213	{ },	213	{ },

arch/arm/mach-pxa/magician.c+1−1

@@ -994,7 +994,7 @@ static struct pxa2xx_spi_controller magician_spi_info = { · 993 unmodified lines
994	};	994	};
995		995
996	static struct gpiod_lookup_table magician_spi_gpio_table = {	996	static struct gpiod_lookup_table magician_spi_gpio_table = {
997	.dev_id = "pxa2xx-spi.2",	997	.dev_id = "spi2",
998	.table = {	998	.table = {
999	/* NOTICE must be GPIO, incompatibility with hw PXA SPI framing */	999	/* NOTICE must be GPIO, incompatibility with hw PXA SPI framing */
1000	GPIO_LOOKUP_IDX("gpio-pxa", GPIO14_MAGICIAN_TSC2046_CS, "cs", 0, GPIO_ACTIVE_LOW),	1000	GPIO_LOOKUP_IDX("gpio-pxa", GPIO14_MAGICIAN_TSC2046_CS, "cs", 0, GPIO_ACTIVE_LOW),

arch/arm/mach-pxa/spitz.c+1−1

@@ -578,7 +578,7 @@ static struct pxa2xx_spi_controller spitz_spi_info = { · 577 unmodified lines
578	};	578	};
579		579
580	static struct gpiod_lookup_table spitz_spi_gpio_table = {	580	static struct gpiod_lookup_table spitz_spi_gpio_table = {
581	.dev_id = "pxa2xx-spi.2",	581	.dev_id = "spi2",
582	.table = {	582	.table = {
583	GPIO_LOOKUP_IDX("gpio-pxa", SPITZ_GPIO_ADS7846_CS, "cs", 0, GPIO_ACTIVE_LOW),	583	GPIO_LOOKUP_IDX("gpio-pxa", SPITZ_GPIO_ADS7846_CS, "cs", 0, GPIO_ACTIVE_LOW),
584	GPIO_LOOKUP_IDX("gpio-pxa", SPITZ_GPIO_LCDCON_CS, "cs", 1, GPIO_ACTIVE_LOW),	584	GPIO_LOOKUP_IDX("gpio-pxa", SPITZ_GPIO_LCDCON_CS, "cs", 1, GPIO_ACTIVE_LOW),

arch/arm/mach-pxa/z2.c+2−2

@@ -623,7 +623,7 @@ static struct pxa2xx_spi_controller pxa_ssp2_master_info = { · 622 unmodified lines
623	};	623	};
624		624
625	static struct gpiod_lookup_table pxa_ssp1_gpio_table = {	625	static struct gpiod_lookup_table pxa_ssp1_gpio_table = {
626	.dev_id = "pxa2xx-spi.1",	626	.dev_id = "spi1",
627	.table = {	627	.table = {
628	GPIO_LOOKUP_IDX("gpio-pxa", GPIO24_ZIPITZ2_WIFI_CS, "cs", 0, GPIO_ACTIVE_LOW),	628	GPIO_LOOKUP_IDX("gpio-pxa", GPIO24_ZIPITZ2_WIFI_CS, "cs", 0, GPIO_ACTIVE_LOW),
629	{ },	629	{ },
@@ -631,7 +631,7 @@ static struct gpiod_lookup_table pxa_ssp1_gpio_table = { · 1 unmodified line
631	};	631	};
632		632
633	static struct gpiod_lookup_table pxa_ssp2_gpio_table = {	633	static struct gpiod_lookup_table pxa_ssp2_gpio_table = {
634	.dev_id = "pxa2xx-spi.2",	634	.dev_id = "spi2",
635	.table = {	635	.table = {
636	GPIO_LOOKUP_IDX("gpio-pxa", GPIO88_ZIPITZ2_LCD_CS, "cs", 0, GPIO_ACTIVE_LOW),	636	GPIO_LOOKUP_IDX("gpio-pxa", GPIO88_ZIPITZ2_LCD_CS, "cs", 0, GPIO_ACTIVE_LOW),
637	{ },	637	{ },

arch/loongarch/Kconfig+0−1

@@ -69,7 +69,6 @@ config LOONGARCH · 68 unmodified lines
69	select GENERIC_TIME_VSYSCALL	69	select GENERIC_TIME_VSYSCALL
70	select GPIOLIB	70	select GPIOLIB
71	select HAVE_ARCH_AUDITSYSCALL	71	select HAVE_ARCH_AUDITSYSCALL
72	select HAVE_ARCH_COMPILER_H
73	select HAVE_ARCH_MMAP_RND_BITS if MMU	72	select HAVE_ARCH_MMAP_RND_BITS if MMU
74	select HAVE_ARCH_SECCOMP_FILTER	73	select HAVE_ARCH_SECCOMP_FILTER
75	select HAVE_ARCH_TRACEHOOK	74	select HAVE_ARCH_TRACEHOOK

arch/loongarch/include/asm/asmmacro.h+0−12

@@ -274,16 +274,4 @@ · 273 unmodified lines
274	nor \dst, \src, zero	274	nor \dst, \src, zero
275	.endm	275	.endm
276		276
277	.macro bgt r0 r1 label
278	blt \r1, \r0, \label
279	.endm
280
281	.macro bltz r0 label
282	blt \r0, zero, \label
283	.endm
284
285	.macro bgez r0 label
286	bge \r0, zero, \label
287	.endm
288
289	#endif /* _ASM_ASMMACRO_H */	277	#endif /* _ASM_ASMMACRO_H */

arch/loongarch/include/asm/atomic.h+16−21

 #include <linux/types.h>
 #include <asm/barrier.h>
 #include <asm/cmpxchg.h>
-#include <asm/compiler.h>
 #if __SIZEOF_LONG__ == 4
 #define __LL		"ll.w	"
 		__asm__ __volatile__(
 		"1:	ll.w	%1, %2		# atomic_sub_if_positive\n"
 		"	addi.w	%0, %1, %3				\n"
-		"	or	%1, %0, $zero				\n"
+		"	move	%1, %0					\n"
-		"	blt	%0, $zero, 2f				\n"
+		"	bltz	%0, 2f					\n"
 		"	sc.w	%1, %2					\n"
-		"	beq	$zero, %1, 1b				\n"
+		"	beqz	%1, 1b					\n"
 		"2:							\n"
 		__WEAK_LLSC_MB
-		: "=&r" (result), "=&r" (temp),
+		: "=&r" (result), "=&r" (temp), "+ZC" (v->counter)
-		  "+" GCC_OFF_SMALL_ASM() (v->counter)
 		: "I" (-i));
 	} else {
 		__asm__ __volatile__(
 		"1:	ll.w	%1, %2		# atomic_sub_if_positive\n"
 		"	sub.w	%0, %1, %3				\n"
-		"	or	%1, %0, $zero				\n"
+		"	move	%1, %0					\n"
-		"	blt	%0, $zero, 2f				\n"
+		"	bltz	%0, 2f					\n"
 		"	sc.w	%1, %2					\n"
-		"	beq	$zero, %1, 1b				\n"
+		"	beqz	%1, 1b					\n"
 		"2:							\n"
 		__WEAK_LLSC_MB
-		: "=&r" (result), "=&r" (temp),
+		: "=&r" (result), "=&r" (temp), "+ZC" (v->counter)
-		  "+" GCC_OFF_SMALL_ASM() (v->counter)
 		: "r" (i));
 	}
 		__asm__ __volatile__(
 		"1:	ll.d	%1, %2	# atomic64_sub_if_positive	\n"
 		"	addi.d	%0, %1, %3				\n"
-		"	or	%1, %0, $zero				\n"
+		"	move	%1, %0					\n"
-		"	blt	%0, $zero, 2f				\n"
+		"	bltz	%0, 2f					\n"
 		"	sc.d	%1, %2					\n"
-		"	beq	%1, $zero, 1b				\n"
+		"	beqz	%1, 1b					\n"
 		"2:							\n"
 		__WEAK_LLSC_MB
-		: "=&r" (result), "=&r" (temp),
+		: "=&r" (result), "=&r" (temp), "+ZC" (v->counter)
-		  "+" GCC_OFF_SMALL_ASM() (v->counter)
 		: "I" (-i));
 	} else {
 		__asm__ __volatile__(
 		"1:	ll.d	%1, %2	# atomic64_sub_if_positive	\n"
 		"	sub.d	%0, %1, %3				\n"
-		"	or	%1, %0, $zero				\n"
+		"	move	%1, %0					\n"
-		"	blt	%0, $zero, 2f				\n"
+		"	bltz	%0, 2f					\n"
 		"	sc.d	%1, %2					\n"
-		"	beq	%1, $zero, 1b				\n"
+		"	beqz	%1, 1b					\n"
 		"2:							\n"
 		__WEAK_LLSC_MB
-		: "=&r" (result), "=&r" (temp),
+		: "=&r" (result), "=&r" (temp), "+ZC" (v->counter)
-		  "+" GCC_OFF_SMALL_ASM() (v->counter)
 		: "r" (i));
 	}

arch/loongarch/include/asm/barrier.h+2−2

@@ -48,9 +48,9 @@ static inline unsigned long array_index_mask_nospec(unsigned long index, · 47 unmodified lines
48	__asm__ __volatile__(	48	__asm__ __volatile__(
49	"sltu %0, %1, %2\n\t"	49	"sltu %0, %1, %2\n\t"
50	#if (__SIZEOF_LONG__ == 4)	50	#if (__SIZEOF_LONG__ == 4)
51	"sub.w %0, $r0, %0\n\t"	51	"sub.w %0, $zero, %0\n\t"
52	#elif (__SIZEOF_LONG__ == 8)	52	#elif (__SIZEOF_LONG__ == 8)
53	"sub.d %0, $r0, %0\n\t"	53	"sub.d %0, $zero, %0\n\t"
54	#endif	54	#endif
55	: "=r" (mask)	55	: "=r" (mask)
56	: "r" (index), "r" (size)	56	: "r" (index), "r" (size)

arch/loongarch/include/asm/cmpxchg.h+2−2

@@ -55,9 +55,9 @@ static inline unsigned long __xchg(volatile void *ptr, unsigned long x, · 54 unmodified lines
55	__asm__ __volatile__( \	55	__asm__ __volatile__( \
56	"1: " ld " %0, %2 # __cmpxchg_asm \n" \	56	"1: " ld " %0, %2 # __cmpxchg_asm \n" \
57	" bne %0, %z3, 2f \n" \	57	" bne %0, %z3, 2f \n" \
58	" or $t0, %z4, $zero \n" \	58	" move $t0, %z4 \n" \
59	" " st " $t0, %1 \n" \	59	" " st " $t0, %1 \n" \
60	" beq $zero, $t0, 1b \n" \	60	" beqz $t0, 1b \n" \
61	"2: \n" \	61	"2: \n" \
62	__WEAK_LLSC_MB \	62	__WEAK_LLSC_MB \
63	: "=&r" (__ret), "=ZB"(*m) \	63	: "=&r" (__ret), "=ZB"(*m) \

arch/loongarch/include/asm/compiler.h+0−15

@@ -1,15 +0,0 @@
1	/* SPDX-License-Identifier: GPL-2.0 */
2	/*
3	* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4	*/
5	#ifndef _ASM_COMPILER_H
6	#define _ASM_COMPILER_H
7
8	#define GCC_OFF_SMALL_ASM() "ZC"
9
10	#define LOONGARCH_ISA_LEVEL "loongarch"
11	#define LOONGARCH_ISA_ARCH_LEVEL "arch=loongarch"
12	#define LOONGARCH_ISA_LEVEL_RAW loongarch
13	#define LOONGARCH_ISA_ARCH_LEVEL_RAW LOONGARCH_ISA_LEVEL_RAW
14
15	#endif /* _ASM_COMPILER_H */

arch/loongarch/include/asm/elf.h+0−2

@@ -288,8 +288,6 @@ struct arch_elf_state { · 287 unmodified lines
288	.interp_fp_abi = LOONGARCH_ABI_FP_ANY, \	288	.interp_fp_abi = LOONGARCH_ABI_FP_ANY, \
289	}	289	}
290		290
291	#define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT)
292
293	extern int arch_elf_pt_proc(void ehdr, void phdr, struct file *elf,	291	extern int arch_elf_pt_proc(void ehdr, void phdr, struct file *elf,
294	bool is_interp, struct arch_elf_state *state);	292	bool is_interp, struct arch_elf_state *state);
295		293

arch/loongarch/include/asm/futex.h+5−6

 #include <linux/futex.h>
 #include <linux/uaccess.h>
 #include <asm/barrier.h>
-#include <asm/compiler.h>
 #include <asm/errno.h>
 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)		\
 	"1:	ll.w	%1, %4 # __futex_atomic_op\n"		\
 	"	" insn	"				\n"	\
 	"2:	sc.w	$t0, %2				\n"	\
-	"	beq	$t0, $zero, 1b			\n"	\
+	"	beqz	$t0, 1b				\n"	\
 	"3:						\n"	\
 	"	.section .fixup,\"ax\"			\n"	\
 	"4:	li.w	%0, %6				\n"	\
 	"# futex_atomic_cmpxchg_inatomic			\n"
 	"1:	ll.w	%1, %3					\n"
 	"	bne	%1, %z4, 3f				\n"
-	"	or	$t0, %z5, $zero				\n"
+	"	move	$t0, %z5				\n"
 	"2:	sc.w	$t0, %2					\n"
-	"	beq	$zero, $t0, 1b				\n"
+	"	beqz	$t0, 1b					\n"
 	"3:							\n"
 	__WEAK_LLSC_MB
 	"	.section .fixup,\"ax\"				\n"
 	"	"__UA_ADDR "\t1b, 4b				\n"
 	"	"__UA_ADDR "\t2b, 4b				\n"
 	"	.previous					\n"
-	: "+r" (ret), "=&r" (val), "=" GCC_OFF_SMALL_ASM() (*uaddr)
+	: "+r" (ret), "=&r" (val), "=ZC" (*uaddr)
-	: GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval),
+	: "ZC" (*uaddr), "Jr" (oldval), "Jr" (newval),
 	  "i" (-EFAULT)
 	: "memory", "t0");

arch/loongarch/include/asm/irqflags.h+0−1

@@ -9,7 +9,6 @@ · 8 unmodified lines
9		9
10	#include <linux/compiler.h>	10	#include <linux/compiler.h>
11	#include <linux/stringify.h>	11	#include <linux/stringify.h>
12	#include <asm/compiler.h>
13	#include <asm/loongarch.h>	12	#include <asm/loongarch.h>
14		13
15	static inline void arch_local_irq_enable(void)	14	static inline void arch_local_irq_enable(void)

arch/loongarch/include/asm/local.h+0−1

@@ -9,7 +9,6 @@ · 8 unmodified lines
9	#include <linux/bitops.h>	9	#include <linux/bitops.h>
10	#include <linux/atomic.h>	10	#include <linux/atomic.h>
11	#include <asm/cmpxchg.h>	11	#include <asm/cmpxchg.h>
12	#include <asm/compiler.h>
13		12
14	typedef struct {	13	typedef struct {
15	atomic_long_t a;	14	atomic_long_t a;

arch/loongarch/include/asm/loongson.h+2−14

 #define MAX_PACKAGES 16
-/* Chip Config register of each physical cpu package */
-extern u64 loongson_chipcfg[MAX_PACKAGES];
-#define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id]))
-/* Chip Temperature register of each physical cpu package */
-extern u64 loongson_chiptemp[MAX_PACKAGES];
-#define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id]))
-/* Freq Control register of each physical cpu package */
-extern u64 loongson_freqctrl[MAX_PACKAGES];
-#define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id]))
 #define xconf_readl(addr) readl(addr)
 #define xconf_readq(addr) readq(addr)
 {
 	asm volatile (
 	"	st.w	%[v], %[hw], 0	\n"
-	"	ld.b	$r0, %[hw], 0	\n"
+	"	ld.b	$zero, %[hw], 0	\n"
 	:
 	: [hw] "r" (addr), [v] "r" (val)
 	);
 {
 	asm volatile (
 	"	st.d	%[v], %[hw], 0	\n"
-	"	ld.b	$r0, %[hw], 0	\n"
+	"	ld.b	$zero, %[hw], 0	\n"
 	:
 	: [hw] "r" (addr),  [v] "r" (val64)
 	);

arch/loongarch/include/asm/stacktrace.h+6−6

@@ -23,13 +23,13 @@ · 22 unmodified lines
23	static __always_inline void prepare_frametrace(struct pt_regs *regs)	23	static __always_inline void prepare_frametrace(struct pt_regs *regs)
24	{	24	{
25	__asm__ __volatile__(	25	__asm__ __volatile__(
26	/* Save $r1 */	26	/* Save $ra */
27	STORE_ONE_REG(1)	27	STORE_ONE_REG(1)
28	/* Use $r1 to save PC */	28	/* Use $ra to save PC */
29	"pcaddi $r1, 0\n\t"	29	"pcaddi $ra, 0\n\t"
30	STR_LONG_S " $r1, %0\n\t"	30	STR_LONG_S " $ra, %0\n\t"
31	/* Restore $r1 */	31	/* Restore $ra */
32	STR_LONG_L " $r1, %1, "STR_LONGSIZE"\n\t"	32	STR_LONG_L " $ra, %1, "STR_LONGSIZE"\n\t"
33	STORE_ONE_REG(2)	33	STORE_ONE_REG(2)
34	STORE_ONE_REG(3)	34	STORE_ONE_REG(3)
35	STORE_ONE_REG(4)	35	STORE_ONE_REG(4)

arch/loongarch/include/asm/thread_info.h+2−2

@@ -44,14 +44,14 @@ struct thread_info { · 43 unmodified lines
44	}	44	}
45		45
46	/* How to get the thread information struct from C. */	46	/* How to get the thread information struct from C. */
47	register struct thread_info *__current_thread_info __asm__("$r2");	47	register struct thread_info *__current_thread_info __asm__("$tp");
48		48
49	static inline struct thread_info *current_thread_info(void)	49	static inline struct thread_info *current_thread_info(void)
50	{	50	{
51	return __current_thread_info;	51	return __current_thread_info;
52	}	52	}
53		53
54	register unsigned long current_stack_pointer __asm__("$r3");	54	register unsigned long current_stack_pointer __asm__("$sp");
55		55
56	#endif /* !__ASSEMBLY__ */	56	#endif /* !__ASSEMBLY__ */
57		57

arch/loongarch/include/asm/uaccess.h+1−1

@@ -162,7 +162,7 @@ do { \ · 161 unmodified lines
162	"2: \n" \	162	"2: \n" \
163	" .section .fixup,\"ax\" \n" \	163	" .section .fixup,\"ax\" \n" \
164	"3: li.w %0, %3 \n" \	164	"3: li.w %0, %3 \n" \
165	" or %1, $r0, $r0 \n" \	165	" move %1, $zero \n" \
166	" b 2b \n" \	166	" b 2b \n" \
167	" .previous \n" \	167	" .previous \n" \
168	" .section __ex_table,\"a\" \n" \	168	" .section __ex_table,\"a\" \n" \

arch/loongarch/kernel/cacheinfo.c+9−2

  *
  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
  */
-#include <asm/cpu-info.h>
 #include <linux/cacheinfo.h>
+#include <asm/bootinfo.h>
+#include <asm/cpu-info.h>
 /* Populates leaf and increments to next leaf */
 #define populate_cache(cache, leaf, c_level, c_type)		\
 	leaf->ways_of_associativity = c->cache.ways;		\
 	leaf->size = c->cache.linesz * c->cache.sets *		\
 		c->cache.ways;					\
+	if (leaf->level > 2)					\
+		leaf->size *= nodes_per_package;		\
 	leaf++;							\
 } while (0)
 int populate_cache_leaves(unsigned int cpu)
 {
-	int level = 1;
+	int level = 1, nodes_per_package = 1;
 	struct cpuinfo_loongarch *c = &current_cpu_data;
 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
 	struct cacheinfo *this_leaf = this_cpu_ci->info_list;
+	if (loongson_sysconf.nr_nodes > 1)
+		nodes_per_package = loongson_sysconf.cores_per_package
+					/ loongson_sysconf.cores_per_node;
 	if (c->icache.waysize) {
 		populate_cache(dcache, this_leaf, level, CACHE_TYPE_DATA);
 		populate_cache(icache, this_leaf, level++, CACHE_TYPE_INST);

arch/loongarch/kernel/entry.S+2−2

@@ -27,7 +27,7 @@ SYM_FUNC_START(handle_syscall) · 26 unmodified lines
27		27
28	addi.d sp, sp, -PT_SIZE	28	addi.d sp, sp, -PT_SIZE
29	cfi_st t2, PT_R3	29	cfi_st t2, PT_R3
30	cfi_rel_offset sp, PT_R3	30	cfi_rel_offset sp, PT_R3
31	st.d zero, sp, PT_R0	31	st.d zero, sp, PT_R0
32	csrrd t2, LOONGARCH_CSR_PRMD	32	csrrd t2, LOONGARCH_CSR_PRMD
33	st.d t2, sp, PT_PRMD	33	st.d t2, sp, PT_PRMD
@@ -50,7 +50,7 @@ SYM_FUNC_START(handle_syscall) · 16 unmodified lines
50	cfi_st a7, PT_R11	50	cfi_st a7, PT_R11
51	csrrd ra, LOONGARCH_CSR_ERA	51	csrrd ra, LOONGARCH_CSR_ERA
52	st.d ra, sp, PT_ERA	52	st.d ra, sp, PT_ERA
53	cfi_rel_offset ra, PT_ERA	53	cfi_rel_offset ra, PT_ERA
54		54
55	cfi_st tp, PT_R2	55	cfi_st tp, PT_R2
56	cfi_st u0, PT_R21	56	cfi_st u0, PT_R21

arch/loongarch/kernel/env.c+0−20

@@ -17,21 +17,6 @@ u64 efi_system_table; · 16 unmodified lines
17	struct loongson_system_configuration loongson_sysconf;	17	struct loongson_system_configuration loongson_sysconf;
18	EXPORT_SYMBOL(loongson_sysconf);	18	EXPORT_SYMBOL(loongson_sysconf);
19		19
20	u64 loongson_chipcfg[MAX_PACKAGES];
21	u64 loongson_chiptemp[MAX_PACKAGES];
22	u64 loongson_freqctrl[MAX_PACKAGES];
23	unsigned long long smp_group[MAX_PACKAGES];
24
25	static void __init register_addrs_set(u64 *registers, const u64 addr, int num)
26	{
27	u64 i;
28
29	for (i = 0; i < num; i++) {
30	*registers = (i << 44) \| addr;
31	registers++;
32	}
33	}
34
35	void __init init_environ(void)	20	void __init init_environ(void)
36	{	21	{
37	int efi_boot = fw_arg0;	22	int efi_boot = fw_arg0;
@@ -50,11 +35,6 @@ void __init init_environ(void) · 12 unmodified lines
50	efi_memmap_init_early(&data);	35	efi_memmap_init_early(&data);
51	memblock_reserve(data.phys_map & PAGE_MASK,	36	memblock_reserve(data.phys_map & PAGE_MASK,
52	PAGE_ALIGN(data.size + (data.phys_map & ~PAGE_MASK)));	37	PAGE_ALIGN(data.size + (data.phys_map & ~PAGE_MASK)));
53
54	register_addrs_set(smp_group, TO_UNCACHE(0x1fe01000), 16);
55	register_addrs_set(loongson_chipcfg, TO_UNCACHE(0x1fe00180), 16);
56	register_addrs_set(loongson_chiptemp, TO_UNCACHE(0x1fe0019c), 16);
57	register_addrs_set(loongson_freqctrl, TO_UNCACHE(0x1fe001d0), 16);
58	}	38	}
59		39
60	static int __init init_cpu_fullname(void)	40	static int __init init_cpu_fullname(void)

arch/loongarch/kernel/fpu.S+87−87

@@ -27,78 +27,78 @@ · 26 unmodified lines
27	.endm	27	.endm
28		28
29	.macro sc_save_fp base	29	.macro sc_save_fp base
30	EX fst.d $f0, \base, (0 * FPU_REG_WIDTH)	30	EX fst.d $f0, \base, (0 * FPU_REG_WIDTH)
31	EX fst.d $f1, \base, (1 * FPU_REG_WIDTH)	31	EX fst.d $f1, \base, (1 * FPU_REG_WIDTH)
32	EX fst.d $f2, \base, (2 * FPU_REG_WIDTH)	32	EX fst.d $f2, \base, (2 * FPU_REG_WIDTH)
33	EX fst.d $f3, \base, (3 * FPU_REG_WIDTH)	33	EX fst.d $f3, \base, (3 * FPU_REG_WIDTH)
34	EX fst.d $f4, \base, (4 * FPU_REG_WIDTH)	34	EX fst.d $f4, \base, (4 * FPU_REG_WIDTH)
35	EX fst.d $f5, \base, (5 * FPU_REG_WIDTH)	35	EX fst.d $f5, \base, (5 * FPU_REG_WIDTH)
36	EX fst.d $f6, \base, (6 * FPU_REG_WIDTH)	36	EX fst.d $f6, \base, (6 * FPU_REG_WIDTH)
37	EX fst.d $f7, \base, (7 * FPU_REG_WIDTH)	37	EX fst.d $f7, \base, (7 * FPU_REG_WIDTH)
38	EX fst.d $f8, \base, (8 * FPU_REG_WIDTH)	38	EX fst.d $f8, \base, (8 * FPU_REG_WIDTH)
39	EX fst.d $f9, \base, (9 * FPU_REG_WIDTH)	39	EX fst.d $f9, \base, (9 * FPU_REG_WIDTH)
40	EX fst.d $f10, \base, (10 * FPU_REG_WIDTH)	40	EX fst.d $f10, \base, (10 * FPU_REG_WIDTH)
41	EX fst.d $f11, \base, (11 * FPU_REG_WIDTH)	41	EX fst.d $f11, \base, (11 * FPU_REG_WIDTH)
42	EX fst.d $f12, \base, (12 * FPU_REG_WIDTH)	42	EX fst.d $f12, \base, (12 * FPU_REG_WIDTH)
43	EX fst.d $f13, \base, (13 * FPU_REG_WIDTH)	43	EX fst.d $f13, \base, (13 * FPU_REG_WIDTH)
44	EX fst.d $f14, \base, (14 * FPU_REG_WIDTH)	44	EX fst.d $f14, \base, (14 * FPU_REG_WIDTH)
45	EX fst.d $f15, \base, (15 * FPU_REG_WIDTH)	45	EX fst.d $f15, \base, (15 * FPU_REG_WIDTH)
46	EX fst.d $f16, \base, (16 * FPU_REG_WIDTH)	46	EX fst.d $f16, \base, (16 * FPU_REG_WIDTH)
47	EX fst.d $f17, \base, (17 * FPU_REG_WIDTH)	47	EX fst.d $f17, \base, (17 * FPU_REG_WIDTH)
48	EX fst.d $f18, \base, (18 * FPU_REG_WIDTH)	48	EX fst.d $f18, \base, (18 * FPU_REG_WIDTH)
49	EX fst.d $f19, \base, (19 * FPU_REG_WIDTH)	49	EX fst.d $f19, \base, (19 * FPU_REG_WIDTH)
50	EX fst.d $f20, \base, (20 * FPU_REG_WIDTH)	50	EX fst.d $f20, \base, (20 * FPU_REG_WIDTH)
51	EX fst.d $f21, \base, (21 * FPU_REG_WIDTH)	51	EX fst.d $f21, \base, (21 * FPU_REG_WIDTH)
52	EX fst.d $f22, \base, (22 * FPU_REG_WIDTH)	52	EX fst.d $f22, \base, (22 * FPU_REG_WIDTH)
53	EX fst.d $f23, \base, (23 * FPU_REG_WIDTH)	53	EX fst.d $f23, \base, (23 * FPU_REG_WIDTH)
54	EX fst.d $f24, \base, (24 * FPU_REG_WIDTH)	54	EX fst.d $f24, \base, (24 * FPU_REG_WIDTH)
55	EX fst.d $f25, \base, (25 * FPU_REG_WIDTH)	55	EX fst.d $f25, \base, (25 * FPU_REG_WIDTH)
56	EX fst.d $f26, \base, (26 * FPU_REG_WIDTH)	56	EX fst.d $f26, \base, (26 * FPU_REG_WIDTH)
57	EX fst.d $f27, \base, (27 * FPU_REG_WIDTH)	57	EX fst.d $f27, \base, (27 * FPU_REG_WIDTH)
58	EX fst.d $f28, \base, (28 * FPU_REG_WIDTH)	58	EX fst.d $f28, \base, (28 * FPU_REG_WIDTH)
59	EX fst.d $f29, \base, (29 * FPU_REG_WIDTH)	59	EX fst.d $f29, \base, (29 * FPU_REG_WIDTH)
60	EX fst.d $f30, \base, (30 * FPU_REG_WIDTH)	60	EX fst.d $f30, \base, (30 * FPU_REG_WIDTH)
61	EX fst.d $f31, \base, (31 * FPU_REG_WIDTH)	61	EX fst.d $f31, \base, (31 * FPU_REG_WIDTH)
62	.endm	62	.endm
63		63
64	.macro sc_restore_fp base	64	.macro sc_restore_fp base
65	EX fld.d $f0, \base, (0 * FPU_REG_WIDTH)	65	EX fld.d $f0, \base, (0 * FPU_REG_WIDTH)
66	EX fld.d $f1, \base, (1 * FPU_REG_WIDTH)	66	EX fld.d $f1, \base, (1 * FPU_REG_WIDTH)
67	EX fld.d $f2, \base, (2 * FPU_REG_WIDTH)	67	EX fld.d $f2, \base, (2 * FPU_REG_WIDTH)
68	EX fld.d $f3, \base, (3 * FPU_REG_WIDTH)	68	EX fld.d $f3, \base, (3 * FPU_REG_WIDTH)
69	EX fld.d $f4, \base, (4 * FPU_REG_WIDTH)	69	EX fld.d $f4, \base, (4 * FPU_REG_WIDTH)
70	EX fld.d $f5, \base, (5 * FPU_REG_WIDTH)	70	EX fld.d $f5, \base, (5 * FPU_REG_WIDTH)
71	EX fld.d $f6, \base, (6 * FPU_REG_WIDTH)	71	EX fld.d $f6, \base, (6 * FPU_REG_WIDTH)
72	EX fld.d $f7, \base, (7 * FPU_REG_WIDTH)	72	EX fld.d $f7, \base, (7 * FPU_REG_WIDTH)
73	EX fld.d $f8, \base, (8 * FPU_REG_WIDTH)	73	EX fld.d $f8, \base, (8 * FPU_REG_WIDTH)
74	EX fld.d $f9, \base, (9 * FPU_REG_WIDTH)	74	EX fld.d $f9, \base, (9 * FPU_REG_WIDTH)
75	EX fld.d $f10, \base, (10 * FPU_REG_WIDTH)	75	EX fld.d $f10, \base, (10 * FPU_REG_WIDTH)
76	EX fld.d $f11, \base, (11 * FPU_REG_WIDTH)	76	EX fld.d $f11, \base, (11 * FPU_REG_WIDTH)
77	EX fld.d $f12, \base, (12 * FPU_REG_WIDTH)	77	EX fld.d $f12, \base, (12 * FPU_REG_WIDTH)
78	EX fld.d $f13, \base, (13 * FPU_REG_WIDTH)	78	EX fld.d $f13, \base, (13 * FPU_REG_WIDTH)
79	EX fld.d $f14, \base, (14 * FPU_REG_WIDTH)	79	EX fld.d $f14, \base, (14 * FPU_REG_WIDTH)
80	EX fld.d $f15, \base, (15 * FPU_REG_WIDTH)	80	EX fld.d $f15, \base, (15 * FPU_REG_WIDTH)
81	EX fld.d $f16, \base, (16 * FPU_REG_WIDTH)	81	EX fld.d $f16, \base, (16 * FPU_REG_WIDTH)
82	EX fld.d $f17, \base, (17 * FPU_REG_WIDTH)	82	EX fld.d $f17, \base, (17 * FPU_REG_WIDTH)
83	EX fld.d $f18, \base, (18 * FPU_REG_WIDTH)	83	EX fld.d $f18, \base, (18 * FPU_REG_WIDTH)
84	EX fld.d $f19, \base, (19 * FPU_REG_WIDTH)	84	EX fld.d $f19, \base, (19 * FPU_REG_WIDTH)
85	EX fld.d $f20, \base, (20 * FPU_REG_WIDTH)	85	EX fld.d $f20, \base, (20 * FPU_REG_WIDTH)
86	EX fld.d $f21, \base, (21 * FPU_REG_WIDTH)	86	EX fld.d $f21, \base, (21 * FPU_REG_WIDTH)
87	EX fld.d $f22, \base, (22 * FPU_REG_WIDTH)	87	EX fld.d $f22, \base, (22 * FPU_REG_WIDTH)
88	EX fld.d $f23, \base, (23 * FPU_REG_WIDTH)	88	EX fld.d $f23, \base, (23 * FPU_REG_WIDTH)
89	EX fld.d $f24, \base, (24 * FPU_REG_WIDTH)	89	EX fld.d $f24, \base, (24 * FPU_REG_WIDTH)
90	EX fld.d $f25, \base, (25 * FPU_REG_WIDTH)	90	EX fld.d $f25, \base, (25 * FPU_REG_WIDTH)
91	EX fld.d $f26, \base, (26 * FPU_REG_WIDTH)	91	EX fld.d $f26, \base, (26 * FPU_REG_WIDTH)
92	EX fld.d $f27, \base, (27 * FPU_REG_WIDTH)	92	EX fld.d $f27, \base, (27 * FPU_REG_WIDTH)
93	EX fld.d $f28, \base, (28 * FPU_REG_WIDTH)	93	EX fld.d $f28, \base, (28 * FPU_REG_WIDTH)
94	EX fld.d $f29, \base, (29 * FPU_REG_WIDTH)	94	EX fld.d $f29, \base, (29 * FPU_REG_WIDTH)
95	EX fld.d $f30, \base, (30 * FPU_REG_WIDTH)	95	EX fld.d $f30, \base, (30 * FPU_REG_WIDTH)
96	EX fld.d $f31, \base, (31 * FPU_REG_WIDTH)	96	EX fld.d $f31, \base, (31 * FPU_REG_WIDTH)
97	.endm	97	.endm
98		98
99	.macro sc_save_fcc base, tmp0, tmp1	99	.macro sc_save_fcc base, tmp0, tmp1
100	movcf2gr \tmp0, $fcc0	100	movcf2gr \tmp0, $fcc0
101	move \tmp1, \tmp0	101	move \tmp1, \tmp0
102	movcf2gr \tmp0, $fcc1	102	movcf2gr \tmp0, $fcc1
103	bstrins.d \tmp1, \tmp0, 15, 8	103	bstrins.d \tmp1, \tmp0, 15, 8
104	movcf2gr \tmp0, $fcc2	104	movcf2gr \tmp0, $fcc2
@@ -113,11 +113,11 @@ · 8 unmodified lines
113	bstrins.d \tmp1, \tmp0, 55, 48	113	bstrins.d \tmp1, \tmp0, 55, 48
114	movcf2gr \tmp0, $fcc7	114	movcf2gr \tmp0, $fcc7
115	bstrins.d \tmp1, \tmp0, 63, 56	115	bstrins.d \tmp1, \tmp0, 63, 56
116	EX st.d \tmp1, \base, 0	116	EX st.d \tmp1, \base, 0
117	.endm	117	.endm
118		118
119	.macro sc_restore_fcc base, tmp0, tmp1	119	.macro sc_restore_fcc base, tmp0, tmp1
120	EX ld.d \tmp0, \base, 0	120	EX ld.d \tmp0, \base, 0
121	bstrpick.d \tmp1, \tmp0, 7, 0	121	bstrpick.d \tmp1, \tmp0, 7, 0
122	movgr2cf $fcc0, \tmp1	122	movgr2cf $fcc0, \tmp1
123	bstrpick.d \tmp1, \tmp0, 15, 8	123	bstrpick.d \tmp1, \tmp0, 15, 8
@@ -138,11 +138,11 @@ · 14 unmodified lines
138		138
139	.macro sc_save_fcsr base, tmp0	139	.macro sc_save_fcsr base, tmp0
140	movfcsr2gr \tmp0, fcsr0	140	movfcsr2gr \tmp0, fcsr0
141	EX st.w \tmp0, \base, 0	141	EX st.w \tmp0, \base, 0
142	.endm	142	.endm
143		143
144	.macro sc_restore_fcsr base, tmp0	144	.macro sc_restore_fcsr base, tmp0
145	EX ld.w \tmp0, \base, 0	145	EX ld.w \tmp0, \base, 0
146	movgr2fcsr fcsr0, \tmp0	146	movgr2fcsr fcsr0, \tmp0
147	.endm	147	.endm
148		148
@@ -151,9 +151,9 @@ · 2 unmodified lines
151	*/	151	*/
152	SYM_FUNC_START(_save_fp)	152	SYM_FUNC_START(_save_fp)
153	fpu_save_csr a0 t1	153	fpu_save_csr a0 t1
154	fpu_save_double a0 t1 # clobbers t1	154	fpu_save_double a0 t1 # clobbers t1
155	fpu_save_cc a0 t1 t2 # clobbers t1, t2	155	fpu_save_cc a0 t1 t2 # clobbers t1, t2
156	jirl zero, ra, 0	156	jr ra
157	SYM_FUNC_END(_save_fp)	157	SYM_FUNC_END(_save_fp)
158	EXPORT_SYMBOL(_save_fp)	158	EXPORT_SYMBOL(_save_fp)
159		159
@@ -161,10 +161,10 @@ EXPORT_SYMBOL(_save_fp) · 1 unmodified line
161	* Restore a thread's fp context.	161	* Restore a thread's fp context.
162	*/	162	*/
163	SYM_FUNC_START(_restore_fp)	163	SYM_FUNC_START(_restore_fp)
164	fpu_restore_double a0 t1 # clobbers t1	164	fpu_restore_double a0 t1 # clobbers t1
165	fpu_restore_csr a0 t1	165	fpu_restore_csr a0 t1
166	fpu_restore_cc a0 t1 t2 # clobbers t1, t2	166	fpu_restore_cc a0 t1 t2 # clobbers t1, t2
167	jirl zero, ra, 0	167	jr ra
168	SYM_FUNC_END(_restore_fp)	168	SYM_FUNC_END(_restore_fp)
169		169
170	/*	170	/*
@@ -216,7 +216,7 @@ SYM_FUNC_START(_init_fpu) · 45 unmodified lines
216	movgr2fr.d $f30, t1	216	movgr2fr.d $f30, t1
217	movgr2fr.d $f31, t1	217	movgr2fr.d $f31, t1
218		218
219	jirl zero, ra, 0	219	jr ra
220	SYM_FUNC_END(_init_fpu)	220	SYM_FUNC_END(_init_fpu)
221		221
222	/*	222	/*
@@ -225,11 +225,11 @@ SYM_FUNC_END(_init_fpu) · 2 unmodified lines
225	* a2: fcsr	225	* a2: fcsr
226	*/	226	*/
227	SYM_FUNC_START(_save_fp_context)	227	SYM_FUNC_START(_save_fp_context)
228	sc_save_fcc a1 t1 t2	228	sc_save_fcc a1 t1 t2
229	sc_save_fcsr a2 t1	229	sc_save_fcsr a2 t1
230	sc_save_fp a0	230	sc_save_fp a0
231	li.w a0, 0 # success	231	li.w a0, 0 # success
232	jirl zero, ra, 0	232	jr ra
233	SYM_FUNC_END(_save_fp_context)	233	SYM_FUNC_END(_save_fp_context)
234		234
235	/*	235	/*
@@ -238,14 +238,14 @@ SYM_FUNC_END(_save_fp_context) · 2 unmodified lines
238	* a2: fcsr	238	* a2: fcsr
239	*/	239	*/
240	SYM_FUNC_START(_restore_fp_context)	240	SYM_FUNC_START(_restore_fp_context)
241	sc_restore_fp a0	241	sc_restore_fp a0
242	sc_restore_fcc a1 t1 t2	242	sc_restore_fcc a1 t1 t2
243	sc_restore_fcsr a2 t1	243	sc_restore_fcsr a2 t1
244	li.w a0, 0 # success	244	li.w a0, 0 # success
245	jirl zero, ra, 0	245	jr ra
246	SYM_FUNC_END(_restore_fp_context)	246	SYM_FUNC_END(_restore_fp_context)
247		247
248	SYM_FUNC_START(fault)	248	SYM_FUNC_START(fault)
249	li.w a0, -EFAULT # failure	249	li.w a0, -EFAULT # failure
250	jirl zero, ra, 0	250	jr ra
251	SYM_FUNC_END(fault)	251	SYM_FUNC_END(fault)

arch/loongarch/kernel/genex.S+6−6

@@ -28,23 +28,23 @@ SYM_FUNC_START(__arch_cpu_idle) · 27 unmodified lines
28	nop	28	nop
29	idle 0	29	idle 0
30	/* end of rollback region */	30	/* end of rollback region */
31	1: jirl zero, ra, 0	31	1: jr ra
32	SYM_FUNC_END(__arch_cpu_idle)	32	SYM_FUNC_END(__arch_cpu_idle)
33		33
34	SYM_FUNC_START(handle_vint)	34	SYM_FUNC_START(handle_vint)
35	BACKUP_T0T1	35	BACKUP_T0T1
36	SAVE_ALL	36	SAVE_ALL
37	la.abs t1, __arch_cpu_idle	37	la.abs t1, __arch_cpu_idle
38	LONG_L t0, sp, PT_ERA	38	LONG_L t0, sp, PT_ERA
39	/* 32 byte rollback region */	39	/* 32 byte rollback region */
40	ori t0, t0, 0x1f	40	ori t0, t0, 0x1f
41	xori t0, t0, 0x1f	41	xori t0, t0, 0x1f
42	bne t0, t1, 1f	42	bne t0, t1, 1f
43	LONG_S t0, sp, PT_ERA	43	LONG_S t0, sp, PT_ERA
44	1: move a0, sp	44	1: move a0, sp
45	move a1, sp	45	move a1, sp
46	la.abs t0, do_vint	46	la.abs t0, do_vint
47	jirl ra, t0, 0	47	jirl ra, t0, 0
48	RESTORE_ALL_AND_RET	48	RESTORE_ALL_AND_RET
49	SYM_FUNC_END(handle_vint)	49	SYM_FUNC_END(handle_vint)
50		50
@@ -72,7 +72,7 @@ SYM_FUNC_END(except_vec_cex) · 21 unmodified lines
72	build_prep_\prep	72	build_prep_\prep
73	move a0, sp	73	move a0, sp
74	la.abs t0, do_\handler	74	la.abs t0, do_\handler
75	jirl ra, t0, 0	75	jirl ra, t0, 0
76	RESTORE_ALL_AND_RET	76	RESTORE_ALL_AND_RET
77	SYM_FUNC_END(handle_\exception)	77	SYM_FUNC_END(handle_\exception)
78	.endm	78	.endm
@@ -91,5 +91,5 @@ SYM_FUNC_END(except_vec_cex) · 12 unmodified lines
91		91
92	SYM_FUNC_START(handle_sys)	92	SYM_FUNC_START(handle_sys)
93	la.abs t0, handle_syscall	93	la.abs t0, handle_syscall
94	jirl zero, t0, 0	94	jr t0
95	SYM_FUNC_END(handle_sys)	95	SYM_FUNC_END(handle_sys)

arch/loongarch/kernel/head.S+4−4

@@ -32,7 +32,7 @@ SYM_CODE_START(kernel_entry) # kernel entry point · 31 unmodified lines
32	/* We might not get launched at the address the kernel is linked to,	32	/* We might not get launched at the address the kernel is linked to,
33	so we jump there. */	33	so we jump there. */
34	la.abs t0, 0f	34	la.abs t0, 0f
35	jirl zero, t0, 0	35	jr t0
36	0:	36	0:
37	la t0, __bss_start # clear .bss	37	la t0, __bss_start # clear .bss
38	st.d zero, t0, 0	38	st.d zero, t0, 0
@@ -50,7 +50,7 @@ SYM_CODE_START(kernel_entry) # kernel entry point · 11 unmodified lines
50	/* KSave3 used for percpu base, initialized as 0 */	50	/* KSave3 used for percpu base, initialized as 0 */
51	csrwr zero, PERCPU_BASE_KS	51	csrwr zero, PERCPU_BASE_KS
52	/* GPR21 used for percpu base (runtime), initialized as 0 */	52	/* GPR21 used for percpu base (runtime), initialized as 0 */
53	or u0, zero, zero	53	move u0, zero
54		54
55	la tp, init_thread_union	55	la tp, init_thread_union
56	/* Set the SP after an empty pt_regs. */	56	/* Set the SP after an empty pt_regs. */
@@ -85,8 +85,8 @@ SYM_CODE_START(smpboot_entry) · 28 unmodified lines
85	ld.d sp, t0, CPU_BOOT_STACK	85	ld.d sp, t0, CPU_BOOT_STACK
86	ld.d tp, t0, CPU_BOOT_TINFO	86	ld.d tp, t0, CPU_BOOT_TINFO
87		87
88	la.abs t0, 0f	88	la.abs t0, 0f
89	jirl zero, t0, 0	89	jr t0
90	0:	90	0:
91	bl start_secondary	91	bl start_secondary
92	SYM_CODE_END(smpboot_entry)	92	SYM_CODE_END(smpboot_entry)

arch/loongarch/kernel/ptrace.c+7−5

 		   const void *kbuf, const void __user *ubuf)
 {
 	const int fcc_start = NUM_FPU_REGS * sizeof(elf_fpreg_t);
-	const int fcc_end = fcc_start + sizeof(u64);
+	const int fcsr_start = fcc_start + sizeof(u64);
 	int err;
 	BUG_ON(count % sizeof(elf_fpreg_t));
 	if (err)
 		return err;
-	if (count > 0)
+	err |= user_regset_copyin(&pos, &count, &kbuf, &ubuf,
-		err |= user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+				  &target->thread.fpu.fcc, fcc_start,
-					  &target->thread.fpu.fcc,
+				  fcc_start + sizeof(u64));
-					  fcc_start, fcc_end);
+	err |= user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+				  &target->thread.fpu.fcsr, fcsr_start,
+				  fcsr_start + sizeof(u32));
 	return err;
 }

arch/loongarch/kernel/reset.c+0−1

@@ -13,7 +13,6 @@ · 12 unmodified lines
13	#include <linux/console.h>	13	#include <linux/console.h>
14		14
15	#include <acpi/reboot.h>	15	#include <acpi/reboot.h>
16	#include <asm/compiler.h>
17	#include <asm/idle.h>	16	#include <asm/idle.h>
18	#include <asm/loongarch.h>	17	#include <asm/loongarch.h>
19	#include <asm/reboot.h>	18	#include <asm/reboot.h>

arch/loongarch/kernel/setup.c+1−1

@@ -126,7 +126,7 @@ static void __init parse_bios_table(const struct dmi_header *dm) · 125 unmodified lines
126	char dmi_data = (char )dm;	126	char dmi_data = (char )dm;
127		127
128	bios_extern = *(dmi_data + SMBIOS_BIOSEXTERN_OFFSET);	128	bios_extern = *(dmi_data + SMBIOS_BIOSEXTERN_OFFSET);
129	b_info.bios_size = *(dmi_data + SMBIOS_BIOSSIZE_OFFSET);	129	b_info.bios_size = (*(dmi_data + SMBIOS_BIOSSIZE_OFFSET) + 1) << 6;
130		130
131	if (bios_extern & LOONGSON_EFI_ENABLE)	131	if (bios_extern & LOONGSON_EFI_ENABLE)
132	set_bit(EFI_BOOT, &efi.flags);	132	set_bit(EFI_BOOT, &efi.flags);

arch/loongarch/kernel/smp.c+13−100

@@ -278,116 +278,29 @@ void loongson3_cpu_die(unsigned int cpu) · 277 unmodified lines
278	mb();	278	mb();
279	}	279	}
280		280
281	/*	281	void play_dead(void)
282	* The target CPU should go to XKPRANGE (uncached area) and flush
283	* ICache/DCache/VCache before the control CPU can safely disable its clock.
284	*/
285	static void loongson3_play_dead(int *state_addr)
286	{	282	{
287	register int val;	283	register uint64_t addr;
288	register void *addr;
289	register void (*init_fn)(void);	284	register void (*init_fn)(void);
290		285
291	__asm__ __volatile__(	286	idle_task_exit();
292	" li.d %[addr], 0x8000000000000000\n"
293	"1: cacop 0x8, %[addr], 0 \n" /* flush ICache */
294	" cacop 0x8, %[addr], 1 \n"
295	" cacop 0x8, %[addr], 2 \n"
296	" cacop 0x8, %[addr], 3 \n"
297	" cacop 0x9, %[addr], 0 \n" /* flush DCache */
298	" cacop 0x9, %[addr], 1 \n"
299	" cacop 0x9, %[addr], 2 \n"
300	" cacop 0x9, %[addr], 3 \n"
301	" addi.w %[sets], %[sets], -1 \n"
302	" addi.d %[addr], %[addr], 0x40 \n"
303	" bnez %[sets], 1b \n"
304	" li.d %[addr], 0x8000000000000000\n"
305	"2: cacop 0xa, %[addr], 0 \n" /* flush VCache */
306	" cacop 0xa, %[addr], 1 \n"
307	" cacop 0xa, %[addr], 2 \n"
308	" cacop 0xa, %[addr], 3 \n"
309	" cacop 0xa, %[addr], 4 \n"
310	" cacop 0xa, %[addr], 5 \n"
311	" cacop 0xa, %[addr], 6 \n"
312	" cacop 0xa, %[addr], 7 \n"
313	" cacop 0xa, %[addr], 8 \n"
314	" cacop 0xa, %[addr], 9 \n"
315	" cacop 0xa, %[addr], 10 \n"
316	" cacop 0xa, %[addr], 11 \n"
317	" cacop 0xa, %[addr], 12 \n"
318	" cacop 0xa, %[addr], 13 \n"
319	" cacop 0xa, %[addr], 14 \n"
320	" cacop 0xa, %[addr], 15 \n"
321	" addi.w %[vsets], %[vsets], -1 \n"
322	" addi.d %[addr], %[addr], 0x40 \n"
323	" bnez %[vsets], 2b \n"
324	" li.w %[val], 0x7 \n" /* state_addr = CPU_DEAD; /
325	" st.w %[val], %[state_addr], 0 \n"
326	" dbar 0 \n"
327	" cacop 0x11, %[state_addr], 0 \n" /* flush entry of state_addr /
328	: [addr] "=&r" (addr), [val] "=&r" (val)
329	: [state_addr] "r" (state_addr),
330	[sets] "r" (cpu_data[smp_processor_id()].dcache.sets),
331	[vsets] "r" (cpu_data[smp_processor_id()].vcache.sets));
332
333	local_irq_enable();	287	local_irq_enable();
334	change_csr_ecfg(ECFG0_IM, ECFGF_IPI);	288	set_csr_ecfg(ECFGF_IPI);
		289	__this_cpu_write(cpu_state, CPU_DEAD);
		290
		291	__smp_mb();
		292	do {
		293	__asm__ __volatile__("idle 0\n\t");
		294	addr = iocsr_read64(LOONGARCH_IOCSR_MBUF0);
		295	} while (addr == 0);
335		296
336	__asm__ __volatile__(	297	init_fn = (void *)TO_CACHE(addr);
337	" idle 0 \n"	298	iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_CLEAR);
338	" li.w $t0, 0x1020 \n"
339	" iocsrrd.d %[init_fn], $t0 \n" /* Get init PC */
340	: [init_fn] "=&r" (addr)
341	: /* No Input */
342	: "a0");
343	init_fn = __va(addr);
344		299
345	init_fn();	300	init_fn();
346	unreachable();	301	unreachable();
347	}	302	}
348		303
349	void play_dead(void)
350	{
351	int *state_addr;
352	unsigned int cpu = smp_processor_id();
353	void (play_dead_uncached)(int s);
354
355	idle_task_exit();
356	play_dead_uncached = (void *)TO_UNCACHE(__pa((unsigned long)loongson3_play_dead));
357	state_addr = &per_cpu(cpu_state, cpu);
358	mb();
359	play_dead_uncached(state_addr);
360	}
361
362	static int loongson3_enable_clock(unsigned int cpu)
363	{
364	uint64_t core_id = cpu_data[cpu].core;
365	uint64_t package_id = cpu_data[cpu].package;
366
367	LOONGSON_FREQCTRL(package_id) \|= 1 << (core_id * 4 + 3);
368
369	return 0;
370	}
371
372	static int loongson3_disable_clock(unsigned int cpu)
373	{
374	uint64_t core_id = cpu_data[cpu].core;
375	uint64_t package_id = cpu_data[cpu].package;
376
377	LOONGSON_FREQCTRL(package_id) &= ~(1 << (core_id * 4 + 3));
378
379	return 0;
380	}
381
382	static int register_loongson3_notifier(void)
383	{
384	return cpuhp_setup_state_nocalls(CPUHP_LOONGARCH_SOC_PREPARE,
385	"loongarch/loongson:prepare",
386	loongson3_enable_clock,
387	loongson3_disable_clock);
388	}
389	early_initcall(register_loongson3_notifier);
390
391	#endif	304	#endif
392		305
393	/*	306	/*

arch/loongarch/kernel/switch.S+2−2

@@ -24,8 +24,8 @@ SYM_FUNC_START(__switch_to) · 23 unmodified lines
24	move tp, a2	24	move tp, a2
25	cpu_restore_nonscratch a1	25	cpu_restore_nonscratch a1
26		26
27	li.w t0, _THREAD_SIZE - 32	27	li.w t0, _THREAD_SIZE - 32
28	PTR_ADD t0, t0, tp	28	PTR_ADD t0, t0, tp
29	set_saved_sp t0, t1, t2	29	set_saved_sp t0, t1, t2
30		30
31	ldptr.d t1, a1, THREAD_CSRPRMD	31	ldptr.d t1, a1, THREAD_CSRPRMD

arch/loongarch/lib/clear_user.S+1−1

@@ -32,7 +32,7 @@ SYM_FUNC_START(__clear_user) · 31 unmodified lines
32	1: st.b zero, a0, 0	32	1: st.b zero, a0, 0
33	addi.d a0, a0, 1	33	addi.d a0, a0, 1
34	addi.d a1, a1, -1	34	addi.d a1, a1, -1
35	bgt a1, zero, 1b	35	bgtz a1, 1b
36		36
37	2: move a0, a1	37	2: move a0, a1
38	jr ra	38	jr ra

arch/loongarch/lib/copy_user.S+1−1

@@ -35,7 +35,7 @@ SYM_FUNC_START(__copy_user) · 34 unmodified lines
35	addi.d a0, a0, 1	35	addi.d a0, a0, 1
36	addi.d a1, a1, 1	36	addi.d a1, a1, 1
37	addi.d a2, a2, -1	37	addi.d a2, a2, -1
38	bgt a2, zero, 1b	38	bgtz a2, 1b
39		39
40	3: move a0, a2	40	3: move a0, a2
41	jr ra	41	jr ra

arch/loongarch/lib/delay.c+0−1

@@ -7,7 +7,6 @@ · 6 unmodified lines
7	#include <linux/smp.h>	7	#include <linux/smp.h>
8	#include <linux/timex.h>	8	#include <linux/timex.h>
9		9
10	#include <asm/compiler.h>
11	#include <asm/processor.h>	10	#include <asm/processor.h>
12		11
13	void __delay(unsigned long cycles)	12	void __delay(unsigned long cycles)

arch/loongarch/mm/page.S+59−59

@@ -10,75 +10,75 @@ · 9 unmodified lines
10		10
11	.align 5	11	.align 5
12	SYM_FUNC_START(clear_page)	12	SYM_FUNC_START(clear_page)
13	lu12i.w t0, 1 << (PAGE_SHIFT - 12)	13	lu12i.w t0, 1 << (PAGE_SHIFT - 12)
14	add.d t0, t0, a0	14	add.d t0, t0, a0
15	1:	15	1:
16	st.d zero, a0, 0	16	st.d zero, a0, 0
17	st.d zero, a0, 8	17	st.d zero, a0, 8
18	st.d zero, a0, 16	18	st.d zero, a0, 16
19	st.d zero, a0, 24	19	st.d zero, a0, 24
20	st.d zero, a0, 32	20	st.d zero, a0, 32
21	st.d zero, a0, 40	21	st.d zero, a0, 40
22	st.d zero, a0, 48	22	st.d zero, a0, 48
23	st.d zero, a0, 56	23	st.d zero, a0, 56
24	addi.d a0, a0, 128	24	addi.d a0, a0, 128
25	st.d zero, a0, -64	25	st.d zero, a0, -64
26	st.d zero, a0, -56	26	st.d zero, a0, -56
27	st.d zero, a0, -48	27	st.d zero, a0, -48
28	st.d zero, a0, -40	28	st.d zero, a0, -40
29	st.d zero, a0, -32	29	st.d zero, a0, -32
30	st.d zero, a0, -24	30	st.d zero, a0, -24
31	st.d zero, a0, -16	31	st.d zero, a0, -16
32	st.d zero, a0, -8	32	st.d zero, a0, -8
33	bne t0, a0, 1b	33	bne t0, a0, 1b
34		34
35	jirl $r0, ra, 0	35	jr ra
36	SYM_FUNC_END(clear_page)	36	SYM_FUNC_END(clear_page)
37	EXPORT_SYMBOL(clear_page)	37	EXPORT_SYMBOL(clear_page)
38		38
39	.align 5	39	.align 5
40	SYM_FUNC_START(copy_page)	40	SYM_FUNC_START(copy_page)
41	lu12i.w t8, 1 << (PAGE_SHIFT - 12)	41	lu12i.w t8, 1 << (PAGE_SHIFT - 12)
42	add.d t8, t8, a0	42	add.d t8, t8, a0
43	1:	43	1:
44	ld.d t0, a1, 0	44	ld.d t0, a1, 0
45	ld.d t1, a1, 8	45	ld.d t1, a1, 8
46	ld.d t2, a1, 16	46	ld.d t2, a1, 16
47	ld.d t3, a1, 24	47	ld.d t3, a1, 24
48	ld.d t4, a1, 32	48	ld.d t4, a1, 32
49	ld.d t5, a1, 40	49	ld.d t5, a1, 40
50	ld.d t6, a1, 48	50	ld.d t6, a1, 48
51	ld.d t7, a1, 56	51	ld.d t7, a1, 56
52		52
53	st.d t0, a0, 0	53	st.d t0, a0, 0
54	st.d t1, a0, 8	54	st.d t1, a0, 8
55	ld.d t0, a1, 64	55	ld.d t0, a1, 64
56	ld.d t1, a1, 72	56	ld.d t1, a1, 72
57	st.d t2, a0, 16	57	st.d t2, a0, 16
58	st.d t3, a0, 24	58	st.d t3, a0, 24
59	ld.d t2, a1, 80	59	ld.d t2, a1, 80
60	ld.d t3, a1, 88	60	ld.d t3, a1, 88
61	st.d t4, a0, 32	61	st.d t4, a0, 32
62	st.d t5, a0, 40	62	st.d t5, a0, 40
63	ld.d t4, a1, 96	63	ld.d t4, a1, 96
64	ld.d t5, a1, 104	64	ld.d t5, a1, 104
65	st.d t6, a0, 48	65	st.d t6, a0, 48
66	st.d t7, a0, 56	66	st.d t7, a0, 56
67	ld.d t6, a1, 112	67	ld.d t6, a1, 112
68	ld.d t7, a1, 120	68	ld.d t7, a1, 120
69	addi.d a0, a0, 128	69	addi.d a0, a0, 128
70	addi.d a1, a1, 128	70	addi.d a1, a1, 128
71		71
72	st.d t0, a0, -64	72	st.d t0, a0, -64
73	st.d t1, a0, -56	73	st.d t1, a0, -56
74	st.d t2, a0, -48	74	st.d t2, a0, -48
75	st.d t3, a0, -40	75	st.d t3, a0, -40
76	st.d t4, a0, -32	76	st.d t4, a0, -32
77	st.d t5, a0, -24	77	st.d t5, a0, -24
78	st.d t6, a0, -16	78	st.d t6, a0, -16
79	st.d t7, a0, -8	79	st.d t7, a0, -8
80		80
81	bne t8, a0, 1b	81	bne t8, a0, 1b
82	jirl $r0, ra, 0	82	jr ra
83	SYM_FUNC_END(copy_page)	83	SYM_FUNC_END(copy_page)
84	EXPORT_SYMBOL(copy_page)	84	EXPORT_SYMBOL(copy_page)

arch/loongarch/mm/tlbex.S+49−49

@@ -18,7 +18,7 @@ · 17 unmodified lines
18	REG_S a2, sp, PT_BVADDR	18	REG_S a2, sp, PT_BVADDR
19	li.w a1, \write	19	li.w a1, \write
20	la.abs t0, do_page_fault	20	la.abs t0, do_page_fault
21	jirl ra, t0, 0	21	jirl ra, t0, 0
22	RESTORE_ALL_AND_RET	22	RESTORE_ALL_AND_RET
23	SYM_FUNC_END(tlb_do_page_fault_\write)	23	SYM_FUNC_END(tlb_do_page_fault_\write)
24	.endm	24	.endm
@@ -34,7 +34,7 @@ SYM_FUNC_START(handle_tlb_protect) · 9 unmodified lines
34	csrrd a2, LOONGARCH_CSR_BADV	34	csrrd a2, LOONGARCH_CSR_BADV
35	REG_S a2, sp, PT_BVADDR	35	REG_S a2, sp, PT_BVADDR
36	la.abs t0, do_page_fault	36	la.abs t0, do_page_fault
37	jirl ra, t0, 0	37	jirl ra, t0, 0
38	RESTORE_ALL_AND_RET	38	RESTORE_ALL_AND_RET
39	SYM_FUNC_END(handle_tlb_protect)	39	SYM_FUNC_END(handle_tlb_protect)
40		40
@@ -47,7 +47,7 @@ SYM_FUNC_START(handle_tlb_load) · 6 unmodified lines
47	* The vmalloc handling is not in the hotpath.	47	* The vmalloc handling is not in the hotpath.
48	*/	48	*/
49	csrrd t0, LOONGARCH_CSR_BADV	49	csrrd t0, LOONGARCH_CSR_BADV
50	blt t0, $r0, vmalloc_load	50	bltz t0, vmalloc_load
51	csrrd t1, LOONGARCH_CSR_PGDL	51	csrrd t1, LOONGARCH_CSR_PGDL
52		52
53	vmalloc_done_load:	53	vmalloc_done_load:
@@ -80,7 +80,7 @@ vmalloc_done_load: · 26 unmodified lines
80	* see if we need to jump to huge tlb processing.	80	* see if we need to jump to huge tlb processing.
81	*/	81	*/
82	andi t0, ra, _PAGE_HUGE	82	andi t0, ra, _PAGE_HUGE
83	bne t0, $r0, tlb_huge_update_load	83	bnez t0, tlb_huge_update_load
84		84
85	csrrd t0, LOONGARCH_CSR_BADV	85	csrrd t0, LOONGARCH_CSR_BADV
86	srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)	86	srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)
@@ -100,12 +100,12 @@ smp_pgtable_change_load: · 13 unmodified lines
100		100
101	srli.d ra, t0, _PAGE_PRESENT_SHIFT	101	srli.d ra, t0, _PAGE_PRESENT_SHIFT
102	andi ra, ra, 1	102	andi ra, ra, 1
103	beq ra, $r0, nopage_tlb_load	103	beqz ra, nopage_tlb_load
104		104
105	ori t0, t0, _PAGE_VALID	105	ori t0, t0, _PAGE_VALID
106	#ifdef CONFIG_SMP	106	#ifdef CONFIG_SMP
107	sc.d t0, t1, 0	107	sc.d t0, t1, 0
108	beq t0, $r0, smp_pgtable_change_load	108	beqz t0, smp_pgtable_change_load
109	#else	109	#else
110	st.d t0, t1, 0	110	st.d t0, t1, 0
111	#endif	111	#endif
@@ -139,23 +139,23 @@ tlb_huge_update_load: · 27 unmodified lines
139	#endif	139	#endif
140	srli.d ra, t0, _PAGE_PRESENT_SHIFT	140	srli.d ra, t0, _PAGE_PRESENT_SHIFT
141	andi ra, ra, 1	141	andi ra, ra, 1
142	beq ra, $r0, nopage_tlb_load	142	beqz ra, nopage_tlb_load
143	tlbsrch	143	tlbsrch
144		144
145	ori t0, t0, _PAGE_VALID	145	ori t0, t0, _PAGE_VALID
146	#ifdef CONFIG_SMP	146	#ifdef CONFIG_SMP
147	sc.d t0, t1, 0	147	sc.d t0, t1, 0
148	beq t0, $r0, tlb_huge_update_load	148	beqz t0, tlb_huge_update_load
149	ld.d t0, t1, 0	149	ld.d t0, t1, 0
150	#else	150	#else
151	st.d t0, t1, 0	151	st.d t0, t1, 0
152	#endif	152	#endif
153	addu16i.d t1, $r0, -(CSR_TLBIDX_EHINV >> 16)	153	addu16i.d t1, zero, -(CSR_TLBIDX_EHINV >> 16)
154	addi.d ra, t1, 0	154	addi.d ra, t1, 0
155	csrxchg ra, t1, LOONGARCH_CSR_TLBIDX	155	csrxchg ra, t1, LOONGARCH_CSR_TLBIDX
156	tlbwr	156	tlbwr
157		157
158	csrxchg $r0, t1, LOONGARCH_CSR_TLBIDX	158	csrxchg zero, t1, LOONGARCH_CSR_TLBIDX
159		159
160	/*	160	/*
161	* A huge PTE describes an area the size of the	161	* A huge PTE describes an area the size of the
@@ -178,27 +178,27 @@ tlb_huge_update_load: · 16 unmodified lines
178	addi.d t0, ra, 0	178	addi.d t0, ra, 0
179		179
180	/* Convert to entrylo1 */	180	/* Convert to entrylo1 */
181	addi.d t1, $r0, 1	181	addi.d t1, zero, 1
182	slli.d t1, t1, (HPAGE_SHIFT - 1)	182	slli.d t1, t1, (HPAGE_SHIFT - 1)
183	add.d t0, t0, t1	183	add.d t0, t0, t1
184	csrwr t0, LOONGARCH_CSR_TLBELO1	184	csrwr t0, LOONGARCH_CSR_TLBELO1
185		185
186	/* Set huge page tlb entry size */	186	/* Set huge page tlb entry size */
187	addu16i.d t0, $r0, (CSR_TLBIDX_PS >> 16)	187	addu16i.d t0, zero, (CSR_TLBIDX_PS >> 16)
188	addu16i.d t1, $r0, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))	188	addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
189	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX	189	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
190		190
191	tlbfill	191	tlbfill
192		192
193	addu16i.d t0, $r0, (CSR_TLBIDX_PS >> 16)	193	addu16i.d t0, zero, (CSR_TLBIDX_PS >> 16)
194	addu16i.d t1, $r0, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))	194	addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
195	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX	195	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
196		196
197	nopage_tlb_load:	197	nopage_tlb_load:
198	dbar 0	198	dbar 0
199	csrrd ra, EXCEPTION_KS2	199	csrrd ra, EXCEPTION_KS2
200	la.abs t0, tlb_do_page_fault_0	200	la.abs t0, tlb_do_page_fault_0
201	jirl $r0, t0, 0	201	jr t0
202	SYM_FUNC_END(handle_tlb_load)	202	SYM_FUNC_END(handle_tlb_load)
203		203
204	SYM_FUNC_START(handle_tlb_store)	204	SYM_FUNC_START(handle_tlb_store)
@@ -210,7 +210,7 @@ SYM_FUNC_START(handle_tlb_store) · 5 unmodified lines
210	* The vmalloc handling is not in the hotpath.	210	* The vmalloc handling is not in the hotpath.
211	*/	211	*/
212	csrrd t0, LOONGARCH_CSR_BADV	212	csrrd t0, LOONGARCH_CSR_BADV
213	blt t0, $r0, vmalloc_store	213	bltz t0, vmalloc_store
214	csrrd t1, LOONGARCH_CSR_PGDL	214	csrrd t1, LOONGARCH_CSR_PGDL
215		215
216	vmalloc_done_store:	216	vmalloc_done_store:
@@ -244,7 +244,7 @@ vmalloc_done_store: · 27 unmodified lines
244	* see if we need to jump to huge tlb processing.	244	* see if we need to jump to huge tlb processing.
245	*/	245	*/
246	andi t0, ra, _PAGE_HUGE	246	andi t0, ra, _PAGE_HUGE
247	bne t0, $r0, tlb_huge_update_store	247	bnez t0, tlb_huge_update_store
248		248
249	csrrd t0, LOONGARCH_CSR_BADV	249	csrrd t0, LOONGARCH_CSR_BADV
250	srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)	250	srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)
@@ -265,12 +265,12 @@ smp_pgtable_change_store: · 14 unmodified lines
265	srli.d ra, t0, _PAGE_PRESENT_SHIFT	265	srli.d ra, t0, _PAGE_PRESENT_SHIFT
266	andi ra, ra, ((_PAGE_PRESENT \| _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)	266	andi ra, ra, ((_PAGE_PRESENT \| _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)
267	xori ra, ra, ((_PAGE_PRESENT \| _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)	267	xori ra, ra, ((_PAGE_PRESENT \| _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)
268	bne ra, $r0, nopage_tlb_store	268	bnez ra, nopage_tlb_store
269		269
270	ori t0, t0, (_PAGE_VALID \| _PAGE_DIRTY \| _PAGE_MODIFIED)	270	ori t0, t0, (_PAGE_VALID \| _PAGE_DIRTY \| _PAGE_MODIFIED)
271	#ifdef CONFIG_SMP	271	#ifdef CONFIG_SMP
272	sc.d t0, t1, 0	272	sc.d t0, t1, 0
273	beq t0, $r0, smp_pgtable_change_store	273	beqz t0, smp_pgtable_change_store
274	#else	274	#else
275	st.d t0, t1, 0	275	st.d t0, t1, 0
276	#endif	276	#endif
@@ -306,24 +306,24 @@ tlb_huge_update_store: · 29 unmodified lines
306	srli.d ra, t0, _PAGE_PRESENT_SHIFT	306	srli.d ra, t0, _PAGE_PRESENT_SHIFT
307	andi ra, ra, ((_PAGE_PRESENT \| _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)	307	andi ra, ra, ((_PAGE_PRESENT \| _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)
308	xori ra, ra, ((_PAGE_PRESENT \| _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)	308	xori ra, ra, ((_PAGE_PRESENT \| _PAGE_WRITE) >> _PAGE_PRESENT_SHIFT)
309	bne ra, $r0, nopage_tlb_store	309	bnez ra, nopage_tlb_store
310		310
311	tlbsrch	311	tlbsrch
312	ori t0, t0, (_PAGE_VALID \| _PAGE_DIRTY \| _PAGE_MODIFIED)	312	ori t0, t0, (_PAGE_VALID \| _PAGE_DIRTY \| _PAGE_MODIFIED)
313		313
314	#ifdef CONFIG_SMP	314	#ifdef CONFIG_SMP
315	sc.d t0, t1, 0	315	sc.d t0, t1, 0
316	beq t0, $r0, tlb_huge_update_store	316	beqz t0, tlb_huge_update_store
317	ld.d t0, t1, 0	317	ld.d t0, t1, 0
318	#else	318	#else
319	st.d t0, t1, 0	319	st.d t0, t1, 0
320	#endif	320	#endif
321	addu16i.d t1, $r0, -(CSR_TLBIDX_EHINV >> 16)	321	addu16i.d t1, zero, -(CSR_TLBIDX_EHINV >> 16)
322	addi.d ra, t1, 0	322	addi.d ra, t1, 0
323	csrxchg ra, t1, LOONGARCH_CSR_TLBIDX	323	csrxchg ra, t1, LOONGARCH_CSR_TLBIDX
324	tlbwr	324	tlbwr
325		325
326	csrxchg $r0, t1, LOONGARCH_CSR_TLBIDX	326	csrxchg zero, t1, LOONGARCH_CSR_TLBIDX
327	/*	327	/*
328	* A huge PTE describes an area the size of the	328	* A huge PTE describes an area the size of the
329	* configured huge page size. This is twice the	329	* configured huge page size. This is twice the
@@ -345,28 +345,28 @@ tlb_huge_update_store: · 15 unmodified lines
345	addi.d t0, ra, 0	345	addi.d t0, ra, 0
346		346
347	/* Convert to entrylo1 */	347	/* Convert to entrylo1 */
348	addi.d t1, $r0, 1	348	addi.d t1, zero, 1
349	slli.d t1, t1, (HPAGE_SHIFT - 1)	349	slli.d t1, t1, (HPAGE_SHIFT - 1)
350	add.d t0, t0, t1	350	add.d t0, t0, t1
351	csrwr t0, LOONGARCH_CSR_TLBELO1	351	csrwr t0, LOONGARCH_CSR_TLBELO1
352		352
353	/* Set huge page tlb entry size */	353	/* Set huge page tlb entry size */
354	addu16i.d t0, $r0, (CSR_TLBIDX_PS >> 16)	354	addu16i.d t0, zero, (CSR_TLBIDX_PS >> 16)
355	addu16i.d t1, $r0, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))	355	addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
356	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX	356	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
357		357
358	tlbfill	358	tlbfill
359		359
360	/* Reset default page size */	360	/* Reset default page size */
361	addu16i.d t0, $r0, (CSR_TLBIDX_PS >> 16)	361	addu16i.d t0, zero, (CSR_TLBIDX_PS >> 16)
362	addu16i.d t1, $r0, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))	362	addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
363	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX	363	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
364		364
365	nopage_tlb_store:	365	nopage_tlb_store:
366	dbar 0	366	dbar 0
367	csrrd ra, EXCEPTION_KS2	367	csrrd ra, EXCEPTION_KS2
368	la.abs t0, tlb_do_page_fault_1	368	la.abs t0, tlb_do_page_fault_1
369	jirl $r0, t0, 0	369	jr t0
370	SYM_FUNC_END(handle_tlb_store)	370	SYM_FUNC_END(handle_tlb_store)
371		371
372	SYM_FUNC_START(handle_tlb_modify)	372	SYM_FUNC_START(handle_tlb_modify)
@@ -378,7 +378,7 @@ SYM_FUNC_START(handle_tlb_modify) · 5 unmodified lines
378	* The vmalloc handling is not in the hotpath.	378	* The vmalloc handling is not in the hotpath.
379	*/	379	*/
380	csrrd t0, LOONGARCH_CSR_BADV	380	csrrd t0, LOONGARCH_CSR_BADV
381	blt t0, $r0, vmalloc_modify	381	bltz t0, vmalloc_modify
382	csrrd t1, LOONGARCH_CSR_PGDL	382	csrrd t1, LOONGARCH_CSR_PGDL
383		383
384	vmalloc_done_modify:	384	vmalloc_done_modify:
@@ -411,7 +411,7 @@ vmalloc_done_modify: · 26 unmodified lines
411	* see if we need to jump to huge tlb processing.	411	* see if we need to jump to huge tlb processing.
412	*/	412	*/
413	andi t0, ra, _PAGE_HUGE	413	andi t0, ra, _PAGE_HUGE
414	bne t0, $r0, tlb_huge_update_modify	414	bnez t0, tlb_huge_update_modify
415		415
416	csrrd t0, LOONGARCH_CSR_BADV	416	csrrd t0, LOONGARCH_CSR_BADV
417	srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)	417	srli.d t0, t0, (PAGE_SHIFT + PTE_ORDER)
@@ -431,12 +431,12 @@ smp_pgtable_change_modify: · 13 unmodified lines
431		431
432	srli.d ra, t0, _PAGE_WRITE_SHIFT	432	srli.d ra, t0, _PAGE_WRITE_SHIFT
433	andi ra, ra, 1	433	andi ra, ra, 1
434	beq ra, $r0, nopage_tlb_modify	434	beqz ra, nopage_tlb_modify
435		435
436	ori t0, t0, (_PAGE_VALID \| _PAGE_DIRTY \| _PAGE_MODIFIED)	436	ori t0, t0, (_PAGE_VALID \| _PAGE_DIRTY \| _PAGE_MODIFIED)
437	#ifdef CONFIG_SMP	437	#ifdef CONFIG_SMP
438	sc.d t0, t1, 0	438	sc.d t0, t1, 0
439	beq t0, $r0, smp_pgtable_change_modify	439	beqz t0, smp_pgtable_change_modify
440	#else	440	#else
441	st.d t0, t1, 0	441	st.d t0, t1, 0
442	#endif	442	#endif
@@ -454,7 +454,7 @@ leave_modify: · 11 unmodified lines
454	ertn	454	ertn
455	#ifdef CONFIG_64BIT	455	#ifdef CONFIG_64BIT
456	vmalloc_modify:	456	vmalloc_modify:
457	la.abs t1, swapper_pg_dir	457	la.abs t1, swapper_pg_dir
458	b vmalloc_done_modify	458	b vmalloc_done_modify
459	#endif	459	#endif
460		460
@@ -471,14 +471,14 @@ tlb_huge_update_modify: · 10 unmodified lines
471		471
472	srli.d ra, t0, _PAGE_WRITE_SHIFT	472	srli.d ra, t0, _PAGE_WRITE_SHIFT
473	andi ra, ra, 1	473	andi ra, ra, 1
474	beq ra, $r0, nopage_tlb_modify	474	beqz ra, nopage_tlb_modify
475		475
476	tlbsrch	476	tlbsrch
477	ori t0, t0, (_PAGE_VALID \| _PAGE_DIRTY \| _PAGE_MODIFIED)	477	ori t0, t0, (_PAGE_VALID \| _PAGE_DIRTY \| _PAGE_MODIFIED)
478		478
479	#ifdef CONFIG_SMP	479	#ifdef CONFIG_SMP
480	sc.d t0, t1, 0	480	sc.d t0, t1, 0
481	beq t0, $r0, tlb_huge_update_modify	481	beqz t0, tlb_huge_update_modify
482	ld.d t0, t1, 0	482	ld.d t0, t1, 0
483	#else	483	#else
484	st.d t0, t1, 0	484	st.d t0, t1, 0
@@ -504,28 +504,28 @@ tlb_huge_update_modify: · 19 unmodified lines
504	addi.d t0, ra, 0	504	addi.d t0, ra, 0
505		505
506	/* Convert to entrylo1 */	506	/* Convert to entrylo1 */
507	addi.d t1, $r0, 1	507	addi.d t1, zero, 1
508	slli.d t1, t1, (HPAGE_SHIFT - 1)	508	slli.d t1, t1, (HPAGE_SHIFT - 1)
509	add.d t0, t0, t1	509	add.d t0, t0, t1
510	csrwr t0, LOONGARCH_CSR_TLBELO1	510	csrwr t0, LOONGARCH_CSR_TLBELO1
511		511
512	/* Set huge page tlb entry size */	512	/* Set huge page tlb entry size */
513	addu16i.d t0, $r0, (CSR_TLBIDX_PS >> 16)	513	addu16i.d t0, zero, (CSR_TLBIDX_PS >> 16)
514	addu16i.d t1, $r0, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))	514	addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
515	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX	515	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
516		516
517	tlbwr	517	tlbwr
518		518
519	/* Reset default page size */	519	/* Reset default page size */
520	addu16i.d t0, $r0, (CSR_TLBIDX_PS >> 16)	520	addu16i.d t0, zero, (CSR_TLBIDX_PS >> 16)
521	addu16i.d t1, $r0, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))	521	addu16i.d t1, zero, (PS_DEFAULT_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
522	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX	522	csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
523		523
524	nopage_tlb_modify:	524	nopage_tlb_modify:
525	dbar 0	525	dbar 0
526	csrrd ra, EXCEPTION_KS2	526	csrrd ra, EXCEPTION_KS2
527	la.abs t0, tlb_do_page_fault_1	527	la.abs t0, tlb_do_page_fault_1
528	jirl $r0, t0, 0	528	jr t0
529	SYM_FUNC_END(handle_tlb_modify)	529	SYM_FUNC_END(handle_tlb_modify)
530		530
531	SYM_FUNC_START(handle_tlb_refill)	531	SYM_FUNC_START(handle_tlb_refill)

arch/powerpc/Kconfig+4−0

 	# Please keep this list sorted alphabetically.
 	#
+config PPC_LONG_DOUBLE_128
+	depends on PPC64
+	def_bool $(success,test "$(shell,echo __LONG_DOUBLE_128__ | $(CC) -E -P -)" = 1)
 config PPC_BARRIER_NOSPEC
 	bool
 	default y

arch/powerpc/kernel/Makefile+1−0

@@ -20,6 +20,7 @@ CFLAGS_prom.o += $(DISABLE_LATENT_ENTROPY_PLUGIN) · 19 unmodified lines
20	CFLAGS_prom_init.o += -fno-stack-protector	20	CFLAGS_prom_init.o += -fno-stack-protector
21	CFLAGS_prom_init.o += -DDISABLE_BRANCH_PROFILING	21	CFLAGS_prom_init.o += -DDISABLE_BRANCH_PROFILING
22	CFLAGS_prom_init.o += -ffreestanding	22	CFLAGS_prom_init.o += -ffreestanding
		23	CFLAGS_prom_init.o += $(call cc-option, -ftrivial-auto-var-init=uninitialized)
23		24
24	ifdef CONFIG_FUNCTION_TRACER	25	ifdef CONFIG_FUNCTION_TRACER
25	# Do not trace early boot code	26	# Do not trace early boot code

arch/riscv/Makefile+1−1

@@ -111,7 +111,7 @@ PHONY += vdso_install · 110 unmodified lines
111	vdso_install:	111	vdso_install:
112	$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@	112	$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@
113	$(if $(CONFIG_COMPAT),$(Q)$(MAKE) \	113	$(if $(CONFIG_COMPAT),$(Q)$(MAKE) \
114	$(build)=arch/riscv/kernel/compat_vdso $@)	114	$(build)=arch/riscv/kernel/compat_vdso compat_$@)
115		115
116	ifeq ($(KBUILD_EXTMOD),)	116	ifeq ($(KBUILD_EXTMOD),)
117	ifeq ($(CONFIG_MMU),y)	117	ifeq ($(CONFIG_MMU),y)

arch/x86/include/asm/sev.h+1−6

@@ -72,7 +72,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits) · 71 unmodified lines
72		72
73	struct real_mode_header;	73	struct real_mode_header;
74	enum stack_type;	74	enum stack_type;
75	struct ghcb;
76		75
77	/* Early IDT entry points for #VC handler */	76	/* Early IDT entry points for #VC handler */
78	extern void vc_no_ghcb(void);	77	extern void vc_no_ghcb(void);
@@ -156,11 +155,7 @@ static __always_inline void sev_es_nmi_complete(void) · 77 unmodified lines
156	__sev_es_nmi_complete();	155	__sev_es_nmi_complete();
157	}	156	}
158	extern int __init sev_es_efi_map_ghcbs(pgd_t *pgd);	157	extern int __init sev_es_efi_map_ghcbs(pgd_t *pgd);
159	extern enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,	158
160	bool set_ghcb_msr,
161	struct es_em_ctxt *ctxt,
162	u64 exit_code, u64 exit_info_1,
163	u64 exit_info_2);
164	static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs)	159	static inline int rmpadjust(unsigned long vaddr, bool rmp_psize, unsigned long attrs)
165	{	160	{
166	int rc;	161	int rc;

arch/x86/kernel/cpu/bugs.c+1−0

@@ -1520,6 +1520,7 @@ static void __init spectre_v2_select_mitigation(void) · 1519 unmodified lines
1520	* enable IBRS around firmware calls.	1520	* enable IBRS around firmware calls.
1521	*/	1521	*/
1522	if (boot_cpu_has_bug(X86_BUG_RETBLEED) &&	1522	if (boot_cpu_has_bug(X86_BUG_RETBLEED) &&
		1523	boot_cpu_has(X86_FEATURE_IBPB) &&
1523	(boot_cpu_data.x86_vendor == X86_VENDOR_AMD \|\|	1524	(boot_cpu_data.x86_vendor == X86_VENDOR_AMD \|\|
1524	boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)) {	1525	boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)) {
1525		1526

arch/x86/kernel/sev-shared.c+9−16

 	return ES_VMM_ERROR;
 }
-enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, bool set_ghcb_msr,
+static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
-				   struct es_em_ctxt *ctxt, u64 exit_code,
+					  struct es_em_ctxt *ctxt,
-				   u64 exit_info_1, u64 exit_info_2)
+					  u64 exit_code, u64 exit_info_1,
+					  u64 exit_info_2)
 {
 	/* Fill in protocol and format specifiers */
 	ghcb->protocol_version = ghcb_version;
 	ghcb_set_sw_exit_info_1(ghcb, exit_info_1);
 	ghcb_set_sw_exit_info_2(ghcb, exit_info_2);
-	/*
+	sev_es_wr_ghcb_msr(__pa(ghcb));
-	 * Hyper-V unenlightened guests use a paravisor for communicating and
-	 * GHCB pages are being allocated and set up by that paravisor. Linux
-	 * should not change the GHCB page's physical address.
-	 */
-	if (set_ghcb_msr)
-		sev_es_wr_ghcb_msr(__pa(ghcb));
 	VMGEXIT();
 	return verify_exception_info(ghcb, ctxt);
 		 */
 		sw_scratch = __pa(ghcb) + offsetof(struct ghcb, shared_buffer);
 		ghcb_set_sw_scratch(ghcb, sw_scratch);
-		ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_IOIO,
+		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO,
 					  exit_info_1, exit_info_2);
 		if (ret != ES_OK)
 			return ret;
 		ghcb_set_rax(ghcb, rax);
-		ret = sev_es_ghcb_hv_call(ghcb, true, ctxt,
+		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO, exit_info_1, 0);
-					  SVM_EXIT_IOIO, exit_info_1, 0);
 		if (ret != ES_OK)
 			return ret;
 		/* xgetbv will cause #GP - use reset value for xcr0 */
 		ghcb_set_xcr0(ghcb, 1);
-	ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_CPUID, 0, 0);
+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_CPUID, 0, 0);
 	if (ret != ES_OK)
 		return ret;
 	bool rdtscp = (exit_code == SVM_EXIT_RDTSCP);
 	enum es_result ret;
-	ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, exit_code, 0, 0);
+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, 0, 0);
 	if (ret != ES_OK)
 		return ret;

arch/x86/kernel/sev.c+8−9

 		ghcb_set_sw_scratch(ghcb, (u64)__pa(data));
 		/* This will advance the shared buffer data points to. */
-		ret = sev_es_ghcb_hv_call(ghcb, true, &ctxt, SVM_VMGEXIT_PSC, 0, 0);
+		ret = sev_es_ghcb_hv_call(ghcb, &ctxt, SVM_VMGEXIT_PSC, 0, 0);
 		/*
 		 * Page State Change VMGEXIT can pass error code through
 		ghcb_set_rdx(ghcb, regs->dx);
 	}
-	ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_MSR,
+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, exit_info_1, 0);
-				  exit_info_1, 0);
 	if ((ret == ES_OK) && (!exit_info_1)) {
 		regs->ax = ghcb->save.rax;
 	ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer));
-	return sev_es_ghcb_hv_call(ghcb, true, ctxt, exit_code, exit_info_1, exit_info_2);
+	return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2);
 }
 /*
 	/* Using a value of 0 for ExitInfo1 means RAX holds the value */
 	ghcb_set_rax(ghcb, val);
-	ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_WRITE_DR7, 0, 0);
+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0);
 	if (ret != ES_OK)
 		return ret;
 static enum es_result vc_handle_wbinvd(struct ghcb *ghcb,
 				       struct es_em_ctxt *ctxt)
 {
-	return sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_WBINVD, 0, 0);
+	return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0);
 }
 static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
 	ghcb_set_rcx(ghcb, ctxt->regs->cx);
-	ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_RDPMC, 0, 0);
+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0);
 	if (ret != ES_OK)
 		return ret;
 	if (x86_platform.hyper.sev_es_hcall_prepare)
 		x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt->regs);
-	ret = sev_es_ghcb_hv_call(ghcb, true, ctxt, SVM_EXIT_VMMCALL, 0, 0);
+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0);
 	if (ret != ES_OK)
 		return ret;
 		ghcb_set_rbx(ghcb, input->data_npages);
 	}
-	ret = sev_es_ghcb_hv_call(ghcb, true, &ctxt, exit_code, input->req_gpa, input->resp_gpa);
+	ret = sev_es_ghcb_hv_call(ghcb, &ctxt, exit_code, input->req_gpa, input->resp_gpa);
 	if (ret)
 		goto e_put;

drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c+1−0

@@ -138,6 +138,7 @@ static struct ccu_common *sun50i_h6_r_ccu_clks[] = { · 137 unmodified lines
138	&r_apb2_rsb_clk.common,	138	&r_apb2_rsb_clk.common,
139	&r_apb1_ir_clk.common,	139	&r_apb1_ir_clk.common,
140	&r_apb1_w1_clk.common,	140	&r_apb1_w1_clk.common,
		141	&r_apb1_rtc_clk.common,
141	&ir_clk.common,	142	&ir_clk.common,
142	&w1_clk.common,	143	&w1_clk.common,
143	};	144	};

drivers/edac/ghes_edac.c+8−3

 	dmi_memdev_name(handle, &bank, &device);
-	/* both strings must be non-zero */
+	/*
-	if (bank && *bank && device && *device)
+	 * Set to a NULL string when both bank and device are zero. In this case,
-		snprintf(dimm->label, sizeof(dimm->label), "%s %s", bank, device);
+	 * the label assigned by default will be preserved.
+	 */
+	snprintf(dimm->label, sizeof(dimm->label), "%s%s%s",
+		 (bank && *bank) ? bank : "",
+		 (bank && *bank && device && *device) ? " " : "",
+		 (device && *device) ? device : "");
 }
 static void assign_dmi_dimm_info(struct dimm_info *dimm, struct memdev_dmi_entry *entry)

drivers/edac/synopsys_edac.c+25−19

 	memset(p, 0, sizeof(*p));
 }
+static void enable_intr(struct synps_edac_priv *priv)
+{
+	/* Enable UE/CE Interrupts */
+	if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)
+		writel(DDR_UE_MASK | DDR_CE_MASK,
+		       priv->baseaddr + ECC_CLR_OFST);
+	else
+		writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,
+		       priv->baseaddr + DDR_QOS_IRQ_EN_OFST);
+}
+static void disable_intr(struct synps_edac_priv *priv)
+{
+	/* Disable UE/CE Interrupts */
+	if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)
+		writel(0x0, priv->baseaddr + ECC_CLR_OFST);
+	else
+		writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,
+		       priv->baseaddr + DDR_QOS_IRQ_DB_OFST);
+}
 /**
  * intr_handler - Interrupt Handler for ECC interrupts.
  * @irq:        IRQ number.
 	/* v3.0 of the controller does not have this register */
 	if (!(priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR))
 		writel(regval, priv->baseaddr + DDR_QOS_IRQ_STAT_OFST);
+	else
+		enable_intr(priv);
 	return IRQ_HANDLED;
 }
 	init_csrows(mci);
 }
-static void enable_intr(struct synps_edac_priv *priv)
-{
-	/* Enable UE/CE Interrupts */
-	if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)
-		writel(DDR_UE_MASK | DDR_CE_MASK,
-		       priv->baseaddr + ECC_CLR_OFST);
-	else
-		writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,
-		       priv->baseaddr + DDR_QOS_IRQ_EN_OFST);
-}
-static void disable_intr(struct synps_edac_priv *priv)
-{
-	/* Disable UE/CE Interrupts */
-	writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK,
-			priv->baseaddr + DDR_QOS_IRQ_DB_OFST);
-}
 static int setup_irq(struct mem_ctl_info *mci,
 		     struct platform_device *pdev)
 {

drivers/gpu/drm/amd/display/Kconfig+1−1

@@ -6,7 +6,7 @@ config DRM_AMD_DC · 5 unmodified lines
6	bool "AMD DC - Enable new display engine"	6	bool "AMD DC - Enable new display engine"
7	default y	7	default y
8	select SND_HDA_COMPONENT if SND_HDA_CORE	8	select SND_HDA_COMPONENT if SND_HDA_CORE
9	select DRM_AMD_DC_DCN if X86 && !(KCOV_INSTRUMENT_ALL && KCOV_ENABLE_COMPARISONS)	9	select DRM_AMD_DC_DCN if (X86 \|\| PPC_LONG_DOUBLE_128) && !(KCOV_INSTRUMENT_ALL && KCOV_ENABLE_COMPARISONS)
10	help	10	help
11	Choose this option if you want to use the new display engine	11	Choose this option if you want to use the new display engine
12	support for AMDGPU. This adds required support for Vega and	12	support for AMDGPU. This adds required support for Vega and

drivers/gpu/drm/i915/gt/intel_engine.h+2−0

@@ -201,6 +201,8 @@ int intel_ring_submission_setup(struct intel_engine_cs *engine); · 200 unmodified lines
201	int intel_engine_stop_cs(struct intel_engine_cs *engine);	201	int intel_engine_stop_cs(struct intel_engine_cs *engine);
202	void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine);	202	void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine);
203		203
		204	void intel_engine_wait_for_pending_mi_fw(struct intel_engine_cs *engine);
		205
204	void intel_engine_set_hwsp_writemask(struct intel_engine_cs *engine, u32 mask);	206	void intel_engine_set_hwsp_writemask(struct intel_engine_cs *engine, u32 mask);
205		207
206	u64 intel_engine_get_active_head(const struct intel_engine_cs *engine);	208	u64 intel_engine_get_active_head(const struct intel_engine_cs *engine);

drivers/gpu/drm/i915/gt/intel_engine_cs.c+86−2

@@ -1282,10 +1282,10 @@ static int __intel_engine_stop_cs(struct intel_engine_cs *engine, · 1281 unmodified lines
1282	intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING));	1282	intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING));
1283		1283
1284	/*	1284	/*
1285	* Wa_22011802037 : gen12, Prior to doing a reset, ensure CS is	1285	* Wa_22011802037 : gen11, gen12, Prior to doing a reset, ensure CS is
1286	* stopped, set ring stop bit and prefetch disable bit to halt CS	1286	* stopped, set ring stop bit and prefetch disable bit to halt CS
1287	*/	1287	*/
1288	if (GRAPHICS_VER(engine->i915) == 12)	1288	if (IS_GRAPHICS_VER(engine->i915, 11, 12))
1289	intel_uncore_write_fw(uncore, RING_MODE_GEN7(engine->mmio_base),	1289	intel_uncore_write_fw(uncore, RING_MODE_GEN7(engine->mmio_base),
1290	_MASKED_BIT_ENABLE(GEN12_GFX_PREFETCH_DISABLE));	1290	_MASKED_BIT_ENABLE(GEN12_GFX_PREFETCH_DISABLE));
1291		1291
@@ -1308,6 +1308,18 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine) · 16 unmodified lines
1308	return -ENODEV;	1308	return -ENODEV;
1309		1309
1310	ENGINE_TRACE(engine, "\n");	1310	ENGINE_TRACE(engine, "\n");
		1311	/*
		1312	* TODO: Find out why occasionally stopping the CS times out. Seen
		1313	* especially with gem_eio tests.
		1314	*
		1315	* Occasionally trying to stop the cs times out, but does not adversely
		1316	* affect functionality. The timeout is set as a config parameter that
		1317	* defaults to 100ms. In most cases the follow up operation is to wait
		1318	* for pending MI_FORCE_WAKES. The assumption is that this timeout is
		1319	* sufficient for any pending MI_FORCEWAKEs to complete. Once root
		1320	* caused, the caller must check and handle the return from this
		1321	* function.
		1322	*/
1311	if (__intel_engine_stop_cs(engine, 1000, stop_timeout(engine))) {	1323	if (__intel_engine_stop_cs(engine, 1000, stop_timeout(engine))) {
1312	ENGINE_TRACE(engine,	1324	ENGINE_TRACE(engine,
1313	"timed out on STOP_RING -> IDLE; HEAD:%04x, TAIL:%04x\n",	1325	"timed out on STOP_RING -> IDLE; HEAD:%04x, TAIL:%04x\n",
@@ -1334,6 +1346,78 @@ void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine) · 20 unmodified lines
1334	ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));	1346	ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));
1335	}	1347	}
1336		1348
		1349	static u32 __cs_pending_mi_force_wakes(struct intel_engine_cs *engine)
		1350	{
		1351	static const i915_reg_t _reg[I915_NUM_ENGINES] = {
		1352	[RCS0] = MSG_IDLE_CS,
		1353	[BCS0] = MSG_IDLE_BCS,
		1354	[VCS0] = MSG_IDLE_VCS0,
		1355	[VCS1] = MSG_IDLE_VCS1,
		1356	[VCS2] = MSG_IDLE_VCS2,
		1357	[VCS3] = MSG_IDLE_VCS3,
		1358	[VCS4] = MSG_IDLE_VCS4,
		1359	[VCS5] = MSG_IDLE_VCS5,
		1360	[VCS6] = MSG_IDLE_VCS6,
		1361	[VCS7] = MSG_IDLE_VCS7,
		1362	[VECS0] = MSG_IDLE_VECS0,
		1363	[VECS1] = MSG_IDLE_VECS1,
		1364	[VECS2] = MSG_IDLE_VECS2,
		1365	[VECS3] = MSG_IDLE_VECS3,
		1366	[CCS0] = MSG_IDLE_CS,
		1367	[CCS1] = MSG_IDLE_CS,
		1368	[CCS2] = MSG_IDLE_CS,
		1369	[CCS3] = MSG_IDLE_CS,
		1370	};
		1371	u32 val;
		1372
		1373	if (!_reg[engine->id].reg) {
		1374	drm_err(&engine->i915->drm,
		1375	"MSG IDLE undefined for engine id %u\n", engine->id);
		1376	return 0;
		1377	}
		1378
		1379	val = intel_uncore_read(engine->uncore, _reg[engine->id]);
		1380
		1381	/* bits[29:25] & bits[13:9] >> shift */
		1382	return (val & (val >> 16) & MSG_IDLE_FW_MASK) >> MSG_IDLE_FW_SHIFT;
		1383	}
		1384
		1385	static void __gpm_wait_for_fw_complete(struct intel_gt *gt, u32 fw_mask)
		1386	{
		1387	int ret;
		1388
		1389	/* Ensure GPM receives fw up/down after CS is stopped */
		1390	udelay(1);
		1391
		1392	/* Wait for forcewake request to complete in GPM */
		1393	ret = __intel_wait_for_register_fw(gt->uncore,
		1394	GEN9_PWRGT_DOMAIN_STATUS,
		1395	fw_mask, fw_mask, 5000, 0, NULL);
		1396
		1397	/* Ensure CS receives fw ack from GPM */
		1398	udelay(1);
		1399
		1400	if (ret)
		1401	GT_TRACE(gt, "Failed to complete pending forcewake %d\n", ret);
		1402	}
		1403
		1404	/*
		1405	* Wa_22011802037:gen12: In addition to stopping the cs, we need to wait for any
		1406	* pending MI_FORCE_WAKEUP requests that the CS has initiated to complete. The
		1407	* pending status is indicated by bits[13:9] (masked by bits[29:25]) in the
		1408	* MSG_IDLE register. There's one MSG_IDLE register per reset domain. Since we
		1409	* are concerned only with the gt reset here, we use a logical OR of pending
		1410	* forcewakeups from all reset domains and then wait for them to complete by
		1411	* querying PWRGT_DOMAIN_STATUS.
		1412	*/
		1413	void intel_engine_wait_for_pending_mi_fw(struct intel_engine_cs *engine)
		1414	{
		1415	u32 fw_pending = __cs_pending_mi_force_wakes(engine);
		1416
		1417	if (fw_pending)
		1418	__gpm_wait_for_fw_complete(engine->gt, fw_pending);
		1419	}
		1420
1337	static u32	1421	static u32
1338	read_subslice_reg(const struct intel_engine_cs *engine,	1422	read_subslice_reg(const struct intel_engine_cs *engine,
1339	int slice, int subslice, i915_reg_t reg)	1423	int slice, int subslice, i915_reg_t reg)

drivers/gpu/drm/i915/gt/intel_execlists_submission.c+7−0

@@ -2968,6 +2968,13 @@ static void execlists_reset_prepare(struct intel_engine_cs *engine) · 2967 unmodified lines
2968	ring_set_paused(engine, 1);	2968	ring_set_paused(engine, 1);
2969	intel_engine_stop_cs(engine);	2969	intel_engine_stop_cs(engine);
2970		2970
		2971	/*
		2972	* Wa_22011802037:gen11/gen12: In addition to stopping the cs, we need
		2973	* to wait for any pending mi force wakeups
		2974	*/
		2975	if (IS_GRAPHICS_VER(engine->i915, 11, 12))
		2976	intel_engine_wait_for_pending_mi_fw(engine);
		2977
2971	engine->execlists.reset_ccid = active_ccid(engine);	2978	engine->execlists.reset_ccid = active_ccid(engine);
2972	}	2979	}
2973		2980

drivers/gpu/drm/i915/gt/uc/intel_guc.c+2−2

@@ -310,8 +310,8 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc) · 309 unmodified lines
310	if (IS_DG2(gt->i915))	310	if (IS_DG2(gt->i915))
311	flags \|= GUC_WA_DUAL_QUEUE;	311	flags \|= GUC_WA_DUAL_QUEUE;
312		312
313	/* Wa_22011802037: graphics version 12 */	313	/* Wa_22011802037: graphics version 11/12 */
314	if (GRAPHICS_VER(gt->i915) == 12)	314	if (IS_GRAPHICS_VER(gt->i915, 11, 12))
315	flags \|= GUC_WA_PRE_PARSER;	315	flags \|= GUC_WA_PRE_PARSER;
316		316
317	/* Wa_16011777198:dg2 */	317	/* Wa_16011777198:dg2 */

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c+6−75

@@ -1578,87 +1578,18 @@ static void guc_reset_state(struct intel_context *ce, u32 head, bool scrub) · 1577 unmodified lines
1578	lrc_update_regs(ce, engine, head);	1578	lrc_update_regs(ce, engine, head);
1579	}	1579	}
1580		1580
1581	static u32 __cs_pending_mi_force_wakes(struct intel_engine_cs *engine)
1582	{
1583	static const i915_reg_t _reg[I915_NUM_ENGINES] = {
1584	[RCS0] = MSG_IDLE_CS,
1585	[BCS0] = MSG_IDLE_BCS,
1586	[VCS0] = MSG_IDLE_VCS0,
1587	[VCS1] = MSG_IDLE_VCS1,
1588	[VCS2] = MSG_IDLE_VCS2,
1589	[VCS3] = MSG_IDLE_VCS3,
1590	[VCS4] = MSG_IDLE_VCS4,
1591	[VCS5] = MSG_IDLE_VCS5,
1592	[VCS6] = MSG_IDLE_VCS6,
1593	[VCS7] = MSG_IDLE_VCS7,
1594	[VECS0] = MSG_IDLE_VECS0,
1595	[VECS1] = MSG_IDLE_VECS1,
1596	[VECS2] = MSG_IDLE_VECS2,
1597	[VECS3] = MSG_IDLE_VECS3,
1598	[CCS0] = MSG_IDLE_CS,
1599	[CCS1] = MSG_IDLE_CS,
1600	[CCS2] = MSG_IDLE_CS,
1601	[CCS3] = MSG_IDLE_CS,
1602	};
1603	u32 val;
1604
1605	if (!_reg[engine->id].reg)
1606	return 0;
1607
1608	val = intel_uncore_read(engine->uncore, _reg[engine->id]);
1609
1610	/* bits[29:25] & bits[13:9] >> shift */
1611	return (val & (val >> 16) & MSG_IDLE_FW_MASK) >> MSG_IDLE_FW_SHIFT;
1612	}
1613
1614	static void __gpm_wait_for_fw_complete(struct intel_gt *gt, u32 fw_mask)
1615	{
1616	int ret;
1617
1618	/* Ensure GPM receives fw up/down after CS is stopped */
1619	udelay(1);
1620
1621	/* Wait for forcewake request to complete in GPM */
1622	ret = __intel_wait_for_register_fw(gt->uncore,
1623	GEN9_PWRGT_DOMAIN_STATUS,
1624	fw_mask, fw_mask, 5000, 0, NULL);
1625
1626	/* Ensure CS receives fw ack from GPM */
1627	udelay(1);
1628
1629	if (ret)
1630	GT_TRACE(gt, "Failed to complete pending forcewake %d\n", ret);
1631	}
1632
1633	/*
1634	* Wa_22011802037:gen12: In addition to stopping the cs, we need to wait for any
1635	* pending MI_FORCE_WAKEUP requests that the CS has initiated to complete. The
1636	* pending status is indicated by bits[13:9] (masked by bits[ 29:25]) in the
1637	* MSG_IDLE register. There's one MSG_IDLE register per reset domain. Since we
1638	* are concerned only with the gt reset here, we use a logical OR of pending
1639	* forcewakeups from all reset domains and then wait for them to complete by
1640	* querying PWRGT_DOMAIN_STATUS.
1641	*/
1642	static void guc_engine_reset_prepare(struct intel_engine_cs *engine)	1581	static void guc_engine_reset_prepare(struct intel_engine_cs *engine)
1643	{	1582	{
1644	u32 fw_pending;	1583	if (!IS_GRAPHICS_VER(engine->i915, 11, 12))
1645
1646	if (GRAPHICS_VER(engine->i915) != 12)
1647	return;	1584	return;
1648		1585
1649	/*
1650	* Wa_22011802037
1651	* TODO: Occasionally trying to stop the cs times out, but does not
1652	* adversely affect functionality. The timeout is set as a config
1653	* parameter that defaults to 100ms. Assuming that this timeout is
1654	* sufficient for any pending MI_FORCEWAKEs to complete, ignore the
1655	* timeout returned here until it is root caused.
1656	*/
1657	intel_engine_stop_cs(engine);	1586	intel_engine_stop_cs(engine);
1658		1587
1659	fw_pending = __cs_pending_mi_force_wakes(engine);	1588	/*
1660	if (fw_pending)	1589	* Wa_22011802037:gen11/gen12: In addition to stopping the cs, we need
1661	__gpm_wait_for_fw_complete(engine->gt, fw_pending);	1590	* to wait for any pending mi force wakeups
		1591	*/
		1592	intel_engine_wait_for_pending_mi_fw(engine);
1662	}	1593	}
1663		1594
1664	static void guc_reset_nop(struct intel_engine_cs *engine)	1595	static void guc_reset_nop(struct intel_engine_cs *engine)

drivers/gpu/drm/nouveau/nouveau_dmem.c+5−1

 		goto out_free_dma;
 	for (i = 0; i < npages; i += max) {
-		args.end = start + (max << PAGE_SHIFT);
+		if (args.start + (max << PAGE_SHIFT) > end)
+			args.end = end;
+		else
+			args.end = args.start + (max << PAGE_SHIFT);
 		ret = migrate_vma_setup(&args);
 		if (ret)
 			goto out_free_pfns;

drivers/gpu/drm/tiny/simpledrm.c+1−1

@@ -627,7 +627,7 @@ static const struct drm_connector_funcs simpledrm_connector_funcs = { · 626 unmodified lines
627	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,	627	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
628	};	628	};
629		629
630	static int	630	static enum drm_mode_status
631	simpledrm_simple_display_pipe_mode_valid(struct drm_simple_display_pipe *pipe,	631	simpledrm_simple_display_pipe_mode_valid(struct drm_simple_display_pipe *pipe,
632	const struct drm_display_mode *mode)	632	const struct drm_display_mode *mode)
633	{	633	{

drivers/idle/intel_idle.c+7−1

@@ -162,7 +162,13 @@ static __cpuidle int intel_idle_irq(struct cpuidle_device *dev, · 161 unmodified lines
162		162
163	raw_local_irq_enable();	163	raw_local_irq_enable();
164	ret = __intel_idle(dev, drv, index);	164	ret = __intel_idle(dev, drv, index);
165	raw_local_irq_disable();	165
		166	/*
		167	* The lockdep hardirqs state may be changed to 'on' with timer
		168	* tick interrupt followed by __do_softirq(). Use local_irq_disable()
		169	* to keep the hardirqs state correct.
		170	*/
		171	local_irq_disable();
166		172
167	return ret;	173	return ret;
168	}	174	}

drivers/net/ethernet/fungible/funeth/funeth_rx.c+4−1

@@ -142,6 +142,7 @@ static void fun_run_xdp(struct funeth_rxq q, skb_frag_t frags, void buf_va, · 141 unmodified lines
142	int ref_ok, struct funeth_txq *xdp_q)	142	int ref_ok, struct funeth_txq *xdp_q)
143	{	143	{
144	struct bpf_prog *xdp_prog;	144	struct bpf_prog *xdp_prog;
		145	struct xdp_frame *xdpf;
145	struct xdp_buff xdp;	146	struct xdp_buff xdp;
146	u32 act;	147	u32 act;
147		148
@@ -163,7 +164,9 @@ static void fun_run_xdp(struct funeth_rxq q, skb_frag_t frags, void buf_va, · 15 unmodified lines
163	case XDP_TX:	164	case XDP_TX:
164	if (unlikely(!ref_ok))	165	if (unlikely(!ref_ok))
165	goto pass;	166	goto pass;
166	if (!fun_xdp_tx(xdp_q, xdp.data, xdp.data_end - xdp.data))	167
		168	xdpf = xdp_convert_buff_to_frame(&xdp);
		169	if (!xdpf \|\| !fun_xdp_tx(xdp_q, xdpf))
167	goto xdp_error;	170	goto xdp_error;
168	FUN_QSTAT_INC(q, xdp_tx);	171	FUN_QSTAT_INC(q, xdp_tx);
169	q->xdp_flush \|= FUN_XDP_FLUSH_TX;	172	q->xdp_flush \|= FUN_XDP_FLUSH_TX;

drivers/net/ethernet/fungible/funeth/funeth_tx.c+9−11

 		do {
 			fun_xdp_unmap(q, reclaim_idx);
-			page_frag_free(q->info[reclaim_idx].vaddr);
+			xdp_return_frame(q->info[reclaim_idx].xdpf);
 			trace_funeth_tx_free(q, reclaim_idx, 1, head);
 	return npkts;
 }
-bool fun_xdp_tx(struct funeth_txq *q, void *data, unsigned int len)
+bool fun_xdp_tx(struct funeth_txq *q, struct xdp_frame *xdpf)
 {
 	struct fun_eth_tx_req *req;
 	struct fun_dataop_gl *gle;
-	unsigned int idx;
+	unsigned int idx, len;
 	dma_addr_t dma;
 	if (fun_txq_avail(q) < FUN_XDP_CLEAN_THRES)
 		return false;
 	}
-	dma = dma_map_single(q->dma_dev, data, len, DMA_TO_DEVICE);
+	len = xdpf->len;
+	dma = dma_map_single(q->dma_dev, xdpf->data, len, DMA_TO_DEVICE);
 	if (unlikely(dma_mapping_error(q->dma_dev, dma))) {
 		FUN_QSTAT_INC(q, tx_map_err);
 		return false;
 	gle = (struct fun_dataop_gl *)req->dataop.imm;
 	fun_dataop_gl_init(gle, 0, 0, len, dma);
-	q->info[idx].vaddr = data;
+	q->info[idx].xdpf = xdpf;
 	u64_stats_update_begin(&q->syncp);
 	q->stats.tx_bytes += len;
 	if (unlikely(q_idx >= fp->num_xdpqs))
 		return -ENXIO;
-	for (q = xdpqs[q_idx], i = 0; i < n; i++) {
+	for (q = xdpqs[q_idx], i = 0; i < n; i++)
-		const struct xdp_frame *xdpf = frames[i];
+		if (!fun_xdp_tx(q, frames[i]))
-		if (!fun_xdp_tx(q, xdpf->data, xdpf->len))
 			break;
-	}
 	if (unlikely(flags & XDP_XMIT_FLUSH))
 		fun_txq_wr_db(q);
 		unsigned int idx = q->cons_cnt & q->mask;
 		fun_xdp_unmap(q, idx);
-		page_frag_free(q->info[idx].vaddr);
+		xdp_return_frame(q->info[idx].xdpf);
 		q->cons_cnt++;
 	}
 }

drivers/net/ethernet/fungible/funeth/funeth_txrx.h+3−3

@@ -95,8 +95,8 @@ struct funeth_txq_stats { /* per Tx queue SW counters */ · 94 unmodified lines
95		95
96	struct funeth_tx_info { /* per Tx descriptor state */	96	struct funeth_tx_info { /* per Tx descriptor state */
97	union {	97	union {
98	struct sk_buff skb; / associated packet */	98	struct sk_buff skb; / associated packet (sk_buff path) */
99	void vaddr; / start address for XDP */	99	struct xdp_frame xdpf; / associated XDP frame (XDP path) */
100	};	100	};
101	};	101	};
102		102
@@ -245,7 +245,7 @@ static inline int fun_irq_node(const struct fun_irq *p) · 142 unmodified lines
245	int fun_rxq_napi_poll(struct napi_struct *napi, int budget);	245	int fun_rxq_napi_poll(struct napi_struct *napi, int budget);
246	int fun_txq_napi_poll(struct napi_struct *napi, int budget);	246	int fun_txq_napi_poll(struct napi_struct *napi, int budget);
247	netdev_tx_t fun_start_xmit(struct sk_buff skb, struct net_device netdev);	247	netdev_tx_t fun_start_xmit(struct sk_buff skb, struct net_device netdev);
248	bool fun_xdp_tx(struct funeth_txq q, void data, unsigned int len);	248	bool fun_xdp_tx(struct funeth_txq q, struct xdp_frame xdpf);
249	int fun_xdp_xmit_frames(struct net_device *dev, int n,	249	int fun_xdp_xmit_frames(struct net_device *dev, int n,
250	struct xdp_frame **frames, u32 flags);	250	struct xdp_frame **frames, u32 flags);
251		251

drivers/net/ethernet/intel/i40e/i40e_main.c+4−0

 		 * non-zero req_queue_pairs says that user requested a new
 		 * queue count via ethtool's set_channels, so use this
 		 * value for queues distribution across traffic classes
+		 * We need at least one queue pair for the interface
+		 * to be usable as we see in else statement.
 		 */
 		if (vsi->req_queue_pairs > 0)
 			vsi->num_queue_pairs = vsi->req_queue_pairs;
 		else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
 			vsi->num_queue_pairs = pf->num_lan_msix;
+		else
+			vsi->num_queue_pairs = 1;
 	}
 	/* Number of queues per enabled TC */

drivers/net/ethernet/intel/ice/ice_ethtool.c+2−1

@@ -658,7 +658,8 @@ static int ice_lbtest_receive_frames(struct ice_rx_ring *rx_ring) · 657 unmodified lines
658	rx_desc = ICE_RX_DESC(rx_ring, i);	658	rx_desc = ICE_RX_DESC(rx_ring, i);
659		659
660	if (!(rx_desc->wb.status_error0 &	660	if (!(rx_desc->wb.status_error0 &
661	cpu_to_le16(ICE_TX_DESC_CMD_EOP \| ICE_TX_DESC_CMD_RS)))	661	(cpu_to_le16(BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S)) \|
		662	cpu_to_le16(BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)))))
662	continue;	663	continue;
663		664
664	rx_buf = &rx_ring->rx_buf[i];	665	rx_buf = &rx_ring->rx_buf[i];

drivers/net/ethernet/intel/ice/ice_main.c+7−3

 		ice_set_safe_mode_caps(hw);
 	}
+	hw->ucast_shared = true;
 	err = ice_init_pf(pf);
 	if (err) {
 		dev_err(dev, "ice_init_pf failed: %d\n", err);
 	if (vsi->netdev) {
 		ice_set_rx_mode(vsi->netdev);
-		err = ice_vsi_vlan_setup(vsi);
+		if (vsi->type != ICE_VSI_LB) {
+			err = ice_vsi_vlan_setup(vsi);
-		if (err)
+			if (err)
-			return err;
+				return err;
+		}
 	}
 	ice_vsi_cfg_dcb_rings(vsi);

drivers/net/ethernet/intel/ice/ice_sriov.c+0−40

@@ -1309,39 +1309,6 @@ out_put_vf: · 1308 unmodified lines
1309	return ret;	1309	return ret;
1310	}	1310	}
1311		1311
1312	/**
1313	* ice_unicast_mac_exists - check if the unicast MAC exists on the PF's switch
1314	* @pf: PF used to reference the switch's rules
1315	* @umac: unicast MAC to compare against existing switch rules
1316	*
1317	* Return true on the first/any match, else return false
1318	*/
1319	static bool ice_unicast_mac_exists(struct ice_pf pf, u8 umac)
1320	{
1321	struct ice_sw_recipe *mac_recipe_list =
1322	&pf->hw.switch_info->recp_list[ICE_SW_LKUP_MAC];
1323	struct ice_fltr_mgmt_list_entry *list_itr;
1324	struct list_head *rule_head;
1325	struct mutex rule_lock; / protect MAC filter list access */
1326
1327	rule_head = &mac_recipe_list->filt_rules;
1328	rule_lock = &mac_recipe_list->filt_rule_lock;
1329
1330	mutex_lock(rule_lock);
1331	list_for_each_entry(list_itr, rule_head, list_entry) {
1332	u8 *existing_mac = &list_itr->fltr_info.l_data.mac.mac_addr[0];
1333
1334	if (ether_addr_equal(existing_mac, umac)) {
1335	mutex_unlock(rule_lock);
1336	return true;
1337	}
1338	}
1339
1340	mutex_unlock(rule_lock);
1341
1342	return false;
1343	}
1344
1345	/**	1312	/**
1346	* ice_set_vf_mac	1313	* ice_set_vf_mac
1347	* @netdev: network interface device structure	1314	* @netdev: network interface device structure
@@ -1376,13 +1343,6 @@ int ice_set_vf_mac(struct net_device netdev, int vf_id, u8 mac) · 28 unmodified lines
1376	if (ret)	1343	if (ret)
1377	goto out_put_vf;	1344	goto out_put_vf;
1378		1345
1379	if (ice_unicast_mac_exists(pf, mac)) {
1380	netdev_err(netdev, "Unicast MAC %pM already exists on this PF. Preventing setting VF %u unicast MAC address to %pM\n",
1381	mac, vf_id, mac);
1382	ret = -EINVAL;
1383	goto out_put_vf;
1384	}
1385
1386	mutex_lock(&vf->cfg_lock);	1346	mutex_lock(&vf->cfg_lock);
1387		1347
1388	/* VF is notified of its new MAC via the PF's response to the	1348	/* VF is notified of its new MAC via the PF's response to the

drivers/net/ethernet/intel/ice/ice_txrx.c+5−3

 	protocol = vlan_get_protocol(skb);
-	if (eth_p_mpls(protocol))
+	if (eth_p_mpls(protocol)) {
 		ip.hdr = skb_inner_network_header(skb);
-	else
+		l4.hdr = skb_checksum_start(skb);
+	} else {
 		ip.hdr = skb_network_header(skb);
-	l4.hdr = skb_checksum_start(skb);
+		l4.hdr = skb_transport_header(skb);
+	}
 	/* compute outer L2 header size */
 	l2_len = ip.hdr - skb->data;

drivers/net/ethernet/intel/ice/ice_virtchnl.c+2−1

@@ -2948,7 +2948,8 @@ ice_vc_validate_add_vlan_filter_list(struct ice_vsi *vsi, · 2947 unmodified lines
2948	struct virtchnl_vlan_filtering_caps *vfc,	2948	struct virtchnl_vlan_filtering_caps *vfc,
2949	struct virtchnl_vlan_filter_list_v2 *vfl)	2949	struct virtchnl_vlan_filter_list_v2 *vfl)
2950	{	2950	{
2951	u16 num_requested_filters = vsi->num_vlan + vfl->num_elements;	2951	u16 num_requested_filters = ice_vsi_num_non_zero_vlans(vsi) +
		2952	vfl->num_elements;
2952		2953
2953	if (num_requested_filters > vfc->max_filters)	2954	if (num_requested_filters > vfc->max_filters)
2954	return false;	2955	return false;

drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c+73−33

@@ -28,6 +28,9 @@ · 27 unmodified lines
28	#define MAX_RATE_EXPONENT 0x0FULL	28	#define MAX_RATE_EXPONENT 0x0FULL
29	#define MAX_RATE_MANTISSA 0xFFULL	29	#define MAX_RATE_MANTISSA 0xFFULL
30		30
		31	#define CN10K_MAX_BURST_MANTISSA 0x7FFFULL
		32	#define CN10K_MAX_BURST_SIZE 8453888ULL
		33
31	/* Bitfields in NIX_TLX_PIR register */	34	/* Bitfields in NIX_TLX_PIR register */
32	#define TLX_RATE_MANTISSA GENMASK_ULL(8, 1)	35	#define TLX_RATE_MANTISSA GENMASK_ULL(8, 1)
33	#define TLX_RATE_EXPONENT GENMASK_ULL(12, 9)	36	#define TLX_RATE_EXPONENT GENMASK_ULL(12, 9)
@@ -35,6 +38,9 @@ · 1 unmodified line
35	#define TLX_BURST_MANTISSA GENMASK_ULL(36, 29)	38	#define TLX_BURST_MANTISSA GENMASK_ULL(36, 29)
36	#define TLX_BURST_EXPONENT GENMASK_ULL(40, 37)	39	#define TLX_BURST_EXPONENT GENMASK_ULL(40, 37)
37		40
		41	#define CN10K_TLX_BURST_MANTISSA GENMASK_ULL(43, 29)
		42	#define CN10K_TLX_BURST_EXPONENT GENMASK_ULL(47, 44)
		43
38	struct otx2_tc_flow_stats {	44	struct otx2_tc_flow_stats {
39	u64 bytes;	45	u64 bytes;
40	u64 pkts;	46	u64 pkts;
@@ -77,33 +83,42 @@ int otx2_tc_alloc_ent_bitmap(struct otx2_nic *nic) · 36 unmodified lines
77	}	83	}
78	EXPORT_SYMBOL(otx2_tc_alloc_ent_bitmap);	84	EXPORT_SYMBOL(otx2_tc_alloc_ent_bitmap);
79		85
80	static void otx2_get_egress_burst_cfg(u32 burst, u32 *burst_exp,	86	static void otx2_get_egress_burst_cfg(struct otx2_nic *nic, u32 burst,
81	u32 *burst_mantissa)	87	u32 burst_exp, u32 burst_mantissa)
82	{	88	{
		89	int max_burst, max_mantissa;
83	unsigned int tmp;	90	unsigned int tmp;
84		91
		92	if (is_dev_otx2(nic->pdev)) {
		93	max_burst = MAX_BURST_SIZE;
		94	max_mantissa = MAX_BURST_MANTISSA;
		95	} else {
		96	max_burst = CN10K_MAX_BURST_SIZE;
		97	max_mantissa = CN10K_MAX_BURST_MANTISSA;
		98	}
		99
85	/* Burst is calculated as	100	/* Burst is calculated as
86	* ((256 + BURST_MANTISSA) << (1 + BURST_EXPONENT)) / 256	101	* ((256 + BURST_MANTISSA) << (1 + BURST_EXPONENT)) / 256
87	* Max supported burst size is 130,816 bytes.	102	* Max supported burst size is 130,816 bytes.
88	*/	103	*/
89	burst = min_t(u32, burst, MAX_BURST_SIZE);	104	burst = min_t(u32, burst, max_burst);
90	if (burst) {	105	if (burst) {
91	*burst_exp = ilog2(burst) ? ilog2(burst) - 1 : 0;	106	*burst_exp = ilog2(burst) ? ilog2(burst) - 1 : 0;
92	tmp = burst - rounddown_pow_of_two(burst);	107	tmp = burst - rounddown_pow_of_two(burst);
93	if (burst < MAX_BURST_MANTISSA)	108	if (burst < max_mantissa)
94	burst_mantissa = tmp 2;	109	burst_mantissa = tmp 2;
95	else	110	else
96	burst_mantissa = tmp / (1ULL << (burst_exp - 7));	111	burst_mantissa = tmp / (1ULL << (burst_exp - 7));
97	} else {	112	} else {
98	*burst_exp = MAX_BURST_EXPONENT;	113	*burst_exp = MAX_BURST_EXPONENT;
99	*burst_mantissa = MAX_BURST_MANTISSA;	114	*burst_mantissa = max_mantissa;
100	}	115	}
101	}	116	}
102		117
103	static void otx2_get_egress_rate_cfg(u32 maxrate, u32 *exp,	118	static void otx2_get_egress_rate_cfg(u64 maxrate, u32 *exp,
104	u32 mantissa, u32 div_exp)	119	u32 mantissa, u32 div_exp)
105	{	120	{
106	unsigned int tmp;	121	u64 tmp;
107		122
108	/* Rate calculation by hardware	123	/* Rate calculation by hardware
109	*	124	*
@@ -132,21 +147,44 @@ static void otx2_get_egress_rate_cfg(u32 maxrate, u32 *exp, · 22 unmodified lines
132	}	147	}
133	}	148	}
134		149
135	static int otx2_set_matchall_egress_rate(struct otx2_nic *nic, u32 burst, u32 maxrate)	150	static u64 otx2_get_txschq_rate_regval(struct otx2_nic *nic,
		151	u64 maxrate, u32 burst)
136	{	152	{
137	struct otx2_hw *hw = &nic->hw;
138	struct nix_txschq_config *req;
139	u32 burst_exp, burst_mantissa;	153	u32 burst_exp, burst_mantissa;
140	u32 exp, mantissa, div_exp;	154	u32 exp, mantissa, div_exp;
		155	u64 regval = 0;
		156
		157	/* Get exponent and mantissa values from the desired rate */
		158	otx2_get_egress_burst_cfg(nic, burst, &burst_exp, &burst_mantissa);
		159	otx2_get_egress_rate_cfg(maxrate, &exp, &mantissa, &div_exp);
		160
		161	if (is_dev_otx2(nic->pdev)) {
		162	regval = FIELD_PREP(TLX_BURST_EXPONENT, (u64)burst_exp) \|
		163	FIELD_PREP(TLX_BURST_MANTISSA, (u64)burst_mantissa) \|
		164	FIELD_PREP(TLX_RATE_DIVIDER_EXPONENT, div_exp) \|
		165	FIELD_PREP(TLX_RATE_EXPONENT, exp) \|
		166	FIELD_PREP(TLX_RATE_MANTISSA, mantissa) \| BIT_ULL(0);
		167	} else {
		168	regval = FIELD_PREP(CN10K_TLX_BURST_EXPONENT, (u64)burst_exp) \|
		169	FIELD_PREP(CN10K_TLX_BURST_MANTISSA, (u64)burst_mantissa) \|
		170	FIELD_PREP(TLX_RATE_DIVIDER_EXPONENT, div_exp) \|
		171	FIELD_PREP(TLX_RATE_EXPONENT, exp) \|
		172	FIELD_PREP(TLX_RATE_MANTISSA, mantissa) \| BIT_ULL(0);
		173	}
		174
		175	return regval;
		176	}
		177
		178	static int otx2_set_matchall_egress_rate(struct otx2_nic *nic,
		179	u32 burst, u64 maxrate)
		180	{
		181	struct otx2_hw *hw = &nic->hw;
		182	struct nix_txschq_config *req;
141	int txschq, err;	183	int txschq, err;
142		184
143	/* All SQs share the same TL4, so pick the first scheduler */	185	/* All SQs share the same TL4, so pick the first scheduler */
144	txschq = hw->txschq_list[NIX_TXSCH_LVL_TL4][0];	186	txschq = hw->txschq_list[NIX_TXSCH_LVL_TL4][0];
145		187
146	/* Get exponent and mantissa values from the desired rate */
147	otx2_get_egress_burst_cfg(burst, &burst_exp, &burst_mantissa);
148	otx2_get_egress_rate_cfg(maxrate, &exp, &mantissa, &div_exp);
149
150	mutex_lock(&nic->mbox.lock);	188	mutex_lock(&nic->mbox.lock);
151	req = otx2_mbox_alloc_msg_nix_txschq_cfg(&nic->mbox);	189	req = otx2_mbox_alloc_msg_nix_txschq_cfg(&nic->mbox);
152	if (!req) {	190	if (!req) {
@@ -157,11 +195,7 @@ static int otx2_set_matchall_egress_rate(struct otx2_nic *nic, u32 burst, u32 ma · 4 unmodified lines
157	req->lvl = NIX_TXSCH_LVL_TL4;	195	req->lvl = NIX_TXSCH_LVL_TL4;
158	req->num_regs = 1;	196	req->num_regs = 1;
159	req->reg[0] = NIX_AF_TL4X_PIR(txschq);	197	req->reg[0] = NIX_AF_TL4X_PIR(txschq);
160	req->regval[0] = FIELD_PREP(TLX_BURST_EXPONENT, burst_exp) \|	198	req->regval[0] = otx2_get_txschq_rate_regval(nic, maxrate, burst);
161	FIELD_PREP(TLX_BURST_MANTISSA, burst_mantissa) \|
162	FIELD_PREP(TLX_RATE_DIVIDER_EXPONENT, div_exp) \|
163	FIELD_PREP(TLX_RATE_EXPONENT, exp) \|
164	FIELD_PREP(TLX_RATE_MANTISSA, mantissa) \| BIT_ULL(0);
165		199
166	err = otx2_sync_mbox_msg(&nic->mbox);	200	err = otx2_sync_mbox_msg(&nic->mbox);
167	mutex_unlock(&nic->mbox.lock);	201	mutex_unlock(&nic->mbox.lock);
@@ -230,7 +264,7 @@ static int otx2_tc_egress_matchall_install(struct otx2_nic *nic, · 62 unmodified lines
230	struct netlink_ext_ack *extack = cls->common.extack;	264	struct netlink_ext_ack *extack = cls->common.extack;
231	struct flow_action *actions = &cls->rule->action;	265	struct flow_action *actions = &cls->rule->action;
232	struct flow_action_entry *entry;	266	struct flow_action_entry *entry;
233	u32 rate;	267	u64 rate;
234	int err;	268	int err;
235		269
236	err = otx2_tc_validate_flow(nic, actions, extack);	270	err = otx2_tc_validate_flow(nic, actions, extack);
@@ -256,7 +290,7 @@ static int otx2_tc_egress_matchall_install(struct otx2_nic *nic, · 19 unmodified lines
256	}	290	}
257	/* Convert bytes per second to Mbps */	291	/* Convert bytes per second to Mbps */
258	rate = entry->police.rate_bytes_ps * 8;	292	rate = entry->police.rate_bytes_ps * 8;
259	rate = max_t(u32, rate / 1000000, 1);	293	rate = max_t(u64, rate / 1000000, 1);
260	err = otx2_set_matchall_egress_rate(nic, entry->police.burst, rate);	294	err = otx2_set_matchall_egress_rate(nic, entry->police.burst, rate);
261	if (err)	295	if (err)
262	return err;	296	return err;
@@ -614,21 +648,27 @@ static int otx2_tc_prepare_flow(struct otx2_nic nic, struct otx2_tc_flow node, · 351 unmodified lines
614		648
615	flow_spec->dport = match.key->dst;	649	flow_spec->dport = match.key->dst;
616	flow_mask->dport = match.mask->dst;	650	flow_mask->dport = match.mask->dst;
617	if (ip_proto == IPPROTO_UDP)	651
618	req->features \|= BIT_ULL(NPC_DPORT_UDP);	652	if (flow_mask->dport) {
619	else if (ip_proto == IPPROTO_TCP)	653	if (ip_proto == IPPROTO_UDP)
620	req->features \|= BIT_ULL(NPC_DPORT_TCP);	654	req->features \|= BIT_ULL(NPC_DPORT_UDP);
621	else if (ip_proto == IPPROTO_SCTP)	655	else if (ip_proto == IPPROTO_TCP)
622	req->features \|= BIT_ULL(NPC_DPORT_SCTP);	656	req->features \|= BIT_ULL(NPC_DPORT_TCP);
		657	else if (ip_proto == IPPROTO_SCTP)
		658	req->features \|= BIT_ULL(NPC_DPORT_SCTP);
		659	}
623		660
624	flow_spec->sport = match.key->src;	661	flow_spec->sport = match.key->src;
625	flow_mask->sport = match.mask->src;	662	flow_mask->sport = match.mask->src;
626	if (ip_proto == IPPROTO_UDP)	663
627	req->features \|= BIT_ULL(NPC_SPORT_UDP);	664	if (flow_mask->sport) {
628	else if (ip_proto == IPPROTO_TCP)	665	if (ip_proto == IPPROTO_UDP)
629	req->features \|= BIT_ULL(NPC_SPORT_TCP);	666	req->features \|= BIT_ULL(NPC_SPORT_UDP);
630	else if (ip_proto == IPPROTO_SCTP)	667	else if (ip_proto == IPPROTO_TCP)
631	req->features \|= BIT_ULL(NPC_SPORT_SCTP);	668	req->features \|= BIT_ULL(NPC_SPORT_TCP);
		669	else if (ip_proto == IPPROTO_SCTP)
		670	req->features \|= BIT_ULL(NPC_SPORT_SCTP);
		671	}
632	}	672	}
633		673
634	return otx2_tc_parse_actions(nic, &rule->action, req, f, node);	674	return otx2_tc_parse_actions(nic, &rule->action, req, f, node);

drivers/net/ethernet/netronome/nfp/bpf/jit.c+1−1

@@ -4233,7 +4233,7 @@ static void nfp_bpf_opt_ldst_gather(struct nfp_prog *nfp_prog) · 4232 unmodified lines
4233	}	4233	}
4234		4234
4235	/* If the chain is ended by an load/store pair then this	4235	/* If the chain is ended by an load/store pair then this
4236	* could serve as the new head of the the next chain.	4236	* could serve as the new head of the next chain.
4237	*/	4237	*/
4238	if (curr_pair_is_memcpy(meta1, meta2)) {	4238	if (curr_pair_is_memcpy(meta1, meta2)) {
4239	head_ld_meta = meta1;	4239	head_ld_meta = meta1;

drivers/net/ethernet/sfc/ptp.c+22−0

@@ -1100,7 +1100,29 @@ static void efx_ptp_xmit_skb_queue(struct efx_nic efx, struct sk_buff skb) · 1099 unmodified lines
1100		1100
1101	tx_queue = efx_channel_get_tx_queue(ptp_data->channel, type);	1101	tx_queue = efx_channel_get_tx_queue(ptp_data->channel, type);
1102	if (tx_queue && tx_queue->timestamping) {	1102	if (tx_queue && tx_queue->timestamping) {
		1103	/* This code invokes normal driver TX code which is always
		1104	* protected from softirqs when called from generic TX code,
		1105	* which in turn disables preemption. Look at __dev_queue_xmit
		1106	* which uses rcu_read_lock_bh disabling preemption for RCU
		1107	* plus disabling softirqs. We do not need RCU reader
		1108	* protection here.
		1109	*
		1110	* Although it is theoretically safe for current PTP TX/RX code
		1111	* running without disabling softirqs, there are three good
		1112	* reasond for doing so:
		1113	*
		1114	* 1) The code invoked is mainly implemented for non-PTP
		1115	* packets and it is always executed with softirqs
		1116	* disabled.
		1117	* 2) This being a single PTP packet, better to not
		1118	* interrupt its processing by softirqs which can lead
		1119	* to high latencies.
		1120	* 3) netdev_xmit_more checks preemption is disabled and
		1121	* triggers a BUG_ON if not.
		1122	*/
		1123	local_bh_disable();
1103	efx_enqueue_skb(tx_queue, skb);	1124	efx_enqueue_skb(tx_queue, skb);
		1125	local_bh_enable();
1104	} else {	1126	} else {
1105	WARN_ONCE(1, "PTP channel has no timestamped tx queue\n");	1127	WARN_ONCE(1, "PTP channel has no timestamped tx queue\n");
1106	dev_kfree_skb_any(skb);	1128	dev_kfree_skb_any(skb);

drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c+5−4

 	ret = mediatek_dwmac_clks_config(priv_plat, true);
 	if (ret)
-		return ret;
+		goto err_remove_config_dt;
 	ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
-	if (ret) {
+	if (ret)
-		stmmac_remove_config_dt(pdev, plat_dat);
 		goto err_drv_probe;
-	}
 	return 0;
 err_drv_probe:
 	mediatek_dwmac_clks_config(priv_plat, false);
+err_remove_config_dt:
+	stmmac_remove_config_dt(pdev, plat_dat);
 	return ret;
 }

drivers/net/ipa/ipa_qmi_msg.h+1−1

@@ -214,7 +214,7 @@ struct ipa_init_modem_driver_req { · 213 unmodified lines
214		214
215	/* The response to a IPA_QMI_INIT_DRIVER request begins with a standard	215	/* The response to a IPA_QMI_INIT_DRIVER request begins with a standard
216	* QMI response, but contains other information as well. Currently we	216	* QMI response, but contains other information as well. Currently we
217	* simply wait for the the INIT_DRIVER transaction to complete and	217	* simply wait for the INIT_DRIVER transaction to complete and
218	* ignore any other data that might be returned.	218	* ignore any other data that might be returned.
219	*/	219	*/
220	struct ipa_init_modem_driver_rsp {	220	struct ipa_init_modem_driver_rsp {

drivers/net/macsec.c+21−12

 #define DEFAULT_SEND_SCI true
 #define DEFAULT_ENCRYPT false
 #define DEFAULT_ENCODING_SA 0
+#define MACSEC_XPN_MAX_REPLAY_WINDOW (((1 << 30) - 1))
 static bool send_sci(const struct macsec_secy *secy)
 {
 		return false;
 	if (attrs[MACSEC_SA_ATTR_PN] &&
-	    *(u64 *)nla_data(attrs[MACSEC_SA_ATTR_PN]) == 0)
+	    nla_get_u64(attrs[MACSEC_SA_ATTR_PN]) == 0)
 		return false;
 	if (attrs[MACSEC_SA_ATTR_ACTIVE]) {
 	}
 	pn_len = secy->xpn ? MACSEC_XPN_PN_LEN : MACSEC_DEFAULT_PN_LEN;
-	if (nla_len(tb_sa[MACSEC_SA_ATTR_PN]) != pn_len) {
+	if (tb_sa[MACSEC_SA_ATTR_PN] &&
+	    nla_len(tb_sa[MACSEC_SA_ATTR_PN]) != pn_len) {
 		pr_notice("macsec: nl: add_rxsa: bad pn length: %d != %d\n",
 			  nla_len(tb_sa[MACSEC_SA_ATTR_PN]), pn_len);
 		rtnl_unlock();
 		if (nla_len(tb_sa[MACSEC_SA_ATTR_SALT]) != MACSEC_SALT_LEN) {
 			pr_notice("macsec: nl: add_rxsa: bad salt length: %d != %d\n",
 				  nla_len(tb_sa[MACSEC_SA_ATTR_SALT]),
-				  MACSEC_SA_ATTR_SALT);
+				  MACSEC_SALT_LEN);
 			rtnl_unlock();
 			return -EINVAL;
 		}
 	return 0;
 cleanup:
-	kfree(rx_sa);
+	macsec_rxsa_put(rx_sa);
 	rtnl_unlock();
 	return err;
 }
 	if (nla_get_u8(attrs[MACSEC_SA_ATTR_AN]) >= MACSEC_NUM_AN)
 		return false;
-	if (nla_get_u32(attrs[MACSEC_SA_ATTR_PN]) == 0)
+	if (nla_get_u64(attrs[MACSEC_SA_ATTR_PN]) == 0)
 		return false;
 	if (attrs[MACSEC_SA_ATTR_ACTIVE]) {
 		if (nla_len(tb_sa[MACSEC_SA_ATTR_SALT]) != MACSEC_SALT_LEN) {
 			pr_notice("macsec: nl: add_txsa: bad salt length: %d != %d\n",
 				  nla_len(tb_sa[MACSEC_SA_ATTR_SALT]),
-				  MACSEC_SA_ATTR_SALT);
+				  MACSEC_SALT_LEN);
 			rtnl_unlock();
 			return -EINVAL;
 		}
 cleanup:
 	secy->operational = was_operational;
-	kfree(tx_sa);
+	macsec_txsa_put(tx_sa);
 	rtnl_unlock();
 	return err;
 }
 	if (nla_get_u8(attrs[MACSEC_SA_ATTR_AN]) >= MACSEC_NUM_AN)
 		return false;
-	if (attrs[MACSEC_SA_ATTR_PN] && nla_get_u32(attrs[MACSEC_SA_ATTR_PN]) == 0)
+	if (attrs[MACSEC_SA_ATTR_PN] && nla_get_u64(attrs[MACSEC_SA_ATTR_PN]) == 0)
 		return false;
 	if (attrs[MACSEC_SA_ATTR_ACTIVE]) {
 		secy->operational = tx_sa && tx_sa->active;
 	}
-	if (data[IFLA_MACSEC_WINDOW])
-		secy->replay_window = nla_get_u32(data[IFLA_MACSEC_WINDOW]);
 	if (data[IFLA_MACSEC_ENCRYPT])
 		tx_sc->encrypt = !!nla_get_u8(data[IFLA_MACSEC_ENCRYPT]);
 		}
 	}
+	if (data[IFLA_MACSEC_WINDOW]) {
+		secy->replay_window = nla_get_u32(data[IFLA_MACSEC_WINDOW]);
+		/* IEEE 802.1AEbw-2013 10.7.8 - maximum replay window
+		 * for XPN cipher suites */
+		if (secy->xpn &&
+		    secy->replay_window > MACSEC_XPN_MAX_REPLAY_WINDOW)
+			return -EINVAL;
+	}
 	return 0;
 }
 	ret = macsec_changelink_common(dev, data);
 	if (ret)
-		return ret;
+		goto cleanup;
 	/* If h/w offloading is available, propagate to the device */
 	if (macsec_is_offloaded(macsec)) {

drivers/net/pcs/pcs-xpcs.c+1−1

@@ -896,7 +896,7 @@ static int xpcs_get_state_c37_sgmii(struct dw_xpcs *xpcs, · 895 unmodified lines
896	*/	896	*/
897	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS);	897	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS);
898	if (ret < 0)	898	if (ret < 0)
899	return false;	899	return ret;
900		900
901	if (ret & DW_VR_MII_C37_ANSGM_SP_LNKSTS) {	901	if (ret & DW_VR_MII_C37_ANSGM_SP_LNKSTS) {
902	int speed_value;	902	int speed_value;

drivers/net/sungem_phy.c+1−0

@@ -450,6 +450,7 @@ static int bcm5421_init(struct mii_phy* phy) · 449 unmodified lines
450	int can_low_power = 1;	450	int can_low_power = 1;
451	if (np == NULL \|\| of_get_property(np, "no-autolowpower", NULL))	451	if (np == NULL \|\| of_get_property(np, "no-autolowpower", NULL))
452	can_low_power = 0;	452	can_low_power = 0;
		453	of_node_put(np);
453	if (can_low_power) {	454	if (can_low_power) {
454	/* Enable automatic low-power */	455	/* Enable automatic low-power */
455	sungem_phy_write(phy, 0x1c, 0x9002);	456	sungem_phy_write(phy, 0x1c, 0x9002);

drivers/net/virtio_net.c+34−3

 	/* Packet virtio header size */
 	u8 hdr_len;
-	/* Work struct for refilling if we run low on memory. */
+	/* Work struct for delayed refilling if we run low on memory. */
 	struct delayed_work refill;
+	/* Is delayed refill enabled? */
+	bool refill_enabled;
+	/* The lock to synchronize the access to refill_enabled */
+	spinlock_t refill_lock;
 	/* Work struct for config space updates */
 	struct work_struct config_work;
 	return p;
 }
+static void enable_delayed_refill(struct virtnet_info *vi)
+{
+	spin_lock_bh(&vi->refill_lock);
+	vi->refill_enabled = true;
+	spin_unlock_bh(&vi->refill_lock);
+}
+static void disable_delayed_refill(struct virtnet_info *vi)
+{
+	spin_lock_bh(&vi->refill_lock);
+	vi->refill_enabled = false;
+	spin_unlock_bh(&vi->refill_lock);
+}
 static void virtqueue_napi_schedule(struct napi_struct *napi,
 				    struct virtqueue *vq)
 {
 	}
 	if (rq->vq->num_free > min((unsigned int)budget, virtqueue_get_vring_size(rq->vq)) / 2) {
-		if (!try_fill_recv(vi, rq, GFP_ATOMIC))
+		if (!try_fill_recv(vi, rq, GFP_ATOMIC)) {
-			schedule_delayed_work(&vi->refill, 0);
+			spin_lock(&vi->refill_lock);
+			if (vi->refill_enabled)
+				schedule_delayed_work(&vi->refill, 0);
+			spin_unlock(&vi->refill_lock);
+		}
 	}
 	u64_stats_update_begin(&rq->stats.syncp);
 	struct virtnet_info *vi = netdev_priv(dev);
 	int i, err;
+	enable_delayed_refill(vi);
 	for (i = 0; i < vi->max_queue_pairs; i++) {
 		if (i < vi->curr_queue_pairs)
 			/* Make sure we have some buffers: if oom use wq. */
 	struct virtnet_info *vi = netdev_priv(dev);
 	int i;
+	/* Make sure NAPI doesn't schedule refill work */
+	disable_delayed_refill(vi);
 	/* Make sure refill_work doesn't re-enable napi! */
 	cancel_delayed_work_sync(&vi->refill);
 	virtio_device_ready(vdev);
+	enable_delayed_refill(vi);
 	if (netif_running(vi->dev)) {
 		err = virtnet_open(vi->dev);
 		if (err)
 	vdev->priv = vi;
 	INIT_WORK(&vi->config_work, virtnet_config_changed_work);
+	spin_lock_init(&vi->refill_lock);
 	/* If we can receive ANY GSO packets, we must allocate large ones. */
 	if (virtio_has_feature(vdev, VIRTIO_NET_F_GUEST_TSO4) ||

drivers/nvme/host/pci.c+2−0

 		.driver_data = NVME_QUIRK_BOGUS_NID, },
 	{ PCI_DEVICE(0x1e49, 0x0041),   /* ZHITAI TiPro7000 NVMe SSD */
 		.driver_data = NVME_QUIRK_NO_DEEPEST_PS, },
+	{ PCI_DEVICE(0xc0a9, 0x540a),   /* Crucial P2 */
+		.driver_data = NVME_QUIRK_BOGUS_NID, },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMAZON, 0x0061),
 		.driver_data = NVME_QUIRK_DMA_ADDRESS_BITS_48, },
 	{ PCI_DEVICE(PCI_VENDOR_ID_AMAZON, 0x0065),

drivers/ptp/Kconfig+1−0

@@ -176,6 +176,7 @@ config PTP_1588_CLOCK_OCP · 175 unmodified lines
176	depends on !S390	176	depends on !S390
177	depends on COMMON_CLK	177	depends on COMMON_CLK
178	select NET_DEVLINK	178	select NET_DEVLINK
		179	select CRC16
179	help	180	help
180	This driver adds support for an OpenCompute time card.	181	This driver adds support for an OpenCompute time card.
181		182

drivers/s390/net/qeth_core_main.c+1−1

@@ -3565,7 +3565,7 @@ static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, · 3564 unmodified lines
3565	if (!atomic_read(&queue->set_pci_flags_count)) {	3565	if (!atomic_read(&queue->set_pci_flags_count)) {
3566	/*	3566	/*
3567	* there's no outstanding PCI any more, so we	3567	* there's no outstanding PCI any more, so we
3568	* have to request a PCI to be sure the the PCI	3568	* have to request a PCI to be sure the PCI
3569	* will wake at some time in the future then we	3569	* will wake at some time in the future then we
3570	* can flush packed buffers that might still be	3570	* can flush packed buffers that might still be
3571	* hanging around, which can happen if no	3571	* hanging around, which can happen if no

drivers/scsi/mpt3sas/mpt3sas_scsih.c+1−0

@@ -11386,6 +11386,7 @@ scsih_shutdown(struct pci_dev *pdev) · 11385 unmodified lines
11386	_scsih_ir_shutdown(ioc);	11386	_scsih_ir_shutdown(ioc);
11387	_scsih_nvme_shutdown(ioc);	11387	_scsih_nvme_shutdown(ioc);
11388	mpt3sas_base_mask_interrupts(ioc);	11388	mpt3sas_base_mask_interrupts(ioc);
		11389	mpt3sas_base_stop_watchdog(ioc);
11389	ioc->shost_recovery = 1;	11390	ioc->shost_recovery = 1;
11390	mpt3sas_base_make_ioc_ready(ioc, SOFT_RESET);	11391	mpt3sas_base_make_ioc_ready(ioc, SOFT_RESET);
11391	ioc->shost_recovery = 0;	11392	ioc->shost_recovery = 0;

drivers/scsi/scsi_ioctl.c+1−1

@@ -450,7 +450,7 @@ static int sg_io(struct scsi_device sdev, struct sg_io_hdr hdr, fmode_t mode) · 449 unmodified lines
450	goto out_put_request;	450	goto out_put_request;
451		451
452	ret = 0;	452	ret = 0;
453	if (hdr->iovec_count) {	453	if (hdr->iovec_count && hdr->dxfer_len) {
454	struct iov_iter i;	454	struct iov_iter i;
455	struct iovec *iov = NULL;	455	struct iovec *iov = NULL;
456		456

drivers/ufs/core/ufshcd.c+40−18

 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
 		struct ufshcd_lrb *lrbp, int max_timeout)
 {
-	int err = 0;
+	unsigned long time_left = msecs_to_jiffies(max_timeout);
-	unsigned long time_left;
 	unsigned long flags;
+	bool pending;
+	int err;
+retry:
 	time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
-			msecs_to_jiffies(max_timeout));
+						time_left);
-	spin_lock_irqsave(hba->host->host_lock, flags);
-	hba->dev_cmd.complete = NULL;
 	if (likely(time_left)) {
+		/*
+		 * The completion handler called complete() and the caller of
+		 * this function still owns the @lrbp tag so the code below does
+		 * not trigger any race conditions.
+		 */
+		hba->dev_cmd.complete = NULL;
 		err = ufshcd_get_tr_ocs(lrbp);
 		if (!err)
 			err = ufshcd_dev_cmd_completion(hba, lrbp);
-	}
+	} else {
-	spin_unlock_irqrestore(hba->host->host_lock, flags);
-	if (!time_left) {
 		err = -ETIMEDOUT;
 		dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
 			__func__, lrbp->task_tag);
-		if (!ufshcd_clear_cmds(hba, 1U << lrbp->task_tag))
+		if (ufshcd_clear_cmds(hba, 1U << lrbp->task_tag) == 0) {
 			/* successfully cleared the command, retry if needed */
 			err = -EAGAIN;
-		/*
+			/*
-		 * in case of an error, after clearing the doorbell,
+			 * Since clearing the command succeeded we also need to
-		 * we also need to clear the outstanding_request
+			 * clear the task tag bit from the outstanding_reqs
-		 * field in hba
+			 * variable.
-		 */
+			 */
-		spin_lock_irqsave(&hba->outstanding_lock, flags);
+			spin_lock_irqsave(&hba->outstanding_lock, flags);
-		__clear_bit(lrbp->task_tag, &hba->outstanding_reqs);
+			pending = test_bit(lrbp->task_tag,
-		spin_unlock_irqrestore(&hba->outstanding_lock, flags);
+					   &hba->outstanding_reqs);
+			if (pending) {
+				hba->dev_cmd.complete = NULL;
+				__clear_bit(lrbp->task_tag,
+					    &hba->outstanding_reqs);
+			}
+			spin_unlock_irqrestore(&hba->outstanding_lock, flags);
+			if (!pending) {
+				/*
+				 * The completion handler ran while we tried to
+				 * clear the command.
+				 */
+				time_left = 1;
+				goto retry;
+			}
+		} else {
+			dev_err(hba->dev, "%s: failed to clear tag %d\n",
+				__func__, lrbp->task_tag);
+		}
 	}
 	return err;

drivers/ufs/host/ufshcd-pltfrm.c+13−2

 	return ret;
 }
+static bool phandle_exists(const struct device_node *np,
+			   const char *phandle_name, int index)
+{
+	struct device_node *parse_np = of_parse_phandle(np, phandle_name, index);
+	if (parse_np)
+		of_node_put(parse_np);
+	return parse_np != NULL;
+}
 #define MAX_PROP_SIZE 32
 static int ufshcd_populate_vreg(struct device *dev, const char *name,
-		struct ufs_vreg **out_vreg)
+				struct ufs_vreg **out_vreg)
 {
 	char prop_name[MAX_PROP_SIZE];
 	struct ufs_vreg *vreg = NULL;
 	}
 	snprintf(prop_name, MAX_PROP_SIZE, "%s-supply", name);
-	if (!of_parse_phandle(np, prop_name, 0)) {
+	if (!phandle_exists(np, prop_name, 0)) {
 		dev_info(dev, "%s: Unable to find %s regulator, assuming enabled\n",
 				__func__, prop_name);
 		goto out;

include/asm-generic/io.h+0−2

@@ -1125,9 +1125,7 @@ static inline void memcpy_toio(volatile void __iomem addr, const void buffer, · 1124 unmodified lines
1125	}	1125	}
1126	#endif	1126	#endif
1127		1127
1128	#ifndef CONFIG_GENERIC_DEVMEM_IS_ALLOWED
1129	extern int devmem_is_allowed(unsigned long pfn);	1128	extern int devmem_is_allowed(unsigned long pfn);
1130	#endif
1131		1129
1132	#endif /* __KERNEL__ */	1130	#endif /* __KERNEL__ */
1133		1131

include/linux/cpuhotplug.h+0−1

@@ -130,7 +130,6 @@ enum cpuhp_state { · 129 unmodified lines
130	CPUHP_ZCOMP_PREPARE,	130	CPUHP_ZCOMP_PREPARE,
131	CPUHP_TIMERS_PREPARE,	131	CPUHP_TIMERS_PREPARE,
132	CPUHP_MIPS_SOC_PREPARE,	132	CPUHP_MIPS_SOC_PREPARE,
133	CPUHP_LOONGARCH_SOC_PREPARE,
134	CPUHP_BP_PREPARE_DYN,	133	CPUHP_BP_PREPARE_DYN,
135	CPUHP_BP_PREPARE_DYN_END = CPUHP_BP_PREPARE_DYN + 20,	134	CPUHP_BP_PREPARE_DYN_END = CPUHP_BP_PREPARE_DYN + 20,
136	CPUHP_BRINGUP_CPU,	135	CPUHP_BRINGUP_CPU,

include/net/addrconf.h+3−0

@@ -405,6 +405,9 @@ static inline bool ip6_ignore_linkdown(const struct net_device *dev) · 404 unmodified lines
405	{	405	{
406	const struct inet6_dev *idev = __in6_dev_get(dev);	406	const struct inet6_dev *idev = __in6_dev_get(dev);
407		407
		408	if (unlikely(!idev))
		409	return true;
		410
408	return !!idev->cnf.ignore_routes_with_linkdown;	411	return !!idev->cnf.ignore_routes_with_linkdown;
409	}	412	}
410		413

include/net/bluetooth/l2cap.h+1−0

@@ -847,6 +847,7 @@ enum { · 846 unmodified lines
847	};	847	};
848		848
849	void l2cap_chan_hold(struct l2cap_chan *c);	849	void l2cap_chan_hold(struct l2cap_chan *c);
		850	struct l2cap_chan l2cap_chan_hold_unless_zero(struct l2cap_chan c);
850	void l2cap_chan_put(struct l2cap_chan *c);	851	void l2cap_chan_put(struct l2cap_chan *c);
851		852
852	static inline void l2cap_chan_lock(struct l2cap_chan *chan)	853	static inline void l2cap_chan_lock(struct l2cap_chan *chan)

include/net/inet_connection_sock.h+1−9

 struct dst_entry *inet_csk_update_pmtu(struct sock *sk, u32 mtu);
-#define TCP_PINGPONG_THRESH	3
+#define TCP_PINGPONG_THRESH	1
 static inline void inet_csk_enter_pingpong_mode(struct sock *sk)
 {
 	return inet_csk(sk)->icsk_ack.pingpong >= TCP_PINGPONG_THRESH;
 }
-static inline void inet_csk_inc_pingpong_cnt(struct sock *sk)
-{
-	struct inet_connection_sock *icsk = inet_csk(sk);
-	if (icsk->icsk_ack.pingpong < U8_MAX)
-		icsk->icsk_ack.pingpong++;
-}
 static inline bool inet_csk_has_ulp(struct sock *sk)
 {
 	return inet_sk(sk)->is_icsk && !!inet_csk(sk)->icsk_ulp_ops;

include/net/sock.h+4−4

@@ -2843,18 +2843,18 @@ static inline int sk_get_wmem0(const struct sock sk, const struct proto proto) · 2842 unmodified lines
2843	{	2843	{
2844	/* Does this proto have per netns sysctl_wmem ? */	2844	/* Does this proto have per netns sysctl_wmem ? */
2845	if (proto->sysctl_wmem_offset)	2845	if (proto->sysctl_wmem_offset)
2846	return (int )((void *)sock_net(sk) + proto->sysctl_wmem_offset);	2846	return READ_ONCE((int )((void *)sock_net(sk) + proto->sysctl_wmem_offset));
2847		2847
2848	return *proto->sysctl_wmem;	2848	return READ_ONCE(*proto->sysctl_wmem);
2849	}	2849	}
2850		2850
2851	static inline int sk_get_rmem0(const struct sock sk, const struct proto proto)	2851	static inline int sk_get_rmem0(const struct sock sk, const struct proto proto)
2852	{	2852	{
2853	/* Does this proto have per netns sysctl_rmem ? */	2853	/* Does this proto have per netns sysctl_rmem ? */
2854	if (proto->sysctl_rmem_offset)	2854	if (proto->sysctl_rmem_offset)
2855	return (int )((void *)sock_net(sk) + proto->sysctl_rmem_offset);	2855	return READ_ONCE((int )((void *)sock_net(sk) + proto->sysctl_rmem_offset));
2856		2856
2857	return *proto->sysctl_rmem;	2857	return READ_ONCE(*proto->sysctl_rmem);
2858	}	2858	}
2859		2859
2860	/* Default TCP Small queue budget is ~1 ms of data (1sec >> 10)	2860	/* Default TCP Small queue budget is ~1 ms of data (1sec >> 10)

include/net/tcp.h+1−1

@@ -1419,7 +1419,7 @@ void tcp_select_initial_window(const struct sock *sk, int __space, · 1418 unmodified lines
1419		1419
1420	static inline int tcp_win_from_space(const struct sock *sk, int space)	1420	static inline int tcp_win_from_space(const struct sock *sk, int space)
1421	{	1421	{
1422	int tcp_adv_win_scale = sock_net(sk)->ipv4.sysctl_tcp_adv_win_scale;	1422	int tcp_adv_win_scale = READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_adv_win_scale);
1423		1423
1424	return tcp_adv_win_scale <= 0 ?	1424	return tcp_adv_win_scale <= 0 ?
1425	(space>>(-tcp_adv_win_scale)) :	1425	(space>>(-tcp_adv_win_scale)) :

include/uapi/asm-generic/fcntl.h+2−0

 #define F_LINUX_SPECIFIC_BASE	1024
+#ifndef HAVE_ARCH_STRUCT_FLOCK
 struct flock {
 	short	l_type;
 	short	l_whence;
 	__ARCH_FLOCK64_PAD
 #endif
 };
+#endif /* HAVE_ARCH_STRUCT_FLOCK */
 #endif /* _ASM_GENERIC_FCNTL_H */

kernel/configs/x86_debug.config+1−2

 CONFIG_DEBUG_KMEMLEAK=y
 CONFIG_DEBUG_PAGEALLOC=y
 CONFIG_SLUB_DEBUG_ON=y
-CONFIG_KMEMCHECK=y
 CONFIG_DEBUG_OBJECTS=y
 CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
 CONFIG_GCOV_KERNEL=y
 CONFIG_LOCKDEP=y
 CONFIG_PROVE_LOCKING=y
 CONFIG_SCHEDSTATS=y
-CONFIG_VMLINUX_VALIDATION=y
+CONFIG_NOINSTR_VALIDATION=y
 CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y

kernel/locking/rwsem.c+20−10

 	struct task_struct *task;
 	enum rwsem_waiter_type type;
 	unsigned long timeout;
-	/* Writer only, not initialized in reader */
 	bool handoff_set;
 };
 #define rwsem_first_waiter(sem) \
 			 * to give up the lock), request a HANDOFF to
 			 * force the issue.
 			 */
-			if (!(oldcount & RWSEM_FLAG_HANDOFF) &&
+			if (time_after(jiffies, waiter->timeout)) {
-			    time_after(jiffies, waiter->timeout)) {
+				if (!(oldcount & RWSEM_FLAG_HANDOFF)) {
-				adjustment -= RWSEM_FLAG_HANDOFF;
+					adjustment -= RWSEM_FLAG_HANDOFF;
-				lockevent_inc(rwsem_rlock_handoff);
+					lockevent_inc(rwsem_rlock_handoff);
+				}
+				waiter->handoff_set = true;
 			}
 			atomic_long_add(-adjustment, &sem->count);
 static inline bool rwsem_try_write_lock(struct rw_semaphore *sem,
 					struct rwsem_waiter *waiter)
 {
-	bool first = rwsem_first_waiter(sem) == waiter;
+	struct rwsem_waiter *first = rwsem_first_waiter(sem);
 	long count, new;
 	lockdep_assert_held(&sem->wait_lock);
 		bool has_handoff = !!(count & RWSEM_FLAG_HANDOFF);
 		if (has_handoff) {
-			if (!first)
+			/*
+			 * Honor handoff bit and yield only when the first
+			 * waiter is the one that set it. Otherwisee, we
+			 * still try to acquire the rwsem.
+			 */
+			if (first->handoff_set && (waiter != first))
 				return false;
-			/* First waiter inherits a previously set handoff bit */
+			/*
-			waiter->handoff_set = true;
+			 * First waiter can inherit a previously set handoff
+			 * bit and spin on rwsem if lock acquisition fails.
+			 */
+			if (waiter == first)
+				waiter->handoff_set = true;
 		}
 		new = count;
 	waiter.task = current;
 	waiter.type = RWSEM_WAITING_FOR_READ;
 	waiter.timeout = jiffies + RWSEM_WAIT_TIMEOUT;
+	waiter.handoff_set = false;
 	raw_spin_lock_irq(&sem->wait_lock);
 	if (list_empty(&sem->wait_list)) {

kernel/watch_queue.c+36−22

 	rcu_assign_pointer(watch->queue, wqueue);
 }
+static int add_one_watch(struct watch *watch, struct watch_list *wlist, struct watch_queue *wqueue)
+{
+	const struct cred *cred;
+	struct watch *w;
+	hlist_for_each_entry(w, &wlist->watchers, list_node) {
+		struct watch_queue *wq = rcu_access_pointer(w->queue);
+		if (wqueue == wq && watch->id == w->id)
+			return -EBUSY;
+	}
+	cred = current_cred();
+	if (atomic_inc_return(&cred->user->nr_watches) > task_rlimit(current, RLIMIT_NOFILE)) {
+		atomic_dec(&cred->user->nr_watches);
+		return -EAGAIN;
+	}
+	watch->cred = get_cred(cred);
+	rcu_assign_pointer(watch->watch_list, wlist);
+	kref_get(&wqueue->usage);
+	kref_get(&watch->usage);
+	hlist_add_head(&watch->queue_node, &wqueue->watches);
+	hlist_add_head_rcu(&watch->list_node, &wlist->watchers);
+	return 0;
+}
 /**
  * add_watch_to_object - Add a watch on an object to a watch list
  * @watch: The watch to add
  */
 int add_watch_to_object(struct watch *watch, struct watch_list *wlist)
 {
-	struct watch_queue *wqueue = rcu_access_pointer(watch->queue);
+	struct watch_queue *wqueue;
-	struct watch *w;
+	int ret = -ENOENT;
-	hlist_for_each_entry(w, &wlist->watchers, list_node) {
-		struct watch_queue *wq = rcu_access_pointer(w->queue);
-		if (wqueue == wq && watch->id == w->id)
-			return -EBUSY;
-	}
-	watch->cred = get_current_cred();
-	rcu_assign_pointer(watch->watch_list, wlist);
-	if (atomic_inc_return(&watch->cred->user->nr_watches) >
+	rcu_read_lock();
-	    task_rlimit(current, RLIMIT_NOFILE)) {
-		atomic_dec(&watch->cred->user->nr_watches);
-		put_cred(watch->cred);
-		return -EAGAIN;
-	}
+	wqueue = rcu_access_pointer(watch->queue);
 	if (lock_wqueue(wqueue)) {
-		kref_get(&wqueue->usage);
+		spin_lock(&wlist->lock);
-		kref_get(&watch->usage);
+		ret = add_one_watch(watch, wlist, wqueue);
-		hlist_add_head(&watch->queue_node, &wqueue->watches);
+		spin_unlock(&wlist->lock);
 		unlock_wqueue(wqueue);
 	}
-	hlist_add_head(&watch->list_node, &wlist->watchers);
+	rcu_read_unlock();
-	return 0;
+	return ret;
 }
 EXPORT_SYMBOL(add_watch_to_object);

kernel/workqueue.c+4−1

 		for_each_pool_worker(worker, pool) {
 			kthread_set_per_cpu(worker->task, -1);
-			WARN_ON_ONCE(set_cpus_allowed_ptr(worker->task, wq_unbound_cpumask) < 0);
+			if (cpumask_intersects(wq_unbound_cpumask, cpu_active_mask))
+				WARN_ON_ONCE(set_cpus_allowed_ptr(worker->task, wq_unbound_cpumask) < 0);
+			else
+				WARN_ON_ONCE(set_cpus_allowed_ptr(worker->task, cpu_possible_mask) < 0);
 		}
 		mutex_unlock(&wq_pool_attach_mutex);

mm/hmm.c+8−11

 		unsigned long end, unsigned long hmm_pfns[], pmd_t pmd);
 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
-static inline bool hmm_is_device_private_entry(struct hmm_range *range,
-		swp_entry_t entry)
-{
-	return is_device_private_entry(entry) &&
-		pfn_swap_entry_to_page(entry)->pgmap->owner ==
-		range->dev_private_owner;
-}
 static inline unsigned long pte_to_hmm_pfn_flags(struct hmm_range *range,
 						 pte_t pte)
 {
 		swp_entry_t entry = pte_to_swp_entry(pte);
 		/*
-		 * Never fault in device private pages, but just report
+		 * Don't fault in device private pages owned by the caller,
-		 * the PFN even if not present.
+		 * just report the PFN.
 		 */
-		if (hmm_is_device_private_entry(range, entry)) {
+		if (is_device_private_entry(entry) &&
+		    pfn_swap_entry_to_page(entry)->pgmap->owner ==
+		    range->dev_private_owner) {
 			cpu_flags = HMM_PFN_VALID;
 			if (is_writable_device_private_entry(entry))
 				cpu_flags |= HMM_PFN_WRITE;
 		if (!non_swap_entry(entry))
 			goto fault;
+		if (is_device_private_entry(entry))
+			goto fault;
 		if (is_device_exclusive_entry(entry))
 			goto fault;

mm/page_alloc.c+8−4

@@ -3968,11 +3968,15 @@ static inline bool zone_watermark_fast(struct zone *z, unsigned int order, · 3967 unmodified lines
3968	* need to be calculated.	3968	* need to be calculated.
3969	*/	3969	*/
3970	if (!order) {	3970	if (!order) {
3971	long fast_free;	3971	long usable_free;
		3972	long reserved;
3972		3973
3973	fast_free = free_pages;	3974	usable_free = free_pages;
3974	fast_free -= __zone_watermark_unusable_free(z, 0, alloc_flags);	3975	reserved = __zone_watermark_unusable_free(z, 0, alloc_flags);
3975	if (fast_free > mark + z->lowmem_reserve[highest_zoneidx])	3976
		3977	/* reserved may over estimate high-atomic reserves. */
		3978	usable_free -= min(usable_free, reserved);
		3979	if (usable_free > mark + z->lowmem_reserve[highest_zoneidx])
3976	return true;	3980	return true;
3977	}	3981	}
3978		3982

net/bluetooth/hci_sync.c+3−3

 		return err;
 	}
+	/* Update event mask so only the allowed event can wakeup the host */
+	hci_set_event_mask_sync(hdev);
 	/* Only configure accept list if disconnect succeeded and wake
 	 * isn't being prevented.
 	 */
 	/* Unpause to take care of updating scanning params */
 	hdev->scanning_paused = false;
-	/* Update event mask so only the allowed event can wakeup the host */
-	hci_set_event_mask_sync(hdev);
 	/* Enable event filter for paired devices */
 	hci_update_event_filter_sync(hdev);

net/bluetooth/l2cap_core.c+48−13

 }
 /* Find channel with given SCID.
- * Returns locked channel. */
+ * Returns a reference locked channel.
+ */
 static struct l2cap_chan *l2cap_get_chan_by_scid(struct l2cap_conn *conn,
 						 u16 cid)
 {
 	mutex_lock(&conn->chan_lock);
 	c = __l2cap_get_chan_by_scid(conn, cid);
-	if (c)
+	if (c) {
-		l2cap_chan_lock(c);
+		/* Only lock if chan reference is not 0 */
+		c = l2cap_chan_hold_unless_zero(c);
+		if (c)
+			l2cap_chan_lock(c);
+	}
 	mutex_unlock(&conn->chan_lock);
 	return c;
 }
 /* Find channel with given DCID.
- * Returns locked channel.
+ * Returns a reference locked channel.
  */
 static struct l2cap_chan *l2cap_get_chan_by_dcid(struct l2cap_conn *conn,
 						 u16 cid)
 	mutex_lock(&conn->chan_lock);
 	c = __l2cap_get_chan_by_dcid(conn, cid);
-	if (c)
+	if (c) {
-		l2cap_chan_lock(c);
+		/* Only lock if chan reference is not 0 */
+		c = l2cap_chan_hold_unless_zero(c);
+		if (c)
+			l2cap_chan_lock(c);
+	}
 	mutex_unlock(&conn->chan_lock);
 	return c;
 	mutex_lock(&conn->chan_lock);
 	c = __l2cap_get_chan_by_ident(conn, ident);
-	if (c)
+	if (c) {
-		l2cap_chan_lock(c);
+		/* Only lock if chan reference is not 0 */
+		c = l2cap_chan_hold_unless_zero(c);
+		if (c)
+			l2cap_chan_lock(c);
+	}
 	mutex_unlock(&conn->chan_lock);
 	return c;
 	kref_get(&c->kref);
 }
+struct l2cap_chan *l2cap_chan_hold_unless_zero(struct l2cap_chan *c)
+{
+	BT_DBG("chan %p orig refcnt %u", c, kref_read(&c->kref));
+	if (!kref_get_unless_zero(&c->kref))
+		return NULL;
+	return c;
+}
 void l2cap_chan_put(struct l2cap_chan *c)
 {
 	BT_DBG("chan %p orig refcnt %u", c, kref_read(&c->kref));
 			src_match = !bacmp(&c->src, src);
 			dst_match = !bacmp(&c->dst, dst);
 			if (src_match && dst_match) {
-				l2cap_chan_hold(c);
+				c = l2cap_chan_hold_unless_zero(c);
+				if (!c)
+					continue;
 				read_unlock(&chan_list_lock);
 				return c;
 			}
 	}
 	if (c1)
-		l2cap_chan_hold(c1);
+		c1 = l2cap_chan_hold_unless_zero(c1);
 	read_unlock(&chan_list_lock);
 unlock:
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 	return err;
 }
 done:
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 	return err;
 }
 	l2cap_send_move_chan_rsp(chan, result);
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 	return 0;
 }
 	}
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 }
 static void l2cap_move_fail(struct l2cap_conn *conn, u8 ident, u16 icid,
 	l2cap_send_move_chan_cfm(chan, L2CAP_MC_UNCONFIRMED);
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 }
 static int l2cap_move_channel_rsp(struct l2cap_conn *conn,
 	l2cap_send_move_chan_cfm_rsp(conn, cmd->ident, icid);
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 	return 0;
 }
 	}
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 	return 0;
 }
 	if (credits > max_credits) {
 		BT_ERR("LE credits overflow");
 		l2cap_send_disconn_req(chan, ECONNRESET);
-		l2cap_chan_unlock(chan);
 		/* Return 0 so that we don't trigger an unnecessary
 		 * command reject packet.
 		 */
-		return 0;
+		goto unlock;
 	}
 	chan->tx_credits += credits;
 	if (chan->tx_credits)
 		chan->ops->resume(chan);
+unlock:
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 	return 0;
 }
 done:
 	l2cap_chan_unlock(chan);
+	l2cap_chan_put(chan);
 }
 static void l2cap_conless_channel(struct l2cap_conn *conn, __le16 psm,
 		if (src_type != c->src_type)
 			continue;
-		l2cap_chan_hold(c);
+		c = l2cap_chan_hold_unless_zero(c);
 		read_unlock(&chan_list_lock);
 		return c;
 	}

net/bluetooth/mgmt.c+0−1

@@ -4723,7 +4723,6 @@ static int __add_adv_patterns_monitor(struct sock sk, struct hci_dev hdev, · 4722 unmodified lines
4723	else	4723	else
4724	status = MGMT_STATUS_FAILED;	4724	status = MGMT_STATUS_FAILED;
4725		4725
4726	mgmt_pending_remove(cmd);
4727	goto unlock;	4726	goto unlock;
4728	}	4727	}
4729		4728

net/bridge/br_netlink.c+6−2

 	}
 done:
+	if (af) {
+		if (nlmsg_get_pos(skb) - (void *)af > nla_attr_size(0))
+			nla_nest_end(skb, af);
+		else
+			nla_nest_cancel(skb, af);
+	}
-	if (af)
-		nla_nest_end(skb, af);
 	nlmsg_end(skb, nlh);
 	return 0;

net/caif/caif_socket.c+7−13

 struct caifsock {
 	struct sock sk; /* must be first member */
 	struct cflayer layer;
-	u32 flow_state;
+	unsigned long flow_state;
 	struct caif_connect_request conn_req;
 	struct mutex readlock;
 	struct dentry *debugfs_socket_dir;
 static int rx_flow_is_on(struct caifsock *cf_sk)
 {
-	return test_bit(RX_FLOW_ON_BIT,
+	return test_bit(RX_FLOW_ON_BIT, &cf_sk->flow_state);
-			(void *) &cf_sk->flow_state);
 }
 static int tx_flow_is_on(struct caifsock *cf_sk)
 {
-	return test_bit(TX_FLOW_ON_BIT,
+	return test_bit(TX_FLOW_ON_BIT, &cf_sk->flow_state);
-			(void *) &cf_sk->flow_state);
 }
 static void set_rx_flow_off(struct caifsock *cf_sk)
 {
-	 clear_bit(RX_FLOW_ON_BIT,
+	clear_bit(RX_FLOW_ON_BIT, &cf_sk->flow_state);
-		 (void *) &cf_sk->flow_state);
 }
 static void set_rx_flow_on(struct caifsock *cf_sk)
 {
-	 set_bit(RX_FLOW_ON_BIT,
+	set_bit(RX_FLOW_ON_BIT, &cf_sk->flow_state);
-			(void *) &cf_sk->flow_state);
 }
 static void set_tx_flow_off(struct caifsock *cf_sk)
 {
-	 clear_bit(TX_FLOW_ON_BIT,
+	clear_bit(TX_FLOW_ON_BIT, &cf_sk->flow_state);
-		(void *) &cf_sk->flow_state);
 }
 static void set_tx_flow_on(struct caifsock *cf_sk)
 {
-	 set_bit(TX_FLOW_ON_BIT,
+	set_bit(TX_FLOW_ON_BIT, &cf_sk->flow_state);
-		(void *) &cf_sk->flow_state);
 }
 static void caif_read_lock(struct sock *sk)

net/decnet/af_decnet.c+2−2

@@ -480,8 +480,8 @@ static struct sock dn_alloc_sock(struct net net, struct socket *sock, gfp_t gf · 479 unmodified lines
480	sk->sk_family = PF_DECnet;	480	sk->sk_family = PF_DECnet;
481	sk->sk_protocol = 0;	481	sk->sk_protocol = 0;
482	sk->sk_allocation = gfp;	482	sk->sk_allocation = gfp;
483	sk->sk_sndbuf = sysctl_decnet_wmem[1];	483	sk->sk_sndbuf = READ_ONCE(sysctl_decnet_wmem[1]);
484	sk->sk_rcvbuf = sysctl_decnet_rmem[1];	484	sk->sk_rcvbuf = READ_ONCE(sysctl_decnet_rmem[1]);
485		485
486	/* Initialization of DECnet Session Control Port */	486	/* Initialization of DECnet Session Control Port */
487	scp = DN_SK(sk);	487	scp = DN_SK(sk);

net/dsa/switch.c+1−0

@@ -344,6 +344,7 @@ static int dsa_switch_do_lag_fdb_add(struct dsa_switch ds, struct dsa_lag lag, · 343 unmodified lines
344		344
345	ether_addr_copy(a->addr, addr);	345	ether_addr_copy(a->addr, addr);
346	a->vid = vid;	346	a->vid = vid;
		347	a->db = db;
347	refcount_set(&a->refcount, 1);	348	refcount_set(&a->refcount, 1);
348	list_add_tail(&a->list, &lag->fdbs);	349	list_add_tail(&a->list, &lag->fdbs);
349		350

net/ipv4/fib_trie.c+5−2

 void fib_alias_hw_flags_set(struct net *net, const struct fib_rt_info *fri)
 {
+	u8 fib_notify_on_flag_change;
 	struct fib_alias *fa_match;
 	struct sk_buff *skb;
 	int err;
 	WRITE_ONCE(fa_match->offload, fri->offload);
 	WRITE_ONCE(fa_match->trap, fri->trap);
+	fib_notify_on_flag_change = READ_ONCE(net->ipv4.sysctl_fib_notify_on_flag_change);
 	/* 2 means send notifications only if offload_failed was changed. */
-	if (net->ipv4.sysctl_fib_notify_on_flag_change == 2 &&
+	if (fib_notify_on_flag_change == 2 &&
 	    READ_ONCE(fa_match->offload_failed) == fri->offload_failed)
 		goto out;
 	WRITE_ONCE(fa_match->offload_failed, fri->offload_failed);
-	if (!net->ipv4.sysctl_fib_notify_on_flag_change)
+	if (!fib_notify_on_flag_change)
 		goto out;
 	skb = nlmsg_new(fib_nlmsg_size(fa_match->fa_info), GFP_ATOMIC);

net/ipv4/tcp.c+16−7

 	icsk->icsk_sync_mss = tcp_sync_mss;
-	WRITE_ONCE(sk->sk_sndbuf, sock_net(sk)->ipv4.sysctl_tcp_wmem[1]);
+	WRITE_ONCE(sk->sk_sndbuf, READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_wmem[1]));
-	WRITE_ONCE(sk->sk_rcvbuf, sock_net(sk)->ipv4.sysctl_tcp_rmem[1]);
+	WRITE_ONCE(sk->sk_rcvbuf, READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_rmem[1]));
 	sk_sockets_allocated_inc(sk);
 }
 				int size_goal)
 {
 	return skb->len < size_goal &&
-	       sock_net(sk)->ipv4.sysctl_tcp_autocorking &&
+	       READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_autocorking) &&
 	       !tcp_rtx_queue_empty(sk) &&
 	       refcount_read(&sk->sk_wmem_alloc) > skb->truesize &&
 	       tcp_skb_can_collapse_to(skb);
 	if (sk->sk_userlocks & SOCK_RCVBUF_LOCK)
 		cap = sk->sk_rcvbuf >> 1;
 	else
-		cap = sock_net(sk)->ipv4.sysctl_tcp_rmem[2] >> 1;
+		cap = READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_rmem[2]) >> 1;
 	val = min(val, cap);
 	WRITE_ONCE(sk->sk_rcvlowat, val ? : 1);
 		return SKB_DROP_REASON_TCP_MD5UNEXPECTED;
 	}
-	/* check the signature */
+	/* Check the signature.
-	genhash = tp->af_specific->calc_md5_hash(newhash, hash_expected,
+	 * To support dual stack listeners, we need to handle
-						 NULL, skb);
+	 * IPv4-mapped case.
+	 */
+	if (family == AF_INET)
+		genhash = tcp_v4_md5_hash_skb(newhash,
+					      hash_expected,
+					      NULL, skb);
+	else
+		genhash = tp->af_specific->calc_md5_hash(newhash,
+							 hash_expected,
+							 NULL, skb);
 	if (genhash || memcmp(hash_location, newhash, 16) != 0) {
 		NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPMD5FAILURE);

net/ipv4/tcp_input.c+22−19

 	if (sk->sk_sndbuf < sndmem)
 		WRITE_ONCE(sk->sk_sndbuf,
-			   min(sndmem, sock_net(sk)->ipv4.sysctl_tcp_wmem[2]));
+			   min(sndmem, READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_wmem[2])));
 }
 /* 2. Tuning advertised window (window_clamp, rcv_ssthresh)
 	struct tcp_sock *tp = tcp_sk(sk);
 	/* Optimize this! */
 	int truesize = tcp_win_from_space(sk, skbtruesize) >> 1;
-	int window = tcp_win_from_space(sk, sock_net(sk)->ipv4.sysctl_tcp_rmem[2]) >> 1;
+	int window = tcp_win_from_space(sk, READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_rmem[2])) >> 1;
 	while (tp->rcv_ssthresh <= window) {
 		if (truesize <= skb->len)
  */
 static void tcp_init_buffer_space(struct sock *sk)
 {
-	int tcp_app_win = sock_net(sk)->ipv4.sysctl_tcp_app_win;
+	int tcp_app_win = READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_app_win);
 	struct tcp_sock *tp = tcp_sk(sk);
 	int maxwin;
 	struct tcp_sock *tp = tcp_sk(sk);
 	struct inet_connection_sock *icsk = inet_csk(sk);
 	struct net *net = sock_net(sk);
+	int rmem2;
 	icsk->icsk_ack.quick = 0;
+	rmem2 = READ_ONCE(net->ipv4.sysctl_tcp_rmem[2]);
-	if (sk->sk_rcvbuf < net->ipv4.sysctl_tcp_rmem[2] &&
+	if (sk->sk_rcvbuf < rmem2 &&
 	    !(sk->sk_userlocks & SOCK_RCVBUF_LOCK) &&
 	    !tcp_under_memory_pressure(sk) &&
 	    sk_memory_allocated(sk) < sk_prot_mem_limits(sk, 0)) {
 		WRITE_ONCE(sk->sk_rcvbuf,
-			   min(atomic_read(&sk->sk_rmem_alloc),
+			   min(atomic_read(&sk->sk_rmem_alloc), rmem2));
-			       net->ipv4.sysctl_tcp_rmem[2]));
 	}
 	if (atomic_read(&sk->sk_rmem_alloc) > sk->sk_rcvbuf)
 		tp->rcv_ssthresh = min(tp->window_clamp, 2U * tp->advmss);
 	 * <prev RTT . ><current RTT .. ><next RTT .... >
 	 */
-	if (sock_net(sk)->ipv4.sysctl_tcp_moderate_rcvbuf &&
+	if (READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_moderate_rcvbuf) &&
 	    !(sk->sk_userlocks & SOCK_RCVBUF_LOCK)) {
 		int rcvmem, rcvbuf;
 		u64 rcvwin, grow;
 		do_div(rcvwin, tp->advmss);
 		rcvbuf = min_t(u64, rcvwin * rcvmem,
-			       sock_net(sk)->ipv4.sysctl_tcp_rmem[2]);
+			       READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_rmem[2]));
 		if (rcvbuf > sk->sk_rcvbuf) {
 			WRITE_ONCE(sk->sk_rcvbuf, rcvbuf);
 	 *	 end of slow start and should slow down.
 	 */
 	if (tcp_snd_cwnd(tp) < tp->snd_ssthresh / 2)
-		rate *= sock_net(sk)->ipv4.sysctl_tcp_pacing_ss_ratio;
+		rate *= READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_pacing_ss_ratio);
 	else
-		rate *= sock_net(sk)->ipv4.sysctl_tcp_pacing_ca_ratio;
+		rate *= READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_pacing_ca_ratio);
 	rate *= max(tcp_snd_cwnd(tp), tp->packets_out);
 	 * loss recovery is underway except recurring timeout(s) on
 	 * the same SND.UNA (sec 3.2). Disable F-RTO on path MTU probing
 	 */
-	tp->frto = net->ipv4.sysctl_tcp_frto &&
+	tp->frto = READ_ONCE(net->ipv4.sysctl_tcp_frto) &&
 		   (new_recovery || icsk->icsk_retransmits) &&
 		   !inet_csk(sk)->icsk_mtup.probe_size;
 }
 static void tcp_update_rtt_min(struct sock *sk, u32 rtt_us, const int flag)
 {
-	u32 wlen = sock_net(sk)->ipv4.sysctl_tcp_min_rtt_wlen * HZ;
+	u32 wlen = READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_min_rtt_wlen) * HZ;
 	struct tcp_sock *tp = tcp_sk(sk);
 	if ((flag & FLAG_ACK_MAYBE_DELAYED) && rtt_us > tcp_min_rtt(tp)) {
 	if (*last_oow_ack_time) {
 		s32 elapsed = (s32)(tcp_jiffies32 - *last_oow_ack_time);
-		if (0 <= elapsed && elapsed < net->ipv4.sysctl_tcp_invalid_ratelimit) {
+		if (0 <= elapsed &&
+		    elapsed < READ_ONCE(net->ipv4.sysctl_tcp_invalid_ratelimit)) {
 			NET_INC_STATS(net, mib_idx);
 			return true;	/* rate-limited: don't send yet! */
 		}
 	/* Then check host-wide RFC 5961 rate limit. */
 	now = jiffies / HZ;
 	if (now != challenge_timestamp) {
-		u32 ack_limit = net->ipv4.sysctl_tcp_challenge_ack_limit;
+		u32 ack_limit = READ_ONCE(net->ipv4.sysctl_tcp_challenge_ack_limit);
 		u32 half = (ack_limit + 1) >> 1;
 		challenge_timestamp = now;
 {
 	struct tcp_sock *tp = tcp_sk(sk);
-	if (tcp_is_sack(tp) && sock_net(sk)->ipv4.sysctl_tcp_dsack) {
+	if (tcp_is_sack(tp) && READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_dsack)) {
 		int mib_idx;
 		if (before(seq, tp->rcv_nxt))
 		NET_INC_STATS(sock_net(sk), LINUX_MIB_DELAYEDACKLOST);
 		tcp_enter_quickack_mode(sk, TCP_MAX_QUICKACKS);
-		if (tcp_is_sack(tp) && sock_net(sk)->ipv4.sysctl_tcp_dsack) {
+		if (tcp_is_sack(tp) && READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_dsack)) {
 			u32 end_seq = TCP_SKB_CB(skb)->end_seq;
 			tcp_rcv_spurious_retrans(sk, skb);
 	}
 	if (!tcp_is_sack(tp) ||
-	    tp->compressed_ack >= sock_net(sk)->ipv4.sysctl_tcp_comp_sack_nr)
+	    tp->compressed_ack >= READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_comp_sack_nr))
 		goto send_now;
 	if (tp->compressed_ack_rcv_nxt != tp->rcv_nxt) {
 	if (tp->srtt_us && tp->srtt_us < rtt)
 		rtt = tp->srtt_us;
-	delay = min_t(unsigned long, sock_net(sk)->ipv4.sysctl_tcp_comp_sack_delay_ns,
+	delay = min_t(unsigned long,
+		      READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_comp_sack_delay_ns),
 		      rtt * (NSEC_PER_USEC >> 3)/20);
 	sock_hold(sk);
 	hrtimer_start_range_ns(&tp->compressed_ack_timer, ns_to_ktime(delay),
-			       sock_net(sk)->ipv4.sysctl_tcp_comp_sack_slack_ns,
+			       READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_comp_sack_slack_ns),
 			       HRTIMER_MODE_REL_PINNED_SOFT);
 }

net/ipv4/tcp_ipv4.c+2−2

@@ -1006,7 +1006,7 @@ static int tcp_v4_send_synack(const struct sock sk, struct dst_entry dst, · 1005 unmodified lines
1006	if (skb) {	1006	if (skb) {
1007	__tcp_v4_send_check(skb, ireq->ir_loc_addr, ireq->ir_rmt_addr);	1007	__tcp_v4_send_check(skb, ireq->ir_loc_addr, ireq->ir_rmt_addr);
1008		1008
1009	tos = sock_net(sk)->ipv4.sysctl_tcp_reflect_tos ?	1009	tos = READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_reflect_tos) ?
1010	(tcp_rsk(req)->syn_tos & ~INET_ECN_MASK) \|	1010	(tcp_rsk(req)->syn_tos & ~INET_ECN_MASK) \|
1011	(inet_sk(sk)->tos & INET_ECN_MASK) :	1011	(inet_sk(sk)->tos & INET_ECN_MASK) :
1012	inet_sk(sk)->tos;	1012	inet_sk(sk)->tos;
@@ -1526,7 +1526,7 @@ struct sock tcp_v4_syn_recv_sock(const struct sock sk, struct sk_buff *skb, · 513 unmodified lines
1526	/* Set ToS of the new socket based upon the value of incoming SYN.	1526	/* Set ToS of the new socket based upon the value of incoming SYN.
1527	* ECT bits are set later in tcp_init_transfer().	1527	* ECT bits are set later in tcp_init_transfer().
1528	*/	1528	*/
1529	if (sock_net(sk)->ipv4.sysctl_tcp_reflect_tos)	1529	if (READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_reflect_tos))
1530	newinet->tos = tcp_rsk(req)->syn_tos & ~INET_ECN_MASK;	1530	newinet->tos = tcp_rsk(req)->syn_tos & ~INET_ECN_MASK;
1531		1531
1532	if (!dst) {	1532	if (!dst) {

net/ipv4/tcp_metrics.c+5−5

net/ipv4/tcp_output.c+12−15

 	if (tcp_packets_in_flight(tp) == 0)
 		tcp_ca_event(sk, CA_EVENT_TX_START);
-	/* If this is the first data packet sent in response to the
-	 * previous received data,
-	 * and it is a reply for ato after last received packet,
-	 * increase pingpong count.
-	 */
-	if (before(tp->lsndtime, icsk->icsk_ack.lrcvtime) &&
-	    (u32)(now - icsk->icsk_ack.lrcvtime) < icsk->icsk_ack.ato)
-		inet_csk_inc_pingpong_cnt(sk);
 	tp->lsndtime = now;
+	/* If it is a reply for ato after last received
+	 * packet, enter pingpong mode.
+	 */
+	if ((u32)(now - icsk->icsk_ack.lrcvtime) < icsk->icsk_ack.ato)
+		inet_csk_enter_pingpong_mode(sk);
 }
 /* Account for an ACK we sent. */
 	 * which we interpret as a sign the remote TCP is not
 	 * misinterpreting the window field as a signed quantity.
 	 */
-	if (sock_net(sk)->ipv4.sysctl_tcp_workaround_signed_windows)
+	if (READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_workaround_signed_windows))
 		(*rcv_wnd) = min(space, MAX_TCP_WINDOW);
 	else
 		(*rcv_wnd) = min_t(u32, space, U16_MAX);
 	*rcv_wscale = 0;
 	if (wscale_ok) {
 		/* Set window scaling on max possible window */
-		space = max_t(u32, space, sock_net(sk)->ipv4.sysctl_tcp_rmem[2]);
+		space = max_t(u32, space, READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_rmem[2]));
 		space = max_t(u32, space, sysctl_rmem_max);
 		space = min_t(u32, space, *window_clamp);
 		*rcv_wscale = clamp_t(int, ilog2(space) - 15,
 	 * scaled window.
 	 */
 	if (!tp->rx_opt.rcv_wscale &&
-	    sock_net(sk)->ipv4.sysctl_tcp_workaround_signed_windows)
+	    READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_workaround_signed_windows))
 		new_win = min(new_win, MAX_TCP_WINDOW);
 	else
 		new_win = min(new_win, (65535U << tp->rx_opt.rcv_wscale));
 	bytes = sk->sk_pacing_rate >> READ_ONCE(sk->sk_pacing_shift);
-	r = tcp_min_rtt(tcp_sk(sk)) >> sock_net(sk)->ipv4.sysctl_tcp_tso_rtt_log;
+	r = tcp_min_rtt(tcp_sk(sk)) >> READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_tso_rtt_log);
 	if (r < BITS_PER_TYPE(sk->sk_gso_max_size))
 		bytes += sk->sk_gso_max_size >> r;
 	min_tso = ca_ops->min_tso_segs ?
 			ca_ops->min_tso_segs(sk) :
-			sock_net(sk)->ipv4.sysctl_tcp_min_tso_segs;
+			READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_min_tso_segs);
 	tso_segs = tcp_tso_autosize(sk, mss_now, min_tso);
 	return min_t(u32, tso_segs, sk->sk_gso_max_segs);
 		      sk->sk_pacing_rate >> READ_ONCE(sk->sk_pacing_shift));
 	if (sk->sk_pacing_status == SK_PACING_NONE)
 		limit = min_t(unsigned long, limit,
-			      sock_net(sk)->ipv4.sysctl_tcp_limit_output_bytes);
+			      READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_limit_output_bytes));
 	limit <<= factor;
 	if (static_branch_unlikely(&tcp_tx_delay_enabled) &&

net/ipv6/mcast.c+8−6

 		if (++cnt >= MLD_MAX_QUEUE) {
 			rework = true;
-			schedule_delayed_work(&idev->mc_query_work, 0);
 			break;
 		}
 	}
 		__mld_query_work(skb);
 	mutex_unlock(&idev->mc_lock);
-	if (!rework)
+	if (rework && queue_delayed_work(mld_wq, &idev->mc_query_work, 0))
-		in6_dev_put(idev);
+		return;
+	in6_dev_put(idev);
 }
 /* called with rcu_read_lock() */
 		if (++cnt >= MLD_MAX_QUEUE) {
 			rework = true;
-			schedule_delayed_work(&idev->mc_report_work, 0);
 			break;
 		}
 	}
 		__mld_report_work(skb);
 	mutex_unlock(&idev->mc_lock);
-	if (!rework)
+	if (rework && queue_delayed_work(mld_wq, &idev->mc_report_work, 0))
-		in6_dev_put(idev);
+		return;
+	in6_dev_put(idev);
 }
 static bool is_in(struct ifmcaddr6 *pmc, struct ip6_sf_list *psf, int type,

net/ipv6/ping.c+6−0

 #include <linux/proc_fs.h>
 #include <net/ping.h>
+static void ping_v6_destroy(struct sock *sk)
+{
+	inet6_destroy_sock(sk);
+}
 /* Compatibility glue so we can support IPv6 when it's compiled as a module */
 static int dummy_ipv6_recv_error(struct sock *sk, struct msghdr *msg, int len,
 				 int *addr_len)
 	.owner =	THIS_MODULE,
 	.init =		ping_init_sock,
 	.close =	ping_close,
+	.destroy =	ping_v6_destroy,
 	.connect =	ip6_datagram_connect_v6_only,
 	.disconnect =	__udp_disconnect,
 	.setsockopt =	ipv6_setsockopt,

net/ipv6/tcp_ipv6.c+2−2

@@ -546,7 +546,7 @@ static int tcp_v6_send_synack(const struct sock sk, struct dst_entry dst, · 545 unmodified lines
546	if (np->repflow && ireq->pktopts)	546	if (np->repflow && ireq->pktopts)
547	fl6->flowlabel = ip6_flowlabel(ipv6_hdr(ireq->pktopts));	547	fl6->flowlabel = ip6_flowlabel(ipv6_hdr(ireq->pktopts));
548		548
549	tclass = sock_net(sk)->ipv4.sysctl_tcp_reflect_tos ?	549	tclass = READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_reflect_tos) ?
550	(tcp_rsk(req)->syn_tos & ~INET_ECN_MASK) \|	550	(tcp_rsk(req)->syn_tos & ~INET_ECN_MASK) \|
551	(np->tclass & INET_ECN_MASK) :	551	(np->tclass & INET_ECN_MASK) :
552	np->tclass;	552	np->tclass;
@@ -1314,7 +1314,7 @@ static struct sock tcp_v6_syn_recv_sock(const struct sock sk, struct sk_buff * · 761 unmodified lines
1314	/* Set ToS of the new socket based upon the value of incoming SYN.	1314	/* Set ToS of the new socket based upon the value of incoming SYN.
1315	* ECT bits are set later in tcp_init_transfer().	1315	* ECT bits are set later in tcp_init_transfer().
1316	*/	1316	*/
1317	if (sock_net(sk)->ipv4.sysctl_tcp_reflect_tos)	1317	if (READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_reflect_tos))
1318	newnp->tclass = tcp_rsk(req)->syn_tos & ~INET_ECN_MASK;	1318	newnp->tclass = tcp_rsk(req)->syn_tos & ~INET_ECN_MASK;
1319		1319
1320	/* Clone native IPv6 options from listening socket (if any)	1320	/* Clone native IPv6 options from listening socket (if any)

net/mac80211/iface.c+1−2

@@ -377,9 +377,8 @@ static void ieee80211_do_stop(struct ieee80211_sub_if_data *sdata, bool going_do · 376 unmodified lines
377	bool cancel_scan;	377	bool cancel_scan;
378	struct cfg80211_nan_func *func;	378	struct cfg80211_nan_func *func;
379		379
380	spin_lock_bh(&local->fq.lock);
381	clear_bit(SDATA_STATE_RUNNING, &sdata->state);	380	clear_bit(SDATA_STATE_RUNNING, &sdata->state);
382	spin_unlock_bh(&local->fq.lock);	381	synchronize_rcu(); /* flush _ieee80211_wake_txqs() */
383		382
384	cancel_scan = rcu_access_pointer(local->scan_sdata) == sdata;	383	cancel_scan = rcu_access_pointer(local->scan_sdata) == sdata;
385	if (cancel_scan)	384	if (cancel_scan)

net/mptcp/options.c+1−1

@@ -1271,7 +1271,7 @@ raise_win: · 1270 unmodified lines
1271	if (unlikely(th->syn))	1271	if (unlikely(th->syn))
1272	new_win = min(new_win, 65535U) << tp->rx_opt.rcv_wscale;	1272	new_win = min(new_win, 65535U) << tp->rx_opt.rcv_wscale;
1273	if (!tp->rx_opt.rcv_wscale &&	1273	if (!tp->rx_opt.rcv_wscale &&
1274	sock_net(ssk)->ipv4.sysctl_tcp_workaround_signed_windows)	1274	READ_ONCE(sock_net(ssk)->ipv4.sysctl_tcp_workaround_signed_windows))
1275	new_win = min(new_win, MAX_TCP_WINDOW);	1275	new_win = min(new_win, MAX_TCP_WINDOW);
1276	else	1276	else
1277	new_win = min(new_win, (65535U << tp->rx_opt.rcv_wscale));	1277	new_win = min(new_win, (65535U << tp->rx_opt.rcv_wscale));

net/mptcp/protocol.c+4−4

@@ -1908,7 +1908,7 @@ static void mptcp_rcv_space_adjust(struct mptcp_sock *msk, int copied) · 1907 unmodified lines
1908	if (msk->rcvq_space.copied <= msk->rcvq_space.space)	1908	if (msk->rcvq_space.copied <= msk->rcvq_space.space)
1909	goto new_measure;	1909	goto new_measure;
1910		1910
1911	if (sock_net(sk)->ipv4.sysctl_tcp_moderate_rcvbuf &&	1911	if (READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_moderate_rcvbuf) &&
1912	!(sk->sk_userlocks & SOCK_RCVBUF_LOCK)) {	1912	!(sk->sk_userlocks & SOCK_RCVBUF_LOCK)) {
1913	int rcvmem, rcvbuf;	1913	int rcvmem, rcvbuf;
1914	u64 rcvwin, grow;	1914	u64 rcvwin, grow;
@@ -1926,7 +1926,7 @@ static void mptcp_rcv_space_adjust(struct mptcp_sock *msk, int copied) · 11 unmodified lines
1926		1926
1927	do_div(rcvwin, advmss);	1927	do_div(rcvwin, advmss);
1928	rcvbuf = min_t(u64, rcvwin * rcvmem,	1928	rcvbuf = min_t(u64, rcvwin * rcvmem,
1929	sock_net(sk)->ipv4.sysctl_tcp_rmem[2]);	1929	READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_rmem[2]));
1930		1930
1931	if (rcvbuf > sk->sk_rcvbuf) {	1931	if (rcvbuf > sk->sk_rcvbuf) {
1932	u32 window_clamp;	1932	u32 window_clamp;
@@ -2669,8 +2669,8 @@ static int mptcp_init_sock(struct sock *sk) · 736 unmodified lines
2669	mptcp_ca_reset(sk);	2669	mptcp_ca_reset(sk);
2670		2670
2671	sk_sockets_allocated_inc(sk);	2671	sk_sockets_allocated_inc(sk);
2672	sk->sk_rcvbuf = sock_net(sk)->ipv4.sysctl_tcp_rmem[1];	2672	sk->sk_rcvbuf = READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_rmem[1]);
2673	sk->sk_sndbuf = sock_net(sk)->ipv4.sysctl_tcp_wmem[1];	2673	sk->sk_sndbuf = READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_wmem[1]);
2674		2674
2675	return 0;	2675	return 0;
2676	}	2676	}

net/mptcp/subflow.c+1−1

@@ -1533,7 +1533,7 @@ int __mptcp_subflow_connect(struct sock sk, const struct mptcp_addr_info loc, · 1532 unmodified lines
1533	mptcp_sock_graft(ssk, sk->sk_socket);	1533	mptcp_sock_graft(ssk, sk->sk_socket);
1534	iput(SOCK_INODE(sf));	1534	iput(SOCK_INODE(sf));
1535	WRITE_ONCE(msk->allow_infinite_fallback, false);	1535	WRITE_ONCE(msk->allow_infinite_fallback, false);
1536	return err;	1536	return 0;
1537		1537
1538	failed_unlink:	1538	failed_unlink:
1539	list_del(&subflow->node);	1539	list_del(&subflow->node);

net/netfilter/nf_tables_api.c+6−0

 			if (err < 0)
 				return err;
 		}
+		cond_resched();
 	}
 	return 0;
 				break;
 			}
 		}
+		cond_resched();
 	}
 	list_for_each_entry(set, &ctx->table->sets, list) {
+		cond_resched();
 		if (!nft_is_active_next(ctx->net, set))
 			continue;
 		if (!(set->flags & NFT_SET_MAP) ||

net/netfilter/nfnetlink_queue.c+6−1

 }
 static int
-nfqnl_mangle(void *data, int data_len, struct nf_queue_entry *e, int diff)
+nfqnl_mangle(void *data, unsigned int data_len, struct nf_queue_entry *e, int diff)
 {
 	struct sk_buff *nskb;
 	if (diff < 0) {
+		unsigned int min_len = skb_transport_offset(e->skb);
+		if (data_len < min_len)
+			return -EINVAL;
 		if (pskb_trim(e->skb, data_len))
 			return -ENOMEM;
 	} else if (diff > 0) {

net/netfilter/nft_queue.c+27−0

@@ -68,6 +68,31 @@ static void nft_queue_sreg_eval(const struct nft_expr *expr, · 67 unmodified lines
68	regs->verdict.code = ret;	68	regs->verdict.code = ret;
69	}	69	}
70		70
		71	static int nft_queue_validate(const struct nft_ctx *ctx,
		72	const struct nft_expr *expr,
		73	const struct nft_data **data)
		74	{
		75	static const unsigned int supported_hooks = ((1 << NF_INET_PRE_ROUTING) \|
		76	(1 << NF_INET_LOCAL_IN) \|
		77	(1 << NF_INET_FORWARD) \|
		78	(1 << NF_INET_LOCAL_OUT) \|
		79	(1 << NF_INET_POST_ROUTING));
		80
		81	switch (ctx->family) {
		82	case NFPROTO_IPV4:
		83	case NFPROTO_IPV6:
		84	case NFPROTO_INET:
		85	case NFPROTO_BRIDGE:
		86	break;
		87	case NFPROTO_NETDEV: /* lacks okfn */
		88	fallthrough;
		89	default:
		90	return -EOPNOTSUPP;
		91	}
		92
		93	return nft_chain_validate_hooks(ctx->chain, supported_hooks);
		94	}
		95
71	static const struct nla_policy nft_queue_policy[NFTA_QUEUE_MAX + 1] = {	96	static const struct nla_policy nft_queue_policy[NFTA_QUEUE_MAX + 1] = {
72	[NFTA_QUEUE_NUM] = { .type = NLA_U16 },	97	[NFTA_QUEUE_NUM] = { .type = NLA_U16 },
73	[NFTA_QUEUE_TOTAL] = { .type = NLA_U16 },	98	[NFTA_QUEUE_TOTAL] = { .type = NLA_U16 },
@@ -164,6 +189,7 @@ static const struct nft_expr_ops nft_queue_ops = { · 90 unmodified lines
164	.eval = nft_queue_eval,	189	.eval = nft_queue_eval,
165	.init = nft_queue_init,	190	.init = nft_queue_init,
166	.dump = nft_queue_dump,	191	.dump = nft_queue_dump,
		192	.validate = nft_queue_validate,
167	.reduce = NFT_REDUCE_READONLY,	193	.reduce = NFT_REDUCE_READONLY,
168	};	194	};
169		195
@@ -173,6 +199,7 @@ static const struct nft_expr_ops nft_queue_sreg_ops = { · 3 unmodified lines
173	.eval = nft_queue_sreg_eval,	199	.eval = nft_queue_sreg_eval,
174	.init = nft_queue_sreg_init,	200	.init = nft_queue_sreg_init,
175	.dump = nft_queue_sreg_dump,	201	.dump = nft_queue_sreg_dump,
		202	.validate = nft_queue_validate,
176	.reduce = NFT_REDUCE_READONLY,	203	.reduce = NFT_REDUCE_READONLY,
177	};	204	};
178		205

net/sctp/associola.c+2−3

@@ -229,9 +229,8 @@ static struct sctp_association *sctp_association_init( · 228 unmodified lines
229	if (!sctp_ulpq_init(&asoc->ulpq, asoc))	229	if (!sctp_ulpq_init(&asoc->ulpq, asoc))
230	goto fail_init;	230	goto fail_init;
231		231
232	if (sctp_stream_init(&asoc->stream, asoc->c.sinit_num_ostreams,	232	if (sctp_stream_init(&asoc->stream, asoc->c.sinit_num_ostreams, 0, gfp))
233	0, gfp))	233	goto stream_free;
234	goto fail_init;
235		234
236	/* Initialize default path MTU. */	235	/* Initialize default path MTU. */
237	asoc->pathmtu = sp->pathmtu;	236	asoc->pathmtu = sp->pathmtu;

net/sctp/stream.c+3−16

 	ret = sctp_stream_alloc_out(stream, outcnt, gfp);
 	if (ret)
-		goto out_err;
+		return ret;
 	for (i = 0; i < stream->outcnt; i++)
 		SCTP_SO(stream, i)->state = SCTP_STREAM_OPEN;
 handle_in:
 	sctp_stream_interleave_init(stream);
 	if (!incnt)
-		goto out;
+		return 0;
-	ret = sctp_stream_alloc_in(stream, incnt, gfp);
-	if (ret)
-		goto in_err;
-	goto out;
-in_err:
+	return sctp_stream_alloc_in(stream, incnt, gfp);
-	sched->free(stream);
-	genradix_free(&stream->in);
-out_err:
-	genradix_free(&stream->out);
-	stream->outcnt = 0;
-out:
-	return ret;
 }
 int sctp_stream_init_ext(struct sctp_stream *stream, __u16 sid)

net/sctp/stream_sched.c+1−1

@@ -160,7 +160,7 @@ int sctp_sched_set_sched(struct sctp_association *asoc, · 159 unmodified lines
160	if (!SCTP_SO(&asoc->stream, i)->ext)	160	if (!SCTP_SO(&asoc->stream, i)->ext)
161	continue;	161	continue;
162		162
163	ret = n->init_sid(&asoc->stream, i, GFP_KERNEL);	163	ret = n->init_sid(&asoc->stream, i, GFP_ATOMIC);
164	if (ret)	164	if (ret)
165	goto err;	165	goto err;
166	}	166	}

net/tipc/socket.c+1−1

@@ -517,7 +517,7 @@ static int tipc_sk_create(struct net net, struct socket sock, · 516 unmodified lines
517	timer_setup(&sk->sk_timer, tipc_sk_timeout, 0);	517	timer_setup(&sk->sk_timer, tipc_sk_timeout, 0);
518	sk->sk_shutdown = 0;	518	sk->sk_shutdown = 0;
519	sk->sk_backlog_rcv = tipc_sk_backlog_rcv;	519	sk->sk_backlog_rcv = tipc_sk_backlog_rcv;
520	sk->sk_rcvbuf = sysctl_tipc_rmem[1];	520	sk->sk_rcvbuf = READ_ONCE(sysctl_tipc_rmem[1]);
521	sk->sk_data_ready = tipc_data_ready;	521	sk->sk_data_ready = tipc_data_ready;
522	sk->sk_write_space = tipc_write_space;	522	sk->sk_write_space = tipc_write_space;
523	sk->sk_destruct = tipc_sock_destruct;	523	sk->sk_destruct = tipc_sock_destruct;

net/tls/tls_device.c+6−1

 		 * by tls_device_free_ctx. rx_conf and tx_conf stay in TLS_HW.
 		 * Now release the ref taken above.
 		 */
-		if (refcount_dec_and_test(&ctx->refcount))
+		if (refcount_dec_and_test(&ctx->refcount)) {
+			/* sk_destruct ran after tls_device_down took a ref, and
+			 * it returned early. Complete the destruction here.
+			 */
+			list_del(&ctx->list);
 			tls_device_free_ctx(ctx);
+		}
 	}
 	up_write(&device_offload_lock);

tools/arch/x86/include/asm/cpufeatures.h+1−0

@@ -302,6 +302,7 @@ · 301 unmodified lines
302	#define X86_FEATURE_RETPOLINE_LFENCE (1132+13) / "" Use LFENCE for Spectre variant 2 */	302	#define X86_FEATURE_RETPOLINE_LFENCE (1132+13) / "" Use LFENCE for Spectre variant 2 */
303	#define X86_FEATURE_RETHUNK (1132+14) / "" Use REturn THUNK */	303	#define X86_FEATURE_RETHUNK (1132+14) / "" Use REturn THUNK */
304	#define X86_FEATURE_UNRET (1132+15) / "" AMD BTB untrain return */	304	#define X86_FEATURE_UNRET (1132+15) / "" AMD BTB untrain return */
		305	#define X86_FEATURE_USE_IBPB_FW (1132+16) / "" Use IBPB during runtime firmware calls */
305		306
306	/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */	307	/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
307	#define X86_FEATURE_AVX_VNNI (1232+ 4) / AVX VNNI instructions */	308	#define X86_FEATURE_AVX_VNNI (1232+ 4) / AVX VNNI instructions */

tools/include/uapi/asm-generic/fcntl.h+10−1

+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
 #ifndef _ASM_GENERIC_FCNTL_H
 #define _ASM_GENERIC_FCNTL_H
 /* a horrid kludge trying to make sure that this will fail on old kernels */
 #define O_TMPFILE (__O_TMPFILE | O_DIRECTORY)
 #define O_TMPFILE_MASK (__O_TMPFILE | O_DIRECTORY | O_CREAT)
 #ifndef O_NDELAY
 #define O_NDELAY	O_NONBLOCK
 #define F_GETSIG	11	/* for sockets. */
 #endif
+#if __BITS_PER_LONG == 32 || defined(__KERNEL__)
 #ifndef F_GETLK64
 #define F_GETLK64	12	/*  using 'struct flock64' */
 #define F_SETLK64	13
 #define F_SETLKW64	14
 #endif
+#endif /* __BITS_PER_LONG == 32 || defined(__KERNEL__) */
 #ifndef F_SETOWN_EX
 #define F_SETOWN_EX	15
 				   blocking */
 #define LOCK_UN		8	/* remove lock */
+/*
+ * LOCK_MAND support has been removed from the kernel. We leave the symbols
+ * here to not break legacy builds, but these should not be used in new code.
+ */
 #define LOCK_MAND	32	/* This is a mandatory flock ... */
 #define LOCK_READ	64	/* which allows concurrent read operations */
 #define LOCK_WRITE	128	/* which allows concurrent write operations */
 #define F_LINUX_SPECIFIC_BASE	1024
+#ifndef HAVE_ARCH_STRUCT_FLOCK
 struct flock {
 	short	l_type;
 	short	l_whence;
 	__ARCH_FLOCK64_PAD
 #endif
 };
+#endif /* HAVE_ARCH_STRUCT_FLOCK */
 #endif /* _ASM_GENERIC_FCNTL_H */

tools/perf/scripts/python/arm-cs-trace-disasm.py+18−16

 def get_offset(perf_dict, field):
 	if field in perf_dict:
-		return f"+0x{perf_dict[field]:x}"
+		return "+%#x" % perf_dict[field]
 	return ""
 def get_dso_file_path(dso_name, dso_build_id):
 	else:
 		append = "/elf"
-	dso_path = f"{os.environ['PERF_BUILDID_DIR']}/{dso_name}/{dso_build_id}{append}"
+	dso_path = os.environ['PERF_BUILDID_DIR'] + "/" + dso_name + "/" + dso_build_id + append;
 	# Replace duplicate slash chars to single slash char
 	dso_path = dso_path.replace('//', '/', 1)
 	return dso_path
 		start_addr = start_addr - dso_start;
 		stop_addr = stop_addr - dso_start;
 		disasm = [ options.objdump_name, "-d", "-z",
-			   f"--start-address=0x{start_addr:x}",
+			   "--start-address="+format(start_addr,"#x"),
-			   f"--stop-address=0x{stop_addr:x}" ]
+			   "--stop-address="+format(stop_addr,"#x") ]
 		disasm += [ dso_fname ]
 		disasm_output = check_output(disasm).decode('utf-8').split('\n')
 		disasm_cache[addr_range] = disasm_output
 			m = disasm_re.search(line)
 			if m is None:
 				continue
-		print(f"\t{line}")
+		print("\t" + line)
 def print_sample(sample):
-	print(f"Sample = {{ cpu: {sample['cpu']:04} addr: 0x{sample['addr']:016x} " \
+	print("Sample = { cpu: %04d addr: 0x%016x phys_addr: 0x%016x ip: 0x%016x " \
-	      f"phys_addr: 0x{sample['phys_addr']:016x} ip: 0x{sample['ip']:016x} " \
+	      "pid: %d tid: %d period: %d time: %d }" % \
-	      f"pid: {sample['pid']} tid: {sample['tid']} period: {sample['period']} time: {sample['time']} }}")
+	      (sample['cpu'], sample['addr'], sample['phys_addr'], \
+	       sample['ip'], sample['pid'], sample['tid'], \
+	       sample['period'], sample['time']))
 def trace_begin():
 	print('ARM CoreSight Trace Data Assembler Dump')
 	cpu = sample["cpu"]
 	pid = sample["pid"]
 	tid = sample["tid"]
-	return f"{comm:>16} {pid:>5}/{tid:<5} [{cpu:04}] {sec:9}.{ns:09}  "
+	return "%16s %5u/%-5u [%04u] %9u.%09u  " % (comm, pid, tid, cpu, sec, ns)
 # This code is copied from intel-pt-events.py for printing source code
 # line and symbols.
 	glb_line_number = line_number
 	glb_source_file_name = source_file_name
-	print(f"{start_str}{src_str}")
+	print(start_str, src_str)
 def process_event(param_dict):
 	global cache_size
 	symbol = get_optional(param_dict, "symbol")
 	if (options.verbose == True):
-		print(f"Event type: {name}")
+		print("Event type: %s" % name)
 		print_sample(sample)
 	# If cannot find dso so cannot dump assembler, bail out
 	# Validate dso start and end addresses
 	if ((dso_start == '[unknown]') or (dso_end == '[unknown]')):
-		print(f"Failed to find valid dso map for dso {dso}")
+		print("Failed to find valid dso map for dso %s" % dso)
 		return
 	if (name[0:12] == "instructions"):
 	# Handle CS_ETM_TRACE_ON packet if start_addr=0 and stop_addr=4
 	if (start_addr == 0 and stop_addr == 4):
-		print(f"CPU{cpu}: CS_ETM_TRACE_ON packet is inserted")
+		print("CPU%d: CS_ETM_TRACE_ON packet is inserted" % cpu)
 		return
 	if (start_addr < int(dso_start) or start_addr > int(dso_end)):
-		print(f"Start address 0x{start_addr:x} is out of range [ 0x{dso_start:x} .. 0x{dso_end:x} ] for dso {dso}")
+		print("Start address 0x%x is out of range [ 0x%x .. 0x%x ] for dso %s" % (start_addr, int(dso_start), int(dso_end), dso))
 		return
 	if (stop_addr < int(dso_start) or stop_addr > int(dso_end)):
-		print(f"Stop address 0x{stop_addr:x} is out of range [ 0x{dso_start:x} .. 0x{dso_end:x} ] for dso {dso}")
+		print("Stop address 0x%x is out of range [ 0x%x .. 0x%x ] for dso %s" % (stop_addr, int(dso_start), int(dso_end), dso))
 		return
 	if (options.objdump_name != None):
 		if path.exists(dso_fname):
 			print_disam(dso_fname, dso_vm_start, start_addr, stop_addr)
 		else:
-			print(f"Failed to find dso {dso} for address range [ 0x{start_addr:x} .. 0x{stop_addr:x} ]")
+			print("Failed to find dso %s for address range [ 0x%x .. 0x%x ]" % (dso, start_addr, stop_addr))
 	print_srccode(comm, param_dict, sample, symbol, dso)

tools/perf/util/bpf-loader.c+7−11

@@ -63,20 +63,16 @@ static struct hashmap *bpf_map_hash; · 62 unmodified lines
63	static struct bpf_perf_object *	63	static struct bpf_perf_object *
64	bpf_perf_object__next(struct bpf_perf_object *prev)	64	bpf_perf_object__next(struct bpf_perf_object *prev)
65	{	65	{
66	struct bpf_perf_object *next;	66	if (!prev) {
67		67	if (list_empty(&bpf_objects_list))
68	if (!prev)	68	return NULL;
69	next = list_first_entry(&bpf_objects_list,
70	struct bpf_perf_object,
71	list);
72	else
73	next = list_next_entry(prev, list);
74		69
75	/* Empty list is noticed here so don't need checking on entry. */	70	return list_first_entry(&bpf_objects_list, struct bpf_perf_object, list);
76	if (&next->list == &bpf_objects_list)	71	}
		72	if (list_is_last(&prev->list, &bpf_objects_list))
77	return NULL;	73	return NULL;
78		74
79	return next;	75	return list_next_entry(prev, list);
80	}	76	}
81		77
82	#define bpf_perf_object__for_each(perf_obj, tmp) \	78	#define bpf_perf_object__for_each(perf_obj, tmp) \

tools/perf/util/symbol-elf.c+52−4

@@ -233,6 +233,33 @@ Elf_Scn elf_section_by_name(Elf elf, GElf_Ehdr *ep, · 232 unmodified lines
233	return NULL;	233	return NULL;
234	}	234	}
235		235
		236	static int elf_read_program_header(Elf elf, u64 vaddr, GElf_Phdr phdr)
		237	{
		238	size_t i, phdrnum;
		239	u64 sz;
		240
		241	if (elf_getphdrnum(elf, &phdrnum))
		242	return -1;
		243
		244	for (i = 0; i < phdrnum; i++) {
		245	if (gelf_getphdr(elf, i, phdr) == NULL)
		246	return -1;
		247
		248	if (phdr->p_type != PT_LOAD)
		249	continue;
		250
		251	sz = max(phdr->p_memsz, phdr->p_filesz);
		252	if (!sz)
		253	continue;
		254
		255	if (vaddr >= phdr->p_vaddr && (vaddr < phdr->p_vaddr + sz))
		256	return 0;
		257	}
		258
		259	/* Not found any valid program header */
		260	return -1;
		261	}
		262
236	static bool want_demangle(bool is_kernel_sym)	263	static bool want_demangle(bool is_kernel_sym)
237	{	264	{
238	return is_kernel_sym ? symbol_conf.demangle_kernel : symbol_conf.demangle;	265	return is_kernel_sym ? symbol_conf.demangle_kernel : symbol_conf.demangle;
@@ -1209,6 +1236,7 @@ dso__load_sym_internal(struct dso dso, struct map map, struct symsrc *syms_ss, · 970 unmodified lines
1209	sym.st_value);	1236	sym.st_value);
1210	used_opd = true;	1237	used_opd = true;
1211	}	1238	}
		1239
1212	/*	1240	/*
1213	* When loading symbols in a data mapping, ABS symbols (which	1241	* When loading symbols in a data mapping, ABS symbols (which
1214	* has a value of SHN_ABS in its st_shndx) failed at	1242	* has a value of SHN_ABS in its st_shndx) failed at
@@ -1227,6 +1255,17 @@ dso__load_sym_internal(struct dso dso, struct map map, struct symsrc *syms_ss, · 12 unmodified lines
1227		1255
1228	gelf_getshdr(sec, &shdr);	1256	gelf_getshdr(sec, &shdr);
1229		1257
		1258	/*
		1259	* If the attribute bit SHF_ALLOC is not set, the section
		1260	* doesn't occupy memory during process execution.
		1261	* E.g. ".gnu.warning.*" section is used by linker to generate
		1262	* warnings when calling deprecated functions, the symbols in
		1263	* the section aren't loaded to memory during process execution,
		1264	* so skip them.
		1265	*/
		1266	if (!(shdr.sh_flags & SHF_ALLOC))
		1267	continue;
		1268
1230	secstrs = secstrs_sym;	1269	secstrs = secstrs_sym;
1231		1270
1232	/*	1271	/*
@@ -1262,11 +1301,20 @@ dso__load_sym_internal(struct dso dso, struct map map, struct symsrc *syms_ss, · 29 unmodified lines
1262	goto out_elf_end;	1301	goto out_elf_end;
1263	} else if ((used_opd && runtime_ss->adjust_symbols) \|\|	1302	} else if ((used_opd && runtime_ss->adjust_symbols) \|\|
1264	(!used_opd && syms_ss->adjust_symbols)) {	1303	(!used_opd && syms_ss->adjust_symbols)) {
		1304	GElf_Phdr phdr;
		1305
		1306	if (elf_read_program_header(syms_ss->elf,
		1307	(u64)sym.st_value, &phdr)) {
		1308	pr_warning("%s: failed to find program header for "
		1309	"symbol: %s st_value: %#" PRIx64 "\n",
		1310	__func__, elf_name, (u64)sym.st_value);
		1311	continue;
		1312	}
1265	pr_debug4("%s: adjusting symbol: st_value: %#" PRIx64 " "	1313	pr_debug4("%s: adjusting symbol: st_value: %#" PRIx64 " "
1266	"sh_addr: %#" PRIx64 " sh_offset: %#" PRIx64 "\n", __func__,	1314	"p_vaddr: %#" PRIx64 " p_offset: %#" PRIx64 "\n",
1267	(u64)sym.st_value, (u64)shdr.sh_addr,	1315	__func__, (u64)sym.st_value, (u64)phdr.p_vaddr,
1268	(u64)shdr.sh_offset);	1316	(u64)phdr.p_offset);
1269	sym.st_value -= shdr.sh_addr - shdr.sh_offset;	1317	sym.st_value -= phdr.p_vaddr - phdr.p_offset;
1270	}	1318	}
1271		1319
1272	demangled = demangle_sym(dso, kmodule, elf_name);	1320	demangled = demangle_sym(dso, kmodule, elf_name);

@@ -329,7 +329,7 @@ void tcp_update_metrics(struct sock *sk) · 328 unmodified lines
329	int m;	329	int m;
330		330
331	sk_dst_confirm(sk);	331	sk_dst_confirm(sk);
332	if (net->ipv4.sysctl_tcp_nometrics_save \|\| !dst)	332	if (READ_ONCE(net->ipv4.sysctl_tcp_nometrics_save) \|\| !dst)
333	return;	333	return;
334		334
335	rcu_read_lock();	335	rcu_read_lock();
@@ -385,7 +385,7 @@ void tcp_update_metrics(struct sock *sk) · 49 unmodified lines
385		385
386	if (tcp_in_initial_slowstart(tp)) {	386	if (tcp_in_initial_slowstart(tp)) {
387	/* Slow start still did not finish. */	387	/* Slow start still did not finish. */
388	if (!net->ipv4.sysctl_tcp_no_ssthresh_metrics_save &&	388	if (!READ_ONCE(net->ipv4.sysctl_tcp_no_ssthresh_metrics_save) &&
389	!tcp_metric_locked(tm, TCP_METRIC_SSTHRESH)) {	389	!tcp_metric_locked(tm, TCP_METRIC_SSTHRESH)) {
390	val = tcp_metric_get(tm, TCP_METRIC_SSTHRESH);	390	val = tcp_metric_get(tm, TCP_METRIC_SSTHRESH);
391	if (val && (tcp_snd_cwnd(tp) >> 1) > val)	391	if (val && (tcp_snd_cwnd(tp) >> 1) > val)
@@ -401,7 +401,7 @@ void tcp_update_metrics(struct sock *sk) · 9 unmodified lines
401	} else if (!tcp_in_slow_start(tp) &&	401	} else if (!tcp_in_slow_start(tp) &&
402	icsk->icsk_ca_state == TCP_CA_Open) {	402	icsk->icsk_ca_state == TCP_CA_Open) {
403	/* Cong. avoidance phase, cwnd is reliable. */	403	/* Cong. avoidance phase, cwnd is reliable. */
404	if (!net->ipv4.sysctl_tcp_no_ssthresh_metrics_save &&	404	if (!READ_ONCE(net->ipv4.sysctl_tcp_no_ssthresh_metrics_save) &&
405	!tcp_metric_locked(tm, TCP_METRIC_SSTHRESH))	405	!tcp_metric_locked(tm, TCP_METRIC_SSTHRESH))
406	tcp_metric_set(tm, TCP_METRIC_SSTHRESH,	406	tcp_metric_set(tm, TCP_METRIC_SSTHRESH,
407	max(tcp_snd_cwnd(tp) >> 1, tp->snd_ssthresh));	407	max(tcp_snd_cwnd(tp) >> 1, tp->snd_ssthresh));
@@ -418,7 +418,7 @@ void tcp_update_metrics(struct sock *sk) · 10 unmodified lines
418	tcp_metric_set(tm, TCP_METRIC_CWND,	418	tcp_metric_set(tm, TCP_METRIC_CWND,
419	(val + tp->snd_ssthresh) >> 1);	419	(val + tp->snd_ssthresh) >> 1);
420	}	420	}
421	if (!net->ipv4.sysctl_tcp_no_ssthresh_metrics_save &&	421	if (!READ_ONCE(net->ipv4.sysctl_tcp_no_ssthresh_metrics_save) &&
422	!tcp_metric_locked(tm, TCP_METRIC_SSTHRESH)) {	422	!tcp_metric_locked(tm, TCP_METRIC_SSTHRESH)) {
423	val = tcp_metric_get(tm, TCP_METRIC_SSTHRESH);	423	val = tcp_metric_get(tm, TCP_METRIC_SSTHRESH);
424	if (val && tp->snd_ssthresh > val)	424	if (val && tp->snd_ssthresh > val)
@@ -463,7 +463,7 @@ void tcp_init_metrics(struct sock *sk) · 38 unmodified lines
463	if (tcp_metric_locked(tm, TCP_METRIC_CWND))	463	if (tcp_metric_locked(tm, TCP_METRIC_CWND))
464	tp->snd_cwnd_clamp = tcp_metric_get(tm, TCP_METRIC_CWND);	464	tp->snd_cwnd_clamp = tcp_metric_get(tm, TCP_METRIC_CWND);
465		465
466	val = net->ipv4.sysctl_tcp_no_ssthresh_metrics_save ?	466	val = READ_ONCE(net->ipv4.sysctl_tcp_no_ssthresh_metrics_save) ?
467	0 : tcp_metric_get(tm, TCP_METRIC_SSTHRESH);	467	0 : tcp_metric_get(tm, TCP_METRIC_SSTHRESH);
468	if (val) {	468	if (val) {
469	tp->snd_ssthresh = val;	469	tp->snd_ssthresh = val;