* pci/dpc: PCI/DPC: Add local struct device pointers PCI/DPC: Add eDPC support
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| @@ -961,6 +961,7 @@ · 960 unmodified lines | ||
| 961 | 961 | #define PCI_EXP_DPC_CAP_RP_EXT 0x20 /* Root Port Extensions for DPC */ |
| 962 | 962 | #define PCI_EXP_DPC_CAP_POISONED_TLP 0x40 /* Poisoned TLP Egress Blocking Supported */ |
| 963 | 963 | #define PCI_EXP_DPC_CAP_SW_TRIGGER 0x80 /* Software Triggering Supported */ |
| 964 | +#define PCI_EXP_DPC_RP_PIO_LOG_SIZE 0xF00 /* RP PIO log size */ | |
| 964 | 965 | #define PCI_EXP_DPC_CAP_DL_ACTIVE 0x1000 /* ERR_COR signal on DL_Active supported */ |
| 965 | 966 | |
| 966 | 967 | #define PCI_EXP_DPC_CTL 6 /* DPC control */ |
| @@ -974,6 +975,15 @@ · 7 unmodified lines | ||
| 974 | 975 | |
| 975 | 976 | #define PCI_EXP_DPC_SOURCE_ID 10 /* DPC Source Identifier */ |
| 976 | 977 | |
| 978 | +#define PCI_EXP_DPC_RP_PIO_STATUS 0x0C /* RP PIO Status */ | |
| 979 | +#define PCI_EXP_DPC_RP_PIO_MASK 0x10 /* RP PIO MASK */ | |
| 980 | +#define PCI_EXP_DPC_RP_PIO_SEVERITY 0x14 /* RP PIO Severity */ | |
| 981 | +#define PCI_EXP_DPC_RP_PIO_SYSERROR 0x18 /* RP PIO SysError */ | |
| 982 | +#define PCI_EXP_DPC_RP_PIO_EXCEPTION 0x1C /* RP PIO Exception */ | |
| 983 | +#define PCI_EXP_DPC_RP_PIO_HEADER_LOG 0x20 /* RP PIO Header Log */ | |
| 984 | +#define PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG 0x30 /* RP PIO ImpSpec Log */ | |
| 985 | +#define PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG 0x34 /* RP PIO TLP Prefix Log */ | |
| 986 | + | |
| 977 | 987 | /* Precision Time Measurement */ |
| 978 | 988 | #define PCI_PTM_CAP 0x04 /* PTM Capability */ |
| 979 | 989 | #define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */ |