Pull clk fix from Stephen Boyd: "One build fix for 32-bit arches using the Qualcomm PLL driver. It's cheaper to use a comparison here instead of a division so we just do that to fix the build" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val()
Unified · Split
| @@ -2124,10 +2124,8 @@ static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32 · 2123 unmodified lines | ||
| 2124 | 2124 | |
| 2125 | 2125 | quotient = rate; |
| 2126 | 2126 | remainder = do_div(quotient, prate); |
| 2127 | − *l = quotient; | |
| 2128 | 2127 | |
| 2129 | − if ((remainder * 2) / prate) | |
| 2130 | − *l = *l + 1; | |
| 2128 | + *l = rate + (u32)(remainder * 2 >= prate); | |
| 2131 | 2129 | } |
| 2132 | 2130 | |
| 2133 | 2131 | static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate, |