Pull x86 fixes from Ingo Molnar: "Fixes from all around the place: - hyper-V 32-bit PAE guest kernel fix - two IRQ allocation fixes on certain x86 boards - intel-mid boot crash fix - intel-quark quirk - /proc/interrupts duplicate irq chip name fix - cma boot crash fix - syscall audit fix - boot crash fix with certain TSC configurations (seen on Qemu) - smpboot.c build warning fix" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, pageattr: Prevent overflow in slow_virt_to_phys() for X86_PAE ACPI, irq, x86: Return IRQ instead of GSI in mp_register_gsi() x86, intel-mid: Create IRQs for APB timers and RTC timers x86: Don't enable F00F workaround on Intel Quark processors x86/irq: Fix XT-PIC-XT-PIC in /proc/interrupts x86, cma: Reserve DMA contiguous area after initmem_init() i386/audit: stop scribbling on the stack frame x86, apic: Handle a bad TSC more gracefully x86: ACPI: Do not translate GSI number if IOAPIC is disabled x86/smpboot: Move data structure to its primary usage scope
Unified · Split
| @@ -397,7 +397,7 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, · 396 unmodified lines | |||
| 397 | 397 | ||
| 398 | /* Don't set up the ACPI SCI because it's already set up */ | 398 | /* Don't set up the ACPI SCI because it's already set up */ |
| 399 | if (acpi_gbl_FADT.sci_interrupt == gsi) | 399 | if (acpi_gbl_FADT.sci_interrupt == gsi) |
| 400 | return gsi; | 400 | return mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC); |
| 401 | 401 | ||
| 402 | trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1; | 402 | trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1; |
| 403 | polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1; | 403 | polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1; |
| @@ -604,14 +604,18 @@ void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) · 200 unmodified lines | |||
| 604 | 604 | ||
| 605 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) | 605 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) |
| 606 | { | 606 | { |
| 607 | int irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK); | 607 | int irq; |
| 608 | 608 | ||
| 609 | if (irq >= 0) { | 609 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { |
| 610 | *irqp = gsi; | ||
| 611 | } else { | ||
| 612 | irq = mp_map_gsi_to_irq(gsi, | ||
| 613 | IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK); | ||
| 614 | if (irq < 0) | ||
| 615 | return -1; | ||
| 610 | *irqp = irq; | 616 | *irqp = irq; |
| 611 | return 0; | ||
| 612 | } | 617 | } |
| 613 | 618 | return 0; | |
| 614 | return -1; | ||
| 615 | } | 619 | } |
| 616 | EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); | 620 | EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); |
| 617 | 621 | ||
| @@ -185,8 +185,6 @@ static void apbt_setup_irq(struct apbt_dev *adev) · 184 unmodified lines | |||
| 185 | 185 | ||
| 186 | irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT); | 186 | irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT); |
| 187 | irq_set_affinity(adev->irq, cpumask_of(adev->cpu)); | 187 | irq_set_affinity(adev->irq, cpumask_of(adev->cpu)); |
| 188 | /* APB timer irqs are set up as mp_irqs, timer is edge type */ | ||
| 189 | __irq_set_handler(adev->irq, handle_edge_irq, 0, "edge"); | ||
| 190 | } | 188 | } |
| 191 | 189 | ||
| 192 | /* Should be called with per cpu */ | 190 | /* Should be called with per cpu */ |
| @@ -1297,7 +1297,7 @@ void setup_local_APIC(void) · 1296 unmodified lines | |||
| 1297 | unsigned int value, queued; | 1297 | unsigned int value, queued; |
| 1298 | int i, j, acked = 0; | 1298 | int i, j, acked = 0; |
| 1299 | unsigned long long tsc = 0, ntsc; | 1299 | unsigned long long tsc = 0, ntsc; |
| 1300 | long long max_loops = cpu_khz; | 1300 | long long max_loops = cpu_khz ? cpu_khz : 1000000; |
| 1301 | 1301 | ||
| 1302 | if (cpu_has_tsc) | 1302 | if (cpu_has_tsc) |
| 1303 | rdtscll(tsc); | 1303 | rdtscll(tsc); |
| @@ -1383,7 +1383,7 @@ void setup_local_APIC(void) · 79 unmodified lines | |||
| 1383 | break; | 1383 | break; |
| 1384 | } | 1384 | } |
| 1385 | if (queued) { | 1385 | if (queued) { |
| 1386 | if (cpu_has_tsc) { | 1386 | if (cpu_has_tsc && cpu_khz) { |
| 1387 | rdtscll(ntsc); | 1387 | rdtscll(ntsc); |
| 1388 | max_loops = (cpu_khz << 10) - (ntsc - tsc); | 1388 | max_loops = (cpu_khz << 10) - (ntsc - tsc); |
| 1389 | } else | 1389 | } else |
| @@ -213,12 +213,13 @@ static void intel_workarounds(struct cpuinfo_x86 *c) · 212 unmodified lines | |||
| 213 | { | 213 | { |
| 214 | #ifdef CONFIG_X86_F00F_BUG | 214 | #ifdef CONFIG_X86_F00F_BUG |
| 215 | /* | 215 | /* |
| 216 | * All current models of Pentium and Pentium with MMX technology CPUs | 216 | * All models of Pentium and Pentium with MMX technology CPUs |
| 217 | * have the F0 0F bug, which lets nonprivileged users lock up the | 217 | * have the F0 0F bug, which lets nonprivileged users lock up the |
| 218 | * system. Announce that the fault handler will be checking for it. | 218 | * system. Announce that the fault handler will be checking for it. |
| 219 | * The Quark is also family 5, but does not have the same bug. | ||
| 219 | */ | 220 | */ |
| 220 | clear_cpu_bug(c, X86_BUG_F00F); | 221 | clear_cpu_bug(c, X86_BUG_F00F); |
| 221 | if (!paravirt_enabled() && c->x86 == 5) { | 222 | if (!paravirt_enabled() && c->x86 == 5 && c->x86_model < 9) { |
| 222 | static int f00f_workaround_enabled; | 223 | static int f00f_workaround_enabled; |
| 223 | 224 | ||
| 224 | set_cpu_bug(c, X86_BUG_F00F); | 225 | set_cpu_bug(c, X86_BUG_F00F); |
| @@ -447,15 +447,14 @@ sysenter_exit: · 446 unmodified lines | |||
| 447 | sysenter_audit: | 447 | sysenter_audit: |
| 448 | testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%ebp) | 448 | testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%ebp) |
| 449 | jnz syscall_trace_entry | 449 | jnz syscall_trace_entry |
| 450 | addl $4,%esp | 450 | /* movl PT_EAX(%esp), %eax already set, syscall number: 1st arg to audit */ |
| 451 | CFI_ADJUST_CFA_OFFSET -4 | 451 | movl PT_EBX(%esp), %edx /* ebx/a0: 2nd arg to audit */ |
| 452 | movl %esi,4(%esp) /* 5th arg: 4th syscall arg */ | 452 | /* movl PT_ECX(%esp), %ecx already set, a1: 3nd arg to audit */ |
| 453 | movl %edx,(%esp) /* 4th arg: 3rd syscall arg */ | 453 | pushl_cfi PT_ESI(%esp) /* a3: 5th arg */ |
| 454 | /* %ecx already in %ecx 3rd arg: 2nd syscall arg */ | 454 | pushl_cfi PT_EDX+4(%esp) /* a2: 4th arg */ |
| 455 | movl %ebx,%edx /* 2nd arg: 1st syscall arg */ | ||
| 456 | /* %eax already in %eax 1st arg: syscall number */ | ||
| 457 | call __audit_syscall_entry | 455 | call __audit_syscall_entry |
| 458 | pushl_cfi %ebx | 456 | popl_cfi %ecx /* get that remapped edx off the stack */ |
| 457 | popl_cfi %ecx /* get that remapped esi off the stack */ | ||
| 459 | movl PT_EAX(%esp),%eax /* reload syscall number */ | 458 | movl PT_EAX(%esp),%eax /* reload syscall number */ |
| 460 | jmp sysenter_do_call | 459 | jmp sysenter_do_call |
| 461 | 460 | ||
| @@ -111,8 +111,7 @@ static void make_8259A_irq(unsigned int irq) · 110 unmodified lines | |||
| 111 | { | 111 | { |
| 112 | disable_irq_nosync(irq); | 112 | disable_irq_nosync(irq); |
| 113 | io_apic_irqs &= ~(1<<irq); | 113 | io_apic_irqs &= ~(1<<irq); |
| 114 | irq_set_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq, | 114 | irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq); |
| 115 | i8259A_chip.name); | ||
| 116 | enable_irq(irq); | 115 | enable_irq(irq); |
| 117 | } | 116 | } |
| 118 | 117 | ||
| @@ -70,7 +70,6 @@ int vector_used_by_percpu_irq(unsigned int vector) · 69 unmodified lines | |||
| 70 | void __init init_ISA_irqs(void) | 70 | void __init init_ISA_irqs(void) |
| 71 | { | 71 | { |
| 72 | struct irq_chip *chip = legacy_pic->chip; | 72 | struct irq_chip *chip = legacy_pic->chip; |
| 73 | const char *name = chip->name; | ||
| 74 | int i; | 73 | int i; |
| 75 | 74 | ||
| 76 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) | 75 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) |
| @@ -79,7 +78,7 @@ void __init init_ISA_irqs(void) · 2 unmodified lines | |||
| 79 | legacy_pic->init(0); | 78 | legacy_pic->init(0); |
| 80 | 79 | ||
| 81 | for (i = 0; i < nr_legacy_irqs(); i++) | 80 | for (i = 0; i < nr_legacy_irqs(); i++) |
| 82 | irq_set_chip_and_handler_name(i, chip, handle_level_irq, name); | 81 | irq_set_chip_and_handler(i, chip, handle_level_irq); |
| 83 | } | 82 | } |
| 84 | 83 | ||
| 85 | void __init init_IRQ(void) | 84 | void __init init_IRQ(void) |
| @@ -1128,7 +1128,6 @@ void __init setup_arch(char **cmdline_p) · 1127 unmodified lines | |||
| 1128 | setup_real_mode(); | 1128 | setup_real_mode(); |
| 1129 | 1129 | ||
| 1130 | memblock_set_current_limit(get_max_mapped()); | 1130 | memblock_set_current_limit(get_max_mapped()); |
| 1131 | dma_contiguous_reserve(max_pfn_mapped << PAGE_SHIFT); | ||
| 1132 | 1131 | ||
| 1133 | /* | 1132 | /* |
| 1134 | * NOTE: On x86-32, only from this point on, fixmaps are ready for use. | 1133 | * NOTE: On x86-32, only from this point on, fixmaps are ready for use. |
| @@ -1159,6 +1158,7 @@ void __init setup_arch(char **cmdline_p) · 24 unmodified lines | |||
| 1159 | early_acpi_boot_init(); | 1158 | early_acpi_boot_init(); |
| 1160 | 1159 | ||
| 1161 | initmem_init(); | 1160 | initmem_init(); |
| 1161 | dma_contiguous_reserve(max_pfn_mapped << PAGE_SHIFT); | ||
| 1162 | 1162 | ||
| 1163 | /* | 1163 | /* |
| 1164 | * Reserve memory for crash kernel after SRAT is parsed so that it | 1164 | * Reserve memory for crash kernel after SRAT is parsed so that it |
| @@ -102,8 +102,6 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); · 101 unmodified lines | |||
| 102 | DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); | 102 | DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); |
| 103 | EXPORT_PER_CPU_SYMBOL(cpu_info); | 103 | EXPORT_PER_CPU_SYMBOL(cpu_info); |
| 104 | 104 | ||
| 105 | static DEFINE_PER_CPU(struct completion, die_complete); | ||
| 106 | |||
| 107 | atomic_t init_deasserted; | 105 | atomic_t init_deasserted; |
| 108 | 106 | ||
| 109 | /* | 107 | /* |
| @@ -1318,6 +1316,8 @@ void cpu_disable_common(void) · 1208 unmodified lines | |||
| 1318 | fixup_irqs(); | 1316 | fixup_irqs(); |
| 1319 | } | 1317 | } |
| 1320 | 1318 | ||
| 1319 | static DEFINE_PER_CPU(struct completion, die_complete); | ||
| 1320 | |||
| 1321 | int native_cpu_disable(void) | 1321 | int native_cpu_disable(void) |
| 1322 | { | 1322 | { |
| 1323 | int ret; | 1323 | int ret; |
| @@ -1166,14 +1166,17 @@ void __init tsc_init(void) · 1165 unmodified lines | |||
| 1166 | 1166 | ||
| 1167 | x86_init.timers.tsc_pre_init(); | 1167 | x86_init.timers.tsc_pre_init(); |
| 1168 | 1168 | ||
| 1169 | if (!cpu_has_tsc) | 1169 | if (!cpu_has_tsc) { |
| 1170 | setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); | ||
| 1170 | return; | 1171 | return; |
| 1172 | } | ||
| 1171 | 1173 | ||
| 1172 | tsc_khz = x86_platform.calibrate_tsc(); | 1174 | tsc_khz = x86_platform.calibrate_tsc(); |
| 1173 | cpu_khz = tsc_khz; | 1175 | cpu_khz = tsc_khz; |
| 1174 | 1176 | ||
| 1175 | if (!tsc_khz) { | 1177 | if (!tsc_khz) { |
| 1176 | mark_tsc_unstable("could not calculate TSC khz"); | 1178 | mark_tsc_unstable("could not calculate TSC khz"); |
| 1179 | setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); | ||
| 1177 | return; | 1180 | return; |
| 1178 | } | 1181 | } |
| 1179 | 1182 | ||
| @@ -409,7 +409,7 @@ phys_addr_t slow_virt_to_phys(void *__virt_addr) · 408 unmodified lines | |||
| 409 | psize = page_level_size(level); | 409 | psize = page_level_size(level); |
| 410 | pmask = page_level_mask(level); | 410 | pmask = page_level_mask(level); |
| 411 | offset = virt_addr & ~pmask; | 411 | offset = virt_addr & ~pmask; |
| 412 | phys_addr = pte_pfn(*pte) << PAGE_SHIFT; | 412 | phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT; |
| 413 | return (phys_addr | offset); | 413 | return (phys_addr | offset); |
| 414 | } | 414 | } |
| 415 | EXPORT_SYMBOL_GPL(slow_virt_to_phys); | 415 | EXPORT_SYMBOL_GPL(slow_virt_to_phys); |
| @@ -106,6 +106,7 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table) · 105 unmodified lines | |||
| 106 | mp_irq.dstapic = MP_APIC_ALL; | 106 | mp_irq.dstapic = MP_APIC_ALL; |
| 107 | mp_irq.dstirq = pentry->irq; | 107 | mp_irq.dstirq = pentry->irq; |
| 108 | mp_save_irq(&mp_irq); | 108 | mp_save_irq(&mp_irq); |
| 109 | mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC); | ||
| 109 | } | 110 | } |
| 110 | 111 | ||
| 111 | return 0; | 112 | return 0; |
| @@ -176,6 +177,7 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table) · 64 unmodified lines | |||
| 176 | mp_irq.dstapic = MP_APIC_ALL; | 177 | mp_irq.dstapic = MP_APIC_ALL; |
| 177 | mp_irq.dstirq = pentry->irq; | 178 | mp_irq.dstirq = pentry->irq; |
| 178 | mp_save_irq(&mp_irq); | 179 | mp_save_irq(&mp_irq); |
| 180 | mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC); | ||
| 179 | } | 181 | } |
| 180 | return 0; | 182 | return 0; |
| 181 | } | 183 | } |