this will simplify the switch to the DT and later to the platform_device
Unified · Split
| @@ -298,7 +298,7 @@ void __init at91cap9_set_console_clock(int id) · 297 unmodified lines | ||
| 298 | 298 | * GPIO |
| 299 | 299 | * -------------------------------------------------------------------- */ |
| 300 | 300 | |
| 301 | −static struct at91_gpio_bank at91cap9_gpio[] = { | |
| 301 | +static struct at91_gpio_bank at91cap9_gpio[] __initdata = { | |
| 302 | 302 | { |
| 303 | 303 | .id = AT91CAP9_ID_PIOABCD, |
| 304 | 304 | .regbase = AT91CAP9_BASE_PIOA, |
| @@ -273,7 +273,7 @@ void __init at91rm9200_set_console_clock(int id) · 272 unmodified lines | ||
| 273 | 273 | * GPIO |
| 274 | 274 | * -------------------------------------------------------------------- */ |
| 275 | 275 | |
| 276 | −static struct at91_gpio_bank at91rm9200_gpio[] = { | |
| 276 | +static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { | |
| 277 | 277 | { |
| 278 | 278 | .id = AT91RM9200_ID_PIOA, |
| 279 | 279 | .regbase = AT91RM9200_BASE_PIOA, |
| @@ -274,7 +274,7 @@ void __init at91sam9260_set_console_clock(int id) · 273 unmodified lines | ||
| 274 | 274 | * GPIO |
| 275 | 275 | * -------------------------------------------------------------------- */ |
| 276 | 276 | |
| 277 | −static struct at91_gpio_bank at91sam9260_gpio[] = { | |
| 277 | +static struct at91_gpio_bank at91sam9260_gpio[] __initdata = { | |
| 278 | 278 | { |
| 279 | 279 | .id = AT91SAM9260_ID_PIOA, |
| 280 | 280 | .regbase = AT91SAM9260_BASE_PIOA, |
| @@ -253,7 +253,7 @@ void __init at91sam9261_set_console_clock(int id) · 252 unmodified lines | ||
| 253 | 253 | * GPIO |
| 254 | 254 | * -------------------------------------------------------------------- */ |
| 255 | 255 | |
| 256 | −static struct at91_gpio_bank at91sam9261_gpio[] = { | |
| 256 | +static struct at91_gpio_bank at91sam9261_gpio[] __initdata = { | |
| 257 | 257 | { |
| 258 | 258 | .id = AT91SAM9261_ID_PIOA, |
| 259 | 259 | .regbase = AT91SAM9261_BASE_PIOA, |
| @@ -269,7 +269,7 @@ void __init at91sam9263_set_console_clock(int id) · 268 unmodified lines | ||
| 269 | 269 | * GPIO |
| 270 | 270 | * -------------------------------------------------------------------- */ |
| 271 | 271 | |
| 272 | −static struct at91_gpio_bank at91sam9263_gpio[] = { | |
| 272 | +static struct at91_gpio_bank at91sam9263_gpio[] __initdata = { | |
| 273 | 273 | { |
| 274 | 274 | .id = AT91SAM9263_ID_PIOA, |
| 275 | 275 | .regbase = AT91SAM9263_BASE_PIOA, |
| @@ -299,7 +299,7 @@ void __init at91sam9g45_set_console_clock(int id) · 298 unmodified lines | ||
| 299 | 299 | * GPIO |
| 300 | 300 | * -------------------------------------------------------------------- */ |
| 301 | 301 | |
| 302 | −static struct at91_gpio_bank at91sam9g45_gpio[] = { | |
| 302 | +static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { | |
| 303 | 303 | { |
| 304 | 304 | .id = AT91SAM9G45_ID_PIOA, |
| 305 | 305 | .regbase = AT91SAM9G45_BASE_PIOA, |
| @@ -246,7 +246,7 @@ void __init at91sam9rl_set_console_clock(int id) · 245 unmodified lines | ||
| 246 | 246 | * GPIO |
| 247 | 247 | * -------------------------------------------------------------------- */ |
| 248 | 248 | |
| 249 | −static struct at91_gpio_bank at91sam9rl_gpio[] = { | |
| 249 | +static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = { | |
| 250 | 250 | { |
| 251 | 251 | .id = AT91SAM9RL_ID_PIOA, |
| 252 | 252 | .regbase = AT91SAM9RL_BASE_PIOA, |
| @@ -29,7 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | struct at91_gpio_chip { |
| 30 | 30 | struct gpio_chip chip; |
| 31 | 31 | struct at91_gpio_chip *next; /* Bank sharing same clock */ |
| 32 | − struct at91_gpio_bank *bank; /* Bank definition */ | |
| 32 | + int id; /* ID of register bank */ | |
| 33 | 33 | void __iomem *regbase; /* Base of register bank */ |
| 34 | 34 | struct clk *clock; /* associated clock */ |
| 35 | 35 | }; |
| @@ -286,7 +286,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state) · 250 unmodified lines | ||
| 286 | 286 | else |
| 287 | 287 | wakeups[bank] &= ~mask; |
| 288 | 288 | |
| 289 | − irq_set_irq_wake(gpio_chip[bank].bank->id, state); | |
| 289 | + irq_set_irq_wake(gpio_chip[bank].id, state); | |
| 290 | 290 | |
| 291 | 291 | return 0; |
| 292 | 292 | } |
| @@ -498,7 +498,7 @@ void __init at91_gpio_irq_setup(void) · 205 unmodified lines | ||
| 498 | 498 | for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; |
| 499 | 499 | pioc++ < gpio_banks; |
| 500 | 500 | prev = this, this++) { |
| 501 | − unsigned id = this->bank->id; | |
| 501 | + unsigned id = this->id; | |
| 502 | 502 | unsigned i; |
| 503 | 503 | |
| 504 | 504 | __raw_writel(~0, this->regbase + PIO_IDR); |
| @@ -613,10 +613,10 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) · 108 unmodified lines | ||
| 613 | 613 | for (i = 0; i < nr_banks; i++) { |
| 614 | 614 | at91_gpio = &gpio_chip[i]; |
| 615 | 615 | |
| 616 | − at91_gpio->bank = &data[i]; | |
| 616 | + at91_gpio->id = data[i].id; | |
| 617 | 617 | at91_gpio->chip.base = PIN_BASE + i * 32; |
| 618 | 618 | |
| 619 | − at91_gpio->regbase = ioremap(at91_gpio->bank->regbase, 512); | |
| 619 | + at91_gpio->regbase = ioremap(data[i].regbase, 512); | |
| 620 | 620 | if (!at91_gpio->regbase) { |
| 621 | 621 | pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i); |
| 622 | 622 | continue; |
| @@ -632,7 +632,7 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) · 9 unmodified lines | ||
| 632 | 632 | clk_enable(at91_gpio->clock); |
| 633 | 633 | |
| 634 | 634 | /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ |
| 635 | − if (last && last->bank->id == at91_gpio->bank->id) | |
| 635 | + if (last && last->id == at91_gpio->id) | |
| 636 | 636 | last->next = at91_gpio; |
| 637 | 637 | last = at91_gpio; |
| 638 | 638 | |