History

Merge tag 'gpio-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for kernel v4.6. There is quite a lot of interesting stuff going on. The patches to other subsystems and arch-wide are ACKed as far as possible, though I consider things like per-arch <asm/gpio.h> as essentially a part of the GPIO subsystem so it should not be needed. Core changes: - The gpio_chip is now a *real device*. Until now the gpio chips were just piggybacking the parent device or (gasp) floating in space outside of the device model. We now finally make GPIO chips devices. The gpio_chip will create a gpio_device which contains a struct device, and this gpio_device struct is kept private. Anything that needs to be kept private from the rest of the kernel will gradually be moved over to the gpio_device. - As a result of making the gpio_device a real device, we have added resource management, so devm_gpiochip_add_data() will cut down on overhead and reduce code lines. A huge slew of patches convert almost all drivers in the subsystem to use this. - Building on making the GPIO a real device, we add the first step of a new userspace ABI: the GPIO character device. We take small steps here, so we first add a pure *information* ABI and the tool "lsgpio" that will list all GPIO devices on the system and all lines on these devices. We can now discover GPIOs properly from userspace. We still have not come up with a way to actually *use* GPIOs from userspace. - To encourage people to use the character device for the future, we have it always-enabled when using GPIO. The old sysfs ABI is still opt-in (and can be used in parallel), but is marked as deprecated. We will keep it around for the foreseeable future, but it will not be extended to cover ever more use cases. Cleanup: - Bjorn Helgaas removed a whole slew of per-architecture <asm/gpio.h> includes. This dates back to when GPIO was an opt-in feature and no shared library even existed: just a header file with proper prototypes was provided and all semantics were up to the arch to implement. These patches make the GPIO chip even more a proper device and cleans out leftovers of the old in-kernel API here and there. Still some cruft is left but it's very little now. - There is still some clamping of return values for .get() going on, but we now return sane values in the vast majority of drivers and the errorpath is sanitized. Some patches for powerpc, blackfin and unicore still drop in. - We continue to switch the ARM, MIPS, blackfin, m68k local GPIO implementations to use gpiochip_add_data() and cut down on code lines. - MPC8xxx is converted to use the generic GPIO helpers. - ATH79 is converted to use the generic GPIO helpers. New drivers: - WinSystems WS16C48 - Acces 104-DIO-48E - F81866 (a F7188x variant) - Qoric (a MPC8xxx variant) - TS-4800 - SPI serializers (pisosr): simple 74xx shift registers connected to SPI to obtain a dirt-cheap output-only GPIO expander. - Texas Instruments TPIC2810 - Texas Instruments TPS65218 - Texas Instruments TPS65912 - X-Gene (ARM64) standby GPIO controller" * tag 'gpio-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (194 commits) Revert "Share upstreaming patches" gpio: mcp23s08: Fix clearing of interrupt. gpiolib: Fix comment referring to gpio_*() in gpiod_*() gpio: pca953x: Fix pca953x_gpio_set_multiple() on 64-bit gpio: xgene: Fix kconfig for standby GIPO contoller gpio: Add generic serializer DT binding gpio: uapi: use 0xB4 as ioctl() major gpio: tps65912: fix bad merge Revert "gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free" gpio: omap: drop dev field from gpio_bank structure gpio: mpc8xxx: Slightly update the code for better readability gpio: mpc8xxx: Remove *read_reg and *write_reg from struct mpc8xxx_gpio_chip gpio: mpc8xxx: Fixup setting gpio direction output gpio: mcp23s08: Add support for mcp23s18 dt-bindings: gpio: altera: Fix altr,interrupt-type property gpio: add driver for MEN 16Z127 GPIO controller gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free gpio: timberdale: Switch to devm_ioremap_resource() gpio: ts4800: Add IMX51 dependency gpiolib: rewrite gpiodev_add_to_list ...

Linus Torvalds committed 10 years ago

Commit 1a467122 parents 82b666e ccbd805169 files · +4405 −2663Browse files

Unified · Split

169 files
  1. Documentation/ABI/obsolete/sysfs-gpio +3 −1
  2. Documentation/ABI/testing/gpio-cdev +26 −0
  3. Documentation/devicetree/bindings/gpio/gpio-altera.txt +2 −2
  4. Documentation/devicetree/bindings/gpio/gpio-mcp23s08.txt +1 −3
  5. Documentation/devicetree/bindings/gpio/gpio-pisosr.txt +34 −0
  6. Documentation/devicetree/bindings/gpio/gpio-ts4800.txt +20 −0
  7. Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt +40 −7
  8. Documentation/devicetree/bindings/mfd/tps65912.txt +50 −0
  9. Documentation/driver-model/devres.txt +5 −0
  10. Documentation/gpio/board.txt +5 −6
  11. Documentation/ioctl/ioctl-number.txt +1 −0
  12. MAINTAINERS +16 −0
  13. arch/alpha/include/asm/gpio.h +0 −4
  14. arch/arm/common/scoop.c +5 −5
  15. arch/arm/mach-gemini/gpio.c +2 −2
  16. arch/arm/mach-imx/mach-mx27ads.c +3 −1
  17. arch/arm/mach-ixp4xx/common.c +2 −2
  18. arch/arm/mach-s3c24xx/mach-h1940.c +1 −1
  19. arch/arm/mach-sa1100/simpad.c +2 −2
  20. arch/arm/mach-w90x900/gpio.c +6 −7
  21. arch/arm/plat-orion/gpio.c +9 −15
  22. arch/avr32/boards/merisc/setup.c +0 −1
  23. arch/avr32/mach-at32ap/pio.c +1 −1
  24. arch/blackfin/kernel/bfin_gpio.c +4 −2
  25. arch/blackfin/kernel/debug-mmrs.c +1 −1
  26. arch/blackfin/mach-bf538/boards/ezkit.c +1 −1
  27. arch/blackfin/mach-bf538/ext-gpio.c +4 −4
  28. arch/blackfin/mach-bf548/boards/cm_bf548.c +1 −1
  29. arch/blackfin/mach-bf548/boards/ezkit.c +1 −1
  30. arch/blackfin/mach-bf609/boards/ezkit.c +1 −1
  31. arch/blackfin/mach-common/ints-priority.c +1 −1
  32. arch/blackfin/mach-common/pm.c +1 −1
  33. arch/ia64/include/asm/gpio.h +0 −4
  34. arch/m68k/coldfire/gpio.c +1 −1
  35. arch/metag/include/asm/gpio.h +0 −4
  36. arch/microblaze/include/asm/gpio.h +0 −4
  37. arch/mips/alchemy/common/gpiolib.c +4 −4
  38. arch/mips/ar7/gpio.c +9 −17
  39. arch/mips/bcm63xx/gpio.c +2 −2
  40. arch/mips/jz4740/gpio.c +6 −4
  41. arch/mips/kernel/gpio_txx9.c +2 −2
  42. arch/mips/rb532/gpio.c +6 −6
  43. arch/mips/txx9/generic/setup.c +4 −6
  44. arch/mips/txx9/rbtx4938/setup.c +2 −1
  45. arch/openrisc/include/asm/gpio.h +0 −4
  46. arch/powerpc/include/asm/gpio.h +0 −4
  47. arch/powerpc/sysdev/ppc4xx_gpio.c +1 −1
  48. arch/powerpc/sysdev/simple_gpio.c +1 −1
  49. arch/sh/include/mach-common/mach/magicpanelr2.h +1 −1
  50. arch/sparc/include/asm/gpio.h +0 −4
  51. arch/unicore32/kernel/gpio.c +1 −1
  52. arch/x86/include/asm/gpio.h +0 −4
  53. arch/xtensa/include/asm/gpio.h +0 −4
  54. drivers/ata/pata_at91.c +1 −2
  55. drivers/ata/pata_bf54x.c +1 −1
  56. drivers/gpio/Kconfig +76 −9
  57. drivers/gpio/Makefile +8 −1
  58. drivers/gpio/devres.c +1 −1
  59. drivers/gpio/gpio-104-dio-48e.c +430 −0
  60. drivers/gpio/gpio-104-idi-48.c +11 −19
  61. drivers/gpio/gpio-104-idio-16.c +9 −18
  62. drivers/gpio/gpio-74xx-mmio.c +1 −10
  63. drivers/gpio/gpio-adnp.c +1 −10
  64. drivers/gpio/gpio-adp5520.c +1 −12
  65. drivers/gpio/gpio-adp5588.c +1 −3
  66. drivers/gpio/gpio-amd8111.c +3 −4
  67. drivers/gpio/gpio-arizona.c +2 −10
  68. drivers/gpio/gpio-ath79.c +192 −72
  69. drivers/gpio/gpio-bcm-kona.c +1 −1
  70. drivers/gpio/gpio-brcmstb.c +4 −9
  71. drivers/gpio/gpio-clps711x.c +1 −10
  72. drivers/gpio/gpio-crystalcove.c +2 −7
  73. drivers/gpio/gpio-cs5535.c +5 −15
  74. drivers/gpio/gpio-da9052.c +1 −10
  75. drivers/gpio/gpio-da9055.c +2 −14
  76. drivers/gpio/gpio-davinci.c +3 −2
  77. drivers/gpio/gpio-dln2.c +4 −12
  78. drivers/gpio/gpio-ep93xx.c +1 −1
  79. drivers/gpio/gpio-f7188x.c +26 −27
  80. drivers/gpio/gpio-ge.c +1 −1
  81. drivers/gpio/gpio-generic.c +1 −10
  82. drivers/gpio/gpio-ich.c +9 −42
  83. drivers/gpio/gpio-iop.c +1 −1
  84. drivers/gpio/gpio-janz-ttl.c +1 −11
  85. drivers/gpio/gpio-kempld.c +1 −10
  86. drivers/gpio/gpio-ks8695.c +0 −12
  87. drivers/gpio/gpio-lp3943.c +2 −10
  88. drivers/gpio/gpio-lpc32xx.c +1 −1
  89. drivers/gpio/gpio-lynxpoint.c +1 −3
  90. drivers/gpio/gpio-mc9s08dz60.c +1 −12
  91. drivers/gpio/gpio-mcp23s08.c +21 −4
  92. drivers/gpio/gpio-menz127.c +200 −0
  93. drivers/gpio/gpio-moxart.c +1 −4
  94. drivers/gpio/gpio-mpc5200.c +0 −1
  95. drivers/gpio/gpio-mpc8xxx.c +96 −159
  96. drivers/gpio/gpio-mvebu.c +3 −8
  97. drivers/gpio/gpio-mxc.c +2 −4
  98. drivers/gpio/gpio-octeon.c +1 −9
  99. drivers/gpio/gpio-omap.c +29 −28
  100. drivers/gpio/gpio-palmas.c +2 −10
  101. drivers/gpio/gpio-pca953x.c +5 −5
  102. drivers/gpio/gpio-pcf857x.c +3 −7
  103. drivers/gpio/gpio-pisosr.c +183 −0
  104. drivers/gpio/gpio-rc5t583.c +2 −10
  105. drivers/gpio/gpio-rdc321x.c +2 −11
  106. drivers/gpio/gpio-sch.c +1 −10
  107. drivers/gpio/gpio-sch311x.c +3 −5
  108. drivers/gpio/gpio-spear-spics.c +1 −1
  109. drivers/gpio/gpio-sta2x11.c +1 −1
  110. drivers/gpio/gpio-stp-xway.c +1 −1
  111. drivers/gpio/gpio-sx150x.c +2 −16
  112. drivers/gpio/gpio-syscon.c +1 −10
  113. drivers/gpio/gpio-tb10x.c +6 −16
  114. drivers/gpio/gpio-tc3589x.c +2 −11
  115. drivers/gpio/gpio-tegra.c +1 −1
  116. drivers/gpio/gpio-timberdale.c +5 −20
  117. drivers/gpio/gpio-tpic2810.c +170 −0
  118. drivers/gpio/gpio-tps65218.c +222 −0
  119. drivers/gpio/gpio-tps6586x.c +2 −10
  120. drivers/gpio/gpio-tps65910.c +2 −10
  121. drivers/gpio/gpio-tps65912.c +86 −88
  122. drivers/gpio/gpio-ts4800.c +81 −0
  123. drivers/gpio/gpio-ts5500.c +3 −6
  124. drivers/gpio/gpio-twl6040.c +1 −8
  125. drivers/gpio/gpio-ucb1400.c +1 −2
  126. drivers/gpio/gpio-viperboard.c +4 −20
  127. drivers/gpio/gpio-vx855.c +1 −11
  128. drivers/gpio/gpio-wm831x.c +2 −10
  129. drivers/gpio/gpio-wm8350.c +2 −10
  130. drivers/gpio/gpio-wm8994.c +3 −14
  131. drivers/gpio/gpio-ws16c48.c +427 −0
  132. drivers/gpio/gpio-xgene-sb.c +233 −33
  133. drivers/gpio/gpio-xgene.c +1 −10
  134. drivers/gpio/gpiolib-acpi.c +9 −9
  135. drivers/gpio/gpiolib-sysfs.c +32 −19
  136. drivers/gpio/gpiolib.c +605 −217
  137. drivers/gpio/gpiolib.h +66 −13
  138. drivers/mfd/Kconfig +9 −11
  139. drivers/mfd/Makefile +1 −2
  140. drivers/mfd/menelaus.c +1 −1
  141. drivers/mfd/tps65912-core.c +88 −152
  142. drivers/mfd/tps65912-i2c.c +51 −111
  143. drivers/mfd/tps65912-irq.c +0 −217
  144. drivers/mfd/tps65912-spi.c +49 −111
  145. drivers/mtd/onenand/omap2.c +1 −1
  146. drivers/pcmcia/bfin_cf_pcmcia.c +1 −1
  147. drivers/pcmcia/pxa2xx_vpac270.c +0 −1
  148. drivers/pinctrl/bcm/pinctrl-iproc-gpio.c +14 −19
  149. drivers/pinctrl/sirf/pinctrl-atlas7.c +0 −18
  150. drivers/pinctrl/sunxi/pinctrl-sunxi.c +2 −2
  151. drivers/regulator/Kconfig +1 −1
  152. drivers/regulator/tps65912-regulator.c +120 −493
  153. drivers/soc/fsl/qe/gpio.c +1 −1
  154. drivers/usb/gadget/udc/atmel_usba_udc.c +0 −2
  155. drivers/usb/host/ohci-at91.c +0 −2
  156. drivers/video/fbdev/atmel_lcdfb.c +0 −2
  157. drivers/video/fbdev/omap/lcd_h3.c +1 −1
  158. drivers/video/fbdev/omap/lcd_osk.c +1 −2
  159. drivers/video/fbdev/omap/lcd_palmtt.c +1 −1
  160. include/asm-generic/gpio.h +4 −0
  161. include/linux/gpio/driver.h +16 −23
  162. include/linux/mfd/tps65912.h +111 −98
  163. include/uapi/linux/Kbuild +1 −0
  164. include/uapi/linux/gpio.h +58 −0
  165. tools/Makefile +5 −3
  166. tools/gpio/Makefile +12 −0
  167. tools/gpio/gpio-utils.c +11 −0
  168. tools/gpio/gpio-utils.h +27 −0
  169. tools/gpio/lsgpio.c +195 −0
Documentation/ABI/obsolete/sysfs-gpiorenamed from Documentation/ABI/testing/sysfs-gpio+3−1
@@ -1,7 +1,7 @@
11 What: /sys/class/gpio/
22 Date: July 2008
33 KernelVersion: 2.6.27
4−Contact: David Brownell <dbrownell@users.sourceforge.net>
4+Contact: Linus Walleij <linusw@kernel.org>
55 Description:
66
77 As a Kconfig option, individual GPIO signals may be accessed from
@@ -26,3 +26,5 @@ Description: · 18 unmodified lines
2626 /label ... (r/o) descriptive, not necessarily unique
2727 /ngpio ... (r/o) number of GPIOs; numbered N to N + (ngpio - 1)
2828
29+ This ABI is deprecated and will be removed after 2020. It is
30+ replaced with the GPIO character device.
Documentation/ABI/testing/gpio-cdev+26−0
@@ -0,0 +1,26 @@
1+What: /dev/gpiochip[0-9]+
2+Date: November 2015
3+KernelVersion: 4.4
4+Contact: linux-gpio@vger.kernel.org
5+Description:
6+ The character device files /dev/gpiochip* are the interface
7+ between GPIO chips and userspace.
8+
9+ The ioctl(2)-based ABI is defined and documented in
10+ [include/uapi]<linux/gpio.h>.
11+
12+ The following file operations are supported:
13+
14+ open(2)
15+ Currently the only useful flags are O_RDWR.
16+
17+ ioctl(2)
18+ Initiate various actions.
19+ See the inline documentation in [include/uapi]<linux/gpio.h>
20+ for descriptions of all ioctls.
21+
22+ close(2)
23+ Stops and free up the I/O contexts that was associated
24+ with the file descriptor.
25+
26+Users: TBD
Documentation/devicetree/bindings/gpio/gpio-altera.txt+2−2
@@ -12,7 +12,7 @@ Required properties: · 11 unmodified lines
1212 - #interrupt-cells : Should be 1. The interrupt type is fixed in the hardware.
1313 - The first cell is the GPIO offset number within the GPIO controller.
1414 - interrupts: Specify the interrupt.
15−- altr,interrupt-trigger: Specifies the interrupt trigger type the GPIO
15+- altr,interrupt-type: Specifies the interrupt trigger type the GPIO
1616 hardware is synthesized. This field is required if the Altera GPIO controller
1717 used has IRQ enabled as the interrupt type is not software controlled,
1818 but hardware synthesized. Required if GPIO is used as an interrupt
@@ -35,7 +35,7 @@ gpio_altr: gpio@0xff200000 { · 16 unmodified lines
3535 reg = <0xff200000 0x10>;
3636 interrupts = <0 45 4>;
3737 altr,ngpio = <32>;
38− altr,interrupt-trigger = <IRQ_TYPE_EDGE_RISING>;
38+ altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
3939 #gpio-cells = <2>;
4040 gpio-controller;
4141 #interrupt-cells = <1>;
Documentation/devicetree/bindings/gpio/gpio-mcp23s08.txt+1−3
@@ -10,6 +10,7 @@ Required properties: · 9 unmodified lines
1010
1111 - "microchip,mcp23s08" for 8 GPIO SPI version
1212 - "microchip,mcp23s17" for 16 GPIO SPI version
13+ - "microchip,mcp23s18" for 16 GPIO SPI version
1314 - "microchip,mcp23008" for 8 GPIO I2C version or
1415 - "microchip,mcp23017" for 16 GPIO I2C version of the chip
1516 NOTE: Do not use the old mcp prefix any more. It is deprecated and will be
@@ -43,9 +44,6 @@ Optional properties: · 27 unmodified lines
4344 - first cell is the pin number
4445 - second cell is used to specify flags.
4546 - interrupt-controller: Marks the device node as a interrupt controller.
46−NOTE: The interrupt functionality is only supported for i2c versions of the
47−chips. The spi chips can also do the interrupts, but this is not supported by
48−the linux driver yet.
4947
5048 Optional device specific properties:
5149 - microchip,irq-mirror: Sets the mirror flag in the IOCON register. Devices
Documentation/devicetree/bindings/gpio/gpio-pisosr.txt+34−0
@@ -0,0 +1,34 @@
1+Generic Parallel-in/Serial-out Shift Register GPIO Driver
2+
3+This binding describes generic parallel-in/serial-out shift register
4+devices that can be used for GPI (General Purpose Input). This includes
5+SN74165 serial-out shift registers and the SN65HVS88x series of
6+industrial serializers.
7+
8+Required properties:
9+ - compatible : Should be "pisosr-gpio".
10+ - gpio-controller : Marks the device node as a GPIO controller.
11+ - #gpio-cells : Should be two. For consumer use see gpio.txt.
12+
13+Optional properties:
14+ - ngpios : Number of used GPIO lines (0..n-1), default is 8.
15+ - load-gpios : GPIO pin specifier attached to load enable, this
16+ pin is pulsed before reading from the device to
17+ load input pin values into the the device.
18+
19+For other required and optional properties of SPI slave
20+nodes please refer to ../spi/spi-bus.txt.
21+
22+Example:
23+
24+ gpio@0 {
25+ compatible = "ti,sn65hvs882", "pisosr-gpio";
26+ gpio-controller;
27+ #gpio-cells = <2>;
28+
29+ load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
30+
31+ reg = <0>;
32+ spi-max-frequency = <1000000>;
33+ spi-cpol;
34+ };
Documentation/devicetree/bindings/gpio/gpio-ts4800.txt+20−0
@@ -0,0 +1,20 @@
1+* TS-4800 FPGA's GPIO controller bindings
2+
3+Required properties:
4+- compatible: Must be "technologic,ts4800-gpio".
5+- #gpio-cells: Should be two. The first cell is the pin number.
6+- reg: Physical base address of the controller and length
7+ of memory mapped region.
8+
9+Optional property:
10+- ngpios: See "gpio.txt"
11+
12+Example:
13+
14+gpio1: gpio {
15+ compatible = "technologic,ts4800-gpio";
16+ reg = <0x10020 0x6>;
17+ ngpios = <8>;
18+ gpio-controller;
19+ #gpio-cells = <2>;
20+};
Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt+40−7
@@ -1,10 +1,20 @@
11 APM X-Gene Standby GPIO controller bindings
22
3−This is a gpio controller in the standby domain.
4−
5−There are 20 GPIO pins from 0..21. There is no GPIO_DS14 or GPIO_DS15,
6−only GPIO_DS8..GPIO_DS13 support interrupts. The IRQ mapping
7−is currently 1-to-1 on interrupts 0x28 thru 0x2d.
3+This is a gpio controller in the standby domain. It also supports interrupt in
4+some particular pins which are sourced to its parent interrupt controller
5+as diagram below:
6+ +-----------------+
7+ | X-Gene standby |
8+ | GPIO controller +------ GPIO_0
9++------------+ | | ...
10+| Parent IRQ | EXT_INT_0 | +------ GPIO_8/EXT_INT_0
11+| controller | (SPI40) | | ...
12+| (GICv2) +--------------+ +------ GPIO_[N+8]/EXT_INT_N
13+| | ... | |
14+| | EXT_INT_N | +------ GPIO_[N+9]
15+| | (SPI[40 + N])| | ...
16+| +--------------+ +------ GPIO_MAX
17++------------+ +-----------------+
818
919 Required properties:
1020 - compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller
@@ -15,10 +25,18 @@ Required properties: · 4 unmodified lines
1525 0 = active high
1626 1 = active low
1727 - gpio-controller: Marks the device node as a GPIO controller.
18−- interrupts: Shall contain exactly 6 interrupts.
28+- interrupts: The EXT_INT_0 parent interrupt resource must be listed first.
29+- interrupt-parent: Phandle of the parent interrupt controller.
30+- interrupt-cells: Should be two.
31+ - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N.
32+ - second cell is used to specify flags.
33+- interrupt-controller: Marks the device node as an interrupt controller.
34+- apm,nr-gpios: Optional, specify number of gpios pin.
35+- apm,nr-irqs: Optional, specify number of interrupt pins.
36+- apm,irq-start: Optional, specify lowest gpio pin support interrupt.
1937
2038 Example:
21− sbgpio: sbgpio@17001000 {
39+ sbgpio: gpio@17001000{
2240 compatible = "apm,xgene-gpio-sb";
2341 reg = <0x0 0x17001000 0x0 0x400>;
2442 #gpio-cells = <2>;
@@ -29,4 +47,19 @@ Example: · 4 unmodified lines
2947 <0x0 0x2b 0x1>,
3048 <0x0 0x2c 0x1>,
3149 <0x0 0x2d 0x1>;
50+ interrupt-parent = <&gic>;
51+ #interrupt-cells = <2>;
52+ interrupt-controller;
53+ apm,nr-gpios = <22>;
54+ apm,nr-irqs = <6>;
55+ apm,irq-start = <8>;
56+ };
57+
58+ testuser {
59+ compatible = "example,testuser";
60+ /* Use the GPIO_13/EXT_INT_5 line as an active high triggered
61+ * level interrupt
62+ */
63+ interrupts = <5 4>;
64+ interrupt-parent = <&sbgpio>;
3265 };
Documentation/devicetree/bindings/mfd/tps65912.txt+50−0
@@ -0,0 +1,50 @@
1+* TPS65912 Power Management Integrated Circuit bindings
2+
3+Required properties:
4+ - compatible : Should be "ti,tps65912".
5+ - reg : Slave address or chip select number (I2C / SPI).
6+ - interrupt-parent : The parent interrupt controller.
7+ - interrupts : The interrupt line the device is connected to.
8+ - interrupt-controller : Marks the device node as an interrupt controller.
9+ - #interrupt-cells : The number of cells to describe an IRQ, should be 2.
10+ The first cell is the IRQ number.
11+ The second cell is the flags, encoded as trigger
12+ masks from ../interrupt-controller/interrupts.txt.
13+ - gpio-controller : Marks the device node as a GPIO Controller.
14+ - #gpio-cells : Should be two. The first cell is the pin number and
15+ the second cell is used to specify flags.
16+ See ../gpio/gpio.txt for more information.
17+ - regulators: : List of child nodes that specify the regulator
18+ initialization data. Child nodes must be named
19+ after their hardware counterparts: dcdc[1-4] and
20+ ldo[1-10]. Each child nodes is defined using the
21+ standard binding for regulators.
22+
23+Example:
24+
25+ pmic: tps65912@2d {
26+ compatible = "ti,tps65912";
27+ reg = <0x2d>;
28+ interrupt-parent = <&gpio1>;
29+ interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
30+ interrupt-controller;
31+ #interrupt-cells = <2>;
32+ gpio-controller;
33+ #gpio-cells = <2>;
34+
35+ regulators {
36+ dcdc1 {
37+ regulator-name = "vdd_core";
38+ regulator-min-microvolt = <912000>;
39+ regulator-max-microvolt = <1144000>;
40+ regulator-boot-on;
41+ regulator-always-on;
42+ };
43+
44+ ldo1 {
45+ regulator-name = "ldo1";
46+ regulator-min-microvolt = <1900000>;
47+ regulator-max-microvolt = <1900000>;
48+ };
49+ };
50+ };
Documentation/driver-model/devres.txt+5−0
@@ -252,6 +252,11 @@ GPIO · 251 unmodified lines
252252 devm_gpiod_get_index_optional()
253253 devm_gpiod_get_optional()
254254 devm_gpiod_put()
255+ devm_gpiochip_add_data()
256+ devm_gpiochip_remove()
257+ devm_gpio_request()
258+ devm_gpio_request_one()
259+ devm_gpio_free()
255260
256261 IIO
257262 devm_iio_device_alloc()
Documentation/gpio/board.txt+5−6
@@ -111,16 +111,13 @@ files that desire to do so need to include the following header: · 110 unmodified lines
111111 GPIOs are mapped by the means of tables of lookups, containing instances of the
112112 gpiod_lookup structure. Two macros are defined to help declaring such mappings:
113113
114− GPIO_LOOKUP(chip_label, chip_hwnum, dev_id, con_id, flags)
115− GPIO_LOOKUP_IDX(chip_label, chip_hwnum, dev_id, con_id, idx, flags)
114+ GPIO_LOOKUP(chip_label, chip_hwnum, con_id, flags)
115+ GPIO_LOOKUP_IDX(chip_label, chip_hwnum, con_id, idx, flags)
116116
117117 where
118118
119119 - chip_label is the label of the gpiod_chip instance providing the GPIO
120120 - chip_hwnum is the hardware number of the GPIO within the chip
121− - dev_id is the identifier of the device that will make use of this GPIO. It
122− can be NULL, in which case it will be matched for calls to gpiod_get()
123− with a NULL device.
124121 - con_id is the name of the GPIO function from the device point of view. It
125122 can be NULL, in which case it will match any function.
126123 - idx is the index of the GPIO within the function.
@@ -134,7 +131,9 @@ In the future, these flags might be extended to support more properties. · 7 unmodified lines
134131 Note that GPIO_LOOKUP() is just a shortcut to GPIO_LOOKUP_IDX() where idx = 0.
135132
136133 A lookup table can then be defined as follows, with an empty entry defining its
137−end:
134+end. The 'dev_id' field of the table is the identifier of the device that will
135+make use of these GPIOs. It can be NULL, in which case it will be matched for
136+calls to gpiod_get() with a NULL device.
138137
139138 struct gpiod_lookup_table gpios_table = {
140139 .dev_id = "foo.0",
Documentation/ioctl/ioctl-number.txt+1−0
@@ -319,6 +319,7 @@ Code Seq#(hex) Include File Comments · 318 unmodified lines
319319 <mailto:vgo@ratio.de>
320320 0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
321321 0xB3 00 linux/mmc/ioctl.h
322+0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org>
322323 0xC0 00-0F linux/usb/iowarrior.h
323324 0xCA 00-0F uapi/misc/cxl.h
324325 0xCA 80-8F uapi/scsi/cxlflash_ioctl.h
MAINTAINERS+16−0
@@ -238,6 +238,12 @@ L: lm-sensors@lm-sensors.org · 237 unmodified lines
238238 S: Maintained
239239 F: drivers/hwmon/abituguru3.c
240240
241+ACCES 104-DIO-48E GPIO DRIVER
242+M: William Breathitt Gray <vilhelm.gray@gmail.com>
243+L: linux-gpio@vger.kernel.org
244+S: Maintained
245+F: drivers/gpio/gpio-104-dio-48e.c
246+
241247 ACCES 104-IDI-48 GPIO DRIVER
242248 M: "William Breathitt Gray" <vilhelm.gray@gmail.com>
243249 L: linux-gpio@vger.kernel.org
@@ -4827,10 +4833,14 @@ L: linux-gpio@vger.kernel.org · 4583 unmodified lines
48274833 T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
48284834 S: Maintained
48294835 F: Documentation/gpio/
4836+F: Documentation/ABI/testing/gpio-cdev
4837+F: Documentation/ABI/obsolete/sysfs-gpio
48304838 F: drivers/gpio/
48314839 F: include/linux/gpio/
48324840 F: include/linux/gpio.h
48334841 F: include/asm-generic/gpio.h
4842+F: include/uapi/linux/gpio.h
4843+F: tools/gpio/
48344844
48354845 GRE DEMULTIPLEXER DRIVER
48364846 M: Dmitry Kozlov <xeb@mail.ru>
@@ -11931,6 +11941,12 @@ M: David Härdeman <david@hardeman.nu> · 7094 unmodified lines
1193111941 S: Maintained
1193211942 F: drivers/media/rc/winbond-cir.c
1193311943
11944+WINSYSTEMS WS16C48 GPIO DRIVER
11945+M: William Breathitt Gray <vilhelm.gray@gmail.com>
11946+L: linux-gpio@vger.kernel.org
11947+S: Maintained
11948+F: drivers/gpio/gpio-ws16c48.c
11949+
1193411950 WIMAX STACK
1193511951 M: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
1193611952 M: linux-wimax@intel.com
arch/alpha/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
arch/arm/common/scoop.c+5−5
@@ -69,7 +69,7 @@ static void __scoop_gpio_set(struct scoop_dev *sdev, · 68 unmodified lines
6969
7070 static void scoop_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
7171 {
72− struct scoop_dev *sdev = container_of(chip, struct scoop_dev, gpio);
72+ struct scoop_dev *sdev = gpiochip_get_data(chip);
7373 unsigned long flags;
7474
7575 spin_lock_irqsave(&sdev->scoop_lock, flags);
@@ -81,7 +81,7 @@ static void scoop_gpio_set(struct gpio_chip *chip, unsigned offset, int value) · 5 unmodified lines
8181
8282 static int scoop_gpio_get(struct gpio_chip *chip, unsigned offset)
8383 {
84− struct scoop_dev *sdev = container_of(chip, struct scoop_dev, gpio);
84+ struct scoop_dev *sdev = gpiochip_get_data(chip);
8585
8686 /* XXX: I'm unsure, but it seems so */
8787 return !!(ioread16(sdev->base + SCOOP_GPRR) & (1 << (offset + 1)));
@@ -90,7 +90,7 @@ static int scoop_gpio_get(struct gpio_chip *chip, unsigned offset) · 2 unmodified lines
9090 static int scoop_gpio_direction_input(struct gpio_chip *chip,
9191 unsigned offset)
9292 {
93− struct scoop_dev *sdev = container_of(chip, struct scoop_dev, gpio);
93+ struct scoop_dev *sdev = gpiochip_get_data(chip);
9494 unsigned long flags;
9595 unsigned short gpcr;
9696
@@ -108,7 +108,7 @@ static int scoop_gpio_direction_input(struct gpio_chip *chip, · 11 unmodified lines
108108 static int scoop_gpio_direction_output(struct gpio_chip *chip,
109109 unsigned offset, int value)
110110 {
111− struct scoop_dev *sdev = container_of(chip, struct scoop_dev, gpio);
111+ struct scoop_dev *sdev = gpiochip_get_data(chip);
112112 unsigned long flags;
113113 unsigned short gpcr;
114114
@@ -224,7 +224,7 @@ static int scoop_probe(struct platform_device *pdev) · 109 unmodified lines
224224 devptr->gpio.direction_input = scoop_gpio_direction_input;
225225 devptr->gpio.direction_output = scoop_gpio_direction_output;
226226
227− ret = gpiochip_add(&devptr->gpio);
227+ ret = gpiochip_add_data(&devptr->gpio, devptr);
228228 if (ret)
229229 goto err_gpio;
230230 }
arch/arm/mach-gemini/gpio.c+2−2
@@ -17,7 +17,7 @@ · 16 unmodified lines
1717 #include <linux/init.h>
1818 #include <linux/io.h>
1919 #include <linux/irq.h>
20−#include <linux/gpio.h>
20+#include <linux/gpio/driver.h>
2121
2222 #include <mach/hardware.h>
2323 #include <mach/irqs.h>
@@ -227,5 +227,5 @@ void __init gemini_gpio_init(void) · 203 unmodified lines
227227 (void *)i);
228228 }
229229
230− BUG_ON(gpiochip_add(&gemini_gpio_chip));
230+ BUG_ON(gpiochip_add_data(&gemini_gpio_chip, NULL));
231231 }
arch/arm/mach-imx/mach-mx27ads.c+3−1
@@ -13,6 +13,8 @@ · 12 unmodified lines
1313 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1414 * GNU General Public License for more details.
1515 */
16+#include <linux/gpio/driver.h>
17+/* Needed for gpio_to_irq() */
1618 #include <linux/gpio.h>
1719 #include <linux/platform_device.h>
1820 #include <linux/mtd/mtd.h>
@@ -243,7 +245,7 @@ static void __init mx27ads_regulator_init(void) · 224 unmodified lines
243245 vchip->ngpio = 1;
244246 vchip->direction_output = vgpio_dir_out;
245247 vchip->set = vgpio_set;
246− gpiochip_add(vchip);
248+ gpiochip_add_data(vchip, NULL);
247249
248250 platform_device_register_data(NULL, "reg-fixed-voltage",
249251 PLATFORM_DEVID_AUTO,
arch/arm/mach-ixp4xx/common.c+2−2
@@ -27,7 +27,7 @@ · 26 unmodified lines
2727 #include <linux/clockchips.h>
2828 #include <linux/io.h>
2929 #include <linux/export.h>
30−#include <linux/gpio.h>
30+#include <linux/gpio/driver.h>
3131 #include <linux/cpu.h>
3232 #include <linux/pci.h>
3333 #include <linux/sched_clock.h>
@@ -461,7 +461,7 @@ void __init ixp4xx_sys_init(void) · 427 unmodified lines
461461
462462 platform_add_devices(ixp4xx_devices, ARRAY_SIZE(ixp4xx_devices));
463463
464− gpiochip_add(&ixp4xx_gpio_chip);
464+ gpiochip_add_data(&ixp4xx_gpio_chip, NULL);
465465
466466 if (cpu_is_ixp46x()) {
467467 int region;
arch/arm/mach-s3c24xx/mach-h1940.c+1−1
@@ -664,7 +664,7 @@ static void __init h1940_map_io(void) · 663 unmodified lines
664664
665665 /* Add latch gpio chip, set latch initial value */
666666 h1940_latch_control(0, 0);
667− WARN_ON(gpiochip_add(&h1940_latch_gpiochip));
667+ WARN_ON(gpiochip_add_data(&h1940_latch_gpiochip, NULL));
668668 }
669669
670670 static void __init h1940_init_time(void)
arch/arm/mach-sa1100/simpad.c+2−2
@@ -15,7 +15,7 @@ · 14 unmodified lines
1515 #include <linux/mtd/mtd.h>
1616 #include <linux/mtd/partitions.h>
1717 #include <linux/io.h>
18−#include <linux/gpio.h>
18+#include <linux/gpio/driver.h>
1919
2020 #include <mach/hardware.h>
2121 #include <asm/setup.h>
@@ -369,7 +369,7 @@ static int __init simpad_init(void) · 347 unmodified lines
369369 cs3_gpio.get = cs3_gpio_get;
370370 cs3_gpio.direction_input = cs3_gpio_direction_input;
371371 cs3_gpio.direction_output = cs3_gpio_direction_output;
372− ret = gpiochip_add(&cs3_gpio);
372+ ret = gpiochip_add_data(&cs3_gpio, NULL);
373373 if (ret)
374374 printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device");
375375
arch/arm/mach-w90x900/gpio.c+6−7
@@ -20,7 +20,7 @@ · 19 unmodified lines
2020 #include <linux/list.h>
2121 #include <linux/module.h>
2222 #include <linux/io.h>
23−#include <linux/gpio.h>
23+#include <linux/gpio/driver.h>
2424
2525 #include <mach/hardware.h>
2626
@@ -30,7 +30,6 @@ · 3 unmodified lines
3030 #define GPIO_IN (0x0C)
3131 #define GROUPINERV (0x10)
3232 #define GPIO_GPIO(Nb) (0x00000001 << (Nb))
33−#define to_nuc900_gpio_chip(c) container_of(c, struct nuc900_gpio_chip, chip)
3433
3534 #define NUC900_GPIO_CHIP(name, base_gpio, nr_gpio) \
3635 { \
@@ -53,7 +52,7 @@ struct nuc900_gpio_chip { · 16 unmodified lines
5352
5453 static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset)
5554 {
56− struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip);
55+ struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
5756 void __iomem *pio = nuc900_gpio->regbase + GPIO_IN;
5857 unsigned int regval;
5958
@@ -65,7 +64,7 @@ static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset) · 5 unmodified lines
6564
6665 static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
6766 {
68− struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip);
67+ struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
6968 void __iomem *pio = nuc900_gpio->regbase + GPIO_OUT;
7069 unsigned int regval;
7170 unsigned long flags;
@@ -86,7 +85,7 @@ static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val) · 14 unmodified lines
8685
8786 static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset)
8887 {
89− struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip);
88+ struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
9089 void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
9190 unsigned int regval;
9291 unsigned long flags;
@@ -104,7 +103,7 @@ static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset) · 11 unmodified lines
104103
105104 static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
106105 {
107− struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip);
106+ struct nuc900_gpio_chip *nuc900_gpio = gpiochip_get_data(chip);
108107 void __iomem *outreg = nuc900_gpio->regbase + GPIO_OUT;
109108 void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
110109 unsigned int regval;
@@ -149,6 +148,6 @@ void __init nuc900_init_gpio(int nr_group) · 38 unmodified lines
149148 gpio_chip = &nuc900_gpio[i];
150149 spin_lock_init(&gpio_chip->gpio_lock);
151150 gpio_chip->regbase = GPIO_BASE + i * GROUPINERV;
152− gpiochip_add(&gpio_chip->chip);
151+ gpiochip_add_data(&gpio_chip->chip, gpio_chip);
153152 }
154153 }
arch/arm/plat-orion/gpio.c+9−15
@@ -154,8 +154,7 @@ err_out: · 153 unmodified lines
154154 */
155155 static int orion_gpio_request(struct gpio_chip *chip, unsigned pin)
156156 {
157− struct orion_gpio_chip *ochip =
158− container_of(chip, struct orion_gpio_chip, chip);
157+ struct orion_gpio_chip *ochip = gpiochip_get_data(chip);
159158
160159 if (orion_gpio_is_valid(ochip, pin, GPIO_INPUT_OK) ||
161160 orion_gpio_is_valid(ochip, pin, GPIO_OUTPUT_OK))
@@ -166,8 +165,7 @@ static int orion_gpio_request(struct gpio_chip *chip, unsigned pin) · 4 unmodified lines
166165
167166 static int orion_gpio_direction_input(struct gpio_chip *chip, unsigned pin)
168167 {
169− struct orion_gpio_chip *ochip =
170− container_of(chip, struct orion_gpio_chip, chip);
168+ struct orion_gpio_chip *ochip = gpiochip_get_data(chip);
171169 unsigned long flags;
172170
173171 if (!orion_gpio_is_valid(ochip, pin, GPIO_INPUT_OK))
@@ -182,8 +180,7 @@ static int orion_gpio_direction_input(struct gpio_chip *chip, unsigned pin) · 8 unmodified lines
182180
183181 static int orion_gpio_get(struct gpio_chip *chip, unsigned pin)
184182 {
185− struct orion_gpio_chip *ochip =
186− container_of(chip, struct orion_gpio_chip, chip);
183+ struct orion_gpio_chip *ochip = gpiochip_get_data(chip);
187184 int val;
188185
189186 if (readl(GPIO_IO_CONF(ochip)) & (1 << pin)) {
@@ -198,8 +195,7 @@ static int orion_gpio_get(struct gpio_chip *chip, unsigned pin) · 8 unmodified lines
198195 static int
199196 orion_gpio_direction_output(struct gpio_chip *chip, unsigned pin, int value)
200197 {
201− struct orion_gpio_chip *ochip =
202− container_of(chip, struct orion_gpio_chip, chip);
198+ struct orion_gpio_chip *ochip = gpiochip_get_data(chip);
203199 unsigned long flags;
204200
205201 if (!orion_gpio_is_valid(ochip, pin, GPIO_OUTPUT_OK))
@@ -216,8 +212,7 @@ orion_gpio_direction_output(struct gpio_chip *chip, unsigned pin, int value) · 10 unmodified lines
216212
217213 static void orion_gpio_set(struct gpio_chip *chip, unsigned pin, int value)
218214 {
219− struct orion_gpio_chip *ochip =
220− container_of(chip, struct orion_gpio_chip, chip);
215+ struct orion_gpio_chip *ochip = gpiochip_get_data(chip);
221216 unsigned long flags;
222217
223218 spin_lock_irqsave(&ochip->lock, flags);
@@ -227,8 +222,7 @@ static void orion_gpio_set(struct gpio_chip *chip, unsigned pin, int value) · 3 unmodified lines
227222
228223 static int orion_gpio_to_irq(struct gpio_chip *chip, unsigned pin)
229224 {
230− struct orion_gpio_chip *ochip =
231− container_of(chip, struct orion_gpio_chip, chip);
225+ struct orion_gpio_chip *ochip = gpiochip_get_data(chip);
232226
233227 return irq_create_mapping(ochip->domain,
234228 ochip->secondary_irq_base + pin);
@@ -445,8 +439,8 @@ static void gpio_irq_handler(struct irq_desc *desc) · 210 unmodified lines
445439
446440 static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
447441 {
448− struct orion_gpio_chip *ochip =
449− container_of(chip, struct orion_gpio_chip, chip);
442+
443+ struct orion_gpio_chip *ochip = gpiochip_get_data(chip);
450444 u32 out, io_conf, blink, in_pol, data_in, cause, edg_msk, lvl_msk;
451445 int i;
452446
@@ -567,7 +561,7 @@ void __init orion_gpio_init(struct device_node *np, · 114 unmodified lines
567561 ochip->mask_offset = mask_offset;
568562 ochip->secondary_irq_base = secondary_irq_base;
569563
570− gpiochip_add(&ochip->chip);
564+ gpiochip_add_data(&ochip->chip, ochip);
571565
572566 /*
573567 * Mask and clear GPIO interrupts.
arch/avr32/boards/merisc/setup.c+0−1
@@ -27,7 +27,6 @@ · 26 unmodified lines
2727
2828 #include <asm/io.h>
2929 #include <asm/setup.h>
30−#include <asm/gpio.h>
3130
3231 #include <mach/at32ap700x.h>
3332 #include <mach/board.h>
arch/avr32/mach-at32ap/pio.c+1−1
@@ -14,8 +14,8 @@ · 13 unmodified lines
1414 #include <linux/fs.h>
1515 #include <linux/platform_device.h>
1616 #include <linux/irq.h>
17+#include <linux/gpio.h>
1718
18−#include <asm/gpio.h>
1919 #include <asm/io.h>
2020
2121 #include <mach/portmux.h>
arch/blackfin/kernel/bfin_gpio.c+4−2
@@ -11,6 +11,8 @@ · 10 unmodified lines
1111 #include <linux/err.h>
1212 #include <linux/proc_fs.h>
1313 #include <linux/seq_file.h>
14+#include <linux/gpio/driver.h>
15+/* FIXME: consumer API required for gpio_set_value() etc, get rid of this */
1416 #include <linux/gpio.h>
1517 #include <linux/irq.h>
1618
@@ -1159,7 +1161,7 @@ static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, · 1142 unmodified lines
11591161
11601162 static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
11611163 {
1162− return bfin_gpio_get_value(gpio);
1164+ return !!bfin_gpio_get_value(gpio);
11631165 }
11641166
11651167 static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
@@ -1197,7 +1199,7 @@ static struct gpio_chip bfin_chip = { · 31 unmodified lines
11971199
11981200 static int __init bfin_gpiolib_setup(void)
11991201 {
1200− return gpiochip_add(&bfin_chip);
1202+ return gpiochip_add_data(&bfin_chip, NULL);
12011203 }
12021204 arch_initcall(bfin_gpiolib_setup);
12031205 #endif
arch/blackfin/kernel/debug-mmrs.c+1−1
@@ -11,9 +11,9 @@ · 10 unmodified lines
1111 #include <linux/kernel.h>
1212 #include <linux/module.h>
1313 #include <linux/i2c/bfin_twi.h>
14+#include <linux/gpio.h>
1415
1516 #include <asm/blackfin.h>
16−#include <asm/gpio.h>
1717 #include <asm/gptimers.h>
1818 #include <asm/bfin_can.h>
1919 #include <asm/bfin_dma.h>
arch/blackfin/mach-bf538/boards/ezkit.c+1−1
@@ -15,9 +15,9 @@ · 14 unmodified lines
1515 #include <linux/spi/flash.h>
1616 #include <linux/irq.h>
1717 #include <linux/interrupt.h>
18+#include <linux/gpio.h>
1819 #include <asm/bfin5xx_spi.h>
1920 #include <asm/dma.h>
20−#include <asm/gpio.h>
2121 #include <asm/nand.h>
2222 #include <asm/portmux.h>
2323 #include <asm/dpmc.h>
arch/blackfin/mach-bf538/ext-gpio.c+4−4
@@ -8,8 +8,8 @@ · 7 unmodified lines
88
99 #include <linux/module.h>
1010 #include <linux/err.h>
11+#include <linux/gpio.h>
1112 #include <asm/blackfin.h>
12−#include <asm/gpio.h>
1313 #include <asm/portmux.h>
1414
1515 #define DEFINE_REG(reg, off) \
@@ -116,9 +116,9 @@ static struct gpio_chip bf538_porte_chip = { · 100 unmodified lines
116116
117117 static int __init bf538_extgpio_setup(void)
118118 {
119− return gpiochip_add(&bf538_portc_chip) |
120− gpiochip_add(&bf538_portd_chip) |
121− gpiochip_add(&bf538_porte_chip);
119+ return gpiochip_add_data(&bf538_portc_chip, NULL) |
120+ gpiochip_add_data(&bf538_portd_chip, NULL) |
121+ gpiochip_add_data(&bf538_porte_chip, NULL);
122122 }
123123 arch_initcall(bf538_extgpio_setup);
124124
arch/blackfin/mach-bf548/boards/cm_bf548.c+1−1
@@ -17,9 +17,9 @@ · 16 unmodified lines
1717 #include <linux/irq.h>
1818 #include <linux/interrupt.h>
1919 #include <linux/usb/musb.h>
20+#include <linux/gpio.h>
2021 #include <asm/bfin5xx_spi.h>
2122 #include <asm/dma.h>
22−#include <asm/gpio.h>
2323 #include <asm/nand.h>
2424 #include <asm/portmux.h>
2525 #include <asm/bfin_sdh.h>
arch/blackfin/mach-bf548/boards/ezkit.c+1−1
@@ -20,9 +20,9 @@ · 19 unmodified lines
2020 #include <linux/pinctrl/machine.h>
2121 #include <linux/pinctrl/pinconf-generic.h>
2222 #include <linux/platform_data/pinctrl-adi2.h>
23+#include <linux/gpio.h>
2324 #include <asm/bfin5xx_spi.h>
2425 #include <asm/dma.h>
25−#include <asm/gpio.h>
2626 #include <asm/nand.h>
2727 #include <asm/dpmc.h>
2828 #include <asm/bfin_sport.h>
arch/blackfin/mach-bf609/boards/ezkit.c+1−1
@@ -21,8 +21,8 @@ · 20 unmodified lines
2121 #include <linux/pinctrl/pinconf-generic.h>
2222 #include <linux/platform_data/pinctrl-adi2.h>
2323 #include <linux/spi/adi_spi3.h>
24+#include <linux/gpio.h>
2425 #include <asm/dma.h>
25−#include <asm/gpio.h>
2626 #include <asm/nand.h>
2727 #include <asm/dpmc.h>
2828 #include <asm/portmux.h>
arch/blackfin/mach-common/ints-priority.c+1−1
@@ -17,13 +17,13 @@ · 16 unmodified lines
1717 #include <linux/irq.h>
1818 #include <linux/sched.h>
1919 #include <linux/syscore_ops.h>
20+#include <linux/gpio.h>
2021 #include <asm/delay.h>
2122 #ifdef CONFIG_IPIPE
2223 #include <linux/ipipe.h>
2324 #endif
2425 #include <asm/traps.h>
2526 #include <asm/blackfin.h>
26−#include <asm/gpio.h>
2727 #include <asm/irq_handler.h>
2828 #include <asm/dpmc.h>
2929 #include <asm/traps.h>
arch/blackfin/mach-common/pm.c+1−1
@@ -15,9 +15,9 @@ · 14 unmodified lines
1515 #include <linux/io.h>
1616 #include <linux/irq.h>
1717 #include <linux/delay.h>
18+#include <linux/gpio.h>
1819
1920 #include <asm/cplb.h>
20−#include <asm/gpio.h>
2121 #include <asm/dma.h>
2222 #include <asm/dpmc.h>
2323 #include <asm/pm.h>
arch/ia64/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
arch/m68k/coldfire/gpio.c+1−1
@@ -178,7 +178,7 @@ static struct gpio_chip mcfgpio_chip = { · 177 unmodified lines
178178
179179 static int __init mcfgpio_sysinit(void)
180180 {
181− gpiochip_add(&mcfgpio_chip);
181+ gpiochip_add_data(&mcfgpio_chip, NULL);
182182 return subsys_system_register(&mcfgpio_subsys, NULL);
183183 }
184184
arch/metag/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
arch/microblaze/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
arch/mips/alchemy/common/gpiolib.c+4−4
@@ -160,14 +160,14 @@ static int __init alchemy_gpiochip_init(void) · 159 unmodified lines
160160
161161 switch (alchemy_get_cputype()) {
162162 case ALCHEMY_CPU_AU1000:
163− ret = gpiochip_add(&alchemy_gpio_chip[0]);
163+ ret = gpiochip_add_data(&alchemy_gpio_chip[0], NULL);
164164 break;
165165 case ALCHEMY_CPU_AU1500...ALCHEMY_CPU_AU1200:
166− ret = gpiochip_add(&alchemy_gpio_chip[0]);
167− ret |= gpiochip_add(&alchemy_gpio_chip[1]);
166+ ret = gpiochip_add_data(&alchemy_gpio_chip[0], NULL);
167+ ret |= gpiochip_add_data(&alchemy_gpio_chip[1], NULL);
168168 break;
169169 case ALCHEMY_CPU_AU1300:
170− ret = gpiochip_add(&au1300_gpiochip);
170+ ret = gpiochip_add_data(&au1300_gpiochip, NULL);
171171 break;
172172 }
173173 return ret;
arch/mips/ar7/gpio.c+9−17
@@ -33,8 +33,7 @@ struct ar7_gpio_chip { · 32 unmodified lines
3333
3434 static int ar7_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
3535 {
36− struct ar7_gpio_chip *gpch =
37− container_of(chip, struct ar7_gpio_chip, chip);
36+ struct ar7_gpio_chip *gpch = gpiochip_get_data(chip);
3837 void __iomem *gpio_in = gpch->regs + AR7_GPIO_INPUT;
3938
4039 return !!(readl(gpio_in) & (1 << gpio));
@@ -42,8 +41,7 @@ static int ar7_gpio_get_value(struct gpio_chip *chip, unsigned gpio) · 1 unmodified line
4241
4342 static int titan_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
4443 {
45− struct ar7_gpio_chip *gpch =
46− container_of(chip, struct ar7_gpio_chip, chip);
44+ struct ar7_gpio_chip *gpch = gpiochip_get_data(chip);
4745 void __iomem *gpio_in0 = gpch->regs + TITAN_GPIO_INPUT_0;
4846 void __iomem *gpio_in1 = gpch->regs + TITAN_GPIO_INPUT_1;
4947
@@ -53,8 +51,7 @@ static int titan_gpio_get_value(struct gpio_chip *chip, unsigned gpio) · 3 unmodified lines
5351 static void ar7_gpio_set_value(struct gpio_chip *chip,
5452 unsigned gpio, int value)
5553 {
56− struct ar7_gpio_chip *gpch =
57− container_of(chip, struct ar7_gpio_chip, chip);
54+ struct ar7_gpio_chip *gpch = gpiochip_get_data(chip);
5855 void __iomem *gpio_out = gpch->regs + AR7_GPIO_OUTPUT;
5956 unsigned tmp;
6057
@@ -67,8 +64,7 @@ static void ar7_gpio_set_value(struct gpio_chip *chip, · 6 unmodified lines
6764 static void titan_gpio_set_value(struct gpio_chip *chip,
6865 unsigned gpio, int value)
6966 {
70− struct ar7_gpio_chip *gpch =
71− container_of(chip, struct ar7_gpio_chip, chip);
67+ struct ar7_gpio_chip *gpch = gpiochip_get_data(chip);
7268 void __iomem *gpio_out0 = gpch->regs + TITAN_GPIO_OUTPUT_0;
7369 void __iomem *gpio_out1 = gpch->regs + TITAN_GPIO_OUTPUT_1;
7470 unsigned tmp;
@@ -81,8 +77,7 @@ static void titan_gpio_set_value(struct gpio_chip *chip, · 6 unmodified lines
8177
8278 static int ar7_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
8379 {
84− struct ar7_gpio_chip *gpch =
85− container_of(chip, struct ar7_gpio_chip, chip);
80+ struct ar7_gpio_chip *gpch = gpiochip_get_data(chip);
8681 void __iomem *gpio_dir = gpch->regs + AR7_GPIO_DIR;
8782
8883 writel(readl(gpio_dir) | (1 << gpio), gpio_dir);
@@ -92,8 +87,7 @@ static int ar7_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) · 3 unmodified lines
9287
9388 static int titan_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
9489 {
95− struct ar7_gpio_chip *gpch =
96− container_of(chip, struct ar7_gpio_chip, chip);
90+ struct ar7_gpio_chip *gpch = gpiochip_get_data(chip);
9791 void __iomem *gpio_dir0 = gpch->regs + TITAN_GPIO_DIR_0;
9892 void __iomem *gpio_dir1 = gpch->regs + TITAN_GPIO_DIR_1;
9993
@@ -108,8 +102,7 @@ static int titan_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) · 8 unmodified lines
108102 static int ar7_gpio_direction_output(struct gpio_chip *chip,
109103 unsigned gpio, int value)
110104 {
111− struct ar7_gpio_chip *gpch =
112− container_of(chip, struct ar7_gpio_chip, chip);
105+ struct ar7_gpio_chip *gpch = gpiochip_get_data(chip);
113106 void __iomem *gpio_dir = gpch->regs + AR7_GPIO_DIR;
114107
115108 ar7_gpio_set_value(chip, gpio, value);
@@ -121,8 +114,7 @@ static int ar7_gpio_direction_output(struct gpio_chip *chip, · 5 unmodified lines
121114 static int titan_gpio_direction_output(struct gpio_chip *chip,
122115 unsigned gpio, int value)
123116 {
124− struct ar7_gpio_chip *gpch =
125− container_of(chip, struct ar7_gpio_chip, chip);
117+ struct ar7_gpio_chip *gpch = gpiochip_get_data(chip);
126118 void __iomem *gpio_dir0 = gpch->regs + TITAN_GPIO_DIR_0;
127119 void __iomem *gpio_dir1 = gpch->regs + TITAN_GPIO_DIR_1;
128120
@@ -335,7 +327,7 @@ int __init ar7_gpio_init(void) · 206 unmodified lines
335327 return -ENOMEM;
336328 }
337329
338− ret = gpiochip_add(&gpch->chip);
330+ ret = gpiochip_add_data(&gpch->chip, gpch);
339331 if (ret) {
340332 printk(KERN_ERR "%s: failed to add gpiochip\n",
341333 gpch->chip.label);
arch/mips/bcm63xx/gpio.c+2−2
@@ -11,7 +11,7 @@ · 10 unmodified lines
1111 #include <linux/module.h>
1212 #include <linux/spinlock.h>
1313 #include <linux/platform_device.h>
14−#include <linux/gpio.h>
14+#include <linux/gpio/driver.h>
1515
1616 #include <bcm63xx_cpu.h>
1717 #include <bcm63xx_gpio.h>
@@ -147,5 +147,5 @@ int __init bcm63xx_gpio_init(void) · 129 unmodified lines
147147 bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
148148 pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
149149
150− return gpiochip_add(&bcm63xx_gpio_chip);
150+ return gpiochip_add_data(&bcm63xx_gpio_chip, NULL);
151151 }
arch/mips/jz4740/gpio.c+6−4
@@ -18,6 +18,8 @@ · 17 unmodified lines
1818 #include <linux/init.h>
1919
2020 #include <linux/io.h>
21+#include <linux/gpio/driver.h>
22+/* FIXME: needed for gpio_request(), try to remove consumer API from driver */
2123 #include <linux/gpio.h>
2224 #include <linux/delay.h>
2325 #include <linux/interrupt.h>
@@ -91,9 +93,9 @@ static inline struct jz_gpio_chip *gpio_to_jz_gpio_chip(unsigned int gpio) · 67 unmodified lines
9193 return &jz4740_gpio_chips[gpio >> 5];
9294 }
9395
94−static inline struct jz_gpio_chip *gpio_chip_to_jz_gpio_chip(struct gpio_chip *gpio_chip)
96+static inline struct jz_gpio_chip *gpio_chip_to_jz_gpio_chip(struct gpio_chip *gc)
9597 {
96− return container_of(gpio_chip, struct jz_gpio_chip, gpio_chip);
98+ return gpiochip_get_data(gc);
9799 }
98100
99101 static inline struct jz_gpio_chip *irq_to_jz_gpio_chip(struct irq_data *data)
@@ -234,7 +236,7 @@ static int jz_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) · 134 unmodified lines
234236
235237 static int jz_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
236238 {
237− struct jz_gpio_chip *jz_gpio = gpio_chip_to_jz_gpio_chip(chip);
239+ struct jz_gpio_chip *jz_gpio = gpiochip_get_data(chip);
238240
239241 return jz_gpio->irq_base + gpio;
240242 }
@@ -449,7 +451,7 @@ static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) · 208 unmodified lines
449451 irq_setup_generic_chip(gc, IRQ_MSK(chip->gpio_chip.ngpio),
450452 IRQ_GC_INIT_NESTED_LOCK, 0, IRQ_NOPROBE | IRQ_LEVEL);
451453
452− gpiochip_add(&chip->gpio_chip);
454+ gpiochip_add_data(&chip->gpio_chip, chip);
453455 }
454456
455457 static int __init jz4740_gpio_init(void)
arch/mips/kernel/gpio_txx9.c+2−2
@@ -10,7 +10,7 @@ · 9 unmodified lines
1010
1111 #include <linux/init.h>
1212 #include <linux/spinlock.h>
13−#include <linux/gpio.h>
13+#include <linux/gpio/driver.h>
1414 #include <linux/errno.h>
1515 #include <linux/io.h>
1616 #include <asm/txx9pio.h>
@@ -85,5 +85,5 @@ int __init txx9_gpio_init(unsigned long baseaddr, · 68 unmodified lines
8585 return -ENODEV;
8686 txx9_gpio_chip.base = base;
8787 txx9_gpio_chip.ngpio = num;
88− return gpiochip_add(&txx9_gpio_chip);
88+ return gpiochip_add_data(&txx9_gpio_chip, NULL);
8989 }
arch/mips/rb532/gpio.c+6−6
@@ -32,7 +32,7 @@ · 31 unmodified lines
3232 #include <linux/export.h>
3333 #include <linux/spinlock.h>
3434 #include <linux/platform_device.h>
35−#include <linux/gpio.h>
35+#include <linux/gpio/driver.h>
3636
3737 #include <asm/mach-rc32434/rb.h>
3838 #include <asm/mach-rc32434/gpio.h>
@@ -88,7 +88,7 @@ static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset) · 49 unmodified lines
8888 {
8989 struct rb532_gpio_chip *gpch;
9090
91− gpch = container_of(chip, struct rb532_gpio_chip, chip);
91+ gpch = gpiochip_get_data(chip);
9292 return !!rb532_get_bit(offset, gpch->regbase + GPIOD);
9393 }
9494
@@ -100,7 +100,7 @@ static void rb532_gpio_set(struct gpio_chip *chip, · 5 unmodified lines
100100 {
101101 struct rb532_gpio_chip *gpch;
102102
103− gpch = container_of(chip, struct rb532_gpio_chip, chip);
103+ gpch = gpiochip_get_data(chip);
104104 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
105105 }
106106
@@ -111,7 +111,7 @@ static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset) · 4 unmodified lines
111111 {
112112 struct rb532_gpio_chip *gpch;
113113
114− gpch = container_of(chip, struct rb532_gpio_chip, chip);
114+ gpch = gpiochip_get_data(chip);
115115
116116 /* disable alternate function in case it's set */
117117 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
@@ -128,7 +128,7 @@ static int rb532_gpio_direction_output(struct gpio_chip *chip, · 10 unmodified lines
128128 {
129129 struct rb532_gpio_chip *gpch;
130130
131− gpch = container_of(chip, struct rb532_gpio_chip, chip);
131+ gpch = gpiochip_get_data(chip);
132132
133133 /* disable alternate function in case it's set */
134134 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
@@ -200,7 +200,7 @@ int __init rb532_gpio_init(void) · 65 unmodified lines
200200 }
201201
202202 /* Register our GPIO chip */
203− gpiochip_add(&rb532_gpio_chip->chip);
203+ gpiochip_add_data(&rb532_gpio_chip->chip, rb532_gpio_chip);
204204
205205 return 0;
206206 }
arch/mips/txx9/generic/setup.c+4−6
@@ -17,7 +17,7 @@ · 16 unmodified lines
1717 #include <linux/module.h>
1818 #include <linux/clk.h>
1919 #include <linux/err.h>
20−#include <linux/gpio.h>
20+#include <linux/gpio/driver.h>
2121 #include <linux/platform_device.h>
2222 #include <linux/serial_core.h>
2323 #include <linux/mtd/physmap.h>
@@ -687,16 +687,14 @@ struct txx9_iocled_data { · 663 unmodified lines
687687
688688 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
689689 {
690− struct txx9_iocled_data *data =
691− container_of(chip, struct txx9_iocled_data, chip);
690+ struct txx9_iocled_data *data = gpiochip_get_data(chip);
692691 return !!(data->cur_val & (1 << offset));
693692 }
694693
695694 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
696695 int value)
697696 {
698− struct txx9_iocled_data *data =
699− container_of(chip, struct txx9_iocled_data, chip);
697+ struct txx9_iocled_data *data = gpiochip_get_data(chip);
700698 unsigned long flags;
701699 spin_lock_irqsave(&txx9_iocled_lock, flags);
702700 if (value)
@@ -749,7 +747,7 @@ void __init txx9_iocled_init(unsigned long baseaddr, · 46 unmodified lines
749747 iocled->chip.label = "iocled";
750748 iocled->chip.base = basenum;
751749 iocled->chip.ngpio = num;
752− if (gpiochip_add(&iocled->chip))
750+ if (gpiochip_add_data(&iocled->chip, iocled))
753751 goto out_unmap;
754752 if (basenum < 0)
755753 basenum = iocled->chip.base;
arch/mips/txx9/rbtx4938/setup.c+2−1
@@ -14,6 +14,7 @@ · 13 unmodified lines
1414 #include <linux/ioport.h>
1515 #include <linux/delay.h>
1616 #include <linux/platform_device.h>
17+#include <linux/gpio/driver.h>
1718 #include <linux/gpio.h>
1819 #include <linux/mtd/physmap.h>
1920
@@ -335,7 +336,7 @@ static void __init rbtx4938_mtd_init(void) · 315 unmodified lines
335336
336337 static void __init rbtx4938_arch_init(void)
337338 {
338− gpiochip_add(&rbtx4938_spi_gpio_chip);
339+ gpiochip_add_data(&rbtx4938_spi_gpio_chip, NULL);
339340 rbtx4938_pci_setup();
340341 rbtx4938_spi_init();
341342 }
arch/openrisc/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
arch/powerpc/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
arch/powerpc/sysdev/ppc4xx_gpio.c+1−1
@@ -78,7 +78,7 @@ static int ppc4xx_gpio_get(struct gpio_chip *gc, unsigned int gpio) · 77 unmodified lines
7878 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
7979 struct ppc4xx_gpio __iomem *regs = mm_gc->regs;
8080
81− return in_be32(&regs->ir) & GPIO_MASK(gpio);
81+ return !!(in_be32(&regs->ir) & GPIO_MASK(gpio));
8282 }
8383
8484 static inline void
arch/powerpc/sysdev/simple_gpio.c+1−1
@@ -46,7 +46,7 @@ static int u8_gpio_get(struct gpio_chip *gc, unsigned int gpio) · 45 unmodified lines
4646 {
4747 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
4848
49− return in_8(mm_gc->regs) & u8_pin2mask(gpio);
49+ return !!(in_8(mm_gc->regs) & u8_pin2mask(gpio));
5050 }
5151
5252 static void u8_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
arch/sh/include/mach-common/mach/magicpanelr2.h+1−1
@@ -13,7 +13,7 @@ · 12 unmodified lines
1313 #ifndef __ASM_SH_MAGICPANELR2_H
1414 #define __ASM_SH_MAGICPANELR2_H
1515
16−#include <asm/gpio.h>
16+#include <linux/gpio.h>
1717
1818 #define __IO_PREFIX mpr2
1919 #include <asm/io_generic.h>
arch/sparc/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
arch/unicore32/kernel/gpio.c+1−1
@@ -52,7 +52,7 @@ device_initcall(puv3_gpio_leds_init); · 51 unmodified lines
5252
5353 static int puv3_gpio_get(struct gpio_chip *chip, unsigned offset)
5454 {
55− return readl(GPIO_GPLR) & GPIO_GPIO(offset);
55+ return !!(readl(GPIO_GPLR) & GPIO_GPIO(offset));
5656 }
5757
5858 static void puv3_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
arch/x86/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
arch/xtensa/include/asm/gpio.h+0−4
@@ -1,4 +0,0 @@
1−#ifndef __LINUX_GPIO_H
2−#warning Include linux/gpio.h instead of asm/gpio.h
3−#include <linux/gpio.h>
4−#endif
drivers/ata/pata_at91.c+1−2
@@ -30,8 +30,7 @@ · 29 unmodified lines
3030 #include <linux/ata_platform.h>
3131 #include <linux/platform_data/atmel.h>
3232 #include <linux/regmap.h>
33−
34−#include <asm/gpio.h>
33+#include <linux/gpio.h>
3534
3635 #define DRV_NAME "pata_at91"
3736 #define DRV_VERSION "0.3"
drivers/ata/pata_bf54x.c+1−1
@@ -36,8 +36,8 @@ · 35 unmodified lines
3636 #include <scsi/scsi_host.h>
3737 #include <linux/libata.h>
3838 #include <linux/platform_device.h>
39+#include <linux/gpio.h>
3940 #include <asm/dma.h>
40−#include <asm/gpio.h>
4141 #include <asm/portmux.h>
4242
4343 #define DRV_NAME "pata-bf54x"
drivers/gpio/Kconfig+76−9
@@ -126,6 +126,16 @@ config GPIO_AMDPT · 125 unmodified lines
126126 driver for GPIO functionality on Promontory IOHub
127127 Require ACPI ASL code to enumerate as a platform device.
128128
129+config GPIO_ATH79
130+ tristate "Atheros AR71XX/AR724X/AR913X GPIO support"
131+ default y if ATH79
132+ depends on ATH79 || COMPILE_TEST
133+ select GPIO_GENERIC
134+ select GPIOLIB_IRQCHIP
135+ help
136+ Select this option to enable GPIO driver for
137+ Atheros AR71XX/AR724X/AR913X SoC devices.
138+
129139 config GPIO_BCM_KONA
130140 bool "Broadcom Kona GPIO"
131141 depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST)
@@ -256,10 +266,17 @@ config GPIO_LYNXPOINT · 124 unmodified lines
256266
257267 config GPIO_MB86S7X
258268 bool "GPIO support for Fujitsu MB86S7x Platforms"
259− depends on ARCH_MB86S7X
269+ depends on ARCH_MB86S7X || COMPILE_TEST
260270 help
261271 Say yes here to support the GPIO controller in Fujitsu MB86S70 SoCs.
262272
273+config GPIO_MENZ127
274+ tristate "MEN 16Z127 GPIO support"
275+ depends on MCB
276+ select GPIO_GENERIC
277+ help
278+ Say yes here to support the MEN 16Z127 GPIO Controller
279+
263280 config GPIO_MM_LANTIQ
264281 bool "Lantiq Memory mapped GPIOs"
265282 depends on LANTIQ && SOC_XWAY
@@ -270,7 +287,7 @@ config GPIO_MM_LANTIQ · 4 unmodified lines
270287
271288 config GPIO_MOXART
272289 bool "MOXART GPIO support"
273− depends on ARCH_MOXART
290+ depends on ARCH_MOXART || COMPILE_TEST
274291 select GPIO_GENERIC
275292 help
276293 Select this option to enable GPIO driver for
@@ -281,12 +298,14 @@ config GPIO_MPC5200 · 4 unmodified lines
281298 depends on PPC_MPC52xx
282299
283300 config GPIO_MPC8XXX
284− bool "MPC512x/MPC8xxx GPIO support"
301+ bool "MPC512x/MPC8xxx/QorIQ GPIO support"
285302 depends on PPC_MPC512x || PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || \
286− FSL_SOC_BOOKE || PPC_86xx
303+ FSL_SOC_BOOKE || PPC_86xx || ARCH_LAYERSCAPE || ARM || \
304+ COMPILE_TEST
305+ select GPIO_GENERIC
287306 help
288307 Say Y here if you're going to use hardware that connects to the
289− MPC512x/831x/834x/837x/8572/8610 GPIOs.
308+ MPC512x/831x/834x/837x/8572/8610/QorIQ GPIOs.
290309
291310 config GPIO_MVEBU
292311 def_bool y
@@ -339,7 +358,7 @@ config GPIO_PXA · 46 unmodified lines
339358
340359 config GPIO_RCAR
341360 tristate "Renesas R-Car GPIO"
342− depends on ARCH_SHMOBILE || COMPILE_TEST
361+ depends on ARCH_RENESAS || COMPILE_TEST
343362 select GPIOLIB_IRQCHIP
344363 help
345364 Say yes here to support GPIO on Renesas R-Car SoCs.
@@ -380,6 +399,14 @@ config GPIO_TB10X · 34 unmodified lines
380399 select GENERIC_IRQ_CHIP
381400 select OF_GPIO
382401
402+config GPIO_TS4800
403+ tristate "TS-4800 DIO blocks and compatibles"
404+ depends on OF_GPIO
405+ depends on SOC_IMX51 || COMPILE_TEST
406+ select GPIO_GENERIC
407+ help
408+ This driver support TS-4800 FPGA GPIO controllers.
409+
383410 config GPIO_TZ1090
384411 bool "Toumaz Xenif TZ1090 GPIO support"
385412 depends on SOC_TZ1090
@@ -433,6 +460,7 @@ config GPIO_XGENE_SB · 47 unmodified lines
433460 tristate "APM X-Gene GPIO standby controller support"
434461 depends on ARCH_XGENE && OF_GPIO
435462 select GPIO_GENERIC
463+ select GPIOLIB_IRQCHIP
436464 help
437465 This driver supports the GPIO block within the APM X-Gene
438466 Standby Domain. Say yes here to enable the GPIO functionality.
@@ -487,6 +515,15 @@ endmenu · 48 unmodified lines
487515 menu "Port-mapped I/O GPIO drivers"
488516 depends on X86 # Unconditional I/O space access
489517
518+config GPIO_104_DIO_48E
519+ tristate "ACCES 104-DIO-48E GPIO support"
520+ select GPIOLIB_IRQCHIP
521+ help
522+ Enables GPIO support for the ACCES 104-DIO-48E family. The base port
523+ address for the device may be configured via the dio_48e_base module
524+ parameter. The interrupt line number for the device may be configured
525+ via the dio_48e_irq module parameter.
526+
490527 config GPIO_104_IDIO_16
491528 tristate "ACCES 104-IDIO-16 GPIO support"
492529 select GPIOLIB_IRQCHIP
@@ -506,10 +543,10 @@ config GPIO_104_IDI_48 · 13 unmodified lines
506543 via the idi_48_irq module parameter.
507544
508545 config GPIO_F7188X
509− tristate "F71869, F71869A, F71882FG and F71889F GPIO support"
546+ tristate "F71869, F71869A, F71882FG, F71889F and F81866 GPIO support"
510547 help
511548 This option enables support for GPIOs found on Fintek Super-I/O
512− chips F71869, F71869A, F71882FG and F71889F.
549+ chips F71869, F71869A, F71882FG, F71889F and F81866.
513550
514551 To compile this driver as a module, choose M here: the module will
515552 be called f7188x-gpio.
@@ -570,6 +607,15 @@ config GPIO_TS5500 · 54 unmodified lines
570607 blocks of the TS-5500: DIO1, DIO2 and the LCD port, and the TS-5600
571608 LCD port.
572609
610+config GPIO_WS16C48
611+ tristate "WinSystems WS16C48 GPIO support"
612+ select GPIOLIB_IRQCHIP
613+ help
614+ Enables GPIO support for the WinSystems WS16C48. The base port address
615+ for the device may be configured via the ws16c48_base module
616+ parameter. The interrupt line number for the device may be configured
617+ via the ws16c48_irq module parameter.
618+
573619 endmenu
574620
575621 menu "I2C GPIO expanders"
@@ -702,6 +748,14 @@ config GPIO_SX150X · 126 unmodified lines
702748 8 bits: sx1508q
703749 16 bits: sx1509q
704750
751+config GPIO_TPIC2810
752+ tristate "TPIC2810 8-Bit I2C GPO expander"
753+ help
754+ Say yes here to enable the GPO driver for the TI TPIC2810 chip.
755+
756+ To compile this driver as a module, choose M here: the module will
757+ be called gpio-tpic2810.
758+
705759 endmenu
706760
707761 menu "MFD GPIO expanders"
@@ -844,6 +898,13 @@ config GPIO_TIMBERDALE · 136 unmodified lines
844898 ---help---
845899 Add support for the GPIO IP in the timberdale FPGA.
846900
901+config GPIO_TPS65218
902+ tristate "TPS65218 GPIO"
903+ depends on MFD_TPS65218
904+ help
905+ Select this option to enable GPIO driver for the TPS65218
906+ chip family.
907+
847908 config GPIO_TPS6586X
848909 bool "TPS6586X GPIO"
849910 depends on MFD_TPS6586X
@@ -860,7 +921,7 @@ config GPIO_TPS65910 · 10 unmodified lines
860921
861922 config GPIO_TPS65912
862923 tristate "TI TPS65912 GPIO"
863− depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI)
924+ depends on MFD_TPS65912
864925 help
865926 This driver supports TPS65912 gpio chip
866927
@@ -1011,6 +1072,12 @@ config GPIO_MC33880 · 144 unmodified lines
10111072 SPI driver for Freescale MC33880 high-side/low-side switch.
10121073 This provides GPIO interface supporting inputs and outputs.
10131074
1075+config GPIO_PISOSR
1076+ tristate "Generic parallel-in/serial-out shift register"
1077+ help
1078+ GPIO driver for SPI compatible parallel-in/serial-out shift
1079+ registers. These are input only devices.
1080+
10141081 endmenu
10151082
10161083 menu "SPI or I2C GPIO expanders"
drivers/gpio/Makefile+8−1
@@ -12,6 +12,7 @@ obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o · 11 unmodified lines
1212 # Device drivers. Generally keep list sorted alphabetically
1313 obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
1414
15+obj-$(CONFIG_GPIO_104_DIO_48E) += gpio-104-dio-48e.o
1516 obj-$(CONFIG_GPIO_104_IDIO_16) += gpio-104-idio-16.o
1617 obj-$(CONFIG_GPIO_104_IDI_48) += gpio-104-idi-48.o
1718 obj-$(CONFIG_GPIO_74X164) += gpio-74x164.o
@@ -23,7 +24,7 @@ obj-$(CONFIG_GPIO_ALTERA) += gpio-altera.o · 5 unmodified lines
2324 obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o
2425 obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o
2526 obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
26−obj-$(CONFIG_ATH79) += gpio-ath79.o
27+obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
2728 obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
2829 obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
2930 obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
@@ -58,6 +59,7 @@ obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o · 28 unmodified lines
5859 obj-$(CONFIG_GPIO_MAX7301) += gpio-max7301.o
5960 obj-$(CONFIG_GPIO_MAX732X) += gpio-max732x.o
6061 obj-$(CONFIG_GPIO_MB86S7X) += gpio-mb86s7x.o
62+obj-$(CONFIG_GPIO_MENZ127) += gpio-menz127.o
6163 obj-$(CONFIG_GPIO_MC33880) += gpio-mc33880.o
6264 obj-$(CONFIG_GPIO_MC9S08DZ60) += gpio-mc9s08dz60.o
6365 obj-$(CONFIG_GPIO_MCP23S08) += gpio-mcp23s08.o
@@ -75,6 +77,7 @@ obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o · 11 unmodified lines
7577 obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o
7678 obj-$(CONFIG_GPIO_PCF857X) += gpio-pcf857x.o
7779 obj-$(CONFIG_GPIO_PCH) += gpio-pch.o
80+obj-$(CONFIG_GPIO_PISOSR) += gpio-pisosr.o
7881 obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
7982 obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
8083 obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o
@@ -95,9 +98,12 @@ obj-$(CONFIG_GPIO_TC3589X) += gpio-tc3589x.o · 14 unmodified lines
9598 obj-$(CONFIG_ARCH_TEGRA) += gpio-tegra.o
9699 obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o
97100 obj-$(CONFIG_GPIO_PALMAS) += gpio-palmas.o
101+obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o
102+obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o
98103 obj-$(CONFIG_GPIO_TPS6586X) += gpio-tps6586x.o
99104 obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o
100105 obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
106+obj-$(CONFIG_GPIO_TS4800) += gpio-ts4800.o
101107 obj-$(CONFIG_GPIO_TS5500) += gpio-ts5500.o
102108 obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
103109 obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o
@@ -111,6 +117,7 @@ obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o · 7 unmodified lines
111117 obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o
112118 obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o
113119 obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o
120+obj-$(CONFIG_GPIO_WS16C48) += gpio-ws16c48.o
114121 obj-$(CONFIG_GPIO_XGENE) += gpio-xgene.o
115122 obj-$(CONFIG_GPIO_XGENE_SB) += gpio-xgene-sb.o
116123 obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o
drivers/gpio/devres.c+1−1
@@ -155,7 +155,7 @@ struct gpio_desc *devm_get_gpiod_from_child(struct device *dev, · 154 unmodified lines
155155 suffixes[i]);
156156
157157 desc = fwnode_get_named_gpiod(child, prop_name);
158− if (!IS_ERR(desc) || (PTR_ERR(desc) == -EPROBE_DEFER))
158+ if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
159159 break;
160160 }
161161 if (IS_ERR(desc)) {
drivers/gpio/gpio-104-dio-48e.c+430−0
@@ -0,0 +1,430 @@
1+/*
2+ * GPIO driver for the ACCES 104-DIO-48E
3+ * Copyright (C) 2016 William Breathitt Gray
4+ *
5+ * This program is free software; you can redistribute it and/or modify
6+ * it under the terms of the GNU General Public License, version 2, as
7+ * published by the Free Software Foundation.
8+ *
9+ * This program is distributed in the hope that it will be useful, but
10+ * WITHOUT ANY WARRANTY; without even the implied warranty of
11+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12+ * General Public License for more details.
13+ */
14+#include <linux/bitops.h>
15+#include <linux/device.h>
16+#include <linux/errno.h>
17+#include <linux/gpio/driver.h>
18+#include <linux/io.h>
19+#include <linux/ioport.h>
20+#include <linux/interrupt.h>
21+#include <linux/irqdesc.h>
22+#include <linux/kernel.h>
23+#include <linux/module.h>
24+#include <linux/moduleparam.h>
25+#include <linux/platform_device.h>
26+#include <linux/spinlock.h>
27+
28+static unsigned dio_48e_base;
29+module_param(dio_48e_base, uint, 0);
30+MODULE_PARM_DESC(dio_48e_base, "ACCES 104-DIO-48E base address");
31+static unsigned dio_48e_irq;
32+module_param(dio_48e_irq, uint, 0);
33+MODULE_PARM_DESC(dio_48e_irq, "ACCES 104-DIO-48E interrupt line number");
34+
35+/**
36+ * struct dio48e_gpio - GPIO device private data structure
37+ * @chip: instance of the gpio_chip
38+ * @io_state: bit I/O state (whether bit is set to input or output)
39+ * @out_state: output bits state
40+ * @control: Control registers state
41+ * @lock: synchronization lock to prevent I/O race conditions
42+ * @base: base port address of the GPIO device
43+ * @irq: Interrupt line number
44+ * @irq_mask: I/O bits affected by interrupts
45+ */
46+struct dio48e_gpio {
47+ struct gpio_chip chip;
48+ unsigned char io_state[6];
49+ unsigned char out_state[6];
50+ unsigned char control[2];
51+ spinlock_t lock;
52+ unsigned base;
53+ unsigned irq;
54+ unsigned char irq_mask;
55+};
56+
57+static int dio48e_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
58+{
59+ struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
60+ const unsigned port = offset / 8;
61+ const unsigned mask = BIT(offset % 8);
62+
63+ return !!(dio48egpio->io_state[port] & mask);
64+}
65+
66+static int dio48e_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
67+{
68+ struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
69+ const unsigned io_port = offset / 8;
70+ const unsigned control_port = io_port / 2;
71+ const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
72+ unsigned long flags;
73+ unsigned control;
74+
75+ spin_lock_irqsave(&dio48egpio->lock, flags);
76+
77+ /* Check if configuring Port C */
78+ if (io_port == 2 || io_port == 5) {
79+ /* Port C can be configured by nibble */
80+ if (offset % 8 > 3) {
81+ dio48egpio->io_state[io_port] |= 0xF0;
82+ dio48egpio->control[control_port] |= BIT(3);
83+ } else {
84+ dio48egpio->io_state[io_port] |= 0x0F;
85+ dio48egpio->control[control_port] |= BIT(0);
86+ }
87+ } else {
88+ dio48egpio->io_state[io_port] |= 0xFF;
89+ if (io_port == 0 || io_port == 3)
90+ dio48egpio->control[control_port] |= BIT(4);
91+ else
92+ dio48egpio->control[control_port] |= BIT(1);
93+ }
94+
95+ control = BIT(7) | dio48egpio->control[control_port];
96+ outb(control, control_addr);
97+ control &= ~BIT(7);
98+ outb(control, control_addr);
99+
100+ spin_unlock_irqrestore(&dio48egpio->lock, flags);
101+
102+ return 0;
103+}
104+
105+static int dio48e_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
106+ int value)
107+{
108+ struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
109+ const unsigned io_port = offset / 8;
110+ const unsigned control_port = io_port / 2;
111+ const unsigned mask = BIT(offset % 8);
112+ const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
113+ const unsigned out_port = (io_port > 2) ? io_port + 1 : io_port;
114+ unsigned long flags;
115+ unsigned control;
116+
117+ spin_lock_irqsave(&dio48egpio->lock, flags);
118+
119+ /* Check if configuring Port C */
120+ if (io_port == 2 || io_port == 5) {
121+ /* Port C can be configured by nibble */
122+ if (offset % 8 > 3) {
123+ dio48egpio->io_state[io_port] &= 0x0F;
124+ dio48egpio->control[control_port] &= ~BIT(3);
125+ } else {
126+ dio48egpio->io_state[io_port] &= 0xF0;
127+ dio48egpio->control[control_port] &= ~BIT(0);
128+ }
129+ } else {
130+ dio48egpio->io_state[io_port] &= 0x00;
131+ if (io_port == 0 || io_port == 3)
132+ dio48egpio->control[control_port] &= ~BIT(4);
133+ else
134+ dio48egpio->control[control_port] &= ~BIT(1);
135+ }
136+
137+ if (value)
138+ dio48egpio->out_state[io_port] |= mask;
139+ else
140+ dio48egpio->out_state[io_port] &= ~mask;
141+
142+ control = BIT(7) | dio48egpio->control[control_port];
143+ outb(control, control_addr);
144+
145+ outb(dio48egpio->out_state[io_port], dio48egpio->base + out_port);
146+
147+ control &= ~BIT(7);
148+ outb(control, control_addr);
149+
150+ spin_unlock_irqrestore(&dio48egpio->lock, flags);
151+
152+ return 0;
153+}
154+
155+static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset)
156+{
157+ struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
158+ const unsigned port = offset / 8;
159+ const unsigned mask = BIT(offset % 8);
160+ const unsigned in_port = (port > 2) ? port + 1 : port;
161+ unsigned long flags;
162+ unsigned port_state;
163+
164+ spin_lock_irqsave(&dio48egpio->lock, flags);
165+
166+ /* ensure that GPIO is set for input */
167+ if (!(dio48egpio->io_state[port] & mask)) {
168+ spin_unlock_irqrestore(&dio48egpio->lock, flags);
169+ return -EINVAL;
170+ }
171+
172+ port_state = inb(dio48egpio->base + in_port);
173+
174+ spin_unlock_irqrestore(&dio48egpio->lock, flags);
175+
176+ return !!(port_state & mask);
177+}
178+
179+static void dio48e_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
180+{
181+ struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
182+ const unsigned port = offset / 8;
183+ const unsigned mask = BIT(offset % 8);
184+ const unsigned out_port = (port > 2) ? port + 1 : port;
185+ unsigned long flags;
186+
187+ spin_lock_irqsave(&dio48egpio->lock, flags);
188+
189+ if (value)
190+ dio48egpio->out_state[port] |= mask;
191+ else
192+ dio48egpio->out_state[port] &= ~mask;
193+
194+ outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
195+
196+ spin_unlock_irqrestore(&dio48egpio->lock, flags);
197+}
198+
199+static void dio48e_irq_ack(struct irq_data *data)
200+{
201+}
202+
203+static void dio48e_irq_mask(struct irq_data *data)
204+{
205+ struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
206+ struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
207+ const unsigned long offset = irqd_to_hwirq(data);
208+ unsigned long flags;
209+
210+ /* only bit 3 on each respective Port C supports interrupts */
211+ if (offset != 19 && offset != 43)
212+ return;
213+
214+ spin_lock_irqsave(&dio48egpio->lock, flags);
215+
216+ if (offset == 19)
217+ dio48egpio->irq_mask &= ~BIT(0);
218+ else
219+ dio48egpio->irq_mask &= ~BIT(1);
220+
221+ if (!dio48egpio->irq_mask)
222+ /* disable interrupts */
223+ inb(dio48egpio->base + 0xB);
224+
225+ spin_unlock_irqrestore(&dio48egpio->lock, flags);
226+}
227+
228+static void dio48e_irq_unmask(struct irq_data *data)
229+{
230+ struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
231+ struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
232+ const unsigned long offset = irqd_to_hwirq(data);
233+ unsigned long flags;
234+
235+ /* only bit 3 on each respective Port C supports interrupts */
236+ if (offset != 19 && offset != 43)
237+ return;
238+
239+ spin_lock_irqsave(&dio48egpio->lock, flags);
240+
241+ if (!dio48egpio->irq_mask) {
242+ /* enable interrupts */
243+ outb(0x00, dio48egpio->base + 0xF);
244+ outb(0x00, dio48egpio->base + 0xB);
245+ }
246+
247+ if (offset == 19)
248+ dio48egpio->irq_mask |= BIT(0);
249+ else
250+ dio48egpio->irq_mask |= BIT(1);
251+
252+ spin_unlock_irqrestore(&dio48egpio->lock, flags);
253+}
254+
255+static int dio48e_irq_set_type(struct irq_data *data, unsigned flow_type)
256+{
257+ const unsigned long offset = irqd_to_hwirq(data);
258+
259+ /* only bit 3 on each respective Port C supports interrupts */
260+ if (offset != 19 && offset != 43)
261+ return -EINVAL;
262+
263+ if (flow_type != IRQ_TYPE_NONE && flow_type != IRQ_TYPE_EDGE_RISING)
264+ return -EINVAL;
265+
266+ return 0;
267+}
268+
269+static struct irq_chip dio48e_irqchip = {
270+ .name = "104-dio-48e",
271+ .irq_ack = dio48e_irq_ack,
272+ .irq_mask = dio48e_irq_mask,
273+ .irq_unmask = dio48e_irq_unmask,
274+ .irq_set_type = dio48e_irq_set_type
275+};
276+
277+static irqreturn_t dio48e_irq_handler(int irq, void *dev_id)
278+{
279+ struct dio48e_gpio *const dio48egpio = dev_id;
280+ struct gpio_chip *const chip = &dio48egpio->chip;
281+ const unsigned long irq_mask = dio48egpio->irq_mask;
282+ unsigned long gpio;
283+
284+ for_each_set_bit(gpio, &irq_mask, 2)
285+ generic_handle_irq(irq_find_mapping(chip->irqdomain,
286+ 19 + gpio*24));
287+
288+ spin_lock(&dio48egpio->lock);
289+
290+ outb(0x00, dio48egpio->base + 0xF);
291+
292+ spin_unlock(&dio48egpio->lock);
293+
294+ return IRQ_HANDLED;
295+}
296+
297+static int __init dio48e_probe(struct platform_device *pdev)
298+{
299+ struct device *dev = &pdev->dev;
300+ struct dio48e_gpio *dio48egpio;
301+ const unsigned base = dio_48e_base;
302+ const unsigned extent = 16;
303+ const char *const name = dev_name(dev);
304+ int err;
305+ const unsigned irq = dio_48e_irq;
306+
307+ dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL);
308+ if (!dio48egpio)
309+ return -ENOMEM;
310+
311+ if (!devm_request_region(dev, base, extent, name)) {
312+ dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
313+ base, base + extent);
314+ return -EBUSY;
315+ }
316+
317+ dio48egpio->chip.label = name;
318+ dio48egpio->chip.parent = dev;
319+ dio48egpio->chip.owner = THIS_MODULE;
320+ dio48egpio->chip.base = -1;
321+ dio48egpio->chip.ngpio = 48;
322+ dio48egpio->chip.get_direction = dio48e_gpio_get_direction;
323+ dio48egpio->chip.direction_input = dio48e_gpio_direction_input;
324+ dio48egpio->chip.direction_output = dio48e_gpio_direction_output;
325+ dio48egpio->chip.get = dio48e_gpio_get;
326+ dio48egpio->chip.set = dio48e_gpio_set;
327+ dio48egpio->base = base;
328+ dio48egpio->irq = irq;
329+
330+ spin_lock_init(&dio48egpio->lock);
331+
332+ dev_set_drvdata(dev, dio48egpio);
333+
334+ err = gpiochip_add_data(&dio48egpio->chip, dio48egpio);
335+ if (err) {
336+ dev_err(dev, "GPIO registering failed (%d)\n", err);
337+ return err;
338+ }
339+
340+ /* initialize all GPIO as output */
341+ outb(0x80, base + 3);
342+ outb(0x00, base);
343+ outb(0x00, base + 1);
344+ outb(0x00, base + 2);
345+ outb(0x00, base + 3);
346+ outb(0x80, base + 7);
347+ outb(0x00, base + 4);
348+ outb(0x00, base + 5);
349+ outb(0x00, base + 6);
350+ outb(0x00, base + 7);
351+
352+ /* disable IRQ by default */
353+ inb(base + 0xB);
354+
355+ err = gpiochip_irqchip_add(&dio48egpio->chip, &dio48e_irqchip, 0,
356+ handle_edge_irq, IRQ_TYPE_NONE);
357+ if (err) {
358+ dev_err(dev, "Could not add irqchip (%d)\n", err);
359+ goto err_gpiochip_remove;
360+ }
361+
362+ err = request_irq(irq, dio48e_irq_handler, 0, name, dio48egpio);
363+ if (err) {
364+ dev_err(dev, "IRQ handler registering failed (%d)\n", err);
365+ goto err_gpiochip_remove;
366+ }
367+
368+ return 0;
369+
370+err_gpiochip_remove:
371+ gpiochip_remove(&dio48egpio->chip);
372+ return err;
373+}
374+
375+static int dio48e_remove(struct platform_device *pdev)
376+{
377+ struct dio48e_gpio *const dio48egpio = platform_get_drvdata(pdev);
378+
379+ free_irq(dio48egpio->irq, dio48egpio);
380+ gpiochip_remove(&dio48egpio->chip);
381+
382+ return 0;
383+}
384+
385+static struct platform_device *dio48e_device;
386+
387+static struct platform_driver dio48e_driver = {
388+ .driver = {
389+ .name = "104-dio-48e"
390+ },
391+ .remove = dio48e_remove
392+};
393+
394+static void __exit dio48e_exit(void)
395+{
396+ platform_device_unregister(dio48e_device);
397+ platform_driver_unregister(&dio48e_driver);
398+}
399+
400+static int __init dio48e_init(void)
401+{
402+ int err;
403+
404+ dio48e_device = platform_device_alloc(dio48e_driver.driver.name, -1);
405+ if (!dio48e_device)
406+ return -ENOMEM;
407+
408+ err = platform_device_add(dio48e_device);
409+ if (err)
410+ goto err_platform_device;
411+
412+ err = platform_driver_probe(&dio48e_driver, dio48e_probe);
413+ if (err)
414+ goto err_platform_driver;
415+
416+ return 0;
417+
418+err_platform_driver:
419+ platform_device_del(dio48e_device);
420+err_platform_device:
421+ platform_device_put(dio48e_device);
422+ return err;
423+}
424+
425+module_init(dio48e_init);
426+module_exit(dio48e_exit);
427+
428+MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
429+MODULE_DESCRIPTION("ACCES 104-DIO-48E GPIO driver");
430+MODULE_LICENSE("GPL v2");
drivers/gpio/gpio-104-idi-48.c+11−19
@@ -39,7 +39,6 @@ MODULE_PARM_DESC(idi_48_irq, "ACCES 104-IDI-48 interrupt line number"); · 38 unmodified lines
3939 * @ack_lock: synchronization lock to prevent IRQ handler race conditions
4040 * @irq_mask: input bits affected by interrupts
4141 * @base: base port address of the GPIO device
42− * @extent: extent of port address region of the GPIO device
4342 * @irq: Interrupt line number
4443 * @cos_enb: Change-Of-State IRQ enable boundaries mask
4544 */
@@ -49,7 +48,6 @@ struct idi_48_gpio { · 3 unmodified lines
4948 spinlock_t ack_lock;
5049 unsigned char irq_mask[6];
5150 unsigned base;
52− unsigned extent;
5351 unsigned irq;
5452 unsigned char cos_enb;
5553 };
@@ -227,11 +225,10 @@ static int __init idi_48_probe(struct platform_device *pdev) · 171 unmodified lines
227225 if (!idi48gpio)
228226 return -ENOMEM;
229227
230− if (!request_region(base, extent, name)) {
231− dev_err(dev, "Unable to lock %s port addresses (0x%X-0x%X)\n",
232− name, base, base + extent);
233− err = -EBUSY;
234− goto err_lock_io_port;
228+ if (!devm_request_region(dev, base, extent, name)) {
229+ dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
230+ base, base + extent);
231+ return -EBUSY;
235232 }
236233
237234 idi48gpio->chip.label = name;
@@ -243,7 +240,6 @@ static int __init idi_48_probe(struct platform_device *pdev) · 5 unmodified lines
243240 idi48gpio->chip.direction_input = idi_48_gpio_direction_input;
244241 idi48gpio->chip.get = idi_48_gpio_get;
245242 idi48gpio->base = base;
246− idi48gpio->extent = extent;
247243 idi48gpio->irq = irq;
248244
249245 spin_lock_init(&idi48gpio->lock);
@@ -253,7 +249,7 @@ static int __init idi_48_probe(struct platform_device *pdev) · 3 unmodified lines
253249 err = gpiochip_add_data(&idi48gpio->chip, idi48gpio);
254250 if (err) {
255251 dev_err(dev, "GPIO registering failed (%d)\n", err);
256− goto err_gpio_register;
252+ return err;
257253 }
258254
259255 /* Disable IRQ by default */
@@ -264,23 +260,20 @@ static int __init idi_48_probe(struct platform_device *pdev) · 4 unmodified lines
264260 handle_edge_irq, IRQ_TYPE_NONE);
265261 if (err) {
266262 dev_err(dev, "Could not add irqchip (%d)\n", err);
267− goto err_gpiochip_irqchip_add;
263+ goto err_gpiochip_remove;
268264 }
269265
270− err = request_irq(irq, idi_48_irq_handler, 0, name, idi48gpio);
266+ err = request_irq(irq, idi_48_irq_handler, IRQF_SHARED, name,
267+ idi48gpio);
271268 if (err) {
272269 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
273− goto err_request_irq;
270+ goto err_gpiochip_remove;
274271 }
275272
276273 return 0;
277274
278−err_request_irq:
279−err_gpiochip_irqchip_add:
275+err_gpiochip_remove:
280276 gpiochip_remove(&idi48gpio->chip);
281−err_gpio_register:
282− release_region(base, extent);
283−err_lock_io_port:
284277 return err;
285278 }
286279
@@ -290,7 +283,6 @@ static int idi_48_remove(struct platform_device *pdev) · 3 unmodified lines
290283
291284 free_irq(idi48gpio->irq, idi48gpio);
292285 gpiochip_remove(&idi48gpio->chip);
293− release_region(idi48gpio->base, idi48gpio->extent);
294286
295287 return 0;
296288 }
@@ -340,4 +332,4 @@ module_exit(idi_48_exit); · 43 unmodified lines
340332
341333 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
342334 MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver");
343−MODULE_LICENSE("GPL");
335+MODULE_LICENSE("GPL v2");
drivers/gpio/gpio-104-idio-16.c+9−18
@@ -38,7 +38,6 @@ MODULE_PARM_DESC(idio_16_irq, "ACCES 104-IDIO-16 interrupt line number"); · 37 unmodified lines
3838 * @lock: synchronization lock to prevent I/O race conditions
3939 * @irq_mask: I/O bits affected by interrupts
4040 * @base: base port address of the GPIO device
41− * @extent: extent of port address region of the GPIO device
4241 * @irq: Interrupt line number
4342 * @out_state: output bits state
4443 */
@@ -47,7 +46,6 @@ struct idio_16_gpio { · 2 unmodified lines
4746 spinlock_t lock;
4847 unsigned long irq_mask;
4948 unsigned base;
50− unsigned extent;
5149 unsigned irq;
5250 unsigned out_state;
5351 };
@@ -201,11 +199,10 @@ static int __init idio_16_probe(struct platform_device *pdev) · 147 unmodified lines
201199 if (!idio16gpio)
202200 return -ENOMEM;
203201
204− if (!request_region(base, extent, name)) {
205− dev_err(dev, "Unable to lock %s port addresses (0x%X-0x%X)\n",
206− name, base, base + extent);
207− err = -EBUSY;
208− goto err_lock_io_port;
202+ if (!devm_request_region(dev, base, extent, name)) {
203+ dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
204+ base, base + extent);
205+ return -EBUSY;
209206 }
210207
211208 idio16gpio->chip.label = name;
@@ -219,7 +216,6 @@ static int __init idio_16_probe(struct platform_device *pdev) · 7 unmodified lines
219216 idio16gpio->chip.get = idio_16_gpio_get;
220217 idio16gpio->chip.set = idio_16_gpio_set;
221218 idio16gpio->base = base;
222− idio16gpio->extent = extent;
223219 idio16gpio->irq = irq;
224220 idio16gpio->out_state = 0xFFFF;
225221
@@ -230,7 +226,7 @@ static int __init idio_16_probe(struct platform_device *pdev) · 4 unmodified lines
230226 err = gpiochip_add_data(&idio16gpio->chip, idio16gpio);
231227 if (err) {
232228 dev_err(dev, "GPIO registering failed (%d)\n", err);
233− goto err_gpio_register;
229+ return err;
234230 }
235231
236232 /* Disable IRQ by default */
@@ -241,23 +237,19 @@ static int __init idio_16_probe(struct platform_device *pdev) · 4 unmodified lines
241237 handle_edge_irq, IRQ_TYPE_NONE);
242238 if (err) {
243239 dev_err(dev, "Could not add irqchip (%d)\n", err);
244− goto err_gpiochip_irqchip_add;
240+ goto err_gpiochip_remove;
245241 }
246242
247243 err = request_irq(irq, idio_16_irq_handler, 0, name, idio16gpio);
248244 if (err) {
249245 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
250− goto err_request_irq;
246+ goto err_gpiochip_remove;
251247 }
252248
253249 return 0;
254250
255−err_request_irq:
256−err_gpiochip_irqchip_add:
251+err_gpiochip_remove:
257252 gpiochip_remove(&idio16gpio->chip);
258−err_gpio_register:
259− release_region(base, extent);
260−err_lock_io_port:
261253 return err;
262254 }
263255
@@ -267,7 +259,6 @@ static int idio_16_remove(struct platform_device *pdev) · 3 unmodified lines
267259
268260 free_irq(idio16gpio->irq, idio16gpio);
269261 gpiochip_remove(&idio16gpio->chip);
270− release_region(idio16gpio->base, idio16gpio->extent);
271262
272263 return 0;
273264 }
@@ -317,4 +308,4 @@ module_exit(idio_16_exit); · 43 unmodified lines
317308
318309 MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
319310 MODULE_DESCRIPTION("ACCES 104-IDIO-16 GPIO driver");
320−MODULE_LICENSE("GPL");
311+MODULE_LICENSE("GPL v2");
drivers/gpio/gpio-74xx-mmio.c+1−10
@@ -140,15 +140,7 @@ static int mmio_74xx_gpio_probe(struct platform_device *pdev) · 139 unmodified lines
140140
141141 platform_set_drvdata(pdev, priv);
142142
143− return gpiochip_add_data(&priv->gc, priv);
144−}
145−
146−static int mmio_74xx_gpio_remove(struct platform_device *pdev)
147−{
148− struct mmio_74xx_gpio_priv *priv = platform_get_drvdata(pdev);
149−
150− gpiochip_remove(&priv->gc);
151− return 0;
143+ return devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
152144 }
153145
154146 static struct platform_driver mmio_74xx_gpio_driver = {
@@ -157,7 +149,6 @@ static struct platform_driver mmio_74xx_gpio_driver = { · 2 unmodified lines
157149 .of_match_table = mmio_74xx_gpio_ids,
158150 },
159151 .probe = mmio_74xx_gpio_probe,
160− .remove = mmio_74xx_gpio_remove,
161152 };
162153 module_platform_driver(mmio_74xx_gpio_driver);
163154
drivers/gpio/gpio-adnp.c+1−10
@@ -265,7 +265,7 @@ static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios) · 264 unmodified lines
265265 chip->of_node = chip->parent->of_node;
266266 chip->owner = THIS_MODULE;
267267
268− err = gpiochip_add_data(chip, adnp);
268+ err = devm_gpiochip_add_data(&adnp->client->dev, chip, adnp);
269269 if (err)
270270 return err;
271271
@@ -520,14 +520,6 @@ static int adnp_i2c_probe(struct i2c_client *client, · 248 unmodified lines
520520 return 0;
521521 }
522522
523−static int adnp_i2c_remove(struct i2c_client *client)
524−{
525− struct adnp *adnp = i2c_get_clientdata(client);
526−
527− gpiochip_remove(&adnp->gpio);
528− return 0;
529−}
530−
531523 static const struct i2c_device_id adnp_i2c_id[] = {
532524 { "gpio-adnp" },
533525 { },
@@ -546,7 +538,6 @@ static struct i2c_driver adnp_i2c_driver = { · 12 unmodified lines
546538 .of_match_table = adnp_of_match,
547539 },
548540 .probe = adnp_i2c_probe,
549− .remove = adnp_i2c_remove,
550541 .id_table = adnp_i2c_id,
551542 };
552543 module_i2c_driver(adnp_i2c_driver);
drivers/gpio/gpio-adp5520.c+1−12
@@ -153,7 +153,7 @@ static int adp5520_gpio_probe(struct platform_device *pdev) · 152 unmodified lines
153153 goto err;
154154 }
155155
156− ret = gpiochip_add_data(&dev->gpio_chip, dev);
156+ ret = devm_gpiochip_add_data(&pdev->dev, &dev->gpio_chip, dev);
157157 if (ret)
158158 goto err;
159159
@@ -164,22 +164,11 @@ err: · 4 unmodified lines
164164 return ret;
165165 }
166166
167−static int adp5520_gpio_remove(struct platform_device *pdev)
168−{
169− struct adp5520_gpio *dev;
170−
171− dev = platform_get_drvdata(pdev);
172− gpiochip_remove(&dev->gpio_chip);
173−
174− return 0;
175−}
176−
177167 static struct platform_driver adp5520_gpio_driver = {
178168 .driver = {
179169 .name = "adp5520-gpio",
180170 },
181171 .probe = adp5520_gpio_probe,
182− .remove = adp5520_gpio_remove,
183172 };
184173
185174 module_platform_driver(adp5520_gpio_driver);
drivers/gpio/gpio-adp5588.c+1−3
@@ -414,7 +414,7 @@ static int adp5588_gpio_probe(struct i2c_client *client, · 413 unmodified lines
414414 }
415415 }
416416
417− ret = gpiochip_add_data(&dev->gpio_chip, dev);
417+ ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
418418 if (ret)
419419 goto err_irq;
420420
@@ -457,8 +457,6 @@ static int adp5588_gpio_remove(struct i2c_client *client) · 36 unmodified lines
457457 if (dev->irq_base)
458458 free_irq(dev->client->irq, dev);
459459
460− gpiochip_remove(&dev->gpio_chip);
461−
462460 return 0;
463461 }
464462
drivers/gpio/gpio-amd8111.c+3−4
@@ -25,6 +25,7 @@ · 24 unmodified lines
2525 * License version 2. This program is licensed "as is" without any
2626 * warranty of any kind, whether express or implied.
2727 */
28+#include <linux/ioport.h>
2829 #include <linux/module.h>
2930 #include <linux/kernel.h>
3031 #include <linux/gpio.h>
@@ -204,7 +205,8 @@ found: · 173 unmodified lines
204205 gp.pmbase &= 0x0000FF00;
205206 if (gp.pmbase == 0)
206207 goto out;
207− if (!request_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE, "AMD GPIO")) {
208+ if (!devm_request_region(&pdev->dev, gp.pmbase + PMBASE_OFFSET,
209+ PMBASE_SIZE, "AMD GPIO")) {
208210 dev_err(&pdev->dev, "AMD GPIO region 0x%x already in use!\n",
209211 gp.pmbase + PMBASE_OFFSET);
210212 err = -EBUSY;
@@ -213,7 +215,6 @@ found: · 2 unmodified lines
213215 gp.pm = ioport_map(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);
214216 if (!gp.pm) {
215217 dev_err(&pdev->dev, "Couldn't map io port into io memory\n");
216− release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);
217218 err = -ENOMEM;
218219 goto out;
219220 }
@@ -228,7 +229,6 @@ found: · 8 unmodified lines
228229 printk(KERN_ERR "GPIO registering failed (%d)\n",
229230 err);
230231 ioport_unmap(gp.pm);
231− release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);
232232 goto out;
233233 }
234234 out:
@@ -239,7 +239,6 @@ static void __exit amd_gpio_exit(void) · 4 unmodified lines
239239 {
240240 gpiochip_remove(&gp.chip);
241241 ioport_unmap(gp.pm);
242− release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);
243242 }
244243
245244 module_init(amd_gpio_init);
drivers/gpio/gpio-arizona.c+2−10
@@ -132,7 +132,8 @@ static int arizona_gpio_probe(struct platform_device *pdev) · 131 unmodified lines
132132 else
133133 arizona_gpio->gpio_chip.base = -1;
134134
135− ret = gpiochip_add_data(&arizona_gpio->gpio_chip, arizona_gpio);
135+ ret = devm_gpiochip_add_data(&pdev->dev, &arizona_gpio->gpio_chip,
136+ arizona_gpio);
136137 if (ret < 0) {
137138 dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
138139 ret);
@@ -147,18 +148,9 @@ err: · 8 unmodified lines
147148 return ret;
148149 }
149150
150−static int arizona_gpio_remove(struct platform_device *pdev)
151−{
152− struct arizona_gpio *arizona_gpio = platform_get_drvdata(pdev);
153−
154− gpiochip_remove(&arizona_gpio->gpio_chip);
155− return 0;
156−}
157−
158151 static struct platform_driver arizona_gpio_driver = {
159152 .driver.name = "arizona-gpio",
160153 .probe = arizona_gpio_probe,
161− .remove = arizona_gpio_remove,
162154 };
163155
164156 module_platform_driver(arizona_gpio_driver);
drivers/gpio/gpio-ath79.c+192−72
@@ -1,12 +1,11 @@
11 /*
22 * Atheros AR71XX/AR724X/AR913X GPIO API support
33 *
4+ * Copyright (C) 2015 Alban Bedel <albeu@free.fr>
45 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
56 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
67 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
78 *
8− * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
9− *
109 * This program is free software; you can redistribute it and/or modify it
1110 * under the terms of the GNU General Public License version 2 as published
1211 * by the Free Software Foundation.
@@ -15,118 +14,204 @@ · 2 unmodified lines
1514 #include <linux/gpio/driver.h>
1615 #include <linux/platform_data/gpio-ath79.h>
1716 #include <linux/of_device.h>
17+#include <linux/interrupt.h>
18+#include <linux/irq.h>
19+
20+#define AR71XX_GPIO_REG_OE 0x00
21+#define AR71XX_GPIO_REG_IN 0x04
22+#define AR71XX_GPIO_REG_SET 0x0c
23+#define AR71XX_GPIO_REG_CLEAR 0x10
1824
19−#include <asm/mach-ath79/ar71xx_regs.h>
25+#define AR71XX_GPIO_REG_INT_ENABLE 0x14
26+#define AR71XX_GPIO_REG_INT_TYPE 0x18
27+#define AR71XX_GPIO_REG_INT_POLARITY 0x1c
28+#define AR71XX_GPIO_REG_INT_PENDING 0x20
29+#define AR71XX_GPIO_REG_INT_MASK 0x24
2030
2131 struct ath79_gpio_ctrl {
22− struct gpio_chip chip;
32+ struct gpio_chip gc;
2333 void __iomem *base;
2434 spinlock_t lock;
35+ unsigned long both_edges;
2536 };
2637
27−static void ath79_gpio_set_value(struct gpio_chip *chip,
28− unsigned gpio, int value)
38+static struct ath79_gpio_ctrl *irq_data_to_ath79_gpio(struct irq_data *data)
2939 {
30− struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip);
40+ struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
3141
32− if (value)
33− __raw_writel(BIT(gpio), ctrl->base + AR71XX_GPIO_REG_SET);
34− else
35− __raw_writel(BIT(gpio), ctrl->base + AR71XX_GPIO_REG_CLEAR);
42+ return container_of(gc, struct ath79_gpio_ctrl, gc);
3643 }
3744
38−static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
45+static u32 ath79_gpio_read(struct ath79_gpio_ctrl *ctrl, unsigned reg)
3946 {
40− struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip);
47+ return readl(ctrl->base + reg);
48+}
4149
42− return (__raw_readl(ctrl->base + AR71XX_GPIO_REG_IN) >> gpio) & 1;
50+static void ath79_gpio_write(struct ath79_gpio_ctrl *ctrl,
51+ unsigned reg, u32 val)
52+{
53+ return writel(val, ctrl->base + reg);
4354 }
4455
45−static int ath79_gpio_direction_input(struct gpio_chip *chip,
46− unsigned offset)
56+static bool ath79_gpio_update_bits(
57+ struct ath79_gpio_ctrl *ctrl, unsigned reg, u32 mask, u32 bits)
4758 {
48− struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip);
59+ u32 old_val, new_val;
60+
61+ old_val = ath79_gpio_read(ctrl, reg);
62+ new_val = (old_val & ~mask) | (bits & mask);
63+
64+ if (new_val != old_val)
65+ ath79_gpio_write(ctrl, reg, new_val);
66+
67+ return new_val != old_val;
68+}
69+
70+static void ath79_gpio_irq_unmask(struct irq_data *data)
71+{
72+ struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data);
73+ u32 mask = BIT(irqd_to_hwirq(data));
4974 unsigned long flags;
5075
5176 spin_lock_irqsave(&ctrl->lock, flags);
77+ ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask);
78+ spin_unlock_irqrestore(&ctrl->lock, flags);
79+}
5280
53− __raw_writel(
54− __raw_readl(ctrl->base + AR71XX_GPIO_REG_OE) & ~BIT(offset),
55− ctrl->base + AR71XX_GPIO_REG_OE);
81+static void ath79_gpio_irq_mask(struct irq_data *data)
82+{
83+ struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data);
84+ u32 mask = BIT(irqd_to_hwirq(data));
85+ unsigned long flags;
5686
87+ spin_lock_irqsave(&ctrl->lock, flags);
88+ ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0);
5789 spin_unlock_irqrestore(&ctrl->lock, flags);
58−
59− return 0;
6090 }
6191
62−static int ath79_gpio_direction_output(struct gpio_chip *chip,
63− unsigned offset, int value)
92+static void ath79_gpio_irq_enable(struct irq_data *data)
6493 {
65− struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip);
94+ struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data);
95+ u32 mask = BIT(irqd_to_hwirq(data));
6696 unsigned long flags;
6797
6898 spin_lock_irqsave(&ctrl->lock, flags);
99+ ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, mask);
100+ ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask);
101+ spin_unlock_irqrestore(&ctrl->lock, flags);
102+}
69103
70− if (value)
71− __raw_writel(BIT(offset), ctrl->base + AR71XX_GPIO_REG_SET);
72− else
73− __raw_writel(BIT(offset), ctrl->base + AR71XX_GPIO_REG_CLEAR);
74−
75− __raw_writel(
76− __raw_readl(ctrl->base + AR71XX_GPIO_REG_OE) | BIT(offset),
77− ctrl->base + AR71XX_GPIO_REG_OE);
104+static void ath79_gpio_irq_disable(struct irq_data *data)
105+{
106+ struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data);
107+ u32 mask = BIT(irqd_to_hwirq(data));
108+ unsigned long flags;
78109
110+ spin_lock_irqsave(&ctrl->lock, flags);
111+ ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0);
112+ ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, 0);
79113 spin_unlock_irqrestore(&ctrl->lock, flags);
80−
81− return 0;
82114 }
83115
84−static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
116+static int ath79_gpio_irq_set_type(struct irq_data *data,
117+ unsigned int flow_type)
85118 {
86− struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip);
119+ struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data);
120+ u32 mask = BIT(irqd_to_hwirq(data));
121+ u32 type = 0, polarity = 0;
87122 unsigned long flags;
123+ bool disabled;
124+
125+ switch (flow_type) {
126+ case IRQ_TYPE_EDGE_RISING:
127+ polarity |= mask;
128+ case IRQ_TYPE_EDGE_FALLING:
129+ case IRQ_TYPE_EDGE_BOTH:
130+ break;
131+
132+ case IRQ_TYPE_LEVEL_HIGH:
133+ polarity |= mask;
134+ case IRQ_TYPE_LEVEL_LOW:
135+ type |= mask;
136+ break;
137+
138+ default:
139+ return -EINVAL;
140+ }
88141
89142 spin_lock_irqsave(&ctrl->lock, flags);
90143
91− __raw_writel(
92− __raw_readl(ctrl->base + AR71XX_GPIO_REG_OE) | BIT(offset),
93− ctrl->base + AR71XX_GPIO_REG_OE);
144+ if (flow_type == IRQ_TYPE_EDGE_BOTH) {
145+ ctrl->both_edges |= mask;
146+ polarity = ~ath79_gpio_read(ctrl, AR71XX_GPIO_REG_IN);
147+ } else {
148+ ctrl->both_edges &= ~mask;
149+ }
150+
151+ /* As the IRQ configuration can't be loaded atomically we
152+ * have to disable the interrupt while the configuration state
153+ * is invalid.
154+ */
155+ disabled = ath79_gpio_update_bits(
156+ ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, 0);
157+
158+ ath79_gpio_update_bits(
159+ ctrl, AR71XX_GPIO_REG_INT_TYPE, mask, type);
160+ ath79_gpio_update_bits(
161+ ctrl, AR71XX_GPIO_REG_INT_POLARITY, mask, polarity);
162+
163+ if (disabled)
164+ ath79_gpio_update_bits(
165+ ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, mask);
94166
95167 spin_unlock_irqrestore(&ctrl->lock, flags);
96168
97169 return 0;
98170 }
99171
100−static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
101− int value)
172+static struct irq_chip ath79_gpio_irqchip = {
173+ .name = "gpio-ath79",
174+ .irq_enable = ath79_gpio_irq_enable,
175+ .irq_disable = ath79_gpio_irq_disable,
176+ .irq_mask = ath79_gpio_irq_mask,
177+ .irq_unmask = ath79_gpio_irq_unmask,
178+ .irq_set_type = ath79_gpio_irq_set_type,
179+};
180+
181+static void ath79_gpio_irq_handler(struct irq_desc *desc)
102182 {
103− struct ath79_gpio_ctrl *ctrl = gpiochip_get_data(chip);
104− unsigned long flags;
183+ struct gpio_chip *gc = irq_desc_get_handler_data(desc);
184+ struct irq_chip *irqchip = irq_desc_get_chip(desc);
185+ struct ath79_gpio_ctrl *ctrl =
186+ container_of(gc, struct ath79_gpio_ctrl, gc);
187+ unsigned long flags, pending;
188+ u32 both_edges, state;
189+ int irq;
190+
191+ chained_irq_enter(irqchip, desc);
105192
106193 spin_lock_irqsave(&ctrl->lock, flags);
107194
108− if (value)
109− __raw_writel(BIT(offset), ctrl->base + AR71XX_GPIO_REG_SET);
110− else
111− __raw_writel(BIT(offset), ctrl->base + AR71XX_GPIO_REG_CLEAR);
195+ pending = ath79_gpio_read(ctrl, AR71XX_GPIO_REG_INT_PENDING);
112196
113− __raw_writel(
114− __raw_readl(ctrl->base + AR71XX_GPIO_REG_OE) & ~BIT(offset),
115− ctrl->base + AR71XX_GPIO_REG_OE);
197+ /* Update the polarity of the both edges irqs */
198+ both_edges = ctrl->both_edges & pending;
199+ if (both_edges) {
200+ state = ath79_gpio_read(ctrl, AR71XX_GPIO_REG_IN);
201+ ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_POLARITY,
202+ both_edges, ~state);
203+ }
116204
117205 spin_unlock_irqrestore(&ctrl->lock, flags);
118206
119− return 0;
120−}
207+ if (pending) {
208+ for_each_set_bit(irq, &pending, gc->ngpio)
209+ generic_handle_irq(
210+ irq_linear_revmap(gc->irqdomain, irq));
211+ }
121212
122−static const struct gpio_chip ath79_gpio_chip = {
123− .label = "ath79",
124− .get = ath79_gpio_get_value,
125− .set = ath79_gpio_set_value,
126− .direction_input = ath79_gpio_direction_input,
127− .direction_output = ath79_gpio_direction_output,
128− .base = 0,
129−};
213+ chained_irq_exit(irqchip, desc);
214+}
130215
131216 static const struct of_device_id ath79_gpio_of_match[] = {
132217 { .compatible = "qca,ar7100-gpio" },
@@ -147,6 +232,7 @@ static int ath79_gpio_probe(struct platform_device *pdev) · 14 unmodified lines
147232 ctrl = devm_kzalloc(&pdev->dev, sizeof(*ctrl), GFP_KERNEL);
148233 if (!ctrl)
149234 return -ENOMEM;
235+ platform_set_drvdata(pdev, ctrl);
150236
151237 if (np) {
152238 err = of_property_read_u32(np, "ngpios", &ath79_gpio_count);
@@ -154,10 +240,6 @@ static int ath79_gpio_probe(struct platform_device *pdev) · 1 unmodified line
154240 dev_err(&pdev->dev, "ngpios property is not valid\n");
155241 return err;
156242 }
157− if (ath79_gpio_count >= 32) {
158− dev_err(&pdev->dev, "ngpios must be less than 32\n");
159− return -EINVAL;
160− }
161243 oe_inverted = of_device_is_compatible(np, "qca,ar9340-gpio");
162244 } else if (pdata) {
163245 ath79_gpio_count = pdata->ngpios;
@@ -167,6 +249,11 @@ static int ath79_gpio_probe(struct platform_device *pdev) · 3 unmodified lines
167249 return -EINVAL;
168250 }
169251
252+ if (ath79_gpio_count >= 32) {
253+ dev_err(&pdev->dev, "ngpios must be less than 32\n");
254+ return -EINVAL;
255+ }
256+
170257 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
171258 ctrl->base = devm_ioremap_nocache(
172259 &pdev->dev, res->start, resource_size(res));
@@ -174,21 +261,53 @@ static int ath79_gpio_probe(struct platform_device *pdev) · 1 unmodified line
174261 return -ENOMEM;
175262
176263 spin_lock_init(&ctrl->lock);
177− memcpy(&ctrl->chip, &ath79_gpio_chip, sizeof(ctrl->chip));
178− ctrl->chip.parent = &pdev->dev;
179− ctrl->chip.ngpio = ath79_gpio_count;
180− if (oe_inverted) {
181− ctrl->chip.direction_input = ar934x_gpio_direction_input;
182− ctrl->chip.direction_output = ar934x_gpio_direction_output;
264+ err = bgpio_init(&ctrl->gc, &pdev->dev, 4,
265+ ctrl->base + AR71XX_GPIO_REG_IN,
266+ ctrl->base + AR71XX_GPIO_REG_SET,
267+ ctrl->base + AR71XX_GPIO_REG_CLEAR,
268+ oe_inverted ? NULL : ctrl->base + AR71XX_GPIO_REG_OE,
269+ oe_inverted ? ctrl->base + AR71XX_GPIO_REG_OE : NULL,
270+ 0);
271+ if (err) {
272+ dev_err(&pdev->dev, "bgpio_init failed\n");
273+ return err;
183274 }
275+ /* Use base 0 to stay compatible with legacy platforms */
276+ ctrl->gc.base = 0;
184277
185− err = gpiochip_add_data(&ctrl->chip, ctrl);
278+ err = gpiochip_add_data(&ctrl->gc, ctrl);
186279 if (err) {
187280 dev_err(&pdev->dev,
188281 "cannot add AR71xx GPIO chip, error=%d", err);
189282 return err;
190283 }
191284
285+ if (np && !of_property_read_bool(np, "interrupt-controller"))
286+ return 0;
287+
288+ err = gpiochip_irqchip_add(&ctrl->gc, &ath79_gpio_irqchip, 0,
289+ handle_simple_irq, IRQ_TYPE_NONE);
290+ if (err) {
291+ dev_err(&pdev->dev, "failed to add gpiochip_irqchip\n");
292+ goto gpiochip_remove;
293+ }
294+
295+ gpiochip_set_chained_irqchip(&ctrl->gc, &ath79_gpio_irqchip,
296+ platform_get_irq(pdev, 0),
297+ ath79_gpio_irq_handler);
298+
299+ return 0;
300+
301+gpiochip_remove:
302+ gpiochip_remove(&ctrl->gc);
303+ return err;
304+}
305+
306+static int ath79_gpio_remove(struct platform_device *pdev)
307+{
308+ struct ath79_gpio_ctrl *ctrl = platform_get_drvdata(pdev);
309+
310+ gpiochip_remove(&ctrl->gc);
192311 return 0;
193312 }
194313
@@ -198,6 +317,7 @@ static struct platform_driver ath79_gpio_driver = { · 3 unmodified lines
198317 .of_match_table = ath79_gpio_of_match,
199318 },
200319 .probe = ath79_gpio_probe,
320+ .remove = ath79_gpio_remove,
201321 };
202322
203323 module_platform_driver(ath79_gpio_driver);
drivers/gpio/gpio-bcm-kona.c+1−1
@@ -630,7 +630,7 @@ static int bcm_kona_gpio_probe(struct platform_device *pdev) · 629 unmodified lines
630630
631631 bcm_kona_gpio_reset(kona_gpio);
632632
633− ret = gpiochip_add_data(chip, kona_gpio);
633+ ret = devm_gpiochip_add_data(dev, chip, kona_gpio);
634634 if (ret < 0) {
635635 dev_err(dev, "Couldn't add GPIO chip -- %d\n", ret);
636636 goto err_irq_domain;
drivers/gpio/gpio-brcmstb.c+4−9
@@ -233,17 +233,14 @@ static void brcmstb_gpio_irq_handler(struct irq_desc *desc) · 232 unmodified lines
233233 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
234234 struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
235235 struct irq_chip *chip = irq_desc_get_chip(desc);
236− struct list_head *pos;
236+ struct brcmstb_gpio_bank *bank;
237237
238238 /* Interrupts weren't properly cleared during probe */
239239 BUG_ON(!priv || !chip);
240240
241241 chained_irq_enter(chip, desc);
242− list_for_each(pos, &priv->bank_list) {
243− struct brcmstb_gpio_bank *bank =
244− list_entry(pos, struct brcmstb_gpio_bank, node);
242+ list_for_each_entry(bank, &priv->bank_list, node)
245243 brcmstb_gpio_irq_bank_handler(bank);
246− }
247244 chained_irq_exit(chip, desc);
248245 }
249246
@@ -280,7 +277,6 @@ static int brcmstb_gpio_sanity_check_banks(struct device *dev, · 30 unmodified lines
280277 static int brcmstb_gpio_remove(struct platform_device *pdev)
281278 {
282279 struct brcmstb_gpio_priv *priv = platform_get_drvdata(pdev);
283− struct list_head *pos;
284280 struct brcmstb_gpio_bank *bank;
285281 int ret = 0;
286282
@@ -293,10 +289,9 @@ static int brcmstb_gpio_remove(struct platform_device *pdev) · 6 unmodified lines
293289 * You can lose return values below, but we report all errors, and it's
294290 * more important to actually perform all of the steps.
295291 */
296− list_for_each(pos, &priv->bank_list) {
297− bank = list_entry(pos, struct brcmstb_gpio_bank, node);
292+ list_for_each_entry(bank, &priv->bank_list, node)
298293 gpiochip_remove(&bank->gc);
299− }
294+
300295 if (priv->reboot_notifier.notifier_call) {
301296 ret = unregister_reboot_notifier(&priv->reboot_notifier);
302297 if (ret)
drivers/gpio/gpio-clps711x.c+1−10
@@ -67,15 +67,7 @@ static int clps711x_gpio_probe(struct platform_device *pdev) · 66 unmodified lines
6767 gc->owner = THIS_MODULE;
6868 platform_set_drvdata(pdev, gc);
6969
70− return gpiochip_add_data(gc, NULL);
71−}
72−
73−static int clps711x_gpio_remove(struct platform_device *pdev)
74−{
75− struct gpio_chip *gc = platform_get_drvdata(pdev);
76−
77− gpiochip_remove(gc);
78− return 0;
70+ return devm_gpiochip_add_data(&pdev->dev, gc, NULL);
7971 }
8072
8173 static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = {
@@ -90,7 +82,6 @@ static struct platform_driver clps711x_gpio_driver = { · 8 unmodified lines
9082 .of_match_table = of_match_ptr(clps711x_gpio_ids),
9183 },
9284 .probe = clps711x_gpio_probe,
93− .remove = clps711x_gpio_remove,
9485 };
9586 module_platform_driver(clps711x_gpio_driver);
9687
drivers/gpio/gpio-crystalcove.c+2−7
@@ -345,7 +345,7 @@ static int crystalcove_gpio_probe(struct platform_device *pdev) · 344 unmodified lines
345345 cg->chip.dbg_show = crystalcove_gpio_dbg_show;
346346 cg->regmap = pmic->regmap;
347347
348− retval = gpiochip_add_data(&cg->chip, cg);
348+ retval = devm_gpiochip_add_data(&pdev->dev, &cg->chip, cg);
349349 if (retval) {
350350 dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval);
351351 return retval;
@@ -359,14 +359,10 @@ static int crystalcove_gpio_probe(struct platform_device *pdev) · 7 unmodified lines
359359
360360 if (retval) {
361361 dev_warn(&pdev->dev, "request irq failed: %d\n", retval);
362− goto out_remove_gpio;
362+ return retval;
363363 }
364364
365365 return 0;
366−
367−out_remove_gpio:
368− gpiochip_remove(&cg->chip);
369− return retval;
370366 }
371367
372368 static int crystalcove_gpio_remove(struct platform_device *pdev)
@@ -374,7 +370,6 @@ static int crystalcove_gpio_remove(struct platform_device *pdev) · 1 unmodified line
374370 struct crystalcove_gpio *cg = platform_get_drvdata(pdev);
375371 int irq = platform_get_irq(pdev, 0);
376372
377− gpiochip_remove(&cg->chip);
378373 if (irq >= 0)
379374 free_irq(irq, cg);
380375 return 0;
drivers/gpio/gpio-cs5535.c+5−15
@@ -320,13 +320,13 @@ static int cs5535_gpio_probe(struct platform_device *pdev) · 319 unmodified lines
320320 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
321321 if (!res) {
322322 dev_err(&pdev->dev, "can't fetch device resource info\n");
323− goto done;
323+ return err;
324324 }
325325
326326 if (!devm_request_region(&pdev->dev, res->start, resource_size(res),
327327 pdev->name)) {
328328 dev_err(&pdev->dev, "can't request region\n");
329− goto done;
329+ return err;
330330 }
331331
332332 /* set up the driver-specific struct */
@@ -348,19 +348,10 @@ static int cs5535_gpio_probe(struct platform_device *pdev) · 15 unmodified lines
348348 mask_orig, mask);
349349
350350 /* finally, register with the generic GPIO API */
351− err = gpiochip_add_data(&cs5535_gpio_chip.chip, &cs5535_gpio_chip);
351+ err = devm_gpiochip_add_data(&pdev->dev, &cs5535_gpio_chip.chip,
352+ &cs5535_gpio_chip);
352353 if (err)
353− goto done;
354−
355− return 0;
356−
357−done:
358− return err;
359−}
360−
361−static int cs5535_gpio_remove(struct platform_device *pdev)
362−{
363− gpiochip_remove(&cs5535_gpio_chip.chip);
354+ return err;
364355
365356 return 0;
366357 }
@@ -370,7 +361,6 @@ static struct platform_driver cs5535_gpio_driver = { · 3 unmodified lines
370361 .name = DRV_NAME,
371362 },
372363 .probe = cs5535_gpio_probe,
373− .remove = cs5535_gpio_remove,
374364 };
375365
376366 module_platform_driver(cs5535_gpio_driver);
drivers/gpio/gpio-da9052.c+1−10
@@ -214,7 +214,7 @@ static int da9052_gpio_probe(struct platform_device *pdev) · 213 unmodified lines
214214 if (pdata && pdata->gpio_base)
215215 gpio->gp.base = pdata->gpio_base;
216216
217− ret = gpiochip_add_data(&gpio->gp, gpio);
217+ ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gp, gpio);
218218 if (ret < 0) {
219219 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
220220 return ret;
@@ -225,17 +225,8 @@ static int da9052_gpio_probe(struct platform_device *pdev) · 4 unmodified lines
225225 return 0;
226226 }
227227
228−static int da9052_gpio_remove(struct platform_device *pdev)
229−{
230− struct da9052_gpio *gpio = platform_get_drvdata(pdev);
231−
232− gpiochip_remove(&gpio->gp);
233− return 0;
234−}
235−
236228 static struct platform_driver da9052_gpio_driver = {
237229 .probe = da9052_gpio_probe,
238− .remove = da9052_gpio_remove,
239230 .driver = {
240231 .name = "da9052-gpio",
241232 },
drivers/gpio/gpio-da9055.c+2−14
@@ -151,31 +151,19 @@ static int da9055_gpio_probe(struct platform_device *pdev) · 150 unmodified lines
151151 if (pdata && pdata->gpio_base)
152152 gpio->gp.base = pdata->gpio_base;
153153
154− ret = gpiochip_add_data(&gpio->gp, gpio);
154+ ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gp, gpio);
155155 if (ret < 0) {
156156 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
157− goto err_mem;
157+ return ret;
158158 }
159159
160160 platform_set_drvdata(pdev, gpio);
161161
162162 return 0;
163−
164−err_mem:
165− return ret;
166−}
167−
168−static int da9055_gpio_remove(struct platform_device *pdev)
169−{
170− struct da9055_gpio *gpio = platform_get_drvdata(pdev);
171−
172− gpiochip_remove(&gpio->gp);
173− return 0;
174163 }
175164
176165 static struct platform_driver da9055_gpio_driver = {
177166 .probe = da9055_gpio_probe,
178− .remove = da9055_gpio_remove,
179167 .driver = {
180168 .name = "da9055-gpio",
181169 },
drivers/gpio/gpio-davinci.c+3−2
@@ -258,6 +258,8 @@ static int davinci_gpio_probe(struct platform_device *pdev) · 257 unmodified lines
258258 spin_lock_init(&chips[i].lock);
259259
260260 regs = gpio2regs(base);
261+ if (!regs)
262+ return -ENXIO;
261263 chips[i].regs = regs;
262264 chips[i].set_data = &regs->set_data;
263265 chips[i].clr_data = &regs->clr_data;
@@ -433,8 +435,7 @@ static struct irq_chip *davinci_gpio_get_irq_chip(unsigned int irq) · 169 unmodified lines
433435 {
434436 static struct irq_chip_type gpio_unbanked;
435437
436− gpio_unbanked = *container_of(irq_get_chip(irq),
437− struct irq_chip_type, chip);
438+ gpio_unbanked = *irq_data_get_chip_type(irq_get_irq_data(irq));
438439
439440 return &gpio_unbanked.chip;
440441 };
drivers/gpio/gpio-dln2.c+4−12
@@ -479,40 +479,32 @@ static int dln2_gpio_probe(struct platform_device *pdev) · 478 unmodified lines
479479
480480 platform_set_drvdata(pdev, dln2);
481481
482− ret = gpiochip_add_data(&dln2->gpio, dln2);
482+ ret = devm_gpiochip_add_data(dev, &dln2->gpio, dln2);
483483 if (ret < 0) {
484484 dev_err(dev, "failed to add gpio chip: %d\n", ret);
485− goto out;
485+ return ret;
486486 }
487487
488488 ret = gpiochip_irqchip_add(&dln2->gpio, &dln2_gpio_irqchip, 0,
489489 handle_simple_irq, IRQ_TYPE_NONE);
490490 if (ret < 0) {
491491 dev_err(dev, "failed to add irq chip: %d\n", ret);
492− goto out_gpiochip_remove;
492+ return ret;
493493 }
494494
495495 ret = dln2_register_event_cb(pdev, DLN2_GPIO_CONDITION_MET_EV,
496496 dln2_gpio_event);
497497 if (ret) {
498498 dev_err(dev, "failed to register event cb: %d\n", ret);
499− goto out_gpiochip_remove;
499+ return ret;
500500 }
501501
502502 return 0;
503−
504−out_gpiochip_remove:
505− gpiochip_remove(&dln2->gpio);
506−out:
507− return ret;
508503 }
509504
510505 static int dln2_gpio_remove(struct platform_device *pdev)
511506 {
512− struct dln2_gpio *dln2 = platform_get_drvdata(pdev);
513−
514507 dln2_unregister_event_cb(pdev, DLN2_GPIO_CONDITION_MET_EV);
515− gpiochip_remove(&dln2->gpio);
516508
517509 return 0;
518510 }
drivers/gpio/gpio-ep93xx.c+1−1
@@ -339,7 +339,7 @@ static int ep93xx_gpio_add_bank(struct gpio_chip *gc, struct device *dev, · 338 unmodified lines
339339 gc->to_irq = ep93xx_gpio_to_irq;
340340 }
341341
342− return gpiochip_add_data(gc, NULL);
342+ return devm_gpiochip_add_data(dev, gc, NULL);
343343 }
344344
345345 static int ep93xx_gpio_probe(struct platform_device *pdev)
drivers/gpio/gpio-f7188x.c+26−27
@@ -1,5 +1,5 @@
11 /*
2− * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882 and F71889
2+ * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
33 *
44 * Copyright (C) 2010-2013 LaCie
55 *
@@ -36,14 +36,16 @@ · 30 unmodified lines
3636 #define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
3737 #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
3838 #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
39+#define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
3940
40−enum chips { f71869, f71869a, f71882fg, f71889f };
41+enum chips { f71869, f71869a, f71882fg, f71889f, f81866 };
4142
4243 static const char * const f7188x_names[] = {
4344 "f71869",
4445 "f71869a",
4546 "f71882fg",
4647 "f71889f",
48+ "f81866",
4749 };
4850
4951 struct f7188x_sio {
@@ -190,6 +192,18 @@ static struct f7188x_gpio_bank f71889_gpio_bank[] = { · 140 unmodified lines
190192 F7188X_GPIO_BANK(70, 8, 0x80),
191193 };
192194
195+static struct f7188x_gpio_bank f81866_gpio_bank[] = {
196+ F7188X_GPIO_BANK(0, 8, 0xF0),
197+ F7188X_GPIO_BANK(10, 8, 0xE0),
198+ F7188X_GPIO_BANK(20, 8, 0xD0),
199+ F7188X_GPIO_BANK(30, 8, 0xC0),
200+ F7188X_GPIO_BANK(40, 8, 0xB0),
201+ F7188X_GPIO_BANK(50, 8, 0xA0),
202+ F7188X_GPIO_BANK(60, 8, 0x90),
203+ F7188X_GPIO_BANK(70, 8, 0x80),
204+ F7188X_GPIO_BANK(80, 8, 0x88),
205+};
206+
193207 static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
194208 {
195209 int err;
@@ -318,6 +332,10 @@ static int f7188x_gpio_probe(struct platform_device *pdev) · 122 unmodified lines
318332 data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
319333 data->bank = f71889_gpio_bank;
320334 break;
335+ case f81866:
336+ data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
337+ data->bank = f81866_gpio_bank;
338+ break;
321339 default:
322340 return -ENODEV;
323341 }
@@ -332,36 +350,15 @@ static int f7188x_gpio_probe(struct platform_device *pdev) · 8 unmodified lines
332350 bank->chip.parent = &pdev->dev;
333351 bank->data = data;
334352
335− err = gpiochip_add_data(&bank->chip, bank);
353+ err = devm_gpiochip_add_data(&pdev->dev, &bank->chip, bank);
336354 if (err) {
337355 dev_err(&pdev->dev,
338356 "Failed to register gpiochip %d: %d\n",
339357 i, err);
340− goto err_gpiochip;
358+ return err;
341359 }
342360 }
343361
344− return 0;
345−
346−err_gpiochip:
347− for (i = i - 1; i >= 0; i--) {
348− struct f7188x_gpio_bank *bank = &data->bank[i];
349− gpiochip_remove(&bank->chip);
350− }
351−
352− return err;
353−}
354−
355−static int f7188x_gpio_remove(struct platform_device *pdev)
356−{
357− int i;
358− struct f7188x_gpio_data *data = platform_get_drvdata(pdev);
359−
360− for (i = 0; i < data->nr_bank; i++) {
361− struct f7188x_gpio_bank *bank = &data->bank[i];
362− gpiochip_remove(&bank->chip);
363− }
364−
365362 return 0;
366363 }
367364
@@ -395,6 +392,9 @@ static int __init f7188x_find(int addr, struct f7188x_sio *sio) · 27 unmodified lines
395392 case SIO_F71889_ID:
396393 sio->type = f71889f;
397394 break;
395+ case SIO_F81866_ID:
396+ sio->type = f81866;
397+ break;
398398 default:
399399 pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
400400 goto err;
@@ -455,7 +455,6 @@ static struct platform_driver f7188x_gpio_driver = { · 54 unmodified lines
455455 .name = DRVNAME,
456456 },
457457 .probe = f7188x_gpio_probe,
458− .remove = f7188x_gpio_remove,
459458 };
460459
461460 static int __init f7188x_gpio_init(void)
@@ -485,6 +484,6 @@ static void __exit f7188x_gpio_exit(void) · 23 unmodified lines
485484 }
486485 module_exit(f7188x_gpio_exit);
487486
488−MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG and F71889F");
487+MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866");
489488 MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
490489 MODULE_LICENSE("GPL");
drivers/gpio/gpio-ge.c+1−1
@@ -89,7 +89,7 @@ static int __init gef_gpio_probe(struct platform_device *pdev) · 88 unmodified lines
8989 gc->of_node = pdev->dev.of_node;
9090
9191 /* This function adds a memory mapped GPIO chip */
92− ret = gpiochip_add_data(gc, NULL);
92+ ret = devm_gpiochip_add_data(&pdev->dev, gc, NULL);
9393 if (ret)
9494 goto err0;
9595
drivers/gpio/gpio-generic.c+1−10
@@ -628,15 +628,7 @@ static int bgpio_pdev_probe(struct platform_device *pdev) · 627 unmodified lines
628628
629629 platform_set_drvdata(pdev, gc);
630630
631− return gpiochip_add_data(gc, NULL);
632−}
633−
634−static int bgpio_pdev_remove(struct platform_device *pdev)
635−{
636− struct gpio_chip *gc = platform_get_drvdata(pdev);
637−
638− gpiochip_remove(gc);
639− return 0;
631+ return devm_gpiochip_add_data(&pdev->dev, gc, NULL);
640632 }
641633
642634 static const struct platform_device_id bgpio_id_table[] = {
@@ -657,7 +649,6 @@ static struct platform_driver bgpio_driver = { · 14 unmodified lines
657649 },
658650 .id_table = bgpio_id_table,
659651 .probe = bgpio_pdev_probe,
660− .remove = bgpio_pdev_remove,
661652 };
662653
663654 module_platform_driver(bgpio_driver);
drivers/gpio/gpio-ich.c+9−42
@@ -20,6 +20,7 @@ · 19 unmodified lines
2020
2121 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
2222
23+#include <linux/ioport.h>
2324 #include <linux/module.h>
2425 #include <linux/pci.h>
2526 #include <linux/gpio.h>
@@ -384,8 +385,8 @@ static struct ichx_desc avoton_desc = { · 358 unmodified lines
384385 .use_outlvl_cache = true,
385386 };
386387
387−static int ichx_gpio_request_regions(struct resource *res_base,
388− const char *name, u8 use_gpio)
388+static int ichx_gpio_request_regions(struct device *dev,
389+ struct resource *res_base, const char *name, u8 use_gpio)
389390 {
390391 int i;
391392
@@ -395,34 +396,12 @@ static int ichx_gpio_request_regions(struct resource *res_base, · 3 unmodified lines
395396 for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) {
396397 if (!(use_gpio & (1 << i)))
397398 continue;
398− if (!request_region(
399+ if (!devm_request_region(dev,
399400 res_base->start + ichx_priv.desc->regs[0][i],
400401 ichx_priv.desc->reglen[i], name))
401− goto request_err;
402+ return -EBUSY;
402403 }
403404 return 0;
404−
405−request_err:
406− /* Clean up: release already requested regions, if any */
407− for (i--; i >= 0; i--) {
408− if (!(use_gpio & (1 << i)))
409− continue;
410− release_region(res_base->start + ichx_priv.desc->regs[0][i],
411− ichx_priv.desc->reglen[i]);
412− }
413− return -EBUSY;
414−}
415−
416−static void ichx_gpio_release_regions(struct resource *res_base, u8 use_gpio)
417−{
418− int i;
419−
420− for (i = 0; i < ARRAY_SIZE(ichx_priv.desc->regs[0]); i++) {
421− if (!(use_gpio & (1 << i)))
422− continue;
423− release_region(res_base->start + ichx_priv.desc->regs[0][i],
424− ichx_priv.desc->reglen[i]);
425− }
426405 }
427406
428407 static int ichx_gpio_probe(struct platform_device *pdev)
@@ -468,7 +447,7 @@ static int ichx_gpio_probe(struct platform_device *pdev) · 39 unmodified lines
468447 spin_lock_init(&ichx_priv.lock);
469448 res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO);
470449 ichx_priv.use_gpio = ich_info->use_gpio;
471− err = ichx_gpio_request_regions(res_base, pdev->name,
450+ err = ichx_gpio_request_regions(&pdev->dev, res_base, pdev->name,
472451 ichx_priv.use_gpio);
473452 if (err)
474453 return err;
@@ -489,8 +468,8 @@ static int ichx_gpio_probe(struct platform_device *pdev) · 14 unmodified lines
489468 goto init;
490469 }
491470
492− if (!request_region(res_pm->start, resource_size(res_pm),
493− pdev->name)) {
471+ if (!devm_request_region(&pdev->dev, res_pm->start,
472+ resource_size(res_pm), pdev->name)) {
494473 pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n");
495474 goto init;
496475 }
@@ -502,31 +481,19 @@ init: · 5 unmodified lines
502481 err = gpiochip_add_data(&ichx_priv.chip, NULL);
503482 if (err) {
504483 pr_err("Failed to register GPIOs\n");
505− goto add_err;
484+ return err;
506485 }
507486
508487 pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base,
509488 ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME);
510489
511490 return 0;
512−
513−add_err:
514− ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio);
515− if (ichx_priv.pm_base)
516− release_region(ichx_priv.pm_base->start,
517− resource_size(ichx_priv.pm_base));
518− return err;
519491 }
520492
521493 static int ichx_gpio_remove(struct platform_device *pdev)
522494 {
523495 gpiochip_remove(&ichx_priv.chip);
524496
525− ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio);
526− if (ichx_priv.pm_base)
527− release_region(ichx_priv.pm_base->start,
528− resource_size(ichx_priv.pm_base));
529−
530497 return 0;
531498 }
532499
drivers/gpio/gpio-iop.c+1−1
@@ -114,7 +114,7 @@ static int iop3xx_gpio_probe(struct platform_device *pdev) · 113 unmodified lines
114114 if (IS_ERR(base))
115115 return PTR_ERR(base);
116116
117− return gpiochip_add_data(&iop3xx_chip, NULL);
117+ return devm_gpiochip_add_data(&pdev->dev, &iop3xx_chip, NULL);
118118 }
119119
120120 static struct platform_driver iop3xx_gpio_driver = {
drivers/gpio/gpio-janz-ttl.c+1−11
@@ -182,7 +182,7 @@ static int ttl_probe(struct platform_device *pdev) · 181 unmodified lines
182182 gpio->base = -1;
183183 gpio->ngpio = 20;
184184
185− ret = gpiochip_add_data(gpio, NULL);
185+ ret = devm_gpiochip_add_data(dev, gpio, NULL);
186186 if (ret) {
187187 dev_err(dev, "unable to add GPIO chip\n");
188188 return ret;
@@ -191,21 +191,11 @@ static int ttl_probe(struct platform_device *pdev) · 2 unmodified lines
191191 return 0;
192192 }
193193
194−static int ttl_remove(struct platform_device *pdev)
195−{
196− struct ttl_module *mod = platform_get_drvdata(pdev);
197−
198− gpiochip_remove(&mod->gpio);
199−
200− return 0;
201−}
202−
203194 static struct platform_driver ttl_driver = {
204195 .driver = {
205196 .name = DRV_NAME,
206197 },
207198 .probe = ttl_probe,
208− .remove = ttl_remove,
209199 };
210200
211201 module_platform_driver(ttl_driver);
drivers/gpio/gpio-kempld.c+1−10
@@ -178,7 +178,7 @@ static int kempld_gpio_probe(struct platform_device *pdev) · 177 unmodified lines
178178 return -ENODEV;
179179 }
180180
181− ret = gpiochip_add_data(chip, gpio);
181+ ret = devm_gpiochip_add_data(dev, chip, gpio);
182182 if (ret) {
183183 dev_err(dev, "Could not register GPIO chip\n");
184184 return ret;
@@ -190,20 +190,11 @@ static int kempld_gpio_probe(struct platform_device *pdev) · 5 unmodified lines
190190 return 0;
191191 }
192192
193−static int kempld_gpio_remove(struct platform_device *pdev)
194−{
195− struct kempld_gpio_data *gpio = platform_get_drvdata(pdev);
196−
197− gpiochip_remove(&gpio->chip);
198− return 0;
199−}
200−
201193 static struct platform_driver kempld_gpio_driver = {
202194 .driver = {
203195 .name = "kempld-gpio",
204196 },
205197 .probe = kempld_gpio_probe,
206− .remove = kempld_gpio_remove,
207198 };
208199
209200 module_platform_driver(kempld_gpio_driver);
drivers/gpio/gpio-ks8695.c+0−12
@@ -205,18 +205,6 @@ static int ks8695_gpio_to_irq(struct gpio_chip *gc, unsigned int pin) · 204 unmodified lines
205205 return gpio_irq[pin];
206206 }
207207
208−/*
209− * Map IRQ number to GPIO line.
210− */
211−int irq_to_gpio(unsigned int irq)
212−{
213− if ((irq < KS8695_IRQ_EXTERN0) || (irq > KS8695_IRQ_EXTERN3))
214− return -EINVAL;
215−
216− return (irq - KS8695_IRQ_EXTERN0);
217−}
218−EXPORT_SYMBOL(irq_to_gpio);
219−
220208 /* GPIOLIB interface */
221209
222210 static struct gpio_chip ks8695_gpio_chip = {
drivers/gpio/gpio-lp3943.c+2−10
@@ -204,15 +204,8 @@ static int lp3943_gpio_probe(struct platform_device *pdev) · 203 unmodified lines
204204
205205 platform_set_drvdata(pdev, lp3943_gpio);
206206
207− return gpiochip_add_data(&lp3943_gpio->chip, lp3943_gpio);
208−}
209−
210−static int lp3943_gpio_remove(struct platform_device *pdev)
211−{
212− struct lp3943_gpio *lp3943_gpio = platform_get_drvdata(pdev);
213−
214− gpiochip_remove(&lp3943_gpio->chip);
215− return 0;
207+ return devm_gpiochip_add_data(&pdev->dev, &lp3943_gpio->chip,
208+ lp3943_gpio);
216209 }
217210
218211 static const struct of_device_id lp3943_gpio_of_match[] = {
@@ -223,7 +216,6 @@ MODULE_DEVICE_TABLE(of, lp3943_gpio_of_match); · 4 unmodified lines
223216
224217 static struct platform_driver lp3943_gpio_driver = {
225218 .probe = lp3943_gpio_probe,
226− .remove = lp3943_gpio_remove,
227219 .driver = {
228220 .name = "lp3943-gpio",
229221 .of_match_table = lp3943_gpio_of_match,
drivers/gpio/gpio-lpc32xx.c+1−1
@@ -547,7 +547,7 @@ static int lpc32xx_gpio_probe(struct platform_device *pdev) · 546 unmodified lines
547547 lpc32xx_gpiochip[i].chip.of_gpio_n_cells = 3;
548548 lpc32xx_gpiochip[i].chip.of_node = pdev->dev.of_node;
549549 }
550− gpiochip_add_data(&lpc32xx_gpiochip[i].chip,
550+ devm_gpiochip_add_data(&pdev->dev, &lpc32xx_gpiochip[i].chip,
551551 &lpc32xx_gpiochip[i]);
552552 }
553553
drivers/gpio/gpio-lynxpoint.c+1−3
@@ -370,7 +370,7 @@ static int lp_gpio_probe(struct platform_device *pdev) · 369 unmodified lines
370370 gc->can_sleep = false;
371371 gc->parent = dev;
372372
373− ret = gpiochip_add_data(gc, lg);
373+ ret = devm_gpiochip_add_data(dev, gc, lg);
374374 if (ret) {
375375 dev_err(dev, "failed adding lp-gpio chip\n");
376376 return ret;
@@ -439,9 +439,7 @@ MODULE_DEVICE_TABLE(acpi, lynxpoint_gpio_acpi_match); · 62 unmodified lines
439439
440440 static int lp_gpio_remove(struct platform_device *pdev)
441441 {
442− struct lp_gpio *lg = platform_get_drvdata(pdev);
443442 pm_runtime_disable(&pdev->dev);
444− gpiochip_remove(&lg->chip);
445443 return 0;
446444 }
447445
drivers/gpio/gpio-mc9s08dz60.c+1−12
@@ -103,17 +103,7 @@ static int mc9s08dz60_probe(struct i2c_client *client, · 102 unmodified lines
103103 mc9s->client = client;
104104 i2c_set_clientdata(client, mc9s);
105105
106− return gpiochip_add_data(&mc9s->chip, mc9s);
107−}
108−
109−static int mc9s08dz60_remove(struct i2c_client *client)
110−{
111− struct mc9s08dz60 *mc9s;
112−
113− mc9s = i2c_get_clientdata(client);
114−
115− gpiochip_remove(&mc9s->chip);
116− return 0;
106+ return devm_gpiochip_add_data(&client->dev, &mc9s->chip, mc9s);
117107 }
118108
119109 static const struct i2c_device_id mc9s08dz60_id[] = {
@@ -128,7 +118,6 @@ static struct i2c_driver mc9s08dz60_i2c_driver = { · 8 unmodified lines
128118 .name = "mc9s08dz60",
129119 },
130120 .probe = mc9s08dz60_probe,
131− .remove = mc9s08dz60_remove,
132121 .id_table = mc9s08dz60_id,
133122 };
134123
drivers/gpio/gpio-mcp23s08.c+21−4
@@ -31,6 +31,7 @@ · 30 unmodified lines
3131 #define MCP_TYPE_S17 1
3232 #define MCP_TYPE_008 2
3333 #define MCP_TYPE_017 3
34+#define MCP_TYPE_S18 4
3435
3536 /* Registers are all 8 bits wide.
3637 *
@@ -48,6 +49,7 @@ · 11 unmodified lines
4849 # define IOCON_HAEN (1 << 3)
4950 # define IOCON_ODR (1 << 2)
5051 # define IOCON_INTPOL (1 << 1)
52+# define IOCON_INTCC (1)
5153 #define MCP_GPPU 0x06
5254 #define MCP_INTF 0x07
5355 #define MCP_INTCAP 0x08
@@ -617,6 +619,12 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, · 563 unmodified lines
617619 mcp->chip.ngpio = 16;
618620 mcp->chip.label = "mcp23s17";
619621 break;
622+
623+ case MCP_TYPE_S18:
624+ mcp->ops = &mcp23s17_ops;
625+ mcp->chip.ngpio = 16;
626+ mcp->chip.label = "mcp23s18";
627+ break;
620628 #endif /* CONFIG_SPI_MASTER */
621629
622630 #if IS_ENABLED(CONFIG_I2C)
@@ -657,8 +665,7 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, · 34 unmodified lines
657665 of_property_read_bool(mcp->chip.parent->of_node,
658666 "microchip,irq-active-high");
659667
660− if (type == MCP_TYPE_017)
661− mirror = pdata->mirror;
668+ mirror = pdata->mirror;
662669 }
663670
664671 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
@@ -674,6 +681,9 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, · 9 unmodified lines
674681 if (mirror)
675682 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
676683
684+ if (type == MCP_TYPE_S18)
685+ status |= IOCON_INTCC | (IOCON_INTCC << 8);
686+
677687 status = mcp->ops->write(mcp, MCP_IOCON, status);
678688 if (status < 0)
679689 goto fail;
@@ -735,6 +745,10 @@ static const struct of_device_id mcp23s08_spi_of_match[] = { · 55 unmodified lines
735745 .compatible = "microchip,mcp23s17",
736746 .data = (void *) MCP_TYPE_S17,
737747 },
748+ {
749+ .compatible = "microchip,mcp23s18",
750+ .data = (void *) MCP_TYPE_S18,
751+ },
738752 /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
739753 {
740754 .compatible = "mcp,mcp23s08",
@@ -803,6 +817,8 @@ static int mcp230xx_probe(struct i2c_client *client, · 62 unmodified lines
803817 pdata = devm_kzalloc(&client->dev,
804818 sizeof(struct mcp23s08_platform_data),
805819 GFP_KERNEL);
820+ if (!pdata)
821+ return -ENOMEM;
806822 pdata->base = -1;
807823 }
808824 }
@@ -969,8 +985,8 @@ static int mcp23s08_probe(struct spi_device *spi) · 160 unmodified lines
969985 goto fail;
970986
971987 if (pdata->base != -1)
972− pdata->base += (type == MCP_TYPE_S17) ? 16 : 8;
973− ngpio += (type == MCP_TYPE_S17) ? 16 : 8;
988+ pdata->base += data->mcp[addr]->chip.ngpio;
989+ ngpio += data->mcp[addr]->chip.ngpio;
974990 }
975991 data->ngpio = ngpio;
976992
@@ -1012,6 +1028,7 @@ static int mcp23s08_remove(struct spi_device *spi) · 35 unmodified lines
10121028 static const struct spi_device_id mcp23s08_ids[] = {
10131029 { "mcp23s08", MCP_TYPE_S08 },
10141030 { "mcp23s17", MCP_TYPE_S17 },
1031+ { "mcp23s18", MCP_TYPE_S18 },
10151032 { },
10161033 };
10171034 MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
drivers/gpio/gpio-menz127.c+200−0
@@ -0,0 +1,200 @@
1+/*
2+ * MEN 16Z127 GPIO driver
3+ *
4+ * Copyright (C) 2016 MEN Mikroelektronik GmbH (www.men.de)
5+ *
6+ * This program is free software; you can redistribute it and/or modify it
7+ * under the terms of the GNU General Public License as published by the Free
8+ * Software Foundation; version 2 of the License.
9+ */
10+
11+#include <linux/kernel.h>
12+#include <linux/module.h>
13+#include <linux/io.h>
14+#include <linux/err.h>
15+#include <linux/mcb.h>
16+#include <linux/bitops.h>
17+#include <linux/gpio/driver.h>
18+
19+#define MEN_Z127_CTRL 0x00
20+#define MEN_Z127_PSR 0x04
21+#define MEN_Z127_IRQR 0x08
22+#define MEN_Z127_GPIODR 0x0c
23+#define MEN_Z127_IER1 0x10
24+#define MEN_Z127_IER2 0x14
25+#define MEN_Z127_DBER 0x18
26+#define MEN_Z127_ODER 0x1C
27+#define GPIO_TO_DBCNT_REG(gpio) ((gpio * 4) + 0x80)
28+
29+#define MEN_Z127_DB_MIN_US 50
30+/* 16 bit compare register. Each bit represents 50us */
31+#define MEN_Z127_DB_MAX_US (0xffff * MEN_Z127_DB_MIN_US)
32+#define MEN_Z127_DB_IN_RANGE(db) ((db >= MEN_Z127_DB_MIN_US) && \
33+ (db <= MEN_Z127_DB_MAX_US))
34+
35+struct men_z127_gpio {
36+ struct gpio_chip gc;
37+ void __iomem *reg_base;
38+ struct mcb_device *mdev;
39+ struct resource *mem;
40+ spinlock_t lock;
41+};
42+
43+static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
44+ unsigned debounce)
45+{
46+ struct men_z127_gpio *priv = gpiochip_get_data(gc);
47+ struct device *dev = &priv->mdev->dev;
48+ unsigned int rnd;
49+ u32 db_en, db_cnt;
50+
51+ if (!MEN_Z127_DB_IN_RANGE(debounce)) {
52+ dev_err(dev, "debounce value %u out of range", debounce);
53+ return -EINVAL;
54+ }
55+
56+ if (debounce > 0) {
57+ /* round up or down depending on MSB-1 */
58+ rnd = fls(debounce) - 1;
59+
60+ if (rnd && (debounce & BIT(rnd - 1)))
61+ debounce = round_up(debounce, MEN_Z127_DB_MIN_US);
62+ else
63+ debounce = round_down(debounce, MEN_Z127_DB_MIN_US);
64+
65+ if (debounce > MEN_Z127_DB_MAX_US)
66+ debounce = MEN_Z127_DB_MAX_US;
67+
68+ /* 50us per register unit */
69+ debounce /= 50;
70+ }
71+
72+ spin_lock(&priv->lock);
73+
74+ db_en = readl(priv->reg_base + MEN_Z127_DBER);
75+
76+ if (debounce == 0) {
77+ db_en &= ~BIT(gpio);
78+ db_cnt = 0;
79+ } else {
80+ db_en |= BIT(gpio);
81+ db_cnt = debounce;
82+ }
83+
84+ writel(db_en, priv->reg_base + MEN_Z127_DBER);
85+ writel(db_cnt, priv->reg_base + GPIO_TO_DBCNT_REG(gpio));
86+
87+ spin_unlock(&priv->lock);
88+
89+ return 0;
90+}
91+
92+static int men_z127_request(struct gpio_chip *gc, unsigned gpio_pin)
93+{
94+ struct men_z127_gpio *priv = gpiochip_get_data(gc);
95+ u32 od_en;
96+
97+ if (gpio_pin >= gc->ngpio)
98+ return -EINVAL;
99+
100+ spin_lock(&priv->lock);
101+ od_en = readl(priv->reg_base + MEN_Z127_ODER);
102+
103+ if (gpiochip_line_is_open_drain(gc, gpio_pin))
104+ od_en |= BIT(gpio_pin);
105+ else
106+ od_en &= ~BIT(gpio_pin);
107+
108+ writel(od_en, priv->reg_base + MEN_Z127_ODER);
109+ spin_unlock(&priv->lock);
110+
111+ return 0;
112+}
113+
114+static int men_z127_probe(struct mcb_device *mdev,
115+ const struct mcb_device_id *id)
116+{
117+ struct men_z127_gpio *men_z127_gpio;
118+ struct device *dev = &mdev->dev;
119+ int ret;
120+
121+ men_z127_gpio = devm_kzalloc(dev, sizeof(struct men_z127_gpio),
122+ GFP_KERNEL);
123+ if (!men_z127_gpio)
124+ return -ENOMEM;
125+
126+ men_z127_gpio->mem = mcb_request_mem(mdev, dev_name(dev));
127+ if (IS_ERR(men_z127_gpio->mem)) {
128+ dev_err(dev, "failed to request device memory");
129+ return PTR_ERR(men_z127_gpio->mem);
130+ }
131+
132+ men_z127_gpio->reg_base = ioremap(men_z127_gpio->mem->start,
133+ resource_size(men_z127_gpio->mem));
134+ if (men_z127_gpio->reg_base == NULL) {
135+ ret = -ENXIO;
136+ goto err_release;
137+ }
138+
139+ men_z127_gpio->mdev = mdev;
140+ mcb_set_drvdata(mdev, men_z127_gpio);
141+
142+ ret = bgpio_init(&men_z127_gpio->gc, &mdev->dev, 4,
143+ men_z127_gpio->reg_base + MEN_Z127_PSR,
144+ men_z127_gpio->reg_base + MEN_Z127_CTRL,
145+ NULL,
146+ men_z127_gpio->reg_base + MEN_Z127_GPIODR,
147+ NULL, 0);
148+ if (ret)
149+ goto err_unmap;
150+
151+ men_z127_gpio->gc.set_debounce = men_z127_debounce;
152+ men_z127_gpio->gc.request = men_z127_request;
153+
154+ ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio);
155+ if (ret) {
156+ dev_err(dev, "failed to register MEN 16Z127 GPIO controller");
157+ goto err_unmap;
158+ }
159+
160+ dev_info(dev, "MEN 16Z127 GPIO driver registered");
161+
162+ return 0;
163+
164+err_unmap:
165+ iounmap(men_z127_gpio->reg_base);
166+err_release:
167+ mcb_release_mem(men_z127_gpio->mem);
168+ return ret;
169+}
170+
171+static void men_z127_remove(struct mcb_device *mdev)
172+{
173+ struct men_z127_gpio *men_z127_gpio = mcb_get_drvdata(mdev);
174+
175+ gpiochip_remove(&men_z127_gpio->gc);
176+ iounmap(men_z127_gpio->reg_base);
177+ mcb_release_mem(men_z127_gpio->mem);
178+}
179+
180+static const struct mcb_device_id men_z127_ids[] = {
181+ { .device = 0x7f },
182+ { }
183+};
184+MODULE_DEVICE_TABLE(mcb, men_z127_ids);
185+
186+static struct mcb_driver men_z127_driver = {
187+ .driver = {
188+ .name = "z127-gpio",
189+ .owner = THIS_MODULE,
190+ },
191+ .probe = men_z127_probe,
192+ .remove = men_z127_remove,
193+ .id_table = men_z127_ids,
194+};
195+module_mcb_driver(men_z127_driver);
196+
197+MODULE_AUTHOR("Andreas Werner <andreas.werner@men.de>");
198+MODULE_DESCRIPTION("MEN 16z127 GPIO Controller");
199+MODULE_LICENSE("GPL v2");
200+MODULE_ALIAS("mcb:16z127");
drivers/gpio/gpio-moxart.c+1−4
@@ -57,13 +57,10 @@ static int moxart_gpio_probe(struct platform_device *pdev) · 56 unmodified lines
5757 gc->label = "moxart-gpio";
5858 gc->request = gpiochip_generic_request;
5959 gc->free = gpiochip_generic_free;
60− gc->bgpio_data = gc->read_reg(gc->reg_set);
6160 gc->base = 0;
62− gc->ngpio = 32;
63− gc->parent = dev;
6461 gc->owner = THIS_MODULE;
6562
66− ret = gpiochip_add_data(gc, NULL);
63+ ret = devm_gpiochip_add_data(dev, gc, NULL);
6764 if (ret) {
6865 dev_err(dev, "%s: gpiochip_add failed\n",
6966 dev->of_node->full_name);
drivers/gpio/gpio-mpc5200.c+0−1
@@ -25,7 +25,6 @@ · 24 unmodified lines
2525 #include <linux/of_platform.h>
2626 #include <linux/module.h>
2727
28−#include <asm/gpio.h>
2928 #include <asm/mpc52xx.h>
3029 #include <sysdev/fsl_soc.h>
3130
drivers/gpio/gpio-mpc8xxx.c+96−159
@@ -1,7 +1,8 @@
11 /*
2− * GPIOs on MPC512x/8349/8572/8610 and compatible
2+ * GPIOs on MPC512x/8349/8572/8610/QorIQ and compatible
33 *
44 * Copyright (C) 2008 Peter Korsgaard <jacmet@sunsite.dk>
5+ * Copyright (C) 2016 Freescale Semiconductor Inc.
56 *
67 * This file is licensed under the terms of the GNU General Public License
78 * version 2. This program is licensed "as is" without any warranty of any
@@ -14,11 +15,12 @@ · 6 unmodified lines
1415 #include <linux/io.h>
1516 #include <linux/of.h>
1617 #include <linux/of_gpio.h>
18+#include <linux/of_address.h>
1719 #include <linux/of_irq.h>
1820 #include <linux/of_platform.h>
19−#include <linux/gpio.h>
2021 #include <linux/slab.h>
2122 #include <linux/irq.h>
23+#include <linux/gpio/driver.h>
2224
2325 #define MPC8XXX_GPIO_PINS 32
2426
@@ -31,32 +33,17 @@ · 6 unmodified lines
3133 #define GPIO_ICR2 0x18
3234
3335 struct mpc8xxx_gpio_chip {
34− struct of_mm_gpio_chip mm_gc;
36+ struct gpio_chip gc;
37+ void __iomem *regs;
3538 raw_spinlock_t lock;
3639
37− /*
38− * shadowed data register to be able to clear/set output pins in
39− * open drain mode safely
40− */
41− u32 data;
40+ int (*direction_output)(struct gpio_chip *chip,
41+ unsigned offset, int value);
42+
4243 struct irq_domain *irq;
4344 unsigned int irqn;
44− const void *of_dev_id_data;
4545 };
4646
47−static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
48−{
49− return 1u << (MPC8XXX_GPIO_PINS - 1 - gpio);
50−}
51−
52−static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm)
53−{
54− struct mpc8xxx_gpio_chip *mpc8xxx_gc =
55− container_of(mm, struct mpc8xxx_gpio_chip, mm_gc);
56−
57− mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT);
58−}
59−
6047 /* Workaround GPIO 1 errata on MPC8572/MPC8536. The status of GPIOs
6148 * defined as output cannot be determined by reading GPDAT register,
6249 * so we use shadow data register instead. The status of input pins
@@ -65,117 +52,36 @@ static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm) · 2 unmodified lines
6552 static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio)
6653 {
6754 u32 val;
68− struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
6955 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
7056 u32 out_mask, out_shadow;
7157
72− out_mask = in_be32(mm->regs + GPIO_DIR);
73−
74− val = in_be32(mm->regs + GPIO_DAT) & ~out_mask;
75− out_shadow = mpc8xxx_gc->data & out_mask;
76−
77− return !!((val | out_shadow) & mpc8xxx_gpio2mask(gpio));
78−}
79−
80−static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio)
81−{
82− struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
83−
84− return in_be32(mm->regs + GPIO_DAT) & mpc8xxx_gpio2mask(gpio);
85−}
86−
87−static void mpc8xxx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
88−{
89− struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
90− struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
91− unsigned long flags;
92−
93− raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
94−
95− if (val)
96− mpc8xxx_gc->data |= mpc8xxx_gpio2mask(gpio);
97− else
98− mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(gpio);
99−
100− out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);
101−
102− raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
103−}
104−
105−static void mpc8xxx_gpio_set_multiple(struct gpio_chip *gc,
106− unsigned long *mask, unsigned long *bits)
107−{
108− struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
109− struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
110− unsigned long flags;
111− int i;
112−
113− raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
114−
115− for (i = 0; i < gc->ngpio; i++) {
116− if (*mask == 0)
117− break;
118− if (__test_and_clear_bit(i, mask)) {
119− if (test_bit(i, bits))
120− mpc8xxx_gc->data |= mpc8xxx_gpio2mask(i);
121− else
122− mpc8xxx_gc->data &= ~mpc8xxx_gpio2mask(i);
123− }
124− }
125−
126− out_be32(mm->regs + GPIO_DAT, mpc8xxx_gc->data);
127−
128− raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
129−}
130−
131−static int mpc8xxx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
132−{
133− struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
134− struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
135− unsigned long flags;
58+ out_mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR);
59+ val = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask;
60+ out_shadow = gc->bgpio_data & out_mask;
13661
137− raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
138−
139− clrbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio));
140−
141− raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
142−
143− return 0;
62+ return !!((val | out_shadow) & gc->pin2mask(gc, gpio));
14463 }
14564
146−static int mpc8xxx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
65+static int mpc5121_gpio_dir_out(struct gpio_chip *gc,
66+ unsigned int gpio, int val)
14767 {
148− struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
14968 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
150− unsigned long flags;
151−
152− mpc8xxx_gpio_set(gc, gpio, val);
153−
154− raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
155−
156− setbits32(mm->regs + GPIO_DIR, mpc8xxx_gpio2mask(gpio));
157−
158− raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
159−
160− return 0;
161−}
162−
163−static int mpc5121_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
164−{
16569 /* GPIO 28..31 are input only on MPC5121 */
16670 if (gpio >= 28)
16771 return -EINVAL;
16872
169− return mpc8xxx_gpio_dir_out(gc, gpio, val);
73+ return mpc8xxx_gc->direction_output(gc, gpio, val);
17074 }
17175
172−static int mpc5125_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
76+static int mpc5125_gpio_dir_out(struct gpio_chip *gc,
77+ unsigned int gpio, int val)
17378 {
79+ struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
17480 /* GPIO 0..3 are input only on MPC5125 */
17581 if (gpio <= 3)
17682 return -EINVAL;
17783
178− return mpc8xxx_gpio_dir_out(gc, gpio, val);
84+ return mpc8xxx_gc->direction_output(gc, gpio, val);
17985 }
18086
18187 static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
@@ -192,10 +98,11 @@ static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc) · 10 unmodified lines
19298 {
19399 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
194100 struct irq_chip *chip = irq_desc_get_chip(desc);
195− struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
101+ struct gpio_chip *gc = &mpc8xxx_gc->gc;
196102 unsigned int mask;
197103
198− mask = in_be32(mm->regs + GPIO_IER) & in_be32(mm->regs + GPIO_IMR);
104+ mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
105+ & gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
199106 if (mask)
200107 generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq,
201108 32 - ffs(mask)));
@@ -206,12 +113,14 @@ static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc) · 4 unmodified lines
206113 static void mpc8xxx_irq_unmask(struct irq_data *d)
207114 {
208115 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
209− struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
116+ struct gpio_chip *gc = &mpc8xxx_gc->gc;
210117 unsigned long flags;
211118
212119 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
213120
214− setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
121+ gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR,
122+ gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR)
123+ | gc->pin2mask(gc, irqd_to_hwirq(d)));
215124
216125 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
217126 }
@@ -219,12 +128,14 @@ static void mpc8xxx_irq_unmask(struct irq_data *d) · 1 unmodified line
219128 static void mpc8xxx_irq_mask(struct irq_data *d)
220129 {
221130 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
222− struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
131+ struct gpio_chip *gc = &mpc8xxx_gc->gc;
223132 unsigned long flags;
224133
225134 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
226135
227− clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
136+ gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR,
137+ gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR)
138+ & ~(gc->pin2mask(gc, irqd_to_hwirq(d))));
228139
229140 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
230141 }
@@ -232,29 +143,32 @@ static void mpc8xxx_irq_mask(struct irq_data *d) · 1 unmodified line
232143 static void mpc8xxx_irq_ack(struct irq_data *d)
233144 {
234145 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
235− struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
146+ struct gpio_chip *gc = &mpc8xxx_gc->gc;
236147
237− out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
148+ gc->write_reg(mpc8xxx_gc->regs + GPIO_IER,
149+ gc->pin2mask(gc, irqd_to_hwirq(d)));
238150 }
239151
240152 static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
241153 {
242154 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
243− struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
155+ struct gpio_chip *gc = &mpc8xxx_gc->gc;
244156 unsigned long flags;
245157
246158 switch (flow_type) {
247159 case IRQ_TYPE_EDGE_FALLING:
248160 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
249− setbits32(mm->regs + GPIO_ICR,
250− mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
161+ gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
162+ gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
163+ | gc->pin2mask(gc, irqd_to_hwirq(d)));
251164 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
252165 break;
253166
254167 case IRQ_TYPE_EDGE_BOTH:
255168 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
256− clrbits32(mm->regs + GPIO_ICR,
257− mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
169+ gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
170+ gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
171+ & ~(gc->pin2mask(gc, irqd_to_hwirq(d))));
258172 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
259173 break;
260174
@@ -268,17 +182,17 @@ static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) · 7 unmodified lines
268182 static int mpc512x_irq_set_type(struct irq_data *d, unsigned int flow_type)
269183 {
270184 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
271− struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
185+ struct gpio_chip *gc = &mpc8xxx_gc->gc;
272186 unsigned long gpio = irqd_to_hwirq(d);
273187 void __iomem *reg;
274188 unsigned int shift;
275189 unsigned long flags;
276190
277191 if (gpio < 16) {
278− reg = mm->regs + GPIO_ICR;
192+ reg = mpc8xxx_gc->regs + GPIO_ICR;
279193 shift = (15 - gpio) * 2;
280194 } else {
281− reg = mm->regs + GPIO_ICR2;
195+ reg = mpc8xxx_gc->regs + GPIO_ICR2;
282196 shift = (15 - (gpio % 16)) * 2;
283197 }
284198
@@ -286,20 +200,22 @@ static int mpc512x_irq_set_type(struct irq_data *d, unsigned int flow_type) · 1 unmodified line
286200 case IRQ_TYPE_EDGE_FALLING:
287201 case IRQ_TYPE_LEVEL_LOW:
288202 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
289− clrsetbits_be32(reg, 3 << shift, 2 << shift);
203+ gc->write_reg(reg, (gc->read_reg(reg) & ~(3 << shift))
204+ | (2 << shift));
290205 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
291206 break;
292207
293208 case IRQ_TYPE_EDGE_RISING:
294209 case IRQ_TYPE_LEVEL_HIGH:
295210 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
296− clrsetbits_be32(reg, 3 << shift, 1 << shift);
211+ gc->write_reg(reg, (gc->read_reg(reg) & ~(3 << shift))
212+ | (1 << shift));
297213 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
298214 break;
299215
300216 case IRQ_TYPE_EDGE_BOTH:
301217 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
302− clrbits32(reg, 3 << shift);
218+ gc->write_reg(reg, (gc->read_reg(reg) & ~(3 << shift)));
303219 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
304220 break;
305221
@@ -354,8 +270,6 @@ static const struct mpc8xxx_gpio_devtype mpc8572_gpio_devtype = { · 48 unmodified lines
354270 };
355271
356272 static const struct mpc8xxx_gpio_devtype mpc8xxx_gpio_devtype_default = {
357− .gpio_dir_out = mpc8xxx_gpio_dir_out,
358− .gpio_get = mpc8xxx_gpio_get,
359273 .irq_set_type = mpc8xxx_irq_set_type,
360274 };
361275
@@ -374,9 +288,7 @@ static int mpc8xxx_probe(struct platform_device *pdev) · 12 unmodified lines
374288 {
375289 struct device_node *np = pdev->dev.of_node;
376290 struct mpc8xxx_gpio_chip *mpc8xxx_gc;
377− struct of_mm_gpio_chip *mm_gc;
378− struct gpio_chip *gc;
379− const struct of_device_id *id;
291+ struct gpio_chip *gc;
380292 const struct mpc8xxx_gpio_devtype *devtype =
381293 of_device_get_match_data(&pdev->dev);
382294 int ret;
@@ -389,12 +301,34 @@ static int mpc8xxx_probe(struct platform_device *pdev) · 6 unmodified lines
389301
390302 raw_spin_lock_init(&mpc8xxx_gc->lock);
391303
392− mm_gc = &mpc8xxx_gc->mm_gc;
393− gc = &mm_gc->gc;
304+ mpc8xxx_gc->regs = of_iomap(np, 0);
305+ if (!mpc8xxx_gc->regs)
306+ return -ENOMEM;
307+
308+ gc = &mpc8xxx_gc->gc;
309+
310+ if (of_property_read_bool(np, "little-endian")) {
311+ ret = bgpio_init(gc, &pdev->dev, 4,
312+ mpc8xxx_gc->regs + GPIO_DAT,
313+ NULL, NULL,
314+ mpc8xxx_gc->regs + GPIO_DIR, NULL,
315+ BGPIOF_BIG_ENDIAN);
316+ if (ret)
317+ goto err;
318+ dev_dbg(&pdev->dev, "GPIO registers are LITTLE endian\n");
319+ } else {
320+ ret = bgpio_init(gc, &pdev->dev, 4,
321+ mpc8xxx_gc->regs + GPIO_DAT,
322+ NULL, NULL,
323+ mpc8xxx_gc->regs + GPIO_DIR, NULL,
324+ BGPIOF_BIG_ENDIAN
325+ | BGPIOF_BIG_ENDIAN_BYTE_ORDER);
326+ if (ret)
327+ goto err;
328+ dev_dbg(&pdev->dev, "GPIO registers are BIG endian\n");
329+ }
394330
395− mm_gc->save_regs = mpc8xxx_gpio_save_regs;
396− gc->ngpio = MPC8XXX_GPIO_PINS;
397− gc->direction_input = mpc8xxx_gpio_dir_in;
331+ mpc8xxx_gc->direction_output = gc->direction_output;
398332
399333 if (!devtype)
400334 devtype = &mpc8xxx_gpio_devtype_default;
@@ -405,18 +339,22 @@ static int mpc8xxx_probe(struct platform_device *pdev) · 4 unmodified lines
405339 */
406340 mpc8xxx_irq_chip.irq_set_type = devtype->irq_set_type;
407341
408− gc->direction_output = devtype->gpio_dir_out ?: mpc8xxx_gpio_dir_out;
409− gc->get = devtype->gpio_get ?: mpc8xxx_gpio_get;
410− gc->set = mpc8xxx_gpio_set;
411− gc->set_multiple = mpc8xxx_gpio_set_multiple;
342+ if (devtype->gpio_dir_out)
343+ gc->direction_output = devtype->gpio_dir_out;
344+ if (devtype->gpio_get)
345+ gc->get = devtype->gpio_get;
346+
412347 gc->to_irq = mpc8xxx_gpio_to_irq;
413348
414− ret = of_mm_gpiochip_add_data(np, mm_gc, mpc8xxx_gc);
415− if (ret)
416− return ret;
349+ ret = gpiochip_add_data(gc, mpc8xxx_gc);
350+ if (ret) {
351+ pr_err("%s: GPIO chip registration failed with status %d\n",
352+ np->full_name, ret);
353+ goto err;
354+ }
417355
418356 mpc8xxx_gc->irqn = irq_of_parse_and_map(np, 0);
419− if (mpc8xxx_gc->irqn == NO_IRQ)
357+ if (!mpc8xxx_gc->irqn)
420358 return 0;
421359
422360 mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS,
@@ -424,18 +362,16 @@ static int mpc8xxx_probe(struct platform_device *pdev) · 1 unmodified line
424362 if (!mpc8xxx_gc->irq)
425363 return 0;
426364
427− id = of_match_node(mpc8xxx_gpio_ids, np);
428− if (id)
429− mpc8xxx_gc->of_dev_id_data = id->data;
430−
431365 /* ack and mask all irqs */
432− out_be32(mm_gc->regs + GPIO_IER, 0xffffffff);
433− out_be32(mm_gc->regs + GPIO_IMR, 0);
366+ gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff);
367+ gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0);
434368
435369 irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
436370 mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
437−
438371 return 0;
372+err:
373+ iounmap(mpc8xxx_gc->regs);
374+ return ret;
439375 }
440376
441377 static int mpc8xxx_remove(struct platform_device *pdev)
@@ -447,7 +383,8 @@ static int mpc8xxx_remove(struct platform_device *pdev) · 5 unmodified lines
447383 irq_domain_remove(mpc8xxx_gc->irq);
448384 }
449385
450− of_mm_gpiochip_remove(&mpc8xxx_gc->mm_gc);
386+ gpiochip_remove(&mpc8xxx_gc->gc);
387+ iounmap(mpc8xxx_gc->regs);
451388
452389 return 0;
453390 }
drivers/gpio/gpio-mvebu.c+3−8
@@ -756,7 +756,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) · 755 unmodified lines
756756 BUG();
757757 }
758758
759− gpiochip_add_data(&mvchip->chip, mvchip);
759+ devm_gpiochip_add_data(&pdev->dev, &mvchip->chip, mvchip);
760760
761761 /* Some gpio controllers do not provide irq support */
762762 if (!of_irq_count(np))
@@ -777,16 +777,14 @@ static int mvebu_gpio_probe(struct platform_device *pdev) · 14 unmodified lines
777777 mvchip->irqbase = irq_alloc_descs(-1, 0, ngpios, -1);
778778 if (mvchip->irqbase < 0) {
779779 dev_err(&pdev->dev, "no irqs\n");
780− err = mvchip->irqbase;
781− goto err_gpiochip_add;
780+ return mvchip->irqbase;
782781 }
783782
784783 gc = irq_alloc_generic_chip("mvebu_gpio_irq", 2, mvchip->irqbase,
785784 mvchip->membase, handle_level_irq);
786785 if (!gc) {
787786 dev_err(&pdev->dev, "Cannot allocate generic irq_chip\n");
788− err = -ENOMEM;
789− goto err_gpiochip_add;
787+ return -ENOMEM;
790788 }
791789
792790 gc->private = mvchip;
@@ -828,9 +826,6 @@ err_generic_chip: · 35 unmodified lines
828826 IRQ_LEVEL | IRQ_NOPROBE);
829827 kfree(gc);
830828
831−err_gpiochip_add:
832− gpiochip_remove(&mvchip->chip);
833−
834829 return err;
835830 }
836831
drivers/gpio/gpio-mxc.c+2−4
@@ -462,14 +462,14 @@ static int mxc_gpio_probe(struct platform_device *pdev) · 461 unmodified lines
462462 port->gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 :
463463 pdev->id * 32;
464464
465− err = gpiochip_add_data(&port->gc, port);
465+ err = devm_gpiochip_add_data(&pdev->dev, &port->gc, port);
466466 if (err)
467467 goto out_bgio;
468468
469469 irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
470470 if (irq_base < 0) {
471471 err = irq_base;
472− goto out_gpiochip_remove;
472+ goto out_bgio;
473473 }
474474
475475 port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,
@@ -492,8 +492,6 @@ out_irqdomain_remove: · 16 unmodified lines
492492 irq_domain_remove(port->domain);
493493 out_irqdesc_free:
494494 irq_free_descs(irq_base, 32);
495−out_gpiochip_remove:
496− gpiochip_remove(&port->gc);
497495 out_bgio:
498496 dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err);
499497 return err;
drivers/gpio/gpio-octeon.c+1−9
@@ -117,7 +117,7 @@ static int octeon_gpio_probe(struct platform_device *pdev) · 116 unmodified lines
117117 chip->get = octeon_gpio_get;
118118 chip->direction_output = octeon_gpio_dir_out;
119119 chip->set = octeon_gpio_set;
120− err = gpiochip_add_data(chip, gpio);
120+ err = devm_gpiochip_add_data(&pdev->dev, chip, gpio);
121121 if (err)
122122 goto out;
123123
@@ -126,13 +126,6 @@ out: · 2 unmodified lines
126126 return err;
127127 }
128128
129−static int octeon_gpio_remove(struct platform_device *pdev)
130−{
131− struct gpio_chip *chip = dev_get_platdata(&pdev->dev);
132− gpiochip_remove(chip);
133− return 0;
134−}
135−
136129 static struct of_device_id octeon_gpio_match[] = {
137130 {
138131 .compatible = "cavium,octeon-3860-gpio",
@@ -147,7 +140,6 @@ static struct platform_driver octeon_gpio_driver = { · 8 unmodified lines
147140 .of_match_table = octeon_gpio_match,
148141 },
149142 .probe = octeon_gpio_probe,
150− .remove = octeon_gpio_remove,
151143 };
152144
153145 module_platform_driver(octeon_gpio_driver);
drivers/gpio/gpio-omap.c+29−28
@@ -66,7 +66,6 @@ struct gpio_bank { · 65 unmodified lines
6666 u32 irq_usage;
6767 u32 dbck_enable_mask;
6868 bool dbck_enabled;
69− struct device *dev;
7069 bool is_mpuio;
7170 bool dbck_flag;
7271 bool loses_context;
@@ -627,7 +626,7 @@ static int omap_set_gpio_wakeup(struct gpio_bank *bank, unsigned offset, · 554 unmodified lines
627626 unsigned long flags;
628627
629628 if (bank->non_wakeup_gpios & gpio_bit) {
630− dev_err(bank->dev,
629+ dev_err(bank->chip.parent,
631630 "Unable to modify wakeup on non-wakeup GPIO%d\n",
632631 offset);
633632 return -EINVAL;
@@ -669,7 +668,7 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) · 35 unmodified lines
669668 * enable the bank module.
670669 */
671670 if (!BANK_USED(bank))
672− pm_runtime_get_sync(bank->dev);
671+ pm_runtime_get_sync(chip->parent);
673672
674673 raw_spin_lock_irqsave(&bank->lock, flags);
675674 omap_enable_gpio_module(bank, offset);
@@ -698,7 +697,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) · 22 unmodified lines
698697 * disable the bank module.
699698 */
700699 if (!BANK_USED(bank))
701− pm_runtime_put(bank->dev);
700+ pm_runtime_put(chip->parent);
702701 }
703702
704703 /*
@@ -723,7 +722,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) · 18 unmodified lines
723722 if (WARN_ON(!isr_reg))
724723 goto exit;
725724
726− pm_runtime_get_sync(bank->dev);
725+ pm_runtime_get_sync(bank->chip.parent);
727726
728727 while (1) {
729728 u32 isr_saved, level_mask = 0;
@@ -776,7 +775,7 @@ static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) · 46 unmodified lines
776775 }
777776 }
778777 exit:
779− pm_runtime_put(bank->dev);
778+ pm_runtime_put(bank->chip.parent);
780779 return IRQ_HANDLED;
781780 }
782781
@@ -826,7 +825,7 @@ static void omap_gpio_irq_bus_lock(struct irq_data *data) · 43 unmodified lines
826825 struct gpio_bank *bank = omap_irq_data_get_bank(data);
827826
828827 if (!BANK_USED(bank))
829− pm_runtime_get_sync(bank->dev);
828+ pm_runtime_get_sync(bank->chip.parent);
830829 }
831830
832831 static void gpio_irq_bus_sync_unlock(struct irq_data *data)
@@ -838,7 +837,7 @@ static void gpio_irq_bus_sync_unlock(struct irq_data *data) · 5 unmodified lines
838837 * disable the bank module.
839838 */
840839 if (!BANK_USED(bank))
841− pm_runtime_put(bank->dev);
840+ pm_runtime_put(bank->chip.parent);
842841 }
843842
844843 static void omap_gpio_ack_irq(struct irq_data *d)
@@ -1100,7 +1099,8 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) · 255 unmodified lines
11001099
11011100 ret = gpiochip_add_data(&bank->chip, bank);
11021101 if (ret) {
1103− dev_err(bank->dev, "Could not register gpio chip %d\n", ret);
1102+ dev_err(bank->chip.parent,
1103+ "Could not register gpio chip %d\n", ret);
11041104 return ret;
11051105 }
11061106
@@ -1114,7 +1114,7 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) · 7 unmodified lines
11141114 */
11151115 irq_base = irq_alloc_descs(-1, 0, bank->width, 0);
11161116 if (irq_base < 0) {
1117− dev_err(bank->dev, "Couldn't allocate IRQ numbers\n");
1117+ dev_err(bank->chip.parent, "Couldn't allocate IRQ numbers\n");
11181118 return -ENODEV;
11191119 }
11201120 #endif
@@ -1131,15 +1131,17 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) · 10 unmodified lines
11311131 IRQ_TYPE_NONE);
11321132
11331133 if (ret) {
1134− dev_err(bank->dev, "Couldn't add irqchip to gpiochip %d\n", ret);
1134+ dev_err(bank->chip.parent,
1135+ "Couldn't add irqchip to gpiochip %d\n", ret);
11351136 gpiochip_remove(&bank->chip);
11361137 return -ENODEV;
11371138 }
11381139
11391140 gpiochip_set_chained_irqchip(&bank->chip, irqc, bank->irq, NULL);
11401141
1141− ret = devm_request_irq(bank->dev, bank->irq, omap_gpio_irq_handler,
1142− 0, dev_name(bank->dev), bank);
1142+ ret = devm_request_irq(bank->chip.parent, bank->irq,
1143+ omap_gpio_irq_handler,
1144+ 0, dev_name(bank->chip.parent), bank);
11431145 if (ret)
11441146 gpiochip_remove(&bank->chip);
11451147
@@ -1196,7 +1198,6 @@ static int omap_gpio_probe(struct platform_device *pdev) · 50 unmodified lines
11961198 return bank->irq;
11971199 }
11981200
1199− bank->dev = dev;
12001201 bank->chip.parent = dev;
12011202 bank->chip.owner = THIS_MODULE;
12021203 bank->dbck_flag = pdata->dbck_flag;
@@ -1235,9 +1236,9 @@ static int omap_gpio_probe(struct platform_device *pdev) · 32 unmodified lines
12351236 }
12361237
12371238 if (bank->dbck_flag) {
1238− bank->dbck = devm_clk_get(bank->dev, "dbclk");
1239+ bank->dbck = devm_clk_get(dev, "dbclk");
12391240 if (IS_ERR(bank->dbck)) {
1240− dev_err(bank->dev,
1241+ dev_err(dev,
12411242 "Could not get gpio dbck. Disable debounce\n");
12421243 bank->dbck_flag = false;
12431244 } else {
@@ -1247,9 +1248,9 @@ static int omap_gpio_probe(struct platform_device *pdev) · 3 unmodified lines
12471248
12481249 platform_set_drvdata(pdev, bank);
12491250
1250− pm_runtime_enable(bank->dev);
1251− pm_runtime_irq_safe(bank->dev);
1252− pm_runtime_get_sync(bank->dev);
1251+ pm_runtime_enable(dev);
1252+ pm_runtime_irq_safe(dev);
1253+ pm_runtime_get_sync(dev);
12531254
12541255 if (bank->is_mpuio)
12551256 omap_mpuio_init(bank);
@@ -1258,14 +1259,14 @@ static int omap_gpio_probe(struct platform_device *pdev) · 2 unmodified lines
12581259
12591260 ret = omap_gpio_chip_init(bank, irqc);
12601261 if (ret) {
1261− pm_runtime_put_sync(bank->dev);
1262− pm_runtime_disable(bank->dev);
1262+ pm_runtime_put_sync(dev);
1263+ pm_runtime_disable(dev);
12631264 return ret;
12641265 }
12651266
12661267 omap_gpio_show_rev(bank);
12671268
1268− pm_runtime_put(bank->dev);
1269+ pm_runtime_put(dev);
12691270
12701271 list_add_tail(&bank->node, &omap_gpio_list);
12711272
@@ -1278,7 +1279,7 @@ static int omap_gpio_remove(struct platform_device *pdev) · 6 unmodified lines
12781279
12791280 list_del(&bank->node);
12801281 gpiochip_remove(&bank->chip);
1281− pm_runtime_disable(bank->dev);
1282+ pm_runtime_disable(&pdev->dev);
12821283 if (bank->dbck_flag)
12831284 clk_unprepare(bank->dbck);
12841285
@@ -1348,7 +1349,7 @@ static int omap_gpio_runtime_suspend(struct device *dev) · 63 unmodified lines
13481349 update_gpio_context_count:
13491350 if (bank->get_context_loss_count)
13501351 bank->context_loss_count =
1351− bank->get_context_loss_count(bank->dev);
1352+ bank->get_context_loss_count(dev);
13521353
13531354 omap_gpio_dbck_disable(bank);
13541355 raw_spin_unlock_irqrestore(&bank->lock, flags);
@@ -1378,7 +1379,7 @@ static int omap_gpio_runtime_resume(struct device *dev) · 23 unmodified lines
13781379
13791380 if (bank->get_context_loss_count)
13801381 bank->context_loss_count =
1381− bank->get_context_loss_count(bank->dev);
1382+ bank->get_context_loss_count(dev);
13821383 }
13831384
13841385 omap_gpio_dbck_enable(bank);
@@ -1398,7 +1399,7 @@ static int omap_gpio_runtime_resume(struct device *dev) · 13 unmodified lines
13981399 if (!bank->get_context_loss_count) {
13991400 omap_gpio_restore_context(bank);
14001401 } else {
1401− c = bank->get_context_loss_count(bank->dev);
1402+ c = bank->get_context_loss_count(dev);
14021403 if (c != bank->context_loss_count) {
14031404 omap_gpio_restore_context(bank);
14041405 } else {
@@ -1481,7 +1482,7 @@ void omap2_gpio_prepare_for_idle(int pwr_mode) · 76 unmodified lines
14811482
14821483 bank->power_mode = pwr_mode;
14831484
1484− pm_runtime_put_sync_suspend(bank->dev);
1485+ pm_runtime_put_sync_suspend(bank->chip.parent);
14851486 }
14861487 }
14871488
@@ -1493,7 +1494,7 @@ void omap2_gpio_resume_after_idle(void) · 5 unmodified lines
14931494 if (!BANK_USED(bank) || !bank->loses_context)
14941495 continue;
14951496
1496− pm_runtime_get_sync(bank->dev);
1497+ pm_runtime_get_sync(bank->chip.parent);
14971498 }
14981499 }
14991500 #endif
drivers/gpio/gpio-palmas.c+2−10
@@ -195,7 +195,8 @@ static int palmas_gpio_probe(struct platform_device *pdev) · 194 unmodified lines
195195 else
196196 palmas_gpio->gpio_chip.base = -1;
197197
198− ret = gpiochip_add_data(&palmas_gpio->gpio_chip, palmas_gpio);
198+ ret = devm_gpiochip_add_data(&pdev->dev, &palmas_gpio->gpio_chip,
199+ palmas_gpio);
199200 if (ret < 0) {
200201 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
201202 return ret;
@@ -205,20 +206,11 @@ static int palmas_gpio_probe(struct platform_device *pdev) · 3 unmodified lines
205206 return ret;
206207 }
207208
208−static int palmas_gpio_remove(struct platform_device *pdev)
209−{
210− struct palmas_gpio *palmas_gpio = platform_get_drvdata(pdev);
211−
212− gpiochip_remove(&palmas_gpio->gpio_chip);
213− return 0;
214−}
215−
216209 static struct platform_driver palmas_gpio_driver = {
217210 .driver.name = "palmas-gpio",
218211 .driver.owner = THIS_MODULE,
219212 .driver.of_match_table = of_palmas_gpio_match,
220213 .probe = palmas_gpio_probe,
221− .remove = palmas_gpio_remove,
222214 };
223215
224216 static int __init palmas_gpio_init(void)
drivers/gpio/gpio-pca953x.c+5−5
@@ -367,9 +367,11 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, · 366 unmodified lines
367367 memcpy(reg_val, chip->reg_output, NBANK(chip));
368368 mutex_lock(&chip->i2c_lock);
369369 for(bank=0; bank<NBANK(chip); bank++) {
370− unsigned bankmask = mask[bank/4] >> ((bank % 4) * 8);
370+ unsigned bankmask = mask[bank / sizeof(*mask)] >>
371+ ((bank % sizeof(*mask)) * 8);
371372 if(bankmask) {
372− unsigned bankval = bits[bank/4] >> ((bank % 4) * 8);
373+ unsigned bankval = bits[bank / sizeof(*bits)] >>
374+ ((bank % sizeof(*bits)) * 8);
373375 reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval;
374376 }
375377 }
@@ -754,7 +756,7 @@ static int pca953x_probe(struct i2c_client *client, · 378 unmodified lines
754756 if (ret)
755757 return ret;
756758
757− ret = gpiochip_add_data(&chip->gpio_chip, chip);
759+ ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
758760 if (ret)
759761 return ret;
760762
@@ -789,8 +791,6 @@ static int pca953x_remove(struct i2c_client *client) · 28 unmodified lines
789791 }
790792 }
791793
792− gpiochip_remove(&chip->gpio_chip);
793−
794794 return 0;
795795 }
796796
drivers/gpio/gpio-pcf857x.c+3−7
@@ -372,7 +372,7 @@ static int pcf857x_probe(struct i2c_client *client, · 371 unmodified lines
372372 gpio->out = ~n_latch;
373373 gpio->status = gpio->out;
374374
375− status = gpiochip_add_data(&gpio->chip, gpio);
375+ status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
376376 if (status < 0)
377377 goto fail;
378378
@@ -383,7 +383,7 @@ static int pcf857x_probe(struct i2c_client *client, · 4 unmodified lines
383383 IRQ_TYPE_NONE);
384384 if (status) {
385385 dev_err(&client->dev, "cannot add irqchip\n");
386− goto fail_irq;
386+ goto fail;
387387 }
388388
389389 status = devm_request_threaded_irq(&client->dev, client->irq,
@@ -391,7 +391,7 @@ static int pcf857x_probe(struct i2c_client *client, · 1 unmodified line
391391 IRQF_TRIGGER_FALLING | IRQF_SHARED,
392392 dev_name(&client->dev), gpio);
393393 if (status)
394− goto fail_irq;
394+ goto fail;
395395
396396 gpiochip_set_chained_irqchip(&gpio->chip, &pcf857x_irq_chip,
397397 client->irq, NULL);
@@ -413,9 +413,6 @@ static int pcf857x_probe(struct i2c_client *client, · 15 unmodified lines
413413
414414 return 0;
415415
416−fail_irq:
417− gpiochip_remove(&gpio->chip);
418−
419416 fail:
420417 dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
421418 client->name);
@@ -440,7 +437,6 @@ static int pcf857x_remove(struct i2c_client *client) · 18 unmodified lines
440437 }
441438 }
442439
443− gpiochip_remove(&gpio->chip);
444440 return status;
445441 }
446442
drivers/gpio/gpio-pisosr.c+183−0
@@ -0,0 +1,183 @@
1+/*
2+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
3+ * Andrew F. Davis <afd@ti.com>
4+ *
5+ * This program is free software; you can redistribute it and/or
6+ * modify it under the terms of the GNU General Public License version 2 as
7+ * published by the Free Software Foundation.
8+ *
9+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
10+ * kind, whether expressed or implied; without even the implied warranty
11+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12+ * GNU General Public License version 2 for more details.
13+ */
14+
15+#include <linux/delay.h>
16+#include <linux/gpio/consumer.h>
17+#include <linux/gpio/driver.h>
18+#include <linux/module.h>
19+#include <linux/mutex.h>
20+#include <linux/spi/spi.h>
21+
22+#define DEFAULT_NGPIO 8
23+
24+/**
25+ * struct pisosr_gpio - GPIO driver data
26+ * @chip: GPIO controller chip
27+ * @spi: SPI device pointer
28+ * @buffer: Buffer for device reads
29+ * @buffer_size: Size of buffer
30+ * @load_gpio: GPIO pin used to load input into device
31+ * @lock: Protects read sequences
32+ */
33+struct pisosr_gpio {
34+ struct gpio_chip chip;
35+ struct spi_device *spi;
36+ u8 *buffer;
37+ size_t buffer_size;
38+ struct gpio_desc *load_gpio;
39+ struct mutex lock;
40+};
41+
42+static int pisosr_gpio_refresh(struct pisosr_gpio *gpio)
43+{
44+ int ret;
45+
46+ mutex_lock(&gpio->lock);
47+
48+ if (gpio->load_gpio) {
49+ gpiod_set_value_cansleep(gpio->load_gpio, 1);
50+ udelay(1); /* registers load time (~10ns) */
51+ gpiod_set_value_cansleep(gpio->load_gpio, 0);
52+ udelay(1); /* registers recovery time (~5ns) */
53+ }
54+
55+ ret = spi_read(gpio->spi, gpio->buffer, gpio->buffer_size);
56+
57+ mutex_unlock(&gpio->lock);
58+
59+ return ret;
60+}
61+
62+static int pisosr_gpio_get_direction(struct gpio_chip *chip,
63+ unsigned offset)
64+{
65+ /* This device always input */
66+ return 1;
67+}
68+
69+static int pisosr_gpio_direction_input(struct gpio_chip *chip,
70+ unsigned offset)
71+{
72+ /* This device always input */
73+ return 0;
74+}
75+
76+static int pisosr_gpio_direction_output(struct gpio_chip *chip,
77+ unsigned offset, int value)
78+{
79+ /* This device is input only */
80+ return -EINVAL;
81+}
82+
83+static int pisosr_gpio_get(struct gpio_chip *chip, unsigned offset)
84+{
85+ struct pisosr_gpio *gpio = gpiochip_get_data(chip);
86+
87+ /* Refresh may not always be needed */
88+ pisosr_gpio_refresh(gpio);
89+
90+ return (gpio->buffer[offset / 8] >> (offset % 8)) & 0x1;
91+}
92+
93+static struct gpio_chip template_chip = {
94+ .label = "pisosr-gpio",
95+ .owner = THIS_MODULE,
96+ .get_direction = pisosr_gpio_get_direction,
97+ .direction_input = pisosr_gpio_direction_input,
98+ .direction_output = pisosr_gpio_direction_output,
99+ .get = pisosr_gpio_get,
100+ .base = -1,
101+ .ngpio = DEFAULT_NGPIO,
102+ .can_sleep = true,
103+};
104+
105+static int pisosr_gpio_probe(struct spi_device *spi)
106+{
107+ struct device *dev = &spi->dev;
108+ struct pisosr_gpio *gpio;
109+ int ret;
110+
111+ gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL);
112+ if (!gpio)
113+ return -ENOMEM;
114+
115+ spi_set_drvdata(spi, gpio);
116+
117+ gpio->chip = template_chip;
118+ gpio->chip.parent = dev;
119+ of_property_read_u16(dev->of_node, "ngpios", &gpio->chip.ngpio);
120+
121+ gpio->spi = spi;
122+
123+ gpio->buffer_size = DIV_ROUND_UP(gpio->chip.ngpio, 8);
124+ gpio->buffer = devm_kzalloc(dev, gpio->buffer_size, GFP_KERNEL);
125+ if (!gpio->buffer)
126+ return -ENOMEM;
127+
128+ gpio->load_gpio = devm_gpiod_get_optional(dev, "load", GPIOD_OUT_LOW);
129+ if (IS_ERR(gpio->load_gpio)) {
130+ ret = PTR_ERR(gpio->load_gpio);
131+ if (ret != -EPROBE_DEFER)
132+ dev_err(dev, "Unable to allocate load GPIO\n");
133+ return ret;
134+ }
135+
136+ mutex_init(&gpio->lock);
137+
138+ ret = gpiochip_add_data(&gpio->chip, gpio);
139+ if (ret < 0) {
140+ dev_err(dev, "Unable to register gpiochip\n");
141+ return ret;
142+ }
143+
144+ return 0;
145+}
146+
147+static int pisosr_gpio_remove(struct spi_device *spi)
148+{
149+ struct pisosr_gpio *gpio = spi_get_drvdata(spi);
150+
151+ gpiochip_remove(&gpio->chip);
152+
153+ mutex_destroy(&gpio->lock);
154+
155+ return 0;
156+}
157+
158+static const struct spi_device_id pisosr_gpio_id_table[] = {
159+ { "pisosr-gpio", },
160+ { /* sentinel */ }
161+};
162+MODULE_DEVICE_TABLE(spi, pisosr_gpio_id_table);
163+
164+static const struct of_device_id pisosr_gpio_of_match_table[] = {
165+ { .compatible = "pisosr-gpio", },
166+ { /* sentinel */ }
167+};
168+MODULE_DEVICE_TABLE(of, pisosr_gpio_of_match_table);
169+
170+static struct spi_driver pisosr_gpio_driver = {
171+ .driver = {
172+ .name = "pisosr-gpio",
173+ .of_match_table = pisosr_gpio_of_match_table,
174+ },
175+ .probe = pisosr_gpio_probe,
176+ .remove = pisosr_gpio_remove,
177+ .id_table = pisosr_gpio_id_table,
178+};
179+module_spi_driver(pisosr_gpio_driver);
180+
181+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
182+MODULE_DESCRIPTION("SPI Compatible PISO Shift Register GPIO Driver");
183+MODULE_LICENSE("GPL v2");
drivers/gpio/gpio-rc5t583.c+2−10
@@ -136,15 +136,8 @@ static int rc5t583_gpio_probe(struct platform_device *pdev) · 135 unmodified lines
136136
137137 platform_set_drvdata(pdev, rc5t583_gpio);
138138
139− return gpiochip_add_data(&rc5t583_gpio->gpio_chip, rc5t583_gpio);
140−}
141−
142−static int rc5t583_gpio_remove(struct platform_device *pdev)
143−{
144− struct rc5t583_gpio *rc5t583_gpio = platform_get_drvdata(pdev);
145−
146− gpiochip_remove(&rc5t583_gpio->gpio_chip);
147− return 0;
139+ return devm_gpiochip_add_data(&pdev->dev, &rc5t583_gpio->gpio_chip,
140+ rc5t583_gpio);
148141 }
149142
150143 static struct platform_driver rc5t583_gpio_driver = {
@@ -152,7 +145,6 @@ static struct platform_driver rc5t583_gpio_driver = { · 1 unmodified line
152145 .name = "rc5t583-gpio",
153146 },
154147 .probe = rc5t583_gpio_probe,
155− .remove = rc5t583_gpio_remove,
156148 };
157149
158150 static int __init rc5t583_gpio_init(void)
drivers/gpio/gpio-rdc321x.c+2−11
@@ -194,23 +194,14 @@ static int rdc321x_gpio_probe(struct platform_device *pdev) · 193 unmodified lines
194194
195195 dev_info(&pdev->dev, "registering %d GPIOs\n",
196196 rdc321x_gpio_dev->chip.ngpio);
197− return gpiochip_add_data(&rdc321x_gpio_dev->chip, rdc321x_gpio_dev);
198−}
199−
200−static int rdc321x_gpio_remove(struct platform_device *pdev)
201−{
202− struct rdc321x_gpio *rdc321x_gpio_dev = platform_get_drvdata(pdev);
203−
204− gpiochip_remove(&rdc321x_gpio_dev->chip);
205−
206− return 0;
197+ return devm_gpiochip_add_data(&pdev->dev, &rdc321x_gpio_dev->chip,
198+ rdc321x_gpio_dev);
207199 }
208200
209201 static struct platform_driver rdc321x_gpio_driver = {
210202 .driver.name = "rdc321x-gpio",
211203 .driver.owner = THIS_MODULE,
212204 .probe = rdc321x_gpio_probe,
213− .remove = rdc321x_gpio_remove,
214205 };
215206
216207 module_platform_driver(rdc321x_gpio_driver);
drivers/gpio/gpio-sch.c+1−10
@@ -215,15 +215,7 @@ static int sch_gpio_probe(struct platform_device *pdev) · 214 unmodified lines
215215
216216 platform_set_drvdata(pdev, sch);
217217
218− return gpiochip_add_data(&sch->chip, sch);
219−}
220−
221−static int sch_gpio_remove(struct platform_device *pdev)
222−{
223− struct sch_gpio *sch = platform_get_drvdata(pdev);
224−
225− gpiochip_remove(&sch->chip);
226− return 0;
218+ return devm_gpiochip_add_data(&pdev->dev, &sch->chip, sch);
227219 }
228220
229221 static struct platform_driver sch_gpio_driver = {
@@ -231,7 +223,6 @@ static struct platform_driver sch_gpio_driver = { · 1 unmodified line
231223 .name = "sch_gpio",
232224 },
233225 .probe = sch_gpio_probe,
234− .remove = sch_gpio_remove,
235226 };
236227
237228 module_platform_driver(sch_gpio_driver);
drivers/gpio/gpio-sch311x.c+3−5
@@ -12,6 +12,7 @@ · 11 unmodified lines
1212 * (at your option) any later version.
1313 */
1414
15+#include <linux/ioport.h>
1516 #include <linux/module.h>
1617 #include <linux/kernel.h>
1718 #include <linux/init.h>
@@ -228,7 +229,8 @@ static int sch311x_gpio_probe(struct platform_device *pdev) · 210 unmodified lines
228229 int err, i;
229230
230231 /* we can register all GPIO data registers at once */
231− if (!request_region(pdata->runtime_reg + GP1, 6, DRV_NAME)) {
232+ if (!devm_request_region(&pdev->dev, pdata->runtime_reg + GP1, 6,
233+ DRV_NAME)) {
232234 dev_err(&pdev->dev, "Failed to request region 0x%04x-0x%04x.\n",
233235 pdata->runtime_reg + GP1, pdata->runtime_reg + GP1 + 5);
234236 return -EBUSY;
@@ -273,7 +275,6 @@ static int sch311x_gpio_probe(struct platform_device *pdev) · 38 unmodified lines
273275 return 0;
274276
275277 exit_err:
276− release_region(pdata->runtime_reg + GP1, 6);
277278 /* release already registered chips */
278279 for (--i; i >= 0; i--)
279280 gpiochip_remove(&priv->blocks[i].chip);
@@ -282,12 +283,9 @@ exit_err: · 2 unmodified lines
282283
283284 static int sch311x_gpio_remove(struct platform_device *pdev)
284285 {
285− struct sch311x_pdev_data *pdata = dev_get_platdata(&pdev->dev);
286286 struct sch311x_gpio_priv *priv = platform_get_drvdata(pdev);
287287 int i;
288288
289− release_region(pdata->runtime_reg + GP1, 6);
290−
291289 for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) {
292290 gpiochip_remove(&priv->blocks[i].chip);
293291 dev_info(&pdev->dev,
drivers/gpio/gpio-spear-spics.c+1−1
@@ -165,7 +165,7 @@ static int spics_gpio_probe(struct platform_device *pdev) · 164 unmodified lines
165165 spics->chip.owner = THIS_MODULE;
166166 spics->last_off = -1;
167167
168− ret = gpiochip_add_data(&spics->chip, spics);
168+ ret = devm_gpiochip_add_data(&pdev->dev, &spics->chip, spics);
169169 if (ret) {
170170 dev_err(&pdev->dev, "unable to add gpio chip\n");
171171 return ret;
drivers/gpio/gpio-sta2x11.c+1−1
@@ -409,7 +409,7 @@ static int gsta_probe(struct platform_device *dev) · 408 unmodified lines
409409 goto err_free_descs;
410410 }
411411
412− err = gpiochip_add_data(&chip->gpio, chip);
412+ err = devm_gpiochip_add_data(&dev->dev, &chip->gpio, chip);
413413 if (err < 0) {
414414 dev_err(&dev->dev, "sta2x11 gpio: Can't register (%i)\n",
415415 -err);
drivers/gpio/gpio-stp-xway.c+1−1
@@ -258,7 +258,7 @@ static int xway_stp_probe(struct platform_device *pdev) · 257 unmodified lines
258258
259259 ret = xway_stp_hw_init(chip);
260260 if (!ret)
261− ret = gpiochip_add_data(&chip->gc, chip);
261+ ret = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip);
262262
263263 if (!ret)
264264 dev_info(&pdev->dev, "Init done\n");
drivers/gpio/gpio-sx150x.c+2−16
@@ -687,7 +687,7 @@ static int sx150x_probe(struct i2c_client *client, · 686 unmodified lines
687687 if (rc < 0)
688688 return rc;
689689
690− rc = gpiochip_add_data(&chip->gpio_chip, chip);
690+ rc = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
691691 if (rc)
692692 return rc;
693693
@@ -696,24 +696,11 @@ static int sx150x_probe(struct i2c_client *client, · 2 unmodified lines
696696 pdata->irq_summary,
697697 pdata->irq_base);
698698 if (rc < 0)
699− goto probe_fail_post_gpiochip_add;
699+ return rc;
700700 }
701701
702702 i2c_set_clientdata(client, chip);
703703
704− return 0;
705−probe_fail_post_gpiochip_add:
706− gpiochip_remove(&chip->gpio_chip);
707− return rc;
708−}
709−
710−static int sx150x_remove(struct i2c_client *client)
711−{
712− struct sx150x_chip *chip;
713−
714− chip = i2c_get_clientdata(client);
715− gpiochip_remove(&chip->gpio_chip);
716−
717704 return 0;
718705 }
719706
@@ -723,7 +710,6 @@ static struct i2c_driver sx150x_driver = { · 3 unmodified lines
723710 .of_match_table = of_match_ptr(sx150x_of_match),
724711 },
725712 .probe = sx150x_probe,
726− .remove = sx150x_remove,
727713 .id_table = sx150x_id,
728714 };
729715
drivers/gpio/gpio-syscon.c+1−10
@@ -238,15 +238,7 @@ static int syscon_gpio_probe(struct platform_device *pdev) · 237 unmodified lines
238238
239239 platform_set_drvdata(pdev, priv);
240240
241− return gpiochip_add_data(&priv->chip, priv);
242−}
243−
244−static int syscon_gpio_remove(struct platform_device *pdev)
245−{
246− struct syscon_gpio_priv *priv = platform_get_drvdata(pdev);
247−
248− gpiochip_remove(&priv->chip);
249− return 0;
241+ return devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv);
250242 }
251243
252244 static struct platform_driver syscon_gpio_driver = {
@@ -255,7 +247,6 @@ static struct platform_driver syscon_gpio_driver = { · 2 unmodified lines
255247 .of_match_table = syscon_gpio_ids,
256248 },
257249 .probe = syscon_gpio_probe,
258− .remove = syscon_gpio_remove,
259250 };
260251 module_platform_driver(syscon_gpio_driver);
261252
drivers/gpio/gpio-tb10x.c+6−16
@@ -205,10 +205,10 @@ static int tb10x_gpio_probe(struct platform_device *pdev) · 204 unmodified lines
205205 tb10x_gpio->gc.can_sleep = false;
206206
207207
208− ret = gpiochip_add_data(&tb10x_gpio->gc, tb10x_gpio);
208+ ret = devm_gpiochip_add_data(&pdev->dev, &tb10x_gpio->gc, tb10x_gpio);
209209 if (ret < 0) {
210210 dev_err(&pdev->dev, "Could not add gpiochip.\n");
211− goto fail_gpiochip_registration;
211+ return ret;
212212 }
213213
214214 platform_set_drvdata(pdev, tb10x_gpio);
@@ -219,7 +219,7 @@ static int tb10x_gpio_probe(struct platform_device *pdev) · 4 unmodified lines
219219 ret = platform_get_irq(pdev, 0);
220220 if (ret < 0) {
221221 dev_err(&pdev->dev, "No interrupt specified.\n");
222− goto fail_get_irq;
222+ return ret;
223223 }
224224
225225 tb10x_gpio->gc.to_irq = tb10x_gpio_to_irq;
@@ -229,14 +229,13 @@ static int tb10x_gpio_probe(struct platform_device *pdev) · 3 unmodified lines
229229 IRQF_TRIGGER_NONE | IRQF_SHARED,
230230 dev_name(&pdev->dev), tb10x_gpio);
231231 if (ret != 0)
232− goto fail_request_irq;
232+ return ret;
233233
234234 tb10x_gpio->domain = irq_domain_add_linear(dn,
235235 tb10x_gpio->gc.ngpio,
236236 &irq_generic_chip_ops, NULL);
237237 if (!tb10x_gpio->domain) {
238− ret = -ENOMEM;
239− goto fail_irq_domain;
238+ return -ENOMEM;
240239 }
241240
242241 ret = irq_alloc_domain_generic_chips(tb10x_gpio->domain,
@@ -244,7 +243,7 @@ static int tb10x_gpio_probe(struct platform_device *pdev) · 1 unmodified line
244243 handle_edge_irq, IRQ_NOREQUEST, IRQ_NOPROBE,
245244 IRQ_GC_INIT_MASK_CACHE);
246245 if (ret)
247− goto fail_irq_domain;
246+ return ret;
248247
249248 gc = tb10x_gpio->domain->gc->gc[0];
250249 gc->reg_base = tb10x_gpio->base;
@@ -258,14 +257,6 @@ static int tb10x_gpio_probe(struct platform_device *pdev) · 7 unmodified lines
258257 }
259258
260259 return 0;
261−
262−fail_irq_domain:
263−fail_request_irq:
264−fail_get_irq:
265− gpiochip_remove(&tb10x_gpio->gc);
266−fail_gpiochip_registration:
267−fail_ioremap:
268− return ret;
269260 }
270261
271262 static int tb10x_gpio_remove(struct platform_device *pdev)
@@ -278,7 +269,6 @@ static int tb10x_gpio_remove(struct platform_device *pdev) · 6 unmodified lines
278269 kfree(tb10x_gpio->domain->gc);
279270 irq_domain_remove(tb10x_gpio->domain);
280271 }
281− gpiochip_remove(&tb10x_gpio->gc);
282272
283273 return 0;
284274 }
drivers/gpio/gpio-tc3589x.c+2−11
@@ -272,7 +272,8 @@ static int tc3589x_gpio_probe(struct platform_device *pdev) · 271 unmodified lines
272272 return ret;
273273 }
274274
275− ret = gpiochip_add_data(&tc3589x_gpio->chip, tc3589x_gpio);
275+ ret = devm_gpiochip_add_data(&pdev->dev, &tc3589x_gpio->chip,
276+ tc3589x_gpio);
276277 if (ret) {
277278 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
278279 return ret;
@@ -299,20 +300,10 @@ static int tc3589x_gpio_probe(struct platform_device *pdev) · 20 unmodified lines
299300 return 0;
300301 }
301302
302−static int tc3589x_gpio_remove(struct platform_device *pdev)
303−{
304− struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev);
305−
306− gpiochip_remove(&tc3589x_gpio->chip);
307−
308− return 0;
309−}
310−
311303 static struct platform_driver tc3589x_gpio_driver = {
312304 .driver.name = "tc3589x-gpio",
313305 .driver.owner = THIS_MODULE,
314306 .probe = tc3589x_gpio_probe,
315− .remove = tc3589x_gpio_remove,
316307 };
317308
318309 static int __init tc3589x_gpio_init(void)
drivers/gpio/gpio-tegra.c+1−1
@@ -545,7 +545,7 @@ static int tegra_gpio_probe(struct platform_device *pdev) · 544 unmodified lines
545545
546546 tegra_gpio_chip.of_node = pdev->dev.of_node;
547547
548− ret = gpiochip_add_data(&tegra_gpio_chip, NULL);
548+ ret = devm_gpiochip_add_data(&pdev->dev, &tegra_gpio_chip, NULL);
549549 if (ret < 0) {
550550 irq_domain_remove(irq_domain);
551551 return ret;
drivers/gpio/gpio-timberdale.c+5−20
@@ -237,12 +237,6 @@ static int timbgpio_probe(struct platform_device *pdev) · 236 unmodified lines
237237 return -EINVAL;
238238 }
239239
240− iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
241− if (!iomem) {
242− dev_err(dev, "Unable to get resource\n");
243− return -EINVAL;
244− }
245−
246240 tgpio = devm_kzalloc(dev, sizeof(struct timbgpio), GFP_KERNEL);
247241 if (!tgpio) {
248242 dev_err(dev, "Memory alloc failed\n");
@@ -252,17 +246,10 @@ static int timbgpio_probe(struct platform_device *pdev) · 3 unmodified lines
252246
253247 spin_lock_init(&tgpio->lock);
254248
255− if (!devm_request_mem_region(dev, iomem->start, resource_size(iomem),
256− DRIVER_NAME)) {
257− dev_err(dev, "Region already claimed\n");
258− return -EBUSY;
259− }
260−
261− tgpio->membase = devm_ioremap(dev, iomem->start, resource_size(iomem));
262− if (!tgpio->membase) {
263− dev_err(dev, "Cannot ioremap\n");
264− return -ENOMEM;
265− }
249+ iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
250+ tgpio->membase = devm_ioremap_resource(dev, iomem);
251+ if (IS_ERR(tgpio->membase))
252+ return PTR_ERR(tgpio->membase);
266253
267254 gc = &tgpio->gpio;
268255
@@ -279,7 +266,7 @@ static int timbgpio_probe(struct platform_device *pdev) · 10 unmodified lines
279266 gc->ngpio = pdata->nr_pins;
280267 gc->can_sleep = false;
281268
282− err = gpiochip_add_data(gc, tgpio);
269+ err = devm_gpiochip_add_data(&pdev->dev, gc, tgpio);
283270 if (err)
284271 return err;
285272
@@ -320,8 +307,6 @@ static int timbgpio_remove(struct platform_device *pdev) · 34 unmodified lines
320307 irq_set_handler_data(irq, NULL);
321308 }
322309
323− gpiochip_remove(&tgpio->gpio);
324−
325310 return 0;
326311 }
327312
drivers/gpio/gpio-tpic2810.c+170−0
@@ -0,0 +1,170 @@
1+/*
2+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
3+ * Andrew F. Davis <afd@ti.com>
4+ *
5+ * This program is free software; you can redistribute it and/or
6+ * modify it under the terms of the GNU General Public License version 2 as
7+ * published by the Free Software Foundation.
8+ *
9+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
10+ * kind, whether expressed or implied; without even the implied warranty
11+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12+ * GNU General Public License version 2 for more details.
13+ */
14+
15+#include <linux/gpio/driver.h>
16+#include <linux/i2c.h>
17+#include <linux/module.h>
18+#include <linux/mutex.h>
19+
20+#define TPIC2810_WS_COMMAND 0x44
21+
22+/**
23+ * struct tpic2810 - GPIO driver data
24+ * @chip: GPIO controller chip
25+ * @client: I2C device pointer
26+ * @buffer: Buffer for device register
27+ * @lock: Protects write sequences
28+ */
29+struct tpic2810 {
30+ struct gpio_chip chip;
31+ struct i2c_client *client;
32+ u8 buffer;
33+ struct mutex lock;
34+};
35+
36+static void tpic2810_set(struct gpio_chip *chip, unsigned offset, int value);
37+
38+static int tpic2810_get_direction(struct gpio_chip *chip,
39+ unsigned offset)
40+{
41+ /* This device always output */
42+ return 0;
43+}
44+
45+static int tpic2810_direction_input(struct gpio_chip *chip,
46+ unsigned offset)
47+{
48+ /* This device is output only */
49+ return -EINVAL;
50+}
51+
52+static int tpic2810_direction_output(struct gpio_chip *chip,
53+ unsigned offset, int value)
54+{
55+ /* This device always output */
56+ tpic2810_set(chip, offset, value);
57+ return 0;
58+}
59+
60+static void tpic2810_set(struct gpio_chip *chip, unsigned offset, int value)
61+{
62+ struct tpic2810 *gpio = gpiochip_get_data(chip);
63+
64+ mutex_lock(&gpio->lock);
65+
66+ if (value)
67+ gpio->buffer |= BIT(offset);
68+ else
69+ gpio->buffer &= ~BIT(offset);
70+
71+ i2c_smbus_write_byte_data(gpio->client, TPIC2810_WS_COMMAND,
72+ gpio->buffer);
73+
74+ mutex_unlock(&gpio->lock);
75+}
76+
77+static void tpic2810_set_multiple(struct gpio_chip *chip, unsigned long *mask,
78+ unsigned long *bits)
79+{
80+ struct tpic2810 *gpio = gpiochip_get_data(chip);
81+
82+ mutex_lock(&gpio->lock);
83+
84+ /* clear bits under mask */
85+ gpio->buffer &= ~(*mask);
86+ /* set bits under mask */
87+ gpio->buffer |= ((*mask) & (*bits));
88+
89+ i2c_smbus_write_byte_data(gpio->client, TPIC2810_WS_COMMAND,
90+ gpio->buffer);
91+
92+ mutex_unlock(&gpio->lock);
93+}
94+
95+static struct gpio_chip template_chip = {
96+ .label = "tpic2810",
97+ .owner = THIS_MODULE,
98+ .get_direction = tpic2810_get_direction,
99+ .direction_input = tpic2810_direction_input,
100+ .direction_output = tpic2810_direction_output,
101+ .set = tpic2810_set,
102+ .set_multiple = tpic2810_set_multiple,
103+ .base = -1,
104+ .ngpio = 8,
105+ .can_sleep = true,
106+};
107+
108+static const struct of_device_id tpic2810_of_match_table[] = {
109+ { .compatible = "ti,tpic2810" },
110+ { /* sentinel */ }
111+};
112+MODULE_DEVICE_TABLE(of, tpic2810_of_match_table);
113+
114+static int tpic2810_probe(struct i2c_client *client,
115+ const struct i2c_device_id *id)
116+{
117+ struct tpic2810 *gpio;
118+ int ret;
119+
120+ gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
121+ if (!gpio)
122+ return -ENOMEM;
123+
124+ i2c_set_clientdata(client, gpio);
125+
126+ gpio->chip = template_chip;
127+ gpio->chip.parent = &client->dev;
128+
129+ gpio->client = client;
130+
131+ mutex_init(&gpio->lock);
132+
133+ ret = gpiochip_add_data(&gpio->chip, gpio);
134+ if (ret < 0) {
135+ dev_err(&client->dev, "Unable to register gpiochip\n");
136+ return ret;
137+ }
138+
139+ return 0;
140+}
141+
142+static int tpic2810_remove(struct i2c_client *client)
143+{
144+ struct tpic2810 *gpio = i2c_get_clientdata(client);
145+
146+ gpiochip_remove(&gpio->chip);
147+
148+ return 0;
149+}
150+
151+static const struct i2c_device_id tpic2810_id_table[] = {
152+ { "tpic2810", },
153+ { /* sentinel */ }
154+};
155+MODULE_DEVICE_TABLE(i2c, tpic2810_id_table);
156+
157+static struct i2c_driver tpic2810_driver = {
158+ .driver = {
159+ .name = "tpic2810",
160+ .of_match_table = tpic2810_of_match_table,
161+ },
162+ .probe = tpic2810_probe,
163+ .remove = tpic2810_remove,
164+ .id_table = tpic2810_id_table,
165+};
166+module_i2c_driver(tpic2810_driver);
167+
168+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
169+MODULE_DESCRIPTION("TPIC2810 8-Bit LED Driver GPIO Driver");
170+MODULE_LICENSE("GPL v2");
drivers/gpio/gpio-tps65218.c+222−0
@@ -0,0 +1,222 @@
1+/*
2+ * Copyright 2015 Verifone Int.
3+ *
4+ * Author: Nicolas Saenz Julienne <nicolassaenzj@gmail.com>
5+ *
6+ * This program is free software; you can redistribute it and/or modify i t
7+ * under the terms of the GNU General Public License as published by th e
8+ * Free Software Foundation; either version 2 of the License, or (at you r
9+ * option) any later version.
10+ *
11+ * This driver is based on the gpio-tps65912 implementation.
12+ */
13+
14+#include <linux/kernel.h>
15+#include <linux/module.h>
16+#include <linux/errno.h>
17+#include <linux/gpio/driver.h>
18+#include <linux/platform_device.h>
19+#include <linux/mfd/tps65218.h>
20+
21+struct tps65218_gpio {
22+ struct tps65218 *tps65218;
23+ struct gpio_chip gpio_chip;
24+};
25+
26+static int tps65218_gpio_get(struct gpio_chip *gc, unsigned offset)
27+{
28+ struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
29+ struct tps65218 *tps65218 = tps65218_gpio->tps65218;
30+ unsigned int val;
31+ int ret;
32+
33+ ret = tps65218_reg_read(tps65218, TPS65218_REG_ENABLE2, &val);
34+ if (ret)
35+ return ret;
36+
37+ return !!(val & (TPS65218_ENABLE2_GPIO1 << offset));
38+}
39+
40+static void tps65218_gpio_set(struct gpio_chip *gc, unsigned offset,
41+ int value)
42+{
43+ struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
44+ struct tps65218 *tps65218 = tps65218_gpio->tps65218;
45+
46+ if (value)
47+ tps65218_set_bits(tps65218, TPS65218_REG_ENABLE2,
48+ TPS65218_ENABLE2_GPIO1 << offset,
49+ TPS65218_ENABLE2_GPIO1 << offset,
50+ TPS65218_PROTECT_L1);
51+ else
52+ tps65218_clear_bits(tps65218, TPS65218_REG_ENABLE2,
53+ TPS65218_ENABLE2_GPIO1 << offset,
54+ TPS65218_PROTECT_L1);
55+}
56+
57+static int tps65218_gpio_output(struct gpio_chip *gc, unsigned offset,
58+ int value)
59+{
60+ /* Only drives GPOs */
61+ tps65218_gpio_set(gc, offset, value);
62+ return 0;
63+}
64+
65+static int tps65218_gpio_input(struct gpio_chip *gc, unsigned offset)
66+{
67+ return -EPERM;
68+}
69+
70+static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset)
71+{
72+ struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
73+ struct tps65218 *tps65218 = tps65218_gpio->tps65218;
74+ int ret;
75+
76+ if (gpiochip_line_is_open_source(gc, offset)) {
77+ dev_err(gc->parent, "can't work as open source\n");
78+ return -EINVAL;
79+ }
80+
81+ switch (offset) {
82+ case 0:
83+ if (!gpiochip_line_is_open_drain(gc, offset)) {
84+ dev_err(gc->parent, "GPO1 works only as open drain\n");
85+ return -EINVAL;
86+ }
87+
88+ /* Disable sequencer for GPO1 */
89+ ret = tps65218_clear_bits(tps65218, TPS65218_REG_SEQ7,
90+ TPS65218_SEQ7_GPO1_SEQ_MASK,
91+ TPS65218_PROTECT_L1);
92+ if (ret)
93+ return ret;
94+
95+ /* Setup GPO1 */
96+ ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1,
97+ TPS65218_CONFIG1_IO1_SEL,
98+ TPS65218_PROTECT_L1);
99+ if (ret)
100+ return ret;
101+
102+ break;
103+ case 1:
104+ /* GP02 is push-pull by default, can be set as open drain. */
105+ if (gpiochip_line_is_open_drain(gc, offset)) {
106+ ret = tps65218_clear_bits(tps65218,
107+ TPS65218_REG_CONFIG1,
108+ TPS65218_CONFIG1_GPO2_BUF,
109+ TPS65218_PROTECT_L1);
110+ if (ret)
111+ return ret;
112+ }
113+
114+ /* Setup GPO2 */
115+ ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1,
116+ TPS65218_CONFIG1_IO1_SEL,
117+ TPS65218_PROTECT_L1);
118+ if (ret)
119+ return ret;
120+
121+ break;
122+
123+ case 2:
124+ if (!gpiochip_line_is_open_drain(gc, offset)) {
125+ dev_err(gc->parent, "GPO3 works only as open drain\n");
126+ return -EINVAL;
127+ }
128+
129+ /* Disable sequencer for GPO3 */
130+ ret = tps65218_clear_bits(tps65218, TPS65218_REG_SEQ7,
131+ TPS65218_SEQ7_GPO3_SEQ_MASK,
132+ TPS65218_PROTECT_L1);
133+ if (ret)
134+ return ret;
135+
136+ /* Setup GPO3 */
137+ ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG2,
138+ TPS65218_CONFIG2_DC12_RST,
139+ TPS65218_PROTECT_L1);
140+ if (ret)
141+ return ret;
142+
143+ break;
144+ default:
145+ return -EINVAL;
146+ }
147+
148+ return 0;
149+}
150+
151+static struct gpio_chip template_chip = {
152+ .label = "gpio-tps65218",
153+ .owner = THIS_MODULE,
154+ .request = tps65218_gpio_request,
155+ .direction_output = tps65218_gpio_output,
156+ .direction_input = tps65218_gpio_input,
157+ .get = tps65218_gpio_get,
158+ .set = tps65218_gpio_set,
159+ .can_sleep = true,
160+ .ngpio = 3,
161+ .base = -1,
162+};
163+
164+static int tps65218_gpio_probe(struct platform_device *pdev)
165+{
166+ struct tps65218 *tps65218 = dev_get_drvdata(pdev->dev.parent);
167+ struct tps65218_gpio *tps65218_gpio;
168+ int ret;
169+
170+ tps65218_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps65218_gpio),
171+ GFP_KERNEL);
172+ if (!tps65218_gpio)
173+ return -ENOMEM;
174+
175+ tps65218_gpio->tps65218 = tps65218;
176+ tps65218_gpio->gpio_chip = template_chip;
177+ tps65218_gpio->gpio_chip.parent = &pdev->dev;
178+#ifdef CONFIG_OF_GPIO
179+ tps65218_gpio->gpio_chip.of_node = pdev->dev.of_node;
180+#endif
181+
182+ ret = gpiochip_add_data(&tps65218_gpio->gpio_chip, tps65218_gpio);
183+ if (ret < 0) {
184+ dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret);
185+ return ret;
186+ }
187+
188+ platform_set_drvdata(pdev, tps65218_gpio);
189+
190+ return ret;
191+}
192+
193+static int tps65218_gpio_remove(struct platform_device *pdev)
194+{
195+ struct tps65218_gpio *tps65218_gpio = platform_get_drvdata(pdev);
196+
197+ gpiochip_remove(&tps65218_gpio->gpio_chip);
198+
199+ return 0;
200+}
201+
202+static const struct of_device_id tps65218_dt_match[] = {
203+ { .compatible = "ti,tps65218-gpio" },
204+ { }
205+};
206+MODULE_DEVICE_TABLE(of, tps65218_dt_match);
207+
208+static struct platform_driver tps65218_gpio_driver = {
209+ .driver = {
210+ .name = "tps65218-gpio",
211+ .of_match_table = of_match_ptr(tps65218_dt_match)
212+ },
213+ .probe = tps65218_gpio_probe,
214+ .remove = tps65218_gpio_remove,
215+};
216+
217+module_platform_driver(tps65218_gpio_driver);
218+
219+MODULE_AUTHOR("Nicolas Saenz Julienne <nicolassaenzj@gmail.com>");
220+MODULE_DESCRIPTION("GPO interface for TPS65218 PMICs");
221+MODULE_LICENSE("GPL v2");
222+MODULE_ALIAS("platform:tps65218-gpio");
drivers/gpio/gpio-tps6586x.c+2−10
@@ -117,7 +117,8 @@ static int tps6586x_gpio_probe(struct platform_device *pdev) · 116 unmodified lines
117117 else
118118 tps6586x_gpio->gpio_chip.base = -1;
119119
120− ret = gpiochip_add_data(&tps6586x_gpio->gpio_chip, tps6586x_gpio);
120+ ret = devm_gpiochip_add_data(&pdev->dev, &tps6586x_gpio->gpio_chip,
121+ tps6586x_gpio);
121122 if (ret < 0) {
122123 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
123124 return ret;
@@ -128,19 +129,10 @@ static int tps6586x_gpio_probe(struct platform_device *pdev) · 4 unmodified lines
128129 return ret;
129130 }
130131
131−static int tps6586x_gpio_remove(struct platform_device *pdev)
132−{
133− struct tps6586x_gpio *tps6586x_gpio = platform_get_drvdata(pdev);
134−
135− gpiochip_remove(&tps6586x_gpio->gpio_chip);
136− return 0;
137−}
138−
139132 static struct platform_driver tps6586x_gpio_driver = {
140133 .driver.name = "tps6586x-gpio",
141134 .driver.owner = THIS_MODULE,
142135 .probe = tps6586x_gpio_probe,
143− .remove = tps6586x_gpio_remove,
144136 };
145137
146138 static int __init tps6586x_gpio_init(void)
drivers/gpio/gpio-tps65910.c+2−10
@@ -170,7 +170,8 @@ static int tps65910_gpio_probe(struct platform_device *pdev) · 169 unmodified lines
170170 }
171171
172172 skip_init:
173− ret = gpiochip_add_data(&tps65910_gpio->gpio_chip, tps65910_gpio);
173+ ret = devm_gpiochip_add_data(&pdev->dev, &tps65910_gpio->gpio_chip,
174+ tps65910_gpio);
174175 if (ret < 0) {
175176 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
176177 return ret;
@@ -181,19 +182,10 @@ skip_init: · 4 unmodified lines
181182 return ret;
182183 }
183184
184−static int tps65910_gpio_remove(struct platform_device *pdev)
185−{
186− struct tps65910_gpio *tps65910_gpio = platform_get_drvdata(pdev);
187−
188− gpiochip_remove(&tps65910_gpio->gpio_chip);
189− return 0;
190−}
191−
192185 static struct platform_driver tps65910_gpio_driver = {
193186 .driver.name = "tps65910-gpio",
194187 .driver.owner = THIS_MODULE,
195188 .probe = tps65910_gpio_probe,
196− .remove = tps65910_gpio_remove,
197189 };
198190
199191 static int __init tps65910_gpio_init(void)
drivers/gpio/gpio-tps65912.c+86−88
@@ -1,151 +1,149 @@
11 /*
2− * Copyright 2011 Texas Instruments Inc.
2+ * GPIO driver for TI TPS65912x PMICs
33 *
4− * Author: Margarita Olaya <magi@slimlogic.co.uk>
4+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
5+ * Andrew F. Davis <afd@ti.com>
56 *
6− * This program is free software; you can redistribute it and/or modify it
7− * under the terms of the GNU General Public License as published by the
8− * Free Software Foundation; either version 2 of the License, or (at your
9− * option) any later version.
7+ * This program is free software; you can redistribute it and/or
8+ * modify it under the terms of the GNU General Public License version 2 as
9+ * published by the Free Software Foundation.
1010 *
11− * This driver is based on wm8350 implementation.
11+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12+ * kind, whether expressed or implied; without even the implied warranty
13+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14+ * GNU General Public License version 2 for more details.
15+ *
16+ * Based on the Arizona GPIO driver and the previous TPS65912 driver by
17+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>
1218 */
1319
14−#include <linux/kernel.h>
15−#include <linux/module.h>
16−#include <linux/errno.h>
1720 #include <linux/gpio.h>
18−#include <linux/mfd/core.h>
21+#include <linux/module.h>
1922 #include <linux/platform_device.h>
20−#include <linux/seq_file.h>
21−#include <linux/slab.h>
23+
2224 #include <linux/mfd/tps65912.h>
2325
24−struct tps65912_gpio_data {
25− struct tps65912 *tps65912;
26+struct tps65912_gpio {
2627 struct gpio_chip gpio_chip;
28+ struct tps65912 *tps;
2729 };
2830
29−static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset)
31+static int tps65912_gpio_get_direction(struct gpio_chip *gc,
32+ unsigned offset)
3033 {
31− struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc);
32− struct tps65912 *tps65912 = tps65912_gpio->tps65912;
33− int val;
34+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);
3435
35− val = tps65912_reg_read(tps65912, TPS65912_GPIO1 + offset);
36+ int ret, val;
3637
37− if (val & GPIO_STS_MASK)
38− return 1;
38+ ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, &val);
39+ if (ret)
40+ return ret;
3941
40− return 0;
42+ if (val & GPIO_CFG_MASK)
43+ return GPIOF_DIR_OUT;
44+ else
45+ return GPIOF_DIR_IN;
4146 }
4247
43−static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset,
44− int value)
48+static int tps65912_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
4549 {
46− struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc);
47− struct tps65912 *tps65912 = tps65912_gpio->tps65912;
50+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);
4851
49− if (value)
50− tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset,
51− GPIO_SET_MASK);
52− else
53− tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset,
54− GPIO_SET_MASK);
52+ return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,
53+ GPIO_CFG_MASK, 0);
5554 }
5655
57−static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset,
58− int value)
56+static int tps65912_gpio_direction_output(struct gpio_chip *gc,
57+ unsigned offset, int value)
5958 {
60− struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc);
61− struct tps65912 *tps65912 = tps65912_gpio->tps65912;
59+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);
6260
6361 /* Set the initial value */
64− tps65912_gpio_set(gc, offset, value);
62+ regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,
63+ GPIO_SET_MASK, value ? GPIO_SET_MASK : 0);
64+
65+ return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,
66+ GPIO_CFG_MASK, GPIO_CFG_MASK);
67+}
68+
69+static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset)
70+{
71+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);
72+ int ret, val;
73+
74+ ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, &val);
75+ if (ret)
76+ return ret;
77+
78+ if (val & GPIO_STS_MASK)
79+ return 1;
6580
66− return tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset,
67− GPIO_CFG_MASK);
81+ return 0;
6882 }
6983
70−static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset)
84+static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset,
85+ int value)
7186 {
72− struct tps65912_gpio_data *tps65912_gpio = gpiochip_get_data(gc);
73− struct tps65912 *tps65912 = tps65912_gpio->tps65912;
87+ struct tps65912_gpio *gpio = gpiochip_get_data(gc);
7488
75− return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset,
76− GPIO_CFG_MASK);
89+ regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset,
90+ GPIO_SET_MASK, value ? GPIO_SET_MASK : 0);
7791 }
7892
7993 static struct gpio_chip template_chip = {
80− .label = "tps65912",
94+ .label = "tps65912-gpio",
8195 .owner = THIS_MODULE,
82− .direction_input = tps65912_gpio_input,
83− .direction_output = tps65912_gpio_output,
96+ .get_direction = tps65912_gpio_get_direction,
97+ .direction_input = tps65912_gpio_direction_input,
98+ .direction_output = tps65912_gpio_direction_output,
8499 .get = tps65912_gpio_get,
85100 .set = tps65912_gpio_set,
86− .can_sleep = true,
87− .ngpio = 5,
88101 .base = -1,
102+ .ngpio = 5,
103+ .can_sleep = true,
89104 };
90105
91106 static int tps65912_gpio_probe(struct platform_device *pdev)
92107 {
93− struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent);
94− struct tps65912_board *pdata = dev_get_platdata(tps65912->dev);
95− struct tps65912_gpio_data *tps65912_gpio;
108+ struct tps65912 *tps = dev_get_drvdata(pdev->dev.parent);
109+ struct tps65912_gpio *gpio;
96110 int ret;
97111
98− tps65912_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps65912_gpio),
99− GFP_KERNEL);
100− if (tps65912_gpio == NULL)
112+ gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
113+ if (!gpio)
101114 return -ENOMEM;
102115
103− tps65912_gpio->tps65912 = tps65912;
104− tps65912_gpio->gpio_chip = template_chip;
105− tps65912_gpio->gpio_chip.parent = &pdev->dev;
106− if (pdata && pdata->gpio_base)
107− tps65912_gpio->gpio_chip.base = pdata->gpio_base;
116+ gpio->tps = dev_get_drvdata(pdev->dev.parent);
117+ gpio->gpio_chip = template_chip;
118+ gpio->gpio_chip.parent = tps->dev;
108119
109− ret = gpiochip_add_data(&tps65912_gpio->gpio_chip, tps65912_gpio);
120+ ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gpio_chip,
121+ gpio);
110122 if (ret < 0) {
111− dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret);
123+ dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
112124 return ret;
113125 }
114126
115− platform_set_drvdata(pdev, tps65912_gpio);
116−
117− return ret;
118−}
127+ platform_set_drvdata(pdev, gpio);
119128
120−static int tps65912_gpio_remove(struct platform_device *pdev)
121−{
122− struct tps65912_gpio_data *tps65912_gpio = platform_get_drvdata(pdev);
123−
124− gpiochip_remove(&tps65912_gpio->gpio_chip);
125129 return 0;
126130 }
127131
132+static const struct platform_device_id tps65912_gpio_id_table[] = {
133+ { "tps65912-gpio", },
134+ { /* sentinel */ }
135+};
136+MODULE_DEVICE_TABLE(platform, tps65912_gpio_id_table);
137+
128138 static struct platform_driver tps65912_gpio_driver = {
129139 .driver = {
130140 .name = "tps65912-gpio",
131141 },
132142 .probe = tps65912_gpio_probe,
133− .remove = tps65912_gpio_remove,
143+ .id_table = tps65912_gpio_id_table,
134144 };
145+module_platform_driver(tps65912_gpio_driver);
135146
136−static int __init tps65912_gpio_init(void)
137−{
138− return platform_driver_register(&tps65912_gpio_driver);
139−}
140−subsys_initcall(tps65912_gpio_init);
141−
142−static void __exit tps65912_gpio_exit(void)
143−{
144− platform_driver_unregister(&tps65912_gpio_driver);
145−}
146−module_exit(tps65912_gpio_exit);
147−
148−MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>");
149−MODULE_DESCRIPTION("GPIO interface for TPS65912 PMICs");
147+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
148+MODULE_DESCRIPTION("TPS65912 GPIO driver");
150149 MODULE_LICENSE("GPL v2");
151−MODULE_ALIAS("platform:tps65912-gpio");
drivers/gpio/gpio-ts4800.c+81−0
@@ -0,0 +1,81 @@
1+/*
2+ * GPIO driver for the TS-4800 board
3+ *
4+ * Copyright (c) 2016 - Savoir-faire Linux
5+ *
6+ * This file is licensed under the terms of the GNU General Public
7+ * License version 2. This program is licensed "as is" without any
8+ * warranty of any kind, whether express or implied.
9+ */
10+
11+#include <linux/gpio/driver.h>
12+#include <linux/of_address.h>
13+#include <linux/of_device.h>
14+#include <linux/platform_device.h>
15+
16+#define DEFAULT_PIN_NUMBER 16
17+#define INPUT_REG_OFFSET 0x00
18+#define OUTPUT_REG_OFFSET 0x02
19+#define DIRECTION_REG_OFFSET 0x04
20+
21+static int ts4800_gpio_probe(struct platform_device *pdev)
22+{
23+ struct device_node *node;
24+ struct gpio_chip *chip;
25+ struct resource *res;
26+ void __iomem *base_addr;
27+ int retval;
28+ u32 ngpios;
29+
30+ chip = devm_kzalloc(&pdev->dev, sizeof(struct gpio_chip), GFP_KERNEL);
31+ if (!chip)
32+ return -ENOMEM;
33+
34+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
35+ base_addr = devm_ioremap_resource(&pdev->dev, res);
36+ if (IS_ERR(base_addr))
37+ return PTR_ERR(base_addr);
38+
39+ node = pdev->dev.of_node;
40+ if (!node)
41+ return -EINVAL;
42+
43+ retval = of_property_read_u32(node, "ngpios", &ngpios);
44+ if (retval == -EINVAL)
45+ ngpios = DEFAULT_PIN_NUMBER;
46+ else if (retval)
47+ return retval;
48+
49+ retval = bgpio_init(chip, &pdev->dev, 2, base_addr + INPUT_REG_OFFSET,
50+ base_addr + OUTPUT_REG_OFFSET, NULL,
51+ base_addr + DIRECTION_REG_OFFSET, NULL, 0);
52+ if (retval) {
53+ dev_err(&pdev->dev, "bgpio_init failed\n");
54+ return retval;
55+ }
56+
57+ chip->ngpio = ngpios;
58+
59+ platform_set_drvdata(pdev, chip);
60+
61+ return devm_gpiochip_add_data(&pdev->dev, chip, NULL);
62+}
63+
64+static const struct of_device_id ts4800_gpio_of_match[] = {
65+ { .compatible = "technologic,ts4800-gpio", },
66+ {},
67+};
68+
69+static struct platform_driver ts4800_gpio_driver = {
70+ .driver = {
71+ .name = "ts4800-gpio",
72+ .of_match_table = ts4800_gpio_of_match,
73+ },
74+ .probe = ts4800_gpio_probe,
75+};
76+
77+module_platform_driver_probe(ts4800_gpio_driver, ts4800_gpio_probe);
78+
79+MODULE_AUTHOR("Julien Grossholtz <julien.grossholtz@savoirfairelinux.com>");
80+MODULE_DESCRIPTION("TS4800 FPGA GPIO driver");
81+MODULE_LICENSE("GPL v2");
drivers/gpio/gpio-ts5500.c+3−6
@@ -409,7 +409,7 @@ static int ts5500_dio_probe(struct platform_device *pdev) · 408 unmodified lines
409409 break;
410410 }
411411
412− ret = gpiochip_add_data(&priv->gpio_chip, priv);
412+ ret = devm_gpiochip_add_data(dev, &priv->gpio_chip, priv);
413413 if (ret) {
414414 dev_err(dev, "failed to register the gpio chip\n");
415415 return ret;
@@ -418,13 +418,10 @@ static int ts5500_dio_probe(struct platform_device *pdev) · 2 unmodified lines
418418 ret = ts5500_enable_irq(priv);
419419 if (ret) {
420420 dev_err(dev, "invalid interrupt %d\n", priv->hwirq);
421− goto cleanup;
421+ return ret;
422422 }
423423
424424 return 0;
425−cleanup:
426− gpiochip_remove(&priv->gpio_chip);
427− return ret;
428425 }
429426
430427 static int ts5500_dio_remove(struct platform_device *pdev)
@@ -432,7 +429,7 @@ static int ts5500_dio_remove(struct platform_device *pdev) · 1 unmodified line
432429 struct ts5500_priv *priv = platform_get_drvdata(pdev);
433430
434431 ts5500_disable_irq(priv);
435− gpiochip_remove(&priv->gpio_chip);
432+
436433 return 0;
437434 }
438435
drivers/gpio/gpio-twl6040.c+1−8
@@ -100,7 +100,7 @@ static int gpo_twl6040_probe(struct platform_device *pdev) · 99 unmodified lines
100100 twl6040gpo_chip.of_node = twl6040_core_dev->of_node;
101101 #endif
102102
103− ret = gpiochip_add_data(&twl6040gpo_chip, NULL);
103+ ret = devm_gpiochip_add_data(&pdev->dev, &twl6040gpo_chip, NULL);
104104 if (ret < 0) {
105105 dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret);
106106 twl6040gpo_chip.ngpio = 0;
@@ -109,12 +109,6 @@ static int gpo_twl6040_probe(struct platform_device *pdev) · 2 unmodified lines
109109 return ret;
110110 }
111111
112−static int gpo_twl6040_remove(struct platform_device *pdev)
113−{
114− gpiochip_remove(&twl6040gpo_chip);
115− return 0;
116−}
117−
118112 /* Note: this hardware lives inside an I2C-based multi-function device. */
119113 MODULE_ALIAS("platform:twl6040-gpo");
120114
@@ -123,7 +117,6 @@ static struct platform_driver gpo_twl6040_driver = { · 2 unmodified lines
123117 .name = "twl6040-gpo",
124118 },
125119 .probe = gpo_twl6040_probe,
126− .remove = gpo_twl6040_remove,
127120 };
128121
129122 module_platform_driver(gpo_twl6040_driver);
drivers/gpio/gpio-ucb1400.c+1−2
@@ -67,7 +67,7 @@ static int ucb1400_gpio_probe(struct platform_device *dev) · 66 unmodified lines
6767 ucb->gc.set = ucb1400_gpio_set;
6868 ucb->gc.can_sleep = true;
6969
70− err = gpiochip_add_data(&ucb->gc, ucb);
70+ err = devm_gpiochip_add_data(&dev->dev, &ucb->gc, ucb);
7171 if (err)
7272 goto err;
7373
@@ -90,7 +90,6 @@ static int ucb1400_gpio_remove(struct platform_device *dev) · 16 unmodified lines
9090 return err;
9191 }
9292
93− gpiochip_remove(&ucb->gc);
9493 return err;
9594 }
9695
drivers/gpio/gpio-viperboard.c+4−20
@@ -410,10 +410,10 @@ static int vprbrd_gpio_probe(struct platform_device *pdev) · 409 unmodified lines
410410 vb_gpio->gpioa.get = vprbrd_gpioa_get;
411411 vb_gpio->gpioa.direction_input = vprbrd_gpioa_direction_input;
412412 vb_gpio->gpioa.direction_output = vprbrd_gpioa_direction_output;
413− ret = gpiochip_add_data(&vb_gpio->gpioa, vb_gpio);
413+ ret = devm_gpiochip_add_data(&pdev->dev, &vb_gpio->gpioa, vb_gpio);
414414 if (ret < 0) {
415415 dev_err(vb_gpio->gpioa.parent, "could not add gpio a");
416− goto err_gpioa;
416+ return ret;
417417 }
418418
419419 /* registering gpio b */
@@ -427,37 +427,21 @@ static int vprbrd_gpio_probe(struct platform_device *pdev) · 7 unmodified lines
427427 vb_gpio->gpiob.get = vprbrd_gpiob_get;
428428 vb_gpio->gpiob.direction_input = vprbrd_gpiob_direction_input;
429429 vb_gpio->gpiob.direction_output = vprbrd_gpiob_direction_output;
430− ret = gpiochip_add_data(&vb_gpio->gpiob, vb_gpio);
430+ ret = devm_gpiochip_add_data(&pdev->dev, &vb_gpio->gpiob, vb_gpio);
431431 if (ret < 0) {
432432 dev_err(vb_gpio->gpiob.parent, "could not add gpio b");
433− goto err_gpiob;
433+ return ret;
434434 }
435435
436436 platform_set_drvdata(pdev, vb_gpio);
437437
438438 return ret;
439−
440−err_gpiob:
441− gpiochip_remove(&vb_gpio->gpioa);
442−
443−err_gpioa:
444− return ret;
445−}
446−
447−static int vprbrd_gpio_remove(struct platform_device *pdev)
448−{
449− struct vprbrd_gpio *vb_gpio = platform_get_drvdata(pdev);
450−
451− gpiochip_remove(&vb_gpio->gpiob);
452−
453− return 0;
454439 }
455440
456441 static struct platform_driver vprbrd_gpio_driver = {
457442 .driver.name = "viperboard-gpio",
458443 .driver.owner = THIS_MODULE,
459444 .probe = vprbrd_gpio_probe,
460− .remove = vprbrd_gpio_remove,
461445 };
462446
463447 static int __init vprbrd_gpio_init(void)
drivers/gpio/gpio-vx855.c+1−11
@@ -259,16 +259,7 @@ static int vx855gpio_probe(struct platform_device *pdev) · 258 unmodified lines
259259
260260 vx855gpio_gpio_setup(vg);
261261
262− return gpiochip_add_data(&vg->gpio, vg);
263−}
264−
265−static int vx855gpio_remove(struct platform_device *pdev)
266−{
267− struct vx855_gpio *vg = platform_get_drvdata(pdev);
268−
269− gpiochip_remove(&vg->gpio);
270−
271− return 0;
262+ return devm_gpiochip_add_data(&pdev->dev, &vg->gpio, vg);
272263 }
273264
274265 static struct platform_driver vx855gpio_driver = {
@@ -276,7 +267,6 @@ static struct platform_driver vx855gpio_driver = { · 1 unmodified line
276267 .name = MODULE_NAME,
277268 },
278269 .probe = vx855gpio_probe,
279− .remove = vx855gpio_remove,
280270 };
281271
282272 module_platform_driver(vx855gpio_driver);
drivers/gpio/gpio-wm831x.c+2−10
@@ -259,7 +259,8 @@ static int wm831x_gpio_probe(struct platform_device *pdev) · 258 unmodified lines
259259 else
260260 wm831x_gpio->gpio_chip.base = -1;
261261
262− ret = gpiochip_add_data(&wm831x_gpio->gpio_chip, wm831x_gpio);
262+ ret = devm_gpiochip_add_data(&pdev->dev, &wm831x_gpio->gpio_chip,
263+ wm831x_gpio);
263264 if (ret < 0) {
264265 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
265266 return ret;
@@ -270,19 +271,10 @@ static int wm831x_gpio_probe(struct platform_device *pdev) · 4 unmodified lines
270271 return ret;
271272 }
272273
273−static int wm831x_gpio_remove(struct platform_device *pdev)
274−{
275− struct wm831x_gpio *wm831x_gpio = platform_get_drvdata(pdev);
276−
277− gpiochip_remove(&wm831x_gpio->gpio_chip);
278− return 0;
279−}
280−
281274 static struct platform_driver wm831x_gpio_driver = {
282275 .driver.name = "wm831x-gpio",
283276 .driver.owner = THIS_MODULE,
284277 .probe = wm831x_gpio_probe,
285− .remove = wm831x_gpio_remove,
286278 };
287279
288280 static int __init wm831x_gpio_init(void)
drivers/gpio/gpio-wm8350.c+2−10
@@ -125,7 +125,8 @@ static int wm8350_gpio_probe(struct platform_device *pdev) · 124 unmodified lines
125125 else
126126 wm8350_gpio->gpio_chip.base = -1;
127127
128− ret = gpiochip_add_data(&wm8350_gpio->gpio_chip, wm8350_gpio);
128+ ret = devm_gpiochip_add_data(&pdev->dev, &wm8350_gpio->gpio_chip,
129+ wm8350_gpio);
129130 if (ret < 0) {
130131 dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
131132 return ret;
@@ -136,19 +137,10 @@ static int wm8350_gpio_probe(struct platform_device *pdev) · 4 unmodified lines
136137 return ret;
137138 }
138139
139−static int wm8350_gpio_remove(struct platform_device *pdev)
140−{
141− struct wm8350_gpio_data *wm8350_gpio = platform_get_drvdata(pdev);
142−
143− gpiochip_remove(&wm8350_gpio->gpio_chip);
144− return 0;
145−}
146−
147140 static struct platform_driver wm8350_gpio_driver = {
148141 .driver.name = "wm8350-gpio",
149142 .driver.owner = THIS_MODULE,
150143 .probe = wm8350_gpio_probe,
151− .remove = wm8350_gpio_remove,
152144 };
153145
154146 static int __init wm8350_gpio_init(void)
drivers/gpio/gpio-wm8994.c+3−14
@@ -261,34 +261,23 @@ static int wm8994_gpio_probe(struct platform_device *pdev) · 260 unmodified lines
261261 else
262262 wm8994_gpio->gpio_chip.base = -1;
263263
264− ret = gpiochip_add_data(&wm8994_gpio->gpio_chip, wm8994_gpio);
264+ ret = devm_gpiochip_add_data(&pdev->dev, &wm8994_gpio->gpio_chip,
265+ wm8994_gpio);
265266 if (ret < 0) {
266267 dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
267268 ret);
268− goto err;
269+ return ret;
269270 }
270271
271272 platform_set_drvdata(pdev, wm8994_gpio);
272273
273274 return ret;
274−
275−err:
276− return ret;
277−}
278−
279−static int wm8994_gpio_remove(struct platform_device *pdev)
280−{
281− struct wm8994_gpio *wm8994_gpio = platform_get_drvdata(pdev);
282−
283− gpiochip_remove(&wm8994_gpio->gpio_chip);
284− return 0;
285275 }
286276
287277 static struct platform_driver wm8994_gpio_driver = {
288278 .driver.name = "wm8994-gpio",
289279 .driver.owner = THIS_MODULE,
290280 .probe = wm8994_gpio_probe,
291− .remove = wm8994_gpio_remove,
292281 };
293282
294283 static int __init wm8994_gpio_init(void)
drivers/gpio/gpio-ws16c48.c+427−0
@@ -0,0 +1,427 @@
1+/*
2+ * GPIO driver for the WinSystems WS16C48
3+ * Copyright (C) 2016 William Breathitt Gray
4+ *
5+ * This program is free software; you can redistribute it and/or modify
6+ * it under the terms of the GNU General Public License, version 2, as
7+ * published by the Free Software Foundation.
8+ *
9+ * This program is distributed in the hope that it will be useful, but
10+ * WITHOUT ANY WARRANTY; without even the implied warranty of
11+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12+ * General Public License for more details.
13+ */
14+#include <linux/bitops.h>
15+#include <linux/device.h>
16+#include <linux/errno.h>
17+#include <linux/gpio/driver.h>
18+#include <linux/io.h>
19+#include <linux/ioport.h>
20+#include <linux/interrupt.h>
21+#include <linux/irqdesc.h>
22+#include <linux/kernel.h>
23+#include <linux/module.h>
24+#include <linux/moduleparam.h>
25+#include <linux/platform_device.h>
26+#include <linux/spinlock.h>
27+
28+static unsigned ws16c48_base;
29+module_param(ws16c48_base, uint, 0);
30+MODULE_PARM_DESC(ws16c48_base, "WinSystems WS16C48 base address");
31+static unsigned ws16c48_irq;
32+module_param(ws16c48_irq, uint, 0);
33+MODULE_PARM_DESC(ws16c48_irq, "WinSystems WS16C48 interrupt line number");
34+
35+/**
36+ * struct ws16c48_gpio - GPIO device private data structure
37+ * @chip: instance of the gpio_chip
38+ * @io_state: bit I/O state (whether bit is set to input or output)
39+ * @out_state: output bits state
40+ * @lock: synchronization lock to prevent I/O race conditions
41+ * @irq_mask: I/O bits affected by interrupts
42+ * @flow_mask: IRQ flow type mask for the respective I/O bits
43+ * @base: base port address of the GPIO device
44+ * @irq: Interrupt line number
45+ */
46+struct ws16c48_gpio {
47+ struct gpio_chip chip;
48+ unsigned char io_state[6];
49+ unsigned char out_state[6];
50+ spinlock_t lock;
51+ unsigned long irq_mask;
52+ unsigned long flow_mask;
53+ unsigned base;
54+ unsigned irq;
55+};
56+
57+static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
58+{
59+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
60+ const unsigned port = offset / 8;
61+ const unsigned mask = BIT(offset % 8);
62+
63+ return !!(ws16c48gpio->io_state[port] & mask);
64+}
65+
66+static int ws16c48_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
67+{
68+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
69+ const unsigned port = offset / 8;
70+ const unsigned mask = BIT(offset % 8);
71+ unsigned long flags;
72+
73+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
74+
75+ ws16c48gpio->io_state[port] |= mask;
76+ ws16c48gpio->out_state[port] &= ~mask;
77+ outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
78+
79+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
80+
81+ return 0;
82+}
83+
84+static int ws16c48_gpio_direction_output(struct gpio_chip *chip,
85+ unsigned offset, int value)
86+{
87+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
88+ const unsigned port = offset / 8;
89+ const unsigned mask = BIT(offset % 8);
90+ unsigned long flags;
91+
92+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
93+
94+ ws16c48gpio->io_state[port] &= ~mask;
95+ if (value)
96+ ws16c48gpio->out_state[port] |= mask;
97+ else
98+ ws16c48gpio->out_state[port] &= ~mask;
99+ outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
100+
101+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
102+
103+ return 0;
104+}
105+
106+static int ws16c48_gpio_get(struct gpio_chip *chip, unsigned offset)
107+{
108+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
109+ const unsigned port = offset / 8;
110+ const unsigned mask = BIT(offset % 8);
111+ unsigned long flags;
112+ unsigned port_state;
113+
114+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
115+
116+ /* ensure that GPIO is set for input */
117+ if (!(ws16c48gpio->io_state[port] & mask)) {
118+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
119+ return -EINVAL;
120+ }
121+
122+ port_state = inb(ws16c48gpio->base + port);
123+
124+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
125+
126+ return !!(port_state & mask);
127+}
128+
129+static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
130+{
131+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
132+ const unsigned port = offset / 8;
133+ const unsigned mask = BIT(offset % 8);
134+ unsigned long flags;
135+
136+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
137+
138+ /* ensure that GPIO is set for output */
139+ if (ws16c48gpio->io_state[port] & mask) {
140+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
141+ return;
142+ }
143+
144+ if (value)
145+ ws16c48gpio->out_state[port] |= mask;
146+ else
147+ ws16c48gpio->out_state[port] &= ~mask;
148+ outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port);
149+
150+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
151+}
152+
153+static void ws16c48_irq_ack(struct irq_data *data)
154+{
155+ struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
156+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
157+ const unsigned long offset = irqd_to_hwirq(data);
158+ const unsigned port = offset / 8;
159+ const unsigned mask = BIT(offset % 8);
160+ unsigned long flags;
161+ unsigned port_state;
162+
163+ /* only the first 3 ports support interrupts */
164+ if (port > 2)
165+ return;
166+
167+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
168+
169+ port_state = ws16c48gpio->irq_mask >> (8*port);
170+
171+ outb(0x80, ws16c48gpio->base + 7);
172+ outb(port_state & ~mask, ws16c48gpio->base + 8 + port);
173+ outb(port_state | mask, ws16c48gpio->base + 8 + port);
174+ outb(0xC0, ws16c48gpio->base + 7);
175+
176+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
177+}
178+
179+static void ws16c48_irq_mask(struct irq_data *data)
180+{
181+ struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
182+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
183+ const unsigned long offset = irqd_to_hwirq(data);
184+ const unsigned long mask = BIT(offset);
185+ const unsigned port = offset / 8;
186+ unsigned long flags;
187+
188+ /* only the first 3 ports support interrupts */
189+ if (port > 2)
190+ return;
191+
192+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
193+
194+ ws16c48gpio->irq_mask &= ~mask;
195+
196+ outb(0x80, ws16c48gpio->base + 7);
197+ outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);
198+ outb(0xC0, ws16c48gpio->base + 7);
199+
200+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
201+}
202+
203+static void ws16c48_irq_unmask(struct irq_data *data)
204+{
205+ struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
206+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
207+ const unsigned long offset = irqd_to_hwirq(data);
208+ const unsigned long mask = BIT(offset);
209+ const unsigned port = offset / 8;
210+ unsigned long flags;
211+
212+ /* only the first 3 ports support interrupts */
213+ if (port > 2)
214+ return;
215+
216+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
217+
218+ ws16c48gpio->irq_mask |= mask;
219+
220+ outb(0x80, ws16c48gpio->base + 7);
221+ outb(ws16c48gpio->irq_mask >> (8*port), ws16c48gpio->base + 8 + port);
222+ outb(0xC0, ws16c48gpio->base + 7);
223+
224+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
225+}
226+
227+static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type)
228+{
229+ struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
230+ struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip);
231+ const unsigned long offset = irqd_to_hwirq(data);
232+ const unsigned long mask = BIT(offset);
233+ const unsigned port = offset / 8;
234+ unsigned long flags;
235+
236+ /* only the first 3 ports support interrupts */
237+ if (port > 2)
238+ return -EINVAL;
239+
240+ spin_lock_irqsave(&ws16c48gpio->lock, flags);
241+
242+ switch (flow_type) {
243+ case IRQ_TYPE_NONE:
244+ break;
245+ case IRQ_TYPE_EDGE_RISING:
246+ ws16c48gpio->flow_mask |= mask;
247+ break;
248+ case IRQ_TYPE_EDGE_FALLING:
249+ ws16c48gpio->flow_mask &= ~mask;
250+ break;
251+ default:
252+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
253+ return -EINVAL;
254+ }
255+
256+ outb(0x40, ws16c48gpio->base + 7);
257+ outb(ws16c48gpio->flow_mask >> (8*port), ws16c48gpio->base + 8 + port);
258+ outb(0xC0, ws16c48gpio->base + 7);
259+
260+ spin_unlock_irqrestore(&ws16c48gpio->lock, flags);
261+
262+ return 0;
263+}
264+
265+static struct irq_chip ws16c48_irqchip = {
266+ .name = "ws16c48",
267+ .irq_ack = ws16c48_irq_ack,
268+ .irq_mask = ws16c48_irq_mask,
269+ .irq_unmask = ws16c48_irq_unmask,
270+ .irq_set_type = ws16c48_irq_set_type
271+};
272+
273+static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id)
274+{
275+ struct ws16c48_gpio *const ws16c48gpio = dev_id;
276+ struct gpio_chip *const chip = &ws16c48gpio->chip;
277+ unsigned long int_pending;
278+ unsigned long port;
279+ unsigned long int_id;
280+ unsigned long gpio;
281+
282+ int_pending = inb(ws16c48gpio->base + 6) & 0x7;
283+ if (!int_pending)
284+ return IRQ_NONE;
285+
286+ /* loop until all pending interrupts are handled */
287+ do {
288+ for_each_set_bit(port, &int_pending, 3) {
289+ int_id = inb(ws16c48gpio->base + 8 + port);
290+ for_each_set_bit(gpio, &int_id, 8)
291+ generic_handle_irq(irq_find_mapping(
292+ chip->irqdomain, gpio + 8*port));
293+ }
294+
295+ int_pending = inb(ws16c48gpio->base + 6) & 0x7;
296+ } while (int_pending);
297+
298+ return IRQ_HANDLED;
299+}
300+
301+static int __init ws16c48_probe(struct platform_device *pdev)
302+{
303+ struct device *dev = &pdev->dev;
304+ struct ws16c48_gpio *ws16c48gpio;
305+ const unsigned base = ws16c48_base;
306+ const unsigned extent = 16;
307+ const char *const name = dev_name(dev);
308+ int err;
309+ const unsigned irq = ws16c48_irq;
310+
311+ ws16c48gpio = devm_kzalloc(dev, sizeof(*ws16c48gpio), GFP_KERNEL);
312+ if (!ws16c48gpio)
313+ return -ENOMEM;
314+
315+ if (!devm_request_region(dev, base, extent, name)) {
316+ dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
317+ base, base + extent);
318+ return -EBUSY;
319+ }
320+
321+ ws16c48gpio->chip.label = name;
322+ ws16c48gpio->chip.parent = dev;
323+ ws16c48gpio->chip.owner = THIS_MODULE;
324+ ws16c48gpio->chip.base = -1;
325+ ws16c48gpio->chip.ngpio = 48;
326+ ws16c48gpio->chip.get_direction = ws16c48_gpio_get_direction;
327+ ws16c48gpio->chip.direction_input = ws16c48_gpio_direction_input;
328+ ws16c48gpio->chip.direction_output = ws16c48_gpio_direction_output;
329+ ws16c48gpio->chip.get = ws16c48_gpio_get;
330+ ws16c48gpio->chip.set = ws16c48_gpio_set;
331+ ws16c48gpio->base = base;
332+ ws16c48gpio->irq = irq;
333+
334+ spin_lock_init(&ws16c48gpio->lock);
335+
336+ dev_set_drvdata(dev, ws16c48gpio);
337+
338+ err = gpiochip_add_data(&ws16c48gpio->chip, ws16c48gpio);
339+ if (err) {
340+ dev_err(dev, "GPIO registering failed (%d)\n", err);
341+ return err;
342+ }
343+
344+ /* Disable IRQ by default */
345+ outb(0x80, base + 7);
346+ outb(0, base + 8);
347+ outb(0, base + 9);
348+ outb(0, base + 10);
349+ outb(0xC0, base + 7);
350+
351+ err = gpiochip_irqchip_add(&ws16c48gpio->chip, &ws16c48_irqchip, 0,
352+ handle_edge_irq, IRQ_TYPE_NONE);
353+ if (err) {
354+ dev_err(dev, "Could not add irqchip (%d)\n", err);
355+ goto err_gpiochip_remove;
356+ }
357+
358+ err = request_irq(irq, ws16c48_irq_handler, IRQF_SHARED, name,
359+ ws16c48gpio);
360+ if (err) {
361+ dev_err(dev, "IRQ handler registering failed (%d)\n", err);
362+ goto err_gpiochip_remove;
363+ }
364+
365+ return 0;
366+
367+err_gpiochip_remove:
368+ gpiochip_remove(&ws16c48gpio->chip);
369+ return err;
370+}
371+
372+static int ws16c48_remove(struct platform_device *pdev)
373+{
374+ struct ws16c48_gpio *const ws16c48gpio = platform_get_drvdata(pdev);
375+
376+ free_irq(ws16c48gpio->irq, ws16c48gpio);
377+ gpiochip_remove(&ws16c48gpio->chip);
378+
379+ return 0;
380+}
381+
382+static struct platform_device *ws16c48_device;
383+
384+static struct platform_driver ws16c48_driver = {
385+ .driver = {
386+ .name = "ws16c48"
387+ },
388+ .remove = ws16c48_remove
389+};
390+
391+static void __exit ws16c48_exit(void)
392+{
393+ platform_device_unregister(ws16c48_device);
394+ platform_driver_unregister(&ws16c48_driver);
395+}
396+
397+static int __init ws16c48_init(void)
398+{
399+ int err;
400+
401+ ws16c48_device = platform_device_alloc(ws16c48_driver.driver.name, -1);
402+ if (!ws16c48_device)
403+ return -ENOMEM;
404+
405+ err = platform_device_add(ws16c48_device);
406+ if (err)
407+ goto err_platform_device;
408+
409+ err = platform_driver_probe(&ws16c48_driver, ws16c48_probe);
410+ if (err)
411+ goto err_platform_driver;
412+
413+ return 0;
414+
415+err_platform_driver:
416+ platform_device_del(ws16c48_device);
417+err_platform_device:
418+ platform_device_put(ws16c48_device);
419+ return err;
420+}
421+
422+module_init(ws16c48_init);
423+module_exit(ws16c48_exit);
424+
425+MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
426+MODULE_DESCRIPTION("WinSystems WS16C48 GPIO driver");
427+MODULE_LICENSE("GPL v2");
drivers/gpio/gpio-xgene-sb.c+233−33
@@ -2,8 +2,9 @@ · 1 unmodified line
22 * AppliedMicro X-Gene SoC GPIO-Standby Driver
33 *
44 * Copyright (c) 2014, Applied Micro Circuits Corporation
5− * Author: Tin Huynh <tnhuynh@apm.com>.
6− * Y Vo <yvo@apm.com>.
5+ * Author: Tin Huynh <tnhuynh@apm.com>.
6+ * Y Vo <yvo@apm.com>.
7+ * Quan Nguyen <qnguyen@apm.com>.
78 *
89 * This program is free software; you can redistribute it and/or modify it
910 * under the terms of the GNU General Public License as published by the
@@ -28,9 +29,14 @@ · 18 unmodified lines
2829
2930 #include "gpiolib.h"
3031
31−#define XGENE_MAX_GPIO_DS 22
32−#define XGENE_MAX_GPIO_DS_IRQ 6
32+/* Common property names */
33+#define XGENE_NIRQ_PROPERTY "apm,nr-irqs"
34+#define XGENE_NGPIO_PROPERTY "apm,nr-gpios"
35+#define XGENE_IRQ_START_PROPERTY "apm,irq-start"
3336
37+#define XGENE_DFLT_MAX_NGPIO 22
38+#define XGENE_DFLT_MAX_NIRQ 6
39+#define XGENE_DFLT_IRQ_START_PIN 8
3440 #define GPIO_MASK(x) (1U << ((x) % 32))
3541
3642 #define MPA_GPIO_INT_LVL 0x0290
@@ -39,19 +45,32 @@ · 2 unmodified lines
3945 #define MPA_GPIO_IN_ADDR 0x02a4
4046 #define MPA_GPIO_SEL_LO 0x0294
4147
48+#define GPIO_INT_LEVEL_H 0x000001
49+#define GPIO_INT_LEVEL_L 0x000000
50+
4251 /**
4352 * struct xgene_gpio_sb - GPIO-Standby private data structure.
4453 * @gc: memory-mapped GPIO controllers.
45− * @irq: Mapping GPIO pins and interrupt number
46− * nirq: Number of GPIO pins that supports interrupt
54+ * @regs: GPIO register base offset
55+ * @irq_domain: GPIO interrupt domain
56+ * @irq_start: GPIO pin that start support interrupt
57+ * @nirq: Number of GPIO pins that supports interrupt
58+ * @parent_irq_base: Start parent HWIRQ
4759 */
4860 struct xgene_gpio_sb {
4961 struct gpio_chip gc;
50− u32 *irq;
51− u32 nirq;
62+ void __iomem *regs;
63+ struct irq_domain *irq_domain;
64+ u16 irq_start;
65+ u16 nirq;
66+ u16 parent_irq_base;
5267 };
5368
54−static void xgene_gpio_set_bit(struct gpio_chip *gc, void __iomem *reg, u32 gpio, int val)
69+#define HWIRQ_TO_GPIO(priv, hwirq) ((hwirq) + (priv)->irq_start)
70+#define GPIO_TO_HWIRQ(priv, gpio) ((gpio) - (priv)->irq_start)
71+
72+static void xgene_gpio_set_bit(struct gpio_chip *gc,
73+ void __iomem *reg, u32 gpio, int val)
5574 {
5675 u32 data;
5776
@@ -63,23 +82,170 @@ static void xgene_gpio_set_bit(struct gpio_chip *gc, void __iomem *reg, u32 gpio · 5 unmodified lines
6382 gc->write_reg(reg, data);
6483 }
6584
66−static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio)
85+static int xgene_gpio_sb_irq_set_type(struct irq_data *d, unsigned int type)
86+{
87+ struct xgene_gpio_sb *priv = irq_data_get_irq_chip_data(d);
88+ int gpio = HWIRQ_TO_GPIO(priv, d->hwirq);
89+ int lvl_type = GPIO_INT_LEVEL_H;
90+
91+ switch (type & IRQ_TYPE_SENSE_MASK) {
92+ case IRQ_TYPE_EDGE_RISING:
93+ case IRQ_TYPE_LEVEL_HIGH:
94+ lvl_type = GPIO_INT_LEVEL_H;
95+ break;
96+ case IRQ_TYPE_EDGE_FALLING:
97+ case IRQ_TYPE_LEVEL_LOW:
98+ lvl_type = GPIO_INT_LEVEL_L;
99+ break;
100+ default:
101+ break;
102+ }
103+
104+ xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO,
105+ gpio * 2, 1);
106+ xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_INT_LVL,
107+ d->hwirq, lvl_type);
108+
109+ /* Propagate IRQ type setting to parent */
110+ if (type & IRQ_TYPE_EDGE_BOTH)
111+ return irq_chip_set_type_parent(d, IRQ_TYPE_EDGE_RISING);
112+ else
113+ return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH);
114+}
115+
116+static struct irq_chip xgene_gpio_sb_irq_chip = {
117+ .name = "sbgpio",
118+ .irq_eoi = irq_chip_eoi_parent,
119+ .irq_mask = irq_chip_mask_parent,
120+ .irq_unmask = irq_chip_unmask_parent,
121+ .irq_set_type = xgene_gpio_sb_irq_set_type,
122+};
123+
124+static int xgene_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio)
67125 {
68126 struct xgene_gpio_sb *priv = gpiochip_get_data(gc);
127+ struct irq_fwspec fwspec;
128+
129+ if ((gpio < priv->irq_start) ||
130+ (gpio > HWIRQ_TO_GPIO(priv, priv->nirq)))
131+ return -ENXIO;
132+
133+ if (gc->parent->of_node)
134+ fwspec.fwnode = of_node_to_fwnode(gc->parent->of_node);
135+ else
136+ fwspec.fwnode = gc->parent->fwnode;
137+ fwspec.param_count = 2;
138+ fwspec.param[0] = GPIO_TO_HWIRQ(priv, gpio);
139+ fwspec.param[1] = IRQ_TYPE_NONE;
140+ return irq_create_fwspec_mapping(&fwspec);
141+}
142+
143+static void xgene_gpio_sb_domain_activate(struct irq_domain *d,
144+ struct irq_data *irq_data)
145+{
146+ struct xgene_gpio_sb *priv = d->host_data;
147+ u32 gpio = HWIRQ_TO_GPIO(priv, irq_data->hwirq);
148+
149+ if (gpiochip_lock_as_irq(&priv->gc, gpio)) {
150+ dev_err(priv->gc.parent,
151+ "Unable to configure XGene GPIO standby pin %d as IRQ\n",
152+ gpio);
153+ return;
154+ }
155+
156+ xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO,
157+ gpio * 2, 1);
158+}
159+
160+static void xgene_gpio_sb_domain_deactivate(struct irq_domain *d,
161+ struct irq_data *irq_data)
162+{
163+ struct xgene_gpio_sb *priv = d->host_data;
164+ u32 gpio = HWIRQ_TO_GPIO(priv, irq_data->hwirq);
165+
166+ gpiochip_unlock_as_irq(&priv->gc, gpio);
167+ xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO,
168+ gpio * 2, 0);
169+}
170+
171+static int xgene_gpio_sb_domain_translate(struct irq_domain *d,
172+ struct irq_fwspec *fwspec,
173+ unsigned long *hwirq,
174+ unsigned int *type)
175+{
176+ struct xgene_gpio_sb *priv = d->host_data;
177+
178+ if ((fwspec->param_count != 2) ||
179+ (fwspec->param[0] >= priv->nirq))
180+ return -EINVAL;
181+ *hwirq = fwspec->param[0];
182+ *type = fwspec->param[1];
183+ return 0;
184+}
185+
186+static int xgene_gpio_sb_domain_alloc(struct irq_domain *domain,
187+ unsigned int virq,
188+ unsigned int nr_irqs, void *data)
189+{
190+ struct irq_fwspec *fwspec = data;
191+ struct irq_fwspec parent_fwspec;
192+ struct xgene_gpio_sb *priv = domain->host_data;
193+ irq_hw_number_t hwirq;
194+ unsigned int i;
195+
196+ hwirq = fwspec->param[0];
197+ for (i = 0; i < nr_irqs; i++)
198+ irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
199+ &xgene_gpio_sb_irq_chip, priv);
69200
70− if (priv->irq[gpio])
71− return priv->irq[gpio];
201+ parent_fwspec.fwnode = domain->parent->fwnode;
202+ if (is_of_node(parent_fwspec.fwnode)) {
203+ parent_fwspec.param_count = 3;
204+ parent_fwspec.param[0] = 0;/* SPI */
205+ /* Skip SGIs and PPIs*/
206+ parent_fwspec.param[1] = hwirq + priv->parent_irq_base - 32;
207+ parent_fwspec.param[2] = fwspec->param[1];
208+ } else if (is_fwnode_irqchip(parent_fwspec.fwnode)) {
209+ parent_fwspec.param_count = 2;
210+ parent_fwspec.param[0] = hwirq + priv->parent_irq_base;
211+ parent_fwspec.param[1] = fwspec->param[1];
212+ } else
213+ return -EINVAL;
72214
73− return -ENXIO;
215+ return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs,
216+ &parent_fwspec);
74217 }
75218
219+static void xgene_gpio_sb_domain_free(struct irq_domain *domain,
220+ unsigned int virq,
221+ unsigned int nr_irqs)
222+{
223+ struct irq_data *d;
224+ unsigned int i;
225+
226+ for (i = 0; i < nr_irqs; i++) {
227+ d = irq_domain_get_irq_data(domain, virq + i);
228+ irq_domain_reset_irq_data(d);
229+ }
230+}
231+
232+static const struct irq_domain_ops xgene_gpio_sb_domain_ops = {
233+ .translate = xgene_gpio_sb_domain_translate,
234+ .alloc = xgene_gpio_sb_domain_alloc,
235+ .free = xgene_gpio_sb_domain_free,
236+ .activate = xgene_gpio_sb_domain_activate,
237+ .deactivate = xgene_gpio_sb_domain_deactivate,
238+};
239+
76240 static int xgene_gpio_sb_probe(struct platform_device *pdev)
77241 {
78242 struct xgene_gpio_sb *priv;
79− u32 ret, i;
80− u32 default_lines[] = {0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D};
243+ int ret;
81244 struct resource *res;
82245 void __iomem *regs;
246+ struct irq_domain *parent_domain = NULL;
247+ struct fwnode_handle *fwnode;
248+ u32 val32;
83249
84250 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
85251 if (!priv)
@@ -90,6 +256,18 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev) · 4 unmodified lines
90256 if (IS_ERR(regs))
91257 return PTR_ERR(regs);
92258
259+ priv->regs = regs;
260+
261+ ret = platform_get_irq(pdev, 0);
262+ if (ret > 0) {
263+ priv->parent_irq_base = irq_get_irq_data(ret)->hwirq;
264+ parent_domain = irq_get_irq_data(ret)->domain;
265+ }
266+ if (!parent_domain) {
267+ dev_err(&pdev->dev, "unable to obtain parent domain\n");
268+ return -ENODEV;
269+ }
270+
93271 ret = bgpio_init(&priv->gc, &pdev->dev, 4,
94272 regs + MPA_GPIO_IN_ADDR,
95273 regs + MPA_GPIO_OUT_ADDR, NULL,
@@ -97,30 +275,51 @@ static int xgene_gpio_sb_probe(struct platform_device *pdev) · 1 unmodified line
97275 if (ret)
98276 return ret;
99277
100− priv->gc.to_irq = apm_gpio_sb_to_irq;
101− priv->gc.ngpio = XGENE_MAX_GPIO_DS;
278+ priv->gc.to_irq = xgene_gpio_sb_to_irq;
102279
103− priv->nirq = XGENE_MAX_GPIO_DS_IRQ;
280+ /* Retrieve start irq pin, use default if property not found */
281+ priv->irq_start = XGENE_DFLT_IRQ_START_PIN;
282+ if (!device_property_read_u32(&pdev->dev,
283+ XGENE_IRQ_START_PROPERTY, &val32))
284+ priv->irq_start = val32;
104285
105− priv->irq = devm_kzalloc(&pdev->dev, sizeof(u32) * XGENE_MAX_GPIO_DS,
106− GFP_KERNEL);
107− if (!priv->irq)
108− return -ENOMEM;
286+ /* Retrieve number irqs, use default if property not found */
287+ priv->nirq = XGENE_DFLT_MAX_NIRQ;
288+ if (!device_property_read_u32(&pdev->dev, XGENE_NIRQ_PROPERTY, &val32))
289+ priv->nirq = val32;
109290
110− for (i = 0; i < priv->nirq; i++) {
111− priv->irq[default_lines[i]] = platform_get_irq(pdev, i);
112− xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_SEL_LO,
113− default_lines[i] * 2, 1);
114− xgene_gpio_set_bit(&priv->gc, regs + MPA_GPIO_INT_LVL, i, 1);
115− }
291+ /* Retrieve number gpio, use default if property not found */
292+ priv->gc.ngpio = XGENE_DFLT_MAX_NGPIO;
293+ if (!device_property_read_u32(&pdev->dev, XGENE_NGPIO_PROPERTY, &val32))
294+ priv->gc.ngpio = val32;
295+
296+ dev_info(&pdev->dev, "Support %d gpios, %d irqs start from pin %d\n",
297+ priv->gc.ngpio, priv->nirq, priv->irq_start);
116298
117299 platform_set_drvdata(pdev, priv);
118300
119− ret = gpiochip_add_data(&priv->gc, priv);
120− if (ret)
121− dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n");
301+ if (pdev->dev.of_node)
302+ fwnode = of_node_to_fwnode(pdev->dev.of_node);
122303 else
123− dev_info(&pdev->dev, "X-Gene GPIO Standby driver registered\n");
304+ fwnode = pdev->dev.fwnode;
305+
306+ priv->irq_domain = irq_domain_create_hierarchy(parent_domain,
307+ 0, priv->nirq, fwnode,
308+ &xgene_gpio_sb_domain_ops, priv);
309+ if (!priv->irq_domain)
310+ return -ENODEV;
311+
312+ priv->gc.irqdomain = priv->irq_domain;
313+
314+ ret = devm_gpiochip_add_data(&pdev->dev, &priv->gc, priv);
315+ if (ret) {
316+ dev_err(&pdev->dev,
317+ "failed to register X-Gene GPIO Standby driver\n");
318+ irq_domain_remove(priv->irq_domain);
319+ return ret;
320+ }
321+
322+ dev_info(&pdev->dev, "X-Gene GPIO Standby driver registered\n");
124323
125324 if (priv->nirq > 0) {
126325 /* Register interrupt handlers for gpio signaled acpi events */
@@ -138,7 +337,8 @@ static int xgene_gpio_sb_remove(struct platform_device *pdev) · 11 unmodified lines
138337 acpi_gpiochip_free_interrupts(&priv->gc);
139338 }
140339
141− gpiochip_remove(&priv->gc);
340+ irq_domain_remove(priv->irq_domain);
341+
142342 return 0;
143343 }
144344
drivers/gpio/gpio-xgene.c+1−10
@@ -193,7 +193,7 @@ static int xgene_gpio_probe(struct platform_device *pdev) · 192 unmodified lines
193193
194194 platform_set_drvdata(pdev, gpio);
195195
196− err = gpiochip_add_data(&gpio->chip, gpio);
196+ err = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
197197 if (err) {
198198 dev_err(&pdev->dev,
199199 "failed to register gpiochip.\n");
@@ -207,14 +207,6 @@ err: · 7 unmodified lines
207207 return err;
208208 }
209209
210−static int xgene_gpio_remove(struct platform_device *pdev)
211−{
212− struct xgene_gpio *gpio = platform_get_drvdata(pdev);
213−
214− gpiochip_remove(&gpio->chip);
215− return 0;
216−}
217−
218210 static const struct of_device_id xgene_gpio_of_match[] = {
219211 { .compatible = "apm,xgene-gpio", },
220212 {},
@@ -228,7 +220,6 @@ static struct platform_driver xgene_gpio_driver = { · 7 unmodified lines
228220 .pm = XGENE_GPIO_PM_OPS,
229221 },
230222 .probe = xgene_gpio_probe,
231− .remove = xgene_gpio_remove,
232223 };
233224
234225 module_platform_driver(xgene_gpio_driver);
drivers/gpio/gpiolib-acpi.c+9−9
@@ -71,29 +71,29 @@ static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) · 70 unmodified lines
7171 * controller uses pin controller and the mapping is not contiguous the
7272 * offset might be different.
7373 */
74−static int acpi_gpiochip_pin_to_gpio_offset(struct gpio_chip *chip, int pin)
74+static int acpi_gpiochip_pin_to_gpio_offset(struct gpio_device *gdev, int pin)
7575 {
7676 struct gpio_pin_range *pin_range;
7777
7878 /* If there are no ranges in this chip, use 1:1 mapping */
79− if (list_empty(&chip->pin_ranges))
79+ if (list_empty(&gdev->pin_ranges))
8080 return pin;
8181
82− list_for_each_entry(pin_range, &chip->pin_ranges, node) {
82+ list_for_each_entry(pin_range, &gdev->pin_ranges, node) {
8383 const struct pinctrl_gpio_range *range = &pin_range->range;
8484 int i;
8585
8686 if (range->pins) {
8787 for (i = 0; i < range->npins; i++) {
8888 if (range->pins[i] == pin)
89− return range->base + i - chip->base;
89+ return range->base + i - gdev->base;
9090 }
9191 } else {
9292 if (pin >= range->pin_base &&
9393 pin < range->pin_base + range->npins) {
9494 unsigned gpio_base;
9595
96− gpio_base = range->base - chip->base;
96+ gpio_base = range->base - gdev->base;
9797 return gpio_base + pin - range->pin_base;
9898 }
9999 }
@@ -102,7 +102,7 @@ static int acpi_gpiochip_pin_to_gpio_offset(struct gpio_chip *chip, int pin) · 2 unmodified lines
102102 return -EINVAL;
103103 }
104104 #else
105−static inline int acpi_gpiochip_pin_to_gpio_offset(struct gpio_chip *chip,
105+static inline int acpi_gpiochip_pin_to_gpio_offset(struct gpio_device *gdev,
106106 int pin)
107107 {
108108 return pin;
@@ -134,7 +134,7 @@ static struct gpio_desc *acpi_get_gpiod(char *path, int pin) · 25 unmodified lines
134134 if (!chip)
135135 return ERR_PTR(-EPROBE_DEFER);
136136
137− offset = acpi_gpiochip_pin_to_gpio_offset(chip, pin);
137+ offset = acpi_gpiochip_pin_to_gpio_offset(chip->gpiodev, pin);
138138 if (offset < 0)
139139 return ERR_PTR(offset);
140140
@@ -202,7 +202,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, · 61 unmodified lines
202202 if (!handler)
203203 return AE_BAD_PARAMETER;
204204
205− pin = acpi_gpiochip_pin_to_gpio_offset(chip, pin);
205+ pin = acpi_gpiochip_pin_to_gpio_offset(chip->gpiodev, pin);
206206 if (pin < 0)
207207 return AE_BAD_PARAMETER;
208208
@@ -673,7 +673,7 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address, · 464 unmodified lines
673673 struct gpio_desc *desc;
674674 bool found;
675675
676− pin = acpi_gpiochip_pin_to_gpio_offset(chip, pin);
676+ pin = acpi_gpiochip_pin_to_gpio_offset(chip->gpiodev, pin);
677677 if (pin < 0) {
678678 status = AE_BAD_PARAMETER;
679679 goto out;
drivers/gpio/gpiolib-sysfs.c+32−19
@@ -180,7 +180,7 @@ static int gpio_sysfs_request_irq(struct device *dev, unsigned char flags) · 179 unmodified lines
180180 * Remove this redundant call (along with the corresponding
181181 * unlock) when those drivers have been fixed.
182182 */
183− ret = gpiochip_lock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
183+ ret = gpiochip_lock_as_irq(desc->gdev->chip, gpio_chip_hwgpio(desc));
184184 if (ret < 0)
185185 goto err_put_kn;
186186
@@ -194,7 +194,7 @@ static int gpio_sysfs_request_irq(struct device *dev, unsigned char flags) · 7 unmodified lines
194194 return 0;
195195
196196 err_unlock:
197− gpiochip_unlock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
197+ gpiochip_unlock_as_irq(desc->gdev->chip, gpio_chip_hwgpio(desc));
198198 err_put_kn:
199199 sysfs_put(data->value_kn);
200200
@@ -212,7 +212,7 @@ static void gpio_sysfs_free_irq(struct device *dev) · 11 unmodified lines
212212
213213 data->irq_flags = 0;
214214 free_irq(data->irq, data);
215− gpiochip_unlock_as_irq(desc->chip, gpio_chip_hwgpio(desc));
215+ gpiochip_unlock_as_irq(desc->gdev->chip, gpio_chip_hwgpio(desc));
216216 sysfs_put(data->value_kn);
217217 }
218218
@@ -547,6 +547,7 @@ static struct class gpio_class = { · 328 unmodified lines
547547 int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
548548 {
549549 struct gpio_chip *chip;
550+ struct gpio_device *gdev;
550551 struct gpiod_data *data;
551552 unsigned long flags;
552553 int status;
@@ -565,12 +566,13 @@ int gpiod_export(struct gpio_desc *desc, bool direction_may_change) · 12 unmodified lines
565566 return -EINVAL;
566567 }
567568
568− chip = desc->chip;
569+ gdev = desc->gdev;
570+ chip = gdev->chip;
569571
570572 mutex_lock(&sysfs_lock);
571573
572574 /* check if chip is being removed */
573− if (!chip || !chip->cdev) {
575+ if (!chip || !gdev->mockdev) {
574576 status = -ENODEV;
575577 goto err_unlock;
576578 }
@@ -605,7 +607,7 @@ int gpiod_export(struct gpio_desc *desc, bool direction_may_change) · 28 unmodified lines
605607 if (chip->names && chip->names[offset])
606608 ioname = chip->names[offset];
607609
608− dev = device_create_with_groups(&gpio_class, chip->parent,
610+ dev = device_create_with_groups(&gpio_class, &gdev->dev,
609611 MKDEV(0, 0), data, gpio_groups,
610612 ioname ? ioname : "gpio%u",
611613 desc_to_gpio(desc));
@@ -716,9 +718,11 @@ err_unlock: · 104 unmodified lines
716718 }
717719 EXPORT_SYMBOL_GPL(gpiod_unexport);
718720
719−int gpiochip_sysfs_register(struct gpio_chip *chip)
721+int gpiochip_sysfs_register(struct gpio_device *gdev)
720722 {
721723 struct device *dev;
724+ struct device *parent;
725+ struct gpio_chip *chip = gdev->chip;
722726
723727 /*
724728 * Many systems add gpio chips for SOC support very early,
@@ -729,8 +733,17 @@ int gpiochip_sysfs_register(struct gpio_chip *chip) · 4 unmodified lines
729733 if (!gpio_class.p)
730734 return 0;
731735
736+ /*
737+ * For sysfs backward compatibility we need to preserve this
738+ * preferred parenting to the gpio_chip parent field, if set.
739+ */
740+ if (chip->parent)
741+ parent = chip->parent;
742+ else
743+ parent = &gdev->dev;
744+
732745 /* use chip->base for the ID; it's already known to be unique */
733− dev = device_create_with_groups(&gpio_class, chip->parent,
746+ dev = device_create_with_groups(&gpio_class, parent,
734747 MKDEV(0, 0),
735748 chip, gpiochip_groups,
736749 "gpiochip%d", chip->base);
@@ -738,30 +751,31 @@ int gpiochip_sysfs_register(struct gpio_chip *chip) · 1 unmodified line
738751 return PTR_ERR(dev);
739752
740753 mutex_lock(&sysfs_lock);
741− chip->cdev = dev;
754+ gdev->mockdev = dev;
742755 mutex_unlock(&sysfs_lock);
743756
744757 return 0;
745758 }
746759
747−void gpiochip_sysfs_unregister(struct gpio_chip *chip)
760+void gpiochip_sysfs_unregister(struct gpio_device *gdev)
748761 {
749762 struct gpio_desc *desc;
763+ struct gpio_chip *chip = gdev->chip;
750764 unsigned int i;
751765
752− if (!chip->cdev)
766+ if (!gdev->mockdev)
753767 return;
754768
755− device_unregister(chip->cdev);
769+ device_unregister(gdev->mockdev);
756770
757771 /* prevent further gpiod exports */
758772 mutex_lock(&sysfs_lock);
759− chip->cdev = NULL;
773+ gdev->mockdev = NULL;
760774 mutex_unlock(&sysfs_lock);
761775
762776 /* unregister gpiod class devices owned by sysfs */
763777 for (i = 0; i < chip->ngpio; i++) {
764− desc = &chip->desc[i];
778+ desc = &gdev->descs[i];
765779 if (test_and_clear_bit(FLAG_SYSFS, &desc->flags))
766780 gpiod_free(desc);
767781 }
@@ -771,7 +785,7 @@ static int __init gpiolib_sysfs_init(void) · 3 unmodified lines
771785 {
772786 int status;
773787 unsigned long flags;
774− struct gpio_chip *chip;
788+ struct gpio_device *gdev;
775789
776790 status = class_register(&gpio_class);
777791 if (status < 0)
@@ -784,8 +798,8 @@ static int __init gpiolib_sysfs_init(void) · 6 unmodified lines
784798 * registered, and so arch_initcall() can always gpio_export().
785799 */
786800 spin_lock_irqsave(&gpio_lock, flags);
787− list_for_each_entry(chip, &gpio_chips, list) {
788− if (chip->cdev)
801+ list_for_each_entry(gdev, &gpio_devices, list) {
802+ if (gdev->mockdev)
789803 continue;
790804
791805 /*
@@ -798,12 +812,11 @@ static int __init gpiolib_sysfs_init(void) · 6 unmodified lines
798812 * gpio_lock prevents us from doing this.
799813 */
800814 spin_unlock_irqrestore(&gpio_lock, flags);
801− status = gpiochip_sysfs_register(chip);
815+ status = gpiochip_sysfs_register(gdev);
802816 spin_lock_irqsave(&gpio_lock, flags);
803817 }
804818 spin_unlock_irqrestore(&gpio_lock, flags);
805819
806−
807820 return status;
808821 }
809822 postcore_initcall(gpiolib_sysfs_init);
drivers/gpio/gpiolib.c+605−217
@@ -16,6 +16,11 @@ · 15 unmodified lines
1616 #include <linux/gpio/driver.h>
1717 #include <linux/gpio/machine.h>
1818 #include <linux/pinctrl/consumer.h>
19+#include <linux/idr.h>
20+#include <linux/cdev.h>
21+#include <linux/fs.h>
22+#include <linux/uaccess.h>
23+#include <uapi/linux/gpio.h>
1924
2025 #include "gpiolib.h"
2126
@@ -42,6 +47,14 @@ · 20 unmodified lines
4247 #define extra_checks 0
4348 #endif
4449
50+/* Device and char device-related information */
51+static DEFINE_IDA(gpio_ida);
52+static dev_t gpio_devt;
53+#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
54+static struct bus_type gpio_bus_type = {
55+ .name = "gpio",
56+};
57+
4558 /* gpio_lock prevents conflicts during gpio_desc[] table updates.
4659 * While any GPIO is requested, its gpio_chip is not removable;
4760 * each GPIO's "requested" flag serves as a lock and refcount.
@@ -50,8 +63,7 @@ DEFINE_SPINLOCK(gpio_lock); · 2 unmodified lines
5063
5164 static DEFINE_MUTEX(gpio_lookup_lock);
5265 static LIST_HEAD(gpio_lookup_list);
53−LIST_HEAD(gpio_chips);
54−
66+LIST_HEAD(gpio_devices);
5567
5668 static void gpiochip_free_hogs(struct gpio_chip *chip);
5769 static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
@@ -67,15 +79,16 @@ static inline void desc_set_label(struct gpio_desc *d, const char *label) · 9 unmodified lines
6779 */
6880 struct gpio_desc *gpio_to_desc(unsigned gpio)
6981 {
70− struct gpio_chip *chip;
82+ struct gpio_device *gdev;
7183 unsigned long flags;
7284
7385 spin_lock_irqsave(&gpio_lock, flags);
7486
75− list_for_each_entry(chip, &gpio_chips, list) {
76− if (chip->base <= gpio && chip->base + chip->ngpio > gpio) {
87+ list_for_each_entry(gdev, &gpio_devices, list) {
88+ if (gdev->base <= gpio &&
89+ gdev->base + gdev->ngpio > gpio) {
7790 spin_unlock_irqrestore(&gpio_lock, flags);
78− return &chip->desc[gpio - chip->base];
91+ return &gdev->descs[gpio - gdev->base];
7992 }
8093 }
8194
@@ -94,10 +107,12 @@ EXPORT_SYMBOL_GPL(gpio_to_desc); · 12 unmodified lines
94107 struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
95108 u16 hwnum)
96109 {
97− if (hwnum >= chip->ngpio)
110+ struct gpio_device *gdev = chip->gpiodev;
111+
112+ if (hwnum >= gdev->ngpio)
98113 return ERR_PTR(-EINVAL);
99114
100− return &chip->desc[hwnum];
115+ return &gdev->descs[hwnum];
101116 }
102117
103118 /**
@@ -107,7 +122,7 @@ struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, · 3 unmodified lines
107122 */
108123 int desc_to_gpio(const struct gpio_desc *desc)
109124 {
110− return desc->chip->base + (desc - &desc->chip->desc[0]);
125+ return desc->gdev->base + (desc - &desc->gdev->descs[0]);
111126 }
112127 EXPORT_SYMBOL_GPL(desc_to_gpio);
113128
@@ -118,23 +133,25 @@ EXPORT_SYMBOL_GPL(desc_to_gpio); · 4 unmodified lines
118133 */
119134 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
120135 {
121− return desc ? desc->chip : NULL;
136+ if (!desc || !desc->gdev || !desc->gdev->chip)
137+ return NULL;
138+ return desc->gdev->chip;
122139 }
123140 EXPORT_SYMBOL_GPL(gpiod_to_chip);
124141
125142 /* dynamic allocation of GPIOs, e.g. on a hotplugged device */
126143 static int gpiochip_find_base(int ngpio)
127144 {
128− struct gpio_chip *chip;
145+ struct gpio_device *gdev;
129146 int base = ARCH_NR_GPIOS - ngpio;
130147
131− list_for_each_entry_reverse(chip, &gpio_chips, list) {
148+ list_for_each_entry_reverse(gdev, &gpio_devices, list) {
132149 /* found a free space? */
133− if (chip->base + chip->ngpio <= base)
150+ if (gdev->base + gdev->ngpio <= base)
134151 break;
135152 else
136153 /* nope, check the space right before the chip */
137− base = chip->base - ngpio;
154+ base = gdev->base - ngpio;
138155 }
139156
140157 if (gpio_is_valid(base)) {
@@ -187,57 +204,45 @@ EXPORT_SYMBOL_GPL(gpiod_get_direction); · 46 unmodified lines
187204 * Return -EBUSY if the new chip overlaps with some other chip's integer
188205 * space.
189206 */
190−static int gpiochip_add_to_list(struct gpio_chip *chip)
207+static int gpiodev_add_to_list(struct gpio_device *gdev)
191208 {
192− struct gpio_chip *iterator;
193− struct gpio_chip *previous = NULL;
209+ struct gpio_device *prev, *next;
194210
195− if (list_empty(&gpio_chips)) {
196− list_add_tail(&chip->list, &gpio_chips);
211+ if (list_empty(&gpio_devices)) {
212+ /* initial entry in list */
213+ list_add_tail(&gdev->list, &gpio_devices);
197214 return 0;
198215 }
199216
200− list_for_each_entry(iterator, &gpio_chips, list) {
201− if (iterator->base >= chip->base + chip->ngpio) {
202− /*
203− * Iterator is the first GPIO chip so there is no
204− * previous one
205− */
206− if (!previous) {
207− goto found;
208− } else {
209− /*
210− * We found a valid range(means
211− * [base, base + ngpio - 1]) between previous
212− * and iterator chip.
213− */
214− if (previous->base + previous->ngpio
215− <= chip->base)
216− goto found;
217− }
218− }
219− previous = iterator;
217+ next = list_entry(gpio_devices.next, struct gpio_device, list);
218+ if (gdev->base + gdev->ngpio <= next->base) {
219+ /* add before first entry */
220+ list_add(&gdev->list, &gpio_devices);
221+ return 0;
220222 }
221223
222− /*
223− * We are beyond the last chip in the list and iterator now
224− * points to the head.
225− * Let iterator point to the last chip in the list.
226− */
227−
228− iterator = list_last_entry(&gpio_chips, struct gpio_chip, list);
229− if (iterator->base + iterator->ngpio <= chip->base) {
230− list_add(&chip->list, &iterator->list);
224+ prev = list_entry(gpio_devices.prev, struct gpio_device, list);
225+ if (prev->base + prev->ngpio <= gdev->base) {
226+ /* add behind last entry */
227+ list_add_tail(&gdev->list, &gpio_devices);
231228 return 0;
232229 }
233230
234− dev_err(chip->parent,
235− "GPIO integer space overlap, cannot add chip\n");
236− return -EBUSY;
231+ list_for_each_entry_safe(prev, next, &gpio_devices, list) {
232+ /* at the end of the list */
233+ if (&next->list == &gpio_devices)
234+ break;
237235
238−found:
239− list_add_tail(&chip->list, &iterator->list);
240− return 0;
236+ /* add between prev and next */
237+ if (prev->base + prev->ngpio <= gdev->base
238+ && gdev->base + gdev->ngpio <= next->base) {
239+ list_add(&gdev->list, &prev->list);
240+ return 0;
241+ }
242+ }
243+
244+ dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
245+ return -EBUSY;
241246 }
242247
243248 /**
@@ -245,23 +250,23 @@ found: · 1 unmodified line
245250 */
246251 static struct gpio_desc *gpio_name_to_desc(const char * const name)
247252 {
248− struct gpio_chip *chip;
253+ struct gpio_device *gdev;
249254 unsigned long flags;
250255
251256 spin_lock_irqsave(&gpio_lock, flags);
252257
253− list_for_each_entry(chip, &gpio_chips, list) {
258+ list_for_each_entry(gdev, &gpio_devices, list) {
254259 int i;
255260
256− for (i = 0; i != chip->ngpio; ++i) {
257− struct gpio_desc *gpio = &chip->desc[i];
261+ for (i = 0; i != gdev->ngpio; ++i) {
262+ struct gpio_desc *desc = &gdev->descs[i];
258263
259− if (!gpio->name || !name)
264+ if (!desc->name || !name)
260265 continue;
261266
262− if (!strcmp(gpio->name, name)) {
267+ if (!strcmp(desc->name, name)) {
263268 spin_unlock_irqrestore(&gpio_lock, flags);
264− return gpio;
269+ return desc;
265270 }
266271 }
267272 }
@@ -279,6 +284,7 @@ static struct gpio_desc *gpio_name_to_desc(const char * const name) · 11 unmodified lines
279284 */
280285 static int gpiochip_set_desc_names(struct gpio_chip *gc)
281286 {
287+ struct gpio_device *gdev = gc->gpiodev;
282288 int i;
283289
284290 if (!gc->names)
@@ -290,18 +296,153 @@ static int gpiochip_set_desc_names(struct gpio_chip *gc) · 5 unmodified lines
290296
291297 gpio = gpio_name_to_desc(gc->names[i]);
292298 if (gpio)
293− dev_warn(gc->parent, "Detected name collision for "
294− "GPIO name '%s'\n",
299+ dev_warn(&gdev->dev,
300+ "Detected name collision for GPIO name '%s'\n",
295301 gc->names[i]);
296302 }
297303
298304 /* Then add all names to the GPIO descriptors */
299305 for (i = 0; i != gc->ngpio; ++i)
300− gc->desc[i].name = gc->names[i];
306+ gdev->descs[i].name = gc->names[i];
307+
308+ return 0;
309+}
310+
311+/**
312+ * gpio_ioctl() - ioctl handler for the GPIO chardev
313+ */
314+static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
315+{
316+ struct gpio_device *gdev = filp->private_data;
317+ struct gpio_chip *chip = gdev->chip;
318+ int __user *ip = (int __user *)arg;
319+
320+ /* We fail any subsequent ioctl():s when the chip is gone */
321+ if (!chip)
322+ return -ENODEV;
323+
324+ /* Fill in the struct and pass to userspace */
325+ if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
326+ struct gpiochip_info chipinfo;
327+
328+ strncpy(chipinfo.name, dev_name(&gdev->dev),
329+ sizeof(chipinfo.name));
330+ chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
331+ strncpy(chipinfo.label, gdev->label,
332+ sizeof(chipinfo.label));
333+ chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
334+ chipinfo.lines = gdev->ngpio;
335+ if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
336+ return -EFAULT;
337+ return 0;
338+ } else if (cmd == GPIO_GET_LINEINFO_IOCTL) {
339+ struct gpioline_info lineinfo;
340+ struct gpio_desc *desc;
341+
342+ if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
343+ return -EFAULT;
344+ if (lineinfo.line_offset > gdev->ngpio)
345+ return -EINVAL;
346+
347+ desc = &gdev->descs[lineinfo.line_offset];
348+ if (desc->name) {
349+ strncpy(lineinfo.name, desc->name,
350+ sizeof(lineinfo.name));
351+ lineinfo.name[sizeof(lineinfo.name)-1] = '\0';
352+ } else {
353+ lineinfo.name[0] = '\0';
354+ }
355+ if (desc->label) {
356+ strncpy(lineinfo.consumer, desc->label,
357+ sizeof(lineinfo.consumer));
358+ lineinfo.consumer[sizeof(lineinfo.consumer)-1] = '\0';
359+ } else {
360+ lineinfo.consumer[0] = '\0';
361+ }
362+
363+ /*
364+ * Userspace only need to know that the kernel is using
365+ * this GPIO so it can't use it.
366+ */
367+ lineinfo.flags = 0;
368+ if (test_bit(FLAG_REQUESTED, &desc->flags) ||
369+ test_bit(FLAG_IS_HOGGED, &desc->flags) ||
370+ test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
371+ test_bit(FLAG_EXPORT, &desc->flags) ||
372+ test_bit(FLAG_SYSFS, &desc->flags))
373+ lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
374+ if (test_bit(FLAG_IS_OUT, &desc->flags))
375+ lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;
376+ if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
377+ lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW;
378+ if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
379+ lineinfo.flags |= GPIOLINE_FLAG_OPEN_DRAIN;
380+ if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
381+ lineinfo.flags |= GPIOLINE_FLAG_OPEN_SOURCE;
382+
383+ if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
384+ return -EFAULT;
385+ return 0;
386+ }
387+ return -EINVAL;
388+}
389+
390+/**
391+ * gpio_chrdev_open() - open the chardev for ioctl operations
392+ * @inode: inode for this chardev
393+ * @filp: file struct for storing private data
394+ * Returns 0 on success
395+ */
396+static int gpio_chrdev_open(struct inode *inode, struct file *filp)
397+{
398+ struct gpio_device *gdev = container_of(inode->i_cdev,
399+ struct gpio_device, chrdev);
400+
401+ /* Fail on open if the backing gpiochip is gone */
402+ if (!gdev || !gdev->chip)
403+ return -ENODEV;
404+ get_device(&gdev->dev);
405+ filp->private_data = gdev;
406+ return 0;
407+}
301408
409+/**
410+ * gpio_chrdev_release() - close chardev after ioctl operations
411+ * @inode: inode for this chardev
412+ * @filp: file struct for storing private data
413+ * Returns 0 on success
414+ */
415+static int gpio_chrdev_release(struct inode *inode, struct file *filp)
416+{
417+ struct gpio_device *gdev = container_of(inode->i_cdev,
418+ struct gpio_device, chrdev);
419+
420+ if (!gdev)
421+ return -ENODEV;
422+ put_device(&gdev->dev);
302423 return 0;
303424 }
304425
426+
427+static const struct file_operations gpio_fileops = {
428+ .release = gpio_chrdev_release,
429+ .open = gpio_chrdev_open,
430+ .owner = THIS_MODULE,
431+ .llseek = noop_llseek,
432+ .unlocked_ioctl = gpio_ioctl,
433+ .compat_ioctl = gpio_ioctl,
434+};
435+
436+static void gpiodevice_release(struct device *dev)
437+{
438+ struct gpio_device *gdev = dev_get_drvdata(dev);
439+
440+ cdev_del(&gdev->chrdev);
441+ list_del(&gdev->list);
442+ ida_simple_remove(&gpio_ida, gdev->id);
443+ kfree(gdev);
444+}
445+
305446 /**
306447 * gpiochip_add_data() - register a gpio_chip
307448 * @chip: the chip to register, with chip->base initialized
@@ -323,43 +464,107 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data) · 15 unmodified lines
323464 {
324465 unsigned long flags;
325466 int status = 0;
326− unsigned id;
467+ unsigned i;
327468 int base = chip->base;
328− struct gpio_desc *descs;
469+ struct gpio_device *gdev;
329470
330− descs = kcalloc(chip->ngpio, sizeof(descs[0]), GFP_KERNEL);
331− if (!descs)
471+ /*
472+ * First: allocate and populate the internal stat container, and
473+ * set up the struct device.
474+ */
475+ gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
476+ if (!gdev)
332477 return -ENOMEM;
478+ gdev->dev.bus = &gpio_bus_type;
479+ gdev->chip = chip;
480+ chip->gpiodev = gdev;
481+ if (chip->parent) {
482+ gdev->dev.parent = chip->parent;
483+ gdev->dev.of_node = chip->parent->of_node;
484+ } else {
485+#ifdef CONFIG_OF_GPIO
486+ /* If the gpiochip has an assigned OF node this takes precedence */
487+ if (chip->of_node)
488+ gdev->dev.of_node = chip->of_node;
489+#endif
490+ }
491+ gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
492+ if (gdev->id < 0) {
493+ status = gdev->id;
494+ goto err_free_gdev;
495+ }
496+ dev_set_name(&gdev->dev, "gpiochip%d", gdev->id);
497+ device_initialize(&gdev->dev);
498+ dev_set_drvdata(&gdev->dev, gdev);
499+ if (chip->parent && chip->parent->driver)
500+ gdev->owner = chip->parent->driver->owner;
501+ else if (chip->owner)
502+ /* TODO: remove chip->owner */
503+ gdev->owner = chip->owner;
504+ else
505+ gdev->owner = THIS_MODULE;
333506
334− chip->data = data;
507+ gdev->descs = devm_kcalloc(&gdev->dev, chip->ngpio,
508+ sizeof(gdev->descs[0]), GFP_KERNEL);
509+ if (!gdev->descs) {
510+ status = -ENOMEM;
511+ goto err_free_gdev;
512+ }
335513
336514 if (chip->ngpio == 0) {
337515 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
338− return -EINVAL;
516+ status = -EINVAL;
517+ goto err_free_gdev;
339518 }
340519
520+ if (chip->label)
521+ gdev->label = devm_kstrdup(&gdev->dev, chip->label, GFP_KERNEL);
522+ else
523+ gdev->label = devm_kstrdup(&gdev->dev, "unknown", GFP_KERNEL);
524+ if (!gdev->label) {
525+ status = -ENOMEM;
526+ goto err_free_gdev;
527+ }
528+
529+ gdev->ngpio = chip->ngpio;
530+ gdev->data = data;
531+
341532 spin_lock_irqsave(&gpio_lock, flags);
342533
534+ /*
535+ * TODO: this allocates a Linux GPIO number base in the global
536+ * GPIO numberspace for this chip. In the long run we want to
537+ * get *rid* of this numberspace and use only descriptors, but
538+ * it may be a pipe dream. It will not happen before we get rid
539+ * of the sysfs interface anyways.
540+ */
343541 if (base < 0) {
344542 base = gpiochip_find_base(chip->ngpio);
345543 if (base < 0) {
346544 status = base;
347545 spin_unlock_irqrestore(&gpio_lock, flags);
348− goto err_free_descs;
546+ goto err_free_gdev;
349547 }
548+ /*
549+ * TODO: it should not be necessary to reflect the assigned
550+ * base outside of the GPIO subsystem. Go over drivers and
551+ * see if anyone makes use of this, else drop this and assign
552+ * a poison instead.
553+ */
350554 chip->base = base;
351555 }
556+ gdev->base = base;
352557
353− status = gpiochip_add_to_list(chip);
558+ status = gpiodev_add_to_list(gdev);
354559 if (status) {
355560 spin_unlock_irqrestore(&gpio_lock, flags);
356− goto err_free_descs;
561+ goto err_free_gdev;
357562 }
358563
359− for (id = 0; id < chip->ngpio; id++) {
360− struct gpio_desc *desc = &descs[id];
564+ for (i = 0; i < chip->ngpio; i++) {
565+ struct gpio_desc *desc = &gdev->descs[i];
361566
362− desc->chip = chip;
567+ desc->gdev = gdev;
363568
364569 /* REVISIT: most hardware initializes GPIOs as inputs (often
365570 * with pullups enabled) so power usage is minimized. Linux
@@ -370,17 +575,12 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data) · 4 unmodified lines
370575 desc->flags = !chip->direction_input ? (1 << FLAG_IS_OUT) : 0;
371576 }
372577
373− chip->desc = descs;
374−
375578 spin_unlock_irqrestore(&gpio_lock, flags);
376579
377580 #ifdef CONFIG_PINCTRL
378− INIT_LIST_HEAD(&chip->pin_ranges);
581+ INIT_LIST_HEAD(&gdev->pin_ranges);
379582 #endif
380583
381− if (!chip->owner && chip->parent && chip->parent->driver)
382− chip->owner = chip->parent->driver->owner;
383−
384584 status = gpiochip_set_desc_names(chip);
385585 if (status)
386586 goto err_remove_from_list;
@@ -391,36 +591,72 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data) · 4 unmodified lines
391591
392592 acpi_gpiochip_add(chip);
393593
394− status = gpiochip_sysfs_register(chip);
594+ /*
595+ * By first adding the chardev, and then adding the device,
596+ * we get a device node entry in sysfs under
597+ * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
598+ * coldplug of device nodes and other udev business.
599+ */
600+ cdev_init(&gdev->chrdev, &gpio_fileops);
601+ gdev->chrdev.owner = THIS_MODULE;
602+ gdev->chrdev.kobj.parent = &gdev->dev.kobj;
603+ gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
604+ status = cdev_add(&gdev->chrdev, gdev->dev.devt, 1);
605+ if (status < 0)
606+ chip_warn(chip, "failed to add char device %d:%d\n",
607+ MAJOR(gpio_devt), gdev->id);
608+ else
609+ chip_dbg(chip, "added GPIO chardev (%d:%d)\n",
610+ MAJOR(gpio_devt), gdev->id);
611+ status = device_add(&gdev->dev);
395612 if (status)
396− goto err_remove_chip;
613+ goto err_remove_chardev;
614+
615+ status = gpiochip_sysfs_register(gdev);
616+ if (status)
617+ goto err_remove_device;
397618
398− pr_debug("%s: registered GPIOs %d to %d on device: %s\n", __func__,
399− chip->base, chip->base + chip->ngpio - 1,
400− chip->label ? : "generic");
619+ /* From this point, the .release() function cleans up gpio_device */
620+ gdev->dev.release = gpiodevice_release;
621+ get_device(&gdev->dev);
622+ pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
623+ __func__, gdev->base, gdev->base + gdev->ngpio - 1,
624+ dev_name(&gdev->dev), chip->label ? : "generic");
401625
402626 return 0;
403627
628+err_remove_device:
629+ device_del(&gdev->dev);
630+err_remove_chardev:
631+ cdev_del(&gdev->chrdev);
404632 err_remove_chip:
405633 acpi_gpiochip_remove(chip);
406634 gpiochip_free_hogs(chip);
407635 of_gpiochip_remove(chip);
408636 err_remove_from_list:
409637 spin_lock_irqsave(&gpio_lock, flags);
410− list_del(&chip->list);
638+ list_del(&gdev->list);
411639 spin_unlock_irqrestore(&gpio_lock, flags);
412− chip->desc = NULL;
413−err_free_descs:
414− kfree(descs);
415−
640+err_free_gdev:
641+ ida_simple_remove(&gpio_ida, gdev->id);
416642 /* failures here can mean systems won't boot... */
417643 pr_err("%s: GPIOs %d..%d (%s) failed to register\n", __func__,
418− chip->base, chip->base + chip->ngpio - 1,
419− chip->label ? : "generic");
644+ gdev->base, gdev->base + gdev->ngpio - 1,
645+ chip->label ? : "generic");
646+ kfree(gdev);
420647 return status;
421648 }
422649 EXPORT_SYMBOL_GPL(gpiochip_add_data);
423650
651+/**
652+ * gpiochip_get_data() - get per-subdriver data for the chip
653+ */
654+void *gpiochip_get_data(struct gpio_chip *chip)
655+{
656+ return chip->gpiodev->data;
657+}
658+EXPORT_SYMBOL_GPL(gpiochip_get_data);
659+
424660 /**
425661 * gpiochip_remove() - unregister a gpio_chip
426662 * @chip: the chip to unregister
@@ -429,39 +665,123 @@ EXPORT_SYMBOL_GPL(gpiochip_add_data); · 2 unmodified lines
429665 */
430666 void gpiochip_remove(struct gpio_chip *chip)
431667 {
668+ struct gpio_device *gdev = chip->gpiodev;
432669 struct gpio_desc *desc;
433670 unsigned long flags;
434− unsigned id;
671+ unsigned i;
435672 bool requested = false;
436673
437− gpiochip_sysfs_unregister(chip);
438−
674+ /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
675+ gpiochip_sysfs_unregister(gdev);
676+ /* Numb the device, cancelling all outstanding operations */
677+ gdev->chip = NULL;
439678 gpiochip_irqchip_remove(chip);
440−
441679 acpi_gpiochip_remove(chip);
442680 gpiochip_remove_pin_ranges(chip);
443681 gpiochip_free_hogs(chip);
444682 of_gpiochip_remove(chip);
683+ /*
684+ * We accept no more calls into the driver from this point, so
685+ * NULL the driver data pointer
686+ */
687+ gdev->data = NULL;
445688
446689 spin_lock_irqsave(&gpio_lock, flags);
447− for (id = 0; id < chip->ngpio; id++) {
448− desc = &chip->desc[id];
449− desc->chip = NULL;
690+ for (i = 0; i < gdev->ngpio; i++) {
691+ desc = &gdev->descs[i];
450692 if (test_bit(FLAG_REQUESTED, &desc->flags))
451693 requested = true;
452694 }
453− list_del(&chip->list);
454695 spin_unlock_irqrestore(&gpio_lock, flags);
455696
456697 if (requested)
457− dev_crit(chip->parent,
698+ dev_crit(&gdev->dev,
458699 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
459700
460− kfree(chip->desc);
461− chip->desc = NULL;
701+ /*
702+ * The gpiochip side puts its use of the device to rest here:
703+ * if there are no userspace clients, the chardev and device will
704+ * be removed, else it will be dangling until the last user is
705+ * gone.
706+ */
707+ put_device(&gdev->dev);
462708 }
463709 EXPORT_SYMBOL_GPL(gpiochip_remove);
464710
711+static void devm_gpio_chip_release(struct device *dev, void *res)
712+{
713+ struct gpio_chip *chip = *(struct gpio_chip **)res;
714+
715+ gpiochip_remove(chip);
716+}
717+
718+static int devm_gpio_chip_match(struct device *dev, void *res, void *data)
719+
720+{
721+ struct gpio_chip **r = res;
722+
723+ if (!r || !*r) {
724+ WARN_ON(!r || !*r);
725+ return 0;
726+ }
727+
728+ return *r == data;
729+}
730+
731+/**
732+ * devm_gpiochip_add_data() - Resource manager piochip_add_data()
733+ * @dev: the device pointer on which irq_chip belongs to.
734+ * @chip: the chip to register, with chip->base initialized
735+ * Context: potentially before irqs will work
736+ *
737+ * Returns a negative errno if the chip can't be registered, such as
738+ * because the chip->base is invalid or already associated with a
739+ * different chip. Otherwise it returns zero as a success code.
740+ *
741+ * The gpio chip automatically be released when the device is unbound.
742+ */
743+int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
744+ void *data)
745+{
746+ struct gpio_chip **ptr;
747+ int ret;
748+
749+ ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr),
750+ GFP_KERNEL);
751+ if (!ptr)
752+ return -ENOMEM;
753+
754+ ret = gpiochip_add_data(chip, data);
755+ if (ret < 0) {
756+ devres_free(ptr);
757+ return ret;
758+ }
759+
760+ *ptr = chip;
761+ devres_add(dev, ptr);
762+
763+ return 0;
764+}
765+EXPORT_SYMBOL_GPL(devm_gpiochip_add_data);
766+
767+/**
768+ * devm_gpiochip_remove() - Resource manager of gpiochip_remove()
769+ * @dev: device for which which resource was allocated
770+ * @chip: the chip to remove
771+ *
772+ * A gpio_chip with any GPIOs still requested may not be removed.
773+ */
774+void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip)
775+{
776+ int ret;
777+
778+ ret = devres_release(dev, devm_gpio_chip_release,
779+ devm_gpio_chip_match, chip);
780+ if (!ret)
781+ WARN_ON(ret);
782+}
783+EXPORT_SYMBOL_GPL(devm_gpiochip_remove);
784+
465785 /**
466786 * gpiochip_find() - iterator for locating a specific gpio_chip
467787 * @data: data to pass to match function
@@ -477,17 +797,21 @@ struct gpio_chip *gpiochip_find(void *data, · 9 unmodified lines
477797 int (*match)(struct gpio_chip *chip,
478798 void *data))
479799 {
800+ struct gpio_device *gdev;
480801 struct gpio_chip *chip;
481802 unsigned long flags;
482803
483804 spin_lock_irqsave(&gpio_lock, flags);
484− list_for_each_entry(chip, &gpio_chips, list)
485− if (match(chip, data))
805+ list_for_each_entry(gdev, &gpio_devices, list)
806+ if (match(gdev->chip, data))
486807 break;
487808
488809 /* No match? */
489− if (&chip->list == &gpio_chips)
810+ if (&gdev->list == &gpio_devices)
490811 chip = NULL;
812+ else
813+ chip = gdev->chip;
814+
491815 spin_unlock_irqrestore(&gpio_lock, flags);
492816
493817 return chip;
@@ -617,14 +941,14 @@ static int gpiochip_irq_reqres(struct irq_data *d) · 123 unmodified lines
617941 {
618942 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
619943
620− if (!try_module_get(chip->owner))
944+ if (!try_module_get(chip->gpiodev->owner))
621945 return -ENODEV;
622946
623947 if (gpiochip_lock_as_irq(chip, d->hwirq)) {
624948 chip_err(chip,
625949 "unable to lock HW IRQ %lu for IRQ\n",
626950 d->hwirq);
627− module_put(chip->owner);
951+ module_put(chip->gpiodev->owner);
628952 return -EINVAL;
629953 }
630954 return 0;
@@ -635,7 +959,7 @@ static void gpiochip_irq_relres(struct irq_data *d) · 4 unmodified lines
635959 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
636960
637961 gpiochip_unlock_as_irq(chip, d->hwirq);
638− module_put(chip->owner);
962+ module_put(chip->gpiodev->owner);
639963 }
640964
641965 static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
@@ -785,7 +1109,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {} · 143 unmodified lines
7851109 */
7861110 int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
7871111 {
788− return pinctrl_request_gpio(chip->base + offset);
1112+ return pinctrl_request_gpio(chip->gpiodev->base + offset);
7891113 }
7901114 EXPORT_SYMBOL_GPL(gpiochip_generic_request);
7911115
@@ -796,7 +1120,7 @@ EXPORT_SYMBOL_GPL(gpiochip_generic_request); · 4 unmodified lines
7961120 */
7971121 void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
7981122 {
799− pinctrl_free_gpio(chip->base + offset);
1123+ pinctrl_free_gpio(chip->gpiodev->base + offset);
8001124 }
8011125 EXPORT_SYMBOL_GPL(gpiochip_generic_free);
8021126
@@ -814,6 +1138,7 @@ int gpiochip_add_pingroup_range(struct gpio_chip *chip, · 11 unmodified lines
8141138 unsigned int gpio_offset, const char *pin_group)
8151139 {
8161140 struct gpio_pin_range *pin_range;
1141+ struct gpio_device *gdev = chip->gpiodev;
8171142 int ret;
8181143
8191144 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
@@ -826,7 +1151,7 @@ int gpiochip_add_pingroup_range(struct gpio_chip *chip, · 6 unmodified lines
8261151 pin_range->range.id = gpio_offset;
8271152 pin_range->range.gc = chip;
8281153 pin_range->range.name = chip->label;
829− pin_range->range.base = chip->base + gpio_offset;
1154+ pin_range->range.base = gdev->base + gpio_offset;
8301155 pin_range->pctldev = pctldev;
8311156
8321157 ret = pinctrl_get_group_pins(pctldev, pin_group,
@@ -843,7 +1168,7 @@ int gpiochip_add_pingroup_range(struct gpio_chip *chip, · 10 unmodified lines
8431168 gpio_offset, gpio_offset + pin_range->range.npins - 1,
8441169 pinctrl_dev_get_devname(pctldev), pin_group);
8451170
846− list_add_tail(&pin_range->node, &chip->pin_ranges);
1171+ list_add_tail(&pin_range->node, &gdev->pin_ranges);
8471172
8481173 return 0;
8491174 }
@@ -863,6 +1188,7 @@ int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, · 13 unmodified lines
8631188 unsigned int npins)
8641189 {
8651190 struct gpio_pin_range *pin_range;
1191+ struct gpio_device *gdev = chip->gpiodev;
8661192 int ret;
8671193
8681194 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
@@ -875,7 +1201,7 @@ int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, · 6 unmodified lines
8751201 pin_range->range.id = gpio_offset;
8761202 pin_range->range.gc = chip;
8771203 pin_range->range.name = chip->label;
878− pin_range->range.base = chip->base + gpio_offset;
1204+ pin_range->range.base = gdev->base + gpio_offset;
8791205 pin_range->range.pin_base = pin_offset;
8801206 pin_range->range.npins = npins;
8811207 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
@@ -891,7 +1217,7 @@ int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, · 9 unmodified lines
8911217 pinctl_name,
8921218 pin_offset, pin_offset + npins - 1);
8931219
894− list_add_tail(&pin_range->node, &chip->pin_ranges);
1220+ list_add_tail(&pin_range->node, &gdev->pin_ranges);
8951221
8961222 return 0;
8971223 }
@@ -904,8 +1230,9 @@ EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); · 6 unmodified lines
9041230 void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
9051231 {
9061232 struct gpio_pin_range *pin_range, *tmp;
1233+ struct gpio_device *gdev = chip->gpiodev;
9071234
908− list_for_each_entry_safe(pin_range, tmp, &chip->pin_ranges, node) {
1235+ list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
9091236 list_del(&pin_range->node);
9101237 pinctrl_remove_gpio_range(pin_range->pctldev,
9111238 &pin_range->range);
@@ -922,7 +1249,7 @@ EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); · 10 unmodified lines
9221249 */
9231250 static int __gpiod_request(struct gpio_desc *desc, const char *label)
9241251 {
925− struct gpio_chip *chip = desc->chip;
1252+ struct gpio_chip *chip = desc->gdev->chip;
9261253 int status;
9271254 unsigned long flags;
9281255
@@ -971,27 +1298,50 @@ done: · 42 unmodified lines
9711298 return status;
9721299 }
9731300
1301+/*
1302+ * This descriptor validation needs to be inserted verbatim into each
1303+ * function taking a descriptor, so we need to use a preprocessor
1304+ * macro to avoid endless duplication.
1305+ */
1306+#define VALIDATE_DESC(desc) do { \
1307+ if (!desc || !desc->gdev) { \
1308+ pr_warn("%s: invalid GPIO\n", __func__); \
1309+ return -EINVAL; \
1310+ } \
1311+ if ( !desc->gdev->chip ) { \
1312+ dev_warn(&desc->gdev->dev, \
1313+ "%s: backing chip is gone\n", __func__); \
1314+ return 0; \
1315+ } } while (0)
1316+
1317+#define VALIDATE_DESC_VOID(desc) do { \
1318+ if (!desc || !desc->gdev) { \
1319+ pr_warn("%s: invalid GPIO\n", __func__); \
1320+ return; \
1321+ } \
1322+ if (!desc->gdev->chip) { \
1323+ dev_warn(&desc->gdev->dev, \
1324+ "%s: backing chip is gone\n", __func__); \
1325+ return; \
1326+ } } while (0)
1327+
1328+
9741329 int gpiod_request(struct gpio_desc *desc, const char *label)
9751330 {
9761331 int status = -EPROBE_DEFER;
977− struct gpio_chip *chip;
1332+ struct gpio_device *gdev;
9781333
979− if (!desc) {
980− pr_warn("%s: invalid GPIO\n", __func__);
981− return -EINVAL;
982− }
1334+ VALIDATE_DESC(desc);
1335+ gdev = desc->gdev;
9831336
984− chip = desc->chip;
985− if (!chip)
986− goto done;
987−
988− if (try_module_get(chip->owner)) {
1337+ if (try_module_get(gdev->owner)) {
9891338 status = __gpiod_request(desc, label);
9901339 if (status < 0)
991− module_put(chip->owner);
1340+ module_put(gdev->owner);
1341+ else
1342+ get_device(&gdev->dev);
9921343 }
9931344
994−done:
9951345 if (status)
9961346 gpiod_dbg(desc, "%s: status %d\n", __func__, status);
9971347
@@ -1010,7 +1360,7 @@ static bool __gpiod_free(struct gpio_desc *desc) · 12 unmodified lines
10101360
10111361 spin_lock_irqsave(&gpio_lock, flags);
10121362
1013− chip = desc->chip;
1363+ chip = desc->gdev->chip;
10141364 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
10151365 if (chip->free) {
10161366 spin_unlock_irqrestore(&gpio_lock, flags);
@@ -1033,10 +1383,12 @@ static bool __gpiod_free(struct gpio_desc *desc) · 16 unmodified lines
10331383
10341384 void gpiod_free(struct gpio_desc *desc)
10351385 {
1036− if (desc && __gpiod_free(desc))
1037− module_put(desc->chip->owner);
1038− else
1386+ if (desc && desc->gdev && __gpiod_free(desc)) {
1387+ module_put(desc->gdev->owner);
1388+ put_device(&desc->gdev->dev);
1389+ } else {
10391390 WARN_ON(extra_checks);
1391+ }
10401392 }
10411393
10421394 /**
@@ -1059,7 +1411,7 @@ const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset) · 16 unmodified lines
10591411 if (offset >= chip->ngpio)
10601412 return NULL;
10611413
1062− desc = &chip->desc[offset];
1414+ desc = &chip->gpiodev->descs[offset];
10631415
10641416 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
10651417 return NULL;
@@ -1111,7 +1463,8 @@ void gpiochip_free_own_desc(struct gpio_desc *desc) · 45 unmodified lines
11111463 }
11121464 EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
11131465
1114−/* Drivers MUST set GPIO direction before making get/set calls. In
1466+/*
1467+ * Drivers MUST set GPIO direction before making get/set calls. In
11151468 * some cases this is done in early boot, before IRQs are enabled.
11161469 *
11171470 * As a rule these aren't called more than once (except for drivers
@@ -1134,12 +1487,9 @@ int gpiod_direction_input(struct gpio_desc *desc) · 16 unmodified lines
11341487 struct gpio_chip *chip;
11351488 int status = -EINVAL;
11361489
1137− if (!desc || !desc->chip) {
1138− pr_warn("%s: invalid GPIO\n", __func__);
1139− return -EINVAL;
1140− }
1490+ VALIDATE_DESC(desc);
1491+ chip = desc->gdev->chip;
11411492
1142− chip = desc->chip;
11431493 if (!chip->get || !chip->direction_input) {
11441494 gpiod_warn(desc,
11451495 "%s: missing get() or direction_input() operations\n",
@@ -1178,7 +1528,7 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) · 32 unmodified lines
11781528 if (!value && test_bit(FLAG_OPEN_SOURCE, &desc->flags))
11791529 return gpiod_direction_input(desc);
11801530
1181− chip = desc->chip;
1531+ chip = desc->gdev->chip;
11821532 if (!chip->set || !chip->direction_output) {
11831533 gpiod_warn(desc,
11841534 "%s: missing set() or direction_output() operations\n",
@@ -1207,10 +1557,7 @@ static int _gpiod_direction_output_raw(struct gpio_desc *desc, int value) · 22 unmodified lines
12071557 */
12081558 int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
12091559 {
1210− if (!desc || !desc->chip) {
1211− pr_warn("%s: invalid GPIO\n", __func__);
1212− return -EINVAL;
1213− }
1560+ VALIDATE_DESC(desc);
12141561 return _gpiod_direction_output_raw(desc, value);
12151562 }
12161563 EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
@@ -1229,10 +1576,7 @@ EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); · 12 unmodified lines
12291576 */
12301577 int gpiod_direction_output(struct gpio_desc *desc, int value)
12311578 {
1232− if (!desc || !desc->chip) {
1233− pr_warn("%s: invalid GPIO\n", __func__);
1234− return -EINVAL;
1235− }
1579+ VALIDATE_DESC(desc);
12361580 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
12371581 value = !value;
12381582 return _gpiod_direction_output_raw(desc, value);
@@ -1251,12 +1595,8 @@ int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) · 12 unmodified lines
12511595 {
12521596 struct gpio_chip *chip;
12531597
1254− if (!desc || !desc->chip) {
1255− pr_warn("%s: invalid GPIO\n", __func__);
1256− return -EINVAL;
1257− }
1258−
1259− chip = desc->chip;
1598+ VALIDATE_DESC(desc);
1599+ chip = desc->gdev->chip;
12601600 if (!chip->set || !chip->set_debounce) {
12611601 gpiod_dbg(desc,
12621602 "%s: missing set() or set_debounce() operations\n",
@@ -1276,6 +1616,7 @@ EXPORT_SYMBOL_GPL(gpiod_set_debounce); · 13 unmodified lines
12761616 */
12771617 int gpiod_is_active_low(const struct gpio_desc *desc)
12781618 {
1619+ VALIDATE_DESC(desc);
12791620 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
12801621 }
12811622 EXPORT_SYMBOL_GPL(gpiod_is_active_low);
@@ -1308,7 +1649,7 @@ static int _gpiod_get_raw_value(const struct gpio_desc *desc) · 26 unmodified lines
13081649 int offset;
13091650 int value;
13101651
1311− chip = desc->chip;
1652+ chip = desc->gdev->chip;
13121653 offset = gpio_chip_hwgpio(desc);
13131654 value = chip->get ? chip->get(chip, offset) : -EIO;
13141655 value = value < 0 ? value : !!value;
@@ -1328,10 +1669,9 @@ static int _gpiod_get_raw_value(const struct gpio_desc *desc) · 13 unmodified lines
13281669 */
13291670 int gpiod_get_raw_value(const struct gpio_desc *desc)
13301671 {
1331− if (!desc)
1332− return 0;
1672+ VALIDATE_DESC(desc);
13331673 /* Should be using gpio_get_value_cansleep() */
1334− WARN_ON(desc->chip->can_sleep);
1674+ WARN_ON(desc->gdev->chip->can_sleep);
13351675 return _gpiod_get_raw_value(desc);
13361676 }
13371677 EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
@@ -1349,10 +1689,10 @@ EXPORT_SYMBOL_GPL(gpiod_get_raw_value); · 11 unmodified lines
13491689 int gpiod_get_value(const struct gpio_desc *desc)
13501690 {
13511691 int value;
1352− if (!desc)
1353− return 0;
1692+
1693+ VALIDATE_DESC(desc);
13541694 /* Should be using gpio_get_value_cansleep() */
1355− WARN_ON(desc->chip->can_sleep);
1695+ WARN_ON(desc->gdev->chip->can_sleep);
13561696
13571697 value = _gpiod_get_raw_value(desc);
13581698 if (value < 0)
@@ -1373,7 +1713,7 @@ EXPORT_SYMBOL_GPL(gpiod_get_value); · 14 unmodified lines
13731713 static void _gpio_set_open_drain_value(struct gpio_desc *desc, bool value)
13741714 {
13751715 int err = 0;
1376− struct gpio_chip *chip = desc->chip;
1716+ struct gpio_chip *chip = desc->gdev->chip;
13771717 int offset = gpio_chip_hwgpio(desc);
13781718
13791719 if (value) {
@@ -1400,7 +1740,7 @@ static void _gpio_set_open_drain_value(struct gpio_desc *desc, bool value) · 20 unmodified lines
14001740 static void _gpio_set_open_source_value(struct gpio_desc *desc, bool value)
14011741 {
14021742 int err = 0;
1403− struct gpio_chip *chip = desc->chip;
1743+ struct gpio_chip *chip = desc->gdev->chip;
14041744 int offset = gpio_chip_hwgpio(desc);
14051745
14061746 if (value) {
@@ -1423,7 +1763,7 @@ static void _gpiod_set_raw_value(struct gpio_desc *desc, bool value) · 16 unmodified lines
14231763 {
14241764 struct gpio_chip *chip;
14251765
1426− chip = desc->chip;
1766+ chip = desc->gdev->chip;
14271767 trace_gpio_value(desc_to_gpio(desc), 0, value);
14281768 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
14291769 _gpio_set_open_drain_value(desc, value);
@@ -1471,7 +1811,7 @@ static void gpiod_set_array_value_priv(bool raw, bool can_sleep, · 41 unmodified lines
14711811 int i = 0;
14721812
14731813 while (i < array_size) {
1474− struct gpio_chip *chip = desc_array[i]->chip;
1814+ struct gpio_chip *chip = desc_array[i]->gdev->chip;
14751815 unsigned long mask[BITS_TO_LONGS(chip->ngpio)];
14761816 unsigned long bits[BITS_TO_LONGS(chip->ngpio)];
14771817 int count = 0;
@@ -1505,7 +1845,8 @@ static void gpiod_set_array_value_priv(bool raw, bool can_sleep, · 27 unmodified lines
15051845 count++;
15061846 }
15071847 i++;
1508− } while ((i < array_size) && (desc_array[i]->chip == chip));
1848+ } while ((i < array_size) &&
1849+ (desc_array[i]->gdev->chip == chip));
15091850 /* push collected bits to outputs */
15101851 if (count != 0)
15111852 gpio_chip_set_multiple(chip, mask, bits);
@@ -1525,10 +1866,9 @@ static void gpiod_set_array_value_priv(bool raw, bool can_sleep, · 13 unmodified lines
15251866 */
15261867 void gpiod_set_raw_value(struct gpio_desc *desc, int value)
15271868 {
1528− if (!desc)
1529− return;
1530− /* Should be using gpio_set_value_cansleep() */
1531− WARN_ON(desc->chip->can_sleep);
1869+ VALIDATE_DESC_VOID(desc);
1870+ /* Should be using gpiod_set_value_cansleep() */
1871+ WARN_ON(desc->gdev->chip->can_sleep);
15321872 _gpiod_set_raw_value(desc, value);
15331873 }
15341874 EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
@@ -1546,10 +1886,9 @@ EXPORT_SYMBOL_GPL(gpiod_set_raw_value); · 11 unmodified lines
15461886 */
15471887 void gpiod_set_value(struct gpio_desc *desc, int value)
15481888 {
1549− if (!desc)
1550− return;
1551− /* Should be using gpio_set_value_cansleep() */
1552− WARN_ON(desc->chip->can_sleep);
1889+ VALIDATE_DESC_VOID(desc);
1890+ /* Should be using gpiod_set_value_cansleep() */
1891+ WARN_ON(desc->gdev->chip->can_sleep);
15531892 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
15541893 value = !value;
15551894 _gpiod_set_raw_value(desc, value);
@@ -1607,9 +1946,8 @@ EXPORT_SYMBOL_GPL(gpiod_set_array_value); · 51 unmodified lines
16071946 */
16081947 int gpiod_cansleep(const struct gpio_desc *desc)
16091948 {
1610− if (!desc)
1611− return 0;
1612− return desc->chip->can_sleep;
1949+ VALIDATE_DESC(desc);
1950+ return desc->gdev->chip->can_sleep;
16131951 }
16141952 EXPORT_SYMBOL_GPL(gpiod_cansleep);
16151953
@@ -1625,9 +1963,8 @@ int gpiod_to_irq(const struct gpio_desc *desc) · 9 unmodified lines
16251963 struct gpio_chip *chip;
16261964 int offset;
16271965
1628− if (!desc)
1629− return -EINVAL;
1630− chip = desc->chip;
1966+ VALIDATE_DESC(desc);
1967+ chip = desc->gdev->chip;
16311968 offset = gpio_chip_hwgpio(desc);
16321969 return chip->to_irq ? chip->to_irq(chip, offset) : -ENXIO;
16331970 }
@@ -1646,14 +1983,14 @@ int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset) · 12 unmodified lines
16461983 if (offset >= chip->ngpio)
16471984 return -EINVAL;
16481985
1649− if (test_bit(FLAG_IS_OUT, &chip->desc[offset].flags)) {
1986+ if (test_bit(FLAG_IS_OUT, &chip->gpiodev->descs[offset].flags)) {
16501987 chip_err(chip,
16511988 "%s: tried to flag a GPIO set as output for IRQ\n",
16521989 __func__);
16531990 return -EIO;
16541991 }
16551992
1656− set_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags);
1993+ set_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
16571994 return 0;
16581995 }
16591996 EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
@@ -1671,10 +2008,37 @@ void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) · 11 unmodified lines
16712008 if (offset >= chip->ngpio)
16722009 return;
16732010
1674− clear_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags);
2011+ clear_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
16752012 }
16762013 EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
16772014
2015+bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
2016+{
2017+ if (offset >= chip->ngpio)
2018+ return false;
2019+
2020+ return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
2021+}
2022+EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
2023+
2024+bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
2025+{
2026+ if (offset >= chip->ngpio)
2027+ return false;
2028+
2029+ return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
2030+}
2031+EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
2032+
2033+bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
2034+{
2035+ if (offset >= chip->ngpio)
2036+ return false;
2037+
2038+ return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
2039+}
2040+EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
2041+
16782042 /**
16792043 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
16802044 * @desc: gpio whose value will be returned
@@ -1687,8 +2051,7 @@ EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); · 6 unmodified lines
16872051 int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
16882052 {
16892053 might_sleep_if(extra_checks);
1690− if (!desc)
1691− return 0;
2054+ VALIDATE_DESC(desc);
16922055 return _gpiod_get_raw_value(desc);
16932056 }
16942057 EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
@@ -1707,9 +2070,7 @@ int gpiod_get_value_cansleep(const struct gpio_desc *desc) · 12 unmodified lines
17072070 int value;
17082071
17092072 might_sleep_if(extra_checks);
1710− if (!desc)
1711− return 0;
1712−
2073+ VALIDATE_DESC(desc);
17132074 value = _gpiod_get_raw_value(desc);
17142075 if (value < 0)
17152076 return value;
@@ -1734,8 +2095,7 @@ EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); · 18 unmodified lines
17342095 void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
17352096 {
17362097 might_sleep_if(extra_checks);
1737− if (!desc)
1738− return;
2098+ VALIDATE_DESC_VOID(desc);
17392099 _gpiod_set_raw_value(desc, value);
17402100 }
17412101 EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
@@ -1753,9 +2113,7 @@ EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); · 11 unmodified lines
17532113 void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
17542114 {
17552115 might_sleep_if(extra_checks);
1756− if (!desc)
1757− return;
1758−
2116+ VALIDATE_DESC_VOID(desc);
17592117 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
17602118 value = !value;
17612119 _gpiod_set_raw_value(desc, value);
@@ -2358,8 +2716,8 @@ static void gpiochip_free_hogs(struct gpio_chip *chip) · 596 unmodified lines
23582716 int id;
23592717
23602718 for (id = 0; id < chip->ngpio; id++) {
2361− if (test_bit(FLAG_IS_HOGGED, &chip->desc[id].flags))
2362− gpiochip_free_own_desc(&chip->desc[id]);
2719+ if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
2720+ gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
23632721 }
23642722 }
23652723
@@ -2456,17 +2814,38 @@ void gpiod_put_array(struct gpio_descs *descs) · 90 unmodified lines
24562814 }
24572815 EXPORT_SYMBOL_GPL(gpiod_put_array);
24582816
2817+static int __init gpiolib_dev_init(void)
2818+{
2819+ int ret;
2820+
2821+ /* Register GPIO sysfs bus */
2822+ ret = bus_register(&gpio_bus_type);
2823+ if (ret < 0) {
2824+ pr_err("gpiolib: could not register GPIO bus type\n");
2825+ return ret;
2826+ }
2827+
2828+ ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpiochip");
2829+ if (ret < 0) {
2830+ pr_err("gpiolib: failed to allocate char dev region\n");
2831+ bus_unregister(&gpio_bus_type);
2832+ }
2833+ return ret;
2834+}
2835+core_initcall(gpiolib_dev_init);
2836+
24592837 #ifdef CONFIG_DEBUG_FS
24602838
2461−static void gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
2839+static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
24622840 {
24632841 unsigned i;
2464− unsigned gpio = chip->base;
2465− struct gpio_desc *gdesc = &chip->desc[0];
2842+ struct gpio_chip *chip = gdev->chip;
2843+ unsigned gpio = gdev->base;
2844+ struct gpio_desc *gdesc = &gdev->descs[0];
24662845 int is_out;
24672846 int is_irq;
24682847
2469− for (i = 0; i < chip->ngpio; i++, gpio++, gdesc++) {
2848+ for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
24702849 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
24712850 if (gdesc->name) {
24722851 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
@@ -2492,16 +2871,16 @@ static void gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip) · 19 unmodified lines
24922871 static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
24932872 {
24942873 unsigned long flags;
2495− struct gpio_chip *chip = NULL;
2874+ struct gpio_device *gdev = NULL;
24962875 loff_t index = *pos;
24972876
24982877 s->private = "";
24992878
25002879 spin_lock_irqsave(&gpio_lock, flags);
2501− list_for_each_entry(chip, &gpio_chips, list)
2880+ list_for_each_entry(gdev, &gpio_devices, list)
25022881 if (index-- == 0) {
25032882 spin_unlock_irqrestore(&gpio_lock, flags);
2504− return chip;
2883+ return gdev;
25052884 }
25062885 spin_unlock_irqrestore(&gpio_lock, flags);
25072886
@@ -2511,14 +2890,14 @@ static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) · 3 unmodified lines
25112890 static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
25122891 {
25132892 unsigned long flags;
2514− struct gpio_chip *chip = v;
2893+ struct gpio_device *gdev = v;
25152894 void *ret = NULL;
25162895
25172896 spin_lock_irqsave(&gpio_lock, flags);
2518− if (list_is_last(&chip->list, &gpio_chips))
2897+ if (list_is_last(&gdev->list, &gpio_devices))
25192898 ret = NULL;
25202899 else
2521− ret = list_entry(chip->list.next, struct gpio_chip, list);
2900+ ret = list_entry(gdev->list.next, struct gpio_device, list);
25222901 spin_unlock_irqrestore(&gpio_lock, flags);
25232902
25242903 s->private = "\n";
@@ -2533,15 +2912,24 @@ static void gpiolib_seq_stop(struct seq_file *s, void *v) · 8 unmodified lines
25332912
25342913 static int gpiolib_seq_show(struct seq_file *s, void *v)
25352914 {
2536− struct gpio_chip *chip = v;
2537− struct device *dev;
2915+ struct gpio_device *gdev = v;
2916+ struct gpio_chip *chip = gdev->chip;
2917+ struct device *parent;
2918+
2919+ if (!chip) {
2920+ seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
2921+ dev_name(&gdev->dev));
2922+ return 0;
2923+ }
25382924
2539− seq_printf(s, "%sGPIOs %d-%d", (char *)s->private,
2540− chip->base, chip->base + chip->ngpio - 1);
2541− dev = chip->parent;
2542− if (dev)
2543− seq_printf(s, ", %s/%s", dev->bus ? dev->bus->name : "no-bus",
2544− dev_name(dev));
2925+ seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
2926+ dev_name(&gdev->dev),
2927+ gdev->base, gdev->base + gdev->ngpio - 1);
2928+ parent = chip->parent;
2929+ if (parent)
2930+ seq_printf(s, ", parent: %s/%s",
2931+ parent->bus ? parent->bus->name : "no-bus",
2932+ dev_name(parent));
25452933 if (chip->label)
25462934 seq_printf(s, ", %s", chip->label);
25472935 if (chip->can_sleep)
@@ -2551,7 +2939,7 @@ static int gpiolib_seq_show(struct seq_file *s, void *v) · 3 unmodified lines
25512939 if (chip->dbg_show)
25522940 chip->dbg_show(s, chip);
25532941 else
2554− gpiolib_dbg_show(s, chip);
2942+ gpiolib_dbg_show(s, gdev);
25552943
25562944 return 0;
25572945 }
drivers/gpio/gpiolib.h+66−13
@@ -12,13 +12,66 @@ · 11 unmodified lines
1212 #ifndef GPIOLIB_H
1313 #define GPIOLIB_H
1414
15+#include <linux/gpio/driver.h>
1516 #include <linux/err.h>
1617 #include <linux/device.h>
18+#include <linux/module.h>
19+#include <linux/cdev.h>
1720
1821 enum of_gpio_flags;
1922 enum gpiod_flags;
2023 struct acpi_device;
2124
25+/**
26+ * struct gpio_device - internal state container for GPIO devices
27+ * @id: numerical ID number for the GPIO chip
28+ * @dev: the GPIO device struct
29+ * @chrdev: character device for the GPIO device
30+ * @mockdev: class device used by the deprecated sysfs interface (may be
31+ * NULL)
32+ * @owner: helps prevent removal of modules exporting active GPIOs
33+ * @chip: pointer to the corresponding gpiochip, holding static
34+ * data for this device
35+ * @descs: array of ngpio descriptors.
36+ * @ngpio: the number of GPIO lines on this GPIO device, equal to the size
37+ * of the @descs array.
38+ * @base: GPIO base in the DEPRECATED global Linux GPIO numberspace, assigned
39+ * at device creation time.
40+ * @label: a descriptive name for the GPIO device, such as the part number
41+ * or name of the IP component in a System on Chip.
42+ * @data: per-instance data assigned by the driver
43+ * @list: links gpio_device:s together for traversal
44+ *
45+ * This state container holds most of the runtime variable data
46+ * for a GPIO device and can hold references and live on after the
47+ * GPIO chip has been removed, if it is still being used from
48+ * userspace.
49+ */
50+struct gpio_device {
51+ int id;
52+ struct device dev;
53+ struct cdev chrdev;
54+ struct device *mockdev;
55+ struct module *owner;
56+ struct gpio_chip *chip;
57+ struct gpio_desc *descs;
58+ int base;
59+ u16 ngpio;
60+ char *label;
61+ void *data;
62+ struct list_head list;
63+
64+#ifdef CONFIG_PINCTRL
65+ /*
66+ * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
67+ * describe the actual pin range which they serve in an SoC. This
68+ * information would be used by pinctrl subsystem to configure
69+ * corresponding pins for gpio usage.
70+ */
71+ struct list_head pin_ranges;
72+#endif
73+};
74+
2275 /**
2376 * struct acpi_gpio_info - ACPI GPIO specific information
2477 * @gpioint: if %true this GPIO is of type GpioInt otherwise type is GpioIo
@@ -90,10 +143,10 @@ struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, · 65 unmodified lines
90143 struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, u16 hwnum);
91144
92145 extern struct spinlock gpio_lock;
93−extern struct list_head gpio_chips;
146+extern struct list_head gpio_devices;
94147
95148 struct gpio_desc {
96− struct gpio_chip *chip;
149+ struct gpio_device *gdev;
97150 unsigned long flags;
98151 /* flag symbols are bit numbers */
99152 #define FLAG_REQUESTED 0
@@ -122,7 +175,7 @@ int gpiod_hog(struct gpio_desc *desc, const char *name, · 22 unmodified lines
122175 */
123176 static int __maybe_unused gpio_chip_hwgpio(const struct gpio_desc *desc)
124177 {
125− return desc - &desc->chip->desc[0];
178+ return desc - &desc->gdev->descs[0];
126179 }
127180
128181 /* With descriptor prefix */
@@ -149,31 +202,31 @@ static int __maybe_unused gpio_chip_hwgpio(const struct gpio_desc *desc) · 20 unmodified lines
149202 /* With chip prefix */
150203
151204 #define chip_emerg(chip, fmt, ...) \
152− pr_emerg("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
205+ dev_emerg(&chip->gpiodev->dev, "(%s): " fmt, chip->label, ##__VA_ARGS__)
153206 #define chip_crit(chip, fmt, ...) \
154− pr_crit("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
207+ dev_crit(&chip->gpiodev->dev, "(%s): " fmt, chip->label, ##__VA_ARGS__)
155208 #define chip_err(chip, fmt, ...) \
156− pr_err("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
209+ dev_err(&chip->gpiodev->dev, "(%s): " fmt, chip->label, ##__VA_ARGS__)
157210 #define chip_warn(chip, fmt, ...) \
158− pr_warn("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
211+ dev_warn(&chip->gpiodev->dev, "(%s): " fmt, chip->label, ##__VA_ARGS__)
159212 #define chip_info(chip, fmt, ...) \
160− pr_info("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
213+ dev_info(&chip->gpiodev->dev, "(%s): " fmt, chip->label, ##__VA_ARGS__)
161214 #define chip_dbg(chip, fmt, ...) \
162− pr_debug("GPIO chip %s: " fmt, chip->label, ##__VA_ARGS__)
215+ dev_dbg(&chip->gpiodev->dev, "(%s): " fmt, chip->label, ##__VA_ARGS__)
163216
164217 #ifdef CONFIG_GPIO_SYSFS
165218
166−int gpiochip_sysfs_register(struct gpio_chip *chip);
167−void gpiochip_sysfs_unregister(struct gpio_chip *chip);
219+int gpiochip_sysfs_register(struct gpio_device *gdev);
220+void gpiochip_sysfs_unregister(struct gpio_device *gdev);
168221
169222 #else
170223
171−static inline int gpiochip_sysfs_register(struct gpio_chip *chip)
224+static inline int gpiochip_sysfs_register(struct gpio_device *gdev)
172225 {
173226 return 0;
174227 }
175228
176−static inline void gpiochip_sysfs_unregister(struct gpio_chip *chip)
229+static inline void gpiochip_sysfs_unregister(struct gpio_device *gdev)
177230 {
178231 }
179232
drivers/mfd/Kconfig+9−11
@@ -1181,27 +1181,25 @@ config MFD_TPS65910 · 1180 unmodified lines
11811181 Power Management chips.
11821182
11831183 config MFD_TPS65912
1184− bool "TI TPS65912 Power Management chip"
1185− depends on GPIOLIB
1184+ tristate
11861185 select MFD_CORE
1187− help
1188− If you say yes here you get support for the TPS65912 series of
1189− PM chips.
1186+ select REGMAP
1187+ select REGMAP_IRQ
11901188
11911189 config MFD_TPS65912_I2C
1192− bool "TI TPS65912 Power Management chip with I2C"
1193− select MFD_CORE
1190+ tristate "TI TPS65912 Power Management chip with I2C"
11941191 select MFD_TPS65912
1195− depends on I2C=y && GPIOLIB
1192+ select REGMAP_I2C
1193+ depends on I2C
11961194 help
11971195 If you say yes here you get support for the TPS65912 series of
11981196 PM chips with I2C interface.
11991197
12001198 config MFD_TPS65912_SPI
1201− bool "TI TPS65912 Power Management chip with SPI"
1202− select MFD_CORE
1199+ tristate "TI TPS65912 Power Management chip with SPI"
12031200 select MFD_TPS65912
1204− depends on SPI_MASTER && GPIOLIB
1201+ select REGMAP_SPI
1202+ depends on SPI_MASTER
12051203 help
12061204 If you say yes here you get support for the TPS65912 series of
12071205 PM chips with SPI interface.
drivers/mfd/Makefile+1−2
@@ -73,8 +73,7 @@ obj-$(CONFIG_TPS6507X) += tps6507x.o · 72 unmodified lines
7373 obj-$(CONFIG_MFD_TPS65217) += tps65217.o
7474 obj-$(CONFIG_MFD_TPS65218) += tps65218.o
7575 obj-$(CONFIG_MFD_TPS65910) += tps65910.o
76−tps65912-objs := tps65912-core.o tps65912-irq.o
77−obj-$(CONFIG_MFD_TPS65912) += tps65912.o
76+obj-$(CONFIG_MFD_TPS65912) += tps65912-core.o
7877 obj-$(CONFIG_MFD_TPS65912_I2C) += tps65912-i2c.o
7978 obj-$(CONFIG_MFD_TPS65912_SPI) += tps65912-spi.o
8079 obj-$(CONFIG_MFD_TPS80031) += tps80031.o
drivers/mfd/menelaus.c+1−1
@@ -42,10 +42,10 @@ · 41 unmodified lines
4242 #include <linux/bcd.h>
4343 #include <linux/slab.h>
4444 #include <linux/mfd/menelaus.h>
45+#include <linux/gpio.h>
4546
4647 #include <asm/mach/irq.h>
4748
48−#include <asm/gpio.h>
4949
5050 #define DRIVER_NAME "menelaus"
5151
drivers/mfd/tps65912-core.c+88−152
@@ -1,175 +1,111 @@
11 /*
2− * tps65912-core.c -- TI TPS65912x
2+ * Core functions for TI TPS65912x PMICs
33 *
4− * Copyright 2011 Texas Instruments Inc.
4+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
5+ * Andrew F. Davis <afd@ti.com>
56 *
6− * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>
7+ * This program is free software; you can redistribute it and/or
8+ * modify it under the terms of the GNU General Public License version 2 as
9+ * published by the Free Software Foundation.
710 *
8− * This program is free software; you can redistribute it and/or modify it
9− * under the terms of the GNU General Public License as published by the
10− * Free Software Foundation; either version 2 of the License, or (at your
11− * option) any later version.
11+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12+ * kind, whether expressed or implied; without even the implied warranty
13+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14+ * GNU General Public License version 2 for more details.
1215 *
13− * This driver is based on wm8350 implementation.
16+ * Based on the TPS65218 driver and the previous TPS65912 driver by
17+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>
1418 */
1519
16−#include <linux/module.h>
17−#include <linux/moduleparam.h>
18−#include <linux/slab.h>
19−#include <linux/gpio.h>
20+#include <linux/interrupt.h>
2021 #include <linux/mfd/core.h>
22+#include <linux/module.h>
23+
2124 #include <linux/mfd/tps65912.h>
2225
23−static const struct mfd_cell tps65912s[] = {
24− {
25− .name = "tps65912-pmic",
26− },
26+static const struct mfd_cell tps65912_cells[] = {
27+ { .name = "tps65912-regulator", },
28+ { .name = "tps65912-gpio", },
2729 };
2830
29−int tps65912_set_bits(struct tps65912 *tps65912, u8 reg, u8 mask)
30−{
31− u8 data;
32− int err;
33−
34− mutex_lock(&tps65912->io_mutex);
35−
36− err = tps65912->read(tps65912, reg, 1, &data);
37− if (err) {
38− dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);
39− goto out;
40− }
41−
42− data |= mask;
43− err = tps65912->write(tps65912, reg, 1, &data);
44− if (err)
45− dev_err(tps65912->dev, "Write to reg 0x%x failed\n", reg);
31+static const struct regmap_irq tps65912_irqs[] = {
32+ /* INT_STS IRQs */
33+ REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_F, 0, TPS65912_INT_STS_PWRHOLD_F),
34+ REGMAP_IRQ_REG(TPS65912_IRQ_VMON, 0, TPS65912_INT_STS_VMON),
35+ REGMAP_IRQ_REG(TPS65912_IRQ_PWRON, 0, TPS65912_INT_STS_PWRON),
36+ REGMAP_IRQ_REG(TPS65912_IRQ_PWRON_LP, 0, TPS65912_INT_STS_PWRON_LP),
37+ REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_R, 0, TPS65912_INT_STS_PWRHOLD_R),
38+ REGMAP_IRQ_REG(TPS65912_IRQ_HOTDIE, 0, TPS65912_INT_STS_HOTDIE),
39+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_R, 0, TPS65912_INT_STS_GPIO1_R),
40+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_F, 0, TPS65912_INT_STS_GPIO1_F),
41+ /* INT_STS2 IRQs */
42+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_R, 1, TPS65912_INT_STS2_GPIO2_R),
43+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_F, 1, TPS65912_INT_STS2_GPIO2_F),
44+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_R, 1, TPS65912_INT_STS2_GPIO3_R),
45+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_F, 1, TPS65912_INT_STS2_GPIO3_F),
46+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_R, 1, TPS65912_INT_STS2_GPIO4_R),
47+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_F, 1, TPS65912_INT_STS2_GPIO4_F),
48+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_R, 1, TPS65912_INT_STS2_GPIO5_R),
49+ REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_F, 1, TPS65912_INT_STS2_GPIO5_F),
50+ /* INT_STS3 IRQs */
51+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC1, 2, TPS65912_INT_STS3_PGOOD_DCDC1),
52+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC2, 2, TPS65912_INT_STS3_PGOOD_DCDC2),
53+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC3, 2, TPS65912_INT_STS3_PGOOD_DCDC3),
54+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC4, 2, TPS65912_INT_STS3_PGOOD_DCDC4),
55+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO1, 2, TPS65912_INT_STS3_PGOOD_LDO1),
56+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO2, 2, TPS65912_INT_STS3_PGOOD_LDO2),
57+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO3, 2, TPS65912_INT_STS3_PGOOD_LDO3),
58+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO4, 2, TPS65912_INT_STS3_PGOOD_LDO4),
59+ /* INT_STS4 IRQs */
60+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO5, 3, TPS65912_INT_STS4_PGOOD_LDO5),
61+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO6, 3, TPS65912_INT_STS4_PGOOD_LDO6),
62+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO7, 3, TPS65912_INT_STS4_PGOOD_LDO7),
63+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO8, 3, TPS65912_INT_STS4_PGOOD_LDO8),
64+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO9, 3, TPS65912_INT_STS4_PGOOD_LDO9),
65+ REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO10, 3, TPS65912_INT_STS4_PGOOD_LDO10),
66+};
4667
47−out:
48− mutex_unlock(&tps65912->io_mutex);
49− return err;
50−}
51−EXPORT_SYMBOL_GPL(tps65912_set_bits);
68+static struct regmap_irq_chip tps65912_irq_chip = {
69+ .name = "tps65912",
70+ .irqs = tps65912_irqs,
71+ .num_irqs = ARRAY_SIZE(tps65912_irqs),
72+ .num_regs = 4,
73+ .irq_reg_stride = 2,
74+ .mask_base = TPS65912_INT_MSK,
75+ .status_base = TPS65912_INT_STS,
76+ .ack_base = TPS65912_INT_STS,
77+ .init_ack_masked = true,
78+};
5279
53−int tps65912_clear_bits(struct tps65912 *tps65912, u8 reg, u8 mask)
80+int tps65912_device_init(struct tps65912 *tps)
5481 {
55− u8 data;
56− int err;
57−
58− mutex_lock(&tps65912->io_mutex);
59− err = tps65912->read(tps65912, reg, 1, &data);
60− if (err) {
61− dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);
62− goto out;
82+ int ret;
83+
84+ ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0,
85+ &tps65912_irq_chip, &tps->irq_data);
86+ if (ret)
87+ return ret;
88+
89+ ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65912_cells,
90+ ARRAY_SIZE(tps65912_cells), NULL, 0,
91+ regmap_irq_get_domain(tps->irq_data));
92+ if (ret) {
93+ regmap_del_irq_chip(tps->irq, tps->irq_data);
94+ return ret;
6395 }
6496
65− data &= ~mask;
66− err = tps65912->write(tps65912, reg, 1, &data);
67− if (err)
68− dev_err(tps65912->dev, "Write to reg 0x%x failed\n", reg);
69−
70−out:
71− mutex_unlock(&tps65912->io_mutex);
72− return err;
97+ return 0;
7398 }
74−EXPORT_SYMBOL_GPL(tps65912_clear_bits);
99+EXPORT_SYMBOL_GPL(tps65912_device_init);
75100
76−static inline int tps65912_read(struct tps65912 *tps65912, u8 reg)
101+int tps65912_device_exit(struct tps65912 *tps)
77102 {
78− u8 val;
79− int err;
80−
81− err = tps65912->read(tps65912, reg, 1, &val);
82− if (err < 0)
83− return err;
84−
85− return val;
86−}
87−
88−static inline int tps65912_write(struct tps65912 *tps65912, u8 reg, u8 val)
89−{
90− return tps65912->write(tps65912, reg, 1, &val);
91−}
92−
93−int tps65912_reg_read(struct tps65912 *tps65912, u8 reg)
94−{
95− int data;
96−
97− mutex_lock(&tps65912->io_mutex);
103+ regmap_del_irq_chip(tps->irq, tps->irq_data);
98104
99− data = tps65912_read(tps65912, reg);
100− if (data < 0)
101− dev_err(tps65912->dev, "Read from reg 0x%x failed\n", reg);
102−
103− mutex_unlock(&tps65912->io_mutex);
104− return data;
105−}
106−EXPORT_SYMBOL_GPL(tps65912_reg_read);
107−
108−int tps65912_reg_write(struct tps65912 *tps65912, u8 reg, u8 val)
109−{
110− int err;
111−
112− mutex_lock(&tps65912->io_mutex);
113−
114− err = tps65912_write(tps65912, reg, val);
115− if (err < 0)
116− dev_err(tps65912->dev, "Write for reg 0x%x failed\n", reg);
117−
118− mutex_unlock(&tps65912->io_mutex);
119− return err;
120−}
121−EXPORT_SYMBOL_GPL(tps65912_reg_write);
122−
123−int tps65912_device_init(struct tps65912 *tps65912)
124−{
125− struct tps65912_board *pmic_plat_data = dev_get_platdata(tps65912->dev);
126− struct tps65912_platform_data *init_data;
127− int ret, dcdc_avs, value;
128−
129− init_data = kzalloc(sizeof(struct tps65912_platform_data), GFP_KERNEL);
130− if (init_data == NULL)
131− return -ENOMEM;
132−
133− mutex_init(&tps65912->io_mutex);
134− dev_set_drvdata(tps65912->dev, tps65912);
135−
136− dcdc_avs = (pmic_plat_data->is_dcdc1_avs << 0 |
137− pmic_plat_data->is_dcdc2_avs << 1 |
138− pmic_plat_data->is_dcdc3_avs << 2 |
139− pmic_plat_data->is_dcdc4_avs << 3);
140− if (dcdc_avs) {
141− tps65912->read(tps65912, TPS65912_I2C_SPI_CFG, 1, &value);
142− dcdc_avs |= value;
143− tps65912->write(tps65912, TPS65912_I2C_SPI_CFG, 1, &dcdc_avs);
144− }
145−
146− ret = mfd_add_devices(tps65912->dev, -1,
147− tps65912s, ARRAY_SIZE(tps65912s),
148− NULL, 0, NULL);
149− if (ret < 0)
150− goto err;
151−
152− init_data->irq = pmic_plat_data->irq;
153− init_data->irq_base = pmic_plat_data->irq_base;
154− ret = tps65912_irq_init(tps65912, init_data->irq, init_data);
155− if (ret < 0)
156− goto err;
157−
158− kfree(init_data);
159− return ret;
160−
161−err:
162− kfree(init_data);
163− mfd_remove_devices(tps65912->dev);
164− return ret;
165−}
166−
167−void tps65912_device_exit(struct tps65912 *tps65912)
168−{
169− mfd_remove_devices(tps65912->dev);
170− tps65912_irq_exit(tps65912);
105+ return 0;
171106 }
107+EXPORT_SYMBOL_GPL(tps65912_device_exit);
172108
173−MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");
174−MODULE_DESCRIPTION("TPS65912x chip family multi-function driver");
175−MODULE_LICENSE("GPL");
109+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
110+MODULE_DESCRIPTION("TPS65912x MFD Driver");
111+MODULE_LICENSE("GPL v2");
drivers/mfd/tps65912-i2c.c+51−111
@@ -1,139 +1,79 @@
11 /*
2− * tps65912-i2c.c -- I2C access for TI TPS65912x PMIC
2+ * I2C access driver for TI TPS65912x PMICs
33 *
4− * Copyright 2011 Texas Instruments Inc.
4+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
5+ * Andrew F. Davis <afd@ti.com>
56 *
6− * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>
7+ * This program is free software; you can redistribute it and/or
8+ * modify it under the terms of the GNU General Public License version 2 as
9+ * published by the Free Software Foundation.
710 *
8− * This program is free software; you can redistribute it and/or modify it
9− * under the terms of the GNU General Public License as published by the
10− * Free Software Foundation; either version 2 of the License, or (at your
11− * option) any later version.
11+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12+ * kind, whether expressed or implied; without even the implied warranty
13+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14+ * GNU General Public License version 2 for more details.
1215 *
13− * This driver is based on wm8350 implementation.
16+ * Based on the TPS65218 driver and the previous TPS65912 driver by
17+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>
1418 */
1519
16−#include <linux/module.h>
17−#include <linux/moduleparam.h>
18−#include <linux/init.h>
19−#include <linux/slab.h>
20−#include <linux/gpio.h>
2120 #include <linux/i2c.h>
22−#include <linux/mfd/core.h>
23−#include <linux/mfd/tps65912.h>
24−
25−static int tps65912_i2c_read(struct tps65912 *tps65912, u8 reg,
26− int bytes, void *dest)
27−{
28− struct i2c_client *i2c = tps65912->control_data;
29− struct i2c_msg xfer[2];
30− int ret;
31−
32− /* Write register */
33− xfer[0].addr = i2c->addr;
34− xfer[0].flags = 0;
35− xfer[0].len = 1;
36− xfer[0].buf = &reg;
37−
38− /* Read data */
39− xfer[1].addr = i2c->addr;
40− xfer[1].flags = I2C_M_RD;
41− xfer[1].len = bytes;
42− xfer[1].buf = dest;
43−
44− ret = i2c_transfer(i2c->adapter, xfer, 2);
45− if (ret == 2)
46− ret = 0;
47− else if (ret >= 0)
48− ret = -EIO;
49− return ret;
50−}
51−
52−static int tps65912_i2c_write(struct tps65912 *tps65912, u8 reg,
53− int bytes, void *src)
54−{
55− struct i2c_client *i2c = tps65912->control_data;
56− /* we add 1 byte for device register */
57− u8 msg[TPS6591X_MAX_REGISTER + 1];
58− int ret;
59−
60− if (bytes > TPS6591X_MAX_REGISTER)
61− return -EINVAL;
62−
63− msg[0] = reg;
64− memcpy(&msg[1], src, bytes);
21+#include <linux/module.h>
22+#include <linux/regmap.h>
6523
66− ret = i2c_master_send(i2c, msg, bytes + 1);
67− if (ret < 0)
68− return ret;
69− if (ret != bytes + 1)
70− return -EIO;
24+#include <linux/mfd/tps65912.h>
7125
72− return 0;
73−}
26+static const struct of_device_id tps65912_i2c_of_match_table[] = {
27+ { .compatible = "ti,tps65912", },
28+ { /* sentinel */ }
29+};
7430
75−static int tps65912_i2c_probe(struct i2c_client *i2c,
76− const struct i2c_device_id *id)
31+static int tps65912_i2c_probe(struct i2c_client *client,
32+ const struct i2c_device_id *ids)
7733 {
78− struct tps65912 *tps65912;
34+ struct tps65912 *tps;
7935
80− tps65912 = devm_kzalloc(&i2c->dev,
81− sizeof(struct tps65912), GFP_KERNEL);
82− if (tps65912 == NULL)
36+ tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
37+ if (!tps)
8338 return -ENOMEM;
8439
85− i2c_set_clientdata(i2c, tps65912);
86− tps65912->dev = &i2c->dev;
87− tps65912->control_data = i2c;
88− tps65912->read = tps65912_i2c_read;
89− tps65912->write = tps65912_i2c_write;
40+ i2c_set_clientdata(client, tps);
41+ tps->dev = &client->dev;
42+ tps->irq = client->irq;
43+
44+ tps->regmap = devm_regmap_init_i2c(client, &tps65912_regmap_config);
45+ if (IS_ERR(tps->regmap)) {
46+ dev_err(tps->dev, "Failed to initialize register map\n");
47+ return PTR_ERR(tps->regmap);
48+ }
9049
91− return tps65912_device_init(tps65912);
50+ return tps65912_device_init(tps);
9251 }
9352
94−static int tps65912_i2c_remove(struct i2c_client *i2c)
53+static int tps65912_i2c_remove(struct i2c_client *client)
9554 {
96− struct tps65912 *tps65912 = i2c_get_clientdata(i2c);
55+ struct tps65912 *tps = i2c_get_clientdata(client);
9756
98− tps65912_device_exit(tps65912);
99−
100− return 0;
57+ return tps65912_device_exit(tps);
10158 }
10259
103−static const struct i2c_device_id tps65912_i2c_id[] = {
104− {"tps65912", 0 },
105− { }
60+static const struct i2c_device_id tps65912_i2c_id_table[] = {
61+ { "tps65912", 0 },
62+ { /* sentinel */ }
10663 };
107−MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id);
64+MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id_table);
10865
10966 static struct i2c_driver tps65912_i2c_driver = {
110− .driver = {
111− .name = "tps65912",
67+ .driver = {
68+ .name = "tps65912",
69+ .of_match_table = tps65912_i2c_of_match_table,
11270 },
113− .probe = tps65912_i2c_probe,
114− .remove = tps65912_i2c_remove,
115− .id_table = tps65912_i2c_id,
71+ .probe = tps65912_i2c_probe,
72+ .remove = tps65912_i2c_remove,
73+ .id_table = tps65912_i2c_id_table,
11674 };
75+module_i2c_driver(tps65912_i2c_driver);
11776
118−static int __init tps65912_i2c_init(void)
119−{
120− int ret;
121−
122− ret = i2c_add_driver(&tps65912_i2c_driver);
123− if (ret != 0)
124− pr_err("Failed to register TPS65912 I2C driver: %d\n", ret);
125−
126− return ret;
127−}
128−/* init early so consumer devices can complete system boot */
129−subsys_initcall(tps65912_i2c_init);
130−
131−static void __exit tps65912_i2c_exit(void)
132−{
133− i2c_del_driver(&tps65912_i2c_driver);
134−}
135−module_exit(tps65912_i2c_exit);
136−
137−MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");
138−MODULE_DESCRIPTION("TPS6591x chip family multi-function driver");
139−MODULE_LICENSE("GPL");
77+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
78+MODULE_DESCRIPTION("TPS65912x I2C Interface Driver");
79+MODULE_LICENSE("GPL v2");
drivers/mfd/tps65912-irq.c+0−217
@@ -1,217 +0,0 @@
1−/*
2− * tps65912-irq.c -- TI TPS6591x
3− *
4− * Copyright 2011 Texas Instruments Inc.
5− *
6− * Author: Margarita Olaya <magi@slimlogic.co.uk>
7− *
8− * This program is free software; you can redistribute it and/or modify it
9− * under the terms of the GNU General Public License as published by the
10− * Free Software Foundation; either version 2 of the License, or (at your
11− * option) any later version.
12− *
13− * This driver is based on wm8350 implementation.
14− */
15−
16−#include <linux/kernel.h>
17−#include <linux/module.h>
18−#include <linux/bug.h>
19−#include <linux/device.h>
20−#include <linux/interrupt.h>
21−#include <linux/irq.h>
22−#include <linux/gpio.h>
23−#include <linux/mfd/tps65912.h>
24−
25−static inline int irq_to_tps65912_irq(struct tps65912 *tps65912,
26− int irq)
27−{
28− return irq - tps65912->irq_base;
29−}
30−
31−/*
32− * This is a threaded IRQ handler so can access I2C/SPI. Since the
33− * IRQ handler explicitly clears the IRQ it handles the IRQ line
34− * will be reasserted and the physical IRQ will be handled again if
35− * another interrupt is asserted while we run - in the normal course
36− * of events this is a rare occurrence so we save I2C/SPI reads. We're
37− * also assuming that it's rare to get lots of interrupts firing
38− * simultaneously so try to minimise I/O.
39− */
40−static irqreturn_t tps65912_irq(int irq, void *irq_data)
41−{
42− struct tps65912 *tps65912 = irq_data;
43− u32 irq_sts;
44− u32 irq_mask;
45− u8 reg;
46− int i;
47−
48−
49− tps65912->read(tps65912, TPS65912_INT_STS, 1, &reg);
50− irq_sts = reg;
51− tps65912->read(tps65912, TPS65912_INT_STS2, 1, &reg);
52− irq_sts |= reg << 8;
53− tps65912->read(tps65912, TPS65912_INT_STS3, 1, &reg);
54− irq_sts |= reg << 16;
55− tps65912->read(tps65912, TPS65912_INT_STS4, 1, &reg);
56− irq_sts |= reg << 24;
57−
58− tps65912->read(tps65912, TPS65912_INT_MSK, 1, &reg);
59− irq_mask = reg;
60− tps65912->read(tps65912, TPS65912_INT_MSK2, 1, &reg);
61− irq_mask |= reg << 8;
62− tps65912->read(tps65912, TPS65912_INT_MSK3, 1, &reg);
63− irq_mask |= reg << 16;
64− tps65912->read(tps65912, TPS65912_INT_MSK4, 1, &reg);
65− irq_mask |= reg << 24;
66−
67− irq_sts &= ~irq_mask;
68− if (!irq_sts)
69− return IRQ_NONE;
70−
71− for (i = 0; i < tps65912->irq_num; i++) {
72− if (!(irq_sts & (1 << i)))
73− continue;
74−
75− handle_nested_irq(tps65912->irq_base + i);
76− }
77−
78− /* Write the STS register back to clear IRQs we handled */
79− reg = irq_sts & 0xFF;
80− irq_sts >>= 8;
81− if (reg)
82− tps65912->write(tps65912, TPS65912_INT_STS, 1, &reg);
83− reg = irq_sts & 0xFF;
84− irq_sts >>= 8;
85− if (reg)
86− tps65912->write(tps65912, TPS65912_INT_STS2, 1, &reg);
87− reg = irq_sts & 0xFF;
88− irq_sts >>= 8;
89− if (reg)
90− tps65912->write(tps65912, TPS65912_INT_STS3, 1, &reg);
91− reg = irq_sts & 0xFF;
92− if (reg)
93− tps65912->write(tps65912, TPS65912_INT_STS4, 1, &reg);
94−
95− return IRQ_HANDLED;
96−}
97−
98−static void tps65912_irq_lock(struct irq_data *data)
99−{
100− struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
101−
102− mutex_lock(&tps65912->irq_lock);
103−}
104−
105−static void tps65912_irq_sync_unlock(struct irq_data *data)
106−{
107− struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
108− u32 reg_mask;
109− u8 reg;
110−
111− tps65912->read(tps65912, TPS65912_INT_MSK, 1, &reg);
112− reg_mask = reg;
113− tps65912->read(tps65912, TPS65912_INT_MSK2, 1, &reg);
114− reg_mask |= reg << 8;
115− tps65912->read(tps65912, TPS65912_INT_MSK3, 1, &reg);
116− reg_mask |= reg << 16;
117− tps65912->read(tps65912, TPS65912_INT_MSK4, 1, &reg);
118− reg_mask |= reg << 24;
119−
120− if (tps65912->irq_mask != reg_mask) {
121− reg = tps65912->irq_mask & 0xFF;
122− tps65912->write(tps65912, TPS65912_INT_MSK, 1, &reg);
123− reg = tps65912->irq_mask >> 8 & 0xFF;
124− tps65912->write(tps65912, TPS65912_INT_MSK2, 1, &reg);
125− reg = tps65912->irq_mask >> 16 & 0xFF;
126− tps65912->write(tps65912, TPS65912_INT_MSK3, 1, &reg);
127− reg = tps65912->irq_mask >> 24 & 0xFF;
128− tps65912->write(tps65912, TPS65912_INT_MSK4, 1, &reg);
129− }
130−
131− mutex_unlock(&tps65912->irq_lock);
132−}
133−
134−static void tps65912_irq_enable(struct irq_data *data)
135−{
136− struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
137−
138− tps65912->irq_mask &= ~(1 << irq_to_tps65912_irq(tps65912, data->irq));
139−}
140−
141−static void tps65912_irq_disable(struct irq_data *data)
142−{
143− struct tps65912 *tps65912 = irq_data_get_irq_chip_data(data);
144−
145− tps65912->irq_mask |= (1 << irq_to_tps65912_irq(tps65912, data->irq));
146−}
147−
148−static struct irq_chip tps65912_irq_chip = {
149− .name = "tps65912",
150− .irq_bus_lock = tps65912_irq_lock,
151− .irq_bus_sync_unlock = tps65912_irq_sync_unlock,
152− .irq_disable = tps65912_irq_disable,
153− .irq_enable = tps65912_irq_enable,
154−};
155−
156−int tps65912_irq_init(struct tps65912 *tps65912, int irq,
157− struct tps65912_platform_data *pdata)
158−{
159− int ret, cur_irq;
160− int flags = IRQF_ONESHOT;
161− u8 reg;
162−
163− if (!irq) {
164− dev_warn(tps65912->dev, "No interrupt support, no core IRQ\n");
165− return 0;
166− }
167−
168− if (!pdata || !pdata->irq_base) {
169− dev_warn(tps65912->dev, "No interrupt support, no IRQ base\n");
170− return 0;
171− }
172−
173− /* Clear unattended interrupts */
174− tps65912->read(tps65912, TPS65912_INT_STS, 1, &reg);
175− tps65912->write(tps65912, TPS65912_INT_STS, 1, &reg);
176− tps65912->read(tps65912, TPS65912_INT_STS2, 1, &reg);
177− tps65912->write(tps65912, TPS65912_INT_STS2, 1, &reg);
178− tps65912->read(tps65912, TPS65912_INT_STS3, 1, &reg);
179− tps65912->write(tps65912, TPS65912_INT_STS3, 1, &reg);
180− tps65912->read(tps65912, TPS65912_INT_STS4, 1, &reg);
181− tps65912->write(tps65912, TPS65912_INT_STS4, 1, &reg);
182−
183− /* Mask top level interrupts */
184− tps65912->irq_mask = 0xFFFFFFFF;
185−
186− mutex_init(&tps65912->irq_lock);
187− tps65912->chip_irq = irq;
188− tps65912->irq_base = pdata->irq_base;
189−
190− tps65912->irq_num = TPS65912_NUM_IRQ;
191−
192− /* Register with genirq */
193− for (cur_irq = tps65912->irq_base;
194− cur_irq < tps65912->irq_num + tps65912->irq_base;
195− cur_irq++) {
196− irq_set_chip_data(cur_irq, tps65912);
197− irq_set_chip_and_handler(cur_irq, &tps65912_irq_chip,
198− handle_edge_irq);
199− irq_set_nested_thread(cur_irq, 1);
200− irq_clear_status_flags(cur_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
201− }
202−
203− ret = request_threaded_irq(irq, NULL, tps65912_irq, flags,
204− "tps65912", tps65912);
205−
206− irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
207− if (ret != 0)
208− dev_err(tps65912->dev, "Failed to request IRQ: %d\n", ret);
209−
210− return ret;
211−}
212−
213−int tps65912_irq_exit(struct tps65912 *tps65912)
214−{
215− free_irq(tps65912->chip_irq, tps65912);
216− return 0;
217−}
drivers/mfd/tps65912-spi.c+49−111
@@ -1,140 +1,78 @@
11 /*
2− * tps65912-spi.c -- SPI access for TI TPS65912x PMIC
2+ * SPI access driver for TI TPS65912x PMICs
33 *
4− * Copyright 2011 Texas Instruments Inc.
4+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
5+ * Andrew F. Davis <afd@ti.com>
56 *
6− * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>
7+ * This program is free software; you can redistribute it and/or
8+ * modify it under the terms of the GNU General Public License version 2 as
9+ * published by the Free Software Foundation.
710 *
8− * This program is free software; you can redistribute it and/or modify it
9− * under the terms of the GNU General Public License as published by the
10− * Free Software Foundation; either version 2 of the License, or (at your
11− * option) any later version.
11+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12+ * kind, whether expressed or implied; without even the implied warranty
13+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14+ * GNU General Public License version 2 for more details.
1215 *
13− * This driver is based on wm8350 implementation.
16+ * Based on the TPS65218 driver and the previous TPS65912 driver by
17+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>
1418 */
1519
1620 #include <linux/module.h>
17−#include <linux/moduleparam.h>
18−#include <linux/init.h>
19−#include <linux/slab.h>
20−#include <linux/gpio.h>
21+#include <linux/regmap.h>
2122 #include <linux/spi/spi.h>
22−#include <linux/mfd/core.h>
23−#include <linux/mfd/tps65912.h>
24−
25−static int tps65912_spi_write(struct tps65912 *tps65912, u8 addr,
26− int bytes, void *src)
27−{
28− struct spi_device *spi = tps65912->control_data;
29− u8 *data = (u8 *) src;
30− int ret;
31− /* bit 23 is the read/write bit */
32− unsigned long spi_data = 1 << 23 | addr << 15 | *data;
33− struct spi_transfer xfer;
34− struct spi_message msg;
35− u32 tx_buf;
36−
37− tx_buf = spi_data;
38−
39− xfer.tx_buf = &tx_buf;
40− xfer.rx_buf = NULL;
41− xfer.len = sizeof(unsigned long);
42− xfer.bits_per_word = 24;
43−
44− spi_message_init(&msg);
45− spi_message_add_tail(&xfer, &msg);
46−
47− ret = spi_sync(spi, &msg);
48− return ret;
49−}
50−
51−static int tps65912_spi_read(struct tps65912 *tps65912, u8 addr,
52− int bytes, void *dest)
53−{
54− struct spi_device *spi = tps65912->control_data;
55− /* bit 23 is the read/write bit */
56− unsigned long spi_data = 0 << 23 | addr << 15;
57− struct spi_transfer xfer;
58− struct spi_message msg;
59− int ret;
60− u8 *data = (u8 *) dest;
61− u32 tx_buf, rx_buf;
62−
63− tx_buf = spi_data;
64− rx_buf = 0;
6523
66− xfer.tx_buf = &tx_buf;
67− xfer.rx_buf = &rx_buf;
68− xfer.len = sizeof(unsigned long);
69− xfer.bits_per_word = 24;
70−
71− spi_message_init(&msg);
72− spi_message_add_tail(&xfer, &msg);
73−
74− if (spi == NULL)
75− return 0;
24+#include <linux/mfd/tps65912.h>
7625
77− ret = spi_sync(spi, &msg);
78− if (ret == 0)
79− *data = (u8) (rx_buf & 0xFF);
80− return ret;
81−}
26+static const struct of_device_id tps65912_spi_of_match_table[] = {
27+ { .compatible = "ti,tps65912", },
28+ { /* sentinel */ }
29+};
8230
8331 static int tps65912_spi_probe(struct spi_device *spi)
8432 {
85− struct tps65912 *tps65912;
33+ struct tps65912 *tps;
8634
87− tps65912 = devm_kzalloc(&spi->dev,
88− sizeof(struct tps65912), GFP_KERNEL);
89− if (tps65912 == NULL)
35+ tps = devm_kzalloc(&spi->dev, sizeof(*tps), GFP_KERNEL);
36+ if (!tps)
9037 return -ENOMEM;
9138
92− tps65912->dev = &spi->dev;
93− tps65912->control_data = spi;
94− tps65912->read = tps65912_spi_read;
95− tps65912->write = tps65912_spi_write;
39+ spi_set_drvdata(spi, tps);
40+ tps->dev = &spi->dev;
41+ tps->irq = spi->irq;
9642
97− spi_set_drvdata(spi, tps65912);
43+ tps->regmap = devm_regmap_init_spi(spi, &tps65912_regmap_config);
44+ if (IS_ERR(tps->regmap)) {
45+ dev_err(tps->dev, "Failed to initialize register map\n");
46+ return PTR_ERR(tps->regmap);
47+ }
9848
99− return tps65912_device_init(tps65912);
49+ return tps65912_device_init(tps);
10050 }
10151
102−static int tps65912_spi_remove(struct spi_device *spi)
52+static int tps65912_spi_remove(struct spi_device *client)
10353 {
104− struct tps65912 *tps65912 = spi_get_drvdata(spi);
54+ struct tps65912 *tps = spi_get_drvdata(client);
10555
106− tps65912_device_exit(tps65912);
107−
108− return 0;
56+ return tps65912_device_exit(tps);
10957 }
11058
59+static const struct spi_device_id tps65912_spi_id_table[] = {
60+ { "tps65912", 0 },
61+ { /* sentinel */ }
62+};
63+MODULE_DEVICE_TABLE(spi, tps65912_spi_id_table);
64+
11165 static struct spi_driver tps65912_spi_driver = {
112− .driver = {
113− .name = "tps65912",
66+ .driver = {
67+ .name = "tps65912",
68+ .of_match_table = tps65912_spi_of_match_table,
11469 },
115− .probe = tps65912_spi_probe,
116− .remove = tps65912_spi_remove,
70+ .probe = tps65912_spi_probe,
71+ .remove = tps65912_spi_remove,
72+ .id_table = tps65912_spi_id_table,
11773 };
74+module_spi_driver(tps65912_spi_driver);
11875
119−static int __init tps65912_spi_init(void)
120−{
121− int ret;
122−
123− ret = spi_register_driver(&tps65912_spi_driver);
124− if (ret != 0)
125− pr_err("Failed to register TPS65912 SPI driver: %d\n", ret);
126−
127− return 0;
128−}
129−/* init early so consumer devices can complete system boot */
130−subsys_initcall(tps65912_spi_init);
131−
132−static void __exit tps65912_spi_exit(void)
133−{
134− spi_unregister_driver(&tps65912_spi_driver);
135−}
136−module_exit(tps65912_spi_exit);
137−
138−MODULE_AUTHOR("Margarita Olaya <magi@slimlogic.co.uk>");
139−MODULE_DESCRIPTION("SPI support for TPS65912 chip family mfd");
140−MODULE_LICENSE("GPL");
76+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
77+MODULE_DESCRIPTION("TPS65912x SPI Interface Driver");
78+MODULE_LICENSE("GPL v2");
drivers/mtd/onenand/omap2.c+1−1
@@ -35,10 +35,10 @@ · 34 unmodified lines
3535 #include <linux/io.h>
3636 #include <linux/slab.h>
3737 #include <linux/regulator/consumer.h>
38+#include <linux/gpio.h>
3839
3940 #include <asm/mach/flash.h>
4041 #include <linux/platform_data/mtd-onenand-omap2.h>
41−#include <asm/gpio.h>
4242
4343 #include <linux/omap-dma.h>
4444
drivers/pcmcia/bfin_cf_pcmcia.c+1−1
@@ -36,10 +36,10 @@ · 35 unmodified lines
3636 #include <linux/interrupt.h>
3737 #include <linux/irq.h>
3838 #include <linux/io.h>
39+#include <linux/gpio.h>
3940
4041 #include <pcmcia/ss.h>
4142 #include <pcmcia/cisreg.h>
42−#include <asm/gpio.h>
4343
4444 #define SZ_1K 0x00000400
4545 #define SZ_8K 0x00002000
drivers/pcmcia/pxa2xx_vpac270.c+0−1
@@ -17,7 +17,6 @@ · 16 unmodified lines
1717
1818 #include <asm/mach-types.h>
1919
20−#include <asm/gpio.h>
2120 #include <mach/vpac270.h>
2221
2322 #include "soc_common.h"
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c+14−19
@@ -26,7 +26,7 @@ · 25 unmodified lines
2626 #include <linux/slab.h>
2727 #include <linux/interrupt.h>
2828 #include <linux/io.h>
29−#include <linux/gpio.h>
29+#include <linux/gpio/driver.h>
3030 #include <linux/ioport.h>
3131 #include <linux/of_device.h>
3232 #include <linux/of_irq.h>
@@ -98,11 +98,6 @@ struct iproc_gpio { · 65 unmodified lines
9898 struct pinctrl_desc pctldesc;
9999 };
100100
101−static inline struct iproc_gpio *to_iproc_gpio(struct gpio_chip *gc)
102−{
103− return container_of(gc, struct iproc_gpio, gc);
104−}
105−
106101 /*
107102 * Mapping from PINCONF pins to GPIO pins is 1-to-1
108103 */
@@ -147,7 +142,7 @@ static inline bool iproc_get_bit(struct iproc_gpio *chip, unsigned int reg, · 38 unmodified lines
147142 static void iproc_gpio_irq_handler(struct irq_desc *desc)
148143 {
149144 struct gpio_chip *gc = irq_desc_get_handler_data(desc);
150− struct iproc_gpio *chip = to_iproc_gpio(gc);
145+ struct iproc_gpio *chip = gpiochip_get_data(gc);
151146 struct irq_chip *irq_chip = irq_desc_get_chip(desc);
152147 int i, bit;
153148
@@ -180,7 +175,7 @@ static void iproc_gpio_irq_handler(struct irq_desc *desc) · 26 unmodified lines
180175 static void iproc_gpio_irq_ack(struct irq_data *d)
181176 {
182177 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
183− struct iproc_gpio *chip = to_iproc_gpio(gc);
178+ struct iproc_gpio *chip = gpiochip_get_data(gc);
184179 unsigned gpio = d->hwirq;
185180 unsigned int offset = IPROC_GPIO_REG(gpio,
186181 IPROC_GPIO_INT_CLR_OFFSET);
@@ -199,7 +194,7 @@ static void iproc_gpio_irq_ack(struct irq_data *d) · 12 unmodified lines
199194 static void iproc_gpio_irq_set_mask(struct irq_data *d, bool unmask)
200195 {
201196 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
202− struct iproc_gpio *chip = to_iproc_gpio(gc);
197+ struct iproc_gpio *chip = gpiochip_get_data(gc);
203198 unsigned gpio = d->hwirq;
204199
205200 iproc_set_bit(chip, IPROC_GPIO_INT_MSK_OFFSET, gpio, unmask);
@@ -208,7 +203,7 @@ static void iproc_gpio_irq_set_mask(struct irq_data *d, bool unmask) · 2 unmodified lines
208203 static void iproc_gpio_irq_mask(struct irq_data *d)
209204 {
210205 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
211− struct iproc_gpio *chip = to_iproc_gpio(gc);
206+ struct iproc_gpio *chip = gpiochip_get_data(gc);
212207 unsigned long flags;
213208
214209 spin_lock_irqsave(&chip->lock, flags);
@@ -219,7 +214,7 @@ static void iproc_gpio_irq_mask(struct irq_data *d) · 4 unmodified lines
219214 static void iproc_gpio_irq_unmask(struct irq_data *d)
220215 {
221216 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
222− struct iproc_gpio *chip = to_iproc_gpio(gc);
217+ struct iproc_gpio *chip = gpiochip_get_data(gc);
223218 unsigned long flags;
224219
225220 spin_lock_irqsave(&chip->lock, flags);
@@ -230,7 +225,7 @@ static void iproc_gpio_irq_unmask(struct irq_data *d) · 4 unmodified lines
230225 static int iproc_gpio_irq_set_type(struct irq_data *d, unsigned int type)
231226 {
232227 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
233− struct iproc_gpio *chip = to_iproc_gpio(gc);
228+ struct iproc_gpio *chip = gpiochip_get_data(gc);
234229 unsigned gpio = d->hwirq;
235230 bool level_triggered = false;
236231 bool dual_edge = false;
@@ -292,7 +287,7 @@ static struct irq_chip iproc_gpio_irq_chip = { · 55 unmodified lines
292287 */
293288 static int iproc_gpio_request(struct gpio_chip *gc, unsigned offset)
294289 {
295− struct iproc_gpio *chip = to_iproc_gpio(gc);
290+ struct iproc_gpio *chip = gpiochip_get_data(gc);
296291 unsigned gpio = gc->base + offset;
297292
298293 /* not all Iproc GPIO pins can be muxed individually */
@@ -304,7 +299,7 @@ static int iproc_gpio_request(struct gpio_chip *gc, unsigned offset) · 5 unmodified lines
304299
305300 static void iproc_gpio_free(struct gpio_chip *gc, unsigned offset)
306301 {
307− struct iproc_gpio *chip = to_iproc_gpio(gc);
302+ struct iproc_gpio *chip = gpiochip_get_data(gc);
308303 unsigned gpio = gc->base + offset;
309304
310305 if (!chip->pinmux_is_supported)
@@ -315,7 +310,7 @@ static void iproc_gpio_free(struct gpio_chip *gc, unsigned offset) · 4 unmodified lines
315310
316311 static int iproc_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
317312 {
318− struct iproc_gpio *chip = to_iproc_gpio(gc);
313+ struct iproc_gpio *chip = gpiochip_get_data(gc);
319314 unsigned long flags;
320315
321316 spin_lock_irqsave(&chip->lock, flags);
@@ -330,7 +325,7 @@ static int iproc_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) · 8 unmodified lines
330325 static int iproc_gpio_direction_output(struct gpio_chip *gc, unsigned gpio,
331326 int val)
332327 {
333− struct iproc_gpio *chip = to_iproc_gpio(gc);
328+ struct iproc_gpio *chip = gpiochip_get_data(gc);
334329 unsigned long flags;
335330
336331 spin_lock_irqsave(&chip->lock, flags);
@@ -345,7 +340,7 @@ static int iproc_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, · 8 unmodified lines
345340
346341 static void iproc_gpio_set(struct gpio_chip *gc, unsigned gpio, int val)
347342 {
348− struct iproc_gpio *chip = to_iproc_gpio(gc);
343+ struct iproc_gpio *chip = gpiochip_get_data(gc);
349344 unsigned long flags;
350345
351346 spin_lock_irqsave(&chip->lock, flags);
@@ -357,7 +352,7 @@ static void iproc_gpio_set(struct gpio_chip *gc, unsigned gpio, int val) · 5 unmodified lines
357352
358353 static int iproc_gpio_get(struct gpio_chip *gc, unsigned gpio)
359354 {
360− struct iproc_gpio *chip = to_iproc_gpio(gc);
355+ struct iproc_gpio *chip = gpiochip_get_data(gc);
361356 unsigned int offset = IPROC_GPIO_REG(gpio,
362357 IPROC_GPIO_DATA_IN_OFFSET);
363358 unsigned int shift = IPROC_GPIO_SHIFT(gpio);
@@ -706,7 +701,7 @@ static int iproc_gpio_probe(struct platform_device *pdev) · 342 unmodified lines
706701 chip->pinmux_is_supported = of_property_read_bool(dev->of_node,
707702 "gpio-ranges");
708703
709− ret = gpiochip_add(gc);
704+ ret = gpiochip_add_data(gc, chip);
710705 if (ret < 0) {
711706 dev_err(dev, "unable to add GPIO chip\n");
712707 return ret;
drivers/pinctrl/sirf/pinctrl-atlas7.c+0−18
@@ -338,7 +338,6 @@ struct atlas7_pinctrl_data { · 337 unmodified lines
338338 #define ATLAS7_GPIO_CTL_DATAIN_MASK BIT(7)
339339
340340 struct atlas7_gpio_bank {
341− struct pinctrl_dev *pctldev;
342341 int id;
343342 int irq;
344343 void __iomem *base;
@@ -6070,7 +6069,6 @@ static int atlas7_gpio_probe(struct platform_device *pdev) · 5725 unmodified lines
60706069 }
60716070
60726071 for (idx = 0; idx < nbank; idx++) {
6073− struct gpio_pin_range *pin_range;
60746072 struct atlas7_gpio_bank *bank;
60756073
60766074 bank = &a7gc->banks[idx];
@@ -6088,22 +6086,6 @@ static int atlas7_gpio_probe(struct platform_device *pdev) · 11 unmodified lines
60886086
60896087 gpiochip_set_chained_irqchip(chip, &atlas7_gpio_irq_chip,
60906088 bank->irq, atlas7_gpio_handle_irq);
6091−
6092− /* Records gpio_pin_range to a7gc */
6093− list_for_each_entry(pin_range, &chip->pin_ranges, node) {
6094− struct pinctrl_gpio_range *range;
6095−
6096− range = &pin_range->range;
6097− if (range->id == NGPIO_OF_BANK * idx) {
6098− bank->gpio_offset = range->id;
6099− bank->ngpio = range->npins;
6100− bank->gpio_pins = range->pins;
6101− bank->pctldev = pin_range->pctldev;
6102− break;
6103− }
6104− }
6105−
6106− BUG_ON(!bank->pctldev);
61076089 }
61086090
61096091 platform_set_drvdata(pdev, a7gc);
drivers/pinctrl/sunxi/pinctrl-sunxi.c+2−2
@@ -457,8 +457,8 @@ static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset) · 456 unmodified lines
457457 struct sunxi_pinctrl *pctl = gpiochip_get_data(chip);
458458 u32 reg = sunxi_data_reg(offset);
459459 u8 index = sunxi_data_offset(offset);
460− u32 set_mux = pctl->desc->irq_read_needs_mux &&
461− test_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags);
460+ bool set_mux = pctl->desc->irq_read_needs_mux &&
461+ gpiochip_line_is_irq(chip, offset);
462462 u32 pin = offset + chip->base;
463463 u32 val;
464464
drivers/regulator/Kconfig+1−1
@@ -788,7 +788,7 @@ config REGULATOR_TPS65910 · 787 unmodified lines
788788
789789 config REGULATOR_TPS65912
790790 tristate "TI TPS65912 Power regulator"
791− depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI)
791+ depends on MFD_TPS65912
792792 help
793793 This driver supports TPS65912 voltage regulator chip.
794794
drivers/regulator/tps65912-regulator.c+120−493
@@ -1,541 +1,168 @@
11 /*
2− * tps65912.c -- TI tps65912
2+ * Regulator driver for TI TPS65912x PMICs
33 *
4− * Copyright 2011 Texas Instruments Inc.
4+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
5+ * Andrew F. Davis <afd@ti.com>
56 *
6− * Author: Margarita Olaya Cabrera <magi@slimlogic.co.uk>
7+ * This program is free software; you can redistribute it and/or
8+ * modify it under the terms of the GNU General Public License version 2 as
9+ * published by the Free Software Foundation.
710 *
8− * This program is free software; you can redistribute it and/or modify it
9− * under the terms of the GNU General Public License as published by the
10− * Free Software Foundation; either version 2 of the License, or (at your
11− * option) any later version.
11+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12+ * kind, whether expressed or implied; without even the implied warranty
13+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14+ * GNU General Public License version 2 for more details.
1215 *
13− * This driver is based on wm8350 implementation.
16+ * Based on the TPS65218 driver and the previous TPS65912 driver by
17+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>
1418 */
1519
16−#include <linux/kernel.h>
1720 #include <linux/module.h>
18−#include <linux/init.h>
19−#include <linux/err.h>
2021 #include <linux/platform_device.h>
2122 #include <linux/regulator/driver.h>
22−#include <linux/regulator/machine.h>
23−#include <linux/slab.h>
24−#include <linux/gpio.h>
25−#include <linux/mfd/tps65912.h>
26−
27−/* DCDC's */
28−#define TPS65912_REG_DCDC1 0
29−#define TPS65912_REG_DCDC2 1
30−#define TPS65912_REG_DCDC3 2
31−#define TPS65912_REG_DCDC4 3
32−
33−/* LDOs */
34−#define TPS65912_REG_LDO1 4
35−#define TPS65912_REG_LDO2 5
36−#define TPS65912_REG_LDO3 6
37−#define TPS65912_REG_LDO4 7
38−#define TPS65912_REG_LDO5 8
39−#define TPS65912_REG_LDO6 9
40−#define TPS65912_REG_LDO7 10
41−#define TPS65912_REG_LDO8 11
42−#define TPS65912_REG_LDO9 12
43−#define TPS65912_REG_LDO10 13
44−
45−/* Number of step-down converters available */
46−#define TPS65912_NUM_DCDC 4
47−
48−/* Number of LDO voltage regulators available */
49−#define TPS65912_NUM_LDO 10
5023
51−/* Number of total regulators available */
52−#define TPS65912_NUM_REGULATOR (TPS65912_NUM_DCDC + TPS65912_NUM_LDO)
53−
54−#define TPS65912_REG_ENABLED 0x80
55−#define OP_SELREG_MASK 0x40
56−#define OP_SELREG_SHIFT 6
57−
58−struct tps_info {
59− const char *name;
60−};
24+#include <linux/mfd/tps65912.h>
6125
62−static struct tps_info tps65912_regs[] = {
63− {
64− .name = "DCDC1",
65− },
66− {
67− .name = "DCDC2",
68− },
69− {
70− .name = "DCDC3",
71− },
72− {
73− .name = "DCDC4",
74− },
75− {
76− .name = "LDO1",
77− },
78− {
79− .name = "LDO2",
80− },
81− {
82− .name = "LDO3",
83− },
84− {
85− .name = "LDO4",
86− },
87− {
88− .name = "LDO5",
89− },
90− {
91− .name = "LDO6",
92− },
93− {
94− .name = "LDO7",
95− },
96− {
97− .name = "LDO8",
98− },
99− {
100− .name = "LDO9",
101− },
102− {
103− .name = "LDO10",
104− },
105−};
26+enum tps65912_regulators { DCDC1, DCDC2, DCDC3, DCDC4, LDO1, LDO2, LDO3,
27+ LDO4, LDO5, LDO6, LDO7, LDO8, LDO9, LDO10 };
28+
29+#define TPS65912_REGULATOR(_name, _id, _of_match, _ops, _vr, _er, _lr) \
30+ [_id] = { \
31+ .name = _name, \
32+ .of_match = _of_match, \
33+ .regulators_node = "regulators", \
34+ .id = _id, \
35+ .ops = &_ops, \
36+ .n_voltages = 64, \
37+ .type = REGULATOR_VOLTAGE, \
38+ .owner = THIS_MODULE, \
39+ .vsel_reg = _vr, \
40+ .vsel_mask = 0x3f, \
41+ .enable_reg = _er, \
42+ .enable_mask = BIT(7), \
43+ .volt_table = NULL, \
44+ .linear_ranges = _lr, \
45+ .n_linear_ranges = ARRAY_SIZE(_lr), \
46+ }
10647
107−struct tps65912_reg {
108− struct regulator_desc desc[TPS65912_NUM_REGULATOR];
109− struct tps65912 *mfd;
110− struct regulator_dev *rdev[TPS65912_NUM_REGULATOR];
111− struct tps_info *info[TPS65912_NUM_REGULATOR];
112− /* for read/write access */
113− struct mutex io_lock;
114− int mode;
115− int (*get_ctrl_reg)(int);
116− int dcdc_range[TPS65912_NUM_DCDC];
117− int pwm_mode_reg;
118− int eco_reg;
48+static const struct regulator_linear_range tps65912_dcdc_ranges[] = {
49+ REGULATOR_LINEAR_RANGE(500000, 0x0, 0x3f, 50000),
11950 };
12051
12152 static const struct regulator_linear_range tps65912_ldo_ranges[] = {
122− REGULATOR_LINEAR_RANGE(800000, 0, 32, 25000),
123− REGULATOR_LINEAR_RANGE(1650000, 33, 60, 50000),
124− REGULATOR_LINEAR_RANGE(3100000, 61, 63, 100000),
53+ REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 25000),
54+ REGULATOR_LINEAR_RANGE(1650000, 0x21, 0x3c, 50000),
55+ REGULATOR_LINEAR_RANGE(3100000, 0x3d, 0x3f, 100000),
12556 };
12657
127−static int tps65912_get_range(struct tps65912_reg *pmic, int id)
128−{
129− struct tps65912 *mfd = pmic->mfd;
130− int range;
131−
132− switch (id) {
133− case TPS65912_REG_DCDC1:
134− range = tps65912_reg_read(mfd, TPS65912_DCDC1_LIMIT);
135− break;
136− case TPS65912_REG_DCDC2:
137− range = tps65912_reg_read(mfd, TPS65912_DCDC2_LIMIT);
138− break;
139− case TPS65912_REG_DCDC3:
140− range = tps65912_reg_read(mfd, TPS65912_DCDC3_LIMIT);
141− break;
142− case TPS65912_REG_DCDC4:
143− range = tps65912_reg_read(mfd, TPS65912_DCDC4_LIMIT);
144− break;
145− default:
146− return 0;
147− }
148−
149− if (range >= 0)
150− range = (range & DCDC_LIMIT_RANGE_MASK)
151− >> DCDC_LIMIT_RANGE_SHIFT;
152−
153− pmic->dcdc_range[id] = range;
154− return range;
155−}
156−
157−static unsigned long tps65912_vsel_to_uv_range0(u8 vsel)
158−{
159− unsigned long uv;
160−
161− uv = ((vsel * 12500) + 500000);
162− return uv;
163−}
164−
165−static unsigned long tps65912_vsel_to_uv_range1(u8 vsel)
166−{
167− unsigned long uv;
168−
169− uv = ((vsel * 12500) + 700000);
170− return uv;
171−}
172−
173−static unsigned long tps65912_vsel_to_uv_range2(u8 vsel)
174−{
175− unsigned long uv;
176−
177− uv = ((vsel * 25000) + 500000);
178− return uv;
179−}
180−
181−static unsigned long tps65912_vsel_to_uv_range3(u8 vsel)
182−{
183− unsigned long uv;
184−
185− if (vsel == 0x3f)
186− uv = 3800000;
187− else
188− uv = ((vsel * 50000) + 500000);
189−
190− return uv;
191−}
192−
193−static int tps65912_get_ctrl_register(int id)
194−{
195− if (id >= TPS65912_REG_DCDC1 && id <= TPS65912_REG_LDO4)
196− return id * 3 + TPS65912_DCDC1_AVS;
197− else if (id >= TPS65912_REG_LDO5 && id <= TPS65912_REG_LDO10)
198− return id - TPS65912_REG_LDO5 + TPS65912_LDO5;
199− else
200− return -EINVAL;
201−}
202−
203−static int tps65912_get_sel_register(struct tps65912_reg *pmic, int id)
204−{
205− struct tps65912 *mfd = pmic->mfd;
206− int opvsel;
207− u8 reg = 0;
208−
209− if (id >= TPS65912_REG_DCDC1 && id <= TPS65912_REG_LDO4) {
210− opvsel = tps65912_reg_read(mfd, id * 3 + TPS65912_DCDC1_OP);
211− if (opvsel & OP_SELREG_MASK)
212− reg = id * 3 + TPS65912_DCDC1_AVS;
213− else
214− reg = id * 3 + TPS65912_DCDC1_OP;
215− } else if (id >= TPS65912_REG_LDO5 && id <= TPS65912_REG_LDO10) {
216− reg = id - TPS65912_REG_LDO5 + TPS65912_LDO5;
217− } else {
218− return -EINVAL;
219− }
220−
221− return reg;
222−}
223−
224−static int tps65912_get_mode_regiters(struct tps65912_reg *pmic, int id)
225−{
226− switch (id) {
227− case TPS65912_REG_DCDC1:
228− pmic->pwm_mode_reg = TPS65912_DCDC1_CTRL;
229− pmic->eco_reg = TPS65912_DCDC1_AVS;
230− break;
231− case TPS65912_REG_DCDC2:
232− pmic->pwm_mode_reg = TPS65912_DCDC2_CTRL;
233− pmic->eco_reg = TPS65912_DCDC2_AVS;
234− break;
235− case TPS65912_REG_DCDC3:
236− pmic->pwm_mode_reg = TPS65912_DCDC3_CTRL;
237− pmic->eco_reg = TPS65912_DCDC3_AVS;
238− break;
239− case TPS65912_REG_DCDC4:
240− pmic->pwm_mode_reg = TPS65912_DCDC4_CTRL;
241− pmic->eco_reg = TPS65912_DCDC4_AVS;
242− break;
243− default:
244− return -EINVAL;
245− }
246−
247− return 0;
248−}
249−
250−static int tps65912_reg_is_enabled(struct regulator_dev *dev)
251−{
252− struct tps65912_reg *pmic = rdev_get_drvdata(dev);
253− struct tps65912 *mfd = pmic->mfd;
254− int reg, value, id = rdev_get_id(dev);
255−
256− if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10)
257− return -EINVAL;
258−
259− reg = pmic->get_ctrl_reg(id);
260− if (reg < 0)
261− return reg;
262−
263− value = tps65912_reg_read(mfd, reg);
264− if (value < 0)
265− return value;
266−
267− return value & TPS65912_REG_ENABLED;
268−}
269−
270−static int tps65912_reg_enable(struct regulator_dev *dev)
271−{
272− struct tps65912_reg *pmic = rdev_get_drvdata(dev);
273− struct tps65912 *mfd = pmic->mfd;
274− int id = rdev_get_id(dev);
275− int reg;
276−
277− if (id < TPS65912_REG_DCDC1 || id > TPS65912_REG_LDO10)
278− return -EINVAL;
279−
280− reg = pmic->get_ctrl_reg(id);
281− if (reg < 0)
282− return reg;
283−
284− return tps65912_set_bits(mfd, reg, TPS65912_REG_ENABLED);
285−}
286−
287−static int tps65912_reg_disable(struct regulator_dev *dev)
288−{
289− struct tps65912_reg *pmic = rdev_get_drvdata(dev);
290− struct tps65912 *mfd = pmic->mfd;
291− int id = rdev_get_id(dev), reg;
292−
293− reg = pmic->get_ctrl_reg(id);
294− if (reg < 0)
295− return reg;
296−
297− return tps65912_clear_bits(mfd, reg, TPS65912_REG_ENABLED);
298−}
299−
300−static int tps65912_set_mode(struct regulator_dev *dev, unsigned int mode)
301−{
302− struct tps65912_reg *pmic = rdev_get_drvdata(dev);
303− struct tps65912 *mfd = pmic->mfd;
304− int pwm_mode, eco, id = rdev_get_id(dev);
305−
306− tps65912_get_mode_regiters(pmic, id);
307−
308− pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg);
309− eco = tps65912_reg_read(mfd, pmic->eco_reg);
310−
311− pwm_mode &= DCDCCTRL_DCDC_MODE_MASK;
312− eco &= DCDC_AVS_ECO_MASK;
313−
314− switch (mode) {
315− case REGULATOR_MODE_FAST:
316− /* Verify if mode alredy set */
317− if (pwm_mode && !eco)
318− break;
319− tps65912_set_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);
320− tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);
321− break;
322− case REGULATOR_MODE_NORMAL:
323− case REGULATOR_MODE_IDLE:
324− if (!pwm_mode && !eco)
325− break;
326− tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);
327− tps65912_clear_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);
328− break;
329− case REGULATOR_MODE_STANDBY:
330− if (!pwm_mode && eco)
331− break;
332− tps65912_clear_bits(mfd, pmic->pwm_mode_reg, DCDCCTRL_DCDC_MODE_MASK);
333− tps65912_set_bits(mfd, pmic->eco_reg, DCDC_AVS_ECO_MASK);
334− break;
335− default:
336− return -EINVAL;
337− }
338−
339− return 0;
340−}
341−
342−static unsigned int tps65912_get_mode(struct regulator_dev *dev)
343−{
344− struct tps65912_reg *pmic = rdev_get_drvdata(dev);
345− struct tps65912 *mfd = pmic->mfd;
346− int pwm_mode, eco, mode = 0, id = rdev_get_id(dev);
347−
348− tps65912_get_mode_regiters(pmic, id);
349−
350− pwm_mode = tps65912_reg_read(mfd, pmic->pwm_mode_reg);
351− eco = tps65912_reg_read(mfd, pmic->eco_reg);
352−
353− pwm_mode &= DCDCCTRL_DCDC_MODE_MASK;
354− eco &= DCDC_AVS_ECO_MASK;
355−
356− if (pwm_mode && !eco)
357− mode = REGULATOR_MODE_FAST;
358− else if (!pwm_mode && !eco)
359− mode = REGULATOR_MODE_NORMAL;
360− else if (!pwm_mode && eco)
361− mode = REGULATOR_MODE_STANDBY;
362−
363− return mode;
364−}
365−
366−static int tps65912_list_voltage(struct regulator_dev *dev, unsigned selector)
367−{
368− struct tps65912_reg *pmic = rdev_get_drvdata(dev);
369− int range, voltage = 0, id = rdev_get_id(dev);
370−
371− if (id > TPS65912_REG_DCDC4)
372− return -EINVAL;
373−
374− range = pmic->dcdc_range[id];
375−
376− switch (range) {
377− case 0:
378− /* 0.5 - 1.2875V in 12.5mV steps */
379− voltage = tps65912_vsel_to_uv_range0(selector);
380− break;
381− case 1:
382− /* 0.7 - 1.4875V in 12.5mV steps */
383− voltage = tps65912_vsel_to_uv_range1(selector);
384− break;
385− case 2:
386− /* 0.5 - 2.075V in 25mV steps */
387− voltage = tps65912_vsel_to_uv_range2(selector);
388− break;
389− case 3:
390− /* 0.5 - 3.8V in 50mV steps */
391− voltage = tps65912_vsel_to_uv_range3(selector);
392− break;
393− }
394− return voltage;
395−}
396−
397−static int tps65912_get_voltage_sel(struct regulator_dev *dev)
398−{
399− struct tps65912_reg *pmic = rdev_get_drvdata(dev);
400− struct tps65912 *mfd = pmic->mfd;
401− int id = rdev_get_id(dev);
402− int reg, vsel;
403−
404− reg = tps65912_get_sel_register(pmic, id);
405− if (reg < 0)
406− return reg;
407−
408− vsel = tps65912_reg_read(mfd, reg);
409− vsel &= 0x3F;
410−
411− return vsel;
412−}
413−
414−static int tps65912_set_voltage_sel(struct regulator_dev *dev,
415− unsigned selector)
416−{
417− struct tps65912_reg *pmic = rdev_get_drvdata(dev);
418− struct tps65912 *mfd = pmic->mfd;
419− int id = rdev_get_id(dev);
420− int value;
421− u8 reg;
422−
423− reg = tps65912_get_sel_register(pmic, id);
424− value = tps65912_reg_read(mfd, reg);
425− value &= 0xC0;
426− return tps65912_reg_write(mfd, reg, selector | value);
427−}
428−
42958 /* Operations permitted on DCDCx */
43059 static struct regulator_ops tps65912_ops_dcdc = {
431− .is_enabled = tps65912_reg_is_enabled,
432− .enable = tps65912_reg_enable,
433− .disable = tps65912_reg_disable,
434− .set_mode = tps65912_set_mode,
435− .get_mode = tps65912_get_mode,
436− .get_voltage_sel = tps65912_get_voltage_sel,
437− .set_voltage_sel = tps65912_set_voltage_sel,
438− .list_voltage = tps65912_list_voltage,
60+ .is_enabled = regulator_is_enabled_regmap,
61+ .enable = regulator_enable_regmap,
62+ .disable = regulator_disable_regmap,
63+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
64+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
65+ .list_voltage = regulator_list_voltage_linear_range,
43966 };
44067
44168 /* Operations permitted on LDOx */
44269 static struct regulator_ops tps65912_ops_ldo = {
443− .is_enabled = tps65912_reg_is_enabled,
444− .enable = tps65912_reg_enable,
445− .disable = tps65912_reg_disable,
446− .get_voltage_sel = tps65912_get_voltage_sel,
447− .set_voltage_sel = tps65912_set_voltage_sel,
448− .list_voltage = regulator_list_voltage_linear_range,
449− .map_voltage = regulator_map_voltage_linear_range,
70+ .is_enabled = regulator_is_enabled_regmap,
71+ .enable = regulator_enable_regmap,
72+ .disable = regulator_disable_regmap,
73+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
74+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
75+ .list_voltage = regulator_list_voltage_linear_range,
76+ .map_voltage = regulator_map_voltage_linear_range,
77+};
78+
79+static const struct regulator_desc regulators[] = {
80+ TPS65912_REGULATOR("DCDC1", DCDC1, "dcdc1", tps65912_ops_dcdc,
81+ TPS65912_DCDC1_OP, TPS65912_DCDC1_CTRL,
82+ tps65912_dcdc_ranges),
83+ TPS65912_REGULATOR("DCDC2", DCDC2, "dcdc2", tps65912_ops_dcdc,
84+ TPS65912_DCDC2_OP, TPS65912_DCDC2_CTRL,
85+ tps65912_dcdc_ranges),
86+ TPS65912_REGULATOR("DCDC3", DCDC3, "dcdc3", tps65912_ops_dcdc,
87+ TPS65912_DCDC3_OP, TPS65912_DCDC3_CTRL,
88+ tps65912_dcdc_ranges),
89+ TPS65912_REGULATOR("DCDC4", DCDC4, "dcdc4", tps65912_ops_dcdc,
90+ TPS65912_DCDC4_OP, TPS65912_DCDC4_CTRL,
91+ tps65912_dcdc_ranges),
92+ TPS65912_REGULATOR("LDO1", LDO1, "ldo1", tps65912_ops_ldo,
93+ TPS65912_LDO1_OP, TPS65912_LDO1_AVS,
94+ tps65912_ldo_ranges),
95+ TPS65912_REGULATOR("LDO2", LDO2, "ldo2", tps65912_ops_ldo,
96+ TPS65912_LDO2_OP, TPS65912_LDO2_AVS,
97+ tps65912_ldo_ranges),
98+ TPS65912_REGULATOR("LDO3", LDO3, "ldo3", tps65912_ops_ldo,
99+ TPS65912_LDO3_OP, TPS65912_LDO3_AVS,
100+ tps65912_ldo_ranges),
101+ TPS65912_REGULATOR("LDO4", LDO4, "ldo4", tps65912_ops_ldo,
102+ TPS65912_LDO4_OP, TPS65912_LDO4_AVS,
103+ tps65912_ldo_ranges),
104+ TPS65912_REGULATOR("LDO5", LDO5, "ldo5", tps65912_ops_ldo,
105+ TPS65912_LDO5, TPS65912_LDO5,
106+ tps65912_ldo_ranges),
107+ TPS65912_REGULATOR("LDO6", LDO6, "ldo6", tps65912_ops_ldo,
108+ TPS65912_LDO6, TPS65912_LDO6,
109+ tps65912_ldo_ranges),
110+ TPS65912_REGULATOR("LDO7", LDO7, "ldo7", tps65912_ops_ldo,
111+ TPS65912_LDO7, TPS65912_LDO7,
112+ tps65912_ldo_ranges),
113+ TPS65912_REGULATOR("LDO8", LDO8, "ldo8", tps65912_ops_ldo,
114+ TPS65912_LDO8, TPS65912_LDO8,
115+ tps65912_ldo_ranges),
116+ TPS65912_REGULATOR("LDO9", LDO9, "ldo9", tps65912_ops_ldo,
117+ TPS65912_LDO9, TPS65912_LDO9,
118+ tps65912_ldo_ranges),
119+ TPS65912_REGULATOR("LDO10", LDO10, "ldo10", tps65912_ops_ldo,
120+ TPS65912_LDO10, TPS65912_LDO10,
121+ tps65912_ldo_ranges),
450122 };
451123
452−static int tps65912_probe(struct platform_device *pdev)
124+static int tps65912_regulator_probe(struct platform_device *pdev)
453125 {
454− struct tps65912 *tps65912 = dev_get_drvdata(pdev->dev.parent);
126+ struct tps65912 *tps = dev_get_drvdata(pdev->dev.parent);
455127 struct regulator_config config = { };
456− struct tps_info *info;
457− struct regulator_init_data *reg_data;
458128 struct regulator_dev *rdev;
459− struct tps65912_reg *pmic;
460− struct tps65912_board *pmic_plat_data;
461129 int i;
462130
463− pmic_plat_data = dev_get_platdata(tps65912->dev);
464− if (!pmic_plat_data)
465− return -EINVAL;
131+ platform_set_drvdata(pdev, tps);
466132
467− reg_data = pmic_plat_data->tps65912_pmic_init_data;
133+ config.dev = &pdev->dev;
134+ config.driver_data = tps;
135+ config.dev->of_node = tps->dev->of_node;
136+ config.regmap = tps->regmap;
468137
469− pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
470− if (!pmic)
471− return -ENOMEM;
472−
473− mutex_init(&pmic->io_lock);
474− pmic->mfd = tps65912;
475− platform_set_drvdata(pdev, pmic);
476−
477− pmic->get_ctrl_reg = &tps65912_get_ctrl_register;
478− info = tps65912_regs;
479−
480− for (i = 0; i < TPS65912_NUM_REGULATOR; i++, info++, reg_data++) {
481− int range = 0;
482− /* Register the regulators */
483− pmic->info[i] = info;
484−
485− pmic->desc[i].name = info->name;
486− pmic->desc[i].id = i;
487− pmic->desc[i].n_voltages = 64;
488− if (i > TPS65912_REG_DCDC4) {
489− pmic->desc[i].ops = &tps65912_ops_ldo;
490− pmic->desc[i].linear_ranges = tps65912_ldo_ranges;
491− pmic->desc[i].n_linear_ranges =
492− ARRAY_SIZE(tps65912_ldo_ranges);
493− } else {
494− pmic->desc[i].ops = &tps65912_ops_dcdc;
495− }
496− pmic->desc[i].type = REGULATOR_VOLTAGE;
497− pmic->desc[i].owner = THIS_MODULE;
498− range = tps65912_get_range(pmic, i);
499−
500− config.dev = tps65912->dev;
501− config.init_data = reg_data;
502− config.driver_data = pmic;
503−
504− rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
138+ for (i = 0; i < ARRAY_SIZE(regulators); i++) {
139+ rdev = devm_regulator_register(&pdev->dev, &regulators[i],
505140 &config);
506141 if (IS_ERR(rdev)) {
507− dev_err(tps65912->dev,
508− "failed to register %s regulator\n",
142+ dev_err(tps->dev, "failed to register %s regulator\n",
509143 pdev->name);
510144 return PTR_ERR(rdev);
511145 }
512−
513− /* Save regulator for cleanup */
514− pmic->rdev[i] = rdev;
515146 }
147+
516148 return 0;
517149 }
518150
519−static struct platform_driver tps65912_driver = {
151+static const struct platform_device_id tps65912_regulator_id_table[] = {
152+ { "tps65912-regulator", },
153+ { /* sentinel */ }
154+};
155+MODULE_DEVICE_TABLE(platform, tps65912_regulator_id_table);
156+
157+static struct platform_driver tps65912_regulator_driver = {
520158 .driver = {
521− .name = "tps65912-pmic",
159+ .name = "tps65912-regulator",
522160 },
523− .probe = tps65912_probe,
161+ .probe = tps65912_regulator_probe,
162+ .id_table = tps65912_regulator_id_table,
524163 };
164+module_platform_driver(tps65912_regulator_driver);
525165
526−static int __init tps65912_init(void)
527−{
528− return platform_driver_register(&tps65912_driver);
529−}
530−subsys_initcall(tps65912_init);
531−
532−static void __exit tps65912_cleanup(void)
533−{
534− platform_driver_unregister(&tps65912_driver);
535−}
536−module_exit(tps65912_cleanup);
537−
538−MODULE_AUTHOR("Margarita Olaya Cabrera <magi@slimlogic.co.uk>");
166+MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
539167 MODULE_DESCRIPTION("TPS65912 voltage regulator driver");
540168 MODULE_LICENSE("GPL v2");
541−MODULE_ALIAS("platform:tps65912-pmic");
drivers/soc/fsl/qe/gpio.c+1−1
@@ -63,7 +63,7 @@ static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio) · 62 unmodified lines
6363 struct qe_pio_regs __iomem *regs = mm_gc->regs;
6464 u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio);
6565
66− return in_be32(&regs->cpdata) & pin_mask;
66+ return !!(in_be32(&regs->cpdata) & pin_mask);
6767 }
6868
6969 static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
drivers/usb/gadget/udc/atmel_usba_udc.c+0−2
@@ -25,8 +25,6 @@ · 24 unmodified lines
2525 #include <linux/of.h>
2626 #include <linux/of_gpio.h>
2727
28−#include <asm/gpio.h>
29−
3028 #include "atmel_usba_udc.h"
3129
3230 #ifdef CONFIG_USB_GADGET_DEBUG_FS
drivers/usb/host/ohci-at91.c+0−2
@@ -24,8 +24,6 @@ · 23 unmodified lines
2424 #include <linux/usb.h>
2525 #include <linux/usb/hcd.h>
2626
27−#include <asm/gpio.h>
28−
2927 #include "ohci.h"
3028
3129 #define valid_port(index) ((index) >= 0 && (index) < AT91_MAX_USBH_PORTS)
drivers/video/fbdev/atmel_lcdfb.c+0−2
@@ -26,8 +26,6 @@ · 25 unmodified lines
2626 #include <linux/regulator/consumer.h>
2727 #include <video/videomode.h>
2828
29−#include <asm/gpio.h>
30−
3129 #include <video/atmel_lcdc.h>
3230
3331 struct atmel_lcdfb_config {
drivers/video/fbdev/omap/lcd_h3.c+1−1
@@ -22,8 +22,8 @@ · 21 unmodified lines
2222 #include <linux/module.h>
2323 #include <linux/platform_device.h>
2424 #include <linux/i2c/tps65010.h>
25+#include <linux/gpio.h>
2526
26−#include <asm/gpio.h>
2727 #include "omapfb.h"
2828
2929 #define MODULE_NAME "omapfb-lcd_h3"
drivers/video/fbdev/omap/lcd_osk.c+1−2
@@ -22,8 +22,7 @@ · 21 unmodified lines
2222
2323 #include <linux/module.h>
2424 #include <linux/platform_device.h>
25−
26−#include <asm/gpio.h>
25+#include <linux/gpio.h>
2726
2827 #include <mach/hardware.h>
2928 #include <mach/mux.h>
drivers/video/fbdev/omap/lcd_palmtt.c+1−1
@@ -28,8 +28,8 @@ GPIO13 - screen blanking · 27 unmodified lines
2828 #include <linux/platform_device.h>
2929 #include <linux/module.h>
3030 #include <linux/io.h>
31+#include <linux/gpio.h>
3132
32−#include <asm/gpio.h>
3333 #include "omapfb.h"
3434
3535 static int palmtt_panel_init(struct lcd_panel *panel,
include/asm-generic/gpio.h+4−0
@@ -26,8 +26,12 @@ · 25 unmodified lines
2626 */
2727
2828 #ifndef ARCH_NR_GPIOS
29+#if defined(CONFIG_ARCH_NR_GPIO) && CONFIG_ARCH_NR_GPIO > 0
30+#define ARCH_NR_GPIOS CONFIG_ARCH_NR_GPIO
31+#else
2932 #define ARCH_NR_GPIOS 512
3033 #endif
34+#endif
3135
3236 /*
3337 * "valid" GPIO numbers are nonnegative and may be passed to
include/linux/gpio/driver.h+16−23
@@ -1,6 +1,7 @@
11 #ifndef __LINUX_GPIO_DRIVER_H
22 #define __LINUX_GPIO_DRIVER_H
33
4+#include <linux/device.h>
45 #include <linux/types.h>
56 #include <linux/module.h>
67 #include <linux/irq.h>
@@ -10,22 +11,21 @@ · 3 unmodified lines
1011 #include <linux/pinctrl/pinctrl.h>
1112 #include <linux/kconfig.h>
1213
13−struct device;
1414 struct gpio_desc;
1515 struct of_phandle_args;
1616 struct device_node;
1717 struct seq_file;
18+struct gpio_device;
1819
1920 #ifdef CONFIG_GPIOLIB
2021
2122 /**
2223 * struct gpio_chip - abstract a GPIO controller
23− * @label: for diagnostics
24+ * @label: a functional name for the GPIO device, such as a part
25+ * number or the name of the SoC IP-block implementing it.
26+ * @gpiodev: the internal state holder, opaque struct
2427 * @parent: optional parent device providing the GPIOs
25− * @cdev: class device used by sysfs interface (may be NULL)
2628 * @owner: helps prevent removal of modules exporting active GPIOs
27− * @data: per-instance data assigned by the driver
28− * @list: links gpio_chips together for traversal
2929 * @request: optional hook for chip-specific activation, such as
3030 * enabling module power and clock; may sleep
3131 * @free: optional hook for chip-specific deactivation, such as
@@ -52,7 +52,6 @@ struct seq_file; · 20 unmodified lines
5252 * get rid of the static GPIO number space in the long run.
5353 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
5454 * handled is (base + ngpio - 1).
55− * @desc: array of ngpio descriptors. Private.
5655 * @names: if set, must be an array of strings to use as alternative
5756 * names for the GPIOs in this chip. Any entry in the array
5857 * may be NULL if there is no alias for the GPIO, however the
@@ -107,11 +106,9 @@ struct seq_file; · 48 unmodified lines
107106 */
108107 struct gpio_chip {
109108 const char *label;
109+ struct gpio_device *gpiodev;
110110 struct device *parent;
111− struct device *cdev;
112111 struct module *owner;
113− void *data;
114− struct list_head list;
115112
116113 int (*request)(struct gpio_chip *chip,
117114 unsigned offset);
@@ -141,7 +138,6 @@ struct gpio_chip { · 23 unmodified lines
141138 struct gpio_chip *chip);
142139 int base;
143140 u16 ngpio;
144− struct gpio_desc *desc;
145141 const char *const *names;
146142 bool can_sleep;
147143 bool irq_not_threaded;
@@ -184,15 +180,6 @@ struct gpio_chip { · 36 unmodified lines
184180 int (*of_xlate)(struct gpio_chip *gc,
185181 const struct of_phandle_args *gpiospec, u32 *flags);
186182 #endif
187−#ifdef CONFIG_PINCTRL
188− /*
189− * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
190− * describe the actual pin range which they serve in an SoC. This
191− * information would be used by pinctrl subsystem to configure
192− * corresponding pins for gpio usage.
193− */
194− struct list_head pin_ranges;
195−#endif
196183 };
197184
198185 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
@@ -205,18 +192,24 @@ static inline int gpiochip_add(struct gpio_chip *chip) · 6 unmodified lines
205192 return gpiochip_add_data(chip, NULL);
206193 }
207194 extern void gpiochip_remove(struct gpio_chip *chip);
195+extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
196+ void *data);
197+extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip);
198+
208199 extern struct gpio_chip *gpiochip_find(void *data,
209200 int (*match)(struct gpio_chip *chip, void *data));
210201
211202 /* lock/unlock as IRQ */
212203 int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
213204 void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
205+bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset);
206+
207+/* Line status inquiry for drivers */
208+bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset);
209+bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset);
214210
215211 /* get driver data */
216−static inline void *gpiochip_get_data(struct gpio_chip *chip)
217−{
218− return chip->data;
219−}
212+void *gpiochip_get_data(struct gpio_chip *chip);
220213
221214 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
222215
include/linux/mfd/tps65912.h+111−98
@@ -1,28 +1,27 @@
11 /*
2− * tps65912.h -- TI TPS6591x
2+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
3+ * Andrew F. Davis <afd@ti.com>
34 *
4− * Copyright 2011 Texas Instruments Inc.
5+ * This program is free software; you can redistribute it and/or
6+ * modify it under the terms of the GNU General Public License version 2 as
7+ * published by the Free Software Foundation.
58 *
6− * Author: Margarita Olaya <magi@slimlogic.co.uk>
7− *
8− * This program is free software; you can redistribute it and/or modify it
9− * under the terms of the GNU General Public License as published by the
10− * Free Software Foundation; either version 2 of the License, or (at your
11− * option) any later version.
9+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
10+ * kind, whether expressed or implied; without even the implied warranty
11+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12+ * GNU General Public License version 2 for more details.
1213 *
14+ * Based on the TPS65218 driver and the previous TPS65912 driver by
15+ * Margarita Olaya Cabrera <magi@slimlogic.co.uk>
1316 */
1417
1518 #ifndef __LINUX_MFD_TPS65912_H
1619 #define __LINUX_MFD_TPS65912_H
1720
18−/* TPS regulator type list */
19−#define REGULATOR_LDO 0
20−#define REGULATOR_DCDC 1
21−
22−/*
23− * List of registers for TPS65912
24− */
21+#include <linux/device.h>
22+#include <linux/regmap.h>
2523
24+/* List of registers for TPS65912 */
2625 #define TPS65912_DCDC1_CTRL 0x00
2726 #define TPS65912_DCDC2_CTRL 0x01
2827 #define TPS65912_DCDC3_CTRL 0x02
@@ -126,41 +125,45 @@ · 97 unmodified lines
126125 #define TPS65912_VERNUM 0x64
127126 #define TPS6591X_MAX_REGISTER 0x64
128127
129−/* IRQ Definitions */
130−#define TPS65912_IRQ_PWRHOLD_F 0
131−#define TPS65912_IRQ_VMON 1
132−#define TPS65912_IRQ_PWRON 2
133−#define TPS65912_IRQ_PWRON_LP 3
134−#define TPS65912_IRQ_PWRHOLD_R 4
135−#define TPS65912_IRQ_HOTDIE 5
136−#define TPS65912_IRQ_GPIO1_R 6
137−#define TPS65912_IRQ_GPIO1_F 7
138−#define TPS65912_IRQ_GPIO2_R 8
139−#define TPS65912_IRQ_GPIO2_F 9
140−#define TPS65912_IRQ_GPIO3_R 10
141−#define TPS65912_IRQ_GPIO3_F 11
142−#define TPS65912_IRQ_GPIO4_R 12
143−#define TPS65912_IRQ_GPIO4_F 13
144−#define TPS65912_IRQ_GPIO5_R 14
145−#define TPS65912_IRQ_GPIO5_F 15
146−#define TPS65912_IRQ_PGOOD_DCDC1 16
147−#define TPS65912_IRQ_PGOOD_DCDC2 17
148−#define TPS65912_IRQ_PGOOD_DCDC3 18
149−#define TPS65912_IRQ_PGOOD_DCDC4 19
150−#define TPS65912_IRQ_PGOOD_LDO1 20
151−#define TPS65912_IRQ_PGOOD_LDO2 21
152−#define TPS65912_IRQ_PGOOD_LDO3 22
153−#define TPS65912_IRQ_PGOOD_LDO4 23
154−#define TPS65912_IRQ_PGOOD_LDO5 24
155−#define TPS65912_IRQ_PGOOD_LDO6 25
156−#define TPS65912_IRQ_PGOOD_LDO7 26
157−#define TPS65912_IRQ_PGOOD_LD08 27
158−#define TPS65912_IRQ_PGOOD_LDO9 28
159−#define TPS65912_IRQ_PGOOD_LDO10 29
128+/* INT_STS Register field definitions */
129+#define TPS65912_INT_STS_PWRHOLD_F BIT(0)
130+#define TPS65912_INT_STS_VMON BIT(1)
131+#define TPS65912_INT_STS_PWRON BIT(2)
132+#define TPS65912_INT_STS_PWRON_LP BIT(3)
133+#define TPS65912_INT_STS_PWRHOLD_R BIT(4)
134+#define TPS65912_INT_STS_HOTDIE BIT(5)
135+#define TPS65912_INT_STS_GPIO1_R BIT(6)
136+#define TPS65912_INT_STS_GPIO1_F BIT(7)
137+
138+/* INT_STS Register field definitions */
139+#define TPS65912_INT_STS2_GPIO2_R BIT(0)
140+#define TPS65912_INT_STS2_GPIO2_F BIT(1)
141+#define TPS65912_INT_STS2_GPIO3_R BIT(2)
142+#define TPS65912_INT_STS2_GPIO3_F BIT(3)
143+#define TPS65912_INT_STS2_GPIO4_R BIT(4)
144+#define TPS65912_INT_STS2_GPIO4_F BIT(5)
145+#define TPS65912_INT_STS2_GPIO5_R BIT(6)
146+#define TPS65912_INT_STS2_GPIO5_F BIT(7)
160147
161−#define TPS65912_NUM_IRQ 30
148+/* INT_STS Register field definitions */
149+#define TPS65912_INT_STS3_PGOOD_DCDC1 BIT(0)
150+#define TPS65912_INT_STS3_PGOOD_DCDC2 BIT(1)
151+#define TPS65912_INT_STS3_PGOOD_DCDC3 BIT(2)
152+#define TPS65912_INT_STS3_PGOOD_DCDC4 BIT(3)
153+#define TPS65912_INT_STS3_PGOOD_LDO1 BIT(4)
154+#define TPS65912_INT_STS3_PGOOD_LDO2 BIT(5)
155+#define TPS65912_INT_STS3_PGOOD_LDO3 BIT(6)
156+#define TPS65912_INT_STS3_PGOOD_LDO4 BIT(7)
162157
163−/* GPIO 1 and 2 Register Definitions */
158+/* INT_STS Register field definitions */
159+#define TPS65912_INT_STS4_PGOOD_LDO5 BIT(0)
160+#define TPS65912_INT_STS4_PGOOD_LDO6 BIT(1)
161+#define TPS65912_INT_STS4_PGOOD_LDO7 BIT(2)
162+#define TPS65912_INT_STS4_PGOOD_LDO8 BIT(3)
163+#define TPS65912_INT_STS4_PGOOD_LDO9 BIT(4)
164+#define TPS65912_INT_STS4_PGOOD_LDO10 BIT(5)
165+
166+/* GPIO 1 and 2 Register field definitions */
164167 #define GPIO_SLEEP_MASK 0x80
165168 #define GPIO_SLEEP_SHIFT 7
166169 #define GPIO_DEB_MASK 0x10
@@ -172,7 +175,7 @@ · 5 unmodified lines
172175 #define GPIO_SET_MASK 0x01
173176 #define GPIO_SET_SHIFT 0
174177
175−/* GPIO 3 Register Definitions */
178+/* GPIO 3 Register field definitions */
176179 #define GPIO3_SLEEP_MASK 0x80
177180 #define GPIO3_SLEEP_SHIFT 7
178181 #define GPIO3_SEL_MASK 0x40
@@ -190,7 +193,7 @@ · 11 unmodified lines
190193 #define GPIO3_SET_MASK 0x01
191194 #define GPIO3_SET_SHIFT 0
192195
193−/* GPIO 4 Register Definitions */
196+/* GPIO 4 Register field definitions */
194197 #define GPIO4_SLEEP_MASK 0x80
195198 #define GPIO4_SLEEP_SHIFT 7
196199 #define GPIO4_SEL_MASK 0x40
@@ -264,65 +267,75 @@ · 67 unmodified lines
264267 #define DCDC_LIMIT_MAX_SEL_MASK 0x3F
265268 #define DCDC_LIMIT_MAX_SEL_SHIFT 0
266269
267−/**
268− * struct tps65912_board
269− * Board platform dat may be used to initialize regulators.
270− */
271−struct tps65912_board {
272− int is_dcdc1_avs;
273− int is_dcdc2_avs;
274− int is_dcdc3_avs;
275− int is_dcdc4_avs;
276− int irq;
277− int irq_base;
278− int gpio_base;
279− struct regulator_init_data *tps65912_pmic_init_data;
270+/* Define the TPS65912 IRQ numbers */
271+enum tps65912_irqs {
272+ /* INT_STS registers */
273+ TPS65912_IRQ_PWRHOLD_F,
274+ TPS65912_IRQ_VMON,
275+ TPS65912_IRQ_PWRON,
276+ TPS65912_IRQ_PWRON_LP,
277+ TPS65912_IRQ_PWRHOLD_R,
278+ TPS65912_IRQ_HOTDIE,
279+ TPS65912_IRQ_GPIO1_R,
280+ TPS65912_IRQ_GPIO1_F,
281+ /* INT_STS2 registers */
282+ TPS65912_IRQ_GPIO2_R,
283+ TPS65912_IRQ_GPIO2_F,
284+ TPS65912_IRQ_GPIO3_R,
285+ TPS65912_IRQ_GPIO3_F,
286+ TPS65912_IRQ_GPIO4_R,
287+ TPS65912_IRQ_GPIO4_F,
288+ TPS65912_IRQ_GPIO5_R,
289+ TPS65912_IRQ_GPIO5_F,
290+ /* INT_STS3 registers */
291+ TPS65912_IRQ_PGOOD_DCDC1,
292+ TPS65912_IRQ_PGOOD_DCDC2,
293+ TPS65912_IRQ_PGOOD_DCDC3,
294+ TPS65912_IRQ_PGOOD_DCDC4,
295+ TPS65912_IRQ_PGOOD_LDO1,
296+ TPS65912_IRQ_PGOOD_LDO2,
297+ TPS65912_IRQ_PGOOD_LDO3,
298+ TPS65912_IRQ_PGOOD_LDO4,
299+ /* INT_STS4 registers */
300+ TPS65912_IRQ_PGOOD_LDO5,
301+ TPS65912_IRQ_PGOOD_LDO6,
302+ TPS65912_IRQ_PGOOD_LDO7,
303+ TPS65912_IRQ_PGOOD_LDO8,
304+ TPS65912_IRQ_PGOOD_LDO9,
305+ TPS65912_IRQ_PGOOD_LDO10,
280306 };
281307
282−/**
283− * struct tps65912 - tps65912 sub-driver chip access routines
308+/*
309+ * struct tps65912 - state holder for the tps65912 driver
310+ *
311+ * Device data may be used to access the TPS65912 chip
284312 */
285−
286313 struct tps65912 {
287314 struct device *dev;
288− /* for read/write acces */
289− struct mutex io_mutex;
290−
291− /* For device IO interfaces: I2C or SPI */
292− void *control_data;
293−
294− int (*read)(struct tps65912 *tps65912, u8 reg, int size, void *dest);
295− int (*write)(struct tps65912 *tps65912, u8 reg, int size, void *src);
296−
297− /* Client devices */
298− struct tps65912_pmic *pmic;
315+ struct regmap *regmap;
299316
300− /* GPIO Handling */
301− struct gpio_chip gpio;
317+ /* IRQ Data */
318+ int irq;
319+ struct regmap_irq_chip_data *irq_data;
320+};
302321
303− /* IRQ Handling */
304− struct mutex irq_lock;
305− int chip_irq;
306− int irq_base;
307− int irq_num;
308− u32 irq_mask;
322+static const struct regmap_range tps65912_yes_ranges[] = {
323+ regmap_reg_range(TPS65912_INT_STS, TPS65912_GPIO5),
309324 };
310325
311−struct tps65912_platform_data {
312− int irq;
313− int irq_base;
326+static const struct regmap_access_table tps65912_volatile_table = {
327+ .yes_ranges = tps65912_yes_ranges,
328+ .n_yes_ranges = ARRAY_SIZE(tps65912_yes_ranges),
314329 };
315330
316−unsigned int tps_chip(void);
331+static const struct regmap_config tps65912_regmap_config = {
332+ .reg_bits = 8,
333+ .val_bits = 8,
334+ .cache_type = REGCACHE_RBTREE,
335+ .volatile_table = &tps65912_volatile_table,
336+};
317337
318−int tps65912_set_bits(struct tps65912 *tps65912, u8 reg, u8 mask);
319−int tps65912_clear_bits(struct tps65912 *tps65912, u8 reg, u8 mask);
320−int tps65912_reg_read(struct tps65912 *tps65912, u8 reg);
321−int tps65912_reg_write(struct tps65912 *tps65912, u8 reg, u8 val);
322−int tps65912_device_init(struct tps65912 *tps65912);
323−void tps65912_device_exit(struct tps65912 *tps65912);
324−int tps65912_irq_init(struct tps65912 *tps65912, int irq,
325− struct tps65912_platform_data *pdata);
326−int tps65912_irq_exit(struct tps65912 *tps65912);
338+int tps65912_device_init(struct tps65912 *tps);
339+int tps65912_device_exit(struct tps65912 *tps);
327340
328341 #endif /* __LINUX_MFD_TPS65912_H */
include/uapi/linux/Kbuild+1−0
@@ -138,6 +138,7 @@ header-y += genetlink.h · 137 unmodified lines
138138 header-y += gen_stats.h
139139 header-y += gfs2_ondisk.h
140140 header-y += gigaset_dev.h
141+header-y += gpio.h
141142 header-y += gsmmux.h
142143 header-y += hdlcdrv.h
143144 header-y += hdlc.h
include/uapi/linux/gpio.h+58−0
@@ -0,0 +1,58 @@
1+/*
2+ * <linux/gpio.h> - userspace ABI for the GPIO character devices
3+ *
4+ * Copyright (C) 2015 Linus Walleij
5+ *
6+ * This program is free software; you can redistribute it and/or modify it
7+ * under the terms of the GNU General Public License version 2 as published by
8+ * the Free Software Foundation.
9+ */
10+#ifndef _UAPI_GPIO_H_
11+#define _UAPI_GPIO_H_
12+
13+#include <linux/ioctl.h>
14+#include <linux/types.h>
15+
16+/**
17+ * struct gpiochip_info - Information about a certain GPIO chip
18+ * @name: the Linux kernel name of this GPIO chip
19+ * @label: a functional name for this GPIO chip, such as a product
20+ * number, may be NULL
21+ * @lines: number of GPIO lines on this chip
22+ */
23+struct gpiochip_info {
24+ char name[32];
25+ char label[32];
26+ __u32 lines;
27+};
28+
29+/* Line is in use by the kernel */
30+#define GPIOLINE_FLAG_KERNEL (1UL << 0)
31+#define GPIOLINE_FLAG_IS_OUT (1UL << 1)
32+#define GPIOLINE_FLAG_ACTIVE_LOW (1UL << 2)
33+#define GPIOLINE_FLAG_OPEN_DRAIN (1UL << 3)
34+#define GPIOLINE_FLAG_OPEN_SOURCE (1UL << 4)
35+
36+/**
37+ * struct gpioline_info - Information about a certain GPIO line
38+ * @line_offset: the local offset on this GPIO device, fill this in when
39+ * requesting the line information from the kernel
40+ * @flags: various flags for this line
41+ * @name: the name of this GPIO line, such as the output pin of the line on the
42+ * chip, a rail or a pin header name on a board, as specified by the gpio
43+ * chip, may be NULL
44+ * @consumer: a functional name for the consumer of this GPIO line as set by
45+ * whatever is using it, will be NULL if there is no current user but may
46+ * also be NULL if the consumer doesn't set this up
47+ */
48+struct gpioline_info {
49+ __u32 line_offset;
50+ __u32 flags;
51+ char name[32];
52+ char consumer[32];
53+};
54+
55+#define GPIO_GET_CHIPINFO_IOCTL _IOR(0xB4, 0x01, struct gpiochip_info)
56+#define GPIO_GET_LINEINFO_IOCTL _IOWR(0xB4, 0x02, struct gpioline_info)
57+
58+#endif /* _UAPI_GPIO_H_ */
tools/Makefile+5−3
@@ -13,6 +13,7 @@ help: · 12 unmodified lines
1313 @echo ' cpupower - a tool for all things x86 CPU power'
1414 @echo ' firewire - the userspace part of nosy, an IEEE-1394 traffic sniffer'
1515 @echo ' freefall - laptop accelerometer program for disk protection'
16+ @echo ' gpio - GPIO tools'
1617 @echo ' hv - tools used when in Hyper-V clients'
1718 @echo ' iio - IIO tools'
1819 @echo ' lguest - a minimal 32-bit x86 hypervisor'
@@ -53,7 +54,7 @@ acpi: FORCE · 34 unmodified lines
5354 cpupower: FORCE
5455 $(call descend,power/$@)
5556
56−cgroup firewire hv guest spi usb virtio vm net iio: FORCE
57+cgroup firewire hv guest spi usb virtio vm net iio gpio: FORCE
5758 $(call descend,$@)
5859
5960 liblockdep: FORCE
@@ -119,7 +120,7 @@ acpi_clean: · 59 unmodified lines
119120 cpupower_clean:
120121 $(call descend,power/cpupower,clean)
121122
122−cgroup_clean hv_clean firewire_clean lguest_clean spi_clean usb_clean virtio_clean vm_clean net_clean iio_clean:
123+cgroup_clean hv_clean firewire_clean lguest_clean spi_clean usb_clean virtio_clean vm_clean net_clean iio_clean gpio_clean:
123124 $(call descend,$(@:_clean=),clean)
124125
125126 liblockdep_clean:
@@ -155,6 +156,7 @@ build_clean: · 29 unmodified lines
155156 clean: acpi_clean cgroup_clean cpupower_clean hv_clean firewire_clean lguest_clean \
156157 perf_clean selftests_clean turbostat_clean spi_clean usb_clean virtio_clean \
157158 vm_clean net_clean iio_clean x86_energy_perf_policy_clean tmon_clean \
158− freefall_clean build_clean libbpf_clean libsubcmd_clean liblockdep_clean
159+ freefall_clean build_clean libbpf_clean libsubcmd_clean liblockdep_clean \
160+ gpio_clean
159161
160162 .PHONY: FORCE
tools/gpio/Makefile+12−0
@@ -0,0 +1,12 @@
1+CC = $(CROSS_COMPILE)gcc
2+CFLAGS += -Wall -g -D_GNU_SOURCE
3+
4+all: lsgpio
5+
6+lsgpio: lsgpio.o gpio-utils.o
7+
8+%.o: %.c gpio-utils.h
9+
10+.PHONY: clean
11+clean:
12+ rm -f *.o lsgpio
tools/gpio/gpio-utils.c+11−0
@@ -0,0 +1,11 @@
1+/*
2+ * GPIO tools - helpers library for the GPIO tools
3+ *
4+ * Copyright (C) 2015 Linus Walleij
5+ *
6+ * This program is free software; you can redistribute it and/or modify it
7+ * under the terms of the GNU General Public License version 2 as published by
8+ * the Free Software Foundation.
9+ */
10+
11+#include "gpio-utils.h"
tools/gpio/gpio-utils.h+27−0
@@ -0,0 +1,27 @@
1+/*
2+ * GPIO tools - utility helpers library for the GPIO tools
3+ *
4+ * Copyright (C) 2015 Linus Walleij
5+ *
6+ * Portions copied from iio_utils and lssio:
7+ * Copyright (c) 2010 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
8+ * Copyright (c) 2008 Jonathan Cameron
9+ * *
10+ * This program is free software; you can redistribute it and/or modify it
11+ * under the terms of the GNU General Public License version 2 as published by
12+ * the Free Software Foundation.
13+ */
14+#ifndef _GPIO_UTILS_H_
15+#define _GPIO_UTILS_H_
16+
17+#include <string.h>
18+
19+#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
20+
21+static inline int check_prefix(const char *str, const char *prefix)
22+{
23+ return strlen(str) > strlen(prefix) &&
24+ strncmp(str, prefix, strlen(prefix)) == 0;
25+}
26+
27+#endif /* _GPIO_UTILS_H_ */
tools/gpio/lsgpio.c+195−0
@@ -0,0 +1,195 @@
1+/*
2+ * lsgpio - example on how to list the GPIO lines on a system
3+ *
4+ * Copyright (C) 2015 Linus Walleij
5+ *
6+ * This program is free software; you can redistribute it and/or modify it
7+ * under the terms of the GNU General Public License version 2 as published by
8+ * the Free Software Foundation.
9+ *
10+ * Usage:
11+ * lsgpio <-n device-name>
12+ */
13+
14+#include <unistd.h>
15+#include <stdlib.h>
16+#include <stdbool.h>
17+#include <stdio.h>
18+#include <dirent.h>
19+#include <errno.h>
20+#include <string.h>
21+#include <poll.h>
22+#include <fcntl.h>
23+#include <getopt.h>
24+#include <sys/ioctl.h>
25+#include <linux/gpio.h>
26+
27+#include "gpio-utils.h"
28+
29+struct gpio_flag {
30+ char *name;
31+ unsigned long mask;
32+};
33+
34+struct gpio_flag flagnames[] = {
35+ {
36+ .name = "kernel",
37+ .mask = GPIOLINE_FLAG_KERNEL,
38+ },
39+ {
40+ .name = "output",
41+ .mask = GPIOLINE_FLAG_IS_OUT,
42+ },
43+ {
44+ .name = "active-low",
45+ .mask = GPIOLINE_FLAG_ACTIVE_LOW,
46+ },
47+ {
48+ .name = "open-drain",
49+ .mask = GPIOLINE_FLAG_OPEN_DRAIN,
50+ },
51+ {
52+ .name = "open-source",
53+ .mask = GPIOLINE_FLAG_OPEN_SOURCE,
54+ },
55+};
56+
57+void print_flags(unsigned long flags)
58+{
59+ int i;
60+ int printed = 0;
61+
62+ for (i = 0; i < ARRAY_SIZE(flagnames); i++) {
63+ if (flags & flagnames[i].mask) {
64+ if (printed)
65+ fprintf(stdout, " ");
66+ fprintf(stdout, "%s", flagnames[i].name);
67+ printed++;
68+ }
69+ }
70+}
71+
72+int list_device(const char *device_name)
73+{
74+ struct gpiochip_info cinfo;
75+ char *chrdev_name;
76+ int fd;
77+ int ret;
78+ int i;
79+
80+ ret = asprintf(&chrdev_name, "/dev/%s", device_name);
81+ if (ret < 0)
82+ return -ENOMEM;
83+
84+ fd = open(chrdev_name, 0);
85+ if (fd == -1) {
86+ ret = -errno;
87+ fprintf(stderr, "Failed to open %s\n", chrdev_name);
88+ goto exit_close_error;
89+ }
90+
91+ /* Inspect this GPIO chip */
92+ ret = ioctl(fd, GPIO_GET_CHIPINFO_IOCTL, &cinfo);
93+ if (ret == -1) {
94+ ret = -errno;
95+ perror("Failed to issue CHIPINFO IOCTL\n");
96+ goto exit_close_error;
97+ }
98+ fprintf(stdout, "GPIO chip: %s, \"%s\", %u GPIO lines\n",
99+ cinfo.name, cinfo.label, cinfo.lines);
100+
101+ /* Loop over the lines and print info */
102+ for (i = 0; i < cinfo.lines; i++) {
103+ struct gpioline_info linfo;
104+
105+ memset(&linfo, 0, sizeof(linfo));
106+ linfo.line_offset = i;
107+
108+ ret = ioctl(fd, GPIO_GET_LINEINFO_IOCTL, &linfo);
109+ if (ret == -1) {
110+ ret = -errno;
111+ perror("Failed to issue LINEINFO IOCTL\n");
112+ goto exit_close_error;
113+ }
114+ fprintf(stdout, "\tline %2d:", linfo.line_offset);
115+ if (linfo.name[0])
116+ fprintf(stdout, " \"%s\"", linfo.name);
117+ else
118+ fprintf(stdout, " unnamed");
119+ if (linfo.consumer[0])
120+ fprintf(stdout, " \"%s\"", linfo.consumer);
121+ else
122+ fprintf(stdout, " unused");
123+ if (linfo.flags) {
124+ fprintf(stdout, " [");
125+ print_flags(linfo.flags);
126+ fprintf(stdout, "]");
127+ }
128+ fprintf(stdout, "\n");
129+
130+ }
131+
132+exit_close_error:
133+ if (close(fd) == -1)
134+ perror("Failed to close GPIO character device file");
135+ free(chrdev_name);
136+ return ret;
137+}
138+
139+void print_usage(void)
140+{
141+ fprintf(stderr, "Usage: lsgpio [options]...\n"
142+ "List GPIO chips, lines and states\n"
143+ " -n <name> List GPIOs on a named device\n"
144+ " -? This helptext\n"
145+ );
146+}
147+
148+int main(int argc, char **argv)
149+{
150+ const char *device_name;
151+ int ret;
152+ int c;
153+
154+ while ((c = getopt(argc, argv, "n:")) != -1) {
155+ switch (c) {
156+ case 'n':
157+ device_name = optarg;
158+ break;
159+ case '?':
160+ print_usage();
161+ return -1;
162+ }
163+ }
164+
165+ if (device_name)
166+ ret = list_device(device_name);
167+ else {
168+ const struct dirent *ent;
169+ DIR *dp;
170+
171+ /* List all GPIO devices one at a time */
172+ dp = opendir("/dev");
173+ if (!dp) {
174+ ret = -errno;
175+ goto error_out;
176+ }
177+
178+ ret = -ENOENT;
179+ while (ent = readdir(dp), ent) {
180+ if (check_prefix(ent->d_name, "gpiochip")) {
181+ ret = list_device(ent->d_name);
182+ if (ret)
183+ break;
184+ }
185+ }
186+
187+ ret = 0;
188+ if (closedir(dp) == -1) {
189+ perror("scanning devices: Failed to close directory");
190+ ret = -errno;
191+ }
192+ }
193+error_out:
194+ return ret;
195+}