Added BASE-T1 AN advertisement register (Registers 7.514, 7.515, and 7.516) and BASE-T1 AN LP Base Page ability register (Registers 7.517, 7.518, and 7.519).
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| @@ -70,6 +70,14 @@ · 69 unmodified lines | ||
| 70 | 70 | #define MDIO_B10L_PMA_CTRL 2294 /* 10BASE-T1L PMA control */ |
| 71 | 71 | #define MDIO_PMA_10T1L_STAT 2295 /* 10BASE-T1L PMA status */ |
| 72 | 72 | #define MDIO_PCS_10T1L_CTRL 2278 /* 10BASE-T1L PCS control */ |
| 73 | +#define MDIO_AN_T1_CTRL 512 /* BASE-T1 AN control */ | |
| 74 | +#define MDIO_AN_T1_STAT 513 /* BASE-T1 AN status */ | |
| 75 | +#define MDIO_AN_T1_ADV_L 514 /* BASE-T1 AN advertisement register [15:0] */ | |
| 76 | +#define MDIO_AN_T1_ADV_M 515 /* BASE-T1 AN advertisement register [31:16] */ | |
| 77 | +#define MDIO_AN_T1_ADV_H 516 /* BASE-T1 AN advertisement register [47:32] */ | |
| 78 | +#define MDIO_AN_T1_LP_L 517 /* BASE-T1 AN LP Base Page ability register [15:0] */ | |
| 79 | +#define MDIO_AN_T1_LP_M 518 /* BASE-T1 AN LP Base Page ability register [31:16] */ | |
| 80 | +#define MDIO_AN_T1_LP_H 519 /* BASE-T1 AN LP Base Page ability register [47:32] */ | |
| 73 | 81 | |
| 74 | 82 | /* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */ |
| 75 | 83 | #define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */ |
| @@ -293,6 +301,38 @@ · 217 unmodified lines | ||
| 293 | 301 | #define MDIO_PCS_10T1L_CTRL_LB 0x4000 /* Enable PCS level loopback mode */ |
| 294 | 302 | #define MDIO_PCS_10T1L_CTRL_RESET 0x8000 /* PCS reset */ |
| 295 | 303 | |
| 304 | +/* BASE-T1 auto-negotiation advertisement register [15:0] */ | |
| 305 | +#define MDIO_AN_T1_ADV_L_PAUSE_CAP ADVERTISE_PAUSE_CAP | |
| 306 | +#define MDIO_AN_T1_ADV_L_PAUSE_ASYM ADVERTISE_PAUSE_ASYM | |
| 307 | +#define MDIO_AN_T1_ADV_L_FORCE_MS 0x1000 /* Force Master/slave Configuration */ | |
| 308 | +#define MDIO_AN_T1_ADV_L_REMOTE_FAULT ADVERTISE_RFAULT | |
| 309 | +#define MDIO_AN_T1_ADV_L_ACK ADVERTISE_LPACK | |
| 310 | +#define MDIO_AN_T1_ADV_L_NEXT_PAGE_REQ ADVERTISE_NPAGE | |
| 311 | + | |
| 312 | +/* BASE-T1 auto-negotiation advertisement register [31:16] */ | |
| 313 | +#define MDIO_AN_T1_ADV_M_B10L 0x4000 /* device is compatible with 10BASE-T1L */ | |
| 314 | +#define MDIO_AN_T1_ADV_M_MST 0x0010 /* advertise master preference */ | |
| 315 | + | |
| 316 | +/* BASE-T1 auto-negotiation advertisement register [47:32] */ | |
| 317 | +#define MDIO_AN_T1_ADV_H_10L_TX_HI_REQ 0x1000 /* 10BASE-T1L High Level Transmit Request */ | |
| 318 | +#define MDIO_AN_T1_ADV_H_10L_TX_HI 0x2000 /* 10BASE-T1L High Level Transmit Ability */ | |
| 319 | + | |
| 320 | +/* BASE-T1 AN LP Base Page ability register [15:0] */ | |
| 321 | +#define MDIO_AN_T1_LP_L_PAUSE_CAP LPA_PAUSE_CAP | |
| 322 | +#define MDIO_AN_T1_LP_L_PAUSE_ASYM LPA_PAUSE_ASYM | |
| 323 | +#define MDIO_AN_T1_LP_L_FORCE_MS 0x1000 /* LP Force Master/slave Configuration */ | |
| 324 | +#define MDIO_AN_T1_LP_L_REMOTE_FAULT LPA_RFAULT | |
| 325 | +#define MDIO_AN_T1_LP_L_ACK LPA_LPACK | |
| 326 | +#define MDIO_AN_T1_LP_L_NEXT_PAGE_REQ LPA_NPAGE | |
| 327 | + | |
| 328 | +/* BASE-T1 AN LP Base Page ability register [31:16] */ | |
| 329 | +#define MDIO_AN_T1_LP_M_MST 0x0010 /* LP master preference */ | |
| 330 | +#define MDIO_AN_T1_LP_M_B10L 0x4000 /* LP is compatible with 10BASE-T1L */ | |
| 331 | + | |
| 332 | +/* BASE-T1 AN LP Base Page ability register [47:32] */ | |
| 333 | +#define MDIO_AN_T1_LP_H_10L_TX_HI_REQ 0x1000 /* 10BASE-T1L High Level LP Transmit Request */ | |
| 334 | +#define MDIO_AN_T1_LP_H_10L_TX_HI 0x2000 /* 10BASE-T1L High Level LP Transmit Ability */ | |
| 335 | + | |
| 296 | 336 | /* EEE Supported/Advertisement/LP Advertisement registers. |
| 297 | 337 | * |
| 298 | 338 | * EEE capability Register (3.20), Advertisement (7.60) and |