Add the constants for 2.5G fast retrain capability in 10G AN control register, fast retrain status and control register and THP bypass register into mdio.h.
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| @@ -53,12 +53,14 @@ · 52 unmodified lines | |||
| 53 | #define MDIO_AN_EEE_LPABLE 61 /* EEE link partner ability */ | 53 | #define MDIO_AN_EEE_LPABLE 61 /* EEE link partner ability */ |
| 54 | #define MDIO_AN_EEE_ADV2 62 /* EEE advertisement 2 */ | 54 | #define MDIO_AN_EEE_ADV2 62 /* EEE advertisement 2 */ |
| 55 | #define MDIO_AN_EEE_LPABLE2 63 /* EEE link partner ability 2 */ | 55 | #define MDIO_AN_EEE_LPABLE2 63 /* EEE link partner ability 2 */ |
| 56 | #define MDIO_AN_CTRL2 64 /* AN THP bypass request control */ | ||
| 56 | 57 | ||
| 57 | /* Media-dependent registers. */ | 58 | /* Media-dependent registers. */ |
| 58 | #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ | 59 | #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ |
| 59 | #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ | 60 | #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ |
| 60 | #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. | 61 | #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. |
| 61 | * Lanes B-D are numbered 134-136. */ | 62 | * Lanes B-D are numbered 134-136. */ |
| 63 | #define MDIO_PMA_10GBR_FSRT_CSR 147 /* 10GBASE-R fast retrain status and control */ | ||
| 62 | #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */ | 64 | #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */ |
| 63 | #define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */ | 65 | #define MDIO_PCS_10GBX_STAT1 24 /* 10GBASE-X PCS status 1 */ |
| 64 | #define MDIO_PCS_10GBRT_STAT1 32 /* 10GBASE-R/-T PCS status 1 */ | 66 | #define MDIO_PCS_10GBRT_STAT1 32 /* 10GBASE-R/-T PCS status 1 */ |
| @@ -239,6 +241,9 @@ · 174 unmodified lines | |||
| 239 | #define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 /* FEC ability */ | 241 | #define MDIO_PMA_10GBR_FECABLE_ABLE 0x0001 /* FEC ability */ |
| 240 | #define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 /* FEC error indic. ability */ | 242 | #define MDIO_PMA_10GBR_FECABLE_ERRABLE 0x0002 /* FEC error indic. ability */ |
| 241 | 243 | ||
| 244 | /* PMA 10GBASE-R Fast Retrain status and control register. */ | ||
| 245 | #define MDIO_PMA_10GBR_FSRT_ENABLE 0x0001 /* Fast retrain enable */ | ||
| 246 | |||
| 242 | /* PCS 10GBASE-R/-T status register 1. */ | 247 | /* PCS 10GBASE-R/-T status register 1. */ |
| 243 | #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 /* Block lock attained */ | 248 | #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 /* Block lock attained */ |
| 244 | 249 | ||
| @@ -247,6 +252,7 @@ · 2 unmodified lines | |||
| 247 | #define MDIO_PCS_10GBRT_STAT2_BER 0x3f00 | 252 | #define MDIO_PCS_10GBRT_STAT2_BER 0x3f00 |
| 248 | 253 | ||
| 249 | /* AN 10GBASE-T control register. */ | 254 | /* AN 10GBASE-T control register. */ |
| 255 | #define MDIO_AN_10GBT_CTRL_ADVFSRT2_5G 0x0020 /* Advertise 2.5GBASE-T fast retrain */ | ||
| 250 | #define MDIO_AN_10GBT_CTRL_ADV2_5G 0x0080 /* Advertise 2.5GBASE-T */ | 256 | #define MDIO_AN_10GBT_CTRL_ADV2_5G 0x0080 /* Advertise 2.5GBASE-T */ |
| 251 | #define MDIO_AN_10GBT_CTRL_ADV5G 0x0100 /* Advertise 5GBASE-T */ | 257 | #define MDIO_AN_10GBT_CTRL_ADV5G 0x0100 /* Advertise 5GBASE-T */ |
| 252 | #define MDIO_AN_10GBT_CTRL_ADV10G 0x1000 /* Advertise 10GBASE-T */ | 258 | #define MDIO_AN_10GBT_CTRL_ADV10G 0x1000 /* Advertise 10GBASE-T */ |
| @@ -289,6 +295,9 @@ · 36 unmodified lines | |||
| 289 | #define MDIO_EEE_2_5GT 0x0001 /* 2.5GT EEE cap */ | 295 | #define MDIO_EEE_2_5GT 0x0001 /* 2.5GT EEE cap */ |
| 290 | #define MDIO_EEE_5GT 0x0002 /* 5GT EEE cap */ | 296 | #define MDIO_EEE_5GT 0x0002 /* 5GT EEE cap */ |
| 291 | 297 | ||
| 298 | /* AN MultiGBASE-T AN control 2 */ | ||
| 299 | #define MDIO_AN_THP_BP2_5GT 0x0008 /* 2.5GT THP bypass request */ | ||
| 300 | |||
| 292 | /* 2.5G/5G Extended abilities register. */ | 301 | /* 2.5G/5G Extended abilities register. */ |
| 293 | #define MDIO_PMA_NG_EXTABLE_2_5GBT 0x0001 /* 2.5GBASET ability */ | 302 | #define MDIO_PMA_NG_EXTABLE_2_5GBT 0x0001 /* 2.5GBASET ability */ |
| 294 | #define MDIO_PMA_NG_EXTABLE_5GBT 0x0002 /* 5GBASET ability */ | 303 | #define MDIO_PMA_NG_EXTABLE_5GBT 0x0002 /* 5GBASET ability */ |