This patch introduces x86 perf scheduler code helper functions. We need this to later add more complex functionality to support overlapping counter constraints (next patch). The algorithm is modified so that the range of weight values is now generated from the constraints. There shouldn't be other functional changes. With the helper functions the scheduler is controlled. There are functions to initialize, traverse the event list, find unused counters etc. The scheduler keeps its own state. V3: * Added macro for_each_set_bit_cont(). * Changed functions interfaces of perf_sched_find_counter() and perf_sched_next_event() to use bool as return value. * Added some comments to make code better understandable. V4: * Fix broken event assignment if weight of the first event is not wmin (perf_sched_init()).
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| @@ -22,8 +22,14 @@ extern unsigned long __sw_hweight64(__u64 w); · 21 unmodified lines | ||
| 22 | 22 | #include <asm/bitops.h> |
| 23 | 23 | |
| 24 | 24 | #define for_each_set_bit(bit, addr, size) \ |
| 25 | − for ((bit) = find_first_bit((addr), (size)); \ | |
| 26 | − (bit) < (size); \ | |
| 25 | + for ((bit) = find_first_bit((addr), (size)); \ | |
| 26 | + (bit) < (size); \ | |
| 27 | + (bit) = find_next_bit((addr), (size), (bit) + 1)) | |
| 28 | + | |
| 29 | +/* same as for_each_set_bit() but use bit as value to start with */ | |
| 30 | +#define for_each_set_bit_cont(bit, addr, size) \ | |
| 31 | + for ((bit) = find_next_bit((addr), (size), (bit)); \ | |
| 32 | + (bit) < (size); \ | |
| 27 | 33 | (bit) = find_next_bit((addr), (size), (bit) + 1)) |
| 28 | 34 | |
| 29 | 35 | static __inline__ int get_bitmask_order(unsigned int count) |