lael-labs/linux

.clang-format+14−4

   - 'for_each_card_auxs'
   - 'for_each_card_auxs_safe'
   - 'for_each_card_components'
+  - 'for_each_card_dapms'
   - 'for_each_card_pre_auxs'
   - 'for_each_card_prelinks'
   - 'for_each_card_rtds'
   - 'for_each_card_rtds_safe'
+  - 'for_each_card_widgets'
+  - 'for_each_card_widgets_safe'
   - 'for_each_cgroup_storage_type'
   - 'for_each_child_of_node'
   - 'for_each_clear_bit'
   - 'for_each_cpu_and'
   - 'for_each_cpu_not'
   - 'for_each_cpu_wrap'
+  - 'for_each_dapm_widgets'
   - 'for_each_dev_addr'
   - 'for_each_dev_scope'
   - 'for_each_displayid_db'
   - 'for_each_dpcm_fe'
   - 'for_each_drhd_unit'
   - 'for_each_dss_dev'
-  - 'for_each_efi_handle'
   - 'for_each_efi_memory_desc'
   - 'for_each_efi_memory_desc_in_map'
   - 'for_each_element'
   - 'for_each_ip_tunnel_rcu'
   - 'for_each_irq_nr'
   - 'for_each_link_codecs'
+  - 'for_each_link_cpus'
   - 'for_each_link_platforms'
   - 'for_each_lru'
   - 'for_each_matching_node'
   - 'for_each_pci_bridge'
   - 'for_each_pci_dev'
   - 'for_each_pci_msi_entry'
+  - 'for_each_pcm_streams'
   - 'for_each_populated_zone'
   - 'for_each_possible_cpu'
   - 'for_each_present_cpu'
   - 'for_each_property_of_node'
   - 'for_each_registered_fb'
   - 'for_each_reserved_mem_region'
-  - 'for_each_rtd_codec_dai'
+  - 'for_each_rtd_codec_dais'
-  - 'for_each_rtd_codec_dai_rollback'
+  - 'for_each_rtd_codec_dais_rollback'
   - 'for_each_rtd_components'
+  - 'for_each_rtd_cpu_dais'
+  - 'for_each_rtd_cpu_dais_rollback'
+  - 'for_each_rtd_dais'
   - 'for_each_set_bit'
   - 'for_each_set_bit_from'
   - 'for_each_set_clump8'
   - 'klp_for_each_object'
   - 'klp_for_each_object_safe'
   - 'klp_for_each_object_static'
+  - 'kunit_suite_for_each_test_case'
   - 'kvm_for_each_memslot'
   - 'kvm_for_each_vcpu'
   - 'list_for_each'
   - 'of_property_for_each_string'
   - 'of_property_for_each_u32'
   - 'pci_bus_for_each_resource'
+  - 'pcm_for_each_format'
   - 'ping_portaddr_for_each_entry'
   - 'plist_for_each'
   - 'plist_for_each_continue'
 MacroBlockBegin: ''
 MacroBlockEnd: ''
 MaxEmptyLinesToKeep: 1
-NamespaceIndentation: Inner
+NamespaceIndentation: None
 #ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
 ObjCBlockIndentWidth: 8
 ObjCSpaceAfterProperty: true

Documentation/admin-guide/device-mapper/dm-integrity.rst+9−6

@@ -182,12 +182,15 @@ fix_padding · 181 unmodified lines
182	space-efficient. If this option is not present, large padding is	182	space-efficient. If this option is not present, large padding is
183	used - that is for compatibility with older kernels.	183	used - that is for compatibility with older kernels.
184		184
185		185	allow_discards
186	The journal mode (D/J), buffer_sectors, journal_watermark, commit_time can	186	Allow block discard requests (a.k.a. TRIM) for the integrity device.
187	be changed when reloading the target (load an inactive table and swap the	187	Discards are only allowed to devices using internal hash.
188	tables with suspend and resume). The other arguments should not be changed	188
189	when reloading the target because the layout of disk data depend on them	189	The journal mode (D/J), buffer_sectors, journal_watermark, commit_time and
190	and the reloaded target would be non-functional.	190	allow_discards can be changed when reloading the target (load an inactive
		191	table and swap the tables with suspend and resume). The other arguments
		192	should not be changed when reloading the target because the layout of disk
		193	data depend on them and the reloaded target would be non-functional.
191		194
192		195
193	The layout of the formatted block device:	196	The layout of the formatted block device:

Documentation/admin-guide/kernel-parameters.txt+1−2

@@ -5206,8 +5206,7 @@ · 5205 unmodified lines
5206		5206
5207	usbcore.old_scheme_first=	5207	usbcore.old_scheme_first=
5208	[USB] Start with the old device initialization	5208	[USB] Start with the old device initialization
5209	scheme, applies only to low and full-speed devices	5209	scheme (default 0 = off).
5210	(default 0 = off).
5211		5210
5212	usbcore.usbfs_memory_mb=	5211	usbcore.usbfs_memory_mb=
5213	[USB] Memory limit (in MB) for buffers allocated by	5212	[USB] Memory limit (in MB) for buffers allocated by

Documentation/arm64/amu.rst+26−21

@@ -23,13 +23,14 @@ optional external memory-mapped interface. · 22 unmodified lines
23		23
24	Version 1 of the Activity Monitors architecture implements a counter group	24	Version 1 of the Activity Monitors architecture implements a counter group
25	of four fixed and architecturally defined 64-bit event counters.	25	of four fixed and architecturally defined 64-bit event counters.
26	- CPU cycle counter: increments at the frequency of the CPU.	26
27	- Constant counter: increments at the fixed frequency of the system	27	- CPU cycle counter: increments at the frequency of the CPU.
28	clock.	28	- Constant counter: increments at the fixed frequency of the system
29	- Instructions retired: increments with every architecturally executed	29	clock.
30	instruction.	30	- Instructions retired: increments with every architecturally executed
31	- Memory stall cycles: counts instruction dispatch stall cycles caused by	31	instruction.
32	misses in the last level cache within the clock domain.	32	- Memory stall cycles: counts instruction dispatch stall cycles caused by
		33	misses in the last level cache within the clock domain.
33		34
34	When in WFI or WFE these counters do not increment.	35	When in WFI or WFE these counters do not increment.
35		36
@@ -57,11 +58,12 @@ counters, only the presence of the extension. · 21 unmodified lines
57		58
58	Firmware (code running at higher exception levels, e.g. arm-tf) support is	59	Firmware (code running at higher exception levels, e.g. arm-tf) support is
59	needed to:	60	needed to:
60	- Enable access for lower exception levels (EL2 and EL1) to the AMU	61
61	registers.	62	- Enable access for lower exception levels (EL2 and EL1) to the AMU
62	- Enable the counters. If not enabled these will read as 0.	63	registers.
63	- Save/restore the counters before/after the CPU is being put/brought up	64	- Enable the counters. If not enabled these will read as 0.
64	from the 'off' power state.	65	- Save/restore the counters before/after the CPU is being put/brought up
		66	from the 'off' power state.
65		67
66	When using kernels that have this feature enabled but boot with broken	68	When using kernels that have this feature enabled but boot with broken
67	firmware the user may experience panics or lockups when accessing the	69	firmware the user may experience panics or lockups when accessing the
@@ -78,10 +80,11 @@ are not trapped in EL2/EL3. · 10 unmodified lines
78		80
79	The fixed counters of AMUv1 are accessible though the following system	81	The fixed counters of AMUv1 are accessible though the following system
80	register definitions:	82	register definitions:
81	- SYS_AMEVCNTR0_CORE_EL0	83
82	- SYS_AMEVCNTR0_CONST_EL0	84	- SYS_AMEVCNTR0_CORE_EL0
83	- SYS_AMEVCNTR0_INST_RET_EL0	85	- SYS_AMEVCNTR0_CONST_EL0
84	- SYS_AMEVCNTR0_MEM_STALL_EL0	86	- SYS_AMEVCNTR0_INST_RET_EL0
		87	- SYS_AMEVCNTR0_MEM_STALL_EL0
85		88
86	Auxiliary platform specific counters can be accessed using	89	Auxiliary platform specific counters can be accessed using
87	SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15.	90	SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15.
@@ -93,9 +96,10 @@ Userspace access · 5 unmodified lines
93	----------------	96	----------------
94		97
95	Currently, access from userspace to the AMU registers is disabled due to:	98	Currently, access from userspace to the AMU registers is disabled due to:
96	- Security reasons: they might expose information about code executed in	99
97	secure mode.	100	- Security reasons: they might expose information about code executed in
98	- Purpose: AMU counters are intended for system management use.	101	secure mode.
		102	- Purpose: AMU counters are intended for system management use.
99		103
100	Also, the presence of the feature is not visible to userspace.	104	Also, the presence of the feature is not visible to userspace.
101		105
@@ -105,8 +109,9 @@ Virtualization · 3 unmodified lines
105		109
106	Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM	110	Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM
107	guest side is disabled due to:	111	guest side is disabled due to:
108	- Security reasons: they might expose information about code executed	112
109	by other guests or the host.	113	- Security reasons: they might expose information about code executed
		114	by other guests or the host.
110		115
111	Any attempt to access the AMU registers will result in an UNDEFINED	116	Any attempt to access the AMU registers will result in an UNDEFINED
112	exception being injected into the guest.	117	exception being injected into the guest.

Documentation/devicetree/bindings/Makefile+12−9

 DT_DOC_CHECKER ?= dt-doc-validate
 DT_EXTRACT_EX ?= dt-extract-example
 DT_MK_SCHEMA ?= dt-mk-schema
+DT_MK_SCHEMA_USERONLY_FLAG := $(if $(DT_SCHEMA_FILES), -u)
 quiet_cmd_chk_binding = CHKDT   $(patsubst $(srctree)/%,%,$<)
       cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \
 # Use full schemas when checking %.example.dts
 DT_TMP_SCHEMA := $(obj)/processed-schema-examples.yaml
+find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \
+		-name 'processed-schema*' ! \
+		-name '*.example.dt.yaml' \)
 quiet_cmd_mk_schema = SCHEMA  $@
-      cmd_mk_schema = $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) -o $@ $(real-prereqs)
+      cmd_mk_schema = rm -f $@ ; \
+                      $(if $(DT_MK_SCHEMA_FLAGS), \
+                           echo $(real-prereqs), \
+                           $(find_cmd)) | \
+                      xargs $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) >> $@
-DT_DOCS = $(addprefix $(src)/, \
+DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||')
-	$(shell \
-	cd $(srctree)/$(src) && \
-	find * \( -name '*.yaml' ! \
-		-name 'processed-schema*' ! \
-		-name '*.example.dt.yaml' \) \
-	))
 DT_SCHEMA_FILES ?= $(DT_DOCS)
 $(obj)/processed-schema-examples.yaml: $(DT_DOCS) FORCE
 	$(call if_changed,mk_schema)
-$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := -u
+$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := $(DT_MK_SCHEMA_USERONLY_FLAG)
 $(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) FORCE
 	$(call if_changed,mk_schema)

Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml+0−1

@@ -37,7 +37,6 @@ examples: · 36 unmodified lines
37	dsi {	37	dsi {
38	#address-cells = <1>;	38	#address-cells = <1>;
39	#size-cells = <0>;	39	#size-cells = <0>;
40	reg = <0xff450000 0x1000>;
41		40
42	panel@0 {	41	panel@0 {
43	compatible = "leadtek,ltk500hd1829";	42	compatible = "leadtek,ltk500hd1829";

Documentation/devicetree/bindings/display/panel/lvds.yaml+9−1

@@ -96,12 +96,20 @@ properties: · 95 unmodified lines
96	If set, reverse the bit order described in the data mappings below on all	96	If set, reverse the bit order described in the data mappings below on all
97	data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6.	97	data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6.
98		98
		99	port: true
		100	ports: true
		101
99	required:	102	required:
100	- compatible	103	- compatible
101	- data-mapping	104	- data-mapping
102	- width-mm	105	- width-mm
103	- height-mm	106	- height-mm
104	- panel-timing	107	- panel-timing
105	- port	108
		109	oneOf:
		110	- required:
		111	- port
		112	- required:
		113	- ports
106		114
107	...	115	...

Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml+0−1

@@ -37,7 +37,6 @@ examples: · 36 unmodified lines
37	dsi {	37	dsi {
38	#address-cells = <1>;	38	#address-cells = <1>;
39	#size-cells = <0>;	39	#size-cells = <0>;
40	reg = <0xff450000 0x1000>;
41		40
42	panel@0 {	41	panel@0 {
43	compatible = "xinpeng,xpp055c272";	42	compatible = "xinpeng,xpp055c272";

Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml+3−4

     const: socionext,uniphier-xdmac
   reg:
-    items:
+    maxItems: 1
-      - description: XDMAC base register region (offset and length)
-      - description: XDMAC extension register region (offset and length)
   interrupts:
     maxItems: 1
   - reg
   - interrupts
   - "#dma-cells"
+  - dma-channels
 examples:
   - |
     xdmac: dma-controller@5fc10000 {
         compatible = "socionext,uniphier-xdmac";
-        reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+        reg = <0x5fc10000 0x5300>;
         interrupts = <0 188 4>;
         #dma-cells = <2>;
         dma-channels = <16>;

Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml+1−1

@@ -1,7 +1,7 @@
1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2	%YAML 1.2	2	%YAML 1.2
3	---	3	---
4	$id: "http://devicetree.org/schemas/bindings/iio/adc/st,stm32-adc.yaml#"	4	$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
5	$schema: "http://devicetree.org/meta-schemas/core.yaml#"	5	$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6		6
7	title: STMicroelectronics STM32 ADC bindings	7	title: STMicroelectronics STM32 ADC bindings

Documentation/devicetree/bindings/mfd/st,stpmic1.yaml+0−2

@@ -259,8 +259,6 @@ properties: · 258 unmodified lines
259		259
260	additionalProperties: false	260	additionalProperties: false
261		261
262	additionalProperties: false
263
264	additionalProperties: false	262	additionalProperties: false
265		263
266	required:	264	required:

Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml+3−3

@@ -97,7 +97,7 @@ then: · 96 unmodified lines
97	- $ref: /schemas/types.yaml#/definitions/uint32	97	- $ref: /schemas/types.yaml#/definitions/uint32
98	- minimum: 0	98	- minimum: 0
99	maximum: 63	99	maximum: 63
100	default: 0	100	default: 32
101		101
102	qcom,charge-ctrl-value:	102	qcom,charge-ctrl-value:
103	description:	103	description:
@@ -130,7 +130,7 @@ then: · 26 unmodified lines
130	- $ref: /schemas/types.yaml#/definitions/uint32	130	- $ref: /schemas/types.yaml#/definitions/uint32
131	- minimum: 0	131	- minimum: 0
132	maximum: 3	132	maximum: 3
133	default: 2	133	default: 0
134		134
135	qcom,preemphasis-width:	135	qcom,preemphasis-width:
136	description:	136	description:
@@ -152,7 +152,7 @@ then: · 15 unmodified lines
152	- $ref: /schemas/types.yaml#/definitions/uint32	152	- $ref: /schemas/types.yaml#/definitions/uint32
153	- minimum: 0	153	- minimum: 0
154	maximum: 3	154	maximum: 3
155	default: 0	155	default: 1
156		156
157	required:	157	required:
158	- compatible	158	- compatible

Documentation/devicetree/bindings/regulator/mps,mp5416.yaml+0−1

@@ -37,7 +37,6 @@ properties: · 36 unmodified lines
37	type: object	37	type: object
38		38
39	additionalProperties: false	39	additionalProperties: false
40	additionalProperties: false
41		40
42	required:	41	required:
43	- compatible	42	- compatible

Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml+2−1

@@ -75,7 +75,8 @@ properties: · 74 unmodified lines
75	description: \|	75	description: \|
76	disables over voltage protection of this buck	76	disables over voltage protection of this buck
77		77
78	additionalProperties: false	78	unevaluatedProperties: false
		79
79	additionalProperties: false	80	additionalProperties: false
80		81
81	required:	82	required:

Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml+5−1

@@ -35,6 +35,8 @@ patternProperties: · 34 unmodified lines
35	description:	35	description:
36	should be "ldo1", ..., "ldo7"	36	should be "ldo1", ..., "ldo7"
37		37
		38	unevaluatedProperties: false
		39
38	"^BUCK[1-7]$":	40	"^BUCK[1-7]$":
39	type: object	41	type: object
40	allOf:	42	allOf:
@@ -103,5 +105,7 @@ patternProperties: · 62 unmodified lines
103		105
104	required:	106	required:
105	- regulator-name	107	- regulator-name
106	additionalProperties: false	108
		109	unevaluatedProperties: false
		110
107	additionalProperties: false	111	additionalProperties: false

Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml+5−1

@@ -41,6 +41,8 @@ patternProperties: · 40 unmodified lines
41	description:	41	description:
42	should be "ldo1", ..., "ldo7"	42	should be "ldo1", ..., "ldo7"
43		43
		44	unevaluatedProperties: false
		45
44	"^BUCK[1-8]$":	46	"^BUCK[1-8]$":
45	type: object	47	type: object
46	allOf:	48	allOf:
@@ -99,5 +101,7 @@ patternProperties: · 52 unmodified lines
99		101
100	required:	102	required:
101	- regulator-name	103	- regulator-name
102	additionalProperties: false	104
		105	unevaluatedProperties: false
		106
103	additionalProperties: false	107	additionalProperties: false

Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml+5−1

@@ -40,6 +40,8 @@ patternProperties: · 39 unmodified lines
40	description:	40	description:
41	should be "ldo1", ..., "ldo6"	41	should be "ldo1", ..., "ldo6"
42		42
		43	unevaluatedProperties: false
		44
43	"^BUCK[1-6]$":	45	"^BUCK[1-6]$":
44	type: object	46	type: object
45	allOf:	47	allOf:
@@ -93,5 +95,7 @@ patternProperties: · 47 unmodified lines
93		95
94	required:	96	required:
95	- regulator-name	97	- regulator-name
96	additionalProperties: false	98
		99	unevaluatedProperties: false
		100
97	additionalProperties: false	101	additionalProperties: false

Documentation/devicetree/bindings/sound/rockchip-i2s.yaml+3−0

@@ -56,6 +56,9 @@ properties: · 55 unmodified lines
56	- const: tx	56	- const: tx
57	- const: rx	57	- const: rx
58		58
		59	power-domains:
		60	maxItems: 1
		61
59	rockchip,capture-channels:	62	rockchip,capture-channels:
60	allOf:	63	allOf:
61	- $ref: /schemas/types.yaml#/definitions/uint32	64	- $ref: /schemas/types.yaml#/definitions/uint32

Documentation/devicetree/bindings/sound/rockchip-spdif.txt+0−45

@@ -1,45 +0,0 @@
1	* Rockchip SPDIF transceiver
2
3	The S/PDIF audio block is a stereo transceiver that allows the
4	processor to receive and transmit digital audio via an coaxial cable or
5	a fibre cable.
6
7	Required properties:
8
9	- compatible: should be one of the following:
10	- "rockchip,rk3066-spdif"
11	- "rockchip,rk3188-spdif"
12	- "rockchip,rk3228-spdif"
13	- "rockchip,rk3288-spdif"
14	- "rockchip,rk3328-spdif"
15	- "rockchip,rk3366-spdif"
16	- "rockchip,rk3368-spdif"
17	- "rockchip,rk3399-spdif"
18	- reg: physical base address of the controller and length of memory mapped
19	region.
20	- interrupts: should contain the SPDIF interrupt.
21	- dmas: DMA specifiers for tx dma. See the DMA client binding,
22	Documentation/devicetree/bindings/dma/dma.txt
23	- dma-names: should be "tx"
24	- clocks: a list of phandle + clock-specifier pairs, one for each entry
25	in clock-names.
26	- clock-names: should contain following:
27	- "hclk": clock for SPDIF controller
28	- "mclk" : clock for SPDIF bus
29
30	Required properties on RK3288:
31	- rockchip,grf: the phandle of the syscon node for the general register
32	file (GRF)
33
34	Example for the rk3188 SPDIF controller:
35
36	spdif: spdif@1011e000 {
37	compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
38	reg = <0x1011e000 0x2000>;
39	interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
40	dmas = <&dmac1_s 8>;
41	dma-names = "tx";
42	clock-names = "hclk", "mclk";
43	clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
44	#sound-dai-cells = <0>;
45	};

Documentation/devicetree/bindings/sound/rockchip-spdif.yaml+101−0

@@ -0,0 +1,101 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Rockchip SPDIF transceiver
	8
	9	description:
	10	The S/PDIF audio block is a stereo transceiver that allows the
	11	processor to receive and transmit digital audio via a coaxial or
	12	fibre cable.
	13
	14	maintainers:
	15	- Heiko Stuebner <heiko@sntech.de>
	16
	17	properties:
	18	compatible:
	19	oneOf:
	20	- const: rockchip,rk3066-spdif
	21	- const: rockchip,rk3228-spdif
	22	- const: rockchip,rk3328-spdif
	23	- const: rockchip,rk3366-spdif
	24	- const: rockchip,rk3368-spdif
	25	- const: rockchip,rk3399-spdif
	26	- items:
	27	- enum:
	28	- rockchip,rk3188-spdif
	29	- rockchip,rk3288-spdif
	30	- const: rockchip,rk3066-spdif
	31
	32	reg:
	33	maxItems: 1
	34
	35	interrupts:
	36	maxItems: 1
	37
	38	clocks:
	39	items:
	40	- description: clock for SPDIF bus
	41	- description: clock for SPDIF controller
	42
	43	clock-names:
	44	items:
	45	- const: mclk
	46	- const: hclk
	47
	48	dmas:
	49	maxItems: 1
	50
	51	dma-names:
	52	const: tx
	53
	54	power-domains:
	55	maxItems: 1
	56
	57	rockchip,grf:
	58	$ref: /schemas/types.yaml#/definitions/phandle
	59	description:
	60	The phandle of the syscon node for the GRF register.
	61	Required property on RK3288.
	62
	63	"#sound-dai-cells":
	64	const: 0
	65
	66	required:
	67	- compatible
	68	- reg
	69	- interrupts
	70	- clocks
	71	- clock-names
	72	- dmas
	73	- dma-names
	74	- "#sound-dai-cells"
	75
	76	if:
	77	properties:
	78	compatible:
	79	contains:
	80	const: rockchip,rk3288-spdif
	81
	82	then:
	83	required:
	84	- rockchip,grf
	85
	86	additionalProperties: false
	87
	88	examples:
	89	- \|
	90	#include <dt-bindings/clock/rk3188-cru.h>
	91	#include <dt-bindings/interrupt-controller/arm-gic.h>
	92	spdif: spdif@1011e000 {
	93	compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
	94	reg = <0x1011e000 0x2000>;
	95	interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
	96	clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
	97	clock-names = "mclk", "hclk";
	98	dmas = <&dmac1_s 8>;
	99	dma-names = "tx";
	100	#sound-dai-cells = <0>;
	101	};

Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml+1−0

@@ -18,6 +18,7 @@ properties: · 17 unmodified lines
18	- renesas,r8a774c0-usb3-peri # RZ/G2E	18	- renesas,r8a774c0-usb3-peri # RZ/G2E
19	- renesas,r8a7795-usb3-peri # R-Car H3	19	- renesas,r8a7795-usb3-peri # R-Car H3
20	- renesas,r8a7796-usb3-peri # R-Car M3-W	20	- renesas,r8a7796-usb3-peri # R-Car M3-W
		21	- renesas,r8a77961-usb3-peri # R-Car M3-W+
21	- renesas,r8a77965-usb3-peri # R-Car M3-N	22	- renesas,r8a77965-usb3-peri # R-Car M3-N
22	- renesas,r8a77990-usb3-peri # R-Car E3	23	- renesas,r8a77990-usb3-peri # R-Car E3
23	- const: renesas,rcar-gen3-usb3-peri	24	- const: renesas,rcar-gen3-usb3-peri

Documentation/devicetree/bindings/usb/renesas,usbhs.yaml+1−0

@@ -40,6 +40,7 @@ properties: · 39 unmodified lines
40	- renesas,usbhs-r8a774c0 # RZ/G2E	40	- renesas,usbhs-r8a774c0 # RZ/G2E
41	- renesas,usbhs-r8a7795 # R-Car H3	41	- renesas,usbhs-r8a7795 # R-Car H3
42	- renesas,usbhs-r8a7796 # R-Car M3-W	42	- renesas,usbhs-r8a7796 # R-Car M3-W
		43	- renesas,usbhs-r8a77961 # R-Car M3-W+
43	- renesas,usbhs-r8a77965 # R-Car M3-N	44	- renesas,usbhs-r8a77965 # R-Car M3-N
44	- renesas,usbhs-r8a77990 # R-Car E3	45	- renesas,usbhs-r8a77990 # R-Car E3
45	- renesas,usbhs-r8a77995 # R-Car D3	46	- renesas,usbhs-r8a77995 # R-Car D3

Documentation/devicetree/bindings/usb/usb-xhci.txt+2−1

     - "renesas,xhci-r8a7791" for r8a7791 SoC
     - "renesas,xhci-r8a7793" for r8a7793 SoC
     - "renesas,xhci-r8a7795" for r8a7795 SoC
-    - "renesas,xhci-r8a7796" for r8a7796 SoC
+    - "renesas,xhci-r8a7796" for r8a77960 SoC
+    - "renesas,xhci-r8a77961" for r8a77961 SoC
     - "renesas,xhci-r8a77965" for r8a77965 SoC
     - "renesas,xhci-r8a77990" for r8a77990 SoC
     - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible

Documentation/filesystems/debugfs.rst+2−2

@@ -79,8 +79,8 @@ created with any of:: · 78 unmodified lines
79	struct dentry parent, u8 value);	79	struct dentry parent, u8 value);
80	void debugfs_create_u16(const char *name, umode_t mode,	80	void debugfs_create_u16(const char *name, umode_t mode,
81	struct dentry parent, u16 value);	81	struct dentry parent, u16 value);
82	struct dentry debugfs_create_u32(const char name, umode_t mode,	82	void debugfs_create_u32(const char *name, umode_t mode,
83	struct dentry parent, u32 value);	83	struct dentry parent, u32 value);
84	void debugfs_create_u64(const char *name, umode_t mode,	84	void debugfs_create_u64(const char *name, umode_t mode,
85	struct dentry parent, u64 value);	85	struct dentry parent, u64 value);
86		86

Documentation/kbuild/makefiles.rst+2−1

@@ -1241,7 +1241,8 @@ When kbuild executes, the following steps are followed (roughly): · 1240 unmodified lines
1241	will be displayed with "make KBUILD_VERBOSE=0".	1241	will be displayed with "make KBUILD_VERBOSE=0".
1242		1242
1243		1243
1244	--- 6.9 Preprocessing linker scripts	1244	6.9 Preprocessing linker scripts
		1245	--------------------------------
1245		1246
1246	When the vmlinux image is built, the linker script	1247	When the vmlinux image is built, the linker script
1247	arch/$(ARCH)/kernel/vmlinux.lds is used.	1248	arch/$(ARCH)/kernel/vmlinux.lds is used.

Documentation/networking/devlink/ice.rst+2−2

@@ -61,8 +61,8 @@ The ``ice`` driver reports the following versions · 60 unmodified lines
61	- running	61	- running
62	- ICE OS Default Package	62	- ICE OS Default Package
63	- The name of the DDP package that is active in the device. The DDP	63	- The name of the DDP package that is active in the device. The DDP
64	package is loaded by the driver during initialization. Each varation	64	package is loaded by the driver during initialization. Each
65	of DDP package shall have a unique name.	65	variation of the DDP package has a unique name.
66	* - ``fw.app``	66	* - ``fw.app``
67	- running	67	- running
68	- 1.3.1.0	68	- 1.3.1.0

Documentation/networking/ip-sysctl.txt+7−0

@@ -983,6 +983,13 @@ ip_early_demux - BOOLEAN · 982 unmodified lines
983	reduces overall throughput, in such case you should disable it.	983	reduces overall throughput, in such case you should disable it.
984	Default: 1	984	Default: 1
985		985
		986	ping_group_range - 2 INTEGERS
		987	Restrict ICMP_PROTO datagram sockets to users in the group range.
		988	The default is "1 0", meaning, that nobody (not even root) may
		989	create ping sockets. Setting it to "100 100" would grant permissions
		990	to the single group. "0 4294967295" would enable it for the world, "100
		991	4294967295" would enable it for the users, but not daemons.
		992
986	tcp_early_demux - BOOLEAN	993	tcp_early_demux - BOOLEAN
987	Enable early demux for established TCP sockets.	994	Enable early demux for established TCP sockets.
988	Default: 1	995	Default: 1

Documentation/virt/kvm/index.rst+2−0

@@ -28,3 +28,5 @@ KVM · 27 unmodified lines
28	arm/index	28	arm/index
29		29
30	devices/index	30	devices/index
		31
		32	running-nested-guests

Documentation/virt/kvm/running-nested-guests.rst+276−0

@@ -0,0 +1,276 @@
	1	==============================
	2	Running nested guests with KVM
	3	==============================
	4
	5	A nested guest is the ability to run a guest inside another guest (it
	6	can be KVM-based or a different hypervisor). The straightforward
	7	example is a KVM guest that in turn runs on a KVM guest (the rest of
	8	this document is built on this example)::
	9
	10	.----------------. .----------------.
	11	\| \| \| \|
	12	\| L2 \| \| L2 \|
	13	\| (Nested Guest) \| \| (Nested Guest) \|
	14	\| \| \| \|
	15	\|----------------'--'----------------\|
	16	\| \|
	17	\| L1 (Guest Hypervisor) \|
	18	\| KVM (/dev/kvm) \|
	19	\| \|
	20	.------------------------------------------------------.
	21	\| L0 (Host Hypervisor) \|
	22	\| KVM (/dev/kvm) \|
	23	\|------------------------------------------------------\|
	24	\| Hardware (with virtualization extensions) \|
	25	'------------------------------------------------------'
	26
	27	Terminology:
	28
	29	- L0 – level-0; the bare metal host, running KVM
	30
	31	- L1 – level-1 guest; a VM running on L0; also called the "guest
	32	hypervisor", as it itself is capable of running KVM.
	33
	34	- L2 – level-2 guest; a VM running on L1, this is the "nested guest"
	35
	36	.. note:: The above diagram is modelled after the x86 architecture;
	37	s390x, ppc64 and other architectures are likely to have
	38	a different design for nesting.
	39
	40	For example, s390x always has an LPAR (LogicalPARtition)
	41	hypervisor running on bare metal, adding another layer and
	42	resulting in at least four levels in a nested setup — L0 (bare
	43	metal, running the LPAR hypervisor), L1 (host hypervisor), L2
	44	(guest hypervisor), L3 (nested guest).
	45
	46	This document will stick with the three-level terminology (L0,
	47	L1, and L2) for all architectures; and will largely focus on
	48	x86.
	49
	50
	51	Use Cases
	52	---------
	53
	54	There are several scenarios where nested KVM can be useful, to name a
	55	few:
	56
	57	- As a developer, you want to test your software on different operating
	58	systems (OSes). Instead of renting multiple VMs from a Cloud
	59	Provider, using nested KVM lets you rent a large enough "guest
	60	hypervisor" (level-1 guest). This in turn allows you to create
	61	multiple nested guests (level-2 guests), running different OSes, on
	62	which you can develop and test your software.
	63
	64	- Live migration of "guest hypervisors" and their nested guests, for
	65	load balancing, disaster recovery, etc.
	66
	67	- VM image creation tools (e.g. ``virt-install``, etc) often run
	68	their own VM, and users expect these to work inside a VM.
	69
	70	- Some OSes use virtualization internally for security (e.g. to let
	71	applications run safely in isolation).
	72
	73
	74	Enabling "nested" (x86)
	75	-----------------------
	76
	77	From Linux kernel v4.19 onwards, the ``nested`` KVM parameter is enabled
	78	by default for Intel and AMD. (Though your Linux distribution might
	79	override this default.)
	80
	81	In case you are running a Linux kernel older than v4.19, to enable
	82	nesting, set the ``nested`` KVM module parameter to ``Y`` or ``1``. To
	83	persist this setting across reboots, you can add it in a config file, as
	84	shown below:
	85
	86	1. On the bare metal host (L0), list the kernel modules and ensure that
	87	the KVM modules::
	88
	89	$ lsmod \| grep -i kvm
	90	kvm_intel 133627 0
	91	kvm 435079 1 kvm_intel
	92
	93	2. Show information for ``kvm_intel`` module::
	94
	95	$ modinfo kvm_intel \| grep -i nested
	96	parm: nested:bool
	97
	98	3. For the nested KVM configuration to persist across reboots, place the
	99	below in ``/etc/modprobed/kvm_intel.conf`` (create the file if it
	100	doesn't exist)::
	101
	102	$ cat /etc/modprobe.d/kvm_intel.conf
	103	options kvm-intel nested=y
	104
	105	4. Unload and re-load the KVM Intel module::
	106
	107	$ sudo rmmod kvm-intel
	108	$ sudo modprobe kvm-intel
	109
	110	5. Verify if the ``nested`` parameter for KVM is enabled::
	111
	112	$ cat /sys/module/kvm_intel/parameters/nested
	113	Y
	114
	115	For AMD hosts, the process is the same as above, except that the module
	116	name is ``kvm-amd``.
	117
	118
	119	Additional nested-related kernel parameters (x86)
	120	-------------------------------------------------
	121
	122	If your hardware is sufficiently advanced (Intel Haswell processor or
	123	higher, which has newer hardware virt extensions), the following
	124	additional features will also be enabled by default: "Shadow VMCS
	125	(Virtual Machine Control Structure)", APIC Virtualization on your bare
	126	metal host (L0). Parameters for Intel hosts::
	127
	128	$ cat /sys/module/kvm_intel/parameters/enable_shadow_vmcs
	129	Y
	130
	131	$ cat /sys/module/kvm_intel/parameters/enable_apicv
	132	Y
	133
	134	$ cat /sys/module/kvm_intel/parameters/ept
	135	Y
	136
	137	.. note:: If you suspect your L2 (i.e. nested guest) is running slower,
	138	ensure the above are enabled (particularly
	139	``enable_shadow_vmcs`` and ``ept``).
	140
	141
	142	Starting a nested guest (x86)
	143	-----------------------------
	144
	145	Once your bare metal host (L0) is configured for nesting, you should be
	146	able to start an L1 guest with::
	147
	148	$ qemu-kvm -cpu host [...]
	149
	150	The above will pass through the host CPU's capabilities as-is to the
	151	gues); or for better live migration compatibility, use a named CPU
	152	model supported by QEMU. e.g.::
	153
	154	$ qemu-kvm -cpu Haswell-noTSX-IBRS,vmx=on
	155
	156	then the guest hypervisor will subsequently be capable of running a
	157	nested guest with accelerated KVM.
	158
	159
	160	Enabling "nested" (s390x)
	161	-------------------------
	162
	163	1. On the host hypervisor (L0), enable the ``nested`` parameter on
	164	s390x::
	165
	166	$ rmmod kvm
	167	$ modprobe kvm nested=1
	168
	169	.. note:: On s390x, the kernel parameter ``hpage`` is mutually exclusive
	170	with the ``nested`` paramter — i.e. to be able to enable
	171	``nested``, the ``hpage`` parameter must be disabled.
	172
	173	2. The guest hypervisor (L1) must be provided with the ``sie`` CPU
	174	feature — with QEMU, this can be done by using "host passthrough"
	175	(via the command-line ``-cpu host``).
	176
	177	3. Now the KVM module can be loaded in the L1 (guest hypervisor)::
	178
	179	$ modprobe kvm
	180
	181
	182	Live migration with nested KVM
	183	------------------------------
	184
	185	Migrating an L1 guest, with a live nested guest in it, to another
	186	bare metal host, works as of Linux kernel 5.3 and QEMU 4.2.0 for
	187	Intel x86 systems, and even on older versions for s390x.
	188
	189	On AMD systems, once an L1 guest has started an L2 guest, the L1 guest
	190	should no longer be migrated or saved (refer to QEMU documentation on
	191	"savevm"/"loadvm") until the L2 guest shuts down. Attempting to migrate
	192	or save-and-load an L1 guest while an L2 guest is running will result in
	193	undefined behavior. You might see a ``kernel BUG!`` entry in ``dmesg``, a
	194	kernel 'oops', or an outright kernel panic. Such a migrated or loaded L1
	195	guest can no longer be considered stable or secure, and must be restarted.
	196	Migrating an L1 guest merely configured to support nesting, while not
	197	actually running L2 guests, is expected to function normally even on AMD
	198	systems but may fail once guests are started.
	199
	200	Migrating an L2 guest is always expected to succeed, so all the following
	201	scenarios should work even on AMD systems:
	202
	203	- Migrating a nested guest (L2) to another L1 guest on the same bare
	204	metal host.
	205
	206	- Migrating a nested guest (L2) to another L1 guest on a different
	207	bare metal host.
	208
	209	- Migrating a nested guest (L2) to a bare metal host.
	210
	211	Reporting bugs from nested setups
	212	-----------------------------------
	213
	214	Debugging "nested" problems can involve sifting through log files across
	215	L0, L1 and L2; this can result in tedious back-n-forth between the bug
	216	reporter and the bug fixer.
	217
	218	- Mention that you are in a "nested" setup. If you are running any kind
	219	of "nesting" at all, say so. Unfortunately, this needs to be called
	220	out because when reporting bugs, people tend to forget to even
	221	mention that they're using nested virtualization.
	222
	223	- Ensure you are actually running KVM on KVM. Sometimes people do not
	224	have KVM enabled for their guest hypervisor (L1), which results in
	225	them running with pure emulation or what QEMU calls it as "TCG", but
	226	they think they're running nested KVM. Thus confusing "nested Virt"
	227	(which could also mean, QEMU on KVM) with "nested KVM" (KVM on KVM).
	228
	229	Information to collect (generic)
	230	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	231
	232	The following is not an exhaustive list, but a very good starting point:
	233
	234	- Kernel, libvirt, and QEMU version from L0
	235
	236	- Kernel, libvirt and QEMU version from L1
	237
	238	- QEMU command-line of L1 -- when using libvirt, you'll find it here:
	239	``/var/log/libvirt/qemu/instance.log``
	240
	241	- QEMU command-line of L2 -- as above, when using libvirt, get the
	242	complete libvirt-generated QEMU command-line
	243
	244	- ``cat /sys/cpuinfo`` from L0
	245
	246	- ``cat /sys/cpuinfo`` from L1
	247
	248	- ``lscpu`` from L0
	249
	250	- ``lscpu`` from L1
	251
	252	- Full ``dmesg`` output from L0
	253
	254	- Full ``dmesg`` output from L1
	255
	256	x86-specific info to collect
	257	~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	258
	259	Both the below commands, ``x86info`` and ``dmidecode``, should be
	260	available on most Linux distributions with the same name:
	261
	262	- Output of: ``x86info -a`` from L0
	263
	264	- Output of: ``x86info -a`` from L1
	265
	266	- Output of: ``dmidecode`` from L0
	267
	268	- Output of: ``dmidecode`` from L1
	269
	270	s390x-specific info to collect
	271	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	272
	273	Along with the earlier mentioned generic details, the below is
	274	also recommended:
	275
	276	- ``/proc/sysinfo`` from L1; this will also include the info from L0

MAINTAINERS+42−46

@@ -189,7 +189,7 @@ F: drivers/net/hamradio/6pack.c · 188 unmodified lines
189	M: Johannes Berg <johannes@sipsolutions.net>	189	M: Johannes Berg <johannes@sipsolutions.net>
190	L: linux-wireless@vger.kernel.org	190	L: linux-wireless@vger.kernel.org
191	S: Maintained	191	S: Maintained
192	W: http://wireless.kernel.org/	192	W: https://wireless.wiki.kernel.org/
193	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	193	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git
194	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	194	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git
195	F: Documentation/driver-api/80211/cfg80211.rst	195	F: Documentation/driver-api/80211/cfg80211.rst
@@ -505,7 +505,7 @@ F: drivers/hwmon/adm1029.c · 309 unmodified lines
505	ADM8211 WIRELESS DRIVER	505	ADM8211 WIRELESS DRIVER
506	L: linux-wireless@vger.kernel.org	506	L: linux-wireless@vger.kernel.org
507	S: Orphan	507	S: Orphan
508	W: http://wireless.kernel.org/	508	W: https://wireless.wiki.kernel.org/
509	F: drivers/net/wireless/admtek/adm8211.*	509	F: drivers/net/wireless/admtek/adm8211.*
510		510
511	ADP1653 FLASH CONTROLLER DRIVER	511	ADP1653 FLASH CONTROLLER DRIVER
@@ -570,7 +570,7 @@ F: Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml · 58 unmodified lines
570	F: drivers/input/misc/adxl34x.c	570	F: drivers/input/misc/adxl34x.c
571		571
572	ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER	572	ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
573	M: Stefan Popa <stefan.popa@analog.com>	573	M: Michael Hennerich <michael.hennerich@analog.com>
574	S: Supported	574	S: Supported
575	W: http://ez.analog.com/community/linux-device-drivers	575	W: http://ez.analog.com/community/linux-device-drivers
576	F: Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml	576	F: Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml
@@ -922,7 +922,7 @@ F: arch/arm64/boot/dts/amd/amd-seattle-xgbe*.dtsi · 345 unmodified lines
922	F: drivers/net/ethernet/amd/xgbe/	922	F: drivers/net/ethernet/amd/xgbe/
923		923
924	ANALOG DEVICES INC AD5686 DRIVER	924	ANALOG DEVICES INC AD5686 DRIVER
925	M: Stefan Popa <stefan.popa@analog.com>	925	M: Michael Hennerich <Michael.Hennerich@analog.com>
926	L: linux-pm@vger.kernel.org	926	L: linux-pm@vger.kernel.org
927	S: Supported	927	S: Supported
928	W: http://ez.analog.com/community/linux-device-drivers	928	W: http://ez.analog.com/community/linux-device-drivers
@@ -930,7 +930,7 @@ F: drivers/iio/dac/ad5686* · 1 unmodified line
930	F: drivers/iio/dac/ad5696*	930	F: drivers/iio/dac/ad5696*
931		931
932	ANALOG DEVICES INC AD5758 DRIVER	932	ANALOG DEVICES INC AD5758 DRIVER
933	M: Stefan Popa <stefan.popa@analog.com>	933	M: Michael Hennerich <Michael.Hennerich@analog.com>
934	L: linux-iio@vger.kernel.org	934	L: linux-iio@vger.kernel.org
935	S: Supported	935	S: Supported
936	W: http://ez.analog.com/community/linux-device-drivers	936	W: http://ez.analog.com/community/linux-device-drivers
@@ -946,7 +946,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml · 9 unmodified lines
946	F: drivers/iio/adc/ad7091r5.c	946	F: drivers/iio/adc/ad7091r5.c
947		947
948	ANALOG DEVICES INC AD7124 DRIVER	948	ANALOG DEVICES INC AD7124 DRIVER
949	M: Stefan Popa <stefan.popa@analog.com>	949	M: Michael Hennerich <Michael.Hennerich@analog.com>
950	L: linux-iio@vger.kernel.org	950	L: linux-iio@vger.kernel.org
951	S: Supported	951	S: Supported
952	W: http://ez.analog.com/community/linux-device-drivers	952	W: http://ez.analog.com/community/linux-device-drivers
@@ -970,7 +970,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml · 17 unmodified lines
970	F: drivers/iio/adc/ad7292.c	970	F: drivers/iio/adc/ad7292.c
971		971
972	ANALOG DEVICES INC AD7606 DRIVER	972	ANALOG DEVICES INC AD7606 DRIVER
973	M: Stefan Popa <stefan.popa@analog.com>	973	M: Michael Hennerich <Michael.Hennerich@analog.com>
974	M: Beniamin Bia <beniamin.bia@analog.com>	974	M: Beniamin Bia <beniamin.bia@analog.com>
975	L: linux-iio@vger.kernel.org	975	L: linux-iio@vger.kernel.org
976	S: Supported	976	S: Supported
@@ -979,7 +979,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml · 2 unmodified lines
979	F: drivers/iio/adc/ad7606.c	979	F: drivers/iio/adc/ad7606.c
980		980
981	ANALOG DEVICES INC AD7768-1 DRIVER	981	ANALOG DEVICES INC AD7768-1 DRIVER
982	M: Stefan Popa <stefan.popa@analog.com>	982	M: Michael Hennerich <Michael.Hennerich@analog.com>
983	L: linux-iio@vger.kernel.org	983	L: linux-iio@vger.kernel.org
984	S: Supported	984	S: Supported
985	W: http://ez.analog.com/community/linux-device-drivers	985	W: http://ez.analog.com/community/linux-device-drivers
@@ -1040,7 +1040,7 @@ F: Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml · 54 unmodified lines
1040	F: drivers/hwmon/adm1177.c	1040	F: drivers/hwmon/adm1177.c
1041		1041
1042	ANALOG DEVICES INC ADP5061 DRIVER	1042	ANALOG DEVICES INC ADP5061 DRIVER
1043	M: Stefan Popa <stefan.popa@analog.com>	1043	M: Michael Hennerich <Michael.Hennerich@analog.com>
1044	L: linux-pm@vger.kernel.org	1044	L: linux-pm@vger.kernel.org
1045	S: Supported	1045	S: Supported
1046	W: http://ez.analog.com/community/linux-device-drivers	1046	W: http://ez.analog.com/community/linux-device-drivers
@@ -1109,7 +1109,6 @@ F: drivers/iio/amplifiers/hmc425a.c · 62 unmodified lines
1109	ANALOG DEVICES INC IIO DRIVERS	1109	ANALOG DEVICES INC IIO DRIVERS
1110	M: Lars-Peter Clausen <lars@metafoo.de>	1110	M: Lars-Peter Clausen <lars@metafoo.de>
1111	M: Michael Hennerich <Michael.Hennerich@analog.com>	1111	M: Michael Hennerich <Michael.Hennerich@analog.com>
1112	M: Stefan Popa <stefan.popa@analog.com>
1113	S: Supported	1112	S: Supported
1114	W: http://wiki.analog.com/	1113	W: http://wiki.analog.com/
1115	W: http://ez.analog.com/community/linux-device-drivers	1114	W: http://ez.analog.com/community/linux-device-drivers
@@ -2850,14 +2849,14 @@ M: Nick Kossifidis <mickflemm@gmail.com> · 1734 unmodified lines
2850	M: Luis Chamberlain <mcgrof@kernel.org>	2849	M: Luis Chamberlain <mcgrof@kernel.org>
2851	L: linux-wireless@vger.kernel.org	2850	L: linux-wireless@vger.kernel.org
2852	S: Maintained	2851	S: Maintained
2853	W: http://wireless.kernel.org/en/users/Drivers/ath5k	2852	W: https://wireless.wiki.kernel.org/en/users/Drivers/ath5k
2854	F: drivers/net/wireless/ath/ath5k/	2853	F: drivers/net/wireless/ath/ath5k/
2855		2854
2856	ATHEROS ATH6KL WIRELESS DRIVER	2855	ATHEROS ATH6KL WIRELESS DRIVER
2857	M: Kalle Valo <kvalo@codeaurora.org>	2856	M: Kalle Valo <kvalo@codeaurora.org>
2858	L: linux-wireless@vger.kernel.org	2857	L: linux-wireless@vger.kernel.org
2859	S: Supported	2858	S: Supported
2860	W: http://wireless.kernel.org/en/users/Drivers/ath6kl	2859	W: https://wireless.wiki.kernel.org/en/users/Drivers/ath6kl
2861	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git	2860	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
2862	F: drivers/net/wireless/ath/ath6kl/	2861	F: drivers/net/wireless/ath/ath6kl/
2863		2862
@@ -3020,7 +3019,7 @@ B43 WIRELESS DRIVER · 156 unmodified lines
3020	L: linux-wireless@vger.kernel.org	3019	L: linux-wireless@vger.kernel.org
3021	L: b43-dev@lists.infradead.org	3020	L: b43-dev@lists.infradead.org
3022	S: Odd Fixes	3021	S: Odd Fixes
3023	W: http://wireless.kernel.org/en/users/Drivers/b43	3022	W: https://wireless.wiki.kernel.org/en/users/Drivers/b43
3024	F: drivers/net/wireless/broadcom/b43/	3023	F: drivers/net/wireless/broadcom/b43/
3025		3024
3026	B43LEGACY WIRELESS DRIVER	3025	B43LEGACY WIRELESS DRIVER
@@ -3028,7 +3027,7 @@ M: Larry Finger <Larry.Finger@lwfinger.net> · 1 unmodified line
3028	L: linux-wireless@vger.kernel.org	3027	L: linux-wireless@vger.kernel.org
3029	L: b43-dev@lists.infradead.org	3028	L: b43-dev@lists.infradead.org
3030	S: Maintained	3029	S: Maintained
3031	W: http://wireless.kernel.org/en/users/Drivers/b43	3030	W: https://wireless.wiki.kernel.org/en/users/Drivers/b43
3032	F: drivers/net/wireless/broadcom/b43legacy/	3031	F: drivers/net/wireless/broadcom/b43legacy/
3033		3032
3034	BACKLIGHT CLASS/SUBSYSTEM	3033	BACKLIGHT CLASS/SUBSYSTEM
@@ -3658,7 +3657,7 @@ L: linux-btrfs@vger.kernel.org · 623 unmodified lines
3658	S: Maintained	3657	S: Maintained
3659	W: http://btrfs.wiki.kernel.org/	3658	W: http://btrfs.wiki.kernel.org/
3660	Q: http://patchwork.kernel.org/project/linux-btrfs/list/	3659	Q: http://patchwork.kernel.org/project/linux-btrfs/list/
3661	T: git git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs.git	3660	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux.git
3662	F: Documentation/filesystems/btrfs.rst	3661	F: Documentation/filesystems/btrfs.rst
3663	F: fs/btrfs/	3662	F: fs/btrfs/
3664	F: include/linux/btrfs*	3663	F: include/linux/btrfs*
@@ -3843,7 +3842,7 @@ CARL9170 LINUX COMMUNITY WIRELESS DRIVER · 178 unmodified lines
3843	M: Christian Lamparter <chunkeey@googlemail.com>	3842	M: Christian Lamparter <chunkeey@googlemail.com>
3844	L: linux-wireless@vger.kernel.org	3843	L: linux-wireless@vger.kernel.org
3845	S: Maintained	3844	S: Maintained
3846	W: http://wireless.kernel.org/en/users/Drivers/carl9170	3845	W: https://wireless.wiki.kernel.org/en/users/Drivers/carl9170
3847	F: drivers/net/wireless/ath/carl9170/	3846	F: drivers/net/wireless/ath/carl9170/
3848		3847
3849	CAVIUM I2C DRIVER	3848	CAVIUM I2C DRIVER
@@ -3937,11 +3936,9 @@ F: arch/powerpc/platforms/cell/ · 87 unmodified lines
3937	CEPH COMMON CODE (LIBCEPH)	3936	CEPH COMMON CODE (LIBCEPH)
3938	M: Ilya Dryomov <idryomov@gmail.com>	3937	M: Ilya Dryomov <idryomov@gmail.com>
3939	M: Jeff Layton <jlayton@kernel.org>	3938	M: Jeff Layton <jlayton@kernel.org>
3940	M: Sage Weil <sage@redhat.com>
3941	L: ceph-devel@vger.kernel.org	3939	L: ceph-devel@vger.kernel.org
3942	S: Supported	3940	S: Supported
3943	W: http://ceph.com/	3941	W: http://ceph.com/
3944	T: git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git
3945	T: git git://github.com/ceph/ceph-client.git	3942	T: git git://github.com/ceph/ceph-client.git
3946	F: include/linux/ceph/	3943	F: include/linux/ceph/
3947	F: include/linux/crush/	3944	F: include/linux/crush/
@@ -3949,12 +3946,10 @@ F: net/ceph/ · 1 unmodified line
3949		3946
3950	CEPH DISTRIBUTED FILE SYSTEM CLIENT (CEPH)	3947	CEPH DISTRIBUTED FILE SYSTEM CLIENT (CEPH)
3951	M: Jeff Layton <jlayton@kernel.org>	3948	M: Jeff Layton <jlayton@kernel.org>
3952	M: Sage Weil <sage@redhat.com>
3953	M: Ilya Dryomov <idryomov@gmail.com>	3949	M: Ilya Dryomov <idryomov@gmail.com>
3954	L: ceph-devel@vger.kernel.org	3950	L: ceph-devel@vger.kernel.org
3955	S: Supported	3951	S: Supported
3956	W: http://ceph.com/	3952	W: http://ceph.com/
3957	T: git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git
3958	T: git git://github.com/ceph/ceph-client.git	3953	T: git git://github.com/ceph/ceph-client.git
3959	F: Documentation/filesystems/ceph.rst	3954	F: Documentation/filesystems/ceph.rst
3960	F: fs/ceph/	3955	F: fs/ceph/
@@ -5176,6 +5171,7 @@ S: Maintained · 1215 unmodified lines
5176	F: drivers/soc/fsl/dpio	5171	F: drivers/soc/fsl/dpio
5177		5172
5178	DPAA2 ETHERNET DRIVER	5173	DPAA2 ETHERNET DRIVER
		5174	M: Ioana Ciornei <ioana.ciornei@nxp.com>
5179	M: Ioana Radulescu <ruxandra.radulescu@nxp.com>	5175	M: Ioana Radulescu <ruxandra.radulescu@nxp.com>
5180	L: netdev@vger.kernel.org	5176	L: netdev@vger.kernel.org
5181	S: Maintained	5177	S: Maintained
@@ -5935,9 +5931,9 @@ F: lib/dynamic_debug.c · 753 unmodified lines
5935	DYNAMIC INTERRUPT MODERATION	5931	DYNAMIC INTERRUPT MODERATION
5936	M: Tal Gilboa <talgi@mellanox.com>	5932	M: Tal Gilboa <talgi@mellanox.com>
5937	S: Maintained	5933	S: Maintained
		5934	F: Documentation/networking/net_dim.rst
5938	F: include/linux/dim.h	5935	F: include/linux/dim.h
5939	F: lib/dim/	5936	F: lib/dim/
5940	F: Documentation/networking/net_dim.rst
5941		5937
5942	DZ DECSTATION DZ11 SERIAL DRIVER	5938	DZ DECSTATION DZ11 SERIAL DRIVER
5943	M: "Maciej W. Rozycki" <macro@linux-mips.org>	5939	M: "Maciej W. Rozycki" <macro@linux-mips.org>
@@ -7119,9 +7115,10 @@ F: include/uapi/asm-generic/ · 1175 unmodified lines
7119		7115
7120	GENERIC PHY FRAMEWORK	7116	GENERIC PHY FRAMEWORK
7121	M: Kishon Vijay Abraham I <kishon@ti.com>	7117	M: Kishon Vijay Abraham I <kishon@ti.com>
		7118	M: Vinod Koul <vkoul@kernel.org>
7122	L: linux-kernel@vger.kernel.org	7119	L: linux-kernel@vger.kernel.org
7123	S: Supported	7120	S: Supported
7124	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git	7121	T: git git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git
7125	F: Documentation/devicetree/bindings/phy/	7122	F: Documentation/devicetree/bindings/phy/
7126	F: drivers/phy/	7123	F: drivers/phy/
7127	F: include/linux/phy/	7124	F: include/linux/phy/
@@ -7746,11 +7743,6 @@ L: platform-driver-x86@vger.kernel.org · 618 unmodified lines
7746	S: Orphan	7743	S: Orphan
7747	F: drivers/platform/x86/tc1100-wmi.c	7744	F: drivers/platform/x86/tc1100-wmi.c
7748		7745
7749	HP100: Driver for HP 10/100 Mbit/s Voice Grade Network Adapter Series
7750	M: Jaroslav Kysela <perex@perex.cz>
7751	S: Obsolete
7752	F: drivers/staging/hp/hp100.*
7753
7754	HPET: High Precision Event Timers driver	7746	HPET: High Precision Event Timers driver
7755	M: Clemens Ladisch <clemens@ladisch.de>	7747	M: Clemens Ladisch <clemens@ladisch.de>
7756	S: Maintained	7748	S: Maintained
@@ -9329,6 +9321,7 @@ M: Christian Borntraeger <borntraeger@de.ibm.com> · 1572 unmodified lines
9329	M: Janosch Frank <frankja@linux.ibm.com>	9321	M: Janosch Frank <frankja@linux.ibm.com>
9330	R: David Hildenbrand <david@redhat.com>	9322	R: David Hildenbrand <david@redhat.com>
9331	R: Cornelia Huck <cohuck@redhat.com>	9323	R: Cornelia Huck <cohuck@redhat.com>
		9324	R: Claudio Imbrenda <imbrenda@linux.ibm.com>
9332	L: kvm@vger.kernel.org	9325	L: kvm@vger.kernel.org
9333	S: Supported	9326	S: Supported
9334	W: http://www.ibm.com/developerworks/linux/linux390/	9327	W: http://www.ibm.com/developerworks/linux/linux390/
@@ -9416,6 +9409,13 @@ F: include/linux/keyctl.h · 81 unmodified lines
9416	F: include/uapi/linux/keyctl.h	9409	F: include/uapi/linux/keyctl.h
9417	F: security/keys/	9410	F: security/keys/
9418		9411
		9412	KFIFO
		9413	M: Stefani Seibold <stefani@seibold.net>
		9414	S: Maintained
		9415	F: include/linux/kfifo.h
		9416	F: lib/kfifo.c
		9417	F: samples/kfifo/
		9418
9419	KGDB / KDB /debug_core	9419	KGDB / KDB /debug_core
9420	M: Jason Wessel <jason.wessel@windriver.com>	9420	M: Jason Wessel <jason.wessel@windriver.com>
9421	M: Daniel Thompson <daniel.thompson@linaro.org>	9421	M: Daniel Thompson <daniel.thompson@linaro.org>
@@ -10067,7 +10067,7 @@ MAC80211 · 645 unmodified lines
10067	M: Johannes Berg <johannes@sipsolutions.net>	10067	M: Johannes Berg <johannes@sipsolutions.net>
10068	L: linux-wireless@vger.kernel.org	10068	L: linux-wireless@vger.kernel.org
10069	S: Maintained	10069	S: Maintained
10070	W: http://wireless.kernel.org/	10070	W: https://wireless.wiki.kernel.org/
10071	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	10071	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git
10072	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	10072	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git
10073	F: Documentation/networking/mac80211-injection.txt	10073	F: Documentation/networking/mac80211-injection.txt
@@ -10697,7 +10697,6 @@ MEDIATEK MT76 WIRELESS LAN DRIVER · 623 unmodified lines
10697	M: Felix Fietkau <nbd@nbd.name>	10697	M: Felix Fietkau <nbd@nbd.name>
10698	M: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>	10698	M: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
10699	R: Ryder Lee <ryder.lee@mediatek.com>	10699	R: Ryder Lee <ryder.lee@mediatek.com>
10700	R: Roy Luo <royluo@google.com>
10701	L: linux-wireless@vger.kernel.org	10700	L: linux-wireless@vger.kernel.org
10702	S: Maintained	10701	S: Maintained
10703	F: drivers/net/wireless/mediatek/mt76/	10702	F: drivers/net/wireless/mediatek/mt76/
@@ -12648,7 +12647,7 @@ F: fs/orangefs/ · 1944 unmodified lines
12648	ORINOCO DRIVER	12647	ORINOCO DRIVER
12649	L: linux-wireless@vger.kernel.org	12648	L: linux-wireless@vger.kernel.org
12650	S: Orphan	12649	S: Orphan
12651	W: http://wireless.kernel.org/en/users/Drivers/orinoco	12650	W: https://wireless.wiki.kernel.org/en/users/Drivers/orinoco
12652	W: http://www.nongnu.org/orinoco/	12651	W: http://www.nongnu.org/orinoco/
12653	F: drivers/net/wireless/intersil/orinoco/	12652	F: drivers/net/wireless/intersil/orinoco/
12654		12653
@@ -12674,7 +12673,7 @@ P54 WIRELESS DRIVER · 19 unmodified lines
12674	M: Christian Lamparter <chunkeey@googlemail.com>	12673	M: Christian Lamparter <chunkeey@googlemail.com>
12675	L: linux-wireless@vger.kernel.org	12674	L: linux-wireless@vger.kernel.org
12676	S: Maintained	12675	S: Maintained
12677	W: http://wireless.kernel.org/en/users/Drivers/p54	12676	W: https://wireless.wiki.kernel.org/en/users/Drivers/p54
12678	F: drivers/net/wireless/intersil/p54/	12677	F: drivers/net/wireless/intersil/p54/
12679		12678
12680	PACKING	12679	PACKING
@@ -13042,7 +13041,7 @@ F: drivers/pci/controller/pci-xgene-msi.c · 361 unmodified lines
13042		13041
13043	PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS	13042	PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS
13044	M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>	13043	M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13045	R: Andrew Murray <amurray@thegoodpenguin.co.uk>	13044	R: Rob Herring <robh@kernel.org>
13046	L: linux-pci@vger.kernel.org	13045	L: linux-pci@vger.kernel.org
13047	S: Supported	13046	S: Supported
13048	Q: http://patchwork.ozlabs.org/project/linux-pci/list/	13047	Q: http://patchwork.ozlabs.org/project/linux-pci/list/
@@ -13595,7 +13594,7 @@ PRISM54 WIRELESS DRIVER · 546 unmodified lines
13595	M: Luis Chamberlain <mcgrof@kernel.org>	13594	M: Luis Chamberlain <mcgrof@kernel.org>
13596	L: linux-wireless@vger.kernel.org	13595	L: linux-wireless@vger.kernel.org
13597	S: Obsolete	13596	S: Obsolete
13598	W: http://wireless.kernel.org/en/users/Drivers/p54	13597	W: https://wireless.wiki.kernel.org/en/users/Drivers/p54
13599	F: drivers/net/wireless/intersil/prism54/	13598	F: drivers/net/wireless/intersil/prism54/
13600		13599
13601	PROC FILESYSTEM	13600	PROC FILESYSTEM
@@ -13936,7 +13935,7 @@ QUALCOMM ATHEROS ATH10K WIRELESS DRIVER · 334 unmodified lines
13936	M: Kalle Valo <kvalo@codeaurora.org>	13935	M: Kalle Valo <kvalo@codeaurora.org>
13937	L: ath10k@lists.infradead.org	13936	L: ath10k@lists.infradead.org
13938	S: Supported	13937	S: Supported
13939	W: http://wireless.kernel.org/en/users/Drivers/ath10k	13938	W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k
13940	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git	13939	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
13941	F: drivers/net/wireless/ath/ath10k/	13940	F: drivers/net/wireless/ath/ath10k/
13942		13941
@@ -13951,7 +13950,7 @@ QUALCOMM ATHEROS ATH9K WIRELESS DRIVER · 8 unmodified lines
13951	M: QCA ath9k Development <ath9k-devel@qca.qualcomm.com>	13950	M: QCA ath9k Development <ath9k-devel@qca.qualcomm.com>
13952	L: linux-wireless@vger.kernel.org	13951	L: linux-wireless@vger.kernel.org
13953	S: Supported	13952	S: Supported
13954	W: http://wireless.kernel.org/en/users/Drivers/ath9k	13953	W: https://wireless.wiki.kernel.org/en/users/Drivers/ath9k
13955	F: drivers/net/wireless/ath/ath9k/	13954	F: drivers/net/wireless/ath/ath9k/
13956		13955
13957	QUALCOMM CAMERA SUBSYSTEM DRIVER	13956	QUALCOMM CAMERA SUBSYSTEM DRIVER
@@ -14048,13 +14047,12 @@ QUALCOMM WCN36XX WIRELESS DRIVER · 90 unmodified lines
14048	M: Kalle Valo <kvalo@codeaurora.org>	14047	M: Kalle Valo <kvalo@codeaurora.org>
14049	L: wcn36xx@lists.infradead.org	14048	L: wcn36xx@lists.infradead.org
14050	S: Supported	14049	S: Supported
14051	W: http://wireless.kernel.org/en/users/Drivers/wcn36xx	14050	W: https://wireless.wiki.kernel.org/en/users/Drivers/wcn36xx
14052	T: git git://github.com/KrasnikovEugene/wcn36xx.git	14051	T: git git://github.com/KrasnikovEugene/wcn36xx.git
14053	F: drivers/net/wireless/ath/wcn36xx/	14052	F: drivers/net/wireless/ath/wcn36xx/
14054		14053
14055	QUANTENNA QTNFMAC WIRELESS DRIVER	14054	QUANTENNA QTNFMAC WIRELESS DRIVER
14056	M: Igor Mitsyanko <imitsyanko@quantenna.com>	14055	M: Igor Mitsyanko <imitsyanko@quantenna.com>
14057	M: Avinash Patil <avinashp@quantenna.com>
14058	M: Sergey Matyukevich <smatyukevich@quantenna.com>	14056	M: Sergey Matyukevich <smatyukevich@quantenna.com>
14059	L: linux-wireless@vger.kernel.org	14057	L: linux-wireless@vger.kernel.org
14060	S: Maintained	14058	S: Maintained
@@ -14096,12 +14094,10 @@ F: drivers/media/radio/radio-tea5777.c · 35 unmodified lines
14096		14094
14097	RADOS BLOCK DEVICE (RBD)	14095	RADOS BLOCK DEVICE (RBD)
14098	M: Ilya Dryomov <idryomov@gmail.com>	14096	M: Ilya Dryomov <idryomov@gmail.com>
14099	M: Sage Weil <sage@redhat.com>
14100	R: Dongsheng Yang <dongsheng.yang@easystack.cn>	14097	R: Dongsheng Yang <dongsheng.yang@easystack.cn>
14101	L: ceph-devel@vger.kernel.org	14098	L: ceph-devel@vger.kernel.org
14102	S: Supported	14099	S: Supported
14103	W: http://ceph.com/	14100	W: http://ceph.com/
14104	T: git git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git
14105	T: git git://github.com/ceph/ceph-client.git	14101	T: git git://github.com/ceph/ceph-client.git
14106	F: Documentation/ABI/testing/sysfs-bus-rbd	14102	F: Documentation/ABI/testing/sysfs-bus-rbd
14107	F: drivers/block/rbd.c	14103	F: drivers/block/rbd.c
@@ -14276,7 +14272,7 @@ REALTEK WIRELESS DRIVER (rtlwifi family) · 168 unmodified lines
14276	M: Ping-Ke Shih <pkshih@realtek.com>	14272	M: Ping-Ke Shih <pkshih@realtek.com>
14277	L: linux-wireless@vger.kernel.org	14273	L: linux-wireless@vger.kernel.org
14278	S: Maintained	14274	S: Maintained
14279	W: http://wireless.kernel.org/	14275	W: https://wireless.wiki.kernel.org/
14280	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git	14276	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
14281	F: drivers/net/wireless/realtek/rtlwifi/	14277	F: drivers/net/wireless/realtek/rtlwifi/
14282		14278
@@ -14411,7 +14407,7 @@ RFKILL · 128 unmodified lines
14411	M: Johannes Berg <johannes@sipsolutions.net>	14407	M: Johannes Berg <johannes@sipsolutions.net>
14412	L: linux-wireless@vger.kernel.org	14408	L: linux-wireless@vger.kernel.org
14413	S: Maintained	14409	S: Maintained
14414	W: http://wireless.kernel.org/	14410	W: https://wireless.wiki.kernel.org/
14415	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	14411	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git
14416	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	14412	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git
14417	F: Documentation/ABI/stable/sysfs-class-rfkill	14413	F: Documentation/ABI/stable/sysfs-class-rfkill
@@ -14560,7 +14556,7 @@ F: drivers/media/dvb-frontends/rtl2832_sdr* · 142 unmodified lines
14560	RTL8180 WIRELESS DRIVER	14556	RTL8180 WIRELESS DRIVER
14561	L: linux-wireless@vger.kernel.org	14557	L: linux-wireless@vger.kernel.org
14562	S: Orphan	14558	S: Orphan
14563	W: http://wireless.kernel.org/	14559	W: https://wireless.wiki.kernel.org/
14564	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git	14560	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
14565	F: drivers/net/wireless/realtek/rtl818x/rtl8180/	14561	F: drivers/net/wireless/realtek/rtl818x/rtl8180/
14566		14562
@@ -14570,7 +14566,7 @@ M: Hin-Tak Leung <htl10@users.sourceforge.net> · 3 unmodified lines
14570	M: Larry Finger <Larry.Finger@lwfinger.net>	14566	M: Larry Finger <Larry.Finger@lwfinger.net>
14571	L: linux-wireless@vger.kernel.org	14567	L: linux-wireless@vger.kernel.org
14572	S: Maintained	14568	S: Maintained
14573	W: http://wireless.kernel.org/	14569	W: https://wireless.wiki.kernel.org/
14574	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git	14570	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
14575	F: drivers/net/wireless/realtek/rtl818x/rtl8187/	14571	F: drivers/net/wireless/realtek/rtl818x/rtl8187/
14576		14572
@@ -16925,8 +16921,8 @@ F: drivers/media/platform/ti-vpe/ · 2348 unmodified lines
16925	TI WILINK WIRELESS DRIVERS	16921	TI WILINK WIRELESS DRIVERS
16926	L: linux-wireless@vger.kernel.org	16922	L: linux-wireless@vger.kernel.org
16927	S: Orphan	16923	S: Orphan
16928	W: http://wireless.kernel.org/en/users/Drivers/wl12xx	16924	W: https://wireless.wiki.kernel.org/en/users/Drivers/wl12xx
16929	W: http://wireless.kernel.org/en/users/Drivers/wl1251	16925	W: https://wireless.wiki.kernel.org/en/users/Drivers/wl1251
16930	T: git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git	16926	T: git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git
16931	F: drivers/net/wireless/ti/	16927	F: drivers/net/wireless/ti/
16932	F: include/linux/wl12xx.h	16928	F: include/linux/wl12xx.h
@@ -18208,7 +18204,7 @@ M: Maya Erez <merez@codeaurora.org> · 1275 unmodified lines
18208	L: linux-wireless@vger.kernel.org	18204	L: linux-wireless@vger.kernel.org
18209	L: wil6210@qti.qualcomm.com	18205	L: wil6210@qti.qualcomm.com
18210	S: Supported	18206	S: Supported
18211	W: http://wireless.kernel.org/en/users/Drivers/wil6210	18207	W: https://wireless.wiki.kernel.org/en/users/Drivers/wil6210
18212	F: drivers/net/wireless/ath/wil6210/	18208	F: drivers/net/wireless/ath/wil6210/
18213		18209
18214	WIMAX STACK	18210	WIMAX STACK

Makefile+12−5

 VERSION = 5
 PATCHLEVEL = 7
 SUBLEVEL = 0
-EXTRAVERSION = -rc2
+EXTRAVERSION = -rc5
 NAME = Kleptomaniac Octopus
 # *DOCUMENTATION*
 KBUILD_CFLAGS += -Os
 endif
-ifdef CONFIG_CC_DISABLE_WARN_MAYBE_UNINITIALIZED
-KBUILD_CFLAGS   += -Wno-maybe-uninitialized
-endif
 # Tell gcc to never replace conditional load with a non-conditional one
 KBUILD_CFLAGS	+= $(call cc-option,--param=allow-store-data-races=0)
 KBUILD_CFLAGS	+= $(call cc-option,-fno-allow-store-data-races)
 # disable stringop warnings in gcc 8+
 KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation)
+# We'll want to enable this eventually, but it's not going away for 5.7 at least
+KBUILD_CFLAGS += $(call cc-disable-warning, zero-length-bounds)
+KBUILD_CFLAGS += $(call cc-disable-warning, array-bounds)
+KBUILD_CFLAGS += $(call cc-disable-warning, stringop-overflow)
+# Another good warning that we'll want to enable eventually
+KBUILD_CFLAGS += $(call cc-disable-warning, restrict)
+# Enabled with W=2, disabled by default as noisy
+KBUILD_CFLAGS += $(call cc-disable-warning, maybe-uninitialized)
 # disable invalid "can't wrap" optimizations for signed / pointers
 KBUILD_CFLAGS	+= $(call cc-option,-fno-strict-overflow)

arch/arc/include/asm/module.h+0−5

  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  *
  * Amit Bhor, Sameer Dhavale: Codito Technologies 2004
  */
 #ifndef _ASM_ARC_MODULE_H
 	const char *secstr;
 };
-#define MODULE_PROC_FAMILY "ARC700"
-#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
 #endif /* _ASM_ARC_MODULE_H */

arch/arc/include/asm/vermagic.h+8−0

@@ -0,0 +1,8 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	#ifndef _ASM_VERMAGIC_H
	4	#define _ASM_VERMAGIC_H
	5
	6	#define MODULE_ARCH_VERMAGIC "ARC700"
	7
	8	#endif /* _ASM_VERMAGIC_H */

arch/arm/boot/dts/bcm2835-rpi.dtsi+3−0

 	soc {
 		firmware: firmware {
 			compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
 			mboxes = <&mailbox>;
 			dma-ranges;
 		};

arch/arm/boot/dts/bcm283x.dtsi+1−0

@@ -372,6 +372,7 @@ · 371 unmodified lines
372	"dsi0_ddr2",	372	"dsi0_ddr2",
373	"dsi0_ddr";	373	"dsi0_ddr";
374		374
		375	status = "disabled";
375	};	376	};
376		377
377	aux: aux@7e215000 {	378	aux: aux@7e215000 {

arch/arm/boot/dts/omap3-n950-n9.dtsi+5−0

 	status = "disabled";
 };
+/* RNG not directly accessible on N950/N9. */
+&rng_target {
+	status = "disabled";
+};
 &usb_otg_hs {
 	interface-type = <0>;
 	usb-phy = <&usb2_phy>;

arch/arm/crypto/chacha-glue.c+11−3

@@ -91,9 +91,17 @@ void chacha_crypt_arch(u32 state, u8 dst, const u8 *src, unsigned int bytes, · 90 unmodified lines
91	return;	91	return;
92	}	92	}
93		93
94	kernel_neon_begin();	94	do {
95	chacha_doneon(state, dst, src, bytes, nrounds);	95	unsigned int todo = min_t(unsigned int, bytes, SZ_4K);
96	kernel_neon_end();	96
		97	kernel_neon_begin();
		98	chacha_doneon(state, dst, src, todo, nrounds);
		99	kernel_neon_end();
		100
		101	bytes -= todo;
		102	src += todo;
		103	dst += todo;
		104	} while (bytes);
97	}	105	}
98	EXPORT_SYMBOL(chacha_crypt_arch);	106	EXPORT_SYMBOL(chacha_crypt_arch);
99		107

arch/arm/crypto/nhpoly1305-neon-glue.c+1−1

@@ -30,7 +30,7 @@ static int nhpoly1305_neon_update(struct shash_desc *desc, · 29 unmodified lines
30	return crypto_nhpoly1305_update(desc, src, srclen);	30	return crypto_nhpoly1305_update(desc, src, srclen);
31		31
32	do {	32	do {
33	unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE);	33	unsigned int n = min_t(unsigned int, srclen, SZ_4K);
34		34
35	kernel_neon_begin();	35	kernel_neon_begin();
36	crypto_nhpoly1305_update_helper(desc, src, n, _nh_neon);	36	crypto_nhpoly1305_update_helper(desc, src, n, _nh_neon);

arch/arm/crypto/poly1305-glue.c+11−4

@@ -160,13 +160,20 @@ void poly1305_update_arch(struct poly1305_desc_ctx dctx, const u8 src, · 159 unmodified lines
160	unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);	160	unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);
161		161
162	if (static_branch_likely(&have_neon) && do_neon) {	162	if (static_branch_likely(&have_neon) && do_neon) {
163	kernel_neon_begin();	163	do {
164	poly1305_blocks_neon(&dctx->h, src, len, 1);	164	unsigned int todo = min_t(unsigned int, len, SZ_4K);
165	kernel_neon_end();	165
		166	kernel_neon_begin();
		167	poly1305_blocks_neon(&dctx->h, src, todo, 1);
		168	kernel_neon_end();
		169
		170	len -= todo;
		171	src += todo;
		172	} while (len);
166	} else {	173	} else {
167	poly1305_blocks_arm(&dctx->h, src, len, 1);	174	poly1305_blocks_arm(&dctx->h, src, len, 1);
		175	src += len;
168	}	176	}
169	src += len;
170	nbytes %= POLY1305_BLOCK_SIZE;	177	nbytes %= POLY1305_BLOCK_SIZE;
171	}	178	}
172		179

arch/arm/include/asm/futex.h+7−2

 	preempt_enable();
 #endif
-	if (!ret)
+	/*
-		*oval = oldval;
+	 * Store unconditionally. If ret != 0 the extra store is the least
+	 * of the worries but GCC cannot figure out that __futex_atomic_op()
+	 * is either setting ret to -EFAULT or storing the old value in
+	 * oldval which results in a uninitialized warning at the call site.
+	 */
+	*oval = oldval;
 	return ret;
 }

arch/arm/include/asm/module.h+0−24

@@ -37,30 +37,6 @@ struct mod_arch_specific { · 36 unmodified lines
37	struct module;	37	struct module;
38	u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val);	38	u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val);
39		39
40	/*
41	* Add the ARM architecture version to the version magic string
42	*/
43	#define MODULE_ARCH_VERMAGIC_ARMVSN "ARMv" __stringify(__LINUX_ARM_ARCH__) " "
44
45	/* Add __virt_to_phys patching state as well */
46	#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
47	#define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
48	#else
49	#define MODULE_ARCH_VERMAGIC_P2V ""
50	#endif
51
52	/* Add instruction set architecture tag to distinguish ARM/Thumb kernels */
53	#ifdef CONFIG_THUMB2_KERNEL
54	#define MODULE_ARCH_VERMAGIC_ARMTHUMB "thumb2 "
55	#else
56	#define MODULE_ARCH_VERMAGIC_ARMTHUMB ""
57	#endif
58
59	#define MODULE_ARCH_VERMAGIC \
60	MODULE_ARCH_VERMAGIC_ARMVSN \
61	MODULE_ARCH_VERMAGIC_ARMTHUMB \
62	MODULE_ARCH_VERMAGIC_P2V
63
64	#ifdef CONFIG_THUMB2_KERNEL	40	#ifdef CONFIG_THUMB2_KERNEL
65	#define HAVE_ARCH_KALLSYMS_SYMBOL_VALUE	41	#define HAVE_ARCH_KALLSYMS_SYMBOL_VALUE
66	static inline unsigned long kallsyms_symbol_value(const Elf_Sym *sym)	42	static inline unsigned long kallsyms_symbol_value(const Elf_Sym *sym)

arch/arm/include/asm/vermagic.h+31−0

@@ -0,0 +1,31 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_VERMAGIC_H
	3	#define _ASM_VERMAGIC_H
	4
	5	#include <linux/stringify.h>
	6
	7	/*
	8	* Add the ARM architecture version to the version magic string
	9	*/
	10	#define MODULE_ARCH_VERMAGIC_ARMVSN "ARMv" __stringify(__LINUX_ARM_ARCH__) " "
	11
	12	/* Add __virt_to_phys patching state as well */
	13	#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
	14	#define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
	15	#else
	16	#define MODULE_ARCH_VERMAGIC_P2V ""
	17	#endif
	18
	19	/* Add instruction set architecture tag to distinguish ARM/Thumb kernels */
	20	#ifdef CONFIG_THUMB2_KERNEL
	21	#define MODULE_ARCH_VERMAGIC_ARMTHUMB "thumb2 "
	22	#else
	23	#define MODULE_ARCH_VERMAGIC_ARMTHUMB ""
	24	#endif
	25
	26	#define MODULE_ARCH_VERMAGIC \
	27	MODULE_ARCH_VERMAGIC_ARMVSN \
	28	MODULE_ARCH_VERMAGIC_ARMTHUMB \
	29	MODULE_ARCH_VERMAGIC_P2V
	30
	31	#endif /* _ASM_VERMAGIC_H */

arch/arm/mach-imx/Makefile+2−0

 obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
 obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
 endif
+ifeq ($(CONFIG_ARM_CPU_SUSPEND),y)
 AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
+endif
 obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
 obj-$(CONFIG_SOC_IMX1) += mach-imx1.o

arch/arm64/crypto/chacha-neon-glue.c+11−3

@@ -87,9 +87,17 @@ void chacha_crypt_arch(u32 state, u8 dst, const u8 *src, unsigned int bytes, · 86 unmodified lines
87	!crypto_simd_usable())	87	!crypto_simd_usable())
88	return chacha_crypt_generic(state, dst, src, bytes, nrounds);	88	return chacha_crypt_generic(state, dst, src, bytes, nrounds);
89		89
90	kernel_neon_begin();	90	do {
91	chacha_doneon(state, dst, src, bytes, nrounds);	91	unsigned int todo = min_t(unsigned int, bytes, SZ_4K);
92	kernel_neon_end();	92
		93	kernel_neon_begin();
		94	chacha_doneon(state, dst, src, todo, nrounds);
		95	kernel_neon_end();
		96
		97	bytes -= todo;
		98	src += todo;
		99	dst += todo;
		100	} while (bytes);
93	}	101	}
94	EXPORT_SYMBOL(chacha_crypt_arch);	102	EXPORT_SYMBOL(chacha_crypt_arch);
95		103

arch/arm64/crypto/nhpoly1305-neon-glue.c+1−1

@@ -30,7 +30,7 @@ static int nhpoly1305_neon_update(struct shash_desc *desc, · 29 unmodified lines
30	return crypto_nhpoly1305_update(desc, src, srclen);	30	return crypto_nhpoly1305_update(desc, src, srclen);
31		31
32	do {	32	do {
33	unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE);	33	unsigned int n = min_t(unsigned int, srclen, SZ_4K);
34		34
35	kernel_neon_begin();	35	kernel_neon_begin();
36	crypto_nhpoly1305_update_helper(desc, src, n, _nh_neon);	36	crypto_nhpoly1305_update_helper(desc, src, n, _nh_neon);

arch/arm64/crypto/poly1305-glue.c+11−4

@@ -143,13 +143,20 @@ void poly1305_update_arch(struct poly1305_desc_ctx dctx, const u8 src, · 142 unmodified lines
143	unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);	143	unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);
144		144
145	if (static_branch_likely(&have_neon) && crypto_simd_usable()) {	145	if (static_branch_likely(&have_neon) && crypto_simd_usable()) {
146	kernel_neon_begin();	146	do {
147	poly1305_blocks_neon(&dctx->h, src, len, 1);	147	unsigned int todo = min_t(unsigned int, len, SZ_4K);
148	kernel_neon_end();	148
		149	kernel_neon_begin();
		150	poly1305_blocks_neon(&dctx->h, src, todo, 1);
		151	kernel_neon_end();
		152
		153	len -= todo;
		154	src += todo;
		155	} while (len);
149	} else {	156	} else {
150	poly1305_blocks(&dctx->h, src, len, 1);	157	poly1305_blocks(&dctx->h, src, len, 1);
		158	src += len;
151	}	159	}
152	src += len;
153	nbytes %= POLY1305_BLOCK_SIZE;	160	nbytes %= POLY1305_BLOCK_SIZE;
154	}	161	}
155		162

arch/arm64/include/asm/module.h+0−2

@@ -7,8 +7,6 @@ · 6 unmodified lines
7		7
8	#include <asm-generic/module.h>	8	#include <asm-generic/module.h>
9		9
10	#define MODULE_ARCH_VERMAGIC "aarch64"
11
12	#ifdef CONFIG_ARM64_MODULE_PLTS	10	#ifdef CONFIG_ARM64_MODULE_PLTS
13	struct mod_plt_sec {	11	struct mod_plt_sec {
14	int plt_shndx;	12	int plt_shndx;

arch/arm64/include/asm/pointer_auth.h+6−3

 		get_random_bytes(&keys->apga, sizeof(keys->apga));
 }
-#define __ptrauth_key_install(k, v)				\
+#define __ptrauth_key_install_nosync(k, v)			\
 do {								\
 	struct ptrauth_key __pki_v = (v);			\
 	write_sysreg_s(__pki_v.lo, SYS_ ## k ## KEYLO_EL1);	\
 static __always_inline void ptrauth_keys_switch_kernel(struct ptrauth_keys_kernel *keys)
 {
-	if (system_supports_address_auth())
+	if (!system_supports_address_auth())
-		__ptrauth_key_install(APIA, keys->apia);
+		return;
+	__ptrauth_key_install_nosync(APIA, keys->apia);
+	isb();
 }
 extern int ptrauth_prctl_reset_keys(struct task_struct *tsk, unsigned long arg);

arch/arm64/include/asm/vermagic.h+10−0

@@ -0,0 +1,10 @@
	1	/* SPDX-License-Identifier: GPL-2.0-only */
	2	/*
	3	* Copyright (C) 2012 ARM Ltd.
	4	*/
	5	#ifndef _ASM_VERMAGIC_H
	6	#define _ASM_VERMAGIC_H
	7
	8	#define MODULE_ARCH_VERMAGIC "aarch64"
	9
	10	#endif /* _ASM_VERMAGIC_H */

arch/arm64/kernel/vdso/Makefile+1−1

@@ -32,7 +32,7 @@ UBSAN_SANITIZE := n · 31 unmodified lines
32	OBJECT_FILES_NON_STANDARD := y	32	OBJECT_FILES_NON_STANDARD := y
33	KCOV_INSTRUMENT := n	33	KCOV_INSTRUMENT := n
34		34
35	CFLAGS_vgettimeofday.o = -O2 -mcmodel=tiny	35	CFLAGS_vgettimeofday.o = -O2 -mcmodel=tiny -fasynchronous-unwind-tables
36		36
37	ifneq ($(c-gettimeofday-y),)	37	ifneq ($(c-gettimeofday-y),)
38	CFLAGS_vgettimeofday.o += -include $(c-gettimeofday-y)	38	CFLAGS_vgettimeofday.o += -include $(c-gettimeofday-y)

arch/arm64/kvm/guest.c+7−0

@@ -200,6 +200,13 @@ static int set_core_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg) · 199 unmodified lines
200	}	200	}
201		201
202	memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));	202	memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));
		203
		204	if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) {
		205	int i;
		206
		207	for (i = 0; i < 16; i++)
		208	vcpu_reg32(vcpu, i) = (u32)vcpu_reg32(vcpu, i);
		209	}
203	out:	210	out:
204	return err;	211	return err;
205	}	212	}

arch/arm64/kvm/hyp/entry.S+23−0

 #define CPU_GP_REG_OFFSET(x)	(CPU_GP_REGS + x)
 #define CPU_XREG_OFFSET(x)	CPU_GP_REG_OFFSET(CPU_USER_PT_REGS + 8*x)
+#define CPU_SP_EL0_OFFSET	(CPU_XREG_OFFSET(30) + 8)
 	.text
 	.pushsection	.hyp.text, "ax"
 	ldp	x29, lr,  [\ctxt, #CPU_XREG_OFFSET(29)]
 .endm
+.macro save_sp_el0 ctxt, tmp
+	mrs	\tmp,	sp_el0
+	str	\tmp,	[\ctxt, #CPU_SP_EL0_OFFSET]
+.endm
+.macro restore_sp_el0 ctxt, tmp
+	ldr	\tmp,	  [\ctxt, #CPU_SP_EL0_OFFSET]
+	msr	sp_el0, \tmp
+.endm
 /*
  * u64 __guest_enter(struct kvm_vcpu *vcpu,
  *		     struct kvm_cpu_context *host_ctxt);
 	// Store the host regs
 	save_callee_saved_regs x1
+	// Save the host's sp_el0
+	save_sp_el0	x1, x2
 	// Now the host state is stored if we have a pending RAS SError it must
 	// affect the host. If any asynchronous exception is pending we defer
 	// the guest entry. The DSB isn't necessary before v8.2 as any SError
 	// when this feature is enabled for kernel code.
 	ptrauth_switch_to_guest x29, x0, x1, x2
+	// Restore the guest's sp_el0
+	restore_sp_el0 x29, x0
 	// Restore guest regs x0-x17
 	ldp	x0, x1,   [x29, #CPU_XREG_OFFSET(0)]
 	ldp	x2, x3,   [x29, #CPU_XREG_OFFSET(2)]
 	// Store the guest regs x18-x29, lr
 	save_callee_saved_regs x1
+	// Store the guest's sp_el0
+	save_sp_el0	x1, x2
 	get_host_ctxt	x2, x3
 	// Macro ptrauth_switch_to_guest format:
 	// when this feature is enabled for kernel code.
 	ptrauth_switch_to_host x1, x2, x3, x4, x5
+	// Restore the hosts's sp_el0
+	restore_sp_el0 x2, x3
 	// Now restore the host regs
 	restore_callee_saved_regs x2

arch/arm64/kvm/hyp/hyp-entry.S+0−1

@@ -198,7 +198,6 @@ SYM_CODE_END(__hyp_panic) · 197 unmodified lines
198	.macro invalid_vector label, target = __hyp_panic	198	.macro invalid_vector label, target = __hyp_panic
199	.align 2	199	.align 2
200	SYM_CODE_START(\label)	200	SYM_CODE_START(\label)
201	\label:
202	b \target	201	b \target
203	SYM_CODE_END(\label)	202	SYM_CODE_END(\label)
204	.endm	203	.endm

arch/arm64/kvm/hyp/sysreg-sr.c+3−14

 /*
  * Non-VHE: Both host and guest must save everything.
  *
- * VHE: Host and guest must save mdscr_el1 and sp_el0 (and the PC and pstate,
+ * VHE: Host and guest must save mdscr_el1 and sp_el0 (and the PC and
- * which are handled as part of the el2 return state) on every switch.
+ * pstate, which are handled as part of the el2 return state) on every
+ * switch (sp_el0 is being dealt with in the assembly code).
  * tpidr_el0 and tpidrro_el0 only need to be switched when going
  * to host userspace or a different VCPU.  EL1 registers only need to be
  * switched when potentially going to run a different VCPU.  The latter two
 static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
 {
 	ctxt->sys_regs[MDSCR_EL1]	= read_sysreg(mdscr_el1);
-	/*
-	 * The host arm64 Linux uses sp_el0 to point to 'current' and it must
-	 * therefore be saved/restored on every entry/exit to/from the guest.
-	 */
-	ctxt->gp_regs.regs.sp		= read_sysreg(sp_el0);
 }
 static void __hyp_text __sysreg_save_user_state(struct kvm_cpu_context *ctxt)
 static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)
 {
 	write_sysreg(ctxt->sys_regs[MDSCR_EL1],	  mdscr_el1);
-	/*
-	 * The host arm64 Linux uses sp_el0 to point to 'current' and it must
-	 * therefore be saved/restored on every entry/exit to/from the guest.
-	 */
-	write_sysreg(ctxt->gp_regs.regs.sp,	  sp_el0);
 }
 static void __hyp_text __sysreg_restore_user_state(struct kvm_cpu_context *ctxt)

arch/arm64/mm/hugetlbpage.c+2−0

@@ -230,6 +230,8 @@ pte_t huge_pte_alloc(struct mm_struct mm, · 229 unmodified lines
230	ptep = (pte_t *)pudp;	230	ptep = (pte_t *)pudp;
231	} else if (sz == (CONT_PTE_SIZE)) {	231	} else if (sz == (CONT_PTE_SIZE)) {
232	pmdp = pmd_alloc(mm, pudp, addr);	232	pmdp = pmd_alloc(mm, pudp, addr);
		233	if (!pmdp)
		234	return NULL;
233		235
234	WARN_ON(addr & (sz - 1));	236	WARN_ON(addr & (sz - 1));
235	/*	237	/*

arch/h8300/kernel/.gitignore+2−0

@@ -0,0 +1,2 @@
	1	# SPDX-License-Identifier: GPL-2.0-only
	2	vmlinux.lds

arch/hexagon/include/asm/vermagic.hrenamed from arch/hexagon/include/asm/module.h+4−4

@@ -3,11 +3,11 @@ · 2 unmodified lines
3	* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.	3	* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
4	*/	4	*/
5		5
6	#ifndef _ASM_MODULE_H	6	#ifndef _ASM_VERMAGIC_H
7	#define _ASM_MODULE_H	7	#define _ASM_VERMAGIC_H
8		8
9	#include <asm-generic/module.h>	9	#include <linux/stringify.h>
10		10
11	#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "	11	#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
12		12
13	#endif	13	#endif /* _ASM_VERMAGIC_H */

arch/ia64/include/asm/module.h+0−4

@@ -26,10 +26,6 @@ struct mod_arch_specific { · 25 unmodified lines
26	unsigned int next_got_entry; /* index of next available got entry */	26	unsigned int next_got_entry; /* index of next available got entry */
27	};	27	};
28		28
29	#define MODULE_PROC_FAMILY "ia64"
30	#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY \
31	"gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__)
32
33	#define ARCH_SHF_SMALL SHF_IA_64_SHORT	29	#define ARCH_SHF_SMALL SHF_IA_64_SHORT
34		30
35	#endif /* _ASM_IA64_MODULE_H */	31	#endif /* _ASM_IA64_MODULE_H */

arch/ia64/include/asm/vermagic.h+15−0

@@ -0,0 +1,15 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/*
	3	* Copyright (C) 2003 Hewlett-Packard Co
	4	* David Mosberger-Tang <davidm@hpl.hp.com>
	5	*/
	6
	7	#ifndef _ASM_VERMAGIC_H
	8	#define _ASM_VERMAGIC_H
	9
	10	#include <linux/stringify.h>
	11
	12	#define MODULE_ARCH_VERMAGIC "ia64" \
	13	"gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__)
	14
	15	#endif /* _ASM_VERMAGIC_H */

arch/mips/include/asm/module.h+0−61

@@ -83,65 +83,4 @@ search_module_dbetables(unsigned long addr) · 82 unmodified lines
83	}	83	}
84	#endif	84	#endif
85		85
86	#ifdef CONFIG_CPU_BMIPS
87	#define MODULE_PROC_FAMILY "BMIPS "
88	#elif defined CONFIG_CPU_MIPS32_R1
89	#define MODULE_PROC_FAMILY "MIPS32_R1 "
90	#elif defined CONFIG_CPU_MIPS32_R2
91	#define MODULE_PROC_FAMILY "MIPS32_R2 "
92	#elif defined CONFIG_CPU_MIPS32_R6
93	#define MODULE_PROC_FAMILY "MIPS32_R6 "
94	#elif defined CONFIG_CPU_MIPS64_R1
95	#define MODULE_PROC_FAMILY "MIPS64_R1 "
96	#elif defined CONFIG_CPU_MIPS64_R2
97	#define MODULE_PROC_FAMILY "MIPS64_R2 "
98	#elif defined CONFIG_CPU_MIPS64_R6
99	#define MODULE_PROC_FAMILY "MIPS64_R6 "
100	#elif defined CONFIG_CPU_R3000
101	#define MODULE_PROC_FAMILY "R3000 "
102	#elif defined CONFIG_CPU_TX39XX
103	#define MODULE_PROC_FAMILY "TX39XX "
104	#elif defined CONFIG_CPU_VR41XX
105	#define MODULE_PROC_FAMILY "VR41XX "
106	#elif defined CONFIG_CPU_R4X00
107	#define MODULE_PROC_FAMILY "R4X00 "
108	#elif defined CONFIG_CPU_TX49XX
109	#define MODULE_PROC_FAMILY "TX49XX "
110	#elif defined CONFIG_CPU_R5000
111	#define MODULE_PROC_FAMILY "R5000 "
112	#elif defined CONFIG_CPU_R5500
113	#define MODULE_PROC_FAMILY "R5500 "
114	#elif defined CONFIG_CPU_NEVADA
115	#define MODULE_PROC_FAMILY "NEVADA "
116	#elif defined CONFIG_CPU_R10000
117	#define MODULE_PROC_FAMILY "R10000 "
118	#elif defined CONFIG_CPU_RM7000
119	#define MODULE_PROC_FAMILY "RM7000 "
120	#elif defined CONFIG_CPU_SB1
121	#define MODULE_PROC_FAMILY "SB1 "
122	#elif defined CONFIG_CPU_LOONGSON32
123	#define MODULE_PROC_FAMILY "LOONGSON32 "
124	#elif defined CONFIG_CPU_LOONGSON2EF
125	#define MODULE_PROC_FAMILY "LOONGSON2EF "
126	#elif defined CONFIG_CPU_LOONGSON64
127	#define MODULE_PROC_FAMILY "LOONGSON64 "
128	#elif defined CONFIG_CPU_CAVIUM_OCTEON
129	#define MODULE_PROC_FAMILY "OCTEON "
130	#elif defined CONFIG_CPU_XLR
131	#define MODULE_PROC_FAMILY "XLR "
132	#elif defined CONFIG_CPU_XLP
133	#define MODULE_PROC_FAMILY "XLP "
134	#else
135	#error MODULE_PROC_FAMILY undefined for your processor configuration
136	#endif
137
138	#ifdef CONFIG_32BIT
139	#define MODULE_KERNEL_TYPE "32BIT "
140	#elif defined CONFIG_64BIT
141	#define MODULE_KERNEL_TYPE "64BIT "
142	#endif
143
144	#define MODULE_ARCH_VERMAGIC \
145	MODULE_PROC_FAMILY MODULE_KERNEL_TYPE
146
147	#endif /* _ASM_MODULE_H */	86	#endif /* _ASM_MODULE_H */

arch/mips/include/asm/vermagic.h+66−0

@@ -0,0 +1,66 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_VERMAGIC_H
	3	#define _ASM_VERMAGIC_H
	4
	5	#ifdef CONFIG_CPU_BMIPS
	6	#define MODULE_PROC_FAMILY "BMIPS "
	7	#elif defined CONFIG_CPU_MIPS32_R1
	8	#define MODULE_PROC_FAMILY "MIPS32_R1 "
	9	#elif defined CONFIG_CPU_MIPS32_R2
	10	#define MODULE_PROC_FAMILY "MIPS32_R2 "
	11	#elif defined CONFIG_CPU_MIPS32_R6
	12	#define MODULE_PROC_FAMILY "MIPS32_R6 "
	13	#elif defined CONFIG_CPU_MIPS64_R1
	14	#define MODULE_PROC_FAMILY "MIPS64_R1 "
	15	#elif defined CONFIG_CPU_MIPS64_R2
	16	#define MODULE_PROC_FAMILY "MIPS64_R2 "
	17	#elif defined CONFIG_CPU_MIPS64_R6
	18	#define MODULE_PROC_FAMILY "MIPS64_R6 "
	19	#elif defined CONFIG_CPU_R3000
	20	#define MODULE_PROC_FAMILY "R3000 "
	21	#elif defined CONFIG_CPU_TX39XX
	22	#define MODULE_PROC_FAMILY "TX39XX "
	23	#elif defined CONFIG_CPU_VR41XX
	24	#define MODULE_PROC_FAMILY "VR41XX "
	25	#elif defined CONFIG_CPU_R4X00
	26	#define MODULE_PROC_FAMILY "R4X00 "
	27	#elif defined CONFIG_CPU_TX49XX
	28	#define MODULE_PROC_FAMILY "TX49XX "
	29	#elif defined CONFIG_CPU_R5000
	30	#define MODULE_PROC_FAMILY "R5000 "
	31	#elif defined CONFIG_CPU_R5500
	32	#define MODULE_PROC_FAMILY "R5500 "
	33	#elif defined CONFIG_CPU_NEVADA
	34	#define MODULE_PROC_FAMILY "NEVADA "
	35	#elif defined CONFIG_CPU_R10000
	36	#define MODULE_PROC_FAMILY "R10000 "
	37	#elif defined CONFIG_CPU_RM7000
	38	#define MODULE_PROC_FAMILY "RM7000 "
	39	#elif defined CONFIG_CPU_SB1
	40	#define MODULE_PROC_FAMILY "SB1 "
	41	#elif defined CONFIG_CPU_LOONGSON32
	42	#define MODULE_PROC_FAMILY "LOONGSON32 "
	43	#elif defined CONFIG_CPU_LOONGSON2EF
	44	#define MODULE_PROC_FAMILY "LOONGSON2EF "
	45	#elif defined CONFIG_CPU_LOONGSON64
	46	#define MODULE_PROC_FAMILY "LOONGSON64 "
	47	#elif defined CONFIG_CPU_CAVIUM_OCTEON
	48	#define MODULE_PROC_FAMILY "OCTEON "
	49	#elif defined CONFIG_CPU_XLR
	50	#define MODULE_PROC_FAMILY "XLR "
	51	#elif defined CONFIG_CPU_XLP
	52	#define MODULE_PROC_FAMILY "XLP "
	53	#else
	54	#error MODULE_PROC_FAMILY undefined for your processor configuration
	55	#endif
	56
	57	#ifdef CONFIG_32BIT
	58	#define MODULE_KERNEL_TYPE "32BIT "
	59	#elif defined CONFIG_64BIT
	60	#define MODULE_KERNEL_TYPE "64BIT "
	61	#endif
	62
	63	#define MODULE_ARCH_VERMAGIC \
	64	MODULE_PROC_FAMILY MODULE_KERNEL_TYPE
	65
	66	#endif /* _ASM_VERMAGIC_H */

arch/nds32/include/asm/vermagic.hrenamed from arch/nds32/include/asm/module.h+3−5

@@ -1,11 +1,9 @@
1	/* SPDX-License-Identifier: GPL-2.0 */	1	/* SPDX-License-Identifier: GPL-2.0 */
2	// Copyright (C) 2005-2017 Andes Technology Corporation	2	// Copyright (C) 2005-2017 Andes Technology Corporation
3		3
4	#ifndef _ASM_NDS32_MODULE_H	4	#ifndef _ASM_VERMAGIC_H
5	#define _ASM_NDS32_MODULE_H	5	#define _ASM_VERMAGIC_H
6
7	#include <asm-generic/module.h>
8		6
9	#define MODULE_ARCH_VERMAGIC "NDS32v3"	7	#define MODULE_ARCH_VERMAGIC "NDS32v3"
10		8
11	#endif /* _ASM_NDS32_MODULE_H */	9	#endif /* _ASM_VERMAGIC_H */

arch/powerpc/include/asm/module.h+0−18

@@ -3,28 +3,10 @@ · 2 unmodified lines
3	#define _ASM_POWERPC_MODULE_H	3	#define _ASM_POWERPC_MODULE_H
4	#ifdef __KERNEL__	4	#ifdef __KERNEL__
5		5
6	/*
7	*/
8
9	#include <linux/list.h>	6	#include <linux/list.h>
10	#include <asm/bug.h>	7	#include <asm/bug.h>
11	#include <asm-generic/module.h>	8	#include <asm-generic/module.h>
12		9
13
14	#ifdef CONFIG_MPROFILE_KERNEL
15	#define MODULE_ARCH_VERMAGIC_FTRACE "mprofile-kernel "
16	#else
17	#define MODULE_ARCH_VERMAGIC_FTRACE ""
18	#endif
19
20	#ifdef CONFIG_RELOCATABLE
21	#define MODULE_ARCH_VERMAGIC_RELOCATABLE "relocatable "
22	#else
23	#define MODULE_ARCH_VERMAGIC_RELOCATABLE ""
24	#endif
25
26	#define MODULE_ARCH_VERMAGIC MODULE_ARCH_VERMAGIC_FTRACE MODULE_ARCH_VERMAGIC_RELOCATABLE
27
28	#ifndef __powerpc64__	10	#ifndef __powerpc64__
29	/*	11	/*
30	* Thanks to Paul M for explaining this.	12	* Thanks to Paul M for explaining this.

arch/powerpc/include/asm/vermagic.h+20−0

@@ -0,0 +1,20 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_VERMAGIC_H
	3	#define _ASM_VERMAGIC_H
	4
	5	#ifdef CONFIG_MPROFILE_KERNEL
	6	#define MODULE_ARCH_VERMAGIC_FTRACE "mprofile-kernel "
	7	#else
	8	#define MODULE_ARCH_VERMAGIC_FTRACE ""
	9	#endif
	10
	11	#ifdef CONFIG_RELOCATABLE
	12	#define MODULE_ARCH_VERMAGIC_RELOCATABLE "relocatable "
	13	#else
	14	#define MODULE_ARCH_VERMAGIC_RELOCATABLE ""
	15	#endif
	16
	17	#define MODULE_ARCH_VERMAGIC \
	18	MODULE_ARCH_VERMAGIC_FTRACE MODULE_ARCH_VERMAGIC_RELOCATABLE
	19
	20	#endif /* _ASM_VERMAGIC_H */

arch/powerpc/kernel/entry_32.S+1−1

@@ -732,7 +732,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPE) · 731 unmodified lines
732	stw r10,_CCR(r1)	732	stw r10,_CCR(r1)
733	stw r1,KSP(r3) /* Set old stack pointer */	733	stw r1,KSP(r3) /* Set old stack pointer */
734		734
735	kuap_check r2, r4	735	kuap_check r2, r0
736	#ifdef CONFIG_SMP	736	#ifdef CONFIG_SMP
737	/* We need a sync somewhere here to make sure that if the	737	/* We need a sync somewhere here to make sure that if the
738	* previous task gets rescheduled on another CPU, it sees all	738	* previous task gets rescheduled on another CPU, it sees all

arch/powerpc/kernel/setup_64.c+2−0

 	lsizep = of_get_property(np, propnames[3], NULL);
 	if (bsizep == NULL)
 		bsizep = lsizep;
+	if (lsizep == NULL)
+		lsizep = bsizep;
 	if (lsizep != NULL)
 		lsize = be32_to_cpu(*lsizep);
 	if (bsizep != NULL)

arch/powerpc/kernel/vmlinux.lds.S+1−0

@@ -90,6 +90,7 @@ SECTIONS · 89 unmodified lines
90	#ifdef CONFIG_PPC64	90	#ifdef CONFIG_PPC64
91	*(.tramp.ftrace.text);	91	*(.tramp.ftrace.text);
92	#endif	92	#endif
		93	NOINSTR_TEXT
93	SCHED_TEXT	94	SCHED_TEXT
94	CPUIDLE_TEXT	95	CPUIDLE_TEXT
95	LOCK_TEXT	96	LOCK_TEXT

arch/powerpc/kvm/book3s_64_mmu_hv.c+5−4

 	 */
 	local_irq_disable();
 	ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift);
+	pte = __pte(0);
+	if (ptep)
+		pte = *ptep;
+	local_irq_enable();
 	/*
 	 * If the PTE disappeared temporarily due to a THP
 	 * collapse, just return and let the guest try again.
 	 */
-	if (!ptep) {
+	if (!pte_present(pte)) {
-		local_irq_enable();
 		if (page)
 			put_page(page);
 		return RESUME_GUEST;
 	}
-	pte = *ptep;
-	local_irq_enable();
 	hpa = pte_pfn(pte) << PAGE_SHIFT;
 	pte_size = PAGE_SIZE;
 	if (shift)

arch/powerpc/kvm/book3s_64_mmu_radix.c+5−4

 	 */
 	local_irq_disable();
 	ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift);
+	pte = __pte(0);
+	if (ptep)
+		pte = *ptep;
+	local_irq_enable();
 	/*
 	 * If the PTE disappeared temporarily due to a THP
 	 * collapse, just return and let the guest try again.
 	 */
-	if (!ptep) {
+	if (!pte_present(pte)) {
-		local_irq_enable();
 		if (page)
 			put_page(page);
 		return RESUME_GUEST;
 	}
-	pte = *ptep;
-	local_irq_enable();
 	/* If we're logging dirty pages, always map single pages */
 	large_enable = !(memslot->flags & KVM_MEM_LOG_DIRTY_PAGES);

arch/powerpc/kvm/powerpc.c+1−0

@@ -521,6 +521,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 520 unmodified lines
521	case KVM_CAP_IOEVENTFD:	521	case KVM_CAP_IOEVENTFD:
522	case KVM_CAP_DEVICE_CTRL:	522	case KVM_CAP_DEVICE_CTRL:
523	case KVM_CAP_IMMEDIATE_EXIT:	523	case KVM_CAP_IMMEDIATE_EXIT:
		524	case KVM_CAP_SET_GUEST_DEBUG:
524	r = 1;	525	r = 1;
525	break;	526	break;
526	case KVM_CAP_PPC_GUEST_DEBUG_SSTEP:	527	case KVM_CAP_PPC_GUEST_DEBUG_SSTEP:

arch/powerpc/mm/nohash/8xx.c+3−0

 			mmu_mapin_ram_chunk(etext8, einittext8, PAGE_KERNEL);
 		}
 	}
+	_tlbil_all();
 }
 #ifdef CONFIG_STRICT_KERNEL_RWX
 				      ~(LARGE_PAGE_SIZE_8M - 1)));
 	mmu_patch_addis(&patch__dtlbmiss_romem_top, -__pa(_sinittext));
+	_tlbil_all();
 	/* Update page tables for PTDUMP and BDI */
 	mmu_mapin_ram_chunk(0, sinittext, __pgprot(0));
 	mmu_mapin_ram_chunk(0, etext, PAGE_KERNEL_ROX);

arch/powerpc/platforms/Kconfig.cputype+1−1

@@ -397,7 +397,7 @@ config PPC_KUAP · 396 unmodified lines
397		397
398	config PPC_KUAP_DEBUG	398	config PPC_KUAP_DEBUG
399	bool "Extra debugging for Kernel Userspace Access Protection"	399	bool "Extra debugging for Kernel Userspace Access Protection"
400	depends on PPC_KUAP && (PPC_RADIX_MMU \|\| PPC_32)	400	depends on PPC_KUAP && (PPC_RADIX_MMU \|\| PPC32)
401	help	401	help
402	Add extra debugging for Kernel Userspace Access Protection (KUAP)	402	Add extra debugging for Kernel Userspace Access Protection (KUAP)
403	If you're unsure, say N.	403	If you're unsure, say N.

arch/riscv/Kconfig+1−1

@@ -60,7 +60,7 @@ config RISCV · 59 unmodified lines
60	select ARCH_HAS_GIGANTIC_PAGE	60	select ARCH_HAS_GIGANTIC_PAGE
61	select ARCH_HAS_SET_DIRECT_MAP	61	select ARCH_HAS_SET_DIRECT_MAP
62	select ARCH_HAS_SET_MEMORY	62	select ARCH_HAS_SET_MEMORY
63	select ARCH_HAS_STRICT_KERNEL_RWX	63	select ARCH_HAS_STRICT_KERNEL_RWX if MMU
64	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT	64	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
65	select SPARSEMEM_STATIC if 32BIT	65	select SPARSEMEM_STATIC if 32BIT
66	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU	66	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU

arch/riscv/include/asm/csr.h+0−3

 #define CAUSE_IRQ_FLAG		(_AC(1, UL) << (__riscv_xlen - 1))
 /* Interrupt causes (minus the high bit) */
-#define IRQ_U_SOFT		0
 #define IRQ_S_SOFT		1
 #define IRQ_M_SOFT		3
-#define IRQ_U_TIMER		4
 #define IRQ_S_TIMER		5
 #define IRQ_M_TIMER		7
-#define IRQ_U_EXT		8
 #define IRQ_S_EXT		9
 #define IRQ_M_EXT		11

arch/riscv/include/asm/hwcap.h+22−0

@@ -8,6 +8,7 @@ · 7 unmodified lines
8	#ifndef _ASM_RISCV_HWCAP_H	8	#ifndef _ASM_RISCV_HWCAP_H
9	#define _ASM_RISCV_HWCAP_H	9	#define _ASM_RISCV_HWCAP_H
10		10
		11	#include <linux/bits.h>
11	#include <uapi/asm/hwcap.h>	12	#include <uapi/asm/hwcap.h>
12		13
13	#ifndef __ASSEMBLY__	14	#ifndef __ASSEMBLY__
@@ -22,6 +23,27 @@ enum { · 8 unmodified lines
22	};	23	};
23		24
24	extern unsigned long elf_hwcap;	25	extern unsigned long elf_hwcap;
		26
		27	#define RISCV_ISA_EXT_a ('a' - 'a')
		28	#define RISCV_ISA_EXT_c ('c' - 'a')
		29	#define RISCV_ISA_EXT_d ('d' - 'a')
		30	#define RISCV_ISA_EXT_f ('f' - 'a')
		31	#define RISCV_ISA_EXT_h ('h' - 'a')
		32	#define RISCV_ISA_EXT_i ('i' - 'a')
		33	#define RISCV_ISA_EXT_m ('m' - 'a')
		34	#define RISCV_ISA_EXT_s ('s' - 'a')
		35	#define RISCV_ISA_EXT_u ('u' - 'a')
		36
		37	#define RISCV_ISA_EXT_MAX 64
		38
		39	unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);
		40
		41	#define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext)
		42
		43	bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit);
		44	#define riscv_isa_extension_available(isa_bitmap, ext) \
		45	__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
		46
25	#endif	47	#endif
26		48
27	#endif /* _ASM_RISCV_HWCAP_H */	49	#endif /* _ASM_RISCV_HWCAP_H */

arch/riscv/include/asm/module.h+0−2

@@ -6,8 +6,6 @@ · 5 unmodified lines
6		6
7	#include <asm-generic/module.h>	7	#include <asm-generic/module.h>
8		8
9	#define MODULE_ARCH_VERMAGIC "riscv"
10
11	struct module;	9	struct module;
12	unsigned long module_emit_got_entry(struct module *mod, unsigned long val);	10	unsigned long module_emit_got_entry(struct module *mod, unsigned long val);
13	unsigned long module_emit_plt_entry(struct module *mod, unsigned long val);	11	unsigned long module_emit_plt_entry(struct module *mod, unsigned long val);

arch/riscv/include/asm/set_memory.h+0−8

@@ -22,14 +22,6 @@ static inline int set_memory_x(unsigned long addr, int numpages) { return 0; } · 21 unmodified lines
22	static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; }	22	static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; }
23	#endif	23	#endif
24		24
25	#ifdef CONFIG_STRICT_KERNEL_RWX
26	void set_kernel_text_ro(void);
27	void set_kernel_text_rw(void);
28	#else
29	static inline void set_kernel_text_ro(void) { }
30	static inline void set_kernel_text_rw(void) { }
31	#endif
32
33	int set_direct_map_invalid_noflush(struct page *page);	25	int set_direct_map_invalid_noflush(struct page *page);
34	int set_direct_map_default_noflush(struct page *page);	26	int set_direct_map_default_noflush(struct page *page);
35		27

arch/riscv/include/asm/vermagic.h+9−0

@@ -0,0 +1,9 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/* Copyright (C) 2017 Andes Technology Corporation */
	3
	4	#ifndef _ASM_VERMAGIC_H
	5	#define _ASM_VERMAGIC_H
	6
	7	#define MODULE_ARCH_VERMAGIC "riscv"
	8
	9	#endif /* _ASM_VERMAGIC_H */

arch/riscv/kernel/cpu_ops.c+2−2

@@ -15,8 +15,8 @@ · 14 unmodified lines
15		15
16	const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;	16	const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
17		17
18	void *__cpu_up_stack_pointer[NR_CPUS];	18	void *__cpu_up_stack_pointer[NR_CPUS] __section(.data);
19	void *__cpu_up_task_pointer[NR_CPUS];	19	void *__cpu_up_task_pointer[NR_CPUS] __section(.data);
20		20
21	extern const struct cpu_operations cpu_ops_sbi;	21	extern const struct cpu_operations cpu_ops_sbi;
22	extern const struct cpu_operations cpu_ops_spinwait;	22	extern const struct cpu_operations cpu_ops_spinwait;

arch/riscv/kernel/cpufeature.c+80−3

@@ -6,6 +6,7 @@ · 5 unmodified lines
6	* Copyright (C) 2017 SiFive	6	* Copyright (C) 2017 SiFive
7	*/	7	*/
8		8
		9	#include <linux/bitmap.h>
9	#include <linux/of.h>	10	#include <linux/of.h>
10	#include <asm/processor.h>	11	#include <asm/processor.h>
11	#include <asm/hwcap.h>	12	#include <asm/hwcap.h>
@@ -13,15 +14,57 @@ · 1 unmodified line
13	#include <asm/switch_to.h>	14	#include <asm/switch_to.h>
14		15
15	unsigned long elf_hwcap __read_mostly;	16	unsigned long elf_hwcap __read_mostly;
		17
		18	/* Host ISA bitmap */
		19	static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly;
		20
16	#ifdef CONFIG_FPU	21	#ifdef CONFIG_FPU
17	bool has_fpu __read_mostly;	22	bool has_fpu __read_mostly;
18	#endif	23	#endif
19		24
		25	/**
		26	* riscv_isa_extension_base() - Get base extension word
		27	*
		28	* @isa_bitmap: ISA bitmap to use
		29	* Return: base extension word as unsigned long value
		30	*
		31	* NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
		32	*/
		33	unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap)
		34	{
		35	if (!isa_bitmap)
		36	return riscv_isa[0];
		37	return isa_bitmap[0];
		38	}
		39	EXPORT_SYMBOL_GPL(riscv_isa_extension_base);
		40
		41	/**
		42	* __riscv_isa_extension_available() - Check whether given extension
		43	* is available or not
		44	*
		45	* @isa_bitmap: ISA bitmap to use
		46	* @bit: bit position of the desired extension
		47	* Return: true or false
		48	*
		49	* NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
		50	*/
		51	bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit)
		52	{
		53	const unsigned long *bmap = (isa_bitmap) ? isa_bitmap : riscv_isa;
		54
		55	if (bit >= RISCV_ISA_EXT_MAX)
		56	return false;
		57
		58	return test_bit(bit, bmap) ? true : false;
		59	}
		60	EXPORT_SYMBOL_GPL(__riscv_isa_extension_available);
		61
20	void riscv_fill_hwcap(void)	62	void riscv_fill_hwcap(void)
21	{	63	{
22	struct device_node *node;	64	struct device_node *node;
23	const char *isa;	65	const char *isa;
24	size_t i;	66	char print_str[BITS_PER_LONG + 1];
		67	size_t i, j, isa_len;
25	static unsigned long isa2hwcap[256] = {0};	68	static unsigned long isa2hwcap[256] = {0};
26		69
27	isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I;	70	isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I;
@@ -33,8 +76,11 @@ void riscv_fill_hwcap(void) · 5 unmodified lines
33		76
34	elf_hwcap = 0;	77	elf_hwcap = 0;
35		78
		79	bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX);
		80
36	for_each_of_cpu_node(node) {	81	for_each_of_cpu_node(node) {
37	unsigned long this_hwcap = 0;	82	unsigned long this_hwcap = 0;
		83	unsigned long this_isa = 0;
38		84
39	if (riscv_of_processor_hartid(node) < 0)	85	if (riscv_of_processor_hartid(node) < 0)
40	continue;	86	continue;
@@ -44,8 +90,24 @@ void riscv_fill_hwcap(void) · 3 unmodified lines
44	continue;	90	continue;
45	}	91	}
46		92
47	for (i = 0; i < strlen(isa); ++i)	93	i = 0;
		94	isa_len = strlen(isa);
		95	#if IS_ENABLED(CONFIG_32BIT)
		96	if (!strncmp(isa, "rv32", 4))
		97	i += 4;
		98	#elif IS_ENABLED(CONFIG_64BIT)
		99	if (!strncmp(isa, "rv64", 4))
		100	i += 4;
		101	#endif
		102	for (; i < isa_len; ++i) {
48	this_hwcap \|= isa2hwcap[(unsigned char)(isa[i])];	103	this_hwcap \|= isa2hwcap[(unsigned char)(isa[i])];
		104	/*
		105	* TODO: X, Y and Z extension parsing for Host ISA
		106	* bitmap will be added in-future.
		107	*/
		108	if ('a' <= isa[i] && isa[i] < 'x')
		109	this_isa \|= (1UL << (isa[i] - 'a'));
		110	}
49		111
50	/*	112	/*
51	* All "okay" hart should have same isa. Set HWCAP based on	113	* All "okay" hart should have same isa. Set HWCAP based on
@@ -56,6 +118,11 @@ void riscv_fill_hwcap(void) · 4 unmodified lines
56	elf_hwcap &= this_hwcap;	118	elf_hwcap &= this_hwcap;
57	else	119	else
58	elf_hwcap = this_hwcap;	120	elf_hwcap = this_hwcap;
		121
		122	if (riscv_isa[0])
		123	riscv_isa[0] &= this_isa;
		124	else
		125	riscv_isa[0] = this_isa;
59	}	126	}
60		127
61	/* We don't support systems with F but without D, so mask those out	128	/* We don't support systems with F but without D, so mask those out
@@ -65,7 +132,17 @@ void riscv_fill_hwcap(void) · 3 unmodified lines
65	elf_hwcap &= ~COMPAT_HWCAP_ISA_F;	132	elf_hwcap &= ~COMPAT_HWCAP_ISA_F;
66	}	133	}
67		134
68	pr_info("elf_hwcap is 0x%lx\n", elf_hwcap);	135	memset(print_str, 0, sizeof(print_str));
		136	for (i = 0, j = 0; i < BITS_PER_LONG; i++)
		137	if (riscv_isa[0] & BIT_MASK(i))
		138	print_str[j++] = (char)('a' + i);
		139	pr_info("riscv: ISA extensions %s\n", print_str);
		140
		141	memset(print_str, 0, sizeof(print_str));
		142	for (i = 0, j = 0; i < BITS_PER_LONG; i++)
		143	if (elf_hwcap & BIT_MASK(i))
		144	print_str[j++] = (char)('a' + i);
		145	pr_info("riscv: ELF capabilities %s\n", print_str);
69		146
70	#ifdef CONFIG_FPU	147	#ifdef CONFIG_FPU
71	if (elf_hwcap & (COMPAT_HWCAP_ISA_F \| COMPAT_HWCAP_ISA_D))	148	if (elf_hwcap & (COMPAT_HWCAP_ISA_F \| COMPAT_HWCAP_ISA_D))

arch/riscv/kernel/sbi.c+10−7

 {
 	sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
 }
-EXPORT_SYMBOL(sbi_set_timer);
+EXPORT_SYMBOL(sbi_shutdown);
 /**
  * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
 {
 	sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
 }
-EXPORT_SYMBOL(sbi_shutdown);
+EXPORT_SYMBOL(sbi_clear_ipi);
 /**
  * sbi_set_timer_v01() - Program the timer for next timer event.
 	return result;
 }
+static void sbi_set_power_off(void)
+{
+	pm_power_off = sbi_shutdown;
+}
 #else
 static void __sbi_set_timer_v01(uint64_t stime_value)
 {
 	return 0;
 }
+static void sbi_set_power_off(void) {}
 #endif /* CONFIG_RISCV_SBI_V01 */
 static void __sbi_set_timer_v02(uint64_t stime_value)
 	return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION);
 }
-static void sbi_power_off(void)
-{
-	sbi_shutdown();
-}
 int __init sbi_init(void)
 {
 	int ret;
-	pm_power_off = sbi_power_off;
+	sbi_set_power_off();
 	ret = sbi_get_spec_version();
 	if (ret > 0)
 		sbi_spec_version = ret;

arch/riscv/kernel/smp.c+2−0

 #include <linux/cpu.h>
 #include <linux/interrupt.h>
+#include <linux/module.h>
 #include <linux/profile.h>
 #include <linux/smp.h>
 #include <linux/sched.h>
 	for_each_cpu(cpu, in)
 		cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
 }
+EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask);
 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
 {

arch/riscv/kernel/stacktrace.c+2−2

 #include <linux/stacktrace.h>
 #include <linux/ftrace.h>
+register unsigned long sp_in_global __asm__("sp");
 #ifdef CONFIG_FRAME_POINTER
 struct stackframe {
 	unsigned long ra;
 };
-register unsigned long sp_in_global __asm__("sp");
 void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
 			     bool (*fn)(unsigned long, void *), void *arg)
 {

arch/riscv/kernel/vdso/Makefile+4−4

@@ -12,7 +12,7 @@ vdso-syms += getcpu · 11 unmodified lines
12	vdso-syms += flush_icache	12	vdso-syms += flush_icache
13		13
14	# Files to link into the vdso	14	# Files to link into the vdso
15	obj-vdso = $(patsubst %, %.o, $(vdso-syms))	15	obj-vdso = $(patsubst %, %.o, $(vdso-syms)) note.o
16		16
17	# Build rules	17	# Build rules
18	targets := $(obj-vdso) vdso.so vdso.so.dbg vdso.lds vdso-dummy.o	18	targets := $(obj-vdso) vdso.so vdso.so.dbg vdso.lds vdso-dummy.o
@@ -33,15 +33,15 @@ $(obj)/vdso.so.dbg: $(src)/vdso.lds $(obj-vdso) FORCE · 14 unmodified lines
33	$(call if_changed,vdsold)	33	$(call if_changed,vdsold)
34		34
35	# We also create a special relocatable object that should mirror the symbol	35	# We also create a special relocatable object that should mirror the symbol
36	# table and layout of the linked DSO. With ld -R we can then refer to	36	# table and layout of the linked DSO. With ld --just-symbols we can then
37	# these symbols in the kernel code rather than hand-coded addresses.	37	# refer to these symbols in the kernel code rather than hand-coded addresses.
38		38
39	SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \	39	SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \
40	-Wl,--build-id -Wl,--hash-style=both	40	-Wl,--build-id -Wl,--hash-style=both
41	$(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE	41	$(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE
42	$(call if_changed,vdsold)	42	$(call if_changed,vdsold)
43		43
44	LDFLAGS_vdso-syms.o := -r -R	44	LDFLAGS_vdso-syms.o := -r --just-symbols
45	$(obj)/vdso-syms.o: $(obj)/vdso-dummy.o FORCE	45	$(obj)/vdso-syms.o: $(obj)/vdso-dummy.o FORCE
46	$(call if_changed,ld)	46	$(call if_changed,ld)
47		47

arch/riscv/kernel/vdso/note.S+12−0

@@ -0,0 +1,12 @@
	1	/* SPDX-License-Identifier: GPL-2.0-or-later */
	2	/*
	3	* This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
	4	* Here we can supply some information useful to userland.
	5	*/
	6
	7	#include <linux/elfnote.h>
	8	#include <linux/version.h>
	9
	10	ELFNOTE_START(Linux, 0, "a")
	11	.long LINUX_VERSION_CODE
	12	ELFNOTE_END

arch/riscv/mm/init.c+2−17

@@ -150,7 +150,8 @@ void __init setup_bootmem(void) · 149 unmodified lines
150	memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);	150	memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
151		151
152	set_max_mapnr(PFN_DOWN(mem_size));	152	set_max_mapnr(PFN_DOWN(mem_size));
153	max_low_pfn = PFN_DOWN(memblock_end_of_DRAM());	153	max_pfn = PFN_DOWN(memblock_end_of_DRAM());
		154	max_low_pfn = max_pfn;
154		155
155	#ifdef CONFIG_BLK_DEV_INITRD	156	#ifdef CONFIG_BLK_DEV_INITRD
156	setup_initrd();	157	setup_initrd();
@@ -501,22 +502,6 @@ static inline void setup_vm_final(void) · 344 unmodified lines
501	#endif /* CONFIG_MMU */	502	#endif /* CONFIG_MMU */
502		503
503	#ifdef CONFIG_STRICT_KERNEL_RWX	504	#ifdef CONFIG_STRICT_KERNEL_RWX
504	void set_kernel_text_rw(void)
505	{
506	unsigned long text_start = (unsigned long)_text;
507	unsigned long text_end = (unsigned long)_etext;
508
509	set_memory_rw(text_start, (text_end - text_start) >> PAGE_SHIFT);
510	}
511
512	void set_kernel_text_ro(void)
513	{
514	unsigned long text_start = (unsigned long)_text;
515	unsigned long text_end = (unsigned long)_etext;
516
517	set_memory_ro(text_start, (text_end - text_start) >> PAGE_SHIFT);
518	}
519
520	void mark_rodata_ro(void)	505	void mark_rodata_ro(void)
521	{	506	{
522	unsigned long text_start = (unsigned long)_text;	507	unsigned long text_start = (unsigned long)_text;

arch/s390/boot/uv.c+0−2

 #ifdef CONFIG_PROTECTED_VIRTUALIZATION_GUEST
 int __bootdata_preserved(prot_virt_guest);
 #endif
-#if IS_ENABLED(CONFIG_KVM)
 struct uv_info __bootdata_preserved(uv_info);
-#endif
 void uv_query_info(void)
 {

arch/s390/kernel/diag.c+1−1

@@ -133,7 +133,7 @@ void diag_stat_inc(enum diag_stat_enum nr) · 132 unmodified lines
133	}	133	}
134	EXPORT_SYMBOL(diag_stat_inc);	134	EXPORT_SYMBOL(diag_stat_inc);
135		135
136	void diag_stat_inc_norecursion(enum diag_stat_enum nr)	136	void notrace diag_stat_inc_norecursion(enum diag_stat_enum nr)
137	{	137	{
138	this_cpu_inc(diag_stat.counter[nr]);	138	this_cpu_inc(diag_stat.counter[nr]);
139	trace_s390_diagnose_norecursion(diag_map[nr].code);	139	trace_s390_diagnose_norecursion(diag_map[nr].code);

arch/s390/kernel/smp.c+2−2

@@ -403,7 +403,7 @@ int smp_find_processor_id(u16 address) · 402 unmodified lines
403	return -1;	403	return -1;
404	}	404	}
405		405
406	bool arch_vcpu_is_preempted(int cpu)	406	bool notrace arch_vcpu_is_preempted(int cpu)
407	{	407	{
408	if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))	408	if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
409	return false;	409	return false;
@@ -413,7 +413,7 @@ bool arch_vcpu_is_preempted(int cpu) · 3 unmodified lines
413	}	413	}
414	EXPORT_SYMBOL(arch_vcpu_is_preempted);	414	EXPORT_SYMBOL(arch_vcpu_is_preempted);
415		415
416	void smp_yield_cpu(int cpu)	416	void notrace smp_yield_cpu(int cpu)
417	{	417	{
418	if (!MACHINE_HAS_DIAG9C)	418	if (!MACHINE_HAS_DIAG9C)
419	return;	419	return;

arch/s390/kernel/trace.c+1−1

@@ -14,7 +14,7 @@ EXPORT_TRACEPOINT_SYMBOL(s390_diagnose); · 13 unmodified lines
14		14
15	static DEFINE_PER_CPU(unsigned int, diagnose_trace_depth);	15	static DEFINE_PER_CPU(unsigned int, diagnose_trace_depth);
16		16
17	void trace_s390_diagnose_norecursion(int diag_nr)	17	void notrace trace_s390_diagnose_norecursion(int diag_nr)
18	{	18	{
19	unsigned long flags;	19	unsigned long flags;
20	unsigned int *depth;	20	unsigned int *depth;

arch/s390/kernel/uv.c+2−1

 int __bootdata_preserved(prot_virt_guest);
 #endif
+struct uv_info __bootdata_preserved(uv_info);
 #if IS_ENABLED(CONFIG_KVM)
 int prot_virt_host;
 EXPORT_SYMBOL(prot_virt_host);
-struct uv_info __bootdata_preserved(uv_info);
 EXPORT_SYMBOL(uv_info);
 static int __init prot_virt_setup(char *val)

arch/s390/kvm/interrupt.c+1−1

@@ -393,7 +393,7 @@ static unsigned long deliverable_irqs(struct kvm_vcpu *vcpu) · 392 unmodified lines
393	if (psw_mchk_disabled(vcpu))	393	if (psw_mchk_disabled(vcpu))
394	active_mask &= ~IRQ_PEND_MCHK_MASK;	394	active_mask &= ~IRQ_PEND_MCHK_MASK;
395	/* PV guest cpus can have a single interruption injected at a time. */	395	/* PV guest cpus can have a single interruption injected at a time. */
396	if (kvm_s390_pv_cpu_is_protected(vcpu) &&	396	if (kvm_s390_pv_cpu_get_handle(vcpu) &&
397	vcpu->arch.sie_block->iictl != IICTL_CODE_NONE)	397	vcpu->arch.sie_block->iictl != IICTL_CODE_NONE)
398	active_mask &= ~(IRQ_PEND_EXT_II_MASK \|	398	active_mask &= ~(IRQ_PEND_EXT_II_MASK \|
399	IRQ_PEND_IO_MASK \|	399	IRQ_PEND_IO_MASK \|

arch/s390/kvm/kvm-s390.c+4−0

 	case KVM_CAP_S390_AIS:
 	case KVM_CAP_S390_AIS_MIGRATION:
 	case KVM_CAP_S390_VCPU_RESETS:
+	case KVM_CAP_SET_GUEST_DEBUG:
 		r = 1;
 		break;
 	case KVM_CAP_S390_HPAGE_1M:
 			start = slot + 1;
 	}
+	if (start >= slots->used_slots)
+		return slots->used_slots - 1;
 	if (gfn >= memslots[start].base_gfn &&
 	    gfn < memslots[start].base_gfn + memslots[start].npages) {
 		atomic_set(&slots->lru_slot, start);

arch/s390/kvm/priv.c+3−1

 	 * available for the guest are AQIC and TAPQ with the t bit set
 	 * since we do not set IC.3 (FIII) we currently will only intercept
 	 * the AQIC function code.
+	 * Note: running nested under z/VM can result in intercepts for other
+	 * function codes, e.g. PQAP(QCI). We do not support this and bail out.
 	 */
 	reg0 = vcpu->run->s.regs.gprs[0];
 	fc = (reg0 >> 24) & 0xff;
-	if (WARN_ON_ONCE(fc != 0x03))
+	if (fc != 0x03)
 		return -EOPNOTSUPP;
 	/* PQAP instruction is allowed for guest kernel only */

arch/s390/lib/uaccess.c+4−0

 {
 	mm_segment_t old_fs;
 	unsigned long asce, cr;
+	unsigned long flags;
 	old_fs = current->thread.mm_segment;
 	if (old_fs & 1)
 		return old_fs;
+	/* protect against a concurrent page table upgrade */
+	local_irq_save(flags);
 	current->thread.mm_segment |= 1;
 	asce = S390_lowcore.kernel_asce;
 	if (likely(old_fs == USER_DS)) {
 		__ctl_load(asce, 7, 7);
 		set_cpu_flag(CIF_ASCE_SECONDARY);
 	}
+	local_irq_restore(flags);
 	return old_fs;
 }
 EXPORT_SYMBOL(enable_sacf_uaccess);

arch/s390/mm/pgalloc.c+14−2

@@ -70,8 +70,20 @@ static void __crst_table_upgrade(void *arg) · 69 unmodified lines
70	{	70	{
71	struct mm_struct *mm = arg;	71	struct mm_struct *mm = arg;
72		72
73	if (current->active_mm == mm)	73	/* we must change all active ASCEs to avoid the creation of new TLBs */
74	set_user_asce(mm);	74	if (current->active_mm == mm) {
		75	S390_lowcore.user_asce = mm->context.asce;
		76	if (current->thread.mm_segment == USER_DS) {
		77	__ctl_load(S390_lowcore.user_asce, 1, 1);
		78	/* Mark user-ASCE present in CR1 */
		79	clear_cpu_flag(CIF_ASCE_PRIMARY);
		80	}
		81	if (current->thread.mm_segment == USER_DS_SACF) {
		82	__ctl_load(S390_lowcore.user_asce, 7, 7);
		83	/* enable_sacf_uaccess does all or nothing */
		84	WARN_ON(!test_cpu_flag(CIF_ASCE_SECONDARY));
		85	}
		86	}
75	__tlb_flush_local();	87	__tlb_flush_local();
76	}	88	}
77		89

arch/s390/pci/pci_irq.c+3−2

 	.name = "PCI-MSI",
 	.irq_unmask = pci_msi_unmask_irq,
 	.irq_mask = pci_msi_mask_irq,
-	.irq_set_affinity = zpci_set_irq_affinity,
 };
 static void zpci_handle_cpu_local_irq(bool rescan)
 		rc = -EIO;
 		if (hwirq - bit >= msi_vecs)
 			break;
-		irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE, msi->affinity);
+		irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE,
+				(irq_delivery == DIRECTED) ?
+				msi->affinity : NULL);
 		if (irq < 0)
 			return -ENOMEM;
 		rc = irq_set_msi_desc(irq, msi);

arch/sh/include/asm/module.h+0−28

@@ -11,32 +11,4 @@ struct mod_arch_specific { · 10 unmodified lines
11	};	11	};
12	#endif	12	#endif
13		13
14	#ifdef CONFIG_CPU_LITTLE_ENDIAN
15	# ifdef CONFIG_CPU_SH2
16	# define MODULE_PROC_FAMILY "SH2LE "
17	# elif defined CONFIG_CPU_SH3
18	# define MODULE_PROC_FAMILY "SH3LE "
19	# elif defined CONFIG_CPU_SH4
20	# define MODULE_PROC_FAMILY "SH4LE "
21	# elif defined CONFIG_CPU_SH5
22	# define MODULE_PROC_FAMILY "SH5LE "
23	# else
24	# error unknown processor family
25	# endif
26	#else
27	# ifdef CONFIG_CPU_SH2
28	# define MODULE_PROC_FAMILY "SH2BE "
29	# elif defined CONFIG_CPU_SH3
30	# define MODULE_PROC_FAMILY "SH3BE "
31	# elif defined CONFIG_CPU_SH4
32	# define MODULE_PROC_FAMILY "SH4BE "
33	# elif defined CONFIG_CPU_SH5
34	# define MODULE_PROC_FAMILY "SH5BE "
35	# else
36	# error unknown processor family
37	# endif
38	#endif
39
40	#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
41
42	#endif /* _ASM_SH_MODULE_H */	14	#endif /* _ASM_SH_MODULE_H */

arch/sh/include/asm/vermagic.h+34−0

@@ -0,0 +1,34 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	#ifndef _ASM_VERMAGIC_H
	4	#define _ASM_VERMAGIC_H
	5
	6	#ifdef CONFIG_CPU_LITTLE_ENDIAN
	7	# ifdef CONFIG_CPU_SH2
	8	# define MODULE_PROC_FAMILY "SH2LE "
	9	# elif defined CONFIG_CPU_SH3
	10	# define MODULE_PROC_FAMILY "SH3LE "
	11	# elif defined CONFIG_CPU_SH4
	12	# define MODULE_PROC_FAMILY "SH4LE "
	13	# elif defined CONFIG_CPU_SH5
	14	# define MODULE_PROC_FAMILY "SH5LE "
	15	# else
	16	# error unknown processor family
	17	# endif
	18	#else
	19	# ifdef CONFIG_CPU_SH2
	20	# define MODULE_PROC_FAMILY "SH2BE "
	21	# elif defined CONFIG_CPU_SH3
	22	# define MODULE_PROC_FAMILY "SH3BE "
	23	# elif defined CONFIG_CPU_SH4
	24	# define MODULE_PROC_FAMILY "SH4BE "
	25	# elif defined CONFIG_CPU_SH5
	26	# define MODULE_PROC_FAMILY "SH5BE "
	27	# else
	28	# error unknown processor family
	29	# endif
	30	#endif
	31
	32	#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
	33
	34	#endif /* _ASM_VERMAGIC_H */

arch/sh/mm/init.c+1−1

@@ -412,7 +412,7 @@ int arch_add_memory(int nid, u64 start, u64 size, · 411 unmodified lines
412	unsigned long nr_pages = size >> PAGE_SHIFT;	412	unsigned long nr_pages = size >> PAGE_SHIFT;
413	int ret;	413	int ret;
414		414
415	if (WARN_ON_ONCE(params->pgprot.pgprot != PAGE_KERNEL.pgprot)	415	if (WARN_ON_ONCE(params->pgprot.pgprot != PAGE_KERNEL.pgprot))
416	return -EINVAL;	416	return -EINVAL;
417		417
418	/* We only have ZONE_NORMAL, so this is easy.. */	418	/* We only have ZONE_NORMAL, so this is easy.. */

arch/um/Makefile+1−0

@@ -140,6 +140,7 @@ export CFLAGS_vmlinux := $(LINK-y) $(LINK_WRAPS) $(LD_FLAGS_CMDLINE) · 139 unmodified lines
140	# When cleaning we don't include .config, so we don't include	140	# When cleaning we don't include .config, so we don't include
141	# TT or skas makefiles and don't clean skas_ptregs.h.	141	# TT or skas makefiles and don't clean skas_ptregs.h.
142	CLEAN_FILES += linux x.i gmon.out	142	CLEAN_FILES += linux x.i gmon.out
		143	MRPROPER_DIRS += arch/$(SUBARCH)/include/generated
143		144
144	archclean:	145	archclean:
145	@find . \( -name '.bb' -o -name '.bbg' -o -name '*.da' \	146	@find . \( -name '.bb' -o -name '.bbg' -o -name '*.da' \

arch/x86/Kconfig+1−1

@@ -149,7 +149,7 @@ config X86 · 148 unmodified lines
149	select HAVE_ARCH_TRACEHOOK	149	select HAVE_ARCH_TRACEHOOK
150	select HAVE_ARCH_TRANSPARENT_HUGEPAGE	150	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
151	select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64	151	select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64
152	select HAVE_ARCH_USERFAULTFD_WP if USERFAULTFD	152	select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD
153	select HAVE_ARCH_VMAP_STACK if X86_64	153	select HAVE_ARCH_VMAP_STACK if X86_64
154	select HAVE_ARCH_WITHIN_STACK_FRAMES	154	select HAVE_ARCH_WITHIN_STACK_FRAMES
155	select HAVE_ASM_MODVERSIONS	155	select HAVE_ASM_MODVERSIONS

arch/x86/crypto/blake2s-glue.c+4−6

 			   const u32 inc)
 {
 	/* SIMD disables preemption, so relax after processing each page. */
-	BUILD_BUG_ON(PAGE_SIZE / BLAKE2S_BLOCK_SIZE < 8);
+	BUILD_BUG_ON(SZ_4K / BLAKE2S_BLOCK_SIZE < 8);
 	if (!static_branch_likely(&blake2s_use_ssse3) || !crypto_simd_usable()) {
 		blake2s_compress_generic(state, block, nblocks, inc);
 		return;
 	}
-	for (;;) {
+	do {
 		const size_t blocks = min_t(size_t, nblocks,
-					    PAGE_SIZE / BLAKE2S_BLOCK_SIZE);
+					    SZ_4K / BLAKE2S_BLOCK_SIZE);
 		kernel_fpu_begin();
 		if (IS_ENABLED(CONFIG_AS_AVX512) &&
 		kernel_fpu_end();
 		nblocks -= blocks;
-		if (!nblocks)
-			break;
 		block += blocks * BLAKE2S_BLOCK_SIZE;
-	}
+	} while (nblocks);
 }
 EXPORT_SYMBOL(blake2s_compress_arch);

arch/x86/crypto/chacha_glue.c+11−3

@@ -153,9 +153,17 @@ void chacha_crypt_arch(u32 state, u8 dst, const u8 *src, unsigned int bytes, · 152 unmodified lines
153	bytes <= CHACHA_BLOCK_SIZE)	153	bytes <= CHACHA_BLOCK_SIZE)
154	return chacha_crypt_generic(state, dst, src, bytes, nrounds);	154	return chacha_crypt_generic(state, dst, src, bytes, nrounds);
155		155
156	kernel_fpu_begin();	156	do {
157	chacha_dosimd(state, dst, src, bytes, nrounds);	157	unsigned int todo = min_t(unsigned int, bytes, SZ_4K);
158	kernel_fpu_end();	158
		159	kernel_fpu_begin();
		160	chacha_dosimd(state, dst, src, todo, nrounds);
		161	kernel_fpu_end();
		162
		163	bytes -= todo;
		164	src += todo;
		165	dst += todo;
		166	} while (bytes);
159	}	167	}
160	EXPORT_SYMBOL(chacha_crypt_arch);	168	EXPORT_SYMBOL(chacha_crypt_arch);
161		169

arch/x86/crypto/nhpoly1305-avx2-glue.c+1−1

@@ -29,7 +29,7 @@ static int nhpoly1305_avx2_update(struct shash_desc *desc, · 28 unmodified lines
29	return crypto_nhpoly1305_update(desc, src, srclen);	29	return crypto_nhpoly1305_update(desc, src, srclen);
30		30
31	do {	31	do {
32	unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE);	32	unsigned int n = min_t(unsigned int, srclen, SZ_4K);
33		33
34	kernel_fpu_begin();	34	kernel_fpu_begin();
35	crypto_nhpoly1305_update_helper(desc, src, n, _nh_avx2);	35	crypto_nhpoly1305_update_helper(desc, src, n, _nh_avx2);

arch/x86/crypto/nhpoly1305-sse2-glue.c+1−1

@@ -29,7 +29,7 @@ static int nhpoly1305_sse2_update(struct shash_desc *desc, · 28 unmodified lines
29	return crypto_nhpoly1305_update(desc, src, srclen);	29	return crypto_nhpoly1305_update(desc, src, srclen);
30		30
31	do {	31	do {
32	unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE);	32	unsigned int n = min_t(unsigned int, srclen, SZ_4K);
33		33
34	kernel_fpu_begin();	34	kernel_fpu_begin();
35	crypto_nhpoly1305_update_helper(desc, src, n, _nh_sse2);	35	crypto_nhpoly1305_update_helper(desc, src, n, _nh_sse2);

arch/x86/crypto/poly1305_glue.c+6−7

 	struct poly1305_arch_internal *state = ctx;
 	/* SIMD disables preemption, so relax after processing each page. */
-	BUILD_BUG_ON(PAGE_SIZE < POLY1305_BLOCK_SIZE ||
+	BUILD_BUG_ON(SZ_4K < POLY1305_BLOCK_SIZE ||
-		     PAGE_SIZE % POLY1305_BLOCK_SIZE);
+		     SZ_4K % POLY1305_BLOCK_SIZE);
 	if (!static_branch_likely(&poly1305_use_avx) ||
 	    (len < (POLY1305_BLOCK_SIZE * 18) && !state->is_base2_26) ||
 		return;
 	}
-	for (;;) {
+	do {
-		const size_t bytes = min_t(size_t, len, PAGE_SIZE);
+		const size_t bytes = min_t(size_t, len, SZ_4K);
 		kernel_fpu_begin();
 		if (IS_ENABLED(CONFIG_AS_AVX512) && static_branch_likely(&poly1305_use_avx512))
 		else
 			poly1305_blocks_avx(ctx, inp, bytes, padbit);
 		kernel_fpu_end();
 		len -= bytes;
-		if (!len)
-			break;
 		inp += bytes;
-	}
+	} while (len);
 }
 static void poly1305_simd_emit(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],

arch/x86/entry/calling.h+21−19

 #define SIZEOF_PTREGS	21*8
 .macro PUSH_AND_CLEAR_REGS rdx=%rdx rax=%rax save_ret=0
-	/*
-	 * Push registers and sanitize registers of values that a
-	 * speculation attack might otherwise want to exploit. The
-	 * lower registers are likely clobbered well before they
-	 * could be put to use in a speculative execution gadget.
-	 * Interleave XOR with PUSH for better uop scheduling:
-	 */
 	.if \save_ret
 	pushq	%rsi		/* pt_regs->si */
 	movq	8(%rsp), %rsi	/* temporarily store the return address in %rsi */
 	pushq   %rsi		/* pt_regs->si */
 	.endif
 	pushq	\rdx		/* pt_regs->dx */
-	xorl	%edx, %edx	/* nospec   dx */
 	pushq   %rcx		/* pt_regs->cx */
-	xorl	%ecx, %ecx	/* nospec   cx */
 	pushq   \rax		/* pt_regs->ax */
 	pushq   %r8		/* pt_regs->r8 */
-	xorl	%r8d, %r8d	/* nospec   r8 */
 	pushq   %r9		/* pt_regs->r9 */
-	xorl	%r9d, %r9d	/* nospec   r9 */
 	pushq   %r10		/* pt_regs->r10 */
-	xorl	%r10d, %r10d	/* nospec   r10 */
 	pushq   %r11		/* pt_regs->r11 */
-	xorl	%r11d, %r11d	/* nospec   r11*/
 	pushq	%rbx		/* pt_regs->rbx */
-	xorl    %ebx, %ebx	/* nospec   rbx*/
 	pushq	%rbp		/* pt_regs->rbp */
-	xorl    %ebp, %ebp	/* nospec   rbp*/
 	pushq	%r12		/* pt_regs->r12 */
-	xorl	%r12d, %r12d	/* nospec   r12*/
 	pushq	%r13		/* pt_regs->r13 */
-	xorl	%r13d, %r13d	/* nospec   r13*/
 	pushq	%r14		/* pt_regs->r14 */
-	xorl	%r14d, %r14d	/* nospec   r14*/
 	pushq	%r15		/* pt_regs->r15 */
-	xorl	%r15d, %r15d	/* nospec   r15*/
 	UNWIND_HINT_REGS
 	.if \save_ret
 	pushq	%rsi		/* return address on top of stack */
 	.endif
+	/*
+	 * Sanitize registers of values that a speculation attack might
+	 * otherwise want to exploit. The lower registers are likely clobbered
+	 * well before they could be put to use in a speculative execution
+	 * gadget.
+	 */
+	xorl	%edx,  %edx	/* nospec dx  */
+	xorl	%ecx,  %ecx	/* nospec cx  */
+	xorl	%r8d,  %r8d	/* nospec r8  */
+	xorl	%r9d,  %r9d	/* nospec r9  */
+	xorl	%r10d, %r10d	/* nospec r10 */
+	xorl	%r11d, %r11d	/* nospec r11 */
+	xorl	%ebx,  %ebx	/* nospec rbx */
+	xorl	%ebp,  %ebp	/* nospec rbp */
+	xorl	%r12d, %r12d	/* nospec r12 */
+	xorl	%r13d, %r13d	/* nospec r13 */
+	xorl	%r14d, %r14d	/* nospec r14 */
+	xorl	%r15d, %r15d	/* nospec r15 */
 .endm
 .macro POP_REGS pop_rdi=1 skip_r11rcx=0

arch/x86/entry/entry_64.S+7−7

 	 */
 syscall_return_via_sysret:
 	/* rcx and r11 are already restored (see code above) */
-	UNWIND_HINT_EMPTY
 	POP_REGS pop_rdi=0 skip_r11rcx=1
 	/*
 	 */
 	movq	%rsp, %rdi
 	movq	PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
+	UNWIND_HINT_EMPTY
 	pushq	RSP-RDI(%rdi)	/* RSP */
 	pushq	(%rdi)		/* RDI */
  * %rdi: prev task
  * %rsi: next task
  */
-SYM_CODE_START(__switch_to_asm)
+SYM_FUNC_START(__switch_to_asm)
-	UNWIND_HINT_FUNC
 	/*
 	 * Save callee-saved registers
 	 * This must match the order in inactive_task_frame
 	popq	%rbp
 	jmp	__switch_to
-SYM_CODE_END(__switch_to_asm)
+SYM_FUNC_END(__switch_to_asm)
 /*
  * A newly forked process directly context switches into this address.
  * +----------------------------------------------------+
  */
 SYM_CODE_START(interrupt_entry)
-	UNWIND_HINT_FUNC
+	UNWIND_HINT_IRET_REGS offset=16
 	ASM_CLAC
 	cld
 	pushq	5*8(%rdi)		/* regs->eflags */
 	pushq	4*8(%rdi)		/* regs->cs */
 	pushq	3*8(%rdi)		/* regs->ip */
+	UNWIND_HINT_IRET_REGS
 	pushq	2*8(%rdi)		/* regs->orig_ax */
 	pushq	8(%rdi)			/* return address */
-	UNWIND_HINT_FUNC
 	movq	(%rdi), %rdi
 	jmp	2f
 	 */
 	movq	%rsp, %rdi
 	movq	PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
+	UNWIND_HINT_EMPTY
 	/* Copy the IRET frame to the trampoline stack. */
 	pushq	6*8(%rdi)	/* SS */
 	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rax
 	leaq	-PTREGS_SIZE(%rax), %rsp
-	UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
+	UNWIND_HINT_REGS
 	call	do_exit
 SYM_CODE_END(rewind_stack_do_exit)

arch/x86/events/intel/cstate.c+1−0

@@ -643,6 +643,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { · 642 unmodified lines
643	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),	643	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),
644	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),	644	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),
645	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),	645	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),
		646	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates),
646		647
647	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),	648	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),
648	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),	649	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),

arch/x86/hyperv/hv_init.c+10−2

 	struct page *pg;
 	input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg);
-	pg = alloc_page(GFP_KERNEL);
+	/* hv_cpu_init() can be called with IRQs disabled from hv_resume() */
+	pg = alloc_page(irqs_disabled() ? GFP_ATOMIC : GFP_KERNEL);
 	if (unlikely(!pg))
 		return -ENOMEM;
 	*input_arg = page_address(pg);
 static int hv_suspend(void)
 {
 	union hv_x64_msr_hypercall_contents hypercall_msr;
+	int ret;
 	/*
 	 * Reset the hypercall page as it is going to be invalidated
 	hypercall_msr.enable = 0;
 	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
-	return 0;
+	ret = hv_cpu_die(0);
+	return ret;
 }
 static void hv_resume(void)
 {
 	union hv_x64_msr_hypercall_contents hypercall_msr;
+	int ret;
+	ret = hv_cpu_init(0);
+	WARN_ON(ret);
 	/* Re-enable the hypercall page */
 	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
 	hv_hypercall_pg_saved = NULL;
 }
+/* Note: when the ops are called, only CPU0 is online and IRQs are disabled. */
 static struct syscore_ops hv_syscore_ops = {
 	.suspend	= hv_suspend,
 	.resume		= hv_resume,

arch/x86/include/asm/ftrace.h+3−2

 {
 	/*
 	 * Compare the symbol name with the system call name. Skip the
-	 * "__x64_sys", "__ia32_sys" or simple "sys" prefix.
+	 * "__x64_sys", "__ia32_sys", "__do_sys" or simple "sys" prefix.
 	 */
 	return !strcmp(sym + 3, name + 3) ||
 		(!strncmp(sym, "__x64_", 6) && !strcmp(sym + 9, name + 3)) ||
-		(!strncmp(sym, "__ia32_", 7) && !strcmp(sym + 10, name + 3));
+		(!strncmp(sym, "__ia32_", 7) && !strcmp(sym + 10, name + 3)) ||
+		(!strncmp(sym, "__do_sys", 8) && !strcmp(sym + 8, name + 3));
 }
 #ifndef COMPILE_OFFSETS

arch/x86/include/asm/kvm_host.h+2−2

@@ -1663,8 +1663,8 @@ void kvm_set_msi_irq(struct kvm kvm, struct kvm_kernel_irq_routing_entry e, · 1662 unmodified lines
1663	static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)	1663	static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1664	{	1664	{
1665	/* We can only post Fixed and LowPrio IRQs */	1665	/* We can only post Fixed and LowPrio IRQs */
1666	return (irq->delivery_mode == dest_Fixed \|\|	1666	return (irq->delivery_mode == APIC_DM_FIXED \|\|
1667	irq->delivery_mode == dest_LowestPrio);	1667	irq->delivery_mode == APIC_DM_LOWEST);
1668	}	1668	}
1669		1669
1670	static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)	1670	static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)

arch/x86/include/asm/module.h+0−60

@@ -13,64 +13,4 @@ struct mod_arch_specific { · 12 unmodified lines
13	#endif	13	#endif
14	};	14	};
15		15
16	#ifdef CONFIG_X86_64
17	/* X86_64 does not define MODULE_PROC_FAMILY */
18	#elif defined CONFIG_M486SX
19	#define MODULE_PROC_FAMILY "486SX "
20	#elif defined CONFIG_M486
21	#define MODULE_PROC_FAMILY "486 "
22	#elif defined CONFIG_M586
23	#define MODULE_PROC_FAMILY "586 "
24	#elif defined CONFIG_M586TSC
25	#define MODULE_PROC_FAMILY "586TSC "
26	#elif defined CONFIG_M586MMX
27	#define MODULE_PROC_FAMILY "586MMX "
28	#elif defined CONFIG_MCORE2
29	#define MODULE_PROC_FAMILY "CORE2 "
30	#elif defined CONFIG_MATOM
31	#define MODULE_PROC_FAMILY "ATOM "
32	#elif defined CONFIG_M686
33	#define MODULE_PROC_FAMILY "686 "
34	#elif defined CONFIG_MPENTIUMII
35	#define MODULE_PROC_FAMILY "PENTIUMII "
36	#elif defined CONFIG_MPENTIUMIII
37	#define MODULE_PROC_FAMILY "PENTIUMIII "
38	#elif defined CONFIG_MPENTIUMM
39	#define MODULE_PROC_FAMILY "PENTIUMM "
40	#elif defined CONFIG_MPENTIUM4
41	#define MODULE_PROC_FAMILY "PENTIUM4 "
42	#elif defined CONFIG_MK6
43	#define MODULE_PROC_FAMILY "K6 "
44	#elif defined CONFIG_MK7
45	#define MODULE_PROC_FAMILY "K7 "
46	#elif defined CONFIG_MK8
47	#define MODULE_PROC_FAMILY "K8 "
48	#elif defined CONFIG_MELAN
49	#define MODULE_PROC_FAMILY "ELAN "
50	#elif defined CONFIG_MCRUSOE
51	#define MODULE_PROC_FAMILY "CRUSOE "
52	#elif defined CONFIG_MEFFICEON
53	#define MODULE_PROC_FAMILY "EFFICEON "
54	#elif defined CONFIG_MWINCHIPC6
55	#define MODULE_PROC_FAMILY "WINCHIPC6 "
56	#elif defined CONFIG_MWINCHIP3D
57	#define MODULE_PROC_FAMILY "WINCHIP3D "
58	#elif defined CONFIG_MCYRIXIII
59	#define MODULE_PROC_FAMILY "CYRIXIII "
60	#elif defined CONFIG_MVIAC3_2
61	#define MODULE_PROC_FAMILY "VIAC3-2 "
62	#elif defined CONFIG_MVIAC7
63	#define MODULE_PROC_FAMILY "VIAC7 "
64	#elif defined CONFIG_MGEODEGX1
65	#define MODULE_PROC_FAMILY "GEODEGX1 "
66	#elif defined CONFIG_MGEODE_LX
67	#define MODULE_PROC_FAMILY "GEODE "
68	#else
69	#error unknown processor family
70	#endif
71
72	#ifdef CONFIG_X86_32
73	# define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
74	#endif
75
76	#endif /* _ASM_X86_MODULE_H */	16	#endif /* _ASM_X86_MODULE_H */

arch/x86/include/asm/mshyperv.h+2−0

@@ -35,6 +35,8 @@ typedef int (*hyperv_fill_flush_list_func)( · 34 unmodified lines
35	rdmsrl(HV_X64_MSR_SINT0 + int_num, val)	35	rdmsrl(HV_X64_MSR_SINT0 + int_num, val)
36	#define hv_set_synint_state(int_num, val) \	36	#define hv_set_synint_state(int_num, val) \
37	wrmsrl(HV_X64_MSR_SINT0 + int_num, val)	37	wrmsrl(HV_X64_MSR_SINT0 + int_num, val)
		38	#define hv_recommend_using_aeoi() \
		39	(!(ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED))
38		40
39	#define hv_get_crash_ctl(val) \	41	#define hv_get_crash_ctl(val) \
40	rdmsrl(HV_X64_MSR_CRASH_CTL, val)	42	rdmsrl(HV_X64_MSR_CRASH_CTL, val)

arch/x86/include/asm/nospec-branch.h+0−21

@@ -237,27 +237,6 @@ enum ssb_mitigation { · 236 unmodified lines
237	extern char __indirect_thunk_start[];	237	extern char __indirect_thunk_start[];
238	extern char __indirect_thunk_end[];	238	extern char __indirect_thunk_end[];
239		239
240	/*
241	* On VMEXIT we must ensure that no RSB predictions learned in the guest
242	* can be followed in the host, by overwriting the RSB completely. Both
243	* retpoline and IBRS mitigations for Spectre v2 need this; only on future
244	* CPUs with IBRS_ALL might it be avoided.
245	*/
246	static inline void vmexit_fill_RSB(void)
247	{
248	#ifdef CONFIG_RETPOLINE
249	unsigned long loops;
250
251	asm volatile (ANNOTATE_NOSPEC_ALTERNATIVE
252	ALTERNATIVE("jmp 910f",
253	__stringify(__FILL_RETURN_BUFFER(%0, RSB_CLEAR_LOOPS, %1)),
254	X86_FEATURE_RETPOLINE)
255	"910:"
256	: "=r" (loops), ASM_CALL_CONSTRAINT
257	: : "memory" );
258	#endif
259	}
260
261	static __always_inline	240	static __always_inline
262	void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)	241	void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)
263	{	242	{

arch/x86/include/asm/unwind.h+1−1

@@ -19,7 +19,7 @@ struct unwind_state { · 18 unmodified lines
19	#if defined(CONFIG_UNWINDER_ORC)	19	#if defined(CONFIG_UNWINDER_ORC)
20	bool signal, full_regs;	20	bool signal, full_regs;
21	unsigned long sp, bp, ip;	21	unsigned long sp, bp, ip;
22	struct pt_regs *regs;	22	struct pt_regs regs, prev_regs;
23	#elif defined(CONFIG_UNWINDER_FRAME_POINTER)	23	#elif defined(CONFIG_UNWINDER_FRAME_POINTER)
24	bool got_irq;	24	bool got_irq;
25	unsigned long bp, orig_sp, ip;	25	unsigned long bp, orig_sp, ip;

arch/x86/include/asm/vermagic.h+68−0

@@ -0,0 +1,68 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	#ifndef _ASM_VERMAGIC_H
	4	#define _ASM_VERMAGIC_H
	5
	6	#ifdef CONFIG_X86_64
	7	/* X86_64 does not define MODULE_PROC_FAMILY */
	8	#elif defined CONFIG_M486SX
	9	#define MODULE_PROC_FAMILY "486SX "
	10	#elif defined CONFIG_M486
	11	#define MODULE_PROC_FAMILY "486 "
	12	#elif defined CONFIG_M586
	13	#define MODULE_PROC_FAMILY "586 "
	14	#elif defined CONFIG_M586TSC
	15	#define MODULE_PROC_FAMILY "586TSC "
	16	#elif defined CONFIG_M586MMX
	17	#define MODULE_PROC_FAMILY "586MMX "
	18	#elif defined CONFIG_MCORE2
	19	#define MODULE_PROC_FAMILY "CORE2 "
	20	#elif defined CONFIG_MATOM
	21	#define MODULE_PROC_FAMILY "ATOM "
	22	#elif defined CONFIG_M686
	23	#define MODULE_PROC_FAMILY "686 "
	24	#elif defined CONFIG_MPENTIUMII
	25	#define MODULE_PROC_FAMILY "PENTIUMII "
	26	#elif defined CONFIG_MPENTIUMIII
	27	#define MODULE_PROC_FAMILY "PENTIUMIII "
	28	#elif defined CONFIG_MPENTIUMM
	29	#define MODULE_PROC_FAMILY "PENTIUMM "
	30	#elif defined CONFIG_MPENTIUM4
	31	#define MODULE_PROC_FAMILY "PENTIUM4 "
	32	#elif defined CONFIG_MK6
	33	#define MODULE_PROC_FAMILY "K6 "
	34	#elif defined CONFIG_MK7
	35	#define MODULE_PROC_FAMILY "K7 "
	36	#elif defined CONFIG_MK8
	37	#define MODULE_PROC_FAMILY "K8 "
	38	#elif defined CONFIG_MELAN
	39	#define MODULE_PROC_FAMILY "ELAN "
	40	#elif defined CONFIG_MCRUSOE
	41	#define MODULE_PROC_FAMILY "CRUSOE "
	42	#elif defined CONFIG_MEFFICEON
	43	#define MODULE_PROC_FAMILY "EFFICEON "
	44	#elif defined CONFIG_MWINCHIPC6
	45	#define MODULE_PROC_FAMILY "WINCHIPC6 "
	46	#elif defined CONFIG_MWINCHIP3D
	47	#define MODULE_PROC_FAMILY "WINCHIP3D "
	48	#elif defined CONFIG_MCYRIXIII
	49	#define MODULE_PROC_FAMILY "CYRIXIII "
	50	#elif defined CONFIG_MVIAC3_2
	51	#define MODULE_PROC_FAMILY "VIAC3-2 "
	52	#elif defined CONFIG_MVIAC7
	53	#define MODULE_PROC_FAMILY "VIAC7 "
	54	#elif defined CONFIG_MGEODEGX1
	55	#define MODULE_PROC_FAMILY "GEODEGX1 "
	56	#elif defined CONFIG_MGEODE_LX
	57	#define MODULE_PROC_FAMILY "GEODE "
	58	#else
	59	#error unknown processor family
	60	#endif
	61
	62	#ifdef CONFIG_X86_32
	63	# define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
	64	#else
	65	# define MODULE_ARCH_VERMAGIC ""
	66	#endif
	67
	68	#endif /* _ASM_VERMAGIC_H */

arch/x86/kernel/apic/apic.c+14−13

 		 * According to Intel, MFENCE can do the serialization here.
 		 */
 		asm volatile("mfence" : : : "memory");
-		printk_once(KERN_DEBUG "TSC deadline timer enabled\n");
 		return;
 	}
 };
 static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
-static u32 hsx_deadline_rev(void)
+static __init u32 hsx_deadline_rev(void)
 {
 	switch (boot_cpu_data.x86_stepping) {
 	case 0x02: return 0x3a; /* EP */
 	return ~0U;
 }
-static u32 bdx_deadline_rev(void)
+static __init u32 bdx_deadline_rev(void)
 {
 	switch (boot_cpu_data.x86_stepping) {
 	case 0x02: return 0x00000011;
 	return ~0U;
 }
-static u32 skx_deadline_rev(void)
+static __init u32 skx_deadline_rev(void)
 {
 	switch (boot_cpu_data.x86_stepping) {
 	case 0x03: return 0x01000136;
 	return ~0U;
 }
-static const struct x86_cpu_id deadline_match[] = {
+static const struct x86_cpu_id deadline_match[] __initconst = {
 	X86_MATCH_INTEL_FAM6_MODEL( HASWELL_X,		&hsx_deadline_rev),
 	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X,	0x0b000020),
 	X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_D,	&bdx_deadline_rev),
 	{},
 };
-static void apic_check_deadline_errata(void)
+static __init bool apic_validate_deadline_timer(void)
 {
 	const struct x86_cpu_id *m;
 	u32 rev;
-	if (!boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER) ||
+	if (!boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER))
-	    boot_cpu_has(X86_FEATURE_HYPERVISOR))
+		return false;
-		return;
+	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
+		return true;
 	m = x86_match_cpu(deadline_match);
 	if (!m)
-		return;
+		return true;
 	/*
 	 * Function pointers will have the MSB set due to address layout,
 		rev = (u32)m->driver_data;
 	if (boot_cpu_data.microcode >= rev)
-		return;
+		return true;
 	setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
 	pr_err(FW_BUG "TSC_DEADLINE disabled due to Errata; "
 	       "please update microcode to version: 0x%x (or later)\n", rev);
+	return false;
 }
 /*
 {
 	unsigned int new_apicid;
-	apic_check_deadline_errata();
+	if (apic_validate_deadline_timer())
+		pr_debug("TSC deadline timer available\n");
 	if (x2apic_mode) {
 		boot_cpu_physical_apicid = read_apic_id();

arch/x86/kernel/dumpstack_64.c+2−1

 	 */
 	if (visit_mask) {
 		if (*visit_mask & (1UL << info->type)) {
-			printk_deferred_once(KERN_WARNING "WARNING: stack recursion on stack type %d\n", info->type);
+			if (task == current)
+				printk_deferred_once(KERN_WARNING "WARNING: stack recursion on stack type %d\n", info->type);
 			goto unknown;
 		}
 		*visit_mask |= 1UL << info->type;

arch/x86/kernel/smpboot.c+33−14

 	*((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
 }
-static void init_freq_invariance(void);
+static void init_freq_invariance(bool secondary);
 /*
  * Report back to the Boot Processor during boot time or to the caller processor
 	 */
 	set_cpu_sibling_map(raw_smp_processor_id());
-	init_freq_invariance();
+	init_freq_invariance(true);
 	/*
 	 * Get our bogomips.
 	set_sched_topology(x86_topology);
 	set_cpu_sibling_map(0);
-	init_freq_invariance();
+	init_freq_invariance(false);
 	smp_sanity_check();
 	switch (apic_intr_mode) {
 	int err, i;
 	u64 msr;
-	if (!x86_match_cpu(has_knl_turbo_ratio_limits))
-		return false;
 	err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
 	if (err)
 		return false;
 static bool core_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)
 {
+	u64 msr;
 	int err;
 	err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
 	if (err)
 		return false;
-	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, turbo_freq);
+	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &msr);
 	if (err)
 		return false;
-	*base_freq = (*base_freq >> 8) & 0xFF;      /* max P state */
+	*base_freq = (*base_freq >> 8) & 0xFF;    /* max P state */
-	*turbo_freq = (*turbo_freq >> 24) & 0xFF;   /* 4C turbo    */
+	*turbo_freq = (msr >> 24) & 0xFF;         /* 4C turbo    */
+	/* The CPU may have less than 4 cores */
+	if (!*turbo_freq)
+		*turbo_freq = msr & 0xFF;         /* 1C turbo    */
 	return true;
 }
 	    skx_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
 		goto out;
-	if (knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
+	if (x86_match_cpu(has_knl_turbo_ratio_limits) &&
+	    knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
 		goto out;
 	if (x86_match_cpu(has_skx_turbo_ratio_limits) &&
 	return false;
 out:
+	/*
+	 * Some hypervisors advertise X86_FEATURE_APERFMPERF
+	 * but then fill all MSR's with zeroes.
+	 */
+	if (!base_freq) {
+		pr_debug("Couldn't determine cpu base frequency, necessary for scale-invariant accounting.\n");
+		return false;
+	}
 	arch_turbo_freq_ratio = div_u64(turbo_freq * SCHED_CAPACITY_SCALE,
 					base_freq);
 	arch_set_max_freq_ratio(turbo_disabled());
 	return true;
 }
-static void init_counter_refs(void *arg)
+static void init_counter_refs(void)
 {
 	u64 aperf, mperf;
 	this_cpu_write(arch_prev_mperf, mperf);
 }
-static void init_freq_invariance(void)
+static void init_freq_invariance(bool secondary)
 {
 	bool ret = false;
-	if (smp_processor_id() != 0 || !boot_cpu_has(X86_FEATURE_APERFMPERF))
+	if (!boot_cpu_has(X86_FEATURE_APERFMPERF))
 		return;
+	if (secondary) {
+		if (static_branch_likely(&arch_scale_freq_key)) {
+			init_counter_refs();
+		}
+		return;
+	}
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
 		ret = intel_set_max_freq_ratio();
 	if (ret) {
-		on_each_cpu(init_counter_refs, NULL, 1);
+		init_counter_refs();
 		static_branch_enable(&arch_scale_freq_key);
 	} else {
 		pr_debug("Couldn't determine max cpu frequency, necessary for scale-invariant accounting.\n");

arch/x86/kernel/unwind_frame.c+3−0

@@ -344,6 +344,9 @@ bad_address: · 343 unmodified lines
344	if (IS_ENABLED(CONFIG_X86_32))	344	if (IS_ENABLED(CONFIG_X86_32))
345	goto the_end;	345	goto the_end;
346		346
		347	if (state->task != current)
		348	goto the_end;
		349
347	if (state->regs) {	350	if (state->regs) {
348	printk_deferred_once(KERN_WARNING	351	printk_deferred_once(KERN_WARNING
349	"WARNING: kernel stack regs at %p in %s:%d has bad 'bp' value %p\n",	352	"WARNING: kernel stack regs at %p in %s:%d has bad 'bp' value %p\n",

arch/x86/kernel/unwind_orc.c+74−39

 #include <asm/orc_lookup.h>
 #define orc_warn(fmt, ...) \
-	printk_deferred_once(KERN_WARNING pr_fmt("WARNING: " fmt), ##__VA_ARGS__)
+	printk_deferred_once(KERN_WARNING "WARNING: " fmt, ##__VA_ARGS__)
+#define orc_warn_current(args...)					\
+({									\
+	if (state->task == current)					\
+		orc_warn(args);						\
+})
 extern int __start_orc_unwind_ip[];
 extern int __stop_orc_unwind_ip[];
 extern struct orc_entry __start_orc_unwind[];
 extern struct orc_entry __stop_orc_unwind[];
-static DEFINE_MUTEX(sort_mutex);
+static bool orc_init __ro_after_init;
-int *cur_orc_ip_table = __start_orc_unwind_ip;
+static unsigned int lookup_num_blocks __ro_after_init;
-struct orc_entry *cur_orc_table = __start_orc_unwind;
-unsigned int lookup_num_blocks;
-bool orc_init;
 static inline unsigned long orc_ip(const int *ip)
 {
 {
 	static struct orc_entry *orc;
-	if (!orc_init)
-		return NULL;
 	if (ip == 0)
 		return &null_orc_entry;
 #ifdef CONFIG_MODULES
+static DEFINE_MUTEX(sort_mutex);
+static int *cur_orc_ip_table = __start_orc_unwind_ip;
+static struct orc_entry *cur_orc_table = __start_orc_unwind;
 static void orc_sort_swap(void *_a, void *_b, int size)
 {
 	struct orc_entry *orc_a, *orc_b;
 	return true;
 }
+/*
+ * If state->regs is non-NULL, and points to a full pt_regs, just get the reg
+ * value from state->regs.
+ *
+ * Otherwise, if state->regs just points to IRET regs, and the previous frame
+ * had full regs, it's safe to get the value from the previous regs.  This can
+ * happen when early/late IRQ entry code gets interrupted by an NMI.
+ */
+static bool get_reg(struct unwind_state *state, unsigned int reg_off,
+		    unsigned long *val)
+{
+	unsigned int reg = reg_off/8;
+	if (!state->regs)
+		return false;
+	if (state->full_regs) {
+		*val = ((unsigned long *)state->regs)[reg];
+		return true;
+	}
+	if (state->prev_regs) {
+		*val = ((unsigned long *)state->prev_regs)[reg];
+		return true;
+	}
+	return false;
+}
 bool unwind_next_frame(struct unwind_state *state)
 {
-	unsigned long ip_p, sp, orig_ip = state->ip, prev_sp = state->sp;
+	unsigned long ip_p, sp, tmp, orig_ip = state->ip, prev_sp = state->sp;
 	enum stack_type prev_type = state->stack_info.type;
 	struct orc_entry *orc;
 	bool indirect = false;
 		break;
 	case ORC_REG_R10:
-		if (!state->regs || !state->full_regs) {
+		if (!get_reg(state, offsetof(struct pt_regs, r10), &sp)) {
-			orc_warn("missing regs for base reg R10 at ip %pB\n",
+			orc_warn_current("missing R10 value at %pB\n",
-				 (void *)state->ip);
+					 (void *)state->ip);
 			goto err;
 		}
-		sp = state->regs->r10;
 		break;
 	case ORC_REG_R13:
-		if (!state->regs || !state->full_regs) {
+		if (!get_reg(state, offsetof(struct pt_regs, r13), &sp)) {
-			orc_warn("missing regs for base reg R13 at ip %pB\n",
+			orc_warn_current("missing R13 value at %pB\n",
-				 (void *)state->ip);
+					 (void *)state->ip);
 			goto err;
 		}
-		sp = state->regs->r13;
 		break;
 	case ORC_REG_DI:
-		if (!state->regs || !state->full_regs) {
+		if (!get_reg(state, offsetof(struct pt_regs, di), &sp)) {
-			orc_warn("missing regs for base reg DI at ip %pB\n",
+			orc_warn_current("missing RDI value at %pB\n",
-				 (void *)state->ip);
+					 (void *)state->ip);
 			goto err;
 		}
-		sp = state->regs->di;
 		break;
 	case ORC_REG_DX:
-		if (!state->regs || !state->full_regs) {
+		if (!get_reg(state, offsetof(struct pt_regs, dx), &sp)) {
-			orc_warn("missing regs for base reg DX at ip %pB\n",
+			orc_warn_current("missing DX value at %pB\n",
-				 (void *)state->ip);
+					 (void *)state->ip);
 			goto err;
 		}
-		sp = state->regs->dx;
 		break;
 	default:
-		orc_warn("unknown SP base reg %d for ip %pB\n",
+		orc_warn("unknown SP base reg %d at %pB\n",
 			 orc->sp_reg, (void *)state->ip);
 		goto err;
 	}
 		state->sp = sp;
 		state->regs = NULL;
+		state->prev_regs = NULL;
 		state->signal = false;
 		break;
 	case ORC_TYPE_REGS:
 		if (!deref_stack_regs(state, sp, &state->ip, &state->sp)) {
-			orc_warn("can't dereference registers at %p for ip %pB\n",
+			orc_warn_current("can't access registers at %pB\n",
-				 (void *)sp, (void *)orig_ip);
+					 (void *)orig_ip);
 			goto err;
 		}
 		state->regs = (struct pt_regs *)sp;
+		state->prev_regs = NULL;
 		state->full_regs = true;
 		state->signal = true;
 		break;
 	case ORC_TYPE_REGS_IRET:
 		if (!deref_stack_iret_regs(state, sp, &state->ip, &state->sp)) {
-			orc_warn("can't dereference iret registers at %p for ip %pB\n",
+			orc_warn_current("can't access iret registers at %pB\n",
-				 (void *)sp, (void *)orig_ip);
+					 (void *)orig_ip);
 			goto err;
 		}
+		if (state->full_regs)
+			state->prev_regs = state->regs;
 		state->regs = (void *)sp - IRET_FRAME_OFFSET;
 		state->full_regs = false;
 		state->signal = true;
 		break;
 	default:
-		orc_warn("unknown .orc_unwind entry type %d for ip %pB\n",
+		orc_warn("unknown .orc_unwind entry type %d at %pB\n",
 			 orc->type, (void *)orig_ip);
-		break;
+		goto err;
 	}
 	/* Find BP: */
 	switch (orc->bp_reg) {
 	case ORC_REG_UNDEFINED:
-		if (state->regs && state->full_regs)
+		if (get_reg(state, offsetof(struct pt_regs, bp), &tmp))
-			state->bp = state->regs->bp;
+			state->bp = tmp;
 		break;
 	case ORC_REG_PREV_SP:
 	if (state->stack_info.type == prev_type &&
 	    on_stack(&state->stack_info, (void *)state->sp, sizeof(long)) &&
 	    state->sp <= prev_sp) {
-		orc_warn("stack going in the wrong direction? ip=%pB\n",
+		orc_warn_current("stack going in the wrong direction? at %pB\n",
-			 (void *)orig_ip);
+				 (void *)orig_ip);
 		goto err;
 	}
 void __unwind_start(struct unwind_state *state, struct task_struct *task,
 		    struct pt_regs *regs, unsigned long *first_frame)
 {
+	if (!orc_init)
+		goto done;
 	memset(state, 0, sizeof(*state));
 	state->task = task;
 	/* Otherwise, skip ahead to the user-specified starting frame: */
 	while (!unwind_done(state) &&
 	       (!on_stack(&state->stack_info, first_frame, sizeof(long)) ||
-			state->sp <= (unsigned long)first_frame))
+			state->sp < (unsigned long)first_frame))
 		unwind_next_frame(state);
 	return;

arch/x86/kvm/Makefile+4−0

@@ -3,6 +3,10 @@ · 2 unmodified lines
3	ccflags-y += -Iarch/x86/kvm	3	ccflags-y += -Iarch/x86/kvm
4	ccflags-$(CONFIG_KVM_WERROR) += -Werror	4	ccflags-$(CONFIG_KVM_WERROR) += -Werror
5		5
		6	ifeq ($(CONFIG_FRAME_POINTER),y)
		7	OBJECT_FILES_NON_STANDARD_vmenter.o := y
		8	endif
		9
6	KVM := ../../../virt/kvm	10	KVM := ../../../virt/kvm
7		11
8	kvm-y += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o \	12	kvm-y += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o \

arch/x86/kvm/ioapic.c+5−5

@@ -225,12 +225,12 @@ static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq, · 224 unmodified lines
225	}	225	}
226		226
227	/*	227	/*
228	* AMD SVM AVIC accelerate EOI write and do not trap,	228	* AMD SVM AVIC accelerate EOI write iff the interrupt is edge
229	* in-kernel IOAPIC will not be able to receive the EOI.	229	* triggered, in which case the in-kernel IOAPIC will not be able
230	* In this case, we do lazy update of the pending EOI when	230	* to receive the EOI. In this case, we do a lazy update of the
231	* trying to set IOAPIC irq.	231	* pending EOI when trying to set IOAPIC irq.
232	*/	232	*/
233	if (kvm_apicv_activated(ioapic->kvm))	233	if (edge && kvm_apicv_activated(ioapic->kvm))
234	ioapic_lazy_update_eoi(ioapic, irq);	234	ioapic_lazy_update_eoi(ioapic, irq);
235		235
236	/*	236	/*

arch/x86/kvm/svm/sev.c+6−2

 #include <linux/kernel.h>
 #include <linux/highmem.h>
 #include <linux/psp-sev.h>
+#include <linux/pagemap.h>
 #include <linux/swap.h>
 #include "x86.h"
 		return NULL;
 	/* Pin the user virtual address. */
-	npinned = get_user_pages_fast(uaddr, npages, FOLL_WRITE, pages);
+	npinned = get_user_pages_fast(uaddr, npages, write ? FOLL_WRITE : 0, pages);
 	if (npinned != npages) {
 		pr_err("SEV: Failure locking %lu pages.\n", npages);
 		goto err;
 	/* Maximum number of encrypted guests supported simultaneously */
 	max_sev_asid = cpuid_ecx(0x8000001F);
-	if (!max_sev_asid)
+	if (!svm_sev_enabled())
 		return 1;
 	/* Minimum ASID value that should be used for SEV guest */
 void sev_hardware_teardown(void)
 {
+	if (!svm_sev_enabled())
+		return;
 	bitmap_free(sev_asid_bitmap);
 	bitmap_free(sev_reclaim_asid_bitmap);

arch/x86/kvm/svm/svm.c+3−9

 	if (svm->vcpu.guest_debug &
 	    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)) {
 		kvm_run->exit_reason = KVM_EXIT_DEBUG;
+		kvm_run->debug.arch.dr6 = svm->vmcb->save.dr6;
+		kvm_run->debug.arch.dr7 = svm->vmcb->save.dr7;
 		kvm_run->debug.arch.pc =
 			svm->vmcb->save.cs.base + svm->vmcb->save.rip;
 		kvm_run->debug.arch.exception = DB_VECTOR;
 	svm_complete_interrupts(svm);
 }
-bool __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs);
+void __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs);
 static void svm_vcpu_run(struct kvm_vcpu *vcpu)
 {
 	 */
 	x86_spec_ctrl_set_guest(svm->spec_ctrl, svm->virt_spec_ctrl);
-	local_irq_enable();
 	__svm_vcpu_run(svm->vmcb_pa, (unsigned long *)&svm->vcpu.arch.regs);
-	/* Eliminate branch target predictions from guest mode */
-	vmexit_fill_RSB();
 #ifdef CONFIG_X86_64
 	wrmsrl(MSR_GS_BASE, svm->host.gs_base);
 #else
 	reload_tss(vcpu);
-	local_irq_disable();
 	x86_spec_ctrl_restore_host(svm->spec_ctrl, svm->virt_spec_ctrl);
 	vcpu->arch.cr2 = svm->vmcb->save.cr2;
 	mark_all_clean(svm->vmcb);
 }
-STACK_FRAME_NON_STANDARD(svm_vcpu_run);
 static void svm_load_mmu_pgd(struct kvm_vcpu *vcpu, unsigned long root)
 {

arch/x86/kvm/svm/vmenter.S+9−1

 #include <asm/asm.h>
 #include <asm/bitsperlong.h>
 #include <asm/kvm_vcpu_regs.h>
+#include <asm/nospec-branch.h>
 #define WORD_SIZE (BITS_PER_LONG / 8)
  */
 SYM_FUNC_START(__svm_vcpu_run)
 	push %_ASM_BP
-	mov  %_ASM_SP, %_ASM_BP
 #ifdef CONFIG_X86_64
 	push %r15
 	push %r14
 	pop %_ASM_AX
 	/* Enter guest mode */
+	sti
 1:	vmload %_ASM_AX
 	jmp 3f
 2:	cmpb $0, kvm_rebooting
 	ud2
 	_ASM_EXTABLE(5b, 6b)
 7:
+	cli
+#ifdef CONFIG_RETPOLINE
+	/* IMPORTANT: Stuff the RSB immediately after VM-Exit, before RET! */
+	FILL_RETURN_BUFFER %_ASM_AX, RSB_CLEAR_LOOPS, X86_FEATURE_RETPOLINE
+#endif
 	/* "POP" @regs to RAX. */
 	pop %_ASM_AX

arch/x86/kvm/vmx/nested.c+20−3

 	 */
 		break;
 	default:
-		BUG_ON(1);
+		BUG();
 		break;
 	}
 	return 1 & (b >> (field & 7));
 }
+static bool nested_vmx_exit_handled_mtf(struct vmcs12 *vmcs12)
+{
+	u32 entry_intr_info = vmcs12->vm_entry_intr_info_field;
+	if (nested_cpu_has_mtf(vmcs12))
+		return true;
+	/*
+	 * An MTF VM-exit may be injected into the guest by setting the
+	 * interruption-type to 7 (other event) and the vector field to 0. Such
+	 * is the case regardless of the 'monitor trap flag' VM-execution
+	 * control.
+	 */
+	return entry_intr_info == (INTR_INFO_VALID_MASK
+				   | INTR_TYPE_OTHER_EVENT);
+}
 /*
- * Return 1 if we should exit from L2 to L1 to handle an exit, or 0 if we
+ * Return true if we should exit from L2 to L1 to handle an exit, or false if we
  * should handle it ourselves in L0 (and then continue L2). Only call this
  * when in is_guest_mode (L2).
  */
 	case EXIT_REASON_MWAIT_INSTRUCTION:
 		return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING);
 	case EXIT_REASON_MONITOR_TRAP_FLAG:
-		return nested_cpu_has_mtf(vmcs12);
+		return nested_vmx_exit_handled_mtf(vmcs12);
 	case EXIT_REASON_MONITOR_INSTRUCTION:
 		return nested_cpu_has(vmcs12, CPU_BASED_MONITOR_EXITING);
 	case EXIT_REASON_PAUSE_INSTRUCTION:

arch/x86/kvm/vmx/vmenter.S+3−0

@@ -82,6 +82,9 @@ SYM_FUNC_START(vmx_vmexit) · 81 unmodified lines
82	/* IMPORTANT: Stuff the RSB immediately after VM-Exit, before RET! */	82	/* IMPORTANT: Stuff the RSB immediately after VM-Exit, before RET! */
83	FILL_RETURN_BUFFER %_ASM_AX, RSB_CLEAR_LOOPS, X86_FEATURE_RETPOLINE	83	FILL_RETURN_BUFFER %_ASM_AX, RSB_CLEAR_LOOPS, X86_FEATURE_RETPOLINE
84		84
		85	/* Clear RFLAGS.CF and RFLAGS.ZF to preserve VM-Exit, i.e. !VM-Fail. */
		86	or $1, %_ASM_AX
		87
85	pop %_ASM_AX	88	pop %_ASM_AX
86	.Lvmexit_skip_rsb:	89	.Lvmexit_skip_rsb:
87	#endif	90	#endif

arch/x86/kvm/vmx/vmx.c+1−1

@@ -4572,7 +4572,7 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu, · 4571 unmodified lines
4572	*/	4572	*/
4573	static void kvm_machine_check(void)	4573	static void kvm_machine_check(void)
4574	{	4574	{
4575	#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)	4575	#if defined(CONFIG_X86_MCE)
4576	struct pt_regs regs = {	4576	struct pt_regs regs = {
4577	.cs = 3, /* Fake ring 3 no matter what the guest ran on */	4577	.cs = 3, /* Fake ring 3 no matter what the guest ran on */
4578	.flags = X86_EFLAGS_IF,	4578	.flags = X86_EFLAGS_IF,

arch/x86/kvm/x86.c+25−17

 	__reserved_bits;				\
 })
-static u64 kvm_host_cr4_reserved_bits(struct cpuinfo_x86 *c)
-{
-	u64 reserved_bits = __cr4_reserved_bits(cpu_has, c);
-	if (kvm_cpu_cap_has(X86_FEATURE_LA57))
-		reserved_bits &= ~X86_CR4_LA57;
-	if (kvm_cpu_cap_has(X86_FEATURE_UMIP))
-		reserved_bits &= ~X86_CR4_UMIP;
-	return reserved_bits;
-}
 static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 {
 	if (cr4 & cr4_reserved_bits)
 	case MSR_IA32_PERF_CTL:
 	case MSR_AMD64_DC_CFG:
 	case MSR_F15H_EX_CFG:
+	/*
+	 * Intel Sandy Bridge CPUs must support the RAPL (running average power
+	 * limit) MSRs. Just return 0, as we do not want to expose the host
+	 * data here. Do not conditionalize this on CPUID, as KVM does not do
+	 * so for existing CPU-specific MSRs.
+	 */
+	case MSR_RAPL_POWER_UNIT:
+	case MSR_PP0_ENERGY_STATUS:	/* Power plane 0 (core) */
+	case MSR_PP1_ENERGY_STATUS:	/* Power plane 1 (graphics uncore) */
+	case MSR_PKG_ENERGY_STATUS:	/* Total package */
+	case MSR_DRAM_ENERGY_STATUS:	/* DRAM controller */
 		msr_info->data = 0;
 		break;
 	case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
 	case KVM_CAP_GET_MSR_FEATURES:
 	case KVM_CAP_MSR_PLATFORM_INFO:
 	case KVM_CAP_EXCEPTION_PAYLOAD:
+	case KVM_CAP_SET_GUEST_DEBUG:
 		r = 1;
 		break;
 	case KVM_CAP_SYNC_REGS:
 		r = -EFAULT;
 		if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
 			goto out;
+		mutex_lock(&kvm->lock);
 		r = -ENXIO;
 		if (!kvm->arch.vpit)
-			goto out;
+			goto set_pit_out;
 		r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
+set_pit_out:
+		mutex_unlock(&kvm->lock);
 		break;
 	}
 	case KVM_GET_PIT2: {
 		r = -EFAULT;
 		if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
 			goto out;
+		mutex_lock(&kvm->lock);
 		r = -ENXIO;
 		if (!kvm->arch.vpit)
-			goto out;
+			goto set_pit2_out;
 		r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
+set_pit2_out:
+		mutex_unlock(&kvm->lock);
 		break;
 	}
 	case KVM_REINJECT_CONTROL: {
 	if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
 		supported_xss = 0;
-	cr4_reserved_bits = kvm_host_cr4_reserved_bits(&boot_cpu_data);
+#define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
+	cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
+#undef __kvm_cpu_cap_has
 	if (kvm_has_tsc_control) {
 		/*
 	WARN_ON(!irqs_disabled());
-	if (kvm_host_cr4_reserved_bits(c) != cr4_reserved_bits)
+	if (__cr4_reserved_bits(cpu_has, c) !=
+	    __cr4_reserved_bits(cpu_has, &boot_cpu_data))
 		return -EIO;
 	return ops->check_processor_compatibility();

arch/x86/mm/pat/set_memory.c+8−4

 	unsigned long	pfn;
 	unsigned int	flags;
 	unsigned int	force_split		: 1,
-			force_static_prot	: 1;
+			force_static_prot	: 1,
+			force_flush_all		: 1;
 	struct page	**pages;
 };
 		return;
 	}
-	if (cpa->numpages <= tlb_single_page_flush_ceiling)
+	if (cpa->force_flush_all || cpa->numpages > tlb_single_page_flush_ceiling)
-		on_each_cpu(__cpa_flush_tlb, cpa, 1);
-	else
 		flush_tlb_all();
+	else
+		on_each_cpu(__cpa_flush_tlb, cpa, 1);
 	if (!cache)
 		return;
 		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 		alias_cpa.curpage = 0;
+		cpa->force_flush_all = 1;
 		ret = __change_page_attr_set_clr(&alias_cpa, 0);
 		if (ret)
 			return ret;
 		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 		alias_cpa.curpage = 0;
+		cpa->force_flush_all = 1;
 		/*
 		 * The high mapping range is imprecise, so ignore the
 		 * return value.

arch/x86/net/bpf_jit_comp.c+15−3

 			     BIT(BPF_REG_AX));
 }
+/*
+ * is_ereg_8l() == true if BPF register 'reg' is mapped to access x86-64
+ * lower 8-bit registers dil,sil,bpl,spl,r8b..r15b, which need extra byte
+ * of encoding. al,cl,dl,bl have simpler encoding.
+ */
+static bool is_ereg_8l(u32 reg)
+{
+	return is_ereg(reg) ||
+	    (1 << reg) & (BIT(BPF_REG_1) |
+			  BIT(BPF_REG_2) |
+			  BIT(BPF_REG_FP));
+}
 static bool is_axreg(u32 reg)
 {
 	return reg == BPF_REG_0;
 	switch (size) {
 	case BPF_B:
 		/* Emit 'mov byte ptr [rax + off], al' */
-		if (is_ereg(dst_reg) || is_ereg(src_reg) ||
+		if (is_ereg(dst_reg) || is_ereg_8l(src_reg))
-		    /* We have to add extra byte for x86 SIL, DIL regs */
+			/* Add extra byte for eregs or SIL,DIL,BPL in src_reg */
-		    src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
 			EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
 		else
 			EMIT1(0x88);

arch/x86/net/bpf_jit_comp32.c+22−6

 			case BPF_B:
 			case BPF_H:
 			case BPF_W:
-				if (!bpf_prog->aux->verifier_zext)
+				if (bpf_prog->aux->verifier_zext)
 					break;
 				if (dstk) {
 					EMIT3(0xC7, add_1reg(0x40, IA32_EBP),
 					      STACK_VAR(dst_hi));
 					EMIT(0x0, 4);
 				} else {
-					EMIT3(0xC7, add_1reg(0xC0, dst_hi), 0);
+					/* xor dst_hi,dst_hi */
+					EMIT2(0x33,
+					      add_2reg(0xC0, dst_hi, dst_hi));
 				}
 				break;
 			case BPF_DW:
 		case BPF_JMP | BPF_JSET | BPF_X:
 		case BPF_JMP32 | BPF_JSET | BPF_X: {
 			bool is_jmp64 = BPF_CLASS(insn->code) == BPF_JMP;
-			u8 dreg_lo = dstk ? IA32_EAX : dst_lo;
+			u8 dreg_lo = IA32_EAX;
-			u8 dreg_hi = dstk ? IA32_EDX : dst_hi;
+			u8 dreg_hi = IA32_EDX;
 			u8 sreg_lo = sstk ? IA32_ECX : src_lo;
 			u8 sreg_hi = sstk ? IA32_EBX : src_hi;
 					      add_2reg(0x40, IA32_EBP,
 						       IA32_EDX),
 					      STACK_VAR(dst_hi));
+			} else {
+				/* mov dreg_lo,dst_lo */
+				EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));
+				if (is_jmp64)
+					/* mov dreg_hi,dst_hi */
+					EMIT2(0x89,
+					      add_2reg(0xC0, dreg_hi, dst_hi));
 			}
 			if (sstk) {
 		case BPF_JMP | BPF_JSET | BPF_K:
 		case BPF_JMP32 | BPF_JSET | BPF_K: {
 			bool is_jmp64 = BPF_CLASS(insn->code) == BPF_JMP;
-			u8 dreg_lo = dstk ? IA32_EAX : dst_lo;
+			u8 dreg_lo = IA32_EAX;
-			u8 dreg_hi = dstk ? IA32_EDX : dst_hi;
+			u8 dreg_hi = IA32_EDX;
 			u8 sreg_lo = IA32_ECX;
 			u8 sreg_hi = IA32_EBX;
 			u32 hi;
 					      add_2reg(0x40, IA32_EBP,
 						       IA32_EDX),
 					      STACK_VAR(dst_hi));
+			} else {
+				/* mov dreg_lo,dst_lo */
+				EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));
+				if (is_jmp64)
+					/* mov dreg_hi,dst_hi */
+					EMIT2(0x89,
+					      add_2reg(0xC0, dreg_hi, dst_hi));
 			}
 			/* mov ecx,imm32 */

arch/xtensa/include/asm/vermagic.hrenamed from arch/xtensa/include/asm/module.h+6−9

 /*
- * include/asm-xtensa/module.h
- *
- * This file contains the module code specific to the Xtensa architecture.
- *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  * Copyright (C) 2001 - 2005 Tensilica Inc.
  */
-#ifndef _XTENSA_MODULE_H
+#ifndef _ASM_VERMAGIC_H
-#define _XTENSA_MODULE_H
+#define _ASM_VERMAGIC_H
-#define MODULE_ARCH_VERMAGIC "xtensa-" __stringify(XCHAL_CORE_ID) " "
+#include <linux/stringify.h>
+#include <variant/core.h>
-#include <asm-generic/module.h>
+#define MODULE_ARCH_VERMAGIC "xtensa-" __stringify(XCHAL_CORE_ID) " "
-#endif	/* _XTENSA_MODULE_H */
+#endif	/* _ASM_VERMAGIC_H */

block/bfq-iosched.c+4−2

 #include <linux/ioprio.h>
 #include <linux/sbitmap.h>
 #include <linux/delay.h>
+#include <linux/backing-dev.h>
 #include "blk.h"
 #include "blk-mq.h"
 	ioprio_class = IOPRIO_PRIO_CLASS(bic->ioprio);
 	switch (ioprio_class) {
 	default:
-		dev_err(bfqq->bfqd->queue->backing_dev_info->dev,
+		pr_err("bdi %s: bfq: bad prio class %d\n",
-			"bfq: bad prio class %d\n", ioprio_class);
+				bdi_dev_name(bfqq->bfqd->queue->backing_dev_info),
+				ioprio_class);
 		/* fall through */
 	case IOPRIO_CLASS_NONE:
 		/*

block/blk-cgroup.c+1−1

@@ -496,7 +496,7 @@ const char blkg_dev_name(struct blkcg_gq blkg) · 495 unmodified lines
496	{	496	{
497	/* some drivers (floppy) instantiate a queue w/o disk registered */	497	/* some drivers (floppy) instantiate a queue w/o disk registered */
498	if (blkg->q->backing_dev_info->dev)	498	if (blkg->q->backing_dev_info->dev)
499	return dev_name(blkg->q->backing_dev_info->dev);	499	return bdi_dev_name(blkg->q->backing_dev_info);
500	return NULL;	500	return NULL;
501	}	501	}
502		502

block/blk-iocost.c+73−48

 	 */
 	atomic64_t			vtime;
 	atomic64_t			done_vtime;
-	atomic64_t			abs_vdebt;
+	u64				abs_vdebt;
 	u64				last_vtime;
 	/*
 	struct iocg_wake_ctx ctx = { .iocg = iocg };
 	u64 margin_ns = (u64)(ioc->period_us *
 			      WAITQ_TIMER_MARGIN_PCT / 100) * NSEC_PER_USEC;
-	u64 abs_vdebt, vdebt, vshortage, expires, oexpires;
+	u64 vdebt, vshortage, expires, oexpires;
 	s64 vbudget;
 	u32 hw_inuse;
 	vbudget = now->vnow - atomic64_read(&iocg->vtime);
 	/* pay off debt */
-	abs_vdebt = atomic64_read(&iocg->abs_vdebt);
+	vdebt = abs_cost_to_cost(iocg->abs_vdebt, hw_inuse);
-	vdebt = abs_cost_to_cost(abs_vdebt, hw_inuse);
 	if (vdebt && vbudget > 0) {
 		u64 delta = min_t(u64, vbudget, vdebt);
 		u64 abs_delta = min(cost_to_abs_cost(delta, hw_inuse),
-				    abs_vdebt);
+				    iocg->abs_vdebt);
 		atomic64_add(delta, &iocg->vtime);
 		atomic64_add(delta, &iocg->done_vtime);
-		atomic64_sub(abs_delta, &iocg->abs_vdebt);
+		iocg->abs_vdebt -= abs_delta;
-		if (WARN_ON_ONCE(atomic64_read(&iocg->abs_vdebt) < 0))
-			atomic64_set(&iocg->abs_vdebt, 0);
 	}
 	/*
 	u64 expires, oexpires;
 	u32 hw_inuse;
+	lockdep_assert_held(&iocg->waitq.lock);
 	/* debt-adjust vtime */
 	current_hweight(iocg, NULL, &hw_inuse);
-	vtime += abs_cost_to_cost(atomic64_read(&iocg->abs_vdebt), hw_inuse);
+	vtime += abs_cost_to_cost(iocg->abs_vdebt, hw_inuse);
-	/* clear or maintain depending on the overage */
+	/*
-	if (time_before_eq64(vtime, now->vnow)) {
+	 * Clear or maintain depending on the overage. Non-zero vdebt is what
+	 * guarantees that @iocg is online and future iocg_kick_delay() will
+	 * clear use_delay. Don't leave it on when there's no vdebt.
+	 */
+	if (!iocg->abs_vdebt || time_before_eq64(vtime, now->vnow)) {
 		blkcg_clear_delay(blkg);
 		return false;
 	}
 {
 	struct ioc_gq *iocg = container_of(timer, struct ioc_gq, delay_timer);
 	struct ioc_now now;
+	unsigned long flags;
+	spin_lock_irqsave(&iocg->waitq.lock, flags);
 	ioc_now(iocg->ioc, &now);
 	iocg_kick_delay(iocg, &now, 0);
+	spin_unlock_irqrestore(&iocg->waitq.lock, flags);
 	return HRTIMER_NORESTART;
 }
 	 * should have woken up in the last period and expire idle iocgs.
 	 */
 	list_for_each_entry_safe(iocg, tiocg, &ioc->active_iocgs, active_list) {
-		if (!waitqueue_active(&iocg->waitq) &&
+		if (!waitqueue_active(&iocg->waitq) && iocg->abs_vdebt &&
-		    !atomic64_read(&iocg->abs_vdebt) && !iocg_is_idle(iocg))
+		    !iocg_is_idle(iocg))
 			continue;
 		spin_lock(&iocg->waitq.lock);
-		if (waitqueue_active(&iocg->waitq) ||
+		if (waitqueue_active(&iocg->waitq) || iocg->abs_vdebt) {
-		    atomic64_read(&iocg->abs_vdebt)) {
 			/* might be oversleeping vtime / hweight changes, kick */
 			iocg_kick_waitq(iocg, &now);
 			iocg_kick_delay(iocg, &now, 0);
 				      vrate_min, vrate_max);
 		}
-		trace_iocost_ioc_vrate_adj(ioc, vrate, &missed_ppm, rq_wait_pct,
+		trace_iocost_ioc_vrate_adj(ioc, vrate, missed_ppm, rq_wait_pct,
 					   nr_lagging, nr_shortages,
 					   nr_surpluses);
 			ioc->period_us * vrate * INUSE_MARGIN_PCT, 100);
 	} else if (ioc->busy_level != prev_busy_level || nr_lagging) {
 		trace_iocost_ioc_vrate_adj(ioc, atomic64_read(&ioc->vtime_rate),
-					   &missed_ppm, rq_wait_pct, nr_lagging,
+					   missed_ppm, rq_wait_pct, nr_lagging,
 					   nr_shortages, nr_surpluses);
 	}
 	 * tests are racy but the races aren't systemic - we only miss once
 	 * in a while which is fine.
 	 */
-	if (!waitqueue_active(&iocg->waitq) &&
+	if (!waitqueue_active(&iocg->waitq) && !iocg->abs_vdebt &&
-	    !atomic64_read(&iocg->abs_vdebt) &&
 	    time_before_eq64(vtime + cost, now.vnow)) {
 		iocg_commit_bio(iocg, bio, cost);
 		return;
 	}
 	/*
-	 * We're over budget.  If @bio has to be issued regardless,
+	 * We activated above but w/o any synchronization. Deactivation is
-	 * remember the abs_cost instead of advancing vtime.
+	 * synchronized with waitq.lock and we won't get deactivated as long
-	 * iocg_kick_waitq() will pay off the debt before waking more IOs.
+	 * as we're waiting or has debt, so we're good if we're activated
+	 * here. In the unlikely case that we aren't, just issue the IO.
+	 */
+	spin_lock_irq(&iocg->waitq.lock);
+	if (unlikely(list_empty(&iocg->active_list))) {
+		spin_unlock_irq(&iocg->waitq.lock);
+		iocg_commit_bio(iocg, bio, cost);
+		return;
+	}
+	/*
+	 * We're over budget. If @bio has to be issued regardless, remember
+	 * the abs_cost instead of advancing vtime. iocg_kick_waitq() will pay
+	 * off the debt before waking more IOs.
+	 *
 	 * This way, the debt is continuously paid off each period with the
-	 * actual budget available to the cgroup.  If we just wound vtime,
+	 * actual budget available to the cgroup. If we just wound vtime, we
-	 * we would incorrectly use the current hw_inuse for the entire
+	 * would incorrectly use the current hw_inuse for the entire amount
-	 * amount which, for example, can lead to the cgroup staying
+	 * which, for example, can lead to the cgroup staying blocked for a
-	 * blocked for a long time even with substantially raised hw_inuse.
+	 * long time even with substantially raised hw_inuse.
+	 *
+	 * An iocg with vdebt should stay online so that the timer can keep
+	 * deducting its vdebt and [de]activate use_delay mechanism
+	 * accordingly. We don't want to race against the timer trying to
+	 * clear them and leave @iocg inactive w/ dangling use_delay heavily
+	 * penalizing the cgroup and its descendants.
 	 */
 	if (bio_issue_as_root_blkg(bio) || fatal_signal_pending(current)) {
-		atomic64_add(abs_cost, &iocg->abs_vdebt);
+		iocg->abs_vdebt += abs_cost;
 		if (iocg_kick_delay(iocg, &now, cost))
 			blkcg_schedule_throttle(rqos->q,
 					(bio->bi_opf & REQ_SWAP) == REQ_SWAP);
+		spin_unlock_irq(&iocg->waitq.lock);
 		return;
 	}
 	 * All waiters are on iocg->waitq and the wait states are
 	 * synchronized using waitq.lock.
 	 */
-	spin_lock_irq(&iocg->waitq.lock);
-	/*
-	 * We activated above but w/o any synchronization.  Deactivation is
-	 * synchronized with waitq.lock and we won't get deactivated as
-	 * long as we're waiting, so we're good if we're activated here.
-	 * In the unlikely case that we are deactivated, just issue the IO.
-	 */
-	if (unlikely(list_empty(&iocg->active_list))) {
-		spin_unlock_irq(&iocg->waitq.lock);
-		iocg_commit_bio(iocg, bio, cost);
-		return;
-	}
 	init_waitqueue_func_entry(&wait.wait, iocg_wake_fn);
 	wait.wait.private = current;
 	wait.bio = bio;
 	struct ioc_now now;
 	u32 hw_inuse;
 	u64 abs_cost, cost;
+	unsigned long flags;
 	/* bypass if disabled or for root cgroup */
 	if (!ioc->enabled || !iocg->level)
 		iocg->cursor = bio_end;
 	/*
-	 * Charge if there's enough vtime budget and the existing request
+	 * Charge if there's enough vtime budget and the existing request has
-	 * has cost assigned.  Otherwise, account it as debt.  See debt
+	 * cost assigned.
-	 * handling in ioc_rqos_throttle() for details.
 	 */
 	if (rq->bio && rq->bio->bi_iocost_cost &&
-	    time_before_eq64(atomic64_read(&iocg->vtime) + cost, now.vnow))
+	    time_before_eq64(atomic64_read(&iocg->vtime) + cost, now.vnow)) {
 		iocg_commit_bio(iocg, bio, cost);
-	else
+		return;
-		atomic64_add(abs_cost, &iocg->abs_vdebt);
+	}
+	/*
+	 * Otherwise, account it as debt if @iocg is online, which it should
+	 * be for the vast majority of cases. See debt handling in
+	 * ioc_rqos_throttle() for details.
+	 */
+	spin_lock_irqsave(&iocg->waitq.lock, flags);
+	if (likely(!list_empty(&iocg->active_list))) {
+		iocg->abs_vdebt += abs_cost;
+		iocg_kick_delay(iocg, &now, cost);
+	} else {
+		iocg_commit_bio(iocg, bio, cost);
+	}
+	spin_unlock_irqrestore(&iocg->waitq.lock, flags);
 }
 static void ioc_rqos_done_bio(struct rq_qos *rqos, struct bio *bio)
 	iocg->ioc = ioc;
 	atomic64_set(&iocg->vtime, now.vnow);
 	atomic64_set(&iocg->done_vtime, now.vnow);
-	atomic64_set(&iocg->abs_vdebt, 0);
 	atomic64_set(&iocg->active_period, atomic64_read(&ioc->cur_period));
 	INIT_LIST_HEAD(&iocg->active_list);
 	iocg->hweight_active = HWEIGHT_WHOLE;

block/partitions/core.c+1−1

@@ -496,7 +496,7 @@ int blk_drop_partitions(struct gendisk disk, struct block_device bdev) · 495 unmodified lines
496		496
497	if (!disk_part_scan_enabled(disk))	497	if (!disk_part_scan_enabled(disk))
498	return 0;	498	return 0;
499	if (bdev->bd_part_count \|\| bdev->bd_openers > 1)	499	if (bdev->bd_part_count)
500	return -EBUSY;	500	return -EBUSY;
501	res = invalidate_partition(disk, 0);	501	res = invalidate_partition(disk, 0);
502	if (res)	502	if (res)

crypto/lrw.c+3−3

@@ -287,7 +287,7 @@ static void exit_tfm(struct crypto_skcipher *tfm) · 286 unmodified lines
287	crypto_free_skcipher(ctx->child);	287	crypto_free_skcipher(ctx->child);
288	}	288	}
289		289
290	static void free(struct skcipher_instance *inst)	290	static void free_inst(struct skcipher_instance *inst)
291	{	291	{
292	crypto_drop_skcipher(skcipher_instance_ctx(inst));	292	crypto_drop_skcipher(skcipher_instance_ctx(inst));
293	kfree(inst);	293	kfree(inst);
@@ -400,12 +400,12 @@ static int create(struct crypto_template tmpl, struct rtattr *tb) · 106 unmodified lines
400	inst->alg.encrypt = encrypt;	400	inst->alg.encrypt = encrypt;
401	inst->alg.decrypt = decrypt;	401	inst->alg.decrypt = decrypt;
402		402
403	inst->free = free;	403	inst->free = free_inst;
404		404
405	err = skcipher_register_instance(tmpl, inst);	405	err = skcipher_register_instance(tmpl, inst);
406	if (err) {	406	if (err) {
407	err_free_inst:	407	err_free_inst:
408	free(inst);	408	free_inst(inst);
409	}	409	}
410	return err;	410	return err;
411	}	411	}

crypto/xts.c+3−3

@@ -322,7 +322,7 @@ static void exit_tfm(struct crypto_skcipher *tfm) · 321 unmodified lines
322	crypto_free_cipher(ctx->tweak);	322	crypto_free_cipher(ctx->tweak);
323	}	323	}
324		324
325	static void free(struct skcipher_instance *inst)	325	static void free_inst(struct skcipher_instance *inst)
326	{	326	{
327	crypto_drop_skcipher(skcipher_instance_ctx(inst));	327	crypto_drop_skcipher(skcipher_instance_ctx(inst));
328	kfree(inst);	328	kfree(inst);
@@ -434,12 +434,12 @@ static int create(struct crypto_template tmpl, struct rtattr *tb) · 105 unmodified lines
434	inst->alg.encrypt = encrypt;	434	inst->alg.encrypt = encrypt;
435	inst->alg.decrypt = decrypt;	435	inst->alg.decrypt = decrypt;
436		436
437	inst->free = free;	437	inst->free = free_inst;
438		438
439	err = skcipher_register_instance(tmpl, inst);	439	err = skcipher_register_instance(tmpl, inst);
440	if (err) {	440	if (err) {
441	err_free_inst:	441	err_free_inst:
442	free(inst);	442	free_inst(inst);
443	}	443	}
444	return err;	444	return err;
445	}	445	}

drivers/acpi/button.c+0−12

@@ -87,18 +87,6 @@ static const struct dmi_system_id dmi_lid_quirks[] = { · 86 unmodified lines
87	},	87	},
88	.driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_DISABLED,	88	.driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_DISABLED,
89	},	89	},
90	{
91	/*
92	* Asus T200TA, _LID keeps reporting closed after every second
93	* openening of the lid. Causing immediate re-suspend after
94	* opening every other open. Using LID_INIT_OPEN fixes this.
95	*/
96	.matches = {
97	DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
98	DMI_MATCH(DMI_PRODUCT_NAME, "T200TA"),
99	},
100	.driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_OPEN,
101	},
102	{	90	{
103	/* GP-electronic T701, _LID method points to a floating GPIO */	91	/* GP-electronic T701, _LID method points to a floating GPIO */
104	.matches = {	92	.matches = {

drivers/acpi/device_pm.c+2−2

@@ -273,13 +273,13 @@ int acpi_device_set_power(struct acpi_device *device, int state) · 272 unmodified lines
273	end:	273	end:
274	if (result) {	274	if (result) {
275	dev_warn(&device->dev, "Failed to change power state to %s\n",	275	dev_warn(&device->dev, "Failed to change power state to %s\n",
276	acpi_power_state_string(state));	276	acpi_power_state_string(target_state));
277	} else {	277	} else {
278	device->power.state = target_state;	278	device->power.state = target_state;
279	ACPI_DEBUG_PRINT((ACPI_DB_INFO,	279	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
280	"Device [%s] transitioned to %s\n",	280	"Device [%s] transitioned to %s\n",
281	device->pnp.bus_id,	281	device->pnp.bus_id,
282	acpi_power_state_string(state)));	282	acpi_power_state_string(target_state)));
283	}	283	}
284		284
285	return result;	285	return result;

drivers/acpi/pci_link.c+2−2

@@ -322,10 +322,10 @@ static int acpi_pci_link_set(struct acpi_pci_link *link, int irq) · 321 unmodified lines
322	resource->res.data.extended_irq.polarity =	322	resource->res.data.extended_irq.polarity =
323	link->irq.polarity;	323	link->irq.polarity;
324	if (link->irq.triggering == ACPI_EDGE_SENSITIVE)	324	if (link->irq.triggering == ACPI_EDGE_SENSITIVE)
325	resource->res.data.irq.shareable =	325	resource->res.data.extended_irq.shareable =
326	ACPI_EXCLUSIVE;	326	ACPI_EXCLUSIVE;
327	else	327	else
328	resource->res.data.irq.shareable = ACPI_SHARED;	328	resource->res.data.extended_irq.shareable = ACPI_SHARED;
329	resource->res.data.extended_irq.interrupt_count = 1;	329	resource->res.data.extended_irq.interrupt_count = 1;
330	resource->res.data.extended_irq.interrupts[0] = irq;	330	resource->res.data.extended_irq.interrupts[0] = irq;
331	/* ignore resource_source, it's optional */	331	/* ignore resource_source, it's optional */

drivers/amba/bus.c+1−0

@@ -645,6 +645,7 @@ static void amba_device_initialize(struct amba_device dev, const char name) · 644 unmodified lines
645	dev->dev.release = amba_device_release;	645	dev->dev.release = amba_device_release;
646	dev->dev.bus = &amba_bustype;	646	dev->dev.bus = &amba_bustype;
647	dev->dev.dma_mask = &dev->dev.coherent_dma_mask;	647	dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
		648	dev->dev.dma_parms = &dev->dma_parms;
648	dev->res.name = dev_name(&dev->dev);	649	dev->res.name = dev_name(&dev->dev);
649	}	650	}
650		651

drivers/ata/sata_inic162x.c+1−1

@@ -145,7 +145,7 @@ enum { · 144 unmodified lines
145		145
146	/* PORT_IDMA_CTL bits */	146	/* PORT_IDMA_CTL bits */
147	IDMA_CTL_RST_ATA = (1 << 2), /* hardreset ATA bus */	147	IDMA_CTL_RST_ATA = (1 << 2), /* hardreset ATA bus */
148	IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinary */	148	IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinery */
149	IDMA_CTL_GO = (1 << 7), /* IDMA mode go */	149	IDMA_CTL_GO = (1 << 7), /* IDMA mode go */
150	IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */	150	IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */
151		151

drivers/base/component.c+5−3

 	ret = master->ops->bind(master->dev);
 	if (ret < 0) {
 		devres_release_group(master->dev, NULL);
-		dev_info(master->dev, "master bind failed: %d\n", ret);
+		if (ret != -EPROBE_DEFER)
+			dev_info(master->dev, "master bind failed: %d\n", ret);
 		return ret;
 	}
 		devres_release_group(component->dev, NULL);
 		devres_release_group(master->dev, NULL);
-		dev_err(master->dev, "failed to bind %s (ops %ps): %d\n",
+		if (ret != -EPROBE_DEFER)
-			dev_name(component->dev), component->ops, ret);
+			dev_err(master->dev, "failed to bind %s (ops %ps): %d\n",
+				dev_name(component->dev), component->ops, ret);
 	}
 	return ret;

drivers/base/core.c+6−1

 	return fw_devlink_flags;
 }
+static bool fw_devlink_is_permissive(void)
+{
+	return fw_devlink_flags == DL_FLAG_SYNC_STATE_ONLY;
+}
 /**
  * device_add - add device to device hierarchy.
  * @dev: device.
 	if (fw_devlink_flags && is_fwnode_dev &&
 	    fwnode_has_op(dev->fwnode, add_links)) {
 		fw_ret = fwnode_call_int_op(dev->fwnode, add_links, dev);
-		if (fw_ret == -ENODEV)
+		if (fw_ret == -ENODEV && !fw_devlink_is_permissive())
 			device_link_wait_for_mandatory_supplier(dev);
 		else if (fw_ret)
 			device_link_wait_for_optional_supplier(dev);

drivers/base/dd.c+8−12

 }
 DEFINE_SHOW_ATTRIBUTE(deferred_devs);
-#ifdef CONFIG_MODULES
+int driver_deferred_probe_timeout;
-/*
- * In the case of modules, set the default probe timeout to
- * 30 seconds to give userland some time to load needed modules
- */
-int driver_deferred_probe_timeout = 30;
-#else
-/* In the case of !modules, no probe timeout needed */
-int driver_deferred_probe_timeout = -1;
-#endif
 EXPORT_SYMBOL_GPL(driver_deferred_probe_timeout);
+static DECLARE_WAIT_QUEUE_HEAD(probe_timeout_waitqueue);
 static int __init deferred_probe_timeout_setup(char *str)
 {
 		return -ENODEV;
 	}
-	if (!driver_deferred_probe_timeout) {
+	if (!driver_deferred_probe_timeout && initcalls_done) {
-		dev_WARN(dev, "deferred probe timeout, ignoring dependency");
+		dev_warn(dev, "deferred probe timeout, ignoring dependency");
 		return -ETIMEDOUT;
 	}
 	list_for_each_entry_safe(private, p, &deferred_probe_pending_list, deferred_probe)
 		dev_info(private->device, "deferred probe pending");
+	wake_up(&probe_timeout_waitqueue);
 }
 static DECLARE_DELAYED_WORK(deferred_probe_timeout_work, deferred_probe_timeout_work_func);
  */
 void wait_for_device_probe(void)
 {
+	/* wait for probe timeout */
+	wait_event(probe_timeout_waitqueue, !driver_deferred_probe_timeout);
 	/* wait for the deferred probe workqueue to finish */
 	flush_work(&deferred_probe_work);

drivers/base/firmware_loader/fallback_table.c+0−1

@@ -45,5 +45,4 @@ struct ctl_table firmware_config_table[] = { · 44 unmodified lines
45	},	45	},
46	{ }	46	{ }
47	};	47	};
48	EXPORT_SYMBOL_GPL(firmware_config_table);
49	#endif	48	#endif

drivers/base/platform.c+2−0

@@ -380,6 +380,8 @@ struct platform_object { · 379 unmodified lines
380	*/	380	*/
381	static void setup_pdev_dma_masks(struct platform_device *pdev)	381	static void setup_pdev_dma_masks(struct platform_device *pdev)
382	{	382	{
		383	pdev->dev.dma_parms = &pdev->dma_parms;
		384
383	if (!pdev->dev.coherent_dma_mask)	385	if (!pdev->dev.coherent_dma_mask)
384	pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);	386	pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
385	if (!pdev->dev.dma_mask) {	387	if (!pdev->dev.dma_mask) {

drivers/base/power/main.c+1−1

@@ -730,7 +730,7 @@ static bool dpm_async_fn(struct device *dev, async_func_t func) · 729 unmodified lines
730		730
731	if (is_async(dev)) {	731	if (is_async(dev)) {
732	get_device(dev);	732	get_device(dev);
733	async_schedule(func, dev);	733	async_schedule_dev(func, dev);
734	return true;	734	return true;
735	}	735	}
736		736

drivers/block/null_blk.h+19−10

 	char disk_name[DISK_NAME_LEN];
 };
+blk_status_t null_process_cmd(struct nullb_cmd *cmd,
+			      enum req_opf op, sector_t sector,
+			      unsigned int nr_sectors);
 #ifdef CONFIG_BLK_DEV_ZONED
-int null_zone_init(struct nullb_device *dev);
+int null_init_zoned_dev(struct nullb_device *dev, struct request_queue *q);
-void null_zone_exit(struct nullb_device *dev);
+int null_register_zoned_dev(struct nullb *nullb);
+void null_free_zoned_dev(struct nullb_device *dev);
 int null_report_zones(struct gendisk *disk, sector_t sector,
 		      unsigned int nr_zones, report_zones_cb cb, void *data);
-blk_status_t null_handle_zoned(struct nullb_cmd *cmd,
+blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd,
-				enum req_opf op, sector_t sector,
+				    enum req_opf op, sector_t sector,
-				sector_t nr_sectors);
+				    sector_t nr_sectors);
 size_t null_zone_valid_read_len(struct nullb *nullb,
 				sector_t sector, unsigned int len);
 #else
-static inline int null_zone_init(struct nullb_device *dev)
+static inline int null_init_zoned_dev(struct nullb_device *dev,
+				      struct request_queue *q)
 {
 	pr_err("CONFIG_BLK_DEV_ZONED not enabled\n");
 	return -EINVAL;
 }
-static inline void null_zone_exit(struct nullb_device *dev) {}
+static inline int null_register_zoned_dev(struct nullb *nullb)
-static inline blk_status_t null_handle_zoned(struct nullb_cmd *cmd,
+{
-					     enum req_opf op, sector_t sector,
+	return -ENODEV;
-					     sector_t nr_sectors)
+}
+static inline void null_free_zoned_dev(struct nullb_device *dev) {}
+static inline blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd,
+			enum req_opf op, sector_t sector, sector_t nr_sectors)
 {
 	return BLK_STS_NOTSUPP;
 }

drivers/block/null_blk_main.c+31−31

@@ -580,7 +580,7 @@ static void null_free_dev(struct nullb_device *dev) · 579 unmodified lines
580	if (!dev)	580	if (!dev)
581	return;	581	return;
582		582
583	null_zone_exit(dev);	583	null_free_zoned_dev(dev);
584	badblocks_exit(&dev->badblocks);	584	badblocks_exit(&dev->badblocks);
585	kfree(dev);	585	kfree(dev);
586	}	586	}
@@ -1276,6 +1276,25 @@ static inline void nullb_complete_cmd(struct nullb_cmd *cmd) · 689 unmodified lines
1276	}	1276	}
1277	}	1277	}
1278		1278
		1279	blk_status_t null_process_cmd(struct nullb_cmd *cmd,
		1280	enum req_opf op, sector_t sector,
		1281	unsigned int nr_sectors)
		1282	{
		1283	struct nullb_device *dev = cmd->nq->dev;
		1284	blk_status_t ret;
		1285
		1286	if (dev->badblocks.shift != -1) {
		1287	ret = null_handle_badblocks(cmd, sector, nr_sectors);
		1288	if (ret != BLK_STS_OK)
		1289	return ret;
		1290	}
		1291
		1292	if (dev->memory_backed)
		1293	return null_handle_memory_backed(cmd, op);
		1294
		1295	return BLK_STS_OK;
		1296	}
		1297
1279	static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector,	1298	static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector,
1280	sector_t nr_sectors, enum req_opf op)	1299	sector_t nr_sectors, enum req_opf op)
1281	{	1300	{
@@ -1294,17 +1313,11 @@ static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector, · 12 unmodified lines
1294	goto out;	1313	goto out;
1295	}	1314	}
1296		1315
1297	if (nullb->dev->badblocks.shift != -1) {	1316	if (dev->zoned)
1298	cmd->error = null_handle_badblocks(cmd, sector, nr_sectors);	1317	cmd->error = null_process_zoned_cmd(cmd, op,
1299	if (cmd->error != BLK_STS_OK)	1318	sector, nr_sectors);
1300	goto out;	1319	else
1301	}	1320	cmd->error = null_process_cmd(cmd, op, sector, nr_sectors);
1302
1303	if (dev->memory_backed)
1304	cmd->error = null_handle_memory_backed(cmd, op);
1305
1306	if (!cmd->error && dev->zoned)
1307	cmd->error = null_handle_zoned(cmd, op, sector, nr_sectors);
1308		1321
1309	out:	1322	out:
1310	nullb_complete_cmd(cmd);	1323	nullb_complete_cmd(cmd);
@@ -1605,19 +1618,12 @@ static int null_gendisk_register(struct nullb *nullb) · 294 unmodified lines
1605	disk->queue = nullb->q;	1618	disk->queue = nullb->q;
1606	strncpy(disk->disk_name, nullb->disk_name, DISK_NAME_LEN);	1619	strncpy(disk->disk_name, nullb->disk_name, DISK_NAME_LEN);
1607		1620
1608	#ifdef CONFIG_BLK_DEV_ZONED
1609	if (nullb->dev->zoned) {	1621	if (nullb->dev->zoned) {
1610	if (queue_is_mq(nullb->q)) {	1622	int ret = null_register_zoned_dev(nullb);
1611	int ret = blk_revalidate_disk_zones(disk);	1623
1612	if (ret)	1624	if (ret)
1613	return ret;	1625	return ret;
1614	} else {
1615	blk_queue_chunk_sectors(nullb->q,
1616	nullb->dev->zone_size_sects);
1617	nullb->q->nr_zones = blkdev_nr_zones(disk);
1618	}
1619	}	1626	}
1620	#endif
1621		1627
1622	add_disk(disk);	1628	add_disk(disk);
1623	return 0;	1629	return 0;
@@ -1773,14 +1779,9 @@ static int null_add_dev(struct nullb_device *dev) · 149 unmodified lines
1773	}	1779	}
1774		1780
1775	if (dev->zoned) {	1781	if (dev->zoned) {
1776	rv = null_zone_init(dev);	1782	rv = null_init_zoned_dev(dev, nullb->q);
1777	if (rv)	1783	if (rv)
1778	goto out_cleanup_blk_queue;	1784	goto out_cleanup_blk_queue;
1779
1780	nullb->q->limits.zoned = BLK_ZONED_HM;
1781	blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, nullb->q);
1782	blk_queue_required_elevator_features(nullb->q,
1783	ELEVATOR_F_ZBD_SEQ_WRITE);
1784	}	1785	}
1785		1786
1786	nullb->q->queuedata = nullb;	1787	nullb->q->queuedata = nullb;
@@ -1809,8 +1810,7 @@ static int null_add_dev(struct nullb_device *dev) · 22 unmodified lines
1809		1810
1810	return 0;	1811	return 0;
1811	out_cleanup_zone:	1812	out_cleanup_zone:
1812	if (dev->zoned)	1813	null_free_zoned_dev(dev);
1813	null_zone_exit(dev);
1814	out_cleanup_blk_queue:	1814	out_cleanup_blk_queue:
1815	blk_cleanup_queue(nullb->q);	1815	blk_cleanup_queue(nullb->q);
1816	out_cleanup_tags:	1816	out_cleanup_tags:

drivers/block/null_blk_zoned.c+33−12

 	return sect >> ilog2(dev->zone_size_sects);
 }
-int null_zone_init(struct nullb_device *dev)
+int null_init_zoned_dev(struct nullb_device *dev, struct request_queue *q)
 {
 	sector_t dev_size = (sector_t)dev->size * 1024 * 1024;
 	sector_t sector = 0;
 		sector += dev->zone_size_sects;
 	}
+	q->limits.zoned = BLK_ZONED_HM;
+	blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, q);
+	blk_queue_required_elevator_features(q, ELEVATOR_F_ZBD_SEQ_WRITE);
+	return 0;
+}
+int null_register_zoned_dev(struct nullb *nullb)
+{
+	struct request_queue *q = nullb->q;
+	if (queue_is_mq(q))
+		return blk_revalidate_disk_zones(nullb->disk);
+	blk_queue_chunk_sectors(q, nullb->dev->zone_size_sects);
+	q->nr_zones = blkdev_nr_zones(nullb->disk);
 	return 0;
 }
-void null_zone_exit(struct nullb_device *dev)
+void null_free_zoned_dev(struct nullb_device *dev)
 {
 	kvfree(dev->zones);
 }
 	struct nullb_device *dev = cmd->nq->dev;
 	unsigned int zno = null_zone_no(dev, sector);
 	struct blk_zone *zone = &dev->zones[zno];
+	blk_status_t ret;
+	trace_nullb_zone_op(cmd, zno, zone->cond);
+	if (zone->type == BLK_ZONE_TYPE_CONVENTIONAL)
+		return null_process_cmd(cmd, REQ_OP_WRITE, sector, nr_sectors);
 	switch (zone->cond) {
 	case BLK_ZONE_COND_FULL:
 		/* Cannot write to a full zone */
-		cmd->error = BLK_STS_IOERR;
 		return BLK_STS_IOERR;
 	case BLK_ZONE_COND_EMPTY:
 	case BLK_ZONE_COND_IMP_OPEN:
 		if (zone->cond != BLK_ZONE_COND_EXP_OPEN)
 			zone->cond = BLK_ZONE_COND_IMP_OPEN;
+		ret = null_process_cmd(cmd, REQ_OP_WRITE, sector, nr_sectors);
+		if (ret != BLK_STS_OK)
+			return ret;
 		zone->wp += nr_sectors;
 		if (zone->wp == zone->start + zone->len)
 			zone->cond = BLK_ZONE_COND_FULL;
-		break;
+		return BLK_STS_OK;
-	case BLK_ZONE_COND_NOT_WP:
-		break;
 	default:
 		/* Invalid zone condition */
 		return BLK_STS_IOERR;
 	}
-	trace_nullb_zone_op(cmd, zno, zone->cond);
-	return BLK_STS_OK;
 }
 static blk_status_t null_zone_mgmt(struct nullb_cmd *cmd, enum req_opf op,
 	return BLK_STS_OK;
 }
-blk_status_t null_handle_zoned(struct nullb_cmd *cmd, enum req_opf op,
+blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd, enum req_opf op,
-			       sector_t sector, sector_t nr_sectors)
+				    sector_t sector, sector_t nr_sectors)
 {
 	switch (op) {
 	case REQ_OP_WRITE:
 	case REQ_OP_ZONE_FINISH:
 		return null_zone_mgmt(cmd, op, sector);
 	default:
-		return BLK_STS_OK;
+		return null_process_cmd(cmd, op, sector, nr_sectors);
 	}
 }

drivers/block/virtio_blk.c+79−8

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include <linux/blk-mq.h>	15	#include <linux/blk-mq.h>
16	#include <linux/blk-mq-virtio.h>	16	#include <linux/blk-mq-virtio.h>
17	#include <linux/numa.h>	17	#include <linux/numa.h>
		18	#include <uapi/linux/virtio_ring.h>
18		19
19	#define PART_BITS 4	20	#define PART_BITS 4
20	#define VQ_NAME_LEN 16	21	#define VQ_NAME_LEN 16
@@ -32,6 +33,15 @@ struct virtio_blk_vq { · 11 unmodified lines
32	} ____cacheline_aligned_in_smp;	33	} ____cacheline_aligned_in_smp;
33		34
34	struct virtio_blk {	35	struct virtio_blk {
		36	/*
		37	* This mutex must be held by anything that may run after
		38	* virtblk_remove() sets vblk->vdev to NULL.
		39	*
		40	* blk-mq, virtqueue processing, and sysfs attribute code paths are
		41	* shut down before vblk->vdev is set to NULL and therefore do not need
		42	* to hold this mutex.
		43	*/
		44	struct mutex vdev_mutex;
35	struct virtio_device *vdev;	45	struct virtio_device *vdev;
36		46
37	/* The disk structure for the kernel. */	47	/* The disk structure for the kernel. */
@@ -43,6 +53,13 @@ struct virtio_blk { · 5 unmodified lines
43	/* Process context for config space updates */	53	/* Process context for config space updates */
44	struct work_struct config_work;	54	struct work_struct config_work;
45		55
		56	/*
		57	* Tracks references from block_device_operations open/release and
		58	* virtio_driver probe/remove so this object can be freed once no
		59	* longer in use.
		60	*/
		61	refcount_t refs;
		62
46	/* What host tells us, plus 2 for header & tailer. */	63	/* What host tells us, plus 2 for header & tailer. */
47	unsigned int sg_elems;	64	unsigned int sg_elems;
48		65
@@ -294,10 +311,55 @@ out: · 245 unmodified lines
294	return err;	311	return err;
295	}	312	}
296		313
		314	static void virtblk_get(struct virtio_blk *vblk)
		315	{
		316	refcount_inc(&vblk->refs);
		317	}
		318
		319	static void virtblk_put(struct virtio_blk *vblk)
		320	{
		321	if (refcount_dec_and_test(&vblk->refs)) {
		322	ida_simple_remove(&vd_index_ida, vblk->index);
		323	mutex_destroy(&vblk->vdev_mutex);
		324	kfree(vblk);
		325	}
		326	}
		327
		328	static int virtblk_open(struct block_device *bd, fmode_t mode)
		329	{
		330	struct virtio_blk *vblk = bd->bd_disk->private_data;
		331	int ret = 0;
		332
		333	mutex_lock(&vblk->vdev_mutex);
		334
		335	if (vblk->vdev)
		336	virtblk_get(vblk);
		337	else
		338	ret = -ENXIO;
		339
		340	mutex_unlock(&vblk->vdev_mutex);
		341	return ret;
		342	}
		343
		344	static void virtblk_release(struct gendisk *disk, fmode_t mode)
		345	{
		346	struct virtio_blk *vblk = disk->private_data;
		347
		348	virtblk_put(vblk);
		349	}
		350
297	/* We provide getgeo only to please some old bootloader/partitioning tools */	351	/* We provide getgeo only to please some old bootloader/partitioning tools */
298	static int virtblk_getgeo(struct block_device bd, struct hd_geometry geo)	352	static int virtblk_getgeo(struct block_device bd, struct hd_geometry geo)
299	{	353	{
300	struct virtio_blk *vblk = bd->bd_disk->private_data;	354	struct virtio_blk *vblk = bd->bd_disk->private_data;
		355	int ret = 0;
		356
		357	mutex_lock(&vblk->vdev_mutex);
		358
		359	if (!vblk->vdev) {
		360	ret = -ENXIO;
		361	goto out;
		362	}
301		363
302	/* see if the host passed in geometry config */	364	/* see if the host passed in geometry config */
303	if (virtio_has_feature(vblk->vdev, VIRTIO_BLK_F_GEOMETRY)) {	365	if (virtio_has_feature(vblk->vdev, VIRTIO_BLK_F_GEOMETRY)) {
@@ -313,11 +375,15 @@ static int virtblk_getgeo(struct block_device bd, struct hd_geometry geo) · 9 unmodified lines
313	geo->sectors = 1 << 5;	375	geo->sectors = 1 << 5;
314	geo->cylinders = get_capacity(bd->bd_disk) >> 11;	376	geo->cylinders = get_capacity(bd->bd_disk) >> 11;
315	}	377	}
316	return 0;	378	out:
		379	mutex_unlock(&vblk->vdev_mutex);
		380	return ret;
317	}	381	}
318		382
319	static const struct block_device_operations virtblk_fops = {	383	static const struct block_device_operations virtblk_fops = {
320	.owner = THIS_MODULE,	384	.owner = THIS_MODULE,
		385	.open = virtblk_open,
		386	.release = virtblk_release,
321	.getgeo = virtblk_getgeo,	387	.getgeo = virtblk_getgeo,
322	};	388	};
323		389
@@ -654,6 +720,10 @@ static int virtblk_probe(struct virtio_device *vdev) · 330 unmodified lines
654	goto out_free_index;	720	goto out_free_index;
655	}	721	}
656		722
		723	/* This reference is dropped in virtblk_remove(). */
		724	refcount_set(&vblk->refs, 1);
		725	mutex_init(&vblk->vdev_mutex);
		726
657	vblk->vdev = vdev;	727	vblk->vdev = vdev;
658	vblk->sg_elems = sg_elems;	728	vblk->sg_elems = sg_elems;
659		729
@@ -819,8 +889,6 @@ out: · 159 unmodified lines
819	static void virtblk_remove(struct virtio_device *vdev)	889	static void virtblk_remove(struct virtio_device *vdev)
820	{	890	{
821	struct virtio_blk *vblk = vdev->priv;	891	struct virtio_blk *vblk = vdev->priv;
822	int index = vblk->index;
823	int refc;
824		892
825	/* Make sure no work handler is accessing the device. */	893	/* Make sure no work handler is accessing the device. */
826	flush_work(&vblk->config_work);	894	flush_work(&vblk->config_work);
@@ -830,18 +898,21 @@ static void virtblk_remove(struct virtio_device *vdev) · 3 unmodified lines
830		898
831	blk_mq_free_tag_set(&vblk->tag_set);	899	blk_mq_free_tag_set(&vblk->tag_set);
832		900
		901	mutex_lock(&vblk->vdev_mutex);
		902
833	/* Stop all the virtqueues. */	903	/* Stop all the virtqueues. */
834	vdev->config->reset(vdev);	904	vdev->config->reset(vdev);
835		905
836	refc = kref_read(&disk_to_dev(vblk->disk)->kobj.kref);	906	/* Virtqueues are stopped, nothing can use vblk->vdev anymore. */
		907	vblk->vdev = NULL;
		908
837	put_disk(vblk->disk);	909	put_disk(vblk->disk);
838	vdev->config->del_vqs(vdev);	910	vdev->config->del_vqs(vdev);
839	kfree(vblk->vqs);	911	kfree(vblk->vqs);
840	kfree(vblk);
841		912
842	/* Only free device id if we don't have any users */	913	mutex_unlock(&vblk->vdev_mutex);
843	if (refc == 1)	914
844	ida_simple_remove(&vd_index_ida, index);	915	virtblk_put(vblk);
845	}	916	}
846		917
847	#ifdef CONFIG_PM_SLEEP	918	#ifdef CONFIG_PM_SLEEP

drivers/bus/mhi/core/init.c+3−4

@@ -812,10 +812,9 @@ int mhi_register_controller(struct mhi_controller *mhi_cntrl, · 811 unmodified lines
812	if (!mhi_cntrl)	812	if (!mhi_cntrl)
813	return -EINVAL;	813	return -EINVAL;
814		814
815	if (!mhi_cntrl->runtime_get \|\| !mhi_cntrl->runtime_put)	815	if (!mhi_cntrl->runtime_get \|\| !mhi_cntrl->runtime_put \|\|
816	return -EINVAL;	816	!mhi_cntrl->status_cb \|\| !mhi_cntrl->read_reg \|\|
817		817	!mhi_cntrl->write_reg)
818	if (!mhi_cntrl->status_cb \|\| !mhi_cntrl->link_status)
819	return -EINVAL;	818	return -EINVAL;
820		819
821	ret = parse_config(mhi_cntrl, config);	820	ret = parse_config(mhi_cntrl, config);

drivers/bus/mhi/core/internal.h+0−3

@@ -11,9 +11,6 @@ · 10 unmodified lines
11		11
12	extern struct bus_type mhi_bus_type;	12	extern struct bus_type mhi_bus_type;
13		13
14	/* MHI MMIO register mapping */
15	#define PCI_INVALID_READ(val) (val == U32_MAX)
16
17	#define MHIREGLEN (0x0)	14	#define MHIREGLEN (0x0)
18	#define MHIREGLEN_MHIREGLEN_MASK (0xFFFFFFFF)	15	#define MHIREGLEN_MHIREGLEN_MASK (0xFFFFFFFF)
19	#define MHIREGLEN_MHIREGLEN_SHIFT (0)	16	#define MHIREGLEN_MHIREGLEN_SHIFT (0)

drivers/bus/mhi/core/main.c+5−13

 int __must_check mhi_read_reg(struct mhi_controller *mhi_cntrl,
 			      void __iomem *base, u32 offset, u32 *out)
 {
-	u32 tmp = readl(base + offset);
+	return mhi_cntrl->read_reg(mhi_cntrl, base + offset, out);
-	/* If there is any unexpected value, query the link status */
-	if (PCI_INVALID_READ(tmp) &&
-	    mhi_cntrl->link_status(mhi_cntrl))
-		return -EIO;
-	*out = tmp;
-	return 0;
 }
 int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl,
 void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base,
 		   u32 offset, u32 val)
 {
-	writel(val, base + offset);
+	mhi_cntrl->write_reg(mhi_cntrl, base + offset, val);
 }
 void mhi_write_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base,
 		    !(mhi_chan->ee_mask & BIT(mhi_cntrl->ee)))
 			continue;
 		mhi_dev = mhi_alloc_device(mhi_cntrl);
-		if (!mhi_dev)
+		if (IS_ERR(mhi_dev))
 			return;
 		mhi_dev->dev_type = MHI_DEVICE_XFER;
 		/* Channel name is same for both UL and DL */
 		mhi_dev->chan_name = mhi_chan->name;
-		dev_set_name(&mhi_dev->dev, "%04x_%s", mhi_chan->chan,
+		dev_set_name(&mhi_dev->dev, "%s_%s",
+			     dev_name(mhi_cntrl->cntrl_dev),
 			     mhi_dev->chan_name);
 		/* Init wakeup source if available */

drivers/bus/mhi/core/pm.c+5−1

 			   MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state),
 			   msecs_to_jiffies(mhi_cntrl->timeout_ms));
-	return (MHI_IN_MISSION_MODE(mhi_cntrl->ee)) ? 0 : -EIO;
+	ret = (MHI_IN_MISSION_MODE(mhi_cntrl->ee)) ? 0 : -ETIMEDOUT;
+	if (ret)
+		mhi_power_down(mhi_cntrl, false);
+	return ret;
 }
 EXPORT_SYMBOL(mhi_sync_power_up);

drivers/char/hw_random/virtio-rng.c+1−0

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	#include <linux/virtio.h>	11	#include <linux/virtio.h>
12	#include <linux/virtio_rng.h>	12	#include <linux/virtio_rng.h>
13	#include <linux/module.h>	13	#include <linux/module.h>
		14	#include <linux/slab.h>
14		15
15	static DEFINE_IDA(rng_index_ida);	16	static DEFINE_IDA(rng_index_ida);
16		17

drivers/char/tpm/tpm-interface.c+1−1

@@ -323,7 +323,7 @@ int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, · 322 unmodified lines
323		323
324	for (i = 0; i < chip->nr_allocated_banks; i++) {	324	for (i = 0; i < chip->nr_allocated_banks; i++) {
325	if (digests[i].alg_id != chip->allocated_banks[i].alg_id) {	325	if (digests[i].alg_id != chip->allocated_banks[i].alg_id) {
326	rc = EINVAL;	326	rc = -EINVAL;
327	goto out;	327	goto out;
328	}	328	}
329	}	329	}

drivers/char/tpm/tpm2-cmd.c+1−0

@@ -681,6 +681,7 @@ out: · 680 unmodified lines
681	rc = -ENODEV;	681	rc = -ENODEV;
682	return rc;	682	return rc;
683	}	683	}
		684	EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl);
684		685
685	/**	686	/**
686	* tpm2_startup - turn on the TPM	687	* tpm2_startup - turn on the TPM

drivers/char/tpm/tpm_ibmvtpm.c+73−63

 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (C) 2012 IBM Corporation
+ * Copyright (C) 2012-2020 IBM Corporation
  *
  * Author: Ashley Lai <ashleydlai@gmail.com>
  *
 	return len;
 }
+/**
+ * ibmvtpm_crq_send_init - Send a CRQ initialize message
+ * @ibmvtpm:	vtpm device struct
+ *
+ * Return:
+ *	0 on success.
+ *	Non-zero on failure.
+ */
+static int ibmvtpm_crq_send_init(struct ibmvtpm_dev *ibmvtpm)
+{
+	int rc;
+	rc = ibmvtpm_send_crq_word(ibmvtpm->vdev, INIT_CRQ_CMD);
+	if (rc != H_SUCCESS)
+		dev_err(ibmvtpm->dev,
+			"%s failed rc=%d\n", __func__, rc);
+	return rc;
+}
+/**
+ * tpm_ibmvtpm_resume - Resume from suspend
+ *
+ * @dev:	device struct
+ *
+ * Return: Always 0.
+ */
+static int tpm_ibmvtpm_resume(struct device *dev)
+{
+	struct tpm_chip *chip = dev_get_drvdata(dev);
+	struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev);
+	int rc = 0;
+	do {
+		if (rc)
+			msleep(100);
+		rc = plpar_hcall_norets(H_ENABLE_CRQ,
+					ibmvtpm->vdev->unit_address);
+	} while (rc == H_IN_PROGRESS || rc == H_BUSY || H_IS_LONG_BUSY(rc));
+	if (rc) {
+		dev_err(dev, "Error enabling ibmvtpm rc=%d\n", rc);
+		return rc;
+	}
+	rc = vio_enable_interrupts(ibmvtpm->vdev);
+	if (rc) {
+		dev_err(dev, "Error vio_enable_interrupts rc=%d\n", rc);
+		return rc;
+	}
+	rc = ibmvtpm_crq_send_init(ibmvtpm);
+	if (rc)
+		dev_err(dev, "Error send_init rc=%d\n", rc);
+	return rc;
+}
 /**
  * tpm_ibmvtpm_send() - Send a TPM command
  * @chip:	tpm chip struct
 static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count)
 {
 	struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev);
+	bool retry = true;
 	int rc, sig;
 	if (!ibmvtpm->rtce_buf) {
 	 */
 	ibmvtpm->tpm_processing_cmd = true;
+again:
 	rc = ibmvtpm_send_crq(ibmvtpm->vdev,
 			IBMVTPM_VALID_CMD, VTPM_TPM_COMMAND,
 			count, ibmvtpm->rtce_dma_handle);
 	if (rc != H_SUCCESS) {
+		/*
+		 * H_CLOSED can be returned after LPM resume.  Call
+		 * tpm_ibmvtpm_resume() to re-enable the CRQ then retry
+		 * ibmvtpm_send_crq() once before failing.
+		 */
+		if (rc == H_CLOSED && retry) {
+			tpm_ibmvtpm_resume(ibmvtpm->dev);
+			retry = false;
+			goto again;
+		}
 		dev_err(ibmvtpm->dev, "tpm_ibmvtpm_send failed rc=%d\n", rc);
-		rc = 0;
 		ibmvtpm->tpm_processing_cmd = false;
-	} else
+	}
-		rc = 0;
 	spin_unlock(&ibmvtpm->rtce_lock);
-	return rc;
+	return 0;
 }
 static void tpm_ibmvtpm_cancel(struct tpm_chip *chip)
 	return rc;
 }
-/**
- * ibmvtpm_crq_send_init - Send a CRQ initialize message
- * @ibmvtpm:	vtpm device struct
- *
- * Return:
- *	0 on success.
- *	Non-zero on failure.
- */
-static int ibmvtpm_crq_send_init(struct ibmvtpm_dev *ibmvtpm)
-{
-	int rc;
-	rc = ibmvtpm_send_crq_word(ibmvtpm->vdev, INIT_CRQ_CMD);
-	if (rc != H_SUCCESS)
-		dev_err(ibmvtpm->dev,
-			"ibmvtpm_crq_send_init failed rc=%d\n", rc);
-	return rc;
-}
 /**
  * tpm_ibmvtpm_remove - ibm vtpm remove entry point
  * @vdev:	vio device struct
 				  ibmvtpm->crq_dma_handle, CRQ_RES_BUF_SIZE);
 }
-/**
- * tpm_ibmvtpm_resume - Resume from suspend
- *
- * @dev:	device struct
- *
- * Return: Always 0.
- */
-static int tpm_ibmvtpm_resume(struct device *dev)
-{
-	struct tpm_chip *chip = dev_get_drvdata(dev);
-	struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev);
-	int rc = 0;
-	do {
-		if (rc)
-			msleep(100);
-		rc = plpar_hcall_norets(H_ENABLE_CRQ,
-					ibmvtpm->vdev->unit_address);
-	} while (rc == H_IN_PROGRESS || rc == H_BUSY || H_IS_LONG_BUSY(rc));
-	if (rc) {
-		dev_err(dev, "Error enabling ibmvtpm rc=%d\n", rc);
-		return rc;
-	}
-	rc = vio_enable_interrupts(ibmvtpm->vdev);
-	if (rc) {
-		dev_err(dev, "Error vio_enable_interrupts rc=%d\n", rc);
-		return rc;
-	}
-	rc = ibmvtpm_crq_send_init(ibmvtpm);
-	if (rc)
-		dev_err(dev, "Error send_init rc=%d\n", rc);
-	return rc;
-}
 static bool tpm_ibmvtpm_req_canceled(struct tpm_chip *chip, u8 status)
 {
 	return (status == 0);

drivers/char/tpm/tpm_tis_core.c+7−1

 	u32 intmask;
 	int rc;
+	if (priv->irq == 0)
+		return;
 	rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
 	if (rc < 0)
 		intmask = 0;
 		if (irq) {
 			tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
 						 irq);
-			if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
+			if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
 				dev_err(&chip->dev, FW_BUG
 					"TPM interrupt not working, polling instead\n");
+				disable_interrupts(chip);
+			}
 		} else {
 			tpm_tis_probe_irq(chip, intmask);
 		}

drivers/counter/104-quad-8.c+160−34

@@ -44,6 +44,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); · 43 unmodified lines
44	* @base: base port address of the IIO device	44	* @base: base port address of the IIO device
45	*/	45	*/
46	struct quad8_iio {	46	struct quad8_iio {
		47	struct mutex lock;
47	struct counter_device counter;	48	struct counter_device counter;
48	unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];	49	unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];
49	unsigned int preset[QUAD8_NUM_COUNTERS];	50	unsigned int preset[QUAD8_NUM_COUNTERS];
@@ -123,6 +124,8 @@ static int quad8_read_raw(struct iio_dev *indio_dev, · 73 unmodified lines
123	/* Borrow XOR Carry effectively doubles count range */	124	/* Borrow XOR Carry effectively doubles count range */
124	*val = (borrow ^ carry) << 24;	125	*val = (borrow ^ carry) << 24;
125		126
		127	mutex_lock(&priv->lock);
		128
126	/* Reset Byte Pointer; transfer Counter to Output Latch */	129	/* Reset Byte Pointer; transfer Counter to Output Latch */
127	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP \| QUAD8_RLD_CNTR_OUT,	130	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP \| QUAD8_RLD_CNTR_OUT,
128	base_offset + 1);	131	base_offset + 1);
@@ -130,6 +133,8 @@ static int quad8_read_raw(struct iio_dev *indio_dev, · 1 unmodified line
130	for (i = 0; i < 3; i++)	133	for (i = 0; i < 3; i++)
131	val \|= (unsigned int)inb(base_offset) << (8 i);	134	val \|= (unsigned int)inb(base_offset) << (8 i);
132		135
		136	mutex_unlock(&priv->lock);
		137
133	return IIO_VAL_INT;	138	return IIO_VAL_INT;
134	case IIO_CHAN_INFO_ENABLE:	139	case IIO_CHAN_INFO_ENABLE:
135	*val = priv->ab_enable[chan->channel];	140	*val = priv->ab_enable[chan->channel];
@@ -160,6 +165,8 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 24 unmodified lines
160	if ((unsigned int)val > 0xFFFFFF)	165	if ((unsigned int)val > 0xFFFFFF)
161	return -EINVAL;	166	return -EINVAL;
162		167
		168	mutex_lock(&priv->lock);
		169
163	/* Reset Byte Pointer */	170	/* Reset Byte Pointer */
164	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);	171	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);
165		172
@@ -183,12 +190,16 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 17 unmodified lines
183	/* Reset Error flag */	190	/* Reset Error flag */
184	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_E, base_offset + 1);	191	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_E, base_offset + 1);
185		192
		193	mutex_unlock(&priv->lock);
		194
186	return 0;	195	return 0;
187	case IIO_CHAN_INFO_ENABLE:	196	case IIO_CHAN_INFO_ENABLE:
188	/* only boolean values accepted */	197	/* only boolean values accepted */
189	if (val < 0 \|\| val > 1)	198	if (val < 0 \|\| val > 1)
190	return -EINVAL;	199	return -EINVAL;
191		200
		201	mutex_lock(&priv->lock);
		202
192	priv->ab_enable[chan->channel] = val;	203	priv->ab_enable[chan->channel] = val;
193		204
194	ior_cfg = val \| priv->preset_enable[chan->channel] << 1;	205	ior_cfg = val \| priv->preset_enable[chan->channel] << 1;
@@ -196,11 +207,18 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 1 unmodified line
196	/* Load I/O control configuration */	207	/* Load I/O control configuration */
197	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset + 1);	208	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset + 1);
198		209
		210	mutex_unlock(&priv->lock);
		211
199	return 0;	212	return 0;
200	case IIO_CHAN_INFO_SCALE:	213	case IIO_CHAN_INFO_SCALE:
		214	mutex_lock(&priv->lock);
		215
201	/* Quadrature scaling only available in quadrature mode */	216	/* Quadrature scaling only available in quadrature mode */
202	if (!priv->quadrature_mode[chan->channel] && (val2 \|\| val != 1))	217	if (!priv->quadrature_mode[chan->channel] &&
		218	(val2 \|\| val != 1)) {
		219	mutex_unlock(&priv->lock);
203	return -EINVAL;	220	return -EINVAL;
		221	}
204		222
205	/* Only three gain states (1, 0.5, 0.25) */	223	/* Only three gain states (1, 0.5, 0.25) */
206	if (val == 1 && !val2)	224	if (val == 1 && !val2)
@@ -214,11 +232,15 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 7 unmodified lines
214	priv->quadrature_scale[chan->channel] = 2;	232	priv->quadrature_scale[chan->channel] = 2;
215	break;	233	break;
216	default:	234	default:
		235	mutex_unlock(&priv->lock);
217	return -EINVAL;	236	return -EINVAL;
218	}	237	}
219	else	238	else {
		239	mutex_unlock(&priv->lock);
220	return -EINVAL;	240	return -EINVAL;
		241	}
221		242
		243	mutex_unlock(&priv->lock);
222	return 0;	244	return 0;
223	}	245	}
224		246
@@ -255,6 +277,8 @@ static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private, · 30 unmodified lines
255	if (preset > 0xFFFFFF)	277	if (preset > 0xFFFFFF)
256	return -EINVAL;	278	return -EINVAL;
257		279
		280	mutex_lock(&priv->lock);
		281
258	priv->preset[chan->channel] = preset;	282	priv->preset[chan->channel] = preset;
259		283
260	/* Reset Byte Pointer */	284	/* Reset Byte Pointer */
@@ -264,6 +288,8 @@ static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private, · 3 unmodified lines
264	for (i = 0; i < 3; i++)	288	for (i = 0; i < 3; i++)
265	outb(preset >> (8 * i), base_offset);	289	outb(preset >> (8 * i), base_offset);
266		290
		291	mutex_unlock(&priv->lock);
		292
267	return len;	293	return len;
268	}	294	}
269		295
@@ -293,6 +319,8 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, · 23 unmodified lines
293	/* Preset enable is active low in Input/Output Control register */	319	/* Preset enable is active low in Input/Output Control register */
294	preset_enable = !preset_enable;	320	preset_enable = !preset_enable;
295		321
		322	mutex_lock(&priv->lock);
		323
296	priv->preset_enable[chan->channel] = preset_enable;	324	priv->preset_enable[chan->channel] = preset_enable;
297		325
298	ior_cfg = priv->ab_enable[chan->channel] \|	326	ior_cfg = priv->ab_enable[chan->channel] \|
@@ -301,6 +329,8 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, · 2 unmodified lines
301	/* Load I/O control configuration to Input / Output Control Register */	329	/* Load I/O control configuration to Input / Output Control Register */
302	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset);	330	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset);
303		331
		332	mutex_unlock(&priv->lock);
		333
304	return len;	334	return len;
305	}	335	}
306		336
@@ -358,6 +388,8 @@ static int quad8_set_count_mode(struct iio_dev *indio_dev, · 51 unmodified lines
358	unsigned int mode_cfg = cnt_mode << 1;	388	unsigned int mode_cfg = cnt_mode << 1;
359	const int base_offset = priv->base + 2 * chan->channel + 1;	389	const int base_offset = priv->base + 2 * chan->channel + 1;
360		390
		391	mutex_lock(&priv->lock);
		392
361	priv->count_mode[chan->channel] = cnt_mode;	393	priv->count_mode[chan->channel] = cnt_mode;
362		394
363	/* Add quadrature mode configuration */	395	/* Add quadrature mode configuration */
@@ -367,6 +399,8 @@ static int quad8_set_count_mode(struct iio_dev *indio_dev, · 3 unmodified lines
367	/* Load mode configuration to Counter Mode Register */	399	/* Load mode configuration to Counter Mode Register */
368	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);	400	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);
369		401
		402	mutex_unlock(&priv->lock);
		403
370	return 0;	404	return 0;
371	}	405	}
372		406
@@ -394,19 +428,26 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev, · 21 unmodified lines
394	const struct iio_chan_spec *chan, unsigned int synchronous_mode)	428	const struct iio_chan_spec *chan, unsigned int synchronous_mode)
395	{	429	{
396	struct quad8_iio *const priv = iio_priv(indio_dev);	430	struct quad8_iio *const priv = iio_priv(indio_dev);
397	const unsigned int idr_cfg = synchronous_mode \|
398	priv->index_polarity[chan->channel] << 1;
399	const int base_offset = priv->base + 2 * chan->channel + 1;	431	const int base_offset = priv->base + 2 * chan->channel + 1;
		432	unsigned int idr_cfg = synchronous_mode;
		433
		434	mutex_lock(&priv->lock);
		435
		436	idr_cfg \|= priv->index_polarity[chan->channel] << 1;
400		437
401	/* Index function must be non-synchronous in non-quadrature mode */	438	/* Index function must be non-synchronous in non-quadrature mode */
402	if (synchronous_mode && !priv->quadrature_mode[chan->channel])	439	if (synchronous_mode && !priv->quadrature_mode[chan->channel]) {
		440	mutex_unlock(&priv->lock);
403	return -EINVAL;	441	return -EINVAL;
		442	}
404		443
405	priv->synchronous_mode[chan->channel] = synchronous_mode;	444	priv->synchronous_mode[chan->channel] = synchronous_mode;
406		445
407	/* Load Index Control configuration to Index Control Register */	446	/* Load Index Control configuration to Index Control Register */
408	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);	447	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);
409		448
		449	mutex_unlock(&priv->lock);
		450
410	return 0;	451	return 0;
411	}	452	}
412		453
@@ -434,8 +475,12 @@ static int quad8_set_quadrature_mode(struct iio_dev *indio_dev, · 21 unmodified lines
434	const struct iio_chan_spec *chan, unsigned int quadrature_mode)	475	const struct iio_chan_spec *chan, unsigned int quadrature_mode)
435	{	476	{
436	struct quad8_iio *const priv = iio_priv(indio_dev);	477	struct quad8_iio *const priv = iio_priv(indio_dev);
437	unsigned int mode_cfg = priv->count_mode[chan->channel] << 1;
438	const int base_offset = priv->base + 2 * chan->channel + 1;	478	const int base_offset = priv->base + 2 * chan->channel + 1;
		479	unsigned int mode_cfg;
		480
		481	mutex_lock(&priv->lock);
		482
		483	mode_cfg = priv->count_mode[chan->channel] << 1;
439		484
440	if (quadrature_mode)	485	if (quadrature_mode)
441	mode_cfg \|= (priv->quadrature_scale[chan->channel] + 1) << 3;	486	mode_cfg \|= (priv->quadrature_scale[chan->channel] + 1) << 3;
@@ -453,6 +498,8 @@ static int quad8_set_quadrature_mode(struct iio_dev *indio_dev, · 11 unmodified lines
453	/* Load mode configuration to Counter Mode Register */	498	/* Load mode configuration to Counter Mode Register */
454	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);	499	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);
455		500
		501	mutex_unlock(&priv->lock);
		502
456	return 0;	503	return 0;
457	}	504	}
458		505
@@ -480,15 +527,20 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev, · 21 unmodified lines
480	const struct iio_chan_spec *chan, unsigned int index_polarity)	527	const struct iio_chan_spec *chan, unsigned int index_polarity)
481	{	528	{
482	struct quad8_iio *const priv = iio_priv(indio_dev);	529	struct quad8_iio *const priv = iio_priv(indio_dev);
483	const unsigned int idr_cfg = priv->synchronous_mode[chan->channel] \|
484	index_polarity << 1;
485	const int base_offset = priv->base + 2 * chan->channel + 1;	530	const int base_offset = priv->base + 2 * chan->channel + 1;
		531	unsigned int idr_cfg = index_polarity << 1;
		532
		533	mutex_lock(&priv->lock);
		534
		535	idr_cfg \|= priv->synchronous_mode[chan->channel];
486		536
487	priv->index_polarity[chan->channel] = index_polarity;	537	priv->index_polarity[chan->channel] = index_polarity;
488		538
489	/* Load Index Control configuration to Index Control Register */	539	/* Load Index Control configuration to Index Control Register */
490	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);	540	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);
491		541
		542	mutex_unlock(&priv->lock);
		543
492	return 0;	544	return 0;
493	}	545	}
494		546
@@ -589,7 +641,7 @@ static int quad8_signal_read(struct counter_device *counter, · 94 unmodified lines
589	static int quad8_count_read(struct counter_device *counter,	641	static int quad8_count_read(struct counter_device *counter,
590	struct counter_count count, unsigned long val)	642	struct counter_count count, unsigned long val)
591	{	643	{
592	const struct quad8_iio *const priv = counter->priv;	644	struct quad8_iio *const priv = counter->priv;
593	const int base_offset = priv->base + 2 * count->id;	645	const int base_offset = priv->base + 2 * count->id;
594	unsigned int flags;	646	unsigned int flags;
595	unsigned int borrow;	647	unsigned int borrow;
@@ -603,6 +655,8 @@ static int quad8_count_read(struct counter_device *counter, · 7 unmodified lines
603	/* Borrow XOR Carry effectively doubles count range */	655	/* Borrow XOR Carry effectively doubles count range */
604	*val = (unsigned long)(borrow ^ carry) << 24;	656	*val = (unsigned long)(borrow ^ carry) << 24;
605		657
		658	mutex_lock(&priv->lock);
		659
606	/* Reset Byte Pointer; transfer Counter to Output Latch */	660	/* Reset Byte Pointer; transfer Counter to Output Latch */
607	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP \| QUAD8_RLD_CNTR_OUT,	661	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP \| QUAD8_RLD_CNTR_OUT,
608	base_offset + 1);	662	base_offset + 1);
@@ -610,13 +664,15 @@ static int quad8_count_read(struct counter_device *counter, · 1 unmodified line
610	for (i = 0; i < 3; i++)	664	for (i = 0; i < 3; i++)
611	val \|= (unsigned long)inb(base_offset) << (8 i);	665	val \|= (unsigned long)inb(base_offset) << (8 i);
612		666
		667	mutex_unlock(&priv->lock);
		668
613	return 0;	669	return 0;
614	}	670	}
615		671
616	static int quad8_count_write(struct counter_device *counter,	672	static int quad8_count_write(struct counter_device *counter,
617	struct counter_count *count, unsigned long val)	673	struct counter_count *count, unsigned long val)
618	{	674	{
619	const struct quad8_iio *const priv = counter->priv;	675	struct quad8_iio *const priv = counter->priv;
620	const int base_offset = priv->base + 2 * count->id;	676	const int base_offset = priv->base + 2 * count->id;
621	int i;	677	int i;
622		678
@@ -624,6 +680,8 @@ static int quad8_count_write(struct counter_device *counter, · 1 unmodified line
624	if (val > 0xFFFFFF)	680	if (val > 0xFFFFFF)
625	return -EINVAL;	681	return -EINVAL;
626		682
		683	mutex_lock(&priv->lock);
		684
627	/* Reset Byte Pointer */	685	/* Reset Byte Pointer */
628	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);	686	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);
629		687
@@ -647,6 +705,8 @@ static int quad8_count_write(struct counter_device *counter, · 17 unmodified lines
647	/* Reset Error flag */	705	/* Reset Error flag */
648	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_E, base_offset + 1);	706	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_E, base_offset + 1);
649		707
		708	mutex_unlock(&priv->lock);
		709
650	return 0;	710	return 0;
651	}	711	}
652		712
@@ -667,13 +727,13 @@ static enum counter_count_function quad8_count_functions_list[] = { · 14 unmodified lines
667	static int quad8_function_get(struct counter_device *counter,	727	static int quad8_function_get(struct counter_device *counter,
668	struct counter_count count, size_t function)	728	struct counter_count count, size_t function)
669	{	729	{
670	const struct quad8_iio *const priv = counter->priv;	730	struct quad8_iio *const priv = counter->priv;
671	const int id = count->id;	731	const int id = count->id;
672	const unsigned int quadrature_mode = priv->quadrature_mode[id];
673	const unsigned int scale = priv->quadrature_scale[id];
674		732
675	if (quadrature_mode)	733	mutex_lock(&priv->lock);
676	switch (scale) {	734
		735	if (priv->quadrature_mode[id])
		736	switch (priv->quadrature_scale[id]) {
677	case 0:	737	case 0:
678	*function = QUAD8_COUNT_FUNCTION_QUADRATURE_X1;	738	*function = QUAD8_COUNT_FUNCTION_QUADRATURE_X1;
679	break;	739	break;
@@ -687,6 +747,8 @@ static int quad8_function_get(struct counter_device *counter, · 7 unmodified lines
687	else	747	else
688	*function = QUAD8_COUNT_FUNCTION_PULSE_DIRECTION;	748	*function = QUAD8_COUNT_FUNCTION_PULSE_DIRECTION;
689		749
		750	mutex_unlock(&priv->lock);
		751
690	return 0;	752	return 0;
691	}	753	}
692		754
@@ -697,10 +759,15 @@ static int quad8_function_set(struct counter_device *counter, · 4 unmodified lines
697	const int id = count->id;	759	const int id = count->id;
698	unsigned int *const quadrature_mode = priv->quadrature_mode + id;	760	unsigned int *const quadrature_mode = priv->quadrature_mode + id;
699	unsigned int *const scale = priv->quadrature_scale + id;	761	unsigned int *const scale = priv->quadrature_scale + id;
700	unsigned int mode_cfg = priv->count_mode[id] << 1;
701	unsigned int *const synchronous_mode = priv->synchronous_mode + id;	762	unsigned int *const synchronous_mode = priv->synchronous_mode + id;
702	const unsigned int idr_cfg = priv->index_polarity[id] << 1;
703	const int base_offset = priv->base + 2 * id + 1;	763	const int base_offset = priv->base + 2 * id + 1;
		764	unsigned int mode_cfg;
		765	unsigned int idr_cfg;
		766
		767	mutex_lock(&priv->lock);
		768
		769	mode_cfg = priv->count_mode[id] << 1;
		770	idr_cfg = priv->index_polarity[id] << 1;
704		771
705	if (function == QUAD8_COUNT_FUNCTION_PULSE_DIRECTION) {	772	if (function == QUAD8_COUNT_FUNCTION_PULSE_DIRECTION) {
706	*quadrature_mode = 0;	773	*quadrature_mode = 0;
@@ -736,6 +803,8 @@ static int quad8_function_set(struct counter_device *counter, · 29 unmodified lines
736	/* Load mode configuration to Counter Mode Register */	803	/* Load mode configuration to Counter Mode Register */
737	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);	804	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);
738		805
		806	mutex_unlock(&priv->lock);
		807
739	return 0;	808	return 0;
740	}	809	}
741		810
@@ -852,15 +921,20 @@ static int quad8_index_polarity_set(struct counter_device *counter, · 110 unmodified lines
852	{	921	{
853	struct quad8_iio *const priv = counter->priv;	922	struct quad8_iio *const priv = counter->priv;
854	const size_t channel_id = signal->id - 16;	923	const size_t channel_id = signal->id - 16;
855	const unsigned int idr_cfg = priv->synchronous_mode[channel_id] \|
856	index_polarity << 1;
857	const int base_offset = priv->base + 2 * channel_id + 1;	924	const int base_offset = priv->base + 2 * channel_id + 1;
		925	unsigned int idr_cfg = index_polarity << 1;
		926
		927	mutex_lock(&priv->lock);
		928
		929	idr_cfg \|= priv->synchronous_mode[channel_id];
858		930
859	priv->index_polarity[channel_id] = index_polarity;	931	priv->index_polarity[channel_id] = index_polarity;
860		932
861	/* Load Index Control configuration to Index Control Register */	933	/* Load Index Control configuration to Index Control Register */
862	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);	934	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);
863		935
		936	mutex_unlock(&priv->lock);
		937
864	return 0;	938	return 0;
865	}	939	}
866		940
@@ -887,19 +961,26 @@ static int quad8_synchronous_mode_set(struct counter_device *counter, · 20 unmodified lines
887	{	961	{
888	struct quad8_iio *const priv = counter->priv;	962	struct quad8_iio *const priv = counter->priv;
889	const size_t channel_id = signal->id - 16;	963	const size_t channel_id = signal->id - 16;
890	const unsigned int idr_cfg = synchronous_mode \|
891	priv->index_polarity[channel_id] << 1;
892	const int base_offset = priv->base + 2 * channel_id + 1;	964	const int base_offset = priv->base + 2 * channel_id + 1;
		965	unsigned int idr_cfg = synchronous_mode;
		966
		967	mutex_lock(&priv->lock);
		968
		969	idr_cfg \|= priv->index_polarity[channel_id] << 1;
893		970
894	/* Index function must be non-synchronous in non-quadrature mode */	971	/* Index function must be non-synchronous in non-quadrature mode */
895	if (synchronous_mode && !priv->quadrature_mode[channel_id])	972	if (synchronous_mode && !priv->quadrature_mode[channel_id]) {
		973	mutex_unlock(&priv->lock);
896	return -EINVAL;	974	return -EINVAL;
		975	}
897		976
898	priv->synchronous_mode[channel_id] = synchronous_mode;	977	priv->synchronous_mode[channel_id] = synchronous_mode;
899		978
900	/* Load Index Control configuration to Index Control Register */	979	/* Load Index Control configuration to Index Control Register */
901	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);	980	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);
902		981
		982	mutex_unlock(&priv->lock);
		983
903	return 0;	984	return 0;
904	}	985	}
905		986
@@ -964,6 +1045,8 @@ static int quad8_count_mode_set(struct counter_device *counter, · 58 unmodified lines
964	break;	1045	break;
965	}	1046	}
966		1047
		1048	mutex_lock(&priv->lock);
		1049
967	priv->count_mode[count->id] = cnt_mode;	1050	priv->count_mode[count->id] = cnt_mode;
968		1051
969	/* Set count mode configuration value */	1052	/* Set count mode configuration value */
@@ -976,6 +1059,8 @@ static int quad8_count_mode_set(struct counter_device *counter, · 6 unmodified lines
976	/* Load mode configuration to Counter Mode Register */	1059	/* Load mode configuration to Counter Mode Register */
977	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);	1060	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);
978		1061
		1062	mutex_unlock(&priv->lock);
		1063
979	return 0;	1064	return 0;
980	}	1065	}
981		1066
@@ -1017,6 +1102,8 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter, · 35 unmodified lines
1017	if (err)	1102	if (err)
1018	return err;	1103	return err;
1019		1104
		1105	mutex_lock(&priv->lock);
		1106
1020	priv->ab_enable[count->id] = ab_enable;	1107	priv->ab_enable[count->id] = ab_enable;
1021		1108
1022	ior_cfg = ab_enable \| priv->preset_enable[count->id] << 1;	1109	ior_cfg = ab_enable \| priv->preset_enable[count->id] << 1;
@@ -1024,6 +1111,8 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter, · 1 unmodified line
1024	/* Load I/O control configuration */	1111	/* Load I/O control configuration */
1025	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset + 1);	1112	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset + 1);
1026		1113
		1114	mutex_unlock(&priv->lock);
		1115
1027	return len;	1116	return len;
1028	}	1117	}
1029		1118
@@ -1052,14 +1141,28 @@ static ssize_t quad8_count_preset_read(struct counter_device *counter, · 22 unmodified lines
1052	return sprintf(buf, "%u\n", priv->preset[count->id]);	1141	return sprintf(buf, "%u\n", priv->preset[count->id]);
1053	}	1142	}
1054		1143
		1144	static void quad8_preset_register_set(struct quad8_iio *quad8iio, int id,
		1145	unsigned int preset)
		1146	{
		1147	const unsigned int base_offset = quad8iio->base + 2 * id;
		1148	int i;
		1149
		1150	quad8iio->preset[id] = preset;
		1151
		1152	/* Reset Byte Pointer */
		1153	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);
		1154
		1155	/* Set Preset Register */
		1156	for (i = 0; i < 3; i++)
		1157	outb(preset >> (8 * i), base_offset);
		1158	}
		1159
1055	static ssize_t quad8_count_preset_write(struct counter_device *counter,	1160	static ssize_t quad8_count_preset_write(struct counter_device *counter,
1056	struct counter_count count, void private, const char *buf, size_t len)	1161	struct counter_count count, void private, const char *buf, size_t len)
1057	{	1162	{
1058	struct quad8_iio *const priv = counter->priv;	1163	struct quad8_iio *const priv = counter->priv;
1059	const int base_offset = priv->base + 2 * count->id;
1060	unsigned int preset;	1164	unsigned int preset;
1061	int ret;	1165	int ret;
1062	int i;
1063		1166
1064	ret = kstrtouint(buf, 0, &preset);	1167	ret = kstrtouint(buf, 0, &preset);
1065	if (ret)	1168	if (ret)
@@ -1069,14 +1172,11 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter, · 3 unmodified lines
1069	if (preset > 0xFFFFFF)	1172	if (preset > 0xFFFFFF)
1070	return -EINVAL;	1173	return -EINVAL;
1071		1174
1072	priv->preset[count->id] = preset;	1175	mutex_lock(&priv->lock);
1073		1176
1074	/* Reset Byte Pointer */	1177	quad8_preset_register_set(priv, count->id, preset);
1075	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);
1076		1178
1077	/* Set Preset Register */	1179	mutex_unlock(&priv->lock);
1078	for (i = 0; i < 3; i++)
1079	outb(preset >> (8 * i), base_offset);
1080		1180
1081	return len;	1181	return len;
1082	}	1182	}
@@ -1084,15 +1184,20 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter, · 1 unmodified line
1084	static ssize_t quad8_count_ceiling_read(struct counter_device *counter,	1184	static ssize_t quad8_count_ceiling_read(struct counter_device *counter,
1085	struct counter_count count, void private, char *buf)	1185	struct counter_count count, void private, char *buf)
1086	{	1186	{
1087	const struct quad8_iio *const priv = counter->priv;	1187	struct quad8_iio *const priv = counter->priv;
		1188
		1189	mutex_lock(&priv->lock);
1088		1190
1089	/* Range Limit and Modulo-N count modes use preset value as ceiling */	1191	/* Range Limit and Modulo-N count modes use preset value as ceiling */
1090	switch (priv->count_mode[count->id]) {	1192	switch (priv->count_mode[count->id]) {
1091	case 1:	1193	case 1:
1092	case 3:	1194	case 3:
1093	return quad8_count_preset_read(counter, count, private, buf);	1195	mutex_unlock(&priv->lock);
		1196	return sprintf(buf, "%u\n", priv->preset[count->id]);
1094	}	1197	}
1095		1198
		1199	mutex_unlock(&priv->lock);
		1200
1096	/* By default 0x1FFFFFF (25 bits unsigned) is maximum count */	1201	/* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
1097	return sprintf(buf, "33554431\n");	1202	return sprintf(buf, "33554431\n");
1098	}	1203	}
@@ -1101,15 +1206,29 @@ static ssize_t quad8_count_ceiling_write(struct counter_device *counter, · 2 unmodified lines
1101	struct counter_count count, void private, const char *buf, size_t len)	1206	struct counter_count count, void private, const char *buf, size_t len)
1102	{	1207	{
1103	struct quad8_iio *const priv = counter->priv;	1208	struct quad8_iio *const priv = counter->priv;
		1209	unsigned int ceiling;
		1210	int ret;
		1211
		1212	ret = kstrtouint(buf, 0, &ceiling);
		1213	if (ret)
		1214	return ret;
		1215
		1216	/* Only 24-bit values are supported */
		1217	if (ceiling > 0xFFFFFF)
		1218	return -EINVAL;
		1219
		1220	mutex_lock(&priv->lock);
1104		1221
1105	/* Range Limit and Modulo-N count modes use preset value as ceiling */	1222	/* Range Limit and Modulo-N count modes use preset value as ceiling */
1106	switch (priv->count_mode[count->id]) {	1223	switch (priv->count_mode[count->id]) {
1107	case 1:	1224	case 1:
1108	case 3:	1225	case 3:
1109	return quad8_count_preset_write(counter, count, private, buf,	1226	quad8_preset_register_set(priv, count->id, ceiling);
1110	len);	1227	break;
1111	}	1228	}
1112		1229
		1230	mutex_unlock(&priv->lock);
		1231
1113	return len;	1232	return len;
1114	}	1233	}
1115		1234
@@ -1137,6 +1256,8 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter, · 21 unmodified lines
1137	/* Preset enable is active low in Input/Output Control register */	1256	/* Preset enable is active low in Input/Output Control register */
1138	preset_enable = !preset_enable;	1257	preset_enable = !preset_enable;
1139		1258
		1259	mutex_lock(&priv->lock);
		1260
1140	priv->preset_enable[count->id] = preset_enable;	1261	priv->preset_enable[count->id] = preset_enable;
1141		1262
1142	ior_cfg = priv->ab_enable[count->id] \| (unsigned int)preset_enable << 1;	1263	ior_cfg = priv->ab_enable[count->id] \| (unsigned int)preset_enable << 1;
@@ -1144,6 +1265,8 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter, · 1 unmodified line
1144	/* Load I/O control configuration to Input / Output Control Register */	1265	/* Load I/O control configuration to Input / Output Control Register */
1145	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset);	1266	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset);
1146		1267
		1268	mutex_unlock(&priv->lock);
		1269
1147	return len;	1270	return len;
1148	}	1271	}
1149		1272
@@ -1429,6 +1552,9 @@ static int quad8_probe(struct device *dev, unsigned int id) · 279 unmodified lines
1429	quad8iio->counter.priv = quad8iio;	1552	quad8iio->counter.priv = quad8iio;
1430	quad8iio->base = base[id];	1553	quad8iio->base = base[id];
1431		1554
		1555	/* Initialize mutex */
		1556	mutex_init(&quad8iio->lock);
		1557
1432	/* Reset all counters and disable interrupt function */	1558	/* Reset all counters and disable interrupt function */
1433	outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);	1559	outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);
1434	/* Set initial configuration for all counters */	1560	/* Set initial configuration for all counters */

drivers/cpufreq/intel_pstate.c+1−1

@@ -1059,7 +1059,7 @@ static ssize_t store_no_turbo(struct kobject a, struct kobj_attribute b, · 1058 unmodified lines
1059		1059
1060	update_turbo_state();	1060	update_turbo_state();
1061	if (global.turbo_disabled) {	1061	if (global.turbo_disabled) {
1062	pr_warn("Turbo disabled by BIOS or unavailable on processor\n");	1062	pr_notice_once("Turbo disabled by BIOS or unavailable on processor\n");
1063	mutex_unlock(&intel_pstate_limits_lock);	1063	mutex_unlock(&intel_pstate_limits_lock);
1064	mutex_unlock(&intel_pstate_driver_lock);	1064	mutex_unlock(&intel_pstate_driver_lock);
1065	return -EPERM;	1065	return -EPERM;

drivers/crypto/caam/caamalg.c+7−3

 	struct caam_drv_private_jr *jrp = dev_get_drvdata(jrdev);
 	struct aead_edesc *edesc;
 	int ecode = 0;
+	bool has_bklog;
 	dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
 	edesc = rctx->edesc;
+	has_bklog = edesc->bklog;
 	if (err)
 		ecode = caam_jr_strstatus(jrdev, err);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		aead_request_complete(req, ecode);
 	else
 		crypto_finalize_aead_request(jrp->engine, req, ecode);
 	struct caam_drv_private_jr *jrp = dev_get_drvdata(jrdev);
 	int ivsize = crypto_skcipher_ivsize(skcipher);
 	int ecode = 0;
+	bool has_bklog;
 	dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
 	edesc = rctx->edesc;
+	has_bklog = edesc->bklog;
 	if (err)
 		ecode = caam_jr_strstatus(jrdev, err);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		skcipher_request_complete(req, ecode);
 	else
 		crypto_finalize_skcipher_request(jrp->engine, req, ecode);
 	if (ivsize || mapped_dst_nents > 1)
 		sg_to_sec4_set_last(edesc->sec4_sg + dst_sg_idx +
-				    mapped_dst_nents);
+				    mapped_dst_nents - 1 + !!ivsize);
 	if (sec4_sg_bytes) {
 		edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,

drivers/crypto/caam/caamhash.c+6−2

 	struct caam_hash_state *state = ahash_request_ctx(req);
 	struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
 	int ecode = 0;
+	bool has_bklog;
 	dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
 	edesc = state->edesc;
+	has_bklog = edesc->bklog;
 	if (err)
 		ecode = caam_jr_strstatus(jrdev, err);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		req->base.complete(&req->base, ecode);
 	else
 		crypto_finalize_hash_request(jrp->engine, req, ecode);
 	struct caam_hash_state *state = ahash_request_ctx(req);
 	int digestsize = crypto_ahash_digestsize(ahash);
 	int ecode = 0;
+	bool has_bklog;
 	dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
 	edesc = state->edesc;
+	has_bklog = edesc->bklog;
 	if (err)
 		ecode = caam_jr_strstatus(jrdev, err);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		req->base.complete(&req->base, ecode);
 	else
 		crypto_finalize_hash_request(jrp->engine, req, ecode);

drivers/crypto/caam/caampkc.c+6−2

 	struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
 	struct rsa_edesc *edesc;
 	int ecode = 0;
+	bool has_bklog;
 	if (err)
 		ecode = caam_jr_strstatus(dev, err);
 	edesc = req_ctx->edesc;
+	has_bklog = edesc->bklog;
 	rsa_pub_unmap(dev, edesc, req);
 	rsa_io_unmap(dev, edesc, req);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		akcipher_request_complete(req, ecode);
 	else
 		crypto_finalize_akcipher_request(jrp->engine, req, ecode);
 	struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
 	struct rsa_edesc *edesc;
 	int ecode = 0;
+	bool has_bklog;
 	if (err)
 		ecode = caam_jr_strstatus(dev, err);
 	edesc = req_ctx->edesc;
+	has_bklog = edesc->bklog;
 	switch (key->priv_form) {
 	case FORM1:
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		akcipher_request_complete(req, ecode);
 	else
 		crypto_finalize_akcipher_request(jrp->engine, req, ecode);

drivers/crypto/chelsio/chcr_ktls.c+48−41

@@ -120,12 +120,10 @@ out: · 119 unmodified lines
120	static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info,	120	static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info,
121	int new_state)	121	int new_state)
122	{	122	{
123	unsigned long flags;
124
125	/* This function can be called from both rx (interrupt context) and tx	123	/* This function can be called from both rx (interrupt context) and tx
126	* queue contexts.	124	* queue contexts.
127	*/	125	*/
128	spin_lock_irqsave(&tx_info->lock, flags);	126	spin_lock_bh(&tx_info->lock);
129	switch (tx_info->connection_state) {	127	switch (tx_info->connection_state) {
130	case KTLS_CONN_CLOSED:	128	case KTLS_CONN_CLOSED:
131	tx_info->connection_state = new_state;	129	tx_info->connection_state = new_state;
@@ -169,7 +167,7 @@ static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info, · 37 unmodified lines
169	pr_err("unknown KTLS connection state\n");	167	pr_err("unknown KTLS connection state\n");
170	break;	168	break;
171	}	169	}
172	spin_unlock_irqrestore(&tx_info->lock, flags);	170	spin_unlock_bh(&tx_info->lock);
173		171
174	return tx_info->connection_state;	172	return tx_info->connection_state;
175	}	173	}
@@ -675,41 +673,14 @@ int chcr_ktls_cpl_set_tcb_rpl(struct adapter adap, unsigned char input) · 499 unmodified lines
675	return 0;	673	return 0;
676	}	674	}
677		675
678	/*	676	static void __chcr_write_cpl_set_tcb_ulp(struct chcr_ktls_info tx_info,
679	* chcr_write_cpl_set_tcb_ulp: update tcb values.	677	u32 tid, void *pos, u16 word, u64 mask,
680	* TCB is responsible to create tcp headers, so all the related values
681	* should be correctly updated.
682	* @tx_info - driver specific tls info.
683	* @q - tx queue on which packet is going out.
684	* @tid - TCB identifier.
685	* @pos - current index where should we start writing.
686	* @word - TCB word.
687	* @mask - TCB word related mask.
688	* @val - TCB word related value.
689	* @reply - set 1 if looking for TP response.
690	* return - next position to write.
691	*/
692	static void chcr_write_cpl_set_tcb_ulp(struct chcr_ktls_info tx_info,
693	struct sge_eth_txq *q, u32 tid,
694	void *pos, u16 word, u64 mask,
695	u64 val, u32 reply)	678	u64 val, u32 reply)
696	{	679	{
697	struct cpl_set_tcb_field_core *cpl;	680	struct cpl_set_tcb_field_core *cpl;
698	struct ulptx_idata *idata;	681	struct ulptx_idata *idata;
699	struct ulp_txpkt *txpkt;	682	struct ulp_txpkt *txpkt;
700	void *save_pos = NULL;
701	u8 buf[48] = {0};
702	int left;
703		683
704	left = (void *)q->q.stat - pos;
705	if (unlikely(left < CHCR_SET_TCB_FIELD_LEN)) {
706	if (!left) {
707	pos = q->q.desc;
708	} else {
709	save_pos = pos;
710	pos = buf;
711	}
712	}
713	/* ULP_TXPKT */	684	/* ULP_TXPKT */
714	txpkt = pos;	685	txpkt = pos;
715	txpkt->cmd_dest = htonl(ULPTX_CMD_V(ULP_TX_PKT) \| ULP_TXPKT_DEST_V(0));	686	txpkt->cmd_dest = htonl(ULPTX_CMD_V(ULP_TX_PKT) \| ULP_TXPKT_DEST_V(0));
@@ -734,18 +705,54 @@ static void chcr_write_cpl_set_tcb_ulp(struct chcr_ktls_info tx_info, · 18 unmodified lines
734	idata = (struct ulptx_idata *)(cpl + 1);	705	idata = (struct ulptx_idata *)(cpl + 1);
735	idata->cmd_more = htonl(ULPTX_CMD_V(ULP_TX_SC_NOOP));	706	idata->cmd_more = htonl(ULPTX_CMD_V(ULP_TX_SC_NOOP));
736	idata->len = htonl(0);	707	idata->len = htonl(0);
		708	pos = idata + 1;
737		709
738	if (save_pos) {	710	return pos;
739	pos = chcr_copy_to_txd(buf, &q->q, save_pos,	711	}
740	CHCR_SET_TCB_FIELD_LEN);	712
741	} else {	713
742	/* check again if we are at the end of the queue */	714	/*
743	if (left == CHCR_SET_TCB_FIELD_LEN)	715	* chcr_write_cpl_set_tcb_ulp: update tcb values.
		716	* TCB is responsible to create tcp headers, so all the related values
		717	* should be correctly updated.
		718	* @tx_info - driver specific tls info.
		719	* @q - tx queue on which packet is going out.
		720	* @tid - TCB identifier.
		721	* @pos - current index where should we start writing.
		722	* @word - TCB word.
		723	* @mask - TCB word related mask.
		724	* @val - TCB word related value.
		725	* @reply - set 1 if looking for TP response.
		726	* return - next position to write.
		727	*/
		728	static void chcr_write_cpl_set_tcb_ulp(struct chcr_ktls_info tx_info,
		729	struct sge_eth_txq *q, u32 tid,
		730	void *pos, u16 word, u64 mask,
		731	u64 val, u32 reply)
		732	{
		733	int left = (void *)q->q.stat - pos;
		734
		735	if (unlikely(left < CHCR_SET_TCB_FIELD_LEN)) {
		736	if (!left) {
744	pos = q->q.desc;	737	pos = q->q.desc;
745	else	738	} else {
746	pos = idata + 1;	739	u8 buf[48] = {0};
		740
		741	__chcr_write_cpl_set_tcb_ulp(tx_info, tid, buf, word,
		742	mask, val, reply);
		743
		744	return chcr_copy_to_txd(buf, &q->q, pos,
		745	CHCR_SET_TCB_FIELD_LEN);
		746	}
747	}	747	}
748		748
		749	pos = __chcr_write_cpl_set_tcb_ulp(tx_info, tid, pos, word,
		750	mask, val, reply);
		751
		752	/* check again if we are at the end of the queue */
		753	if (left == CHCR_SET_TCB_FIELD_LEN)
		754	pos = q->q.desc;
		755
749	return pos;	756	return pos;
750	}	757	}
751		758

drivers/dma-buf/dma-buf.c+4−3

 		return ret;
-	case DMA_BUF_SET_NAME:
+	case DMA_BUF_SET_NAME_A:
+	case DMA_BUF_SET_NAME_B:
 		return dma_buf_set_name(dmabuf, (const char __user *)arg);
 	default:
  * calls attach() of dma_buf_ops to allow device-specific attach functionality
  * @dmabuf:		[in]	buffer to attach device to.
  * @dev:		[in]	device to be attached.
- * @importer_ops	[in]	importer operations for the attachment
+ * @importer_ops:	[in]	importer operations for the attachment
- * @importer_priv	[in]	importer private pointer for the attachment
+ * @importer_priv:	[in]	importer private pointer for the attachment
  *
  * Returns struct dma_buf_attachment pointer for this attachment. Attachments
  * must be cleaned up by calling dma_buf_detach().

drivers/dma/Kconfig+2−1

@@ -241,7 +241,8 @@ config FSL_RAID · 240 unmodified lines
241		241
242	config HISI_DMA	242	config HISI_DMA
243	tristate "HiSilicon DMA Engine support"	243	tristate "HiSilicon DMA Engine support"
244	depends on ARM64 \|\| (COMPILE_TEST && PCI_MSI)	244	depends on ARM64 \|\| COMPILE_TEST
		245	depends on PCI_MSI
245	select DMA_ENGINE	246	select DMA_ENGINE
246	select DMA_VIRTUAL_CHANNELS	247	select DMA_VIRTUAL_CHANNELS
247	help	248	help

drivers/dma/dmaengine.c+26−34

 	struct dma_chan_dev *chan_dev;
 	chan_dev = container_of(dev, typeof(*chan_dev), device);
-	if (atomic_dec_and_test(chan_dev->idr_ref)) {
-		ida_free(&dma_ida, chan_dev->dev_id);
-		kfree(chan_dev->idr_ref);
-	}
 	kfree(chan_dev);
 }
 }
 static int __dma_async_device_channel_register(struct dma_device *device,
-					       struct dma_chan *chan,
+					       struct dma_chan *chan)
-					       int chan_id)
 {
 	int rc = 0;
-	int chancnt = device->chancnt;
-	atomic_t *idr_ref;
-	struct dma_chan *tchan;
-	tchan = list_first_entry_or_null(&device->channels,
-					 struct dma_chan, device_node);
-	if (!tchan)
-		return -ENODEV;
-	if (tchan->dev) {
-		idr_ref = tchan->dev->idr_ref;
-	} else {
-		idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
-		if (!idr_ref)
-			return -ENOMEM;
-		atomic_set(idr_ref, 0);
-	}
 	chan->local = alloc_percpu(typeof(*chan->local));
 	if (!chan->local)
 	 * When the chan_id is a negative value, we are dynamically adding
 	 * the channel. Otherwise we are static enumerating.
 	 */
-	chan->chan_id = chan_id < 0 ? chancnt : chan_id;
+	mutex_lock(&device->chan_mutex);
+	chan->chan_id = ida_alloc(&device->chan_ida, GFP_KERNEL);
+	mutex_unlock(&device->chan_mutex);
+	if (chan->chan_id < 0) {
+		pr_err("%s: unable to alloc ida for chan: %d\n",
+		       __func__, chan->chan_id);
+		goto err_out;
+	}
 	chan->dev->device.class = &dma_devclass;
 	chan->dev->device.parent = device->dev;
 	chan->dev->chan = chan;
-	chan->dev->idr_ref = idr_ref;
 	chan->dev->dev_id = device->dev_id;
-	atomic_inc(idr_ref);
 	dev_set_name(&chan->dev->device, "dma%dchan%d",
 		     device->dev_id, chan->chan_id);
 	rc = device_register(&chan->dev->device);
 	if (rc)
-		goto err_out;
+		goto err_out_ida;
 	chan->client_count = 0;
-	device->chancnt = chan->chan_id + 1;
+	device->chancnt++;
 	return 0;
+ err_out_ida:
+	mutex_lock(&device->chan_mutex);
+	ida_free(&device->chan_ida, chan->chan_id);
+	mutex_unlock(&device->chan_mutex);
  err_out:
 	free_percpu(chan->local);
 	kfree(chan->dev);
-	if (atomic_dec_return(idr_ref) == 0)
-		kfree(idr_ref);
 	return rc;
 }
 {
 	int rc;
-	rc = __dma_async_device_channel_register(device, chan, -1);
+	rc = __dma_async_device_channel_register(device, chan);
 	if (rc < 0)
 		return rc;
 	device->chancnt--;
 	chan->dev->chan = NULL;
 	mutex_unlock(&dma_list_mutex);
+	mutex_lock(&device->chan_mutex);
+	ida_free(&device->chan_ida, chan->chan_id);
+	mutex_unlock(&device->chan_mutex);
 	device_unregister(&chan->dev->device);
 	free_percpu(chan->local);
 }
  */
 int dma_async_device_register(struct dma_device *device)
 {
-	int rc, i = 0;
+	int rc;
 	struct dma_chan* chan;
 	if (!device)
 	if (rc != 0)
 		return rc;
+	mutex_init(&device->chan_mutex);
+	ida_init(&device->chan_ida);
 	/* represent channels in sysfs. Probably want devs too */
 	list_for_each_entry(chan, &device->channels, device_node) {
-		rc = __dma_async_device_channel_register(device, chan, i++);
+		rc = __dma_async_device_channel_register(device, chan);
 		if (rc < 0)
 			goto err_out;
 	}
 	 */
 	dma_cap_set(DMA_PRIVATE, device->cap_mask);
 	dma_channel_rebalance();
+	ida_free(&dma_ida, device->dev_id);
 	dma_device_put(device);
 	mutex_unlock(&dma_list_mutex);
 }

drivers/dma/dmatest.c+3−3

@@ -240,7 +240,7 @@ static bool is_threaded_test_run(struct dmatest_info *info) · 239 unmodified lines
240	struct dmatest_thread *thread;	240	struct dmatest_thread *thread;
241		241
242	list_for_each_entry(thread, &dtc->threads, node) {	242	list_for_each_entry(thread, &dtc->threads, node) {
243	if (!thread->done)	243	if (!thread->done && !thread->pending)
244	return true;	244	return true;
245	}	245	}
246	}	246	}
@@ -662,8 +662,8 @@ static int dmatest_func(void *data) · 415 unmodified lines
662	flags = DMA_CTRL_ACK \| DMA_PREP_INTERRUPT;	662	flags = DMA_CTRL_ACK \| DMA_PREP_INTERRUPT;
663		663
664	ktime = ktime_get();	664	ktime = ktime_get();
665	while (!kthread_should_stop()	665	while (!(kthread_should_stop() \|\|
666	&& !(params->iterations && total_tests >= params->iterations)) {	666	(params->iterations && total_tests >= params->iterations))) {
667	struct dma_async_tx_descriptor *tx = NULL;	667	struct dma_async_tx_descriptor *tx = NULL;
668	struct dmaengine_unmap_data *um;	668	struct dmaengine_unmap_data *um;
669	dma_addr_t *dsts;	669	dma_addr_t *dsts;

drivers/dma/mmp_tdma.c+4−1

 		gen_pool_free(gpool, (unsigned long)tdmac->desc_arr,
 				size);
 	tdmac->desc_arr = NULL;
+	if (tdmac->status == DMA_ERROR)
+		tdmac->status = DMA_COMPLETE;
 	return;
 }
 	if (!desc)
 		goto err_out;
-	mmp_tdma_config_write(chan, direction, &tdmac->slave_config);
+	if (mmp_tdma_config_write(chan, direction, &tdmac->slave_config))
+		goto err_out;
 	while (buf < buf_len) {
 		desc = &tdmac->desc_arr[i];

drivers/dma/pch_dma.c+1−1

 	}
 	pci_set_master(pdev);
+	pd->dma.dev = &pdev->dev;
 	err = request_irq(pdev->irq, pd_irq, IRQF_SHARED, DRV_NAME, pd);
 	if (err) {
 		goto err_free_irq;
 	}
-	pd->dma.dev = &pdev->dev;
 	INIT_LIST_HEAD(&pd->dma.channels);

drivers/dma/tegra20-apb-dma.c+9−0

 static void tegra_dma_synchronize(struct dma_chan *dc)
 {
 	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+	int err;
+	err = pm_runtime_get_sync(tdc->tdma->dev);
+	if (err < 0) {
+		dev_err(tdc2dev(tdc), "Failed to synchronize DMA: %d\n", err);
+		return;
+	}
 	/*
 	 * CPU, which handles interrupt, could be busy in
 	wait_event(tdc->wq, tegra_dma_eoc_interrupt_deasserted(tdc));
 	tasklet_kill(&tdc->tasklet);
+	pm_runtime_put(tdc->tdma->dev);
 }
 static unsigned int tegra_dma_sg_bytes_xferred(struct tegra_dma_channel *tdc,

drivers/dma/ti/k3-psil.c+1−0

@@ -27,6 +27,7 @@ struct psil_endpoint_config *psil_get_ep_config(u32 thread_id) · 26 unmodified lines
27	soc_ep_map = &j721e_ep_map;	27	soc_ep_map = &j721e_ep_map;
28	} else {	28	} else {
29	pr_err("PSIL: No compatible machine found for map\n");	29	pr_err("PSIL: No compatible machine found for map\n");
		30	mutex_unlock(&ep_map_mutex);
30	return ERR_PTR(-ENOTSUPP);	31	return ERR_PTR(-ENOTSUPP);
31	}	32	}
32	pr_debug("%s: Using map for %s\n", __func__, soc_ep_map->name);	33	pr_debug("%s: Using map for %s\n", __func__, soc_ep_map->name);

drivers/dma/xilinx/xilinx_dma.c+10−10

@@ -1230,16 +1230,16 @@ static enum dma_status xilinx_dma_tx_status(struct dma_chan *dchan, · 1229 unmodified lines
1230	return ret;	1230	return ret;
1231		1231
1232	spin_lock_irqsave(&chan->lock, flags);	1232	spin_lock_irqsave(&chan->lock, flags);
1233		1233	if (!list_empty(&chan->active_list)) {
1234	desc = list_last_entry(&chan->active_list,	1234	desc = list_last_entry(&chan->active_list,
1235	struct xilinx_dma_tx_descriptor, node);	1235	struct xilinx_dma_tx_descriptor, node);
1236	/*	1236	/*
1237	* VDMA and simple mode do not support residue reporting, so the	1237	* VDMA and simple mode do not support residue reporting, so the
1238	* residue field will always be 0.	1238	* residue field will always be 0.
1239	*/	1239	*/
1240	if (chan->has_sg && chan->xdev->dma_config->dmatype != XDMA_TYPE_VDMA)	1240	if (chan->has_sg && chan->xdev->dma_config->dmatype != XDMA_TYPE_VDMA)
1241	residue = xilinx_dma_get_residue(chan, desc);	1241	residue = xilinx_dma_get_residue(chan, desc);
1242		1242	}
1243	spin_unlock_irqrestore(&chan->lock, flags);	1243	spin_unlock_irqrestore(&chan->lock, flags);
1244		1244
1245	dma_set_residue(txstate, residue);	1245	dma_set_residue(txstate, residue);

drivers/firmware/efi/tpm.c+1−1

@@ -16,7 +16,7 @@ · 15 unmodified lines
16	int efi_tpm_final_log_size;	16	int efi_tpm_final_log_size;
17	EXPORT_SYMBOL(efi_tpm_final_log_size);	17	EXPORT_SYMBOL(efi_tpm_final_log_size);
18		18
19	static int tpm2_calc_event_log_size(void data, int count, void size_info)	19	static int __init tpm2_calc_event_log_size(void data, int count, void size_info)
20	{	20	{
21	struct tcg_pcr_event2_head *header;	21	struct tcg_pcr_event2_head *header;
22	int event_size, size = 0;	22	int event_size, size = 0;

drivers/firmware/imx/Kconfig+2−2

@@ -12,7 +12,7 @@ config IMX_DSP · 11 unmodified lines
12		12
13	config IMX_SCU	13	config IMX_SCU
14	bool "IMX SCU Protocol driver"	14	bool "IMX SCU Protocol driver"
15	depends on IMX_MBOX \|\| COMPILE_TEST	15	depends on IMX_MBOX
16	help	16	help
17	The System Controller Firmware (SCFW) is a low-level system function	17	The System Controller Firmware (SCFW) is a low-level system function
18	which runs on a dedicated Cortex-M core to provide power, clock, and	18	which runs on a dedicated Cortex-M core to provide power, clock, and
@@ -24,6 +24,6 @@ config IMX_SCU · 5 unmodified lines
24		24
25	config IMX_SCU_PD	25	config IMX_SCU_PD
26	bool "IMX SCU Power Domain driver"	26	bool "IMX SCU Power Domain driver"
27	depends on IMX_SCU \|\| COMPILE_TEST	27	depends on IMX_SCU
28	help	28	help
29	The System Controller Firmware (SCFW) based power domain driver.	29	The System Controller Firmware (SCFW) based power domain driver.

drivers/firmware/xilinx/zynqmp-debug.c+1−1

@@ -35,7 +35,7 @@ static struct pm_api_info pm_api_list[] = { · 34 unmodified lines
35	PM_API(PM_QUERY_DATA),	35	PM_API(PM_QUERY_DATA),
36	};	36	};
37		37
38	struct dentry *firmware_debugfs_root;	38	static struct dentry *firmware_debugfs_root;
39		39
40	/**	40	/**
41	* zynqmp_pm_argument_value() - Extract argument value from a PM-API request	41	* zynqmp_pm_argument_value() - Extract argument value from a PM-API request

drivers/fpga/dfl-pci.c+4−2

 			return ret;
 		ret = pci_enable_sriov(pcidev, num_vfs);
-		if (ret)
+		if (ret) {
 			dfl_fpga_cdev_config_ports_pf(cdev);
+			return ret;
+		}
 	}
-	return ret;
+	return num_vfs;
 }
 static void cci_pci_remove(struct pci_dev *pcidev)

drivers/fpga/zynq-fpga.c+2−1

@@ -583,7 +583,8 @@ static int zynq_fpga_probe(struct platform_device *pdev) · 582 unmodified lines
583		583
584	priv->clk = devm_clk_get(dev, "ref_clk");	584	priv->clk = devm_clk_get(dev, "ref_clk");
585	if (IS_ERR(priv->clk)) {	585	if (IS_ERR(priv->clk)) {
586	dev_err(dev, "input clock not found\n");	586	if (PTR_ERR(priv->clk) != -EPROBE_DEFER)
		587	dev_err(dev, "input clock not found\n");
587	return PTR_ERR(priv->clk);	588	return PTR_ERR(priv->clk);
588	}	589	}
589		590

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+2−5

 		}
 	}
-	amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
-	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
-	amdgpu_amdkfd_suspend(adev, !fbcon);
 	amdgpu_ras_suspend(adev);
 	r = amdgpu_device_ip_suspend_phase1(adev);
+	amdgpu_amdkfd_suspend(adev, !fbcon);
 	/* evict vram memory */
 	amdgpu_bo_evict_vram(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+2−1

  * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches
  * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
  * - 3.36.0 - Allow reading more status registers on si/cik
+ * - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness
  */
 #define KMS_DRIVER_MAJOR	3
-#define KMS_DRIVER_MINOR	36
+#define KMS_DRIVER_MINOR	37
 #define KMS_DRIVER_PATCHLEVEL	0
 int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h+16−0

@@ -73,6 +73,22 @@ · 72 unmodified lines
73	#define SDMA_OP_AQL_COPY 0	73	#define SDMA_OP_AQL_COPY 0
74	#define SDMA_OP_AQL_BARRIER_OR 0	74	#define SDMA_OP_AQL_BARRIER_OR 0
75		75
		76	#define SDMA_GCR_RANGE_IS_PA (1 << 18)
		77	#define SDMA_GCR_SEQ(x) (((x) & 0x3) << 16)
		78	#define SDMA_GCR_GL2_WB (1 << 15)
		79	#define SDMA_GCR_GL2_INV (1 << 14)
		80	#define SDMA_GCR_GL2_DISCARD (1 << 13)
		81	#define SDMA_GCR_GL2_RANGE(x) (((x) & 0x3) << 11)
		82	#define SDMA_GCR_GL2_US (1 << 10)
		83	#define SDMA_GCR_GL1_INV (1 << 9)
		84	#define SDMA_GCR_GLV_INV (1 << 8)
		85	#define SDMA_GCR_GLK_INV (1 << 7)
		86	#define SDMA_GCR_GLK_WB (1 << 6)
		87	#define SDMA_GCR_GLM_INV (1 << 5)
		88	#define SDMA_GCR_GLM_WB (1 << 4)
		89	#define SDMA_GCR_GL1_RANGE(x) (((x) & 0x3) << 2)
		90	#define SDMA_GCR_GLI_INV(x) (((x) & 0x3) << 0)
		91
76	/define for op field/	92	/define for op field/
77	#define SDMA_PKT_HEADER_op_offset 0	93	#define SDMA_PKT_HEADER_op_offset 0
78	#define SDMA_PKT_HEADER_op_mask 0x000000FF	94	#define SDMA_PKT_HEADER_op_mask 0x000000FF

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c+13−1

 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);
 	uint64_t csa_mc_addr = amdgpu_sdma_get_csa_mc_addr(ring, vmid);
+	/* Invalidate L2, because if we don't do it, we might get stale cache
+	 * lines from previous IBs.
+	 */
+	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ));
+	amdgpu_ring_write(ring, 0);
+	amdgpu_ring_write(ring, (SDMA_GCR_GL2_INV |
+				 SDMA_GCR_GL2_WB |
+				 SDMA_GCR_GLM_INV |
+				 SDMA_GCR_GLM_WB) << 16);
+	amdgpu_ring_write(ring, 0xffffff80);
+	amdgpu_ring_write(ring, 0xffff);
 	/* An IB packet must end on a 8 DW boundary--the next dword
 	 * must be on a 8-dword boundary. Our IB packet below is 6
 	 * dwords long, thus add x number of NOPs, such that, in
 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 3 +
 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 * 2 +
 		10 + 10 + 10, /* sdma_v5_0_ring_emit_fence x3 for user fence, vm fence */
-	.emit_ib_size = 7 + 6, /* sdma_v5_0_ring_emit_ib */
+	.emit_ib_size = 5 + 7 + 6, /* sdma_v5_0_ring_emit_ib */
 	.emit_ib = sdma_v5_0_ring_emit_ib,
 	.emit_fence = sdma_v5_0_ring_emit_fence,
 	.emit_pipeline_sync = sdma_v5_0_ring_emit_pipeline_sync,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+52−17

@@ -2008,17 +2008,22 @@ void amdgpu_dm_update_connector_after_detect( · 2007 unmodified lines
2008	dc_sink_retain(aconnector->dc_sink);	2008	dc_sink_retain(aconnector->dc_sink);
2009	if (sink->dc_edid.length == 0) {	2009	if (sink->dc_edid.length == 0) {
2010	aconnector->edid = NULL;	2010	aconnector->edid = NULL;
2011	drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux);	2011	if (aconnector->dc_link->aux_mode) {
		2012	drm_dp_cec_unset_edid(
		2013	&aconnector->dm_dp_aux.aux);
		2014	}
2012	} else {	2015	} else {
2013	aconnector->edid =	2016	aconnector->edid =
2014	(struct edid *) sink->dc_edid.raw_edid;	2017	(struct edid *)sink->dc_edid.raw_edid;
2015
2016		2018
2017	drm_connector_update_edid_property(connector,	2019	drm_connector_update_edid_property(connector,
2018	aconnector->edid);	2020	aconnector->edid);
2019	drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux,	2021
2020	aconnector->edid);	2022	if (aconnector->dc_link->aux_mode)
		2023	drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux,
		2024	aconnector->edid);
2021	}	2025	}
		2026
2022	amdgpu_dm_update_freesync_caps(connector, aconnector->edid);	2027	amdgpu_dm_update_freesync_caps(connector, aconnector->edid);
2023	update_connector_ext_caps(aconnector);	2028	update_connector_ext_caps(aconnector);
2024	} else {	2029	} else {
@@ -3340,7 +3345,8 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev, · 1315 unmodified lines
3340	const union dc_tiling_info *tiling_info,	3345	const union dc_tiling_info *tiling_info,
3341	const uint64_t info,	3346	const uint64_t info,
3342	struct dc_plane_dcc_param *dcc,	3347	struct dc_plane_dcc_param *dcc,
3343	struct dc_plane_address *address)	3348	struct dc_plane_address *address,
		3349	bool force_disable_dcc)
3344	{	3350	{
3345	struct dc *dc = adev->dm.dc;	3351	struct dc *dc = adev->dm.dc;
3346	struct dc_dcc_surface_param input;	3352	struct dc_dcc_surface_param input;
@@ -3352,6 +3358,9 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev, · 5 unmodified lines
3352	memset(&input, 0, sizeof(input));	3358	memset(&input, 0, sizeof(input));
3353	memset(&output, 0, sizeof(output));	3359	memset(&output, 0, sizeof(output));
3354		3360
		3361	if (force_disable_dcc)
		3362	return 0;
		3363
3355	if (!offset)	3364	if (!offset)
3356	return 0;	3365	return 0;
3357		3366
@@ -3401,7 +3410,8 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, · 43 unmodified lines
3401	union dc_tiling_info *tiling_info,	3410	union dc_tiling_info *tiling_info,
3402	struct plane_size *plane_size,	3411	struct plane_size *plane_size,
3403	struct dc_plane_dcc_param *dcc,	3412	struct dc_plane_dcc_param *dcc,
3404	struct dc_plane_address *address)	3413	struct dc_plane_address *address,
		3414	bool force_disable_dcc)
3405	{	3415	{
3406	const struct drm_framebuffer *fb = &afb->base;	3416	const struct drm_framebuffer *fb = &afb->base;
3407	int ret;	3417	int ret;
@@ -3507,7 +3517,8 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev, · 99 unmodified lines
3507		3517
3508	ret = fill_plane_dcc_attributes(adev, afb, format, rotation,	3518	ret = fill_plane_dcc_attributes(adev, afb, format, rotation,
3509	plane_size, tiling_info,	3519	plane_size, tiling_info,
3510	tiling_flags, dcc, address);	3520	tiling_flags, dcc, address,
		3521	force_disable_dcc);
3511	if (ret)	3522	if (ret)
3512	return ret;	3523	return ret;
3513	}	3524	}
@@ -3599,7 +3610,8 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev, · 85 unmodified lines
3599	const struct drm_plane_state *plane_state,	3610	const struct drm_plane_state *plane_state,
3600	const uint64_t tiling_flags,	3611	const uint64_t tiling_flags,
3601	struct dc_plane_info *plane_info,	3612	struct dc_plane_info *plane_info,
3602	struct dc_plane_address *address)	3613	struct dc_plane_address *address,
		3614	bool force_disable_dcc)
3603	{	3615	{
3604	const struct drm_framebuffer *fb = plane_state->fb;	3616	const struct drm_framebuffer *fb = plane_state->fb;
3605	const struct amdgpu_framebuffer *afb =	3617	const struct amdgpu_framebuffer *afb =
@@ -3681,7 +3693,8 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev, · 75 unmodified lines
3681	plane_info->rotation, tiling_flags,	3693	plane_info->rotation, tiling_flags,
3682	&plane_info->tiling_info,	3694	&plane_info->tiling_info,
3683	&plane_info->plane_size,	3695	&plane_info->plane_size,
3684	&plane_info->dcc, address);	3696	&plane_info->dcc, address,
		3697	force_disable_dcc);
3685	if (ret)	3698	if (ret)
3686	return ret;	3699	return ret;
3687		3700
@@ -3704,6 +3717,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, · 16 unmodified lines
3704	struct dc_plane_info plane_info;	3717	struct dc_plane_info plane_info;
3705	uint64_t tiling_flags;	3718	uint64_t tiling_flags;
3706	int ret;	3719	int ret;
		3720	bool force_disable_dcc = false;
3707		3721
3708	ret = fill_dc_scaling_info(plane_state, &scaling_info);	3722	ret = fill_dc_scaling_info(plane_state, &scaling_info);
3709	if (ret)	3723	if (ret)
@@ -3718,9 +3732,11 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev, · 8 unmodified lines
3718	if (ret)	3732	if (ret)
3719	return ret;	3733	return ret;
3720		3734
		3735	force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend;
3721	ret = fill_dc_plane_info_and_addr(adev, plane_state, tiling_flags,	3736	ret = fill_dc_plane_info_and_addr(adev, plane_state, tiling_flags,
3722	&plane_info,	3737	&plane_info,
3723	&dc_plane_state->address);	3738	&dc_plane_state->address,
		3739	force_disable_dcc);
3724	if (ret)	3740	if (ret)
3725	return ret;	3741	return ret;
3726		3742
@@ -4664,6 +4680,7 @@ static void amdgpu_dm_connector_destroy(struct drm_connector *connector) · 937 unmodified lines
4664	i2c_del_adapter(&aconnector->i2c->base);	4680	i2c_del_adapter(&aconnector->i2c->base);
4665	kfree(aconnector->i2c);	4681	kfree(aconnector->i2c);
4666	}	4682	}
		4683	kfree(aconnector->dm_dp_aux.aux.name);
4667		4684
4668	kfree(connector);	4685	kfree(connector);
4669	}	4686	}
@@ -4723,10 +4740,19 @@ amdgpu_dm_connector_atomic_duplicate_state(struct drm_connector *connector) · 53 unmodified lines
4723	static int	4740	static int
4724	amdgpu_dm_connector_late_register(struct drm_connector *connector)	4741	amdgpu_dm_connector_late_register(struct drm_connector *connector)
4725	{	4742	{
4726	#if defined(CONFIG_DEBUG_FS)
4727	struct amdgpu_dm_connector *amdgpu_dm_connector =	4743	struct amdgpu_dm_connector *amdgpu_dm_connector =
4728	to_amdgpu_dm_connector(connector);	4744	to_amdgpu_dm_connector(connector);
		4745	int r;
4729		4746
		4747	if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) \|\|
		4748	(connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
		4749	amdgpu_dm_connector->dm_dp_aux.aux.dev = connector->kdev;
		4750	r = drm_dp_aux_register(&amdgpu_dm_connector->dm_dp_aux.aux);
		4751	if (r)
		4752	return r;
		4753	}
		4754
		4755	#if defined(CONFIG_DEBUG_FS)
4730	connector_debugfs_init(amdgpu_dm_connector);	4756	connector_debugfs_init(amdgpu_dm_connector);
4731	#endif	4757	#endif
4732		4758
@@ -5332,6 +5358,7 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, · 599 unmodified lines
5332	uint64_t tiling_flags;	5358	uint64_t tiling_flags;
5333	uint32_t domain;	5359	uint32_t domain;
5334	int r;	5360	int r;
		5361	bool force_disable_dcc = false;
5335		5362
5336	dm_plane_state_old = to_dm_plane_state(plane->state);	5363	dm_plane_state_old = to_dm_plane_state(plane->state);
5337	dm_plane_state_new = to_dm_plane_state(new_state);	5364	dm_plane_state_new = to_dm_plane_state(new_state);
@@ -5390,11 +5417,13 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, · 52 unmodified lines
5390	dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) {	5417	dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) {
5391	struct dc_plane_state *plane_state = dm_plane_state_new->dc_state;	5418	struct dc_plane_state *plane_state = dm_plane_state_new->dc_state;
5392		5419
		5420	force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend;
5393	fill_plane_buffer_attributes(	5421	fill_plane_buffer_attributes(
5394	adev, afb, plane_state->format, plane_state->rotation,	5422	adev, afb, plane_state->format, plane_state->rotation,
5395	tiling_flags, &plane_state->tiling_info,	5423	tiling_flags, &plane_state->tiling_info,
5396	&plane_state->plane_size, &plane_state->dcc,	5424	&plane_state->plane_size, &plane_state->dcc,
5397	&plane_state->address);	5425	&plane_state->address,
		5426	force_disable_dcc);
5398	}	5427	}
5399		5428
5400	return 0;	5429	return 0;
@@ -6092,7 +6121,7 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm, · 691 unmodified lines
6092		6121
6093	if (connector_type == DRM_MODE_CONNECTOR_DisplayPort	6122	if (connector_type == DRM_MODE_CONNECTOR_DisplayPort
6094	\|\| connector_type == DRM_MODE_CONNECTOR_eDP)	6123	\|\| connector_type == DRM_MODE_CONNECTOR_eDP)
6095	amdgpu_dm_initialize_dp_connector(dm, aconnector);	6124	amdgpu_dm_initialize_dp_connector(dm, aconnector, link->link_index);
6096		6125
6097	out_free:	6126	out_free:
6098	if (res) {	6127	if (res) {
@@ -6666,7 +6695,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, · 567 unmodified lines
6666	fill_dc_plane_info_and_addr(	6695	fill_dc_plane_info_and_addr(
6667	dm->adev, new_plane_state, tiling_flags,	6696	dm->adev, new_plane_state, tiling_flags,
6668	&bundle->plane_infos[planes_count],	6697	&bundle->plane_infos[planes_count],
6669	&bundle->flip_addrs[planes_count].address);	6698	&bundle->flip_addrs[planes_count].address,
		6699	false);
		6700
		6701	DRM_DEBUG_DRIVER("plane: id=%d dcc_en=%d\n",
		6702	new_plane_state->plane->index,
		6703	bundle->plane_infos[planes_count].dcc.enable);
6670		6704
6671	bundle->surface_updates[planes_count].plane_info =	6705	bundle->surface_updates[planes_count].plane_info =
6672	&bundle->plane_infos[planes_count];	6706	&bundle->plane_infos[planes_count];
@@ -8086,7 +8120,8 @@ dm_determine_update_type_for_commit(struct amdgpu_display_manager *dm, · 1413 unmodified lines
8086	ret = fill_dc_plane_info_and_addr(	8120	ret = fill_dc_plane_info_and_addr(
8087	dm->adev, new_plane_state, tiling_flags,	8121	dm->adev, new_plane_state, tiling_flags,
8088	plane_info,	8122	plane_info,
8089	&flip_addr->address);	8123	&flip_addr->address,
		8124	false);
8090	if (ret)	8125	if (ret)
8091	goto cleanup;	8126	goto cleanup;
8092		8127

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+9−6

 		to_amdgpu_dm_connector(connector);
 	int r;
-	amdgpu_dm_connector->dm_dp_aux.aux.dev = connector->kdev;
+	r = drm_dp_mst_connector_late_register(connector,
-	r = drm_dp_aux_register(&amdgpu_dm_connector->dm_dp_aux.aux);
+					       amdgpu_dm_connector->port);
-	if (r)
+	if (r < 0)
 		return r;
 #if defined(CONFIG_DEBUG_FS)
 	connector_debugfs_init(amdgpu_dm_connector);
 #endif
-	return r;
+	return 0;
 }
 static void
 };
 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
-				       struct amdgpu_dm_connector *aconnector)
+				       struct amdgpu_dm_connector *aconnector,
+				       int link_index)
 {
-	aconnector->dm_dp_aux.aux.name = "dmdc";
+	aconnector->dm_dp_aux.aux.name =
+		kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d",
+			  link_index);
 	aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
 	aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h+2−1

@@ -32,7 +32,8 @@ struct amdgpu_dm_connector; · 31 unmodified lines
32	int dm_mst_get_pbn_divider(struct dc_link *link);	32	int dm_mst_get_pbn_divider(struct dc_link *link);
33		33
34	void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,	34	void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
35	struct amdgpu_dm_connector *aconnector);	35	struct amdgpu_dm_connector *aconnector,
		36	int link_index);
36		37
37	#if defined(CONFIG_DRM_AMD_DC_DCN)	38	#if defined(CONFIG_DRM_AMD_DC_DCN)
38	bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,	39	bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,

drivers/gpu/drm/amd/display/dc/core/dc.c+2−3

 static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context)
 {
 	int i;
-	int count = 0;
-	struct pipe_ctx *pipe;
 	PERF_TRACE();
 	for (i = 0; i < MAX_PIPES; i++) {
-		pipe = &context->res_ctx.pipe_ctx[i];
+		int count = 0;
+		struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
 		if (!pipe->plane_state)
 			continue;

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+27−0

@@ -2908,6 +2908,12 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link link, union hpd_irq_data out_hpd · 2907 unmodified lines
2908	sizeof(hpd_irq_dpcd_data),	2908	sizeof(hpd_irq_dpcd_data),
2909	"Status: ");	2909	"Status: ");
2910		2910
		2911	for (i = 0; i < MAX_PIPES; i++) {
		2912	pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
		2913	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link)
		2914	link->dc->hwss.blank_stream(pipe_ctx);
		2915	}
		2916
2911	for (i = 0; i < MAX_PIPES; i++) {	2917	for (i = 0; i < MAX_PIPES; i++) {
2912	pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];	2918	pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
2913	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link)	2919	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link)
@@ -2927,6 +2933,12 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link link, union hpd_irq_data out_hpd · 13 unmodified lines
2927	if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)	2933	if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
2928	dc_link_reallocate_mst_payload(link);	2934	dc_link_reallocate_mst_payload(link);
2929		2935
		2936	for (i = 0; i < MAX_PIPES; i++) {
		2937	pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
		2938	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link)
		2939	link->dc->hwss.unblank_stream(pipe_ctx, &previous_link_settings);
		2940	}
		2941
2930	status = false;	2942	status = false;
2931	if (out_link_loss)	2943	if (out_link_loss)
2932	*out_link_loss = true;	2944	*out_link_loss = true;
@@ -4227,6 +4239,21 @@ void dp_set_fec_enable(struct dc_link *link, bool enable) · 1294 unmodified lines
4227	void dpcd_set_source_specific_data(struct dc_link *link)	4239	void dpcd_set_source_specific_data(struct dc_link *link)
4228	{	4240	{
4229	const uint32_t post_oui_delay = 30; // 30ms	4241	const uint32_t post_oui_delay = 30; // 30ms
		4242	uint8_t dspc = 0;
		4243	enum dc_status ret = DC_ERROR_UNEXPECTED;
		4244
		4245	ret = core_link_read_dpcd(link, DP_DOWN_STREAM_PORT_COUNT, &dspc,
		4246	sizeof(dspc));
		4247
		4248	if (ret != DC_OK) {
		4249	DC_LOG_ERROR("Error in DP aux read transaction,"
		4250	" not writing source specific data\n");
		4251	return;
		4252	}
		4253
		4254	/* Return if OUI unsupported */
		4255	if (!(dspc & DP_OUI_SUPPORT))
		4256	return;
4230		4257
4231	if (!link->dc->vendor_signature.is_valid) {	4258	if (!link->dc->vendor_signature.is_valid) {
4232	struct dpcd_amd_signature amd_signature;	4259	struct dpcd_amd_signature amd_signature;

drivers/gpu/drm/amd/display/dc/core/dc_stream.c+4−36

@@ -231,34 +231,6 @@ struct dc_stream_status *dc_stream_get_status( · 230 unmodified lines
231	return dc_stream_get_status_from_state(dc->current_state, stream);	231	return dc_stream_get_status_from_state(dc->current_state, stream);
232	}	232	}
233		233
234	static void delay_cursor_until_vupdate(struct pipe_ctx pipe_ctx, struct dc dc)
235	{
236	#if defined(CONFIG_DRM_AMD_DC_DCN)
237	unsigned int vupdate_line;
238	unsigned int lines_to_vupdate, us_to_vupdate, vpos, nvpos;
239	struct dc_stream_state *stream = pipe_ctx->stream;
240	unsigned int us_per_line;
241
242	if (stream->ctx->asic_id.chip_family == FAMILY_RV &&
243	ASICREV_IS_RAVEN(stream->ctx->asic_id.hw_internal_rev)) {
244
245	vupdate_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx);
246	if (!dc_stream_get_crtc_position(dc, &stream, 1, &vpos, &nvpos))
247	return;
248
249	if (vpos >= vupdate_line)
250	return;
251
252	us_per_line = stream->timing.h_total * 10000 / stream->timing.pix_clk_100hz;
253	lines_to_vupdate = vupdate_line - vpos;
254	us_to_vupdate = lines_to_vupdate * us_per_line;
255
256	/* 70 us is a conservative estimate of cursor update time*/
257	if (us_to_vupdate < 70)
258	udelay(us_to_vupdate);
259	}
260	#endif
261	}
262		234
263	/**	235	/**
264	* dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address	236	* dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address
@@ -298,9 +270,7 @@ bool dc_stream_set_cursor_attributes( · 33 unmodified lines
298		270
299	if (!pipe_to_program) {	271	if (!pipe_to_program) {
300	pipe_to_program = pipe_ctx;	272	pipe_to_program = pipe_ctx;
301		273	dc->hwss.cursor_lock(dc, pipe_to_program, true);
302	delay_cursor_until_vupdate(pipe_ctx, dc);
303	dc->hwss.pipe_control_lock(dc, pipe_to_program, true);
304	}	274	}
305		275
306	dc->hwss.set_cursor_attribute(pipe_ctx);	276	dc->hwss.set_cursor_attribute(pipe_ctx);
@@ -309,7 +279,7 @@ bool dc_stream_set_cursor_attributes( · 2 unmodified lines
309	}	279	}
310		280
311	if (pipe_to_program)	281	if (pipe_to_program)
312	dc->hwss.pipe_control_lock(dc, pipe_to_program, false);	282	dc->hwss.cursor_lock(dc, pipe_to_program, false);
313		283
314	return true;	284	return true;
315	}	285	}
@@ -349,16 +319,14 @@ bool dc_stream_set_cursor_position( · 33 unmodified lines
349		319
350	if (!pipe_to_program) {	320	if (!pipe_to_program) {
351	pipe_to_program = pipe_ctx;	321	pipe_to_program = pipe_ctx;
352		322	dc->hwss.cursor_lock(dc, pipe_to_program, true);
353	delay_cursor_until_vupdate(pipe_ctx, dc);
354	dc->hwss.pipe_control_lock(dc, pipe_to_program, true);
355	}	323	}
356		324
357	dc->hwss.set_cursor_position(pipe_ctx);	325	dc->hwss.set_cursor_position(pipe_ctx);
358	}	326	}
359		327
360	if (pipe_to_program)	328	if (pipe_to_program)
361	dc->hwss.pipe_control_lock(dc, pipe_to_program, false);	329	dc->hwss.cursor_lock(dc, pipe_to_program, false);
362		330
363	return true;	331	return true;
364	}	332	}

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c+1−0

@@ -2757,6 +2757,7 @@ static const struct hw_sequencer_funcs dce110_funcs = { · 2756 unmodified lines
2757	.disable_plane = dce110_power_down_fe,	2757	.disable_plane = dce110_power_down_fe,
2758	.pipe_control_lock = dce_pipe_control_lock,	2758	.pipe_control_lock = dce_pipe_control_lock,
2759	.interdependent_update_lock = NULL,	2759	.interdependent_update_lock = NULL,
		2760	.cursor_lock = dce_pipe_control_lock,
2760	.prepare_bandwidth = dce110_prepare_bandwidth,	2761	.prepare_bandwidth = dce110_prepare_bandwidth,
2761	.optimize_bandwidth = dce110_optimize_bandwidth,	2762	.optimize_bandwidth = dce110_optimize_bandwidth,
2762	.set_drr = set_drr,	2763	.set_drr = set_drr,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c+10−0

@@ -1625,6 +1625,16 @@ void dcn10_pipe_control_lock( · 1624 unmodified lines
1625	hws->funcs.verify_allow_pstate_change_high(dc);	1625	hws->funcs.verify_allow_pstate_change_high(dc);
1626	}	1626	}
1627		1627
		1628	void dcn10_cursor_lock(struct dc dc, struct pipe_ctx pipe, bool lock)
		1629	{
		1630	/* cursor lock is per MPCC tree, so only need to lock one pipe per stream */
		1631	if (!pipe \|\| pipe->top_pipe)
		1632	return;
		1633
		1634	dc->res_pool->mpc->funcs->cursor_lock(dc->res_pool->mpc,
		1635	pipe->stream_res.opp->inst, lock);
		1636	}
		1637
1628	static bool wait_for_reset_trigger_to_occur(	1638	static bool wait_for_reset_trigger_to_occur(
1629	struct dc_context *dc_ctx,	1639	struct dc_context *dc_ctx,
1630	struct timing_generator *tg)	1640	struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h+1−0

@@ -49,6 +49,7 @@ void dcn10_pipe_control_lock( · 48 unmodified lines
49	struct dc *dc,	49	struct dc *dc,
50	struct pipe_ctx *pipe,	50	struct pipe_ctx *pipe,
51	bool lock);	51	bool lock);
		52	void dcn10_cursor_lock(struct dc dc, struct pipe_ctx pipe, bool lock);
52	void dcn10_blank_pixel_data(	53	void dcn10_blank_pixel_data(
53	struct dc *dc,	54	struct dc *dc,
54	struct pipe_ctx *pipe_ctx,	55	struct pipe_ctx *pipe_ctx,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c+1−0

@@ -50,6 +50,7 @@ static const struct hw_sequencer_funcs dcn10_funcs = { · 49 unmodified lines
50	.disable_audio_stream = dce110_disable_audio_stream,	50	.disable_audio_stream = dce110_disable_audio_stream,
51	.disable_plane = dcn10_disable_plane,	51	.disable_plane = dcn10_disable_plane,
52	.pipe_control_lock = dcn10_pipe_control_lock,	52	.pipe_control_lock = dcn10_pipe_control_lock,
		53	.cursor_lock = dcn10_cursor_lock,
53	.interdependent_update_lock = dcn10_lock_all_pipes,	54	.interdependent_update_lock = dcn10_lock_all_pipes,
54	.prepare_bandwidth = dcn10_prepare_bandwidth,	55	.prepare_bandwidth = dcn10_prepare_bandwidth,
55	.optimize_bandwidth = dcn10_optimize_bandwidth,	56	.optimize_bandwidth = dcn10_optimize_bandwidth,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c+15−0

 	REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, dpp_id);
 	REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, tree->opp_id);
+	/* Configure VUPDATE lock set for this MPCC to map to the OPP */
+	REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, tree->opp_id);
 	/* update mpc tree mux setting */
 	if (tree->opp_list == insert_above_mpcc) {
 		/* insert the toppest mpcc */
 		REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf);
 		REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);
 		REG_SET(MPCC_OPP_ID[mpcc_id],  0, MPCC_OPP_ID,  0xf);
+		REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf);
 		/* mark this mpcc as not in use */
 		mpc10->mpcc_in_use_mask &= ~(1 << mpcc_id);
 		REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf);
 		REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);
 		REG_SET(MPCC_OPP_ID[mpcc_id],  0, MPCC_OPP_ID,  0xf);
+		REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf);
 	}
 }
 		REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf);
 		REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);
 		REG_SET(MPCC_OPP_ID[mpcc_id],  0, MPCC_OPP_ID,  0xf);
+		REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf);
 		mpc1_init_mpcc(&(mpc->mpcc_array[mpcc_id]), mpcc_id);
 	}
 	REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf);
 	REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);
 	REG_SET(MPCC_OPP_ID[mpcc_id],  0, MPCC_OPP_ID,  0xf);
+	REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf);
 	mpc1_init_mpcc(&(mpc->mpcc_array[mpcc_id]), mpcc_id);
 			MPCC_BUSY, &s->busy);
 }
+void mpc1_cursor_lock(struct mpc *mpc, int opp_id, bool lock)
+{
+	struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc);
+	REG_SET(CUR[opp_id], 0, CUR_VUPDATE_LOCK_SET, lock ? 1 : 0);
+}
 static const struct mpc_funcs dcn10_mpc_funcs = {
 	.read_mpcc_state = mpc1_read_mpcc_state,
 	.insert_plane = mpc1_insert_plane,
 	.assert_mpcc_idle_before_connect = mpc1_assert_mpcc_idle_before_connect,
 	.init_mpcc_list_from_hw = mpc1_init_mpcc_list_from_hw,
 	.update_blending = mpc1_update_blending,
+	.cursor_lock = mpc1_cursor_lock,
 	.set_denorm = NULL,
 	.set_denorm_clamp = NULL,
 	.set_output_csc = NULL,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h+14−6

 	SRII(MPCC_BG_G_Y, MPCC, inst),\
 	SRII(MPCC_BG_R_CR, MPCC, inst),\
 	SRII(MPCC_BG_B_CB, MPCC, inst),\
-	SRII(MPCC_BG_B_CB, MPCC, inst),\
+	SRII(MPCC_SM_CONTROL, MPCC, inst),\
-	SRII(MPCC_SM_CONTROL, MPCC, inst)
+	SRII(MPCC_UPDATE_LOCK_SEL, MPCC, inst)
 #define MPC_OUT_MUX_COMMON_REG_LIST_DCN1_0(inst) \
-	SRII(MUX, MPC_OUT, inst)
+	SRII(MUX, MPC_OUT, inst),\
+	VUPDATE_SRII(CUR, VUPDATE_LOCK_SET, inst)
 #define MPC_COMMON_REG_VARIABLE_LIST \
 	uint32_t MPCC_TOP_SEL[MAX_MPCC]; \
 	uint32_t MPCC_BG_R_CR[MAX_MPCC]; \
 	uint32_t MPCC_BG_B_CB[MAX_MPCC]; \
 	uint32_t MPCC_SM_CONTROL[MAX_MPCC]; \
-	uint32_t MUX[MAX_OPP];
+	uint32_t MUX[MAX_OPP]; \
+	uint32_t MPCC_UPDATE_LOCK_SEL[MAX_MPCC]; \
+	uint32_t CUR[MAX_OPP];
 #define MPC_COMMON_MASK_SH_LIST_DCN1_0(mask_sh)\
 	SF(MPCC0_MPCC_TOP_SEL, MPCC_TOP_SEL, mask_sh),\
 	SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FIELD_ALT, mask_sh),\
 	SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FORCE_NEXT_FRAME_POL, mask_sh),\
 	SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FORCE_NEXT_TOP_POL, mask_sh),\
-	SF(MPC_OUT0_MUX, MPC_OUT_MUX, mask_sh)
+	SF(MPC_OUT0_MUX, MPC_OUT_MUX, mask_sh),\
+	SF(MPCC0_MPCC_UPDATE_LOCK_SEL, MPCC_UPDATE_LOCK_SEL, mask_sh)
 #define MPC_REG_FIELD_LIST(type) \
 	type MPCC_TOP_SEL;\
 	type MPCC_SM_FIELD_ALT;\
 	type MPCC_SM_FORCE_NEXT_FRAME_POL;\
 	type MPCC_SM_FORCE_NEXT_TOP_POL;\
-	type MPC_OUT_MUX;
+	type MPC_OUT_MUX;\
+	type MPCC_UPDATE_LOCK_SEL;\
+	type CUR_VUPDATE_LOCK_SET;
 struct dcn_mpc_registers {
 	MPC_COMMON_REG_VARIABLE_LIST
 		int mpcc_inst,
 		struct mpcc_state *s);
+void mpc1_cursor_lock(struct mpc *mpc, int opp_id, bool lock);
 #endif

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c+12−2

 	.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
 					mm ## block ## id ## _ ## reg_name
+#define VUPDATE_SRII(reg_name, block, id)\
+	.reg_name[id] = BASE(mm ## reg_name ## 0 ## _ ## block ## id ## _BASE_IDX) + \
+					mm ## reg_name ## 0 ## _ ## block ## id
+/* set field/register/bitfield name */
+#define SFRB(field_name, reg_name, bitfield, post_fix)\
+	.field_name = reg_name ## __ ## bitfield ## post_fix
 /* NBIO */
 #define NBIO_BASE_INNER(seg) \
 	NBIF_BASE__INST0_SEG ## seg
 };
 static const struct dcn_mpc_shift mpc_shift = {
-	MPC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT)
+	MPC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT),\
+	SFRB(CUR_VUPDATE_LOCK_SET, CUR0_VUPDATE_LOCK_SET0, CUR0_VUPDATE_LOCK_SET, __SHIFT)
 };
 static const struct dcn_mpc_mask mpc_mask = {
-	MPC_COMMON_MASK_SH_LIST_DCN1_0(_MASK),
+	MPC_COMMON_MASK_SH_LIST_DCN1_0(_MASK),\
+	SFRB(CUR_VUPDATE_LOCK_SET, CUR0_VUPDATE_LOCK_SET0, CUR0_VUPDATE_LOCK_SET, _MASK)
 };
 #define tg_regs(id)\

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c+2−1

@@ -2294,7 +2294,8 @@ void dcn20_fpga_init_hw(struct dc *dc) · 2293 unmodified lines
2294		2294
2295	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2);	2295	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2);
2296	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1);	2296	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1);
2297	REG_WRITE(REFCLK_CNTL, 0);	2297	if (REG(REFCLK_CNTL))
		2298	REG_WRITE(REFCLK_CNTL, 0);
2298	//	2299	//
2299		2300
2300		2301

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c+1−0

@@ -52,6 +52,7 @@ static const struct hw_sequencer_funcs dcn20_funcs = { · 51 unmodified lines
52	.disable_plane = dcn20_disable_plane,	52	.disable_plane = dcn20_disable_plane,
53	.pipe_control_lock = dcn20_pipe_control_lock,	53	.pipe_control_lock = dcn20_pipe_control_lock,
54	.interdependent_update_lock = dcn10_lock_all_pipes,	54	.interdependent_update_lock = dcn10_lock_all_pipes,
		55	.cursor_lock = dcn10_cursor_lock,
55	.prepare_bandwidth = dcn20_prepare_bandwidth,	56	.prepare_bandwidth = dcn20_prepare_bandwidth,
56	.optimize_bandwidth = dcn20_optimize_bandwidth,	57	.optimize_bandwidth = dcn20_optimize_bandwidth,
57	.update_bandwidth = dcn20_update_bandwidth,	58	.update_bandwidth = dcn20_update_bandwidth,

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c+1−0

@@ -545,6 +545,7 @@ const struct mpc_funcs dcn20_mpc_funcs = { · 544 unmodified lines
545	.mpc_init = mpc1_mpc_init,	545	.mpc_init = mpc1_mpc_init,
546	.mpc_init_single_inst = mpc1_mpc_init_single_inst,	546	.mpc_init_single_inst = mpc1_mpc_init_single_inst,
547	.update_blending = mpc2_update_blending,	547	.update_blending = mpc2_update_blending,
		548	.cursor_lock = mpc1_cursor_lock,
548	.get_mpcc_for_dpp = mpc2_get_mpcc_for_dpp,	549	.get_mpcc_for_dpp = mpc2_get_mpcc_for_dpp,
549	.wait_for_idle = mpc2_assert_idle_mpcc,	550	.wait_for_idle = mpc2_assert_idle_mpcc,
550	.assert_mpcc_idle_before_connect = mpc2_assert_mpcc_idle_before_connect,	551	.assert_mpcc_idle_before_connect = mpc2_assert_mpcc_idle_before_connect,

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h+2−1

@@ -179,7 +179,8 @@ · 178 unmodified lines
179	SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MAX_G_Y, mask_sh),\	179	SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MAX_G_Y, mask_sh),\
180	SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MIN_G_Y, mask_sh),\	180	SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MIN_G_Y, mask_sh),\
181	SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MAX_B_CB, mask_sh),\	181	SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MAX_B_CB, mask_sh),\
182	SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MIN_B_CB, mask_sh)	182	SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MIN_B_CB, mask_sh),\
		183	SF(CUR_VUPDATE_LOCK_SET0, CUR_VUPDATE_LOCK_SET, mask_sh)
183		184
184	/*	185	/*
185	* DCN2 MPC_OCSC debug status register:	186	* DCN2 MPC_OCSC debug status register:

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c+27−8

@@ -508,6 +508,10 @@ enum dcn20_clk_src_array_id { · 507 unmodified lines
508	.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \	508	.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
509	mm ## block ## id ## _ ## reg_name	509	mm ## block ## id ## _ ## reg_name
510		510
		511	#define VUPDATE_SRII(reg_name, block, id)\
		512	.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
		513	mm ## reg_name ## _ ## block ## id
		514
511	/* NBIO */	515	/* NBIO */
512	#define NBIO_BASE_INNER(seg) \	516	#define NBIO_BASE_INNER(seg) \
513	NBIO_BASE__INST0_SEG ## seg	517	NBIO_BASE__INST0_SEG ## seg
@@ -3064,25 +3068,32 @@ validate_out: · 2550 unmodified lines
3064	return out;	3068	return out;
3065	}	3069	}
3066		3070
3067		3071	/*
3068	bool dcn20_validate_bandwidth(struct dc dc, struct dc_state context,	3072	* This must be noinline to ensure anything that deals with FP registers
3069	bool fast_validate)	3073	* is contained within this call; previously our compiling with hard-float
		3074	* would result in fp instructions being emitted outside of the boundaries
		3075	* of the DC_FP_START/END macros, which makes sense as the compiler has no
		3076	* idea about what is wrapped and what is not
		3077	*
		3078	* This is largely just a workaround to avoid breakage introduced with 5.6,
		3079	* ideally all fp-using code should be moved into its own file, only that
		3080	* should be compiled with hard-float, and all code exported from there
		3081	* should be strictly wrapped with DC_FP_START/END
		3082	*/
		3083	static noinline bool dcn20_validate_bandwidth_fp(struct dc *dc,
		3084	struct dc_state *context, bool fast_validate)
3070	{	3085	{
3071	bool voltage_supported = false;	3086	bool voltage_supported = false;
3072	bool full_pstate_supported = false;	3087	bool full_pstate_supported = false;
3073	bool dummy_pstate_supported = false;	3088	bool dummy_pstate_supported = false;
3074	double p_state_latency_us;	3089	double p_state_latency_us;
3075		3090
3076	DC_FP_START();
3077	p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us;	3091	p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us;
3078	context->bw_ctx.dml.soc.disable_dram_clock_change_vactive_support =	3092	context->bw_ctx.dml.soc.disable_dram_clock_change_vactive_support =
3079	dc->debug.disable_dram_clock_change_vactive_support;	3093	dc->debug.disable_dram_clock_change_vactive_support;
3080		3094
3081	if (fast_validate) {	3095	if (fast_validate) {
3082	voltage_supported = dcn20_validate_bandwidth_internal(dc, context, true);	3096	return dcn20_validate_bandwidth_internal(dc, context, true);
3083
3084	DC_FP_END();
3085	return voltage_supported;
3086	}	3097	}
3087		3098
3088	// Best case, we support full UCLK switch latency	3099	// Best case, we support full UCLK switch latency
@@ -3111,7 +3122,15 @@ bool dcn20_validate_bandwidth(struct dc dc, struct dc_state context, · 22 unmodified lines
3111		3122
3112	restore_dml_state:	3123	restore_dml_state:
3113	context->bw_ctx.dml.soc.dram_clock_change_latency_us = p_state_latency_us;	3124	context->bw_ctx.dml.soc.dram_clock_change_latency_us = p_state_latency_us;
		3125	return voltage_supported;
		3126	}
3114		3127
		3128	bool dcn20_validate_bandwidth(struct dc dc, struct dc_state context,
		3129	bool fast_validate)
		3130	{
		3131	bool voltage_supported = false;
		3132	DC_FP_START();
		3133	voltage_supported = dcn20_validate_bandwidth_fp(dc, context, fast_validate);
3115	DC_FP_END();	3134	DC_FP_END();
3116	return voltage_supported;	3135	return voltage_supported;
3117	}	3136	}

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c+1−0

@@ -53,6 +53,7 @@ static const struct hw_sequencer_funcs dcn21_funcs = { · 52 unmodified lines
53	.disable_plane = dcn20_disable_plane,	53	.disable_plane = dcn20_disable_plane,
54	.pipe_control_lock = dcn20_pipe_control_lock,	54	.pipe_control_lock = dcn20_pipe_control_lock,
55	.interdependent_update_lock = dcn10_lock_all_pipes,	55	.interdependent_update_lock = dcn10_lock_all_pipes,
		56	.cursor_lock = dcn10_cursor_lock,
56	.prepare_bandwidth = dcn20_prepare_bandwidth,	57	.prepare_bandwidth = dcn20_prepare_bandwidth,
57	.optimize_bandwidth = dcn20_optimize_bandwidth,	58	.optimize_bandwidth = dcn20_optimize_bandwidth,
58	.update_bandwidth = dcn20_update_bandwidth,	59	.update_bandwidth = dcn20_update_bandwidth,

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c+33−44

@@ -284,7 +284,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { · 283 unmodified lines
284	.dram_channel_width_bytes = 4,	284	.dram_channel_width_bytes = 4,
285	.fabric_datapath_to_dcn_data_return_bytes = 32,	285	.fabric_datapath_to_dcn_data_return_bytes = 32,
286	.dcn_downspread_percent = 0.5,	286	.dcn_downspread_percent = 0.5,
287	.downspread_percent = 0.5,	287	.downspread_percent = 0.38,
288	.dram_page_open_time_ns = 50.0,	288	.dram_page_open_time_ns = 50.0,
289	.dram_rw_turnaround_time_ns = 17.5,	289	.dram_rw_turnaround_time_ns = 17.5,
290	.dram_return_buffer_per_channel_bytes = 8192,	290	.dram_return_buffer_per_channel_bytes = 8192,
@@ -340,6 +340,10 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { · 49 unmodified lines
340	.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \	340	.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
341	mm ## block ## id ## _ ## reg_name	341	mm ## block ## id ## _ ## reg_name
342		342
		343	#define VUPDATE_SRII(reg_name, block, id)\
		344	.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
		345	mm ## reg_name ## _ ## block ## id
		346
343	/* NBIO */	347	/* NBIO */
344	#define NBIO_BASE_INNER(seg) \	348	#define NBIO_BASE_INNER(seg) \
345	NBIF0_BASE__INST0_SEG ## seg	349	NBIF0_BASE__INST0_SEG ## seg
@@ -1374,64 +1378,49 @@ static void update_bw_bounding_box(struct dc dc, struct clk_bw_params bw_param · 1028 unmodified lines
1374	{	1378	{
1375	struct dcn21_resource_pool *pool = TO_DCN21_RES_POOL(dc->res_pool);	1379	struct dcn21_resource_pool *pool = TO_DCN21_RES_POOL(dc->res_pool);
1376	struct clk_limit_table *clk_table = &bw_params->clk_table;	1380	struct clk_limit_table *clk_table = &bw_params->clk_table;
1377	unsigned int i, j, k;	1381	struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES];
1378	int closest_clk_lvl;	1382	unsigned int i, j, closest_clk_lvl;
1379		1383
1380	// Default clock levels are used for diags, which may lead to overclocking.	1384	// Default clock levels are used for diags, which may lead to overclocking.
1381	if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) && !IS_DIAG_DC(dc->ctx->dce_environment)) {	1385	if (!IS_DIAG_DC(dc->ctx->dce_environment)) {
1382	dcn2_1_ip.max_num_otg = pool->base.res_cap->num_timing_generator;	1386	dcn2_1_ip.max_num_otg = pool->base.res_cap->num_timing_generator;
1383	dcn2_1_ip.max_num_dpp = pool->base.pipe_count;	1387	dcn2_1_ip.max_num_dpp = pool->base.pipe_count;
1384	dcn2_1_soc.num_chans = bw_params->num_channels;	1388	dcn2_1_soc.num_chans = bw_params->num_channels;
1385		1389
1386	/* Vmin: leave lowest DCN clocks, override with dcfclk, fclk, memclk from fuse */	1390	ASSERT(clk_table->num_entries);
1387	dcn2_1_soc.clock_limits[0].state = 0;	1391	for (i = 0; i < clk_table->num_entries; i++) {
1388	dcn2_1_soc.clock_limits[0].dcfclk_mhz = clk_table->entries[0].dcfclk_mhz;	1392	/* loop backwards*/
1389	dcn2_1_soc.clock_limits[0].fabricclk_mhz = clk_table->entries[0].fclk_mhz;	1393	for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) {
1390	dcn2_1_soc.clock_limits[0].socclk_mhz = clk_table->entries[0].socclk_mhz;
1391	dcn2_1_soc.clock_limits[0].dram_speed_mts = clk_table->entries[0].memclk_mhz * 2;
1392
1393	/*
1394	* Other levels: find closest DCN clocks that fit the given clock limit using dcfclk
1395	* as indicator
1396	*/
1397
1398	closest_clk_lvl = -1;
1399	/* index currently being filled */
1400	k = 1;
1401	for (i = 1; i < clk_table->num_entries; i++) {
1402	/* loop backwards, skip duplicate state*/
1403	for (j = dcn2_1_soc.num_states - 1; j >= k; j--) {
1404	if ((unsigned int) dcn2_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) {	1394	if ((unsigned int) dcn2_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) {
1405	closest_clk_lvl = j;	1395	closest_clk_lvl = j;
1406	break;	1396	break;
1407	}	1397	}
1408	}	1398	}
1409		1399
1410	/* if found a lvl that fits, use the DCN clks from it, if not, go to next clk limit*/	1400	clock_limits[i].state = i;
1411	if (closest_clk_lvl != -1) {	1401	clock_limits[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz;
1412	dcn2_1_soc.clock_limits[k].state = i;	1402	clock_limits[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz;
1413	dcn2_1_soc.clock_limits[k].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz;	1403	clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
1414	dcn2_1_soc.clock_limits[k].fabricclk_mhz = clk_table->entries[i].fclk_mhz;	1404	clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2;
1415	dcn2_1_soc.clock_limits[k].socclk_mhz = clk_table->entries[i].socclk_mhz;	1405
1416	dcn2_1_soc.clock_limits[k].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2;	1406	clock_limits[i].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz;
1417		1407	clock_limits[i].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz;
1418	dcn2_1_soc.clock_limits[k].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz;	1408	clock_limits[i].dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps;
1419	dcn2_1_soc.clock_limits[k].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz;	1409	clock_limits[i].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz;
1420	dcn2_1_soc.clock_limits[k].dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps;	1410	clock_limits[i].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz;
1421	dcn2_1_soc.clock_limits[k].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz;	1411	clock_limits[i].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz;
1422	dcn2_1_soc.clock_limits[k].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz;	1412	clock_limits[i].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz;
1423	dcn2_1_soc.clock_limits[k].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz;	1413	}
1424	dcn2_1_soc.clock_limits[k].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz;	1414	for (i = 0; i < clk_table->num_entries; i++)
1425	k++;	1415	dcn2_1_soc.clock_limits[i] = clock_limits[i];
1426	}	1416	if (clk_table->num_entries) {
		1417	dcn2_1_soc.num_states = clk_table->num_entries;
		1418	/* duplicate last level */
		1419	dcn2_1_soc.clock_limits[dcn2_1_soc.num_states] = dcn2_1_soc.clock_limits[dcn2_1_soc.num_states - 1];
		1420	dcn2_1_soc.clock_limits[dcn2_1_soc.num_states].state = dcn2_1_soc.num_states;
1427	}	1421	}
1428	dcn2_1_soc.num_states = k;
1429	}	1422	}
1430		1423
1431	/* duplicate last level */
1432	dcn2_1_soc.clock_limits[dcn2_1_soc.num_states] = dcn2_1_soc.clock_limits[dcn2_1_soc.num_states - 1];
1433	dcn2_1_soc.clock_limits[dcn2_1_soc.num_states].state = dcn2_1_soc.num_states;
1434
1435	dml_init_instance(&dc->dml, &dcn2_1_soc, &dcn2_1_ip, DML_PROJECT_DCN21);	1424	dml_init_instance(&dc->dml, &dcn2_1_soc, &dcn2_1_ip, DML_PROJECT_DCN21);
1436	}	1425	}
1437		1426

drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c+4−4

@@ -1200,7 +1200,7 @@ static void dml_rq_dlg_get_dlg_params( · 1199 unmodified lines
1200	min_hratio_fact_l = 1.0;	1200	min_hratio_fact_l = 1.0;
1201	min_hratio_fact_c = 1.0;	1201	min_hratio_fact_c = 1.0;
1202		1202
1203	if (htaps_l <= 1)	1203	if (hratio_l <= 1)
1204	min_hratio_fact_l = 2.0;	1204	min_hratio_fact_l = 2.0;
1205	else if (htaps_l <= 6) {	1205	else if (htaps_l <= 6) {
1206	if ((hratio_l * 2.0) > 4.0)	1206	if ((hratio_l * 2.0) > 4.0)
@@ -1216,7 +1216,7 @@ static void dml_rq_dlg_get_dlg_params( · 9 unmodified lines
1216		1216
1217	hscale_pixel_rate_l = min_hratio_fact_l * dppclk_freq_in_mhz;	1217	hscale_pixel_rate_l = min_hratio_fact_l * dppclk_freq_in_mhz;
1218		1218
1219	if (htaps_c <= 1)	1219	if (hratio_c <= 1)
1220	min_hratio_fact_c = 2.0;	1220	min_hratio_fact_c = 2.0;
1221	else if (htaps_c <= 6) {	1221	else if (htaps_c <= 6) {
1222	if ((hratio_c * 2.0) > 4.0)	1222	if ((hratio_c * 2.0) > 4.0)
@@ -1522,8 +1522,8 @@ static void dml_rq_dlg_get_dlg_params( · 299 unmodified lines
1522		1522
1523	disp_dlg_regs->refcyc_per_vm_group_vblank = get_refcyc_per_vm_group_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;	1523	disp_dlg_regs->refcyc_per_vm_group_vblank = get_refcyc_per_vm_group_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;
1524	disp_dlg_regs->refcyc_per_vm_group_flip = get_refcyc_per_vm_group_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;	1524	disp_dlg_regs->refcyc_per_vm_group_flip = get_refcyc_per_vm_group_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;
1525	disp_dlg_regs->refcyc_per_vm_req_vblank = get_refcyc_per_vm_req_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;	1525	disp_dlg_regs->refcyc_per_vm_req_vblank = get_refcyc_per_vm_req_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10);
1526	disp_dlg_regs->refcyc_per_vm_req_flip = get_refcyc_per_vm_req_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;	1526	disp_dlg_regs->refcyc_per_vm_req_flip = get_refcyc_per_vm_req_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10);
1527		1527
1528	// Clamp to max for now	1528	// Clamp to max for now
1529	if (disp_dlg_regs->refcyc_per_vm_group_vblank >= (unsigned int)dml_pow(2, 23))	1529	if (disp_dlg_regs->refcyc_per_vm_group_vblank >= (unsigned int)dml_pow(2, 23))

drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h+16−0

@@ -210,6 +210,22 @@ struct mpc_funcs { · 209 unmodified lines
210	struct mpcc_blnd_cfg *blnd_cfg,	210	struct mpcc_blnd_cfg *blnd_cfg,
211	int mpcc_id);	211	int mpcc_id);
212		212
		213	/*
		214	* Lock cursor updates for the specified OPP.
		215	* OPP defines the set of MPCC that are locked together for cursor.
		216	*
		217	* Parameters:
		218	* [in] mpc - MPC context.
		219	* [in] opp_id - The OPP to lock cursor updates on
		220	* [in] lock - lock/unlock the OPP
		221	*
		222	* Return: void
		223	*/
		224	void (*cursor_lock)(
		225	struct mpc *mpc,
		226	int opp_id,
		227	bool lock);
		228
213	struct mpcc* (*get_mpcc_for_dpp)(	229	struct mpcc* (*get_mpcc_for_dpp)(
214	struct mpc_tree *tree,	230	struct mpc_tree *tree,
215	int dpp_id);	231	int dpp_id);

drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h+1−0

@@ -86,6 +86,7 @@ struct hw_sequencer_funcs { · 85 unmodified lines
86	struct dc_state *context, bool lock);	86	struct dc_state *context, bool lock);
87	void (set_flip_control_gsl)(struct pipe_ctx pipe_ctx,	87	void (set_flip_control_gsl)(struct pipe_ctx pipe_ctx,
88	bool flip_immediate);	88	bool flip_immediate);
		89	void (cursor_lock)(struct dc dc, struct pipe_ctx *pipe, bool lock);
89		90
90	/* Timing Related */	91	/* Timing Related */
91	void (get_position)(struct pipe_ctx *pipe_ctx, int num_pipes,	92	void (get_position)(struct pipe_ctx *pipe_ctx, int num_pipes,

drivers/gpu/drm/amd/display/dc/os_types.h+1−1

@@ -108,7 +108,7 @@ · 107 unmodified lines
108	#define ASSERT(expr) ASSERT_CRITICAL(expr)	108	#define ASSERT(expr) ASSERT_CRITICAL(expr)
109		109
110	#else	110	#else
111	#define ASSERT(expr) WARN_ON(!(expr))	111	#define ASSERT(expr) WARN_ON_ONCE(!(expr))
112	#endif	112	#endif
113		113
114	#define BREAK_TO_DEBUGGER() ASSERT(0)	114	#define BREAK_TO_DEBUGGER() ASSERT(0)

drivers/gpu/drm/amd/powerplay/amd_powerplay.c+5−4

 	if (!hwmgr)
 		return -EINVAL;
-	if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_capability)
+	if (!(hwmgr->not_vf && amdgpu_dpm) ||
+		!hwmgr->hwmgr_func->get_asic_baco_capability)
 		return 0;
 	mutex_lock(&hwmgr->smu_lock);
 	if (!hwmgr)
 		return -EINVAL;
-	if (!(hwmgr->not_vf && amdgpu_dpm) ||
+	if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_state)
-		!hwmgr->hwmgr_func->get_asic_baco_state)
 		return 0;
 	mutex_lock(&hwmgr->smu_lock);
 	if (!hwmgr)
 		return -EINVAL;
-	if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_asic_baco_state)
+	if (!(hwmgr->not_vf && amdgpu_dpm) ||
+		!hwmgr->hwmgr_func->set_asic_baco_state)
 		return 0;
 	mutex_lock(&hwmgr->smu_lock);

drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c+26−0

@@ -984,6 +984,32 @@ static int init_thermal_controller( · 983 unmodified lines
984	struct pp_hwmgr *hwmgr,	984	struct pp_hwmgr *hwmgr,
985	const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)	985	const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
986	{	986	{
		987	hwmgr->thermal_controller.ucType =
		988	powerplay_table->sThermalController.ucType;
		989	hwmgr->thermal_controller.ucI2cLine =
		990	powerplay_table->sThermalController.ucI2cLine;
		991	hwmgr->thermal_controller.ucI2cAddress =
		992	powerplay_table->sThermalController.ucI2cAddress;
		993
		994	hwmgr->thermal_controller.fanInfo.bNoFan =
		995	(0 != (powerplay_table->sThermalController.ucFanParameters &
		996	ATOM_PP_FANPARAMETERS_NOFAN));
		997
		998	hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution =
		999	powerplay_table->sThermalController.ucFanParameters &
		1000	ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK;
		1001
		1002	hwmgr->thermal_controller.fanInfo.ulMinRPM
		1003	= powerplay_table->sThermalController.ucFanMinRPM * 100UL;
		1004	hwmgr->thermal_controller.fanInfo.ulMaxRPM
		1005	= powerplay_table->sThermalController.ucFanMaxRPM * 100UL;
		1006
		1007	set_hw_cap(hwmgr,
		1008	ATOM_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType,
		1009	PHM_PlatformCaps_ThermalController);
		1010
		1011	hwmgr->thermal_controller.use_hw_fan_control = 1;
		1012
987	return 0;	1013	return 0;
988	}	1014	}
989		1015

drivers/gpu/drm/amd/powerplay/renoir_ppt.c+6−1

 static bool renoir_is_dpm_running(struct smu_context *smu)
 {
+	struct amdgpu_device *adev = smu->adev;
 	/*
 	 * Util now, the pmfw hasn't exported the interface of SMU
 	 * feature mask to APU SKU so just force on all the feature
 	 * at early initial stage.
 	 */
-	return true;
+	if (adev->in_suspend)
+		return false;
+	else
+		return true;
 }

drivers/gpu/drm/bridge/analogix/analogix-anx6345.c+3−0

@@ -485,6 +485,9 @@ static int anx6345_get_modes(struct drm_connector *connector) · 484 unmodified lines
485		485
486	num_modes += drm_add_edid_modes(connector, anx6345->edid);	486	num_modes += drm_add_edid_modes(connector, anx6345->edid);
487		487
		488	/* Driver currently supports only 6bpc */
		489	connector->display_info.bpc = 6;
		490
488	unlock:	491	unlock:
489	if (power_off)	492	if (power_off)
490	anx6345_poweroff(anx6345);	493	anx6345_poweroff(anx6345);

drivers/gpu/drm/drm_dp_mst_topology.c+7−2

 	drm_dp_queue_down_tx(mgr, txmsg);
 	ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
-	if (ret > 0 && txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK)
+	if (ret > 0) {
-		ret = -EIO;
+		if (txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK)
+			ret = -EIO;
+		else
+			ret = size;
+	}
 	kfree(txmsg);
 fail_put:
 	if (pos->vcpi) {
 		drm_dp_mst_put_port_malloc(port);
 		pos->vcpi = 0;
+		pos->pbn = 0;
 	}
 	return 0;

drivers/gpu/drm/drm_edid.c+1−1

@@ -5111,7 +5111,7 @@ static struct drm_display_mode drm_mode_displayid_detailed(struct drm_device d · 5110 unmodified lines
5111	struct drm_display_mode *mode;	5111	struct drm_display_mode *mode;
5112	unsigned pixel_clock = (timings->pixel_clock[0] \|	5112	unsigned pixel_clock = (timings->pixel_clock[0] \|
5113	(timings->pixel_clock[1] << 8) \|	5113	(timings->pixel_clock[1] << 8) \|
5114	(timings->pixel_clock[2] << 16));	5114	(timings->pixel_clock[2] << 16)) + 1;
5115	unsigned hactive = (timings->hactive[0] \| timings->hactive[1] << 8) + 1;	5115	unsigned hactive = (timings->hactive[0] \| timings->hactive[1] << 8) + 1;
5116	unsigned hblank = (timings->hblank[0] \| timings->hblank[1] << 8) + 1;	5116	unsigned hblank = (timings->hblank[0] \| timings->hblank[1] << 8) + 1;
5117	unsigned hsync = (timings->hsync[0] \| (timings->hsync[1] & 0x7f) << 8) + 1;	5117	unsigned hsync = (timings->hsync[0] \| (timings->hsync[1] & 0x7f) << 8) + 1;

drivers/gpu/drm/drm_hdcp.c+7−1

 	ret = request_firmware_direct(&fw, (const char *)fw_name,
 				      drm_dev->dev);
-	if (ret < 0)
+	if (ret < 0) {
+		*revoked_ksv_cnt = 0;
+		*revoked_ksv_list = NULL;
+		ret = 0;
 		goto exit;
+	}
 	if (fw->size && fw->data)
 		ret = drm_hdcp_srm_update(fw->data, fw->size, revoked_ksv_list,
 	ret = drm_hdcp_request_srm(drm_dev, &revoked_ksv_list,
 				   &revoked_ksv_cnt);
+	if (ret)
+		return ret;
 	/* revoked_ksv_cnt will be zero when above function failed */
 	for (i = 0; i < revoked_ksv_cnt; i++)

drivers/gpu/drm/i915/display/intel_ddi.c+11−3

 	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
 				 crtc_state->lane_count, is_mst);
-	intel_dp->regs.dp_tp_ctl = DP_TP_CTL(port);
-	intel_dp->regs.dp_tp_status = DP_TP_STATUS(port);
 	intel_edp_panel_on(intel_dp);
 	intel_ddi_clk_select(encoder, crtc_state);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
 	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	u32 temp, flags = 0;
 	/* XXX: DSI transcoder paranoia */
 	if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
 		return;
+	if (INTEL_GEN(dev_priv) >= 12) {
+		intel_dp->regs.dp_tp_ctl = TGL_DP_TP_CTL(cpu_transcoder);
+		intel_dp->regs.dp_tp_status = TGL_DP_TP_STATUS(cpu_transcoder);
+	}
 	intel_dsc_get_config(encoder, pipe_config);
 	temp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
 static struct intel_connector *
 intel_ddi_init_dp_connector(struct intel_digital_port *intel_dig_port)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
 	struct intel_connector *connector;
 	enum port port = intel_dig_port->base.port;
 	intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
 	intel_dig_port->dp.prepare_link_retrain =
 		intel_ddi_prepare_link_retrain;
+	if (INTEL_GEN(dev_priv) < 12) {
+		intel_dig_port->dp.regs.dp_tp_ctl = DP_TP_CTL(port);
+		intel_dig_port->dp.regs.dp_tp_status = DP_TP_STATUS(port);
+	}
 	if (!intel_dp_init_connector(intel_dig_port, connector)) {
 		kfree(connector);

drivers/gpu/drm/i915/display/intel_display_power.c+6−6

@@ -4140,7 +4140,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4139 unmodified lines
4140	{	4140	{
4141	.name = "AUX D TBT1",	4141	.name = "AUX D TBT1",
4142	.domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS,	4142	.domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS,
4143	.ops = &hsw_power_well_ops,	4143	.ops = &icl_tc_phy_aux_power_well_ops,
4144	.id = DISP_PW_ID_NONE,	4144	.id = DISP_PW_ID_NONE,
4145	{	4145	{
4146	.hsw.regs = &icl_aux_power_well_regs,	4146	.hsw.regs = &icl_aux_power_well_regs,
@@ -4151,7 +4151,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4151	{	4151	{
4152	.name = "AUX E TBT2",	4152	.name = "AUX E TBT2",
4153	.domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS,	4153	.domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS,
4154	.ops = &hsw_power_well_ops,	4154	.ops = &icl_tc_phy_aux_power_well_ops,
4155	.id = DISP_PW_ID_NONE,	4155	.id = DISP_PW_ID_NONE,
4156	{	4156	{
4157	.hsw.regs = &icl_aux_power_well_regs,	4157	.hsw.regs = &icl_aux_power_well_regs,
@@ -4162,7 +4162,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4162	{	4162	{
4163	.name = "AUX F TBT3",	4163	.name = "AUX F TBT3",
4164	.domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS,	4164	.domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS,
4165	.ops = &hsw_power_well_ops,	4165	.ops = &icl_tc_phy_aux_power_well_ops,
4166	.id = DISP_PW_ID_NONE,	4166	.id = DISP_PW_ID_NONE,
4167	{	4167	{
4168	.hsw.regs = &icl_aux_power_well_regs,	4168	.hsw.regs = &icl_aux_power_well_regs,
@@ -4173,7 +4173,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4173	{	4173	{
4174	.name = "AUX G TBT4",	4174	.name = "AUX G TBT4",
4175	.domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS,	4175	.domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS,
4176	.ops = &hsw_power_well_ops,	4176	.ops = &icl_tc_phy_aux_power_well_ops,
4177	.id = DISP_PW_ID_NONE,	4177	.id = DISP_PW_ID_NONE,
4178	{	4178	{
4179	.hsw.regs = &icl_aux_power_well_regs,	4179	.hsw.regs = &icl_aux_power_well_regs,
@@ -4184,7 +4184,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4184	{	4184	{
4185	.name = "AUX H TBT5",	4185	.name = "AUX H TBT5",
4186	.domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS,	4186	.domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS,
4187	.ops = &hsw_power_well_ops,	4187	.ops = &icl_tc_phy_aux_power_well_ops,
4188	.id = DISP_PW_ID_NONE,	4188	.id = DISP_PW_ID_NONE,
4189	{	4189	{
4190	.hsw.regs = &icl_aux_power_well_regs,	4190	.hsw.regs = &icl_aux_power_well_regs,
@@ -4195,7 +4195,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4195	{	4195	{
4196	.name = "AUX I TBT6",	4196	.name = "AUX I TBT6",
4197	.domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS,	4197	.domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS,
4198	.ops = &hsw_power_well_ops,	4198	.ops = &icl_tc_phy_aux_power_well_ops,
4199	.id = DISP_PW_ID_NONE,	4199	.id = DISP_PW_ID_NONE,
4200	{	4200	{
4201	.hsw.regs = &icl_aux_power_well_regs,	4201	.hsw.regs = &icl_aux_power_well_regs,

drivers/gpu/drm/i915/display/intel_dp.c+2−3

 				 intel_crtc_has_type(pipe_config,
 						     INTEL_OUTPUT_DP_MST));
-	intel_dp->regs.dp_tp_ctl = DP_TP_CTL(port);
-	intel_dp->regs.dp_tp_status = DP_TP_STATUS(port);
 	/*
 	 * There are four kinds of DP registers:
 	 *
 	intel_dig_port->dp.output_reg = output_reg;
 	intel_dig_port->max_lanes = 4;
+	intel_dig_port->dp.regs.dp_tp_ctl = DP_TP_CTL(port);
+	intel_dig_port->dp.regs.dp_tp_status = DP_TP_STATUS(port);
 	intel_encoder->type = INTEL_OUTPUT_DP;
 	intel_encoder->power_domain = intel_port_to_power_domain(port);

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c+1−0

@@ -342,6 +342,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) · 341 unmodified lines
342	*/	342	*/
343	if (dev_priv->vbt.backlight.type !=	343	if (dev_priv->vbt.backlight.type !=
344	INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&	344	INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
		345	i915_modparams.enable_dpcd_backlight != 1 &&
345	!drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,	346	!drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
346	DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {	347	DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
347	DRM_DEV_INFO(dev->dev,	348	DRM_DEV_INFO(dev->dev,

drivers/gpu/drm/i915/display/intel_hdmi.c+2−1

@@ -1536,7 +1536,8 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port) · 1535 unmodified lines
1536	intel_de_write(i915, HDCP_RPRIME(i915, cpu_transcoder, port), ri.reg);	1536	intel_de_write(i915, HDCP_RPRIME(i915, cpu_transcoder, port), ri.reg);
1537		1537
1538	/* Wait for Ri prime match */	1538	/* Wait for Ri prime match */
1539	if (wait_for(intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) &	1539	if (wait_for((intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) &
		1540	(HDCP_STATUS_RI_MATCH \| HDCP_STATUS_ENC)) ==
1540	(HDCP_STATUS_RI_MATCH \| HDCP_STATUS_ENC), 1)) {	1541	(HDCP_STATUS_RI_MATCH \| HDCP_STATUS_ENC), 1)) {
1541	DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n",	1542	DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n",
1542	intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)));	1543	intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)));

drivers/gpu/drm/i915/display/intel_sprite.c+12−5

 	}
 }
-static bool gen12_plane_supports_mc_ccs(enum plane_id plane_id)
+static bool gen12_plane_supports_mc_ccs(struct drm_i915_private *dev_priv,
+					enum plane_id plane_id)
 {
+	/* Wa_14010477008:tgl[a0..c0] */
+	if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_C0))
+		return false;
 	return plane_id < PLANE_SPRITE4;
 }
 static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
 					     u32 format, u64 modifier)
 {
+	struct drm_i915_private *dev_priv = to_i915(_plane->dev);
 	struct intel_plane *plane = to_intel_plane(_plane);
 	switch (modifier) {
 	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
-		if (!gen12_plane_supports_mc_ccs(plane->id))
+		if (!gen12_plane_supports_mc_ccs(dev_priv, plane->id))
 			return false;
 		/* fall through */
 	case DRM_FORMAT_MOD_LINEAR:
 	}
 }
-static const u64 *gen12_get_plane_modifiers(enum plane_id plane_id)
+static const u64 *gen12_get_plane_modifiers(struct drm_i915_private *dev_priv,
+					    enum plane_id plane_id)
 {
-	if (gen12_plane_supports_mc_ccs(plane_id))
+	if (gen12_plane_supports_mc_ccs(dev_priv, plane_id))
 		return gen12_plane_format_modifiers_mc_ccs;
 	else
 		return gen12_plane_format_modifiers_rc_ccs;
 	plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id);
 	if (INTEL_GEN(dev_priv) >= 12) {
-		modifiers = gen12_get_plane_modifiers(plane_id);
+		modifiers = gen12_get_plane_modifiers(dev_priv, plane_id);
 		plane_funcs = &gen12_plane_funcs;
 	} else {
 		if (plane->has_ccs)

drivers/gpu/drm/i915/gem/i915_gem_tiling.c+18−2

 			      int tiling_mode, unsigned int stride)
 {
 	struct i915_ggtt *ggtt = &to_i915(obj->base.dev)->ggtt;
-	struct i915_vma *vma;
+	struct i915_vma *vma, *vn;
+	LIST_HEAD(unbind);
 	int ret = 0;
 	if (tiling_mode == I915_TILING_NONE)
 		return 0;
 	mutex_lock(&ggtt->vm.mutex);
+	spin_lock(&obj->vma.lock);
 	for_each_ggtt_vma(vma, obj) {
+		GEM_BUG_ON(vma->vm != &ggtt->vm);
 		if (i915_vma_fence_prepare(vma, tiling_mode, stride))
 			continue;
+		list_move(&vma->vm_link, &unbind);
+	}
+	spin_unlock(&obj->vma.lock);
+	list_for_each_entry_safe(vma, vn, &unbind, vm_link) {
 		ret = __i915_vma_unbind(vma);
-		if (ret)
+		if (ret) {
+			/* Restore the remaining vma on an error */
+			list_splice(&unbind, &ggtt->vm.bound_list);
 			break;
+		}
 	}
 	mutex_unlock(&ggtt->vm.mutex);
 	return ret;
 	}
 	mutex_unlock(&obj->mm.lock);
+	spin_lock(&obj->vma.lock);
 	for_each_ggtt_vma(vma, obj) {
 		vma->fence_size =
 			i915_gem_fence_size(i915, vma->size, tiling, stride);
 		if (vma->fence)
 			vma->fence->dirty = true;
 	}
+	spin_unlock(&obj->vma.lock);
 	obj->tiling_and_stride = tiling | stride;
 	i915_gem_object_unlock(obj);

drivers/gpu/drm/i915/gem/selftests/huge_pages.c+8−4

 		unsigned int page_size = BIT(first);
 		obj = i915_gem_object_create_internal(dev_priv, page_size);
-		if (IS_ERR(obj))
+		if (IS_ERR(obj)) {
-			return PTR_ERR(obj);
+			err = PTR_ERR(obj);
+			goto out_vm;
+		}
 		vma = i915_vma_instance(obj, vm, NULL);
 		if (IS_ERR(vma)) {
 	}
 	obj = i915_gem_object_create_internal(dev_priv, PAGE_SIZE);
-	if (IS_ERR(obj))
+	if (IS_ERR(obj)) {
-		return PTR_ERR(obj);
+		err = PTR_ERR(obj);
+		goto out_vm;
+	}
 	vma = i915_vma_instance(obj, vm, NULL);
 	if (IS_ERR(vma)) {

drivers/gpu/drm/i915/gt/intel_rps.c+6−3

@@ -81,13 +81,14 @@ static void rps_enable_interrupts(struct intel_rps *rps) · 80 unmodified lines
81	events = (GEN6_PM_RP_UP_THRESHOLD \|	81	events = (GEN6_PM_RP_UP_THRESHOLD \|
82	GEN6_PM_RP_DOWN_THRESHOLD \|	82	GEN6_PM_RP_DOWN_THRESHOLD \|
83	GEN6_PM_RP_DOWN_TIMEOUT);	83	GEN6_PM_RP_DOWN_TIMEOUT);
84
85	WRITE_ONCE(rps->pm_events, events);	84	WRITE_ONCE(rps->pm_events, events);
		85
86	spin_lock_irq(&gt->irq_lock);	86	spin_lock_irq(&gt->irq_lock);
87	gen6_gt_pm_enable_irq(gt, rps->pm_events);	87	gen6_gt_pm_enable_irq(gt, rps->pm_events);
88	spin_unlock_irq(&gt->irq_lock);	88	spin_unlock_irq(&gt->irq_lock);
89		89
90	set(gt->uncore, GEN6_PMINTRMSK, rps_pm_mask(rps, rps->cur_freq));	90	intel_uncore_write(gt->uncore,
		91	GEN6_PMINTRMSK, rps_pm_mask(rps, rps->last_freq));
91	}	92	}
92		93
93	static void gen6_rps_reset_interrupts(struct intel_rps *rps)	94	static void gen6_rps_reset_interrupts(struct intel_rps *rps)
@@ -120,7 +121,9 @@ static void rps_disable_interrupts(struct intel_rps *rps) · 26 unmodified lines
120	struct intel_gt *gt = rps_to_gt(rps);	121	struct intel_gt *gt = rps_to_gt(rps);
121		122
122	WRITE_ONCE(rps->pm_events, 0);	123	WRITE_ONCE(rps->pm_events, 0);
123	set(gt->uncore, GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));	124
		125	intel_uncore_write(gt->uncore,
		126	GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));
124		127
125	spin_lock_irq(&gt->irq_lock);	128	spin_lock_irq(&gt->irq_lock);
126	gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS);	129	gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS);

drivers/gpu/drm/i915/gt/intel_timeline.c+2−0

@@ -521,6 +521,8 @@ int intel_timeline_read_hwsp(struct i915_request *from, · 520 unmodified lines
521		521
522	rcu_read_lock();	522	rcu_read_lock();
523	cl = rcu_dereference(from->hwsp_cacheline);	523	cl = rcu_dereference(from->hwsp_cacheline);
		524	if (i915_request_completed(from)) /* confirm cacheline is valid */
		525	goto unlock;
524	if (unlikely(!i915_active_acquire_if_busy(&cl->active)))	526	if (unlikely(!i915_active_acquire_if_busy(&cl->active)))
525	goto unlock; /* seqno wrapped and completed! */	527	goto unlock; /* seqno wrapped and completed! */
526	if (unlikely(i915_request_completed(from)))	528	if (unlikely(i915_request_completed(from)))

drivers/gpu/drm/i915/i915_drv.h+2−0

@@ -1507,6 +1507,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, · 1506 unmodified lines
1507	(IS_ICELAKE(p) && IS_REVID(p, since, until))	1507	(IS_ICELAKE(p) && IS_REVID(p, since, until))
1508		1508
1509	#define TGL_REVID_A0 0x0	1509	#define TGL_REVID_A0 0x0
		1510	#define TGL_REVID_B0 0x1
		1511	#define TGL_REVID_C0 0x2
1510		1512
1511	#define IS_TGL_REVID(p, since, until) \	1513	#define IS_TGL_REVID(p, since, until) \
1512	(IS_TIGERLAKE(p) && IS_REVID(p, since, until))	1514	(IS_TIGERLAKE(p) && IS_REVID(p, since, until))

drivers/gpu/drm/i915/i915_irq.c+2−4

 {
 	struct intel_uncore *uncore = &dev_priv->uncore;
-	u32 de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE;
+	u32 de_pipe_masked = gen8_de_pipe_fault_mask(dev_priv) |
+		GEN8_PIPE_CDCLK_CRC_DONE;
 	u32 de_pipe_enables;
 	u32 de_port_masked = GEN8_AUX_CHANNEL_A;
 	u32 de_port_enables;
 		de_misc_masked |= GEN8_DE_MISC_GSE;
 	if (INTEL_GEN(dev_priv) >= 9) {
-		de_pipe_masked |= GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
 		de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
 				  GEN9_AUX_CHANNEL_D;
 		if (IS_GEN9_LP(dev_priv))
 			de_port_masked |= BXT_DE_PORT_GMBUS;
-	} else {
-		de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
 	}
 	if (INTEL_GEN(dev_priv) >= 11)

drivers/gpu/drm/i915/i915_reg.h+2−2

@@ -34,8 +34,8 @@ · 33 unmodified lines
34	* Follow the style described here for new macros, and while changing existing	34	* Follow the style described here for new macros, and while changing existing
35	* macros. Do not mass change existing definitions just to update the style.	35	* macros. Do not mass change existing definitions just to update the style.
36	*	36	*
37	* Layout	37	* File Layout
38	* ~~~~~~	38	* ~~~~~~~~~~~
39	*	39	*
40	* Keep helper macros near the top. For example, _PIPE() and friends.	40	* Keep helper macros near the top. For example, _PIPE() and friends.
41	*	41	*

drivers/gpu/drm/i915/i915_vma.c+6−4

 	GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE));
+	spin_lock(&obj->vma.lock);
 	if (i915_is_ggtt(vm)) {
 		if (unlikely(overflows_type(vma->size, u32)))
-			goto err_vma;
+			goto err_unlock;
 		vma->fence_size = i915_gem_fence_size(vm->i915, vma->size,
 						      i915_gem_object_get_tiling(obj),
 						      i915_gem_object_get_stride(obj));
 		if (unlikely(vma->fence_size < vma->size || /* overflow */
 			     vma->fence_size > vm->total))
-			goto err_vma;
+			goto err_unlock;
 		GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT));
 		__set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma));
 	}
-	spin_lock(&obj->vma.lock);
 	rb = NULL;
 	p = &obj->vma.tree.rb_node;
 	while (*p) {
 	return vma;
+err_unlock:
+	spin_unlock(&obj->vma.lock);
 err_vma:
 	i915_vma_free(vma);
 	return ERR_PTR(-E2BIG);

drivers/gpu/drm/ingenic/ingenic-drm.c+1−0

@@ -843,6 +843,7 @@ static const struct of_device_id ingenic_drm_of_match[] = { · 842 unmodified lines
843	{ .compatible = "ingenic,jz4770-lcd", .data = &jz4770_soc_info },	843	{ .compatible = "ingenic,jz4770-lcd", .data = &jz4770_soc_info },
844	{ /* sentinel */ },	844	{ /* sentinel */ },
845	};	845	};
		846	MODULE_DEVICE_TABLE(of, ingenic_drm_of_match);
846		847
847	static struct platform_driver ingenic_drm_driver = {	848	static struct platform_driver ingenic_drm_driver = {
848	.driver = {	849	.driver = {

drivers/gpu/drm/meson/meson_dw_hdmi.c+1−3

 		return PTR_ERR(dw_plat_data->regm);
 	irq = platform_get_irq(pdev, 0);
-	if (irq < 0) {
+	if (irq < 0)
-		dev_err(dev, "Failed to get hdmi top irq\n");
 		return irq;
-	}
 	ret = devm_request_threaded_irq(dev, irq, dw_hdmi_top_irq,
 					dw_hdmi_top_thread_irq, IRQF_SHARED,

drivers/gpu/drm/qxl/qxl_cmd.c+5−5

@@ -480,9 +480,10 @@ int qxl_hw_surface_alloc(struct qxl_device *qdev, · 479 unmodified lines
480	return ret;	480	return ret;
481		481
482	ret = qxl_release_reserve_list(release, true);	482	ret = qxl_release_reserve_list(release, true);
483	if (ret)	483	if (ret) {
		484	qxl_release_free(qdev, release);
484	return ret;	485	return ret;
485		486	}
486	cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);	487	cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
487	cmd->type = QXL_SURFACE_CMD_CREATE;	488	cmd->type = QXL_SURFACE_CMD_CREATE;
488	cmd->flags = QXL_SURF_FLAG_KEEP_DATA;	489	cmd->flags = QXL_SURF_FLAG_KEEP_DATA;
@@ -499,8 +500,8 @@ int qxl_hw_surface_alloc(struct qxl_device *qdev, · 10 unmodified lines
499	/* no need to add a release to the fence for this surface bo,	500	/* no need to add a release to the fence for this surface bo,
500	since it is only released when we ask to destroy the surface	501	since it is only released when we ask to destroy the surface
501	and it would never signal otherwise */	502	and it would never signal otherwise */
502	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
503	qxl_release_fence_buffer_objects(release);	503	qxl_release_fence_buffer_objects(release);
		504	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
504		505
505	surf->hw_surf_alloc = true;	506	surf->hw_surf_alloc = true;
506	spin_lock(&qdev->surf_id_idr_lock);	507	spin_lock(&qdev->surf_id_idr_lock);
@@ -542,9 +543,8 @@ int qxl_hw_surface_dealloc(struct qxl_device *qdev, · 35 unmodified lines
542	cmd->surface_id = id;	543	cmd->surface_id = id;
543	qxl_release_unmap(qdev, release, &cmd->release_info);	544	qxl_release_unmap(qdev, release, &cmd->release_info);
544		545
545	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
546
547	qxl_release_fence_buffer_objects(release);	546	qxl_release_fence_buffer_objects(release);
		547	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
548		548
549	return 0;	549	return 0;
550	}	550	}

drivers/gpu/drm/qxl/qxl_display.c+3−3

 	cmd->u.set.visible = 1;
 	qxl_release_unmap(qdev, release, &cmd->release_info);
-	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	qxl_release_fence_buffer_objects(release);
+	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	return ret;
 	cmd->u.position.y = plane->state->crtc_y + fb->hot_y;
 	qxl_release_unmap(qdev, release, &cmd->release_info);
-	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	qxl_release_fence_buffer_objects(release);
+	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	if (old_cursor_bo != NULL)
 		qxl_bo_unpin(old_cursor_bo);
 	cmd->type = QXL_CURSOR_HIDE;
 	qxl_release_unmap(qdev, release, &cmd->release_info);
-	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	qxl_release_fence_buffer_objects(release);
+	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 }
 static void qxl_update_dumb_head(struct qxl_device *qdev,

drivers/gpu/drm/qxl/qxl_draw.c+4−3

@@ -209,9 +209,10 @@ void qxl_draw_dirty_fb(struct qxl_device *qdev, · 208 unmodified lines
209	goto out_release_backoff;	209	goto out_release_backoff;
210		210
211	rects = drawable_set_clipping(qdev, num_clips, clips_bo);	211	rects = drawable_set_clipping(qdev, num_clips, clips_bo);
212	if (!rects)	212	if (!rects) {
		213	ret = -EINVAL;
213	goto out_release_backoff;	214	goto out_release_backoff;
214		215	}
215	drawable = (struct qxl_drawable *)qxl_release_map(qdev, release);	216	drawable = (struct qxl_drawable *)qxl_release_map(qdev, release);
216		217
217	drawable->clip.type = SPICE_CLIP_TYPE_RECTS;	218	drawable->clip.type = SPICE_CLIP_TYPE_RECTS;
@@ -242,8 +243,8 @@ void qxl_draw_dirty_fb(struct qxl_device *qdev, · 24 unmodified lines
242	}	243	}
243	qxl_bo_kunmap(clips_bo);	244	qxl_bo_kunmap(clips_bo);
244		245
245	qxl_push_command_ring_release(qdev, release, QXL_CMD_DRAW, false);
246	qxl_release_fence_buffer_objects(release);	246	qxl_release_fence_buffer_objects(release);
		247	qxl_push_command_ring_release(qdev, release, QXL_CMD_DRAW, false);
247		248
248	out_release_backoff:	249	out_release_backoff:
249	if (ret)	250	if (ret)

drivers/gpu/drm/qxl/qxl_image.c+2−1

 		break;
 	default:
 		DRM_ERROR("unsupported image bit depth\n");
-		return -EINVAL; /* TODO: cleanup */
+		qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr);
+		return -EINVAL;
 	}
 	image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN;
 	image->u.bitmap.x = width;

drivers/gpu/drm/qxl/qxl_ioctl.c+1−4

 			apply_surf_reloc(qdev, &reloc_info[i]);
 	}
+	qxl_release_fence_buffer_objects(release);
 	ret = qxl_push_command_ring_release(qdev, release, cmd->type, true);
-	if (ret)
-		qxl_release_backoff_reserve_list(release);
-	else
-		qxl_release_fence_buffer_objects(release);
 out_free_bos:
 out_free_release:

drivers/gpu/drm/scheduler/sched_main.c+1−1

@@ -676,7 +676,7 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) · 675 unmodified lines
676	*/	676	*/
677	if ((sched->timeout != MAX_SCHEDULE_TIMEOUT &&	677	if ((sched->timeout != MAX_SCHEDULE_TIMEOUT &&
678	!cancel_delayed_work(&sched->work_tdr)) \|\|	678	!cancel_delayed_work(&sched->work_tdr)) \|\|
679	__kthread_should_park(sched->thread))	679	kthread_should_park())
680	return NULL;	680	return NULL;
681		681
682	spin_lock(&sched->job_list_lock);	682	spin_lock(&sched->job_list_lock);

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c+1−1

@@ -717,7 +717,7 @@ static void sun6i_dsi_encoder_enable(struct drm_encoder *encoder) · 716 unmodified lines
717	struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;	717	struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
718	struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder);	718	struct sun6i_dsi *dsi = encoder_to_sun6i_dsi(encoder);
719	struct mipi_dsi_device *device = dsi->device;	719	struct mipi_dsi_device *device = dsi->device;
720	union phy_configure_opts opts = { 0 };	720	union phy_configure_opts opts = { };
721	struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy;	721	struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy;
722	u16 delay;	722	u16 delay;
723	int err;	723	int err;

drivers/gpu/drm/tidss/tidss_crtc.c+13−3

 	return &state->base;
 }
+static void tidss_crtc_destroy(struct drm_crtc *crtc)
+{
+	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
+	drm_crtc_cleanup(crtc);
+	kfree(tcrtc);
+}
 static const struct drm_crtc_funcs tidss_crtc_funcs = {
 	.reset = tidss_crtc_reset,
-	.destroy = drm_crtc_cleanup,
+	.destroy = tidss_crtc_destroy,
 	.set_config = drm_atomic_helper_set_config,
 	.page_flip = drm_atomic_helper_page_flip,
 	.atomic_duplicate_state = tidss_crtc_duplicate_state,
 	bool has_ctm = tidss->feat->vp_feat.color.has_ctm;
 	int ret;
-	tcrtc = devm_kzalloc(tidss->dev, sizeof(*tcrtc), GFP_KERNEL);
+	tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);
 	if (!tcrtc)
 		return ERR_PTR(-ENOMEM);
 	ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary,
 					NULL, &tidss_crtc_funcs, NULL);
-	if (ret < 0)
+	if (ret < 0) {
+		kfree(tcrtc);
 		return ERR_PTR(ret);
+	}
 	drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs);

drivers/gpu/drm/tidss/tidss_encoder.c+11−3

 	return 0;
 }
+static void tidss_encoder_destroy(struct drm_encoder *encoder)
+{
+	drm_encoder_cleanup(encoder);
+	kfree(encoder);
+}
 static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
 	.atomic_check = tidss_encoder_atomic_check,
 };
 static const struct drm_encoder_funcs encoder_funcs = {
-	.destroy = drm_encoder_cleanup,
+	.destroy = tidss_encoder_destroy,
 };
 struct drm_encoder *tidss_encoder_create(struct tidss_device *tidss,
 	struct drm_encoder *enc;
 	int ret;
-	enc = devm_kzalloc(tidss->dev, sizeof(*enc), GFP_KERNEL);
+	enc = kzalloc(sizeof(*enc), GFP_KERNEL);
 	if (!enc)
 		return ERR_PTR(-ENOMEM);
 	ret = drm_encoder_init(&tidss->ddev, enc, &encoder_funcs,
 			       encoder_type, NULL);
-	if (ret < 0)
+	if (ret < 0) {
+		kfree(enc);
 		return ERR_PTR(ret);
+	}
 	drm_encoder_helper_add(enc, &encoder_helper_funcs);

drivers/gpu/drm/tidss/tidss_plane.c+18−6

 	dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
 }
+static void drm_plane_destroy(struct drm_plane *plane)
+{
+	struct tidss_plane *tplane = to_tidss_plane(plane);
+	drm_plane_cleanup(plane);
+	kfree(tplane);
+}
 static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
 	.atomic_check = tidss_plane_atomic_check,
 	.atomic_update = tidss_plane_atomic_update,
 	.update_plane = drm_atomic_helper_update_plane,
 	.disable_plane = drm_atomic_helper_disable_plane,
 	.reset = drm_atomic_helper_plane_reset,
-	.destroy = drm_plane_cleanup,
+	.destroy = drm_plane_destroy,
 	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
 	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
 };
 			   BIT(DRM_MODE_BLEND_COVERAGE));
 	int ret;
-	tplane = devm_kzalloc(tidss->dev, sizeof(*tplane), GFP_KERNEL);
+	tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
 	if (!tplane)
 		return ERR_PTR(-ENOMEM);
 				       formats, num_formats,
 				       NULL, type, NULL);
 	if (ret < 0)
-		return ERR_PTR(ret);
+		goto err;
 	drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
 						default_encoding,
 						default_range);
 	if (ret)
-		return ERR_PTR(ret);
+		goto err;
 	ret = drm_plane_create_alpha_property(&tplane->plane);
 	if (ret)
-		return ERR_PTR(ret);
+		goto err;
 	ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);
 	if (ret)
-		return ERR_PTR(ret);
+		goto err;
 	return tplane;
+err:
+	kfree(tplane);
+	return ERR_PTR(ret);
 }

drivers/gpu/drm/virtio/virtgpu_drv.h+1−0

@@ -221,6 +221,7 @@ struct virtio_gpu_fpriv { · 220 unmodified lines
221	/* virtio_ioctl.c */	221	/* virtio_ioctl.c */
222	#define DRM_VIRTIO_NUM_IOCTLS 10	222	#define DRM_VIRTIO_NUM_IOCTLS 10
223	extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];	223	extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
		224	void virtio_gpu_create_context(struct drm_device dev, struct drm_file file);
224		225
225	/* virtio_kms.c */	226	/* virtio_kms.c */
226	int virtio_gpu_init(struct drm_device *dev);	227	int virtio_gpu_init(struct drm_device *dev);

drivers/gpu/drm/virtio/virtgpu_gem.c+3−0

@@ -39,6 +39,9 @@ int virtio_gpu_gem_create(struct drm_file *file, · 38 unmodified lines
39	int ret;	39	int ret;
40	u32 handle;	40	u32 handle;
41		41
		42	if (vgdev->has_virgl_3d)
		43	virtio_gpu_create_context(dev, file);
		44
42	ret = virtio_gpu_object_create(vgdev, params, &obj, NULL);	45	ret = virtio_gpu_object_create(vgdev, params, &obj, NULL);
43	if (ret < 0)	46	if (ret < 0)
44	return ret;	47	return ret;

drivers/gpu/drm/virtio/virtgpu_ioctl.c+2−2

 #include <linux/file.h>
 #include <linux/sync_file.h>
+#include <linux/uaccess.h>
 #include <drm/drm_file.h>
 #include <drm/virtgpu_drm.h>
 #include "virtgpu_drv.h"
-static void virtio_gpu_create_context(struct drm_device *dev,
+void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file)
-				      struct drm_file *file)
 {
 	struct virtio_gpu_device *vgdev = dev->dev_private;
 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;

drivers/gpu/drm/virtio/virtgpu_kms.c+7−11

 #include <linux/virtio.h>
 #include <linux/virtio_config.h>
+#include <linux/virtio_ring.h>
 #include <drm/drm_file.h>
 		      events_clear, &events_clear);
 }
-static void virtio_gpu_context_destroy(struct virtio_gpu_device *vgdev,
-				      uint32_t ctx_id)
-{
-	virtio_gpu_cmd_context_destroy(vgdev, ctx_id);
-	virtio_gpu_notify(vgdev);
-	ida_free(&vgdev->ctx_id_ida, ctx_id - 1);
-}
 static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
 			       void (*work_func)(struct work_struct *work))
 {
 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
 {
 	struct virtio_gpu_device *vgdev = dev->dev_private;
-	struct virtio_gpu_fpriv *vfpriv;
+	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 	if (!vgdev->has_virgl_3d)
 		return;
-	vfpriv = file->driver_priv;
+	if (vfpriv->context_created) {
+		virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
+		virtio_gpu_notify(vgdev);
+	}
-	virtio_gpu_context_destroy(vgdev, vfpriv->ctx_id);
+	ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
 	mutex_destroy(&vfpriv->context_lock);
 	kfree(vfpriv);
 	file->driver_priv = NULL;

drivers/hid/Kconfig+1−0

@@ -1155,6 +1155,7 @@ config HID_ALPS · 1154 unmodified lines
1155	config HID_MCP2221	1155	config HID_MCP2221
1156	tristate "Microchip MCP2221 HID USB-to-I2C/SMbus host support"	1156	tristate "Microchip MCP2221 HID USB-to-I2C/SMbus host support"
1157	depends on USB_HID && I2C	1157	depends on USB_HID && I2C
		1158	depends on GPIOLIB
1158	---help---	1159	---help---
1159	Provides I2C and SMBUS host adapter functionality over USB-HID	1160	Provides I2C and SMBUS host adapter functionality over USB-HID
1160	through MCP2221 device.	1161	through MCP2221 device.

drivers/hid/hid-alps.c+1−0

@@ -802,6 +802,7 @@ static int alps_probe(struct hid_device hdev, const struct hid_device_id id) · 801 unmodified lines
802	break;	802	break;
803	case HID_DEVICE_ID_ALPS_U1_DUAL:	803	case HID_DEVICE_ID_ALPS_U1_DUAL:
804	case HID_DEVICE_ID_ALPS_U1:	804	case HID_DEVICE_ID_ALPS_U1:
		805	case HID_DEVICE_ID_ALPS_U1_UNICORN_LEGACY:
805	data->dev_type = U1;	806	data->dev_type = U1;
806	break;	807	break;
807	default:	808	default:

drivers/hid/hid-ids.h+7−1

 #define HID_DEVICE_ID_ALPS_U1_DUAL_PTP	0x121F
 #define HID_DEVICE_ID_ALPS_U1_DUAL_3BTN_PTP	0x1220
 #define HID_DEVICE_ID_ALPS_U1		0x1215
+#define HID_DEVICE_ID_ALPS_U1_UNICORN_LEGACY         0x121E
 #define HID_DEVICE_ID_ALPS_T4_BTNLESS	0x120C
 #define HID_DEVICE_ID_ALPS_1222		0x1222
 #define USB_VENDOR_ID_AMI		0x046b
 #define USB_DEVICE_ID_AMI_VIRT_KEYBOARD_AND_MOUSE	0xff10
 #define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_7349	0x7349
 #define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_73F7	0x73f7
 #define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001	0xa001
+#define USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_C002	0xc002
 #define USB_VENDOR_ID_ELAN		0x04f3
 #define USB_DEVICE_ID_TOSHIBA_CLICK_L9W	0x0401
 #define USB_DEVICE_ID_LOGITECH_RUMBLEPAD2	0xc218
 #define USB_DEVICE_ID_LOGITECH_RUMBLEPAD2_2	0xc219
 #define USB_DEVICE_ID_LOGITECH_G15_LCD		0xc222
+#define USB_DEVICE_ID_LOGITECH_G11		0xc225
 #define USB_DEVICE_ID_LOGITECH_G15_V2_LCD	0xc227
 #define USB_DEVICE_ID_LOGITECH_G510		0xc22d
 #define USB_DEVICE_ID_LOGITECH_G510_USB_AUDIO	0xc22e
 #define USB_DEVICE_ID_SYMBOL_SCANNER_2	0x1300
 #define USB_DEVICE_ID_SYMBOL_SCANNER_3	0x1200
+#define I2C_VENDOR_ID_SYNAPTICS     0x06cb
+#define I2C_PRODUCT_ID_SYNAPTICS_SYNA2393   0x7a13
 #define USB_VENDOR_ID_SYNAPTICS		0x06cb
 #define USB_DEVICE_ID_SYNAPTICS_TP	0x0001
 #define USB_DEVICE_ID_SYNAPTICS_INT_TP	0x0002
 #define USB_DEVICE_ID_SYNAPTICS_LTS2	0x1d10
 #define USB_DEVICE_ID_SYNAPTICS_HD	0x0ac3
 #define USB_DEVICE_ID_SYNAPTICS_QUAD_HD	0x1ac3
+#define USB_DEVICE_ID_SYNAPTICS_DELL_K12A	0x2819
 #define USB_DEVICE_ID_SYNAPTICS_ACER_SWITCH5_012	0x2968
 #define USB_DEVICE_ID_SYNAPTICS_TP_V103	0x5710
 #define USB_DEVICE_ID_SYNAPTICS_ACER_SWITCH5	0x81a7

drivers/hid/hid-lg-g15.c+4−0

 }
 static const struct hid_device_id lg_g15_devices[] = {
+	/* The G11 is a G15 without the LCD, treat it as a G15 */
+	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
+		USB_DEVICE_ID_LOGITECH_G11),
+		.driver_data = LG_G15 },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
 			 USB_DEVICE_ID_LOGITECH_G15_LCD),
 		.driver_data = LG_G15 },

drivers/hid/hid-multitouch.c+3−0

 	{ .driver_data = MT_CLS_EGALAX_SERIAL,
 		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,
 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001) },
+	{ .driver_data = MT_CLS_EGALAX,
+		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,
+			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_C002) },
 	/* Elitegroup panel */
 	{ .driver_data = MT_CLS_SERIAL,

drivers/hid/hid-quirks.c+1−0

@@ -163,6 +163,7 @@ static const struct hid_device_id hid_quirks[] = { · 162 unmodified lines
163	{ HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_LTS2), HID_QUIRK_NO_INIT_REPORTS },	163	{ HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_LTS2), HID_QUIRK_NO_INIT_REPORTS },
164	{ HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_QUAD_HD), HID_QUIRK_NO_INIT_REPORTS },	164	{ HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_QUAD_HD), HID_QUIRK_NO_INIT_REPORTS },
165	{ HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP_V103), HID_QUIRK_NO_INIT_REPORTS },	165	{ HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP_V103), HID_QUIRK_NO_INIT_REPORTS },
		166	{ HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_DELL_K12A), HID_QUIRK_NO_INIT_REPORTS },
166	{ HID_USB_DEVICE(USB_VENDOR_ID_TOPMAX, USB_DEVICE_ID_TOPMAX_COBRAPAD), HID_QUIRK_BADPAD },	167	{ HID_USB_DEVICE(USB_VENDOR_ID_TOPMAX, USB_DEVICE_ID_TOPMAX_COBRAPAD), HID_QUIRK_BADPAD },
167	{ HID_USB_DEVICE(USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS), HID_QUIRK_MULTI_INPUT },	168	{ HID_USB_DEVICE(USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS), HID_QUIRK_MULTI_INPUT },
168	{ HID_USB_DEVICE(USB_VENDOR_ID_TPV, USB_DEVICE_ID_TPV_OPTICAL_TOUCHSCREEN_8882), HID_QUIRK_NOGET },	169	{ HID_USB_DEVICE(USB_VENDOR_ID_TPV, USB_DEVICE_ID_TPV_OPTICAL_TOUCHSCREEN_8882), HID_QUIRK_NOGET },

drivers/hid/i2c-hid/i2c-hid-core.c+2−0

 		 I2C_HID_QUIRK_BOGUS_IRQ },
 	{ USB_VENDOR_ID_ALPS_JP, HID_ANY_ID,
 		 I2C_HID_QUIRK_RESET_ON_RESUME },
+	{ I2C_VENDOR_ID_SYNAPTICS, I2C_PRODUCT_ID_SYNAPTICS_SYNA2393,
+		 I2C_HID_QUIRK_RESET_ON_RESUME },
 	{ USB_VENDOR_ID_ITE, I2C_DEVICE_ID_ITE_LENOVO_LEGION_Y720,
 		I2C_HID_QUIRK_BAD_INPUT_SIZE },
 	{ 0, 0 }

drivers/hid/usbhid/hid-core.c+29−8

 	struct usbhid_device *usbhid = hid->driver_data;
 	int res;
+	mutex_lock(&usbhid->mutex);
 	set_bit(HID_OPENED, &usbhid->iofl);
-	if (hid->quirks & HID_QUIRK_ALWAYS_POLL)
+	if (hid->quirks & HID_QUIRK_ALWAYS_POLL) {
-		return 0;
+		res = 0;
+		goto Done;
+	}
 	res = usb_autopm_get_interface(usbhid->intf);
 	/* the device must be awake to reliably request remote wakeup */
 	if (res < 0) {
 		clear_bit(HID_OPENED, &usbhid->iofl);
-		return -EIO;
+		res = -EIO;
+		goto Done;
 	}
 	usbhid->intf->needs_remote_wakeup = 1;
 		msleep(50);
 	clear_bit(HID_RESUME_RUNNING, &usbhid->iofl);
+ Done:
+	mutex_unlock(&usbhid->mutex);
 	return res;
 }
 {
 	struct usbhid_device *usbhid = hid->driver_data;
+	mutex_lock(&usbhid->mutex);
 	/*
 	 * Make sure we don't restart data acquisition due to
 	 * a resumption we no longer care about by avoiding racing
 		clear_bit(HID_IN_POLLING, &usbhid->iofl);
 	spin_unlock_irq(&usbhid->lock);
-	if (hid->quirks & HID_QUIRK_ALWAYS_POLL)
+	if (!(hid->quirks & HID_QUIRK_ALWAYS_POLL)) {
-		return;
+		hid_cancel_delayed_stuff(usbhid);
+		usb_kill_urb(usbhid->urbin);
+		usbhid->intf->needs_remote_wakeup = 0;
+	}
-	hid_cancel_delayed_stuff(usbhid);
+	mutex_unlock(&usbhid->mutex);
-	usb_kill_urb(usbhid->urbin);
-	usbhid->intf->needs_remote_wakeup = 0;
 }
 /*
 	unsigned int n, insize = 0;
 	int ret;
+	mutex_lock(&usbhid->mutex);
 	clear_bit(HID_DISCONNECTED, &usbhid->iofl);
 	usbhid->bufsize = HID_MIN_BUFFER_SIZE;
 		usbhid_set_leds(hid);
 		device_set_wakeup_enable(&dev->dev, 1);
 	}
+	mutex_unlock(&usbhid->mutex);
 	return 0;
 fail:
 	usbhid->urbout = NULL;
 	usbhid->urbctrl = NULL;
 	hid_free_buffers(dev, hid);
+	mutex_unlock(&usbhid->mutex);
 	return ret;
 }
 		usbhid->intf->needs_remote_wakeup = 0;
 	}
+	mutex_lock(&usbhid->mutex);
 	clear_bit(HID_STARTED, &usbhid->iofl);
 	spin_lock_irq(&usbhid->lock);	/* Sync with error and led handlers */
 	set_bit(HID_DISCONNECTED, &usbhid->iofl);
 	usbhid->urbout = NULL;
 	hid_free_buffers(hid_to_usb_dev(hid), hid);
+	mutex_unlock(&usbhid->mutex);
 }
 static int usbhid_power(struct hid_device *hid, int lvl)
 	INIT_WORK(&usbhid->reset_work, hid_reset);
 	timer_setup(&usbhid->io_retry, hid_retry_timeout, 0);
 	spin_lock_init(&usbhid->lock);
+	mutex_init(&usbhid->mutex);
 	ret = hid_add_device(hid);
 	if (ret) {

drivers/hid/usbhid/usbhid.h+1−0

@@ -80,6 +80,7 @@ struct usbhid_device { · 79 unmodified lines
80	dma_addr_t outbuf_dma; /* Output buffer dma */	80	dma_addr_t outbuf_dma; /* Output buffer dma */
81	unsigned long last_out; /* record of last output for timeouts */	81	unsigned long last_out; /* record of last output for timeouts */
82		82
		83	struct mutex mutex; /* start/stop/open/close */
83	spinlock_t lock; /* fifo spinlock */	84	spinlock_t lock; /* fifo spinlock */
84	unsigned long iofl; /* I/O flags (CTRL_RUNNING, OUT_RUNNING) */	85	unsigned long iofl; /* I/O flags (CTRL_RUNNING, OUT_RUNNING) */
85	struct timer_list io_retry; /* Retry timer */	86	struct timer_list io_retry; /* Retry timer */

drivers/hid/wacom_sys.c+3−1

 			data[0] = field->report->id;
 			ret = wacom_get_report(hdev, HID_FEATURE_REPORT,
 					       data, n, WAC_CMD_RETRIES);
-			if (ret == n) {
+			if (ret == n && features->type == HID_GENERIC) {
 				ret = hid_report_raw_event(hdev,
 					HID_FEATURE_REPORT, data, n, 0);
+			} else if (ret == 2 && features->type != HID_GENERIC) {
+				features->touch_max = data[1];
 			} else {
 				features->touch_max = 16;
 				hid_warn(hdev, "wacom_feature_mapping: "

drivers/hid/wacom_wac.c+22−66

 {
 	struct input_dev *pad_input = wacom->pad_input;
 	unsigned char *data = wacom->data;
+	int nbuttons = wacom->features.numbered_buttons;
-	int buttons = data[282] | ((data[281] & 0x40) << 2);
+	int expresskeys = data[282];
+	int center = (data[281] & 0x40) >> 6;
 	int ring = data[285] & 0x7F;
 	bool ringstatus = data[285] & 0x80;
-	bool prox = buttons || ringstatus;
+	bool prox = expresskeys || center || ringstatus;
 	/* Fix touchring data: userspace expects 0 at left and increasing clockwise */
 	ring = 71 - ring;
 	if (ring > 71)
 		ring -= 72;
-	wacom_report_numbered_buttons(pad_input, 9, buttons);
+	wacom_report_numbered_buttons(pad_input, nbuttons,
+                                      expresskeys | (center << (nbuttons - 1)));
 	input_report_abs(pad_input, ABS_WHEEL, ringstatus ? ring : 0);
 			case HID_DG_TIPSWITCH:
 				hid_data->last_slot_field = equivalent_usage;
 				break;
+			case HID_DG_CONTACTCOUNT:
+				hid_data->cc_report = report->id;
+				hid_data->cc_index = i;
+				hid_data->cc_value_index = j;
+				break;
 			}
 		}
 	}
+	if (hid_data->cc_report != 0 &&
+	    hid_data->cc_index >= 0) {
+		struct hid_field *field = report->field[hid_data->cc_index];
+		int value = field->value[hid_data->cc_value_index];
+		if (value)
+			hid_data->num_expected = value;
+	}
+	else {
+		hid_data->num_expected = wacom_wac->features.touch_max;
+	}
 }
 static void wacom_wac_finger_report(struct hid_device *hdev,
 	struct wacom_wac *wacom_wac = &wacom->wacom_wac;
 	struct input_dev *input = wacom_wac->touch_input;
 	unsigned touch_max = wacom_wac->features.touch_max;
-	struct hid_data *hid_data = &wacom_wac->hid_data;
 	/* If more packets of data are expected, give us a chance to
 	 * process them rather than immediately syncing a partial
 	input_sync(input);
 	wacom_wac->hid_data.num_received = 0;
-	hid_data->num_expected = 0;
 	/* keep touch state for pen event */
 	wacom_wac->shared->touch_down = wacom_wac_finger_count_touches(wacom_wac);
 	}
 }
-static void wacom_set_num_expected(struct hid_device *hdev,
-				   struct hid_report *report,
-				   int collection_index,
-				   struct hid_field *field,
-				   int field_index)
-{
-	struct wacom *wacom = hid_get_drvdata(hdev);
-	struct wacom_wac *wacom_wac = &wacom->wacom_wac;
-	struct hid_data *hid_data = &wacom_wac->hid_data;
-	unsigned int original_collection_level =
-		hdev->collection[collection_index].level;
-	bool end_collection = false;
-	int i;
-	if (hid_data->num_expected)
-		return;
-	// find the contact count value for this segment
-	for (i = field_index; i < report->maxfield && !end_collection; i++) {
-		struct hid_field *field = report->field[i];
-		unsigned int field_level =
-			hdev->collection[field->usage[0].collection_index].level;
-		unsigned int j;
-		if (field_level != original_collection_level)
-			continue;
-		for (j = 0; j < field->maxusage; j++) {
-			struct hid_usage *usage = &field->usage[j];
-			if (usage->collection_index != collection_index) {
-				end_collection = true;
-				break;
-			}
-			if (wacom_equivalent_usage(usage->hid) == HID_DG_CONTACTCOUNT) {
-				hid_data->cc_report = report->id;
-				hid_data->cc_index = i;
-				hid_data->cc_value_index = j;
-				if (hid_data->cc_report != 0 &&
-				    hid_data->cc_index >= 0) {
-					struct hid_field *field =
-						report->field[hid_data->cc_index];
-					int value =
-						field->value[hid_data->cc_value_index];
-					if (value)
-						hid_data->num_expected = value;
-				}
-			}
-		}
-	}
-	if (hid_data->cc_report == 0 || hid_data->cc_index < 0)
-		hid_data->num_expected = wacom_wac->features.touch_max;
-}
 static int wacom_wac_collection(struct hid_device *hdev, struct hid_report *report,
 			 int collection_index, struct hid_field *field,
 			 int field_index)
 {
 	struct wacom *wacom = hid_get_drvdata(hdev);
-	if (WACOM_FINGER_FIELD(field))
-		wacom_set_num_expected(hdev, report, collection_index, field,
-				       field_index);
 	wacom_report_events(hdev, report, collection_index, field_index);
 	/*

drivers/hv/hv.c+1−5

 	shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
 	shared_sint.masked = false;
-	if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
+	shared_sint.auto_eoi = hv_recommend_using_aeoi();
-		shared_sint.auto_eoi = false;
-	else
-		shared_sint.auto_eoi = true;
 	hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 	/* Enable the global synic bit */

drivers/hv/hv_trace.h+2−2

@@ -286,8 +286,8 @@ TRACE_EVENT(vmbus_send_tl_connect_request, · 285 unmodified lines
286	__field(int, ret)	286	__field(int, ret)
287	),	287	),
288	TP_fast_assign(	288	TP_fast_assign(
289	memcpy(__entry->guest_id, &msg->guest_endpoint_id.b, 16);	289	export_guid(__entry->guest_id, &msg->guest_endpoint_id);
290	memcpy(__entry->host_id, &msg->host_service_id.b, 16);	290	export_guid(__entry->host_id, &msg->host_service_id);
291	__entry->ret = ret;	291	__entry->ret = ret;
292	),	292	),
293	TP_printk("sending guest_endpoint_id %pUl, host_service_id %pUl, "	293	TP_printk("sending guest_endpoint_id %pUl, host_service_id %pUl, "

drivers/hv/vmbus_drv.c+34−9

 	return drv->resume(dev);
 }
+#else
+#define vmbus_suspend NULL
+#define vmbus_resume NULL
 #endif /* CONFIG_PM_SLEEP */
 /*
 }
 /*
- * Note: we must use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS rather than
+ * Note: we must use the "noirq" ops: see the comment before vmbus_bus_pm.
- * SET_SYSTEM_SLEEP_PM_OPS: see the comment before vmbus_bus_pm.
+ *
+ * suspend_noirq/resume_noirq are set to NULL to support Suspend-to-Idle: we
+ * shouldn't suspend the vmbus devices upon Suspend-to-Idle, otherwise there
+ * is no way to wake up a Generation-2 VM.
+ *
+ * The other 4 ops are for hibernation.
  */
 static const struct dev_pm_ops vmbus_pm = {
-	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(vmbus_suspend, vmbus_resume)
+	.suspend_noirq	= NULL,
+	.resume_noirq	= NULL,
+	.freeze_noirq	= vmbus_suspend,
+	.thaw_noirq	= vmbus_resume,
+	.poweroff_noirq	= vmbus_suspend,
+	.restore_noirq	= vmbus_resume,
 };
 /* The one and only one */
 	return 0;
 }
+#else
+#define vmbus_bus_suspend NULL
+#define vmbus_bus_resume NULL
 #endif /* CONFIG_PM_SLEEP */
 static const struct acpi_device_id vmbus_acpi_device_ids[] = {
 MODULE_DEVICE_TABLE(acpi, vmbus_acpi_device_ids);
 /*
- * Note: we must use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS rather than
+ * Note: we must use the "no_irq" ops, otherwise hibernation can not work with
- * SET_SYSTEM_SLEEP_PM_OPS, otherwise NIC SR-IOV can not work, because the
+ * PCI device assignment, because "pci_dev_pm_ops" uses the "noirq" ops: in
- * "pci_dev_pm_ops" uses the "noirq" callbacks: in the resume path, the
+ * the resume path, the pci "noirq" restore op runs before "non-noirq" op (see
- * pci "noirq" restore callback runs before "non-noirq" callbacks (see
  * resume_target_kernel() -> dpm_resume_start(), and hibernation_restore() ->
  * dpm_resume_end()). This means vmbus_bus_resume() and the pci-hyperv's
- * resume callback must also run via the "noirq" callbacks.
+ * resume callback must also run via the "noirq" ops.
+ *
+ * Set suspend_noirq/resume_noirq to NULL for Suspend-to-Idle: see the comment
+ * earlier in this file before vmbus_pm.
  */
 static const struct dev_pm_ops vmbus_bus_pm = {
-	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(vmbus_bus_suspend, vmbus_bus_resume)
+	.suspend_noirq	= NULL,
+	.resume_noirq	= NULL,
+	.freeze_noirq	= vmbus_bus_suspend,
+	.thaw_noirq	= vmbus_bus_resume,
+	.poweroff_noirq	= vmbus_bus_suspend,
+	.restore_noirq	= vmbus_bus_resume
 };
 static struct acpi_driver vmbus_acpi_driver = {

drivers/i2c/busses/i2c-amd-mp2-pci.c+1−1

 	if (!privdata)
 		return -ENOMEM;
+	privdata->pci_dev = pci_dev;
 	rc = amd_mp2_pci_init(privdata, pci_dev);
 	if (rc)
 		return rc;
 	mutex_init(&privdata->c2p_lock);
-	privdata->pci_dev = pci_dev;
 	pm_runtime_set_autosuspend_delay(&pci_dev->dev, 1000);
 	pm_runtime_use_autosuspend(&pci_dev->dev);

drivers/i2c/busses/i2c-aspeed.c+4−1

 	/* Ack all interrupts except for Rx done */
 	writel(irq_received & ~ASPEED_I2CD_INTR_RX_DONE,
 	       bus->base + ASPEED_I2C_INTR_STS_REG);
+	readl(bus->base + ASPEED_I2C_INTR_STS_REG);
 	irq_remaining = irq_received;
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
 			irq_received, irq_handled);
 	/* Ack Rx done */
-	if (irq_received & ASPEED_I2CD_INTR_RX_DONE)
+	if (irq_received & ASPEED_I2CD_INTR_RX_DONE) {
 		writel(ASPEED_I2CD_INTR_RX_DONE,
 		       bus->base + ASPEED_I2C_INTR_STS_REG);
+		readl(bus->base + ASPEED_I2C_INTR_STS_REG);
+	}
 	spin_unlock(&bus->lock);
 	return irq_remaining ? IRQ_NONE : IRQ_HANDLED;
 }

drivers/i2c/busses/i2c-bcm-iproc.c+3−0

 			value = (u8)((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK);
 			i2c_slave_event(iproc_i2c->slave,
 					I2C_SLAVE_WRITE_RECEIVED, &value);
+			if (rx_status == I2C_SLAVE_RX_END)
+				i2c_slave_event(iproc_i2c->slave,
+						I2C_SLAVE_STOP, &value);
 		}
 	} else if (status & BIT(IS_S_TX_UNDERRUN_SHIFT)) {
 		/* Master read other than start */

drivers/i2c/busses/i2c-tegra.c+12−24

 	do {
 		u32 status = i2c_readl(i2c_dev, I2C_INT_STATUS);
-		if (status)
+		if (status) {
 			tegra_i2c_isr(i2c_dev->irq, i2c_dev);
-		if (completion_done(complete)) {
+			if (completion_done(complete)) {
-			s64 delta = ktime_ms_delta(ktimeout, ktime);
+				s64 delta = ktime_ms_delta(ktimeout, ktime);
-			return msecs_to_jiffies(delta) ?: 1;
+				return msecs_to_jiffies(delta) ?: 1;
+			}
 		}
 		ktime = ktime_get();
 		disable_irq(i2c_dev->irq);
 		/*
-		 * Under some rare circumstances (like running KASAN +
+		 * There is a chance that completion may happen after IRQ
-		 * NFS root) CPU, which handles interrupt, may stuck in
+		 * synchronization, which is done by disable_irq().
-		 * uninterruptible state for a significant time.  In this
-		 * case we will get timeout if I2C transfer is running on
-		 * a sibling CPU, despite of IRQ being raised.
-		 *
-		 * In order to handle this rare condition, the IRQ status
-		 * needs to be checked after timeout.
 		 */
-		if (ret == 0)
+		if (ret == 0 && completion_done(complete)) {
-			ret = tegra_i2c_poll_completion_timeout(i2c_dev,
+			dev_warn(i2c_dev->dev,
-								complete, 0);
+				 "completion done after timeout\n");
+			ret = 1;
+		}
 	}
 	return ret;
 		time_left = tegra_i2c_wait_completion_timeout(
 				i2c_dev, &i2c_dev->dma_complete, xfer_time);
-		/*
-		 * Synchronize DMA first, since dmaengine_terminate_sync()
-		 * performs synchronization after the transfer's termination
-		 * and we want to get a completion if transfer succeeded.
-		 */
-		dmaengine_synchronize(i2c_dev->msg_read ?
-				      i2c_dev->rx_dma_chan :
-				      i2c_dev->tx_dma_chan);
 		dmaengine_terminate_sync(i2c_dev->msg_read ?
 					 i2c_dev->rx_dma_chan :
 					 i2c_dev->tx_dma_chan);

drivers/iio/adc/ad7192.c+47−16

 #define AD7193_CH_AINCOM	0x600 /* AINCOM - AINCOM */
 /* ID Register Bit Designations (AD7192_REG_ID) */
-#define ID_AD7190		0x4
+#define CHIPID_AD7190		0x4
-#define ID_AD7192		0x0
+#define CHIPID_AD7192		0x0
-#define ID_AD7193		0x2
+#define CHIPID_AD7193		0x2
-#define ID_AD7195		0x6
+#define CHIPID_AD7195		0x6
 #define AD7192_ID_MASK		0x0F
 /* GPOCON Register Bit Designations (AD7192_REG_GPOCON) */
 	AD7192_SYSCALIB_FULL_SCALE,
 };
+enum {
+	ID_AD7190,
+	ID_AD7192,
+	ID_AD7193,
+	ID_AD7195,
+};
+struct ad7192_chip_info {
+	unsigned int			chip_id;
+	const char			*name;
+};
 struct ad7192_state {
+	const struct ad7192_chip_info	*chip_info;
 	struct regulator		*avdd;
 	struct regulator		*dvdd;
 	struct clk			*mclk;
 	u32				conf;
 	u32				scale_avail[8][2];
 	u8				gpocon;
-	u8				devid;
 	u8				clock_sel;
 	struct mutex			lock;	/* protect sensor state */
 	u8				syscalib_mode[8];
 	id &= AD7192_ID_MASK;
-	if (id != st->devid)
+	if (id != st->chip_info->chip_id)
 		dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X)\n",
 			 id);
 		st->mode |= AD7192_MODE_REJ60;
 	refin2_en = of_property_read_bool(np, "adi,refin2-pins-enable");
-	if (refin2_en && st->devid != ID_AD7195)
+	if (refin2_en && st->chip_info->chip_id != CHIPID_AD7195)
 		st->conf |= AD7192_CONF_REFSEL;
 	st->conf &= ~AD7192_CONF_CHOP;
 	IIO_CHAN_SOFT_TIMESTAMP(14),
 };
+static const struct ad7192_chip_info ad7192_chip_info_tbl[] = {
+	[ID_AD7190] = {
+		.chip_id = CHIPID_AD7190,
+		.name = "ad7190",
+	},
+	[ID_AD7192] = {
+		.chip_id = CHIPID_AD7192,
+		.name = "ad7192",
+	},
+	[ID_AD7193] = {
+		.chip_id = CHIPID_AD7193,
+		.name = "ad7193",
+	},
+	[ID_AD7195] = {
+		.chip_id = CHIPID_AD7195,
+		.name = "ad7195",
+	},
+};
 static int ad7192_channels_config(struct iio_dev *indio_dev)
 {
 	struct ad7192_state *st = iio_priv(indio_dev);
-	switch (st->devid) {
+	switch (st->chip_info->chip_id) {
-	case ID_AD7193:
+	case CHIPID_AD7193:
 		indio_dev->channels = ad7193_channels;
 		indio_dev->num_channels = ARRAY_SIZE(ad7193_channels);
 		break;
 }
 static const struct of_device_id ad7192_of_match[] = {
-	{ .compatible = "adi,ad7190", .data = (void *)ID_AD7190 },
+	{ .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] },
-	{ .compatible = "adi,ad7192", .data = (void *)ID_AD7192 },
+	{ .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] },
-	{ .compatible = "adi,ad7193", .data = (void *)ID_AD7193 },
+	{ .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] },
-	{ .compatible = "adi,ad7195", .data = (void *)ID_AD7195 },
+	{ .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] },
 	{}
 };
 MODULE_DEVICE_TABLE(of, ad7192_of_match);
 	}
 	spi_set_drvdata(spi, indio_dev);
-	st->devid = (unsigned long)of_device_get_match_data(&spi->dev);
+	st->chip_info = of_device_get_match_data(&spi->dev);
 	indio_dev->dev.parent = &spi->dev;
-	indio_dev->name = spi_get_device_id(spi)->name;
+	indio_dev->name = st->chip_info->name;
 	indio_dev->modes = INDIO_DIRECT_MODE;
 	ret = ad7192_channels_config(indio_dev);
 	if (ret < 0)
 		goto error_disable_dvdd;
-	if (st->devid == ID_AD7195)
+	if (st->chip_info->chip_id == CHIPID_AD7195)
 		indio_dev->info = &ad7195_info;
 	else
 		indio_dev->info = &ad7192_info;

drivers/iio/adc/ad7793.c+1−1

@@ -542,7 +542,7 @@ static const struct iio_info ad7797_info = { · 541 unmodified lines
542	.read_raw = &ad7793_read_raw,	542	.read_raw = &ad7793_read_raw,
543	.write_raw = &ad7793_write_raw,	543	.write_raw = &ad7793_write_raw,
544	.write_raw_get_fmt = &ad7793_write_raw_get_fmt,	544	.write_raw_get_fmt = &ad7793_write_raw_get_fmt,
545	.attrs = &ad7793_attribute_group,	545	.attrs = &ad7797_attribute_group,
546	.validate_trigger = ad_sd_validate_trigger,	546	.validate_trigger = ad_sd_validate_trigger,
547	};	547	};
548		548

drivers/iio/adc/stm32-adc.c+28−3

@@ -1418,8 +1418,30 @@ static unsigned int stm32_adc_dma_residue(struct stm32_adc *adc) · 1417 unmodified lines
1418	static void stm32_adc_dma_buffer_done(void *data)	1418	static void stm32_adc_dma_buffer_done(void *data)
1419	{	1419	{
1420	struct iio_dev *indio_dev = data;	1420	struct iio_dev *indio_dev = data;
		1421	struct stm32_adc *adc = iio_priv(indio_dev);
		1422	int residue = stm32_adc_dma_residue(adc);
		1423
		1424	/*
		1425	* In DMA mode the trigger services of IIO are not used
		1426	* (e.g. no call to iio_trigger_poll).
		1427	* Calling irq handler associated to the hardware trigger is not
		1428	* relevant as the conversions have already been done. Data
		1429	* transfers are performed directly in DMA callback instead.
		1430	* This implementation avoids to call trigger irq handler that
		1431	* may sleep, in an atomic context (DMA irq handler context).
		1432	*/
		1433	dev_dbg(&indio_dev->dev, "%s bufi=%d\n", __func__, adc->bufi);
1421		1434
1422	iio_trigger_poll_chained(indio_dev->trig);	1435	while (residue >= indio_dev->scan_bytes) {
		1436	u16 buffer = (u16 )&adc->rx_buf[adc->bufi];
		1437
		1438	iio_push_to_buffers(indio_dev, buffer);
		1439
		1440	residue -= indio_dev->scan_bytes;
		1441	adc->bufi += indio_dev->scan_bytes;
		1442	if (adc->bufi >= adc->rx_buf_sz)
		1443	adc->bufi = 0;
		1444	}
1423	}	1445	}
1424		1446
1425	static int stm32_adc_dma_start(struct iio_dev *indio_dev)	1447	static int stm32_adc_dma_start(struct iio_dev *indio_dev)
@@ -1845,6 +1867,7 @@ static int stm32_adc_probe(struct platform_device *pdev) · 419 unmodified lines
1845	{	1867	{
1846	struct iio_dev *indio_dev;	1868	struct iio_dev *indio_dev;
1847	struct device *dev = &pdev->dev;	1869	struct device *dev = &pdev->dev;
		1870	irqreturn_t (handler)(int irq, void p) = NULL;
1848	struct stm32_adc *adc;	1871	struct stm32_adc *adc;
1849	int ret;	1872	int ret;
1850		1873
@@ -1911,9 +1934,11 @@ static int stm32_adc_probe(struct platform_device *pdev) · 60 unmodified lines
1911	if (ret < 0)	1934	if (ret < 0)
1912	return ret;	1935	return ret;
1913		1936
		1937	if (!adc->dma_chan)
		1938	handler = &stm32_adc_trigger_handler;
		1939
1914	ret = iio_triggered_buffer_setup(indio_dev,	1940	ret = iio_triggered_buffer_setup(indio_dev,
1915	&iio_pollfunc_store_time,	1941	&iio_pollfunc_store_time, handler,
1916	&stm32_adc_trigger_handler,
1917	&stm32_adc_buffer_setup_ops);	1942	&stm32_adc_buffer_setup_ops);
1918	if (ret) {	1943	if (ret) {
1919	dev_err(&pdev->dev, "buffer setup failed\n");	1944	dev_err(&pdev->dev, "buffer setup failed\n");

drivers/iio/adc/ti-ads8344.c+3−3

@@ -29,7 +29,7 @@ struct ads8344 { · 28 unmodified lines
29	struct mutex lock;	29	struct mutex lock;
30		30
31	u8 tx_buf ____cacheline_aligned;	31	u8 tx_buf ____cacheline_aligned;
32	u16 rx_buf;	32	u8 rx_buf[3];
33	};	33	};
34		34
35	#define ADS8344_VOLTAGE_CHANNEL(chan, si) \	35	#define ADS8344_VOLTAGE_CHANNEL(chan, si) \
@@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel, · 53 unmodified lines
89		89
90	udelay(9);	90	udelay(9);
91		91
92	ret = spi_read(spi, &adc->rx_buf, 2);	92	ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
93	if (ret)	93	if (ret)
94	return ret;	94	return ret;
95		95
96	return adc->rx_buf;	96	return adc->rx_buf[0] << 9 \| adc->rx_buf[1] << 1 \| adc->rx_buf[2] >> 7;
97	}	97	}
98		98
99	static int ads8344_read_raw(struct iio_dev *iio,	99	static int ads8344_read_raw(struct iio_dev *iio,

drivers/iio/adc/xilinx-xadc-core.c+74−21

 #define XADC_FLAGS_BUFFERED BIT(0)
+/*
+ * The XADC hardware supports a samplerate of up to 1MSPS. Unfortunately it does
+ * not have a hardware FIFO. Which means an interrupt is generated for each
+ * conversion sequence. At 1MSPS sample rate the CPU in ZYNQ7000 is completely
+ * overloaded by the interrupts that it soft-lockups. For this reason the driver
+ * limits the maximum samplerate 150kSPS. At this rate the CPU is fairly busy,
+ * but still responsive.
+ */
+#define XADC_MAX_SAMPLERATE 150000
 static void xadc_write_reg(struct xadc *xadc, unsigned int reg,
 	uint32_t val)
 {
 	spin_lock_irqsave(&xadc->lock, flags);
 	xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &val);
-	xadc_write_reg(xadc, XADC_AXI_REG_IPISR, val & XADC_AXI_INT_EOS);
+	xadc_write_reg(xadc, XADC_AXI_REG_IPISR, XADC_AXI_INT_EOS);
 	if (state)
 		val |= XADC_AXI_INT_EOS;
 	else
 {
 	uint16_t val;
+	/* Powerdown the ADC-B when it is not needed. */
 	switch (seq_mode) {
 	case XADC_CONF1_SEQ_SIMULTANEOUS:
 	case XADC_CONF1_SEQ_INDEPENDENT:
-		val = XADC_CONF2_PD_ADC_B;
+		val = 0;
 		break;
 	default:
-		val = 0;
+		val = XADC_CONF2_PD_ADC_B;
 		break;
 	}
 	if (ret)
 		goto err;
+	/*
+	 * In simultaneous mode the upper and lower aux channels are samples at
+	 * the same time. In this mode the upper 8 bits in the sequencer
+	 * register are don't care and the lower 8 bits control two channels
+	 * each. As such we must set the bit if either the channel in the lower
+	 * group or the upper group is enabled.
+	 */
+	if (seq_mode == XADC_CONF1_SEQ_SIMULTANEOUS)
+		scan_mask = ((scan_mask >> 8) | scan_mask) & 0xff0000;
 	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(1), scan_mask >> 16);
 	if (ret)
 		goto err;
 	.postdisable = &xadc_postdisable,
 };
+static int xadc_read_samplerate(struct xadc *xadc)
+{
+	unsigned int div;
+	uint16_t val16;
+	int ret;
+	ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16);
+	if (ret)
+		return ret;
+	div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET;
+	if (div < 2)
+		div = 2;
+	return xadc_get_dclk_rate(xadc) / div / 26;
+}
 static int xadc_read_raw(struct iio_dev *indio_dev,
 	struct iio_chan_spec const *chan, int *val, int *val2, long info)
 {
 	struct xadc *xadc = iio_priv(indio_dev);
-	unsigned int div;
 	uint16_t val16;
 	int ret;
 		*val = -((273150 << 12) / 503975);
 		return IIO_VAL_INT;
 	case IIO_CHAN_INFO_SAMP_FREQ:
-		ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16);
+		ret = xadc_read_samplerate(xadc);
-		if (ret)
+		if (ret < 0)
 			return ret;
-		div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET;
+		*val = ret;
-		if (div < 2)
-			div = 2;
-		*val = xadc_get_dclk_rate(xadc) / div / 26;
 		return IIO_VAL_INT;
 	default:
 		return -EINVAL;
 	}
 }
-static int xadc_write_raw(struct iio_dev *indio_dev,
+static int xadc_write_samplerate(struct xadc *xadc, int val)
-	struct iio_chan_spec const *chan, int val, int val2, long info)
 {
-	struct xadc *xadc = iio_priv(indio_dev);
 	unsigned long clk_rate = xadc_get_dclk_rate(xadc);
 	unsigned int div;
 	if (!clk_rate)
 		return -EINVAL;
-	if (info != IIO_CHAN_INFO_SAMP_FREQ)
-		return -EINVAL;
 	if (val <= 0)
 		return -EINVAL;
 	/* Max. 150 kSPS */
-	if (val > 150000)
+	if (val > XADC_MAX_SAMPLERATE)
-		val = 150000;
+		val = XADC_MAX_SAMPLERATE;
 	val *= 26;
 	 * limit.
 	 */
 	div = clk_rate / val;
-	if (clk_rate / div / 26 > 150000)
+	if (clk_rate / div / 26 > XADC_MAX_SAMPLERATE)
 		div++;
 	if (div < 2)
 		div = 2;
 		div << XADC_CONF2_DIV_OFFSET);
 }
+static int xadc_write_raw(struct iio_dev *indio_dev,
+	struct iio_chan_spec const *chan, int val, int val2, long info)
+{
+	struct xadc *xadc = iio_priv(indio_dev);
+	if (info != IIO_CHAN_INFO_SAMP_FREQ)
+		return -EINVAL;
+	return xadc_write_samplerate(xadc, val);
+}
 static const struct iio_event_spec xadc_temp_events[] = {
 	{
 		.type = IIO_EV_TYPE_THRESH,
 	if (ret)
 		goto err_free_samplerate_trigger;
+	/*
+	 * Make sure not to exceed the maximum samplerate since otherwise the
+	 * resulting interrupt storm will soft-lock the system.
+	 */
+	if (xadc->ops->flags & XADC_FLAGS_BUFFERED) {
+		ret = xadc_read_samplerate(xadc);
+		if (ret < 0)
+			goto err_free_samplerate_trigger;
+		if (ret > XADC_MAX_SAMPLERATE) {
+			ret = xadc_write_samplerate(xadc, XADC_MAX_SAMPLERATE);
+			if (ret < 0)
+				goto err_free_samplerate_trigger;
+		}
+	}
 	ret = request_irq(xadc->irq, xadc->ops->interrupt_handler, 0,
 			dev_name(&pdev->dev), indio_dev);
 	if (ret)

drivers/iio/common/st_sensors/st_sensors_core.c+1−1

@@ -79,7 +79,7 @@ int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr) · 78 unmodified lines
79	struct st_sensor_odr_avl odr_out = {0, 0};	79	struct st_sensor_odr_avl odr_out = {0, 0};
80	struct st_sensor_data *sdata = iio_priv(indio_dev);	80	struct st_sensor_data *sdata = iio_priv(indio_dev);
81		81
82	if (!sdata->sensor_settings->odr.addr)	82	if (!sdata->sensor_settings->odr.mask)
83	return 0;	83	return 0;
84		84
85	err = st_sensors_match_odr(sdata->sensor_settings, odr, &odr_out);	85	err = st_sensors_match_odr(sdata->sensor_settings, odr, &odr_out);

drivers/iio/dac/ad5770r.c+1−1

@@ -525,7 +525,7 @@ static int ad5770r_channel_config(struct ad5770r_state *st) · 524 unmodified lines
525	ret = fwnode_property_read_u32(child, "num", &num);	525	ret = fwnode_property_read_u32(child, "num", &num);
526	if (ret)	526	if (ret)
527	return ret;	527	return ret;
528	if (num > AD5770R_MAX_CHANNELS)	528	if (num >= AD5770R_MAX_CHANNELS)
529	return -EINVAL;	529	return -EINVAL;
530		530
531	ret = fwnode_property_read_u32_array(child,	531	ret = fwnode_property_read_u32_array(child,

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c+10−1

 	if (result)
 		goto out_unlock;
+	pm_runtime_disable(dev);
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
 	result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
 	if (result)
 		goto out_unlock;
 	mutex_lock(&st->lock);
+	st->suspended_sensors = 0;
+	if (pm_runtime_suspended(dev)) {
+		result = 0;
+		goto out_unlock;
+	}
 	if (iio_buffer_enabled(indio_dev)) {
 		result = inv_mpu6050_prepare_fifo(st, false);
 		if (result)
 			goto out_unlock;
 	}
-	st->suspended_sensors = 0;
 	if (st->chip_config.accl_en)
 		st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
 	if (st->chip_config.gyro_en)

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h+3−0

  * @gain: Configured sensor sensitivity.
  * @odr: Output data rate of the sensor [Hz].
  * @watermark: Sensor watermark level.
+ * @decimator: Sensor decimation factor.
  * @sip: Number of samples in a given pattern.
  * @ts_ref: Sensor timestamp reference for hw one.
  * @ext_info: Sensor settings if it is connected to i2c controller
 	u32 odr;
 	u16 watermark;
+	u8 decimator;
 	u8 sip;
 	s64 ts_ref;
 	struct {
 		const struct st_lsm6dsx_ext_dev_settings *settings;
+		u32 slv_odr;
 		u8 addr;
 	} ext_info;
 };

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c+16−7

 			break;
 	}
+	sensor->decimator = decimator;
 	return i == max_size ? 0 : st_lsm6dsx_decimator_table[i].val;
 }
 int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw)
 {
 	struct st_lsm6dsx_sensor *acc_sensor, *gyro_sensor, *ext_sensor = NULL;
-	int err, acc_sip, gyro_sip, ts_sip, ext_sip, read_len, offset;
+	int err, sip, acc_sip, gyro_sip, ts_sip, ext_sip, read_len, offset;
 	u16 fifo_len, pattern_len = hw->sip * ST_LSM6DSX_SAMPLE_SIZE;
 	u16 fifo_diff_mask = hw->settings->fifo_ops.fifo_diff.mask;
 	u8 gyro_buff[ST_LSM6DSX_IIO_BUFF_SIZE];
 		acc_sip = acc_sensor->sip;
 		ts_sip = hw->ts_sip;
 		offset = 0;
+		sip = 0;
 		while (acc_sip > 0 || gyro_sip > 0 || ext_sip > 0) {
-			if (gyro_sip > 0) {
+			if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) {
 				memcpy(gyro_buff, &hw->buff[offset],
 				       ST_LSM6DSX_SAMPLE_SIZE);
 				offset += ST_LSM6DSX_SAMPLE_SIZE;
 			}
-			if (acc_sip > 0) {
+			if (acc_sip > 0 && !(sip % acc_sensor->decimator)) {
 				memcpy(acc_buff, &hw->buff[offset],
 				       ST_LSM6DSX_SAMPLE_SIZE);
 				offset += ST_LSM6DSX_SAMPLE_SIZE;
 			}
-			if (ext_sip > 0) {
+			if (ext_sip > 0 && !(sip % ext_sensor->decimator)) {
 				memcpy(ext_buff, &hw->buff[offset],
 				       ST_LSM6DSX_SAMPLE_SIZE);
 				offset += ST_LSM6DSX_SAMPLE_SIZE;
 				offset += ST_LSM6DSX_SAMPLE_SIZE;
 			}
-			if (gyro_sip-- > 0)
+			if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_GYRO],
 					gyro_buff, gyro_sensor->ts_ref + ts);
-			if (acc_sip-- > 0)
+				gyro_sip--;
+			}
+			if (acc_sip > 0 && !(sip % acc_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_ACC],
 					acc_buff, acc_sensor->ts_ref + ts);
-			if (ext_sip-- > 0)
+				acc_sip--;
+			}
+			if (ext_sip > 0 && !(sip % ext_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_EXT0],
 					ext_buff, ext_sensor->ts_ref + ts);
+				ext_sip--;
+			}
+			sip++;
 		}
 	}

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c+23−1

@@ -2036,11 +2036,21 @@ static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) · 2035 unmodified lines
2036	return 0;	2036	return 0;
2037	}	2037	}
2038		2038
2039	static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)	2039	static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
2040	{	2040	{
2041	const struct st_lsm6dsx_reg *reg;	2041	const struct st_lsm6dsx_reg *reg;
2042	int err;	2042	int err;
2043		2043
		2044	/*
		2045	* flush hw FIFO before device reset in order to avoid
		2046	* possible races on interrupt line 1. If the first interrupt
		2047	* line is asserted during hw reset the device will work in
		2048	* I3C-only mode (if it is supported)
		2049	*/
		2050	err = st_lsm6dsx_flush_fifo(hw);
		2051	if (err < 0 && err != -ENOTSUPP)
		2052	return err;
		2053
2044	/* device sw reset */	2054	/* device sw reset */
2045	reg = &hw->settings->reset;	2055	reg = &hw->settings->reset;
2046	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,	2056	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
@@ -2059,6 +2069,18 @@ static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) · 12 unmodified lines
2059		2069
2060	msleep(50);	2070	msleep(50);
2061		2071
		2072	return 0;
		2073	}
		2074
		2075	static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
		2076	{
		2077	const struct st_lsm6dsx_reg *reg;
		2078	int err;
		2079
		2080	err = st_lsm6dsx_reset_device(hw);
		2081	if (err < 0)
		2082	return err;
		2083
2062	/* enable Block Data Update */	2084	/* enable Block Data Update */
2063	reg = &hw->settings->bdu;	2085	reg = &hw->settings->bdu;
2064	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,	2086	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c+22−7

 	settings = sensor->ext_info.settings;
 	if (enable) {
-		err = st_lsm6dsx_shub_set_odr(sensor, sensor->odr);
+		err = st_lsm6dsx_shub_set_odr(sensor,
+					      sensor->ext_info.slv_odr);
 		if (err < 0)
 			return err;
 	} else {
 	if (err < 0)
 		return err;
-	delay = 1000000000 / sensor->odr;
+	delay = 1000000000 / sensor->ext_info.slv_odr;
 	usleep_range(delay, 2 * delay);
 	len = min_t(int, sizeof(data), ch->scan_type.realbits >> 3);
 		iio_device_release_direct_mode(iio_dev);
 		break;
 	case IIO_CHAN_INFO_SAMP_FREQ:
-		*val = sensor->odr / 1000;
+		*val = sensor->ext_info.slv_odr / 1000;
-		*val2 = (sensor->odr % 1000) * 1000;
+		*val2 = (sensor->ext_info.slv_odr % 1000) * 1000;
 		ret = IIO_VAL_INT_PLUS_MICRO;
 		break;
 	case IIO_CHAN_INFO_SCALE:
 		val = val * 1000 + val2 / 1000;
 		err = st_lsm6dsx_shub_get_odr_val(sensor, val, &data);
-		if (!err)
+		if (!err) {
-			sensor->odr = val;
+			struct st_lsm6dsx_hw *hw = sensor->hw;
+			struct st_lsm6dsx_sensor *ref_sensor;
+			u8 odr_val;
+			int odr;
+			ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
+			odr = st_lsm6dsx_check_odr(ref_sensor, val, &odr_val);
+			if (odr < 0)
+				return odr;
+			sensor->ext_info.slv_odr = val;
+			sensor->odr = odr;
+		}
 		break;
 	}
 	default:
 			     const struct st_lsm6dsx_ext_dev_settings *info,
 			     u8 i2c_addr, const char *name)
 {
+	enum st_lsm6dsx_sensor_id ref_id = ST_LSM6DSX_ID_ACC;
 	struct iio_chan_spec *ext_channels;
 	struct st_lsm6dsx_sensor *sensor;
 	struct iio_dev *iio_dev;
 	sensor = iio_priv(iio_dev);
 	sensor->id = id;
 	sensor->hw = hw;
-	sensor->odr = info->odr_table.odr_avl[0].milli_hz;
+	sensor->odr = hw->settings->odr_table[ref_id].odr_avl[0].milli_hz;
+	sensor->ext_info.slv_odr = info->odr_table.odr_avl[0].milli_hz;
 	sensor->gain = info->fs_table.fs_avl[0].gain;
 	sensor->ext_info.settings = info;
 	sensor->ext_info.addr = i2c_addr;

drivers/iio/industrialio-core.c+2−5

 			return -EINVAL;
 		integer = ch;
 	} else {
-		ret = iio_str_to_fixpoint(buf, fract_mult, &integer, &fract);
+		ret = __iio_str_to_fixpoint(buf, fract_mult, &integer, &fract,
+					    scale_db);
 		if (ret)
 			return ret;
 	}
-	ret = __iio_str_to_fixpoint(buf, fract_mult, &integer, &fract,
-				    scale_db);
-	if (ret)
-		return ret;
 	ret = indio_dev->info->write_raw(indio_dev, this_attr->c,
 					 integer, fract, this_attr->address);

drivers/infiniband/core/cm.c+14−12

 	ret = xa_alloc_cyclic_irq(&cm.local_id_table, &id, NULL, xa_limit_32b,
 				  &cm.local_id_next, GFP_KERNEL);
-	if (ret)
+	if (ret < 0)
 		goto error;
 	cm_id_priv->id.local_id = (__force __be32)id ^ cm.random_id_operand;
 static void cm_format_rej(struct cm_rej_msg *rej_msg,
 			  struct cm_id_private *cm_id_priv,
-			  enum ib_cm_rej_reason reason,
+			  enum ib_cm_rej_reason reason, void *ari,
-			  void *ari,
+			  u8 ari_length, const void *private_data,
-			  u8 ari_length,
+			  u8 private_data_len, enum ib_cm_state state)
-			  const void *private_data,
-			  u8 private_data_len)
 {
 	lockdep_assert_held(&cm_id_priv->lock);
 	IBA_SET(CM_REJ_REMOTE_COMM_ID, rej_msg,
 		be32_to_cpu(cm_id_priv->id.remote_id));
-	switch(cm_id_priv->id.state) {
+	switch (state) {
 	case IB_CM_REQ_RCVD:
 		IBA_SET(CM_REJ_LOCAL_COMM_ID, rej_msg, be32_to_cpu(0));
 		IBA_SET(CM_REJ_MESSAGE_REJECTED, rej_msg, CM_MSG_RESPONSE_REQ);
 			      cm_id_priv->private_data_len);
 		break;
 	case IB_CM_TIMEWAIT:
-		cm_format_rej((struct cm_rej_msg *) msg->mad, cm_id_priv,
+		cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv,
-			      IB_CM_REJ_STALE_CONN, NULL, 0, NULL, 0);
+			      IB_CM_REJ_STALE_CONN, NULL, 0, NULL, 0,
+			      IB_CM_TIMEWAIT);
 		break;
 	default:
 		goto unlock;
 			      u8 ari_length, const void *private_data,
 			      u8 private_data_len)
 {
+	enum ib_cm_state state = cm_id_priv->id.state;
 	struct ib_mad_send_buf *msg;
 	int ret;
 	    (ari && ari_length > IB_CM_REJ_ARI_LENGTH))
 		return -EINVAL;
-	switch (cm_id_priv->id.state) {
+	switch (state) {
 	case IB_CM_REQ_SENT:
 	case IB_CM_MRA_REQ_RCVD:
 	case IB_CM_REQ_RCVD:
 		if (ret)
 			return ret;
 		cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv, reason,
-			      ari, ari_length, private_data, private_data_len);
+			      ari, ari_length, private_data, private_data_len,
+			      state);
 		break;
 	case IB_CM_REP_SENT:
 	case IB_CM_MRA_REP_RCVD:
 		if (ret)
 			return ret;
 		cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv, reason,
-			      ari, ari_length, private_data, private_data_len);
+			      ari, ari_length, private_data, private_data_len,
+			      state);
 		break;
 	default:
 		pr_debug("%s: local_id %d, cm_id->state: %d\n", __func__,

drivers/infiniband/core/rdma_core.c+4−5

 	 * uverbs_uobject_fd_release(), and the caller is expected to ensure
 	 * that release is never done while a call to lookup is possible.
 	 */
-	if (f->f_op != fd_type->fops) {
+	if (f->f_op != fd_type->fops || uobject->ufile != ufile) {
 		fput(f);
 		return ERR_PTR(-EBADF);
 	}
 	filp = anon_inode_getfile(fd_type->name, fd_type->fops, NULL,
 				  fd_type->flags);
 	if (IS_ERR(filp)) {
+		uverbs_uobject_put(uobj);
 		uobj = ERR_CAST(filp);
-		goto err_uobj;
+		goto err_fd;
 	}
 	uobj->object = filp;
 	uobj->id = new_fd;
 	return uobj;
-err_uobj:
-	uverbs_uobject_put(uobj);
 err_fd:
 	put_unused_fd(new_fd);
 	return uobj;
 			     enum rdma_lookup_mode mode)
 {
 	assert_uverbs_usecnt(uobj, mode);
-	uobj->uapi_object->type_class->lookup_put(uobj, mode);
 	/*
 	 * In order to unlock an object, either decrease its usecnt for
 	 * read access or zero it in case of exclusive access. See
 		break;
 	}
+	uobj->uapi_object->type_class->lookup_put(uobj, mode);
 	/* Pairs with the kref obtained by type->lookup_get */
 	uverbs_uobject_put(uobj);
 }

drivers/infiniband/core/uverbs_main.c+4−0

 			ret = mmget_not_zero(mm);
 			if (!ret) {
 				list_del_init(&priv->list);
+				if (priv->entry) {
+					rdma_user_mmap_entry_put(priv->entry);
+					priv->entry = NULL;
+				}
 				mm = NULL;
 				continue;
 			}

drivers/infiniband/hw/i40iw/i40iw_ctrl.c+1−1

@@ -1046,7 +1046,7 @@ i40iw_sc_query_rdma_features(struct i40iw_sc_cqp *cqp, · 1045 unmodified lines
1046	u64 header;	1046	u64 header;
1047		1047
1048	wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);	1048	wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1049	if (wqe)	1049	if (!wqe)
1050	return I40IW_ERR_RING_FULL;	1050	return I40IW_ERR_RING_FULL;
1051		1051
1052	set_64bit_val(wqe, 32, feat_mem->pa);	1052	set_64bit_val(wqe, 32, feat_mem->pa);

drivers/infiniband/hw/mlx4/main.c+2−1

@@ -1499,8 +1499,9 @@ static int __mlx4_ib_create_default_rules( · 1498 unmodified lines
1499	int i;	1499	int i;
1500		1500
1501	for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {	1501	for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
		1502	union ib_flow_spec ib_spec = {};
1502	int ret;	1503	int ret;
1503	union ib_flow_spec ib_spec;	1504
1504	switch (pdefault_rules->rules_create_list[i]) {	1505	switch (pdefault_rules->rules_create_list[i]) {
1505	case 0:	1506	case 0:
1506	/* no rule */	1507	/* no rule */

drivers/infiniband/hw/mlx5/qp.c+3−1

@@ -5558,7 +5558,9 @@ static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, · 5557 unmodified lines
5558	rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f);	5558	rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f);
5559	rdma_ah_set_static_rate(ah_attr,	5559	rdma_ah_set_static_rate(ah_attr,
5560	path->static_rate ? path->static_rate - 5 : 0);	5560	path->static_rate ? path->static_rate - 5 : 0);
5561	if (path->grh_mlid & (1 << 7)) {	5561
		5562	if (path->grh_mlid & (1 << 7) \|\|
		5563	ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE) {
5562	u32 tc_fl = be32_to_cpu(path->tclass_flowlabel);	5564	u32 tc_fl = be32_to_cpu(path->tclass_flowlabel);
5563		5565
5564	rdma_ah_set_grh(ah_attr, NULL,	5566	rdma_ah_set_grh(ah_attr, NULL,

drivers/infiniband/sw/rdmavt/cq.c+2−2

@@ -248,8 +248,8 @@ int rvt_create_cq(struct ib_cq ibcq, const struct ib_cq_init_attr attr, · 247 unmodified lines
248	*/	248	*/
249	if (udata && udata->outlen >= sizeof(__u64)) {	249	if (udata && udata->outlen >= sizeof(__u64)) {
250	cq->ip = rvt_create_mmap_info(rdi, sz, udata, u_wc);	250	cq->ip = rvt_create_mmap_info(rdi, sz, udata, u_wc);
251	if (!cq->ip) {	251	if (IS_ERR(cq->ip)) {
252	err = -ENOMEM;	252	err = PTR_ERR(cq->ip);
253	goto bail_wc;	253	goto bail_wc;
254	}	254	}
255		255

drivers/infiniband/sw/rdmavt/mmap.c+2−2

@@ -154,7 +154,7 @@ done: · 153 unmodified lines
154	* @udata: user data (must be valid!)	154	* @udata: user data (must be valid!)
155	* @obj: opaque pointer to a cq, wq etc	155	* @obj: opaque pointer to a cq, wq etc
156	*	156	*
157	* Return: rvt_mmap struct on success	157	* Return: rvt_mmap struct on success, ERR_PTR on failure
158	*/	158	*/
159	struct rvt_mmap_info rvt_create_mmap_info(struct rvt_dev_info rdi, u32 size,	159	struct rvt_mmap_info rvt_create_mmap_info(struct rvt_dev_info rdi, u32 size,
160	struct ib_udata udata, void obj)	160	struct ib_udata udata, void obj)
@@ -166,7 +166,7 @@ struct rvt_mmap_info rvt_create_mmap_info(struct rvt_dev_info rdi, u32 size, · 5 unmodified lines
166		166
167	ip = kmalloc_node(sizeof(*ip), GFP_KERNEL, rdi->dparms.node);	167	ip = kmalloc_node(sizeof(*ip), GFP_KERNEL, rdi->dparms.node);
168	if (!ip)	168	if (!ip)
169	return ip;	169	return ERR_PTR(-ENOMEM);
170		170
171	size = PAGE_ALIGN(size);	171	size = PAGE_ALIGN(size);
172		172

drivers/infiniband/sw/rdmavt/qp.c+2−2

@@ -1244,8 +1244,8 @@ struct ib_qp rvt_create_qp(struct ib_pd ibpd, · 1243 unmodified lines
1244		1244
1245	qp->ip = rvt_create_mmap_info(rdi, s, udata,	1245	qp->ip = rvt_create_mmap_info(rdi, s, udata,
1246	qp->r_rq.wq);	1246	qp->r_rq.wq);
1247	if (!qp->ip) {	1247	if (IS_ERR(qp->ip)) {
1248	ret = ERR_PTR(-ENOMEM);	1248	ret = ERR_CAST(qp->ip);
1249	goto bail_qpn;	1249	goto bail_qpn;
1250	}	1250	}
1251		1251

drivers/infiniband/sw/rdmavt/srq.c+2−2

@@ -111,8 +111,8 @@ int rvt_create_srq(struct ib_srq ibsrq, struct ib_srq_init_attr srq_init_attr, · 110 unmodified lines
111	u32 s = sizeof(struct rvt_rwq) + srq->rq.size * sz;	111	u32 s = sizeof(struct rvt_rwq) + srq->rq.size * sz;
112		112
113	srq->ip = rvt_create_mmap_info(dev, s, udata, srq->rq.wq);	113	srq->ip = rvt_create_mmap_info(dev, s, udata, srq->rq.wq);
114	if (!srq->ip) {	114	if (IS_ERR(srq->ip)) {
115	ret = -ENOMEM;	115	ret = PTR_ERR(srq->ip);
116	goto bail_wq;	116	goto bail_wq;
117	}	117	}
118		118

drivers/infiniband/sw/siw/siw_qp_tx.c+11−4

 {
 	struct ib_mr *base_mr = (struct ib_mr *)(uintptr_t)sqe->base_mr;
 	struct siw_device *sdev = to_siw_dev(pd->device);
-	struct siw_mem *mem = siw_mem_id2obj(sdev, sqe->rkey  >> 8);
+	struct siw_mem *mem;
 	int rv = 0;
 	siw_dbg_pd(pd, "STag 0x%08x\n", sqe->rkey);
-	if (unlikely(!mem || !base_mr)) {
+	if (unlikely(!base_mr)) {
 		pr_warn("siw: fastreg: STag 0x%08x unknown\n", sqe->rkey);
 		return -EINVAL;
 	}
 	if (unlikely(base_mr->rkey >> 8 != sqe->rkey  >> 8)) {
 		pr_warn("siw: fastreg: STag 0x%08x: bad MR\n", sqe->rkey);
-		rv = -EINVAL;
+		return -EINVAL;
-		goto out;
 	}
+	mem = siw_mem_id2obj(sdev, sqe->rkey  >> 8);
+	if (unlikely(!mem)) {
+		pr_warn("siw: fastreg: STag 0x%08x unknown\n", sqe->rkey);
+		return -EINVAL;
+	}
 	if (unlikely(mem->pd != pd)) {
 		pr_warn("siw: fastreg: PD mismatch\n");
 		rv = -EINVAL;

drivers/interconnect/qcom/bcm-voter.c+3−2

 	if (!cmd)
 		return;
+	memset(cmd, 0, sizeof(*cmd));
 	if (vote_x == 0 && vote_y == 0)
 		valid = false;
 	 * Set the wait for completion flag on command that need to be completed
 	 * before the next command.
 	 */
-	if (commit)
+	cmd->wait = commit;
-		cmd->wait = true;
 }
 static void tcs_list_gen(struct list_head *bcm_list, int bucket,

drivers/interconnect/qcom/osm-l3.c+2−2

@@ -78,7 +78,7 @@ static struct qcom_icc_node *sdm845_osm_l3_nodes[] = { · 77 unmodified lines
78	[SLAVE_OSM_L3] = &sdm845_osm_l3,	78	[SLAVE_OSM_L3] = &sdm845_osm_l3,
79	};	79	};
80		80
81	const static struct qcom_icc_desc sdm845_icc_osm_l3 = {	81	static const struct qcom_icc_desc sdm845_icc_osm_l3 = {
82	.nodes = sdm845_osm_l3_nodes,	82	.nodes = sdm845_osm_l3_nodes,
83	.num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes),	83	.num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes),
84	};	84	};
@@ -91,7 +91,7 @@ static struct qcom_icc_node *sc7180_osm_l3_nodes[] = { · 6 unmodified lines
91	[SLAVE_OSM_L3] = &sc7180_osm_l3,	91	[SLAVE_OSM_L3] = &sc7180_osm_l3,
92	};	92	};
93		93
94	const static struct qcom_icc_desc sc7180_icc_osm_l3 = {	94	static const struct qcom_icc_desc sc7180_icc_osm_l3 = {
95	.nodes = sc7180_osm_l3_nodes,	95	.nodes = sc7180_osm_l3_nodes,
96	.num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes),	96	.num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes),
97	};	97	};

drivers/interconnect/qcom/sdm845.c+8−8

@@ -192,7 +192,7 @@ static struct qcom_icc_node *aggre1_noc_nodes[] = { · 191 unmodified lines
192	[SLAVE_ANOC_PCIE_A1NOC_SNOC] = &qns_pcie_a1noc_snoc,	192	[SLAVE_ANOC_PCIE_A1NOC_SNOC] = &qns_pcie_a1noc_snoc,
193	};	193	};
194		194
195	const static struct qcom_icc_desc sdm845_aggre1_noc = {	195	static const struct qcom_icc_desc sdm845_aggre1_noc = {
196	.nodes = aggre1_noc_nodes,	196	.nodes = aggre1_noc_nodes,
197	.num_nodes = ARRAY_SIZE(aggre1_noc_nodes),	197	.num_nodes = ARRAY_SIZE(aggre1_noc_nodes),
198	.bcms = aggre1_noc_bcms,	198	.bcms = aggre1_noc_bcms,
@@ -220,7 +220,7 @@ static struct qcom_icc_node *aggre2_noc_nodes[] = { · 21 unmodified lines
220	[SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,	220	[SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,
221	};	221	};
222		222
223	const static struct qcom_icc_desc sdm845_aggre2_noc = {	223	static const struct qcom_icc_desc sdm845_aggre2_noc = {
224	.nodes = aggre2_noc_nodes,	224	.nodes = aggre2_noc_nodes,
225	.num_nodes = ARRAY_SIZE(aggre2_noc_nodes),	225	.num_nodes = ARRAY_SIZE(aggre2_noc_nodes),
226	.bcms = aggre2_noc_bcms,	226	.bcms = aggre2_noc_bcms,
@@ -281,7 +281,7 @@ static struct qcom_icc_node *config_noc_nodes[] = { · 54 unmodified lines
281	[SLAVE_SERVICE_CNOC] = &srvc_cnoc,	281	[SLAVE_SERVICE_CNOC] = &srvc_cnoc,
282	};	282	};
283		283
284	const static struct qcom_icc_desc sdm845_config_noc = {	284	static const struct qcom_icc_desc sdm845_config_noc = {
285	.nodes = config_noc_nodes,	285	.nodes = config_noc_nodes,
286	.num_nodes = ARRAY_SIZE(config_noc_nodes),	286	.num_nodes = ARRAY_SIZE(config_noc_nodes),
287	.bcms = config_noc_bcms,	287	.bcms = config_noc_bcms,
@@ -297,7 +297,7 @@ static struct qcom_icc_node *dc_noc_nodes[] = { · 9 unmodified lines
297	[SLAVE_MEM_NOC_CFG] = &qhs_memnoc,	297	[SLAVE_MEM_NOC_CFG] = &qhs_memnoc,
298	};	298	};
299		299
300	const static struct qcom_icc_desc sdm845_dc_noc = {	300	static const struct qcom_icc_desc sdm845_dc_noc = {
301	.nodes = dc_noc_nodes,	301	.nodes = dc_noc_nodes,
302	.num_nodes = ARRAY_SIZE(dc_noc_nodes),	302	.num_nodes = ARRAY_SIZE(dc_noc_nodes),
303	.bcms = dc_noc_bcms,	303	.bcms = dc_noc_bcms,
@@ -315,7 +315,7 @@ static struct qcom_icc_node *gladiator_noc_nodes[] = { · 11 unmodified lines
315	[SLAVE_SERVICE_GNOC] = &srvc_gnoc,	315	[SLAVE_SERVICE_GNOC] = &srvc_gnoc,
316	};	316	};
317		317
318	const static struct qcom_icc_desc sdm845_gladiator_noc = {	318	static const struct qcom_icc_desc sdm845_gladiator_noc = {
319	.nodes = gladiator_noc_nodes,	319	.nodes = gladiator_noc_nodes,
320	.num_nodes = ARRAY_SIZE(gladiator_noc_nodes),	320	.num_nodes = ARRAY_SIZE(gladiator_noc_nodes),
321	.bcms = gladiator_noc_bcms,	321	.bcms = gladiator_noc_bcms,
@@ -350,7 +350,7 @@ static struct qcom_icc_node *mem_noc_nodes[] = { · 28 unmodified lines
350	[SLAVE_EBI1] = &ebi,	350	[SLAVE_EBI1] = &ebi,
351	};	351	};
352		352
353	const static struct qcom_icc_desc sdm845_mem_noc = {	353	static const struct qcom_icc_desc sdm845_mem_noc = {
354	.nodes = mem_noc_nodes,	354	.nodes = mem_noc_nodes,
355	.num_nodes = ARRAY_SIZE(mem_noc_nodes),	355	.num_nodes = ARRAY_SIZE(mem_noc_nodes),
356	.bcms = mem_noc_bcms,	356	.bcms = mem_noc_bcms,
@@ -384,7 +384,7 @@ static struct qcom_icc_node *mmss_noc_nodes[] = { · 27 unmodified lines
384	[SLAVE_CAMNOC_UNCOMP] = &qns_camnoc_uncomp,	384	[SLAVE_CAMNOC_UNCOMP] = &qns_camnoc_uncomp,
385	};	385	};
386		386
387	const static struct qcom_icc_desc sdm845_mmss_noc = {	387	static const struct qcom_icc_desc sdm845_mmss_noc = {
388	.nodes = mmss_noc_nodes,	388	.nodes = mmss_noc_nodes,
389	.num_nodes = ARRAY_SIZE(mmss_noc_nodes),	389	.num_nodes = ARRAY_SIZE(mmss_noc_nodes),
390	.bcms = mmss_noc_bcms,	390	.bcms = mmss_noc_bcms,
@@ -430,7 +430,7 @@ static struct qcom_icc_node *system_noc_nodes[] = { · 39 unmodified lines
430	[SLAVE_TCU] = &xs_sys_tcu_cfg,	430	[SLAVE_TCU] = &xs_sys_tcu_cfg,
431	};	431	};
432		432
433	const static struct qcom_icc_desc sdm845_system_noc = {	433	static const struct qcom_icc_desc sdm845_system_noc = {
434	.nodes = system_noc_nodes,	434	.nodes = system_noc_nodes,
435	.num_nodes = ARRAY_SIZE(system_noc_nodes),	435	.num_nodes = ARRAY_SIZE(system_noc_nodes),
436	.bcms = system_noc_bcms,	436	.bcms = system_noc_bcms,

drivers/iommu/Kconfig+2−2

@@ -362,7 +362,7 @@ config IPMMU_VMSA · 361 unmodified lines
362		362
363	config SPAPR_TCE_IOMMU	363	config SPAPR_TCE_IOMMU
364	bool "sPAPR TCE IOMMU Support"	364	bool "sPAPR TCE IOMMU Support"
365	depends on PPC_POWERNV \|\| PPC_PSERIES \|\| (PPC && COMPILE_TEST)	365	depends on PPC_POWERNV \|\| PPC_PSERIES
366	select IOMMU_API	366	select IOMMU_API
367	help	367	help
368	Enables bits of IOMMU API required by VFIO. The iommu_ops	368	Enables bits of IOMMU API required by VFIO. The iommu_ops
@@ -457,7 +457,7 @@ config S390_AP_IOMMU · 88 unmodified lines
457		457
458	config MTK_IOMMU	458	config MTK_IOMMU
459	bool "MTK IOMMU Support"	459	bool "MTK IOMMU Support"
460	depends on ARM \|\| ARM64 \|\| COMPILE_TEST	460	depends on HAS_DMA
461	depends on ARCH_MEDIATEK \|\| COMPILE_TEST	461	depends on ARCH_MEDIATEK \|\| COMPILE_TEST
462	select ARM_DMA_USE_IOMMU	462	select ARM_DMA_USE_IOMMU
463	select IOMMU_API	463	select IOMMU_API

drivers/iommu/amd_iommu.c+154−44

@@ -101,6 +101,8 @@ struct kmem_cache *amd_iommu_irq_cache; · 100 unmodified lines
101	static void update_domain(struct protection_domain *domain);	101	static void update_domain(struct protection_domain *domain);
102	static int protection_domain_init(struct protection_domain *domain);	102	static int protection_domain_init(struct protection_domain *domain);
103	static void detach_device(struct device *dev);	103	static void detach_device(struct device *dev);
		104	static void update_and_flush_device_table(struct protection_domain *domain,
		105	struct domain_pgtable *pgtable);
104		106
105	/****************************************************************************	107	/****************************************************************************
106	*	108	*
@@ -151,6 +153,26 @@ static struct protection_domain to_pdomain(struct iommu_domain dom) · 44 unmodified lines
151	return container_of(dom, struct protection_domain, domain);	153	return container_of(dom, struct protection_domain, domain);
152	}	154	}
153		155
		156	static void amd_iommu_domain_get_pgtable(struct protection_domain *domain,
		157	struct domain_pgtable *pgtable)
		158	{
		159	u64 pt_root = atomic64_read(&domain->pt_root);
		160
		161	pgtable->root = (u64 *)(pt_root & PAGE_MASK);
		162	pgtable->mode = pt_root & 7; /* lowest 3 bits encode pgtable mode */
		163	}
		164
		165	static u64 amd_iommu_domain_encode_pgtable(u64 *root, int mode)
		166	{
		167	u64 pt_root;
		168
		169	/* lowest 3 bits encode pgtable mode */
		170	pt_root = mode & 7;
		171	pt_root \|= (u64)root;
		172
		173	return pt_root;
		174	}
		175
154	static struct iommu_dev_data *alloc_dev_data(u16 devid)	176	static struct iommu_dev_data *alloc_dev_data(u16 devid)
155	{	177	{
156	struct iommu_dev_data *dev_data;	178	struct iommu_dev_data *dev_data;
@@ -1397,13 +1419,18 @@ static struct page *free_sub_pt(unsigned long root, int mode, · 1240 unmodified lines
1397		1419
1398	static void free_pagetable(struct protection_domain *domain)	1420	static void free_pagetable(struct protection_domain *domain)
1399	{	1421	{
1400	unsigned long root = (unsigned long)domain->pt_root;	1422	struct domain_pgtable pgtable;
1401	struct page *freelist = NULL;	1423	struct page *freelist = NULL;
		1424	unsigned long root;
1402		1425
1403	BUG_ON(domain->mode < PAGE_MODE_NONE \|\|	1426	amd_iommu_domain_get_pgtable(domain, &pgtable);
1404	domain->mode > PAGE_MODE_6_LEVEL);	1427	atomic64_set(&domain->pt_root, 0);
1405		1428
1406	freelist = free_sub_pt(root, domain->mode, freelist);	1429	BUG_ON(pgtable.mode < PAGE_MODE_NONE \|\|
		1430	pgtable.mode > PAGE_MODE_6_LEVEL);
		1431
		1432	root = (unsigned long)pgtable.root;
		1433	freelist = free_sub_pt(root, pgtable.mode, freelist);
1407		1434
1408	free_page_list(freelist);	1435	free_page_list(freelist);
1409	}	1436	}
@@ -1417,24 +1444,39 @@ static bool increase_address_space(struct protection_domain *domain, · 7 unmodified lines
1417	unsigned long address,	1444	unsigned long address,
1418	gfp_t gfp)	1445	gfp_t gfp)
1419	{	1446	{
		1447	struct domain_pgtable pgtable;
1420	unsigned long flags;	1448	unsigned long flags;
1421	bool ret = false;	1449	bool ret = true;
1422	u64 *pte;	1450	u64 *pte, root;
1423		1451
1424	spin_lock_irqsave(&domain->lock, flags);	1452	spin_lock_irqsave(&domain->lock, flags);
1425		1453
1426	if (address <= PM_LEVEL_SIZE(domain->mode) \|\|	1454	amd_iommu_domain_get_pgtable(domain, &pgtable);
1427	WARN_ON_ONCE(domain->mode == PAGE_MODE_6_LEVEL))	1455
		1456	if (address <= PM_LEVEL_SIZE(pgtable.mode))
		1457	goto out;
		1458
		1459	ret = false;
		1460	if (WARN_ON_ONCE(pgtable.mode == PAGE_MODE_6_LEVEL))
1428	goto out;	1461	goto out;
1429		1462
1430	pte = (void *)get_zeroed_page(gfp);	1463	pte = (void *)get_zeroed_page(gfp);
1431	if (!pte)	1464	if (!pte)
1432	goto out;	1465	goto out;
1433		1466
1434	*pte = PM_LEVEL_PDE(domain->mode,	1467	*pte = PM_LEVEL_PDE(pgtable.mode, iommu_virt_to_phys(pgtable.root));
1435	iommu_virt_to_phys(domain->pt_root));	1468
1436	domain->pt_root = pte;	1469	pgtable.root = pte;
1437	domain->mode += 1;	1470	pgtable.mode += 1;
		1471	update_and_flush_device_table(domain, &pgtable);
		1472	domain_flush_complete(domain);
		1473
		1474	/*
		1475	* Device Table needs to be updated and flushed before the new root can
		1476	* be published.
		1477	*/
		1478	root = amd_iommu_domain_encode_pgtable(pte, pgtable.mode);
		1479	atomic64_set(&domain->pt_root, root);
1438		1480
1439	ret = true;	1481	ret = true;
1440		1482
@@ -1451,16 +1493,29 @@ static u64 alloc_pte(struct protection_domain domain, · 10 unmodified lines
1451	gfp_t gfp,	1493	gfp_t gfp,
1452	bool *updated)	1494	bool *updated)
1453	{	1495	{
		1496	struct domain_pgtable pgtable;
1454	int level, end_lvl;	1497	int level, end_lvl;
1455	u64 pte, page;	1498	u64 pte, page;
1456		1499
1457	BUG_ON(!is_power_of_2(page_size));	1500	BUG_ON(!is_power_of_2(page_size));
1458		1501
1459	while (address > PM_LEVEL_SIZE(domain->mode))	1502	amd_iommu_domain_get_pgtable(domain, &pgtable);
1460	updated = increase_address_space(domain, address, gfp) \|\| updated;	1503
		1504	while (address > PM_LEVEL_SIZE(pgtable.mode)) {
		1505	/*
		1506	* Return an error if there is no memory to update the
		1507	* page-table.
		1508	*/
		1509	if (!increase_address_space(domain, address, gfp))
		1510	return NULL;
		1511
		1512	/* Read new values to check if update was successful */
		1513	amd_iommu_domain_get_pgtable(domain, &pgtable);
		1514	}
		1515
1461		1516
1462	level = domain->mode - 1;	1517	level = pgtable.mode - 1;
1463	pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];	1518	pte = &pgtable.root[PM_LEVEL_INDEX(level, address)];
1464	address = PAGE_SIZE_ALIGN(address, page_size);	1519	address = PAGE_SIZE_ALIGN(address, page_size);
1465	end_lvl = PAGE_SIZE_LEVEL(page_size);	1520	end_lvl = PAGE_SIZE_LEVEL(page_size);
1466		1521
@@ -1536,16 +1591,19 @@ static u64 fetch_pte(struct protection_domain domain, · 69 unmodified lines
1536	unsigned long address,	1591	unsigned long address,
1537	unsigned long *page_size)	1592	unsigned long *page_size)
1538	{	1593	{
		1594	struct domain_pgtable pgtable;
1539	int level;	1595	int level;
1540	u64 *pte;	1596	u64 *pte;
1541		1597
1542	*page_size = 0;	1598	*page_size = 0;
1543		1599
1544	if (address > PM_LEVEL_SIZE(domain->mode))	1600	amd_iommu_domain_get_pgtable(domain, &pgtable);
		1601
		1602	if (address > PM_LEVEL_SIZE(pgtable.mode))
1545	return NULL;	1603	return NULL;
1546		1604
1547	level = domain->mode - 1;	1605	level = pgtable.mode - 1;
1548	pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];	1606	pte = &pgtable.root[PM_LEVEL_INDEX(level, address)];
1549	*page_size = PTE_LEVEL_PAGE_SIZE(level);	1607	*page_size = PTE_LEVEL_PAGE_SIZE(level);
1550		1608
1551	while (level > 0) {	1609	while (level > 0) {
@@ -1660,7 +1718,13 @@ out: · 108 unmodified lines
1660	unsigned long flags;	1718	unsigned long flags;
1661		1719
1662	spin_lock_irqsave(&dom->lock, flags);	1720	spin_lock_irqsave(&dom->lock, flags);
1663	update_domain(dom);	1721	/*
		1722	* Flush domain TLB(s) and wait for completion. Any Device-Table
		1723	* Updates and flushing already happened in
		1724	* increase_address_space().
		1725	*/
		1726	domain_flush_tlb_pde(dom);
		1727	domain_flush_complete(dom);
1664	spin_unlock_irqrestore(&dom->lock, flags);	1728	spin_unlock_irqrestore(&dom->lock, flags);
1665	}	1729	}
1666		1730
@@ -1806,6 +1870,7 @@ static void dma_ops_domain_free(struct protection_domain *domain) · 139 unmodified lines
1806	static struct protection_domain *dma_ops_domain_alloc(void)	1870	static struct protection_domain *dma_ops_domain_alloc(void)
1807	{	1871	{
1808	struct protection_domain *domain;	1872	struct protection_domain *domain;
		1873	u64 *pt_root, root;
1809		1874
1810	domain = kzalloc(sizeof(struct protection_domain), GFP_KERNEL);	1875	domain = kzalloc(sizeof(struct protection_domain), GFP_KERNEL);
1811	if (!domain)	1876	if (!domain)
@@ -1814,12 +1879,14 @@ static struct protection_domain *dma_ops_domain_alloc(void) · 2 unmodified lines
1814	if (protection_domain_init(domain))	1879	if (protection_domain_init(domain))
1815	goto free_domain;	1880	goto free_domain;
1816		1881
1817	domain->mode = PAGE_MODE_3_LEVEL;	1882	pt_root = (void *)get_zeroed_page(GFP_KERNEL);
1818	domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL);	1883	if (!pt_root)
1819	domain->flags = PD_DMA_OPS_MASK;
1820	if (!domain->pt_root)
1821	goto free_domain;	1884	goto free_domain;
1822		1885
		1886	root = amd_iommu_domain_encode_pgtable(pt_root, PAGE_MODE_3_LEVEL);
		1887	atomic64_set(&domain->pt_root, root);
		1888	domain->flags = PD_DMA_OPS_MASK;
		1889
1823	if (iommu_get_dma_cookie(&domain->domain) == -ENOMEM)	1890	if (iommu_get_dma_cookie(&domain->domain) == -ENOMEM)
1824	goto free_domain;	1891	goto free_domain;
1825		1892
@@ -1841,16 +1908,17 @@ static bool dma_ops_domain(struct protection_domain *domain) · 15 unmodified lines
1841	}	1908	}
1842		1909
1843	static void set_dte_entry(u16 devid, struct protection_domain *domain,	1910	static void set_dte_entry(u16 devid, struct protection_domain *domain,
		1911	struct domain_pgtable *pgtable,
1844	bool ats, bool ppr)	1912	bool ats, bool ppr)
1845	{	1913	{
1846	u64 pte_root = 0;	1914	u64 pte_root = 0;
1847	u64 flags = 0;	1915	u64 flags = 0;
1848	u32 old_domid;	1916	u32 old_domid;
1849		1917
1850	if (domain->mode != PAGE_MODE_NONE)	1918	if (pgtable->mode != PAGE_MODE_NONE)
1851	pte_root = iommu_virt_to_phys(domain->pt_root);	1919	pte_root = iommu_virt_to_phys(pgtable->root);
1852		1920
1853	pte_root \|= (domain->mode & DEV_ENTRY_MODE_MASK)	1921	pte_root \|= (pgtable->mode & DEV_ENTRY_MODE_MASK)
1854	<< DEV_ENTRY_MODE_SHIFT;	1922	<< DEV_ENTRY_MODE_SHIFT;
1855	pte_root \|= DTE_FLAG_IR \| DTE_FLAG_IW \| DTE_FLAG_V \| DTE_FLAG_TV;	1923	pte_root \|= DTE_FLAG_IR \| DTE_FLAG_IW \| DTE_FLAG_V \| DTE_FLAG_TV;
1856		1924
@@ -1923,6 +1991,7 @@ static void clear_dte_entry(u16 devid) · 66 unmodified lines
1923	static void do_attach(struct iommu_dev_data *dev_data,	1991	static void do_attach(struct iommu_dev_data *dev_data,
1924	struct protection_domain *domain)	1992	struct protection_domain *domain)
1925	{	1993	{
		1994	struct domain_pgtable pgtable;
1926	struct amd_iommu *iommu;	1995	struct amd_iommu *iommu;
1927	bool ats;	1996	bool ats;
1928		1997
@@ -1938,7 +2007,9 @@ static void do_attach(struct iommu_dev_data *dev_data, · 9 unmodified lines
1938	domain->dev_cnt += 1;	2007	domain->dev_cnt += 1;
1939		2008
1940	/* Update device table */	2009	/* Update device table */
1941	set_dte_entry(dev_data->devid, domain, ats, dev_data->iommu_v2);	2010	amd_iommu_domain_get_pgtable(domain, &pgtable);
		2011	set_dte_entry(dev_data->devid, domain, &pgtable,
		2012	ats, dev_data->iommu_v2);
1942	clone_aliases(dev_data->pdev);	2013	clone_aliases(dev_data->pdev);
1943		2014
1944	device_flush_dte(dev_data);	2015	device_flush_dte(dev_data);
@@ -2249,23 +2320,36 @@ static int amd_iommu_domain_get_attr(struct iommu_domain *domain, · 304 unmodified lines
2249	*	2320	*
2250	*****************************************************************************/	2321	*****************************************************************************/
2251		2322
2252	static void update_device_table(struct protection_domain *domain)	2323	static void update_device_table(struct protection_domain *domain,
		2324	struct domain_pgtable *pgtable)
2253	{	2325	{
2254	struct iommu_dev_data *dev_data;	2326	struct iommu_dev_data *dev_data;
2255		2327
2256	list_for_each_entry(dev_data, &domain->dev_list, list) {	2328	list_for_each_entry(dev_data, &domain->dev_list, list) {
2257	set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled,	2329	set_dte_entry(dev_data->devid, domain, pgtable,
2258	dev_data->iommu_v2);	2330	dev_data->ats.enabled, dev_data->iommu_v2);
2259	clone_aliases(dev_data->pdev);	2331	clone_aliases(dev_data->pdev);
2260	}	2332	}
2261	}	2333	}
2262		2334
		2335	static void update_and_flush_device_table(struct protection_domain *domain,
		2336	struct domain_pgtable *pgtable)
		2337	{
		2338	update_device_table(domain, pgtable);
		2339	domain_flush_devices(domain);
		2340	}
		2341
2263	static void update_domain(struct protection_domain *domain)	2342	static void update_domain(struct protection_domain *domain)
2264	{	2343	{
2265	update_device_table(domain);	2344	struct domain_pgtable pgtable;
2266		2345
2267	domain_flush_devices(domain);	2346	/* Update device table */
		2347	amd_iommu_domain_get_pgtable(domain, &pgtable);
		2348	update_and_flush_device_table(domain, &pgtable);
		2349
		2350	/* Flush domain TLB(s) and wait for completion */
2268	domain_flush_tlb_pde(domain);	2351	domain_flush_tlb_pde(domain);
		2352	domain_flush_complete(domain);
2269	}	2353	}
2270		2354
2271	int __init amd_iommu_init_api(void)	2355	int __init amd_iommu_init_api(void)
@@ -2375,6 +2459,7 @@ out_err: · 103 unmodified lines
2375	static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)	2459	static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
2376	{	2460	{
2377	struct protection_domain *pdomain;	2461	struct protection_domain *pdomain;
		2462	u64 *pt_root, root;
2378		2463
2379	switch (type) {	2464	switch (type) {
2380	case IOMMU_DOMAIN_UNMANAGED:	2465	case IOMMU_DOMAIN_UNMANAGED:
@@ -2382,13 +2467,15 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) · 1 unmodified line
2382	if (!pdomain)	2467	if (!pdomain)
2383	return NULL;	2468	return NULL;
2384		2469
2385	pdomain->mode = PAGE_MODE_3_LEVEL;	2470	pt_root = (void *)get_zeroed_page(GFP_KERNEL);
2386	pdomain->pt_root = (void *)get_zeroed_page(GFP_KERNEL);	2471	if (!pt_root) {
2387	if (!pdomain->pt_root) {
2388	protection_domain_free(pdomain);	2472	protection_domain_free(pdomain);
2389	return NULL;	2473	return NULL;
2390	}	2474	}
2391		2475
		2476	root = amd_iommu_domain_encode_pgtable(pt_root, PAGE_MODE_3_LEVEL);
		2477	atomic64_set(&pdomain->pt_root, root);
		2478
2392	pdomain->domain.geometry.aperture_start = 0;	2479	pdomain->domain.geometry.aperture_start = 0;
2393	pdomain->domain.geometry.aperture_end = ~0ULL;	2480	pdomain->domain.geometry.aperture_end = ~0ULL;
2394	pdomain->domain.geometry.force_aperture = true;	2481	pdomain->domain.geometry.force_aperture = true;
@@ -2406,7 +2493,7 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) · 11 unmodified lines
2406	if (!pdomain)	2493	if (!pdomain)
2407	return NULL;	2494	return NULL;
2408		2495
2409	pdomain->mode = PAGE_MODE_NONE;	2496	atomic64_set(&pdomain->pt_root, PAGE_MODE_NONE);
2410	break;	2497	break;
2411	default:	2498	default:
2412	return NULL;	2499	return NULL;
@@ -2418,6 +2505,7 @@ static struct iommu_domain *amd_iommu_domain_alloc(unsigned type) · 5 unmodified lines
2418	static void amd_iommu_domain_free(struct iommu_domain *dom)	2505	static void amd_iommu_domain_free(struct iommu_domain *dom)
2419	{	2506	{
2420	struct protection_domain *domain;	2507	struct protection_domain *domain;
		2508	struct domain_pgtable pgtable;
2421		2509
2422	domain = to_pdomain(dom);	2510	domain = to_pdomain(dom);
2423		2511
@@ -2435,7 +2523,9 @@ static void amd_iommu_domain_free(struct iommu_domain *dom) · 11 unmodified lines
2435	dma_ops_domain_free(domain);	2523	dma_ops_domain_free(domain);
2436	break;	2524	break;
2437	default:	2525	default:
2438	if (domain->mode != PAGE_MODE_NONE)	2526	amd_iommu_domain_get_pgtable(domain, &pgtable);
		2527
		2528	if (pgtable.mode != PAGE_MODE_NONE)
2439	free_pagetable(domain);	2529	free_pagetable(domain);
2440		2530
2441	if (domain->flags & PD_IOMMUV2_MASK)	2531	if (domain->flags & PD_IOMMUV2_MASK)
@@ -2518,10 +2608,12 @@ static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, · 76 unmodified lines
2518	gfp_t gfp)	2608	gfp_t gfp)
2519	{	2609	{
2520	struct protection_domain *domain = to_pdomain(dom);	2610	struct protection_domain *domain = to_pdomain(dom);
		2611	struct domain_pgtable pgtable;
2521	int prot = 0;	2612	int prot = 0;
2522	int ret;	2613	int ret;
2523		2614
2524	if (domain->mode == PAGE_MODE_NONE)	2615	amd_iommu_domain_get_pgtable(domain, &pgtable);
		2616	if (pgtable.mode == PAGE_MODE_NONE)
2525	return -EINVAL;	2617	return -EINVAL;
2526		2618
2527	if (iommu_prot & IOMMU_READ)	2619	if (iommu_prot & IOMMU_READ)
@@ -2541,8 +2633,10 @@ static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, · 13 unmodified lines
2541	struct iommu_iotlb_gather *gather)	2633	struct iommu_iotlb_gather *gather)
2542	{	2634	{
2543	struct protection_domain *domain = to_pdomain(dom);	2635	struct protection_domain *domain = to_pdomain(dom);
		2636	struct domain_pgtable pgtable;
2544		2637
2545	if (domain->mode == PAGE_MODE_NONE)	2638	amd_iommu_domain_get_pgtable(domain, &pgtable);
		2639	if (pgtable.mode == PAGE_MODE_NONE)
2546	return 0;	2640	return 0;
2547		2641
2548	return iommu_unmap_page(domain, iova, page_size);	2642	return iommu_unmap_page(domain, iova, page_size);
@@ -2553,9 +2647,11 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, · 4 unmodified lines
2553	{	2647	{
2554	struct protection_domain *domain = to_pdomain(dom);	2648	struct protection_domain *domain = to_pdomain(dom);
2555	unsigned long offset_mask, pte_pgsize;	2649	unsigned long offset_mask, pte_pgsize;
		2650	struct domain_pgtable pgtable;
2556	u64 *pte, __pte;	2651	u64 *pte, __pte;
2557		2652
2558	if (domain->mode == PAGE_MODE_NONE)	2653	amd_iommu_domain_get_pgtable(domain, &pgtable);
		2654	if (pgtable.mode == PAGE_MODE_NONE)
2559	return iova;	2655	return iova;
2560		2656
2561	pte = fetch_pte(domain, iova, &pte_pgsize);	2657	pte = fetch_pte(domain, iova, &pte_pgsize);
@@ -2708,16 +2804,26 @@ EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier); · 146 unmodified lines
2708	void amd_iommu_domain_direct_map(struct iommu_domain *dom)	2804	void amd_iommu_domain_direct_map(struct iommu_domain *dom)
2709	{	2805	{
2710	struct protection_domain *domain = to_pdomain(dom);	2806	struct protection_domain *domain = to_pdomain(dom);
		2807	struct domain_pgtable pgtable;
2711	unsigned long flags;	2808	unsigned long flags;
		2809	u64 pt_root;
2712		2810
2713	spin_lock_irqsave(&domain->lock, flags);	2811	spin_lock_irqsave(&domain->lock, flags);
2714		2812
		2813	/* First save pgtable configuration*/
		2814	amd_iommu_domain_get_pgtable(domain, &pgtable);
		2815
2715	/* Update data structure */	2816	/* Update data structure */
2716	domain->mode = PAGE_MODE_NONE;	2817	pt_root = amd_iommu_domain_encode_pgtable(NULL, PAGE_MODE_NONE);
		2818	atomic64_set(&domain->pt_root, pt_root);
2717		2819
2718	/* Make changes visible to IOMMUs */	2820	/* Make changes visible to IOMMUs */
2719	update_domain(domain);	2821	update_domain(domain);
2720		2822
		2823	/* Restore old pgtable in domain->ptroot to free page-table */
		2824	pt_root = amd_iommu_domain_encode_pgtable(pgtable.root, pgtable.mode);
		2825	atomic64_set(&domain->pt_root, pt_root);
		2826
2721	/* Page-table is not visible to IOMMU anymore, so free it */	2827	/* Page-table is not visible to IOMMU anymore, so free it */
2722	free_pagetable(domain);	2828	free_pagetable(domain);
2723		2829
@@ -2908,9 +3014,11 @@ static u64 __get_gcr3_pte(u64 root, int level, int pasid, bool alloc) · 184 unmodified lines
2908	static int __set_gcr3(struct protection_domain *domain, int pasid,	3014	static int __set_gcr3(struct protection_domain *domain, int pasid,
2909	unsigned long cr3)	3015	unsigned long cr3)
2910	{	3016	{
		3017	struct domain_pgtable pgtable;
2911	u64 *pte;	3018	u64 *pte;
2912		3019
2913	if (domain->mode != PAGE_MODE_NONE)	3020	amd_iommu_domain_get_pgtable(domain, &pgtable);
		3021	if (pgtable.mode != PAGE_MODE_NONE)
2914	return -EINVAL;	3022	return -EINVAL;
2915		3023
2916	pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true);	3024	pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true);
@@ -2924,9 +3032,11 @@ static int __set_gcr3(struct protection_domain *domain, int pasid, · 7 unmodified lines
2924		3032
2925	static int __clear_gcr3(struct protection_domain *domain, int pasid)	3033	static int __clear_gcr3(struct protection_domain *domain, int pasid)
2926	{	3034	{
		3035	struct domain_pgtable pgtable;
2927	u64 *pte;	3036	u64 *pte;
2928		3037
2929	if (domain->mode != PAGE_MODE_NONE)	3038	amd_iommu_domain_get_pgtable(domain, &pgtable);
		3039	if (pgtable.mode != PAGE_MODE_NONE)
2930	return -EINVAL;	3040	return -EINVAL;
2931		3041
2932	pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false);	3042	pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false);

drivers/iommu/amd_iommu_init.c+1−1

@@ -2936,7 +2936,7 @@ static int __init parse_amd_iommu_intr(char *str) · 2935 unmodified lines
2936	{	2936	{
2937	for (; *str; ++str) {	2937	for (; *str; ++str) {
2938	if (strncmp(str, "legacy", 6) == 0) {	2938	if (strncmp(str, "legacy", 6) == 0) {
2939	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY;	2939	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA;
2940	break;	2940	break;
2941	}	2941	}
2942	if (strncmp(str, "vapic", 5) == 0) {	2942	if (strncmp(str, "vapic", 5) == 0) {

drivers/iommu/amd_iommu_types.h+7−2

 				       iommu core code */
 	spinlock_t lock;	/* mostly used to lock the page table*/
 	u16 id;			/* the domain id written to the device table */
-	int mode;		/* paging mode (0-6 levels) */
+	atomic64_t pt_root;	/* pgtable root and pgtable mode */
-	u64 *pt_root;		/* page table root pointer */
 	int glx;		/* Number of levels for GCR3 table */
 	u64 *gcr3_tbl;		/* Guest CR3 table */
 	unsigned long flags;	/* flags to find out type of domain */
 	unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */
 };
+/* For decocded pt_root */
+struct domain_pgtable {
+	int mode;
+	u64 *root;
+};
 /*
  * Structure where we save information about one hardware AMD IOMMU in the
  * system.

drivers/iommu/intel-iommu.c+2−2

@@ -371,11 +371,11 @@ int dmar_disabled = 0; · 370 unmodified lines
371	int dmar_disabled = 1;	371	int dmar_disabled = 1;
372	#endif /* CONFIG_INTEL_IOMMU_DEFAULT_ON */	372	#endif /* CONFIG_INTEL_IOMMU_DEFAULT_ON */
373		373
374	#ifdef INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON	374	#ifdef CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON
375	int intel_iommu_sm = 1;	375	int intel_iommu_sm = 1;
376	#else	376	#else
377	int intel_iommu_sm;	377	int intel_iommu_sm;
378	#endif /* INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON */	378	#endif /* CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON */
379		379
380	int intel_iommu_enabled = 0;	380	int intel_iommu_enabled = 0;
381	EXPORT_SYMBOL_GPL(intel_iommu_enabled);	381	EXPORT_SYMBOL_GPL(intel_iommu_enabled);

drivers/iommu/iommu.c+2−1

 static void dev_iommu_free(struct device *dev)
 {
+	iommu_fwspec_free(dev);
 	kfree(dev->iommu);
 	dev->iommu = NULL;
 }
 	return group;
 }
-EXPORT_SYMBOL(iommu_group_get_for_dev);
+EXPORT_SYMBOL_GPL(iommu_group_get_for_dev);
 struct iommu_domain *iommu_group_default_domain(struct iommu_group *group)
 {

drivers/iommu/qcom_iommu.c+4−1

 	qcom_iommu->dev = dev;
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (res)
+	if (res) {
 		qcom_iommu->local_base = devm_ioremap_resource(dev, res);
+		if (IS_ERR(qcom_iommu->local_base))
+			return PTR_ERR(qcom_iommu->local_base);
+	}
 	qcom_iommu->iface_clk = devm_clk_get(dev, "iface");
 	if (IS_ERR(qcom_iommu->iface_clk)) {

drivers/iommu/virtio-iommu.c+1−1

@@ -453,7 +453,7 @@ static int viommu_add_resv_mem(struct viommu_endpoint *vdev, · 452 unmodified lines
453	if (!region)	453	if (!region)
454	return -ENOMEM;	454	return -ENOMEM;
455		455
456	list_add(&vdev->resv_regions, &region->list);	456	list_add(&region->list, &vdev->resv_regions);
457	return 0;	457	return 0;
458	}	458	}
459		459

drivers/md/dm-mpath.c+4−2

 	/* Do we need to select a new pgpath? */
 	pgpath = READ_ONCE(m->current_pgpath);
-	queue_io = test_bit(MPATHF_QUEUE_IO, &m->flags);
+	if (!pgpath || !test_bit(MPATHF_QUEUE_IO, &m->flags))
-	if (!pgpath || !queue_io)
 		pgpath = choose_pgpath(m, bio->bi_iter.bi_size);
+	/* MPATHF_QUEUE_IO might have been cleared by choose_pgpath. */
+	queue_io = test_bit(MPATHF_QUEUE_IO, &m->flags);
 	if ((pgpath && queue_io) ||
 	    (!pgpath && test_bit(MPATHF_QUEUE_IF_NO_PATH, &m->flags))) {
 		/* Queue for the daemon to resubmit */

drivers/md/dm-verity-fec.c+1−1

@@ -435,7 +435,7 @@ int verity_fec_decode(struct dm_verity v, struct dm_verity_io io, · 434 unmodified lines
435	fio->level++;	435	fio->level++;
436		436
437	if (type == DM_VERITY_BLOCK_TYPE_METADATA)	437	if (type == DM_VERITY_BLOCK_TYPE_METADATA)
438	block += v->data_blocks;	438	block = block - v->hash_start + v->data_blocks;
439		439
440	/*	440	/*
441	* For RS(M, N), the continuous FEC data is divided into blocks of N	441	* For RS(M, N), the continuous FEC data is divided into blocks of N

drivers/md/dm-writecache.c+37−15

 	return 0;
 }
+static int writecache_read_metadata(struct dm_writecache *wc, sector_t n_sectors)
+{
+	struct dm_io_region region;
+	struct dm_io_request req;
+	region.bdev = wc->ssd_dev->bdev;
+	region.sector = wc->start_sector;
+	region.count = n_sectors;
+	req.bi_op = REQ_OP_READ;
+	req.bi_op_flags = REQ_SYNC;
+	req.mem.type = DM_IO_VMA;
+	req.mem.ptr.vma = (char *)wc->memory_map;
+	req.client = wc->dm_io;
+	req.notify.fn = NULL;
+	return dm_io(&req, 1, &region, NULL);
+}
 static void writecache_resume(struct dm_target *ti)
 {
 	struct dm_writecache *wc = ti->private;
 	wc_lock(wc);
-	if (WC_MODE_PMEM(wc))
+	if (WC_MODE_PMEM(wc)) {
 		persistent_memory_invalidate_cache(wc->memory_map, wc->memory_map_size);
+	} else {
+		r = writecache_read_metadata(wc, wc->metadata_sectors);
+		if (r) {
+			size_t sb_entries_offset;
+			writecache_error(wc, r, "unable to read metadata: %d", r);
+			sb_entries_offset = offsetof(struct wc_memory_superblock, entries);
+			memset((char *)wc->memory_map + sb_entries_offset, -1,
+			       (wc->metadata_sectors << SECTOR_SHIFT) - sb_entries_offset);
+		}
+	}
 	wc->tree = RB_ROOT;
 	INIT_LIST_HEAD(&wc->lru);
 		ti->error = "Invalid block size";
 		goto bad;
 	}
+	if (wc->block_size < bdev_logical_block_size(wc->dev->bdev) ||
+	    wc->block_size < bdev_logical_block_size(wc->ssd_dev->bdev)) {
+		r = -EINVAL;
+		ti->error = "Block size is smaller than device logical block size";
+		goto bad;
+	}
 	wc->block_size_bits = __ffs(wc->block_size);
 	wc->max_writeback_jobs = MAX_WRITEBACK_JOBS;
 			goto bad;
 		}
 	} else {
-		struct dm_io_region region;
-		struct dm_io_request req;
 		size_t n_blocks, n_metadata_blocks;
 		uint64_t n_bitmap_bits;
 			goto bad;
 		}
-		region.bdev = wc->ssd_dev->bdev;
+		r = writecache_read_metadata(wc, wc->block_size >> SECTOR_SHIFT);
-		region.sector = wc->start_sector;
-		region.count = wc->metadata_sectors;
-		req.bi_op = REQ_OP_READ;
-		req.bi_op_flags = REQ_SYNC;
-		req.mem.type = DM_IO_VMA;
-		req.mem.ptr.vma = (char *)wc->memory_map;
-		req.client = wc->dm_io;
-		req.notify.fn = NULL;
-		r = dm_io(&req, 1, &region, NULL);
 		if (r) {
-			ti->error = "Unable to read metadata";
+			ti->error = "Unable to read first block of metadata";
 			goto bad;
 		}
 	}

drivers/misc/mei/hw-me.c+8−0

 	MEI_CFG_DMA_128,
 };
+/* LBG with quirk for SPS Firmware exclusion */
+static const struct mei_cfg mei_me_pch12_sps_cfg = {
+	MEI_CFG_PCH8_HFS,
+	MEI_CFG_FW_VER_SUPP,
+	MEI_CFG_FW_SPS,
+};
 /* Tiger Lake and newer devices */
 static const struct mei_cfg mei_me_pch15_cfg = {
 	MEI_CFG_PCH8_HFS,
 	[MEI_ME_PCH8_CFG] = &mei_me_pch8_cfg,
 	[MEI_ME_PCH8_SPS_CFG] = &mei_me_pch8_sps_cfg,
 	[MEI_ME_PCH12_CFG] = &mei_me_pch12_cfg,
+	[MEI_ME_PCH12_SPS_CFG] = &mei_me_pch12_sps_cfg,
 	[MEI_ME_PCH15_CFG] = &mei_me_pch15_cfg,
 };

drivers/misc/mei/hw-me.h+4−0

  *                         servers platforms with quirk for
  *                         SPS firmware exclusion.
  * @MEI_ME_PCH12_CFG:      Platform Controller Hub Gen12 and newer
+ * @MEI_ME_PCH12_SPS_CFG:  Platform Controller Hub Gen12 and newer
+ *                         servers platforms with quirk for
+ *                         SPS firmware exclusion.
  * @MEI_ME_PCH15_CFG:      Platform Controller Hub Gen15 and newer
  * @MEI_ME_NUM_CFG:        Upper Sentinel.
  */
 	MEI_ME_PCH8_CFG,
 	MEI_ME_PCH8_SPS_CFG,
 	MEI_ME_PCH12_CFG,
+	MEI_ME_PCH12_SPS_CFG,
 	MEI_ME_PCH15_CFG,
 	MEI_ME_NUM_CFG,
 };

drivers/misc/mei/pci-me.c+3−2

 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)},
 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_CFG)},
 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_CFG)},
-	{MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_CFG)},
+	{MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_SPS_CFG)},
 	{MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)},
 	{MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)},
 	}
 	hw = to_me_hw(dev);
 	hw->mem_addr = pcim_iomap_table(pdev)[0];
-	hw->irq = pdev->irq;
 	hw->read_fws = mei_me_read_fws;
 	pci_enable_msi(pdev);
+	hw->irq = pdev->irq;
 	 /* request and enable interrupt */
 	irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;

drivers/misc/mic/Kconfig+1−1

@@ -116,7 +116,7 @@ config MIC_COSM · 115 unmodified lines
116		116
117	config VOP	117	config VOP
118	tristate "VOP Driver"	118	tristate "VOP Driver"
119	depends on VOP_BUS	119	depends on VOP_BUS && VHOST_DPN
120	select VHOST_RING	120	select VHOST_RING
121	select VIRTIO	121	select VIRTIO
122	help	122	help

drivers/mmc/core/mmc_ops.c+1−1

@@ -878,7 +878,7 @@ static int mmc_send_hpi_cmd(struct mmc_card *card) · 877 unmodified lines
878	* Issued High Priority Interrupt, and check for card status	878	* Issued High Priority Interrupt, and check for card status
879	* until out-of prg-state.	879	* until out-of prg-state.
880	*/	880	*/
881	int mmc_interrupt_hpi(struct mmc_card *card)	881	static int mmc_interrupt_hpi(struct mmc_card *card)
882	{	882	{
883	int err;	883	int err;
884	u32 status;	884	u32 status;

drivers/mmc/host/cqhci.c+10−11

 #include <linux/delay.h>
 #include <linux/highmem.h>
 #include <linux/io.h>
+#include <linux/iopoll.h>
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
 #include <linux/slab.h>
 /* CQHCI is idle and should halt immediately, so set a small timeout */
 #define CQHCI_OFF_TIMEOUT 100
+static u32 cqhci_read_ctl(struct cqhci_host *cq_host)
+{
+	return cqhci_readl(cq_host, CQHCI_CTL);
+}
 static void cqhci_off(struct mmc_host *mmc)
 {
 	struct cqhci_host *cq_host = mmc->cqe_private;
-	ktime_t timeout;
-	bool timed_out;
 	u32 reg;
+	int err;
 	if (!cq_host->enabled || !mmc->cqe_on || cq_host->recovery_halt)
 		return;
 	cqhci_writel(cq_host, CQHCI_HALT, CQHCI_CTL);
-	timeout = ktime_add_us(ktime_get(), CQHCI_OFF_TIMEOUT);
+	err = readx_poll_timeout(cqhci_read_ctl, cq_host, reg,
-	while (1) {
+				 reg & CQHCI_HALT, 0, CQHCI_OFF_TIMEOUT);
-		timed_out = ktime_compare(ktime_get(), timeout) > 0;
+	if (err < 0)
-		reg = cqhci_readl(cq_host, CQHCI_CTL);
-		if ((reg & CQHCI_HALT) || timed_out)
-			break;
-	}
-	if (timed_out)
 		pr_err("%s: cqhci: CQE stuck on\n", mmc_hostname(mmc));
 	else
 		pr_debug("%s: cqhci: CQE off\n", mmc_hostname(mmc));

drivers/mmc/host/meson-mx-sdio.c+1−10

 		meson_mx_mmc_start_cmd(mmc, mrq->cmd);
 }
-static int meson_mx_mmc_card_busy(struct mmc_host *mmc)
-{
-	struct meson_mx_mmc_host *host = mmc_priv(mmc);
-	u32 irqc = readl(host->base + MESON_MX_SDIO_IRQC);
-	return !!(irqc & MESON_MX_SDIO_IRQC_FORCE_DATA_DAT_MASK);
-}
 static void meson_mx_mmc_read_response(struct mmc_host *mmc,
 				       struct mmc_command *cmd)
 {
 static struct mmc_host_ops meson_mx_mmc_ops = {
 	.request		= meson_mx_mmc_request,
 	.set_ios		= meson_mx_mmc_set_ios,
-	.card_busy		= meson_mx_mmc_card_busy,
 	.get_cd			= mmc_gpio_get_cd,
 	.get_ro			= mmc_gpio_get_ro,
 };
 	mmc->f_max = clk_round_rate(host->cfg_div_clk,
 				    clk_get_rate(host->parent_clk));
-	mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23;
+	mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY;
 	mmc->ops = &meson_mx_mmc_ops;
 	ret = mmc_of_parse(mmc);

drivers/mmc/host/sdhci-msm.c+2−0

@@ -2087,6 +2087,8 @@ static int sdhci_msm_probe(struct platform_device *pdev) · 2086 unmodified lines
2087	goto clk_disable;	2087	goto clk_disable;
2088	}	2088	}
2089		2089
		2090	msm_host->mmc->caps \|= MMC_CAP_WAIT_WHILE_BUSY \| MMC_CAP_NEED_RSP_BUSY;
		2091
2090	pm_runtime_get_noresume(&pdev->dev);	2092	pm_runtime_get_noresume(&pdev->dev);
2091	pm_runtime_set_active(&pdev->dev);	2093	pm_runtime_set_active(&pdev->dev);
2092	pm_runtime_enable(&pdev->dev);	2094	pm_runtime_enable(&pdev->dev);

drivers/mmc/host/sdhci-pci-core.c+3−0

@@ -601,6 +601,9 @@ static int intel_select_drive_strength(struct mmc_card *card, · 600 unmodified lines
601	struct sdhci_pci_slot *slot = sdhci_priv(host);	601	struct sdhci_pci_slot *slot = sdhci_priv(host);
602	struct intel_host *intel_host = sdhci_pci_priv(slot);	602	struct intel_host *intel_host = sdhci_pci_priv(slot);
603		603
		604	if (!(mmc_driver_type_mask(intel_host->drv_strength) & card_drv))
		605	return 0;
		606
604	return intel_host->drv_strength;	607	return intel_host->drv_strength;
605	}	608	}
606		609

drivers/mmc/host/sdhci-xenon.c+10−0

@@ -235,6 +235,16 @@ static void xenon_voltage_switch(struct sdhci_host *host) · 234 unmodified lines
235	{	235	{
236	/* Wait for 5ms after set 1.8V signal enable bit */	236	/* Wait for 5ms after set 1.8V signal enable bit */
237	usleep_range(5000, 5500);	237	usleep_range(5000, 5500);
		238
		239	/*
		240	* For some reason the controller's Host Control2 register reports
		241	* the bit representing 1.8V signaling as 0 when read after it was
		242	* written as 1. Subsequent read reports 1.
		243	*
		244	* Since this may cause some issues, do an empty read of the Host
		245	* Control2 register here to circumvent this.
		246	*/
		247	sdhci_readw(host, SDHCI_HOST_CONTROL2);
238	}	248	}
239		249
240	static const struct sdhci_ops sdhci_xenon_ops = {	250	static const struct sdhci_ops sdhci_xenon_ops = {

drivers/most/core.c+1−1

@@ -1483,7 +1483,7 @@ static void __exit most_exit(void) · 1482 unmodified lines
1483	ida_destroy(&mdev_id);	1483	ida_destroy(&mdev_id);
1484	}	1484	}
1485		1485
1486	module_init(most_init);	1486	subsys_initcall(most_init);
1487	module_exit(most_exit);	1487	module_exit(most_exit);
1488	MODULE_LICENSE("GPL");	1488	MODULE_LICENSE("GPL");
1489	MODULE_AUTHOR("Christian Gromm <christian.gromm@microchip.com>");	1489	MODULE_AUTHOR("Christian Gromm <christian.gromm@microchip.com>");

drivers/net/caif/Kconfig+1−1

@@ -50,7 +50,7 @@ config CAIF_HSI · 49 unmodified lines
50		50
51	config CAIF_VIRTIO	51	config CAIF_VIRTIO
52	tristate "CAIF virtio transport driver"	52	tristate "CAIF virtio transport driver"
53	depends on CAIF && HAS_DMA	53	depends on CAIF && HAS_DMA && VHOST_DPN
54	select VHOST_RING	54	select VHOST_RING
55	select VIRTIO	55	select VIRTIO
56	select GENERIC_ALLOCATOR	56	select GENERIC_ALLOCATOR

drivers/net/dsa/b53/b53_common.c+33−5

 		reg |= ARLTBL_RW;
 	else
 		reg &= ~ARLTBL_RW;
+	if (dev->vlan_enabled)
+		reg &= ~ARLTBL_IVL_SVL_SELECT;
+	else
+		reg |= ARLTBL_IVL_SVL_SELECT;
 	b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, reg);
 	return b53_arl_op_wait(dev);
 			u16 vid, struct b53_arl_entry *ent, u8 *idx,
 			bool is_valid)
 {
+	DECLARE_BITMAP(free_bins, B53_ARLTBL_MAX_BIN_ENTRIES);
 	unsigned int i;
 	int ret;
 	if (ret)
 		return ret;
+	bitmap_zero(free_bins, dev->num_arl_entries);
 	/* Read the bins */
 	for (i = 0; i < dev->num_arl_entries; i++) {
 		u64 mac_vid;
 			   B53_ARLTBL_DATA_ENTRY(i), &fwd_entry);
 		b53_arl_to_entry(ent, mac_vid, fwd_entry);
-		if (!(fwd_entry & ARLTBL_VALID))
+		if (!(fwd_entry & ARLTBL_VALID)) {
+			set_bit(i, free_bins);
 			continue;
+		}
 		if ((mac_vid & ARLTBL_MAC_MASK) != mac)
 			continue;
+		if (dev->vlan_enabled &&
+		    ((mac_vid >> ARLTBL_VID_S) & ARLTBL_VID_MASK) != vid)
+			continue;
 		*idx = i;
+		return 0;
 	}
+	if (bitmap_weight(free_bins, dev->num_arl_entries) == 0)
+		return -ENOSPC;
+	*idx = find_first_bit(free_bins, dev->num_arl_entries);
 	return -ENOENT;
 }
 	if (op)
 		return ret;
-	/* We could not find a matching MAC, so reset to a new entry */
+	switch (ret) {
-	if (ret) {
+	case -ENOSPC:
+		dev_dbg(dev->dev, "{%pM,%.4d} no space left in ARL\n",
+			addr, vid);
+		return is_valid ? ret : 0;
+	case -ENOENT:
+		/* We could not find a matching MAC, so reset to a new entry */
+		dev_dbg(dev->dev, "{%pM,%.4d} not found, using idx: %d\n",
+			addr, vid, idx);
 		fwd_entry = 0;
-		idx = 1;
+		break;
+	default:
+		dev_dbg(dev->dev, "{%pM,%.4d} found, using idx: %d\n",
+			addr, vid, idx);
+		break;
 	}
 	/* For multicast address, the port is a bitmask and the validity
 		ent.is_valid = !!(ent.port);
 	}
-	ent.is_valid = is_valid;
 	ent.vid = vid;
 	ent.is_static = true;
 	ent.is_age = false;

drivers/net/dsa/b53/b53_regs.h+6−2

 /* ARL Table Read/Write Register (8 bit) */
 #define B53_ARLTBL_RW_CTRL		0x00
 #define    ARLTBL_RW			BIT(0)
+#define    ARLTBL_IVL_SVL_SELECT	BIT(6)
 #define    ARLTBL_START_DONE		BIT(7)
 /* MAC Address Index Register (48 bit) */
  *
  * BCM5325 and BCM5365 share most definitions below
  */
-#define B53_ARLTBL_MAC_VID_ENTRY(n)	(0x10 * (n))
+#define B53_ARLTBL_MAC_VID_ENTRY(n)	((0x10 * (n)) + 0x10)
 #define   ARLTBL_MAC_MASK		0xffffffffffffULL
 #define   ARLTBL_VID_S			48
 #define   ARLTBL_VID_MASK_25		0xff
 #define   ARLTBL_VALID_25		BIT(63)
 /* ARL Table Data Entry N Registers (32 bit) */
-#define B53_ARLTBL_DATA_ENTRY(n)	((0x10 * (n)) + 0x08)
+#define B53_ARLTBL_DATA_ENTRY(n)	((0x10 * (n)) + 0x18)
 #define   ARLTBL_DATA_PORT_ID_MASK	0x1ff
 #define   ARLTBL_TC(tc)			((3 & tc) << 11)
 #define   ARLTBL_AGE			BIT(14)
 #define   ARLTBL_STATIC			BIT(15)
 #define   ARLTBL_VALID			BIT(16)
+/* Maximum number of bin entries in the ARL for all switches */
+#define B53_ARLTBL_MAX_BIN_ENTRIES	4
 /* ARL Search Control Register (8 bit) */
 #define B53_ARL_SRCH_CTL		0x50
 #define B53_ARL_SRCH_CTL_25		0x20

drivers/net/dsa/mv88e6xxx/Kconfig+1−1

 	bool "PTP support for Marvell 88E6xxx"
 	default n
 	depends on NET_DSA_MV88E6XXX_GLOBAL2
+	depends on PTP_1588_CLOCK
 	imply NETWORK_PHY_TIMESTAMPING
-	imply PTP_1588_CLOCK
 	help
 	  Say Y to enable PTP hardware timestamping on Marvell 88E6xxx switch
 	  chips that support it.

drivers/net/dsa/mv88e6xxx/chip.c+0−4

 	.serdes_get_stats = mv88e6390_serdes_get_stats,
 	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
 	.serdes_get_regs = mv88e6390_serdes_get_regs,
-	.phylink_validate = mv88e6390_phylink_validate,
 	.gpio_ops = &mv88e6352_gpio_ops,
 	.phylink_validate = mv88e6390_phylink_validate,
 };
 	.serdes_get_stats = mv88e6390_serdes_get_stats,
 	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
 	.serdes_get_regs = mv88e6390_serdes_get_regs,
-	.phylink_validate = mv88e6390_phylink_validate,
 	.gpio_ops = &mv88e6352_gpio_ops,
 	.phylink_validate = mv88e6390x_phylink_validate,
 };
 	.serdes_get_stats = mv88e6390_serdes_get_stats,
 	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
 	.serdes_get_regs = mv88e6390_serdes_get_regs,
-	.phylink_validate = mv88e6390_phylink_validate,
 	.avb_ops = &mv88e6390_avb_ops,
 	.ptp_ops = &mv88e6352_ptp_ops,
 	.phylink_validate = mv88e6390_phylink_validate,
 	.serdes_get_stats = mv88e6390_serdes_get_stats,
 	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
 	.serdes_get_regs = mv88e6390_serdes_get_regs,
-	.phylink_validate = mv88e6390_phylink_validate,
 	.gpio_ops = &mv88e6352_gpio_ops,
 	.avb_ops = &mv88e6390_avb_ops,
 	.ptp_ops = &mv88e6352_ptp_ops,

drivers/net/dsa/ocelot/felix.c+1−0

@@ -400,6 +400,7 @@ static int felix_init_structs(struct felix *felix, int num_phys_ports) · 399 unmodified lines
400	ocelot->stats_layout = felix->info->stats_layout;	400	ocelot->stats_layout = felix->info->stats_layout;
401	ocelot->num_stats = felix->info->num_stats;	401	ocelot->num_stats = felix->info->num_stats;
402	ocelot->shared_queue_sz = felix->info->shared_queue_sz;	402	ocelot->shared_queue_sz = felix->info->shared_queue_sz;
		403	ocelot->num_mact_rows = felix->info->num_mact_rows;
403	ocelot->vcap_is2_keys = felix->info->vcap_is2_keys;	404	ocelot->vcap_is2_keys = felix->info->vcap_is2_keys;
404	ocelot->vcap_is2_actions= felix->info->vcap_is2_actions;	405	ocelot->vcap_is2_actions= felix->info->vcap_is2_actions;
405	ocelot->vcap = felix->info->vcap;	406	ocelot->vcap = felix->info->vcap;

drivers/net/dsa/ocelot/felix.h+1−0

@@ -15,6 +15,7 @@ struct felix_info { · 14 unmodified lines
15	const u32 const map;	15	const u32 const map;
16	const struct ocelot_ops *ops;	16	const struct ocelot_ops *ops;
17	int shared_queue_sz;	17	int shared_queue_sz;
		18	int num_mact_rows;
18	const struct ocelot_stat_layout *stats_layout;	19	const struct ocelot_stat_layout *stats_layout;
19	unsigned int num_stats;	20	unsigned int num_stats;
20	int num_ports;	21	int num_ports;

drivers/net/dsa/ocelot/felix_vsc9959.c+1−0

@@ -1220,6 +1220,7 @@ struct felix_info felix_info_vsc9959 = { · 1219 unmodified lines
1220	.vcap_is2_actions = vsc9959_vcap_is2_actions,	1220	.vcap_is2_actions = vsc9959_vcap_is2_actions,
1221	.vcap = vsc9959_vcap_props,	1221	.vcap = vsc9959_vcap_props,
1222	.shared_queue_sz = 128 * 1024,	1222	.shared_queue_sz = 128 * 1024,
		1223	.num_mact_rows = 2048,
1223	.num_ports = 6,	1224	.num_ports = 6,
1224	.switch_pci_bar = 4,	1225	.switch_pci_bar = 4,
1225	.imdio_pci_bar = 0,	1226	.imdio_pci_bar = 0,

drivers/net/dsa/sja1105/Kconfig+1−0

@@ -20,6 +20,7 @@ tristate "NXP SJA1105 Ethernet switch family support" · 19 unmodified lines
20	config NET_DSA_SJA1105_PTP	20	config NET_DSA_SJA1105_PTP
21	bool "Support for the PTP clock on the NXP SJA1105 Ethernet switch"	21	bool "Support for the PTP clock on the NXP SJA1105 Ethernet switch"
22	depends on NET_DSA_SJA1105	22	depends on NET_DSA_SJA1105
		23	depends on PTP_1588_CLOCK
23	help	24	help
24	This enables support for timestamping and PTP clock manipulations in	25	This enables support for timestamping and PTP clock manipulations in
25	the SJA1105 DSA driver.	26	the SJA1105 DSA driver.

drivers/net/dsa/sja1105/sja1105_ptp.c+18−8

 /* PTPSYNCTS has no interrupt or update mechanism, because the intended
  * hardware use case is for the timestamp to be collected synchronously,
- * immediately after the CAS_MASTER SJA1105 switch has triggered a CASSYNC
+ * immediately after the CAS_MASTER SJA1105 switch has performed a CASSYNC
- * pulse on the PTP_CLK pin. When used as a generic extts source, it needs
+ * one-shot toggle (no return to level) on the PTP_CLK pin. When used as a
- * polling and a comparison with the old value. The polling interval is just
+ * generic extts source, the PTPSYNCTS register needs polling and a comparison
- * the Nyquist rate of a canonical PPS input (e.g. from a GPS module).
+ * with the old value. The polling interval is configured as the Nyquist rate
- * Anything of higher frequency than 1 Hz will be lost, since there is no
+ * of a signal with 50% duty cycle and 1Hz frequency, which is sadly all that
- * timestamp FIFO.
+ * this hardware can do (but may be enough for some setups). Anything of higher
+ * frequency than 1 Hz will be lost, since there is no timestamp FIFO.
  */
-#define SJA1105_EXTTS_INTERVAL		(HZ / 2)
+#define SJA1105_EXTTS_INTERVAL		(HZ / 4)
 /*            This range is actually +/- SJA1105_MAX_ADJ_PPB
  *            divided by 1000 (ppb -> ppm) and with a 16-bit
 		return -EOPNOTSUPP;
 	/* Reject requests with unsupported flags */
-	if (extts->flags)
+	if (extts->flags & ~(PTP_ENABLE_FEATURE |
+			     PTP_RISING_EDGE |
+			     PTP_FALLING_EDGE |
+			     PTP_STRICT_FLAGS))
+		return -EOPNOTSUPP;
+	/* We can only enable time stamping on both edges, sadly. */
+	if ((extts->flags & PTP_STRICT_FLAGS) &&
+	    (extts->flags & PTP_ENABLE_FEATURE) &&
+	    (extts->flags & PTP_EXTTS_EDGES) != PTP_EXTTS_EDGES)
 		return -EOPNOTSUPP;
 	rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_EXTTS);

drivers/net/ethernet/amazon/ena/ena_netdev.h+1−1

@@ -69,7 +69,7 @@ · 68 unmodified lines
69	* 16kB.	69	* 16kB.
70	*/	70	*/
71	#if PAGE_SIZE > SZ_16K	71	#if PAGE_SIZE > SZ_16K
72	#define ENA_PAGE_SIZE SZ_16K	72	#define ENA_PAGE_SIZE (_AC(SZ_16K, UL))
73	#else	73	#else
74	#define ENA_PAGE_SIZE PAGE_SIZE	74	#define ENA_PAGE_SIZE PAGE_SIZE
75	#endif	75	#endif

drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c+1−1

@@ -57,7 +57,7 @@ static const struct aq_board_revision_s hw_atl_boards[] = { · 56 unmodified lines
57	{ AQ_DEVICE_ID_D108, AQ_HWREV_2, &hw_atl_ops_b0, &hw_atl_b0_caps_aqc108, },	57	{ AQ_DEVICE_ID_D108, AQ_HWREV_2, &hw_atl_ops_b0, &hw_atl_b0_caps_aqc108, },
58	{ AQ_DEVICE_ID_D109, AQ_HWREV_2, &hw_atl_ops_b0, &hw_atl_b0_caps_aqc109, },	58	{ AQ_DEVICE_ID_D109, AQ_HWREV_2, &hw_atl_ops_b0, &hw_atl_b0_caps_aqc109, },
59		59
60	{ AQ_DEVICE_ID_AQC100, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc107, },	60	{ AQ_DEVICE_ID_AQC100, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc100, },
61	{ AQ_DEVICE_ID_AQC107, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc107, },	61	{ AQ_DEVICE_ID_AQC107, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc107, },
62	{ AQ_DEVICE_ID_AQC108, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc108, },	62	{ AQ_DEVICE_ID_AQC108, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc108, },
63	{ AQ_DEVICE_ID_AQC109, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc109, },	63	{ AQ_DEVICE_ID_AQC109, AQ_HWREV_ANY, &hw_atl_ops_b1, &hw_atl_b0_caps_aqc109, },

drivers/net/ethernet/broadcom/bcmsysport.c+2−2

 	dma_addr_t mapping;
 	/* Allocate a new SKB for a new packet */
-	skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
+	skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
+				 GFP_ATOMIC | __GFP_NOWARN);
 	if (!skb) {
 		priv->mib.alloc_rx_buff_failed++;
 		netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 		priv->wol_irq = platform_get_irq(pdev, 1);
 	}
 	if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
-		dev_err(&pdev->dev, "invalid interrupts\n");
 		ret = -EINVAL;
 		goto err_free_netdev;
 	}

drivers/net/ethernet/broadcom/bgmac-platform.c+2−7

 	if (bgmac->irq < 0)
 		return bgmac->irq;
-	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "amac_base");
+	bgmac->plat.base =
-	if (!regs) {
+		devm_platform_ioremap_resource_byname(pdev, "amac_base");
-		dev_err(&pdev->dev, "Unable to obtain base resource\n");
-		return -EINVAL;
-	}
-	bgmac->plat.base = devm_ioremap_resource(&pdev->dev, regs);
 	if (IS_ERR(bgmac->plat.base))
 		return PTR_ERR(bgmac->plat.base);

drivers/net/ethernet/broadcom/bnxt/bnxt.c+13−7

 	int rc;
 	if (!mem_size)
-		return 0;
+		return -EINVAL;
 	ctx_pg->nr_pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE);
 	if (ctx_pg->nr_pages > MAX_CTX_TOTAL_PAGES) {
 					   netdev_features_t features)
 {
 	struct bnxt *bp = netdev_priv(dev);
+	netdev_features_t vlan_features;
 	if ((features & NETIF_F_NTUPLE) && !bnxt_rfs_capable(bp))
 		features &= ~NETIF_F_NTUPLE;
 	/* Both CTAG and STAG VLAN accelaration on the RX side have to be
 	 * turned on or off together.
 	 */
-	if ((features & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX)) !=
+	vlan_features = features & (NETIF_F_HW_VLAN_CTAG_RX |
-	    (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX)) {
+				    NETIF_F_HW_VLAN_STAG_RX);
+	if (vlan_features != (NETIF_F_HW_VLAN_CTAG_RX |
+			      NETIF_F_HW_VLAN_STAG_RX)) {
 		if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
 			features &= ~(NETIF_F_HW_VLAN_CTAG_RX |
 				      NETIF_F_HW_VLAN_STAG_RX);
-		else
+		else if (vlan_features)
 			features |= NETIF_F_HW_VLAN_CTAG_RX |
 				    NETIF_F_HW_VLAN_STAG_RX;
 	}
 		bnxt_ulp_start(bp, err);
 	}
-	if (result != PCI_ERS_RESULT_RECOVERED && netif_running(netdev))
+	if (result != PCI_ERS_RESULT_RECOVERED) {
-		dev_close(netdev);
+		if (netif_running(netdev))
+			dev_close(netdev);
+		pci_disable_device(pdev);
+	}
 	rtnl_unlock();
-	return PCI_ERS_RESULT_RECOVERED;
+	return result;
 }
 /**

drivers/net/ethernet/broadcom/bnxt/bnxt.h+0−1

@@ -1066,7 +1066,6 @@ struct bnxt_vf_info { · 1065 unmodified lines
1066	#define BNXT_VF_LINK_FORCED 0x4	1066	#define BNXT_VF_LINK_FORCED 0x4
1067	#define BNXT_VF_LINK_UP 0x8	1067	#define BNXT_VF_LINK_UP 0x8
1068	#define BNXT_VF_TRUST 0x10	1068	#define BNXT_VF_TRUST 0x10
1069	u32 func_flags; /* func cfg flags */
1070	u32 min_tx_rate;	1069	u32 min_tx_rate;
1071	u32 max_tx_rate;	1070	u32 max_tx_rate;
1072	void *hwrm_cmd_req_addr;	1071	void *hwrm_cmd_req_addr;

drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h+1−1

@@ -43,7 +43,7 @@ static inline void bnxt_link_bp_to_dl(struct bnxt bp, struct devlink dl) · 42 unmodified lines
43	#define BNXT_NVM_CFG_VER_BITS 24	43	#define BNXT_NVM_CFG_VER_BITS 24
44	#define BNXT_NVM_CFG_VER_BYTES 4	44	#define BNXT_NVM_CFG_VER_BYTES 4
45		45
46	#define BNXT_MSIX_VEC_MAX 1280	46	#define BNXT_MSIX_VEC_MAX 512
47	#define BNXT_MSIX_VEC_MIN_MAX 128	47	#define BNXT_MSIX_VEC_MIN_MAX 128
48		48
49	enum bnxt_nvm_dir_type {	49	enum bnxt_nvm_dir_type {

drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c+2−8

 	if (old_setting == setting)
 		return 0;
-	func_flags = vf->func_flags;
 	if (setting)
-		func_flags |= FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE;
+		func_flags = FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE;
 	else
-		func_flags |= FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE;
+		func_flags = FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE;
 	/*TODO: if the driver supports VLAN filter on guest VLAN,
 	 * the spoof check should also include vlan anti-spoofing
 	 */
 	req.flags = cpu_to_le32(func_flags);
 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
 	if (!rc) {
-		vf->func_flags = func_flags;
 		if (setting)
 			vf->flags |= BNXT_VF_SPOOFCHK;
 		else
 	memcpy(vf->mac_addr, mac, ETH_ALEN);
 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
 	req.fid = cpu_to_le16(vf->fw_fid);
-	req.flags = cpu_to_le32(vf->func_flags);
 	req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR);
 	memcpy(req.dflt_mac_addr, mac, ETH_ALEN);
 	return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
 	req.fid = cpu_to_le16(vf->fw_fid);
-	req.flags = cpu_to_le32(vf->func_flags);
 	req.dflt_vlan = cpu_to_le16(vlan_tag);
 	req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_VLAN);
 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
 		return 0;
 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
 	req.fid = cpu_to_le16(vf->fw_fid);
-	req.flags = cpu_to_le32(vf->func_flags);
 	req.enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_MAX_BW);
 	req.max_bw = cpu_to_le32(max_tx_rate);
 	req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_MIN_BW);
 	vf = &bp->pf.vf[vf_id];
 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FUNC_CFG, -1, -1);
 	req.fid = cpu_to_le16(vf->fw_fid);
-	req.flags = cpu_to_le32(vf->func_flags);
 	if (is_valid_ether_addr(vf->mac_addr)) {
 		req.enables |= cpu_to_le32(FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR);

drivers/net/ethernet/broadcom/genet/bcmgenet.c+5−1

 	if (netif_running(dev))
 		bcmgenet_update_mib_counters(priv);
+	dev->netdev_ops->ndo_get_stats(dev);
 	for (i = 0; i < BCMGENET_STATS_LEN; i++) {
 		const struct bcmgenet_stats *s;
 		char *p;
 	dma_addr_t mapping;
 	/* Allocate a new Rx skb */
-	skb = netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT);
+	skb = __netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT,
+				 GFP_ATOMIC | __GFP_NOWARN);
 	if (!skb) {
 		priv->mib.alloc_rx_buff_failed++;
 		netif_err(priv, rx_err, priv->dev,
 	dev->stats.rx_packets = rx_packets;
 	dev->stats.rx_errors = rx_errors;
 	dev->stats.rx_missed_errors = rx_errors;
+	dev->stats.rx_dropped = rx_dropped;
 	return &dev->stats;
 }

drivers/net/ethernet/cadence/Kconfig+1−1

 config MACB_USE_HWSTAMP
 	bool "Use IEEE 1588 hwstamp"
 	depends on MACB
+	depends on PTP_1588_CLOCK
 	default y
-	imply PTP_1588_CLOCK
 	---help---
 	  Enable IEEE 1588 Precision Time Protocol (PTP) support for MACB.

drivers/net/ethernet/cadence/macb_main.c+12−12

@@ -334,8 +334,10 @@ static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum) · 333 unmodified lines
334	int status;	334	int status;
335		335
336	status = pm_runtime_get_sync(&bp->pdev->dev);	336	status = pm_runtime_get_sync(&bp->pdev->dev);
337	if (status < 0)	337	if (status < 0) {
		338	pm_runtime_put_noidle(&bp->pdev->dev);
338	goto mdio_pm_exit;	339	goto mdio_pm_exit;
		340	}
339		341
340	status = macb_mdio_wait_for_idle(bp);	342	status = macb_mdio_wait_for_idle(bp);
341	if (status < 0)	343	if (status < 0)
@@ -386,8 +388,10 @@ static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum, · 44 unmodified lines
386	int status;	388	int status;
387		389
388	status = pm_runtime_get_sync(&bp->pdev->dev);	390	status = pm_runtime_get_sync(&bp->pdev->dev);
389	if (status < 0)	391	if (status < 0) {
		392	pm_runtime_put_noidle(&bp->pdev->dev);
390	goto mdio_pm_exit;	393	goto mdio_pm_exit;
		394	}
391		395
392	status = macb_mdio_wait_for_idle(bp);	396	status = macb_mdio_wait_for_idle(bp);
393	if (status < 0)	397	if (status < 0)
@@ -3816,8 +3820,10 @@ static int at91ether_open(struct net_device *dev) · 3422 unmodified lines
3816	int ret;	3820	int ret;
3817		3821
3818	ret = pm_runtime_get_sync(&lp->pdev->dev);	3822	ret = pm_runtime_get_sync(&lp->pdev->dev);
3819	if (ret < 0)	3823	if (ret < 0) {
		3824	pm_runtime_put_noidle(&lp->pdev->dev);
3820	return ret;	3825	return ret;
		3826	}
3821		3827
3822	/* Clear internal statistics */	3828	/* Clear internal statistics */
3823	ctl = macb_readl(lp, NCR);	3829	ctl = macb_readl(lp, NCR);
@@ -4172,15 +4178,9 @@ static int fu540_c000_clk_init(struct platform_device pdev, struct clk *pclk, · 348 unmodified lines
4172		4178
4173	static int fu540_c000_init(struct platform_device *pdev)	4179	static int fu540_c000_init(struct platform_device *pdev)
4174	{	4180	{
4175	struct resource *res;	4181	mgmt->reg = devm_platform_ioremap_resource(pdev, 1);
4176		4182	if (IS_ERR(mgmt->reg))
4177	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);	4183	return PTR_ERR(mgmt->reg);
4178	if (!res)
4179	return -ENODEV;
4180
4181	mgmt->reg = ioremap(res->start, resource_size(res));
4182	if (!mgmt->reg)
4183	return -ENOMEM;
4184		4184
4185	return macb_init(pdev);	4185	return macb_init(pdev);
4186	}	4186	}

drivers/net/ethernet/cavium/Kconfig+1−1

@@ -54,7 +54,7 @@ config THUNDER_NIC_RGX · 53 unmodified lines
54	config CAVIUM_PTP	54	config CAVIUM_PTP
55	tristate "Cavium PTP coprocessor as PTP clock"	55	tristate "Cavium PTP coprocessor as PTP clock"
56	depends on 64BIT && PCI	56	depends on 64BIT && PCI
57	imply PTP_1588_CLOCK	57	depends on PTP_1588_CLOCK
58	---help---	58	---help---
59	This driver adds support for the Precision Time Protocol Clocks and	59	This driver adds support for the Precision Time Protocol Clocks and
60	Timestamping coprocessor (PTP) found on Cavium processors.	60	Timestamping coprocessor (PTP) found on Cavium processors.

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c+20−7

 	}
 }
-static unsigned long cudbg_mem_region_size(struct cudbg_init *pdbg_init,
+static int cudbg_mem_region_size(struct cudbg_init *pdbg_init,
-					   struct cudbg_error *cudbg_err,
+				 struct cudbg_error *cudbg_err,
-					   u8 mem_type)
+				 u8 mem_type, unsigned long *region_size)
 {
 	struct adapter *padap = pdbg_init->adap;
 	struct cudbg_meminfo mem_info;
 	memset(&mem_info, 0, sizeof(struct cudbg_meminfo));
 	rc = cudbg_fill_meminfo(padap, &mem_info);
-	if (rc)
+	if (rc) {
+		cudbg_err->sys_err = rc;
 		return rc;
+	}
 	cudbg_t4_fwcache(pdbg_init, cudbg_err);
 	rc = cudbg_meminfo_get_mem_index(padap, &mem_info, mem_type, &mc_idx);
-	if (rc)
+	if (rc) {
+		cudbg_err->sys_err = rc;
 		return rc;
+	}
+	if (region_size)
+		*region_size = mem_info.avail[mc_idx].limit -
+			       mem_info.avail[mc_idx].base;
-	return mem_info.avail[mc_idx].limit - mem_info.avail[mc_idx].base;
+	return 0;
 }
 static int cudbg_collect_mem_region(struct cudbg_init *pdbg_init,
 				    struct cudbg_error *cudbg_err,
 				    u8 mem_type)
 {
-	unsigned long size = cudbg_mem_region_size(pdbg_init, cudbg_err, mem_type);
+	unsigned long size = 0;
+	int rc;
+	rc = cudbg_mem_region_size(pdbg_init, cudbg_err, mem_type, &size);
+	if (rc)
+		return rc;
 	return cudbg_read_fw_mem(pdbg_init, dbg_buff, mem_type, size,
 				 cudbg_err);

drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c+6−21

@@ -311,32 +311,17 @@ static int cxgb4_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) · 310 unmodified lines
311	*/	311	*/
312	static int cxgb4_ptp_gettime(struct ptp_clock_info ptp, struct timespec64 ts)	312	static int cxgb4_ptp_gettime(struct ptp_clock_info ptp, struct timespec64 ts)
313	{	313	{
314	struct adapter adapter = (struct adapter )container_of(ptp,	314	struct adapter *adapter = container_of(ptp, struct adapter,
315	struct adapter, ptp_clock_info);	315	ptp_clock_info);
316	struct fw_ptp_cmd c;
317	u64 ns;	316	u64 ns;
318	int err;
319
320	memset(&c, 0, sizeof(c));
321	c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) \|
322	FW_CMD_REQUEST_F \|
323	FW_CMD_READ_F \|
324	FW_PTP_CMD_PORTID_V(0));
325	c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
326	c.u.ts.sc = FW_PTP_SC_GET_TIME;
327		317
328	err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), &c);	318	ns = t4_read_reg(adapter, T5_PORT_REG(0, MAC_PORT_PTP_SUM_LO_A));
329	if (err < 0) {	319	ns \|= (u64)t4_read_reg(adapter,
330	dev_err(adapter->pdev_dev,	320	T5_PORT_REG(0, MAC_PORT_PTP_SUM_HI_A)) << 32;
331	"PTP: %s error %d\n", __func__, -err);
332	return err;
333	}
334		321
335	/* convert to timespec*/	322	/* convert to timespec*/
336	ns = be64_to_cpu(c.u.ts.tm);
337	*ts = ns_to_timespec64(ns);	323	*ts = ns_to_timespec64(ns);
338		324	return 0;
339	return err;
340	}	325	}
341		326
342	/**	327	/**

drivers/net/ethernet/chelsio/cxgb4/sge.c+37−3

@@ -2207,6 +2207,9 @@ static void ethofld_hard_xmit(struct net_device *dev, · 2206 unmodified lines
2207	if (unlikely(skip_eotx_wr)) {	2207	if (unlikely(skip_eotx_wr)) {
2208	start = (u64 *)wr;	2208	start = (u64 *)wr;
2209	eosw_txq->state = next_state;	2209	eosw_txq->state = next_state;
		2210	eosw_txq->cred -= wrlen16;
		2211	eosw_txq->ncompl++;
		2212	eosw_txq->last_compl = 0;
2210	goto write_wr_headers;	2213	goto write_wr_headers;
2211	}	2214	}
2212		2215
@@ -2365,6 +2368,34 @@ netdev_tx_t t4_start_xmit(struct sk_buff skb, struct net_device dev) · 152 unmodified lines
2365	return cxgb4_eth_xmit(skb, dev);	2368	return cxgb4_eth_xmit(skb, dev);
2366	}	2369	}
2367		2370
		2371	static void eosw_txq_flush_pending_skbs(struct sge_eosw_txq *eosw_txq)
		2372	{
		2373	int pktcount = eosw_txq->pidx - eosw_txq->last_pidx;
		2374	int pidx = eosw_txq->pidx;
		2375	struct sk_buff *skb;
		2376
		2377	if (!pktcount)
		2378	return;
		2379
		2380	if (pktcount < 0)
		2381	pktcount += eosw_txq->ndesc;
		2382
		2383	while (pktcount--) {
		2384	pidx--;
		2385	if (pidx < 0)
		2386	pidx += eosw_txq->ndesc;
		2387
		2388	skb = eosw_txq->desc[pidx].skb;
		2389	if (skb) {
		2390	dev_consume_skb_any(skb);
		2391	eosw_txq->desc[pidx].skb = NULL;
		2392	eosw_txq->inuse--;
		2393	}
		2394	}
		2395
		2396	eosw_txq->pidx = eosw_txq->last_pidx + 1;
		2397	}
		2398
2368	/**	2399	/**
2369	* cxgb4_ethofld_send_flowc - Send ETHOFLD flowc request to bind eotid to tc.	2400	* cxgb4_ethofld_send_flowc - Send ETHOFLD flowc request to bind eotid to tc.
2370	* @dev - netdevice	2401	* @dev - netdevice
@@ -2440,9 +2471,11 @@ int cxgb4_ethofld_send_flowc(struct net_device *dev, u32 eotid, u32 tc) · 69 unmodified lines
2440	FW_FLOWC_MNEM_EOSTATE_CLOSING :	2471	FW_FLOWC_MNEM_EOSTATE_CLOSING :
2441	FW_FLOWC_MNEM_EOSTATE_ESTABLISHED);	2472	FW_FLOWC_MNEM_EOSTATE_ESTABLISHED);
2442		2473
2443	eosw_txq->cred -= len16;	2474	/* Free up any pending skbs to ensure there's room for
2444	eosw_txq->ncompl++;	2475	* termination FLOWC.
2445	eosw_txq->last_compl = 0;	2476	*/
		2477	if (tc == FW_SCHED_CLS_NONE)
		2478	eosw_txq_flush_pending_skbs(eosw_txq);
2446		2479
2447	ret = eosw_txq_enqueue(eosw_txq, skb);	2480	ret = eosw_txq_enqueue(eosw_txq, skb);
2448	if (ret) {	2481	if (ret) {
@@ -2695,6 +2728,7 @@ static void ofldtxq_stop(struct sge_uld_txq q, struct fw_wr_hdr wr) · 246 unmodified lines
2695	* is ever running at a time ...	2728	* is ever running at a time ...
2696	*/	2729	*/
2697	static void service_ofldq(struct sge_uld_txq *q)	2730	static void service_ofldq(struct sge_uld_txq *q)
		2731	__must_hold(&q->sendq.lock)
2698	{	2732	{
2699	u64 pos, before, *end;	2733	u64 pos, before, *end;
2700	int credits;	2734	int credits;

drivers/net/ethernet/chelsio/cxgb4/t4_regs.h+3−0

@@ -1906,6 +1906,9 @@ · 1905 unmodified lines
1906		1906
1907	#define MAC_PORT_CFG2_A 0x818	1907	#define MAC_PORT_CFG2_A 0x818
1908		1908
		1909	#define MAC_PORT_PTP_SUM_LO_A 0x990
		1910	#define MAC_PORT_PTP_SUM_HI_A 0x994
		1911
1909	#define MPS_CMN_CTL_A 0x9000	1912	#define MPS_CMN_CTL_A 0x9000
1910		1913
1911	#define COUNTPAUSEMCRX_S 5	1914	#define COUNTPAUSEMCRX_S 5

drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c+1−1

 	pci_disable_device(pdev);
 err_pci_enable:
 err_mdiobus_alloc:
-	iounmap(port_regs);
 err_hw_alloc:
+	iounmap(port_regs);
 err_ioremap:
 	return err;
 }

drivers/net/ethernet/ibm/ibmvnic.c+2−1

 				rc = do_hard_reset(adapter, rwi, reset_state);
 				rtnl_unlock();
 			}
-		} else {
+		} else if (!(rwi->reset_reason == VNIC_RESET_FATAL &&
+				adapter->from_passive_init)) {
 			rc = do_reset(adapter, rwi, reset_state);
 		}
 		kfree(rwi);

drivers/net/ethernet/intel/e1000/e1000_main.c+1−1

@@ -1476,7 +1476,7 @@ static bool e1000_check_64k_bound(struct e1000_adapter adapter, void start, · 1475 unmodified lines
1476	if (hw->mac_type == e1000_82545 \|\|	1476	if (hw->mac_type == e1000_82545 \|\|
1477	hw->mac_type == e1000_ce4100 \|\|	1477	hw->mac_type == e1000_ce4100 \|\|
1478	hw->mac_type == e1000_82546) {	1478	hw->mac_type == e1000_82546) {
1479	return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;	1479	return ((begin ^ (end - 1)) >> 16) == 0;
1480	}	1480	}
1481		1481
1482	return true;	1482	return true;

drivers/net/ethernet/intel/i40e/i40e_main.c+2−2

@@ -1611,7 +1611,7 @@ static int i40e_config_rss_aq(struct i40e_vsi vsi, const u8 seed, · 1610 unmodified lines
1611	}	1611	}
1612	}	1612	}
1613	if (lut) {	1613	if (lut) {
1614	bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;	1614	bool pf_lut = vsi->type == I40E_VSI_MAIN;
1615		1615
1616	ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);	1616	ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1617	if (ret) {	1617	if (ret) {
@@ -11436,7 +11436,7 @@ static int i40e_get_rss_aq(struct i40e_vsi vsi, const u8 seed, · 9818 unmodified lines
11436	}	11436	}
11437		11437
11438	if (lut) {	11438	if (lut) {
11439	bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;	11439	bool pf_lut = vsi->type == I40E_VSI_MAIN;
11440		11440
11441	ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);	11441	ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
11442	if (ret) {	11442	if (ret) {

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c+3−0

@@ -1428,6 +1428,9 @@ int mvpp2_ethtool_cls_rule_del(struct mvpp2_port *port, · 1427 unmodified lines
1428	struct mvpp2_ethtool_fs *efs;	1428	struct mvpp2_ethtool_fs *efs;
1429	int ret;	1429	int ret;
1430		1430
		1431	if (info->fs.location >= MVPP2_N_RFS_ENTRIES_PER_FLOW)
		1432	return -EINVAL;
		1433
1431	efs = port->rfs_rules[info->fs.location];	1434	efs = port->rfs_rules[info->fs.location];
1432	if (!efs)	1435	if (!efs)
1433	return -EINVAL;	1436	return -EINVAL;

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c+2−0

@@ -4329,6 +4329,8 @@ static int mvpp2_ethtool_get_rxfh_context(struct net_device dev, u32 indir, · 4328 unmodified lines
4329		4329
4330	if (!mvpp22_rss_is_supported())	4330	if (!mvpp22_rss_is_supported())
4331	return -EOPNOTSUPP;	4331	return -EOPNOTSUPP;
		4332	if (rss_context >= MVPP22_N_RSS_TABLES)
		4333	return -EINVAL;
4332		4334
4333	if (hfunc)	4335	if (hfunc)
4334	*hfunc = ETH_RSS_HASH_CRC32;	4336	*hfunc = ETH_RSS_HASH_CRC32;

drivers/net/ethernet/mellanox/mlx4/en_tx.c+13−1

 #include <linux/ip.h>
 #include <linux/ipv6.h>
 #include <linux/moduleparam.h>
+#include <linux/indirect_call_wrapper.h>
 #include "mlx4_en.h"
 	}
 }
+INDIRECT_CALLABLE_DECLARE(u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
+						   struct mlx4_en_tx_ring *ring,
+						   int index, u64 timestamp,
+						   int napi_mode));
 u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
 			 struct mlx4_en_tx_ring *ring,
 	return tx_info->nr_txbb;
 }
+INDIRECT_CALLABLE_DECLARE(u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv,
+						      struct mlx4_en_tx_ring *ring,
+						      int index, u64 timestamp,
+						      int napi_mode));
 u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv,
 			    struct mlx4_en_tx_ring *ring,
 			    int index, u64 timestamp,
 				timestamp = mlx4_en_get_cqe_ts(cqe);
 			/* free next descriptor */
-			last_nr_txbb = ring->free_tx_desc(
+			last_nr_txbb = INDIRECT_CALL_2(ring->free_tx_desc,
+						       mlx4_en_free_tx_desc,
+						       mlx4_en_recycle_tx_desc,
 					priv, ring, ring_index,
 					timestamp, napi_budget);

drivers/net/ethernet/mellanox/mlx4/main.c+3−1

@@ -2550,6 +2550,7 @@ static int mlx4_allocate_default_counters(struct mlx4_dev *dev) · 2549 unmodified lines
2550		2550
2551	if (!err \|\| err == -ENOSPC) {	2551	if (!err \|\| err == -ENOSPC) {
2552	priv->def_counter[port] = idx;	2552	priv->def_counter[port] = idx;
		2553	err = 0;
2553	} else if (err == -ENOENT) {	2554	} else if (err == -ENOENT) {
2554	err = 0;	2555	err = 0;
2555	continue;	2556	continue;
@@ -2600,7 +2601,8 @@ int mlx4_counter_alloc(struct mlx4_dev dev, u32 idx, u8 usage) · 44 unmodified lines
2600	MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);	2601	MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED);
2601	if (!err)	2602	if (!err)
2602	*idx = get_param_l(&out_param);	2603	*idx = get_param_l(&out_param);
2603		2604	if (WARN_ON(err == -ENOSPC))
		2605	err = -EINVAL;
2604	return err;	2606	return err;
2605	}	2607	}
2606	return __mlx4_counter_alloc(dev, idx);	2608	return __mlx4_counter_alloc(dev, idx);

drivers/net/ethernet/mellanox/mlx5/core/Kconfig+4−4

@@ -7,10 +7,10 @@ config MLX5_CORE · 6 unmodified lines
7	tristate "Mellanox 5th generation network adapters (ConnectX series) core driver"	7	tristate "Mellanox 5th generation network adapters (ConnectX series) core driver"
8	depends on PCI	8	depends on PCI
9	select NET_DEVLINK	9	select NET_DEVLINK
10	imply PTP_1588_CLOCK	10	depends on VXLAN \|\| !VXLAN
11	imply VXLAN	11	depends on MLXFW \|\| !MLXFW
12	imply MLXFW	12	depends on PTP_1588_CLOCK \|\| !PTP_1588_CLOCK
13	imply PCI_HYPERV_INTERFACE	13	depends on PCI_HYPERV_INTERFACE \|\| !PCI_HYPERV_INTERFACE
14	default n	14	default n
15	---help---	15	---help---
16	Core driver for low level functionality of the ConnectX-4 and	16	Core driver for low level functionality of the ConnectX-4 and

drivers/net/ethernet/mellanox/mlx5/core/cmd.c+5−1

 	}
 	cmd->ent_arr[ent->idx] = ent;
-	set_bit(MLX5_CMD_ENT_STATE_PENDING_COMP, &ent->state);
 	lay = get_inst(cmd, ent->idx);
 	ent->lay = lay;
 	memset(lay, 0, sizeof(*lay));
 	if (ent->callback)
 		schedule_delayed_work(&ent->cb_timeout_work, cb_timeout);
+	set_bit(MLX5_CMD_ENT_STATE_PENDING_COMP, &ent->state);
 	/* Skip sending command to fw if internal error */
 	if (pci_channel_offline(dev->pdev) ||
 		MLX5_SET(mbox_out, ent->out, syndrome, drv_synd);
 		mlx5_cmd_comp_handler(dev, 1UL << ent->idx, true);
+		/* no doorbell, no need to keep the entry */
+		free_ent(cmd, ent->idx);
+		if (ent->callback)
+			free_cmd(ent);
 		return;
 	}

drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c+3−3

@@ -935,7 +935,7 @@ struct mlx5_fw_tracer mlx5_fw_tracer_create(struct mlx5_core_dev dev) · 934 unmodified lines
935	return NULL;	935	return NULL;
936	}	936	}
937		937
938	tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);	938	tracer = kvzalloc(sizeof(*tracer), GFP_KERNEL);
939	if (!tracer)	939	if (!tracer)
940	return ERR_PTR(-ENOMEM);	940	return ERR_PTR(-ENOMEM);
941		941
@@ -982,7 +982,7 @@ destroy_workqueue: · 40 unmodified lines
982	tracer->dev = NULL;	982	tracer->dev = NULL;
983	destroy_workqueue(tracer->work_queue);	983	destroy_workqueue(tracer->work_queue);
984	free_tracer:	984	free_tracer:
985	kfree(tracer);	985	kvfree(tracer);
986	return ERR_PTR(err);	986	return ERR_PTR(err);
987	}	987	}
988		988
@@ -1061,7 +1061,7 @@ void mlx5_fw_tracer_destroy(struct mlx5_fw_tracer *tracer) · 72 unmodified lines
1061	mlx5_fw_tracer_destroy_log_buf(tracer);	1061	mlx5_fw_tracer_destroy_log_buf(tracer);
1062	flush_workqueue(tracer->work_queue);	1062	flush_workqueue(tracer->work_queue);
1063	destroy_workqueue(tracer->work_queue);	1063	destroy_workqueue(tracer->work_queue);
1064	kfree(tracer);	1064	kvfree(tracer);
1065	}	1065	}
1066		1066
1067	static int fw_tracer_event(struct notifier_block nb, unsigned long action, void data)	1067	static int fw_tracer_event(struct notifier_block nb, unsigned long action, void data)

drivers/net/ethernet/mellanox/mlx5/core/en.h+2−1

 	MLX5E_SQ_STATE_AM,
 	MLX5E_SQ_STATE_TLS,
 	MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE,
+	MLX5E_SQ_STATE_PENDING_XSK_TX,
 };
 struct mlx5e_sq_wqe_info {
 void mlx5e_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe);
 void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe);
 bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq);
-void mlx5e_poll_ico_cq(struct mlx5e_cq *cq);
+int mlx5e_poll_ico_cq(struct mlx5e_cq *cq);
 bool mlx5e_post_rx_mpwqes(struct mlx5e_rq *rq);
 void mlx5e_dealloc_rx_wqe(struct mlx5e_rq *rq, u16 ix);
 void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix);

drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c+12−11

 #include <net/flow_offload.h>
 #include <net/netfilter/nf_flow_table.h>
 #include <linux/workqueue.h>
+#include <linux/xarray.h>
 #include "esw/chains.h"
 #include "en/tc_ct.h"
 	struct mlx5_eswitch *esw;
 	const struct net_device *netdev;
 	struct idr fte_ids;
-	struct idr tuple_ids;
+	struct xarray tuple_ids;
 	struct rhashtable zone_ht;
 	struct mlx5_flow_table *ct;
 	struct mlx5_flow_table *ct_nat;
 	mlx5_eswitch_del_offloaded_rule(esw, zone_rule->rule, attr);
 	mlx5_modify_header_dealloc(esw->dev, attr->modify_hdr);
-	idr_remove(&ct_priv->tuple_ids, zone_rule->tupleid);
+	xa_erase(&ct_priv->tuple_ids, zone_rule->tupleid);
 }
 static void
 	struct mlx5_esw_flow_attr *attr = &zone_rule->attr;
 	struct mlx5_eswitch *esw = ct_priv->esw;
 	struct mlx5_flow_spec *spec = NULL;
-	u32 tupleid = 1;
+	u32 tupleid;
 	int err;
 	zone_rule->nat = nat;
 		return -ENOMEM;
 	/* Get tuple unique id */
-	err = idr_alloc_u32(&ct_priv->tuple_ids, zone_rule, &tupleid,
+	err = xa_alloc(&ct_priv->tuple_ids, &tupleid, zone_rule,
-			    TUPLE_ID_MAX, GFP_KERNEL);
+		       XA_LIMIT(1, TUPLE_ID_MAX), GFP_KERNEL);
 	if (err) {
 		netdev_warn(ct_priv->netdev,
 			    "Failed to allocate tuple id, err: %d\n", err);
-		goto err_idr_alloc;
+		goto err_xa_alloc;
 	}
 	zone_rule->tupleid = tupleid;
 err_rule:
 	mlx5_modify_header_dealloc(esw->dev, attr->modify_hdr);
 err_mod_hdr:
-	idr_remove(&ct_priv->tuple_ids, zone_rule->tupleid);
+	xa_erase(&ct_priv->tuple_ids, zone_rule->tupleid);
-err_idr_alloc:
+err_xa_alloc:
 	kfree(spec);
 	return err;
 }
 	}
 	idr_init(&ct_priv->fte_ids);
-	idr_init(&ct_priv->tuple_ids);
+	xa_init_flags(&ct_priv->tuple_ids, XA_FLAGS_ALLOC1);
 	mutex_init(&ct_priv->control_lock);
 	rhashtable_init(&ct_priv->zone_ht, &zone_params);
 	rhashtable_destroy(&ct_priv->zone_ht);
 	mutex_destroy(&ct_priv->control_lock);
-	idr_destroy(&ct_priv->tuple_ids);
+	xa_destroy(&ct_priv->tuple_ids);
 	idr_destroy(&ct_priv->fte_ids);
 	kfree(ct_priv);
 	if (!ct_priv || !tupleid)
 		return true;
-	zone_rule = idr_find(&ct_priv->tuple_ids, tupleid);
+	zone_rule = xa_load(&ct_priv->tuple_ids, tupleid);
 	if (!zone_rule)
 		return false;

drivers/net/ethernet/mellanox/mlx5/core/en/xsk/tx.c+3−0

@@ -33,6 +33,9 @@ int mlx5e_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags) · 32 unmodified lines
33	if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &c->xskicosq.state)))	33	if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &c->xskicosq.state)))
34	return 0;	34	return 0;
35		35
		36	if (test_and_set_bit(MLX5E_SQ_STATE_PENDING_XSK_TX, &c->xskicosq.state))
		37	return 0;
		38
36	spin_lock(&c->xskicosq_lock);	39	spin_lock(&c->xskicosq_lock);
37	mlx5e_trigger_irq(&c->xskicosq);	40	mlx5e_trigger_irq(&c->xskicosq);
38	spin_unlock(&c->xskicosq_lock);	41	spin_unlock(&c->xskicosq_lock);

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+6−1

 	struct mlx5e_vport_stats *vstats = &priv->stats.vport;
 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
-	if (!mlx5e_monitor_counter_supported(priv)) {
+	/* In switchdev mode, monitor counters doesn't monitor
+	 * rx/tx stats of 802_3. The update stats mechanism
+	 * should keep the 802_3 layout counters updated
+	 */
+	if (!mlx5e_monitor_counter_supported(priv) ||
+	    mlx5e_is_uplink_rep(priv)) {
 		/* update HW stats in background for next time */
 		mlx5e_queue_update_stats(priv);
 	}

drivers/net/ethernet/mellanox/mlx5/core/en_rep.c+2−7

 static int mlx5e_init_ul_rep_rx(struct mlx5e_priv *priv)
 {
-	int err = mlx5e_init_rep_rx(priv);
-	if (err)
-		return err;
 	mlx5e_create_q_counters(priv);
-	return 0;
+	return mlx5e_init_rep_rx(priv);
 }
 static void mlx5e_cleanup_ul_rep_rx(struct mlx5e_priv *priv)
 {
-	mlx5e_destroy_q_counters(priv);
 	mlx5e_cleanup_rep_rx(priv);
+	mlx5e_destroy_q_counters(priv);
 }
 static int mlx5e_init_uplink_rep_tx(struct mlx5e_rep_priv *rpriv)

drivers/net/ethernet/mellanox/mlx5/core/en_rx.c+5−3

 	return !!err;
 }
-void mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
+int mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
 {
 	struct mlx5e_icosq *sq = container_of(cq, struct mlx5e_icosq, cq);
 	struct mlx5_cqe64 *cqe;
 	int i;
 	if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
-		return;
+		return 0;
 	cqe = mlx5_cqwq_get_cqe(&cq->wq);
 	if (likely(!cqe))
-		return;
+		return 0;
 	/* sq->cc must be updated only after mlx5_cqwq_update_db_record(),
 	 * otherwise a cq overrun may occur
 	sq->cc = sqcc;
 	mlx5_cqwq_update_db_record(&cq->wq);
+	return i;
 }
 bool mlx5e_post_rx_mpwqes(struct mlx5e_rq *rq)

drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c+5−1

 				mlx5e_post_rx_wqes,
 				rq);
 	if (xsk_open) {
-		mlx5e_poll_ico_cq(&c->xskicosq.cq);
+		if (mlx5e_poll_ico_cq(&c->xskicosq.cq))
+			/* Don't clear the flag if nothing was polled to prevent
+			 * queueing more WQEs and overflowing XSKICOSQ.
+			 */
+			clear_bit(MLX5E_SQ_STATE_PENDING_XSK_TX, &c->xskicosq.state);
 		busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq);
 		busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq);
 	}

drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+9−9

@@ -1550,9 +1550,9 @@ static int esw_create_restore_table(struct mlx5_eswitch *esw) · 1549 unmodified lines
1550	MLX5_FLOW_NAMESPACE_KERNEL, 1,	1550	MLX5_FLOW_NAMESPACE_KERNEL, 1,
1551	modact);	1551	modact);
1552	if (IS_ERR(mod_hdr)) {	1552	if (IS_ERR(mod_hdr)) {
		1553	err = PTR_ERR(mod_hdr);
1553	esw_warn(dev, "Failed to create restore mod header, err: %d\n",	1554	esw_warn(dev, "Failed to create restore mod header, err: %d\n",
1554	err);	1555	err);
1555	err = PTR_ERR(mod_hdr);
1556	goto err_mod_hdr;	1556	goto err_mod_hdr;
1557	}	1557	}
1558		1558
@@ -2219,10 +2219,12 @@ static int esw_offloads_steering_init(struct mlx5_eswitch *esw) · 660 unmodified lines
2219	total_vports = num_vfs + MLX5_SPECIAL_VPORTS(esw->dev);	2219	total_vports = num_vfs + MLX5_SPECIAL_VPORTS(esw->dev);
2220		2220
2221	memset(&esw->fdb_table.offloads, 0, sizeof(struct offloads_fdb));	2221	memset(&esw->fdb_table.offloads, 0, sizeof(struct offloads_fdb));
		2222	mutex_init(&esw->fdb_table.offloads.vports.lock);
		2223	hash_init(esw->fdb_table.offloads.vports.table);
2222		2224
2223	err = esw_create_uplink_offloads_acl_tables(esw);	2225	err = esw_create_uplink_offloads_acl_tables(esw);
2224	if (err)	2226	if (err)
2225	return err;	2227	goto create_acl_err;
2226		2228
2227	err = esw_create_offloads_table(esw, total_vports);	2229	err = esw_create_offloads_table(esw, total_vports);
2228	if (err)	2230	if (err)
@@ -2240,9 +2242,6 @@ static int esw_offloads_steering_init(struct mlx5_eswitch *esw) · 11 unmodified lines
2240	if (err)	2242	if (err)
2241	goto create_fg_err;	2243	goto create_fg_err;
2242		2244
2243	mutex_init(&esw->fdb_table.offloads.vports.lock);
2244	hash_init(esw->fdb_table.offloads.vports.table);
2245
2246	return 0;	2245	return 0;
2247		2246
2248	create_fg_err:	2247	create_fg_err:
@@ -2253,18 +2252,19 @@ create_restore_err: · 4 unmodified lines
2253	esw_destroy_offloads_table(esw);	2252	esw_destroy_offloads_table(esw);
2254	create_offloads_err:	2253	create_offloads_err:
2255	esw_destroy_uplink_offloads_acl_tables(esw);	2254	esw_destroy_uplink_offloads_acl_tables(esw);
2256		2255	create_acl_err:
		2256	mutex_destroy(&esw->fdb_table.offloads.vports.lock);
2257	return err;	2257	return err;
2258	}	2258	}
2259		2259
2260	static void esw_offloads_steering_cleanup(struct mlx5_eswitch *esw)	2260	static void esw_offloads_steering_cleanup(struct mlx5_eswitch *esw)
2261	{	2261	{
2262	mutex_destroy(&esw->fdb_table.offloads.vports.lock);
2263	esw_destroy_vport_rx_group(esw);	2262	esw_destroy_vport_rx_group(esw);
2264	esw_destroy_offloads_fdb_tables(esw);	2263	esw_destroy_offloads_fdb_tables(esw);
2265	esw_destroy_restore_table(esw);	2264	esw_destroy_restore_table(esw);
2266	esw_destroy_offloads_table(esw);	2265	esw_destroy_offloads_table(esw);
2267	esw_destroy_uplink_offloads_acl_tables(esw);	2266	esw_destroy_uplink_offloads_acl_tables(esw);
		2267	mutex_destroy(&esw->fdb_table.offloads.vports.lock);
2268	}	2268	}
2269		2269
2270	static void	2270	static void
@@ -2377,9 +2377,9 @@ int esw_offloads_enable(struct mlx5_eswitch *esw) · 106 unmodified lines
2377	err_vports:	2377	err_vports:
2378	esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK);	2378	esw_offloads_unload_rep(esw, MLX5_VPORT_UPLINK);
2379	err_uplink:	2379	err_uplink:
2380	esw_set_passing_vport_metadata(esw, false);
2381	err_steering_init:
2382	esw_offloads_steering_cleanup(esw);	2380	esw_offloads_steering_cleanup(esw);
		2381	err_steering_init:
		2382	esw_set_passing_vport_metadata(esw, false);
2383	err_vport_metadata:	2383	err_vport_metadata:
2384	mlx5_rdma_disable_roce(esw->dev);	2384	mlx5_rdma_disable_roce(esw->dev);
2385	mutex_destroy(&esw->offloads.termtbl_mutex);	2385	mutex_destroy(&esw->offloads.termtbl_mutex);

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c+13−1

@@ -695,6 +695,12 @@ static void dr_cq_event(struct mlx5_core_cq *mcq, · 694 unmodified lines
695	pr_info("CQ event %u on CQ #%u\n", event, mcq->cqn);	695	pr_info("CQ event %u on CQ #%u\n", event, mcq->cqn);
696	}	696	}
697		697
		698	static void dr_cq_complete(struct mlx5_core_cq *mcq,
		699	struct mlx5_eqe *eqe)
		700	{
		701	pr_err("CQ completion CQ: #%u\n", mcq->cqn);
		702	}
		703
698	static struct mlx5dr_cq dr_create_cq(struct mlx5_core_dev mdev,	704	static struct mlx5dr_cq dr_create_cq(struct mlx5_core_dev mdev,
699	struct mlx5_uars_page *uar,	705	struct mlx5_uars_page *uar,
700	size_t ncqe)	706	size_t ncqe)
@@ -756,6 +762,7 @@ static struct mlx5dr_cq dr_create_cq(struct mlx5_core_dev mdev, · 55 unmodified lines
756	mlx5_fill_page_frag_array(&cq->wq_ctrl.buf, pas);	762	mlx5_fill_page_frag_array(&cq->wq_ctrl.buf, pas);
757		763
758	cq->mcq.event = dr_cq_event;	764	cq->mcq.event = dr_cq_event;
		765	cq->mcq.comp = dr_cq_complete;
759		766
760	err = mlx5_core_create_cq(mdev, &cq->mcq, in, inlen, out, sizeof(out));	767	err = mlx5_core_create_cq(mdev, &cq->mcq, in, inlen, out, sizeof(out));
761	kvfree(in);	768	kvfree(in);
@@ -767,7 +774,12 @@ static struct mlx5dr_cq dr_create_cq(struct mlx5_core_dev mdev, · 5 unmodified lines
767	cq->mcq.set_ci_db = cq->wq_ctrl.db.db;	774	cq->mcq.set_ci_db = cq->wq_ctrl.db.db;
768	cq->mcq.arm_db = cq->wq_ctrl.db.db + 1;	775	cq->mcq.arm_db = cq->wq_ctrl.db.db + 1;
769	*cq->mcq.set_ci_db = 0;	776	*cq->mcq.set_ci_db = 0;
770	*cq->mcq.arm_db = 0;	777
		778	/* set no-zero value, in order to avoid the HW to run db-recovery on
		779	* CQ that used in polling mode.
		780	*/
		781	*cq->mcq.arm_db = cpu_to_be32(2 << 28);
		782
771	cq->mcq.vector = 0;	783	cq->mcq.vector = 0;
772	cq->mcq.irqn = irqn;	784	cq->mcq.irqn = irqn;
773	cq->mcq.uar = uar;	785	cq->mcq.uar = uar;

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.c+2−2

@@ -380,7 +380,7 @@ struct mlxsw_afa_block mlxsw_afa_block_create(struct mlxsw_afa mlxsw_afa) · 379 unmodified lines
380		380
381	block = kzalloc(sizeof(*block), GFP_KERNEL);	381	block = kzalloc(sizeof(*block), GFP_KERNEL);
382	if (!block)	382	if (!block)
383	return NULL;	383	return ERR_PTR(-ENOMEM);
384	INIT_LIST_HEAD(&block->resource_list);	384	INIT_LIST_HEAD(&block->resource_list);
385	block->afa = mlxsw_afa;	385	block->afa = mlxsw_afa;
386		386
@@ -408,7 +408,7 @@ err_second_set_create: · 21 unmodified lines
408	mlxsw_afa_set_destroy(block->first_set);	408	mlxsw_afa_set_destroy(block->first_set);
409	err_first_set_create:	409	err_first_set_create:
410	kfree(block);	410	kfree(block);
411	return NULL;	411	return ERR_PTR(-ENOMEM);
412	}	412	}
413	EXPORT_SYMBOL(mlxsw_afa_block_create);	413	EXPORT_SYMBOL(mlxsw_afa_block_create);
414		414

drivers/net/ethernet/mellanox/mlxsw/spectrum2_acl_tcam.c+2−2

@@ -88,8 +88,8 @@ static int mlxsw_sp2_acl_tcam_init(struct mlxsw_sp mlxsw_sp, void priv, · 87 unmodified lines
88	* to be written using PEFA register to all indexes for all regions.	88	* to be written using PEFA register to all indexes for all regions.
89	*/	89	*/
90	afa_block = mlxsw_afa_block_create(mlxsw_sp->afa);	90	afa_block = mlxsw_afa_block_create(mlxsw_sp->afa);
91	if (!afa_block) {	91	if (IS_ERR(afa_block)) {
92	err = -ENOMEM;	92	err = PTR_ERR(afa_block);
93	goto err_afa_block;	93	goto err_afa_block;
94	}	94	}
95	err = mlxsw_afa_block_continue(afa_block);	95	err = mlxsw_afa_block_continue(afa_block);

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c+1−1

@@ -464,7 +464,7 @@ mlxsw_sp_acl_rulei_create(struct mlxsw_sp_acl *acl, · 463 unmodified lines
464		464
465	rulei = kzalloc(sizeof(*rulei), GFP_KERNEL);	465	rulei = kzalloc(sizeof(*rulei), GFP_KERNEL);
466	if (!rulei)	466	if (!rulei)
467	return NULL;	467	return ERR_PTR(-ENOMEM);
468		468
469	if (afa_block) {	469	if (afa_block) {
470	rulei->act_block = afa_block;	470	rulei->act_block = afa_block;

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c+10−2

@@ -986,8 +986,9 @@ mlxsw_sp_acl_tcam_vchunk_create(struct mlxsw_sp *mlxsw_sp, · 985 unmodified lines
986	unsigned int priority,	986	unsigned int priority,
987	struct mlxsw_afk_element_usage *elusage)	987	struct mlxsw_afk_element_usage *elusage)
988	{	988	{
		989	struct mlxsw_sp_acl_tcam_vchunk vchunk, vchunk2;
989	struct mlxsw_sp_acl_tcam_vregion *vregion;	990	struct mlxsw_sp_acl_tcam_vregion *vregion;
990	struct mlxsw_sp_acl_tcam_vchunk *vchunk;	991	struct list_head *pos;
991	int err;	992	int err;
992		993
993	if (priority == MLXSW_SP_ACL_TCAM_CATCHALL_PRIO)	994	if (priority == MLXSW_SP_ACL_TCAM_CATCHALL_PRIO)
@@ -1025,7 +1026,14 @@ mlxsw_sp_acl_tcam_vchunk_create(struct mlxsw_sp *mlxsw_sp, · 31 unmodified lines
1025	}	1026	}
1026		1027
1027	mlxsw_sp_acl_tcam_rehash_ctx_vregion_changed(vregion);	1028	mlxsw_sp_acl_tcam_rehash_ctx_vregion_changed(vregion);
1028	list_add_tail(&vchunk->list, &vregion->vchunk_list);	1029
		1030	/* Position the vchunk inside the list according to priority */
		1031	list_for_each(pos, &vregion->vchunk_list) {
		1032	vchunk2 = list_entry(pos, typeof(*vchunk2), list);
		1033	if (vchunk2->priority > priority)
		1034	break;
		1035	}
		1036	list_add_tail(&vchunk->list, pos);
1029	mutex_unlock(&vregion->lock);	1037	mutex_unlock(&vregion->lock);
1030		1038
1031	return vchunk;	1039	return vchunk;

drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c+2−1

 		err = mlxsw_sp_acl_rulei_act_count(mlxsw_sp, rulei, extack);
 		if (err)
 			return err;
-	} else if (act->hw_stats != FLOW_ACTION_HW_STATS_DISABLED) {
+	} else if (act->hw_stats != FLOW_ACTION_HW_STATS_DISABLED &&
+		   act->hw_stats != FLOW_ACTION_HW_STATS_DONT_CARE) {
 		NL_SET_ERR_MSG_MOD(extack, "Unsupported action HW stats type");
 		return -EOPNOTSUPP;
 	}

drivers/net/ethernet/mellanox/mlxsw/spectrum_mr_tcam.c+2−2

@@ -199,8 +199,8 @@ mlxsw_sp_mr_tcam_afa_block_create(struct mlxsw_sp *mlxsw_sp, · 198 unmodified lines
199	int err;	199	int err;
200		200
201	afa_block = mlxsw_afa_block_create(mlxsw_sp->afa);	201	afa_block = mlxsw_afa_block_create(mlxsw_sp->afa);
202	if (!afa_block)	202	if (IS_ERR(afa_block))
203	return ERR_PTR(-ENOMEM);	203	return afa_block;
204		204
205	err = mlxsw_afa_block_append_allocated_counter(afa_block,	205	err = mlxsw_afa_block_append_allocated_counter(afa_block,
206	counter_index);	206	counter_index);

drivers/net/ethernet/moxa/moxart_ether.c+1−1

@@ -564,7 +564,7 @@ static int moxart_remove(struct platform_device *pdev) · 563 unmodified lines
564	struct net_device *ndev = platform_get_drvdata(pdev);	564	struct net_device *ndev = platform_get_drvdata(pdev);
565		565
566	unregister_netdev(ndev);	566	unregister_netdev(ndev);
567	free_irq(ndev->irq, ndev);	567	devm_free_irq(&pdev->dev, ndev->irq, ndev);
568	moxart_mac_free_memory(ndev);	568	moxart_mac_free_memory(ndev);
569	free_netdev(ndev);	569	free_netdev(ndev);
570		570

drivers/net/ethernet/mscc/ocelot.c+11−6

@@ -1031,10 +1031,8 @@ int ocelot_fdb_dump(struct ocelot *ocelot, int port, · 1030 unmodified lines
1031	{	1031	{
1032	int i, j;	1032	int i, j;
1033		1033
1034	/* Loop through all the mac tables entries. There are 1024 rows of 4	1034	/* Loop through all the mac tables entries. */
1035	* entries.	1035	for (i = 0; i < ocelot->num_mact_rows; i++) {
1036	*/
1037	for (i = 0; i < 1024; i++) {
1038	for (j = 0; j < 4; j++) {	1036	for (j = 0; j < 4; j++) {
1039	struct ocelot_mact_entry entry;	1037	struct ocelot_mact_entry entry;
1040	bool is_static;	1038	bool is_static;
@@ -1453,8 +1451,15 @@ static void ocelot_port_attr_stp_state_set(struct ocelot *ocelot, int port, · 412 unmodified lines
1453		1451
1454	void ocelot_set_ageing_time(struct ocelot *ocelot, unsigned int msecs)	1452	void ocelot_set_ageing_time(struct ocelot *ocelot, unsigned int msecs)
1455	{	1453	{
1456	ocelot_write(ocelot, ANA_AUTOAGE_AGE_PERIOD(msecs / 2),	1454	unsigned int age_period = ANA_AUTOAGE_AGE_PERIOD(msecs / 2000);
1457	ANA_AUTOAGE);	1455
		1456	/* Setting AGE_PERIOD to zero effectively disables automatic aging,
		1457	* which is clearly not what our intention is. So avoid that.
		1458	*/
		1459	if (!age_period)
		1460	age_period = 1;
		1461
		1462	ocelot_rmw(ocelot, age_period, ANA_AUTOAGE_AGE_PERIOD_M, ANA_AUTOAGE);
1458	}	1463	}
1459	EXPORT_SYMBOL(ocelot_set_ageing_time);	1464	EXPORT_SYMBOL(ocelot_set_ageing_time);
1460		1465

drivers/net/ethernet/mscc/ocelot_regs.c+1−0

@@ -431,6 +431,7 @@ int ocelot_chip_init(struct ocelot ocelot, const struct ocelot_ops ops) · 430 unmodified lines
431	ocelot->stats_layout = ocelot_stats_layout;	431	ocelot->stats_layout = ocelot_stats_layout;
432	ocelot->num_stats = ARRAY_SIZE(ocelot_stats_layout);	432	ocelot->num_stats = ARRAY_SIZE(ocelot_stats_layout);
433	ocelot->shared_queue_sz = 224 * 1024;	433	ocelot->shared_queue_sz = 224 * 1024;
		434	ocelot->num_mact_rows = 1024;
434	ocelot->ops = ops;	435	ocelot->ops = ops;
435		436
436	ret = ocelot_regfields_init(ocelot, ocelot_regfields);	437	ret = ocelot_regfields_init(ocelot, ocelot_regfields);

drivers/net/ethernet/natsemi/jazzsonic.c+4−2

 	err = register_netdev(dev);
 	if (err)
-		goto out1;
+		goto undo_probe1;
 	return 0;
-out1:
+undo_probe1:
+	dma_free_coherent(lp->device, SIZEOF_SONIC_DESC * SONIC_BUS_SCALE(lp->dma_bitmode),
+			  lp->descriptors, lp->descriptors_laddr);
 	release_mem_region(dev->base_addr, SONIC_MEM_SIZE);
 out:
 	free_netdev(dev);

drivers/net/ethernet/netronome/nfp/abm/main.c+1−0

@@ -283,6 +283,7 @@ nfp_abm_vnic_set_mac(struct nfp_pf pf, struct nfp_abm abm, struct nfp_net *nn, · 282 unmodified lines
283	if (!nfp_nsp_has_hwinfo_lookup(nsp)) {	283	if (!nfp_nsp_has_hwinfo_lookup(nsp)) {
284	nfp_warn(pf->cpp, "NSP doesn't support PF MAC generation\n");	284	nfp_warn(pf->cpp, "NSP doesn't support PF MAC generation\n");
285	eth_hw_addr_random(nn->dp.netdev);	285	eth_hw_addr_random(nn->dp.netdev);
		286	nfp_nsp_close(nsp);
286	return;	287	return;
287	}	288	}
288		289

drivers/net/ethernet/pensando/ionic/ionic_debugfs.c+1−2

@@ -170,8 +170,7 @@ void ionic_debugfs_add_qcq(struct ionic_lif lif, struct ionic_qcq qcq) · 169 unmodified lines
170	debugfs_create_x64("base_pa", 0400, cq_dentry, &cq->base_pa);	170	debugfs_create_x64("base_pa", 0400, cq_dentry, &cq->base_pa);
171	debugfs_create_u32("num_descs", 0400, cq_dentry, &cq->num_descs);	171	debugfs_create_u32("num_descs", 0400, cq_dentry, &cq->num_descs);
172	debugfs_create_u32("desc_size", 0400, cq_dentry, &cq->desc_size);	172	debugfs_create_u32("desc_size", 0400, cq_dentry, &cq->desc_size);
173	debugfs_create_u8("done_color", 0400, cq_dentry,	173	debugfs_create_bool("done_color", 0400, cq_dentry, &cq->done_color);
174	(u8 *)&cq->done_color);
175		174
176	debugfs_create_file("tail", 0400, cq_dentry, cq, &cq_tail_fops);	175	debugfs_create_file("tail", 0400, cq_dentry, cq, &cq_tail_fops);
177		176

drivers/net/ethernet/pensando/ionic/ionic_lif.c+2−2

 		ionic_txrx_free(lif);
 	}
 	ionic_lifs_deinit(ionic);
+	ionic_reset(ionic);
 	ionic_qcqs_free(lif);
 	dev_info(ionic->dev, "FW Down: LIFs stopped\n");
 	dev_info(ionic->dev, "FW Up: restarting LIFs\n");
+	ionic_init_devinfo(ionic);
 	err = ionic_qcqs_alloc(lif);
 	if (err)
 		goto err_out;
 		dev_err(ionic->dev, "Cannot register net device, aborting\n");
 		return err;
 	}
-	ionic_link_status_check_request(ionic->master_lif);
 	ionic->master_lif->registered = true;
 	return 0;

drivers/net/ethernet/sgi/meth.h+0−16

@@ -1,19 +1,3 @@
1
2	/*
3	* snull.h -- definitions for the network module
4	*
5	* Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet
6	* Copyright (C) 2001 O'Reilly & Associates
7	*
8	* The source code in this file can be freely used, adapted,
9	* and redistributed in source or binary form, so long as an
10	* acknowledgment appears in derived source files. The citation
11	* should list that the code comes from the book "Linux Device
12	* Drivers" by Alessandro Rubini and Jonathan Corbet, published
13	* by O'Reilly & Associates. No warranty is attached;
14	* we cannot take responsibility for errors or fitness for use.
15	*/
16
17	/* version dependencies have been confined to a separate file */	1	/* version dependencies have been confined to a separate file */
18		2
19	/* Tunable parameters */	3	/* Tunable parameters */

drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c+189−0

@@ -5,8 +5,13 @@ · 4 unmodified lines
5	#include <linux/clk-provider.h>	5	#include <linux/clk-provider.h>
6	#include <linux/pci.h>	6	#include <linux/pci.h>
7	#include <linux/dmi.h>	7	#include <linux/dmi.h>
		8	#include "dwmac-intel.h"
8	#include "stmmac.h"	9	#include "stmmac.h"
9		10
		11	struct intel_priv_data {
		12	int mdio_adhoc_addr; /* mdio address for serdes & etc */
		13	};
		14
10	/* This struct is used to associate PCI Function of MAC controller on a board,	15	/* This struct is used to associate PCI Function of MAC controller on a board,
11	* discovered via DMI, with the address of PHY connected to the MAC. The	16	* discovered via DMI, with the address of PHY connected to the MAC. The
12	* negative value of the address means that MAC controller is not connected	17	* negative value of the address means that MAC controller is not connected
@@ -49,6 +54,172 @@ static int stmmac_pci_find_phy_addr(struct pci_dev *pdev, · 36 unmodified lines
49	return -ENODEV;	54	return -ENODEV;
50	}	55	}
51		56
		57	static int serdes_status_poll(struct stmmac_priv *priv, int phyaddr,
		58	int phyreg, u32 mask, u32 val)
		59	{
		60	unsigned int retries = 10;
		61	int val_rd;
		62
		63	do {
		64	val_rd = mdiobus_read(priv->mii, phyaddr, phyreg);
		65	if ((val_rd & mask) == (val & mask))
		66	return 0;
		67	udelay(POLL_DELAY_US);
		68	} while (--retries);
		69
		70	return -ETIMEDOUT;
		71	}
		72
		73	static int intel_serdes_powerup(struct net_device ndev, void priv_data)
		74	{
		75	struct intel_priv_data *intel_priv = priv_data;
		76	struct stmmac_priv *priv = netdev_priv(ndev);
		77	int serdes_phy_addr = 0;
		78	u32 data = 0;
		79
		80	if (!intel_priv->mdio_adhoc_addr)
		81	return 0;
		82
		83	serdes_phy_addr = intel_priv->mdio_adhoc_addr;
		84
		85	/* assert clk_req */
		86	data = mdiobus_read(priv->mii, serdes_phy_addr,
		87	SERDES_GCR0);
		88
		89	data \|= SERDES_PLL_CLK;
		90
		91	mdiobus_write(priv->mii, serdes_phy_addr,
		92	SERDES_GCR0, data);
		93
		94	/* check for clk_ack assertion */
		95	data = serdes_status_poll(priv, serdes_phy_addr,
		96	SERDES_GSR0,
		97	SERDES_PLL_CLK,
		98	SERDES_PLL_CLK);
		99
		100	if (data) {
		101	dev_err(priv->device, "Serdes PLL clk request timeout\n");
		102	return data;
		103	}
		104
		105	/* assert lane reset */
		106	data = mdiobus_read(priv->mii, serdes_phy_addr,
		107	SERDES_GCR0);
		108
		109	data \|= SERDES_RST;
		110
		111	mdiobus_write(priv->mii, serdes_phy_addr,
		112	SERDES_GCR0, data);
		113
		114	/* check for assert lane reset reflection */
		115	data = serdes_status_poll(priv, serdes_phy_addr,
		116	SERDES_GSR0,
		117	SERDES_RST,
		118	SERDES_RST);
		119
		120	if (data) {
		121	dev_err(priv->device, "Serdes assert lane reset timeout\n");
		122	return data;
		123	}
		124
		125	/* move power state to P0 */
		126	data = mdiobus_read(priv->mii, serdes_phy_addr,
		127	SERDES_GCR0);
		128
		129	data &= ~SERDES_PWR_ST_MASK;
		130	data \|= SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT;
		131
		132	mdiobus_write(priv->mii, serdes_phy_addr,
		133	SERDES_GCR0, data);
		134
		135	/* Check for P0 state */
		136	data = serdes_status_poll(priv, serdes_phy_addr,
		137	SERDES_GSR0,
		138	SERDES_PWR_ST_MASK,
		139	SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT);
		140
		141	if (data) {
		142	dev_err(priv->device, "Serdes power state P0 timeout.\n");
		143	return data;
		144	}
		145
		146	return 0;
		147	}
		148
		149	static void intel_serdes_powerdown(struct net_device ndev, void intel_data)
		150	{
		151	struct intel_priv_data *intel_priv = intel_data;
		152	struct stmmac_priv *priv = netdev_priv(ndev);
		153	int serdes_phy_addr = 0;
		154	u32 data = 0;
		155
		156	if (!intel_priv->mdio_adhoc_addr)
		157	return;
		158
		159	serdes_phy_addr = intel_priv->mdio_adhoc_addr;
		160
		161	/* move power state to P3 */
		162	data = mdiobus_read(priv->mii, serdes_phy_addr,
		163	SERDES_GCR0);
		164
		165	data &= ~SERDES_PWR_ST_MASK;
		166	data \|= SERDES_PWR_ST_P3 << SERDES_PWR_ST_SHIFT;
		167
		168	mdiobus_write(priv->mii, serdes_phy_addr,
		169	SERDES_GCR0, data);
		170
		171	/* Check for P3 state */
		172	data = serdes_status_poll(priv, serdes_phy_addr,
		173	SERDES_GSR0,
		174	SERDES_PWR_ST_MASK,
		175	SERDES_PWR_ST_P3 << SERDES_PWR_ST_SHIFT);
		176
		177	if (data) {
		178	dev_err(priv->device, "Serdes power state P3 timeout\n");
		179	return;
		180	}
		181
		182	/* de-assert clk_req */
		183	data = mdiobus_read(priv->mii, serdes_phy_addr,
		184	SERDES_GCR0);
		185
		186	data &= ~SERDES_PLL_CLK;
		187
		188	mdiobus_write(priv->mii, serdes_phy_addr,
		189	SERDES_GCR0, data);
		190
		191	/* check for clk_ack de-assert */
		192	data = serdes_status_poll(priv, serdes_phy_addr,
		193	SERDES_GSR0,
		194	SERDES_PLL_CLK,
		195	(u32)~SERDES_PLL_CLK);
		196
		197	if (data) {
		198	dev_err(priv->device, "Serdes PLL clk de-assert timeout\n");
		199	return;
		200	}
		201
		202	/* de-assert lane reset */
		203	data = mdiobus_read(priv->mii, serdes_phy_addr,
		204	SERDES_GCR0);
		205
		206	data &= ~SERDES_RST;
		207
		208	mdiobus_write(priv->mii, serdes_phy_addr,
		209	SERDES_GCR0, data);
		210
		211	/* check for de-assert lane reset reflection */
		212	data = serdes_status_poll(priv, serdes_phy_addr,
		213	SERDES_GSR0,
		214	SERDES_RST,
		215	(u32)~SERDES_RST);
		216
		217	if (data) {
		218	dev_err(priv->device, "Serdes de-assert lane reset timeout\n");
		219	return;
		220	}
		221	}
		222
52	static void common_default_data(struct plat_stmmacenet_data *plat)	223	static void common_default_data(struct plat_stmmacenet_data *plat)
53	{	224	{
54	plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */	225	plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
@@ -189,6 +360,9 @@ static int ehl_sgmii_data(struct pci_dev *pdev, · 134 unmodified lines
189	plat->phy_addr = 0;	360	plat->phy_addr = 0;
190	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;	361	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
191		362
		363	plat->serdes_powerup = intel_serdes_powerup;
		364	plat->serdes_powerdown = intel_serdes_powerdown;
		365
192	return ehl_common_data(pdev, plat);	366	return ehl_common_data(pdev, plat);
193	}	367	}
194		368
@@ -233,6 +407,8 @@ static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev, · 38 unmodified lines
233	struct plat_stmmacenet_data *plat)	407	struct plat_stmmacenet_data *plat)
234	{	408	{
235	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;	409	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
		410	plat->serdes_powerup = intel_serdes_powerup;
		411	plat->serdes_powerdown = intel_serdes_powerdown;
236	return ehl_pse0_common_data(pdev, plat);	412	return ehl_pse0_common_data(pdev, plat);
237	}	413	}
238		414
@@ -263,6 +439,8 @@ static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev, · 24 unmodified lines
263	struct plat_stmmacenet_data *plat)	439	struct plat_stmmacenet_data *plat)
264	{	440	{
265	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;	441	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
		442	plat->serdes_powerup = intel_serdes_powerup;
		443	plat->serdes_powerdown = intel_serdes_powerdown;
266	return ehl_pse1_common_data(pdev, plat);	444	return ehl_pse1_common_data(pdev, plat);
267	}	445	}
268		446
@@ -291,6 +469,8 @@ static int tgl_sgmii_data(struct pci_dev *pdev, · 22 unmodified lines
291	plat->bus_id = 1;	469	plat->bus_id = 1;
292	plat->phy_addr = 0;	470	plat->phy_addr = 0;
293	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;	471	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
		472	plat->serdes_powerup = intel_serdes_powerup;
		473	plat->serdes_powerdown = intel_serdes_powerdown;
294	return tgl_common_data(pdev, plat);	474	return tgl_common_data(pdev, plat);
295	}	475	}
296		476
@@ -417,11 +597,17 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, · 120 unmodified lines
417	const struct pci_device_id *id)	597	const struct pci_device_id *id)
418	{	598	{
419	struct stmmac_pci_info info = (struct stmmac_pci_info )id->driver_data;	599	struct stmmac_pci_info info = (struct stmmac_pci_info )id->driver_data;
		600	struct intel_priv_data *intel_priv;
420	struct plat_stmmacenet_data *plat;	601	struct plat_stmmacenet_data *plat;
421	struct stmmac_resources res;	602	struct stmmac_resources res;
422	int i;	603	int i;
423	int ret;	604	int ret;
424		605
		606	intel_priv = devm_kzalloc(&pdev->dev, sizeof(*intel_priv),
		607	GFP_KERNEL);
		608	if (!intel_priv)
		609	return -ENOMEM;
		610
425	plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);	611	plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
426	if (!plat)	612	if (!plat)
427	return -ENOMEM;	613	return -ENOMEM;
@@ -457,6 +643,9 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, · 29 unmodified lines
457		643
458	pci_set_master(pdev);	644	pci_set_master(pdev);
459		645
		646	plat->bsp_priv = intel_priv;
		647	intel_priv->mdio_adhoc_addr = 0x15;
		648
460	ret = info->setup(pdev, plat);	649	ret = info->setup(pdev, plat);
461	if (ret)	650	if (ret)
462	return ret;	651	return ret;

drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h+23−0

@@ -0,0 +1,23 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/* Copyright (c) 2020, Intel Corporation
	3	* DWMAC Intel header file
	4	*/
	5
	6	#ifndef __DWMAC_INTEL_H__
	7	#define __DWMAC_INTEL_H__
	8
	9	#define POLL_DELAY_US 8
	10
	11	/* SERDES Register */
	12	#define SERDES_GSR0 0x5 /* Global Status Reg0 */
	13	#define SERDES_GCR0 0xb /* Global Configuration Reg0 */
	14
	15	/* SERDES defines */
	16	#define SERDES_PLL_CLK BIT(0) /* PLL clk valid signal */
	17	#define SERDES_RST BIT(2) /* Serdes Reset */
	18	#define SERDES_PWR_ST_MASK GENMASK(6, 4) /* Serdes Power state*/
	19	#define SERDES_PWR_ST_SHIFT 4
	20	#define SERDES_PWR_ST_P0 0x0
	21	#define SERDES_PWR_ST_P3 0x3
	22
	23	#endif /* __DWMAC_INTEL_H__ */

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c+1−0

@@ -119,6 +119,7 @@ static int meson8b_init_rgmii_tx_clk(struct meson8b_dwmac *dwmac) · 118 unmodified lines
119	{ .div = 5, .val = 5, },	119	{ .div = 5, .val = 5, },
120	{ .div = 6, .val = 6, },	120	{ .div = 6, .val = 6, },
121	{ .div = 7, .val = 7, },	121	{ .div = 7, .val = 7, },
		122	{ /* end of array */ }
122	};	123	};
123		124
124	clk_configs = devm_kzalloc(dev, sizeof(*clk_configs), GFP_KERNEL);	125	clk_configs = devm_kzalloc(dev, sizeof(*clk_configs), GFP_KERNEL);

drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c+6−3

 	    phymode == PHY_INTERFACE_MODE_MII ||
 	    phymode == PHY_INTERFACE_MODE_GMII ||
 	    phymode == PHY_INTERFACE_MODE_SGMII) {
-		ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
 		regmap_read(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG,
 			    &module);
 		module |= (SYSMGR_FPGAGRP_MODULE_EMAC << (reg_shift / 2));
 		regmap_write(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG,
 			     module);
-	} else {
-		ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2));
 	}
+	if (dwmac->f2h_ptp_ref_clk)
+		ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
+	else
+		ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK <<
+			  (reg_shift / 2));
 	regmap_write(sys_mgr_base_addr, reg_offset, ctrl);
 	/* Deassert reset for the phy configuration to be sampled by

drivers/net/ethernet/stmicro/stmmac/dwmac5.c+1−1

@@ -624,7 +624,7 @@ int dwmac5_est_configure(void __iomem ioaddr, struct stmmac_est cfg, · 623 unmodified lines
624	total_offset += offset;	624	total_offset += offset;
625	}	625	}
626		626
627	total_ctr = cfg->ctr[0] + cfg->ctr[1] * 1000000000;	627	total_ctr = cfg->ctr[0] + cfg->ctr[1] * 1000000000ULL;
628	total_ctr += total_offset;	628	total_ctr += total_offset;
629		629
630	ctr_low = do_div(total_ctr, 1000000000);	630	ctr_low = do_div(total_ctr, 1000000000);

drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c+8−4

 	unsigned long data;
 	u32 reg_value;
-	/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
+	/* For GMAC3.x, 4.x versions, in "fine adjustement mode" set sub-second
-	 *	formula = (1/ptp_clock) * 1000000000
+	 * increment to twice the number of nanoseconds of a clock cycle.
-	 * where ptp_clock is 50MHz if fine method is used to update system
+	 * The calculation of the default_addend value by the caller will set it
+	 * to mid-range = 2^31 when the remainder of this division is zero,
+	 * which will make the accumulator overflow once every 2 ptp_clock
+	 * cycles, adding twice the number of nanoseconds of a clock cycle :
+	 * 2000000000ULL / ptp_clock.
 	 */
 	if (value & PTP_TCR_TSCFUPDT)
-		data = (1000000000ULL / 50000000);
+		data = (2000000000ULL / ptp_clock);
 	else
 		data = (1000000000ULL / ptp_clock);

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+26−6

 /**
  *  stmmac_interrupt - main ISR
  *  @irq: interrupt number.
- *  @dev_id: to pass the net device pointer.
+ *  @dev_id: to pass the net device pointer (must be valid).
  *  Description: this is the main driver interrupt service routine.
  *  It can call:
  *  o DMA service routine (to manage incoming frame reception and transmission
 	if (priv->irq_wake)
 		pm_wakeup_event(priv->device, 0);
-	if (unlikely(!dev)) {
-		netdev_err(priv->dev, "%s: invalid dev pointer\n", __func__);
-		return IRQ_NONE;
-	}
 	/* Check if adapter is up */
 	if (test_bit(STMMAC_DOWN, &priv->state))
 		return IRQ_HANDLED;
 		goto error_netdev_register;
 	}
+	if (priv->plat->serdes_powerup) {
+		ret = priv->plat->serdes_powerup(ndev,
+						 priv->plat->bsp_priv);
+		if (ret < 0)
+			goto error_serdes_powerup;
+	}
 #ifdef CONFIG_DEBUG_FS
 	stmmac_init_fs(ndev);
 #endif
 	return ret;
+error_serdes_powerup:
+	unregister_netdev(ndev);
 error_netdev_register:
 	phylink_destroy(priv->phylink);
 error_phy_setup:
 	stmmac_stop_all_dma(priv);
+	if (priv->plat->serdes_powerdown)
+		priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv);
 	stmmac_mac_set(priv, priv->ioaddr, false);
 	netif_carrier_off(ndev);
 	unregister_netdev(ndev);
 	/* Stop TX/RX DMA */
 	stmmac_stop_all_dma(priv);
+	if (priv->plat->serdes_powerdown)
+		priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv);
 	/* Enable Power down mode by programming the PMT regs */
 	if (device_may_wakeup(priv->device)) {
 		stmmac_pmt(priv, priv->hw, priv->wolopts);
 {
 	struct net_device *ndev = dev_get_drvdata(dev);
 	struct stmmac_priv *priv = netdev_priv(ndev);
+	int ret;
 	if (!netif_running(ndev))
 		return 0;
 			stmmac_mdio_reset(priv->mii);
 	}
+	if (priv->plat->serdes_powerup) {
+		ret = priv->plat->serdes_powerup(ndev,
+						 priv->plat->bsp_priv);
+		if (ret < 0)
+			return ret;
+	}
 	netif_device_attach(ndev);
 	mutex_lock(&priv->lock);

drivers/net/ethernet/ti/Kconfig+1−2

 config TI_CPTS_MOD
 	tristate
 	depends on TI_CPTS
+	depends on PTP_1588_CLOCK
 	default y if TI_CPSW=y || TI_KEYSTONE_NETCP=y || TI_CPSW_SWITCHDEV=y
-	select NET_PTP_CLASSIFY
-	imply PTP_1588_CLOCK
 	default m
 config TI_K3_AM65_CPSW_NUSS

drivers/net/ethernet/ti/am65-cpsw-nuss.c+3−2

 		ret = devm_request_irq(dev, tx_chn->irq,
 				       am65_cpsw_nuss_tx_irq,
-				       0, tx_chn->tx_chn_name, tx_chn);
+				       IRQF_TRIGGER_HIGH,
+				       tx_chn->tx_chn_name, tx_chn);
 		if (ret) {
 			dev_err(dev, "failure requesting tx%u irq %u, %d\n",
 				tx_chn->id, tx_chn->irq, ret);
 	ret = devm_request_irq(dev, common->rx_chns.irq,
 			       am65_cpsw_nuss_rx_irq,
-			       0, dev_name(dev), common);
+			       IRQF_TRIGGER_HIGH, dev_name(dev), common);
 	if (ret) {
 		dev_err(dev, "failure requesting rx irq %u, %d\n",
 			common->rx_chns.irq, ret);

drivers/net/ethernet/toshiba/tc35815.c+1−1

@@ -643,7 +643,7 @@ static int tc_mii_probe(struct net_device *dev) · 642 unmodified lines
643	linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, mask);	643	linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, mask);
644	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, mask);	644	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, mask);
645	}	645	}
646	linkmode_and(phydev->supported, phydev->supported, mask);	646	linkmode_andnot(phydev->supported, phydev->supported, mask);
647	linkmode_copy(phydev->advertising, phydev->supported);	647	linkmode_copy(phydev->advertising, phydev->supported);
648		648
649	lp->link = 0;	649	lp->link = 0;

drivers/net/ethernet/xscale/ixp4xx_eth.c+2−0

@@ -1387,6 +1387,8 @@ static int ixp4xx_eth_probe(struct platform_device *pdev) · 1386 unmodified lines
1387	return -ENODEV;	1387	return -ENODEV;
1388	regs_phys = res->start;	1388	regs_phys = res->start;
1389	port->regs = devm_ioremap_resource(dev, res);	1389	port->regs = devm_ioremap_resource(dev, res);
		1390	if (IS_ERR(port->regs))
		1391	return PTR_ERR(port->regs);
1390		1392
1391	switch (port->id) {	1393	switch (port->id) {
1392	case IXP4XX_ETH_NPEA:	1394	case IXP4XX_ETH_NPEA:

drivers/net/geneve.c+1−1

@@ -1207,7 +1207,7 @@ static int geneve_validate(struct nlattr tb[], struct nlattr data[], · 1206 unmodified lines
1207	enum ifla_geneve_df df = nla_get_u8(data[IFLA_GENEVE_DF]);	1207	enum ifla_geneve_df df = nla_get_u8(data[IFLA_GENEVE_DF]);
1208		1208
1209	if (df < 0 \|\| df > GENEVE_DF_MAX) {	1209	if (df < 0 \|\| df > GENEVE_DF_MAX) {
1210	NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_GENEVE_DF],	1210	NL_SET_ERR_MSG_ATTR(extack, data[IFLA_GENEVE_DF],
1211	"Invalid DF attribute");	1211	"Invalid DF attribute");
1212	return -EINVAL;	1212	return -EINVAL;
1213	}	1213	}

drivers/net/gtp.c+5−4

 static struct genl_family gtp_genl_family;
 static int gtp_genl_fill_info(struct sk_buff *skb, u32 snd_portid, u32 snd_seq,
-			      u32 type, struct pdp_ctx *pctx)
+			      int flags, u32 type, struct pdp_ctx *pctx)
 {
 	void *genlh;
-	genlh = genlmsg_put(skb, snd_portid, snd_seq, &gtp_genl_family, 0,
+	genlh = genlmsg_put(skb, snd_portid, snd_seq, &gtp_genl_family, flags,
 			    type);
 	if (genlh == NULL)
 		goto nlmsg_failure;
 		goto err_unlock;
 	}
-	err = gtp_genl_fill_info(skb2, NETLINK_CB(skb).portid,
+	err = gtp_genl_fill_info(skb2, NETLINK_CB(skb).portid, info->snd_seq,
-				 info->snd_seq, info->nlhdr->nlmsg_type, pctx);
+				 0, info->nlhdr->nlmsg_type, pctx);
 	if (err < 0)
 		goto err_unlock_free;
 				    gtp_genl_fill_info(skb,
 					    NETLINK_CB(cb->skb).portid,
 					    cb->nlh->nlmsg_seq,
+					    NLM_F_MULTI,
 					    cb->nlh->nlmsg_type, pctx)) {
 					cb->args[0] = i;
 					cb->args[1] = j;

drivers/net/hyperv/netvsc_drv.c+2−1

@@ -707,7 +707,8 @@ no_memory: · 706 unmodified lines
707	goto drop;	707	goto drop;
708	}	708	}
709		709
710	static int netvsc_start_xmit(struct sk_buff skb, struct net_device ndev)	710	static netdev_tx_t netvsc_start_xmit(struct sk_buff *skb,
		711	struct net_device *ndev)
711	{	712	{
712	return netvsc_xmit(skb, ndev, false);	713	return netvsc_xmit(skb, ndev, false);
713	}	714	}

drivers/net/ipa/gsi.c+9−2

 	complete(&gsi->completion);
 }
 /* Inter-EE interrupt handler */
 static void gsi_isr_glob_ee(struct gsi *gsi)
 {
 	struct completion *completion = &gsi->completion;
 	u32 val;
+	/* First zero the result code field */
+	val = ioread32(gsi->virt + GSI_CNTXT_SCRATCH_0_OFFSET);
+	val &= ~GENERIC_EE_RESULT_FMASK;
+	iowrite32(val, gsi->virt + GSI_CNTXT_SCRATCH_0_OFFSET);
+	/* Now issue the command */
 	val = u32_encode_bits(opcode, GENERIC_OPCODE_FMASK);
 	val |= u32_encode_bits(channel_id, GENERIC_CHID_FMASK);
 	val |= u32_encode_bits(GSI_EE_MODEM, GENERIC_EE_FMASK);
 	/* Worst case we need an event for every outstanding TRE */
 	if (data->channel.tre_count > data->channel.event_count) {
-		dev_warn(gsi->dev, "channel %u limited to %u TREs\n",
-			data->channel_id, data->channel.tre_count);
 		tre_count = data->channel.event_count;
+		dev_warn(gsi->dev, "channel %u limited to %u TREs\n",
+			 data->channel_id, tre_count);
 	} else {
 		tre_count = data->channel.tre_count;
 	}

drivers/net/ipa/gsi_reg.h+2−0

 #define INTER_EE_RESULT_FMASK		GENMASK(2, 0)
 #define GENERIC_EE_RESULT_FMASK		GENMASK(7, 5)
 #define GENERIC_EE_SUCCESS_FVAL			1
+#define GENERIC_EE_INCORRECT_DIRECTION_FVAL	3
+#define GENERIC_EE_INCORRECT_CHANNEL_FVAL	5
 #define GENERIC_EE_NO_RESOURCES_FVAL		7
 #define USB_MAX_PACKET_FMASK		GENMASK(15, 15)	/* 0: HS; 1: SS */
 #define MHI_BASE_CHANNEL_FMASK		GENMASK(31, 24)

drivers/net/ipa/ipa_endpoint.c+2−5

  */
 int ipa_endpoint_stop(struct ipa_endpoint *endpoint)
 {
-	u32 retries = endpoint->toward_ipa ? 0 : IPA_ENDPOINT_STOP_RX_RETRIES;
+	u32 retries = IPA_ENDPOINT_STOP_RX_RETRIES;
 	int ret;
 	do {
 		struct gsi *gsi = &ipa->gsi;
 		ret = gsi_channel_stop(gsi, endpoint->channel_id);
-		if (ret != -EAGAIN)
+		if (ret != -EAGAIN || endpoint->toward_ipa)
 			break;
-		if (endpoint->toward_ipa)
-			continue;
 		/* For IPA v3.5.1, send a DMA read task and check again */
 		if (ipa->version == IPA_VERSION_3_5_1) {
 			ret = ipa_endpoint_stop_rx_dma(ipa);

drivers/net/macsec.c+12−6

 	struct crypto_aead *tfm;
 	int ret;
-	tfm = crypto_alloc_aead("gcm(aes)", 0, 0);
+	/* Pick a sync gcm(aes) cipher to ensure order is preserved. */
+	tfm = crypto_alloc_aead("gcm(aes)", 0, CRYPTO_ALG_ASYNC);
 	if (IS_ERR(tfm))
 		return tfm;
 	if (ret)
 		goto rollback;
-	rtnl_unlock();
 	/* Force features update, since they are different for SW MACSec and
 	 * HW offloading cases.
 	 */
 	netdev_update_features(dev);
+	rtnl_unlock();
 	return 0;
 rollback:
 			  struct netlink_ext_ack *extack)
 {
 	struct macsec_dev *macsec = macsec_priv(dev);
+	rx_handler_func_t *rx_handler;
+	u8 icv_len = DEFAULT_ICV_LEN;
 	struct net_device *real_dev;
-	int err;
+	int err, mtu;
 	sci_t sci;
-	u8 icv_len = DEFAULT_ICV_LEN;
-	rx_handler_func_t *rx_handler;
 	if (!tb[IFLA_LINK])
 		return -EINVAL;
 	if (data && data[IFLA_MACSEC_ICV_LEN])
 		icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]);
-	dev->mtu = real_dev->mtu - icv_len - macsec_extra_len(true);
+	mtu = real_dev->mtu - icv_len - macsec_extra_len(true);
+	if (mtu < 0)
+		dev->mtu = 0;
+	else
+		dev->mtu = mtu;
 	rx_handler = rtnl_dereference(real_dev->rx_handler);
 	if (rx_handler && rx_handler != macsec_handle_frame)

drivers/net/macvlan.c+1−1

@@ -1704,7 +1704,7 @@ static int macvlan_device_event(struct notifier_block *unused, · 1703 unmodified lines
1704	struct macvlan_dev,	1704	struct macvlan_dev,
1705	list);	1705	list);
1706		1706
1707	if (macvlan_sync_address(vlan->dev, dev->dev_addr))	1707	if (vlan && macvlan_sync_address(vlan->dev, dev->dev_addr))
1708	return NOTIFY_BAD;	1708	return NOTIFY_BAD;
1709		1709
1710	break;	1710	break;

drivers/net/phy/bcm84881.c+3−3

 	if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
 		phydev->link = false;
-	if (!phydev->link)
-		return 0;
 	linkmode_zero(phydev->lp_advertising);
 	phydev->speed = SPEED_UNKNOWN;
 	phydev->duplex = DUPLEX_UNKNOWN;
 	phydev->asym_pause = 0;
 	phydev->mdix = 0;
+	if (!phydev->link)
+		return 0;
 	if (phydev->autoneg_complete) {
 		val = genphy_c45_read_lpa(phydev);
 		if (val < 0)

drivers/net/phy/dp83640.c+1−1

@@ -1120,7 +1120,7 @@ static struct dp83640_clock dp83640_clock_get_bus(struct mii_bus bus) · 1119 unmodified lines
1120	goto out;	1120	goto out;
1121	}	1121	}
1122	dp83640_clock_init(clock, bus);	1122	dp83640_clock_init(clock, bus);
1123	list_add_tail(&phyter_clocks, &clock->list);	1123	list_add_tail(&clock->list, &phyter_clocks);
1124	out:	1124	out:
1125	mutex_unlock(&phyter_clocks_lock);	1125	mutex_unlock(&phyter_clocks_lock);
1126		1126

drivers/net/phy/dp83822.c+14−16

@@ -137,19 +137,18 @@ static int dp83822_set_wol(struct phy_device *phydev, · 136 unmodified lines
137	value &= ~DP83822_WOL_SECURE_ON;	137	value &= ~DP83822_WOL_SECURE_ON;
138	}	138	}
139		139
140	value \|= (DP83822_WOL_EN \| DP83822_WOL_INDICATION_SEL \|	140	/* Clear any pending WoL interrupt */
141	DP83822_WOL_CLR_INDICATION);	141	phy_read(phydev, MII_DP83822_MISR2);
142	phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,	142
143	value);	143	value \|= DP83822_WOL_EN \| DP83822_WOL_INDICATION_SEL \|
		144	DP83822_WOL_CLR_INDICATION;
		145
		146	return phy_write_mmd(phydev, DP83822_DEVADDR,
		147	MII_DP83822_WOL_CFG, value);
144	} else {	148	} else {
145	value = phy_read_mmd(phydev, DP83822_DEVADDR,	149	return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
146	MII_DP83822_WOL_CFG);	150	MII_DP83822_WOL_CFG, DP83822_WOL_EN);
147	value &= ~DP83822_WOL_EN;
148	phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,
149	value);
150	}	151	}
151
152	return 0;
153	}	152	}
154		153
155	static void dp83822_get_wol(struct phy_device *phydev,	154	static void dp83822_get_wol(struct phy_device *phydev,
@@ -258,12 +257,11 @@ static int dp83822_config_intr(struct phy_device *phydev) · 102 unmodified lines
258		257
259	static int dp83822_config_init(struct phy_device *phydev)	258	static int dp83822_config_init(struct phy_device *phydev)
260	{	259	{
261	int value;	260	int value = DP83822_WOL_EN \| DP83822_WOL_MAGIC_EN \|
262		261	DP83822_WOL_SECURE_ON;
263	value = DP83822_WOL_MAGIC_EN \| DP83822_WOL_SECURE_ON \| DP83822_WOL_EN;
264		262
265	return phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,	263	return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
266	value);	264	MII_DP83822_WOL_CFG, value);
267	}	265	}
268		266
269	static int dp83822_phy_reset(struct phy_device *phydev)	267	static int dp83822_phy_reset(struct phy_device *phydev)

drivers/net/phy/dp83tc811.c+12−9

@@ -139,16 +139,19 @@ static int dp83811_set_wol(struct phy_device *phydev, · 138 unmodified lines
139	value &= ~DP83811_WOL_SECURE_ON;	139	value &= ~DP83811_WOL_SECURE_ON;
140	}	140	}
141		141
142	value \|= (DP83811_WOL_EN \| DP83811_WOL_INDICATION_SEL \|	142	/* Clear any pending WoL interrupt */
143	DP83811_WOL_CLR_INDICATION);	143	phy_read(phydev, MII_DP83811_INT_STAT1);
144	phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,	144
145	value);	145	value \|= DP83811_WOL_EN \| DP83811_WOL_INDICATION_SEL \|
		146	DP83811_WOL_CLR_INDICATION;
		147
		148	return phy_write_mmd(phydev, DP83811_DEVADDR,
		149	MII_DP83811_WOL_CFG, value);
146	} else {	150	} else {
147	phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,	151	return phy_clear_bits_mmd(phydev, DP83811_DEVADDR,
148	DP83811_WOL_EN);	152	MII_DP83811_WOL_CFG, DP83811_WOL_EN);
149	}	153	}
150		154
151	return 0;
152	}	155	}
153		156
154	static void dp83811_get_wol(struct phy_device *phydev,	157	static void dp83811_get_wol(struct phy_device *phydev,
@@ -292,8 +295,8 @@ static int dp83811_config_init(struct phy_device *phydev) · 137 unmodified lines
292		295
293	value = DP83811_WOL_MAGIC_EN \| DP83811_WOL_SECURE_ON \| DP83811_WOL_EN;	296	value = DP83811_WOL_MAGIC_EN \| DP83811_WOL_SECURE_ON \| DP83811_WOL_EN;
294		297
295	return phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,	298	return phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,
296	value);	299	value);
297	}	300	}
298		301
299	static int dp83811_phy_reset(struct phy_device *phydev)	302	static int dp83811_phy_reset(struct phy_device *phydev)

drivers/net/phy/marvell10g.c+28−2

 	MV_PCS_CSSR1_SPD2_2500	= 0x0004,
 	MV_PCS_CSSR1_SPD2_10000	= 0x0000,
+	/* Temperature read register (88E2110 only) */
+	MV_PCS_TEMP		= 0x8042,
 	/* These registers appear at 0x800X and 0xa00X - the 0xa00X control
 	 * registers appear to set themselves to the 0x800X when AN is
 	 * restarted, but status registers appear readable from either.
 	MV_V2_PORT_CTRL		= 0xf001,
 	MV_V2_PORT_CTRL_SWRST	= BIT(15),
 	MV_V2_PORT_CTRL_PWRDOWN = BIT(11),
+	/* Temperature control/read registers (88X3310 only) */
 	MV_V2_TEMP_CTRL		= 0xf08a,
 	MV_V2_TEMP_CTRL_MASK	= 0xc000,
 	MV_V2_TEMP_CTRL_SAMPLE	= 0x0000,
 	return 0;
 }
+static int mv3310_hwmon_read_temp_reg(struct phy_device *phydev)
+{
+	return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP);
+}
+static int mv2110_hwmon_read_temp_reg(struct phy_device *phydev)
+{
+	return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP);
+}
+static int mv10g_hwmon_read_temp_reg(struct phy_device *phydev)
+{
+	if (phydev->drv->phy_id == MARVELL_PHY_ID_88X3310)
+		return mv3310_hwmon_read_temp_reg(phydev);
+	else /* MARVELL_PHY_ID_88E2110 */
+		return mv2110_hwmon_read_temp_reg(phydev);
+}
 static int mv3310_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
 			     u32 attr, int channel, long *value)
 {
 	}
 	if (type == hwmon_temp && attr == hwmon_temp_input) {
-		temp = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP);
+		temp = mv10g_hwmon_read_temp_reg(phydev);
 		if (temp < 0)
 			return temp;
 	u16 val;
 	int ret;
+	if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310)
+		return 0;
 	ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP,
 			    MV_V2_TEMP_UNKNOWN);
 	if (ret < 0)
 	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
 				 MV_V2_PORT_CTRL_PWRDOWN);
-	if (priv->firmware_ver < 0x00030000)
+	if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 ||
+	    priv->firmware_ver < 0x00030000)
 		return ret;
 	return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,

drivers/net/phy/microchip_t1.c+171−0

@@ -3,9 +3,21 @@ · 2 unmodified lines
3		3
4	#include <linux/kernel.h>	4	#include <linux/kernel.h>
5	#include <linux/module.h>	5	#include <linux/module.h>
		6	#include <linux/delay.h>
6	#include <linux/mii.h>	7	#include <linux/mii.h>
7	#include <linux/phy.h>	8	#include <linux/phy.h>
8		9
		10	/* External Register Control Register */
		11	#define LAN87XX_EXT_REG_CTL (0x14)
		12	#define LAN87XX_EXT_REG_CTL_RD_CTL (0x1000)
		13	#define LAN87XX_EXT_REG_CTL_WR_CTL (0x0800)
		14
		15	/* External Register Read Data Register */
		16	#define LAN87XX_EXT_REG_RD_DATA (0x15)
		17
		18	/* External Register Write Data Register */
		19	#define LAN87XX_EXT_REG_WR_DATA (0x16)
		20
9	/* Interrupt Source Register */	21	/* Interrupt Source Register */
10	#define LAN87XX_INTERRUPT_SOURCE (0x18)	22	#define LAN87XX_INTERRUPT_SOURCE (0x18)
11		23
@@ -14,9 +26,160 @@ · 2 unmodified lines
14	#define LAN87XX_MASK_LINK_UP (0x0004)	26	#define LAN87XX_MASK_LINK_UP (0x0004)
15	#define LAN87XX_MASK_LINK_DOWN (0x0002)	27	#define LAN87XX_MASK_LINK_DOWN (0x0002)
16		28
		29	/* phyaccess nested types */
		30	#define PHYACC_ATTR_MODE_READ 0
		31	#define PHYACC_ATTR_MODE_WRITE 1
		32	#define PHYACC_ATTR_MODE_MODIFY 2
		33
		34	#define PHYACC_ATTR_BANK_SMI 0
		35	#define PHYACC_ATTR_BANK_MISC 1
		36	#define PHYACC_ATTR_BANK_PCS 2
		37	#define PHYACC_ATTR_BANK_AFE 3
		38	#define PHYACC_ATTR_BANK_MAX 7
		39
17	#define DRIVER_AUTHOR "Nisar Sayed <nisar.sayed@microchip.com>"	40	#define DRIVER_AUTHOR "Nisar Sayed <nisar.sayed@microchip.com>"
18	#define DRIVER_DESC "Microchip LAN87XX T1 PHY driver"	41	#define DRIVER_DESC "Microchip LAN87XX T1 PHY driver"
19		42
		43	struct access_ereg_val {
		44	u8 mode;
		45	u8 bank;
		46	u8 offset;
		47	u16 val;
		48	u16 mask;
		49	};
		50
		51	static int access_ereg(struct phy_device *phydev, u8 mode, u8 bank,
		52	u8 offset, u16 val)
		53	{
		54	u16 ereg = 0;
		55	int rc = 0;
		56
		57	if (mode > PHYACC_ATTR_MODE_WRITE \|\| bank > PHYACC_ATTR_BANK_MAX)
		58	return -EINVAL;
		59
		60	if (bank == PHYACC_ATTR_BANK_SMI) {
		61	if (mode == PHYACC_ATTR_MODE_WRITE)
		62	rc = phy_write(phydev, offset, val);
		63	else
		64	rc = phy_read(phydev, offset);
		65	return rc;
		66	}
		67
		68	if (mode == PHYACC_ATTR_MODE_WRITE) {
		69	ereg = LAN87XX_EXT_REG_CTL_WR_CTL;
		70	rc = phy_write(phydev, LAN87XX_EXT_REG_WR_DATA, val);
		71	if (rc < 0)
		72	return rc;
		73	} else {
		74	ereg = LAN87XX_EXT_REG_CTL_RD_CTL;
		75	}
		76
		77	ereg \|= (bank << 8) \| offset;
		78
		79	rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, ereg);
		80	if (rc < 0)
		81	return rc;
		82
		83	if (mode == PHYACC_ATTR_MODE_READ)
		84	rc = phy_read(phydev, LAN87XX_EXT_REG_RD_DATA);
		85
		86	return rc;
		87	}
		88
		89	static int access_ereg_modify_changed(struct phy_device *phydev,
		90	u8 bank, u8 offset, u16 val, u16 mask)
		91	{
		92	int new = 0, rc = 0;
		93
		94	if (bank > PHYACC_ATTR_BANK_MAX)
		95	return -EINVAL;
		96
		97	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, bank, offset, val);
		98	if (rc < 0)
		99	return rc;
		100
		101	new = val \| (rc & (mask ^ 0xFFFF));
		102	rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, bank, offset, new);
		103
		104	return rc;
		105	}
		106
		107	static int lan87xx_phy_init(struct phy_device *phydev)
		108	{
		109	static const struct access_ereg_val init[] = {
		110	/* TX Amplitude = 5 */
		111	{PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_AFE, 0x0B,
		112	0x000A, 0x001E},
		113	/* Clear SMI interrupts */
		114	{PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI, 0x18,
		115	0, 0},
		116	/* Clear MISC interrupts */
		117	{PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_MISC, 0x08,
		118	0, 0},
		119	/* Turn on TC10 Ring Oscillator (ROSC) */
		120	{PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_MISC, 0x20,
		121	0x0020, 0x0020},
		122	/* WUR Detect Length to 1.2uS, LPC Detect Length to 1.09uS */
		123	{PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_PCS, 0x20,
		124	0x283C, 0},
		125	/* Wake_In Debounce Length to 39uS, Wake_Out Length to 79uS */
		126	{PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x21,
		127	0x274F, 0},
		128	/* Enable Auto Wake Forward to Wake_Out, ROSC on, Sleep,
		129	* and Wake_In to wake PHY
		130	*/
		131	{PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x20,
		132	0x80A7, 0},
		133	/* Enable WUP Auto Fwd, Enable Wake on MDI, Wakeup Debouncer
		134	* to 128 uS
		135	*/
		136	{PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x24,
		137	0xF110, 0},
		138	/* Enable HW Init */
		139	{PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_SMI, 0x1A,
		140	0x0100, 0x0100},
		141	};
		142	int rc, i;
		143
		144	/* Start manual initialization procedures in Managed Mode */
		145	rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,
		146	0x1a, 0x0000, 0x0100);
		147	if (rc < 0)
		148	return rc;
		149
		150	/* Soft Reset the SMI block */
		151	rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,
		152	0x00, 0x8000, 0x8000);
		153	if (rc < 0)
		154	return rc;
		155
		156	/* Check to see if the self-clearing bit is cleared */
		157	usleep_range(1000, 2000);
		158	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
		159	PHYACC_ATTR_BANK_SMI, 0x00, 0);
		160	if (rc < 0)
		161	return rc;
		162	if ((rc & 0x8000) != 0)
		163	return -ETIMEDOUT;
		164
		165	/* PHY Initialization */
		166	for (i = 0; i < ARRAY_SIZE(init); i++) {
		167	if (init[i].mode == PHYACC_ATTR_MODE_MODIFY) {
		168	rc = access_ereg_modify_changed(phydev, init[i].bank,
		169	init[i].offset,
		170	init[i].val,
		171	init[i].mask);
		172	} else {
		173	rc = access_ereg(phydev, init[i].mode, init[i].bank,
		174	init[i].offset, init[i].val);
		175	}
		176	if (rc < 0)
		177	return rc;
		178	}
		179
		180	return 0;
		181	}
		182
20	static int lan87xx_phy_config_intr(struct phy_device *phydev)	183	static int lan87xx_phy_config_intr(struct phy_device *phydev)
21	{	184	{
22	int rc, val = 0;	185	int rc, val = 0;
@@ -40,6 +203,13 @@ static int lan87xx_phy_ack_interrupt(struct phy_device *phydev) · 17 unmodified lines
40	return rc < 0 ? rc : 0;	203	return rc < 0 ? rc : 0;
41	}	204	}
42		205
		206	static int lan87xx_config_init(struct phy_device *phydev)
		207	{
		208	int rc = lan87xx_phy_init(phydev);
		209
		210	return rc < 0 ? rc : 0;
		211	}
		212
43	static struct phy_driver microchip_t1_phy_driver[] = {	213	static struct phy_driver microchip_t1_phy_driver[] = {
44	{	214	{
45	.phy_id = 0x0007c150,	215	.phy_id = 0x0007c150,
@@ -48,6 +218,7 @@ static struct phy_driver microchip_t1_phy_driver[] = { · 2 unmodified lines
48		218
49	.features = PHY_BASIC_T1_FEATURES,	219	.features = PHY_BASIC_T1_FEATURES,
50		220
		221	.config_init = lan87xx_config_init,
51	.config_aneg = genphy_config_aneg,	222	.config_aneg = genphy_config_aneg,
52		223
53	.ack_interrupt = lan87xx_phy_ack_interrupt,	224	.ack_interrupt = lan87xx_phy_ack_interrupt,

drivers/net/team/team.c+4−0

 	struct team_mode_item *mitem;
 	const struct team_mode *mode = NULL;
+	if (!try_module_get(THIS_MODULE))
+		return NULL;
 	spin_lock(&mode_list_lock);
 	mitem = __find_mode(kind);
 	if (!mitem) {
 	}
 	spin_unlock(&mode_list_lock);
+	module_put(THIS_MODULE);
 	return mode;
 }

drivers/net/usb/qmi_wwan.c+1−0

@@ -1359,6 +1359,7 @@ static const struct usb_device_id products[] = { · 1358 unmodified lines
1359	{QMI_FIXED_INTF(0x413c, 0x81b3, 8)}, /* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card (rev3) */	1359	{QMI_FIXED_INTF(0x413c, 0x81b3, 8)}, /* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card (rev3) */
1360	{QMI_FIXED_INTF(0x413c, 0x81b6, 8)}, /* Dell Wireless 5811e */	1360	{QMI_FIXED_INTF(0x413c, 0x81b6, 8)}, /* Dell Wireless 5811e */
1361	{QMI_FIXED_INTF(0x413c, 0x81b6, 10)}, /* Dell Wireless 5811e */	1361	{QMI_FIXED_INTF(0x413c, 0x81b6, 10)}, /* Dell Wireless 5811e */
		1362	{QMI_FIXED_INTF(0x413c, 0x81cc, 8)}, /* Dell Wireless 5816e */
1362	{QMI_FIXED_INTF(0x413c, 0x81d7, 0)}, /* Dell Wireless 5821e */	1363	{QMI_FIXED_INTF(0x413c, 0x81d7, 0)}, /* Dell Wireless 5821e */
1363	{QMI_FIXED_INTF(0x413c, 0x81d7, 1)}, /* Dell Wireless 5821e preproduction config */	1364	{QMI_FIXED_INTF(0x413c, 0x81d7, 1)}, /* Dell Wireless 5821e preproduction config */
1364	{QMI_FIXED_INTF(0x413c, 0x81e0, 0)}, /* Dell Wireless 5821e with eSIM support*/	1365	{QMI_FIXED_INTF(0x413c, 0x81e0, 0)}, /* Dell Wireless 5821e with eSIM support*/

drivers/net/vrf.c+6−4

 	fl6.flowi6_proto = iph->nexthdr;
 	fl6.flowi6_flags = FLOWI_FLAG_SKIP_NH_OIF;
-	dst = ip6_route_output(net, NULL, &fl6);
+	dst = ip6_dst_lookup_flow(net, NULL, &fl6, NULL);
-	if (dst == dst_null)
+	if (IS_ERR(dst) || dst == dst_null)
 		goto err;
 	skb_dst_drop(skb);
 	if (rt6_need_strict(&ipv6_hdr(skb)->daddr))
 		return skb;
-	if (qdisc_tx_is_default(vrf_dev))
+	if (qdisc_tx_is_default(vrf_dev) ||
+	    IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED)
 		return vrf_ip6_out_direct(vrf_dev, sk, skb);
 	return vrf_ip6_out_redirect(vrf_dev, skb);
 	    ipv4_is_lbcast(ip_hdr(skb)->daddr))
 		return skb;
-	if (qdisc_tx_is_default(vrf_dev))
+	if (qdisc_tx_is_default(vrf_dev) ||
+	    IPCB(skb)->flags & IPSKB_XFRM_TRANSFORMED)
 		return vrf_ip_out_direct(vrf_dev, sk, skb);
 	return vrf_ip_out_redirect(vrf_dev, skb);

drivers/net/vxlan.c+3−3

@@ -3144,7 +3144,7 @@ static int vxlan_validate(struct nlattr tb[], struct nlattr data[], · 3143 unmodified lines
3144	u32 id = nla_get_u32(data[IFLA_VXLAN_ID]);	3144	u32 id = nla_get_u32(data[IFLA_VXLAN_ID]);
3145		3145
3146	if (id >= VXLAN_N_VID) {	3146	if (id >= VXLAN_N_VID) {
3147	NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_ID],	3147	NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_ID],
3148	"VXLAN ID must be lower than 16777216");	3148	"VXLAN ID must be lower than 16777216");
3149	return -ERANGE;	3149	return -ERANGE;
3150	}	3150	}
@@ -3155,7 +3155,7 @@ static int vxlan_validate(struct nlattr tb[], struct nlattr data[], · 4 unmodified lines
3155	= nla_data(data[IFLA_VXLAN_PORT_RANGE]);	3155	= nla_data(data[IFLA_VXLAN_PORT_RANGE]);
3156		3156
3157	if (ntohs(p->high) < ntohs(p->low)) {	3157	if (ntohs(p->high) < ntohs(p->low)) {
3158	NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_PORT_RANGE],	3158	NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_PORT_RANGE],
3159	"Invalid source port range");	3159	"Invalid source port range");
3160	return -EINVAL;	3160	return -EINVAL;
3161	}	3161	}
@@ -3165,7 +3165,7 @@ static int vxlan_validate(struct nlattr tb[], struct nlattr data[], · 3 unmodified lines
3165	enum ifla_vxlan_df df = nla_get_u8(data[IFLA_VXLAN_DF]);	3165	enum ifla_vxlan_df df = nla_get_u8(data[IFLA_VXLAN_DF]);
3166		3166
3167	if (df < 0 \|\| df > VXLAN_DF_MAX) {	3167	if (df < 0 \|\| df > VXLAN_DF_MAX) {
3168	NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_DF],	3168	NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_DF],
3169	"Invalid DF attribute");	3169	"Invalid DF attribute");
3170	return -EINVAL;	3170	return -EINVAL;
3171	}	3171	}

drivers/net/wimax/i2400m/usb-fw.c+1−0

@@ -354,6 +354,7 @@ out: · 353 unmodified lines
354	usb_autopm_put_interface(i2400mu->usb_iface);	354	usb_autopm_put_interface(i2400mu->usb_iface);
355	d_fnend(8, dev, "(i2400m %p ack %p size %zu) = %ld\n",	355	d_fnend(8, dev, "(i2400m %p ack %p size %zu) = %ld\n",
356	i2400m, ack, ack_size, (long) result);	356	i2400m, ack, ack_size, (long) result);
		357	usb_put_urb(&notif_urb);
357	return result;	358	return result;
358		359
359	error_exceeded:	360	error_exceeded:

drivers/net/wireguard/queueing.c+3−1

 		if (multicore) {
 			queue->worker = wg_packet_percpu_multicore_worker_alloc(
 				function, queue);
-			if (!queue->worker)
+			if (!queue->worker) {
+				ptr_ring_cleanup(&queue->ring, NULL);
 				return -ENOMEM;
+			}
 		} else {
 			INIT_WORK(&queue->work, function);
 		}

drivers/net/wireguard/receive.c+10−11

 static void keep_key_fresh(struct wg_peer *peer)
 {
 	struct noise_keypair *keypair;
-	bool send = false;
+	bool send;
 	if (peer->sent_lastminute_handshake)
 		return;
 	rcu_read_lock_bh();
 	keypair = rcu_dereference_bh(peer->keypairs.current_keypair);
-	if (likely(keypair && READ_ONCE(keypair->sending.is_valid)) &&
+	send = keypair && READ_ONCE(keypair->sending.is_valid) &&
-	    keypair->i_am_the_initiator &&
+	       keypair->i_am_the_initiator &&
-	    unlikely(wg_birthdate_has_expired(keypair->sending.birthdate,
+	       wg_birthdate_has_expired(keypair->sending.birthdate,
-			REJECT_AFTER_TIME - KEEPALIVE_TIMEOUT - REKEY_TIMEOUT)))
+			REJECT_AFTER_TIME - KEEPALIVE_TIMEOUT - REKEY_TIMEOUT);
-		send = true;
 	rcu_read_unlock_bh();
-	if (send) {
+	if (unlikely(send)) {
 		peer->sent_lastminute_handshake = true;
 		wg_packet_send_queued_handshake_initiation(peer, false);
 	}
 		len = ntohs(ip_hdr(skb)->tot_len);
 		if (unlikely(len < sizeof(struct iphdr)))
 			goto dishonest_packet_size;
-		if (INET_ECN_is_ce(PACKET_CB(skb)->ds))
+		INET_ECN_decapsulate(skb, PACKET_CB(skb)->ds, ip_hdr(skb)->tos);
-			IP_ECN_set_ce(ip_hdr(skb));
 	} else if (skb->protocol == htons(ETH_P_IPV6)) {
 		len = ntohs(ipv6_hdr(skb)->payload_len) +
 		      sizeof(struct ipv6hdr);
-		if (INET_ECN_is_ce(PACKET_CB(skb)->ds))
+		INET_ECN_decapsulate(skb, PACKET_CB(skb)->ds, ipv6_get_dsfield(ipv6_hdr(skb)));
-			IP6_ECN_set_ce(skb, ipv6_hdr(skb));
 	} else {
 		goto dishonest_packet_type;
 	}
 				&PACKET_CB(skb)->keypair->receiving)) ?
 				PACKET_STATE_CRYPTED : PACKET_STATE_DEAD;
 		wg_queue_enqueue_per_peer_napi(skb, state);
+		if (need_resched())
+			cond_resched();
 	}
 }

drivers/net/wireguard/selftest/ratelimiter.c+2−2

@@ -120,9 +120,9 @@ bool __init wg_ratelimiter_selftest(void) · 119 unmodified lines
120	enum { TRIALS_BEFORE_GIVING_UP = 5000 };	120	enum { TRIALS_BEFORE_GIVING_UP = 5000 };
121	bool success = false;	121	bool success = false;
122	int test = 0, trials;	122	int test = 0, trials;
123	struct sk_buff skb4, skb6;	123	struct sk_buff skb4, skb6 = NULL;
124	struct iphdr *hdr4;	124	struct iphdr *hdr4;
125	struct ipv6hdr *hdr6;	125	struct ipv6hdr *hdr6 = NULL;
126		126
127	if (IS_ENABLED(CONFIG_KASAN) \|\| IS_ENABLED(CONFIG_UBSAN))	127	if (IS_ENABLED(CONFIG_KASAN) \|\| IS_ENABLED(CONFIG_UBSAN))
128	return true;	128	return true;

drivers/net/wireguard/send.c+10−10

@@ -124,20 +124,17 @@ void wg_packet_send_handshake_cookie(struct wg_device *wg, · 123 unmodified lines
124	static void keep_key_fresh(struct wg_peer *peer)	124	static void keep_key_fresh(struct wg_peer *peer)
125	{	125	{
126	struct noise_keypair *keypair;	126	struct noise_keypair *keypair;
127	bool send = false;	127	bool send;
128		128
129	rcu_read_lock_bh();	129	rcu_read_lock_bh();
130	keypair = rcu_dereference_bh(peer->keypairs.current_keypair);	130	keypair = rcu_dereference_bh(peer->keypairs.current_keypair);
131	if (likely(keypair && READ_ONCE(keypair->sending.is_valid)) &&	131	send = keypair && READ_ONCE(keypair->sending.is_valid) &&
132	(unlikely(atomic64_read(&keypair->sending.counter.counter) >	132	(atomic64_read(&keypair->sending.counter.counter) > REKEY_AFTER_MESSAGES \|\|
133	REKEY_AFTER_MESSAGES) \|\|	133	(keypair->i_am_the_initiator &&
134	(keypair->i_am_the_initiator &&	134	wg_birthdate_has_expired(keypair->sending.birthdate, REKEY_AFTER_TIME)));
135	unlikely(wg_birthdate_has_expired(keypair->sending.birthdate,
136	REKEY_AFTER_TIME)))))
137	send = true;
138	rcu_read_unlock_bh();	135	rcu_read_unlock_bh();
139		136
140	if (send)	137	if (unlikely(send))
141	wg_packet_send_queued_handshake_initiation(peer, false);	138	wg_packet_send_queued_handshake_initiation(peer, false);
142	}	139	}
143		140
@@ -281,6 +278,8 @@ void wg_packet_tx_worker(struct work_struct *work) · 137 unmodified lines
281		278
282	wg_noise_keypair_put(keypair, false);	279	wg_noise_keypair_put(keypair, false);
283	wg_peer_put(peer);	280	wg_peer_put(peer);
		281	if (need_resched())
		282	cond_resched();
284	}	283	}
285	}	284	}
286		285
@@ -304,7 +303,8 @@ void wg_packet_encrypt_worker(struct work_struct *work) · 17 unmodified lines
304	}	303	}
305	wg_queue_enqueue_per_peer(&PACKET_PEER(first)->tx_queue, first,	304	wg_queue_enqueue_per_peer(&PACKET_PEER(first)->tx_queue, first,
306	state);	305	state);
307		306	if (need_resched())
		307	cond_resched();
308	}	308	}
309	}	309	}
310		310

drivers/net/wireguard/socket.c+0−12

 			net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n",
 					    wg->dev->name, &endpoint->addr, ret);
 			goto err;
-		} else if (unlikely(rt->dst.dev == skb->dev)) {
-			ip_rt_put(rt);
-			ret = -ELOOP;
-			net_dbg_ratelimited("%s: Avoiding routing loop to %pISpfsc\n",
-					    wg->dev->name, &endpoint->addr);
-			goto err;
 		}
 		if (cache)
 			dst_cache_set_ip4(cache, &rt->dst, fl.saddr);
 			net_dbg_ratelimited("%s: No route to %pISpfsc, error %d\n",
 					    wg->dev->name, &endpoint->addr, ret);
 			goto err;
-		} else if (unlikely(dst->dev == skb->dev)) {
-			dst_release(dst);
-			ret = -ELOOP;
-			net_dbg_ratelimited("%s: Avoiding routing loop to %pISpfsc\n",
-					    wg->dev->name, &endpoint->addr);
-			goto err;
 		}
 		if (cache)
 			dst_cache_set_ip6(cache, dst, &fl.saddr);

drivers/net/wireless/intel/iwlegacy/3945-rs.c+1−1

@@ -374,7 +374,7 @@ out: · 373 unmodified lines
374	}	374	}
375		375
376	static void *	376	static void *
377	il3945_rs_alloc(struct ieee80211_hw hw, struct dentry debugfsdir)	377	il3945_rs_alloc(struct ieee80211_hw *hw)
378	{	378	{
379	return hw->priv;	379	return hw->priv;
380	}	380	}

drivers/net/wireless/intel/iwlegacy/4965-rs.c+1−1

@@ -2474,7 +2474,7 @@ il4965_rs_fill_link_cmd(struct il_priv il, struct il_lq_sta lq_sta, · 2473 unmodified lines
2474	}	2474	}
2475		2475
2476	static void *	2476	static void *
2477	il4965_rs_alloc(struct ieee80211_hw hw, struct dentry debugfsdir)	2477	il4965_rs_alloc(struct ieee80211_hw *hw)
2478	{	2478	{
2479	return hw->priv;	2479	return hw->priv;
2480	}	2480	}

drivers/net/wireless/intel/iwlwifi/dvm/rs.c+1−1

@@ -3019,7 +3019,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv, · 3018 unmodified lines
3019	cpu_to_le16(priv->lib->bt_params->agg_time_limit);	3019	cpu_to_le16(priv->lib->bt_params->agg_time_limit);
3020	}	3020	}
3021		3021
3022	static void rs_alloc(struct ieee80211_hw hw, struct dentry *debugfsdir)	3022	static void rs_alloc(struct ieee80211_hw hw)
3023	{	3023	{
3024	return hw->priv;	3024	return hw->priv;
3025	}	3025	}

drivers/net/wireless/intel/iwlwifi/fw/acpi.c+7−2

 		if (!prof->enabled) {
 			IWL_DEBUG_RADIO(fwrt, "SAR profile %d is disabled.\n",
 					profs[i]);
-			/* if one of the profiles is disabled, we fail all */
+			/*
-			return -ENOENT;
+			 * if one of the profiles is disabled, we
+			 * ignore all of them and return 1 to
+			 * differentiate disabled from other failures.
+			 */
+			return 1;
 		}
 		IWL_DEBUG_INFO(fwrt,
 			       "SAR EWRD: chain %d profile index %d\n",
 			       i, profs[i]);

drivers/net/wireless/intel/iwlwifi/fw/api/txq.h+3−3

drivers/net/wireless/intel/iwlwifi/iwl-drv.c+1−1

@@ -1467,7 +1467,7 @@ static void iwl_req_fw_callback(const struct firmware ucode_raw, void context) · 1466 unmodified lines
1467	kmemdup(pieces->dbg_conf_tlv[i],	1467	kmemdup(pieces->dbg_conf_tlv[i],
1468	pieces->dbg_conf_tlv_len[i],	1468	pieces->dbg_conf_tlv_len[i],
1469	GFP_KERNEL);	1469	GFP_KERNEL);
1470	if (!pieces->dbg_conf_tlv[i])	1470	if (!drv->fw.dbg.conf_tlv[i])
1471	goto out_free_fw;	1471	goto out_free_fw;
1472	}	1472	}
1473	}	1473	}

drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c+2−4

 					IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 					IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 				.mac_cap_info[2] =
-					IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP |
+					IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP,
-					IEEE80211_HE_MAC_CAP2_ACK_EN,
 				.mac_cap_info[3] =
 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
 					IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 					IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 				.mac_cap_info[2] =
-					IEEE80211_HE_MAC_CAP2_BSR |
+					IEEE80211_HE_MAC_CAP2_BSR,
-					IEEE80211_HE_MAC_CAP2_ACK_EN,
 				.mac_cap_info[3] =
 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,

drivers/net/wireless/intel/iwlwifi/mvm/fw.c+11−14

 		struct iwl_dev_tx_power_cmd_v4 v4;
 	} cmd;
+	int ret;
 	u16 len = 0;
 	cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
 		len = sizeof(cmd.v4.v3);
-	if (iwl_sar_select_profile(&mvm->fwrt, cmd.v5.v3.per_chain_restriction,
+	ret = iwl_sar_select_profile(&mvm->fwrt,
-				   prof_a, prof_b))
+				     cmd.v5.v3.per_chain_restriction,
-		return -ENOENT;
+				     prof_a, prof_b);
+	/* return on error or if the profile is disabled (positive number) */
+	if (ret)
+		return ret;
 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
 }
 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
 				ret);
-	ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
+	return iwl_mvm_sar_select_profile(mvm, 1, 1);
-	/*
-	 * If we don't have profile 0 from BIOS, just skip it.  This
-	 * means that SAR Geo will not be enabled either, even if we
-	 * have other valid profiles.
-	 */
-	if (ret == -ENOENT)
-		return 1;
-	return ret;
 }
 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
 	ret = iwl_mvm_sar_init(mvm);
 	if (ret == 0) {
 		ret = iwl_mvm_sar_geo_init(mvm);
-	} else if (ret > 0 && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
+	} else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
 		/*
 		 * If basic SAR is not available, we check for WGDS,
 		 * which should *not* be available either.  If it is

drivers/net/wireless/intel/iwlwifi/mvm/rs.c+1−1

@@ -3665,7 +3665,7 @@ static void rs_fill_lq_cmd(struct iwl_mvm *mvm, · 3664 unmodified lines
3665	cpu_to_le16(iwl_mvm_coex_agg_time_limit(mvm, sta));	3665	cpu_to_le16(iwl_mvm_coex_agg_time_limit(mvm, sta));
3666	}	3666	}
3667		3667
3668	static void rs_alloc(struct ieee80211_hw hw, struct dentry *debugfsdir)	3668	static void rs_alloc(struct ieee80211_hw hw)
3669	{	3669	{
3670	return hw->priv;	3670	return hw->priv;
3671	}	3671	}

drivers/net/wireless/intel/iwlwifi/mvm/rx.c+11−2

  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 - 2019 Intel Corporation
+ * Copyright(c) 2018 - 2020 Intel Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 - 2019 Intel Corporation
+ * Copyright(c) 2018 - 2020 Intel Corporation
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
 struct iwl_mvm_stat_data {
 	struct iwl_mvm *mvm;
+	__le32 flags;
 	__le32 mac_id;
 	u8 beacon_filter_average_energy;
 	void *general;
 			-general->beacon_average_energy[vif_id];
 	}
+	/* make sure that beacon statistics don't go backwards with TCM
+	 * request to clear statistics
+	 */
+	if (le32_to_cpu(data->flags) & IWL_STATISTICS_REPLY_FLG_CLEAR)
+		mvmvif->beacon_stats.accu_num_beacons +=
+			mvmvif->beacon_stats.num_beacons;
 	if (mvmvif->id != id)
 		return;
 		flags = stats->flag;
 	}
+	data.flags = flags;
 	iwl_mvm_rx_stats_check_trigger(mvm, pkt);

drivers/net/wireless/intel/iwlwifi/mvm/sta.c+7−2

 	lockdep_assert_held(&mvm->mutex);
+	if (WARN(maxq >= mvm->trans->trans_cfg->base_params->num_of_queues,
+		 "max queue %d >= num_of_queues (%d)", maxq,
+		 mvm->trans->trans_cfg->base_params->num_of_queues))
+		maxq = mvm->trans->trans_cfg->base_params->num_of_queues - 1;
 	/* This should not be hit with new TX path */
 	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
 		return -ENOSPC;
 						   inactive_tid_bitmap,
 						   &unshare_queues,
 						   &changetid_queues);
-		if (ret >= 0 && free_queue < 0) {
+		if (ret && free_queue < 0) {
 			queue_owner = sta;
-			free_queue = ret;
+			free_queue = i;
 		}
 		/* only unlock sta lock - we still need the queue info lock */
 		spin_unlock_bh(&mvmsta->lock);

drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c+14−4

 	int cmdq_size = max_t(u32, IWL_CMD_QUEUE_SIZE,
 			      trans->cfg->min_txq_size);
+	switch (trans_pcie->rx_buf_size) {
+	case IWL_AMSDU_DEF:
+		return -EINVAL;
+	case IWL_AMSDU_2K:
+		break;
+	case IWL_AMSDU_4K:
+	case IWL_AMSDU_8K:
+	case IWL_AMSDU_12K:
+		control_flags |= IWL_PRPH_SCRATCH_RB_SIZE_4K;
+		break;
+	}
 	/* Allocate prph scratch */
 	prph_scratch = dma_alloc_coherent(trans->dev, sizeof(*prph_scratch),
 					  &trans_pcie->prph_scratch_dma_addr,
 		cpu_to_le16((u16)iwl_read32(trans, CSR_HW_REV));
 	prph_sc_ctrl->version.size = cpu_to_le16(sizeof(*prph_scratch) / 4);
-	control_flags = IWL_PRPH_SCRATCH_RB_SIZE_4K |
+	control_flags |= IWL_PRPH_SCRATCH_MTR_MODE;
-			IWL_PRPH_SCRATCH_MTR_MODE |
+	control_flags |= IWL_PRPH_MTR_FORMAT_256B & IWL_PRPH_SCRATCH_MTR_FORMAT;
-			(IWL_PRPH_MTR_FORMAT_256B &
-			 IWL_PRPH_SCRATCH_MTR_FORMAT);
 	/* initialize RX default queue */
 	prph_sc_ctrl->rbd_cfg.free_rbd_addr =

drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c+3−0

@@ -1418,6 +1418,9 @@ void iwl_trans_pcie_dyn_txq_free(struct iwl_trans *trans, int queue) · 1417 unmodified lines
1418		1418
1419	iwl_pcie_gen2_txq_unmap(trans, queue);	1419	iwl_pcie_gen2_txq_unmap(trans, queue);
1420		1420
		1421	iwl_pcie_gen2_txq_free_memory(trans, trans_pcie->txq[queue]);
		1422	trans_pcie->txq[queue] = NULL;
		1423
1421	IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", queue);	1424	IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", queue);
1422	}	1425	}
1423		1426

drivers/net/wireless/mac80211_hwsim.c+1−1

@@ -4068,7 +4068,7 @@ static void hwsim_virtio_rx_work(struct work_struct *work) · 4067 unmodified lines
4068	}	4068	}
4069	vq = hwsim_vqs[HWSIM_VQ_RX];	4069	vq = hwsim_vqs[HWSIM_VQ_RX];
4070	sg_init_one(sg, skb->head, skb_end_offset(skb));	4070	sg_init_one(sg, skb->head, skb_end_offset(skb));
4071	err = virtqueue_add_inbuf(vq, sg, 1, skb, GFP_KERNEL);	4071	err = virtqueue_add_inbuf(vq, sg, 1, skb, GFP_ATOMIC);
4072	if (WARN(err, "virtqueue_add_inbuf returned %d\n", err))	4072	if (WARN(err, "virtqueue_add_inbuf returned %d\n", err))
4073	nlmsg_free(skb);	4073	nlmsg_free(skb);
4074	else	4074	else

drivers/net/wireless/realtek/rtlwifi/rc.c+1−1

@@ -261,7 +261,7 @@ static void rtl_rate_update(void *ppriv, · 260 unmodified lines
261	{	261	{
262	}	262	}
263		263
264	static void rtl_rate_alloc(struct ieee80211_hw hw, struct dentry *debugfsdir)	264	static void rtl_rate_alloc(struct ieee80211_hw hw)
265	{	265	{
266	struct rtl_priv *rtlpriv = rtl_priv(hw);	266	struct rtl_priv *rtlpriv = rtl_priv(hw);
267	return rtlpriv;	267	return rtlpriv;

drivers/nvme/host/core.c+3−1

 		  * Don't treat an error as fatal, as we potentially already
 		  * have a NGUID or EUI-64.
 		  */
-		if (status > 0)
+		if (status > 0 && !(status & NVME_SC_DNR))
 			status = 0;
 		goto free_data;
 	}
 	return;
  out_put_disk:
+	/* prevent double queue cleanup */
+	ns->disk->queue = NULL;
 	put_disk(ns->disk);
  out_unlink_ns:
 	mutex_lock(&ctrl->subsys->lock);

drivers/nvme/host/pci.c+5−1

 static inline void nvme_update_cq_head(struct nvme_queue *nvmeq)
 {
-	if (++nvmeq->cq_head == nvmeq->q_depth) {
+	u16 tmp = nvmeq->cq_head + 1;
+	if (tmp == nvmeq->q_depth) {
 		nvmeq->cq_head = 0;
 		nvmeq->cq_phase ^= 1;
+	} else {
+		nvmeq->cq_head = tmp;
 	}
 }

drivers/pci/quirks.c+7−0

@@ -5567,3 +5567,10 @@ static void pci_fixup_no_d0_pme(struct pci_dev *dev) · 5566 unmodified lines
5567	dev->pme_support &= ~(PCI_PM_CAP_PME_D0 >> PCI_PM_CAP_PME_SHIFT);	5567	dev->pme_support &= ~(PCI_PM_CAP_PME_D0 >> PCI_PM_CAP_PME_SHIFT);
5568	}	5568	}
5569	DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x2142, pci_fixup_no_d0_pme);	5569	DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x2142, pci_fixup_no_d0_pme);
		5570
		5571	static void apex_pci_fixup_class(struct pci_dev *pdev)
		5572	{
		5573	pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) \| pdev->class;
		5574	}
		5575	DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a,
		5576	PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class);

drivers/phy/qualcomm/phy-qcom-qusb2.c+7−0

@@ -815,6 +815,13 @@ static const struct of_device_id qusb2_phy_of_match_table[] = { · 814 unmodified lines
815	}, {	815	}, {
816	.compatible = "qcom,msm8998-qusb2-phy",	816	.compatible = "qcom,msm8998-qusb2-phy",
817	.data = &msm8998_phy_cfg,	817	.data = &msm8998_phy_cfg,
		818	}, {
		819	/*
		820	* Deprecated. Only here to support legacy device
		821	* trees that didn't include "qcom,qusb2-v2-phy"
		822	*/
		823	.compatible = "qcom,sdm845-qusb2-phy",
		824	.data = &qusb2_v2_phy_cfg,
818	}, {	825	}, {
819	.compatible = "qcom,qusb2-v2-phy",	826	.compatible = "qcom,qusb2-v2-phy",
820	.data = &qusb2_v2_phy_cfg,	827	.data = &qusb2_v2_phy_cfg,

drivers/phy/qualcomm/phy-qcom-usb-hs-28nm.c+21−11

@@ -160,18 +160,11 @@ static int qcom_snps_hsphy_power_on(struct phy *phy) · 159 unmodified lines
160	ret = regulator_bulk_enable(VREG_NUM, priv->vregs);	160	ret = regulator_bulk_enable(VREG_NUM, priv->vregs);
161	if (ret)	161	if (ret)
162	return ret;	162	return ret;
163	ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks);	163
164	if (ret)
165	goto err_disable_regulator;
166	qcom_snps_hsphy_disable_hv_interrupts(priv);	164	qcom_snps_hsphy_disable_hv_interrupts(priv);
167	qcom_snps_hsphy_exit_retention(priv);	165	qcom_snps_hsphy_exit_retention(priv);
168		166
169	return 0;	167	return 0;
170
171	err_disable_regulator:
172	regulator_bulk_disable(VREG_NUM, priv->vregs);
173
174	return ret;
175	}	168	}
176		169
177	static int qcom_snps_hsphy_power_off(struct phy *phy)	170	static int qcom_snps_hsphy_power_off(struct phy *phy)
@@ -180,7 +173,6 @@ static int qcom_snps_hsphy_power_off(struct phy *phy) · 2 unmodified lines
180		173
181	qcom_snps_hsphy_enter_retention(priv);	174	qcom_snps_hsphy_enter_retention(priv);
182	qcom_snps_hsphy_enable_hv_interrupts(priv);	175	qcom_snps_hsphy_enable_hv_interrupts(priv);
183	clk_bulk_disable_unprepare(priv->num_clks, priv->clks);
184	regulator_bulk_disable(VREG_NUM, priv->vregs);	176	regulator_bulk_disable(VREG_NUM, priv->vregs);
185		177
186	return 0;	178	return 0;
@@ -266,21 +258,39 @@ static int qcom_snps_hsphy_init(struct phy *phy) · 79 unmodified lines
266	struct hsphy_priv *priv = phy_get_drvdata(phy);	258	struct hsphy_priv *priv = phy_get_drvdata(phy);
267	int ret;	259	int ret;
268		260
269	ret = qcom_snps_hsphy_reset(priv);	261	ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks);
270	if (ret)	262	if (ret)
271	return ret;	263	return ret;
272		264
		265	ret = qcom_snps_hsphy_reset(priv);
		266	if (ret)
		267	goto disable_clocks;
		268
273	qcom_snps_hsphy_init_sequence(priv);	269	qcom_snps_hsphy_init_sequence(priv);
274		270
275	ret = qcom_snps_hsphy_por_reset(priv);	271	ret = qcom_snps_hsphy_por_reset(priv);
276	if (ret)	272	if (ret)
277	return ret;	273	goto disable_clocks;
		274
		275	return 0;
		276
		277	disable_clocks:
		278	clk_bulk_disable_unprepare(priv->num_clks, priv->clks);
		279	return ret;
		280	}
		281
		282	static int qcom_snps_hsphy_exit(struct phy *phy)
		283	{
		284	struct hsphy_priv *priv = phy_get_drvdata(phy);
		285
		286	clk_bulk_disable_unprepare(priv->num_clks, priv->clks);
278		287
279	return 0;	288	return 0;
280	}	289	}
281		290
282	static const struct phy_ops qcom_snps_hsphy_ops = {	291	static const struct phy_ops qcom_snps_hsphy_ops = {
283	.init = qcom_snps_hsphy_init,	292	.init = qcom_snps_hsphy_init,
		293	.exit = qcom_snps_hsphy_exit,
284	.power_on = qcom_snps_hsphy_power_on,	294	.power_on = qcom_snps_hsphy_power_on,
285	.power_off = qcom_snps_hsphy_power_off,	295	.power_off = qcom_snps_hsphy_power_off,
286	.set_mode = qcom_snps_hsphy_set_mode,	296	.set_mode = qcom_snps_hsphy_set_mode,

drivers/phy/tegra/Kconfig+2−1

 # SPDX-License-Identifier: GPL-2.0-only
 config PHY_TEGRA_XUSB
 	tristate "NVIDIA Tegra XUSB pad controller driver"
-	depends on ARCH_TEGRA
+	depends on ARCH_TEGRA && USB_SUPPORT
+	select USB_COMMON
 	select USB_CONN_GPIO
 	select USB_PHY
 	help

drivers/platform/chrome/cros_ec_sensorhub.c+46−34

 	int sensor_type[MOTIONSENSE_TYPE_MAX] = { 0 };
 	struct cros_ec_command *msg = sensorhub->msg;
 	struct cros_ec_dev *ec = sensorhub->ec;
-	int ret, i, sensor_num;
+	int ret, i;
 	char *name;
-	sensor_num = cros_ec_get_sensor_count(ec);
-	if (sensor_num < 0) {
-		dev_err(dev,
-			"Unable to retrieve sensor information (err:%d)\n",
-			sensor_num);
-		return sensor_num;
-	}
-	sensorhub->sensor_num = sensor_num;
-	if (sensor_num == 0) {
-		dev_err(dev, "Zero sensors reported.\n");
-		return -EINVAL;
-	}
 	msg->version = 1;
 	msg->insize = sizeof(struct ec_response_motion_sense);
 	msg->outsize = sizeof(struct ec_params_motion_sense);
-	for (i = 0; i < sensor_num; i++) {
+	for (i = 0; i < sensorhub->sensor_num; i++) {
 		sensorhub->params->cmd = MOTIONSENSE_CMD_INFO;
 		sensorhub->params->info.sensor_num = i;
 	struct cros_ec_dev *ec = dev_get_drvdata(dev->parent);
 	struct cros_ec_sensorhub *data;
 	struct cros_ec_command *msg;
-	int ret;
+	int ret, i, sensor_num;
-	int i;
 	msg = devm_kzalloc(dev, sizeof(struct cros_ec_command) +
 			   max((u16)sizeof(struct ec_params_motion_sense),
 	dev_set_drvdata(dev, data);
 	/* Check whether this EC is a sensor hub. */
-	if (cros_ec_check_features(data->ec, EC_FEATURE_MOTION_SENSE)) {
+	if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE)) {
+		sensor_num = cros_ec_get_sensor_count(ec);
+		if (sensor_num < 0) {
+			dev_err(dev,
+				"Unable to retrieve sensor information (err:%d)\n",
+				sensor_num);
+			return sensor_num;
+		}
+		if (sensor_num == 0) {
+			dev_err(dev, "Zero sensors reported.\n");
+			return -EINVAL;
+		}
+		data->sensor_num = sensor_num;
+		/*
+		 * Prepare the ring handler before enumering the
+		 * sensors.
+		 */
+		if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE_FIFO)) {
+			ret = cros_ec_sensorhub_ring_allocate(data);
+			if (ret)
+				return ret;
+		}
+		/* Enumerate the sensors.*/
 		ret = cros_ec_sensorhub_register(dev, data);
 		if (ret)
 			return ret;
+		/*
+		 * When the EC does not have a FIFO, the sensors will query
+		 * their data themselves via sysfs or a software trigger.
+		 */
+		if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE_FIFO)) {
+			ret = cros_ec_sensorhub_ring_add(data);
+			if (ret)
+				return ret;
+			/*
+			 * The msg and its data is not under the control of the
+			 * ring handler.
+			 */
+			return devm_add_action_or_reset(dev,
+					cros_ec_sensorhub_ring_remove,
+					data);
+		}
 	} else {
 		/*
 		 * If the device has sensors but does not claim to
 		}
 	}
-	/*
-	 * If the EC does not have a FIFO, the sensors will query their data
-	 * themselves via sysfs or a software trigger.
-	 */
-	if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE_FIFO)) {
-		ret = cros_ec_sensorhub_ring_add(data);
-		if (ret)
-			return ret;
-		/*
-		 * The msg and its data is not under the control of the ring
-		 * handler.
-		 */
-		return devm_add_action_or_reset(dev,
-						cros_ec_sensorhub_ring_remove,
-						data);
-	}
 	return 0;
 }

drivers/platform/chrome/cros_ec_sensorhub_ring.c+46−27

 }
 /**
- * cros_ec_sensorhub_ring_add() - Add the FIFO functionality if the EC
+ * cros_ec_sensorhub_ring_allocate() - Prepare the FIFO functionality if the EC
- *				  supports it.
+ *				       supports it.
  *
  * @sensorhub : Sensor Hub object.
  *
  * Return: 0 on success.
  */
-int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub)
+int cros_ec_sensorhub_ring_allocate(struct cros_ec_sensorhub *sensorhub)
 {
-	struct cros_ec_dev *ec = sensorhub->ec;
-	int ret;
 	int fifo_info_length =
 		sizeof(struct ec_response_motion_sense_fifo_info) +
 		sizeof(u16) * sensorhub->sensor_num;
 	if (!sensorhub->fifo_info)
 		return -ENOMEM;
+	/*
+	 * Allocate the callback area based on the number of sensors.
+	 * Add one for the sensor ring.
+	 */
+	sensorhub->push_data = devm_kcalloc(sensorhub->dev,
+			sensorhub->sensor_num,
+			sizeof(*sensorhub->push_data),
+			GFP_KERNEL);
+	if (!sensorhub->push_data)
+		return -ENOMEM;
+	sensorhub->tight_timestamps = cros_ec_check_features(
+			sensorhub->ec,
+			EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS);
+	if (sensorhub->tight_timestamps) {
+		sensorhub->batch_state = devm_kcalloc(sensorhub->dev,
+				sensorhub->sensor_num,
+				sizeof(*sensorhub->batch_state),
+				GFP_KERNEL);
+		if (!sensorhub->batch_state)
+			return -ENOMEM;
+	}
+	return 0;
+}
+/**
+ * cros_ec_sensorhub_ring_add() - Add the FIFO functionality if the EC
+ *				  supports it.
+ *
+ * @sensorhub : Sensor Hub object.
+ *
+ * Return: 0 on success.
+ */
+int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub)
+{
+	struct cros_ec_dev *ec = sensorhub->ec;
+	int ret;
+	int fifo_info_length =
+		sizeof(struct ec_response_motion_sense_fifo_info) +
+		sizeof(u16) * sensorhub->sensor_num;
 	/* Retrieve FIFO information */
 	sensorhub->msg->version = 2;
 	sensorhub->params->cmd = MOTIONSENSE_CMD_FIFO_INFO;
 	if (!sensorhub->ring)
 		return -ENOMEM;
-	/*
-	 * Allocate the callback area based on the number of sensors.
-	 */
-	sensorhub->push_data = devm_kcalloc(
-			sensorhub->dev, sensorhub->sensor_num,
-			sizeof(*sensorhub->push_data),
-			GFP_KERNEL);
-	if (!sensorhub->push_data)
-		return -ENOMEM;
 	sensorhub->fifo_timestamp[CROS_EC_SENSOR_LAST_TS] =
 		cros_ec_get_time_ns();
-	sensorhub->tight_timestamps = cros_ec_check_features(
-			ec, EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS);
-	if (sensorhub->tight_timestamps) {
-		sensorhub->batch_state = devm_kcalloc(sensorhub->dev,
-				sensorhub->sensor_num,
-				sizeof(*sensorhub->batch_state),
-				GFP_KERNEL);
-		if (!sensorhub->batch_state)
-			return -ENOMEM;
-	}
 	/* Register the notifier that will act as a top half interrupt. */
 	sensorhub->notifier.notifier_call = cros_ec_sensorhub_event;
 	ret = blocking_notifier_chain_register(&ec->ec_dev->event_notifier,

drivers/platform/x86/asus-nb-wmi.c+24−0

@@ -515,9 +515,33 @@ static struct asus_wmi_driver asus_nb_wmi_driver = { · 514 unmodified lines
515	.detect_quirks = asus_nb_wmi_quirks,	515	.detect_quirks = asus_nb_wmi_quirks,
516	};	516	};
517		517
		518	static const struct dmi_system_id asus_nb_wmi_blacklist[] __initconst = {
		519	{
		520	/*
		521	* asus-nb-wm adds no functionality. The T100TA has a detachable
		522	* USB kbd, so no hotkeys and it has no WMI rfkill; and loading
		523	* asus-nb-wm causes the camera LED to turn and _stay_ on.
		524	*/
		525	.matches = {
		526	DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
		527	DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100TA"),
		528	},
		529	},
		530	{
		531	/* The Asus T200TA has the same issue as the T100TA */
		532	.matches = {
		533	DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
		534	DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T200TA"),
		535	},
		536	},
		537	{} /* Terminating entry */
		538	};
518		539
519	static int __init asus_nb_wmi_init(void)	540	static int __init asus_nb_wmi_init(void)
520	{	541	{
		542	if (dmi_check_system(asus_nb_wmi_blacklist))
		543	return -ENODEV;
		544
521	return asus_wmi_register_driver(&asus_nb_wmi_driver);	545	return asus_wmi_register_driver(&asus_nb_wmi_driver);
522	}	546	}
523		547

drivers/platform/x86/intel-uncore-frequency.c+1−1

@@ -53,7 +53,7 @@ static int uncore_max_entries __read_mostly; · 52 unmodified lines
53	/* Storage for uncore data for all instances */	53	/* Storage for uncore data for all instances */
54	static struct uncore_data *uncore_instances;	54	static struct uncore_data *uncore_instances;
55	/* Root of the all uncore sysfs kobjs */	55	/* Root of the all uncore sysfs kobjs */
56	struct kobject *uncore_root_kobj;	56	static struct kobject *uncore_root_kobj;
57	/* Stores the CPU mask of the target CPUs to use during uncore read/write */	57	/* Stores the CPU mask of the target CPUs to use during uncore read/write */
58	static cpumask_t uncore_cpu_mask;	58	static cpumask_t uncore_cpu_mask;
59	/* CPU online callback register instance */	59	/* CPU online callback register instance */

drivers/platform/x86/intel_pmc_core.c+5−19

 };
 static const struct pmc_bit_map icl_pfear_map[] = {
-	/* Ice Lake generation onwards only */
+	/* Ice Lake and Jasper Lake generation onwards only */
 	{"RES_65",		BIT(0)},
 	{"RES_66",		BIT(1)},
 	{"RES_67",		BIT(2)},
 };
 static const struct pmc_bit_map tgl_pfear_map[] = {
-	/* Tiger Lake, Elkhart Lake and Jasper Lake generation onwards only */
+	/* Tiger Lake and Elkhart Lake generation onwards only */
 	{"PSF9",		BIT(0)},
 	{"RES_66",		BIT(1)},
 	{"RES_67",		BIT(2)},
 	kfree(lpm_regs);
 }
-#if IS_ENABLED(CONFIG_DEBUG_FS)
 static bool slps0_dbg_latch;
 static inline u8 pmc_core_reg_read_byte(struct pmc_dev *pmcdev, int offset)
 				    &pmc_core_substate_l_sts_regs_fops);
 	}
 }
-#else
-static inline void pmc_core_dbgfs_register(struct pmc_dev *pmcdev)
-{
-}
-static inline void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev)
-{
-}
-#endif /* CONFIG_DEBUG_FS */
 static const struct x86_cpu_id intel_pmc_core_ids[] = {
 	X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L,		&spt_reg_map),
 	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&tgl_reg_map),
 	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&tgl_reg_map),
 	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT,	&tgl_reg_map),
-	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L,	&tgl_reg_map),
+	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L,	&icl_reg_map),
 	{}
 };
 	return 0;
 }
-#ifdef CONFIG_PM_SLEEP
 static bool warn_on_s0ix_failures;
 module_param(warn_on_s0ix_failures, bool, 0644);
 MODULE_PARM_DESC(warn_on_s0ix_failures, "Check and warn for S0ix failures");
-static int pmc_core_suspend(struct device *dev)
+static __maybe_unused int pmc_core_suspend(struct device *dev)
 {
 	struct pmc_dev *pmcdev = dev_get_drvdata(dev);
 	return false;
 }
-static int pmc_core_resume(struct device *dev)
+static __maybe_unused int pmc_core_resume(struct device *dev)
 {
 	struct pmc_dev *pmcdev = dev_get_drvdata(dev);
 	const struct pmc_bit_map **maps = pmcdev->map->lpm_sts;
 	return 0;
 }
-#endif
 static const struct dev_pm_ops pmc_core_pm_ops = {
 	SET_LATE_SYSTEM_SLEEP_PM_OPS(pmc_core_suspend, pmc_core_resume)
 };

drivers/platform/x86/intel_pmc_core.h+0−2

 	u32 base_addr;
 	void __iomem *regbase;
 	const struct pmc_reg_map *map;
-#if IS_ENABLED(CONFIG_DEBUG_FS)
 	struct dentry *dbgfs_dir;
-#endif /* CONFIG_DEBUG_FS */
 	int pmc_xram_read_bit;
 	struct mutex lock; /* generic mutex lock for PMC Core */

drivers/platform/x86/surface3_power.c+2−2

@@ -522,8 +522,8 @@ static int mshw0011_probe(struct i2c_client *client) · 521 unmodified lines
522	strlcpy(board_info.type, "MSHW0011-bat0", I2C_NAME_SIZE);	522	strlcpy(board_info.type, "MSHW0011-bat0", I2C_NAME_SIZE);
523		523
524	bat0 = i2c_acpi_new_device(dev, 1, &board_info);	524	bat0 = i2c_acpi_new_device(dev, 1, &board_info);
525	if (!bat0)	525	if (IS_ERR(bat0))
526	return -ENOMEM;	526	return PTR_ERR(bat0);
527		527
528	data->bat0 = bat0;	528	data->bat0 = bat0;
529	i2c_set_clientdata(bat0, data);	529	i2c_set_clientdata(bat0, data);

drivers/platform/x86/thinkpad_acpi.c+1−1

@@ -9548,7 +9548,7 @@ static ssize_t tpacpi_battery_store(int what, · 9547 unmodified lines
9548	if (!battery_info.batteries[battery].start_support)	9548	if (!battery_info.batteries[battery].start_support)
9549	return -ENODEV;	9549	return -ENODEV;
9550	/* valid values are [0, 99] */	9550	/* valid values are [0, 99] */
9551	if (value < 0 \|\| value > 99)	9551	if (value > 99)
9552	return -EINVAL;	9552	return -EINVAL;
9553	if (value > battery_info.batteries[battery].charge_stop)	9553	if (value > battery_info.batteries[battery].charge_stop)
9554	return -EINVAL;	9554	return -EINVAL;

drivers/platform/x86/xiaomi-wmi.c+2−2

@@ -23,7 +23,7 @@ struct xiaomi_wmi { · 22 unmodified lines
23	unsigned int key_code;	23	unsigned int key_code;
24	};	24	};
25		25
26	int xiaomi_wmi_probe(struct wmi_device wdev, const void context)	26	static int xiaomi_wmi_probe(struct wmi_device wdev, const void context)
27	{	27	{
28	struct xiaomi_wmi *data;	28	struct xiaomi_wmi *data;
29		29
@@ -48,7 +48,7 @@ int xiaomi_wmi_probe(struct wmi_device wdev, const void context) · 18 unmodified lines
48	return input_register_device(data->input_dev);	48	return input_register_device(data->input_dev);
49	}	49	}
50		50
51	void xiaomi_wmi_notify(struct wmi_device wdev, union acpi_object dummy)	51	static void xiaomi_wmi_notify(struct wmi_device wdev, union acpi_object dummy)
52	{	52	{
53	struct xiaomi_wmi *data;	53	struct xiaomi_wmi *data;
54		54

drivers/ptp/ptp_ines.c+2−2

@@ -400,8 +400,8 @@ static int ines_hwtstamp(struct mii_timestamper mii_ts, struct ifreq ifr) · 399 unmodified lines
400	ines_write32(port, ts_stat_rx, ts_stat_rx);	400	ines_write32(port, ts_stat_rx, ts_stat_rx);
401	ines_write32(port, ts_stat_tx, ts_stat_tx);	401	ines_write32(port, ts_stat_tx, ts_stat_tx);
402		402
403	port->rxts_enabled = ts_stat_rx == TS_ENABLE ? true : false;	403	port->rxts_enabled = ts_stat_rx == TS_ENABLE;
404	port->txts_enabled = ts_stat_tx == TS_ENABLE ? true : false;	404	port->txts_enabled = ts_stat_tx == TS_ENABLE;
405		405
406	spin_unlock_irqrestore(&port->lock, flags);	406	spin_unlock_irqrestore(&port->lock, flags);
407		407

drivers/regulator/core.c+11−14

@@ -5754,10 +5754,6 @@ static DECLARE_DELAYED_WORK(regulator_init_complete_work, · 5753 unmodified lines
5754		5754
5755	static int __init regulator_init_complete(void)	5755	static int __init regulator_init_complete(void)
5756	{	5756	{
5757	int delay = driver_deferred_probe_timeout;
5758
5759	if (delay < 0)
5760	delay = 0;
5761	/*	5757	/*
5762	* Since DT doesn't provide an idiomatic mechanism for	5758	* Since DT doesn't provide an idiomatic mechanism for
5763	* enabling full constraints and since it's much more natural	5759	* enabling full constraints and since it's much more natural
@@ -5768,17 +5764,18 @@ static int __init regulator_init_complete(void) · 4 unmodified lines
5768	has_full_constraints = true;	5764	has_full_constraints = true;
5769		5765
5770	/*	5766	/*
5771	* If driver_deferred_probe_timeout is set, we punt	5767	* We punt completion for an arbitrary amount of time since
5772	* completion for that many seconds since systems like	5768	* systems like distros will load many drivers from userspace
5773	* distros will load many drivers from userspace so consumers	5769	* so consumers might not always be ready yet, this is
5774	* might not always be ready yet, this is particularly an	5770	* particularly an issue with laptops where this might bounce
5775	* issue with laptops where this might bounce the display off	5771	* the display off then on. Ideally we'd get a notification
5776	* then on. Ideally we'd get a notification from userspace	5772	* from userspace when this happens but we don't so just wait
5777	* when this happens but we don't so just wait a bit and hope	5773	* a bit and hope we waited long enough. It'd be better if
5778	* we waited long enough. It'd be better if we'd only do	5774	* we'd only do this on systems that need it, and a kernel
5779	* this on systems that need it.	5775	* command line option might be useful.
5780	*/	5776	*/
5781	schedule_delayed_work(&regulator_init_complete_work, delay * HZ);	5777	schedule_delayed_work(&regulator_init_complete_work,
		5778	msecs_to_jiffies(30000));
5782		5779
5783	return 0;	5780	return 0;
5784	}	5781	}

drivers/remoteproc/mtk_common.h+1−1

@@ -68,7 +68,7 @@ struct mtk_scp { · 67 unmodified lines
68	wait_queue_head_t ack_wq;	68	wait_queue_head_t ack_wq;
69		69
70	void __iomem *cpu_addr;	70	void __iomem *cpu_addr;
71	phys_addr_t phys_addr;	71	dma_addr_t dma_addr;
72	size_t dram_size;	72	size_t dram_size;
73		73
74	struct rproc_subdev *rpmsg_subdev;	74	struct rproc_subdev *rpmsg_subdev;

drivers/remoteproc/mtk_scp.c+3−3

@@ -330,7 +330,7 @@ static void scp_da_to_va(struct rproc rproc, u64 da, size_t len) · 329 unmodified lines
330	if (offset >= 0 && (offset + len) < scp->sram_size)	330	if (offset >= 0 && (offset + len) < scp->sram_size)
331	return (void __force *)scp->sram_base + offset;	331	return (void __force *)scp->sram_base + offset;
332	} else {	332	} else {
333	offset = da - scp->phys_addr;	333	offset = da - scp->dma_addr;
334	if (offset >= 0 && (offset + len) < scp->dram_size)	334	if (offset >= 0 && (offset + len) < scp->dram_size)
335	return (void __force *)scp->cpu_addr + offset;	335	return (void __force *)scp->cpu_addr + offset;
336	}	336	}
@@ -451,7 +451,7 @@ static int scp_map_memory_region(struct mtk_scp *scp) · 114 unmodified lines
451	/* Reserved SCP code size */	451	/* Reserved SCP code size */
452	scp->dram_size = MAX_CODE_SIZE;	452	scp->dram_size = MAX_CODE_SIZE;
453	scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,	453	scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,
454	&scp->phys_addr, GFP_KERNEL);	454	&scp->dma_addr, GFP_KERNEL);
455	if (!scp->cpu_addr)	455	if (!scp->cpu_addr)
456	return -ENOMEM;	456	return -ENOMEM;
457		457
@@ -461,7 +461,7 @@ static int scp_map_memory_region(struct mtk_scp *scp) · 3 unmodified lines
461	static void scp_unmap_memory_region(struct mtk_scp *scp)	461	static void scp_unmap_memory_region(struct mtk_scp *scp)
462	{	462	{
463	dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,	463	dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,
464	scp->phys_addr);	464	scp->dma_addr);
465	of_reserved_mem_device_release(scp->dev);	465	of_reserved_mem_device_release(scp->dev);
466	}	466	}
467		467

drivers/remoteproc/qcom_q6v5_mss.c+20−13

 	}
 	return ret;
-};
+}
 static void q6v5_pds_disable(struct q6v5 *qproc, struct device **pds,
 			     size_t pd_count)
 		dev_pm_domain_detach(devs[i], false);
 	return ret;
-};
+}
 static void q6v5_pds_detach(struct q6v5 *qproc, struct device **pds,
 			    size_t pd_count)
 	ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name",
 					    1, &qproc->hexagon_mdt_image);
 	if (ret < 0 && ret != -EINVAL)
-		return ret;
+		goto free_rproc;
 	platform_set_drvdata(pdev, qproc);
 	qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12);
 	if (IS_ERR(qproc->sysmon)) {
 		ret = PTR_ERR(qproc->sysmon);
-		goto detach_proxy_pds;
+		goto remove_subdevs;
 	}
 	ret = rproc_add(rproc);
 	if (ret)
-		goto detach_proxy_pds;
+		goto remove_sysmon_subdev;
 	return 0;
-detach_proxy_pds:
+remove_sysmon_subdev:
+	qcom_remove_sysmon_subdev(qproc->sysmon);
+remove_subdevs:
 	qcom_remove_ipa_notify_subdev(qproc->rproc, &qproc->ipa_notify_subdev);
+	qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev);
+	qcom_remove_smd_subdev(rproc, &qproc->smd_subdev);
+	qcom_remove_glink_subdev(rproc, &qproc->glink_subdev);
+detach_proxy_pds:
 	q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count);
 detach_active_pds:
 	q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
 static int q6v5_remove(struct platform_device *pdev)
 {
 	struct q6v5 *qproc = platform_get_drvdata(pdev);
+	struct rproc *rproc = qproc->rproc;
-	rproc_del(qproc->rproc);
+	rproc_del(rproc);
 	qcom_remove_sysmon_subdev(qproc->sysmon);
-	qcom_remove_ipa_notify_subdev(qproc->rproc, &qproc->ipa_notify_subdev);
+	qcom_remove_ipa_notify_subdev(rproc, &qproc->ipa_notify_subdev);
-	qcom_remove_glink_subdev(qproc->rproc, &qproc->glink_subdev);
+	qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev);
-	qcom_remove_smd_subdev(qproc->rproc, &qproc->smd_subdev);
+	qcom_remove_smd_subdev(rproc, &qproc->smd_subdev);
-	qcom_remove_ssr_subdev(qproc->rproc, &qproc->ssr_subdev);
+	qcom_remove_glink_subdev(rproc, &qproc->glink_subdev);
-	q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
 	q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count);
+	q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
-	rproc_free(qproc->rproc);
+	rproc_free(rproc);
 	return 0;
 }

drivers/remoteproc/remoteproc_sysfs.c+1−0

@@ -4,6 +4,7 @@ · 3 unmodified lines
4	*/	4	*/
5		5
6	#include <linux/remoteproc.h>	6	#include <linux/remoteproc.h>
		7	#include <linux/slab.h>
7		8
8	#include "remoteproc_internal.h"	9	#include "remoteproc_internal.h"
9		10

drivers/remoteproc/stm32_rproc.c+1−0

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	#include <linux/regmap.h>	19	#include <linux/regmap.h>
20	#include <linux/remoteproc.h>	20	#include <linux/remoteproc.h>
21	#include <linux/reset.h>	21	#include <linux/reset.h>
		22	#include <linux/slab.h>
22	#include <linux/workqueue.h>	23	#include <linux/workqueue.h>
23		24
24	#include "remoteproc_internal.h"	25	#include "remoteproc_internal.h"

drivers/rpmsg/mtk_rpmsg.c+1−0

@@ -8,6 +8,7 @@ · 7 unmodified lines
8	#include <linux/platform_device.h>	8	#include <linux/platform_device.h>
9	#include <linux/remoteproc.h>	9	#include <linux/remoteproc.h>
10	#include <linux/rpmsg/mtk_rpmsg.h>	10	#include <linux/rpmsg/mtk_rpmsg.h>
		11	#include <linux/slab.h>
11	#include <linux/workqueue.h>	12	#include <linux/workqueue.h>
12		13
13	#include "rpmsg_internal.h"	14	#include "rpmsg_internal.h"

drivers/s390/net/qeth_core_main.c+5−5

 		unsigned int i;
 		/* Quiesce the NAPI instances: */
-		qeth_for_each_output_queue(card, queue, i) {
+		qeth_for_each_output_queue(card, queue, i)
 			napi_disable(&queue->napi);
-			del_timer_sync(&queue->timer);
-		}
 		/* Stop .ndo_start_xmit, might still access queue->napi. */
 		netif_tx_disable(dev);
-		/* Queues may get re-allocated, so remove the NAPIs here. */
+		qeth_for_each_output_queue(card, queue, i) {
-		qeth_for_each_output_queue(card, queue, i)
+			del_timer_sync(&queue->timer);
+			/* Queues may get re-allocated, so remove the NAPIs. */
 			netif_napi_del(&queue->napi);
+		}
 	} else {
 		netif_tx_disable(dev);
 	}

drivers/scsi/Kconfig+1−1

@@ -127,7 +127,7 @@ config CHR_DEV_SG · 126 unmodified lines
127		127
128	For scanners, look at SANE (<http://www.sane-project.org/>). For CD	128	For scanners, look at SANE (<http://www.sane-project.org/>). For CD
129	writer software look at Cdrtools	129	writer software look at Cdrtools
130	(<http://cdrecord.berlios.de/private/cdrecord.html>)	130	(<http://cdrtools.sourceforge.net/>)
131	and for burning a "disk at once": CDRDAO	131	and for burning a "disk at once": CDRDAO
132	(<http://cdrdao.sourceforge.net/>). Cdparanoia is a high	132	(<http://cdrdao.sourceforge.net/>). Cdparanoia is a high
133	quality digital reader of audio CDs (<http://www.xiph.org/paranoia/>).	133	quality digital reader of audio CDs (<http://www.xiph.org/paranoia/>).

drivers/scsi/ibmvscsi/ibmvfc.c+5−0

 	struct ibmvfc_host *vhost = tgt->vhost;
 	struct ibmvfc_event *evt;
+	if (!vhost->logged_in) {
+		ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT);
+		return;
+	}
 	if (vhost->discovery_threads >= disc_threads)
 		return;

drivers/scsi/ibmvscsi/ibmvscsi.c+0−4

 static int ibmvscsi_remove(struct vio_dev *vdev)
 {
 	struct ibmvscsi_host_data *hostdata = dev_get_drvdata(&vdev->dev);
-	unsigned long flags;
 	srp_remove_host(hostdata->host);
 	scsi_remove_host(hostdata->host);
 	purge_requests(hostdata, DID_ERROR);
-	spin_lock_irqsave(hostdata->host->host_lock, flags);
 	release_event_pool(&hostdata->pool, hostdata);
-	spin_unlock_irqrestore(hostdata->host->host_lock, flags);
 	ibmvscsi_release_crq_queue(&hostdata->queue, hostdata,
 					max_events);

drivers/scsi/qla2xxx/qla_attr.c+1−1

 	    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags))
 		msleep(1000);
-	qla_nvme_delete(vha);
 	qla24xx_disable_vp(vha);
 	qla2x00_wait_for_sess_deletion(vha);
+	qla_nvme_delete(vha);
 	vha->flags.delete_progress = 1;
 	qlt_remove_target(ha, vha);

drivers/scsi/qla2xxx/qla_mbx.c+1−1

@@ -3153,7 +3153,7 @@ qla24xx_abort_command(srb_t *sp) · 3152 unmodified lines
3153	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,	3153	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
3154	"Entered %s.\n", __func__);	3154	"Entered %s.\n", __func__);
3155		3155
3156	if (vha->flags.qpairs_available && sp->qpair)	3156	if (sp->qpair)
3157	req = sp->qpair->req;	3157	req = sp->qpair->req;
3158	else	3158	else
3159	return QLA_FUNCTION_FAILED;	3159	return QLA_FUNCTION_FAILED;

drivers/scsi/qla2xxx/qla_os.c+17−18

 	}
 	qla2x00_wait_for_hba_ready(base_vha);
+	/*
+	 * if UNLOADING flag is already set, then continue unload,
+	 * where it was set first.
+	 */
+	if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
+		return;
 	if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
 	    IS_QLA28XX(ha)) {
 		if (ha->flags.fw_started)
 	qla2x00_wait_for_sess_deletion(base_vha);
-	/*
-	 * if UNLOAD flag is already set, then continue unload,
-	 * where it was set first.
-	 */
-	if (test_bit(UNLOADING, &base_vha->dpc_flags))
-		return;
-	set_bit(UNLOADING, &base_vha->dpc_flags);
 	qla_nvme_delete(base_vha);
 	dma_free_coherent(&ha->pdev->dev,
 	struct qla_work_evt *e;
 	uint8_t bail;
+	if (test_bit(UNLOADING, &vha->dpc_flags))
+		return NULL;
 	QLA_VHA_MARK_BUSY(vha, bail);
 	if (bail)
 		return NULL;
 	struct pci_dev *pdev = ha->pdev;
 	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
-	/*
-	 * if UNLOAD flag is already set, then continue unload,
-	 * where it was set first.
-	 */
-	if (test_bit(UNLOADING, &base_vha->dpc_flags))
-		return;
 	ql_log(ql_log_warn, base_vha, 0x015b,
 	    "Disabling adapter.\n");
 		return;
 	}
-	qla2x00_wait_for_sess_deletion(base_vha);
+	/*
+	 * if UNLOADING flag is already set, then continue unload,
+	 * where it was set first.
+	 */
+	if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
+		return;
-	set_bit(UNLOADING, &base_vha->dpc_flags);
+	qla2x00_wait_for_sess_deletion(base_vha);
 	qla2x00_delete_all_vps(ha, base_vha);

drivers/scsi/scsi_lib.c+1−0

@@ -2284,6 +2284,7 @@ scsi_device_set_state(struct scsi_device *sdev, enum scsi_device_state state) · 2283 unmodified lines
2284	switch (oldstate) {	2284	switch (oldstate) {
2285	case SDEV_RUNNING:	2285	case SDEV_RUNNING:
2286	case SDEV_CREATED_BLOCK:	2286	case SDEV_CREATED_BLOCK:
		2287	case SDEV_QUIESCE:
2287	case SDEV_OFFLINE:	2288	case SDEV_OFFLINE:
2288	break;	2289	break;
2289	default:	2290	default:

drivers/scsi/sg.c+3−1

 	hp->flags = input_size;	/* structure abuse ... */
 	hp->pack_id = old_hdr.pack_id;
 	hp->usr_ptr = NULL;
-	if (copy_from_user(cmnd, buf, cmd_size))
+	if (copy_from_user(cmnd, buf, cmd_size)) {
+		sg_remove_request(sfp, srp);
 		return -EFAULT;
+	}
 	/*
 	 * SG_DXFER_TO_FROM_DEV is functionally equivalent to SG_DXFER_FROM_DEV,
 	 * but is is possible that the app intended SG_DXFER_TO_DEV, because there

drivers/soc/fsl/dpio/dpio-service.c+14−5

 				const struct dpaa2_fd *fd,
 				int nb)
 {
-	int i;
+	struct qbman_eq_desc *ed;
-	struct qbman_eq_desc ed[32];
+	int i, ret;
+	ed = kcalloc(sizeof(struct qbman_eq_desc), 32, GFP_KERNEL);
+	if (!ed)
+		return -ENOMEM;
 	d = service_select(d);
-	if (!d)
+	if (!d) {
-		return -ENODEV;
+		ret = -ENODEV;
+		goto out;
+	}
 	for (i = 0; i < nb; i++) {
 		qbman_eq_desc_clear(&ed[i]);
 		qbman_eq_desc_set_fq(&ed[i], fqid[i]);
 	}
-	return qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb);
+	ret = qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb);
+out:
+	kfree(ed);
+	return ret;
 }
 EXPORT_SYMBOL(dpaa2_io_service_enqueue_multiple_desc_fq);

drivers/soc/fsl/dpio/qbman-portal.c+2−4

 	if (!s->eqcr.available) {
 		eqcr_ci = s->eqcr.ci;
 		p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK;
-		s->eqcr.ci = __raw_readl(p) & full_mask;
+		s->eqcr.ci = *p & full_mask;
 		s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
 					eqcr_ci, s->eqcr.ci);
 		if (!s->eqcr.available) {
 	const uint32_t *cl;
 	uint32_t eqcr_ci, eqcr_pi, half_mask, full_mask;
 	int i, num_enqueued = 0;
-	uint64_t addr_cena;
 	half_mask = (s->eqcr.pi_ci_mask>>1);
 	full_mask = s->eqcr.pi_ci_mask;
 	/* Flush all the cacheline without load/store in between */
 	eqcr_pi = s->eqcr.pi;
-	addr_cena = (uint64_t)s->addr_cena;
 	for (i = 0; i < num_enqueued; i++)
 		eqcr_pi++;
 	s->eqcr.pi = eqcr_pi & full_mask;
 	if (!s->eqcr.available) {
 		eqcr_ci = s->eqcr.ci;
 		p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK;
-		s->eqcr.ci = __raw_readl(p) & full_mask;
+		s->eqcr.ci = *p & full_mask;
 		s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
 					eqcr_ci, s->eqcr.ci);
 		if (!s->eqcr.available)

drivers/soc/imx/Kconfig+1−0

@@ -21,6 +21,7 @@ config SOC_IMX8M · 20 unmodified lines
21	bool "i.MX8M SoC family support"	21	bool "i.MX8M SoC family support"
22	depends on ARCH_MXC \|\| COMPILE_TEST	22	depends on ARCH_MXC \|\| COMPILE_TEST
23	default ARCH_MXC && ARM64	23	default ARCH_MXC && ARM64
		24	select SOC_BUS
24	help	25	help
25	If you say yes here you get support for the NXP i.MX8M family	26	If you say yes here you get support for the NXP i.MX8M family
26	support, it will provide the SoC info like SoC family,	27	support, it will provide the SoC info like SoC family,

drivers/soc/xilinx/Kconfig+2−2

@@ -19,7 +19,7 @@ config XILINX_VCU · 18 unmodified lines
19		19
20	config ZYNQMP_POWER	20	config ZYNQMP_POWER
21	bool "Enable Xilinx Zynq MPSoC Power Management driver"	21	bool "Enable Xilinx Zynq MPSoC Power Management driver"
22	depends on PM && ARCH_ZYNQMP	22	depends on PM && ZYNQMP_FIRMWARE
23	default y	23	default y
24	select MAILBOX	24	select MAILBOX
25	select ZYNQMP_IPI_MBOX	25	select ZYNQMP_IPI_MBOX
@@ -35,7 +35,7 @@ config ZYNQMP_POWER · 9 unmodified lines
35	config ZYNQMP_PM_DOMAINS	35	config ZYNQMP_PM_DOMAINS
36	bool "Enable Zynq MPSoC generic PM domains"	36	bool "Enable Zynq MPSoC generic PM domains"
37	default y	37	default y
38	depends on PM && ARCH_ZYNQMP && ZYNQMP_FIRMWARE	38	depends on PM && ZYNQMP_FIRMWARE
39	select PM_GENERIC_DOMAINS	39	select PM_GENERIC_DOMAINS
40	help	40	help
41	Say yes to enable device power management through PM domains	41	Say yes to enable device power management through PM domains

drivers/staging/comedi/comedi_fops.c+3−1

@@ -2725,8 +2725,10 @@ static int comedi_open(struct inode inode, struct file file) · 2724 unmodified lines
2725	}	2725	}
2726		2726
2727	cfp = kzalloc(sizeof(*cfp), GFP_KERNEL);	2727	cfp = kzalloc(sizeof(*cfp), GFP_KERNEL);
2728	if (!cfp)	2728	if (!cfp) {
		2729	comedi_dev_put(dev);
2729	return -ENOMEM;	2730	return -ENOMEM;
		2731	}
2730		2732
2731	cfp->dev = dev;	2733	cfp->dev = dev;
2732		2734

drivers/staging/comedi/drivers/dt2815.c+3−0

 	int ret;
 	for (i = 0; i < insn->n; i++) {
+		/* FIXME: lo bit 0 chooses voltage output or current output */
 		lo = ((data[i] & 0x0f) << 4) | (chan << 1) | 0x01;
 		hi = (data[i] & 0xff0) >> 4;
 		if (ret)
 			return ret;
+		outb(hi, dev->iobase + DT2815_DATA);
 		devpriv->ao_readback[chan] = data[i];
 	}
 	return i;

drivers/staging/gasket/apex_driver.c+0−7

@@ -570,13 +570,6 @@ static const struct pci_device_id apex_pci_ids[] = { · 569 unmodified lines
570	{ PCI_DEVICE(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID) }, { 0 }	570	{ PCI_DEVICE(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID) }, { 0 }
571	};	571	};
572		572
573	static void apex_pci_fixup_class(struct pci_dev *pdev)
574	{
575	pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) \| pdev->class;
576	}
577	DECLARE_PCI_FIXUP_CLASS_HEADER(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID,
578	PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class);
579
580	static int apex_pci_probe(struct pci_dev *pci_dev,	573	static int apex_pci_probe(struct pci_dev *pci_dev,
581	const struct pci_device_id *id)	574	const struct pci_device_id *id)
582	{	575	{

drivers/staging/gasket/gasket_core.c+4−0

 		gasket_get_bar_index(gasket_dev,
 				     (vma->vm_pgoff << PAGE_SHIFT) +
 				     driver_desc->legacy_mmap_address_offset);
+	if (bar_index < 0)
+		return DO_MAP_REGION_INVALID;
 	phys_base = gasket_dev->bar_data[bar_index].phys_base + phys_offset;
 	while (mapped_bytes < map_length) {
 		/*

drivers/staging/gasket/gasket_sysfs.c+1−2

@@ -228,8 +228,7 @@ int gasket_sysfs_create_entries(struct device *device, · 227 unmodified lines
228	}	228	}
229		229
230	mutex_lock(&mapping->mutex);	230	mutex_lock(&mapping->mutex);
231	for (i = 0; strcmp(attrs[i].attr.attr.name, GASKET_ARRAY_END_MARKER);	231	for (i = 0; attrs[i].attr.attr.name != NULL; i++) {
232	i++) {
233	if (mapping->attribute_count == GASKET_SYSFS_MAX_NODES) {	232	if (mapping->attribute_count == GASKET_SYSFS_MAX_NODES) {
234	dev_err(device,	233	dev_err(device,
235	"Maximum number of sysfs nodes reached for device\n");	234	"Maximum number of sysfs nodes reached for device\n");

drivers/staging/gasket/gasket_sysfs.h+0−4

  */
 #define GASKET_SYSFS_MAX_NODES 196
-/* End markers for sysfs struct arrays. */
-#define GASKET_ARRAY_END_TOKEN GASKET_RESERVED_ARRAY_END
-#define GASKET_ARRAY_END_MARKER __stringify(GASKET_ARRAY_END_TOKEN)
 /*
  * Terminator struct for a gasket_sysfs_attr array. Must be at the end of
  * all gasket_sysfs_attribute arrays.

drivers/staging/ks7010/TODO+0−1

@@ -30,5 +30,4 @@ Now the TODOs: · 29 unmodified lines
30		30
31	Please send any patches to:	31	Please send any patches to:
32	Greg Kroah-Hartman <gregkh@linuxfoundation.org>	32	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
33	Wolfram Sang <wsa@the-dreams.de>
34	Linux Driver Project Developer List <driverdev-devel@linuxdriverproject.org>	33	Linux Driver Project Developer List <driverdev-devel@linuxdriverproject.org>

drivers/staging/vt6656/key.c+3−11

 	case  VNT_KEY_PAIRWISE:
 		key_mode |= mode;
 		key_inx = 4;
-		/* Don't save entry for pairwise key for station mode */
-		if (priv->op_mode == NL80211_IFTYPE_STATION)
-			clear_bit(entry, &priv->key_entry_inuse);
 		break;
 	default:
 		return -EINVAL;
 int vnt_set_keys(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
 		 struct ieee80211_vif *vif, struct ieee80211_key_conf *key)
 {
-	struct ieee80211_bss_conf *conf = &vif->bss_conf;
 	struct vnt_private *priv = hw->priv;
 	u8 *mac_addr = NULL;
 	u8 key_dec_mode = 0;
 		return -EOPNOTSUPP;
 	}
-	if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
+	if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
 		vnt_set_keymode(hw, mac_addr, key, VNT_KEY_PAIRWISE,
 				key_dec_mode, true);
-	} else {
+	else
-		vnt_set_keymode(hw, mac_addr, key, VNT_KEY_DEFAULTKEY,
+		vnt_set_keymode(hw, mac_addr, key, VNT_KEY_GROUP_ADDRESS,
 				key_dec_mode, true);
-		vnt_set_keymode(hw, (u8 *)conf->bssid, key,
-				VNT_KEY_GROUP_ADDRESS, key_dec_mode, true);
-	}
 	return 0;
 }

drivers/staging/vt6656/main_usb.c+17−14

 	priv->op_mode = vif->type;
-	vnt_set_bss_mode(priv);
 	/* LED blink on TX */
 	vnt_mac_set_led(priv, LEDSTS_STS, LEDSTS_INTER);
 		priv->basic_rates = conf->basic_rates;
 		vnt_update_top_rates(priv);
-		vnt_set_bss_mode(priv);
 		dev_dbg(&priv->usb->dev, "basic rates %x\n", conf->basic_rates);
 	}
 			priv->short_slot_time = false;
 		vnt_set_short_slot_time(priv);
-		vnt_update_ifs(priv);
 		vnt_set_vga_gain_offset(priv, priv->bb_vga[0]);
 		vnt_update_pre_ed_threshold(priv, false);
 	}
+	if (changed & (BSS_CHANGED_BASIC_RATES | BSS_CHANGED_ERP_PREAMBLE |
+		       BSS_CHANGED_ERP_SLOT))
+		vnt_set_bss_mode(priv);
 	if (changed & BSS_CHANGED_TXPOWER)
 		vnt_rf_setpower(priv, priv->current_rate,
 				conf->chandef.chan->hw_value);
 			vnt_mac_reg_bits_on(priv, MAC_REG_TFTCTL,
 					    TFTCTL_TSFCNTREN);
-			vnt_adjust_tsf(priv, conf->beacon_rate->hw_value,
-				       conf->sync_tsf, priv->current_tsf);
 			vnt_mac_set_beacon_interval(priv, conf->beacon_int);
 			vnt_reset_next_tbtt(priv, conf->beacon_int);
+			vnt_adjust_tsf(priv, conf->beacon_rate->hw_value,
+				       conf->sync_tsf, priv->current_tsf);
+			vnt_update_next_tbtt(priv,
+					     conf->sync_tsf, conf->beacon_int);
 		} else {
 			vnt_clear_current_tsf(priv);
 {
 	struct vnt_private *priv = hw->priv;
 	u8 rx_mode = 0;
-	int rc;
 	*total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
-	rc = vnt_control_in(priv, MESSAGE_TYPE_READ, MAC_REG_RCR,
+	vnt_control_in(priv, MESSAGE_TYPE_READ, MAC_REG_RCR,
-			    MESSAGE_REQUEST_MACREG, sizeof(u8), &rx_mode);
+		       MESSAGE_REQUEST_MACREG, sizeof(u8), &rx_mode);
-	if (!rc)
-		rx_mode = RCR_MULTICAST | RCR_BROADCAST;
 	dev_dbg(&priv->usb->dev, "rx mode in = %x\n", rx_mode);
 	case SET_KEY:
 		return vnt_set_keys(hw, sta, vif, key);
 	case DISABLE_KEY:
-		if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
+		if (test_bit(key->hw_key_idx, &priv->key_entry_inuse)) {
 			clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
+			vnt_mac_disable_keyentry(priv, key->hw_key_idx);
+		}
 	default:
 		break;
 	}

drivers/staging/vt6656/usbpipe.c+2−1

@@ -207,7 +207,8 @@ static void vnt_int_process_data(struct vnt_private *priv) · 206 unmodified lines
207	priv->wake_up_count =	207	priv->wake_up_count =
208	priv->hw->conf.listen_interval;	208	priv->hw->conf.listen_interval;
209		209
210	--priv->wake_up_count;	210	if (priv->wake_up_count)
		211	--priv->wake_up_count;
211		212
212	/* Turn on wake up to listen next beacon */	213	/* Turn on wake up to listen next beacon */
213	if (priv->wake_up_count == 1)	214	if (priv->wake_up_count == 1)

drivers/target/target_core_iblock.c+1−1

@@ -432,7 +432,7 @@ iblock_execute_zero_out(struct block_device bdev, struct se_cmd cmd) · 431 unmodified lines
432	target_to_linux_sector(dev, cmd->t_task_lba),	432	target_to_linux_sector(dev, cmd->t_task_lba),
433	target_to_linux_sector(dev,	433	target_to_linux_sector(dev,
434	sbc_get_write_same_sectors(cmd)),	434	sbc_get_write_same_sectors(cmd)),
435	GFP_KERNEL, false);	435	GFP_KERNEL, BLKDEV_ZERO_NOUNMAP);
436	if (ret)	436	if (ret)
437	return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE;	437	return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE;
438		438

drivers/thunderbolt/usb4.c+3−0

@@ -182,6 +182,9 @@ static int usb4_switch_op(struct tb_switch sw, u16 opcode, u8 status) · 181 unmodified lines
182	return ret;	182	return ret;
183		183
184	ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);	184	ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
		185	if (ret)
		186	return ret;
		187
185	if (val & ROUTER_CS_26_ONS)	188	if (val & ROUTER_CS_26_ONS)
186	return -EOPNOTSUPP;	189	return -EOPNOTSUPP;
187		190

drivers/tty/hvc/Kconfig+1−1

@@ -88,7 +88,7 @@ config HVC_DCC · 87 unmodified lines
88		88
89	config HVC_RISCV_SBI	89	config HVC_RISCV_SBI
90	bool "RISC-V SBI console support"	90	bool "RISC-V SBI console support"
91	depends on RISCV_SBI	91	depends on RISCV_SBI_V01
92	select HVC_DRIVER	92	select HVC_DRIVER
93	help	93	help
94	This enables support for console output via RISC-V SBI calls, which	94	This enables support for console output via RISC-V SBI calls, which

drivers/tty/hvc/hvc_console.c+14−9

@@ -302,10 +302,6 @@ int hvc_instantiate(uint32_t vtermno, int index, const struct hv_ops *ops) · 301 unmodified lines
302	vtermnos[index] = vtermno;	302	vtermnos[index] = vtermno;
303	cons_ops[index] = ops;	303	cons_ops[index] = ops;
304		304
305	/* reserve all indices up to and including this index */
306	if (last_hvc < index)
307	last_hvc = index;
308
309	/* check if we need to re-register the kernel console */	305	/* check if we need to re-register the kernel console */
310	hvc_check_console(index);	306	hvc_check_console(index);
311		307
@@ -960,13 +956,22 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data, · 648 unmodified lines
960	cons_ops[i] == hp->ops)	956	cons_ops[i] == hp->ops)
961	break;	957	break;
962		958
963	/* no matching slot, just use a counter */	959	if (i >= MAX_NR_HVC_CONSOLES) {
964	if (i >= MAX_NR_HVC_CONSOLES)	960
965	i = ++last_hvc;	961	/* find 'empty' slot for console */
		962	for (i = 0; i < MAX_NR_HVC_CONSOLES && vtermnos[i] != -1; i++) {
		963	}
		964
		965	/* no matching slot, just use a counter */
		966	if (i == MAX_NR_HVC_CONSOLES)
		967	i = ++last_hvc + MAX_NR_HVC_CONSOLES;
		968	}
966		969
967	hp->index = i;	970	hp->index = i;
968	cons_ops[i] = ops;	971	if (i < MAX_NR_HVC_CONSOLES) {
969	vtermnos[i] = vtermno;	972	cons_ops[i] = ops;
		973	vtermnos[i] = vtermno;
		974	}
970		975
971	list_add_tail(&(hp->next), &hvc_structs);	976	list_add_tail(&(hp->next), &hvc_structs);
972	mutex_unlock(&hvc_structs_mutex);	977	mutex_unlock(&hvc_structs_mutex);

drivers/tty/rocket.c+14−11

@@ -632,18 +632,21 @@ init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev) · 631 unmodified lines
632	tty_port_init(&info->port);	632	tty_port_init(&info->port);
633	info->port.ops = &rocket_port_ops;	633	info->port.ops = &rocket_port_ops;
634	info->flags &= ~ROCKET_MODE_MASK;	634	info->flags &= ~ROCKET_MODE_MASK;
635	switch (pc104[board][line]) {	635	if (board < ARRAY_SIZE(pc104) && line < ARRAY_SIZE(pc104_1))
636	case 422:	636	switch (pc104[board][line]) {
637	info->flags \|= ROCKET_MODE_RS422;	637	case 422:
638	break;	638	info->flags \|= ROCKET_MODE_RS422;
639	case 485:	639	break;
640	info->flags \|= ROCKET_MODE_RS485;	640	case 485:
641	break;	641	info->flags \|= ROCKET_MODE_RS485;
642	case 232:	642	break;
643	default:	643	case 232:
		644	default:
		645	info->flags \|= ROCKET_MODE_RS232;
		646	break;
		647	}
		648	else
644	info->flags \|= ROCKET_MODE_RS232;	649	info->flags \|= ROCKET_MODE_RS232;
645	break;
646	}
647		650
648	info->intmask = RXF_TRIG \| TXFIFO_MT \| SRC_INT \| DELTA_CD \| DELTA_CTS \| DELTA_DSR;	651	info->intmask = RXF_TRIG \| TXFIFO_MT \| SRC_INT \| DELTA_CD \| DELTA_CTS \| DELTA_DSR;
649	if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {	652	if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {

drivers/tty/serial/Kconfig+1−1

@@ -86,7 +86,7 @@ config SERIAL_EARLYCON_ARM_SEMIHOST · 85 unmodified lines
86		86
87	config SERIAL_EARLYCON_RISCV_SBI	87	config SERIAL_EARLYCON_RISCV_SBI
88	bool "Early console using RISC-V SBI"	88	bool "Early console using RISC-V SBI"
89	depends on RISCV_SBI	89	depends on RISCV_SBI_V01
90	select SERIAL_CORE	90	select SERIAL_CORE
91	select SERIAL_CORE_CONSOLE	91	select SERIAL_CORE_CONSOLE
92	select SERIAL_EARLYCON	92	select SERIAL_EARLYCON

drivers/tty/serial/owl-uart.c+7−0

 		return PTR_ERR(owl_port->clk);
 	}
+	ret = clk_prepare_enable(owl_port->clk);
+	if (ret) {
+		dev_err(&pdev->dev, "could not enable clk\n");
+		return ret;
+	}
 	owl_port->port.dev = &pdev->dev;
 	owl_port->port.line = pdev->id;
 	owl_port->port.type = PORT_OWL;
 	uart_remove_one_port(&owl_uart_driver, &owl_port->port);
 	owl_uart_ports[pdev->id] = NULL;
+	clk_disable_unprepare(owl_port->clk);
 	return 0;
 }

drivers/tty/serial/sh-sci.c+10−3

 				tty_insert_flip_char(tport, c, TTY_NORMAL);
 		} else {
 			for (i = 0; i < count; i++) {
-				char c = serial_port_in(port, SCxRDR);
+				char c;
-				status = serial_port_in(port, SCxSR);
+				if (port->type == PORT_SCIF ||
+				    port->type == PORT_HSCIF) {
+					status = serial_port_in(port, SCxSR);
+					c = serial_port_in(port, SCxRDR);
+				} else {
+					c = serial_port_in(port, SCxRDR);
+					status = serial_port_in(port, SCxSR);
+				}
 				if (uart_handle_sysrq_char(port, c)) {
 					count--; i--;
 					continue;

drivers/tty/serial/sunhv.c+3−0

@@ -567,6 +567,9 @@ static int hv_probe(struct platform_device *op) · 566 unmodified lines
567	sunserial_console_match(&sunhv_console, op->dev.of_node,	567	sunserial_console_match(&sunhv_console, op->dev.of_node,
568	&sunhv_reg, port->line, false);	568	&sunhv_reg, port->line, false);
569		569
		570	/* We need to initialize lock even for non-registered console */
		571	spin_lock_init(&port->lock);
		572
570	err = uart_add_one_port(&sunhv_reg, port);	573	err = uart_add_one_port(&sunhv_reg, port);
571	if (err)	574	if (err)
572	goto out_unregister_driver;	575	goto out_unregister_driver;

drivers/tty/serial/xilinx_uartps.c+50−162

@@ -26,13 +26,15 @@ · 25 unmodified lines
26		26
27	#define CDNS_UART_TTY_NAME "ttyPS"	27	#define CDNS_UART_TTY_NAME "ttyPS"
28	#define CDNS_UART_NAME "xuartps"	28	#define CDNS_UART_NAME "xuartps"
		29	#define CDNS_UART_MAJOR 0 /* use dynamic node allocation */
		30	#define CDNS_UART_MINOR 0 /* works best with devtmpfs */
		31	#define CDNS_UART_NR_PORTS 16
29	#define CDNS_UART_FIFO_SIZE 64 /* FIFO size */	32	#define CDNS_UART_FIFO_SIZE 64 /* FIFO size */
30	#define CDNS_UART_REGISTER_SPACE 0x1000	33	#define CDNS_UART_REGISTER_SPACE 0x1000
31	#define TX_TIMEOUT 500000	34	#define TX_TIMEOUT 500000
32		35
33	/* Rx Trigger level */	36	/* Rx Trigger level */
34	static int rx_trigger_level = 56;	37	static int rx_trigger_level = 56;
35	static int uartps_major;
36	module_param(rx_trigger_level, uint, 0444);	38	module_param(rx_trigger_level, uint, 0444);
37	MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");	39	MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
38		40
@@ -188,7 +190,6 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255"); · 149 unmodified lines
188	* @pclk: APB clock	190	* @pclk: APB clock
189	* @cdns_uart_driver: Pointer to UART driver	191	* @cdns_uart_driver: Pointer to UART driver
190	* @baud: Current baud rate	192	* @baud: Current baud rate
191	* @id: Port ID
192	* @clk_rate_change_nb: Notifier block for clock changes	193	* @clk_rate_change_nb: Notifier block for clock changes
193	* @quirks: Flags for RXBS support.	194	* @quirks: Flags for RXBS support.
194	*/	195	*/
@@ -198,7 +199,6 @@ struct cdns_uart { · 3 unmodified lines
198	struct clk *pclk;	199	struct clk *pclk;
199	struct uart_driver *cdns_uart_driver;	200	struct uart_driver *cdns_uart_driver;
200	unsigned int baud;	201	unsigned int baud;
201	int id;
202	struct notifier_block clk_rate_change_nb;	202	struct notifier_block clk_rate_change_nb;
203	u32 quirks;	203	u32 quirks;
204	bool cts_override;	204	bool cts_override;
@@ -1133,6 +1133,8 @@ static const struct uart_ops cdns_uart_ops = { · 928 unmodified lines
1133	#endif	1133	#endif
1134	};	1134	};
1135		1135
		1136	static struct uart_driver cdns_uart_uart_driver;
		1137
1136	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE	1138	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1137	/**	1139	/**
1138	* cdns_uart_console_putchar - write the character to the FIFO buffer	1140	* cdns_uart_console_putchar - write the character to the FIFO buffer
@@ -1272,6 +1274,16 @@ static int cdns_uart_console_setup(struct console co, char options) · 133 unmodified lines
1272		1274
1273	return uart_set_options(port, co, baud, parity, bits, flow);	1275	return uart_set_options(port, co, baud, parity, bits, flow);
1274	}	1276	}
		1277
		1278	static struct console cdns_uart_console = {
		1279	.name = CDNS_UART_TTY_NAME,
		1280	.write = cdns_uart_console_write,
		1281	.device = uart_console_device,
		1282	.setup = cdns_uart_console_setup,
		1283	.flags = CON_PRINTBUFFER,
		1284	.index = -1, /* Specified on the cmdline (e.g. console=ttyPS ) */
		1285	.data = &cdns_uart_uart_driver,
		1286	};
1275	#endif /* CONFIG_SERIAL_XILINX_PS_UART_CONSOLE */	1287	#endif /* CONFIG_SERIAL_XILINX_PS_UART_CONSOLE */
1276		1288
1277	#ifdef CONFIG_PM_SLEEP	1289	#ifdef CONFIG_PM_SLEEP
@@ -1403,89 +1415,8 @@ static const struct of_device_id cdns_uart_of_match[] = { · 125 unmodified lines
1403	};	1415	};
1404	MODULE_DEVICE_TABLE(of, cdns_uart_of_match);	1416	MODULE_DEVICE_TABLE(of, cdns_uart_of_match);
1405		1417
1406	/*	1418	/* Temporary variable for storing number of instances */
1407	* Maximum number of instances without alias IDs but if there is alias	1419	static int instances;
1408	* which target "< MAX_UART_INSTANCES" range this ID can't be used.
1409	*/
1410	#define MAX_UART_INSTANCES 32
1411
1412	/* Stores static aliases list */
1413	static DECLARE_BITMAP(alias_bitmap, MAX_UART_INSTANCES);
1414	static int alias_bitmap_initialized;
1415
1416	/* Stores actual bitmap of allocated IDs with alias IDs together */
1417	static DECLARE_BITMAP(bitmap, MAX_UART_INSTANCES);
1418	/* Protect bitmap operations to have unique IDs */
1419	static DEFINE_MUTEX(bitmap_lock);
1420
1421	static int cdns_get_id(struct platform_device *pdev)
1422	{
1423	int id, ret;
1424
1425	mutex_lock(&bitmap_lock);
1426
1427	/* Alias list is stable that's why get alias bitmap only once */
1428	if (!alias_bitmap_initialized) {
1429	ret = of_alias_get_alias_list(cdns_uart_of_match, "serial",
1430	alias_bitmap, MAX_UART_INSTANCES);
1431	if (ret && ret != -EOVERFLOW) {
1432	mutex_unlock(&bitmap_lock);
1433	return ret;
1434	}
1435
1436	alias_bitmap_initialized++;
1437	}
1438
1439	/* Make sure that alias ID is not taken by instance without alias */
1440	bitmap_or(bitmap, bitmap, alias_bitmap, MAX_UART_INSTANCES);
1441
1442	dev_dbg(&pdev->dev, "Alias bitmap: %*pb\n",
1443	MAX_UART_INSTANCES, bitmap);
1444
1445	/* Look for a serialN alias */
1446	id = of_alias_get_id(pdev->dev.of_node, "serial");
1447	if (id < 0) {
1448	dev_warn(&pdev->dev,
1449	"No serial alias passed. Using the first free id\n");
1450
1451	/*
1452	* Start with id 0 and check if there is no serial0 alias
1453	* which points to device which is compatible with this driver.
1454	* If alias exists then try next free position.
1455	*/
1456	id = 0;
1457
1458	for (;;) {
1459	dev_info(&pdev->dev, "Checking id %d\n", id);
1460	id = find_next_zero_bit(bitmap, MAX_UART_INSTANCES, id);
1461
1462	/* No free empty instance */
1463	if (id == MAX_UART_INSTANCES) {
1464	dev_err(&pdev->dev, "No free ID\n");
1465	mutex_unlock(&bitmap_lock);
1466	return -EINVAL;
1467	}
1468
1469	dev_dbg(&pdev->dev, "The empty id is %d\n", id);
1470	/* Check if ID is empty */
1471	if (!test_and_set_bit(id, bitmap)) {
1472	/* Break the loop if bit is taken */
1473	dev_dbg(&pdev->dev,
1474	"Selected ID %d allocation passed\n",
1475	id);
1476	break;
1477	}
1478	dev_dbg(&pdev->dev,
1479	"Selected ID %d allocation failed\n", id);
1480	/* if taking bit fails then try next one */
1481	id++;
1482	}
1483	}
1484
1485	mutex_unlock(&bitmap_lock);
1486
1487	return id;
1488	}
1489		1420
1490	/**	1421	/**
1491	* cdns_uart_probe - Platform driver probe	1422	* cdns_uart_probe - Platform driver probe
@@ -1495,16 +1426,11 @@ static int cdns_get_id(struct platform_device *pdev) · 3 unmodified lines
1495	*/	1426	*/
1496	static int cdns_uart_probe(struct platform_device *pdev)	1427	static int cdns_uart_probe(struct platform_device *pdev)
1497	{	1428	{
1498	int rc, irq;	1429	int rc, id, irq;
1499	struct uart_port *port;	1430	struct uart_port *port;
1500	struct resource *res;	1431	struct resource *res;
1501	struct cdns_uart *cdns_uart_data;	1432	struct cdns_uart *cdns_uart_data;
1502	const struct of_device_id *match;	1433	const struct of_device_id *match;
1503	struct uart_driver *cdns_uart_uart_driver;
1504	char *driver_name;
1505	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1506	struct console *cdns_uart_console;
1507	#endif
1508		1434
1509	cdns_uart_data = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_data),	1435	cdns_uart_data = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_data),
1510	GFP_KERNEL);	1436	GFP_KERNEL);
@@ -1514,64 +1440,36 @@ static int cdns_uart_probe(struct platform_device *pdev) · 3 unmodified lines
1514	if (!port)	1440	if (!port)
1515	return -ENOMEM;	1441	return -ENOMEM;
1516		1442
1517	cdns_uart_uart_driver = devm_kzalloc(&pdev->dev,	1443	/* Look for a serialN alias */
1518	sizeof(*cdns_uart_uart_driver),	1444	id = of_alias_get_id(pdev->dev.of_node, "serial");
1519	GFP_KERNEL);	1445	if (id < 0)
1520	if (!cdns_uart_uart_driver)	1446	id = 0;
1521	return -ENOMEM;
1522
1523	cdns_uart_data->id = cdns_get_id(pdev);
1524	if (cdns_uart_data->id < 0)
1525	return cdns_uart_data->id;
1526		1447
1527	/* There is a need to use unique driver name */	1448	if (id >= CDNS_UART_NR_PORTS) {
1528	driver_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s%d",	1449	dev_err(&pdev->dev, "Cannot get uart_port structure\n");
1529	CDNS_UART_NAME, cdns_uart_data->id);	1450	return -ENODEV;
1530	if (!driver_name) {
1531	rc = -ENOMEM;
1532	goto err_out_id;
1533	}	1451	}
1534		1452
1535	cdns_uart_uart_driver->owner = THIS_MODULE;	1453	if (!cdns_uart_uart_driver.state) {
1536	cdns_uart_uart_driver->driver_name = driver_name;	1454	cdns_uart_uart_driver.owner = THIS_MODULE;
1537	cdns_uart_uart_driver->dev_name = CDNS_UART_TTY_NAME;	1455	cdns_uart_uart_driver.driver_name = CDNS_UART_NAME;
1538	cdns_uart_uart_driver->major = uartps_major;	1456	cdns_uart_uart_driver.dev_name = CDNS_UART_TTY_NAME;
1539	cdns_uart_uart_driver->minor = cdns_uart_data->id;	1457	cdns_uart_uart_driver.major = CDNS_UART_MAJOR;
1540	cdns_uart_uart_driver->nr = 1;	1458	cdns_uart_uart_driver.minor = CDNS_UART_MINOR;
1541		1459	cdns_uart_uart_driver.nr = CDNS_UART_NR_PORTS;
1542	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE	1460	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1543	cdns_uart_console = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_console),	1461	cdns_uart_uart_driver.cons = &cdns_uart_console;
1544	GFP_KERNEL);	1462	cdns_uart_console.index = id;
1545	if (!cdns_uart_console) {
1546	rc = -ENOMEM;
1547	goto err_out_id;
1548	}
1549
1550	strncpy(cdns_uart_console->name, CDNS_UART_TTY_NAME,
1551	sizeof(cdns_uart_console->name));
1552	cdns_uart_console->index = cdns_uart_data->id;
1553	cdns_uart_console->write = cdns_uart_console_write;
1554	cdns_uart_console->device = uart_console_device;
1555	cdns_uart_console->setup = cdns_uart_console_setup;
1556	cdns_uart_console->flags = CON_PRINTBUFFER;
1557	cdns_uart_console->data = cdns_uart_uart_driver;
1558	cdns_uart_uart_driver->cons = cdns_uart_console;
1559	#endif	1463	#endif
1560		1464
1561	rc = uart_register_driver(cdns_uart_uart_driver);	1465	rc = uart_register_driver(&cdns_uart_uart_driver);
1562	if (rc < 0) {	1466	if (rc < 0) {
1563	dev_err(&pdev->dev, "Failed to register driver\n");	1467	dev_err(&pdev->dev, "Failed to register driver\n");
1564	goto err_out_id;	1468	return rc;
		1469	}
1565	}	1470	}
1566		1471
1567	cdns_uart_data->cdns_uart_driver = cdns_uart_uart_driver;	1472	cdns_uart_data->cdns_uart_driver = &cdns_uart_uart_driver;
1568
1569	/*
1570	* Setting up proper name_base needs to be done after uart
1571	* registration because tty_driver structure is not filled.
1572	* name_base is 0 by default.
1573	*/
1574	cdns_uart_uart_driver->tty_driver->name_base = cdns_uart_data->id;
1575		1473
1576	match = of_match_node(cdns_uart_of_match, pdev->dev.of_node);	1474	match = of_match_node(cdns_uart_of_match, pdev->dev.of_node);
1577	if (match && match->data) {	1475	if (match && match->data) {
@@ -1649,6 +1547,7 @@ static int cdns_uart_probe(struct platform_device *pdev) · 71 unmodified lines
1649	port->ops = &cdns_uart_ops;	1547	port->ops = &cdns_uart_ops;
1650	port->fifosize = CDNS_UART_FIFO_SIZE;	1548	port->fifosize = CDNS_UART_FIFO_SIZE;
1651	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE);	1549	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE);
		1550	port->line = id;
1652		1551
1653	/*	1552	/*
1654	* Register the port.	1553	* Register the port.
@@ -1680,7 +1579,7 @@ static int cdns_uart_probe(struct platform_device *pdev) · 25 unmodified lines
1680	console_port = port;	1579	console_port = port;
1681	#endif	1580	#endif
1682		1581
1683	rc = uart_add_one_port(cdns_uart_uart_driver, port);	1582	rc = uart_add_one_port(&cdns_uart_uart_driver, port);
1684	if (rc) {	1583	if (rc) {
1685	dev_err(&pdev->dev,	1584	dev_err(&pdev->dev,
1686	"uart_add_one_port() failed; err=%i\n", rc);	1585	"uart_add_one_port() failed; err=%i\n", rc);
@@ -1690,13 +1589,15 @@ static int cdns_uart_probe(struct platform_device *pdev) · 3 unmodified lines
1690	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE	1589	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1691	/* This is not port which is used for console that's why clean it up */	1590	/* This is not port which is used for console that's why clean it up */
1692	if (console_port == port &&	1591	if (console_port == port &&
1693	!(cdns_uart_uart_driver->cons->flags & CON_ENABLED))	1592	!(cdns_uart_uart_driver.cons->flags & CON_ENABLED))
1694	console_port = NULL;	1593	console_port = NULL;
1695	#endif	1594	#endif
1696		1595
1697	uartps_major = cdns_uart_uart_driver->tty_driver->major;
1698	cdns_uart_data->cts_override = of_property_read_bool(pdev->dev.of_node,	1596	cdns_uart_data->cts_override = of_property_read_bool(pdev->dev.of_node,
1699	"cts-override");	1597	"cts-override");
		1598
		1599	instances++;
		1600
1700	return 0;	1601	return 0;
1701		1602
1702	err_out_pm_disable:	1603	err_out_pm_disable:
@@ -1712,12 +1613,8 @@ err_out_clk_disable: · 9 unmodified lines
1712	err_out_clk_dis_pclk:	1613	err_out_clk_dis_pclk:
1713	clk_disable_unprepare(cdns_uart_data->pclk);	1614	clk_disable_unprepare(cdns_uart_data->pclk);
1714	err_out_unregister_driver:	1615	err_out_unregister_driver:
1715	uart_unregister_driver(cdns_uart_data->cdns_uart_driver);	1616	if (!instances)
1716	err_out_id:	1617	uart_unregister_driver(cdns_uart_data->cdns_uart_driver);
1717	mutex_lock(&bitmap_lock);
1718	if (cdns_uart_data->id < MAX_UART_INSTANCES)
1719	clear_bit(cdns_uart_data->id, bitmap);
1720	mutex_unlock(&bitmap_lock);
1721	return rc;	1618	return rc;
1722	}	1619	}
1723		1620
@@ -1740,10 +1637,6 @@ static int cdns_uart_remove(struct platform_device *pdev) · 16 unmodified lines
1740	#endif	1637	#endif
1741	rc = uart_remove_one_port(cdns_uart_data->cdns_uart_driver, port);	1638	rc = uart_remove_one_port(cdns_uart_data->cdns_uart_driver, port);
1742	port->mapbase = 0;	1639	port->mapbase = 0;
1743	mutex_lock(&bitmap_lock);
1744	if (cdns_uart_data->id < MAX_UART_INSTANCES)
1745	clear_bit(cdns_uart_data->id, bitmap);
1746	mutex_unlock(&bitmap_lock);
1747	clk_disable_unprepare(cdns_uart_data->uartclk);	1640	clk_disable_unprepare(cdns_uart_data->uartclk);
1748	clk_disable_unprepare(cdns_uart_data->pclk);	1641	clk_disable_unprepare(cdns_uart_data->pclk);
1749	pm_runtime_disable(&pdev->dev);	1642	pm_runtime_disable(&pdev->dev);
@@ -1756,13 +1649,8 @@ static int cdns_uart_remove(struct platform_device *pdev) · 6 unmodified lines
1756	console_port = NULL;	1649	console_port = NULL;
1757	#endif	1650	#endif
1758		1651
1759	/* If this is last instance major number should be initialized */	1652	if (!--instances)
1760	mutex_lock(&bitmap_lock);	1653	uart_unregister_driver(cdns_uart_data->cdns_uart_driver);
1761	if (bitmap_empty(bitmap, MAX_UART_INSTANCES))
1762	uartps_major = 0;
1763	mutex_unlock(&bitmap_lock);
1764
1765	uart_unregister_driver(cdns_uart_data->cdns_uart_driver);
1766	return rc;	1654	return rc;
1767	}	1655	}
1768		1656

drivers/tty/sysrq.c+2−0

 		return 1;
 	return sysrq_enabled;
 }
+EXPORT_SYMBOL_GPL(sysrq_mask);
 /*
  * A value of 1 means 'all', other nonzero values are an op mask:
 	return 0;
 }
+EXPORT_SYMBOL_GPL(sysrq_toggle_support);
 static int __sysrq_swap_key_ops(int key, struct sysrq_key_op *insert_op_p,
                                 struct sysrq_key_op *remove_op_p)

drivers/tty/vt/vt.c+10−4

 #include <linux/errno.h>
 #include <linux/kd.h>
 #include <linux/slab.h>
+#include <linux/vmalloc.h>
 #include <linux/major.h>
 #include <linux/mm.h>
 #include <linux/console.h>
 	/* allocate everything in one go */
 	memsize = cols * rows * sizeof(char32_t);
 	memsize += rows * sizeof(char32_t *);
-	p = kmalloc(memsize, GFP_KERNEL);
+	p = vmalloc(memsize);
 	if (!p)
 		return NULL;
 	return uniscr;
 }
+static void vc_uniscr_free(struct uni_screen *uniscr)
+{
+	vfree(uniscr);
+}
 static void vc_uniscr_set(struct vc_data *vc, struct uni_screen *new_uniscr)
 {
-	kfree(vc->vc_uni_screen);
+	vc_uniscr_free(vc->vc_uni_screen);
 	vc->vc_uni_screen = new_uniscr;
 }
 	if (new_cols == vc->vc_cols && new_rows == vc->vc_rows)
 		return 0;
-	if (new_screen_size > (4 << 20))
+	if (new_screen_size > KMALLOC_MAX_SIZE)
 		return -EINVAL;
 	newscreen = kzalloc(new_screen_size, GFP_USER);
 	if (!newscreen)
 	err = resize_screen(vc, new_cols, new_rows, user);
 	if (err) {
 		kfree(newscreen);
-		kfree(new_uniscr);
+		vc_uniscr_free(new_uniscr);
 		return err;
 	}

drivers/usb/chipidea/ci_hdrc_msm.c+1−1

@@ -114,7 +114,7 @@ static int ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event) · 113 unmodified lines
114	hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,	114	hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
115	HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);	115	HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);
116		116
117	if (!IS_ERR(ci->platdata->vbus_extcon.edev)) {	117	if (!IS_ERR(ci->platdata->vbus_extcon.edev) \|\| ci->role_switch) {
118	hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,	118	hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
119	HS_PHY_SESS_VLD_CTRL_EN,	119	HS_PHY_SESS_VLD_CTRL_EN,
120	HS_PHY_SESS_VLD_CTRL_EN);	120	HS_PHY_SESS_VLD_CTRL_EN);

drivers/usb/class/cdc-acm.c+31−5

 exit:
 	retval = usb_submit_urb(urb, GFP_ATOMIC);
-	if (retval && retval != -EPERM)
+	if (retval && retval != -EPERM && retval != -ENODEV)
 		dev_err(&acm->control->dev,
 			"%s - usb_submit_urb failed: %d\n", __func__, retval);
+	else
+		dev_vdbg(&acm->control->dev,
+			"control resubmission terminated %d\n", retval);
 }
 static int acm_submit_read_urb(struct acm *acm, int index, gfp_t mem_flags)
 			dev_err(&acm->data->dev,
 				"urb %d failed submission with %d\n",
 				index, res);
+		} else {
+			dev_vdbg(&acm->data->dev, "intended failure %d\n", res);
 		}
 		set_bit(index, &acm->read_urbs_free);
 		return res;
 	int status = urb->status;
 	bool stopped = false;
 	bool stalled = false;
+	bool cooldown = false;
 	dev_vdbg(&acm->data->dev, "got urb %d, len %d, status %d\n",
 		rb->index, urb->actual_length, status);
 			__func__, status);
 		stopped = true;
 		break;
+	case -EOVERFLOW:
+	case -EPROTO:
+		dev_dbg(&acm->data->dev,
+			"%s - cooling babbling device\n", __func__);
+		usb_mark_last_busy(acm->dev);
+		set_bit(rb->index, &acm->urbs_in_error_delay);
+		cooldown = true;
+		break;
 	default:
 		dev_dbg(&acm->data->dev,
 			"%s - nonzero urb status received: %d\n",
 	 */
 	smp_mb__after_atomic();
-	if (stopped || stalled) {
+	if (stopped || stalled || cooldown) {
 		if (stalled)
 			schedule_work(&acm->work);
+		else if (cooldown)
+			schedule_delayed_work(&acm->dwork, HZ / 2);
 		return;
 	}
 	struct acm *acm = container_of(work, struct acm, work);
 	if (test_bit(EVENT_RX_STALL, &acm->flags)) {
-		if (!(usb_autopm_get_interface(acm->data))) {
+		smp_mb(); /* against acm_suspend() */
+		if (!acm->susp_count) {
 			for (i = 0; i < acm->rx_buflimit; i++)
 				usb_kill_urb(acm->read_urbs[i]);
 			usb_clear_halt(acm->dev, acm->in);
 			acm_submit_read_urbs(acm, GFP_KERNEL);
-			usb_autopm_put_interface(acm->data);
+			clear_bit(EVENT_RX_STALL, &acm->flags);
 		}
-		clear_bit(EVENT_RX_STALL, &acm->flags);
+	}
+	if (test_and_clear_bit(ACM_ERROR_DELAY, &acm->flags)) {
+		for (i = 0; i < ACM_NR; i++)
+			if (test_and_clear_bit(i, &acm->urbs_in_error_delay))
+					acm_submit_read_urb(acm, i, GFP_NOIO);
 	}
 	if (test_and_clear_bit(EVENT_TTY_WAKEUP, &acm->flags))
 	acm->readsize = readsize;
 	acm->rx_buflimit = num_rx_buf;
 	INIT_WORK(&acm->work, acm_softint);
+	INIT_DELAYED_WORK(&acm->dwork, acm_softint);
 	init_waitqueue_head(&acm->wioctl);
 	spin_lock_init(&acm->write_lock);
 	spin_lock_init(&acm->read_lock);
 	acm_kill_urbs(acm);
 	cancel_work_sync(&acm->work);
+	cancel_delayed_work_sync(&acm->dwork);
 	tty_unregister_device(acm_tty_driver, acm->minor);
 	acm_kill_urbs(acm);
 	cancel_work_sync(&acm->work);
+	cancel_delayed_work_sync(&acm->dwork);
+	acm->urbs_in_error_delay = 0;
 	return 0;
 }

drivers/usb/class/cdc-acm.h+4−1

 #		define EVENT_TTY_WAKEUP	0
 #		define EVENT_RX_STALL	1
 #		define ACM_THROTTLED	2
+#		define ACM_ERROR_DELAY	3
+	unsigned long urbs_in_error_delay;		/* these need to be restarted after a delay */
 	struct usb_cdc_line_coding line;		/* bits, stop, parity */
-	struct work_struct work;			/* work queue entry for line discipline waking up */
+	struct work_struct work;			/* work queue entry for various purposes*/
+	struct delayed_work dwork;			/* for cool downs needed in error recovery */
 	unsigned int ctrlin;				/* input control lines (DCD, DSR, RI, break, overruns) */
 	unsigned int ctrlout;				/* output control lines (DTR, RTS) */
 	struct async_icount iocount;			/* counters for control line changes */

drivers/usb/core/devio.c+2−3

 {
 	struct usb_memory *usbm = NULL;
 	struct usb_dev_state *ps = file->private_data;
+	struct usb_hcd *hcd = bus_to_hcd(ps->dev->bus);
 	size_t size = vma->vm_end - vma->vm_start;
 	void *mem;
 	unsigned long flags;
 	usbm->vma_use_count = 1;
 	INIT_LIST_HEAD(&usbm->memlist);
-	if (remap_pfn_range(vma, vma->vm_start,
+	if (dma_mmap_coherent(hcd->self.sysdev, vma, mem, dma_handle, size)) {
-			virt_to_phys(usbm->mem) >> PAGE_SHIFT,
-			size, vma->vm_page_prot) < 0) {
 		dec_usb_memory_use_count(usbm, &usbm->vma_use_count);
 		return -EAGAIN;
 	}

drivers/usb/core/hub.c+15−3

 #ifdef CONFIG_PM
 			udev->reset_resume = 1;
 #endif
+			/* Don't set the change_bits when the device
+			 * was powered off.
+			 */
+			if (test_bit(port1, hub->power_bits))
+				set_bit(port1, hub->change_bits);
 		} else {
 			/* The power session is gone; tell hub_wq */
 {
 	int old_scheme_first_port =
 		port_dev->quirks & USB_PORT_QUIRK_OLD_SCHEME;
-	int quick_enumeration = (udev->speed == USB_SPEED_HIGH);
 	if (udev->speed >= USB_SPEED_SUPER)
 		return false;
-	return USE_NEW_SCHEME(retry, old_scheme_first_port || old_scheme_first
+	return USE_NEW_SCHEME(retry, old_scheme_first_port || old_scheme_first);
-			      || quick_enumeration);
 }
 /* Is a USB 3.0 port in the Inactive or Compliance Mode state?
 		if (portchange & USB_PORT_STAT_C_ENABLE)
 			usb_clear_port_feature(hub->hdev, port1,
 					USB_PORT_FEAT_C_ENABLE);
+		/*
+		 * Whatever made this reset-resume necessary may have
+		 * turned on the port1 bit in hub->change_bits.  But after
+		 * a successful reset-resume we want the bit to be clear;
+		 * if it was on it would indicate that something happened
+		 * following the reset-resume.
+		 */
+		clear_bit(port1, hub->change_bits);
 	}
 	return status;

drivers/usb/core/message.c+10−3

 	int i, retval;
 	spin_lock_irqsave(&io->lock, flags);
-	if (io->status) {
+	if (io->status || io->count == 0) {
 		spin_unlock_irqrestore(&io->lock, flags);
 		return;
 	}
 	/* shut everything down */
 	io->status = -ECONNRESET;
+	io->count++;		/* Keep the request alive until we're done */
 	spin_unlock_irqrestore(&io->lock, flags);
 	for (i = io->entries - 1; i >= 0; --i) {
 			dev_warn(&io->dev->dev, "%s, unlink --> %d\n",
 				 __func__, retval);
 	}
+	spin_lock_irqsave(&io->lock, flags);
+	io->count--;
+	if (!io->count)
+		complete(&io->complete);
+	spin_unlock_irqrestore(&io->lock, flags);
 }
 EXPORT_SYMBOL_GPL(usb_sg_cancel);
 	if (usb_endpoint_out(epaddr)) {
 		ep = dev->ep_out[epnum];
-		if (reset_hardware)
+		if (reset_hardware && epnum != 0)
 			dev->ep_out[epnum] = NULL;
 	} else {
 		ep = dev->ep_in[epnum];
-		if (reset_hardware)
+		if (reset_hardware && epnum != 0)
 			dev->ep_in[epnum] = NULL;
 	}
 	if (ep) {

drivers/usb/core/quirks.c+4−0

 	/* Corsair K70 LUX */
 	{ USB_DEVICE(0x1b1c, 0x1b36), .driver_info = USB_QUIRK_DELAY_INIT },
+	/* Corsair K70 RGB RAPDIFIRE */
+	{ USB_DEVICE(0x1b1c, 0x1b38), .driver_info = USB_QUIRK_DELAY_INIT |
+	  USB_QUIRK_DELAY_CTRL_MSG },
 	/* MIDI keyboard WORLDE MINI */
 	{ USB_DEVICE(0x1c75, 0x0204), .driver_info =
 			USB_QUIRK_CONFIG_INTF_STRINGS },

drivers/usb/dwc3/core.h+6−2

 /* Global TX Fifo Size Register */
 #define DWC31_GTXFIFOSIZ_TXFRAMNUM	BIT(15)		/* DWC_usb31 only */
-#define DWC31_GTXFIFOSIZ_TXFDEF(n)	((n) & 0x7fff)	/* DWC_usb31 only */
+#define DWC31_GTXFIFOSIZ_TXFDEP(n)	((n) & 0x7fff)	/* DWC_usb31 only */
-#define DWC3_GTXFIFOSIZ_TXFDEF(n)	((n) & 0xffff)
+#define DWC3_GTXFIFOSIZ_TXFDEP(n)	((n) & 0xffff)
 #define DWC3_GTXFIFOSIZ_TXFSTADDR(n)	((n) & 0xffff0000)
+/* Global RX Fifo Size Register */
+#define DWC31_GRXFIFOSIZ_RXFDEP(n)	((n) & 0x7fff)	/* DWC_usb31 only */
+#define DWC3_GRXFIFOSIZ_RXFDEP(n)	((n) & 0xffff)
 /* Global Event Size Registers */
 #define DWC3_GEVNTSIZ_INTMASK		BIT(31)
 #define DWC3_GEVNTSIZ_SIZE(n)		((n) & 0xffff)

drivers/usb/dwc3/gadget.c+47−29

 	u32			reg;
 	u8			link_state;
-	u8			speed;
 	/*
 	 * According to the Databook Remote wakeup request should
 	 */
 	reg = dwc3_readl(dwc->regs, DWC3_DSTS);
-	speed = reg & DWC3_DSTS_CONNECTSPD;
-	if ((speed == DWC3_DSTS_SUPERSPEED) ||
-	    (speed == DWC3_DSTS_SUPERSPEED_PLUS))
-		return 0;
 	link_state = DWC3_DSTS_USBLNKST(reg);
 	switch (link_state) {
+	case DWC3_LINK_STATE_RESET:
 	case DWC3_LINK_STATE_RX_DET:	/* in HS, means Early Suspend */
 	case DWC3_LINK_STATE_U3:	/* in HS, means SUSPEND */
+	case DWC3_LINK_STATE_RESUME:
 		break;
 	default:
 		return -EINVAL;
 {
 	struct dwc3 *dwc = dep->dwc;
 	int mdwidth;
-	int kbytes;
 	int size;
 	mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
 	size = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(dep->number >> 1));
 	if (dwc3_is_usb31(dwc))
-		size = DWC31_GTXFIFOSIZ_TXFDEF(size);
+		size = DWC31_GTXFIFOSIZ_TXFDEP(size);
 	else
-		size = DWC3_GTXFIFOSIZ_TXFDEF(size);
+		size = DWC3_GTXFIFOSIZ_TXFDEP(size);
 	/* FIFO Depth is in MDWDITH bytes. Multiply */
 	size *= mdwidth;
-	kbytes = size / 1024;
-	if (kbytes == 0)
-		kbytes = 1;
 	/*
-	 * FIFO sizes account an extra MDWIDTH * (kbytes + 1) bytes for
+	 * To meet performance requirement, a minimum TxFIFO size of 3x
-	 * internal overhead. We don't really know how these are used,
+	 * MaxPacketSize is recommended for endpoints that support burst and a
-	 * but documentation say it exists.
+	 * minimum TxFIFO size of 2x MaxPacketSize for endpoints that don't
+	 * support burst. Use those numbers and we can calculate the max packet
+	 * limit as below.
 	 */
-	size -= mdwidth * (kbytes + 1);
+	if (dwc->maximum_speed >= USB_SPEED_SUPER)
-	size /= kbytes;
+		size /= 3;
+	else
+		size /= 2;
 	usb_ep_set_maxpacket_limit(&dep->endpoint, size);
 static int dwc3_gadget_init_out_endpoint(struct dwc3_ep *dep)
 {
 	struct dwc3 *dwc = dep->dwc;
+	int mdwidth;
+	int size;
+	mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
-	usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
+	/* MDWIDTH is represented in bits, convert to bytes */
+	mdwidth /= 8;
+	/* All OUT endpoints share a single RxFIFO space */
+	size = dwc3_readl(dwc->regs, DWC3_GRXFIFOSIZ(0));
+	if (dwc3_is_usb31(dwc))
+		size = DWC31_GRXFIFOSIZ_RXFDEP(size);
+	else
+		size = DWC3_GRXFIFOSIZ_RXFDEP(size);
+	/* FIFO depth is in MDWDITH bytes */
+	size *= mdwidth;
+	/*
+	 * To meet performance requirement, a minimum recommended RxFIFO size
+	 * is defined as follow:
+	 * RxFIFO size >= (3 x MaxPacketSize) +
+	 * (3 x 8 bytes setup packets size) + (16 bytes clock crossing margin)
+	 *
+	 * Then calculate the max packet limit as below.
+	 */
+	size -= (3 * 8) + 16;
+	if (size < 0)
+		size = 0;
+	else
+		size /= 3;
+	usb_ep_set_maxpacket_limit(&dep->endpoint, size);
 	dep->endpoint.max_streams = 15;
 	dep->endpoint.ops = &dwc3_gadget_ep_ops;
 	list_add_tail(&dep->endpoint.ep_list,
 static bool dwc3_gadget_ep_request_completed(struct dwc3_request *req)
 {
-	/*
+	return req->num_pending_sgs == 0;
-	 * For OUT direction, host may send less than the setup
-	 * length. Return true for all OUT requests.
-	 */
-	if (!req->direction)
-		return true;
-	return req->request.actual == req->request.length;
 }
 static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep,
 	req->request.actual = req->request.length - req->remaining;
-	if (!dwc3_gadget_ep_request_completed(req) ||
+	if (!dwc3_gadget_ep_request_completed(req)) {
-			req->num_pending_sgs) {
 		__dwc3_gadget_kick_transfer(dep);
 		goto out;
 	}

drivers/usb/early/xhci-dbc.c+4−4

@@ -728,19 +728,19 @@ static void xdbc_handle_tx_event(struct xdbc_trb *evt_trb) · 727 unmodified lines
728	case COMP_USB_TRANSACTION_ERROR:	728	case COMP_USB_TRANSACTION_ERROR:
729	case COMP_STALL_ERROR:	729	case COMP_STALL_ERROR:
730	default:	730	default:
731	if (ep_id == XDBC_EPID_OUT)	731	if (ep_id == XDBC_EPID_OUT \|\| ep_id == XDBC_EPID_OUT_INTEL)
732	xdbc.flags \|= XDBC_FLAGS_OUT_STALL;	732	xdbc.flags \|= XDBC_FLAGS_OUT_STALL;
733	if (ep_id == XDBC_EPID_IN)	733	if (ep_id == XDBC_EPID_IN \|\| ep_id == XDBC_EPID_IN_INTEL)
734	xdbc.flags \|= XDBC_FLAGS_IN_STALL;	734	xdbc.flags \|= XDBC_FLAGS_IN_STALL;
735		735
736	xdbc_trace("endpoint %d stalled\n", ep_id);	736	xdbc_trace("endpoint %d stalled\n", ep_id);
737	break;	737	break;
738	}	738	}
739		739
740	if (ep_id == XDBC_EPID_IN) {	740	if (ep_id == XDBC_EPID_IN \|\| ep_id == XDBC_EPID_IN_INTEL) {
741	xdbc.flags &= ~XDBC_FLAGS_IN_PROCESS;	741	xdbc.flags &= ~XDBC_FLAGS_IN_PROCESS;
742	xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true);	742	xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true);
743	} else if (ep_id == XDBC_EPID_OUT) {	743	} else if (ep_id == XDBC_EPID_OUT \|\| ep_id == XDBC_EPID_OUT_INTEL) {
744	xdbc.flags &= ~XDBC_FLAGS_OUT_PROCESS;	744	xdbc.flags &= ~XDBC_FLAGS_OUT_PROCESS;
745	} else {	745	} else {
746	xdbc_trace("invalid endpoint id %d\n", ep_id);	746	xdbc_trace("invalid endpoint id %d\n", ep_id);

drivers/usb/early/xhci-dbc.h+16−2

@@ -120,8 +120,22 @@ struct xdbc_ring { · 119 unmodified lines
120	u32 cycle_state;	120	u32 cycle_state;
121	};	121	};
122		122
123	#define XDBC_EPID_OUT 2	123	/*
124	#define XDBC_EPID_IN 3	124	* These are the "Endpoint ID" (also known as "Context Index") values for the
		125	* OUT Transfer Ring and the IN Transfer Ring of a Debug Capability Context data
		126	* structure.
		127	* According to the "eXtensible Host Controller Interface for Universal Serial
		128	* Bus (xHCI)" specification, section "7.6.3.2 Endpoint Contexts and Transfer
		129	* Rings", these should be 0 and 1, and those are the values AMD machines give
		130	* you; but Intel machines seem to use the formula from section "4.5.1 Device
		131	* Context Index", which is supposed to be used for the Device Context only.
		132	* Luckily the values from Intel don't overlap with those from AMD, so we can
		133	* just test for both.
		134	*/
		135	#define XDBC_EPID_OUT 0
		136	#define XDBC_EPID_IN 1
		137	#define XDBC_EPID_OUT_INTEL 2
		138	#define XDBC_EPID_IN_INTEL 3
125		139
126	struct xdbc_state {	140	struct xdbc_state {
127	u16 vendor;	141	u16 vendor;

drivers/usb/gadget/function/f_fs.c+4−0

@@ -1813,6 +1813,10 @@ static void ffs_data_reset(struct ffs_data *ffs) · 1812 unmodified lines
1813	ffs->state = FFS_READ_DESCRIPTORS;	1813	ffs->state = FFS_READ_DESCRIPTORS;
1814	ffs->setup_state = FFS_NO_SETUP;	1814	ffs->setup_state = FFS_NO_SETUP;
1815	ffs->flags = 0;	1815	ffs->flags = 0;
		1816
		1817	ffs->ms_os_descs_ext_prop_count = 0;
		1818	ffs->ms_os_descs_ext_prop_name_len = 0;
		1819	ffs->ms_os_descs_ext_prop_data_len = 0;
1816	}	1820	}
1817		1821
1818		1822

drivers/usb/gadget/legacy/raw_gadget.c+42−29

@@ -81,6 +81,7 @@ static int raw_event_queue_add(struct raw_event_queue *queue, · 80 unmodified lines
81	static struct usb_raw_event *raw_event_queue_fetch(	81	static struct usb_raw_event *raw_event_queue_fetch(
82	struct raw_event_queue *queue)	82	struct raw_event_queue *queue)
83	{	83	{
		84	int ret;
84	unsigned long flags;	85	unsigned long flags;
85	struct usb_raw_event *event;	86	struct usb_raw_event *event;
86		87
@@ -89,11 +90,18 @@ static struct usb_raw_event *raw_event_queue_fetch( · 2 unmodified lines
89	* there's at least one event queued by decrementing the semaphore,	90	* there's at least one event queued by decrementing the semaphore,
90	* and then take the lock to protect queue struct fields.	91	* and then take the lock to protect queue struct fields.
91	*/	92	*/
92	if (down_interruptible(&queue->sema))	93	ret = down_interruptible(&queue->sema);
93	return NULL;	94	if (ret)
		95	return ERR_PTR(ret);
94	spin_lock_irqsave(&queue->lock, flags);	96	spin_lock_irqsave(&queue->lock, flags);
95	if (WARN_ON(!queue->size))	97	/*
96	return NULL;	98	* queue->size must have the same value as queue->sema counter (before
		99	* the down_interruptible() call above), so this check is a fail-safe.
		100	*/
		101	if (WARN_ON(!queue->size)) {
		102	spin_unlock_irqrestore(&queue->lock, flags);
		103	return ERR_PTR(-ENODEV);
		104	}
97	event = queue->events[0];	105	event = queue->events[0];
98	queue->size--;	106	queue->size--;
99	memmove(&queue->events[0], &queue->events[1],	107	memmove(&queue->events[0], &queue->events[1],
@@ -392,9 +400,8 @@ static int raw_ioctl_init(struct raw_dev *dev, unsigned long value) · 292 unmodified lines
392	char *udc_device_name;	400	char *udc_device_name;
393	unsigned long flags;	401	unsigned long flags;
394		402
395	ret = copy_from_user(&arg, (void __user *)value, sizeof(arg));	403	if (copy_from_user(&arg, (void __user *)value, sizeof(arg)))
396	if (ret)	404	return -EFAULT;
397	return ret;
398		405
399	switch (arg.speed) {	406	switch (arg.speed) {
400	case USB_SPEED_UNKNOWN:	407	case USB_SPEED_UNKNOWN:
@@ -501,15 +508,13 @@ out_unlock: · 100 unmodified lines
501		508
502	static int raw_ioctl_event_fetch(struct raw_dev *dev, unsigned long value)	509	static int raw_ioctl_event_fetch(struct raw_dev *dev, unsigned long value)
503	{	510	{
504	int ret = 0;
505	struct usb_raw_event arg;	511	struct usb_raw_event arg;
506	unsigned long flags;	512	unsigned long flags;
507	struct usb_raw_event *event;	513	struct usb_raw_event *event;
508	uint32_t length;	514	uint32_t length;
509		515
510	ret = copy_from_user(&arg, (void __user *)value, sizeof(arg));	516	if (copy_from_user(&arg, (void __user *)value, sizeof(arg)))
511	if (ret)	517	return -EFAULT;
512	return ret;
513		518
514	spin_lock_irqsave(&dev->lock, flags);	519	spin_lock_irqsave(&dev->lock, flags);
515	if (dev->state != STATE_DEV_RUNNING) {	520	if (dev->state != STATE_DEV_RUNNING) {
@@ -525,25 +530,31 @@ static int raw_ioctl_event_fetch(struct raw_dev *dev, unsigned long value) · 9 unmodified lines
525	spin_unlock_irqrestore(&dev->lock, flags);	530	spin_unlock_irqrestore(&dev->lock, flags);
526		531
527	event = raw_event_queue_fetch(&dev->queue);	532	event = raw_event_queue_fetch(&dev->queue);
528	if (!event) {	533	if (PTR_ERR(event) == -EINTR) {
529	dev_dbg(&dev->gadget->dev, "event fetching interrupted\n");	534	dev_dbg(&dev->gadget->dev, "event fetching interrupted\n");
530	return -EINTR;	535	return -EINTR;
531	}	536	}
		537	if (IS_ERR(event)) {
		538	dev_err(&dev->gadget->dev, "failed to fetch event\n");
		539	spin_lock_irqsave(&dev->lock, flags);
		540	dev->state = STATE_DEV_FAILED;
		541	spin_unlock_irqrestore(&dev->lock, flags);
		542	return -ENODEV;
		543	}
532	length = min(arg.length, event->length);	544	length = min(arg.length, event->length);
533	ret = copy_to_user((void __user *)value, event,	545	if (copy_to_user((void __user )value, event, sizeof(event) + length))
534	sizeof(*event) + length);	546	return -EFAULT;
535	return ret;	547
		548	return 0;
536	}	549	}
537		550
538	static void raw_alloc_io_data(struct usb_raw_ep_io io, void __user *ptr,	551	static void raw_alloc_io_data(struct usb_raw_ep_io io, void __user *ptr,
539	bool get_from_user)	552	bool get_from_user)
540	{	553	{
541	int ret;
542	void *data;	554	void *data;
543		555
544	ret = copy_from_user(io, ptr, sizeof(*io));	556	if (copy_from_user(io, ptr, sizeof(*io)))
545	if (ret)	557	return ERR_PTR(-EFAULT);
546	return ERR_PTR(ret);
547	if (io->ep >= USB_RAW_MAX_ENDPOINTS)	558	if (io->ep >= USB_RAW_MAX_ENDPOINTS)
548	return ERR_PTR(-EINVAL);	559	return ERR_PTR(-EINVAL);
549	if (!usb_raw_io_flags_valid(io->flags))	560	if (!usb_raw_io_flags_valid(io->flags))
@@ -658,12 +669,13 @@ static int raw_ioctl_ep0_read(struct raw_dev *dev, unsigned long value) · 108 unmodified lines
658	if (IS_ERR(data))	669	if (IS_ERR(data))
659	return PTR_ERR(data);	670	return PTR_ERR(data);
660	ret = raw_process_ep0_io(dev, &io, data, false);	671	ret = raw_process_ep0_io(dev, &io, data, false);
661	if (ret < 0) {	672	if (ret)
662	kfree(data);	673	goto free;
663	return ret;	674
664	}
665	length = min(io.length, (unsigned int)ret);	675	length = min(io.length, (unsigned int)ret);
666	ret = copy_to_user((void __user *)(value + sizeof(io)), data, length);	676	if (copy_to_user((void __user *)(value + sizeof(io)), data, length))
		677	ret = -EFAULT;
		678	free:
667	kfree(data);	679	kfree(data);
668	return ret;	680	return ret;
669	}	681	}
@@ -952,12 +964,13 @@ static int raw_ioctl_ep_read(struct raw_dev *dev, unsigned long value) · 282 unmodified lines
952	if (IS_ERR(data))	964	if (IS_ERR(data))
953	return PTR_ERR(data);	965	return PTR_ERR(data);
954	ret = raw_process_ep_io(dev, &io, data, false);	966	ret = raw_process_ep_io(dev, &io, data, false);
955	if (ret < 0) {	967	if (ret)
956	kfree(data);	968	goto free;
957	return ret;	969
958	}
959	length = min(io.length, (unsigned int)ret);	970	length = min(io.length, (unsigned int)ret);
960	ret = copy_to_user((void __user *)(value + sizeof(io)), data, length);	971	if (copy_to_user((void __user *)(value + sizeof(io)), data, length))
		972	ret = -EFAULT;
		973	free:
961	kfree(data);	974	kfree(data);
962	return ret;	975	return ret;
963	}	976	}

drivers/usb/gadget/udc/atmel_usba_udc.c+2−2

 			usba_start(udc);
 		} else {
 			udc->suspended = false;
-			usba_stop(udc);
 			if (udc->driver->disconnect)
 				udc->driver->disconnect(&udc->gadget);
+			usba_stop(udc);
 		}
 		udc->vbus_prev = vbus;
 	}

drivers/usb/gadget/udc/bdc/bdc_ep.c+1−1

@@ -540,7 +540,7 @@ static void bdc_req_complete(struct bdc_ep ep, struct bdc_req req, · 539 unmodified lines
540	{	540	{
541	struct bdc *bdc = ep->bdc;	541	struct bdc *bdc = ep->bdc;
542		542
543	if (req == NULL \|\| &req->queue == NULL \|\| &req->usb_req == NULL)	543	if (req == NULL)
544	return;	544	return;
545		545
546	dev_dbg(bdc->dev, "%s ep:%s status:%d\n", __func__, ep->name, status);	546	dev_dbg(bdc->dev, "%s ep:%s status:%d\n", __func__, ep->name, status);

drivers/usb/host/xhci-hub.c+9−0

 		}
 		if ((temp & PORT_RC))
 			reset_change = true;
+		if (temp & PORT_OC)
+			status = 1;
 	}
 	if (!status && !reset_change) {
 		xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
 				 port_index);
 			goto retry;
 		}
+		/* bail out if port detected a over-current condition */
+		if (t1 & PORT_OC) {
+			bus_state->bus_suspended = 0;
+			spin_unlock_irqrestore(&xhci->lock, flags);
+			xhci_dbg(xhci, "Bus suspend bailout, port over-current detected\n");
+			return -EBUSY;
+		}
 		/* suspend ports in U0, or bail out for new connect changes */
 		if ((t1 & PORT_PE) && (t1 & PORT_PLS_MASK) == XDEV_U0) {
 			if ((t1 & PORT_CSC) && wake_enabled) {

drivers/usb/host/xhci-ring.c+40−6

 				stream_id);
 		return;
 	}
+	/*
+	 * A cancelled TD can complete with a stall if HW cached the trb.
+	 * In this case driver can't find cur_td, but if the ring is empty we
+	 * can move the dequeue pointer to the current enqueue position.
+	 */
+	if (!cur_td) {
+		if (list_empty(&ep_ring->td_list)) {
+			state->new_deq_seg = ep_ring->enq_seg;
+			state->new_deq_ptr = ep_ring->enqueue;
+			state->new_cycle_state = ep_ring->cycle_state;
+			goto done;
+		} else {
+			xhci_warn(xhci, "Can't find new dequeue state, missing cur_td\n");
+			return;
+		}
+	}
 	/* Dig out the cycle state saved by the xHC during the stop ep cmd */
 	xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
 			"Finding endpoint context");
 	state->new_deq_seg = new_seg;
 	state->new_deq_ptr = new_deq;
+done:
 	/* Don't update the ring cycle state for the producer (us). */
 	xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
 			"Cycle state = 0x%x", state->new_cycle_state);
 	if (reset_type == EP_HARD_RESET) {
 		ep->ep_state |= EP_HARD_CLEAR_TOGGLE;
-		xhci_cleanup_stalled_ring(xhci, ep_index, stream_id, td);
+		xhci_cleanup_stalled_ring(xhci, slot_id, ep_index, stream_id,
-		xhci_clear_hub_tt_buffer(xhci, td, ep);
+					  td);
 	}
 	xhci_ring_cmd_db(xhci);
 }
 	if (trb_comp_code == COMP_STALL_ERROR ||
 		xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
 						trb_comp_code)) {
-		/* Issue a reset endpoint command to clear the host side
+		/*
-		 * halt, followed by a set dequeue command to move the
+		 * xhci internal endpoint state will go to a "halt" state for
-		 * dequeue pointer past the TD.
+		 * any stall, including default control pipe protocol stall.
-		 * The class driver clears the device side halt later.
+		 * To clear the host side halt we need to issue a reset endpoint
+		 * command, followed by a set dequeue command to move past the
+		 * TD.
+		 * Class drivers clear the device side halt from a functional
+		 * stall later. Hub TT buffer should only be cleared for FS/LS
+		 * devices behind HS hubs for functional stalls.
 		 */
+		if ((ep_index != 0) || (trb_comp_code != COMP_STALL_ERROR))
+			xhci_clear_hub_tt_buffer(xhci, td, ep);
 		xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
 					ep_ring->stream_id, td, EP_HARD_RESET);
 	} else {
 				xhci_dbg(xhci, "td_list is empty while skip flag set. Clear skip flag for slot %u ep %u.\n",
 					 slot_id, ep_index);
 			}
+			if (trb_comp_code == COMP_STALL_ERROR ||
+			    xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
+							      trb_comp_code)) {
+				xhci_cleanup_halted_endpoint(xhci, slot_id,
+							     ep_index,
+							     ep_ring->stream_id,
+							     NULL,
+							     EP_HARD_RESET);
+			}
 			goto cleanup;
 		}

drivers/usb/host/xhci.c+7−7

 			added_ctxs, added_ctxs);
 }
-void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index,
+void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int slot_id,
-			       unsigned int stream_id, struct xhci_td *td)
+			       unsigned int ep_index, unsigned int stream_id,
+			       struct xhci_td *td)
 {
 	struct xhci_dequeue_state deq_state;
-	struct usb_device *udev = td->urb->dev;
 	xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
 			"Cleaning up stalled endpoint ring");
 	/* We need to move the HW's dequeue pointer past this TD,
 	 * or it will attempt to resend it on the next doorbell ring.
 	 */
-	xhci_find_new_dequeue_state(xhci, udev->slot_id,
+	xhci_find_new_dequeue_state(xhci, slot_id, ep_index, stream_id, td,
-			ep_index, stream_id, td, &deq_state);
+				    &deq_state);
 	if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
 		return;
 	if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
 		xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
 				"Queueing new dequeue state");
-		xhci_queue_new_dequeue_state(xhci, udev->slot_id,
+		xhci_queue_new_dequeue_state(xhci, slot_id,
 				ep_index, &deq_state);
 	} else {
 		/* Better hope no one uses the input context between now and the
 		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 				"Setting up input context for "
 				"configure endpoint command");
-		xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
+		xhci_setup_input_ctx_for_quirk(xhci, slot_id,
 				ep_index, &deq_state);
 	}
 }

drivers/usb/host/xhci.h+3−2

 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
 		unsigned int slot_id, unsigned int ep_index,
 		struct xhci_dequeue_state *deq_state);
-void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index,
+void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int slot_id,
-		unsigned int stream_id, struct xhci_td *td);
+			       unsigned int ep_index, unsigned int stream_id,
+			       struct xhci_td *td);
 void xhci_stop_endpoint_command_watchdog(struct timer_list *t);
 void xhci_handle_command_timeout(struct work_struct *work);

drivers/usb/misc/sisusbvga/sisusb.c+10−10

@@ -1199,18 +1199,18 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr, · 1198 unmodified lines
1199	/* High level: Gfx (indexed) register access */	1199	/* High level: Gfx (indexed) register access */
1200		1200
1201	#ifdef CONFIG_USB_SISUSBVGA_CON	1201	#ifdef CONFIG_USB_SISUSBVGA_CON
1202	int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data)	1202	int sisusb_setreg(struct sisusb_usb_data *sisusb, u32 port, u8 data)
1203	{	1203	{
1204	return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);	1204	return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);
1205	}	1205	}
1206		1206
1207	int sisusb_getreg(struct sisusb_usb_data sisusb, int port, u8 data)	1207	int sisusb_getreg(struct sisusb_usb_data sisusb, u32 port, u8 data)
1208	{	1208	{
1209	return sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);	1209	return sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);
1210	}	1210	}
1211	#endif	1211	#endif
1212		1212
1213	int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port,	1213	int sisusb_setidxreg(struct sisusb_usb_data *sisusb, u32 port,
1214	u8 index, u8 data)	1214	u8 index, u8 data)
1215	{	1215	{
1216	int ret;	1216	int ret;
@@ -1220,7 +1220,7 @@ int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port, · 3 unmodified lines
1220	return ret;	1220	return ret;
1221	}	1221	}
1222		1222
1223	int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port,	1223	int sisusb_getidxreg(struct sisusb_usb_data *sisusb, u32 port,
1224	u8 index, u8 *data)	1224	u8 index, u8 *data)
1225	{	1225	{
1226	int ret;	1226	int ret;
@@ -1230,7 +1230,7 @@ int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port, · 3 unmodified lines
1230	return ret;	1230	return ret;
1231	}	1231	}
1232		1232
1233	int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx,	1233	int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, u32 port, u8 idx,
1234	u8 myand, u8 myor)	1234	u8 myand, u8 myor)
1235	{	1235	{
1236	int ret;	1236	int ret;
@@ -1245,7 +1245,7 @@ int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx, · 8 unmodified lines
1245	}	1245	}
1246		1246
1247	static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb,	1247	static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb,
1248	int port, u8 idx, u8 data, u8 mask)	1248	u32 port, u8 idx, u8 data, u8 mask)
1249	{	1249	{
1250	int ret;	1250	int ret;
1251	u8 tmp;	1251	u8 tmp;
@@ -1258,13 +1258,13 @@ static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb, · 6 unmodified lines
1258	return ret;	1258	return ret;
1259	}	1259	}
1260		1260
1261	int sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port,	1261	int sisusb_setidxregor(struct sisusb_usb_data *sisusb, u32 port,
1262	u8 index, u8 myor)	1262	u8 index, u8 myor)
1263	{	1263	{
1264	return sisusb_setidxregandor(sisusb, port, index, 0xff, myor);	1264	return sisusb_setidxregandor(sisusb, port, index, 0xff, myor);
1265	}	1265	}
1266		1266
1267	int sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port,	1267	int sisusb_setidxregand(struct sisusb_usb_data *sisusb, u32 port,
1268	u8 idx, u8 myand)	1268	u8 idx, u8 myand)
1269	{	1269	{
1270	return sisusb_setidxregandor(sisusb, port, idx, myand, 0x00);	1270	return sisusb_setidxregandor(sisusb, port, idx, myand, 0x00);
@@ -2785,8 +2785,8 @@ static loff_t sisusb_lseek(struct file *file, loff_t offset, int orig) · 1514 unmodified lines
2785	static int sisusb_handle_command(struct sisusb_usb_data *sisusb,	2785	static int sisusb_handle_command(struct sisusb_usb_data *sisusb,
2786	struct sisusb_command *y, unsigned long arg)	2786	struct sisusb_command *y, unsigned long arg)
2787	{	2787	{
2788	int retval, port, length;	2788	int retval, length;
2789	u32 address;	2789	u32 port, address;
2790		2790
2791	/* All our commands require the device	2791	/* All our commands require the device
2792	* to be initialized.	2792	* to be initialized.

drivers/usb/misc/sisusbvga/sisusb_init.h+7−7

drivers/usb/serial/garmin_gps.c+2−2

@@ -1138,8 +1138,8 @@ static void garmin_read_process(struct garmin_data *garmin_data_p, · 1137 unmodified lines
1138	send it directly to the tty port */	1138	send it directly to the tty port */
1139	if (garmin_data_p->flags & FLAGS_QUEUING) {	1139	if (garmin_data_p->flags & FLAGS_QUEUING) {
1140	pkt_add(garmin_data_p, data, data_length);	1140	pkt_add(garmin_data_p, data, data_length);
1141	} else if (bulk_data \|\|	1141	} else if (bulk_data \|\| (data_length >= sizeof(u32) &&
1142	getLayerId(data) == GARMIN_LAYERID_APPL) {	1142	getLayerId(data) == GARMIN_LAYERID_APPL)) {
1143		1143
1144	spin_lock_irqsave(&garmin_data_p->lock, flags);	1144	spin_lock_irqsave(&garmin_data_p->lock, flags);
1145	garmin_data_p->flags \|= APP_RESP_SEEN;	1145	garmin_data_p->flags \|= APP_RESP_SEEN;

drivers/usb/serial/qcserial.c+1−0

@@ -173,6 +173,7 @@ static const struct usb_device_id id_table[] = { · 172 unmodified lines
173	{DEVICE_SWI(0x413c, 0x81b3)}, /* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card (rev3) */	173	{DEVICE_SWI(0x413c, 0x81b3)}, /* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card (rev3) */
174	{DEVICE_SWI(0x413c, 0x81b5)}, /* Dell Wireless 5811e QDL */	174	{DEVICE_SWI(0x413c, 0x81b5)}, /* Dell Wireless 5811e QDL */
175	{DEVICE_SWI(0x413c, 0x81b6)}, /* Dell Wireless 5811e QDL */	175	{DEVICE_SWI(0x413c, 0x81b6)}, /* Dell Wireless 5811e QDL */
		176	{DEVICE_SWI(0x413c, 0x81cc)}, /* Dell Wireless 5816e */
176	{DEVICE_SWI(0x413c, 0x81cf)}, /* Dell Wireless 5819 */	177	{DEVICE_SWI(0x413c, 0x81cf)}, /* Dell Wireless 5819 */
177	{DEVICE_SWI(0x413c, 0x81d0)}, /* Dell Wireless 5819 */	178	{DEVICE_SWI(0x413c, 0x81d0)}, /* Dell Wireless 5819 */
178	{DEVICE_SWI(0x413c, 0x81d1)}, /* Dell Wireless 5818 */	179	{DEVICE_SWI(0x413c, 0x81d1)}, /* Dell Wireless 5818 */

drivers/usb/storage/uas.c+43−3

@@ -81,6 +81,19 @@ static void uas_free_streams(struct uas_dev_info *devinfo); · 80 unmodified lines
81	static void uas_log_cmd_state(struct scsi_cmnd cmnd, const char prefix,	81	static void uas_log_cmd_state(struct scsi_cmnd cmnd, const char prefix,
82	int status);	82	int status);
83		83
		84	/*
		85	* This driver needs its own workqueue, as we need to control memory allocation.
		86	*
		87	* In the course of error handling and power management uas_wait_for_pending_cmnds()
		88	* needs to flush pending work items. In these contexts we cannot allocate memory
		89	* by doing block IO as we would deadlock. For the same reason we cannot wait
		90	* for anything allocating memory not heeding these constraints.
		91	*
		92	* So we have to control all work items that can be on the workqueue we flush.
		93	* Hence we cannot share a queue and need our own.
		94	*/
		95	static struct workqueue_struct *workqueue;
		96
84	static void uas_do_work(struct work_struct *work)	97	static void uas_do_work(struct work_struct *work)
85	{	98	{
86	struct uas_dev_info *devinfo =	99	struct uas_dev_info *devinfo =
@@ -109,7 +122,7 @@ static void uas_do_work(struct work_struct *work) · 22 unmodified lines
109	if (!err)	122	if (!err)
110	cmdinfo->state &= ~IS_IN_WORK_LIST;	123	cmdinfo->state &= ~IS_IN_WORK_LIST;
111	else	124	else
112	schedule_work(&devinfo->work);	125	queue_work(workqueue, &devinfo->work);
113	}	126	}
114	out:	127	out:
115	spin_unlock_irqrestore(&devinfo->lock, flags);	128	spin_unlock_irqrestore(&devinfo->lock, flags);
@@ -134,7 +147,7 @@ static void uas_add_work(struct uas_cmd_info *cmdinfo) · 18 unmodified lines
134		147
135	lockdep_assert_held(&devinfo->lock);	148	lockdep_assert_held(&devinfo->lock);
136	cmdinfo->state \|= IS_IN_WORK_LIST;	149	cmdinfo->state \|= IS_IN_WORK_LIST;
137	schedule_work(&devinfo->work);	150	queue_work(workqueue, &devinfo->work);
138	}	151	}
139		152
140	static void uas_zap_pending(struct uas_dev_info *devinfo, int result)	153	static void uas_zap_pending(struct uas_dev_info *devinfo, int result)
@@ -190,6 +203,9 @@ static void uas_log_cmd_state(struct scsi_cmnd cmnd, const char prefix, · 49 unmodified lines
190	struct uas_cmd_info ci = (void )&cmnd->SCp;	203	struct uas_cmd_info ci = (void )&cmnd->SCp;
191	struct uas_cmd_info cmdinfo = (void )&cmnd->SCp;	204	struct uas_cmd_info cmdinfo = (void )&cmnd->SCp;
192		205
		206	if (status == -ENODEV) /* too late */
		207	return;
		208
193	scmd_printk(KERN_INFO, cmnd,	209	scmd_printk(KERN_INFO, cmnd,
194	"%s %d uas-tag %d inflight:%s%s%s%s%s%s%s%s%s%s%s%s ",	210	"%s %d uas-tag %d inflight:%s%s%s%s%s%s%s%s%s%s%s%s ",
195	prefix, status, cmdinfo->uas_tag,	211	prefix, status, cmdinfo->uas_tag,
@@ -1226,7 +1242,31 @@ static struct usb_driver uas_driver = { · 1030 unmodified lines
1226	.id_table = uas_usb_ids,	1242	.id_table = uas_usb_ids,
1227	};	1243	};
1228		1244
1229	module_usb_driver(uas_driver);	1245	static int __init uas_init(void)
		1246	{
		1247	int rv;
		1248
		1249	workqueue = alloc_workqueue("uas", WQ_MEM_RECLAIM, 0);
		1250	if (!workqueue)
		1251	return -ENOMEM;
		1252
		1253	rv = usb_register(&uas_driver);
		1254	if (rv) {
		1255	destroy_workqueue(workqueue);
		1256	return -ENOMEM;
		1257	}
		1258
		1259	return 0;
		1260	}
		1261
		1262	static void __exit uas_exit(void)
		1263	{
		1264	usb_deregister(&uas_driver);
		1265	destroy_workqueue(workqueue);
		1266	}
		1267
		1268	module_init(uas_init);
		1269	module_exit(uas_exit);
1230		1270
1231	MODULE_LICENSE("GPL");	1271	MODULE_LICENSE("GPL");
1232	MODULE_IMPORT_NS(USB_STORAGE);	1272	MODULE_IMPORT_NS(USB_STORAGE);

drivers/usb/storage/unusual_devs.h+7−0

@@ -2323,6 +2323,13 @@ UNUSUAL_DEV( 0x3340, 0xffff, 0x0000, 0x0000, · 2322 unmodified lines
2323	USB_SC_DEVICE,USB_PR_DEVICE,NULL,	2323	USB_SC_DEVICE,USB_PR_DEVICE,NULL,
2324	US_FL_MAX_SECTORS_64 ),	2324	US_FL_MAX_SECTORS_64 ),
2325		2325
		2326	/* Reported by Cyril Roelandt <tipecaml@gmail.com> */
		2327	UNUSUAL_DEV( 0x357d, 0x7788, 0x0114, 0x0114,
		2328	"JMicron",
		2329	"USB to ATA/ATAPI Bridge",
		2330	USB_SC_DEVICE, USB_PR_DEVICE, NULL,
		2331	US_FL_BROKEN_FUA ),
		2332
2326	/* Reported by Andrey Rahmatullin <wrar@altlinux.org> */	2333	/* Reported by Andrey Rahmatullin <wrar@altlinux.org> */
2327	UNUSUAL_DEV( 0x4102, 0x1020, 0x0100, 0x0100,	2334	UNUSUAL_DEV( 0x4102, 0x1020, 0x0100, 0x0100,
2328	"iRiver",	2335	"iRiver",

drivers/usb/storage/unusual_uas.h+7−0

@@ -28,6 +28,13 @@ · 27 unmodified lines
28	* and don't forget to CC: the USB development list <linux-usb@vger.kernel.org>	28	* and don't forget to CC: the USB development list <linux-usb@vger.kernel.org>
29	*/	29	*/
30		30
		31	/* Reported-by: Julian Groß <julian.g@posteo.de> */
		32	UNUSUAL_DEV(0x059f, 0x105f, 0x0000, 0x9999,
		33	"LaCie",
		34	"2Big Quadra USB3",
		35	USB_SC_DEVICE, USB_PR_DEVICE, NULL,
		36	US_FL_NO_REPORT_OPCODES),
		37
31	/*	38	/*
32	* Apricorn USB3 dongle sometimes returns "USBSUSBSUSBS" in response to SCSI	39	* Apricorn USB3 dongle sometimes returns "USBSUSBSUSBS" in response to SCSI
33	* commands in UAS mode. Observed with the 1.28 firmware; are there others?	40	* commands in UAS mode. Observed with the 1.28 firmware; are there others?

drivers/usb/typec/bus.c+4−1

 const struct typec_altmode *
 typec_altmode_get_partner(struct typec_altmode *adev)
 {
-	return adev ? &to_altmode(adev)->partner->adev : NULL;
+	if (!adev || !to_altmode(adev)->partner)
+		return NULL;
+	return &to_altmode(adev)->partner->adev;
 }
 EXPORT_SYMBOL_GPL(typec_altmode_get_partner);

drivers/usb/typec/mux/intel_pmc_mux.c+6−2

 	req.mode_data |= (state->mode - TYPEC_STATE_MODAL) <<
 			 PMC_USB_ALTMODE_DP_MODE_SHIFT;
+	if (data->status & DP_STATUS_HPD_STATE)
+		req.mode_data |= PMC_USB_DP_HPD_LVL <<
+				 PMC_USB_ALTMODE_DP_MODE_SHIFT;
 	return pmc_usb_command(port, (void *)&req, sizeof(req));
 }
 	struct typec_mux_desc mux_desc = { };
 	int ret;
-	ret = fwnode_property_read_u8(fwnode, "usb2-port", &port->usb2_port);
+	ret = fwnode_property_read_u8(fwnode, "usb2-port-number", &port->usb2_port);
 	if (ret)
 		return ret;
-	ret = fwnode_property_read_u8(fwnode, "usb3-port", &port->usb3_port);
+	ret = fwnode_property_read_u8(fwnode, "usb3-port-number", &port->usb3_port);
 	if (ret)
 		return ret;

drivers/usb/typec/mux/pi3usb30532.c+2−2

@@ -114,8 +114,8 @@ pi3usb30532_mux_set(struct typec_mux mux, struct typec_mux_state state) · 113 unmodified lines
114	static int pi3usb30532_probe(struct i2c_client *client)	114	static int pi3usb30532_probe(struct i2c_client *client)
115	{	115	{
116	struct device *dev = &client->dev;	116	struct device *dev = &client->dev;
117	struct typec_switch_desc sw_desc;	117	struct typec_switch_desc sw_desc = { };
118	struct typec_mux_desc mux_desc;	118	struct typec_mux_desc mux_desc = { };
119	struct pi3usb30532 *pi;	119	struct pi3usb30532 *pi;
120	int ret;	120	int ret;
121		121

drivers/usb/typec/tcpm/tcpm.c+26−0

@@ -3794,6 +3794,14 @@ static void _tcpm_cc_change(struct tcpm_port *port, enum typec_cc_status cc1, · 3793 unmodified lines
3794	*/	3794	*/
3795	break;	3795	break;
3796		3796
		3797	case PORT_RESET:
		3798	case PORT_RESET_WAIT_OFF:
		3799	/*
		3800	* State set back to default mode once the timer completes.
		3801	* Ignore CC changes here.
		3802	*/
		3803	break;
		3804
3797	default:	3805	default:
3798	if (tcpm_port_is_disconnected(port))	3806	if (tcpm_port_is_disconnected(port))
3799	tcpm_set_state(port, unattached_state(port), 0);	3807	tcpm_set_state(port, unattached_state(port), 0);
@@ -3855,6 +3863,15 @@ static void _tcpm_pd_vbus_on(struct tcpm_port *port) · 55 unmodified lines
3855	case SRC_TRY_DEBOUNCE:	3863	case SRC_TRY_DEBOUNCE:
3856	/* Do nothing, waiting for sink detection */	3864	/* Do nothing, waiting for sink detection */
3857	break;	3865	break;
		3866
		3867	case PORT_RESET:
		3868	case PORT_RESET_WAIT_OFF:
		3869	/*
		3870	* State set back to default mode once the timer completes.
		3871	* Ignore vbus changes here.
		3872	*/
		3873	break;
		3874
3858	default:	3875	default:
3859	break;	3876	break;
3860	}	3877	}
@@ -3908,10 +3925,19 @@ static void _tcpm_pd_vbus_off(struct tcpm_port *port) · 47 unmodified lines
3908	case PORT_RESET_WAIT_OFF:	3925	case PORT_RESET_WAIT_OFF:
3909	tcpm_set_state(port, tcpm_default_state(port), 0);	3926	tcpm_set_state(port, tcpm_default_state(port), 0);
3910	break;	3927	break;
		3928
3911	case SRC_TRY_WAIT:	3929	case SRC_TRY_WAIT:
3912	case SRC_TRY_DEBOUNCE:	3930	case SRC_TRY_DEBOUNCE:
3913	/* Do nothing, waiting for sink detection */	3931	/* Do nothing, waiting for sink detection */
3914	break;	3932	break;
		3933
		3934	case PORT_RESET:
		3935	/*
		3936	* State set back to default mode once the timer completes.
		3937	* Ignore vbus changes here.
		3938	*/
		3939	break;
		3940
3915	default:	3941	default:
3916	if (port->pwr_role == TYPEC_SINK &&	3942	if (port->pwr_role == TYPEC_SINK &&
3917	port->attached)	3943	port->attached)

drivers/vdpa/Kconfig+6−12

 # SPDX-License-Identifier: GPL-2.0-only
-config VDPA
+menuconfig VDPA
-	tristate
+	tristate "vDPA drivers"
 	help
 	  Enable this module to support vDPA device that uses a
 	  datapath which complies with virtio specifications with
 	  vendor specific control path.
-menuconfig VDPA_MENU
+if VDPA
-	bool "VDPA drivers"
-	default n
-if VDPA_MENU
 config VDPA_SIM
 	tristate "vDPA device simulator"
-	depends on RUNTIME_TESTING_MENU
+	depends on RUNTIME_TESTING_MENU && HAS_DMA && VHOST_DPN
-	select VDPA
 	select VHOST_RING
 	default n
 	help
 	  development of vDPA.
 config IFCVF
-	tristate "Intel IFC VF VDPA driver"
+	tristate "Intel IFC VF vDPA driver"
 	depends on PCI_MSI
-	select VDPA
 	default n
 	help
 	  This kernel module can drive Intel IFC VF NIC to offload
 	  To compile this driver as a module, choose M here: the module will
 	  be called ifcvf.
-endif # VDPA_MENU
+endif # VDPA

drivers/vdpa/ifcvf/ifcvf_base.c+0−2

 static int ifcvf_hw_enable(struct ifcvf_hw *hw)
 {
-	struct ifcvf_lm_cfg __iomem *ifcvf_lm;
 	struct virtio_pci_common_cfg __iomem *cfg;
 	struct ifcvf_adapter *ifcvf;
 	u32 i;
-	ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg;
 	ifcvf = vf_to_adapter(hw);
 	cfg = hw->common_cfg;
 	ifc_iowrite16(IFCVF_MSI_CONFIG_OFF, &cfg->msix_config);

drivers/vdpa/ifcvf/ifcvf_main.c+1−3

 static int ifcvf_start_datapath(void *private)
 {
 	struct ifcvf_hw *vf = ifcvf_private_to_vf(private);
-	struct ifcvf_adapter *ifcvf;
 	u8 status;
 	int ret;
-	ifcvf = vf_to_adapter(vf);
 	vf->nr_vring = IFCVF_MAX_QUEUE_PAIRS * 2;
 	ret = ifcvf_start_hw(vf);
 	if (ret < 0) {
 	return IFCVF_SUBSYS_VENDOR_ID;
 }
-static u16 ifcvf_vdpa_get_vq_align(struct vdpa_device *vdpa_dev)
+static u32 ifcvf_vdpa_get_vq_align(struct vdpa_device *vdpa_dev)
 {
 	return IFCVF_QUEUE_ALIGNMENT;
 }

drivers/vdpa/vdpa.c+1−1

@@ -116,7 +116,7 @@ EXPORT_SYMBOL_GPL(__vdpa_alloc_device); · 115 unmodified lines
116		116
117	/**	117	/**
118	* vdpa_register_device - register a vDPA device	118	* vdpa_register_device - register a vDPA device
119	* Callers must have a succeed call of vdpa_init_device() before.	119	* Callers must have a succeed call of vdpa_alloc_device() before.
120	* @vdev: the vdpa device to be registered to vDPA bus	120	* @vdev: the vdpa device to be registered to vDPA bus
121	*	121	*
122	* Returns an error when fail to add to vDPA bus	122	* Returns an error when fail to add to vDPA bus

drivers/vdpa/vdpa_sim/vdpa_sim.c+2−2

@@ -435,7 +435,7 @@ static u64 vdpasim_get_vq_state(struct vdpa_device *vdpa, u16 idx) · 434 unmodified lines
435	return vrh->last_avail_idx;	435	return vrh->last_avail_idx;
436	}	436	}
437		437
438	static u16 vdpasim_get_vq_align(struct vdpa_device *vdpa)	438	static u32 vdpasim_get_vq_align(struct vdpa_device *vdpa)
439	{	439	{
440	return VDPASIM_QUEUE_ALIGN;	440	return VDPASIM_QUEUE_ALIGN;
441	}	441	}
@@ -488,7 +488,7 @@ static u8 vdpasim_get_status(struct vdpa_device *vdpa) · 46 unmodified lines
488	status = vdpasim->status;	488	status = vdpasim->status;
489	spin_unlock(&vdpasim->lock);	489	spin_unlock(&vdpasim->lock);
490		490
491	return vdpasim->status;	491	return status;
492	}	492	}
493		493
494	static void vdpasim_set_status(struct vdpa_device *vdpa, u8 status)	494	static void vdpasim_set_status(struct vdpa_device *vdpa, u8 status)

drivers/vfio/vfio_iommu_type1.c+5−5

@@ -342,8 +342,8 @@ static int vaddr_get_pfn(struct mm_struct *mm, unsigned long vaddr, · 341 unmodified lines
342	vma = find_vma_intersection(mm, vaddr, vaddr + 1);	342	vma = find_vma_intersection(mm, vaddr, vaddr + 1);
343		343
344	if (vma && vma->vm_flags & VM_PFNMAP) {	344	if (vma && vma->vm_flags & VM_PFNMAP) {
345	*pfn = ((vaddr - vma->vm_start) >> PAGE_SHIFT) + vma->vm_pgoff;	345	if (!follow_pfn(vma, vaddr, pfn) &&
346	if (is_invalid_reserved_pfn(*pfn))	346	is_invalid_reserved_pfn(*pfn))
347	ret = 0;	347	ret = 0;
348	}	348	}
349	done:	349	done:
@@ -555,7 +555,7 @@ static int vfio_iommu_type1_pin_pages(void *iommu_data, · 205 unmodified lines
555	continue;	555	continue;
556	}	556	}
557		557
558	remote_vaddr = dma->vaddr + iova - dma->iova;	558	remote_vaddr = dma->vaddr + (iova - dma->iova);
559	ret = vfio_pin_page_external(dma, remote_vaddr, &phys_pfn[i],	559	ret = vfio_pin_page_external(dma, remote_vaddr, &phys_pfn[i],
560	do_accounting);	560	do_accounting);
561	if (ret)	561	if (ret)
@@ -2345,10 +2345,10 @@ static int vfio_iommu_type1_dma_rw_chunk(struct vfio_iommu *iommu, · 1783 unmodified lines
2345	vaddr = dma->vaddr + offset;	2345	vaddr = dma->vaddr + offset;
2346		2346
2347	if (write)	2347	if (write)
2348	copied = __copy_to_user((void __user )vaddr, data,	2348	copied = copy_to_user((void __user )vaddr, data,
2349	count) ? 0 : count;	2349	count) ? 0 : count;
2350	else	2350	else
2351	copied = __copy_from_user(data, (void __user )vaddr,	2351	copied = copy_from_user(data, (void __user )vaddr,
2352	count) ? 0 : count;	2352	count) ? 0 : count;
2353	if (kthread)	2353	if (kthread)
2354	unuse_mm(mm);	2354	unuse_mm(mm);

drivers/vhost/Kconfig+16−5

 	tristate
 	help
 	  Generic IOTLB implementation for vhost and vringh.
+	  This option is selected by any driver which needs to support
+	  an IOMMU in software.
 config VHOST_RING
 	tristate
 	  This option is selected by any driver which needs to access
 	  the host side of a virtio ring.
+config VHOST_DPN
+	bool
+	depends on !ARM || AEABI
+	default y
+	help
+	  Anything selecting VHOST or VHOST_RING must depend on VHOST_DPN.
+	  This excludes the deprecated ARM ABI since that forces a 4 byte
+	  alignment on all structs - incompatible with virtio spec requirements.
 config VHOST
 	tristate
 	select VHOST_IOTLB
 config VHOST_NET
 	tristate "Host kernel accelerator for virtio net"
-	depends on NET && EVENTFD && (TUN || !TUN) && (TAP || !TAP)
+	depends on NET && EVENTFD && (TUN || !TUN) && (TAP || !TAP) && VHOST_DPN
 	select VHOST
 	---help---
 	  This kernel module can be loaded in host kernel to accelerate
 config VHOST_SCSI
 	tristate "VHOST_SCSI TCM fabric driver"
-	depends on TARGET_CORE && EVENTFD
+	depends on TARGET_CORE && EVENTFD && VHOST_DPN
 	select VHOST
 	default n
 	---help---
 config VHOST_VSOCK
 	tristate "vhost virtio-vsock driver"
-	depends on VSOCKETS && EVENTFD
+	depends on VSOCKETS && EVENTFD && VHOST_DPN
 	select VHOST
 	select VIRTIO_VSOCKETS_COMMON
 	default n
 config VHOST_VDPA
 	tristate "Vhost driver for vDPA-based backend"
-	depends on EVENTFD
+	depends on EVENTFD && VHOST_DPN
 	select VHOST
-	select VDPA
+	depends on VDPA
 	help
 	  This kernel module can be loaded in host kernel to accelerate
 	  guest virtio devices with the vDPA-based backends.

drivers/vhost/net.c+15−13

 	struct vhost_net_virtqueue *nvq =
 		container_of(vq, struct vhost_net_virtqueue, vq);
 	struct vhost_poll *poll = n->poll + (nvq - n->vqs);
-	if (!vq->private_data)
+	if (!vhost_vq_get_backend(vq))
 		return;
 	vhost_poll_stop(poll);
 }
 	struct vhost_poll *poll = n->poll + (nvq - n->vqs);
 	struct socket *sock;
-	sock = vq->private_data;
+	sock = vhost_vq_get_backend(vq);
 	if (!sock)
 		return 0;
 		return;
 	vhost_disable_notify(&net->dev, vq);
-	sock = rvq->private_data;
+	sock = vhost_vq_get_backend(rvq);
 	busyloop_timeout = poll_rx ? rvq->busyloop_timeout:
 				     tvq->busyloop_timeout;
 	if (r == tvq->num && tvq->busyloop_timeout) {
 		/* Flush batched packets first */
-		if (!vhost_sock_zcopy(tvq->private_data))
+		if (!vhost_sock_zcopy(vhost_vq_get_backend(tvq)))
-			vhost_tx_batch(net, tnvq, tvq->private_data, msghdr);
+			vhost_tx_batch(net, tnvq,
+				       vhost_vq_get_backend(tvq),
+				       msghdr);
 		vhost_net_busy_poll(net, rvq, tvq, busyloop_intr, false);
 	struct vhost_virtqueue *vq = &nvq->vq;
 	struct vhost_net *net = container_of(vq->dev, struct vhost_net,
 					     dev);
-	struct socket *sock = vq->private_data;
+	struct socket *sock = vhost_vq_get_backend(vq);
 	struct page_frag *alloc_frag = &net->page_frag;
 	struct virtio_net_hdr *gso;
 	struct xdp_buff *xdp = &nvq->xdp[nvq->batched_xdp];
 	struct socket *sock;
 	mutex_lock_nested(&vq->mutex, VHOST_NET_VQ_TX);
-	sock = vq->private_data;
+	sock = vhost_vq_get_backend(vq);
 	if (!sock)
 		goto out;
 	int recv_pkts = 0;
 	mutex_lock_nested(&vq->mutex, VHOST_NET_VQ_RX);
-	sock = vq->private_data;
+	sock = vhost_vq_get_backend(vq);
 	if (!sock)
 		goto out;
 		container_of(vq, struct vhost_net_virtqueue, vq);
 	mutex_lock(&vq->mutex);
-	sock = vq->private_data;
+	sock = vhost_vq_get_backend(vq);
 	vhost_net_disable_vq(n, vq);
-	vq->private_data = NULL;
+	vhost_vq_set_backend(vq, NULL);
 	vhost_net_buf_unproduce(nvq);
 	nvq->rx_ring = NULL;
 	mutex_unlock(&vq->mutex);
 	}
 	/* start polling new socket */
-	oldsock = vq->private_data;
+	oldsock = vhost_vq_get_backend(vq);
 	if (sock != oldsock) {
 		ubufs = vhost_net_ubuf_alloc(vq,
 					     sock && vhost_sock_zcopy(sock));
 		}
 		vhost_net_disable_vq(n, vq);
-		vq->private_data = sock;
+		vhost_vq_set_backend(vq, sock);
 		vhost_net_buf_unproduce(nvq);
 		r = vhost_vq_init_access(vq);
 		if (r)
 	return 0;
 err_used:
-	vq->private_data = oldsock;
+	vhost_vq_set_backend(vq, oldsock);
 	vhost_net_enable_vq(n, vq);
 	if (ubufs)
 		vhost_net_ubuf_put_wait_and_free(ubufs);

drivers/vhost/scsi.c+7−7

@@ -452,7 +452,7 @@ vhost_scsi_do_evt_work(struct vhost_scsi vs, struct vhost_scsi_evt evt) · 451 unmodified lines
452	unsigned out, in;	452	unsigned out, in;
453	int head, ret;	453	int head, ret;
454		454
455	if (!vq->private_data) {	455	if (!vhost_vq_get_backend(vq)) {
456	vs->vs_events_missed = true;	456	vs->vs_events_missed = true;
457	return;	457	return;
458	}	458	}
@@ -892,7 +892,7 @@ vhost_scsi_get_req(struct vhost_virtqueue vq, struct vhost_scsi_ctx vc, · 433 unmodified lines
892	} else {	892	} else {
893	struct vhost_scsi_tpg *vs_tpg, tpg;	893	struct vhost_scsi_tpg *vs_tpg, tpg;
894		894
895	vs_tpg = vq->private_data; /* validated at handler entry */	895	vs_tpg = vhost_vq_get_backend(vq); /* validated at handler entry */
896		896
897	tpg = READ_ONCE(vs_tpg[*vc->target]);	897	tpg = READ_ONCE(vs_tpg[*vc->target]);
898	if (unlikely(!tpg)) {	898	if (unlikely(!tpg)) {
@@ -929,7 +929,7 @@ vhost_scsi_handle_vq(struct vhost_scsi vs, struct vhost_virtqueue vq) · 30 unmodified lines
929	* We can handle the vq only after the endpoint is setup by calling the	929	* We can handle the vq only after the endpoint is setup by calling the
930	* VHOST_SCSI_SET_ENDPOINT ioctl.	930	* VHOST_SCSI_SET_ENDPOINT ioctl.
931	*/	931	*/
932	vs_tpg = vq->private_data;	932	vs_tpg = vhost_vq_get_backend(vq);
933	if (!vs_tpg)	933	if (!vs_tpg)
934	goto out;	934	goto out;
935		935
@@ -1184,7 +1184,7 @@ vhost_scsi_ctl_handle_vq(struct vhost_scsi vs, struct vhost_virtqueue vq) · 248 unmodified lines
1184	* We can handle the vq only after the endpoint is setup by calling the	1184	* We can handle the vq only after the endpoint is setup by calling the
1185	* VHOST_SCSI_SET_ENDPOINT ioctl.	1185	* VHOST_SCSI_SET_ENDPOINT ioctl.
1186	*/	1186	*/
1187	if (!vq->private_data)	1187	if (!vhost_vq_get_backend(vq))
1188	goto out;	1188	goto out;
1189		1189
1190	memset(&vc, 0, sizeof(vc));	1190	memset(&vc, 0, sizeof(vc));
@@ -1322,7 +1322,7 @@ static void vhost_scsi_evt_handle_kick(struct vhost_work *work) · 131 unmodified lines
1322	struct vhost_scsi *vs = container_of(vq->dev, struct vhost_scsi, dev);	1322	struct vhost_scsi *vs = container_of(vq->dev, struct vhost_scsi, dev);
1323		1323
1324	mutex_lock(&vq->mutex);	1324	mutex_lock(&vq->mutex);
1325	if (!vq->private_data)	1325	if (!vhost_vq_get_backend(vq))
1326	goto out;	1326	goto out;
1327		1327
1328	if (vs->vs_events_missed)	1328	if (vs->vs_events_missed)
@@ -1460,7 +1460,7 @@ vhost_scsi_set_endpoint(struct vhost_scsi *vs, · 131 unmodified lines
1460	for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {	1460	for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {
1461	vq = &vs->vqs[i].vq;	1461	vq = &vs->vqs[i].vq;
1462	mutex_lock(&vq->mutex);	1462	mutex_lock(&vq->mutex);
1463	vq->private_data = vs_tpg;	1463	vhost_vq_set_backend(vq, vs_tpg);
1464	vhost_vq_init_access(vq);	1464	vhost_vq_init_access(vq);
1465	mutex_unlock(&vq->mutex);	1465	mutex_unlock(&vq->mutex);
1466	}	1466	}
@@ -1547,7 +1547,7 @@ vhost_scsi_clear_endpoint(struct vhost_scsi *vs, · 80 unmodified lines
1547	for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {	1547	for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {
1548	vq = &vs->vqs[i].vq;	1548	vq = &vs->vqs[i].vq;
1549	mutex_lock(&vq->mutex);	1549	mutex_lock(&vq->mutex);
1550	vq->private_data = NULL;	1550	vhost_vq_set_backend(vq, NULL);
1551	mutex_unlock(&vq->mutex);	1551	mutex_unlock(&vq->mutex);
1552	}	1552	}
1553	}	1553	}

drivers/vhost/test.c+7−7

@@ -49,7 +49,7 @@ static void handle_vq(struct vhost_test *n) · 48 unmodified lines
49	void *private;	49	void *private;
50		50
51	mutex_lock(&vq->mutex);	51	mutex_lock(&vq->mutex);
52	private = vq->private_data;	52	private = vhost_vq_get_backend(vq);
53	if (!private) {	53	if (!private) {
54	mutex_unlock(&vq->mutex);	54	mutex_unlock(&vq->mutex);
55	return;	55	return;
@@ -120,7 +120,7 @@ static int vhost_test_open(struct inode inode, struct file f) · 64 unmodified lines
120	vqs[VHOST_TEST_VQ] = &n->vqs[VHOST_TEST_VQ];	120	vqs[VHOST_TEST_VQ] = &n->vqs[VHOST_TEST_VQ];
121	n->vqs[VHOST_TEST_VQ].handle_kick = handle_vq_kick;	121	n->vqs[VHOST_TEST_VQ].handle_kick = handle_vq_kick;
122	vhost_dev_init(dev, vqs, VHOST_TEST_VQ_MAX, UIO_MAXIOV,	122	vhost_dev_init(dev, vqs, VHOST_TEST_VQ_MAX, UIO_MAXIOV,
123	VHOST_TEST_PKT_WEIGHT, VHOST_TEST_WEIGHT);	123	VHOST_TEST_PKT_WEIGHT, VHOST_TEST_WEIGHT, NULL);
124		124
125	f->private_data = n;	125	f->private_data = n;
126		126
@@ -133,8 +133,8 @@ static void vhost_test_stop_vq(struct vhost_test n, · 6 unmodified lines
133	void *private;	133	void *private;
134		134
135	mutex_lock(&vq->mutex);	135	mutex_lock(&vq->mutex);
136	private = vq->private_data;	136	private = vhost_vq_get_backend(vq);
137	vq->private_data = NULL;	137	vhost_vq_set_backend(vq, NULL);
138	mutex_unlock(&vq->mutex);	138	mutex_unlock(&vq->mutex);
139	return private;	139	return private;
140	}	140	}
@@ -198,8 +198,8 @@ static long vhost_test_run(struct vhost_test *n, int test) · 57 unmodified lines
198	priv = test ? n : NULL;	198	priv = test ? n : NULL;
199		199
200	/* start polling new socket */	200	/* start polling new socket */
201	oldpriv = vq->private_data;	201	oldpriv = vhost_vq_get_backend(vq);
202	vq->private_data = priv;	202	vhost_vq_set_backend(vq, priv);
203		203
204	r = vhost_vq_init_access(&n->vqs[index]);	204	r = vhost_vq_init_access(&n->vqs[index]);
205		205
@@ -225,7 +225,7 @@ static long vhost_test_reset_owner(struct vhost_test *n) · 19 unmodified lines
225	{	225	{
226	void *priv = NULL;	226	void *priv = NULL;
227	long err;	227	long err;
228	struct vhost_umem *umem;	228	struct vhost_iotlb *umem;
229		229
230	mutex_lock(&n->dev.mutex);	230	mutex_lock(&n->dev.mutex);
231	err = vhost_dev_check_owner(&n->dev);	231	err = vhost_dev_check_owner(&n->dev);

drivers/vhost/vdpa.c+0−5

 	struct vdpa_callback cb;
 	struct vhost_virtqueue *vq;
 	struct vhost_vring_state s;
-	u8 status;
 	u32 idx;
 	long r;
 	idx = array_index_nospec(idx, v->nvqs);
 	vq = &v->vqs[idx];
-	status = ops->get_status(vdpa);
 	if (cmd == VHOST_VDPA_SET_VRING_ENABLE) {
 		if (copy_from_user(&s, argp, sizeof(s)))
 			return -EFAULT;
 	int nvqs, i, r, opened;
 	v = container_of(inode->i_cdev, struct vhost_vdpa, cdev);
-	if (!v)
-		return -ENODEV;
 	opened = atomic_cmpxchg(&v->opened, 0, 1);
 	if (opened)

drivers/vhost/vhost.h+27−0

@@ -231,6 +231,33 @@ enum { · 230 unmodified lines
231	(1ULL << VIRTIO_F_VERSION_1)	231	(1ULL << VIRTIO_F_VERSION_1)
232	};	232	};
233		233
		234	/**
		235	* vhost_vq_set_backend - Set backend.
		236	*
		237	* @vq Virtqueue.
		238	* @private_data The private data.
		239	*
		240	* Context: Need to call with vq->mutex acquired.
		241	*/
		242	static inline void vhost_vq_set_backend(struct vhost_virtqueue *vq,
		243	void *private_data)
		244	{
		245	vq->private_data = private_data;
		246	}
		247
		248	/**
		249	* vhost_vq_get_backend - Get backend.
		250	*
		251	* @vq Virtqueue.
		252	*
		253	* Context: Need to call with vq->mutex acquired.
		254	* Return: Private data previously set with vhost_vq_set_backend.
		255	*/
		256	static inline void vhost_vq_get_backend(struct vhost_virtqueue vq)
		257	{
		258	return vq->private_data;
		259	}
		260
234	static inline bool vhost_has_feature(struct vhost_virtqueue *vq, int bit)	261	static inline bool vhost_has_feature(struct vhost_virtqueue *vq, int bit)
235	{	262	{
236	return vq->acked_features & (1ULL << bit);	263	return vq->acked_features & (1ULL << bit);

drivers/vhost/vringh.c+5−0

 #include <linux/uaccess.h>
 #include <linux/slab.h>
 #include <linux/export.h>
+#if IS_REACHABLE(CONFIG_VHOST_IOTLB)
 #include <linux/bvec.h>
 #include <linux/highmem.h>
 #include <linux/vhost_iotlb.h>
+#endif
 #include <uapi/linux/virtio_config.h>
 static __printf(1,2) __cold void vringh_bad(const char *fmt, ...)
 }
 EXPORT_SYMBOL(vringh_need_notify_kern);
+#if IS_REACHABLE(CONFIG_VHOST_IOTLB)
 static int iotlb_translate(const struct vringh *vrh,
 			   u64 addr, u64 len, struct bio_vec iov[],
 			   int iov_size, u32 perm)
 }
 EXPORT_SYMBOL(vringh_need_notify_iotlb);
+#endif
 MODULE_LICENSE("GPL");

drivers/vhost/vsock.c+23−12

 	mutex_lock(&vq->mutex);
-	if (!vq->private_data)
+	if (!vhost_vq_get_backend(vq))
 		goto out;
 	/* Avoid further vmexits, we're already processing the virtqueue */
 			break;
 		}
-		vhost_add_used(vq, head, sizeof(pkt->hdr) + payload_len);
+		/* Deliver to monitoring devices all packets that we
-		added = true;
+		 * will transmit.
-		/* Deliver to monitoring devices all correctly transmitted
-		 * packets.
 		 */
 		virtio_transport_deliver_tap_pkt(pkt);
+		vhost_add_used(vq, head, sizeof(pkt->hdr) + payload_len);
+		added = true;
 		pkt->off += payload_len;
 		total_len += payload_len;
 		 * to send it with the next available buffer.
 		 */
 		if (pkt->off < pkt->len) {
+			/* We are queueing the same virtio_vsock_pkt to handle
+			 * the remaining bytes, and we want to deliver it
+			 * to monitoring devices in the next iteration.
+			 */
+			pkt->tap_delivered = false;
 			spin_lock_bh(&vsock->send_pkt_list_lock);
 			list_add(&pkt->list, &vsock->send_pkt_list);
 			spin_unlock_bh(&vsock->send_pkt_list_lock);
 	mutex_lock(&vq->mutex);
-	if (!vq->private_data)
+	if (!vhost_vq_get_backend(vq))
 		goto out;
 	vhost_disable_notify(&vsock->dev, vq);
 			goto err_vq;
 		}
-		if (!vq->private_data) {
+		if (!vhost_vq_get_backend(vq)) {
-			vq->private_data = vsock;
+			vhost_vq_set_backend(vq, vsock);
 			ret = vhost_vq_init_access(vq);
 			if (ret)
 				goto err_vq;
 		mutex_unlock(&vq->mutex);
 	}
+	/* Some packets may have been queued before the device was started,
+	 * let's kick the send worker to send them.
+	 */
+	vhost_work_queue(&vsock->dev, &vsock->send_pkt_work);
 	mutex_unlock(&vsock->dev.mutex);
 	return 0;
 err_vq:
-	vq->private_data = NULL;
+	vhost_vq_set_backend(vq, NULL);
 	mutex_unlock(&vq->mutex);
 	for (i = 0; i < ARRAY_SIZE(vsock->vqs); i++) {
 		vq = &vsock->vqs[i];
 		mutex_lock(&vq->mutex);
-		vq->private_data = NULL;
+		vhost_vq_set_backend(vq, NULL);
 		mutex_unlock(&vq->mutex);
 	}
 err:
 		struct vhost_virtqueue *vq = &vsock->vqs[i];
 		mutex_lock(&vq->mutex);
-		vq->private_data = NULL;
+		vhost_vq_set_backend(vq, NULL);
 		mutex_unlock(&vq->mutex);
 	}

drivers/virtio/Kconfig+1−1

@@ -45,7 +45,7 @@ config VIRTIO_PCI_LEGACY · 44 unmodified lines
45		45
46	config VIRTIO_VDPA	46	config VIRTIO_VDPA
47	tristate "vDPA driver for virtio devices"	47	tristate "vDPA driver for virtio devices"
48	select VDPA	48	depends on VDPA
49	select VIRTIO	49	select VIRTIO
50	help	50	help
51	This driver provides support for virtio based paravirtual	51	This driver provides support for virtio based paravirtual

drivers/virtio/virtio_balloon.c+2−2

@@ -165,7 +165,7 @@ static void tell_host(struct virtio_balloon vb, struct virtqueue vq) · 164 unmodified lines
165		165
166	}	166	}
167		167
168	int virtballoon_free_page_report(struct page_reporting_dev_info *pr_dev_info,	168	static int virtballoon_free_page_report(struct page_reporting_dev_info *pr_dev_info,
169	struct scatterlist *sg, unsigned int nents)	169	struct scatterlist *sg, unsigned int nents)
170	{	170	{
171	struct virtio_balloon *vb =	171	struct virtio_balloon *vb =
@@ -580,7 +580,7 @@ static u32 virtio_balloon_cmd_id_received(struct virtio_balloon *vb) · 408 unmodified lines
580	if (test_and_clear_bit(VIRTIO_BALLOON_CONFIG_READ_CMD_ID,	580	if (test_and_clear_bit(VIRTIO_BALLOON_CONFIG_READ_CMD_ID,
581	&vb->config_read_bitmap))	581	&vb->config_read_bitmap))
582	virtio_cread(vb->vdev, struct virtio_balloon_config,	582	virtio_cread(vb->vdev, struct virtio_balloon_config,
583	free_page_report_cmd_id,	583	free_page_hint_cmd_id,
584	&vb->cmd_id_received_cache);	584	&vb->cmd_id_received_cache);
585		585
586	return vb->cmd_id_received_cache;	586	return vb->cmd_id_received_cache;

drivers/virtio/virtio_input.c+1−0

@@ -3,6 +3,7 @@ · 2 unmodified lines
3	#include <linux/virtio.h>	3	#include <linux/virtio.h>
4	#include <linux/virtio_config.h>	4	#include <linux/virtio_config.h>
5	#include <linux/input.h>	5	#include <linux/input.h>
		6	#include <linux/slab.h>
6		7
7	#include <uapi/linux/virtio_ids.h>	8	#include <uapi/linux/virtio_ids.h>
8	#include <uapi/linux/virtio_input.h>	9	#include <uapi/linux/virtio_input.h>

fs/afs/cmservice.c+1−1

@@ -169,7 +169,7 @@ static int afs_record_cm_probe(struct afs_call call, struct afs_server server) · 168 unmodified lines
169		169
170	spin_lock(&server->probe_lock);	170	spin_lock(&server->probe_lock);
171		171
172	if (!test_bit(AFS_SERVER_FL_HAVE_EPOCH, &server->flags)) {	172	if (!test_and_set_bit(AFS_SERVER_FL_HAVE_EPOCH, &server->flags)) {
173	server->cm_epoch = call->epoch;	173	server->cm_epoch = call->epoch;
174	server->probe.cm_epoch = call->epoch;	174	server->probe.cm_epoch = call->epoch;
175	goto out;	175	goto out;

fs/afs/fs_probe.c+1−4

 	       (unsigned int)rtt, ret);
 	have_result |= afs_fs_probe_done(server);
-	if (have_result) {
+	if (have_result)
-		server->probe.have_result = true;
-		wake_up_var(&server->probe.have_result);
 		wake_up_all(&server->probe_wq);
-	}
 }
 /*

fs/afs/internal.h+1−3

 		u32		abort_code;
 		u32		cm_epoch;
 		short		error;
-		bool		have_result;
 		bool		responded:1;
 		bool		is_yfs:1;
 		bool		not_yfs:1;
 		bool		local_failure:1;
-		bool		no_epoch:1;
 		bool		cm_probed:1;
 		bool		said_rebooted:1;
 		bool		said_inconsistent:1;
 extern void afs_activate_volume(struct afs_volume *);
 extern void afs_deactivate_volume(struct afs_volume *);
 extern void afs_put_volume(struct afs_cell *, struct afs_volume *);
-extern int afs_check_volume_status(struct afs_volume *, struct key *);
+extern int afs_check_volume_status(struct afs_volume *, struct afs_fs_cursor *);
 /*
  * write.c

fs/afs/rotate.c+3−3

@@ -192,7 +192,7 @@ bool afs_select_fileserver(struct afs_fs_cursor *fc) · 191 unmodified lines
192	write_unlock(&vnode->volume->servers_lock);	192	write_unlock(&vnode->volume->servers_lock);
193		193
194	set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags);	194	set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags);
195	error = afs_check_volume_status(vnode->volume, fc->key);	195	error = afs_check_volume_status(vnode->volume, fc);
196	if (error < 0)	196	if (error < 0)
197	goto failed_set_error;	197	goto failed_set_error;
198		198
@@ -281,7 +281,7 @@ bool afs_select_fileserver(struct afs_fs_cursor *fc) · 82 unmodified lines
281		281
282	set_bit(AFS_VOLUME_WAIT, &vnode->volume->flags);	282	set_bit(AFS_VOLUME_WAIT, &vnode->volume->flags);
283	set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags);	283	set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags);
284	error = afs_check_volume_status(vnode->volume, fc->key);	284	error = afs_check_volume_status(vnode->volume, fc);
285	if (error < 0)	285	if (error < 0)
286	goto failed_set_error;	286	goto failed_set_error;
287		287
@@ -341,7 +341,7 @@ start: · 53 unmodified lines
341	/* See if we need to do an update of the volume record. Note that the	341	/* See if we need to do an update of the volume record. Note that the
342	* volume may have moved or even have been deleted.	342	* volume may have moved or even have been deleted.
343	*/	343	*/
344	error = afs_check_volume_status(vnode->volume, fc->key);	344	error = afs_check_volume_status(vnode->volume, fc);
345	if (error < 0)	345	if (error < 0)
346	goto failed_set_error;	346	goto failed_set_error;
347		347

fs/afs/server.c+2−5

 	}
 	ret = wait_on_bit(&server->flags, AFS_SERVER_FL_UPDATING,
-			  TASK_INTERRUPTIBLE);
+			  (fc->flags & AFS_FS_CURSOR_INTR) ?
+			  TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
 	if (ret == -ERESTARTSYS) {
-		if (!(fc->flags & AFS_FS_CURSOR_INTR) && server->addresses) {
-			_leave(" = t [intr]");
-			return true;
-		}
 		fc->error = ret;
 		_leave(" = f [intr]");
 		return false;

fs/afs/vl_rotate.c+2−2

@@ -302,8 +302,8 @@ static void afs_vl_dump_edestaddrreq(const struct afs_vl_cursor *vc) · 301 unmodified lines
302	pr_notice("VC: - nr=%u/%u/%u pf=%u\n",	302	pr_notice("VC: - nr=%u/%u/%u pf=%u\n",
303	a->nr_ipv4, a->nr_addrs, a->max_addrs,	303	a->nr_ipv4, a->nr_addrs, a->max_addrs,
304	a->preferred);	304	a->preferred);
305	pr_notice("VC: - pr=%lx R=%lx F=%lx\n",	305	pr_notice("VC: - R=%lx F=%lx\n",
306	a->probed, a->responded, a->failed);	306	a->responded, a->failed);
307	if (a == vc->ac.alist)	307	if (a == vc->ac.alist)
308	pr_notice("VC: - current\n");	308	pr_notice("VC: - current\n");
309	}	309	}

fs/afs/volume.c+5−3

 /*
  * Make sure the volume record is up to date.
  */
-int afs_check_volume_status(struct afs_volume *volume, struct key *key)
+int afs_check_volume_status(struct afs_volume *volume, struct afs_fs_cursor *fc)
 {
 	time64_t now = ktime_get_real_seconds();
 	int ret, retries = 0;
 	}
 	if (!test_and_set_bit_lock(AFS_VOLUME_UPDATING, &volume->flags)) {
-		ret = afs_update_volume_status(volume, key);
+		ret = afs_update_volume_status(volume, fc->key);
 		clear_bit_unlock(AFS_VOLUME_WAIT, &volume->flags);
 		clear_bit_unlock(AFS_VOLUME_UPDATING, &volume->flags);
 		wake_up_bit(&volume->flags, AFS_VOLUME_WAIT);
 		return 0;
 	}
-	ret = wait_on_bit(&volume->flags, AFS_VOLUME_WAIT, TASK_INTERRUPTIBLE);
+	ret = wait_on_bit(&volume->flags, AFS_VOLUME_WAIT,
+			  (fc->flags & AFS_FS_CURSOR_INTR) ?
+			  TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
 	if (ret == -ERESTARTSYS) {
 		_leave(" = %d", ret);
 		return ret;

fs/block_dev.c+10−1

 #include <linux/module.h>
 #include <linux/blkpg.h>
 #include <linux/magic.h>
-#include <linux/dax.h>
 #include <linux/buffer_head.h>
 #include <linux/swap.h>
 #include <linux/pagevec.h>
 	struct gendisk *disk = bdev->bd_disk;
 	struct block_device *victim = NULL;
+	/*
+	 * Sync early if it looks like we're the last one.  If someone else
+	 * opens the block device between now and the decrement of bd_openers
+	 * then we did a sync that we didn't need to, but that's not the end
+	 * of the world and we want to avoid long (could be several minute)
+	 * syncs while holding the mutex.
+	 */
+	if (bdev->bd_openers == 1)
+		sync_blockdev(bdev);
 	mutex_lock_nested(&bdev->bd_mutex, for_part);
 	if (for_part)
 		bdev->bd_part_count--;

fs/btrfs/backref.c+1−1

@@ -391,7 +391,7 @@ static int is_shared_data_backref(struct preftrees *preftrees, u64 bytenr) · 390 unmodified lines
391	struct rb_node **p = &preftrees->direct.root.rb_root.rb_node;	391	struct rb_node **p = &preftrees->direct.root.rb_root.rb_node;
392	struct rb_node *parent = NULL;	392	struct rb_node *parent = NULL;
393	struct prelim_ref *ref = NULL;	393	struct prelim_ref *ref = NULL;
394	struct prelim_ref target = {0};	394	struct prelim_ref target = {};
395	int result;	395	int result;
396		396
397	target.parent = bytenr;	397	target.parent = bytenr;

fs/btrfs/block-group.c+14−6

 	path = btrfs_alloc_path();
 	if (!path) {
 		ret = -ENOMEM;
-		goto out;
+		goto out_put_group;
 	}
 	/*
 		ret = btrfs_orphan_add(trans, BTRFS_I(inode));
 		if (ret) {
 			btrfs_add_delayed_iput(inode);
-			goto out;
+			goto out_put_group;
 		}
 		clear_nlink(inode);
 		/* One for the block groups ref */
 	ret = btrfs_search_slot(trans, tree_root, &key, path, -1, 1);
 	if (ret < 0)
-		goto out;
+		goto out_put_group;
 	if (ret > 0)
 		btrfs_release_path(path);
 	if (ret == 0) {
 		ret = btrfs_del_item(trans, tree_root, path);
 		if (ret)
-			goto out;
+			goto out_put_group;
 		btrfs_release_path(path);
 	}
 	ret = remove_block_group_free_space(trans, block_group);
 	if (ret)
-		goto out;
+		goto out_put_group;
-	btrfs_put_block_group(block_group);
+	/* Once for the block groups rbtree */
 	btrfs_put_block_group(block_group);
 	ret = btrfs_search_slot(trans, root, &key, path, -1, 1);
 		/* once for the tree */
 		free_extent_map(em);
 	}
+out_put_group:
+	/* Once for the lookup reference */
+	btrfs_put_block_group(block_group);
 out:
 	if (remove_rsv)
 		btrfs_delayed_refs_rsv_release(fs_info, 1);
 	if (ret)
 		goto err;
 	mutex_unlock(&fs_info->unused_bg_unpin_mutex);
+	if (prev_trans)
+		btrfs_put_transaction(prev_trans);
 	return true;
 err:
 	mutex_unlock(&fs_info->unused_bg_unpin_mutex);
+	if (prev_trans)
+		btrfs_put_transaction(prev_trans);
 	btrfs_dec_block_group_ro(bg);
 	return false;
 }

fs/btrfs/discard.h+1−1

@@ -1,4 +1,4 @@
1	// SPDX-License-Identifier: GPL-2.0	1	/* SPDX-License-Identifier: GPL-2.0 */
2		2
3	#ifndef BTRFS_DISCARD_H	3	#ifndef BTRFS_DISCARD_H
4	#define BTRFS_DISCARD_H	4	#define BTRFS_DISCARD_H

fs/btrfs/disk-io.c+32−4

@@ -2036,9 +2036,6 @@ void btrfs_free_fs_roots(struct btrfs_fs_info *fs_info) · 2035 unmodified lines
2036	for (i = 0; i < ret; i++)	2036	for (i = 0; i < ret; i++)
2037	btrfs_drop_and_free_fs_root(fs_info, gang[i]);	2037	btrfs_drop_and_free_fs_root(fs_info, gang[i]);
2038	}	2038	}
2039
2040	if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state))
2041	btrfs_free_log_root_tree(NULL, fs_info);
2042	}	2039	}
2043		2040
2044	static void btrfs_init_scrub(struct btrfs_fs_info *fs_info)	2041	static void btrfs_init_scrub(struct btrfs_fs_info *fs_info)
@@ -3888,7 +3885,7 @@ void btrfs_drop_and_free_fs_root(struct btrfs_fs_info *fs_info, · 1843 unmodified lines
3888	spin_unlock(&fs_info->fs_roots_radix_lock);	3885	spin_unlock(&fs_info->fs_roots_radix_lock);
3889		3886
3890	if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state)) {	3887	if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state)) {
3891	btrfs_free_log(NULL, root);	3888	ASSERT(root->log_root == NULL);
3892	if (root->reloc_root) {	3889	if (root->reloc_root) {
3893	btrfs_put_root(root->reloc_root);	3890	btrfs_put_root(root->reloc_root);
3894	root->reloc_root = NULL;	3891	root->reloc_root = NULL;
@@ -4211,6 +4208,36 @@ static void btrfs_error_commit_super(struct btrfs_fs_info *fs_info) · 316 unmodified lines
4211	up_write(&fs_info->cleanup_work_sem);	4208	up_write(&fs_info->cleanup_work_sem);
4212	}	4209	}
4213		4210
		4211	static void btrfs_drop_all_logs(struct btrfs_fs_info *fs_info)
		4212	{
		4213	struct btrfs_root *gang[8];
		4214	u64 root_objectid = 0;
		4215	int ret;
		4216
		4217	spin_lock(&fs_info->fs_roots_radix_lock);
		4218	while ((ret = radix_tree_gang_lookup(&fs_info->fs_roots_radix,
		4219	(void **)gang, root_objectid,
		4220	ARRAY_SIZE(gang))) != 0) {
		4221	int i;
		4222
		4223	for (i = 0; i < ret; i++)
		4224	gang[i] = btrfs_grab_root(gang[i]);
		4225	spin_unlock(&fs_info->fs_roots_radix_lock);
		4226
		4227	for (i = 0; i < ret; i++) {
		4228	if (!gang[i])
		4229	continue;
		4230	root_objectid = gang[i]->root_key.objectid;
		4231	btrfs_free_log(NULL, gang[i]);
		4232	btrfs_put_root(gang[i]);
		4233	}
		4234	root_objectid++;
		4235	spin_lock(&fs_info->fs_roots_radix_lock);
		4236	}
		4237	spin_unlock(&fs_info->fs_roots_radix_lock);
		4238	btrfs_free_log_root_tree(NULL, fs_info);
		4239	}
		4240
4214	static void btrfs_destroy_ordered_extents(struct btrfs_root *root)	4241	static void btrfs_destroy_ordered_extents(struct btrfs_root *root)
4215	{	4242	{
4216	struct btrfs_ordered_extent *ordered;	4243	struct btrfs_ordered_extent *ordered;
@@ -4603,6 +4630,7 @@ static int btrfs_cleanup_transaction(struct btrfs_fs_info *fs_info) · 386 unmodified lines
4603	btrfs_destroy_delayed_inodes(fs_info);	4630	btrfs_destroy_delayed_inodes(fs_info);
4604	btrfs_assert_delayed_root_empty(fs_info);	4631	btrfs_assert_delayed_root_empty(fs_info);
4605	btrfs_destroy_all_delalloc_inodes(fs_info);	4632	btrfs_destroy_all_delalloc_inodes(fs_info);
		4633	btrfs_drop_all_logs(fs_info);
4606	mutex_unlock(&fs_info->transaction_kthread_mutex);	4634	mutex_unlock(&fs_info->transaction_kthread_mutex);
4607		4635
4608	return 0;	4636	return 0;

fs/btrfs/relocation.c+1−0

@@ -4559,6 +4559,7 @@ int btrfs_recover_relocation(struct btrfs_root *root) · 4558 unmodified lines
4559	if (IS_ERR(fs_root)) {	4559	if (IS_ERR(fs_root)) {
4560	err = PTR_ERR(fs_root);	4560	err = PTR_ERR(fs_root);
4561	list_add_tail(&reloc_root->root_list, &reloc_roots);	4561	list_add_tail(&reloc_root->root_list, &reloc_roots);
		4562	btrfs_end_transaction(trans);
4562	goto out_unset;	4563	goto out_unset;
4563	}	4564	}
4564		4565

fs/btrfs/transaction.c+11−2

@@ -662,10 +662,19 @@ again: · 661 unmodified lines
662	}	662	}
663		663
664	got_it:	664	got_it:
665	btrfs_record_root_in_trans(h, root);
666
667	if (!current->journal_info)	665	if (!current->journal_info)
668	current->journal_info = h;	666	current->journal_info = h;
		667
		668	/*
		669	* btrfs_record_root_in_trans() needs to alloc new extents, and may
		670	* call btrfs_join_transaction() while we're also starting a
		671	* transaction.
		672	*
		673	* Thus it need to be called after current->journal_info initialized,
		674	* or we can deadlock.
		675	*/
		676	btrfs_record_root_in_trans(h, root);
		677
669	return h;	678	return h;
670		679
671	join_fail:	680	join_fail:

fs/btrfs/tree-log.c+40−3

@@ -4226,6 +4226,9 @@ static int btrfs_log_prealloc_extents(struct btrfs_trans_handle *trans, · 4225 unmodified lines
4226	const u64 ino = btrfs_ino(inode);	4226	const u64 ino = btrfs_ino(inode);
4227	struct btrfs_path *dst_path = NULL;	4227	struct btrfs_path *dst_path = NULL;
4228	bool dropped_extents = false;	4228	bool dropped_extents = false;
		4229	u64 truncate_offset = i_size;
		4230	struct extent_buffer *leaf;
		4231	int slot;
4229	int ins_nr = 0;	4232	int ins_nr = 0;
4230	int start_slot;	4233	int start_slot;
4231	int ret;	4234	int ret;
@@ -4240,9 +4243,43 @@ static int btrfs_log_prealloc_extents(struct btrfs_trans_handle *trans, · 8 unmodified lines
4240	if (ret < 0)	4243	if (ret < 0)
4241	goto out;	4244	goto out;
4242		4245
		4246	/*
		4247	* We must check if there is a prealloc extent that starts before the
		4248	* i_size and crosses the i_size boundary. This is to ensure later we
		4249	* truncate down to the end of that extent and not to the i_size, as
		4250	* otherwise we end up losing part of the prealloc extent after a log
		4251	* replay and with an implicit hole if there is another prealloc extent
		4252	* that starts at an offset beyond i_size.
		4253	*/
		4254	ret = btrfs_previous_item(root, path, ino, BTRFS_EXTENT_DATA_KEY);
		4255	if (ret < 0)
		4256	goto out;
		4257
		4258	if (ret == 0) {
		4259	struct btrfs_file_extent_item *ei;
		4260
		4261	leaf = path->nodes[0];
		4262	slot = path->slots[0];
		4263	ei = btrfs_item_ptr(leaf, slot, struct btrfs_file_extent_item);
		4264
		4265	if (btrfs_file_extent_type(leaf, ei) ==
		4266	BTRFS_FILE_EXTENT_PREALLOC) {
		4267	u64 extent_end;
		4268
		4269	btrfs_item_key_to_cpu(leaf, &key, slot);
		4270	extent_end = key.offset +
		4271	btrfs_file_extent_num_bytes(leaf, ei);
		4272
		4273	if (extent_end > i_size)
		4274	truncate_offset = extent_end;
		4275	}
		4276	} else {
		4277	ret = 0;
		4278	}
		4279
4243	while (true) {	4280	while (true) {
4244	struct extent_buffer *leaf = path->nodes[0];	4281	leaf = path->nodes[0];
4245	int slot = path->slots[0];	4282	slot = path->slots[0];
4246		4283
4247	if (slot >= btrfs_header_nritems(leaf)) {	4284	if (slot >= btrfs_header_nritems(leaf)) {
4248	if (ins_nr > 0) {	4285	if (ins_nr > 0) {
@@ -4280,7 +4317,7 @@ static int btrfs_log_prealloc_extents(struct btrfs_trans_handle *trans, · 31 unmodified lines
4280	ret = btrfs_truncate_inode_items(trans,	4317	ret = btrfs_truncate_inode_items(trans,
4281	root->log_root,	4318	root->log_root,
4282	&inode->vfs_inode,	4319	&inode->vfs_inode,
4283	i_size,	4320	truncate_offset,
4284	BTRFS_EXTENT_DATA_KEY);	4321	BTRFS_EXTENT_DATA_KEY);
4285	} while (ret == -EAGAIN);	4322	} while (ret == -EAGAIN);
4286	if (ret)	4323	if (ret)

fs/buffer.c+1−1

@@ -967,7 +967,7 @@ grow_dev_page(struct block_device *bdev, sector_t block, · 966 unmodified lines
967	struct page *page;	967	struct page *page;
968	struct buffer_head *bh;	968	struct buffer_head *bh;
969	sector_t end_block;	969	sector_t end_block;
970	int ret = 0; /* Will call free_more_memory() */	970	int ret = 0;
971	gfp_t gfp_mask;	971	gfp_t gfp_mask;
972		972
973	gfp_mask = mapping_gfp_constraint(inode->i_mapping, ~__GFP_FS) \| gfp;	973	gfp_mask = mapping_gfp_constraint(inode->i_mapping, ~__GFP_FS) \| gfp;

fs/ceph/caps.c+2−1

 	ret = try_get_cap_refs(inode, need, want, 0, flags, got);
 	/* three special error codes */
-	if (ret == -EAGAIN || ret == -EFBIG || ret == -EAGAIN)
+	if (ret == -EAGAIN || ret == -EFBIG || ret == -ESTALE)
 		ret = 0;
 	return ret;
 }
 		WARN_ON(1);
 		tsession = NULL;
 		target = -1;
+		mutex_lock(&session->s_mutex);
 	}
 	goto retry;

fs/ceph/debugfs.c+1−1

@@ -271,7 +271,7 @@ void ceph_fs_debugfs_init(struct ceph_fs_client *fsc) · 270 unmodified lines
271	&congestion_kb_fops);	271	&congestion_kb_fops);
272		272
273	snprintf(name, sizeof(name), "../../bdi/%s",	273	snprintf(name, sizeof(name), "../../bdi/%s",
274	dev_name(fsc->sb->s_bdi->dev));	274	bdi_dev_name(fsc->sb->s_bdi));
275	fsc->debugfs_bdi =	275	fsc->debugfs_bdi =
276	debugfs_create_symlink("bdi",	276	debugfs_create_symlink("bdi",
277	fsc->client->debugfs_dir,	277	fsc->client->debugfs_dir,

fs/ceph/mds_client.c+3−5

 	void *end = p + msg->front.iov_len;
 	struct ceph_mds_session_head *h;
 	u32 op;
-	u64 seq;
+	u64 seq, features = 0;
-	unsigned long features = 0;
 	int wake = 0;
 	bool blacklisted = false;
 			goto bad;
 		/* version >= 3, feature bits */
 		ceph_decode_32_safe(&p, end, len, bad);
-		ceph_decode_need(&p, end, len, bad);
+		ceph_decode_64_safe(&p, end, features, bad);
-		memcpy(&features, p, min_t(size_t, len, sizeof(features)));
+		p += len - sizeof(features);
-		p += len;
 	}
 	mutex_lock(&mdsc->mutex);

fs/ceph/quota.c+2−2

@@ -159,8 +159,8 @@ static struct inode lookup_quotarealm_inode(struct ceph_mds_client mdsc, · 158 unmodified lines
159	}	159	}
160		160
161	if (IS_ERR(in)) {	161	if (IS_ERR(in)) {
162	pr_warn("Can't lookup inode %llx (err: %ld)\n",	162	dout("Can't lookup inode %llx (err: %ld)\n",
163	realm->ino, PTR_ERR(in));	163	realm->ino, PTR_ERR(in));
164	qri->timeout = jiffies + msecs_to_jiffies(60 * 1000); /* XXX */	164	qri->timeout = jiffies + msecs_to_jiffies(60 * 1000); /* XXX */
165	} else {	165	} else {
166	qri->timeout = 0;	166	qri->timeout = 0;

fs/cifs/cifsglob.h+2−1

 /*
  * This lock protects the cifs_tcp_ses_list, the list of smb sessions per
  * tcp session, and the list of tcon's per smb session. It also protects
- * the reference counters for the server, smb session, and tcon. Finally,
+ * the reference counters for the server, smb session, and tcon. It also
+ * protects some fields in the TCP_Server_Info struct such as dstaddr. Finally,
  * changes to the tcon->tidStatus should be done while holding this lock.
  * generally the locks should be taken in order tcp_ses_lock before
  * tcon->open_file_lock and that before file->file_info_lock since the

fs/cifs/connect.c+6−0

 		return rc;
 	}
+	spin_lock(&cifs_tcp_ses_lock);
 	rc = cifs_convert_address((struct sockaddr *)&server->dstaddr, ipaddr,
 				  strlen(ipaddr));
+	spin_unlock(&cifs_tcp_ses_lock);
 	kfree(ipaddr);
 	return !rc ? -1 : 0;
 	spin_lock(&cifs_tcp_ses_lock);
 	list_for_each(tmp, &ses->tcon_list) {
 		tcon = list_entry(tmp, struct cifs_tcon, tcon_list);
+#ifdef CONFIG_CIFS_DFS_UPCALL
+		if (tcon->dfs_path)
+			continue;
+#endif
 		if (!match_tcon(tcon, volume_info))
 			continue;
 		++tcon->tc_count;

fs/cifs/misc.c+65−17

 }
 struct super_cb_data {
-	struct TCP_Server_Info *server;
+	void *data;
 	struct super_block *sb;
 };
-static void super_cb(struct super_block *sb, void *arg)
+static void tcp_super_cb(struct super_block *sb, void *arg)
 {
-	struct super_cb_data *d = arg;
+	struct super_cb_data *sd = arg;
+	struct TCP_Server_Info *server = sd->data;
 	struct cifs_sb_info *cifs_sb;
 	struct cifs_tcon *tcon;
-	if (d->sb)
+	if (sd->sb)
 		return;
 	cifs_sb = CIFS_SB(sb);
 	tcon = cifs_sb_master_tcon(cifs_sb);
-	if (tcon->ses->server == d->server)
+	if (tcon->ses->server == server)
-		d->sb = sb;
+		sd->sb = sb;
 }
-struct super_block *cifs_get_tcp_super(struct TCP_Server_Info *server)
+static struct super_block *__cifs_get_super(void (*f)(struct super_block *, void *),
+					    void *data)
 {
-	struct super_cb_data d = {
+	struct super_cb_data sd = {
-		.server = server,
+		.data = data,
 		.sb = NULL,
 	};
-	iterate_supers_type(&cifs_fs_type, super_cb, &d);
+	iterate_supers_type(&cifs_fs_type, f, &sd);
-	if (unlikely(!d.sb))
+	if (!sd.sb)
-		return ERR_PTR(-ENOENT);
+		return ERR_PTR(-EINVAL);
 	/*
 	 * Grab an active reference in order to prevent automounts (DFS links)
 	 * of expiring and then freeing up our cifs superblock pointer while
 	 * we're doing failover.
 	 */
-	cifs_sb_active(d.sb);
+	cifs_sb_active(sd.sb);
-	return d.sb;
+	return sd.sb;
 }
-void cifs_put_tcp_super(struct super_block *sb)
+static void __cifs_put_super(struct super_block *sb)
 {
 	if (!IS_ERR_OR_NULL(sb))
 		cifs_sb_deactive(sb);
 }
+struct super_block *cifs_get_tcp_super(struct TCP_Server_Info *server)
+{
+	return __cifs_get_super(tcp_super_cb, server);
+}
+void cifs_put_tcp_super(struct super_block *sb)
+{
+	__cifs_put_super(sb);
+}
+#ifdef CONFIG_CIFS_DFS_UPCALL
+static void tcon_super_cb(struct super_block *sb, void *arg)
+{
+	struct super_cb_data *sd = arg;
+	struct cifs_tcon *tcon = sd->data;
+	struct cifs_sb_info *cifs_sb;
+	if (sd->sb)
+		return;
+	cifs_sb = CIFS_SB(sb);
+	if (tcon->dfs_path && cifs_sb->origin_fullpath &&
+	    !strcasecmp(tcon->dfs_path, cifs_sb->origin_fullpath))
+		sd->sb = sb;
+}
+static inline struct super_block *cifs_get_tcon_super(struct cifs_tcon *tcon)
+{
+	return __cifs_get_super(tcon_super_cb, tcon);
+}
+static inline void cifs_put_tcon_super(struct super_block *sb)
+{
+	__cifs_put_super(sb);
+}
+#else
+static inline struct super_block *cifs_get_tcon_super(struct cifs_tcon *tcon)
+{
+	return ERR_PTR(-EOPNOTSUPP);
+}
+static inline void cifs_put_tcon_super(struct super_block *sb)
+{
+}
+#endif
 int update_super_prepath(struct cifs_tcon *tcon, const char *prefix,
 			 size_t prefix_len)
 {
 	struct cifs_sb_info *cifs_sb;
 	int rc = 0;
-	sb = cifs_get_tcp_super(tcon->ses->server);
+	sb = cifs_get_tcon_super(tcon);
 	if (IS_ERR(sb))
 		return PTR_ERR(sb);
 	cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_USE_PREFIX_PATH;
 out:
-	cifs_put_tcp_super(sb);
+	cifs_put_tcon_super(sb);
 	return rc;
 }

fs/cifs/smb2ops.c+5−0

 	if (smb3_encryption_required(tcon))
 		flags |= CIFS_TRANSFORM_REQ;
+	if (!server->ops->new_lease_key)
+		return -EIO;
+	server->ops->new_lease_key(pfid);
 	memset(rqst, 0, sizeof(rqst));
 	resp_buftype[0] = resp_buftype[1] = CIFS_NO_BUFFER;
 	memset(rsp_iov, 0, sizeof(rsp_iov));

fs/configfs/dir.c+1−0

@@ -1519,6 +1519,7 @@ static int configfs_rmdir(struct inode dir, struct dentry dentry) · 1518 unmodified lines
1519	spin_lock(&configfs_dirent_lock);	1519	spin_lock(&configfs_dirent_lock);
1520	configfs_detach_rollback(dentry);	1520	configfs_detach_rollback(dentry);
1521	spin_unlock(&configfs_dirent_lock);	1521	spin_unlock(&configfs_dirent_lock);
		1522	config_item_put(parent_item);
1522	return -EINTR;	1523	return -EINTR;
1523	}	1524	}
1524	frag->frag_dead = true;	1525	frag->frag_dead = true;

fs/coredump.c+10−0

 			return -ENOMEM;
 		(*argv)[(*argc)++] = 0;
 		++pat_ptr;
+		if (!(*pat_ptr))
+			return -ENOMEM;
 	}
 	/* Repeat as long as we have more pattern to process and more output
 	if (displaced)
 		put_files_struct(displaced);
 	if (!dump_interrupted()) {
+		/*
+		 * umh disabled with CONFIG_STATIC_USERMODEHELPER_PATH="" would
+		 * have this set to NULL.
+		 */
+		if (!cprm.file) {
+			pr_info("Core dump to |%s disabled\n", cn.corename);
+			goto close_fail;
+		}
 		file_start_write(cprm.file);
 		core_dumped = binfmt->core_dump(&cprm);
 		file_end_write(cprm.file);

fs/debugfs/file.c+3−12

  * This function creates a file in debugfs with the given name that
  * contains the value of the variable @value.  If the @mode variable is so
  * set, it can be read from, and written to.
- *
- * This function will return a pointer to a dentry if it succeeds.  This
- * pointer must be passed to the debugfs_remove() function when the file is
- * to be removed (no automatic cleanup happens if your module is unloaded,
- * you are responsible here.)  If an error occurs, ERR_PTR(-ERROR) will be
- * returned.
- *
- * If debugfs is not enabled in the kernel, the value ERR_PTR(-ENODEV) will
- * be returned.
  */
-struct dentry *debugfs_create_u32(const char *name, umode_t mode,
+void debugfs_create_u32(const char *name, umode_t mode, struct dentry *parent,
-				 struct dentry *parent, u32 *value)
+			u32 *value)
 {
-	return debugfs_create_mode_unsafe(name, mode, parent, value, &fops_u32,
+	debugfs_create_mode_unsafe(name, mode, parent, value, &fops_u32,
 				   &fops_u32_ro, &fops_u32_wo);
 }
 EXPORT_SYMBOL_GPL(debugfs_create_u32);

fs/eventpoll.c+33−28

@@ -1171,6 +1171,10 @@ static inline bool chain_epi_lockless(struct epitem *epi) · 1170 unmodified lines
1171	{	1171	{
1172	struct eventpoll *ep = epi->ep;	1172	struct eventpoll *ep = epi->ep;
1173		1173
		1174	/* Fast preliminary check */
		1175	if (epi->next != EP_UNACTIVE_PTR)
		1176	return false;
		1177
1174	/* Check that the same epi has not been just chained from another CPU */	1178	/* Check that the same epi has not been just chained from another CPU */
1175	if (cmpxchg(&epi->next, EP_UNACTIVE_PTR, NULL) != EP_UNACTIVE_PTR)	1179	if (cmpxchg(&epi->next, EP_UNACTIVE_PTR, NULL) != EP_UNACTIVE_PTR)
1176	return false;	1180	return false;
@@ -1237,16 +1241,12 @@ static int ep_poll_callback(wait_queue_entry_t *wait, unsigned mode, int sync, v · 60 unmodified lines
1237	* chained in ep->ovflist and requeued later on.	1241	* chained in ep->ovflist and requeued later on.
1238	*/	1242	*/
1239	if (READ_ONCE(ep->ovflist) != EP_UNACTIVE_PTR) {	1243	if (READ_ONCE(ep->ovflist) != EP_UNACTIVE_PTR) {
1240	if (epi->next == EP_UNACTIVE_PTR &&	1244	if (chain_epi_lockless(epi))
1241	chain_epi_lockless(epi))	1245	ep_pm_stay_awake_rcu(epi);
		1246	} else if (!ep_is_linked(epi)) {
		1247	/* In the usual case, add event to ready list. */
		1248	if (list_add_tail_lockless(&epi->rdllink, &ep->rdllist))
1242	ep_pm_stay_awake_rcu(epi);	1249	ep_pm_stay_awake_rcu(epi);
1243	goto out_unlock;
1244	}
1245
1246	/* If this file is already in the ready list we exit soon */
1247	if (!ep_is_linked(epi) &&
1248	list_add_tail_lockless(&epi->rdllink, &ep->rdllist)) {
1249	ep_pm_stay_awake_rcu(epi);
1250	}	1250	}
1251		1251
1252	/*	1252	/*
@@ -1822,7 +1822,6 @@ static int ep_poll(struct eventpoll ep, struct epoll_event __user events, · 569 unmodified lines
1822	{	1822	{
1823	int res = 0, eavail, timed_out = 0;	1823	int res = 0, eavail, timed_out = 0;
1824	u64 slack = 0;	1824	u64 slack = 0;
1825	bool waiter = false;
1826	wait_queue_entry_t wait;	1825	wait_queue_entry_t wait;
1827	ktime_t expires, *to = NULL;	1826	ktime_t expires, *to = NULL;
1828		1827
@@ -1867,21 +1866,23 @@ fetch_events: · 38 unmodified lines
1867	*/	1866	*/
1868	ep_reset_busy_poll_napi_id(ep);	1867	ep_reset_busy_poll_napi_id(ep);
1869		1868
1870	/*	1869	do {
1871	* We don't have any available event to return to the caller. We need	1870	/*
1872	* to sleep here, and we will be woken by ep_poll_callback() when events	1871	* Internally init_wait() uses autoremove_wake_function(),
1873	* become available.	1872	* thus wait entry is removed from the wait queue on each
1874	*/	1873	* wakeup. Why it is important? In case of several waiters
1875	if (!waiter) {	1874	* each new wakeup will hit the next waiter, giving it the
1876	waiter = true;	1875	* chance to harvest new event. Otherwise wakeup can be
1877	init_waitqueue_entry(&wait, current);	1876	* lost. This is also good performance-wise, because on
1878		1877	* normal wakeup path no need to call __remove_wait_queue()
		1878	* explicitly, thus ep->lock is not taken, which halts the
		1879	* event delivery.
		1880	*/
		1881	init_wait(&wait);
1879	write_lock_irq(&ep->lock);	1882	write_lock_irq(&ep->lock);
1880	__add_wait_queue_exclusive(&ep->wq, &wait);	1883	__add_wait_queue_exclusive(&ep->wq, &wait);
1881	write_unlock_irq(&ep->lock);	1884	write_unlock_irq(&ep->lock);
1882	}
1883		1885
1884	for (;;) {
1885	/*	1886	/*
1886	* We don't want to sleep if the ep_poll_callback() sends us	1887	* We don't want to sleep if the ep_poll_callback() sends us
1887	* a wakeup in between. That's why we set the task state	1888	* a wakeup in between. That's why we set the task state
@@ -1911,10 +1912,20 @@ fetch_events: · 23 unmodified lines
1911	timed_out = 1;	1912	timed_out = 1;
1912	break;	1913	break;
1913	}	1914	}
1914	}	1915
		1916	/* We were woken up, thus go and try to harvest some events */
		1917	eavail = 1;
		1918
		1919	} while (0);
1915		1920
1916	__set_current_state(TASK_RUNNING);	1921	__set_current_state(TASK_RUNNING);
1917		1922
		1923	if (!list_empty_careful(&wait.entry)) {
		1924	write_lock_irq(&ep->lock);
		1925	__remove_wait_queue(&ep->wq, &wait);
		1926	write_unlock_irq(&ep->lock);
		1927	}
		1928
1918	send_events:	1929	send_events:
1919	/*	1930	/*
1920	* Try to transfer events to user space. In case we get 0 events and	1931	* Try to transfer events to user space. In case we get 0 events and
@@ -1925,12 +1936,6 @@ send_events: · 4 unmodified lines
1925	!(res = ep_send_events(ep, events, maxevents)) && !timed_out)	1936	!(res = ep_send_events(ep, events, maxevents)) && !timed_out)
1926	goto fetch_events;	1937	goto fetch_events;
1927		1938
1928	if (waiter) {
1929	write_lock_irq(&ep->lock);
1930	__remove_wait_queue(&ep->wq, &wait);
1931	write_unlock_irq(&ep->lock);
1932	}
1933
1934	return res;	1939	return res;
1935	}	1940	}
1936		1941

fs/exfat/balloc.c+0−3

 		}
 	}
-	sbi->pbr_bh = NULL;
 	return 0;
 }
 {
 	int i;
-	brelse(sbi->pbr_bh);
 	for (i = 0; i < sbi->map_sectors; i++)
 		__brelse(sbi->vol_amap[i]);

fs/exfat/exfat_fs.h+1−0

@@ -507,6 +507,7 @@ void exfat_msg(struct super_block sb, const char lv, const char *fmt, ...) · 506 unmodified lines
507	__printf(3, 4) __cold;	507	__printf(3, 4) __cold;
508	void exfat_get_entry_time(struct exfat_sb_info sbi, struct timespec64 ts,	508	void exfat_get_entry_time(struct exfat_sb_info sbi, struct timespec64 ts,
509	u8 tz, __le16 time, __le16 date, u8 time_ms);	509	u8 tz, __le16 time, __le16 date, u8 time_ms);
		510	void exfat_truncate_atime(struct timespec64 *ts);
510	void exfat_set_entry_time(struct exfat_sb_info sbi, struct timespec64 ts,	511	void exfat_set_entry_time(struct exfat_sb_info sbi, struct timespec64 ts,
511	u8 tz, __le16 time, __le16 date, u8 time_ms);	512	u8 tz, __le16 time, __le16 date, u8 time_ms);
512	unsigned short exfat_calc_chksum_2byte(void *data, int len,	513	unsigned short exfat_calc_chksum_2byte(void *data, int len,

fs/exfat/file.c+2−0

 	struct exfat_inode_info *ei = EXFAT_I(inode);
 	generic_fillattr(inode, stat);
+	exfat_truncate_atime(&stat->atime);
 	stat->result_mask |= STATX_BTIME;
 	stat->btime.tv_sec = ei->i_crtime.tv_sec;
 	stat->btime.tv_nsec = ei->i_crtime.tv_nsec;
 	}
 	setattr_copy(inode, attr);
+	exfat_truncate_atime(&inode->i_atime);
 	mark_inode_dirty(inode);
 out:

fs/exfat/misc.c+13−1

 	if (time_ms) {
 		ts->tv_sec += time_ms / 100;
 		ts->tv_nsec = (time_ms % 100) * 10 * NSEC_PER_MSEC;
-	}
+	} else
+		ts->tv_nsec = 0;
 	if (tz & EXFAT_TZ_VALID)
 		/* Adjust timezone to UTC0. */
 	*tz = EXFAT_TZ_VALID;
 }
+/*
+ * The timestamp for access_time has double seconds granularity.
+ * (There is no 10msIncrement field for access_time unlike create/modify_time)
+ * atime also has only a 2-second resolution.
+ */
+void exfat_truncate_atime(struct timespec64 *ts)
+{
+	ts->tv_sec = round_down(ts->tv_sec, 2);
+	ts->tv_nsec = 0;
+}
 unsigned short exfat_calc_chksum_2byte(void *data, int len,
 		unsigned short chksum, int type)
 {

fs/exfat/namei.c+7−0

 	inode_inc_iversion(inode);
 	inode->i_mtime = inode->i_atime = inode->i_ctime =
 		EXFAT_I(inode)->i_crtime = current_time(inode);
+	exfat_truncate_atime(&inode->i_atime);
 	/* timestamp is already written, so mark_inode_dirty() is unneeded. */
 	d_instantiate(dentry, inode);
 	inode_inc_iversion(dir);
 	dir->i_mtime = dir->i_atime = current_time(dir);
+	exfat_truncate_atime(&dir->i_atime);
 	if (IS_DIRSYNC(dir))
 		exfat_sync_inode(dir);
 	else
 	clear_nlink(inode);
 	inode->i_mtime = inode->i_atime = current_time(inode);
+	exfat_truncate_atime(&inode->i_atime);
 	exfat_unhash_inode(inode);
 	exfat_d_version_set(dentry, inode_query_iversion(dir));
 unlock:
 	inode_inc_iversion(inode);
 	inode->i_mtime = inode->i_atime = inode->i_ctime =
 		EXFAT_I(inode)->i_crtime = current_time(inode);
+	exfat_truncate_atime(&inode->i_atime);
 	/* timestamp is already written, so mark_inode_dirty() is unneeded. */
 	d_instantiate(dentry, inode);
 	inode_inc_iversion(dir);
 	dir->i_mtime = dir->i_atime = current_time(dir);
+	exfat_truncate_atime(&dir->i_atime);
 	if (IS_DIRSYNC(dir))
 		exfat_sync_inode(dir);
 	else
 	clear_nlink(inode);
 	inode->i_mtime = inode->i_atime = current_time(inode);
+	exfat_truncate_atime(&inode->i_atime);
 	exfat_unhash_inode(inode);
 	exfat_d_version_set(dentry, inode_query_iversion(dir));
 unlock:
 	inode_inc_iversion(new_dir);
 	new_dir->i_ctime = new_dir->i_mtime = new_dir->i_atime =
 		EXFAT_I(new_dir)->i_crtime = current_time(new_dir);
+	exfat_truncate_atime(&new_dir->i_atime);
 	if (IS_DIRSYNC(new_dir))
 		exfat_sync_inode(new_dir);
 	else

fs/exfat/super.c+22−31

@@ -49,6 +49,7 @@ static void exfat_put_super(struct super_block *sb) · 48 unmodified lines
49	sync_blockdev(sb->s_bdev);	49	sync_blockdev(sb->s_bdev);
50	exfat_set_vol_flags(sb, VOL_CLEAN);	50	exfat_set_vol_flags(sb, VOL_CLEAN);
51	exfat_free_bitmap(sbi);	51	exfat_free_bitmap(sbi);
		52	brelse(sbi->pbr_bh);
52	mutex_unlock(&sbi->s_lock);	53	mutex_unlock(&sbi->s_lock);
53		54
54	call_rcu(&sbi->rcu, exfat_delayed_free);	55	call_rcu(&sbi->rcu, exfat_delayed_free);
@@ -100,7 +101,7 @@ static int exfat_statfs(struct dentry dentry, struct kstatfs buf) · 45 unmodified lines
100	int exfat_set_vol_flags(struct super_block *sb, unsigned short new_flag)	101	int exfat_set_vol_flags(struct super_block *sb, unsigned short new_flag)
101	{	102	{
102	struct exfat_sb_info *sbi = EXFAT_SB(sb);	103	struct exfat_sb_info *sbi = EXFAT_SB(sb);
103	struct pbr64 *bpb;	104	struct pbr64 bpb = (struct pbr64 )sbi->pbr_bh->b_data;
104	bool sync = 0;	105	bool sync = 0;
105		106
106	/* flags are not changed */	107	/* flags are not changed */
@@ -115,15 +116,6 @@ int exfat_set_vol_flags(struct super_block *sb, unsigned short new_flag) · 8 unmodified lines
115	if (sb_rdonly(sb))	116	if (sb_rdonly(sb))
116	return 0;	117	return 0;
117		118
118	if (!sbi->pbr_bh) {
119	sbi->pbr_bh = sb_bread(sb, 0);
120	if (!sbi->pbr_bh) {
121	exfat_msg(sb, KERN_ERR, "failed to read boot sector");
122	return -ENOMEM;
123	}
124	}
125
126	bpb = (struct pbr64 *)sbi->pbr_bh->b_data;
127	bpb->bsx.vol_flags = cpu_to_le16(new_flag);	119	bpb->bsx.vol_flags = cpu_to_le16(new_flag);
128		120
129	if (new_flag == VOL_DIRTY && !buffer_dirty(sbi->pbr_bh))	121	if (new_flag == VOL_DIRTY && !buffer_dirty(sbi->pbr_bh))
@@ -159,7 +151,6 @@ static int exfat_show_options(struct seq_file m, struct dentry root) · 29 unmodified lines
159	seq_puts(m, ",iocharset=utf8");	151	seq_puts(m, ",iocharset=utf8");
160	else if (sbi->nls_io)	152	else if (sbi->nls_io)
161	seq_printf(m, ",iocharset=%s", sbi->nls_io->charset);	153	seq_printf(m, ",iocharset=%s", sbi->nls_io->charset);
162	seq_printf(m, ",bps=%ld", sb->s_blocksize);
163	if (opts->errors == EXFAT_ERRORS_CONT)	154	if (opts->errors == EXFAT_ERRORS_CONT)
164	seq_puts(m, ",errors=continue");	155	seq_puts(m, ",errors=continue");
165	else if (opts->errors == EXFAT_ERRORS_PANIC)	156	else if (opts->errors == EXFAT_ERRORS_PANIC)
@@ -351,14 +342,15 @@ static int exfat_read_root(struct inode *inode) · 185 unmodified lines
351	exfat_save_attr(inode, ATTR_SUBDIR);	342	exfat_save_attr(inode, ATTR_SUBDIR);
352	inode->i_mtime = inode->i_atime = inode->i_ctime = ei->i_crtime =	343	inode->i_mtime = inode->i_atime = inode->i_ctime = ei->i_crtime =
353	current_time(inode);	344	current_time(inode);
		345	exfat_truncate_atime(&inode->i_atime);
354	exfat_cache_init_inode(inode);	346	exfat_cache_init_inode(inode);
355	return 0;	347	return 0;
356	}	348	}
357		349
358	static struct pbr exfat_read_pbr_with_logical_sector(struct super_block sb,	350	static struct pbr exfat_read_pbr_with_logical_sector(struct super_block sb)
359	struct buffer_head **prev_bh)
360	{	351	{
361	struct pbr p_pbr = (struct pbr ) (*prev_bh)->b_data;	352	struct exfat_sb_info *sbi = EXFAT_SB(sb);
		353	struct pbr p_pbr = (struct pbr ) (sbi->pbr_bh)->b_data;
362	unsigned short logical_sect = 0;	354	unsigned short logical_sect = 0;
363		355
364	logical_sect = 1 << p_pbr->bsx.f64.sect_size_bits;	356	logical_sect = 1 << p_pbr->bsx.f64.sect_size_bits;
@@ -378,26 +370,23 @@ static struct pbr exfat_read_pbr_with_logical_sector(struct super_block sb, · 13 unmodified lines
378	}	370	}
379		371
380	if (logical_sect > sb->s_blocksize) {	372	if (logical_sect > sb->s_blocksize) {
381	struct buffer_head *bh = NULL;	373	brelse(sbi->pbr_bh);
382		374	sbi->pbr_bh = NULL;
383	__brelse(*prev_bh);
384	*prev_bh = NULL;
385		375
386	if (!sb_set_blocksize(sb, logical_sect)) {	376	if (!sb_set_blocksize(sb, logical_sect)) {
387	exfat_msg(sb, KERN_ERR,	377	exfat_msg(sb, KERN_ERR,
388	"unable to set blocksize %u", logical_sect);	378	"unable to set blocksize %u", logical_sect);
389	return NULL;	379	return NULL;
390	}	380	}
391	bh = sb_bread(sb, 0);	381	sbi->pbr_bh = sb_bread(sb, 0);
392	if (!bh) {	382	if (!sbi->pbr_bh) {
393	exfat_msg(sb, KERN_ERR,	383	exfat_msg(sb, KERN_ERR,
394	"unable to read boot sector (logical sector size = %lu)",	384	"unable to read boot sector (logical sector size = %lu)",
395	sb->s_blocksize);	385	sb->s_blocksize);
396	return NULL;	386	return NULL;
397	}	387	}
398		388
399	*prev_bh = bh;	389	p_pbr = (struct pbr *)sbi->pbr_bh->b_data;
400	p_pbr = (struct pbr *) bh->b_data;
401	}	390	}
402	return p_pbr;	391	return p_pbr;
403	}	392	}
@@ -408,21 +397,20 @@ static int __exfat_fill_super(struct super_block *sb) · 4 unmodified lines
408	int ret;	397	int ret;
409	struct pbr *p_pbr;	398	struct pbr *p_pbr;
410	struct pbr64 *p_bpb;	399	struct pbr64 *p_bpb;
411	struct buffer_head *bh;
412	struct exfat_sb_info *sbi = EXFAT_SB(sb);	400	struct exfat_sb_info *sbi = EXFAT_SB(sb);
413		401
414	/* set block size to read super block */	402	/* set block size to read super block */
415	sb_min_blocksize(sb, 512);	403	sb_min_blocksize(sb, 512);
416		404
417	/* read boot sector */	405	/* read boot sector */
418	bh = sb_bread(sb, 0);	406	sbi->pbr_bh = sb_bread(sb, 0);
419	if (!bh) {	407	if (!sbi->pbr_bh) {
420	exfat_msg(sb, KERN_ERR, "unable to read boot sector");	408	exfat_msg(sb, KERN_ERR, "unable to read boot sector");
421	return -EIO;	409	return -EIO;
422	}	410	}
423		411
424	/* PRB is read */	412	/* PRB is read */
425	p_pbr = (struct pbr *)bh->b_data;	413	p_pbr = (struct pbr *)sbi->pbr_bh->b_data;
426		414
427	/* check the validity of PBR */	415	/* check the validity of PBR */
428	if (le16_to_cpu((p_pbr->signature)) != PBR_SIGNATURE) {	416	if (le16_to_cpu((p_pbr->signature)) != PBR_SIGNATURE) {
@@ -433,7 +421,7 @@ static int __exfat_fill_super(struct super_block *sb) · 4 unmodified lines
433		421
434		422
435	/* check logical sector size */	423	/* check logical sector size */
436	p_pbr = exfat_read_pbr_with_logical_sector(sb, &bh);	424	p_pbr = exfat_read_pbr_with_logical_sector(sb);
437	if (!p_pbr) {	425	if (!p_pbr) {
438	ret = -EIO;	426	ret = -EIO;
439	goto free_bh;	427	goto free_bh;
@@ -514,7 +502,7 @@ free_alloc_bitmap: · 74 unmodified lines
514	free_upcase_table:	502	free_upcase_table:
515	exfat_free_upcase_table(sbi);	503	exfat_free_upcase_table(sbi);
516	free_bh:	504	free_bh:
517	brelse(bh);	505	brelse(sbi->pbr_bh);
518	return ret;	506	return ret;
519	}	507	}
520		508
@@ -531,17 +519,18 @@ static int exfat_fill_super(struct super_block sb, struct fs_context fc) · 10 unmodified lines
531	if (opts->discard) {	519	if (opts->discard) {
532	struct request_queue *q = bdev_get_queue(sb->s_bdev);	520	struct request_queue *q = bdev_get_queue(sb->s_bdev);
533		521
534	if (!blk_queue_discard(q))	522	if (!blk_queue_discard(q)) {
535	exfat_msg(sb, KERN_WARNING,	523	exfat_msg(sb, KERN_WARNING,
536	"mounting with \"discard\" option, but the device does not support discard");	524	"mounting with \"discard\" option, but the device does not support discard");
537	opts->discard = 0;	525	opts->discard = 0;
		526	}
538	}	527	}
539		528
540	sb->s_flags \|= SB_NODIRATIME;	529	sb->s_flags \|= SB_NODIRATIME;
541	sb->s_magic = EXFAT_SUPER_MAGIC;	530	sb->s_magic = EXFAT_SUPER_MAGIC;
542	sb->s_op = &exfat_sops;	531	sb->s_op = &exfat_sops;
543		532
544	sb->s_time_gran = 1;	533	sb->s_time_gran = 10 * NSEC_PER_MSEC;
545	sb->s_time_min = EXFAT_MIN_TIMESTAMP_SECS;	534	sb->s_time_min = EXFAT_MIN_TIMESTAMP_SECS;
546	sb->s_time_max = EXFAT_MAX_TIMESTAMP_SECS;	535	sb->s_time_max = EXFAT_MAX_TIMESTAMP_SECS;
547		536
@@ -605,6 +594,7 @@ put_inode: · 57 unmodified lines
605	free_table:	594	free_table:
606	exfat_free_upcase_table(sbi);	595	exfat_free_upcase_table(sbi);
607	exfat_free_bitmap(sbi);	596	exfat_free_bitmap(sbi);
		597	brelse(sbi->pbr_bh);
608		598
609	check_nls_io:	599	check_nls_io:
610	unload_nls(sbi->nls_io);	600	unload_nls(sbi->nls_io);
@@ -717,6 +707,7 @@ static void __exit exit_exfat_fs(void) · 106 unmodified lines
717	module_init(init_exfat_fs);	707	module_init(init_exfat_fs);
718	module_exit(exit_exfat_fs);	708	module_exit(exit_exfat_fs);
719		709
		710	MODULE_ALIAS_FS("exfat");
720	MODULE_LICENSE("GPL");	711	MODULE_LICENSE("GPL");
721	MODULE_DESCRIPTION("exFAT filesystem support");	712	MODULE_DESCRIPTION("exFAT filesystem support");
722	MODULE_AUTHOR("Samsung Electronics Co., Ltd.");	713	MODULE_AUTHOR("Samsung Electronics Co., Ltd.");

fs/io_uring.c+58−75

 	REQ_F_OVERFLOW_BIT,
 	REQ_F_POLLED_BIT,
 	REQ_F_BUFFER_SELECTED_BIT,
+	REQ_F_NO_FILE_TABLE_BIT,
 	/* not a real bit, just to check we're not overflowing the space */
 	__REQ_F_LAST_BIT,
 	REQ_F_POLLED		= BIT(REQ_F_POLLED_BIT),
 	/* buffer already selected */
 	REQ_F_BUFFER_SELECTED	= BIT(REQ_F_BUFFER_SELECTED_BIT),
+	/* doesn't need file table for this request */
+	REQ_F_NO_FILE_TABLE	= BIT(REQ_F_NO_FILE_TABLE_BIT),
 };
 struct async_poll {
 	unsigned		needs_mm : 1;
 	/* needs req->file assigned */
 	unsigned		needs_file : 1;
-	/* needs req->file assigned IFF fd is >= 0 */
-	unsigned		fd_non_neg : 1;
 	/* hash wq insertion if file is a regular file */
 	unsigned		hash_reg_file : 1;
 	/* unbound wq insertion if file is a non-regular file */
 		.needs_file		= 1,
 	},
 	[IORING_OP_OPENAT] = {
-		.needs_file		= 1,
-		.fd_non_neg		= 1,
 		.file_table		= 1,
 		.needs_fs		= 1,
 	},
 	},
 	[IORING_OP_STATX] = {
 		.needs_mm		= 1,
-		.needs_file		= 1,
-		.fd_non_neg		= 1,
 		.needs_fs		= 1,
+		.file_table		= 1,
 	},
 	[IORING_OP_READ] = {
 		.needs_mm		= 1,
 		.buffer_select		= 1,
 	},
 	[IORING_OP_OPENAT2] = {
-		.needs_file		= 1,
-		.fd_non_neg		= 1,
 		.file_table		= 1,
 		.needs_fs		= 1,
 	},
 	struct io_kiocb *req;
 	req = ctx->fallback_req;
-	if (!test_and_set_bit_lock(0, (unsigned long *) ctx->fallback_req))
+	if (!test_and_set_bit_lock(0, (unsigned long *) &ctx->fallback_req))
 		return req;
 	return NULL;
 	if (likely(!io_is_fallback_req(req)))
 		kmem_cache_free(req_cachep, req);
 	else
-		clear_bit_unlock(0, (unsigned long *) req->ctx->fallback_req);
+		clear_bit_unlock(0, (unsigned long *) &req->ctx->fallback_req);
 }
 struct req_batch {
  * any file. For now, just ensure that anything potentially problematic is done
  * inline.
  */
-static bool io_file_supports_async(struct file *file)
+static bool io_file_supports_async(struct file *file, int rw)
 {
 	umode_t mode = file_inode(file)->i_mode;
 	if (S_ISREG(mode) && file->f_op != &io_uring_fops)
 		return true;
-	return false;
+	if (!(file->f_mode & FMODE_NOWAIT))
+		return false;
+	if (rw == READ)
+		return file->f_op->read_iter != NULL;
+	return file->f_op->write_iter != NULL;
 }
 static int io_prep_rw(struct io_kiocb *req, const struct io_uring_sqe *sqe,
 	 * If the file doesn't support async, mark it as REQ_F_MUST_PUNT so
 	 * we know to async punt it even if it was opened O_NONBLOCK
 	 */
-	if (force_nonblock && !io_file_supports_async(req->file))
+	if (force_nonblock && !io_file_supports_async(req->file, READ))
 		goto copy_iov;
 	iov_count = iov_iter_count(&iter);
 			if (ret)
 				goto out_free;
 			/* any defer here is final, must blocking retry */
-			if (!(req->flags & REQ_F_NOWAIT))
+			if (!(req->flags & REQ_F_NOWAIT) &&
+			    !file_can_poll(req->file))
 				req->flags |= REQ_F_MUST_PUNT;
 			return -EAGAIN;
 		}
 	 * If the file doesn't support async, mark it as REQ_F_MUST_PUNT so
 	 * we know to async punt it even if it was opened O_NONBLOCK
 	 */
-	if (force_nonblock && !io_file_supports_async(req->file))
+	if (force_nonblock && !io_file_supports_async(req->file, WRITE))
 		goto copy_iov;
 	/* file path doesn't support NOWAIT for non-direct_IO */
 			if (ret)
 				goto out_free;
 			/* any defer here is final, must blocking retry */
-			req->flags |= REQ_F_MUST_PUNT;
+			if (!file_can_poll(req->file))
+				req->flags |= REQ_F_MUST_PUNT;
 			return -EAGAIN;
 		}
 	}
 	return 0;
 }
-static bool io_splice_punt(struct file *file)
-{
-	if (get_pipe_info(file))
-		return false;
-	if (!io_file_supports_async(file))
-		return true;
-	return !(file->f_flags & O_NONBLOCK);
-}
 static int io_splice(struct io_kiocb *req, bool force_nonblock)
 {
 	struct io_splice *sp = &req->splice;
 	loff_t *poff_in, *poff_out;
 	long ret;
-	if (force_nonblock) {
+	if (force_nonblock)
-		if (io_splice_punt(in) || io_splice_punt(out))
+		return -EAGAIN;
-			return -EAGAIN;
-		flags |= SPLICE_F_NONBLOCK;
-	}
 	poff_in = (sp->off_in == -1) ? NULL : &sp->off_in;
 	poff_out = (sp->off_out == -1) ? NULL : &sp->off_out;
 	struct kstat stat;
 	int ret;
-	if (force_nonblock)
+	if (force_nonblock) {
+		/* only need file table for an actual valid fd */
+		if (ctx->dfd == -1 || ctx->dfd == AT_FDCWD)
+			req->flags |= REQ_F_NO_FILE_TABLE;
 		return -EAGAIN;
+	}
 	if (vfs_stat_set_lookup_flags(&lookup_flags, ctx->how.flags))
 		return -EINVAL;
 	if (io_req_cancelled(req))
 		return;
 	__io_sync_file_range(req);
-	io_put_req(req); /* put submission ref */
+	io_steal_work(req, workptr);
 }
 static int io_sync_file_range(struct io_kiocb *req, bool force_nonblock)
 	spin_unlock_irq(&ctx->completion_lock);
+	/* restore ->work in case we need to retry again */
+	memcpy(&req->work, &apoll->work, sizeof(req->work));
 	if (canceled) {
 		kfree(apoll);
 		io_cqring_ev_posted(ctx);
 		req_set_fail_links(req);
-		io_put_req(req);
+		io_double_put_req(req);
 		return;
 	}
-	/* restore ->work in case we need to retry again */
-	memcpy(&req->work, &apoll->work, sizeof(req->work));
 	__set_current_state(TASK_RUNNING);
 	mutex_lock(&ctx->uring_lock);
 	__io_queue_sqe(req, NULL);
 	hash_del(&req->hash_node);
-	if (apoll) {
+	if (do_complete && apoll) {
 		/*
 		 * restore ->work because we need to call io_req_work_drop_env.
 		 */
 	int ret;
 	/* Still need defer if there is pending req in defer list. */
-	if (!req_need_defer(req) && list_empty(&ctx->defer_list))
+	if (!req_need_defer(req) && list_empty_careful(&ctx->defer_list))
 		return 0;
 	if (!req->io && io_alloc_async_ctx(req))
 	io_steal_work(req, workptr);
 }
-static int io_req_needs_file(struct io_kiocb *req, int fd)
-{
-	if (!io_op_defs[req->opcode].needs_file)
-		return 0;
-	if ((fd == -1 || fd == AT_FDCWD) && io_op_defs[req->opcode].fd_non_neg)
-		return 0;
-	return 1;
-}
 static inline struct file *io_file_from_index(struct io_ring_ctx *ctx,
 					      int index)
 {
 }
 static int io_req_set_file(struct io_submit_state *state, struct io_kiocb *req,
-			   int fd, unsigned int flags)
+			   int fd)
 {
 	bool fixed;
-	if (!io_req_needs_file(req, fd))
+	fixed = (req->flags & REQ_F_FIXED_FILE) != 0;
-		return 0;
-	fixed = (flags & IOSQE_FIXED_FILE);
 	if (unlikely(!fixed && req->needs_fixed_file))
 		return -EBADF;
 	int ret = -EBADF;
 	struct io_ring_ctx *ctx = req->ctx;
-	if (req->work.files)
+	if (req->work.files || (req->flags & REQ_F_NO_FILE_TABLE))
 		return 0;
 	if (!ctx->ring_file)
 		return -EBADF;
 		       struct io_submit_state *state, bool async)
 {
 	unsigned int sqe_flags;
-	int id, fd;
+	int id;
 	/*
 	 * All io need record the previous position, if LINK vs DARIN,
 					IOSQE_ASYNC | IOSQE_FIXED_FILE |
 					IOSQE_BUFFER_SELECT | IOSQE_IO_LINK);
-	fd = READ_ONCE(sqe->fd);
+	if (!io_op_defs[req->opcode].needs_file)
-	return io_req_set_file(state, req, fd, sqe_flags);
+		return 0;
+	return io_req_set_file(state, req, READ_ONCE(sqe->fd));
 }
 static int io_submit_sqes(struct io_ring_ctx *ctx, unsigned int nr,
 	 * it could cause shutdown to hang.
 	 */
 	while (ctx->sqo_thread && !wq_has_sleeper(&ctx->sqo_wait))
-		cpu_relax();
+		cond_resched();
 	io_kill_timeouts(ctx);
 	io_poll_remove_all(ctx);
 static void io_uring_cancel_files(struct io_ring_ctx *ctx,
 				  struct files_struct *files)
 {
-	struct io_kiocb *req;
-	DEFINE_WAIT(wait);
 	while (!list_empty_careful(&ctx->inflight_list)) {
-		struct io_kiocb *cancel_req = NULL;
+		struct io_kiocb *cancel_req = NULL, *req;
+		DEFINE_WAIT(wait);
 		spin_lock_irq(&ctx->inflight_lock);
 		list_for_each_entry(req, &ctx->inflight_list, inflight_entry) {
 			 */
 			if (refcount_sub_and_test(2, &cancel_req->refs)) {
 				io_put_req(cancel_req);
+				finish_wait(&ctx->inflight_wait, &wait);
 				continue;
 			}
 		}
 		io_wq_cancel_work(ctx->io_wq, &cancel_req->work);
 		io_put_req(cancel_req);
 		schedule();
+		finish_wait(&ctx->inflight_wait, &wait);
 	}
-	finish_wait(&ctx->inflight_wait, &wait);
 }
 static int io_uring_flush(struct file *file, void *data)
 	return ret;
 }
-static int io_uring_create(unsigned entries, struct io_uring_params *p)
+static int io_uring_create(unsigned entries, struct io_uring_params *p,
+			   struct io_uring_params __user *params)
 {
 	struct user_struct *user = NULL;
 	struct io_ring_ctx *ctx;
 	p->cq_off.overflow = offsetof(struct io_rings, cq_overflow);
 	p->cq_off.cqes = offsetof(struct io_rings, cqes);
+	p->features = IORING_FEAT_SINGLE_MMAP | IORING_FEAT_NODROP |
+			IORING_FEAT_SUBMIT_STABLE | IORING_FEAT_RW_CUR_POS |
+			IORING_FEAT_CUR_PERSONALITY | IORING_FEAT_FAST_POLL;
+	if (copy_to_user(params, p, sizeof(*p))) {
+		ret = -EFAULT;
+		goto err;
+	}
 	/*
 	 * Install ring fd as the very last thing, so we don't risk someone
 	 * having closed it before we finish setup
 	if (ret < 0)
 		goto err;
-	p->features = IORING_FEAT_SINGLE_MMAP | IORING_FEAT_NODROP |
-			IORING_FEAT_SUBMIT_STABLE | IORING_FEAT_RW_CUR_POS |
-			IORING_FEAT_CUR_PERSONALITY | IORING_FEAT_FAST_POLL;
 	trace_io_uring_create(ret, ctx, p->sq_entries, p->cq_entries, p->flags);
 	return ret;
 err:
 static long io_uring_setup(u32 entries, struct io_uring_params __user *params)
 {
 	struct io_uring_params p;
-	long ret;
 	int i;
 	if (copy_from_user(&p, params, sizeof(p)))
 			IORING_SETUP_CLAMP | IORING_SETUP_ATTACH_WQ))
 		return -EINVAL;
-	ret = io_uring_create(entries, &p);
+	return  io_uring_create(entries, &p, params);
-	if (ret < 0)
-		return ret;
-	if (copy_to_user(params, &p, sizeof(p)))
-		return -EFAULT;
-	return ret;
 }
 SYSCALL_DEFINE2(io_uring_setup, u32, entries,

fs/ioctl.c+8−0

 static int ioctl_fibmap(struct file *filp, int __user *p)
 {
 	struct inode *inode = file_inode(filp);
+	struct super_block *sb = inode->i_sb;
 	int error, ur_block;
 	sector_t block;
 	block = ur_block;
 	error = bmap(inode, &block);
+	if (block > INT_MAX) {
+		error = -ERANGE;
+		pr_warn_ratelimited("[%s/%d] FS: %s File: %pD4 would truncate fibmap result\n",
+				    current->comm, task_pid_nr(current),
+				    sb->s_id, filp);
+	}
 	if (error)
 		ur_block = 0;
 	else

fs/iomap/fiemap.c+1−4

 	if (iomap->type == IOMAP_MAPPED) {
 		addr = (pos - iomap->offset + iomap->addr) >> inode->i_blkbits;
-		if (addr > INT_MAX)
+		*bno = addr;
-			WARN(1, "would truncate bmap result\n");
-		else
-			*bno = addr;
 	}
 	return 0;
 }

fs/nfs/nfs3acl.c+15−7

 int nfs3_set_acl(struct inode *inode, struct posix_acl *acl, int type)
 {
-	struct posix_acl *alloc = NULL, *dfacl = NULL;
+	struct posix_acl *orig = acl, *dfacl = NULL, *alloc;
 	int status;
 	if (S_ISDIR(inode->i_mode)) {
 		switch(type) {
 		case ACL_TYPE_ACCESS:
-			alloc = dfacl = get_acl(inode, ACL_TYPE_DEFAULT);
+			alloc = get_acl(inode, ACL_TYPE_DEFAULT);
 			if (IS_ERR(alloc))
 				goto fail;
+			dfacl = alloc;
 			break;
 		case ACL_TYPE_DEFAULT:
-			dfacl = acl;
+			alloc = get_acl(inode, ACL_TYPE_ACCESS);
-			alloc = acl = get_acl(inode, ACL_TYPE_ACCESS);
 			if (IS_ERR(alloc))
 				goto fail;
+			dfacl = acl;
+			acl = alloc;
 			break;
 		}
 	}
 	if (acl == NULL) {
-		alloc = acl = posix_acl_from_mode(inode->i_mode, GFP_KERNEL);
+		alloc = posix_acl_from_mode(inode->i_mode, GFP_KERNEL);
 		if (IS_ERR(alloc))
 			goto fail;
+		acl = alloc;
 	}
 	status = __nfs3_proc_setacls(inode, acl, dfacl);
-	posix_acl_release(alloc);
+out:
+	if (acl != orig)
+		posix_acl_release(acl);
+	if (dfacl != orig)
+		posix_acl_release(dfacl);
 	return status;
 fail:
-	return PTR_ERR(alloc);
+	status = PTR_ERR(alloc);
+	goto out;
 }
 const struct xattr_handler *nfs3_xattr_handlers[] = {

fs/nfs/nfs4proc.c+9−2

@@ -7891,6 +7891,7 @@ static void · 7890 unmodified lines
7891	nfs4_bind_one_conn_to_session_done(struct rpc_task task, void calldata)	7891	nfs4_bind_one_conn_to_session_done(struct rpc_task task, void calldata)
7892	{	7892	{
7893	struct nfs41_bind_conn_to_session_args *args = task->tk_msg.rpc_argp;	7893	struct nfs41_bind_conn_to_session_args *args = task->tk_msg.rpc_argp;
		7894	struct nfs41_bind_conn_to_session_res *res = task->tk_msg.rpc_resp;
7894	struct nfs_client *clp = args->client;	7895	struct nfs_client *clp = args->client;
7895		7896
7896	switch (task->tk_status) {	7897	switch (task->tk_status) {
@@ -7899,6 +7900,12 @@ nfs4_bind_one_conn_to_session_done(struct rpc_task task, void calldata) · 2 unmodified lines
7899	nfs4_schedule_session_recovery(clp->cl_session,	7900	nfs4_schedule_session_recovery(clp->cl_session,
7900	task->tk_status);	7901	task->tk_status);
7901	}	7902	}
		7903	if (args->dir == NFS4_CDFC4_FORE_OR_BOTH &&
		7904	res->dir != NFS4_CDFS4_BOTH) {
		7905	rpc_task_close_connection(task);
		7906	if (args->retries++ < MAX_BIND_CONN_TO_SESSION_RETRIES)
		7907	rpc_restart_call(task);
		7908	}
7902	}	7909	}
7903		7910
7904	static const struct rpc_call_ops nfs4_bind_one_conn_to_session_ops = {	7911	static const struct rpc_call_ops nfs4_bind_one_conn_to_session_ops = {
@@ -7921,6 +7928,7 @@ int nfs4_proc_bind_one_conn_to_session(struct rpc_clnt *clnt, · 16 unmodified lines
7921	struct nfs41_bind_conn_to_session_args args = {	7928	struct nfs41_bind_conn_to_session_args args = {
7922	.client = clp,	7929	.client = clp,
7923	.dir = NFS4_CDFC4_FORE_OR_BOTH,	7930	.dir = NFS4_CDFC4_FORE_OR_BOTH,
		7931	.retries = 0,
7924	};	7932	};
7925	struct nfs41_bind_conn_to_session_res res;	7933	struct nfs41_bind_conn_to_session_res res;
7926	struct rpc_message msg = {	7934	struct rpc_message msg = {
@@ -9191,8 +9199,7 @@ nfs4_proc_layoutget(struct nfs4_layoutget lgp, long timeout) · 1264 unmodified lines
9191	nfs4_init_sequence(&lgp->args.seq_args, &lgp->res.seq_res, 0, 0);	9199	nfs4_init_sequence(&lgp->args.seq_args, &lgp->res.seq_res, 0, 0);
9192		9200
9193	task = rpc_run_task(&task_setup_data);	9201	task = rpc_run_task(&task_setup_data);
9194	if (IS_ERR(task))	9202
9195	return ERR_CAST(task);
9196	status = rpc_wait_for_completion_task(task);	9203	status = rpc_wait_for_completion_task(task);
9197	if (status != 0)	9204	if (status != 0)
9198	goto out;	9205	goto out;

fs/nfs/pnfs.c+5−6

 			!valid_layout) {
 		spin_unlock(&ino->i_lock);
 		dprintk("NFS: %s no layout segments to return\n", __func__);
-		goto out_put_layout_hdr;
+		goto out_wait_layoutreturn;
 	}
 	send = pnfs_prepare_layoutreturn(lo, &stateid, &cred, NULL);
 	spin_unlock(&ino->i_lock);
 	if (send)
 		status = pnfs_send_layoutreturn(lo, &stateid, &cred, IOMODE_ANY, true);
+out_wait_layoutreturn:
+	wait_on_bit(&lo->plh_flags, NFS_LAYOUT_RETURN, TASK_UNINTERRUPTIBLE);
 out_put_layout_hdr:
 	pnfs_free_lseg_list(&tmp_list);
 	pnfs_put_layout_hdr(lo);
 	/* lo ref dropped in pnfs_roc_release() */
 	layoutreturn = pnfs_prepare_layoutreturn(lo, &stateid, &lc_cred, &iomode);
 	/* If the creds don't match, we can't compound the layoutreturn */
-	if (!layoutreturn)
+	if (!layoutreturn || cred_fscmp(cred, lc_cred) != 0)
 		goto out_noroc;
-	if (cred_fscmp(cred, lc_cred) != 0)
-		goto out_noroc_put_cred;
 	roc = layoutreturn;
 	pnfs_init_layoutreturn_args(args, lo, &stateid, iomode);
 	res->lrs_present = 0;
 	layoutreturn = false;
-out_noroc_put_cred:
 	put_cred(lc_cred);
 out_noroc:
 	spin_unlock(&ino->i_lock);
 	rcu_read_unlock();

fs/nfs/super.c+1−1

@@ -185,7 +185,7 @@ static int __nfs_list_for_each_server(struct list_head *head, · 184 unmodified lines
185		185
186	rcu_read_lock();	186	rcu_read_lock();
187	list_for_each_entry_rcu(server, head, client_link) {	187	list_for_each_entry_rcu(server, head, client_link) {
188	if (!nfs_sb_active(server->super))	188	if (!(server->super && nfs_sb_active(server->super)))
189	continue;	189	continue;
190	rcu_read_unlock();	190	rcu_read_unlock();
191	if (last)	191	if (last)

fs/nfsd/nfs4callback.c+3−1

 		container_of(work, struct nfsd4_callback, cb_work);
 	struct nfs4_client *clp = cb->cb_clp;
 	struct rpc_clnt *clnt;
+	int flags;
 	if (cb->cb_need_restart) {
 		cb->cb_need_restart = false;
 	}
 	cb->cb_msg.rpc_cred = clp->cl_cb_cred;
-	rpc_call_async(clnt, &cb->cb_msg, RPC_TASK_SOFT | RPC_TASK_SOFTCONN,
+	flags = clp->cl_minorversion ? RPC_TASK_NOCONNECT : RPC_TASK_SOFTCONN;
+	rpc_call_async(clnt, &cb->cb_msg, RPC_TASK_SOFT | flags,
 			cb->cb_ops ? &nfsd4_cb_ops : &nfsd4_cb_probe_ops, cb);
 }

fs/nfsd/nfs4state.c+2−0

 	if (!nbl) {
 		nbl= kmalloc(sizeof(*nbl), GFP_KERNEL);
 		if (nbl) {
+			INIT_LIST_HEAD(&nbl->nbl_list);
+			INIT_LIST_HEAD(&nbl->nbl_lru);
 			fh_copy_shallow(&nbl->nbl_fh, fh);
 			locks_init_lock(&nbl->nbl_lock);
 			nfsd4_init_cb(&nbl->nbl_cb, lo->lo_owner.so_client,

fs/ocfs2/dlmfs/dlmfs.c+12−15

 				loff_t *ppos)
 {
 	int bytes_left;
-	ssize_t writelen;
 	char *lvb_buf;
 	struct inode *inode = file_inode(filp);
 	if (*ppos >= i_size_read(inode))
 		return -ENOSPC;
+	/* don't write past the lvb */
+	if (count > i_size_read(inode) - *ppos)
+		count = i_size_read(inode) - *ppos;
 	if (!count)
 		return 0;
 	if (!access_ok(buf, count))
 		return -EFAULT;
-	/* don't write past the lvb */
+	lvb_buf = kmalloc(count, GFP_NOFS);
-	if ((count + *ppos) > i_size_read(inode))
-		writelen = i_size_read(inode) - *ppos;
-	else
-		writelen = count - *ppos;
-	lvb_buf = kmalloc(writelen, GFP_NOFS);
 	if (!lvb_buf)
 		return -ENOMEM;
-	bytes_left = copy_from_user(lvb_buf, buf, writelen);
+	bytes_left = copy_from_user(lvb_buf, buf, count);
-	writelen -= bytes_left;
+	count -= bytes_left;
-	if (writelen)
+	if (count)
-		user_dlm_write_lvb(inode, lvb_buf, writelen);
+		user_dlm_write_lvb(inode, lvb_buf, count);
 	kfree(lvb_buf);
-	*ppos = *ppos + writelen;
+	*ppos = *ppos + count;
-	mlog(0, "wrote %zd bytes\n", writelen);
+	mlog(0, "wrote %zu bytes\n", count);
-	return writelen;
+	return count;
 }
 static void dlmfs_init_once(void *foo)

fs/pnode.c+4−5

 	child = copy_tree(last_source, last_source->mnt.mnt_root, type);
 	if (IS_ERR(child))
 		return PTR_ERR(child);
+	read_seqlock_excl(&mount_lock);
 	mnt_set_mountpoint(m, mp, child);
+	if (m->mnt_master != dest_master)
+		SET_MNT_MARK(m->mnt_master);
+	read_sequnlock_excl(&mount_lock);
 	last_dest = m;
 	last_source = child;
-	if (m->mnt_master != dest_master) {
-		read_seqlock_excl(&mount_lock);
-		SET_MNT_MARK(m->mnt_master);
-		read_sequnlock_excl(&mount_lock);
-	}
 	hlist_add_head(&child->mnt_hash, list);
 	return count_mounts(m->mnt_ns, child);
 }

fs/proc/base.c+0−1

@@ -3286,7 +3286,6 @@ static const struct inode_operations proc_tgid_base_inode_operations = { · 3285 unmodified lines
3286	void proc_flush_pid(struct pid *pid)	3286	void proc_flush_pid(struct pid *pid)
3287	{	3287	{
3288	proc_invalidate_siblings_dcache(&pid->inodes, &pid->lock);	3288	proc_invalidate_siblings_dcache(&pid->inodes, &pid->lock);
3289	put_pid(pid);
3290	}	3289	}
3291		3290
3292	static struct dentry proc_pid_instantiate(struct dentry dentry,	3291	static struct dentry proc_pid_instantiate(struct dentry dentry,

fs/proc/vmcore.c+3−2

 		if (start < offset + dump->size) {
 			tsz = min(offset + (u64)dump->size - start, (u64)size);
 			buf = dump->buf + start - offset;
-			if (remap_vmalloc_range_partial(vma, dst, buf, tsz)) {
+			if (remap_vmalloc_range_partial(vma, dst, buf, 0,
+							tsz)) {
 				ret = -EFAULT;
 				goto out_unlock;
 			}
 		tsz = min(elfcorebuf_sz + elfnotes_sz - (size_t)start, size);
 		kaddr = elfnotes_buf + start - elfcorebuf_sz - vmcoredd_orig_sz;
 		if (remap_vmalloc_range_partial(vma, vma->vm_start + len,
-						kaddr, tsz))
+						kaddr, 0, tsz))
 			goto fail;
 		size -= tsz;

fs/splice.c+18−27

 	loff_t offset;
 	long ret;
+	if (unlikely(!(in->f_mode & FMODE_READ) ||
+		     !(out->f_mode & FMODE_WRITE)))
+		return -EBADF;
 	ipipe = get_pipe_info(in);
 	opipe = get_pipe_info(out);
 		if (off_in || off_out)
 			return -ESPIPE;
-		if (!(in->f_mode & FMODE_READ))
-			return -EBADF;
-		if (!(out->f_mode & FMODE_WRITE))
-			return -EBADF;
 		/* Splicing to self would be fun, but... */
 		if (ipipe == opipe)
 			return -EINVAL;
 			offset = out->f_pos;
 		}
-		if (unlikely(!(out->f_mode & FMODE_WRITE)))
-			return -EBADF;
 		if (unlikely(out->f_flags & O_APPEND))
 			return -EINVAL;
 	error = -EBADF;
 	in = fdget(fd_in);
 	if (in.file) {
-		if (in.file->f_mode & FMODE_READ) {
+		out = fdget(fd_out);
-			out = fdget(fd_out);
+		if (out.file) {
-			if (out.file) {
+			error = do_splice(in.file, off_in, out.file, off_out,
-				if (out.file->f_mode & FMODE_WRITE)
+					  len, flags);
-					error = do_splice(in.file, off_in,
+			fdput(out);
-							  out.file, off_out,
-							  len, flags);
-				fdput(out);
-			}
 		}
 		fdput(in);
 	}
 	struct pipe_inode_info *opipe = get_pipe_info(out);
 	int ret = -EINVAL;
+	if (unlikely(!(in->f_mode & FMODE_READ) ||
+		     !(out->f_mode & FMODE_WRITE)))
+		return -EBADF;
 	/*
 	 * Duplicate the contents of ipipe to opipe without actually
 	 * copying the data.
 SYSCALL_DEFINE4(tee, int, fdin, int, fdout, size_t, len, unsigned int, flags)
 {
-	struct fd in;
+	struct fd in, out;
 	int error;
 	if (unlikely(flags & ~SPLICE_F_ALL))
 	error = -EBADF;
 	in = fdget(fdin);
 	if (in.file) {
-		if (in.file->f_mode & FMODE_READ) {
+		out = fdget(fdout);
-			struct fd out = fdget(fdout);
+		if (out.file) {
-			if (out.file) {
+			error = do_tee(in.file, out.file, len, flags);
-				if (out.file->f_mode & FMODE_WRITE)
+			fdput(out);
-					error = do_tee(in.file, out.file,
-							len, flags);
-				fdput(out);
-			}
 		}
  		fdput(in);
  	}

fs/super.c+1−1

 	mutex_lock(&bdev->bd_fsfreeze_mutex);
 	if (bdev->bd_fsfreeze_count > 0) {
 		mutex_unlock(&bdev->bd_fsfreeze_mutex);
-		blkdev_put(bdev, mode);
 		warnf(fc, "%pg: Can't mount, blockdev is frozen", bdev);
+		blkdev_put(bdev, mode);
 		return -EBUSY;
 	}

fs/vboxsf/super.c+1−1

@@ -164,7 +164,7 @@ static int vboxsf_fill_super(struct super_block sb, struct fs_context fc) · 163 unmodified lines
164	goto fail_free;	164	goto fail_free;
165	}	165	}
166		166
167	err = super_setup_bdi_name(sb, "vboxsf-%s.%d", fc->source, sbi->bdi_id);	167	err = super_setup_bdi_name(sb, "vboxsf-%d", sbi->bdi_id);
168	if (err)	168	if (err)
169	goto fail_free;	169	goto fail_free;
170		170

include/asm-generic/Kbuild+1−0

@@ -56,6 +56,7 @@ mandatory-y += topology.h · 55 unmodified lines
56	mandatory-y += trace_clock.h	56	mandatory-y += trace_clock.h
57	mandatory-y += uaccess.h	57	mandatory-y += uaccess.h
58	mandatory-y += unaligned.h	58	mandatory-y += unaligned.h
		59	mandatory-y += vermagic.h
59	mandatory-y += vga.h	60	mandatory-y += vga.h
60	mandatory-y += word-at-a-time.h	61	mandatory-y += word-at-a-time.h
61	mandatory-y += xor.h	62	mandatory-y += xor.h

include/asm-generic/sections.h+3−0

@@ -53,6 +53,9 @@ extern char __ctors_start[], __ctors_end[]; · 52 unmodified lines
53	/* Start and end of .opd section - used for function descriptors. */	53	/* Start and end of .opd section - used for function descriptors. */
54	extern char __start_opd[], __end_opd[];	54	extern char __start_opd[], __end_opd[];
55		55
		56	/* Start and end of instrumentation protected text section */
		57	extern char __noinstr_text_start[], __noinstr_text_end[];
		58
56	extern __visible const void __nosave_begin, __nosave_end;	59	extern __visible const void __nosave_begin, __nosave_end;
57		60
58	/* Function descriptor handling (if any). Override in asm/sections.h */	61	/* Function descriptor handling (if any). Override in asm/sections.h */

include/asm-generic/vermagic.h+7−0

@@ -0,0 +1,7 @@
	1	/* SPDX-License-Identifier: GPL-2.0-only */
	2	#ifndef _ASM_GENERIC_VERMAGIC_H
	3	#define _ASM_GENERIC_VERMAGIC_H
	4
	5	#define MODULE_ARCH_VERMAGIC ""
	6
	7	#endif /* _ASM_GENERIC_VERMAGIC_H */

include/asm-generic/vmlinux.lds.h+10−0

 	. = ALIGN((align));						\
 	__end_rodata = .;
+/*
+ * Non-instrumentable text section
+ */
+#define NOINSTR_TEXT							\
+		ALIGN_FUNCTION();					\
+		__noinstr_text_start = .;				\
+		*(.noinstr.text)					\
+		__noinstr_text_end = .;
 /*
  * .text section. Map to function alignment to avoid address changes
  * during second ld run in second ld pass when generating System.map
 #define TEXT_TEXT							\
 		ALIGN_FUNCTION();					\
 		*(.text.hot TEXT_MAIN .text.fixup .text.unlikely)	\
+		NOINSTR_TEXT						\
 		*(.text..refcount)					\
 		*(.ref.text)						\
 	MEM_KEEP(init.text*)						\

include/linux/amba/bus.h+1−0

@@ -65,6 +65,7 @@ struct amba_device { · 64 unmodified lines
65	struct device dev;	65	struct device dev;
66	struct resource res;	66	struct resource res;
67	struct clk *pclk;	67	struct clk *pclk;
		68	struct device_dma_parameters dma_parms;
68	unsigned int periphid;	69	unsigned int periphid;
69	unsigned int cid;	70	unsigned int cid;
70	struct amba_cs_uci_id uci;	71	struct amba_cs_uci_id uci;

include/linux/backing-dev-defs.h+1−1

 	WB_REASON_SYNC,
 	WB_REASON_PERIODIC,
 	WB_REASON_LAPTOP_TIMER,
-	WB_REASON_FREE_MORE_MEM,
 	WB_REASON_FS_FREE_SPACE,
 	/*
 	 * There is no bdi forker thread any more and works are done
 	wait_queue_head_t wb_waitq;
 	struct device *dev;
+	char dev_name[64];
 	struct device *owner;
 	struct timer_list laptop_mode_wb_timer;

include/linux/backing-dev.h+1−8

@@ -505,13 +505,6 @@ static inline int bdi_rw_congested(struct backing_dev_info *bdi) · 504 unmodified lines
505	(1 << WB_async_congested));	505	(1 << WB_async_congested));
506	}	506	}
507		507
508	extern const char *bdi_unknown_name;	508	const char bdi_dev_name(struct backing_dev_info bdi);
509
510	static inline const char bdi_dev_name(struct backing_dev_info bdi)
511	{
512	if (!bdi \|\| !bdi->dev)
513	return bdi_unknown_name;
514	return dev_name(bdi->dev);
515	}
516		509
517	#endif /* _LINUX_BACKING_DEV_H */	510	#endif /* _LINUX_BACKING_DEV_H */

include/linux/compiler.h+53−0

@@ -120,12 +120,65 @@ void ftrace_likely_update(struct ftrace_likely_data *f, int val, · 119 unmodified lines
120	/* Annotate a C jump table to allow objtool to follow the code flow */	120	/* Annotate a C jump table to allow objtool to follow the code flow */
121	#define __annotate_jump_table __section(.rodata..c_jump_table)	121	#define __annotate_jump_table __section(.rodata..c_jump_table)
122		122
		123	#ifdef CONFIG_DEBUG_ENTRY
		124	/* Begin/end of an instrumentation safe region */
		125	#define instrumentation_begin() ({ \
		126	asm volatile("%c0:\n\t" \
		127	".pushsection .discard.instr_begin\n\t" \
		128	".long %c0b - .\n\t" \
		129	".popsection\n\t" : : "i" (__COUNTER__)); \
		130	})
		131
		132	/*
		133	* Because instrumentation_{begin,end}() can nest, objtool validation considers
		134	* _begin() a +1 and _end() a -1 and computes a sum over the instructions.
		135	* When the value is greater than 0, we consider instrumentation allowed.
		136	*
		137	* There is a problem with code like:
		138	*
		139	* noinstr void foo()
		140	* {
		141	* instrumentation_begin();
		142	* ...
		143	* if (cond) {
		144	* instrumentation_begin();
		145	* ...
		146	* instrumentation_end();
		147	* }
		148	* bar();
		149	* instrumentation_end();
		150	* }
		151	*
		152	* If instrumentation_end() would be an empty label, like all the other
		153	* annotations, the inner _end(), which is at the end of a conditional block,
		154	* would land on the instruction after the block.
		155	*
		156	* If we then consider the sum of the !cond path, we'll see that the call to
		157	* bar() is with a 0-value, even though, we meant it to happen with a positive
		158	* value.
		159	*
		160	* To avoid this, have _end() be a NOP instruction, this ensures it will be
		161	* part of the condition block and does not escape.
		162	*/
		163	#define instrumentation_end() ({ \
		164	asm volatile("%c0: nop\n\t" \
		165	".pushsection .discard.instr_end\n\t" \
		166	".long %c0b - .\n\t" \
		167	".popsection\n\t" : : "i" (__COUNTER__)); \
		168	})
		169	#endif /* CONFIG_DEBUG_ENTRY */
		170
123	#else	171	#else
124	#define annotate_reachable()	172	#define annotate_reachable()
125	#define annotate_unreachable()	173	#define annotate_unreachable()
126	#define __annotate_jump_table	174	#define __annotate_jump_table
127	#endif	175	#endif
128		176
		177	#ifndef instrumentation_begin
		178	#define instrumentation_begin() do { } while(0)
		179	#define instrumentation_end() do { } while(0)
		180	#endif
		181
129	#ifndef ASM_UNREACHABLE	182	#ifndef ASM_UNREACHABLE
130	# define ASM_UNREACHABLE	183	# define ASM_UNREACHABLE
131	#endif	184	#endif

include/linux/compiler_types.h+4−0

 #define notrace			__attribute__((__no_instrument_function__))
 #endif
+/* Section for code which can't be instrumented at all */
+#define noinstr								\
+	noinline notrace __attribute((__section__(".noinstr.text")))
 /*
  * it doesn't make sense on ARM (currently the only user of __naked)
  * to trace naked functions because then mcount is called without

include/linux/debugfs.h+4−8

 		       u8 *value);
 void debugfs_create_u16(const char *name, umode_t mode, struct dentry *parent,
 			u16 *value);
-struct dentry *debugfs_create_u32(const char *name, umode_t mode,
+void debugfs_create_u32(const char *name, umode_t mode, struct dentry *parent,
-				  struct dentry *parent, u32 *value);
+			u32 *value);
 void debugfs_create_u64(const char *name, umode_t mode, struct dentry *parent,
 			u64 *value);
 struct dentry *debugfs_create_ulong(const char *name, umode_t mode,
 static inline void debugfs_create_u16(const char *name, umode_t mode,
 				      struct dentry *parent, u16 *value) { }
-static inline struct dentry *debugfs_create_u32(const char *name, umode_t mode,
+static inline void debugfs_create_u32(const char *name, umode_t mode,
-						struct dentry *parent,
+				      struct dentry *parent, u32 *value) { }
-						u32 *value)
-{
-	return ERR_PTR(-ENODEV);
-}
 static inline void debugfs_create_u64(const char *name, umode_t mode,
 				      struct dentry *parent, u64 *value) { }

include/linux/dma-buf.h+1−2

 /**
  * struct dma_buf_attach_ops - importer operations for an attachment
- * @move_notify: [optional] notification that the DMA-buf is moving
  *
  * Attachment operations implemented by the importer.
  */
 struct dma_buf_attach_ops {
 	/**
-	 * @move_notify
+	 * @move_notify: [optional] notification that the DMA-buf is moving
 	 *
 	 * If this callback is provided the framework can avoid pinning the
 	 * backing store while mappings exists.

include/linux/dmaengine.h+6−6

 /**
  * Interleaved Transfer Request
  * ----------------------------
- * A chunk is collection of contiguous bytes to be transfered.
+ * A chunk is collection of contiguous bytes to be transferred.
  * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
- * ICGs may or maynot change between chunks.
+ * ICGs may or may not change between chunks.
  * A FRAME is the smallest series of contiguous {chunk,icg} pairs,
  *  that when repeated an integral number of times, specifies the transfer.
  * A transfer template is specification of a Frame, the number of times
  * @chan: driver channel device
  * @device: sysfs device
  * @dev_id: parent dma_device dev_id
- * @idr_ref: reference count to gate release of dma_device dev_id
  */
 struct dma_chan_dev {
 	struct dma_chan *chan;
 	struct device device;
 	int dev_id;
-	atomic_t *idr_ref;
 };
 /**
 	int dev_id;
 	struct device *dev;
 	struct module *owner;
+	struct ida chan_ida;
+	struct mutex chan_mutex;	/* to protect chan_ida */
 	u32 src_addr_widths;
 	u32 dst_addr_widths;
  * dmaengine_synchronize() needs to be called before it is safe to free
  * any memory that is accessed by previously submitted descriptors or before
  * freeing any resources accessed from within the completion callback of any
- * perviously submitted descriptors.
+ * previously submitted descriptors.
  *
  * This function can be called from atomic context as well as from within a
  * complete callback of a descriptor submitted on the same channel.
  *
  * Synchronizes to the DMA channel termination to the current context. When this
  * function returns it is guaranteed that all transfers for previously issued
- * descriptors have stopped and and it is safe to free the memory assoicated
+ * descriptors have stopped and it is safe to free the memory associated
  * with them. Furthermore it is guaranteed that all complete callback functions
  * for a previously submitted descriptor have finished running and it is safe to
  * free resources accessed from within the complete callbacks.

include/linux/fs.h+1−1

@@ -983,7 +983,7 @@ struct file_handle { · 982 unmodified lines
983	__u32 handle_bytes;	983	__u32 handle_bytes;
984	int handle_type;	984	int handle_type;
985	/* file identifier */	985	/* file identifier */
986	unsigned char f_handle[0];	986	unsigned char f_handle[];
987	};	987	};
988		988
989	static inline struct file get_file(struct file f)	989	static inline struct file get_file(struct file f)

include/linux/iio/iio.h+1−1

@@ -600,7 +600,7 @@ void iio_device_unregister(struct iio_dev *indio_dev); · 599 unmodified lines
600	* 0 on success, negative error number on failure.	600	* 0 on success, negative error number on failure.
601	*/	601	*/
602	#define devm_iio_device_register(dev, indio_dev) \	602	#define devm_iio_device_register(dev, indio_dev) \
603	__devm_iio_device_register((dev), (indio_dev), THIS_MODULE);	603	__devm_iio_device_register((dev), (indio_dev), THIS_MODULE)
604	int __devm_iio_device_register(struct device dev, struct iio_dev indio_dev,	604	int __devm_iio_device_register(struct device dev, struct iio_dev indio_dev,
605	struct module *this_mod);	605	struct module *this_mod);
606	void devm_iio_device_unregister(struct device dev, struct iio_dev indio_dev);	606	void devm_iio_device_unregister(struct device dev, struct iio_dev indio_dev);

include/linux/kvm_host.h+1−1

@@ -1048,7 +1048,7 @@ search_memslots(struct kvm_memslots *slots, gfn_t gfn) · 1047 unmodified lines
1048	start = slot + 1;	1048	start = slot + 1;
1049	}	1049	}
1050		1050
1051	if (gfn >= memslots[start].base_gfn &&	1051	if (start < slots->used_slots && gfn >= memslots[start].base_gfn &&
1052	gfn < memslots[start].base_gfn + memslots[start].npages) {	1052	gfn < memslots[start].base_gfn + memslots[start].npages) {
1053	atomic_set(&slots->lru_slot, start);	1053	atomic_set(&slots->lru_slot, start);
1054	return &memslots[start];	1054	return &memslots[start];

include/linux/lsm_hook_defs.h+1−1

@@ -55,7 +55,7 @@ LSM_HOOK(void, LSM_RET_VOID, bprm_committing_creds, struct linux_binprm *bprm) · 54 unmodified lines
55	LSM_HOOK(void, LSM_RET_VOID, bprm_committed_creds, struct linux_binprm *bprm)	55	LSM_HOOK(void, LSM_RET_VOID, bprm_committed_creds, struct linux_binprm *bprm)
56	LSM_HOOK(int, 0, fs_context_dup, struct fs_context *fc,	56	LSM_HOOK(int, 0, fs_context_dup, struct fs_context *fc,
57	struct fs_context *src_sc)	57	struct fs_context *src_sc)
58	LSM_HOOK(int, 0, fs_context_parse_param, struct fs_context *fc,	58	LSM_HOOK(int, -ENOPARAM, fs_context_parse_param, struct fs_context *fc,
59	struct fs_parameter *param)	59	struct fs_parameter *param)
60	LSM_HOOK(int, 0, sb_alloc_security, struct super_block *sb)	60	LSM_HOOK(int, 0, sb_alloc_security, struct super_block *sb)
61	LSM_HOOK(void, LSM_RET_VOID, sb_free_security, struct super_block *sb)	61	LSM_HOOK(void, LSM_RET_VOID, sb_free_security, struct super_block *sb)

include/linux/mhi.h+10−6

  * @MHI_CHAIN: Linked transfer
  */
 enum mhi_flags {
-	MHI_EOB,
+	MHI_EOB = BIT(0),
-	MHI_EOT,
+	MHI_EOT = BIT(1),
-	MHI_CHAIN,
+	MHI_CHAIN = BIT(2),
 };
 /**
  * @syserr_worker: System error worker
  * @state_event: State change event
  * @status_cb: CB function to notify power states of the device (required)
- * @link_status: CB function to query link status of the device (required)
  * @wake_get: CB function to assert device wake (optional)
  * @wake_put: CB function to de-assert device wake (optional)
  * @wake_toggle: CB function to assert and de-assert device wake (optional)
  * @runtime_get: CB function to controller runtime resume (required)
- * @runtimet_put: CB function to decrement pm usage (required)
+ * @runtime_put: CB function to decrement pm usage (required)
  * @map_single: CB function to create TRE buffer
  * @unmap_single: CB function to destroy TRE buffer
+ * @read_reg: Read a MHI register via the physical link (required)
+ * @write_reg: Write a MHI register via the physical link (required)
  * @buffer_len: Bounce buffer length
  * @bounce_buf: Use of bounce buffer
  * @fbc_download: MHI host needs to do complete image transfer (optional)
 	void (*status_cb)(struct mhi_controller *mhi_cntrl,
 			  enum mhi_callback cb);
-	int (*link_status)(struct mhi_controller *mhi_cntrl);
 	void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override);
 	void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override);
 	void (*wake_toggle)(struct mhi_controller *mhi_cntrl);
 			  struct mhi_buf_info *buf);
 	void (*unmap_single)(struct mhi_controller *mhi_cntrl,
 			     struct mhi_buf_info *buf);
+	int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
+			u32 *out);
+	void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr,
+			  u32 val);
 	size_t buffer_len;
 	bool bounce_buf;

include/linux/nfs_xdr.h+2−0

 	struct nfstime4			date;
 };
+#define MAX_BIND_CONN_TO_SESSION_RETRIES 3
 struct nfs41_bind_conn_to_session_args {
 	struct nfs_client		*client;
 	struct nfs4_sessionid		sessionid;
 	u32				dir;
 	bool				use_conn_in_rdma_mode;
+	int				retries;
 };
 struct nfs41_bind_conn_to_session_res {

include/linux/platform_data/cros_ec_sensorhub.h+1−0

@@ -185,6 +185,7 @@ int cros_ec_sensorhub_register_push_data(struct cros_ec_sensorhub *sensorhub, · 184 unmodified lines
185	void cros_ec_sensorhub_unregister_push_data(struct cros_ec_sensorhub *sensorhub,	185	void cros_ec_sensorhub_unregister_push_data(struct cros_ec_sensorhub *sensorhub,
186	u8 sensor_num);	186	u8 sensor_num);
187		187
		188	int cros_ec_sensorhub_ring_allocate(struct cros_ec_sensorhub *sensorhub);
188	int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub);	189	int cros_ec_sensorhub_ring_add(struct cros_ec_sensorhub *sensorhub);
189	void cros_ec_sensorhub_ring_remove(void *arg);	190	void cros_ec_sensorhub_ring_remove(void *arg);
190	int cros_ec_sensorhub_ring_fifo_enable(struct cros_ec_sensorhub *sensorhub,	191	int cros_ec_sensorhub_ring_fifo_enable(struct cros_ec_sensorhub *sensorhub,

include/linux/platform_device.h+1−0

@@ -25,6 +25,7 @@ struct platform_device { · 24 unmodified lines
25	bool id_auto;	25	bool id_auto;
26	struct device dev;	26	struct device dev;
27	u64 platform_dma_mask;	27	u64 platform_dma_mask;
		28	struct device_dma_parameters dma_parms;
28	u32 num_resources;	29	u32 num_resources;
29	struct resource *resource;	30	struct resource *resource;
30		31

include/linux/pnp.h+9−20

 #define global_to_pnp_card(n) list_entry(n, struct pnp_card, global_list)
 #define protocol_to_pnp_card(n) list_entry(n, struct pnp_card, protocol_list)
 #define to_pnp_card(n) container_of(n, struct pnp_card, dev)
-#define pnp_for_each_card(card) \
+#define pnp_for_each_card(card)	\
-	for((card) = global_to_pnp_card(pnp_cards.next); \
+	list_for_each_entry(card, &pnp_cards, global_list)
-	(card) != global_to_pnp_card(&pnp_cards); \
-	(card) = global_to_pnp_card((card)->global_list.next))
 struct pnp_card_link {
 	struct pnp_card *card;
 #define card_to_pnp_dev(n) list_entry(n, struct pnp_dev, card_list)
 #define protocol_to_pnp_dev(n) list_entry(n, struct pnp_dev, protocol_list)
 #define	to_pnp_dev(n) container_of(n, struct pnp_dev, dev)
-#define pnp_for_each_dev(dev) \
+#define pnp_for_each_dev(dev) list_for_each_entry(dev, &pnp_global, global_list)
-	for((dev) = global_to_pnp_dev(pnp_global.next); \
+#define card_for_each_dev(card, dev)	\
-	(dev) != global_to_pnp_dev(&pnp_global); \
+	list_for_each_entry(dev, &(card)->devices, card_list)
-	(dev) = global_to_pnp_dev((dev)->global_list.next))
-#define card_for_each_dev(card,dev) \
-	for((dev) = card_to_pnp_dev((card)->devices.next); \
-	(dev) != card_to_pnp_dev(&(card)->devices); \
-	(dev) = card_to_pnp_dev((dev)->card_list.next))
 #define pnp_dev_name(dev) (dev)->name
 static inline void *pnp_get_drvdata(struct pnp_dev *pdev)
 };
 #define to_pnp_protocol(n) list_entry(n, struct pnp_protocol, protocol_list)
-#define protocol_for_each_card(protocol,card) \
+#define protocol_for_each_card(protocol, card)	\
-	for((card) = protocol_to_pnp_card((protocol)->cards.next); \
+	list_for_each_entry(card, &(protocol)->cards, protocol_list)
-	(card) != protocol_to_pnp_card(&(protocol)->cards); \
+#define protocol_for_each_dev(protocol, dev)	\
-	(card) = protocol_to_pnp_card((card)->protocol_list.next))
+	list_for_each_entry(dev, &(protocol)->devices, protocol_list)
-#define protocol_for_each_dev(protocol,dev) \
-	for((dev) = protocol_to_pnp_dev((protocol)->devices.next); \
-	(dev) != protocol_to_pnp_dev(&(protocol)->devices); \
-	(dev) = protocol_to_pnp_dev((dev)->protocol_list.next))
 extern struct bus_type pnp_bus_type;

include/linux/stmmac.h+2−0

 	struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES];
 	struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES];
 	void (*fix_mac_speed)(void *priv, unsigned int speed);
+	int (*serdes_powerup)(struct net_device *ndev, void *priv);
+	void (*serdes_powerdown)(struct net_device *ndev, void *priv);
 	int (*init)(struct platform_device *pdev, void *priv);
 	void (*exit)(struct platform_device *pdev, void *priv);
 	struct mac_device_info *(*setup)(void *priv);

include/linux/sunrpc/clnt.h+12−1

 #if IS_ENABLED(CONFIG_SUNRPC_DEBUG)
 	struct dentry		*cl_debugfs;	/* debugfs directory */
 #endif
-	struct rpc_xprt_iter	cl_xpi;
+	/* cl_work is only needed after cl_xpi is no longer used,
+	 * and that are of similar size
+	 */
+	union {
+		struct rpc_xprt_iter	cl_xpi;
+		struct work_struct	cl_work;
+	};
 	const struct cred	*cl_cred;
 };
 		(task->tk_msg.rpc_proc->p_decode != NULL);
 }
+static inline void rpc_task_close_connection(struct rpc_task *task)
+{
+	if (task->tk_xprt)
+		xprt_force_disconnect(task->tk_xprt);
+}
 #endif /* _LINUX_SUNRPC_CLNT_H */

include/linux/sunrpc/svc_rdma.h+1−0

@@ -170,6 +170,7 @@ extern bool svc_rdma_post_recvs(struct svcxprt_rdma *rdma); · 169 unmodified lines
170	extern void svc_rdma_recv_ctxt_put(struct svcxprt_rdma *rdma,	170	extern void svc_rdma_recv_ctxt_put(struct svcxprt_rdma *rdma,
171	struct svc_rdma_recv_ctxt *ctxt);	171	struct svc_rdma_recv_ctxt *ctxt);
172	extern void svc_rdma_flush_recv_queues(struct svcxprt_rdma *rdma);	172	extern void svc_rdma_flush_recv_queues(struct svcxprt_rdma *rdma);
		173	extern void svc_rdma_release_rqst(struct svc_rqst *rqstp);
173	extern int svc_rdma_recvfrom(struct svc_rqst *);	174	extern int svc_rdma_recvfrom(struct svc_rqst *);
174		175
175	/* svc_rdma_rw.c */	176	/* svc_rdma_rw.c */

include/linux/tcp.h+0−51

@@ -78,47 +78,6 @@ struct tcp_sack_block { · 77 unmodified lines
78	#define TCP_SACK_SEEN (1 << 0) /1 = peer is SACK capable, /	78	#define TCP_SACK_SEEN (1 << 0) /1 = peer is SACK capable, /
79	#define TCP_DSACK_SEEN (1 << 2) /1 = DSACK was received from peer/	79	#define TCP_DSACK_SEEN (1 << 2) /1 = DSACK was received from peer/
80		80
81	#if IS_ENABLED(CONFIG_MPTCP)
82	struct mptcp_options_received {
83	u64 sndr_key;
84	u64 rcvr_key;
85	u64 data_ack;
86	u64 data_seq;
87	u32 subflow_seq;
88	u16 data_len;
89	u16 mp_capable : 1,
90	mp_join : 1,
91	dss : 1,
92	add_addr : 1,
93	rm_addr : 1,
94	family : 4,
95	echo : 1,
96	backup : 1;
97	u32 token;
98	u32 nonce;
99	u64 thmac;
100	u8 hmac[20];
101	u8 join_id;
102	u8 use_map:1,
103	dsn64:1,
104	data_fin:1,
105	use_ack:1,
106	ack64:1,
107	mpc_map:1,
108	__unused:2;
109	u8 addr_id;
110	u8 rm_id;
111	union {
112	struct in_addr addr;
113	#if IS_ENABLED(CONFIG_MPTCP_IPV6)
114	struct in6_addr addr6;
115	#endif
116	};
117	u64 ahmac;
118	u16 port;
119	};
120	#endif
121
122	struct tcp_options_received {	81	struct tcp_options_received {
123	/* PAWS/RTTM data */	82	/* PAWS/RTTM data */
124	int ts_recent_stamp;/* Time we stored ts_recent (for aging) */	83	int ts_recent_stamp;/* Time we stored ts_recent (for aging) */
@@ -136,9 +95,6 @@ struct tcp_options_received { · 11 unmodified lines
136	u8 num_sacks; /* Number of SACK blocks */	95	u8 num_sacks; /* Number of SACK blocks */
137	u16 user_mss; /* mss requested by user in ioctl */	96	u16 user_mss; /* mss requested by user in ioctl */
138	u16 mss_clamp; /* Maximal mss, negotiated at connection setup */	97	u16 mss_clamp; /* Maximal mss, negotiated at connection setup */
139	#if IS_ENABLED(CONFIG_MPTCP)
140	struct mptcp_options_received mptcp;
141	#endif
142	};	98	};
143		99
144	static inline void tcp_clear_options(struct tcp_options_received *rx_opt)	100	static inline void tcp_clear_options(struct tcp_options_received *rx_opt)
@@ -148,13 +104,6 @@ static inline void tcp_clear_options(struct tcp_options_received *rx_opt) · 3 unmodified lines
148	#if IS_ENABLED(CONFIG_SMC)	104	#if IS_ENABLED(CONFIG_SMC)
149	rx_opt->smc_ok = 0;	105	rx_opt->smc_ok = 0;
150	#endif	106	#endif
151	#if IS_ENABLED(CONFIG_MPTCP)
152	rx_opt->mptcp.mp_capable = 0;
153	rx_opt->mptcp.mp_join = 0;
154	rx_opt->mptcp.add_addr = 0;
155	rx_opt->mptcp.rm_addr = 0;
156	rx_opt->mptcp.dss = 0;
157	#endif
158	}	107	}
159		108
160	/* This is the max number of SACKS that we'll generate and process. It's safe	109	/* This is the max number of SACKS that we'll generate and process. It's safe

include/linux/tracepoint.h+1−21

@@ -156,8 +156,7 @@ static inline struct tracepoint tracepoint_ptr_deref(tracepoint_ptr_t p) · 155 unmodified lines
156	* Note, the proto and args passed in includes "__data" as the first parameter.	156	* Note, the proto and args passed in includes "__data" as the first parameter.
157	* The reason for this is to handle the "void" prototype. If a tracepoint	157	* The reason for this is to handle the "void" prototype. If a tracepoint
158	* has a "void" prototype, then it is invalid to declare a function	158	* has a "void" prototype, then it is invalid to declare a function
159	* as "(void *, void)". The DECLARE_TRACE_NOARGS() will pass in just	159	* as "(void *, void)".
160	* "void data", where as the DECLARE_TRACE() will pass in "void data, proto".
161	*/	160	*/
162	#define __DO_TRACE(tp, proto, args, cond, rcuidle) \	161	#define __DO_TRACE(tp, proto, args, cond, rcuidle) \
163	do { \	162	do { \
@@ -373,25 +372,6 @@ static inline struct tracepoint tracepoint_ptr_deref(tracepoint_ptr_t p) · 209 unmodified lines
373	# define __tracepoint_string	372	# define __tracepoint_string
374	#endif	373	#endif
375		374
376	/*
377	* The need for the DECLARE_TRACE_NOARGS() is to handle the prototype
378	* (void). "void" is a special value in a function prototype and can
379	* not be combined with other arguments. Since the DECLARE_TRACE()
380	* macro adds a data element at the beginning of the prototype,
381	* we need a way to differentiate "(void *data, proto)" from
382	* "(void *data, void)". The second prototype is invalid.
383	*
384	* DECLARE_TRACE_NOARGS() passes "void" as the tracepoint prototype
385	* and "void *__data" as the callback prototype.
386	*
387	* DECLARE_TRACE() passes "proto" as the tracepoint protoype and
388	* "void *__data, proto" as the callback prototype.
389	*/
390	#define DECLARE_TRACE_NOARGS(name) \
391	__DECLARE_TRACE(name, void, , \
392	cpu_online(raw_smp_processor_id()), \

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Merge tag 'noinstr-lds-2020-05-19' into core/rcu

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@@ -8,7 +8,7 @@ · 7 unmodified lines
8	* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.	8	* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9	* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH	9	* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10	* Copyright(c) 2016 - 2017 Intel Deutschland GmbH	10	* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11	* Copyright(c) 2019 Intel Corporation	11	* Copyright(c) 2019 - 2020 Intel Corporation
12	*	12	*
13	* This program is free software; you can redistribute it and/or modify	13	* This program is free software; you can redistribute it and/or modify
14	* it under the terms of version 2 of the GNU General Public License as	14	* it under the terms of version 2 of the GNU General Public License as
@@ -31,7 +31,7 @@ · 16 unmodified lines
31	* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.	31	* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
32	* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH	32	* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33	* Copyright(c) 2016 - 2017 Intel Deutschland GmbH	33	* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34	* Copyright(c) 2019 Intel Corporation	34	* Copyright(c) 2019 - 2020 Intel Corporation
35	* All rights reserved.	35	* All rights reserved.
36	*	36	*
37	* Redistribution and use in source and binary forms, with or without	37	* Redistribution and use in source and binary forms, with or without
@@ -99,7 +99,7 @@ enum iwl_mvm_dqa_txq { · 61 unmodified lines
99	IWL_MVM_DQA_MAX_MGMT_QUEUE = 8,	99	IWL_MVM_DQA_MAX_MGMT_QUEUE = 8,
100	IWL_MVM_DQA_AP_PROBE_RESP_QUEUE = 9,	100	IWL_MVM_DQA_AP_PROBE_RESP_QUEUE = 9,
101	IWL_MVM_DQA_MIN_DATA_QUEUE = 10,	101	IWL_MVM_DQA_MIN_DATA_QUEUE = 10,
102	IWL_MVM_DQA_MAX_DATA_QUEUE = 31,	102	IWL_MVM_DQA_MAX_DATA_QUEUE = 30,
103	};	103	};
104		104
105	enum iwl_mvm_tx_fifo {	105	enum iwl_mvm_tx_fifo {

@@ -812,17 +812,17 @@ static const struct SiS_VCLKData SiSUSB_VCLKData[] = { · 811 unmodified lines
812	int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);	812	int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
813	int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo);	813	int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo);
814		814
815	extern int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data);	815	extern int sisusb_setreg(struct sisusb_usb_data *sisusb, u32 port, u8 data);
816	extern int sisusb_getreg(struct sisusb_usb_data sisusb, int port, u8 data);	816	extern int sisusb_getreg(struct sisusb_usb_data sisusb, u32 port, u8 data);
817	extern int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port,	817	extern int sisusb_setidxreg(struct sisusb_usb_data *sisusb, u32 port,
818	u8 index, u8 data);	818	u8 index, u8 data);
819	extern int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port,	819	extern int sisusb_getidxreg(struct sisusb_usb_data *sisusb, u32 port,
820	u8 index, u8 * data);	820	u8 index, u8 * data);
821	extern int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port,	821	extern int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, u32 port,
822	u8 idx, u8 myand, u8 myor);	822	u8 idx, u8 myand, u8 myor);
823	extern int sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port,	823	extern int sisusb_setidxregor(struct sisusb_usb_data *sisusb, u32 port,
824	u8 index, u8 myor);	824	u8 index, u8 myor);
825	extern int sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port,	825	extern int sisusb_setidxregand(struct sisusb_usb_data *sisusb, u32 port,
826	u8 idx, u8 myand);	826	u8 idx, u8 myand);
827		827
828	void sisusb_delete(struct kref *kref);	828	void sisusb_delete(struct kref *kref);