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IB/mlx5: Expose TIR ICM address to user space

This patch exposes the TIR ICM address of raw packet and RSS QPs to user space. In order to pass the new field, the patch extends the mlx5 specific QP creation response structure and fills it with the icm address returned by the FW command, if available.

Ariel Levkovich committed 7 years ago

Commit 1f1d6ab1 parent 96780e42 files · +43 −5Browse files

Showing the changes to include/uapi (1 of 2 files). Show all

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include/uapi/rdma/mlx5-abi.h+2−0
@@ -359,6 +359,7 @@ enum mlx5_ib_create_qp_resp_mask { · 358 unmodified lines
359 MLX5_IB_CREATE_QP_RESP_MASK_TISN = 1UL << 1,359 MLX5_IB_CREATE_QP_RESP_MASK_TISN = 1UL << 1,
360 MLX5_IB_CREATE_QP_RESP_MASK_RQN = 1UL << 2,360 MLX5_IB_CREATE_QP_RESP_MASK_RQN = 1UL << 2,
361 MLX5_IB_CREATE_QP_RESP_MASK_SQN = 1UL << 3,361 MLX5_IB_CREATE_QP_RESP_MASK_SQN = 1UL << 3,
362 MLX5_IB_CREATE_QP_RESP_MASK_TIR_ICM_ADDR = 1UL << 4,
362};363};
363 364
364struct mlx5_ib_create_qp_resp {365struct mlx5_ib_create_qp_resp {
@@ -370,6 +371,7 @@ struct mlx5_ib_create_qp_resp { · 5 unmodified lines
370 __u32 rqn;371 __u32 rqn;
371 __u32 sqn;372 __u32 sqn;
372 __u32 reserved1;373 __u32 reserved1;
374 __u64 tir_icm_addr;
373};375};
374 376
375struct mlx5_ib_alloc_mw {377struct mlx5_ib_alloc_mw {