lael-labs/linux

drivers/net/wireless/ath/ath10k/ahb.c+1−1

@@ -733,7 +733,7 @@ static int ath10k_ahb_probe(struct platform_device *pdev) · 732 unmodified lines
733	int ret;	733	int ret;
734	struct ath10k_bus_params bus_params = {};	734	struct ath10k_bus_params bus_params = {};
735		735
736	hw_rev = (enum ath10k_hw_rev)of_device_get_match_data(&pdev->dev);	736	hw_rev = (uintptr_t)of_device_get_match_data(&pdev->dev);
737	if (!hw_rev) {	737	if (!hw_rev) {
738	dev_err(&pdev->dev, "OF data missing\n");	738	dev_err(&pdev->dev, "OF data missing\n");
739	return -EINVAL;	739	return -EINVAL;

drivers/net/wireless/ath/ath10k/htt.h+2−2

@@ -69,7 +69,7 @@ struct htt_ver_req { · 68 unmodified lines
69	* The HTT tx descriptor is defined in two manners: by a struct with	69	* The HTT tx descriptor is defined in two manners: by a struct with
70	* bitfields, and by a series of [dword offset, bit mask, bit shift]	70	* bitfields, and by a series of [dword offset, bit mask, bit shift]
71	* definitions.	71	* definitions.
72	* The target should use the struct def, for simplicitly and clarity,	72	* The target should use the struct def, for simplicity and clarity,
73	* but the host shall use the bit-mast + bit-shift defs, to be endian-	73	* but the host shall use the bit-mast + bit-shift defs, to be endian-
74	* neutral. Specifically, the host shall use the get/set macros built	74	* neutral. Specifically, the host shall use the get/set macros built
75	* around the mask + shift defs.	75	* around the mask + shift defs.
@@ -2086,7 +2086,7 @@ static inline bool ath10k_htt_rx_proc_rx_frag_ind(struct ath10k_htt *htt, · 2010 unmodified lines
2086	* for correctly accessing rx descriptor data.	2086	* for correctly accessing rx descriptor data.
2087	*/	2087	*/
2088		2088
2089	/* base struct used for abstracting the rx descritor representation */	2089	/* base struct used for abstracting the rx descriptor representation */
2090	struct htt_rx_desc {	2090	struct htt_rx_desc {
2091	union {	2091	union {
2092	/* This field is filled on the host using the msdu buffer	2092	/* This field is filled on the host using the msdu buffer

drivers/net/wireless/ath/ath10k/pci.c+2−2

@@ -1636,7 +1636,7 @@ static int ath10k_pci_dump_memory_generic(struct ath10k *ar, · 1635 unmodified lines
1636	buf,	1636	buf,
1637	current_region->len);	1637	current_region->len);
1638		1638
1639	/* No individiual memory sections defined so we can	1639	/* No individual memory sections defined so we can
1640	* copy the entire memory region.	1640	* copy the entire memory region.
1641	*/	1641	*/
1642	ret = ath10k_pci_diag_read_mem(ar,	1642	ret = ath10k_pci_diag_read_mem(ar,
@@ -3816,7 +3816,7 @@ static void __exit ath10k_pci_exit(void) · 2173 unmodified lines
3816	module_exit(ath10k_pci_exit);	3816	module_exit(ath10k_pci_exit);
3817		3817
3818	MODULE_AUTHOR("Qualcomm Atheros");	3818	MODULE_AUTHOR("Qualcomm Atheros");
3819	MODULE_DESCRIPTION("Driver support for Qualcomm Atheros 802.11ac WLAN PCIe/AHB devices");	3819	MODULE_DESCRIPTION("Driver support for Qualcomm Atheros PCIe/AHB 802.11ac WLAN devices");
3820	MODULE_LICENSE("Dual BSD/GPL");	3820	MODULE_LICENSE("Dual BSD/GPL");
3821		3821
3822	/* QCA988x 2.0 firmware files */	3822	/* QCA988x 2.0 firmware files */

drivers/net/wireless/ath/ath10k/sdio.c+1−1

@@ -2389,7 +2389,7 @@ static int ath10k_sdio_dump_memory_generic(struct ath10k *ar, · 2388 unmodified lines
2389	buf,	2389	buf,
2390	current_region->len);	2390	current_region->len);
2391		2391
2392	/* No individiual memory sections defined so we can	2392	/* No individual memory sections defined so we can
2393	* copy the entire memory region.	2393	* copy the entire memory region.
2394	*/	2394	*/
2395	if (fast_dump)	2395	if (fast_dump)

drivers/net/wireless/ath/ath10k/usb.c+1−1

@@ -1126,5 +1126,5 @@ static struct usb_driver ath10k_usb_driver = { · 1125 unmodified lines
1126	module_usb_driver(ath10k_usb_driver);	1126	module_usb_driver(ath10k_usb_driver);
1127		1127
1128	MODULE_AUTHOR("Atheros Communications, Inc.");	1128	MODULE_AUTHOR("Atheros Communications, Inc.");
1129	MODULE_DESCRIPTION("Driver support for Qualcomm Atheros 802.11ac WLAN USB devices");	1129	MODULE_DESCRIPTION("Driver support for Qualcomm Atheros USB 802.11ac WLAN devices");
1130	MODULE_LICENSE("Dual BSD/GPL");	1130	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/ath/ath10k/wmi.h+4−4

drivers/net/wireless/ath/ath11k/ahb.c+2−12

 		return -EINVAL;
 	}
-	hw_rev = (enum ath11k_hw_rev)of_id->data;
+	hw_rev = (uintptr_t)of_id->data;
 	switch (hw_rev) {
 	case ATH11K_HW_IPQ8074:
 	.shutdown = ath11k_ahb_shutdown,
 };
-static int ath11k_ahb_init(void)
+module_platform_driver(ath11k_ahb_driver);
-{
-	return platform_driver_register(&ath11k_ahb_driver);
-}
-module_init(ath11k_ahb_init);
-static void ath11k_ahb_exit(void)
-{
-	platform_driver_unregister(&ath11k_ahb_driver);
-}
-module_exit(ath11k_ahb_exit);
 MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11ax WLAN AHB devices");
 MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/ath/ath11k/ce.h+0−3

 void ath11k_ce_free_pipes(struct ath11k_base *ab);
 int ath11k_ce_get_attr_flags(struct ath11k_base *ab, int ce_id);
 void ath11k_ce_poll_send_completed(struct ath11k_base *ab, u8 pipe_id);
-int ath11k_ce_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,
-				  u8 *ul_pipe, u8 *dl_pipe);
-int ath11k_ce_attr_attach(struct ath11k_base *ab);
 void ath11k_ce_get_shadow_config(struct ath11k_base *ab,
 				 u32 **shadow_cfg, u32 *shadow_cfg_len);
 void ath11k_ce_stop_shadow_timers(struct ath11k_base *ab);

drivers/net/wireless/ath/ath11k/dp.h+1−1

@@ -635,7 +635,7 @@ enum htt_ppdu_stats_tag_type { · 634 unmodified lines
635	* b'24 - status_swap: 1 is to swap status TLV	635	* b'24 - status_swap: 1 is to swap status TLV
636	* b'25 - pkt_swap: 1 is to swap packet TLV	636	* b'25 - pkt_swap: 1 is to swap packet TLV
637	* b'26:31 - rsvd1: reserved for future use	637	* b'26:31 - rsvd1: reserved for future use
638	* dword1 - b'0:16 - ring_buffer_size: size of bufferes referenced by rx ring,	638	* dword1 - b'0:16 - ring_buffer_size: size of buffers referenced by rx ring,
639	* in byte units.	639	* in byte units.
640	* Valid only for HW_TO_SW_RING and SW_TO_HW_RING	640	* Valid only for HW_TO_SW_RING and SW_TO_HW_RING
641	* - b'16:31 - rsvd2: Reserved for future use	641	* - b'16:31 - rsvd2: Reserved for future use

drivers/net/wireless/ath/ath11k/dp_rx.c+1−1

@@ -3423,7 +3423,7 @@ static int ath11k_dp_rx_h_defrag_reo_reinject(struct ath11k *ar, struct dp_rx_ti · 3422 unmodified lines
3423	ath11k_hal_rx_buf_addr_info_set(msdu0, paddr, cookie,	3423	ath11k_hal_rx_buf_addr_info_set(msdu0, paddr, cookie,
3424	ab->hw_params.hal_params->rx_buf_rbm);	3424	ab->hw_params.hal_params->rx_buf_rbm);
3425		3425
3426	/* Fill mpdu details into reo entrace ring */	3426	/* Fill mpdu details into reo entrance ring */
3427	srng = &ab->hal.srng_list[ab->dp.reo_reinject_ring.ring_id];	3427	srng = &ab->hal.srng_list[ab->dp.reo_reinject_ring.ring_id];
3428		3428
3429	spin_lock_bh(&srng->lock);	3429	spin_lock_bh(&srng->lock);

drivers/net/wireless/ath/ath11k/dp_tx.c+6−6

@@ -238,7 +238,7 @@ tcl_ring_sel: · 237 unmodified lines
238	spin_unlock_bh(&tcl_ring->lock);	238	spin_unlock_bh(&tcl_ring->lock);
239	ret = -ENOMEM;	239	ret = -ENOMEM;
240		240
241	/* Checking for available tcl descritors in another ring in	241	/* Checking for available tcl descriptors in another ring in
242	* case of failure due to full tcl ring now, is better than	242	* case of failure due to full tcl ring now, is better than
243	* checking this ring earlier for each pkt tx.	243	* checking this ring earlier for each pkt tx.
244	* Restart ring selection if some rings are not checked yet.	244	* Restart ring selection if some rings are not checked yet.
@@ -344,7 +344,7 @@ ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab, · 99 unmodified lines
344	dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);	344	dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
345		345
346	if (!skb_cb->vif) {	346	if (!skb_cb->vif) {
347	dev_kfree_skb_any(msdu);	347	ieee80211_free_txskb(ar->hw, msdu);
348	return;	348	return;
349	}	349	}
350		350
@@ -369,7 +369,7 @@ ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab, · 18 unmodified lines
369	"dp_tx: failed to find the peer with peer_id %d\n",	369	"dp_tx: failed to find the peer with peer_id %d\n",
370	ts->peer_id);	370	ts->peer_id);
371	spin_unlock_bh(&ab->base_lock);	371	spin_unlock_bh(&ab->base_lock);
372	dev_kfree_skb_any(msdu);	372	ieee80211_free_txskb(ar->hw, msdu);
373	return;	373	return;
374	}	374	}
375	spin_unlock_bh(&ab->base_lock);	375	spin_unlock_bh(&ab->base_lock);
@@ -566,12 +566,12 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar, · 190 unmodified lines
566	dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);	566	dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
567		567
568	if (unlikely(!rcu_access_pointer(ab->pdevs_active[ar->pdev_idx]))) {	568	if (unlikely(!rcu_access_pointer(ab->pdevs_active[ar->pdev_idx]))) {
569	dev_kfree_skb_any(msdu);	569	ieee80211_free_txskb(ar->hw, msdu);
570	return;	570	return;
571	}	571	}
572		572
573	if (unlikely(!skb_cb->vif)) {	573	if (unlikely(!skb_cb->vif)) {
574	dev_kfree_skb_any(msdu);	574	ieee80211_free_txskb(ar->hw, msdu);
575	return;	575	return;
576	}	576	}
577		577
@@ -624,7 +624,7 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar, · 46 unmodified lines
624	"dp_tx: failed to find the peer with peer_id %d\n",	624	"dp_tx: failed to find the peer with peer_id %d\n",
625	ts->peer_id);	625	ts->peer_id);
626	spin_unlock_bh(&ab->base_lock);	626	spin_unlock_bh(&ab->base_lock);
627	dev_kfree_skb_any(msdu);	627	ieee80211_free_txskb(ar->hw, msdu);
628	return;	628	return;
629	}	629	}
630	arsta = (struct ath11k_sta *)peer->sta->drv_priv;	630	arsta = (struct ath11k_sta *)peer->sta->drv_priv;

drivers/net/wireless/ath/ath11k/mac.c+32−32

@@ -566,7 +566,7 @@ static void ath11k_get_arvif_iter(void data, u8 mac, · 565 unmodified lines
566	struct ieee80211_vif *vif)	566	struct ieee80211_vif *vif)
567	{	567	{
568	struct ath11k_vif_iter *arvif_iter = data;	568	struct ath11k_vif_iter *arvif_iter = data;
569	struct ath11k_vif arvif = (void )vif->drv_priv;	569	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
570		570
571	if (arvif->vdev_id == arvif_iter->vdev_id)	571	if (arvif->vdev_id == arvif_iter->vdev_id)
572	arvif_iter->arvif = arvif;	572	arvif_iter->arvif = arvif;
@@ -1464,7 +1464,7 @@ static int ath11k_mac_setup_bcn_tmpl_ema(struct ath11k_vif *arvif) · 891 unmodified lines
1464	u32 params = 0;	1464	u32 params = 0;
1465	u8 i = 0;	1465	u8 i = 0;
1466		1466
1467	tx_arvif = (void *)arvif->vif->mbssid_tx_vif->drv_priv;	1467	tx_arvif = ath11k_vif_to_arvif(arvif->vif->mbssid_tx_vif);
1468		1468
1469	beacons = ieee80211_beacon_get_template_ema_list(tx_arvif->ar->hw,	1469	beacons = ieee80211_beacon_get_template_ema_list(tx_arvif->ar->hw,
1470	tx_arvif->vif, 0);	1470	tx_arvif->vif, 0);
@@ -1520,8 +1520,8 @@ static int ath11k_mac_setup_bcn_tmpl_mbssid(struct ath11k_vif *arvif) · 49 unmodified lines
1520	struct sk_buff *bcn;	1520	struct sk_buff *bcn;
1521	int ret;	1521	int ret;
1522		1522
1523	if (arvif->vif->mbssid_tx_vif) {	1523	if (vif->mbssid_tx_vif) {
1524	tx_arvif = (void *)arvif->vif->mbssid_tx_vif->drv_priv;	1524	tx_arvif = ath11k_vif_to_arvif(vif->mbssid_tx_vif);
1525	if (tx_arvif != arvif) {	1525	if (tx_arvif != arvif) {
1526	ar = tx_arvif->ar;	1526	ar = tx_arvif->ar;
1527	ab = ar->ab;	1527	ab = ar->ab;
@@ -1562,7 +1562,7 @@ static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif) · 34 unmodified lines
1562	* non-transmitting interfaces, and results in a crash if sent.	1562	* non-transmitting interfaces, and results in a crash if sent.
1563	*/	1563	*/
1564	if (vif->mbssid_tx_vif &&	1564	if (vif->mbssid_tx_vif &&
1565	arvif != (void *)vif->mbssid_tx_vif->drv_priv && arvif->is_up)	1565	arvif != ath11k_vif_to_arvif(vif->mbssid_tx_vif) && arvif->is_up)
1566	return 0;	1566	return 0;
1567		1567
1568	if (vif->bss_conf.ema_ap && vif->mbssid_tx_vif)	1568	if (vif->bss_conf.ema_ap && vif->mbssid_tx_vif)
@@ -1626,7 +1626,7 @@ static void ath11k_control_beaconing(struct ath11k_vif *arvif, · 57 unmodified lines
1626	ether_addr_copy(arvif->bssid, info->bssid);	1626	ether_addr_copy(arvif->bssid, info->bssid);
1627		1627
1628	if (arvif->vif->mbssid_tx_vif)	1628	if (arvif->vif->mbssid_tx_vif)
1629	tx_arvif = (struct ath11k_vif *)arvif->vif->mbssid_tx_vif->drv_priv;	1629	tx_arvif = ath11k_vif_to_arvif(arvif->vif->mbssid_tx_vif);
1630		1630
1631	ret = ath11k_wmi_vdev_up(arvif->ar, arvif->vdev_id, arvif->aid,	1631	ret = ath11k_wmi_vdev_up(arvif->ar, arvif->vdev_id, arvif->aid,
1632	arvif->bssid,	1632	arvif->bssid,
@@ -1649,7 +1649,7 @@ static void ath11k_mac_handle_beacon_iter(void data, u8 mac, · 16 unmodified lines
1649	{	1649	{
1650	struct sk_buff *skb = data;	1650	struct sk_buff *skb = data;
1651	struct ieee80211_mgmt mgmt = (void )skb->data;	1651	struct ieee80211_mgmt mgmt = (void )skb->data;
1652	struct ath11k_vif arvif = (void )vif->drv_priv;	1652	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
1653		1653
1654	if (vif->type != NL80211_IFTYPE_STATION)	1654	if (vif->type != NL80211_IFTYPE_STATION)
1655	return;	1655	return;
@@ -1672,7 +1672,7 @@ static void ath11k_mac_handle_beacon_miss_iter(void data, u8 mac, · 16 unmodified lines
1672	struct ieee80211_vif *vif)	1672	struct ieee80211_vif *vif)
1673	{	1673	{
1674	u32 *vdev_id = data;	1674	u32 *vdev_id = data;
1675	struct ath11k_vif arvif = (void )vif->drv_priv;	1675	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
1676	struct ath11k *ar = arvif->ar;	1676	struct ath11k *ar = arvif->ar;
1677	struct ieee80211_hw *hw = ar->hw;	1677	struct ieee80211_hw *hw = ar->hw;
1678		1678
@@ -1718,7 +1718,7 @@ static void ath11k_peer_assoc_h_basic(struct ath11k *ar, · 39 unmodified lines
1718	struct ieee80211_sta *sta,	1718	struct ieee80211_sta *sta,
1719	struct peer_assoc_params *arg)	1719	struct peer_assoc_params *arg)
1720	{	1720	{
1721	struct ath11k_vif arvif = (void )vif->drv_priv;	1721	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
1722	u32 aid;	1722	u32 aid;
1723		1723
1724	lockdep_assert_held(&ar->conf_mutex);	1724	lockdep_assert_held(&ar->conf_mutex);
@@ -1746,7 +1746,7 @@ static void ath11k_peer_assoc_h_crypto(struct ath11k *ar, · 21 unmodified lines
1746	struct ieee80211_bss_conf *info = &vif->bss_conf;	1746	struct ieee80211_bss_conf *info = &vif->bss_conf;
1747	struct cfg80211_chan_def def;	1747	struct cfg80211_chan_def def;
1748	struct cfg80211_bss *bss;	1748	struct cfg80211_bss *bss;
1749	struct ath11k_vif arvif = (struct ath11k_vif )vif->drv_priv;	1749	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
1750	const u8 *rsnie = NULL;	1750	const u8 *rsnie = NULL;
1751	const u8 *wpaie = NULL;	1751	const u8 *wpaie = NULL;
1752		1752
@@ -1804,7 +1804,7 @@ static void ath11k_peer_assoc_h_rates(struct ath11k *ar, · 51 unmodified lines
1804	struct ieee80211_sta *sta,	1804	struct ieee80211_sta *sta,
1805	struct peer_assoc_params *arg)	1805	struct peer_assoc_params *arg)
1806	{	1806	{
1807	struct ath11k_vif arvif = (void )vif->drv_priv;	1807	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
1808	struct wmi_rate_set_arg *rateset = &arg->peer_legacy_rates;	1808	struct wmi_rate_set_arg *rateset = &arg->peer_legacy_rates;
1809	struct cfg80211_chan_def def;	1809	struct cfg80211_chan_def def;
1810	const struct ieee80211_supported_band *sband;	1810	const struct ieee80211_supported_band *sband;
@@ -1867,7 +1867,7 @@ static void ath11k_peer_assoc_h_ht(struct ath11k *ar, · 56 unmodified lines
1867	struct peer_assoc_params *arg)	1867	struct peer_assoc_params *arg)
1868	{	1868	{
1869	const struct ieee80211_sta_ht_cap *ht_cap = &sta->deflink.ht_cap;	1869	const struct ieee80211_sta_ht_cap *ht_cap = &sta->deflink.ht_cap;
1870	struct ath11k_vif arvif = (void )vif->drv_priv;	1870	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
1871	struct cfg80211_chan_def def;	1871	struct cfg80211_chan_def def;
1872	enum nl80211_band band;	1872	enum nl80211_band band;
1873	const u8 *ht_mcs_mask;	1873	const u8 *ht_mcs_mask;
@@ -2064,7 +2064,7 @@ static void ath11k_peer_assoc_h_vht(struct ath11k *ar, · 190 unmodified lines
2064	struct peer_assoc_params *arg)	2064	struct peer_assoc_params *arg)
2065	{	2065	{
2066	const struct ieee80211_sta_vht_cap *vht_cap = &sta->deflink.vht_cap;	2066	const struct ieee80211_sta_vht_cap *vht_cap = &sta->deflink.vht_cap;
2067	struct ath11k_vif arvif = (void )vif->drv_priv;	2067	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
2068	struct cfg80211_chan_def def;	2068	struct cfg80211_chan_def def;
2069	enum nl80211_band band;	2069	enum nl80211_band band;
2070	u16 *vht_mcs_mask;	2070	u16 *vht_mcs_mask;
@@ -2261,7 +2261,7 @@ static void ath11k_peer_assoc_h_he(struct ath11k *ar, · 190 unmodified lines
2261	struct ieee80211_sta *sta,	2261	struct ieee80211_sta *sta,
2262	struct peer_assoc_params *arg)	2262	struct peer_assoc_params *arg)
2263	{	2263	{
2264	struct ath11k_vif arvif = (void )vif->drv_priv;	2264	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
2265	struct cfg80211_chan_def def;	2265	struct cfg80211_chan_def def;
2266	const struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap;	2266	const struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap;
2267	enum nl80211_band band;	2267	enum nl80211_band band;
@@ -2584,7 +2584,7 @@ static void ath11k_peer_assoc_h_qos(struct ath11k *ar, · 316 unmodified lines
2584	struct ieee80211_sta *sta,	2584	struct ieee80211_sta *sta,
2585	struct peer_assoc_params *arg)	2585	struct peer_assoc_params *arg)
2586	{	2586	{
2587	struct ath11k_vif arvif = (void )vif->drv_priv;	2587	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
2588		2588
2589	switch (arvif->vdev_type) {	2589	switch (arvif->vdev_type) {
2590	case WMI_VDEV_TYPE_AP:	2590	case WMI_VDEV_TYPE_AP:
@@ -2747,7 +2747,7 @@ static void ath11k_peer_assoc_h_phymode(struct ath11k *ar, · 156 unmodified lines
2747	struct ieee80211_sta *sta,	2747	struct ieee80211_sta *sta,
2748	struct peer_assoc_params *arg)	2748	struct peer_assoc_params *arg)
2749	{	2749	{
2750	struct ath11k_vif arvif = (void )vif->drv_priv;	2750	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
2751	struct cfg80211_chan_def def;	2751	struct cfg80211_chan_def def;
2752	enum nl80211_band band;	2752	enum nl80211_band band;
2753	const u8 *ht_mcs_mask;	2753	const u8 *ht_mcs_mask;
@@ -2933,7 +2933,7 @@ static bool ath11k_mac_vif_recalc_sta_he_txbf(struct ath11k *ar, · 179 unmodified lines
2933	struct ieee80211_vif *vif,	2933	struct ieee80211_vif *vif,
2934	struct ieee80211_sta_he_cap *he_cap)	2934	struct ieee80211_sta_he_cap *he_cap)
2935	{	2935	{
2936	struct ath11k_vif arvif = (void )vif->drv_priv;	2936	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
2937	struct ieee80211_he_cap_elem he_cap_elem = {0};	2937	struct ieee80211_he_cap_elem he_cap_elem = {0};
2938	struct ieee80211_sta_he_cap *cap_band = NULL;	2938	struct ieee80211_sta_he_cap *cap_band = NULL;
2939	struct cfg80211_chan_def def;	2939	struct cfg80211_chan_def def;
@@ -2995,7 +2995,7 @@ static void ath11k_bss_assoc(struct ieee80211_hw *hw, · 55 unmodified lines
2995	struct ieee80211_bss_conf *bss_conf)	2995	struct ieee80211_bss_conf *bss_conf)
2996	{	2996	{
2997	struct ath11k *ar = hw->priv;	2997	struct ath11k *ar = hw->priv;
2998	struct ath11k_vif arvif = (void )vif->drv_priv;	2998	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
2999	struct peer_assoc_params peer_arg;	2999	struct peer_assoc_params peer_arg;
3000	struct ieee80211_sta *ap_sta;	3000	struct ieee80211_sta *ap_sta;
3001	struct ath11k_peer *peer;	3001	struct ath11k_peer *peer;
@@ -3111,7 +3111,7 @@ static void ath11k_bss_disassoc(struct ieee80211_hw *hw, · 109 unmodified lines
3111	struct ieee80211_vif *vif)	3111	struct ieee80211_vif *vif)
3112	{	3112	{
3113	struct ath11k *ar = hw->priv;	3113	struct ath11k *ar = hw->priv;
3114	struct ath11k_vif arvif = (void )vif->drv_priv;	3114	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
3115	int ret;	3115	int ret;
3116		3116
3117	lockdep_assert_held(&ar->conf_mutex);	3117	lockdep_assert_held(&ar->conf_mutex);
@@ -3160,7 +3160,7 @@ static void ath11k_recalculate_mgmt_rate(struct ath11k *ar, · 42 unmodified lines
3160	struct ieee80211_vif *vif,	3160	struct ieee80211_vif *vif,
3161	struct cfg80211_chan_def *def)	3161	struct cfg80211_chan_def *def)
3162	{	3162	{
3163	struct ath11k_vif arvif = (void )vif->drv_priv;	3163	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
3164	const struct ieee80211_supported_band *sband;	3164	const struct ieee80211_supported_band *sband;
3165	u8 basic_rate_idx;	3165	u8 basic_rate_idx;
3166	int hw_rate_code;	3166	int hw_rate_code;
@@ -4632,7 +4632,7 @@ static int ath11k_station_disassoc(struct ath11k *ar, · 1465 unmodified lines
4632	struct ieee80211_vif *vif,	4632	struct ieee80211_vif *vif,
4633	struct ieee80211_sta *sta)	4633	struct ieee80211_sta *sta)
4634	{	4634	{
4635	struct ath11k_vif arvif = (void )vif->drv_priv;	4635	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
4636	int ret = 0;	4636	int ret = 0;
4637		4637
4638	lockdep_assert_held(&ar->conf_mutex);	4638	lockdep_assert_held(&ar->conf_mutex);
@@ -5160,7 +5160,7 @@ static int ath11k_mac_op_sta_set_txpwr(struct ieee80211_hw *hw, · 521 unmodified lines
5160	struct ieee80211_sta *sta)	5160	struct ieee80211_sta *sta)
5161	{	5161	{
5162	struct ath11k *ar = hw->priv;	5162	struct ath11k *ar = hw->priv;
5163	struct ath11k_vif arvif = (void )vif->drv_priv;	5163	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
5164	int ret = 0;	5164	int ret = 0;
5165	s16 txpwr;	5165	s16 txpwr;
5166		5166
@@ -5210,7 +5210,7 @@ static void ath11k_mac_op_sta_rc_update(struct ieee80211_hw *hw, · 43 unmodified lines
5210	{	5210	{
5211	struct ath11k *ar = hw->priv;	5211	struct ath11k *ar = hw->priv;
5212	struct ath11k_sta arsta = (struct ath11k_sta )sta->drv_priv;	5212	struct ath11k_sta arsta = (struct ath11k_sta )sta->drv_priv;
5213	struct ath11k_vif arvif = (void )vif->drv_priv;	5213	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
5214	struct ath11k_peer *peer;	5214	struct ath11k_peer *peer;
5215	u32 bw, smps;	5215	u32 bw, smps;
5216		5216
@@ -5337,7 +5337,7 @@ static int ath11k_mac_op_conf_tx(struct ieee80211_hw *hw, · 120 unmodified lines
5337	const struct ieee80211_tx_queue_params *params)	5337	const struct ieee80211_tx_queue_params *params)
5338	{	5338	{
5339	struct ath11k *ar = hw->priv;	5339	struct ath11k *ar = hw->priv;
5340	struct ath11k_vif arvif = (void )vif->drv_priv;	5340	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
5341	struct wmi_wmm_params_arg *p = NULL;	5341	struct wmi_wmm_params_arg *p = NULL;
5342	int ret;	5342	int ret;
5343		5343
@@ -6455,7 +6455,7 @@ static int ath11k_mac_setup_vdev_params_mbssid(struct ath11k_vif *arvif, · 1111 unmodified lines
6455	return 0;	6455	return 0;
6456	}	6456	}
6457		6457
6458	tx_arvif = (void *)tx_vif->drv_priv;	6458	tx_arvif = ath11k_vif_to_arvif(tx_vif);
6459		6459
6460	if (arvif->vif->bss_conf.nontransmitted) {	6460	if (arvif->vif->bss_conf.nontransmitted) {
6461	if (ar->hw->wiphy != ieee80211_vif_to_wdev(tx_vif)->wiphy)	6461	if (ar->hw->wiphy != ieee80211_vif_to_wdev(tx_vif)->wiphy)
@@ -7408,7 +7408,7 @@ ath11k_mac_update_vif_chan(struct ath11k *ar, · 946 unmodified lines
7408	/* TODO: Update ar->rx_channel */	7408	/* TODO: Update ar->rx_channel */
7409		7409
7410	for (i = 0; i < n_vifs; i++) {	7410	for (i = 0; i < n_vifs; i++) {
7411	arvif = (void *)vifs[i].vif->drv_priv;	7411	arvif = ath11k_vif_to_arvif(vifs[i].vif);
7412		7412
7413	if (WARN_ON(!arvif->is_started))	7413	if (WARN_ON(!arvif->is_started))
7414	continue;	7414	continue;
@@ -7450,7 +7450,7 @@ ath11k_mac_update_vif_chan(struct ath11k *ar, · 35 unmodified lines
7450		7450
7451	mbssid_tx_vif = arvif->vif->mbssid_tx_vif;	7451	mbssid_tx_vif = arvif->vif->mbssid_tx_vif;
7452	if (mbssid_tx_vif)	7452	if (mbssid_tx_vif)
7453	tx_arvif = (struct ath11k_vif *)mbssid_tx_vif->drv_priv;	7453	tx_arvif = ath11k_vif_to_arvif(mbssid_tx_vif);
7454		7454
7455	ret = ath11k_wmi_vdev_up(arvif->ar, arvif->vdev_id, arvif->aid,	7455	ret = ath11k_wmi_vdev_up(arvif->ar, arvif->vdev_id, arvif->aid,
7456	arvif->bssid,	7456	arvif->bssid,
@@ -7546,7 +7546,7 @@ static int ath11k_start_vdev_delay(struct ieee80211_hw *hw, · 89 unmodified lines
7546	{	7546	{
7547	struct ath11k *ar = hw->priv;	7547	struct ath11k *ar = hw->priv;
7548	struct ath11k_base *ab = ar->ab;	7548	struct ath11k_base *ab = ar->ab;
7549	struct ath11k_vif arvif = (void )vif->drv_priv;	7549	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
7550	int ret;	7550	int ret;
7551		7551
7552	if (WARN_ON(arvif->is_started))	7552	if (WARN_ON(arvif->is_started))
@@ -7596,7 +7596,7 @@ ath11k_mac_op_assign_vif_chanctx(struct ieee80211_hw *hw, · 43 unmodified lines
7596	{	7596	{
7597	struct ath11k *ar = hw->priv;	7597	struct ath11k *ar = hw->priv;
7598	struct ath11k_base *ab = ar->ab;	7598	struct ath11k_base *ab = ar->ab;
7599	struct ath11k_vif arvif = (void )vif->drv_priv;	7599	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
7600	int ret;	7600	int ret;
7601	struct peer_create_params param;	7601	struct peer_create_params param;
7602		7602
@@ -7686,7 +7686,7 @@ ath11k_mac_op_unassign_vif_chanctx(struct ieee80211_hw *hw, · 83 unmodified lines
7686	{	7686	{
7687	struct ath11k *ar = hw->priv;	7687	struct ath11k *ar = hw->priv;
7688	struct ath11k_base *ab = ar->ab;	7688	struct ath11k_base *ab = ar->ab;
7689	struct ath11k_vif arvif = (void )vif->drv_priv;	7689	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
7690	struct ath11k_peer *peer;	7690	struct ath11k_peer *peer;
7691	int ret;	7691	int ret;
7692		7692
@@ -8307,7 +8307,7 @@ ath11k_mac_op_set_bitrate_mask(struct ieee80211_hw *hw, · 614 unmodified lines
8307	struct ieee80211_vif *vif,	8307	struct ieee80211_vif *vif,
8308	const struct cfg80211_bitrate_mask *mask)	8308	const struct cfg80211_bitrate_mask *mask)
8309	{	8309	{
8310	struct ath11k_vif arvif = (void )vif->drv_priv;	8310	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
8311	struct cfg80211_chan_def def;	8311	struct cfg80211_chan_def def;
8312	struct ath11k_pdev_cap *cap;	8312	struct ath11k_pdev_cap *cap;
8313	struct ath11k *ar = arvif->ar;	8313	struct ath11k *ar = arvif->ar;
@@ -8904,7 +8904,7 @@ static int ath11k_mac_op_remain_on_channel(struct ieee80211_hw *hw, · 590 unmodified lines
8904	enum ieee80211_roc_type type)	8904	enum ieee80211_roc_type type)
8905	{	8905	{
8906	struct ath11k *ar = hw->priv;	8906	struct ath11k *ar = hw->priv;
8907	struct ath11k_vif arvif = (void )vif->drv_priv;	8907	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
8908	struct scan_req_params arg;	8908	struct scan_req_params arg;
8909	int ret;	8909	int ret;
8910	u32 scan_time_msec;	8910	u32 scan_time_msec;

drivers/net/wireless/ath/ath11k/pci.c+1−1

@@ -1036,7 +1036,7 @@ static void ath11k_pci_exit(void) · 1035 unmodified lines
1036		1036
1037	module_exit(ath11k_pci_exit);	1037	module_exit(ath11k_pci_exit);
1038		1038
1039	MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11ax WLAN PCIe devices");	1039	MODULE_DESCRIPTION("Driver support for Qualcomm Technologies PCIe 802.11ax WLAN devices");
1040	MODULE_LICENSE("Dual BSD/GPL");	1040	MODULE_LICENSE("Dual BSD/GPL");
1041		1041
1042	/* firmware files */	1042	/* firmware files */

drivers/net/wireless/ath/ath11k/qmi.h+0−2

 int ath11k_qmi_firmware_start(struct ath11k_base *ab,
 			      u32 mode);
 void ath11k_qmi_firmware_stop(struct ath11k_base *ab);
-void ath11k_qmi_event_work(struct work_struct *work);
-void ath11k_qmi_msg_recv_work(struct work_struct *work);
 void ath11k_qmi_deinit_service(struct ath11k_base *ab);
 int ath11k_qmi_init_service(struct ath11k_base *ab);
 void ath11k_qmi_free_resource(struct ath11k_base *ab);

drivers/net/wireless/ath/ath11k/testmode.c+1−1

@@ -350,7 +350,7 @@ static int ath11k_tm_cmd_wmi(struct ath11k ar, struct nlattr tb[], · 349 unmodified lines
350	if (ar->ab->fw_mode != ATH11K_FIRMWARE_MODE_FTM &&	350	if (ar->ab->fw_mode != ATH11K_FIRMWARE_MODE_FTM &&
351	(tag == WMI_TAG_VDEV_SET_PARAM_CMD \|\| tag == WMI_TAG_UNIT_TEST_CMD)) {	351	(tag == WMI_TAG_VDEV_SET_PARAM_CMD \|\| tag == WMI_TAG_UNIT_TEST_CMD)) {
352	if (vif) {	352	if (vif) {
353	arvif = (struct ath11k_vif *)vif->drv_priv;	353	arvif = ath11k_vif_to_arvif(vif);
354	*ptr = arvif->vdev_id;	354	*ptr = arvif->vdev_id;
355	} else {	355	} else {
356	ret = -EINVAL;	356	ret = -EINVAL;

drivers/net/wireless/ath/ath12k/ce.h+0−3

 void ath12k_ce_free_pipes(struct ath12k_base *ab);
 int ath12k_ce_get_attr_flags(struct ath12k_base *ab, int ce_id);
 void ath12k_ce_poll_send_completed(struct ath12k_base *ab, u8 pipe_id);
-int ath12k_ce_map_service_to_pipe(struct ath12k_base *ab, u16 service_id,
-				  u8 *ul_pipe, u8 *dl_pipe);
-int ath12k_ce_attr_attach(struct ath12k_base *ab);
 void ath12k_ce_get_shadow_config(struct ath12k_base *ab,
 				 u32 **shadow_cfg, u32 *shadow_cfg_len);
 #endif

drivers/net/wireless/ath/ath12k/core.h+0−1

@@ -788,7 +788,6 @@ int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab, · 787 unmodified lines
788	int ath12k_core_fetch_bdf(struct ath12k_base *ath12k,	788	int ath12k_core_fetch_bdf(struct ath12k_base *ath12k,
789	struct ath12k_board_data *bd);	789	struct ath12k_board_data *bd);
790	void ath12k_core_free_bdf(struct ath12k_base ab, struct ath12k_board_data bd);	790	void ath12k_core_free_bdf(struct ath12k_base ab, struct ath12k_board_data bd);
791	int ath12k_core_check_dt(struct ath12k_base *ath12k);
792		791
793	void ath12k_core_halt(struct ath12k *ar);	792	void ath12k_core_halt(struct ath12k *ar);
794	int ath12k_core_resume(struct ath12k_base *ab);	793	int ath12k_core_resume(struct ath12k_base *ab);

drivers/net/wireless/ath/ath12k/dp.c+29−1

 	struct ath12k_dp *dp = &ab->dp;
 	struct sk_buff *skb;
 	int i;
+	u32 pool_id, tx_spt_page;
 	if (!dp->spt_info)
 		return;
 		dev_kfree_skb_any(skb);
 	}
+	for (i = 0; i < ATH12K_NUM_RX_SPT_PAGES; i++) {
+		if (!dp->spt_info->rxbaddr[i])
+			continue;
+		kfree(dp->spt_info->rxbaddr[i]);
+		dp->spt_info->rxbaddr[i] = NULL;
+	}
 	spin_unlock_bh(&dp->rx_desc_lock);
 	/* TX Descriptor cleanup */
 		spin_unlock_bh(&dp->tx_desc_lock[i]);
 	}
+	for (pool_id = 0; pool_id < ATH12K_HW_MAX_QUEUES; pool_id++) {
+		spin_lock_bh(&dp->tx_desc_lock[pool_id]);
+		for (i = 0; i < ATH12K_TX_SPT_PAGES_PER_POOL; i++) {
+			tx_spt_page = i + pool_id * ATH12K_TX_SPT_PAGES_PER_POOL;
+			if (!dp->spt_info->txbaddr[tx_spt_page])
+				continue;
+			kfree(dp->spt_info->txbaddr[tx_spt_page]);
+			dp->spt_info->txbaddr[tx_spt_page] = NULL;
+		}
+		spin_unlock_bh(&dp->tx_desc_lock[pool_id]);
+	}
 	/* unmap SPT pages */
 	for (i = 0; i < dp->num_spt_pages; i++) {
 		if (!dp->spt_info[i].vaddr)
 			return -ENOMEM;
 		}
+		dp->spt_info->rxbaddr[i] = &rx_descs[0];
 		for (j = 0; j < ATH12K_MAX_SPT_ENTRIES; j++) {
 			rx_descs[j].cookie = ath12k_dp_cc_cookie_gen(i, j);
 			rx_descs[j].magic = ATH12K_DP_RX_DESC_MAGIC;
 				return -ENOMEM;
 			}
+			tx_spt_page = i + pool_id * ATH12K_TX_SPT_PAGES_PER_POOL;
+			dp->spt_info->txbaddr[tx_spt_page] = &tx_descs[0];
 			for (j = 0; j < ATH12K_MAX_SPT_ENTRIES; j++) {
-				tx_spt_page = i + pool_id * ATH12K_TX_SPT_PAGES_PER_POOL;
 				ppt_idx = ATH12K_NUM_RX_SPT_PAGES + tx_spt_page;
 				tx_descs[j].desc_id = ath12k_dp_cc_cookie_gen(ppt_idx, j);
 				tx_descs[j].pool_id = pool_id;

drivers/net/wireless/ath/ath12k/dp.h+3−1

 struct ath12k_spt_info {
 	dma_addr_t paddr;
 	u64 *vaddr;
+	struct ath12k_rx_desc_info *rxbaddr[ATH12K_NUM_RX_SPT_PAGES];
+	struct ath12k_tx_desc_info *txbaddr[ATH12K_NUM_TX_SPT_PAGES];
 };
 struct ath12k_reo_queue_ref {
  *          b'24    - status_swap: 1 is to swap status TLV
  *          b'25    - pkt_swap:  1 is to swap packet TLV
  *          b'26:31 - rsvd1:  reserved for future use
- * dword1 - b'0:16  - ring_buffer_size: size of bufferes referenced by rx ring,
+ * dword1 - b'0:16  - ring_buffer_size: size of buffers referenced by rx ring,
  *                    in byte units.
  *                    Valid only for HW_TO_SW_RING and SW_TO_HW_RING
  *        - b'16:31 - rsvd2: Reserved for future use

drivers/net/wireless/ath/ath12k/dp_rx.c+1−1

@@ -3027,7 +3027,7 @@ static int ath12k_dp_rx_h_defrag_reo_reinject(struct ath12k *ar, · 3026 unmodified lines
3027	desc_info->cookie,	3027	desc_info->cookie,
3028	HAL_RX_BUF_RBM_SW3_BM);	3028	HAL_RX_BUF_RBM_SW3_BM);
3029		3029
3030	/* Fill mpdu details into reo entrace ring */	3030	/* Fill mpdu details into reo entrance ring */
3031	srng = &ab->hal.srng_list[dp->reo_reinject_ring.ring_id];	3031	srng = &ab->hal.srng_list[dp->reo_reinject_ring.ring_id];
3032		3032
3033	spin_lock_bh(&srng->lock);	3033	spin_lock_bh(&srng->lock);

drivers/net/wireless/ath/ath12k/dp_tx.c+1−1

@@ -301,7 +301,7 @@ tcl_ring_sel: · 300 unmodified lines
301	spin_unlock_bh(&tcl_ring->lock);	301	spin_unlock_bh(&tcl_ring->lock);
302	ret = -ENOMEM;	302	ret = -ENOMEM;
303		303
304	/* Checking for available tcl descritors in another ring in	304	/* Checking for available tcl descriptors in another ring in
305	* case of failure due to full tcl ring now, is better than	305	* case of failure due to full tcl ring now, is better than
306	* checking this ring earlier for each pkt tx.	306	* checking this ring earlier for each pkt tx.
307	* Restart ring selection if some rings are not checked yet.	307	* Restart ring selection if some rings are not checked yet.

drivers/net/wireless/ath/ath12k/mac.c+3−4

 	mutex_lock(&ar->conf_mutex);
-	changed_flags &= SUPPORTED_FILTERS;
 	*total_flags &= SUPPORTED_FILTERS;
 	ar->filter_flags = *total_flags;
 			    "fail to set monitor filter: %d\n", ret);
 	}
 	ath12k_dbg(ar->ab, ATH12K_DBG_MAC,
-		   "changed_flags:0x%x, total_flags:0x%x, reset_flag:%d\n",
+		   "total_flags:0x%x, reset_flag:%d\n",
-		   changed_flags, *total_flags, reset_flag);
+		   *total_flags, reset_flag);
 	mutex_unlock(&ar->conf_mutex);
 }
 			/* After trigger disconnect, then upper layer will
 			 * trigger connect again, then the PN number of
 			 * upper layer will be reset to keep up with AP
-			 * side, hence PN number mis-match will not happened.
+			 * side, hence PN number mismatch will not happen.
 			 */
 			if (arvif->is_up &&
 			    arvif->vdev_type == WMI_VDEV_TYPE_STA &&

drivers/net/wireless/ath/ath12k/pci.c+1−1

@@ -1409,5 +1409,5 @@ static void ath12k_pci_exit(void) · 1408 unmodified lines
1409		1409
1410	module_exit(ath12k_pci_exit);	1410	module_exit(ath12k_pci_exit);
1411		1411
1412	MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11be WLAN PCIe devices");	1412	MODULE_DESCRIPTION("Driver support for Qualcomm Technologies PCIe 802.11be WLAN devices");
1413	MODULE_LICENSE("Dual BSD/GPL");	1413	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/ath/ath12k/qmi.h+0−2

@@ -562,8 +562,6 @@ struct qmi_wlanfw_wlan_cfg_resp_msg_v01 { · 561 unmodified lines
562	int ath12k_qmi_firmware_start(struct ath12k_base *ab,	562	int ath12k_qmi_firmware_start(struct ath12k_base *ab,
563	u32 mode);	563	u32 mode);
564	void ath12k_qmi_firmware_stop(struct ath12k_base *ab);	564	void ath12k_qmi_firmware_stop(struct ath12k_base *ab);
565	void ath12k_qmi_event_work(struct work_struct *work);
566	void ath12k_qmi_msg_recv_work(struct work_struct *work);
567	void ath12k_qmi_deinit_service(struct ath12k_base *ab);	565	void ath12k_qmi_deinit_service(struct ath12k_base *ab);
568	int ath12k_qmi_init_service(struct ath12k_base *ab);	566	int ath12k_qmi_init_service(struct ath12k_base *ab);
569		567

drivers/net/wireless/ath/ath12k/rx_desc.h+1−1

@@ -221,7 +221,7 @@ struct rx_mpdu_start_qcn9274 { · 220 unmodified lines
221	* PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE'	221	* PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE'
222	* This is set by SW for peers which are being handled by a	222	* This is set by SW for peers which are being handled by a
223	* host SW/accelerator subsystem that also handles packet	223	* host SW/accelerator subsystem that also handles packet
224	* uffer management for WiFi-to-PPE routing.	224	* buffer management for WiFi-to-PPE routing.
225	*	225	*
226	* This is cleared by SW for peers which are being handled	226	* This is cleared by SW for peers which are being handled
227	* by a different subsystem, completely disabling WiFi-to-PPE	227	* by a different subsystem, completely disabling WiFi-to-PPE

drivers/net/wireless/ath/ath12k/wmi.c+13−7

 	if (arg->num_bssid)
 		len += sizeof(*bssid) * arg->num_bssid;
-	len += TLV_HDR_SIZE;
-	if (arg->extraie.len)
-		extraie_len_with_pad =
-			roundup(arg->extraie.len, sizeof(u32));
-	len += extraie_len_with_pad;
 	if (arg->num_hint_bssid)
 		len += TLV_HDR_SIZE +
 		       arg->num_hint_bssid * sizeof(*hint_bssid);
 		len += TLV_HDR_SIZE +
 		       arg->num_hint_s_ssid * sizeof(*s_ssid);
+	len += TLV_HDR_SIZE;
+	if (arg->extraie.len)
+		extraie_len_with_pad =
+			roundup(arg->extraie.len, sizeof(u32));
+	if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
+		len += extraie_len_with_pad;
+	} else {
+		ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
+			    arg->extraie.len);
+		extraie_len_with_pad = 0;
+	}
 	skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
 	if (!skb)
 		return -ENOMEM;
 	tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
 	ptr += TLV_HDR_SIZE;
-	if (arg->extraie.len)
+	if (extraie_len_with_pad)
 		memcpy(ptr, arg->extraie.ptr,
 		       arg->extraie.len);

drivers/net/wireless/ath/ath12k/wmi.h+0−2

 				struct wmi_vdev_install_key_arg *arg);
 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
 					  enum wmi_bss_chan_info_req_type type);
-int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id,
-				      u32 vdev_id, u32 pdev_id);
 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar);
 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
 					u8 peer_addr[ETH_ALEN],

drivers/net/wireless/ath/ath5k/ahb.c+0−1

@@ -115,7 +115,6 @@ static int ath_ahb_probe(struct platform_device *pdev) · 114 unmodified lines
115		115
116	irq = platform_get_irq(pdev, 0);	116	irq = platform_get_irq(pdev, 0);
117	if (irq < 0) {	117	if (irq < 0) {
118	dev_err(&pdev->dev, "no IRQ resource found: %d\n", irq);
119	ret = irq;	118	ret = irq;
120	goto err_iounmap;	119	goto err_iounmap;
121	}	120	}

drivers/net/wireless/ath/ath5k/mac80211-ops.c+0−1

@@ -382,7 +382,6 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, · 381 unmodified lines
382	mfilt[1] = multicast >> 32;	382	mfilt[1] = multicast >> 32;
383		383
384	/* Only deal with supported flags */	384	/* Only deal with supported flags */
385	changed_flags &= SUPPORTED_FIF_FLAGS;
386	*new_flags &= SUPPORTED_FIF_FLAGS;	385	*new_flags &= SUPPORTED_FIF_FLAGS;
387		386
388	/* If HW detects any phy or radar errors, leave those filters on.	387	/* If HW detects any phy or radar errors, leave those filters on.

drivers/net/wireless/ath/ath5k/phy.c+13−16

@@ -26,6 +26,7 @@ · 25 unmodified lines
26		26
27	#include <linux/delay.h>	27	#include <linux/delay.h>
28	#include <linux/slab.h>	28	#include <linux/slab.h>
		29	#include <linux/sort.h>
29	#include <asm/unaligned.h>	30	#include <asm/unaligned.h>
30		31
31	#include "ath5k.h"	32	#include "ath5k.h"
@@ -1554,6 +1555,11 @@ static void ath5k_hw_update_nfcal_hist(struct ath5k_hw *ah, s16 noise_floor) · 1522 unmodified lines
1554	hist->nfval[hist->index] = noise_floor;	1555	hist->nfval[hist->index] = noise_floor;
1555	}	1556	}
1556		1557
		1558	static int cmps16(const void a, const void b)
		1559	{
		1560	return (s16 )a - (s16 )b;
		1561	}
		1562
1557	/**	1563	/**
1558	* ath5k_hw_get_median_noise_floor() - Get median NF from history buffer	1564	* ath5k_hw_get_median_noise_floor() - Get median NF from history buffer
1559	* @ah: The &struct ath5k_hw	1565	* @ah: The &struct ath5k_hw
@@ -1561,25 +1567,16 @@ static void ath5k_hw_update_nfcal_hist(struct ath5k_hw *ah, s16 noise_floor) · 1 unmodified line
1561	static s16	1567	static s16
1562	ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah)	1568	ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah)
1563	{	1569	{
1564	s16 sort[ATH5K_NF_CAL_HIST_MAX];	1570	s16 sorted_nfval[ATH5K_NF_CAL_HIST_MAX];
1565	s16 tmp;	1571	int i;
1566	int i, j;	1572
1567		1573	memcpy(sorted_nfval, ah->ah_nfcal_hist.nfval, sizeof(sorted_nfval));
1568	memcpy(sort, ah->ah_nfcal_hist.nfval, sizeof(sort));	1574	sort(sorted_nfval, ATH5K_NF_CAL_HIST_MAX, sizeof(s16), cmps16, NULL);
1569	for (i = 0; i < ATH5K_NF_CAL_HIST_MAX - 1; i++) {
1570	for (j = 1; j < ATH5K_NF_CAL_HIST_MAX - i; j++) {
1571	if (sort[j] > sort[j - 1]) {
1572	tmp = sort[j];
1573	sort[j] = sort[j - 1];
1574	sort[j - 1] = tmp;
1575	}
1576	}
1577	}
1578	for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) {	1575	for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) {
1579	ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,	1576	ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1580	"cal %d:%d\n", i, sort[i]);	1577	"cal %d:%d\n", i, sorted_nfval[i]);
1581	}	1578	}
1582	return sort[(ATH5K_NF_CAL_HIST_MAX - 1) / 2];	1579	return sorted_nfval[(ATH5K_NF_CAL_HIST_MAX - 1) / 2];
1583	}	1580	}
1584		1581
1585	/**	1582	/**

drivers/net/wireless/ath/ath9k/ath9k.h+0−1

@@ -1129,7 +1129,6 @@ void ath_restart_work(struct ath_softc *sc); · 1128 unmodified lines
1129	int ath9k_init_device(u16 devid, struct ath_softc *sc,	1129	int ath9k_init_device(u16 devid, struct ath_softc *sc,
1130	const struct ath_bus_ops *bus_ops);	1130	const struct ath_bus_ops *bus_ops);
1131	void ath9k_deinit_device(struct ath_softc *sc);	1131	void ath9k_deinit_device(struct ath_softc *sc);
1132	void ath9k_reload_chainmask_settings(struct ath_softc *sc);
1133	u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);	1132	u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
1134	void ath_start_rfkill_poll(struct ath_softc *sc);	1133	void ath_start_rfkill_poll(struct ath_softc *sc);
1135	void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);	1134	void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);

drivers/net/wireless/ath/ath9k/common-spectral.c+16−37

 {
 	struct ath_spec_scan_priv *spec_priv = file->private_data;
 	unsigned long val;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
-	if (kstrtoul(buf, 0, &val))
+	if (ret)
-		return -EINVAL;
+		return ret;
 	if (val > 1)
 		return -EINVAL;
 {
 	struct ath_spec_scan_priv *spec_priv = file->private_data;
 	unsigned long val;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
-	if (kstrtoul(buf, 0, &val))
-		return -EINVAL;
+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
+	if (ret)
+		return ret;
 	if (val > 255)
 		return -EINVAL;
 {
 	struct ath_spec_scan_priv *spec_priv = file->private_data;
 	unsigned long val;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
-	if (kstrtoul(buf, 0, &val))
+	if (ret)
-		return -EINVAL;
+		return ret;
 	if (val > 255)
 		return -EINVAL;
 {
 	struct ath_spec_scan_priv *spec_priv = file->private_data;
 	unsigned long val;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
-	if (kstrtoul(buf, 0, &val))
+	if (ret)
-		return -EINVAL;
+		return ret;
 	if (val > 15)
 		return -EINVAL;

drivers/net/wireless/ath/ath9k/common.h+0−2

 					    struct ath_hw *ah,
 					    struct cfg80211_chan_def *chandef);
 int ath9k_cmn_count_streams(unsigned int chainmask, int max);
-void ath9k_cmn_btcoex_bt_stomp(struct ath_common *common,
-				  enum ath_stomp_type stomp_type);
 void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
 			    u16 new_txpow, u16 *txpower);
 void ath9k_cmn_init_crypto(struct ath_hw *ah);

drivers/net/wireless/ath/ath9k/debug.c+34−74

 }
 static ssize_t write_file_debug(struct file *file, const char __user *user_buf,
-			     size_t count, loff_t *ppos)
+				size_t count, loff_t *ppos)
 {
 	struct ath_softc *sc = file->private_data;
 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 	unsigned long mask;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
+	ret = kstrtoul_from_user(user_buf, count, 0, &mask);
-	if (copy_from_user(buf, user_buf, len))
+	if (ret)
-		return -EFAULT;
+		return ret;
-	buf[len] = '\0';
-	if (kstrtoul(buf, 0, &mask))
-		return -EINVAL;
 	common->debug_mask = mask;
 	return count;
 	struct ath_softc *sc = file->private_data;
 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 	unsigned long ani;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
+	ret = kstrtoul_from_user(user_buf, count, 0, &ani);
-	if (copy_from_user(buf, user_buf, len))
+	if (ret)
-		return -EFAULT;
+		return ret;
-	buf[len] = '\0';
-	if (kstrtoul(buf, 0, &ani))
-		return -EINVAL;
 	if (ani > 1)
 		return -EINVAL;
 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 	struct ath9k_hw_capabilities *pCap = &sc->sc_ah->caps;
 	unsigned long bt_ant_diversity;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
+	ret = kstrtoul_from_user(user_buf, count, 0, &bt_ant_diversity);
-	if (copy_from_user(buf, user_buf, len))
+	if (ret)
-		return -EFAULT;
+		return ret;
 	if (!(pCap->hw_caps & ATH9K_HW_CAP_BT_ANT_DIV))
 		goto exit;
-	buf[len] = '\0';
-	if (kstrtoul(buf, 0, &bt_ant_diversity))
-		return -EINVAL;
 	common->bt_ant_diversity = !!bt_ant_diversity;
 	ath9k_ps_wakeup(sc);
 	ath9k_hw_set_bt_ant_diversity(sc->sc_ah, common->bt_ant_diversity);
 	struct ath_hw *ah = sc->sc_ah;
 	struct ath_common *common = ath9k_hw_common(ah);
 	unsigned long val;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
-	if (kstrtoul(buf, 0, &val))
+	if (ret)
-		return -EINVAL;
+		return ret;
 	if (val != 1)
 		return -EINVAL;
 {
 	struct ath_softc *sc = file->private_data;
 	unsigned long regidx;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
+	ret = kstrtoul_from_user(user_buf, count, 0, &regidx);
-	if (copy_from_user(buf, user_buf, len))
+	if (ret)
-		return -EFAULT;
+		return ret;
-	buf[len] = '\0';
-	if (kstrtoul(buf, 0, &regidx))
-		return -EINVAL;
 	sc->debug.regidx = regidx;
 	return count;
 	struct ath_softc *sc = file->private_data;
 	struct ath_hw *ah = sc->sc_ah;
 	unsigned long regval;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
+	ret = kstrtoul_from_user(user_buf, count, 0, &regval);
-	if (kstrtoul(buf, 0, &regval))
+	if (ret)
-		return -EINVAL;
+		return ret;
 	ath9k_ps_wakeup(sc);
 	REG_WRITE_D(ah, sc->debug.regidx, regval);
 {
 	struct ath_softc *sc = file->private_data;
 	unsigned long val;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
-	if (kstrtoul(buf, 0, &val))
+	if (ret)
-		return -EINVAL;
+		return ret;
 	if (val != 1)
 		return -EINVAL;
 	struct ath_softc *sc = file->private_data;
 	struct ath_hw *ah = sc->sc_ah;
 	unsigned long val;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
 	bool tpc_enabled;
-	len = min(count, sizeof(buf) - 1);
+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
-	if (copy_from_user(buf, user_buf, len))
+	if (ret)
-		return -EFAULT;
+		return ret;
-	buf[len] = '\0';
-	if (kstrtoul(buf, 0, &val))
-		return -EINVAL;
 	if (val > 1)
 		return -EINVAL;
 	sc->debug.debugfs_phy = debugfs_create_dir("ath9k",
 						   sc->hw->wiphy->debugfsdir);
-	if (!sc->debug.debugfs_phy)
+	if (IS_ERR(sc->debug.debugfs_phy))
 		return -ENOMEM;
 #ifdef CONFIG_ATH_DEBUG

drivers/net/wireless/ath/ath9k/dfs_debug.c+4−10

 {
 	struct ath_softc *sc = file->private_data;
 	unsigned long val;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
-	if (kstrtoul(buf, 0, &val))
-		return -EINVAL;
+	ret = kstrtoul_from_user(user_buf, count, 0, &val);
+	if (ret)
+		return ret;
 	if (val == DFS_STATS_RESET_MAGIC)
 		memset(&sc->debug.stats.dfs_stats, 0,
 		       sizeof(sc->debug.stats.dfs_stats));

drivers/net/wireless/ath/ath9k/eeprom_9287.c+1−2

@@ -572,8 +572,7 @@ static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah, · 571 unmodified lines
572	}	572	}
573		573
574	for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) {	574	for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) {
575	bool isHt40CtlMode =	575	bool isHt40CtlMode = pCtlMode[ctlMode] == CTL_2GHT40;
576	(pCtlMode[ctlMode] == CTL_2GHT40) ? true : false;
577		576
578	if (isHt40CtlMode)	577	if (isHt40CtlMode)
579	freq = centers.synth_center;	578	freq = centers.synth_center;

drivers/net/wireless/ath/ath9k/hif_usb.c+1−1

@@ -1432,7 +1432,7 @@ static void ath9k_hif_usb_disconnect(struct usb_interface *interface) · 1431 unmodified lines
1432	{	1432	{
1433	struct usb_device *udev = interface_to_usbdev(interface);	1433	struct usb_device *udev = interface_to_usbdev(interface);
1434	struct hif_device_usb *hif_dev = usb_get_intfdata(interface);	1434	struct hif_device_usb *hif_dev = usb_get_intfdata(interface);
1435	bool unplugged = (udev->state == USB_STATE_NOTATTACHED) ? true : false;	1435	bool unplugged = udev->state == USB_STATE_NOTATTACHED;
1436		1436
1437	if (!hif_dev)	1437	if (!hif_dev)
1438	return;	1438	return;

drivers/net/wireless/ath/ath9k/htc_drv_debug.c+5−10

 	struct ath9k_htc_priv *priv = file->private_data;
 	struct ath_common *common = ath9k_hw_common(priv->ah);
 	unsigned long mask;
-	char buf[32];
+	ssize_t ret;
-	ssize_t len;
-	len = min(count, sizeof(buf) - 1);
-	if (copy_from_user(buf, user_buf, len))
-		return -EFAULT;
-	buf[len] = '\0';
+	ret = kstrtoul_from_user(user_buf, count, 0, &mask);
-	if (kstrtoul(buf, 0, &mask))
+	if (ret)
-		return -EINVAL;
+		return ret;
 	common->debug_mask = mask;
 	return count;
 	priv->debug.debugfs_phy = debugfs_create_dir(KBUILD_MODNAME,
 					     priv->hw->wiphy->debugfsdir);
-	if (!priv->debug.debugfs_phy)
+	if (IS_ERR(priv->debug.debugfs_phy))
 		return -ENOMEM;
 	ath9k_cmn_spectral_init_debug(&priv->spec_priv, priv->debug.debugfs_phy);

drivers/net/wireless/ath/ath9k/htc_drv_main.c+1−2

 	aggr.sta_index = ista->index;
 	aggr.tidno = tid & 0xf;
-	aggr.aggr_enable = (action == IEEE80211_AMPDU_TX_START) ? true : false;
+	aggr.aggr_enable = action == IEEE80211_AMPDU_TX_START;
 	WMI_CMD_BUF(WMI_TX_AGGR_ENABLE_CMDID, &aggr);
 	if (ret)
 	u32 rfilt;
 	mutex_lock(&priv->mutex);
-	changed_flags &= SUPPORTED_FILTERS;
 	*total_flags &= SUPPORTED_FILTERS;
 	if (test_bit(ATH_OP_INVALID, &common->op_flags)) {

drivers/net/wireless/ath/ath9k/main.c+0−1

@@ -1571,7 +1571,6 @@ static void ath9k_configure_filter(struct ieee80211_hw *hw, · 1570 unmodified lines
1571	struct ath_chanctx *ctx;	1571	struct ath_chanctx *ctx;
1572	u32 rfilt;	1572	u32 rfilt;
1573		1573
1574	changed_flags &= SUPPORTED_FILTERS;
1575	*total_flags &= SUPPORTED_FILTERS;	1574	*total_flags &= SUPPORTED_FILTERS;
1576		1575
1577	spin_lock_bh(&sc->chan_lock);	1576	spin_lock_bh(&sc->chan_lock);

drivers/net/wireless/ath/ath9k/tx99.c+4−10

 {
 	struct ath_softc *sc = file->private_data;
 	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
-	char buf[32];
 	bool start;
-	ssize_t len;
+	ssize_t ret;
 	int r;
 	if (count < 1)
 	if (sc->cur_chan->nvifs > 1)
 		return -EOPNOTSUPP;
-	len = min(count, sizeof(buf) - 1);
+	ret = kstrtobool_from_user(user_buf, count, &start);
-	if (copy_from_user(buf, user_buf, len))
+	if (ret)
-		return -EFAULT;
+		return ret;
-	buf[len] = '\0';
-	if (kstrtobool(buf, &start))
-		return -EINVAL;
 	mutex_lock(&sc->mutex);

drivers/net/wireless/ath/ath9k/wmi.c+12−8

 		spin_unlock_irqrestore(&wmi->wmi_lock, flags);
 		goto free_skb;
 	}
-	spin_unlock_irqrestore(&wmi->wmi_lock, flags);
 	/* WMI command response */
 	ath9k_wmi_rsp_callback(wmi, skb);
+	spin_unlock_irqrestore(&wmi->wmi_lock, flags);
 free_skb:
 	kfree_skb(skb);
 static int ath9k_wmi_cmd_issue(struct wmi *wmi,
 			       struct sk_buff *skb,
-			       enum wmi_cmd_id cmd, u16 len)
+			       enum wmi_cmd_id cmd, u16 len,
+			       u8 *rsp_buf, u32 rsp_len)
 {
 	struct wmi_cmd_hdr *hdr;
 	unsigned long flags;
 	hdr->seq_no = cpu_to_be16(++wmi->tx_seq_id);
 	spin_lock_irqsave(&wmi->wmi_lock, flags);
+	/* record the rsp buffer and length */
+	wmi->cmd_rsp_buf = rsp_buf;
+	wmi->cmd_rsp_len = rsp_len;
 	wmi->last_seq_id = wmi->tx_seq_id;
 	spin_unlock_irqrestore(&wmi->wmi_lock, flags);
 	struct ath_common *common = ath9k_hw_common(ah);
 	u16 headroom = sizeof(struct htc_frame_hdr) +
 		       sizeof(struct wmi_cmd_hdr);
+	unsigned long time_left, flags;
 	struct sk_buff *skb;
-	unsigned long time_left;
 	int ret = 0;
 	if (ah->ah_flags & AH_UNPLUGGED)
 		goto out;
 	}
-	/* record the rsp buffer and length */
+	ret = ath9k_wmi_cmd_issue(wmi, skb, cmd_id, cmd_len, rsp_buf, rsp_len);
-	wmi->cmd_rsp_buf = rsp_buf;
-	wmi->cmd_rsp_len = rsp_len;
-	ret = ath9k_wmi_cmd_issue(wmi, skb, cmd_id, cmd_len);
 	if (ret)
 		goto out;
 	if (!time_left) {
 		ath_dbg(common, WMI, "Timeout waiting for WMI command: %s\n",
 			wmi_cmd_to_name(cmd_id));
+		spin_lock_irqsave(&wmi->wmi_lock, flags);
 		wmi->last_seq_id = 0;
+		spin_unlock_irqrestore(&wmi->wmi_lock, flags);
 		mutex_unlock(&wmi->op_mutex);
 		return -ETIMEDOUT;
 	}

drivers/net/wireless/ath/key.c+1−1

@@ -104,7 +104,7 @@ bool ath_hw_keysetmac(struct ath_common common, u16 entry, const u8 mac) · 103 unmodified lines
104	* Not setting this bit allows the hardware to use the key	104	* Not setting this bit allows the hardware to use the key
105	* for multicast frame decryption.	105	* for multicast frame decryption.
106	*/	106	*/
107	if (mac[0] & 0x01)	107	if (is_multicast_ether_addr(mac))
108	unicast_flag = 0;	108	unicast_flag = 0;
109		109
110	macLo = get_unaligned_le32(mac);	110	macLo = get_unaligned_le32(mac);

drivers/net/wireless/atmel/at76c50x-usb.c+4−4

drivers/net/wireless/intel/ipw2x00/ipw2200.c+12−27

@@ -1176,23 +1176,20 @@ static ssize_t debug_level_show(struct device_driver d, char buf) · 1175 unmodified lines
1176	static ssize_t debug_level_store(struct device_driver d, const char buf,	1176	static ssize_t debug_level_store(struct device_driver d, const char buf,
1177	size_t count)	1177	size_t count)
1178	{	1178	{
1179	char p = (char )buf;	1179	unsigned long val;
1180	u32 val;
1181		1180
1182	if (p[1] == 'x' \|\| p[1] == 'X' \|\| p[0] == 'x' \|\| p[0] == 'X') {	1181	int result = kstrtoul(buf, 0, &val);
1183	p++;	1182
1184	if (p[0] == 'x' \|\| p[0] == 'X')	1183	if (result == -EINVAL)
1185	p++;
1186	val = simple_strtoul(p, &p, 16);
1187	} else
1188	val = simple_strtoul(p, &p, 10);
1189	if (p == buf)
1190	printk(KERN_INFO DRV_NAME	1184	printk(KERN_INFO DRV_NAME
1191	": %s is not in hex or decimal form.\n", buf);	1185	": %s is not in hex or decimal form.\n", buf);
		1186	else if (result == -ERANGE)
		1187	printk(KERN_INFO DRV_NAME
		1188	": %s has overflowed.\n", buf);
1192	else	1189	else
1193	ipw_debug_level = val;	1190	ipw_debug_level = val;
1194		1191
1195	return strnlen(buf, count);	1192	return count;
1196	}	1193	}
1197	static DRIVER_ATTR_RW(debug_level);	1194	static DRIVER_ATTR_RW(debug_level);
1198		1195
@@ -1461,25 +1458,13 @@ static ssize_t scan_age_store(struct device d, struct device_attribute attr, · 262 unmodified lines
1461	{	1458	{
1462	struct ipw_priv *priv = dev_get_drvdata(d);	1459	struct ipw_priv *priv = dev_get_drvdata(d);
1463	struct net_device *dev = priv->net_dev;	1460	struct net_device *dev = priv->net_dev;
1464	char buffer[] = "00000000";
1465	unsigned long len =
1466	(sizeof(buffer) - 1) > count ? count : sizeof(buffer) - 1;
1467	unsigned long val;
1468	char *p = buffer;
1469		1461
1470	IPW_DEBUG_INFO("enter\n");	1462	IPW_DEBUG_INFO("enter\n");
1471		1463
1472	strncpy(buffer, buf, len);	1464	unsigned long val;
1473	buffer[len] = 0;	1465	int result = kstrtoul(buf, 0, &val);
1474		1466
1475	if (p[1] == 'x' \|\| p[1] == 'X' \|\| p[0] == 'x' \|\| p[0] == 'X') {	1467	if (result == -EINVAL \|\| result == -ERANGE) {
1476	p++;
1477	if (p[0] == 'x' \|\| p[0] == 'X')
1478	p++;
1479	val = simple_strtoul(p, &p, 16);
1480	} else
1481	val = simple_strtoul(p, &p, 10);
1482	if (p == buffer) {
1483	IPW_DEBUG_INFO("%s: user supplied invalid value.\n", dev->name);	1468	IPW_DEBUG_INFO("%s: user supplied invalid value.\n", dev->name);
1484	} else {	1469	} else {
1485	priv->ieee->scan_age = val;	1470	priv->ieee->scan_age = val;
@@ -1487,7 +1472,7 @@ static ssize_t scan_age_store(struct device d, struct device_attribute attr, · 1 unmodified line
1487	}	1472	}
1488		1473
1489	IPW_DEBUG_INFO("exit\n");	1474	IPW_DEBUG_INFO("exit\n");
1490	return len;	1475	return count;
1491	}	1476	}
1492		1477
1493	static DEVICE_ATTR_RW(scan_age);	1478	static DEVICE_ATTR_RW(scan_age);

drivers/net/wireless/intel/iwlwifi/fw/acpi.c+5−0

 			DMI_MATCH(DMI_SYS_VENDOR, "Alienware"),
 		},
 	},
+	{ .ident = "RAZER",
+	  .matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Razer"),
+		},
+	},
 	{}
 };

drivers/net/wireless/intel/iwlwifi/fw/api/debug.h+7−2

 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
 /*
- * Copyright (C) 2005-2014, 2018-2022 Intel Corporation
+ * Copyright (C) 2005-2014, 2018-2023 Intel Corporation
  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
  * Copyright (C) 2016-2017 Intel Deutschland GmbH
  */
 	 * &struct iwl_dbg_host_event_cfg_cmd
 	 */
 	HOST_EVENT_CFG = 0x3,
+	/**
+	 * @INVALID_WR_PTR_CMD: invalid write pointer, set in the TFD
+	 *	when it's not in use
+	 */
+	INVALID_WR_PTR_CMD = 0x6,
 	/**
 	 * @DBGC_SUSPEND_RESUME:
 	 * DBGC suspend/resume commad. Uses a single dword as data:
 #define DRAM_INFO_SECOND_MAGIC_WORD 0x89ABCDEF
 /**
- * struct iwL_dram_info - DRAM fragments allocation struct
+ * struct iwl_dram_info - DRAM fragments allocation struct
  *
  * Driver will fill in the first 1K(+) of the pointed DRAM fragment
  *

drivers/net/wireless/intel/iwlwifi/fw/dump.c+1−2

@@ -182,8 +182,7 @@ static void iwl_fwrt_dump_lmac_error_log(struct iwl_fw_runtime *fwrt, u8 lmac_nu · 181 unmodified lines
182	base = fwrt->fw->inst_errlog_ptr;	182	base = fwrt->fw->inst_errlog_ptr;
183	}	183	}
184		184
185	if ((fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ && !base) \|\|	185	if (!base) {
186	(fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_BZ && base < 0x400000)) {
187	IWL_ERR(fwrt,	186	IWL_ERR(fwrt,
188	"Not valid error log pointer 0x%08X for %s uCode\n",	187	"Not valid error log pointer 0x%08X for %s uCode\n",
189	base,	188	base,

drivers/net/wireless/intel/iwlwifi/iwl-fh.h+2−0

@@ -565,6 +565,8 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(struct iwl_trans *trans, · 564 unmodified lines
565	#define RX_QUEUE_MASK 255	565	#define RX_QUEUE_MASK 255
566	#define RX_QUEUE_SIZE_LOG 8	566	#define RX_QUEUE_SIZE_LOG 8
567		567
		568	#define IWL_DEFAULT_RX_QUEUE 0
		569
568	/**	570	/**
569	* struct iwl_rb_status - reserve buffer status	571	* struct iwl_rb_status - reserve buffer status
570	* host memory mapped FH registers	572	* host memory mapped FH registers

drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c+2−0

 	case IWL_CFG_RF_TYPE_GF:
 	case IWL_CFG_RF_TYPE_MR:
 	case IWL_CFG_RF_TYPE_MS:
+	case IWL_CFG_RF_TYPE_FM:
+	case IWL_CFG_RF_TYPE_WH:
 		iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |=
 			IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU;
 		if (!is_ap)

drivers/net/wireless/intel/iwlwifi/iwl-trans.h+5−2

 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
 /*
- * Copyright (C) 2005-2014, 2018-2022 Intel Corporation
+ * Copyright (C) 2005-2014, 2018-2023 Intel Corporation
  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
  * Copyright (C) 2016-2017 Intel Deutschland GmbH
  */
  * @mbx_addr_1_step: step address data 1
  * @pcie_link_speed: current PCIe link speed (%PCI_EXP_LNKSTA_CLS_*),
  *	only valid for discrete (not integrated) NICs
+ * @invalid_tx_cmd: invalid TX command buffer
  */
 struct iwl_trans {
 	bool csme_own;
 	u8 pcie_link_speed;
+	struct iwl_dma_ptr invalid_tx_cmd;
 	/* pointer to trans specific struct */
 	/*Ensure that this pointer will always be aligned to sizeof pointer */
 	char trans_specific[] __aligned(sizeof(void *));
 {
 	u32 value;
-	if (WARN_ON(iwl_trans_read_mem(trans, addr, &value, 1)))
+	if (iwl_trans_read_mem(trans, addr, &value, 1))
 		return 0xa5a5a5a5;
 	return value;

drivers/net/wireless/intel/iwlwifi/mei/main.c+36−34

 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (C) 2021-2022 Intel Corporation
+ * Copyright (C) 2021-2023 Intel Corporation
  */
 #include <linux/etherdevice.h>
 		iwl_mei_send_sap_msg_payload(mei->cldev, &sar_msg.hdr);
 	}
-	ether_addr_copy(nic_info_msg.mac_address, iwl_mei_cache.mac_address);
+	if (is_valid_ether_addr(iwl_mei_cache.mac_address)) {
-	ether_addr_copy(nic_info_msg.nvm_address, iwl_mei_cache.nvm_address);
+		ether_addr_copy(nic_info_msg.mac_address,
-	iwl_mei_send_sap_msg_payload(mei->cldev, &nic_info_msg.hdr);
+				iwl_mei_cache.mac_address);
+		ether_addr_copy(nic_info_msg.nvm_address,
+				iwl_mei_cache.nvm_address);
+		iwl_mei_send_sap_msg_payload(mei->cldev, &nic_info_msg.hdr);
+	}
 	iwl_mei_send_sap_msg_payload(mei->cldev, &rfkill_msg.hdr);
 }
 	mei = mei_cldev_get_drvdata(iwl_mei_global_cldev);
-	if (!mei && !mei->amt_enabled)
+	if (!mei || !mei->amt_enabled)
 		goto out;
 	iwl_mei_send_sap_msg_payload(mei->cldev, &msg.hdr);
 	mei = mei_cldev_get_drvdata(iwl_mei_global_cldev);
-	if (!mei && !mei->amt_enabled)
+	if (!mei || !mei->amt_enabled)
 		goto out;
 	iwl_mei_send_sap_msg_payload(mei->cldev, &msg.hdr);
 	mei = mei_cldev_get_drvdata(iwl_mei_global_cldev);
-	if (!mei && !mei->amt_enabled)
+	if (!mei || !mei->amt_enabled)
 		goto out;
 	iwl_mei_send_sap_msg_payload(mei->cldev, &msg.hdr);
 	mei = mei_cldev_get_drvdata(iwl_mei_global_cldev);
-	if (!mei && !mei->amt_enabled)
+	if (!mei || !mei->amt_enabled)
 		goto out;
 	iwl_mei_send_sap_msg_payload(mei->cldev, &msg.hdr);
 	mei = mei_cldev_get_drvdata(iwl_mei_global_cldev);
-	if (!mei && !mei->amt_enabled)
+	if (!mei || !mei->amt_enabled)
 		goto out;
 	iwl_mei_send_sap_msg_payload(mei->cldev, &msg.hdr);
 	mei = mei_cldev_get_drvdata(iwl_mei_global_cldev);
-	if (!mei && !mei->amt_enabled)
+	if (!mei || !mei->amt_enabled)
 		goto out;
 	memcpy(msg.sar_chain_info_table, power_limit, sizeof(msg.sar_chain_info_table));
 		struct iwl_mei *mei =
 			mei_cldev_get_drvdata(iwl_mei_global_cldev);
-		iwl_mei_send_sap_msg(mei->cldev, SAP_MSG_NOTIF_WIFIDR_DOWN);
+		if (mei->amt_enabled)
+			iwl_mei_send_sap_msg(mei->cldev,
+					     SAP_MSG_NOTIF_WIFIDR_DOWN);
 		mei->got_ownership = false;
 	}
 	mutex_lock(&iwl_mei_mutex);
-	if (mei->amt_enabled) {
+	/* Tell CSME that we are going down so that it won't access the
-		/*
+	 * memory anymore, make sure this message goes through immediately.
-		 * Tell CSME that we are going down so that it won't access the
+	 */
-		 * memory anymore, make sure this message goes through immediately.
+	mei->csa_throttled = false;
-		 */
+	iwl_mei_send_sap_msg(mei->cldev,
-		mei->csa_throttled = false;
+			     SAP_MSG_NOTIF_HOST_GOES_DOWN);
-		iwl_mei_send_sap_msg(mei->cldev,
-				     SAP_MSG_NOTIF_HOST_GOES_DOWN);
-		for (i = 0; i < SEND_SAP_MAX_WAIT_ITERATION; i++) {
-			if (!iwl_mei_host_to_me_data_pending(mei))
-				break;
-			msleep(20);
+	for (i = 0; i < SEND_SAP_MAX_WAIT_ITERATION; i++) {
-		}
+		if (!iwl_mei_host_to_me_data_pending(mei))
+			break;
-		/*
+		msleep(20);
-		 * If we couldn't make sure that CSME saw the HOST_GOES_DOWN
-		 * message, it means that it will probably keep reading memory
-		 * that we are going to unmap and free, expect IOMMU error
-		 * messages.
-		 */
-		if (i == SEND_SAP_MAX_WAIT_ITERATION)
-			dev_err(&mei->cldev->dev,
-				"Couldn't get ACK from CSME on HOST_GOES_DOWN message\n");
 	}
+	/* If we couldn't make sure that CSME saw the HOST_GOES_DOWN
+	 * message, it means that it will probably keep reading memory
+	 * that we are going to unmap and free, expect IOMMU error
+	 * messages.
+	 */
+	if (i == SEND_SAP_MAX_WAIT_ITERATION)
+		dev_err(&mei->cldev->dev,
+			"Couldn't get ACK from CSME on HOST_GOES_DOWN message\n");
 	mutex_unlock(&iwl_mei_mutex);
 	/*

drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c+3−8

 	ieee80211_hw_set(hw, STA_MMPDU_TXQ);
 	/* Set this early since we need to have it for the check below */
-	if (mvm->mld_api_is_used &&
+	if (mvm->mld_api_is_used && mvm->nvm_data->sku_cap_11be_enable &&
-	    mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
+	    !iwlwifi_mod_params.disable_11ax &&
+	    !iwlwifi_mod_params.disable_11be)
 		hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_MLO;
 	/* With MLD FW API, it tracks timing by itself,
 		return;
 	}
-	if (vif->type != NL80211_IFTYPE_STATION)
-		return;
 	/* Make sure we're done with the deferred traffic before flushing */
 	flush_work(&mvm->add_stream_wk);
 			ap_sta_done = true;
 		}
-		/* make sure only TDLS peers or the AP are flushed */
-		WARN_ON_ONCE(sta != mvmvif->ap_sta && !sta->tdls);
 		if (drop) {
 			if (iwl_mvm_flush_sta(mvm, mvmsta, false))
 				IWL_ERR(mvm, "flush request fail\n");

drivers/net/wireless/intel/iwlwifi/pcie/drv.c+1−10

 	else
 		sd_reg_ver_addr = SD_REG_VER;
-	if (!iwl_trans_grab_nic_access(iwl_trans)) {
-		IWL_ERR(iwl_trans, "Failed to grab nic access before reading crf id\n");
-		ret = -EIO;
-		goto out;
-	}
 	/* Enable access to peripheral registers */
 	val = iwl_read_umac_prph_no_grab(iwl_trans, WFPM_CTRL_REG);
 	val |= ENABLE_WFPM;
 		 iwl_trans->hw_crf_id, iwl_trans->hw_cnv_id,
 		 iwl_trans->hw_wfpm_id);
-	iwl_trans_release_nic_access(iwl_trans);
-out:
 	return ret;
 }
 		if (ret)
 			goto out_free_trans;
 		if (iwl_trans_grab_nic_access(iwl_trans)) {
+			get_crf_id(iwl_trans);
 			/* all good */
 			iwl_trans_release_nic_access(iwl_trans);
 		} else {
 	}
 	iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
-	get_crf_id(iwl_trans);
 	/*
 	 * The RF_ID is set to zero in blank OTP so read version to

drivers/net/wireless/intel/iwlwifi/pcie/internal.h+1−3

 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
 /*
- * Copyright (C) 2003-2015, 2018-2022 Intel Corporation
+ * Copyright (C) 2003-2015, 2018-2023 Intel Corporation
  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
  * Copyright (C) 2016-2017 Intel Deutschland GmbH
  */
  * @ucode_write_complete: indicates that the ucode has been copied.
  * @ucode_write_waitq: wait queue for uCode load
  * @cmd_queue - command queue number
- * @def_rx_queue - default rx queue number
  * @rx_buf_size: Rx buffer size
  * @scd_set_active: should the transport configure the SCD for HCMD queue
  * @rx_page_order: page order for receive buffer size
 	wait_queue_head_t ucode_write_waitq;
 	wait_queue_head_t sx_waitq;
-	u8 def_rx_queue;
 	u8 n_no_reclaim_cmds;
 	u8 no_reclaim_cmds[MAX_NO_RECLAIM_CMDS];
 	u16 num_rx_bufs;

drivers/net/wireless/intel/iwlwifi/pcie/rx.c+1−1

@@ -1373,7 +1373,7 @@ static void iwl_pcie_rx_handle_rb(struct iwl_trans *trans, · 1372 unmodified lines
1373	}	1373	}
1374	}	1374	}
1375		1375
1376	if (rxq->id == trans_pcie->def_rx_queue)	1376	if (rxq->id == IWL_DEFAULT_RX_QUEUE)
1377	iwl_op_mode_rx(trans->op_mode, &rxq->napi,	1377	iwl_op_mode_rx(trans->op_mode, &rxq->napi,
1378	&rxcb);	1378	&rxcb);
1379	else	1379	else

drivers/net/wireless/intel/iwlwifi/pcie/trans.c+29−2

@@ -2018,6 +2018,30 @@ void iwl_trans_pcie_free_pnvm_dram_regions(struct iwl_dram_regions *dram_regions · 2017 unmodified lines
2018	memset(desc_dram, 0, sizeof(*desc_dram));	2018	memset(desc_dram, 0, sizeof(*desc_dram));
2019	}	2019	}
2020		2020
		2021	static void iwl_pcie_free_invalid_tx_cmd(struct iwl_trans *trans)
		2022	{
		2023	iwl_pcie_free_dma_ptr(trans, &trans->invalid_tx_cmd);
		2024	}
		2025
		2026	static int iwl_pcie_alloc_invalid_tx_cmd(struct iwl_trans *trans)
		2027	{
		2028	struct iwl_cmd_header_wide bad_cmd = {
		2029	.cmd = INVALID_WR_PTR_CMD,
		2030	.group_id = DEBUG_GROUP,
		2031	.sequence = cpu_to_le16(0xffff),
		2032	.length = cpu_to_le16(0),
		2033	.version = 0,
		2034	};
		2035	int ret;
		2036
		2037	ret = iwl_pcie_alloc_dma_ptr(trans, &trans->invalid_tx_cmd,
		2038	sizeof(bad_cmd));
		2039	if (ret)
		2040	return ret;
		2041	memcpy(trans->invalid_tx_cmd.addr, &bad_cmd, sizeof(bad_cmd));
		2042	return 0;
		2043	}
		2044
2021	void iwl_trans_pcie_free(struct iwl_trans *trans)	2045	void iwl_trans_pcie_free(struct iwl_trans *trans)
2022	{	2046	{
2023	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);	2047	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
@@ -2048,6 +2072,8 @@ void iwl_trans_pcie_free(struct iwl_trans *trans) · 24 unmodified lines
2048	iwl_pcie_free_ict(trans);	2072	iwl_pcie_free_ict(trans);
2049	}	2073	}
2050		2074
		2075	iwl_pcie_free_invalid_tx_cmd(trans);
		2076
2051	iwl_pcie_free_fw_monitor(trans);	2077	iwl_pcie_free_fw_monitor(trans);
2052		2078
2053	iwl_trans_pcie_free_pnvm_dram_regions(&trans_pcie->pnvm_data,	2079	iwl_trans_pcie_free_pnvm_dram_regions(&trans_pcie->pnvm_data,
@@ -3617,8 +3643,6 @@ struct iwl_trans iwl_trans_pcie_alloc(struct pci_dev pdev, · 1563 unmodified lines
3617	PCIE_LINK_STATE_CLKPM);	3643	PCIE_LINK_STATE_CLKPM);
3618	}	3644	}
3619		3645
3620	trans_pcie->def_rx_queue = 0;
3621
3622	pci_set_master(pdev);	3646	pci_set_master(pdev);
3623		3647
3624	addr_size = trans->txqs.tfd.addr_size;	3648	addr_size = trans->txqs.tfd.addr_size;
@@ -3686,6 +3710,9 @@ struct iwl_trans iwl_trans_pcie_alloc(struct pci_dev pdev, · 61 unmodified lines
3686		3710
3687	init_waitqueue_head(&trans_pcie->sx_waitq);	3711	init_waitqueue_head(&trans_pcie->sx_waitq);
3688		3712
		3713	ret = iwl_pcie_alloc_invalid_tx_cmd(trans);
		3714	if (ret)
		3715	goto out_no_pci;
3689		3716
3690	if (trans_pcie->msix_enabled) {	3717	if (trans_pcie->msix_enabled) {
3691	ret = iwl_pcie_init_msix_handler(pdev, trans_pcie);	3718	ret = iwl_pcie_init_msix_handler(pdev, trans_pcie);

drivers/net/wireless/intel/iwlwifi/pcie/tx.c+6−18

 	}
 }
-static inline void iwl_pcie_tfd_set_tb(struct iwl_trans *trans, void *tfd,
-				       u8 idx, dma_addr_t addr, u16 len)
-{
-	struct iwl_tfd *tfd_fh = (void *)tfd;
-	struct iwl_tfd_tb *tb = &tfd_fh->tbs[idx];
-	u16 hi_n_len = len << 4;
-	put_unaligned_le32(addr, &tb->lo);
-	hi_n_len |= iwl_get_dma_hi_addr(addr);
-	tb->hi_n_len = cpu_to_le16(hi_n_len);
-	tfd_fh->num_tbs = idx + 1;
-}
 static int iwl_pcie_txq_build_tfd(struct iwl_trans *trans, struct iwl_txq *txq,
 				  dma_addr_t addr, u16 len, bool reset)
 {
 		 "Unaligned address = %llx\n", (unsigned long long)addr))
 		return -EINVAL;
-	iwl_pcie_tfd_set_tb(trans, tfd, num_tbs, addr, len);
+	iwl_pcie_gen1_tfd_set_tb(trans, tfd, num_tbs, addr, len);
 	return num_tbs;
 }
 	group_id = cmd->hdr.group_id;
 	cmd_id = WIDE_ID(group_id, cmd->hdr.cmd);
-	iwl_txq_gen1_tfd_unmap(trans, meta, txq, index);
+	if (trans->trans_cfg->gen2)
+		iwl_txq_gen2_tfd_unmap(trans, meta,
+				       iwl_txq_get_tfd(trans, txq, index));
+	else
+		iwl_txq_gen1_tfd_unmap(trans, meta, txq, index);
 	/* Input error checking is done when commands are added to queue. */
 	if (meta->flags & CMD_WANT_SKB) {

drivers/net/wireless/intel/iwlwifi/queue/tx.c+78−64

 #include "fw/api/commands.h"
 #include "fw/api/tx.h"
 #include "fw/api/datapath.h"
+#include "fw/api/debug.h"
 #include "queue/tx.h"
 #include "iwl-fh.h"
 #include "iwl-scd.h"
 	return le16_to_cpu(tfd->num_tbs) & 0x1f;
 }
+int iwl_txq_gen2_set_tb(struct iwl_trans *trans, struct iwl_tfh_tfd *tfd,
+			dma_addr_t addr, u16 len)
+{
+	int idx = iwl_txq_gen2_get_num_tbs(trans, tfd);
+	struct iwl_tfh_tb *tb;
+	/* Only WARN here so we know about the issue, but we mess up our
+	 * unmap path because not every place currently checks for errors
+	 * returned from this function - it can only return an error if
+	 * there's no more space, and so when we know there is enough we
+	 * don't always check ...
+	 */
+	WARN(iwl_txq_crosses_4g_boundary(addr, len),
+	     "possible DMA problem with iova:0x%llx, len:%d\n",
+	     (unsigned long long)addr, len);
+	if (WARN_ON(idx >= IWL_TFH_NUM_TBS))
+		return -EINVAL;
+	tb = &tfd->tbs[idx];
+	/* Each TFD can point to a maximum max_tbs Tx buffers */
+	if (le16_to_cpu(tfd->num_tbs) >= trans->txqs.tfd.max_tbs) {
+		IWL_ERR(trans, "Error can not send more than %d chunks\n",
+			trans->txqs.tfd.max_tbs);
+		return -EINVAL;
+	}
+	put_unaligned_le64(addr, &tb->addr);
+	tb->tb_len = cpu_to_le16(len);
+	tfd->num_tbs = cpu_to_le16(idx + 1);
+	return idx;
+}
+static void iwl_txq_set_tfd_invalid_gen2(struct iwl_trans *trans,
+					 struct iwl_tfh_tfd *tfd)
+{
+	tfd->num_tbs = 0;
+	iwl_txq_gen2_set_tb(trans, tfd, trans->invalid_tx_cmd.dma,
+			    trans->invalid_tx_cmd.size);
+}
 void iwl_txq_gen2_tfd_unmap(struct iwl_trans *trans, struct iwl_cmd_meta *meta,
 			    struct iwl_tfh_tfd *tfd)
 {
 					 DMA_TO_DEVICE);
 	}
-	tfd->num_tbs = 0;
+	iwl_txq_set_tfd_invalid_gen2(trans, tfd);
 }
 void iwl_txq_gen2_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq)
 	}
 }
-int iwl_txq_gen2_set_tb(struct iwl_trans *trans, struct iwl_tfh_tfd *tfd,
-			dma_addr_t addr, u16 len)
-{
-	int idx = iwl_txq_gen2_get_num_tbs(trans, tfd);
-	struct iwl_tfh_tb *tb;
-	/*
-	 * Only WARN here so we know about the issue, but we mess up our
-	 * unmap path because not every place currently checks for errors
-	 * returned from this function - it can only return an error if
-	 * there's no more space, and so when we know there is enough we
-	 * don't always check ...
-	 */
-	WARN(iwl_txq_crosses_4g_boundary(addr, len),
-	     "possible DMA problem with iova:0x%llx, len:%d\n",
-	     (unsigned long long)addr, len);
-	if (WARN_ON(idx >= IWL_TFH_NUM_TBS))
-		return -EINVAL;
-	tb = &tfd->tbs[idx];
-	/* Each TFD can point to a maximum max_tbs Tx buffers */
-	if (le16_to_cpu(tfd->num_tbs) >= trans->txqs.tfd.max_tbs) {
-		IWL_ERR(trans, "Error can not send more than %d chunks\n",
-			trans->txqs.tfd.max_tbs);
-		return -EINVAL;
-	}
-	put_unaligned_le64(addr, &tb->addr);
-	tb->tb_len = cpu_to_le16(len);
-	tfd->num_tbs = cpu_to_le16(idx + 1);
-	return idx;
-}
 static struct page *get_workaround_page(struct iwl_trans *trans,
 					struct sk_buff *skb)
 {
 	iwl_force_nmi(trans);
 }
+static void iwl_txq_set_tfd_invalid_gen1(struct iwl_trans *trans,
+					 struct iwl_tfd *tfd)
+{
+	tfd->num_tbs = 0;
+	iwl_pcie_gen1_tfd_set_tb(trans, tfd, 0, trans->invalid_tx_cmd.dma,
+				 trans->invalid_tx_cmd.size);
+}
 int iwl_txq_alloc(struct iwl_trans *trans, struct iwl_txq *txq, int slots_num,
 		  bool cmd_queue)
 {
-	size_t tfd_sz = trans->txqs.tfd.size *
+	size_t num_entries = trans->trans_cfg->gen2 ?
-		trans->trans_cfg->base_params->max_tfd_queue_size;
+		slots_num : trans->trans_cfg->base_params->max_tfd_queue_size;
+	size_t tfd_sz;
 	size_t tb0_buf_sz;
 	int i;
 	if (WARN_ON(txq->entries || txq->tfds))
 		return -EINVAL;
-	if (trans->trans_cfg->gen2)
+	tfd_sz = trans->txqs.tfd.size * num_entries;
-		tfd_sz = trans->txqs.tfd.size * slots_num;
 	timer_setup(&txq->stuck_timer, iwl_txq_stuck_timer, 0);
 	txq->trans = trans;
 	if (!txq->first_tb_bufs)
 		goto err_free_tfds;
+	for (i = 0; i < num_entries; i++) {
+		void *tfd = iwl_txq_get_tfd(trans, txq, i);
+		if (trans->trans_cfg->gen2)
+			iwl_txq_set_tfd_invalid_gen2(trans, tfd);
+		else
+			iwl_txq_set_tfd_invalid_gen1(trans, tfd);
+	}
 	return 0;
 err_free_tfds:
 	dma_free_coherent(trans->dev, tfd_sz, txq->tfds, txq->dma_addr);
 }
 static inline dma_addr_t iwl_txq_gen1_tfd_tb_get_addr(struct iwl_trans *trans,
-						      void *_tfd, u8 idx)
+						      struct iwl_tfd *tfd, u8 idx)
 {
-	struct iwl_tfd *tfd;
+	struct iwl_tfd_tb *tb = &tfd->tbs[idx];
-	struct iwl_tfd_tb *tb;
 	dma_addr_t addr;
 	dma_addr_t hi_len;
-	if (trans->trans_cfg->gen2) {
-		struct iwl_tfh_tfd *tfh_tfd = _tfd;
-		struct iwl_tfh_tb *tfh_tb = &tfh_tfd->tbs[idx];
-		return (dma_addr_t)(le64_to_cpu(tfh_tb->addr));
-	}
-	tfd = _tfd;
-	tb = &tfd->tbs[idx];
 	addr = get_unaligned_le32(&tb->lo);
 	if (sizeof(dma_addr_t) <= sizeof(u32))
 			    struct iwl_txq *txq, int index)
 {
 	int i, num_tbs;
-	void *tfd = iwl_txq_get_tfd(trans, txq, index);
+	struct iwl_tfd *tfd = iwl_txq_get_tfd(trans, txq, index);
 	/* Sanity check on number of chunks */
 	num_tbs = iwl_txq_gen1_tfd_get_num_tbs(trans, tfd);
 	meta->tbs = 0;
-	if (trans->trans_cfg->gen2) {
+	iwl_txq_set_tfd_invalid_gen1(trans, tfd);
-		struct iwl_tfh_tfd *tfd_fh = (void *)tfd;
-		tfd_fh->num_tbs = 0;
-	} else {
-		struct iwl_tfd *tfd_fh = (void *)tfd;
-		tfd_fh->num_tbs = 0;
-	}
 }
 #define IWL_TX_CRC_SIZE 4
 	/* We have only q->n_window txq->entries, but we use
 	 * TFD_QUEUE_SIZE_MAX tfds
 	 */
-	iwl_txq_gen1_tfd_unmap(trans, &txq->entries[idx].meta, txq, rd_ptr);
+	if (trans->trans_cfg->gen2)
+		iwl_txq_gen2_tfd_unmap(trans, &txq->entries[idx].meta,
+				       iwl_txq_get_tfd(trans, txq, rd_ptr));
+	else
+		iwl_txq_gen1_tfd_unmap(trans, &txq->entries[idx].meta,
+				       txq, rd_ptr);
 	/* free SKB */
 	skb = txq->entries[idx].skb;

drivers/net/wireless/intel/iwlwifi/queue/tx.h+16−10

 				      struct sk_buff *skb);
 #endif
 static inline u8 iwl_txq_gen1_tfd_get_num_tbs(struct iwl_trans *trans,
-					      void *_tfd)
+					      struct iwl_tfd *tfd)
 {
-	struct iwl_tfd *tfd;
-	if (trans->trans_cfg->gen2) {
-		struct iwl_tfh_tfd *tfh_tfd = _tfd;
-		return le16_to_cpu(tfh_tfd->num_tbs) & 0x1f;
-	}
-	tfd = (struct iwl_tfd *)_tfd;
 	return tfd->num_tbs & 0x1f;
 }
 	return le16_to_cpu(tb->hi_n_len) >> 4;
 }
+static inline void iwl_pcie_gen1_tfd_set_tb(struct iwl_trans *trans,
+					    struct iwl_tfd *tfd,
+					    u8 idx, dma_addr_t addr, u16 len)
+{
+	struct iwl_tfd_tb *tb = &tfd->tbs[idx];
+	u16 hi_n_len = len << 4;
+	put_unaligned_le32(addr, &tb->lo);
+	hi_n_len |= iwl_get_dma_hi_addr(addr);
+	tb->hi_n_len = cpu_to_le16(hi_n_len);
+	tfd->num_tbs = idx + 1;
+}
 void iwl_txq_gen1_tfd_unmap(struct iwl_trans *trans,
 			    struct iwl_cmd_meta *meta,
 			    struct iwl_txq *txq, int index);

drivers/net/wireless/intersil/orinoco/orinoco_usb.c+6−6

drivers/net/wireless/legacy/rndis_wlan.c+1−1

@@ -1,6 +1,6 @@
1	// SPDX-License-Identifier: GPL-2.0-or-later	1	// SPDX-License-Identifier: GPL-2.0-or-later
2	/*	2	/*
3	* Driver for RNDIS based wireless USB devices.	3	* Driver for RNDIS based USB wireless devices.
4	*	4	*
5	* Copyright (C) 2007 by Bjorge Dijkstra <bjd@jooz.net>	5	* Copyright (C) 2007 by Bjorge Dijkstra <bjd@jooz.net>
6	* Copyright (C) 2008-2009 by Jussi Kivilinna <jussi.kivilinna@iki.fi>	6	* Copyright (C) 2008-2009 by Jussi Kivilinna <jussi.kivilinna@iki.fi>

drivers/net/wireless/marvell/mwifiex/debugfs.c+15−4

 	if (!p)
 		return -ENOMEM;
-	if (!priv || !priv->hist_data)
+	if (!priv || !priv->hist_data) {
-		return -EFAULT;
+		ret = -EFAULT;
+		goto free_and_exit;
+	}
 	phist_data = priv->hist_data;
 	p += sprintf(p, "\n"
 	ret = simple_read_from_buffer(ubuf, count, ppos, (char *)page,
 				      (unsigned long)p - page);
+free_and_exit:
+	free_page(page);
 	return ret;
 }
 	if (IS_ERR(buf))
 		return PTR_ERR(buf);
-	sscanf(buf, "%u %x %x", &reg_type, &reg_offset, &reg_value);
+	if (sscanf(buf, "%u %x %x", &reg_type, &reg_offset, &reg_value) != 3) {
+		ret = -EINVAL;
+		goto done;
+	}
 	if (reg_type == 0 || reg_offset == 0) {
 		ret = -EINVAL;
 	if (IS_ERR(buf))
 		return PTR_ERR(buf);
-	sscanf(buf, "%d %d", &offset, &bytes);
+	if (sscanf(buf, "%d %d", &offset, &bytes) != 2) {
+		ret = -EINVAL;
+		goto done;
+	}
 	if (offset == -1 || bytes == -1) {
 		ret = -EINVAL;

drivers/net/wireless/marvell/mwifiex/decl.h+0−1

@@ -180,7 +180,6 @@ struct mwifiex_rxinfo { · 179 unmodified lines
180	};	180	};
181		181
182	struct mwifiex_txinfo {	182	struct mwifiex_txinfo {
183	u32 status_code;
184	u8 flags;	183	u8 flags;
185	u8 bss_num;	184	u8 bss_num;
186	u8 bss_type;	185	u8 bss_type;

drivers/net/wireless/marvell/mwifiex/init.c+0−2

 	sleep_cfm_buf->action = cpu_to_le16(SLEEP_CONFIRM);
 	sleep_cfm_buf->resp_ctrl = cpu_to_le16(RESP_NEEDED);
-	memset(&adapter->sleep_params, 0, sizeof(adapter->sleep_params));
 	memset(&adapter->sleep_period, 0, sizeof(adapter->sleep_period));
 	adapter->tx_lock_flag = false;
 	adapter->null_pkt_interval = 0;
 	adapter->fw_bands = 0;
 	adapter->config_bands = 0;
 	adapter->adhoc_start_band = 0;
-	adapter->scan_channels = NULL;
 	adapter->fw_release_number = 0;
 	adapter->fw_cap_info = 0;
 	memset(&adapter->upld_buf, 0, sizeof(adapter->upld_buf));

drivers/net/wireless/marvell/mwifiex/main.h+4−16

 	u8 data_rates[MWIFIEX_SUPPORTED_RATES];
 };
-struct mwifiex_sleep_params {
-	u16 sp_error;
-	u16 sp_offset;
-	u16 sp_stable_time;
-	u8 sp_cal_control;
-	u8 sp_ext_sleep_clk;
-	u16 sp_reserved;
-};
 struct mwifiex_sleep_period {
 	u16 period;
 	u16 reserved;
 	struct cfg80211_chan_def dfs_chandef;
 	struct workqueue_struct *dfs_cac_workqueue;
 	struct delayed_work dfs_cac_work;
-	struct timer_list dfs_chan_switch_timer;
 	struct workqueue_struct *dfs_chan_sw_workqueue;
 	struct delayed_work dfs_chan_sw_work;
 	struct cfg80211_beacon_data beacon_after;
 	struct work_struct main_work;
 	struct workqueue_struct *rx_workqueue;
 	struct work_struct rx_work;
-	struct workqueue_struct *dfs_workqueue;
-	struct work_struct dfs_work;
 	bool rx_work_enabled;
 	bool rx_processing;
 	bool delay_main_work;
 	u8 fw_bands;
 	u8 adhoc_start_band;
 	u8 config_bands;
-	struct mwifiex_chan_scan_param_set *scan_channels;
 	u8 tx_lock_flag;
-	struct mwifiex_sleep_params sleep_params;
 	struct mwifiex_sleep_period sleep_period;
 	u16 ps_mode;
 	u32 ps_state;
 void mwifiex_delete_all_station_list(struct mwifiex_private *priv);
 void mwifiex_wmm_del_peer_ra_list(struct mwifiex_private *priv,
 				  const u8 *ra_addr);
-void *mwifiex_process_sta_txpd(struct mwifiex_private *, struct sk_buff *skb);
+void mwifiex_process_sta_txpd(struct mwifiex_private *priv,
-void *mwifiex_process_uap_txpd(struct mwifiex_private *, struct sk_buff *skb);
+			      struct sk_buff *skb);
+void mwifiex_process_uap_txpd(struct mwifiex_private *priv,
+			      struct sk_buff *skb);
 int mwifiex_sta_init_cmd(struct mwifiex_private *, u8 first_sta, bool init);
 int mwifiex_cmd_802_11_scan(struct host_cmd_ds_command *cmd,
 			    struct mwifiex_scan_cmd_config *scan_cfg);

drivers/net/wireless/marvell/mwifiex/scan.c+1−6

 	struct mwifiex_adapter *adapter = priv->adapter;
 	int ret = 0;
 	struct mwifiex_chan_scan_param_set *tmp_chan_list;
-	struct mwifiex_chan_scan_param_set *start_chan;
 	u32 tlv_idx, rates_size, cmd_no;
 	u32 total_scan_time;
 	u32 done_early;
 		total_scan_time = 0;
 		radio_type = 0;
 		chan_tlv_out->header.len = 0;
-		start_chan = tmp_chan_list;
 		done_early = false;
 		/*
 		rates_size = mwifiex_append_rate_tlv(priv, scan_cfg_out,
 						     radio_type);
-		priv->adapter->scan_channels = start_chan;
 		/* Send the scan command to the firmware with the specified
 		   cfg */
 		if (priv->adapter->ext_scan)
 	u8 ssid_filter;
 	struct mwifiex_ie_types_htcap *ht_cap;
 	struct mwifiex_ie_types_bss_mode *bss_mode;
-	const u8 zero_mac[6] = {0, 0, 0, 0, 0, 0};
 	/* The tlv_buf_len is calculated for each scan command.  The TLVs added
 	   in this routine will be preserved since the routine that sends the
 				  sizeof(struct mwifiex_ie_types_scan_chan_gap);
 		}
-		if (!ether_addr_equal(user_scan_in->random_mac, zero_mac)) {
+		if (!is_zero_ether_addr(user_scan_in->random_mac)) {
 			random_mac_tlv = (void *)tlv_pos;
 			random_mac_tlv->header.type =
 					 cpu_to_le16(TLV_TYPE_RANDOM_MAC);

drivers/net/wireless/marvell/mwifiex/sdio.c+14−12

 		    "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
 	/* Set Host interrupt reset to read to clear */
-	if (!mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, &reg))
+	if (mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, &reg))
-		mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg,
+		return -1;
-				  reg | card->reg->sdio_int_mask);
+	if (mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg,
-	else
+			      reg | card->reg->sdio_int_mask))
 		return -1;
 	/* Dnld/Upld ready set to auto reset */
-	if (!mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, &reg))
+	if (mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, &reg))
-		mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg,
+		return -1;
-				  reg | AUTO_RE_ENABLE_INT);
+	if (mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg,
-	else
+			      reg | AUTO_RE_ENABLE_INT))
 		return -1;
 	return 0;
 }
 /*
- * This function decode sdio aggreation pkt.
+ * This function decodes sdio aggregation pkt.
  *
  * Based on the data block size and pkt_len,
  * skb data will be decoded to few packets.
 		ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf,
 						 card->mpa_tx.buf_len, mport);
-		/* Save the last multi port tx aggreagation info to debug log */
+		/* Save the last multi port tx aggregation info to debug log. */
 		index = adapter->dbg.last_sdio_mp_index;
 		index = (index + 1) % MWIFIEX_DBG_SDIO_MP_NUM;
 		adapter->dbg.last_sdio_mp_index = index;
 	mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
 	/* Get SDIO ioport */
-	mwifiex_init_sdio_ioport(adapter);
+	if (mwifiex_init_sdio_ioport(adapter))
+		return -EIO;
 	/* Initialize SDIO variables in card */
 	card->mp_rd_bitmap = 0;
 	 */
 	mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
-	mwifiex_init_sdio_ioport(adapter);
+	if (mwifiex_init_sdio_ioport(adapter))
+		dev_err(&card->func->dev, "error enabling SDIO port\n");
 }
 static struct mwifiex_if_ops sdio_ops = {

drivers/net/wireless/marvell/mwifiex/sta_rx.c+1−0

@@ -92,6 +92,7 @@ int mwifiex_process_rx_packet(struct mwifiex_private *priv, · 91 unmodified lines
92	skb->len, rx_pkt_off);	92	skb->len, rx_pkt_off);
93	priv->stats.rx_dropped++;	93	priv->stats.rx_dropped++;
94	dev_kfree_skb_any(skb);	94	dev_kfree_skb_any(skb);
		95	return -1;
95	}	96	}
96		97
97	if ((!memcmp(&rx_pkt_hdr->rfc1042_hdr, bridge_tunnel_header,	98	if ((!memcmp(&rx_pkt_hdr->rfc1042_hdr, bridge_tunnel_header,

drivers/net/wireless/marvell/mwifiex/sta_tx.c+2−13

  *      - Priority specific Tx control
  *      - Flags
  */
-void *mwifiex_process_sta_txpd(struct mwifiex_private *priv,
+void mwifiex_process_sta_txpd(struct mwifiex_private *priv,
-				struct sk_buff *skb)
+			      struct sk_buff *skb)
 {
 	struct mwifiex_adapter *adapter = priv->adapter;
 	struct txpd *local_tx_pd;
 	u16 pkt_type, pkt_offset;
 	int hroom = adapter->intf_hdr_len;
-	if (!skb->len) {
-		mwifiex_dbg(adapter, ERROR,
-			    "Tx: bad packet length: %d\n", skb->len);
-		tx_info->status_code = -1;
-		return skb->data;
-	}
-	BUG_ON(skb_headroom(skb) < MWIFIEX_MIN_DATA_HEADER_LEN);
 	pkt_type = mwifiex_is_skb_mgmt_frame(skb) ? PKT_TYPE_MGMT : 0;
 	pad = ((uintptr_t)skb->data - (sizeof(*local_tx_pd) + hroom)) &
 	if (!local_tx_pd->tx_control)
 		/* TxCtrl set by user or default */
 		local_tx_pd->tx_control = cpu_to_le32(priv->pkt_tx_ctrl);
-	return skb->data;
 }
 /*

drivers/net/wireless/marvell/mwifiex/txrx.c+26−18

@@ -72,13 +72,18 @@ EXPORT_SYMBOL_GPL(mwifiex_handle_rx_packet); · 71 unmodified lines
72	int mwifiex_process_tx(struct mwifiex_private priv, struct sk_buff skb,	72	int mwifiex_process_tx(struct mwifiex_private priv, struct sk_buff skb,
73	struct mwifiex_tx_param *tx_param)	73	struct mwifiex_tx_param *tx_param)
74	{	74	{
75	int hroom, ret = -1;	75	int hroom, ret;
76	struct mwifiex_adapter *adapter = priv->adapter;	76	struct mwifiex_adapter *adapter = priv->adapter;
77	u8 *head_ptr;
78	struct txpd *local_tx_pd = NULL;	77	struct txpd *local_tx_pd = NULL;
79	struct mwifiex_sta_node *dest_node;	78	struct mwifiex_sta_node *dest_node;
80	struct ethhdr hdr = (void )skb->data;	79	struct ethhdr hdr = (void )skb->data;
81		80
		81	if (unlikely(!skb->len \|\|
		82	skb_headroom(skb) < MWIFIEX_MIN_DATA_HEADER_LEN)) {
		83	ret = -EINVAL;
		84	goto out;
		85	}
		86
82	hroom = adapter->intf_hdr_len;	87	hroom = adapter->intf_hdr_len;
83		88
84	if (priv->bss_role == MWIFIEX_BSS_ROLE_UAP) {	89	if (priv->bss_role == MWIFIEX_BSS_ROLE_UAP) {
@@ -88,33 +93,31 @@ int mwifiex_process_tx(struct mwifiex_private priv, struct sk_buff skb, · 3 unmodified lines
88	dest_node->stats.tx_packets++;	93	dest_node->stats.tx_packets++;
89	}	94	}
90		95
91	head_ptr = mwifiex_process_uap_txpd(priv, skb);	96	mwifiex_process_uap_txpd(priv, skb);
92	} else {	97	} else {
93	head_ptr = mwifiex_process_sta_txpd(priv, skb);	98	mwifiex_process_sta_txpd(priv, skb);
94	}	99	}
95		100
96	if ((adapter->data_sent \|\| adapter->tx_lock_flag) && head_ptr) {	101	if (adapter->data_sent \|\| adapter->tx_lock_flag) {
97	skb_queue_tail(&adapter->tx_data_q, skb);	102	skb_queue_tail(&adapter->tx_data_q, skb);
98	atomic_inc(&adapter->tx_queued);	103	atomic_inc(&adapter->tx_queued);
99	return 0;	104	return 0;
100	}	105	}
101		106
102	if (head_ptr) {	107	if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA)
103	if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA)	108	local_tx_pd = (struct txpd *)(skb->data + hroom);
104	local_tx_pd = (struct txpd *)(head_ptr + hroom);	109	if (adapter->iface_type == MWIFIEX_USB) {
105	if (adapter->iface_type == MWIFIEX_USB) {	110	ret = adapter->if_ops.host_to_card(adapter,
106	ret = adapter->if_ops.host_to_card(adapter,	111	priv->usb_port,
107	priv->usb_port,	112	skb, tx_param);
108	skb, tx_param);	113	} else {
109	} else {	114	ret = adapter->if_ops.host_to_card(adapter,
110	ret = adapter->if_ops.host_to_card(adapter,	115	MWIFIEX_TYPE_DATA,
111	MWIFIEX_TYPE_DATA,	116	skb, tx_param);
112	skb, tx_param);
113	}
114	}	117	}
115	mwifiex_dbg_dump(adapter, DAT_D, "tx pkt:", skb->data,	118	mwifiex_dbg_dump(adapter, DAT_D, "tx pkt:", skb->data,
116	min_t(size_t, skb->len, DEBUG_DUMP_DATA_MAX_LEN));	119	min_t(size_t, skb->len, DEBUG_DUMP_DATA_MAX_LEN));
117		120	out:
118	switch (ret) {	121	switch (ret) {
119	case -ENOSR:	122	case -ENOSR:
120	mwifiex_dbg(adapter, DATA, "data: -ENOSR is returned\n");	123	mwifiex_dbg(adapter, DATA, "data: -ENOSR is returned\n");
@@ -137,6 +140,11 @@ int mwifiex_process_tx(struct mwifiex_private priv, struct sk_buff skb, · 16 unmodified lines
137	break;	140	break;
138	case -EINPROGRESS:	141	case -EINPROGRESS:
139	break;	142	break;
		143	case -EINVAL:
		144	mwifiex_dbg(adapter, ERROR,
		145	"malformed skb (length: %u, headroom: %u)\n",
		146	skb->len, skb_headroom(skb));
		147	fallthrough;
140	case 0:	148	case 0:
141	mwifiex_write_data_complete(adapter, skb, 0, ret);	149	mwifiex_write_data_complete(adapter, skb, 0, ret);
142	break;	150	break;

drivers/net/wireless/marvell/mwifiex/uap_txrx.c+12−14

 			    skb->len, le16_to_cpu(uap_rx_pd->rx_pkt_offset));
 		priv->stats.rx_dropped++;
 		dev_kfree_skb_any(skb);
+		return;
 	}
 	if ((!memcmp(&rx_pkt_hdr->rfc1042_hdr, bridge_tunnel_header,
 	if (is_multicast_ether_addr(ra)) {
 		skb_uap = skb_copy(skb, GFP_ATOMIC);
-		mwifiex_uap_queue_bridged_pkt(priv, skb_uap);
+		if (likely(skb_uap)) {
+			mwifiex_uap_queue_bridged_pkt(priv, skb_uap);
+		} else {
+			mwifiex_dbg(adapter, ERROR,
+				    "failed to copy skb for uAP\n");
+			priv->stats.rx_dropped++;
+			dev_kfree_skb_any(skb);
+			return -1;
+		}
 	} else {
 		if (mwifiex_get_sta_entry(priv, ra)) {
 			/* Requeue Intra-BSS packet */
  *      - Priority specific Tx control
  *      - Flags
  */
-void *mwifiex_process_uap_txpd(struct mwifiex_private *priv,
+void mwifiex_process_uap_txpd(struct mwifiex_private *priv,
-			       struct sk_buff *skb)
+			      struct sk_buff *skb)
 {
 	struct mwifiex_adapter *adapter = priv->adapter;
 	struct uap_txpd *txpd;
 	u16 pkt_type, pkt_offset;
 	int hroom = adapter->intf_hdr_len;
-	if (!skb->len) {
-		mwifiex_dbg(adapter, ERROR,
-			    "Tx: bad packet length: %d\n", skb->len);
-		tx_info->status_code = -1;
-		return skb->data;
-	}
-	BUG_ON(skb_headroom(skb) < MWIFIEX_MIN_DATA_HEADER_LEN);
 	pkt_type = mwifiex_is_skb_mgmt_frame(skb) ? PKT_TYPE_MGMT : 0;
 	pad = ((uintptr_t)skb->data - (sizeof(*txpd) + hroom)) &
 	if (!txpd->tx_control)
 		/* TxCtrl set by user or default */
 		txpd->tx_control = cpu_to_le32(priv->pkt_tx_ctrl);
-	return skb->data;
 }

drivers/net/wireless/mediatek/mt76/mt7603/Kconfig+1−1

@@ -5,7 +5,7 @@ config MT7603E · 4 unmodified lines
5	depends on MAC80211	5	depends on MAC80211
6	depends on PCI	6	depends on PCI
7	help	7	help
8	This adds support for MT7603E wireless PCIe devices and the WLAN core	8	This adds support for MT7603E PCIe wireless devices and the WLAN core
9	on MT7628/MT7688 SoC devices. This family supports IEEE 802.11n 2x2	9	on MT7628/MT7688 SoC devices. This family supports IEEE 802.11n 2x2
10	to 300Mbps PHY rate	10	to 300Mbps PHY rate
11		11

drivers/net/wireless/mediatek/mt76/mt7615/Kconfig+1−1

@@ -11,7 +11,7 @@ config MT7615E · 10 unmodified lines
11	depends on MAC80211	11	depends on MAC80211
12	depends on PCI	12	depends on PCI
13	help	13	help
14	This adds support for MT7615-based wireless PCIe devices,	14	This adds support for MT7615-based PCIe wireless devices,
15	which support concurrent dual-band operation at both 5GHz	15	which support concurrent dual-band operation at both 5GHz
16	and 2.4GHz, IEEE 802.11ac 4x4:4SS 1733Mbps PHY rate, wave2	16	and 2.4GHz, IEEE 802.11ac 4x4:4SS 1733Mbps PHY rate, wave2
17	MU-MIMO up to 4 users/group and 160MHz channels.	17	MU-MIMO up to 4 users/group and 160MHz channels.

drivers/net/wireless/mediatek/mt76/mt76x0/Kconfig+2−2

@@ -10,7 +10,7 @@ config MT76x0U · 9 unmodified lines
10	depends on MAC80211	10	depends on MAC80211
11	depends on USB	11	depends on USB
12	help	12	help
13	This adds support for MT7610U-based wireless USB 2.0 dongles,	13	This adds support for MT7610U-based USB 2.0 wireless dongles,
14	which comply with IEEE 802.11ac standards and support 1x1	14	which comply with IEEE 802.11ac standards and support 1x1
15	433Mbps PHY rate.	15	433Mbps PHY rate.
16		16
@@ -22,7 +22,7 @@ config MT76x0E · 5 unmodified lines
22	depends on MAC80211	22	depends on MAC80211
23	depends on PCI	23	depends on PCI
24	help	24	help
25	This adds support for MT7610/MT7630-based wireless PCIe devices,	25	This adds support for MT7610/MT7630-based PCIe wireless devices,
26	which comply with IEEE 802.11ac standards and support 1x1	26	which comply with IEEE 802.11ac standards and support 1x1
27	433Mbps PHY rate.	27	433Mbps PHY rate.
28		28

drivers/net/wireless/mediatek/mt76/mt76x2/Kconfig+2−2

@@ -9,7 +9,7 @@ config MT76x2E · 8 unmodified lines
9	depends on MAC80211	9	depends on MAC80211
10	depends on PCI	10	depends on PCI
11	help	11	help
12	This adds support for MT7612/MT7602/MT7662-based wireless PCIe	12	This adds support for MT7612/MT7602/MT7662-based PCIe wireless
13	devices, which comply with IEEE 802.11ac standards and support	13	devices, which comply with IEEE 802.11ac standards and support
14	2SS to 866Mbit/s PHY rate.	14	2SS to 866Mbit/s PHY rate.
15		15
@@ -22,7 +22,7 @@ config MT76x2U · 6 unmodified lines
22	depends on MAC80211	22	depends on MAC80211
23	depends on USB	23	depends on USB
24	help	24	help
25	This adds support for MT7612U-based wireless USB 3.0 dongles,	25	This adds support for MT7612U-based USB 3.0 wireless dongles,
26	which comply with IEEE 802.11ac standards and support 2SS to	26	which comply with IEEE 802.11ac standards and support 2SS to
27	866Mbit/s PHY rate.	27	866Mbit/s PHY rate.
28		28

drivers/net/wireless/mediatek/mt76/mt7915/Kconfig+1−1

@@ -7,7 +7,7 @@ config MT7915E · 6 unmodified lines
7	depends on PCI	7	depends on PCI
8	select RELAY	8	select RELAY
9	help	9	help
10	This adds support for MT7915-based wireless PCIe devices,	10	This adds support for MT7915-based PCIe wireless devices,
11	which support concurrent dual-band operation at both 5GHz	11	which support concurrent dual-band operation at both 5GHz
12	and 2.4GHz IEEE 802.11ax 4x4:4SS 1024-QAM, 160MHz channels,	12	and 2.4GHz IEEE 802.11ax 4x4:4SS 1024-QAM, 160MHz channels,
13	OFDMA, spatial reuse and dual carrier modulation.	13	OFDMA, spatial reuse and dual carrier modulation.

drivers/net/wireless/mediatek/mt76/mt7996/Kconfig+1−1

@@ -7,7 +7,7 @@ config MT7996E · 6 unmodified lines
7	depends on MAC80211	7	depends on MAC80211
8	depends on PCI	8	depends on PCI
9	help	9	help
10	This adds support for MT7996-based wireless PCIe devices,	10	This adds support for MT7996-based PCIe wireless devices,
11	which support concurrent tri-band operation at 6GHz, 5GHz,	11	which support concurrent tri-band operation at 6GHz, 5GHz,
12	and 2.4GHz IEEE 802.11be 4x4:4SS 4096-QAM, 320MHz channels.	12	and 2.4GHz IEEE 802.11be 4x4:4SS 4096-QAM, 320MHz channels.
13		13

drivers/net/wireless/mediatek/mt7601u/Kconfig+1−1

@@ -4,4 +4,4 @@ config MT7601U · 3 unmodified lines
4	depends on MAC80211	4	depends on MAC80211
5	depends on USB	5	depends on USB
6	help	6	help
7	This adds support for MT7601U-based wireless USB dongles.	7	This adds support for MT7601U-based USB wireless dongles.

drivers/net/wireless/microchip/wilc1000/cfg80211.h+0−4

 #define WILC_CFG80211_H
 #include "netdev.h"
-struct wiphy *wilc_cfg_alloc(void);
 int wilc_cfg80211_init(struct wilc **wilc, struct device *dev, int io_type,
 		       const struct wilc_hif_func *ops);
 struct wilc *wilc_create_wiphy(struct device *dev);
 void wilc_deinit_host_int(struct net_device *net);
 int wilc_init_host_int(struct net_device *net);
 void wilc_wfi_monitor_rx(struct net_device *mon_dev, u8 *buff, u32 size);
-struct wilc_vif *wilc_netdev_interface(struct wilc *wl, const char *name,
-				       enum nl80211_iftype type);
 void wilc_wfi_deinit_mon_interface(struct wilc *wl, bool rtnl_locked);
 struct net_device *wilc_wfi_init_mon_interface(struct wilc *wl,
 					       const char *name,
 void wilc_update_mgmt_frame_registrations(struct wiphy *wiphy,
 					  struct wireless_dev *wdev,
 					  struct mgmt_frame_regs *upd);
-struct wilc_vif *wilc_get_interface(struct wilc *wl);
 struct wilc_vif *wilc_get_wl_to_vif(struct wilc *wl);
 void wlan_deinit_locks(struct wilc *wilc);
 #endif

drivers/net/wireless/purelifi/plfxlc/Kconfig+1−1

@@ -3,7 +3,7 @@ config PLFXLC · 2 unmodified lines
3	tristate "pureLiFi X, XL, XC device support"	3	tristate "pureLiFi X, XL, XC device support"
4	depends on CFG80211 && MAC80211 && USB	4	depends on CFG80211 && MAC80211 && USB
5	help	5	help
6	This option adds support for pureLiFi LiFi wireless USB	6	This option adds support for pureLiFi LiFi USB wireless
7	adapters. The pureLiFi X, XL, XC USB devices are based on	7	adapters. The pureLiFi X, XL, XC USB devices are based on
8	802.11 OFDM PHY but uses light as the transmission medium.	8	802.11 OFDM PHY but uses light as the transmission medium.
9	The driver supports common 802.11 encryption/authentication	9	The driver supports common 802.11 encryption/authentication

drivers/net/wireless/ralink/rt2x00/Kconfig+1−1

@@ -170,7 +170,7 @@ config RT2800USB_RT35XX · 169 unmodified lines
170	config RT2800USB_RT3573	170	config RT2800USB_RT3573
171	bool "rt2800usb - Include support for rt3573 devices (EXPERIMENTAL)"	171	bool "rt2800usb - Include support for rt3573 devices (EXPERIMENTAL)"
172	help	172	help
173	This enables support for RT3573 chipset based wireless USB devices	173	This enables support for RT3573 chipset based USB wireless devices
174	in the rt2800usb driver.	174	in the rt2800usb driver.
175		175
176	config RT2800USB_RT53XX	176	config RT2800USB_RT53XX

drivers/net/wireless/ralink/rt2x00/rt2800lib.c+41−18

@@ -3865,28 +3865,51 @@ static void rt2800_config_channel_rf7620(struct rt2x00_dev *rt2x00dev, · 3864 unmodified lines
3865	}	3865	}
3866	}	3866	}
3867		3867
3868	static void rt2800_config_alc(struct rt2x00_dev *rt2x00dev,	3868	static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
3869	struct ieee80211_channel *chan,	3869	struct ieee80211_channel *chan,
3870	int power_level) {	3870	int power_level)
3871	u16 eeprom, target_power, max_power;	3871	{
		3872	int cur_channel = rt2x00dev->rf_channel;
		3873	u16 eeprom, chan_power, rate_power, target_power;
		3874	u16 tx_power[2];
		3875	s8 *power_group[2];
3872	u32 mac_sys_ctrl;	3876	u32 mac_sys_ctrl;
3873	u32 reg;	3877	u32 cnt, reg;
3874	u8 bbp;	3878	u8 bbp;
3875		3879
3876	/* hardware unit is 0.5dBm, limited to 23.5dBm */	3880	if (WARN_ON(cur_channel < 1 \|\| cur_channel > 14))
3877	power_level *= 2;	3881	return;
3878	if (power_level > 0x2f)	3882
3879	power_level = 0x2f;	3883	/* get per chain power, 2 chains in total, unit is 0.5dBm */
		3884	power_level = (power_level - 3) * 2;
3880		3885
3881	max_power = chan->max_power * 2;	3886	/* We can't get the accurate TX power. Based on some tests, the real
3882	if (max_power > 0x2f)	3887	* TX power is approximately equal to channel_power + (max)rate_power.
3883	max_power = 0x2f;	3888	* Usually max rate_power is the gain of the OFDM 6M rate. The antenna
		3889	* gain and externel PA gain are not included as we are unable to
		3890	* obtain these values.
		3891	*/
		3892	rate_power = rt2800_eeprom_read_from_array(rt2x00dev,
		3893	EEPROM_TXPOWER_BYRATE, 1);
		3894	rate_power &= 0x3f;
		3895	power_level -= rate_power;
		3896	if (power_level < 1)
		3897	power_level = 1;
		3898
		3899	power_group[0] = rt2800_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
		3900	power_group[1] = rt2800_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
		3901	for (cnt = 0; cnt < 2; cnt++) {
		3902	chan_power = power_group[cnt][cur_channel - 1];
		3903	if (chan_power >= 0x20 \|\| chan_power == 0)
		3904	chan_power = 0x10;
		3905	tx_power[cnt] = power_level < chan_power ? power_level : chan_power;
		3906	}
3884		3907
3885	reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_0);	3908	reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_0);
3886	rt2x00_set_field32(&reg, TX_ALC_CFG_0_CH_INIT_0, power_level);	3909	rt2x00_set_field32(&reg, TX_ALC_CFG_0_CH_INIT_0, tx_power[0]);
3887	rt2x00_set_field32(&reg, TX_ALC_CFG_0_CH_INIT_1, power_level);	3910	rt2x00_set_field32(&reg, TX_ALC_CFG_0_CH_INIT_1, tx_power[1]);
3888	rt2x00_set_field32(&reg, TX_ALC_CFG_0_LIMIT_0, max_power);	3911	rt2x00_set_field32(&reg, TX_ALC_CFG_0_LIMIT_0, 0x2f);
3889	rt2x00_set_field32(&reg, TX_ALC_CFG_0_LIMIT_1, max_power);	3912	rt2x00_set_field32(&reg, TX_ALC_CFG_0_LIMIT_1, 0x2f);
3890		3913
3891	eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);	3914	eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);
3892	if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_INTERNAL_TX_ALC)) {	3915	if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_INTERNAL_TX_ALC)) {
@@ -5268,7 +5291,7 @@ static void rt2800_config_txpower_rt6352(struct rt2x00_dev *rt2x00dev, · 1375 unmodified lines
5268	rt2x00_set_field32(&pwreg, TX_PWR_CFG_9B_STBC_MCS7, t);	5291	rt2x00_set_field32(&pwreg, TX_PWR_CFG_9B_STBC_MCS7, t);
5269	rt2800_register_write(rt2x00dev, TX_PWR_CFG_9, pwreg);	5292	rt2800_register_write(rt2x00dev, TX_PWR_CFG_9, pwreg);
5270		5293
5271	rt2800_config_alc(rt2x00dev, chan, power_level);	5294	rt2800_config_alc_rt6352(rt2x00dev, chan, power_level);
5272		5295
5273	/* TODO: temperature compensation code! */	5296	/* TODO: temperature compensation code! */
5274	}	5297	}
@@ -8561,7 +8584,7 @@ static void rt2800_r_calibration(struct rt2x00_dev *rt2x00dev) · 3286 unmodified lines
8561	rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");	8584	rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");
8562		8585
8563	maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);	8586	maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
8564	maccfg &= (~0x04);	8587	maccfg &= (~0x08);
8565	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);	8588	rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
8566		8589
8567	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY_RX)))	8590	if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY_RX)))

drivers/net/wireless/realtek/rtlwifi/core.c+1−1

@@ -1656,7 +1656,7 @@ static int rtl_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, · 1655 unmodified lines
1656	memcpy(rtlpriv->sec.key_buf[key_idx],	1656	memcpy(rtlpriv->sec.key_buf[key_idx],
1657	key->key, key->keylen);	1657	key->key, key->keylen);
1658	rtlpriv->sec.key_len[key_idx] = key->keylen;	1658	rtlpriv->sec.key_len[key_idx] = key->keylen;
1659	memcpy(mac_addr, bcast_addr, ETH_ALEN);	1659	eth_broadcast_addr(mac_addr);
1660	} else { /* pairwise key */	1660	} else { /* pairwise key */
1661	rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,	1661	rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
1662	"set pairwise key\n");	1662	"set pairwise key\n");

drivers/net/wireless/realtek/rtlwifi/rtl8723com/fw_common.c+0−28

@@ -215,31 +215,3 @@ int rtl8723_download_fw(struct ieee80211_hw *hw, · 214 unmodified lines
215	}	215	}
216	EXPORT_SYMBOL_GPL(rtl8723_download_fw);	216	EXPORT_SYMBOL_GPL(rtl8723_download_fw);
217		217
218	bool rtl8723_cmd_send_packet(struct ieee80211_hw *hw,
219	struct sk_buff *skb)
220	{
221	struct rtl_priv *rtlpriv = rtl_priv(hw);
222	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
223	struct rtl8192_tx_ring *ring;
224	struct rtl_tx_desc *pdesc;
225	struct sk_buff *pskb = NULL;
226	unsigned long flags;
227
228	ring = &rtlpci->tx_ring[BEACON_QUEUE];
229
230	pskb = __skb_dequeue(&ring->queue);
231	kfree_skb(pskb);
232	spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
233
234	pdesc = &ring->desc[0];
235	rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *)pdesc, 1, 1, skb);
236
237	__skb_queue_tail(&ring->queue, skb);
238
239	spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
240
241	rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
242
243	return true;
244	}
245	EXPORT_SYMBOL_GPL(rtl8723_cmd_send_packet);

drivers/net/wireless/realtek/rtlwifi/rtl8723com/fw_common.h+0−2

@@ -66,7 +66,5 @@ void rtl8723_write_fw(struct ieee80211_hw *hw, · 65 unmodified lines
66	u8 *buffer, u32 size, u8 max_page);	66	u8 *buffer, u32 size, u8 max_page);
67	int rtl8723_fw_free_to_go(struct ieee80211_hw *hw, bool is_8723be, int count);	67	int rtl8723_fw_free_to_go(struct ieee80211_hw *hw, bool is_8723be, int count);
68	int rtl8723_download_fw(struct ieee80211_hw *hw, bool is_8723be, int count);	68	int rtl8723_download_fw(struct ieee80211_hw *hw, bool is_8723be, int count);
69	bool rtl8723_cmd_send_packet(struct ieee80211_hw *hw,
70	struct sk_buff *skb);
71		69
72	#endif	70	#endif

drivers/net/wireless/realtek/rtw88/pci.c+1−1

@@ -1828,5 +1828,5 @@ void rtw_pci_shutdown(struct pci_dev *pdev) · 1827 unmodified lines
1828	EXPORT_SYMBOL(rtw_pci_shutdown);	1828	EXPORT_SYMBOL(rtw_pci_shutdown);
1829		1829
1830	MODULE_AUTHOR("Realtek Corporation");	1830	MODULE_AUTHOR("Realtek Corporation");
1831	MODULE_DESCRIPTION("Realtek 802.11ac wireless PCI driver");	1831	MODULE_DESCRIPTION("Realtek PCI 802.11ac wireless driver");
1832	MODULE_LICENSE("Dual BSD/GPL");	1832	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/realtek/rtw88/usb.c+5−2

 	ret = rtw_core_init(rtwdev);
 	if (ret)
-		goto err_release_hw;
+		goto err_free_rx_bufs;
 	ret = rtw_usb_intf_init(rtwdev, intf);
 	if (ret) {
 err_deinit_core:
 	rtw_core_deinit(rtwdev);
+err_free_rx_bufs:
+	rtw_usb_free_rx_bufs(rtwusb);
 err_release_hw:
 	ieee80211_free_hw(hw);
 EXPORT_SYMBOL(rtw_usb_disconnect);
 MODULE_AUTHOR("Realtek Corporation");
-MODULE_DESCRIPTION("Realtek 802.11ac wireless USB driver");
+MODULE_DESCRIPTION("Realtek USB 802.11ac wireless driver");
 MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/realtek/rtw89/chan.c+124−0

@@ -4,6 +4,8 @@ · 3 unmodified lines
4		4
5	#include "chan.h"	5	#include "chan.h"
6	#include "debug.h"	6	#include "debug.h"
		7	#include "fw.h"
		8	#include "ps.h"
7	#include "util.h"	9	#include "util.h"
8		10
9	static enum rtw89_subband rtw89_get_subband_type(enum rtw89_band band,	11	static enum rtw89_subband rtw89_get_subband_type(enum rtw89_band band,
@@ -116,6 +118,7 @@ bool rtw89_assign_entity_chan(struct rtw89_dev *rtwdev, · 106 unmodified lines
116	rcd->prev_primary_channel = chan->primary_channel;	118	rcd->prev_primary_channel = chan->primary_channel;
117	rcd->prev_band_type = chan->band_type;	119	rcd->prev_band_type = chan->band_type;
118	band_changed = new->band_type != chan->band_type;	120	band_changed = new->band_type != chan->band_type;
		121	rcd->band_changed = band_changed;
119		122
120	chan = new;	123	chan = new;
121	return band_changed;	124	return band_changed;
@@ -193,8 +196,12 @@ void rtw89_entity_init(struct rtw89_dev *rtwdev) · 71 unmodified lines
193	enum rtw89_entity_mode rtw89_entity_recalc(struct rtw89_dev *rtwdev)	196	enum rtw89_entity_mode rtw89_entity_recalc(struct rtw89_dev *rtwdev)
194	{	197	{
195	struct rtw89_hal *hal = &rtwdev->hal;	198	struct rtw89_hal *hal = &rtwdev->hal;
		199	const struct cfg80211_chan_def *chandef;
196	enum rtw89_entity_mode mode;	200	enum rtw89_entity_mode mode;
		201	struct rtw89_chan chan;
197	u8 weight;	202	u8 weight;
		203	u8 last;
		204	u8 idx;
198		205
199	weight = bitmap_weight(hal->entity_map, NUM_OF_RTW89_SUB_ENTITY);	206	weight = bitmap_weight(hal->entity_map, NUM_OF_RTW89_SUB_ENTITY);
200	switch (weight) {	207	switch (weight) {
@@ -206,14 +213,121 @@ enum rtw89_entity_mode rtw89_entity_recalc(struct rtw89_dev *rtwdev) · 5 unmodified lines
206	rtw89_config_default_chandef(rtwdev);	213	rtw89_config_default_chandef(rtwdev);
207	fallthrough;	214	fallthrough;
208	case 1:	215	case 1:
		216	last = RTW89_SUB_ENTITY_0;
209	mode = RTW89_ENTITY_MODE_SCC;	217	mode = RTW89_ENTITY_MODE_SCC;
210	break;	218	break;
		219	case 2:
		220	last = RTW89_SUB_ENTITY_1;
		221	mode = rtw89_get_entity_mode(rtwdev);
		222	if (mode == RTW89_ENTITY_MODE_MCC)
		223	break;
		224
		225	mode = RTW89_ENTITY_MODE_MCC_PREPARE;
		226	break;
		227	}
		228
		229	for (idx = 0; idx <= last; idx++) {
		230	chandef = rtw89_chandef_get(rtwdev, idx);
		231	rtw89_get_channel_params(chandef, &chan);
		232	if (chan.channel == 0) {
		233	WARN(1, "Invalid channel on chanctx %d\n", idx);
		234	return RTW89_ENTITY_MODE_INVALID;
		235	}
		236
		237	rtw89_assign_entity_chan(rtwdev, idx, &chan);
211	}	238	}
212		239
213	rtw89_set_entity_mode(rtwdev, mode);	240	rtw89_set_entity_mode(rtwdev, mode);
214	return mode;	241	return mode;
215	}	242	}
216		243
		244	static void rtw89_chanctx_notify(struct rtw89_dev *rtwdev,
		245	enum rtw89_chanctx_state state)
		246	{
		247	const struct rtw89_chip_info *chip = rtwdev->chip;
		248	const struct rtw89_chanctx_listener *listener = chip->chanctx_listener;
		249	int i;
		250
		251	if (!listener)
		252	return;
		253
		254	for (i = 0; i < NUM_OF_RTW89_CHANCTX_CALLBACKS; i++) {
		255	if (!listener->callbacks[i])
		256	continue;
		257
		258	rtw89_debug(rtwdev, RTW89_DBG_CHAN,
		259	"chanctx notify listener: cb %d, state %d\n",
		260	i, state);
		261
		262	listener->callbacks[i](rtwdev, state);
		263	}
		264	}
		265
		266	static int rtw89_mcc_start(struct rtw89_dev *rtwdev)
		267	{
		268	if (rtwdev->scanning)
		269	rtw89_hw_scan_abort(rtwdev, rtwdev->scan_info.scanning_vif);
		270
		271	rtw89_leave_lps(rtwdev);
		272
		273	rtw89_debug(rtwdev, RTW89_DBG_CHAN, "MCC start\n");
		274	rtw89_chanctx_notify(rtwdev, RTW89_CHANCTX_STATE_MCC_START);
		275	return 0;
		276	}
		277
		278	static void rtw89_mcc_stop(struct rtw89_dev *rtwdev)
		279	{
		280	rtw89_debug(rtwdev, RTW89_DBG_CHAN, "MCC stop\n");
		281	rtw89_chanctx_notify(rtwdev, RTW89_CHANCTX_STATE_MCC_STOP);
		282	}
		283
		284	void rtw89_chanctx_work(struct work_struct *work)
		285	{
		286	struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
		287	chanctx_work.work);
		288	enum rtw89_entity_mode mode;
		289	int ret;
		290
		291	mutex_lock(&rtwdev->mutex);
		292
		293	mode = rtw89_get_entity_mode(rtwdev);
		294	switch (mode) {
		295	case RTW89_ENTITY_MODE_MCC_PREPARE:
		296	rtw89_set_entity_mode(rtwdev, RTW89_ENTITY_MODE_MCC);
		297	rtw89_set_channel(rtwdev);
		298
		299	ret = rtw89_mcc_start(rtwdev);
		300	if (ret)
		301	rtw89_warn(rtwdev, "failed to start MCC: %d\n", ret);
		302	break;
		303	default:
		304	break;
		305	}
		306
		307	mutex_unlock(&rtwdev->mutex);
		308	}
		309
		310	void rtw89_queue_chanctx_work(struct rtw89_dev *rtwdev)
		311	{
		312	enum rtw89_entity_mode mode;
		313	u32 delay;
		314
		315	mode = rtw89_get_entity_mode(rtwdev);
		316	switch (mode) {
		317	default:
		318	return;
		319	case RTW89_ENTITY_MODE_MCC_PREPARE:
		320	delay = ieee80211_tu_to_usec(RTW89_CHANCTX_TIME_MCC_PREPARE);
		321	break;
		322	}
		323
		324	rtw89_debug(rtwdev, RTW89_DBG_CHAN,
		325	"queue chanctx work for mode %d with delay %d us\n",
		326	mode, delay);
		327	ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->chanctx_work,
		328	usecs_to_jiffies(delay));
		329	}
		330
217	int rtw89_chanctx_ops_add(struct rtw89_dev *rtwdev,	331	int rtw89_chanctx_ops_add(struct rtw89_dev *rtwdev,
218	struct ieee80211_chanctx_conf *ctx)	332	struct ieee80211_chanctx_conf *ctx)
219	{	333	{
@@ -238,6 +352,7 @@ void rtw89_chanctx_ops_remove(struct rtw89_dev *rtwdev, · 18 unmodified lines
238	{	352	{
239	struct rtw89_hal *hal = &rtwdev->hal;	353	struct rtw89_hal *hal = &rtwdev->hal;
240	struct rtw89_chanctx_cfg cfg = (struct rtw89_chanctx_cfg )ctx->drv_priv;	354	struct rtw89_chanctx_cfg cfg = (struct rtw89_chanctx_cfg )ctx->drv_priv;
		355	enum rtw89_entity_mode mode;
241	struct rtw89_vif *rtwvif;	356	struct rtw89_vif *rtwvif;
242	u8 drop, roll;	357	u8 drop, roll;
243		358
@@ -267,6 +382,15 @@ void rtw89_chanctx_ops_remove(struct rtw89_dev *rtwdev, · 23 unmodified lines
267	drop = roll;	382	drop = roll;
268		383
269	out:	384	out:
		385	mode = rtw89_get_entity_mode(rtwdev);
		386	switch (mode) {
		387	case RTW89_ENTITY_MODE_MCC:
		388	rtw89_mcc_stop(rtwdev);
		389	break;
		390	default:
		391	break;
		392	}
		393
270	clear_bit(drop, hal->entity_map);	394	clear_bit(drop, hal->entity_map);
271	rtw89_set_channel(rtwdev);	395	rtw89_set_channel(rtwdev);
272	}	396	}

drivers/net/wireless/realtek/rtw89/chan.h+5−0

 #include "core.h"
+/* The dwell time in TU before doing rtw89_chanctx_work(). */
+#define RTW89_CHANCTX_TIME_MCC_PREPARE 100
 static inline bool rtw89_get_entity_state(struct rtw89_dev *rtwdev)
 {
 	struct rtw89_hal *hal = &rtwdev->hal;
 			      const struct cfg80211_chan_def *chandef);
 void rtw89_entity_init(struct rtw89_dev *rtwdev);
 enum rtw89_entity_mode rtw89_entity_recalc(struct rtw89_dev *rtwdev);
+void rtw89_chanctx_work(struct work_struct *work);
+void rtw89_queue_chanctx_work(struct rtw89_dev *rtwdev);
 int rtw89_chanctx_ops_add(struct rtw89_dev *rtwdev,
 			  struct ieee80211_chanctx_conf *ctx);
 void rtw89_chanctx_ops_remove(struct rtw89_dev *rtwdev,

drivers/net/wireless/realtek/rtw89/coex.c+2−1

 void rtw89_btc_ntfy_role_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
 			      struct rtw89_sta *rtwsta, enum btc_role_state state)
 {
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
 	struct ieee80211_sta *sta = rtwsta_to_sta(rtwsta);
 	struct rtw89_btc *btc = &rtwdev->btc;

drivers/net/wireless/realtek/rtw89/coex.h+9−0

@@ -193,4 +193,13 @@ static inline u8 rtw89_btc_path_phymap(struct rtw89_dev *rtwdev, · 192 unmodified lines
193	return rtw89_btc_phymap(rtwdev, phy_idx, BIT(path));	193	return rtw89_btc_phymap(rtwdev, phy_idx, BIT(path));
194	}	194	}
195		195
		196	/* return bt req len in TU */
		197	static inline u16 rtw89_coex_query_bt_req_len(struct rtw89_dev *rtwdev,
		198	enum rtw89_phy_idx phy_idx)
		199	{
		200	struct rtw89_btc *btc = &rtwdev->btc;
		201
		202	return btc->bt_req_len;
		203	}
		204
196	#endif	205	#endif

drivers/net/wireless/realtek/rtw89/core.c+91−33

 				NL80211_CHAN_NO_HT);
 }
-static void rtw89_get_channel_params(const struct cfg80211_chan_def *chandef,
+void rtw89_get_channel_params(const struct cfg80211_chan_def *chandef,
-				     struct rtw89_chan *chan)
+			      struct rtw89_chan *chan)
 {
 	struct ieee80211_channel *channel = chandef->chan;
 	enum nl80211_chan_width width = chandef->width;
 void rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev)
 {
+	struct rtw89_hal *hal = &rtwdev->hal;
 	const struct rtw89_chip_info *chip = rtwdev->chip;
 	const struct rtw89_chan *chan;
 	enum rtw89_sub_entity_idx sub_entity_idx;
+	enum rtw89_sub_entity_idx roc_idx;
 	enum rtw89_phy_idx phy_idx;
 	enum rtw89_entity_mode mode;
 	bool entity_active;
 		return;
 	mode = rtw89_get_entity_mode(rtwdev);
-	if (WARN(mode != RTW89_ENTITY_MODE_SCC, "Invalid ent mode: %d\n", mode))
+	switch (mode) {
+	case RTW89_ENTITY_MODE_SCC:
+	case RTW89_ENTITY_MODE_MCC:
+		sub_entity_idx = RTW89_SUB_ENTITY_0;
+		break;
+	case RTW89_ENTITY_MODE_MCC_PREPARE:
+		sub_entity_idx = RTW89_SUB_ENTITY_1;
+		break;
+	default:
+		WARN(1, "Invalid ent mode: %d\n", mode);
 		return;
+	}
+	roc_idx = atomic_read(&hal->roc_entity_idx);
+	if (roc_idx != RTW89_SUB_ENTITY_IDLE)
+		sub_entity_idx = roc_idx;
-	sub_entity_idx = RTW89_SUB_ENTITY_0;
 	phy_idx = RTW89_PHY_0;
 	chan = rtw89_chan_get(rtwdev, sub_entity_idx);
 	chip->ops->set_txpwr(rtwdev, chan, phy_idx);
 void rtw89_set_channel(struct rtw89_dev *rtwdev)
 {
+	struct rtw89_hal *hal = &rtwdev->hal;
 	const struct rtw89_chip_info *chip = rtwdev->chip;
-	const struct cfg80211_chan_def *chandef;
+	const struct rtw89_chan_rcd *chan_rcd;
+	const struct rtw89_chan *chan;
 	enum rtw89_sub_entity_idx sub_entity_idx;
+	enum rtw89_sub_entity_idx roc_idx;
 	enum rtw89_mac_idx mac_idx;
 	enum rtw89_phy_idx phy_idx;
-	struct rtw89_chan chan;
 	struct rtw89_channel_help_params bak;
 	enum rtw89_entity_mode mode;
-	bool band_changed;
 	bool entity_active;
 	entity_active = rtw89_get_entity_state(rtwdev);
 	mode = rtw89_entity_recalc(rtwdev);
-	if (WARN(mode != RTW89_ENTITY_MODE_SCC, "Invalid ent mode: %d\n", mode))
+	switch (mode) {
+	case RTW89_ENTITY_MODE_SCC:
+	case RTW89_ENTITY_MODE_MCC:
+		sub_entity_idx = RTW89_SUB_ENTITY_0;
+		break;
+	case RTW89_ENTITY_MODE_MCC_PREPARE:
+		sub_entity_idx = RTW89_SUB_ENTITY_1;
+		break;
+	default:
+		WARN(1, "Invalid ent mode: %d\n", mode);
 		return;
+	}
+	roc_idx = atomic_read(&hal->roc_entity_idx);
+	if (roc_idx != RTW89_SUB_ENTITY_IDLE)
+		sub_entity_idx = roc_idx;
-	sub_entity_idx = RTW89_SUB_ENTITY_0;
 	mac_idx = RTW89_MAC_0;
 	phy_idx = RTW89_PHY_0;
-	chandef = rtw89_chandef_get(rtwdev, sub_entity_idx);
-	rtw89_get_channel_params(chandef, &chan);
-	if (WARN(chan.channel == 0, "Invalid channel\n"))
-		return;
-	band_changed = rtw89_assign_entity_chan(rtwdev, sub_entity_idx, &chan);
+	chan = rtw89_chan_get(rtwdev, sub_entity_idx);
+	chan_rcd = rtw89_chan_rcd_get(rtwdev, sub_entity_idx);
-	rtw89_chip_set_channel_prepare(rtwdev, &bak, &chan, mac_idx, phy_idx);
+	rtw89_chip_set_channel_prepare(rtwdev, &bak, chan, mac_idx, phy_idx);
-	chip->ops->set_channel(rtwdev, &chan, mac_idx, phy_idx);
+	chip->ops->set_channel(rtwdev, chan, mac_idx, phy_idx);
-	chip->ops->set_txpwr(rtwdev, &chan, phy_idx);
+	chip->ops->set_txpwr(rtwdev, chan, phy_idx);
-	rtw89_chip_set_channel_done(rtwdev, &bak, &chan, mac_idx, phy_idx);
+	rtw89_chip_set_channel_done(rtwdev, &bak, chan, mac_idx, phy_idx);
-	if (!entity_active || band_changed) {
+	if (!entity_active || chan_rcd->band_changed) {
-		rtw89_btc_ntfy_switch_band(rtwdev, phy_idx, chan.band_type);
+		rtw89_btc_ntfy_switch_band(rtwdev, phy_idx, chan->band_type);
 		rtw89_chip_rfk_band_changed(rtwdev, phy_idx);
 	}
 }
 static u16 rtw89_core_get_mgmt_rate(struct rtw89_dev *rtwdev,
-				    struct rtw89_core_tx_request *tx_req)
+				    struct rtw89_core_tx_request *tx_req,
+				    const struct rtw89_chan *chan)
 {
 	struct sk_buff *skb = tx_req->skb;
 	struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 	struct ieee80211_vif *vif = tx_info->control.vif;
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 	u16 lowest_rate;
 	if (tx_info->flags & IEEE80211_TX_CTL_NO_CCK_RATE ||
 	struct ieee80211_vif *vif = tx_req->vif;
 	struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 	struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	u8 qsel, ch_dma;
 	qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : RTW89_TX_QSEL_B0_MGMT;
 	desc_info->en_wd_info = true;
 	desc_info->use_rate = true;
 	desc_info->dis_data_fb = true;
-	desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req);
+	desc_info->data_rate = rtw89_core_get_mgmt_rate(rtwdev, tx_req, chan);
 	rtw89_debug(rtwdev, RTW89_DBG_TXRX,
 		    "tx mgmt frame with rate 0x%x on channel %d (band %d, bw %d)\n",
 	desc_info->ch_dma = RTW89_DMA_H2C;
 }
-static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc)
+static void rtw89_core_get_no_ul_ofdma_htc(struct rtw89_dev *rtwdev, __le32 *htc,
+					   const struct rtw89_chan *chan)
 {
 	static const u8 rtw89_bandwidth_to_om[] = {
 		[RTW89_CHANNEL_WIDTH_20] = HTC_OM_CHANNEL_WIDTH_20,
 	};
 	const struct rtw89_chip_info *chip = rtwdev->chip;
 	struct rtw89_hal *hal = &rtwdev->hal;
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 	u8 om_bandwidth;
 	if (!chip->dis_2g_40m_ul_ofdma ||
 	const struct rtw89_chan_rcd *rcd =
 		rtw89_chan_rcd_get(rtwdev, RTW89_SUB_ENTITY_0);
 	u16 chan = rcd->prev_primary_channel;
-	u8 band = rcd->prev_band_type == RTW89_BAND_2G ?
+	u8 band = rtw89_hw_to_nl80211_band(rcd->prev_band_type);
-		  NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
 	if (status->band != NL80211_BAND_2GHZ &&
 	    status->encoding == RX_ENC_LEGACY &&
 {
 	const struct cfg80211_chan_def *chandef =
 		rtw89_chandef_get(rtwdev, RTW89_SUB_ENTITY_0);
-	const struct rtw89_chan *cur = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 	u16 data_rate;
 	u8 data_rate_mode;
 	if (rtwdev->scanning &&
 	    RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) {
+		const struct rtw89_chan *cur = rtw89_scan_chan_get(rtwdev);
 		u8 chan = cur->primary_channel;
 		u8 band = cur->band_type;
 		enum nl80211_band nl_band;
 void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
 {
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
 	struct ieee80211_hw *hw = rtwdev->hw;
 	struct rtw89_roc *roc = &rtwvif->roc;
 	struct cfg80211_chan_def roc_chan;
 	rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, &roc_chan);
 	rtw89_set_channel(rtwdev);
 	rtw89_write32_clr(rtwdev,
-			  rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+			  rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
 			  B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH);
 	ieee80211_ready_on_channel(hw);
 void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
 {
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
 	struct ieee80211_hw *hw = rtwdev->hw;
 	struct rtw89_roc *roc = &rtwvif->roc;
 	struct rtw89_vif *tmp;
 	rtw89_leave_lps(rtwdev);
 	rtw89_write32_mask(rtwdev,
-			   rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+			   rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
 			   B_AX_RX_FLTR_CFG_MASK,
 			   rtwdev->hal.rx_fltr);
 	rtw89_phy_tx_path_div_track(rtwdev);
 	rtw89_phy_antdiv_track(rtwdev);
 	rtw89_phy_ul_tb_ctrl_track(rtwdev);
+	rtw89_tas_track(rtwdev);
 	if (rtwdev->lps_enabled && !rtwdev->btc.lps)
 		rtw89_enter_lps_track(rtwdev);
 	struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 	struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv;
 	struct rtw89_bssid_cam_entry *bssid_cam = rtw89_get_bssid_cam_of(rtwvif, rtwsta);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	int ret;
 	if (vif->type == NL80211_IFTYPE_AP || sta->tdls) {
 		rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta,
 					 BTC_ROLE_MSTS_STA_CONN_END);
-		rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template);
+		rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template, chan);
 		rtw89_phy_ul_tb_assoc(rtwdev, rtwvif);
 		ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif, rtwsta->mac_id);
 	complete(&wait->completion);
 }
+void rtw89_core_ntfy_btc_event(struct rtw89_dev *rtwdev, enum rtw89_btc_hmsg event)
+{
+	u16 bt_req_len;
+	switch (event) {
+	case RTW89_BTC_HMSG_SET_BT_REQ_SLOT:
+		bt_req_len = rtw89_coex_query_bt_req_len(rtwdev, RTW89_PHY_0);
+		rtw89_debug(rtwdev, RTW89_DBG_BTC,
+			    "coex updates BT req len to %d TU\n", bt_req_len);
+		break;
+	default:
+		if (event < NUM_OF_RTW89_BTC_HMSG)
+			rtw89_debug(rtwdev, RTW89_DBG_BTC,
+				    "unhandled BTC HMSG event: %d\n", event);
+		else
+			rtw89_warn(rtwdev,
+				   "unrecognized BTC HMSG event: %d\n", event);
+		break;
+	}
+}
 int rtw89_core_start(struct rtw89_dev *rtwdev)
 {
 	int ret;
 	rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
 	rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0);
+	rtw89_tas_reset(rtwdev);
 	ret = rtw89_hci_start(rtwdev);
 	if (ret) {
 		rtw89_err(rtwdev, "failed to start hci\n");
 	cancel_work_sync(&btc->icmp_notify_work);
 	cancel_delayed_work_sync(&rtwdev->txq_reinvoke_work);
 	cancel_delayed_work_sync(&rtwdev->track_work);
+	cancel_delayed_work_sync(&rtwdev->chanctx_work);
 	cancel_delayed_work_sync(&rtwdev->coex_act1_work);
 	cancel_delayed_work_sync(&rtwdev->coex_bt_devinfo_work);
 	cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work);
 	INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work);
 	INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work);
 	INIT_DELAYED_WORK(&rtwdev->track_work, rtw89_track_work);
+	INIT_DELAYED_WORK(&rtwdev->chanctx_work, rtw89_chanctx_work);
 	INIT_DELAYED_WORK(&rtwdev->coex_act1_work, rtw89_coex_act1_work);
 	INIT_DELAYED_WORK(&rtwdev->coex_bt_devinfo_work, rtw89_coex_bt_devinfo_work);
 	INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work);
 	rtw89_ser_init(rtwdev);
 	rtw89_entity_init(rtwdev);
+	rtw89_tas_init(rtwdev);
 	return 0;
 }
 void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
 			   const u8 *mac_addr, bool hw_scan)
 {
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	rtwdev->scanning = true;
 	rtw89_leave_lps(rtwdev);

drivers/net/wireless/realtek/rtw89/core.h+104−0

@@ -14,6 +14,8 @@ · 13 unmodified lines
14		14
15	struct rtw89_dev;	15	struct rtw89_dev;
16	struct rtw89_pci_info;	16	struct rtw89_pci_info;
		17	struct rtw89_mac_gen_def;
		18	struct rtw89_phy_gen_def;
17		19
18	extern const struct ieee80211_ops rtw89_ops;	20	extern const struct ieee80211_ops rtw89_ops;
19		21
@@ -789,6 +791,7 @@ enum rtw89_phy_idx { · 769 unmodified lines
789		791
790	enum rtw89_sub_entity_idx {	792	enum rtw89_sub_entity_idx {
791	RTW89_SUB_ENTITY_0 = 0,	793	RTW89_SUB_ENTITY_0 = 0,
		794	RTW89_SUB_ENTITY_1 = 1,
792		795
793	NUM_OF_RTW89_SUB_ENTITY,	796	NUM_OF_RTW89_SUB_ENTITY,
794	RTW89_SUB_ENTITY_IDLE = NUM_OF_RTW89_SUB_ENTITY,	797	RTW89_SUB_ENTITY_IDLE = NUM_OF_RTW89_SUB_ENTITY,
@@ -900,6 +903,7 @@ struct rtw89_chan { · 105 unmodified lines
900	struct rtw89_chan_rcd {	903	struct rtw89_chan_rcd {
901	u8 prev_primary_channel;	904	u8 prev_primary_channel;
902	enum rtw89_band prev_band_type;	905	enum rtw89_band prev_band_type;
		906	bool band_changed;
903	};	907	};
904		908
905	struct rtw89_channel_help_params {	909	struct rtw89_channel_help_params {
@@ -2656,6 +2660,17 @@ struct rtw89_btc { · 1750 unmodified lines
2656	bool lps;	2660	bool lps;
2657	};	2661	};
2658		2662
		2663	enum rtw89_btc_hmsg {
		2664	RTW89_BTC_HMSG_TMR_EN = 0x0,
		2665	RTW89_BTC_HMSG_BT_REG_READBACK = 0x1,
		2666	RTW89_BTC_HMSG_SET_BT_REQ_SLOT = 0x2,
		2667	RTW89_BTC_HMSG_FW_EV = 0x3,
		2668	RTW89_BTC_HMSG_BT_LINK_CHG = 0x4,
		2669	RTW89_BTC_HMSG_SET_BT_REQ_STBC = 0x5,
		2670
		2671	NUM_OF_RTW89_BTC_HMSG,
		2672	};
		2673
2659	enum rtw89_ra_mode {	2674	enum rtw89_ra_mode {
2660	RTW89_RA_MODE_CCK = BIT(0),	2675	RTW89_RA_MODE_CCK = BIT(0),
2661	RTW89_RA_MODE_OFDM = BIT(1),	2676	RTW89_RA_MODE_OFDM = BIT(1),
@@ -2885,6 +2900,32 @@ struct rtw89_roc { · 223 unmodified lines
2885		2900
2886	#define RTW89_P2P_MAX_NOA_NUM 2	2901	#define RTW89_P2P_MAX_NOA_NUM 2
2887		2902
		2903	struct rtw89_p2p_ie_head {
		2904	u8 eid;
		2905	u8 ie_len;
		2906	u8 oui[3];
		2907	u8 oui_type;
		2908	} __packed;
		2909
		2910	struct rtw89_noa_attr_head {
		2911	u8 attr_type;
		2912	__le16 attr_len;
		2913	u8 index;
		2914	u8 oppps_ctwindow;
		2915	} __packed;
		2916
		2917	struct rtw89_p2p_noa_ie {
		2918	struct rtw89_p2p_ie_head p2p_head;
		2919	struct rtw89_noa_attr_head noa_head;
		2920	struct ieee80211_p2p_noa_desc noa_desc[RTW89_P2P_MAX_NOA_NUM];
		2921	} __packed;
		2922
		2923	struct rtw89_p2p_noa_setter {
		2924	struct rtw89_p2p_noa_ie ie;
		2925	u8 noa_count;
		2926	u8 noa_index;
		2927	};
		2928
2888	struct rtw89_vif {	2929	struct rtw89_vif {
2889	struct list_head list;	2930	struct list_head list;
2890	struct rtw89_dev *rtwdev;	2931	struct rtw89_dev *rtwdev;
@@ -2927,6 +2968,7 @@ struct rtw89_vif { · 36 unmodified lines
2927	struct cfg80211_scan_request *scan_req;	2968	struct cfg80211_scan_request *scan_req;
2928	struct ieee80211_scan_ies *scan_ies;	2969	struct ieee80211_scan_ies *scan_ies;
2929	struct list_head general_pkt_list;	2970	struct list_head general_pkt_list;
		2971	struct rtw89_p2p_noa_setter p2p_noa;
2930	};	2972	};
2931		2973
2932	enum rtw89_lv1_rcvy_step {	2974	enum rtw89_lv1_rcvy_step {
@@ -3339,6 +3381,10 @@ struct rtw89_dig_regs { · 406 unmodified lines
3339	u32 seg0_pd_reg;	3381	u32 seg0_pd_reg;
3340	u32 pd_lower_bound_mask;	3382	u32 pd_lower_bound_mask;
3341	u32 pd_spatial_reuse_en;	3383	u32 pd_spatial_reuse_en;
		3384	u32 bmode_pd_reg;
		3385	u32 bmode_cca_rssi_limit_en;
		3386	u32 bmode_pd_lower_bound_reg;
		3387	u32 bmode_rssi_nocca_low_th_mask;
3342	struct rtw89_reg_def p0_lna_init;	3388	struct rtw89_reg_def p0_lna_init;
3343	struct rtw89_reg_def p1_lna_init;	3389	struct rtw89_reg_def p1_lna_init;
3344	struct rtw89_reg_def p0_tia_init;	3390	struct rtw89_reg_def p0_tia_init;
@@ -3375,10 +3421,28 @@ struct rtw89_antdiv_info { · 30 unmodified lines
3375	bool get_stats;	3421	bool get_stats;
3376	};	3422	};
3377		3423
		3424	enum rtw89_chanctx_state {
		3425	RTW89_CHANCTX_STATE_MCC_START,
		3426	RTW89_CHANCTX_STATE_MCC_STOP,
		3427	};
		3428
		3429	enum rtw89_chanctx_callbacks {
		3430	RTW89_CHANCTX_CALLBACK_PLACEHOLDER,
		3431
		3432	NUM_OF_RTW89_CHANCTX_CALLBACKS,
		3433	};
		3434
		3435	struct rtw89_chanctx_listener {
		3436	void (*callbacks[NUM_OF_RTW89_CHANCTX_CALLBACKS])
		3437	(struct rtw89_dev *rtwdev, enum rtw89_chanctx_state state);
		3438	};
		3439
3378	struct rtw89_chip_info {	3440	struct rtw89_chip_info {
3379	enum rtw89_core_chip_id chip_id;	3441	enum rtw89_core_chip_id chip_id;
3380	enum rtw89_chip_gen chip_gen;	3442	enum rtw89_chip_gen chip_gen;
3381	const struct rtw89_chip_ops *ops;	3443	const struct rtw89_chip_ops *ops;
		3444	const struct rtw89_mac_gen_def *mac_def;
		3445	const struct rtw89_phy_gen_def *phy_def;
3382	const char *fw_basename;	3446	const char *fw_basename;
3383	u8 fw_format_max;	3447	u8 fw_format_max;
3384	bool try_ce_fw;	3448	bool try_ce_fw;
@@ -3434,6 +3498,7 @@ struct rtw89_chip_info { · 49 unmodified lines
3434	/* NULL if no rfe-specific, or a null-terminated array by rfe_parms */	3498	/* NULL if no rfe-specific, or a null-terminated array by rfe_parms */
3435	const struct rtw89_rfe_parms_conf *rfe_parms_conf;	3499	const struct rtw89_rfe_parms_conf *rfe_parms_conf;
3436	const struct rtw89_rfe_parms *dflt_parms;	3500	const struct rtw89_rfe_parms *dflt_parms;
		3501	const struct rtw89_chanctx_listener *chanctx_listener;
3437		3502
3438	u8 txpwr_factor_rf;	3503	u8 txpwr_factor_rf;
3439	u8 txpwr_factor_mac;	3504	u8 txpwr_factor_mac;
@@ -3690,12 +3755,34 @@ struct rtw89_sar_info { · 250 unmodified lines
3690	};	3755	};
3691	};	3756	};
3692		3757
		3758	enum rtw89_tas_state {
		3759	RTW89_TAS_STATE_DPR_OFF,
		3760	RTW89_TAS_STATE_DPR_ON,
		3761	RTW89_TAS_STATE_DPR_FORBID,
		3762	};
		3763
		3764	#define RTW89_TAS_MAX_WINDOW 50
		3765	struct rtw89_tas_info {
		3766	s16 txpwr_history[RTW89_TAS_MAX_WINDOW];
		3767	s32 total_txpwr;
		3768	u8 cur_idx;
		3769	s8 dpr_gap;
		3770	s8 delta;
		3771	enum rtw89_tas_state state;
		3772	bool enable;
		3773	};
		3774
3693	struct rtw89_chanctx_cfg {	3775	struct rtw89_chanctx_cfg {
3694	enum rtw89_sub_entity_idx idx;	3776	enum rtw89_sub_entity_idx idx;
3695	};	3777	};
3696		3778
3697	enum rtw89_entity_mode {	3779	enum rtw89_entity_mode {
3698	RTW89_ENTITY_MODE_SCC,	3780	RTW89_ENTITY_MODE_SCC,
		3781	RTW89_ENTITY_MODE_MCC_PREPARE,
		3782	RTW89_ENTITY_MODE_MCC,
		3783
		3784	NUM_OF_RTW89_ENTITY_MODE,
		3785	RTW89_ENTITY_MODE_INVALID = NUM_OF_RTW89_ENTITY_MODE,
3699	};	3786	};
3700		3787
3701	struct rtw89_sub_entity {	3788	struct rtw89_sub_entity {
@@ -4352,6 +4439,7 @@ struct rtw89_dev { · 650 unmodified lines
4352	struct rtw89_antdiv_info antdiv;	4439	struct rtw89_antdiv_info antdiv;
4353		4440
4354	struct delayed_work track_work;	4441	struct delayed_work track_work;
		4442	struct delayed_work chanctx_work;
4355	struct delayed_work coex_act1_work;	4443	struct delayed_work coex_act1_work;
4356	struct delayed_work coex_bt_devinfo_work;	4444	struct delayed_work coex_bt_devinfo_work;
4357	struct delayed_work coex_rfk_chk_work;	4445	struct delayed_work coex_rfk_chk_work;
@@ -4365,6 +4453,7 @@ struct rtw89_dev { · 7 unmodified lines
4365		4453
4366	struct rtw89_regulatory_info regulatory;	4454	struct rtw89_regulatory_info regulatory;
4367	struct rtw89_sar_info sar;	4455	struct rtw89_sar_info sar;
		4456	struct rtw89_tas_info tas;
4368		4457
4369	struct rtw89_btc btc;	4458	struct rtw89_btc btc;
4370	enum rtw89_ps_mode ps_mode;	4459	enum rtw89_ps_mode ps_mode;
@@ -4900,6 +4989,18 @@ const struct rtw89_chan_rcd rtw89_chan_rcd_get(struct rtw89_dev rtwdev, · 529 unmodified lines
4900	return &hal->sub[idx].rcd;	4989	return &hal->sub[idx].rcd;
4901	}	4990	}
4902		4991
		4992	static inline
		4993	const struct rtw89_chan rtw89_scan_chan_get(struct rtw89_dev rtwdev)
		4994	{
		4995	struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif;
		4996	struct rtw89_vif *rtwvif = vif_to_rtwvif_safe(vif);
		4997
		4998	if (rtwvif)
		4999	return rtw89_chan_get(rtwdev, rtwvif->sub_entity_idx);
		5000	else
		5001	return rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
		5002	}
		5003
4903	static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev)	5004	static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev)
4904	{	5005	{
4905	const struct rtw89_chip_info *chip = rtwdev->chip;	5006	const struct rtw89_chip_info *chip = rtwdev->chip;
@@ -5273,6 +5374,8 @@ struct rtw89_dev rtw89_alloc_ieee80211_hw(struct device device, · 367 unmodified lines
5273	void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev);	5374	void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev);
5274	void rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev);	5375	void rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev);
5275	void rtw89_get_default_chandef(struct cfg80211_chan_def *chandef);	5376	void rtw89_get_default_chandef(struct cfg80211_chan_def *chandef);
		5377	void rtw89_get_channel_params(const struct cfg80211_chan_def *chandef,
		5378	struct rtw89_chan *chan);
5276	void rtw89_set_channel(struct rtw89_dev *rtwdev);	5379	void rtw89_set_channel(struct rtw89_dev *rtwdev);
5277	void rtw89_get_channel(struct rtw89_dev rtwdev, struct rtw89_vif rtwvif,	5380	void rtw89_get_channel(struct rtw89_dev rtwdev, struct rtw89_vif rtwvif,
5278	struct rtw89_chan *chan);	5381	struct rtw89_chan *chan);
@@ -5307,5 +5410,6 @@ void rtw89_core_scan_complete(struct rtw89_dev *rtwdev, · 28 unmodified lines
5307	struct ieee80211_vif *vif, bool hw_scan);	5410	struct ieee80211_vif *vif, bool hw_scan);
5308	void rtw89_reg_6ghz_power_recalc(struct rtw89_dev *rtwdev,	5411	void rtw89_reg_6ghz_power_recalc(struct rtw89_dev *rtwdev,
5309	struct rtw89_vif *rtwvif, bool active);	5412	struct rtw89_vif *rtwvif, bool active);
		5413	void rtw89_core_ntfy_btc_event(struct rtw89_dev *rtwdev, enum rtw89_btc_hmsg event);
5310		5414
5311	#endif	5415	#endif

drivers/net/wireless/realtek/rtw89/debug.c+17−9

 		seq_puts(m, #_regd "\n"); \
 		break
-static void __print_regd(struct seq_file *m, struct rtw89_dev *rtwdev)
+static void __print_regd(struct seq_file *m, struct rtw89_dev *rtwdev,
+			 const struct rtw89_chan *chan)
 {
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 	u8 band = chan->band_type;
 	u8 regd = rtw89_regd_get(rtwdev, band);
 {
 	struct rtw89_debugfs_priv *debugfs_priv = m->private;
 	struct rtw89_dev *rtwdev = debugfs_priv->rtwdev;
+	const struct rtw89_chan *chan;
 	int ret = 0;
 	mutex_lock(&rtwdev->mutex);
 	rtw89_leave_ps_mode(rtwdev);
+	chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 	seq_puts(m, "[Regulatory] ");
-	__print_regd(m, rtwdev);
+	__print_regd(m, rtwdev, chan);
 	seq_puts(m, "[SAR]\n");
-	rtw89_print_sar(m, rtwdev);
+	rtw89_print_sar(m, rtwdev, chan->freq);
+	seq_puts(m, "[TAS]\n");
+	rtw89_print_tas(m, rtwdev);
 	seq_puts(m, "\n[TX power byrate]\n");
 	ret = __print_txpwr_map(m, rtwdev, &__txpwr_map_byr);
 				     struct rtw89_dev *rtwdev,
 				     u8 sel, u32 start_addr, u32 len)
 {
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+	u32 filter_model_addr = mac->filter_model_addr;
+	u32 indir_access_addr = mac->indir_access_addr;
 	u32 base_addr, start_page, residue;
 	u32 i, j, p, pages;
 	u32 dump_len, remain;
 	pages = len / MAC_MEM_DUMP_PAGE_SIZE + 1;
 	start_page = start_addr / MAC_MEM_DUMP_PAGE_SIZE;
 	residue = start_addr % MAC_MEM_DUMP_PAGE_SIZE;
-	base_addr = rtw89_mac_mem_base_addrs[sel];
+	base_addr = mac->mem_base_addrs[sel];
 	base_addr += start_page * MAC_MEM_DUMP_PAGE_SIZE;
 	for (p = 0; p < pages; p++) {
 		dump_len = min_t(u32, remain, MAC_MEM_DUMP_PAGE_SIZE);
-		rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, base_addr);
+		rtw89_write32(rtwdev, filter_model_addr, base_addr);
-		for (i = R_AX_INDIR_ACCESS_ENTRY + residue;
+		for (i = indir_access_addr + residue;
-		     i < R_AX_INDIR_ACCESS_ENTRY + dump_len;) {
+		     i < indir_access_addr + dump_len;) {
 			seq_printf(m, "%08xh:", i);
 			for (j = 0;
-			     j < 4 && i < R_AX_INDIR_ACCESS_ENTRY + dump_len;
+			     j < 4 && i < indir_access_addr + dump_len;
 			     j++, i += 4) {
 				val = rtw89_read32(rtwdev, i);
 				seq_printf(m, "  %08x", val);

drivers/net/wireless/realtek/rtw89/fw.c+19−5

 #include "fw.h"
 #include "mac.h"
 #include "phy.h"
+#include "ps.h"
 #include "reg.h"
 #include "util.h"
 	return;
 plain_log:
-	rtw89_info(rtwdev, "C2H log: %*s", len, buf);
+	rtw89_info(rtwdev, "C2H log: %.*s", len, buf);
 }
 	const struct rtw89_chip_info *chip = rtwdev->chip;
 	struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
 	struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	struct sk_buff *skb;
 	u8 pads[RTW89_PPE_BW_NUM];
 	u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id;
 			       struct rtw89_vif *rtwvif)
 {
 	struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	struct sk_buff *skb;
 	struct sk_buff *skb_beacon;
 	u16 tim_offset;
 	int bcn_total_len;
 	u16 beacon_rate;
+	void *noa_data;
+	u8 noa_len;
 	int ret;
 	if (vif->p2p)
 		return -ENOMEM;
 	}
+	noa_len = rtw89_p2p_noa_fetch(rtwvif, &noa_data);
+	if (noa_len &&
+	    (noa_len <= skb_tailroom(skb_beacon) ||
+	     pskb_expand_head(skb_beacon, 0, noa_len, GFP_KERNEL) == 0)) {
+		skb_put_data(skb_beacon, noa_data, noa_len);
+	}
 	bcn_total_len = H2C_BCN_BASE_LEN + skb_beacon->len;
 	skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, bcn_total_len);
 	if (!skb) {
 			 struct ieee80211_scan_request *scan_req)
 {
 	struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
 	struct cfg80211_scan_request *req = &scan_req->req;
 	u32 rx_fltr = rtwdev->hal.rx_fltr;
 	u8 mac_addr[ETH_ALEN];
 	rx_fltr &= ~B_AX_A_BC;
 	rx_fltr &= ~B_AX_A_A1_MATCH;
 	rtw89_write32_mask(rtwdev,
-			   rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+			   rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
 			   B_AX_RX_FLTR_CFG_MASK,
 			   rx_fltr);
 }
 void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
 			    bool aborted)
 {
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
 	struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info;
 	struct cfg80211_scan_info info = {
 		.aborted = aborted,
 		return;
 	rtw89_write32_mask(rtwdev,
-			   rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+			   rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
 			   B_AX_RX_FLTR_CFG_MASK,
 			   rtwdev->hal.rx_fltr);

drivers/net/wireless/realtek/rtw89/mac.c+108−89

 #include "reg.h"
 #include "util.h"
-const u32 rtw89_mac_mem_base_addrs[RTW89_MAC_MEM_NUM] = {
+static const u32 rtw89_mac_mem_base_addrs_ax[RTW89_MAC_MEM_NUM] = {
 	[RTW89_MAC_MEM_AXIDMA]	        = AXIDMA_BASE_ADDR,
 	[RTW89_MAC_MEM_SHARED_BUF]	= SHARED_BUF_BASE_ADDR,
 	[RTW89_MAC_MEM_DMAC_TBL]	= DMAC_TBL_BASE_ADDR,
 static void rtw89_mac_mem_write(struct rtw89_dev *rtwdev, u32 offset,
 				u32 val, enum rtw89_mac_mem_sel sel)
 {
-	u32 addr = rtw89_mac_mem_base_addrs[sel] + offset;
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+	u32 addr = mac->mem_base_addrs[sel] + offset;
-	rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, addr);
+	rtw89_write32(rtwdev, mac->filter_model_addr, addr);
-	rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY, val);
+	rtw89_write32(rtwdev, mac->indir_access_addr, val);
 }
 static u32 rtw89_mac_mem_read(struct rtw89_dev *rtwdev, u32 offset,
 			      enum rtw89_mac_mem_sel sel)
 {
-	u32 addr = rtw89_mac_mem_base_addrs[sel] + offset;
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+	u32 addr = mac->mem_base_addrs[sel] + offset;
-	rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, addr);
+	rtw89_write32(rtwdev, mac->filter_model_addr, addr);
-	return rtw89_read32(rtwdev, R_AX_INDIR_ACCESS_ENTRY);
+	return rtw89_read32(rtwdev, mac->indir_access_addr);
 }
 int rtw89_mac_check_mac_en(struct rtw89_dev *rtwdev, u8 mac_idx,
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_ADDR_CAM_CTRL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_ADDR_CAM_CTRL, mac_idx);
 	val = rtw89_read32(rtwdev, reg);
 	val |= u32_encode_bits(0x7f, B_AX_ADDR_CAM_RANGE_MASK) |
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_PREBKF_CFG_1, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PREBKF_CFG_1, mac_idx);
 	if (rtwdev->chip->chip_id == RTL8852C)
 		rtw89_write32_mask(rtwdev, reg, B_AX_SIFS_MACTXEN_T1_MASK,
 				   SIFS_MACTXEN_T1_V1);
 				   SIFS_MACTXEN_T1);
 	if (rtwdev->chip->chip_id == RTL8852B || rtwdev->chip->chip_id == RTL8851B) {
-		reg = rtw89_mac_reg_by_idx(R_AX_SCH_EXT_CTRL, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_SCH_EXT_CTRL, mac_idx);
 		rtw89_write32_set(rtwdev, reg, B_AX_PORT_RST_TSF_ADV);
 	}
-	reg = rtw89_mac_reg_by_idx(R_AX_CCA_CFG_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CCA_CFG_0, mac_idx);
 	rtw89_write32_clr(rtwdev, reg, B_AX_BTCCA_EN);
-	reg = rtw89_mac_reg_by_idx(R_AX_PREBKF_CFG_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PREBKF_CFG_0, mac_idx);
 	if (rtwdev->chip->chip_id == RTL8852C) {
 		val = rtw89_read32_mask(rtwdev, R_AX_SEC_ENG_CTRL,
 					B_AX_TX_PARTIAL_MODE);
 	switch (type) {
 	case RTW89_MGNT:
-		reg = rtw89_mac_reg_by_idx(R_AX_MGNT_FLTR, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MGNT_FLTR, mac_idx);
 		break;
 	case RTW89_CTRL:
-		reg = rtw89_mac_reg_by_idx(R_AX_CTRL_FLTR, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CTRL_FLTR, mac_idx);
 		break;
 	case RTW89_DATA:
-		reg = rtw89_mac_reg_by_idx(R_AX_DATA_FLTR, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_DATA_FLTR, mac_idx);
 		break;
 	default:
 		rtw89_err(rtwdev, "[ERR]set rx filter type err\n");
 		    B_AX_LSIG_PARITY_CHK_EN | B_AX_SIGA_CRC_CHK |
 		    B_AX_VHT_SU_SIGB_CRC_CHK | B_AX_VHT_MU_SIGB_CRC_CHK |
 		    B_AX_HE_SIGB_CRC_CHK;
-	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, mac_idx),
+	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, mac_idx),
 		      mac_ftlr);
-	rtw89_write16(rtwdev, rtw89_mac_reg_by_idx(R_AX_PLCP_HDR_FLTR, mac_idx),
+	rtw89_write16(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_PLCP_HDR_FLTR, mac_idx),
 		      plcp_ftlr);
 	return 0;
 	switch (rtwdev->chip->chip_id) {
 	case RTL8852A:
 	case RTL8852B:
-		reg = rtw89_mac_reg_by_idx(R_AX_RSP_CHK_SIG, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RSP_CHK_SIG, mac_idx);
 		val32 = rtw89_read32(rtwdev, reg) & ~b_rsp_chk_nav;
 		rtw89_write32(rtwdev, reg, val32);
-		reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_0, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_0, mac_idx);
 		val32 = rtw89_read32(rtwdev, reg) & ~b_rsp_chk_cca;
 		rtw89_write32(rtwdev, reg, val32);
 		break;
 	default:
-		reg = rtw89_mac_reg_by_idx(R_AX_RSP_CHK_SIG, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RSP_CHK_SIG, mac_idx);
 		val32 = rtw89_read32(rtwdev, reg) | b_rsp_chk_nav;
 		rtw89_write32(rtwdev, reg, val32);
-		reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_0, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_0, mac_idx);
 		val32 = rtw89_read32(rtwdev, reg) | b_rsp_chk_cca;
 		rtw89_write32(rtwdev, reg, val32);
 		break;
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_CCA_CONTROL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CCA_CONTROL, mac_idx);
 	val = rtw89_read32(rtwdev, reg);
 	val |= (B_AX_TB_CHK_BASIC_NAV | B_AX_TB_CHK_BTCCA |
 		B_AX_TB_CHK_EDCCA | B_AX_TB_CHK_CCA_P20 |
 	ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_RX_SR_CTRL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_SR_CTRL, mac_idx);
 	rtw89_write8_clr(rtwdev, reg, B_AX_SR_EN);
 	return 0;
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_MAC_LOOPBACK, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MAC_LOOPBACK, mac_idx);
 	rtw89_write32_clr(rtwdev, reg, B_AX_MACLBK_EN);
-	reg = rtw89_mac_reg_by_idx(R_AX_TCR0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TCR0, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_TCR_UDF_THSD_MASK, TCR_UDF_THSD);
-	reg = rtw89_mac_reg_by_idx(R_AX_TXD_FIFO_CTRL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXD_FIFO_CTRL, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_TXDFIFO_HIGH_MCS_THRE_MASK, TXDFIFO_HIGH_MCS_THRE);
 	rtw89_write32_mask(rtwdev, reg, B_AX_TXDFIFO_LOW_MCS_THRE_MASK, TXDFIFO_LOW_MCS_THRE);
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_0, mac_idx);
 	val = rtw89_read32(rtwdev, reg);
 	val &= ~B_AX_WMAC_SPEC_SIFS_CCK_MASK;
 	val |= FIELD_PREP(B_AX_WMAC_SPEC_SIFS_CCK_MASK, WMAC_SPEC_SIFS_CCK);
 	val |= FIELD_PREP(B_AX_WMAC_SPEC_SIFS_OFDM_MASK, sifs);
 	rtw89_write32(rtwdev, reg, val);
-	reg = rtw89_mac_reg_by_idx(R_AX_RXTRIG_TEST_USER_2, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RXTRIG_TEST_USER_2, mac_idx);
 	rtw89_write32_set(rtwdev, reg, B_AX_RXTRIG_FCSCHK_EN);
-	reg = rtw89_mac_reg_by_idx(rrsr->ref_rate.addr, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->ref_rate.addr, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data);
-	reg = rtw89_mac_reg_by_idx(rrsr->rsc.addr, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->rsc.addr, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, rrsr->rsc.mask, rrsr->rsc.data);
 	return 0;
 	if (mac_idx == RTW89_MAC_0)
 		rst_bacam(rtwdev);
-	reg = rtw89_mac_reg_by_idx(R_AX_RESPBA_CAM_CTRL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RESPBA_CAM_CTRL, mac_idx);
 	rtw89_write8_set(rtwdev, reg, B_AX_SSN_SEL);
-	reg = rtw89_mac_reg_by_idx(R_AX_DLK_PROTECT_CTL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_DLK_PROTECT_CTL, mac_idx);
 	val = rtw89_read16(rtwdev, reg);
 	val = u16_replace_bits(val, TRXCFG_RMAC_DATA_TO,
 			       B_AX_RX_DLK_DATA_TIME_MASK);
 			       B_AX_RX_DLK_CCA_TIME_MASK);
 	rtw89_write16(rtwdev, reg, val);
-	reg = rtw89_mac_reg_by_idx(R_AX_RCR, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RCR, mac_idx);
 	rtw89_write8_mask(rtwdev, reg, B_AX_CH_EN_MASK, 0x1);
-	reg = rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RX_FLTR_OPT, mac_idx);
 	if (mac_idx == RTW89_MAC_0)
 		rx_qta = rtwdev->mac.dle_info.c0_rx_qta;
 	else
 	if (rtwdev->chip->chip_id == RTL8852A &&
 	    rtwdev->hal.cv == CHIP_CBV) {
 		rtw89_write16_mask(rtwdev,
-				   rtw89_mac_reg_by_idx(R_AX_DLK_PROTECT_CTL, mac_idx),
+				   rtw89_mac_reg_by_idx(rtwdev, R_AX_DLK_PROTECT_CTL, mac_idx),
 				   B_AX_RX_DLK_CCA_TIME_MASK, 0);
-		rtw89_write16_set(rtwdev, rtw89_mac_reg_by_idx(R_AX_RCR, mac_idx),
+		rtw89_write16_set(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_RCR, mac_idx),
 				  BIT(12));
 	}
-	reg = rtw89_mac_reg_by_idx(R_AX_PLCP_HDR_FLTR, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PLCP_HDR_FLTR, mac_idx);
 	rtw89_write8_clr(rtwdev, reg, B_AX_VHT_SU_SIGB_CRC_CHK);
 	return ret;
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
 	val = rtw89_read32(rtwdev, reg);
 	val = u32_replace_bits(val, 0, B_AX_TXSC_20M_MASK);
 	val = u32_replace_bits(val, 0, B_AX_TXSC_40M_MASK);
 	rtw89_write32(rtwdev, reg, val);
 	if (chip_id == RTL8852A || chip_id == RTL8852B) {
-		reg = rtw89_mac_reg_by_idx(R_AX_PTCL_RRSR1, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_RRSR1, mac_idx);
 		rtw89_write32_mask(rtwdev, reg, B_AX_RRSR_RATE_EN_MASK, RRSR_OFDM_CCK_EN);
 	}
 		return ret;
 	if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) {
-		reg = rtw89_mac_reg_by_idx(R_AX_SIFS_SETTING, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_SIFS_SETTING, mac_idx);
 		val = rtw89_read32(rtwdev, reg);
 		val = u32_replace_bits(val, S_AX_CTS2S_TH_1K,
 				       B_AX_HW_CTS2SELF_PKT_LEN_TH_MASK);
 		val |= B_AX_HW_CTS2SELF_EN;
 		rtw89_write32(rtwdev, reg, val);
-		reg = rtw89_mac_reg_by_idx(R_AX_PTCL_FSM_MON, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_FSM_MON, mac_idx);
 		val = rtw89_read32(rtwdev, reg);
 		val = u32_replace_bits(val, S_AX_PTCL_TO_2MS, B_AX_PTCL_TX_ARB_TO_THR_MASK);
 		val &= ~B_AX_PTCL_TX_ARB_TO_MODE;
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_RXDMA_CTRL_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RXDMA_CTRL_0, mac_idx);
 	rtw89_write8_clr(rtwdev, reg, RX_FULL_MODE);
 	return 0;
 static int rtw89_set_hw_sch_tx_en(struct rtw89_dev *rtwdev, u8 mac_idx,
 				  u16 tx_en, u16 tx_en_mask)
 {
-	u32 reg = rtw89_mac_reg_by_idx(R_AX_CTN_TXEN, mac_idx);
+	u32 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CTN_TXEN, mac_idx);
 	u16 val;
 	int ret;
 static int rtw89_set_hw_sch_tx_en_v1(struct rtw89_dev *rtwdev, u8 mac_idx,
 				     u32 tx_en, u32 tx_en_mask)
 {
-	u32 reg = rtw89_mac_reg_by_idx(R_AX_CTN_DRV_TXEN, mac_idx);
+	u32 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CTN_DRV_TXEN, mac_idx);
 	u32 val;
 	int ret;
 	int ret;
 	*tx_en = rtw89_read16(rtwdev,
-			      rtw89_mac_reg_by_idx(R_AX_CTN_TXEN, mac_idx));
+			      rtw89_mac_reg_by_idx(rtwdev, R_AX_CTN_TXEN, mac_idx));
 	switch (sel) {
 	case RTW89_SCH_TX_SEL_ALL:
 	int ret;
 	*tx_en = rtw89_read32(rtwdev,
-			      rtw89_mac_reg_by_idx(R_AX_CTN_DRV_TXEN, mac_idx));
+			      rtw89_mac_reg_by_idx(rtwdev, R_AX_CTN_DRV_TXEN, mac_idx));
 	switch (sel) {
 	case RTW89_SCH_TX_SEL_ALL:
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_PTCL_TX_CTN_SEL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_TX_CTN_SEL, mac_idx);
 	ret = read_poll_timeout(rtw89_read8, val,
 				(val & B_AX_PTCL_TX_ON_STAT) == 0,
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_idx(R_AX_SCHEDULE_ERR_IMR, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_SCHEDULE_ERR_IMR, mac_idx);
 	rtw89_write32_clr(rtwdev, reg, B_AX_SORT_NON_IDLE_ERR_INT_EN |
 				       B_AX_FSM_TIMEOUT_ERR_INT_EN);
 	rtw89_write32_set(rtwdev, reg, B_AX_FSM_TIMEOUT_ERR_INT_EN);
 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;
 	u32 reg;
-	reg = rtw89_mac_reg_by_idx(R_AX_PTCL_IMR0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PTCL_IMR0, mac_idx);
 	rtw89_write32_clr(rtwdev, reg, imr->ptcl_imr_clr);
 	rtw89_write32_set(rtwdev, reg, imr->ptcl_imr_set);
 }
 	enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id;
 	u32 reg;
-	reg = rtw89_mac_reg_by_idx(imr->cdma_imr_0_reg, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_0_reg, mac_idx);
 	rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_0_clr);
 	rtw89_write32_set(rtwdev, reg, imr->cdma_imr_0_set);
 	if (chip_id == RTL8852C) {
-		reg = rtw89_mac_reg_by_idx(imr->cdma_imr_1_reg, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_1_reg, mac_idx);
 		rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_1_clr);
 		rtw89_write32_set(rtwdev, reg, imr->cdma_imr_1_set);
 	}
 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;
 	u32 reg;
-	reg = rtw89_mac_reg_by_idx(imr->phy_intf_imr_reg, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, imr->phy_intf_imr_reg, mac_idx);
 	rtw89_write32_clr(rtwdev, reg, imr->phy_intf_imr_clr);
 	rtw89_write32_set(rtwdev, reg, imr->phy_intf_imr_set);
 }
 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;
 	u32 reg;
-	reg = rtw89_mac_reg_by_idx(imr->rmac_imr_reg, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, imr->rmac_imr_reg, mac_idx);
 	rtw89_write32_clr(rtwdev, reg, imr->rmac_imr_clr);
 	rtw89_write32_set(rtwdev, reg, imr->rmac_imr_set);
 }
 	const struct rtw89_imr_info *imr = rtwdev->chip->imr_info;
 	u32 reg;
-	reg = rtw89_mac_reg_by_idx(imr->tmac_imr_reg, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, imr->tmac_imr_reg, mac_idx);
 	rtw89_write32_clr(rtwdev, reg, imr->tmac_imr_clr);
 	rtw89_write32_set(rtwdev, reg, imr->tmac_imr_set);
 }
 {
 	u8 i;
+	if (rtwdev->chip->chip_gen != RTW89_CHIP_AX)
+		return;
 	for (i = 0; i < 4; i++) {
 		rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR,
 			      DMAC_TBL_BASE_ADDR + (macid << 4) + (i << 2));
 static void rtw89_mac_cmac_tbl_init(struct rtw89_dev *rtwdev, u8 macid)
 {
+	if (rtwdev->chip->chip_gen != RTW89_CHIP_AX)
+		return;
 	rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR,
 		      CMAC_TBL_BASE_ADDR + macid * CCTL_INFO_SIZE);
 	rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY, 0x4);
 	u8 port = rtwvif->port;
 	u32 reg;
-	reg = rtw89_mac_reg_by_idx(hiq_win_addr[port], rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, hiq_win_addr[port], rtwvif->mac_idx);
 	rtw89_write8(rtwdev, reg, win);
 }
 	const struct rtw89_port_reg *p = &rtw_port_base;
 	u32 addr;
-	addr = rtw89_mac_reg_by_idx(R_AX_MD_TSFT_STMP_CTL, rtwvif->mac_idx);
+	addr = rtw89_mac_reg_by_idx(rtwdev, R_AX_MD_TSFT_STMP_CTL, rtwvif->mac_idx);
 	rtw89_write8_set(rtwdev, addr, B_AX_UPD_HGQMD | B_AX_UPD_TIMIE);
 	rtw89_write16_port_mask(rtwdev, rtwvif, p->dtim_ctrl, B_AX_DTIM_NUM_MASK,
 	bss_color = vif->bss_conf.he_bss_color.color;
 	reg_base = port >= 4 ? R_AX_PTCL_BSS_COLOR_1 : R_AX_PTCL_BSS_COLOR_0;
-	reg = rtw89_mac_reg_by_idx(reg_base, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, reg_base, rtwvif->mac_idx);
 	rtw89_write32_mask(rtwdev, reg, masks[port], bss_color);
 }
 		return;
 	if (port == 0) {
-		reg = rtw89_mac_reg_by_idx(R_AX_MBSSID_CTRL, rtwvif->mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MBSSID_CTRL, rtwvif->mac_idx);
 		rtw89_write32_clr(rtwdev, reg, B_AX_P0MB_ALL_MASK);
 	}
 }
 	u32 reg;
 	u32 val;
-	reg = rtw89_mac_reg_by_idx(R_AX_MBSSID_DROP_0, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MBSSID_DROP_0, rtwvif->mac_idx);
 	val = rtw89_read32(rtwdev, reg);
 	val &= ~FIELD_PREP(B_AX_PORT_DROP_4_0_MASK, BIT(port));
 	if (port == 0)
 	u32 val, reg;
 	val = RTW89_PORT_OFFSET_TU_TO_32US(offset_tu);
-	reg = rtw89_mac_reg_by_idx(R_AX_PORT0_TSF_SYNC + rtwvif->port * 4,
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PORT0_TSF_SYNC + rtwvif->port * 4,
 				   rtwvif->mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port);
 			  rtw89_mac_check_he_obss_narrow_bw_ru_iter,
 			  &tolerated);
-	reg = rtw89_mac_reg_by_idx(R_AX_RXTRIG_TEST_USER_2, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_RXTRIG_TEST_USER_2, rtwvif->mac_idx);
 	if (tolerated)
 		rtw89_write32_clr(rtwdev, reg, B_AX_RXTRIG_RU26_DIS);
 	else
 {
 	const struct rtw89_dle_mem *dle_mem = rtwdev->chip->dle_mem;
 	enum rtw89_qta_mode mode = dle_mem->mode;
-	u32 addr = rtw89_mac_reg_by_idx(reg_base, phy_idx);
+	u32 addr = rtw89_mac_reg_by_idx(rtwdev, reg_base, phy_idx);
 	if (addr < R_AX_PWR_RATE_CTRL || addr > CMAC1_END_ADDR) {
 		rtw89_err(rtwdev, "[TXPWR] addr=0x%x exceed txpwr cr\n",
 int rtw89_mac_cfg_ppdu_status(struct rtw89_dev *rtwdev, u8 mac_idx, bool enable)
 {
-	u32 reg = rtw89_mac_reg_by_idx(R_AX_PPDU_STAT, mac_idx);
+	u32 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PPDU_STAT, mac_idx);
 	int ret;
 	ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
 	time_th = min_t(u32, time_th >> MAC_AX_TIME_TH_SH, MAC_AX_TIME_TH_MAX);
 	len_th = min_t(u32, len_th >> MAC_AX_LEN_TH_SH, MAC_AX_LEN_TH_MAX);
-	reg = rtw89_mac_reg_by_idx(R_AX_AGG_LEN_HT_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_AGG_LEN_HT_0, mac_idx);
 	rtw89_write16_mask(rtwdev, reg, B_AX_RTS_TXTIME_TH_MASK, time_th);
 	rtw89_write16_mask(rtwdev, reg, B_AX_RTS_LEN_TH_MASK, len_th);
 }
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_BT_PLT, plt->band);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BT_PLT, plt->band);
 	val = (plt->tx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_TX_PLT_GNT_LTE_RX : 0) |
 	      (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_TX_PLT_GNT_BT_TX : 0) |
 	      (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_TX_PLT_GNT_BT_RX : 0) |
 	u32 reg;
 	u16 cnt;
-	reg = rtw89_mac_reg_by_idx(R_AX_BT_PLT, band);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BT_PLT, band);
 	cnt = rtw89_read32_mask(rtwdev, reg, B_AX_BT_PLT_PKT_CNT_MASK);
 	rtw89_write16_set(rtwdev, reg, B_AX_BT_PLT_RST);
 	u32 reg;
 	rtw89_debug(rtwdev, RTW89_DBG_BF, "set bfee standby_timer to %d\n", keep);
-	reg = rtw89_mac_reg_by_idx(R_AX_BFMEE_RESP_OPTION, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMEE_RESP_OPTION, mac_idx);
 	if (keep) {
 		set_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags);
 		rtw89_write32_mask(rtwdev, reg, B_AX_BFMEE_BFRP_RX_STANDBY_TIMER_MASK,
 		   B_AX_BFMEE_HE_NDPA_EN;
 	rtw89_debug(rtwdev, RTW89_DBG_BF, "set bfee ndpa_en to %d\n", en);
-	reg = rtw89_mac_reg_by_idx(R_AX_BFMEE_RESP_OPTION, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMEE_RESP_OPTION, mac_idx);
 	if (en) {
 		set_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags);
 		rtw89_write32_set(rtwdev, reg, mask);
 	/* AP mode set tx gid to 63 */
 	/* STA mode set tx gid to 0(default) */
-	reg = rtw89_mac_reg_by_idx(R_AX_BFMER_CTRL_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMER_CTRL_0, mac_idx);
 	rtw89_write32_set(rtwdev, reg, B_AX_BFMER_NDP_BFEN);
-	reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_RRSC, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_RRSC, mac_idx);
 	rtw89_write32(rtwdev, reg, CSI_RRSC_BMAP);
-	reg = rtw89_mac_reg_by_idx(R_AX_BFMEE_RESP_OPTION, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMEE_RESP_OPTION, mac_idx);
 	val32 = FIELD_PREP(B_AX_BFMEE_NDP_RX_STANDBY_TIMER_MASK, NDP_RX_STANDBY_TIMER);
 	rtw89_write32(rtwdev, reg, val32);
 	rtw89_mac_bfee_standby_timer(rtwdev, mac_idx, true);
 	rtw89_mac_bfee_ctrl(rtwdev, mac_idx, true);
-	reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
 	rtw89_write32_set(rtwdev, reg, B_AX_BFMEE_BFPARAM_SEL |
 				       B_AX_BFMEE_USE_NSTS |
 				       B_AX_BFMEE_CSI_GID_SEL |
 				       B_AX_BFMEE_CSI_FORCE_RETE_EN);
-	reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_RATE, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_RATE, mac_idx);
 	rtw89_write32(rtwdev, reg,
 		      u32_encode_bits(CSI_INIT_RATE_HT, B_AX_BFMEE_HT_CSI_RATE_MASK) |
 		      u32_encode_bits(CSI_INIT_RATE_VHT, B_AX_BFMEE_VHT_CSI_RATE_MASK) |
 		      u32_encode_bits(CSI_INIT_RATE_HE, B_AX_BFMEE_HE_CSI_RATE_MASK));
-	reg = rtw89_mac_reg_by_idx(R_AX_CSIRPT_OPTION, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_CSIRPT_OPTION, mac_idx);
 	rtw89_write32_set(rtwdev, reg,
 			  B_AX_CSIPRT_VHTSU_AID_EN | B_AX_CSIPRT_HESU_AID_EN);
 	nc = min(nc, sound_dim);
 	nr = min(nr, sound_dim);
-	reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
 	rtw89_write32_set(rtwdev, reg, B_AX_BFMEE_BFPARAM_SEL);
 	val = FIELD_PREP(B_AX_BFMEE_CSIINFO0_NC_MASK, nc) |
 	      FIELD_PREP(B_AX_BFMEE_CSIINFO0_STBC_EN, stbc_en);
 	if (port_sel == 0)
-		reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
 	else
-		reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_1, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_1, mac_idx);
 	rtw89_write16(rtwdev, reg, val);
 			 BIT(RTW89_MAC_BF_RRSC_HT_MSC3) |
 			 BIT(RTW89_MAC_BF_RRSC_HT_MSC5));
 	}
-	reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
 	rtw89_write32_set(rtwdev, reg, B_AX_BFMEE_BFPARAM_SEL);
 	rtw89_write32_clr(rtwdev, reg, B_AX_BFMEE_CSI_FORCE_RETE_EN);
 	rtw89_write32(rtwdev,
-		      rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_RRSC, mac_idx),
+		      rtw89_mac_reg_by_idx(rtwdev, R_AX_TRXPTCL_RESP_CSI_RRSC, mac_idx),
 		      rrsc);
 	return 0;
 	rtw89_debug(rtwdev, RTW89_DBG_BF, "update bf GID table\n");
 	p = (__le32 *)conf->mu_group.membership;
-	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION_EN0, mac_idx),
+	rtw89_write32(rtwdev,
+		      rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION_EN0, mac_idx),
 		      le32_to_cpu(p[0]));
-	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION_EN1, mac_idx),
+	rtw89_write32(rtwdev,
+		      rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION_EN1, mac_idx),
 		      le32_to_cpu(p[1]));
 	p = (__le32 *)conf->mu_group.position;
-	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION0, mac_idx),
+	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION0, mac_idx),
 		      le32_to_cpu(p[0]));
-	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION1, mac_idx),
+	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION1, mac_idx),
 		      le32_to_cpu(p[1]));
-	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION2, mac_idx),
+	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION2, mac_idx),
 		      le32_to_cpu(p[2]));
-	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(R_AX_GID_POSITION3, mac_idx),
+	rtw89_write32(rtwdev, rtw89_mac_reg_by_idx(rtwdev, R_AX_GID_POSITION3, mac_idx),
 		      le32_to_cpu(p[3]));
 }
 			return ret;
 		}
-		reg = rtw89_mac_reg_by_idx(R_AX_AMPDU_AGG_LIMIT, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_AMPDU_AGG_LIMIT, mac_idx);
 		rtw89_write32_mask(rtwdev, reg, B_AX_AMPDU_MAX_TIME_MASK,
 				   max_tx_time >> 5);
 	}
 			return ret;
 		}
-		reg = rtw89_mac_reg_by_idx(R_AX_AMPDU_AGG_LIMIT, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_AMPDU_AGG_LIMIT, mac_idx);
 		*tx_time = rtw89_read32_mask(rtwdev, reg, B_AX_AMPDU_MAX_TIME_MASK) << 5;
 	}
 			return ret;
 		}
-		reg = rtw89_mac_reg_by_idx(R_AX_TXCNT, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXCNT, mac_idx);
 		*tx_retry = rtw89_read32_mask(rtwdev, reg, B_AX_L_TXCNT_LMT_MASK);
 	}
 	if (ret)
 		return ret;
-	reg = rtw89_mac_reg_by_idx(R_AX_MUEDCA_EN, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MUEDCA_EN, mac_idx);
 	if (en)
 		rtw89_write16_set(rtwdev, reg, set);
 	else
 	}
 	return ret;
 }
+const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
+	.band1_offset = RTW89_MAC_AX_BAND_REG_OFFSET,
+	.filter_model_addr = R_AX_FILTER_MODEL_ADDR,
+	.indir_access_addr = R_AX_INDIR_ACCESS_ENTRY,
+	.mem_base_addrs = rtw89_mac_mem_base_addrs_ax,
+	.rx_fltr = R_AX_RX_FLTR_OPT,
+};
+EXPORT_SYMBOL(rtw89_mac_gen_ax);

drivers/net/wireless/realtek/rtw89/mac.h+55−14

 /* SRAM mem dump */
 #define R_AX_INDIR_ACCESS_ENTRY 0x40000
+#define R_BE_INDIR_ACCESS_ENTRY 0x80000
 #define	AXIDMA_BASE_ADDR		0x18006000
 #define	STA_SCHED_BASE_ADDR		0x18808000
 #define	TXDATA_FIFO_1_BASE_ADDR		0x188A1000
 #define	CPU_LOCAL_BASE_ADDR		0x18003000
+#define WD_PAGE_BASE_ADDR_BE		0x0
+#define CPU_LOCAL_BASE_ADDR_BE		0x18003000
+#define AXIDMA_BASE_ADDR_BE		0x18006000
+#define SHARED_BUF_BASE_ADDR_BE		0x18700000
+#define DMAC_TBL_BASE_ADDR_BE		0x18800000
+#define SHCUT_MACHDR_BASE_ADDR_BE	0x18800800
+#define STA_SCHED_BASE_ADDR_BE		0x18818000
+#define NAT25_CAM_BASE_ADDR_BE		0x18820000
+#define RXPLD_FLTR_CAM_BASE_ADDR_BE	0x18823000
+#define SEC_CAM_BASE_ADDR_BE		0x18824000
+#define WOW_CAM_BASE_ADDR_BE		0x18828000
+#define MLD_TBL_BASE_ADDR_BE		0x18829000
+#define RX_CLSF_CAM_BASE_ADDR_BE	0x1882A000
+#define CMAC_TBL_BASE_ADDR_BE		0x18840000
+#define ADDR_CAM_BASE_ADDR_BE		0x18850000
+#define BSSID_CAM_BASE_ADDR_BE		0x18858000
+#define BA_CAM_BASE_ADDR_BE		0x18859000
+#define BCN_IE_CAM0_BASE_ADDR_BE	0x18860000
+#define TXDATA_FIFO_0_BASE_ADDR_BE	0x18861000
+#define TXD_FIFO_0_BASE_ADDR_BE		0x18862000
+#define BCN_IE_CAM1_BASE_ADDR_BE	0x18880000
+#define TXDATA_FIFO_1_BASE_ADDR_BE	0x18881000
+#define TXD_FIFO_1_BASE_ADDR_BE		0x18881800
+#define DCPU_LOCAL_BASE_ADDR_BE		0x19C02000
 #define CCTL_INFO_SIZE		32
 enum rtw89_mac_mem_sel {
 	RTW89_MAC_MEM_BSSID_CAM,
 	RTW89_MAC_MEM_TXD_FIFO_0_V1,
 	RTW89_MAC_MEM_TXD_FIFO_1_V1,
+	RTW89_MAC_MEM_WD_PAGE,
 	/* keep last */
 	RTW89_MAC_MEM_NUM,
 };
-extern const u32 rtw89_mac_mem_base_addrs[];
 enum rtw89_rpwm_req_pwr_state {
 	RTW89_MAC_RPWM_REQ_PWR_STATE_ACTIVE = 0,
 	RTW89_MAC_RPWM_REQ_PWR_STATE_BAND0_RFON = 1,
 	({typeof(_addr) __addr = (_addr); \
 	  __addr >= R_AX_CMAC_REG_START && __addr <= R_AX_CMAC_REG_END; })
 #define RTW89_MAC_AX_BAND_REG_OFFSET 0x2000
+#define RTW89_MAC_BE_BAND_REG_OFFSET 0x4000
 #define PTCL_IDLE_POLL_CNT	10000
 #define SW_CVR_DUR_US	8
 extern const struct rtw89_mac_size_set rtw89_mac_size;
-static inline u32 rtw89_mac_reg_by_idx(u32 reg_base, u8 band)
+struct rtw89_mac_gen_def {
+	u32 band1_offset;
+	u32 filter_model_addr;
+	u32 indir_access_addr;
+	const u32 *mem_base_addrs;
+	u32 rx_fltr;
+};
+extern const struct rtw89_mac_gen_def rtw89_mac_gen_ax;
+extern const struct rtw89_mac_gen_def rtw89_mac_gen_be;
+static inline
+u32 rtw89_mac_reg_by_idx(struct rtw89_dev *rtwdev, u32 reg_base, u8 band)
 {
-	return band == 0 ? reg_base : (reg_base + 0x2000);
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+	return band == 0 ? reg_base : (reg_base + mac->band1_offset);
 }
-static inline u32 rtw89_mac_reg_by_port(u32 base, u8 port, u8 mac_idx)
+static inline
+u32 rtw89_mac_reg_by_port(struct rtw89_dev *rtwdev, u32 base, u8 port, u8 mac_idx)
 {
-	return rtw89_mac_reg_by_idx(base + port * 0x40, mac_idx);
+	return rtw89_mac_reg_by_idx(rtwdev, base + port * 0x40, mac_idx);
 }
 static inline u32
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx);
 	return rtw89_read32(rtwdev, reg);
 }
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx);
 	return rtw89_read32_mask(rtwdev, reg, mask);
 }
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx);
 	rtw89_write32(rtwdev, reg, data);
 }
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx);
 	rtw89_write32_mask(rtwdev, reg, mask, data);
 }
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx);
 	rtw89_write16_mask(rtwdev, reg, mask, data);
 }
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx);
 	rtw89_write32_clr(rtwdev, reg, bit);
 }
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx);
 	rtw89_write16_clr(rtwdev, reg, bit);
 }
 {
 	u32 reg;
-	reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_port(rtwdev, base, rtwvif->port, rtwvif->mac_idx);
 	rtw89_write32_set(rtwdev, reg, bit);
 }

drivers/net/wireless/realtek/rtw89/mac80211.c+10−4

 				       u64 multicast)
 {
 	struct rtw89_dev *rtwdev = hw->priv;
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
 	mutex_lock(&rtwdev->mutex);
 	rtw89_leave_ps_mode(rtwdev);
 	}
 	rtw89_write32_mask(rtwdev,
-			   rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0),
+			   rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
 			   B_AX_RX_FLTR_CFG_MASK,
 			   rtwdev->hal.rx_fltr);
 	if (!rtwdev->dbcc_en)
 		goto out;
 	rtw89_write32_mask(rtwdev,
-			   rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_1),
+			   rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_1),
 			   B_AX_RX_FLTR_CFG_MASK,
 			   rtwdev->hal.rx_fltr);
 			      struct rtw89_vif *rtwvif, u8 aifsn)
 {
 	struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif);
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	u8 slot_time;
 	u8 sifs;
 	val = FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_TIMER_MASK, timer_32us) |
 	      FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_CW_MASK, mu_edca->ecw_min_max) |
 	      FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_AIFS_MASK, aifs);
-	reg = rtw89_mac_reg_by_idx(ac_to_mu_edca_param[ac], rtwvif->mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, ac_to_mu_edca_param[ac], rtwvif->mac_idx);
 	rtw89_write32(rtwdev, reg, val);
 	rtw89_mac_set_hw_muedca_ctrl(rtwdev, rtwvif, true);
 			rtw89_chip_cfg_txpwr_ul_tb_offset(rtwdev, vif);
 			rtw89_mac_port_update(rtwdev, rtwvif);
 			rtw89_mac_set_he_obss_narrow_bw_ru(rtwdev, vif);
+			rtw89_queue_chanctx_work(rtwdev);
 		} else {
 			/* Abort ongoing scan if cancel_scan isn't issued
 			 * when disconnected by peer
 	rtw89_fw_h2c_join_info(rtwdev, rtwvif, NULL, true);
 	rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL);
 	rtw89_chip_rfk_channel(rtwdev);
+	rtw89_queue_chanctx_work(rtwdev);
 	mutex_unlock(&rtwdev->mutex);
 	return 0;

drivers/net/wireless/realtek/rtw89/mac_be.c+38−0

@@ -0,0 +1,38 @@
	1	// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
	2	/* Copyright(c) 2019-2020 Realtek Corporation
	3	*/
	4
	5	#include "mac.h"
	6	#include "reg.h"
	7
	8	static const u32 rtw89_mac_mem_base_addrs_be[RTW89_MAC_MEM_NUM] = {
	9	[RTW89_MAC_MEM_AXIDMA] = AXIDMA_BASE_ADDR_BE,
	10	[RTW89_MAC_MEM_SHARED_BUF] = SHARED_BUF_BASE_ADDR_BE,
	11	[RTW89_MAC_MEM_DMAC_TBL] = DMAC_TBL_BASE_ADDR_BE,
	12	[RTW89_MAC_MEM_SHCUT_MACHDR] = SHCUT_MACHDR_BASE_ADDR_BE,
	13	[RTW89_MAC_MEM_STA_SCHED] = STA_SCHED_BASE_ADDR_BE,
	14	[RTW89_MAC_MEM_RXPLD_FLTR_CAM] = RXPLD_FLTR_CAM_BASE_ADDR_BE,
	15	[RTW89_MAC_MEM_SECURITY_CAM] = SEC_CAM_BASE_ADDR_BE,
	16	[RTW89_MAC_MEM_WOW_CAM] = WOW_CAM_BASE_ADDR_BE,
	17	[RTW89_MAC_MEM_CMAC_TBL] = CMAC_TBL_BASE_ADDR_BE,
	18	[RTW89_MAC_MEM_ADDR_CAM] = ADDR_CAM_BASE_ADDR_BE,
	19	[RTW89_MAC_MEM_BA_CAM] = BA_CAM_BASE_ADDR_BE,
	20	[RTW89_MAC_MEM_BCN_IE_CAM0] = BCN_IE_CAM0_BASE_ADDR_BE,
	21	[RTW89_MAC_MEM_BCN_IE_CAM1] = BCN_IE_CAM1_BASE_ADDR_BE,
	22	[RTW89_MAC_MEM_TXD_FIFO_0] = TXD_FIFO_0_BASE_ADDR_BE,
	23	[RTW89_MAC_MEM_TXD_FIFO_1] = TXD_FIFO_1_BASE_ADDR_BE,
	24	[RTW89_MAC_MEM_TXDATA_FIFO_0] = TXDATA_FIFO_0_BASE_ADDR_BE,
	25	[RTW89_MAC_MEM_TXDATA_FIFO_1] = TXDATA_FIFO_1_BASE_ADDR_BE,
	26	[RTW89_MAC_MEM_CPU_LOCAL] = CPU_LOCAL_BASE_ADDR_BE,
	27	[RTW89_MAC_MEM_BSSID_CAM] = BSSID_CAM_BASE_ADDR_BE,
	28	[RTW89_MAC_MEM_WD_PAGE] = WD_PAGE_BASE_ADDR_BE,
	29	};
	30
	31	const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
	32	.band1_offset = RTW89_MAC_BE_BAND_REG_OFFSET,
	33	.filter_model_addr = R_BE_FILTER_MODEL_ADDR,
	34	.indir_access_addr = R_BE_INDIR_ACCESS_ENTRY,
	35	.mem_base_addrs = rtw89_mac_mem_base_addrs_be,
	36	.rx_fltr = R_BE_RX_FLTR_OPT,
	37	};
	38	EXPORT_SYMBOL(rtw89_mac_gen_be);

drivers/net/wireless/realtek/rtw89/pci.c+1−1

@@ -3939,5 +3939,5 @@ void rtw89_pci_remove(struct pci_dev *pdev) · 3938 unmodified lines
3939	EXPORT_SYMBOL(rtw89_pci_remove);	3939	EXPORT_SYMBOL(rtw89_pci_remove);
3940		3940
3941	MODULE_AUTHOR("Realtek Corporation");	3941	MODULE_AUTHOR("Realtek Corporation");
3942	MODULE_DESCRIPTION("Realtek 802.11ax wireless PCI driver");	3942	MODULE_DESCRIPTION("Realtek PCI 802.11ax wireless driver");
3943	MODULE_LICENSE("Dual BSD/GPL");	3943	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/realtek/rtw89/phy.c+188−78

 	return ra_mask;
 }
-static u64 rtw89_phy_ra_mask_cfg(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta)
+static u64 rtw89_phy_ra_mask_cfg(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta,
+				 const struct rtw89_chan *chan)
 {
 	struct ieee80211_sta *sta = rtwsta_to_sta(rtwsta);
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 	struct cfg80211_bitrate_mask *mask = &rtwsta->mask;
 	enum nl80211_band band;
 	u64 cfg_mask;
 static void rtw89_phy_ra_gi_ltf(struct rtw89_dev *rtwdev,
 				struct rtw89_sta *rtwsta,
+				const struct rtw89_chan *chan,
 				bool *fix_giltf_en, u8 *fix_giltf)
 {
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
 	struct cfg80211_bitrate_mask *mask = &rtwsta->mask;
 	u8 band = chan->band_type;
 	enum nl80211_band nl_band = rtw89_hw_to_nl80211_band(band);
 	struct rtw89_vif *rtwvif = rtwsta->rtwvif;
 	struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
 	struct rtw89_ra_info *ra = &rtwsta->ra;
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	struct ieee80211_vif *vif = rtwvif_to_vif(rtwsta->rtwvif);
 	const u64 *high_rate_masks = rtw89_ra_mask_ht_rates;
 	u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi);
 		if (sta->deflink.he_cap.he_cap_elem.phy_cap_info[1] &
 		    IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)
 			ldpc_en = 1;
-		rtw89_phy_ra_gi_ltf(rtwdev, rtwsta, &fix_giltf_en, &fix_giltf);
+		rtw89_phy_ra_gi_ltf(rtwdev, rtwsta, chan, &fix_giltf_en, &fix_giltf);
 	} else if (sta->deflink.vht_cap.vht_supported) {
 		u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
 		ra_mask &= rtw89_phy_ra_mask_rssi(rtwdev, rssi, 0);
 	ra_mask = rtw89_phy_ra_mask_recover(ra_mask, ra_mask_bak);
-	ra_mask &= rtw89_phy_ra_mask_cfg(rtwdev, rtwsta);
+	ra_mask &= rtw89_phy_ra_mask_cfg(rtwdev, rtwsta, chan);
 	switch (sta->deflink.bandwidth) {
 	case IEEE80211_STA_RX_BW_160:
 		ra->dcm_cap = 1;
 	if (rate_pattern->enable && !vif->p2p) {
-		ra_mask = rtw89_phy_ra_mask_cfg(rtwdev, rtwsta);
+		ra_mask = rtw89_phy_ra_mask_cfg(rtwdev, rtwsta, chan);
 		ra_mask &= rate_pattern->ra_mask;
 		mode = rate_pattern->ra_mode;
 	}
 	struct ieee80211_supported_band *sband;
 	struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
 	struct rtw89_phy_rate_pattern next_pattern = {0};
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	static const u16 hw_rate_he[][RTW89_CHIP_GEN_NUM] = {
 		RTW89_HW_RATE_BY_CHIP_GEN(HE_NSS1_MCS0),
 		RTW89_HW_RATE_BY_CHIP_GEN(HE_NSS2_MCS0),
 	u32 phy_page = addr >> 8;
 	u32 ofst = 0;
+	if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
+		return addr < 0x10000 ? 0x20000 : 0;
 	switch (phy_page) {
 	case 0x6:
 	case 0x7:
 	const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz;
 	const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz;
 	struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory;
+	enum nl80211_band nl_band = rtw89_hw_to_nl80211_band(band);
+	u32 freq = ieee80211_channel_to_frequency(ch, nl_band);
 	u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch);
 	u8 regd = rtw89_regd_get(rtwdev, band);
 	u8 reg6 = regulatory->reg_6ghz_power;
 	}
 	lmt = _phy_txpwr_rf_to_mac(rtwdev, lmt);
-	sar = rtw89_query_sar(rtwdev);
+	sar = rtw89_query_sar(rtwdev, freq);
 	return min(lmt, sar);
 }
 	const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz;
 	const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz;
 	struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory;
+	enum nl80211_band nl_band = rtw89_hw_to_nl80211_band(band);
+	u32 freq = ieee80211_channel_to_frequency(ch, nl_band);
 	u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch);
 	u8 regd = rtw89_regd_get(rtwdev, band);
 	u8 reg6 = regulatory->reg_6ghz_power;
 	}
 	lmt_ru = _phy_txpwr_rf_to_mac(rtwdev, lmt_ru);
-	sar = rtw89_query_sar(rtwdev);
+	sar = rtw89_query_sar(rtwdev, freq);
 	return min(lmt_ru, sar);
 }
 void rtw89_phy_ul_tb_assoc(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
 {
 	const struct rtw89_chip_info *chip = rtwdev->chip;
-	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
+	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
+						       rtwvif->sub_entity_idx);
 	struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info;
 	if (!chip->support_ul_tb_ctrl)
 static void rtw89_phy_ccx_top_setting_init(struct rtw89_dev *rtwdev)
 {
+	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
 	struct rtw89_env_monitor_info *env = &rtwdev->env_monitor;
+	const struct rtw89_ccx_regs *ccx = phy->ccx;
 	env->ccx_manual_ctrl = false;
 	env->ccx_ongoing = false;
 	env->ccx_period = 0;
 	env->ccx_unit_idx = RTW89_CCX_32_US;
-	rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_CCX_EN_MSK, 1);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->en_mask, 1);
-	rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_CCX_TRIG_OPT_MSK, 1);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->trig_opt_mask, 1);
-	rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_MEASUREMENT_TRIG_MSK, 1);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1);
-	rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_CCX_EDCCA_OPT_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->edcca_opt_mask,
 			       RTW89_CCX_EDCCA_BW20_0);
 }
 static void rtw89_phy_ifs_clm_set_th_reg(struct rtw89_dev *rtwdev)
 {
+	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
 	struct rtw89_env_monitor_info *env = &rtwdev->env_monitor;
+	const struct rtw89_ccx_regs *ccx = phy->ccx;
 	u8 i = 0;
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T1, B_IFS_T1_TH_LOW_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_l_mask,
 			       env->ifs_clm_th_l[0]);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T2, B_IFS_T2_TH_LOW_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_l_mask,
 			       env->ifs_clm_th_l[1]);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T3, B_IFS_T3_TH_LOW_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_l_mask,
 			       env->ifs_clm_th_l[2]);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T4, B_IFS_T4_TH_LOW_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_l_mask,
 			       env->ifs_clm_th_l[3]);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T1, B_IFS_T1_TH_HIGH_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_h_mask,
 			       env->ifs_clm_th_h[0]);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T2, B_IFS_T2_TH_HIGH_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_h_mask,
 			       env->ifs_clm_th_h[1]);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T3, B_IFS_T3_TH_HIGH_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_h_mask,
 			       env->ifs_clm_th_h[2]);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T4, B_IFS_T4_TH_HIGH_MSK,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_h_mask,
 			       env->ifs_clm_th_h[3]);
 	for (i = 0; i < RTW89_IFS_CLM_NUM; i++)
 static void rtw89_phy_ifs_clm_setting_init(struct rtw89_dev *rtwdev)
 {
+	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
 	struct rtw89_env_monitor_info *env = &rtwdev->env_monitor;
+	const struct rtw89_ccx_regs *ccx = phy->ccx;
 	struct rtw89_ccx_para_info para = {0};
 	env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND;
 	if (rtw89_phy_ifs_clm_th_update_check(rtwdev, &para))
 		rtw89_phy_ifs_clm_set_th_reg(rtwdev);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, B_IFS_COLLECT_EN,
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_collect_en_mask, true);
-			       true);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_en_mask, true);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T1, B_IFS_T1_EN_MSK, true);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_en_mask, true);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T2, B_IFS_T2_EN_MSK, true);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_en_mask, true);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T3, B_IFS_T3_EN_MSK, true);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_en_mask, true);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_T4, B_IFS_T4_EN_MSK, true);
 }
 static int rtw89_phy_ccx_racing_ctrl(struct rtw89_dev *rtwdev,
 static void rtw89_phy_ccx_trigger(struct rtw89_dev *rtwdev)
 {
+	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
 	struct rtw89_env_monitor_info *env = &rtwdev->env_monitor;
+	const struct rtw89_ccx_regs *ccx = phy->ccx;
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, B_IFS_COUNTER_CLR_MSK, 0);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 0);
-	rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_MEASUREMENT_TRIG_MSK, 0);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 0);
-	rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, B_IFS_COUNTER_CLR_MSK, 1);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 1);
-	rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_MEASUREMENT_TRIG_MSK, 1);
+	rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1);
 	env->ccx_ongoing = true;
 }
 static bool rtw89_phy_ifs_clm_get_result(struct rtw89_dev *rtwdev)
 {
+	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
 	struct rtw89_env_monitor_info *env = &rtwdev->env_monitor;
+	const struct rtw89_ccx_regs *ccx = phy->ccx;
 	u8 i = 0;
-	if (rtw89_phy_read32_mask(rtwdev, R_IFSCNT, B_IFSCNT_DONE_MSK) == 0) {
+	if (rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr,
+				  ccx->ifs_cnt_done_mask) == 0) {
 		rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK,
 			    "Get IFS_CLM report Fail\n");
 		return false;
 	}
 	env->ifs_clm_tx =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_TX_CNT,
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr,
-				      B_IFS_CLM_TX_CNT_MSK);
+				      ccx->ifs_clm_tx_cnt_msk);
 	env->ifs_clm_edcca_excl_cca =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_TX_CNT,
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr,
-				      B_IFS_CLM_EDCCA_EXCLUDE_CCA_FA_MSK);
+				      ccx->ifs_clm_edcca_excl_cca_fa_mask);
 	env->ifs_clm_cckcca_excl_fa =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_CCA,
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr,
-				      B_IFS_CLM_CCKCCA_EXCLUDE_FA_MSK);
+				      ccx->ifs_clm_cckcca_excl_fa_mask);
 	env->ifs_clm_ofdmcca_excl_fa =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_CCA,
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr,
-				      B_IFS_CLM_OFDMCCA_EXCLUDE_FA_MSK);
+				      ccx->ifs_clm_ofdmcca_excl_fa_mask);
 	env->ifs_clm_cckfa =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_FA,
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr,
-				      B_IFS_CLM_CCK_FA_MSK);
+				      ccx->ifs_clm_cck_fa_mask);
 	env->ifs_clm_ofdmfa =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CLM_FA,
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr,
-				      B_IFS_CLM_OFDM_FA_MSK);
+				      ccx->ifs_clm_ofdm_fa_mask);
 	env->ifs_clm_his[0] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_HIS, B_IFS_T1_HIS_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr,
+				      ccx->ifs_t1_his_mask);
 	env->ifs_clm_his[1] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_HIS, B_IFS_T2_HIS_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr,
+				      ccx->ifs_t2_his_mask);
 	env->ifs_clm_his[2] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_HIS, B_IFS_T3_HIS_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr,
+				      ccx->ifs_t3_his_mask);
 	env->ifs_clm_his[3] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_HIS, B_IFS_T4_HIS_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr,
+				      ccx->ifs_t4_his_mask);
 	env->ifs_clm_avg[0] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_AVG_L, B_IFS_T1_AVG_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr,
+				      ccx->ifs_t1_avg_mask);
 	env->ifs_clm_avg[1] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_AVG_L, B_IFS_T2_AVG_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr,
+				      ccx->ifs_t2_avg_mask);
 	env->ifs_clm_avg[2] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_AVG_H, B_IFS_T3_AVG_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr,
+				      ccx->ifs_t3_avg_mask);
 	env->ifs_clm_avg[3] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_AVG_H, B_IFS_T4_AVG_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr,
+				      ccx->ifs_t4_avg_mask);
 	env->ifs_clm_cca[0] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CCA_L, B_IFS_T1_CCA_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr,
+				      ccx->ifs_t1_cca_mask);
 	env->ifs_clm_cca[1] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CCA_L, B_IFS_T2_CCA_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr,
+				      ccx->ifs_t2_cca_mask);
 	env->ifs_clm_cca[2] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CCA_H, B_IFS_T3_CCA_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr,
+				      ccx->ifs_t3_cca_mask);
 	env->ifs_clm_cca[3] =
-		rtw89_phy_read32_mask(rtwdev, R_IFS_CCA_H, B_IFS_T4_CCA_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr,
+				      ccx->ifs_t4_cca_mask);
 	env->ifs_clm_total_ifs =
-		rtw89_phy_read32_mask(rtwdev, R_IFSCNT, B_IFSCNT_TOTAL_CNT_MSK);
+		rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr,
+				      ccx->ifs_total_mask);
 	rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "IFS-CLM total_ifs = %d\n",
 		    env->ifs_clm_total_ifs);
 static int rtw89_phy_ifs_clm_set(struct rtw89_dev *rtwdev,
 				 struct rtw89_ccx_para_info *para)
 {
+	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
 	struct rtw89_env_monitor_info *env = &rtwdev->env_monitor;
+	const struct rtw89_ccx_regs *ccx = phy->ccx;
 	u32 period = 0;
 	u32 unit_idx = 0;
 	if (para->mntr_time != env->ifs_clm_mntr_time) {
 		rtw89_phy_ccx_ms_to_period_unit(rtwdev, para->mntr_time,
 						&period, &unit_idx);
-		rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER,
+		rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr,
-				       B_IFS_CLM_PERIOD_MSK, period);
+				       ccx->ifs_clm_period_mask, period);
-		rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER,
+		rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr,
-				       B_IFS_CLM_COUNTER_UNIT_MSK, unit_idx);
+				       ccx->ifs_clm_cnt_unit_mask,
+				       unit_idx);
 		rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK,
 			    "Update IFS-CLM time ((%d)) -> ((%d))\n",
 					    bool enable,
 					    enum rtw89_phy_idx phy_idx)
 {
+	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
+	const struct rtw89_physts_regs *physts = phy->physts;
 	if (enable) {
-		rtw89_phy_write32_clr(rtwdev, R_PLCP_HISTOGRAM,
+		rtw89_phy_write32_clr(rtwdev, physts->setting_addr,
-				      B_STS_DIS_TRIG_BY_FAIL);
+				      physts->dis_trigger_fail_mask);
-		rtw89_phy_write32_clr(rtwdev, R_PLCP_HISTOGRAM,
+		rtw89_phy_write32_clr(rtwdev, physts->setting_addr,
-				      B_STS_DIS_TRIG_BY_BRK);
+				      physts->dis_trigger_brk_mask);
 	} else {
-		rtw89_phy_write32_set(rtwdev, R_PLCP_HISTOGRAM,
+		rtw89_phy_write32_set(rtwdev, physts->setting_addr,
-				      B_STS_DIS_TRIG_BY_FAIL);
+				      physts->dis_trigger_fail_mask);
-		rtw89_phy_write32_set(rtwdev, R_PLCP_HISTOGRAM,
+		rtw89_phy_write32_set(rtwdev, physts->setting_addr,
-				      B_STS_DIS_TRIG_BY_BRK);
+				      physts->dis_trigger_brk_mask);
 	}
 }
 		    "igi=%d, cck_ccaTH=%d, backoff=%d, cck_PD_low=((%d))dB\n",
 		    final_rssi, cck_cca_th, under_region, pd_val);
-	rtw89_phy_write32_mask(rtwdev, R_BMODE_PDTH_EN_V1,
+	rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_reg,
-			       B_BMODE_PDTH_LIMIT_EN_MSK_V1, enable);
+			       dig_regs->bmode_cca_rssi_limit_en, enable);
-	rtw89_phy_write32_mask(rtwdev, R_BMODE_PDTH_V1,
+	rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_lower_bound_reg,
-			       B_BMODE_PDTH_LOWER_BOUND_MSK_V1, pd_val);
+			       dig_regs->bmode_rssi_nocca_low_th_mask, pd_val);
 }
 void rtw89_phy_dig_reset(struct rtw89_dev *rtwdev)
 		regs = rtw89_tssi_fastmode_regs_level;
 	for (i = 0; i < RTW89_TSSI_FAST_MODE_NUM; i++) {
-		reg = rtw89_mac_reg_by_idx(regs[i].addr, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, regs[i].addr, mac_idx);
 		rtw89_write32_mask(rtwdev, reg, regs[i].mask, val);
 	}
 }
 	data = chip->tssi_dbw_table->data[bandedge_cfg];
 	for (i = 0; i < RTW89_TSSI_SBW_NUM; i++) {
-		reg = rtw89_mac_reg_by_idx(regs[i].addr, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, regs[i].addr, mac_idx);
 		rtw89_write32_mask(rtwdev, reg, regs[i].mask, data[i]);
 	}
-	reg = rtw89_mac_reg_by_idx(R_AX_BANDEDGE_CFG, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BANDEDGE_CFG, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_BANDEDGE_CFG_IDX_MASK, bandedge_cfg);
 	rtw89_phy_tssi_ctrl_set_fast_mode_cfg(rtwdev, mac_idx, bandedge_cfg,
 		rtw89_phy_write32(rtwdev, reg, hal->edcca_bak);
 	}
 }
+static const struct rtw89_ccx_regs rtw89_ccx_regs_ax = {
+	.setting_addr = R_CCX,
+	.edcca_opt_mask = B_CCX_EDCCA_OPT_MSK,
+	.measurement_trig_mask = B_MEASUREMENT_TRIG_MSK,
+	.trig_opt_mask = B_CCX_TRIG_OPT_MSK,
+	.en_mask = B_CCX_EN_MSK,
+	.ifs_cnt_addr = R_IFS_COUNTER,
+	.ifs_clm_period_mask = B_IFS_CLM_PERIOD_MSK,
+	.ifs_clm_cnt_unit_mask = B_IFS_CLM_COUNTER_UNIT_MSK,
+	.ifs_clm_cnt_clear_mask = B_IFS_COUNTER_CLR_MSK,
+	.ifs_collect_en_mask = B_IFS_COLLECT_EN,
+	.ifs_t1_addr = R_IFS_T1,
+	.ifs_t1_th_h_mask = B_IFS_T1_TH_HIGH_MSK,
+	.ifs_t1_en_mask = B_IFS_T1_EN_MSK,
+	.ifs_t1_th_l_mask = B_IFS_T1_TH_LOW_MSK,
+	.ifs_t2_addr = R_IFS_T2,
+	.ifs_t2_th_h_mask = B_IFS_T2_TH_HIGH_MSK,
+	.ifs_t2_en_mask = B_IFS_T2_EN_MSK,
+	.ifs_t2_th_l_mask = B_IFS_T2_TH_LOW_MSK,
+	.ifs_t3_addr = R_IFS_T3,
+	.ifs_t3_th_h_mask = B_IFS_T3_TH_HIGH_MSK,
+	.ifs_t3_en_mask = B_IFS_T3_EN_MSK,
+	.ifs_t3_th_l_mask = B_IFS_T3_TH_LOW_MSK,
+	.ifs_t4_addr = R_IFS_T4,
+	.ifs_t4_th_h_mask = B_IFS_T4_TH_HIGH_MSK,
+	.ifs_t4_en_mask = B_IFS_T4_EN_MSK,
+	.ifs_t4_th_l_mask = B_IFS_T4_TH_LOW_MSK,
+	.ifs_clm_tx_cnt_addr = R_IFS_CLM_TX_CNT,
+	.ifs_clm_edcca_excl_cca_fa_mask = B_IFS_CLM_EDCCA_EXCLUDE_CCA_FA_MSK,
+	.ifs_clm_tx_cnt_msk = B_IFS_CLM_TX_CNT_MSK,
+	.ifs_clm_cca_addr = R_IFS_CLM_CCA,
+	.ifs_clm_ofdmcca_excl_fa_mask = B_IFS_CLM_OFDMCCA_EXCLUDE_FA_MSK,
+	.ifs_clm_cckcca_excl_fa_mask = B_IFS_CLM_CCKCCA_EXCLUDE_FA_MSK,
+	.ifs_clm_fa_addr = R_IFS_CLM_FA,
+	.ifs_clm_ofdm_fa_mask = B_IFS_CLM_OFDM_FA_MSK,
+	.ifs_clm_cck_fa_mask = B_IFS_CLM_CCK_FA_MSK,
+	.ifs_his_addr = R_IFS_HIS,
+	.ifs_t4_his_mask = B_IFS_T4_HIS_MSK,
+	.ifs_t3_his_mask = B_IFS_T3_HIS_MSK,
+	.ifs_t2_his_mask = B_IFS_T2_HIS_MSK,
+	.ifs_t1_his_mask = B_IFS_T1_HIS_MSK,
+	.ifs_avg_l_addr = R_IFS_AVG_L,
+	.ifs_t2_avg_mask = B_IFS_T2_AVG_MSK,
+	.ifs_t1_avg_mask = B_IFS_T1_AVG_MSK,
+	.ifs_avg_h_addr = R_IFS_AVG_H,
+	.ifs_t4_avg_mask = B_IFS_T4_AVG_MSK,
+	.ifs_t3_avg_mask = B_IFS_T3_AVG_MSK,
+	.ifs_cca_l_addr = R_IFS_CCA_L,
+	.ifs_t2_cca_mask = B_IFS_T2_CCA_MSK,
+	.ifs_t1_cca_mask = B_IFS_T1_CCA_MSK,
+	.ifs_cca_h_addr = R_IFS_CCA_H,
+	.ifs_t4_cca_mask = B_IFS_T4_CCA_MSK,
+	.ifs_t3_cca_mask = B_IFS_T3_CCA_MSK,
+	.ifs_total_addr = R_IFSCNT,
+	.ifs_cnt_done_mask = B_IFSCNT_DONE_MSK,
+	.ifs_total_mask = B_IFSCNT_TOTAL_CNT_MSK,
+};
+static const struct rtw89_physts_regs rtw89_physts_regs_ax = {
+	.setting_addr = R_PLCP_HISTOGRAM,
+	.dis_trigger_fail_mask = B_STS_DIS_TRIG_BY_FAIL,
+	.dis_trigger_brk_mask = B_STS_DIS_TRIG_BY_BRK,
+};
+const struct rtw89_phy_gen_def rtw89_phy_gen_ax = {
+	.cr_base = 0x10000,
+	.ccx = &rtw89_ccx_regs_ax,
+	.physts = &rtw89_physts_regs_ax,
+};
+EXPORT_SYMBOL(rtw89_phy_gen_ax);

drivers/net/wireless/realtek/rtw89/phy.h+103−11

@@ -7,7 +7,6 @@ · 6 unmodified lines
7		7
8	#include "core.h"	8	#include "core.h"
9		9
10	#define RTW89_PHY_ADDR_OFFSET 0x10000
11	#define RTW89_RF_ADDR_ADSEL_MASK BIT(16)	10	#define RTW89_RF_ADDR_ADSEL_MASK BIT(16)
12		11
13	#define get_phy_headline(addr) FIELD_GET(GENMASK(31, 28), addr)	12	#define get_phy_headline(addr) FIELD_GET(GENMASK(31, 28), addr)
@@ -337,61 +336,154 @@ struct rtw89_nbi_reg_def { · 323 unmodified lines
337	struct rtw89_reg_def notch2_en;	336	struct rtw89_reg_def notch2_en;
338	};	337	};
339		338
		339	struct rtw89_ccx_regs {
		340	u32 setting_addr;
		341	u32 edcca_opt_mask;
		342	u32 measurement_trig_mask;
		343	u32 trig_opt_mask;
		344	u32 en_mask;
		345	u32 ifs_cnt_addr;
		346	u32 ifs_clm_period_mask;
		347	u32 ifs_clm_cnt_unit_mask;
		348	u32 ifs_clm_cnt_clear_mask;
		349	u32 ifs_collect_en_mask;
		350	u32 ifs_t1_addr;
		351	u32 ifs_t1_th_h_mask;
		352	u32 ifs_t1_en_mask;
		353	u32 ifs_t1_th_l_mask;
		354	u32 ifs_t2_addr;
		355	u32 ifs_t2_th_h_mask;
		356	u32 ifs_t2_en_mask;
		357	u32 ifs_t2_th_l_mask;
		358	u32 ifs_t3_addr;
		359	u32 ifs_t3_th_h_mask;
		360	u32 ifs_t3_en_mask;
		361	u32 ifs_t3_th_l_mask;
		362	u32 ifs_t4_addr;
		363	u32 ifs_t4_th_h_mask;
		364	u32 ifs_t4_en_mask;
		365	u32 ifs_t4_th_l_mask;
		366	u32 ifs_clm_tx_cnt_addr;
		367	u32 ifs_clm_edcca_excl_cca_fa_mask;
		368	u32 ifs_clm_tx_cnt_msk;
		369	u32 ifs_clm_cca_addr;
		370	u32 ifs_clm_ofdmcca_excl_fa_mask;
		371	u32 ifs_clm_cckcca_excl_fa_mask;
		372	u32 ifs_clm_fa_addr;
		373	u32 ifs_clm_ofdm_fa_mask;
		374	u32 ifs_clm_cck_fa_mask;
		375	u32 ifs_his_addr;
		376	u32 ifs_t4_his_mask;
		377	u32 ifs_t3_his_mask;
		378	u32 ifs_t2_his_mask;
		379	u32 ifs_t1_his_mask;
		380	u32 ifs_avg_l_addr;
		381	u32 ifs_t2_avg_mask;
		382	u32 ifs_t1_avg_mask;
		383	u32 ifs_avg_h_addr;
		384	u32 ifs_t4_avg_mask;
		385	u32 ifs_t3_avg_mask;
		386	u32 ifs_cca_l_addr;
		387	u32 ifs_t2_cca_mask;
		388	u32 ifs_t1_cca_mask;
		389	u32 ifs_cca_h_addr;
		390	u32 ifs_t4_cca_mask;
		391	u32 ifs_t3_cca_mask;
		392	u32 ifs_total_addr;
		393	u32 ifs_cnt_done_mask;
		394	u32 ifs_total_mask;
		395	};
		396
		397	struct rtw89_physts_regs {
		398	u32 setting_addr;
		399	u32 dis_trigger_fail_mask;
		400	u32 dis_trigger_brk_mask;
		401	};
		402
		403	struct rtw89_phy_gen_def {
		404	u32 cr_base;
		405	const struct rtw89_ccx_regs *ccx;
		406	const struct rtw89_physts_regs *physts;
		407	};
		408
		409	extern const struct rtw89_phy_gen_def rtw89_phy_gen_ax;
		410	extern const struct rtw89_phy_gen_def rtw89_phy_gen_be;
		411
340	static inline void rtw89_phy_write8(struct rtw89_dev *rtwdev,	412	static inline void rtw89_phy_write8(struct rtw89_dev *rtwdev,
341	u32 addr, u8 data)	413	u32 addr, u8 data)
342	{	414	{
343	rtw89_write8(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET, data);	415	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		416
		417	rtw89_write8(rtwdev, addr + phy->cr_base, data);
344	}	418	}
345		419
346	static inline void rtw89_phy_write16(struct rtw89_dev *rtwdev,	420	static inline void rtw89_phy_write16(struct rtw89_dev *rtwdev,
347	u32 addr, u16 data)	421	u32 addr, u16 data)
348	{	422	{
349	rtw89_write16(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET, data);	423	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		424
		425	rtw89_write16(rtwdev, addr + phy->cr_base, data);
350	}	426	}
351		427
352	static inline void rtw89_phy_write32(struct rtw89_dev *rtwdev,	428	static inline void rtw89_phy_write32(struct rtw89_dev *rtwdev,
353	u32 addr, u32 data)	429	u32 addr, u32 data)
354	{	430	{
355	rtw89_write32(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET, data);	431	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		432
		433	rtw89_write32(rtwdev, addr + phy->cr_base, data);
356	}	434	}
357		435
358	static inline void rtw89_phy_write32_set(struct rtw89_dev *rtwdev,	436	static inline void rtw89_phy_write32_set(struct rtw89_dev *rtwdev,
359	u32 addr, u32 bits)	437	u32 addr, u32 bits)
360	{	438	{
361	rtw89_write32_set(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET, bits);	439	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		440
		441	rtw89_write32_set(rtwdev, addr + phy->cr_base, bits);
362	}	442	}
363		443
364	static inline void rtw89_phy_write32_clr(struct rtw89_dev *rtwdev,	444	static inline void rtw89_phy_write32_clr(struct rtw89_dev *rtwdev,
365	u32 addr, u32 bits)	445	u32 addr, u32 bits)
366	{	446	{
367	rtw89_write32_clr(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET, bits);	447	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		448
		449	rtw89_write32_clr(rtwdev, addr + phy->cr_base, bits);
368	}	450	}
369		451
370	static inline void rtw89_phy_write32_mask(struct rtw89_dev *rtwdev,	452	static inline void rtw89_phy_write32_mask(struct rtw89_dev *rtwdev,
371	u32 addr, u32 mask, u32 data)	453	u32 addr, u32 mask, u32 data)
372	{	454	{
373	rtw89_write32_mask(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET, mask, data);	455	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		456
		457	rtw89_write32_mask(rtwdev, addr + phy->cr_base, mask, data);
374	}	458	}
375		459
376	static inline u8 rtw89_phy_read8(struct rtw89_dev *rtwdev, u32 addr)	460	static inline u8 rtw89_phy_read8(struct rtw89_dev *rtwdev, u32 addr)
377	{	461	{
378	return rtw89_read8(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET);	462	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		463
		464	return rtw89_read8(rtwdev, addr + phy->cr_base);
379	}	465	}
380		466
381	static inline u16 rtw89_phy_read16(struct rtw89_dev *rtwdev, u32 addr)	467	static inline u16 rtw89_phy_read16(struct rtw89_dev *rtwdev, u32 addr)
382	{	468	{
383	return rtw89_read16(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET);	469	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		470
		471	return rtw89_read16(rtwdev, addr + phy->cr_base);
384	}	472	}
385		473
386	static inline u32 rtw89_phy_read32(struct rtw89_dev *rtwdev, u32 addr)	474	static inline u32 rtw89_phy_read32(struct rtw89_dev *rtwdev, u32 addr)
387	{	475	{
388	return rtw89_read32(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET);	476	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		477
		478	return rtw89_read32(rtwdev, addr + phy->cr_base);
389	}	479	}
390		480
391	static inline u32 rtw89_phy_read32_mask(struct rtw89_dev *rtwdev,	481	static inline u32 rtw89_phy_read32_mask(struct rtw89_dev *rtwdev,
392	u32 addr, u32 mask)	482	u32 addr, u32 mask)
393	{	483	{
394	return rtw89_read32_mask(rtwdev, addr \| RTW89_PHY_ADDR_OFFSET, mask);	484	const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
		485
		486	return rtw89_read32_mask(rtwdev, addr + phy->cr_base, mask);
395	}	487	}
396		488
397	static inline	489	static inline

drivers/net/wireless/realtek/rtw89/phy_be.c+77−0

@@ -0,0 +1,77 @@
	1	// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
	2	/* Copyright(c) 2023 Realtek Corporation
	3	*/
	4
	5	#include "phy.h"
	6	#include "reg.h"
	7
	8	static const struct rtw89_ccx_regs rtw89_ccx_regs_be = {
	9	.setting_addr = R_CCX,
	10	.edcca_opt_mask = B_CCX_EDCCA_OPT_MSK_V1,
	11	.measurement_trig_mask = B_MEASUREMENT_TRIG_MSK,
	12	.trig_opt_mask = B_CCX_TRIG_OPT_MSK,
	13	.en_mask = B_CCX_EN_MSK,
	14	.ifs_cnt_addr = R_IFS_COUNTER,
	15	.ifs_clm_period_mask = B_IFS_CLM_PERIOD_MSK,
	16	.ifs_clm_cnt_unit_mask = B_IFS_CLM_COUNTER_UNIT_MSK,
	17	.ifs_clm_cnt_clear_mask = B_IFS_COUNTER_CLR_MSK,
	18	.ifs_collect_en_mask = B_IFS_COLLECT_EN,
	19	.ifs_t1_addr = R_IFS_T1,
	20	.ifs_t1_th_h_mask = B_IFS_T1_TH_HIGH_MSK,
	21	.ifs_t1_en_mask = B_IFS_T1_EN_MSK,
	22	.ifs_t1_th_l_mask = B_IFS_T1_TH_LOW_MSK,
	23	.ifs_t2_addr = R_IFS_T2,
	24	.ifs_t2_th_h_mask = B_IFS_T2_TH_HIGH_MSK,
	25	.ifs_t2_en_mask = B_IFS_T2_EN_MSK,
	26	.ifs_t2_th_l_mask = B_IFS_T2_TH_LOW_MSK,
	27	.ifs_t3_addr = R_IFS_T3,
	28	.ifs_t3_th_h_mask = B_IFS_T3_TH_HIGH_MSK,
	29	.ifs_t3_en_mask = B_IFS_T3_EN_MSK,
	30	.ifs_t3_th_l_mask = B_IFS_T3_TH_LOW_MSK,
	31	.ifs_t4_addr = R_IFS_T4,
	32	.ifs_t4_th_h_mask = B_IFS_T4_TH_HIGH_MSK,
	33	.ifs_t4_en_mask = B_IFS_T4_EN_MSK,
	34	.ifs_t4_th_l_mask = B_IFS_T4_TH_LOW_MSK,
	35	.ifs_clm_tx_cnt_addr = R_IFS_CLM_TX_CNT_V1,
	36	.ifs_clm_edcca_excl_cca_fa_mask = B_IFS_CLM_EDCCA_EXCLUDE_CCA_FA_MSK,
	37	.ifs_clm_tx_cnt_msk = B_IFS_CLM_TX_CNT_MSK,
	38	.ifs_clm_cca_addr = R_IFS_CLM_CCA_V1,
	39	.ifs_clm_ofdmcca_excl_fa_mask = B_IFS_CLM_OFDMCCA_EXCLUDE_FA_MSK,
	40	.ifs_clm_cckcca_excl_fa_mask = B_IFS_CLM_CCKCCA_EXCLUDE_FA_MSK,
	41	.ifs_clm_fa_addr = R_IFS_CLM_FA_V1,
	42	.ifs_clm_ofdm_fa_mask = B_IFS_CLM_OFDM_FA_MSK,
	43	.ifs_clm_cck_fa_mask = B_IFS_CLM_CCK_FA_MSK,
	44	.ifs_his_addr = R_IFS_HIS_V1,
	45	.ifs_t4_his_mask = B_IFS_T4_HIS_MSK,
	46	.ifs_t3_his_mask = B_IFS_T3_HIS_MSK,
	47	.ifs_t2_his_mask = B_IFS_T2_HIS_MSK,
	48	.ifs_t1_his_mask = B_IFS_T1_HIS_MSK,
	49	.ifs_avg_l_addr = R_IFS_AVG_L_V1,
	50	.ifs_t2_avg_mask = B_IFS_T2_AVG_MSK,
	51	.ifs_t1_avg_mask = B_IFS_T1_AVG_MSK,
	52	.ifs_avg_h_addr = R_IFS_AVG_H_V1,
	53	.ifs_t4_avg_mask = B_IFS_T4_AVG_MSK,
	54	.ifs_t3_avg_mask = B_IFS_T3_AVG_MSK,
	55	.ifs_cca_l_addr = R_IFS_CCA_L_V1,
	56	.ifs_t2_cca_mask = B_IFS_T2_CCA_MSK,
	57	.ifs_t1_cca_mask = B_IFS_T1_CCA_MSK,
	58	.ifs_cca_h_addr = R_IFS_CCA_H_V1,
	59	.ifs_t4_cca_mask = B_IFS_T4_CCA_MSK,
	60	.ifs_t3_cca_mask = B_IFS_T3_CCA_MSK,
	61	.ifs_total_addr = R_IFSCNT_V1,
	62	.ifs_cnt_done_mask = B_IFSCNT_DONE_MSK,
	63	.ifs_total_mask = B_IFSCNT_TOTAL_CNT_MSK,
	64	};
	65
	66	static const struct rtw89_physts_regs rtw89_physts_regs_be = {
	67	.setting_addr = R_PLCP_HISTOGRAM,
	68	.dis_trigger_fail_mask = B_STS_DIS_TRIG_BY_FAIL,
	69	.dis_trigger_brk_mask = B_STS_DIS_TRIG_BY_BRK,
	70	};
	71
	72	const struct rtw89_phy_gen_def rtw89_phy_gen_be = {
	73	.cr_base = 0x20000,
	74	.ccx = &rtw89_ccx_regs_be,
	75	.physts = &rtw89_physts_regs_be,
	76	};
	77	EXPORT_SYMBOL(rtw89_phy_gen_be);

drivers/net/wireless/realtek/rtw89/ps.c+72−3

@@ -2,6 +2,7 @@ · 1 unmodified line
2	/* Copyright(c) 2019-2020 Realtek Corporation	2	/* Copyright(c) 2019-2020 Realtek Corporation
3	*/	3	*/
4		4
		5	#include "chan.h"
5	#include "coex.h"	6	#include "coex.h"
6	#include "core.h"	7	#include "core.h"
7	#include "debug.h"	8	#include "debug.h"
@@ -257,8 +258,13 @@ void rtw89_recalc_lps(struct rtw89_dev *rtwdev) · 249 unmodified lines
257	{	258	{
258	struct ieee80211_vif vif, found_vif = NULL;	259	struct ieee80211_vif vif, found_vif = NULL;
259	struct rtw89_vif *rtwvif;	260	struct rtw89_vif *rtwvif;
		261	enum rtw89_entity_mode mode;
260	int count = 0;	262	int count = 0;
261		263
		264	mode = rtw89_get_entity_mode(rtwdev);
		265	if (mode == RTW89_ENTITY_MODE_MCC)
		266	goto disable_lps;
		267
262	rtw89_for_each_rtwvif(rtwdev, rtwvif) {	268	rtw89_for_each_rtwvif(rtwdev, rtwvif) {
263	vif = rtwvif_to_vif(rtwvif);	269	vif = rtwvif_to_vif(rtwvif);
264		270
@@ -273,8 +279,71 @@ void rtw89_recalc_lps(struct rtw89_dev *rtwdev) · 8 unmodified lines
273		279
274	if (count == 1 && found_vif->cfg.ps) {	280	if (count == 1 && found_vif->cfg.ps) {
275	rtwdev->lps_enabled = true;	281	rtwdev->lps_enabled = true;
276	} else {	282	return;
277	rtw89_leave_lps(rtwdev);
278	rtwdev->lps_enabled = false;
279	}	283	}
		284
		285	disable_lps:
		286	rtw89_leave_lps(rtwdev);
		287	rtwdev->lps_enabled = false;
		288	}
		289
		290	void rtw89_p2p_noa_renew(struct rtw89_vif *rtwvif)
		291	{
		292	struct rtw89_p2p_noa_setter *setter = &rtwvif->p2p_noa;
		293	struct rtw89_p2p_noa_ie *ie = &setter->ie;
		294	struct rtw89_p2p_ie_head *p2p_head = &ie->p2p_head;
		295	struct rtw89_noa_attr_head *noa_head = &ie->noa_head;
		296
		297	if (setter->noa_count) {
		298	setter->noa_index++;
		299	setter->noa_count = 0;
		300	}
		301
		302	memset(ie, 0, sizeof(*ie));
		303
		304	p2p_head->eid = WLAN_EID_VENDOR_SPECIFIC;
		305	p2p_head->ie_len = 4 + sizeof(*noa_head);
		306	p2p_head->oui[0] = (WLAN_OUI_WFA >> 16) & 0xff;
		307	p2p_head->oui[1] = (WLAN_OUI_WFA >> 8) & 0xff;
		308	p2p_head->oui[2] = (WLAN_OUI_WFA >> 0) & 0xff;
		309	p2p_head->oui_type = WLAN_OUI_TYPE_WFA_P2P;
		310
		311	noa_head->attr_type = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
		312	noa_head->attr_len = cpu_to_le16(2);
		313	noa_head->index = setter->noa_index;
		314	noa_head->oppps_ctwindow = 0;
		315	}
		316
		317	void rtw89_p2p_noa_append(struct rtw89_vif *rtwvif,
		318	const struct ieee80211_p2p_noa_desc *desc)
		319	{
		320	struct rtw89_p2p_noa_setter *setter = &rtwvif->p2p_noa;
		321	struct rtw89_p2p_noa_ie *ie = &setter->ie;
		322	struct rtw89_p2p_ie_head *p2p_head = &ie->p2p_head;
		323	struct rtw89_noa_attr_head *noa_head = &ie->noa_head;
		324
		325	if (!desc->count \|\| !desc->duration)
		326	return;
		327
		328	if (setter->noa_count >= RTW89_P2P_MAX_NOA_NUM)
		329	return;
		330
		331	p2p_head->ie_len += sizeof(*desc);
		332	le16_add_cpu(&noa_head->attr_len, sizeof(*desc));
		333
		334	ie->noa_desc[setter->noa_count++] = *desc;
		335	}
		336
		337	u8 rtw89_p2p_noa_fetch(struct rtw89_vif rtwvif, void *data)
		338	{
		339	struct rtw89_p2p_noa_setter *setter = &rtwvif->p2p_noa;
		340	struct rtw89_p2p_noa_ie *ie = &setter->ie;
		341	void *tail;
		342
		343	if (!setter->noa_count)
		344	return 0;
		345
		346	*data = ie;
		347	tail = ie->noa_desc + setter->noa_count;
		348	return tail - *data;
280	}	349	}

drivers/net/wireless/realtek/rtw89/ps.h+4−0

 void rtw89_set_coex_ctrl_lps(struct rtw89_dev *rtwdev, bool btc_ctrl);
 void rtw89_process_p2p_ps(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif);
 void rtw89_recalc_lps(struct rtw89_dev *rtwdev);
+void rtw89_p2p_noa_renew(struct rtw89_vif *rtwvif);
+void rtw89_p2p_noa_append(struct rtw89_vif *rtwvif,
+			  const struct ieee80211_p2p_noa_desc *desc);
+u8 rtw89_p2p_noa_fetch(struct rtw89_vif *rtwvif, void **data);
 static inline void rtw89_leave_ips_by_hwflags(struct rtw89_dev *rtwdev)
 {

drivers/net/wireless/realtek/rtw89/reg.h+38−0

 #define B_AX_GNT_BT_TX_SW_VAL BIT(1)
 #define B_AX_GNT_BT_TX_SW_CTRL BIT(0)
+#define R_BE_FILTER_MODEL_ADDR 0x0C04
+#define R_BE_RX_FLTR_OPT 0x11420
+#define R_BE_RX_FLTR_OPT_C1 0x15420
+#define B_BE_UID_FILTER_MASK GENMASK(31, 24)
+#define B_BE_UNSPT_TYPE BIT(22)
+#define B_BE_RX_MPDU_MAX_LEN_MASK GENMASK(21, 16)
+#define B_BE_A_FTM_REQ BIT(14)
+#define B_BE_A_ERR_PKT BIT(13)
+#define B_BE_A_UNSUP_PKT BIT(12)
+#define B_BE_A_CRC32_ERR BIT(11)
+#define B_BE_A_BCN_CHK_RULE_MASK GENMASK(9, 8)
+#define B_BE_A_BCN_CHK_EN BIT(7)
+#define B_BE_A_MC_LIST_CAM_MATCH BIT(6)
+#define B_BE_A_BC_CAM_MATCH BIT(5)
+#define B_BE_A_UC_CAM_MATCH BIT(4)
+#define B_BE_A_MC BIT(3)
+#define B_BE_A_BC BIT(2)
+#define B_BE_A_A1_MATCH BIT(1)
+#define B_BE_SNIFFER_MODE BIT(0)
 #define RR_MOD 0x00
 #define RR_MOD_V1 0x10000
 #define RR_MOD_IQK GENMASK(19, 4)
 #define B_DBCC_80P80_SEL_EVM_RPT_EN BIT(0)
 #define R_CCX 0x0C00
 #define B_CCX_EDCCA_OPT_MSK GENMASK(6, 4)
+#define B_CCX_EDCCA_OPT_MSK_V1 GENMASK(7, 4)
 #define B_MEASUREMENT_TRIG_MSK BIT(2)
 #define B_CCX_TRIG_OPT_MSK BIT(1)
 #define B_CCX_EN_MSK BIT(0)
 #define B_SWSI_R_DATA_DONE_V1 BIT(26)
 #define R_TX_COUNTER 0x1A40
 #define R_IFS_CLM_TX_CNT 0x1ACC
+#define R_IFS_CLM_TX_CNT_V1 0x0ECC
 #define B_IFS_CLM_EDCCA_EXCLUDE_CCA_FA_MSK GENMASK(31, 16)
 #define B_IFS_CLM_TX_CNT_MSK GENMASK(15, 0)
 #define R_IFS_CLM_CCA 0x1AD0
+#define R_IFS_CLM_CCA_V1 0x0ED0
 #define B_IFS_CLM_OFDMCCA_EXCLUDE_FA_MSK GENMASK(31, 16)
 #define B_IFS_CLM_CCKCCA_EXCLUDE_FA_MSK GENMASK(15, 0)
 #define R_IFS_CLM_FA 0x1AD4
+#define R_IFS_CLM_FA_V1 0x0ED4
 #define B_IFS_CLM_OFDM_FA_MSK GENMASK(31, 16)
 #define B_IFS_CLM_CCK_FA_MSK GENMASK(15, 0)
 #define R_IFS_HIS 0x1AD8
+#define R_IFS_HIS_V1 0x0ED8
 #define B_IFS_T4_HIS_MSK GENMASK(31, 24)
 #define B_IFS_T3_HIS_MSK GENMASK(23, 16)
 #define B_IFS_T2_HIS_MSK GENMASK(15, 8)
 #define B_IFS_T1_HIS_MSK GENMASK(7, 0)
 #define R_IFS_AVG_L 0x1ADC
+#define R_IFS_AVG_L_V1 0x0EDC
 #define B_IFS_T2_AVG_MSK GENMASK(31, 16)
 #define B_IFS_T1_AVG_MSK GENMASK(15, 0)
 #define R_IFS_AVG_H 0x1AE0
+#define R_IFS_AVG_H_V1 0x0EE0
 #define B_IFS_T4_AVG_MSK GENMASK(31, 16)
 #define B_IFS_T3_AVG_MSK GENMASK(15, 0)
 #define R_IFS_CCA_L 0x1AE4
+#define R_IFS_CCA_L_V1 0x0EE4
 #define B_IFS_T2_CCA_MSK GENMASK(31, 16)
 #define B_IFS_T1_CCA_MSK GENMASK(15, 0)
 #define R_IFS_CCA_H 0x1AE8
+#define R_IFS_CCA_H_V1 0x0EE8
 #define B_IFS_T4_CCA_MSK GENMASK(31, 16)
 #define B_IFS_T3_CCA_MSK GENMASK(15, 0)
 #define R_IFSCNT 0x1AEC
+#define R_IFSCNT_V1 0x0EEC
 #define B_IFSCNT_DONE_MSK BIT(16)
 #define B_IFSCNT_TOTAL_CNT_MSK GENMASK(15, 0)
 #define R_TXAGC_TP 0x1C04
 #define B_TXAGC_BB_OFT GENMASK(31, 16)
 #define B_TXAGC_BB GENMASK(31, 24)
 #define B_TXAGC_RF GENMASK(5, 0)
+#define R_PATH0_TXPWR 0x1C78
+#define B_PATH0_TXPWR GENMASK(8, 0)
 #define R_S0_ADDCK 0x1E00
 #define B_S0_ADDCK_I GENMASK(9, 0)
 #define B_S0_ADDCK_Q GENMASK(19, 10)
 #define R_TXAGC_BB_S1 0x3C60
 #define B_TXAGC_BB_S1_OFT GENMASK(31, 16)
 #define B_TXAGC_BB_S1 GENMASK(31, 24)
+#define R_PATH1_TXPWR 0x3C78
+#define B_PATH1_TXPWR GENMASK(8, 0)
 #define R_S1_ADDCK 0x3E00
 #define B_S1_ADDCK_I GENMASK(9, 0)
 #define B_S1_ADDCK_Q GENMASK(19, 10)
 #define B_PKT_POP_EN BIT(8)
 #define R_SEG0R_PD 0x481C
 #define R_SEG0R_PD_V1 0x4860
+#define R_SEG0R_PD_V2 0x6A74
 #define R_SEG0R_EDCCA_LVL 0x4840
 #define R_SEG0R_EDCCA_LVL_V1 0x4884
 #define B_SEG0R_PPDU_LVL_MSK GENMASK(31, 24)
 #define R_DCFO_COMP_S0_V1 0x4A40
 #define B_DCFO_COMP_S0_V1_MSK GENMASK(13, 0)
 #define R_BMODE_PDTH_V1 0x4B64
+#define R_BMODE_PDTH_V2 0x6708
 #define B_BMODE_PDTH_LOWER_BOUND_MSK_V1 GENMASK(31, 24)
 #define R_BMODE_PDTH_EN_V1 0x4B74
+#define R_BMODE_PDTH_EN_V2 0x6718
 #define B_BMODE_PDTH_LIMIT_EN_MSK_V1 BIT(30)
 #define R_CFO_COMP_SEG1_L 0x5384
 #define R_CFO_COMP_SEG1_H 0x5388

drivers/net/wireless/realtek/rtw89/regd.c+14−13

 	}
 static const struct rtw89_regd rtw89_ww_regd =
-	COUNTRY_REGD("00", RTW89_WW, RTW89_WW);
+	COUNTRY_REGD("00", RTW89_WW, RTW89_WW, RTW89_WW);
 static const struct rtw89_regd rtw89_regd_map[] = {
-	COUNTRY_REGD("AR", RTW89_MEXICO, RTW89_MEXICO, RTW89_NA),
+	COUNTRY_REGD("AR", RTW89_MEXICO, RTW89_MEXICO, RTW89_FCC),
 	COUNTRY_REGD("BO", RTW89_FCC, RTW89_FCC, RTW89_FCC),
 	COUNTRY_REGD("BR", RTW89_FCC, RTW89_FCC, RTW89_FCC),
 	COUNTRY_REGD("CL", RTW89_CHILE, RTW89_CHILE, RTW89_CHILE),
 	COUNTRY_REGD("SV", RTW89_FCC, RTW89_FCC, RTW89_FCC),
 	COUNTRY_REGD("GT", RTW89_FCC, RTW89_FCC, RTW89_FCC),
 	COUNTRY_REGD("HN", RTW89_FCC, RTW89_FCC, RTW89_FCC),
-	COUNTRY_REGD("MX", RTW89_MEXICO, RTW89_MEXICO, RTW89_NA),
+	COUNTRY_REGD("MX", RTW89_MEXICO, RTW89_MEXICO, RTW89_FCC),
 	COUNTRY_REGD("NI", RTW89_FCC, RTW89_FCC, RTW89_NA),
 	COUNTRY_REGD("PA", RTW89_FCC, RTW89_FCC, RTW89_NA),
 	COUNTRY_REGD("PY", RTW89_FCC, RTW89_FCC, RTW89_NA),
 	COUNTRY_REGD("KE", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("KW", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("KG", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
-	COUNTRY_REGD("LB", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
+	COUNTRY_REGD("LB", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("LS", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("MK", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("MA", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("SN", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("RS", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("ME", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
-	COUNTRY_REGD("ZA", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
+	COUNTRY_REGD("ZA", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("TR", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("UA", RTW89_UKRAINE, RTW89_UKRAINE, RTW89_UKRAINE),
 	COUNTRY_REGD("AE", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("SG", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("LK", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("TW", RTW89_FCC, RTW89_FCC, RTW89_NA),
-	COUNTRY_REGD("TH", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
+	COUNTRY_REGD("TH", RTW89_WW, RTW89_WW, RTW89_WW),
 	COUNTRY_REGD("VN", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("AU", RTW89_ACMA, RTW89_ACMA, RTW89_ACMA),
 	COUNTRY_REGD("NZ", RTW89_ACMA, RTW89_ACMA, RTW89_ACMA),
 	COUNTRY_REGD("IO", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("VG", RTW89_FCC, RTW89_FCC, RTW89_FCC),
 	COUNTRY_REGD("BN", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
-	COUNTRY_REGD("BF", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
+	COUNTRY_REGD("BF", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("MM", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("BI", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("CM", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("CK", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("CI", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("DJ", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
-	COUNTRY_REGD("DM", RTW89_FCC, RTW89_FCC, RTW89_FCC),
+	COUNTRY_REGD("DM", RTW89_FCC, RTW89_FCC, RTW89_NA),
 	COUNTRY_REGD("GQ", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("ER", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("ET", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("GE", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("GI", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("GL", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
-	COUNTRY_REGD("GD", RTW89_FCC, RTW89_FCC, RTW89_FCC),
+	COUNTRY_REGD("GD", RTW89_FCC, RTW89_FCC, RTW89_NA),
 	COUNTRY_REGD("GP", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("GU", RTW89_FCC, RTW89_FCC, RTW89_NA),
 	COUNTRY_REGD("GG", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("GN", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("GW", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
-	COUNTRY_REGD("GY", RTW89_FCC, RTW89_FCC, RTW89_FCC),
+	COUNTRY_REGD("GY", RTW89_FCC, RTW89_FCC, RTW89_NA),
-	COUNTRY_REGD("HT", RTW89_FCC, RTW89_FCC, RTW89_NA),
+	COUNTRY_REGD("HT", RTW89_FCC, RTW89_FCC, RTW89_FCC),
 	COUNTRY_REGD("HM", RTW89_ACMA, RTW89_ACMA, RTW89_NA),
 	COUNTRY_REGD("VA", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("IM", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("JE", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("KI", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
-	COUNTRY_REGD("LA", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
+	COUNTRY_REGD("XK", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
+	COUNTRY_REGD("LA", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("LR", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("LY", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("MO", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("YT", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("FM", RTW89_FCC, RTW89_FCC, RTW89_NA),
 	COUNTRY_REGD("MD", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
-	COUNTRY_REGD("MN", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
+	COUNTRY_REGD("MN", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI),
 	COUNTRY_REGD("MS", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("NR", RTW89_ETSI, RTW89_ETSI, RTW89_NA),
 	COUNTRY_REGD("NP", RTW89_ETSI, RTW89_ETSI, RTW89_NA),

drivers/net/wireless/realtek/rtw89/rtw8851b.c+12−6

 	.seg0_pd_reg = R_SEG0R_PD_V1,
 	.pd_lower_bound_mask = B_SEG0R_PD_LOWER_BOUND_MSK,
 	.pd_spatial_reuse_en = B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1,
+	.bmode_pd_reg = R_BMODE_PDTH_EN_V1,
+	.bmode_cca_rssi_limit_en = B_BMODE_PDTH_LIMIT_EN_MSK_V1,
+	.bmode_pd_lower_bound_reg = R_BMODE_PDTH_V1,
+	.bmode_rssi_nocca_low_th_mask = B_BMODE_PDTH_LOWER_BOUND_MSK_V1,
 	.p0_lna_init = {R_PATH0_LNA_INIT_V1, B_PATH0_LNA_INIT_IDX_MSK},
 	.p1_lna_init = {R_PATH1_LNA_INIT_V1, B_PATH1_LNA_INIT_IDX_MSK},
 	.p0_tia_init = {R_PATH0_TIA_INIT_V1, B_PATH0_TIA_INIT_IDX_MSK_V1},
 				     const struct rtw89_chan *chan,
 				     u8 mac_idx)
 {
-	u32 sub_carr = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
+	u32 sub_carr = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
-	u32 chk_rate = rtw89_mac_reg_by_idx(R_AX_TXRATE_CHK, mac_idx);
+	u32 chk_rate = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXRATE_CHK, mac_idx);
-	u32 rf_mod = rtw89_mac_reg_by_idx(R_AX_WMAC_RFMOD, mac_idx);
+	u32 rf_mod = rtw89_mac_reg_by_idx(rtwdev, R_AX_WMAC_RFMOD, mac_idx);
 	u8 txsc20 = 0, txsc40 = 0;
 	switch (chan->band_width) {
 		return;
 	}
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_CTRL, mac_idx);
 	rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN);
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst);
 	pw_ofst = max_t(s8, pw_ofst - 3, -16);
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, pw_ofst);
 }
 	.chip_id		= RTL8851B,
 	.chip_gen		= RTW89_CHIP_AX,
 	.ops			= &rtw8851b_chip_ops,
+	.mac_def		= &rtw89_mac_gen_ax,
+	.phy_def		= &rtw89_phy_gen_ax,
 	.fw_basename		= RTW8851B_FW_BASENAME,
 	.fw_format_max		= RTW8851B_FW_FORMAT_MAX,
 	.try_ce_fw		= true,

drivers/net/wireless/realtek/rtw89/rtw8852a.c+12−7

 	.seg0_pd_reg = R_SEG0R_PD,
 	.pd_lower_bound_mask = B_SEG0R_PD_LOWER_BOUND_MSK,
 	.pd_spatial_reuse_en = B_SEG0R_PD_SPATIAL_REUSE_EN_MSK,
+	.bmode_pd_reg = R_BMODE_PDTH_EN_V1,
+	.bmode_cca_rssi_limit_en = B_BMODE_PDTH_LIMIT_EN_MSK_V1,
+	.bmode_pd_lower_bound_reg = R_BMODE_PDTH_V1,
+	.bmode_rssi_nocca_low_th_mask = B_BMODE_PDTH_LOWER_BOUND_MSK_V1,
 	.p0_lna_init = {R_PATH0_LNA_INIT, B_PATH0_LNA_INIT_IDX_MSK},
 	.p1_lna_init = {R_PATH1_LNA_INIT, B_PATH1_LNA_INIT_IDX_MSK},
 	.p0_tia_init = {R_PATH0_TIA_INIT, B_PATH0_TIA_INIT_IDX_MSK},
 				     const struct rtw89_chan *chan,
 				     u8 mac_idx)
 {
-	u32 rf_mod = rtw89_mac_reg_by_idx(R_AX_WMAC_RFMOD, mac_idx);
+	u32 rf_mod = rtw89_mac_reg_by_idx(rtwdev, R_AX_WMAC_RFMOD, mac_idx);
-	u32 sub_carr = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE,
+	u32 sub_carr = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
-					     mac_idx);
+	u32 chk_rate = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXRATE_CHK, mac_idx);
-	u32 chk_rate = rtw89_mac_reg_by_idx(R_AX_TXRATE_CHK, mac_idx);
 	u8 txsc20 = 0, txsc40 = 0;
 	switch (chan->band_width) {
 			    pw_ofst);
 		return;
 	}
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_CTRL, mac_idx);
 	rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN);
 	val_1t = pw_ofst;
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, val_1t);
 	val_2t = max(val_1t - 3, -16);
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, val_2t);
 	rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] Set TB pwr_offset=(%d, %d)\n",
 		    val_1t, val_2t);
 	.chip_id		= RTL8852A,
 	.chip_gen		= RTW89_CHIP_AX,
 	.ops			= &rtw8852a_chip_ops,
+	.mac_def		= &rtw89_mac_gen_ax,
+	.phy_def		= &rtw89_phy_gen_ax,
 	.fw_basename		= RTW8852A_FW_BASENAME,
 	.fw_format_max		= RTW8852A_FW_FORMAT_MAX,
 	.try_ce_fw		= false,

drivers/net/wireless/realtek/rtw89/rtw8852b.c+12−6

 	.seg0_pd_reg = R_SEG0R_PD_V1,
 	.pd_lower_bound_mask = B_SEG0R_PD_LOWER_BOUND_MSK,
 	.pd_spatial_reuse_en = B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1,
+	.bmode_pd_reg = R_BMODE_PDTH_EN_V1,
+	.bmode_cca_rssi_limit_en = B_BMODE_PDTH_LIMIT_EN_MSK_V1,
+	.bmode_pd_lower_bound_reg = R_BMODE_PDTH_V1,
+	.bmode_rssi_nocca_low_th_mask = B_BMODE_PDTH_LOWER_BOUND_MSK_V1,
 	.p0_lna_init = {R_PATH0_LNA_INIT_V1, B_PATH0_LNA_INIT_IDX_MSK},
 	.p1_lna_init = {R_PATH1_LNA_INIT_V1, B_PATH1_LNA_INIT_IDX_MSK},
 	.p0_tia_init = {R_PATH0_TIA_INIT_V1, B_PATH0_TIA_INIT_IDX_MSK_V1},
 				     const struct rtw89_chan *chan,
 				     u8 mac_idx)
 {
-	u32 rf_mod = rtw89_mac_reg_by_idx(R_AX_WMAC_RFMOD, mac_idx);
+	u32 rf_mod = rtw89_mac_reg_by_idx(rtwdev, R_AX_WMAC_RFMOD, mac_idx);
-	u32 sub_carr = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
+	u32 sub_carr = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
-	u32 chk_rate = rtw89_mac_reg_by_idx(R_AX_TXRATE_CHK, mac_idx);
+	u32 chk_rate = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXRATE_CHK, mac_idx);
 	u8 txsc20 = 0, txsc40 = 0;
 	switch (chan->band_width) {
 		return;
 	}
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_CTRL, mac_idx);
 	rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN);
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst);
 	pw_ofst = max_t(s8, pw_ofst - 3, -16);
-	reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx);
+	reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, mac_idx);
 	rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, pw_ofst);
 }
 	.chip_id		= RTL8852B,
 	.chip_gen		= RTW89_CHIP_AX,
 	.ops			= &rtw8852b_chip_ops,
+	.mac_def		= &rtw89_mac_gen_ax,
+	.phy_def		= &rtw89_phy_gen_ax,
 	.fw_basename		= RTW8852B_FW_BASENAME,
 	.fw_format_max		= RTW8852B_FW_FORMAT_MAX,
 	.try_ce_fw		= true,

drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c+2−2

@@ -846,7 +846,7 @@ static bool _iqk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, · 845 unmodified lines
846	case ID_NBTXK:	846	case ID_NBTXK:
847	rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0);	847	rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0);
848	rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x011);	848	rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x011);
849	iqk_cmd = 0x308 \| (1 << (4 + path));	849	iqk_cmd = 0x408 \| (1 << (4 + path));
850	break;	850	break;
851	case ID_NBRXK:	851	case ID_NBRXK:
852	rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1);	852	rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1);
@@ -1078,7 +1078,7 @@ static bool _iqk_nbtxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 · 225 unmodified lines
1078	{	1078	{
1079	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;	1079	struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;
1080	bool kfail;	1080	bool kfail;
1081	u8 gp = 0x3;	1081	u8 gp = 0x2;
1082		1082
1083	switch (iqk_info->iqk_band[path]) {	1083	switch (iqk_info->iqk_band[path]) {
1084	case RTW89_BAND_2G:	1084	case RTW89_BAND_2G:

drivers/net/wireless/realtek/rtw89/rtw8852c.c+14−10

 	.seg0_pd_reg = R_SEG0R_PD,
 	.pd_lower_bound_mask = B_SEG0R_PD_LOWER_BOUND_MSK,
 	.pd_spatial_reuse_en = B_SEG0R_PD_SPATIAL_REUSE_EN_MSK,
+	.bmode_pd_reg = R_BMODE_PDTH_EN_V1,
+	.bmode_cca_rssi_limit_en = B_BMODE_PDTH_LIMIT_EN_MSK_V1,
+	.bmode_pd_lower_bound_reg = R_BMODE_PDTH_V1,
+	.bmode_rssi_nocca_low_th_mask = B_BMODE_PDTH_LOWER_BOUND_MSK_V1,
 	.p0_lna_init = {R_PATH0_LNA_INIT_V1, B_PATH0_LNA_INIT_IDX_MSK},
 	.p1_lna_init = {R_PATH1_LNA_INIT_V1, B_PATH1_LNA_INIT_IDX_MSK},
 	.p0_tia_init = {R_PATH0_TIA_INIT_V1, B_PATH0_TIA_INIT_IDX_MSK_V1},
 				     const struct rtw89_chan *chan,
 				     u8 mac_idx)
 {
-	u32 rf_mod = rtw89_mac_reg_by_idx(R_AX_WMAC_RFMOD, mac_idx);
+	u32 rf_mod = rtw89_mac_reg_by_idx(rtwdev, R_AX_WMAC_RFMOD, mac_idx);
-	u32 sub_carr = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE,
+	u32 sub_carr = rtw89_mac_reg_by_idx(rtwdev, R_AX_TX_SUB_CARRIER_VALUE, mac_idx);
-					     mac_idx);
+	u32 chk_rate = rtw89_mac_reg_by_idx(rtwdev, R_AX_TXRATE_CHK, mac_idx);
-	u32 chk_rate = rtw89_mac_reg_by_idx(R_AX_TXRATE_CHK, mac_idx);
 	u8 txsc20 = 0, txsc40 = 0, txsc80 = 0;
 	u8 rf_mod_val = 0, chk_rate_mask = 0;
 	u32 txsc;
 	    rtwdev->hal.cv != CHIP_CAV) {
 		rtw89_phy_write32_idx(rtwdev, R_P80_AT_HIGH_FREQ,
 				      B_P80_AT_HIGH_FREQ, 0x0, phy_idx);
-		reg = rtw89_mac_reg_by_idx(R_P80_AT_HIGH_FREQ_BB_WRP,
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_P80_AT_HIGH_FREQ_BB_WRP, phy_idx);
-					   phy_idx);
 		if (chan->primary_channel > chan->channel) {
 			rtw89_phy_write32_mask(rtwdev,
 					       R_P80_AT_HIGH_FREQ_RU_ALLOC,
 	for (i = 0; i < 4; i++) {
 		/* 1TX */
-		reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, mac_idx);
 		rtw89_write32_mask(rtwdev, reg,
 				   B_AX_PWR_UL_TB_1T_V1_MASK << (8 * i),
 				   val_1t);
 		/* 2TX */
-		reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, mac_idx);
 		rtw89_write32_mask(rtwdev, reg,
 				   B_AX_PWR_UL_TB_2T_V1_MASK << (8 * i),
 				   val_2t);
 	for (addr = R_AX_MACID_ANT_TABLE;
 	     addr <= R_AX_MACID_ANT_TABLE_LAST; addr += 4) {
-		reg = rtw89_mac_reg_by_idx(addr, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, addr, mac_idx);
 		rtw89_write32(rtwdev, reg, 0);
 	}
 	for (i = 0; i < cr_size; i++) {
 		rtw89_debug(rtwdev, RTW89_DBG_TSSI, "0x%x = 0x%x\n",
 			    path_com[i].addr, path_com[i].data);
-		reg = rtw89_mac_reg_by_idx(path_com[i].addr, mac_idx);
+		reg = rtw89_mac_reg_by_idx(rtwdev, path_com[i].addr, mac_idx);
 		rtw89_write32(rtwdev, reg, path_com[i].data);
 	}
 }
 	.chip_id		= RTL8852C,
 	.chip_gen		= RTW89_CHIP_AX,
 	.ops			= &rtw8852c_chip_ops,
+	.mac_def		= &rtw89_mac_gen_ax,
+	.phy_def		= &rtw89_phy_gen_ax,
 	.fw_basename		= RTW8852C_FW_BASENAME,
 	.fw_format_max		= RTW8852C_FW_FORMAT_MAX,
 	.try_ce_fw		= false,

drivers/net/wireless/realtek/rtw89/sar.c+209−11

@@ -2,9 +2,16 @@ · 1 unmodified line
2	/* Copyright(c) 2019-2020 Realtek Corporation	2	/* Copyright(c) 2019-2020 Realtek Corporation
3	*/	3	*/
4		4
		5	#include "acpi.h"
5	#include "debug.h"	6	#include "debug.h"
		7	#include "phy.h"
		8	#include "reg.h"
6	#include "sar.h"	9	#include "sar.h"
7		10
		11	#define RTW89_TAS_FACTOR 2 /* unit: 0.25 dBm */
		12	#define RTW89_TAS_DPR_GAP (1 << RTW89_TAS_FACTOR)
		13	#define RTW89_TAS_DELTA (2 << RTW89_TAS_FACTOR)
		14
8	static enum rtw89_sar_subband rtw89_sar_get_subband(struct rtw89_dev *rtwdev,	15	static enum rtw89_sar_subband rtw89_sar_get_subband(struct rtw89_dev *rtwdev,
9	u32 center_freq)	16	u32 center_freq)
10	{	17	{
@@ -78,17 +85,15 @@ static const struct rtw89_sar_span rtw89_sar_overlapping_6ghz[] = { · 67 unmodified lines
78	RTW89_DECL_SAR_6GHZ_SPAN(6885, SUBBAND_7_H, SUBBAND_8),	85	RTW89_DECL_SAR_6GHZ_SPAN(6885, SUBBAND_7_H, SUBBAND_8),
79	};	86	};
80		87
81	static int rtw89_query_sar_config_common(struct rtw89_dev rtwdev, s32 cfg)	88	static int rtw89_query_sar_config_common(struct rtw89_dev *rtwdev,
		89	u32 center_freq, s32 *cfg)
82	{	90	{
83	struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common;	91	struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common;
84	const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
85	enum rtw89_band band = chan->band_type;
86	u32 center_freq = chan->freq;
87	const struct rtw89_sar_span *span = NULL;	92	const struct rtw89_sar_span *span = NULL;
88	enum rtw89_sar_subband subband_l, subband_h;	93	enum rtw89_sar_subband subband_l, subband_h;
89	int idx;	94	int idx;
90		95
91	if (band == RTW89_BAND_6G) {	96	if (center_freq >= RTW89_SAR_6GHZ_SPAN_HEAD) {
92	idx = RTW89_SAR_6GHZ_SPAN_IDX(center_freq);	97	idx = RTW89_SAR_6GHZ_SPAN_IDX(center_freq);
93	/* To decrease size of rtw89_sar_overlapping_6ghz[],	98	/* To decrease size of rtw89_sar_overlapping_6ghz[],
94	* RTW89_SAR_6GHZ_SPAN_IDX() truncates the leading NULLs	99	* RTW89_SAR_6GHZ_SPAN_IDX() truncates the leading NULLs
@@ -108,8 +113,8 @@ static int rtw89_query_sar_config_common(struct rtw89_dev rtwdev, s32 cfg) · 13 unmodified lines
108	}	113	}
109		114
110	rtw89_debug(rtwdev, RTW89_DBG_SAR,	115	rtw89_debug(rtwdev, RTW89_DBG_SAR,
111	"for {band %u, center_freq %u}, SAR subband: {%u, %u}\n",	116	"center_freq %u: SAR subband {%u, %u}\n",
112	band, center_freq, subband_l, subband_h);	117	center_freq, subband_l, subband_h);
113		118
114	if (!rtwsar->set[subband_l] && !rtwsar->set[subband_h])	119	if (!rtwsar->set[subband_l] && !rtwsar->set[subband_h])
115	return -ENODATA;	120	return -ENODATA;
@@ -157,11 +162,35 @@ static s8 rtw89_txpwr_sar_to_mac(struct rtw89_dev *rtwdev, u8 fct, s32 cfg) · 41 unmodified lines
157	RTW89_SAR_TXPWR_MAC_MAX);	162	RTW89_SAR_TXPWR_MAC_MAX);
158	}	163	}
159		164
160	s8 rtw89_query_sar(struct rtw89_dev *rtwdev)	165	static s8 rtw89_txpwr_tas_to_sar(const struct rtw89_sar_handler *sar_hdl,
		166	s8 cfg)
		167	{
		168	const u8 fct = sar_hdl->txpwr_factor_sar;
		169
		170	if (fct > RTW89_TAS_FACTOR)
		171	return cfg << (fct - RTW89_TAS_FACTOR);
		172	else
		173	return cfg >> (RTW89_TAS_FACTOR - fct);
		174	}
		175
		176	static s8 rtw89_txpwr_sar_to_tas(const struct rtw89_sar_handler *sar_hdl,
		177	s8 cfg)
		178	{
		179	const u8 fct = sar_hdl->txpwr_factor_sar;
		180
		181	if (fct > RTW89_TAS_FACTOR)
		182	return cfg >> (fct - RTW89_TAS_FACTOR);
		183	else
		184	return cfg << (RTW89_TAS_FACTOR - fct);
		185	}
		186
		187	s8 rtw89_query_sar(struct rtw89_dev *rtwdev, u32 center_freq)
161	{	188	{
162	const enum rtw89_sar_sources src = rtwdev->sar.src;	189	const enum rtw89_sar_sources src = rtwdev->sar.src;
163	/* its members are protected by rtw89_sar_set_src() */	190	/* its members are protected by rtw89_sar_set_src() */
164	const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];	191	const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
		192	struct rtw89_tas_info *tas = &rtwdev->tas;
		193	s8 delta;
165	int ret;	194	int ret;
166	s32 cfg;	195	s32 cfg;
167	u8 fct;	196	u8 fct;
@@ -171,16 +200,30 @@ s8 rtw89_query_sar(struct rtw89_dev *rtwdev) · 3 unmodified lines
171	if (src == RTW89_SAR_SOURCE_NONE)	200	if (src == RTW89_SAR_SOURCE_NONE)
172	return RTW89_SAR_TXPWR_MAC_MAX;	201	return RTW89_SAR_TXPWR_MAC_MAX;
173		202
174	ret = sar_hdl->query_sar_config(rtwdev, &cfg);	203	ret = sar_hdl->query_sar_config(rtwdev, center_freq, &cfg);
175	if (ret)	204	if (ret)
176	return RTW89_SAR_TXPWR_MAC_MAX;	205	return RTW89_SAR_TXPWR_MAC_MAX;
177		206
		207	if (tas->enable) {
		208	switch (tas->state) {
		209	case RTW89_TAS_STATE_DPR_OFF:
		210	return RTW89_SAR_TXPWR_MAC_MAX;
		211	case RTW89_TAS_STATE_DPR_ON:
		212	delta = rtw89_txpwr_tas_to_sar(sar_hdl, tas->delta);
		213	cfg -= delta;
		214	break;
		215	case RTW89_TAS_STATE_DPR_FORBID:
		216	default:
		217	break;
		218	}
		219	}
		220
178	fct = sar_hdl->txpwr_factor_sar;	221	fct = sar_hdl->txpwr_factor_sar;
179		222
180	return rtw89_txpwr_sar_to_mac(rtwdev, fct, cfg);	223	return rtw89_txpwr_sar_to_mac(rtwdev, fct, cfg);
181	}	224	}
182		225
183	void rtw89_print_sar(struct seq_file m, struct rtw89_dev rtwdev)	226	void rtw89_print_sar(struct seq_file m, struct rtw89_dev rtwdev, u32 center_freq)
184	{	227	{
185	const enum rtw89_sar_sources src = rtwdev->sar.src;	228	const enum rtw89_sar_sources src = rtwdev->sar.src;
186	/* its members are protected by rtw89_sar_set_src() */	229	/* its members are protected by rtw89_sar_set_src() */
@@ -199,7 +242,7 @@ void rtw89_print_sar(struct seq_file m, struct rtw89_dev rtwdev) · 12 unmodified lines
199		242
200	seq_printf(m, "source: %d (%s)\n", src, sar_hdl->descr_sar_source);	243	seq_printf(m, "source: %d (%s)\n", src, sar_hdl->descr_sar_source);
201		244
202	ret = sar_hdl->query_sar_config(rtwdev, &cfg);	245	ret = sar_hdl->query_sar_config(rtwdev, center_freq, &cfg);
203	if (ret) {	246	if (ret) {
204	seq_printf(m, "config: return code: %d\n", ret);	247	seq_printf(m, "config: return code: %d\n", ret);
205	seq_printf(m, "assign: max setting: %d (unit: 1/%lu dBm)\n",	248	seq_printf(m, "assign: max setting: %d (unit: 1/%lu dBm)\n",
@@ -212,6 +255,19 @@ void rtw89_print_sar(struct seq_file m, struct rtw89_dev rtwdev) · 6 unmodified lines
212	seq_printf(m, "config: %d (unit: 1/%lu dBm)\n", cfg, BIT(fct));	255	seq_printf(m, "config: %d (unit: 1/%lu dBm)\n", cfg, BIT(fct));
213	}	256	}
214		257
		258	void rtw89_print_tas(struct seq_file m, struct rtw89_dev rtwdev)
		259	{
		260	struct rtw89_tas_info *tas = &rtwdev->tas;
		261
		262	if (!tas->enable) {
		263	seq_puts(m, "no TAS is applied\n");
		264	return;
		265	}
		266
		267	seq_printf(m, "DPR gap: %d\n", tas->dpr_gap);
		268	seq_printf(m, "TAS delta: %d\n", tas->delta);
		269	}
		270
215	static int rtw89_apply_sar_common(struct rtw89_dev *rtwdev,	271	static int rtw89_apply_sar_common(struct rtw89_dev *rtwdev,
216	const struct rtw89_sar_cfg_common *sar)	272	const struct rtw89_sar_cfg_common *sar)
217	{	273	{
@@ -292,3 +348,145 @@ int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw, · 74 unmodified lines
292		348
293	return rtw89_apply_sar_common(rtwdev, &sar_common);	349	return rtw89_apply_sar_common(rtwdev, &sar_common);
294	}	350	}
		351
		352	static void rtw89_tas_state_update(struct rtw89_dev *rtwdev)
		353	{
		354	const enum rtw89_sar_sources src = rtwdev->sar.src;
		355	/* its members are protected by rtw89_sar_set_src() */
		356	const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
		357	struct rtw89_tas_info *tas = &rtwdev->tas;
		358	s32 txpwr_avg = tas->total_txpwr / RTW89_TAS_MAX_WINDOW / PERCENT;
		359	s32 dpr_on_threshold, dpr_off_threshold, cfg;
		360	enum rtw89_tas_state state = tas->state;
		361	const struct rtw89_chan *chan;
		362	int ret;
		363
		364	lockdep_assert_held(&rtwdev->mutex);
		365
		366	if (src == RTW89_SAR_SOURCE_NONE)
		367	return;
		368
		369	chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
		370	ret = sar_hdl->query_sar_config(rtwdev, chan->freq, &cfg);
		371	if (ret)
		372	return;
		373
		374	cfg = rtw89_txpwr_sar_to_tas(sar_hdl, cfg);
		375
		376	if (tas->delta >= cfg) {
		377	rtw89_debug(rtwdev, RTW89_DBG_SAR,
		378	"TAS delta exceed SAR limit\n");
		379	state = RTW89_TAS_STATE_DPR_FORBID;
		380	goto out;
		381	}
		382
		383	dpr_on_threshold = cfg;
		384	dpr_off_threshold = cfg - tas->dpr_gap;
		385	rtw89_debug(rtwdev, RTW89_DBG_SAR,
		386	"DPR_ON thold: %d, DPR_OFF thold: %d, txpwr_avg: %d\n",
		387	dpr_on_threshold, dpr_off_threshold, txpwr_avg);
		388
		389	if (txpwr_avg >= dpr_on_threshold)
		390	state = RTW89_TAS_STATE_DPR_ON;
		391	else if (txpwr_avg < dpr_off_threshold)
		392	state = RTW89_TAS_STATE_DPR_OFF;
		393
		394	out:
		395	if (tas->state == state)
		396	return;
		397
		398	rtw89_debug(rtwdev, RTW89_DBG_SAR,
		399	"TAS old state: %d, new state: %d\n", tas->state, state);
		400	tas->state = state;
		401	rtw89_core_set_chip_txpwr(rtwdev);
		402	}
		403
		404	void rtw89_tas_init(struct rtw89_dev *rtwdev)
		405	{
		406	struct rtw89_tas_info *tas = &rtwdev->tas;
		407	int ret;
		408	u8 val;
		409
		410	ret = rtw89_acpi_evaluate_dsm(rtwdev, RTW89_ACPI_DSM_FUNC_TAS_EN, &val);
		411	if (ret) {
		412	rtw89_debug(rtwdev, RTW89_DBG_SAR,
		413	"acpi: cannot get TAS: %d\n", ret);
		414	return;
		415	}
		416
		417	switch (val) {
		418	case 0:
		419	tas->enable = false;
		420	break;
		421	case 1:
		422	tas->enable = true;
		423	break;
		424	default:
		425	break;
		426	}
		427
		428	if (!tas->enable) {
		429	rtw89_debug(rtwdev, RTW89_DBG_SAR, "TAS not enable\n");
		430	return;
		431	}
		432
		433	tas->dpr_gap = RTW89_TAS_DPR_GAP;
		434	tas->delta = RTW89_TAS_DELTA;
		435	}
		436
		437	void rtw89_tas_reset(struct rtw89_dev *rtwdev)
		438	{
		439	struct rtw89_tas_info *tas = &rtwdev->tas;
		440
		441	if (!tas->enable)
		442	return;
		443
		444	memset(&tas->txpwr_history, 0, sizeof(tas->txpwr_history));
		445	tas->total_txpwr = 0;
		446	tas->cur_idx = 0;
		447	tas->state = RTW89_TAS_STATE_DPR_OFF;
		448	}
		449
		450	static const struct rtw89_reg_def txpwr_regs[] = {
		451	{R_PATH0_TXPWR, B_PATH0_TXPWR},
		452	{R_PATH1_TXPWR, B_PATH1_TXPWR},
		453	};
		454
		455	void rtw89_tas_track(struct rtw89_dev *rtwdev)
		456	{
		457	struct rtw89_env_monitor_info *env = &rtwdev->env_monitor;
		458	const enum rtw89_sar_sources src = rtwdev->sar.src;
		459	u8 max_nss_num = rtwdev->chip->rf_path_num;
		460	struct rtw89_tas_info *tas = &rtwdev->tas;
		461	s16 tmp, txpwr, instant_txpwr = 0;
		462	u32 val;
		463	int i;
		464
		465	if (!tas->enable \|\| src == RTW89_SAR_SOURCE_NONE)
		466	return;
		467
		468	if (env->ccx_watchdog_result != RTW89_PHY_ENV_MON_IFS_CLM)
		469	return;
		470
		471	for (i = 0; i < max_nss_num; i++) {
		472	val = rtw89_phy_read32_mask(rtwdev, txpwr_regs[i].addr,
		473	txpwr_regs[i].mask);
		474	tmp = sign_extend32(val, 8);
		475	if (tmp <= 0)
		476	return;
		477	instant_txpwr += tmp;
		478	}
		479
		480	instant_txpwr /= max_nss_num;
		481	/* in unit of 0.25 dBm multiply by percentage */
		482	txpwr = instant_txpwr * env->ifs_clm_tx_ratio;
		483	tas->total_txpwr += txpwr - tas->txpwr_history[tas->cur_idx];
		484	tas->txpwr_history[tas->cur_idx] = txpwr;
		485	rtw89_debug(rtwdev, RTW89_DBG_SAR,
		486	"instant_txpwr: %d, tx_ratio: %d, txpwr: %d\n",
		487	instant_txpwr, env->ifs_clm_tx_ratio, txpwr);
		488
		489	tas->cur_idx = (tas->cur_idx + 1) % RTW89_TAS_MAX_WINDOW;
		490
		491	rtw89_tas_state_update(rtwdev);
		492	}

drivers/net/wireless/realtek/rtw89/sar.h+7−3

 struct rtw89_sar_handler {
 	const char *descr_sar_source;
 	u8 txpwr_factor_sar;
-	int (*query_sar_config)(struct rtw89_dev *rtwdev, s32 *cfg);
+	int (*query_sar_config)(struct rtw89_dev *rtwdev, u32 center_freq, s32 *cfg);
 };
 extern const struct cfg80211_sar_capa rtw89_sar_capa;
-s8 rtw89_query_sar(struct rtw89_dev *rtwdev);
+s8 rtw89_query_sar(struct rtw89_dev *rtwdev, u32 center_freq);
-void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev);
+void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev, u32 center_freq);
+void rtw89_print_tas(struct seq_file *m, struct rtw89_dev *rtwdev);
 int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw,
 			    const struct cfg80211_sar_specs *sar);
+void rtw89_tas_init(struct rtw89_dev *rtwdev);
+void rtw89_tas_reset(struct rtw89_dev *rtwdev);
+void rtw89_tas_track(struct rtw89_dev *rtwdev);
 #endif

drivers/net/wireless/realtek/rtw89/ser.c+13−7

 static void ser_mac_mem_dump(struct rtw89_dev *rtwdev, u8 *buf,
 			     u8 sel, u32 start_addr, u32 len)
 {
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+	u32 filter_model_addr = mac->filter_model_addr;
+	u32 indir_access_addr = mac->indir_access_addr;
 	u32 *ptr = (u32 *)buf;
 	u32 base_addr, start_page, residue;
 	u32 cnt = 0;
 	start_page = start_addr / MAC_MEM_DUMP_PAGE_SIZE;
 	residue = start_addr % MAC_MEM_DUMP_PAGE_SIZE;
-	base_addr = rtw89_mac_mem_base_addrs[sel];
+	base_addr = mac->mem_base_addrs[sel];
 	base_addr += start_page * MAC_MEM_DUMP_PAGE_SIZE;
 	while (cnt < len) {
-		rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, base_addr);
+		rtw89_write32(rtwdev, filter_model_addr, base_addr);
-		for (i = R_AX_INDIR_ACCESS_ENTRY + residue;
+		for (i = indir_access_addr + residue;
-		     i < R_AX_INDIR_ACCESS_ENTRY + MAC_MEM_DUMP_PAGE_SIZE;
+		     i < indir_access_addr + MAC_MEM_DUMP_PAGE_SIZE;
 		     i += 4, ptr++) {
 			*ptr = rtw89_read32(rtwdev, i);
 			cnt += 4;
 				       const struct __fw_backtrace_entry *ent)
 {
 	struct __fw_backtrace_info *ptr = (struct __fw_backtrace_info *)buf;
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+	u32 filter_model_addr = mac->filter_model_addr;
+	u32 indir_access_addr = mac->indir_access_addr;
 	u32 fwbt_addr = ent->wcpu_addr & RTW89_WCPU_BASE_MASK;
 	u32 fwbt_size = ent->size;
 	u32 fwbt_key = ent->key;
 	}
 	rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace start\n");
-	rtw89_write32(rtwdev, R_AX_FILTER_MODEL_ADDR, fwbt_addr);
+	rtw89_write32(rtwdev, filter_model_addr, fwbt_addr);
-	for (i = R_AX_INDIR_ACCESS_ENTRY;
+	for (i = indir_access_addr;
-	     i < R_AX_INDIR_ACCESS_ENTRY + fwbt_size;
+	     i < indir_access_addr + fwbt_size;
 	     i += RTW89_FW_BACKTRACE_INFO_SIZE, ptr++) {
 		*ptr = (struct __fw_backtrace_info){
 			.ra = rtw89_read32(rtwdev, i),

drivers/net/wireless/realtek/rtw89/wow.c+2−1

 static int rtw89_wow_config_mac(struct rtw89_dev *rtwdev, bool enable_wow)
 {
+	const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
 	int ret;
 	if (enable_wow) {
 			return ret;
 		}
 		rtw89_write32_set(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP);
-		rtw89_write32_clr(rtwdev, R_AX_RX_FLTR_OPT, B_AX_SNIFFER_MODE);
+		rtw89_write32_clr(rtwdev, mac->rx_fltr, B_AX_SNIFFER_MODE);
 		rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false);
 		rtw89_write32(rtwdev, R_AX_ACTION_FWD0, 0);
 		rtw89_write32(rtwdev, R_AX_ACTION_FWD1, 0);

drivers/net/wireless/rsi/rsi_91x_coex.c+4−7

 static void rsi_coex_scheduler_thread(struct rsi_common *common)
 {
-	struct rsi_coex_ctrl_block *coex_cb =
+	struct rsi_coex_ctrl_block *coex_cb = common->coex_cb;
-		(struct rsi_coex_ctrl_block *)common->coex_cb;
 	u32 timeout = EVENT_WAIT_FOREVER;
 	do {
 int rsi_coex_send_pkt(void *priv, struct sk_buff *skb, u8 hal_queue)
 {
-	struct rsi_common *common = (struct rsi_common *)priv;
+	struct rsi_common *common = priv;
-	struct rsi_coex_ctrl_block *coex_cb =
+	struct rsi_coex_ctrl_block *coex_cb = common->coex_cb;
-		(struct rsi_coex_ctrl_block *)common->coex_cb;
 	struct skb_info *tx_params = NULL;
 	enum rsi_coex_queues coex_q;
 	int status;
 void rsi_coex_detach(struct rsi_common *common)
 {
-	struct rsi_coex_ctrl_block *coex_cb =
+	struct rsi_coex_ctrl_block *coex_cb = common->coex_cb;
-		(struct rsi_coex_ctrl_block *)common->coex_cb;
 	int cnt;
 	rsi_kill_thread(&coex_cb->coex_tx_thread);

drivers/net/wireless/rsi/rsi_91x_debugfs.c+1−2

@@ -28,8 +28,7 @@ static int rsi_sdio_stats_read(struct seq_file seq, void data) · 27 unmodified lines
28	{	28	{
29	struct rsi_common *common = seq->private;	29	struct rsi_common *common = seq->private;
30	struct rsi_hw *adapter = common->priv;	30	struct rsi_hw *adapter = common->priv;
31	struct rsi_91x_sdiodev *dev =	31	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
32	(struct rsi_91x_sdiodev *)adapter->rsi_dev;
33		32
34	seq_printf(seq, "total_sdio_interrupts: %d\n",	33	seq_printf(seq, "total_sdio_interrupts: %d\n",
35	dev->rx_info.sdio_int_counter);	34	dev->rx_info.sdio_int_counter);

drivers/net/wireless/rsi/rsi_91x_hal.c+1−1

@@ -424,7 +424,7 @@ out: · 423 unmodified lines
424		424
425	int rsi_prepare_beacon(struct rsi_common common, struct sk_buff skb)	425	int rsi_prepare_beacon(struct rsi_common common, struct sk_buff skb)
426	{	426	{
427	struct rsi_hw adapter = (struct rsi_hw )common->priv;	427	struct rsi_hw *adapter = common->priv;
428	struct rsi_data_desc *bcn_frm;	428	struct rsi_data_desc *bcn_frm;
429	struct ieee80211_hw *hw = common->priv->hw;	429	struct ieee80211_hw *hw = common->priv->hw;
430	struct ieee80211_conf *conf = &hw->conf;	430	struct ieee80211_conf *conf = &hw->conf;

drivers/net/wireless/rsi/rsi_91x_mac80211.c+2−2

@@ -1763,8 +1763,8 @@ static int rsi_mac80211_roc(struct ieee80211_hw hw, struct ieee80211_vif vif, · 1762 unmodified lines
1763	struct ieee80211_channel *chan, int duration,	1763	struct ieee80211_channel *chan, int duration,
1764	enum ieee80211_roc_type type)	1764	enum ieee80211_roc_type type)
1765	{	1765	{
1766	struct rsi_hw adapter = (struct rsi_hw )hw->priv;	1766	struct rsi_hw *adapter = hw->priv;
1767	struct rsi_common common = (struct rsi_common )adapter->priv;	1767	struct rsi_common *common = adapter->priv;
1768	int status = 0;	1768	int status = 0;
1769		1769
1770	rsi_dbg(INFO_ZONE, "*** Remain on channel ***\n");	1770	rsi_dbg(INFO_ZONE, "*** Remain on channel ***\n");

drivers/net/wireless/rsi/rsi_91x_main.c+2−2

@@ -270,14 +270,14 @@ static void rsi_tx_scheduler_thread(struct rsi_common *common) · 269 unmodified lines
270	#ifdef CONFIG_RSI_COEX	270	#ifdef CONFIG_RSI_COEX
271	enum rsi_host_intf rsi_get_host_intf(void *priv)	271	enum rsi_host_intf rsi_get_host_intf(void *priv)
272	{	272	{
273	struct rsi_common common = (struct rsi_common )priv;	273	struct rsi_common *common = priv;
274		274
275	return common->priv->rsi_host_intf;	275	return common->priv->rsi_host_intf;
276	}	276	}
277		277
278	void rsi_set_bt_context(void priv, void bt_context)	278	void rsi_set_bt_context(void priv, void bt_context)
279	{	279	{
280	struct rsi_common common = (struct rsi_common )priv;	280	struct rsi_common *common = priv;
281		281
282	common->bt_adapter = bt_context;	282	common->bt_adapter = bt_context;
283	}	283	}

drivers/net/wireless/rsi/rsi_91x_sdio.c+14−25

 static void rsi_handle_interrupt(struct sdio_func *function)
 {
 	struct rsi_hw *adapter = sdio_get_drvdata(function);
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	if (adapter->priv->fsm_state == FSM_FW_NOT_LOADED)
 		return;
  */
 static void rsi_setclock(struct rsi_hw *adapter, u32 freq)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	struct mmc_host *host = dev->pfunction->card->host;
 	u32 clock;
  */
 static int rsi_setblocklength(struct rsi_hw *adapter, u32 length)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	int status;
 	rsi_dbg(INIT_ZONE, "%s: Setting the block length\n", __func__);
  */
 static int rsi_setupcard(struct rsi_hw *adapter)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	int status = 0;
 	rsi_setclock(adapter, 50000);
 			   u32 addr,
 			   u8 *data)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	u8 fun_num = 0;
 	int status;
 			    u32 addr,
 			    u8 *data)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	int status = 0;
 	if (likely(dev->sdio_irq_task != current))
 					   u8 *data,
 					   u16 count)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	u32 status;
 	if (likely(dev->sdio_irq_task != current))
 				     u8 *data,
 				     u16 count)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	int status;
 	if (dev->write_fail > 1) {
 					u8 *pkt,
 					u32 len)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	u32 block_size = dev->tx_blk_size;
 	u32 num_blocks, address, length;
 	u32 queueno;
 		goto fail_free_adapter;
 	}
-	sdev = (struct rsi_91x_sdiodev *)adapter->rsi_dev;
+	sdev = adapter->rsi_dev;
 	rsi_init_event(&sdev->rx_thread.event);
 	status = rsi_create_kthread(adapter->priv, &sdev->rx_thread,
 				    rsi_sdio_rx_thread, "SDIO-RX-Thread");
 	if (!adapter)
 		return;
-	dev = (struct rsi_91x_sdiodev *)adapter->rsi_dev;
+	dev = adapter->rsi_dev;
 	rsi_kill_thread(&dev->rx_thread);
 	sdio_claim_host(pfunction);
 #ifdef CONFIG_PM
 static int rsi_set_sdio_pm_caps(struct rsi_hw *adapter)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	struct sdio_func *func = dev->pfunction;
 	int ret;
 		return -ENODEV;
 	}
 	common = adapter->priv;
-	sdev = (struct rsi_91x_sdiodev *)adapter->rsi_dev;
+	sdev = adapter->rsi_dev;
 	if ((common->wow_flags & RSI_WOW_ENABLED) &&
 	    (common->wow_flags & RSI_WOW_NO_CONNECTION))
 {
 	struct sdio_func *pfunction = dev_to_sdio_func(dev);
 	struct rsi_hw *adapter = sdio_get_drvdata(pfunction);
-	struct rsi_91x_sdiodev *sdev =
+	struct rsi_91x_sdiodev *sdev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	struct ieee80211_hw *hw = adapter->hw;
 	rsi_dbg(ERR_ZONE, "SDIO Bus shutdown =====>\n");

drivers/net/wireless/rsi/rsi_91x_sdio_ops.c+5−10

 static int rsi_process_pkt(struct rsi_common *common)
 {
 	struct rsi_hw *adapter = common->priv;
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	u8 num_blks = 0;
 	u32 rcv_pkt_len = 0;
 	int status = 0;
  */
 int rsi_init_sdio_slave_regs(struct rsi_hw *adapter)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	u8 function = 0;
 	u8 byte;
 	int status = 0;
 static void rsi_rx_handler(struct rsi_hw *adapter)
 {
 	struct rsi_common *common = adapter->priv;
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	int status;
 	u8 isr_status = 0;
 	u8 fw_status = 0;
 int rsi_sdio_check_buffer_status(struct rsi_hw *adapter, u8 q_num)
 {
 	struct rsi_common *common = adapter->priv;
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	u8 buf_status = 0;
 	int status = 0;
 	static int counter = 4;
  */
 int rsi_sdio_determine_event_timeout(struct rsi_hw *adapter)
 {
-	struct rsi_91x_sdiodev *dev =
+	struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
-		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	/* Once buffer full is seen, event timeout to occur every 2 msecs */
 	if (dev->rx_info.buffer_full)

drivers/net/wireless/rsi/rsi_91x_usb.c+10−10

@@ -43,7 +43,7 @@ static int rsi_usb_card_write(struct rsi_hw *adapter, · 42 unmodified lines
43	u16 len,	43	u16 len,
44	u8 endpoint)	44	u8 endpoint)
45	{	45	{
46	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	46	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
47	int status;	47	int status;
48	u8 *seg = dev->tx_buffer;	48	u8 *seg = dev->tx_buffer;
49	int transfer;	49	int transfer;
@@ -91,7 +91,7 @@ static int rsi_write_multiple(struct rsi_hw *adapter, · 41 unmodified lines
91	if (endpoint == 0)	91	if (endpoint == 0)
92	return -EINVAL;	92	return -EINVAL;
93		93
94	dev = (struct rsi_91x_usbdev *)adapter->rsi_dev;	94	dev = adapter->rsi_dev;
95	if (dev->write_fail)	95	if (dev->write_fail)
96	return -ENETDOWN;	96	return -ENETDOWN;
97		97
@@ -109,7 +109,7 @@ static int rsi_write_multiple(struct rsi_hw *adapter, · 11 unmodified lines
109	static int rsi_find_bulk_in_and_out_endpoints(struct usb_interface *interface,	109	static int rsi_find_bulk_in_and_out_endpoints(struct usb_interface *interface,
110	struct rsi_hw *adapter)	110	struct rsi_hw *adapter)
111	{	111	{
112	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	112	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
113	struct usb_host_interface *iface_desc;	113	struct usb_host_interface *iface_desc;
114	struct usb_endpoint_descriptor *endpoint;	114	struct usb_endpoint_descriptor *endpoint;
115	__le16 buffer_size;	115	__le16 buffer_size;
@@ -306,7 +306,7 @@ out: · 190 unmodified lines
306		306
307	static void rsi_rx_urb_kill(struct rsi_hw *adapter, u8 ep_num)	307	static void rsi_rx_urb_kill(struct rsi_hw *adapter, u8 ep_num)
308	{	308	{
309	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	309	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
310	struct rx_usb_ctrl_block *rx_cb = &dev->rx_cb[ep_num - 1];	310	struct rx_usb_ctrl_block *rx_cb = &dev->rx_cb[ep_num - 1];
311	struct urb *urb = rx_cb->rx_urb;	311	struct urb *urb = rx_cb->rx_urb;
312		312
@@ -323,7 +323,7 @@ static void rsi_rx_urb_kill(struct rsi_hw *adapter, u8 ep_num) · 10 unmodified lines
323	*/	323	*/
324	static int rsi_rx_urb_submit(struct rsi_hw *adapter, u8 ep_num, gfp_t mem_flags)	324	static int rsi_rx_urb_submit(struct rsi_hw *adapter, u8 ep_num, gfp_t mem_flags)
325	{	325	{
326	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	326	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
327	struct rx_usb_ctrl_block *rx_cb = &dev->rx_cb[ep_num - 1];	327	struct rx_usb_ctrl_block *rx_cb = &dev->rx_cb[ep_num - 1];
328	struct urb *urb = rx_cb->rx_urb;	328	struct urb *urb = rx_cb->rx_urb;
329	int status;	329	int status;
@@ -362,7 +362,7 @@ static int rsi_rx_urb_submit(struct rsi_hw *adapter, u8 ep_num, gfp_t mem_flags) · 32 unmodified lines
362	static int rsi_usb_read_register_multiple(struct rsi_hw *adapter, u32 addr,	362	static int rsi_usb_read_register_multiple(struct rsi_hw *adapter, u32 addr,
363	u8 *data, u16 count)	363	u8 *data, u16 count)
364	{	364	{
365	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	365	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
366	u8 *buf;	366	u8 *buf;
367	u16 transfer;	367	u16 transfer;
368	int status;	368	int status;
@@ -412,7 +412,7 @@ static int rsi_usb_read_register_multiple(struct rsi_hw *adapter, u32 addr, · 43 unmodified lines
412	static int rsi_usb_write_register_multiple(struct rsi_hw *adapter, u32 addr,	412	static int rsi_usb_write_register_multiple(struct rsi_hw *adapter, u32 addr,
413	u8 *data, u16 count)	413	u8 *data, u16 count)
414	{	414	{
415	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	415	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
416	u8 *buf;	416	u8 *buf;
417	u16 transfer;	417	u16 transfer;
418	int status = 0;	418	int status = 0;
@@ -559,7 +559,7 @@ static struct rsi_host_intf_ops usb_host_intf_ops = { · 140 unmodified lines
559	*/	559	*/
560	static void rsi_deinit_usb_interface(struct rsi_hw *adapter)	560	static void rsi_deinit_usb_interface(struct rsi_hw *adapter)
561	{	561	{
562	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	562	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
563		563
564	rsi_kill_thread(&dev->rx_thread);	564	rsi_kill_thread(&dev->rx_thread);
565		565
@@ -572,7 +572,7 @@ static void rsi_deinit_usb_interface(struct rsi_hw *adapter) · 6 unmodified lines
572		572
573	static int rsi_usb_init_rx(struct rsi_hw *adapter)	573	static int rsi_usb_init_rx(struct rsi_hw *adapter)
574	{	574	{
575	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	575	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
576	struct rx_usb_ctrl_block *rx_cb;	576	struct rx_usb_ctrl_block *rx_cb;
577	u8 idx, num_rx_cb;	577	u8 idx, num_rx_cb;
578		578
@@ -822,7 +822,7 @@ static int rsi_probe(struct usb_interface *pfunction, · 243 unmodified lines
822	goto err1;	822	goto err1;
823	}	823	}
824		824
825	dev = (struct rsi_91x_usbdev *)adapter->rsi_dev;	825	dev = adapter->rsi_dev;
826		826
827	status = rsi_usb_reg_read(dev->usbdev, FW_STATUS_REG, &fw_status, 2);	827	status = rsi_usb_reg_read(dev->usbdev, FW_STATUS_REG, &fw_status, 2);
828	if (status < 0)	828	if (status < 0)

drivers/net/wireless/rsi/rsi_91x_usb_ops.c+1−1

@@ -28,7 +28,7 @@ · 27 unmodified lines
28	void rsi_usb_rx_thread(struct rsi_common *common)	28	void rsi_usb_rx_thread(struct rsi_common *common)
29	{	29	{
30	struct rsi_hw *adapter = common->priv;	30	struct rsi_hw *adapter = common->priv;
31	struct rsi_91x_usbdev dev = (struct rsi_91x_usbdev )adapter->rsi_dev;	31	struct rsi_91x_usbdev *dev = adapter->rsi_dev;
32	int status;	32	int status;
33	struct sk_buff *skb;	33	struct sk_buff *skb;
34		34

drivers/net/wireless/silabs/wfx/main.c+3−4

 	hw->wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
 	hw->wiphy->n_iface_combinations = ARRAY_SIZE(wfx_iface_combinations);
 	hw->wiphy->iface_combinations = wfx_iface_combinations;
-	hw->wiphy->bands[NL80211_BAND_2GHZ] = devm_kmalloc(dev, sizeof(wfx_band_2ghz), GFP_KERNEL);
+	/* FIXME: also copy wfx_rates and wfx_2ghz_chantable */
+	hw->wiphy->bands[NL80211_BAND_2GHZ] = devm_kmemdup(dev, &wfx_band_2ghz,
+							   sizeof(wfx_band_2ghz), GFP_KERNEL);
 	if (!hw->wiphy->bands[NL80211_BAND_2GHZ])
 		goto err;
-	/* FIXME: also copy wfx_rates and wfx_2ghz_chantable */
-	memcpy(hw->wiphy->bands[NL80211_BAND_2GHZ], &wfx_band_2ghz, sizeof(wfx_band_2ghz));
 	wdev = hw->priv;
 	wdev->hw = hw;
 	wdev->dev = dev;

drivers/net/wireless/ti/wlcore/sdio.c+1−12

@@ -442,18 +442,7 @@ static struct sdio_driver wl1271_sdio_driver = { · 441 unmodified lines
442	#endif	442	#endif
443	};	443	};
444		444
445	static int __init wl1271_init(void)	445	module_sdio_driver(wl1271_sdio_driver);
446	{
447	return sdio_register_driver(&wl1271_sdio_driver);
448	}
449
450	static void __exit wl1271_exit(void)
451	{
452	sdio_unregister_driver(&wl1271_sdio_driver);
453	}
454
455	module_init(wl1271_init);
456	module_exit(wl1271_exit);
457		446
458	module_param(dump, bool, 0600);	447	module_param(dump, bool, 0600);
459	MODULE_PARM_DESC(dump, "Enable sdio read/write dumps.");	448	MODULE_PARM_DESC(dump, "Enable sdio read/write dumps.");

drivers/net/wireless/virtual/mac80211_hwsim.c+9−9

@@ -582,9 +582,8 @@ static int mac80211_hwsim_vendor_cmd_test(struct wiphy *wiphy, · 581 unmodified lines
582	*/	582	*/
583		583
584	/* Add vendor data */	584	/* Add vendor data */
585	err = nla_put_u32(skb, QCA_WLAN_VENDOR_ATTR_TEST, val + 1);	585	nla_put_u32(skb, QCA_WLAN_VENDOR_ATTR_TEST, val + 1);
586	if (err)	586
587	return err;
588	/* Send the event - this will call nla_nest_end() */	587	/* Send the event - this will call nla_nest_end() */
589	cfg80211_vendor_event(skb, GFP_KERNEL);	588	cfg80211_vendor_event(skb, GFP_KERNEL);
590	}	589	}
@@ -5626,14 +5625,15 @@ static int hwsim_cloned_frame_received_nl(struct sk_buff *skb_2, · 5035 unmodified lines
5626	frame_data_len = nla_len(info->attrs[HWSIM_ATTR_FRAME]);	5625	frame_data_len = nla_len(info->attrs[HWSIM_ATTR_FRAME]);
5627	frame_data = (void *)nla_data(info->attrs[HWSIM_ATTR_FRAME]);	5626	frame_data = (void *)nla_data(info->attrs[HWSIM_ATTR_FRAME]);
5628		5627
		5628	if (frame_data_len < sizeof(struct ieee80211_hdr_3addr) \|\|
		5629	frame_data_len > IEEE80211_MAX_DATA_LEN)
		5630	goto err;
		5631
5629	/* Allocate new skb here */	5632	/* Allocate new skb here */
5630	skb = alloc_skb(frame_data_len, GFP_KERNEL);	5633	skb = alloc_skb(frame_data_len, GFP_KERNEL);
5631	if (skb == NULL)	5634	if (skb == NULL)
5632	goto err;	5635	goto err;
5633		5636
5634	if (frame_data_len > IEEE80211_MAX_DATA_LEN)
5635	goto err;
5636
5637	/* Copy the data */	5637	/* Copy the data */
5638	skb_put_data(skb, frame_data, frame_data_len);	5638	skb_put_data(skb, frame_data, frame_data_len);
5639		5639
@@ -6314,7 +6314,7 @@ static void hwsim_virtio_tx_done(struct virtqueue *vq) · 674 unmodified lines
6314		6314
6315	spin_lock_irqsave(&hwsim_virtio_lock, flags);	6315	spin_lock_irqsave(&hwsim_virtio_lock, flags);
6316	while ((skb = virtqueue_get_buf(vq, &len)))	6316	while ((skb = virtqueue_get_buf(vq, &len)))
6317	nlmsg_free(skb);	6317	dev_kfree_skb_irq(skb);
6318	spin_unlock_irqrestore(&hwsim_virtio_lock, flags);	6318	spin_unlock_irqrestore(&hwsim_virtio_lock, flags);
6319	}	6319	}
6320		6320
@@ -6383,14 +6383,14 @@ static void hwsim_virtio_rx_work(struct work_struct *work) · 62 unmodified lines
6383		6383
6384	spin_lock_irqsave(&hwsim_virtio_lock, flags);	6384	spin_lock_irqsave(&hwsim_virtio_lock, flags);
6385	if (!hwsim_virtio_enabled) {	6385	if (!hwsim_virtio_enabled) {
6386	nlmsg_free(skb);	6386	dev_kfree_skb_irq(skb);
6387	goto out_unlock;	6387	goto out_unlock;
6388	}	6388	}
6389	vq = hwsim_vqs[HWSIM_VQ_RX];	6389	vq = hwsim_vqs[HWSIM_VQ_RX];
6390	sg_init_one(sg, skb->head, skb_end_offset(skb));	6390	sg_init_one(sg, skb->head, skb_end_offset(skb));
6391	err = virtqueue_add_inbuf(vq, sg, 1, skb, GFP_ATOMIC);	6391	err = virtqueue_add_inbuf(vq, sg, 1, skb, GFP_ATOMIC);
6392	if (WARN(err, "virtqueue_add_inbuf returned %d\n", err))	6392	if (WARN(err, "virtqueue_add_inbuf returned %d\n", err))
6393	nlmsg_free(skb);	6393	dev_kfree_skb_irq(skb);
6394	else	6394	else
6395	virtqueue_kick(vq);	6395	virtqueue_kick(vq);
6396	schedule_work(&hwsim_virtio_rx);	6396	schedule_work(&hwsim_virtio_rx);

drivers/net/wireless/zydas/zd1201.c+3−3

@@ -1,6 +1,6 @@
1	// SPDX-License-Identifier: GPL-2.0-only	1	// SPDX-License-Identifier: GPL-2.0-only
2	/*	2	/*
3	* Driver for ZyDAS zd1201 based wireless USB devices.	3	* Driver for ZyDAS zd1201 based USB wireless devices.
4	*	4	*
5	* Copyright (c) 2004, 2005 Jeroen Vreeken (pe1rxq@amsat.org)	5	* Copyright (c) 2004, 2005 Jeroen Vreeken (pe1rxq@amsat.org)
6	*	6	*
@@ -23,8 +23,8 @@ · 16 unmodified lines
23	#include "zd1201.h"	23	#include "zd1201.h"
24		24
25	static const struct usb_device_id zd1201_table[] = {	25	static const struct usb_device_id zd1201_table[] = {
26	{USB_DEVICE(0x0586, 0x3400)}, /* Peabird Wireless USB Adapter */	26	{USB_DEVICE(0x0586, 0x3400)}, /* Peabird USB Wireless Adapter */
27	{USB_DEVICE(0x0ace, 0x1201)}, /* ZyDAS ZD1201 Wireless USB Adapter */	27	{USB_DEVICE(0x0ace, 0x1201)}, /* ZyDAS ZD1201 USB Wireless Adapter */
28	{USB_DEVICE(0x050d, 0x6051)}, /* Belkin F5D6051 usb adapter */	28	{USB_DEVICE(0x050d, 0x6051)}, /* Belkin F5D6051 usb adapter */
29	{USB_DEVICE(0x0db0, 0x6823)}, /* MSI UB11B usb adapter */	29	{USB_DEVICE(0x0db0, 0x6823)}, /* MSI UB11B usb adapter */
30	{USB_DEVICE(0x1044, 0x8004)}, /* Gigabyte GN-WLBZ101 */	30	{USB_DEVICE(0x1044, 0x8004)}, /* Gigabyte GN-WLBZ101 */

drivers/platform/x86/eeepc-laptop.c+1−1

@@ -1394,7 +1394,7 @@ static int eeepc_acpi_add(struct acpi_device *device) · 1393 unmodified lines
1394	* and machine-specific scripts find the fixed name convenient. But	1394	* and machine-specific scripts find the fixed name convenient. But
1395	* It's also good for us to exclude multiple instances because both	1395	* It's also good for us to exclude multiple instances because both
1396	* our hwmon and our wlan rfkill subdevice use global ACPI objects	1396	* our hwmon and our wlan rfkill subdevice use global ACPI objects
1397	* (the EC and the wlan PCI slot respectively).	1397	* (the EC and the PCI wlan slot respectively).
1398	*/	1398	*/
1399	result = eeepc_platform_init(eeepc);	1399	result = eeepc_platform_init(eeepc);
1400	if (result)	1400	if (result)

drivers/staging/wlan-ng/prism2usb.c+24−24

include/linux/ieee80211.h+177−58

 };
 /**
- * struct ieee80211_quiet_ie
+ * struct ieee80211_quiet_ie - Quiet element
+ * @count: Quiet Count
+ * @period: Quiet Period
+ * @duration: Quiet Duration
+ * @offset: Quiet Offset
  *
- * This structure refers to "Quiet information element"
+ * This structure represents the payload of the "Quiet element" as
+ * described in IEEE Std 802.11-2020 section 9.4.2.22.
  */
 struct ieee80211_quiet_ie {
 	u8 count;
 } __packed;
 /**
- * struct ieee80211_msrment_ie
+ * struct ieee80211_msrment_ie - Measurement element
+ * @token: Measurement Token
+ * @mode: Measurement Report Mode
+ * @type: Measurement Type
+ * @request: Measurement Request or Measurement Report
  *
- * This structure refers to "Measurement Request/Report information element"
+ * This structure represents the payload of both the "Measurement
+ * Request element" and the "Measurement Report element" as described
+ * in IEEE Std 802.11-2020 sections 9.4.2.20 and 9.4.2.21.
  */
 struct ieee80211_msrment_ie {
 	u8 token;
 } __packed;
 /**
- * struct ieee80211_channel_sw_ie
+ * struct ieee80211_channel_sw_ie - Channel Switch Announcement element
+ * @mode: Channel Switch Mode
+ * @new_ch_num: New Channel Number
+ * @count: Channel Switch Count
  *
- * This structure refers to "Channel Switch Announcement information element"
+ * This structure represents the payload of the "Channel Switch
+ * Announcement element" as described in IEEE Std 802.11-2020 section
+ * 9.4.2.18.
  */
 struct ieee80211_channel_sw_ie {
 	u8 mode;
 } __packed;
 /**
- * struct ieee80211_ext_chansw_ie
+ * struct ieee80211_ext_chansw_ie - Extended Channel Switch Announcement element
+ * @mode: Channel Switch Mode
+ * @new_operating_class: New Operating Class
+ * @new_ch_num: New Channel Number
+ * @count: Channel Switch Count
  *
- * This structure represents the "Extended Channel Switch Announcement element"
+ * This structure represents the "Extended Channel Switch Announcement
+ * element" as described in IEEE Std 802.11-2020 section 9.4.2.52.
  */
 struct ieee80211_ext_chansw_ie {
 	u8 mode;
 /**
  * struct ieee80211_mesh_chansw_params_ie - mesh channel switch parameters IE
+ * @mesh_ttl: Time To Live
+ * @mesh_flags: Flags
+ * @mesh_reason: Reason Code
+ * @mesh_pre_value: Precedence Value
  *
- * This structure represents the "Mesh Channel Switch Paramters element"
+ * This structure represents the payload of the "Mesh Channel Switch
+ * Parameters element" as described in IEEE Std 802.11-2020 section
+ * 9.4.2.102.
  */
 struct ieee80211_mesh_chansw_params_ie {
 	u8 mesh_ttl;
 /**
  * struct ieee80211_wide_bw_chansw_ie - wide bandwidth channel switch IE
+ * @new_channel_width: New Channel Width
+ * @new_center_freq_seg0: New Channel Center Frequency Segment 0
+ * @new_center_freq_seg1: New Channel Center Frequency Segment 1
+ *
+ * This structure represents the payload of the "Wide Bandwidth
+ * Channel Switch element" as described in IEEE Std 802.11-2020
+ * section 9.4.2.160.
  */
 struct ieee80211_wide_bw_chansw_ie {
 	u8 new_channel_width;
 } __packed;
 /**
- * struct ieee80211_tim
+ * struct ieee80211_tim_ie - Traffic Indication Map information element
+ * @dtim_count: DTIM Count
+ * @dtim_period: DTIM Period
+ * @bitmap_ctrl: Bitmap Control
+ * @virtual_map: Partial Virtual Bitmap
  *
- * This structure refers to "Traffic Indication Map information element"
+ * This structure represents the payload of the "TIM element" as
+ * described in IEEE Std 802.11-2020 section 9.4.2.5.
  */
 struct ieee80211_tim_ie {
 	u8 dtim_count;
 } __packed;
 /**
- * struct ieee80211_meshconf_ie
+ * struct ieee80211_meshconf_ie - Mesh Configuration element
+ * @meshconf_psel: Active Path Selection Protocol Identifier
+ * @meshconf_pmetric: Active Path Selection Metric Identifier
+ * @meshconf_congest: Congestion Control Mode Identifier
+ * @meshconf_synch: Synchronization Method Identifier
+ * @meshconf_auth: Authentication Protocol Identifier
+ * @meshconf_form: Mesh Formation Info
+ * @meshconf_cap: Mesh Capability (see &enum mesh_config_capab_flags)
  *
- * This structure refers to "Mesh Configuration information element"
+ * This structure represents the payload of the "Mesh Configuration
+ * element" as described in IEEE Std 802.11-2020 section 9.4.2.97.
  */
 struct ieee80211_meshconf_ie {
 	u8 meshconf_psel;
  *	is ongoing
  * @IEEE80211_MESHCONF_CAPAB_POWER_SAVE_LEVEL: STA is in deep sleep mode or has
  *	neighbors in deep sleep mode
+ *
+ * Enumerates the "Mesh Capability" as described in IEEE Std
+ * 802.11-2020 section 9.4.2.97.7.
  */
 enum mesh_config_capab_flags {
 	IEEE80211_MESHCONF_CAPAB_ACCEPT_PLINKS		= 0x01,
 #define IEEE80211_MESHCONF_FORM_CONNECTED_TO_GATE 0x1
-/**
+/*
  * mesh channel switch parameters element's flag indicator
  *
  */
 #define WLAN_EID_CHAN_SWITCH_PARAM_REASON BIT(2)
 /**
- * struct ieee80211_rann_ie
+ * struct ieee80211_rann_ie - RANN (root announcement) element
+ * @rann_flags: Flags
+ * @rann_hopcount: Hop Count
+ * @rann_ttl: Element TTL
+ * @rann_addr: Root Mesh STA Address
+ * @rann_seq: HWMP Sequence Number
+ * @rann_interval: Interval
+ * @rann_metric: Metric
  *
- * This structure refers to "Root Announcement information element"
+ * This structure represents the payload of the "RANN element" as
+ * described in IEEE Std 802.11-2020 section 9.4.2.111.
  */
 struct ieee80211_rann_ie {
 	u8 rann_flags;
 };
 /**
- * enum ieee80211_opmode_bits - VHT operating mode field bits
+ * enum ieee80211_vht_opmode_bits - VHT operating mode field bits
  * @IEEE80211_OPMODE_NOTIF_CHANWIDTH_MASK: channel width mask
  * @IEEE80211_OPMODE_NOTIF_CHANWIDTH_20MHZ: 20 MHz channel width
  * @IEEE80211_OPMODE_NOTIF_CHANWIDTH_40MHZ: 40 MHz channel width
 #define WLAN_USER_POSITION_LEN 16
 /**
- * struct ieee80211_tpc_report_ie
+ * struct ieee80211_tpc_report_ie - TPC Report element
+ * @tx_power: Transmit Power
+ * @link_margin: Link Margin
  *
- * This structure refers to "TPC Report element"
+ * This structure represents the payload of the "TPC Report element" as
+ * described in IEEE Std 802.11-2020 section 9.4.2.16.
  */
 struct ieee80211_tpc_report_ie {
 	u8 tx_power;
 } __packed;
 /**
- * struct ieee80211_s1g_bcn_compat_ie
+ * struct ieee80211_s1g_bcn_compat_ie - S1G Beacon Compatibility element
+ * @compat_info: Compatibility Information
+ * @beacon_int: Beacon Interval
+ * @tsf_completion: TSF Completion
  *
- * S1G Beacon Compatibility element
+ * This structure represents the payload of the "S1G Beacon
+ * Compatibility element" as described in IEEE Std 802.11-2020 section
+ * 9.4.2.196.
  */
 struct ieee80211_s1g_bcn_compat_ie {
 	__le16 compat_info;
 } __packed;
 /**
- * struct ieee80211_s1g_oper_ie
+ * struct ieee80211_s1g_oper_ie - S1G Operation element
+ * @ch_width: S1G Operation Information Channel Width
+ * @oper_class: S1G Operation Information Operating Class
+ * @primary_ch: S1G Operation Information Primary Channel Number
+ * @oper_ch: S1G Operation Information  Channel Center Frequency
+ * @basic_mcs_nss: Basic S1G-MCS and NSS Set
  *
- * S1G Operation element
+ * This structure represents the payload of the "S1G Operation
+ * element" as described in IEEE Std 802.11-2020 section 9.4.2.212.
  */
 struct ieee80211_s1g_oper_ie {
 	u8 ch_width;
 } __packed;
 /**
- * struct ieee80211_aid_response_ie
+ * struct ieee80211_aid_response_ie - AID Response element
+ * @aid: AID/Group AID
+ * @switch_count: AID Switch Count
+ * @response_int: AID Response Interval
  *
- * AID Response element
+ * This structure represents the payload of the "AID Response element"
+ * as described in IEEE Std 802.11-2020 section 9.4.2.194.
  */
 struct ieee80211_aid_response_ie {
 	__le16 aid;
 /*
  * Peer-to-Peer IE attribute related definitions.
  */
-/**
+/*
  * enum ieee80211_p2p_attr_id - identifies type of peer-to-peer attribute.
  */
 enum ieee80211_p2p_attr_id {
 #define IEEE80211_P2P_OPPPS_CTWINDOW_MASK	0x7F
 /**
- * struct ieee80211_bar - HT Block Ack Request
+ * struct ieee80211_bar - Block Ack Request frame format
+ * @frame_control: Frame Control
+ * @duration: Duration
+ * @ra: RA
+ * @ta: TA
+ * @control: BAR Control
+ * @start_seq_num: Starting Sequence Number (see Figure 9-37)
  *
- * This structure refers to "HT BlockAckReq" as
+ * This structure represents the "BlockAckReq frame format"
- * described in 802.11n draft section 7.2.1.7.1
+ * as described in IEEE Std 802.11-2020 section 9.3.1.7.
- */
+*/
 struct ieee80211_bar {
 	__le16 frame_control;
 	__le16 duration;
 #define IEEE80211_HT_MCS_MASK_LEN		10
 /**
- * struct ieee80211_mcs_info - MCS information
+ * struct ieee80211_mcs_info - Supported MCS Set field
  * @rx_mask: RX mask
  * @rx_highest: highest supported RX rate. If set represents
  *	the highest supported RX data rate in units of 1 Mbps.
  *	If this field is 0 this value should not be used to
  *	consider the highest RX data rate supported.
  * @tx_params: TX parameters
+ * @reserved: Reserved bits
+ *
+ * This structure represents the "Supported MCS Set field" as
+ * described in IEEE Std 802.11-2020 section 9.4.2.55.4.
  */
 struct ieee80211_mcs_info {
 	u8 rx_mask[IEEE80211_HT_MCS_MASK_LEN];
 	(IEEE80211_HT_MCS_UNEQUAL_MODULATION_START / 8)
 /**
- * struct ieee80211_ht_cap - HT capabilities
+ * struct ieee80211_ht_cap - HT capabilities element
+ * @cap_info: HT Capability Information
+ * @ampdu_params_info: A-MPDU Parameters
+ * @mcs: Supported MCS Set
+ * @extended_ht_cap_info: HT Extended Capabilities
+ * @tx_BF_cap_info: Transmit Beamforming Capabilities
+ * @antenna_selection_info: ASEL Capability
  *
- * This structure is the "HT capabilities element" as
+ * This structure represents the payload of the "HT Capabilities
- * described in 802.11n D5.0 7.3.2.57
+ * element" as described in IEEE Std 802.11-2020 section 9.4.2.55.
  */
 struct ieee80211_ht_cap {
 	__le16 cap_info;
 /**
  * struct ieee80211_ht_operation - HT operation IE
+ * @primary_chan: Primary Channel
+ * @ht_param: HT Operation Information parameters
+ * @operation_mode: HT Operation Information operation mode
+ * @stbc_param: HT Operation Information STBC params
+ * @basic_set: Basic HT-MCS Set
  *
- * This structure is the "HT operation element" as
+ * This structure represents the payload of the "HT Operation
- * described in 802.11n-2009 7.3.2.57
+ * element" as described in IEEE Std 802.11-2020 section 9.4.2.56.
  */
 struct ieee80211_ht_operation {
 	u8 primary_chan;
 /**
  * struct ieee80211_he_cap_elem - HE capabilities element
+ * @mac_cap_info: HE MAC Capabilities Information
+ * @phy_cap_info: HE PHY Capabilities Information
  *
- * This structure is the "HE capabilities element" fixed fields as
+ * This structure represents the fixed fields of the payload of the
- * described in P802.11ax_D4.0 section 9.4.2.242.2 and 9.4.2.242.3
+ * "HE capabilities element" as described in IEEE Std 802.11ax-2021
+ * sections 9.4.2.248.2 and 9.4.2.248.3.
  */
 struct ieee80211_he_cap_elem {
 	u8 mac_cap_info[6];
 } __packed;
 /**
- * struct ieee80211_he_operation - HE capabilities element
+ * struct ieee80211_he_operation - HE Operation element
+ * @he_oper_params: HE Operation Parameters + BSS Color Information
+ * @he_mcs_nss_set: Basic HE-MCS And NSS Set
+ * @optional: Optional fields VHT Operation Information, Max Co-Hosted
+ *            BSSID Indicator, and 6 GHz Operation Information
  *
- * This structure is the "HE operation element" fields as
+ * This structure represents the payload of the "HE Operation
- * described in P802.11ax_D4.0 section 9.4.2.243
+ * element" as described in IEEE Std 802.11ax-2021 section 9.4.2.249.
  */
 struct ieee80211_he_operation {
 	__le32 he_oper_params;
 	__le16 he_mcs_nss_set;
-	/* Optional 0,1,3,4,5,7 or 8 bytes: depends on @he_oper_params */
 	u8 optional[];
 } __packed;
 /**
- * struct ieee80211_he_spr - HE spatial reuse element
+ * struct ieee80211_he_spr - Spatial Reuse Parameter Set element
+ * @he_sr_control: SR Control
+ * @optional: Optional fields Non-SRG OBSS PD Max Offset, SRG OBSS PD
+ *            Min Offset, SRG OBSS PD Max Offset, SRG BSS Color
+ *            Bitmap, and SRG Partial BSSID Bitmap
  *
- * This structure is the "HE spatial reuse element" element as
+ * This structure represents the payload of the "Spatial Reuse
- * described in P802.11ax_D4.0 section 9.4.2.241
+ * Parameter Set element" as described in IEEE Std 802.11ax-2021
+ * section 9.4.2.252.
  */
 struct ieee80211_he_spr {
 	u8 he_sr_control;
-	/* Optional 0 to 19 bytes: depends on @he_sr_control */
 	u8 optional[];
 } __packed;
 /**
  * struct ieee80211_he_mu_edca_param_ac_rec - MU AC Parameter Record field
+ * @aifsn: ACI/AIFSN
+ * @ecw_min_max: ECWmin/ECWmax
+ * @mu_edca_timer: MU EDCA Timer
  *
- * This structure is the "MU AC Parameter Record" fields as
+ * This structure represents the "MU AC Parameter Record" as described
- * described in P802.11ax_D4.0 section 9.4.2.245
+ * in IEEE Std 802.11ax-2021 section 9.4.2.251, Figure 9-788p.
  */
 struct ieee80211_he_mu_edca_param_ac_rec {
 	u8 aifsn;
 /**
  * struct ieee80211_mu_edca_param_set - MU EDCA Parameter Set element
+ * @mu_qos_info: QoS Info
+ * @ac_be: MU AC_BE Parameter Record
+ * @ac_bk: MU AC_BK Parameter Record
+ * @ac_vi: MU AC_VI Parameter Record
+ * @ac_vo: MU AC_VO Parameter Record
  *
- * This structure is the "MU EDCA Parameter Set element" fields as
+ * This structure represents the payload of the "MU EDCA Parameter Set
- * described in P802.11ax_D4.0 section 9.4.2.245
+ * element" as described in IEEE Std 802.11ax-2021 section 9.4.2.251.
  */
 struct ieee80211_mu_edca_param_set {
 	u8 mu_qos_info;
  * enum ieee80211_ap_reg_power - regulatory power for a Access Point
  *
  * @IEEE80211_REG_UNSET_AP: Access Point has no regulatory power mode
- * @IEEE80211_REG_LPI: Indoor Access Point
+ * @IEEE80211_REG_LPI_AP: Indoor Access Point
- * @IEEE80211_REG_SP: Standard power Access Point
+ * @IEEE80211_REG_SP_AP: Standard power Access Point
- * @IEEE80211_REG_VLP: Very low power Access Point
+ * @IEEE80211_REG_VLP_AP: Very low power Access Point
  * @IEEE80211_REG_AP_POWER_AFTER_LAST: internal
  * @IEEE80211_REG_AP_POWER_MAX: maximum value
  */
 #define IEEE80211_6GHZ_CTRL_REG_SP_AP	1
 /**
- * ieee80211_he_6ghz_oper - HE 6 GHz operation Information field
+ * struct ieee80211_he_6ghz_oper - HE 6 GHz operation Information field
  * @primary: primary channel
  * @control: control flags
  * @ccfs0: channel center frequency segment 0
 };
 /**
- * struct ieee80211_tx_pwr_env
+ * struct ieee80211_tx_pwr_env - Transmit Power Envelope
+ * @tx_power_info: Transmit Power Information field
+ * @tx_power: Maximum Transmit Power field
  *
- * This structure represents the "Transmit Power Envelope element"
+ * This structure represents the payload of the "Transmit Power
+ * Envelope element" as described in IEEE Std 802.11ax-2021 section
+ * 9.4.2.161
  */
 struct ieee80211_tx_pwr_env {
 	u8 tx_power_info;
 	return (const u8 *)element == (const u8 *)data + datalen;
 }
-/**
+/*
  * RSNX Capabilities:
  * bits 0-3: Field length (n-1)
  */
 }
 /**
- * ieee80211_mle_get_eml_sync_delay - returns the medium sync delay
+ * ieee80211_mle_get_eml_med_sync_delay - returns the medium sync delay
  * @data: pointer to the multi link EHT IE
  *
  * The element is assumed to be of the correct type (BASIC) and big enough,

include/net/cfg80211.h+12−13

  * are only for driver use when pointers to this structure are
  * passed around.
  *
- * @flags: rate-specific flags
+ * @flags: rate-specific flags from &enum ieee80211_rate_flags
  * @bitrate: bitrate in units of 100 Kbps
  * @hw_value: driver/hardware value for this rate
  * @hw_value_short: driver/hardware value for this rate when
 struct cfg80211_tid_config {
 	const u8 *peer;
 	u32 n_tid_conf;
-	struct cfg80211_tid_cfg tid_conf[];
+	struct cfg80211_tid_cfg tid_conf[] __counted_by(n_tid_conf);
 };
 /**
 	struct {
 		const u8 *data;
 		size_t len;
-	} elem[];
+	} elem[] __counted_by(cnt);
 };
 /**
 	struct {
 		const u8 *data;
 		size_t len;
-	} elem[];
+	} elem[] __counted_by(cnt);
 };
 /**
 	int n_acl_entries;
 	/* Keep it last */
-	struct mac_address mac_addrs[];
+	struct mac_address mac_addrs[] __counted_by(n_acl_entries);
 };
 /**
  * @twt_responder: Enable Target Wait Time
  * @he_required: stations must support HE
  * @sae_h2e_required: stations must support direct H2E technique in SAE
- * @flags: flags, as defined in enum cfg80211_ap_settings_flags
+ * @flags: flags, as defined in &enum nl80211_ap_settings_flags
  * @he_obss_pd: OBSS Packet Detection settings
  * @he_oper: HE operation IE (or %NULL if HE isn't enabled)
  * @fils_discovery: FILS discovery transmission parameters
  * @STATION_PARAM_APPLY_UAPSD: apply new uAPSD parameters (uapsd_queues, max_sp)
  * @STATION_PARAM_APPLY_CAPABILITY: apply new capability
  * @STATION_PARAM_APPLY_PLINK_STATE: apply new plink state
- * @STATION_PARAM_APPLY_STA_TXPOWER: apply tx power for STA
  *
  * Not all station parameters have in-band "no change" signalling,
  * for those that don't these flags will are used.
  * @sn: target sequence number
  * @metric: metric (cost) of this mesh path
  * @exptime: expiration time for the mesh path from now, in msecs
- * @flags: mesh path flags
+ * @flags: mesh path flags from &enum mesh_path_flags
  * @discovery_timeout: total mesh path discovery timeout, in msecs
  * @discovery_retries: mesh path discovery retries
  * @generation: generation number for nl80211 dumps.
  *	the actual dwell time may be shorter.
  * @duration_mandatory: if set, the scan duration must be as specified by the
  *	%duration field.
- * @flags: bit field of flags controlling operation
+ * @flags: control flags from &enum nl80211_scan_flags
  * @rates: bitmap of rates to advertise for each band
  * @wiphy: the wiphy this was for
  * @scan_start: time (in jiffies) when the scan started
 	struct cfg80211_scan_6ghz_params *scan_6ghz_params;
 	/* keep last */
-	struct ieee80211_channel *channels[];
+	struct ieee80211_channel *channels[] __counted_by(n_channels);
 };
 static inline void get_random_mask_addr(u8 *buf, const u8 *addr, const u8 *mask)
  * @scan_width: channel width for scanning
  * @ie: optional information element(s) to add into Probe Request or %NULL
  * @ie_len: length of ie in octets
- * @flags: bit field of flags controlling operation
+ * @flags: control flags from &enum nl80211_scan_flags
  * @match_sets: sets of parameters to be matched for a scan result
  *	entry to be considered valid and to be passed to the host
  *	(others are filtered out).
 	struct list_head list;
-	struct cfg80211_pmsr_request_peer peers[];
+	struct cfg80211_pmsr_request_peer peers[] __counted_by(n_peers);
 };
 /**
  * @link_id: the ID of the link the frame was received	on
  * @buf: Management frame (header + body)
  * @len: length of the frame data
- * @flags: flags, as defined in enum nl80211_rxmgmt_flags
+ * @flags: flags, as defined in &enum nl80211_rxmgmt_flags
  * @rx_tstamp: Hardware timestamp of frame RX in nanoseconds
  * @ack_tstamp: Hardware timestamp of ack TX in nanoseconds
  */

include/net/ieee80211_radiotap.h+2−1

 #include <asm/unaligned.h>
 /**
- * struct ieee82011_radiotap_header - base radiotap header
+ * struct ieee80211_radiotap_header - base radiotap header
  */
 struct ieee80211_radiotap_header {
 	/**
 /**
  * ieee80211_get_radiotap_len - get radiotap header length
+ * @data: pointer to the header
  */
 static inline u16 ieee80211_get_radiotap_len(const char *data)
 {

include/net/iw_handler.h+2−9

 /**************************** PROTOTYPES ****************************/
 /*
- * Functions part of the Wireless Extensions (defined in net/core/wireless.c).
+ * Functions part of the Wireless Extensions (defined in net/wireless/wext-core.c).
- * Those may be called only within the kernel.
+ * Those may be called by driver modules.
  */
-/* First : function strictly used inside the kernel */
-/* Handle /proc/net/wireless, called in net/code/dev.c */
-int dev_get_wireless_info(char *buffer, char **start, off_t offset, int length);
-/* Second : functions that may be called by driver modules */
 /* Send a single event to user space */
 void wireless_send_event(struct net_device *dev, unsigned int cmd,
 			 union iwreq_data *wrqu, const char *extra);

include/net/mac80211.h+4−1

 			u8 ampdu_ack_len;
 			u8 ampdu_len;
 			u8 antenna;
+			u8 pad;
 			u16 tx_time;
 			u8 flags;
-			void *status_driver_data[18 / sizeof(void *)];
+			u8 pad2;
+			void *status_driver_data[16 / sizeof(void *)];
 		} status;
 		struct {
 			struct ieee80211_tx_rate driver_rates[
  * @he_cap: HE capabilities of this STA
  * @he_6ghz_capa: on 6 GHz, holds the HE 6 GHz band capabilities
  * @eht_cap: EHT capabilities of this STA
+ * @agg: per-link data for multi-link aggregation
  * @bandwidth: current bandwidth the station can receive with
  * @rx_nss: in HT/VHT, the maximum number of spatial streams the
  *	station can receive at the moment, changed by operating mode

net/mac80211/cfg.c+14−13

 	lockdep_assert_held(&local->mtx);
 	lockdep_assert_held(&local->chanctx_mtx);
-	if (sdata->vif.bss_conf.eht_puncturing != sdata->vif.bss_conf.csa_punct_bitmap) {
-		sdata->vif.bss_conf.eht_puncturing =
-					sdata->vif.bss_conf.csa_punct_bitmap;
-		changed |= BSS_CHANGED_EHT_PUNCTURING;
-	}
 	/*
 	 * using reservation isn't immediate as it may be deferred until later
 	 * with multi-vif. once reservation is complete it will re-schedule the
 	if (err)
 		return err;
+	if (sdata->vif.bss_conf.eht_puncturing != sdata->vif.bss_conf.csa_punct_bitmap) {
+		sdata->vif.bss_conf.eht_puncturing =
+					sdata->vif.bss_conf.csa_punct_bitmap;
+		changed |= BSS_CHANGED_EHT_PUNCTURING;
+	}
 	ieee80211_link_info_change_notify(sdata, &sdata->deflink, changed);
 	if (sdata->deflink.csa_block_tx) {
 	mutex_lock(&local->mtx);
 	rcu_read_lock();
+	sta = sta_info_get_bss(sdata, peer);
+	if (!sta) {
+		ret = -ENOLINK;
+		goto unlock;
+	}
+	qos = sta->sta.wme;
 	chanctx_conf = rcu_dereference(sdata->vif.bss_conf.chanctx_conf);
 	if (WARN_ON(!chanctx_conf)) {
 		ret = -EINVAL;
 		goto unlock;
 	}
 	band = chanctx_conf->def.chan->band;
-	sta = sta_info_get_bss(sdata, peer);
-	if (sta) {
-		qos = sta->sta.wme;
-	} else {
-		ret = -ENOLINK;
-		goto unlock;
-	}
 	if (qos) {
 		fc = cpu_to_le16(IEEE80211_FTYPE_DATA |

net/mac80211/fils_aead.c+1−1

  */
 #include <crypto/aes.h>
-#include <crypto/algapi.h>
 #include <crypto/hash.h>
 #include <crypto/skcipher.h>
+#include <crypto/utils.h>
 #include "ieee80211_i.h"
 #include "aes_cmac.h"

net/mac80211/ieee80211_i.h+0−2

 			   struct ieee80211_sub_if_data *sdata);
 void ieee80211_recalc_ps(struct ieee80211_local *local);
 void ieee80211_recalc_ps_vif(struct ieee80211_sub_if_data *sdata);
-int ieee80211_set_arp_filter(struct ieee80211_sub_if_data *sdata);
 void ieee80211_sta_work(struct ieee80211_sub_if_data *sdata);
 void ieee80211_sta_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
 				  struct sk_buff *skb);
 				      struct ieee80211_link_data *rsvd_for);
 bool ieee80211_is_radar_required(struct ieee80211_local *local);
-void ieee80211_dfs_cac_timer(unsigned long data);
 void ieee80211_dfs_cac_timer_work(struct work_struct *work);
 void ieee80211_dfs_cac_cancel(struct ieee80211_local *local);
 void ieee80211_dfs_radar_detected_work(struct work_struct *work);

net/mac80211/key.c+1−1

  * Copyright 2018-2020, 2022-2023  Intel Corporation
  */
+#include <crypto/utils.h>
 #include <linux/if_ether.h>
 #include <linux/etherdevice.h>
 #include <linux/list.h>
 #include <linux/slab.h>
 #include <linux/export.h>
 #include <net/mac80211.h>
-#include <crypto/algapi.h>
 #include <asm/unaligned.h>
 #include "ieee80211_i.h"
 #include "driver-ops.h"

net/mac80211/mesh.h+0−1

@@ -212,7 +212,6 @@ int mesh_rmc_check(struct ieee80211_sub_if_data *sdata, · 211 unmodified lines
212	const u8 addr, struct ieee80211s_hdr mesh_hdr);	212	const u8 addr, struct ieee80211s_hdr mesh_hdr);
213	bool mesh_matches_local(struct ieee80211_sub_if_data *sdata,	213	bool mesh_matches_local(struct ieee80211_sub_if_data *sdata,
214	struct ieee802_11_elems *ie);	214	struct ieee802_11_elems *ie);
215	void mesh_ids_set_default(struct ieee80211_if_mesh *mesh);
216	int mesh_add_meshconf_ie(struct ieee80211_sub_if_data *sdata,	215	int mesh_add_meshconf_ie(struct ieee80211_sub_if_data *sdata,
217	struct sk_buff *skb);	216	struct sk_buff *skb);
218	int mesh_add_meshid_ie(struct ieee80211_sub_if_data *sdata,	217	int mesh_add_meshid_ie(struct ieee80211_sub_if_data *sdata,

net/mac80211/rx.c+4−0

 			break;
 		goto queue;
 	case WLAN_CATEGORY_S1G:
+		if (len < offsetofend(typeof(*mgmt),
+				      u.action.u.s1g.action_code))
+			break;
 		switch (mgmt->u.action.u.s1g.action_code) {
 		case WLAN_S1G_TWT_SETUP:
 		case WLAN_S1G_TWT_TEARDOWN:

net/mac80211/wpa.c+1−1

@@ -15,7 +15,7 @@ · 14 unmodified lines
15	#include <asm/unaligned.h>	15	#include <asm/unaligned.h>
16	#include <net/mac80211.h>	16	#include <net/mac80211.h>
17	#include <crypto/aes.h>	17	#include <crypto/aes.h>
18	#include <crypto/algapi.h>	18	#include <crypto/utils.h>
19		19
20	#include "ieee80211_i.h"	20	#include "ieee80211_i.h"
21	#include "michael.h"	21	#include "michael.h"

net/wireless/core.h+1−1

@@ -298,7 +298,7 @@ struct cfg80211_cqm_config { · 297 unmodified lines
298	u32 rssi_hyst;	298	u32 rssi_hyst;
299	s32 last_rssi_event_value;	299	s32 last_rssi_event_value;
300	int n_rssi_thresholds;	300	int n_rssi_thresholds;
301	s32 rssi_thresholds[];	301	s32 rssi_thresholds[] __counted_by(n_rssi_thresholds);
302	};	302	};
303		303
304	void cfg80211_destroy_ifaces(struct cfg80211_registered_device *rdev);	304	void cfg80211_destroy_ifaces(struct cfg80211_registered_device *rdev);

net/wireless/mlme.c+13−0

 	    ether_addr_equal(req->bss->bssid, wdev->u.client.connected_addr))
 		return -EALREADY;
+	if (ether_addr_equal(req->bss->bssid, dev->dev_addr) ||
+	    (req->link_id >= 0 &&
+	     ether_addr_equal(req->ap_mld_addr, dev->dev_addr)))
+		return -EINVAL;
 	return rdev_auth(rdev, dev, req);
 }
 			if (req->links[i].bss == req->links[j].bss)
 				return -EINVAL;
 		}
+		if (ether_addr_equal(req->links[i].bss->bssid, dev->dev_addr))
+			return -EINVAL;
 	}
 	if (wdev->connected &&
 	     !ether_addr_equal(wdev->u.client.connected_addr, req->prev_bssid)))
 		return -EALREADY;
+	if ((req->bss && ether_addr_equal(req->bss->bssid, dev->dev_addr)) ||
+	    (req->link_id >= 0 &&
+	     ether_addr_equal(req->ap_mld_addr, dev->dev_addr)))
+		return -EINVAL;
 	cfg80211_oper_and_ht_capa(&req->ht_capa_mask,
 				  rdev->wiphy.ht_capa_mod_mask);
 	cfg80211_oper_and_vht_capa(&req->vht_capa_mask,

net/wireless/nl80211.c+4−4

 	[NL80211_PMSR_FTM_REQ_ATTR_TRIGGER_BASED] = { .type = NLA_FLAG },
 	[NL80211_PMSR_FTM_REQ_ATTR_NON_TRIGGER_BASED] = { .type = NLA_FLAG },
 	[NL80211_PMSR_FTM_REQ_ATTR_LMR_FEEDBACK] = { .type = NLA_FLAG },
+	[NL80211_PMSR_FTM_REQ_ATTR_BSS_COLOR] = { .type = NLA_U8 },
 };
 static const struct nla_policy
 	acl = kzalloc(struct_size(acl, mac_addrs, n_entries), GFP_KERNEL);
 	if (!acl)
 		return ERR_PTR(-ENOMEM);
+	acl->n_acl_entries = n_entries;
 	nla_for_each_nested(attr, info->attrs[NL80211_ATTR_MAC_ADDRS], tmp) {
 		memcpy(acl->mac_addrs[i].addr, nla_data(attr), ETH_ALEN);
 		i++;
 	}
-	acl->n_acl_entries = n_entries;
 	acl->acl_policy = acl_policy;
 	return acl;
 	elems = kzalloc(struct_size(elems, elem, num_elems), GFP_KERNEL);
 	if (!elems)
 		return ERR_PTR(-ENOMEM);
+	elems->cnt = num_elems;
 	nla_for_each_nested(nl_elems, attrs, rem_elems) {
 		elems->elem[i].data = nla_data(nl_elems);
 		elems->elem[i].len = nla_len(nl_elems);
 		i++;
 	}
-	elems->cnt = num_elems;
 	return elems;
 }
 	elems = kzalloc(struct_size(elems, elem, num_elems), GFP_KERNEL);
 	if (!elems)
 		return ERR_PTR(-ENOMEM);
+	elems->cnt = num_elems;
 	nla_for_each_nested(nl_elems, attrs, rem_elems) {
 		elems->elem[i].data = nla_data(nl_elems);
 		elems->elem[i].len = nla_len(nl_elems);
 		i++;
 	}
-	elems->cnt = num_elems;
 	return elems;
 }

net/wireless/nl80211.h+0−1

@@ -120,6 +120,5 @@ void cfg80211_rdev_free_coalesce(struct cfg80211_registered_device *rdev); · 119 unmodified lines
120		120
121	/* peer measurement */	121	/* peer measurement */
122	int nl80211_pmsr_start(struct sk_buff skb, struct genl_info info);	122	int nl80211_pmsr_start(struct sk_buff skb, struct genl_info info);
123	int nl80211_pmsr_dump_results(struct sk_buff skb, struct netlink_callback cb);
124		123
125	#endif /* __NET_WIRELESS_NL80211_H */	124	#endif /* __NET_WIRELESS_NL80211_H */

net/wireless/ocb.c+3−0

@@ -68,6 +68,9 @@ int __cfg80211_leave_ocb(struct cfg80211_registered_device *rdev, · 67 unmodified lines
68	if (!rdev->ops->leave_ocb)	68	if (!rdev->ops->leave_ocb)
69	return -EOPNOTSUPP;	69	return -EOPNOTSUPP;
70		70
		71	if (!wdev->u.ocb.chandef.chan)
		72	return -ENOTCONN;
		73
71	err = rdev_leave_ocb(rdev, dev);	74	err = rdev_leave_ocb(rdev, dev);
72	if (!err)	75	if (!err)
73	memset(&wdev->u.ocb.chandef, 0, sizeof(wdev->u.ocb.chandef));	76	memset(&wdev->u.ocb.chandef, 0, sizeof(wdev->u.ocb.chandef));

net/wireless/pmsr.c+1−2

 	req = kzalloc(struct_size(req, peers, count), GFP_KERNEL);
 	if (!req)
 		return -ENOMEM;
+	req->n_peers = count;
 	if (info->attrs[NL80211_ATTR_TIMEOUT])
 		req->timeout = nla_get_u32(info->attrs[NL80211_ATTR_TIMEOUT]);
 			goto out_err;
 		idx++;
 	}
-	req->n_peers = count;
 	req->cookie = cfg80211_assign_cookie(rdev);
 	req->nl_portid = info->snd_portid;

Merge tag 'wireless-next-2023-08-25' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next

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@@ -3854,9 +3854,9 @@ enum wmi_pdev_param { · 3853 unmodified lines
3854	* retransmitting frames.	3854	* retransmitting frames.
3855	*/	3855	*/
3856	WMI_PDEV_PARAM_DYNAMIC_BW,	3856	WMI_PDEV_PARAM_DYNAMIC_BW,
3857	/* Non aggregrate/ 11g sw retry threshold.0-disable */	3857	/* Non aggregate/ 11g sw retry threshold.0-disable */
3858	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,	3858	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3859	/* aggregrate sw retry threshold. 0-disable*/	3859	/* aggregate sw retry threshold. 0-disable*/
3860	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,	3860	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3861	/* Station kickout threshold (non of consecutive failures).0-disable */	3861	/* Station kickout threshold (non of consecutive failures).0-disable */
3862	WMI_PDEV_PARAM_STA_KICKOUT_TH,	3862	WMI_PDEV_PARAM_STA_KICKOUT_TH,
@@ -3953,9 +3953,9 @@ enum wmi_10x_pdev_param { · 90 unmodified lines
3953	WMI_10X_PDEV_PARAM_PROTECTION_MODE,	3953	WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3954	/* Dynamic bandwidth 0: disable 1: enable */	3954	/* Dynamic bandwidth 0: disable 1: enable */
3955	WMI_10X_PDEV_PARAM_DYNAMIC_BW,	3955	WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3956	/* Non aggregrate/ 11g sw retry threshold.0-disable */	3956	/* Non aggregate/ 11g sw retry threshold.0-disable */
3957	WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,	3957	WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3958	/* aggregrate sw retry threshold. 0-disable*/	3958	/* aggregate sw retry threshold. 0-disable*/
3959	WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,	3959	WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3960	/* Station kickout threshold (non of consecutive failures).0-disable */	3960	/* Station kickout threshold (non of consecutive failures).0-disable */
3961	WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,	3961	WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,

@@ -10,7 +10,7 @@ · 9 unmodified lines
10	* Copyright (c) 2007 Kalle Valo <kalle.valo@iki.fi>	10	* Copyright (c) 2007 Kalle Valo <kalle.valo@iki.fi>
11	* Copyright (c) 2010 Sebastian Smolorz <sesmo@gmx.net>	11	* Copyright (c) 2010 Sebastian Smolorz <sesmo@gmx.net>
12	*	12	*
13	* This file is part of the Berlios driver for WLAN USB devices based on the	13	* This file is part of the Berlios driver for USB WLAN devices based on the
14	* Atmel AT76C503A/505/505A.	14	* Atmel AT76C503A/505/505A.
15	*	15	*
16	* Some iw_handler code was taken from airo.c, (C) 1999 Benjamin Reed	16	* Some iw_handler code was taken from airo.c, (C) 1999 Benjamin Reed
@@ -143,7 +143,7 @@ static const struct usb_device_id dev_table[] = { · 126 unmodified lines
143	{ USB_DEVICE(0x0cde, 0x0001), USB_DEVICE_DATA(BOARD_503_ISL3861) },	143	{ USB_DEVICE(0x0cde, 0x0001), USB_DEVICE_DATA(BOARD_503_ISL3861) },
144	/* Dynalink/Askey WLL013 (intersil) */	144	/* Dynalink/Askey WLL013 (intersil) */
145	{ USB_DEVICE(0x069a, 0x0320), USB_DEVICE_DATA(BOARD_503_ISL3861) },	145	{ USB_DEVICE(0x069a, 0x0320), USB_DEVICE_DATA(BOARD_503_ISL3861) },
146	/* EZ connect 11Mpbs Wireless USB Adapter SMC2662W v1 */	146	/* EZ connect 11Mpbs USB Wireless Adapter SMC2662W v1 */
147	{ USB_DEVICE(0x0d5c, 0xa001), USB_DEVICE_DATA(BOARD_503_ISL3861) },	147	{ USB_DEVICE(0x0d5c, 0xa001), USB_DEVICE_DATA(BOARD_503_ISL3861) },
148	/* BenQ AWL300 */	148	/* BenQ AWL300 */
149	{ USB_DEVICE(0x04a5, 0x9000), USB_DEVICE_DATA(BOARD_503_ISL3861) },	149	{ USB_DEVICE(0x04a5, 0x9000), USB_DEVICE_DATA(BOARD_503_ISL3861) },
@@ -195,7 +195,7 @@ static const struct usb_device_id dev_table[] = { · 45 unmodified lines
195	{ USB_DEVICE(0x04a5, 0x9001), USB_DEVICE_DATA(BOARD_503) },	195	{ USB_DEVICE(0x04a5, 0x9001), USB_DEVICE_DATA(BOARD_503) },
196	/* 3Com 3CRSHEW696 */	196	/* 3Com 3CRSHEW696 */
197	{ USB_DEVICE(0x0506, 0x0a01), USB_DEVICE_DATA(BOARD_503) },	197	{ USB_DEVICE(0x0506, 0x0a01), USB_DEVICE_DATA(BOARD_503) },
198	/* Siemens Santis ADSL WLAN USB adapter WLL 013 */	198	/* Siemens Santis ADSL USB WLAN adapter WLL 013 */
199	{ USB_DEVICE(0x0681, 0x001b), USB_DEVICE_DATA(BOARD_503) },	199	{ USB_DEVICE(0x0681, 0x001b), USB_DEVICE_DATA(BOARD_503) },
200	/* Belkin F5D6050, version 2 */	200	/* Belkin F5D6050, version 2 */
201	{ USB_DEVICE(0x050d, 0x0050), USB_DEVICE_DATA(BOARD_503) },	201	{ USB_DEVICE(0x050d, 0x0050), USB_DEVICE_DATA(BOARD_503) },
@@ -238,7 +238,7 @@ static const struct usb_device_id dev_table[] = { · 36 unmodified lines
238	{ USB_DEVICE(0x1915, 0x2233), USB_DEVICE_DATA(BOARD_505_2958) },	238	{ USB_DEVICE(0x1915, 0x2233), USB_DEVICE_DATA(BOARD_505_2958) },
239	/* Xterasys XN-2122B, IBlitzz BWU613B/BWU613SB */	239	/* Xterasys XN-2122B, IBlitzz BWU613B/BWU613SB */
240	{ USB_DEVICE(0x12fd, 0x1001), USB_DEVICE_DATA(BOARD_505_2958) },	240	{ USB_DEVICE(0x12fd, 0x1001), USB_DEVICE_DATA(BOARD_505_2958) },
241	/* Corega WLAN USB Stick 11 */	241	/* Corega USB WLAN Stick 11 */
242	{ USB_DEVICE(0x07aa, 0x7613), USB_DEVICE_DATA(BOARD_505_2958) },	242	{ USB_DEVICE(0x07aa, 0x7613), USB_DEVICE_DATA(BOARD_505_2958) },
243	/* Microstar MSI Box MS6978 */	243	/* Microstar MSI Box MS6978 */
244	{ USB_DEVICE(0x0db0, 0x1020), USB_DEVICE_DATA(BOARD_505_2958) },	244	{ USB_DEVICE(0x0db0, 0x1020), USB_DEVICE_DATA(BOARD_505_2958) },

@@ -129,18 +129,18 @@ MODULE_FIRMWARE("orinoco_ezusb_fw"); · 128 unmodified lines
129		129
130	#define USB_AVAYA8_VENDOR_ID 0x0D98	130	#define USB_AVAYA8_VENDOR_ID 0x0D98
131	#define USB_AVAYAE_VENDOR_ID 0x0D9E	131	#define USB_AVAYAE_VENDOR_ID 0x0D9E
132	#define USB_AVAYA_WIRELESS_ID 0x0300 /* Avaya Wireless USB Card */	132	#define USB_AVAYA_WIRELESS_ID 0x0300 /* Avaya USB Wireless Card */
133		133
134	#define USB_AGERE_VENDOR_ID 0x0D4E /* Agere Systems */	134	#define USB_AGERE_VENDOR_ID 0x0D4E /* Agere Systems */
135	#define USB_AGERE_MODEL0801_ID 0x1000 /* Wireless USB Card Model 0801 */	135	#define USB_AGERE_MODEL0801_ID 0x1000 /* USB Wireless Card Model 0801 */
136	#define USB_AGERE_MODEL0802_ID 0x1001 /* Wireless USB Card Model 0802 */	136	#define USB_AGERE_MODEL0802_ID 0x1001 /* USB Wireless Card Model 0802 */
137	#define USB_AGERE_REBRANDED_ID 0x047A /* WLAN USB Card */	137	#define USB_AGERE_REBRANDED_ID 0x047A /* USB WLAN Card */
138		138
139	#define USB_ELSA_VENDOR_ID 0x05CC	139	#define USB_ELSA_VENDOR_ID 0x05CC
140	#define USB_ELSA_AIRLANCER_ID 0x3100 /* ELSA AirLancer USB-11 */	140	#define USB_ELSA_AIRLANCER_ID 0x3100 /* ELSA AirLancer USB-11 */
141		141
142	#define USB_LEGEND_VENDOR_ID 0x0E7C	142	#define USB_LEGEND_VENDOR_ID 0x0E7C
143	#define USB_LEGEND_JOYNET_ID 0x0300 /* Joynet WLAN USB Card */	143	#define USB_LEGEND_JOYNET_ID 0x0300 /* Joynet USB WLAN Card */
144		144
145	#define USB_SAMSUNG_VENDOR_ID 0x04E8	145	#define USB_SAMSUNG_VENDOR_ID 0x04E8
146	#define USB_SAMSUNG_SEW2001U1_ID 0x5002 /* Samsung SEW-2001u Card */	146	#define USB_SAMSUNG_SEW2001U1_ID 0x5002 /* Samsung SEW-2001u Card */
@@ -154,7 +154,7 @@ MODULE_FIRMWARE("orinoco_ezusb_fw"); · 7 unmodified lines
154	#define USB_FUJITSU_E1100_ID 0x1002 /* connect2AIR WLAN E-1100 USB */	154	#define USB_FUJITSU_E1100_ID 0x1002 /* connect2AIR WLAN E-1100 USB */
155		155
156	#define USB_2WIRE_VENDOR_ID 0x1630	156	#define USB_2WIRE_VENDOR_ID 0x1630
157	#define USB_2WIRE_WIRELESS_ID 0xff81 /* 2Wire Wireless USB adapter */	157	#define USB_2WIRE_WIRELESS_ID 0xff81 /* 2Wire USB Wireless adapter */
158		158
159		159
160	#define EZUSB_REQUEST_FW_TRANS 0xA0	160	#define EZUSB_REQUEST_FW_TRANS 0xA0

@@ -11,45 +11,45 @@ · 10 unmodified lines
11		11
12	static const struct usb_device_id usb_prism_tbl[] = {	12	static const struct usb_device_id usb_prism_tbl[] = {
13	PRISM_DEV(0x04bb, 0x0922, "IOData AirPort WN-B11/USBS"),	13	PRISM_DEV(0x04bb, 0x0922, "IOData AirPort WN-B11/USBS"),
14	PRISM_DEV(0x07aa, 0x0012, "Corega Wireless LAN USB Stick-11"),	14	PRISM_DEV(0x07aa, 0x0012, "Corega USB Wireless LAN Stick-11"),
15	PRISM_DEV(0x09aa, 0x3642, "Prism2.x 11Mbps WLAN USB Adapter"),	15	PRISM_DEV(0x09aa, 0x3642, "Prism2.x 11Mbps USB WLAN Adapter"),
16	PRISM_DEV(0x1668, 0x0408, "Actiontec Prism2.5 11Mbps WLAN USB Adapter"),	16	PRISM_DEV(0x1668, 0x0408, "Actiontec Prism2.5 11Mbps USB WLAN Adapter"),
17	PRISM_DEV(0x1668, 0x0421, "Actiontec Prism2.5 11Mbps WLAN USB Adapter"),	17	PRISM_DEV(0x1668, 0x0421, "Actiontec Prism2.5 11Mbps USB WLAN Adapter"),
18	PRISM_DEV(0x1915, 0x2236, "Linksys WUSB11v3.0 11Mbps WLAN USB Adapter"),	18	PRISM_DEV(0x1915, 0x2236, "Linksys WUSB11v3.0 11Mbps USB WLAN Adapter"),
19	PRISM_DEV(0x066b, 0x2212, "Linksys WUSB11v2.5 11Mbps WLAN USB Adapter"),	19	PRISM_DEV(0x066b, 0x2212, "Linksys WUSB11v2.5 11Mbps USB WLAN Adapter"),
20	PRISM_DEV(0x066b, 0x2213, "Linksys WUSB12v1.1 11Mbps WLAN USB Adapter"),	20	PRISM_DEV(0x066b, 0x2213, "Linksys WUSB12v1.1 11Mbps USB WLAN Adapter"),
21	PRISM_DEV(0x0411, 0x0016, "Melco WLI-USB-S11 11Mbps WLAN Adapter"),	21	PRISM_DEV(0x0411, 0x0016, "Melco WLI-USB-S11 11Mbps WLAN Adapter"),
22	PRISM_DEV(0x08de, 0x7a01, "PRISM25 IEEE 802.11 Mini USB Adapter"),	22	PRISM_DEV(0x08de, 0x7a01, "PRISM25 USB IEEE 802.11 Mini Adapter"),
23	PRISM_DEV(0x8086, 0x1111, "Intel PRO/Wireless 2011B LAN USB Adapter"),	23	PRISM_DEV(0x8086, 0x1111, "Intel PRO/Wireless 2011B USB LAN Adapter"),
24	PRISM_DEV(0x0d8e, 0x7a01, "PRISM25 IEEE 802.11 Mini USB Adapter"),	24	PRISM_DEV(0x0d8e, 0x7a01, "PRISM25 IEEE 802.11 Mini USB Adapter"),
25	PRISM_DEV(0x045e, 0x006e, "Microsoft MN510 Wireless USB Adapter"),	25	PRISM_DEV(0x045e, 0x006e, "Microsoft MN510 USB Wireless Adapter"),
26	PRISM_DEV(0x0967, 0x0204, "Acer Warplink USB Adapter"),	26	PRISM_DEV(0x0967, 0x0204, "Acer Warplink USB Adapter"),
27	PRISM_DEV(0x0cde, 0x0002, "Z-Com 725/726 Prism2.5 USB/USB Integrated"),	27	PRISM_DEV(0x0cde, 0x0002, "Z-Com 725/726 Prism2.5 USB/USB Integrated"),
28	PRISM_DEV(0x0cde, 0x0005, "Z-Com Xl735 Wireless 802.11b USB Adapter"),	28	PRISM_DEV(0x0cde, 0x0005, "Z-Com Xl735 USB Wireless 802.11b Adapter"),
29	PRISM_DEV(0x413c, 0x8100, "Dell TrueMobile 1180 Wireless USB Adapter"),	29	PRISM_DEV(0x413c, 0x8100, "Dell TrueMobile 1180 USB Wireless Adapter"),
30	PRISM_DEV(0x0b3b, 0x1601, "ALLNET 0193 11Mbps WLAN USB Adapter"),	30	PRISM_DEV(0x0b3b, 0x1601, "ALLNET 0193 11Mbps USB WLAN Adapter"),
31	PRISM_DEV(0x0b3b, 0x1602, "ZyXEL ZyAIR B200 Wireless USB Adapter"),	31	PRISM_DEV(0x0b3b, 0x1602, "ZyXEL ZyAIR B200 USB Wireless Adapter"),
32	PRISM_DEV(0x0baf, 0x00eb, "USRobotics USR1120 Wireless USB Adapter"),	32	PRISM_DEV(0x0baf, 0x00eb, "USRobotics USR1120 USB Wireless Adapter"),
33	PRISM_DEV(0x0411, 0x0027, "Melco WLI-USB-KS11G 11Mbps WLAN Adapter"),	33	PRISM_DEV(0x0411, 0x0027, "Melco WLI-USB-KS11G 11Mbps WLAN Adapter"),
34	PRISM_DEV(0x04f1, 0x3009, "JVC MP-XP7250 Builtin USB WLAN Adapter"),	34	PRISM_DEV(0x04f1, 0x3009, "JVC MP-XP7250 Builtin USB WLAN Adapter"),
35	PRISM_DEV(0x0846, 0x4110, "NetGear MA111"),	35	PRISM_DEV(0x0846, 0x4110, "NetGear MA111"),
36	PRISM_DEV(0x03f3, 0x0020, "Adaptec AWN-8020 USB WLAN Adapter"),	36	PRISM_DEV(0x03f3, 0x0020, "Adaptec AWN-8020 USB WLAN Adapter"),
37	PRISM_DEV(0x2821, 0x3300, "ASUS-WL140 / Hawking HighDB Wireless USB Adapter"),	37	PRISM_DEV(0x2821, 0x3300, "ASUS-WL140 / Hawking HighDB USB Wireless Adapter"),
38	PRISM_DEV(0x2001, 0x3700, "DWL-122 Wireless USB Adapter"),	38	PRISM_DEV(0x2001, 0x3700, "DWL-122 USB Wireless Adapter"),
39	PRISM_DEV(0x2001, 0x3702, "DWL-120 Rev F Wireless USB Adapter"),	39	PRISM_DEV(0x2001, 0x3702, "DWL-120 Rev F USB Wireless Adapter"),
40	PRISM_DEV(0x50c2, 0x4013, "Averatec USB WLAN Adapter"),	40	PRISM_DEV(0x50c2, 0x4013, "Averatec USB WLAN Adapter"),
41	PRISM_DEV(0x2c02, 0x14ea, "Planex GW-US11H WLAN USB Adapter"),	41	PRISM_DEV(0x2c02, 0x14ea, "Planex GW-US11H USB WLAN Adapter"),
42	PRISM_DEV(0x124a, 0x168b, "Airvast PRISM3 WLAN USB Adapter"),	42	PRISM_DEV(0x124a, 0x168b, "Airvast PRISM3 USB WLAN Adapter"),
43	PRISM_DEV(0x083a, 0x3503, "T-Sinus 111 USB WLAN Adapter"),	43	PRISM_DEV(0x083a, 0x3503, "T-Sinus 111 USB WLAN Adapter"),
44	PRISM_DEV(0x0411, 0x0044, "Melco WLI-USB-KB11 11Mbps WLAN Adapter"),	44	PRISM_DEV(0x0411, 0x0044, "Melco WLI-USB-KB11 11Mbps WLAN Adapter"),
45	PRISM_DEV(0x1668, 0x6106, "ROPEX FreeLan 802.11b USB Adapter"),	45	PRISM_DEV(0x1668, 0x6106, "ROPEX FreeLan USB 802.11b Adapter"),
46	PRISM_DEV(0x124a, 0x4017, "Pheenet WL-503IA 802.11b USB Adapter"),	46	PRISM_DEV(0x124a, 0x4017, "Pheenet WL-503IA USB 802.11b Adapter"),
47	PRISM_DEV(0x0bb2, 0x0302, "Ambit Microsystems Corp."),	47	PRISM_DEV(0x0bb2, 0x0302, "Ambit Microsystems Corp."),
48	PRISM_DEV(0x9016, 0x182d, "Sitecom WL-022 802.11b USB Adapter"),	48	PRISM_DEV(0x9016, 0x182d, "Sitecom WL-022 USB 802.11b Adapter"),
49	PRISM_DEV(0x0543, 0x0f01,	49	PRISM_DEV(0x0543, 0x0f01,
50	"ViewSonic Airsync USB Adapter 11Mbps (Prism2.5)"),	50	"ViewSonic Airsync USB Adapter 11Mbps (Prism2.5)"),
51	PRISM_DEV(0x067c, 0x1022,	51	PRISM_DEV(0x067c, 0x1022,
52	"Siemens SpeedStream 1022 11Mbps WLAN USB Adapter"),	52	"Siemens SpeedStream 1022 11Mbps USB WLAN Adapter"),
53	PRISM_DEV(0x049f, 0x0033,	53	PRISM_DEV(0x049f, 0x0033,
54	"Compaq/Intel W100 PRO/Wireless 11Mbps multiport WLAN Adapter"),	54	"Compaq/Intel W100 PRO/Wireless 11Mbps multiport WLAN Adapter"),
55	{ } /* terminator */	55	{ } /* terminator */