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Merge tag 'drm-misc-next-2018-05-15' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for v4.18: UAPI Changes: - Fix render node number regression from control node removal. Driver Changes: - Small header fix for virgl, used by qemu. - Use vm_fault_t in qxl. Signed-off-by: Dave Airlie <airlied@redhat.com> # gpg: Signature made Tue 15 May 2018 06:16:03 PM AEST # gpg: using RSA key FE558C72A67013C3 # gpg: Can't check signature: public key not found Link: https://patchwork.freedesktop.org/patch/msgid/e63306b9-67a0-74ab-8883-08b3d9db72d2@mblankhorst.nl

Dave Airlie committed 8 years ago

Commit 2045b222 parents c76f0b2 68266f190 files · +4605 −699Browse files

Showing the changes to include/uapi (5 of 90 files). Show all

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5 files
  1. include/uapi/drm/drm.h +7 −0
  2. include/uapi/drm/drm_mode.h +6 −0
  3. include/uapi/drm/v3d_drm.h +194 −0
  4. include/uapi/drm/vc4_drm.h +10 −3
  5. include/uapi/linux/virtio_gpu.h +1 −0
include/uapi/drm/drm.h+7−0
@@ -680,6 +680,13 @@ struct drm_get_cap { · 679 unmodified lines
680680 */
681681 #define DRM_CLIENT_CAP_ATOMIC 3
682682
683+/**
684+ * DRM_CLIENT_CAP_ASPECT_RATIO
685+ *
686+ * If set to 1, the DRM core will provide aspect ratio information in modes.
687+ */
688+#define DRM_CLIENT_CAP_ASPECT_RATIO 4
689+
683690 /** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
684691 struct drm_set_client_cap {
685692 __u64 capability;
include/uapi/drm/drm_mode.h+6−0
@@ -93,6 +93,8 @@ extern "C" { · 92 unmodified lines
9393 #define DRM_MODE_PICTURE_ASPECT_NONE 0
9494 #define DRM_MODE_PICTURE_ASPECT_4_3 1
9595 #define DRM_MODE_PICTURE_ASPECT_16_9 2
96+#define DRM_MODE_PICTURE_ASPECT_64_27 3
97+#define DRM_MODE_PICTURE_ASPECT_256_135 4
9698
9799 /* Aspect ratio flag bitmask (4 bits 22:19) */
98100 #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F<<19)
@@ -102,6 +104,10 @@ extern "C" { · 3 unmodified lines
102104 (DRM_MODE_PICTURE_ASPECT_4_3<<19)
103105 #define DRM_MODE_FLAG_PIC_AR_16_9 \
104106 (DRM_MODE_PICTURE_ASPECT_16_9<<19)
107+#define DRM_MODE_FLAG_PIC_AR_64_27 \
108+ (DRM_MODE_PICTURE_ASPECT_64_27<<19)
109+#define DRM_MODE_FLAG_PIC_AR_256_135 \
110+ (DRM_MODE_PICTURE_ASPECT_256_135<<19)
105111
106112 #define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | \
107113 DRM_MODE_FLAG_NHSYNC | \
include/uapi/drm/v3d_drm.h+194−0
@@ -0,0 +1,194 @@
1+/*
2+ * Copyright © 2014-2018 Broadcom
3+ *
4+ * Permission is hereby granted, free of charge, to any person obtaining a
5+ * copy of this software and associated documentation files (the "Software"),
6+ * to deal in the Software without restriction, including without limitation
7+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8+ * and/or sell copies of the Software, and to permit persons to whom the
9+ * Software is furnished to do so, subject to the following conditions:
10+ *
11+ * The above copyright notice and this permission notice (including the next
12+ * paragraph) shall be included in all copies or substantial portions of the
13+ * Software.
14+ *
15+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21+ * IN THE SOFTWARE.
22+ */
23+
24+#ifndef _V3D_DRM_H_
25+#define _V3D_DRM_H_
26+
27+#include "drm.h"
28+
29+#if defined(__cplusplus)
30+extern "C" {
31+#endif
32+
33+#define DRM_V3D_SUBMIT_CL 0x00
34+#define DRM_V3D_WAIT_BO 0x01
35+#define DRM_V3D_CREATE_BO 0x02
36+#define DRM_V3D_MMAP_BO 0x03
37+#define DRM_V3D_GET_PARAM 0x04
38+#define DRM_V3D_GET_BO_OFFSET 0x05
39+
40+#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
41+#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
42+#define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
43+#define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)
44+#define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
45+#define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
46+
47+/**
48+ * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D
49+ * engine.
50+ *
51+ * This asks the kernel to have the GPU execute an optional binner
52+ * command list, and a render command list.
53+ */
54+struct drm_v3d_submit_cl {
55+ /* Pointer to the binner command list.
56+ *
57+ * This is the first set of commands executed, which runs the
58+ * coordinate shader to determine where primitives land on the screen,
59+ * then writes out the state updates and draw calls necessary per tile
60+ * to the tile allocation BO.
61+ */
62+ __u32 bcl_start;
63+
64+ /** End address of the BCL (first byte after the BCL) */
65+ __u32 bcl_end;
66+
67+ /* Offset of the render command list.
68+ *
69+ * This is the second set of commands executed, which will either
70+ * execute the tiles that have been set up by the BCL, or a fixed set
71+ * of tiles (in the case of RCL-only blits).
72+ */
73+ __u32 rcl_start;
74+
75+ /** End address of the RCL (first byte after the RCL) */
76+ __u32 rcl_end;
77+
78+ /** An optional sync object to wait on before starting the BCL. */
79+ __u32 in_sync_bcl;
80+ /** An optional sync object to wait on before starting the RCL. */
81+ __u32 in_sync_rcl;
82+ /** An optional sync object to place the completion fence in. */
83+ __u32 out_sync;
84+
85+ /* Offset of the tile alloc memory
86+ *
87+ * This is optional on V3D 3.3 (where the CL can set the value) but
88+ * required on V3D 4.1.
89+ */
90+ __u32 qma;
91+
92+ /** Size of the tile alloc memory. */
93+ __u32 qms;
94+
95+ /** Offset of the tile state data array. */
96+ __u32 qts;
97+
98+ /* Pointer to a u32 array of the BOs that are referenced by the job.
99+ */
100+ __u64 bo_handles;
101+
102+ /* Number of BO handles passed in (size is that times 4). */
103+ __u32 bo_handle_count;
104+
105+ /* Pad, must be zero-filled. */
106+ __u32 pad;
107+};
108+
109+/**
110+ * struct drm_v3d_wait_bo - ioctl argument for waiting for
111+ * completion of the last DRM_V3D_SUBMIT_CL on a BO.
112+ *
113+ * This is useful for cases where multiple processes might be
114+ * rendering to a BO and you want to wait for all rendering to be
115+ * completed.
116+ */
117+struct drm_v3d_wait_bo {
118+ __u32 handle;
119+ __u32 pad;
120+ __u64 timeout_ns;
121+};
122+
123+/**
124+ * struct drm_v3d_create_bo - ioctl argument for creating V3D BOs.
125+ *
126+ * There are currently no values for the flags argument, but it may be
127+ * used in a future extension.
128+ */
129+struct drm_v3d_create_bo {
130+ __u32 size;
131+ __u32 flags;
132+ /** Returned GEM handle for the BO. */
133+ __u32 handle;
134+ /**
135+ * Returned offset for the BO in the V3D address space. This offset
136+ * is private to the DRM fd and is valid for the lifetime of the GEM
137+ * handle.
138+ *
139+ * This offset value will always be nonzero, since various HW
140+ * units treat 0 specially.
141+ */
142+ __u32 offset;
143+};
144+
145+/**
146+ * struct drm_v3d_mmap_bo - ioctl argument for mapping V3D BOs.
147+ *
148+ * This doesn't actually perform an mmap. Instead, it returns the
149+ * offset you need to use in an mmap on the DRM device node. This
150+ * means that tools like valgrind end up knowing about the mapped
151+ * memory.
152+ *
153+ * There are currently no values for the flags argument, but it may be
154+ * used in a future extension.
155+ */
156+struct drm_v3d_mmap_bo {
157+ /** Handle for the object being mapped. */
158+ __u32 handle;
159+ __u32 flags;
160+ /** offset into the drm node to use for subsequent mmap call. */
161+ __u64 offset;
162+};
163+
164+enum drm_v3d_param {
165+ DRM_V3D_PARAM_V3D_UIFCFG,
166+ DRM_V3D_PARAM_V3D_HUB_IDENT1,
167+ DRM_V3D_PARAM_V3D_HUB_IDENT2,
168+ DRM_V3D_PARAM_V3D_HUB_IDENT3,
169+ DRM_V3D_PARAM_V3D_CORE0_IDENT0,
170+ DRM_V3D_PARAM_V3D_CORE0_IDENT1,
171+ DRM_V3D_PARAM_V3D_CORE0_IDENT2,
172+};
173+
174+struct drm_v3d_get_param {
175+ __u32 param;
176+ __u32 pad;
177+ __u64 value;
178+};
179+
180+/**
181+ * Returns the offset for the BO in the V3D address space for this DRM fd.
182+ * This is the same value returned by drm_v3d_create_bo, if that was called
183+ * from this DRM fd.
184+ */
185+struct drm_v3d_get_bo_offset {
186+ __u32 handle;
187+ __u32 offset;
188+};
189+
190+#if defined(__cplusplus)
191+}
192+#endif
193+
194+#endif /* _V3D_DRM_H_ */
include/uapi/drm/vc4_drm.h+10−3
@@ -183,10 +183,17 @@ struct drm_vc4_submit_cl { · 182 unmodified lines
183183 /* ID of the perfmon to attach to this job. 0 means no perfmon. */
184184 __u32 perfmonid;
185185
186− /* Unused field to align this struct on 64 bits. Must be set to 0.
187− * If one ever needs to add an u32 field to this struct, this field
188− * can be used.
186+ /* Syncobj handle to wait on. If set, processing of this render job
187+ * will not start until the syncobj is signaled. 0 means ignore.
189188 */
189+ __u32 in_sync;
190+
191+ /* Syncobj handle to export fence to. If set, the fence in the syncobj
192+ * will be replaced with a fence that signals upon completion of this
193+ * render job. 0 means ignore.
194+ */
195+ __u32 out_sync;
196+
190197 __u32 pad2;
191198 };
192199
include/uapi/linux/virtio_gpu.h+1−0
@@ -260,6 +260,7 @@ struct virtio_gpu_cmd_submit { · 259 unmodified lines
260260 };
261261
262262 #define VIRTIO_GPU_CAPSET_VIRGL 1
263+#define VIRTIO_GPU_CAPSET_VIRGL2 2
263264
264265 /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
265266 struct virtio_gpu_get_capset_info {

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