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arm/arm64: KVM: Rename irq_state to irq_pending

The irq_state field on the distributor struct is ambiguous in its meaning; the comment says it's the level of the input put, but that doesn't make much sense for edge-triggered interrupts. The code actually uses this state variable to check if the interrupt is in the pending state on the distributor so clarify the comment and rename the actual variable and accessor methods.

Christoffer Dall committed 12 years ago

Commit 227844f1 parent a875daf2 files · +28 −28Browse files

Unified · Split

2 files
  1. include/kvm/arm_vgic.h +2 −2
  2. virt/kvm/arm/vgic.c +26 −26
include/kvm/arm_vgic.h+2−2
@@ -140,8 +140,8 @@ struct vgic_dist { · 139 unmodified lines
140140 /* Interrupt enabled (one bit per IRQ) */
141141 struct vgic_bitmap irq_enabled;
142142
143− /* Interrupt 'pin' level */
144− struct vgic_bitmap irq_state;
143+ /* Interrupt state is pending on the distributor */
144+ struct vgic_bitmap irq_pending;
145145
146146 /* Level-triggered interrupt in progress */
147147 struct vgic_bitmap irq_active;
virt/kvm/arm/vgic.c+26−26
@@ -37,7 +37,7 @@ · 36 unmodified lines
3737 *
3838 * - At any time, the dist->irq_pending_on_cpu is the oracle that knows if
3939 * something is pending
40− * - VGIC pending interrupts are stored on the vgic.irq_state vgic
40+ * - VGIC pending interrupts are stored on the vgic.irq_pending vgic
4141 * bitmap (this bitmap is updated by both user land ioctls and guest
4242 * mmio ops, and other in-kernel peripherals such as the
4343 * arch. timers) and indicate the 'wire' state.
@@ -45,8 +45,8 @@ · 1 unmodified line
4545 * recalculated
4646 * - To calculate the oracle, we need info for each cpu from
4747 * compute_pending_for_cpu, which considers:
48− * - PPI: dist->irq_state & dist->irq_enable
49− * - SPI: dist->irq_state & dist->irq_enable & dist->irq_spi_target
48+ * - PPI: dist->irq_pending & dist->irq_enable
49+ * - SPI: dist->irq_pending & dist->irq_enable & dist->irq_spi_target
5050 * - irq_spi_target is a 'formatted' version of the GICD_ICFGR
5151 * registers, stored on each vcpu. We only keep one bit of
5252 * information per interrupt, making sure that only one vcpu can
@@ -221,21 +221,21 @@ static int vgic_dist_irq_is_pending(struct kvm_vcpu *vcpu, int irq) · 168 unmodified lines
221221 {
222222 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
223223
224− return vgic_bitmap_get_irq_val(&dist->irq_state, vcpu->vcpu_id, irq);
224+ return vgic_bitmap_get_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq);
225225 }
226226
227−static void vgic_dist_irq_set(struct kvm_vcpu *vcpu, int irq)
227+static void vgic_dist_irq_set_pending(struct kvm_vcpu *vcpu, int irq)
228228 {
229229 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
230230
231− vgic_bitmap_set_irq_val(&dist->irq_state, vcpu->vcpu_id, irq, 1);
231+ vgic_bitmap_set_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq, 1);
232232 }
233233
234−static void vgic_dist_irq_clear(struct kvm_vcpu *vcpu, int irq)
234+static void vgic_dist_irq_clear_pending(struct kvm_vcpu *vcpu, int irq)
235235 {
236236 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
237237
238− vgic_bitmap_set_irq_val(&dist->irq_state, vcpu->vcpu_id, irq, 0);
238+ vgic_bitmap_set_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq, 0);
239239 }
240240
241241 static void vgic_cpu_irq_set(struct kvm_vcpu *vcpu, int irq)
@@ -409,7 +409,7 @@ static bool handle_mmio_set_pending_reg(struct kvm_vcpu *vcpu, · 167 unmodified lines
409409 struct kvm_exit_mmio *mmio,
410410 phys_addr_t offset)
411411 {
412− u32 *reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_state,
412+ u32 *reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_pending,
413413 vcpu->vcpu_id, offset);
414414 vgic_reg_access(mmio, reg, offset,
415415 ACCESS_READ_VALUE | ACCESS_WRITE_SETBIT);
@@ -425,7 +425,7 @@ static bool handle_mmio_clear_pending_reg(struct kvm_vcpu *vcpu, · 9 unmodified lines
425425 struct kvm_exit_mmio *mmio,
426426 phys_addr_t offset)
427427 {
428− u32 *reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_state,
428+ u32 *reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_pending,
429429 vcpu->vcpu_id, offset);
430430 vgic_reg_access(mmio, reg, offset,
431431 ACCESS_READ_VALUE | ACCESS_WRITE_CLEARBIT);
@@ -651,7 +651,7 @@ static void vgic_unqueue_irqs(struct kvm_vcpu *vcpu) · 219 unmodified lines
651651 * is fine, then we are only setting a few bits that were
652652 * already set.
653653 */
654− vgic_dist_irq_set(vcpu, lr.irq);
654+ vgic_dist_irq_set_pending(vcpu, lr.irq);
655655 if (lr.irq < VGIC_NR_SGIS)
656656 dist->irq_sgi_sources[vcpu_id][lr.irq] |= 1 << lr.source;
657657 lr.state &= ~LR_STATE_PENDING;
@@ -932,7 +932,7 @@ static void vgic_dispatch_sgi(struct kvm_vcpu *vcpu, u32 reg) · 274 unmodified lines
932932 kvm_for_each_vcpu(c, vcpu, kvm) {
933933 if (target_cpus & 1) {
934934 /* Flag the SGI as pending */
935− vgic_dist_irq_set(vcpu, sgi);
935+ vgic_dist_irq_set_pending(vcpu, sgi);
936936 dist->irq_sgi_sources[c][sgi] |= 1 << vcpu_id;
937937 kvm_debug("SGI%d from CPU%d to CPU%d\n", sgi, vcpu_id, c);
938938 }
@@ -952,11 +952,11 @@ static int compute_pending_for_cpu(struct kvm_vcpu *vcpu) · 13 unmodified lines
952952 pend_percpu = vcpu->arch.vgic_cpu.pending_percpu;
953953 pend_shared = vcpu->arch.vgic_cpu.pending_shared;
954954
955− pending = vgic_bitmap_get_cpu_map(&dist->irq_state, vcpu_id);
955+ pending = vgic_bitmap_get_cpu_map(&dist->irq_pending, vcpu_id);
956956 enabled = vgic_bitmap_get_cpu_map(&dist->irq_enabled, vcpu_id);
957957 bitmap_and(pend_percpu, pending, enabled, VGIC_NR_PRIVATE_IRQS);
958958
959− pending = vgic_bitmap_get_shared_map(&dist->irq_state);
959+ pending = vgic_bitmap_get_shared_map(&dist->irq_pending);
960960 enabled = vgic_bitmap_get_shared_map(&dist->irq_enabled);
961961 bitmap_and(pend_shared, pending, enabled, VGIC_NR_SHARED_IRQS);
962962 bitmap_and(pend_shared, pend_shared,
@@ -1160,7 +1160,7 @@ static bool vgic_queue_sgi(struct kvm_vcpu *vcpu, int irq) · 197 unmodified lines
11601160 * our emulated gic and can get rid of them.
11611161 */
11621162 if (!sources) {
1163− vgic_dist_irq_clear(vcpu, irq);
1163+ vgic_dist_irq_clear_pending(vcpu, irq);
11641164 vgic_cpu_irq_clear(vcpu, irq);
11651165 return true;
11661166 }
@@ -1175,7 +1175,7 @@ static bool vgic_queue_hwirq(struct kvm_vcpu *vcpu, int irq) · 8 unmodified lines
11751175
11761176 if (vgic_queue_irq(vcpu, 0, irq)) {
11771177 if (vgic_irq_is_edge(vcpu, irq)) {
1178− vgic_dist_irq_clear(vcpu, irq);
1178+ vgic_dist_irq_clear_pending(vcpu, irq);
11791179 vgic_cpu_irq_clear(vcpu, irq);
11801180 } else {
11811181 vgic_irq_set_active(vcpu, irq);
@@ -1376,7 +1376,7 @@ static void vgic_kick_vcpus(struct kvm *kvm) · 194 unmodified lines
13761376
13771377 static int vgic_validate_injection(struct kvm_vcpu *vcpu, int irq, int level)
13781378 {
1379− int is_edge = vgic_irq_is_edge(vcpu, irq);
1379+ int edge_triggered = vgic_irq_is_edge(vcpu, irq);
13801380 int state = vgic_dist_irq_is_pending(vcpu, irq);
13811381
13821382 /*
@@ -1384,26 +1384,26 @@ static int vgic_validate_injection(struct kvm_vcpu *vcpu, int irq, int level) · 1 unmodified line
13841384 * - edge triggered and we have a rising edge
13851385 * - level triggered and we change level
13861386 */
1387− if (is_edge)
1387+ if (edge_triggered)
13881388 return level > state;
13891389 else
13901390 return level != state;
13911391 }
13921392
1393−static bool vgic_update_irq_state(struct kvm *kvm, int cpuid,
1393+static bool vgic_update_irq_pending(struct kvm *kvm, int cpuid,
13941394 unsigned int irq_num, bool level)
13951395 {
13961396 struct vgic_dist *dist = &kvm->arch.vgic;
13971397 struct kvm_vcpu *vcpu;
1398− int is_edge, is_level;
1398+ int edge_triggered, level_triggered;
13991399 int enabled;
14001400 bool ret = true;
14011401
14021402 spin_lock(&dist->lock);
14031403
14041404 vcpu = kvm_get_vcpu(kvm, cpuid);
1405− is_edge = vgic_irq_is_edge(vcpu, irq_num);
1406− is_level = !is_edge;
1405+ edge_triggered = vgic_irq_is_edge(vcpu, irq_num);
1406+ level_triggered = !edge_triggered;
14071407
14081408 if (!vgic_validate_injection(vcpu, irq_num, level)) {
14091409 ret = false;
@@ -1418,9 +1418,9 @@ static bool vgic_update_irq_state(struct kvm *kvm, int cpuid, · 8 unmodified lines
14181418 kvm_debug("Inject IRQ%d level %d CPU%d\n", irq_num, level, cpuid);
14191419
14201420 if (level)
1421− vgic_dist_irq_set(vcpu, irq_num);
1421+ vgic_dist_irq_set_pending(vcpu, irq_num);
14221422 else
1423− vgic_dist_irq_clear(vcpu, irq_num);
1423+ vgic_dist_irq_clear_pending(vcpu, irq_num);
14241424
14251425 enabled = vgic_irq_is_enabled(vcpu, irq_num);
14261426
@@ -1429,7 +1429,7 @@ static bool vgic_update_irq_state(struct kvm *kvm, int cpuid, · 2 unmodified lines
14291429 goto out;
14301430 }
14311431
1432− if (is_level && vgic_irq_is_active(vcpu, irq_num)) {
1432+ if (level_triggered && vgic_irq_is_active(vcpu, irq_num)) {
14331433 /*
14341434 * Level interrupt in progress, will be picked up
14351435 * when EOId.
@@ -1466,7 +1466,7 @@ out: · 30 unmodified lines
14661466 int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int irq_num,
14671467 bool level)
14681468 {
1469− if (vgic_update_irq_state(kvm, cpuid, irq_num, level))
1469+ if (vgic_update_irq_pending(kvm, cpuid, irq_num, level))
14701470 vgic_kick_vcpus(kvm);
14711471
14721472 return 0;