Sync with Linus tree to have 157550ff ("mtd: add GPMI-NAND driver in the config and Makefile") as I have patch depending on that one.
Unified · Split
| @@ -0,0 +1,22 @@ | ||
| 1 | +What: /sys/firmware/acpi/pm_profile | |
| 2 | +Date: 03-Nov-2011 | |
| 3 | +KernelVersion: v3.2 | |
| 4 | +Contact: linux-acpi@vger.kernel.org | |
| 5 | +Description: The ACPI pm_profile sysfs interface exports the platform | |
| 6 | + power management (and performance) requirement expectations | |
| 7 | + as provided by BIOS. The integer value is directly passed as | |
| 8 | + retrieved from the FADT ACPI table. | |
| 9 | +Values: For possible values see ACPI specification: | |
| 10 | + 5.2.9 Fixed ACPI Description Table (FADT) | |
| 11 | + Field: Preferred_PM_Profile | |
| 12 | + | |
| 13 | + Currently these values are defined by spec: | |
| 14 | + 0 Unspecified | |
| 15 | + 1 Desktop | |
| 16 | + 2 Mobile | |
| 17 | + 3 Workstation | |
| 18 | + 4 Enterprise Server | |
| 19 | + 5 SOHO Server | |
| 20 | + 6 Appliance PC | |
| 21 | + 7 Performance Server | |
| 22 | + >7 Reserved | |
| @@ -0,0 +1,19 @@ | ||
| 1 | +What: /sys/kernel/debug/ideapad/cfg | |
| 2 | +Date: Sep 2011 | |
| 3 | +KernelVersion: 3.2 | |
| 4 | +Contact: Ike Panhc <ike.pan@canonical.com> | |
| 5 | +Description: | |
| 6 | + | |
| 7 | +cfg shows the return value of _CFG method in VPC2004 device. It tells machine | |
| 8 | +capability and what graphic component within the machine. | |
| 9 | + | |
| 10 | + | |
| 11 | +What: /sys/kernel/debug/ideapad/status | |
| 12 | +Date: Sep 2011 | |
| 13 | +KernelVersion: 3.2 | |
| 14 | +Contact: Ike Panhc <ike.pan@canonical.com> | |
| 15 | +Description: | |
| 16 | + | |
| 17 | +status shows infos we can read and tells its meaning and value. | |
| 18 | + | |
| 19 | + | |
| @@ -206,3 +206,16 @@ Description: · 205 unmodified lines | ||
| 206 | 206 | when a discarded area is read the discard_zeroes_data |
| 207 | 207 | parameter will be set to one. Otherwise it will be 0 and |
| 208 | 208 | the result of reading a discarded area is undefined. |
| 209 | +What: /sys/block/<disk>/alias | |
| 210 | +Date: Aug 2011 | |
| 211 | +Contact: Nao Nishijima <nao.nishijima.xt@hitachi.com> | |
| 212 | +Description: | |
| 213 | + A raw device name of a disk does not always point a same disk | |
| 214 | + each boot-up time. Therefore, users have to use persistent | |
| 215 | + device names, which udev creates when the kernel finds a disk, | |
| 216 | + instead of raw device name. However, kernel doesn't show those | |
| 217 | + persistent names on its messages (e.g. dmesg). | |
| 218 | + This file can store an alias of the disk and it would be | |
| 219 | + appeared in kernel messages if it is set. A disk can have an | |
| 220 | + alias which length is up to 255bytes. Users can use alphabets, | |
| 221 | + numbers, "-" and "_" in alias name. This file is writeonce. | |
| @@ -71,3 +71,10 @@ Description: Value of 1 indicates the controller can honor the reset_devices · 70 unmodified lines | ||
| 71 | 71 | a dump device, as kdump requires resetting the device in order |
| 72 | 72 | to work reliably. |
| 73 | 73 | |
| 74 | +Where: /sys/bus/pci/devices/<dev>/ccissX/transport_mode | |
| 75 | +Date: July 2011 | |
| 76 | +Kernel Version: 3.0 | |
| 77 | +Contact: iss_storagedev@hp.com | |
| 78 | +Description: Value of "simple" indicates that the controller has been placed | |
| 79 | + in "simple mode". Value of "performant" indicates that the | |
| 80 | + controller has been placed in "performant mode". | |
| @@ -0,0 +1,46 @@ | ||
| 1 | +What: /sys/bus/pci/drivers/ehci_hcd/.../companion | |
| 2 | + /sys/bus/usb/devices/usbN/../companion | |
| 3 | +Date: January 2007 | |
| 4 | +KernelVersion: 2.6.21 | |
| 5 | +Contact: Alan Stern <stern@rowland.harvard.edu> | |
| 6 | +Description: | |
| 7 | + PCI-based EHCI USB controllers (i.e., high-speed USB-2.0 | |
| 8 | + controllers) are often implemented along with a set of | |
| 9 | + "companion" full/low-speed USB-1.1 controllers. When a | |
| 10 | + high-speed device is plugged in, the connection is routed | |
| 11 | + to the EHCI controller; when a full- or low-speed device | |
| 12 | + is plugged in, the connection is routed to the companion | |
| 13 | + controller. | |
| 14 | + | |
| 15 | + Sometimes you want to force a high-speed device to connect | |
| 16 | + at full speed, which can be accomplished by forcing the | |
| 17 | + connection to be routed to the companion controller. | |
| 18 | + That's what this file does. Writing a port number to the | |
| 19 | + file causes connections on that port to be routed to the | |
| 20 | + companion controller, and writing the negative of a port | |
| 21 | + number returns the port to normal operation. | |
| 22 | + | |
| 23 | + For example: To force the high-speed device attached to | |
| 24 | + port 4 on bus 2 to run at full speed: | |
| 25 | + | |
| 26 | + echo 4 >/sys/bus/usb/devices/usb2/../companion | |
| 27 | + | |
| 28 | + To return the port to high-speed operation: | |
| 29 | + | |
| 30 | + echo -4 >/sys/bus/usb/devices/usb2/../companion | |
| 31 | + | |
| 32 | + Reading the file gives the list of ports currently forced | |
| 33 | + to the companion controller. | |
| 34 | + | |
| 35 | + Note: Some EHCI controllers do not have companions; they | |
| 36 | + may contain an internal "transaction translator" or they | |
| 37 | + may be attached directly to a "rate-matching hub". This | |
| 38 | + mechanism will not work with such controllers. Also, it | |
| 39 | + cannot be used to force a port on a high-speed hub to | |
| 40 | + connect at full speed. | |
| 41 | + | |
| 42 | + Note: When this file was first added, it appeared in a | |
| 43 | + different sysfs directory. The location given above is | |
| 44 | + correct for 2.6.35 (and probably several earlier kernel | |
| 45 | + versions as well). | |
| 46 | + | |
| @@ -142,3 +142,18 @@ Description: · 141 unmodified lines | ||
| 142 | 142 | such devices. |
| 143 | 143 | Users: |
| 144 | 144 | usb_modeswitch |
| 145 | + | |
| 146 | +What: /sys/bus/usb/devices/.../power/usb2_hardware_lpm | |
| 147 | +Date: September 2011 | |
| 148 | +Contact: Andiry Xu <andiry.xu@amd.com> | |
| 149 | +Description: | |
| 150 | + If CONFIG_USB_SUSPEND is set and a USB 2.0 lpm-capable device | |
| 151 | + is plugged in to a xHCI host which support link PM, it will | |
| 152 | + perform a LPM test; if the test is passed and host supports | |
| 153 | + USB2 hardware LPM (xHCI 1.0 feature), USB2 hardware LPM will | |
| 154 | + be enabled for the device and the USB device directory will | |
| 155 | + contain a file named power/usb2_hardware_lpm. The file holds | |
| 156 | + a string value (enable or disable) indicating whether or not | |
| 157 | + USB2 hardware LPM is enabled for the device. Developer can | |
| 158 | + write y/Y/1 or n/N/0 to the file to enable/disable the | |
| 159 | + feature. | |
| @@ -0,0 +1,52 @@ | ||
| 1 | +What: /sys/class/devfreq/.../ | |
| 2 | +Date: September 2011 | |
| 3 | +Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | |
| 4 | +Description: | |
| 5 | + Provide a place in sysfs for the devfreq objects. | |
| 6 | + This allows accessing various devfreq specific variables. | |
| 7 | + The name of devfreq object denoted as ... is same as the | |
| 8 | + name of device using devfreq. | |
| 9 | + | |
| 10 | +What: /sys/class/devfreq/.../governor | |
| 11 | +Date: September 2011 | |
| 12 | +Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | |
| 13 | +Description: | |
| 14 | + The /sys/class/devfreq/.../governor shows the name of the | |
| 15 | + governor used by the corresponding devfreq object. | |
| 16 | + | |
| 17 | +What: /sys/class/devfreq/.../cur_freq | |
| 18 | +Date: September 2011 | |
| 19 | +Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | |
| 20 | +Description: | |
| 21 | + The /sys/class/devfreq/.../cur_freq shows the current | |
| 22 | + frequency of the corresponding devfreq object. | |
| 23 | + | |
| 24 | +What: /sys/class/devfreq/.../central_polling | |
| 25 | +Date: September 2011 | |
| 26 | +Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | |
| 27 | +Description: | |
| 28 | + The /sys/class/devfreq/.../central_polling shows whether | |
| 29 | + the devfreq ojbect is using devfreq-provided central | |
| 30 | + polling mechanism or not. | |
| 31 | + | |
| 32 | +What: /sys/class/devfreq/.../polling_interval | |
| 33 | +Date: September 2011 | |
| 34 | +Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | |
| 35 | +Description: | |
| 36 | + The /sys/class/devfreq/.../polling_interval shows and sets | |
| 37 | + the requested polling interval of the corresponding devfreq | |
| 38 | + object. The values are represented in ms. If the value is | |
| 39 | + less than 1 jiffy, it is considered to be 0, which means | |
| 40 | + no polling. This value is meaningless if the governor is | |
| 41 | + not polling; thus. If the governor is not using | |
| 42 | + devfreq-provided central polling | |
| 43 | + (/sys/class/devfreq/.../central_polling is 0), this value | |
| 44 | + may be useless. | |
| 45 | + | |
| 46 | +What: /sys/class/devfreq/.../userspace/set_freq | |
| 47 | +Date: September 2011 | |
| 48 | +Contact: MyungJoo Ham <myungjoo.ham@samsung.com> | |
| 49 | +Description: | |
| 50 | + The /sys/class/devfreq/.../userspace/set_freq shows and | |
| 51 | + sets the requested frequency for the devfreq object if | |
| 52 | + userspace governor is in effect. | |
| @@ -22,6 +22,14 @@ Description: · 21 unmodified lines | ||
| 22 | 22 | mesh will be fragmented or silently discarded if the |
| 23 | 23 | packet size exceeds the outgoing interface MTU. |
| 24 | 24 | |
| 25 | +What: /sys/class/net/<mesh_iface>/mesh/ap_isolation | |
| 26 | +Date: May 2011 | |
| 27 | +Contact: Antonio Quartulli <ordex@autistici.org> | |
| 28 | +Description: | |
| 29 | + Indicates whether the data traffic going from a | |
| 30 | + wireless client to another wireless client will be | |
| 31 | + silently dropped. | |
| 32 | + | |
| 25 | 33 | What: /sys/class/net/<mesh_iface>/mesh/gw_bandwidth |
| 26 | 34 | Date: October 2010 |
| 27 | 35 | Contact: Marek Lindner <lindner_marek@yahoo.de> |
| @@ -0,0 +1,72 @@ | ||
| 1 | +What: /sys/class/hidraw/hidraw*/device/speed | |
| 2 | +Date: April 2010 | |
| 3 | +Kernel Version: 2.6.35 | |
| 4 | +Contact: linux-bluetooth@vger.kernel.org | |
| 5 | +Description: | |
| 6 | + The /sys/class/hidraw/hidraw*/device/speed file controls | |
| 7 | + reporting speed of Wacom bluetooth tablet. Reading from | |
| 8 | + this file returns 1 if tablet reports in high speed mode | |
| 9 | + or 0 otherwise. Writing to this file one of these values | |
| 10 | + switches reporting speed. | |
| 11 | + | |
| 12 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/led | |
| 13 | +Date: August 2011 | |
| 14 | +Contact: linux-input@vger.kernel.org | |
| 15 | +Description: | |
| 16 | + Attribute group for control of the status LEDs and the OLEDs. | |
| 17 | + This attribute group is only available for Intuos 4 M, L, | |
| 18 | + and XL (with LEDs and OLEDs) and Cintiq 21UX2 (LEDs only). | |
| 19 | + Therefore its presence implicitly signifies the presence of | |
| 20 | + said LEDs and OLEDs on the tablet device. | |
| 21 | + | |
| 22 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status0_luminance | |
| 23 | +Date: August 2011 | |
| 24 | +Contact: linux-input@vger.kernel.org | |
| 25 | +Description: | |
| 26 | + Writing to this file sets the status LED luminance (1..127) | |
| 27 | + when the stylus does not touch the tablet surface, and no | |
| 28 | + button is pressed on the stylus. This luminance level is | |
| 29 | + normally lower than the level when a button is pressed. | |
| 30 | + | |
| 31 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status1_luminance | |
| 32 | +Date: August 2011 | |
| 33 | +Contact: linux-input@vger.kernel.org | |
| 34 | +Description: | |
| 35 | + Writing to this file sets the status LED luminance (1..127) | |
| 36 | + when the stylus touches the tablet surface, or any button is | |
| 37 | + pressed on the stylus. | |
| 38 | + | |
| 39 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led0_select | |
| 40 | +Date: August 2011 | |
| 41 | +Contact: linux-input@vger.kernel.org | |
| 42 | +Description: | |
| 43 | + Writing to this file sets which one of the four (for Intuos 4) | |
| 44 | + or of the right four (for Cintiq 21UX2) status LEDs is active (0..3). | |
| 45 | + The other three LEDs on the same side are always inactive. | |
| 46 | + | |
| 47 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led1_select | |
| 48 | +Date: September 2011 | |
| 49 | +Contact: linux-input@vger.kernel.org | |
| 50 | +Description: | |
| 51 | + Writing to this file sets which one of the left four (for Cintiq 21UX2) | |
| 52 | + status LEDs is active (0..3). The other three LEDs on the left are always | |
| 53 | + inactive. | |
| 54 | + | |
| 55 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/buttons_luminance | |
| 56 | +Date: August 2011 | |
| 57 | +Contact: linux-input@vger.kernel.org | |
| 58 | +Description: | |
| 59 | + Writing to this file sets the overall luminance level (0..15) | |
| 60 | + of all eight button OLED displays. | |
| 61 | + | |
| 62 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/button<n>_rawimg | |
| 63 | +Date: August 2011 | |
| 64 | +Contact: linux-input@vger.kernel.org | |
| 65 | +Description: | |
| 66 | + When writing a 1024 byte raw image in Wacom Intuos 4 | |
| 67 | + interleaving format to the file, the image shows up on Button N | |
| 68 | + of the device. The image is a 64x32 pixel 4-bit gray image. The | |
| 69 | + 1024 byte binary is split up into 16x 64 byte chunks. Each 64 | |
| 70 | + byte chunk encodes the image data for two consecutive lines on | |
| 71 | + the display. The low nibble of each byte contains the first | |
| 72 | + line, and the high nibble contains the second line. | |
| @@ -5,19 +5,4 @@ Contact: "Ike Panhc <ike.pan@canonical.com>" · 4 unmodified lines | ||
| 5 | 5 | Description: |
| 6 | 6 | Control the power of camera module. 1 means on, 0 means off. |
| 7 | 7 | |
| 8 | −What: /sys/devices/platform/ideapad/cfg | |
| 9 | −Date: Jun 2011 | |
| 10 | −KernelVersion: 3.1 | |
| 11 | −Contact: "Ike Panhc <ike.pan@canonical.com>" | |
| 12 | −Description: | |
| 13 | − Ideapad capability bits. | |
| 14 | − Bit 8-10: 1 - Intel graphic only | |
| 15 | − 2 - ATI graphic only | |
| 16 | − 3 - Nvidia graphic only | |
| 17 | − 4 - Intel and ATI graphic | |
| 18 | − 5 - Intel and Nvidia graphic | |
| 19 | − Bit 16: Bluetooth exist (1 for exist) | |
| 20 | − Bit 17: 3G exist (1 for exist) | |
| 21 | − Bit 18: Wifi exist (1 for exist) | |
| 22 | − Bit 19: Camera exist (1 for exist) | |
| 23 | 8 | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −What: /sys/class/hidraw/hidraw*/device/speed | |
| 2 | −Date: April 2010 | |
| 3 | −Kernel Version: 2.6.35 | |
| 4 | −Contact: linux-bluetooth@vger.kernel.org | |
| 5 | −Description: | |
| 6 | − The /sys/class/hidraw/hidraw*/device/speed file controls | |
| 7 | − reporting speed of wacom bluetooth tablet. Reading from | |
| 8 | − this file returns 1 if tablet reports in high speed mode | |
| 9 | − or 0 otherwise. Writing to this file one of these values | |
| 10 | − switches reporting speed. | |
| @@ -166,8 +166,8 @@ if (condition) · 165 unmodified lines | ||
| 166 | 166 | else |
| 167 | 167 | do_that(); |
| 168 | 168 | |
| 169 | −This does not apply if one branch of a conditional statement is a single | |
| 170 | −statement. Use braces in both branches. | |
| 169 | +This does not apply if only one branch of a conditional statement is a single | |
| 170 | +statement; in the latter case use braces in both branches: | |
| 171 | 171 | |
| 172 | 172 | if (condition) { |
| 173 | 173 | do_this(); |
| @@ -50,6 +50,13 @@ specify the GFP_ flags (see kmalloc) for the allocation (the · 49 unmodified lines | ||
| 50 | 50 | implementation may choose to ignore flags that affect the location of |
| 51 | 51 | the returned memory, like GFP_DMA). |
| 52 | 52 | |
| 53 | +void * | |
| 54 | +dma_zalloc_coherent(struct device *dev, size_t size, | |
| 55 | + dma_addr_t *dma_handle, gfp_t flag) | |
| 56 | + | |
| 57 | +Wraps dma_alloc_coherent() and also zeroes the returned memory if the | |
| 58 | +allocation attempt succeeded. | |
| 59 | + | |
| 53 | 60 | void |
| 54 | 61 | dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, |
| 55 | 62 | dma_addr_t dma_handle) |
| @@ -433,8 +433,18 @@ · 432 unmodified lines | ||
| 433 | 433 | Insert notes about VLAN interfaces with hw crypto here or |
| 434 | 434 | in the hw crypto chapter. |
| 435 | 435 | </para> |
| 436 | + <section id="ps-client"> | |
| 437 | + <title>support for powersaving clients</title> | |
| 438 | +!Pinclude/net/mac80211.h AP support for powersaving clients | |
| 439 | + </section> | |
| 436 | 440 | !Finclude/net/mac80211.h ieee80211_get_buffered_bc |
| 437 | 441 | !Finclude/net/mac80211.h ieee80211_beacon_get |
| 442 | +!Finclude/net/mac80211.h ieee80211_sta_eosp_irqsafe | |
| 443 | +!Finclude/net/mac80211.h ieee80211_frame_release_type | |
| 444 | +!Finclude/net/mac80211.h ieee80211_sta_ps_transition | |
| 445 | +!Finclude/net/mac80211.h ieee80211_sta_ps_transition_ni | |
| 446 | +!Finclude/net/mac80211.h ieee80211_sta_set_buffered | |
| 447 | +!Finclude/net/mac80211.h ieee80211_sta_block_awake | |
| 438 | 448 | </chapter> |
| 439 | 449 | |
| 440 | 450 | <chapter id="multi-iface"> |
| @@ -460,7 +470,6 @@ · 19 unmodified lines | ||
| 460 | 470 | !Finclude/net/mac80211.h sta_notify_cmd |
| 461 | 471 | !Finclude/net/mac80211.h ieee80211_find_sta |
| 462 | 472 | !Finclude/net/mac80211.h ieee80211_find_sta_by_ifaddr |
| 463 | −!Finclude/net/mac80211.h ieee80211_sta_block_awake | |
| 464 | 473 | </chapter> |
| 465 | 474 | |
| 466 | 475 | <chapter id="hardware-scan-offload"> |
| @@ -32,7 +32,7 @@ · 31 unmodified lines | ||
| 32 | 32 | The Linux DRM layer contains code intended to support the needs |
| 33 | 33 | of complex graphics devices, usually containing programmable |
| 34 | 34 | pipelines well suited to 3D graphics acceleration. Graphics |
| 35 | − drivers in the kernel can make use of DRM functions to make | |
| 35 | + drivers in the kernel may make use of DRM functions to make | |
| 36 | 36 | tasks like memory management, interrupt handling and DMA easier, |
| 37 | 37 | and provide a uniform interface to applications. |
| 38 | 38 | </para> |
| @@ -57,10 +57,10 @@ · 18 unmodified lines | ||
| 57 | 57 | existing drivers. |
| 58 | 58 | </para> |
| 59 | 59 | <para> |
| 60 | − First, we'll go over some typical driver initialization | |
| 60 | + First, we go over some typical driver initialization | |
| 61 | 61 | requirements, like setting up command buffers, creating an |
| 62 | 62 | initial output configuration, and initializing core services. |
| 63 | − Subsequent sections will cover core internals in more detail, | |
| 63 | + Subsequent sections cover core internals in more detail, | |
| 64 | 64 | providing implementation notes and examples. |
| 65 | 65 | </para> |
| 66 | 66 | <para> |
| @@ -74,7 +74,7 @@ · 7 unmodified lines | ||
| 74 | 74 | </para> |
| 75 | 75 | <para> |
| 76 | 76 | The core of every DRM driver is struct drm_driver. Drivers |
| 77 | − will typically statically initialize a drm_driver structure, | |
| 77 | + typically statically initialize a drm_driver structure, | |
| 78 | 78 | then pass it to drm_init() at load time. |
| 79 | 79 | </para> |
| 80 | 80 | |
| @@ -88,8 +88,8 @@ · 7 unmodified lines | ||
| 88 | 88 | </para> |
| 89 | 89 | <programlisting> |
| 90 | 90 | static struct drm_driver driver = { |
| 91 | − /* don't use mtrr's here, the Xserver or user space app should | |
| 92 | − * deal with them for intel hardware. | |
| 91 | + /* Don't use MTRRs here; the Xserver or userspace app should | |
| 92 | + * deal with them for Intel hardware. | |
| 93 | 93 | */ |
| 94 | 94 | .driver_features = |
| 95 | 95 | DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | |
| @@ -154,8 +154,8 @@ · 58 unmodified lines | ||
| 154 | 154 | </programlisting> |
| 155 | 155 | <para> |
| 156 | 156 | In the example above, taken from the i915 DRM driver, the driver |
| 157 | − sets several flags indicating what core features it supports. | |
| 158 | − We'll go over the individual callbacks in later sections. Since | |
| 157 | + sets several flags indicating what core features it supports; | |
| 158 | + we go over the individual callbacks in later sections. Since | |
| 159 | 159 | flags indicate which features your driver supports to the DRM |
| 160 | 160 | core, you need to set most of them prior to calling drm_init(). Some, |
| 161 | 161 | like DRIVER_MODESET can be set later based on user supplied parameters, |
| @@ -203,8 +203,8 @@ · 41 unmodified lines | ||
| 203 | 203 | <term>DRIVER_HAVE_IRQ</term><term>DRIVER_IRQ_SHARED</term> |
| 204 | 204 | <listitem> |
| 205 | 205 | <para> |
| 206 | − DRIVER_HAVE_IRQ indicates whether the driver has a IRQ | |
| 207 | − handler, DRIVER_IRQ_SHARED indicates whether the device & | |
| 206 | + DRIVER_HAVE_IRQ indicates whether the driver has an IRQ | |
| 207 | + handler. DRIVER_IRQ_SHARED indicates whether the device & | |
| 208 | 208 | handler support shared IRQs (note that this is required of |
| 209 | 209 | PCI drivers). |
| 210 | 210 | </para> |
| @@ -214,8 +214,8 @@ · 3 unmodified lines | ||
| 214 | 214 | <term>DRIVER_DMA_QUEUE</term> |
| 215 | 215 | <listitem> |
| 216 | 216 | <para> |
| 217 | − If the driver queues DMA requests and completes them | |
| 218 | − asynchronously, this flag should be set. Deprecated. | |
| 217 | + Should be set if the driver queues DMA requests and completes them | |
| 218 | + asynchronously. Deprecated. | |
| 219 | 219 | </para> |
| 220 | 220 | </listitem> |
| 221 | 221 | </varlistentry> |
| @@ -238,7 +238,7 @@ · 16 unmodified lines | ||
| 238 | 238 | </variablelist> |
| 239 | 239 | <para> |
| 240 | 240 | In this specific case, the driver requires AGP and supports |
| 241 | − IRQs. DMA, as we'll see, is handled by device specific ioctls | |
| 241 | + IRQs. DMA, as discussed later, is handled by device-specific ioctls | |
| 242 | 242 | in this case. It also supports the kernel mode setting APIs, though |
| 243 | 243 | unlike in the actual i915 driver source, this example unconditionally |
| 244 | 244 | exports KMS capability. |
| @@ -269,36 +269,34 @@ · 24 unmodified lines | ||
| 269 | 269 | initial output configuration. |
| 270 | 270 | </para> |
| 271 | 271 | <para> |
| 272 | − Note that the tasks performed at driver load time must not | |
| 273 | − conflict with DRM client requirements. For instance, if user | |
| 272 | + If compatibility is a concern (e.g. with drivers converted over | |
| 273 | + to the new interfaces from the old ones), care must be taken to | |
| 274 | + prevent device initialization and control that is incompatible with | |
| 275 | + currently active userspace drivers. For instance, if user | |
| 274 | 276 | level mode setting drivers are in use, it would be problematic |
| 275 | 277 | to perform output discovery & configuration at load time. |
| 276 | − Likewise, if pre-memory management aware user level drivers are | |
| 278 | + Likewise, if user-level drivers unaware of memory management are | |
| 277 | 279 | in use, memory management and command buffer setup may need to |
| 278 | − be omitted. These requirements are driver specific, and care | |
| 280 | + be omitted. These requirements are driver-specific, and care | |
| 279 | 281 | needs to be taken to keep both old and new applications and |
| 280 | 282 | libraries working. The i915 driver supports the "modeset" |
| 281 | 283 | module parameter to control whether advanced features are |
| 282 | − enabled at load time or in legacy fashion. If compatibility is | |
| 283 | − a concern (e.g. with drivers converted over to the new interfaces | |
| 284 | − from the old ones), care must be taken to prevent incompatible | |
| 285 | − device initialization and control with the currently active | |
| 286 | − userspace drivers. | |
| 284 | + enabled at load time or in legacy fashion. | |
| 287 | 285 | </para> |
| 288 | 286 | |
| 289 | 287 | <sect2> |
| 290 | 288 | <title>Driver private & performance counters</title> |
| 291 | 289 | <para> |
| 292 | 290 | The driver private hangs off the main drm_device structure and |
| 293 | − can be used for tracking various device specific bits of | |
| 291 | + can be used for tracking various device-specific bits of | |
| 294 | 292 | information, like register offsets, command buffer status, |
| 295 | 293 | register state for suspend/resume, etc. At load time, a |
| 296 | − driver can simply allocate one and set drm_device.dev_priv | |
| 297 | − appropriately; at unload the driver can free it and set | |
| 298 | − drm_device.dev_priv to NULL. | |
| 294 | + driver may simply allocate one and set drm_device.dev_priv | |
| 295 | + appropriately; it should be freed and drm_device.dev_priv set | |
| 296 | + to NULL when the driver is unloaded. | |
| 299 | 297 | </para> |
| 300 | 298 | <para> |
| 301 | − The DRM supports several counters which can be used for rough | |
| 299 | + The DRM supports several counters which may be used for rough | |
| 302 | 300 | performance characterization. Note that the DRM stat counter |
| 303 | 301 | system is not often used by applications, and supporting |
| 304 | 302 | additional counters is completely optional. |
| @@ -307,15 +305,15 @@ · 2 unmodified lines | ||
| 307 | 305 | These interfaces are deprecated and should not be used. If performance |
| 308 | 306 | monitoring is desired, the developer should investigate and |
| 309 | 307 | potentially enhance the kernel perf and tracing infrastructure to export |
| 310 | − GPU related performance information to performance monitoring | |
| 311 | − tools and applications. | |
| 308 | + GPU related performance information for consumption by performance | |
| 309 | + monitoring tools and applications. | |
| 312 | 310 | </para> |
| 313 | 311 | </sect2> |
| 314 | 312 | |
| 315 | 313 | <sect2> |
| 316 | 314 | <title>Configuring the device</title> |
| 317 | 315 | <para> |
| 318 | − Obviously, device configuration will be device specific. | |
| 316 | + Obviously, device configuration is device-specific. | |
| 319 | 317 | However, there are several common operations: finding a |
| 320 | 318 | device's PCI resources, mapping them, and potentially setting |
| 321 | 319 | up an IRQ handler. |
| @@ -323,10 +321,10 @@ · 1 unmodified line | ||
| 323 | 321 | <para> |
| 324 | 322 | Finding & mapping resources is fairly straightforward. The |
| 325 | 323 | DRM wrapper functions, drm_get_resource_start() and |
| 326 | − drm_get_resource_len() can be used to find BARs on the given | |
| 324 | + drm_get_resource_len(), may be used to find BARs on the given | |
| 327 | 325 | drm_device struct. Once those values have been retrieved, the |
| 328 | 326 | driver load function can call drm_addmap() to create a new |
| 329 | − mapping for the BAR in question. Note you'll probably want a | |
| 327 | + mapping for the BAR in question. Note that you probably want a | |
| 330 | 328 | drm_local_map_t in your driver private structure to track any |
| 331 | 329 | mappings you create. |
| 332 | 330 | <!-- !Fdrivers/gpu/drm/drm_bufs.c drm_get_resource_* --> |
| @@ -335,20 +333,20 @@ · 2 unmodified lines | ||
| 335 | 333 | <para> |
| 336 | 334 | if compatibility with other operating systems isn't a concern |
| 337 | 335 | (DRM drivers can run under various BSD variants and OpenSolaris), |
| 338 | − native Linux calls can be used for the above, e.g. pci_resource_* | |
| 336 | + native Linux calls may be used for the above, e.g. pci_resource_* | |
| 339 | 337 | and iomap*/iounmap. See the Linux device driver book for more |
| 340 | 338 | info. |
| 341 | 339 | </para> |
| 342 | 340 | <para> |
| 343 | − Once you have a register map, you can use the DRM_READn() and | |
| 341 | + Once you have a register map, you may use the DRM_READn() and | |
| 344 | 342 | DRM_WRITEn() macros to access the registers on your device, or |
| 345 | − use driver specific versions to offset into your MMIO space | |
| 346 | − relative to a driver specific base pointer (see I915_READ for | |
| 347 | − example). | |
| 343 | + use driver-specific versions to offset into your MMIO space | |
| 344 | + relative to a driver-specific base pointer (see I915_READ for | |
| 345 | + an example). | |
| 348 | 346 | </para> |
| 349 | 347 | <para> |
| 350 | 348 | If your device supports interrupt generation, you may want to |
| 351 | − setup an interrupt handler at driver load time as well. This | |
| 349 | + set up an interrupt handler when the driver is loaded. This | |
| 352 | 350 | is done using the drm_irq_install() function. If your device |
| 353 | 351 | supports vertical blank interrupts, it should call |
| 354 | 352 | drm_vblank_init() to initialize the core vblank handling code before |
| @@ -357,7 +355,7 @@ · 2 unmodified lines | ||
| 357 | 355 | </para> |
| 358 | 356 | <!--!Fdrivers/char/drm/drm_irq.c drm_irq_install--> |
| 359 | 357 | <para> |
| 360 | − Once your interrupt handler is registered (it'll use your | |
| 358 | + Once your interrupt handler is registered (it uses your | |
| 361 | 359 | drm_driver.irq_handler as the actual interrupt handling |
| 362 | 360 | function), you can safely enable interrupts on your device, |
| 363 | 361 | assuming any other state your interrupt handler uses is also |
| @@ -371,10 +369,10 @@ · 7 unmodified lines | ||
| 371 | 369 | using the pci_map_rom() call, a convenience function that |
| 372 | 370 | takes care of mapping the actual ROM, whether it has been |
| 373 | 371 | shadowed into memory (typically at address 0xc0000) or exists |
| 374 | − on the PCI device in the ROM BAR. Note that once you've | |
| 375 | − mapped the ROM and extracted any necessary information, be | |
| 376 | − sure to unmap it; on many devices the ROM address decoder is | |
| 377 | − shared with other BARs, so leaving it mapped can cause | |
| 372 | + on the PCI device in the ROM BAR. Note that after the ROM | |
| 373 | + has been mapped and any necessary information has been extracted, | |
| 374 | + it should be unmapped; on many devices, the ROM address decoder is | |
| 375 | + shared with other BARs, so leaving it mapped could cause | |
| 378 | 376 | undesired behavior like hangs or memory corruption. |
| 379 | 377 | <!--!Fdrivers/pci/rom.c pci_map_rom--> |
| 380 | 378 | </para> |
| @@ -389,9 +387,9 @@ · 8 unmodified lines | ||
| 389 | 387 | should support a memory manager. |
| 390 | 388 | </para> |
| 391 | 389 | <para> |
| 392 | − If your driver supports memory management (it should!), you'll | |
| 390 | + If your driver supports memory management (it should!), you | |
| 393 | 391 | need to set that up at load time as well. How you initialize |
| 394 | − it depends on which memory manager you're using, TTM or GEM. | |
| 392 | + it depends on which memory manager you're using: TTM or GEM. | |
| 395 | 393 | </para> |
| 396 | 394 | <sect3> |
| 397 | 395 | <title>TTM initialization</title> |
| @@ -401,7 +399,7 @@ · 3 unmodified lines | ||
| 401 | 399 | and devices with dedicated video RAM (VRAM), i.e. most discrete |
| 402 | 400 | graphics devices. If your device has dedicated RAM, supporting |
| 403 | 401 | TTM is desirable. TTM also integrates tightly with your |
| 404 | − driver specific buffer execution function. See the radeon | |
| 402 | + driver-specific buffer execution function. See the radeon | |
| 405 | 403 | driver for examples. |
| 406 | 404 | </para> |
| 407 | 405 | <para> |
| @@ -429,21 +427,21 @@ · 21 unmodified lines | ||
| 429 | 427 | created by the memory manager at runtime. Your global TTM should |
| 430 | 428 | have a type of TTM_GLOBAL_TTM_MEM. The size field for the global |
| 431 | 429 | object should be sizeof(struct ttm_mem_global), and the init and |
| 432 | − release hooks should point at your driver specific init and | |
| 433 | − release routines, which will probably eventually call | |
| 434 | − ttm_mem_global_init and ttm_mem_global_release respectively. | |
| 430 | + release hooks should point at your driver-specific init and | |
| 431 | + release routines, which probably eventually call | |
| 432 | + ttm_mem_global_init and ttm_mem_global_release, respectively. | |
| 435 | 433 | </para> |
| 436 | 434 | <para> |
| 437 | 435 | Once your global TTM accounting structure is set up and initialized |
| 438 | − (done by calling ttm_global_item_ref on the global object you | |
| 439 | − just created), you'll need to create a buffer object TTM to | |
| 436 | + by calling ttm_global_item_ref() on it, | |
| 437 | + you need to create a buffer object TTM to | |
| 440 | 438 | provide a pool for buffer object allocation by clients and the |
| 441 | 439 | kernel itself. The type of this object should be TTM_GLOBAL_TTM_BO, |
| 442 | 440 | and its size should be sizeof(struct ttm_bo_global). Again, |
| 443 | − driver specific init and release functions can be provided, | |
| 444 | − likely eventually calling ttm_bo_global_init and | |
| 445 | − ttm_bo_global_release, respectively. Also like the previous | |
| 446 | − object, ttm_global_item_ref is used to create an initial reference | |
| 441 | + driver-specific init and release functions may be provided, | |
| 442 | + likely eventually calling ttm_bo_global_init() and | |
| 443 | + ttm_bo_global_release(), respectively. Also, like the previous | |
| 444 | + object, ttm_global_item_ref() is used to create an initial reference | |
| 447 | 445 | count for the TTM, which will call your initialization function. |
| 448 | 446 | </para> |
| 449 | 447 | </sect3> |
| @@ -453,27 +451,26 @@ · 3 unmodified lines | ||
| 453 | 451 | GEM is an alternative to TTM, designed specifically for UMA |
| 454 | 452 | devices. It has simpler initialization and execution requirements |
| 455 | 453 | than TTM, but has no VRAM management capability. Core GEM |
| 456 | − initialization is comprised of a basic drm_mm_init call to create | |
| 454 | + is initialized by calling drm_mm_init() to create | |
| 457 | 455 | a GTT DRM MM object, which provides an address space pool for |
| 458 | − object allocation. In a KMS configuration, the driver will | |
| 459 | − need to allocate and initialize a command ring buffer following | |
| 460 | − basic GEM initialization. Most UMA devices have a so-called | |
| 456 | + object allocation. In a KMS configuration, the driver | |
| 457 | + needs to allocate and initialize a command ring buffer following | |
| 458 | + core GEM initialization. A UMA device usually has what is called a | |
| 461 | 459 | "stolen" memory region, which provides space for the initial |
| 462 | 460 | framebuffer and large, contiguous memory regions required by the |
| 463 | − device. This space is not typically managed by GEM, and must | |
| 461 | + device. This space is not typically managed by GEM, and it must | |
| 464 | 462 | be initialized separately into its own DRM MM object. |
| 465 | 463 | </para> |
| 466 | 464 | <para> |
| 467 | − Initialization will be driver specific, and will depend on | |
| 468 | − the architecture of the device. In the case of Intel | |
| 465 | + Initialization is driver-specific. In the case of Intel | |
| 469 | 466 | integrated graphics chips like 965GM, GEM initialization can |
| 470 | 467 | be done by calling the internal GEM init function, |
| 471 | 468 | i915_gem_do_init(). Since the 965GM is a UMA device |
| 472 | − (i.e. it doesn't have dedicated VRAM), GEM will manage | |
| 469 | + (i.e. it doesn't have dedicated VRAM), GEM manages | |
| 473 | 470 | making regular RAM available for GPU operations. Memory set |
| 474 | 471 | aside by the BIOS (called "stolen" memory by the i915 |
| 475 | − driver) will be managed by the DRM memrange allocator; the | |
| 476 | − rest of the aperture will be managed by GEM. | |
| 472 | + driver) is managed by the DRM memrange allocator; the | |
| 473 | + rest of the aperture is managed by GEM. | |
| 477 | 474 | <programlisting> |
| 478 | 475 | /* Basic memrange allocator for stolen space (aka vram) */ |
| 479 | 476 | drm_memrange_init(&dev_priv->vram, 0, prealloc_size); |
| @@ -483,7 +480,7 @@ · 3 unmodified lines | ||
| 483 | 480 | <!--!Edrivers/char/drm/drm_memrange.c--> |
| 484 | 481 | </para> |
| 485 | 482 | <para> |
| 486 | − Once the memory manager has been set up, we can allocate the | |
| 483 | + Once the memory manager has been set up, we may allocate the | |
| 487 | 484 | command buffer. In the i915 case, this is also done with a |
| 488 | 485 | GEM function, i915_gem_init_ringbuffer(). |
| 489 | 486 | </para> |
| @@ -493,16 +490,25 @@ · 3 unmodified lines | ||
| 493 | 490 | <sect2> |
| 494 | 491 | <title>Output configuration</title> |
| 495 | 492 | <para> |
| 496 | − The final initialization task is output configuration. This involves | |
| 497 | − finding and initializing the CRTCs, encoders and connectors | |
| 498 | − for your device, creating an initial configuration and | |
| 499 | − registering a framebuffer console driver. | |
| 493 | + The final initialization task is output configuration. This involves: | |
| 494 | + <itemizedlist> | |
| 495 | + <listitem> | |
| 496 | + Finding and initializing the CRTCs, encoders, and connectors | |
| 497 | + for the device. | |
| 498 | + </listitem> | |
| 499 | + <listitem> | |
| 500 | + Creating an initial configuration. | |
| 501 | + </listitem> | |
| 502 | + <listitem> | |
| 503 | + Registering a framebuffer console driver. | |
| 504 | + </listitem> | |
| 505 | + </itemizedlist> | |
| 500 | 506 | </para> |
| 501 | 507 | <sect3> |
| 502 | 508 | <title>Output discovery and initialization</title> |
| 503 | 509 | <para> |
| 504 | − Several core functions exist to create CRTCs, encoders and | |
| 505 | − connectors, namely drm_crtc_init(), drm_connector_init() and | |
| 510 | + Several core functions exist to create CRTCs, encoders, and | |
| 511 | + connectors, namely: drm_crtc_init(), drm_connector_init(), and | |
| 506 | 512 | drm_encoder_init(), along with several "helper" functions to |
| 507 | 513 | perform common tasks. |
| 508 | 514 | </para> |
| @@ -555,10 +561,10 @@ void intel_crt_init(struct drm_device *dev) · 46 unmodified lines | ||
| 555 | 561 | </programlisting> |
| 556 | 562 | <para> |
| 557 | 563 | In the example above (again, taken from the i915 driver), a |
| 558 | − CRT connector and encoder combination is created. A device | |
| 559 | − specific i2c bus is also created, for fetching EDID data and | |
| 564 | + CRT connector and encoder combination is created. A device-specific | |
| 565 | + i2c bus is also created for fetching EDID data and | |
| 560 | 566 | performing monitor detection. Once the process is complete, |
| 561 | − the new connector is registered with sysfs, to make its | |
| 567 | + the new connector is registered with sysfs to make its | |
| 562 | 568 | properties available to applications. |
| 563 | 569 | </para> |
| 564 | 570 | <sect4> |
| @@ -567,12 +573,12 @@ void intel_crt_init(struct drm_device *dev) · 2 unmodified lines | ||
| 567 | 573 | Since many PC-class graphics devices have similar display output |
| 568 | 574 | designs, the DRM provides a set of helper functions to make |
| 569 | 575 | output management easier. The core helper routines handle |
| 570 | − encoder re-routing and disabling of unused functions following | |
| 571 | − mode set. Using the helpers is optional, but recommended for | |
| 576 | + encoder re-routing and the disabling of unused functions following | |
| 577 | + mode setting. Using the helpers is optional, but recommended for | |
| 572 | 578 | devices with PC-style architectures (i.e. a set of display planes |
| 573 | 579 | for feeding pixels to encoders which are in turn routed to |
| 574 | 580 | connectors). Devices with more complex requirements needing |
| 575 | − finer grained management can opt to use the core callbacks | |
| 581 | + finer grained management may opt to use the core callbacks | |
| 576 | 582 | directly. |
| 577 | 583 | </para> |
| 578 | 584 | <para> |
| @@ -580,17 +586,25 @@ void intel_crt_init(struct drm_device *dev) · 1 unmodified line | ||
| 580 | 586 | </para> |
| 581 | 587 | </sect4> |
| 582 | 588 | <para> |
| 583 | − For each encoder, CRTC and connector, several functions must | |
| 584 | − be provided, depending on the object type. Encoder objects | |
| 585 | − need to provide a DPMS (basically on/off) function, mode fixup | |
| 586 | − (for converting requested modes into native hardware timings), | |
| 587 | − and prepare, set and commit functions for use by the core DRM | |
| 588 | − helper functions. Connector helpers need to provide mode fetch and | |
| 589 | − validity functions as well as an encoder matching function for | |
| 590 | − returning an ideal encoder for a given connector. The core | |
| 591 | − connector functions include a DPMS callback, (deprecated) | |
| 592 | − save/restore routines, detection, mode probing, property handling, | |
| 593 | − and cleanup functions. | |
| 589 | + Each encoder object needs to provide: | |
| 590 | + <itemizedlist> | |
| 591 | + <listitem> | |
| 592 | + A DPMS (basically on/off) function. | |
| 593 | + </listitem> | |
| 594 | + <listitem> | |
| 595 | + A mode-fixup function (for converting requested modes into | |
| 596 | + native hardware timings). | |
| 597 | + </listitem> | |
| 598 | + <listitem> | |
| 599 | + Functions (prepare, set, and commit) for use by the core DRM | |
| 600 | + helper functions. | |
| 601 | + </listitem> | |
| 602 | + </itemizedlist> | |
| 603 | + Connector helpers need to provide functions (mode-fetch, validity, | |
| 604 | + and encoder-matching) for returning an ideal encoder for a given | |
| 605 | + connector. The core connector functions include a DPMS callback, | |
| 606 | + save/restore routines (deprecated), detection, mode probing, | |
| 607 | + property handling, and cleanup functions. | |
| 594 | 608 | </para> |
| 595 | 609 | <!--!Edrivers/char/drm/drm_crtc.h--> |
| 596 | 610 | <!--!Edrivers/char/drm/drm_crtc.c--> |
| @@ -605,22 +619,33 @@ void intel_crt_init(struct drm_device *dev) · 8 unmodified lines | ||
| 605 | 619 | <title>VBlank event handling</title> |
| 606 | 620 | <para> |
| 607 | 621 | The DRM core exposes two vertical blank related ioctls: |
| 608 | − DRM_IOCTL_WAIT_VBLANK and DRM_IOCTL_MODESET_CTL. | |
| 622 | + <variablelist> | |
| 623 | + <varlistentry> | |
| 624 | + <term>DRM_IOCTL_WAIT_VBLANK</term> | |
| 625 | + <listitem> | |
| 626 | + <para> | |
| 627 | + This takes a struct drm_wait_vblank structure as its argument, | |
| 628 | + and it is used to block or request a signal when a specified | |
| 629 | + vblank event occurs. | |
| 630 | + </para> | |
| 631 | + </listitem> | |
| 632 | + </varlistentry> | |
| 633 | + <varlistentry> | |
| 634 | + <term>DRM_IOCTL_MODESET_CTL</term> | |
| 635 | + <listitem> | |
| 636 | + <para> | |
| 637 | + This should be called by application level drivers before and | |
| 638 | + after mode setting, since on many devices the vertical blank | |
| 639 | + counter is reset at that time. Internally, the DRM snapshots | |
| 640 | + the last vblank count when the ioctl is called with the | |
| 641 | + _DRM_PRE_MODESET command, so that the counter won't go backwards | |
| 642 | + (which is dealt with when _DRM_POST_MODESET is used). | |
| 643 | + </para> | |
| 644 | + </listitem> | |
| 645 | + </varlistentry> | |
| 646 | + </variablelist> | |
| 609 | 647 | <!--!Edrivers/char/drm/drm_irq.c--> |
| 610 | 648 | </para> |
| 611 | − <para> | |
| 612 | − DRM_IOCTL_WAIT_VBLANK takes a struct drm_wait_vblank structure | |
| 613 | − as its argument, and is used to block or request a signal when a | |
| 614 | − specified vblank event occurs. | |
| 615 | − </para> | |
| 616 | − <para> | |
| 617 | − DRM_IOCTL_MODESET_CTL should be called by application level | |
| 618 | − drivers before and after mode setting, since on many devices the | |
| 619 | − vertical blank counter will be reset at that time. Internally, | |
| 620 | − the DRM snapshots the last vblank count when the ioctl is called | |
| 621 | − with the _DRM_PRE_MODESET command so that the counter won't go | |
| 622 | − backwards (which is dealt with when _DRM_POST_MODESET is used). | |
| 623 | − </para> | |
| 624 | 649 | <para> |
| 625 | 650 | To support the functions above, the DRM core provides several |
| 626 | 651 | helper functions for tracking vertical blank counters, and |
| @@ -632,24 +657,24 @@ void intel_crt_init(struct drm_device *dev) · 5 unmodified lines | ||
| 632 | 657 | register. The enable and disable vblank callbacks should enable |
| 633 | 658 | and disable vertical blank interrupts, respectively. In the |
| 634 | 659 | absence of DRM clients waiting on vblank events, the core DRM |
| 635 | − code will use the disable_vblank() function to disable | |
| 636 | − interrupts, which saves power. They'll be re-enabled again when | |
| 660 | + code uses the disable_vblank() function to disable | |
| 661 | + interrupts, which saves power. They are re-enabled again when | |
| 637 | 662 | a client calls the vblank wait ioctl above. |
| 638 | 663 | </para> |
| 639 | 664 | <para> |
| 640 | − Devices that don't provide a count register can simply use an | |
| 665 | + A device that doesn't provide a count register may simply use an | |
| 641 | 666 | internal atomic counter incremented on every vertical blank |
| 642 | − interrupt, and can make their enable and disable vblank | |
| 643 | − functions into no-ops. | |
| 667 | + interrupt (and then treat the enable_vblank() and disable_vblank() | |
| 668 | + callbacks as no-ops). | |
| 644 | 669 | </para> |
| 645 | 670 | </sect1> |
| 646 | 671 | |
| 647 | 672 | <sect1> |
| 648 | 673 | <title>Memory management</title> |
| 649 | 674 | <para> |
| 650 | − The memory manager lies at the heart of many DRM operations, and | |
| 651 | − is also required to support advanced client features like OpenGL | |
| 652 | − pbuffers. The DRM currently contains two memory managers, TTM | |
| 675 | + The memory manager lies at the heart of many DRM operations; it | |
| 676 | + is required to support advanced client features like OpenGL | |
| 677 | + pbuffers. The DRM currently contains two memory managers: TTM | |
| 653 | 678 | and GEM. |
| 654 | 679 | </para> |
| 655 | 680 | |
| @@ -679,41 +704,46 @@ void intel_crt_init(struct drm_device *dev) · 23 unmodified lines | ||
| 679 | 704 | <para> |
| 680 | 705 | GEM-enabled drivers must provide gem_init_object() and |
| 681 | 706 | gem_free_object() callbacks to support the core memory |
| 682 | − allocation routines. They should also provide several driver | |
| 683 | − specific ioctls to support command execution, pinning, buffer | |
| 707 | + allocation routines. They should also provide several driver-specific | |
| 708 | + ioctls to support command execution, pinning, buffer | |
| 684 | 709 | read & write, mapping, and domain ownership transfers. |
| 685 | 710 | </para> |
| 686 | 711 | <para> |
| 687 | − On a fundamental level, GEM involves several operations: memory | |
| 688 | − allocation and freeing, command execution, and aperture management | |
| 689 | − at command execution time. Buffer object allocation is relatively | |
| 712 | + On a fundamental level, GEM involves several operations: | |
| 713 | + <itemizedlist> | |
| 714 | + <listitem>Memory allocation and freeing</listitem> | |
| 715 | + <listitem>Command execution</listitem> | |
| 716 | + <listitem>Aperture management at command execution time</listitem> | |
| 717 | + </itemizedlist> | |
| 718 | + Buffer object allocation is relatively | |
| 690 | 719 | straightforward and largely provided by Linux's shmem layer, which |
| 691 | 720 | provides memory to back each object. When mapped into the GTT |
| 692 | 721 | or used in a command buffer, the backing pages for an object are |
| 693 | 722 | flushed to memory and marked write combined so as to be coherent |
| 694 | − with the GPU. Likewise, when the GPU finishes rendering to an object, | |
| 695 | − if the CPU accesses it, it must be made coherent with the CPU's view | |
| 723 | + with the GPU. Likewise, if the CPU accesses an object after the GPU | |
| 724 | + has finished rendering to the object, then the object must be made | |
| 725 | + coherent with the CPU's view | |
| 696 | 726 | of memory, usually involving GPU cache flushing of various kinds. |
| 697 | − This core CPU<->GPU coherency management is provided by the GEM | |
| 698 | − set domain function, which evaluates an object's current domain and | |
| 727 | + This core CPU<->GPU coherency management is provided by a | |
| 728 | + device-specific ioctl, which evaluates an object's current domain and | |
| 699 | 729 | performs any necessary flushing or synchronization to put the object |
| 700 | 730 | into the desired coherency domain (note that the object may be busy, |
| 701 | − i.e. an active render target; in that case the set domain function | |
| 702 | − will block the client and wait for rendering to complete before | |
| 731 | + i.e. an active render target; in that case, setting the domain | |
| 732 | + blocks the client and waits for rendering to complete before | |
| 703 | 733 | performing any necessary flushing operations). |
| 704 | 734 | </para> |
| 705 | 735 | <para> |
| 706 | 736 | Perhaps the most important GEM function is providing a command |
| 707 | 737 | execution interface to clients. Client programs construct command |
| 708 | − buffers containing references to previously allocated memory objects | |
| 709 | − and submit them to GEM. At that point, GEM will take care to bind | |
| 738 | + buffers containing references to previously allocated memory objects, | |
| 739 | + and then submit them to GEM. At that point, GEM takes care to bind | |
| 710 | 740 | all the objects into the GTT, execute the buffer, and provide |
| 711 | 741 | necessary synchronization between clients accessing the same buffers. |
| 712 | 742 | This often involves evicting some objects from the GTT and re-binding |
| 713 | 743 | others (a fairly expensive operation), and providing relocation |
| 714 | 744 | support which hides fixed GTT offsets from clients. Clients must |
| 715 | 745 | take care not to submit command buffers that reference more objects |
| 716 | − than can fit in the GTT or GEM will reject them and no rendering | |
| 746 | + than can fit in the GTT; otherwise, GEM will reject them and no rendering | |
| 717 | 747 | will occur. Similarly, if several objects in the buffer require |
| 718 | 748 | fence registers to be allocated for correct rendering (e.g. 2D blits |
| 719 | 749 | on pre-965 chips), care must be taken not to require more fence |
| @@ -729,7 +759,7 @@ void intel_crt_init(struct drm_device *dev) · 9 unmodified lines | ||
| 729 | 759 | <title>Output management</title> |
| 730 | 760 | <para> |
| 731 | 761 | At the core of the DRM output management code is a set of |
| 732 | − structures representing CRTCs, encoders and connectors. | |
| 762 | + structures representing CRTCs, encoders, and connectors. | |
| 733 | 763 | </para> |
| 734 | 764 | <para> |
| 735 | 765 | A CRTC is an abstraction representing a part of the chip that |
| @@ -765,21 +795,19 @@ void intel_crt_init(struct drm_device *dev) · 29 unmodified lines | ||
| 765 | 795 | <sect1> |
| 766 | 796 | <title>Framebuffer management</title> |
| 767 | 797 | <para> |
| 768 | − In order to set a mode on a given CRTC, encoder and connector | |
| 769 | − configuration, clients need to provide a framebuffer object which | |
| 770 | − will provide a source of pixels for the CRTC to deliver to the encoder(s) | |
| 771 | − and ultimately the connector(s) in the configuration. A framebuffer | |
| 772 | − is fundamentally a driver specific memory object, made into an opaque | |
| 773 | − handle by the DRM addfb function. Once an fb has been created this | |
| 774 | − way it can be passed to the KMS mode setting routines for use in | |
| 775 | − a configuration. | |
| 798 | + Clients need to provide a framebuffer object which provides a source | |
| 799 | + of pixels for a CRTC to deliver to the encoder(s) and ultimately the | |
| 800 | + connector(s). A framebuffer is fundamentally a driver-specific memory | |
| 801 | + object, made into an opaque handle by the DRM's addfb() function. | |
| 802 | + Once a framebuffer has been created this way, it may be passed to the | |
| 803 | + KMS mode setting routines for use in a completed configuration. | |
| 776 | 804 | </para> |
| 777 | 805 | </sect1> |
| 778 | 806 | |
| 779 | 807 | <sect1> |
| 780 | 808 | <title>Command submission & fencing</title> |
| 781 | 809 | <para> |
| 782 | − This should cover a few device specific command submission | |
| 810 | + This should cover a few device-specific command submission | |
| 783 | 811 | implementations. |
| 784 | 812 | </para> |
| 785 | 813 | </sect1> |
| @@ -789,7 +817,7 @@ void intel_crt_init(struct drm_device *dev) · 3 unmodified lines | ||
| 789 | 817 | <para> |
| 790 | 818 | The DRM core provides some suspend/resume code, but drivers |
| 791 | 819 | wanting full suspend/resume support should provide save() and |
| 792 | − restore() functions. These will be called at suspend, | |
| 820 | + restore() functions. These are called at suspend, | |
| 793 | 821 | hibernate, or resume time, and should perform any state save or |
| 794 | 822 | restore required by your device across suspend or hibernate |
| 795 | 823 | states. |
| @@ -812,8 +840,8 @@ void intel_crt_init(struct drm_device *dev) · 16 unmodified lines | ||
| 812 | 840 | <para> |
| 813 | 841 | The DRM core exports several interfaces to applications, |
| 814 | 842 | generally intended to be used through corresponding libdrm |
| 815 | − wrapper functions. In addition, drivers export device specific | |
| 816 | − interfaces for use by userspace drivers & device aware | |
| 843 | + wrapper functions. In addition, drivers export device-specific | |
| 844 | + interfaces for use by userspace drivers & device-aware | |
| 817 | 845 | applications through ioctls and sysfs files. |
| 818 | 846 | </para> |
| 819 | 847 | <para> |
| @@ -822,8 +850,8 @@ void intel_crt_init(struct drm_device *dev) · 2 unmodified lines | ||
| 822 | 850 | management, memory management, and output management. |
| 823 | 851 | </para> |
| 824 | 852 | <para> |
| 825 | − Cover generic ioctls and sysfs layout here. Only need high | |
| 826 | − level info, since man pages will cover the rest. | |
| 853 | + Cover generic ioctls and sysfs layout here. We only need high-level | |
| 854 | + info, since man pages should cover the rest. | |
| 827 | 855 | </para> |
| 828 | 856 | </chapter> |
| 829 | 857 | |
| @@ -352,6 +352,7 @@ typedef enum fe_delivery_system { · 351 unmodified lines | ||
| 352 | 352 | SYS_CMMB, |
| 353 | 353 | SYS_DAB, |
| 354 | 354 | SYS_DVBT2, |
| 355 | + SYS_TURBO, | |
| 355 | 356 | } fe_delivery_system_t; |
| 356 | 357 | </programlisting> |
| 357 | 358 | </section> |
| @@ -809,6 +810,8 @@ typedef enum fe_hierarchy { · 451 unmodified lines | ||
| 809 | 810 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> |
| 810 | 811 | <listitem><para><link linkend="DTV-SYMBOL-RATE"><constant>DTV_SYMBOL_RATE</constant></link></para></listitem> |
| 811 | 812 | <listitem><para><link linkend="DTV-INNER-FEC"><constant>DTV_INNER_FEC</constant></link></para></listitem> |
| 813 | + <listitem><para><link linkend="DTV-VOLTAGE"><constant>DTV_VOLTAGE</constant></link></para></listitem> | |
| 814 | + <listitem><para><link linkend="DTV-TONE"><constant>DTV_TONE</constant></link></para></listitem> | |
| 812 | 815 | </itemizedlist> |
| 813 | 816 | <para>Future implementations might add those two missing parameters:</para> |
| 814 | 817 | <itemizedlist mark='opencircle'> |
| @@ -818,25 +821,18 @@ typedef enum fe_hierarchy { · 3 unmodified lines | ||
| 818 | 821 | </section> |
| 819 | 822 | <section id="dvbs2-params"> |
| 820 | 823 | <title>DVB-S2 delivery system</title> |
| 821 | − <para>The following parameters are valid for DVB-S2:</para> | |
| 824 | + <para>In addition to all parameters valid for DVB-S, DVB-S2 supports the following parameters:</para> | |
| 822 | 825 | <itemizedlist mark='opencircle'> |
| 823 | − <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | |
| 824 | − <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | |
| 825 | − <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | |
| 826 | − <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | |
| 827 | − <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | |
| 828 | − <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | |
| 829 | − <listitem><para><link linkend="DTV-SYMBOL-RATE"><constant>DTV_SYMBOL_RATE</constant></link></para></listitem> | |
| 830 | − <listitem><para><link linkend="DTV-INNER-FEC"><constant>DTV_INNER_FEC</constant></link></para></listitem> | |
| 831 | − <listitem><para><link linkend="DTV-VOLTAGE"><constant>DTV_VOLTAGE</constant></link></para></listitem> | |
| 832 | − <listitem><para><link linkend="DTV-TONE"><constant>DTV_TONE</constant></link></para></listitem> | |
| 826 | + <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | |
| 833 | 827 | <listitem><para><link linkend="DTV-PILOT"><constant>DTV_PILOT</constant></link></para></listitem> |
| 834 | 828 | <listitem><para><link linkend="DTV-ROLLOFF"><constant>DTV_ROLLOFF</constant></link></para></listitem> |
| 835 | 829 | </itemizedlist> |
| 836 | − <para>Future implementations might add those two missing parameters:</para> | |
| 830 | + </section> | |
| 831 | + <section id="turbo-params"> | |
| 832 | + <title>Turbo code delivery system</title> | |
| 833 | + <para>In addition to all parameters valid for DVB-S, turbo code supports the following parameters:</para> | |
| 837 | 834 | <itemizedlist mark='opencircle'> |
| 838 | − <listitem><para><link linkend="DTV-DISEQC-MASTER"><constant>DTV_DISEQC_MASTER</constant></link></para></listitem> | |
| 839 | − <listitem><para><link linkend="DTV-DISEQC-SLAVE-REPLY"><constant>DTV_DISEQC_SLAVE_REPLY</constant></link></para></listitem> | |
| 835 | + <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | |
| 840 | 836 | </itemizedlist> |
| 841 | 837 | </section> |
| 842 | 838 | <section id="isdbs-params"> |
| @@ -205,7 +205,7 @@ a partial path like:</para> · 204 unmodified lines | ||
| 205 | 205 | additional include file <emphasis |
| 206 | 206 | role="tt">linux/dvb/version.h</emphasis> exists, which defines the |
| 207 | 207 | constant <emphasis role="tt">DVB_API_VERSION</emphasis>. This document |
| 208 | −describes <emphasis role="tt">DVB_API_VERSION 3</emphasis>. | |
| 208 | +describes <emphasis role="tt">DVB_API_VERSION 5.4</emphasis>. | |
| 209 | 209 | </para> |
| 210 | 210 | |
| 211 | 211 | </section> |
| @@ -2370,6 +2370,14 @@ that used it. It was originally scheduled for removal in 2.6.35. · 2369 unmodified lines | ||
| 2370 | 2370 | </listitem> |
| 2371 | 2371 | </orderedlist> |
| 2372 | 2372 | </section> |
| 2373 | + <section> | |
| 2374 | + <title>V4L2 in Linux 3.2</title> | |
| 2375 | + <orderedlist> | |
| 2376 | + <listitem> | |
| 2377 | + <para>V4L2_CTRL_FLAG_VOLATILE was added to signal volatile controls to userspace.</para> | |
| 2378 | + </listitem> | |
| 2379 | + </orderedlist> | |
| 2380 | + </section> | |
| 2373 | 2381 | |
| 2374 | 2382 | <section id="other"> |
| 2375 | 2383 | <title>Relation of V4L2 to other Linux multimedia APIs</title> |
| @@ -2478,6 +2486,9 @@ ioctls.</para> · 102 unmodified lines | ||
| 2478 | 2486 | <listitem> |
| 2479 | 2487 | <para>Flash API. <xref linkend="flash-controls" /></para> |
| 2480 | 2488 | </listitem> |
| 2489 | + <listitem> | |
| 2490 | + <para>&VIDIOC-CREATE-BUFS; and &VIDIOC-PREPARE-BUF; ioctls.</para> | |
| 2491 | + </listitem> | |
| 2481 | 2492 | </itemizedlist> |
| 2482 | 2493 | </section> |
| 2483 | 2494 | |
| @@ -232,8 +232,9 @@ control is deprecated. New drivers and applications should use the · 231 unmodified lines | ||
| 232 | 232 | <entry>Enables a power line frequency filter to avoid |
| 233 | 233 | flicker. Possible values for <constant>enum v4l2_power_line_frequency</constant> are: |
| 234 | 234 | <constant>V4L2_CID_POWER_LINE_FREQUENCY_DISABLED</constant> (0), |
| 235 | −<constant>V4L2_CID_POWER_LINE_FREQUENCY_50HZ</constant> (1) and | |
| 236 | −<constant>V4L2_CID_POWER_LINE_FREQUENCY_60HZ</constant> (2).</entry> | |
| 235 | +<constant>V4L2_CID_POWER_LINE_FREQUENCY_50HZ</constant> (1), | |
| 236 | +<constant>V4L2_CID_POWER_LINE_FREQUENCY_60HZ</constant> (2) and | |
| 237 | +<constant>V4L2_CID_POWER_LINE_FREQUENCY_AUTO</constant> (3).</entry> | |
| 237 | 238 | </row> |
| 238 | 239 | <row> |
| 239 | 240 | <entry><constant>V4L2_CID_HUE_AUTO</constant></entry> |
| @@ -266,7 +266,7 @@ · 265 unmodified lines | ||
| 266 | 266 | |
| 267 | 267 | <para>When satisfied with the try results, applications can set the active |
| 268 | 268 | formats by setting the <structfield>which</structfield> argument to |
| 269 | − <constant>V4L2_SUBDEV_FORMAT_TRY</constant>. Active formats are changed | |
| 269 | + <constant>V4L2_SUBDEV_FORMAT_ACTIVE</constant>. Active formats are changed | |
| 270 | 270 | exactly as try formats by drivers. To avoid modifying the hardware state |
| 271 | 271 | during format negotiation, applications should negotiate try formats first |
| 272 | 272 | and then modify the active settings using the try formats returned during |
| @@ -927,6 +927,33 @@ ioctl is called.</entry> · 926 unmodified lines | ||
| 927 | 927 | Applications set or clear this flag before calling the |
| 928 | 928 | <constant>VIDIOC_QBUF</constant> ioctl.</entry> |
| 929 | 929 | </row> |
| 930 | + <row> | |
| 931 | + <entry><constant>V4L2_BUF_FLAG_PREPARED</constant></entry> | |
| 932 | + <entry>0x0400</entry> | |
| 933 | + <entry>The buffer has been prepared for I/O and can be queued by the | |
| 934 | +application. Drivers set or clear this flag when the | |
| 935 | +<link linkend="vidioc-querybuf">VIDIOC_QUERYBUF</link>, <link | |
| 936 | + linkend="vidioc-qbuf">VIDIOC_PREPARE_BUF</link>, <link | |
| 937 | + linkend="vidioc-qbuf">VIDIOC_QBUF</link> or <link | |
| 938 | + linkend="vidioc-qbuf">VIDIOC_DQBUF</link> ioctl is called.</entry> | |
| 939 | + </row> | |
| 940 | + <row> | |
| 941 | + <entry><constant>V4L2_BUF_FLAG_NO_CACHE_INVALIDATE</constant></entry> | |
| 942 | + <entry>0x0400</entry> | |
| 943 | + <entry>Caches do not have to be invalidated for this buffer. | |
| 944 | +Typically applications shall use this flag if the data captured in the buffer | |
| 945 | +is not going to be touched by the CPU, instead the buffer will, probably, be | |
| 946 | +passed on to a DMA-capable hardware unit for further processing or output. | |
| 947 | +</entry> | |
| 948 | + </row> | |
| 949 | + <row> | |
| 950 | + <entry><constant>V4L2_BUF_FLAG_NO_CACHE_CLEAN</constant></entry> | |
| 951 | + <entry>0x0800</entry> | |
| 952 | + <entry>Caches do not have to be cleaned for this buffer. | |
| 953 | +Typically applications shall use this flag for output buffers if the data | |
| 954 | +in this buffer has not been created by the CPU but by some DMA-capable unit, | |
| 955 | +in which case caches have not been used.</entry> | |
| 956 | + </row> | |
| 930 | 957 | </tbody> |
| 931 | 958 | </tgroup> |
| 932 | 959 | </table> |
| @@ -127,6 +127,13 @@ structs, ioctls) must be noted in more detail in the history chapter · 126 unmodified lines | ||
| 127 | 127 | (compat.xml), along with the possible impact on existing drivers and |
| 128 | 128 | applications. --> |
| 129 | 129 | |
| 130 | + <revision> | |
| 131 | + <revnumber>3.2</revnumber> | |
| 132 | + <date>2011-08-26</date> | |
| 133 | + <authorinitials>hv</authorinitials> | |
| 134 | + <revremark>Added V4L2_CTRL_FLAG_VOLATILE.</revremark> | |
| 135 | + </revision> | |
| 136 | + | |
| 130 | 137 | <revision> |
| 131 | 138 | <revnumber>3.1</revnumber> |
| 132 | 139 | <date>2011-06-27</date> |
| @@ -410,7 +417,7 @@ and discussions on the V4L mailing list.</revremark> · 277 unmodified lines | ||
| 410 | 417 | </partinfo> |
| 411 | 418 | |
| 412 | 419 | <title>Video for Linux Two API Specification</title> |
| 413 | − <subtitle>Revision 3.1</subtitle> | |
| 420 | + <subtitle>Revision 3.2</subtitle> | |
| 414 | 421 | |
| 415 | 422 | <chapter id="common"> |
| 416 | 423 | &sub-common; |
| @@ -462,6 +469,7 @@ and discussions on the V4L mailing list.</revremark> · 45 unmodified lines | ||
| 462 | 469 | &sub-close; |
| 463 | 470 | &sub-ioctl; |
| 464 | 471 | <!-- All ioctls go here. --> |
| 472 | + &sub-create-bufs; | |
| 465 | 473 | &sub-cropcap; |
| 466 | 474 | &sub-dbg-g-chip-ident; |
| 467 | 475 | &sub-dbg-g-register; |
| @@ -504,6 +512,7 @@ and discussions on the V4L mailing list.</revremark> · 36 unmodified lines | ||
| 504 | 512 | &sub-queryctrl; |
| 505 | 513 | &sub-query-dv-preset; |
| 506 | 514 | &sub-querystd; |
| 515 | + &sub-prepare-buf; | |
| 507 | 516 | &sub-reqbufs; |
| 508 | 517 | &sub-s-hw-freq-seek; |
| 509 | 518 | &sub-streamon; |
| @@ -0,0 +1,139 @@ | ||
| 1 | +<refentry id="vidioc-create-bufs"> | |
| 2 | + <refmeta> | |
| 3 | + <refentrytitle>ioctl VIDIOC_CREATE_BUFS</refentrytitle> | |
| 4 | + &manvol; | |
| 5 | + </refmeta> | |
| 6 | + | |
| 7 | + <refnamediv> | |
| 8 | + <refname>VIDIOC_CREATE_BUFS</refname> | |
| 9 | + <refpurpose>Create buffers for Memory Mapped or User Pointer I/O</refpurpose> | |
| 10 | + </refnamediv> | |
| 11 | + | |
| 12 | + <refsynopsisdiv> | |
| 13 | + <funcsynopsis> | |
| 14 | + <funcprototype> | |
| 15 | + <funcdef>int <function>ioctl</function></funcdef> | |
| 16 | + <paramdef>int <parameter>fd</parameter></paramdef> | |
| 17 | + <paramdef>int <parameter>request</parameter></paramdef> | |
| 18 | + <paramdef>struct v4l2_create_buffers *<parameter>argp</parameter></paramdef> | |
| 19 | + </funcprototype> | |
| 20 | + </funcsynopsis> | |
| 21 | + </refsynopsisdiv> | |
| 22 | + | |
| 23 | + <refsect1> | |
| 24 | + <title>Arguments</title> | |
| 25 | + | |
| 26 | + <variablelist> | |
| 27 | + <varlistentry> | |
| 28 | + <term><parameter>fd</parameter></term> | |
| 29 | + <listitem> | |
| 30 | + <para>&fd;</para> | |
| 31 | + </listitem> | |
| 32 | + </varlistentry> | |
| 33 | + <varlistentry> | |
| 34 | + <term><parameter>request</parameter></term> | |
| 35 | + <listitem> | |
| 36 | + <para>VIDIOC_CREATE_BUFS</para> | |
| 37 | + </listitem> | |
| 38 | + </varlistentry> | |
| 39 | + <varlistentry> | |
| 40 | + <term><parameter>argp</parameter></term> | |
| 41 | + <listitem> | |
| 42 | + <para></para> | |
| 43 | + </listitem> | |
| 44 | + </varlistentry> | |
| 45 | + </variablelist> | |
| 46 | + </refsect1> | |
| 47 | + | |
| 48 | + <refsect1> | |
| 49 | + <title>Description</title> | |
| 50 | + | |
| 51 | + <para>This ioctl is used to create buffers for <link linkend="mmap">memory | |
| 52 | +mapped</link> or <link linkend="userp">user pointer</link> | |
| 53 | +I/O. It can be used as an alternative or in addition to the | |
| 54 | +<constant>VIDIOC_REQBUFS</constant> ioctl, when a tighter control over buffers | |
| 55 | +is required. This ioctl can be called multiple times to create buffers of | |
| 56 | +different sizes.</para> | |
| 57 | + | |
| 58 | + <para>To allocate device buffers applications initialize relevant fields of | |
| 59 | +the <structname>v4l2_create_buffers</structname> structure. They set the | |
| 60 | +<structfield>type</structfield> field in the | |
| 61 | +<structname>v4l2_format</structname> structure, embedded in this | |
| 62 | +structure, to the respective stream or buffer type. | |
| 63 | +<structfield>count</structfield> must be set to the number of required buffers. | |
| 64 | +<structfield>memory</structfield> specifies the required I/O method. The | |
| 65 | +<structfield>format</structfield> field shall typically be filled in using | |
| 66 | +either the <constant>VIDIOC_TRY_FMT</constant> or | |
| 67 | +<constant>VIDIOC_G_FMT</constant> ioctl(). Additionally, applications can adjust | |
| 68 | +<structfield>sizeimage</structfield> fields to fit their specific needs. The | |
| 69 | +<structfield>reserved</structfield> array must be zeroed.</para> | |
| 70 | + | |
| 71 | + <para>When the ioctl is called with a pointer to this structure the driver | |
| 72 | +will attempt to allocate up to the requested number of buffers and store the | |
| 73 | +actual number allocated and the starting index in the | |
| 74 | +<structfield>count</structfield> and the <structfield>index</structfield> fields | |
| 75 | +respectively. On return <structfield>count</structfield> can be smaller than | |
| 76 | +the number requested. The driver may also increase buffer sizes if required, | |
| 77 | +however, it will not update <structfield>sizeimage</structfield> field values. | |
| 78 | +The user has to use <constant>VIDIOC_QUERYBUF</constant> to retrieve that | |
| 79 | +information.</para> | |
| 80 | + | |
| 81 | + <table pgwide="1" frame="none" id="v4l2-create-buffers"> | |
| 82 | + <title>struct <structname>v4l2_create_buffers</structname></title> | |
| 83 | + <tgroup cols="3"> | |
| 84 | + &cs-str; | |
| 85 | + <tbody valign="top"> | |
| 86 | + <row> | |
| 87 | + <entry>__u32</entry> | |
| 88 | + <entry><structfield>index</structfield></entry> | |
| 89 | + <entry>The starting buffer index, returned by the driver.</entry> | |
| 90 | + </row> | |
| 91 | + <row> | |
| 92 | + <entry>__u32</entry> | |
| 93 | + <entry><structfield>count</structfield></entry> | |
| 94 | + <entry>The number of buffers requested or granted.</entry> | |
| 95 | + </row> | |
| 96 | + <row> | |
| 97 | + <entry>&v4l2-memory;</entry> | |
| 98 | + <entry><structfield>memory</structfield></entry> | |
| 99 | + <entry>Applications set this field to | |
| 100 | +<constant>V4L2_MEMORY_MMAP</constant> or | |
| 101 | +<constant>V4L2_MEMORY_USERPTR</constant>.</entry> | |
| 102 | + </row> | |
| 103 | + <row> | |
| 104 | + <entry>&v4l2-format;</entry> | |
| 105 | + <entry><structfield>format</structfield></entry> | |
| 106 | + <entry>Filled in by the application, preserved by the driver.</entry> | |
| 107 | + </row> | |
| 108 | + <row> | |
| 109 | + <entry>__u32</entry> | |
| 110 | + <entry><structfield>reserved</structfield>[8]</entry> | |
| 111 | + <entry>A place holder for future extensions.</entry> | |
| 112 | + </row> | |
| 113 | + </tbody> | |
| 114 | + </tgroup> | |
| 115 | + </table> | |
| 116 | + </refsect1> | |
| 117 | + | |
| 118 | + <refsect1> | |
| 119 | + &return-value; | |
| 120 | + | |
| 121 | + <variablelist> | |
| 122 | + <varlistentry> | |
| 123 | + <term><errorcode>ENOMEM</errorcode></term> | |
| 124 | + <listitem> | |
| 125 | + <para>No memory to allocate buffers for <link linkend="mmap">memory | |
| 126 | +mapped</link> I/O.</para> | |
| 127 | + </listitem> | |
| 128 | + </varlistentry> | |
| 129 | + <varlistentry> | |
| 130 | + <term><errorcode>EINVAL</errorcode></term> | |
| 131 | + <listitem> | |
| 132 | + <para>The buffer type (<structfield>type</structfield> field) or the | |
| 133 | +requested I/O method (<structfield>memory</structfield>) is not | |
| 134 | +supported.</para> | |
| 135 | + </listitem> | |
| 136 | + </varlistentry> | |
| 137 | + </variablelist> | |
| 138 | + </refsect1> | |
| 139 | +</refentry> | |
| @@ -86,6 +86,12 @@ · 85 unmodified lines | ||
| 86 | 86 | <entry>Event data for event V4L2_EVENT_CTRL. |
| 87 | 87 | </entry> |
| 88 | 88 | </row> |
| 89 | + <row> | |
| 90 | + <entry></entry> | |
| 91 | + <entry>&v4l2-event-frame-sync;</entry> | |
| 92 | + <entry><structfield>frame</structfield></entry> | |
| 93 | + <entry>Event data for event V4L2_EVENT_FRAME_SYNC.</entry> | |
| 94 | + </row> | |
| 89 | 95 | <row> |
| 90 | 96 | <entry></entry> |
| 91 | 97 | <entry>__u8</entry> |
| @@ -135,6 +141,129 @@ · 43 unmodified lines | ||
| 135 | 141 | </tgroup> |
| 136 | 142 | </table> |
| 137 | 143 | |
| 144 | + <table frame="none" pgwide="1" id="v4l2-event-vsync"> | |
| 145 | + <title>struct <structname>v4l2_event_vsync</structname></title> | |
| 146 | + <tgroup cols="3"> | |
| 147 | + &cs-str; | |
| 148 | + <tbody valign="top"> | |
| 149 | + <row> | |
| 150 | + <entry>__u8</entry> | |
| 151 | + <entry><structfield>field</structfield></entry> | |
| 152 | + <entry>The upcoming field. See &v4l2-field;.</entry> | |
| 153 | + </row> | |
| 154 | + </tbody> | |
| 155 | + </tgroup> | |
| 156 | + </table> | |
| 157 | + | |
| 158 | + <table frame="none" pgwide="1" id="v4l2-event-ctrl"> | |
| 159 | + <title>struct <structname>v4l2_event_ctrl</structname></title> | |
| 160 | + <tgroup cols="4"> | |
| 161 | + &cs-str; | |
| 162 | + <tbody valign="top"> | |
| 163 | + <row> | |
| 164 | + <entry>__u32</entry> | |
| 165 | + <entry><structfield>changes</structfield></entry> | |
| 166 | + <entry></entry> | |
| 167 | + <entry>A bitmask that tells what has changed. See <xref linkend="changes-flags" />.</entry> | |
| 168 | + </row> | |
| 169 | + <row> | |
| 170 | + <entry>__u32</entry> | |
| 171 | + <entry><structfield>type</structfield></entry> | |
| 172 | + <entry></entry> | |
| 173 | + <entry>The type of the control. See &v4l2-ctrl-type;.</entry> | |
| 174 | + </row> | |
| 175 | + <row> | |
| 176 | + <entry>union (anonymous)</entry> | |
| 177 | + <entry></entry> | |
| 178 | + <entry></entry> | |
| 179 | + <entry></entry> | |
| 180 | + </row> | |
| 181 | + <row> | |
| 182 | + <entry></entry> | |
| 183 | + <entry>__s32</entry> | |
| 184 | + <entry><structfield>value</structfield></entry> | |
| 185 | + <entry>The 32-bit value of the control for 32-bit control types. | |
| 186 | + This is 0 for string controls since the value of a string | |
| 187 | + cannot be passed using &VIDIOC-DQEVENT;.</entry> | |
| 188 | + </row> | |
| 189 | + <row> | |
| 190 | + <entry></entry> | |
| 191 | + <entry>__s64</entry> | |
| 192 | + <entry><structfield>value64</structfield></entry> | |
| 193 | + <entry>The 64-bit value of the control for 64-bit control types.</entry> | |
| 194 | + </row> | |
| 195 | + <row> | |
| 196 | + <entry>__u32</entry> | |
| 197 | + <entry><structfield>flags</structfield></entry> | |
| 198 | + <entry></entry> | |
| 199 | + <entry>The control flags. See <xref linkend="control-flags" />.</entry> | |
| 200 | + </row> | |
| 201 | + <row> | |
| 202 | + <entry>__s32</entry> | |
| 203 | + <entry><structfield>minimum</structfield></entry> | |
| 204 | + <entry></entry> | |
| 205 | + <entry>The minimum value of the control. See &v4l2-queryctrl;.</entry> | |
| 206 | + </row> | |
| 207 | + <row> | |
| 208 | + <entry>__s32</entry> | |
| 209 | + <entry><structfield>maximum</structfield></entry> | |
| 210 | + <entry></entry> | |
| 211 | + <entry>The maximum value of the control. See &v4l2-queryctrl;.</entry> | |
| 212 | + </row> | |
| 213 | + <row> | |
| 214 | + <entry>__s32</entry> | |
| 215 | + <entry><structfield>step</structfield></entry> | |
| 216 | + <entry></entry> | |
| 217 | + <entry>The step value of the control. See &v4l2-queryctrl;.</entry> | |
| 218 | + </row> | |
| 219 | + <row> | |
| 220 | + <entry>__s32</entry> | |
| 221 | + <entry><structfield>default_value</structfield></entry> | |
| 222 | + <entry></entry> | |
| 223 | + <entry>The default value value of the control. See &v4l2-queryctrl;.</entry> | |
| 224 | + </row> | |
| 225 | + </tbody> | |
| 226 | + </tgroup> | |
| 227 | + </table> | |
| 228 | + | |
| 229 | + <table frame="none" pgwide="1" id="v4l2-event-frame-sync"> | |
| 230 | + <title>struct <structname>v4l2_event_frame_sync</structname></title> | |
| 231 | + <tgroup cols="3"> | |
| 232 | + &cs-str; | |
| 233 | + <tbody valign="top"> | |
| 234 | + <row> | |
| 235 | + <entry>__u32</entry> | |
| 236 | + <entry><structfield>frame_sequence</structfield></entry> | |
| 237 | + <entry> | |
| 238 | + The sequence number of the frame being received. | |
| 239 | + </entry> | |
| 240 | + </row> | |
| 241 | + </tbody> | |
| 242 | + </tgroup> | |
| 243 | + </table> | |
| 244 | + | |
| 245 | + <table pgwide="1" frame="none" id="changes-flags"> | |
| 246 | + <title>Changes</title> | |
| 247 | + <tgroup cols="3"> | |
| 248 | + &cs-def; | |
| 249 | + <tbody valign="top"> | |
| 250 | + <row> | |
| 251 | + <entry><constant>V4L2_EVENT_CTRL_CH_VALUE</constant></entry> | |
| 252 | + <entry>0x0001</entry> | |
| 253 | + <entry>This control event was triggered because the value of the control | |
| 254 | + changed. Special case: if a button control is pressed, then this | |
| 255 | + event is sent as well, even though there is not explicit value | |
| 256 | + associated with a button control.</entry> | |
| 257 | + </row> | |
| 258 | + <row> | |
| 259 | + <entry><constant>V4L2_EVENT_CTRL_CH_FLAGS</constant></entry> | |
| 260 | + <entry>0x0002</entry> | |
| 261 | + <entry>This control event was triggered because the control flags | |
| 262 | + changed.</entry> | |
| 263 | + </row> | |
| 264 | + </tbody> | |
| 265 | + </tgroup> | |
| 266 | + </table> | |
| 138 | 267 | </refsect1> |
| 139 | 268 | <refsect1> |
| 140 | 269 | &return-value; |
| @@ -0,0 +1,88 @@ | ||
| 1 | +<refentry id="vidioc-prepare-buf"> | |
| 2 | + <refmeta> | |
| 3 | + <refentrytitle>ioctl VIDIOC_PREPARE_BUF</refentrytitle> | |
| 4 | + &manvol; | |
| 5 | + </refmeta> | |
| 6 | + | |
| 7 | + <refnamediv> | |
| 8 | + <refname>VIDIOC_PREPARE_BUF</refname> | |
| 9 | + <refpurpose>Prepare a buffer for I/O</refpurpose> | |
| 10 | + </refnamediv> | |
| 11 | + | |
| 12 | + <refsynopsisdiv> | |
| 13 | + <funcsynopsis> | |
| 14 | + <funcprototype> | |
| 15 | + <funcdef>int <function>ioctl</function></funcdef> | |
| 16 | + <paramdef>int <parameter>fd</parameter></paramdef> | |
| 17 | + <paramdef>int <parameter>request</parameter></paramdef> | |
| 18 | + <paramdef>struct v4l2_buffer *<parameter>argp</parameter></paramdef> | |
| 19 | + </funcprototype> | |
| 20 | + </funcsynopsis> | |
| 21 | + </refsynopsisdiv> | |
| 22 | + | |
| 23 | + <refsect1> | |
| 24 | + <title>Arguments</title> | |
| 25 | + | |
| 26 | + <variablelist> | |
| 27 | + <varlistentry> | |
| 28 | + <term><parameter>fd</parameter></term> | |
| 29 | + <listitem> | |
| 30 | + <para>&fd;</para> | |
| 31 | + </listitem> | |
| 32 | + </varlistentry> | |
| 33 | + <varlistentry> | |
| 34 | + <term><parameter>request</parameter></term> | |
| 35 | + <listitem> | |
| 36 | + <para>VIDIOC_PREPARE_BUF</para> | |
| 37 | + </listitem> | |
| 38 | + </varlistentry> | |
| 39 | + <varlistentry> | |
| 40 | + <term><parameter>argp</parameter></term> | |
| 41 | + <listitem> | |
| 42 | + <para></para> | |
| 43 | + </listitem> | |
| 44 | + </varlistentry> | |
| 45 | + </variablelist> | |
| 46 | + </refsect1> | |
| 47 | + | |
| 48 | + <refsect1> | |
| 49 | + <title>Description</title> | |
| 50 | + | |
| 51 | + <para>Applications can optionally call the | |
| 52 | +<constant>VIDIOC_PREPARE_BUF</constant> ioctl to pass ownership of the buffer | |
| 53 | +to the driver before actually enqueuing it, using the | |
| 54 | +<constant>VIDIOC_QBUF</constant> ioctl, and to prepare it for future I/O. | |
| 55 | +Such preparations may include cache invalidation or cleaning. Performing them | |
| 56 | +in advance saves time during the actual I/O. In case such cache operations are | |
| 57 | +not required, the application can use one of | |
| 58 | +<constant>V4L2_BUF_FLAG_NO_CACHE_INVALIDATE</constant> and | |
| 59 | +<constant>V4L2_BUF_FLAG_NO_CACHE_CLEAN</constant> flags to skip the respective | |
| 60 | +step.</para> | |
| 61 | + | |
| 62 | + <para>The <structname>v4l2_buffer</structname> structure is | |
| 63 | +specified in <xref linkend="buffer" />.</para> | |
| 64 | + </refsect1> | |
| 65 | + | |
| 66 | + <refsect1> | |
| 67 | + &return-value; | |
| 68 | + | |
| 69 | + <variablelist> | |
| 70 | + <varlistentry> | |
| 71 | + <term><errorcode>EBUSY</errorcode></term> | |
| 72 | + <listitem> | |
| 73 | + <para>File I/O is in progress.</para> | |
| 74 | + </listitem> | |
| 75 | + </varlistentry> | |
| 76 | + <varlistentry> | |
| 77 | + <term><errorcode>EINVAL</errorcode></term> | |
| 78 | + <listitem> | |
| 79 | + <para>The buffer <structfield>type</structfield> is not | |
| 80 | +supported, or the <structfield>index</structfield> is out of bounds, | |
| 81 | +or no buffers have been allocated yet, or the | |
| 82 | +<structfield>userptr</structfield> or | |
| 83 | +<structfield>length</structfield> are invalid.</para> | |
| 84 | + </listitem> | |
| 85 | + </varlistentry> | |
| 86 | + </variablelist> | |
| 87 | + </refsect1> | |
| 88 | +</refentry> | |
| @@ -406,6 +406,15 @@ flag is typically present for relative controls or action controls where · 405 unmodified lines | ||
| 406 | 406 | writing a value will cause the device to carry out a given action |
| 407 | 407 | (⪚ motor control) but no meaningful value can be returned.</entry> |
| 408 | 408 | </row> |
| 409 | + <row> | |
| 410 | + <entry><constant>V4L2_CTRL_FLAG_VOLATILE</constant></entry> | |
| 411 | + <entry>0x0080</entry> | |
| 412 | + <entry>This control is volatile, which means that the value of the control | |
| 413 | +changes continuously. A typical example would be the current gain value if the device | |
| 414 | +is in auto-gain mode. In such a case the hardware calculates the gain value based on | |
| 415 | +the lighting conditions which can change over time. Note that setting a new value for | |
| 416 | +a volatile control will have no effect. The new value will just be ignored.</entry> | |
| 417 | + </row> | |
| 409 | 418 | </tbody> |
| 410 | 419 | </tgroup> |
| 411 | 420 | </table> |
| @@ -138,6 +138,22 @@ · 137 unmodified lines | ||
| 138 | 138 | field of the oldest event.</para> |
| 139 | 139 | </entry> |
| 140 | 140 | </row> |
| 141 | + <row> | |
| 142 | + <entry><constant>V4L2_EVENT_FRAME_SYNC</constant></entry> | |
| 143 | + <entry>4</entry> | |
| 144 | + <entry> | |
| 145 | + <para>Triggered immediately when the reception of a | |
| 146 | + frame has begun. This event has a | |
| 147 | + &v4l2-event-frame-sync; associated with it.</para> | |
| 148 | + | |
| 149 | + <para>If the hardware needs to be stopped in the case of a | |
| 150 | + buffer underrun it might not be able to generate this event. | |
| 151 | + In such cases the <structfield>frame_sequence</structfield> | |
| 152 | + field in &v4l2-event-frame-sync; will not be incremented. This | |
| 153 | + causes two consecutive frame sequence numbers to have n times | |
| 154 | + frame interval in between them.</para> | |
| 155 | + </entry> | |
| 156 | + </row> | |
| 141 | 157 | <row> |
| 142 | 158 | <entry><constant>V4L2_EVENT_PRIVATE_START</constant></entry> |
| 143 | 159 | <entry>0x08000000</entry> |
| @@ -183,113 +199,6 @@ · 39 unmodified lines | ||
| 183 | 199 | </tgroup> |
| 184 | 200 | </table> |
| 185 | 201 | |
| 186 | − <table frame="none" pgwide="1" id="v4l2-event-vsync"> | |
| 187 | − <title>struct <structname>v4l2_event_vsync</structname></title> | |
| 188 | − <tgroup cols="3"> | |
| 189 | − &cs-str; | |
| 190 | − <tbody valign="top"> | |
| 191 | − <row> | |
| 192 | − <entry>__u8</entry> | |
| 193 | − <entry><structfield>field</structfield></entry> | |
| 194 | − <entry>The upcoming field. See &v4l2-field;.</entry> | |
| 195 | − </row> | |
| 196 | − </tbody> | |
| 197 | − </tgroup> | |
| 198 | − </table> | |
| 199 | − | |
| 200 | − <table frame="none" pgwide="1" id="v4l2-event-ctrl"> | |
| 201 | − <title>struct <structname>v4l2_event_ctrl</structname></title> | |
| 202 | − <tgroup cols="4"> | |
| 203 | − &cs-str; | |
| 204 | − <tbody valign="top"> | |
| 205 | − <row> | |
| 206 | − <entry>__u32</entry> | |
| 207 | − <entry><structfield>changes</structfield></entry> | |
| 208 | − <entry></entry> | |
| 209 | − <entry>A bitmask that tells what has changed. See <xref linkend="changes-flags" />.</entry> | |
| 210 | − </row> | |
| 211 | − <row> | |
| 212 | − <entry>__u32</entry> | |
| 213 | − <entry><structfield>type</structfield></entry> | |
| 214 | − <entry></entry> | |
| 215 | − <entry>The type of the control. See &v4l2-ctrl-type;.</entry> | |
| 216 | − </row> | |
| 217 | − <row> | |
| 218 | − <entry>union (anonymous)</entry> | |
| 219 | − <entry></entry> | |
| 220 | − <entry></entry> | |
| 221 | − <entry></entry> | |
| 222 | − </row> | |
| 223 | − <row> | |
| 224 | − <entry></entry> | |
| 225 | − <entry>__s32</entry> | |
| 226 | − <entry><structfield>value</structfield></entry> | |
| 227 | − <entry>The 32-bit value of the control for 32-bit control types. | |
| 228 | − This is 0 for string controls since the value of a string | |
| 229 | − cannot be passed using &VIDIOC-DQEVENT;.</entry> | |
| 230 | − </row> | |
| 231 | − <row> | |
| 232 | − <entry></entry> | |
| 233 | − <entry>__s64</entry> | |
| 234 | − <entry><structfield>value64</structfield></entry> | |
| 235 | − <entry>The 64-bit value of the control for 64-bit control types.</entry> | |
| 236 | − </row> | |
| 237 | − <row> | |
| 238 | − <entry>__u32</entry> | |
| 239 | − <entry><structfield>flags</structfield></entry> | |
| 240 | − <entry></entry> | |
| 241 | − <entry>The control flags. See <xref linkend="control-flags" />.</entry> | |
| 242 | − </row> | |
| 243 | − <row> | |
| 244 | − <entry>__s32</entry> | |
| 245 | − <entry><structfield>minimum</structfield></entry> | |
| 246 | − <entry></entry> | |
| 247 | − <entry>The minimum value of the control. See &v4l2-queryctrl;.</entry> | |
| 248 | − </row> | |
| 249 | − <row> | |
| 250 | − <entry>__s32</entry> | |
| 251 | − <entry><structfield>maximum</structfield></entry> | |
| 252 | − <entry></entry> | |
| 253 | − <entry>The maximum value of the control. See &v4l2-queryctrl;.</entry> | |
| 254 | − </row> | |
| 255 | − <row> | |
| 256 | − <entry>__s32</entry> | |
| 257 | − <entry><structfield>step</structfield></entry> | |
| 258 | − <entry></entry> | |
| 259 | − <entry>The step value of the control. See &v4l2-queryctrl;.</entry> | |
| 260 | − </row> | |
| 261 | − <row> | |
| 262 | − <entry>__s32</entry> | |
| 263 | − <entry><structfield>default_value</structfield></entry> | |
| 264 | − <entry></entry> | |
| 265 | − <entry>The default value value of the control. See &v4l2-queryctrl;.</entry> | |
| 266 | − </row> | |
| 267 | − </tbody> | |
| 268 | − </tgroup> | |
| 269 | − </table> | |
| 270 | − | |
| 271 | − <table pgwide="1" frame="none" id="changes-flags"> | |
| 272 | − <title>Changes</title> | |
| 273 | − <tgroup cols="3"> | |
| 274 | − &cs-def; | |
| 275 | − <tbody valign="top"> | |
| 276 | − <row> | |
| 277 | − <entry><constant>V4L2_EVENT_CTRL_CH_VALUE</constant></entry> | |
| 278 | − <entry>0x0001</entry> | |
| 279 | − <entry>This control event was triggered because the value of the control | |
| 280 | − changed. Special case: if a button control is pressed, then this | |
| 281 | − event is sent as well, even though there is not explicit value | |
| 282 | − associated with a button control.</entry> | |
| 283 | − </row> | |
| 284 | − <row> | |
| 285 | − <entry><constant>V4L2_EVENT_CTRL_CH_FLAGS</constant></entry> | |
| 286 | − <entry>0x0002</entry> | |
| 287 | − <entry>This control event was triggered because the control flags | |
| 288 | − changed.</entry> | |
| 289 | − </row> | |
| 290 | − </tbody> | |
| 291 | − </tgroup> | |
| 292 | − </table> | |
| 293 | 202 | </refsect1> |
| 294 | 203 | <refsect1> |
| 295 | 204 | &return-value; |
| @@ -572,7 +572,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip) · 571 unmodified lines | ||
| 572 | 572 | </para> |
| 573 | 573 | <para> |
| 574 | 574 | The simplest way to activate the FLASH based bad block table support |
| 575 | − is to set the option NAND_USE_FLASH_BBT in the option field of | |
| 575 | + is to set the option NAND_BBT_USE_FLASH in the bbt_option field of | |
| 576 | 576 | the nand chip structure before calling nand_scan(). For AG-AND |
| 577 | 577 | chips is this done by default. |
| 578 | 578 | This activates the default FLASH based bad block table functionality |
| @@ -773,20 +773,6 @@ struct nand_oobinfo { · 194 unmodified lines | ||
| 773 | 773 | done according to the default builtin scheme. |
| 774 | 774 | </para> |
| 775 | 775 | </sect2> |
| 776 | − <sect2 id="User_space_placement_selection"> | |
| 777 | − <title>User space placement selection</title> | |
| 778 | − <para> | |
| 779 | − All non ecc functions like mtd->read and mtd->write use an internal | |
| 780 | − structure, which can be set by an ioctl. This structure is preset | |
| 781 | − to the autoplacement default. | |
| 782 | − <programlisting> | |
| 783 | − ioctl (fd, MEMSETOOBSEL, oobsel); | |
| 784 | − </programlisting> | |
| 785 | − oobsel is a pointer to a user supplied structure of type | |
| 786 | − nand_oobconfig. The contents of this structure must match the | |
| 787 | − criteria of the filesystem, which will be used. See an example in utils/nandwrite.c. | |
| 788 | − </para> | |
| 789 | − </sect2> | |
| 790 | 776 | </sect1> |
| 791 | 777 | <sect1 id="Spare_area_autoplacement_default"> |
| 792 | 778 | <title>Spare area autoplacement default schemes</title> |
| @@ -1158,9 +1144,6 @@ in this page</entry> · 365 unmodified lines | ||
| 1158 | 1144 | These constants are defined in nand.h. They are ored together to describe |
| 1159 | 1145 | the functionality. |
| 1160 | 1146 | <programlisting> |
| 1161 | −/* Use a flash based bad block table. This option is parsed by the | |
| 1162 | − * default bad block table function (nand_default_bbt). */ | |
| 1163 | −#define NAND_USE_FLASH_BBT 0x00010000 | |
| 1164 | 1147 | /* The hw ecc generator provides a syndrome instead a ecc value on read |
| 1165 | 1148 | * This can only work if we have the ecc bytes directly behind the |
| 1166 | 1149 | * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */ |
| @@ -529,7 +529,7 @@ memory (e.g. allocated with <function>kmalloc()</function>). There's also · 528 unmodified lines | ||
| 529 | 529 | </para></listitem> |
| 530 | 530 | |
| 531 | 531 | <listitem><para> |
| 532 | −<varname>unsigned long addr</varname>: Required if the mapping is used. | |
| 532 | +<varname>phys_addr_t addr</varname>: Required if the mapping is used. | |
| 533 | 533 | Fill in the address of your memory block. This address is the one that |
| 534 | 534 | appears in sysfs. |
| 535 | 535 | </para></listitem> |
| @@ -4288,7 +4288,7 @@ struct _snd_pcm_runtime { · 4287 unmodified lines | ||
| 4288 | 4288 | <![CDATA[ |
| 4289 | 4289 | struct snd_rawmidi *rmidi; |
| 4290 | 4290 | snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, port, info_flags, |
| 4291 | − irq, irq_flags, &rmidi); | |
| 4291 | + irq, &rmidi); | |
| 4292 | 4292 | ]]> |
| 4293 | 4293 | </programlisting> |
| 4294 | 4294 | </informalexample> |
| @@ -4343,6 +4343,13 @@ struct _snd_pcm_runtime { · 48 unmodified lines | ||
| 4343 | 4343 | by itself to start processing the output stream in the irq handler. |
| 4344 | 4344 | </para> |
| 4345 | 4345 | |
| 4346 | + <para> | |
| 4347 | + If the MPU-401 interface shares its interrupt with the other logical | |
| 4348 | + devices on the card, set <constant>MPU401_INFO_IRQ_HOOK</constant> | |
| 4349 | + (see <link linkend="midi-interface-interrupt-handler"><citetitle> | |
| 4350 | + below</citetitle></link>). | |
| 4351 | + </para> | |
| 4352 | + | |
| 4346 | 4353 | <para> |
| 4347 | 4354 | Usually, the port address corresponds to the command port and |
| 4348 | 4355 | port + 1 corresponds to the data port. If not, you may change |
| @@ -4375,14 +4382,12 @@ struct _snd_pcm_runtime { · 26 unmodified lines | ||
| 4375 | 4382 | </para> |
| 4376 | 4383 | |
| 4377 | 4384 | <para> |
| 4378 | − The 6th argument specifies the irq number for UART. If the irq | |
| 4379 | − is already allocated, pass 0 to the 7th argument | |
| 4380 | − (<parameter>irq_flags</parameter>). Otherwise, pass the flags | |
| 4381 | − for irq allocation | |
| 4382 | − (<constant>SA_XXX</constant> bits) to it, and the irq will be | |
| 4383 | − reserved by the mpu401-uart layer. If the card doesn't generate | |
| 4384 | − UART interrupts, pass -1 as the irq number. Then a timer | |
| 4385 | − interrupt will be invoked for polling. | |
| 4385 | + The 6th argument specifies the ISA irq number that will be | |
| 4386 | + allocated. If no interrupt is to be allocated (because your | |
| 4387 | + code is already allocating a shared interrupt, or because the | |
| 4388 | + device does not use interrupts), pass -1 instead. | |
| 4389 | + For a MPU-401 device without an interrupt, a polling timer | |
| 4390 | + will be used instead. | |
| 4386 | 4391 | </para> |
| 4387 | 4392 | </section> |
| 4388 | 4393 | |
| @@ -4390,12 +4395,13 @@ struct _snd_pcm_runtime { · 1 unmodified line | ||
| 4390 | 4395 | <title>Interrupt Handler</title> |
| 4391 | 4396 | <para> |
| 4392 | 4397 | When the interrupt is allocated in |
| 4393 | − <function>snd_mpu401_uart_new()</function>, the private | |
| 4394 | − interrupt handler is used, hence you don't have anything else to do | |
| 4395 | − than creating the mpu401 stuff. Otherwise, you have to call | |
| 4396 | − <function>snd_mpu401_uart_interrupt()</function> explicitly when | |
| 4397 | − a UART interrupt is invoked and checked in your own interrupt | |
| 4398 | − handler. | |
| 4398 | + <function>snd_mpu401_uart_new()</function>, an exclusive ISA | |
| 4399 | + interrupt handler is automatically used, hence you don't have | |
| 4400 | + anything else to do than creating the mpu401 stuff. Otherwise, you | |
| 4401 | + have to set <constant>MPU401_INFO_IRQ_HOOK</constant>, and call | |
| 4402 | + <function>snd_mpu401_uart_interrupt()</function> explicitly from your | |
| 4403 | + own interrupt handler when it has determined that a UART interrupt | |
| 4404 | + has occurred. | |
| 4399 | 4405 | </para> |
| 4400 | 4406 | |
| 4401 | 4407 | <para> |
| @@ -95,7 +95,7 @@ not to return until all ongoing NMI handlers exit. It is therefore safe · 94 unmodified lines | ||
| 95 | 95 | to free up the handler's data as soon as synchronize_sched() returns. |
| 96 | 96 | |
| 97 | 97 | Important note: for this to work, the architecture in question must |
| 98 | −invoke irq_enter() and irq_exit() on NMI entry and exit, respectively. | |
| 98 | +invoke nmi_enter() and nmi_exit() on NMI entry and exit, respectively. | |
| 99 | 99 | |
| 100 | 100 | |
| 101 | 101 | Answer to Quick Quiz |
| @@ -0,0 +1,110 @@ | ||
| 1 | +Lockdep-RCU was added to the Linux kernel in early 2010 | |
| 2 | +(http://lwn.net/Articles/371986/). This facility checks for some common | |
| 3 | +misuses of the RCU API, most notably using one of the rcu_dereference() | |
| 4 | +family to access an RCU-protected pointer without the proper protection. | |
| 5 | +When such misuse is detected, an lockdep-RCU splat is emitted. | |
| 6 | + | |
| 7 | +The usual cause of a lockdep-RCU slat is someone accessing an | |
| 8 | +RCU-protected data structure without either (1) being in the right kind of | |
| 9 | +RCU read-side critical section or (2) holding the right update-side lock. | |
| 10 | +This problem can therefore be serious: it might result in random memory | |
| 11 | +overwriting or worse. There can of course be false positives, this | |
| 12 | +being the real world and all that. | |
| 13 | + | |
| 14 | +So let's look at an example RCU lockdep splat from 3.0-rc5, one that | |
| 15 | +has long since been fixed: | |
| 16 | + | |
| 17 | +=============================== | |
| 18 | +[ INFO: suspicious RCU usage. ] | |
| 19 | +------------------------------- | |
| 20 | +block/cfq-iosched.c:2776 suspicious rcu_dereference_protected() usage! | |
| 21 | + | |
| 22 | +other info that might help us debug this: | |
| 23 | + | |
| 24 | + | |
| 25 | +rcu_scheduler_active = 1, debug_locks = 0 | |
| 26 | +3 locks held by scsi_scan_6/1552: | |
| 27 | + #0: (&shost->scan_mutex){+.+.+.}, at: [<ffffffff8145efca>] | |
| 28 | +scsi_scan_host_selected+0x5a/0x150 | |
| 29 | + #1: (&eq->sysfs_lock){+.+...}, at: [<ffffffff812a5032>] | |
| 30 | +elevator_exit+0x22/0x60 | |
| 31 | + #2: (&(&q->__queue_lock)->rlock){-.-...}, at: [<ffffffff812b6233>] | |
| 32 | +cfq_exit_queue+0x43/0x190 | |
| 33 | + | |
| 34 | +stack backtrace: | |
| 35 | +Pid: 1552, comm: scsi_scan_6 Not tainted 3.0.0-rc5 #17 | |
| 36 | +Call Trace: | |
| 37 | + [<ffffffff810abb9b>] lockdep_rcu_dereference+0xbb/0xc0 | |
| 38 | + [<ffffffff812b6139>] __cfq_exit_single_io_context+0xe9/0x120 | |
| 39 | + [<ffffffff812b626c>] cfq_exit_queue+0x7c/0x190 | |
| 40 | + [<ffffffff812a5046>] elevator_exit+0x36/0x60 | |
| 41 | + [<ffffffff812a802a>] blk_cleanup_queue+0x4a/0x60 | |
| 42 | + [<ffffffff8145cc09>] scsi_free_queue+0x9/0x10 | |
| 43 | + [<ffffffff81460944>] __scsi_remove_device+0x84/0xd0 | |
| 44 | + [<ffffffff8145dca3>] scsi_probe_and_add_lun+0x353/0xb10 | |
| 45 | + [<ffffffff817da069>] ? error_exit+0x29/0xb0 | |
| 46 | + [<ffffffff817d98ed>] ? _raw_spin_unlock_irqrestore+0x3d/0x80 | |
| 47 | + [<ffffffff8145e722>] __scsi_scan_target+0x112/0x680 | |
| 48 | + [<ffffffff812c690d>] ? trace_hardirqs_off_thunk+0x3a/0x3c | |
| 49 | + [<ffffffff817da069>] ? error_exit+0x29/0xb0 | |
| 50 | + [<ffffffff812bcc60>] ? kobject_del+0x40/0x40 | |
| 51 | + [<ffffffff8145ed16>] scsi_scan_channel+0x86/0xb0 | |
| 52 | + [<ffffffff8145f0b0>] scsi_scan_host_selected+0x140/0x150 | |
| 53 | + [<ffffffff8145f149>] do_scsi_scan_host+0x89/0x90 | |
| 54 | + [<ffffffff8145f170>] do_scan_async+0x20/0x160 | |
| 55 | + [<ffffffff8145f150>] ? do_scsi_scan_host+0x90/0x90 | |
| 56 | + [<ffffffff810975b6>] kthread+0xa6/0xb0 | |
| 57 | + [<ffffffff817db154>] kernel_thread_helper+0x4/0x10 | |
| 58 | + [<ffffffff81066430>] ? finish_task_switch+0x80/0x110 | |
| 59 | + [<ffffffff817d9c04>] ? retint_restore_args+0xe/0xe | |
| 60 | + [<ffffffff81097510>] ? __init_kthread_worker+0x70/0x70 | |
| 61 | + [<ffffffff817db150>] ? gs_change+0xb/0xb | |
| 62 | + | |
| 63 | +Line 2776 of block/cfq-iosched.c in v3.0-rc5 is as follows: | |
| 64 | + | |
| 65 | + if (rcu_dereference(ioc->ioc_data) == cic) { | |
| 66 | + | |
| 67 | +This form says that it must be in a plain vanilla RCU read-side critical | |
| 68 | +section, but the "other info" list above shows that this is not the | |
| 69 | +case. Instead, we hold three locks, one of which might be RCU related. | |
| 70 | +And maybe that lock really does protect this reference. If so, the fix | |
| 71 | +is to inform RCU, perhaps by changing __cfq_exit_single_io_context() to | |
| 72 | +take the struct request_queue "q" from cfq_exit_queue() as an argument, | |
| 73 | +which would permit us to invoke rcu_dereference_protected as follows: | |
| 74 | + | |
| 75 | + if (rcu_dereference_protected(ioc->ioc_data, | |
| 76 | + lockdep_is_held(&q->queue_lock)) == cic) { | |
| 77 | + | |
| 78 | +With this change, there would be no lockdep-RCU splat emitted if this | |
| 79 | +code was invoked either from within an RCU read-side critical section | |
| 80 | +or with the ->queue_lock held. In particular, this would have suppressed | |
| 81 | +the above lockdep-RCU splat because ->queue_lock is held (see #2 in the | |
| 82 | +list above). | |
| 83 | + | |
| 84 | +On the other hand, perhaps we really do need an RCU read-side critical | |
| 85 | +section. In this case, the critical section must span the use of the | |
| 86 | +return value from rcu_dereference(), or at least until there is some | |
| 87 | +reference count incremented or some such. One way to handle this is to | |
| 88 | +add rcu_read_lock() and rcu_read_unlock() as follows: | |
| 89 | + | |
| 90 | + rcu_read_lock(); | |
| 91 | + if (rcu_dereference(ioc->ioc_data) == cic) { | |
| 92 | + spin_lock(&ioc->lock); | |
| 93 | + rcu_assign_pointer(ioc->ioc_data, NULL); | |
| 94 | + spin_unlock(&ioc->lock); | |
| 95 | + } | |
| 96 | + rcu_read_unlock(); | |
| 97 | + | |
| 98 | +With this change, the rcu_dereference() is always within an RCU | |
| 99 | +read-side critical section, which again would have suppressed the | |
| 100 | +above lockdep-RCU splat. | |
| 101 | + | |
| 102 | +But in this particular case, we don't actually deference the pointer | |
| 103 | +returned from rcu_dereference(). Instead, that pointer is just compared | |
| 104 | +to the cic pointer, which means that the rcu_dereference() can be replaced | |
| 105 | +by rcu_access_pointer() as follows: | |
| 106 | + | |
| 107 | + if (rcu_access_pointer(ioc->ioc_data) == cic) { | |
| 108 | + | |
| 109 | +Because it is legal to invoke rcu_access_pointer() without protection, | |
| 110 | +this change would also suppress the above lockdep-RCU splat. | |
| @@ -32,9 +32,27 @@ checking of rcu_dereference() primitives: · 31 unmodified lines | ||
| 32 | 32 | srcu_dereference(p, sp): |
| 33 | 33 | Check for SRCU read-side critical section. |
| 34 | 34 | rcu_dereference_check(p, c): |
| 35 | − Use explicit check expression "c". This is useful in | |
| 36 | − code that is invoked by both readers and updaters. | |
| 37 | − rcu_dereference_raw(p) | |
| 35 | + Use explicit check expression "c" along with | |
| 36 | + rcu_read_lock_held(). This is useful in code that is | |
| 37 | + invoked by both RCU readers and updaters. | |
| 38 | + rcu_dereference_bh_check(p, c): | |
| 39 | + Use explicit check expression "c" along with | |
| 40 | + rcu_read_lock_bh_held(). This is useful in code that | |
| 41 | + is invoked by both RCU-bh readers and updaters. | |
| 42 | + rcu_dereference_sched_check(p, c): | |
| 43 | + Use explicit check expression "c" along with | |
| 44 | + rcu_read_lock_sched_held(). This is useful in code that | |
| 45 | + is invoked by both RCU-sched readers and updaters. | |
| 46 | + srcu_dereference_check(p, c): | |
| 47 | + Use explicit check expression "c" along with | |
| 48 | + srcu_read_lock_held()(). This is useful in code that | |
| 49 | + is invoked by both SRCU readers and updaters. | |
| 50 | + rcu_dereference_index_check(p, c): | |
| 51 | + Use explicit check expression "c", but the caller | |
| 52 | + must supply one of the rcu_read_lock_held() functions. | |
| 53 | + This is useful in code that uses RCU-protected arrays | |
| 54 | + that is invoked by both RCU readers and updaters. | |
| 55 | + rcu_dereference_raw(p): | |
| 38 | 56 | Don't check. (Use sparingly, if at all.) |
| 39 | 57 | rcu_dereference_protected(p, c): |
| 40 | 58 | Use explicit check expression "c", and omit all barriers |
| @@ -48,13 +66,11 @@ checking of rcu_dereference() primitives: · 7 unmodified lines | ||
| 48 | 66 | value of the pointer itself, for example, against NULL. |
| 49 | 67 | |
| 50 | 68 | The rcu_dereference_check() check expression can be any boolean |
| 51 | −expression, but would normally include one of the rcu_read_lock_held() | |
| 52 | −family of functions and a lockdep expression. However, any boolean | |
| 53 | −expression can be used. For a moderately ornate example, consider | |
| 54 | −the following: | |
| 69 | +expression, but would normally include a lockdep expression. However, | |
| 70 | +any boolean expression can be used. For a moderately ornate example, | |
| 71 | +consider the following: | |
| 55 | 72 | |
| 56 | 73 | file = rcu_dereference_check(fdt->fd[fd], |
| 57 | − rcu_read_lock_held() || | |
| 58 | 74 | lockdep_is_held(&files->file_lock) || |
| 59 | 75 | atomic_read(&files->count) == 1); |
| 60 | 76 | |
| @@ -62,7 +78,7 @@ This expression picks up the pointer "fdt->fd[fd]" in an RCU-safe manner, · 1 unmodified line | ||
| 62 | 78 | and, if CONFIG_PROVE_RCU is configured, verifies that this expression |
| 63 | 79 | is used in: |
| 64 | 80 | |
| 65 | −1. An RCU read-side critical section, or | |
| 81 | +1. An RCU read-side critical section (implicit), or | |
| 66 | 82 | 2. with files->file_lock held, or |
| 67 | 83 | 3. on an unshared files_struct. |
| 68 | 84 | |
| @@ -42,7 +42,7 @@ fqs_holdoff Holdoff time (in microseconds) between consecutive calls · 41 unmodified lines | ||
| 42 | 42 | fqs_stutter Wait time (in seconds) between consecutive bursts |
| 43 | 43 | of calls to force_quiescent_state(). |
| 44 | 44 | |
| 45 | −irqreaders Says to invoke RCU readers from irq level. This is currently | |
| 45 | +irqreader Says to invoke RCU readers from irq level. This is currently | |
| 46 | 46 | done via timers. Defaults to "1" for variants of RCU that |
| 47 | 47 | permit this. (Or, more accurately, variants of RCU that do |
| 48 | 48 | -not- permit this know to ignore this variable.) |
| @@ -79,19 +79,68 @@ stutter The length of time to run the test before pausing for this · 30 unmodified lines | ||
| 79 | 79 | Specifying "stutter=0" causes the test to run continuously |
| 80 | 80 | without pausing, which is the old default behavior. |
| 81 | 81 | |
| 82 | +test_boost Whether or not to test the ability of RCU to do priority | |
| 83 | + boosting. Defaults to "test_boost=1", which performs | |
| 84 | + RCU priority-inversion testing only if the selected | |
| 85 | + RCU implementation supports priority boosting. Specifying | |
| 86 | + "test_boost=0" never performs RCU priority-inversion | |
| 87 | + testing. Specifying "test_boost=2" performs RCU | |
| 88 | + priority-inversion testing even if the selected RCU | |
| 89 | + implementation does not support RCU priority boosting, | |
| 90 | + which can be used to test rcutorture's ability to | |
| 91 | + carry out RCU priority-inversion testing. | |
| 92 | + | |
| 93 | +test_boost_interval | |
| 94 | + The number of seconds in an RCU priority-inversion test | |
| 95 | + cycle. Defaults to "test_boost_interval=7". It is | |
| 96 | + usually wise for this value to be relatively prime to | |
| 97 | + the value selected for "stutter". | |
| 98 | + | |
| 99 | +test_boost_duration | |
| 100 | + The number of seconds to do RCU priority-inversion testing | |
| 101 | + within any given "test_boost_interval". Defaults to | |
| 102 | + "test_boost_duration=4". | |
| 103 | + | |
| 82 | 104 | test_no_idle_hz Whether or not to test the ability of RCU to operate in |
| 83 | 105 | a kernel that disables the scheduling-clock interrupt to |
| 84 | 106 | idle CPUs. Boolean parameter, "1" to test, "0" otherwise. |
| 85 | 107 | Defaults to omitting this test. |
| 86 | 108 | |
| 87 | −torture_type The type of RCU to test: "rcu" for the rcu_read_lock() API, | |
| 88 | − "rcu_sync" for rcu_read_lock() with synchronous reclamation, | |
| 89 | − "rcu_bh" for the rcu_read_lock_bh() API, "rcu_bh_sync" for | |
| 90 | − rcu_read_lock_bh() with synchronous reclamation, "srcu" for | |
| 91 | − the "srcu_read_lock()" API, "sched" for the use of | |
| 92 | − preempt_disable() together with synchronize_sched(), | |
| 93 | − and "sched_expedited" for the use of preempt_disable() | |
| 94 | − with synchronize_sched_expedited(). | |
| 109 | +torture_type The type of RCU to test, with string values as follows: | |
| 110 | + | |
| 111 | + "rcu": rcu_read_lock(), rcu_read_unlock() and call_rcu(). | |
| 112 | + | |
| 113 | + "rcu_sync": rcu_read_lock(), rcu_read_unlock(), and | |
| 114 | + synchronize_rcu(). | |
| 115 | + | |
| 116 | + "rcu_expedited": rcu_read_lock(), rcu_read_unlock(), and | |
| 117 | + synchronize_rcu_expedited(). | |
| 118 | + | |
| 119 | + "rcu_bh": rcu_read_lock_bh(), rcu_read_unlock_bh(), and | |
| 120 | + call_rcu_bh(). | |
| 121 | + | |
| 122 | + "rcu_bh_sync": rcu_read_lock_bh(), rcu_read_unlock_bh(), | |
| 123 | + and synchronize_rcu_bh(). | |
| 124 | + | |
| 125 | + "rcu_bh_expedited": rcu_read_lock_bh(), rcu_read_unlock_bh(), | |
| 126 | + and synchronize_rcu_bh_expedited(). | |
| 127 | + | |
| 128 | + "srcu": srcu_read_lock(), srcu_read_unlock() and | |
| 129 | + synchronize_srcu(). | |
| 130 | + | |
| 131 | + "srcu_expedited": srcu_read_lock(), srcu_read_unlock() and | |
| 132 | + synchronize_srcu_expedited(). | |
| 133 | + | |
| 134 | + "sched": preempt_disable(), preempt_enable(), and | |
| 135 | + call_rcu_sched(). | |
| 136 | + | |
| 137 | + "sched_sync": preempt_disable(), preempt_enable(), and | |
| 138 | + synchronize_sched(). | |
| 139 | + | |
| 140 | + "sched_expedited": preempt_disable(), preempt_enable(), and | |
| 141 | + synchronize_sched_expedited(). | |
| 142 | + | |
| 143 | + Defaults to "rcu". | |
| 95 | 144 | |
| 96 | 145 | verbose Enable debug printk()s. Default is disabled. |
| 97 | 146 | |
| @@ -100,12 +149,12 @@ OUTPUT · 2 unmodified lines | ||
| 100 | 149 | |
| 101 | 150 | The statistics output is as follows: |
| 102 | 151 | |
| 103 | − rcu-torture: --- Start of test: nreaders=16 stat_interval=0 verbose=0 | |
| 104 | − rcu-torture: rtc: 0000000000000000 ver: 1916 tfle: 0 rta: 1916 rtaf: 0 rtf: 1915 | |
| 105 | − rcu-torture: Reader Pipe: 1466408 9747 0 0 0 0 0 0 0 0 0 | |
| 106 | − rcu-torture: Reader Batch: 1464477 11678 0 0 0 0 0 0 0 0 | |
| 107 | − rcu-torture: Free-Block Circulation: 1915 1915 1915 1915 1915 1915 1915 1915 1915 1915 0 | |
| 108 | − rcu-torture: --- End of test | |
| 152 | + rcu-torture:--- Start of test: nreaders=16 nfakewriters=4 stat_interval=30 verbose=0 test_no_idle_hz=1 shuffle_interval=3 stutter=5 irqreader=1 fqs_duration=0 fqs_holdoff=0 fqs_stutter=3 test_boost=1/0 test_boost_interval=7 test_boost_duration=4 | |
| 153 | + rcu-torture: rtc: (null) ver: 155441 tfle: 0 rta: 155441 rtaf: 8884 rtf: 155440 rtmbe: 0 rtbke: 0 rtbre: 0 rtbf: 0 rtb: 0 nt: 3055767 | |
| 154 | + rcu-torture: Reader Pipe: 727860534 34213 0 0 0 0 0 0 0 0 0 | |
| 155 | + rcu-torture: Reader Batch: 727877838 17003 0 0 0 0 0 0 0 0 0 | |
| 156 | + rcu-torture: Free-Block Circulation: 155440 155440 155440 155440 155440 155440 155440 155440 155440 155440 0 | |
| 157 | + rcu-torture:--- End of test: SUCCESS: nreaders=16 nfakewriters=4 stat_interval=30 verbose=0 test_no_idle_hz=1 shuffle_interval=3 stutter=5 irqreader=1 fqs_duration=0 fqs_holdoff=0 fqs_stutter=3 test_boost=1/0 test_boost_interval=7 test_boost_duration=4 | |
| 109 | 158 | |
| 110 | 159 | The command "dmesg | grep torture:" will extract this information on |
| 111 | 160 | most systems. On more esoteric configurations, it may be necessary to |
| @@ -113,26 +162,55 @@ use other commands to access the output of the printk()s used by · 1 unmodified line | ||
| 113 | 162 | the RCU torture test. The printk()s use KERN_ALERT, so they should |
| 114 | 163 | be evident. ;-) |
| 115 | 164 | |
| 165 | +The first and last lines show the rcutorture module parameters, and the | |
| 166 | +last line shows either "SUCCESS" or "FAILURE", based on rcutorture's | |
| 167 | +automatic determination as to whether RCU operated correctly. | |
| 168 | + | |
| 116 | 169 | The entries are as follows: |
| 117 | 170 | |
| 118 | 171 | o "rtc": The hexadecimal address of the structure currently visible |
| 119 | 172 | to readers. |
| 120 | 173 | |
| 121 | −o "ver": The number of times since boot that the rcutw writer task | |
| 174 | +o "ver": The number of times since boot that the RCU writer task | |
| 122 | 175 | has changed the structure visible to readers. |
| 123 | 176 | |
| 124 | 177 | o "tfle": If non-zero, indicates that the "torture freelist" |
| 125 | − containing structure to be placed into the "rtc" area is empty. | |
| 178 | + containing structures to be placed into the "rtc" area is empty. | |
| 126 | 179 | This condition is important, since it can fool you into thinking |
| 127 | 180 | that RCU is working when it is not. :-/ |
| 128 | 181 | |
| 129 | 182 | o "rta": Number of structures allocated from the torture freelist. |
| 130 | 183 | |
| 131 | 184 | o "rtaf": Number of allocations from the torture freelist that have |
| 132 | − failed due to the list being empty. | |
| 185 | + failed due to the list being empty. It is not unusual for this | |
| 186 | + to be non-zero, but it is bad for it to be a large fraction of | |
| 187 | + the value indicated by "rta". | |
| 133 | 188 | |
| 134 | 189 | o "rtf": Number of frees into the torture freelist. |
| 135 | 190 | |
| 191 | +o "rtmbe": A non-zero value indicates that rcutorture believes that | |
| 192 | + rcu_assign_pointer() and rcu_dereference() are not working | |
| 193 | + correctly. This value should be zero. | |
| 194 | + | |
| 195 | +o "rtbke": rcutorture was unable to create the real-time kthreads | |
| 196 | + used to force RCU priority inversion. This value should be zero. | |
| 197 | + | |
| 198 | +o "rtbre": Although rcutorture successfully created the kthreads | |
| 199 | + used to force RCU priority inversion, it was unable to set them | |
| 200 | + to the real-time priority level of 1. This value should be zero. | |
| 201 | + | |
| 202 | +o "rtbf": The number of times that RCU priority boosting failed | |
| 203 | + to resolve RCU priority inversion. | |
| 204 | + | |
| 205 | +o "rtb": The number of times that rcutorture attempted to force | |
| 206 | + an RCU priority inversion condition. If you are testing RCU | |
| 207 | + priority boosting via the "test_boost" module parameter, this | |
| 208 | + value should be non-zero. | |
| 209 | + | |
| 210 | +o "nt": The number of times rcutorture ran RCU read-side code from | |
| 211 | + within a timer handler. This value should be non-zero only | |
| 212 | + if you specified the "irqreader" module parameter. | |
| 213 | + | |
| 136 | 214 | o "Reader Pipe": Histogram of "ages" of structures seen by readers. |
| 137 | 215 | If any entries past the first two are non-zero, RCU is broken. |
| 138 | 216 | And rcutorture prints the error flag string "!!!" to make sure |
| @@ -162,26 +240,15 @@ o "Free-Block Circulation": Shows the number of torture structures · 23 unmodified lines | ||
| 162 | 240 | somehow gets incremented farther than it should. |
| 163 | 241 | |
| 164 | 242 | Different implementations of RCU can provide implementation-specific |
| 165 | −additional information. For example, SRCU provides the following: | |
| 243 | +additional information. For example, SRCU provides the following | |
| 244 | +additional line: | |
| 166 | 245 | |
| 167 | − srcu-torture: rtc: f8cf46a8 ver: 355 tfle: 0 rta: 356 rtaf: 0 rtf: 346 rtmbe: 0 | |
| 168 | − srcu-torture: Reader Pipe: 559738 939 0 0 0 0 0 0 0 0 0 | |
| 169 | − srcu-torture: Reader Batch: 560434 243 0 0 0 0 0 0 0 0 | |
| 170 | − srcu-torture: Free-Block Circulation: 355 354 353 352 351 350 349 348 347 346 0 | |
| 171 | 246 | srcu-torture: per-CPU(idx=1): 0(0,1) 1(0,1) 2(0,0) 3(0,1) |
| 172 | 247 | |
| 173 | −The first four lines are similar to those for RCU. The last line shows | |
| 174 | −the per-CPU counter state. The numbers in parentheses are the values | |
| 175 | −of the "old" and "current" counters for the corresponding CPU. The | |
| 176 | −"idx" value maps the "old" and "current" values to the underlying array, | |
| 177 | −and is useful for debugging. | |
| 178 | − | |
| 179 | −Similarly, sched_expedited RCU provides the following: | |
| 180 | − | |
| 181 | − sched_expedited-torture: rtc: d0000000016c1880 ver: 1090796 tfle: 0 rta: 1090796 rtaf: 0 rtf: 1090787 rtmbe: 0 nt: 27713319 | |
| 182 | − sched_expedited-torture: Reader Pipe: 12660320201 95875 0 0 0 0 0 0 0 0 0 | |
| 183 | − sched_expedited-torture: Reader Batch: 12660424885 0 0 0 0 0 0 0 0 0 0 | |
| 184 | − sched_expedited-torture: Free-Block Circulation: 1090795 1090795 1090794 1090793 1090792 1090791 1090790 1090789 1090788 1090787 0 | |
| 248 | +This line shows the per-CPU counter state. The numbers in parentheses are | |
| 249 | +the values of the "old" and "current" counters for the corresponding CPU. | |
| 250 | +The "idx" value maps the "old" and "current" values to the underlying | |
| 251 | +array, and is useful for debugging. | |
| 185 | 252 | |
| 186 | 253 | |
| 187 | 254 | USAGE |
| @@ -33,23 +33,23 @@ rcu/rcuboost: · 32 unmodified lines | ||
| 33 | 33 | The output of "cat rcu/rcudata" looks as follows: |
| 34 | 34 | |
| 35 | 35 | rcu_sched: |
| 36 | − 0 c=20972 g=20973 pq=1 pqc=20972 qp=0 dt=545/1/0 df=50 of=0 ri=0 ql=163 qs=NRW. kt=0/W/0 ktl=ebc3 b=10 ci=153737 co=0 ca=0 | |
| 37 | − 1 c=20972 g=20973 pq=1 pqc=20972 qp=0 dt=967/1/0 df=58 of=0 ri=0 ql=634 qs=NRW. kt=0/W/1 ktl=58c b=10 ci=191037 co=0 ca=0 | |
| 38 | − 2 c=20972 g=20973 pq=1 pqc=20972 qp=0 dt=1081/1/0 df=175 of=0 ri=0 ql=74 qs=N.W. kt=0/W/2 ktl=da94 b=10 ci=75991 co=0 ca=0 | |
| 39 | − 3 c=20942 g=20943 pq=1 pqc=20942 qp=1 dt=1846/0/0 df=404 of=0 ri=0 ql=0 qs=.... kt=0/W/3 ktl=d1cd b=10 ci=72261 co=0 ca=0 | |
| 40 | − 4 c=20972 g=20973 pq=1 pqc=20972 qp=0 dt=369/1/0 df=83 of=0 ri=0 ql=48 qs=N.W. kt=0/W/4 ktl=e0e7 b=10 ci=128365 co=0 ca=0 | |
| 41 | − 5 c=20972 g=20973 pq=1 pqc=20972 qp=0 dt=381/1/0 df=64 of=0 ri=0 ql=169 qs=NRW. kt=0/W/5 ktl=fb2f b=10 ci=164360 co=0 ca=0 | |
| 42 | − 6 c=20972 g=20973 pq=1 pqc=20972 qp=0 dt=1037/1/0 df=183 of=0 ri=0 ql=62 qs=N.W. kt=0/W/6 ktl=d2ad b=10 ci=65663 co=0 ca=0 | |
| 43 | − 7 c=20897 g=20897 pq=1 pqc=20896 qp=0 dt=1572/0/0 df=382 of=0 ri=0 ql=0 qs=.... kt=0/W/7 ktl=cf15 b=10 ci=75006 co=0 ca=0 | |
| 36 | + 0 c=20972 g=20973 pq=1 pgp=20973 qp=0 dt=545/1/0 df=50 of=0 ri=0 ql=163 qs=NRW. kt=0/W/0 ktl=ebc3 b=10 ci=153737 co=0 ca=0 | |
| 37 | + 1 c=20972 g=20973 pq=1 pgp=20973 qp=0 dt=967/1/0 df=58 of=0 ri=0 ql=634 qs=NRW. kt=0/W/1 ktl=58c b=10 ci=191037 co=0 ca=0 | |
| 38 | + 2 c=20972 g=20973 pq=1 pgp=20973 qp=0 dt=1081/1/0 df=175 of=0 ri=0 ql=74 qs=N.W. kt=0/W/2 ktl=da94 b=10 ci=75991 co=0 ca=0 | |
| 39 | + 3 c=20942 g=20943 pq=1 pgp=20942 qp=1 dt=1846/0/0 df=404 of=0 ri=0 ql=0 qs=.... kt=0/W/3 ktl=d1cd b=10 ci=72261 co=0 ca=0 | |
| 40 | + 4 c=20972 g=20973 pq=1 pgp=20973 qp=0 dt=369/1/0 df=83 of=0 ri=0 ql=48 qs=N.W. kt=0/W/4 ktl=e0e7 b=10 ci=128365 co=0 ca=0 | |
| 41 | + 5 c=20972 g=20973 pq=1 pgp=20973 qp=0 dt=381/1/0 df=64 of=0 ri=0 ql=169 qs=NRW. kt=0/W/5 ktl=fb2f b=10 ci=164360 co=0 ca=0 | |
| 42 | + 6 c=20972 g=20973 pq=1 pgp=20973 qp=0 dt=1037/1/0 df=183 of=0 ri=0 ql=62 qs=N.W. kt=0/W/6 ktl=d2ad b=10 ci=65663 co=0 ca=0 | |
| 43 | + 7 c=20897 g=20897 pq=1 pgp=20896 qp=0 dt=1572/0/0 df=382 of=0 ri=0 ql=0 qs=.... kt=0/W/7 ktl=cf15 b=10 ci=75006 co=0 ca=0 | |
| 44 | 44 | rcu_bh: |
| 45 | − 0 c=1480 g=1480 pq=1 pqc=1479 qp=0 dt=545/1/0 df=6 of=0 ri=1 ql=0 qs=.... kt=0/W/0 ktl=ebc3 b=10 ci=0 co=0 ca=0 | |
| 46 | − 1 c=1480 g=1480 pq=1 pqc=1479 qp=0 dt=967/1/0 df=3 of=0 ri=1 ql=0 qs=.... kt=0/W/1 ktl=58c b=10 ci=151 co=0 ca=0 | |
| 47 | − 2 c=1480 g=1480 pq=1 pqc=1479 qp=0 dt=1081/1/0 df=6 of=0 ri=1 ql=0 qs=.... kt=0/W/2 ktl=da94 b=10 ci=0 co=0 ca=0 | |
| 48 | − 3 c=1480 g=1480 pq=1 pqc=1479 qp=0 dt=1846/0/0 df=8 of=0 ri=1 ql=0 qs=.... kt=0/W/3 ktl=d1cd b=10 ci=0 co=0 ca=0 | |
| 49 | − 4 c=1480 g=1480 pq=1 pqc=1479 qp=0 dt=369/1/0 df=6 of=0 ri=1 ql=0 qs=.... kt=0/W/4 ktl=e0e7 b=10 ci=0 co=0 ca=0 | |
| 50 | − 5 c=1480 g=1480 pq=1 pqc=1479 qp=0 dt=381/1/0 df=4 of=0 ri=1 ql=0 qs=.... kt=0/W/5 ktl=fb2f b=10 ci=0 co=0 ca=0 | |
| 51 | − 6 c=1480 g=1480 pq=1 pqc=1479 qp=0 dt=1037/1/0 df=6 of=0 ri=1 ql=0 qs=.... kt=0/W/6 ktl=d2ad b=10 ci=0 co=0 ca=0 | |
| 52 | − 7 c=1474 g=1474 pq=1 pqc=1473 qp=0 dt=1572/0/0 df=8 of=0 ri=1 ql=0 qs=.... kt=0/W/7 ktl=cf15 b=10 ci=0 co=0 ca=0 | |
| 45 | + 0 c=1480 g=1480 pq=1 pgp=1480 qp=0 dt=545/1/0 df=6 of=0 ri=1 ql=0 qs=.... kt=0/W/0 ktl=ebc3 b=10 ci=0 co=0 ca=0 | |
| 46 | + 1 c=1480 g=1480 pq=1 pgp=1480 qp=0 dt=967/1/0 df=3 of=0 ri=1 ql=0 qs=.... kt=0/W/1 ktl=58c b=10 ci=151 co=0 ca=0 | |
| 47 | + 2 c=1480 g=1480 pq=1 pgp=1480 qp=0 dt=1081/1/0 df=6 of=0 ri=1 ql=0 qs=.... kt=0/W/2 ktl=da94 b=10 ci=0 co=0 ca=0 | |
| 48 | + 3 c=1480 g=1480 pq=1 pgp=1480 qp=0 dt=1846/0/0 df=8 of=0 ri=1 ql=0 qs=.... kt=0/W/3 ktl=d1cd b=10 ci=0 co=0 ca=0 | |
| 49 | + 4 c=1480 g=1480 pq=1 pgp=1480 qp=0 dt=369/1/0 df=6 of=0 ri=1 ql=0 qs=.... kt=0/W/4 ktl=e0e7 b=10 ci=0 co=0 ca=0 | |
| 50 | + 5 c=1480 g=1480 pq=1 pgp=1480 qp=0 dt=381/1/0 df=4 of=0 ri=1 ql=0 qs=.... kt=0/W/5 ktl=fb2f b=10 ci=0 co=0 ca=0 | |
| 51 | + 6 c=1480 g=1480 pq=1 pgp=1480 qp=0 dt=1037/1/0 df=6 of=0 ri=1 ql=0 qs=.... kt=0/W/6 ktl=d2ad b=10 ci=0 co=0 ca=0 | |
| 52 | + 7 c=1474 g=1474 pq=1 pgp=1473 qp=0 dt=1572/0/0 df=8 of=0 ri=1 ql=0 qs=.... kt=0/W/7 ktl=cf15 b=10 ci=0 co=0 ca=0 | |
| 53 | 53 | |
| 54 | 54 | The first section lists the rcu_data structures for rcu_sched, the second |
| 55 | 55 | for rcu_bh. Note that CONFIG_TREE_PREEMPT_RCU kernels will have an |
| @@ -84,7 +84,7 @@ o "pq" indicates that this CPU has passed through a quiescent state · 28 unmodified lines | ||
| 84 | 84 | CPU has not yet reported that fact, (2) some other CPU has not |
| 85 | 85 | yet reported for this grace period, or (3) both. |
| 86 | 86 | |
| 87 | −o "pqc" indicates which grace period the last-observed quiescent | |
| 87 | +o "pgp" indicates which grace period the last-observed quiescent | |
| 88 | 88 | state for this CPU corresponds to. This is important for handling |
| 89 | 89 | the race between CPU 0 reporting an extended dynticks-idle |
| 90 | 90 | quiescent state for CPU 1 and CPU 1 suddenly waking up and |
| @@ -184,10 +184,14 @@ o "kt" is the per-CPU kernel-thread state. The digit preceding · 93 unmodified lines | ||
| 184 | 184 | The number after the final slash is the CPU that the kthread |
| 185 | 185 | is actually running on. |
| 186 | 186 | |
| 187 | + This field is displayed only for CONFIG_RCU_BOOST kernels. | |
| 188 | + | |
| 187 | 189 | o "ktl" is the low-order 16 bits (in hexadecimal) of the count of |
| 188 | 190 | the number of times that this CPU's per-CPU kthread has gone |
| 189 | 191 | through its loop servicing invoke_rcu_cpu_kthread() requests. |
| 190 | 192 | |
| 193 | + This field is displayed only for CONFIG_RCU_BOOST kernels. | |
| 194 | + | |
| 191 | 195 | o "b" is the batch limit for this CPU. If more than this number |
| 192 | 196 | of RCU callbacks is ready to invoke, then the remainder will |
| 193 | 197 | be deferred. |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | To choose IO schedulers at boot time, use the argument 'elevator=deadline'. |
| 2 | −'noop', 'as' and 'cfq' (the default) are also available. IO schedulers are | |
| 3 | −assigned globally at boot time only presently. | |
| 2 | +'noop' and 'cfq' (the default) are also available. IO schedulers are assigned | |
| 3 | +globally at boot time only presently. | |
| 4 | 4 | |
| 5 | 5 | Each io queue has a set of io scheduler tunables associated with it. These |
| 6 | 6 | tunables control how the io scheduler works. You can find these entries |
| @@ -78,6 +78,16 @@ The device naming scheme is: · 77 unmodified lines | ||
| 78 | 78 | /dev/cciss/c1d1p2 Controller 1, disk 1, partition 2 |
| 79 | 79 | /dev/cciss/c1d1p3 Controller 1, disk 1, partition 3 |
| 80 | 80 | |
| 81 | +CCISS simple mode support | |
| 82 | +------------------------- | |
| 83 | + | |
| 84 | +The "cciss_simple_mode=1" boot parameter may be used to prevent the driver | |
| 85 | +from putting the controller into "performant" mode. The difference is that | |
| 86 | +with simple mode, each command completion requires an interrupt, while with | |
| 87 | +"performant mode" (the default, and ordinarily better performing) it is | |
| 88 | +possible to have multiple command completions indicated by a single | |
| 89 | +interrupt. | |
| 90 | + | |
| 81 | 91 | SCSI tape drive and medium changer support |
| 82 | 92 | ------------------------------------------ |
| 83 | 93 | |
| @@ -454,8 +454,8 @@ mounted hierarchy, to remove a task from its current cgroup you must · 453 unmodified lines | ||
| 454 | 454 | move it into a new cgroup (possibly the root cgroup) by writing to the |
| 455 | 455 | new cgroup's tasks file. |
| 456 | 456 | |
| 457 | −Note: If the ns cgroup is active, moving a process to another cgroup can | |
| 458 | −fail. | |
| 457 | +Note: Due to some restrictions enforced by some cgroup subsystems, moving | |
| 458 | +a process to another cgroup can fail. | |
| 459 | 459 | |
| 460 | 460 | 2.3 Mounting hierarchies by name |
| 461 | 461 | -------------------------------- |
| @@ -33,9 +33,9 @@ demonstrate this problem using nested bash shells: · 32 unmodified lines | ||
| 33 | 33 | |
| 34 | 34 | From a second, unrelated bash shell: |
| 35 | 35 | $ kill -SIGSTOP 16690 |
| 36 | − $ kill -SIGCONT 16990 | |
| 36 | + $ kill -SIGCONT 16690 | |
| 37 | 37 | |
| 38 | − <at this point 16990 exits and causes 16644 to exit too> | |
| 38 | + <at this point 16690 exits and causes 16644 to exit too> | |
| 39 | 39 | |
| 40 | 40 | This happens because bash can observe both signals and choose how it |
| 41 | 41 | responds to them. |
| @@ -418,7 +418,6 @@ total_unevictable - sum of all children's "unevictable" · 417 unmodified lines | ||
| 418 | 418 | |
| 419 | 419 | # The following additional stats are dependent on CONFIG_DEBUG_VM. |
| 420 | 420 | |
| 421 | −inactive_ratio - VM internal parameter. (see mm/page_alloc.c) | |
| 422 | 421 | recent_rotated_anon - VM internal parameter. (see mm/vmscan.c) |
| 423 | 422 | recent_rotated_file - VM internal parameter. (see mm/vmscan.c) |
| 424 | 423 | recent_scanned_anon - VM internal parameter. (see mm/vmscan.c) |
| @@ -48,7 +48,7 @@ kernel and userspace, 'connector' is used as the interface for · 47 unmodified lines | ||
| 48 | 48 | communication. |
| 49 | 49 | |
| 50 | 50 | There are currently two userspace log implementations that leverage this |
| 51 | −framework - "clustered_disk" and "clustered_core". These implementations | |
| 51 | +framework - "clustered-disk" and "clustered-core". These implementations | |
| 52 | 52 | provide a cluster-coherent log for shared-storage. Device-mapper mirroring |
| 53 | 53 | can be used in a shared-storage environment when the cluster log implementations |
| 54 | 54 | are employed. |
| @@ -0,0 +1,84 @@ | ||
| 1 | +Introduction | |
| 2 | +============ | |
| 3 | + | |
| 4 | +The more-sophisticated device-mapper targets require complex metadata | |
| 5 | +that is managed in kernel. In late 2010 we were seeing that various | |
| 6 | +different targets were rolling their own data strutures, for example: | |
| 7 | + | |
| 8 | +- Mikulas Patocka's multisnap implementation | |
| 9 | +- Heinz Mauelshagen's thin provisioning target | |
| 10 | +- Another btree-based caching target posted to dm-devel | |
| 11 | +- Another multi-snapshot target based on a design of Daniel Phillips | |
| 12 | + | |
| 13 | +Maintaining these data structures takes a lot of work, so if possible | |
| 14 | +we'd like to reduce the number. | |
| 15 | + | |
| 16 | +The persistent-data library is an attempt to provide a re-usable | |
| 17 | +framework for people who want to store metadata in device-mapper | |
| 18 | +targets. It's currently used by the thin-provisioning target and an | |
| 19 | +upcoming hierarchical storage target. | |
| 20 | + | |
| 21 | +Overview | |
| 22 | +======== | |
| 23 | + | |
| 24 | +The main documentation is in the header files which can all be found | |
| 25 | +under drivers/md/persistent-data. | |
| 26 | + | |
| 27 | +The block manager | |
| 28 | +----------------- | |
| 29 | + | |
| 30 | +dm-block-manager.[hc] | |
| 31 | + | |
| 32 | +This provides access to the data on disk in fixed sized-blocks. There | |
| 33 | +is a read/write locking interface to prevent concurrent accesses, and | |
| 34 | +keep data that is being used in the cache. | |
| 35 | + | |
| 36 | +Clients of persistent-data are unlikely to use this directly. | |
| 37 | + | |
| 38 | +The transaction manager | |
| 39 | +----------------------- | |
| 40 | + | |
| 41 | +dm-transaction-manager.[hc] | |
| 42 | + | |
| 43 | +This restricts access to blocks and enforces copy-on-write semantics. | |
| 44 | +The only way you can get hold of a writable block through the | |
| 45 | +transaction manager is by shadowing an existing block (ie. doing | |
| 46 | +copy-on-write) or allocating a fresh one. Shadowing is elided within | |
| 47 | +the same transaction so performance is reasonable. The commit method | |
| 48 | +ensures that all data is flushed before it writes the superblock. | |
| 49 | +On power failure your metadata will be as it was when last committed. | |
| 50 | + | |
| 51 | +The Space Maps | |
| 52 | +-------------- | |
| 53 | + | |
| 54 | +dm-space-map.h | |
| 55 | +dm-space-map-metadata.[hc] | |
| 56 | +dm-space-map-disk.[hc] | |
| 57 | + | |
| 58 | +On-disk data structures that keep track of reference counts of blocks. | |
| 59 | +Also acts as the allocator of new blocks. Currently two | |
| 60 | +implementations: a simpler one for managing blocks on a different | |
| 61 | +device (eg. thinly-provisioned data blocks); and one for managing | |
| 62 | +the metadata space. The latter is complicated by the need to store | |
| 63 | +its own data within the space it's managing. | |
| 64 | + | |
| 65 | +The data structures | |
| 66 | +------------------- | |
| 67 | + | |
| 68 | +dm-btree.[hc] | |
| 69 | +dm-btree-remove.c | |
| 70 | +dm-btree-spine.c | |
| 71 | +dm-btree-internal.h | |
| 72 | + | |
| 73 | +Currently there is only one data structure, a hierarchical btree. | |
| 74 | +There are plans to add more. For example, something with an | |
| 75 | +array-like interface would see a lot of use. | |
| 76 | + | |
| 77 | +The btree is 'hierarchical' in that you can define it to be composed | |
| 78 | +of nested btrees, and take multiple keys. For example, the | |
| 79 | +thin-provisioning target uses a btree with two levels of nesting. | |
| 80 | +The first maps a device id to a mapping tree, and that in turn maps a | |
| 81 | +virtual block to a physical block. | |
| 82 | + | |
| 83 | +Values stored in the btrees can have arbitrary size. Keys are always | |
| 84 | +64bits, although nesting allows you to use multiple keys. | |
| @@ -0,0 +1,285 @@ | ||
| 1 | +Introduction | |
| 2 | +============ | |
| 3 | + | |
| 4 | +This document descibes a collection of device-mapper targets that | |
| 5 | +between them implement thin-provisioning and snapshots. | |
| 6 | + | |
| 7 | +The main highlight of this implementation, compared to the previous | |
| 8 | +implementation of snapshots, is that it allows many virtual devices to | |
| 9 | +be stored on the same data volume. This simplifies administration and | |
| 10 | +allows the sharing of data between volumes, thus reducing disk usage. | |
| 11 | + | |
| 12 | +Another significant feature is support for an arbitrary depth of | |
| 13 | +recursive snapshots (snapshots of snapshots of snapshots ...). The | |
| 14 | +previous implementation of snapshots did this by chaining together | |
| 15 | +lookup tables, and so performance was O(depth). This new | |
| 16 | +implementation uses a single data structure to avoid this degradation | |
| 17 | +with depth. Fragmentation may still be an issue, however, in some | |
| 18 | +scenarios. | |
| 19 | + | |
| 20 | +Metadata is stored on a separate device from data, giving the | |
| 21 | +administrator some freedom, for example to: | |
| 22 | + | |
| 23 | +- Improve metadata resilience by storing metadata on a mirrored volume | |
| 24 | + but data on a non-mirrored one. | |
| 25 | + | |
| 26 | +- Improve performance by storing the metadata on SSD. | |
| 27 | + | |
| 28 | +Status | |
| 29 | +====== | |
| 30 | + | |
| 31 | +These targets are very much still in the EXPERIMENTAL state. Please | |
| 32 | +do not yet rely on them in production. But do experiment and offer us | |
| 33 | +feedback. Different use cases will have different performance | |
| 34 | +characteristics, for example due to fragmentation of the data volume. | |
| 35 | + | |
| 36 | +If you find this software is not performing as expected please mail | |
| 37 | +dm-devel@redhat.com with details and we'll try our best to improve | |
| 38 | +things for you. | |
| 39 | + | |
| 40 | +Userspace tools for checking and repairing the metadata are under | |
| 41 | +development. | |
| 42 | + | |
| 43 | +Cookbook | |
| 44 | +======== | |
| 45 | + | |
| 46 | +This section describes some quick recipes for using thin provisioning. | |
| 47 | +They use the dmsetup program to control the device-mapper driver | |
| 48 | +directly. End users will be advised to use a higher-level volume | |
| 49 | +manager such as LVM2 once support has been added. | |
| 50 | + | |
| 51 | +Pool device | |
| 52 | +----------- | |
| 53 | + | |
| 54 | +The pool device ties together the metadata volume and the data volume. | |
| 55 | +It maps I/O linearly to the data volume and updates the metadata via | |
| 56 | +two mechanisms: | |
| 57 | + | |
| 58 | +- Function calls from the thin targets | |
| 59 | + | |
| 60 | +- Device-mapper 'messages' from userspace which control the creation of new | |
| 61 | + virtual devices amongst other things. | |
| 62 | + | |
| 63 | +Setting up a fresh pool device | |
| 64 | +------------------------------ | |
| 65 | + | |
| 66 | +Setting up a pool device requires a valid metadata device, and a | |
| 67 | +data device. If you do not have an existing metadata device you can | |
| 68 | +make one by zeroing the first 4k to indicate empty metadata. | |
| 69 | + | |
| 70 | + dd if=/dev/zero of=$metadata_dev bs=4096 count=1 | |
| 71 | + | |
| 72 | +The amount of metadata you need will vary according to how many blocks | |
| 73 | +are shared between thin devices (i.e. through snapshots). If you have | |
| 74 | +less sharing than average you'll need a larger-than-average metadata device. | |
| 75 | + | |
| 76 | +As a guide, we suggest you calculate the number of bytes to use in the | |
| 77 | +metadata device as 48 * $data_dev_size / $data_block_size but round it up | |
| 78 | +to 2MB if the answer is smaller. The largest size supported is 16GB. | |
| 79 | + | |
| 80 | +If you're creating large numbers of snapshots which are recording large | |
| 81 | +amounts of change, you may need find you need to increase this. | |
| 82 | + | |
| 83 | +Reloading a pool table | |
| 84 | +---------------------- | |
| 85 | + | |
| 86 | +You may reload a pool's table, indeed this is how the pool is resized | |
| 87 | +if it runs out of space. (N.B. While specifying a different metadata | |
| 88 | +device when reloading is not forbidden at the moment, things will go | |
| 89 | +wrong if it does not route I/O to exactly the same on-disk location as | |
| 90 | +previously.) | |
| 91 | + | |
| 92 | +Using an existing pool device | |
| 93 | +----------------------------- | |
| 94 | + | |
| 95 | + dmsetup create pool \ | |
| 96 | + --table "0 20971520 thin-pool $metadata_dev $data_dev \ | |
| 97 | + $data_block_size $low_water_mark" | |
| 98 | + | |
| 99 | +$data_block_size gives the smallest unit of disk space that can be | |
| 100 | +allocated at a time expressed in units of 512-byte sectors. People | |
| 101 | +primarily interested in thin provisioning may want to use a value such | |
| 102 | +as 1024 (512KB). People doing lots of snapshotting may want a smaller value | |
| 103 | +such as 128 (64KB). If you are not zeroing newly-allocated data, | |
| 104 | +a larger $data_block_size in the region of 256000 (128MB) is suggested. | |
| 105 | +$data_block_size must be the same for the lifetime of the | |
| 106 | +metadata device. | |
| 107 | + | |
| 108 | +$low_water_mark is expressed in blocks of size $data_block_size. If | |
| 109 | +free space on the data device drops below this level then a dm event | |
| 110 | +will be triggered which a userspace daemon should catch allowing it to | |
| 111 | +extend the pool device. Only one such event will be sent. | |
| 112 | +Resuming a device with a new table itself triggers an event so the | |
| 113 | +userspace daemon can use this to detect a situation where a new table | |
| 114 | +already exceeds the threshold. | |
| 115 | + | |
| 116 | +Thin provisioning | |
| 117 | +----------------- | |
| 118 | + | |
| 119 | +i) Creating a new thinly-provisioned volume. | |
| 120 | + | |
| 121 | + To create a new thinly- provisioned volume you must send a message to an | |
| 122 | + active pool device, /dev/mapper/pool in this example. | |
| 123 | + | |
| 124 | + dmsetup message /dev/mapper/pool 0 "create_thin 0" | |
| 125 | + | |
| 126 | + Here '0' is an identifier for the volume, a 24-bit number. It's up | |
| 127 | + to the caller to allocate and manage these identifiers. If the | |
| 128 | + identifier is already in use, the message will fail with -EEXIST. | |
| 129 | + | |
| 130 | +ii) Using a thinly-provisioned volume. | |
| 131 | + | |
| 132 | + Thinly-provisioned volumes are activated using the 'thin' target: | |
| 133 | + | |
| 134 | + dmsetup create thin --table "0 2097152 thin /dev/mapper/pool 0" | |
| 135 | + | |
| 136 | + The last parameter is the identifier for the thinp device. | |
| 137 | + | |
| 138 | +Internal snapshots | |
| 139 | +------------------ | |
| 140 | + | |
| 141 | +i) Creating an internal snapshot. | |
| 142 | + | |
| 143 | + Snapshots are created with another message to the pool. | |
| 144 | + | |
| 145 | + N.B. If the origin device that you wish to snapshot is active, you | |
| 146 | + must suspend it before creating the snapshot to avoid corruption. | |
| 147 | + This is NOT enforced at the moment, so please be careful! | |
| 148 | + | |
| 149 | + dmsetup suspend /dev/mapper/thin | |
| 150 | + dmsetup message /dev/mapper/pool 0 "create_snap 1 0" | |
| 151 | + dmsetup resume /dev/mapper/thin | |
| 152 | + | |
| 153 | + Here '1' is the identifier for the volume, a 24-bit number. '0' is the | |
| 154 | + identifier for the origin device. | |
| 155 | + | |
| 156 | +ii) Using an internal snapshot. | |
| 157 | + | |
| 158 | + Once created, the user doesn't have to worry about any connection | |
| 159 | + between the origin and the snapshot. Indeed the snapshot is no | |
| 160 | + different from any other thinly-provisioned device and can be | |
| 161 | + snapshotted itself via the same method. It's perfectly legal to | |
| 162 | + have only one of them active, and there's no ordering requirement on | |
| 163 | + activating or removing them both. (This differs from conventional | |
| 164 | + device-mapper snapshots.) | |
| 165 | + | |
| 166 | + Activate it exactly the same way as any other thinly-provisioned volume: | |
| 167 | + | |
| 168 | + dmsetup create snap --table "0 2097152 thin /dev/mapper/pool 1" | |
| 169 | + | |
| 170 | +Deactivation | |
| 171 | +------------ | |
| 172 | + | |
| 173 | +All devices using a pool must be deactivated before the pool itself | |
| 174 | +can be. | |
| 175 | + | |
| 176 | + dmsetup remove thin | |
| 177 | + dmsetup remove snap | |
| 178 | + dmsetup remove pool | |
| 179 | + | |
| 180 | +Reference | |
| 181 | +========= | |
| 182 | + | |
| 183 | +'thin-pool' target | |
| 184 | +------------------ | |
| 185 | + | |
| 186 | +i) Constructor | |
| 187 | + | |
| 188 | + thin-pool <metadata dev> <data dev> <data block size (sectors)> \ | |
| 189 | + <low water mark (blocks)> [<number of feature args> [<arg>]*] | |
| 190 | + | |
| 191 | + Optional feature arguments: | |
| 192 | + - 'skip_block_zeroing': skips the zeroing of newly-provisioned blocks. | |
| 193 | + | |
| 194 | + Data block size must be between 64KB (128 sectors) and 1GB | |
| 195 | + (2097152 sectors) inclusive. | |
| 196 | + | |
| 197 | + | |
| 198 | +ii) Status | |
| 199 | + | |
| 200 | + <transaction id> <used metadata blocks>/<total metadata blocks> | |
| 201 | + <used data blocks>/<total data blocks> <held metadata root> | |
| 202 | + | |
| 203 | + | |
| 204 | + transaction id: | |
| 205 | + A 64-bit number used by userspace to help synchronise with metadata | |
| 206 | + from volume managers. | |
| 207 | + | |
| 208 | + used data blocks / total data blocks | |
| 209 | + If the number of free blocks drops below the pool's low water mark a | |
| 210 | + dm event will be sent to userspace. This event is edge-triggered and | |
| 211 | + it will occur only once after each resume so volume manager writers | |
| 212 | + should register for the event and then check the target's status. | |
| 213 | + | |
| 214 | + held metadata root: | |
| 215 | + The location, in sectors, of the metadata root that has been | |
| 216 | + 'held' for userspace read access. '-' indicates there is no | |
| 217 | + held root. This feature is not yet implemented so '-' is | |
| 218 | + always returned. | |
| 219 | + | |
| 220 | +iii) Messages | |
| 221 | + | |
| 222 | + create_thin <dev id> | |
| 223 | + | |
| 224 | + Create a new thinly-provisioned device. | |
| 225 | + <dev id> is an arbitrary unique 24-bit identifier chosen by | |
| 226 | + the caller. | |
| 227 | + | |
| 228 | + create_snap <dev id> <origin id> | |
| 229 | + | |
| 230 | + Create a new snapshot of another thinly-provisioned device. | |
| 231 | + <dev id> is an arbitrary unique 24-bit identifier chosen by | |
| 232 | + the caller. | |
| 233 | + <origin id> is the identifier of the thinly-provisioned device | |
| 234 | + of which the new device will be a snapshot. | |
| 235 | + | |
| 236 | + delete <dev id> | |
| 237 | + | |
| 238 | + Deletes a thin device. Irreversible. | |
| 239 | + | |
| 240 | + trim <dev id> <new size in sectors> | |
| 241 | + | |
| 242 | + Delete mappings from the end of a thin device. Irreversible. | |
| 243 | + You might want to use this if you're reducing the size of | |
| 244 | + your thinly-provisioned device. In many cases, due to the | |
| 245 | + sharing of blocks between devices, it is not possible to | |
| 246 | + determine in advance how much space 'trim' will release. (In | |
| 247 | + future a userspace tool might be able to perform this | |
| 248 | + calculation.) | |
| 249 | + | |
| 250 | + set_transaction_id <current id> <new id> | |
| 251 | + | |
| 252 | + Userland volume managers, such as LVM, need a way to | |
| 253 | + synchronise their external metadata with the internal metadata of the | |
| 254 | + pool target. The thin-pool target offers to store an | |
| 255 | + arbitrary 64-bit transaction id and return it on the target's | |
| 256 | + status line. To avoid races you must provide what you think | |
| 257 | + the current transaction id is when you change it with this | |
| 258 | + compare-and-swap message. | |
| 259 | + | |
| 260 | +'thin' target | |
| 261 | +------------- | |
| 262 | + | |
| 263 | +i) Constructor | |
| 264 | + | |
| 265 | + thin <pool dev> <dev id> | |
| 266 | + | |
| 267 | + pool dev: | |
| 268 | + the thin-pool device, e.g. /dev/mapper/my_pool or 253:0 | |
| 269 | + | |
| 270 | + dev id: | |
| 271 | + the internal device identifier of the device to be | |
| 272 | + activated. | |
| 273 | + | |
| 274 | +The pool doesn't store any size against the thin devices. If you | |
| 275 | +load a thin target that is smaller than you've been using previously, | |
| 276 | +then you'll have no access to blocks mapped beyond the end. If you | |
| 277 | +load a target that is bigger than before, then extra blocks will be | |
| 278 | +provisioned as and when needed. | |
| 279 | + | |
| 280 | +If you wish to reduce the size of your thin device and potentially | |
| 281 | +regain some space then send the 'trim' message to the pool. | |
| 282 | + | |
| 283 | +ii) Status | |
| 284 | + | |
| 285 | + <nr mapped sectors> <highest mapped sector> | |
| @@ -0,0 +1,8 @@ | ||
| 1 | +Calxeda Highbank Platforms Device Tree Bindings | |
| 2 | +----------------------------------------------- | |
| 3 | + | |
| 4 | +Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following | |
| 5 | +properties. | |
| 6 | + | |
| 7 | +Required root node properties: | |
| 8 | + - compatible = "calxeda,highbank"; | |
| @@ -0,0 +1,26 @@ | ||
| 1 | +Freescale i.MX Platforms Device Tree Bindings | |
| 2 | +----------------------------------------------- | |
| 3 | + | |
| 4 | +i.MX51 Babbage Board | |
| 5 | +Required root node properties: | |
| 6 | + - compatible = "fsl,imx51-babbage", "fsl,imx51"; | |
| 7 | + | |
| 8 | +i.MX53 Automotive Reference Design Board | |
| 9 | +Required root node properties: | |
| 10 | + - compatible = "fsl,imx53-ard", "fsl,imx53"; | |
| 11 | + | |
| 12 | +i.MX53 Evaluation Kit | |
| 13 | +Required root node properties: | |
| 14 | + - compatible = "fsl,imx53-evk", "fsl,imx53"; | |
| 15 | + | |
| 16 | +i.MX53 Quick Start Board | |
| 17 | +Required root node properties: | |
| 18 | + - compatible = "fsl,imx53-qsb", "fsl,imx53"; | |
| 19 | + | |
| 20 | +i.MX53 Smart Mobile Reference Design Board | |
| 21 | +Required root node properties: | |
| 22 | + - compatible = "fsl,imx53-smd", "fsl,imx53"; | |
| 23 | + | |
| 24 | +i.MX6 Quad SABRE Automotive Board | |
| 25 | +Required root node properties: | |
| 26 | + - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; | |
| @@ -0,0 +1,55 @@ | ||
| 1 | +* ARM Generic Interrupt Controller | |
| 2 | + | |
| 3 | +ARM SMP cores are often associated with a GIC, providing per processor | |
| 4 | +interrupts (PPI), shared processor interrupts (SPI) and software | |
| 5 | +generated interrupts (SGI). | |
| 6 | + | |
| 7 | +Primary GIC is attached directly to the CPU and typically has PPIs and SGIs. | |
| 8 | +Secondary GICs are cascaded into the upward interrupt controller and do not | |
| 9 | +have PPIs or SGIs. | |
| 10 | + | |
| 11 | +Main node required properties: | |
| 12 | + | |
| 13 | +- compatible : should be one of: | |
| 14 | + "arm,cortex-a9-gic" | |
| 15 | + "arm,arm11mp-gic" | |
| 16 | +- interrupt-controller : Identifies the node as an interrupt controller | |
| 17 | +- #interrupt-cells : Specifies the number of cells needed to encode an | |
| 18 | + interrupt source. The type shall be a <u32> and the value shall be 3. | |
| 19 | + | |
| 20 | + The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI | |
| 21 | + interrupts. | |
| 22 | + | |
| 23 | + The 2nd cell contains the interrupt number for the interrupt type. | |
| 24 | + SPI interrupts are in the range [0-987]. PPI interrupts are in the | |
| 25 | + range [0-15]. | |
| 26 | + | |
| 27 | + The 3rd cell is the flags, encoded as follows: | |
| 28 | + bits[3:0] trigger type and level flags. | |
| 29 | + 1 = low-to-high edge triggered | |
| 30 | + 2 = high-to-low edge triggered | |
| 31 | + 4 = active high level-sensitive | |
| 32 | + 8 = active low level-sensitive | |
| 33 | + bits[15:8] PPI interrupt cpu mask. Each bit corresponds to each of | |
| 34 | + the 8 possible cpus attached to the GIC. A bit set to '1' indicated | |
| 35 | + the interrupt is wired to that CPU. Only valid for PPI interrupts. | |
| 36 | + | |
| 37 | +- reg : Specifies base physical address(s) and size of the GIC registers. The | |
| 38 | + first region is the GIC distributor register base and size. The 2nd region is | |
| 39 | + the GIC cpu interface register base and size. | |
| 40 | + | |
| 41 | +Optional | |
| 42 | +- interrupts : Interrupt source of the parent interrupt controller. Only | |
| 43 | + present on secondary GICs. | |
| 44 | + | |
| 45 | +Example: | |
| 46 | + | |
| 47 | + intc: interrupt-controller@fff11000 { | |
| 48 | + compatible = "arm,cortex-a9-gic"; | |
| 49 | + #interrupt-cells = <3>; | |
| 50 | + #address-cells = <1>; | |
| 51 | + interrupt-controller; | |
| 52 | + reg = <0xfff11000 0x1000>, | |
| 53 | + <0xfff10100 0x100>; | |
| 54 | + }; | |
| 55 | + | |
| @@ -0,0 +1,14 @@ | ||
| 1 | +* TI - DSP (Digital Signal Processor) | |
| 2 | + | |
| 3 | +TI DSP included in OMAP SoC | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | +- compatible : Should be "ti,omap3-c64" for OMAP3 & 4 | |
| 7 | +- ti,hwmods: "dsp" | |
| 8 | + | |
| 9 | +Examples: | |
| 10 | + | |
| 11 | +dsp { | |
| 12 | + compatible = "ti,omap3-c64"; | |
| 13 | + ti,hwmods = "dsp"; | |
| 14 | +}; | |
| @@ -0,0 +1,19 @@ | ||
| 1 | +* TI - IVA (Imaging and Video Accelerator) subsystem | |
| 2 | + | |
| 3 | +The IVA contain various audio, video or imaging HW accelerator | |
| 4 | +depending of the version. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | +- compatible : Should be: | |
| 8 | + - "ti,ivahd" for OMAP4 | |
| 9 | + - "ti,iva2.2" for OMAP3 | |
| 10 | + - "ti,iva2.1" for OMAP2430 | |
| 11 | + - "ti,iva1" for OMAP2420 | |
| 12 | +- ti,hwmods: "iva" | |
| 13 | + | |
| 14 | +Examples: | |
| 15 | + | |
| 16 | +iva { | |
| 17 | + compatible = "ti,ivahd", "ti,iva"; | |
| 18 | + ti,hwmods = "iva"; | |
| 19 | +}; | |
| @@ -0,0 +1,19 @@ | ||
| 1 | +* TI - L3 Network On Chip (NoC) | |
| 2 | + | |
| 3 | +This version is an implementation of the generic NoC IP | |
| 4 | +provided by Arteris. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | +- compatible : Should be "ti,omap3-l3-smx" for OMAP3 family | |
| 8 | + Should be "ti,omap4-l3-noc" for OMAP4 family | |
| 9 | +- ti,hwmods: "l3_main_1", ... One hwmod for each noc domain. | |
| 10 | + | |
| 11 | +Examples: | |
| 12 | + | |
| 13 | +ocp { | |
| 14 | + compatible = "ti,omap4-l3-noc", "simple-bus"; | |
| 15 | + #address-cells = <1>; | |
| 16 | + #size-cells = <1>; | |
| 17 | + ranges; | |
| 18 | + ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; | |
| 19 | +}; | |
| @@ -0,0 +1,27 @@ | ||
| 1 | +* TI - MPU (Main Processor Unit) subsystem | |
| 2 | + | |
| 3 | +The MPU subsystem contain one or several ARM cores | |
| 4 | +depending of the version. | |
| 5 | +The MPU contain CPUs, GIC, L2 cache and a local PRCM. | |
| 6 | + | |
| 7 | +Required properties: | |
| 8 | +- compatible : Should be "ti,omap3-mpu" for OMAP3 | |
| 9 | + Should be "ti,omap4-mpu" for OMAP4 | |
| 10 | +- ti,hwmods: "mpu" | |
| 11 | + | |
| 12 | +Examples: | |
| 13 | + | |
| 14 | +- For an OMAP4 SMP system: | |
| 15 | + | |
| 16 | +mpu { | |
| 17 | + compatible = "ti,omap4-mpu"; | |
| 18 | + ti,hwmods = "mpu"; | |
| 19 | +}; | |
| 20 | + | |
| 21 | + | |
| 22 | +- For an OMAP3 monocore system: | |
| 23 | + | |
| 24 | +mpu { | |
| 25 | + compatible = "ti,omap3-mpu"; | |
| 26 | + ti,hwmods = "mpu"; | |
| 27 | +}; | |
| @@ -0,0 +1,43 @@ | ||
| 1 | +* Texas Instruments OMAP | |
| 2 | + | |
| 3 | +OMAP is currently using a static file per SoC family to describe the | |
| 4 | +IPs present in the SoC. | |
| 5 | +On top of that an omap_device is created to extend the platform_device | |
| 6 | +capabilities and to allow binding with one or several hwmods. | |
| 7 | +The hwmods will contain all the information to build the device: | |
| 8 | +adresse range, irq lines, dma lines, interconnect, PRCM register, | |
| 9 | +clock domain, input clocks. | |
| 10 | +For the moment just point to the existing hwmod, the next step will be | |
| 11 | +to move data from hwmod to device-tree representation. | |
| 12 | + | |
| 13 | + | |
| 14 | +Required properties: | |
| 15 | +- compatible: Every devices present in OMAP SoC should be in the | |
| 16 | + form: "ti,XXX" | |
| 17 | +- ti,hwmods: list of hwmod names (ascii strings), that comes from the OMAP | |
| 18 | + HW documentation, attached to a device. Must contain at least | |
| 19 | + one hwmod. | |
| 20 | + | |
| 21 | +Optional properties: | |
| 22 | +- ti,no_idle_on_suspend: When present, it prevents the PM to idle the module | |
| 23 | + during suspend. | |
| 24 | + | |
| 25 | + | |
| 26 | +Example: | |
| 27 | + | |
| 28 | +spinlock@1 { | |
| 29 | + compatible = "ti,omap4-spinlock"; | |
| 30 | + ti,hwmods = "spinlock"; | |
| 31 | +}; | |
| 32 | + | |
| 33 | + | |
| 34 | +Boards: | |
| 35 | + | |
| 36 | +- OMAP3 BeagleBoard : Low cost community board | |
| 37 | + compatible = "ti,omap3-beagle", "ti,omap3" | |
| 38 | + | |
| 39 | +- OMAP4 SDP : Software Developement Board | |
| 40 | + compatible = "ti,omap4-sdp", "ti,omap4430" | |
| 41 | + | |
| 42 | +- OMAP4 PandaBoard : Low cost community board | |
| 43 | + compatible = "ti,omap4-panda", "ti,omap4430" | |
| @@ -0,0 +1,24 @@ | ||
| 1 | +Picochip picoXcell device tree bindings. | |
| 2 | +======================================== | |
| 3 | + | |
| 4 | +Required root node properties: | |
| 5 | + - compatible: | |
| 6 | + - "picochip,pc7302-pc3x3" : PC7302 development board with PC3X3 device. | |
| 7 | + - "picochip,pc7302-pc3x2" : PC7302 development board with PC3X2 device. | |
| 8 | + - "picochip,pc3x3" : picoXcell PC3X3 device based board. | |
| 9 | + - "picochip,pc3x2" : picoXcell PC3X2 device based board. | |
| 10 | + | |
| 11 | +Timers required properties: | |
| 12 | + - compatible = "picochip,pc3x2-timer" | |
| 13 | + - interrupts : The single IRQ line for the timer. | |
| 14 | + - clock-freq : The frequency in HZ of the timer. | |
| 15 | + - reg : The register bank for the timer. | |
| 16 | + | |
| 17 | +Note: two timers are required - one for the scheduler clock and one for the | |
| 18 | +event tick/NOHZ. | |
| 19 | + | |
| 20 | +VIC required properties: | |
| 21 | + - compatible = "arm,pl192-vic". | |
| 22 | + - interrupt-controller. | |
| 23 | + - reg : The register bank for the device. | |
| 24 | + - #interrupt-cells : Must be 1. | |
| @@ -6,7 +6,9 @@ driver matching. · 5 unmodified lines | ||
| 6 | 6 | |
| 7 | 7 | Required properties: |
| 8 | 8 | |
| 9 | −- compatible : should be a specific value for peripheral and "arm,primecell" | |
| 9 | +- compatible : should be a specific name for the peripheral and | |
| 10 | + "arm,primecell". The specific name will match the ARM | |
| 11 | + engineering name for the logic block in the form: "arm,pl???" | |
| 10 | 12 | |
| 11 | 13 | Optional properties: |
| 12 | 14 | |
| @@ -0,0 +1,17 @@ | ||
| 1 | +* Calxeda SATA Controller | |
| 2 | + | |
| 3 | +SATA nodes are defined to describe on-chip Serial ATA controllers. | |
| 4 | +Each SATA controller should have its own node. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | +- compatible : compatible list, contains "calxeda,hb-ahci" | |
| 8 | +- interrupts : <interrupt mapping for SATA IRQ> | |
| 9 | +- reg : <registers mapping> | |
| 10 | + | |
| 11 | +Example: | |
| 12 | + sata@ffe08000 { | |
| 13 | + compatible = "calxeda,hb-ahci"; | |
| 14 | + reg = <0xffe08000 0x1000>; | |
| 15 | + interrupts = <115>; | |
| 16 | + }; | |
| 17 | + | |
| @@ -0,0 +1,23 @@ | ||
| 1 | +Picochip picoXcell SPAcc (Security Protocol Accelerator) bindings | |
| 2 | + | |
| 3 | +Picochip picoXcell devices contain crypto offload engines that may be used for | |
| 4 | +IPSEC and femtocell layer 2 ciphering. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine | |
| 8 | + "picochip,spacc-l2" for the femtocell layer 2 ciphering engine. | |
| 9 | + - reg : Offset and length of the register set for this device | |
| 10 | + - interrupt-parent : The interrupt controller that controls the SPAcc | |
| 11 | + interrupt. | |
| 12 | + - interrupts : The interrupt line from the SPAcc. | |
| 13 | + - ref-clock : The input clock that drives the SPAcc. | |
| 14 | + | |
| 15 | +Example SPAcc node: | |
| 16 | + | |
| 17 | +spacc@10000 { | |
| 18 | + compatible = "picochip,spacc-ipsec"; | |
| 19 | + reg = <0x100000 0x10000>; | |
| 20 | + interrupt-parent = <&vic0>; | |
| 21 | + interrupts = <24>; | |
| 22 | + ref-clock = <&ipsec_clk>, "ref"; | |
| 23 | +}; | |
| @@ -0,0 +1,10 @@ | ||
| 1 | +ARM PL061 GPIO controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "arm,pl061", "arm,primecell" | |
| 5 | +- #gpio-cells : Should be two. The first cell is the pin number and the | |
| 6 | + second cell is used to specify optional parameters: | |
| 7 | + - bit 0 specifies polarity (0 for normal, 1 for inverted) | |
| 8 | +- gpio-controller : Marks the device node as a GPIO controller. | |
| 9 | +- interrupts : Interrupt mapping for GPIO IRQ. | |
| 10 | + | |
| @@ -0,0 +1,25 @@ | ||
| 1 | +* Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : Should be "fsl,<chip>-i2c" | |
| 5 | +- reg : Should contain I2C/HS-I2C registers location and length | |
| 6 | +- interrupts : Should contain I2C/HS-I2C interrupt | |
| 7 | + | |
| 8 | +Optional properties: | |
| 9 | +- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz. | |
| 10 | + The absence of the propoerty indicates the default frequency 100 kHz. | |
| 11 | + | |
| 12 | +Examples: | |
| 13 | + | |
| 14 | +i2c@83fc4000 { /* I2C2 on i.MX51 */ | |
| 15 | + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; | |
| 16 | + reg = <0x83fc4000 0x4000>; | |
| 17 | + interrupts = <63>; | |
| 18 | +}; | |
| 19 | + | |
| 20 | +i2c@70038000 { /* HS-I2C on i.MX51 */ | |
| 21 | + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; | |
| 22 | + reg = <0x70038000 0x4000>; | |
| 23 | + interrupts = <64>; | |
| 24 | + clock-frequency = <400000>; | |
| 25 | +}; | |
| @@ -0,0 +1,39 @@ | ||
| 1 | +* Samsung's I2C controller | |
| 2 | + | |
| 3 | +The Samsung's I2C controller is used to interface with I2C devices. | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | + - compatible: value should be either of the following. | |
| 7 | + (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c. | |
| 8 | + (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c. | |
| 9 | + - reg: physical base address of the controller and length of memory mapped | |
| 10 | + region. | |
| 11 | + - interrupts: interrupt number to the cpu. | |
| 12 | + - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges. | |
| 13 | + - gpios: The order of the gpios should be the following: <SDA, SCL>. | |
| 14 | + The gpio specifier depends on the gpio controller. | |
| 15 | + | |
| 16 | +Optional properties: | |
| 17 | + - samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not | |
| 18 | + specified, default value is 0. | |
| 19 | + - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not | |
| 20 | + specified, the default value in Hz is 100000. | |
| 21 | + | |
| 22 | +Example: | |
| 23 | + | |
| 24 | + i2c@13870000 { | |
| 25 | + compatible = "samsung,s3c2440-i2c"; | |
| 26 | + reg = <0x13870000 0x100>; | |
| 27 | + interrupts = <345>; | |
| 28 | + samsung,i2c-sda-delay = <100>; | |
| 29 | + samsung,i2c-max-bus-freq = <100000>; | |
| 30 | + gpios = <&gpd1 2 0 /* SDA */ | |
| 31 | + &gpd1 3 0 /* SCL */>; | |
| 32 | + #address-cells = <1>; | |
| 33 | + #size-cells = <0>; | |
| 34 | + | |
| 35 | + wm8994@1a { | |
| 36 | + compatible = "wlf,wm8994"; | |
| 37 | + reg = <0x1a>; | |
| 38 | + }; | |
| 39 | + }; | |
| @@ -0,0 +1,27 @@ | ||
| 1 | +* NVIDIA Tegra Secure Digital Host Controller | |
| 2 | + | |
| 3 | +This controller on Tegra family SoCs provides an interface for MMC, SD, | |
| 4 | +and SDIO types of memory cards. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | +- compatible : Should be "nvidia,<chip>-sdhci" | |
| 8 | +- reg : Should contain SD/MMC registers location and length | |
| 9 | +- interrupts : Should contain SD/MMC interrupt | |
| 10 | + | |
| 11 | +Optional properties: | |
| 12 | +- cd-gpios : Specify GPIOs for card detection | |
| 13 | +- wp-gpios : Specify GPIOs for write protection | |
| 14 | +- power-gpios : Specify GPIOs for power control | |
| 15 | +- support-8bit : Boolean, indicates if 8-bit mode should be used. | |
| 16 | + | |
| 17 | +Example: | |
| 18 | + | |
| 19 | +sdhci@c8000200 { | |
| 20 | + compatible = "nvidia,tegra20-sdhci"; | |
| 21 | + reg = <0xc8000200 0x200>; | |
| 22 | + interrupts = <47>; | |
| 23 | + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | |
| 24 | + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | |
| 25 | + power-gpios = <&gpio 155 0>; /* gpio PT3 */ | |
| 26 | + support-8bit; | |
| 27 | +}; | |
| @@ -0,0 +1,14 @@ | ||
| 1 | +* Atmel Data Flash | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "atmel,<model>", "atmel,<series>", "atmel,dataflash". | |
| 5 | + | |
| 6 | +Example: | |
| 7 | + | |
| 8 | +flash@1 { | |
| 9 | + #address-cells = <1>; | |
| 10 | + #size-cells = <1>; | |
| 11 | + compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash"; | |
| 12 | + spi-max-frequency = <25000000>; | |
| 13 | + reg = <1>; | |
| 14 | +}; | |
| @@ -1,61 +1,24 @@ | ||
| 1 | −CAN Device Tree Bindings | |
| 2 | −------------------------ | |
| 3 | −2011 Freescale Semiconductor, Inc. | |
| 1 | +Flexcan CAN contoller on Freescale's ARM and PowerPC system-on-a-chip (SOC). | |
| 4 | 2 | |
| 5 | −fsl,flexcan-v1.0 nodes | |
| 6 | −----------------------- | |
| 7 | −In addition to the required compatible-, reg- and interrupt-properties, you can | |
| 8 | −also specify which clock source shall be used for the controller. | |
| 3 | +Required properties: | |
| 9 | 4 | |
| 10 | −CPI Clock- Can Protocol Interface Clock | |
| 11 | − This CLK_SRC bit of CTRL(control register) selects the clock source to | |
| 12 | − the CAN Protocol Interface(CPI) to be either the peripheral clock | |
| 13 | − (driven by the PLL) or the crystal oscillator clock. The selected clock | |
| 14 | − is the one fed to the prescaler to generate the Serial Clock (Sclock). | |
| 15 | − The PRESDIV field of CTRL(control register) controls a prescaler that | |
| 16 | − generates the Serial Clock (Sclock), whose period defines the | |
| 17 | − time quantum used to compose the CAN waveform. | |
| 5 | +- compatible : Should be "fsl,<processor>-flexcan" | |
| 18 | 6 | |
| 19 | −Can Engine Clock Source | |
| 20 | − There are two sources for CAN clock | |
| 21 | − - Platform Clock It represents the bus clock | |
| 22 | − - Oscillator Clock | |
| 7 | + An implementation should also claim any of the following compatibles | |
| 8 | + that it is fully backwards compatible with: | |
| 23 | 9 | |
| 24 | − Peripheral Clock (PLL) | |
| 25 | − -------------- | |
| 26 | − | | |
| 27 | − --------- ------------- | |
| 28 | − | |CPI Clock | Prescaler | Sclock | |
| 29 | − | |---------------->| (1.. 256) |------------> | |
| 30 | − --------- ------------- | |
| 31 | − | | | |
| 32 | − -------------- ---------------------CLK_SRC | |
| 33 | − Oscillator Clock | |
| 10 | + - fsl,p1010-flexcan | |
| 34 | 11 | |
| 35 | −- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects | |
| 36 | − the peripheral clock. PLL clock is fed to the | |
| 37 | − prescaler to generate the Serial Clock (Sclock). | |
| 38 | − Valid values are "oscillator" and "platform" | |
| 39 | − "oscillator": CAN engine clock source is oscillator clock. | |
| 40 | − "platform" The CAN engine clock source is the bus clock | |
| 41 | − (platform clock). | |
| 12 | +- reg : Offset and length of the register set for this device | |
| 13 | +- interrupts : Interrupt tuple for this device | |
| 14 | +- clock-frequency : The oscillator frequency driving the flexcan device | |
| 42 | 15 | |
| 43 | −- fsl,flexcan-clock-divider : for the reference and system clock, an additional | |
| 44 | − clock divider can be specified. | |
| 45 | −- clock-frequency: frequency required to calculate the bitrate for FlexCAN. | |
| 16 | +Example: | |
| 46 | 17 | |
| 47 | −Note: | |
| 48 | − - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC. | |
| 49 | − - P1010 does not have oscillator as the Clock Source.So the default | |
| 50 | − Clock Source is platform clock. | |
| 51 | −Examples: | |
| 52 | − | |
| 53 | − can0@1c000 { | |
| 54 | − compatible = "fsl,flexcan-v1.0"; | |
| 18 | + can@1c000 { | |
| 19 | + compatible = "fsl,p1010-flexcan"; | |
| 55 | 20 | reg = <0x1c000 0x1000>; |
| 56 | 21 | interrupts = <48 0x2>; |
| 57 | 22 | interrupt-parent = <&mpic>; |
| 58 | − fsl,flexcan-clock-source = "platform"; | |
| 59 | − fsl,flexcan-clock-divider = <2>; | |
| 60 | − clock-frequency = <fixed by u-boot>; | |
| 23 | + clock-frequency = <200000000>; // filled in by bootloader | |
| 61 | 24 | }; |
| @@ -0,0 +1,38 @@ | ||
| 1 | +* Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : Should be "smsc,lan<model>", "smsc,lan9115" | |
| 5 | +- reg : Address and length of the io space for SMSC LAN | |
| 6 | +- interrupts : Should contain SMSC LAN interrupt line | |
| 7 | +- interrupt-parent : Should be the phandle for the interrupt controller | |
| 8 | + that services interrupts for this device | |
| 9 | +- phy-mode : String, operation mode of the PHY interface. | |
| 10 | + Supported values are: "mii", "gmii", "sgmii", "tbi", "rmii", | |
| 11 | + "rgmii", "rgmii-id", "rgmii-rxid", "rgmii-txid", "rtbi", "smii". | |
| 12 | + | |
| 13 | +Optional properties: | |
| 14 | +- reg-shift : Specify the quantity to shift the register offsets by | |
| 15 | +- reg-io-width : Specify the size (in bytes) of the IO accesses that | |
| 16 | + should be performed on the device. Valid value for SMSC LAN is | |
| 17 | + 2 or 4. If it's omitted or invalid, the size would be 2. | |
| 18 | +- smsc,irq-active-high : Indicates the IRQ polarity is active-high | |
| 19 | +- smsc,irq-push-pull : Indicates the IRQ type is push-pull | |
| 20 | +- smsc,force-internal-phy : Forces SMSC LAN controller to use | |
| 21 | + internal PHY | |
| 22 | +- smsc,force-external-phy : Forces SMSC LAN controller to use | |
| 23 | + external PHY | |
| 24 | +- smsc,save-mac-address : Indicates that mac address needs to be saved | |
| 25 | + before resetting the controller | |
| 26 | +- local-mac-address : 6 bytes, mac address | |
| 27 | + | |
| 28 | +Examples: | |
| 29 | + | |
| 30 | +lan9220@f4000000 { | |
| 31 | + compatible = "smsc,lan9220", "smsc,lan9115"; | |
| 32 | + reg = <0xf4000000 0x2000000>; | |
| 33 | + phy-mode = "mii"; | |
| 34 | + interrupt-parent = <&gpio1>; | |
| 35 | + interrupts = <31>; | |
| 36 | + reg-io-width = <4>; | |
| 37 | + smsc,irq-push-pull; | |
| 38 | +}; | |
| @@ -0,0 +1,5 @@ | ||
| 1 | +NVIDIA Tegra 2 pinmux controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "nvidia,tegra20-pinmux" | |
| 5 | + | |
| @@ -1,3 +1,8 @@ | ||
| 1 | +Freescale Reference Board Bindings | |
| 2 | + | |
| 3 | +This document describes device tree bindings for various devices that | |
| 4 | +exist on some Freescale reference boards. | |
| 5 | + | |
| 1 | 6 | * Board Control and Status (BCSR) |
| 2 | 7 | |
| 3 | 8 | Required properties: |
| @@ -12,25 +17,26 @@ Example: · 8 unmodified lines | ||
| 12 | 17 | reg = <f8000000 8000>; |
| 13 | 18 | }; |
| 14 | 19 | |
| 15 | −* Freescale on board FPGA | |
| 20 | +* Freescale on-board FPGA | |
| 16 | 21 | |
| 17 | 22 | This is the memory-mapped registers for on board FPGA. |
| 18 | 23 | |
| 19 | 24 | Required properities: |
| 20 | −- compatible : should be "fsl,fpga-pixis". | |
| 21 | −- reg : should contain the address and the length of the FPPGA register | |
| 22 | − set. | |
| 25 | +- compatible: should be a board-specific string followed by a string | |
| 26 | + indicating the type of FPGA. Example: | |
| 27 | + "fsl,<board>-fpga", "fsl,fpga-pixis" | |
| 28 | +- reg: should contain the address and the length of the FPGA register set. | |
| 23 | 29 | - interrupt-parent: should specify phandle for the interrupt controller. |
| 24 | −- interrupts : should specify event (wakeup) IRQ. | |
| 30 | +- interrupts: should specify event (wakeup) IRQ. | |
| 25 | 31 | |
| 26 | −Example (MPC8610HPCD): | |
| 32 | +Example (P1022DS): | |
| 27 | 33 | |
| 28 | − board-control@e8000000 { | |
| 29 | − compatible = "fsl,fpga-pixis"; | |
| 30 | − reg = <0xe8000000 32>; | |
| 31 | − interrupt-parent = <&mpic>; | |
| 32 | − interrupts = <8 8>; | |
| 33 | − }; | |
| 34 | + board-control@3,0 { | |
| 35 | + compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis"; | |
| 36 | + reg = <3 0 0x30>; | |
| 37 | + interrupt-parent = <&mpic>; | |
| 38 | + interrupts = <8 8 0 0>; | |
| 39 | + }; | |
| 34 | 40 | |
| 35 | 41 | * Freescale BCSR GPIO banks |
| 36 | 42 | |
| @@ -0,0 +1,395 @@ | ||
| 1 | +=================================================================== | |
| 2 | +Debug Control and Status Register (DCSR) Binding | |
| 3 | +Copyright 2011 Freescale Semiconductor Inc. | |
| 4 | + | |
| 5 | +NOTE: The bindings described in this document are preliminary and subject | |
| 6 | +to change. Some of the compatible strings that contain only generic names | |
| 7 | +may turn out to be inappropriate, or need additional properties to describe | |
| 8 | +the integration of the block with the rest of the chip. | |
| 9 | + | |
| 10 | +===================================================================== | |
| 11 | +Debug Control and Status Register Memory Map | |
| 12 | + | |
| 13 | +Description | |
| 14 | + | |
| 15 | +This node defines the base address and range for the | |
| 16 | +defined DCSR Memory Map. Child nodes will describe the individual | |
| 17 | +debug blocks defined within this memory space. | |
| 18 | + | |
| 19 | +PROPERTIES | |
| 20 | + | |
| 21 | + - compatible | |
| 22 | + Usage: required | |
| 23 | + Value type: <string> | |
| 24 | + Definition: Must include "fsl,dcsr" and "simple-bus". | |
| 25 | + The DCSR space exists in the memory-mapped bus. | |
| 26 | + | |
| 27 | + - #address-cells | |
| 28 | + Usage: required | |
| 29 | + Value type: <u32> | |
| 30 | + Definition: A standard property. Defines the number of cells | |
| 31 | + or representing physical addresses in child nodes. | |
| 32 | + | |
| 33 | + - #size-cells | |
| 34 | + Usage: required | |
| 35 | + Value type: <u32> | |
| 36 | + Definition: A standard property. Defines the number of cells | |
| 37 | + or representing the size of physical addresses in | |
| 38 | + child nodes. | |
| 39 | + | |
| 40 | + - ranges | |
| 41 | + Usage: required | |
| 42 | + Value type: <prop-encoded-array> | |
| 43 | + Definition: A standard property. Specifies the physical address | |
| 44 | + range of the DCSR space. | |
| 45 | + | |
| 46 | +EXAMPLE | |
| 47 | + dcsr: dcsr@f00000000 { | |
| 48 | + #address-cells = <1>; | |
| 49 | + #size-cells = <1>; | |
| 50 | + compatible = "fsl,dcsr", "simple-bus"; | |
| 51 | + ranges = <0x00000000 0xf 0x00000000 0x01008000>; | |
| 52 | + }; | |
| 53 | + | |
| 54 | +===================================================================== | |
| 55 | +Event Processing Unit | |
| 56 | + | |
| 57 | +This node represents the region of DCSR space allocated to the EPU | |
| 58 | + | |
| 59 | +PROPERTIES | |
| 60 | + | |
| 61 | + - compatible | |
| 62 | + Usage: required | |
| 63 | + Value type: <string> | |
| 64 | + Definition: Must include "fsl,dcsr-epu" | |
| 65 | + | |
| 66 | + - interrupts | |
| 67 | + Usage: required | |
| 68 | + Value type: <prop_encoded-array> | |
| 69 | + Definition: Specifies the interrupts generated by the EPU. | |
| 70 | + The value of the interrupts property consists of three | |
| 71 | + interrupt specifiers. The format of the specifier is defined | |
| 72 | + by the binding document describing the node's interrupt parent. | |
| 73 | + | |
| 74 | + The EPU counters can be configured to assert the performance | |
| 75 | + monitor interrupt signal based on either counter overflow or value | |
| 76 | + match. Which counter asserted the interrupt is captured in an EPU | |
| 77 | + Counter Interrupt Status Register (EPCPUISR). | |
| 78 | + | |
| 79 | + The EPU unit can also be configured to assert either or both of | |
| 80 | + two interrupt signals based on debug event sources within the SoC. | |
| 81 | + The interrupt signals are epu_xt_int0 and epu_xt_int1. | |
| 82 | + Which event source asserted the interrupt is captured in an EPU | |
| 83 | + Interrupt Status Register (EPISR0,EPISR1). | |
| 84 | + | |
| 85 | + Interrupt numbers are lised in order (perfmon, event0, event1). | |
| 86 | + | |
| 87 | + - interrupt-parent | |
| 88 | + Usage: required | |
| 89 | + Value type: <phandle> | |
| 90 | + Definition: A single <phandle> value that points | |
| 91 | + to the interrupt parent to which the child domain | |
| 92 | + is being mapped. Value must be "&mpic" | |
| 93 | + | |
| 94 | + - reg | |
| 95 | + Usage: required | |
| 96 | + Value type: <prop-encoded-array> | |
| 97 | + Definition: A standard property. Specifies the physical address | |
| 98 | + offset and length of the DCSR space registers of the device | |
| 99 | + configuration block. | |
| 100 | + | |
| 101 | +EXAMPLE | |
| 102 | + dcsr-epu@0 { | |
| 103 | + compatible = "fsl,dcsr-epu"; | |
| 104 | + interrupts = <52 2 0 0 | |
| 105 | + 84 2 0 0 | |
| 106 | + 85 2 0 0>; | |
| 107 | + interrupt-parent = <&mpic>; | |
| 108 | + reg = <0x0 0x1000>; | |
| 109 | + }; | |
| 110 | + | |
| 111 | +======================================================================= | |
| 112 | +Nexus Port Controller | |
| 113 | + | |
| 114 | +This node represents the region of DCSR space allocated to the NPC | |
| 115 | + | |
| 116 | +PROPERTIES | |
| 117 | + | |
| 118 | + - compatible | |
| 119 | + Usage: required | |
| 120 | + Value type: <string> | |
| 121 | + Definition: Must include "fsl,dcsr-npc" | |
| 122 | + | |
| 123 | + - reg | |
| 124 | + Usage: required | |
| 125 | + Value type: <prop-encoded-array> | |
| 126 | + Definition: A standard property. Specifies the physical address | |
| 127 | + offset and length of the DCSR space registers of the device | |
| 128 | + configuration block. | |
| 129 | + The Nexus Port controller occupies two regions in the DCSR space | |
| 130 | + with distinct functionality. | |
| 131 | + | |
| 132 | + The first register range describes the Nexus Port Controller | |
| 133 | + control and status registers. | |
| 134 | + | |
| 135 | + The second register range describes the Nexus Port Controller | |
| 136 | + internal trace buffer. The NPC trace buffer is a small memory buffer | |
| 137 | + which stages the nexus trace data for transmission via the Aurora port | |
| 138 | + or to a DDR based trace buffer. In some configurations the NPC trace | |
| 139 | + buffer can be the only trace buffer used. | |
| 140 | + | |
| 141 | + | |
| 142 | +EXAMPLE | |
| 143 | + dcsr-npc { | |
| 144 | + compatible = "fsl,dcsr-npc"; | |
| 145 | + reg = <0x1000 0x1000 0x1000000 0x8000>; | |
| 146 | + }; | |
| 147 | + | |
| 148 | +======================================================================= | |
| 149 | +Nexus Concentrator | |
| 150 | + | |
| 151 | +This node represents the region of DCSR space allocated to the NXC | |
| 152 | + | |
| 153 | +PROPERTIES | |
| 154 | + | |
| 155 | + - compatible | |
| 156 | + Usage: required | |
| 157 | + Value type: <string> | |
| 158 | + Definition: Must include "fsl,dcsr-nxc" | |
| 159 | + | |
| 160 | + - reg | |
| 161 | + Usage: required | |
| 162 | + Value type: <prop-encoded-array> | |
| 163 | + Definition: A standard property. Specifies the physical address | |
| 164 | + offset and length of the DCSR space registers of the device | |
| 165 | + configuration block. | |
| 166 | + | |
| 167 | +EXAMPLE | |
| 168 | + dcsr-nxc@2000 { | |
| 169 | + compatible = "fsl,dcsr-nxc"; | |
| 170 | + reg = <0x2000 0x1000>; | |
| 171 | + }; | |
| 172 | +======================================================================= | |
| 173 | +CoreNet Debug Controller | |
| 174 | + | |
| 175 | +This node represents the region of DCSR space allocated to | |
| 176 | +the CoreNet Debug controller. | |
| 177 | + | |
| 178 | +PROPERTIES | |
| 179 | + | |
| 180 | + - compatible | |
| 181 | + Usage: required | |
| 182 | + Value type: <string> | |
| 183 | + Definition: Must include "fsl,dcsr-corenet" | |
| 184 | + | |
| 185 | + - reg | |
| 186 | + Usage: required | |
| 187 | + Value type: <prop-encoded-array> | |
| 188 | + Definition: A standard property. Specifies the physical address | |
| 189 | + offset and length of the DCSR space registers of the device | |
| 190 | + configuration block. | |
| 191 | + The CoreNet Debug controller occupies two regions in the DCSR space | |
| 192 | + with distinct functionality. | |
| 193 | + | |
| 194 | + The first register range describes the CoreNet Debug Controller | |
| 195 | + functionalty to perform transaction and transaction attribute matches. | |
| 196 | + | |
| 197 | + The second register range describes the CoreNet Debug Controller | |
| 198 | + functionalty to trigger event notifications and debug traces. | |
| 199 | + | |
| 200 | +EXAMPLE | |
| 201 | + dcsr-corenet { | |
| 202 | + compatible = "fsl,dcsr-corenet"; | |
| 203 | + reg = <0x8000 0x1000 0xB0000 0x1000>; | |
| 204 | + }; | |
| 205 | + | |
| 206 | +======================================================================= | |
| 207 | +Data Path Debug controller | |
| 208 | + | |
| 209 | +This node represents the region of DCSR space allocated to | |
| 210 | +the DPAA Debug Controller. This controller controls debug configuration | |
| 211 | +for the QMAN and FMAN blocks. | |
| 212 | + | |
| 213 | +PROPERTIES | |
| 214 | + | |
| 215 | + - compatible | |
| 216 | + Usage: required | |
| 217 | + Value type: <string> | |
| 218 | + Definition: Must include both an identifier specific to the SoC | |
| 219 | + or Debug IP of the form "fsl,<soc>-dcsr-dpaa" in addition to the | |
| 220 | + generic compatible string "fsl,dcsr-dpaa". | |
| 221 | + | |
| 222 | + - reg | |
| 223 | + Usage: required | |
| 224 | + Value type: <prop-encoded-array> | |
| 225 | + Definition: A standard property. Specifies the physical address | |
| 226 | + offset and length of the DCSR space registers of the device | |
| 227 | + configuration block. | |
| 228 | + | |
| 229 | +EXAMPLE | |
| 230 | + dcsr-dpaa@9000 { | |
| 231 | + compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa"; | |
| 232 | + reg = <0x9000 0x1000>; | |
| 233 | + }; | |
| 234 | + | |
| 235 | +======================================================================= | |
| 236 | +OCeaN Debug controller | |
| 237 | + | |
| 238 | +This node represents the region of DCSR space allocated to | |
| 239 | +the OCN Debug Controller. | |
| 240 | + | |
| 241 | +PROPERTIES | |
| 242 | + | |
| 243 | + - compatible | |
| 244 | + Usage: required | |
| 245 | + Value type: <string> | |
| 246 | + Definition: Must include both an identifier specific to the SoC | |
| 247 | + or Debug IP of the form "fsl,<soc>-dcsr-ocn" in addition to the | |
| 248 | + generic compatible string "fsl,dcsr-ocn". | |
| 249 | + | |
| 250 | + - reg | |
| 251 | + Usage: required | |
| 252 | + Value type: <prop-encoded-array> | |
| 253 | + Definition: A standard property. Specifies the physical address | |
| 254 | + offset and length of the DCSR space registers of the device | |
| 255 | + configuration block. | |
| 256 | + | |
| 257 | +EXAMPLE | |
| 258 | + dcsr-ocn@11000 { | |
| 259 | + compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn"; | |
| 260 | + reg = <0x11000 0x1000>; | |
| 261 | + }; | |
| 262 | + | |
| 263 | +======================================================================= | |
| 264 | +DDR Controller Debug controller | |
| 265 | + | |
| 266 | +This node represents the region of DCSR space allocated to | |
| 267 | +the OCN Debug Controller. | |
| 268 | + | |
| 269 | +PROPERTIES | |
| 270 | + | |
| 271 | + - compatible | |
| 272 | + Usage: required | |
| 273 | + Value type: <string> | |
| 274 | + Definition: Must include "fsl,dcsr-ddr" | |
| 275 | + | |
| 276 | + - dev-handle | |
| 277 | + Usage: required | |
| 278 | + Definition: A phandle to associate this debug node with its | |
| 279 | + component controller. | |
| 280 | + | |
| 281 | + - reg | |
| 282 | + Usage: required | |
| 283 | + Value type: <prop-encoded-array> | |
| 284 | + Definition: A standard property. Specifies the physical address | |
| 285 | + offset and length of the DCSR space registers of the device | |
| 286 | + configuration block. | |
| 287 | + | |
| 288 | +EXAMPLE | |
| 289 | + dcsr-ddr@12000 { | |
| 290 | + compatible = "fsl,dcsr-ddr"; | |
| 291 | + dev-handle = <&ddr1>; | |
| 292 | + reg = <0x12000 0x1000>; | |
| 293 | + }; | |
| 294 | + | |
| 295 | +======================================================================= | |
| 296 | +Nexus Aurora Link Controller | |
| 297 | + | |
| 298 | +This node represents the region of DCSR space allocated to | |
| 299 | +the NAL Controller. | |
| 300 | + | |
| 301 | +PROPERTIES | |
| 302 | + | |
| 303 | + - compatible | |
| 304 | + Usage: required | |
| 305 | + Value type: <string> | |
| 306 | + Definition: Must include both an identifier specific to the SoC | |
| 307 | + or Debug IP of the form "fsl,<soc>-dcsr-nal" in addition to the | |
| 308 | + generic compatible string "fsl,dcsr-nal". | |
| 309 | + | |
| 310 | + - reg | |
| 311 | + Usage: required | |
| 312 | + Value type: <prop-encoded-array> | |
| 313 | + Definition: A standard property. Specifies the physical address | |
| 314 | + offset and length of the DCSR space registers of the device | |
| 315 | + configuration block. | |
| 316 | + | |
| 317 | +EXAMPLE | |
| 318 | + dcsr-nal@18000 { | |
| 319 | + compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal"; | |
| 320 | + reg = <0x18000 0x1000>; | |
| 321 | + }; | |
| 322 | + | |
| 323 | + | |
| 324 | +======================================================================= | |
| 325 | +Run Control and Power Management | |
| 326 | + | |
| 327 | +This node represents the region of DCSR space allocated to | |
| 328 | +the RCPM Debug Controller. This functionlity is limited to the | |
| 329 | +control the debug operations of the SoC and cores. | |
| 330 | + | |
| 331 | +PROPERTIES | |
| 332 | + | |
| 333 | + - compatible | |
| 334 | + Usage: required | |
| 335 | + Value type: <string> | |
| 336 | + Definition: Must include both an identifier specific to the SoC | |
| 337 | + or Debug IP of the form "fsl,<soc>-dcsr-rcpm" in addition to the | |
| 338 | + generic compatible string "fsl,dcsr-rcpm". | |
| 339 | + | |
| 340 | + - reg | |
| 341 | + Usage: required | |
| 342 | + Value type: <prop-encoded-array> | |
| 343 | + Definition: A standard property. Specifies the physical address | |
| 344 | + offset and length of the DCSR space registers of the device | |
| 345 | + configuration block. | |
| 346 | + | |
| 347 | +EXAMPLE | |
| 348 | + dcsr-rcpm@22000 { | |
| 349 | + compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm"; | |
| 350 | + reg = <0x22000 0x1000>; | |
| 351 | + }; | |
| 352 | + | |
| 353 | +======================================================================= | |
| 354 | +Core Service Bridge Proxy | |
| 355 | + | |
| 356 | +This node represents the region of DCSR space allocated to | |
| 357 | +the Core Service Bridge Proxies. | |
| 358 | +There is one Core Service Bridge Proxy device for each CPU in the system. | |
| 359 | +This functionlity provides access to the debug operations of the CPU. | |
| 360 | + | |
| 361 | +PROPERTIES | |
| 362 | + | |
| 363 | + - compatible | |
| 364 | + Usage: required | |
| 365 | + Value type: <string> | |
| 366 | + Definition: Must include both an identifier specific to the cpu | |
| 367 | + of the form "fsl,dcsr-<cpu>-sb-proxy" in addition to the | |
| 368 | + generic compatible string "fsl,dcsr-cpu-sb-proxy". | |
| 369 | + | |
| 370 | + - cpu-handle | |
| 371 | + Usage: required | |
| 372 | + Definition: A phandle to associate this debug node with its cpu. | |
| 373 | + | |
| 374 | + - reg | |
| 375 | + Usage: required | |
| 376 | + Value type: <prop-encoded-array> | |
| 377 | + Definition: A standard property. Specifies the physical address | |
| 378 | + offset and length of the DCSR space registers of the device | |
| 379 | + configuration block. | |
| 380 | + | |
| 381 | +EXAMPLE | |
| 382 | + dcsr-cpu-sb-proxy@40000 { | |
| 383 | + compatible = "fsl,dcsr-e500mc-sb-proxy", | |
| 384 | + "fsl,dcsr-cpu-sb-proxy"; | |
| 385 | + cpu-handle = <&cpu0>; | |
| 386 | + reg = <0x40000 0x1000>; | |
| 387 | + }; | |
| 388 | + dcsr-cpu-sb-proxy@41000 { | |
| 389 | + compatible = "fsl,dcsr-e500mc-sb-proxy", | |
| 390 | + "fsl,dcsr-cpu-sb-proxy"; | |
| 391 | + cpu-handle = <&cpu1>; | |
| 392 | + reg = <0x41000 0x1000>; | |
| 393 | + }; | |
| 394 | + | |
| 395 | +======================================================================= | |
| @@ -25,6 +25,16 @@ Required properties: · 24 unmodified lines | ||
| 25 | 25 | are routed to IPIC, and for 85xx/86xx cpu the interrupts are routed |
| 26 | 26 | to MPIC. |
| 27 | 27 | |
| 28 | +Optional properties: | |
| 29 | +- msi-address-64: 64-bit PCI address of the MSIIR register. The MSIIR register | |
| 30 | + is used for MSI messaging. The address of MSIIR in PCI address space is | |
| 31 | + the MSI message address. | |
| 32 | + | |
| 33 | + This property may be used in virtualized environments where the hypervisor | |
| 34 | + has created an alternate mapping for the MSIR block. See below for an | |
| 35 | + explanation. | |
| 36 | + | |
| 37 | + | |
| 28 | 38 | Example: |
| 29 | 39 | msi@41600 { |
| 30 | 40 | compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; |
| @@ -41,3 +51,35 @@ Example: · 10 unmodified lines | ||
| 41 | 51 | 0xe7 0>; |
| 42 | 52 | interrupt-parent = <&mpic>; |
| 43 | 53 | }; |
| 54 | + | |
| 55 | +The Freescale hypervisor and msi-address-64 | |
| 56 | +------------------------------------------- | |
| 57 | +Normally, PCI devices have access to all of CCSR via an ATMU mapping. The | |
| 58 | +Freescale MSI driver calculates the address of MSIIR (in the MSI register | |
| 59 | +block) and sets that address as the MSI message address. | |
| 60 | + | |
| 61 | +In a virtualized environment, the hypervisor may need to create an IOMMU | |
| 62 | +mapping for MSIIR. The Freescale ePAPR hypervisor has this requirement | |
| 63 | +because of hardware limitations of the Peripheral Access Management Unit | |
| 64 | +(PAMU), which is currently the only IOMMU that the hypervisor supports. | |
| 65 | +The ATMU is programmed with the guest physical address, and the PAMU | |
| 66 | +intercepts transactions and reroutes them to the true physical address. | |
| 67 | + | |
| 68 | +In the PAMU, each PCI controller is given only one primary window. The | |
| 69 | +PAMU restricts DMA operations so that they can only occur within a window. | |
| 70 | +Because PCI devices must be able to DMA to memory, the primary window must | |
| 71 | +be used to cover all of the guest's memory space. | |
| 72 | + | |
| 73 | +PAMU primary windows can be divided into 256 subwindows, and each | |
| 74 | +subwindow can have its own address mapping ("guest physical" to "true | |
| 75 | +physical"). However, each subwindow has to have the same alignment, which | |
| 76 | +means they cannot be located at just any address. Because of these | |
| 77 | +restrictions, it is usually impossible to create a 4KB subwindow that | |
| 78 | +covers MSIIR where it's normally located. | |
| 79 | + | |
| 80 | +Therefore, the hypervisor has to create a subwindow inside the same | |
| 81 | +primary window used for memory, but mapped to the MSIR block (where MSIIR | |
| 82 | +lives). The first subwindow after the end of guest memory is used for | |
| 83 | +this. The address specified in the msi-address-64 property is the PCI | |
| 84 | +address of MSIIR. The hypervisor configures the PAMU to map that address to | |
| 85 | +the true physical address of MSIIR. | |
| @@ -0,0 +1,31 @@ | ||
| 1 | +* RS485 serial communications | |
| 2 | + | |
| 3 | +The RTS signal is capable of automatically controlling line direction for | |
| 4 | +the built-in half-duplex mode. | |
| 5 | +The properties described hereafter shall be given to a half-duplex capable | |
| 6 | +UART node. | |
| 7 | + | |
| 8 | +Required properties: | |
| 9 | +- rs485-rts-delay: prop-encoded-array <a b> where: | |
| 10 | + * a is the delay beteween rts signal and beginning of data sent in milliseconds. | |
| 11 | + it corresponds to the delay before sending data. | |
| 12 | + * b is the delay between end of data sent and rts signal in milliseconds | |
| 13 | + it corresponds to the delay after sending data and actual release of the line. | |
| 14 | + | |
| 15 | +Optional properties: | |
| 16 | +- linux,rs485-enabled-at-boot-time: empty property telling to enable the rs485 | |
| 17 | + feature at boot time. It can be disabled later with proper ioctl. | |
| 18 | +- rs485-rx-during-tx: empty property that enables the receiving of data even | |
| 19 | + whilst sending data. | |
| 20 | + | |
| 21 | +RS485 example for Atmel USART: | |
| 22 | + usart0: serial@fff8c000 { | |
| 23 | + compatible = "atmel,at91sam9260-usart"; | |
| 24 | + reg = <0xfff8c000 0x4000>; | |
| 25 | + interrupts = <7>; | |
| 26 | + atmel,use-dma-rx; | |
| 27 | + atmel,use-dma-tx; | |
| 28 | + linux,rs485-enabled-at-boot-time; | |
| 29 | + rs485-rts-delay = <0 200>; // in milliseconds | |
| 30 | + }; | |
| 31 | + | |
| @@ -0,0 +1,11 @@ | ||
| 1 | +* Freescale SGTL5000 Stereo Codec | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "fsl,sgtl5000". | |
| 5 | + | |
| 6 | +Example: | |
| 7 | + | |
| 8 | +codec: sgtl5000@0a { | |
| 9 | + compatible = "fsl,sgtl5000"; | |
| 10 | + reg = <0x0a>; | |
| 11 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8510 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8510" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8510@1a { | |
| 16 | + compatible = "wlf,wm8510"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,16 @@ | ||
| 1 | +WM8523 audio CODEC | |
| 2 | + | |
| 3 | +This device supports I2C only. | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | + | |
| 7 | + - compatible : "wlf,wm8523" | |
| 8 | + | |
| 9 | + - reg : the I2C address of the device. | |
| 10 | + | |
| 11 | +Example: | |
| 12 | + | |
| 13 | +codec: wm8523@1a { | |
| 14 | + compatible = "wlf,wm8523"; | |
| 15 | + reg = <0x1a>; | |
| 16 | +}; | |
| @@ -0,0 +1,16 @@ | ||
| 1 | +WM8580 audio CODEC | |
| 2 | + | |
| 3 | +This device supports I2C only. | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | + | |
| 7 | + - compatible : "wlf,wm8580" | |
| 8 | + | |
| 9 | + - reg : the I2C address of the device. | |
| 10 | + | |
| 11 | +Example: | |
| 12 | + | |
| 13 | +codec: wm8580@1a { | |
| 14 | + compatible = "wlf,wm8580"; | |
| 15 | + reg = <0x1a>; | |
| 16 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8711 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8711" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8711@1a { | |
| 16 | + compatible = "wlf,wm8711"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8728 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8728" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8728@1a { | |
| 16 | + compatible = "wlf,wm8728"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8731 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8731" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8731@1a { | |
| 16 | + compatible = "wlf,wm8731"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8737 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8737" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8737@1a { | |
| 16 | + compatible = "wlf,wm8737"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8741 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8741" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8741@1a { | |
| 16 | + compatible = "wlf,wm8741"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8750 and WM8987 audio CODECs | |
| 2 | + | |
| 3 | +These devices support both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8750" or "wlf,wm8987" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8750@1a { | |
| 16 | + compatible = "wlf,wm8750"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8753 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8753" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8737@1a { | |
| 16 | + compatible = "wlf,wm8753"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,16 @@ | ||
| 1 | +WM8770 audio CODEC | |
| 2 | + | |
| 3 | +This device supports SPI. | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | + | |
| 7 | + - compatible : "wlf,wm8770" | |
| 8 | + | |
| 9 | + - reg : the chip select number. | |
| 10 | + | |
| 11 | +Example: | |
| 12 | + | |
| 13 | +codec: wm8770@1 { | |
| 14 | + compatible = "wlf,wm8770"; | |
| 15 | + reg = <1>; | |
| 16 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8776 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8776" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8776@1a { | |
| 16 | + compatible = "wlf,wm8776"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM8804 audio CODEC | |
| 2 | + | |
| 3 | +This device supports both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm8804" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8804@1a { | |
| 16 | + compatible = "wlf,wm8804"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,12 @@ | ||
| 1 | +ARM PL022 SPI controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "arm,pl022", "arm,primecell" | |
| 5 | +- reg : Offset and length of the register set for the device | |
| 6 | +- interrupts : Should contain SPI controller interrupt | |
| 7 | + | |
| 8 | +Optional properties: | |
| 9 | +- cs-gpios : should specify GPIOs used for chipselects. | |
| 10 | + The gpios will be referred to as reg = <index> in the SPI child nodes. | |
| 11 | + If unspecified, a single SPI device without a chip select can be used. | |
| 12 | + | |
| @@ -0,0 +1,27 @@ | ||
| 1 | +* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART) | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: Should be "atmel,<chip>-usart" | |
| 5 | + The compatible <chip> indicated will be the first SoC to support an | |
| 6 | + additional mode or an USART new feature. | |
| 7 | +- reg: Should contain registers location and length | |
| 8 | +- interrupts: Should contain interrupt | |
| 9 | + | |
| 10 | +Optional properties: | |
| 11 | +- atmel,use-dma-rx: use of PDC or DMA for receiving data | |
| 12 | +- atmel,use-dma-tx: use of PDC or DMA for transmitting data | |
| 13 | + | |
| 14 | +<chip> compatible description: | |
| 15 | +- at91rm9200: legacy USART support | |
| 16 | +- at91sam9260: generic USART implementation for SAM9 SoCs | |
| 17 | + | |
| 18 | +Example: | |
| 19 | + | |
| 20 | + usart0: serial@fff8c000 { | |
| 21 | + compatible = "atmel,at91sam9260-usart"; | |
| 22 | + reg = <0xfff8c000 0x4000>; | |
| 23 | + interrupts = <7>; | |
| 24 | + atmel,use-dma-rx; | |
| 25 | + atmel,use-dma-tx; | |
| 26 | + }; | |
| 27 | + | |
| @@ -0,0 +1,27 @@ | ||
| 1 | +* Qualcomm MSM UART | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : | |
| 5 | + - "qcom,msm-uart", and one of "qcom,msm-hsuart" or | |
| 6 | + "qcom,msm-lsuart". | |
| 7 | +- reg : offset and length of the register set for the device | |
| 8 | + for the hsuart operating in compatible mode, there should be a | |
| 9 | + second pair describing the gsbi registers. | |
| 10 | +- interrupts : should contain the uart interrupt. | |
| 11 | + | |
| 12 | +There are two different UART blocks used in MSM devices, | |
| 13 | +"qcom,msm-hsuart" and "qcom,msm-lsuart". The msm-serial driver is | |
| 14 | +able to handle both of these, and matches against the "qcom,msm-uart" | |
| 15 | +as the compatibility. | |
| 16 | + | |
| 17 | +The registers for the "qcom,msm-hsuart" device need to specify both | |
| 18 | +register blocks, even for the common driver. | |
| 19 | + | |
| 20 | +Example: | |
| 21 | + | |
| 22 | + uart@19c400000 { | |
| 23 | + compatible = "qcom,msm-hsuart", "qcom,msm-uart"; | |
| 24 | + reg = <0x19c40000 0x1000>, | |
| 25 | + <0x19c00000 0x1000>; | |
| 26 | + interrupts = <195>; | |
| 27 | + }; | |
| @@ -0,0 +1,25 @@ | ||
| 1 | +* Synopsys DesignWare ABP UART | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "snps,dw-apb-uart" | |
| 5 | +- reg : offset and length of the register set for the device. | |
| 6 | +- interrupts : should contain uart interrupt. | |
| 7 | +- clock-frequency : the input clock frequency for the UART. | |
| 8 | + | |
| 9 | +Optional properties: | |
| 10 | +- reg-shift : quantity to shift the register offsets by. If this property is | |
| 11 | + not present then the register offsets are not shifted. | |
| 12 | +- reg-io-width : the size (in bytes) of the IO accesses that should be | |
| 13 | + performed on the device. If this property is not present then single byte | |
| 14 | + accesses are used. | |
| 15 | + | |
| 16 | +Example: | |
| 17 | + | |
| 18 | + uart@80230000 { | |
| 19 | + compatible = "snps,dw-apb-uart"; | |
| 20 | + reg = <0x80230000 0x100>; | |
| 21 | + clock-frequency = <3686400>; | |
| 22 | + interrupts = <10>; | |
| 23 | + reg-shift = <2>; | |
| 24 | + reg-io-width = <4>; | |
| 25 | + }; | |
| @@ -0,0 +1,40 @@ | ||
| 1 | +Device tree binding vendor prefix registry. Keep list in alphabetical order. | |
| 2 | + | |
| 3 | +This isn't an exhaustive list, but you should add new prefixes to it before | |
| 4 | +using them to avoid name-space collisions. | |
| 5 | + | |
| 6 | +adi Analog Devices, Inc. | |
| 7 | +amcc Applied Micro Circuits Corporation (APM, formally AMCC) | |
| 8 | +apm Applied Micro Circuits Corporation (APM) | |
| 9 | +arm ARM Ltd. | |
| 10 | +atmel Atmel Corporation | |
| 11 | +chrp Common Hardware Reference Platform | |
| 12 | +dallas Maxim Integrated Products (formerly Dallas Semiconductor) | |
| 13 | +denx Denx Software Engineering | |
| 14 | +epson Seiko Epson Corp. | |
| 15 | +est ESTeem Wireless Modems | |
| 16 | +fsl Freescale Semiconductor | |
| 17 | +GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. | |
| 18 | +gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. | |
| 19 | +hp Hewlett Packard | |
| 20 | +ibm International Business Machines (IBM) | |
| 21 | +idt Integrated Device Technologies, Inc. | |
| 22 | +intercontrol Inter Control Group | |
| 23 | +linux Linux-specific binding | |
| 24 | +marvell Marvell Technology Group Ltd. | |
| 25 | +maxim Maxim Integrated Products | |
| 26 | +mosaixtech Mosaix Technologies, Inc. | |
| 27 | +national National Semiconductor | |
| 28 | +nintendo Nintendo | |
| 29 | +nvidia NVIDIA | |
| 30 | +nxp NXP Semiconductors | |
| 31 | +powervr Imagination Technologies | |
| 32 | +qcom Qualcomm, Inc. | |
| 33 | +ramtron Ramtron International | |
| 34 | +samsung Samsung Semiconductor | |
| 35 | +schindler Schindler | |
| 36 | +simtek | |
| 37 | +sirf SiRF Technology, Inc. | |
| 38 | +stericsson ST-Ericsson | |
| 39 | +ti Texas Instruments | |
| 40 | +xlnx Xilinx | |
| @@ -0,0 +1,17 @@ | ||
| 1 | +* virtio memory mapped device | |
| 2 | + | |
| 3 | +See http://ozlabs.org/~rusty/virtio-spec/ for more details. | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | + | |
| 7 | +- compatible: "virtio,mmio" compatibility string | |
| 8 | +- reg: control registers base address and size including configuration space | |
| 9 | +- interrupts: interrupt generated by the device | |
| 10 | + | |
| 11 | +Example: | |
| 12 | + | |
| 13 | + virtio_block@3000 { | |
| 14 | + compatible = "virtio,mmio"; | |
| 15 | + reg = <0x3000 0x100>; | |
| 16 | + interrupts = <41>; | |
| 17 | + } | |
| @@ -48,10 +48,6 @@ devclass_add_device is called to enumerate the device within the class · 47 unmodified lines | ||
| 48 | 48 | and actually register it with the class, which happens with the |
| 49 | 49 | class's register_dev callback. |
| 50 | 50 | |
| 51 | −NOTE: The device class structures and core routines to manipulate them | |
| 52 | −are not in the mainline kernel, so the discussion is still a bit | |
| 53 | −speculative. | |
| 54 | − | |
| 55 | 51 | |
| 56 | 52 | Driver |
| 57 | 53 | ~~~~~~ |
| @@ -45,33 +45,52 @@ struct device_attribute { · 44 unmodified lines | ||
| 45 | 45 | const char *buf, size_t count); |
| 46 | 46 | }; |
| 47 | 47 | |
| 48 | −Attributes of devices can be exported via drivers using a simple | |
| 49 | −procfs-like interface. | |
| 48 | +Attributes of devices can be exported by a device driver through sysfs. | |
| 50 | 49 | |
| 51 | 50 | Please see Documentation/filesystems/sysfs.txt for more information |
| 52 | 51 | on how sysfs works. |
| 53 | 52 | |
| 53 | +As explained in Documentation/kobject.txt, device attributes must be be | |
| 54 | +created before the KOBJ_ADD uevent is generated. The only way to realize | |
| 55 | +that is by defining an attribute group. | |
| 56 | + | |
| 54 | 57 | Attributes are declared using a macro called DEVICE_ATTR: |
| 55 | 58 | |
| 56 | 59 | #define DEVICE_ATTR(name,mode,show,store) |
| 57 | 60 | |
| 58 | 61 | Example: |
| 59 | 62 | |
| 60 | −DEVICE_ATTR(power,0644,show_power,store_power); | |
| 63 | +static DEVICE_ATTR(type, 0444, show_type, NULL); | |
| 64 | +static DEVICE_ATTR(power, 0644, show_power, store_power); | |
| 61 | 65 | |
| 62 | −This declares a structure of type struct device_attribute named | |
| 63 | −'dev_attr_power'. This can then be added and removed to the device's | |
| 64 | −directory using: | |
| 66 | +This declares two structures of type struct device_attribute with respective | |
| 67 | +names 'dev_attr_type' and 'dev_attr_power'. These two attributes can be | |
| 68 | +organized as follows into a group: | |
| 65 | 69 | |
| 66 | −int device_create_file(struct device *device, struct device_attribute * entry); | |
| 67 | −void device_remove_file(struct device * dev, struct device_attribute * attr); | |
| 70 | +static struct attribute *dev_attrs[] = { | |
| 71 | + &dev_attr_type.attr, | |
| 72 | + &dev_attr_power.attr, | |
| 73 | + NULL, | |
| 74 | +}; | |
| 68 | 75 | |
| 69 | −Example: | |
| 76 | +static struct attribute_group dev_attr_group = { | |
| 77 | + .attrs = dev_attrs, | |
| 78 | +}; | |
| 79 | + | |
| 80 | +static const struct attribute_group *dev_attr_groups[] = { | |
| 81 | + &dev_attr_group, | |
| 82 | + NULL, | |
| 83 | +}; | |
| 84 | + | |
| 85 | +This array of groups can then be associated with a device by setting the | |
| 86 | +group pointer in struct device before device_register() is invoked: | |
| 70 | 87 | |
| 71 | −device_create_file(dev,&dev_attr_power); | |
| 72 | −device_remove_file(dev,&dev_attr_power); | |
| 88 | + dev->groups = dev_attr_groups; | |
| 89 | + device_register(dev); | |
| 73 | 90 | |
| 74 | −The file name will be 'power' with a mode of 0644 (-rw-r--r--). | |
| 91 | +The device_register() function will use the 'groups' pointer to create the | |
| 92 | +device attributes and the device_unregister() function will use this pointer | |
| 93 | +to remove the device attributes. | |
| 75 | 94 | |
| 76 | 95 | Word of warning: While the kernel allows device_create_file() and |
| 77 | 96 | device_remove_file() to be called on a device at any time, userspace has |
| @@ -84,24 +103,4 @@ not know about the new attributes. · 6 unmodified lines | ||
| 84 | 103 | This is important for device driver that need to publish additional |
| 85 | 104 | attributes for a device at driver probe time. If the device driver simply |
| 86 | 105 | calls device_create_file() on the device structure passed to it, then |
| 87 | −userspace will never be notified of the new attributes. Instead, it should | |
| 88 | −probably use class_create() and class->dev_attrs to set up a list of | |
| 89 | −desired attributes in the modules_init function, and then in the .probe() | |
| 90 | −hook, and then use device_create() to create a new device as a child | |
| 91 | −of the probed device. The new device will generate a new uevent and | |
| 92 | −properly advertise the new attributes to userspace. | |
| 93 | − | |
| 94 | −For example, if a driver wanted to add the following attributes: | |
| 95 | −struct device_attribute mydriver_attribs[] = { | |
| 96 | − __ATTR(port_count, 0444, port_count_show), | |
| 97 | − __ATTR(serial_number, 0444, serial_number_show), | |
| 98 | − NULL | |
| 99 | −}; | |
| 100 | − | |
| 101 | −Then in the module init function is would do: | |
| 102 | − mydriver_class = class_create(THIS_MODULE, "my_attrs"); | |
| 103 | − mydriver_class.dev_attr = mydriver_attribs; | |
| 104 | − | |
| 105 | −And assuming 'dev' is the struct device passed into the probe hook, the driver | |
| 106 | −probe function would do something like: | |
| 107 | − device_create(&mydriver_class, dev, chrdev, &private_data, "my_name"); | |
| 106 | +userspace will never be notified of the new attributes. | |
| @@ -27,7 +27,8 @@ use IO::Handle; · 26 unmodified lines | ||
| 27 | 27 | "or51211", "or51132_qam", "or51132_vsb", "bluebird", |
| 28 | 28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", |
| 29 | 29 | "af9015", "ngene", "az6027", "lme2510_lg", "lme2510c_s7395", |
| 30 | − "lme2510c_s7395_old", "drxk", "drxk_terratec_h5"); | |
| 30 | + "lme2510c_s7395_old", "drxk", "drxk_terratec_h5", "tda10071", | |
| 31 | + "it9135" ); | |
| 31 | 32 | |
| 32 | 33 | # Check args |
| 33 | 34 | syntax() if (scalar(@ARGV) != 1); |
| @@ -575,19 +576,10 @@ sub ngene { · 541 unmodified lines | ||
| 575 | 576 | } |
| 576 | 577 | |
| 577 | 578 | sub az6027{ |
| 578 | − my $file = "AZ6027_Linux_Driver.tar.gz"; | |
| 579 | − my $url = "http://linux.terratec.de/files/$file"; | |
| 580 | 579 | my $firmware = "dvb-usb-az6027-03.fw"; |
| 580 | + my $url = "http://linux.terratec.de/files/TERRATEC_S7/$firmware"; | |
| 581 | 581 | |
| 582 | − wgetfile($file, $url); | |
| 583 | − | |
| 584 | − #untar | |
| 585 | − if( system("tar xzvf $file $firmware")){ | |
| 586 | − die "failed to untar firmware"; | |
| 587 | − } | |
| 588 | − if( system("rm $file")){ | |
| 589 | − die ("unable to remove unnecessary files"); | |
| 590 | − } | |
| 582 | + wgetfile($firmware, $url); | |
| 591 | 583 | |
| 592 | 584 | $firmware; |
| 593 | 585 | } |
| @@ -665,6 +657,41 @@ sub drxk_terratec_h5 { · 71 unmodified lines | ||
| 665 | 657 | "$fwfile" |
| 666 | 658 | } |
| 667 | 659 | |
| 660 | +sub it9135 { | |
| 661 | + my $url = "http://kworld.server261.com/kworld/CD/ITE_TiVme/V1.00/"; | |
| 662 | + my $zipfile = "Driver_V10.323.1.0412.100412.zip"; | |
| 663 | + my $hash = "79b597dc648698ed6820845c0c9d0d37"; | |
| 664 | + my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 0); | |
| 665 | + my $drvfile = "Driver_V10.323.1.0412.100412/Data/x86/IT9135BDA.sys"; | |
| 666 | + my $fwfile = "dvb-usb-it9137-01.fw"; | |
| 667 | + | |
| 668 | + checkstandard(); | |
| 669 | + | |
| 670 | + wgetfile($zipfile, $url . $zipfile); | |
| 671 | + verify($zipfile, $hash); | |
| 672 | + unzip($zipfile, $tmpdir); | |
| 673 | + extract("$tmpdir/$drvfile", 69632, 5731, "$fwfile"); | |
| 674 | + | |
| 675 | + "$fwfile" | |
| 676 | +} | |
| 677 | + | |
| 678 | +sub tda10071 { | |
| 679 | + my $sourcefile = "PCTV_460e_reference.zip"; | |
| 680 | + my $url = "ftp://ftp.pctvsystems.com/TV/driver/PCTV%2070e%2080e%20100e%20320e%20330e%20800e/"; | |
| 681 | + my $hash = "4403de903bf2593464c8d74bbc200a57"; | |
| 682 | + my $fwfile = "dvb-fe-tda10071.fw"; | |
| 683 | + my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1); | |
| 684 | + | |
| 685 | + checkstandard(); | |
| 686 | + | |
| 687 | + wgetfile($sourcefile, $url . $sourcefile); | |
| 688 | + verify($sourcefile, $hash); | |
| 689 | + unzip($sourcefile, $tmpdir); | |
| 690 | + extract("$tmpdir/PCTV\ 70e\ 80e\ 100e\ 320e\ 330e\ 800e/32\ bit/emOEM.sys", 0x67d38, 40504, $fwfile); | |
| 691 | + | |
| 692 | + "$fwfile"; | |
| 693 | +} | |
| 694 | + | |
| 668 | 695 | # --------------------------------------------------------------- |
| 669 | 696 | # Utilities |
| 670 | 697 | |
| @@ -0,0 +1,9 @@ | ||
| 1 | +To extract firmware for Kworld UB499-2T (id 1b80:e409) you need to copy the | |
| 2 | +following file(s) to this directory. | |
| 3 | + | |
| 4 | +IT9135BDA.sys Dated Mon 22 Mar 2010 02:20:08 GMT | |
| 5 | + | |
| 6 | +extract using dd | |
| 7 | +dd if=IT9135BDA.sys ibs=1 skip=69632 count=5731 of=dvb-usb-it9137-01.fw | |
| 8 | + | |
| 9 | +copy to default firmware location. | |
| @@ -21,6 +21,11 @@ o fail_make_request · 20 unmodified lines | ||
| 21 | 21 | /sys/block/<device>/make-it-fail or |
| 22 | 22 | /sys/block/<device>/<partition>/make-it-fail. (generic_make_request()) |
| 23 | 23 | |
| 24 | +o fail_mmc_request | |
| 25 | + | |
| 26 | + injects MMC data errors on devices permitted by setting | |
| 27 | + debugfs entries under /sys/kernel/debug/mmc0/fail_mmc_request | |
| 28 | + | |
| 24 | 29 | Configure fault-injection capabilities behavior |
| 25 | 30 | ----------------------------------------------- |
| 26 | 31 | |
| @@ -115,7 +120,8 @@ use the boot option: · 88 unmodified lines | ||
| 115 | 120 | |
| 116 | 121 | failslab= |
| 117 | 122 | fail_page_alloc= |
| 118 | − fail_make_request=<interval>,<probability>,<space>,<times> | |
| 123 | + fail_make_request= | |
| 124 | + mmc_core.fail_request=<interval>,<probability>,<space>,<times> | |
| 119 | 125 | |
| 120 | 126 | How to add new fault injection capability |
| 121 | 127 | ----------------------------------------- |
| @@ -87,23 +87,38 @@ Special configuration for udlfb is usually unnecessary. There are a few · 86 unmodified lines | ||
| 87 | 87 | options, however. |
| 88 | 88 | |
| 89 | 89 | From the command line, pass options to modprobe |
| 90 | −modprobe udlfb defio=1 console=1 | |
| 90 | +modprobe udlfb fb_defio=0 console=1 shadow=1 | |
| 91 | 91 | |
| 92 | −Or for permanent option, create file like /etc/modprobe.d/options with text | |
| 93 | −options udlfb defio=1 console=1 | |
| 92 | +Or modify options on the fly at /sys/module/udlfb/parameters directory via | |
| 93 | +sudo nano fb_defio | |
| 94 | +change the parameter in place, and save the file. | |
| 94 | 95 | |
| 95 | −Accepted options: | |
| 96 | +Unplug/replug USB device to apply with new settings | |
| 97 | + | |
| 98 | +Or for permanent option, create file like /etc/modprobe.d/udlfb.conf with text | |
| 99 | +options udlfb fb_defio=0 console=1 shadow=1 | |
| 100 | + | |
| 101 | +Accepted boolean options: | |
| 96 | 102 | |
| 97 | 103 | fb_defio Make use of the fb_defio (CONFIG_FB_DEFERRED_IO) kernel |
| 98 | 104 | module to track changed areas of the framebuffer by page faults. |
| 99 | − Standard fbdev applications that use mmap but that do not | |
| 100 | − report damage, may be able to work with this enabled. | |
| 101 | − Disabled by default because of overhead and other issues. | |
| 102 | − | |
| 103 | −console Allow fbcon to attach to udlfb provided framebuffers. This | |
| 104 | − is disabled by default because fbcon will aggressively consume | |
| 105 | − the first framebuffer it finds, which isn't usually what the | |
| 106 | − user wants in the case of USB displays. | |
| 105 | + Standard fbdev applications that use mmap but that do not | |
| 106 | + report damage, should be able to work with this enabled. | |
| 107 | + Disable when running with X server that supports reporting | |
| 108 | + changed regions via ioctl, as this method is simpler, | |
| 109 | + more stable, and higher performance. | |
| 110 | + default: fb_defio=1 | |
| 111 | + | |
| 112 | +console Allow fbcon to attach to udlfb provided framebuffers. | |
| 113 | + Can be disabled if fbcon and other clients | |
| 114 | + (e.g. X with --shared-vt) are in conflict. | |
| 115 | + default: console=1 | |
| 116 | + | |
| 117 | +shadow Allocate a 2nd framebuffer to shadow what's currently across | |
| 118 | + the USB bus in device memory. If any pixels are unchanged, | |
| 119 | + do not transmit. Spends host memory to save USB transfers. | |
| 120 | + Enabled by default. Only disable on very low memory systems. | |
| 121 | + default: shadow=1 | |
| 107 | 122 | |
| 108 | 123 | Sysfs Attributes |
| 109 | 124 | ================ |
| @@ -133,41 +133,6 @@ Who: Pavel Machek <pavel@ucw.cz> · 132 unmodified lines | ||
| 133 | 133 | |
| 134 | 134 | --------------------------- |
| 135 | 135 | |
| 136 | −What: sys_sysctl | |
| 137 | −When: September 2010 | |
| 138 | −Option: CONFIG_SYSCTL_SYSCALL | |
| 139 | −Why: The same information is available in a more convenient from | |
| 140 | − /proc/sys, and none of the sysctl variables appear to be | |
| 141 | − important performance wise. | |
| 142 | − | |
| 143 | − Binary sysctls are a long standing source of subtle kernel | |
| 144 | − bugs and security issues. | |
| 145 | − | |
| 146 | − When I looked several months ago all I could find after | |
| 147 | − searching several distributions were 5 user space programs and | |
| 148 | − glibc (which falls back to /proc/sys) using this syscall. | |
| 149 | − | |
| 150 | − The man page for sysctl(2) documents it as unusable for user | |
| 151 | − space programs. | |
| 152 | − | |
| 153 | − sysctl(2) is not generally ABI compatible to a 32bit user | |
| 154 | − space application on a 64bit and a 32bit kernel. | |
| 155 | − | |
| 156 | − For the last several months the policy has been no new binary | |
| 157 | − sysctls and no one has put forward an argument to use them. | |
| 158 | − | |
| 159 | − Binary sysctls issues seem to keep happening appearing so | |
| 160 | − properly deprecating them (with a warning to user space) and a | |
| 161 | − 2 year grace warning period will mean eventually we can kill | |
| 162 | − them and end the pain. | |
| 163 | − | |
| 164 | − In the mean time individual binary sysctls can be dealt with | |
| 165 | − in a piecewise fashion. | |
| 166 | − | |
| 167 | −Who: Eric Biederman <ebiederm@xmission.com> | |
| 168 | − | |
| 169 | −--------------------------- | |
| 170 | − | |
| 171 | 136 | What: /proc/<pid>/oom_adj |
| 172 | 137 | When: August 2012 |
| 173 | 138 | Why: /proc/<pid>/oom_adj allows userspace to influence the oom killer's |
| @@ -495,29 +460,6 @@ Who: Jean Delvare <khali@linux-fr.org> · 321 unmodified lines | ||
| 495 | 460 | |
| 496 | 461 | ---------------------------- |
| 497 | 462 | |
| 498 | −What: Support for UVCIOC_CTRL_ADD in the uvcvideo driver | |
| 499 | −When: 3.2 | |
| 500 | −Why: The information passed to the driver by this ioctl is now queried | |
| 501 | − dynamically from the device. | |
| 502 | −Who: Laurent Pinchart <laurent.pinchart@ideasonboard.com> | |
| 503 | − | |
| 504 | −---------------------------- | |
| 505 | − | |
| 506 | −What: Support for UVCIOC_CTRL_MAP_OLD in the uvcvideo driver | |
| 507 | −When: 3.2 | |
| 508 | −Why: Used only by applications compiled against older driver versions. | |
| 509 | − Superseded by UVCIOC_CTRL_MAP which supports V4L2 menu controls. | |
| 510 | −Who: Laurent Pinchart <laurent.pinchart@ideasonboard.com> | |
| 511 | − | |
| 512 | −---------------------------- | |
| 513 | − | |
| 514 | −What: Support for UVCIOC_CTRL_GET and UVCIOC_CTRL_SET in the uvcvideo driver | |
| 515 | −When: 3.2 | |
| 516 | −Why: Superseded by the UVCIOC_CTRL_QUERY ioctl. | |
| 517 | −Who: Laurent Pinchart <laurent.pinchart@ideasonboard.com> | |
| 518 | − | |
| 519 | −---------------------------- | |
| 520 | − | |
| 521 | 463 | What: Support for driver specific ioctls in the pwc driver (everything |
| 522 | 464 | defined in media/pwc-ioctl.h) |
| 523 | 465 | When: 3.3 |
| @@ -594,9 +536,18 @@ Why: In 3.0, we can now autodetect internal 3G device and already have · 70 unmodified lines | ||
| 594 | 536 | Who: Lee, Chun-Yi <jlee@novell.com> |
| 595 | 537 | |
| 596 | 538 | ---------------------------- |
| 539 | + | |
| 597 | 540 | What: The XFS nodelaylog mount option |
| 598 | 541 | When: 3.3 |
| 599 | 542 | Why: The delaylog mode that has been the default since 2.6.39 has proven |
| 600 | 543 | stable, and the old code is in the way of additional improvements in |
| 601 | 544 | the log code. |
| 602 | 545 | Who: Christoph Hellwig <hch@lst.de> |
| 546 | + | |
| 547 | +---------------------------- | |
| 548 | + | |
| 549 | +What: iwlagn alias support | |
| 550 | +When: 3.5 | |
| 551 | +Why: The iwlagn module has been renamed iwlwifi. The alias will be around | |
| 552 | + for backward compatibility for several cycles and then dropped. | |
| 553 | +Who: Don Fry <donald.h.fry@intel.com> | |
| @@ -92,7 +92,7 @@ OPTIONS · 91 unmodified lines | ||
| 92 | 92 | |
| 93 | 93 | wfdno=n the file descriptor for writing with trans=fd |
| 94 | 94 | |
| 95 | − maxdata=n the number of bytes to use for 9p packet payload (msize) | |
| 95 | + msize=n the number of bytes to use for 9p packet payload | |
| 96 | 96 | |
| 97 | 97 | port=n port to connect to on the remote server |
| 98 | 98 | |
| @@ -29,6 +29,7 @@ d_hash no no no maybe · 28 unmodified lines | ||
| 29 | 29 | d_compare: yes no no maybe |
| 30 | 30 | d_delete: no yes no no |
| 31 | 31 | d_release: no no yes no |
| 32 | +d_prune: no yes no no | |
| 32 | 33 | d_iput: no no yes no |
| 33 | 34 | d_dname: no no no no |
| 34 | 35 | d_automount: no no yes no |
| @@ -73,14 +73,6 @@ nobarrier (*) This also requires an IO stack which can support · 72 unmodified lines | ||
| 73 | 73 | also be used to enable or disable barriers, for |
| 74 | 74 | consistency with other ext3 mount options. |
| 75 | 75 | |
| 76 | −orlov (*) This enables the new Orlov block allocator. It is | |
| 77 | − enabled by default. | |
| 78 | − | |
| 79 | −oldalloc This disables the Orlov block allocator and enables | |
| 80 | − the old block allocator. Orlov should have better | |
| 81 | − performance - we'd like to get some feedback if it's | |
| 82 | − the contrary for you. | |
| 83 | − | |
| 84 | 76 | user_xattr Enables Extended User Attributes. Additionally, you |
| 85 | 77 | need to have extended attribute support enabled in the |
| 86 | 78 | kernel configuration (CONFIG_EXT3_FS_XATTR). See the |
| @@ -160,7 +160,9 @@ noload if the filesystem was not unmounted cleanly, · 159 unmodified lines | ||
| 160 | 160 | lead to any number of problems. |
| 161 | 161 | |
| 162 | 162 | data=journal All data are committed into the journal prior to being |
| 163 | − written into the main file system. | |
| 163 | + written into the main file system. Enabling | |
| 164 | + this mode will disable delayed allocation and | |
| 165 | + O_DIRECT support. | |
| 164 | 166 | |
| 165 | 167 | data=ordered (*) All data are forced directly out to the main file |
| 166 | 168 | system prior to its metadata being committed to the |
| @@ -201,30 +203,19 @@ inode_readahead_blks=n This tuning parameter controls the maximum · 34 unmodified lines | ||
| 201 | 203 | table readahead algorithm will pre-read into |
| 202 | 204 | the buffer cache. The default value is 32 blocks. |
| 203 | 205 | |
| 204 | −orlov (*) This enables the new Orlov block allocator. It is | |
| 205 | − enabled by default. | |
| 206 | − | |
| 207 | −oldalloc This disables the Orlov block allocator and enables | |
| 208 | − the old block allocator. Orlov should have better | |
| 209 | − performance - we'd like to get some feedback if it's | |
| 210 | − the contrary for you. | |
| 211 | − | |
| 212 | −user_xattr Enables Extended User Attributes. Additionally, you | |
| 213 | − need to have extended attribute support enabled in the | |
| 214 | − kernel configuration (CONFIG_EXT4_FS_XATTR). See the | |
| 215 | − attr(5) manual page and http://acl.bestbits.at/ to | |
| 216 | − learn more about extended attributes. | |
| 217 | − | |
| 218 | −nouser_xattr Disables Extended User Attributes. | |
| 219 | − | |
| 220 | −acl Enables POSIX Access Control Lists support. | |
| 221 | − Additionally, you need to have ACL support enabled in | |
| 222 | − the kernel configuration (CONFIG_EXT4_FS_POSIX_ACL). | |
| 223 | − See the acl(5) manual page and http://acl.bestbits.at/ | |
| 224 | − for more information. | |
| 206 | +nouser_xattr Disables Extended User Attributes. If you have extended | |
| 207 | + attribute support enabled in the kernel configuration | |
| 208 | + (CONFIG_EXT4_FS_XATTR), extended attribute support | |
| 209 | + is enabled by default on mount. See the attr(5) manual | |
| 210 | + page and http://acl.bestbits.at/ for more information | |
| 211 | + about extended attributes. | |
| 225 | 212 | |
| 226 | 213 | noacl This option disables POSIX Access Control List |
| 227 | − support. | |
| 214 | + support. If ACL support is enabled in the kernel | |
| 215 | + configuration (CONFIG_EXT4_FS_POSIX_ACL), ACL is | |
| 216 | + enabled by default on mount. See the acl(5) manual | |
| 217 | + page and http://acl.bestbits.at/ for more information | |
| 218 | + about acl. | |
| 228 | 219 | |
| 229 | 220 | bsddf (*) Make 'df' act like BSD. |
| 230 | 221 | minixdf Make 'df' act like Minix. |
| @@ -419,8 +410,8 @@ written to the journal first, and then to its final location. · 188 unmodified lines | ||
| 419 | 410 | In the event of a crash, the journal can be replayed, bringing both data and |
| 420 | 411 | metadata into a consistent state. This mode is the slowest except when data |
| 421 | 412 | needs to be read from and written to disk at the same time where it |
| 422 | −outperforms all others modes. Currently ext4 does not have delayed | |
| 423 | −allocation support if this data journalling mode is selected. | |
| 413 | +outperforms all others modes. Enabling this mode will disable delayed | |
| 414 | +allocation and O_DIRECT support. | |
| 424 | 415 | |
| 425 | 416 | /proc entries |
| 426 | 417 | ============= |
| @@ -1,3 +1,4 @@ | ||
| 1 | +Note: This filesystem doesn't have a maintainer. | |
| 1 | 2 | |
| 2 | 3 | Macintosh HFS Filesystem for Linux |
| 3 | 4 | ================================== |
| @@ -76,8 +77,6 @@ hformat that can be used to create HFS filesystem. See · 72 unmodified lines | ||
| 76 | 77 | Credits |
| 77 | 78 | ======= |
| 78 | 79 | |
| 79 | −The HFS drivers was written by Paul H. Hargrovea (hargrove@sccm.Stanford.EDU) | |
| 80 | −and is now maintained by Roman Zippel (roman@ardistech.com) at Ardis | |
| 81 | −Technologies. | |
| 82 | −Roman rewrote large parts of the code and brought in btree routines derived | |
| 83 | −from Brad Boyer's hfsplus driver (also maintained by Roman now). | |
| 80 | +The HFS drivers was written by Paul H. Hargrovea (hargrove@sccm.Stanford.EDU). | |
| 81 | +Roman Zippel (roman@ardistech.com) rewrote large parts of the code and brought | |
| 82 | +in btree routines derived from Brad Boyer's hfsplus driver. | |
| @@ -194,7 +194,8 @@ associated with the inotify_handle, and on which events are queued. · 193 unmodified lines | ||
| 194 | 194 | Each watch is associated with an inotify_watch structure. Watches are chained |
| 195 | 195 | off of each associated inotify_handle and each associated inode. |
| 196 | 196 | |
| 197 | −See fs/inotify.c and fs/inotify_user.c for the locking and lifetime rules. | |
| 197 | +See fs/notify/inotify/inotify_fsnotify.c and fs/notify/inotify/inotify_user.c | |
| 198 | +for the locking and lifetime rules. | |
| 198 | 199 | |
| 199 | 200 | |
| 200 | 201 | (vi) Rationale |
| @@ -4,7 +4,7 @@ sysfs - _The_ filesystem for exporting kernel objects. · 3 unmodified lines | ||
| 4 | 4 | Patrick Mochel <mochel@osdl.org> |
| 5 | 5 | Mike Murphy <mamurph@cs.clemson.edu> |
| 6 | 6 | |
| 7 | −Revised: 15 July 2010 | |
| 7 | +Revised: 16 August 2011 | |
| 8 | 8 | Original: 10 January 2003 |
| 9 | 9 | |
| 10 | 10 | |
| @@ -370,3 +370,11 @@ int driver_create_file(struct device_driver *, const struct driver_attribute *); · 359 unmodified lines | ||
| 370 | 370 | void driver_remove_file(struct device_driver *, const struct driver_attribute *); |
| 371 | 371 | |
| 372 | 372 | |
| 373 | +Documentation | |
| 374 | +~~~~~~~~~~~~~ | |
| 375 | + | |
| 376 | +The sysfs directory structure and the attributes in each directory define an | |
| 377 | +ABI between the kernel and user space. As for any ABI, it is important that | |
| 378 | +this ABI is stable and properly documented. All new sysfs attributes must be | |
| 379 | +documented in Documentation/ABI. See also Documentation/ABI/README for more | |
| 380 | +information. | |
| @@ -0,0 +1,25 @@ | ||
| 1 | +Kernel driver ad7314 | |
| 2 | +==================== | |
| 3 | + | |
| 4 | +Supported chips: | |
| 5 | + * Analog Devices AD7314 | |
| 6 | + Prefix: 'ad7314' | |
| 7 | + Datasheet: Publicly available at Analog Devices website. | |
| 8 | + * Analog Devices ADT7301 | |
| 9 | + Prefix: 'adt7301' | |
| 10 | + Datasheet: Publicly available at Analog Devices website. | |
| 11 | + * Analog Devices ADT7302 | |
| 12 | + Prefix: 'adt7302' | |
| 13 | + Datasheet: Publicly available at Analog Devices website. | |
| 14 | + | |
| 15 | +Description | |
| 16 | +----------- | |
| 17 | + | |
| 18 | +Driver supports the above parts. The ad7314 has a 10 bit | |
| 19 | +sensor with 1lsb = 0.25 degrees centigrade. The adt7301 and | |
| 20 | +adt7302 have 14 bit sensors with 1lsb = 0.03125 degrees centigrade. | |
| 21 | + | |
| 22 | +Notes | |
| 23 | +----- | |
| 24 | + | |
| 25 | +Currently power down mode is not supported. | |
| @@ -6,6 +6,10 @@ Supported chips: · 5 unmodified lines | ||
| 6 | 6 | Prefix: 'adm1275' |
| 7 | 7 | Addresses scanned: - |
| 8 | 8 | Datasheet: www.analog.com/static/imported-files/data_sheets/ADM1275.pdf |
| 9 | + * Analog Devices ADM1276 | |
| 10 | + Prefix: 'adm1276' | |
| 11 | + Addresses scanned: - | |
| 12 | + Datasheet: www.analog.com/static/imported-files/data_sheets/ADM1276.pdf | |
| 9 | 13 | |
| 10 | 14 | Author: Guenter Roeck <guenter.roeck@ericsson.com> |
| 11 | 15 | |
| @@ -13,13 +17,13 @@ Author: Guenter Roeck <guenter.roeck@ericsson.com> · 1 unmodified line | ||
| 13 | 17 | Description |
| 14 | 18 | ----------- |
| 15 | 19 | |
| 16 | −This driver supports hardware montoring for Analog Devices ADM1275 Hot-Swap | |
| 17 | −Controller and Digital Power Monitor. | |
| 20 | +This driver supports hardware montoring for Analog Devices ADM1275 and ADM1276 | |
| 21 | +Hot-Swap Controller and Digital Power Monitor. | |
| 18 | 22 | |
| 19 | −The ADM1275 is a hot-swap controller that allows a circuit board to be removed | |
| 20 | −from or inserted into a live backplane. It also features current and voltage | |
| 21 | −readback via an integrated 12-bit analog-to-digital converter (ADC), accessed | |
| 22 | −using a PMBus. interface. | |
| 23 | +ADM1275 and ADM1276 are hot-swap controllers that allow a circuit board to be | |
| 24 | +removed from or inserted into a live backplane. They also feature current and | |
| 25 | +voltage readback via an integrated 12-bit analog-to-digital converter (ADC), | |
| 26 | +accessed using a PMBus interface. | |
| 23 | 27 | |
| 24 | 28 | The driver is a client driver to the core PMBus driver. Please see |
| 25 | 29 | Documentation/hwmon/pmbus for details on PMBus client drivers. |
| @@ -48,17 +52,25 @@ attributes are write-only, all other attributes are read-only. · 22 unmodified lines | ||
| 48 | 52 | |
| 49 | 53 | in1_label "vin1" or "vout1" depending on chip variant and |
| 50 | 54 | configuration. |
| 51 | −in1_input Measured voltage. From READ_VOUT register. | |
| 52 | −in1_min Minumum Voltage. From VOUT_UV_WARN_LIMIT register. | |
| 53 | −in1_max Maximum voltage. From VOUT_OV_WARN_LIMIT register. | |
| 54 | −in1_min_alarm Voltage low alarm. From VOLTAGE_UV_WARNING status. | |
| 55 | −in1_max_alarm Voltage high alarm. From VOLTAGE_OV_WARNING status. | |
| 55 | +in1_input Measured voltage. | |
| 56 | +in1_min Minumum Voltage. | |
| 57 | +in1_max Maximum voltage. | |
| 58 | +in1_min_alarm Voltage low alarm. | |
| 59 | +in1_max_alarm Voltage high alarm. | |
| 56 | 60 | in1_highest Historical maximum voltage. |
| 57 | 61 | in1_reset_history Write any value to reset history. |
| 58 | 62 | |
| 59 | 63 | curr1_label "iout1" |
| 60 | −curr1_input Measured current. From READ_IOUT register. | |
| 61 | −curr1_max Maximum current. From IOUT_OC_WARN_LIMIT register. | |
| 62 | −curr1_max_alarm Current high alarm. From IOUT_OC_WARN_LIMIT register. | |
| 64 | +curr1_input Measured current. | |
| 65 | +curr1_max Maximum current. | |
| 66 | +curr1_max_alarm Current high alarm. | |
| 67 | +curr1_lcrit Critical minimum current. Depending on the chip | |
| 68 | + configuration, either curr1_lcrit or curr1_crit is | |
| 69 | + supported, but not both. | |
| 70 | +curr1_lcrit_alarm Critical current low alarm. | |
| 71 | +curr1_crit Critical maximum current. Depending on the chip | |
| 72 | + configuration, either curr1_lcrit or curr1_crit is | |
| 73 | + supported, but not both. | |
| 74 | +curr1_crit_alarm Critical current high alarm. | |
| 63 | 75 | curr1_highest Historical maximum current. |
| 64 | 76 | curr1_reset_history Write any value to reset history. |
| @@ -0,0 +1,81 @@ | ||
| 1 | +Kernel driver exynos4_tmu | |
| 2 | +================= | |
| 3 | + | |
| 4 | +Supported chips: | |
| 5 | +* ARM SAMSUNG EXYNOS4 series of SoC | |
| 6 | + Prefix: 'exynos4-tmu' | |
| 7 | + Datasheet: Not publicly available | |
| 8 | + | |
| 9 | +Authors: Donggeun Kim <dg77.kim@samsung.com> | |
| 10 | + | |
| 11 | +Description | |
| 12 | +----------- | |
| 13 | + | |
| 14 | +This driver allows to read temperature inside SAMSUNG EXYNOS4 series of SoC. | |
| 15 | + | |
| 16 | +The chip only exposes the measured 8-bit temperature code value | |
| 17 | +through a register. | |
| 18 | +Temperature can be taken from the temperature code. | |
| 19 | +There are three equations converting from temperature to temperature code. | |
| 20 | + | |
| 21 | +The three equations are: | |
| 22 | + 1. Two point trimming | |
| 23 | + Tc = (T - 25) * (TI2 - TI1) / (85 - 25) + TI1 | |
| 24 | + | |
| 25 | + 2. One point trimming | |
| 26 | + Tc = T + TI1 - 25 | |
| 27 | + | |
| 28 | + 3. No trimming | |
| 29 | + Tc = T + 50 | |
| 30 | + | |
| 31 | + Tc: Temperature code, T: Temperature, | |
| 32 | + TI1: Trimming info for 25 degree Celsius (stored at TRIMINFO register) | |
| 33 | + Temperature code measured at 25 degree Celsius which is unchanged | |
| 34 | + TI2: Trimming info for 85 degree Celsius (stored at TRIMINFO register) | |
| 35 | + Temperature code measured at 85 degree Celsius which is unchanged | |
| 36 | + | |
| 37 | +TMU(Thermal Management Unit) in EXYNOS4 generates interrupt | |
| 38 | +when temperature exceeds pre-defined levels. | |
| 39 | +The maximum number of configurable threshold is four. | |
| 40 | +The threshold levels are defined as follows: | |
| 41 | + Level_0: current temperature > trigger_level_0 + threshold | |
| 42 | + Level_1: current temperature > trigger_level_1 + threshold | |
| 43 | + Level_2: current temperature > trigger_level_2 + threshold | |
| 44 | + Level_3: current temperature > trigger_level_3 + threshold | |
| 45 | + | |
| 46 | + The threshold and each trigger_level are set | |
| 47 | + through the corresponding registers. | |
| 48 | + | |
| 49 | +When an interrupt occurs, this driver notify user space of | |
| 50 | +one of four threshold levels for the interrupt | |
| 51 | +through kobject_uevent_env and sysfs_notify functions. | |
| 52 | +Although an interrupt condition for level_0 can be set, | |
| 53 | +it is not notified to user space through sysfs_notify function. | |
| 54 | + | |
| 55 | +Sysfs Interface | |
| 56 | +--------------- | |
| 57 | +name name of the temperature sensor | |
| 58 | + RO | |
| 59 | + | |
| 60 | +temp1_input temperature | |
| 61 | + RO | |
| 62 | + | |
| 63 | +temp1_max temperature for level_1 interrupt | |
| 64 | + RO | |
| 65 | + | |
| 66 | +temp1_crit temperature for level_2 interrupt | |
| 67 | + RO | |
| 68 | + | |
| 69 | +temp1_emergency temperature for level_3 interrupt | |
| 70 | + RO | |
| 71 | + | |
| 72 | +temp1_max_alarm alarm for level_1 interrupt | |
| 73 | + RO | |
| 74 | + | |
| 75 | +temp1_crit_alarm | |
| 76 | + alarm for level_2 interrupt | |
| 77 | + RO | |
| 78 | + | |
| 79 | +temp1_emergency_alarm | |
| 80 | + alarm for level_3 interrupt | |
| 81 | + RO | |
| @@ -12,26 +12,46 @@ Supported chips: · 11 unmodified lines | ||
| 12 | 12 | Addresses scanned: I2C 0x48 - 0x4f |
| 13 | 13 | Datasheet: Publicly available at the National Semiconductor website |
| 14 | 14 | http://www.national.com/ |
| 15 | − * Dallas Semiconductor DS75 | |
| 16 | − Prefix: 'lm75' | |
| 17 | − Addresses scanned: I2C 0x48 - 0x4f | |
| 18 | − Datasheet: Publicly available at the Dallas Semiconductor website | |
| 19 | − http://www.maxim-ic.com/ | |
| 20 | − * Dallas Semiconductor DS1775 | |
| 21 | − Prefix: 'lm75' | |
| 22 | − Addresses scanned: I2C 0x48 - 0x4f | |
| 15 | + * Dallas Semiconductor DS75, DS1775 | |
| 16 | + Prefixes: 'ds75', 'ds1775' | |
| 17 | + Addresses scanned: none | |
| 23 | 18 | Datasheet: Publicly available at the Dallas Semiconductor website |
| 24 | 19 | http://www.maxim-ic.com/ |
| 25 | 20 | * Maxim MAX6625, MAX6626 |
| 26 | − Prefix: 'lm75' | |
| 27 | − Addresses scanned: I2C 0x48 - 0x4b | |
| 21 | + Prefixes: 'max6625', 'max6626' | |
| 22 | + Addresses scanned: none | |
| 28 | 23 | Datasheet: Publicly available at the Maxim website |
| 29 | 24 | http://www.maxim-ic.com/ |
| 30 | 25 | * Microchip (TelCom) TCN75 |
| 31 | 26 | Prefix: 'lm75' |
| 32 | − Addresses scanned: I2C 0x48 - 0x4f | |
| 27 | + Addresses scanned: none | |
| 28 | + Datasheet: Publicly available at the Microchip website | |
| 29 | + http://www.microchip.com/ | |
| 30 | + * Microchip MCP9800, MCP9801, MCP9802, MCP9803 | |
| 31 | + Prefix: 'mcp980x' | |
| 32 | + Addresses scanned: none | |
| 33 | 33 | Datasheet: Publicly available at the Microchip website |
| 34 | 34 | http://www.microchip.com/ |
| 35 | + * Analog Devices ADT75 | |
| 36 | + Prefix: 'adt75' | |
| 37 | + Addresses scanned: none | |
| 38 | + Datasheet: Publicly available at the Analog Devices website | |
| 39 | + http://www.analog.com/adt75 | |
| 40 | + * ST Microelectronics STDS75 | |
| 41 | + Prefix: 'stds75' | |
| 42 | + Addresses scanned: none | |
| 43 | + Datasheet: Publicly available at the ST website | |
| 44 | + http://www.st.com/internet/analog/product/121769.jsp | |
| 45 | + * Texas Instruments TMP100, TMP101, TMP105, TMP75, TMP175, TMP275 | |
| 46 | + Prefixes: 'tmp100', 'tmp101', 'tmp105', 'tmp175', 'tmp75', 'tmp275' | |
| 47 | + Addresses scanned: none | |
| 48 | + Datasheet: Publicly available at the Texas Instruments website | |
| 49 | + http://www.ti.com/product/tmp100 | |
| 50 | + http://www.ti.com/product/tmp101 | |
| 51 | + http://www.ti.com/product/tmp105 | |
| 52 | + http://www.ti.com/product/tmp75 | |
| 53 | + http://www.ti.com/product/tmp175 | |
| 54 | + http://www.ti.com/product/tmp275 | |
| 35 | 55 | |
| 36 | 56 | Author: Frodo Looijaard <frodol@dds.nl> |
| 37 | 57 | |
| @@ -50,21 +70,16 @@ range of -55 to +125 degrees. · 12 unmodified lines | ||
| 50 | 70 | The LM75 only updates its values each 1.5 seconds; reading it more often |
| 51 | 71 | will do no harm, but will return 'old' values. |
| 52 | 72 | |
| 53 | −The LM75 is usually used in combination with LM78-like chips, to measure | |
| 54 | −the temperature of the processor(s). | |
| 55 | − | |
| 56 | −The DS75, DS1775, MAX6625, and MAX6626 are supported as well. | |
| 57 | −They are not distinguished from an LM75. While most of these chips | |
| 58 | −have three additional bits of accuracy (12 vs. 9 for the LM75), | |
| 59 | −the additional bits are not supported. Not only that, but these chips will | |
| 60 | −not be detected if not in 9-bit precision mode (use the force parameter if | |
| 61 | −needed). | |
| 62 | − | |
| 63 | −The TCN75 is supported as well, and is not distinguished from an LM75. | |
| 73 | +The original LM75 was typically used in combination with LM78-like chips | |
| 74 | +on PC motherboards, to measure the temperature of the processor(s). Clones | |
| 75 | +are now used in various embedded designs. | |
| 64 | 76 | |
| 65 | 77 | The LM75 is essentially an industry standard; there may be other |
| 66 | 78 | LM75 clones not listed here, with or without various enhancements, |
| 67 | −that are supported. | |
| 79 | +that are supported. The clones are not detected by the driver, unless | |
| 80 | +they reproduce the exact register tricks of the original LM75, and must | |
| 81 | +therefore be instantiated explicitly. The specific enhancements (such as | |
| 82 | +higher resolution) are not currently supported by the driver. | |
| 68 | 83 | |
| 69 | 84 | The LM77 is not supported, contrary to what we pretended for a long time. |
| 70 | 85 | Both chips are simply not compatible, value encoding differs. |
| @@ -0,0 +1,103 @@ | ||
| 1 | +Kernel driver ltc2978 | |
| 2 | +===================== | |
| 3 | + | |
| 4 | +Supported chips: | |
| 5 | + * Linear Technology LTC2978 | |
| 6 | + Prefix: 'ltc2978' | |
| 7 | + Addresses scanned: - | |
| 8 | + Datasheet: http://cds.linear.com/docs/Datasheet/2978fa.pdf | |
| 9 | + * Linear Technology LTC3880 | |
| 10 | + Prefix: 'ltc3880' | |
| 11 | + Addresses scanned: - | |
| 12 | + Datasheet: http://cds.linear.com/docs/Datasheet/3880f.pdf | |
| 13 | + | |
| 14 | +Author: Guenter Roeck <guenter.roeck@ericsson.com> | |
| 15 | + | |
| 16 | + | |
| 17 | +Description | |
| 18 | +----------- | |
| 19 | + | |
| 20 | +The LTC2978 is an octal power supply monitor, supervisor, sequencer and | |
| 21 | +margin controller. The LTC3880 is a dual, PolyPhase DC/DC synchronous | |
| 22 | +step-down switching regulator controller. | |
| 23 | + | |
| 24 | + | |
| 25 | +Usage Notes | |
| 26 | +----------- | |
| 27 | + | |
| 28 | +This driver does not probe for PMBus devices. You will have to instantiate | |
| 29 | +devices explicitly. | |
| 30 | + | |
| 31 | +Example: the following commands will load the driver for an LTC2978 at address | |
| 32 | +0x60 on I2C bus #1: | |
| 33 | + | |
| 34 | +# modprobe ltc2978 | |
| 35 | +# echo ltc2978 0x60 > /sys/bus/i2c/devices/i2c-1/new_device | |
| 36 | + | |
| 37 | + | |
| 38 | +Sysfs attributes | |
| 39 | +---------------- | |
| 40 | + | |
| 41 | +in1_label "vin" | |
| 42 | +in1_input Measured input voltage. | |
| 43 | +in1_min Minimum input voltage. | |
| 44 | +in1_max Maximum input voltage. | |
| 45 | +in1_lcrit Critical minimum input voltage. | |
| 46 | +in1_crit Critical maximum input voltage. | |
| 47 | +in1_min_alarm Input voltage low alarm. | |
| 48 | +in1_max_alarm Input voltage high alarm. | |
| 49 | +in1_lcrit_alarm Input voltage critical low alarm. | |
| 50 | +in1_crit_alarm Input voltage critical high alarm. | |
| 51 | +in1_lowest Lowest input voltage. LTC2978 only. | |
| 52 | +in1_highest Highest input voltage. | |
| 53 | +in1_reset_history Reset history. Writing into this attribute will reset | |
| 54 | + history for all attributes. | |
| 55 | + | |
| 56 | +in[2-9]_label "vout[1-8]". Channels 3 to 9 on LTC2978 only. | |
| 57 | +in[2-9]_input Measured output voltage. | |
| 58 | +in[2-9]_min Minimum output voltage. | |
| 59 | +in[2-9]_max Maximum output voltage. | |
| 60 | +in[2-9]_lcrit Critical minimum output voltage. | |
| 61 | +in[2-9]_crit Critical maximum output voltage. | |
| 62 | +in[2-9]_min_alarm Output voltage low alarm. | |
| 63 | +in[2-9]_max_alarm Output voltage high alarm. | |
| 64 | +in[2-9]_lcrit_alarm Output voltage critical low alarm. | |
| 65 | +in[2-9]_crit_alarm Output voltage critical high alarm. | |
| 66 | +in[2-9]_lowest Lowest output voltage. LTC2978 only. | |
| 67 | +in[2-9]_highest Lowest output voltage. | |
| 68 | +in[2-9]_reset_history Reset history. Writing into this attribute will reset | |
| 69 | + history for all attributes. | |
| 70 | + | |
| 71 | +temp[1-3]_input Measured temperature. | |
| 72 | + On LTC2978, only one temperature measurement is | |
| 73 | + supported and reflects the internal temperature. | |
| 74 | + On LTC3880, temp1 and temp2 report external | |
| 75 | + temperatures, and temp3 reports the internal | |
| 76 | + temperature. | |
| 77 | +temp[1-3]_min Mimimum temperature. | |
| 78 | +temp[1-3]_max Maximum temperature. | |
| 79 | +temp[1-3]_lcrit Critical low temperature. | |
| 80 | +temp[1-3]_crit Critical high temperature. | |
| 81 | +temp[1-3]_min_alarm Chip temperature low alarm. | |
| 82 | +temp[1-3]_max_alarm Chip temperature high alarm. | |
| 83 | +temp[1-3]_lcrit_alarm Chip temperature critical low alarm. | |
| 84 | +temp[1-3]_crit_alarm Chip temperature critical high alarm. | |
| 85 | +temp[1-3]_lowest Lowest measured temperature. LTC2978 only. | |
| 86 | +temp[1-3]_highest Highest measured temperature. | |
| 87 | +temp[1-3]_reset_history Reset history. Writing into this attribute will reset | |
| 88 | + history for all attributes. | |
| 89 | + | |
| 90 | +power[1-2]_label "pout[1-2]". LTC3880 only. | |
| 91 | +power[1-2]_input Measured power. | |
| 92 | + | |
| 93 | +curr1_label "iin". LTC3880 only. | |
| 94 | +curr1_input Measured input current. | |
| 95 | +curr1_max Maximum input current. | |
| 96 | +curr1_max_alarm Input current high alarm. | |
| 97 | + | |
| 98 | +curr[2-3]_label "iout[1-2]". LTC3880 only. | |
| 99 | +curr[2-3]_input Measured input current. | |
| 100 | +curr[2-3]_max Maximum input current. | |
| 101 | +curr[2-3]_crit Critical input current. | |
| 102 | +curr[2-3]_max_alarm Input current high alarm. | |
| 103 | +curr[2-3]_crit_alarm Input current critical high alarm. | |
| @@ -8,11 +8,6 @@ Supported chips: · 7 unmodified lines | ||
| 8 | 8 | Addresses scanned: - |
| 9 | 9 | Datasheet: |
| 10 | 10 | http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146395 |
| 11 | − * Linear Technology LTC2978 | |
| 12 | − Octal PMBus Power Supply Monitor and Controller | |
| 13 | − Prefix: 'ltc2978' | |
| 14 | − Addresses scanned: - | |
| 15 | − Datasheet: http://cds.linear.com/docs/Datasheet/2978fa.pdf | |
| 16 | 11 | * ON Semiconductor ADP4000, NCP4200, NCP4208 |
| 17 | 12 | Prefixes: 'adp4000', 'ncp4200', 'ncp4208' |
| 18 | 13 | Addresses scanned: - |
| @@ -20,6 +15,14 @@ Supported chips: · 1 unmodified line | ||
| 20 | 15 | http://www.onsemi.com/pub_link/Collateral/ADP4000-D.PDF |
| 21 | 16 | http://www.onsemi.com/pub_link/Collateral/NCP4200-D.PDF |
| 22 | 17 | http://www.onsemi.com/pub_link/Collateral/JUNE%202009-%20REV.%200.PDF |
| 18 | + * Lineage Power | |
| 19 | + Prefixes: 'pdt003', 'pdt006', 'pdt012', 'udt020' | |
| 20 | + Addresses scanned: - | |
| 21 | + Datasheets: | |
| 22 | + http://www.lineagepower.com/oem/pdf/PDT003A0X.pdf | |
| 23 | + http://www.lineagepower.com/oem/pdf/PDT006A0X.pdf | |
| 24 | + http://www.lineagepower.com/oem/pdf/PDT012A0X.pdf | |
| 25 | + http://www.lineagepower.com/oem/pdf/UDT020A0X.pdf | |
| 23 | 26 | * Generic PMBus devices |
| 24 | 27 | Prefix: 'pmbus' |
| 25 | 28 | Addresses scanned: - |
| @@ -0,0 +1,283 @@ | ||
| 1 | +PMBus core driver and internal API | |
| 2 | +================================== | |
| 3 | + | |
| 4 | +Introduction | |
| 5 | +============ | |
| 6 | + | |
| 7 | +[from pmbus.org] The Power Management Bus (PMBus) is an open standard | |
| 8 | +power-management protocol with a fully defined command language that facilitates | |
| 9 | +communication with power converters and other devices in a power system. The | |
| 10 | +protocol is implemented over the industry-standard SMBus serial interface and | |
| 11 | +enables programming, control, and real-time monitoring of compliant power | |
| 12 | +conversion products. This flexible and highly versatile standard allows for | |
| 13 | +communication between devices based on both analog and digital technologies, and | |
| 14 | +provides true interoperability which will reduce design complexity and shorten | |
| 15 | +time to market for power system designers. Pioneered by leading power supply and | |
| 16 | +semiconductor companies, this open power system standard is maintained and | |
| 17 | +promoted by the PMBus Implementers Forum (PMBus-IF), comprising 30+ adopters | |
| 18 | +with the objective to provide support to, and facilitate adoption among, users. | |
| 19 | + | |
| 20 | +Unfortunately, while PMBus commands are standardized, there are no mandatory | |
| 21 | +commands, and manufacturers can add as many non-standard commands as they like. | |
| 22 | +Also, different PMBUs devices act differently if non-supported commands are | |
| 23 | +executed. Some devices return an error, some devices return 0xff or 0xffff and | |
| 24 | +set a status error flag, and some devices may simply hang up. | |
| 25 | + | |
| 26 | +Despite all those difficulties, a generic PMBus device driver is still useful | |
| 27 | +and supported since kernel version 2.6.39. However, it was necessary to support | |
| 28 | +device specific extensions in addition to the core PMBus driver, since it is | |
| 29 | +simply unknown what new device specific functionality PMBus device developers | |
| 30 | +come up with next. | |
| 31 | + | |
| 32 | +To make device specific extensions as scalable as possible, and to avoid having | |
| 33 | +to modify the core PMBus driver repeatedly for new devices, the PMBus driver was | |
| 34 | +split into core, generic, and device specific code. The core code (in | |
| 35 | +pmbus_core.c) provides generic functionality. The generic code (in pmbus.c) | |
| 36 | +provides support for generic PMBus devices. Device specific code is responsible | |
| 37 | +for device specific initialization and, if needed, maps device specific | |
| 38 | +functionality into generic functionality. This is to some degree comparable | |
| 39 | +to PCI code, where generic code is augmented as needed with quirks for all kinds | |
| 40 | +of devices. | |
| 41 | + | |
| 42 | +PMBus device capabilities auto-detection | |
| 43 | +======================================== | |
| 44 | + | |
| 45 | +For generic PMBus devices, code in pmbus.c attempts to auto-detect all supported | |
| 46 | +PMBus commands. Auto-detection is somewhat limited, since there are simply too | |
| 47 | +many variables to consider. For example, it is almost impossible to autodetect | |
| 48 | +which PMBus commands are paged and which commands are replicated across all | |
| 49 | +pages (see the PMBus specification for details on multi-page PMBus devices). | |
| 50 | + | |
| 51 | +For this reason, it often makes sense to provide a device specific driver if not | |
| 52 | +all commands can be auto-detected. The data structures in this driver can be | |
| 53 | +used to inform the core driver about functionality supported by individual | |
| 54 | +chips. | |
| 55 | + | |
| 56 | +Some commands are always auto-detected. This applies to all limit commands | |
| 57 | +(lcrit, min, max, and crit attributes) as well as associated alarm attributes. | |
| 58 | +Limits and alarm attributes are auto-detected because there are simply too many | |
| 59 | +possible combinations to provide a manual configuration interface. | |
| 60 | + | |
| 61 | +PMBus internal API | |
| 62 | +================== | |
| 63 | + | |
| 64 | +The API between core and device specific PMBus code is defined in | |
| 65 | +drivers/hwmon/pmbus/pmbus.h. In addition to the internal API, pmbus.h defines | |
| 66 | +standard PMBus commands and virtual PMBus commands. | |
| 67 | + | |
| 68 | +Standard PMBus commands | |
| 69 | +----------------------- | |
| 70 | + | |
| 71 | +Standard PMBus commands (commands values 0x00 to 0xff) are defined in the PMBUs | |
| 72 | +specification. | |
| 73 | + | |
| 74 | +Virtual PMBus commands | |
| 75 | +---------------------- | |
| 76 | + | |
| 77 | +Virtual PMBus commands are provided to enable support for non-standard | |
| 78 | +functionality which has been implemented by several chip vendors and is thus | |
| 79 | +desirable to support. | |
| 80 | + | |
| 81 | +Virtual PMBus commands start with command value 0x100 and can thus easily be | |
| 82 | +distinguished from standard PMBus commands (which can not have values larger | |
| 83 | +than 0xff). Support for virtual PMBus commands is device specific and thus has | |
| 84 | +to be implemented in device specific code. | |
| 85 | + | |
| 86 | +Virtual commands are named PMBUS_VIRT_xxx and start with PMBUS_VIRT_BASE. All | |
| 87 | +virtual commands are word sized. | |
| 88 | + | |
| 89 | +There are currently two types of virtual commands. | |
| 90 | + | |
| 91 | +- READ commands are read-only; writes are either ignored or return an error. | |
| 92 | +- RESET commands are read/write. Reading reset registers returns zero | |
| 93 | + (used for detection), writing any value causes the associated history to be | |
| 94 | + reset. | |
| 95 | + | |
| 96 | +Virtual commands have to be handled in device specific driver code. Chip driver | |
| 97 | +code returns non-negative values if a virtual command is supported, or a | |
| 98 | +negative error code if not. The chip driver may return -ENODATA or any other | |
| 99 | +Linux error code in this case, though an error code other than -ENODATA is | |
| 100 | +handled more efficiently and thus preferred. Either case, the calling PMBus | |
| 101 | +core code will abort if the chip driver returns an error code when reading | |
| 102 | +or writing virtual registers (in other words, the PMBus core code will never | |
| 103 | +send a virtual command to a chip). | |
| 104 | + | |
| 105 | +PMBus driver information | |
| 106 | +------------------------ | |
| 107 | + | |
| 108 | +PMBus driver information, defined in struct pmbus_driver_info, is the main means | |
| 109 | +for device specific drivers to pass information to the core PMBus driver. | |
| 110 | +Specifically, it provides the following information. | |
| 111 | + | |
| 112 | +- For devices supporting its data in Direct Data Format, it provides coefficients | |
| 113 | + for converting register values into normalized data. This data is usually | |
| 114 | + provided by chip manufacturers in device datasheets. | |
| 115 | +- Supported chip functionality can be provided to the core driver. This may be | |
| 116 | + necessary for chips which react badly if non-supported commands are executed, | |
| 117 | + and/or to speed up device detection and initialization. | |
| 118 | +- Several function entry points are provided to support overriding and/or | |
| 119 | + augmenting generic command execution. This functionality can be used to map | |
| 120 | + non-standard PMBus commands to standard commands, or to augment standard | |
| 121 | + command return values with device specific information. | |
| 122 | + | |
| 123 | + API functions | |
| 124 | + ------------- | |
| 125 | + | |
| 126 | + Functions provided by chip driver | |
| 127 | + --------------------------------- | |
| 128 | + | |
| 129 | + All functions return the command return value (read) or zero (write) if | |
| 130 | + successful. A return value of -ENODATA indicates that there is no manufacturer | |
| 131 | + specific command, but that a standard PMBus command may exist. Any other | |
| 132 | + negative return value indicates that the commands does not exist for this | |
| 133 | + chip, and that no attempt should be made to read or write the standard | |
| 134 | + command. | |
| 135 | + | |
| 136 | + As mentioned above, an exception to this rule applies to virtual commands, | |
| 137 | + which _must_ be handled in driver specific code. See "Virtual PMBus Commands" | |
| 138 | + above for more details. | |
| 139 | + | |
| 140 | + Command execution in the core PMBus driver code is as follows. | |
| 141 | + | |
| 142 | + if (chip_access_function) { | |
| 143 | + status = chip_access_function(); | |
| 144 | + if (status != -ENODATA) | |
| 145 | + return status; | |
| 146 | + } | |
| 147 | + if (command >= PMBUS_VIRT_BASE) /* For word commands/registers only */ | |
| 148 | + return -EINVAL; | |
| 149 | + return generic_access(); | |
| 150 | + | |
| 151 | + Chip drivers may provide pointers to the following functions in struct | |
| 152 | + pmbus_driver_info. All functions are optional. | |
| 153 | + | |
| 154 | + int (*read_byte_data)(struct i2c_client *client, int page, int reg); | |
| 155 | + | |
| 156 | + Read byte from page <page>, register <reg>. | |
| 157 | + <page> may be -1, which means "current page". | |
| 158 | + | |
| 159 | + int (*read_word_data)(struct i2c_client *client, int page, int reg); | |
| 160 | + | |
| 161 | + Read word from page <page>, register <reg>. | |
| 162 | + | |
| 163 | + int (*write_word_data)(struct i2c_client *client, int page, int reg, | |
| 164 | + u16 word); | |
| 165 | + | |
| 166 | + Write word to page <page>, register <reg>. | |
| 167 | + | |
| 168 | + int (*write_byte)(struct i2c_client *client, int page, u8 value); | |
| 169 | + | |
| 170 | + Write byte to page <page>, register <reg>. | |
| 171 | + <page> may be -1, which means "current page". | |
| 172 | + | |
| 173 | + int (*identify)(struct i2c_client *client, struct pmbus_driver_info *info); | |
| 174 | + | |
| 175 | + Determine supported PMBus functionality. This function is only necessary | |
| 176 | + if a chip driver supports multiple chips, and the chip functionality is not | |
| 177 | + pre-determined. It is currently only used by the generic pmbus driver | |
| 178 | + (pmbus.c). | |
| 179 | + | |
| 180 | + Functions exported by core driver | |
| 181 | + --------------------------------- | |
| 182 | + | |
| 183 | + Chip drivers are expected to use the following functions to read or write | |
| 184 | + PMBus registers. Chip drivers may also use direct I2C commands. If direct I2C | |
| 185 | + commands are used, the chip driver code must not directly modify the current | |
| 186 | + page, since the selected page is cached in the core driver and the core driver | |
| 187 | + will assume that it is selected. Using pmbus_set_page() to select a new page | |
| 188 | + is mandatory. | |
| 189 | + | |
| 190 | + int pmbus_set_page(struct i2c_client *client, u8 page); | |
| 191 | + | |
| 192 | + Set PMBus page register to <page> for subsequent commands. | |
| 193 | + | |
| 194 | + int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); | |
| 195 | + | |
| 196 | + Read word data from <page>, <reg>. Similar to i2c_smbus_read_word_data(), but | |
| 197 | + selects page first. | |
| 198 | + | |
| 199 | + int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, | |
| 200 | + u16 word); | |
| 201 | + | |
| 202 | + Write word data to <page>, <reg>. Similar to i2c_smbus_write_word_data(), but | |
| 203 | + selects page first. | |
| 204 | + | |
| 205 | + int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); | |
| 206 | + | |
| 207 | + Read byte data from <page>, <reg>. Similar to i2c_smbus_read_byte_data(), but | |
| 208 | + selects page first. <page> may be -1, which means "current page". | |
| 209 | + | |
| 210 | + int pmbus_write_byte(struct i2c_client *client, int page, u8 value); | |
| 211 | + | |
| 212 | + Write byte data to <page>, <reg>. Similar to i2c_smbus_write_byte(), but | |
| 213 | + selects page first. <page> may be -1, which means "current page". | |
| 214 | + | |
| 215 | + void pmbus_clear_faults(struct i2c_client *client); | |
| 216 | + | |
| 217 | + Execute PMBus "Clear Fault" command on all chip pages. | |
| 218 | + This function calls the device specific write_byte function if defined. | |
| 219 | + Therefore, it must _not_ be called from that function. | |
| 220 | + | |
| 221 | + bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); | |
| 222 | + | |
| 223 | + Check if byte register exists. Return true if the register exists, false | |
| 224 | + otherwise. | |
| 225 | + This function calls the device specific write_byte function if defined to | |
| 226 | + obtain the chip status. Therefore, it must _not_ be called from that function. | |
| 227 | + | |
| 228 | + bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); | |
| 229 | + | |
| 230 | + Check if word register exists. Return true if the register exists, false | |
| 231 | + otherwise. | |
| 232 | + This function calls the device specific write_byte function if defined to | |
| 233 | + obtain the chip status. Therefore, it must _not_ be called from that function. | |
| 234 | + | |
| 235 | + int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, | |
| 236 | + struct pmbus_driver_info *info); | |
| 237 | + | |
| 238 | + Execute probe function. Similar to standard probe function for other drivers, | |
| 239 | + with the pointer to struct pmbus_driver_info as additional argument. Calls | |
| 240 | + identify function if supported. Must only be called from device probe | |
| 241 | + function. | |
| 242 | + | |
| 243 | + void pmbus_do_remove(struct i2c_client *client); | |
| 244 | + | |
| 245 | + Execute driver remove function. Similar to standard driver remove function. | |
| 246 | + | |
| 247 | + const struct pmbus_driver_info | |
| 248 | + *pmbus_get_driver_info(struct i2c_client *client); | |
| 249 | + | |
| 250 | + Return pointer to struct pmbus_driver_info as passed to pmbus_do_probe(). | |
| 251 | + | |
| 252 | + | |
| 253 | +PMBus driver platform data | |
| 254 | +========================== | |
| 255 | + | |
| 256 | +PMBus platform data is defined in include/linux/i2c/pmbus.h. Platform data | |
| 257 | +currently only provides a flag field with a single bit used. | |
| 258 | + | |
| 259 | +#define PMBUS_SKIP_STATUS_CHECK (1 << 0) | |
| 260 | + | |
| 261 | +struct pmbus_platform_data { | |
| 262 | + u32 flags; /* Device specific flags */ | |
| 263 | +}; | |
| 264 | + | |
| 265 | + | |
| 266 | +Flags | |
| 267 | +----- | |
| 268 | + | |
| 269 | +PMBUS_SKIP_STATUS_CHECK | |
| 270 | + | |
| 271 | +During register detection, skip checking the status register for | |
| 272 | +communication or command errors. | |
| 273 | + | |
| 274 | +Some PMBus chips respond with valid data when trying to read an unsupported | |
| 275 | +register. For such chips, checking the status register is mandatory when | |
| 276 | +trying to determine if a chip register exists or not. | |
| 277 | +Other PMBus chips don't support the STATUS_CML register, or report | |
| 278 | +communication errors for no explicable reason. For such chips, checking the | |
| 279 | +status register must be disabled. | |
| 280 | + | |
| 281 | +Some i2c controllers do not support single-byte commands (write commands with | |
| 282 | +no data, i2c_smbus_write_byte()). With such controllers, clearing the status | |
| 283 | +register is impossible, and the PMBUS_SKIP_STATUS_CHECK flag must be set. | |
| @@ -14,6 +14,10 @@ Supported chips: · 13 unmodified lines | ||
| 14 | 14 | Prefix: 'w83627dhg' |
| 15 | 15 | Addresses scanned: ISA address retrieved from Super I/O registers |
| 16 | 16 | Datasheet: not available |
| 17 | + * Winbond W83627UHG | |
| 18 | + Prefix: 'w83627uhg' | |
| 19 | + Addresses scanned: ISA address retrieved from Super I/O registers | |
| 20 | + Datasheet: available from www.nuvoton.com | |
| 17 | 21 | * Winbond W83667HG |
| 18 | 22 | Prefix: 'w83667hg' |
| 19 | 23 | Addresses scanned: ISA address retrieved from Super I/O registers |
| @@ -42,14 +46,13 @@ Description · 22 unmodified lines | ||
| 42 | 46 | ----------- |
| 43 | 47 | |
| 44 | 48 | This driver implements support for the Winbond W83627EHF, W83627EHG, |
| 45 | −W83627DHG, W83627DHG-P, W83667HG, W83667HG-B, W83667HG-I (NCT6775F), | |
| 46 | −and NCT6776F super I/O chips. We will refer to them collectively as | |
| 47 | −Winbond chips. | |
| 48 | − | |
| 49 | −The chips implement three temperature sensors (up to four for 667HG-B, and nine | |
| 50 | −for NCT6775F and NCT6776F), five fan rotation speed sensors, ten analog voltage | |
| 51 | −sensors (only nine for the 627DHG), one VID (6 pins for the 627EHF/EHG, 8 pins | |
| 52 | −for the 627DHG and 667HG), alarms with beep warnings (control unimplemented), | |
| 49 | +W83627DHG, W83627DHG-P, W83627UHG, W83667HG, W83667HG-B, W83667HG-I | |
| 50 | +(NCT6775F), and NCT6776F super I/O chips. We will refer to them collectively | |
| 51 | +as Winbond chips. | |
| 52 | + | |
| 53 | +The chips implement 2 to 4 temperature sensors (9 for NCT6775F and NCT6776F), | |
| 54 | +2 to 5 fan rotation speed sensors, 8 to 10 analog voltage sensors, one VID | |
| 55 | +(except for 627UHG), alarms with beep warnings (control unimplemented), | |
| 53 | 56 | and some automatic fan regulation strategies (plus manual fan control mode). |
| 54 | 57 | |
| 55 | 58 | The temperature sensor sources on W82677HG-B, NCT6775F, and NCT6776F are |
| @@ -86,17 +89,16 @@ follows: · 30 unmodified lines | ||
| 86 | 89 | |
| 87 | 90 | temp1 -> pwm1 |
| 88 | 91 | temp2 -> pwm2 |
| 89 | −temp3 -> pwm3 | |
| 92 | +temp3 -> pwm3 (not on 627UHG) | |
| 90 | 93 | prog -> pwm4 (not on 667HG and 667HG-B; the programmable setting is not |
| 91 | 94 | supported by the driver) |
| 92 | 95 | |
| 93 | 96 | /sys files |
| 94 | 97 | ---------- |
| 95 | 98 | |
| 96 | −name - this is a standard hwmon device entry. For the W83627EHF and W83627EHG, | |
| 97 | − it is set to "w83627ehf", for the W83627DHG it is set to "w83627dhg", | |
| 98 | − for the W83667HG and W83667HG-B it is set to "w83667hg", for NCT6775F it | |
| 99 | − is set to "nct6775", and for NCT6776F it is set to "nct6776". | |
| 99 | +name - this is a standard hwmon device entry, it contains the name of | |
| 100 | + the device (see the prefix in the list of supported devices at | |
| 101 | + the top of this file) | |
| 100 | 102 | |
| 101 | 103 | pwm[1-4] - this file stores PWM duty cycle or DC value (fan speed) in range: |
| 102 | 104 | 0 (stop) to 255 (full) |
| @@ -0,0 +1,125 @@ | ||
| 1 | +Kernel driver zl6100 | |
| 2 | +==================== | |
| 3 | + | |
| 4 | +Supported chips: | |
| 5 | + * Intersil / Zilker Labs ZL2004 | |
| 6 | + Prefix: 'zl2004' | |
| 7 | + Addresses scanned: - | |
| 8 | + Datasheet: http://www.intersil.com/data/fn/fn6847.pdf | |
| 9 | + * Intersil / Zilker Labs ZL2006 | |
| 10 | + Prefix: 'zl2006' | |
| 11 | + Addresses scanned: - | |
| 12 | + Datasheet: http://www.intersil.com/data/fn/fn6850.pdf | |
| 13 | + * Intersil / Zilker Labs ZL2008 | |
| 14 | + Prefix: 'zl2008' | |
| 15 | + Addresses scanned: - | |
| 16 | + Datasheet: http://www.intersil.com/data/fn/fn6859.pdf | |
| 17 | + * Intersil / Zilker Labs ZL2105 | |
| 18 | + Prefix: 'zl2105' | |
| 19 | + Addresses scanned: - | |
| 20 | + Datasheet: http://www.intersil.com/data/fn/fn6851.pdf | |
| 21 | + * Intersil / Zilker Labs ZL2106 | |
| 22 | + Prefix: 'zl2106' | |
| 23 | + Addresses scanned: - | |
| 24 | + Datasheet: http://www.intersil.com/data/fn/fn6852.pdf | |
| 25 | + * Intersil / Zilker Labs ZL6100 | |
| 26 | + Prefix: 'zl6100' | |
| 27 | + Addresses scanned: - | |
| 28 | + Datasheet: http://www.intersil.com/data/fn/fn6876.pdf | |
| 29 | + * Intersil / Zilker Labs ZL6105 | |
| 30 | + Prefix: 'zl6105' | |
| 31 | + Addresses scanned: - | |
| 32 | + Datasheet: http://www.intersil.com/data/fn/fn6906.pdf | |
| 33 | + | |
| 34 | +Author: Guenter Roeck <guenter.roeck@ericsson.com> | |
| 35 | + | |
| 36 | + | |
| 37 | +Description | |
| 38 | +----------- | |
| 39 | + | |
| 40 | +This driver supports hardware montoring for Intersil / Zilker Labs ZL6100 and | |
| 41 | +compatible digital DC-DC controllers. | |
| 42 | + | |
| 43 | +The driver is a client driver to the core PMBus driver. Please see | |
| 44 | +Documentation/hwmon/pmbus and Documentation.hwmon/pmbus-core for details | |
| 45 | +on PMBus client drivers. | |
| 46 | + | |
| 47 | + | |
| 48 | +Usage Notes | |
| 49 | +----------- | |
| 50 | + | |
| 51 | +This driver does not auto-detect devices. You will have to instantiate the | |
| 52 | +devices explicitly. Please see Documentation/i2c/instantiating-devices for | |
| 53 | +details. | |
| 54 | + | |
| 55 | +WARNING: Do not access chip registers using the i2cdump command, and do not use | |
| 56 | +any of the i2ctools commands on a command register used to save and restore | |
| 57 | +configuration data (0x11, 0x12, 0x15, 0x16, and 0xf4). The chips supported by | |
| 58 | +this driver interpret any access to those command registers (including read | |
| 59 | +commands) as request to execute the command in question. Unless write accesses | |
| 60 | +to those registers are protected, this may result in power loss, board resets, | |
| 61 | +and/or Flash corruption. Worst case, your board may turn into a brick. | |
| 62 | + | |
| 63 | + | |
| 64 | +Platform data support | |
| 65 | +--------------------- | |
| 66 | + | |
| 67 | +The driver supports standard PMBus driver platform data. | |
| 68 | + | |
| 69 | + | |
| 70 | +Module parameters | |
| 71 | +----------------- | |
| 72 | + | |
| 73 | +delay | |
| 74 | +----- | |
| 75 | + | |
| 76 | +Some Intersil/Zilker Labs DC-DC controllers require a minimum interval between | |
| 77 | +I2C bus accesses. According to Intersil, the minimum interval is 2 ms, though | |
| 78 | +1 ms appears to be sufficient and has not caused any problems in testing. | |
| 79 | +The problem is known to affect ZL6100, ZL2105, and ZL2008. It is known not to | |
| 80 | +affect ZL2004 and ZL6105. The driver automatically sets the interval to 1 ms | |
| 81 | +except for ZL2004 and ZL6105. To enable manual override, the driver provides a | |
| 82 | +writeable module parameter, 'delay', which can be used to set the interval to | |
| 83 | +a value between 0 and 65,535 microseconds. | |
| 84 | + | |
| 85 | + | |
| 86 | +Sysfs entries | |
| 87 | +------------- | |
| 88 | + | |
| 89 | +The following attributes are supported. Limits are read-write; all other | |
| 90 | +attributes are read-only. | |
| 91 | + | |
| 92 | +in1_label "vin" | |
| 93 | +in1_input Measured input voltage. | |
| 94 | +in1_min Minimum input voltage. | |
| 95 | +in1_max Maximum input voltage. | |
| 96 | +in1_lcrit Critical minumum input voltage. | |
| 97 | +in1_crit Critical maximum input voltage. | |
| 98 | +in1_min_alarm Input voltage low alarm. | |
| 99 | +in1_max_alarm Input voltage high alarm. | |
| 100 | +in1_lcrit_alarm Input voltage critical low alarm. | |
| 101 | +in1_crit_alarm Input voltage critical high alarm. | |
| 102 | + | |
| 103 | +in2_label "vout1" | |
| 104 | +in2_input Measured output voltage. | |
| 105 | +in2_lcrit Critical minumum output Voltage. | |
| 106 | +in2_crit Critical maximum output voltage. | |
| 107 | +in2_lcrit_alarm Critical output voltage critical low alarm. | |
| 108 | +in2_crit_alarm Critical output voltage critical high alarm. | |
| 109 | + | |
| 110 | +curr1_label "iout1" | |
| 111 | +curr1_input Measured output current. | |
| 112 | +curr1_lcrit Critical minimum output current. | |
| 113 | +curr1_crit Critical maximum output current. | |
| 114 | +curr1_lcrit_alarm Output current critical low alarm. | |
| 115 | +curr1_crit_alarm Output current critical high alarm. | |
| 116 | + | |
| 117 | +temp[12]_input Measured temperature. | |
| 118 | +temp[12]_min Minimum temperature. | |
| 119 | +temp[12]_max Maximum temperature. | |
| 120 | +temp[12]_lcrit Critical low temperature. | |
| 121 | +temp[12]_crit Critical high temperature. | |
| 122 | +temp[12]_min_alarm Chip temperature low alarm. | |
| 123 | +temp[12]_max_alarm Chip temperature high alarm. | |
| 124 | +temp[12]_lcrit_alarm Chip temperature critical low alarm. | |
| 125 | +temp[12]_crit_alarm Chip temperature critical high alarm. | |
| @@ -39,23 +39,20 @@ independent, drivers. · 38 unmodified lines | ||
| 39 | 39 | in case an unused hwspinlock isn't available. Users of this |
| 40 | 40 | API will usually want to communicate the lock's id to the remote core |
| 41 | 41 | before it can be used to achieve synchronization. |
| 42 | − Can be called from an atomic context (this function will not sleep) but | |
| 43 | − not from within interrupt context. | |
| 42 | + Should be called from a process context (might sleep). | |
| 44 | 43 | |
| 45 | 44 | struct hwspinlock *hwspin_lock_request_specific(unsigned int id); |
| 46 | 45 | - assign a specific hwspinlock id and return its address, or NULL |
| 47 | 46 | if that hwspinlock is already in use. Usually board code will |
| 48 | 47 | be calling this function in order to reserve specific hwspinlock |
| 49 | 48 | ids for predefined purposes. |
| 50 | − Can be called from an atomic context (this function will not sleep) but | |
| 51 | − not from within interrupt context. | |
| 49 | + Should be called from a process context (might sleep). | |
| 52 | 50 | |
| 53 | 51 | int hwspin_lock_free(struct hwspinlock *hwlock); |
| 54 | 52 | - free a previously-assigned hwspinlock; returns 0 on success, or an |
| 55 | 53 | appropriate error code on failure (e.g. -EINVAL if the hwspinlock |
| 56 | 54 | is already free). |
| 57 | − Can be called from an atomic context (this function will not sleep) but | |
| 58 | − not from within interrupt context. | |
| 55 | + Should be called from a process context (might sleep). | |
| 59 | 56 | |
| 60 | 57 | int hwspin_lock_timeout(struct hwspinlock *hwlock, unsigned int timeout); |
| 61 | 58 | - lock a previously-assigned hwspinlock with a timeout limit (specified in |
| @@ -230,45 +227,62 @@ int hwspinlock_example2(void) · 168 unmodified lines | ||
| 230 | 227 | |
| 231 | 228 | 4. API for implementors |
| 232 | 229 | |
| 233 | − int hwspin_lock_register(struct hwspinlock *hwlock); | |
| 230 | + int hwspin_lock_register(struct hwspinlock_device *bank, struct device *dev, | |
| 231 | + const struct hwspinlock_ops *ops, int base_id, int num_locks); | |
| 234 | 232 | - to be called from the underlying platform-specific implementation, in |
| 235 | − order to register a new hwspinlock instance. Can be called from an atomic | |
| 236 | − context (this function will not sleep) but not from within interrupt | |
| 237 | − context. Returns 0 on success, or appropriate error code on failure. | |
| 233 | + order to register a new hwspinlock device (which is usually a bank of | |
| 234 | + numerous locks). Should be called from a process context (this function | |
| 235 | + might sleep). | |
| 236 | + Returns 0 on success, or appropriate error code on failure. | |
| 238 | 237 | |
| 239 | − struct hwspinlock *hwspin_lock_unregister(unsigned int id); | |
| 238 | + int hwspin_lock_unregister(struct hwspinlock_device *bank); | |
| 240 | 239 | - to be called from the underlying vendor-specific implementation, in order |
| 241 | − to unregister an existing (and unused) hwspinlock instance. | |
| 242 | − Can be called from an atomic context (will not sleep) but not from | |
| 243 | − within interrupt context. | |
| 240 | + to unregister an hwspinlock device (which is usually a bank of numerous | |
| 241 | + locks). | |
| 242 | + Should be called from a process context (this function might sleep). | |
| 244 | 243 | Returns the address of hwspinlock on success, or NULL on error (e.g. |
| 245 | 244 | if the hwspinlock is sill in use). |
| 246 | 245 | |
| 247 | −5. struct hwspinlock | |
| 246 | +5. Important structs | |
| 248 | 247 | |
| 249 | −This struct represents an hwspinlock instance. It is registered by the | |
| 250 | −underlying hwspinlock implementation using the hwspin_lock_register() API. | |
| 248 | +struct hwspinlock_device is a device which usually contains a bank | |
| 249 | +of hardware locks. It is registered by the underlying hwspinlock | |
| 250 | +implementation using the hwspin_lock_register() API. | |
| 251 | 251 | |
| 252 | 252 | /** |
| 253 | − * struct hwspinlock - vendor-specific hwspinlock implementation | |
| 254 | − * | |
| 255 | − * @dev: underlying device, will be used with runtime PM api | |
| 256 | − * @ops: vendor-specific hwspinlock handlers | |
| 257 | − * @id: a global, unique, system-wide, index of the lock. | |
| 258 | − * @lock: initialized and used by hwspinlock core | |
| 259 | − * @owner: underlying implementation module, used to maintain module ref count | |
| 253 | + * struct hwspinlock_device - a device which usually spans numerous hwspinlocks | |
| 254 | + * @dev: underlying device, will be used to invoke runtime PM api | |
| 255 | + * @ops: platform-specific hwspinlock handlers | |
| 256 | + * @base_id: id index of the first lock in this device | |
| 257 | + * @num_locks: number of locks in this device | |
| 258 | + * @lock: dynamically allocated array of 'struct hwspinlock' | |
| 260 | 259 | */ |
| 261 | −struct hwspinlock { | |
| 260 | +struct hwspinlock_device { | |
| 262 | 261 | struct device *dev; |
| 263 | 262 | const struct hwspinlock_ops *ops; |
| 264 | − int id; | |
| 263 | + int base_id; | |
| 264 | + int num_locks; | |
| 265 | + struct hwspinlock lock[0]; | |
| 266 | +}; | |
| 267 | + | |
| 268 | +struct hwspinlock_device contains an array of hwspinlock structs, each | |
| 269 | +of which represents a single hardware lock: | |
| 270 | + | |
| 271 | +/** | |
| 272 | + * struct hwspinlock - this struct represents a single hwspinlock instance | |
| 273 | + * @bank: the hwspinlock_device structure which owns this lock | |
| 274 | + * @lock: initialized and used by hwspinlock core | |
| 275 | + * @priv: private data, owned by the underlying platform-specific hwspinlock drv | |
| 276 | + */ | |
| 277 | +struct hwspinlock { | |
| 278 | + struct hwspinlock_device *bank; | |
| 265 | 279 | spinlock_t lock; |
| 266 | − struct module *owner; | |
| 280 | + void *priv; | |
| 267 | 281 | }; |
| 268 | 282 | |
| 269 | −The underlying implementation is responsible to assign the dev, ops, id and | |
| 270 | −owner members. The lock member, OTOH, is initialized and used by the hwspinlock | |
| 271 | −core. | |
| 283 | +When registering a bank of locks, the hwspinlock driver only needs to | |
| 284 | +set the priv members of the locks. The rest of the members are set and | |
| 285 | +initialized by the hwspinlock core itself. | |
| 272 | 286 | |
| 273 | 287 | 6. Implementation callbacks |
| 274 | 288 | |
| @@ -88,6 +88,10 @@ byte. But this time, the data is a complete word (16 bits). · 87 unmodified lines | ||
| 88 | 88 | |
| 89 | 89 | S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P |
| 90 | 90 | |
| 91 | +Note the convenience function i2c_smbus_read_word_swapped is | |
| 92 | +available for reads where the two data bytes are the other way | |
| 93 | +around (not SMBus compliant, but very popular.) | |
| 94 | + | |
| 91 | 95 | |
| 92 | 96 | SMBus Write Byte: i2c_smbus_write_byte_data() |
| 93 | 97 | ============================================== |
| @@ -108,6 +112,10 @@ specified through the Comm byte. · 14 unmodified lines | ||
| 108 | 112 | |
| 109 | 113 | S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P |
| 110 | 114 | |
| 115 | +Note the convenience function i2c_smbus_write_word_swapped is | |
| 116 | +available for writes where the two data bytes are the other way | |
| 117 | +around (not SMBus compliant, but very popular.) | |
| 118 | + | |
| 111 | 119 | |
| 112 | 120 | SMBus Process Call: i2c_smbus_process_call() |
| 113 | 121 | ============================================= |
| @@ -16,15 +16,28 @@ Contents · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | 1. Introduction |
| 18 | 18 | 2. Extra knobs |
| 19 | − 3. Hardware version 1 | |
| 20 | − 3.1 Registers | |
| 21 | − 3.2 Native relative mode 4 byte packet format | |
| 22 | − 3.3 Native absolute mode 4 byte packet format | |
| 23 | − 4. Hardware version 2 | |
| 19 | + 3. Differentiating hardware versions | |
| 20 | + 4. Hardware version 1 | |
| 24 | 21 | 4.1 Registers |
| 25 | − 4.2 Native absolute mode 6 byte packet format | |
| 26 | − 4.2.1 One finger touch | |
| 27 | − 4.2.2 Two finger touch | |
| 22 | + 4.2 Native relative mode 4 byte packet format | |
| 23 | + 4.3 Native absolute mode 4 byte packet format | |
| 24 | + 5. Hardware version 2 | |
| 25 | + 5.1 Registers | |
| 26 | + 5.2 Native absolute mode 6 byte packet format | |
| 27 | + 5.2.1 Parity checking and packet re-synchronization | |
| 28 | + 5.2.2 One/Three finger touch | |
| 29 | + 5.2.3 Two finger touch | |
| 30 | + 6. Hardware version 3 | |
| 31 | + 6.1 Registers | |
| 32 | + 6.2 Native absolute mode 6 byte packet format | |
| 33 | + 6.2.1 One/Three finger touch | |
| 34 | + 6.2.2 Two finger touch | |
| 35 | + 7. Hardware version 4 | |
| 36 | + 7.1 Registers | |
| 37 | + 7.2 Native absolute mode 6 byte packet format | |
| 38 | + 7.2.1 Status packet | |
| 39 | + 7.2.2 Head packet | |
| 40 | + 7.2.3 Motion packet | |
| 28 | 41 | |
| 29 | 42 | |
| 30 | 43 | |
| @@ -375,7 +388,7 @@ For all the other ones, there are just a few constant bits: · 344 unmodified lines | ||
| 375 | 388 | |
| 376 | 389 | In case an error is detected, all the packets are shifted by one (and packet[0] is discarded). |
| 377 | 390 | |
| 378 | −5.2.1 One/Three finger touch | |
| 391 | +5.2.2 One/Three finger touch | |
| 379 | 392 | ~~~~~~~~~~~~~~~~ |
| 380 | 393 | |
| 381 | 394 | byte 0: |
| @@ -384,19 +397,19 @@ byte 0: · 2 unmodified lines | ||
| 384 | 397 | n1 n0 w3 w2 . . R L |
| 385 | 398 | |
| 386 | 399 | L, R = 1 when Left, Right mouse button pressed |
| 387 | − n1..n0 = numbers of fingers on touchpad | |
| 400 | + n1..n0 = number of fingers on touchpad | |
| 388 | 401 | |
| 389 | 402 | byte 1: |
| 390 | 403 | |
| 391 | 404 | bit 7 6 5 4 3 2 1 0 |
| 392 | − p7 p6 p5 p4 . x10 x9 x8 | |
| 405 | + p7 p6 p5 p4 x11 x10 x9 x8 | |
| 393 | 406 | |
| 394 | 407 | byte 2: |
| 395 | 408 | |
| 396 | 409 | bit 7 6 5 4 3 2 1 0 |
| 397 | 410 | x7 x6 x5 x4 x3 x2 x1 x0 |
| 398 | 411 | |
| 399 | − x10..x0 = absolute x value (horizontal) | |
| 412 | + x11..x0 = absolute x value (horizontal) | |
| 400 | 413 | |
| 401 | 414 | byte 3: |
| 402 | 415 | |
| @@ -420,7 +433,7 @@ byte 3: · 17 unmodified lines | ||
| 420 | 433 | byte 4: |
| 421 | 434 | |
| 422 | 435 | bit 7 6 5 4 3 2 1 0 |
| 423 | − p3 p1 p2 p0 . . y9 y8 | |
| 436 | + p3 p1 p2 p0 y11 y10 y9 y8 | |
| 424 | 437 | |
| 425 | 438 | p7..p0 = pressure (not EF113) |
| 426 | 439 | |
| @@ -429,10 +442,10 @@ byte 5: · 2 unmodified lines | ||
| 429 | 442 | bit 7 6 5 4 3 2 1 0 |
| 430 | 443 | y7 y6 y5 y4 y3 y2 y1 y0 |
| 431 | 444 | |
| 432 | − y9..y0 = absolute y value (vertical) | |
| 445 | + y11..y0 = absolute y value (vertical) | |
| 433 | 446 | |
| 434 | 447 | |
| 435 | −4.2.2 Two finger touch | |
| 448 | +5.2.3 Two finger touch | |
| 436 | 449 | ~~~~~~~~~~~~~~~~ |
| 437 | 450 | |
| 438 | 451 | Note that the two pairs of coordinates are not exactly the coordinates of the |
| @@ -446,7 +459,7 @@ byte 0: · 7 unmodified lines | ||
| 446 | 459 | n1 n0 ay8 ax8 . . R L |
| 447 | 460 | |
| 448 | 461 | L, R = 1 when Left, Right mouse button pressed |
| 449 | − n1..n0 = numbers of fingers on touchpad | |
| 462 | + n1..n0 = number of fingers on touchpad | |
| 450 | 463 | |
| 451 | 464 | byte 1: |
| 452 | 465 | |
| @@ -480,3 +493,253 @@ byte 5: · 27 unmodified lines | ||
| 480 | 493 | by7 by8 by5 by4 by3 by2 by1 by0 |
| 481 | 494 | |
| 482 | 495 | by8..by0 = upper-right finger absolute y value |
| 496 | + | |
| 497 | +///////////////////////////////////////////////////////////////////////////// | |
| 498 | + | |
| 499 | +6. Hardware version 3 | |
| 500 | + ================== | |
| 501 | + | |
| 502 | +6.1 Registers | |
| 503 | + ~~~~~~~~~ | |
| 504 | +* reg_10 | |
| 505 | + | |
| 506 | + bit 7 6 5 4 3 2 1 0 | |
| 507 | + 0 0 0 0 0 0 0 A | |
| 508 | + | |
| 509 | + A: 1 = enable absolute tracking | |
| 510 | + | |
| 511 | +6.2 Native absolute mode 6 byte packet format | |
| 512 | + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 513 | +1 and 3 finger touch shares the same 6-byte packet format, except that | |
| 514 | +3 finger touch only reports the position of the center of all three fingers. | |
| 515 | + | |
| 516 | +Firmware would send 12 bytes of data for 2 finger touch. | |
| 517 | + | |
| 518 | +Note on debounce: | |
| 519 | +In case the box has unstable power supply or other electricity issues, or | |
| 520 | +when number of finger changes, F/W would send "debounce packet" to inform | |
| 521 | +driver that the hardware is in debounce status. | |
| 522 | +The debouce packet has the following signature: | |
| 523 | + byte 0: 0xc4 | |
| 524 | + byte 1: 0xff | |
| 525 | + byte 2: 0xff | |
| 526 | + byte 3: 0x02 | |
| 527 | + byte 4: 0xff | |
| 528 | + byte 5: 0xff | |
| 529 | +When we encounter this kind of packet, we just ignore it. | |
| 530 | + | |
| 531 | +6.2.1 One/Three finger touch | |
| 532 | + ~~~~~~~~~~~~~~~~~~~~~~ | |
| 533 | + | |
| 534 | +byte 0: | |
| 535 | + | |
| 536 | + bit 7 6 5 4 3 2 1 0 | |
| 537 | + n1 n0 w3 w2 0 1 R L | |
| 538 | + | |
| 539 | + L, R = 1 when Left, Right mouse button pressed | |
| 540 | + n1..n0 = number of fingers on touchpad | |
| 541 | + | |
| 542 | +byte 1: | |
| 543 | + | |
| 544 | + bit 7 6 5 4 3 2 1 0 | |
| 545 | + p7 p6 p5 p4 x11 x10 x9 x8 | |
| 546 | + | |
| 547 | +byte 2: | |
| 548 | + | |
| 549 | + bit 7 6 5 4 3 2 1 0 | |
| 550 | + x7 x6 x5 x4 x3 x2 x1 x0 | |
| 551 | + | |
| 552 | + x11..x0 = absolute x value (horizontal) | |
| 553 | + | |
| 554 | +byte 3: | |
| 555 | + | |
| 556 | + bit 7 6 5 4 3 2 1 0 | |
| 557 | + 0 0 w1 w0 0 0 1 0 | |
| 558 | + | |
| 559 | + w3..w0 = width of the finger touch | |
| 560 | + | |
| 561 | +byte 4: | |
| 562 | + | |
| 563 | + bit 7 6 5 4 3 2 1 0 | |
| 564 | + p3 p1 p2 p0 y11 y10 y9 y8 | |
| 565 | + | |
| 566 | + p7..p0 = pressure | |
| 567 | + | |
| 568 | +byte 5: | |
| 569 | + | |
| 570 | + bit 7 6 5 4 3 2 1 0 | |
| 571 | + y7 y6 y5 y4 y3 y2 y1 y0 | |
| 572 | + | |
| 573 | + y11..y0 = absolute y value (vertical) | |
| 574 | + | |
| 575 | +6.2.2 Two finger touch | |
| 576 | + ~~~~~~~~~~~~~~~~ | |
| 577 | + | |
| 578 | +The packet format is exactly the same for two finger touch, except the hardware | |
| 579 | +sends two 6 byte packets. The first packet contains data for the first finger, | |
| 580 | +the second packet has data for the second finger. So for two finger touch a | |
| 581 | +total of 12 bytes are sent. | |
| 582 | + | |
| 583 | +///////////////////////////////////////////////////////////////////////////// | |
| 584 | + | |
| 585 | +7. Hardware version 4 | |
| 586 | + ================== | |
| 587 | + | |
| 588 | +7.1 Registers | |
| 589 | + ~~~~~~~~~ | |
| 590 | +* reg_07 | |
| 591 | + | |
| 592 | + bit 7 6 5 4 3 2 1 0 | |
| 593 | + 0 0 0 0 0 0 0 A | |
| 594 | + | |
| 595 | + A: 1 = enable absolute tracking | |
| 596 | + | |
| 597 | +7.2 Native absolute mode 6 byte packet format | |
| 598 | + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 599 | +v4 hardware is a true multitouch touchpad, capable of tracking up to 5 fingers. | |
| 600 | +Unfortunately, due to PS/2's limited bandwidth, its packet format is rather | |
| 601 | +complex. | |
| 602 | + | |
| 603 | +Whenever the numbers or identities of the fingers changes, the hardware sends a | |
| 604 | +status packet to indicate how many and which fingers is on touchpad, followed by | |
| 605 | +head packets or motion packets. A head packet contains data of finger id, finger | |
| 606 | +position (absolute x, y values), width, and pressure. A motion packet contains | |
| 607 | +two fingers' position delta. | |
| 608 | + | |
| 609 | +For example, when status packet tells there are 2 fingers on touchpad, then we | |
| 610 | +can expect two following head packets. If the finger status doesn't change, | |
| 611 | +the following packets would be motion packets, only sending delta of finger | |
| 612 | +position, until we receive a status packet. | |
| 613 | + | |
| 614 | +One exception is one finger touch. when a status packet tells us there is only | |
| 615 | +one finger, the hardware would just send head packets afterwards. | |
| 616 | + | |
| 617 | +7.2.1 Status packet | |
| 618 | + ~~~~~~~~~~~~~ | |
| 619 | + | |
| 620 | +byte 0: | |
| 621 | + | |
| 622 | + bit 7 6 5 4 3 2 1 0 | |
| 623 | + . . . . 0 1 R L | |
| 624 | + | |
| 625 | + L, R = 1 when Left, Right mouse button pressed | |
| 626 | + | |
| 627 | +byte 1: | |
| 628 | + | |
| 629 | + bit 7 6 5 4 3 2 1 0 | |
| 630 | + . . . ft4 ft3 ft2 ft1 ft0 | |
| 631 | + | |
| 632 | + ft4 ft3 ft2 ft1 ft0 ftn = 1 when finger n is on touchpad | |
| 633 | + | |
| 634 | +byte 2: not used | |
| 635 | + | |
| 636 | +byte 3: | |
| 637 | + | |
| 638 | + bit 7 6 5 4 3 2 1 0 | |
| 639 | + . . . 1 0 0 0 0 | |
| 640 | + | |
| 641 | + constant bits | |
| 642 | + | |
| 643 | +byte 4: | |
| 644 | + | |
| 645 | + bit 7 6 5 4 3 2 1 0 | |
| 646 | + p . . . . . . . | |
| 647 | + | |
| 648 | + p = 1 for palm | |
| 649 | + | |
| 650 | +byte 5: not used | |
| 651 | + | |
| 652 | +7.2.2 Head packet | |
| 653 | + ~~~~~~~~~~~ | |
| 654 | + | |
| 655 | +byte 0: | |
| 656 | + | |
| 657 | + bit 7 6 5 4 3 2 1 0 | |
| 658 | + w3 w2 w1 w0 0 1 R L | |
| 659 | + | |
| 660 | + L, R = 1 when Left, Right mouse button pressed | |
| 661 | + w3..w0 = finger width (spans how many trace lines) | |
| 662 | + | |
| 663 | +byte 1: | |
| 664 | + | |
| 665 | + bit 7 6 5 4 3 2 1 0 | |
| 666 | + p7 p6 p5 p4 x11 x10 x9 x8 | |
| 667 | + | |
| 668 | +byte 2: | |
| 669 | + | |
| 670 | + bit 7 6 5 4 3 2 1 0 | |
| 671 | + x7 x6 x5 x4 x3 x2 x1 x0 | |
| 672 | + | |
| 673 | + x11..x0 = absolute x value (horizontal) | |
| 674 | + | |
| 675 | +byte 3: | |
| 676 | + | |
| 677 | + bit 7 6 5 4 3 2 1 0 | |
| 678 | + id2 id1 id0 1 0 0 0 1 | |
| 679 | + | |
| 680 | + id2..id0 = finger id | |
| 681 | + | |
| 682 | +byte 4: | |
| 683 | + | |
| 684 | + bit 7 6 5 4 3 2 1 0 | |
| 685 | + p3 p1 p2 p0 y11 y10 y9 y8 | |
| 686 | + | |
| 687 | + p7..p0 = pressure | |
| 688 | + | |
| 689 | +byte 5: | |
| 690 | + | |
| 691 | + bit 7 6 5 4 3 2 1 0 | |
| 692 | + y7 y6 y5 y4 y3 y2 y1 y0 | |
| 693 | + | |
| 694 | + y11..y0 = absolute y value (vertical) | |
| 695 | + | |
| 696 | +7.2.3 Motion packet | |
| 697 | + ~~~~~~~~~~~~~ | |
| 698 | + | |
| 699 | +byte 0: | |
| 700 | + | |
| 701 | + bit 7 6 5 4 3 2 1 0 | |
| 702 | + id2 id1 id0 w 0 1 R L | |
| 703 | + | |
| 704 | + L, R = 1 when Left, Right mouse button pressed | |
| 705 | + id2..id0 = finger id | |
| 706 | + w = 1 when delta overflows (> 127 or < -128), in this case | |
| 707 | + firmware sends us (delta x / 5) and (delta y / 5) | |
| 708 | + | |
| 709 | +byte 1: | |
| 710 | + | |
| 711 | + bit 7 6 5 4 3 2 1 0 | |
| 712 | + x7 x6 x5 x4 x3 x2 x1 x0 | |
| 713 | + | |
| 714 | + x7..x0 = delta x (two's complement) | |
| 715 | + | |
| 716 | +byte 2: | |
| 717 | + | |
| 718 | + bit 7 6 5 4 3 2 1 0 | |
| 719 | + y7 y6 y5 y4 y3 y2 y1 y0 | |
| 720 | + | |
| 721 | + y7..y0 = delta y (two's complement) | |
| 722 | + | |
| 723 | +byte 3: | |
| 724 | + | |
| 725 | + bit 7 6 5 4 3 2 1 0 | |
| 726 | + id2 id1 id0 1 0 0 1 0 | |
| 727 | + | |
| 728 | + id2..id0 = finger id | |
| 729 | + | |
| 730 | +byte 4: | |
| 731 | + | |
| 732 | + bit 7 6 5 4 3 2 1 0 | |
| 733 | + x7 x6 x5 x4 x3 x2 x1 x0 | |
| 734 | + | |
| 735 | + x7..x0 = delta x (two's complement) | |
| 736 | + | |
| 737 | +byte 5: | |
| 738 | + | |
| 739 | + bit 7 6 5 4 3 2 1 0 | |
| 740 | + y7 y6 y5 y4 y3 y2 y1 y0 | |
| 741 | + | |
| 742 | + y7..y0 = delta y (two's complement) | |
| 743 | + | |
| 744 | + byte 0 ~ 2 for one finger | |
| 745 | + byte 3 ~ 5 for another | |
| @@ -65,6 +65,20 @@ the full state of each initiated contact has to reside in the receiving · 64 unmodified lines | ||
| 65 | 65 | end. Upon receiving an MT event, one simply updates the appropriate |
| 66 | 66 | attribute of the current slot. |
| 67 | 67 | |
| 68 | +Some devices identify and/or track more contacts than they can report to the | |
| 69 | +driver. A driver for such a device should associate one type B slot with each | |
| 70 | +contact that is reported by the hardware. Whenever the identity of the | |
| 71 | +contact associated with a slot changes, the driver should invalidate that | |
| 72 | +slot by changing its ABS_MT_TRACKING_ID. If the hardware signals that it is | |
| 73 | +tracking more contacts than it is currently reporting, the driver should use | |
| 74 | +a BTN_TOOL_*TAP event to inform userspace of the total number of contacts | |
| 75 | +being tracked by the hardware at that moment. The driver should do this by | |
| 76 | +explicitly sending the corresponding BTN_TOOL_*TAP event and setting | |
| 77 | +use_count to false when calling input_mt_report_pointer_emulation(). | |
| 78 | +The driver should only advertise as many slots as the hardware can report. | |
| 79 | +Userspace can detect that a driver can report more total contacts than slots | |
| 80 | +by noting that the largest supported BTN_TOOL_*TAP event is larger than the | |
| 81 | +total number of type B slots reported in the absinfo for the ABS_MT_SLOT axis. | |
| 68 | 82 | |
| 69 | 83 | Protocol Example A |
| 70 | 84 | ------------------ |
| @@ -307,6 +307,19 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 306 unmodified lines | ||
| 307 | 307 | behaviour to be specified. Bit 0 enables warnings, |
| 308 | 308 | bit 1 enables fixups, and bit 2 sends a segfault. |
| 309 | 309 | |
| 310 | + align_va_addr= [X86-64] | |
| 311 | + Align virtual addresses by clearing slice [14:12] when | |
| 312 | + allocating a VMA at process creation time. This option | |
| 313 | + gives you up to 3% performance improvement on AMD F15h | |
| 314 | + machines (where it is enabled by default) for a | |
| 315 | + CPU-intensive style benchmark, and it can vary highly in | |
| 316 | + a microbenchmark depending on workload and compiler. | |
| 317 | + | |
| 318 | + 1: only for 32-bit processes | |
| 319 | + 2: only for 64-bit processes | |
| 320 | + on: enable for both 32- and 64-bit processes | |
| 321 | + off: disable for both 32- and 64-bit processes | |
| 322 | + | |
| 310 | 323 | amd_iommu= [HW,X86-84] |
| 311 | 324 | Pass parameters to the AMD IOMMU driver in the system. |
| 312 | 325 | Possible values are: |
| @@ -728,10 +741,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 415 unmodified lines | ||
| 728 | 741 | See Documentation/block/cfq-iosched.txt and |
| 729 | 742 | Documentation/block/deadline-iosched.txt for details. |
| 730 | 743 | |
| 731 | − elfcorehdr= [IA-64,PPC,SH,X86] | |
| 744 | + elfcorehdr=[size[KMG]@]offset[KMG] [IA64,PPC,SH,X86,S390] | |
| 732 | 745 | Specifies physical address of start of kernel core |
| 733 | − image elf header. Generally kexec loader will | |
| 734 | − pass this option to capture kernel. | |
| 746 | + image elf header and optionally the size. Generally | |
| 747 | + kexec loader will pass this option to capture kernel. | |
| 735 | 748 | See Documentation/kdump/kdump.txt for details. |
| 736 | 749 | |
| 737 | 750 | enable_mtrr_cleanup [X86] |
| @@ -960,6 +973,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 222 unmodified lines | ||
| 960 | 973 | ignore_loglevel [KNL] |
| 961 | 974 | Ignore loglevel setting - this will print /all/ |
| 962 | 975 | kernel messages to the console. Useful for debugging. |
| 976 | + We also add it as printk module parameter, so users | |
| 977 | + could change it dynamically, usually by | |
| 978 | + /sys/module/printk/parameters/ignore_loglevel. | |
| 963 | 979 | |
| 964 | 980 | ihash_entries= [KNL] |
| 965 | 981 | Set number of hash buckets for inode cache. |
| @@ -1020,10 +1036,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 54 unmodified lines | ||
| 1020 | 1036 | has the capability. With this option, super page will |
| 1021 | 1037 | not be supported. |
| 1022 | 1038 | intremap= [X86-64, Intel-IOMMU] |
| 1023 | − Format: { on (default) | off | nosid } | |
| 1024 | 1039 | on enable Interrupt Remapping (default) |
| 1025 | 1040 | off disable Interrupt Remapping |
| 1026 | 1041 | nosid disable Source ID checking |
| 1042 | + no_x2apic_optout | |
| 1043 | + BIOS x2APIC opt-out request will be ignored | |
| 1027 | 1044 | |
| 1028 | 1045 | inttest= [IA-64] |
| 1029 | 1046 | |
| @@ -1187,6 +1204,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 157 unmodified lines | ||
| 1187 | 1204 | [KVM,Intel] Disable FlexPriority feature (TPR shadow). |
| 1188 | 1205 | Default is 1 (enabled) |
| 1189 | 1206 | |
| 1207 | + kvm-intel.nested= | |
| 1208 | + [KVM,Intel] Enable VMX nesting (nVMX). | |
| 1209 | + Default is 0 (disabled) | |
| 1210 | + | |
| 1190 | 1211 | kvm-intel.unrestricted_guest= |
| 1191 | 1212 | [KVM,Intel] Disable unrestricted guest feature |
| 1192 | 1213 | (virtualized real and unpaged mode) on capable |
| @@ -1648,6 +1669,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 455 unmodified lines | ||
| 1648 | 1669 | debugging driver suspend/resume hooks). This may |
| 1649 | 1670 | not work reliably with all consoles, but is known |
| 1650 | 1671 | to work with serial and VGA consoles. |
| 1672 | + To facilitate more flexible debugging, we also add | |
| 1673 | + console_suspend, a printk module parameter to control | |
| 1674 | + it. Users could use console_suspend (usually | |
| 1675 | + /sys/module/printk/parameters/console_suspend) to | |
| 1676 | + turn on/off it dynamically. | |
| 1651 | 1677 | |
| 1652 | 1678 | noaliencache [MM, NUMA, SLAB] Disables the allocation of alien |
| 1653 | 1679 | caches in the slab allocator. Saves per-node memory, |
| @@ -1783,6 +1809,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 129 unmodified lines | ||
| 1783 | 1809 | |
| 1784 | 1810 | noresidual [PPC] Don't use residual data on PReP machines. |
| 1785 | 1811 | |
| 1812 | + nordrand [X86] Disable the direct use of the RDRAND | |
| 1813 | + instruction even if it is supported by the | |
| 1814 | + processor. RDRAND is still available to user | |
| 1815 | + space applications. | |
| 1816 | + | |
| 1786 | 1817 | noresume [SWSUSP] Disables resume and restores original swap |
| 1787 | 1818 | space. |
| 1788 | 1819 | |
| @@ -2246,6 +2277,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 457 unmodified lines | ||
| 2246 | 2277 | in <PAGE_SIZE> units (needed only for swap files). |
| 2247 | 2278 | See Documentation/power/swsusp-and-swap-files.txt |
| 2248 | 2279 | |
| 2280 | + resumedelay= [HIBERNATION] Delay (in seconds) to pause before attempting to | |
| 2281 | + read the resume files | |
| 2282 | + | |
| 2283 | + resumewait [HIBERNATION] Wait (indefinitely) for resume device to show up. | |
| 2284 | + Useful for devices that are detected asynchronously | |
| 2285 | + (e.g. USB and MMC devices). | |
| 2286 | + | |
| 2249 | 2287 | hibernate= [HIBERNATION] |
| 2250 | 2288 | noresume Don't check if there's a hibernation image |
| 2251 | 2289 | present during boot. |
| @@ -411,9 +411,9 @@ event code Key Notes · 410 unmodified lines | ||
| 411 | 411 | |
| 412 | 412 | 0x1004 0x03 FN+F4 Sleep button (ACPI sleep button |
| 413 | 413 | semantics, i.e. sleep-to-RAM). |
| 414 | − It is always generate some kind | |
| 414 | + It always generates some kind | |
| 415 | 415 | of event, either the hot key |
| 416 | − event or a ACPI sleep button | |
| 416 | + event or an ACPI sleep button | |
| 417 | 417 | event. The firmware may |
| 418 | 418 | refuse to generate further FN+F4 |
| 419 | 419 | key presses until a S3 or S4 ACPI |
| @@ -61,8 +61,8 @@ Hardware accelerated blink of LEDs · 60 unmodified lines | ||
| 61 | 61 | Some LEDs can be programmed to blink without any CPU interaction. To |
| 62 | 62 | support this feature, a LED driver can optionally implement the |
| 63 | 63 | blink_set() function (see <linux/leds.h>). To set an LED to blinking, |
| 64 | −however, it is better to use use the API function led_blink_set(), | |
| 65 | −as it will check and implement software fallback if necessary. | |
| 64 | +however, it is better to use the API function led_blink_set(), as it | |
| 65 | +will check and implement software fallback if necessary. | |
| 66 | 66 | |
| 67 | 67 | To turn off blinking again, use the API function led_brightness_set() |
| 68 | 68 | as that will not just set the LED brightness but also stop any software |
| @@ -1,61 +1,22 @@ | ||
| 1 | −Copyright (c) 2009-2010 QLogic Corporation | |
| 1 | +Copyright (c) 2009-2011 QLogic Corporation | |
| 2 | 2 | QLogic Linux qlcnic NIC Driver |
| 3 | 3 | |
| 4 | −This program includes a device driver for Linux 2.6 that may be | |
| 5 | −distributed with QLogic hardware specific firmware binary file. | |
| 6 | 4 | You may modify and redistribute the device driver code under the |
| 7 | 5 | GNU General Public License (a copy of which is attached hereto as |
| 8 | 6 | Exhibit A) published by the Free Software Foundation (version 2). |
| 9 | 7 | |
| 10 | −You may redistribute the hardware specific firmware binary file | |
| 11 | −under the following terms: | |
| 12 | − | |
| 13 | − 1. Redistribution of source code (only if applicable), | |
| 14 | − must retain the above copyright notice, this list of | |
| 15 | − conditions and the following disclaimer. | |
| 16 | − | |
| 17 | − 2. Redistribution in binary form must reproduce the above | |
| 18 | − copyright notice, this list of conditions and the | |
| 19 | − following disclaimer in the documentation and/or other | |
| 20 | − materials provided with the distribution. | |
| 21 | − | |
| 22 | − 3. The name of QLogic Corporation may not be used to | |
| 23 | − endorse or promote products derived from this software | |
| 24 | − without specific prior written permission | |
| 25 | − | |
| 26 | −REGARDLESS OF WHAT LICENSING MECHANISM IS USED OR APPLICABLE, | |
| 27 | −THIS PROGRAM IS PROVIDED BY QLOGIC CORPORATION "AS IS'' AND ANY | |
| 28 | −EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 29 | −IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A | |
| 30 | −PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR | |
| 31 | −BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | |
| 32 | −EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED | |
| 33 | −TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
| 34 | −DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
| 35 | −ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 36 | −OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
| 37 | −OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 38 | −POSSIBILITY OF SUCH DAMAGE. | |
| 39 | − | |
| 40 | −USER ACKNOWLEDGES AND AGREES THAT USE OF THIS PROGRAM WILL NOT | |
| 41 | −CREATE OR GIVE GROUNDS FOR A LICENSE BY IMPLICATION, ESTOPPEL, OR | |
| 42 | −OTHERWISE IN ANY INTELLECTUAL PROPERTY RIGHTS (PATENT, COPYRIGHT, | |
| 43 | −TRADE SECRET, MASK WORK, OR OTHER PROPRIETARY RIGHT) EMBODIED IN | |
| 44 | −ANY OTHER QLOGIC HARDWARE OR SOFTWARE EITHER SOLELY OR IN | |
| 45 | −COMBINATION WITH THIS PROGRAM. | |
| 46 | − | |
| 47 | 8 | |
| 48 | 9 | EXHIBIT A |
| 49 | 10 | |
| 50 | − GNU GENERAL PUBLIC LICENSE | |
| 51 | − Version 2, June 1991 | |
| 11 | + GNU GENERAL PUBLIC LICENSE | |
| 12 | + Version 2, June 1991 | |
| 52 | 13 | |
| 53 | 14 | Copyright (C) 1989, 1991 Free Software Foundation, Inc. |
| 54 | 15 | 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
| 55 | 16 | Everyone is permitted to copy and distribute verbatim copies |
| 56 | 17 | of this license document, but changing it is not allowed. |
| 57 | 18 | |
| 58 | − Preamble | |
| 19 | + Preamble | |
| 59 | 20 | |
| 60 | 21 | The licenses for most software are designed to take away your |
| 61 | 22 | freedom to share and change it. By contrast, the GNU General Public |
| @@ -105,7 +66,7 @@ patent must be licensed for everyone's free use or not licensed at all. · 43 unmodified lines | ||
| 105 | 66 | The precise terms and conditions for copying, distribution and |
| 106 | 67 | modification follow. |
| 107 | 68 | |
| 108 | − GNU GENERAL PUBLIC LICENSE | |
| 69 | + GNU GENERAL PUBLIC LICENSE | |
| 109 | 70 | TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION |
| 110 | 71 | |
| 111 | 72 | 0. This License applies to any program or other work which contains |
| @@ -304,7 +265,7 @@ make exceptions for this. Our decision will be guided by the two goals · 192 unmodified lines | ||
| 304 | 265 | of preserving the free status of all derivatives of our free software and |
| 305 | 266 | of promoting the sharing and reuse of software generally. |
| 306 | 267 | |
| 307 | − NO WARRANTY | |
| 268 | + NO WARRANTY | |
| 308 | 269 | |
| 309 | 270 | 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY |
| 310 | 271 | FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN |
| @@ -1,4 +1,4 @@ | ||
| 1 | −[state: 17-04-2011] | |
| 1 | +[state: 21-08-2011] | |
| 2 | 2 | |
| 3 | 3 | BATMAN-ADV |
| 4 | 4 | ---------- |
| @@ -68,9 +68,9 @@ All mesh wide settings can be found in batman's own interface · 63 unmodified lines | ||
| 68 | 68 | folder: |
| 69 | 69 | |
| 70 | 70 | # ls /sys/class/net/bat0/mesh/ |
| 71 | −# aggregated_ogms gw_bandwidth hop_penalty | |
| 72 | −# bonding gw_mode orig_interval | |
| 73 | −# fragmentation gw_sel_class vis_mode | |
| 71 | +# aggregated_ogms fragmentation gw_sel_class vis_mode | |
| 72 | +# ap_isolation gw_bandwidth hop_penalty | |
| 73 | +# bonding gw_mode orig_interval | |
| 74 | 74 | |
| 75 | 75 | |
| 76 | 76 | There is a special folder for debugging information: |
| @@ -1045,6 +1045,11 @@ conf/interface/*: · 1044 unmodified lines | ||
| 1045 | 1045 | accept_ra - INTEGER |
| 1046 | 1046 | Accept Router Advertisements; autoconfigure using them. |
| 1047 | 1047 | |
| 1048 | + It also determines whether or not to transmit Router | |
| 1049 | + Solicitations. If and only if the functional setting is to | |
| 1050 | + accept Router Advertisements, Router Solicitations will be | |
| 1051 | + transmitted. | |
| 1052 | + | |
| 1048 | 1053 | Possible values are: |
| 1049 | 1054 | 0 Do not accept Router Advertisements. |
| 1050 | 1055 | 1 Accept Router Advertisements if forwarding is disabled. |
| @@ -1115,14 +1120,14 @@ forwarding - INTEGER · 64 unmodified lines | ||
| 1115 | 1120 | Possible values are: |
| 1116 | 1121 | 0 Forwarding disabled |
| 1117 | 1122 | 1 Forwarding enabled |
| 1118 | − 2 Forwarding enabled (Hybrid Mode) | |
| 1119 | 1123 | |
| 1120 | 1124 | FALSE (0): |
| 1121 | 1125 | |
| 1122 | 1126 | By default, Host behaviour is assumed. This means: |
| 1123 | 1127 | |
| 1124 | 1128 | 1. IsRouter flag is not set in Neighbour Advertisements. |
| 1125 | − 2. Router Solicitations are being sent when necessary. | |
| 1129 | + 2. If accept_ra is TRUE (default), transmit Router | |
| 1130 | + Solicitations. | |
| 1126 | 1131 | 3. If accept_ra is TRUE (default), accept Router |
| 1127 | 1132 | Advertisements (and do autoconfiguration). |
| 1128 | 1133 | 4. If accept_redirects is TRUE (default), accept Redirects. |
| @@ -1133,16 +1138,10 @@ forwarding - INTEGER · 4 unmodified lines | ||
| 1133 | 1138 | This means exactly the reverse from the above: |
| 1134 | 1139 | |
| 1135 | 1140 | 1. IsRouter flag is set in Neighbour Advertisements. |
| 1136 | − 2. Router Solicitations are not sent. | |
| 1141 | + 2. Router Solicitations are not sent unless accept_ra is 2. | |
| 1137 | 1142 | 3. Router Advertisements are ignored unless accept_ra is 2. |
| 1138 | 1143 | 4. Redirects are ignored. |
| 1139 | 1144 | |
| 1140 | − TRUE (2): | |
| 1141 | − | |
| 1142 | − Hybrid mode. Same behaviour as TRUE, except for: | |
| 1143 | − | |
| 1144 | − 2. Router Solicitations are being sent when necessary. | |
| 1145 | − | |
| 1146 | 1145 | Default: 0 (disabled) if global forwarding is disabled (default), |
| 1147 | 1146 | otherwise 1 (enabled). |
| 1148 | 1147 | |
| @@ -15,6 +15,23 @@ amemthresh - INTEGER · 14 unmodified lines | ||
| 15 | 15 | enabled and the variable is automatically set to 2, otherwise |
| 16 | 16 | the strategy is disabled and the variable is set to 1. |
| 17 | 17 | |
| 18 | +conntrack - BOOLEAN | |
| 19 | + 0 - disabled (default) | |
| 20 | + not 0 - enabled | |
| 21 | + | |
| 22 | + If set, maintain connection tracking entries for | |
| 23 | + connections handled by IPVS. | |
| 24 | + | |
| 25 | + This should be enabled if connections handled by IPVS are to be | |
| 26 | + also handled by stateful firewall rules. That is, iptables rules | |
| 27 | + that make use of connection tracking. It is a performance | |
| 28 | + optimisation to disable this setting otherwise. | |
| 29 | + | |
| 30 | + Connections handled by the IPVS FTP application module | |
| 31 | + will have connection tracking entries regardless of this setting. | |
| 32 | + | |
| 33 | + Only available when IPVS is compiled with CONFIG_IP_VS_NFCT enabled. | |
| 34 | + | |
| 18 | 35 | cache_bypass - BOOLEAN |
| 19 | 36 | 0 - disabled (default) |
| 20 | 37 | not 0 - enabled |
| @@ -39,7 +56,7 @@ debug_level - INTEGER · 18 unmodified lines | ||
| 39 | 56 | 11 - IPVS packet handling (ip_vs_in/ip_vs_out) |
| 40 | 57 | 12 or more - packet traversal |
| 41 | 58 | |
| 42 | − Only available when IPVS is compiled with the CONFIG_IPVS_DEBUG | |
| 59 | + Only available when IPVS is compiled with CONFIG_IP_VS_DEBUG enabled. | |
| 43 | 60 | |
| 44 | 61 | Higher debugging levels include the messages for lower debugging |
| 45 | 62 | levels, so setting debug level 2, includes level 0, 1 and 2 |
| @@ -123,13 +140,11 @@ nat_icmp_send - BOOLEAN · 77 unmodified lines | ||
| 123 | 140 | secure_tcp - INTEGER |
| 124 | 141 | 0 - disabled (default) |
| 125 | 142 | |
| 126 | − The secure_tcp defense is to use a more complicated state | |
| 127 | − transition table and some possible short timeouts of each | |
| 128 | − state. In the VS/NAT, it delays the entering the ESTABLISHED | |
| 129 | − until the real server starts to send data and ACK packet | |
| 130 | − (after 3-way handshake). | |
| 143 | + The secure_tcp defense is to use a more complicated TCP state | |
| 144 | + transition table. For VS/NAT, it also delays entering the | |
| 145 | + TCP ESTABLISHED state until the three way handshake is completed. | |
| 131 | 146 | |
| 132 | − The value definition is the same as that of drop_entry or | |
| 147 | + The value definition is the same as that of drop_entry and | |
| 133 | 148 | drop_packet. |
| 134 | 149 | |
| 135 | 150 | sync_threshold - INTEGER |
| @@ -141,3 +156,36 @@ sync_threshold - INTEGER · 5 unmodified lines | ||
| 141 | 156 | synchronized, every time the number of its incoming packets |
| 142 | 157 | modulus 50 equals the threshold. The range of the threshold is |
| 143 | 158 | from 0 to 49. |
| 159 | + | |
| 160 | +snat_reroute - BOOLEAN | |
| 161 | + 0 - disabled | |
| 162 | + not 0 - enabled (default) | |
| 163 | + | |
| 164 | + If enabled, recalculate the route of SNATed packets from | |
| 165 | + realservers so that they are routed as if they originate from the | |
| 166 | + director. Otherwise they are routed as if they are forwarded by the | |
| 167 | + director. | |
| 168 | + | |
| 169 | + If policy routing is in effect then it is possible that the route | |
| 170 | + of a packet originating from a director is routed differently to a | |
| 171 | + packet being forwarded by the director. | |
| 172 | + | |
| 173 | + If policy routing is not in effect then the recalculated route will | |
| 174 | + always be the same as the original route so it is an optimisation | |
| 175 | + to disable snat_reroute and avoid the recalculation. | |
| 176 | + | |
| 177 | +sync_version - INTEGER | |
| 178 | + default 1 | |
| 179 | + | |
| 180 | + The version of the synchronisation protocol used when sending | |
| 181 | + synchronisation messages. | |
| 182 | + | |
| 183 | + 0 selects the original synchronisation protocol (version 0). This | |
| 184 | + should be used when sending synchronisation messages to a legacy | |
| 185 | + system that only understands the original synchronisation protocol. | |
| 186 | + | |
| 187 | + 1 selects the current synchronisation protocol (version 1). This | |
| 188 | + should be used where possible. | |
| 189 | + | |
| 190 | + Kernels with this sync_version entry are able to receive messages | |
| 191 | + of both version 1 and version 2 of the synchronisation protocol. | |
| @@ -23,6 +23,10 @@ radiotap headers and used to control injection: · 22 unmodified lines | ||
| 23 | 23 | IEEE80211_RADIOTAP_F_FRAG: frame will be fragmented if longer than the |
| 24 | 24 | current fragmentation threshold. |
| 25 | 25 | |
| 26 | + * IEEE80211_RADIOTAP_TX_FLAGS | |
| 27 | + | |
| 28 | + IEEE80211_RADIOTAP_F_TX_NOACK: frame should be sent without waiting for | |
| 29 | + an ACK even if it is a unicast frame | |
| 26 | 30 | |
| 27 | 31 | The injection code can also skip all other currently defined radiotap fields |
| 28 | 32 | facilitating replay of captured radiotap headers directly. |
| @@ -73,7 +73,7 @@ dev->hard_start_xmit: · 72 unmodified lines | ||
| 73 | 73 | has to lock by itself when needed. It is recommended to use a try lock |
| 74 | 74 | for this and return NETDEV_TX_LOCKED when the spin lock fails. |
| 75 | 75 | The locking there should also properly protect against |
| 76 | − set_multicast_list. Note that the use of NETIF_F_LLTX is deprecated. | |
| 76 | + set_rx_mode. Note that the use of NETIF_F_LLTX is deprecated. | |
| 77 | 77 | Don't use it for new drivers. |
| 78 | 78 | |
| 79 | 79 | Context: Process with BHs disabled or BH (timer), |
| @@ -92,7 +92,7 @@ dev->tx_timeout: · 12 unmodified lines | ||
| 92 | 92 | Context: BHs disabled |
| 93 | 93 | Notes: netif_queue_stopped() is guaranteed true |
| 94 | 94 | |
| 95 | −dev->set_multicast_list: | |
| 95 | +dev->set_rx_mode: | |
| 96 | 96 | Synchronization: netif_tx_lock spinlock. |
| 97 | 97 | Context: BHs disabled |
| 98 | 98 | |
| @@ -76,7 +76,16 @@ core. · 75 unmodified lines | ||
| 76 | 76 | |
| 77 | 77 | 4.5) DMA descriptors |
| 78 | 78 | Driver handles both normal and enhanced descriptors. The latter has been only |
| 79 | −tested on DWC Ether MAC 10/100/1000 Universal version 3.41a. | |
| 79 | +tested on DWC Ether MAC 10/100/1000 Universal version 3.41a and later. | |
| 80 | + | |
| 81 | +STMMAC supports DMA descriptor to operate both in dual buffer (RING) | |
| 82 | +and linked-list(CHAINED) mode. In RING each descriptor points to two | |
| 83 | +data buffer pointers whereas in CHAINED mode they point to only one data | |
| 84 | +buffer pointer. RING mode is the default. | |
| 85 | + | |
| 86 | +In CHAINED mode each descriptor will have pointer to next descriptor in | |
| 87 | +the list, hence creating the explicit chaining in the descriptor itself, | |
| 88 | +whereas such explicit chaining is not possible in RING mode. | |
| 80 | 89 | |
| 81 | 90 | 4.6) Ethtool support |
| 82 | 91 | Ethtool is supported. Driver statistics and internal errors can be taken using: |
| @@ -235,7 +244,38 @@ reset procedure etc). · 152 unmodified lines | ||
| 235 | 244 | o enh_desc.c: functions for handling enhanced descriptors |
| 236 | 245 | o norm_desc.c: functions for handling normal descriptors |
| 237 | 246 | |
| 238 | −5) TODO: | |
| 247 | +5) Debug Information | |
| 248 | + | |
| 249 | +The driver exports many information i.e. internal statistics, | |
| 250 | +debug information, MAC and DMA registers etc. | |
| 251 | + | |
| 252 | +These can be read in several ways depending on the | |
| 253 | +type of the information actually needed. | |
| 254 | + | |
| 255 | +For example a user can be use the ethtool support | |
| 256 | +to get statistics: e.g. using: ethtool -S ethX | |
| 257 | +(that shows the Management counters (MMC) if supported) | |
| 258 | +or sees the MAC/DMA registers: e.g. using: ethtool -d ethX | |
| 259 | + | |
| 260 | +Compiling the Kernel with CONFIG_DEBUG_FS and enabling the | |
| 261 | +STMMAC_DEBUG_FS option the driver will export the following | |
| 262 | +debugfs entries: | |
| 263 | + | |
| 264 | +/sys/kernel/debug/stmmaceth/descriptors_status | |
| 265 | + To show the DMA TX/RX descriptor rings | |
| 266 | + | |
| 267 | +Developer can also use the "debug" module parameter to get | |
| 268 | +further debug information. | |
| 269 | + | |
| 270 | +In the end, there are other macros (that cannot be enabled | |
| 271 | +via menuconfig) to turn-on the RX/TX DMA debugging, | |
| 272 | +specific MAC core debug printk etc. Others to enable the | |
| 273 | +debug in the TX and RX processes. | |
| 274 | +All these are only useful during the developing stage | |
| 275 | +and should never enabled inside the code for general usage. | |
| 276 | +In fact, these can generate an huge amount of debug messages. | |
| 277 | + | |
| 278 | +6) TODO: | |
| 239 | 279 | o XGMAC is not supported. |
| 240 | 280 | o Review the timer optimisation code to use an embedded device that will be |
| 241 | 281 | available in new chip generations. |
| @@ -263,6 +263,8 @@ characters, each representing a particular tainted value. · 262 unmodified lines | ||
| 263 | 263 | 12: 'I' if the kernel is working around a severe bug in the platform |
| 264 | 264 | firmware (BIOS or similar). |
| 265 | 265 | |
| 266 | + 13: 'O' if an externally-built ("out-of-tree") module has been loaded. | |
| 267 | + | |
| 266 | 268 | The primary reason for the 'Tainted: ' string is to tell kernel |
| 267 | 269 | debuggers if this is a clean kernel or if anything unusual has |
| 268 | 270 | occurred. Tainting is permanent: even if an offending module is |
| @@ -0,0 +1,950 @@ | ||
| 1 | +PINCTRL (PIN CONTROL) subsystem | |
| 2 | +This document outlines the pin control subsystem in Linux | |
| 3 | + | |
| 4 | +This subsystem deals with: | |
| 5 | + | |
| 6 | +- Enumerating and naming controllable pins | |
| 7 | + | |
| 8 | +- Multiplexing of pins, pads, fingers (etc) see below for details | |
| 9 | + | |
| 10 | +The intention is to also deal with: | |
| 11 | + | |
| 12 | +- Software-controlled biasing and driving mode specific pins, such as | |
| 13 | + pull-up/down, open drain etc, load capacitance configuration when controlled | |
| 14 | + by software, etc. | |
| 15 | + | |
| 16 | + | |
| 17 | +Top-level interface | |
| 18 | +=================== | |
| 19 | + | |
| 20 | +Definition of PIN CONTROLLER: | |
| 21 | + | |
| 22 | +- A pin controller is a piece of hardware, usually a set of registers, that | |
| 23 | + can control PINs. It may be able to multiplex, bias, set load capacitance, | |
| 24 | + set drive strength etc for individual pins or groups of pins. | |
| 25 | + | |
| 26 | +Definition of PIN: | |
| 27 | + | |
| 28 | +- PINS are equal to pads, fingers, balls or whatever packaging input or | |
| 29 | + output line you want to control and these are denoted by unsigned integers | |
| 30 | + in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so | |
| 31 | + there may be several such number spaces in a system. This pin space may | |
| 32 | + be sparse - i.e. there may be gaps in the space with numbers where no | |
| 33 | + pin exists. | |
| 34 | + | |
| 35 | +When a PIN CONTROLLER is instatiated, it will register a descriptor to the | |
| 36 | +pin control framework, and this descriptor contains an array of pin descriptors | |
| 37 | +describing the pins handled by this specific pin controller. | |
| 38 | + | |
| 39 | +Here is an example of a PGA (Pin Grid Array) chip seen from underneath: | |
| 40 | + | |
| 41 | + A B C D E F G H | |
| 42 | + | |
| 43 | + 8 o o o o o o o o | |
| 44 | + | |
| 45 | + 7 o o o o o o o o | |
| 46 | + | |
| 47 | + 6 o o o o o o o o | |
| 48 | + | |
| 49 | + 5 o o o o o o o o | |
| 50 | + | |
| 51 | + 4 o o o o o o o o | |
| 52 | + | |
| 53 | + 3 o o o o o o o o | |
| 54 | + | |
| 55 | + 2 o o o o o o o o | |
| 56 | + | |
| 57 | + 1 o o o o o o o o | |
| 58 | + | |
| 59 | +To register a pin controller and name all the pins on this package we can do | |
| 60 | +this in our driver: | |
| 61 | + | |
| 62 | +#include <linux/pinctrl/pinctrl.h> | |
| 63 | + | |
| 64 | +const struct pinctrl_pin_desc __refdata foo_pins[] = { | |
| 65 | + PINCTRL_PIN(0, "A1"), | |
| 66 | + PINCTRL_PIN(1, "A2"), | |
| 67 | + PINCTRL_PIN(2, "A3"), | |
| 68 | + ... | |
| 69 | + PINCTRL_PIN(61, "H6"), | |
| 70 | + PINCTRL_PIN(62, "H7"), | |
| 71 | + PINCTRL_PIN(63, "H8"), | |
| 72 | +}; | |
| 73 | + | |
| 74 | +static struct pinctrl_desc foo_desc = { | |
| 75 | + .name = "foo", | |
| 76 | + .pins = foo_pins, | |
| 77 | + .npins = ARRAY_SIZE(foo_pins), | |
| 78 | + .maxpin = 63, | |
| 79 | + .owner = THIS_MODULE, | |
| 80 | +}; | |
| 81 | + | |
| 82 | +int __init foo_probe(void) | |
| 83 | +{ | |
| 84 | + struct pinctrl_dev *pctl; | |
| 85 | + | |
| 86 | + pctl = pinctrl_register(&foo_desc, <PARENT>, NULL); | |
| 87 | + if (IS_ERR(pctl)) | |
| 88 | + pr_err("could not register foo pin driver\n"); | |
| 89 | +} | |
| 90 | + | |
| 91 | +Pins usually have fancier names than this. You can find these in the dataheet | |
| 92 | +for your chip. Notice that the core pinctrl.h file provides a fancy macro | |
| 93 | +called PINCTRL_PIN() to create the struct entries. As you can see I enumerated | |
| 94 | +the pins from 0 in the upper left corner to 63 in the lower right corner, | |
| 95 | +this enumeration was arbitrarily chosen, in practice you need to think | |
| 96 | +through your numbering system so that it matches the layout of registers | |
| 97 | +and such things in your driver, or the code may become complicated. You must | |
| 98 | +also consider matching of offsets to the GPIO ranges that may be handled by | |
| 99 | +the pin controller. | |
| 100 | + | |
| 101 | +For a padring with 467 pads, as opposed to actual pins, I used an enumeration | |
| 102 | +like this, walking around the edge of the chip, which seems to be industry | |
| 103 | +standard too (all these pads had names, too): | |
| 104 | + | |
| 105 | + | |
| 106 | + 0 ..... 104 | |
| 107 | + 466 105 | |
| 108 | + . . | |
| 109 | + . . | |
| 110 | + 358 224 | |
| 111 | + 357 .... 225 | |
| 112 | + | |
| 113 | + | |
| 114 | +Pin groups | |
| 115 | +========== | |
| 116 | + | |
| 117 | +Many controllers need to deal with groups of pins, so the pin controller | |
| 118 | +subsystem has a mechanism for enumerating groups of pins and retrieving the | |
| 119 | +actual enumerated pins that are part of a certain group. | |
| 120 | + | |
| 121 | +For example, say that we have a group of pins dealing with an SPI interface | |
| 122 | +on { 0, 8, 16, 24 }, and a group of pins dealing with an I2C interface on pins | |
| 123 | +on { 24, 25 }. | |
| 124 | + | |
| 125 | +These two groups are presented to the pin control subsystem by implementing | |
| 126 | +some generic pinctrl_ops like this: | |
| 127 | + | |
| 128 | +#include <linux/pinctrl/pinctrl.h> | |
| 129 | + | |
| 130 | +struct foo_group { | |
| 131 | + const char *name; | |
| 132 | + const unsigned int *pins; | |
| 133 | + const unsigned num_pins; | |
| 134 | +}; | |
| 135 | + | |
| 136 | +static unsigned int spi0_pins[] = { 0, 8, 16, 24 }; | |
| 137 | +static unsigned int i2c0_pins[] = { 24, 25 }; | |
| 138 | + | |
| 139 | +static const struct foo_group foo_groups[] = { | |
| 140 | + { | |
| 141 | + .name = "spi0_grp", | |
| 142 | + .pins = spi0_pins, | |
| 143 | + .num_pins = ARRAY_SIZE(spi0_pins), | |
| 144 | + }, | |
| 145 | + { | |
| 146 | + .name = "i2c0_grp", | |
| 147 | + .pins = i2c0_pins, | |
| 148 | + .num_pins = ARRAY_SIZE(i2c0_pins), | |
| 149 | + }, | |
| 150 | +}; | |
| 151 | + | |
| 152 | + | |
| 153 | +static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector) | |
| 154 | +{ | |
| 155 | + if (selector >= ARRAY_SIZE(foo_groups)) | |
| 156 | + return -EINVAL; | |
| 157 | + return 0; | |
| 158 | +} | |
| 159 | + | |
| 160 | +static const char *foo_get_group_name(struct pinctrl_dev *pctldev, | |
| 161 | + unsigned selector) | |
| 162 | +{ | |
| 163 | + return foo_groups[selector].name; | |
| 164 | +} | |
| 165 | + | |
| 166 | +static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, | |
| 167 | + unsigned ** const pins, | |
| 168 | + unsigned * const num_pins) | |
| 169 | +{ | |
| 170 | + *pins = (unsigned *) foo_groups[selector].pins; | |
| 171 | + *num_pins = foo_groups[selector].num_pins; | |
| 172 | + return 0; | |
| 173 | +} | |
| 174 | + | |
| 175 | +static struct pinctrl_ops foo_pctrl_ops = { | |
| 176 | + .list_groups = foo_list_groups, | |
| 177 | + .get_group_name = foo_get_group_name, | |
| 178 | + .get_group_pins = foo_get_group_pins, | |
| 179 | +}; | |
| 180 | + | |
| 181 | + | |
| 182 | +static struct pinctrl_desc foo_desc = { | |
| 183 | + ... | |
| 184 | + .pctlops = &foo_pctrl_ops, | |
| 185 | +}; | |
| 186 | + | |
| 187 | +The pin control subsystem will call the .list_groups() function repeatedly | |
| 188 | +beginning on 0 until it returns non-zero to determine legal selectors, then | |
| 189 | +it will call the other functions to retrieve the name and pins of the group. | |
| 190 | +Maintaining the data structure of the groups is up to the driver, this is | |
| 191 | +just a simple example - in practice you may need more entries in your group | |
| 192 | +structure, for example specific register ranges associated with each group | |
| 193 | +and so on. | |
| 194 | + | |
| 195 | + | |
| 196 | +Interaction with the GPIO subsystem | |
| 197 | +=================================== | |
| 198 | + | |
| 199 | +The GPIO drivers may want to perform operations of various types on the same | |
| 200 | +physical pins that are also registered as pin controller pins. | |
| 201 | + | |
| 202 | +Since the pin controller subsystem have its pinspace local to the pin | |
| 203 | +controller we need a mapping so that the pin control subsystem can figure out | |
| 204 | +which pin controller handles control of a certain GPIO pin. Since a single | |
| 205 | +pin controller may be muxing several GPIO ranges (typically SoCs that have | |
| 206 | +one set of pins but internally several GPIO silicon blocks, each modeled as | |
| 207 | +a struct gpio_chip) any number of GPIO ranges can be added to a pin controller | |
| 208 | +instance like this: | |
| 209 | + | |
| 210 | +struct gpio_chip chip_a; | |
| 211 | +struct gpio_chip chip_b; | |
| 212 | + | |
| 213 | +static struct pinctrl_gpio_range gpio_range_a = { | |
| 214 | + .name = "chip a", | |
| 215 | + .id = 0, | |
| 216 | + .base = 32, | |
| 217 | + .npins = 16, | |
| 218 | + .gc = &chip_a; | |
| 219 | +}; | |
| 220 | + | |
| 221 | +static struct pinctrl_gpio_range gpio_range_a = { | |
| 222 | + .name = "chip b", | |
| 223 | + .id = 0, | |
| 224 | + .base = 48, | |
| 225 | + .npins = 8, | |
| 226 | + .gc = &chip_b; | |
| 227 | +}; | |
| 228 | + | |
| 229 | + | |
| 230 | +{ | |
| 231 | + struct pinctrl_dev *pctl; | |
| 232 | + ... | |
| 233 | + pinctrl_add_gpio_range(pctl, &gpio_range_a); | |
| 234 | + pinctrl_add_gpio_range(pctl, &gpio_range_b); | |
| 235 | +} | |
| 236 | + | |
| 237 | +So this complex system has one pin controller handling two different | |
| 238 | +GPIO chips. Chip a has 16 pins and chip b has 8 pins. They are mapped in | |
| 239 | +the global GPIO pin space at: | |
| 240 | + | |
| 241 | +chip a: [32 .. 47] | |
| 242 | +chip b: [48 .. 55] | |
| 243 | + | |
| 244 | +When GPIO-specific functions in the pin control subsystem are called, these | |
| 245 | +ranges will be used to look up the apropriate pin controller by inspecting | |
| 246 | +and matching the pin to the pin ranges across all controllers. When a | |
| 247 | +pin controller handling the matching range is found, GPIO-specific functions | |
| 248 | +will be called on that specific pin controller. | |
| 249 | + | |
| 250 | +For all functionalities dealing with pin biasing, pin muxing etc, the pin | |
| 251 | +controller subsystem will subtract the range's .base offset from the passed | |
| 252 | +in gpio pin number, and pass that on to the pin control driver, so the driver | |
| 253 | +will get an offset into its handled number range. Further it is also passed | |
| 254 | +the range ID value, so that the pin controller knows which range it should | |
| 255 | +deal with. | |
| 256 | + | |
| 257 | +For example: if a user issues pinctrl_gpio_set_foo(50), the pin control | |
| 258 | +subsystem will find that the second range on this pin controller matches, | |
| 259 | +subtract the base 48 and call the | |
| 260 | +pinctrl_driver_gpio_set_foo(pinctrl, range, 2) where the latter function has | |
| 261 | +this signature: | |
| 262 | + | |
| 263 | +int pinctrl_driver_gpio_set_foo(struct pinctrl_dev *pctldev, | |
| 264 | + struct pinctrl_gpio_range *rangeid, | |
| 265 | + unsigned offset); | |
| 266 | + | |
| 267 | +Now the driver knows that we want to do some GPIO-specific operation on the | |
| 268 | +second GPIO range handled by "chip b", at offset 2 in that specific range. | |
| 269 | + | |
| 270 | +(If the GPIO subsystem is ever refactored to use a local per-GPIO controller | |
| 271 | +pin space, this mapping will need to be augmented accordingly.) | |
| 272 | + | |
| 273 | + | |
| 274 | +PINMUX interfaces | |
| 275 | +================= | |
| 276 | + | |
| 277 | +These calls use the pinmux_* naming prefix. No other calls should use that | |
| 278 | +prefix. | |
| 279 | + | |
| 280 | + | |
| 281 | +What is pinmuxing? | |
| 282 | +================== | |
| 283 | + | |
| 284 | +PINMUX, also known as padmux, ballmux, alternate functions or mission modes | |
| 285 | +is a way for chip vendors producing some kind of electrical packages to use | |
| 286 | +a certain physical pin (ball, pad, finger, etc) for multiple mutually exclusive | |
| 287 | +functions, depending on the application. By "application" in this context | |
| 288 | +we usually mean a way of soldering or wiring the package into an electronic | |
| 289 | +system, even though the framework makes it possible to also change the function | |
| 290 | +at runtime. | |
| 291 | + | |
| 292 | +Here is an example of a PGA (Pin Grid Array) chip seen from underneath: | |
| 293 | + | |
| 294 | + A B C D E F G H | |
| 295 | + +---+ | |
| 296 | + 8 | o | o o o o o o o | |
| 297 | + | | | |
| 298 | + 7 | o | o o o o o o o | |
| 299 | + | | | |
| 300 | + 6 | o | o o o o o o o | |
| 301 | + +---+---+ | |
| 302 | + 5 | o | o | o o o o o o | |
| 303 | + +---+---+ +---+ | |
| 304 | + 4 o o o o o o | o | o | |
| 305 | + | | | |
| 306 | + 3 o o o o o o | o | o | |
| 307 | + | | | |
| 308 | + 2 o o o o o o | o | o | |
| 309 | + +-------+-------+-------+---+---+ | |
| 310 | + 1 | o o | o o | o o | o | o | | |
| 311 | + +-------+-------+-------+---+---+ | |
| 312 | + | |
| 313 | +This is not tetris. The game to think of is chess. Not all PGA/BGA packages | |
| 314 | +are chessboard-like, big ones have "holes" in some arrangement according to | |
| 315 | +different design patterns, but we're using this as a simple example. Of the | |
| 316 | +pins you see some will be taken by things like a few VCC and GND to feed power | |
| 317 | +to the chip, and quite a few will be taken by large ports like an external | |
| 318 | +memory interface. The remaining pins will often be subject to pin multiplexing. | |
| 319 | + | |
| 320 | +The example 8x8 PGA package above will have pin numbers 0 thru 63 assigned to | |
| 321 | +its physical pins. It will name the pins { A1, A2, A3 ... H6, H7, H8 } using | |
| 322 | +pinctrl_register_pins() and a suitable data set as shown earlier. | |
| 323 | + | |
| 324 | +In this 8x8 BGA package the pins { A8, A7, A6, A5 } can be used as an SPI port | |
| 325 | +(these are four pins: CLK, RXD, TXD, FRM). In that case, pin B5 can be used as | |
| 326 | +some general-purpose GPIO pin. However, in another setting, pins { A5, B5 } can | |
| 327 | +be used as an I2C port (these are just two pins: SCL, SDA). Needless to say, | |
| 328 | +we cannot use the SPI port and I2C port at the same time. However in the inside | |
| 329 | +of the package the silicon performing the SPI logic can alternatively be routed | |
| 330 | +out on pins { G4, G3, G2, G1 }. | |
| 331 | + | |
| 332 | +On the botton row at { A1, B1, C1, D1, E1, F1, G1, H1 } we have something | |
| 333 | +special - it's an external MMC bus that can be 2, 4 or 8 bits wide, and it will | |
| 334 | +consume 2, 4 or 8 pins respectively, so either { A1, B1 } are taken or | |
| 335 | +{ A1, B1, C1, D1 } or all of them. If we use all 8 bits, we cannot use the SPI | |
| 336 | +port on pins { G4, G3, G2, G1 } of course. | |
| 337 | + | |
| 338 | +This way the silicon blocks present inside the chip can be multiplexed "muxed" | |
| 339 | +out on different pin ranges. Often contemporary SoC (systems on chip) will | |
| 340 | +contain several I2C, SPI, SDIO/MMC, etc silicon blocks that can be routed to | |
| 341 | +different pins by pinmux settings. | |
| 342 | + | |
| 343 | +Since general-purpose I/O pins (GPIO) are typically always in shortage, it is | |
| 344 | +common to be able to use almost any pin as a GPIO pin if it is not currently | |
| 345 | +in use by some other I/O port. | |
| 346 | + | |
| 347 | + | |
| 348 | +Pinmux conventions | |
| 349 | +================== | |
| 350 | + | |
| 351 | +The purpose of the pinmux functionality in the pin controller subsystem is to | |
| 352 | +abstract and provide pinmux settings to the devices you choose to instantiate | |
| 353 | +in your machine configuration. It is inspired by the clk, GPIO and regulator | |
| 354 | +subsystems, so devices will request their mux setting, but it's also possible | |
| 355 | +to request a single pin for e.g. GPIO. | |
| 356 | + | |
| 357 | +Definitions: | |
| 358 | + | |
| 359 | +- FUNCTIONS can be switched in and out by a driver residing with the pin | |
| 360 | + control subsystem in the drivers/pinctrl/* directory of the kernel. The | |
| 361 | + pin control driver knows the possible functions. In the example above you can | |
| 362 | + identify three pinmux functions, one for spi, one for i2c and one for mmc. | |
| 363 | + | |
| 364 | +- FUNCTIONS are assumed to be enumerable from zero in a one-dimensional array. | |
| 365 | + In this case the array could be something like: { spi0, i2c0, mmc0 } | |
| 366 | + for the three available functions. | |
| 367 | + | |
| 368 | +- FUNCTIONS have PIN GROUPS as defined on the generic level - so a certain | |
| 369 | + function is *always* associated with a certain set of pin groups, could | |
| 370 | + be just a single one, but could also be many. In the example above the | |
| 371 | + function i2c is associated with the pins { A5, B5 }, enumerated as | |
| 372 | + { 24, 25 } in the controller pin space. | |
| 373 | + | |
| 374 | + The Function spi is associated with pin groups { A8, A7, A6, A5 } | |
| 375 | + and { G4, G3, G2, G1 }, which are enumerated as { 0, 8, 16, 24 } and | |
| 376 | + { 38, 46, 54, 62 } respectively. | |
| 377 | + | |
| 378 | + Group names must be unique per pin controller, no two groups on the same | |
| 379 | + controller may have the same name. | |
| 380 | + | |
| 381 | +- The combination of a FUNCTION and a PIN GROUP determine a certain function | |
| 382 | + for a certain set of pins. The knowledge of the functions and pin groups | |
| 383 | + and their machine-specific particulars are kept inside the pinmux driver, | |
| 384 | + from the outside only the enumerators are known, and the driver core can: | |
| 385 | + | |
| 386 | + - Request the name of a function with a certain selector (>= 0) | |
| 387 | + - A list of groups associated with a certain function | |
| 388 | + - Request that a certain group in that list to be activated for a certain | |
| 389 | + function | |
| 390 | + | |
| 391 | + As already described above, pin groups are in turn self-descriptive, so | |
| 392 | + the core will retrieve the actual pin range in a certain group from the | |
| 393 | + driver. | |
| 394 | + | |
| 395 | +- FUNCTIONS and GROUPS on a certain PIN CONTROLLER are MAPPED to a certain | |
| 396 | + device by the board file, device tree or similar machine setup configuration | |
| 397 | + mechanism, similar to how regulators are connected to devices, usually by | |
| 398 | + name. Defining a pin controller, function and group thus uniquely identify | |
| 399 | + the set of pins to be used by a certain device. (If only one possible group | |
| 400 | + of pins is available for the function, no group name need to be supplied - | |
| 401 | + the core will simply select the first and only group available.) | |
| 402 | + | |
| 403 | + In the example case we can define that this particular machine shall | |
| 404 | + use device spi0 with pinmux function fspi0 group gspi0 and i2c0 on function | |
| 405 | + fi2c0 group gi2c0, on the primary pin controller, we get mappings | |
| 406 | + like these: | |
| 407 | + | |
| 408 | + { | |
| 409 | + {"map-spi0", spi0, pinctrl0, fspi0, gspi0}, | |
| 410 | + {"map-i2c0", i2c0, pinctrl0, fi2c0, gi2c0} | |
| 411 | + } | |
| 412 | + | |
| 413 | + Every map must be assigned a symbolic name, pin controller and function. | |
| 414 | + The group is not compulsory - if it is omitted the first group presented by | |
| 415 | + the driver as applicable for the function will be selected, which is | |
| 416 | + useful for simple cases. | |
| 417 | + | |
| 418 | + The device name is present in map entries tied to specific devices. Maps | |
| 419 | + without device names are referred to as SYSTEM pinmuxes, such as can be taken | |
| 420 | + by the machine implementation on boot and not tied to any specific device. | |
| 421 | + | |
| 422 | + It is possible to map several groups to the same combination of device, | |
| 423 | + pin controller and function. This is for cases where a certain function on | |
| 424 | + a certain pin controller may use different sets of pins in different | |
| 425 | + configurations. | |
| 426 | + | |
| 427 | +- PINS for a certain FUNCTION using a certain PIN GROUP on a certain | |
| 428 | + PIN CONTROLLER are provided on a first-come first-serve basis, so if some | |
| 429 | + other device mux setting or GPIO pin request has already taken your physical | |
| 430 | + pin, you will be denied the use of it. To get (activate) a new setting, the | |
| 431 | + old one has to be put (deactivated) first. | |
| 432 | + | |
| 433 | +Sometimes the documentation and hardware registers will be oriented around | |
| 434 | +pads (or "fingers") rather than pins - these are the soldering surfaces on the | |
| 435 | +silicon inside the package, and may or may not match the actual number of | |
| 436 | +pins/balls underneath the capsule. Pick some enumeration that makes sense to | |
| 437 | +you. Define enumerators only for the pins you can control if that makes sense. | |
| 438 | + | |
| 439 | +Assumptions: | |
| 440 | + | |
| 441 | +We assume that the number possible function maps to pin groups is limited by | |
| 442 | +the hardware. I.e. we assume that there is no system where any function can be | |
| 443 | +mapped to any pin, like in a phone exchange. So the available pins groups for | |
| 444 | +a certain function will be limited to a few choices (say up to eight or so), | |
| 445 | +not hundreds or any amount of choices. This is the characteristic we have found | |
| 446 | +by inspecting available pinmux hardware, and a necessary assumption since we | |
| 447 | +expect pinmux drivers to present *all* possible function vs pin group mappings | |
| 448 | +to the subsystem. | |
| 449 | + | |
| 450 | + | |
| 451 | +Pinmux drivers | |
| 452 | +============== | |
| 453 | + | |
| 454 | +The pinmux core takes care of preventing conflicts on pins and calling | |
| 455 | +the pin controller driver to execute different settings. | |
| 456 | + | |
| 457 | +It is the responsibility of the pinmux driver to impose further restrictions | |
| 458 | +(say for example infer electronic limitations due to load etc) to determine | |
| 459 | +whether or not the requested function can actually be allowed, and in case it | |
| 460 | +is possible to perform the requested mux setting, poke the hardware so that | |
| 461 | +this happens. | |
| 462 | + | |
| 463 | +Pinmux drivers are required to supply a few callback functions, some are | |
| 464 | +optional. Usually the enable() and disable() functions are implemented, | |
| 465 | +writing values into some certain registers to activate a certain mux setting | |
| 466 | +for a certain pin. | |
| 467 | + | |
| 468 | +A simple driver for the above example will work by setting bits 0, 1, 2, 3 or 4 | |
| 469 | +into some register named MUX to select a certain function with a certain | |
| 470 | +group of pins would work something like this: | |
| 471 | + | |
| 472 | +#include <linux/pinctrl/pinctrl.h> | |
| 473 | +#include <linux/pinctrl/pinmux.h> | |
| 474 | + | |
| 475 | +struct foo_group { | |
| 476 | + const char *name; | |
| 477 | + const unsigned int *pins; | |
| 478 | + const unsigned num_pins; | |
| 479 | +}; | |
| 480 | + | |
| 481 | +static const unsigned spi0_0_pins[] = { 0, 8, 16, 24 }; | |
| 482 | +static const unsigned spi0_1_pins[] = { 38, 46, 54, 62 }; | |
| 483 | +static const unsigned i2c0_pins[] = { 24, 25 }; | |
| 484 | +static const unsigned mmc0_1_pins[] = { 56, 57 }; | |
| 485 | +static const unsigned mmc0_2_pins[] = { 58, 59 }; | |
| 486 | +static const unsigned mmc0_3_pins[] = { 60, 61, 62, 63 }; | |
| 487 | + | |
| 488 | +static const struct foo_group foo_groups[] = { | |
| 489 | + { | |
| 490 | + .name = "spi0_0_grp", | |
| 491 | + .pins = spi0_0_pins, | |
| 492 | + .num_pins = ARRAY_SIZE(spi0_0_pins), | |
| 493 | + }, | |
| 494 | + { | |
| 495 | + .name = "spi0_1_grp", | |
| 496 | + .pins = spi0_1_pins, | |
| 497 | + .num_pins = ARRAY_SIZE(spi0_1_pins), | |
| 498 | + }, | |
| 499 | + { | |
| 500 | + .name = "i2c0_grp", | |
| 501 | + .pins = i2c0_pins, | |
| 502 | + .num_pins = ARRAY_SIZE(i2c0_pins), | |
| 503 | + }, | |
| 504 | + { | |
| 505 | + .name = "mmc0_1_grp", | |
| 506 | + .pins = mmc0_1_pins, | |
| 507 | + .num_pins = ARRAY_SIZE(mmc0_1_pins), | |
| 508 | + }, | |
| 509 | + { | |
| 510 | + .name = "mmc0_2_grp", | |
| 511 | + .pins = mmc0_2_pins, | |
| 512 | + .num_pins = ARRAY_SIZE(mmc0_2_pins), | |
| 513 | + }, | |
| 514 | + { | |
| 515 | + .name = "mmc0_3_grp", | |
| 516 | + .pins = mmc0_3_pins, | |
| 517 | + .num_pins = ARRAY_SIZE(mmc0_3_pins), | |
| 518 | + }, | |
| 519 | +}; | |
| 520 | + | |
| 521 | + | |
| 522 | +static int foo_list_groups(struct pinctrl_dev *pctldev, unsigned selector) | |
| 523 | +{ | |
| 524 | + if (selector >= ARRAY_SIZE(foo_groups)) | |
| 525 | + return -EINVAL; | |
| 526 | + return 0; | |
| 527 | +} | |
| 528 | + | |
| 529 | +static const char *foo_get_group_name(struct pinctrl_dev *pctldev, | |
| 530 | + unsigned selector) | |
| 531 | +{ | |
| 532 | + return foo_groups[selector].name; | |
| 533 | +} | |
| 534 | + | |
| 535 | +static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, | |
| 536 | + unsigned ** const pins, | |
| 537 | + unsigned * const num_pins) | |
| 538 | +{ | |
| 539 | + *pins = (unsigned *) foo_groups[selector].pins; | |
| 540 | + *num_pins = foo_groups[selector].num_pins; | |
| 541 | + return 0; | |
| 542 | +} | |
| 543 | + | |
| 544 | +static struct pinctrl_ops foo_pctrl_ops = { | |
| 545 | + .list_groups = foo_list_groups, | |
| 546 | + .get_group_name = foo_get_group_name, | |
| 547 | + .get_group_pins = foo_get_group_pins, | |
| 548 | +}; | |
| 549 | + | |
| 550 | +struct foo_pmx_func { | |
| 551 | + const char *name; | |
| 552 | + const char * const *groups; | |
| 553 | + const unsigned num_groups; | |
| 554 | +}; | |
| 555 | + | |
| 556 | +static const char * const spi0_groups[] = { "spi0_1_grp" }; | |
| 557 | +static const char * const i2c0_groups[] = { "i2c0_grp" }; | |
| 558 | +static const char * const mmc0_groups[] = { "mmc0_1_grp", "mmc0_2_grp", | |
| 559 | + "mmc0_3_grp" }; | |
| 560 | + | |
| 561 | +static const struct foo_pmx_func foo_functions[] = { | |
| 562 | + { | |
| 563 | + .name = "spi0", | |
| 564 | + .groups = spi0_groups, | |
| 565 | + .num_groups = ARRAY_SIZE(spi0_groups), | |
| 566 | + }, | |
| 567 | + { | |
| 568 | + .name = "i2c0", | |
| 569 | + .groups = i2c0_groups, | |
| 570 | + .num_groups = ARRAY_SIZE(i2c0_groups), | |
| 571 | + }, | |
| 572 | + { | |
| 573 | + .name = "mmc0", | |
| 574 | + .groups = mmc0_groups, | |
| 575 | + .num_groups = ARRAY_SIZE(mmc0_groups), | |
| 576 | + }, | |
| 577 | +}; | |
| 578 | + | |
| 579 | +int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector) | |
| 580 | +{ | |
| 581 | + if (selector >= ARRAY_SIZE(foo_functions)) | |
| 582 | + return -EINVAL; | |
| 583 | + return 0; | |
| 584 | +} | |
| 585 | + | |
| 586 | +const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector) | |
| 587 | +{ | |
| 588 | + return myfuncs[selector].name; | |
| 589 | +} | |
| 590 | + | |
| 591 | +static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector, | |
| 592 | + const char * const **groups, | |
| 593 | + unsigned * const num_groups) | |
| 594 | +{ | |
| 595 | + *groups = foo_functions[selector].groups; | |
| 596 | + *num_groups = foo_functions[selector].num_groups; | |
| 597 | + return 0; | |
| 598 | +} | |
| 599 | + | |
| 600 | +int foo_enable(struct pinctrl_dev *pctldev, unsigned selector, | |
| 601 | + unsigned group) | |
| 602 | +{ | |
| 603 | + u8 regbit = (1 << group); | |
| 604 | + | |
| 605 | + writeb((readb(MUX)|regbit), MUX) | |
| 606 | + return 0; | |
| 607 | +} | |
| 608 | + | |
| 609 | +int foo_disable(struct pinctrl_dev *pctldev, unsigned selector, | |
| 610 | + unsigned group) | |
| 611 | +{ | |
| 612 | + u8 regbit = (1 << group); | |
| 613 | + | |
| 614 | + writeb((readb(MUX) & ~(regbit)), MUX) | |
| 615 | + return 0; | |
| 616 | +} | |
| 617 | + | |
| 618 | +struct pinmux_ops foo_pmxops = { | |
| 619 | + .list_functions = foo_list_funcs, | |
| 620 | + .get_function_name = foo_get_fname, | |
| 621 | + .get_function_groups = foo_get_groups, | |
| 622 | + .enable = foo_enable, | |
| 623 | + .disable = foo_disable, | |
| 624 | +}; | |
| 625 | + | |
| 626 | +/* Pinmux operations are handled by some pin controller */ | |
| 627 | +static struct pinctrl_desc foo_desc = { | |
| 628 | + ... | |
| 629 | + .pctlops = &foo_pctrl_ops, | |
| 630 | + .pmxops = &foo_pmxops, | |
| 631 | +}; | |
| 632 | + | |
| 633 | +In the example activating muxing 0 and 1 at the same time setting bits | |
| 634 | +0 and 1, uses one pin in common so they would collide. | |
| 635 | + | |
| 636 | +The beauty of the pinmux subsystem is that since it keeps track of all | |
| 637 | +pins and who is using them, it will already have denied an impossible | |
| 638 | +request like that, so the driver does not need to worry about such | |
| 639 | +things - when it gets a selector passed in, the pinmux subsystem makes | |
| 640 | +sure no other device or GPIO assignment is already using the selected | |
| 641 | +pins. Thus bits 0 and 1 in the control register will never be set at the | |
| 642 | +same time. | |
| 643 | + | |
| 644 | +All the above functions are mandatory to implement for a pinmux driver. | |
| 645 | + | |
| 646 | + | |
| 647 | +Pinmux interaction with the GPIO subsystem | |
| 648 | +========================================== | |
| 649 | + | |
| 650 | +The function list could become long, especially if you can convert every | |
| 651 | +individual pin into a GPIO pin independent of any other pins, and then try | |
| 652 | +the approach to define every pin as a function. | |
| 653 | + | |
| 654 | +In this case, the function array would become 64 entries for each GPIO | |
| 655 | +setting and then the device functions. | |
| 656 | + | |
| 657 | +For this reason there is an additional function a pinmux driver can implement | |
| 658 | +to enable only GPIO on an individual pin: .gpio_request_enable(). The same | |
| 659 | +.free() function as for other functions is assumed to be usable also for | |
| 660 | +GPIO pins. | |
| 661 | + | |
| 662 | +This function will pass in the affected GPIO range identified by the pin | |
| 663 | +controller core, so you know which GPIO pins are being affected by the request | |
| 664 | +operation. | |
| 665 | + | |
| 666 | +Alternatively it is fully allowed to use named functions for each GPIO | |
| 667 | +pin, the pinmux_request_gpio() will attempt to obtain the function "gpioN" | |
| 668 | +where "N" is the global GPIO pin number if no special GPIO-handler is | |
| 669 | +registered. | |
| 670 | + | |
| 671 | + | |
| 672 | +Pinmux board/machine configuration | |
| 673 | +================================== | |
| 674 | + | |
| 675 | +Boards and machines define how a certain complete running system is put | |
| 676 | +together, including how GPIOs and devices are muxed, how regulators are | |
| 677 | +constrained and how the clock tree looks. Of course pinmux settings are also | |
| 678 | +part of this. | |
| 679 | + | |
| 680 | +A pinmux config for a machine looks pretty much like a simple regulator | |
| 681 | +configuration, so for the example array above we want to enable i2c and | |
| 682 | +spi on the second function mapping: | |
| 683 | + | |
| 684 | +#include <linux/pinctrl/machine.h> | |
| 685 | + | |
| 686 | +static struct pinmux_map pmx_mapping[] = { | |
| 687 | + { | |
| 688 | + .ctrl_dev_name = "pinctrl.0", | |
| 689 | + .function = "spi0", | |
| 690 | + .dev_name = "foo-spi.0", | |
| 691 | + }, | |
| 692 | + { | |
| 693 | + .ctrl_dev_name = "pinctrl.0", | |
| 694 | + .function = "i2c0", | |
| 695 | + .dev_name = "foo-i2c.0", | |
| 696 | + }, | |
| 697 | + { | |
| 698 | + .ctrl_dev_name = "pinctrl.0", | |
| 699 | + .function = "mmc0", | |
| 700 | + .dev_name = "foo-mmc.0", | |
| 701 | + }, | |
| 702 | +}; | |
| 703 | + | |
| 704 | +The dev_name here matches to the unique device name that can be used to look | |
| 705 | +up the device struct (just like with clockdev or regulators). The function name | |
| 706 | +must match a function provided by the pinmux driver handling this pin range. | |
| 707 | + | |
| 708 | +As you can see we may have several pin controllers on the system and thus | |
| 709 | +we need to specify which one of them that contain the functions we wish | |
| 710 | +to map. The map can also use struct device * directly, so there is no | |
| 711 | +inherent need to use strings to specify .dev_name or .ctrl_dev_name, these | |
| 712 | +are for the situation where you do not have a handle to the struct device *, | |
| 713 | +for example if they are not yet instantiated or cumbersome to obtain. | |
| 714 | + | |
| 715 | +You register this pinmux mapping to the pinmux subsystem by simply: | |
| 716 | + | |
| 717 | + ret = pinmux_register_mappings(&pmx_mapping, ARRAY_SIZE(pmx_mapping)); | |
| 718 | + | |
| 719 | +Since the above construct is pretty common there is a helper macro to make | |
| 720 | +it even more compact which assumes you want to use pinctrl.0 and position | |
| 721 | +0 for mapping, for example: | |
| 722 | + | |
| 723 | +static struct pinmux_map pmx_mapping[] = { | |
| 724 | + PINMUX_MAP_PRIMARY("I2CMAP", "i2c0", "foo-i2c.0"), | |
| 725 | +}; | |
| 726 | + | |
| 727 | + | |
| 728 | +Complex mappings | |
| 729 | +================ | |
| 730 | + | |
| 731 | +As it is possible to map a function to different groups of pins an optional | |
| 732 | +.group can be specified like this: | |
| 733 | + | |
| 734 | +... | |
| 735 | +{ | |
| 736 | + .name = "spi0-pos-A", | |
| 737 | + .ctrl_dev_name = "pinctrl.0", | |
| 738 | + .function = "spi0", | |
| 739 | + .group = "spi0_0_grp", | |
| 740 | + .dev_name = "foo-spi.0", | |
| 741 | +}, | |
| 742 | +{ | |
| 743 | + .name = "spi0-pos-B", | |
| 744 | + .ctrl_dev_name = "pinctrl.0", | |
| 745 | + .function = "spi0", | |
| 746 | + .group = "spi0_1_grp", | |
| 747 | + .dev_name = "foo-spi.0", | |
| 748 | +}, | |
| 749 | +... | |
| 750 | + | |
| 751 | +This example mapping is used to switch between two positions for spi0 at | |
| 752 | +runtime, as described further below under the heading "Runtime pinmuxing". | |
| 753 | + | |
| 754 | +Further it is possible to match several groups of pins to the same function | |
| 755 | +for a single device, say for example in the mmc0 example above, where you can | |
| 756 | +additively expand the mmc0 bus from 2 to 4 to 8 pins. If we want to use all | |
| 757 | +three groups for a total of 2+2+4 = 8 pins (for an 8-bit MMC bus as is the | |
| 758 | +case), we define a mapping like this: | |
| 759 | + | |
| 760 | +... | |
| 761 | +{ | |
| 762 | + .name "2bit" | |
| 763 | + .ctrl_dev_name = "pinctrl.0", | |
| 764 | + .function = "mmc0", | |
| 765 | + .group = "mmc0_0_grp", | |
| 766 | + .dev_name = "foo-mmc.0", | |
| 767 | +}, | |
| 768 | +{ | |
| 769 | + .name "4bit" | |
| 770 | + .ctrl_dev_name = "pinctrl.0", | |
| 771 | + .function = "mmc0", | |
| 772 | + .group = "mmc0_0_grp", | |
| 773 | + .dev_name = "foo-mmc.0", | |
| 774 | +}, | |
| 775 | +{ | |
| 776 | + .name "4bit" | |
| 777 | + .ctrl_dev_name = "pinctrl.0", | |
| 778 | + .function = "mmc0", | |
| 779 | + .group = "mmc0_1_grp", | |
| 780 | + .dev_name = "foo-mmc.0", | |
| 781 | +}, | |
| 782 | +{ | |
| 783 | + .name "8bit" | |
| 784 | + .ctrl_dev_name = "pinctrl.0", | |
| 785 | + .function = "mmc0", | |
| 786 | + .group = "mmc0_0_grp", | |
| 787 | + .dev_name = "foo-mmc.0", | |
| 788 | +}, | |
| 789 | +{ | |
| 790 | + .name "8bit" | |
| 791 | + .ctrl_dev_name = "pinctrl.0", | |
| 792 | + .function = "mmc0", | |
| 793 | + .group = "mmc0_1_grp", | |
| 794 | + .dev_name = "foo-mmc.0", | |
| 795 | +}, | |
| 796 | +{ | |
| 797 | + .name "8bit" | |
| 798 | + .ctrl_dev_name = "pinctrl.0", | |
| 799 | + .function = "mmc0", | |
| 800 | + .group = "mmc0_2_grp", | |
| 801 | + .dev_name = "foo-mmc.0", | |
| 802 | +}, | |
| 803 | +... | |
| 804 | + | |
| 805 | +The result of grabbing this mapping from the device with something like | |
| 806 | +this (see next paragraph): | |
| 807 | + | |
| 808 | + pmx = pinmux_get(&device, "8bit"); | |
| 809 | + | |
| 810 | +Will be that you activate all the three bottom records in the mapping at | |
| 811 | +once. Since they share the same name, pin controller device, funcion and | |
| 812 | +device, and since we allow multiple groups to match to a single device, they | |
| 813 | +all get selected, and they all get enabled and disable simultaneously by the | |
| 814 | +pinmux core. | |
| 815 | + | |
| 816 | + | |
| 817 | +Pinmux requests from drivers | |
| 818 | +============================ | |
| 819 | + | |
| 820 | +Generally it is discouraged to let individual drivers get and enable pinmuxes. | |
| 821 | +So if possible, handle the pinmuxes in platform code or some other place where | |
| 822 | +you have access to all the affected struct device * pointers. In some cases | |
| 823 | +where a driver needs to switch between different mux mappings at runtime | |
| 824 | +this is not possible. | |
| 825 | + | |
| 826 | +A driver may request a certain mux to be activated, usually just the default | |
| 827 | +mux like this: | |
| 828 | + | |
| 829 | +#include <linux/pinctrl/pinmux.h> | |
| 830 | + | |
| 831 | +struct foo_state { | |
| 832 | + struct pinmux *pmx; | |
| 833 | + ... | |
| 834 | +}; | |
| 835 | + | |
| 836 | +foo_probe() | |
| 837 | +{ | |
| 838 | + /* Allocate a state holder named "state" etc */ | |
| 839 | + struct pinmux pmx; | |
| 840 | + | |
| 841 | + pmx = pinmux_get(&device, NULL); | |
| 842 | + if IS_ERR(pmx) | |
| 843 | + return PTR_ERR(pmx); | |
| 844 | + pinmux_enable(pmx); | |
| 845 | + | |
| 846 | + state->pmx = pmx; | |
| 847 | +} | |
| 848 | + | |
| 849 | +foo_remove() | |
| 850 | +{ | |
| 851 | + pinmux_disable(state->pmx); | |
| 852 | + pinmux_put(state->pmx); | |
| 853 | +} | |
| 854 | + | |
| 855 | +If you want to grab a specific mux mapping and not just the first one found for | |
| 856 | +this device you can specify a specific mapping name, for example in the above | |
| 857 | +example the second i2c0 setting: pinmux_get(&device, "spi0-pos-B"); | |
| 858 | + | |
| 859 | +This get/enable/disable/put sequence can just as well be handled by bus drivers | |
| 860 | +if you don't want each and every driver to handle it and you know the | |
| 861 | +arrangement on your bus. | |
| 862 | + | |
| 863 | +The semantics of the get/enable respective disable/put is as follows: | |
| 864 | + | |
| 865 | +- pinmux_get() is called in process context to reserve the pins affected with | |
| 866 | + a certain mapping and set up the pinmux core and the driver. It will allocate | |
| 867 | + a struct from the kernel memory to hold the pinmux state. | |
| 868 | + | |
| 869 | +- pinmux_enable()/pinmux_disable() is quick and can be called from fastpath | |
| 870 | + (irq context) when you quickly want to set up/tear down the hardware muxing | |
| 871 | + when running a device driver. Usually it will just poke some values into a | |
| 872 | + register. | |
| 873 | + | |
| 874 | +- pinmux_disable() is called in process context to tear down the pin requests | |
| 875 | + and release the state holder struct for the mux setting. | |
| 876 | + | |
| 877 | +Usually the pinmux core handled the get/put pair and call out to the device | |
| 878 | +drivers bookkeeping operations, like checking available functions and the | |
| 879 | +associated pins, whereas the enable/disable pass on to the pin controller | |
| 880 | +driver which takes care of activating and/or deactivating the mux setting by | |
| 881 | +quickly poking some registers. | |
| 882 | + | |
| 883 | +The pins are allocated for your device when you issue the pinmux_get() call, | |
| 884 | +after this you should be able to see this in the debugfs listing of all pins. | |
| 885 | + | |
| 886 | + | |
| 887 | +System pinmux hogging | |
| 888 | +===================== | |
| 889 | + | |
| 890 | +A system pinmux map entry, i.e. a pinmux setting that does not have a device | |
| 891 | +associated with it, can be hogged by the core when the pin controller is | |
| 892 | +registered. This means that the core will attempt to call pinmux_get() and | |
| 893 | +pinmux_enable() on it immediately after the pin control device has been | |
| 894 | +registered. | |
| 895 | + | |
| 896 | +This is enabled by simply setting the .hog_on_boot field in the map to true, | |
| 897 | +like this: | |
| 898 | + | |
| 899 | +{ | |
| 900 | + .name "POWERMAP" | |
| 901 | + .ctrl_dev_name = "pinctrl.0", | |
| 902 | + .function = "power_func", | |
| 903 | + .hog_on_boot = true, | |
| 904 | +}, | |
| 905 | + | |
| 906 | +Since it may be common to request the core to hog a few always-applicable | |
| 907 | +mux settings on the primary pin controller, there is a convenience macro for | |
| 908 | +this: | |
| 909 | + | |
| 910 | +PINMUX_MAP_PRIMARY_SYS_HOG("POWERMAP", "power_func") | |
| 911 | + | |
| 912 | +This gives the exact same result as the above construction. | |
| 913 | + | |
| 914 | + | |
| 915 | +Runtime pinmuxing | |
| 916 | +================= | |
| 917 | + | |
| 918 | +It is possible to mux a certain function in and out at runtime, say to move | |
| 919 | +an SPI port from one set of pins to another set of pins. Say for example for | |
| 920 | +spi0 in the example above, we expose two different groups of pins for the same | |
| 921 | +function, but with different named in the mapping as described under | |
| 922 | +"Advanced mapping" above. So we have two mappings named "spi0-pos-A" and | |
| 923 | +"spi0-pos-B". | |
| 924 | + | |
| 925 | +This snippet first muxes the function in the pins defined by group A, enables | |
| 926 | +it, disables and releases it, and muxes it in on the pins defined by group B: | |
| 927 | + | |
| 928 | +foo_switch() | |
| 929 | +{ | |
| 930 | + struct pinmux pmx; | |
| 931 | + | |
| 932 | + /* Enable on position A */ | |
| 933 | + pmx = pinmux_get(&device, "spi0-pos-A"); | |
| 934 | + if IS_ERR(pmx) | |
| 935 | + return PTR_ERR(pmx); | |
| 936 | + pinmux_enable(pmx); | |
| 937 | + | |
| 938 | + /* This releases the pins again */ | |
| 939 | + pinmux_disable(pmx); | |
| 940 | + pinmux_put(pmx); | |
| 941 | + | |
| 942 | + /* Enable on position B */ | |
| 943 | + pmx = pinmux_get(&device, "spi0-pos-B"); | |
| 944 | + if IS_ERR(pmx) | |
| 945 | + return PTR_ERR(pmx); | |
| 946 | + pinmux_enable(pmx); | |
| 947 | + ... | |
| 948 | +} | |
| 949 | + | |
| 950 | +The above has to be done from process context. | |
| @@ -26,6 +26,8 @@ s2ram.txt · 25 unmodified lines | ||
| 26 | 26 | - How to get suspend to ram working (and debug it when it isn't) |
| 27 | 27 | states.txt |
| 28 | 28 | - System power management states |
| 29 | +suspend-and-cpuhotplug.txt | |
| 30 | + - Explains the interaction between Suspend-to-RAM (S3) and CPU hotplug | |
| 29 | 31 | swsusp-and-swap-files.txt |
| 30 | 32 | - Using swap files with software suspend (to disk) |
| 31 | 33 | swsusp-dmcrypt.txt |
| @@ -201,3 +201,27 @@ case, you may be able to search for failing drivers by following the procedure · 200 unmodified lines | ||
| 201 | 201 | analogous to the one described in section 1. If you find some failing drivers, |
| 202 | 202 | you will have to unload them every time before an STR transition (ie. before |
| 203 | 203 | you run s2ram), and please report the problems with them. |
| 204 | + | |
| 205 | +There is a debugfs entry which shows the suspend to RAM statistics. Here is an | |
| 206 | +example of its output. | |
| 207 | + # mount -t debugfs none /sys/kernel/debug | |
| 208 | + # cat /sys/kernel/debug/suspend_stats | |
| 209 | + success: 20 | |
| 210 | + fail: 5 | |
| 211 | + failed_freeze: 0 | |
| 212 | + failed_prepare: 0 | |
| 213 | + failed_suspend: 5 | |
| 214 | + failed_suspend_noirq: 0 | |
| 215 | + failed_resume: 0 | |
| 216 | + failed_resume_noirq: 0 | |
| 217 | + failures: | |
| 218 | + last_failed_dev: alarm | |
| 219 | + adc | |
| 220 | + last_failed_errno: -16 | |
| 221 | + -16 | |
| 222 | + last_failed_step: suspend | |
| 223 | + suspend | |
| 224 | +Field success means the success number of suspend to RAM, and field fail means | |
| 225 | +the failure number. Others are the failure number of different steps of suspend | |
| 226 | +to RAM. suspend_stats just lists the last 2 failed devices, error number and | |
| 227 | +failed step of suspend. | |
| @@ -152,7 +152,9 @@ try to use its wakeup mechanism. device_set_wakeup_enable() affects this flag; · 151 unmodified lines | ||
| 152 | 152 | for the most part drivers should not change its value. The initial value of |
| 153 | 153 | should_wakeup is supposed to be false for the majority of devices; the major |
| 154 | 154 | exceptions are power buttons, keyboards, and Ethernet adapters whose WoL |
| 155 | −(wake-on-LAN) feature has been set up with ethtool. | |
| 155 | +(wake-on-LAN) feature has been set up with ethtool. It should also default | |
| 156 | +to true for devices that don't generate wakeup requests on their own but merely | |
| 157 | +forward wakeup requests from one bus to another (like PCI bridges). | |
| 156 | 158 | |
| 157 | 159 | Whether or not a device is capable of issuing wakeup events is a hardware |
| 158 | 160 | matter, and the kernel is responsible for keeping track of it. By contrast, |
| @@ -279,10 +281,6 @@ When the system goes into the standby or memory sleep state, the phases are: · 120 unmodified lines | ||
| 279 | 281 | time.) Unlike the other suspend-related phases, during the prepare |
| 280 | 282 | phase the device tree is traversed top-down. |
| 281 | 283 | |
| 282 | − In addition to that, if device drivers need to allocate additional | |
| 283 | − memory to be able to hadle device suspend correctly, that should be | |
| 284 | − done in the prepare phase. | |
| 285 | − | |
| 286 | 284 | After the prepare callback method returns, no new children may be |
| 287 | 285 | registered below the device. The method may also prepare the device or |
| 288 | 286 | driver in some way for the upcoming system power transition (for |
| @@ -22,12 +22,12 @@ try_to_freeze_tasks() that sets TIF_FREEZE for all of the freezable tasks and · 21 unmodified lines | ||
| 22 | 22 | either wakes them up, if they are kernel threads, or sends fake signals to them, |
| 23 | 23 | if they are user space processes. A task that has TIF_FREEZE set, should react |
| 24 | 24 | to it by calling the function called refrigerator() (defined in |
| 25 | −kernel/power/process.c), which sets the task's PF_FROZEN flag, changes its state | |
| 25 | +kernel/freezer.c), which sets the task's PF_FROZEN flag, changes its state | |
| 26 | 26 | to TASK_UNINTERRUPTIBLE and makes it loop until PF_FROZEN is cleared for it. |
| 27 | 27 | Then, we say that the task is 'frozen' and therefore the set of functions |
| 28 | 28 | handling this mechanism is referred to as 'the freezer' (these functions are |
| 29 | −defined in kernel/power/process.c and include/linux/freezer.h). User space | |
| 30 | −processes are generally frozen before kernel threads. | |
| 29 | +defined in kernel/power/process.c, kernel/freezer.c & include/linux/freezer.h). | |
| 30 | +User space processes are generally frozen before kernel threads. | |
| 31 | 31 | |
| 32 | 32 | It is not recommended to call refrigerator() directly. Instead, it is |
| 33 | 33 | recommended to use the try_to_freeze() function (defined in |
| @@ -95,7 +95,7 @@ after the memory for the image has been freed, we don't want tasks to allocate · 61 unmodified lines | ||
| 95 | 95 | additional memory and we prevent them from doing that by freezing them earlier. |
| 96 | 96 | [Of course, this also means that device drivers should not allocate substantial |
| 97 | 97 | amounts of memory from their .suspend() callbacks before hibernation, but this |
| 98 | −is e separate issue.] | |
| 98 | +is a separate issue.] | |
| 99 | 99 | |
| 100 | 100 | 3. The third reason is to prevent user space processes and some kernel threads |
| 101 | 101 | from interfering with the suspending and resuming of devices. A user space |
| @@ -4,14 +4,19 @@ This interface provides a kernel and user mode interface for registering · 3 unmodified lines | ||
| 4 | 4 | performance expectations by drivers, subsystems and user space applications on |
| 5 | 5 | one of the parameters. |
| 6 | 6 | |
| 7 | −Currently we have {cpu_dma_latency, network_latency, network_throughput} as the | |
| 8 | −initial set of pm_qos parameters. | |
| 7 | +Two different PM QoS frameworks are available: | |
| 8 | +1. PM QoS classes for cpu_dma_latency, network_latency, network_throughput. | |
| 9 | +2. the per-device PM QoS framework provides the API to manage the per-device latency | |
| 10 | +constraints. | |
| 9 | 11 | |
| 10 | 12 | Each parameters have defined units: |
| 11 | 13 | * latency: usec |
| 12 | 14 | * timeout: usec |
| 13 | 15 | * throughput: kbs (kilo bit / sec) |
| 14 | 16 | |
| 17 | + | |
| 18 | +1. PM QoS framework | |
| 19 | + | |
| 15 | 20 | The infrastructure exposes multiple misc device nodes one per implemented |
| 16 | 21 | parameter. The set of parameters implement is defined by pm_qos_power_init() |
| 17 | 22 | and pm_qos_params.h. This is done because having the available parameters |
| @@ -23,14 +28,18 @@ an aggregated target value. The aggregated target value is updated with · 5 unmodified lines | ||
| 23 | 28 | changes to the request list or elements of the list. Typically the |
| 24 | 29 | aggregated target value is simply the max or min of the request values held |
| 25 | 30 | in the parameter list elements. |
| 31 | +Note: the aggregated target value is implemented as an atomic variable so that | |
| 32 | +reading the aggregated value does not require any locking mechanism. | |
| 33 | + | |
| 26 | 34 | |
| 27 | 35 | From kernel mode the use of this interface is simple: |
| 28 | 36 | |
| 29 | −handle = pm_qos_add_request(param_class, target_value): | |
| 30 | −Will insert an element into the list for that identified PM_QOS class with the | |
| 37 | +void pm_qos_add_request(handle, param_class, target_value): | |
| 38 | +Will insert an element into the list for that identified PM QoS class with the | |
| 31 | 39 | target value. Upon change to this list the new target is recomputed and any |
| 32 | 40 | registered notifiers are called only if the target value is now different. |
| 33 | −Clients of pm_qos need to save the returned handle. | |
| 41 | +Clients of pm_qos need to save the returned handle for future use in other | |
| 42 | +pm_qos API functions. | |
| 34 | 43 | |
| 35 | 44 | void pm_qos_update_request(handle, new_target_value): |
| 36 | 45 | Will update the list element pointed to by the handle with the new target value |
| @@ -42,6 +51,20 @@ Will remove the element. After removal it will update the aggregate target and · 5 unmodified lines | ||
| 42 | 51 | call the notification tree if the target was changed as a result of removing |
| 43 | 52 | the request. |
| 44 | 53 | |
| 54 | +int pm_qos_request(param_class): | |
| 55 | +Returns the aggregated value for a given PM QoS class. | |
| 56 | + | |
| 57 | +int pm_qos_request_active(handle): | |
| 58 | +Returns if the request is still active, i.e. it has not been removed from a | |
| 59 | +PM QoS class constraints list. | |
| 60 | + | |
| 61 | +int pm_qos_add_notifier(param_class, notifier): | |
| 62 | +Adds a notification callback function to the PM QoS class. The callback is | |
| 63 | +called when the aggregated value for the PM QoS class is changed. | |
| 64 | + | |
| 65 | +int pm_qos_remove_notifier(int param_class, notifier): | |
| 66 | +Removes the notification callback function for the PM QoS class. | |
| 67 | + | |
| 45 | 68 | |
| 46 | 69 | From user mode: |
| 47 | 70 | Only processes can register a pm_qos request. To provide for automatic |
| @@ -63,4 +86,63 @@ To remove the user mode request for a target value simply close the device · 15 unmodified lines | ||
| 63 | 86 | node. |
| 64 | 87 | |
| 65 | 88 | |
| 89 | +2. PM QoS per-device latency framework | |
| 90 | + | |
| 91 | +For each device a list of performance requests is maintained along with | |
| 92 | +an aggregated target value. The aggregated target value is updated with | |
| 93 | +changes to the request list or elements of the list. Typically the | |
| 94 | +aggregated target value is simply the max or min of the request values held | |
| 95 | +in the parameter list elements. | |
| 96 | +Note: the aggregated target value is implemented as an atomic variable so that | |
| 97 | +reading the aggregated value does not require any locking mechanism. | |
| 98 | + | |
| 99 | + | |
| 100 | +From kernel mode the use of this interface is the following: | |
| 101 | + | |
| 102 | +int dev_pm_qos_add_request(device, handle, value): | |
| 103 | +Will insert an element into the list for that identified device with the | |
| 104 | +target value. Upon change to this list the new target is recomputed and any | |
| 105 | +registered notifiers are called only if the target value is now different. | |
| 106 | +Clients of dev_pm_qos need to save the handle for future use in other | |
| 107 | +dev_pm_qos API functions. | |
| 108 | + | |
| 109 | +int dev_pm_qos_update_request(handle, new_value): | |
| 110 | +Will update the list element pointed to by the handle with the new target value | |
| 111 | +and recompute the new aggregated target, calling the notification trees if the | |
| 112 | +target is changed. | |
| 113 | + | |
| 114 | +int dev_pm_qos_remove_request(handle): | |
| 115 | +Will remove the element. After removal it will update the aggregate target and | |
| 116 | +call the notification trees if the target was changed as a result of removing | |
| 117 | +the request. | |
| 118 | + | |
| 119 | +s32 dev_pm_qos_read_value(device): | |
| 120 | +Returns the aggregated value for a given device's constraints list. | |
| 121 | + | |
| 122 | + | |
| 123 | +Notification mechanisms: | |
| 124 | +The per-device PM QoS framework has 2 different and distinct notification trees: | |
| 125 | +a per-device notification tree and a global notification tree. | |
| 126 | + | |
| 127 | +int dev_pm_qos_add_notifier(device, notifier): | |
| 128 | +Adds a notification callback function for the device. | |
| 129 | +The callback is called when the aggregated value of the device constraints list | |
| 130 | +is changed. | |
| 131 | + | |
| 132 | +int dev_pm_qos_remove_notifier(device, notifier): | |
| 133 | +Removes the notification callback function for the device. | |
| 134 | + | |
| 135 | +int dev_pm_qos_add_global_notifier(notifier): | |
| 136 | +Adds a notification callback function in the global notification tree of the | |
| 137 | +framework. | |
| 138 | +The callback is called when the aggregated value for any device is changed. | |
| 139 | + | |
| 140 | +int dev_pm_qos_remove_global_notifier(notifier): | |
| 141 | +Removes the notification callback function from the global notification tree | |
| 142 | +of the framework. | |
| 143 | + | |
| 144 | + | |
| 145 | +From user mode: | |
| 146 | +No API for user space access to the per-device latency constraints is provided | |
| 147 | +yet - still under discussion. | |
| 66 | 148 | |
| @@ -16,7 +16,7 @@ initialisation code by creating a struct regulator_consumer_supply for · 15 unmodified lines | ||
| 16 | 16 | each regulator. |
| 17 | 17 | |
| 18 | 18 | struct regulator_consumer_supply { |
| 19 | − struct device *dev; /* consumer */ | |
| 19 | + const char *dev_name; /* consumer dev_name() */ | |
| 20 | 20 | const char *supply; /* consumer supply - e.g. "vcc" */ |
| 21 | 21 | }; |
| 22 | 22 | |
| @@ -24,13 +24,13 @@ e.g. for the machine above · 1 unmodified line | ||
| 24 | 24 | |
| 25 | 25 | static struct regulator_consumer_supply regulator1_consumers[] = { |
| 26 | 26 | { |
| 27 | − .dev = &platform_consumerB_device.dev, | |
| 28 | − .supply = "Vcc", | |
| 27 | + .dev_name = "dev_name(consumer B)", | |
| 28 | + .supply = "Vcc", | |
| 29 | 29 | },}; |
| 30 | 30 | |
| 31 | 31 | static struct regulator_consumer_supply regulator2_consumers[] = { |
| 32 | 32 | { |
| 33 | − .dev = &platform_consumerA_device.dev, | |
| 33 | + .dev = "dev_name(consumer A"), | |
| 34 | 34 | .supply = "Vcc", |
| 35 | 35 | },}; |
| 36 | 36 | |
| @@ -43,6 +43,7 @@ to their supply regulator :- · 6 unmodified lines | ||
| 43 | 43 | |
| 44 | 44 | static struct regulator_init_data regulator1_data = { |
| 45 | 45 | .constraints = { |
| 46 | + .name = "Regulator-1", | |
| 46 | 47 | .min_uV = 3300000, |
| 47 | 48 | .max_uV = 3300000, |
| 48 | 49 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| @@ -51,13 +52,19 @@ static struct regulator_init_data regulator1_data = { · 2 unmodified lines | ||
| 51 | 52 | .consumer_supplies = regulator1_consumers, |
| 52 | 53 | }; |
| 53 | 54 | |
| 55 | +The name field should be set to something that is usefully descriptive | |
| 56 | +for the board for configuration of supplies for other regulators and | |
| 57 | +for use in logging and other diagnostic output. Normally the name | |
| 58 | +used for the supply rail in the schematic is a good choice. If no | |
| 59 | +name is provided then the subsystem will choose one. | |
| 60 | + | |
| 54 | 61 | Regulator-1 supplies power to Regulator-2. This relationship must be registered |
| 55 | 62 | with the core so that Regulator-1 is also enabled when Consumer A enables its |
| 56 | 63 | supply (Regulator-2). The supply regulator is set by the supply_regulator |
| 57 | −field below:- | |
| 64 | +field below and co:- | |
| 58 | 65 | |
| 59 | 66 | static struct regulator_init_data regulator2_data = { |
| 60 | − .supply_regulator = "regulator_name", | |
| 67 | + .supply_regulator = "Regulator-1", | |
| 61 | 68 | .constraints = { |
| 62 | 69 | .min_uV = 1800000, |
| 63 | 70 | .max_uV = 2000000, |
| @@ -43,13 +43,18 @@ struct dev_pm_ops { · 42 unmodified lines | ||
| 43 | 43 | ... |
| 44 | 44 | }; |
| 45 | 45 | |
| 46 | −The ->runtime_suspend(), ->runtime_resume() and ->runtime_idle() callbacks are | |
| 47 | −executed by the PM core for either the device type, or the class (if the device | |
| 48 | −type's struct dev_pm_ops object does not exist), or the bus type (if the | |
| 49 | −device type's and class' struct dev_pm_ops objects do not exist) of the given | |
| 50 | −device (this allows device types to override callbacks provided by bus types or | |
| 51 | −classes if necessary). The bus type, device type and class callbacks are | |
| 52 | −referred to as subsystem-level callbacks in what follows. | |
| 46 | +The ->runtime_suspend(), ->runtime_resume() and ->runtime_idle() callbacks | |
| 47 | +are executed by the PM core for either the power domain, or the device type | |
| 48 | +(if the device power domain's struct dev_pm_ops does not exist), or the class | |
| 49 | +(if the device power domain's and type's struct dev_pm_ops object does not | |
| 50 | +exist), or the bus type (if the device power domain's, type's and class' | |
| 51 | +struct dev_pm_ops objects do not exist) of the given device, so the priority | |
| 52 | +order of callbacks from high to low is that power domain callbacks, device | |
| 53 | +type callbacks, class callbacks and bus type callbacks, and the high priority | |
| 54 | +one will take precedence over low priority one. The bus type, device type and | |
| 55 | +class callbacks are referred to as subsystem-level callbacks in what follows, | |
| 56 | +and generally speaking, the power domain callbacks are used for representing | |
| 57 | +power domains within a SoC. | |
| 53 | 58 | |
| 54 | 59 | By default, the callbacks are always invoked in process context with interrupts |
| 55 | 60 | enabled. However, subsystems can use the pm_runtime_irq_safe() helper function |
| @@ -477,12 +482,14 @@ pm_runtime_autosuspend_expiration() · 421 unmodified lines | ||
| 477 | 482 | If pm_runtime_irq_safe() has been called for a device then the following helper |
| 478 | 483 | functions may also be used in interrupt context: |
| 479 | 484 | |
| 485 | +pm_runtime_idle() | |
| 480 | 486 | pm_runtime_suspend() |
| 481 | 487 | pm_runtime_autosuspend() |
| 482 | 488 | pm_runtime_resume() |
| 483 | 489 | pm_runtime_get_sync() |
| 484 | 490 | pm_runtime_put_sync() |
| 485 | 491 | pm_runtime_put_sync_suspend() |
| 492 | +pm_runtime_put_sync_autosuspend() | |
| 486 | 493 | |
| 487 | 494 | 5. Runtime PM Initialization, Device Probing and Removal |
| 488 | 495 | |
| @@ -782,6 +789,16 @@ will behave normally, not taking the autosuspend delay into account. · 293 unmodified lines | ||
| 782 | 789 | Similarly, if the power.use_autosuspend field isn't set then the autosuspend |
| 783 | 790 | helper functions will behave just like the non-autosuspend counterparts. |
| 784 | 791 | |
| 792 | +Under some circumstances a driver or subsystem may want to prevent a device | |
| 793 | +from autosuspending immediately, even though the usage counter is zero and the | |
| 794 | +autosuspend delay time has expired. If the ->runtime_suspend() callback | |
| 795 | +returns -EAGAIN or -EBUSY, and if the next autosuspend delay expiration time is | |
| 796 | +in the future (as it normally would be if the callback invoked | |
| 797 | +pm_runtime_mark_last_busy()), the PM core will automatically reschedule the | |
| 798 | +autosuspend. The ->runtime_suspend() callback can't do this rescheduling | |
| 799 | +itself because no suspend requests of any kind are accepted while the device is | |
| 800 | +suspending (i.e., while the callback is running). | |
| 801 | + | |
| 785 | 802 | The implementation is well suited for asynchronous use in interrupt contexts. |
| 786 | 803 | However such use inevitably involves races, because the PM core can't |
| 787 | 804 | synchronize ->runtime_suspend() callbacks with the arrival of I/O requests. |
| @@ -0,0 +1,275 @@ | ||
| 1 | +Interaction of Suspend code (S3) with the CPU hotplug infrastructure | |
| 2 | + | |
| 3 | + (C) 2011 Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> | |
| 4 | + | |
| 5 | + | |
| 6 | +I. How does the regular CPU hotplug code differ from how the Suspend-to-RAM | |
| 7 | + infrastructure uses it internally? And where do they share common code? | |
| 8 | + | |
| 9 | +Well, a picture is worth a thousand words... So ASCII art follows :-) | |
| 10 | + | |
| 11 | +[This depicts the current design in the kernel, and focusses only on the | |
| 12 | +interactions involving the freezer and CPU hotplug and also tries to explain | |
| 13 | +the locking involved. It outlines the notifications involved as well. | |
| 14 | +But please note that here, only the call paths are illustrated, with the aim | |
| 15 | +of describing where they take different paths and where they share code. | |
| 16 | +What happens when regular CPU hotplug and Suspend-to-RAM race with each other | |
| 17 | +is not depicted here.] | |
| 18 | + | |
| 19 | +On a high level, the suspend-resume cycle goes like this: | |
| 20 | + | |
| 21 | +|Freeze| -> |Disable nonboot| -> |Do suspend| -> |Enable nonboot| -> |Thaw | | |
| 22 | +|tasks | | cpus | | | | cpus | |tasks| | |
| 23 | + | |
| 24 | + | |
| 25 | +More details follow: | |
| 26 | + | |
| 27 | + Suspend call path | |
| 28 | + ----------------- | |
| 29 | + | |
| 30 | + Write 'mem' to | |
| 31 | + /sys/power/state | |
| 32 | + syfs file | |
| 33 | + | | |
| 34 | + v | |
| 35 | + Acquire pm_mutex lock | |
| 36 | + | | |
| 37 | + v | |
| 38 | + Send PM_SUSPEND_PREPARE | |
| 39 | + notifications | |
| 40 | + | | |
| 41 | + v | |
| 42 | + Freeze tasks | |
| 43 | + | | |
| 44 | + | | |
| 45 | + v | |
| 46 | + disable_nonboot_cpus() | |
| 47 | + /* start */ | |
| 48 | + | | |
| 49 | + v | |
| 50 | + Acquire cpu_add_remove_lock | |
| 51 | + | | |
| 52 | + v | |
| 53 | + Iterate over CURRENTLY | |
| 54 | + online CPUs | |
| 55 | + | | |
| 56 | + | | |
| 57 | + | ---------- | |
| 58 | + v | L | |
| 59 | + ======> _cpu_down() | | |
| 60 | + | [This takes cpuhotplug.lock | | |
| 61 | + Common | before taking down the CPU | | |
| 62 | + code | and releases it when done] | O | |
| 63 | + | While it is at it, notifications | | |
| 64 | + | are sent when notable events occur, | | |
| 65 | + ======> by running all registered callbacks. | | |
| 66 | + | | O | |
| 67 | + | | | |
| 68 | + | | | |
| 69 | + v | | |
| 70 | + Note down these cpus in | P | |
| 71 | + frozen_cpus mask ---------- | |
| 72 | + | | |
| 73 | + v | |
| 74 | + Disable regular cpu hotplug | |
| 75 | + by setting cpu_hotplug_disabled=1 | |
| 76 | + | | |
| 77 | + v | |
| 78 | + Release cpu_add_remove_lock | |
| 79 | + | | |
| 80 | + v | |
| 81 | + /* disable_nonboot_cpus() complete */ | |
| 82 | + | | |
| 83 | + v | |
| 84 | + Do suspend | |
| 85 | + | |
| 86 | + | |
| 87 | + | |
| 88 | +Resuming back is likewise, with the counterparts being (in the order of | |
| 89 | +execution during resume): | |
| 90 | +* enable_nonboot_cpus() which involves: | |
| 91 | + | Acquire cpu_add_remove_lock | |
| 92 | + | Reset cpu_hotplug_disabled to 0, thereby enabling regular cpu hotplug | |
| 93 | + | Call _cpu_up() [for all those cpus in the frozen_cpus mask, in a loop] | |
| 94 | + | Release cpu_add_remove_lock | |
| 95 | + v | |
| 96 | + | |
| 97 | +* thaw tasks | |
| 98 | +* send PM_POST_SUSPEND notifications | |
| 99 | +* Release pm_mutex lock. | |
| 100 | + | |
| 101 | + | |
| 102 | +It is to be noted here that the pm_mutex lock is acquired at the very | |
| 103 | +beginning, when we are just starting out to suspend, and then released only | |
| 104 | +after the entire cycle is complete (i.e., suspend + resume). | |
| 105 | + | |
| 106 | + | |
| 107 | + | |
| 108 | + Regular CPU hotplug call path | |
| 109 | + ----------------------------- | |
| 110 | + | |
| 111 | + Write 0 (or 1) to | |
| 112 | + /sys/devices/system/cpu/cpu*/online | |
| 113 | + sysfs file | |
| 114 | + | | |
| 115 | + | | |
| 116 | + v | |
| 117 | + cpu_down() | |
| 118 | + | | |
| 119 | + v | |
| 120 | + Acquire cpu_add_remove_lock | |
| 121 | + | | |
| 122 | + v | |
| 123 | + If cpu_hotplug_disabled is 1 | |
| 124 | + return gracefully | |
| 125 | + | | |
| 126 | + | | |
| 127 | + v | |
| 128 | + ======> _cpu_down() | |
| 129 | + | [This takes cpuhotplug.lock | |
| 130 | + Common | before taking down the CPU | |
| 131 | + code | and releases it when done] | |
| 132 | + | While it is at it, notifications | |
| 133 | + | are sent when notable events occur, | |
| 134 | + ======> by running all registered callbacks. | |
| 135 | + | | |
| 136 | + | | |
| 137 | + v | |
| 138 | + Release cpu_add_remove_lock | |
| 139 | + [That's it!, for | |
| 140 | + regular CPU hotplug] | |
| 141 | + | |
| 142 | + | |
| 143 | + | |
| 144 | +So, as can be seen from the two diagrams (the parts marked as "Common code"), | |
| 145 | +regular CPU hotplug and the suspend code path converge at the _cpu_down() and | |
| 146 | +_cpu_up() functions. They differ in the arguments passed to these functions, | |
| 147 | +in that during regular CPU hotplug, 0 is passed for the 'tasks_frozen' | |
| 148 | +argument. But during suspend, since the tasks are already frozen by the time | |
| 149 | +the non-boot CPUs are offlined or onlined, the _cpu_*() functions are called | |
| 150 | +with the 'tasks_frozen' argument set to 1. | |
| 151 | +[See below for some known issues regarding this.] | |
| 152 | + | |
| 153 | + | |
| 154 | +Important files and functions/entry points: | |
| 155 | +------------------------------------------ | |
| 156 | + | |
| 157 | +kernel/power/process.c : freeze_processes(), thaw_processes() | |
| 158 | +kernel/power/suspend.c : suspend_prepare(), suspend_enter(), suspend_finish() | |
| 159 | +kernel/cpu.c: cpu_[up|down](), _cpu_[up|down](), [disable|enable]_nonboot_cpus() | |
| 160 | + | |
| 161 | + | |
| 162 | + | |
| 163 | +II. What are the issues involved in CPU hotplug? | |
| 164 | + ------------------------------------------- | |
| 165 | + | |
| 166 | +There are some interesting situations involving CPU hotplug and microcode | |
| 167 | +update on the CPUs, as discussed below: | |
| 168 | + | |
| 169 | +[Please bear in mind that the kernel requests the microcode images from | |
| 170 | +userspace, using the request_firmware() function defined in | |
| 171 | +drivers/base/firmware_class.c] | |
| 172 | + | |
| 173 | + | |
| 174 | +a. When all the CPUs are identical: | |
| 175 | + | |
| 176 | + This is the most common situation and it is quite straightforward: we want | |
| 177 | + to apply the same microcode revision to each of the CPUs. | |
| 178 | + To give an example of x86, the collect_cpu_info() function defined in | |
| 179 | + arch/x86/kernel/microcode_core.c helps in discovering the type of the CPU | |
| 180 | + and thereby in applying the correct microcode revision to it. | |
| 181 | + But note that the kernel does not maintain a common microcode image for the | |
| 182 | + all CPUs, in order to handle case 'b' described below. | |
| 183 | + | |
| 184 | + | |
| 185 | +b. When some of the CPUs are different than the rest: | |
| 186 | + | |
| 187 | + In this case since we probably need to apply different microcode revisions | |
| 188 | + to different CPUs, the kernel maintains a copy of the correct microcode | |
| 189 | + image for each CPU (after appropriate CPU type/model discovery using | |
| 190 | + functions such as collect_cpu_info()). | |
| 191 | + | |
| 192 | + | |
| 193 | +c. When a CPU is physically hot-unplugged and a new (and possibly different | |
| 194 | + type of) CPU is hot-plugged into the system: | |
| 195 | + | |
| 196 | + In the current design of the kernel, whenever a CPU is taken offline during | |
| 197 | + a regular CPU hotplug operation, upon receiving the CPU_DEAD notification | |
| 198 | + (which is sent by the CPU hotplug code), the microcode update driver's | |
| 199 | + callback for that event reacts by freeing the kernel's copy of the | |
| 200 | + microcode image for that CPU. | |
| 201 | + | |
| 202 | + Hence, when a new CPU is brought online, since the kernel finds that it | |
| 203 | + doesn't have the microcode image, it does the CPU type/model discovery | |
| 204 | + afresh and then requests the userspace for the appropriate microcode image | |
| 205 | + for that CPU, which is subsequently applied. | |
| 206 | + | |
| 207 | + For example, in x86, the mc_cpu_callback() function (which is the microcode | |
| 208 | + update driver's callback registered for CPU hotplug events) calls | |
| 209 | + microcode_update_cpu() which would call microcode_init_cpu() in this case, | |
| 210 | + instead of microcode_resume_cpu() when it finds that the kernel doesn't | |
| 211 | + have a valid microcode image. This ensures that the CPU type/model | |
| 212 | + discovery is performed and the right microcode is applied to the CPU after | |
| 213 | + getting it from userspace. | |
| 214 | + | |
| 215 | + | |
| 216 | +d. Handling microcode update during suspend/hibernate: | |
| 217 | + | |
| 218 | + Strictly speaking, during a CPU hotplug operation which does not involve | |
| 219 | + physically removing or inserting CPUs, the CPUs are not actually powered | |
| 220 | + off during a CPU offline. They are just put to the lowest C-states possible. | |
| 221 | + Hence, in such a case, it is not really necessary to re-apply microcode | |
| 222 | + when the CPUs are brought back online, since they wouldn't have lost the | |
| 223 | + image during the CPU offline operation. | |
| 224 | + | |
| 225 | + This is the usual scenario encountered during a resume after a suspend. | |
| 226 | + However, in the case of hibernation, since all the CPUs are completely | |
| 227 | + powered off, during restore it becomes necessary to apply the microcode | |
| 228 | + images to all the CPUs. | |
| 229 | + | |
| 230 | + [Note that we don't expect someone to physically pull out nodes and insert | |
| 231 | + nodes with a different type of CPUs in-between a suspend-resume or a | |
| 232 | + hibernate/restore cycle.] | |
| 233 | + | |
| 234 | + In the current design of the kernel however, during a CPU offline operation | |
| 235 | + as part of the suspend/hibernate cycle (the CPU_DEAD_FROZEN notification), | |
| 236 | + the existing copy of microcode image in the kernel is not freed up. | |
| 237 | + And during the CPU online operations (during resume/restore), since the | |
| 238 | + kernel finds that it already has copies of the microcode images for all the | |
| 239 | + CPUs, it just applies them to the CPUs, avoiding any re-discovery of CPU | |
| 240 | + type/model and the need for validating whether the microcode revisions are | |
| 241 | + right for the CPUs or not (due to the above assumption that physical CPU | |
| 242 | + hotplug will not be done in-between suspend/resume or hibernate/restore | |
| 243 | + cycles). | |
| 244 | + | |
| 245 | + | |
| 246 | +III. Are there any known problems when regular CPU hotplug and suspend race | |
| 247 | + with each other? | |
| 248 | + | |
| 249 | +Yes, they are listed below: | |
| 250 | + | |
| 251 | +1. When invoking regular CPU hotplug, the 'tasks_frozen' argument passed to | |
| 252 | + the _cpu_down() and _cpu_up() functions is *always* 0. | |
| 253 | + This might not reflect the true current state of the system, since the | |
| 254 | + tasks could have been frozen by an out-of-band event such as a suspend | |
| 255 | + operation in progress. Hence, it will lead to wrong notifications being | |
| 256 | + sent during the cpu online/offline events (eg, CPU_ONLINE notification | |
| 257 | + instead of CPU_ONLINE_FROZEN) which in turn will lead to execution of | |
| 258 | + inappropriate code by the callbacks registered for such CPU hotplug events. | |
| 259 | + | |
| 260 | +2. If a regular CPU hotplug stress test happens to race with the freezer due | |
| 261 | + to a suspend operation in progress at the same time, then we could hit the | |
| 262 | + situation described below: | |
| 263 | + | |
| 264 | + * A regular cpu online operation continues its journey from userspace | |
| 265 | + into the kernel, since the freezing has not yet begun. | |
| 266 | + * Then freezer gets to work and freezes userspace. | |
| 267 | + * If cpu online has not yet completed the microcode update stuff by now, | |
| 268 | + it will now start waiting on the frozen userspace in the | |
| 269 | + TASK_UNINTERRUPTIBLE state, in order to get the microcode image. | |
| 270 | + * Now the freezer continues and tries to freeze the remaining tasks. But | |
| 271 | + due to this wait mentioned above, the freezer won't be able to freeze | |
| 272 | + the cpu online hotplug task and hence freezing of tasks fails. | |
| 273 | + | |
| 274 | + As a result of this task freezing failure, the suspend operation gets | |
| 275 | + aborted. | |
| @@ -144,7 +144,7 @@ and the default device ID in order to access the device on the active port. · 143 unmodified lines | ||
| 144 | 144 | |
| 145 | 145 | After the host has completed enumeration of the entire network it releases |
| 146 | 146 | devices by clearing device ID locks (calls rio_clear_locks()). For each endpoint |
| 147 | −in the system, it sets the Master Enable bit in the Port General Control CSR | |
| 147 | +in the system, it sets the Discovered bit in the Port General Control CSR | |
| 148 | 148 | to indicate that enumeration is completed and agents are allowed to execute |
| 149 | 149 | passive discovery of the network. |
| 150 | 150 | |
| @@ -0,0 +1,49 @@ | ||
| 1 | +RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge. | |
| 2 | +========================================================================= | |
| 3 | + | |
| 4 | +I. Overview | |
| 5 | + | |
| 6 | +This driver implements all currently defined RapidIO mport callback functions. | |
| 7 | +It supports maintenance read and write operations, inbound and outbound RapidIO | |
| 8 | +doorbells, inbound maintenance port-writes and RapidIO messaging. | |
| 9 | + | |
| 10 | +To generate SRIO maintenance transactions this driver uses one of Tsi721 DMA | |
| 11 | +channels. This mechanism provides access to larger range of hop counts and | |
| 12 | +destination IDs without need for changes in outbound window translation. | |
| 13 | + | |
| 14 | +RapidIO messaging support uses dedicated messaging channels for each mailbox. | |
| 15 | +For inbound messages this driver uses destination ID matching to forward messages | |
| 16 | +into the corresponding message queue. Messaging callbacks are implemented to be | |
| 17 | +fully compatible with RIONET driver (Ethernet over RapidIO messaging services). | |
| 18 | + | |
| 19 | +II. Known problems | |
| 20 | + | |
| 21 | + None. | |
| 22 | + | |
| 23 | +III. To do | |
| 24 | + | |
| 25 | + Add DMA data transfers (non-messaging). | |
| 26 | + Add inbound region (SRIO-to-PCIe) mapping. | |
| 27 | + | |
| 28 | +IV. Version History | |
| 29 | + | |
| 30 | + 1.0.0 - Initial driver release. | |
| 31 | + | |
| 32 | +V. License | |
| 33 | +----------------------------------------------- | |
| 34 | + | |
| 35 | + Copyright(c) 2011 Integrated Device Technology, Inc. All rights reserved. | |
| 36 | + | |
| 37 | + This program is free software; you can redistribute it and/or modify it | |
| 38 | + under the terms of the GNU General Public License as published by the Free | |
| 39 | + Software Foundation; either version 2 of the License, or (at your option) | |
| 40 | + any later version. | |
| 41 | + | |
| 42 | + This program is distributed in the hope that it will be useful, but WITHOUT | |
| 43 | + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 44 | + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 45 | + more details. | |
| 46 | + | |
| 47 | + You should have received a copy of the GNU General Public License along with | |
| 48 | + this program; if not, write to the Free Software Foundation, Inc., | |
| 49 | + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
| @@ -0,0 +1,122 @@ | ||
| 1 | +CFS Bandwidth Control | |
| 2 | +===================== | |
| 3 | + | |
| 4 | +[ This document only discusses CPU bandwidth control for SCHED_NORMAL. | |
| 5 | + The SCHED_RT case is covered in Documentation/scheduler/sched-rt-group.txt ] | |
| 6 | + | |
| 7 | +CFS bandwidth control is a CONFIG_FAIR_GROUP_SCHED extension which allows the | |
| 8 | +specification of the maximum CPU bandwidth available to a group or hierarchy. | |
| 9 | + | |
| 10 | +The bandwidth allowed for a group is specified using a quota and period. Within | |
| 11 | +each given "period" (microseconds), a group is allowed to consume only up to | |
| 12 | +"quota" microseconds of CPU time. When the CPU bandwidth consumption of a | |
| 13 | +group exceeds this limit (for that period), the tasks belonging to its | |
| 14 | +hierarchy will be throttled and are not allowed to run again until the next | |
| 15 | +period. | |
| 16 | + | |
| 17 | +A group's unused runtime is globally tracked, being refreshed with quota units | |
| 18 | +above at each period boundary. As threads consume this bandwidth it is | |
| 19 | +transferred to cpu-local "silos" on a demand basis. The amount transferred | |
| 20 | +within each of these updates is tunable and described as the "slice". | |
| 21 | + | |
| 22 | +Management | |
| 23 | +---------- | |
| 24 | +Quota and period are managed within the cpu subsystem via cgroupfs. | |
| 25 | + | |
| 26 | +cpu.cfs_quota_us: the total available run-time within a period (in microseconds) | |
| 27 | +cpu.cfs_period_us: the length of a period (in microseconds) | |
| 28 | +cpu.stat: exports throttling statistics [explained further below] | |
| 29 | + | |
| 30 | +The default values are: | |
| 31 | + cpu.cfs_period_us=100ms | |
| 32 | + cpu.cfs_quota=-1 | |
| 33 | + | |
| 34 | +A value of -1 for cpu.cfs_quota_us indicates that the group does not have any | |
| 35 | +bandwidth restriction in place, such a group is described as an unconstrained | |
| 36 | +bandwidth group. This represents the traditional work-conserving behavior for | |
| 37 | +CFS. | |
| 38 | + | |
| 39 | +Writing any (valid) positive value(s) will enact the specified bandwidth limit. | |
| 40 | +The minimum quota allowed for the quota or period is 1ms. There is also an | |
| 41 | +upper bound on the period length of 1s. Additional restrictions exist when | |
| 42 | +bandwidth limits are used in a hierarchical fashion, these are explained in | |
| 43 | +more detail below. | |
| 44 | + | |
| 45 | +Writing any negative value to cpu.cfs_quota_us will remove the bandwidth limit | |
| 46 | +and return the group to an unconstrained state once more. | |
| 47 | + | |
| 48 | +Any updates to a group's bandwidth specification will result in it becoming | |
| 49 | +unthrottled if it is in a constrained state. | |
| 50 | + | |
| 51 | +System wide settings | |
| 52 | +-------------------- | |
| 53 | +For efficiency run-time is transferred between the global pool and CPU local | |
| 54 | +"silos" in a batch fashion. This greatly reduces global accounting pressure | |
| 55 | +on large systems. The amount transferred each time such an update is required | |
| 56 | +is described as the "slice". | |
| 57 | + | |
| 58 | +This is tunable via procfs: | |
| 59 | + /proc/sys/kernel/sched_cfs_bandwidth_slice_us (default=5ms) | |
| 60 | + | |
| 61 | +Larger slice values will reduce transfer overheads, while smaller values allow | |
| 62 | +for more fine-grained consumption. | |
| 63 | + | |
| 64 | +Statistics | |
| 65 | +---------- | |
| 66 | +A group's bandwidth statistics are exported via 3 fields in cpu.stat. | |
| 67 | + | |
| 68 | +cpu.stat: | |
| 69 | +- nr_periods: Number of enforcement intervals that have elapsed. | |
| 70 | +- nr_throttled: Number of times the group has been throttled/limited. | |
| 71 | +- throttled_time: The total time duration (in nanoseconds) for which entities | |
| 72 | + of the group have been throttled. | |
| 73 | + | |
| 74 | +This interface is read-only. | |
| 75 | + | |
| 76 | +Hierarchical considerations | |
| 77 | +--------------------------- | |
| 78 | +The interface enforces that an individual entity's bandwidth is always | |
| 79 | +attainable, that is: max(c_i) <= C. However, over-subscription in the | |
| 80 | +aggregate case is explicitly allowed to enable work-conserving semantics | |
| 81 | +within a hierarchy. | |
| 82 | + e.g. \Sum (c_i) may exceed C | |
| 83 | +[ Where C is the parent's bandwidth, and c_i its children ] | |
| 84 | + | |
| 85 | + | |
| 86 | +There are two ways in which a group may become throttled: | |
| 87 | + a. it fully consumes its own quota within a period | |
| 88 | + b. a parent's quota is fully consumed within its period | |
| 89 | + | |
| 90 | +In case b) above, even though the child may have runtime remaining it will not | |
| 91 | +be allowed to until the parent's runtime is refreshed. | |
| 92 | + | |
| 93 | +Examples | |
| 94 | +-------- | |
| 95 | +1. Limit a group to 1 CPU worth of runtime. | |
| 96 | + | |
| 97 | + If period is 250ms and quota is also 250ms, the group will get | |
| 98 | + 1 CPU worth of runtime every 250ms. | |
| 99 | + | |
| 100 | + # echo 250000 > cpu.cfs_quota_us /* quota = 250ms */ | |
| 101 | + # echo 250000 > cpu.cfs_period_us /* period = 250ms */ | |
| 102 | + | |
| 103 | +2. Limit a group to 2 CPUs worth of runtime on a multi-CPU machine. | |
| 104 | + | |
| 105 | + With 500ms period and 1000ms quota, the group can get 2 CPUs worth of | |
| 106 | + runtime every 500ms. | |
| 107 | + | |
| 108 | + # echo 1000000 > cpu.cfs_quota_us /* quota = 1000ms */ | |
| 109 | + # echo 500000 > cpu.cfs_period_us /* period = 500ms */ | |
| 110 | + | |
| 111 | + The larger period here allows for increased burst capacity. | |
| 112 | + | |
| 113 | +3. Limit a group to 20% of 1 CPU. | |
| 114 | + | |
| 115 | + With 50ms period, 10ms quota will be equivalent to 20% of 1 CPU. | |
| 116 | + | |
| 117 | + # echo 10000 > cpu.cfs_quota_us /* quota = 10ms */ | |
| 118 | + # echo 50000 > cpu.cfs_period_us /* period = 50ms */ | |
| 119 | + | |
| 120 | + By using a small period here we are ensuring a consistent latency | |
| 121 | + response at the expense of burst capacity. | |
| 122 | + | |
| @@ -28,6 +28,8 @@ LICENSE.FlashPoint · 27 unmodified lines | ||
| 28 | 28 | - Licence of the Flashpoint driver |
| 29 | 29 | LICENSE.qla2xxx |
| 30 | 30 | - License for QLogic Linux Fibre Channel HBA Driver firmware. |
| 31 | +LICENSE.qla4xxx | |
| 32 | + - License for QLogic Linux iSCSI HBA Driver. | |
| 31 | 33 | Mylex.txt |
| 32 | 34 | - info on driver for Mylex adapters |
| 33 | 35 | NinjaSCSI.txt |
| @@ -1,3 +1,18 @@ | ||
| 1 | +Release Date : Wed. Oct 5, 2011 17:00:00 PST 2010 - | |
| 2 | + (emaild-id:megaraidlinux@lsi.com) | |
| 3 | + Adam Radford | |
| 4 | +Current Version : 00.00.06.12-rc1 | |
| 5 | +Old Version : 00.00.05.40-rc1 | |
| 6 | + 1. Continue booting immediately if FW in FAULT at driver load time. | |
| 7 | + 2. Increase default cmds per lun to 256. | |
| 8 | + 3. Fix mismatch in megasas_reset_fusion() mutex lock-unlock. | |
| 9 | + 4. Remove some un-necessary code. | |
| 10 | + 5. Clear state change interrupts for Fusion/Invader. | |
| 11 | + 6. Clear FUSION_IN_RESET before enabling interrupts. | |
| 12 | + 7. Add support for MegaRAID 9360/9380 12GB/s controllers. | |
| 13 | + 8. Add multiple MSI-X vector/multiple reply queue support. | |
| 14 | + 9. Add driver workaround for PERC5/1068 kdump kernel panic. | |
| 15 | +------------------------------------------------------------------------------- | |
| 1 | 16 | Release Date : Tue. Jul 26, 2011 17:00:00 PST 2010 - |
| 2 | 17 | (emaild-id:megaraidlinux@lsi.com) |
| 3 | 18 | Adam Radford |
| @@ -0,0 +1,310 @@ | ||
| 1 | +Copyright (c) 2003-2011 QLogic Corporation | |
| 2 | +QLogic Linux iSCSI HBA Driver | |
| 3 | + | |
| 4 | +This program includes a device driver for Linux 3.x. | |
| 5 | +You may modify and redistribute the device driver code under the | |
| 6 | +GNU General Public License (a copy of which is attached hereto as | |
| 7 | +Exhibit A) published by the Free Software Foundation (version 2). | |
| 8 | + | |
| 9 | +REGARDLESS OF WHAT LICENSING MECHANISM IS USED OR APPLICABLE, | |
| 10 | +THIS PROGRAM IS PROVIDED BY QLOGIC CORPORATION "AS IS'' AND ANY | |
| 11 | +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 12 | +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A | |
| 13 | +PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR | |
| 14 | +BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | |
| 15 | +EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED | |
| 16 | +TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
| 17 | +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
| 18 | +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 19 | +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
| 20 | +OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 21 | +POSSIBILITY OF SUCH DAMAGE. | |
| 22 | + | |
| 23 | +USER ACKNOWLEDGES AND AGREES THAT USE OF THIS PROGRAM WILL NOT | |
| 24 | +CREATE OR GIVE GROUNDS FOR A LICENSE BY IMPLICATION, ESTOPPEL, OR | |
| 25 | +OTHERWISE IN ANY INTELLECTUAL PROPERTY RIGHTS (PATENT, COPYRIGHT, | |
| 26 | +TRADE SECRET, MASK WORK, OR OTHER PROPRIETARY RIGHT) EMBODIED IN | |
| 27 | +ANY OTHER QLOGIC HARDWARE OR SOFTWARE EITHER SOLELY OR IN | |
| 28 | +COMBINATION WITH THIS PROGRAM. | |
| 29 | + | |
| 30 | + | |
| 31 | +EXHIBIT A | |
| 32 | + | |
| 33 | + GNU GENERAL PUBLIC LICENSE | |
| 34 | + Version 2, June 1991 | |
| 35 | + | |
| 36 | + Copyright (C) 1989, 1991 Free Software Foundation, Inc. | |
| 37 | + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | |
| 38 | + Everyone is permitted to copy and distribute verbatim copies | |
| 39 | + of this license document, but changing it is not allowed. | |
| 40 | + | |
| 41 | + Preamble | |
| 42 | + | |
| 43 | + The licenses for most software are designed to take away your | |
| 44 | +freedom to share and change it. By contrast, the GNU General Public | |
| 45 | +License is intended to guarantee your freedom to share and change free | |
| 46 | +software--to make sure the software is free for all its users. This | |
| 47 | +General Public License applies to most of the Free Software | |
| 48 | +Foundation's software and to any other program whose authors commit to | |
| 49 | +using it. (Some other Free Software Foundation software is covered by | |
| 50 | +the GNU Lesser General Public License instead.) You can apply it to | |
| 51 | +your programs, too. | |
| 52 | + | |
| 53 | + When we speak of free software, we are referring to freedom, not | |
| 54 | +price. Our General Public Licenses are designed to make sure that you | |
| 55 | +have the freedom to distribute copies of free software (and charge for | |
| 56 | +this service if you wish), that you receive source code or can get it | |
| 57 | +if you want it, that you can change the software or use pieces of it | |
| 58 | +in new free programs; and that you know you can do these things. | |
| 59 | + | |
| 60 | + To protect your rights, we need to make restrictions that forbid | |
| 61 | +anyone to deny you these rights or to ask you to surrender the rights. | |
| 62 | +These restrictions translate to certain responsibilities for you if you | |
| 63 | +distribute copies of the software, or if you modify it. | |
| 64 | + | |
| 65 | + For example, if you distribute copies of such a program, whether | |
| 66 | +gratis or for a fee, you must give the recipients all the rights that | |
| 67 | +you have. You must make sure that they, too, receive or can get the | |
| 68 | +source code. And you must show them these terms so they know their | |
| 69 | +rights. | |
| 70 | + | |
| 71 | + We protect your rights with two steps: (1) copyright the software, and | |
| 72 | +(2) offer you this license which gives you legal permission to copy, | |
| 73 | +distribute and/or modify the software. | |
| 74 | + | |
| 75 | + Also, for each author's protection and ours, we want to make certain | |
| 76 | +that everyone understands that there is no warranty for this free | |
| 77 | +software. If the software is modified by someone else and passed on, we | |
| 78 | +want its recipients to know that what they have is not the original, so | |
| 79 | +that any problems introduced by others will not reflect on the original | |
| 80 | +authors' reputations. | |
| 81 | + | |
| 82 | + Finally, any free program is threatened constantly by software | |
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| 290 | + NO WARRANTY | |
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| 309 | +PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE | |
| 310 | +POSSIBILITY OF SUCH DAMAGES. | |
| @@ -0,0 +1,75 @@ | ||
| 1 | +Operating FCoE using bnx2fc | |
| 2 | +=========================== | |
| 3 | +Broadcom FCoE offload through bnx2fc is full stateful hardware offload that | |
| 4 | +cooperates with all interfaces provided by the Linux ecosystem for FC/FCoE and | |
| 5 | +SCSI controllers. As such, FCoE functionality, once enabled is largely | |
| 6 | +transparent. Devices discovered on the SAN will be registered and unregistered | |
| 7 | +automatically with the upper storage layers. | |
| 8 | + | |
| 9 | +Despite the fact that the Broadcom's FCoE offload is fully offloaded, it does | |
| 10 | +depend on the state of the network interfaces to operate. As such, the network | |
| 11 | +interface (e.g. eth0) associated with the FCoE offload initiator must be 'up'. | |
| 12 | +It is recommended that the network interfaces be configured to be brought up | |
| 13 | +automatically at boot time. | |
| 14 | + | |
| 15 | +Furthermore, the Broadcom FCoE offload solution creates VLAN interfaces to | |
| 16 | +support the VLANs that have been discovered for FCoE operation (e.g. | |
| 17 | +eth0.1001-fcoe). Do not delete or disable these interfaces or FCoE operation | |
| 18 | +will be disrupted. | |
| 19 | + | |
| 20 | +Driver Usage Model: | |
| 21 | +=================== | |
| 22 | + | |
| 23 | +1. Ensure that fcoe-utils package is installed. | |
| 24 | + | |
| 25 | +2. Configure the interfaces on which bnx2fc driver has to operate on. | |
| 26 | +Here are the steps to configure: | |
| 27 | + a. cd /etc/fcoe | |
| 28 | + b. copy cfg-ethx to cfg-eth5 if FCoE has to be enabled on eth5. | |
| 29 | + c. Repeat this for all the interfaces where FCoE has to be enabled. | |
| 30 | + d. Edit all the cfg-eth files to set "no" for DCB_REQUIRED** field, and | |
| 31 | + "yes" for AUTO_VLAN. | |
| 32 | + e. Other configuration parameters should be left as default | |
| 33 | + | |
| 34 | +3. Ensure that "bnx2fc" is in SUPPORTED_DRIVERS list in /etc/fcoe/config. | |
| 35 | + | |
| 36 | +4. Start fcoe service. (service fcoe start). If Broadcom devices are present in | |
| 37 | +the system, bnx2fc driver would automatically claim the interfaces, starts vlan | |
| 38 | +discovery and log into the targets. | |
| 39 | + | |
| 40 | +5. "Symbolic Name" in 'fcoeadm -i' output would display if bnx2fc has claimed | |
| 41 | +the interface. | |
| 42 | +Eg: | |
| 43 | +[root@bh2 ~]# fcoeadm -i | |
| 44 | + Description: NetXtreme II BCM57712 10 Gigabit Ethernet | |
| 45 | + Revision: 01 | |
| 46 | + Manufacturer: Broadcom Corporation | |
| 47 | + Serial Number: 0010186FD558 | |
| 48 | + Driver: bnx2x 1.70.00-0 | |
| 49 | + Number of Ports: 2 | |
| 50 | + | |
| 51 | + Symbolic Name: bnx2fc v1.0.5 over eth5.4 | |
| 52 | + OS Device Name: host11 | |
| 53 | + Node Name: 0x10000010186FD559 | |
| 54 | + Port Name: 0x20000010186FD559 | |
| 55 | + FabricName: 0x2001000DECB3B681 | |
| 56 | + Speed: 10 Gbit | |
| 57 | + Supported Speed: 10 Gbit | |
| 58 | + MaxFrameSize: 2048 | |
| 59 | + FC-ID (Port ID): 0x0F0377 | |
| 60 | + State: Online | |
| 61 | + | |
| 62 | +6. Verify the vlan discovery is performed by running ifconfig and notice | |
| 63 | +<INTERFACE>.<VLAN>-fcoe interfaces are automatically created. | |
| 64 | + | |
| 65 | +Refer to fcoeadm manpage for more information on fcoeadm operations to | |
| 66 | +create/destroy interfaces or to display lun/target information. | |
| 67 | + | |
| 68 | +NOTE: | |
| 69 | +==== | |
| 70 | +** Broadcom FCoE capable devices implement a DCBX/LLDP client on-chip. Only one | |
| 71 | +LLDP client is allowed per interface. For proper operation all host software | |
| 72 | +based DCBX/LLDP clients (e.g. lldpad) must be disabled. To disable lldpad on a | |
| 73 | +given interface, run the following command: | |
| 74 | + | |
| 75 | +lldptool set-lldp -i <interface_name> adminStatus=disabled | |
| @@ -20,8 +20,6 @@ Version: 1.2.14 · 19 unmodified lines | ||
| 20 | 20 | Date: 11/01/2001 |
| 21 | 21 | Historical Author: Andrew Manison <amanison@america.net> |
| 22 | 22 | Primary Author: Doug McNash |
| 23 | −Support: support@computone.com | |
| 24 | −Fixes and Updates: Mike Warfield <mhw@wittsend.com> | |
| 25 | 23 | |
| 26 | 24 | This file assumes that you are using the Computone drivers which are |
| 27 | 25 | integrated into the kernel sources. For updating the drivers or installing |
| @@ -28,6 +28,10 @@ · 27 unmodified lines | ||
| 28 | 28 | RS485 communications. This data structure is used to set and configure RS485 |
| 29 | 29 | parameters in the platform data and in ioctls. |
| 30 | 30 | |
| 31 | + The device tree can also provide RS485 boot time parameters (see [2] | |
| 32 | + for bindings). The driver is in charge of filling this data structure from | |
| 33 | + the values given by the device tree. | |
| 34 | + | |
| 31 | 35 | Any driver for devices capable of working both as RS232 and RS485 should |
| 32 | 36 | provide at least the following ioctls: |
| 33 | 37 | |
| @@ -104,6 +108,9 @@ · 70 unmodified lines | ||
| 104 | 108 | rs485conf.flags |= SER_RS485_RTS_AFTER_SEND; |
| 105 | 109 | rs485conf.delay_rts_after_send = ...; |
| 106 | 110 | |
| 111 | + /* Set this flag if you want to receive data even whilst sending data */ | |
| 112 | + rs485conf.flags |= SER_RS485_RX_DURING_TX; | |
| 113 | + | |
| 107 | 114 | if (ioctl (fd, TIOCSRS485, &rs485conf) < 0) { |
| 108 | 115 | /* Error handling. See errno. */ |
| 109 | 116 | } |
| @@ -118,3 +125,4 @@ · 8 unmodified lines | ||
| 118 | 125 | 5. REFERENCES |
| 119 | 126 | |
| 120 | 127 | [1] include/linux/serial.h |
| 128 | + [2] Documentation/devicetree/bindings/serial/rs485.txt | |
| @@ -886,6 +886,12 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 885 unmodified lines | ||
| 886 | 886 | disable) |
| 887 | 887 | power_save_controller - Reset HD-audio controller in power-saving mode |
| 888 | 888 | (default = on) |
| 889 | + align_buffer_size - Force rounding of buffer/period sizes to multiples | |
| 890 | + of 128 bytes. This is more efficient in terms of memory | |
| 891 | + access but isn't required by the HDA spec and prevents | |
| 892 | + users from specifying exact period/buffer sizes. | |
| 893 | + (default = on) | |
| 894 | + snoop - Enable/disable snooping (default = on) | |
| 889 | 895 | |
| 890 | 896 | This module supports multiple cards and autoprobe. |
| 891 | 897 | |
| @@ -98,3 +98,19 @@ Conexant codecs · 97 unmodified lines | ||
| 98 | 98 | |
| 99 | 99 | * Auto-Mute Mode |
| 100 | 100 | See Reatek codecs. |
| 101 | + | |
| 102 | + | |
| 103 | +Analog codecs | |
| 104 | +-------------- | |
| 105 | + | |
| 106 | +* Channel Mode | |
| 107 | + This is an enum control to change the surround-channel setup, | |
| 108 | + appears only when the surround channels are available. | |
| 109 | + It gives the number of channels to be used, "2ch", "4ch" and "6ch". | |
| 110 | + According to the configuration, this also controls the | |
| 111 | + jack-retasking of multi-I/O jacks. | |
| 112 | + | |
| 113 | +* Independent HP | |
| 114 | + When this enum control is enabled, the headphone output is routed | |
| 115 | + from an individual stream (the third PCM such as hw:0,2) instead of | |
| 116 | + the primary stream. | |
| @@ -29,9 +29,6 @@ ALC880 · 28 unmodified lines | ||
| 29 | 29 | |
| 30 | 30 | ALC260 |
| 31 | 31 | ====== |
| 32 | − hp HP machines | |
| 33 | − hp-3013 HP machines (3013-variant) | |
| 34 | − hp-dc7600 HP DC7600 | |
| 35 | 32 | fujitsu Fujitsu S7020 |
| 36 | 33 | acer Acer TravelMate |
| 37 | 34 | will Will laptops (PB V7900) |
| @@ -46,15 +43,10 @@ ALC260 · 8 unmodified lines | ||
| 46 | 43 | ALC262 |
| 47 | 44 | ====== |
| 48 | 45 | fujitsu Fujitsu Laptop |
| 49 | − hp-bpc HP xw4400/6400/8400/9400 laptops | |
| 50 | − hp-bpc-d7000 HP BPC D7000 | |
| 51 | − hp-tc-t5735 HP Thin Client T5735 | |
| 52 | − hp-rp5700 HP RP5700 | |
| 53 | 46 | benq Benq ED8 |
| 54 | 47 | benq-t31 Benq T31 |
| 55 | 48 | hippo Hippo (ATI) with jack detection, Sony UX-90s |
| 56 | 49 | hippo_1 Hippo (Benq) with jack detection |
| 57 | − sony-assamd Sony ASSAMD | |
| 58 | 50 | toshiba-s06 Toshiba S06 |
| 59 | 51 | toshiba-rx1 Toshiba RX1 |
| 60 | 52 | tyan Tyan Thunder n6650W (S2915-E) |
| @@ -66,43 +58,15 @@ ALC262 · 5 unmodified lines | ||
| 66 | 58 | |
| 67 | 59 | ALC267/268 |
| 68 | 60 | ========== |
| 69 | − quanta-il1 Quanta IL1 mini-notebook | |
| 70 | − 3stack 3-stack model | |
| 71 | − toshiba Toshiba A205 | |
| 72 | − acer Acer laptops | |
| 73 | − acer-dmic Acer laptops with digital-mic | |
| 74 | − acer-aspire Acer Aspire One | |
| 75 | − dell Dell OEM laptops (Vostro 1200) | |
| 76 | − zepto Zepto laptops | |
| 77 | − test for testing/debugging purpose, almost all controls can | |
| 78 | − adjusted. Appearing only when compiled with | |
| 79 | − $CONFIG_SND_DEBUG=y | |
| 80 | − auto auto-config reading BIOS (default) | |
| 61 | + N/A | |
| 81 | 62 | |
| 82 | 63 | ALC269 |
| 83 | 64 | ====== |
| 84 | − basic Basic preset | |
| 85 | − quanta Quanta FL1 | |
| 86 | 65 | laptop-amic Laptops with analog-mic input |
| 87 | 66 | laptop-dmic Laptops with digital-mic input |
| 88 | − fujitsu FSC Amilo | |
| 89 | − lifebook Fujitsu Lifebook S6420 | |
| 90 | − auto auto-config reading BIOS (default) | |
| 91 | 67 | |
| 92 | 68 | ALC662/663/272 |
| 93 | 69 | ============== |
| 94 | − 3stack-dig 3-stack (2-channel) with SPDIF | |
| 95 | − 3stack-6ch 3-stack (6-channel) | |
| 96 | − 3stack-6ch-dig 3-stack (6-channel) with SPDIF | |
| 97 | − 5stack-dig 5-stack with SPDIF | |
| 98 | − lenovo-101e Lenovo laptop | |
| 99 | − eeepc-p701 ASUS Eeepc P701 | |
| 100 | − eeepc-ep20 ASUS Eeepc EP20 | |
| 101 | − ecs ECS/Foxconn mobo | |
| 102 | − m51va ASUS M51VA | |
| 103 | − g71v ASUS G71V | |
| 104 | − h13 ASUS H13 | |
| 105 | − g50v ASUS G50V | |
| 106 | 70 | asus-mode1 ASUS |
| 107 | 71 | asus-mode2 ASUS |
| 108 | 72 | asus-mode3 ASUS |
| @@ -111,15 +75,10 @@ ALC662/663/272 · 2 unmodified lines | ||
| 111 | 75 | asus-mode6 ASUS |
| 112 | 76 | asus-mode7 ASUS |
| 113 | 77 | asus-mode8 ASUS |
| 114 | − dell Dell with ALC272 | |
| 115 | − dell-zm1 Dell ZM1 with ALC272 | |
| 116 | − samsung-nc10 Samsung NC10 mini notebook | |
| 117 | − auto auto-config reading BIOS (default) | |
| 118 | 78 | |
| 119 | 79 | ALC680 |
| 120 | 80 | ====== |
| 121 | − base Base model (ASUS NX90) | |
| 122 | − auto auto-config reading BIOS (default) | |
| 81 | + N/A | |
| 123 | 82 | |
| 124 | 83 | ALC882/883/885/888/889 |
| 125 | 84 | ====================== |
| @@ -175,28 +134,11 @@ ALC882/883/885/888/889 · 49 unmodified lines | ||
| 175 | 134 | |
| 176 | 135 | ALC861/660 |
| 177 | 136 | ========== |
| 178 | − 3stack 3-jack | |
| 179 | − 3stack-dig 3-jack with SPDIF I/O | |
| 180 | − 6stack-dig 6-jack with SPDIF I/O | |
| 181 | − 3stack-660 3-jack (for ALC660) | |
| 182 | − uniwill-m31 Uniwill M31 laptop | |
| 183 | − toshiba Toshiba laptop support | |
| 184 | − asus Asus laptop support | |
| 185 | − asus-laptop ASUS F2/F3 laptops | |
| 186 | − auto auto-config reading BIOS (default) | |
| 137 | + N/A | |
| 187 | 138 | |
| 188 | 139 | ALC861VD/660VD |
| 189 | 140 | ============== |
| 190 | − 3stack 3-jack | |
| 191 | − 3stack-dig 3-jack with SPDIF OUT | |
| 192 | − 6stack-dig 6-jack with SPDIF OUT | |
| 193 | − 3stack-660 3-jack (for ALC660VD) | |
| 194 | − 3stack-660-digout 3-jack with SPDIF OUT (for ALC660VD) | |
| 195 | − lenovo Lenovo 3000 C200 | |
| 196 | − dallas Dallas laptops | |
| 197 | − hp HP TX1000 | |
| 198 | − asus-v1s ASUS V1Sn | |
| 199 | − auto auto-config reading BIOS (default) | |
| 141 | + N/A | |
| 200 | 142 | |
| 201 | 143 | CMI9880 |
| 202 | 144 | ======= |
| @@ -289,7 +231,6 @@ Conexant 5051 · 86 unmodified lines | ||
| 289 | 231 | hp-dv6736 HP dv6736 |
| 290 | 232 | hp-f700 HP Compaq Presario F700 |
| 291 | 233 | ideapad Lenovo IdeaPad laptop |
| 292 | − lenovo-x200 Lenovo X200 laptop | |
| 293 | 234 | toshiba Toshiba Satellite M300 |
| 294 | 235 | |
| 295 | 236 | Conexant 5066 |
| @@ -408,6 +349,7 @@ STAC92HD83* · 112 unmodified lines | ||
| 408 | 349 | ref Reference board |
| 409 | 350 | mic-ref Reference board with power management for ports |
| 410 | 351 | dell-s14 Dell laptop |
| 352 | + dell-vostro-3500 Dell Vostro 3500 laptop | |
| 411 | 353 | hp HP laptops with (inverted) mute-LED |
| 412 | 354 | hp-dv7-4000 HP dv-7 4000 |
| 413 | 355 | auto BIOS setup (default) |
| @@ -447,7 +447,10 @@ The file needs to have a line `[codec]`. The next line should contain · 446 unmodified lines | ||
| 447 | 447 | three numbers indicating the codec vendor-id (0x12345678 in the |
| 448 | 448 | example), the codec subsystem-id (0xabcd1234) and the address (2) of |
| 449 | 449 | the codec. The rest patch entries are applied to this specified codec |
| 450 | −until another codec entry is given. | |
| 450 | +until another codec entry is given. Passing 0 or a negative number to | |
| 451 | +the first or the second value will make the check of the corresponding | |
| 452 | +field be skipped. It'll be useful for really broken devices that don't | |
| 453 | +initialize SSID properly. | |
| 451 | 454 | |
| 452 | 455 | The `[model]` line allows to change the model name of the each codec. |
| 453 | 456 | In the example above, it will be changed to model=auto. |
| @@ -491,7 +494,7 @@ Also, the codec chip name can be rewritten via `[chip_name]` line. · 37 unmodified lines | ||
| 491 | 494 | The hd-audio driver reads the file via request_firmware(). Thus, |
| 492 | 495 | a patch file has to be located on the appropriate firmware path, |
| 493 | 496 | typically, /lib/firmware. For example, when you pass the option |
| 494 | −`patch=hda-init.fw`, the file /lib/firmware/hda-init-fw must be | |
| 497 | +`patch=hda-init.fw`, the file /lib/firmware/hda-init.fw must be | |
| 495 | 498 | present. |
| 496 | 499 | |
| 497 | 500 | The patch module option is specific to each card instance, and you |
| @@ -524,6 +527,54 @@ power-saving. See /sys/module/snd_hda_intel/parameters/power_save to · 26 unmodified lines | ||
| 524 | 527 | check the current value. If it's non-zero, the feature is turned on. |
| 525 | 528 | |
| 526 | 529 | |
| 530 | +Tracepoints | |
| 531 | +~~~~~~~~~~~ | |
| 532 | +The hd-audio driver gives a few basic tracepoints. | |
| 533 | +`hda:hda_send_cmd` traces each CORB write while `hda:hda_get_response` | |
| 534 | +traces the response from RIRB (only when read from the codec driver). | |
| 535 | +`hda:hda_bus_reset` traces the bus-reset due to fatal error, etc, | |
| 536 | +`hda:hda_unsol_event` traces the unsolicited events, and | |
| 537 | +`hda:hda_power_down` and `hda:hda_power_up` trace the power down/up | |
| 538 | +via power-saving behavior. | |
| 539 | + | |
| 540 | +Enabling all tracepoints can be done like | |
| 541 | +------------------------------------------------------------------------ | |
| 542 | + # echo 1 > /sys/kernel/debug/tracing/events/hda/enable | |
| 543 | +------------------------------------------------------------------------ | |
| 544 | +then after some commands, you can traces from | |
| 545 | +/sys/kernel/debug/tracing/trace file. For example, when you want to | |
| 546 | +trace what codec command is sent, enable the tracepoint like: | |
| 547 | +------------------------------------------------------------------------ | |
| 548 | + # cat /sys/kernel/debug/tracing/trace | |
| 549 | + # tracer: nop | |
| 550 | + # | |
| 551 | + # TASK-PID CPU# TIMESTAMP FUNCTION | |
| 552 | + # | | | | | | |
| 553 | + <...>-7807 [002] 105147.774889: hda_send_cmd: [0:0] val=e3a019 | |
| 554 | + <...>-7807 [002] 105147.774893: hda_send_cmd: [0:0] val=e39019 | |
| 555 | + <...>-7807 [002] 105147.999542: hda_send_cmd: [0:0] val=e3a01a | |
| 556 | + <...>-7807 [002] 105147.999543: hda_send_cmd: [0:0] val=e3901a | |
| 557 | + <...>-26764 [001] 349222.837143: hda_send_cmd: [0:0] val=e3a019 | |
| 558 | + <...>-26764 [001] 349222.837148: hda_send_cmd: [0:0] val=e39019 | |
| 559 | + <...>-26764 [001] 349223.058539: hda_send_cmd: [0:0] val=e3a01a | |
| 560 | + <...>-26764 [001] 349223.058541: hda_send_cmd: [0:0] val=e3901a | |
| 561 | +------------------------------------------------------------------------ | |
| 562 | +Here `[0:0]` indicates the card number and the codec address, and | |
| 563 | +`val` shows the value sent to the codec, respectively. The value is | |
| 564 | +a packed value, and you can decode it via hda-decode-verb program | |
| 565 | +included in hda-emu package below. For example, the value e3a019 is | |
| 566 | +to set the left output-amp value to 25. | |
| 567 | +------------------------------------------------------------------------ | |
| 568 | + % hda-decode-verb 0xe3a019 | |
| 569 | + raw value = 0x00e3a019 | |
| 570 | + cid = 0, nid = 0x0e, verb = 0x3a0, parm = 0x19 | |
| 571 | + raw value: verb = 0x3a0, parm = 0x19 | |
| 572 | + verbname = set_amp_gain_mute | |
| 573 | + amp raw val = 0xa019 | |
| 574 | + output, left, idx=0, mute=0, val=25 | |
| 575 | +------------------------------------------------------------------------ | |
| 576 | + | |
| 577 | + | |
| 527 | 578 | Development Tree |
| 528 | 579 | ~~~~~~~~~~~~~~~~ |
| 529 | 580 | The latest development codes for HD-audio are found on sound git tree: |
| @@ -24,10 +24,10 @@ Rules on what kind of patches are accepted, and which ones are not, into the · 23 unmodified lines | ||
| 24 | 24 | Procedure for submitting patches to the -stable tree: |
| 25 | 25 | |
| 26 | 26 | - Send the patch, after verifying that it follows the above rules, to |
| 27 | − stable@kernel.org. You must note the upstream commit ID in the changelog | |
| 28 | − of your submission. | |
| 27 | + stable@vger.kernel.org. You must note the upstream commit ID in the | |
| 28 | + changelog of your submission. | |
| 29 | 29 | - To have the patch automatically included in the stable tree, add the tag |
| 30 | − Cc: stable@kernel.org | |
| 30 | + Cc: stable@vger.kernel.org | |
| 31 | 31 | in the sign-off area. Once the patch is merged it will be applied to |
| 32 | 32 | the stable tree without anything else needing to be done by the author |
| 33 | 33 | or subsystem maintainer. |
| @@ -35,10 +35,10 @@ Procedure for submitting patches to the -stable tree: · 1 unmodified line | ||
| 35 | 35 | cherry-picked than this can be specified in the following format in |
| 36 | 36 | the sign-off area: |
| 37 | 37 | |
| 38 | − Cc: <stable@kernel.org> # .32.x: a1f84a3: sched: Check for idle | |
| 39 | − Cc: <stable@kernel.org> # .32.x: 1b9508f: sched: Rate-limit newidle | |
| 40 | − Cc: <stable@kernel.org> # .32.x: fd21073: sched: Fix affinity logic | |
| 41 | − Cc: <stable@kernel.org> # .32.x | |
| 38 | + Cc: <stable@vger.kernel.org> # .32.x: a1f84a3: sched: Check for idle | |
| 39 | + Cc: <stable@vger.kernel.org> # .32.x: 1b9508f: sched: Rate-limit newidle | |
| 40 | + Cc: <stable@vger.kernel.org> # .32.x: fd21073: sched: Fix affinity logic | |
| 41 | + Cc: <stable@vger.kernel.org> # .32.x | |
| 42 | 42 | Signed-off-by: Ingo Molnar <mingo@elte.hu> |
| 43 | 43 | |
| 44 | 44 | The tag sequence has the meaning of: |
| @@ -24,6 +24,7 @@ show up in /proc/sys/kernel: · 23 unmodified lines | ||
| 24 | 24 | - bootloader_type [ X86 only ] |
| 25 | 25 | - bootloader_version [ X86 only ] |
| 26 | 26 | - callhome [ S390 only ] |
| 27 | +- cap_last_cap | |
| 27 | 28 | - core_pattern |
| 28 | 29 | - core_pipe_limit |
| 29 | 30 | - core_uses_pid |
| @@ -155,6 +156,13 @@ on has a service contract with IBM. · 125 unmodified lines | ||
| 155 | 156 | |
| 156 | 157 | ============================================================== |
| 157 | 158 | |
| 159 | +cap_last_cap | |
| 160 | + | |
| 161 | +Highest valid capability of the running kernel. Exports | |
| 162 | +CAP_LAST_CAP from the kernel. | |
| 163 | + | |
| 164 | +============================================================== | |
| 165 | + | |
| 158 | 166 | core_pattern: |
| 159 | 167 | |
| 160 | 168 | core_pattern is used to specify a core dumpfile pattern name. |
| @@ -379,10 +379,10 @@ EVENT_PROCESS: · 378 unmodified lines | ||
| 379 | 379 | |
| 380 | 380 | # To closer match vmstat scanning statistics, only count isolate_both |
| 381 | 381 | # and isolate_inactive as scanning. isolate_active is rotation |
| 382 | − # isolate_inactive == 0 | |
| 383 | − # isolate_active == 1 | |
| 384 | − # isolate_both == 2 | |
| 385 | − if ($isolate_mode != 1) { | |
| 382 | + # isolate_inactive == 1 | |
| 383 | + # isolate_active == 2 | |
| 384 | + # isolate_both == 3 | |
| 385 | + if ($isolate_mode != 2) { | |
| 386 | 386 | $perprocesspid{$process_pid}->{HIGH_NR_SCANNED} += $nr_scanned; |
| 387 | 387 | } |
| 388 | 388 | $perprocesspid{$process_pid}->{HIGH_NR_CONTIG_DIRTY} += $nr_contig_dirty; |
| @@ -0,0 +1,45 @@ | ||
| 1 | + | |
| 2 | + TODO | |
| 3 | +~~~~~~ | |
| 4 | +Please pick something while reading :) | |
| 5 | + | |
| 6 | +- Convert interrupt handler to per-ep-thread-irq | |
| 7 | + | |
| 8 | + As it turns out some DWC3-commands ~1ms to complete. Currently we spin | |
| 9 | + until the command completes which is bad. | |
| 10 | + | |
| 11 | + Implementation idea: | |
| 12 | + - dwc core implements a demultiplexing irq chip for interrupts per | |
| 13 | + endpoint. The interrupt numbers are allocated during probe and belong | |
| 14 | + to the device. If MSI provides per-endpoint interrupt this dummy | |
| 15 | + interrupt chip can be replaced with "real" interrupts. | |
| 16 | + - interrupts are requested / allocated on usb_ep_enable() and removed on | |
| 17 | + usb_ep_disable(). Worst case are 32 interrupts, the lower limit is two | |
| 18 | + for ep0/1. | |
| 19 | + - dwc3_send_gadget_ep_cmd() will sleep in wait_for_completion_timeout() | |
| 20 | + until the command completes. | |
| 21 | + - the interrupt handler is split into the following pieces: | |
| 22 | + - primary handler of the device | |
| 23 | + goes through every event and calls generic_handle_irq() for event | |
| 24 | + it. On return from generic_handle_irq() in acknowledges the event | |
| 25 | + counter so interrupt goes away (eventually). | |
| 26 | + | |
| 27 | + - threaded handler of the device | |
| 28 | + none | |
| 29 | + | |
| 30 | + - primary handler of the EP-interrupt | |
| 31 | + reads the event and tries to process it. Everything that requries | |
| 32 | + sleeping is handed over to the Thread. The event is saved in an | |
| 33 | + per-endpoint data-structure. | |
| 34 | + We probably have to pay attention not to process events once we | |
| 35 | + handed something to thread so we don't process event X prio Y | |
| 36 | + where X > Y. | |
| 37 | + | |
| 38 | + - threaded handler of the EP-interrupt | |
| 39 | + handles the remaining EP work which might sleep such as waiting | |
| 40 | + for command completion. | |
| 41 | + | |
| 42 | + Latency: | |
| 43 | + There should be no increase in latency since the interrupt-thread has a | |
| 44 | + high priority and will be run before an average task in user land | |
| 45 | + (except the user changed priorities). | |
| @@ -439,10 +439,10 @@ cause autosuspends to fail with -EBUSY if the driver needs to use the · 438 unmodified lines | ||
| 439 | 439 | device. |
| 440 | 440 | |
| 441 | 441 | External suspend calls should never be allowed to fail in this way, |
| 442 | −only autosuspend calls. The driver can tell them apart by checking | |
| 443 | −the PM_EVENT_AUTO bit in the message.event argument to the suspend | |
| 444 | −method; this bit will be set for internal PM events (autosuspend) and | |
| 445 | −clear for external PM events. | |
| 442 | +only autosuspend calls. The driver can tell them apart by applying | |
| 443 | +the PMSG_IS_AUTO() macro to the message argument to the suspend | |
| 444 | +method; it will return True for internal PM events (autosuspend) and | |
| 445 | +False for external PM events. | |
| 446 | 446 | |
| 447 | 447 | |
| 448 | 448 | Mutual exclusion |
| @@ -487,3 +487,29 @@ succeed, it may still remain active and thus cause the system to · 38 unmodified lines | ||
| 487 | 487 | resume as soon as the system suspend is complete. Or the remote |
| 488 | 488 | wakeup may fail and get lost. Which outcome occurs depends on timing |
| 489 | 489 | and on the hardware and firmware design. |
| 490 | + | |
| 491 | + | |
| 492 | + xHCI hardware link PM | |
| 493 | + --------------------- | |
| 494 | + | |
| 495 | +xHCI host controller provides hardware link power management to usb2.0 | |
| 496 | +(xHCI 1.0 feature) and usb3.0 devices which support link PM. By | |
| 497 | +enabling hardware LPM, the host can automatically put the device into | |
| 498 | +lower power state(L1 for usb2.0 devices, or U1/U2 for usb3.0 devices), | |
| 499 | +which state device can enter and resume very quickly. | |
| 500 | + | |
| 501 | +The user interface for controlling USB2 hardware LPM is located in the | |
| 502 | +power/ subdirectory of each USB device's sysfs directory, that is, in | |
| 503 | +/sys/bus/usb/devices/.../power/ where "..." is the device's ID. The | |
| 504 | +relevant attribute files is usb2_hardware_lpm. | |
| 505 | + | |
| 506 | + power/usb2_hardware_lpm | |
| 507 | + | |
| 508 | + When a USB2 device which support LPM is plugged to a | |
| 509 | + xHCI host root hub which support software LPM, the | |
| 510 | + host will run a software LPM test for it; if the device | |
| 511 | + enters L1 state and resume successfully and the host | |
| 512 | + supports USB2 hardware LPM, this file will show up and | |
| 513 | + driver will enable hardware LPM for the device. You | |
| 514 | + can write y/Y/1 or n/N/0 to the file to enable/disable | |
| 515 | + USB2 hardware LPM manually. This is for test purpose mainly. | |
File renamed without changes.
| @@ -8,6 +8,7 @@ xxxx vend:prod · 7 unmodified lines | ||
| 8 | 8 | ---- |
| 9 | 9 | spca501 0000:0000 MystFromOri Unknown Camera |
| 10 | 10 | spca508 0130:0130 Clone Digital Webcam 11043 |
| 11 | +zc3xx 03f0:1b07 HP Premium Starter Cam | |
| 11 | 12 | m5602 0402:5602 ALi Video Camera Controller |
| 12 | 13 | spca501 040a:0002 Kodak DVC-325 |
| 13 | 14 | spca500 040a:0300 Kodak EZ200 |
| @@ -190,6 +191,7 @@ ov519 05a9:0519 OV519 Microphone · 176 unmodified lines | ||
| 190 | 191 | ov519 05a9:0530 OmniVision |
| 191 | 192 | ov519 05a9:2800 OmniVision SuperCAM |
| 192 | 193 | ov519 05a9:4519 Webcam Classic |
| 194 | +ov534_9 05a9:8065 OmniVision test kit ov538+ov9712 | |
| 193 | 195 | ov519 05a9:8519 OmniVision |
| 194 | 196 | ov519 05a9:a511 D-Link USB Digital Video Camera |
| 195 | 197 | ov519 05a9:a518 D-Link DSB-C310 Webcam |
| @@ -199,6 +201,8 @@ gl860 05e3:0503 Genesys Logic PC Camera · 3 unmodified lines | ||
| 199 | 201 | gl860 05e3:f191 Genesys Logic PC Camera |
| 200 | 202 | spca561 060b:a001 Maxell Compact Pc PM3 |
| 201 | 203 | zc3xx 0698:2003 CTX M730V built in |
| 204 | +topro 06a2:0003 TP6800 PC Camera, CmoX CX0342 webcam | |
| 205 | +topro 06a2:6810 Creative Qmax | |
| 202 | 206 | nw80x 06a5:0000 Typhoon Webcam 100 USB |
| 203 | 207 | nw80x 06a5:d001 Divio based webcams |
| 204 | 208 | nw80x 06a5:d800 Divio Chicony TwinkleCam, Trust SpaceCam |
| @@ -70,10 +70,11 @@ Events · 69 unmodified lines | ||
| 70 | 70 | The OMAP 3 ISP driver does support the V4L2 event interface on CCDC and |
| 71 | 71 | statistics (AEWB, AF and histogram) subdevs. |
| 72 | 72 | |
| 73 | −The CCDC subdev produces V4L2_EVENT_OMAP3ISP_HS_VS type event on HS_VS | |
| 74 | −interrupt which is used to signal frame start. The event is triggered exactly | |
| 75 | −when the reception of the first line of the frame starts in the CCDC module. | |
| 76 | −The event can be subscribed on the CCDC subdev. | |
| 73 | +The CCDC subdev produces V4L2_EVENT_FRAME_SYNC type event on HS_VS | |
| 74 | +interrupt which is used to signal frame start. Earlier version of this | |
| 75 | +driver used V4L2_EVENT_OMAP3ISP_HS_VS for this purpose. The event is | |
| 76 | +triggered exactly when the reception of the first line of the frame starts | |
| 77 | +in the CCDC module. The event can be subscribed on the CCDC subdev. | |
| 77 | 78 | |
| 78 | 79 | (When using parallel interface one must pay account to correct configuration |
| 79 | 80 | of the VS signal polarity. This is automatically correct when using the serial |
| @@ -285,11 +285,11 @@ implement g_volatile_ctrl like this: · 284 unmodified lines | ||
| 285 | 285 | Note that you use the 'new value' union as well in g_volatile_ctrl. In general |
| 286 | 286 | controls that need to implement g_volatile_ctrl are read-only controls. |
| 287 | 287 | |
| 288 | −To mark a control as volatile you have to set the is_volatile flag: | |
| 288 | +To mark a control as volatile you have to set V4L2_CTRL_FLAG_VOLATILE: | |
| 289 | 289 | |
| 290 | 290 | ctrl = v4l2_ctrl_new_std(&sd->ctrl_handler, ...); |
| 291 | 291 | if (ctrl) |
| 292 | − ctrl->is_volatile = 1; | |
| 292 | + ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; | |
| 293 | 293 | |
| 294 | 294 | For try/s_ctrl the new values (i.e. as passed by the user) are filled in and |
| 295 | 295 | you can modify them in try_ctrl or set them in s_ctrl. The 'cur' union |
| @@ -367,8 +367,7 @@ Driver specific controls can be created using v4l2_ctrl_new_custom(): · 71 unmodified lines | ||
| 367 | 367 | The last argument is the priv pointer which can be set to driver-specific |
| 368 | 368 | private data. |
| 369 | 369 | |
| 370 | −The v4l2_ctrl_config struct also has fields to set the is_private and is_volatile | |
| 371 | −flags. | |
| 370 | +The v4l2_ctrl_config struct also has a field to set the is_private flag. | |
| 372 | 371 | |
| 373 | 372 | If the name field is not set, then the framework will assume this is a standard |
| 374 | 373 | control and will fill in the name, type and flags fields accordingly. |
| @@ -496,18 +495,20 @@ Handling autogain/gain-type Controls with Auto Clusters · 121 unmodified lines | ||
| 496 | 495 | |
| 497 | 496 | A common type of control cluster is one that handles 'auto-foo/foo'-type |
| 498 | 497 | controls. Typical examples are autogain/gain, autoexposure/exposure, |
| 499 | −autowhitebalance/red balance/blue balance. In all cases you have one controls | |
| 498 | +autowhitebalance/red balance/blue balance. In all cases you have one control | |
| 500 | 499 | that determines whether another control is handled automatically by the hardware, |
| 501 | 500 | or whether it is under manual control from the user. |
| 502 | 501 | |
| 503 | 502 | If the cluster is in automatic mode, then the manual controls should be |
| 504 | −marked inactive. When the volatile controls are read the g_volatile_ctrl | |
| 505 | −operation should return the value that the hardware's automatic mode set up | |
| 506 | −automatically. | |
| 503 | +marked inactive and volatile. When the volatile controls are read the | |
| 504 | +g_volatile_ctrl operation should return the value that the hardware's automatic | |
| 505 | +mode set up automatically. | |
| 507 | 506 | |
| 508 | 507 | If the cluster is put in manual mode, then the manual controls should become |
| 509 | −active again and the is_volatile flag should be ignored (so g_volatile_ctrl is | |
| 510 | −no longer called while in manual mode). | |
| 508 | +active again and the volatile flag is cleared (so g_volatile_ctrl is no longer | |
| 509 | +called while in manual mode). In addition just before switching to manual mode | |
| 510 | +the current values as determined by the auto mode are copied as the new manual | |
| 511 | +values. | |
| 511 | 512 | |
| 512 | 513 | Finally the V4L2_CTRL_FLAG_UPDATE should be set for the auto control since |
| 513 | 514 | changing that control affects the control flags of the manual controls. |
| @@ -520,7 +521,11 @@ void v4l2_ctrl_auto_cluster(unsigned ncontrols, struct v4l2_ctrl **controls, · 6 unmodified lines | ||
| 520 | 521 | |
| 521 | 522 | The first two arguments are identical to v4l2_ctrl_cluster. The third argument |
| 522 | 523 | tells the framework which value switches the cluster into manual mode. The |
| 523 | −last argument will optionally set the is_volatile flag for the non-auto controls. | |
| 524 | +last argument will optionally set V4L2_CTRL_FLAG_VOLATILE for the non-auto controls. | |
| 525 | +If it is false, then the manual controls are never volatile. You would typically | |
| 526 | +use that if the hardware does not give you the option to read back to values as | |
| 527 | +determined by the auto mode (e.g. if autogain is on, the hardware doesn't allow | |
| 528 | +you to obtain the current gain value). | |
| 524 | 529 | |
| 525 | 530 | The first control of the cluster is assumed to be the 'auto' control. |
| 526 | 531 | |
| @@ -681,16 +686,6 @@ if there are no controls at all. · 154 unmodified lines | ||
| 681 | 686 | count if nothing was done yet. If it is less than count then only the controls |
| 682 | 687 | up to error_idx-1 were successfully applied. |
| 683 | 688 | |
| 684 | −3) When attempting to read a button control the framework will return -EACCES | |
| 685 | −instead of -EINVAL as stated in the spec. It seems to make more sense since | |
| 686 | −button controls are write-only controls. | |
| 687 | − | |
| 688 | −4) Attempting to write to a read-only control will return -EACCES instead of | |
| 689 | −-EINVAL as the spec says. | |
| 690 | − | |
| 691 | −5) The spec does not mention what should happen when you try to set/get a | |
| 692 | −control class controls. The framework will return -EACCES. | |
| 693 | − | |
| 694 | 689 | |
| 695 | 690 | Proposals for Extensions |
| 696 | 691 | ======================== |
| @@ -703,9 +698,3 @@ decimal. Useful for e.g. video_mute_yuv. · 6 unmodified lines | ||
| 703 | 698 | 2) It is possible to mark in the controls array which controls have been |
| 704 | 699 | successfully written and which failed by for example adding a bit to the |
| 705 | 700 | control ID. Not sure if it is worth the effort, though. |
| 706 | − | |
| 707 | −3) Trying to set volatile inactive controls should result in -EACCESS. | |
| 708 | − | |
| 709 | −4) Add a new flag to mark volatile controls. Any application that wants | |
| 710 | −to store the state of the controls can then skip volatile inactive controls. | |
| 711 | −Currently it is not possible to detect such controls. | |
| @@ -175,10 +175,30 @@ Parameters: vcpu id (apic id on x86) · 174 unmodified lines | ||
| 175 | 175 | Returns: vcpu fd on success, -1 on error |
| 176 | 176 | |
| 177 | 177 | This API adds a vcpu to a virtual machine. The vcpu id is a small integer |
| 178 | −in the range [0, max_vcpus). You can use KVM_CAP_NR_VCPUS of the | |
| 179 | −KVM_CHECK_EXTENSION ioctl() to determine the value for max_vcpus at run-time. | |
| 178 | +in the range [0, max_vcpus). | |
| 179 | + | |
| 180 | +The recommended max_vcpus value can be retrieved using the KVM_CAP_NR_VCPUS of | |
| 181 | +the KVM_CHECK_EXTENSION ioctl() at run-time. | |
| 182 | +The maximum possible value for max_vcpus can be retrieved using the | |
| 183 | +KVM_CAP_MAX_VCPUS of the KVM_CHECK_EXTENSION ioctl() at run-time. | |
| 184 | + | |
| 180 | 185 | If the KVM_CAP_NR_VCPUS does not exist, you should assume that max_vcpus is 4 |
| 181 | 186 | cpus max. |
| 187 | +If the KVM_CAP_MAX_VCPUS does not exist, you should assume that max_vcpus is | |
| 188 | +same as the value returned from KVM_CAP_NR_VCPUS. | |
| 189 | + | |
| 190 | +On powerpc using book3s_hv mode, the vcpus are mapped onto virtual | |
| 191 | +threads in one or more virtual CPU cores. (This is because the | |
| 192 | +hardware requires all the hardware threads in a CPU core to be in the | |
| 193 | +same partition.) The KVM_CAP_PPC_SMT capability indicates the number | |
| 194 | +of vcpus per virtual core (vcore). The vcore id is obtained by | |
| 195 | +dividing the vcpu id by the number of vcpus per vcore. The vcpus in a | |
| 196 | +given vcore will always be in the same physical core as each other | |
| 197 | +(though that might be a different physical core from time to time). | |
| 198 | +Userspace can control the threading (SMT) mode of the guest by its | |
| 199 | +allocation of vcpu ids. For example, if userspace wants | |
| 200 | +single-threaded guest vcpus, it should make all vcpu ids be a multiple | |
| 201 | +of the number of vcpus per vcore. | |
| 182 | 202 | |
| 183 | 203 | On powerpc using book3s_hv mode, the vcpus are mapped onto virtual |
| 184 | 204 | threads in one or more virtual CPU cores. (This is because the |
| @@ -1633,3 +1653,50 @@ developer registration required to access it). · 1448 unmodified lines | ||
| 1633 | 1653 | char padding[256]; |
| 1634 | 1654 | }; |
| 1635 | 1655 | }; |
| 1656 | + | |
| 1657 | +6. Capabilities that can be enabled | |
| 1658 | + | |
| 1659 | +There are certain capabilities that change the behavior of the virtual CPU when | |
| 1660 | +enabled. To enable them, please see section 4.37. Below you can find a list of | |
| 1661 | +capabilities and what their effect on the vCPU is when enabling them. | |
| 1662 | + | |
| 1663 | +The following information is provided along with the description: | |
| 1664 | + | |
| 1665 | + Architectures: which instruction set architectures provide this ioctl. | |
| 1666 | + x86 includes both i386 and x86_64. | |
| 1667 | + | |
| 1668 | + Parameters: what parameters are accepted by the capability. | |
| 1669 | + | |
| 1670 | + Returns: the return value. General error numbers (EBADF, ENOMEM, EINVAL) | |
| 1671 | + are not detailed, but errors with specific meanings are. | |
| 1672 | + | |
| 1673 | +6.1 KVM_CAP_PPC_OSI | |
| 1674 | + | |
| 1675 | +Architectures: ppc | |
| 1676 | +Parameters: none | |
| 1677 | +Returns: 0 on success; -1 on error | |
| 1678 | + | |
| 1679 | +This capability enables interception of OSI hypercalls that otherwise would | |
| 1680 | +be treated as normal system calls to be injected into the guest. OSI hypercalls | |
| 1681 | +were invented by Mac-on-Linux to have a standardized communication mechanism | |
| 1682 | +between the guest and the host. | |
| 1683 | + | |
| 1684 | +When this capability is enabled, KVM_EXIT_OSI can occur. | |
| 1685 | + | |
| 1686 | +6.2 KVM_CAP_PPC_PAPR | |
| 1687 | + | |
| 1688 | +Architectures: ppc | |
| 1689 | +Parameters: none | |
| 1690 | +Returns: 0 on success; -1 on error | |
| 1691 | + | |
| 1692 | +This capability enables interception of PAPR hypercalls. PAPR hypercalls are | |
| 1693 | +done using the hypercall instruction "sc 1". | |
| 1694 | + | |
| 1695 | +It also sets the guest privilege level to "supervisor" mode. Usually the guest | |
| 1696 | +runs in "hypervisor" privilege mode with a few missing features. | |
| 1697 | + | |
| 1698 | +In addition to the above, it changes the semantics of SDR1. In this mode, the | |
| 1699 | +HTAB address part of SDR1 contains an HVA instead of a GPA, as PAPR keeps the | |
| 1700 | +HTAB invisible to the guest. | |
| 1701 | + | |
| 1702 | +When this capability is enabled, KVM_EXIT_PAPR_HCALL can occur. | |
| @@ -134,13 +134,13 @@ · 133 unmodified lines | ||
| 134 | 134 | |
| 135 | 135 | ______________________________________________________________________ |
| 136 | 136 | |
| 137 | − 11.. IInnttrroodduuccttiioonn | |
| 137 | + 1. Introduction | |
| 138 | 138 | |
| 139 | 139 | Welcome to User Mode Linux. It's going to be fun. |
| 140 | 140 | |
| 141 | 141 | |
| 142 | 142 | |
| 143 | − 11..11.. HHooww iiss UUsseerr MMooddee LLiinnuuxx DDiiffffeerreenntt?? | |
| 143 | + 1.1. How is User Mode Linux Different? | |
| 144 | 144 | |
| 145 | 145 | Normally, the Linux Kernel talks straight to your hardware (video |
| 146 | 146 | card, keyboard, hard drives, etc), and any programs which run ask the |
| @@ -181,7 +181,7 @@ · 34 unmodified lines | ||
| 181 | 181 | |
| 182 | 182 | |
| 183 | 183 | |
| 184 | − 11..22.. WWhhyy WWoouulldd II WWaanntt UUsseerr MMooddee LLiinnuuxx?? | |
| 184 | + 1.2. Why Would I Want User Mode Linux? | |
| 185 | 185 | |
| 186 | 186 | |
| 187 | 187 | 1. If User Mode Linux crashes, your host kernel is still fine. |
| @@ -206,12 +206,12 @@ · 18 unmodified lines | ||
| 206 | 206 | |
| 207 | 207 | |
| 208 | 208 | |
| 209 | − 22.. CCoommppiilliinngg tthhee kkeerrnneell aanndd mmoodduulleess | |
| 209 | + 2. Compiling the kernel and modules | |
| 210 | 210 | |
| 211 | 211 | |
| 212 | 212 | |
| 213 | 213 | |
| 214 | − 22..11.. CCoommppiilliinngg tthhee kkeerrnneell | |
| 214 | + 2.1. Compiling the kernel | |
| 215 | 215 | |
| 216 | 216 | |
| 217 | 217 | Compiling the user mode kernel is just like compiling any other |
| @@ -322,7 +322,7 @@ · 104 unmodified lines | ||
| 322 | 322 | bug fixes and enhancements that have gone into subsequent releases. |
| 323 | 323 | |
| 324 | 324 | |
| 325 | − 22..22.. CCoommppiilliinngg aanndd iinnssttaalllliinngg kkeerrnneell mmoodduulleess | |
| 325 | + 2.2. Compiling and installing kernel modules | |
| 326 | 326 | |
| 327 | 327 | UML modules are built in the same way as the native kernel (with the |
| 328 | 328 | exception of the 'ARCH=um' that you always need for UML): |
| @@ -386,19 +386,19 @@ · 57 unmodified lines | ||
| 386 | 386 | |
| 387 | 387 | |
| 388 | 388 | |
| 389 | − 22..33.. CCoommppiilliinngg aanndd iinnssttaalllliinngg uummll__uuttiilliittiieess | |
| 389 | + 2.3. Compiling and installing uml_utilities | |
| 390 | 390 | |
| 391 | 391 | Many features of the UML kernel require a user-space helper program, |
| 392 | 392 | so a uml_utilities package is distributed separately from the kernel |
| 393 | 393 | patch which provides these helpers. Included within this is: |
| 394 | 394 | |
| 395 | − +o port-helper - Used by consoles which connect to xterms or ports | |
| 395 | + o port-helper - Used by consoles which connect to xterms or ports | |
| 396 | 396 | |
| 397 | − +o tunctl - Configuration tool to create and delete tap devices | |
| 397 | + o tunctl - Configuration tool to create and delete tap devices | |
| 398 | 398 | |
| 399 | − +o uml_net - Setuid binary for automatic tap device configuration | |
| 399 | + o uml_net - Setuid binary for automatic tap device configuration | |
| 400 | 400 | |
| 401 | − +o uml_switch - User-space virtual switch required for daemon | |
| 401 | + o uml_switch - User-space virtual switch required for daemon | |
| 402 | 402 | transport |
| 403 | 403 | |
| 404 | 404 | The uml_utilities tree is compiled with: |
| @@ -423,11 +423,11 @@ · 18 unmodified lines | ||
| 423 | 423 | |
| 424 | 424 | |
| 425 | 425 | |
| 426 | − 33.. RRuunnnniinngg UUMMLL aanndd llooggggiinngg iinn | |
| 426 | + 3. Running UML and logging in | |
| 427 | 427 | |
| 428 | 428 | |
| 429 | 429 | |
| 430 | − 33..11.. RRuunnnniinngg UUMMLL | |
| 430 | + 3.1. Running UML | |
| 431 | 431 | |
| 432 | 432 | It runs on 2.2.15 or later, and all 2.4 kernels. |
| 433 | 433 | |
| @@ -454,7 +454,7 @@ · 20 unmodified lines | ||
| 454 | 454 | |
| 455 | 455 | |
| 456 | 456 | |
| 457 | − 33..22.. LLooggggiinngg iinn | |
| 457 | + 3.2. Logging in | |
| 458 | 458 | |
| 459 | 459 | |
| 460 | 460 | |
| @@ -468,7 +468,7 @@ · 7 unmodified lines | ||
| 468 | 468 | |
| 469 | 469 | There are a couple of other ways to log in: |
| 470 | 470 | |
| 471 | − +o On a virtual console | |
| 471 | + o On a virtual console | |
| 472 | 472 | |
| 473 | 473 | |
| 474 | 474 | |
| @@ -480,7 +480,7 @@ · 5 unmodified lines | ||
| 480 | 480 | |
| 481 | 481 | |
| 482 | 482 | |
| 483 | − +o Over the serial line | |
| 483 | + o Over the serial line | |
| 484 | 484 | |
| 485 | 485 | |
| 486 | 486 | In the boot output, find a line that looks like: |
| @@ -503,7 +503,7 @@ · 16 unmodified lines | ||
| 503 | 503 | |
| 504 | 504 | |
| 505 | 505 | |
| 506 | − +o Over the net | |
| 506 | + o Over the net | |
| 507 | 507 | |
| 508 | 508 | |
| 509 | 509 | If the network is running, then you can telnet to the virtual |
| @@ -514,13 +514,13 @@ · 4 unmodified lines | ||
| 514 | 514 | down and the process will exit. |
| 515 | 515 | |
| 516 | 516 | |
| 517 | − 33..33.. EExxaammpplleess | |
| 517 | + 3.3. Examples | |
| 518 | 518 | |
| 519 | 519 | Here are some examples of UML in action: |
| 520 | 520 | |
| 521 | − +o A login session <http://user-mode-linux.sourceforge.net/login.html> | |
| 521 | + o A login session <http://user-mode-linux.sourceforge.net/login.html> | |
| 522 | 522 | |
| 523 | − +o A virtual network <http://user-mode-linux.sourceforge.net/net.html> | |
| 523 | + o A virtual network <http://user-mode-linux.sourceforge.net/net.html> | |
| 524 | 524 | |
| 525 | 525 | |
| 526 | 526 | |
| @@ -528,12 +528,12 @@ · 1 unmodified line | ||
| 528 | 528 | |
| 529 | 529 | |
| 530 | 530 | |
| 531 | − 44.. UUMMLL oonn 22GG//22GG hhoossttss | |
| 531 | + 4. UML on 2G/2G hosts | |
| 532 | 532 | |
| 533 | 533 | |
| 534 | 534 | |
| 535 | 535 | |
| 536 | − 44..11.. IInnttrroodduuccttiioonn | |
| 536 | + 4.1. Introduction | |
| 537 | 537 | |
| 538 | 538 | |
| 539 | 539 | Most Linux machines are configured so that the kernel occupies the |
| @@ -546,7 +546,7 @@ · 6 unmodified lines | ||
| 546 | 546 | |
| 547 | 547 | |
| 548 | 548 | |
| 549 | − 44..22.. TThhee pprroobblleemm | |
| 549 | + 4.2. The problem | |
| 550 | 550 | |
| 551 | 551 | |
| 552 | 552 | The prebuilt UML binaries on this site will not run on 2G/2G hosts |
| @@ -558,7 +558,7 @@ · 5 unmodified lines | ||
| 558 | 558 | |
| 559 | 559 | |
| 560 | 560 | |
| 561 | − 44..33.. TThhee ssoolluuttiioonn | |
| 561 | + 4.3. The solution | |
| 562 | 562 | |
| 563 | 563 | |
| 564 | 564 | The fix for this is to rebuild UML from source after enabling |
| @@ -576,7 +576,7 @@ · 11 unmodified lines | ||
| 576 | 576 | |
| 577 | 577 | |
| 578 | 578 | |
| 579 | − 55.. SSeettttiinngg uupp sseerriiaall lliinneess aanndd ccoonnssoolleess | |
| 579 | + 5. Setting up serial lines and consoles | |
| 580 | 580 | |
| 581 | 581 | |
| 582 | 582 | It is possible to attach UML serial lines and consoles to many types |
| @@ -586,12 +586,12 @@ · 3 unmodified lines | ||
| 586 | 586 | You can attach them to host ptys, ttys, file descriptors, and ports. |
| 587 | 587 | This allows you to do things like |
| 588 | 588 | |
| 589 | − +o have a UML console appear on an unused host console, | |
| 589 | + o have a UML console appear on an unused host console, | |
| 590 | 590 | |
| 591 | − +o hook two virtual machines together by having one attach to a pty | |
| 591 | + o hook two virtual machines together by having one attach to a pty | |
| 592 | 592 | and having the other attach to the corresponding tty |
| 593 | 593 | |
| 594 | − +o make a virtual machine accessible from the net by attaching a | |
| 594 | + o make a virtual machine accessible from the net by attaching a | |
| 595 | 595 | console to a port on the host. |
| 596 | 596 | |
| 597 | 597 | |
| @@ -599,7 +599,7 @@ · 1 unmodified line | ||
| 599 | 599 | |
| 600 | 600 | |
| 601 | 601 | |
| 602 | − 55..11.. SSppeecciiffyyiinngg tthhee ddeevviiccee | |
| 602 | + 5.1. Specifying the device | |
| 603 | 603 | |
| 604 | 604 | Devices are specified with "con" or "ssl" (console or serial line, |
| 605 | 605 | respectively), optionally with a device number if you are talking |
| @@ -626,13 +626,13 @@ · 20 unmodified lines | ||
| 626 | 626 | |
| 627 | 627 | |
| 628 | 628 | |
| 629 | − 55..22.. SSppeecciiffyyiinngg tthhee cchhaannnneell | |
| 629 | + 5.2. Specifying the channel | |
| 630 | 630 | |
| 631 | 631 | There are a number of different types of channels to attach a UML |
| 632 | 632 | device to, each with a different way of specifying exactly what to |
| 633 | 633 | attach to. |
| 634 | 634 | |
| 635 | − +o pseudo-terminals - device=pty pts terminals - device=pts | |
| 635 | + o pseudo-terminals - device=pty pts terminals - device=pts | |
| 636 | 636 | |
| 637 | 637 | |
| 638 | 638 | This will cause UML to allocate a free host pseudo-terminal for the |
| @@ -640,20 +640,20 @@ · 1 unmodified line | ||
| 640 | 640 | log. You access it by attaching a terminal program to the |
| 641 | 641 | corresponding tty: |
| 642 | 642 | |
| 643 | − +o screen /dev/pts/n | |
| 643 | + o screen /dev/pts/n | |
| 644 | 644 | |
| 645 | − +o screen /dev/ttyxx | |
| 645 | + o screen /dev/ttyxx | |
| 646 | 646 | |
| 647 | − +o minicom -o -p /dev/ttyxx - minicom seems not able to handle pts | |
| 647 | + o minicom -o -p /dev/ttyxx - minicom seems not able to handle pts | |
| 648 | 648 | devices |
| 649 | 649 | |
| 650 | − +o kermit - start it up, 'open' the device, then 'connect' | |
| 650 | + o kermit - start it up, 'open' the device, then 'connect' | |
| 651 | 651 | |
| 652 | 652 | |
| 653 | 653 | |
| 654 | 654 | |
| 655 | 655 | |
| 656 | − +o terminals - device=tty:tty device file | |
| 656 | + o terminals - device=tty:tty device file | |
| 657 | 657 | |
| 658 | 658 | |
| 659 | 659 | This will make UML attach the device to the specified tty (i.e |
| @@ -672,7 +672,7 @@ · 12 unmodified lines | ||
| 672 | 672 | |
| 673 | 673 | |
| 674 | 674 | |
| 675 | − +o xterms - device=xterm | |
| 675 | + o xterms - device=xterm | |
| 676 | 676 | |
| 677 | 677 | |
| 678 | 678 | UML will run an xterm and the device will be attached to it. |
| @@ -681,7 +681,7 @@ · 2 unmodified lines | ||
| 681 | 681 | |
| 682 | 682 | |
| 683 | 683 | |
| 684 | − +o Port - device=port:port number | |
| 684 | + o Port - device=port:port number | |
| 685 | 685 | |
| 686 | 686 | |
| 687 | 687 | This will attach the UML devices to the specified host port. |
| @@ -725,7 +725,7 @@ · 37 unmodified lines | ||
| 725 | 725 | |
| 726 | 726 | |
| 727 | 727 | |
| 728 | − +o already-existing file descriptors - device=file descriptor | |
| 728 | + o already-existing file descriptors - device=file descriptor | |
| 729 | 729 | |
| 730 | 730 | |
| 731 | 731 | If you set up a file descriptor on the UML command line, you can |
| @@ -743,7 +743,7 @@ · 11 unmodified lines | ||
| 743 | 743 | |
| 744 | 744 | |
| 745 | 745 | |
| 746 | − +o Nothing - device=null | |
| 746 | + o Nothing - device=null | |
| 747 | 747 | |
| 748 | 748 | |
| 749 | 749 | This allows the device to be opened, in contrast to 'none', but |
| @@ -754,7 +754,7 @@ · 4 unmodified lines | ||
| 754 | 754 | |
| 755 | 755 | |
| 756 | 756 | |
| 757 | − +o None - device=none | |
| 757 | + o None - device=none | |
| 758 | 758 | |
| 759 | 759 | |
| 760 | 760 | This causes the device to disappear. |
| @@ -770,7 +770,7 @@ · 9 unmodified lines | ||
| 770 | 770 | |
| 771 | 771 | |
| 772 | 772 | |
| 773 | − will cause serial line 3 to accept input on the host's /dev/tty3 and | |
| 773 | + will cause serial line 3 to accept input on the host's /dev/tty2 and | |
| 774 | 774 | display output on an xterm. That's a silly example - the most common |
| 775 | 775 | use of this syntax is to reattach the main console to stdin and stdout |
| 776 | 776 | as shown above. |
| @@ -785,7 +785,7 @@ · 8 unmodified lines | ||
| 785 | 785 | |
| 786 | 786 | |
| 787 | 787 | |
| 788 | − 55..33.. EExxaammpplleess | |
| 788 | + 5.3. Examples | |
| 789 | 789 | |
| 790 | 790 | There are a number of interesting things you can do with this |
| 791 | 791 | capability. |
| @@ -838,7 +838,7 @@ · 46 unmodified lines | ||
| 838 | 838 | prompt of the other virtual machine. |
| 839 | 839 | |
| 840 | 840 | |
| 841 | − 66.. SSeettttiinngg uupp tthhee nneettwwoorrkk | |
| 841 | + 6. Setting up the network | |
| 842 | 842 | |
| 843 | 843 | |
| 844 | 844 | |
| @@ -858,19 +858,19 @@ · 13 unmodified lines | ||
| 858 | 858 | There are currently five transport types available for a UML virtual |
| 859 | 859 | machine to exchange packets with other hosts: |
| 860 | 860 | |
| 861 | − +o ethertap | |
| 861 | + o ethertap | |
| 862 | 862 | |
| 863 | − +o TUN/TAP | |
| 863 | + o TUN/TAP | |
| 864 | 864 | |
| 865 | − +o Multicast | |
| 865 | + o Multicast | |
| 866 | 866 | |
| 867 | − +o a switch daemon | |
| 867 | + o a switch daemon | |
| 868 | 868 | |
| 869 | − +o slip | |
| 869 | + o slip | |
| 870 | 870 | |
| 871 | − +o slirp | |
| 871 | + o slirp | |
| 872 | 872 | |
| 873 | − +o pcap | |
| 873 | + o pcap | |
| 874 | 874 | |
| 875 | 875 | The TUN/TAP, ethertap, slip, and slirp transports allow a UML |
| 876 | 876 | instance to exchange packets with the host. They may be directed |
| @@ -893,28 +893,28 @@ · 16 unmodified lines | ||
| 893 | 893 | With so many host transports, which one should you use? Here's when |
| 894 | 894 | you should use each one: |
| 895 | 895 | |
| 896 | − +o ethertap - if you want access to the host networking and it is | |
| 896 | + o ethertap - if you want access to the host networking and it is | |
| 897 | 897 | running 2.2 |
| 898 | 898 | |
| 899 | − +o TUN/TAP - if you want access to the host networking and it is | |
| 899 | + o TUN/TAP - if you want access to the host networking and it is | |
| 900 | 900 | running 2.4. Also, the TUN/TAP transport is able to use a |
| 901 | 901 | preconfigured device, allowing it to avoid using the setuid uml_net |
| 902 | 902 | helper, which is a security advantage. |
| 903 | 903 | |
| 904 | − +o Multicast - if you want a purely virtual network and you don't want | |
| 904 | + o Multicast - if you want a purely virtual network and you don't want | |
| 905 | 905 | to set up anything but the UML |
| 906 | 906 | |
| 907 | − +o a switch daemon - if you want a purely virtual network and you | |
| 907 | + o a switch daemon - if you want a purely virtual network and you | |
| 908 | 908 | don't mind running the daemon in order to get somewhat better |
| 909 | 909 | performance |
| 910 | 910 | |
| 911 | − +o slip - there is no particular reason to run the slip backend unless | |
| 911 | + o slip - there is no particular reason to run the slip backend unless | |
| 912 | 912 | ethertap and TUN/TAP are just not available for some reason |
| 913 | 913 | |
| 914 | − +o slirp - if you don't have root access on the host to setup | |
| 914 | + o slirp - if you don't have root access on the host to setup | |
| 915 | 915 | networking, or if you don't want to allocate an IP to your UML |
| 916 | 916 | |
| 917 | − +o pcap - not much use for actual network connectivity, but great for | |
| 917 | + o pcap - not much use for actual network connectivity, but great for | |
| 918 | 918 | monitoring traffic on the host |
| 919 | 919 | |
| 920 | 920 | Ethertap is available on 2.4 and works fine. TUN/TAP is preferred |
| @@ -926,7 +926,7 @@ · 5 unmodified lines | ||
| 926 | 926 | exploit the helper's root privileges. |
| 927 | 927 | |
| 928 | 928 | |
| 929 | − 66..11.. GGeenneerraall sseettuupp | |
| 929 | + 6.1. General setup | |
| 930 | 930 | |
| 931 | 931 | First, you must have the virtual network enabled in your UML. If are |
| 932 | 932 | running a prebuilt kernel from this site, everything is already |
| @@ -995,7 +995,7 @@ · 62 unmodified lines | ||
| 995 | 995 | |
| 996 | 996 | |
| 997 | 997 | |
| 998 | − 66..22.. UUsseerrssppaaccee ddaaeemmoonnss | |
| 998 | + 6.2. Userspace daemons | |
| 999 | 999 | |
| 1000 | 1000 | You will likely need the setuid helper, or the switch daemon, or both. |
| 1001 | 1001 | They are both installed with the RPM and deb, so if you've installed |
| @@ -1011,7 +1011,7 @@ · 9 unmodified lines | ||
| 1011 | 1011 | |
| 1012 | 1012 | |
| 1013 | 1013 | |
| 1014 | − 66..33.. SSppeecciiffyyiinngg eetthheerrnneett aaddddrreesssseess | |
| 1014 | + 6.3. Specifying ethernet addresses | |
| 1015 | 1015 | |
| 1016 | 1016 | Below, you will see that the TUN/TAP, ethertap, and daemon interfaces |
| 1017 | 1017 | allow you to specify hardware addresses for the virtual ethernet |
| @@ -1023,11 +1023,11 @@ · 5 unmodified lines | ||
| 1023 | 1023 | sufficient to guarantee a unique hardware address for the device. A |
| 1024 | 1024 | couple of exceptions are: |
| 1025 | 1025 | |
| 1026 | − +o Another set of virtual ethernet devices are on the same network and | |
| 1026 | + o Another set of virtual ethernet devices are on the same network and | |
| 1027 | 1027 | they are assigned hardware addresses using a different scheme which |
| 1028 | 1028 | may conflict with the UML IP address-based scheme |
| 1029 | 1029 | |
| 1030 | − +o You aren't going to use the device for IP networking, so you don't | |
| 1030 | + o You aren't going to use the device for IP networking, so you don't | |
| 1031 | 1031 | assign the device an IP address |
| 1032 | 1032 | |
| 1033 | 1033 | If you let the driver provide the hardware address, you should make |
| @@ -1049,7 +1049,7 @@ · 15 unmodified lines | ||
| 1049 | 1049 | |
| 1050 | 1050 | |
| 1051 | 1051 | |
| 1052 | − 66..44.. UUMMLL iinntteerrffaaccee sseettuupp | |
| 1052 | + 6.4. UML interface setup | |
| 1053 | 1053 | |
| 1054 | 1054 | Once the network devices have been described on the command line, you |
| 1055 | 1055 | should boot UML and log in. |
| @@ -1131,7 +1131,7 @@ · 75 unmodified lines | ||
| 1131 | 1131 | |
| 1132 | 1132 | |
| 1133 | 1133 | |
| 1134 | − 66..55.. MMuullttiiccaasstt | |
| 1134 | + 6.5. Multicast | |
| 1135 | 1135 | |
| 1136 | 1136 | The simplest way to set up a virtual network between multiple UMLs is |
| 1137 | 1137 | to use the mcast transport. This was written by Harald Welte and is |
| @@ -1194,7 +1194,7 @@ · 56 unmodified lines | ||
| 1194 | 1194 | |
| 1195 | 1195 | |
| 1196 | 1196 | |
| 1197 | − 66..66.. TTUUNN//TTAAPP wwiitthh tthhee uummll__nneett hheellppeerr | |
| 1197 | + 6.6. TUN/TAP with the uml_net helper | |
| 1198 | 1198 | |
| 1199 | 1199 | TUN/TAP is the preferred mechanism on 2.4 to exchange packets with the |
| 1200 | 1200 | host. The TUN/TAP backend has been in UML since 2.4.9-3um. |
| @@ -1247,10 +1247,10 @@ · 46 unmodified lines | ||
| 1247 | 1247 | There are a couple potential problems with running the TUN/TAP |
| 1248 | 1248 | transport on a 2.4 host kernel |
| 1249 | 1249 | |
| 1250 | − +o TUN/TAP seems not to work on 2.4.3 and earlier. Upgrade the host | |
| 1250 | + o TUN/TAP seems not to work on 2.4.3 and earlier. Upgrade the host | |
| 1251 | 1251 | kernel or use the ethertap transport. |
| 1252 | 1252 | |
| 1253 | − +o With an upgraded kernel, TUN/TAP may fail with | |
| 1253 | + o With an upgraded kernel, TUN/TAP may fail with | |
| 1254 | 1254 | |
| 1255 | 1255 | |
| 1256 | 1256 | File descriptor in bad state |
| @@ -1269,7 +1269,7 @@ · 12 unmodified lines | ||
| 1269 | 1269 | |
| 1270 | 1270 | |
| 1271 | 1271 | |
| 1272 | − 66..77.. TTUUNN//TTAAPP wwiitthh aa pprreeccoonnffiigguurreedd ttaapp ddeevviiccee | |
| 1272 | + 6.7. TUN/TAP with a preconfigured tap device | |
| 1273 | 1273 | |
| 1274 | 1274 | If you prefer not to have UML use uml_net (which is somewhat |
| 1275 | 1275 | insecure), with UML 2.4.17-11, you can set up a TUN/TAP device |
| @@ -1277,7 +1277,7 @@ · 1 unmodified line | ||
| 1277 | 1277 | there is no need for root assistance. Setting up the device is done |
| 1278 | 1278 | as follows: |
| 1279 | 1279 | |
| 1280 | − +o Create the device with tunctl (available from the UML utilities | |
| 1280 | + o Create the device with tunctl (available from the UML utilities | |
| 1281 | 1281 | tarball) |
| 1282 | 1282 | |
| 1283 | 1283 | |
| @@ -1291,7 +1291,7 @@ · 7 unmodified lines | ||
| 1291 | 1291 | where uid is the user id or username that UML will be run as. This |
| 1292 | 1292 | will tell you what device was created. |
| 1293 | 1293 | |
| 1294 | − +o Configure the device IP (change IP addresses and device name to | |
| 1294 | + o Configure the device IP (change IP addresses and device name to | |
| 1295 | 1295 | suit) |
| 1296 | 1296 | |
| 1297 | 1297 | |
| @@ -1303,7 +1303,7 @@ · 5 unmodified lines | ||
| 1303 | 1303 | |
| 1304 | 1304 | |
| 1305 | 1305 | |
| 1306 | − +o Set up routing and arping if desired - this is my recipe, there are | |
| 1306 | + o Set up routing and arping if desired - this is my recipe, there are | |
| 1307 | 1307 | other ways of doing the same thing |
| 1308 | 1308 | |
| 1309 | 1309 | |
| @@ -1338,7 +1338,7 @@ · 28 unmodified lines | ||
| 1338 | 1338 | utility which reads the information from a config file and sets up |
| 1339 | 1339 | devices at boot time. |
| 1340 | 1340 | |
| 1341 | − +o Rather than using up two IPs and ARPing for one of them, you can | |
| 1341 | + o Rather than using up two IPs and ARPing for one of them, you can | |
| 1342 | 1342 | also provide direct access to your LAN by the UML by using a |
| 1343 | 1343 | bridge. |
| 1344 | 1344 | |
| @@ -1417,7 +1417,7 @@ · 72 unmodified lines | ||
| 1417 | 1417 | Note that 'br0' should be setup using ifconfig with the existing IP |
| 1418 | 1418 | address of eth0, as eth0 no longer has its own IP. |
| 1419 | 1419 | |
| 1420 | − +o | |
| 1420 | + o | |
| 1421 | 1421 | |
| 1422 | 1422 | |
| 1423 | 1423 | Also, the /dev/net/tun device must be writable by the user running |
| @@ -1438,11 +1438,11 @@ · 14 unmodified lines | ||
| 1438 | 1438 | devices and chgrp /dev/net/tun to that group with mode 664 or 660. |
| 1439 | 1439 | |
| 1440 | 1440 | |
| 1441 | − +o Once the device is set up, run UML with 'eth0=tuntap,device name' | |
| 1441 | + o Once the device is set up, run UML with 'eth0=tuntap,device name' | |
| 1442 | 1442 | (i.e. 'eth0=tuntap,tap0') on the command line (or do it with the |
| 1443 | 1443 | mconsole config command). |
| 1444 | 1444 | |
| 1445 | − +o Bring the eth device up in UML and you're in business. | |
| 1445 | + o Bring the eth device up in UML and you're in business. | |
| 1446 | 1446 | |
| 1447 | 1447 | If you don't want that tap device any more, you can make it non- |
| 1448 | 1448 | persistent with |
| @@ -1465,7 +1465,7 @@ · 16 unmodified lines | ||
| 1465 | 1465 | |
| 1466 | 1466 | |
| 1467 | 1467 | |
| 1468 | − 66..88.. EEtthheerrttaapp | |
| 1468 | + 6.8. Ethertap | |
| 1469 | 1469 | |
| 1470 | 1470 | Ethertap is the general mechanism on 2.2 for userspace processes to |
| 1471 | 1471 | exchange packets with the kernel. |
| @@ -1561,9 +1561,9 @@ · 89 unmodified lines | ||
| 1561 | 1561 | |
| 1562 | 1562 | |
| 1563 | 1563 | |
| 1564 | − 66..99.. TThhee sswwiittcchh ddaaeemmoonn | |
| 1564 | + 6.9. The switch daemon | |
| 1565 | 1565 | |
| 1566 | − NNoottee: This is the daemon formerly known as uml_router, but which was | |
| 1566 | + Note: This is the daemon formerly known as uml_router, but which was | |
| 1567 | 1567 | renamed so the network weenies of the world would stop growling at me. |
| 1568 | 1568 | |
| 1569 | 1569 | |
| @@ -1649,7 +1649,7 @@ · 79 unmodified lines | ||
| 1649 | 1649 | |
| 1650 | 1650 | |
| 1651 | 1651 | |
| 1652 | − 66..1100.. SSlliipp | |
| 1652 | + 6.10. Slip | |
| 1653 | 1653 | |
| 1654 | 1654 | Slip is another, less general, mechanism for a process to communicate |
| 1655 | 1655 | with the host networking. In contrast to the ethertap interface, |
| @@ -1681,7 +1681,7 @@ · 25 unmodified lines | ||
| 1681 | 1681 | |
| 1682 | 1682 | |
| 1683 | 1683 | |
| 1684 | − 66..1111.. SSlliirrpp | |
| 1684 | + 6.11. Slirp | |
| 1685 | 1685 | |
| 1686 | 1686 | slirp uses an external program, usually /usr/bin/slirp, to provide IP |
| 1687 | 1687 | only networking connectivity through the host. This is similar to IP |
| @@ -1737,7 +1737,7 @@ · 49 unmodified lines | ||
| 1737 | 1737 | |
| 1738 | 1738 | |
| 1739 | 1739 | |
| 1740 | − 66..1122.. ppccaapp | |
| 1740 | + 6.12. pcap | |
| 1741 | 1741 | |
| 1742 | 1742 | The pcap transport is attached to a UML ethernet device on the command |
| 1743 | 1743 | line or with uml_mconsole with the following syntax: |
| @@ -1777,7 +1777,7 @@ · 33 unmodified lines | ||
| 1777 | 1777 | |
| 1778 | 1778 | |
| 1779 | 1779 | |
| 1780 | − 66..1133.. SSeettttiinngg uupp tthhee hhoosstt yyoouurrsseellff | |
| 1780 | + 6.13. Setting up the host yourself | |
| 1781 | 1781 | |
| 1782 | 1782 | If you don't specify an address for the host side of the ethertap or |
| 1783 | 1783 | slip device, UML won't do any setup on the host. So this is what is |
| @@ -1785,7 +1785,7 @@ · 1 unmodified line | ||
| 1785 | 1785 | 192.168.0.251 and a UML-side IP of 192.168.0.250 - adjust to suit your |
| 1786 | 1786 | own network): |
| 1787 | 1787 | |
| 1788 | − +o The device needs to be configured with its IP address. Tap devices | |
| 1788 | + o The device needs to be configured with its IP address. Tap devices | |
| 1789 | 1789 | are also configured with an mtu of 1484. Slip devices are |
| 1790 | 1790 | configured with a point-to-point address pointing at the UML ip |
| 1791 | 1791 | address. |
| @@ -1805,7 +1805,7 @@ · 13 unmodified lines | ||
| 1805 | 1805 | |
| 1806 | 1806 | |
| 1807 | 1807 | |
| 1808 | − +o If a tap device is being set up, a route is set to the UML IP. | |
| 1808 | + o If a tap device is being set up, a route is set to the UML IP. | |
| 1809 | 1809 | |
| 1810 | 1810 | |
| 1811 | 1811 | UML# route add -host 192.168.0.250 gw 192.168.0.251 |
| @@ -1814,7 +1814,7 @@ · 2 unmodified lines | ||
| 1814 | 1814 | |
| 1815 | 1815 | |
| 1816 | 1816 | |
| 1817 | − +o To allow other hosts on your network to see the virtual machine, | |
| 1817 | + o To allow other hosts on your network to see the virtual machine, | |
| 1818 | 1818 | proxy arp is set up for it. |
| 1819 | 1819 | |
| 1820 | 1820 | |
| @@ -1824,7 +1824,7 @@ · 3 unmodified lines | ||
| 1824 | 1824 | |
| 1825 | 1825 | |
| 1826 | 1826 | |
| 1827 | − +o Finally, the host is set up to route packets. | |
| 1827 | + o Finally, the host is set up to route packets. | |
| 1828 | 1828 | |
| 1829 | 1829 | |
| 1830 | 1830 | host# echo 1 > /proc/sys/net/ipv4/ip_forward |
| @@ -1838,12 +1838,12 @@ · 7 unmodified lines | ||
| 1838 | 1838 | |
| 1839 | 1839 | |
| 1840 | 1840 | |
| 1841 | − 77.. SShhaarriinngg FFiilleessyysstteemmss bbeettwweeeenn VViirrttuuaall MMaacchhiinneess | |
| 1841 | + 7. Sharing Filesystems between Virtual Machines | |
| 1842 | 1842 | |
| 1843 | 1843 | |
| 1844 | 1844 | |
| 1845 | 1845 | |
| 1846 | − 77..11.. AA wwaarrnniinngg | |
| 1846 | + 7.1. A warning | |
| 1847 | 1847 | |
| 1848 | 1848 | Don't attempt to share filesystems simply by booting two UMLs from the |
| 1849 | 1849 | same file. That's the same thing as booting two physical machines |
| @@ -1851,7 +1851,7 @@ · 1 unmodified line | ||
| 1851 | 1851 | |
| 1852 | 1852 | |
| 1853 | 1853 | |
| 1854 | − 77..22.. UUssiinngg llaayyeerreedd bblloocckk ddeevviicceess | |
| 1854 | + 7.2. Using layered block devices | |
| 1855 | 1855 | |
| 1856 | 1856 | The way to share a filesystem between two virtual machines is to use |
| 1857 | 1857 | the copy-on-write (COW) layering capability of the ubd block driver. |
| @@ -1896,7 +1896,7 @@ · 38 unmodified lines | ||
| 1896 | 1896 | |
| 1897 | 1897 | |
| 1898 | 1898 | |
| 1899 | − 77..33.. NNoottee!! | |
| 1899 | + 7.3. Note! | |
| 1900 | 1900 | |
| 1901 | 1901 | When checking the size of the COW file in order to see the gobs of |
| 1902 | 1902 | space that you're saving, make sure you use 'ls -ls' to see the actual |
| @@ -1926,7 +1926,7 @@ · 23 unmodified lines | ||
| 1926 | 1926 | |
| 1927 | 1927 | |
| 1928 | 1928 | |
| 1929 | − 77..44.. AAnnootthheerr wwaarrnniinngg | |
| 1929 | + 7.4. Another warning | |
| 1930 | 1930 | |
| 1931 | 1931 | Once a filesystem is being used as a readonly backing file for a COW |
| 1932 | 1932 | file, do not boot directly from it or modify it in any way. Doing so |
| @@ -1952,7 +1952,7 @@ · 19 unmodified lines | ||
| 1952 | 1952 | |
| 1953 | 1953 | |
| 1954 | 1954 | |
| 1955 | − 77..55.. uummll__mmoooo :: MMeerrggiinngg aa CCOOWW ffiillee wwiitthh iittss bbaacckkiinngg ffiillee | |
| 1955 | + 7.5. uml_moo : Merging a COW file with its backing file | |
| 1956 | 1956 | |
| 1957 | 1957 | Depending on how you use UML and COW devices, it may be advisable to |
| 1958 | 1958 | merge the changes in the COW file into the backing file every once in |
| @@ -2001,7 +2001,7 @@ · 42 unmodified lines | ||
| 2001 | 2001 | |
| 2002 | 2002 | |
| 2003 | 2003 | |
| 2004 | − 88.. CCrreeaattiinngg ffiilleessyysstteemmss | |
| 2004 | + 8. Creating filesystems | |
| 2005 | 2005 | |
| 2006 | 2006 | |
| 2007 | 2007 | You may want to create and mount new UML filesystems, either because |
| @@ -2015,7 +2015,7 @@ · 7 unmodified lines | ||
| 2015 | 2015 | should be easy to translate to the filesystem of your choice. |
| 2016 | 2016 | |
| 2017 | 2017 | |
| 2018 | − 88..11.. CCrreeaattee tthhee ffiilleessyysstteemm ffiillee | |
| 2018 | + 8.1. Create the filesystem file | |
| 2019 | 2019 | |
| 2020 | 2020 | dd is your friend. All you need to do is tell dd to create an empty |
| 2021 | 2021 | file of the appropriate size. I usually make it sparse to save time |
| @@ -2032,7 +2032,7 @@ · 10 unmodified lines | ||
| 2032 | 2032 | |
| 2033 | 2033 | |
| 2034 | 2034 | |
| 2035 | − 88..22.. AAssssiiggnn tthhee ffiillee ttoo aa UUMMLL ddeevviiccee | |
| 2035 | + 8.2. Assign the file to a UML device | |
| 2036 | 2036 | |
| 2037 | 2037 | Add an argument like the following to the UML command line: |
| 2038 | 2038 | |
| @@ -2045,7 +2045,7 @@ · 6 unmodified lines | ||
| 2045 | 2045 | |
| 2046 | 2046 | |
| 2047 | 2047 | |
| 2048 | − 88..33.. CCrreeaattiinngg aanndd mmoouunnttiinngg tthhee ffiilleessyysstteemm | |
| 2048 | + 8.3. Creating and mounting the filesystem | |
| 2049 | 2049 | |
| 2050 | 2050 | Make sure that the filesystem is available, either by being built into |
| 2051 | 2051 | the kernel, or available as a module, then boot up UML and log in. If |
| @@ -2096,7 +2096,7 @@ · 44 unmodified lines | ||
| 2096 | 2096 | |
| 2097 | 2097 | |
| 2098 | 2098 | |
| 2099 | − 99.. HHoosstt ffiillee aacccceessss | |
| 2099 | + 9. Host file access | |
| 2100 | 2100 | |
| 2101 | 2101 | |
| 2102 | 2102 | If you want to access files on the host machine from inside UML, you |
| @@ -2112,7 +2112,7 @@ · 9 unmodified lines | ||
| 2112 | 2112 | files contained in it just as you would on the host. |
| 2113 | 2113 | |
| 2114 | 2114 | |
| 2115 | − 99..11.. UUssiinngg hhoossttffss | |
| 2115 | + 9.1. Using hostfs | |
| 2116 | 2116 | |
| 2117 | 2117 | To begin with, make sure that hostfs is available inside the virtual |
| 2118 | 2118 | machine with |
| @@ -2151,7 +2151,7 @@ · 32 unmodified lines | ||
| 2151 | 2151 | |
| 2152 | 2152 | |
| 2153 | 2153 | |
| 2154 | − 99..22.. hhoossttffss aass tthhee rroooott ffiilleessyysstteemm | |
| 2154 | + 9.2. hostfs as the root filesystem | |
| 2155 | 2155 | |
| 2156 | 2156 | It's possible to boot from a directory hierarchy on the host using |
| 2157 | 2157 | hostfs rather than using the standard filesystem in a file. |
| @@ -2194,20 +2194,20 @@ · 36 unmodified lines | ||
| 2194 | 2194 | UML should then boot as it does normally. |
| 2195 | 2195 | |
| 2196 | 2196 | |
| 2197 | − 99..33.. BBuuiillddiinngg hhoossttffss | |
| 2197 | + 9.3. Building hostfs | |
| 2198 | 2198 | |
| 2199 | 2199 | If you need to build hostfs because it's not in your kernel, you have |
| 2200 | 2200 | two choices: |
| 2201 | 2201 | |
| 2202 | 2202 | |
| 2203 | 2203 | |
| 2204 | − +o Compiling hostfs into the kernel: | |
| 2204 | + o Compiling hostfs into the kernel: | |
| 2205 | 2205 | |
| 2206 | 2206 | |
| 2207 | 2207 | Reconfigure the kernel and set the 'Host filesystem' option under |
| 2208 | 2208 | |
| 2209 | 2209 | |
| 2210 | − +o Compiling hostfs as a module: | |
| 2210 | + o Compiling hostfs as a module: | |
| 2211 | 2211 | |
| 2212 | 2212 | |
| 2213 | 2213 | Reconfigure the kernel and set the 'Host filesystem' option under |
| @@ -2228,7 +2228,7 @@ · 14 unmodified lines | ||
| 2228 | 2228 | |
| 2229 | 2229 | |
| 2230 | 2230 | |
| 2231 | − 1100.. TThhee MMaannaaggeemmeenntt CCoonnssoollee | |
| 2231 | + 10. The Management Console | |
| 2232 | 2232 | |
| 2233 | 2233 | |
| 2234 | 2234 | |
| @@ -2240,15 +2240,15 @@ · 5 unmodified lines | ||
| 2240 | 2240 | |
| 2241 | 2241 | There are a number of things you can do with the mconsole interface: |
| 2242 | 2242 | |
| 2243 | − +o get the kernel version | |
| 2243 | + o get the kernel version | |
| 2244 | 2244 | |
| 2245 | − +o add and remove devices | |
| 2245 | + o add and remove devices | |
| 2246 | 2246 | |
| 2247 | − +o halt or reboot the machine | |
| 2247 | + o halt or reboot the machine | |
| 2248 | 2248 | |
| 2249 | − +o Send SysRq commands | |
| 2249 | + o Send SysRq commands | |
| 2250 | 2250 | |
| 2251 | − +o Pause and resume the UML | |
| 2251 | + o Pause and resume the UML | |
| 2252 | 2252 | |
| 2253 | 2253 | |
| 2254 | 2254 | You need the mconsole client (uml_mconsole) which is present in CVS |
| @@ -2300,28 +2300,28 @@ · 45 unmodified lines | ||
| 2300 | 2300 | |
| 2301 | 2301 | You'll get a prompt, at which you can run one of these commands: |
| 2302 | 2302 | |
| 2303 | − +o version | |
| 2303 | + o version | |
| 2304 | 2304 | |
| 2305 | − +o halt | |
| 2305 | + o halt | |
| 2306 | 2306 | |
| 2307 | − +o reboot | |
| 2307 | + o reboot | |
| 2308 | 2308 | |
| 2309 | − +o config | |
| 2309 | + o config | |
| 2310 | 2310 | |
| 2311 | − +o remove | |
| 2311 | + o remove | |
| 2312 | 2312 | |
| 2313 | − +o sysrq | |
| 2313 | + o sysrq | |
| 2314 | 2314 | |
| 2315 | − +o help | |
| 2315 | + o help | |
| 2316 | 2316 | |
| 2317 | − +o cad | |
| 2317 | + o cad | |
| 2318 | 2318 | |
| 2319 | − +o stop | |
| 2319 | + o stop | |
| 2320 | 2320 | |
| 2321 | − +o go | |
| 2321 | + o go | |
| 2322 | 2322 | |
| 2323 | 2323 | |
| 2324 | − 1100..11.. vveerrssiioonn | |
| 2324 | + 10.1. version | |
| 2325 | 2325 | |
| 2326 | 2326 | This takes no arguments. It prints the UML version. |
| 2327 | 2327 | |
| @@ -2342,7 +2342,7 @@ · 14 unmodified lines | ||
| 2342 | 2342 | |
| 2343 | 2343 | |
| 2344 | 2344 | |
| 2345 | − 1100..22.. hhaalltt aanndd rreebboooott | |
| 2345 | + 10.2. halt and reboot | |
| 2346 | 2346 | |
| 2347 | 2347 | These take no arguments. They shut the machine down immediately, with |
| 2348 | 2348 | no syncing of disks and no clean shutdown of userspace. So, they are |
| @@ -2357,7 +2357,7 @@ · 8 unmodified lines | ||
| 2357 | 2357 | |
| 2358 | 2358 | |
| 2359 | 2359 | |
| 2360 | − 1100..33.. ccoonnffiigg | |
| 2360 | + 10.3. config | |
| 2361 | 2361 | |
| 2362 | 2362 | "config" adds a new device to the virtual machine. Currently the ubd |
| 2363 | 2363 | and network drivers support this. It takes one argument, which is the |
| @@ -2378,7 +2378,7 @@ · 14 unmodified lines | ||
| 2378 | 2378 | |
| 2379 | 2379 | |
| 2380 | 2380 | |
| 2381 | − 1100..44.. rreemmoovvee | |
| 2381 | + 10.4. remove | |
| 2382 | 2382 | |
| 2383 | 2383 | "remove" deletes a device from the system. Its argument is just the |
| 2384 | 2384 | name of the device to be removed. The device must be idle in whatever |
| @@ -2397,7 +2397,7 @@ · 12 unmodified lines | ||
| 2397 | 2397 | |
| 2398 | 2398 | |
| 2399 | 2399 | |
| 2400 | − 1100..55.. ssyyssrrqq | |
| 2400 | + 10.5. sysrq | |
| 2401 | 2401 | |
| 2402 | 2402 | This takes one argument, which is a single letter. It calls the |
| 2403 | 2403 | generic kernel's SysRq driver, which does whatever is called for by |
| @@ -2407,14 +2407,14 @@ · 3 unmodified lines | ||
| 2407 | 2407 | |
| 2408 | 2408 | |
| 2409 | 2409 | |
| 2410 | − 1100..66.. hheellpp | |
| 2410 | + 10.6. help | |
| 2411 | 2411 | |
| 2412 | 2412 | "help" returns a string listing the valid commands and what each one |
| 2413 | 2413 | does. |
| 2414 | 2414 | |
| 2415 | 2415 | |
| 2416 | 2416 | |
| 2417 | − 1100..77.. ccaadd | |
| 2417 | + 10.7. cad | |
| 2418 | 2418 | |
| 2419 | 2419 | This invokes the Ctl-Alt-Del action on init. What exactly this ends |
| 2420 | 2420 | up doing is up to /etc/inittab. Normally, it reboots the machine. |
| @@ -2432,7 +2432,7 @@ · 11 unmodified lines | ||
| 2432 | 2432 | |
| 2433 | 2433 | |
| 2434 | 2434 | |
| 2435 | − 1100..88.. ssttoopp | |
| 2435 | + 10.8. stop | |
| 2436 | 2436 | |
| 2437 | 2437 | This puts the UML in a loop reading mconsole requests until a 'go' |
| 2438 | 2438 | mconsole command is received. This is very useful for making backups |
| @@ -2448,7 +2448,7 @@ · 9 unmodified lines | ||
| 2448 | 2448 | |
| 2449 | 2449 | |
| 2450 | 2450 | |
| 2451 | − 1100..99.. ggoo | |
| 2451 | + 10.9. go | |
| 2452 | 2452 | |
| 2453 | 2453 | This resumes a UML after being paused by a 'stop' command. Note that |
| 2454 | 2454 | when the UML has resumed, TCP connections may have timed out and if |
| @@ -2462,10 +2462,10 @@ · 7 unmodified lines | ||
| 2462 | 2462 | |
| 2463 | 2463 | |
| 2464 | 2464 | |
| 2465 | − 1111.. KKeerrnneell ddeebbuuggggiinngg | |
| 2465 | + 11. Kernel debugging | |
| 2466 | 2466 | |
| 2467 | 2467 | |
| 2468 | − NNoottee:: The interface that makes debugging, as described here, possible | |
| 2468 | + Note: The interface that makes debugging, as described here, possible | |
| 2469 | 2469 | is present in 2.4.0-test6 kernels and later. |
| 2470 | 2470 | |
| 2471 | 2471 | |
| @@ -2485,7 +2485,7 @@ · 13 unmodified lines | ||
| 2485 | 2485 | |
| 2486 | 2486 | |
| 2487 | 2487 | |
| 2488 | − 1111..11.. SSttaarrttiinngg tthhee kkeerrnneell uunnddeerr ggddbb | |
| 2488 | + 11.1. Starting the kernel under gdb | |
| 2489 | 2489 | |
| 2490 | 2490 | You can have the kernel running under the control of gdb from the |
| 2491 | 2491 | beginning by putting 'debug' on the command line. You will get an |
| @@ -2498,7 +2498,7 @@ · 6 unmodified lines | ||
| 2498 | 2498 | There is a transcript of a debugging session here <debug- |
| 2499 | 2499 | session.html> , with breakpoints being set in the scheduler and in an |
| 2500 | 2500 | interrupt handler. |
| 2501 | − 1111..22.. EExxaammiinniinngg sslleeeeppiinngg pprroocceesssseess | |
| 2501 | + 11.2. Examining sleeping processes | |
| 2502 | 2502 | |
| 2503 | 2503 | Not every bug is evident in the currently running process. Sometimes, |
| 2504 | 2504 | processes hang in the kernel when they shouldn't because they've |
| @@ -2516,7 +2516,7 @@ · 11 unmodified lines | ||
| 2516 | 2516 | |
| 2517 | 2517 | Now what you do is this: |
| 2518 | 2518 | |
| 2519 | − +o detach from the current thread | |
| 2519 | + o detach from the current thread | |
| 2520 | 2520 | |
| 2521 | 2521 | |
| 2522 | 2522 | (UML gdb) det |
| @@ -2525,7 +2525,7 @@ · 2 unmodified lines | ||
| 2525 | 2525 | |
| 2526 | 2526 | |
| 2527 | 2527 | |
| 2528 | − +o attach to the thread you are interested in | |
| 2528 | + o attach to the thread you are interested in | |
| 2529 | 2529 | |
| 2530 | 2530 | |
| 2531 | 2531 | (UML gdb) att <host pid> |
| @@ -2534,7 +2534,7 @@ · 2 unmodified lines | ||
| 2534 | 2534 | |
| 2535 | 2535 | |
| 2536 | 2536 | |
| 2537 | − +o look at its stack and anything else of interest | |
| 2537 | + o look at its stack and anything else of interest | |
| 2538 | 2538 | |
| 2539 | 2539 | |
| 2540 | 2540 | (UML gdb) bt |
| @@ -2545,7 +2545,7 @@ · 4 unmodified lines | ||
| 2545 | 2545 | Note that you can't do anything at this point that requires that a |
| 2546 | 2546 | process execute, e.g. calling a function |
| 2547 | 2547 | |
| 2548 | − +o when you're done looking at that process, reattach to the current | |
| 2548 | + o when you're done looking at that process, reattach to the current | |
| 2549 | 2549 | thread and continue it |
| 2550 | 2550 | |
| 2551 | 2551 | |
| @@ -2569,12 +2569,12 @@ · 17 unmodified lines | ||
| 2569 | 2569 | |
| 2570 | 2570 | |
| 2571 | 2571 | |
| 2572 | − 1111..33.. RRuunnnniinngg dddddd oonn UUMMLL | |
| 2572 | + 11.3. Running ddd on UML | |
| 2573 | 2573 | |
| 2574 | 2574 | ddd works on UML, but requires a special kludge. The process goes |
| 2575 | 2575 | like this: |
| 2576 | 2576 | |
| 2577 | − +o Start ddd | |
| 2577 | + o Start ddd | |
| 2578 | 2578 | |
| 2579 | 2579 | |
| 2580 | 2580 | host% ddd linux |
| @@ -2583,14 +2583,14 @@ · 2 unmodified lines | ||
| 2583 | 2583 | |
| 2584 | 2584 | |
| 2585 | 2585 | |
| 2586 | − +o With ps, get the pid of the gdb that ddd started. You can ask the | |
| 2586 | + o With ps, get the pid of the gdb that ddd started. You can ask the | |
| 2587 | 2587 | gdb to tell you, but for some reason that confuses things and |
| 2588 | 2588 | causes a hang. |
| 2589 | 2589 | |
| 2590 | − +o run UML with 'debug=parent gdb-pid=<pid>' added to the command line | |
| 2590 | + o run UML with 'debug=parent gdb-pid=<pid>' added to the command line | |
| 2591 | 2591 | - it will just sit there after you hit return |
| 2592 | 2592 | |
| 2593 | − +o type 'att 1' to the ddd gdb and you will see something like | |
| 2593 | + o type 'att 1' to the ddd gdb and you will see something like | |
| 2594 | 2594 | |
| 2595 | 2595 | |
| 2596 | 2596 | 0xa013dc51 in __kill () |
| @@ -2602,12 +2602,12 @@ · 5 unmodified lines | ||
| 2602 | 2602 | |
| 2603 | 2603 | |
| 2604 | 2604 | |
| 2605 | − +o At this point, type 'c', UML will boot up, and you can use ddd just | |
| 2605 | + o At this point, type 'c', UML will boot up, and you can use ddd just | |
| 2606 | 2606 | as you do on any other process. |
| 2607 | 2607 | |
| 2608 | 2608 | |
| 2609 | 2609 | |
| 2610 | − 1111..44.. DDeebbuuggggiinngg mmoodduulleess | |
| 2610 | + 11.4. Debugging modules | |
| 2611 | 2611 | |
| 2612 | 2612 | gdb has support for debugging code which is dynamically loaded into |
| 2613 | 2613 | the process. This support is what is needed to debug kernel modules |
| @@ -2823,7 +2823,7 @@ · 209 unmodified lines | ||
| 2823 | 2823 | |
| 2824 | 2824 | |
| 2825 | 2825 | |
| 2826 | − 1111..55.. AAttttaacchhiinngg ggddbb ttoo tthhee kkeerrnneell | |
| 2826 | + 11.5. Attaching gdb to the kernel | |
| 2827 | 2827 | |
| 2828 | 2828 | If you don't have the kernel running under gdb, you can attach gdb to |
| 2829 | 2829 | it later by sending the tracing thread a SIGUSR1. The first line of |
| @@ -2857,7 +2857,7 @@ · 27 unmodified lines | ||
| 2857 | 2857 | |
| 2858 | 2858 | |
| 2859 | 2859 | |
| 2860 | − 1111..66.. UUssiinngg aalltteerrnnaattee ddeebbuuggggeerrss | |
| 2860 | + 11.6. Using alternate debuggers | |
| 2861 | 2861 | |
| 2862 | 2862 | UML has support for attaching to an already running debugger rather |
| 2863 | 2863 | than starting gdb itself. This is present in CVS as of 17 Apr 2001. |
| @@ -2886,7 +2886,7 @@ · 22 unmodified lines | ||
| 2886 | 2886 | An example of an alternate debugger is strace. You can strace the |
| 2887 | 2887 | actual kernel as follows: |
| 2888 | 2888 | |
| 2889 | − +o Run the following in a shell | |
| 2889 | + o Run the following in a shell | |
| 2890 | 2890 | |
| 2891 | 2891 | |
| 2892 | 2892 | host% |
| @@ -2894,10 +2894,10 @@ · 1 unmodified line | ||
| 2894 | 2894 | |
| 2895 | 2895 | |
| 2896 | 2896 | |
| 2897 | − +o Run UML with 'debug' and 'gdb-pid=<pid>' with the pid printed out | |
| 2897 | + o Run UML with 'debug' and 'gdb-pid=<pid>' with the pid printed out | |
| 2898 | 2898 | by the previous command |
| 2899 | 2899 | |
| 2900 | − +o Hit return in the shell, and UML will start running, and strace | |
| 2900 | + o Hit return in the shell, and UML will start running, and strace | |
| 2901 | 2901 | output will start accumulating in the output file. |
| 2902 | 2902 | |
| 2903 | 2903 | Note that this is different from running |
| @@ -2917,9 +2917,9 @@ · 13 unmodified lines | ||
| 2917 | 2917 | |
| 2918 | 2918 | |
| 2919 | 2919 | |
| 2920 | − 1122.. KKeerrnneell ddeebbuuggggiinngg eexxaammpplleess | |
| 2920 | + 12. Kernel debugging examples | |
| 2921 | 2921 | |
| 2922 | − 1122..11.. TThhee ccaassee ooff tthhee hhuunngg ffsscckk | |
| 2922 | + 12.1. The case of the hung fsck | |
| 2923 | 2923 | |
| 2924 | 2924 | When booting up the kernel, fsck failed, and dropped me into a shell |
| 2925 | 2925 | to fix things up. I ran fsck -y, which hung: |
| @@ -3154,9 +3154,9 @@ · 228 unmodified lines | ||
| 3154 | 3154 | |
| 3155 | 3155 | The interesting things here are : |
| 3156 | 3156 | |
| 3157 | − +o There are two segfaults on this stack (frames 9 and 14) | |
| 3157 | + o There are two segfaults on this stack (frames 9 and 14) | |
| 3158 | 3158 | |
| 3159 | − +o The first faulting address (frame 11) is 0x50000800 | |
| 3159 | + o The first faulting address (frame 11) is 0x50000800 | |
| 3160 | 3160 | |
| 3161 | 3161 | (gdb) p (void *)1342179328 |
| 3162 | 3162 | $16 = (void *) 0x50000800 |
| @@ -3399,7 +3399,7 @@ · 236 unmodified lines | ||
| 3399 | 3399 | on will be somewhat clearer. |
| 3400 | 3400 | |
| 3401 | 3401 | |
| 3402 | − 1122..22.. EEppiissooddee 22:: TThhee ccaassee ooff tthhee hhuunngg ffsscckk | |
| 3402 | + 12.2. Episode 2: The case of the hung fsck | |
| 3403 | 3403 | |
| 3404 | 3404 | After setting a trap in the SEGV handler for accesses to the signal |
| 3405 | 3405 | thread's stack, I reran the kernel. |
| @@ -3788,12 +3788,12 @@ · 382 unmodified lines | ||
| 3788 | 3788 | |
| 3789 | 3789 | |
| 3790 | 3790 | |
| 3791 | − 1133.. WWhhaatt ttoo ddoo wwhheenn UUMMLL ddooeessnn''tt wwoorrkk | |
| 3791 | + 13. What to do when UML doesn't work | |
| 3792 | 3792 | |
| 3793 | 3793 | |
| 3794 | 3794 | |
| 3795 | 3795 | |
| 3796 | − 1133..11.. SSttrraannggee ccoommppiillaattiioonn eerrrroorrss wwhheenn yyoouu bbuuiilldd ffrroomm ssoouurrccee | |
| 3796 | + 13.1. Strange compilation errors when you build from source | |
| 3797 | 3797 | |
| 3798 | 3798 | As of test11, it is necessary to have "ARCH=um" in the environment or |
| 3799 | 3799 | on the make command line for all steps in building UML, including |
| @@ -3824,8 +3824,8 @@ · 24 unmodified lines | ||
| 3824 | 3824 | |
| 3825 | 3825 | |
| 3826 | 3826 | |
| 3827 | − 1133..33.. AA vvaarriieettyy ooff ppaanniiccss aanndd hhaannggss wwiitthh //ttmmpp oonn aa rreeiisseerrffss ffiilleessyyss-- | |
| 3828 | − tteemm | |
| 3827 | + 13.3. A variety of panics and hangs with /tmp on a reiserfs filesys- | |
| 3828 | + tem | |
| 3829 | 3829 | |
| 3830 | 3830 | I saw this on reiserfs 3.5.21 and it seems to be fixed in 3.5.27. |
| 3831 | 3831 | Panics preceded by |
| @@ -3842,8 +3842,8 @@ · 10 unmodified lines | ||
| 3842 | 3842 | |
| 3843 | 3843 | |
| 3844 | 3844 | |
| 3845 | − 1133..44.. TThhee ccoommppiillee ffaaiillss wwiitthh eerrrroorrss aabboouutt ccoonnfflliiccttiinngg ttyyppeess ffoorr | |
| 3846 | − ''ooppeenn'',, ''dduupp'',, aanndd ''wwaaiittppiidd'' | |
| 3845 | + 13.4. The compile fails with errors about conflicting types for | |
| 3846 | + 'open', 'dup', and 'waitpid' | |
| 3847 | 3847 | |
| 3848 | 3848 | This happens when you build in /usr/src/linux. The UML build makes |
| 3849 | 3849 | the include/asm link point to include/asm-um. /usr/include/asm points |
| @@ -3854,14 +3854,14 @@ · 4 unmodified lines | ||
| 3854 | 3854 | |
| 3855 | 3855 | |
| 3856 | 3856 | |
| 3857 | − 1133..55.. UUMMLL ddooeessnn''tt wwoorrkk wwhheenn //ttmmpp iiss aann NNFFSS ffiilleessyysstteemm | |
| 3857 | + 13.5. UML doesn't work when /tmp is an NFS filesystem | |
| 3858 | 3858 | |
| 3859 | 3859 | This seems to be a similar situation with the ReiserFS problem above. |
| 3860 | 3860 | Some versions of NFS seems not to handle mmap correctly, which UML |
| 3861 | 3861 | depends on. The workaround is have /tmp be a non-NFS directory. |
| 3862 | 3862 | |
| 3863 | 3863 | |
| 3864 | − 1133..66.. UUMMLL hhaannggss oonn bboooott wwhheenn ccoommppiilleedd wwiitthh ggpprrooff ssuuppppoorrtt | |
| 3864 | + 13.6. UML hangs on boot when compiled with gprof support | |
| 3865 | 3865 | |
| 3866 | 3866 | If you build UML with gprof support and, early in the boot, it does |
| 3867 | 3867 | this |
| @@ -3878,7 +3878,7 @@ · 10 unmodified lines | ||
| 3878 | 3878 | |
| 3879 | 3879 | |
| 3880 | 3880 | |
| 3881 | − 1133..77.. ssyyssllooggdd ddiieess wwiitthh aa SSIIGGTTEERRMM oonn ssttaarrttuupp | |
| 3881 | + 13.7. syslogd dies with a SIGTERM on startup | |
| 3882 | 3882 | |
| 3883 | 3883 | The exact boot error depends on the distribution that you're booting, |
| 3884 | 3884 | but Debian produces this: |
| @@ -3897,17 +3897,17 @@ · 12 unmodified lines | ||
| 3897 | 3897 | |
| 3898 | 3898 | |
| 3899 | 3899 | |
| 3900 | − 1133..88.. TTUUNN//TTAAPP nneettwwoorrkkiinngg ddooeessnn''tt wwoorrkk oonn aa 22..44 hhoosstt | |
| 3900 | + 13.8. TUN/TAP networking doesn't work on a 2.4 host | |
| 3901 | 3901 | |
| 3902 | 3902 | There are a couple of problems which were |
| 3903 | 3903 | <http://www.geocrawler.com/lists/3/SourceForge/597/0/> name="pointed |
| 3904 | 3904 | out"> by Tim Robinson <timro at trkr dot net> |
| 3905 | 3905 | |
| 3906 | − +o It doesn't work on hosts running 2.4.7 (or thereabouts) or earlier. | |
| 3906 | + o It doesn't work on hosts running 2.4.7 (or thereabouts) or earlier. | |
| 3907 | 3907 | The fix is to upgrade to something more recent and then read the |
| 3908 | 3908 | next item. |
| 3909 | 3909 | |
| 3910 | − +o If you see | |
| 3910 | + o If you see | |
| 3911 | 3911 | |
| 3912 | 3912 | |
| 3913 | 3913 | File descriptor in bad state |
| @@ -3921,8 +3921,8 @@ · 7 unmodified lines | ||
| 3921 | 3921 | |
| 3922 | 3922 | |
| 3923 | 3923 | |
| 3924 | − 1133..99.. YYoouu ccaann nneettwwoorrkk ttoo tthhee hhoosstt bbuutt nnoott ttoo ootthheerr mmaacchhiinneess oonn tthhee | |
| 3925 | − nneett | |
| 3924 | + 13.9. You can network to the host but not to other machines on the | |
| 3925 | + net | |
| 3926 | 3926 | |
| 3927 | 3927 | If you can connect to the host, and the host can connect to UML, but |
| 3928 | 3928 | you cannot connect to any other machines, then you may need to enable |
| @@ -3972,7 +3972,7 @@ · 43 unmodified lines | ||
| 3972 | 3972 | |
| 3973 | 3973 | |
| 3974 | 3974 | |
| 3975 | − 1133..1100.. II hhaavvee nnoo rroooott aanndd II wwaanntt ttoo ssccrreeaamm | |
| 3975 | + 13.10. I have no root and I want to scream | |
| 3976 | 3976 | |
| 3977 | 3977 | Thanks to Birgit Wahlich for telling me about this strange one. It |
| 3978 | 3978 | turns out that there's a limit of six environment variables on the |
| @@ -3987,7 +3987,7 @@ · 8 unmodified lines | ||
| 3987 | 3987 | |
| 3988 | 3988 | |
| 3989 | 3989 | |
| 3990 | − 1133..1111.. UUMMLL bbuuiilldd ccoonnfflliicctt bbeettwweeeenn ppttrraaccee..hh aanndd uuccoonntteexxtt..hh | |
| 3990 | + 13.11. UML build conflict between ptrace.h and ucontext.h | |
| 3991 | 3991 | |
| 3992 | 3992 | On some older systems, /usr/include/asm/ptrace.h and |
| 3993 | 3993 | /usr/include/sys/ucontext.h define the same names. So, when they're |
| @@ -4007,7 +4007,7 @@ · 13 unmodified lines | ||
| 4007 | 4007 | |
| 4008 | 4008 | |
| 4009 | 4009 | |
| 4010 | − 1133..1122.. TThhee UUMMLL BBooggooMMiippss iiss eexxaaccttllyy hhaallff tthhee hhoosstt''ss BBooggooMMiippss | |
| 4010 | + 13.12. The UML BogoMips is exactly half the host's BogoMips | |
| 4011 | 4011 | |
| 4012 | 4012 | On i386 kernels, there are two ways of running the loop that is used |
| 4013 | 4013 | to calculate the BogoMips rating, using the TSC if it's there or using |
| @@ -4019,7 +4019,7 @@ · 5 unmodified lines | ||
| 4019 | 4019 | |
| 4020 | 4020 | |
| 4021 | 4021 | |
| 4022 | − 1133..1133.. WWhheenn yyoouu rruunn UUMMLL,, iitt iimmmmeeddiiaatteellyy sseeggffaauullttss | |
| 4022 | + 13.13. When you run UML, it immediately segfaults | |
| 4023 | 4023 | |
| 4024 | 4024 | If the host is configured with the 2G/2G address space split, that's |
| 4025 | 4025 | why. See ``UML on 2G/2G hosts'' for the details on getting UML to |
| @@ -4027,7 +4027,7 @@ · 1 unmodified line | ||
| 4027 | 4027 | |
| 4028 | 4028 | |
| 4029 | 4029 | |
| 4030 | − 1133..1144.. xxtteerrmmss aappppeeaarr,, tthheenn iimmmmeeddiiaatteellyy ddiissaappppeeaarr | |
| 4030 | + 13.14. xterms appear, then immediately disappear | |
| 4031 | 4031 | |
| 4032 | 4032 | If you're running an up to date kernel with an old release of |
| 4033 | 4033 | uml_utilities, the port-helper program will not work properly, so |
| @@ -4039,7 +4039,7 @@ · 5 unmodified lines | ||
| 4039 | 4039 | |
| 4040 | 4040 | |
| 4041 | 4041 | |
| 4042 | − 1133..1155.. AAnnyy ootthheerr ppaanniicc,, hhaanngg,, oorr ssttrraannggee bbeehhaavviioorr | |
| 4042 | + 13.15. Any other panic, hang, or strange behavior | |
| 4043 | 4043 | |
| 4044 | 4044 | If you're seeing truly strange behavior, such as hangs or panics that |
| 4045 | 4045 | happen in random places, or you try running the debugger to see what's |
| @@ -4059,7 +4059,7 @@ · 13 unmodified lines | ||
| 4059 | 4059 | |
| 4060 | 4060 | If you want to be super-helpful, read ``Diagnosing Problems'' and |
| 4061 | 4061 | follow the instructions contained therein. |
| 4062 | − 1144.. DDiiaaggnnoossiinngg PPrroobblleemmss | |
| 4062 | + 14. Diagnosing Problems | |
| 4063 | 4063 | |
| 4064 | 4064 | |
| 4065 | 4065 | If you get UML to crash, hang, or otherwise misbehave, you should |
| @@ -4078,7 +4078,7 @@ · 12 unmodified lines | ||
| 4078 | 4078 | ``Kernel debugging'' UML first. |
| 4079 | 4079 | |
| 4080 | 4080 | |
| 4081 | − 1144..11.. CCaassee 11 :: NNoorrmmaall kkeerrnneell ppaanniiccss | |
| 4081 | + 14.1. Case 1 : Normal kernel panics | |
| 4082 | 4082 | |
| 4083 | 4083 | The most common case is for a normal thread to panic. To debug this, |
| 4084 | 4084 | you will need to run it under the debugger (add 'debug' to the command |
| @@ -4128,7 +4128,7 @@ · 43 unmodified lines | ||
| 4128 | 4128 | to get that information from the faulting ip. |
| 4129 | 4129 | |
| 4130 | 4130 | |
| 4131 | − 1144..22.. CCaassee 22 :: TTrraacciinngg tthhrreeaadd ppaanniiccss | |
| 4131 | + 14.2. Case 2 : Tracing thread panics | |
| 4132 | 4132 | |
| 4133 | 4133 | The less common and more painful case is when the tracing thread |
| 4134 | 4134 | panics. In this case, the kernel debugger will be useless because it |
| @@ -4161,7 +4161,7 @@ · 26 unmodified lines | ||
| 4161 | 4161 | backtrace in and wait for our crack debugging team to fix the problem. |
| 4162 | 4162 | |
| 4163 | 4163 | |
| 4164 | − 1144..33.. CCaassee 33 :: TTrraacciinngg tthhrreeaadd ppaanniiccss ccaauusseedd bbyy ootthheerr tthhrreeaaddss | |
| 4164 | + 14.3. Case 3 : Tracing thread panics caused by other threads | |
| 4165 | 4165 | |
| 4166 | 4166 | However, there are cases where the misbehavior of another thread |
| 4167 | 4167 | caused the problem. The most common panic of this type is: |
| @@ -4227,7 +4227,7 @@ · 59 unmodified lines | ||
| 4227 | 4227 | |
| 4228 | 4228 | |
| 4229 | 4229 | |
| 4230 | − 1144..44.. CCaassee 44 :: HHaannggss | |
| 4230 | + 14.4. Case 4 : Hangs | |
| 4231 | 4231 | |
| 4232 | 4232 | Hangs seem to be fairly rare, but they sometimes happen. When a hang |
| 4233 | 4233 | happens, we need a backtrace from the offending process. Run the |
| @@ -4257,7 +4257,7 @@ · 23 unmodified lines | ||
| 4257 | 4257 | |
| 4258 | 4258 | |
| 4259 | 4259 | |
| 4260 | − 1155.. TThhaannkkss | |
| 4260 | + 15. Thanks | |
| 4261 | 4261 | |
| 4262 | 4262 | |
| 4263 | 4263 | A number of people have helped this project in various ways, and this |
| @@ -4274,20 +4274,20 @@ · 10 unmodified lines | ||
| 4274 | 4274 | bookkeeping lapses and I forget about contributions. |
| 4275 | 4275 | |
| 4276 | 4276 | |
| 4277 | − 1155..11.. CCooddee aanndd DDooccuummeennttaattiioonn | |
| 4277 | + 15.1. Code and Documentation | |
| 4278 | 4278 | |
| 4279 | 4279 | Rusty Russell <rusty at linuxcare.com.au> - |
| 4280 | 4280 | |
| 4281 | − +o wrote the HOWTO <http://user-mode- | |
| 4281 | + o wrote the HOWTO <http://user-mode- | |
| 4282 | 4282 | linux.sourceforge.net/UserModeLinux-HOWTO.html> |
| 4283 | 4283 | |
| 4284 | − +o prodded me into making this project official and putting it on | |
| 4284 | + o prodded me into making this project official and putting it on | |
| 4285 | 4285 | SourceForge |
| 4286 | 4286 | |
| 4287 | − +o came up with the way cool UML logo <http://user-mode- | |
| 4287 | + o came up with the way cool UML logo <http://user-mode- | |
| 4288 | 4288 | linux.sourceforge.net/uml-small.png> |
| 4289 | 4289 | |
| 4290 | − +o redid the config process | |
| 4290 | + o redid the config process | |
| 4291 | 4291 | |
| 4292 | 4292 | |
| 4293 | 4293 | Peter Moulder <reiter at netspace.net.au> - Fixed my config and build |
| @@ -4296,18 +4296,18 @@ · 2 unmodified lines | ||
| 4296 | 4296 | |
| 4297 | 4297 | Bill Stearns <wstearns at pobox.com> - |
| 4298 | 4298 | |
| 4299 | − +o HOWTO updates | |
| 4299 | + o HOWTO updates | |
| 4300 | 4300 | |
| 4301 | − +o lots of bug reports | |
| 4301 | + o lots of bug reports | |
| 4302 | 4302 | |
| 4303 | − +o lots of testing | |
| 4303 | + o lots of testing | |
| 4304 | 4304 | |
| 4305 | − +o dedicated a box (uml.ists.dartmouth.edu) to support UML development | |
| 4305 | + o dedicated a box (uml.ists.dartmouth.edu) to support UML development | |
| 4306 | 4306 | |
| 4307 | − +o wrote the mkrootfs script, which allows bootable filesystems of | |
| 4307 | + o wrote the mkrootfs script, which allows bootable filesystems of | |
| 4308 | 4308 | RPM-based distributions to be cranked out |
| 4309 | 4309 | |
| 4310 | − +o cranked out a large number of filesystems with said script | |
| 4310 | + o cranked out a large number of filesystems with said script | |
| 4311 | 4311 | |
| 4312 | 4312 | |
| 4313 | 4313 | Jim Leu <jleu at mindspring.com> - Wrote the virtual ethernet driver |
| @@ -4375,176 +4375,176 @@ · 61 unmodified lines | ||
| 4375 | 4375 | |
| 4376 | 4376 | David Coulson <http://davidcoulson.net> - |
| 4377 | 4377 | |
| 4378 | − +o Set up the usermodelinux.org <http://usermodelinux.org> site, | |
| 4378 | + o Set up the usermodelinux.org <http://usermodelinux.org> site, | |
| 4379 | 4379 | which is a great way of keeping the UML user community on top of |
| 4380 | 4380 | UML goings-on. |
| 4381 | 4381 | |
| 4382 | − +o Site documentation and updates | |
| 4382 | + o Site documentation and updates | |
| 4383 | 4383 | |
| 4384 | − +o Nifty little UML management daemon UMLd | |
| 4384 | + o Nifty little UML management daemon UMLd | |
| 4385 | 4385 | <http://uml.openconsultancy.com/umld/> |
| 4386 | 4386 | |
| 4387 | − +o Lots of testing and bug reports | |
| 4387 | + o Lots of testing and bug reports | |
| 4388 | 4388 | |
| 4389 | 4389 | |
| 4390 | 4390 | |
| 4391 | 4391 | |
| 4392 | − 1155..22.. FFlluusshhiinngg oouutt bbuuggss | |
| 4392 | + 15.2. Flushing out bugs | |
| 4393 | 4393 | |
| 4394 | 4394 | |
| 4395 | 4395 | |
| 4396 | − +o Yuri Pudgorodsky | |
| 4396 | + o Yuri Pudgorodsky | |
| 4397 | 4397 | |
| 4398 | − +o Gerald Britton | |
| 4398 | + o Gerald Britton | |
| 4399 | 4399 | |
| 4400 | − +o Ian Wehrman | |
| 4400 | + o Ian Wehrman | |
| 4401 | 4401 | |
| 4402 | − +o Gord Lamb | |
| 4402 | + o Gord Lamb | |
| 4403 | 4403 | |
| 4404 | − +o Eugene Koontz | |
| 4404 | + o Eugene Koontz | |
| 4405 | 4405 | |
| 4406 | − +o John H. Hartman | |
| 4406 | + o John H. Hartman | |
| 4407 | 4407 | |
| 4408 | − +o Anders Karlsson | |
| 4408 | + o Anders Karlsson | |
| 4409 | 4409 | |
| 4410 | − +o Daniel Phillips | |
| 4410 | + o Daniel Phillips | |
| 4411 | 4411 | |
| 4412 | − +o John Fremlin | |
| 4412 | + o John Fremlin | |
| 4413 | 4413 | |
| 4414 | − +o Rainer Burgstaller | |
| 4414 | + o Rainer Burgstaller | |
| 4415 | 4415 | |
| 4416 | − +o James Stevenson | |
| 4416 | + o James Stevenson | |
| 4417 | 4417 | |
| 4418 | − +o Matt Clay | |
| 4418 | + o Matt Clay | |
| 4419 | 4419 | |
| 4420 | − +o Cliff Jefferies | |
| 4420 | + o Cliff Jefferies | |
| 4421 | 4421 | |
| 4422 | − +o Geoff Hoff | |
| 4422 | + o Geoff Hoff | |
| 4423 | 4423 | |
| 4424 | − +o Lennert Buytenhek | |
| 4424 | + o Lennert Buytenhek | |
| 4425 | 4425 | |
| 4426 | − +o Al Viro | |
| 4426 | + o Al Viro | |
| 4427 | 4427 | |
| 4428 | − +o Frank Klingenhoefer | |
| 4428 | + o Frank Klingenhoefer | |
| 4429 | 4429 | |
| 4430 | − +o Livio Baldini Soares | |
| 4430 | + o Livio Baldini Soares | |
| 4431 | 4431 | |
| 4432 | − +o Jon Burgess | |
| 4432 | + o Jon Burgess | |
| 4433 | 4433 | |
| 4434 | − +o Petru Paler | |
| 4434 | + o Petru Paler | |
| 4435 | 4435 | |
| 4436 | − +o Paul | |
| 4436 | + o Paul | |
| 4437 | 4437 | |
| 4438 | − +o Chris Reahard | |
| 4438 | + o Chris Reahard | |
| 4439 | 4439 | |
| 4440 | − +o Sverker Nilsson | |
| 4440 | + o Sverker Nilsson | |
| 4441 | 4441 | |
| 4442 | − +o Gong Su | |
| 4442 | + o Gong Su | |
| 4443 | 4443 | |
| 4444 | − +o johan verrept | |
| 4444 | + o johan verrept | |
| 4445 | 4445 | |
| 4446 | − +o Bjorn Eriksson | |
| 4446 | + o Bjorn Eriksson | |
| 4447 | 4447 | |
| 4448 | − +o Lorenzo Allegrucci | |
| 4448 | + o Lorenzo Allegrucci | |
| 4449 | 4449 | |
| 4450 | − +o Muli Ben-Yehuda | |
| 4450 | + o Muli Ben-Yehuda | |
| 4451 | 4451 | |
| 4452 | − +o David Mansfield | |
| 4452 | + o David Mansfield | |
| 4453 | 4453 | |
| 4454 | − +o Howard Goff | |
| 4454 | + o Howard Goff | |
| 4455 | 4455 | |
| 4456 | − +o Mike Anderson | |
| 4456 | + o Mike Anderson | |
| 4457 | 4457 | |
| 4458 | − +o John Byrne | |
| 4458 | + o John Byrne | |
| 4459 | 4459 | |
| 4460 | − +o Sapan J. Batia | |
| 4460 | + o Sapan J. Batia | |
| 4461 | 4461 | |
| 4462 | − +o Iris Huang | |
| 4462 | + o Iris Huang | |
| 4463 | 4463 | |
| 4464 | − +o Jan Hudec | |
| 4464 | + o Jan Hudec | |
| 4465 | 4465 | |
| 4466 | − +o Voluspa | |
| 4466 | + o Voluspa | |
| 4467 | 4467 | |
| 4468 | 4468 | |
| 4469 | 4469 | |
| 4470 | 4470 | |
| 4471 | − 1155..33.. BBuugglleettss aanndd cclleeaann--uuppss | |
| 4471 | + 15.3. Buglets and clean-ups | |
| 4472 | 4472 | |
| 4473 | 4473 | |
| 4474 | 4474 | |
| 4475 | − +o Dave Zarzycki | |
| 4475 | + o Dave Zarzycki | |
| 4476 | 4476 | |
| 4477 | − +o Adam Lazur | |
| 4477 | + o Adam Lazur | |
| 4478 | 4478 | |
| 4479 | − +o Boria Feigin | |
| 4479 | + o Boria Feigin | |
| 4480 | 4480 | |
| 4481 | − +o Brian J. Murrell | |
| 4481 | + o Brian J. Murrell | |
| 4482 | 4482 | |
| 4483 | − +o JS | |
| 4483 | + o JS | |
| 4484 | 4484 | |
| 4485 | − +o Roman Zippel | |
| 4485 | + o Roman Zippel | |
| 4486 | 4486 | |
| 4487 | − +o Wil Cooley | |
| 4487 | + o Wil Cooley | |
| 4488 | 4488 | |
| 4489 | − +o Ayelet Shemesh | |
| 4489 | + o Ayelet Shemesh | |
| 4490 | 4490 | |
| 4491 | − +o Will Dyson | |
| 4491 | + o Will Dyson | |
| 4492 | 4492 | |
| 4493 | − +o Sverker Nilsson | |
| 4493 | + o Sverker Nilsson | |
| 4494 | 4494 | |
| 4495 | − +o dvorak | |
| 4495 | + o dvorak | |
| 4496 | 4496 | |
| 4497 | − +o v.naga srinivas | |
| 4497 | + o v.naga srinivas | |
| 4498 | 4498 | |
| 4499 | − +o Shlomi Fish | |
| 4499 | + o Shlomi Fish | |
| 4500 | 4500 | |
| 4501 | − +o Roger Binns | |
| 4501 | + o Roger Binns | |
| 4502 | 4502 | |
| 4503 | − +o johan verrept | |
| 4503 | + o johan verrept | |
| 4504 | 4504 | |
| 4505 | − +o MrChuoi | |
| 4505 | + o MrChuoi | |
| 4506 | 4506 | |
| 4507 | − +o Peter Cleve | |
| 4507 | + o Peter Cleve | |
| 4508 | 4508 | |
| 4509 | − +o Vincent Guffens | |
| 4509 | + o Vincent Guffens | |
| 4510 | 4510 | |
| 4511 | − +o Nathan Scott | |
| 4511 | + o Nathan Scott | |
| 4512 | 4512 | |
| 4513 | − +o Patrick Caulfield | |
| 4513 | + o Patrick Caulfield | |
| 4514 | 4514 | |
| 4515 | − +o jbearce | |
| 4515 | + o jbearce | |
| 4516 | 4516 | |
| 4517 | − +o Catalin Marinas | |
| 4517 | + o Catalin Marinas | |
| 4518 | 4518 | |
| 4519 | − +o Shane Spencer | |
| 4519 | + o Shane Spencer | |
| 4520 | 4520 | |
| 4521 | − +o Zou Min | |
| 4521 | + o Zou Min | |
| 4522 | 4522 | |
| 4523 | 4523 | |
| 4524 | − +o Ryan Boder | |
| 4524 | + o Ryan Boder | |
| 4525 | 4525 | |
| 4526 | − +o Lorenzo Colitti | |
| 4526 | + o Lorenzo Colitti | |
| 4527 | 4527 | |
| 4528 | − +o Gwendal Grignou | |
| 4528 | + o Gwendal Grignou | |
| 4529 | 4529 | |
| 4530 | − +o Andre' Breiler | |
| 4530 | + o Andre' Breiler | |
| 4531 | 4531 | |
| 4532 | − +o Tsutomu Yasuda | |
| 4532 | + o Tsutomu Yasuda | |
| 4533 | 4533 | |
| 4534 | 4534 | |
| 4535 | 4535 | |
| 4536 | − 1155..44.. CCaassee SSttuuddiieess | |
| 4536 | + 15.4. Case Studies | |
| 4537 | 4537 | |
| 4538 | 4538 | |
| 4539 | − +o Jon Wright | |
| 4539 | + o Jon Wright | |
| 4540 | 4540 | |
| 4541 | − +o William McEwan | |
| 4541 | + o William McEwan | |
| 4542 | 4542 | |
| 4543 | − +o Michael Richardson | |
| 4543 | + o Michael Richardson | |
| 4544 | 4544 | |
| 4545 | 4545 | |
| 4546 | 4546 | |
| 4547 | − 1155..55.. OOtthheerr ccoonnttrriibbuuttiioonnss | |
| 4547 | + 15.5. Other contributions | |
| 4548 | 4548 | |
| 4549 | 4549 | |
| 4550 | 4550 | Bill Carr <Bill.Carr at compaq.com> made the Red Hat mkrootfs script |
| @@ -30,8 +30,6 @@ page_migration · 29 unmodified lines | ||
| 30 | 30 | - description of page migration in NUMA systems. |
| 31 | 31 | pagemap.txt |
| 32 | 32 | - pagemap, from the userspace perspective |
| 33 | −slabinfo.c | |
| 34 | − - source code for a tool to get reports about slabs. | |
| 35 | 33 | slub.txt |
| 36 | 34 | - a short users guide for SLUB. |
| 37 | 35 | unevictable-lru.txt |
| @@ -0,0 +1,195 @@ | ||
| 1 | +Converting old watchdog drivers to the watchdog framework | |
| 2 | +by Wolfram Sang <w.sang@pengutronix.de> | |
| 3 | +========================================================= | |
| 4 | + | |
| 5 | +Before the watchdog framework came into the kernel, every driver had to | |
| 6 | +implement the API on its own. Now, as the framework factored out the common | |
| 7 | +components, those drivers can be lightened making it a user of the framework. | |
| 8 | +This document shall guide you for this task. The necessary steps are described | |
| 9 | +as well as things to look out for. | |
| 10 | + | |
| 11 | + | |
| 12 | +Remove the file_operations struct | |
| 13 | +--------------------------------- | |
| 14 | + | |
| 15 | +Old drivers define their own file_operations for actions like open(), write(), | |
| 16 | +etc... These are now handled by the framework and just call the driver when | |
| 17 | +needed. So, in general, the 'file_operations' struct and assorted functions can | |
| 18 | +go. Only very few driver-specific details have to be moved to other functions. | |
| 19 | +Here is a overview of the functions and probably needed actions: | |
| 20 | + | |
| 21 | +- open: Everything dealing with resource management (file-open checks, magic | |
| 22 | + close preparations) can simply go. Device specific stuff needs to go to the | |
| 23 | + driver specific start-function. Note that for some drivers, the start-function | |
| 24 | + also serves as the ping-function. If that is the case and you need start/stop | |
| 25 | + to be balanced (clocks!), you are better off refactoring a separate start-function. | |
| 26 | + | |
| 27 | +- close: Same hints as for open apply. | |
| 28 | + | |
| 29 | +- write: Can simply go, all defined behaviour is taken care of by the framework, | |
| 30 | + i.e. ping on write and magic char ('V') handling. | |
| 31 | + | |
| 32 | +- ioctl: While the driver is allowed to have extensions to the IOCTL interface, | |
| 33 | + the most common ones are handled by the framework, supported by some assistance | |
| 34 | + from the driver: | |
| 35 | + | |
| 36 | + WDIOC_GETSUPPORT: | |
| 37 | + Returns the mandatory watchdog_info struct from the driver | |
| 38 | + | |
| 39 | + WDIOC_GETSTATUS: | |
| 40 | + Needs the status-callback defined, otherwise returns 0 | |
| 41 | + | |
| 42 | + WDIOC_GETBOOTSTATUS: | |
| 43 | + Needs the bootstatus member properly set. Make sure it is 0 if you | |
| 44 | + don't have further support! | |
| 45 | + | |
| 46 | + WDIOC_SETOPTIONS: | |
| 47 | + No preparations needed | |
| 48 | + | |
| 49 | + WDIOC_KEEPALIVE: | |
| 50 | + If wanted, options in watchdog_info need to have WDIOF_KEEPALIVEPING | |
| 51 | + set | |
| 52 | + | |
| 53 | + WDIOC_SETTIMEOUT: | |
| 54 | + Options in watchdog_info need to have WDIOF_SETTIMEOUT set | |
| 55 | + and a set_timeout-callback has to be defined. The core will also | |
| 56 | + do limit-checking, if min_timeout and max_timeout in the watchdog | |
| 57 | + device are set. All is optional. | |
| 58 | + | |
| 59 | + WDIOC_GETTIMEOUT: | |
| 60 | + No preparations needed | |
| 61 | + | |
| 62 | + Other IOCTLs can be served using the ioctl-callback. Note that this is mainly | |
| 63 | + intended for porting old drivers; new drivers should not invent private IOCTLs. | |
| 64 | + Private IOCTLs are processed first. When the callback returns with | |
| 65 | + -ENOIOCTLCMD, the IOCTLs of the framework will be tried, too. Any other error | |
| 66 | + is directly given to the user. | |
| 67 | + | |
| 68 | +Example conversion: | |
| 69 | + | |
| 70 | +-static const struct file_operations s3c2410wdt_fops = { | |
| 71 | +- .owner = THIS_MODULE, | |
| 72 | +- .llseek = no_llseek, | |
| 73 | +- .write = s3c2410wdt_write, | |
| 74 | +- .unlocked_ioctl = s3c2410wdt_ioctl, | |
| 75 | +- .open = s3c2410wdt_open, | |
| 76 | +- .release = s3c2410wdt_release, | |
| 77 | +-}; | |
| 78 | + | |
| 79 | +Check the functions for device-specific stuff and keep it for later | |
| 80 | +refactoring. The rest can go. | |
| 81 | + | |
| 82 | + | |
| 83 | +Remove the miscdevice | |
| 84 | +--------------------- | |
| 85 | + | |
| 86 | +Since the file_operations are gone now, you can also remove the 'struct | |
| 87 | +miscdevice'. The framework will create it on watchdog_dev_register() called by | |
| 88 | +watchdog_register_device(). | |
| 89 | + | |
| 90 | +-static struct miscdevice s3c2410wdt_miscdev = { | |
| 91 | +- .minor = WATCHDOG_MINOR, | |
| 92 | +- .name = "watchdog", | |
| 93 | +- .fops = &s3c2410wdt_fops, | |
| 94 | +-}; | |
| 95 | + | |
| 96 | + | |
| 97 | +Remove obsolete includes and defines | |
| 98 | +------------------------------------ | |
| 99 | + | |
| 100 | +Because of the simplifications, a few defines are probably unused now. Remove | |
| 101 | +them. Includes can be removed, too. For example: | |
| 102 | + | |
| 103 | +- #include <linux/fs.h> | |
| 104 | +- #include <linux/miscdevice.h> (if MODULE_ALIAS_MISCDEV is not used) | |
| 105 | +- #include <linux/uaccess.h> (if no custom IOCTLs are used) | |
| 106 | + | |
| 107 | + | |
| 108 | +Add the watchdog operations | |
| 109 | +--------------------------- | |
| 110 | + | |
| 111 | +All possible callbacks are defined in 'struct watchdog_ops'. You can find it | |
| 112 | +explained in 'watchdog-kernel-api.txt' in this directory. start(), stop() and | |
| 113 | +owner must be set, the rest are optional. You will easily find corresponding | |
| 114 | +functions in the old driver. Note that you will now get a pointer to the | |
| 115 | +watchdog_device as a parameter to these functions, so you probably have to | |
| 116 | +change the function header. Other changes are most likely not needed, because | |
| 117 | +here simply happens the direct hardware access. If you have device-specific | |
| 118 | +code left from the above steps, it should be refactored into these callbacks. | |
| 119 | + | |
| 120 | +Here is a simple example: | |
| 121 | + | |
| 122 | ++static struct watchdog_ops s3c2410wdt_ops = { | |
| 123 | ++ .owner = THIS_MODULE, | |
| 124 | ++ .start = s3c2410wdt_start, | |
| 125 | ++ .stop = s3c2410wdt_stop, | |
| 126 | ++ .ping = s3c2410wdt_keepalive, | |
| 127 | ++ .set_timeout = s3c2410wdt_set_heartbeat, | |
| 128 | ++}; | |
| 129 | + | |
| 130 | +A typical function-header change looks like: | |
| 131 | + | |
| 132 | +-static void s3c2410wdt_keepalive(void) | |
| 133 | ++static int s3c2410wdt_keepalive(struct watchdog_device *wdd) | |
| 134 | + { | |
| 135 | +... | |
| 136 | ++ | |
| 137 | ++ return 0; | |
| 138 | + } | |
| 139 | + | |
| 140 | +... | |
| 141 | + | |
| 142 | +- s3c2410wdt_keepalive(); | |
| 143 | ++ s3c2410wdt_keepalive(&s3c2410_wdd); | |
| 144 | + | |
| 145 | + | |
| 146 | +Add the watchdog device | |
| 147 | +----------------------- | |
| 148 | + | |
| 149 | +Now we need to create a 'struct watchdog_device' and populate it with the | |
| 150 | +necessary information for the framework. The struct is also explained in detail | |
| 151 | +in 'watchdog-kernel-api.txt' in this directory. We pass it the mandatory | |
| 152 | +watchdog_info struct and the newly created watchdog_ops. Often, old drivers | |
| 153 | +have their own record-keeping for things like bootstatus and timeout using | |
| 154 | +static variables. Those have to be converted to use the members in | |
| 155 | +watchdog_device. Note that the timeout values are unsigned int. Some drivers | |
| 156 | +use signed int, so this has to be converted, too. | |
| 157 | + | |
| 158 | +Here is a simple example for a watchdog device: | |
| 159 | + | |
| 160 | ++static struct watchdog_device s3c2410_wdd = { | |
| 161 | ++ .info = &s3c2410_wdt_ident, | |
| 162 | ++ .ops = &s3c2410wdt_ops, | |
| 163 | ++}; | |
| 164 | + | |
| 165 | + | |
| 166 | +Register the watchdog device | |
| 167 | +---------------------------- | |
| 168 | + | |
| 169 | +Replace misc_register(&miscdev) with watchdog_register_device(&watchdog_dev). | |
| 170 | +Make sure the return value gets checked and the error message, if present, | |
| 171 | +still fits. Also convert the unregister case. | |
| 172 | + | |
| 173 | +- ret = misc_register(&s3c2410wdt_miscdev); | |
| 174 | ++ ret = watchdog_register_device(&s3c2410_wdd); | |
| 175 | + | |
| 176 | +... | |
| 177 | + | |
| 178 | +- misc_deregister(&s3c2410wdt_miscdev); | |
| 179 | ++ watchdog_unregister_device(&s3c2410_wdd); | |
| 180 | + | |
| 181 | + | |
| 182 | +Update the Kconfig-entry | |
| 183 | +------------------------ | |
| 184 | + | |
| 185 | +The entry for the driver now needs to select WATCHDOG_CORE: | |
| 186 | + | |
| 187 | ++ select WATCHDOG_CORE | |
| 188 | + | |
| 189 | + | |
| 190 | +Create a patch and send it to upstream | |
| 191 | +-------------------------------------- | |
| 192 | + | |
| 193 | +Make sure you understood Documentation/SubmittingPatches and send your patch to | |
| 194 | +linux-watchdog@vger.kernel.org. We are looking forward to it :) | |
| 195 | + | |
| @@ -27,9 +27,6 @@ Some of these entries are: · 26 unmodified lines | ||
| 27 | 27 | magically-generated functions that make their way to do_IRQ with |
| 28 | 28 | the interrupt number as a parameter. |
| 29 | 29 | |
| 30 | − - emulate_vsyscall: int 0xcc, a special non-ABI entry used by | |
| 31 | − vsyscall emulation. | |
| 32 | − | |
| 33 | 30 | - APIC interrupts: Various special-purpose interrupts for things |
| 34 | 31 | like TLB shootdown. |
| 35 | 32 | |
| @@ -1,109 +0,0 @@ | ||
| 1 | −Chinese translated version of Documentation/SubmitChecklist | |
| 2 | − | |
| 3 | −If you have any comment or update to the content, please contact the | |
| 4 | −original document maintainer directly. However, if you have a problem | |
| 5 | −communicating in English you can also ask the Chinese maintainer for | |
| 6 | −help. Contact the Chinese maintainer if this translation is outdated | |
| 7 | −or if there is a problem with the translation. | |
| 8 | − | |
| 9 | −Chinese maintainer: Harry Wei <harryxiyou@gmail.com> | |
| 10 | −--------------------------------------------------------------------- | |
| 11 | −Documentation/SubmitChecklist �����ķ��� | |
| 12 | − | |
| 13 | −��������ۻ���±��ĵ����ݣ���ֱ����ϵԭ�ĵ���ά���ߡ������ʹ��Ӣ�� | |
| 14 | −���������ѵĻ���Ҳ���������İ�ά���������������������²���ʱ���߷� | |
| 15 | −��������⣬����ϵ���İ�ά���ߡ� | |
| 16 | − | |
| 17 | −���İ�ά���ߣ� ������ Harry Wei <harryxiyou@gmail.com> | |
| 18 | −���İ淭���ߣ� ������ Harry Wei <harryxiyou@gmail.com> | |
| 19 | −���İ�У���ߣ� ������ Harry Wei <harryxiyou@gmail.com> | |
| 20 | − | |
| 21 | − | |
| 22 | −����Ϊ���� | |
| 23 | −--------------------------------------------------------------------- | |
| 24 | −Linux�ں��ύ�嵥 | |
| 25 | −~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 26 | − | |
| 27 | −������һЩ�ں˿�����Ӧ�����Ļ������飬��������뿴���Լ����ں˲����ύ | |
| 28 | −�����ܵĸ��졣 | |
| 29 | − | |
| 30 | −��Щ���dz���Documentation/SubmittingPatches�ĵ������ṩ���Լ����� | |
| 31 | −�����ύLinux�ں˲�����˵���� | |
| 32 | − | |
| 33 | −1�������ʹ����һ��������ô��#include����/�����Ǹ����ܵ��Ǹ��ļ��� | |
| 34 | − ��Ҫ��������������붨��/�����Ǹ����ܵ�ͷ�ļ��� | |
| 35 | − | |
| 36 | −2������������û��߸���CONFIGѡ�� =y��=m������=n�� | |
| 37 | − ��Ҫ�б��뾯��/���� ��Ҫ�����Ӿ���/���� | |
| 38 | − | |
| 39 | −2b��ͨ�� allnoconfig, allmodconfig | |
| 40 | − | |
| 41 | −2c����ʹ�� 0=builddir �ɹ��ع��� | |
| 42 | − | |
| 43 | −3��ͨ��ʹ�ñ��ؽ�����빤��������һЩ�����������ڶ�CPU����Ϲ����� | |
| 44 | − | |
| 45 | −4��ppc64 ��һ���ܺõļ�齻�����Ŀ�ܣ���Ϊ�������ѡ�unsigned long�� | |
| 46 | − ��64λֵ��ʹ�á� | |
| 47 | − | |
| 48 | −5������Documentation/CodingStyle�ļ������ϸ����������㲹���������� | |
| 49 | − ʹ�ò�������������Υ��(scripts/checkpatch.pl)�����Ա�����ύ�� | |
| 50 | − ��Ӧ�õ����������㲹���е�����Υ�档 | |
| 51 | − | |
| 52 | −6���κθ��»��߸Ķ�CONFIGѡ����ܴ������ò˵��� | |
| 53 | − | |
| 54 | −7�����е�Kconfigѡ����¶�Ҫ��˵�����֡� | |
| 55 | − | |
| 56 | −8���Ѿ�������ܽ�����ص�Kconfig��ϡ����Ǻ���ͨ���������õ�--�����������½��� | |
| 57 | − | |
| 58 | −9�������м���ԡ� | |
| 59 | − | |
| 60 | −10��ʹ��'make checkstack'��'make namespacecheck'��飬Ȼ�������ҵ������⡣ | |
| 61 | − ע�⣺��ջ��鲻����ȷ�س������⣬�����κε�һ�������ڶ�ջ��ʹ�ö���512�ֽ� | |
| 62 | − ��Ҫ���ġ� | |
| 63 | − | |
| 64 | −11������kernel-doc��ȫ���ں�APIs�ļ�������Ҫ��̬�ĺ��������ǰ���Ҳ����ν���� | |
| 65 | − ʹ��'make htmldocs'����'make mandocs'�����kernel-doc��Ȼ�����κ� | |
| 66 | − ���ֵ����⡣ | |
| 67 | − | |
| 68 | −12���Ѿ�ͨ��CONFIG_PREEMPT, CONFIG_DEBUG_PREEMPT, | |
| 69 | − CONFIG_DEBUG_SLAB, CONFIG_DEBUG_PAGEALLOC, CONFIG_DEBUG_MUTEXES, | |
| 70 | − CONFIG_DEBUG_SPINLOCK, CONFIG_DEBUG_ATOMIC_SLEEP���ԣ�����ͬʱ�� | |
| 71 | − ʹ�ܡ� | |
| 72 | − | |
| 73 | −13���Ѿ�����������ʹ�û��߲�ʹ�� CONFIG_SMP �� CONFIG_PREEMPT����ִ��ʱ�䡣 | |
| 74 | − | |
| 75 | −14���������Ӱ��IO/Disk���ȵȣ��Ѿ�ͨ��ʹ�û��߲�ʹ�� CONFIG_LBDAF ���ԡ� | |
| 76 | − | |
| 77 | −15�����е�codepaths�Ѿ���ʹ����lockdep���ù��ܡ� | |
| 78 | − | |
| 79 | −16�����е�/proc��¼���¶�Ҫ�����ļ�����Documentation/Ŀ¼�¡� | |
| 80 | − | |
| 81 | −17�����е��ں������������¶�����¼��Documentation/kernel-parameters.txt�ļ��С� | |
| 82 | − | |
| 83 | −18�����е�ģ��������¶���MODULE_PARM_DESC()��¼�� | |
| 84 | − | |
| 85 | −19�����е��û��ռ�ӿڸ��¶�����¼��Documentation/ABI/���鿴Documentation/ABI/README | |
| 86 | − ���Ի�ø������Ϣ���ı��û��ռ�ӿڵIJ���Ӧ�ñ��ʼ�����linux-api@vger.kernel.org�� | |
| 87 | − | |
| 88 | −20��������Dz��Ƕ�ͨ��`make headers_check'�� | |
| 89 | − | |
| 90 | −21���Ѿ�ͨ����������slab��page-allocationʧ�ܼ�顣�鿴Documentation/fault-injection/�� | |
| 91 | − | |
| 92 | −22���¼����Դ���Ѿ�ͨ��`gcc -W'��ʹ��"make EXTRA_CFLAGS=-W"�����롣�����������ܶෳ�գ� | |
| 93 | − ���Ƕ���Ѱ��©�������洦������:"warning: comparison between signed and unsigned"�� | |
| 94 | − | |
| 95 | −23���������ϲ���-mm���������ٲ��ԣ�����ȷ�����ǷͲ��������е���������һ�����Լ���VM��VFS | |
| 96 | − ��������ϵͳ�и����仯�� | |
| 97 | − | |
| 98 | −24�����е��ڴ�����{e.g., barrier(), rmb(), wmb()}��Ҫ��Դ�����е�һ��ע�����������Ƕ��Ǹ�ʲô�� | |
| 99 | − �Լ�ԭ�� | |
| 100 | − | |
| 101 | −25��������κ�����������ƵIJ��������ӣ�ҲҪ����Documentation/ioctl/ioctl-number.txt�� | |
| 102 | − | |
| 103 | −26�������ĸ��Ĵ�����������ʹ���κε��ں�APIs�����������kconfig�����й�ϵ�Ĺ��ܣ����Ҫ | |
| 104 | − ʹ����ص�kconfig���Źرգ� and/or =m�����ѡ���ṩ��[��ͬһʱ�䲻�����õĶ����ã����������������� | |
| 105 | − �������]�� | |
| 106 | − | |
| 107 | − CONFIG_SMP, CONFIG_SYSFS, CONFIG_PROC_FS, CONFIG_INPUT, CONFIG_PCI, | |
| 108 | − CONFIG_BLOCK, CONFIG_PM, CONFIG_HOTPLUG, CONFIG_MAGIC_SYSRQ, | |
| 109 | − CONFIG_NET, CONFIG_INET=n (��һ��ʹ�� CONFIG_NET=y) | |
| @@ -88,11 +88,13 @@ $(obj)/$(offsets-file): arch/$(SRCARCH)/kernel/asm-offsets.s Kbuild · 87 unmodified lines | ||
| 88 | 88 | # 3) Check for missing system calls |
| 89 | 89 | # |
| 90 | 90 | |
| 91 | +always += missing-syscalls | |
| 92 | +targets += missing-syscalls | |
| 93 | + | |
| 91 | 94 | quiet_cmd_syscalls = CALL $< |
| 92 | − cmd_syscalls = $(CONFIG_SHELL) $< $(CC) $(c_flags) | |
| 95 | + cmd_syscalls = $(CONFIG_SHELL) $< $(CC) $(c_flags) $(missing_syscalls_flags) | |
| 93 | 96 | |
| 94 | −PHONY += missing-syscalls | |
| 95 | −missing-syscalls: scripts/checksyscalls.sh FORCE | |
| 97 | +missing-syscalls: scripts/checksyscalls.sh $(offsets-file) FORCE | |
| 96 | 98 | $(call cmd,syscalls) |
| 97 | 99 | |
| 98 | 100 | # Keep these two files during make clean |
| @@ -117,20 +117,20 @@ Maintainers List (try to look for most precise areas first) · 116 unmodified lines | ||
| 117 | 117 | M: Philip Blundell <philb@gnu.org> |
| 118 | 118 | L: netdev@vger.kernel.org |
| 119 | 119 | S: Maintained |
| 120 | −F: drivers/net/3c505* | |
| 120 | +F: drivers/net/ethernet/i825xx/3c505* | |
| 121 | 121 | |
| 122 | 122 | 3C59X NETWORK DRIVER |
| 123 | 123 | M: Steffen Klassert <klassert@mathematik.tu-chemnitz.de> |
| 124 | 124 | L: netdev@vger.kernel.org |
| 125 | 125 | S: Maintained |
| 126 | 126 | F: Documentation/networking/vortex.txt |
| 127 | −F: drivers/net/3c59x.c | |
| 127 | +F: drivers/net/ethernet/3com/3c59x.c | |
| 128 | 128 | |
| 129 | 129 | 3CR990 NETWORK DRIVER |
| 130 | 130 | M: David Dillow <dave@thedillows.org> |
| 131 | 131 | L: netdev@vger.kernel.org |
| 132 | 132 | S: Maintained |
| 133 | −F: drivers/net/typhoon* | |
| 133 | +F: drivers/net/ethernet/3com/typhoon* | |
| 134 | 134 | |
| 135 | 135 | 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) |
| 136 | 136 | M: Adam Radford <linuxraid@lsi.com> |
| @@ -156,7 +156,7 @@ M: Realtek linux nic maintainers <nic_swsd@realtek.com> · 19 unmodified lines | ||
| 156 | 156 | M: Francois Romieu <romieu@fr.zoreil.com> |
| 157 | 157 | L: netdev@vger.kernel.org |
| 158 | 158 | S: Maintained |
| 159 | −F: drivers/net/r8169.c | |
| 159 | +F: drivers/net/ethernet/realtek/r8169.c | |
| 160 | 160 | |
| 161 | 161 | 8250/16?50 (AND CLONE UARTS) SERIAL DRIVER |
| 162 | 162 | M: Greg Kroah-Hartman <gregkh@suse.de> |
| @@ -170,8 +170,7 @@ F: include/linux/serial_8250.h · 7 unmodified lines | ||
| 170 | 170 | 8390 NETWORK DRIVERS [WD80x3/SMC-ELITE, SMC-ULTRA, NE2000, 3C503, etc.] |
| 171 | 171 | L: netdev@vger.kernel.org |
| 172 | 172 | S: Orphan / Obsolete |
| 173 | −F: drivers/net/*8390* | |
| 174 | −F: drivers/net/ax88796.c | |
| 173 | +F: drivers/net/ethernet/8390/ | |
| 175 | 174 | |
| 176 | 175 | 9P FILE SYSTEM |
| 177 | 176 | M: Eric Van Hensbergen <ericvh@gmail.com> |
| @@ -214,7 +213,7 @@ ACENIC DRIVER · 36 unmodified lines | ||
| 214 | 213 | M: Jes Sorensen <jes@trained-monkey.org> |
| 215 | 214 | L: linux-acenic@sunsite.dk |
| 216 | 215 | S: Maintained |
| 217 | −F: drivers/net/acenic* | |
| 216 | +F: drivers/net/ethernet/alteon/acenic* | |
| 218 | 217 | |
| 219 | 218 | ACER ASPIRE ONE TEMPERATURE AND FAN DRIVER |
| 220 | 219 | M: Peter Feuerer <peter@piie.net> |
| @@ -317,6 +316,10 @@ W: http://wiki.analog.com/AD7879 · 96 unmodified lines | ||
| 317 | 316 | S: Supported |
| 318 | 317 | F: drivers/input/touchscreen/ad7879.c |
| 319 | 318 | |
| 319 | +ADDRESS SPACE LAYOUT RANDOMIZATION (ASLR) | |
| 320 | +M: Jiri Kosina <jkosina@suse.cz> | |
| 321 | +S: Maintained | |
| 322 | + | |
| 320 | 323 | ADM1025 HARDWARE MONITOR DRIVER |
| 321 | 324 | M: Jean Delvare <khali@linux-fr.org> |
| 322 | 325 | L: lm-sensors@lm-sensors.org |
| @@ -530,6 +533,7 @@ S: Maintained · 207 unmodified lines | ||
| 530 | 533 | F: drivers/infiniband/hw/amso1100/ |
| 531 | 534 | |
| 532 | 535 | ANALOG DEVICES INC ASOC CODEC DRIVERS |
| 536 | +M: Lars-Peter Clausen <lars@metafoo.de> | |
| 533 | 537 | L: device-drivers-devel@blackfin.uclinux.org |
| 534 | 538 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) |
| 535 | 539 | W: http://wiki.analog.com/ |
| @@ -688,6 +692,12 @@ F: drivers/mtd/nand/bcm_umi_nand.c · 152 unmodified lines | ||
| 688 | 692 | F: drivers/mtd/nand/bcm_umi_bch.c |
| 689 | 693 | F: drivers/mtd/nand/nand_bcm_umi.h |
| 690 | 694 | |
| 695 | +ARM/CALXEDA HIGHBANK ARCHITECTURE | |
| 696 | +M: Rob Herring <rob.herring@calxeda.com> | |
| 697 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 698 | +S: Maintained | |
| 699 | +F: arch/arm/mach-highbank/ | |
| 700 | + | |
| 691 | 701 | ARM/CAVIUM NETWORKS CNS3XXX MACHINE SUPPORT |
| 692 | 702 | M: Anton Vorontsov <avorontsov@mvista.com> |
| 693 | 703 | S: Maintained |
| @@ -746,7 +756,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 52 unmodified lines | ||
| 746 | 756 | W: http://www.arm.linux.org.uk/ |
| 747 | 757 | S: Maintained |
| 748 | 758 | F: arch/arm/mach-ebsa110/ |
| 749 | −F: drivers/net/arm/am79c961a.* | |
| 759 | +F: drivers/net/ethernet/amd/am79c961a.* | |
| 750 | 760 | |
| 751 | 761 | ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6) |
| 752 | 762 | M: Daniel Ribeiro <drwyrm@gmail.com> |
| @@ -787,6 +797,13 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 34 unmodified lines | ||
| 787 | 797 | S: Maintained |
| 788 | 798 | F: arch/arm/mach-mx5/ |
| 789 | 799 | |
| 800 | +ARM/FREESCALE IMX6 | |
| 801 | +M: Shawn Guo <shawn.guo@linaro.org> | |
| 802 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 803 | +S: Maintained | |
| 804 | +T: git git://git.linaro.org/people/shawnguo/linux-2.6.git | |
| 805 | +F: arch/arm/mach-imx/*imx6* | |
| 806 | + | |
| 790 | 807 | ARM/GLOMATION GESBC9312SX MACHINE SUPPORT |
| 791 | 808 | M: Lennert Buytenhek <kernel@wantstofly.org> |
| 792 | 809 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| @@ -1015,7 +1032,9 @@ F: arch/arm/include/asm/hardware/ioc.h · 222 unmodified lines | ||
| 1015 | 1032 | F: arch/arm/include/asm/hardware/iomd.h |
| 1016 | 1033 | F: arch/arm/include/asm/hardware/memc.h |
| 1017 | 1034 | F: arch/arm/mach-rpc/ |
| 1018 | −F: drivers/net/arm/ether* | |
| 1035 | +F: drivers/net/ethernet/8390/etherh.c | |
| 1036 | +F: drivers/net/ethernet/i825xx/ether1* | |
| 1037 | +F: drivers/net/ethernet/seeq/ether3* | |
| 1019 | 1038 | F: drivers/scsi/arm/ |
| 1020 | 1039 | |
| 1021 | 1040 | ARM/SHARK MACHINE SUPPORT |
| @@ -1084,6 +1103,25 @@ F: arch/arm/plat-s5p/dev-fimc* · 62 unmodified lines | ||
| 1084 | 1103 | F: arch/arm/plat-samsung/include/plat/*fimc* |
| 1085 | 1104 | F: drivers/media/video/s5p-fimc/ |
| 1086 | 1105 | |
| 1106 | +ARM/SAMSUNG S5P SERIES Multi Format Codec (MFC) SUPPORT | |
| 1107 | +M: Kyungmin Park <kyungmin.park@samsung.com> | |
| 1108 | +M: Kamil Debski <k.debski@samsung.com> | |
| 1109 | +M: Jeongtae Park <jtp.park@samsung.com> | |
| 1110 | +L: linux-arm-kernel@lists.infradead.org | |
| 1111 | +L: linux-media@vger.kernel.org | |
| 1112 | +S: Maintained | |
| 1113 | +F: arch/arm/plat-s5p/dev-mfc.c | |
| 1114 | +F: drivers/media/video/s5p-mfc/ | |
| 1115 | + | |
| 1116 | +ARM/SAMSUNG S5P SERIES TV SUBSYSTEM SUPPORT | |
| 1117 | +M: Kyungmin Park <kyungmin.park@samsung.com> | |
| 1118 | +M: Tomasz Stanislawski <t.stanislaws@samsung.com> | |
| 1119 | +L: linux-arm-kernel@lists.infradead.org | |
| 1120 | +L: linux-media@vger.kernel.org | |
| 1121 | +S: Maintained | |
| 1122 | +F: arch/arm/plat-s5p/dev-tv.c | |
| 1123 | +F: drivers/media/video/s5p-tv/ | |
| 1124 | + | |
| 1087 | 1125 | ARM/SHMOBILE ARM ARCHITECTURE |
| 1088 | 1126 | M: Paul Mundt <lethal@linux-sh.org> |
| 1089 | 1127 | M: Magnus Damm <magnus.damm@gmail.com> |
| @@ -1127,7 +1165,7 @@ F: arch/arm/mach-nuc93x/ · 37 unmodified lines | ||
| 1127 | 1165 | F: drivers/input/keyboard/w90p910_keypad.c |
| 1128 | 1166 | F: drivers/input/touchscreen/w90p910_ts.c |
| 1129 | 1167 | F: drivers/watchdog/nuc900_wdt.c |
| 1130 | −F: drivers/net/arm/w90p910_ether.c | |
| 1168 | +F: drivers/net/ethernet/nuvoton/w90p910_ether.c | |
| 1131 | 1169 | F: drivers/mtd/nand/nuc900_nand.c |
| 1132 | 1170 | F: drivers/rtc/rtc-nuc900.c |
| 1133 | 1171 | F: drivers/spi/spi_nuc900.c |
| @@ -1230,7 +1268,7 @@ F: Documentation/aoe/ · 96 unmodified lines | ||
| 1230 | 1268 | F: drivers/block/aoe/ |
| 1231 | 1269 | |
| 1232 | 1270 | ATHEROS ATH GENERIC UTILITIES |
| 1233 | −M: "Luis R. Rodriguez" <lrodriguez@atheros.com> | |
| 1271 | +M: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com> | |
| 1234 | 1272 | L: linux-wireless@vger.kernel.org |
| 1235 | 1273 | S: Supported |
| 1236 | 1274 | F: drivers/net/wireless/ath/* |
| @@ -1238,7 +1276,7 @@ F: drivers/net/wireless/ath/* · 1 unmodified line | ||
| 1238 | 1276 | ATHEROS ATH5K WIRELESS DRIVER |
| 1239 | 1277 | M: Jiri Slaby <jirislaby@gmail.com> |
| 1240 | 1278 | M: Nick Kossifidis <mickflemm@gmail.com> |
| 1241 | −M: "Luis R. Rodriguez" <lrodriguez@atheros.com> | |
| 1279 | +M: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com> | |
| 1242 | 1280 | M: Bob Copeland <me@bobcopeland.com> |
| 1243 | 1281 | L: linux-wireless@vger.kernel.org |
| 1244 | 1282 | L: ath5k-devel@lists.ath5k.org |
| @@ -1246,11 +1284,19 @@ W: http://wireless.kernel.org/en/users/Drivers/ath5k · 1 unmodified line | ||
| 1246 | 1284 | S: Maintained |
| 1247 | 1285 | F: drivers/net/wireless/ath/ath5k/ |
| 1248 | 1286 | |
| 1287 | +ATHEROS ATH6KL WIRELESS DRIVER | |
| 1288 | +M: Kalle Valo <kvalo@qca.qualcomm.com> | |
| 1289 | +L: linux-wireless@vger.kernel.org | |
| 1290 | +W: http://wireless.kernel.org/en/users/Drivers/ath6kl | |
| 1291 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath6kl.git | |
| 1292 | +S: Supported | |
| 1293 | +F: drivers/net/wireless/ath/ath6kl/ | |
| 1294 | + | |
| 1249 | 1295 | ATHEROS ATH9K WIRELESS DRIVER |
| 1250 | −M: "Luis R. Rodriguez" <lrodriguez@atheros.com> | |
| 1251 | −M: Jouni Malinen <jmalinen@atheros.com> | |
| 1252 | −M: Vasanthakumar Thiagarajan <vasanth@atheros.com> | |
| 1253 | −M: Senthil Balasubramanian <senthilkumar@atheros.com> | |
| 1296 | +M: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com> | |
| 1297 | +M: Jouni Malinen <jouni@qca.qualcomm.com> | |
| 1298 | +M: Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com> | |
| 1299 | +M: Senthil Balasubramanian <senthilb@qca.qualcomm.com> | |
| 1254 | 1300 | L: linux-wireless@vger.kernel.org |
| 1255 | 1301 | L: ath9k-devel@lists.ath9k.org |
| 1256 | 1302 | W: http://wireless.kernel.org/en/users/Drivers/ath9k |
| @@ -1282,7 +1328,7 @@ L: netdev@vger.kernel.org · 25 unmodified lines | ||
| 1282 | 1328 | W: http://sourceforge.net/projects/atl1 |
| 1283 | 1329 | W: http://atl1.sourceforge.net |
| 1284 | 1330 | S: Maintained |
| 1285 | −F: drivers/net/atlx/ | |
| 1331 | +F: drivers/net/ethernet/atheros/ | |
| 1286 | 1332 | |
| 1287 | 1333 | ATM |
| 1288 | 1334 | M: Chas Williams <chas@cmf.nrl.navy.mil> |
| @@ -1322,7 +1368,7 @@ F: include/video/atmel_lcdc.h · 33 unmodified lines | ||
| 1322 | 1368 | ATMEL MACB ETHERNET DRIVER |
| 1323 | 1369 | M: Nicolas Ferre <nicolas.ferre@atmel.com> |
| 1324 | 1370 | S: Supported |
| 1325 | −F: drivers/net/macb.* | |
| 1371 | +F: drivers/net/ethernet/cadence/ | |
| 1326 | 1372 | |
| 1327 | 1373 | ATMEL SPI DRIVER |
| 1328 | 1374 | M: Nicolas Ferre <nicolas.ferre@atmel.com> |
| @@ -1445,7 +1491,7 @@ BLACKFIN EMAC DRIVER · 116 unmodified lines | ||
| 1445 | 1491 | L: uclinux-dist-devel@blackfin.uclinux.org |
| 1446 | 1492 | W: http://blackfin.uclinux.org |
| 1447 | 1493 | S: Supported |
| 1448 | −F: drivers/net/bfin_mac.* | |
| 1494 | +F: drivers/net/ethernet/adi/ | |
| 1449 | 1495 | |
| 1450 | 1496 | BLACKFIN RTC DRIVER |
| 1451 | 1497 | M: Mike Frysinger <vapier.adi@gmail.com> |
| @@ -1526,27 +1572,27 @@ BROADCOM B44 10/100 ETHERNET DRIVER · 74 unmodified lines | ||
| 1526 | 1572 | M: Gary Zambrano <zambrano@broadcom.com> |
| 1527 | 1573 | L: netdev@vger.kernel.org |
| 1528 | 1574 | S: Supported |
| 1529 | −F: drivers/net/b44.* | |
| 1575 | +F: drivers/net/ethernet/broadcom/b44.* | |
| 1530 | 1576 | |
| 1531 | 1577 | BROADCOM BNX2 GIGABIT ETHERNET DRIVER |
| 1532 | 1578 | M: Michael Chan <mchan@broadcom.com> |
| 1533 | 1579 | L: netdev@vger.kernel.org |
| 1534 | 1580 | S: Supported |
| 1535 | −F: drivers/net/bnx2.* | |
| 1536 | −F: drivers/net/bnx2_* | |
| 1581 | +F: drivers/net/ethernet/broadcom/bnx2.* | |
| 1582 | +F: drivers/net/ethernet/broadcom/bnx2_* | |
| 1537 | 1583 | |
| 1538 | 1584 | BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER |
| 1539 | 1585 | M: Eilon Greenstein <eilong@broadcom.com> |
| 1540 | 1586 | L: netdev@vger.kernel.org |
| 1541 | 1587 | S: Supported |
| 1542 | −F: drivers/net/bnx2x/ | |
| 1588 | +F: drivers/net/ethernet/broadcom/bnx2x/ | |
| 1543 | 1589 | |
| 1544 | 1590 | BROADCOM TG3 GIGABIT ETHERNET DRIVER |
| 1545 | 1591 | M: Matt Carlson <mcarlson@broadcom.com> |
| 1546 | 1592 | M: Michael Chan <mchan@broadcom.com> |
| 1547 | 1593 | L: netdev@vger.kernel.org |
| 1548 | 1594 | S: Supported |
| 1549 | −F: drivers/net/tg3.* | |
| 1595 | +F: drivers/net/ethernet/broadcom/tg3.* | |
| 1550 | 1596 | |
| 1551 | 1597 | BROADCOM BRCM80211 IEEE802.11n WIRELESS DRIVER |
| 1552 | 1598 | M: Brett Rudley <brudley@broadcom.com> |
| @@ -1575,7 +1621,7 @@ BROCADE BNA 10 GIGABIT ETHERNET DRIVER · 22 unmodified lines | ||
| 1575 | 1621 | M: Rasesh Mody <rmody@brocade.com> |
| 1576 | 1622 | L: netdev@vger.kernel.org |
| 1577 | 1623 | S: Supported |
| 1578 | −F: drivers/net/bna/ | |
| 1624 | +F: drivers/net/ethernet/brocade/bna/ | |
| 1579 | 1625 | |
| 1580 | 1626 | BSG (block layer generic sg v4 driver) |
| 1581 | 1627 | M: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> |
| @@ -1663,7 +1709,7 @@ CAN NETWORK LAYER · 81 unmodified lines | ||
| 1663 | 1709 | M: Oliver Hartkopp <socketcan@hartkopp.net> |
| 1664 | 1710 | M: Oliver Hartkopp <oliver.hartkopp@volkswagen.de> |
| 1665 | 1711 | M: Urs Thuermann <urs.thuermann@volkswagen.de> |
| 1666 | −L: socketcan-core@lists.berlios.de (subscribers-only) | |
| 1712 | +L: linux-can@vger.kernel.org | |
| 1667 | 1713 | L: netdev@vger.kernel.org |
| 1668 | 1714 | W: http://developer.berlios.de/projects/socketcan/ |
| 1669 | 1715 | S: Maintained |
| @@ -1672,10 +1718,11 @@ F: include/linux/can.h · 2 unmodified lines | ||
| 1672 | 1718 | F: include/linux/can/core.h |
| 1673 | 1719 | F: include/linux/can/bcm.h |
| 1674 | 1720 | F: include/linux/can/raw.h |
| 1721 | +F: include/linux/can/gw.h | |
| 1675 | 1722 | |
| 1676 | 1723 | CAN NETWORK DRIVERS |
| 1677 | 1724 | M: Wolfgang Grandegger <wg@grandegger.com> |
| 1678 | −L: socketcan-core@lists.berlios.de (subscribers-only) | |
| 1725 | +L: linux-can@vger.kernel.org | |
| 1679 | 1726 | L: netdev@vger.kernel.org |
| 1680 | 1727 | W: http://developer.berlios.de/projects/socketcan/ |
| 1681 | 1728 | S: Maintained |
| @@ -1759,13 +1806,13 @@ M: Christian Benvenuti <benve@cisco.com> · 77 unmodified lines | ||
| 1759 | 1806 | M: Roopa Prabhu <roprabhu@cisco.com> |
| 1760 | 1807 | M: David Wang <dwang2@cisco.com> |
| 1761 | 1808 | S: Supported |
| 1762 | −F: drivers/net/enic/ | |
| 1809 | +F: drivers/net/ethernet/cisco/enic/ | |
| 1763 | 1810 | |
| 1764 | 1811 | CIRRUS LOGIC EP93XX ETHERNET DRIVER |
| 1765 | 1812 | M: Hartley Sweeten <hsweeten@visionengravers.com> |
| 1766 | 1813 | L: netdev@vger.kernel.org |
| 1767 | 1814 | S: Maintained |
| 1768 | −F: drivers/net/arm/ep93xx_eth.c | |
| 1815 | +F: drivers/net/ethernet/cirrus/ep93xx_eth.c | |
| 1769 | 1816 | |
| 1770 | 1817 | CIRRUS LOGIC EP93XX OHCI USB HOST DRIVER |
| 1771 | 1818 | M: Lennert Buytenhek <kernel@wantstofly.org> |
| @@ -1905,7 +1952,7 @@ CPMAC ETHERNET DRIVER · 133 unmodified lines | ||
| 1905 | 1952 | M: Florian Fainelli <florian@openwrt.org> |
| 1906 | 1953 | L: netdev@vger.kernel.org |
| 1907 | 1954 | S: Maintained |
| 1908 | −F: drivers/net/cpmac.c | |
| 1955 | +F: drivers/net/ethernet/ti/cpmac.c | |
| 1909 | 1956 | |
| 1910 | 1957 | CPU FREQUENCY DRIVERS |
| 1911 | 1958 | M: Dave Jones <davej@redhat.com> |
| @@ -1992,7 +2039,7 @@ M: Divy Le Ray <divy@chelsio.com> · 80 unmodified lines | ||
| 1992 | 2039 | L: netdev@vger.kernel.org |
| 1993 | 2040 | W: http://www.chelsio.com |
| 1994 | 2041 | S: Supported |
| 1995 | −F: drivers/net/cxgb3/ | |
| 2042 | +F: drivers/net/ethernet/chelsio/cxgb3/ | |
| 1996 | 2043 | |
| 1997 | 2044 | CXGB3 IWARP RNIC DRIVER (IW_CXGB3) |
| 1998 | 2045 | M: Steve Wise <swise@chelsio.com> |
| @@ -2006,7 +2053,7 @@ M: Dimitris Michailidis <dm@chelsio.com> · 7 unmodified lines | ||
| 2006 | 2053 | L: netdev@vger.kernel.org |
| 2007 | 2054 | W: http://www.chelsio.com |
| 2008 | 2055 | S: Supported |
| 2009 | −F: drivers/net/cxgb4/ | |
| 2056 | +F: drivers/net/ethernet/chelsio/cxgb4/ | |
| 2010 | 2057 | |
| 2011 | 2058 | CXGB4 IWARP RNIC DRIVER (IW_CXGB4) |
| 2012 | 2059 | M: Steve Wise <swise@chelsio.com> |
| @@ -2020,14 +2067,14 @@ M: Casey Leedom <leedom@chelsio.com> · 7 unmodified lines | ||
| 2020 | 2067 | L: netdev@vger.kernel.org |
| 2021 | 2068 | W: http://www.chelsio.com |
| 2022 | 2069 | S: Supported |
| 2023 | −F: drivers/net/cxgb4vf/ | |
| 2070 | +F: drivers/net/ethernet/chelsio/cxgb4vf/ | |
| 2024 | 2071 | |
| 2025 | 2072 | STMMAC ETHERNET DRIVER |
| 2026 | 2073 | M: Giuseppe Cavallaro <peppe.cavallaro@st.com> |
| 2027 | 2074 | L: netdev@vger.kernel.org |
| 2028 | 2075 | W: http://www.stlinux.com |
| 2029 | 2076 | S: Supported |
| 2030 | −F: drivers/net/stmmac/ | |
| 2077 | +F: drivers/net/ethernet/stmicro/stmmac/ | |
| 2031 | 2078 | |
| 2032 | 2079 | CYBERPRO FB DRIVER |
| 2033 | 2080 | M: Russell King <linux@arm.linux.org.uk> |
| @@ -2071,7 +2118,7 @@ DAVICOM FAST ETHERNET (DMFE) NETWORK DRIVER · 37 unmodified lines | ||
| 2071 | 2118 | L: netdev@vger.kernel.org |
| 2072 | 2119 | S: Orphan |
| 2073 | 2120 | F: Documentation/networking/dmfe.txt |
| 2074 | −F: drivers/net/tulip/dmfe.c | |
| 2121 | +F: drivers/net/ethernet/tulip/dmfe.c | |
| 2075 | 2122 | |
| 2076 | 2123 | DC390/AM53C974 SCSI driver |
| 2077 | 2124 | M: Kurt Garloff <garloff@suse.de> |
| @@ -2110,7 +2157,7 @@ F: net/decnet/ · 32 unmodified lines | ||
| 2110 | 2157 | DEFXX FDDI NETWORK DRIVER |
| 2111 | 2158 | M: "Maciej W. Rozycki" <macro@linux-mips.org> |
| 2112 | 2159 | S: Maintained |
| 2113 | −F: drivers/net/defxx.* | |
| 2160 | +F: drivers/net/fddi/defxx.* | |
| 2114 | 2161 | |
| 2115 | 2162 | DELL LAPTOP DRIVER |
| 2116 | 2163 | M: Matthew Garrett <mjg59@srcf.ucam.org> |
| @@ -2136,6 +2183,14 @@ M: Matthew Garrett <mjg59@srcf.ucam.org> · 19 unmodified lines | ||
| 2136 | 2183 | S: Maintained |
| 2137 | 2184 | F: drivers/platform/x86/dell-wmi.c |
| 2138 | 2185 | |
| 2186 | +DESIGNWARE USB3 DRD IP DRIVER | |
| 2187 | +M: Felipe Balbi <balbi@ti.com> | |
| 2188 | +L: linux-usb@vger.kernel.org | |
| 2189 | +L: linux-omap@vger.kernel.org | |
| 2190 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git | |
| 2191 | +S: Maintained | |
| 2192 | +F: drivers/usb/dwc3/ | |
| 2193 | + | |
| 2139 | 2194 | DEVICE NUMBER REGISTRY |
| 2140 | 2195 | M: Torben Mathiasen <device@lanana.org> |
| 2141 | 2196 | W: http://lanana.org/docs/device-list/index.html |
| @@ -2288,12 +2343,25 @@ S: Supported · 146 unmodified lines | ||
| 2288 | 2343 | F: drivers/gpu/drm/i915 |
| 2289 | 2344 | F: include/drm/i915* |
| 2290 | 2345 | |
| 2346 | +DRM DRIVERS FOR EXYNOS | |
| 2347 | +M: Inki Dae <inki.dae@samsung.com> | |
| 2348 | +L: dri-devel@lists.freedesktop.org | |
| 2349 | +S: Supported | |
| 2350 | +F: drivers/gpu/drm/exynos | |
| 2351 | +F: include/drm/exynos* | |
| 2352 | + | |
| 2291 | 2353 | DSCC4 DRIVER |
| 2292 | 2354 | M: Francois Romieu <romieu@fr.zoreil.com> |
| 2293 | 2355 | L: netdev@vger.kernel.org |
| 2294 | 2356 | S: Maintained |
| 2295 | 2357 | F: drivers/net/wan/dscc4.c |
| 2296 | 2358 | |
| 2359 | +DYNAMIC DEBUG | |
| 2360 | +M: Jason Baron <jbaron@redhat.com> | |
| 2361 | +S: Maintained | |
| 2362 | +F: lib/dynamic_debug.c | |
| 2363 | +F: include/linux/dynamic_debug.h | |
| 2364 | + | |
| 2297 | 2365 | DZ DECSTATION DZ11 SERIAL DRIVER |
| 2298 | 2366 | M: "Maciej W. Rozycki" <macro@linux-mips.org> |
| 2299 | 2367 | S: Maintained |
| @@ -2328,7 +2396,7 @@ F: include/linux/netfilter_bridge/ebt_*.h · 28 unmodified lines | ||
| 2328 | 2396 | F: net/bridge/netfilter/ebt*.c |
| 2329 | 2397 | |
| 2330 | 2398 | ECRYPT FILE SYSTEM |
| 2331 | −M: Tyler Hicks <tyhicks@linux.vnet.ibm.com> | |
| 2399 | +M: Tyler Hicks <tyhicks@canonical.com> | |
| 2332 | 2400 | M: Dustin Kirkland <kirkland@canonical.com> |
| 2333 | 2401 | L: ecryptfs@vger.kernel.org |
| 2334 | 2402 | W: https://launchpad.net/ecryptfs |
| @@ -2409,8 +2477,6 @@ L: linux-edac@vger.kernel.org · 74 unmodified lines | ||
| 2409 | 2477 | W: bluesmoke.sourceforge.net |
| 2410 | 2478 | S: Maintained |
| 2411 | 2479 | F: drivers/edac/i7core_edac.c |
| 2412 | −F: drivers/edac/edac_mce.c | |
| 2413 | −F: include/linux/edac_mce.h | |
| 2414 | 2480 | |
| 2415 | 2481 | EDAC-I82975X |
| 2416 | 2482 | M: Ranganathan Desikan <ravi@jetztechnologies.com> |
| @@ -2434,6 +2500,13 @@ W: bluesmoke.sourceforge.net · 17 unmodified lines | ||
| 2434 | 2500 | S: Maintained |
| 2435 | 2501 | F: drivers/edac/r82600_edac.c |
| 2436 | 2502 | |
| 2503 | +EDAC-SBRIDGE | |
| 2504 | +M: Mauro Carvalho Chehab <mchehab@redhat.com> | |
| 2505 | +L: linux-edac@vger.kernel.org | |
| 2506 | +W: bluesmoke.sourceforge.net | |
| 2507 | +S: Maintained | |
| 2508 | +F: drivers/edac/sb_edac.c | |
| 2509 | + | |
| 2437 | 2510 | EDIROL UA-101/UA-1000 DRIVER |
| 2438 | 2511 | M: Clemens Ladisch <clemens@ladisch.de> |
| 2439 | 2512 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) |
| @@ -2463,7 +2536,7 @@ EHEA (IBM pSeries eHEA 10Gb ethernet adapter) DRIVER · 23 unmodified lines | ||
| 2463 | 2536 | M: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com> |
| 2464 | 2537 | L: netdev@vger.kernel.org |
| 2465 | 2538 | S: Maintained |
| 2466 | −F: drivers/net/ehea/ | |
| 2539 | +F: drivers/net/ethernet/ibm/ehea/ | |
| 2467 | 2540 | |
| 2468 | 2541 | EMBEDDED LINUX |
| 2469 | 2542 | M: Paul Gortmaker <paul.gortmaker@windriver.com> |
| @@ -2508,7 +2581,7 @@ ETHEREXPRESS-16 NETWORK DRIVER · 38 unmodified lines | ||
| 2508 | 2581 | M: Philip Blundell <philb@gnu.org> |
| 2509 | 2582 | L: netdev@vger.kernel.org |
| 2510 | 2583 | S: Maintained |
| 2511 | −F: drivers/net/eexpress.* | |
| 2584 | +F: drivers/net/ethernet/i825xx/eexpress.* | |
| 2512 | 2585 | |
| 2513 | 2586 | ETHERNET BRIDGE |
| 2514 | 2587 | M: Stephen Hemminger <shemminger@linux-foundation.org> |
| @@ -2522,7 +2595,7 @@ F: net/bridge/ · 7 unmodified lines | ||
| 2522 | 2595 | ETHERTEAM 16I DRIVER |
| 2523 | 2596 | M: Mika Kuoppala <miku@iki.fi> |
| 2524 | 2597 | S: Maintained |
| 2525 | −F: drivers/net/eth16i.c | |
| 2598 | +F: drivers/net/ethernet/fujitsu/eth16i.c | |
| 2526 | 2599 | |
| 2527 | 2600 | EXT2 FILE SYSTEM |
| 2528 | 2601 | M: Jan Kara <jack@suse.cz> |
| @@ -2691,7 +2764,7 @@ M: Vitaly Bordug <vbordug@ru.mvista.com> · 162 unmodified lines | ||
| 2691 | 2764 | L: linuxppc-dev@lists.ozlabs.org |
| 2692 | 2765 | L: netdev@vger.kernel.org |
| 2693 | 2766 | S: Maintained |
| 2694 | −F: drivers/net/fs_enet/ | |
| 2767 | +F: drivers/net/ethernet/freescale/fs_enet/ | |
| 2695 | 2768 | F: include/linux/fs_enet_pd.h |
| 2696 | 2769 | |
| 2697 | 2770 | FREESCALE QUICC ENGINE LIBRARY |
| @@ -2713,7 +2786,7 @@ M: Li Yang <leoli@freescale.com> · 15 unmodified lines | ||
| 2713 | 2786 | L: netdev@vger.kernel.org |
| 2714 | 2787 | L: linuxppc-dev@lists.ozlabs.org |
| 2715 | 2788 | S: Maintained |
| 2716 | −F: drivers/net/ucc_geth* | |
| 2789 | +F: drivers/net/ethernet/freescale/ucc_geth* | |
| 2717 | 2790 | |
| 2718 | 2791 | FREESCALE QUICC ENGINE UCC UART DRIVER |
| 2719 | 2792 | M: Timur Tabi <timur@freescale.com> |
| @@ -2738,7 +2811,7 @@ F: fs/freevxfs/ · 18 unmodified lines | ||
| 2738 | 2811 | FREEZER |
| 2739 | 2812 | M: Pavel Machek <pavel@ucw.cz> |
| 2740 | 2813 | M: "Rafael J. Wysocki" <rjw@sisk.pl> |
| 2741 | −L: linux-pm@lists.linux-foundation.org | |
| 2814 | +L: linux-pm@vger.kernel.org | |
| 2742 | 2815 | S: Supported |
| 2743 | 2816 | F: Documentation/power/freezing-of-tasks.txt |
| 2744 | 2817 | F: include/linux/freezer.h |
| @@ -2955,6 +3028,13 @@ F: Documentation/hw_random.txt · 210 unmodified lines | ||
| 2955 | 3028 | F: drivers/char/hw_random/ |
| 2956 | 3029 | F: include/linux/hw_random.h |
| 2957 | 3030 | |
| 3031 | +HARDWARE SPINLOCK CORE | |
| 3032 | +M: Ohad Ben-Cohen <ohad@wizery.com> | |
| 3033 | +S: Maintained | |
| 3034 | +F: Documentation/hwspinlock.txt | |
| 3035 | +F: drivers/hwspinlock/hwspinlock_* | |
| 3036 | +F: include/linux/hwspinlock.h | |
| 3037 | + | |
| 2958 | 3038 | HARMONY SOUND DRIVER |
| 2959 | 3039 | M: Kyle McMartin <kyle@mcmartin.ca> |
| 2960 | 3040 | L: linux-parisc@vger.kernel.org |
| @@ -3000,7 +3080,7 @@ F: drivers/video/hgafb.c · 39 unmodified lines | ||
| 3000 | 3080 | HIBERNATION (aka Software Suspend, aka swsusp) |
| 3001 | 3081 | M: Pavel Machek <pavel@ucw.cz> |
| 3002 | 3082 | M: "Rafael J. Wysocki" <rjw@sisk.pl> |
| 3003 | −L: linux-pm@lists.linux-foundation.org | |
| 3083 | +L: linux-pm@vger.kernel.org | |
| 3004 | 3084 | S: Supported |
| 3005 | 3085 | F: arch/x86/power/ |
| 3006 | 3086 | F: drivers/base/power/ |
| @@ -3051,6 +3131,7 @@ S: Maintained · 44 unmodified lines | ||
| 3051 | 3131 | F: include/linux/hippidevice.h |
| 3052 | 3132 | F: include/linux/if_hippi.h |
| 3053 | 3133 | F: net/802/hippi.c |
| 3134 | +F: drivers/net/hippi/ | |
| 3054 | 3135 | |
| 3055 | 3136 | HOST AP DRIVER |
| 3056 | 3137 | M: Jouni Malinen <j@w1.fi> |
| @@ -3068,7 +3149,7 @@ F: drivers/platform/x86/tc1100-wmi.c · 11 unmodified lines | ||
| 3068 | 3149 | HP100: Driver for HP 10/100 Mbit/s Voice Grade Network Adapter Series |
| 3069 | 3150 | M: Jaroslav Kysela <perex@perex.cz> |
| 3070 | 3151 | S: Maintained |
| 3071 | −F: drivers/net/hp100.* | |
| 3152 | +F: drivers/net/ethernet/hp/hp100.* | |
| 3072 | 3153 | |
| 3073 | 3154 | HPET: High Precision Event Timers driver |
| 3074 | 3155 | M: Clemens Ladisch <clemens@ladisch.de> |
| @@ -3146,8 +3227,7 @@ IA64 (Itanium) PLATFORM · 71 unmodified lines | ||
| 3146 | 3227 | M: Tony Luck <tony.luck@intel.com> |
| 3147 | 3228 | M: Fenghua Yu <fenghua.yu@intel.com> |
| 3148 | 3229 | L: linux-ia64@vger.kernel.org |
| 3149 | −W: http://www.ia64-linux.org/ | |
| 3150 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6.git | |
| 3230 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git | |
| 3151 | 3231 | S: Maintained |
| 3152 | 3232 | F: arch/ia64/ |
| 3153 | 3233 | |
| @@ -3166,7 +3246,7 @@ IBM Power Virtual Ethernet Device Driver · 12 unmodified lines | ||
| 3166 | 3246 | M: Santiago Leon <santil@linux.vnet.ibm.com> |
| 3167 | 3247 | L: netdev@vger.kernel.org |
| 3168 | 3248 | S: Supported |
| 3169 | −F: drivers/net/ibmveth.* | |
| 3249 | +F: drivers/net/ethernet/ibm/ibmveth.* | |
| 3170 | 3250 | |
| 3171 | 3251 | IBM ServeRAID RAID DRIVER |
| 3172 | 3252 | P: Jack Hammer |
| @@ -3185,6 +3265,13 @@ F: Documentation/ide/ · 12 unmodified lines | ||
| 3185 | 3265 | F: drivers/ide/ |
| 3186 | 3266 | F: include/linux/ide.h |
| 3187 | 3267 | |
| 3268 | +IDEAPAD LAPTOP EXTRAS DRIVER | |
| 3269 | +M: Ike Panhc <ike.pan@canonical.com> | |
| 3270 | +L: platform-driver-x86@vger.kernel.org | |
| 3271 | +W: http://launchpad.net/ideapad-laptop | |
| 3272 | +S: Maintained | |
| 3273 | +F: drivers/platform/x86/ideapad-laptop.c | |
| 3274 | + | |
| 3188 | 3275 | IDE/ATAPI DRIVERS |
| 3189 | 3276 | M: Borislav Petkov <petkovbb@gmail.com> |
| 3190 | 3277 | L: linux-ide@vger.kernel.org |
| @@ -3194,7 +3281,7 @@ F: drivers/ide/ide-cd* · 3 unmodified lines | ||
| 3194 | 3281 | |
| 3195 | 3282 | IDLE-I7300 |
| 3196 | 3283 | M: Andy Henroid <andrew.d.henroid@intel.com> |
| 3197 | −L: linux-pm@lists.linux-foundation.org | |
| 3284 | +L: linux-pm@vger.kernel.org | |
| 3198 | 3285 | S: Supported |
| 3199 | 3286 | F: drivers/idle/i7300_idle.c |
| 3200 | 3287 | |
| @@ -3277,7 +3364,7 @@ F: firmware/isci/ · 76 unmodified lines | ||
| 3277 | 3364 | |
| 3278 | 3365 | INTEL IDLE DRIVER |
| 3279 | 3366 | M: Len Brown <lenb@kernel.org> |
| 3280 | −L: linux-pm@lists.linux-foundation.org | |
| 3367 | +L: linux-pm@vger.kernel.org | |
| 3281 | 3368 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-idle-2.6.git |
| 3282 | 3369 | S: Supported |
| 3283 | 3370 | F: drivers/idle/intel_idle.c |
| @@ -3333,7 +3420,7 @@ F: arch/arm/mach-ixp4xx/include/mach/qmgr.h · 49 unmodified lines | ||
| 3333 | 3420 | F: arch/arm/mach-ixp4xx/include/mach/npe.h |
| 3334 | 3421 | F: arch/arm/mach-ixp4xx/ixp4xx_qmgr.c |
| 3335 | 3422 | F: arch/arm/mach-ixp4xx/ixp4xx_npe.c |
| 3336 | −F: drivers/net/arm/ixp4xx_eth.c | |
| 3423 | +F: drivers/net/ethernet/xscale/ixp4xx_eth.c | |
| 3337 | 3424 | F: drivers/net/wan/ixp4xx_hss.c |
| 3338 | 3425 | |
| 3339 | 3426 | INTEL IXP4XX RANDOM NUMBER GENERATOR SUPPORT |
| @@ -3345,7 +3432,7 @@ INTEL IXP2000 ETHERNET DRIVER · 5 unmodified lines | ||
| 3345 | 3432 | M: Lennert Buytenhek <kernel@wantstofly.org> |
| 3346 | 3433 | L: netdev@vger.kernel.org |
| 3347 | 3434 | S: Maintained |
| 3348 | −F: drivers/net/ixp2000/ | |
| 3435 | +F: drivers/net/ethernet/xscale/ixp2000/ | |
| 3349 | 3436 | |
| 3350 | 3437 | INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe/ixgbevf) |
| 3351 | 3438 | M: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
| @@ -3354,13 +3441,13 @@ M: Bruce Allan <bruce.w.allan@intel.com> · 2 unmodified lines | ||
| 3354 | 3441 | M: Carolyn Wyborny <carolyn.wyborny@intel.com> |
| 3355 | 3442 | M: Don Skidmore <donald.c.skidmore@intel.com> |
| 3356 | 3443 | M: Greg Rose <gregory.v.rose@intel.com> |
| 3357 | −M: PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com> | |
| 3444 | +M: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> | |
| 3358 | 3445 | M: Alex Duyck <alexander.h.duyck@intel.com> |
| 3359 | 3446 | M: John Ronciak <john.ronciak@intel.com> |
| 3360 | 3447 | L: e1000-devel@lists.sourceforge.net |
| 3361 | 3448 | W: http://e1000.sourceforge.net/ |
| 3362 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-2.6.git | |
| 3363 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next-2.6.git | |
| 3449 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net.git | |
| 3450 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next.git | |
| 3364 | 3451 | S: Supported |
| 3365 | 3452 | F: Documentation/networking/e100.txt |
| 3366 | 3453 | F: Documentation/networking/e1000.txt |
| @@ -3370,18 +3457,11 @@ F: Documentation/networking/igbvf.txt · 3 unmodified lines | ||
| 3370 | 3457 | F: Documentation/networking/ixgb.txt |
| 3371 | 3458 | F: Documentation/networking/ixgbe.txt |
| 3372 | 3459 | F: Documentation/networking/ixgbevf.txt |
| 3373 | −F: drivers/net/e100.c | |
| 3374 | −F: drivers/net/e1000/ | |
| 3375 | −F: drivers/net/e1000e/ | |
| 3376 | −F: drivers/net/igb/ | |
| 3377 | −F: drivers/net/igbvf/ | |
| 3378 | −F: drivers/net/ixgb/ | |
| 3379 | −F: drivers/net/ixgbe/ | |
| 3380 | −F: drivers/net/ixgbevf/ | |
| 3460 | +F: drivers/net/ethernet/intel/ | |
| 3381 | 3461 | |
| 3382 | 3462 | INTEL MRST PMU DRIVER |
| 3383 | 3463 | M: Len Brown <len.brown@intel.com> |
| 3384 | −L: linux-pm@lists.linux-foundation.org | |
| 3464 | +L: linux-pm@vger.kernel.org | |
| 3385 | 3465 | S: Supported |
| 3386 | 3466 | F: arch/x86/platform/mrst/pmu.* |
| 3387 | 3467 | |
| @@ -3429,7 +3509,7 @@ M: Wey-Yi Guy <wey-yi.w.guy@intel.com> · 41 unmodified lines | ||
| 3429 | 3509 | M: Intel Linux Wireless <ilw@linux.intel.com> |
| 3430 | 3510 | L: linux-wireless@vger.kernel.org |
| 3431 | 3511 | W: http://intellinuxwireless.org |
| 3432 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-2.6.git | |
| 3512 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi.git | |
| 3433 | 3513 | S: Supported |
| 3434 | 3514 | F: drivers/net/wireless/iwlwifi/ |
| 3435 | 3515 | |
| @@ -3445,7 +3525,7 @@ IOC3 ETHERNET DRIVER · 9 unmodified lines | ||
| 3445 | 3525 | M: Ralf Baechle <ralf@linux-mips.org> |
| 3446 | 3526 | L: linux-mips@linux-mips.org |
| 3447 | 3527 | S: Maintained |
| 3448 | −F: drivers/net/ioc3-eth.c | |
| 3528 | +F: drivers/net/ethernet/sgi/ioc3-eth.c | |
| 3449 | 3529 | |
| 3450 | 3530 | IOC3 SERIAL DRIVER |
| 3451 | 3531 | M: Pat Gefre <pfg@sgi.com> |
| @@ -3463,7 +3543,7 @@ M: Francois Romieu <romieu@fr.zoreil.com> · 11 unmodified lines | ||
| 3463 | 3543 | M: Sorbica Shieh <sorbica@icplus.com.tw> |
| 3464 | 3544 | L: netdev@vger.kernel.org |
| 3465 | 3545 | S: Maintained |
| 3466 | −F: drivers/net/ipg.* | |
| 3546 | +F: drivers/net/ethernet/icplus/ipg.* | |
| 3467 | 3547 | |
| 3468 | 3548 | IPATH DRIVER |
| 3469 | 3549 | M: Mike Marciniszyn <infinipath@qlogic.com> |
| @@ -3611,7 +3691,7 @@ JME NETWORK DRIVER · 141 unmodified lines | ||
| 3611 | 3691 | M: Guo-Fu Tseng <cooldavid@cooldavid.org> |
| 3612 | 3692 | L: netdev@vger.kernel.org |
| 3613 | 3693 | S: Maintained |
| 3614 | −F: drivers/net/jme.* | |
| 3694 | +F: drivers/net/ethernet/jme.* | |
| 3615 | 3695 | |
| 3616 | 3696 | JOURNALLING FLASH FILE SYSTEM V2 (JFFS2) |
| 3617 | 3697 | M: David Woodhouse <dwmw2@infradead.org> |
| @@ -3978,6 +4058,7 @@ M: Eric Piel <eric.piel@tremplin-utc.net> · 360 unmodified lines | ||
| 3978 | 4058 | S: Maintained |
| 3979 | 4059 | F: Documentation/misc-devices/lis3lv02d |
| 3980 | 4060 | F: drivers/misc/lis3lv02d/ |
| 4061 | +F: drivers/platform/x86/hp_accel.c | |
| 3981 | 4062 | |
| 3982 | 4063 | LLC (802.2) |
| 3983 | 4064 | M: Arnaldo Carvalho de Melo <acme@ghostprotocols.net> |
| @@ -4142,7 +4223,7 @@ MARVELL MV643XX ETHERNET DRIVER · 158 unmodified lines | ||
| 4142 | 4223 | M: Lennert Buytenhek <buytenh@wantstofly.org> |
| 4143 | 4224 | L: netdev@vger.kernel.org |
| 4144 | 4225 | S: Maintained |
| 4145 | −F: drivers/net/mv643xx_eth.* | |
| 4226 | +F: drivers/net/ethernet/marvell/mv643xx_eth.* | |
| 4146 | 4227 | F: include/linux/mv643xx.h |
| 4147 | 4228 | |
| 4148 | 4229 | MARVELL MWIFIEX WIRELESS DRIVER |
| @@ -4356,12 +4437,12 @@ M: Andrew Gallatin <gallatin@myri.com> · 207 unmodified lines | ||
| 4356 | 4437 | L: netdev@vger.kernel.org |
| 4357 | 4438 | W: http://www.myri.com/scs/download-Myri10GE.html |
| 4358 | 4439 | S: Supported |
| 4359 | −F: drivers/net/myri10ge/ | |
| 4440 | +F: drivers/net/ethernet/myricom/myri10ge/ | |
| 4360 | 4441 | |
| 4361 | 4442 | NATSEMI ETHERNET DRIVER (DP8381x) |
| 4362 | 4443 | M: Tim Hockin <thockin@hockin.org> |
| 4363 | 4444 | S: Maintained |
| 4364 | −F: drivers/net/natsemi.c | |
| 4445 | +F: drivers/net/ethernet/natsemi/natsemi.c | |
| 4365 | 4446 | |
| 4366 | 4447 | NATIVE INSTRUMENTS USB SOUND INTERFACE DRIVER |
| 4367 | 4448 | M: Daniel Mack <zonque@gmail.com> |
| @@ -4401,16 +4482,13 @@ W: http://trac.neterion.com/cgi-bin/trac.cgi/wiki/Linux?Anonymous · 33 unmodified lines | ||
| 4401 | 4482 | W: http://trac.neterion.com/cgi-bin/trac.cgi/wiki/X3100Linux?Anonymous |
| 4402 | 4483 | S: Supported |
| 4403 | 4484 | F: Documentation/networking/s2io.txt |
| 4404 | −F: drivers/net/s2io* | |
| 4405 | 4485 | F: Documentation/networking/vxge.txt |
| 4406 | −F: drivers/net/vxge/ | |
| 4486 | +F: drivers/net/ethernet/neterion/ | |
| 4407 | 4487 | |
| 4408 | 4488 | NETFILTER/IPTABLES/IPCHAINS |
| 4409 | −P: Rusty Russell | |
| 4410 | −P: Marc Boucher | |
| 4411 | −P: James Morris | |
| 4412 | 4489 | P: Harald Welte |
| 4413 | 4490 | P: Jozsef Kadlecsik |
| 4491 | +M: Pablo Neira Ayuso <pablo@netfilter.org> | |
| 4414 | 4492 | M: Patrick McHardy <kaber@trash.net> |
| 4415 | 4493 | L: netfilter-devel@vger.kernel.org |
| 4416 | 4494 | L: netfilter@vger.kernel.org |
| @@ -4517,11 +4595,23 @@ F: include/linux/if_* · 100 unmodified lines | ||
| 4517 | 4595 | F: include/linux/*device.h |
| 4518 | 4596 | |
| 4519 | 4597 | NETXEN (1/10) GbE SUPPORT |
| 4520 | −M: Amit Kumar Salecha <amit.salecha@qlogic.com> | |
| 4598 | +M: Sony Chacko <sony.chacko@qlogic.com> | |
| 4599 | +M: Rajesh Borundia <rajesh.borundia@qlogic.com> | |
| 4521 | 4600 | L: netdev@vger.kernel.org |
| 4522 | 4601 | W: http://www.qlogic.com |
| 4523 | 4602 | S: Supported |
| 4524 | −F: drivers/net/netxen/ | |
| 4603 | +F: drivers/net/ethernet/qlogic/netxen/ | |
| 4604 | + | |
| 4605 | +NFC SUBSYSTEM | |
| 4606 | +M: Lauro Ramos Venancio <lauro.venancio@openbossa.org> | |
| 4607 | +M: Aloisio Almeida Jr <aloisio.almeida@openbossa.org> | |
| 4608 | +M: Samuel Ortiz <sameo@linux.intel.com> | |
| 4609 | +L: linux-wireless@vger.kernel.org | |
| 4610 | +S: Maintained | |
| 4611 | +F: net/nfc/ | |
| 4612 | +F: include/linux/nfc.h | |
| 4613 | +F: include/net/nfc/ | |
| 4614 | +F: drivers/nfc/ | |
| 4525 | 4615 | |
| 4526 | 4616 | NFS, SUNRPC, AND LOCKD CLIENTS |
| 4527 | 4617 | M: Trond Myklebust <Trond.Myklebust@netapp.com> |
| @@ -4542,7 +4632,7 @@ M: Jan-Pascal van Best <janpascal@vanbest.org> · 14 unmodified lines | ||
| 4542 | 4632 | M: Andreas Mohr <andi@lisas.de> |
| 4543 | 4633 | L: netdev@vger.kernel.org |
| 4544 | 4634 | S: Maintained |
| 4545 | −F: drivers/net/ni5010.* | |
| 4635 | +F: drivers/net/ethernet/racal/ni5010.* | |
| 4546 | 4636 | |
| 4547 | 4637 | NILFS2 FILESYSTEM |
| 4548 | 4638 | M: KONISHI Ryusuke <konishi.ryusuke@lab.ntt.co.jp> |
| @@ -4591,7 +4681,7 @@ L: linux-omap@vger.kernel.org · 42 unmodified lines | ||
| 4591 | 4681 | W: http://www.muru.com/linux/omap/ |
| 4592 | 4682 | W: http://linux.omap.com/ |
| 4593 | 4683 | Q: http://patchwork.kernel.org/project/linux-omap/list/ |
| 4594 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git | |
| 4684 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git | |
| 4595 | 4685 | S: Maintained |
| 4596 | 4686 | F: arch/arm/*omap*/ |
| 4597 | 4687 | |
| @@ -4639,6 +4729,13 @@ S: Maintained · 41 unmodified lines | ||
| 4639 | 4729 | F: drivers/video/omap2/ |
| 4640 | 4730 | F: Documentation/arm/OMAP/DSS |
| 4641 | 4731 | |
| 4732 | +OMAP HARDWARE SPINLOCK SUPPORT | |
| 4733 | +M: Ohad Ben-Cohen <ohad@wizery.com> | |
| 4734 | +L: linux-omap@vger.kernel.org | |
| 4735 | +S: Maintained | |
| 4736 | +F: drivers/hwspinlock/omap_hwspinlock.c | |
| 4737 | +F: arch/arm/mach-omap2/hwspinlock.c | |
| 4738 | + | |
| 4642 | 4739 | OMAP MMC SUPPORT |
| 4643 | 4740 | M: Jarkko Lavinen <jarkko.lavinen@nokia.com> |
| 4644 | 4741 | L: linux-omap@vger.kernel.org |
| @@ -4733,10 +4830,12 @@ F: drivers/i2c/busses/i2c-ocores.c · 88 unmodified lines | ||
| 4733 | 4830 | |
| 4734 | 4831 | OPEN FIRMWARE AND FLATTENED DEVICE TREE |
| 4735 | 4832 | M: Grant Likely <grant.likely@secretlab.ca> |
| 4833 | +M: Rob Herring <rob.herring@calxeda.com> | |
| 4736 | 4834 | L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers) |
| 4737 | 4835 | W: http://fdt.secretlab.ca |
| 4738 | 4836 | T: git git://git.secretlab.ca/git/linux-2.6.git |
| 4739 | 4837 | S: Maintained |
| 4838 | +F: Documentation/devicetree | |
| 4740 | 4839 | F: drivers/of |
| 4741 | 4840 | F: include/linux/of*.h |
| 4742 | 4841 | K: of_get_property |
| @@ -4808,7 +4907,7 @@ PA SEMI ETHERNET DRIVER · 65 unmodified lines | ||
| 4808 | 4907 | M: Olof Johansson <olof@lixom.net> |
| 4809 | 4908 | L: netdev@vger.kernel.org |
| 4810 | 4909 | S: Maintained |
| 4811 | −F: drivers/net/pasemi_mac.* | |
| 4910 | +F: drivers/net/ethernet/pasemi/* | |
| 4812 | 4911 | |
| 4813 | 4912 | PA SEMI SMBUS DRIVER |
| 4814 | 4913 | M: Olof Johansson <olof@lixom.net> |
| @@ -4919,7 +5018,7 @@ F: include/linux/i2c-algo-pca.h · 104 unmodified lines | ||
| 4919 | 5018 | F: include/linux/i2c-pca-platform.h |
| 4920 | 5019 | |
| 4921 | 5020 | PCI ERROR RECOVERY |
| 4922 | −M: Linas Vepstas <linas@austin.ibm.com> | |
| 5021 | +M: Linas Vepstas <linasvepstas@gmail.com> | |
| 4923 | 5022 | L: linux-pci@vger.kernel.org |
| 4924 | 5023 | S: Supported |
| 4925 | 5024 | F: Documentation/PCI/pci-error-recovery.txt |
| @@ -4955,7 +5054,7 @@ PCNET32 NETWORK DRIVER · 29 unmodified lines | ||
| 4955 | 5054 | M: Don Fry <pcnet32@frontier.com> |
| 4956 | 5055 | L: netdev@vger.kernel.org |
| 4957 | 5056 | S: Maintained |
| 4958 | −F: drivers/net/pcnet32.c | |
| 5057 | +F: drivers/net/ethernet/amd/pcnet32.c | |
| 4959 | 5058 | |
| 4960 | 5059 | PCRYPT PARALLEL CRYPTO ENGINE |
| 4961 | 5060 | M: Steffen Klassert <steffen.klassert@secunet.com> |
| @@ -5015,6 +5114,11 @@ L: linux-mtd@lists.infradead.org · 53 unmodified lines | ||
| 5015 | 5114 | S: Maintained |
| 5016 | 5115 | F: drivers/mtd/devices/phram.c |
| 5017 | 5116 | |
| 5117 | +PIN CONTROL SUBSYSTEM | |
| 5118 | +M: Linus Walleij <linus.walleij@linaro.org> | |
| 5119 | +S: Maintained | |
| 5120 | +F: drivers/pinmux/ | |
| 5121 | + | |
| 5018 | 5122 | PKTCDVD DRIVER |
| 5019 | 5123 | M: Peter Osterlund <petero2@telia.com> |
| 5020 | 5124 | S: Maintained |
| @@ -5087,7 +5191,7 @@ PPP PROTOCOL DRIVERS AND COMPRESSORS · 66 unmodified lines | ||
| 5087 | 5191 | M: Paul Mackerras <paulus@samba.org> |
| 5088 | 5192 | L: linux-ppp@vger.kernel.org |
| 5089 | 5193 | S: Maintained |
| 5090 | −F: drivers/net/ppp_* | |
| 5194 | +F: drivers/net/ppp/ppp_* | |
| 5091 | 5195 | |
| 5092 | 5196 | PPP OVER ATM (RFC 2364) |
| 5093 | 5197 | M: Mitchell Blank Jr <mitch@sfgoth.com> |
| @@ -5098,8 +5202,8 @@ F: include/linux/atmppp.h · 4 unmodified lines | ||
| 5098 | 5202 | PPP OVER ETHERNET |
| 5099 | 5203 | M: Michal Ostrowski <mostrows@earthlink.net> |
| 5100 | 5204 | S: Maintained |
| 5101 | −F: drivers/net/pppoe.c | |
| 5102 | −F: drivers/net/pppox.c | |
| 5205 | +F: drivers/net/ppp/pppoe.c | |
| 5206 | +F: drivers/net/ppp/pppox.c | |
| 5103 | 5207 | |
| 5104 | 5208 | PPP OVER L2TP |
| 5105 | 5209 | M: James Chapman <jchapman@katalix.com> |
| @@ -5120,7 +5224,7 @@ PPTP DRIVER · 14 unmodified lines | ||
| 5120 | 5224 | M: Dmitry Kozlov <xeb@mail.ru> |
| 5121 | 5225 | L: netdev@vger.kernel.org |
| 5122 | 5226 | S: Maintained |
| 5123 | −F: drivers/net/pptp.c | |
| 5227 | +F: drivers/net/ppp/pptp.c | |
| 5124 | 5228 | W: http://sourceforge.net/projects/accel-pptp |
| 5125 | 5229 | |
| 5126 | 5230 | PREEMPTIBLE KERNEL |
| @@ -5149,7 +5253,7 @@ M: Geoff Levand <geoff@infradead.org> · 22 unmodified lines | ||
| 5149 | 5253 | L: netdev@vger.kernel.org |
| 5150 | 5254 | L: cbe-oss-dev@lists.ozlabs.org |
| 5151 | 5255 | S: Maintained |
| 5152 | −F: drivers/net/ps3_gelic_net.* | |
| 5256 | +F: drivers/net/ethernet/toshiba/ps3_gelic_net.* | |
| 5153 | 5257 | |
| 5154 | 5258 | PS3 PLATFORM SUPPORT |
| 5155 | 5259 | M: Geoff Levand <geoff@infradead.org> |
| @@ -5267,23 +5371,24 @@ M: linux-driver@qlogic.com · 111 unmodified lines | ||
| 5267 | 5371 | L: netdev@vger.kernel.org |
| 5268 | 5372 | S: Supported |
| 5269 | 5373 | F: Documentation/networking/LICENSE.qla3xxx |
| 5270 | −F: drivers/net/qla3xxx.* | |
| 5374 | +F: drivers/net/ethernet/qlogic/qla3xxx.* | |
| 5271 | 5375 | |
| 5272 | 5376 | QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER |
| 5273 | −M: Amit Kumar Salecha <amit.salecha@qlogic.com> | |
| 5274 | 5377 | M: Anirban Chakraborty <anirban.chakraborty@qlogic.com> |
| 5378 | +M: Sony Chacko <sony.chacko@qlogic.com> | |
| 5275 | 5379 | M: linux-driver@qlogic.com |
| 5276 | 5380 | L: netdev@vger.kernel.org |
| 5277 | 5381 | S: Supported |
| 5278 | −F: drivers/net/qlcnic/ | |
| 5382 | +F: drivers/net/ethernet/qlogic/qlcnic/ | |
| 5279 | 5383 | |
| 5280 | 5384 | QLOGIC QLGE 10Gb ETHERNET DRIVER |
| 5385 | +M: Anirban Chakraborty <anirban.chakraborty@qlogic.com> | |
| 5281 | 5386 | M: Jitendra Kalsaria <jitendra.kalsaria@qlogic.com> |
| 5282 | 5387 | M: Ron Mercer <ron.mercer@qlogic.com> |
| 5283 | 5388 | M: linux-driver@qlogic.com |
| 5284 | 5389 | L: netdev@vger.kernel.org |
| 5285 | 5390 | S: Supported |
| 5286 | −F: drivers/net/qlge/ | |
| 5391 | +F: drivers/net/ethernet/qlogic/qlge/ | |
| 5287 | 5392 | |
| 5288 | 5393 | QNX4 FILESYSTEM |
| 5289 | 5394 | M: Anders Larsen <al@alarsen.net> |
| @@ -5293,6 +5398,12 @@ F: fs/qnx4/ · 3 unmodified lines | ||
| 5293 | 5398 | F: include/linux/qnx4_fs.h |
| 5294 | 5399 | F: include/linux/qnxtypes.h |
| 5295 | 5400 | |
| 5401 | +QUALCOMM HEXAGON ARCHITECTURE | |
| 5402 | +M: Richard Kuo <rkuo@codeaurora.org> | |
| 5403 | +L: linux-hexagon@vger.kernel.org | |
| 5404 | +S: Supported | |
| 5405 | +F: arch/hexagon/ | |
| 5406 | + | |
| 5296 | 5407 | RADOS BLOCK DEVICE (RBD) |
| 5297 | 5408 | F: include/linux/qnxtypes.h |
| 5298 | 5409 | M: Yehuda Sadeh <yehuda@hq.newdream.net> |
| @@ -5365,10 +5476,10 @@ RDC R6040 FAST ETHERNET DRIVER · 66 unmodified lines | ||
| 5365 | 5476 | M: Florian Fainelli <florian@openwrt.org> |
| 5366 | 5477 | L: netdev@vger.kernel.org |
| 5367 | 5478 | S: Maintained |
| 5368 | −F: drivers/net/r6040.c | |
| 5479 | +F: drivers/net/ethernet/rdc/r6040.c | |
| 5369 | 5480 | |
| 5370 | 5481 | RDS - RELIABLE DATAGRAM SOCKETS |
| 5371 | −M: Andy Grover <andy.grover@oracle.com> | |
| 5482 | +M: Venkat Venkatsubra <venkat.x.venkatsubra@oracle.com> | |
| 5372 | 5483 | L: rds-devel@oss.oracle.com (moderated for non-subscribers) |
| 5373 | 5484 | S: Supported |
| 5374 | 5485 | F: net/rds/ |
| @@ -5769,7 +5880,7 @@ M: Ajit Khaparde <ajit.khaparde@emulex.com> · 394 unmodified lines | ||
| 5769 | 5880 | L: netdev@vger.kernel.org |
| 5770 | 5881 | W: http://www.emulex.com |
| 5771 | 5882 | S: Supported |
| 5772 | −F: drivers/net/benet/ | |
| 5883 | +F: drivers/net/ethernet/emulex/benet/ | |
| 5773 | 5884 | |
| 5774 | 5885 | SFC NETWORK DRIVER |
| 5775 | 5886 | M: Solarflare linux maintainers <linux-net-drivers@solarflare.com> |
| @@ -5777,7 +5888,7 @@ M: Steve Hodgson <shodgson@solarflare.com> · 1 unmodified line | ||
| 5777 | 5888 | M: Ben Hutchings <bhutchings@solarflare.com> |
| 5778 | 5889 | L: netdev@vger.kernel.org |
| 5779 | 5890 | S: Supported |
| 5780 | −F: drivers/net/sfc/ | |
| 5891 | +F: drivers/net/ethernet/sfc/ | |
| 5781 | 5892 | |
| 5782 | 5893 | SGI GRU DRIVER |
| 5783 | 5894 | M: Jack Steiner <steiner@sgi.com> |
| @@ -5843,14 +5954,14 @@ SIS 190 ETHERNET DRIVER · 59 unmodified lines | ||
| 5843 | 5954 | M: Francois Romieu <romieu@fr.zoreil.com> |
| 5844 | 5955 | L: netdev@vger.kernel.org |
| 5845 | 5956 | S: Maintained |
| 5846 | −F: drivers/net/sis190.c | |
| 5957 | +F: drivers/net/ethernet/sis/sis190.c | |
| 5847 | 5958 | |
| 5848 | 5959 | SIS 900/7016 FAST ETHERNET DRIVER |
| 5849 | 5960 | M: Daniele Venzano <venza@brownhat.org> |
| 5850 | 5961 | W: http://www.brownhat.org/sis900.html |
| 5851 | 5962 | L: netdev@vger.kernel.org |
| 5852 | 5963 | S: Maintained |
| 5853 | −F: drivers/net/sis900.* | |
| 5964 | +F: drivers/net/ethernet/sis/sis900.* | |
| 5854 | 5965 | |
| 5855 | 5966 | SIS 96X I2C/SMBUS DRIVER |
| 5856 | 5967 | M: "Mark M. Hoffman" <mhoffman@lightlink.com> |
| @@ -5877,8 +5988,7 @@ SKGE, SKY2 10/100/1000 GIGABIT ETHERNET DRIVERS · 20 unmodified lines | ||
| 5877 | 5988 | M: Stephen Hemminger <shemminger@linux-foundation.org> |
| 5878 | 5989 | L: netdev@vger.kernel.org |
| 5879 | 5990 | S: Maintained |
| 5880 | −F: drivers/net/skge.* | |
| 5881 | −F: drivers/net/sky2.* | |
| 5991 | +F: drivers/net/ethernet/marvell/sk* | |
| 5882 | 5992 | |
| 5883 | 5993 | SLAB ALLOCATOR |
| 5884 | 5994 | M: Christoph Lameter <cl@linux-foundation.org> |
| @@ -5892,7 +6002,7 @@ F: mm/sl?b.c · 7 unmodified lines | ||
| 5892 | 6002 | SMC91x ETHERNET DRIVER |
| 5893 | 6003 | M: Nicolas Pitre <nico@fluxnic.net> |
| 5894 | 6004 | S: Odd Fixes |
| 5895 | −F: drivers/net/smc91x.* | |
| 6005 | +F: drivers/net/ethernet/smsc/smc91x.* | |
| 5896 | 6006 | |
| 5897 | 6007 | SMM665 HARDWARE MONITOR DRIVER |
| 5898 | 6008 | M: Guenter Roeck <linux@roeck-us.net> |
| @@ -5927,13 +6037,19 @@ M: Steve Glendinning <steve.glendinning@smsc.com> · 28 unmodified lines | ||
| 5927 | 6037 | L: netdev@vger.kernel.org |
| 5928 | 6038 | S: Supported |
| 5929 | 6039 | F: include/linux/smsc911x.h |
| 5930 | −F: drivers/net/smsc911x.* | |
| 6040 | +F: drivers/net/ethernet/smsc/smsc911x.* | |
| 5931 | 6041 | |
| 5932 | 6042 | SMSC9420 PCI ETHERNET DRIVER |
| 5933 | 6043 | M: Steve Glendinning <steve.glendinning@smsc.com> |
| 5934 | 6044 | L: netdev@vger.kernel.org |
| 5935 | 6045 | S: Supported |
| 5936 | −F: drivers/net/smsc9420.* | |
| 6046 | +F: drivers/net/ethernet/smsc/smsc9420.* | |
| 6047 | + | |
| 6048 | +SMSC UFX6000 and UFX7000 USB to VGA DRIVER | |
| 6049 | +M: Steve Glendinning <steve.glendinning@smsc.com> | |
| 6050 | +L: linux-fbdev@vger.kernel.org | |
| 6051 | +S: Supported | |
| 6052 | +F: drivers/video/smscufx.c | |
| 5937 | 6053 | |
| 5938 | 6054 | SN-IA64 (Itanium) SUB-PLATFORM |
| 5939 | 6055 | M: Jes Sorensen <jes@sgi.com> |
| @@ -5967,7 +6083,7 @@ SONIC NETWORK DRIVER · 27 unmodified lines | ||
| 5967 | 6083 | M: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
| 5968 | 6084 | L: netdev@vger.kernel.org |
| 5969 | 6085 | S: Maintained |
| 5970 | −F: drivers/net/sonic.* | |
| 6086 | +F: drivers/net/ethernet/natsemi/sonic.* | |
| 5971 | 6087 | |
| 5972 | 6088 | SONICS SILICON BACKPLANE DRIVER (SSB) |
| 5973 | 6089 | M: Michael Buesch <m@bues.ch> |
| @@ -6004,7 +6120,7 @@ M: Jaroslav Kysela <perex@perex.cz> · 30 unmodified lines | ||
| 6004 | 6120 | M: Takashi Iwai <tiwai@suse.de> |
| 6005 | 6121 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) |
| 6006 | 6122 | W: http://www.alsa-project.org/ |
| 6007 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6.git | |
| 6123 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git | |
| 6008 | 6124 | T: git git://git.alsa-project.org/alsa-kernel.git |
| 6009 | 6125 | S: Maintained |
| 6010 | 6126 | F: Documentation/sound/ |
| @@ -6014,7 +6130,7 @@ F: sound/ · 3 unmodified lines | ||
| 6014 | 6130 | SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC) |
| 6015 | 6131 | M: Liam Girdwood <lrg@ti.com> |
| 6016 | 6132 | M: Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 6017 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound-2.6.git | |
| 6133 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git | |
| 6018 | 6134 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) |
| 6019 | 6135 | W: http://alsa-project.org/main/index.php/ASoC |
| 6020 | 6136 | S: Supported |
| @@ -6108,7 +6224,7 @@ M: Jens Osterkamp <jens@de.ibm.com> · 87 unmodified lines | ||
| 6108 | 6224 | L: netdev@vger.kernel.org |
| 6109 | 6225 | S: Supported |
| 6110 | 6226 | F: Documentation/networking/spider_net.txt |
| 6111 | −F: drivers/net/spider_net* | |
| 6227 | +F: drivers/net/ethernet/toshiba/spider_net* | |
| 6112 | 6228 | |
| 6113 | 6229 | SPU FILE SYSTEM |
| 6114 | 6230 | M: Jeremy Kerr <jk@ozlabs.org> |
| @@ -6139,7 +6255,7 @@ S: Maintained · 24 unmodified lines | ||
| 6139 | 6255 | |
| 6140 | 6256 | STAGING SUBSYSTEM |
| 6141 | 6257 | M: Greg Kroah-Hartman <gregkh@suse.de> |
| 6142 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6.git | |
| 6258 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git | |
| 6143 | 6259 | L: devel@driverdev.osuosl.org |
| 6144 | 6260 | S: Maintained |
| 6145 | 6261 | F: drivers/staging/ |
| @@ -6155,12 +6271,6 @@ M: Jakub Schmidtke <sjakub@gmail.com> · 9 unmodified lines | ||
| 6155 | 6271 | S: Odd Fixes |
| 6156 | 6272 | F: drivers/staging/asus_oled/ |
| 6157 | 6273 | |
| 6158 | −STAGING - ATHEROS ATH6KL WIRELESS DRIVER | |
| 6159 | −M: Luis R. Rodriguez <mcgrof@gmail.com> | |
| 6160 | −M: Naveen Singh <nsingh@atheros.com> | |
| 6161 | −S: Odd Fixes | |
| 6162 | −F: drivers/staging/ath6kl/ | |
| 6163 | − | |
| 6164 | 6274 | STAGING - COMEDI |
| 6165 | 6275 | M: Ian Abbott <abbotti@mev.co.uk> |
| 6166 | 6276 | M: Mori Hess <fmhess@users.sourceforge.net> |
| @@ -6186,6 +6296,11 @@ M: David Rowe <david@rowetel.com> · 19 unmodified lines | ||
| 6186 | 6296 | S: Odd Fixes |
| 6187 | 6297 | F: drivers/staging/echo/ |
| 6188 | 6298 | |
| 6299 | +STAGING - ET131X NETWORK DRIVER | |
| 6300 | +M: Mark Einon <mark.einon@gmail.com> | |
| 6301 | +S: Odd Fixes | |
| 6302 | +F: drivers/staging/et131x/ | |
| 6303 | + | |
| 6189 | 6304 | STAGING - FLARION FT1000 DRIVERS |
| 6190 | 6305 | M: Marek Belisko <marek.belisko@gmail.com> |
| 6191 | 6306 | S: Odd Fixes |
| @@ -6214,6 +6329,13 @@ W: http://www.lirc.org/ · 22 unmodified lines | ||
| 6214 | 6329 | S: Odd Fixes |
| 6215 | 6330 | F: drivers/staging/lirc/ |
| 6216 | 6331 | |
| 6332 | +STAGING - NVIDIA COMPLIANT EMBEDDED CONTROLLER INTERFACE (nvec) | |
| 6333 | +M: Julian Andres Klode <jak@jak-linux.org> | |
| 6334 | +M: Marc Dietrich <marvin24@gmx.de> | |
| 6335 | +L: ac100@lists.launchpad.net (moderated for non-subscribers) | |
| 6336 | +S: Maintained | |
| 6337 | +F: drivers/staging/nvec/ | |
| 6338 | + | |
| 6217 | 6339 | STAGING - OLPC SECONDARY DISPLAY CONTROLLER (DCON) |
| 6218 | 6340 | M: Andres Salomon <dilinger@queued.net> |
| 6219 | 6341 | M: Chris Ball <cjb@laptop.org> |
| @@ -6286,7 +6408,7 @@ F: drivers/staging/xgifb/ · 66 unmodified lines | ||
| 6286 | 6408 | STARFIRE/DURALAN NETWORK DRIVER |
| 6287 | 6409 | M: Ion Badulescu <ionut@badula.org> |
| 6288 | 6410 | S: Odd Fixes |
| 6289 | −F: drivers/net/starfire* | |
| 6411 | +F: drivers/net/ethernet/adaptec/starfire* | |
| 6290 | 6412 | |
| 6291 | 6413 | SUN3/3X |
| 6292 | 6414 | M: Sam Creasey <sammy@sammy.net> |
| @@ -6295,6 +6417,7 @@ S: Maintained · 2 unmodified lines | ||
| 6295 | 6417 | F: arch/m68k/kernel/*sun3* |
| 6296 | 6418 | F: arch/m68k/sun3*/ |
| 6297 | 6419 | F: arch/m68k/include/asm/sun3* |
| 6420 | +F: drivers/net/ethernet/i825xx/sun3* | |
| 6298 | 6421 | |
| 6299 | 6422 | SUPERH |
| 6300 | 6423 | M: Paul Mundt <lethal@linux-sh.org> |
| @@ -6311,7 +6434,7 @@ SUSPEND TO RAM · 10 unmodified lines | ||
| 6311 | 6434 | M: Len Brown <len.brown@intel.com> |
| 6312 | 6435 | M: Pavel Machek <pavel@ucw.cz> |
| 6313 | 6436 | M: "Rafael J. Wysocki" <rjw@sisk.pl> |
| 6314 | −L: linux-pm@lists.linux-foundation.org | |
| 6437 | +L: linux-pm@vger.kernel.org | |
| 6315 | 6438 | S: Supported |
| 6316 | 6439 | F: Documentation/power/ |
| 6317 | 6440 | F: arch/x86/kernel/acpi/ |
| @@ -6382,7 +6505,7 @@ TEHUTI ETHERNET DRIVER · 64 unmodified lines | ||
| 6382 | 6505 | M: Andy Gospodarek <andy@greyhouse.net> |
| 6383 | 6506 | L: netdev@vger.kernel.org |
| 6384 | 6507 | S: Supported |
| 6385 | −F: drivers/net/tehuti* | |
| 6508 | +F: drivers/net/ethernet/tehuti/* | |
| 6386 | 6509 | |
| 6387 | 6510 | Telecom Clock Driver for MCPL0010 |
| 6388 | 6511 | M: Mark Gross <mark.gross@intel.com> |
| @@ -6433,7 +6556,7 @@ W: http://www.tilera.com/scm/ · 44 unmodified lines | ||
| 6433 | 6556 | S: Supported |
| 6434 | 6557 | F: arch/tile/ |
| 6435 | 6558 | F: drivers/tty/hvc/hvc_tile.c |
| 6436 | −F: drivers/net/tile/ | |
| 6559 | +F: drivers/net/ethernet/tile/ | |
| 6437 | 6560 | F: drivers/edac/tile_edac.c |
| 6438 | 6561 | |
| 6439 | 6562 | TLAN NETWORK DRIVER |
| @@ -6442,7 +6565,7 @@ L: tlan-devel@lists.sourceforge.net (subscribers-only) · 2 unmodified lines | ||
| 6442 | 6565 | W: http://sourceforge.net/projects/tlan/ |
| 6443 | 6566 | S: Maintained |
| 6444 | 6567 | F: Documentation/networking/tlan.txt |
| 6445 | −F: drivers/net/tlan.* | |
| 6568 | +F: drivers/net/ethernet/ti/tlan.* | |
| 6446 | 6569 | |
| 6447 | 6570 | TOMOYO SECURITY MODULE |
| 6448 | 6571 | M: Kentaro Takeda <takedakn@nttdata.co.jp> |
| @@ -6536,7 +6659,7 @@ TULIP NETWORK DRIVERS · 87 unmodified lines | ||
| 6536 | 6659 | M: Grant Grundler <grundler@parisc-linux.org> |
| 6537 | 6660 | L: netdev@vger.kernel.org |
| 6538 | 6661 | S: Maintained |
| 6539 | −F: drivers/net/tulip/ | |
| 6662 | +F: drivers/net/ethernet/tulip/ | |
| 6540 | 6663 | |
| 6541 | 6664 | TUN/TAP driver |
| 6542 | 6665 | M: Maxim Krasnyansky <maxk@qualcomm.com> |
| @@ -6582,11 +6705,10 @@ W: http://uclinux-h8.sourceforge.jp/ · 39 unmodified lines | ||
| 6582 | 6705 | S: Supported |
| 6583 | 6706 | F: arch/h8300/ |
| 6584 | 6707 | F: drivers/ide/ide-h8300.c |
| 6585 | −F: drivers/net/ne-h8300.c | |
| 6708 | +F: drivers/net/ethernet/8390/ne-h8300.c | |
| 6586 | 6709 | |
| 6587 | 6710 | UDF FILESYSTEM |
| 6588 | 6711 | M: Jan Kara <jack@suse.cz> |
| 6589 | −W: http://linux-udf.sourceforge.net | |
| 6590 | 6712 | S: Maintained |
| 6591 | 6713 | F: Documentation/filesystems/udf.txt |
| 6592 | 6714 | F: fs/udf/ |
| @@ -7010,7 +7132,7 @@ F: include/linux/vhost.h · 417 unmodified lines | ||
| 7010 | 7132 | VIA RHINE NETWORK DRIVER |
| 7011 | 7133 | M: Roger Luethi <rl@hellgate.ch> |
| 7012 | 7134 | S: Maintained |
| 7013 | −F: drivers/net/via-rhine.c | |
| 7135 | +F: drivers/net/ethernet/via/via-rhine.c | |
| 7014 | 7136 | |
| 7015 | 7137 | VIAPRO SMBUS DRIVER |
| 7016 | 7138 | M: Jean Delvare <khali@linux-fr.org> |
| @@ -7038,7 +7160,7 @@ VIA VELOCITY NETWORK DRIVER · 21 unmodified lines | ||
| 7038 | 7160 | M: Francois Romieu <romieu@fr.zoreil.com> |
| 7039 | 7161 | L: netdev@vger.kernel.org |
| 7040 | 7162 | S: Maintained |
| 7041 | −F: drivers/net/via-velocity.* | |
| 7163 | +F: drivers/net/ethernet/via/via-velocity.* | |
| 7042 | 7164 | |
| 7043 | 7165 | VLAN (802.1Q) |
| 7044 | 7166 | M: Patrick McHardy <kaber@trash.net> |
| @@ -7218,6 +7340,7 @@ T: git git://opensource.wolfsonmicro.com/linux-2.6-audioplus · 173 unmodified lines | ||
| 7218 | 7340 | W: http://opensource.wolfsonmicro.com/content/linux-drivers-wolfson-devices |
| 7219 | 7341 | S: Supported |
| 7220 | 7342 | F: Documentation/hwmon/wm83?? |
| 7343 | +F: arch/arm/mach-s3c64xx/mach-crag6410* | |
| 7221 | 7344 | F: drivers/leds/leds-wm83*.c |
| 7222 | 7345 | F: drivers/input/misc/wm831x-on.c |
| 7223 | 7346 | F: drivers/input/touchscreen/wm831x-ts.c |
| @@ -1,8 +1,8 @@ | ||
| 1 | 1 | VERSION = 3 |
| 2 | −PATCHLEVEL = 1 | |
| 2 | +PATCHLEVEL = 2 | |
| 3 | 3 | SUBLEVEL = 0 |
| 4 | −EXTRAVERSION = | |
| 5 | −NAME = "Divemaster Edition" | |
| 4 | +EXTRAVERSION = -rc1 | |
| 5 | +NAME = Saber-toothed Squirrel | |
| 6 | 6 | |
| 7 | 7 | # *DOCUMENTATION* |
| 8 | 8 | # To see a list of typical targets execute "make help" |
| @@ -983,7 +983,6 @@ archprepare: prepare1 scripts_basic · 974 unmodified lines | ||
| 983 | 983 | |
| 984 | 984 | prepare0: archprepare FORCE |
| 985 | 985 | $(Q)$(MAKE) $(build)=. |
| 986 | − $(Q)$(MAKE) $(build)=. missing-syscalls | |
| 987 | 986 | |
| 988 | 987 | # All the preparing.. |
| 989 | 988 | prepare: prepare0 |
| @@ -1198,7 +1197,7 @@ distclean: mrproper · 208 unmodified lines | ||
| 1198 | 1197 | @find $(srctree) $(RCS_FIND_IGNORE) \ |
| 1199 | 1198 | \( -name '*.orig' -o -name '*.rej' -o -name '*~' \ |
| 1200 | 1199 | -o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \ |
| 1201 | − -o -name '.*.rej' -o -size 0 \ | |
| 1200 | + -o -name '.*.rej' \ | |
| 1202 | 1201 | -o -name '*%' -o -name '.*.cmd' -o -name 'core' \) \ |
| 1203 | 1202 | -type f -print | xargs rm -f |
| 1204 | 1203 | |
| @@ -1296,7 +1295,6 @@ help: · 91 unmodified lines | ||
| 1296 | 1295 | @echo ' 2: warnings which occur quite often but may still be relevant' |
| 1297 | 1296 | @echo ' 3: more obscure warnings, can most likely be ignored' |
| 1298 | 1297 | @echo ' Multiple levels can be combined with W=12 or W=123' |
| 1299 | − @echo ' make RECORDMCOUNT_WARN=1 [targets] Warn about ignored mcount sections' | |
| 1300 | 1298 | @echo '' |
| 1301 | 1299 | @echo 'Execute "make" or "make all" to build all targets marked with [*] ' |
| 1302 | 1300 | @echo 'For further info see the ./README file' |
| @@ -445,11 +445,6 @@ config ALPHA_EV67 · 444 unmodified lines | ||
| 445 | 445 | Is this a machine based on the EV67 core? If in doubt, select N here |
| 446 | 446 | and the machine will be treated as an EV6. |
| 447 | 447 | |
| 448 | −config ALPHA_EV7 | |
| 449 | − bool | |
| 450 | − depends on ALPHA_MARVEL | |
| 451 | − default y | |
| 452 | − | |
| 453 | 448 | config ALPHA_MCPCIA |
| 454 | 449 | bool |
| 455 | 450 | depends on ALPHA_RAWHIDE |
| @@ -51,8 +51,6 @@ · 50 unmodified lines | ||
| 51 | 51 | #define F_EXLCK 16 /* or 3 */ |
| 52 | 52 | #define F_SHLCK 32 /* or 4 */ |
| 53 | 53 | |
| 54 | −#define F_INPROGRESS 64 | |
| 55 | − | |
| 56 | 54 | #include <asm-generic/fcntl.h> |
| 57 | 55 | |
| 58 | 56 | #endif |
| @@ -457,10 +457,12 @@ · 456 unmodified lines | ||
| 457 | 457 | #define __NR_clock_adjtime 499 |
| 458 | 458 | #define __NR_syncfs 500 |
| 459 | 459 | #define __NR_setns 501 |
| 460 | +#define __NR_accept4 502 | |
| 461 | +#define __NR_sendmmsg 503 | |
| 460 | 462 | |
| 461 | 463 | #ifdef __KERNEL__ |
| 462 | 464 | |
| 463 | −#define NR_SYSCALLS 502 | |
| 465 | +#define NR_SYSCALLS 504 | |
| 464 | 466 | |
| 465 | 467 | #define __ARCH_WANT_IPC_PARSE_VERSION |
| 466 | 468 | #define __ARCH_WANT_OLD_READDIR |
| @@ -303,6 +303,7 @@ irongate_init_arch(void) · 302 unmodified lines | ||
| 303 | 303 | #include <linux/vmalloc.h> |
| 304 | 304 | #include <linux/agp_backend.h> |
| 305 | 305 | #include <linux/agpgart.h> |
| 306 | +#include <linux/export.h> | |
| 306 | 307 | #include <asm/pgalloc.h> |
| 307 | 308 | |
| 308 | 309 | #define GET_PAGE_DIR_OFF(addr) (addr >> 22) |
| @@ -10,6 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | */ |
| 11 | 11 | |
| 12 | 12 | #include <linux/sched.h> |
| 13 | +#include <linux/stat.h> | |
| 13 | 14 | #include <linux/slab.h> |
| 14 | 15 | #include <linux/pci.h> |
| 15 | 16 | |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | #include <linux/pci.h> |
| 8 | 8 | #include <linux/gfp.h> |
| 9 | 9 | #include <linux/bootmem.h> |
| 10 | +#include <linux/export.h> | |
| 10 | 11 | #include <linux/scatterlist.h> |
| 11 | 12 | #include <linux/log2.h> |
| 12 | 13 | #include <linux/dma-mapping.h> |
| @@ -43,6 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | #include <asm/setup.h> |
| 44 | 44 | #include <asm/io.h> |
| 45 | 45 | #include <linux/log2.h> |
| 46 | +#include <linux/export.h> | |
| 46 | 47 | |
| 47 | 48 | extern struct atomic_notifier_head panic_notifier_list; |
| 48 | 49 | static int alpha_panic_event(struct notifier_block *, unsigned long, void *); |
| @@ -520,6 +520,8 @@ sys_call_table: · 519 unmodified lines | ||
| 520 | 520 | .quad sys_clock_adjtime |
| 521 | 521 | .quad sys_syncfs /* 500 */ |
| 522 | 522 | .quad sys_setns |
| 523 | + .quad sys_accept4 | |
| 524 | + .quad sys_sendmmsg | |
| 523 | 525 | |
| 524 | 526 | .size sys_call_table, . - sys_call_table |
| 525 | 527 | .type sys_call_table, @object |
| @@ -29,6 +29,7 @@ config ARM · 28 unmodified lines | ||
| 29 | 29 | select HAVE_GENERIC_HARDIRQS |
| 30 | 30 | select HAVE_SPARSE_IRQ |
| 31 | 31 | select GENERIC_IRQ_SHOW |
| 32 | + select CPU_PM if (SUSPEND || CPU_IDLE) | |
| 32 | 33 | help |
| 33 | 34 | The ARM series is a line of low-power-consumption RISC chip designs |
| 34 | 35 | licensed by ARM Ltd and targeted at embedded applications and |
| @@ -211,6 +212,19 @@ config ARM_PATCH_PHYS_VIRT · 176 unmodified lines | ||
| 211 | 212 | this feature (eg, building a kernel for a single machine) and |
| 212 | 213 | you need to shrink the kernel to the minimal size. |
| 213 | 214 | |
| 215 | +config NEED_MACH_MEMORY_H | |
| 216 | + bool | |
| 217 | + help | |
| 218 | + Select this when mach/memory.h is required to provide special | |
| 219 | + definitions for this platform. The need for mach/memory.h should | |
| 220 | + be avoided when possible. | |
| 221 | + | |
| 222 | +config PHYS_OFFSET | |
| 223 | + hex "Physical address of main memory" | |
| 224 | + depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H | |
| 225 | + help | |
| 226 | + Please provide the physical address corresponding to the | |
| 227 | + location of main memory in your system. | |
| 214 | 228 | |
| 215 | 229 | config GENERIC_BUG |
| 216 | 230 | def_bool y |
| @@ -247,6 +261,7 @@ config ARCH_INTEGRATOR · 30 unmodified lines | ||
| 247 | 261 | select GENERIC_CLOCKEVENTS |
| 248 | 262 | select PLAT_VERSATILE |
| 249 | 263 | select PLAT_VERSATILE_FPGA_IRQ |
| 264 | + select NEED_MACH_MEMORY_H | |
| 250 | 265 | help |
| 251 | 266 | Support for ARM's Integrator platform. |
| 252 | 267 | |
| @@ -262,6 +277,7 @@ config ARCH_REALVIEW · 9 unmodified lines | ||
| 262 | 277 | select PLAT_VERSATILE_CLCD |
| 263 | 278 | select ARM_TIMER_SP804 |
| 264 | 279 | select GPIO_PL061 if GPIOLIB |
| 280 | + select NEED_MACH_MEMORY_H | |
| 265 | 281 | help |
| 266 | 282 | This enables support for ARM Ltd RealView boards. |
| 267 | 283 | |
| @@ -318,10 +334,25 @@ config ARCH_BCMRING · 50 unmodified lines | ||
| 318 | 334 | help |
| 319 | 335 | Support for Broadcom's BCMRing platform. |
| 320 | 336 | |
| 337 | +config ARCH_HIGHBANK | |
| 338 | + bool "Calxeda Highbank-based" | |
| 339 | + select ARCH_WANT_OPTIONAL_GPIOLIB | |
| 340 | + select ARM_AMBA | |
| 341 | + select ARM_GIC | |
| 342 | + select ARM_TIMER_SP804 | |
| 343 | + select CLKDEV_LOOKUP | |
| 344 | + select CPU_V7 | |
| 345 | + select GENERIC_CLOCKEVENTS | |
| 346 | + select HAVE_ARM_SCU | |
| 347 | + select USE_OF | |
| 348 | + help | |
| 349 | + Support for the Calxeda Highbank SoC based boards. | |
| 350 | + | |
| 321 | 351 | config ARCH_CLPS711X |
| 322 | 352 | bool "Cirrus Logic CLPS711x/EP721x-based" |
| 323 | 353 | select CPU_ARM720T |
| 324 | 354 | select ARCH_USES_GETTIMEOFFSET |
| 355 | + select NEED_MACH_MEMORY_H | |
| 325 | 356 | help |
| 326 | 357 | Support for Cirrus Logic 711x/721x based boards. |
| 327 | 358 | |
| @@ -346,7 +377,6 @@ config ARCH_GEMINI · 18 unmodified lines | ||
| 346 | 377 | config ARCH_PRIMA2 |
| 347 | 378 | bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" |
| 348 | 379 | select CPU_V7 |
| 349 | − select GENERIC_TIME | |
| 350 | 380 | select NO_IOPORT |
| 351 | 381 | select GENERIC_CLOCKEVENTS |
| 352 | 382 | select CLKDEV_LOOKUP |
| @@ -362,6 +392,7 @@ config ARCH_EBSA110 · 9 unmodified lines | ||
| 362 | 392 | select ISA |
| 363 | 393 | select NO_IOPORT |
| 364 | 394 | select ARCH_USES_GETTIMEOFFSET |
| 395 | + select NEED_MACH_MEMORY_H | |
| 365 | 396 | help |
| 366 | 397 | This is an evaluation board for the StrongARM processor available |
| 367 | 398 | from Digital. It has limited hardware on-board, including an |
| @@ -377,6 +408,7 @@ config ARCH_EP93XX · 9 unmodified lines | ||
| 377 | 408 | select ARCH_REQUIRE_GPIOLIB |
| 378 | 409 | select ARCH_HAS_HOLES_MEMORYMODEL |
| 379 | 410 | select ARCH_USES_GETTIMEOFFSET |
| 411 | + select NEED_MACH_MEMORY_H | |
| 380 | 412 | help |
| 381 | 413 | This enables support for the Cirrus EP93xx series of CPUs. |
| 382 | 414 | |
| @@ -386,6 +418,7 @@ config ARCH_FOOTBRIDGE · 3 unmodified lines | ||
| 386 | 418 | select FOOTBRIDGE |
| 387 | 419 | select GENERIC_CLOCKEVENTS |
| 388 | 420 | select HAVE_IDE |
| 421 | + select NEED_MACH_MEMORY_H | |
| 389 | 422 | help |
| 390 | 423 | Support for systems based on the DC21285 companion chip |
| 391 | 424 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. |
| @@ -398,6 +431,7 @@ config ARCH_MXC · 6 unmodified lines | ||
| 398 | 431 | select CLKSRC_MMIO |
| 399 | 432 | select GENERIC_IRQ_CHIP |
| 400 | 433 | select HAVE_SCHED_CLOCK |
| 434 | + select MULTI_IRQ_HANDLER | |
| 401 | 435 | help |
| 402 | 436 | Support for Freescale MXC/iMX-based family of processors |
| 403 | 437 | |
| @@ -435,6 +469,7 @@ config ARCH_IOP13XX · 31 unmodified lines | ||
| 435 | 469 | select PCI |
| 436 | 470 | select ARCH_SUPPORTS_MSI |
| 437 | 471 | select VMSPLIT_1G |
| 472 | + select NEED_MACH_MEMORY_H | |
| 438 | 473 | help |
| 439 | 474 | Support for Intel's IOP13XX (XScale) family of processors. |
| 440 | 475 | |
| @@ -465,6 +500,7 @@ config ARCH_IXP23XX · 24 unmodified lines | ||
| 465 | 500 | select CPU_XSC3 |
| 466 | 501 | select PCI |
| 467 | 502 | select ARCH_USES_GETTIMEOFFSET |
| 503 | + select NEED_MACH_MEMORY_H | |
| 468 | 504 | help |
| 469 | 505 | Support for Intel's IXP23xx (XScale) family of processors. |
| 470 | 506 | |
| @@ -474,6 +510,7 @@ config ARCH_IXP2000 · 3 unmodified lines | ||
| 474 | 510 | select CPU_XSCALE |
| 475 | 511 | select PCI |
| 476 | 512 | select ARCH_USES_GETTIMEOFFSET |
| 513 | + select NEED_MACH_MEMORY_H | |
| 477 | 514 | help |
| 478 | 515 | Support for Intel's IXP2400/2800 (XScale) family of processors. |
| 479 | 516 | |
| @@ -520,7 +557,6 @@ config ARCH_LPC32XX · 40 unmodified lines | ||
| 520 | 557 | select ARM_AMBA |
| 521 | 558 | select USB_ARCH_HAS_OHCI |
| 522 | 559 | select CLKDEV_LOOKUP |
| 523 | − select GENERIC_TIME | |
| 524 | 560 | select GENERIC_CLOCKEVENTS |
| 525 | 561 | help |
| 526 | 562 | Support for the NXP LPC32XX family of processors |
| @@ -559,6 +595,7 @@ config ARCH_MMP · 32 unmodified lines | ||
| 559 | 595 | select TICK_ONESHOT |
| 560 | 596 | select PLAT_PXA |
| 561 | 597 | select SPARSE_IRQ |
| 598 | + select GENERIC_ALLOCATOR | |
| 562 | 599 | help |
| 563 | 600 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
| 564 | 601 | |
| @@ -567,6 +604,7 @@ config ARCH_KS8695 · 2 unmodified lines | ||
| 567 | 604 | select CPU_ARM922T |
| 568 | 605 | select ARCH_REQUIRE_GPIOLIB |
| 569 | 606 | select ARCH_USES_GETTIMEOFFSET |
| 607 | + select NEED_MACH_MEMORY_H | |
| 570 | 608 | help |
| 571 | 609 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based |
| 572 | 610 | System-on-Chip devices. |
| @@ -587,19 +625,10 @@ config ARCH_W90X900 · 14 unmodified lines | ||
| 587 | 625 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ |
| 588 | 626 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> |
| 589 | 627 | |
| 590 | −config ARCH_NUC93X | |
| 591 | − bool "Nuvoton NUC93X CPU" | |
| 592 | − select CPU_ARM926T | |
| 593 | − select CLKDEV_LOOKUP | |
| 594 | − help | |
| 595 | − Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
| 596 | − low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
| 597 | − | |
| 598 | 628 | config ARCH_TEGRA |
| 599 | 629 | bool "NVIDIA Tegra" |
| 600 | 630 | select CLKDEV_LOOKUP |
| 601 | 631 | select CLKSRC_MMIO |
| 602 | − select GENERIC_TIME | |
| 603 | 632 | select GENERIC_CLOCKEVENTS |
| 604 | 633 | select GENERIC_GPIO |
| 605 | 634 | select HAVE_CLK |
| @@ -609,6 +638,24 @@ config ARCH_TEGRA · 3 unmodified lines | ||
| 609 | 638 | This enables support for NVIDIA Tegra based systems (Tegra APX, |
| 610 | 639 | Tegra 6xx and Tegra 2 series). |
| 611 | 640 | |
| 641 | +config ARCH_PICOXCELL | |
| 642 | + bool "Picochip picoXcell" | |
| 643 | + select ARCH_REQUIRE_GPIOLIB | |
| 644 | + select ARM_PATCH_PHYS_VIRT | |
| 645 | + select ARM_VIC | |
| 646 | + select CPU_V6K | |
| 647 | + select DW_APB_TIMER | |
| 648 | + select GENERIC_CLOCKEVENTS | |
| 649 | + select GENERIC_GPIO | |
| 650 | + select HAVE_SCHED_CLOCK | |
| 651 | + select HAVE_TCM | |
| 652 | + select NO_IOPORT | |
| 653 | + select USE_OF | |
| 654 | + help | |
| 655 | + This enables support for systems based on the Picochip picoXcell | |
| 656 | + family of Femtocell devices. The picoxcell support requires device tree | |
| 657 | + for all boards. | |
| 658 | + | |
| 612 | 659 | config ARCH_PNX4008 |
| 613 | 660 | bool "Philips Nexperia PNX4008 Mobile" |
| 614 | 661 | select CPU_ARM926T |
| @@ -660,6 +707,7 @@ config ARCH_SHMOBILE · 45 unmodified lines | ||
| 660 | 707 | select SPARSE_IRQ |
| 661 | 708 | select MULTI_IRQ_HANDLER |
| 662 | 709 | select PM_GENERIC_DOMAINS if PM |
| 710 | + select NEED_MACH_MEMORY_H | |
| 663 | 711 | help |
| 664 | 712 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. |
| 665 | 713 | |
| @@ -675,6 +723,7 @@ config ARCH_RPC · 9 unmodified lines | ||
| 675 | 723 | select ARCH_SPARSEMEM_ENABLE |
| 676 | 724 | select ARCH_USES_GETTIMEOFFSET |
| 677 | 725 | select HAVE_IDE |
| 726 | + select NEED_MACH_MEMORY_H | |
| 678 | 727 | help |
| 679 | 728 | On the Acorn Risc-PC, Linux can support the internal IDE disk and |
| 680 | 729 | CD-ROM interface, serial and parallel port, and the floppy drive. |
| @@ -694,6 +743,7 @@ config ARCH_SA1100 · 13 unmodified lines | ||
| 694 | 743 | select TICK_ONESHOT |
| 695 | 744 | select ARCH_REQUIRE_GPIOLIB |
| 696 | 745 | select HAVE_IDE |
| 746 | + select NEED_MACH_MEMORY_H | |
| 697 | 747 | help |
| 698 | 748 | Support for StrongARM 11x0 based boards. |
| 699 | 749 | |
| @@ -720,6 +770,7 @@ config ARCH_S3C64XX · 20 unmodified lines | ||
| 720 | 770 | select CPU_V6 |
| 721 | 771 | select ARM_VIC |
| 722 | 772 | select HAVE_CLK |
| 773 | + select HAVE_TCM | |
| 723 | 774 | select CLKDEV_LOOKUP |
| 724 | 775 | select NO_IOPORT |
| 725 | 776 | select ARCH_USES_GETTIMEOFFSET |
| @@ -727,11 +778,7 @@ config ARCH_S3C64XX · 1 unmodified line | ||
| 727 | 778 | select ARCH_REQUIRE_GPIOLIB |
| 728 | 779 | select SAMSUNG_CLKSRC |
| 729 | 780 | select SAMSUNG_IRQ_VIC_TIMER |
| 730 | − select SAMSUNG_IRQ_UART | |
| 731 | 781 | select S3C_GPIO_TRACK |
| 732 | − select S3C_GPIO_PULL_UPDOWN | |
| 733 | − select S3C_GPIO_CFG_S3C24XX | |
| 734 | − select S3C_GPIO_CFG_S3C64XX | |
| 735 | 782 | select S3C_DEV_NAND |
| 736 | 783 | select USB_ARCH_HAS_OHCI |
| 737 | 784 | select SAMSUNG_GPIOLIB_4BIT |
| @@ -786,11 +833,12 @@ config ARCH_S5PV210 · 48 unmodified lines | ||
| 786 | 833 | select HAVE_S3C2410_I2C if I2C |
| 787 | 834 | select HAVE_S3C_RTC if RTC_CLASS |
| 788 | 835 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
| 836 | + select NEED_MACH_MEMORY_H | |
| 789 | 837 | help |
| 790 | 838 | Samsung S5PV210/S5PC110 series based systems |
| 791 | 839 | |
| 792 | −config ARCH_EXYNOS4 | |
| 793 | − bool "Samsung EXYNOS4" | |
| 840 | +config ARCH_EXYNOS | |
| 841 | + bool "SAMSUNG EXYNOS" | |
| 794 | 842 | select CPU_V7 |
| 795 | 843 | select ARCH_SPARSEMEM_ENABLE |
| 796 | 844 | select ARCH_HAS_HOLES_MEMORYMODEL |
| @@ -802,8 +850,9 @@ config ARCH_EXYNOS4 · 5 unmodified lines | ||
| 802 | 850 | select HAVE_S3C_RTC if RTC_CLASS |
| 803 | 851 | select HAVE_S3C2410_I2C if I2C |
| 804 | 852 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
| 853 | + select NEED_MACH_MEMORY_H | |
| 805 | 854 | help |
| 806 | − Samsung EXYNOS4 series based systems | |
| 855 | + Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5) | |
| 807 | 856 | |
| 808 | 857 | config ARCH_SHARK |
| 809 | 858 | bool "Shark" |
| @@ -813,6 +862,7 @@ config ARCH_SHARK · 3 unmodified lines | ||
| 813 | 862 | select ZONE_DMA |
| 814 | 863 | select PCI |
| 815 | 864 | select ARCH_USES_GETTIMEOFFSET |
| 865 | + select NEED_MACH_MEMORY_H | |
| 816 | 866 | help |
| 817 | 867 | Support for the StrongARM based Digital DNARD machine, also known |
| 818 | 868 | as "Shark" (<http://www.shark-linux.de/shark.html>). |
| @@ -835,11 +885,14 @@ config ARCH_U300 · 16 unmodified lines | ||
| 835 | 885 | select HAVE_SCHED_CLOCK |
| 836 | 886 | select HAVE_TCM |
| 837 | 887 | select ARM_AMBA |
| 888 | + select ARM_PATCH_PHYS_VIRT | |
| 838 | 889 | select ARM_VIC |
| 839 | 890 | select GENERIC_CLOCKEVENTS |
| 840 | 891 | select CLKDEV_LOOKUP |
| 841 | 892 | select HAVE_MACH_CLKDEV |
| 842 | 893 | select GENERIC_GPIO |
| 894 | + select ARCH_REQUIRE_GPIOLIB | |
| 895 | + select NEED_MACH_MEMORY_H | |
| 843 | 896 | help |
| 844 | 897 | Support for ST-Ericsson U300 series mobile platforms. |
| 845 | 898 | |
| @@ -915,7 +968,6 @@ config ARCH_VT8500 · 69 unmodified lines | ||
| 915 | 968 | config ARCH_ZYNQ |
| 916 | 969 | bool "Xilinx Zynq ARM Cortex A9 Platform" |
| 917 | 970 | select CPU_V7 |
| 918 | − select GENERIC_TIME | |
| 919 | 971 | select GENERIC_CLOCKEVENTS |
| 920 | 972 | select CLKDEV_LOOKUP |
| 921 | 973 | select ARM_GIC |
| @@ -984,8 +1036,6 @@ source "arch/arm/mach-netx/Kconfig" · 62 unmodified lines | ||
| 984 | 1036 | source "arch/arm/mach-nomadik/Kconfig" |
| 985 | 1037 | source "arch/arm/plat-nomadik/Kconfig" |
| 986 | 1038 | |
| 987 | −source "arch/arm/mach-nuc93x/Kconfig" | |
| 988 | − | |
| 989 | 1039 | source "arch/arm/plat-omap/Kconfig" |
| 990 | 1040 | |
| 991 | 1041 | source "arch/arm/mach-omap1/Kconfig" |
| @@ -1029,7 +1079,7 @@ source "arch/arm/mach-s5pc100/Kconfig" · 37 unmodified lines | ||
| 1029 | 1079 | |
| 1030 | 1080 | source "arch/arm/mach-s5pv210/Kconfig" |
| 1031 | 1081 | |
| 1032 | −source "arch/arm/mach-exynos4/Kconfig" | |
| 1082 | +source "arch/arm/mach-exynos/Kconfig" | |
| 1033 | 1083 | |
| 1034 | 1084 | source "arch/arm/mach-shmobile/Kconfig" |
| 1035 | 1085 | |
| @@ -1378,7 +1428,7 @@ config SMP · 342 unmodified lines | ||
| 1378 | 1428 | depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ |
| 1379 | 1429 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
| 1380 | 1430 | ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ |
| 1381 | − ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE | |
| 1431 | + ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q | |
| 1382 | 1432 | depends on MMU |
| 1383 | 1433 | select USE_GENERIC_SMP_HELPERS |
| 1384 | 1434 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
| @@ -1838,6 +1888,38 @@ config ZBOOT_ROM_SH_MOBILE_SDHI · 453 unmodified lines | ||
| 1838 | 1888 | |
| 1839 | 1889 | endchoice |
| 1840 | 1890 | |
| 1891 | +config ARM_APPENDED_DTB | |
| 1892 | + bool "Use appended device tree blob to zImage (EXPERIMENTAL)" | |
| 1893 | + depends on OF && !ZBOOT_ROM && EXPERIMENTAL | |
| 1894 | + help | |
| 1895 | + With this option, the boot code will look for a device tree binary | |
| 1896 | + (DTB) appended to zImage | |
| 1897 | + (e.g. cat zImage <filename>.dtb > zImage_w_dtb). | |
| 1898 | + | |
| 1899 | + This is meant as a backward compatibility convenience for those | |
| 1900 | + systems with a bootloader that can't be upgraded to accommodate | |
| 1901 | + the documented boot protocol using a device tree. | |
| 1902 | + | |
| 1903 | + Beware that there is very little in terms of protection against | |
| 1904 | + this option being confused by leftover garbage in memory that might | |
| 1905 | + look like a DTB header after a reboot if no actual DTB is appended | |
| 1906 | + to zImage. Do not leave this option active in a production kernel | |
| 1907 | + if you don't intend to always append a DTB. Proper passing of the | |
| 1908 | + location into r2 of a bootloader provided DTB is always preferable | |
| 1909 | + to this option. | |
| 1910 | + | |
| 1911 | +config ARM_ATAG_DTB_COMPAT | |
| 1912 | + bool "Supplement the appended DTB with traditional ATAG information" | |
| 1913 | + depends on ARM_APPENDED_DTB | |
| 1914 | + help | |
| 1915 | + Some old bootloaders can't be updated to a DTB capable one, yet | |
| 1916 | + they provide ATAGs with memory configuration, the ramdisk address, | |
| 1917 | + the kernel cmdline string, etc. Such information is dynamically | |
| 1918 | + provided by the bootloader and can't always be stored in a static | |
| 1919 | + DTB. To allow a device tree enabled kernel to be used with such | |
| 1920 | + bootloaders, this option allows zImage to extract the information | |
| 1921 | + from the ATAG list and store it at run time into the appended DTB. | |
| 1922 | + | |
| 1841 | 1923 | config CMDLINE |
| 1842 | 1924 | string "Default kernel command string" |
| 1843 | 1925 | default "" |
| @@ -1984,6 +2066,7 @@ config CPU_FREQ_PXA · 140 unmodified lines | ||
| 1984 | 2066 | bool |
| 1985 | 2067 | depends on CPU_FREQ && ARCH_PXA && PXA25x |
| 1986 | 2068 | default y |
| 2069 | + select CPU_FREQ_TABLE | |
| 1987 | 2070 | select CPU_FREQ_DEFAULT_GOV_USERSPACE |
| 1988 | 2071 | |
| 1989 | 2072 | config CPU_FREQ_S3C |
| @@ -2127,7 +2210,7 @@ menu "Power management options" · 137 unmodified lines | ||
| 2127 | 2210 | source "kernel/power/Kconfig" |
| 2128 | 2211 | |
| 2129 | 2212 | config ARCH_SUSPEND_POSSIBLE |
| 2130 | − depends on !ARCH_S5P64X0 && !ARCH_S5PC100 | |
| 2213 | + depends on !ARCH_S5PC100 | |
| 2131 | 2214 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ |
| 2132 | 2215 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE |
| 2133 | 2216 | def_bool y |
| @@ -128,6 +128,125 @@ choice · 127 unmodified lines | ||
| 128 | 128 | Say Y here if you want the debug print routines to direct |
| 129 | 129 | their output to the second serial port on these devices. |
| 130 | 130 | |
| 131 | + config DEBUG_HIGHBANK_UART | |
| 132 | + bool "Kernel low-level debugging messages via Highbank UART" | |
| 133 | + depends on ARCH_HIGHBANK | |
| 134 | + help | |
| 135 | + Say Y here if you want the debug print routines to direct | |
| 136 | + their output to the UART on Highbank based devices. | |
| 137 | + | |
| 138 | + config DEBUG_IMX1_UART | |
| 139 | + bool "i.MX1 Debug UART" | |
| 140 | + depends on SOC_IMX1 | |
| 141 | + help | |
| 142 | + Say Y here if you want kernel low-level debugging support | |
| 143 | + on i.MX1. | |
| 144 | + | |
| 145 | + config DEBUG_IMX23_UART | |
| 146 | + bool "i.MX23 Debug UART" | |
| 147 | + depends on SOC_IMX23 | |
| 148 | + help | |
| 149 | + Say Y here if you want kernel low-level debugging support | |
| 150 | + on i.MX23. | |
| 151 | + | |
| 152 | + config DEBUG_IMX25_UART | |
| 153 | + bool "i.MX25 Debug UART" | |
| 154 | + depends on SOC_IMX25 | |
| 155 | + help | |
| 156 | + Say Y here if you want kernel low-level debugging support | |
| 157 | + on i.MX25. | |
| 158 | + | |
| 159 | + config DEBUG_IMX21_IMX27_UART | |
| 160 | + bool "i.MX21 and i.MX27 Debug UART" | |
| 161 | + depends on SOC_IMX21 || SOC_IMX27 | |
| 162 | + help | |
| 163 | + Say Y here if you want kernel low-level debugging support | |
| 164 | + on i.MX21 or i.MX27. | |
| 165 | + | |
| 166 | + config DEBUG_IMX28_UART | |
| 167 | + bool "i.MX28 Debug UART" | |
| 168 | + depends on SOC_IMX28 | |
| 169 | + help | |
| 170 | + Say Y here if you want kernel low-level debugging support | |
| 171 | + on i.MX28. | |
| 172 | + | |
| 173 | + config DEBUG_IMX31_IMX35_UART | |
| 174 | + bool "i.MX31 and i.MX35 Debug UART" | |
| 175 | + depends on SOC_IMX31 || SOC_IMX35 | |
| 176 | + help | |
| 177 | + Say Y here if you want kernel low-level debugging support | |
| 178 | + on i.MX31 or i.MX35. | |
| 179 | + | |
| 180 | + config DEBUG_IMX51_UART | |
| 181 | + bool "i.MX51 Debug UART" | |
| 182 | + depends on SOC_IMX51 | |
| 183 | + help | |
| 184 | + Say Y here if you want kernel low-level debugging support | |
| 185 | + on i.MX51. | |
| 186 | + | |
| 187 | + config DEBUG_IMX50_IMX53_UART | |
| 188 | + bool "i.MX50 and i.MX53 Debug UART" | |
| 189 | + depends on SOC_IMX50 || SOC_IMX53 | |
| 190 | + help | |
| 191 | + Say Y here if you want kernel low-level debugging support | |
| 192 | + on i.MX50 or i.MX53. | |
| 193 | + | |
| 194 | + config DEBUG_IMX6Q_UART | |
| 195 | + bool "i.MX6Q Debug UART" | |
| 196 | + depends on SOC_IMX6Q | |
| 197 | + help | |
| 198 | + Say Y here if you want kernel low-level debugging support | |
| 199 | + on i.MX6Q. | |
| 200 | + | |
| 201 | + config DEBUG_S3C_UART0 | |
| 202 | + depends on PLAT_SAMSUNG | |
| 203 | + bool "Use S3C UART 0 for low-level debug" | |
| 204 | + help | |
| 205 | + Say Y here if you want the debug print routines to direct | |
| 206 | + their output to UART 0. The port must have been initialised | |
| 207 | + by the boot-loader before use. | |
| 208 | + | |
| 209 | + The uncompressor code port configuration is now handled | |
| 210 | + by CONFIG_S3C_LOWLEVEL_UART_PORT. | |
| 211 | + | |
| 212 | + config DEBUG_S3C_UART1 | |
| 213 | + depends on PLAT_SAMSUNG | |
| 214 | + bool "Use S3C UART 1 for low-level debug" | |
| 215 | + help | |
| 216 | + Say Y here if you want the debug print routines to direct | |
| 217 | + their output to UART 1. The port must have been initialised | |
| 218 | + by the boot-loader before use. | |
| 219 | + | |
| 220 | + The uncompressor code port configuration is now handled | |
| 221 | + by CONFIG_S3C_LOWLEVEL_UART_PORT. | |
| 222 | + | |
| 223 | + config DEBUG_S3C_UART2 | |
| 224 | + depends on PLAT_SAMSUNG | |
| 225 | + bool "Use S3C UART 2 for low-level debug" | |
| 226 | + help | |
| 227 | + Say Y here if you want the debug print routines to direct | |
| 228 | + their output to UART 2. The port must have been initialised | |
| 229 | + by the boot-loader before use. | |
| 230 | + | |
| 231 | + The uncompressor code port configuration is now handled | |
| 232 | + by CONFIG_S3C_LOWLEVEL_UART_PORT. | |
| 233 | + | |
| 234 | + config DEBUG_REALVIEW_STD_PORT | |
| 235 | + bool "RealView Default UART" | |
| 236 | + depends on ARCH_REALVIEW | |
| 237 | + help | |
| 238 | + Say Y here if you want the debug print routines to direct | |
| 239 | + their output to the serial port on RealView EB, PB11MP, PBA8 | |
| 240 | + and PBX platforms. | |
| 241 | + | |
| 242 | + config DEBUG_REALVIEW_PB1176_PORT | |
| 243 | + bool "RealView PB1176 UART" | |
| 244 | + depends on MACH_REALVIEW_PB1176 | |
| 245 | + help | |
| 246 | + Say Y here if you want the debug print routines to direct | |
| 247 | + their output to the standard serial port on the RealView | |
| 248 | + PB1176 platform. | |
| 249 | + | |
| 131 | 250 | endchoice |
| 132 | 251 | |
| 133 | 252 | config EARLY_PRINTK |
| @@ -146,16 +265,10 @@ config OC_ETM · 12 unmodified lines | ||
| 146 | 265 | buffer driver that will allow you to collect traces of the |
| 147 | 266 | kernel code. |
| 148 | 267 | |
| 149 | −config DEBUG_S3C_UART | |
| 150 | − depends on PLAT_SAMSUNG | |
| 151 | − int "S3C UART to use for low-level debug" | |
| 152 | − default "0" | |
| 268 | +config ARM_KPROBES_TEST | |
| 269 | + tristate "Kprobes test module" | |
| 270 | + depends on KPROBES && MODULES | |
| 153 | 271 | help |
| 154 | − Choice for UART for kernel low-level using S3C UARTS, | |
| 155 | − should be between zero and two. The port must have been | |
| 156 | − initialised by the boot-loader before use. | |
| 157 | − | |
| 158 | − The uncompressor code port configuration is now handled | |
| 159 | − by CONFIG_S3C_LOWLEVEL_UART_PORT. | |
| 272 | + Perform tests of kprobes API and instruction set simulation. | |
| 160 | 273 | |
| 161 | 274 | endmenu |
| @@ -144,6 +144,7 @@ machine-$(CONFIG_ARCH_EBSA110) := ebsa110 · 143 unmodified lines | ||
| 144 | 144 | machine-$(CONFIG_ARCH_EP93XX) := ep93xx |
| 145 | 145 | machine-$(CONFIG_ARCH_GEMINI) := gemini |
| 146 | 146 | machine-$(CONFIG_ARCH_H720X) := h720x |
| 147 | +machine-$(CONFIG_ARCH_HIGHBANK) := highbank | |
| 147 | 148 | machine-$(CONFIG_ARCH_INTEGRATOR) := integrator |
| 148 | 149 | machine-$(CONFIG_ARCH_IOP13XX) := iop13xx |
| 149 | 150 | machine-$(CONFIG_ARCH_IOP32X) := iop32x |
| @@ -157,10 +158,8 @@ machine-$(CONFIG_ARCH_LPC32XX) := lpc32xx · 7 unmodified lines | ||
| 157 | 158 | machine-$(CONFIG_ARCH_MMP) := mmp |
| 158 | 159 | machine-$(CONFIG_ARCH_MSM) := msm |
| 159 | 160 | machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 |
| 160 | −machine-$(CONFIG_ARCH_MX1) := imx | |
| 161 | −machine-$(CONFIG_ARCH_MX2) := imx | |
| 162 | −machine-$(CONFIG_ARCH_MX25) := imx | |
| 163 | −machine-$(CONFIG_ARCH_MX3) := imx | |
| 161 | +machine-$(CONFIG_ARCH_IMX_V4_V5) := imx | |
| 162 | +machine-$(CONFIG_ARCH_IMX_V6_V7) := imx | |
| 164 | 163 | machine-$(CONFIG_ARCH_MX5) := mx5 |
| 165 | 164 | machine-$(CONFIG_ARCH_MXS) := mxs |
| 166 | 165 | machine-$(CONFIG_ARCH_NETX) := netx |
| @@ -170,6 +169,7 @@ machine-$(CONFIG_ARCH_OMAP2) := omap2 · 3 unmodified lines | ||
| 170 | 169 | machine-$(CONFIG_ARCH_OMAP3) := omap2 |
| 171 | 170 | machine-$(CONFIG_ARCH_OMAP4) := omap2 |
| 172 | 171 | machine-$(CONFIG_ARCH_ORION5X) := orion5x |
| 172 | +machine-$(CONFIG_ARCH_PICOXCELL) := picoxcell | |
| 173 | 173 | machine-$(CONFIG_ARCH_PNX4008) := pnx4008 |
| 174 | 174 | machine-$(CONFIG_ARCH_PRIMA2) := prima2 |
| 175 | 175 | machine-$(CONFIG_ARCH_PXA) := pxa |
| @@ -180,7 +180,7 @@ machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx · 4 unmodified lines | ||
| 180 | 180 | machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 |
| 181 | 181 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
| 182 | 182 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 |
| 183 | −machine-$(CONFIG_ARCH_EXYNOS4) := exynos4 | |
| 183 | +machine-$(CONFIG_ARCH_EXYNOS4) := exynos | |
| 184 | 184 | machine-$(CONFIG_ARCH_SA1100) := sa1100 |
| 185 | 185 | machine-$(CONFIG_ARCH_SHARK) := shark |
| 186 | 186 | machine-$(CONFIG_ARCH_SHMOBILE) := shmobile |
| @@ -192,7 +192,6 @@ machine-$(CONFIG_ARCH_VERSATILE) := versatile · 5 unmodified lines | ||
| 192 | 192 | machine-$(CONFIG_ARCH_VEXPRESS) := vexpress |
| 193 | 193 | machine-$(CONFIG_ARCH_VT8500) := vt8500 |
| 194 | 194 | machine-$(CONFIG_ARCH_W90X900) := w90x900 |
| 195 | −machine-$(CONFIG_ARCH_NUC93X) := nuc93x | |
| 196 | 195 | machine-$(CONFIG_FOOTBRIDGE) := footbridge |
| 197 | 196 | machine-$(CONFIG_MACH_SPEAR300) := spear3xx |
| 198 | 197 | machine-$(CONFIG_MACH_SPEAR310) := spear3xx |
| @@ -5,3 +5,12 @@ piggy.lzo · 4 unmodified lines | ||
| 5 | 5 | piggy.lzma |
| 6 | 6 | vmlinux |
| 7 | 7 | vmlinux.lds |
| 8 | + | |
| 9 | +# borrowed libfdt files | |
| 10 | +fdt.c | |
| 11 | +fdt.h | |
| 12 | +fdt_ro.c | |
| 13 | +fdt_rw.c | |
| 14 | +fdt_wip.c | |
| 15 | +libfdt.h | |
| 16 | +libfdt_internal.h | |
| @@ -26,6 +26,10 @@ HEAD = head.o · 25 unmodified lines | ||
| 26 | 26 | OBJS += misc.o decompress.o |
| 27 | 27 | FONTC = $(srctree)/drivers/video/console/font_acorn_8x8.c |
| 28 | 28 | |
| 29 | +# string library code (-Os is enforced to keep it much smaller) | |
| 30 | +OBJS += string.o | |
| 31 | +CFLAGS_string.o := -Os | |
| 32 | + | |
| 29 | 33 | # |
| 30 | 34 | # Architecture dependencies |
| 31 | 35 | # |
| @@ -89,21 +93,41 @@ suffix_$(CONFIG_KERNEL_GZIP) = gzip · 57 unmodified lines | ||
| 89 | 93 | suffix_$(CONFIG_KERNEL_LZO) = lzo |
| 90 | 94 | suffix_$(CONFIG_KERNEL_LZMA) = lzma |
| 91 | 95 | |
| 96 | +# Borrowed libfdt files for the ATAG compatibility mode | |
| 97 | + | |
| 98 | +libfdt := fdt_rw.c fdt_ro.c fdt_wip.c fdt.c | |
| 99 | +libfdt_hdrs := fdt.h libfdt.h libfdt_internal.h | |
| 100 | + | |
| 101 | +libfdt_objs := $(addsuffix .o, $(basename $(libfdt))) | |
| 102 | + | |
| 103 | +$(addprefix $(obj)/,$(libfdt) $(libfdt_hdrs)): $(obj)/%: $(srctree)/scripts/dtc/libfdt/% | |
| 104 | + $(call cmd,shipped) | |
| 105 | + | |
| 106 | +$(addprefix $(obj)/,$(libfdt_objs) atags_to_fdt.o): \ | |
| 107 | + $(addprefix $(obj)/,$(libfdt_hdrs)) | |
| 108 | + | |
| 109 | +ifeq ($(CONFIG_ARM_ATAG_DTB_COMPAT),y) | |
| 110 | +OBJS += $(libfdt_objs) atags_to_fdt.o | |
| 111 | +endif | |
| 112 | + | |
| 92 | 113 | targets := vmlinux vmlinux.lds \ |
| 93 | 114 | piggy.$(suffix_y) piggy.$(suffix_y).o \ |
| 94 | − font.o font.c head.o misc.o $(OBJS) | |
| 115 | + lib1funcs.o lib1funcs.S font.o font.c head.o misc.o $(OBJS) | |
| 95 | 116 | |
| 96 | 117 | # Make sure files are removed during clean |
| 97 | −extra-y += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S | |
| 118 | +extra-y += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S $(libfdt) $(libfdt_hdrs) | |
| 98 | 119 | |
| 99 | 120 | ifeq ($(CONFIG_FUNCTION_TRACER),y) |
| 100 | 121 | ORIG_CFLAGS := $(KBUILD_CFLAGS) |
| 101 | 122 | KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) |
| 102 | 123 | endif |
| 103 | 124 | |
| 104 | −ccflags-y := -fpic -fno-builtin | |
| 125 | +ccflags-y := -fpic -fno-builtin -I$(obj) | |
| 105 | 126 | asflags-y := -Wa,-march=all |
| 106 | 127 | |
| 128 | +# Supply kernel BSS size to the decompressor via a linker symbol. | |
| 129 | +KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}') | |
| 130 | +LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ) | |
| 107 | 131 | # Supply ZRELADDR to the decompressor via a linker symbol. |
| 108 | 132 | ifneq ($(CONFIG_AUTO_ZRELADDR),y) |
| 109 | 133 | LDFLAGS_vmlinux += --defsym zreladdr=$(ZRELADDR) |
| @@ -123,7 +147,7 @@ LDFLAGS_vmlinux += -T · 13 unmodified lines | ||
| 123 | 147 | # For __aeabi_uidivmod |
| 124 | 148 | lib1funcs = $(obj)/lib1funcs.o |
| 125 | 149 | |
| 126 | −$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE | |
| 150 | +$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S | |
| 127 | 151 | $(call cmd,shipped) |
| 128 | 152 | |
| 129 | 153 | # We need to prevent any GOTOFF relocs being used with references |
| @@ -0,0 +1,97 @@ | ||
| 1 | +#include <asm/setup.h> | |
| 2 | +#include <libfdt.h> | |
| 3 | + | |
| 4 | +static int node_offset(void *fdt, const char *node_path) | |
| 5 | +{ | |
| 6 | + int offset = fdt_path_offset(fdt, node_path); | |
| 7 | + if (offset == -FDT_ERR_NOTFOUND) | |
| 8 | + offset = fdt_add_subnode(fdt, 0, node_path); | |
| 9 | + return offset; | |
| 10 | +} | |
| 11 | + | |
| 12 | +static int setprop(void *fdt, const char *node_path, const char *property, | |
| 13 | + uint32_t *val_array, int size) | |
| 14 | +{ | |
| 15 | + int offset = node_offset(fdt, node_path); | |
| 16 | + if (offset < 0) | |
| 17 | + return offset; | |
| 18 | + return fdt_setprop(fdt, offset, property, val_array, size); | |
| 19 | +} | |
| 20 | + | |
| 21 | +static int setprop_string(void *fdt, const char *node_path, | |
| 22 | + const char *property, const char *string) | |
| 23 | +{ | |
| 24 | + int offset = node_offset(fdt, node_path); | |
| 25 | + if (offset < 0) | |
| 26 | + return offset; | |
| 27 | + return fdt_setprop_string(fdt, offset, property, string); | |
| 28 | +} | |
| 29 | + | |
| 30 | +static int setprop_cell(void *fdt, const char *node_path, | |
| 31 | + const char *property, uint32_t val) | |
| 32 | +{ | |
| 33 | + int offset = node_offset(fdt, node_path); | |
| 34 | + if (offset < 0) | |
| 35 | + return offset; | |
| 36 | + return fdt_setprop_cell(fdt, offset, property, val); | |
| 37 | +} | |
| 38 | + | |
| 39 | +/* | |
| 40 | + * Convert and fold provided ATAGs into the provided FDT. | |
| 41 | + * | |
| 42 | + * REturn values: | |
| 43 | + * = 0 -> pretend success | |
| 44 | + * = 1 -> bad ATAG (may retry with another possible ATAG pointer) | |
| 45 | + * < 0 -> error from libfdt | |
| 46 | + */ | |
| 47 | +int atags_to_fdt(void *atag_list, void *fdt, int total_space) | |
| 48 | +{ | |
| 49 | + struct tag *atag = atag_list; | |
| 50 | + uint32_t mem_reg_property[2 * NR_BANKS]; | |
| 51 | + int memcount = 0; | |
| 52 | + int ret; | |
| 53 | + | |
| 54 | + /* make sure we've got an aligned pointer */ | |
| 55 | + if ((u32)atag_list & 0x3) | |
| 56 | + return 1; | |
| 57 | + | |
| 58 | + /* if we get a DTB here we're done already */ | |
| 59 | + if (*(u32 *)atag_list == fdt32_to_cpu(FDT_MAGIC)) | |
| 60 | + return 0; | |
| 61 | + | |
| 62 | + /* validate the ATAG */ | |
| 63 | + if (atag->hdr.tag != ATAG_CORE || | |
| 64 | + (atag->hdr.size != tag_size(tag_core) && | |
| 65 | + atag->hdr.size != 2)) | |
| 66 | + return 1; | |
| 67 | + | |
| 68 | + /* let's give it all the room it could need */ | |
| 69 | + ret = fdt_open_into(fdt, fdt, total_space); | |
| 70 | + if (ret < 0) | |
| 71 | + return ret; | |
| 72 | + | |
| 73 | + for_each_tag(atag, atag_list) { | |
| 74 | + if (atag->hdr.tag == ATAG_CMDLINE) { | |
| 75 | + setprop_string(fdt, "/chosen", "bootargs", | |
| 76 | + atag->u.cmdline.cmdline); | |
| 77 | + } else if (atag->hdr.tag == ATAG_MEM) { | |
| 78 | + if (memcount >= sizeof(mem_reg_property)/4) | |
| 79 | + continue; | |
| 80 | + mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start); | |
| 81 | + mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size); | |
| 82 | + } else if (atag->hdr.tag == ATAG_INITRD2) { | |
| 83 | + uint32_t initrd_start, initrd_size; | |
| 84 | + initrd_start = atag->u.initrd.start; | |
| 85 | + initrd_size = atag->u.initrd.size; | |
| 86 | + setprop_cell(fdt, "/chosen", "linux,initrd-start", | |
| 87 | + initrd_start); | |
| 88 | + setprop_cell(fdt, "/chosen", "linux,initrd-end", | |
| 89 | + initrd_start + initrd_size); | |
| 90 | + } | |
| 91 | + } | |
| 92 | + | |
| 93 | + if (memcount) | |
| 94 | + setprop(fdt, "/memory", "reg", mem_reg_property, 4*memcount); | |
| 95 | + | |
| 96 | + return fdt_pack(fdt); | |
| 97 | +} | |
| @@ -216,6 +216,104 @@ restart: adr r0, LC0 · 215 unmodified lines | ||
| 216 | 216 | mov r10, r6 |
| 217 | 217 | #endif |
| 218 | 218 | |
| 219 | + mov r5, #0 @ init dtb size to 0 | |
| 220 | +#ifdef CONFIG_ARM_APPENDED_DTB | |
| 221 | +/* | |
| 222 | + * r0 = delta | |
| 223 | + * r2 = BSS start | |
| 224 | + * r3 = BSS end | |
| 225 | + * r4 = final kernel address | |
| 226 | + * r5 = appended dtb size (still unknown) | |
| 227 | + * r6 = _edata | |
| 228 | + * r7 = architecture ID | |
| 229 | + * r8 = atags/device tree pointer | |
| 230 | + * r9 = size of decompressed image | |
| 231 | + * r10 = end of this image, including bss/stack/malloc space if non XIP | |
| 232 | + * r11 = GOT start | |
| 233 | + * r12 = GOT end | |
| 234 | + * sp = stack pointer | |
| 235 | + * | |
| 236 | + * if there are device trees (dtb) appended to zImage, advance r10 so that the | |
| 237 | + * dtb data will get relocated along with the kernel if necessary. | |
| 238 | + */ | |
| 239 | + | |
| 240 | + ldr lr, [r6, #0] | |
| 241 | +#ifndef __ARMEB__ | |
| 242 | + ldr r1, =0xedfe0dd0 @ sig is 0xd00dfeed big endian | |
| 243 | +#else | |
| 244 | + ldr r1, =0xd00dfeed | |
| 245 | +#endif | |
| 246 | + cmp lr, r1 | |
| 247 | + bne dtb_check_done @ not found | |
| 248 | + | |
| 249 | +#ifdef CONFIG_ARM_ATAG_DTB_COMPAT | |
| 250 | + /* | |
| 251 | + * OK... Let's do some funky business here. | |
| 252 | + * If we do have a DTB appended to zImage, and we do have | |
| 253 | + * an ATAG list around, we want the later to be translated | |
| 254 | + * and folded into the former here. To be on the safe side, | |
| 255 | + * let's temporarily move the stack away into the malloc | |
| 256 | + * area. No GOT fixup has occurred yet, but none of the | |
| 257 | + * code we're about to call uses any global variable. | |
| 258 | + */ | |
| 259 | + add sp, sp, #0x10000 | |
| 260 | + stmfd sp!, {r0-r3, ip, lr} | |
| 261 | + mov r0, r8 | |
| 262 | + mov r1, r6 | |
| 263 | + sub r2, sp, r6 | |
| 264 | + bl atags_to_fdt | |
| 265 | + | |
| 266 | + /* | |
| 267 | + * If returned value is 1, there is no ATAG at the location | |
| 268 | + * pointed by r8. Try the typical 0x100 offset from start | |
| 269 | + * of RAM and hope for the best. | |
| 270 | + */ | |
| 271 | + cmp r0, #1 | |
| 272 | + sub r0, r4, #TEXT_OFFSET | |
| 273 | + add r0, r0, #0x100 | |
| 274 | + mov r1, r6 | |
| 275 | + sub r2, sp, r6 | |
| 276 | + blne atags_to_fdt | |
| 277 | + | |
| 278 | + ldmfd sp!, {r0-r3, ip, lr} | |
| 279 | + sub sp, sp, #0x10000 | |
| 280 | +#endif | |
| 281 | + | |
| 282 | + mov r8, r6 @ use the appended device tree | |
| 283 | + | |
| 284 | + /* | |
| 285 | + * Make sure that the DTB doesn't end up in the final | |
| 286 | + * kernel's .bss area. To do so, we adjust the decompressed | |
| 287 | + * kernel size to compensate if that .bss size is larger | |
| 288 | + * than the relocated code. | |
| 289 | + */ | |
| 290 | + ldr r5, =_kernel_bss_size | |
| 291 | + adr r1, wont_overwrite | |
| 292 | + sub r1, r6, r1 | |
| 293 | + subs r1, r5, r1 | |
| 294 | + addhi r9, r9, r1 | |
| 295 | + | |
| 296 | + /* Get the dtb's size */ | |
| 297 | + ldr r5, [r6, #4] | |
| 298 | +#ifndef __ARMEB__ | |
| 299 | + /* convert r5 (dtb size) to little endian */ | |
| 300 | + eor r1, r5, r5, ror #16 | |
| 301 | + bic r1, r1, #0x00ff0000 | |
| 302 | + mov r5, r5, ror #8 | |
| 303 | + eor r5, r5, r1, lsr #8 | |
| 304 | +#endif | |
| 305 | + | |
| 306 | + /* preserve 64-bit alignment */ | |
| 307 | + add r5, r5, #7 | |
| 308 | + bic r5, r5, #7 | |
| 309 | + | |
| 310 | + /* relocate some pointers past the appended dtb */ | |
| 311 | + add r6, r6, r5 | |
| 312 | + add r10, r10, r5 | |
| 313 | + add sp, sp, r5 | |
| 314 | +dtb_check_done: | |
| 315 | +#endif | |
| 316 | + | |
| 219 | 317 | /* |
| 220 | 318 | * Check to see if we will overwrite ourselves. |
| 221 | 319 | * r4 = final kernel address |
| @@ -223,15 +321,14 @@ restart: adr r0, LC0 · 1 unmodified line | ||
| 223 | 321 | * r10 = end of this image, including bss/stack/malloc space if non XIP |
| 224 | 322 | * We basically want: |
| 225 | 323 | * r4 - 16k page directory >= r10 -> OK |
| 226 | − * r4 + image length <= current position (pc) -> OK | |
| 324 | + * r4 + image length <= address of wont_overwrite -> OK | |
| 227 | 325 | */ |
| 228 | 326 | add r10, r10, #16384 |
| 229 | 327 | cmp r4, r10 |
| 230 | 328 | bhs wont_overwrite |
| 231 | 329 | add r10, r4, r9 |
| 232 | − ARM( cmp r10, pc ) | |
| 233 | − THUMB( mov lr, pc ) | |
| 234 | − THUMB( cmp r10, lr ) | |
| 330 | + adr r9, wont_overwrite | |
| 331 | + cmp r10, r9 | |
| 235 | 332 | bls wont_overwrite |
| 236 | 333 | |
| 237 | 334 | /* |
| @@ -285,14 +382,16 @@ wont_overwrite: · 47 unmodified lines | ||
| 285 | 382 | * r2 = BSS start |
| 286 | 383 | * r3 = BSS end |
| 287 | 384 | * r4 = kernel execution address |
| 385 | + * r5 = appended dtb size (0 if not present) | |
| 288 | 386 | * r7 = architecture ID |
| 289 | 387 | * r8 = atags pointer |
| 290 | 388 | * r11 = GOT start |
| 291 | 389 | * r12 = GOT end |
| 292 | 390 | * sp = stack pointer |
| 293 | 391 | */ |
| 294 | − teq r0, #0 | |
| 392 | + orrs r1, r0, r5 | |
| 295 | 393 | beq not_relocated |
| 394 | + | |
| 296 | 395 | add r11, r11, r0 |
| 297 | 396 | add r12, r12, r0 |
| 298 | 397 | |
| @@ -307,12 +406,21 @@ wont_overwrite: · 8 unmodified lines | ||
| 307 | 406 | |
| 308 | 407 | /* |
| 309 | 408 | * Relocate all entries in the GOT table. |
| 409 | + * Bump bss entries to _edata + dtb size | |
| 310 | 410 | */ |
| 311 | 411 | 1: ldr r1, [r11, #0] @ relocate entries in the GOT |
| 312 | − add r1, r1, r0 @ table. This fixes up the | |
| 313 | − str r1, [r11], #4 @ C references. | |
| 412 | + add r1, r1, r0 @ This fixes up C references | |
| 413 | + cmp r1, r2 @ if entry >= bss_start && | |
| 414 | + cmphs r3, r1 @ bss_end > entry | |
| 415 | + addhi r1, r1, r5 @ entry += dtb size | |
| 416 | + str r1, [r11], #4 @ next entry | |
| 314 | 417 | cmp r11, r12 |
| 315 | 418 | blo 1b |
| 419 | + | |
| 420 | + /* bump our bss pointers too */ | |
| 421 | + add r2, r2, r5 | |
| 422 | + add r3, r3, r5 | |
| 423 | + | |
| 316 | 424 | #else |
| 317 | 425 | |
| 318 | 426 | /* |
| @@ -0,0 +1,15 @@ | ||
| 1 | +#ifndef _ARM_LIBFDT_ENV_H | |
| 2 | +#define _ARM_LIBFDT_ENV_H | |
| 3 | + | |
| 4 | +#include <linux/types.h> | |
| 5 | +#include <linux/string.h> | |
| 6 | +#include <asm/byteorder.h> | |
| 7 | + | |
| 8 | +#define fdt16_to_cpu(x) be16_to_cpu(x) | |
| 9 | +#define cpu_to_fdt16(x) cpu_to_be16(x) | |
| 10 | +#define fdt32_to_cpu(x) be32_to_cpu(x) | |
| 11 | +#define cpu_to_fdt32(x) cpu_to_be32(x) | |
| 12 | +#define fdt64_to_cpu(x) be64_to_cpu(x) | |
| 13 | +#define cpu_to_fdt64(x) cpu_to_be64(x) | |
| 14 | + | |
| 15 | +#endif | |
| @@ -18,14 +18,9 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | unsigned int __machine_arch_type; |
| 20 | 20 | |
| 21 | −#define _LINUX_STRING_H_ | |
| 22 | − | |
| 23 | 21 | #include <linux/compiler.h> /* for inline */ |
| 24 | −#include <linux/types.h> /* for size_t */ | |
| 25 | −#include <linux/stddef.h> /* for NULL */ | |
| 22 | +#include <linux/types.h> | |
| 26 | 23 | #include <linux/linkage.h> |
| 27 | −#include <asm/string.h> | |
| 28 | − | |
| 29 | 24 | |
| 30 | 25 | static void putstr(const char *ptr); |
| 31 | 26 | extern void error(char *x); |
| @@ -101,41 +96,6 @@ static void putstr(const char *ptr) · 69 unmodified lines | ||
| 101 | 96 | flush(); |
| 102 | 97 | } |
| 103 | 98 | |
| 104 | − | |
| 105 | −void *memcpy(void *__dest, __const void *__src, size_t __n) | |
| 106 | −{ | |
| 107 | − int i = 0; | |
| 108 | − unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src; | |
| 109 | − | |
| 110 | − for (i = __n >> 3; i > 0; i--) { | |
| 111 | − *d++ = *s++; | |
| 112 | − *d++ = *s++; | |
| 113 | − *d++ = *s++; | |
| 114 | − *d++ = *s++; | |
| 115 | − *d++ = *s++; | |
| 116 | − *d++ = *s++; | |
| 117 | − *d++ = *s++; | |
| 118 | − *d++ = *s++; | |
| 119 | − } | |
| 120 | − | |
| 121 | − if (__n & 1 << 2) { | |
| 122 | − *d++ = *s++; | |
| 123 | − *d++ = *s++; | |
| 124 | − *d++ = *s++; | |
| 125 | − *d++ = *s++; | |
| 126 | − } | |
| 127 | − | |
| 128 | − if (__n & 1 << 1) { | |
| 129 | − *d++ = *s++; | |
| 130 | − *d++ = *s++; | |
| 131 | − } | |
| 132 | − | |
| 133 | − if (__n & 1) | |
| 134 | − *d++ = *s++; | |
| 135 | − | |
| 136 | − return __dest; | |
| 137 | −} | |
| 138 | − | |
| 139 | 99 | /* |
| 140 | 100 | * gzip declarations |
| 141 | 101 | */ |
| @@ -0,0 +1,127 @@ | ||
| 1 | +/* | |
| 2 | + * arch/arm/boot/compressed/string.c | |
| 3 | + * | |
| 4 | + * Small subset of simple string routines | |
| 5 | + */ | |
| 6 | + | |
| 7 | +#include <linux/string.h> | |
| 8 | + | |
| 9 | +void *memcpy(void *__dest, __const void *__src, size_t __n) | |
| 10 | +{ | |
| 11 | + int i = 0; | |
| 12 | + unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src; | |
| 13 | + | |
| 14 | + for (i = __n >> 3; i > 0; i--) { | |
| 15 | + *d++ = *s++; | |
| 16 | + *d++ = *s++; | |
| 17 | + *d++ = *s++; | |
| 18 | + *d++ = *s++; | |
| 19 | + *d++ = *s++; | |
| 20 | + *d++ = *s++; | |
| 21 | + *d++ = *s++; | |
| 22 | + *d++ = *s++; | |
| 23 | + } | |
| 24 | + | |
| 25 | + if (__n & 1 << 2) { | |
| 26 | + *d++ = *s++; | |
| 27 | + *d++ = *s++; | |
| 28 | + *d++ = *s++; | |
| 29 | + *d++ = *s++; | |
| 30 | + } | |
| 31 | + | |
| 32 | + if (__n & 1 << 1) { | |
| 33 | + *d++ = *s++; | |
| 34 | + *d++ = *s++; | |
| 35 | + } | |
| 36 | + | |
| 37 | + if (__n & 1) | |
| 38 | + *d++ = *s++; | |
| 39 | + | |
| 40 | + return __dest; | |
| 41 | +} | |
| 42 | + | |
| 43 | +void *memmove(void *__dest, __const void *__src, size_t count) | |
| 44 | +{ | |
| 45 | + unsigned char *d = __dest; | |
| 46 | + const unsigned char *s = __src; | |
| 47 | + | |
| 48 | + if (__dest == __src) | |
| 49 | + return __dest; | |
| 50 | + | |
| 51 | + if (__dest < __src) | |
| 52 | + return memcpy(__dest, __src, count); | |
| 53 | + | |
| 54 | + while (count--) | |
| 55 | + d[count] = s[count]; | |
| 56 | + return __dest; | |
| 57 | +} | |
| 58 | + | |
| 59 | +size_t strlen(const char *s) | |
| 60 | +{ | |
| 61 | + const char *sc = s; | |
| 62 | + | |
| 63 | + while (*sc != '\0') | |
| 64 | + sc++; | |
| 65 | + return sc - s; | |
| 66 | +} | |
| 67 | + | |
| 68 | +int memcmp(const void *cs, const void *ct, size_t count) | |
| 69 | +{ | |
| 70 | + const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count; | |
| 71 | + int res = 0; | |
| 72 | + | |
| 73 | + while (su1 < end) { | |
| 74 | + res = *su1++ - *su2++; | |
| 75 | + if (res) | |
| 76 | + break; | |
| 77 | + } | |
| 78 | + return res; | |
| 79 | +} | |
| 80 | + | |
| 81 | +int strcmp(const char *cs, const char *ct) | |
| 82 | +{ | |
| 83 | + unsigned char c1, c2; | |
| 84 | + int res = 0; | |
| 85 | + | |
| 86 | + do { | |
| 87 | + c1 = *cs++; | |
| 88 | + c2 = *ct++; | |
| 89 | + res = c1 - c2; | |
| 90 | + if (res) | |
| 91 | + break; | |
| 92 | + } while (c1); | |
| 93 | + return res; | |
| 94 | +} | |
| 95 | + | |
| 96 | +void *memchr(const void *s, int c, size_t count) | |
| 97 | +{ | |
| 98 | + const unsigned char *p = s; | |
| 99 | + | |
| 100 | + while (count--) | |
| 101 | + if ((unsigned char)c == *p++) | |
| 102 | + return (void *)(p - 1); | |
| 103 | + return NULL; | |
| 104 | +} | |
| 105 | + | |
| 106 | +char *strchr(const char *s, int c) | |
| 107 | +{ | |
| 108 | + while (*s != (char)c) | |
| 109 | + if (*s++ == '\0') | |
| 110 | + return NULL; | |
| 111 | + return (char *)s; | |
| 112 | +} | |
| 113 | + | |
| 114 | +#undef memset | |
| 115 | + | |
| 116 | +void *memset(void *s, int c, size_t count) | |
| 117 | +{ | |
| 118 | + char *xs = s; | |
| 119 | + while (count--) | |
| 120 | + *xs++ = c; | |
| 121 | + return s; | |
| 122 | +} | |
| 123 | + | |
| 124 | +void __memzero(void *s, size_t count) | |
| 125 | +{ | |
| 126 | + memset(s, 0, count); | |
| 127 | +} | |
| @@ -51,6 +51,10 @@ SECTIONS · 50 unmodified lines | ||
| 51 | 51 | _got_start = .; |
| 52 | 52 | .got : { *(.got) } |
| 53 | 53 | _got_end = .; |
| 54 | + | |
| 55 | + /* ensure the zImage file size is always a multiple of 64 bits */ | |
| 56 | + /* (without a dummy byte, ld just ignores the empty section) */ | |
| 57 | + .pad : { BYTE(0); . = ALIGN(8); } | |
| 54 | 58 | _edata = .; |
| 55 | 59 | |
| 56 | 60 | . = BSS_START; |
| @@ -0,0 +1,119 @@ | ||
| 1 | +/* | |
| 2 | + * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 Atmel, | |
| 5 | + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, | |
| 6 | + * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | |
| 7 | + * | |
| 8 | + * Licensed under GPLv2 or later. | |
| 9 | + */ | |
| 10 | + | |
| 11 | +/include/ "skeleton.dtsi" | |
| 12 | + | |
| 13 | +/ { | |
| 14 | + model = "Atmel AT91SAM9G20 family SoC"; | |
| 15 | + compatible = "atmel,at91sam9g20"; | |
| 16 | + interrupt-parent = <&aic>; | |
| 17 | + | |
| 18 | + aliases { | |
| 19 | + serial0 = &dbgu; | |
| 20 | + serial1 = &usart0; | |
| 21 | + serial2 = &usart1; | |
| 22 | + serial3 = &usart2; | |
| 23 | + serial4 = &usart3; | |
| 24 | + serial5 = &usart4; | |
| 25 | + serial6 = &usart5; | |
| 26 | + }; | |
| 27 | + cpus { | |
| 28 | + cpu@0 { | |
| 29 | + compatible = "arm,arm926ejs"; | |
| 30 | + }; | |
| 31 | + }; | |
| 32 | + | |
| 33 | + memory@20000000 { | |
| 34 | + reg = <0x20000000 0x08000000>; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + ahb { | |
| 38 | + compatible = "simple-bus"; | |
| 39 | + #address-cells = <1>; | |
| 40 | + #size-cells = <1>; | |
| 41 | + ranges; | |
| 42 | + | |
| 43 | + apb { | |
| 44 | + compatible = "simple-bus"; | |
| 45 | + #address-cells = <1>; | |
| 46 | + #size-cells = <1>; | |
| 47 | + ranges; | |
| 48 | + | |
| 49 | + aic: interrupt-controller@fffff000 { | |
| 50 | + #interrupt-cells = <1>; | |
| 51 | + compatible = "atmel,at91rm9200-aic"; | |
| 52 | + interrupt-controller; | |
| 53 | + interrupt-parent; | |
| 54 | + reg = <0xfffff000 0x200>; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + dbgu: serial@fffff200 { | |
| 58 | + compatible = "atmel,at91sam9260-usart"; | |
| 59 | + reg = <0xfffff200 0x200>; | |
| 60 | + interrupts = <1>; | |
| 61 | + status = "disabled"; | |
| 62 | + }; | |
| 63 | + | |
| 64 | + usart0: serial@fffb0000 { | |
| 65 | + compatible = "atmel,at91sam9260-usart"; | |
| 66 | + reg = <0xfffb0000 0x200>; | |
| 67 | + interrupts = <6>; | |
| 68 | + atmel,use-dma-rx; | |
| 69 | + atmel,use-dma-tx; | |
| 70 | + status = "disabled"; | |
| 71 | + }; | |
| 72 | + | |
| 73 | + usart1: serial@fffb4000 { | |
| 74 | + compatible = "atmel,at91sam9260-usart"; | |
| 75 | + reg = <0xfffb4000 0x200>; | |
| 76 | + interrupts = <7>; | |
| 77 | + atmel,use-dma-rx; | |
| 78 | + atmel,use-dma-tx; | |
| 79 | + status = "disabled"; | |
| 80 | + }; | |
| 81 | + | |
| 82 | + usart2: serial@fffb8000 { | |
| 83 | + compatible = "atmel,at91sam9260-usart"; | |
| 84 | + reg = <0xfffb8000 0x200>; | |
| 85 | + interrupts = <8>; | |
| 86 | + atmel,use-dma-rx; | |
| 87 | + atmel,use-dma-tx; | |
| 88 | + status = "disabled"; | |
| 89 | + }; | |
| 90 | + | |
| 91 | + usart3: serial@fffd0000 { | |
| 92 | + compatible = "atmel,at91sam9260-usart"; | |
| 93 | + reg = <0xfffd0000 0x200>; | |
| 94 | + interrupts = <23>; | |
| 95 | + atmel,use-dma-rx; | |
| 96 | + atmel,use-dma-tx; | |
| 97 | + status = "disabled"; | |
| 98 | + }; | |
| 99 | + | |
| 100 | + usart4: serial@fffd4000 { | |
| 101 | + compatible = "atmel,at91sam9260-usart"; | |
| 102 | + reg = <0xfffd4000 0x200>; | |
| 103 | + interrupts = <24>; | |
| 104 | + atmel,use-dma-rx; | |
| 105 | + atmel,use-dma-tx; | |
| 106 | + status = "disabled"; | |
| 107 | + }; | |
| 108 | + | |
| 109 | + usart5: serial@fffd8000 { | |
| 110 | + compatible = "atmel,at91sam9260-usart"; | |
| 111 | + reg = <0xfffd8000 0x200>; | |
| 112 | + interrupts = <25>; | |
| 113 | + atmel,use-dma-rx; | |
| 114 | + atmel,use-dma-tx; | |
| 115 | + status = "disabled"; | |
| 116 | + }; | |
| 117 | + }; | |
| 118 | + }; | |
| 119 | +}; | |
| @@ -0,0 +1,106 @@ | ||
| 1 | +/* | |
| 2 | + * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC | |
| 3 | + * applies to AT91SAM9G45, AT91SAM9M10, | |
| 4 | + * AT91SAM9G46, AT91SAM9M11 SoC | |
| 5 | + * | |
| 6 | + * Copyright (C) 2011 Atmel, | |
| 7 | + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> | |
| 8 | + * | |
| 9 | + * Licensed under GPLv2 or later. | |
| 10 | + */ | |
| 11 | + | |
| 12 | +/include/ "skeleton.dtsi" | |
| 13 | + | |
| 14 | +/ { | |
| 15 | + model = "Atmel AT91SAM9G45 family SoC"; | |
| 16 | + compatible = "atmel,at91sam9g45"; | |
| 17 | + interrupt-parent = <&aic>; | |
| 18 | + | |
| 19 | + aliases { | |
| 20 | + serial0 = &dbgu; | |
| 21 | + serial1 = &usart0; | |
| 22 | + serial2 = &usart1; | |
| 23 | + serial3 = &usart2; | |
| 24 | + serial4 = &usart3; | |
| 25 | + }; | |
| 26 | + cpus { | |
| 27 | + cpu@0 { | |
| 28 | + compatible = "arm,arm926ejs"; | |
| 29 | + }; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + memory@70000000 { | |
| 33 | + reg = <0x70000000 0x10000000>; | |
| 34 | + }; | |
| 35 | + | |
| 36 | + ahb { | |
| 37 | + compatible = "simple-bus"; | |
| 38 | + #address-cells = <1>; | |
| 39 | + #size-cells = <1>; | |
| 40 | + ranges; | |
| 41 | + | |
| 42 | + apb { | |
| 43 | + compatible = "simple-bus"; | |
| 44 | + #address-cells = <1>; | |
| 45 | + #size-cells = <1>; | |
| 46 | + ranges; | |
| 47 | + | |
| 48 | + aic: interrupt-controller@fffff000 { | |
| 49 | + #interrupt-cells = <1>; | |
| 50 | + compatible = "atmel,at91rm9200-aic"; | |
| 51 | + interrupt-controller; | |
| 52 | + interrupt-parent; | |
| 53 | + reg = <0xfffff000 0x200>; | |
| 54 | + }; | |
| 55 | + | |
| 56 | + dma: dma-controller@ffffec00 { | |
| 57 | + compatible = "atmel,at91sam9g45-dma"; | |
| 58 | + reg = <0xffffec00 0x200>; | |
| 59 | + interrupts = <21>; | |
| 60 | + }; | |
| 61 | + | |
| 62 | + dbgu: serial@ffffee00 { | |
| 63 | + compatible = "atmel,at91sam9260-usart"; | |
| 64 | + reg = <0xffffee00 0x200>; | |
| 65 | + interrupts = <1>; | |
| 66 | + status = "disabled"; | |
| 67 | + }; | |
| 68 | + | |
| 69 | + usart0: serial@fff8c000 { | |
| 70 | + compatible = "atmel,at91sam9260-usart"; | |
| 71 | + reg = <0xfff8c000 0x200>; | |
| 72 | + interrupts = <7>; | |
| 73 | + atmel,use-dma-rx; | |
| 74 | + atmel,use-dma-tx; | |
| 75 | + status = "disabled"; | |
| 76 | + }; | |
| 77 | + | |
| 78 | + usart1: serial@fff90000 { | |
| 79 | + compatible = "atmel,at91sam9260-usart"; | |
| 80 | + reg = <0xfff90000 0x200>; | |
| 81 | + interrupts = <8>; | |
| 82 | + atmel,use-dma-rx; | |
| 83 | + atmel,use-dma-tx; | |
| 84 | + status = "disabled"; | |
| 85 | + }; | |
| 86 | + | |
| 87 | + usart2: serial@fff94000 { | |
| 88 | + compatible = "atmel,at91sam9260-usart"; | |
| 89 | + reg = <0xfff94000 0x200>; | |
| 90 | + interrupts = <9>; | |
| 91 | + atmel,use-dma-rx; | |
| 92 | + atmel,use-dma-tx; | |
| 93 | + status = "disabled"; | |
| 94 | + }; | |
| 95 | + | |
| 96 | + usart3: serial@fff98000 { | |
| 97 | + compatible = "atmel,at91sam9260-usart"; | |
| 98 | + reg = <0xfff98000 0x200>; | |
| 99 | + interrupts = <10>; | |
| 100 | + atmel,use-dma-rx; | |
| 101 | + atmel,use-dma-tx; | |
| 102 | + status = "disabled"; | |
| 103 | + }; | |
| 104 | + }; | |
| 105 | + }; | |
| 106 | +}; | |
| @@ -0,0 +1,35 @@ | ||
| 1 | +/* | |
| 2 | + * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 Atmel, | |
| 5 | + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> | |
| 6 | + * | |
| 7 | + * Licensed under GPLv2 or later. | |
| 8 | + */ | |
| 9 | +/dts-v1/; | |
| 10 | +/include/ "at91sam9g45.dtsi" | |
| 11 | + | |
| 12 | +/ { | |
| 13 | + model = "Atmel AT91SAM9M10G45-EK"; | |
| 14 | + compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9"; | |
| 15 | + | |
| 16 | + chosen { | |
| 17 | + bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:4M(bootstrap/uboot/kernel)ro,60M(rootfs),-(data) root=/dev/mtdblock1 rw rootfstype=jffs2"; | |
| 18 | + }; | |
| 19 | + | |
| 20 | + memory@70000000 { | |
| 21 | + reg = <0x70000000 0x4000000>; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + ahb { | |
| 25 | + apb { | |
| 26 | + dbgu: serial@ffffee00 { | |
| 27 | + status = "okay"; | |
| 28 | + }; | |
| 29 | + | |
| 30 | + usart1: serial@fff90000 { | |
| 31 | + status = "okay"; | |
| 32 | + }; | |
| 33 | + }; | |
| 34 | + }; | |
| 35 | +}; | |
| @@ -0,0 +1,198 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Calxeda, Inc. | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify it | |
| 5 | + * under the terms and conditions of the GNU General Public License, | |
| 6 | + * version 2, as published by the Free Software Foundation. | |
| 7 | + * | |
| 8 | + * This program is distributed in the hope it will be useful, but WITHOUT | |
| 9 | + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 10 | + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 11 | + * more details. | |
| 12 | + * | |
| 13 | + * You should have received a copy of the GNU General Public License along with | |
| 14 | + * this program. If not, see <http://www.gnu.org/licenses/>. | |
| 15 | + */ | |
| 16 | + | |
| 17 | +/dts-v1/; | |
| 18 | + | |
| 19 | +/* First 4KB has pen for secondary cores. */ | |
| 20 | +/memreserve/ 0x00000000 0x0001000; | |
| 21 | + | |
| 22 | +/ { | |
| 23 | + model = "Calxeda Highbank"; | |
| 24 | + compatible = "calxeda,highbank"; | |
| 25 | + #address-cells = <1>; | |
| 26 | + #size-cells = <1>; | |
| 27 | + | |
| 28 | + cpus { | |
| 29 | + #address-cells = <1>; | |
| 30 | + #size-cells = <0>; | |
| 31 | + | |
| 32 | + cpu@0 { | |
| 33 | + compatible = "arm,cortex-a9"; | |
| 34 | + reg = <0>; | |
| 35 | + next-level-cache = <&L2>; | |
| 36 | + }; | |
| 37 | + | |
| 38 | + cpu@1 { | |
| 39 | + compatible = "arm,cortex-a9"; | |
| 40 | + reg = <1>; | |
| 41 | + next-level-cache = <&L2>; | |
| 42 | + }; | |
| 43 | + | |
| 44 | + cpu@2 { | |
| 45 | + compatible = "arm,cortex-a9"; | |
| 46 | + reg = <2>; | |
| 47 | + next-level-cache = <&L2>; | |
| 48 | + }; | |
| 49 | + | |
| 50 | + cpu@3 { | |
| 51 | + compatible = "arm,cortex-a9"; | |
| 52 | + reg = <3>; | |
| 53 | + next-level-cache = <&L2>; | |
| 54 | + }; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + memory { | |
| 58 | + name = "memory"; | |
| 59 | + device_type = "memory"; | |
| 60 | + reg = <0x00000000 0xff900000>; | |
| 61 | + }; | |
| 62 | + | |
| 63 | + chosen { | |
| 64 | + bootargs = "console=ttyAMA0"; | |
| 65 | + }; | |
| 66 | + | |
| 67 | + soc { | |
| 68 | + #address-cells = <1>; | |
| 69 | + #size-cells = <1>; | |
| 70 | + compatible = "simple-bus"; | |
| 71 | + interrupt-parent = <&intc>; | |
| 72 | + ranges; | |
| 73 | + | |
| 74 | + timer@fff10600 { | |
| 75 | + compatible = "arm,smp-twd"; | |
| 76 | + reg = <0xfff10600 0x20>; | |
| 77 | + interrupts = <1 13 0xf04>; | |
| 78 | + }; | |
| 79 | + | |
| 80 | + watchdog@fff10620 { | |
| 81 | + compatible = "arm,cortex-a9-wdt"; | |
| 82 | + reg = <0xfff10620 0x20>; | |
| 83 | + interrupts = <1 14 0xf04>; | |
| 84 | + }; | |
| 85 | + | |
| 86 | + intc: interrupt-controller@fff11000 { | |
| 87 | + compatible = "arm,cortex-a9-gic"; | |
| 88 | + #interrupt-cells = <3>; | |
| 89 | + #size-cells = <0>; | |
| 90 | + #address-cells = <1>; | |
| 91 | + interrupt-controller; | |
| 92 | + interrupt-parent; | |
| 93 | + reg = <0xfff11000 0x1000>, | |
| 94 | + <0xfff10100 0x100>; | |
| 95 | + }; | |
| 96 | + | |
| 97 | + L2: l2-cache { | |
| 98 | + compatible = "arm,pl310-cache"; | |
| 99 | + reg = <0xfff12000 0x1000>; | |
| 100 | + interrupts = <0 70 4>; | |
| 101 | + cache-unified; | |
| 102 | + cache-level = <2>; | |
| 103 | + }; | |
| 104 | + | |
| 105 | + pmu { | |
| 106 | + compatible = "arm,cortex-a9-pmu"; | |
| 107 | + interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; | |
| 108 | + }; | |
| 109 | + | |
| 110 | + sata@ffe08000 { | |
| 111 | + compatible = "calxeda,hb-ahci"; | |
| 112 | + reg = <0xffe08000 0x10000>; | |
| 113 | + interrupts = <0 83 4>; | |
| 114 | + }; | |
| 115 | + | |
| 116 | + sdhci@ffe0e000 { | |
| 117 | + compatible = "calxeda,hb-sdhci"; | |
| 118 | + reg = <0xffe0e000 0x1000>; | |
| 119 | + interrupts = <0 90 4>; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + ipc@fff20000 { | |
| 123 | + compatible = "arm,pl320", "arm,primecell"; | |
| 124 | + reg = <0xfff20000 0x1000>; | |
| 125 | + interrupts = <0 7 4>; | |
| 126 | + }; | |
| 127 | + | |
| 128 | + gpioe: gpio@fff30000 { | |
| 129 | + #gpio-cells = <2>; | |
| 130 | + compatible = "arm,pl061", "arm,primecell"; | |
| 131 | + gpio-controller; | |
| 132 | + reg = <0xfff30000 0x1000>; | |
| 133 | + interrupts = <0 14 4>; | |
| 134 | + }; | |
| 135 | + | |
| 136 | + gpiof: gpio@fff31000 { | |
| 137 | + #gpio-cells = <2>; | |
| 138 | + compatible = "arm,pl061", "arm,primecell"; | |
| 139 | + gpio-controller; | |
| 140 | + reg = <0xfff31000 0x1000>; | |
| 141 | + interrupts = <0 15 4>; | |
| 142 | + }; | |
| 143 | + | |
| 144 | + gpiog: gpio@fff32000 { | |
| 145 | + #gpio-cells = <2>; | |
| 146 | + compatible = "arm,pl061", "arm,primecell"; | |
| 147 | + gpio-controller; | |
| 148 | + reg = <0xfff32000 0x1000>; | |
| 149 | + interrupts = <0 16 4>; | |
| 150 | + }; | |
| 151 | + | |
| 152 | + gpioh: gpio@fff33000 { | |
| 153 | + #gpio-cells = <2>; | |
| 154 | + compatible = "arm,pl061", "arm,primecell"; | |
| 155 | + gpio-controller; | |
| 156 | + reg = <0xfff33000 0x1000>; | |
| 157 | + interrupts = <0 17 4>; | |
| 158 | + }; | |
| 159 | + | |
| 160 | + timer { | |
| 161 | + compatible = "arm,sp804", "arm,primecell"; | |
| 162 | + reg = <0xfff34000 0x1000>; | |
| 163 | + interrupts = <0 18 4>; | |
| 164 | + }; | |
| 165 | + | |
| 166 | + rtc@fff35000 { | |
| 167 | + compatible = "arm,pl031", "arm,primecell"; | |
| 168 | + reg = <0xfff35000 0x1000>; | |
| 169 | + interrupts = <0 19 4>; | |
| 170 | + }; | |
| 171 | + | |
| 172 | + serial@fff36000 { | |
| 173 | + compatible = "arm,pl011", "arm,primecell"; | |
| 174 | + reg = <0xfff36000 0x1000>; | |
| 175 | + interrupts = <0 20 4>; | |
| 176 | + }; | |
| 177 | + | |
| 178 | + smic@fff3a000 { | |
| 179 | + compatible = "ipmi-smic"; | |
| 180 | + device_type = "ipmi"; | |
| 181 | + reg = <0xfff3a000 0x1000>; | |
| 182 | + interrupts = <0 24 4>; | |
| 183 | + reg-size = <4>; | |
| 184 | + reg-spacing = <4>; | |
| 185 | + }; | |
| 186 | + | |
| 187 | + sregs@fff3c000 { | |
| 188 | + compatible = "calxeda,hb-sregs"; | |
| 189 | + reg = <0xfff3c000 0x1000>; | |
| 190 | + }; | |
| 191 | + | |
| 192 | + dma@fff3d000 { | |
| 193 | + compatible = "arm,pl330", "arm,primecell"; | |
| 194 | + reg = <0xfff3d000 0x1000>; | |
| 195 | + interrupts = <0 92 4>; | |
| 196 | + }; | |
| 197 | + }; | |
| 198 | +}; | |
| @@ -0,0 +1,135 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/dts-v1/; | |
| 14 | +/include/ "imx51.dtsi" | |
| 15 | + | |
| 16 | +/ { | |
| 17 | + model = "Freescale i.MX51 Babbage Board"; | |
| 18 | + compatible = "fsl,imx51-babbage", "fsl,imx51"; | |
| 19 | + | |
| 20 | + chosen { | |
| 21 | + bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + memory { | |
| 25 | + reg = <0x90000000 0x20000000>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + soc { | |
| 29 | + aips@70000000 { /* aips-1 */ | |
| 30 | + spba@70000000 { | |
| 31 | + esdhc@70004000 { /* ESDHC1 */ | |
| 32 | + fsl,cd-internal; | |
| 33 | + fsl,wp-internal; | |
| 34 | + status = "okay"; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + esdhc@70008000 { /* ESDHC2 */ | |
| 38 | + cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */ | |
| 39 | + wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */ | |
| 40 | + status = "okay"; | |
| 41 | + }; | |
| 42 | + | |
| 43 | + uart2: uart@7000c000 { /* UART3 */ | |
| 44 | + fsl,uart-has-rtscts; | |
| 45 | + status = "okay"; | |
| 46 | + }; | |
| 47 | + | |
| 48 | + ecspi@70010000 { /* ECSPI1 */ | |
| 49 | + fsl,spi-num-chipselects = <2>; | |
| 50 | + cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ | |
| 51 | + <&gpio3 25 0>; /* GPIO4_25 */ | |
| 52 | + status = "okay"; | |
| 53 | + | |
| 54 | + pmic: mc13892@0 { | |
| 55 | + #address-cells = <1>; | |
| 56 | + #size-cells = <0>; | |
| 57 | + compatible = "fsl,mc13892"; | |
| 58 | + spi-max-frequency = <6000000>; | |
| 59 | + reg = <0>; | |
| 60 | + mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */ | |
| 61 | + fsl,mc13xxx-uses-regulator; | |
| 62 | + }; | |
| 63 | + | |
| 64 | + flash: at45db321d@1 { | |
| 65 | + #address-cells = <1>; | |
| 66 | + #size-cells = <1>; | |
| 67 | + compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash"; | |
| 68 | + spi-max-frequency = <25000000>; | |
| 69 | + reg = <1>; | |
| 70 | + | |
| 71 | + partition@0 { | |
| 72 | + label = "U-Boot"; | |
| 73 | + reg = <0x0 0x40000>; | |
| 74 | + read-only; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + partition@40000 { | |
| 78 | + label = "Kernel"; | |
| 79 | + reg = <0x40000 0x3c0000>; | |
| 80 | + }; | |
| 81 | + }; | |
| 82 | + }; | |
| 83 | + }; | |
| 84 | + | |
| 85 | + wdog@73f98000 { /* WDOG1 */ | |
| 86 | + status = "okay"; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + iomuxc@73fa8000 { | |
| 90 | + compatible = "fsl,imx51-iomuxc-babbage"; | |
| 91 | + reg = <0x73fa8000 0x4000>; | |
| 92 | + }; | |
| 93 | + | |
| 94 | + uart0: uart@73fbc000 { | |
| 95 | + fsl,uart-has-rtscts; | |
| 96 | + status = "okay"; | |
| 97 | + }; | |
| 98 | + | |
| 99 | + uart1: uart@73fc0000 { | |
| 100 | + status = "okay"; | |
| 101 | + }; | |
| 102 | + }; | |
| 103 | + | |
| 104 | + aips@80000000 { /* aips-2 */ | |
| 105 | + sdma@83fb0000 { | |
| 106 | + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; | |
| 107 | + }; | |
| 108 | + | |
| 109 | + i2c@83fc4000 { /* I2C2 */ | |
| 110 | + status = "okay"; | |
| 111 | + | |
| 112 | + codec: sgtl5000@0a { | |
| 113 | + compatible = "fsl,sgtl5000"; | |
| 114 | + reg = <0x0a>; | |
| 115 | + }; | |
| 116 | + }; | |
| 117 | + | |
| 118 | + fec@83fec000 { | |
| 119 | + phy-mode = "mii"; | |
| 120 | + status = "okay"; | |
| 121 | + }; | |
| 122 | + }; | |
| 123 | + }; | |
| 124 | + | |
| 125 | + gpio-keys { | |
| 126 | + compatible = "gpio-keys"; | |
| 127 | + | |
| 128 | + power { | |
| 129 | + label = "Power Button"; | |
| 130 | + gpios = <&gpio1 21 0>; | |
| 131 | + linux,code = <116>; /* KEY_POWER */ | |
| 132 | + gpio-key,wakeup; | |
| 133 | + }; | |
| 134 | + }; | |
| 135 | +}; | |
| @@ -0,0 +1,246 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/include/ "skeleton.dtsi" | |
| 14 | + | |
| 15 | +/ { | |
| 16 | + aliases { | |
| 17 | + serial0 = &uart0; | |
| 18 | + serial1 = &uart1; | |
| 19 | + serial2 = &uart2; | |
| 20 | + }; | |
| 21 | + | |
| 22 | + tzic: tz-interrupt-controller@e0000000 { | |
| 23 | + compatible = "fsl,imx51-tzic", "fsl,tzic"; | |
| 24 | + interrupt-controller; | |
| 25 | + #interrupt-cells = <1>; | |
| 26 | + reg = <0xe0000000 0x4000>; | |
| 27 | + }; | |
| 28 | + | |
| 29 | + clocks { | |
| 30 | + #address-cells = <1>; | |
| 31 | + #size-cells = <0>; | |
| 32 | + | |
| 33 | + ckil { | |
| 34 | + compatible = "fsl,imx-ckil", "fixed-clock"; | |
| 35 | + clock-frequency = <32768>; | |
| 36 | + }; | |
| 37 | + | |
| 38 | + ckih1 { | |
| 39 | + compatible = "fsl,imx-ckih1", "fixed-clock"; | |
| 40 | + clock-frequency = <22579200>; | |
| 41 | + }; | |
| 42 | + | |
| 43 | + ckih2 { | |
| 44 | + compatible = "fsl,imx-ckih2", "fixed-clock"; | |
| 45 | + clock-frequency = <0>; | |
| 46 | + }; | |
| 47 | + | |
| 48 | + osc { | |
| 49 | + compatible = "fsl,imx-osc", "fixed-clock"; | |
| 50 | + clock-frequency = <24000000>; | |
| 51 | + }; | |
| 52 | + }; | |
| 53 | + | |
| 54 | + soc { | |
| 55 | + #address-cells = <1>; | |
| 56 | + #size-cells = <1>; | |
| 57 | + compatible = "simple-bus"; | |
| 58 | + interrupt-parent = <&tzic>; | |
| 59 | + ranges; | |
| 60 | + | |
| 61 | + aips@70000000 { /* AIPS1 */ | |
| 62 | + compatible = "fsl,aips-bus", "simple-bus"; | |
| 63 | + #address-cells = <1>; | |
| 64 | + #size-cells = <1>; | |
| 65 | + reg = <0x70000000 0x10000000>; | |
| 66 | + ranges; | |
| 67 | + | |
| 68 | + spba@70000000 { | |
| 69 | + compatible = "fsl,spba-bus", "simple-bus"; | |
| 70 | + #address-cells = <1>; | |
| 71 | + #size-cells = <1>; | |
| 72 | + reg = <0x70000000 0x40000>; | |
| 73 | + ranges; | |
| 74 | + | |
| 75 | + esdhc@70004000 { /* ESDHC1 */ | |
| 76 | + compatible = "fsl,imx51-esdhc"; | |
| 77 | + reg = <0x70004000 0x4000>; | |
| 78 | + interrupts = <1>; | |
| 79 | + status = "disabled"; | |
| 80 | + }; | |
| 81 | + | |
| 82 | + esdhc@70008000 { /* ESDHC2 */ | |
| 83 | + compatible = "fsl,imx51-esdhc"; | |
| 84 | + reg = <0x70008000 0x4000>; | |
| 85 | + interrupts = <2>; | |
| 86 | + status = "disabled"; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + uart2: uart@7000c000 { /* UART3 */ | |
| 90 | + compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | |
| 91 | + reg = <0x7000c000 0x4000>; | |
| 92 | + interrupts = <33>; | |
| 93 | + status = "disabled"; | |
| 94 | + }; | |
| 95 | + | |
| 96 | + ecspi@70010000 { /* ECSPI1 */ | |
| 97 | + #address-cells = <1>; | |
| 98 | + #size-cells = <0>; | |
| 99 | + compatible = "fsl,imx51-ecspi"; | |
| 100 | + reg = <0x70010000 0x4000>; | |
| 101 | + interrupts = <36>; | |
| 102 | + status = "disabled"; | |
| 103 | + }; | |
| 104 | + | |
| 105 | + esdhc@70020000 { /* ESDHC3 */ | |
| 106 | + compatible = "fsl,imx51-esdhc"; | |
| 107 | + reg = <0x70020000 0x4000>; | |
| 108 | + interrupts = <3>; | |
| 109 | + status = "disabled"; | |
| 110 | + }; | |
| 111 | + | |
| 112 | + esdhc@70024000 { /* ESDHC4 */ | |
| 113 | + compatible = "fsl,imx51-esdhc"; | |
| 114 | + reg = <0x70024000 0x4000>; | |
| 115 | + interrupts = <4>; | |
| 116 | + status = "disabled"; | |
| 117 | + }; | |
| 118 | + }; | |
| 119 | + | |
| 120 | + gpio0: gpio@73f84000 { /* GPIO1 */ | |
| 121 | + compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; | |
| 122 | + reg = <0x73f84000 0x4000>; | |
| 123 | + interrupts = <50 51>; | |
| 124 | + gpio-controller; | |
| 125 | + #gpio-cells = <2>; | |
| 126 | + interrupt-controller; | |
| 127 | + #interrupt-cells = <1>; | |
| 128 | + }; | |
| 129 | + | |
| 130 | + gpio1: gpio@73f88000 { /* GPIO2 */ | |
| 131 | + compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; | |
| 132 | + reg = <0x73f88000 0x4000>; | |
| 133 | + interrupts = <52 53>; | |
| 134 | + gpio-controller; | |
| 135 | + #gpio-cells = <2>; | |
| 136 | + interrupt-controller; | |
| 137 | + #interrupt-cells = <1>; | |
| 138 | + }; | |
| 139 | + | |
| 140 | + gpio2: gpio@73f8c000 { /* GPIO3 */ | |
| 141 | + compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; | |
| 142 | + reg = <0x73f8c000 0x4000>; | |
| 143 | + interrupts = <54 55>; | |
| 144 | + gpio-controller; | |
| 145 | + #gpio-cells = <2>; | |
| 146 | + interrupt-controller; | |
| 147 | + #interrupt-cells = <1>; | |
| 148 | + }; | |
| 149 | + | |
| 150 | + gpio3: gpio@73f90000 { /* GPIO4 */ | |
| 151 | + compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; | |
| 152 | + reg = <0x73f90000 0x4000>; | |
| 153 | + interrupts = <56 57>; | |
| 154 | + gpio-controller; | |
| 155 | + #gpio-cells = <2>; | |
| 156 | + interrupt-controller; | |
| 157 | + #interrupt-cells = <1>; | |
| 158 | + }; | |
| 159 | + | |
| 160 | + wdog@73f98000 { /* WDOG1 */ | |
| 161 | + compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; | |
| 162 | + reg = <0x73f98000 0x4000>; | |
| 163 | + interrupts = <58>; | |
| 164 | + status = "disabled"; | |
| 165 | + }; | |
| 166 | + | |
| 167 | + wdog@73f9c000 { /* WDOG2 */ | |
| 168 | + compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; | |
| 169 | + reg = <0x73f9c000 0x4000>; | |
| 170 | + interrupts = <59>; | |
| 171 | + status = "disabled"; | |
| 172 | + }; | |
| 173 | + | |
| 174 | + uart0: uart@73fbc000 { | |
| 175 | + compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | |
| 176 | + reg = <0x73fbc000 0x4000>; | |
| 177 | + interrupts = <31>; | |
| 178 | + status = "disabled"; | |
| 179 | + }; | |
| 180 | + | |
| 181 | + uart1: uart@73fc0000 { | |
| 182 | + compatible = "fsl,imx51-uart", "fsl,imx21-uart"; | |
| 183 | + reg = <0x73fc0000 0x4000>; | |
| 184 | + interrupts = <32>; | |
| 185 | + status = "disabled"; | |
| 186 | + }; | |
| 187 | + }; | |
| 188 | + | |
| 189 | + aips@80000000 { /* AIPS2 */ | |
| 190 | + compatible = "fsl,aips-bus", "simple-bus"; | |
| 191 | + #address-cells = <1>; | |
| 192 | + #size-cells = <1>; | |
| 193 | + reg = <0x80000000 0x10000000>; | |
| 194 | + ranges; | |
| 195 | + | |
| 196 | + ecspi@83fac000 { /* ECSPI2 */ | |
| 197 | + #address-cells = <1>; | |
| 198 | + #size-cells = <0>; | |
| 199 | + compatible = "fsl,imx51-ecspi"; | |
| 200 | + reg = <0x83fac000 0x4000>; | |
| 201 | + interrupts = <37>; | |
| 202 | + status = "disabled"; | |
| 203 | + }; | |
| 204 | + | |
| 205 | + sdma@83fb0000 { | |
| 206 | + compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; | |
| 207 | + reg = <0x83fb0000 0x4000>; | |
| 208 | + interrupts = <6>; | |
| 209 | + }; | |
| 210 | + | |
| 211 | + cspi@83fc0000 { | |
| 212 | + #address-cells = <1>; | |
| 213 | + #size-cells = <0>; | |
| 214 | + compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; | |
| 215 | + reg = <0x83fc0000 0x4000>; | |
| 216 | + interrupts = <38>; | |
| 217 | + status = "disabled"; | |
| 218 | + }; | |
| 219 | + | |
| 220 | + i2c@83fc4000 { /* I2C2 */ | |
| 221 | + #address-cells = <1>; | |
| 222 | + #size-cells = <0>; | |
| 223 | + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; | |
| 224 | + reg = <0x83fc4000 0x4000>; | |
| 225 | + interrupts = <63>; | |
| 226 | + status = "disabled"; | |
| 227 | + }; | |
| 228 | + | |
| 229 | + i2c@83fc8000 { /* I2C1 */ | |
| 230 | + #address-cells = <1>; | |
| 231 | + #size-cells = <0>; | |
| 232 | + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; | |
| 233 | + reg = <0x83fc8000 0x4000>; | |
| 234 | + interrupts = <62>; | |
| 235 | + status = "disabled"; | |
| 236 | + }; | |
| 237 | + | |
| 238 | + fec@83fec000 { | |
| 239 | + compatible = "fsl,imx51-fec", "fsl,imx27-fec"; | |
| 240 | + reg = <0x83fec000 0x4000>; | |
| 241 | + interrupts = <87>; | |
| 242 | + status = "disabled"; | |
| 243 | + }; | |
| 244 | + }; | |
| 245 | + }; | |
| 246 | +}; | |
| @@ -0,0 +1,113 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/dts-v1/; | |
| 14 | +/include/ "imx53.dtsi" | |
| 15 | + | |
| 16 | +/ { | |
| 17 | + model = "Freescale i.MX53 Automotive Reference Design Board"; | |
| 18 | + compatible = "fsl,imx53-ard", "fsl,imx53"; | |
| 19 | + | |
| 20 | + chosen { | |
| 21 | + bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + memory { | |
| 25 | + reg = <0x70000000 0x40000000>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + soc { | |
| 29 | + aips@50000000 { /* AIPS1 */ | |
| 30 | + spba@50000000 { | |
| 31 | + esdhc@50004000 { /* ESDHC1 */ | |
| 32 | + cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */ | |
| 33 | + wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */ | |
| 34 | + status = "okay"; | |
| 35 | + }; | |
| 36 | + }; | |
| 37 | + | |
| 38 | + wdog@53f98000 { /* WDOG1 */ | |
| 39 | + status = "okay"; | |
| 40 | + }; | |
| 41 | + | |
| 42 | + iomuxc@53fa8000 { | |
| 43 | + compatible = "fsl,imx53-iomuxc-ard"; | |
| 44 | + reg = <0x53fa8000 0x4000>; | |
| 45 | + }; | |
| 46 | + | |
| 47 | + uart0: uart@53fbc000 { /* UART1 */ | |
| 48 | + status = "okay"; | |
| 49 | + }; | |
| 50 | + }; | |
| 51 | + | |
| 52 | + aips@60000000 { /* AIPS2 */ | |
| 53 | + sdma@63fb0000 { | |
| 54 | + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; | |
| 55 | + }; | |
| 56 | + }; | |
| 57 | + }; | |
| 58 | + | |
| 59 | + eim-cs1@f4000000 { | |
| 60 | + #address-cells = <1>; | |
| 61 | + #size-cells = <1>; | |
| 62 | + compatible = "fsl,eim-bus", "simple-bus"; | |
| 63 | + reg = <0xf4000000 0x3ff0000>; | |
| 64 | + ranges; | |
| 65 | + | |
| 66 | + lan9220@f4000000 { | |
| 67 | + compatible = "smsc,lan9220", "smsc,lan9115"; | |
| 68 | + reg = <0xf4000000 0x2000000>; | |
| 69 | + phy-mode = "mii"; | |
| 70 | + interrupt-parent = <&gpio1>; | |
| 71 | + interrupts = <31>; | |
| 72 | + reg-io-width = <4>; | |
| 73 | + smsc,irq-push-pull; | |
| 74 | + }; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + gpio-keys { | |
| 78 | + compatible = "gpio-keys"; | |
| 79 | + | |
| 80 | + home { | |
| 81 | + label = "Home"; | |
| 82 | + gpios = <&gpio4 10 0>; /* GPIO5_10 */ | |
| 83 | + linux,code = <102>; /* KEY_HOME */ | |
| 84 | + gpio-key,wakeup; | |
| 85 | + }; | |
| 86 | + | |
| 87 | + back { | |
| 88 | + label = "Back"; | |
| 89 | + gpios = <&gpio4 11 0>; /* GPIO5_11 */ | |
| 90 | + linux,code = <158>; /* KEY_BACK */ | |
| 91 | + gpio-key,wakeup; | |
| 92 | + }; | |
| 93 | + | |
| 94 | + program { | |
| 95 | + label = "Program"; | |
| 96 | + gpios = <&gpio4 12 0>; /* GPIO5_12 */ | |
| 97 | + linux,code = <362>; /* KEY_PROGRAM */ | |
| 98 | + gpio-key,wakeup; | |
| 99 | + }; | |
| 100 | + | |
| 101 | + volume-up { | |
| 102 | + label = "Volume Up"; | |
| 103 | + gpios = <&gpio4 13 0>; /* GPIO5_13 */ | |
| 104 | + linux,code = <115>; /* KEY_VOLUMEUP */ | |
| 105 | + }; | |
| 106 | + | |
| 107 | + volume-down { | |
| 108 | + label = "Volume Down"; | |
| 109 | + gpios = <&gpio3 0 0>; /* GPIO4_0 */ | |
| 110 | + linux,code = <114>; /* KEY_VOLUMEDOWN */ | |
| 111 | + }; | |
| 112 | + }; | |
| 113 | +}; | |
| @@ -0,0 +1,120 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/dts-v1/; | |
| 14 | +/include/ "imx53.dtsi" | |
| 15 | + | |
| 16 | +/ { | |
| 17 | + model = "Freescale i.MX53 Evaluation Kit"; | |
| 18 | + compatible = "fsl,imx53-evk", "fsl,imx53"; | |
| 19 | + | |
| 20 | + chosen { | |
| 21 | + bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + memory { | |
| 25 | + reg = <0x70000000 0x80000000>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + soc { | |
| 29 | + aips@50000000 { /* AIPS1 */ | |
| 30 | + spba@50000000 { | |
| 31 | + esdhc@50004000 { /* ESDHC1 */ | |
| 32 | + cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ | |
| 33 | + wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */ | |
| 34 | + status = "okay"; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + ecspi@50010000 { /* ECSPI1 */ | |
| 38 | + fsl,spi-num-chipselects = <2>; | |
| 39 | + cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ | |
| 40 | + <&gpio2 19 0>; /* GPIO3_19 */ | |
| 41 | + status = "okay"; | |
| 42 | + | |
| 43 | + flash: at45db321d@1 { | |
| 44 | + #address-cells = <1>; | |
| 45 | + #size-cells = <1>; | |
| 46 | + compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash"; | |
| 47 | + spi-max-frequency = <25000000>; | |
| 48 | + reg = <1>; | |
| 49 | + | |
| 50 | + partition@0 { | |
| 51 | + label = "U-Boot"; | |
| 52 | + reg = <0x0 0x40000>; | |
| 53 | + read-only; | |
| 54 | + }; | |
| 55 | + | |
| 56 | + partition@40000 { | |
| 57 | + label = "Kernel"; | |
| 58 | + reg = <0x40000 0x3c0000>; | |
| 59 | + }; | |
| 60 | + }; | |
| 61 | + }; | |
| 62 | + | |
| 63 | + esdhc@50020000 { /* ESDHC3 */ | |
| 64 | + cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ | |
| 65 | + wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ | |
| 66 | + status = "okay"; | |
| 67 | + }; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + wdog@53f98000 { /* WDOG1 */ | |
| 71 | + status = "okay"; | |
| 72 | + }; | |
| 73 | + | |
| 74 | + iomuxc@53fa8000 { | |
| 75 | + compatible = "fsl,imx53-iomuxc-evk"; | |
| 76 | + reg = <0x53fa8000 0x4000>; | |
| 77 | + }; | |
| 78 | + | |
| 79 | + uart0: uart@53fbc000 { /* UART1 */ | |
| 80 | + status = "okay"; | |
| 81 | + }; | |
| 82 | + }; | |
| 83 | + | |
| 84 | + aips@60000000 { /* AIPS2 */ | |
| 85 | + sdma@63fb0000 { | |
| 86 | + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + i2c@63fc4000 { /* I2C2 */ | |
| 90 | + status = "okay"; | |
| 91 | + | |
| 92 | + pmic: mc13892@08 { | |
| 93 | + compatible = "fsl,mc13892", "fsl,mc13xxx"; | |
| 94 | + reg = <0x08>; | |
| 95 | + }; | |
| 96 | + | |
| 97 | + codec: sgtl5000@0a { | |
| 98 | + compatible = "fsl,sgtl5000"; | |
| 99 | + reg = <0x0a>; | |
| 100 | + }; | |
| 101 | + }; | |
| 102 | + | |
| 103 | + fec@63fec000 { | |
| 104 | + phy-mode = "rmii"; | |
| 105 | + phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ | |
| 106 | + status = "okay"; | |
| 107 | + }; | |
| 108 | + }; | |
| 109 | + }; | |
| 110 | + | |
| 111 | + leds { | |
| 112 | + compatible = "gpio-leds"; | |
| 113 | + | |
| 114 | + green { | |
| 115 | + label = "Heartbeat"; | |
| 116 | + gpios = <&gpio6 7 0>; /* GPIO7_7 */ | |
| 117 | + linux,default-trigger = "heartbeat"; | |
| 118 | + }; | |
| 119 | + }; | |
| 120 | +}; | |
| @@ -0,0 +1,125 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/dts-v1/; | |
| 14 | +/include/ "imx53.dtsi" | |
| 15 | + | |
| 16 | +/ { | |
| 17 | + model = "Freescale i.MX53 Quick Start Board"; | |
| 18 | + compatible = "fsl,imx53-qsb", "fsl,imx53"; | |
| 19 | + | |
| 20 | + chosen { | |
| 21 | + bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + memory { | |
| 25 | + reg = <0x70000000 0x40000000>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + soc { | |
| 29 | + aips@50000000 { /* AIPS1 */ | |
| 30 | + spba@50000000 { | |
| 31 | + esdhc@50004000 { /* ESDHC1 */ | |
| 32 | + cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ | |
| 33 | + status = "okay"; | |
| 34 | + }; | |
| 35 | + | |
| 36 | + esdhc@50020000 { /* ESDHC3 */ | |
| 37 | + cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ | |
| 38 | + wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ | |
| 39 | + status = "okay"; | |
| 40 | + }; | |
| 41 | + }; | |
| 42 | + | |
| 43 | + wdog@53f98000 { /* WDOG1 */ | |
| 44 | + status = "okay"; | |
| 45 | + }; | |
| 46 | + | |
| 47 | + iomuxc@53fa8000 { | |
| 48 | + compatible = "fsl,imx53-iomuxc-qsb"; | |
| 49 | + reg = <0x53fa8000 0x4000>; | |
| 50 | + }; | |
| 51 | + | |
| 52 | + uart0: uart@53fbc000 { /* UART1 */ | |
| 53 | + status = "okay"; | |
| 54 | + }; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + aips@60000000 { /* AIPS2 */ | |
| 58 | + sdma@63fb0000 { | |
| 59 | + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; | |
| 60 | + }; | |
| 61 | + | |
| 62 | + i2c@63fc4000 { /* I2C2 */ | |
| 63 | + status = "okay"; | |
| 64 | + | |
| 65 | + codec: sgtl5000@0a { | |
| 66 | + compatible = "fsl,sgtl5000"; | |
| 67 | + reg = <0x0a>; | |
| 68 | + }; | |
| 69 | + }; | |
| 70 | + | |
| 71 | + i2c@63fc8000 { /* I2C1 */ | |
| 72 | + status = "okay"; | |
| 73 | + | |
| 74 | + accelerometer: mma8450@1c { | |
| 75 | + compatible = "fsl,mma8450"; | |
| 76 | + reg = <0x1c>; | |
| 77 | + }; | |
| 78 | + | |
| 79 | + pmic: dialog@48 { | |
| 80 | + compatible = "dialog,da9053", "dialog,da9052"; | |
| 81 | + reg = <0x48>; | |
| 82 | + }; | |
| 83 | + }; | |
| 84 | + | |
| 85 | + fec@63fec000 { | |
| 86 | + phy-mode = "rmii"; | |
| 87 | + phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ | |
| 88 | + status = "okay"; | |
| 89 | + }; | |
| 90 | + }; | |
| 91 | + }; | |
| 92 | + | |
| 93 | + gpio-keys { | |
| 94 | + compatible = "gpio-keys"; | |
| 95 | + | |
| 96 | + power { | |
| 97 | + label = "Power Button"; | |
| 98 | + gpios = <&gpio0 8 0>; /* GPIO1_8 */ | |
| 99 | + linux,code = <116>; /* KEY_POWER */ | |
| 100 | + gpio-key,wakeup; | |
| 101 | + }; | |
| 102 | + | |
| 103 | + volume-up { | |
| 104 | + label = "Volume Up"; | |
| 105 | + gpios = <&gpio1 14 0>; /* GPIO2_14 */ | |
| 106 | + linux,code = <115>; /* KEY_VOLUMEUP */ | |
| 107 | + }; | |
| 108 | + | |
| 109 | + volume-down { | |
| 110 | + label = "Volume Down"; | |
| 111 | + gpios = <&gpio1 15 0>; /* GPIO2_15 */ | |
| 112 | + linux,code = <114>; /* KEY_VOLUMEDOWN */ | |
| 113 | + }; | |
| 114 | + }; | |
| 115 | + | |
| 116 | + leds { | |
| 117 | + compatible = "gpio-leds"; | |
| 118 | + | |
| 119 | + user { | |
| 120 | + label = "Heartbeat"; | |
| 121 | + gpios = <&gpio6 7 0>; /* GPIO7_7 */ | |
| 122 | + linux,default-trigger = "heartbeat"; | |
| 123 | + }; | |
| 124 | + }; | |
| 125 | +}; | |
| @@ -0,0 +1,169 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/dts-v1/; | |
| 14 | +/include/ "imx53.dtsi" | |
| 15 | + | |
| 16 | +/ { | |
| 17 | + model = "Freescale i.MX53 Smart Mobile Reference Design Board"; | |
| 18 | + compatible = "fsl,imx53-smd", "fsl,imx53"; | |
| 19 | + | |
| 20 | + chosen { | |
| 21 | + bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait"; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + memory { | |
| 25 | + reg = <0x70000000 0x40000000>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + soc { | |
| 29 | + aips@50000000 { /* AIPS1 */ | |
| 30 | + spba@50000000 { | |
| 31 | + esdhc@50004000 { /* ESDHC1 */ | |
| 32 | + cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ | |
| 33 | + wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */ | |
| 34 | + status = "okay"; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + esdhc@50008000 { /* ESDHC2 */ | |
| 38 | + fsl,card-wired; | |
| 39 | + status = "okay"; | |
| 40 | + }; | |
| 41 | + | |
| 42 | + uart2: uart@5000c000 { /* UART3 */ | |
| 43 | + fsl,uart-has-rtscts; | |
| 44 | + status = "okay"; | |
| 45 | + }; | |
| 46 | + | |
| 47 | + ecspi@50010000 { /* ECSPI1 */ | |
| 48 | + fsl,spi-num-chipselects = <2>; | |
| 49 | + cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ | |
| 50 | + <&gpio2 19 0>; /* GPIO3_19 */ | |
| 51 | + status = "okay"; | |
| 52 | + | |
| 53 | + zigbee: mc1323@0 { | |
| 54 | + compatible = "fsl,mc1323"; | |
| 55 | + spi-max-frequency = <8000000>; | |
| 56 | + reg = <0>; | |
| 57 | + }; | |
| 58 | + | |
| 59 | + flash: m25p32@1 { | |
| 60 | + #address-cells = <1>; | |
| 61 | + #size-cells = <1>; | |
| 62 | + compatible = "st,m25p32", "st,m25p"; | |
| 63 | + spi-max-frequency = <20000000>; | |
| 64 | + reg = <1>; | |
| 65 | + | |
| 66 | + partition@0 { | |
| 67 | + label = "U-Boot"; | |
| 68 | + reg = <0x0 0x40000>; | |
| 69 | + read-only; | |
| 70 | + }; | |
| 71 | + | |
| 72 | + partition@40000 { | |
| 73 | + label = "Kernel"; | |
| 74 | + reg = <0x40000 0x3c0000>; | |
| 75 | + }; | |
| 76 | + }; | |
| 77 | + }; | |
| 78 | + | |
| 79 | + esdhc@50020000 { /* ESDHC3 */ | |
| 80 | + fsl,card-wired; | |
| 81 | + status = "okay"; | |
| 82 | + }; | |
| 83 | + }; | |
| 84 | + | |
| 85 | + wdog@53f98000 { /* WDOG1 */ | |
| 86 | + status = "okay"; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + iomuxc@53fa8000 { | |
| 90 | + compatible = "fsl,imx53-iomuxc-smd"; | |
| 91 | + reg = <0x53fa8000 0x4000>; | |
| 92 | + }; | |
| 93 | + | |
| 94 | + uart0: uart@53fbc000 { /* UART1 */ | |
| 95 | + status = "okay"; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + uart1: uart@53fc0000 { /* UART2 */ | |
| 99 | + status = "okay"; | |
| 100 | + }; | |
| 101 | + }; | |
| 102 | + | |
| 103 | + aips@60000000 { /* AIPS2 */ | |
| 104 | + sdma@63fb0000 { | |
| 105 | + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; | |
| 106 | + }; | |
| 107 | + | |
| 108 | + i2c@63fc4000 { /* I2C2 */ | |
| 109 | + status = "okay"; | |
| 110 | + | |
| 111 | + codec: sgtl5000@0a { | |
| 112 | + compatible = "fsl,sgtl5000"; | |
| 113 | + reg = <0x0a>; | |
| 114 | + }; | |
| 115 | + | |
| 116 | + magnetometer: mag3110@0e { | |
| 117 | + compatible = "fsl,mag3110"; | |
| 118 | + reg = <0x0e>; | |
| 119 | + }; | |
| 120 | + | |
| 121 | + touchkey: mpr121@5a { | |
| 122 | + compatible = "fsl,mpr121"; | |
| 123 | + reg = <0x5a>; | |
| 124 | + }; | |
| 125 | + }; | |
| 126 | + | |
| 127 | + i2c@63fc8000 { /* I2C1 */ | |
| 128 | + status = "okay"; | |
| 129 | + | |
| 130 | + accelerometer: mma8450@1c { | |
| 131 | + compatible = "fsl,mma8450"; | |
| 132 | + reg = <0x1c>; | |
| 133 | + }; | |
| 134 | + | |
| 135 | + camera: ov5642@3c { | |
| 136 | + compatible = "ovti,ov5642"; | |
| 137 | + reg = <0x3c>; | |
| 138 | + }; | |
| 139 | + | |
| 140 | + pmic: dialog@48 { | |
| 141 | + compatible = "dialog,da9053", "dialog,da9052"; | |
| 142 | + reg = <0x48>; | |
| 143 | + }; | |
| 144 | + }; | |
| 145 | + | |
| 146 | + fec@63fec000 { | |
| 147 | + phy-mode = "rmii"; | |
| 148 | + phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ | |
| 149 | + status = "okay"; | |
| 150 | + }; | |
| 151 | + }; | |
| 152 | + }; | |
| 153 | + | |
| 154 | + gpio-keys { | |
| 155 | + compatible = "gpio-keys"; | |
| 156 | + | |
| 157 | + volume-up { | |
| 158 | + label = "Volume Up"; | |
| 159 | + gpios = <&gpio1 14 0>; /* GPIO2_14 */ | |
| 160 | + linux,code = <115>; /* KEY_VOLUMEUP */ | |
| 161 | + }; | |
| 162 | + | |
| 163 | + volume-down { | |
| 164 | + label = "Volume Down"; | |
| 165 | + gpios = <&gpio1 15 0>; /* GPIO2_15 */ | |
| 166 | + linux,code = <114>; /* KEY_VOLUMEDOWN */ | |
| 167 | + }; | |
| 168 | + }; | |
| 169 | +}; | |
| @@ -0,0 +1,301 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/include/ "skeleton.dtsi" | |
| 14 | + | |
| 15 | +/ { | |
| 16 | + aliases { | |
| 17 | + serial0 = &uart0; | |
| 18 | + serial1 = &uart1; | |
| 19 | + serial2 = &uart2; | |
| 20 | + serial3 = &uart3; | |
| 21 | + serial4 = &uart4; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + tzic: tz-interrupt-controller@0fffc000 { | |
| 25 | + compatible = "fsl,imx53-tzic", "fsl,tzic"; | |
| 26 | + interrupt-controller; | |
| 27 | + #interrupt-cells = <1>; | |
| 28 | + reg = <0x0fffc000 0x4000>; | |
| 29 | + }; | |
| 30 | + | |
| 31 | + clocks { | |
| 32 | + #address-cells = <1>; | |
| 33 | + #size-cells = <0>; | |
| 34 | + | |
| 35 | + ckil { | |
| 36 | + compatible = "fsl,imx-ckil", "fixed-clock"; | |
| 37 | + clock-frequency = <32768>; | |
| 38 | + }; | |
| 39 | + | |
| 40 | + ckih1 { | |
| 41 | + compatible = "fsl,imx-ckih1", "fixed-clock"; | |
| 42 | + clock-frequency = <22579200>; | |
| 43 | + }; | |
| 44 | + | |
| 45 | + ckih2 { | |
| 46 | + compatible = "fsl,imx-ckih2", "fixed-clock"; | |
| 47 | + clock-frequency = <0>; | |
| 48 | + }; | |
| 49 | + | |
| 50 | + osc { | |
| 51 | + compatible = "fsl,imx-osc", "fixed-clock"; | |
| 52 | + clock-frequency = <24000000>; | |
| 53 | + }; | |
| 54 | + }; | |
| 55 | + | |
| 56 | + soc { | |
| 57 | + #address-cells = <1>; | |
| 58 | + #size-cells = <1>; | |
| 59 | + compatible = "simple-bus"; | |
| 60 | + interrupt-parent = <&tzic>; | |
| 61 | + ranges; | |
| 62 | + | |
| 63 | + aips@50000000 { /* AIPS1 */ | |
| 64 | + compatible = "fsl,aips-bus", "simple-bus"; | |
| 65 | + #address-cells = <1>; | |
| 66 | + #size-cells = <1>; | |
| 67 | + reg = <0x50000000 0x10000000>; | |
| 68 | + ranges; | |
| 69 | + | |
| 70 | + spba@50000000 { | |
| 71 | + compatible = "fsl,spba-bus", "simple-bus"; | |
| 72 | + #address-cells = <1>; | |
| 73 | + #size-cells = <1>; | |
| 74 | + reg = <0x50000000 0x40000>; | |
| 75 | + ranges; | |
| 76 | + | |
| 77 | + esdhc@50004000 { /* ESDHC1 */ | |
| 78 | + compatible = "fsl,imx53-esdhc"; | |
| 79 | + reg = <0x50004000 0x4000>; | |
| 80 | + interrupts = <1>; | |
| 81 | + status = "disabled"; | |
| 82 | + }; | |
| 83 | + | |
| 84 | + esdhc@50008000 { /* ESDHC2 */ | |
| 85 | + compatible = "fsl,imx53-esdhc"; | |
| 86 | + reg = <0x50008000 0x4000>; | |
| 87 | + interrupts = <2>; | |
| 88 | + status = "disabled"; | |
| 89 | + }; | |
| 90 | + | |
| 91 | + uart2: uart@5000c000 { /* UART3 */ | |
| 92 | + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | |
| 93 | + reg = <0x5000c000 0x4000>; | |
| 94 | + interrupts = <33>; | |
| 95 | + status = "disabled"; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + ecspi@50010000 { /* ECSPI1 */ | |
| 99 | + #address-cells = <1>; | |
| 100 | + #size-cells = <0>; | |
| 101 | + compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; | |
| 102 | + reg = <0x50010000 0x4000>; | |
| 103 | + interrupts = <36>; | |
| 104 | + status = "disabled"; | |
| 105 | + }; | |
| 106 | + | |
| 107 | + esdhc@50020000 { /* ESDHC3 */ | |
| 108 | + compatible = "fsl,imx53-esdhc"; | |
| 109 | + reg = <0x50020000 0x4000>; | |
| 110 | + interrupts = <3>; | |
| 111 | + status = "disabled"; | |
| 112 | + }; | |
| 113 | + | |
| 114 | + esdhc@50024000 { /* ESDHC4 */ | |
| 115 | + compatible = "fsl,imx53-esdhc"; | |
| 116 | + reg = <0x50024000 0x4000>; | |
| 117 | + interrupts = <4>; | |
| 118 | + status = "disabled"; | |
| 119 | + }; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + gpio0: gpio@53f84000 { /* GPIO1 */ | |
| 123 | + compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | |
| 124 | + reg = <0x53f84000 0x4000>; | |
| 125 | + interrupts = <50 51>; | |
| 126 | + gpio-controller; | |
| 127 | + #gpio-cells = <2>; | |
| 128 | + interrupt-controller; | |
| 129 | + #interrupt-cells = <1>; | |
| 130 | + }; | |
| 131 | + | |
| 132 | + gpio1: gpio@53f88000 { /* GPIO2 */ | |
| 133 | + compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | |
| 134 | + reg = <0x53f88000 0x4000>; | |
| 135 | + interrupts = <52 53>; | |
| 136 | + gpio-controller; | |
| 137 | + #gpio-cells = <2>; | |
| 138 | + interrupt-controller; | |
| 139 | + #interrupt-cells = <1>; | |
| 140 | + }; | |
| 141 | + | |
| 142 | + gpio2: gpio@53f8c000 { /* GPIO3 */ | |
| 143 | + compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | |
| 144 | + reg = <0x53f8c000 0x4000>; | |
| 145 | + interrupts = <54 55>; | |
| 146 | + gpio-controller; | |
| 147 | + #gpio-cells = <2>; | |
| 148 | + interrupt-controller; | |
| 149 | + #interrupt-cells = <1>; | |
| 150 | + }; | |
| 151 | + | |
| 152 | + gpio3: gpio@53f90000 { /* GPIO4 */ | |
| 153 | + compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | |
| 154 | + reg = <0x53f90000 0x4000>; | |
| 155 | + interrupts = <56 57>; | |
| 156 | + gpio-controller; | |
| 157 | + #gpio-cells = <2>; | |
| 158 | + interrupt-controller; | |
| 159 | + #interrupt-cells = <1>; | |
| 160 | + }; | |
| 161 | + | |
| 162 | + wdog@53f98000 { /* WDOG1 */ | |
| 163 | + compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; | |
| 164 | + reg = <0x53f98000 0x4000>; | |
| 165 | + interrupts = <58>; | |
| 166 | + status = "disabled"; | |
| 167 | + }; | |
| 168 | + | |
| 169 | + wdog@53f9c000 { /* WDOG2 */ | |
| 170 | + compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; | |
| 171 | + reg = <0x53f9c000 0x4000>; | |
| 172 | + interrupts = <59>; | |
| 173 | + status = "disabled"; | |
| 174 | + }; | |
| 175 | + | |
| 176 | + uart0: uart@53fbc000 { /* UART1 */ | |
| 177 | + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | |
| 178 | + reg = <0x53fbc000 0x4000>; | |
| 179 | + interrupts = <31>; | |
| 180 | + status = "disabled"; | |
| 181 | + }; | |
| 182 | + | |
| 183 | + uart1: uart@53fc0000 { /* UART2 */ | |
| 184 | + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | |
| 185 | + reg = <0x53fc0000 0x4000>; | |
| 186 | + interrupts = <32>; | |
| 187 | + status = "disabled"; | |
| 188 | + }; | |
| 189 | + | |
| 190 | + gpio4: gpio@53fdc000 { /* GPIO5 */ | |
| 191 | + compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | |
| 192 | + reg = <0x53fdc000 0x4000>; | |
| 193 | + interrupts = <103 104>; | |
| 194 | + gpio-controller; | |
| 195 | + #gpio-cells = <2>; | |
| 196 | + interrupt-controller; | |
| 197 | + #interrupt-cells = <1>; | |
| 198 | + }; | |
| 199 | + | |
| 200 | + gpio5: gpio@53fe0000 { /* GPIO6 */ | |
| 201 | + compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | |
| 202 | + reg = <0x53fe0000 0x4000>; | |
| 203 | + interrupts = <105 106>; | |
| 204 | + gpio-controller; | |
| 205 | + #gpio-cells = <2>; | |
| 206 | + interrupt-controller; | |
| 207 | + #interrupt-cells = <1>; | |
| 208 | + }; | |
| 209 | + | |
| 210 | + gpio6: gpio@53fe4000 { /* GPIO7 */ | |
| 211 | + compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; | |
| 212 | + reg = <0x53fe4000 0x4000>; | |
| 213 | + interrupts = <107 108>; | |
| 214 | + gpio-controller; | |
| 215 | + #gpio-cells = <2>; | |
| 216 | + interrupt-controller; | |
| 217 | + #interrupt-cells = <1>; | |
| 218 | + }; | |
| 219 | + | |
| 220 | + i2c@53fec000 { /* I2C3 */ | |
| 221 | + #address-cells = <1>; | |
| 222 | + #size-cells = <0>; | |
| 223 | + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | |
| 224 | + reg = <0x53fec000 0x4000>; | |
| 225 | + interrupts = <64>; | |
| 226 | + status = "disabled"; | |
| 227 | + }; | |
| 228 | + | |
| 229 | + uart3: uart@53ff0000 { /* UART4 */ | |
| 230 | + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | |
| 231 | + reg = <0x53ff0000 0x4000>; | |
| 232 | + interrupts = <13>; | |
| 233 | + status = "disabled"; | |
| 234 | + }; | |
| 235 | + }; | |
| 236 | + | |
| 237 | + aips@60000000 { /* AIPS2 */ | |
| 238 | + compatible = "fsl,aips-bus", "simple-bus"; | |
| 239 | + #address-cells = <1>; | |
| 240 | + #size-cells = <1>; | |
| 241 | + reg = <0x60000000 0x10000000>; | |
| 242 | + ranges; | |
| 243 | + | |
| 244 | + uart4: uart@63f90000 { /* UART5 */ | |
| 245 | + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; | |
| 246 | + reg = <0x63f90000 0x4000>; | |
| 247 | + interrupts = <86>; | |
| 248 | + status = "disabled"; | |
| 249 | + }; | |
| 250 | + | |
| 251 | + ecspi@63fac000 { /* ECSPI2 */ | |
| 252 | + #address-cells = <1>; | |
| 253 | + #size-cells = <0>; | |
| 254 | + compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; | |
| 255 | + reg = <0x63fac000 0x4000>; | |
| 256 | + interrupts = <37>; | |
| 257 | + status = "disabled"; | |
| 258 | + }; | |
| 259 | + | |
| 260 | + sdma@63fb0000 { | |
| 261 | + compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; | |
| 262 | + reg = <0x63fb0000 0x4000>; | |
| 263 | + interrupts = <6>; | |
| 264 | + }; | |
| 265 | + | |
| 266 | + cspi@63fc0000 { | |
| 267 | + #address-cells = <1>; | |
| 268 | + #size-cells = <0>; | |
| 269 | + compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; | |
| 270 | + reg = <0x63fc0000 0x4000>; | |
| 271 | + interrupts = <38>; | |
| 272 | + status = "disabled"; | |
| 273 | + }; | |
| 274 | + | |
| 275 | + i2c@63fc4000 { /* I2C2 */ | |
| 276 | + #address-cells = <1>; | |
| 277 | + #size-cells = <0>; | |
| 278 | + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | |
| 279 | + reg = <0x63fc4000 0x4000>; | |
| 280 | + interrupts = <63>; | |
| 281 | + status = "disabled"; | |
| 282 | + }; | |
| 283 | + | |
| 284 | + i2c@63fc8000 { /* I2C1 */ | |
| 285 | + #address-cells = <1>; | |
| 286 | + #size-cells = <0>; | |
| 287 | + compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; | |
| 288 | + reg = <0x63fc8000 0x4000>; | |
| 289 | + interrupts = <62>; | |
| 290 | + status = "disabled"; | |
| 291 | + }; | |
| 292 | + | |
| 293 | + fec@63fec000 { | |
| 294 | + compatible = "fsl,imx53-fec", "fsl,imx25-fec"; | |
| 295 | + reg = <0x63fec000 0x4000>; | |
| 296 | + interrupts = <87>; | |
| 297 | + status = "disabled"; | |
| 298 | + }; | |
| 299 | + }; | |
| 300 | + }; | |
| 301 | +}; | |
| @@ -0,0 +1,62 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/dts-v1/; | |
| 14 | +/include/ "imx6q.dtsi" | |
| 15 | + | |
| 16 | +/ { | |
| 17 | + model = "Freescale i.MX6 Quad SABRE Automotive Board"; | |
| 18 | + compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; | |
| 19 | + | |
| 20 | + chosen { | |
| 21 | + bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait"; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + memory { | |
| 25 | + reg = <0x10000000 0x80000000>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + soc { | |
| 29 | + aips-bus@02100000 { /* AIPS2 */ | |
| 30 | + enet@02188000 { | |
| 31 | + phy-mode = "rgmii"; | |
| 32 | + local-mac-address = [00 04 9F 01 1B 61]; | |
| 33 | + status = "okay"; | |
| 34 | + }; | |
| 35 | + | |
| 36 | + usdhc@02198000 { /* uSDHC3 */ | |
| 37 | + cd-gpios = <&gpio5 11 0>; /* GPIO6_11 */ | |
| 38 | + wp-gpios = <&gpio5 14 0>; /* GPIO6_14 */ | |
| 39 | + status = "okay"; | |
| 40 | + }; | |
| 41 | + | |
| 42 | + usdhc@0219c000 { /* uSDHC4 */ | |
| 43 | + fsl,card-wired; | |
| 44 | + status = "okay"; | |
| 45 | + }; | |
| 46 | + | |
| 47 | + uart3: uart@021f0000 { /* UART4 */ | |
| 48 | + status = "okay"; | |
| 49 | + }; | |
| 50 | + }; | |
| 51 | + }; | |
| 52 | + | |
| 53 | + leds { | |
| 54 | + compatible = "gpio-leds"; | |
| 55 | + | |
| 56 | + debug-led { | |
| 57 | + label = "Heartbeat"; | |
| 58 | + gpios = <&gpio2 25 0>; /* GPIO3_25 */ | |
| 59 | + linux,default-trigger = "heartbeat"; | |
| 60 | + }; | |
| 61 | + }; | |
| 62 | +}; | |
| @@ -0,0 +1,575 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/include/ "skeleton.dtsi" | |
| 14 | + | |
| 15 | +/ { | |
| 16 | + aliases { | |
| 17 | + serial0 = &uart0; | |
| 18 | + serial1 = &uart1; | |
| 19 | + serial2 = &uart2; | |
| 20 | + serial3 = &uart3; | |
| 21 | + serial4 = &uart4; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + cpus { | |
| 25 | + #address-cells = <1>; | |
| 26 | + #size-cells = <0>; | |
| 27 | + | |
| 28 | + cpu@0 { | |
| 29 | + compatible = "arm,cortex-a9"; | |
| 30 | + reg = <0>; | |
| 31 | + next-level-cache = <&L2>; | |
| 32 | + }; | |
| 33 | + | |
| 34 | + cpu@1 { | |
| 35 | + compatible = "arm,cortex-a9"; | |
| 36 | + reg = <1>; | |
| 37 | + next-level-cache = <&L2>; | |
| 38 | + }; | |
| 39 | + | |
| 40 | + cpu@2 { | |
| 41 | + compatible = "arm,cortex-a9"; | |
| 42 | + reg = <2>; | |
| 43 | + next-level-cache = <&L2>; | |
| 44 | + }; | |
| 45 | + | |
| 46 | + cpu@3 { | |
| 47 | + compatible = "arm,cortex-a9"; | |
| 48 | + reg = <3>; | |
| 49 | + next-level-cache = <&L2>; | |
| 50 | + }; | |
| 51 | + }; | |
| 52 | + | |
| 53 | + intc: interrupt-controller@00a01000 { | |
| 54 | + compatible = "arm,cortex-a9-gic"; | |
| 55 | + #interrupt-cells = <3>; | |
| 56 | + #address-cells = <1>; | |
| 57 | + #size-cells = <1>; | |
| 58 | + interrupt-controller; | |
| 59 | + reg = <0x00a01000 0x1000>, | |
| 60 | + <0x00a00100 0x100>; | |
| 61 | + }; | |
| 62 | + | |
| 63 | + clocks { | |
| 64 | + #address-cells = <1>; | |
| 65 | + #size-cells = <0>; | |
| 66 | + | |
| 67 | + ckil { | |
| 68 | + compatible = "fsl,imx-ckil", "fixed-clock"; | |
| 69 | + clock-frequency = <32768>; | |
| 70 | + }; | |
| 71 | + | |
| 72 | + ckih1 { | |
| 73 | + compatible = "fsl,imx-ckih1", "fixed-clock"; | |
| 74 | + clock-frequency = <0>; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + osc { | |
| 78 | + compatible = "fsl,imx-osc", "fixed-clock"; | |
| 79 | + clock-frequency = <24000000>; | |
| 80 | + }; | |
| 81 | + }; | |
| 82 | + | |
| 83 | + soc { | |
| 84 | + #address-cells = <1>; | |
| 85 | + #size-cells = <1>; | |
| 86 | + compatible = "simple-bus"; | |
| 87 | + interrupt-parent = <&intc>; | |
| 88 | + ranges; | |
| 89 | + | |
| 90 | + timer@00a00600 { | |
| 91 | + compatible = "arm,smp-twd"; | |
| 92 | + reg = <0x00a00600 0x100>; | |
| 93 | + interrupts = <1 13 0xf4>; | |
| 94 | + }; | |
| 95 | + | |
| 96 | + L2: l2-cache@00a02000 { | |
| 97 | + compatible = "arm,pl310-cache"; | |
| 98 | + reg = <0x00a02000 0x1000>; | |
| 99 | + interrupts = <0 92 0x04>; | |
| 100 | + cache-unified; | |
| 101 | + cache-level = <2>; | |
| 102 | + }; | |
| 103 | + | |
| 104 | + aips-bus@02000000 { /* AIPS1 */ | |
| 105 | + compatible = "fsl,aips-bus", "simple-bus"; | |
| 106 | + #address-cells = <1>; | |
| 107 | + #size-cells = <1>; | |
| 108 | + reg = <0x02000000 0x100000>; | |
| 109 | + ranges; | |
| 110 | + | |
| 111 | + spba-bus@02000000 { | |
| 112 | + compatible = "fsl,spba-bus", "simple-bus"; | |
| 113 | + #address-cells = <1>; | |
| 114 | + #size-cells = <1>; | |
| 115 | + reg = <0x02000000 0x40000>; | |
| 116 | + ranges; | |
| 117 | + | |
| 118 | + spdif@02004000 { | |
| 119 | + reg = <0x02004000 0x4000>; | |
| 120 | + interrupts = <0 52 0x04>; | |
| 121 | + }; | |
| 122 | + | |
| 123 | + ecspi@02008000 { /* eCSPI1 */ | |
| 124 | + #address-cells = <1>; | |
| 125 | + #size-cells = <0>; | |
| 126 | + compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | |
| 127 | + reg = <0x02008000 0x4000>; | |
| 128 | + interrupts = <0 31 0x04>; | |
| 129 | + status = "disabled"; | |
| 130 | + }; | |
| 131 | + | |
| 132 | + ecspi@0200c000 { /* eCSPI2 */ | |
| 133 | + #address-cells = <1>; | |
| 134 | + #size-cells = <0>; | |
| 135 | + compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | |
| 136 | + reg = <0x0200c000 0x4000>; | |
| 137 | + interrupts = <0 32 0x04>; | |
| 138 | + status = "disabled"; | |
| 139 | + }; | |
| 140 | + | |
| 141 | + ecspi@02010000 { /* eCSPI3 */ | |
| 142 | + #address-cells = <1>; | |
| 143 | + #size-cells = <0>; | |
| 144 | + compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | |
| 145 | + reg = <0x02010000 0x4000>; | |
| 146 | + interrupts = <0 33 0x04>; | |
| 147 | + status = "disabled"; | |
| 148 | + }; | |
| 149 | + | |
| 150 | + ecspi@02014000 { /* eCSPI4 */ | |
| 151 | + #address-cells = <1>; | |
| 152 | + #size-cells = <0>; | |
| 153 | + compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | |
| 154 | + reg = <0x02014000 0x4000>; | |
| 155 | + interrupts = <0 34 0x04>; | |
| 156 | + status = "disabled"; | |
| 157 | + }; | |
| 158 | + | |
| 159 | + ecspi@02018000 { /* eCSPI5 */ | |
| 160 | + #address-cells = <1>; | |
| 161 | + #size-cells = <0>; | |
| 162 | + compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; | |
| 163 | + reg = <0x02018000 0x4000>; | |
| 164 | + interrupts = <0 35 0x04>; | |
| 165 | + status = "disabled"; | |
| 166 | + }; | |
| 167 | + | |
| 168 | + uart0: uart@02020000 { /* UART1 */ | |
| 169 | + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | |
| 170 | + reg = <0x02020000 0x4000>; | |
| 171 | + interrupts = <0 26 0x04>; | |
| 172 | + status = "disabled"; | |
| 173 | + }; | |
| 174 | + | |
| 175 | + esai@02024000 { | |
| 176 | + reg = <0x02024000 0x4000>; | |
| 177 | + interrupts = <0 51 0x04>; | |
| 178 | + }; | |
| 179 | + | |
| 180 | + ssi@02028000 { /* SSI1 */ | |
| 181 | + reg = <0x02028000 0x4000>; | |
| 182 | + interrupts = <0 46 0x04>; | |
| 183 | + }; | |
| 184 | + | |
| 185 | + ssi@0202c000 { /* SSI2 */ | |
| 186 | + reg = <0x0202c000 0x4000>; | |
| 187 | + interrupts = <0 47 0x04>; | |
| 188 | + }; | |
| 189 | + | |
| 190 | + ssi@02030000 { /* SSI3 */ | |
| 191 | + reg = <0x02030000 0x4000>; | |
| 192 | + interrupts = <0 48 0x04>; | |
| 193 | + }; | |
| 194 | + | |
| 195 | + asrc@02034000 { | |
| 196 | + reg = <0x02034000 0x4000>; | |
| 197 | + interrupts = <0 50 0x04>; | |
| 198 | + }; | |
| 199 | + | |
| 200 | + spba@0203c000 { | |
| 201 | + reg = <0x0203c000 0x4000>; | |
| 202 | + }; | |
| 203 | + }; | |
| 204 | + | |
| 205 | + vpu@02040000 { | |
| 206 | + reg = <0x02040000 0x3c000>; | |
| 207 | + interrupts = <0 3 0x04 0 12 0x04>; | |
| 208 | + }; | |
| 209 | + | |
| 210 | + aipstz@0207c000 { /* AIPSTZ1 */ | |
| 211 | + reg = <0x0207c000 0x4000>; | |
| 212 | + }; | |
| 213 | + | |
| 214 | + pwm@02080000 { /* PWM1 */ | |
| 215 | + reg = <0x02080000 0x4000>; | |
| 216 | + interrupts = <0 83 0x04>; | |
| 217 | + }; | |
| 218 | + | |
| 219 | + pwm@02084000 { /* PWM2 */ | |
| 220 | + reg = <0x02084000 0x4000>; | |
| 221 | + interrupts = <0 84 0x04>; | |
| 222 | + }; | |
| 223 | + | |
| 224 | + pwm@02088000 { /* PWM3 */ | |
| 225 | + reg = <0x02088000 0x4000>; | |
| 226 | + interrupts = <0 85 0x04>; | |
| 227 | + }; | |
| 228 | + | |
| 229 | + pwm@0208c000 { /* PWM4 */ | |
| 230 | + reg = <0x0208c000 0x4000>; | |
| 231 | + interrupts = <0 86 0x04>; | |
| 232 | + }; | |
| 233 | + | |
| 234 | + flexcan@02090000 { /* CAN1 */ | |
| 235 | + reg = <0x02090000 0x4000>; | |
| 236 | + interrupts = <0 110 0x04>; | |
| 237 | + }; | |
| 238 | + | |
| 239 | + flexcan@02094000 { /* CAN2 */ | |
| 240 | + reg = <0x02094000 0x4000>; | |
| 241 | + interrupts = <0 111 0x04>; | |
| 242 | + }; | |
| 243 | + | |
| 244 | + gpt@02098000 { | |
| 245 | + compatible = "fsl,imx6q-gpt"; | |
| 246 | + reg = <0x02098000 0x4000>; | |
| 247 | + interrupts = <0 55 0x04>; | |
| 248 | + }; | |
| 249 | + | |
| 250 | + gpio0: gpio@0209c000 { /* GPIO1 */ | |
| 251 | + compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | |
| 252 | + reg = <0x0209c000 0x4000>; | |
| 253 | + interrupts = <0 66 0x04 0 67 0x04>; | |
| 254 | + gpio-controller; | |
| 255 | + #gpio-cells = <2>; | |
| 256 | + interrupt-controller; | |
| 257 | + #interrupt-cells = <1>; | |
| 258 | + }; | |
| 259 | + | |
| 260 | + gpio1: gpio@020a0000 { /* GPIO2 */ | |
| 261 | + compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | |
| 262 | + reg = <0x020a0000 0x4000>; | |
| 263 | + interrupts = <0 68 0x04 0 69 0x04>; | |
| 264 | + gpio-controller; | |
| 265 | + #gpio-cells = <2>; | |
| 266 | + interrupt-controller; | |
| 267 | + #interrupt-cells = <1>; | |
| 268 | + }; | |
| 269 | + | |
| 270 | + gpio2: gpio@020a4000 { /* GPIO3 */ | |
| 271 | + compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | |
| 272 | + reg = <0x020a4000 0x4000>; | |
| 273 | + interrupts = <0 70 0x04 0 71 0x04>; | |
| 274 | + gpio-controller; | |
| 275 | + #gpio-cells = <2>; | |
| 276 | + interrupt-controller; | |
| 277 | + #interrupt-cells = <1>; | |
| 278 | + }; | |
| 279 | + | |
| 280 | + gpio3: gpio@020a8000 { /* GPIO4 */ | |
| 281 | + compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | |
| 282 | + reg = <0x020a8000 0x4000>; | |
| 283 | + interrupts = <0 72 0x04 0 73 0x04>; | |
| 284 | + gpio-controller; | |
| 285 | + #gpio-cells = <2>; | |
| 286 | + interrupt-controller; | |
| 287 | + #interrupt-cells = <1>; | |
| 288 | + }; | |
| 289 | + | |
| 290 | + gpio4: gpio@020ac000 { /* GPIO5 */ | |
| 291 | + compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | |
| 292 | + reg = <0x020ac000 0x4000>; | |
| 293 | + interrupts = <0 74 0x04 0 75 0x04>; | |
| 294 | + gpio-controller; | |
| 295 | + #gpio-cells = <2>; | |
| 296 | + interrupt-controller; | |
| 297 | + #interrupt-cells = <1>; | |
| 298 | + }; | |
| 299 | + | |
| 300 | + gpio5: gpio@020b0000 { /* GPIO6 */ | |
| 301 | + compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | |
| 302 | + reg = <0x020b0000 0x4000>; | |
| 303 | + interrupts = <0 76 0x04 0 77 0x04>; | |
| 304 | + gpio-controller; | |
| 305 | + #gpio-cells = <2>; | |
| 306 | + interrupt-controller; | |
| 307 | + #interrupt-cells = <1>; | |
| 308 | + }; | |
| 309 | + | |
| 310 | + gpio6: gpio@020b4000 { /* GPIO7 */ | |
| 311 | + compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; | |
| 312 | + reg = <0x020b4000 0x4000>; | |
| 313 | + interrupts = <0 78 0x04 0 79 0x04>; | |
| 314 | + gpio-controller; | |
| 315 | + #gpio-cells = <2>; | |
| 316 | + interrupt-controller; | |
| 317 | + #interrupt-cells = <1>; | |
| 318 | + }; | |
| 319 | + | |
| 320 | + kpp@020b8000 { | |
| 321 | + reg = <0x020b8000 0x4000>; | |
| 322 | + interrupts = <0 82 0x04>; | |
| 323 | + }; | |
| 324 | + | |
| 325 | + wdog@020bc000 { /* WDOG1 */ | |
| 326 | + compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; | |
| 327 | + reg = <0x020bc000 0x4000>; | |
| 328 | + interrupts = <0 80 0x04>; | |
| 329 | + status = "disabled"; | |
| 330 | + }; | |
| 331 | + | |
| 332 | + wdog@020c0000 { /* WDOG2 */ | |
| 333 | + compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; | |
| 334 | + reg = <0x020c0000 0x4000>; | |
| 335 | + interrupts = <0 81 0x04>; | |
| 336 | + status = "disabled"; | |
| 337 | + }; | |
| 338 | + | |
| 339 | + ccm@020c4000 { | |
| 340 | + compatible = "fsl,imx6q-ccm"; | |
| 341 | + reg = <0x020c4000 0x4000>; | |
| 342 | + interrupts = <0 87 0x04 0 88 0x04>; | |
| 343 | + }; | |
| 344 | + | |
| 345 | + anatop@020c8000 { | |
| 346 | + compatible = "fsl,imx6q-anatop"; | |
| 347 | + reg = <0x020c8000 0x1000>; | |
| 348 | + interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; | |
| 349 | + }; | |
| 350 | + | |
| 351 | + usbphy@020c9000 { /* USBPHY1 */ | |
| 352 | + reg = <0x020c9000 0x1000>; | |
| 353 | + interrupts = <0 44 0x04>; | |
| 354 | + }; | |
| 355 | + | |
| 356 | + usbphy@020ca000 { /* USBPHY2 */ | |
| 357 | + reg = <0x020ca000 0x1000>; | |
| 358 | + interrupts = <0 45 0x04>; | |
| 359 | + }; | |
| 360 | + | |
| 361 | + snvs@020cc000 { | |
| 362 | + reg = <0x020cc000 0x4000>; | |
| 363 | + interrupts = <0 19 0x04 0 20 0x04>; | |
| 364 | + }; | |
| 365 | + | |
| 366 | + epit@020d0000 { /* EPIT1 */ | |
| 367 | + reg = <0x020d0000 0x4000>; | |
| 368 | + interrupts = <0 56 0x04>; | |
| 369 | + }; | |
| 370 | + | |
| 371 | + epit@020d4000 { /* EPIT2 */ | |
| 372 | + reg = <0x020d4000 0x4000>; | |
| 373 | + interrupts = <0 57 0x04>; | |
| 374 | + }; | |
| 375 | + | |
| 376 | + src@020d8000 { | |
| 377 | + compatible = "fsl,imx6q-src"; | |
| 378 | + reg = <0x020d8000 0x4000>; | |
| 379 | + interrupts = <0 91 0x04 0 96 0x04>; | |
| 380 | + }; | |
| 381 | + | |
| 382 | + gpc@020dc000 { | |
| 383 | + compatible = "fsl,imx6q-gpc"; | |
| 384 | + reg = <0x020dc000 0x4000>; | |
| 385 | + interrupts = <0 89 0x04 0 90 0x04>; | |
| 386 | + }; | |
| 387 | + | |
| 388 | + iomuxc@020e0000 { | |
| 389 | + reg = <0x020e0000 0x4000>; | |
| 390 | + }; | |
| 391 | + | |
| 392 | + dcic@020e4000 { /* DCIC1 */ | |
| 393 | + reg = <0x020e4000 0x4000>; | |
| 394 | + interrupts = <0 124 0x04>; | |
| 395 | + }; | |
| 396 | + | |
| 397 | + dcic@020e8000 { /* DCIC2 */ | |
| 398 | + reg = <0x020e8000 0x4000>; | |
| 399 | + interrupts = <0 125 0x04>; | |
| 400 | + }; | |
| 401 | + | |
| 402 | + sdma@020ec000 { | |
| 403 | + compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; | |
| 404 | + reg = <0x020ec000 0x4000>; | |
| 405 | + interrupts = <0 2 0x04>; | |
| 406 | + }; | |
| 407 | + }; | |
| 408 | + | |
| 409 | + aips-bus@02100000 { /* AIPS2 */ | |
| 410 | + compatible = "fsl,aips-bus", "simple-bus"; | |
| 411 | + #address-cells = <1>; | |
| 412 | + #size-cells = <1>; | |
| 413 | + reg = <0x02100000 0x100000>; | |
| 414 | + ranges; | |
| 415 | + | |
| 416 | + caam@02100000 { | |
| 417 | + reg = <0x02100000 0x40000>; | |
| 418 | + interrupts = <0 105 0x04 0 106 0x04>; | |
| 419 | + }; | |
| 420 | + | |
| 421 | + aipstz@0217c000 { /* AIPSTZ2 */ | |
| 422 | + reg = <0x0217c000 0x4000>; | |
| 423 | + }; | |
| 424 | + | |
| 425 | + enet@02188000 { | |
| 426 | + compatible = "fsl,imx6q-fec"; | |
| 427 | + reg = <0x02188000 0x4000>; | |
| 428 | + interrupts = <0 118 0x04 0 119 0x04>; | |
| 429 | + status = "disabled"; | |
| 430 | + }; | |
| 431 | + | |
| 432 | + mlb@0218c000 { | |
| 433 | + reg = <0x0218c000 0x4000>; | |
| 434 | + interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>; | |
| 435 | + }; | |
| 436 | + | |
| 437 | + usdhc@02190000 { /* uSDHC1 */ | |
| 438 | + compatible = "fsl,imx6q-usdhc"; | |
| 439 | + reg = <0x02190000 0x4000>; | |
| 440 | + interrupts = <0 22 0x04>; | |
| 441 | + status = "disabled"; | |
| 442 | + }; | |
| 443 | + | |
| 444 | + usdhc@02194000 { /* uSDHC2 */ | |
| 445 | + compatible = "fsl,imx6q-usdhc"; | |
| 446 | + reg = <0x02194000 0x4000>; | |
| 447 | + interrupts = <0 23 0x04>; | |
| 448 | + status = "disabled"; | |
| 449 | + }; | |
| 450 | + | |
| 451 | + usdhc@02198000 { /* uSDHC3 */ | |
| 452 | + compatible = "fsl,imx6q-usdhc"; | |
| 453 | + reg = <0x02198000 0x4000>; | |
| 454 | + interrupts = <0 24 0x04>; | |
| 455 | + status = "disabled"; | |
| 456 | + }; | |
| 457 | + | |
| 458 | + usdhc@0219c000 { /* uSDHC4 */ | |
| 459 | + compatible = "fsl,imx6q-usdhc"; | |
| 460 | + reg = <0x0219c000 0x4000>; | |
| 461 | + interrupts = <0 25 0x04>; | |
| 462 | + status = "disabled"; | |
| 463 | + }; | |
| 464 | + | |
| 465 | + i2c@021a0000 { /* I2C1 */ | |
| 466 | + #address-cells = <1>; | |
| 467 | + #size-cells = <0>; | |
| 468 | + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | |
| 469 | + reg = <0x021a0000 0x4000>; | |
| 470 | + interrupts = <0 36 0x04>; | |
| 471 | + status = "disabled"; | |
| 472 | + }; | |
| 473 | + | |
| 474 | + i2c@021a4000 { /* I2C2 */ | |
| 475 | + #address-cells = <1>; | |
| 476 | + #size-cells = <0>; | |
| 477 | + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | |
| 478 | + reg = <0x021a4000 0x4000>; | |
| 479 | + interrupts = <0 37 0x04>; | |
| 480 | + status = "disabled"; | |
| 481 | + }; | |
| 482 | + | |
| 483 | + i2c@021a8000 { /* I2C3 */ | |
| 484 | + #address-cells = <1>; | |
| 485 | + #size-cells = <0>; | |
| 486 | + compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; | |
| 487 | + reg = <0x021a8000 0x4000>; | |
| 488 | + interrupts = <0 38 0x04>; | |
| 489 | + status = "disabled"; | |
| 490 | + }; | |
| 491 | + | |
| 492 | + romcp@021ac000 { | |
| 493 | + reg = <0x021ac000 0x4000>; | |
| 494 | + }; | |
| 495 | + | |
| 496 | + mmdc@021b0000 { /* MMDC0 */ | |
| 497 | + compatible = "fsl,imx6q-mmdc"; | |
| 498 | + reg = <0x021b0000 0x4000>; | |
| 499 | + }; | |
| 500 | + | |
| 501 | + mmdc@021b4000 { /* MMDC1 */ | |
| 502 | + reg = <0x021b4000 0x4000>; | |
| 503 | + }; | |
| 504 | + | |
| 505 | + weim@021b8000 { | |
| 506 | + reg = <0x021b8000 0x4000>; | |
| 507 | + interrupts = <0 14 0x04>; | |
| 508 | + }; | |
| 509 | + | |
| 510 | + ocotp@021bc000 { | |
| 511 | + reg = <0x021bc000 0x4000>; | |
| 512 | + }; | |
| 513 | + | |
| 514 | + ocotp@021c0000 { | |
| 515 | + reg = <0x021c0000 0x4000>; | |
| 516 | + interrupts = <0 21 0x04>; | |
| 517 | + }; | |
| 518 | + | |
| 519 | + tzasc@021d0000 { /* TZASC1 */ | |
| 520 | + reg = <0x021d0000 0x4000>; | |
| 521 | + interrupts = <0 108 0x04>; | |
| 522 | + }; | |
| 523 | + | |
| 524 | + tzasc@021d4000 { /* TZASC2 */ | |
| 525 | + reg = <0x021d4000 0x4000>; | |
| 526 | + interrupts = <0 109 0x04>; | |
| 527 | + }; | |
| 528 | + | |
| 529 | + audmux@021d8000 { | |
| 530 | + reg = <0x021d8000 0x4000>; | |
| 531 | + }; | |
| 532 | + | |
| 533 | + mipi@021dc000 { /* MIPI-CSI */ | |
| 534 | + reg = <0x021dc000 0x4000>; | |
| 535 | + }; | |
| 536 | + | |
| 537 | + mipi@021e0000 { /* MIPI-DSI */ | |
| 538 | + reg = <0x021e0000 0x4000>; | |
| 539 | + }; | |
| 540 | + | |
| 541 | + vdoa@021e4000 { | |
| 542 | + reg = <0x021e4000 0x4000>; | |
| 543 | + interrupts = <0 18 0x04>; | |
| 544 | + }; | |
| 545 | + | |
| 546 | + uart1: uart@021e8000 { /* UART2 */ | |
| 547 | + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | |
| 548 | + reg = <0x021e8000 0x4000>; | |
| 549 | + interrupts = <0 27 0x04>; | |
| 550 | + status = "disabled"; | |
| 551 | + }; | |
| 552 | + | |
| 553 | + uart2: uart@021ec000 { /* UART3 */ | |
| 554 | + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | |
| 555 | + reg = <0x021ec000 0x4000>; | |
| 556 | + interrupts = <0 28 0x04>; | |
| 557 | + status = "disabled"; | |
| 558 | + }; | |
| 559 | + | |
| 560 | + uart3: uart@021f0000 { /* UART4 */ | |
| 561 | + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | |
| 562 | + reg = <0x021f0000 0x4000>; | |
| 563 | + interrupts = <0 29 0x04>; | |
| 564 | + status = "disabled"; | |
| 565 | + }; | |
| 566 | + | |
| 567 | + uart4: uart@021f4000 { /* UART5 */ | |
| 568 | + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | |
| 569 | + reg = <0x021f4000 0x4000>; | |
| 570 | + interrupts = <0 30 0x04>; | |
| 571 | + status = "disabled"; | |
| 572 | + }; | |
| 573 | + }; | |
| 574 | + }; | |
| 575 | +}; | |
| @@ -0,0 +1,24 @@ | ||
| 1 | +/dts-v1/; | |
| 2 | + | |
| 3 | +/include/ "skeleton.dtsi" | |
| 4 | + | |
| 5 | +/ { | |
| 6 | + model = "Qualcomm MSM8660 SURF"; | |
| 7 | + compatible = "qcom,msm8660-surf", "qcom,msm8660"; | |
| 8 | + interrupt-parent = <&intc>; | |
| 9 | + | |
| 10 | + intc: interrupt-controller@02080000 { | |
| 11 | + compatible = "qcom,msm-8660-qgic"; | |
| 12 | + interrupt-controller; | |
| 13 | + #interrupt-cells = <1>; | |
| 14 | + reg = < 0x02080000 0x1000 >, | |
| 15 | + < 0x02081000 0x1000 >; | |
| 16 | + }; | |
| 17 | + | |
| 18 | + serial@19c400000 { | |
| 19 | + compatible = "qcom,msm-hsuart", "qcom,msm-uart"; | |
| 20 | + reg = <0x19c40000 0x1000>, | |
| 21 | + <0x19c00000 0x1000>; | |
| 22 | + interrupts = <195>; | |
| 23 | + }; | |
| 24 | +}; | |
| @@ -0,0 +1,29 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | +/dts-v1/; | |
| 9 | + | |
| 10 | +/include/ "omap3.dtsi" | |
| 11 | + | |
| 12 | +/ { | |
| 13 | + model = "TI OMAP3 BeagleBoard"; | |
| 14 | + compatible = "ti,omap3-beagle", "ti,omap3"; | |
| 15 | + | |
| 16 | + /* | |
| 17 | + * Since the initial device tree board file does not create any | |
| 18 | + * devices (MMC, network...), the only way to boot is to provide a | |
| 19 | + * ramdisk. | |
| 20 | + */ | |
| 21 | + chosen { | |
| 22 | + bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug earlyprintk"; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + memory { | |
| 26 | + device_type = "memory"; | |
| 27 | + reg = <0x80000000 0x20000000>; /* 512 MB */ | |
| 28 | + }; | |
| 29 | +}; | |
| @@ -0,0 +1,63 @@ | ||
| 1 | +/* | |
| 2 | + * Device Tree Source for OMAP3 SoC | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
| 5 | + * | |
| 6 | + * This file is licensed under the terms of the GNU General Public License | |
| 7 | + * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | + * kind, whether express or implied. | |
| 9 | + */ | |
| 10 | + | |
| 11 | +/include/ "skeleton.dtsi" | |
| 12 | + | |
| 13 | +/ { | |
| 14 | + compatible = "ti,omap3430", "ti,omap3"; | |
| 15 | + | |
| 16 | + cpus { | |
| 17 | + cpu@0 { | |
| 18 | + compatible = "arm,cortex-a8"; | |
| 19 | + }; | |
| 20 | + }; | |
| 21 | + | |
| 22 | + /* | |
| 23 | + * The soc node represents the soc top level view. It is uses for IPs | |
| 24 | + * that are not memory mapped in the MPU view or for the MPU itself. | |
| 25 | + */ | |
| 26 | + soc { | |
| 27 | + compatible = "ti,omap-infra"; | |
| 28 | + mpu { | |
| 29 | + compatible = "ti,omap3-mpu"; | |
| 30 | + ti,hwmods = "mpu"; | |
| 31 | + }; | |
| 32 | + | |
| 33 | + iva { | |
| 34 | + compatible = "ti,iva2.2"; | |
| 35 | + ti,hwmods = "iva"; | |
| 36 | + | |
| 37 | + dsp { | |
| 38 | + compatible = "ti,omap3-c64"; | |
| 39 | + }; | |
| 40 | + }; | |
| 41 | + }; | |
| 42 | + | |
| 43 | + /* | |
| 44 | + * XXX: Use a flat representation of the OMAP3 interconnect. | |
| 45 | + * The real OMAP interconnect network is quite complex. | |
| 46 | + * Since that will not bring real advantage to represent that in DT for | |
| 47 | + * the moment, just use a fake OCP bus entry to represent the whole bus | |
| 48 | + * hierarchy. | |
| 49 | + */ | |
| 50 | + ocp { | |
| 51 | + compatible = "simple-bus"; | |
| 52 | + #address-cells = <1>; | |
| 53 | + #size-cells = <1>; | |
| 54 | + ranges; | |
| 55 | + ti,hwmods = "l3_main"; | |
| 56 | + | |
| 57 | + intc: interrupt-controller@1 { | |
| 58 | + compatible = "ti,omap3-intc"; | |
| 59 | + interrupt-controller; | |
| 60 | + #interrupt-cells = <1>; | |
| 61 | + }; | |
| 62 | + }; | |
| 63 | +}; | |
| @@ -0,0 +1,29 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | +/dts-v1/; | |
| 9 | + | |
| 10 | +/include/ "omap4.dtsi" | |
| 11 | + | |
| 12 | +/ { | |
| 13 | + model = "TI OMAP4 PandaBoard"; | |
| 14 | + compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4"; | |
| 15 | + | |
| 16 | + /* | |
| 17 | + * Since the initial device tree board file does not create any | |
| 18 | + * devices (MMC, network...), the only way to boot is to provide a | |
| 19 | + * ramdisk. | |
| 20 | + */ | |
| 21 | + chosen { | |
| 22 | + bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug"; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + memory { | |
| 26 | + device_type = "memory"; | |
| 27 | + reg = <0x80000000 0x40000000>; /* 1 GB */ | |
| 28 | + }; | |
| 29 | +}; | |
| @@ -0,0 +1,29 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | +/dts-v1/; | |
| 9 | + | |
| 10 | +/include/ "omap4.dtsi" | |
| 11 | + | |
| 12 | +/ { | |
| 13 | + model = "TI OMAP4 SDP board"; | |
| 14 | + compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4"; | |
| 15 | + | |
| 16 | + /* | |
| 17 | + * Since the initial device tree board file does not create any | |
| 18 | + * devices (MMC, network...), the only way to boot is to provide a | |
| 19 | + * ramdisk. | |
| 20 | + */ | |
| 21 | + chosen { | |
| 22 | + bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug"; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + memory { | |
| 26 | + device_type = "memory"; | |
| 27 | + reg = <0x80000000 0x40000000>; /* 1 GB */ | |
| 28 | + }; | |
| 29 | +}; | |
| @@ -0,0 +1,103 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | + | |
| 9 | +/* | |
| 10 | + * Carveout for multimedia usecases | |
| 11 | + * It should be the last 48MB of the first 512MB memory part | |
| 12 | + * In theory, it should not even exist. That zone should be reserved | |
| 13 | + * dynamically during the .reserve callback. | |
| 14 | + */ | |
| 15 | +/memreserve/ 0x9d000000 0x03000000; | |
| 16 | + | |
| 17 | +/include/ "skeleton.dtsi" | |
| 18 | + | |
| 19 | +/ { | |
| 20 | + compatible = "ti,omap4430", "ti,omap4"; | |
| 21 | + interrupt-parent = <&gic>; | |
| 22 | + | |
| 23 | + aliases { | |
| 24 | + }; | |
| 25 | + | |
| 26 | + cpus { | |
| 27 | + cpu@0 { | |
| 28 | + compatible = "arm,cortex-a9"; | |
| 29 | + }; | |
| 30 | + cpu@1 { | |
| 31 | + compatible = "arm,cortex-a9"; | |
| 32 | + }; | |
| 33 | + }; | |
| 34 | + | |
| 35 | + /* | |
| 36 | + * The soc node represents the soc top level view. It is uses for IPs | |
| 37 | + * that are not memory mapped in the MPU view or for the MPU itself. | |
| 38 | + */ | |
| 39 | + soc { | |
| 40 | + compatible = "ti,omap-infra"; | |
| 41 | + mpu { | |
| 42 | + compatible = "ti,omap4-mpu"; | |
| 43 | + ti,hwmods = "mpu"; | |
| 44 | + }; | |
| 45 | + | |
| 46 | + dsp { | |
| 47 | + compatible = "ti,omap3-c64"; | |
| 48 | + ti,hwmods = "dsp"; | |
| 49 | + }; | |
| 50 | + | |
| 51 | + iva { | |
| 52 | + compatible = "ti,ivahd"; | |
| 53 | + ti,hwmods = "iva"; | |
| 54 | + }; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + /* | |
| 58 | + * XXX: Use a flat representation of the OMAP4 interconnect. | |
| 59 | + * The real OMAP interconnect network is quite complex. | |
| 60 | + * | |
| 61 | + * MPU -+-- MPU_PRIVATE - GIC, L2 | |
| 62 | + * | | |
| 63 | + * +----------------+----------+ | |
| 64 | + * | | | | |
| 65 | + * + +- EMIF - DDR | | |
| 66 | + * | | | | |
| 67 | + * | + +--------+ | |
| 68 | + * | | | | |
| 69 | + * | +- L4_ABE - AESS, MCBSP, TIMERs... | |
| 70 | + * | | | |
| 71 | + * +- L3_MAIN --+- L4_CORE - IPs... | |
| 72 | + * | | |
| 73 | + * +- L4_PER - IPs... | |
| 74 | + * | | |
| 75 | + * +- L4_CFG -+- L4_WKUP - IPs... | |
| 76 | + * | | | |
| 77 | + * | +- IPs... | |
| 78 | + * +- IPU ----+ | |
| 79 | + * | | | |
| 80 | + * +- DSP ----+ | |
| 81 | + * | | | |
| 82 | + * +- DSS ----+ | |
| 83 | + * | |
| 84 | + * Since that will not bring real advantage to represent that in DT for | |
| 85 | + * the moment, just use a fake OCP bus entry to represent the whole bus | |
| 86 | + * hierarchy. | |
| 87 | + */ | |
| 88 | + ocp { | |
| 89 | + compatible = "ti,omap4-l3-noc", "simple-bus"; | |
| 90 | + #address-cells = <1>; | |
| 91 | + #size-cells = <1>; | |
| 92 | + ranges; | |
| 93 | + ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; | |
| 94 | + | |
| 95 | + gic: interrupt-controller@48241000 { | |
| 96 | + compatible = "arm,cortex-a9-gic"; | |
| 97 | + interrupt-controller; | |
| 98 | + #interrupt-cells = <1>; | |
| 99 | + reg = <0x48241000 0x1000>, | |
| 100 | + <0x48240100 0x0100>; | |
| 101 | + }; | |
| 102 | + }; | |
| 103 | +}; | |
| @@ -0,0 +1,249 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2011 Picochip, Jamie Iles | |
| 3 | + * | |
| 4 | + * This software is licensed under the terms of the GNU General Public | |
| 5 | + * License version 2, as published by the Free Software Foundation, and | |
| 6 | + * may be copied, distributed, and modified under those terms. | |
| 7 | + * | |
| 8 | + * This program is distributed in the hope that it will be useful, | |
| 9 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | + * GNU General Public License for more details. | |
| 12 | + */ | |
| 13 | +/include/ "skeleton.dtsi" | |
| 14 | +/ { | |
| 15 | + model = "Picochip picoXcell PC3X2"; | |
| 16 | + compatible = "picochip,pc3x2"; | |
| 17 | + #address-cells = <1>; | |
| 18 | + #size-cells = <1>; | |
| 19 | + | |
| 20 | + cpus { | |
| 21 | + #address-cells = <1>; | |
| 22 | + #size-cells = <0>; | |
| 23 | + | |
| 24 | + cpu@0 { | |
| 25 | + compatible = "arm,1176jz-s"; | |
| 26 | + clock-frequency = <400000000>; | |
| 27 | + reg = <0>; | |
| 28 | + d-cache-line-size = <32>; | |
| 29 | + d-cache-size = <32768>; | |
| 30 | + i-cache-line-size = <32>; | |
| 31 | + i-cache-size = <32768>; | |
| 32 | + }; | |
| 33 | + }; | |
| 34 | + | |
| 35 | + clocks { | |
| 36 | + #address-cells = <1>; | |
| 37 | + #size-cells = <1>; | |
| 38 | + ranges; | |
| 39 | + | |
| 40 | + pclk: clock@0 { | |
| 41 | + compatible = "fixed-clock"; | |
| 42 | + clock-outputs = "bus", "pclk"; | |
| 43 | + clock-frequency = <200000000>; | |
| 44 | + ref-clock = <&ref_clk>, "ref"; | |
| 45 | + }; | |
| 46 | + }; | |
| 47 | + | |
| 48 | + paxi { | |
| 49 | + compatible = "simple-bus"; | |
| 50 | + #address-cells = <1>; | |
| 51 | + #size-cells = <1>; | |
| 52 | + ranges = <0 0x80000000 0x400000>; | |
| 53 | + | |
| 54 | + emac: gem@30000 { | |
| 55 | + compatible = "cadence,gem"; | |
| 56 | + reg = <0x30000 0x10000>; | |
| 57 | + interrupts = <31>; | |
| 58 | + }; | |
| 59 | + | |
| 60 | + dmac1: dmac@40000 { | |
| 61 | + compatible = "snps,dw-dmac"; | |
| 62 | + reg = <0x40000 0x10000>; | |
| 63 | + interrupts = <25>; | |
| 64 | + }; | |
| 65 | + | |
| 66 | + dmac2: dmac@50000 { | |
| 67 | + compatible = "snps,dw-dmac"; | |
| 68 | + reg = <0x50000 0x10000>; | |
| 69 | + interrupts = <26>; | |
| 70 | + }; | |
| 71 | + | |
| 72 | + vic0: interrupt-controller@60000 { | |
| 73 | + compatible = "arm,pl192-vic"; | |
| 74 | + interrupt-controller; | |
| 75 | + reg = <0x60000 0x1000>; | |
| 76 | + #interrupt-cells = <1>; | |
| 77 | + }; | |
| 78 | + | |
| 79 | + vic1: interrupt-controller@64000 { | |
| 80 | + compatible = "arm,pl192-vic"; | |
| 81 | + interrupt-controller; | |
| 82 | + reg = <0x64000 0x1000>; | |
| 83 | + #interrupt-cells = <1>; | |
| 84 | + }; | |
| 85 | + | |
| 86 | + fuse: picoxcell-fuse@80000 { | |
| 87 | + compatible = "picoxcell,fuse-pc3x2"; | |
| 88 | + reg = <0x80000 0x10000>; | |
| 89 | + }; | |
| 90 | + | |
| 91 | + ssi: picoxcell-spi@90000 { | |
| 92 | + compatible = "picoxcell,spi"; | |
| 93 | + reg = <0x90000 0x10000>; | |
| 94 | + interrupt-parent = <&vic0>; | |
| 95 | + interrupts = <10>; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + ipsec: spacc@100000 { | |
| 99 | + compatible = "picochip,spacc-ipsec"; | |
| 100 | + reg = <0x100000 0x10000>; | |
| 101 | + interrupt-parent = <&vic0>; | |
| 102 | + interrupts = <24>; | |
| 103 | + ref-clock = <&pclk>, "ref"; | |
| 104 | + }; | |
| 105 | + | |
| 106 | + srtp: spacc@140000 { | |
| 107 | + compatible = "picochip,spacc-srtp"; | |
| 108 | + reg = <0x140000 0x10000>; | |
| 109 | + interrupt-parent = <&vic0>; | |
| 110 | + interrupts = <23>; | |
| 111 | + }; | |
| 112 | + | |
| 113 | + l2_engine: spacc@180000 { | |
| 114 | + compatible = "picochip,spacc-l2"; | |
| 115 | + reg = <0x180000 0x10000>; | |
| 116 | + interrupt-parent = <&vic0>; | |
| 117 | + interrupts = <22>; | |
| 118 | + ref-clock = <&pclk>, "ref"; | |
| 119 | + }; | |
| 120 | + | |
| 121 | + apb { | |
| 122 | + compatible = "simple-bus"; | |
| 123 | + #address-cells = <1>; | |
| 124 | + #size-cells = <1>; | |
| 125 | + ranges = <0 0x200000 0x80000>; | |
| 126 | + | |
| 127 | + rtc0: rtc@00000 { | |
| 128 | + compatible = "picochip,pc3x2-rtc"; | |
| 129 | + clock-freq = <200000000>; | |
| 130 | + reg = <0x00000 0xf>; | |
| 131 | + interrupt-parent = <&vic1>; | |
| 132 | + interrupts = <8>; | |
| 133 | + }; | |
| 134 | + | |
| 135 | + timer0: timer@10000 { | |
| 136 | + compatible = "picochip,pc3x2-timer"; | |
| 137 | + interrupt-parent = <&vic0>; | |
| 138 | + interrupts = <4>; | |
| 139 | + clock-freq = <200000000>; | |
| 140 | + reg = <0x10000 0x14>; | |
| 141 | + }; | |
| 142 | + | |
| 143 | + timer1: timer@10014 { | |
| 144 | + compatible = "picochip,pc3x2-timer"; | |
| 145 | + interrupt-parent = <&vic0>; | |
| 146 | + interrupts = <5>; | |
| 147 | + clock-freq = <200000000>; | |
| 148 | + reg = <0x10014 0x14>; | |
| 149 | + }; | |
| 150 | + | |
| 151 | + timer2: timer@10028 { | |
| 152 | + compatible = "picochip,pc3x2-timer"; | |
| 153 | + interrupt-parent = <&vic0>; | |
| 154 | + interrupts = <6>; | |
| 155 | + clock-freq = <200000000>; | |
| 156 | + reg = <0x10028 0x14>; | |
| 157 | + }; | |
| 158 | + | |
| 159 | + timer3: timer@1003c { | |
| 160 | + compatible = "picochip,pc3x2-timer"; | |
| 161 | + interrupt-parent = <&vic0>; | |
| 162 | + interrupts = <7>; | |
| 163 | + clock-freq = <200000000>; | |
| 164 | + reg = <0x1003c 0x14>; | |
| 165 | + }; | |
| 166 | + | |
| 167 | + gpio: gpio@20000 { | |
| 168 | + compatible = "snps,dw-apb-gpio"; | |
| 169 | + reg = <0x20000 0x1000>; | |
| 170 | + #address-cells = <1>; | |
| 171 | + #size-cells = <0>; | |
| 172 | + reg-io-width = <4>; | |
| 173 | + | |
| 174 | + banka: gpio-controller@0 { | |
| 175 | + compatible = "snps,dw-apb-gpio-bank"; | |
| 176 | + gpio-controller; | |
| 177 | + #gpio-cells = <2>; | |
| 178 | + gpio-generic,nr-gpio = <8>; | |
| 179 | + | |
| 180 | + regoffset-dat = <0x50>; | |
| 181 | + regoffset-set = <0x00>; | |
| 182 | + regoffset-dirout = <0x04>; | |
| 183 | + }; | |
| 184 | + | |
| 185 | + bankb: gpio-controller@1 { | |
| 186 | + compatible = "snps,dw-apb-gpio-bank"; | |
| 187 | + gpio-controller; | |
| 188 | + #gpio-cells = <2>; | |
| 189 | + gpio-generic,nr-gpio = <8>; | |
| 190 | + | |
| 191 | + regoffset-dat = <0x54>; | |
| 192 | + regoffset-set = <0x0c>; | |
| 193 | + regoffset-dirout = <0x10>; | |
| 194 | + }; | |
| 195 | + }; | |
| 196 | + | |
| 197 | + uart0: uart@30000 { | |
| 198 | + compatible = "snps,dw-apb-uart"; | |
| 199 | + reg = <0x30000 0x1000>; | |
| 200 | + interrupt-parent = <&vic1>; | |
| 201 | + interrupts = <10>; | |
| 202 | + clock-frequency = <3686400>; | |
| 203 | + reg-shift = <2>; | |
| 204 | + reg-io-width = <4>; | |
| 205 | + }; | |
| 206 | + | |
| 207 | + uart1: uart@40000 { | |
| 208 | + compatible = "snps,dw-apb-uart"; | |
| 209 | + reg = <0x40000 0x1000>; | |
| 210 | + interrupt-parent = <&vic1>; | |
| 211 | + interrupts = <9>; | |
| 212 | + clock-frequency = <3686400>; | |
| 213 | + reg-shift = <2>; | |
| 214 | + reg-io-width = <4>; | |
| 215 | + }; | |
| 216 | + | |
| 217 | + wdog: watchdog@50000 { | |
| 218 | + compatible = "snps,dw-apb-wdg"; | |
| 219 | + reg = <0x50000 0x10000>; | |
| 220 | + interrupt-parent = <&vic0>; | |
| 221 | + interrupts = <11>; | |
| 222 | + bus-clock = <&pclk>, "bus"; | |
| 223 | + }; | |
| 224 | + }; | |
| 225 | + }; | |
| 226 | + | |
| 227 | + rwid-axi { | |
| 228 | + #address-cells = <1>; | |
| 229 | + #size-cells = <1>; | |
| 230 | + compatible = "simple-bus"; | |
| 231 | + ranges; | |
| 232 | + | |
| 233 | + ebi@50000000 { | |
| 234 | + compatible = "simple-bus"; | |
| 235 | + #address-cells = <2>; | |
| 236 | + #size-cells = <1>; | |
| 237 | + ranges = <0 0 0x40000000 0x08000000 | |
| 238 | + 1 0 0x48000000 0x08000000 | |
| 239 | + 2 0 0x50000000 0x08000000 | |
| 240 | + 3 0 0x58000000 0x08000000>; | |
| 241 | + }; | |
| 242 | + | |
| 243 | + axi2pico@c0000000 { | |
| 244 | + compatible = "picochip,axi2pico-pc3x2"; | |
| 245 | + reg = <0xc0000000 0x10000>; | |
| 246 | + interrupts = <13 14 15 16 17 18 19 20 21>; | |
| 247 | + }; | |
| 248 | + }; | |
| 249 | +}; | |
| @@ -0,0 +1,365 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2011 Picochip, Jamie Iles | |
| 3 | + * | |
| 4 | + * This software is licensed under the terms of the GNU General Public | |
| 5 | + * License version 2, as published by the Free Software Foundation, and | |
| 6 | + * may be copied, distributed, and modified under those terms. | |
| 7 | + * | |
| 8 | + * This program is distributed in the hope that it will be useful, | |
| 9 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | + * GNU General Public License for more details. | |
| 12 | + */ | |
| 13 | +/include/ "skeleton.dtsi" | |
| 14 | +/ { | |
| 15 | + model = "Picochip picoXcell PC3X3"; | |
| 16 | + compatible = "picochip,pc3x3"; | |
| 17 | + #address-cells = <1>; | |
| 18 | + #size-cells = <1>; | |
| 19 | + | |
| 20 | + cpus { | |
| 21 | + #address-cells = <1>; | |
| 22 | + #size-cells = <0>; | |
| 23 | + | |
| 24 | + cpu@0 { | |
| 25 | + compatible = "arm,1176jz-s"; | |
| 26 | + cpu-clock = <&arm_clk>, "cpu"; | |
| 27 | + reg = <0>; | |
| 28 | + d-cache-line-size = <32>; | |
| 29 | + d-cache-size = <32768>; | |
| 30 | + i-cache-line-size = <32>; | |
| 31 | + i-cache-size = <32768>; | |
| 32 | + }; | |
| 33 | + }; | |
| 34 | + | |
| 35 | + clocks { | |
| 36 | + #address-cells = <1>; | |
| 37 | + #size-cells = <1>; | |
| 38 | + ranges; | |
| 39 | + | |
| 40 | + clkgate: clkgate@800a0048 { | |
| 41 | + #address-cells = <1>; | |
| 42 | + #size-cells = <0>; | |
| 43 | + reg = <0x800a0048 4>; | |
| 44 | + compatible = "picochip,pc3x3-clk-gate"; | |
| 45 | + | |
| 46 | + tzprot_clk: clock@0 { | |
| 47 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 48 | + clock-outputs = "bus"; | |
| 49 | + picochip,clk-disable-bit = <0>; | |
| 50 | + clock-frequency = <200000000>; | |
| 51 | + ref-clock = <&ref_clk>, "ref"; | |
| 52 | + }; | |
| 53 | + | |
| 54 | + spi_clk: clock@1 { | |
| 55 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 56 | + clock-outputs = "bus"; | |
| 57 | + picochip,clk-disable-bit = <1>; | |
| 58 | + clock-frequency = <200000000>; | |
| 59 | + ref-clock = <&ref_clk>, "ref"; | |
| 60 | + }; | |
| 61 | + | |
| 62 | + dmac0_clk: clock@2 { | |
| 63 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 64 | + clock-outputs = "bus"; | |
| 65 | + picochip,clk-disable-bit = <2>; | |
| 66 | + clock-frequency = <200000000>; | |
| 67 | + ref-clock = <&ref_clk>, "ref"; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + dmac1_clk: clock@3 { | |
| 71 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 72 | + clock-outputs = "bus"; | |
| 73 | + picochip,clk-disable-bit = <3>; | |
| 74 | + clock-frequency = <200000000>; | |
| 75 | + ref-clock = <&ref_clk>, "ref"; | |
| 76 | + }; | |
| 77 | + | |
| 78 | + ebi_clk: clock@4 { | |
| 79 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 80 | + clock-outputs = "bus"; | |
| 81 | + picochip,clk-disable-bit = <4>; | |
| 82 | + clock-frequency = <200000000>; | |
| 83 | + ref-clock = <&ref_clk>, "ref"; | |
| 84 | + }; | |
| 85 | + | |
| 86 | + ipsec_clk: clock@5 { | |
| 87 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 88 | + clock-outputs = "bus"; | |
| 89 | + picochip,clk-disable-bit = <5>; | |
| 90 | + clock-frequency = <200000000>; | |
| 91 | + ref-clock = <&ref_clk>, "ref"; | |
| 92 | + }; | |
| 93 | + | |
| 94 | + l2_clk: clock@6 { | |
| 95 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 96 | + clock-outputs = "bus"; | |
| 97 | + picochip,clk-disable-bit = <6>; | |
| 98 | + clock-frequency = <200000000>; | |
| 99 | + ref-clock = <&ref_clk>, "ref"; | |
| 100 | + }; | |
| 101 | + | |
| 102 | + trng_clk: clock@7 { | |
| 103 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 104 | + clock-outputs = "bus"; | |
| 105 | + picochip,clk-disable-bit = <7>; | |
| 106 | + clock-frequency = <200000000>; | |
| 107 | + ref-clock = <&ref_clk>, "ref"; | |
| 108 | + }; | |
| 109 | + | |
| 110 | + fuse_clk: clock@8 { | |
| 111 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 112 | + clock-outputs = "bus"; | |
| 113 | + picochip,clk-disable-bit = <8>; | |
| 114 | + clock-frequency = <200000000>; | |
| 115 | + ref-clock = <&ref_clk>, "ref"; | |
| 116 | + }; | |
| 117 | + | |
| 118 | + otp_clk: clock@9 { | |
| 119 | + compatible = "picochip,pc3x3-gated-clk"; | |
| 120 | + clock-outputs = "bus"; | |
| 121 | + picochip,clk-disable-bit = <9>; | |
| 122 | + clock-frequency = <200000000>; | |
| 123 | + ref-clock = <&ref_clk>, "ref"; | |
| 124 | + }; | |
| 125 | + }; | |
| 126 | + | |
| 127 | + arm_clk: clock@11 { | |
| 128 | + compatible = "picochip,pc3x3-pll"; | |
| 129 | + reg = <0x800a0050 0x8>; | |
| 130 | + picochip,min-freq = <140000000>; | |
| 131 | + picochip,max-freq = <700000000>; | |
| 132 | + ref-clock = <&ref_clk>, "ref"; | |
| 133 | + clock-outputs = "cpu"; | |
| 134 | + }; | |
| 135 | + | |
| 136 | + pclk: clock@12 { | |
| 137 | + compatible = "fixed-clock"; | |
| 138 | + clock-outputs = "bus", "pclk"; | |
| 139 | + clock-frequency = <200000000>; | |
| 140 | + ref-clock = <&ref_clk>, "ref"; | |
| 141 | + }; | |
| 142 | + }; | |
| 143 | + | |
| 144 | + paxi { | |
| 145 | + compatible = "simple-bus"; | |
| 146 | + #address-cells = <1>; | |
| 147 | + #size-cells = <1>; | |
| 148 | + ranges = <0 0x80000000 0x400000>; | |
| 149 | + | |
| 150 | + emac: gem@30000 { | |
| 151 | + compatible = "cadence,gem"; | |
| 152 | + reg = <0x30000 0x10000>; | |
| 153 | + interrupt-parent = <&vic0>; | |
| 154 | + interrupts = <31>; | |
| 155 | + }; | |
| 156 | + | |
| 157 | + dmac1: dmac@40000 { | |
| 158 | + compatible = "snps,dw-dmac"; | |
| 159 | + reg = <0x40000 0x10000>; | |
| 160 | + interrupt-parent = <&vic0>; | |
| 161 | + interrupts = <25>; | |
| 162 | + }; | |
| 163 | + | |
| 164 | + dmac2: dmac@50000 { | |
| 165 | + compatible = "snps,dw-dmac"; | |
| 166 | + reg = <0x50000 0x10000>; | |
| 167 | + interrupt-parent = <&vic0>; | |
| 168 | + interrupts = <26>; | |
| 169 | + }; | |
| 170 | + | |
| 171 | + vic0: interrupt-controller@60000 { | |
| 172 | + compatible = "arm,pl192-vic"; | |
| 173 | + interrupt-controller; | |
| 174 | + reg = <0x60000 0x1000>; | |
| 175 | + #interrupt-cells = <1>; | |
| 176 | + }; | |
| 177 | + | |
| 178 | + vic1: interrupt-controller@64000 { | |
| 179 | + compatible = "arm,pl192-vic"; | |
| 180 | + interrupt-controller; | |
| 181 | + reg = <0x64000 0x1000>; | |
| 182 | + #interrupt-cells = <1>; | |
| 183 | + }; | |
| 184 | + | |
| 185 | + fuse: picoxcell-fuse@80000 { | |
| 186 | + compatible = "picoxcell,fuse-pc3x3"; | |
| 187 | + reg = <0x80000 0x10000>; | |
| 188 | + }; | |
| 189 | + | |
| 190 | + ssi: picoxcell-spi@90000 { | |
| 191 | + compatible = "picoxcell,spi"; | |
| 192 | + reg = <0x90000 0x10000>; | |
| 193 | + interrupt-parent = <&vic0>; | |
| 194 | + interrupts = <10>; | |
| 195 | + }; | |
| 196 | + | |
| 197 | + ipsec: spacc@100000 { | |
| 198 | + compatible = "picochip,spacc-ipsec"; | |
| 199 | + reg = <0x100000 0x10000>; | |
| 200 | + interrupt-parent = <&vic0>; | |
| 201 | + interrupts = <24>; | |
| 202 | + ref-clock = <&ipsec_clk>, "ref"; | |
| 203 | + }; | |
| 204 | + | |
| 205 | + srtp: spacc@140000 { | |
| 206 | + compatible = "picochip,spacc-srtp"; | |
| 207 | + reg = <0x140000 0x10000>; | |
| 208 | + interrupt-parent = <&vic0>; | |
| 209 | + interrupts = <23>; | |
| 210 | + }; | |
| 211 | + | |
| 212 | + l2_engine: spacc@180000 { | |
| 213 | + compatible = "picochip,spacc-l2"; | |
| 214 | + reg = <0x180000 0x10000>; | |
| 215 | + interrupt-parent = <&vic0>; | |
| 216 | + interrupts = <22>; | |
| 217 | + ref-clock = <&l2_clk>, "ref"; | |
| 218 | + }; | |
| 219 | + | |
| 220 | + apb { | |
| 221 | + compatible = "simple-bus"; | |
| 222 | + #address-cells = <1>; | |
| 223 | + #size-cells = <1>; | |
| 224 | + ranges = <0 0x200000 0x80000>; | |
| 225 | + | |
| 226 | + rtc0: rtc@00000 { | |
| 227 | + compatible = "picochip,pc3x2-rtc"; | |
| 228 | + clock-freq = <200000000>; | |
| 229 | + reg = <0x00000 0xf>; | |
| 230 | + interrupt-parent = <&vic0>; | |
| 231 | + interrupts = <8>; | |
| 232 | + }; | |
| 233 | + | |
| 234 | + timer0: timer@10000 { | |
| 235 | + compatible = "picochip,pc3x2-timer"; | |
| 236 | + interrupt-parent = <&vic0>; | |
| 237 | + interrupts = <4>; | |
| 238 | + clock-freq = <200000000>; | |
| 239 | + reg = <0x10000 0x14>; | |
| 240 | + }; | |
| 241 | + | |
| 242 | + timer1: timer@10014 { | |
| 243 | + compatible = "picochip,pc3x2-timer"; | |
| 244 | + interrupt-parent = <&vic0>; | |
| 245 | + interrupts = <5>; | |
| 246 | + clock-freq = <200000000>; | |
| 247 | + reg = <0x10014 0x14>; | |
| 248 | + }; | |
| 249 | + | |
| 250 | + gpio: gpio@20000 { | |
| 251 | + compatible = "snps,dw-apb-gpio"; | |
| 252 | + reg = <0x20000 0x1000>; | |
| 253 | + #address-cells = <1>; | |
| 254 | + #size-cells = <0>; | |
| 255 | + reg-io-width = <4>; | |
| 256 | + | |
| 257 | + banka: gpio-controller@0 { | |
| 258 | + compatible = "snps,dw-apb-gpio-bank"; | |
| 259 | + gpio-controller; | |
| 260 | + #gpio-cells = <2>; | |
| 261 | + gpio-generic,nr-gpio = <8>; | |
| 262 | + | |
| 263 | + regoffset-dat = <0x50>; | |
| 264 | + regoffset-set = <0x00>; | |
| 265 | + regoffset-dirout = <0x04>; | |
| 266 | + }; | |
| 267 | + | |
| 268 | + bankb: gpio-controller@1 { | |
| 269 | + compatible = "snps,dw-apb-gpio-bank"; | |
| 270 | + gpio-controller; | |
| 271 | + #gpio-cells = <2>; | |
| 272 | + gpio-generic,nr-gpio = <16>; | |
| 273 | + | |
| 274 | + regoffset-dat = <0x54>; | |
| 275 | + regoffset-set = <0x0c>; | |
| 276 | + regoffset-dirout = <0x10>; | |
| 277 | + }; | |
| 278 | + | |
| 279 | + bankd: gpio-controller@2 { | |
| 280 | + compatible = "snps,dw-apb-gpio-bank"; | |
| 281 | + gpio-controller; | |
| 282 | + #gpio-cells = <2>; | |
| 283 | + gpio-generic,nr-gpio = <30>; | |
| 284 | + | |
| 285 | + regoffset-dat = <0x5c>; | |
| 286 | + regoffset-set = <0x24>; | |
| 287 | + regoffset-dirout = <0x28>; | |
| 288 | + }; | |
| 289 | + }; | |
| 290 | + | |
| 291 | + uart0: uart@30000 { | |
| 292 | + compatible = "snps,dw-apb-uart"; | |
| 293 | + reg = <0x30000 0x1000>; | |
| 294 | + interrupt-parent = <&vic1>; | |
| 295 | + interrupts = <10>; | |
| 296 | + clock-frequency = <3686400>; | |
| 297 | + reg-shift = <2>; | |
| 298 | + reg-io-width = <4>; | |
| 299 | + }; | |
| 300 | + | |
| 301 | + uart1: uart@40000 { | |
| 302 | + compatible = "snps,dw-apb-uart"; | |
| 303 | + reg = <0x40000 0x1000>; | |
| 304 | + interrupt-parent = <&vic1>; | |
| 305 | + interrupts = <9>; | |
| 306 | + clock-frequency = <3686400>; | |
| 307 | + reg-shift = <2>; | |
| 308 | + reg-io-width = <4>; | |
| 309 | + }; | |
| 310 | + | |
| 311 | + wdog: watchdog@50000 { | |
| 312 | + compatible = "snps,dw-apb-wdg"; | |
| 313 | + reg = <0x50000 0x10000>; | |
| 314 | + interrupt-parent = <&vic0>; | |
| 315 | + interrupts = <11>; | |
| 316 | + bus-clock = <&pclk>, "bus"; | |
| 317 | + }; | |
| 318 | + | |
| 319 | + timer2: timer@60000 { | |
| 320 | + compatible = "picochip,pc3x2-timer"; | |
| 321 | + interrupt-parent = <&vic0>; | |
| 322 | + interrupts = <6>; | |
| 323 | + clock-freq = <200000000>; | |
| 324 | + reg = <0x60000 0x14>; | |
| 325 | + }; | |
| 326 | + | |
| 327 | + timer3: timer@60014 { | |
| 328 | + compatible = "picochip,pc3x2-timer"; | |
| 329 | + interrupt-parent = <&vic0>; | |
| 330 | + interrupts = <7>; | |
| 331 | + clock-freq = <200000000>; | |
| 332 | + reg = <0x60014 0x14>; | |
| 333 | + }; | |
| 334 | + }; | |
| 335 | + }; | |
| 336 | + | |
| 337 | + rwid-axi { | |
| 338 | + #address-cells = <1>; | |
| 339 | + #size-cells = <1>; | |
| 340 | + compatible = "simple-bus"; | |
| 341 | + ranges; | |
| 342 | + | |
| 343 | + ebi@50000000 { | |
| 344 | + compatible = "simple-bus"; | |
| 345 | + #address-cells = <2>; | |
| 346 | + #size-cells = <1>; | |
| 347 | + ranges = <0 0 0x40000000 0x08000000 | |
| 348 | + 1 0 0x48000000 0x08000000 | |
| 349 | + 2 0 0x50000000 0x08000000 | |
| 350 | + 3 0 0x58000000 0x08000000>; | |
| 351 | + }; | |
| 352 | + | |
| 353 | + axi2pico@c0000000 { | |
| 354 | + compatible = "picochip,axi2pico-pc3x3"; | |
| 355 | + reg = <0xc0000000 0x10000>; | |
| 356 | + interrupt-parent = <&vic0>; | |
| 357 | + interrupts = <13 14 15 16 17 18 19 20 21>; | |
| 358 | + }; | |
| 359 | + | |
| 360 | + otp@ffff8000 { | |
| 361 | + compatible = "picochip,otp-pc3x3"; | |
| 362 | + reg = <0xffff8000 0x8000>; | |
| 363 | + }; | |
| 364 | + }; | |
| 365 | +}; | |
| @@ -0,0 +1,86 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2011 Picochip, Jamie Iles | |
| 3 | + * | |
| 4 | + * This software is licensed under the terms of the GNU General Public | |
| 5 | + * License version 2, as published by the Free Software Foundation, and | |
| 6 | + * may be copied, distributed, and modified under those terms. | |
| 7 | + * | |
| 8 | + * This program is distributed in the hope that it will be useful, | |
| 9 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | + * GNU General Public License for more details. | |
| 12 | + */ | |
| 13 | + | |
| 14 | +/dts-v1/; | |
| 15 | +/include/ "picoxcell-pc3x2.dtsi" | |
| 16 | +/ { | |
| 17 | + model = "Picochip PC7302 (PC3X2)"; | |
| 18 | + compatible = "picochip,pc7302-pc3x2", "picochip,pc3x2"; | |
| 19 | + | |
| 20 | + memory { | |
| 21 | + device_type = "memory"; | |
| 22 | + reg = <0x0 0x08000000>; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + chosen { | |
| 26 | + linux,stdout-path = &uart0; | |
| 27 | + }; | |
| 28 | + | |
| 29 | + clocks { | |
| 30 | + ref_clk: clock@1 { | |
| 31 | + compatible = "fixed-clock"; | |
| 32 | + clock-outputs = "ref"; | |
| 33 | + clock-frequency = <20000000>; | |
| 34 | + }; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + rwid-axi { | |
| 38 | + ebi@50000000 { | |
| 39 | + nand: gpio-nand@2,0 { | |
| 40 | + compatible = "gpio-control-nand"; | |
| 41 | + #address-cells = <1>; | |
| 42 | + #size-cells = <1>; | |
| 43 | + reg = <2 0x0000 0x1000>; | |
| 44 | + bus-clock = <&pclk>, "bus"; | |
| 45 | + gpio-control-nand,io-sync-reg = | |
| 46 | + <0x00000000 0x80220000>; | |
| 47 | + | |
| 48 | + gpios = <&banka 1 0 /* rdy */ | |
| 49 | + &banka 2 0 /* nce */ | |
| 50 | + &banka 3 0 /* ale */ | |
| 51 | + &banka 4 0 /* cle */ | |
| 52 | + 0 /* nwp */>; | |
| 53 | + | |
| 54 | + boot@100000 { | |
| 55 | + label = "Boot"; | |
| 56 | + reg = <0x100000 0x80000>; | |
| 57 | + }; | |
| 58 | + | |
| 59 | + redundant-boot@200000 { | |
| 60 | + label = "Redundant Boot"; | |
| 61 | + reg = <0x200000 0x80000>; | |
| 62 | + }; | |
| 63 | + | |
| 64 | + boot-env@300000 { | |
| 65 | + label = "Boot Evironment"; | |
| 66 | + reg = <0x300000 0x20000>; | |
| 67 | + }; | |
| 68 | + | |
| 69 | + redundant-boot-env@320000 { | |
| 70 | + label = "Redundant Boot Environment"; | |
| 71 | + reg = <0x300000 0x20000>; | |
| 72 | + }; | |
| 73 | + | |
| 74 | + kernel@380000 { | |
| 75 | + label = "Kernel"; | |
| 76 | + reg = <0x380000 0x800000>; | |
| 77 | + }; | |
| 78 | + | |
| 79 | + fs@b80000 { | |
| 80 | + label = "File System"; | |
| 81 | + reg = <0xb80000 0xf480000>; | |
| 82 | + }; | |
| 83 | + }; | |
| 84 | + }; | |
| 85 | + }; | |
| 86 | +}; | |
| @@ -0,0 +1,92 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2011 Picochip, Jamie Iles | |
| 3 | + * | |
| 4 | + * This software is licensed under the terms of the GNU General Public | |
| 5 | + * License version 2, as published by the Free Software Foundation, and | |
| 6 | + * may be copied, distributed, and modified under those terms. | |
| 7 | + * | |
| 8 | + * This program is distributed in the hope that it will be useful, | |
| 9 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | + * GNU General Public License for more details. | |
| 12 | + */ | |
| 13 | + | |
| 14 | +/dts-v1/; | |
| 15 | +/include/ "picoxcell-pc3x3.dtsi" | |
| 16 | +/ { | |
| 17 | + model = "Picochip PC7302 (PC3X3)"; | |
| 18 | + compatible = "picochip,pc7302-pc3x3", "picochip,pc3x3"; | |
| 19 | + | |
| 20 | + memory { | |
| 21 | + device_type = "memory"; | |
| 22 | + reg = <0x0 0x08000000>; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + chosen { | |
| 26 | + linux,stdout-path = &uart0; | |
| 27 | + }; | |
| 28 | + | |
| 29 | + clocks { | |
| 30 | + ref_clk: clock@10 { | |
| 31 | + compatible = "fixed-clock"; | |
| 32 | + clock-outputs = "ref"; | |
| 33 | + clock-frequency = <20000000>; | |
| 34 | + }; | |
| 35 | + | |
| 36 | + clkgate: clkgate@800a0048 { | |
| 37 | + clock@4 { | |
| 38 | + picochip,clk-no-disable; | |
| 39 | + }; | |
| 40 | + }; | |
| 41 | + }; | |
| 42 | + | |
| 43 | + rwid-axi { | |
| 44 | + ebi@50000000 { | |
| 45 | + nand: gpio-nand@2,0 { | |
| 46 | + compatible = "gpio-control-nand"; | |
| 47 | + #address-cells = <1>; | |
| 48 | + #size-cells = <1>; | |
| 49 | + reg = <2 0x0000 0x1000>; | |
| 50 | + bus-clock = <&ebi_clk>, "bus"; | |
| 51 | + gpio-control-nand,io-sync-reg = | |
| 52 | + <0x00000000 0x80220000>; | |
| 53 | + | |
| 54 | + gpios = <&banka 1 0 /* rdy */ | |
| 55 | + &banka 2 0 /* nce */ | |
| 56 | + &banka 3 0 /* ale */ | |
| 57 | + &banka 4 0 /* cle */ | |
| 58 | + 0 /* nwp */>; | |
| 59 | + | |
| 60 | + boot@100000 { | |
| 61 | + label = "Boot"; | |
| 62 | + reg = <0x100000 0x80000>; | |
| 63 | + }; | |
| 64 | + | |
| 65 | + redundant-boot@200000 { | |
| 66 | + label = "Redundant Boot"; | |
| 67 | + reg = <0x200000 0x80000>; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + boot-env@300000 { | |
| 71 | + label = "Boot Evironment"; | |
| 72 | + reg = <0x300000 0x20000>; | |
| 73 | + }; | |
| 74 | + | |
| 75 | + redundant-boot-env@320000 { | |
| 76 | + label = "Redundant Boot Environment"; | |
| 77 | + reg = <0x300000 0x20000>; | |
| 78 | + }; | |
| 79 | + | |
| 80 | + kernel@380000 { | |
| 81 | + label = "Kernel"; | |
| 82 | + reg = <0x380000 0x800000>; | |
| 83 | + }; | |
| 84 | + | |
| 85 | + fs@b80000 { | |
| 86 | + label = "File System"; | |
| 87 | + reg = <0xb80000 0xf480000>; | |
| 88 | + }; | |
| 89 | + }; | |
| 90 | + }; | |
| 91 | + }; | |
| 92 | +}; | |
| @@ -39,9 +39,12 @@ · 38 unmodified lines | ||
| 39 | 39 | ranges = <0x40000000 0x40000000 0x80000000>; |
| 40 | 40 | |
| 41 | 41 | l2-cache-controller@80040000 { |
| 42 | − compatible = "arm,pl310-cache"; | |
| 42 | + compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache"; | |
| 43 | 43 | reg = <0x80040000 0x1000>; |
| 44 | 44 | interrupts = <59>; |
| 45 | + arm,tag-latency = <1 1 1>; | |
| 46 | + arm,data-latency = <1 1 1>; | |
| 47 | + arm,filter-ranges = <0 0x40000000>; | |
| 45 | 48 | }; |
| 46 | 49 | |
| 47 | 50 | intc: interrupt-controller@80020000 { |
| @@ -67,6 +70,11 @@ · 19 unmodified lines | ||
| 67 | 70 | compatible = "sirf,prima2-rstc"; |
| 68 | 71 | reg = <0x88010000 0x1000>; |
| 69 | 72 | }; |
| 73 | + | |
| 74 | + rsc-controller@88020000 { | |
| 75 | + compatible = "sirf,prima2-rsc"; | |
| 76 | + reg = <0x88020000 0x1000>; | |
| 77 | + }; | |
| 70 | 78 | }; |
| 71 | 79 | |
| 72 | 80 | mem-iobg { |
| @@ -274,7 +282,7 @@ · 201 unmodified lines | ||
| 274 | 282 | gpio: gpio-controller@b0120000 { |
| 275 | 283 | #gpio-cells = <2>; |
| 276 | 284 | #interrupt-cells = <2>; |
| 277 | − compatible = "sirf,prima2-gpio"; | |
| 285 | + compatible = "sirf,prima2-gpio-pinmux"; | |
| 278 | 286 | reg = <0xb0120000 0x10000>; |
| 279 | 287 | gpio-controller; |
| 280 | 288 | interrupt-controller; |
| @@ -358,7 +366,7 @@ · 77 unmodified lines | ||
| 358 | 366 | }; |
| 359 | 367 | |
| 360 | 368 | rtc-iobg { |
| 361 | − compatible = "sirf,prima2-rtciobg", "simple-bus"; | |
| 369 | + compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus"; | |
| 362 | 370 | #address-cells = <1>; |
| 363 | 371 | #size-cells = <1>; |
| 364 | 372 | reg = <0x80030000 0x10000>; |
| @@ -66,5 +66,6 @@ · 65 unmodified lines | ||
| 66 | 66 | cd-gpios = <&gpio 58 0>; /* gpio PH2 */ |
| 67 | 67 | wp-gpios = <&gpio 59 0>; /* gpio PH3 */ |
| 68 | 68 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ |
| 69 | + support-8bit; | |
| 69 | 70 | }; |
| 70 | 71 | }; |
| @@ -25,4 +25,8 @@ · 24 unmodified lines | ||
| 25 | 25 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
| 26 | 26 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ |
| 27 | 27 | }; |
| 28 | + | |
| 29 | + sdhci@c8000600 { | |
| 30 | + support-8bit; | |
| 31 | + }; | |
| 28 | 32 | }; |
| @@ -0,0 +1,31 @@ | ||
| 1 | +/dts-v1/; | |
| 2 | + | |
| 3 | +/memreserve/ 0x1c000000 0x04000000; | |
| 4 | +/include/ "tegra20.dtsi" | |
| 5 | + | |
| 6 | +/ { | |
| 7 | + model = "NVIDIA Tegra2 Ventana evaluation board"; | |
| 8 | + compatible = "nvidia,ventana", "nvidia,tegra20"; | |
| 9 | + | |
| 10 | + chosen { | |
| 11 | + bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/ram rdinit=/sbin/init"; | |
| 12 | + }; | |
| 13 | + | |
| 14 | + memory { | |
| 15 | + reg = < 0x00000000 0x40000000 >; | |
| 16 | + }; | |
| 17 | + | |
| 18 | + serial@70006300 { | |
| 19 | + clock-frequency = < 216000000 >; | |
| 20 | + }; | |
| 21 | + | |
| 22 | + sdhci@c8000400 { | |
| 23 | + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | |
| 24 | + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | |
| 25 | + power-gpios = <&gpio 70 0>; /* gpio PI6 */ | |
| 26 | + }; | |
| 27 | + | |
| 28 | + sdhci@c8000600 { | |
| 29 | + support-8bit; | |
| 30 | + }; | |
| 31 | +}; | |
| @@ -77,6 +77,14 @@ · 76 unmodified lines | ||
| 77 | 77 | gpio-controller; |
| 78 | 78 | }; |
| 79 | 79 | |
| 80 | + pinmux: pinmux@70000000 { | |
| 81 | + compatible = "nvidia,tegra20-pinmux"; | |
| 82 | + reg = < 0x70000014 0x10 /* Tri-state registers */ | |
| 83 | + 0x70000080 0x20 /* Mux registers */ | |
| 84 | + 0x700000a0 0x14 /* Pull-up/down registers */ | |
| 85 | + 0x70000868 0xa8 >; /* Pad control registers */ | |
| 86 | + }; | |
| 87 | + | |
| 80 | 88 | serial@70006000 { |
| 81 | 89 | compatible = "nvidia,tegra20-uart"; |
| 82 | 90 | reg = <0x70006000 0x40>; |
| @@ -0,0 +1,30 @@ | ||
| 1 | +/* | |
| 2 | + * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | |
| 5 | + * | |
| 6 | + * Licensed under GPLv2 or later. | |
| 7 | + */ | |
| 8 | +/dts-v1/; | |
| 9 | +/include/ "at91sam9g20.dtsi" | |
| 10 | + | |
| 11 | +/ { | |
| 12 | + model = "Calao USB A9G20"; | |
| 13 | + compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9"; | |
| 14 | + | |
| 15 | + chosen { | |
| 16 | + bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data) root=/dev/mtdblock5 rw rootfstype=ubifs"; | |
| 17 | + }; | |
| 18 | + | |
| 19 | + memory@20000000 { | |
| 20 | + reg = <0x20000000 0x4000000>; | |
| 21 | + }; | |
| 22 | + | |
| 23 | + ahb { | |
| 24 | + apb { | |
| 25 | + dbgu: serial@fffff200 { | |
| 26 | + status = "okay"; | |
| 27 | + }; | |
| 28 | + }; | |
| 29 | + }; | |
| 30 | +}; | |
| @@ -1,4 +1,5 @@ | ||
| 1 | 1 | config ARM_GIC |
| 2 | + select IRQ_DOMAIN | |
| 2 | 3 | bool |
| 3 | 4 | |
| 4 | 5 | config ARM_VIC |
| @@ -24,16 +24,26 @@ · 23 unmodified lines | ||
| 24 | 24 | */ |
| 25 | 25 | #include <linux/init.h> |
| 26 | 26 | #include <linux/kernel.h> |
| 27 | +#include <linux/err.h> | |
| 28 | +#include <linux/module.h> | |
| 27 | 29 | #include <linux/list.h> |
| 28 | 30 | #include <linux/smp.h> |
| 31 | +#include <linux/cpu_pm.h> | |
| 29 | 32 | #include <linux/cpumask.h> |
| 30 | 33 | #include <linux/io.h> |
| 34 | +#include <linux/of.h> | |
| 35 | +#include <linux/of_address.h> | |
| 36 | +#include <linux/of_irq.h> | |
| 37 | +#include <linux/irqdomain.h> | |
| 38 | +#include <linux/interrupt.h> | |
| 39 | +#include <linux/percpu.h> | |
| 40 | +#include <linux/slab.h> | |
| 31 | 41 | |
| 32 | 42 | #include <asm/irq.h> |
| 33 | 43 | #include <asm/mach/irq.h> |
| 34 | 44 | #include <asm/hardware/gic.h> |
| 35 | 45 | |
| 36 | −static DEFINE_SPINLOCK(irq_controller_lock); | |
| 46 | +static DEFINE_RAW_SPINLOCK(irq_controller_lock); | |
| 37 | 47 | |
| 38 | 48 | /* Address of GIC 0 CPU interface */ |
| 39 | 49 | void __iomem *gic_cpu_base_addr __read_mostly; |
| @@ -71,8 +81,7 @@ static inline void __iomem *gic_cpu_base(struct irq_data *d) · 31 unmodified lines | ||
| 71 | 81 | |
| 72 | 82 | static inline unsigned int gic_irq(struct irq_data *d) |
| 73 | 83 | { |
| 74 | − struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); | |
| 75 | − return d->irq - gic_data->irq_offset; | |
| 84 | + return d->hwirq; | |
| 76 | 85 | } |
| 77 | 86 | |
| 78 | 87 | /* |
| @@ -80,32 +89,32 @@ static inline unsigned int gic_irq(struct irq_data *d) · 1 unmodified line | ||
| 80 | 89 | */ |
| 81 | 90 | static void gic_mask_irq(struct irq_data *d) |
| 82 | 91 | { |
| 83 | − u32 mask = 1 << (d->irq % 32); | |
| 92 | + u32 mask = 1 << (gic_irq(d) % 32); | |
| 84 | 93 | |
| 85 | − spin_lock(&irq_controller_lock); | |
| 94 | + raw_spin_lock(&irq_controller_lock); | |
| 86 | 95 | writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4); |
| 87 | 96 | if (gic_arch_extn.irq_mask) |
| 88 | 97 | gic_arch_extn.irq_mask(d); |
| 89 | − spin_unlock(&irq_controller_lock); | |
| 98 | + raw_spin_unlock(&irq_controller_lock); | |
| 90 | 99 | } |
| 91 | 100 | |
| 92 | 101 | static void gic_unmask_irq(struct irq_data *d) |
| 93 | 102 | { |
| 94 | − u32 mask = 1 << (d->irq % 32); | |
| 103 | + u32 mask = 1 << (gic_irq(d) % 32); | |
| 95 | 104 | |
| 96 | − spin_lock(&irq_controller_lock); | |
| 105 | + raw_spin_lock(&irq_controller_lock); | |
| 97 | 106 | if (gic_arch_extn.irq_unmask) |
| 98 | 107 | gic_arch_extn.irq_unmask(d); |
| 99 | 108 | writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4); |
| 100 | − spin_unlock(&irq_controller_lock); | |
| 109 | + raw_spin_unlock(&irq_controller_lock); | |
| 101 | 110 | } |
| 102 | 111 | |
| 103 | 112 | static void gic_eoi_irq(struct irq_data *d) |
| 104 | 113 | { |
| 105 | 114 | if (gic_arch_extn.irq_eoi) { |
| 106 | − spin_lock(&irq_controller_lock); | |
| 115 | + raw_spin_lock(&irq_controller_lock); | |
| 107 | 116 | gic_arch_extn.irq_eoi(d); |
| 108 | − spin_unlock(&irq_controller_lock); | |
| 117 | + raw_spin_unlock(&irq_controller_lock); | |
| 109 | 118 | } |
| 110 | 119 | |
| 111 | 120 | writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); |
| @@ -129,7 +138,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type) · 17 unmodified lines | ||
| 129 | 138 | if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING) |
| 130 | 139 | return -EINVAL; |
| 131 | 140 | |
| 132 | − spin_lock(&irq_controller_lock); | |
| 141 | + raw_spin_lock(&irq_controller_lock); | |
| 133 | 142 | |
| 134 | 143 | if (gic_arch_extn.irq_set_type) |
| 135 | 144 | gic_arch_extn.irq_set_type(d, type); |
| @@ -154,7 +163,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type) · 18 unmodified lines | ||
| 154 | 163 | if (enabled) |
| 155 | 164 | writel_relaxed(enablemask, base + GIC_DIST_ENABLE_SET + enableoff); |
| 156 | 165 | |
| 157 | − spin_unlock(&irq_controller_lock); | |
| 166 | + raw_spin_unlock(&irq_controller_lock); | |
| 158 | 167 | |
| 159 | 168 | return 0; |
| 160 | 169 | } |
| @@ -172,7 +181,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, · 11 unmodified lines | ||
| 172 | 181 | bool force) |
| 173 | 182 | { |
| 174 | 183 | void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); |
| 175 | − unsigned int shift = (d->irq % 4) * 8; | |
| 184 | + unsigned int shift = (gic_irq(d) % 4) * 8; | |
| 176 | 185 | unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); |
| 177 | 186 | u32 val, mask, bit; |
| 178 | 187 | |
| @@ -182,10 +191,10 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, · 3 unmodified lines | ||
| 182 | 191 | mask = 0xff << shift; |
| 183 | 192 | bit = 1 << (cpu_logical_map(cpu) + shift); |
| 184 | 193 | |
| 185 | − spin_lock(&irq_controller_lock); | |
| 194 | + raw_spin_lock(&irq_controller_lock); | |
| 186 | 195 | val = readl_relaxed(reg) & ~mask; |
| 187 | 196 | writel_relaxed(val | bit, reg); |
| 188 | − spin_unlock(&irq_controller_lock); | |
| 197 | + raw_spin_unlock(&irq_controller_lock); | |
| 189 | 198 | |
| 190 | 199 | return IRQ_SET_MASK_OK; |
| 191 | 200 | } |
| @@ -215,15 +224,15 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) · 23 unmodified lines | ||
| 215 | 224 | |
| 216 | 225 | chained_irq_enter(chip, desc); |
| 217 | 226 | |
| 218 | − spin_lock(&irq_controller_lock); | |
| 227 | + raw_spin_lock(&irq_controller_lock); | |
| 219 | 228 | status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK); |
| 220 | − spin_unlock(&irq_controller_lock); | |
| 229 | + raw_spin_unlock(&irq_controller_lock); | |
| 221 | 230 | |
| 222 | 231 | gic_irq = (status & 0x3ff); |
| 223 | 232 | if (gic_irq == 1023) |
| 224 | 233 | goto out; |
| 225 | 234 | |
| 226 | − cascade_irq = gic_irq + chip_data->irq_offset; | |
| 235 | + cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq); | |
| 227 | 236 | if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS)) |
| 228 | 237 | do_bad_IRQ(cascade_irq, desc); |
| 229 | 238 | else |
| @@ -255,11 +264,12 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) · 25 unmodified lines | ||
| 255 | 264 | irq_set_chained_handler(irq, gic_handle_cascade_irq); |
| 256 | 265 | } |
| 257 | 266 | |
| 258 | −static void __init gic_dist_init(struct gic_chip_data *gic, | |
| 259 | − unsigned int irq_start) | |
| 267 | +static void __init gic_dist_init(struct gic_chip_data *gic) | |
| 260 | 268 | { |
| 261 | − unsigned int gic_irqs, irq_limit, i; | |
| 269 | + unsigned int i, irq; | |
| 262 | 270 | u32 cpumask; |
| 271 | + unsigned int gic_irqs = gic->gic_irqs; | |
| 272 | + struct irq_domain *domain = &gic->domain; | |
| 263 | 273 | void __iomem *base = gic->dist_base; |
| 264 | 274 | u32 cpu = 0; |
| 265 | 275 | |
| @@ -273,15 +283,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic, · 7 unmodified lines | ||
| 273 | 283 | |
| 274 | 284 | writel_relaxed(0, base + GIC_DIST_CTRL); |
| 275 | 285 | |
| 276 | − /* | |
| 277 | − * Find out how many interrupts are supported. | |
| 278 | − * The GIC only supports up to 1020 interrupt sources. | |
| 279 | − */ | |
| 280 | − gic_irqs = readl_relaxed(base + GIC_DIST_CTR) & 0x1f; | |
| 281 | − gic_irqs = (gic_irqs + 1) * 32; | |
| 282 | − if (gic_irqs > 1020) | |
| 283 | − gic_irqs = 1020; | |
| 284 | − | |
| 285 | 286 | /* |
| 286 | 287 | * Set all global interrupts to be level triggered, active low. |
| 287 | 288 | */ |
| @@ -307,20 +308,21 @@ static void __init gic_dist_init(struct gic_chip_data *gic, · 19 unmodified lines | ||
| 307 | 308 | for (i = 32; i < gic_irqs; i += 32) |
| 308 | 309 | writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); |
| 309 | 310 | |
| 310 | − /* | |
| 311 | − * Limit number of interrupts registered to the platform maximum | |
| 312 | − */ | |
| 313 | − irq_limit = gic->irq_offset + gic_irqs; | |
| 314 | − if (WARN_ON(irq_limit > NR_IRQS)) | |
| 315 | − irq_limit = NR_IRQS; | |
| 316 | − | |
| 317 | 311 | /* |
| 318 | 312 | * Setup the Linux IRQ subsystem. |
| 319 | 313 | */ |
| 320 | − for (i = irq_start; i < irq_limit; i++) { | |
| 321 | − irq_set_chip_and_handler(i, &gic_chip, handle_fasteoi_irq); | |
| 322 | − irq_set_chip_data(i, gic); | |
| 323 | − set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | |
| 314 | + irq_domain_for_each_irq(domain, i, irq) { | |
| 315 | + if (i < 32) { | |
| 316 | + irq_set_percpu_devid(irq); | |
| 317 | + irq_set_chip_and_handler(irq, &gic_chip, | |
| 318 | + handle_percpu_devid_irq); | |
| 319 | + set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); | |
| 320 | + } else { | |
| 321 | + irq_set_chip_and_handler(irq, &gic_chip, | |
| 322 | + handle_fasteoi_irq); | |
| 323 | + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
| 324 | + } | |
| 325 | + irq_set_chip_data(irq, gic); | |
| 324 | 326 | } |
| 325 | 327 | |
| 326 | 328 | writel_relaxed(1, base + GIC_DIST_CTRL); |
| @@ -349,23 +351,270 @@ static void __cpuinit gic_cpu_init(struct gic_chip_data *gic) · 22 unmodified lines | ||
| 349 | 351 | writel_relaxed(1, base + GIC_CPU_CTRL); |
| 350 | 352 | } |
| 351 | 353 | |
| 352 | −void __init gic_init(unsigned int gic_nr, unsigned int irq_start, | |
| 354 | +#ifdef CONFIG_CPU_PM | |
| 355 | +/* | |
| 356 | + * Saves the GIC distributor registers during suspend or idle. Must be called | |
| 357 | + * with interrupts disabled but before powering down the GIC. After calling | |
| 358 | + * this function, no interrupts will be delivered by the GIC, and another | |
| 359 | + * platform-specific wakeup source must be enabled. | |
| 360 | + */ | |
| 361 | +static void gic_dist_save(unsigned int gic_nr) | |
| 362 | +{ | |
| 363 | + unsigned int gic_irqs; | |
| 364 | + void __iomem *dist_base; | |
| 365 | + int i; | |
| 366 | + | |
| 367 | + if (gic_nr >= MAX_GIC_NR) | |
| 368 | + BUG(); | |
| 369 | + | |
| 370 | + gic_irqs = gic_data[gic_nr].gic_irqs; | |
| 371 | + dist_base = gic_data[gic_nr].dist_base; | |
| 372 | + | |
| 373 | + if (!dist_base) | |
| 374 | + return; | |
| 375 | + | |
| 376 | + for (i = 0; i < DIV_ROUND_UP(gic_irqs, 16); i++) | |
| 377 | + gic_data[gic_nr].saved_spi_conf[i] = | |
| 378 | + readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4); | |
| 379 | + | |
| 380 | + for (i = 0; i < DIV_ROUND_UP(gic_irqs, 4); i++) | |
| 381 | + gic_data[gic_nr].saved_spi_target[i] = | |
| 382 | + readl_relaxed(dist_base + GIC_DIST_TARGET + i * 4); | |
| 383 | + | |
| 384 | + for (i = 0; i < DIV_ROUND_UP(gic_irqs, 32); i++) | |
| 385 | + gic_data[gic_nr].saved_spi_enable[i] = | |
| 386 | + readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); | |
| 387 | +} | |
| 388 | + | |
| 389 | +/* | |
| 390 | + * Restores the GIC distributor registers during resume or when coming out of | |
| 391 | + * idle. Must be called before enabling interrupts. If a level interrupt | |
| 392 | + * that occured while the GIC was suspended is still present, it will be | |
| 393 | + * handled normally, but any edge interrupts that occured will not be seen by | |
| 394 | + * the GIC and need to be handled by the platform-specific wakeup source. | |
| 395 | + */ | |
| 396 | +static void gic_dist_restore(unsigned int gic_nr) | |
| 397 | +{ | |
| 398 | + unsigned int gic_irqs; | |
| 399 | + unsigned int i; | |
| 400 | + void __iomem *dist_base; | |
| 401 | + | |
| 402 | + if (gic_nr >= MAX_GIC_NR) | |
| 403 | + BUG(); | |
| 404 | + | |
| 405 | + gic_irqs = gic_data[gic_nr].gic_irqs; | |
| 406 | + dist_base = gic_data[gic_nr].dist_base; | |
| 407 | + | |
| 408 | + if (!dist_base) | |
| 409 | + return; | |
| 410 | + | |
| 411 | + writel_relaxed(0, dist_base + GIC_DIST_CTRL); | |
| 412 | + | |
| 413 | + for (i = 0; i < DIV_ROUND_UP(gic_irqs, 16); i++) | |
| 414 | + writel_relaxed(gic_data[gic_nr].saved_spi_conf[i], | |
| 415 | + dist_base + GIC_DIST_CONFIG + i * 4); | |
| 416 | + | |
| 417 | + for (i = 0; i < DIV_ROUND_UP(gic_irqs, 4); i++) | |
| 418 | + writel_relaxed(0xa0a0a0a0, | |
| 419 | + dist_base + GIC_DIST_PRI + i * 4); | |
| 420 | + | |
| 421 | + for (i = 0; i < DIV_ROUND_UP(gic_irqs, 4); i++) | |
| 422 | + writel_relaxed(gic_data[gic_nr].saved_spi_target[i], | |
| 423 | + dist_base + GIC_DIST_TARGET + i * 4); | |
| 424 | + | |
| 425 | + for (i = 0; i < DIV_ROUND_UP(gic_irqs, 32); i++) | |
| 426 | + writel_relaxed(gic_data[gic_nr].saved_spi_enable[i], | |
| 427 | + dist_base + GIC_DIST_ENABLE_SET + i * 4); | |
| 428 | + | |
| 429 | + writel_relaxed(1, dist_base + GIC_DIST_CTRL); | |
| 430 | +} | |
| 431 | + | |
| 432 | +static void gic_cpu_save(unsigned int gic_nr) | |
| 433 | +{ | |
| 434 | + int i; | |
| 435 | + u32 *ptr; | |
| 436 | + void __iomem *dist_base; | |
| 437 | + void __iomem *cpu_base; | |
| 438 | + | |
| 439 | + if (gic_nr >= MAX_GIC_NR) | |
| 440 | + BUG(); | |
| 441 | + | |
| 442 | + dist_base = gic_data[gic_nr].dist_base; | |
| 443 | + cpu_base = gic_data[gic_nr].cpu_base; | |
| 444 | + | |
| 445 | + if (!dist_base || !cpu_base) | |
| 446 | + return; | |
| 447 | + | |
| 448 | + ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable); | |
| 449 | + for (i = 0; i < DIV_ROUND_UP(32, 32); i++) | |
| 450 | + ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); | |
| 451 | + | |
| 452 | + ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf); | |
| 453 | + for (i = 0; i < DIV_ROUND_UP(32, 16); i++) | |
| 454 | + ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4); | |
| 455 | + | |
| 456 | +} | |
| 457 | + | |
| 458 | +static void gic_cpu_restore(unsigned int gic_nr) | |
| 459 | +{ | |
| 460 | + int i; | |
| 461 | + u32 *ptr; | |
| 462 | + void __iomem *dist_base; | |
| 463 | + void __iomem *cpu_base; | |
| 464 | + | |
| 465 | + if (gic_nr >= MAX_GIC_NR) | |
| 466 | + BUG(); | |
| 467 | + | |
| 468 | + dist_base = gic_data[gic_nr].dist_base; | |
| 469 | + cpu_base = gic_data[gic_nr].cpu_base; | |
| 470 | + | |
| 471 | + if (!dist_base || !cpu_base) | |
| 472 | + return; | |
| 473 | + | |
| 474 | + ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable); | |
| 475 | + for (i = 0; i < DIV_ROUND_UP(32, 32); i++) | |
| 476 | + writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4); | |
| 477 | + | |
| 478 | + ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf); | |
| 479 | + for (i = 0; i < DIV_ROUND_UP(32, 16); i++) | |
| 480 | + writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4); | |
| 481 | + | |
| 482 | + for (i = 0; i < DIV_ROUND_UP(32, 4); i++) | |
| 483 | + writel_relaxed(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4); | |
| 484 | + | |
| 485 | + writel_relaxed(0xf0, cpu_base + GIC_CPU_PRIMASK); | |
| 486 | + writel_relaxed(1, cpu_base + GIC_CPU_CTRL); | |
| 487 | +} | |
| 488 | + | |
| 489 | +static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v) | |
| 490 | +{ | |
| 491 | + int i; | |
| 492 | + | |
| 493 | + for (i = 0; i < MAX_GIC_NR; i++) { | |
| 494 | + switch (cmd) { | |
| 495 | + case CPU_PM_ENTER: | |
| 496 | + gic_cpu_save(i); | |
| 497 | + break; | |
| 498 | + case CPU_PM_ENTER_FAILED: | |
| 499 | + case CPU_PM_EXIT: | |
| 500 | + gic_cpu_restore(i); | |
| 501 | + break; | |
| 502 | + case CPU_CLUSTER_PM_ENTER: | |
| 503 | + gic_dist_save(i); | |
| 504 | + break; | |
| 505 | + case CPU_CLUSTER_PM_ENTER_FAILED: | |
| 506 | + case CPU_CLUSTER_PM_EXIT: | |
| 507 | + gic_dist_restore(i); | |
| 508 | + break; | |
| 509 | + } | |
| 510 | + } | |
| 511 | + | |
| 512 | + return NOTIFY_OK; | |
| 513 | +} | |
| 514 | + | |
| 515 | +static struct notifier_block gic_notifier_block = { | |
| 516 | + .notifier_call = gic_notifier, | |
| 517 | +}; | |
| 518 | + | |
| 519 | +static void __init gic_pm_init(struct gic_chip_data *gic) | |
| 520 | +{ | |
| 521 | + gic->saved_ppi_enable = __alloc_percpu(DIV_ROUND_UP(32, 32) * 4, | |
| 522 | + sizeof(u32)); | |
| 523 | + BUG_ON(!gic->saved_ppi_enable); | |
| 524 | + | |
| 525 | + gic->saved_ppi_conf = __alloc_percpu(DIV_ROUND_UP(32, 16) * 4, | |
| 526 | + sizeof(u32)); | |
| 527 | + BUG_ON(!gic->saved_ppi_conf); | |
| 528 | + | |
| 529 | + cpu_pm_register_notifier(&gic_notifier_block); | |
| 530 | +} | |
| 531 | +#else | |
| 532 | +static void __init gic_pm_init(struct gic_chip_data *gic) | |
| 533 | +{ | |
| 534 | +} | |
| 535 | +#endif | |
| 536 | + | |
| 537 | +#ifdef CONFIG_OF | |
| 538 | +static int gic_irq_domain_dt_translate(struct irq_domain *d, | |
| 539 | + struct device_node *controller, | |
| 540 | + const u32 *intspec, unsigned int intsize, | |
| 541 | + unsigned long *out_hwirq, unsigned int *out_type) | |
| 542 | +{ | |
| 543 | + if (d->of_node != controller) | |
| 544 | + return -EINVAL; | |
| 545 | + if (intsize < 3) | |
| 546 | + return -EINVAL; | |
| 547 | + | |
| 548 | + /* Get the interrupt number and add 16 to skip over SGIs */ | |
| 549 | + *out_hwirq = intspec[1] + 16; | |
| 550 | + | |
| 551 | + /* For SPIs, we need to add 16 more to get the GIC irq ID number */ | |
| 552 | + if (!intspec[0]) | |
| 553 | + *out_hwirq += 16; | |
| 554 | + | |
| 555 | + *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK; | |
| 556 | + return 0; | |
| 557 | +} | |
| 558 | +#endif | |
| 559 | + | |
| 560 | +const struct irq_domain_ops gic_irq_domain_ops = { | |
| 561 | +#ifdef CONFIG_OF | |
| 562 | + .dt_translate = gic_irq_domain_dt_translate, | |
| 563 | +#endif | |
| 564 | +}; | |
| 565 | + | |
| 566 | +void __init gic_init(unsigned int gic_nr, int irq_start, | |
| 353 | 567 | void __iomem *dist_base, void __iomem *cpu_base) |
| 354 | 568 | { |
| 355 | 569 | struct gic_chip_data *gic; |
| 570 | + struct irq_domain *domain; | |
| 571 | + int gic_irqs; | |
| 356 | 572 | |
| 357 | 573 | BUG_ON(gic_nr >= MAX_GIC_NR); |
| 358 | 574 | |
| 359 | 575 | gic = &gic_data[gic_nr]; |
| 576 | + domain = &gic->domain; | |
| 360 | 577 | gic->dist_base = dist_base; |
| 361 | 578 | gic->cpu_base = cpu_base; |
| 362 | − gic->irq_offset = (irq_start - 1) & ~31; | |
| 363 | 579 | |
| 364 | − if (gic_nr == 0) | |
| 580 | + /* | |
| 581 | + * For primary GICs, skip over SGIs. | |
| 582 | + * For secondary GICs, skip over PPIs, too. | |
| 583 | + */ | |
| 584 | + if (gic_nr == 0) { | |
| 365 | 585 | gic_cpu_base_addr = cpu_base; |
| 586 | + domain->hwirq_base = 16; | |
| 587 | + if (irq_start > 0) | |
| 588 | + irq_start = (irq_start & ~31) + 16; | |
| 589 | + } else | |
| 590 | + domain->hwirq_base = 32; | |
| 591 | + | |
| 592 | + /* | |
| 593 | + * Find out how many interrupts are supported. | |
| 594 | + * The GIC only supports up to 1020 interrupt sources. | |
| 595 | + */ | |
| 596 | + gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f; | |
| 597 | + gic_irqs = (gic_irqs + 1) * 32; | |
| 598 | + if (gic_irqs > 1020) | |
| 599 | + gic_irqs = 1020; | |
| 600 | + gic->gic_irqs = gic_irqs; | |
| 601 | + | |
| 602 | + domain->nr_irq = gic_irqs - domain->hwirq_base; | |
| 603 | + domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq, | |
| 604 | + numa_node_id()); | |
| 605 | + if (IS_ERR_VALUE(domain->irq_base)) { | |
| 606 | + WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", | |
| 607 | + irq_start); | |
| 608 | + domain->irq_base = irq_start; | |
| 609 | + } | |
| 610 | + domain->priv = gic; | |
| 611 | + domain->ops = &gic_irq_domain_ops; | |
| 612 | + irq_domain_add(domain); | |
| 366 | 613 | |
| 367 | − gic_dist_init(gic, irq_start); | |
| 614 | + gic_chip.flags |= gic_arch_extn.flags; | |
| 615 | + gic_dist_init(gic); | |
| 368 | 616 | gic_cpu_init(gic); |
| 617 | + gic_pm_init(gic); | |
| 369 | 618 | } |
| 370 | 619 | |
| 371 | 620 | void __cpuinit gic_secondary_init(unsigned int gic_nr) |
| @@ -375,16 +624,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr) · 3 unmodified lines | ||
| 375 | 624 | gic_cpu_init(&gic_data[gic_nr]); |
| 376 | 625 | } |
| 377 | 626 | |
| 378 | −void __cpuinit gic_enable_ppi(unsigned int irq) | |
| 379 | −{ | |
| 380 | − unsigned long flags; | |
| 381 | − | |
| 382 | − local_irq_save(flags); | |
| 383 | − irq_set_status_flags(irq, IRQ_NOPROBE); | |
| 384 | − gic_unmask_irq(irq_get_irq_data(irq)); | |
| 385 | − local_irq_restore(flags); | |
| 386 | −} | |
| 387 | − | |
| 388 | 627 | #ifdef CONFIG_SMP |
| 389 | 628 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) |
| 390 | 629 | { |
| @@ -405,3 +644,35 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) · 14 unmodified lines | ||
| 405 | 644 | writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); |
| 406 | 645 | } |
| 407 | 646 | #endif |
| 647 | + | |
| 648 | +#ifdef CONFIG_OF | |
| 649 | +static int gic_cnt __initdata = 0; | |
| 650 | + | |
| 651 | +int __init gic_of_init(struct device_node *node, struct device_node *parent) | |
| 652 | +{ | |
| 653 | + void __iomem *cpu_base; | |
| 654 | + void __iomem *dist_base; | |
| 655 | + int irq; | |
| 656 | + struct irq_domain *domain = &gic_data[gic_cnt].domain; | |
| 657 | + | |
| 658 | + if (WARN_ON(!node)) | |
| 659 | + return -ENODEV; | |
| 660 | + | |
| 661 | + dist_base = of_iomap(node, 0); | |
| 662 | + WARN(!dist_base, "unable to map gic dist registers\n"); | |
| 663 | + | |
| 664 | + cpu_base = of_iomap(node, 1); | |
| 665 | + WARN(!cpu_base, "unable to map gic cpu registers\n"); | |
| 666 | + | |
| 667 | + domain->of_node = of_node_get(node); | |
| 668 | + | |
| 669 | + gic_init(gic_cnt, -1, dist_base, cpu_base); | |
| 670 | + | |
| 671 | + if (parent) { | |
| 672 | + irq = irq_of_parse_and_map(node, 0); | |
| 673 | + gic_cascade_irq(gic_cnt, irq); | |
| 674 | + } | |
| 675 | + gic_cnt++; | |
| 676 | + return 0; | |
| 677 | +} | |
| 678 | +#endif | |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include <linux/ioport.h> |
| 26 | 26 | #include <linux/irq.h> |
| 27 | 27 | #include <linux/io.h> |
| 28 | +#include <linux/export.h> | |
| 28 | 29 | |
| 29 | 30 | #include <asm/mach/pci.h> |
| 30 | 31 | #include <asm/hardware/it8152.h> |
| @@ -718,6 +718,10 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) · 717 unmodified lines | ||
| 718 | 718 | goto err_free; |
| 719 | 719 | } |
| 720 | 720 | |
| 721 | + ret = clk_prepare(sachip->clk); | |
| 722 | + if (ret) | |
| 723 | + goto err_clkput; | |
| 724 | + | |
| 721 | 725 | spin_lock_init(&sachip->lock); |
| 722 | 726 | |
| 723 | 727 | sachip->dev = me; |
| @@ -733,7 +737,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) · 9 unmodified lines | ||
| 733 | 737 | sachip->base = ioremap(mem->start, PAGE_SIZE * 2); |
| 734 | 738 | if (!sachip->base) { |
| 735 | 739 | ret = -ENOMEM; |
| 736 | − goto err_clkput; | |
| 740 | + goto err_clk_unprep; | |
| 737 | 741 | } |
| 738 | 742 | |
| 739 | 743 | /* |
| @@ -809,6 +813,8 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) · 69 unmodified lines | ||
| 809 | 813 | |
| 810 | 814 | err_unmap: |
| 811 | 815 | iounmap(sachip->base); |
| 816 | + err_clk_unprep: | |
| 817 | + clk_unprepare(sachip->clk); | |
| 812 | 818 | err_clkput: |
| 813 | 819 | clk_put(sachip->clk); |
| 814 | 820 | err_free: |
| @@ -835,6 +841,7 @@ static void __sa1111_remove(struct sa1111 *sachip) · 20 unmodified lines | ||
| 835 | 841 | sa1111_writel(0, irqbase + SA1111_WAKEEN1); |
| 836 | 842 | |
| 837 | 843 | clk_disable(sachip->clk); |
| 844 | + clk_unprepare(sachip->clk); | |
| 838 | 845 | |
| 839 | 846 | if (sachip->irq != NO_IRQ) { |
| 840 | 847 | irq_set_chained_handler(sachip->irq, NULL); |
| @@ -12,11 +12,12 @@ · 11 unmodified lines | ||
| 12 | 12 | */ |
| 13 | 13 | |
| 14 | 14 | #include <linux/device.h> |
| 15 | +#include <linux/gpio.h> | |
| 15 | 16 | #include <linux/string.h> |
| 16 | 17 | #include <linux/slab.h> |
| 17 | 18 | #include <linux/platform_device.h> |
| 19 | +#include <linux/export.h> | |
| 18 | 20 | #include <linux/io.h> |
| 19 | −#include <asm/gpio.h> | |
| 20 | 21 | #include <asm/hardware/scoop.h> |
| 21 | 22 | |
| 22 | 23 | /* PCMCIA to Scoop linkage |
| @@ -41,9 +41,17 @@ static long __init sp804_get_clock_rate(const char *name) · 40 unmodified lines | ||
| 41 | 41 | return PTR_ERR(clk); |
| 42 | 42 | } |
| 43 | 43 | |
| 44 | + err = clk_prepare(clk); | |
| 45 | + if (err) { | |
| 46 | + pr_err("sp804: %s clock failed to prepare: %d\n", name, err); | |
| 47 | + clk_put(clk); | |
| 48 | + return err; | |
| 49 | + } | |
| 50 | + | |
| 44 | 51 | err = clk_enable(clk); |
| 45 | 52 | if (err) { |
| 46 | 53 | pr_err("sp804: %s clock failed to enable: %d\n", name, err); |
| 54 | + clk_unprepare(clk); | |
| 47 | 55 | clk_put(clk); |
| 48 | 56 | return err; |
| 49 | 57 | } |
| @@ -52,6 +60,7 @@ static long __init sp804_get_clock_rate(const char *name) · 2 unmodified lines | ||
| 52 | 60 | if (rate < 0) { |
| 53 | 61 | pr_err("sp804: %s clock failed to get rate: %ld\n", name, rate); |
| 54 | 62 | clk_disable(clk); |
| 63 | + clk_unprepare(clk); | |
| 55 | 64 | clk_put(clk); |
| 56 | 65 | } |
| 57 | 66 | |
| @@ -0,0 +1,214 @@ | ||
| 1 | +CONFIG_EXPERIMENTAL=y | |
| 2 | +# CONFIG_LOCALVERSION_AUTO is not set | |
| 3 | +# CONFIG_SWAP is not set | |
| 4 | +CONFIG_SYSVIPC=y | |
| 5 | +CONFIG_LOG_BUF_SHIFT=14 | |
| 6 | +CONFIG_SYSFS_DEPRECATED=y | |
| 7 | +CONFIG_SYSFS_DEPRECATED_V2=y | |
| 8 | +CONFIG_BLK_DEV_INITRD=y | |
| 9 | +CONFIG_CC_OPTIMIZE_FOR_SIZE=y | |
| 10 | +CONFIG_EMBEDDED=y | |
| 11 | +CONFIG_SLAB=y | |
| 12 | +CONFIG_MODULES=y | |
| 13 | +CONFIG_MODULE_UNLOAD=y | |
| 14 | +# CONFIG_LBDAF is not set | |
| 15 | +# CONFIG_BLK_DEV_BSG is not set | |
| 16 | +# CONFIG_IOSCHED_DEADLINE is not set | |
| 17 | +# CONFIG_IOSCHED_CFQ is not set | |
| 18 | +CONFIG_ARCH_AT91=y | |
| 19 | +CONFIG_ARCH_AT91SAM9G45=y | |
| 20 | +CONFIG_MACH_AT91SAM9M10G45EK=y | |
| 21 | +CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | |
| 22 | +CONFIG_AT91_SLOW_CLOCK=y | |
| 23 | +CONFIG_AEABI=y | |
| 24 | +# CONFIG_OABI_COMPAT is not set | |
| 25 | +CONFIG_LEDS=y | |
| 26 | +CONFIG_LEDS_CPU=y | |
| 27 | +CONFIG_UACCESS_WITH_MEMCPY=y | |
| 28 | +CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 29 | +CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 30 | +CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x71100000,25165824 root=/dev/ram0 rw" | |
| 31 | +CONFIG_AUTO_ZRELADDR=y | |
| 32 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 33 | +CONFIG_NET=y | |
| 34 | +CONFIG_PACKET=y | |
| 35 | +CONFIG_UNIX=y | |
| 36 | +CONFIG_INET=y | |
| 37 | +CONFIG_IP_MULTICAST=y | |
| 38 | +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| 39 | +# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| 40 | +# CONFIG_INET_XFRM_MODE_BEET is not set | |
| 41 | +# CONFIG_INET_DIAG is not set | |
| 42 | +CONFIG_IPV6=y | |
| 43 | +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set | |
| 44 | +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set | |
| 45 | +# CONFIG_INET6_XFRM_MODE_BEET is not set | |
| 46 | +CONFIG_IPV6_SIT_6RD=y | |
| 47 | +CONFIG_CFG80211=y | |
| 48 | +CONFIG_LIB80211=y | |
| 49 | +CONFIG_MAC80211=y | |
| 50 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 51 | +CONFIG_DEVTMPFS=y | |
| 52 | +CONFIG_DEVTMPFS_MOUNT=y | |
| 53 | +# CONFIG_STANDALONE is not set | |
| 54 | +# CONFIG_PREVENT_FIRMWARE_BUILD is not set | |
| 55 | +CONFIG_MTD=y | |
| 56 | +CONFIG_MTD_CMDLINE_PARTS=y | |
| 57 | +CONFIG_MTD_CHAR=y | |
| 58 | +CONFIG_MTD_BLOCK=y | |
| 59 | +CONFIG_MTD_DATAFLASH=y | |
| 60 | +CONFIG_MTD_NAND=y | |
| 61 | +CONFIG_MTD_NAND_ATMEL=y | |
| 62 | +CONFIG_MTD_UBI=y | |
| 63 | +CONFIG_BLK_DEV_LOOP=y | |
| 64 | +CONFIG_BLK_DEV_RAM=y | |
| 65 | +CONFIG_BLK_DEV_RAM_COUNT=4 | |
| 66 | +CONFIG_BLK_DEV_RAM_SIZE=8192 | |
| 67 | +CONFIG_MISC_DEVICES=y | |
| 68 | +CONFIG_ATMEL_PWM=y | |
| 69 | +CONFIG_ATMEL_TCLIB=y | |
| 70 | +CONFIG_SCSI=y | |
| 71 | +CONFIG_BLK_DEV_SD=y | |
| 72 | +CONFIG_SCSI_MULTI_LUN=y | |
| 73 | +# CONFIG_SCSI_LOWLEVEL is not set | |
| 74 | +CONFIG_NETDEVICES=y | |
| 75 | +CONFIG_MII=y | |
| 76 | +CONFIG_DAVICOM_PHY=y | |
| 77 | +CONFIG_NET_ETHERNET=y | |
| 78 | +CONFIG_MACB=y | |
| 79 | +# CONFIG_NETDEV_1000 is not set | |
| 80 | +# CONFIG_NETDEV_10000 is not set | |
| 81 | +CONFIG_LIBERTAS_THINFIRM=m | |
| 82 | +CONFIG_LIBERTAS_THINFIRM_USB=m | |
| 83 | +CONFIG_AT76C50X_USB=m | |
| 84 | +CONFIG_USB_ZD1201=m | |
| 85 | +CONFIG_RTL8187=m | |
| 86 | +CONFIG_ATH_COMMON=m | |
| 87 | +CONFIG_ATH9K=m | |
| 88 | +CONFIG_CARL9170=m | |
| 89 | +CONFIG_B43=m | |
| 90 | +CONFIG_B43_PHY_N=y | |
| 91 | +CONFIG_LIBERTAS=m | |
| 92 | +CONFIG_LIBERTAS_USB=m | |
| 93 | +CONFIG_LIBERTAS_SDIO=m | |
| 94 | +CONFIG_LIBERTAS_SPI=m | |
| 95 | +CONFIG_RT2X00=m | |
| 96 | +CONFIG_RT2500USB=m | |
| 97 | +CONFIG_RT73USB=m | |
| 98 | +CONFIG_RT2800USB=m | |
| 99 | +CONFIG_RT2800USB_RT53XX=y | |
| 100 | +CONFIG_RT2800USB_UNKNOWN=y | |
| 101 | +CONFIG_RTL8192CU=m | |
| 102 | +CONFIG_WL1251=m | |
| 103 | +CONFIG_WL1251_SDIO=m | |
| 104 | +CONFIG_WL12XX_MENU=m | |
| 105 | +CONFIG_WL12XX=m | |
| 106 | +CONFIG_WL12XX_SDIO=m | |
| 107 | +CONFIG_ZD1211RW=m | |
| 108 | +CONFIG_MWIFIEX=m | |
| 109 | +CONFIG_MWIFIEX_SDIO=m | |
| 110 | +CONFIG_INPUT_POLLDEV=m | |
| 111 | +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set | |
| 112 | +CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 | |
| 113 | +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272 | |
| 114 | +CONFIG_INPUT_JOYDEV=y | |
| 115 | +CONFIG_INPUT_EVDEV=y | |
| 116 | +# CONFIG_KEYBOARD_ATKBD is not set | |
| 117 | +CONFIG_KEYBOARD_QT1070=m | |
| 118 | +CONFIG_KEYBOARD_QT2160=m | |
| 119 | +CONFIG_KEYBOARD_GPIO=y | |
| 120 | +# CONFIG_INPUT_MOUSE is not set | |
| 121 | +CONFIG_INPUT_TOUCHSCREEN=y | |
| 122 | +CONFIG_TOUCHSCREEN_ATMEL_MXT=m | |
| 123 | +CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y | |
| 124 | +# CONFIG_SERIO is not set | |
| 125 | +CONFIG_LEGACY_PTY_COUNT=4 | |
| 126 | +CONFIG_SERIAL_ATMEL=y | |
| 127 | +CONFIG_SERIAL_ATMEL_CONSOLE=y | |
| 128 | +CONFIG_HW_RANDOM=y | |
| 129 | +CONFIG_I2C=y | |
| 130 | +CONFIG_I2C_GPIO=y | |
| 131 | +CONFIG_SPI=y | |
| 132 | +CONFIG_SPI_ATMEL=y | |
| 133 | +# CONFIG_HWMON is not set | |
| 134 | +# CONFIG_MFD_SUPPORT is not set | |
| 135 | +CONFIG_FB=y | |
| 136 | +CONFIG_FB_ATMEL=y | |
| 137 | +CONFIG_FB_UDL=m | |
| 138 | +CONFIG_BACKLIGHT_LCD_SUPPORT=y | |
| 139 | +# CONFIG_LCD_CLASS_DEVICE is not set | |
| 140 | +CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| 141 | +CONFIG_BACKLIGHT_ATMEL_LCDC=y | |
| 142 | +# CONFIG_BACKLIGHT_GENERIC is not set | |
| 143 | +CONFIG_SOUND=y | |
| 144 | +CONFIG_SND=y | |
| 145 | +CONFIG_SND_SEQUENCER=y | |
| 146 | +CONFIG_SND_MIXER_OSS=y | |
| 147 | +CONFIG_SND_PCM_OSS=y | |
| 148 | +# CONFIG_SND_SUPPORT_OLD_API is not set | |
| 149 | +# CONFIG_SND_VERBOSE_PROCFS is not set | |
| 150 | +# CONFIG_SND_DRIVERS is not set | |
| 151 | +# CONFIG_SND_ARM is not set | |
| 152 | +CONFIG_SND_ATMEL_AC97C=y | |
| 153 | +# CONFIG_SND_SPI is not set | |
| 154 | +CONFIG_SND_USB_AUDIO=m | |
| 155 | +# CONFIG_USB_HID is not set | |
| 156 | +CONFIG_USB=y | |
| 157 | +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | |
| 158 | +CONFIG_USB_DEVICEFS=y | |
| 159 | +# CONFIG_USB_DEVICE_CLASS is not set | |
| 160 | +CONFIG_USB_EHCI_HCD=y | |
| 161 | +CONFIG_USB_OHCI_HCD=y | |
| 162 | +CONFIG_USB_ACM=y | |
| 163 | +CONFIG_USB_STORAGE=y | |
| 164 | +CONFIG_USB_GADGET=y | |
| 165 | +CONFIG_USB_ATMEL_USBA=m | |
| 166 | +CONFIG_USB_ZERO=m | |
| 167 | +CONFIG_USB_AUDIO=m | |
| 168 | +CONFIG_USB_ETH=m | |
| 169 | +CONFIG_USB_ETH_EEM=y | |
| 170 | +CONFIG_USB_MASS_STORAGE=m | |
| 171 | +CONFIG_USB_G_SERIAL=m | |
| 172 | +CONFIG_USB_CDC_COMPOSITE=m | |
| 173 | +CONFIG_USB_G_MULTI=m | |
| 174 | +CONFIG_USB_G_MULTI_CDC=y | |
| 175 | +CONFIG_MMC=y | |
| 176 | +# CONFIG_MMC_BLOCK_BOUNCE is not set | |
| 177 | +CONFIG_SDIO_UART=m | |
| 178 | +CONFIG_MMC_ATMELMCI=y | |
| 179 | +CONFIG_MMC_ATMELMCI_DMA=y | |
| 180 | +CONFIG_LEDS_ATMEL_PWM=y | |
| 181 | +CONFIG_LEDS_GPIO=y | |
| 182 | +CONFIG_LEDS_TRIGGER_TIMER=y | |
| 183 | +CONFIG_LEDS_TRIGGER_HEARTBEAT=y | |
| 184 | +CONFIG_LEDS_TRIGGER_GPIO=y | |
| 185 | +CONFIG_RTC_CLASS=y | |
| 186 | +CONFIG_RTC_DRV_AT91RM9200=y | |
| 187 | +CONFIG_DMADEVICES=y | |
| 188 | +CONFIG_AT_HDMAC=y | |
| 189 | +CONFIG_DMATEST=m | |
| 190 | +# CONFIG_IOMMU_SUPPORT is not set | |
| 191 | +CONFIG_EXT2_FS=y | |
| 192 | +CONFIG_FANOTIFY=y | |
| 193 | +CONFIG_VFAT_FS=y | |
| 194 | +CONFIG_TMPFS=y | |
| 195 | +CONFIG_JFFS2_FS=y | |
| 196 | +CONFIG_JFFS2_SUMMARY=y | |
| 197 | +CONFIG_CRAMFS=m | |
| 198 | +CONFIG_SQUASHFS=m | |
| 199 | +CONFIG_SQUASHFS_EMBEDDED=y | |
| 200 | +CONFIG_NFS_FS=y | |
| 201 | +CONFIG_NFS_V3=y | |
| 202 | +CONFIG_NLS_CODEPAGE_437=y | |
| 203 | +CONFIG_NLS_CODEPAGE_850=y | |
| 204 | +CONFIG_NLS_ISO8859_1=y | |
| 205 | +CONFIG_STRIP_ASM_SYMS=y | |
| 206 | +# CONFIG_SCHED_DEBUG is not set | |
| 207 | +CONFIG_DEBUG_MEMORY_INIT=y | |
| 208 | +# CONFIG_FTRACE is not set | |
| 209 | +CONFIG_DEBUG_USER=y | |
| 210 | +CONFIG_CRYPTO_ECB=y | |
| 211 | +# CONFIG_CRYPTO_ANSI_CPRNG is not set | |
| 212 | +CONFIG_CRYPTO_USER_API_HASH=m | |
| 213 | +CONFIG_CRYPTO_USER_API_SKCIPHER=m | |
| 214 | +# CONFIG_CRYPTO_HW is not set | |
| @@ -4,18 +4,18 @@ CONFIG_KALLSYMS_ALL=y · 3 unmodified lines | ||
| 4 | 4 | CONFIG_MODULES=y |
| 5 | 5 | CONFIG_MODULE_UNLOAD=y |
| 6 | 6 | # CONFIG_BLK_DEV_BSG is not set |
| 7 | −CONFIG_ARCH_EXYNOS4=y | |
| 7 | +CONFIG_ARCH_EXYNOS=y | |
| 8 | 8 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 |
| 9 | 9 | CONFIG_MACH_SMDKC210=y |
| 10 | −CONFIG_MACH_SMDKV310=y | |
| 11 | 10 | CONFIG_MACH_ARMLEX4210=y |
| 12 | 11 | CONFIG_MACH_UNIVERSAL_C210=y |
| 13 | 12 | CONFIG_MACH_NURI=y |
| 13 | +CONFIG_MACH_ORIGEN=y | |
| 14 | +CONFIG_MACH_SMDK4412=y | |
| 14 | 15 | CONFIG_NO_HZ=y |
| 15 | 16 | CONFIG_HIGH_RES_TIMERS=y |
| 16 | 17 | CONFIG_SMP=y |
| 17 | 18 | CONFIG_NR_CPUS=2 |
| 18 | −CONFIG_HOTPLUG_CPU=y | |
| 19 | 19 | CONFIG_PREEMPT=y |
| 20 | 20 | CONFIG_AEABI=y |
| 21 | 21 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M" |
| @@ -60,13 +60,9 @@ CONFIG_DETECT_HUNG_TASK=y · 38 unmodified lines | ||
| 60 | 60 | CONFIG_DEBUG_RT_MUTEXES=y |
| 61 | 61 | CONFIG_DEBUG_SPINLOCK=y |
| 62 | 62 | CONFIG_DEBUG_MUTEXES=y |
| 63 | −CONFIG_DEBUG_SPINLOCK_SLEEP=y | |
| 64 | 63 | CONFIG_DEBUG_INFO=y |
| 65 | −# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 66 | 64 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 67 | 65 | CONFIG_DEBUG_USER=y |
| 68 | −CONFIG_DEBUG_ERRORS=y | |
| 69 | 66 | CONFIG_DEBUG_LL=y |
| 70 | 67 | CONFIG_EARLY_PRINTK=y |
| 71 | −CONFIG_DEBUG_S3C_UART=1 | |
| 72 | 68 | CONFIG_CRC_CCITT=y |
| @@ -3,9 +3,7 @@ CONFIG_EXPERIMENTAL=y · 2 unmodified lines | ||
| 3 | 3 | CONFIG_SYSVIPC=y |
| 4 | 4 | CONFIG_POSIX_MQUEUE=y |
| 5 | 5 | CONFIG_LOG_BUF_SHIFT=14 |
| 6 | −# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | |
| 7 | 6 | CONFIG_EXPERT=y |
| 8 | −CONFIG_KALLSYMS_EXTRA_PASS=y | |
| 9 | 7 | # CONFIG_COMPAT_BRK is not set |
| 10 | 8 | CONFIG_SLAB=y |
| 11 | 9 | CONFIG_PROFILING=y |
| @@ -17,8 +15,12 @@ CONFIG_MODULE_UNLOAD=y · 5 unmodified lines | ||
| 17 | 15 | # CONFIG_IOSCHED_DEADLINE is not set |
| 18 | 16 | # CONFIG_IOSCHED_CFQ is not set |
| 19 | 17 | CONFIG_ARCH_MXC=y |
| 20 | −CONFIG_ARCH_MX2=y | |
| 21 | −CONFIG_MACH_MX27=y | |
| 18 | +CONFIG_ARCH_IMX_V4_V5=y | |
| 19 | +CONFIG_ARCH_MX1ADS=y | |
| 20 | +CONFIG_MACH_SCB9328=y | |
| 21 | +CONFIG_MACH_MX21ADS=y | |
| 22 | +CONFIG_MACH_MX25_3DS=y | |
| 23 | +CONFIG_MACH_EUKREA_CPUIMX25=y | |
| 22 | 24 | CONFIG_MACH_MX27ADS=y |
| 23 | 25 | CONFIG_MACH_PCM038=y |
| 24 | 26 | CONFIG_MACH_CPUIMX27=y |
| @@ -29,6 +31,7 @@ CONFIG_MACH_IMX27_VISSTRIM_M10=y · 4 unmodified lines | ||
| 29 | 31 | CONFIG_MACH_IMX27LITE=y |
| 30 | 32 | CONFIG_MACH_PCA100=y |
| 31 | 33 | CONFIG_MACH_MXT_TD60=y |
| 34 | +CONFIG_MACH_IMX27IPCAM=y | |
| 32 | 35 | CONFIG_MXC_IRQ_PRIOR=y |
| 33 | 36 | CONFIG_MXC_PWM=y |
| 34 | 37 | CONFIG_NO_HZ=y |
| @@ -39,7 +42,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 · 4 unmodified lines | ||
| 39 | 42 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 40 | 43 | CONFIG_FPE_NWFPE=y |
| 41 | 44 | CONFIG_FPE_NWFPE_XP=y |
| 42 | −CONFIG_PM=y | |
| 43 | 45 | CONFIG_PM_DEBUG=y |
| 44 | 46 | CONFIG_NET=y |
| 45 | 47 | CONFIG_PACKET=y |
| @@ -55,8 +57,9 @@ CONFIG_IP_PNP_DHCP=y · 9 unmodified lines | ||
| 55 | 57 | # CONFIG_INET_DIAG is not set |
| 56 | 58 | # CONFIG_IPV6 is not set |
| 57 | 59 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 60 | +CONFIG_DEVTMPFS=y | |
| 61 | +CONFIG_DEVTMPFS_MOUNT=y | |
| 58 | 62 | CONFIG_MTD=y |
| 59 | −CONFIG_MTD_PARTITIONS=y | |
| 60 | 63 | CONFIG_MTD_CMDLINE_PARTS=y |
| 61 | 64 | CONFIG_MTD_CHAR=y |
| 62 | 65 | CONFIG_MTD_BLOCK=y |
| @@ -69,12 +72,15 @@ CONFIG_MTD_CFI_GEOMETRY=y · 6 unmodified lines | ||
| 69 | 72 | CONFIG_MTD_CFI_INTELEXT=y |
| 70 | 73 | CONFIG_MTD_PHYSMAP=y |
| 71 | 74 | CONFIG_MTD_NAND=y |
| 72 | −CONFIG_MTD_NAND_MXC=y | |
| 73 | 75 | CONFIG_MTD_UBI=y |
| 76 | +CONFIG_MISC_DEVICES=y | |
| 74 | 77 | CONFIG_EEPROM_AT24=y |
| 78 | +CONFIG_EEPROM_AT25=y | |
| 75 | 79 | CONFIG_NETDEVICES=y |
| 76 | 80 | CONFIG_NET_ETHERNET=y |
| 77 | −CONFIG_FEC=y | |
| 81 | +CONFIG_SMC91X=y | |
| 82 | +CONFIG_DM9000=y | |
| 83 | +CONFIG_SMC911X=y | |
| 78 | 84 | # CONFIG_NETDEV_1000 is not set |
| 79 | 85 | # CONFIG_NETDEV_10000 is not set |
| 80 | 86 | # CONFIG_INPUT_MOUSEDEV is not set |
| @@ -84,10 +90,10 @@ CONFIG_INPUT_EVDEV=y · 3 unmodified lines | ||
| 84 | 90 | CONFIG_INPUT_TOUCHSCREEN=y |
| 85 | 91 | CONFIG_TOUCHSCREEN_ADS7846=m |
| 86 | 92 | # CONFIG_SERIO is not set |
| 93 | +# CONFIG_LEGACY_PTYS is not set | |
| 87 | 94 | CONFIG_SERIAL_8250=m |
| 88 | 95 | CONFIG_SERIAL_IMX=y |
| 89 | 96 | CONFIG_SERIAL_IMX_CONSOLE=y |
| 90 | −# CONFIG_LEGACY_PTYS is not set | |
| 91 | 97 | # CONFIG_HW_RANDOM is not set |
| 92 | 98 | CONFIG_I2C=y |
| 93 | 99 | CONFIG_I2C_CHARDEV=y |
| @@ -98,19 +104,56 @@ CONFIG_W1=y · 4 unmodified lines | ||
| 98 | 104 | CONFIG_W1_MASTER_MXC=y |
| 99 | 105 | CONFIG_W1_SLAVE_THERM=y |
| 100 | 106 | # CONFIG_HWMON is not set |
| 107 | +CONFIG_WATCHDOG=y | |
| 108 | +CONFIG_IMX2_WDT=y | |
| 109 | +CONFIG_MFD_MC13XXX=y | |
| 110 | +CONFIG_REGULATOR=y | |
| 111 | +CONFIG_REGULATOR_MC13783=y | |
| 112 | +CONFIG_REGULATOR_MC13892=y | |
| 101 | 113 | CONFIG_FB=y |
| 102 | 114 | CONFIG_FB_IMX=y |
| 115 | +CONFIG_BACKLIGHT_LCD_SUPPORT=y | |
| 116 | +CONFIG_LCD_CLASS_DEVICE=y | |
| 117 | +CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| 118 | +CONFIG_BACKLIGHT_PWM=y | |
| 103 | 119 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 104 | 120 | CONFIG_FONTS=y |
| 105 | 121 | CONFIG_FONT_8x8=y |
| 106 | −# CONFIG_HID_SUPPORT is not set | |
| 107 | −CONFIG_USB=m | |
| 122 | +CONFIG_LOGO=y | |
| 123 | +CONFIG_SOUND=y | |
| 124 | +CONFIG_SND=y | |
| 125 | +# CONFIG_SND_ARM is not set | |
| 126 | +# CONFIG_SND_SPI is not set | |
| 127 | +CONFIG_SND_SOC=y | |
| 128 | +CONFIG_SND_IMX_SOC=y | |
| 129 | +CONFIG_SND_SOC_MX27VIS_AIC32X4=y | |
| 130 | +CONFIG_SND_SOC_PHYCORE_AC97=y | |
| 131 | +CONFIG_SND_SOC_EUKREA_TLV320=y | |
| 132 | +CONFIG_USB_HID=m | |
| 133 | +CONFIG_USB=y | |
| 108 | 134 | # CONFIG_USB_DEVICE_CLASS is not set |
| 135 | +CONFIG_USB_EHCI_HCD=y | |
| 136 | +CONFIG_USB_EHCI_MXC=y | |
| 109 | 137 | CONFIG_USB_ULPI=y |
| 110 | 138 | CONFIG_MMC=y |
| 111 | 139 | CONFIG_MMC_MXC=y |
| 140 | +CONFIG_NEW_LEDS=y | |
| 141 | +CONFIG_LEDS_CLASS=y | |
| 142 | +CONFIG_LEDS_MC13783=y | |
| 143 | +CONFIG_LEDS_TRIGGERS=y | |
| 144 | +CONFIG_LEDS_TRIGGER_TIMER=y | |
| 145 | +CONFIG_LEDS_TRIGGER_HEARTBEAT=y | |
| 146 | +CONFIG_LEDS_TRIGGER_BACKLIGHT=y | |
| 147 | +CONFIG_LEDS_TRIGGER_GPIO=y | |
| 148 | +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | |
| 112 | 149 | CONFIG_RTC_CLASS=y |
| 113 | 150 | CONFIG_RTC_DRV_PCF8563=y |
| 151 | +CONFIG_RTC_DRV_IMXDI=y | |
| 152 | +CONFIG_RTC_MXC=y | |
| 153 | +CONFIG_DMADEVICES=y | |
| 154 | +CONFIG_IMX_SDMA=y | |
| 155 | +CONFIG_IMX_DMA=y | |
| 156 | +# CONFIG_IOMMU_SUPPORT is not set | |
| 114 | 157 | # CONFIG_DNOTIFY is not set |
| 115 | 158 | # CONFIG_PROC_PAGE_MONITOR is not set |
| 116 | 159 | CONFIG_TMPFS=y |
| @@ -119,12 +162,9 @@ CONFIG_UBIFS_FS=y · 2 unmodified lines | ||
| 119 | 162 | CONFIG_NFS_FS=y |
| 120 | 163 | CONFIG_NFS_V3=y |
| 121 | 164 | CONFIG_ROOT_NFS=y |
| 122 | −CONFIG_NLS=y | |
| 123 | 165 | CONFIG_NLS_CODEPAGE_437=m |
| 124 | 166 | CONFIG_NLS_CODEPAGE_850=m |
| 125 | 167 | CONFIG_NLS_ISO8859_1=y |
| 126 | 168 | CONFIG_NLS_ISO8859_15=m |
| 127 | −CONFIG_DEBUG_FS=y | |
| 128 | −# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 129 | 169 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 130 | 170 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
| @@ -1,91 +0,0 @@ | ||
| 1 | −CONFIG_EXPERIMENTAL=y | |
| 2 | −CONFIG_SYSVIPC=y | |
| 3 | −CONFIG_IKCONFIG=y | |
| 4 | −CONFIG_IKCONFIG_PROC=y | |
| 5 | −CONFIG_LOG_BUF_SHIFT=14 | |
| 6 | −CONFIG_SYSFS_DEPRECATED_V2=y | |
| 7 | −CONFIG_EXPERT=y | |
| 8 | −CONFIG_SLAB=y | |
| 9 | −CONFIG_MODULES=y | |
| 10 | −CONFIG_MODULE_UNLOAD=y | |
| 11 | −CONFIG_MODULE_FORCE_UNLOAD=y | |
| 12 | −CONFIG_MODVERSIONS=y | |
| 13 | −# CONFIG_BLK_DEV_BSG is not set | |
| 14 | −CONFIG_ARCH_MXC=y | |
| 15 | −CONFIG_ARCH_MX1=y | |
| 16 | −CONFIG_ARCH_MX1ADS=y | |
| 17 | −CONFIG_MACH_SCB9328=y | |
| 18 | −CONFIG_MACH_APF9328=y | |
| 19 | −CONFIG_MXC_IRQ_PRIOR=y | |
| 20 | −CONFIG_NO_HZ=y | |
| 21 | −CONFIG_HIGH_RES_TIMERS=y | |
| 22 | −CONFIG_PREEMPT=y | |
| 23 | −CONFIG_AEABI=y | |
| 24 | −CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 25 | −CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 26 | −CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off" | |
| 27 | −CONFIG_PM=y | |
| 28 | −CONFIG_PM_DEBUG=y | |
| 29 | −CONFIG_NET=y | |
| 30 | −CONFIG_PACKET=y | |
| 31 | −CONFIG_UNIX=y | |
| 32 | −CONFIG_INET=y | |
| 33 | −CONFIG_IP_PNP=y | |
| 34 | −CONFIG_IP_PNP_DHCP=y | |
| 35 | −# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| 36 | −# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| 37 | −# CONFIG_INET_XFRM_MODE_BEET is not set | |
| 38 | −# CONFIG_INET_LRO is not set | |
| 39 | −# CONFIG_INET_DIAG is not set | |
| 40 | −# CONFIG_IPV6 is not set | |
| 41 | −CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 42 | −CONFIG_FW_LOADER=m | |
| 43 | −CONFIG_MTD=y | |
| 44 | −CONFIG_MTD_PARTITIONS=y | |
| 45 | −CONFIG_MTD_CMDLINE_PARTS=y | |
| 46 | −CONFIG_MTD_CHAR=y | |
| 47 | −CONFIG_MTD_BLOCK=y | |
| 48 | −CONFIG_MTD_CFI=y | |
| 49 | −CONFIG_MTD_PHYSMAP=y | |
| 50 | −# CONFIG_BLK_DEV is not set | |
| 51 | −# CONFIG_MISC_DEVICES is not set | |
| 52 | −CONFIG_NETDEVICES=y | |
| 53 | −CONFIG_PHYLIB=y | |
| 54 | −CONFIG_SMSC_PHY=y | |
| 55 | −CONFIG_NET_ETHERNET=y | |
| 56 | −CONFIG_DM9000=y | |
| 57 | −# CONFIG_NETDEV_1000 is not set | |
| 58 | −# CONFIG_NETDEV_10000 is not set | |
| 59 | −# CONFIG_INPUT is not set | |
| 60 | −# CONFIG_SERIO is not set | |
| 61 | −# CONFIG_VT is not set | |
| 62 | −CONFIG_SERIAL_IMX=y | |
| 63 | −CONFIG_SERIAL_IMX_CONSOLE=y | |
| 64 | −# CONFIG_LEGACY_PTYS is not set | |
| 65 | −# CONFIG_HW_RANDOM is not set | |
| 66 | −CONFIG_I2C=y | |
| 67 | −CONFIG_I2C_CHARDEV=y | |
| 68 | −CONFIG_I2C_IMX=y | |
| 69 | −CONFIG_W1=y | |
| 70 | −CONFIG_W1_MASTER_MXC=y | |
| 71 | −CONFIG_W1_SLAVE_THERM=y | |
| 72 | −# CONFIG_HWMON is not set | |
| 73 | −CONFIG_FB=y | |
| 74 | −CONFIG_USB_GADGET=y | |
| 75 | −CONFIG_USB_GADGET_IMX=y | |
| 76 | −CONFIG_USB_ETH=m | |
| 77 | −CONFIG_MMC=y | |
| 78 | −CONFIG_MMC_MXC=y | |
| 79 | −# CONFIG_DNOTIFY is not set | |
| 80 | −CONFIG_INOTIFY=y | |
| 81 | −CONFIG_TMPFS=y | |
| 82 | −CONFIG_JFFS2_FS=y | |
| 83 | −CONFIG_NFS_FS=y | |
| 84 | −CONFIG_NFS_V3=y | |
| 85 | −CONFIG_NFS_V4=y | |
| 86 | −CONFIG_ROOT_NFS=y | |
| 87 | −# CONFIG_ENABLE_WARN_DEPRECATED is not set | |
| 88 | −# CONFIG_ENABLE_MUST_CHECK is not set | |
| 89 | −# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 90 | −CONFIG_SYSCTL_SYSCALL_CHECK=y | |
| 91 | −# CONFIG_CRYPTO_ANSI_CPRNG is not set | |
| @@ -1,97 +0,0 @@ | ||
| 1 | −CONFIG_EXPERIMENTAL=y | |
| 2 | −# CONFIG_SWAP is not set | |
| 3 | −CONFIG_SYSVIPC=y | |
| 4 | −CONFIG_LOG_BUF_SHIFT=14 | |
| 5 | −CONFIG_SYSFS_DEPRECATED_V2=y | |
| 6 | −# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | |
| 7 | −CONFIG_EXPERT=y | |
| 8 | −CONFIG_KALLSYMS_EXTRA_PASS=y | |
| 9 | −CONFIG_SLAB=y | |
| 10 | −CONFIG_MODULES=y | |
| 11 | −CONFIG_MODULE_UNLOAD=y | |
| 12 | −# CONFIG_BLK_DEV_BSG is not set | |
| 13 | −# CONFIG_IOSCHED_DEADLINE is not set | |
| 14 | −# CONFIG_IOSCHED_CFQ is not set | |
| 15 | −CONFIG_ARCH_MXC=y | |
| 16 | −CONFIG_ARCH_MX2=y | |
| 17 | −CONFIG_MACH_MX21ADS=y | |
| 18 | −CONFIG_MXC_PWM=y | |
| 19 | −CONFIG_NO_HZ=y | |
| 20 | −CONFIG_HIGH_RES_TIMERS=y | |
| 21 | −CONFIG_PREEMPT=y | |
| 22 | −CONFIG_AEABI=y | |
| 23 | −CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 24 | −CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 25 | −CONFIG_NET=y | |
| 26 | −CONFIG_INET=y | |
| 27 | −CONFIG_IP_PNP=y | |
| 28 | −CONFIG_IP_PNP_DHCP=y | |
| 29 | −CONFIG_IP_PNP_BOOTP=y | |
| 30 | −# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| 31 | −# CONFIG_INET_XFRM_MODE_BEET is not set | |
| 32 | −# CONFIG_INET_LRO is not set | |
| 33 | −# CONFIG_INET_DIAG is not set | |
| 34 | −# CONFIG_IPV6 is not set | |
| 35 | −CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 36 | −# CONFIG_FW_LOADER is not set | |
| 37 | −CONFIG_MTD=y | |
| 38 | −CONFIG_MTD_DEBUG=y | |
| 39 | −CONFIG_MTD_DEBUG_VERBOSE=3 | |
| 40 | −CONFIG_MTD_PARTITIONS=y | |
| 41 | −CONFIG_MTD_REDBOOT_PARTS=y | |
| 42 | −CONFIG_MTD_CMDLINE_PARTS=y | |
| 43 | −CONFIG_MTD_CHAR=y | |
| 44 | −CONFIG_MTD_BLOCK=y | |
| 45 | −CONFIG_MTD_CFI=y | |
| 46 | −CONFIG_MTD_CFI_ADV_OPTIONS=y | |
| 47 | −CONFIG_MTD_CFI_GEOMETRY=y | |
| 48 | −# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set | |
| 49 | −CONFIG_MTD_CFI_AMDSTD=y | |
| 50 | −CONFIG_MTD_PHYSMAP=y | |
| 51 | −CONFIG_MTD_NAND=y | |
| 52 | −CONFIG_MTD_NAND_MXC=y | |
| 53 | −CONFIG_NETDEVICES=y | |
| 54 | −CONFIG_NET_ETHERNET=y | |
| 55 | −CONFIG_MII=y | |
| 56 | −# CONFIG_NETDEV_1000 is not set | |
| 57 | −# CONFIG_NETDEV_10000 is not set | |
| 58 | −# CONFIG_INPUT_MOUSEDEV is not set | |
| 59 | −CONFIG_INPUT_EVDEV=y | |
| 60 | −# CONFIG_INPUT_KEYBOARD is not set | |
| 61 | −# CONFIG_INPUT_MOUSE is not set | |
| 62 | −CONFIG_INPUT_TOUCHSCREEN=y | |
| 63 | −# CONFIG_SERIO is not set | |
| 64 | −# CONFIG_CONSOLE_TRANSLATIONS is not set | |
| 65 | −CONFIG_SERIAL_8250=y | |
| 66 | −CONFIG_SERIAL_8250_CONSOLE=y | |
| 67 | −CONFIG_SERIAL_8250_NR_UARTS=1 | |
| 68 | −CONFIG_SERIAL_IMX=y | |
| 69 | −CONFIG_SERIAL_IMX_CONSOLE=y | |
| 70 | −# CONFIG_LEGACY_PTYS is not set | |
| 71 | −# CONFIG_HW_RANDOM is not set | |
| 72 | −CONFIG_I2C=y | |
| 73 | −CONFIG_I2C_CHARDEV=y | |
| 74 | −CONFIG_I2C_IMX=y | |
| 75 | −CONFIG_SPI=y | |
| 76 | −# CONFIG_HWMON is not set | |
| 77 | −CONFIG_FB=y | |
| 78 | −CONFIG_FB_IMX=y | |
| 79 | −# CONFIG_VGA_CONSOLE is not set | |
| 80 | −CONFIG_FRAMEBUFFER_CONSOLE=y | |
| 81 | −CONFIG_FONTS=y | |
| 82 | −CONFIG_FONT_8x8=y | |
| 83 | −CONFIG_LOGO=y | |
| 84 | −# CONFIG_HID_SUPPORT is not set | |
| 85 | −# CONFIG_USB_SUPPORT is not set | |
| 86 | −CONFIG_MMC=y | |
| 87 | −CONFIG_MMC_MXC=y | |
| 88 | −# CONFIG_DNOTIFY is not set | |
| 89 | −CONFIG_MSDOS_FS=y | |
| 90 | −CONFIG_TMPFS=y | |
| 91 | −CONFIG_JFFS2_FS=y | |
| 92 | −CONFIG_NFS_FS=y | |
| 93 | −CONFIG_NFS_V3=y | |
| 94 | −CONFIG_ROOT_NFS=y | |
| 95 | −# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 96 | −CONFIG_SYSCTL_SYSCALL_CHECK=y | |
| 97 | −# CONFIG_CRYPTO_ANSI_CPRNG is not set | |
| @@ -3,7 +3,6 @@ CONFIG_SYSVIPC=y · 2 unmodified lines | ||
| 3 | 3 | CONFIG_IKCONFIG=y |
| 4 | 4 | CONFIG_IKCONFIG_PROC=y |
| 5 | 5 | CONFIG_LOG_BUF_SHIFT=14 |
| 6 | −CONFIG_SYSFS_DEPRECATED_V2=y | |
| 7 | 6 | CONFIG_EXPERT=y |
| 8 | 7 | CONFIG_SLAB=y |
| 9 | 8 | CONFIG_MODULES=y |
| @@ -13,20 +12,21 @@ CONFIG_MODVERSIONS=y · 3 unmodified lines | ||
| 13 | 12 | # CONFIG_BLK_DEV_BSG is not set |
| 14 | 13 | CONFIG_ARCH_MXC=y |
| 15 | 14 | CONFIG_MACH_MX31ADS_WM1133_EV1=y |
| 15 | +CONFIG_MACH_MX31LILLY=y | |
| 16 | +CONFIG_MACH_MX31LITE=y | |
| 16 | 17 | CONFIG_MACH_PCM037=y |
| 17 | 18 | CONFIG_MACH_PCM037_EET=y |
| 18 | −CONFIG_MACH_MX31LITE=y | |
| 19 | 19 | CONFIG_MACH_MX31_3DS=y |
| 20 | 20 | CONFIG_MACH_MX31MOBOARD=y |
| 21 | −CONFIG_MACH_MX31LILLY=y | |
| 22 | 21 | CONFIG_MACH_QONG=y |
| 23 | −CONFIG_MACH_PCM043=y | |
| 24 | 22 | CONFIG_MACH_ARMADILLO5X0=y |
| 25 | −CONFIG_MACH_MX35_3DS=y | |
| 26 | 23 | CONFIG_MACH_KZM_ARM11_01=y |
| 24 | +CONFIG_MACH_PCM043=y | |
| 25 | +CONFIG_MACH_MX35_3DS=y | |
| 27 | 26 | CONFIG_MACH_EUKREA_CPUIMX35=y |
| 28 | 27 | CONFIG_MXC_IRQ_PRIOR=y |
| 29 | 28 | CONFIG_MXC_PWM=y |
| 29 | +CONFIG_ARM_ERRATA_411920=y | |
| 30 | 30 | CONFIG_NO_HZ=y |
| 31 | 31 | CONFIG_HIGH_RES_TIMERS=y |
| 32 | 32 | CONFIG_PREEMPT=y |
| @@ -35,7 +35,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 · 2 unmodified lines | ||
| 35 | 35 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 36 | 36 | CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off" |
| 37 | 37 | CONFIG_VFP=y |
| 38 | −CONFIG_PM=y | |
| 39 | 38 | CONFIG_PM_DEBUG=y |
| 40 | 39 | CONFIG_NET=y |
| 41 | 40 | CONFIG_PACKET=y |
| @@ -52,7 +51,6 @@ CONFIG_IP_PNP_DHCP=y · 10 unmodified lines | ||
| 52 | 51 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 53 | 52 | CONFIG_FW_LOADER=m |
| 54 | 53 | CONFIG_MTD=y |
| 55 | −CONFIG_MTD_PARTITIONS=y | |
| 56 | 54 | CONFIG_MTD_CMDLINE_PARTS=y |
| 57 | 55 | CONFIG_MTD_CHAR=y |
| 58 | 56 | CONFIG_MTD_BLOCK=y |
| @@ -62,24 +60,27 @@ CONFIG_MTD_NAND=y · 3 unmodified lines | ||
| 62 | 60 | CONFIG_MTD_NAND_MXC=y |
| 63 | 61 | CONFIG_MTD_UBI=y |
| 64 | 62 | # CONFIG_BLK_DEV is not set |
| 63 | +CONFIG_MISC_DEVICES=y | |
| 65 | 64 | CONFIG_EEPROM_AT24=y |
| 66 | 65 | CONFIG_NETDEVICES=y |
| 67 | 66 | CONFIG_SMSC_PHY=y |
| 68 | 67 | CONFIG_NET_ETHERNET=y |
| 69 | 68 | CONFIG_SMSC911X=y |
| 70 | 69 | CONFIG_DNET=y |
| 71 | −CONFIG_FEC=y | |
| 72 | 70 | # CONFIG_NETDEV_1000 is not set |
| 73 | 71 | # CONFIG_NETDEV_10000 is not set |
| 74 | −# CONFIG_INPUT is not set | |
| 72 | +# CONFIG_INPUT_MOUSEDEV is not set | |
| 73 | +# CONFIG_KEYBOARD_ATKBD is not set | |
| 74 | +CONFIG_KEYBOARD_IMX=y | |
| 75 | +# CONFIG_INPUT_MOUSE is not set | |
| 75 | 76 | # CONFIG_SERIO is not set |
| 76 | 77 | # CONFIG_VT is not set |
| 78 | +# CONFIG_LEGACY_PTYS is not set | |
| 77 | 79 | CONFIG_SERIAL_8250=m |
| 78 | 80 | CONFIG_SERIAL_8250_EXTENDED=y |
| 79 | 81 | CONFIG_SERIAL_8250_SHARE_IRQ=y |
| 80 | 82 | CONFIG_SERIAL_IMX=y |
| 81 | 83 | CONFIG_SERIAL_IMX_CONSOLE=y |
| 82 | −# CONFIG_LEGACY_PTYS is not set | |
| 83 | 84 | # CONFIG_HW_RANDOM is not set |
| 84 | 85 | CONFIG_I2C=y |
| 85 | 86 | CONFIG_I2C_CHARDEV=y |
| @@ -89,12 +90,15 @@ CONFIG_W1=y · 3 unmodified lines | ||
| 89 | 90 | CONFIG_W1_MASTER_MXC=y |
| 90 | 91 | CONFIG_W1_SLAVE_THERM=y |
| 91 | 92 | # CONFIG_HWMON is not set |
| 93 | +CONFIG_WATCHDOG=y | |
| 94 | +CONFIG_IMX2_WDT=y | |
| 92 | 95 | CONFIG_MFD_WM8350_I2C=y |
| 93 | 96 | CONFIG_REGULATOR=y |
| 94 | 97 | CONFIG_REGULATOR_WM8350=y |
| 95 | 98 | CONFIG_MEDIA_SUPPORT=y |
| 96 | 99 | CONFIG_VIDEO_DEV=y |
| 97 | −# CONFIG_VIDEO_ALLOW_V4L1 is not set | |
| 100 | +# CONFIG_RC_CORE is not set | |
| 101 | +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set | |
| 98 | 102 | CONFIG_SOC_CAMERA=y |
| 99 | 103 | CONFIG_SOC_CAMERA_MT9M001=y |
| 100 | 104 | CONFIG_SOC_CAMERA_MT9M111=y |
| @@ -105,9 +109,26 @@ CONFIG_SOC_CAMERA_OV772X=y · 4 unmodified lines | ||
| 105 | 109 | CONFIG_VIDEO_MX3=y |
| 106 | 110 | # CONFIG_RADIO_ADAPTERS is not set |
| 107 | 111 | CONFIG_FB=y |
| 108 | −# CONFIG_USB_SUPPORT is not set | |
| 112 | +CONFIG_SOUND=y | |
| 113 | +CONFIG_SND=y | |
| 114 | +# CONFIG_SND_ARM is not set | |
| 115 | +# CONFIG_SND_SPI is not set | |
| 116 | +CONFIG_SND_SOC=y | |
| 117 | +CONFIG_SND_IMX_SOC=y | |
| 118 | +CONFIG_SND_MXC_SOC_WM1133_EV1=y | |
| 119 | +CONFIG_SND_SOC_PHYCORE_AC97=y | |
| 120 | +CONFIG_SND_SOC_EUKREA_TLV320=y | |
| 121 | +CONFIG_USB=y | |
| 122 | +CONFIG_USB_EHCI_HCD=y | |
| 123 | +CONFIG_USB_EHCI_MXC=y | |
| 124 | +CONFIG_USB_GADGET=m | |
| 125 | +CONFIG_USB_FSL_USB2=m | |
| 126 | +CONFIG_USB_G_SERIAL=m | |
| 127 | +CONFIG_USB_ULPI=y | |
| 109 | 128 | CONFIG_MMC=y |
| 110 | 129 | CONFIG_MMC_MXC=y |
| 130 | +CONFIG_RTC_CLASS=y | |
| 131 | +CONFIG_RTC_MXC=y | |
| 111 | 132 | CONFIG_DMADEVICES=y |
| 112 | 133 | # CONFIG_DNOTIFY is not set |
| 113 | 134 | CONFIG_TMPFS=y |
| @@ -119,6 +140,5 @@ CONFIG_NFS_V4=y · 5 unmodified lines | ||
| 119 | 140 | CONFIG_ROOT_NFS=y |
| 120 | 141 | # CONFIG_ENABLE_WARN_DEPRECATED is not set |
| 121 | 142 | # CONFIG_ENABLE_MUST_CHECK is not set |
| 122 | −# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 123 | 143 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 124 | 144 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
| @@ -1,5 +1,6 @@ | ||
| 1 | 1 | CONFIG_EXPERIMENTAL=y |
| 2 | 2 | # CONFIG_LOCALVERSION_AUTO is not set |
| 3 | +CONFIG_KERNEL_LZO=y | |
| 3 | 4 | CONFIG_SYSVIPC=y |
| 4 | 5 | CONFIG_LOG_BUF_SHIFT=18 |
| 5 | 6 | CONFIG_RELAY=y |
| @@ -13,21 +14,29 @@ CONFIG_MODULE_SRCVERSION_ALL=y · 7 unmodified lines | ||
| 13 | 14 | # CONFIG_LBDAF is not set |
| 14 | 15 | # CONFIG_BLK_DEV_BSG is not set |
| 15 | 16 | CONFIG_ARCH_MXC=y |
| 16 | −CONFIG_ARCH_MX51=y | |
| 17 | +CONFIG_ARCH_MX5=y | |
| 17 | 18 | CONFIG_MACH_MX51_BABBAGE=y |
| 18 | 19 | CONFIG_MACH_MX51_3DS=y |
| 19 | 20 | CONFIG_MACH_EUKREA_CPUIMX51=y |
| 21 | +CONFIG_MACH_EUKREA_CPUIMX51SD=y | |
| 22 | +CONFIG_MACH_MX51_EFIKAMX=y | |
| 23 | +CONFIG_MACH_MX51_EFIKASB=y | |
| 24 | +CONFIG_MACH_MX53_EVK=y | |
| 25 | +CONFIG_MACH_MX53_SMD=y | |
| 26 | +CONFIG_MACH_MX53_LOCO=y | |
| 27 | +CONFIG_MACH_MX53_ARD=y | |
| 28 | +CONFIG_MXC_PWM=y | |
| 20 | 29 | CONFIG_NO_HZ=y |
| 21 | 30 | CONFIG_HIGH_RES_TIMERS=y |
| 31 | +CONFIG_VMSPLIT_2G=y | |
| 22 | 32 | CONFIG_PREEMPT_VOLUNTARY=y |
| 23 | 33 | CONFIG_AEABI=y |
| 24 | 34 | # CONFIG_OABI_COMPAT is not set |
| 25 | 35 | CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 |
| 26 | −CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=192.168.0.101:/shared/nfs ip=dhcp" | |
| 36 | +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" | |
| 27 | 37 | CONFIG_VFP=y |
| 28 | 38 | CONFIG_NEON=y |
| 29 | 39 | CONFIG_BINFMT_MISC=m |
| 30 | −CONFIG_PM=y | |
| 31 | 40 | CONFIG_PM_DEBUG=y |
| 32 | 41 | CONFIG_PM_TEST_SUSPEND=y |
| 33 | 42 | CONFIG_NET=y |
| @@ -42,13 +51,13 @@ CONFIG_IP_PNP_DHCP=y · 8 unmodified lines | ||
| 42 | 51 | # CONFIG_INET_LRO is not set |
| 43 | 52 | # CONFIG_IPV6 is not set |
| 44 | 53 | # CONFIG_WIRELESS is not set |
| 54 | +CONFIG_DEVTMPFS=y | |
| 55 | +CONFIG_DEVTMPFS_MOUNT=y | |
| 45 | 56 | # CONFIG_STANDALONE is not set |
| 46 | 57 | CONFIG_CONNECTOR=y |
| 47 | 58 | CONFIG_BLK_DEV_LOOP=y |
| 48 | 59 | CONFIG_BLK_DEV_RAM=y |
| 49 | 60 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
| 50 | −# CONFIG_MISC_DEVICES is not set | |
| 51 | −CONFIG_SCSI=y | |
| 52 | 61 | # CONFIG_SCSI_PROC_FS is not set |
| 53 | 62 | CONFIG_BLK_DEV_SD=y |
| 54 | 63 | CONFIG_SCSI_MULTI_LUN=y |
| @@ -56,8 +65,10 @@ CONFIG_SCSI_CONSTANTS=y · 1 unmodified line | ||
| 56 | 65 | CONFIG_SCSI_LOGGING=y |
| 57 | 66 | CONFIG_SCSI_SCAN_ASYNC=y |
| 58 | 67 | # CONFIG_SCSI_LOWLEVEL is not set |
| 59 | −CONFIG_ATA=m | |
| 68 | +CONFIG_ATA=y | |
| 69 | +CONFIG_PATA_IMX=y | |
| 60 | 70 | CONFIG_NETDEVICES=y |
| 71 | +CONFIG_MII=m | |
| 61 | 72 | CONFIG_MARVELL_PHY=y |
| 62 | 73 | CONFIG_DAVICOM_PHY=y |
| 63 | 74 | CONFIG_QSEMI_PHY=y |
| @@ -71,49 +82,57 @@ CONFIG_REALTEK_PHY=y · 7 unmodified lines | ||
| 71 | 82 | CONFIG_NATIONAL_PHY=y |
| 72 | 83 | CONFIG_STE10XP=y |
| 73 | 84 | CONFIG_LSI_ET1011C_PHY=y |
| 74 | −CONFIG_MDIO_BITBANG=y | |
| 75 | −CONFIG_MDIO_GPIO=y | |
| 85 | +CONFIG_MICREL_PHY=y | |
| 76 | 86 | CONFIG_NET_ETHERNET=y |
| 77 | −CONFIG_MII=m | |
| 78 | −CONFIG_FEC=y | |
| 79 | 87 | # CONFIG_NETDEV_1000 is not set |
| 80 | 88 | # CONFIG_NETDEV_10000 is not set |
| 81 | 89 | # CONFIG_WLAN is not set |
| 82 | −CONFIG_INPUT_FF_MEMLESS=m | |
| 83 | 90 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set |
| 84 | 91 | CONFIG_INPUT_EVDEV=y |
| 85 | −CONFIG_KEYBOARD_GPIO=y | |
| 86 | 92 | CONFIG_INPUT_EVBUG=m |
| 93 | +CONFIG_KEYBOARD_GPIO=y | |
| 87 | 94 | CONFIG_MOUSE_PS2=m |
| 88 | 95 | CONFIG_MOUSE_PS2_ELANTECH=y |
| 96 | +CONFIG_INPUT_MISC=y | |
| 97 | +CONFIG_INPUT_MMA8450=y | |
| 89 | 98 | CONFIG_SERIO_SERPORT=m |
| 90 | 99 | CONFIG_VT_HW_CONSOLE_BINDING=y |
| 100 | +# CONFIG_LEGACY_PTYS is not set | |
| 91 | 101 | # CONFIG_DEVKMEM is not set |
| 92 | 102 | CONFIG_SERIAL_IMX=y |
| 93 | 103 | CONFIG_SERIAL_IMX_CONSOLE=y |
| 94 | −# CONFIG_LEGACY_PTYS is not set | |
| 95 | 104 | CONFIG_HW_RANDOM=y |
| 96 | 105 | CONFIG_I2C=y |
| 97 | 106 | # CONFIG_I2C_COMPAT is not set |
| 98 | −CONFIG_I2C_CHARDEV=m | |
| 107 | +CONFIG_I2C_CHARDEV=y | |
| 99 | 108 | # CONFIG_I2C_HELPER_AUTO is not set |
| 100 | 109 | CONFIG_I2C_ALGOBIT=m |
| 101 | 110 | CONFIG_I2C_ALGOPCF=m |
| 102 | 111 | CONFIG_I2C_ALGOPCA=m |
| 112 | +CONFIG_I2C_IMX=y | |
| 113 | +CONFIG_SPI=y | |
| 114 | +CONFIG_SPI_IMX=y | |
| 103 | 115 | CONFIG_GPIO_SYSFS=y |
| 104 | 116 | # CONFIG_HWMON is not set |
| 105 | −# CONFIG_HID_SUPPORT is not set | |
| 117 | +CONFIG_WATCHDOG=y | |
| 118 | +CONFIG_IMX2_WDT=y | |
| 119 | +CONFIG_MFD_MC13XXX=y | |
| 120 | +CONFIG_REGULATOR=y | |
| 121 | +CONFIG_REGULATOR_MC13892=y | |
| 106 | 122 | CONFIG_USB=y |
| 107 | 123 | CONFIG_USB_EHCI_HCD=y |
| 108 | 124 | CONFIG_USB_EHCI_MXC=y |
| 109 | 125 | CONFIG_USB_STORAGE=y |
| 110 | 126 | CONFIG_MMC=y |
| 111 | 127 | CONFIG_MMC_BLOCK=m |
| 112 | −CONFIG_MMC_SDHCI=m | |
| 128 | +CONFIG_MMC_SDHCI=y | |
| 129 | +CONFIG_MMC_SDHCI_PLTFM=y | |
| 130 | +CONFIG_MMC_SDHCI_ESDHC_IMX=y | |
| 113 | 131 | CONFIG_NEW_LEDS=y |
| 114 | 132 | CONFIG_LEDS_CLASS=y |
| 115 | 133 | CONFIG_RTC_CLASS=y |
| 116 | 134 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y |
| 135 | +CONFIG_RTC_MXC=y | |
| 117 | 136 | CONFIG_EXT2_FS=y |
| 118 | 137 | CONFIG_EXT2_FS_XATTR=y |
| 119 | 138 | CONFIG_EXT2_FS_POSIX_ACL=y |
| @@ -127,7 +146,6 @@ CONFIG_EXT4_FS_SECURITY=y · 7 unmodified lines | ||
| 127 | 146 | CONFIG_QUOTA=y |
| 128 | 147 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
| 129 | 148 | # CONFIG_PRINT_QUOTA_WARNING is not set |
| 130 | −CONFIG_AUTOFS_FS=y | |
| 131 | 149 | CONFIG_AUTOFS4_FS=y |
| 132 | 150 | CONFIG_FUSE_FS=y |
| 133 | 151 | CONFIG_ISO9660_FS=m |
| @@ -151,17 +169,13 @@ CONFIG_NLS_ISO8859_15=m · 17 unmodified lines | ||
| 151 | 169 | CONFIG_NLS_UTF8=y |
| 152 | 170 | CONFIG_MAGIC_SYSRQ=y |
| 153 | 171 | CONFIG_DEBUG_FS=y |
| 154 | −CONFIG_DEBUG_KERNEL=y | |
| 155 | 172 | # CONFIG_SCHED_DEBUG is not set |
| 156 | 173 | # CONFIG_DEBUG_BUGVERBOSE is not set |
| 157 | −# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 158 | 174 | # CONFIG_FTRACE is not set |
| 159 | 175 | # CONFIG_ARM_UNWIND is not set |
| 160 | −CONFIG_DEBUG_LL=y | |
| 161 | −CONFIG_EARLY_PRINTK=y | |
| 162 | 176 | CONFIG_SECURITYFS=y |
| 163 | −CONFIG_CRYPTO_DEFLATE=y | |
| 164 | −CONFIG_CRYPTO_LZO=y | |
| 177 | +CONFIG_CRYPTO_DEFLATE=m | |
| 178 | +CONFIG_CRYPTO_LZO=m | |
| 165 | 179 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
| 166 | 180 | # CONFIG_CRYPTO_HW is not set |
| 167 | 181 | CONFIG_CRC_CCITT=m |
| @@ -26,6 +26,7 @@ CONFIG_MACH_MX23EVK=y · 25 unmodified lines | ||
| 26 | 26 | CONFIG_MACH_MX28EVK=y |
| 27 | 27 | CONFIG_MACH_STMP378X_DEVB=y |
| 28 | 28 | CONFIG_MACH_TX28=y |
| 29 | +CONFIG_MACH_M28EVK=y | |
| 29 | 30 | # CONFIG_ARM_THUMB is not set |
| 30 | 31 | CONFIG_NO_HZ=y |
| 31 | 32 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -25,6 +25,7 @@ CONFIG_MACH_KAEN=y · 24 unmodified lines | ||
| 25 | 25 | CONFIG_MACH_PAZ00=y |
| 26 | 26 | CONFIG_MACH_TRIMSLICE=y |
| 27 | 27 | CONFIG_MACH_WARIO=y |
| 28 | +CONFIG_MACH_VENTANA=y | |
| 28 | 29 | CONFIG_TEGRA_DEBUG_UARTD=y |
| 29 | 30 | CONFIG_ARM_ERRATA_742230=y |
| 30 | 31 | CONFIG_NO_HZ=y |
| @@ -38,7 +39,6 @@ CONFIG_HIGHMEM=y · 7 unmodified lines | ||
| 38 | 39 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
| 39 | 40 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 40 | 41 | CONFIG_VFP=y |
| 41 | −CONFIG_PM=y | |
| 42 | 42 | CONFIG_NET=y |
| 43 | 43 | CONFIG_PACKET=y |
| 44 | 44 | CONFIG_UNIX=y |
| @@ -65,6 +65,7 @@ CONFIG_IPV6_TUNNEL=y · 20 unmodified lines | ||
| 65 | 65 | CONFIG_IPV6_MULTIPLE_TABLES=y |
| 66 | 66 | # CONFIG_WIRELESS is not set |
| 67 | 67 | # CONFIG_FIRMWARE_IN_KERNEL is not set |
| 68 | +CONFIG_PROC_DEVICETREE=y | |
| 68 | 69 | CONFIG_BLK_DEV_LOOP=y |
| 69 | 70 | CONFIG_MISC_DEVICES=y |
| 70 | 71 | CONFIG_AD525X_DPOT=y |
| @@ -72,34 +73,61 @@ CONFIG_AD525X_DPOT_I2C=y · 1 unmodified line | ||
| 72 | 73 | CONFIG_ICS932S401=y |
| 73 | 74 | CONFIG_APDS9802ALS=y |
| 74 | 75 | CONFIG_ISL29003=y |
| 76 | +CONFIG_SCSI=y | |
| 77 | +CONFIG_BLK_DEV_SD=y | |
| 78 | +# CONFIG_SCSI_LOWLEVEL is not set | |
| 75 | 79 | CONFIG_NETDEVICES=y |
| 76 | 80 | CONFIG_DUMMY=y |
| 81 | +CONFIG_NET_ETHERNET=y | |
| 77 | 82 | CONFIG_R8169=y |
| 78 | 83 | # CONFIG_NETDEV_10000 is not set |
| 79 | 84 | # CONFIG_WLAN is not set |
| 85 | +CONFIG_USB_PEGASUS=y | |
| 86 | +CONFIG_USB_USBNET=y | |
| 87 | +CONFIG_USB_NET_SMSC75XX=y | |
| 88 | +CONFIG_USB_NET_SMSC95XX=y | |
| 80 | 89 | # CONFIG_INPUT is not set |
| 81 | 90 | # CONFIG_SERIO is not set |
| 82 | 91 | # CONFIG_VT is not set |
| 92 | +# CONFIG_LEGACY_PTYS is not set | |
| 83 | 93 | # CONFIG_DEVKMEM is not set |
| 84 | 94 | CONFIG_SERIAL_8250=y |
| 85 | 95 | CONFIG_SERIAL_8250_CONSOLE=y |
| 86 | −# CONFIG_LEGACY_PTYS is not set | |
| 96 | +CONFIG_SERIAL_OF_PLATFORM=y | |
| 87 | 97 | # CONFIG_HW_RANDOM is not set |
| 88 | 98 | CONFIG_I2C=y |
| 89 | 99 | # CONFIG_I2C_COMPAT is not set |
| 90 | 100 | # CONFIG_I2C_HELPER_AUTO is not set |
| 91 | 101 | CONFIG_I2C_TEGRA=y |
| 102 | +CONFIG_SPI=y | |
| 103 | +CONFIG_SPI_TEGRA=y | |
| 92 | 104 | CONFIG_SENSORS_LM90=y |
| 93 | 105 | CONFIG_MFD_TPS6586X=y |
| 94 | 106 | CONFIG_REGULATOR=y |
| 95 | 107 | CONFIG_REGULATOR_TPS6586X=y |
| 96 | −# CONFIG_USB_SUPPORT is not set | |
| 108 | +CONFIG_SOUND=y | |
| 109 | +CONFIG_SND=y | |
| 110 | +# CONFIG_SND_SUPPORT_OLD_API is not set | |
| 111 | +# CONFIG_SND_DRIVERS is not set | |
| 112 | +# CONFIG_SND_PCI is not set | |
| 113 | +# CONFIG_SND_ARM is not set | |
| 114 | +# CONFIG_SND_SPI is not set | |
| 115 | +# CONFIG_SND_USB is not set | |
| 116 | +CONFIG_SND_SOC=y | |
| 117 | +CONFIG_SND_SOC_TEGRA=y | |
| 118 | +CONFIG_SND_SOC_TEGRA_WM8903=y | |
| 119 | +CONFIG_SND_SOC_TEGRA_TRIMSLICE=y | |
| 120 | +CONFIG_USB=y | |
| 121 | +CONFIG_USB_EHCI_HCD=y | |
| 122 | +CONFIG_USB_EHCI_TEGRA=y | |
| 123 | +CONFIG_USB_STORAGE=y | |
| 97 | 124 | CONFIG_MMC=y |
| 98 | 125 | CONFIG_MMC_SDHCI=y |
| 99 | 126 | CONFIG_MMC_SDHCI_PLTFM=y |
| 100 | 127 | CONFIG_MMC_SDHCI_TEGRA=y |
| 128 | +CONFIG_RTC_CLASS=y | |
| 129 | +CONFIG_RTC_DRV_TEGRA=y | |
| 101 | 130 | CONFIG_STAGING=y |
| 102 | −# CONFIG_STAGING_EXCLUDE_BUILD is not set | |
| 103 | 131 | CONFIG_IIO=y |
| 104 | 132 | CONFIG_SENSORS_ISL29018=y |
| 105 | 133 | CONFIG_SENSORS_AK8975=y |
| @@ -123,18 +151,15 @@ CONFIG_NLS_ISO8859_1=y · 17 unmodified lines | ||
| 123 | 151 | CONFIG_PRINTK_TIME=y |
| 124 | 152 | CONFIG_MAGIC_SYSRQ=y |
| 125 | 153 | CONFIG_DEBUG_FS=y |
| 126 | −CONFIG_DEBUG_KERNEL=y | |
| 127 | 154 | CONFIG_DETECT_HUNG_TASK=y |
| 128 | 155 | CONFIG_SCHEDSTATS=y |
| 129 | 156 | CONFIG_TIMER_STATS=y |
| 130 | 157 | CONFIG_DEBUG_SLAB=y |
| 131 | 158 | # CONFIG_DEBUG_PREEMPT is not set |
| 132 | 159 | CONFIG_DEBUG_MUTEXES=y |
| 133 | −CONFIG_DEBUG_SPINLOCK_SLEEP=y | |
| 134 | 160 | CONFIG_DEBUG_INFO=y |
| 135 | 161 | CONFIG_DEBUG_VM=y |
| 136 | 162 | CONFIG_DEBUG_SG=y |
| 137 | −# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 138 | 163 | CONFIG_DEBUG_LL=y |
| 139 | 164 | CONFIG_EARLY_PRINTK=y |
| 140 | 165 | CONFIG_CRYPTO_ECB=y |
| @@ -15,7 +15,12 @@ struct dev_archdata { · 14 unmodified lines | ||
| 15 | 15 | #endif |
| 16 | 16 | }; |
| 17 | 17 | |
| 18 | +struct omap_device; | |
| 19 | + | |
| 18 | 20 | struct pdev_archdata { |
| 21 | +#ifdef CONFIG_ARCH_OMAP | |
| 22 | + struct omap_device *od; | |
| 23 | +#endif | |
| 19 | 24 | }; |
| 20 | 25 | |
| 21 | 26 | #endif |
| @@ -205,6 +205,13 @@ extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *, · 204 unmodified lines | ||
| 205 | 205 | int dma_mmap_writecombine(struct device *, struct vm_area_struct *, |
| 206 | 206 | void *, dma_addr_t, size_t); |
| 207 | 207 | |
| 208 | +/* | |
| 209 | + * This can be called during boot to increase the size of the consistent | |
| 210 | + * DMA region above it's default value of 2MB. It must be called before the | |
| 211 | + * memory allocator is initialised, i.e. before any core_initcall. | |
| 212 | + */ | |
| 213 | +extern void __init init_consistent_dma_size(unsigned long size); | |
| 214 | + | |
| 208 | 215 | |
| 209 | 216 | #ifdef CONFIG_DMABOUNCE |
| 210 | 217 | /* |
| @@ -34,18 +34,18 @@ · 33 unmodified lines | ||
| 34 | 34 | #define DMA_MODE_CASCADE 0xc0 |
| 35 | 35 | #define DMA_AUTOINIT 0x10 |
| 36 | 36 | |
| 37 | −extern spinlock_t dma_spin_lock; | |
| 37 | +extern raw_spinlock_t dma_spin_lock; | |
| 38 | 38 | |
| 39 | 39 | static inline unsigned long claim_dma_lock(void) |
| 40 | 40 | { |
| 41 | 41 | unsigned long flags; |
| 42 | − spin_lock_irqsave(&dma_spin_lock, flags); | |
| 42 | + raw_spin_lock_irqsave(&dma_spin_lock, flags); | |
| 43 | 43 | return flags; |
| 44 | 44 | } |
| 45 | 45 | |
| 46 | 46 | static inline void release_dma_lock(unsigned long flags) |
| 47 | 47 | { |
| 48 | − spin_unlock_irqrestore(&dma_spin_lock, flags); | |
| 48 | + raw_spin_unlock_irqrestore(&dma_spin_lock, flags); | |
| 49 | 49 | } |
| 50 | 50 | |
| 51 | 51 | /* Clear the 'DMA Pointer Flip Flop'. |
| @@ -25,13 +25,6 @@ · 24 unmodified lines | ||
| 25 | 25 | movne r1, sp |
| 26 | 26 | adrne lr, BSYM(1b) |
| 27 | 27 | bne do_IPI |
| 28 | − | |
| 29 | −#ifdef CONFIG_LOCAL_TIMERS | |
| 30 | − test_for_ltirq r0, r2, r6, lr | |
| 31 | − movne r0, sp | |
| 32 | − adrne lr, BSYM(1b) | |
| 33 | − bne do_local_timer | |
| 34 | −#endif | |
| 35 | 28 | #endif |
| 36 | 29 | 9997: |
| 37 | 30 | .endm |
| @@ -4,4 +4,23 @@ · 3 unmodified lines | ||
| 4 | 4 | /* not all ARM platforms necessarily support this API ... */ |
| 5 | 5 | #include <mach/gpio.h> |
| 6 | 6 | |
| 7 | +#ifndef __ARM_GPIOLIB_COMPLEX | |
| 8 | +/* Note: this may rely upon the value of ARCH_NR_GPIOS set in mach/gpio.h */ | |
| 9 | +#include <asm-generic/gpio.h> | |
| 10 | + | |
| 11 | +/* The trivial gpiolib dispatchers */ | |
| 12 | +#define gpio_get_value __gpio_get_value | |
| 13 | +#define gpio_set_value __gpio_set_value | |
| 14 | +#define gpio_cansleep __gpio_cansleep | |
| 15 | +#endif | |
| 16 | + | |
| 17 | +/* | |
| 18 | + * Provide a default gpio_to_irq() which should satisfy every case. | |
| 19 | + * However, some platforms want to do this differently, so allow them | |
| 20 | + * to override it. | |
| 21 | + */ | |
| 22 | +#ifndef gpio_to_irq | |
| 23 | +#define gpio_to_irq __gpio_to_irq | |
| 24 | +#endif | |
| 25 | + | |
| 7 | 26 | #endif /* _ARCH_ARM_GPIO_H */ |
| @@ -9,9 +9,6 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | typedef struct { |
| 11 | 11 | unsigned int __softirq_pending; |
| 12 | −#ifdef CONFIG_LOCAL_TIMERS | |
| 13 | − unsigned int local_timer_irqs; | |
| 14 | −#endif | |
| 15 | 12 | #ifdef CONFIG_SMP |
| 16 | 13 | unsigned int ipi_irqs[NR_IPI]; |
| 17 | 14 | #endif |
| @@ -102,7 +102,14 @@ · 101 unmodified lines | ||
| 102 | 102 | |
| 103 | 103 | #ifndef __ASSEMBLY__ |
| 104 | 104 | extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); |
| 105 | +#if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF) | |
| 105 | 106 | extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask); |
| 107 | +#else | |
| 108 | +static inline int l2x0_of_init(__u32 aux_val, __u32 aux_mask) | |
| 109 | +{ | |
| 110 | + return -ENODEV; | |
| 111 | +} | |
| 112 | +#endif | |
| 106 | 113 | |
| 107 | 114 | struct l2x0_regs { |
| 108 | 115 | unsigned long phy_base; |
| @@ -121,6 +128,6 @@ struct l2x0_regs { · 12 unmodified lines | ||
| 121 | 128 | |
| 122 | 129 | extern struct l2x0_regs l2x0_saved_regs; |
| 123 | 130 | |
| 124 | −#endif | |
| 131 | +#endif /* __ASSEMBLY__ */ | |
| 125 | 132 | |
| 126 | 133 | #endif |
| @@ -22,15 +22,11 @@ · 21 unmodified lines | ||
| 22 | 22 | * interrupt controller spec. To wit: |
| 23 | 23 | * |
| 24 | 24 | * Interrupts 0-15 are IPI |
| 25 | − * 16-28 are reserved | |
| 26 | − * 29-31 are local. We allow 30 to be used for the watchdog. | |
| 25 | + * 16-31 are local. We allow 30 to be used for the watchdog. | |
| 27 | 26 | * 32-1020 are global |
| 28 | 27 | * 1021-1022 are reserved |
| 29 | 28 | * 1023 is "spurious" (no interrupt) |
| 30 | 29 | * |
| 31 | − * For now, we ignore all local interrupts so only return an interrupt if it's | |
| 32 | − * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. | |
| 33 | − * | |
| 34 | 30 | * A simple read from the controller will tell us the number of the highest |
| 35 | 31 | * priority enabled interrupt. We then just need to check whether it is in the |
| 36 | 32 | * valid range for an IRQ (30-1020 inclusive). |
| @@ -43,7 +39,7 @@ · 6 unmodified lines | ||
| 43 | 39 | |
| 44 | 40 | ldr \tmp, =1021 |
| 45 | 41 | bic \irqnr, \irqstat, #0x1c00 |
| 46 | − cmp \irqnr, #29 | |
| 42 | + cmp \irqnr, #15 | |
| 47 | 43 | cmpcc \irqnr, \irqnr |
| 48 | 44 | cmpne \irqnr, \tmp |
| 49 | 45 | cmpcs \irqnr, \irqnr |
| @@ -62,14 +58,3 @@ · 12 unmodified lines | ||
| 62 | 58 | strcc \irqstat, [\base, #GIC_CPU_EOI] |
| 63 | 59 | cmpcs \irqnr, \irqnr |
| 64 | 60 | .endm |
| 65 | − | |
| 66 | −/* As above, this assumes that irqstat and base are preserved.. */ | |
| 67 | − | |
| 68 | − .macro test_for_ltirq, irqnr, irqstat, base, tmp | |
| 69 | − bic \irqnr, \irqstat, #0x1c00 | |
| 70 | − mov \tmp, #0 | |
| 71 | − cmp \irqnr, #29 | |
| 72 | − moveq \tmp, #1 | |
| 73 | − streq \irqstat, [\base, #GIC_CPU_EOI] | |
| 74 | − cmp \tmp, #0 | |
| 75 | − .endm | |
| @@ -33,19 +33,32 @@ · 32 unmodified lines | ||
| 33 | 33 | #define GIC_DIST_SOFTINT 0xf00 |
| 34 | 34 | |
| 35 | 35 | #ifndef __ASSEMBLY__ |
| 36 | +#include <linux/irqdomain.h> | |
| 37 | +struct device_node; | |
| 38 | + | |
| 36 | 39 | extern void __iomem *gic_cpu_base_addr; |
| 37 | 40 | extern struct irq_chip gic_arch_extn; |
| 38 | 41 | |
| 39 | −void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); | |
| 42 | +void gic_init(unsigned int, int, void __iomem *, void __iomem *); | |
| 43 | +int gic_of_init(struct device_node *node, struct device_node *parent); | |
| 40 | 44 | void gic_secondary_init(unsigned int); |
| 41 | 45 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); |
| 42 | 46 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); |
| 43 | −void gic_enable_ppi(unsigned int); | |
| 44 | 47 | |
| 45 | 48 | struct gic_chip_data { |
| 46 | − unsigned int irq_offset; | |
| 47 | 49 | void __iomem *dist_base; |
| 48 | 50 | void __iomem *cpu_base; |
| 51 | +#ifdef CONFIG_CPU_PM | |
| 52 | + u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; | |
| 53 | + u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; | |
| 54 | + u32 saved_spi_target[DIV_ROUND_UP(1020, 4)]; | |
| 55 | + u32 __percpu *saved_ppi_enable; | |
| 56 | + u32 __percpu *saved_ppi_conf; | |
| 57 | +#endif | |
| 58 | +#ifdef CONFIG_IRQ_DOMAIN | |
| 59 | + struct irq_domain domain; | |
| 60 | +#endif | |
| 61 | + unsigned int gic_irqs; | |
| 49 | 62 | }; |
| 50 | 63 | #endif |
| 51 | 64 | |
| @@ -28,6 +28,8 @@ · 27 unmodified lines | ||
| 28 | 28 | #include <mach/hardware.h> |
| 29 | 29 | #include <asm-generic/gpio.h> |
| 30 | 30 | |
| 31 | +#define __ARM_GPIOLIB_COMPLEX | |
| 32 | + | |
| 31 | 33 | #define IOP3XX_N_GPIOS 8 |
| 32 | 34 | |
| 33 | 35 | static inline int gpio_get_value(unsigned gpio) |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | #ifndef __ASM_HARDWARE_IT8152_H |
| 11 | 11 | #define __ASM_HARDWARE_IT8152_H |
| 12 | −extern unsigned long it8152_base_address; | |
| 12 | +extern void __iomem *it8152_base_address; | |
| 13 | 13 | |
| 14 | 14 | #define IT8152_IO_BASE (it8152_base_address + 0x03e00000) |
| 15 | 15 | #define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000) |
| @@ -21,6 +21,9 @@ · 20 unmodified lines | ||
| 21 | 21 | * OneNAND features. |
| 22 | 22 | */ |
| 23 | 23 | |
| 24 | +#ifndef ASM_PL080_H | |
| 25 | +#define ASM_PL080_H | |
| 26 | + | |
| 24 | 27 | #define PL080_INT_STATUS (0x00) |
| 25 | 28 | #define PL080_TC_STATUS (0x04) |
| 26 | 29 | #define PL080_TC_CLEAR (0x08) |
| @@ -138,3 +141,4 @@ struct pl080s_lli { · 111 unmodified lines | ||
| 138 | 141 | u32 control1; |
| 139 | 142 | }; |
| 140 | 143 | |
| 144 | +#endif /* ASM_PL080_H */ | |
| @@ -50,6 +50,7 @@ static inline void decode_ctrl_reg(u32 reg, · 49 unmodified lines | ||
| 50 | 50 | #define ARM_DEBUG_ARCH_V6_1 2 |
| 51 | 51 | #define ARM_DEBUG_ARCH_V7_ECP14 3 |
| 52 | 52 | #define ARM_DEBUG_ARCH_V7_MM 4 |
| 53 | +#define ARM_DEBUG_ARCH_V7_1 5 | |
| 53 | 54 | |
| 54 | 55 | /* Breakpoint */ |
| 55 | 56 | #define ARM_BREAKPOINT_EXECUTE 0 |
| @@ -57,6 +58,7 @@ static inline void decode_ctrl_reg(u32 reg, · 1 unmodified line | ||
| 57 | 58 | /* Watchpoints */ |
| 58 | 59 | #define ARM_BREAKPOINT_LOAD 1 |
| 59 | 60 | #define ARM_BREAKPOINT_STORE 2 |
| 61 | +#define ARM_FSR_ACCESS_MASK (1 << 11) | |
| 60 | 62 | |
| 61 | 63 | /* Privilege Levels */ |
| 62 | 64 | #define ARM_BREAKPOINT_PRIV 1 |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | #define __ASM_ARM_LOCALTIMER_H |
| 12 | 12 | |
| 13 | 13 | #include <linux/errno.h> |
| 14 | +#include <linux/interrupt.h> | |
| 14 | 15 | |
| 15 | 16 | struct clock_event_device; |
| 16 | 17 | |
| @@ -19,31 +20,20 @@ struct clock_event_device; · 2 unmodified lines | ||
| 19 | 20 | */ |
| 20 | 21 | void percpu_timer_setup(void); |
| 21 | 22 | |
| 22 | −/* | |
| 23 | − * Called from assembly, this is the local timer IRQ handler | |
| 24 | − */ | |
| 25 | −asmlinkage void do_local_timer(struct pt_regs *); | |
| 26 | − | |
| 27 | −/* | |
| 28 | − * Called from C code | |
| 29 | − */ | |
| 30 | −void handle_local_timer(struct pt_regs *); | |
| 31 | − | |
| 32 | 23 | #ifdef CONFIG_LOCAL_TIMERS |
| 33 | 24 | |
| 34 | 25 | #ifdef CONFIG_HAVE_ARM_TWD |
| 35 | 26 | |
| 36 | 27 | #include "smp_twd.h" |
| 37 | 28 | |
| 38 | −#define local_timer_ack() twd_timer_ack() | |
| 29 | +#define local_timer_stop(c) twd_timer_stop((c)) | |
| 39 | 30 | |
| 40 | 31 | #else |
| 41 | 32 | |
| 42 | 33 | /* |
| 43 | − * Platform provides this to acknowledge a local timer IRQ. | |
| 44 | − * Returns true if the local timer IRQ is to be processed. | |
| 34 | + * Stop the local timer | |
| 45 | 35 | */ |
| 46 | −int local_timer_ack(void); | |
| 36 | +void local_timer_stop(struct clock_event_device *); | |
| 47 | 37 | |
| 48 | 38 | #endif |
| 49 | 39 | |
| @@ -58,6 +48,10 @@ static inline int local_timer_setup(struct clock_event_device *evt) · 8 unmodified lines | ||
| 58 | 48 | { |
| 59 | 49 | return -ENXIO; |
| 60 | 50 | } |
| 51 | + | |
| 52 | +static inline void local_timer_stop(struct clock_event_device *evt) | |
| 53 | +{ | |
| 54 | +} | |
| 61 | 55 | #endif |
| 62 | 56 | |
| 63 | 57 | #endif |
| @@ -17,7 +17,7 @@ struct sys_timer; · 16 unmodified lines | ||
| 17 | 17 | struct machine_desc { |
| 18 | 18 | unsigned int nr; /* architecture number */ |
| 19 | 19 | const char *name; /* architecture name */ |
| 20 | − unsigned long boot_params; /* tagged list */ | |
| 20 | + unsigned long atag_offset; /* tagged list (relative) */ | |
| 21 | 21 | const char **dt_compat; /* array of device tree |
| 22 | 22 | * 'compatible' strings */ |
| 23 | 23 | |
| @@ -29,6 +29,7 @@ struct map_desc { · 28 unmodified lines | ||
| 29 | 29 | #define MT_MEMORY_NONCACHED 11 |
| 30 | 30 | #define MT_MEMORY_DTCM 12 |
| 31 | 31 | #define MT_MEMORY_ITCM 13 |
| 32 | +#define MT_MEMORY_SO 14 | |
| 32 | 33 | |
| 33 | 34 | #ifdef CONFIG_MMU |
| 34 | 35 | extern void iotable_init(struct map_desc *, int); |
| @@ -16,9 +16,12 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <linux/compiler.h> |
| 17 | 17 | #include <linux/const.h> |
| 18 | 18 | #include <linux/types.h> |
| 19 | −#include <mach/memory.h> | |
| 20 | 19 | #include <asm/sizes.h> |
| 21 | 20 | |
| 21 | +#ifdef CONFIG_NEED_MACH_MEMORY_H | |
| 22 | +#include <mach/memory.h> | |
| 23 | +#endif | |
| 24 | + | |
| 22 | 25 | /* |
| 23 | 26 | * Allow for constants defined here to be used from assembly code |
| 24 | 27 | * by prepending the UL suffix only with actual C code compilation. |
| @@ -77,16 +80,7 @@ · 52 unmodified lines | ||
| 77 | 80 | */ |
| 78 | 81 | #define IOREMAP_MAX_ORDER 24 |
| 79 | 82 | |
| 80 | −/* | |
| 81 | − * Size of DMA-consistent memory region. Must be multiple of 2M, | |
| 82 | − * between 2MB and 14MB inclusive. | |
| 83 | − */ | |
| 84 | −#ifndef CONSISTENT_DMA_SIZE | |
| 85 | −#define CONSISTENT_DMA_SIZE SZ_2M | |
| 86 | −#endif | |
| 87 | − | |
| 88 | 83 | #define CONSISTENT_END (0xffe00000UL) |
| 89 | −#define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE) | |
| 90 | 84 | |
| 91 | 85 | #else /* CONFIG_MMU */ |
| 92 | 86 | |
| @@ -193,7 +187,11 @@ static inline unsigned long __phys_to_virt(unsigned long x) · 100 unmodified lines | ||
| 193 | 187 | #endif |
| 194 | 188 | |
| 195 | 189 | #ifndef PHYS_OFFSET |
| 190 | +#ifdef PLAT_PHYS_OFFSET | |
| 196 | 191 | #define PHYS_OFFSET PLAT_PHYS_OFFSET |
| 192 | +#else | |
| 193 | +#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) | |
| 194 | +#endif | |
| 197 | 195 | #endif |
| 198 | 196 | |
| 199 | 197 | /* |
| @@ -6,7 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | typedef struct { |
| 7 | 7 | #ifdef CONFIG_CPU_HAS_ASID |
| 8 | 8 | unsigned int id; |
| 9 | − spinlock_t id_lock; | |
| 9 | + raw_spinlock_t id_lock; | |
| 10 | 10 | #endif |
| 11 | 11 | unsigned int kvm_seq; |
| 12 | 12 | } mm_context_t; |
| @@ -16,7 +16,7 @@ typedef struct { · 3 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | /* init_mm.context.id_lock should be initialized. */ |
| 18 | 18 | #define INIT_MM_CONTEXT(name) \ |
| 19 | − .context.id_lock = __SPIN_LOCK_UNLOCKED(name.context.id_lock), | |
| 19 | + .context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock), | |
| 20 | 20 | #else |
| 21 | 21 | #define ASID(mm) (0) |
| 22 | 22 | #endif |
| @@ -101,6 +101,9 @@ extern pgprot_t pgprot_kernel; · 100 unmodified lines | ||
| 101 | 101 | #define pgprot_writecombine(prot) \ |
| 102 | 102 | __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE) |
| 103 | 103 | |
| 104 | +#define pgprot_stronglyordered(prot) \ | |
| 105 | + __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED) | |
| 106 | + | |
| 104 | 107 | #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE |
| 105 | 108 | #define pgprot_dmacoherent(prot) \ |
| 106 | 109 | __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN) |
| @@ -13,7 +13,12 @@ · 12 unmodified lines | ||
| 13 | 13 | #define __ARM_PMU_H__ |
| 14 | 14 | |
| 15 | 15 | #include <linux/interrupt.h> |
| 16 | +#include <linux/perf_event.h> | |
| 16 | 17 | |
| 18 | +/* | |
| 19 | + * Types of PMUs that can be accessed directly and require mutual | |
| 20 | + * exclusion between profiling tools. | |
| 21 | + */ | |
| 17 | 22 | enum arm_pmu_type { |
| 18 | 23 | ARM_PMU_DEVICE_CPU = 0, |
| 19 | 24 | ARM_NUM_PMU_DEVICES, |
| @@ -37,21 +42,17 @@ struct arm_pmu_platdata { · 17 unmodified lines | ||
| 37 | 42 | * reserve_pmu() - reserve the hardware performance counters |
| 38 | 43 | * |
| 39 | 44 | * Reserve the hardware performance counters in the system for exclusive use. |
| 40 | − * The platform_device for the system is returned on success, ERR_PTR() | |
| 41 | − * encoded error on failure. | |
| 45 | + * Returns 0 on success or -EBUSY if the lock is already held. | |
| 42 | 46 | */ |
| 43 | −extern struct platform_device * | |
| 47 | +extern int | |
| 44 | 48 | reserve_pmu(enum arm_pmu_type type); |
| 45 | 49 | |
| 46 | 50 | /** |
| 47 | 51 | * release_pmu() - Relinquish control of the performance counters |
| 48 | 52 | * |
| 49 | 53 | * Release the performance counters and allow someone else to use them. |
| 50 | − * Callers must have disabled the counters and released IRQs before calling | |
| 51 | − * this. The platform_device returned from reserve_pmu() must be passed as | |
| 52 | − * a cookie. | |
| 53 | 54 | */ |
| 54 | −extern int | |
| 55 | +extern void | |
| 55 | 56 | release_pmu(enum arm_pmu_type type); |
| 56 | 57 | |
| 57 | 58 | /** |
| @@ -68,24 +69,78 @@ init_pmu(enum arm_pmu_type type); · 10 unmodified lines | ||
| 68 | 69 | |
| 69 | 70 | #include <linux/err.h> |
| 70 | 71 | |
| 71 | −static inline struct platform_device * | |
| 72 | −reserve_pmu(enum arm_pmu_type type) | |
| 73 | −{ | |
| 74 | − return ERR_PTR(-ENODEV); | |
| 75 | −} | |
| 76 | − | |
| 77 | 72 | static inline int |
| 78 | −release_pmu(enum arm_pmu_type type) | |
| 73 | +reserve_pmu(enum arm_pmu_type type) | |
| 79 | 74 | { |
| 80 | 75 | return -ENODEV; |
| 81 | 76 | } |
| 82 | 77 | |
| 83 | −static inline int | |
| 84 | −init_pmu(enum arm_pmu_type type) | |
| 85 | −{ | |
| 86 | − return -ENODEV; | |
| 87 | −} | |
| 78 | +static inline void | |
| 79 | +release_pmu(enum arm_pmu_type type) { } | |
| 88 | 80 | |
| 89 | 81 | #endif /* CONFIG_CPU_HAS_PMU */ |
| 90 | 82 | |
| 83 | +#ifdef CONFIG_HW_PERF_EVENTS | |
| 84 | + | |
| 85 | +/* The events for a given PMU register set. */ | |
| 86 | +struct pmu_hw_events { | |
| 87 | + /* | |
| 88 | + * The events that are active on the PMU for the given index. | |
| 89 | + */ | |
| 90 | + struct perf_event **events; | |
| 91 | + | |
| 92 | + /* | |
| 93 | + * A 1 bit for an index indicates that the counter is being used for | |
| 94 | + * an event. A 0 means that the counter can be used. | |
| 95 | + */ | |
| 96 | + unsigned long *used_mask; | |
| 97 | + | |
| 98 | + /* | |
| 99 | + * Hardware lock to serialize accesses to PMU registers. Needed for the | |
| 100 | + * read/modify/write sequences. | |
| 101 | + */ | |
| 102 | + raw_spinlock_t pmu_lock; | |
| 103 | +}; | |
| 104 | + | |
| 105 | +struct arm_pmu { | |
| 106 | + struct pmu pmu; | |
| 107 | + enum arm_perf_pmu_ids id; | |
| 108 | + enum arm_pmu_type type; | |
| 109 | + cpumask_t active_irqs; | |
| 110 | + const char *name; | |
| 111 | + irqreturn_t (*handle_irq)(int irq_num, void *dev); | |
| 112 | + void (*enable)(struct hw_perf_event *evt, int idx); | |
| 113 | + void (*disable)(struct hw_perf_event *evt, int idx); | |
| 114 | + int (*get_event_idx)(struct pmu_hw_events *hw_events, | |
| 115 | + struct hw_perf_event *hwc); | |
| 116 | + int (*set_event_filter)(struct hw_perf_event *evt, | |
| 117 | + struct perf_event_attr *attr); | |
| 118 | + u32 (*read_counter)(int idx); | |
| 119 | + void (*write_counter)(int idx, u32 val); | |
| 120 | + void (*start)(void); | |
| 121 | + void (*stop)(void); | |
| 122 | + void (*reset)(void *); | |
| 123 | + int (*map_event)(struct perf_event *event); | |
| 124 | + int num_events; | |
| 125 | + atomic_t active_events; | |
| 126 | + struct mutex reserve_mutex; | |
| 127 | + u64 max_period; | |
| 128 | + struct platform_device *plat_device; | |
| 129 | + struct pmu_hw_events *(*get_hw_events)(void); | |
| 130 | +}; | |
| 131 | + | |
| 132 | +#define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu)) | |
| 133 | + | |
| 134 | +int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type); | |
| 135 | + | |
| 136 | +u64 armpmu_event_update(struct perf_event *event, | |
| 137 | + struct hw_perf_event *hwc, | |
| 138 | + int idx, int overflow); | |
| 139 | + | |
| 140 | +int armpmu_event_set_period(struct perf_event *event, | |
| 141 | + struct hw_perf_event *hwc, | |
| 142 | + int idx); | |
| 143 | + | |
| 144 | +#endif /* CONFIG_HW_PERF_EVENTS */ | |
| 145 | + | |
| 91 | 146 | #endif /* __ARM_PMU_H__ */ |
| @@ -81,6 +81,10 @@ extern void cpu_dcache_clean_area(void *, int); · 80 unmodified lines | ||
| 81 | 81 | extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); |
| 82 | 82 | extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); |
| 83 | 83 | extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); |
| 84 | + | |
| 85 | +/* These three are private to arch/arm/kernel/suspend.c */ | |
| 86 | +extern void cpu_do_suspend(void *); | |
| 87 | +extern void cpu_do_resume(void *); | |
| 84 | 88 | #else |
| 85 | 89 | #define cpu_proc_init processor._proc_init |
| 86 | 90 | #define cpu_proc_fin processor._proc_fin |
| @@ -89,6 +93,10 @@ extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); · 2 unmodified lines | ||
| 89 | 93 | #define cpu_dcache_clean_area processor.dcache_clean_area |
| 90 | 94 | #define cpu_set_pte_ext processor.set_pte_ext |
| 91 | 95 | #define cpu_do_switch_mm processor.switch_mm |
| 96 | + | |
| 97 | +/* These three are private to arch/arm/kernel/suspend.c */ | |
| 98 | +#define cpu_do_suspend processor.do_suspend | |
| 99 | +#define cpu_do_resume processor.do_resume | |
| 92 | 100 | #endif |
| 93 | 101 | |
| 94 | 102 | extern void cpu_resume(void); |
| @@ -99,9 +99,4 @@ extern void platform_cpu_enable(unsigned int cpu); · 98 unmodified lines | ||
| 99 | 99 | extern void arch_send_call_function_single_ipi(int cpu); |
| 100 | 100 | extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); |
| 101 | 101 | |
| 102 | −/* | |
| 103 | − * show local interrupt info | |
| 104 | − */ | |
| 105 | −extern void show_local_irqs(struct seq_file *, int); | |
| 106 | − | |
| 107 | 102 | #endif /* ifndef __ASM_ARM_SMP_H */ |
| @@ -22,7 +22,7 @@ struct clock_event_device; · 21 unmodified lines | ||
| 22 | 22 | |
| 23 | 23 | extern void __iomem *twd_base; |
| 24 | 24 | |
| 25 | −int twd_timer_ack(void); | |
| 26 | 25 | void twd_timer_setup(struct clock_event_device *); |
| 26 | +void twd_timer_stop(struct clock_event_device *); | |
| 27 | 27 | |
| 28 | 28 | #endif |
| @@ -1,22 +1,7 @@ | ||
| 1 | 1 | #ifndef __ASM_ARM_SUSPEND_H |
| 2 | 2 | #define __ASM_ARM_SUSPEND_H |
| 3 | 3 | |
| 4 | −#include <asm/memory.h> | |
| 5 | −#include <asm/tlbflush.h> | |
| 6 | − | |
| 7 | 4 | extern void cpu_resume(void); |
| 8 | − | |
| 9 | −/* | |
| 10 | − * Hide the first two arguments to __cpu_suspend - these are an implementation | |
| 11 | − * detail which platform code shouldn't have to know about. | |
| 12 | − */ | |
| 13 | −static inline int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) | |
| 14 | −{ | |
| 15 | − extern int __cpu_suspend(int, long, unsigned long, | |
| 16 | − int (*)(unsigned long)); | |
| 17 | − int ret = __cpu_suspend(0, PHYS_OFFSET - PAGE_OFFSET, arg, fn); | |
| 18 | − flush_tlb_all(); | |
| 19 | − return ret; | |
| 20 | −} | |
| 5 | +extern int cpu_suspend(unsigned long, int (*)(unsigned long)); | |
| 21 | 6 | |
| 22 | 7 | #endif |
| @@ -29,7 +29,7 @@ obj-$(CONFIG_MODULES) += armksyms.o module.o · 28 unmodified lines | ||
| 29 | 29 | obj-$(CONFIG_ARTHUR) += arthur.o |
| 30 | 30 | obj-$(CONFIG_ISA_DMA) += dma-isa.o |
| 31 | 31 | obj-$(CONFIG_PCI) += bios32.o isa.o |
| 32 | −obj-$(CONFIG_ARM_CPU_SUSPEND) += sleep.o | |
| 32 | +obj-$(CONFIG_ARM_CPU_SUSPEND) += sleep.o suspend.o | |
| 33 | 33 | obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o |
| 34 | 34 | obj-$(CONFIG_SMP) += smp.o smp_tlb.o |
| 35 | 35 | obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o |
| @@ -43,6 +43,13 @@ obj-$(CONFIG_KPROBES) += kprobes-thumb.o · 7 unmodified lines | ||
| 43 | 43 | else |
| 44 | 44 | obj-$(CONFIG_KPROBES) += kprobes-arm.o |
| 45 | 45 | endif |
| 46 | +obj-$(CONFIG_ARM_KPROBES_TEST) += test-kprobes.o | |
| 47 | +test-kprobes-objs := kprobes-test.o | |
| 48 | +ifdef CONFIG_THUMB2_KERNEL | |
| 49 | +test-kprobes-objs += kprobes-test-thumb.o | |
| 50 | +else | |
| 51 | +test-kprobes-objs += kprobes-test-arm.o | |
| 52 | +endif | |
| 46 | 53 | obj-$(CONFIG_ATAGS_PROC) += atags.o |
| 47 | 54 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o |
| 48 | 55 | obj-$(CONFIG_ARM_THUMBEE) += thumbee.o |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | 8 | * published by the Free Software Foundation. |
| 9 | 9 | */ |
| 10 | −#include <linux/module.h> | |
| 10 | +#include <linux/export.h> | |
| 11 | 11 | #include <linux/sched.h> |
| 12 | 12 | #include <linux/string.h> |
| 13 | 13 | #include <linux/cryptohash.h> |
| @@ -5,7 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | * |
| 6 | 6 | * Bits taken from various places. |
| 7 | 7 | */ |
| 8 | −#include <linux/module.h> | |
| 8 | +#include <linux/export.h> | |
| 9 | 9 | #include <linux/kernel.h> |
| 10 | 10 | #include <linux/pci.h> |
| 11 | 11 | #include <linux/slab.h> |
| @@ -22,7 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #if defined(CONFIG_DEBUG_ICEDCC) |
| 23 | 23 | @@ debug using ARM EmbeddedICE DCC channel |
| 24 | 24 | |
| 25 | − .macro addruart, rp, rv | |
| 25 | + .macro addruart, rp, rv, tmp | |
| 26 | 26 | .endm |
| 27 | 27 | |
| 28 | 28 | #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) |
| @@ -106,7 +106,7 @@ · 77 unmodified lines | ||
| 106 | 106 | |
| 107 | 107 | #ifdef CONFIG_MMU |
| 108 | 108 | .macro addruart_current, rx, tmp1, tmp2 |
| 109 | − addruart \tmp1, \tmp2 | |
| 109 | + addruart \tmp1, \tmp2, \rx | |
| 110 | 110 | mrc p15, 0, \rx, c1, c0 |
| 111 | 111 | tst \rx, #1 |
| 112 | 112 | moveq \rx, \tmp1 |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | */ |
| 10 | 10 | |
| 11 | 11 | #include <linux/init.h> |
| 12 | −#include <linux/module.h> | |
| 12 | +#include <linux/export.h> | |
| 13 | 13 | #include <linux/errno.h> |
| 14 | 14 | #include <linux/types.h> |
| 15 | 15 | #include <linux/bootmem.h> |
| @@ -23,7 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | |
| 24 | 24 | #include <asm/mach/dma.h> |
| 25 | 25 | |
| 26 | −DEFINE_SPINLOCK(dma_spin_lock); | |
| 26 | +DEFINE_RAW_SPINLOCK(dma_spin_lock); | |
| 27 | 27 | EXPORT_SYMBOL(dma_spin_lock); |
| 28 | 28 | |
| 29 | 29 | static dma_t *dma_chan[MAX_DMA_CHANNELS]; |
| @@ -1,4 +1,4 @@ | ||
| 1 | −#include <linux/module.h> | |
| 1 | +#include <linux/export.h> | |
| 2 | 2 | #include <linux/sched.h> |
| 3 | 3 | #include <linux/personality.h> |
| 4 | 4 | #include <linux/binfmts.h> |
| @@ -24,6 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/miscdevice.h> |
| 25 | 25 | #include <linux/vmalloc.h> |
| 26 | 26 | #include <linux/mutex.h> |
| 27 | +#include <linux/module.h> | |
| 27 | 28 | #include <asm/hardware/coresight.h> |
| 28 | 29 | #include <asm/sections.h> |
| 29 | 30 | |
| @@ -99,7 +99,7 @@ ENTRY(stext) · 98 unmodified lines | ||
| 99 | 99 | sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) |
| 100 | 100 | add r8, r8, r4 @ PHYS_OFFSET |
| 101 | 101 | #else |
| 102 | − ldr r8, =PLAT_PHYS_OFFSET | |
| 102 | + ldr r8, =PHYS_OFFSET @ always constant in this case | |
| 103 | 103 | #endif |
| 104 | 104 | |
| 105 | 105 | /* |
| @@ -238,7 +238,7 @@ __create_page_tables: · 132 unmodified lines | ||
| 238 | 238 | * This allows debug messages to be output |
| 239 | 239 | * via a serial console before paging_init. |
| 240 | 240 | */ |
| 241 | − addruart r7, r3 | |
| 241 | + addruart r7, r3, r0 | |
| 242 | 242 | |
| 243 | 243 | mov r3, r3, lsr #SECTION_SHIFT |
| 244 | 244 | mov r3, r3, lsl #PMD_ORDER |
| @@ -45,7 +45,6 @@ static DEFINE_PER_CPU(struct perf_event *, wp_on_reg[ARM_MAX_WRP]); · 44 unmodified lines | ||
| 45 | 45 | |
| 46 | 46 | /* Number of BRP/WRP registers on this CPU. */ |
| 47 | 47 | static int core_num_brps; |
| 48 | −static int core_num_reserved_brps; | |
| 49 | 48 | static int core_num_wrps; |
| 50 | 49 | |
| 51 | 50 | /* Debug architecture version. */ |
| @@ -137,10 +136,11 @@ static u8 get_debug_arch(void) · 85 unmodified lines | ||
| 137 | 136 | u32 didr; |
| 138 | 137 | |
| 139 | 138 | /* Do we implement the extended CPUID interface? */ |
| 140 | − if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf), | |
| 141 | − "CPUID feature registers not supported. " | |
| 142 | − "Assuming v6 debug is present.\n")) | |
| 139 | + if (((read_cpuid_id() >> 16) & 0xf) != 0xf) { | |
| 140 | + pr_warning("CPUID feature registers not supported. " | |
| 141 | + "Assuming v6 debug is present.\n"); | |
| 143 | 142 | return ARM_DEBUG_ARCH_V6; |
| 143 | + } | |
| 144 | 144 | |
| 145 | 145 | ARM_DBG_READ(c0, 0, didr); |
| 146 | 146 | return (didr >> 16) & 0xf; |
| @@ -154,10 +154,21 @@ u8 arch_get_debug_arch(void) · 7 unmodified lines | ||
| 154 | 154 | static int debug_arch_supported(void) |
| 155 | 155 | { |
| 156 | 156 | u8 arch = get_debug_arch(); |
| 157 | − return arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14; | |
| 157 | + | |
| 158 | + /* We don't support the memory-mapped interface. */ | |
| 159 | + return (arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14) || | |
| 160 | + arch >= ARM_DEBUG_ARCH_V7_1; | |
| 161 | +} | |
| 162 | + | |
| 163 | +/* Determine number of WRP registers available. */ | |
| 164 | +static int get_num_wrp_resources(void) | |
| 165 | +{ | |
| 166 | + u32 didr; | |
| 167 | + ARM_DBG_READ(c0, 0, didr); | |
| 168 | + return ((didr >> 28) & 0xf) + 1; | |
| 158 | 169 | } |
| 159 | 170 | |
| 160 | −/* Determine number of BRP register available. */ | |
| 171 | +/* Determine number of BRP registers available. */ | |
| 161 | 172 | static int get_num_brp_resources(void) |
| 162 | 173 | { |
| 163 | 174 | u32 didr; |
| @@ -176,9 +187,10 @@ static int core_has_mismatch_brps(void) · 12 unmodified lines | ||
| 176 | 187 | static int get_num_wrps(void) |
| 177 | 188 | { |
| 178 | 189 | /* |
| 179 | − * FIXME: When a watchpoint fires, the only way to work out which | |
| 180 | − * watchpoint it was is by disassembling the faulting instruction | |
| 181 | − * and working out the address of the memory access. | |
| 190 | + * On debug architectures prior to 7.1, when a watchpoint fires, the | |
| 191 | + * only way to work out which watchpoint it was is by disassembling | |
| 192 | + * the faulting instruction and working out the address of the memory | |
| 193 | + * access. | |
| 182 | 194 | * |
| 183 | 195 | * Furthermore, we can only do this if the watchpoint was precise |
| 184 | 196 | * since imprecise watchpoints prevent us from calculating register |
| @@ -192,36 +204,17 @@ static int get_num_wrps(void) · 7 unmodified lines | ||
| 192 | 204 | * [the ARM ARM states that the DFAR is UNKNOWN, but experience shows |
| 193 | 205 | * that it is set on some implementations]. |
| 194 | 206 | */ |
| 207 | + if (get_debug_arch() < ARM_DEBUG_ARCH_V7_1) | |
| 208 | + return 1; | |
| 195 | 209 | |
| 196 | −#if 0 | |
| 197 | − int wrps; | |
| 198 | − u32 didr; | |
| 199 | − ARM_DBG_READ(c0, 0, didr); | |
| 200 | − wrps = ((didr >> 28) & 0xf) + 1; | |
| 201 | −#endif | |
| 202 | − int wrps = 1; | |
| 203 | − | |
| 204 | − if (core_has_mismatch_brps() && wrps >= get_num_brp_resources()) | |
| 205 | − wrps = get_num_brp_resources() - 1; | |
| 206 | − | |
| 207 | − return wrps; | |
| 208 | −} | |
| 209 | − | |
| 210 | −/* We reserve one breakpoint for each watchpoint. */ | |
| 211 | −static int get_num_reserved_brps(void) | |
| 212 | −{ | |
| 213 | − if (core_has_mismatch_brps()) | |
| 214 | − return get_num_wrps(); | |
| 215 | − return 0; | |
| 210 | + return get_num_wrp_resources(); | |
| 216 | 211 | } |
| 217 | 212 | |
| 218 | 213 | /* Determine number of usable BRPs available. */ |
| 219 | 214 | static int get_num_brps(void) |
| 220 | 215 | { |
| 221 | 216 | int brps = get_num_brp_resources(); |
| 222 | − if (core_has_mismatch_brps()) | |
| 223 | − brps -= get_num_reserved_brps(); | |
| 224 | − return brps; | |
| 217 | + return core_has_mismatch_brps() ? brps - 1 : brps; | |
| 225 | 218 | } |
| 226 | 219 | |
| 227 | 220 | /* |
| @@ -239,7 +232,7 @@ static int enable_monitor_mode(void) · 11 unmodified lines | ||
| 239 | 232 | |
| 240 | 233 | /* Ensure that halting mode is disabled. */ |
| 241 | 234 | if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN, |
| 242 | − "halting debug mode enabled. Unable to access hardware resources.\n")) { | |
| 235 | + "halting debug mode enabled. Unable to access hardware resources.\n")) { | |
| 243 | 236 | ret = -EPERM; |
| 244 | 237 | goto out; |
| 245 | 238 | } |
| @@ -255,6 +248,7 @@ static int enable_monitor_mode(void) · 9 unmodified lines | ||
| 255 | 248 | ARM_DBG_WRITE(c1, 0, (dscr | ARM_DSCR_MDBGEN)); |
| 256 | 249 | break; |
| 257 | 250 | case ARM_DEBUG_ARCH_V7_ECP14: |
| 251 | + case ARM_DEBUG_ARCH_V7_1: | |
| 258 | 252 | ARM_DBG_WRITE(c2, 2, (dscr | ARM_DSCR_MDBGEN)); |
| 259 | 253 | break; |
| 260 | 254 | default: |
| @@ -346,24 +340,10 @@ int arch_install_hw_breakpoint(struct perf_event *bp) · 85 unmodified lines | ||
| 346 | 340 | val_base = ARM_BASE_BVR; |
| 347 | 341 | slots = (struct perf_event **)__get_cpu_var(bp_on_reg); |
| 348 | 342 | max_slots = core_num_brps; |
| 349 | − if (info->step_ctrl.enabled) { | |
| 350 | − /* Override the breakpoint data with the step data. */ | |
| 351 | − addr = info->trigger & ~0x3; | |
| 352 | − ctrl = encode_ctrl_reg(info->step_ctrl); | |
| 353 | − } | |
| 354 | 343 | } else { |
| 355 | 344 | /* Watchpoint */ |
| 356 | − if (info->step_ctrl.enabled) { | |
| 357 | − /* Install into the reserved breakpoint region. */ | |
| 358 | − ctrl_base = ARM_BASE_BCR + core_num_brps; | |
| 359 | − val_base = ARM_BASE_BVR + core_num_brps; | |
| 360 | − /* Override the watchpoint data with the step data. */ | |
| 361 | − addr = info->trigger & ~0x3; | |
| 362 | − ctrl = encode_ctrl_reg(info->step_ctrl); | |
| 363 | − } else { | |
| 364 | − ctrl_base = ARM_BASE_WCR; | |
| 365 | − val_base = ARM_BASE_WVR; | |
| 366 | − } | |
| 345 | + ctrl_base = ARM_BASE_WCR; | |
| 346 | + val_base = ARM_BASE_WVR; | |
| 367 | 347 | slots = (struct perf_event **)__get_cpu_var(wp_on_reg); |
| 368 | 348 | max_slots = core_num_wrps; |
| 369 | 349 | } |
| @@ -382,6 +362,17 @@ int arch_install_hw_breakpoint(struct perf_event *bp) · 12 unmodified lines | ||
| 382 | 362 | goto out; |
| 383 | 363 | } |
| 384 | 364 | |
| 365 | + /* Override the breakpoint data with the step data. */ | |
| 366 | + if (info->step_ctrl.enabled) { | |
| 367 | + addr = info->trigger & ~0x3; | |
| 368 | + ctrl = encode_ctrl_reg(info->step_ctrl); | |
| 369 | + if (info->ctrl.type != ARM_BREAKPOINT_EXECUTE) { | |
| 370 | + i = 0; | |
| 371 | + ctrl_base = ARM_BASE_BCR + core_num_brps; | |
| 372 | + val_base = ARM_BASE_BVR + core_num_brps; | |
| 373 | + } | |
| 374 | + } | |
| 375 | + | |
| 385 | 376 | /* Setup the address register. */ |
| 386 | 377 | write_wb_reg(val_base + i, addr); |
| 387 | 378 | |
| @@ -405,10 +396,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp) · 17 unmodified lines | ||
| 405 | 396 | max_slots = core_num_brps; |
| 406 | 397 | } else { |
| 407 | 398 | /* Watchpoint */ |
| 408 | − if (info->step_ctrl.enabled) | |
| 409 | − base = ARM_BASE_BCR + core_num_brps; | |
| 410 | − else | |
| 411 | − base = ARM_BASE_WCR; | |
| 399 | + base = ARM_BASE_WCR; | |
| 412 | 400 | slots = (struct perf_event **)__get_cpu_var(wp_on_reg); |
| 413 | 401 | max_slots = core_num_wrps; |
| 414 | 402 | } |
| @@ -426,6 +414,13 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp) · 11 unmodified lines | ||
| 426 | 414 | if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n")) |
| 427 | 415 | return; |
| 428 | 416 | |
| 417 | + /* Ensure that we disable the mismatch breakpoint. */ | |
| 418 | + if (info->ctrl.type != ARM_BREAKPOINT_EXECUTE && | |
| 419 | + info->step_ctrl.enabled) { | |
| 420 | + i = 0; | |
| 421 | + base = ARM_BASE_BCR + core_num_brps; | |
| 422 | + } | |
| 423 | + | |
| 429 | 424 | /* Reset the control register. */ |
| 430 | 425 | write_wb_reg(base + i, 0); |
| 431 | 426 | } |
| @@ -632,10 +627,9 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) · 200 unmodified lines | ||
| 632 | 627 | * we can use the mismatch feature as a poor-man's hardware |
| 633 | 628 | * single-step, but this only works for per-task breakpoints. |
| 634 | 629 | */ |
| 635 | − if (WARN_ONCE(!bp->overflow_handler && | |
| 636 | − (arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_brps() | |
| 637 | − || !bp->hw.bp_target), | |
| 638 | − "overflow handler required but none found\n")) { | |
| 630 | + if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) || | |
| 631 | + !core_has_mismatch_brps() || !bp->hw.bp_target)) { | |
| 632 | + pr_warning("overflow handler required but none found\n"); | |
| 639 | 633 | ret = -EINVAL; |
| 640 | 634 | } |
| 641 | 635 | out: |
| @@ -666,34 +660,62 @@ static void disable_single_step(struct perf_event *bp) · 24 unmodified lines | ||
| 666 | 660 | arch_install_hw_breakpoint(bp); |
| 667 | 661 | } |
| 668 | 662 | |
| 669 | −static void watchpoint_handler(unsigned long unknown, struct pt_regs *regs) | |
| 663 | +static void watchpoint_handler(unsigned long addr, unsigned int fsr, | |
| 664 | + struct pt_regs *regs) | |
| 670 | 665 | { |
| 671 | − int i; | |
| 666 | + int i, access; | |
| 667 | + u32 val, ctrl_reg, alignment_mask; | |
| 672 | 668 | struct perf_event *wp, **slots; |
| 673 | 669 | struct arch_hw_breakpoint *info; |
| 670 | + struct arch_hw_breakpoint_ctrl ctrl; | |
| 674 | 671 | |
| 675 | 672 | slots = (struct perf_event **)__get_cpu_var(wp_on_reg); |
| 676 | 673 | |
| 677 | − /* Without a disassembler, we can only handle 1 watchpoint. */ | |
| 678 | − BUG_ON(core_num_wrps > 1); | |
| 679 | − | |
| 680 | 674 | for (i = 0; i < core_num_wrps; ++i) { |
| 681 | 675 | rcu_read_lock(); |
| 682 | 676 | |
| 683 | 677 | wp = slots[i]; |
| 684 | 678 | |
| 685 | − if (wp == NULL) { | |
| 686 | − rcu_read_unlock(); | |
| 687 | − continue; | |
| 688 | − } | |
| 679 | + if (wp == NULL) | |
| 680 | + goto unlock; | |
| 689 | 681 | |
| 682 | + info = counter_arch_bp(wp); | |
| 690 | 683 | /* |
| 691 | − * The DFAR is an unknown value. Since we only allow a | |
| 692 | − * single watchpoint, we can set the trigger to the lowest | |
| 693 | − * possible faulting address. | |
| 684 | + * The DFAR is an unknown value on debug architectures prior | |
| 685 | + * to 7.1. Since we only allow a single watchpoint on these | |
| 686 | + * older CPUs, we can set the trigger to the lowest possible | |
| 687 | + * faulting address. | |
| 694 | 688 | */ |
| 695 | − info = counter_arch_bp(wp); | |
| 696 | − info->trigger = wp->attr.bp_addr; | |
| 689 | + if (debug_arch < ARM_DEBUG_ARCH_V7_1) { | |
| 690 | + BUG_ON(i > 0); | |
| 691 | + info->trigger = wp->attr.bp_addr; | |
| 692 | + } else { | |
| 693 | + if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) | |
| 694 | + alignment_mask = 0x7; | |
| 695 | + else | |
| 696 | + alignment_mask = 0x3; | |
| 697 | + | |
| 698 | + /* Check if the watchpoint value matches. */ | |
| 699 | + val = read_wb_reg(ARM_BASE_WVR + i); | |
| 700 | + if (val != (addr & ~alignment_mask)) | |
| 701 | + goto unlock; | |
| 702 | + | |
| 703 | + /* Possible match, check the byte address select. */ | |
| 704 | + ctrl_reg = read_wb_reg(ARM_BASE_WCR + i); | |
| 705 | + decode_ctrl_reg(ctrl_reg, &ctrl); | |
| 706 | + if (!((1 << (addr & alignment_mask)) & ctrl.len)) | |
| 707 | + goto unlock; | |
| 708 | + | |
| 709 | + /* Check that the access type matches. */ | |
| 710 | + access = (fsr & ARM_FSR_ACCESS_MASK) ? HW_BREAKPOINT_W : | |
| 711 | + HW_BREAKPOINT_R; | |
| 712 | + if (!(access & hw_breakpoint_type(wp))) | |
| 713 | + goto unlock; | |
| 714 | + | |
| 715 | + /* We have a winner. */ | |
| 716 | + info->trigger = addr; | |
| 717 | + } | |
| 718 | + | |
| 697 | 719 | pr_debug("watchpoint fired: address = 0x%x\n", info->trigger); |
| 698 | 720 | perf_bp_event(wp, regs); |
| 699 | 721 | |
| @@ -705,6 +727,7 @@ static void watchpoint_handler(unsigned long unknown, struct pt_regs *regs) · 5 unmodified lines | ||
| 705 | 727 | if (!wp->overflow_handler) |
| 706 | 728 | enable_single_step(wp, instruction_pointer(regs)); |
| 707 | 729 | |
| 730 | +unlock: | |
| 708 | 731 | rcu_read_unlock(); |
| 709 | 732 | } |
| 710 | 733 | } |
| @@ -717,7 +740,7 @@ static void watchpoint_single_step_handler(unsigned long pc) · 6 unmodified lines | ||
| 717 | 740 | |
| 718 | 741 | slots = (struct perf_event **)__get_cpu_var(wp_on_reg); |
| 719 | 742 | |
| 720 | − for (i = 0; i < core_num_reserved_brps; ++i) { | |
| 743 | + for (i = 0; i < core_num_wrps; ++i) { | |
| 721 | 744 | rcu_read_lock(); |
| 722 | 745 | |
| 723 | 746 | wp = slots[i]; |
| @@ -820,7 +843,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, · 96 unmodified lines | ||
| 820 | 843 | case ARM_ENTRY_ASYNC_WATCHPOINT: |
| 821 | 844 | WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); |
| 822 | 845 | case ARM_ENTRY_SYNC_WATCHPOINT: |
| 823 | − watchpoint_handler(addr, regs); | |
| 846 | + watchpoint_handler(addr, fsr, regs); | |
| 824 | 847 | break; |
| 825 | 848 | default: |
| 826 | 849 | ret = 1; /* Unhandled fault. */ |
| @@ -834,11 +857,31 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, · 7 unmodified lines | ||
| 834 | 857 | /* |
| 835 | 858 | * One-time initialisation. |
| 836 | 859 | */ |
| 837 | −static void reset_ctrl_regs(void *info) | |
| 860 | +static cpumask_t debug_err_mask; | |
| 861 | + | |
| 862 | +static int debug_reg_trap(struct pt_regs *regs, unsigned int instr) | |
| 838 | 863 | { |
| 839 | − int i, cpu = smp_processor_id(); | |
| 864 | + int cpu = smp_processor_id(); | |
| 865 | + | |
| 866 | + pr_warning("Debug register access (0x%x) caused undefined instruction on CPU %d\n", | |
| 867 | + instr, cpu); | |
| 868 | + | |
| 869 | + /* Set the error flag for this CPU and skip the faulting instruction. */ | |
| 870 | + cpumask_set_cpu(cpu, &debug_err_mask); | |
| 871 | + instruction_pointer(regs) += 4; | |
| 872 | + return 0; | |
| 873 | +} | |
| 874 | + | |
| 875 | +static struct undef_hook debug_reg_hook = { | |
| 876 | + .instr_mask = 0x0fe80f10, | |
| 877 | + .instr_val = 0x0e000e10, | |
| 878 | + .fn = debug_reg_trap, | |
| 879 | +}; | |
| 880 | + | |
| 881 | +static void reset_ctrl_regs(void *unused) | |
| 882 | +{ | |
| 883 | + int i, raw_num_brps, err = 0, cpu = smp_processor_id(); | |
| 840 | 884 | u32 dbg_power; |
| 841 | − cpumask_t *cpumask = info; | |
| 842 | 885 | |
| 843 | 886 | /* |
| 844 | 887 | * v7 debug contains save and restore registers so that debug state |
| @@ -848,38 +891,57 @@ static void reset_ctrl_regs(void *info) · 3 unmodified lines | ||
| 848 | 891 | * Access Register to avoid taking undefined instruction exceptions |
| 849 | 892 | * later on. |
| 850 | 893 | */ |
| 851 | − if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { | |
| 894 | + switch (debug_arch) { | |
| 895 | + case ARM_DEBUG_ARCH_V6: | |
| 896 | + case ARM_DEBUG_ARCH_V6_1: | |
| 897 | + /* ARMv6 cores just need to reset the registers. */ | |
| 898 | + goto reset_regs; | |
| 899 | + case ARM_DEBUG_ARCH_V7_ECP14: | |
| 852 | 900 | /* |
| 853 | 901 | * Ensure sticky power-down is clear (i.e. debug logic is |
| 854 | 902 | * powered up). |
| 855 | 903 | */ |
| 856 | 904 | asm volatile("mrc p14, 0, %0, c1, c5, 4" : "=r" (dbg_power)); |
| 857 | − if ((dbg_power & 0x1) == 0) { | |
| 858 | − pr_warning("CPU %d debug is powered down!\n", cpu); | |
| 859 | − cpumask_or(cpumask, cpumask, cpumask_of(cpu)); | |
| 860 | − return; | |
| 861 | − } | |
| 862 | − | |
| 905 | + if ((dbg_power & 0x1) == 0) | |
| 906 | + err = -EPERM; | |
| 907 | + break; | |
| 908 | + case ARM_DEBUG_ARCH_V7_1: | |
| 863 | 909 | /* |
| 864 | − * Unconditionally clear the lock by writing a value | |
| 865 | − * other than 0xC5ACCE55 to the access register. | |
| 910 | + * Ensure the OS double lock is clear. | |
| 866 | 911 | */ |
| 867 | − asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0)); | |
| 868 | − isb(); | |
| 912 | + asm volatile("mrc p14, 0, %0, c1, c3, 4" : "=r" (dbg_power)); | |
| 913 | + if ((dbg_power & 0x1) == 1) | |
| 914 | + err = -EPERM; | |
| 915 | + break; | |
| 916 | + } | |
| 869 | 917 | |
| 870 | − /* | |
| 871 | − * Clear any configured vector-catch events before | |
| 872 | − * enabling monitor mode. | |
| 873 | − */ | |
| 874 | − asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0)); | |
| 875 | − isb(); | |
| 918 | + if (err) { | |
| 919 | + pr_warning("CPU %d debug is powered down!\n", cpu); | |
| 920 | + cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu)); | |
| 921 | + return; | |
| 876 | 922 | } |
| 877 | 923 | |
| 924 | + /* | |
| 925 | + * Unconditionally clear the lock by writing a value | |
| 926 | + * other than 0xC5ACCE55 to the access register. | |
| 927 | + */ | |
| 928 | + asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0)); | |
| 929 | + isb(); | |
| 930 | + | |
| 931 | + /* | |
| 932 | + * Clear any configured vector-catch events before | |
| 933 | + * enabling monitor mode. | |
| 934 | + */ | |
| 935 | + asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0)); | |
| 936 | + isb(); | |
| 937 | + | |
| 938 | +reset_regs: | |
| 878 | 939 | if (enable_monitor_mode()) |
| 879 | 940 | return; |
| 880 | 941 | |
| 881 | 942 | /* We must also reset any reserved registers. */ |
| 882 | − for (i = 0; i < core_num_brps + core_num_reserved_brps; ++i) { | |
| 943 | + raw_num_brps = get_num_brp_resources(); | |
| 944 | + for (i = 0; i < raw_num_brps; ++i) { | |
| 883 | 945 | write_wb_reg(ARM_BASE_BCR + i, 0UL); |
| 884 | 946 | write_wb_reg(ARM_BASE_BVR + i, 0UL); |
| 885 | 947 | } |
| @@ -895,6 +957,7 @@ static int __cpuinit dbg_reset_notify(struct notifier_block *self, · 9 unmodified lines | ||
| 895 | 957 | { |
| 896 | 958 | if (action == CPU_ONLINE) |
| 897 | 959 | smp_call_function_single((int)cpu, reset_ctrl_regs, NULL, 1); |
| 960 | + | |
| 898 | 961 | return NOTIFY_OK; |
| 899 | 962 | } |
| 900 | 963 | |
| @@ -905,7 +968,6 @@ static struct notifier_block __cpuinitdata dbg_reset_nb = { · 4 unmodified lines | ||
| 905 | 968 | static int __init arch_hw_breakpoint_init(void) |
| 906 | 969 | { |
| 907 | 970 | u32 dscr; |
| 908 | − cpumask_t cpumask = { CPU_BITS_NONE }; | |
| 909 | 971 | |
| 910 | 972 | debug_arch = get_debug_arch(); |
| 911 | 973 | |
| @@ -916,28 +978,31 @@ static int __init arch_hw_breakpoint_init(void) · 4 unmodified lines | ||
| 916 | 978 | |
| 917 | 979 | /* Determine how many BRPs/WRPs are available. */ |
| 918 | 980 | core_num_brps = get_num_brps(); |
| 919 | − core_num_reserved_brps = get_num_reserved_brps(); | |
| 920 | 981 | core_num_wrps = get_num_wrps(); |
| 921 | 982 | |
| 922 | − pr_info("found %d breakpoint and %d watchpoint registers.\n", | |
| 923 | − core_num_brps + core_num_reserved_brps, core_num_wrps); | |
| 924 | − | |
| 925 | − if (core_num_reserved_brps) | |
| 926 | − pr_info("%d breakpoint(s) reserved for watchpoint " | |
| 927 | − "single-step.\n", core_num_reserved_brps); | |
| 983 | + /* | |
| 984 | + * We need to tread carefully here because DBGSWENABLE may be | |
| 985 | + * driven low on this core and there isn't an architected way to | |
| 986 | + * determine that. | |
| 987 | + */ | |
| 988 | + register_undef_hook(&debug_reg_hook); | |
| 928 | 989 | |
| 929 | 990 | /* |
| 930 | 991 | * Reset the breakpoint resources. We assume that a halting |
| 931 | 992 | * debugger will leave the world in a nice state for us. |
| 932 | 993 | */ |
| 933 | − on_each_cpu(reset_ctrl_regs, &cpumask, 1); | |
| 934 | − if (!cpumask_empty(&cpumask)) { | |
| 994 | + on_each_cpu(reset_ctrl_regs, NULL, 1); | |
| 995 | + unregister_undef_hook(&debug_reg_hook); | |
| 996 | + if (!cpumask_empty(&debug_err_mask)) { | |
| 935 | 997 | core_num_brps = 0; |
| 936 | − core_num_reserved_brps = 0; | |
| 937 | 998 | core_num_wrps = 0; |
| 938 | 999 | return 0; |
| 939 | 1000 | } |
| 940 | 1001 | |
| 1002 | + pr_info("found %d " "%s" "breakpoint and %d watchpoint registers.\n", | |
| 1003 | + core_num_brps, core_has_mismatch_brps() ? "(+1 reserved) " : | |
| 1004 | + "", core_num_wrps); | |
| 1005 | + | |
| 941 | 1006 | ARM_DBG_READ(c1, 0, dscr); |
| 942 | 1007 | if (dscr & ARM_DSCR_HDBGEN) { |
| 943 | 1008 | max_watchpoint_len = 4; |
| @@ -1,4 +1,4 @@ | ||
| 1 | −#include <linux/module.h> | |
| 1 | +#include <linux/export.h> | |
| 2 | 2 | #include <linux/types.h> |
| 3 | 3 | #include <linux/io.h> |
| 4 | 4 | |
| @@ -22,7 +22,6 @@ · 21 unmodified lines | ||
| 22 | 22 | * Naturally it's not a 1:1 relation, but there are similarities. |
| 23 | 23 | */ |
| 24 | 24 | #include <linux/kernel_stat.h> |
| 25 | −#include <linux/module.h> | |
| 26 | 25 | #include <linux/signal.h> |
| 27 | 26 | #include <linux/ioport.h> |
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