Merge tag 'riscv-for-linus-6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt: - A pair of device tree fixes for the Polarfire SOC - A fix to avoid overflowing the PMU counter array when firmware incorrectly reports the number of supported counters, which manifests on OpenSBI versions prior to 1.1 * tag 'riscv-for-linus-6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: perf: RISC-V: fix access beyond allocated array riscv: dts: microchip: use an mpfs specific l2 compatible dt-bindings: riscv: sifive-l2: add a PolarFire SoC compatible

Linus Torvalds committed 4 years ago

Commit 22b2e2d2 parents 2fc1171 20e0fba3 files · +51 −32Browse files

Unified · Split

3 files

Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml +49 −30
arch/riscv/boot/dts/microchip/mpfs.dtsi +1 −1
drivers/perf/riscv_pmu_sbi.c +1 −1

Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml+49−30

@@ -17,9 +17,6 @@ description: · 16 unmodified lines
17	17	acts as directory-based coherency manager.
18	18	All the properties in ePAPR/DeviceTree specification applies for this platform.
19	19
20		−allOf:
21		− - $ref: /schemas/cache-controller.yaml#
22		−
23	20	select:
24	21	properties:
25	22	compatible:
@@ -33,11 +30,16 @@ select: · 7 unmodified lines
33	30
34	31	properties:
35	32	compatible:
36		− items:
37		− - enum:
38		− - sifive,fu540-c000-ccache
39		− - sifive,fu740-c000-ccache
40		− - const: cache
	33	+ oneOf:
	34	+ - items:
	35	+ - enum:
	36	+ - sifive,fu540-c000-ccache
	37	+ - sifive,fu740-c000-ccache
	38	+ - const: cache
	39	+ - items:
	40	+ - const: microchip,mpfs-ccache
	41	+ - const: sifive,fu540-c000-ccache
	42	+ - const: cache
41	43
42	44	cache-block-size:
43	45	const: 64
@@ -72,29 +74,46 @@ properties: · 28 unmodified lines
72	74	The reference to the reserved-memory for the L2 Loosely Integrated Memory region.
73	75	The reserved memory node should be defined as per the bindings in reserved-memory.txt.
74	76
75		−if:
76		− properties:
77		− compatible:
78		− contains:
79		− const: sifive,fu540-c000-ccache
	77	+allOf:
	78	+ - $ref: /schemas/cache-controller.yaml#
80	79
81		−then:
82		− properties:
83		− interrupts:
84		− description: \|
85		− Must contain entries for DirError, DataError and DataFail signals.
86		− maxItems: 3
87		− cache-sets:
88		− const: 1024
89		−
90		−else:
91		− properties:
92		− interrupts:
93		− description: \|
94		− Must contain entries for DirError, DataError, DataFail, DirFail signals.
95		− minItems: 4
96		− cache-sets:
97		− const: 2048
	80	+ - if:
	81	+ properties:
	82	+ compatible:
	83	+ contains:
	84	+ enum:
	85	+ - sifive,fu740-c000-ccache
	86	+ - microchip,mpfs-ccache
	87	+
	88	+ then:
	89	+ properties:
	90	+ interrupts:
	91	+ description: \|
	92	+ Must contain entries for DirError, DataError, DataFail, DirFail signals.
	93	+ minItems: 4
	94	+
	95	+ else:
	96	+ properties:
	97	+ interrupts:
	98	+ description: \|
	99	+ Must contain entries for DirError, DataError and DataFail signals.
	100	+ maxItems: 3
	101	+
	102	+ - if:
	103	+ properties:
	104	+ compatible:
	105	+ contains:
	106	+ const: sifive,fu740-c000-ccache
	107	+
	108	+ then:
	109	+ properties:
	110	+ cache-sets:
	111	+ const: 2048
	112	+
	113	+ else:
	114	+ properties:
	115	+ cache-sets:
	116	+ const: 1024
98	117
99	118	additionalProperties: false
100	119

arch/riscv/boot/dts/microchip/mpfs.dtsi+1−1

@@ -185,7 +185,7 @@ · 184 unmodified lines
185	185	ranges;
186	186
187	187	cctrllr: cache-controller@2010000 {
188		− compatible = "sifive,fu540-c000-ccache", "cache";
	188	+ compatible = "microchip,mpfs-ccache", "sifive,fu540-c000-ccache", "cache";
189	189	reg = <0x0 0x2010000 0x0 0x1000>;
190	190	cache-block-size = <64>;
191	191	cache-level = <2>;

drivers/perf/riscv_pmu_sbi.c+1−1

@@ -473,7 +473,7 @@ static int pmu_sbi_get_ctrinfo(int nctr) · 472 unmodified lines
473	473	if (!pmu_ctr_list)
474	474	return -ENOMEM;
475	475
476		− for (i = 0; i <= nctr; i++) {
	476	+ for (i = 0; i < nctr; i++) {
477	477	ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_GET_INFO, i, 0, 0, 0, 0, 0);
478	478	if (ret.error)
479	479	/* The logical counter ids are not expected to be contiguous */

Merge tag 'riscv-for-linus-6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

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