To catch up with recent rounds of pull requests and get some drm-misc dependencies so we can merge linux/string_helpers related changes.
Showing the changes to include/uapi (9 of 1716 files). Show all
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| @@ -206,6 +206,8 @@ union drm_amdgpu_bo_list { · 205 unmodified lines | ||
| 206 | 206 | #define AMDGPU_CTX_OP_FREE_CTX 2 |
| 207 | 207 | #define AMDGPU_CTX_OP_QUERY_STATE 3 |
| 208 | 208 | #define AMDGPU_CTX_OP_QUERY_STATE2 4 |
| 209 | +#define AMDGPU_CTX_OP_GET_STABLE_PSTATE 5 | |
| 210 | +#define AMDGPU_CTX_OP_SET_STABLE_PSTATE 6 | |
| 209 | 211 | |
| 210 | 212 | /* GPU reset status */ |
| 211 | 213 | #define AMDGPU_CTX_NO_RESET 0 |
| @@ -238,10 +240,18 @@ union drm_amdgpu_bo_list { · 26 unmodified lines | ||
| 238 | 240 | #define AMDGPU_CTX_PRIORITY_HIGH 512 |
| 239 | 241 | #define AMDGPU_CTX_PRIORITY_VERY_HIGH 1023 |
| 240 | 242 | |
| 243 | +/* select a stable profiling pstate for perfmon tools */ | |
| 244 | +#define AMDGPU_CTX_STABLE_PSTATE_FLAGS_MASK 0xf | |
| 245 | +#define AMDGPU_CTX_STABLE_PSTATE_NONE 0 | |
| 246 | +#define AMDGPU_CTX_STABLE_PSTATE_STANDARD 1 | |
| 247 | +#define AMDGPU_CTX_STABLE_PSTATE_MIN_SCLK 2 | |
| 248 | +#define AMDGPU_CTX_STABLE_PSTATE_MIN_MCLK 3 | |
| 249 | +#define AMDGPU_CTX_STABLE_PSTATE_PEAK 4 | |
| 250 | + | |
| 241 | 251 | struct drm_amdgpu_ctx_in { |
| 242 | 252 | /** AMDGPU_CTX_OP_* */ |
| 243 | 253 | __u32 op; |
| 244 | − /** For future use, no flags defined so far */ | |
| 254 | + /** Flags */ | |
| 245 | 255 | __u32 flags; |
| 246 | 256 | __u32 ctx_id; |
| 247 | 257 | /** AMDGPU_CTX_PRIORITY_* */ |
| @@ -262,6 +272,11 @@ union drm_amdgpu_ctx_out { · 14 unmodified lines | ||
| 262 | 272 | /** Reset status since the last call of the ioctl. */ |
| 263 | 273 | __u32 reset_status; |
| 264 | 274 | } state; |
| 275 | + | |
| 276 | + struct { | |
| 277 | + __u32 flags; | |
| 278 | + __u32 _pad; | |
| 279 | + } pstate; | |
| 265 | 280 | }; |
| 266 | 281 | |
| 267 | 282 | union drm_amdgpu_ctx { |
| @@ -728,6 +743,8 @@ struct drm_amdgpu_cs_chunk_data { · 460 unmodified lines | ||
| 728 | 743 | #define AMDGPU_INFO_FW_DMCUB 0x14 |
| 729 | 744 | /* Subquery id: Query TOC firmware version */ |
| 730 | 745 | #define AMDGPU_INFO_FW_TOC 0x15 |
| 746 | + /* Subquery id: Query CAP firmware version */ | |
| 747 | + #define AMDGPU_INFO_FW_CAP 0x16 | |
| 731 | 748 | |
| 732 | 749 | /* number of bytes moved for TTM migration */ |
| 733 | 750 | #define AMDGPU_INFO_NUM_BYTES_MOVED 0x0f |
| @@ -1134,6 +1151,8 @@ struct drm_amdgpu_info_video_caps { · 400 unmodified lines | ||
| 1134 | 1151 | #define AMDGPU_FAMILY_NV 143 /* Navi10 */ |
| 1135 | 1152 | #define AMDGPU_FAMILY_VGH 144 /* Van Gogh */ |
| 1136 | 1153 | #define AMDGPU_FAMILY_YC 146 /* Yellow Carp */ |
| 1154 | +#define AMDGPU_FAMILY_GC_10_3_6 149 /* GC 10.3.6 */ | |
| 1155 | +#define AMDGPU_FAMILY_GC_10_3_7 151 /* GC 10.3.7 */ | |
| 1137 | 1156 | |
| 1138 | 1157 | #if defined(__cplusplus) |
| 1139 | 1158 | } |
| @@ -663,41 +663,73 @@ struct drm_mode_fb_cmd { · 662 unmodified lines | ||
| 663 | 663 | #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ |
| 664 | 664 | #define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */ |
| 665 | 665 | |
| 666 | +/** | |
| 667 | + * struct drm_mode_fb_cmd2 - Frame-buffer metadata. | |
| 668 | + * | |
| 669 | + * This struct holds frame-buffer metadata. There are two ways to use it: | |
| 670 | + * | |
| 671 | + * - User-space can fill this struct and perform a &DRM_IOCTL_MODE_ADDFB2 | |
| 672 | + * ioctl to register a new frame-buffer. The new frame-buffer object ID will | |
| 673 | + * be set by the kernel in @fb_id. | |
| 674 | + * - User-space can set @fb_id and perform a &DRM_IOCTL_MODE_GETFB2 ioctl to | |
| 675 | + * fetch metadata about an existing frame-buffer. | |
| 676 | + * | |
| 677 | + * In case of planar formats, this struct allows up to 4 buffer objects with | |
| 678 | + * offsets and pitches per plane. The pitch and offset order is dictated by the | |
| 679 | + * format FourCC as defined by ``drm_fourcc.h``, e.g. NV12 is described as: | |
| 680 | + * | |
| 681 | + * YUV 4:2:0 image with a plane of 8 bit Y samples followed by an | |
| 682 | + * interleaved U/V plane containing 8 bit 2x2 subsampled colour difference | |
| 683 | + * samples. | |
| 684 | + * | |
| 685 | + * So it would consist of a Y plane at ``offsets[0]`` and a UV plane at | |
| 686 | + * ``offsets[1]``. | |
| 687 | + * | |
| 688 | + * To accommodate tiled, compressed, etc formats, a modifier can be specified. | |
| 689 | + * For more information see the "Format Modifiers" section. Note that even | |
| 690 | + * though it looks like we have a modifier per-plane, we in fact do not. The | |
| 691 | + * modifier for each plane must be identical. Thus all combinations of | |
| 692 | + * different data layouts for multi-plane formats must be enumerated as | |
| 693 | + * separate modifiers. | |
| 694 | + * | |
| 695 | + * All of the entries in @handles, @pitches, @offsets and @modifier must be | |
| 696 | + * zero when unused. Warning, for @offsets and @modifier zero can't be used to | |
| 697 | + * figure out whether the entry is used or not since it's a valid value (a zero | |
| 698 | + * offset is common, and a zero modifier is &DRM_FORMAT_MOD_LINEAR). | |
| 699 | + */ | |
| 666 | 700 | struct drm_mode_fb_cmd2 { |
| 701 | + /** @fb_id: Object ID of the frame-buffer. */ | |
| 667 | 702 | __u32 fb_id; |
| 703 | + /** @width: Width of the frame-buffer. */ | |
| 668 | 704 | __u32 width; |
| 705 | + /** @height: Height of the frame-buffer. */ | |
| 669 | 706 | __u32 height; |
| 670 | − __u32 pixel_format; /* fourcc code from drm_fourcc.h */ | |
| 671 | − __u32 flags; /* see above flags */ | |
| 707 | + /** | |
| 708 | + * @pixel_format: FourCC format code, see ``DRM_FORMAT_*`` constants in | |
| 709 | + * ``drm_fourcc.h``. | |
| 710 | + */ | |
| 711 | + __u32 pixel_format; | |
| 712 | + /** | |
| 713 | + * @flags: Frame-buffer flags (see &DRM_MODE_FB_INTERLACED and | |
| 714 | + * &DRM_MODE_FB_MODIFIERS). | |
| 715 | + */ | |
| 716 | + __u32 flags; | |
| 672 | 717 | |
| 673 | − /* | |
| 674 | − * In case of planar formats, this ioctl allows up to 4 | |
| 675 | − * buffer objects with offsets and pitches per plane. | |
| 676 | − * The pitch and offset order is dictated by the fourcc, | |
| 677 | − * e.g. NV12 (https://fourcc.org/yuv.php#NV12) is described as: | |
| 678 | − * | |
| 679 | − * YUV 4:2:0 image with a plane of 8 bit Y samples | |
| 680 | − * followed by an interleaved U/V plane containing | |
| 681 | − * 8 bit 2x2 subsampled colour difference samples. | |
| 682 | − * | |
| 683 | − * So it would consist of Y as offsets[0] and UV as | |
| 684 | − * offsets[1]. Note that offsets[0] will generally | |
| 685 | − * be 0 (but this is not required). | |
| 686 | − * | |
| 687 | − * To accommodate tiled, compressed, etc formats, a | |
| 688 | − * modifier can be specified. The default value of zero | |
| 689 | − * indicates "native" format as specified by the fourcc. | |
| 690 | − * Vendor specific modifier token. Note that even though | |
| 691 | − * it looks like we have a modifier per-plane, we in fact | |
| 692 | − * do not. The modifier for each plane must be identical. | |
| 693 | − * Thus all combinations of different data layouts for | |
| 694 | − * multi plane formats must be enumerated as separate | |
| 695 | − * modifiers. | |
| 718 | + /** | |
| 719 | + * @handles: GEM buffer handle, one per plane. Set to 0 if the plane is | |
| 720 | + * unused. The same handle can be used for multiple planes. | |
| 696 | 721 | */ |
| 697 | 722 | __u32 handles[4]; |
| 698 | − __u32 pitches[4]; /* pitch for each plane */ | |
| 699 | − __u32 offsets[4]; /* offset of each plane */ | |
| 700 | − __u64 modifier[4]; /* ie, tiling, compress */ | |
| 723 | + /** @pitches: Pitch (aka. stride) in bytes, one per plane. */ | |
| 724 | + __u32 pitches[4]; | |
| 725 | + /** @offsets: Offset into the buffer in bytes, one per plane. */ | |
| 726 | + __u32 offsets[4]; | |
| 727 | + /** | |
| 728 | + * @modifier: Format modifier, one per plane. See ``DRM_FORMAT_MOD_*`` | |
| 729 | + * constants in ``drm_fourcc.h``. All planes must use the same | |
| 730 | + * modifier. Ignored unless &DRM_MODE_FB_MODIFIERS is set in @flags. | |
| 731 | + */ | |
| 732 | + __u64 modifier[4]; | |
| 701 | 733 | }; |
| 702 | 734 | |
| 703 | 735 | #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 |
| @@ -32,9 +32,10 @@ · 31 unmodified lines | ||
| 32 | 32 | * - 1.4 - Indicate new SRAM EDC bit in device properties |
| 33 | 33 | * - 1.5 - Add SVM API |
| 34 | 34 | * - 1.6 - Query clear flags in SVM get_attr API |
| 35 | + * - 1.7 - Checkpoint Restore (CRIU) API | |
| 35 | 36 | */ |
| 36 | 37 | #define KFD_IOCTL_MAJOR_VERSION 1 |
| 37 | −#define KFD_IOCTL_MINOR_VERSION 6 | |
| 38 | +#define KFD_IOCTL_MINOR_VERSION 7 | |
| 38 | 39 | |
| 39 | 40 | struct kfd_ioctl_get_version_args { |
| 40 | 41 | __u32 major_version; /* from KFD */ |
| @@ -468,6 +469,82 @@ struct kfd_ioctl_smi_events_args { · 427 unmodified lines | ||
| 468 | 469 | __u32 anon_fd; /* from KFD */ |
| 469 | 470 | }; |
| 470 | 471 | |
| 472 | +/************************************************************************************************** | |
| 473 | + * CRIU IOCTLs (Checkpoint Restore In Userspace) | |
| 474 | + * | |
| 475 | + * When checkpointing a process, the userspace application will perform: | |
| 476 | + * 1. PROCESS_INFO op to determine current process information. This pauses execution and evicts | |
| 477 | + * all the queues. | |
| 478 | + * 2. CHECKPOINT op to checkpoint process contents (BOs, queues, events, svm-ranges) | |
| 479 | + * 3. UNPAUSE op to un-evict all the queues | |
| 480 | + * | |
| 481 | + * When restoring a process, the CRIU userspace application will perform: | |
| 482 | + * | |
| 483 | + * 1. RESTORE op to restore process contents | |
| 484 | + * 2. RESUME op to start the process | |
| 485 | + * | |
| 486 | + * Note: Queues are forced into an evicted state after a successful PROCESS_INFO. User | |
| 487 | + * application needs to perform an UNPAUSE operation after calling PROCESS_INFO. | |
| 488 | + */ | |
| 489 | + | |
| 490 | +enum kfd_criu_op { | |
| 491 | + KFD_CRIU_OP_PROCESS_INFO, | |
| 492 | + KFD_CRIU_OP_CHECKPOINT, | |
| 493 | + KFD_CRIU_OP_UNPAUSE, | |
| 494 | + KFD_CRIU_OP_RESTORE, | |
| 495 | + KFD_CRIU_OP_RESUME, | |
| 496 | +}; | |
| 497 | + | |
| 498 | +/** | |
| 499 | + * kfd_ioctl_criu_args - Arguments perform CRIU operation | |
| 500 | + * @devices: [in/out] User pointer to memory location for devices information. | |
| 501 | + * This is an array of type kfd_criu_device_bucket. | |
| 502 | + * @bos: [in/out] User pointer to memory location for BOs information | |
| 503 | + * This is an array of type kfd_criu_bo_bucket. | |
| 504 | + * @priv_data: [in/out] User pointer to memory location for private data | |
| 505 | + * @priv_data_size: [in/out] Size of priv_data in bytes | |
| 506 | + * @num_devices: [in/out] Number of GPUs used by process. Size of @devices array. | |
| 507 | + * @num_bos [in/out] Number of BOs used by process. Size of @bos array. | |
| 508 | + * @num_objects: [in/out] Number of objects used by process. Objects are opaque to | |
| 509 | + * user application. | |
| 510 | + * @pid: [in/out] PID of the process being checkpointed | |
| 511 | + * @op [in] Type of operation (kfd_criu_op) | |
| 512 | + * | |
| 513 | + * Return: 0 on success, -errno on failure | |
| 514 | + */ | |
| 515 | +struct kfd_ioctl_criu_args { | |
| 516 | + __u64 devices; /* Used during ops: CHECKPOINT, RESTORE */ | |
| 517 | + __u64 bos; /* Used during ops: CHECKPOINT, RESTORE */ | |
| 518 | + __u64 priv_data; /* Used during ops: CHECKPOINT, RESTORE */ | |
| 519 | + __u64 priv_data_size; /* Used during ops: PROCESS_INFO, RESTORE */ | |
| 520 | + __u32 num_devices; /* Used during ops: PROCESS_INFO, RESTORE */ | |
| 521 | + __u32 num_bos; /* Used during ops: PROCESS_INFO, RESTORE */ | |
| 522 | + __u32 num_objects; /* Used during ops: PROCESS_INFO, RESTORE */ | |
| 523 | + __u32 pid; /* Used during ops: PROCESS_INFO, RESUME */ | |
| 524 | + __u32 op; | |
| 525 | +}; | |
| 526 | + | |
| 527 | +struct kfd_criu_device_bucket { | |
| 528 | + __u32 user_gpu_id; | |
| 529 | + __u32 actual_gpu_id; | |
| 530 | + __u32 drm_fd; | |
| 531 | + __u32 pad; | |
| 532 | +}; | |
| 533 | + | |
| 534 | +struct kfd_criu_bo_bucket { | |
| 535 | + __u64 addr; | |
| 536 | + __u64 size; | |
| 537 | + __u64 offset; | |
| 538 | + __u64 restored_offset; /* During restore, updated offset for BO */ | |
| 539 | + __u32 gpu_id; /* This is the user_gpu_id */ | |
| 540 | + __u32 alloc_flags; | |
| 541 | + __u32 dmabuf_fd; | |
| 542 | + __u32 pad; | |
| 543 | +}; | |
| 544 | + | |
| 545 | +/* CRIU IOCTLs - END */ | |
| 546 | +/**************************************************************************************************/ | |
| 547 | + | |
| 471 | 548 | /* Register offset inside the remapped mmio page |
| 472 | 549 | */ |
| 473 | 550 | enum kfd_mmio_remap { |
| @@ -596,7 +673,7 @@ struct kfd_ioctl_svm_args { · 122 unmodified lines | ||
| 596 | 673 | __u32 op; |
| 597 | 674 | __u32 nattr; |
| 598 | 675 | /* Variable length array of attributes */ |
| 599 | − struct kfd_ioctl_svm_attribute attrs[0]; | |
| 676 | + struct kfd_ioctl_svm_attribute attrs[]; | |
| 600 | 677 | }; |
| 601 | 678 | |
| 602 | 679 | /** |
| @@ -679,16 +756,16 @@ struct kfd_ioctl_set_xnack_mode_args { · 76 unmodified lines | ||
| 679 | 756 | #define AMDKFD_IOC_WAIT_EVENTS \ |
| 680 | 757 | AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args) |
| 681 | 758 | |
| 682 | −#define AMDKFD_IOC_DBG_REGISTER \ | |
| 759 | +#define AMDKFD_IOC_DBG_REGISTER_DEPRECATED \ | |
| 683 | 760 | AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args) |
| 684 | 761 | |
| 685 | −#define AMDKFD_IOC_DBG_UNREGISTER \ | |
| 762 | +#define AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED \ | |
| 686 | 763 | AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args) |
| 687 | 764 | |
| 688 | −#define AMDKFD_IOC_DBG_ADDRESS_WATCH \ | |
| 765 | +#define AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED \ | |
| 689 | 766 | AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args) |
| 690 | 767 | |
| 691 | −#define AMDKFD_IOC_DBG_WAVE_CONTROL \ | |
| 768 | +#define AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED \ | |
| 692 | 769 | AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args) |
| 693 | 770 | |
| 694 | 771 | #define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \ |
| @@ -742,7 +819,10 @@ struct kfd_ioctl_set_xnack_mode_args { · 47 unmodified lines | ||
| 742 | 819 | #define AMDKFD_IOC_SET_XNACK_MODE \ |
| 743 | 820 | AMDKFD_IOWR(0x21, struct kfd_ioctl_set_xnack_mode_args) |
| 744 | 821 | |
| 822 | +#define AMDKFD_IOC_CRIU_OP \ | |
| 823 | + AMDKFD_IOWR(0x22, struct kfd_ioctl_criu_args) | |
| 824 | + | |
| 745 | 825 | #define AMDKFD_COMMAND_START 0x01 |
| 746 | −#define AMDKFD_COMMAND_END 0x22 | |
| 826 | +#define AMDKFD_COMMAND_END 0x23 | |
| 747 | 827 | |
| 748 | 828 | #endif |
| @@ -1134,6 +1134,7 @@ struct kvm_ppc_resize_hpt { · 1133 unmodified lines | ||
| 1134 | 1134 | #define KVM_CAP_VM_GPA_BITS 207 |
| 1135 | 1135 | #define KVM_CAP_XSAVE2 208 |
| 1136 | 1136 | #define KVM_CAP_SYS_ATTRIBUTES 209 |
| 1137 | +#define KVM_CAP_PPC_AIL_MODE_3 210 | |
| 1137 | 1138 | |
| 1138 | 1139 | #ifdef KVM_CAP_IRQ_ROUTING |
| 1139 | 1140 | |
| @@ -1624,9 +1625,6 @@ struct kvm_enc_region { · 484 unmodified lines | ||
| 1624 | 1625 | #define KVM_S390_NORMAL_RESET _IO(KVMIO, 0xc3) |
| 1625 | 1626 | #define KVM_S390_CLEAR_RESET _IO(KVMIO, 0xc4) |
| 1626 | 1627 | |
| 1627 | −/* Available with KVM_CAP_XSAVE2 */ | |
| 1628 | −#define KVM_GET_XSAVE2 _IOR(KVMIO, 0xcf, struct kvm_xsave) | |
| 1629 | − | |
| 1630 | 1628 | struct kvm_s390_pv_sec_parm { |
| 1631 | 1629 | __u64 origin; |
| 1632 | 1630 | __u64 length; |
| @@ -2048,4 +2046,7 @@ struct kvm_stats_desc { · 415 unmodified lines | ||
| 2048 | 2046 | |
| 2049 | 2047 | #define KVM_GET_STATS_FD _IO(KVMIO, 0xce) |
| 2050 | 2048 | |
| 2049 | +/* Available with KVM_CAP_XSAVE2 */ | |
| 2050 | +#define KVM_GET_XSAVE2 _IOR(KVMIO, 0xcf, struct kvm_xsave) | |
| 2051 | + | |
| 2051 | 2052 | #endif /* __LINUX_KVM_H */ |
| @@ -106,7 +106,7 @@ enum ip_conntrack_status { · 105 unmodified lines | ||
| 106 | 106 | IPS_NAT_CLASH = IPS_UNTRACKED, |
| 107 | 107 | #endif |
| 108 | 108 | |
| 109 | − /* Conntrack got a helper explicitly attached via CT target. */ | |
| 109 | + /* Conntrack got a helper explicitly attached (ruleset, ctnetlink). */ | |
| 110 | 110 | IPS_HELPER_BIT = 13, |
| 111 | 111 | IPS_HELPER = (1 << IPS_HELPER_BIT), |
| 112 | 112 | |
| @@ -465,6 +465,8 @@ struct perf_event_attr { · 464 unmodified lines | ||
| 465 | 465 | /* |
| 466 | 466 | * User provided data if sigtrap=1, passed back to user via |
| 467 | 467 | * siginfo_t::si_perf_data, e.g. to permit user to identify the event. |
| 468 | + * Note, siginfo_t::si_perf_data is long-sized, and sig_data will be | |
| 469 | + * truncated accordingly on 32 bit architectures. | |
| 468 | 470 | */ |
| 469 | 471 | __u64 sig_data; |
| 470 | 472 | }; |
| @@ -84,12 +84,11 @@ struct smc_diag_conninfo { · 83 unmodified lines | ||
| 84 | 84 | /* SMC_DIAG_LINKINFO */ |
| 85 | 85 | |
| 86 | 86 | struct smc_diag_linkinfo { |
| 87 | − __u8 link_id; /* link identifier */ | |
| 88 | − __u8 ibname[IB_DEVICE_NAME_MAX]; /* name of the RDMA device */ | |
| 89 | − __u8 ibport; /* RDMA device port number */ | |
| 90 | − __u8 gid[40]; /* local GID */ | |
| 91 | − __u8 peer_gid[40]; /* peer GID */ | |
| 92 | − __aligned_u64 net_cookie; /* RDMA device net namespace */ | |
| 87 | + __u8 link_id; /* link identifier */ | |
| 88 | + __u8 ibname[IB_DEVICE_NAME_MAX]; /* name of the RDMA device */ | |
| 89 | + __u8 ibport; /* RDMA device port number */ | |
| 90 | + __u8 gid[40]; /* local GID */ | |
| 91 | + __u8 peer_gid[40]; /* peer GID */ | |
| 93 | 92 | }; |
| 94 | 93 | |
| 95 | 94 | struct smc_diag_lgrinfo { |
| @@ -56,8 +56,10 @@ · 55 unmodified lines | ||
| 56 | 56 | * * |
| 57 | 57 | ****************************************************************************/ |
| 58 | 58 | |
| 59 | +#define AES_IEC958_STATUS_SIZE 24 | |
| 60 | + | |
| 59 | 61 | struct snd_aes_iec958 { |
| 60 | − unsigned char status[24]; /* AES/IEC958 channel status bits */ | |
| 62 | + unsigned char status[AES_IEC958_STATUS_SIZE]; /* AES/IEC958 channel status bits */ | |
| 61 | 63 | unsigned char subcode[147]; /* AES/IEC958 subcode bits */ |
| 62 | 64 | unsigned char pad; /* nothing */ |
| 63 | 65 | unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */ |
| @@ -47,7 +47,13 @@ struct ioctl_gntdev_grant_ref { · 46 unmodified lines | ||
| 47 | 47 | /* |
| 48 | 48 | * Inserts the grant references into the mapping table of an instance |
| 49 | 49 | * of gntdev. N.B. This does not perform the mapping, which is deferred |
| 50 | − * until mmap() is called with @index as the offset. | |
| 50 | + * until mmap() is called with @index as the offset. @index should be | |
| 51 | + * considered opaque to userspace, with one exception: if no grant | |
| 52 | + * references have ever been inserted into the mapping table of this | |
| 53 | + * instance, @index will be set to 0. This is necessary to use gntdev | |
| 54 | + * with userspace APIs that expect a file descriptor that can be | |
| 55 | + * mmap()'d at offset 0, such as Wayland. If @count is set to 0, this | |
| 56 | + * ioctl will fail. | |
| 51 | 57 | */ |
| 52 | 58 | #define IOCTL_GNTDEV_MAP_GRANT_REF \ |
| 53 | 59 | _IOC(_IOC_NONE, 'G', 0, sizeof(struct ioctl_gntdev_map_grant_ref)) |