Backmerge drm-next to be able to apply Chris' connector_unregister_all cleanup (need latest i915 and sun4i state for that). Also there's a trivial conflict in ttm_bo.c that git rerere fails to remember.
Showing the changes to include/uapi (6 of 1107 files). Show all
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| @@ -487,6 +487,22 @@ struct drm_amdgpu_cs_chunk_data { · 486 unmodified lines | ||
| 487 | 487 | #define AMDGPU_INFO_MMR_SH_INDEX_SHIFT 8 |
| 488 | 488 | #define AMDGPU_INFO_MMR_SH_INDEX_MASK 0xff |
| 489 | 489 | |
| 490 | +struct drm_amdgpu_query_fw { | |
| 491 | + /** AMDGPU_INFO_FW_* */ | |
| 492 | + __u32 fw_type; | |
| 493 | + /** | |
| 494 | + * Index of the IP if there are more IPs of | |
| 495 | + * the same type. | |
| 496 | + */ | |
| 497 | + __u32 ip_instance; | |
| 498 | + /** | |
| 499 | + * Index of the engine. Whether this is used depends | |
| 500 | + * on the firmware type. (e.g. MEC, SDMA) | |
| 501 | + */ | |
| 502 | + __u32 index; | |
| 503 | + __u32 _pad; | |
| 504 | +}; | |
| 505 | + | |
| 490 | 506 | /* Input structure for the INFO ioctl */ |
| 491 | 507 | struct drm_amdgpu_info { |
| 492 | 508 | /* Where the return value will be stored */ |
| @@ -522,21 +538,7 @@ struct drm_amdgpu_info { · 29 unmodified lines | ||
| 522 | 538 | __u32 flags; |
| 523 | 539 | } read_mmr_reg; |
| 524 | 540 | |
| 525 | − struct { | |
| 526 | − /** AMDGPU_INFO_FW_* */ | |
| 527 | − __u32 fw_type; | |
| 528 | − /** | |
| 529 | − * Index of the IP if there are more IPs of | |
| 530 | − * the same type. | |
| 531 | − */ | |
| 532 | − __u32 ip_instance; | |
| 533 | − /** | |
| 534 | − * Index of the engine. Whether this is used depends | |
| 535 | − * on the firmware type. (e.g. MEC, SDMA) | |
| 536 | − */ | |
| 537 | − __u32 index; | |
| 538 | − __u32 _pad; | |
| 539 | − } query_fw; | |
| 541 | + struct drm_amdgpu_query_fw query_fw; | |
| 540 | 542 | }; |
| 541 | 543 | }; |
| 542 | 544 | |
| @@ -361,6 +361,8 @@ typedef struct drm_i915_irq_wait { · 360 unmodified lines | ||
| 361 | 361 | #define I915_PARAM_HAS_GPU_RESET 35 |
| 362 | 362 | #define I915_PARAM_HAS_RESOURCE_STREAMER 36 |
| 363 | 363 | #define I915_PARAM_HAS_EXEC_SOFTPIN 37 |
| 364 | +#define I915_PARAM_HAS_POOLED_EU 38 | |
| 365 | +#define I915_PARAM_MIN_EU_IN_POOL 39 | |
| 364 | 366 | |
| 365 | 367 | typedef struct drm_i915_getparam { |
| 366 | 368 | __s32 param; |
| @@ -1171,6 +1173,7 @@ struct drm_i915_gem_context_param { · 804 unmodified lines | ||
| 1171 | 1173 | #define I915_CONTEXT_PARAM_BAN_PERIOD 0x1 |
| 1172 | 1174 | #define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2 |
| 1173 | 1175 | #define I915_CONTEXT_PARAM_GTT_SIZE 0x3 |
| 1176 | +#define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4 | |
| 1174 | 1177 | __u64 value; |
| 1175 | 1178 | }; |
| 1176 | 1179 | |
| @@ -37,6 +37,7 @@ extern "C" { · 36 unmodified lines | ||
| 37 | 37 | #define DRM_VC4_MMAP_BO 0x04 |
| 38 | 38 | #define DRM_VC4_CREATE_SHADER_BO 0x05 |
| 39 | 39 | #define DRM_VC4_GET_HANG_STATE 0x06 |
| 40 | +#define DRM_VC4_GET_PARAM 0x07 | |
| 40 | 41 | |
| 41 | 42 | #define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl) |
| 42 | 43 | #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) |
| @@ -45,6 +46,7 @@ extern "C" { · 2 unmodified lines | ||
| 45 | 46 | #define DRM_IOCTL_VC4_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_MMAP_BO, struct drm_vc4_mmap_bo) |
| 46 | 47 | #define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo) |
| 47 | 48 | #define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state) |
| 49 | +#define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param) | |
| 48 | 50 | |
| 49 | 51 | struct drm_vc4_submit_rcl_surface { |
| 50 | 52 | __u32 hindex; /* Handle index, or ~0 if not present. */ |
| @@ -280,6 +282,17 @@ struct drm_vc4_get_hang_state { · 229 unmodified lines | ||
| 280 | 282 | __u32 pad[16]; |
| 281 | 283 | }; |
| 282 | 284 | |
| 285 | +#define DRM_VC4_PARAM_V3D_IDENT0 0 | |
| 286 | +#define DRM_VC4_PARAM_V3D_IDENT1 1 | |
| 287 | +#define DRM_VC4_PARAM_V3D_IDENT2 2 | |
| 288 | +#define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3 | |
| 289 | + | |
| 290 | +struct drm_vc4_get_param { | |
| 291 | + __u32 param; | |
| 292 | + __u32 pad; | |
| 293 | + __u64 value; | |
| 294 | +}; | |
| 295 | + | |
| 283 | 296 | #if defined(__cplusplus) |
| 284 | 297 | } |
| 285 | 298 | #endif |
| @@ -118,7 +118,7 @@ struct btrfs_ioctl_vol_args_v2 { · 117 unmodified lines | ||
| 118 | 118 | }; |
| 119 | 119 | union { |
| 120 | 120 | char name[BTRFS_SUBVOL_NAME_MAX + 1]; |
| 121 | − u64 devid; | |
| 121 | + __u64 devid; | |
| 122 | 122 | }; |
| 123 | 123 | }; |
| 124 | 124 | |
| @@ -1,5 +1,5 @@ | ||
| 1 | 1 | #ifndef _UAPI_LINUX_GTP_H_ |
| 2 | −#define _UAPI_LINUX_GTP_H__ | |
| 2 | +#define _UAPI_LINUX_GTP_H_ | |
| 3 | 3 | |
| 4 | 4 | enum gtp_genl_cmds { |
| 5 | 5 | GTP_CMD_NEWPDP, |
| @@ -1,5 +1,6 @@ | ||
| 1 | 1 | # UAPI Header export list |
| 2 | 2 | header-y += asequencer.h |
| 3 | +header-y += asoc.h | |
| 3 | 4 | header-y += asound.h |
| 4 | 5 | header-y += asound_fm.h |
| 5 | 6 | header-y += compress_offload.h |
| @@ -10,3 +11,5 @@ header-y += hdsp.h · 4 unmodified lines | ||
| 10 | 11 | header-y += hdspm.h |
| 11 | 12 | header-y += sb16_csp.h |
| 12 | 13 | header-y += sfnt_info.h |
| 14 | +header-y += tlv.h | |
| 15 | +header-y += usb_stream.h | |