Unified · Split
| @@ -323,7 +323,6 @@ ForEachMacros: · 322 unmodified lines | ||
| 323 | 323 | - 'protocol_for_each_card' |
| 324 | 324 | - 'protocol_for_each_dev' |
| 325 | 325 | - 'queue_for_each_hw_ctx' |
| 326 | − - 'radix_tree_for_each_contig' | |
| 327 | 326 | - 'radix_tree_for_each_slot' |
| 328 | 327 | - 'radix_tree_for_each_tagged' |
| 329 | 328 | - 'rbtree_postorder_for_each_entry_safe' |
| @@ -119,6 +119,13 @@ Mark Brown <broonie@sirena.org.uk> · 118 unmodified lines | ||
| 119 | 119 | Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com> |
| 120 | 120 | Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com> |
| 121 | 121 | Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com> |
| 122 | +Matthew Wilcox <willy@infradead.org> <matthew.r.wilcox@intel.com> | |
| 123 | +Matthew Wilcox <willy@infradead.org> <matthew@wil.cx> | |
| 124 | +Matthew Wilcox <willy@infradead.org> <mawilcox@linuxonhyperv.com> | |
| 125 | +Matthew Wilcox <willy@infradead.org> <mawilcox@microsoft.com> | |
| 126 | +Matthew Wilcox <willy@infradead.org> <willy@debian.org> | |
| 127 | +Matthew Wilcox <willy@infradead.org> <willy@linux.intel.com> | |
| 128 | +Matthew Wilcox <willy@infradead.org> <willy@parisc-linux.org> | |
| 122 | 129 | Matthieu CASTET <castet.matthieu@free.fr> |
| 123 | 130 | Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br> |
| 124 | 131 | Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com> |
| @@ -153,6 +160,11 @@ Peter Oruba <peter.oruba@amd.com> · 28 unmodified lines | ||
| 153 | 160 | Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com> |
| 154 | 161 | Praveen BP <praveenbp@ti.com> |
| 155 | 162 | Qais Yousef <qsyousef@gmail.com> <qais.yousef@imgtec.com> |
| 163 | +Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net> | |
| 164 | +Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com> | |
| 165 | +Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com> | |
| 166 | +Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de> | |
| 167 | +Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de> | |
| 156 | 168 | Rajesh Shah <rajesh.shah@intel.com> |
| 157 | 169 | Ralf Baechle <ralf@linux-mips.org> |
| 158 | 170 | Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| @@ -199,7 +199,7 @@ Description: · 198 unmodified lines | ||
| 199 | 199 | |
| 200 | 200 | What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_x_raw |
| 201 | 201 | What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_y_raw |
| 202 | −KernelVersion: 4.18 | |
| 202 | +KernelVersion: 4.19 | |
| 203 | 203 | Contact: linux-iio@vger.kernel.org |
| 204 | 204 | Description: |
| 205 | 205 | Relative position in direction x or y on a pad (may be |
| @@ -5,7 +5,7 @@ Memory Hotplug · 4 unmodified lines | ||
| 5 | 5 | ============== |
| 6 | 6 | |
| 7 | 7 | :Created: Jul 28 2007 |
| 8 | −:Updated: Add description of notifier of memory hotplug: Oct 11 2007 | |
| 8 | +:Updated: Add some details about locking internals: Aug 20 2018 | |
| 9 | 9 | |
| 10 | 10 | This document is about memory hotplug including how-to-use and current status. |
| 11 | 11 | Because Memory Hotplug is still under development, contents of this text will |
| @@ -392,6 +392,46 @@ Need more implementation yet.... · 380 unmodified lines | ||
| 392 | 392 | - Notification completion of remove works by OS to firmware. |
| 393 | 393 | - Guard from remove if not yet. |
| 394 | 394 | |
| 395 | + | |
| 396 | +Locking Internals | |
| 397 | +================= | |
| 398 | + | |
| 399 | +When adding/removing memory that uses memory block devices (i.e. ordinary RAM), | |
| 400 | +the device_hotplug_lock should be held to: | |
| 401 | + | |
| 402 | +- synchronize against online/offline requests (e.g. via sysfs). This way, memory | |
| 403 | + block devices can only be accessed (.online/.state attributes) by user | |
| 404 | + space once memory has been fully added. And when removing memory, we | |
| 405 | + know nobody is in critical sections. | |
| 406 | +- synchronize against CPU hotplug and similar (e.g. relevant for ACPI and PPC) | |
| 407 | + | |
| 408 | +Especially, there is a possible lock inversion that is avoided using | |
| 409 | +device_hotplug_lock when adding memory and user space tries to online that | |
| 410 | +memory faster than expected: | |
| 411 | + | |
| 412 | +- device_online() will first take the device_lock(), followed by | |
| 413 | + mem_hotplug_lock | |
| 414 | +- add_memory_resource() will first take the mem_hotplug_lock, followed by | |
| 415 | + the device_lock() (while creating the devices, during bus_add_device()). | |
| 416 | + | |
| 417 | +As the device is visible to user space before taking the device_lock(), this | |
| 418 | +can result in a lock inversion. | |
| 419 | + | |
| 420 | +onlining/offlining of memory should be done via device_online()/ | |
| 421 | +device_offline() - to make sure it is properly synchronized to actions | |
| 422 | +via sysfs. Holding device_hotplug_lock is advised (to e.g. protect online_type) | |
| 423 | + | |
| 424 | +When adding/removing/onlining/offlining memory or adding/removing | |
| 425 | +heterogeneous/device memory, we should always hold the mem_hotplug_lock in | |
| 426 | +write mode to serialise memory hotplug (e.g. access to global/zone | |
| 427 | +variables). | |
| 428 | + | |
| 429 | +In addition, mem_hotplug_lock (in contrast to device_hotplug_lock) in read | |
| 430 | +mode allows for a quite efficient get_online_mems/put_online_mems | |
| 431 | +implementation, so code accessing memory can protect from that memory | |
| 432 | +vanishing. | |
| 433 | + | |
| 434 | + | |
| 395 | 435 | Future Work |
| 396 | 436 | =========== |
| 397 | 437 | |
| @@ -26,6 +26,7 @@ Offset Value Purpose · 25 unmodified lines | ||
| 26 | 26 | 0x20 0xfcba0d10 (Magic cookie) AFTR |
| 27 | 27 | 0x24 exynos_cpu_resume_ns AFTR |
| 28 | 28 | 0x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR |
| 29 | +0x28 0x0 or last value during resume (Exynos542x) System suspend | |
| 29 | 30 | |
| 30 | 31 | |
| 31 | 32 | 2. Secure mode |
| @@ -5,54 +5,23 @@ Boot time memory management · 4 unmodified lines | ||
| 5 | 5 | Early system initialization cannot use "normal" memory management |
| 6 | 6 | simply because it is not set up yet. But there is still need to |
| 7 | 7 | allocate memory for various data structures, for instance for the |
| 8 | −physical page allocator. To address this, a specialized allocator | |
| 9 | −called the :ref:`Boot Memory Allocator <bootmem>`, or bootmem, was | |
| 10 | −introduced. Several years later PowerPC developers added a "Logical | |
| 11 | −Memory Blocks" allocator, which was later adopted by other | |
| 12 | −architectures and renamed to :ref:`memblock <memblock>`. There is also | |
| 13 | −a compatibility layer called `nobootmem` that translates bootmem | |
| 14 | −allocation interfaces to memblock calls. | |
| 8 | +physical page allocator. | |
| 15 | 9 | |
| 16 | −The selection of the early allocator is done using | |
| 17 | −``CONFIG_NO_BOOTMEM`` and ``CONFIG_HAVE_MEMBLOCK`` kernel | |
| 18 | −configuration options. These options are enabled or disabled | |
| 19 | −statically by the architectures' Kconfig files. | |
| 20 | − | |
| 21 | −* Architectures that rely only on bootmem select | |
| 22 | − ``CONFIG_NO_BOOTMEM=n && CONFIG_HAVE_MEMBLOCK=n``. | |
| 23 | −* The users of memblock with the nobootmem compatibility layer set | |
| 24 | − ``CONFIG_NO_BOOTMEM=y && CONFIG_HAVE_MEMBLOCK=y``. | |
| 25 | −* And for those that use both memblock and bootmem the configuration | |
| 26 | − includes ``CONFIG_NO_BOOTMEM=n && CONFIG_HAVE_MEMBLOCK=y``. | |
| 27 | − | |
| 28 | −Whichever allocator is used, it is the responsibility of the | |
| 29 | −architecture specific initialization to set it up in | |
| 30 | −:c:func:`setup_arch` and tear it down in :c:func:`mem_init` functions. | |
| 10 | +A specialized allocator called ``memblock`` performs the | |
| 11 | +boot time memory management. The architecture specific initialization | |
| 12 | +must set it up in :c:func:`setup_arch` and tear it down in | |
| 13 | +:c:func:`mem_init` functions. | |
| 31 | 14 | |
| 32 | 15 | Once the early memory management is available it offers a variety of |
| 33 | 16 | functions and macros for memory allocations. The allocation request |
| 34 | 17 | may be directed to the first (and probably the only) node or to a |
| 35 | 18 | particular node in a NUMA system. There are API variants that panic |
| 36 | −when an allocation fails and those that don't. And more recent and | |
| 37 | −advanced memblock even allows controlling its own behaviour. | |
| 38 | − | |
| 39 | −.. _bootmem: | |
| 40 | − | |
| 41 | −Bootmem | |
| 42 | −======= | |
| 19 | +when an allocation fails and those that don't. | |
| 43 | 20 | |
| 44 | −(mostly stolen from Mel Gorman's "Understanding the Linux Virtual | |
| 45 | −Memory Manager" `book`_) | |
| 21 | +Memblock also offers a variety of APIs that control its own behaviour. | |
| 46 | 22 | |
| 47 | −.. _book: https://www.kernel.org/doc/gorman/ | |
| 48 | − | |
| 49 | −.. kernel-doc:: mm/bootmem.c | |
| 50 | − :doc: bootmem overview | |
| 51 | − | |
| 52 | −.. _memblock: | |
| 53 | − | |
| 54 | −Memblock | |
| 55 | −======== | |
| 23 | +Memblock Overview | |
| 24 | +================= | |
| 56 | 25 | |
| 57 | 26 | .. kernel-doc:: mm/memblock.c |
| 58 | 27 | :doc: memblock overview |
| @@ -61,26 +30,6 @@ Memblock · 2 unmodified lines | ||
| 61 | 30 | Functions and structures |
| 62 | 31 | ======================== |
| 63 | 32 | |
| 64 | −Common API | |
| 65 | −---------- | |
| 66 | − | |
| 67 | −The functions that are described in this section are available | |
| 68 | −regardless of what early memory manager is enabled. | |
| 69 | − | |
| 70 | −.. kernel-doc:: mm/nobootmem.c | |
| 71 | − | |
| 72 | −Bootmem specific API | |
| 73 | −-------------------- | |
| 74 | − | |
| 75 | −These interfaces available only with bootmem, i.e when ``CONFIG_NO_BOOTMEM=n`` | |
| 76 | − | |
| 77 | −.. kernel-doc:: include/linux/bootmem.h | |
| 78 | −.. kernel-doc:: mm/bootmem.c | |
| 79 | − :functions: | |
| 80 | − | |
| 81 | −Memblock specific API | |
| 82 | −--------------------- | |
| 83 | − | |
| 84 | 33 | Here is the description of memblock data structures, functions and |
| 85 | 34 | macros. Some of them are actually internal, but since they are |
| 86 | 35 | documented it would be silly to omit them. Besides, reading the |
| @@ -21,6 +21,7 @@ Core utilities · 20 unmodified lines | ||
| 21 | 21 | local_ops |
| 22 | 22 | workqueue |
| 23 | 23 | genericirq |
| 24 | + xarray | |
| 24 | 25 | flexible-arrays |
| 25 | 26 | librs |
| 26 | 27 | genalloc |
| @@ -0,0 +1,435 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0+ | |
| 2 | + | |
| 3 | +====== | |
| 4 | +XArray | |
| 5 | +====== | |
| 6 | + | |
| 7 | +:Author: Matthew Wilcox | |
| 8 | + | |
| 9 | +Overview | |
| 10 | +======== | |
| 11 | + | |
| 12 | +The XArray is an abstract data type which behaves like a very large array | |
| 13 | +of pointers. It meets many of the same needs as a hash or a conventional | |
| 14 | +resizable array. Unlike a hash, it allows you to sensibly go to the | |
| 15 | +next or previous entry in a cache-efficient manner. In contrast to a | |
| 16 | +resizable array, there is no need to copy data or change MMU mappings in | |
| 17 | +order to grow the array. It is more memory-efficient, parallelisable | |
| 18 | +and cache friendly than a doubly-linked list. It takes advantage of | |
| 19 | +RCU to perform lookups without locking. | |
| 20 | + | |
| 21 | +The XArray implementation is efficient when the indices used are densely | |
| 22 | +clustered; hashing the object and using the hash as the index will not | |
| 23 | +perform well. The XArray is optimised for small indices, but still has | |
| 24 | +good performance with large indices. If your index can be larger than | |
| 25 | +``ULONG_MAX`` then the XArray is not the data type for you. The most | |
| 26 | +important user of the XArray is the page cache. | |
| 27 | + | |
| 28 | +Each non-``NULL`` entry in the array has three bits associated with | |
| 29 | +it called marks. Each mark may be set or cleared independently of | |
| 30 | +the others. You can iterate over entries which are marked. | |
| 31 | + | |
| 32 | +Normal pointers may be stored in the XArray directly. They must be 4-byte | |
| 33 | +aligned, which is true for any pointer returned from :c:func:`kmalloc` and | |
| 34 | +:c:func:`alloc_page`. It isn't true for arbitrary user-space pointers, | |
| 35 | +nor for function pointers. You can store pointers to statically allocated | |
| 36 | +objects, as long as those objects have an alignment of at least 4. | |
| 37 | + | |
| 38 | +You can also store integers between 0 and ``LONG_MAX`` in the XArray. | |
| 39 | +You must first convert it into an entry using :c:func:`xa_mk_value`. | |
| 40 | +When you retrieve an entry from the XArray, you can check whether it is | |
| 41 | +a value entry by calling :c:func:`xa_is_value`, and convert it back to | |
| 42 | +an integer by calling :c:func:`xa_to_value`. | |
| 43 | + | |
| 44 | +Some users want to store tagged pointers instead of using the marks | |
| 45 | +described above. They can call :c:func:`xa_tag_pointer` to create an | |
| 46 | +entry with a tag, :c:func:`xa_untag_pointer` to turn a tagged entry | |
| 47 | +back into an untagged pointer and :c:func:`xa_pointer_tag` to retrieve | |
| 48 | +the tag of an entry. Tagged pointers use the same bits that are used | |
| 49 | +to distinguish value entries from normal pointers, so each user must | |
| 50 | +decide whether they want to store value entries or tagged pointers in | |
| 51 | +any particular XArray. | |
| 52 | + | |
| 53 | +The XArray does not support storing :c:func:`IS_ERR` pointers as some | |
| 54 | +conflict with value entries or internal entries. | |
| 55 | + | |
| 56 | +An unusual feature of the XArray is the ability to create entries which | |
| 57 | +occupy a range of indices. Once stored to, looking up any index in | |
| 58 | +the range will return the same entry as looking up any other index in | |
| 59 | +the range. Setting a mark on one index will set it on all of them. | |
| 60 | +Storing to any index will store to all of them. Multi-index entries can | |
| 61 | +be explicitly split into smaller entries, or storing ``NULL`` into any | |
| 62 | +entry will cause the XArray to forget about the range. | |
| 63 | + | |
| 64 | +Normal API | |
| 65 | +========== | |
| 66 | + | |
| 67 | +Start by initialising an XArray, either with :c:func:`DEFINE_XARRAY` | |
| 68 | +for statically allocated XArrays or :c:func:`xa_init` for dynamically | |
| 69 | +allocated ones. A freshly-initialised XArray contains a ``NULL`` | |
| 70 | +pointer at every index. | |
| 71 | + | |
| 72 | +You can then set entries using :c:func:`xa_store` and get entries | |
| 73 | +using :c:func:`xa_load`. xa_store will overwrite any entry with the | |
| 74 | +new entry and return the previous entry stored at that index. You can | |
| 75 | +use :c:func:`xa_erase` instead of calling :c:func:`xa_store` with a | |
| 76 | +``NULL`` entry. There is no difference between an entry that has never | |
| 77 | +been stored to and one that has most recently had ``NULL`` stored to it. | |
| 78 | + | |
| 79 | +You can conditionally replace an entry at an index by using | |
| 80 | +:c:func:`xa_cmpxchg`. Like :c:func:`cmpxchg`, it will only succeed if | |
| 81 | +the entry at that index has the 'old' value. It also returns the entry | |
| 82 | +which was at that index; if it returns the same entry which was passed as | |
| 83 | +'old', then :c:func:`xa_cmpxchg` succeeded. | |
| 84 | + | |
| 85 | +If you want to only store a new entry to an index if the current entry | |
| 86 | +at that index is ``NULL``, you can use :c:func:`xa_insert` which | |
| 87 | +returns ``-EEXIST`` if the entry is not empty. | |
| 88 | + | |
| 89 | +You can enquire whether a mark is set on an entry by using | |
| 90 | +:c:func:`xa_get_mark`. If the entry is not ``NULL``, you can set a mark | |
| 91 | +on it by using :c:func:`xa_set_mark` and remove the mark from an entry by | |
| 92 | +calling :c:func:`xa_clear_mark`. You can ask whether any entry in the | |
| 93 | +XArray has a particular mark set by calling :c:func:`xa_marked`. | |
| 94 | + | |
| 95 | +You can copy entries out of the XArray into a plain array by calling | |
| 96 | +:c:func:`xa_extract`. Or you can iterate over the present entries in | |
| 97 | +the XArray by calling :c:func:`xa_for_each`. You may prefer to use | |
| 98 | +:c:func:`xa_find` or :c:func:`xa_find_after` to move to the next present | |
| 99 | +entry in the XArray. | |
| 100 | + | |
| 101 | +Calling :c:func:`xa_store_range` stores the same entry in a range | |
| 102 | +of indices. If you do this, some of the other operations will behave | |
| 103 | +in a slightly odd way. For example, marking the entry at one index | |
| 104 | +may result in the entry being marked at some, but not all of the other | |
| 105 | +indices. Storing into one index may result in the entry retrieved by | |
| 106 | +some, but not all of the other indices changing. | |
| 107 | + | |
| 108 | +Finally, you can remove all entries from an XArray by calling | |
| 109 | +:c:func:`xa_destroy`. If the XArray entries are pointers, you may wish | |
| 110 | +to free the entries first. You can do this by iterating over all present | |
| 111 | +entries in the XArray using the :c:func:`xa_for_each` iterator. | |
| 112 | + | |
| 113 | +ID assignment | |
| 114 | +------------- | |
| 115 | + | |
| 116 | +You can call :c:func:`xa_alloc` to store the entry at any unused index | |
| 117 | +in the XArray. If you need to modify the array from interrupt context, | |
| 118 | +you can use :c:func:`xa_alloc_bh` or :c:func:`xa_alloc_irq` to disable | |
| 119 | +interrupts while allocating the ID. Unlike :c:func:`xa_store`, allocating | |
| 120 | +a ``NULL`` pointer does not delete an entry. Instead it reserves an | |
| 121 | +entry like :c:func:`xa_reserve` and you can release it using either | |
| 122 | +:c:func:`xa_erase` or :c:func:`xa_release`. To use ID assignment, the | |
| 123 | +XArray must be defined with :c:func:`DEFINE_XARRAY_ALLOC`, or initialised | |
| 124 | +by passing ``XA_FLAGS_ALLOC`` to :c:func:`xa_init_flags`, | |
| 125 | + | |
| 126 | +Memory allocation | |
| 127 | +----------------- | |
| 128 | + | |
| 129 | +The :c:func:`xa_store`, :c:func:`xa_cmpxchg`, :c:func:`xa_alloc`, | |
| 130 | +:c:func:`xa_reserve` and :c:func:`xa_insert` functions take a gfp_t | |
| 131 | +parameter in case the XArray needs to allocate memory to store this entry. | |
| 132 | +If the entry is being deleted, no memory allocation needs to be performed, | |
| 133 | +and the GFP flags specified will be ignored. | |
| 134 | + | |
| 135 | +It is possible for no memory to be allocatable, particularly if you pass | |
| 136 | +a restrictive set of GFP flags. In that case, the functions return a | |
| 137 | +special value which can be turned into an errno using :c:func:`xa_err`. | |
| 138 | +If you don't need to know exactly which error occurred, using | |
| 139 | +:c:func:`xa_is_err` is slightly more efficient. | |
| 140 | + | |
| 141 | +Locking | |
| 142 | +------- | |
| 143 | + | |
| 144 | +When using the Normal API, you do not have to worry about locking. | |
| 145 | +The XArray uses RCU and an internal spinlock to synchronise access: | |
| 146 | + | |
| 147 | +No lock needed: | |
| 148 | + * :c:func:`xa_empty` | |
| 149 | + * :c:func:`xa_marked` | |
| 150 | + | |
| 151 | +Takes RCU read lock: | |
| 152 | + * :c:func:`xa_load` | |
| 153 | + * :c:func:`xa_for_each` | |
| 154 | + * :c:func:`xa_find` | |
| 155 | + * :c:func:`xa_find_after` | |
| 156 | + * :c:func:`xa_extract` | |
| 157 | + * :c:func:`xa_get_mark` | |
| 158 | + | |
| 159 | +Takes xa_lock internally: | |
| 160 | + * :c:func:`xa_store` | |
| 161 | + * :c:func:`xa_insert` | |
| 162 | + * :c:func:`xa_erase` | |
| 163 | + * :c:func:`xa_erase_bh` | |
| 164 | + * :c:func:`xa_erase_irq` | |
| 165 | + * :c:func:`xa_cmpxchg` | |
| 166 | + * :c:func:`xa_store_range` | |
| 167 | + * :c:func:`xa_alloc` | |
| 168 | + * :c:func:`xa_alloc_bh` | |
| 169 | + * :c:func:`xa_alloc_irq` | |
| 170 | + * :c:func:`xa_destroy` | |
| 171 | + * :c:func:`xa_set_mark` | |
| 172 | + * :c:func:`xa_clear_mark` | |
| 173 | + | |
| 174 | +Assumes xa_lock held on entry: | |
| 175 | + * :c:func:`__xa_store` | |
| 176 | + * :c:func:`__xa_insert` | |
| 177 | + * :c:func:`__xa_erase` | |
| 178 | + * :c:func:`__xa_cmpxchg` | |
| 179 | + * :c:func:`__xa_alloc` | |
| 180 | + * :c:func:`__xa_set_mark` | |
| 181 | + * :c:func:`__xa_clear_mark` | |
| 182 | + | |
| 183 | +If you want to take advantage of the lock to protect the data structures | |
| 184 | +that you are storing in the XArray, you can call :c:func:`xa_lock` | |
| 185 | +before calling :c:func:`xa_load`, then take a reference count on the | |
| 186 | +object you have found before calling :c:func:`xa_unlock`. This will | |
| 187 | +prevent stores from removing the object from the array between looking | |
| 188 | +up the object and incrementing the refcount. You can also use RCU to | |
| 189 | +avoid dereferencing freed memory, but an explanation of that is beyond | |
| 190 | +the scope of this document. | |
| 191 | + | |
| 192 | +The XArray does not disable interrupts or softirqs while modifying | |
| 193 | +the array. It is safe to read the XArray from interrupt or softirq | |
| 194 | +context as the RCU lock provides enough protection. | |
| 195 | + | |
| 196 | +If, for example, you want to store entries in the XArray in process | |
| 197 | +context and then erase them in softirq context, you can do that this way:: | |
| 198 | + | |
| 199 | + void foo_init(struct foo *foo) | |
| 200 | + { | |
| 201 | + xa_init_flags(&foo->array, XA_FLAGS_LOCK_BH); | |
| 202 | + } | |
| 203 | + | |
| 204 | + int foo_store(struct foo *foo, unsigned long index, void *entry) | |
| 205 | + { | |
| 206 | + int err; | |
| 207 | + | |
| 208 | + xa_lock_bh(&foo->array); | |
| 209 | + err = xa_err(__xa_store(&foo->array, index, entry, GFP_KERNEL)); | |
| 210 | + if (!err) | |
| 211 | + foo->count++; | |
| 212 | + xa_unlock_bh(&foo->array); | |
| 213 | + return err; | |
| 214 | + } | |
| 215 | + | |
| 216 | + /* foo_erase() is only called from softirq context */ | |
| 217 | + void foo_erase(struct foo *foo, unsigned long index) | |
| 218 | + { | |
| 219 | + xa_lock(&foo->array); | |
| 220 | + __xa_erase(&foo->array, index); | |
| 221 | + foo->count--; | |
| 222 | + xa_unlock(&foo->array); | |
| 223 | + } | |
| 224 | + | |
| 225 | +If you are going to modify the XArray from interrupt or softirq context, | |
| 226 | +you need to initialise the array using :c:func:`xa_init_flags`, passing | |
| 227 | +``XA_FLAGS_LOCK_IRQ`` or ``XA_FLAGS_LOCK_BH``. | |
| 228 | + | |
| 229 | +The above example also shows a common pattern of wanting to extend the | |
| 230 | +coverage of the xa_lock on the store side to protect some statistics | |
| 231 | +associated with the array. | |
| 232 | + | |
| 233 | +Sharing the XArray with interrupt context is also possible, either | |
| 234 | +using :c:func:`xa_lock_irqsave` in both the interrupt handler and process | |
| 235 | +context, or :c:func:`xa_lock_irq` in process context and :c:func:`xa_lock` | |
| 236 | +in the interrupt handler. Some of the more common patterns have helper | |
| 237 | +functions such as :c:func:`xa_erase_bh` and :c:func:`xa_erase_irq`. | |
| 238 | + | |
| 239 | +Sometimes you need to protect access to the XArray with a mutex because | |
| 240 | +that lock sits above another mutex in the locking hierarchy. That does | |
| 241 | +not entitle you to use functions like :c:func:`__xa_erase` without taking | |
| 242 | +the xa_lock; the xa_lock is used for lockdep validation and will be used | |
| 243 | +for other purposes in the future. | |
| 244 | + | |
| 245 | +The :c:func:`__xa_set_mark` and :c:func:`__xa_clear_mark` functions are also | |
| 246 | +available for situations where you look up an entry and want to atomically | |
| 247 | +set or clear a mark. It may be more efficient to use the advanced API | |
| 248 | +in this case, as it will save you from walking the tree twice. | |
| 249 | + | |
| 250 | +Advanced API | |
| 251 | +============ | |
| 252 | + | |
| 253 | +The advanced API offers more flexibility and better performance at the | |
| 254 | +cost of an interface which can be harder to use and has fewer safeguards. | |
| 255 | +No locking is done for you by the advanced API, and you are required | |
| 256 | +to use the xa_lock while modifying the array. You can choose whether | |
| 257 | +to use the xa_lock or the RCU lock while doing read-only operations on | |
| 258 | +the array. You can mix advanced and normal operations on the same array; | |
| 259 | +indeed the normal API is implemented in terms of the advanced API. The | |
| 260 | +advanced API is only available to modules with a GPL-compatible license. | |
| 261 | + | |
| 262 | +The advanced API is based around the xa_state. This is an opaque data | |
| 263 | +structure which you declare on the stack using the :c:func:`XA_STATE` | |
| 264 | +macro. This macro initialises the xa_state ready to start walking | |
| 265 | +around the XArray. It is used as a cursor to maintain the position | |
| 266 | +in the XArray and let you compose various operations together without | |
| 267 | +having to restart from the top every time. | |
| 268 | + | |
| 269 | +The xa_state is also used to store errors. You can call | |
| 270 | +:c:func:`xas_error` to retrieve the error. All operations check whether | |
| 271 | +the xa_state is in an error state before proceeding, so there's no need | |
| 272 | +for you to check for an error after each call; you can make multiple | |
| 273 | +calls in succession and only check at a convenient point. The only | |
| 274 | +errors currently generated by the XArray code itself are ``ENOMEM`` and | |
| 275 | +``EINVAL``, but it supports arbitrary errors in case you want to call | |
| 276 | +:c:func:`xas_set_err` yourself. | |
| 277 | + | |
| 278 | +If the xa_state is holding an ``ENOMEM`` error, calling :c:func:`xas_nomem` | |
| 279 | +will attempt to allocate more memory using the specified gfp flags and | |
| 280 | +cache it in the xa_state for the next attempt. The idea is that you take | |
| 281 | +the xa_lock, attempt the operation and drop the lock. The operation | |
| 282 | +attempts to allocate memory while holding the lock, but it is more | |
| 283 | +likely to fail. Once you have dropped the lock, :c:func:`xas_nomem` | |
| 284 | +can try harder to allocate more memory. It will return ``true`` if it | |
| 285 | +is worth retrying the operation (i.e. that there was a memory error *and* | |
| 286 | +more memory was allocated). If it has previously allocated memory, and | |
| 287 | +that memory wasn't used, and there is no error (or some error that isn't | |
| 288 | +``ENOMEM``), then it will free the memory previously allocated. | |
| 289 | + | |
| 290 | +Internal Entries | |
| 291 | +---------------- | |
| 292 | + | |
| 293 | +The XArray reserves some entries for its own purposes. These are never | |
| 294 | +exposed through the normal API, but when using the advanced API, it's | |
| 295 | +possible to see them. Usually the best way to handle them is to pass them | |
| 296 | +to :c:func:`xas_retry`, and retry the operation if it returns ``true``. | |
| 297 | + | |
| 298 | +.. flat-table:: | |
| 299 | + :widths: 1 1 6 | |
| 300 | + | |
| 301 | + * - Name | |
| 302 | + - Test | |
| 303 | + - Usage | |
| 304 | + | |
| 305 | + * - Node | |
| 306 | + - :c:func:`xa_is_node` | |
| 307 | + - An XArray node. May be visible when using a multi-index xa_state. | |
| 308 | + | |
| 309 | + * - Sibling | |
| 310 | + - :c:func:`xa_is_sibling` | |
| 311 | + - A non-canonical entry for a multi-index entry. The value indicates | |
| 312 | + which slot in this node has the canonical entry. | |
| 313 | + | |
| 314 | + * - Retry | |
| 315 | + - :c:func:`xa_is_retry` | |
| 316 | + - This entry is currently being modified by a thread which has the | |
| 317 | + xa_lock. The node containing this entry may be freed at the end | |
| 318 | + of this RCU period. You should restart the lookup from the head | |
| 319 | + of the array. | |
| 320 | + | |
| 321 | + * - Zero | |
| 322 | + - :c:func:`xa_is_zero` | |
| 323 | + - Zero entries appear as ``NULL`` through the Normal API, but occupy | |
| 324 | + an entry in the XArray which can be used to reserve the index for | |
| 325 | + future use. | |
| 326 | + | |
| 327 | +Other internal entries may be added in the future. As far as possible, they | |
| 328 | +will be handled by :c:func:`xas_retry`. | |
| 329 | + | |
| 330 | +Additional functionality | |
| 331 | +------------------------ | |
| 332 | + | |
| 333 | +The :c:func:`xas_create_range` function allocates all the necessary memory | |
| 334 | +to store every entry in a range. It will set ENOMEM in the xa_state if | |
| 335 | +it cannot allocate memory. | |
| 336 | + | |
| 337 | +You can use :c:func:`xas_init_marks` to reset the marks on an entry | |
| 338 | +to their default state. This is usually all marks clear, unless the | |
| 339 | +XArray is marked with ``XA_FLAGS_TRACK_FREE``, in which case mark 0 is set | |
| 340 | +and all other marks are clear. Replacing one entry with another using | |
| 341 | +:c:func:`xas_store` will not reset the marks on that entry; if you want | |
| 342 | +the marks reset, you should do that explicitly. | |
| 343 | + | |
| 344 | +The :c:func:`xas_load` will walk the xa_state as close to the entry | |
| 345 | +as it can. If you know the xa_state has already been walked to the | |
| 346 | +entry and need to check that the entry hasn't changed, you can use | |
| 347 | +:c:func:`xas_reload` to save a function call. | |
| 348 | + | |
| 349 | +If you need to move to a different index in the XArray, call | |
| 350 | +:c:func:`xas_set`. This resets the cursor to the top of the tree, which | |
| 351 | +will generally make the next operation walk the cursor to the desired | |
| 352 | +spot in the tree. If you want to move to the next or previous index, | |
| 353 | +call :c:func:`xas_next` or :c:func:`xas_prev`. Setting the index does | |
| 354 | +not walk the cursor around the array so does not require a lock to be | |
| 355 | +held, while moving to the next or previous index does. | |
| 356 | + | |
| 357 | +You can search for the next present entry using :c:func:`xas_find`. This | |
| 358 | +is the equivalent of both :c:func:`xa_find` and :c:func:`xa_find_after`; | |
| 359 | +if the cursor has been walked to an entry, then it will find the next | |
| 360 | +entry after the one currently referenced. If not, it will return the | |
| 361 | +entry at the index of the xa_state. Using :c:func:`xas_next_entry` to | |
| 362 | +move to the next present entry instead of :c:func:`xas_find` will save | |
| 363 | +a function call in the majority of cases at the expense of emitting more | |
| 364 | +inline code. | |
| 365 | + | |
| 366 | +The :c:func:`xas_find_marked` function is similar. If the xa_state has | |
| 367 | +not been walked, it will return the entry at the index of the xa_state, | |
| 368 | +if it is marked. Otherwise, it will return the first marked entry after | |
| 369 | +the entry referenced by the xa_state. The :c:func:`xas_next_marked` | |
| 370 | +function is the equivalent of :c:func:`xas_next_entry`. | |
| 371 | + | |
| 372 | +When iterating over a range of the XArray using :c:func:`xas_for_each` | |
| 373 | +or :c:func:`xas_for_each_marked`, it may be necessary to temporarily stop | |
| 374 | +the iteration. The :c:func:`xas_pause` function exists for this purpose. | |
| 375 | +After you have done the necessary work and wish to resume, the xa_state | |
| 376 | +is in an appropriate state to continue the iteration after the entry | |
| 377 | +you last processed. If you have interrupts disabled while iterating, | |
| 378 | +then it is good manners to pause the iteration and reenable interrupts | |
| 379 | +every ``XA_CHECK_SCHED`` entries. | |
| 380 | + | |
| 381 | +The :c:func:`xas_get_mark`, :c:func:`xas_set_mark` and | |
| 382 | +:c:func:`xas_clear_mark` functions require the xa_state cursor to have | |
| 383 | +been moved to the appropriate location in the xarray; they will do | |
| 384 | +nothing if you have called :c:func:`xas_pause` or :c:func:`xas_set` | |
| 385 | +immediately before. | |
| 386 | + | |
| 387 | +You can call :c:func:`xas_set_update` to have a callback function | |
| 388 | +called each time the XArray updates a node. This is used by the page | |
| 389 | +cache workingset code to maintain its list of nodes which contain only | |
| 390 | +shadow entries. | |
| 391 | + | |
| 392 | +Multi-Index Entries | |
| 393 | +------------------- | |
| 394 | + | |
| 395 | +The XArray has the ability to tie multiple indices together so that | |
| 396 | +operations on one index affect all indices. For example, storing into | |
| 397 | +any index will change the value of the entry retrieved from any index. | |
| 398 | +Setting or clearing a mark on any index will set or clear the mark | |
| 399 | +on every index that is tied together. The current implementation | |
| 400 | +only allows tying ranges which are aligned powers of two together; | |
| 401 | +eg indices 64-127 may be tied together, but 2-6 may not be. This may | |
| 402 | +save substantial quantities of memory; for example tying 512 entries | |
| 403 | +together will save over 4kB. | |
| 404 | + | |
| 405 | +You can create a multi-index entry by using :c:func:`XA_STATE_ORDER` | |
| 406 | +or :c:func:`xas_set_order` followed by a call to :c:func:`xas_store`. | |
| 407 | +Calling :c:func:`xas_load` with a multi-index xa_state will walk the | |
| 408 | +xa_state to the right location in the tree, but the return value is not | |
| 409 | +meaningful, potentially being an internal entry or ``NULL`` even when there | |
| 410 | +is an entry stored within the range. Calling :c:func:`xas_find_conflict` | |
| 411 | +will return the first entry within the range or ``NULL`` if there are no | |
| 412 | +entries in the range. The :c:func:`xas_for_each_conflict` iterator will | |
| 413 | +iterate over every entry which overlaps the specified range. | |
| 414 | + | |
| 415 | +If :c:func:`xas_load` encounters a multi-index entry, the xa_index | |
| 416 | +in the xa_state will not be changed. When iterating over an XArray | |
| 417 | +or calling :c:func:`xas_find`, if the initial index is in the middle | |
| 418 | +of a multi-index entry, it will not be altered. Subsequent calls | |
| 419 | +or iterations will move the index to the first index in the range. | |
| 420 | +Each entry will only be returned once, no matter how many indices it | |
| 421 | +occupies. | |
| 422 | + | |
| 423 | +Using :c:func:`xas_next` or :c:func:`xas_prev` with a multi-index xa_state | |
| 424 | +is not supported. Using either of these functions on a multi-index entry | |
| 425 | +will reveal sibling entries; these should be skipped over by the caller. | |
| 426 | + | |
| 427 | +Storing ``NULL`` into any index of a multi-index entry will set the entry | |
| 428 | +at every index to ``NULL`` and dissolve the tie. Splitting a multi-index | |
| 429 | +entry into entries occupying smaller ranges is not yet supported. | |
| 430 | + | |
| 431 | +Functions and structures | |
| 432 | +======================== | |
| 433 | + | |
| 434 | +.. kernel-doc:: include/linux/xarray.h | |
| 435 | +.. kernel-doc:: lib/xarray.c | |
| @@ -57,12 +57,17 @@ Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: · 56 unmodified lines | ||
| 57 | 57 | Required root node property: |
| 58 | 58 | compatible: "amlogic,a113d", "amlogic,meson-axg"; |
| 59 | 59 | |
| 60 | +Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties: | |
| 61 | + Required root node property: | |
| 62 | + compatible: "amlogic,g12a"; | |
| 63 | + | |
| 60 | 64 | Board compatible values (alphabetically, grouped by SoC): |
| 61 | 65 | |
| 62 | 66 | - "geniatech,atv1200" (Meson6) |
| 63 | 67 | |
| 64 | 68 | - "minix,neo-x8" (Meson8) |
| 65 | 69 | |
| 70 | + - "endless,ec100" (Meson8b) | |
| 66 | 71 | - "hardkernel,odroid-c1" (Meson8b) |
| 67 | 72 | - "tronfy,mxq" (Meson8b) |
| 68 | 73 | |
| @@ -101,6 +106,8 @@ Board compatible values (alphabetically, grouped by SoC): · 32 unmodified lines | ||
| 101 | 106 | |
| 102 | 107 | - "amlogic,s400" (Meson axg a113d) |
| 103 | 108 | |
| 109 | + - "amlogic,u200" (Meson g12a s905d2) | |
| 110 | + | |
| 104 | 111 | Amlogic Meson Firmware registers Interface |
| 105 | 112 | ------------------------------------------ |
| 106 | 113 | |
| @@ -42,6 +42,14 @@ Raspberry Pi Compute Module · 41 unmodified lines | ||
| 42 | 42 | Required root node properties: |
| 43 | 43 | compatible = "raspberrypi,compute-module", "brcm,bcm2835"; |
| 44 | 44 | |
| 45 | +Raspberry Pi Compute Module 3 | |
| 46 | +Required root node properties: | |
| 47 | +compatible = "raspberrypi,3-compute-module", "brcm,bcm2837"; | |
| 48 | + | |
| 49 | +Raspberry Pi Compute Module 3 Lite | |
| 50 | +Required root node properties: | |
| 51 | +compatible = "raspberrypi,3-compute-module-lite", "brcm,bcm2837"; | |
| 52 | + | |
| 45 | 53 | Raspberry Pi Zero |
| 46 | 54 | Required root node properties: |
| 47 | 55 | compatible = "raspberrypi,model-zero", "brcm,bcm2835"; |
| @@ -0,0 +1,183 @@ | ||
| 1 | +NXP i.MX System Controller Firmware (SCFW) | |
| 2 | +-------------------------------------------------------------------- | |
| 3 | + | |
| 4 | +The System Controller Firmware (SCFW) is a low-level system function | |
| 5 | +which runs on a dedicated Cortex-M core to provide power, clock, and | |
| 6 | +resource management. It exists on some i.MX8 processors. e.g. i.MX8QM | |
| 7 | +(QM, QP), and i.MX8QX (QXP, DX). | |
| 8 | + | |
| 9 | +The AP communicates with the SC using a multi-ported MU module found | |
| 10 | +in the LSIO subsystem. The current definition of this MU module provides | |
| 11 | +5 remote AP connections to the SC to support up to 5 execution environments | |
| 12 | +(TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces | |
| 13 | +with the LSIO DSC IP bus. The SC firmware will communicate with this MU | |
| 14 | +using the MSI bus. | |
| 15 | + | |
| 16 | +System Controller Device Node: | |
| 17 | +============================================================ | |
| 18 | + | |
| 19 | +The scu node with the following properties shall be under the /firmware/ node. | |
| 20 | + | |
| 21 | +Required properties: | |
| 22 | +------------------- | |
| 23 | +- compatible: should be "fsl,imx-scu". | |
| 24 | +- mbox-names: should include "tx0", "tx1", "tx2", "tx3", | |
| 25 | + "rx0", "rx1", "rx2", "rx3". | |
| 26 | +- mboxes: List of phandle of 4 MU channels for tx and 4 MU channels | |
| 27 | + for rx. All 8 MU channels must be in the same MU instance. | |
| 28 | + Cross instances are not allowed. The MU instance can only | |
| 29 | + be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need | |
| 30 | + to make sure use the one which is not conflict with other | |
| 31 | + execution environments. e.g. ATF. | |
| 32 | + Note: | |
| 33 | + Channel 0 must be "tx0" or "rx0". | |
| 34 | + Channel 1 must be "tx1" or "rx1". | |
| 35 | + Channel 2 must be "tx2" or "rx2". | |
| 36 | + Channel 3 must be "tx3" or "rx3". | |
| 37 | + e.g. | |
| 38 | + mboxes = <&lsio_mu1 0 0 | |
| 39 | + &lsio_mu1 0 1 | |
| 40 | + &lsio_mu1 0 2 | |
| 41 | + &lsio_mu1 0 3 | |
| 42 | + &lsio_mu1 1 0 | |
| 43 | + &lsio_mu1 1 1 | |
| 44 | + &lsio_mu1 1 2 | |
| 45 | + &lsio_mu1 1 3>; | |
| 46 | + See Documentation/devicetree/bindings/mailbox/fsl,mu.txt | |
| 47 | + for detailed mailbox binding. | |
| 48 | + | |
| 49 | +i.MX SCU Client Device Node: | |
| 50 | +============================================================ | |
| 51 | + | |
| 52 | +Client nodes are maintained as children of the relevant IMX-SCU device node. | |
| 53 | + | |
| 54 | +Power domain bindings based on SCU Message Protocol | |
| 55 | +------------------------------------------------------------ | |
| 56 | + | |
| 57 | +This binding for the SCU power domain providers uses the generic power | |
| 58 | +domain binding[2]. | |
| 59 | + | |
| 60 | +Required properties: | |
| 61 | +- compatible: Should be "fsl,scu-pd". | |
| 62 | +- #address-cells: Should be 1. | |
| 63 | +- #size-cells: Should be 0. | |
| 64 | + | |
| 65 | +Required properties for power domain sub nodes: | |
| 66 | +- #power-domain-cells: Must be 0. | |
| 67 | + | |
| 68 | +Optional Properties: | |
| 69 | +- reg: Resource ID of this power domain. | |
| 70 | + No exist means uncontrollable by user. | |
| 71 | + See detailed Resource ID list from: | |
| 72 | + include/dt-bindings/power/imx-rsrc.h | |
| 73 | +- power-domains: phandle pointing to the parent power domain. | |
| 74 | + | |
| 75 | +Clock bindings based on SCU Message Protocol | |
| 76 | +------------------------------------------------------------ | |
| 77 | + | |
| 78 | +This binding uses the common clock binding[1]. | |
| 79 | + | |
| 80 | +Required properties: | |
| 81 | +- compatible: Should be "fsl,imx8qxp-clock". | |
| 82 | +- #clock-cells: Should be 1. Contains the Clock ID value. | |
| 83 | +- clocks: List of clock specifiers, must contain an entry for | |
| 84 | + each required entry in clock-names | |
| 85 | +- clock-names: Should include entries "xtal_32KHz", "xtal_24MHz" | |
| 86 | + | |
| 87 | +The clock consumer should specify the desired clock by having the clock | |
| 88 | +ID in its "clocks" phandle cell. | |
| 89 | + | |
| 90 | +See the full list of clock IDs from: | |
| 91 | +include/dt-bindings/clock/imx8qxp-clock.h | |
| 92 | + | |
| 93 | +Pinctrl bindings based on SCU Message Protocol | |
| 94 | +------------------------------------------------------------ | |
| 95 | + | |
| 96 | +This binding uses the i.MX common pinctrl binding[3]. | |
| 97 | + | |
| 98 | +Required properties: | |
| 99 | +- compatible: Should be "fsl,imx8qxp-iomuxc". | |
| 100 | + | |
| 101 | +Required properties for Pinctrl sub nodes: | |
| 102 | +- fsl,pins: Each entry consists of 3 integers which represents | |
| 103 | + the mux and config setting for one pin. The first 2 | |
| 104 | + integers <pin_id mux_mode> are specified using a | |
| 105 | + PIN_FUNC_ID macro, which can be found in | |
| 106 | + <dt-bindings/pinctrl/pads-imx8qxp.h>. | |
| 107 | + The last integer CONFIG is the pad setting value like | |
| 108 | + pull-up on this pin. | |
| 109 | + | |
| 110 | + Please refer to i.MX8QXP Reference Manual for detailed | |
| 111 | + CONFIG settings. | |
| 112 | + | |
| 113 | +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt | |
| 114 | +[2] Documentation/devicetree/bindings/power/power_domain.txt | |
| 115 | +[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt | |
| 116 | + | |
| 117 | +Example (imx8qxp): | |
| 118 | +------------- | |
| 119 | +lsio_mu1: mailbox@5d1c0000 { | |
| 120 | + ... | |
| 121 | + #mbox-cells = <2>; | |
| 122 | +}; | |
| 123 | + | |
| 124 | +firmware { | |
| 125 | + scu { | |
| 126 | + compatible = "fsl,imx-scu"; | |
| 127 | + mbox-names = "tx0", "tx1", "tx2", "tx3", | |
| 128 | + "rx0", "rx1", "rx2", "rx3"; | |
| 129 | + mboxes = <&lsio_mu1 0 0 | |
| 130 | + &lsio_mu1 0 1 | |
| 131 | + &lsio_mu1 0 2 | |
| 132 | + &lsio_mu1 0 3 | |
| 133 | + &lsio_mu1 1 0 | |
| 134 | + &lsio_mu1 1 1 | |
| 135 | + &lsio_mu1 1 2 | |
| 136 | + &lsio_mu1 1 3>; | |
| 137 | + | |
| 138 | + clk: clk { | |
| 139 | + compatible = "fsl,imx8qxp-clk"; | |
| 140 | + #clock-cells = <1>; | |
| 141 | + }; | |
| 142 | + | |
| 143 | + iomuxc { | |
| 144 | + compatible = "fsl,imx8qxp-iomuxc"; | |
| 145 | + | |
| 146 | + pinctrl_lpuart0: lpuart0grp { | |
| 147 | + fsl,pins = < | |
| 148 | + SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 | |
| 149 | + SC_P_UART0_TX_ADMA_UART0_TX 0x06000020 | |
| 150 | + >; | |
| 151 | + }; | |
| 152 | + ... | |
| 153 | + }; | |
| 154 | + | |
| 155 | + imx8qx-pm { | |
| 156 | + compatible = "fsl,scu-pd"; | |
| 157 | + #address-cells = <1>; | |
| 158 | + #size-cells = <0>; | |
| 159 | + | |
| 160 | + pd_dma: dma-power-domain { | |
| 161 | + #power-domain-cells = <0>; | |
| 162 | + | |
| 163 | + pd_dma_lpuart0: dma-lpuart0@57 { | |
| 164 | + reg = <SC_R_UART_0>; | |
| 165 | + #power-domain-cells = <0>; | |
| 166 | + power-domains = <&pd_dma>; | |
| 167 | + }; | |
| 168 | + ... | |
| 169 | + }; | |
| 170 | + ... | |
| 171 | + }; | |
| 172 | + }; | |
| 173 | +}; | |
| 174 | + | |
| 175 | +serial@5a060000 { | |
| 176 | + ... | |
| 177 | + pinctrl-names = "default"; | |
| 178 | + pinctrl-0 = <&pinctrl_lpuart0>; | |
| 179 | + clocks = <&clk IMX8QXP_UART0_CLK>, | |
| 180 | + <&clk IMX8QXP_UART0_IPG_CLK>; | |
| 181 | + clock-names = "per", "ipg"; | |
| 182 | + power-domains = <&pd_dma_lpuart0>; | |
| 183 | +}; | |
| @@ -57,6 +57,50 @@ i.MX6SLL EVK board · 56 unmodified lines | ||
| 57 | 57 | Required root node properties: |
| 58 | 58 | - compatible = "fsl,imx6sll-evk", "fsl,imx6sll"; |
| 59 | 59 | |
| 60 | +i.MX6 Quad Plus SABRE Smart Device Board | |
| 61 | +Required root node properties: | |
| 62 | + - compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp"; | |
| 63 | + | |
| 64 | +i.MX6 Quad Plus SABRE Automotive Board | |
| 65 | +Required root node properties: | |
| 66 | + - compatible = "fsl,imx6qp-sabreauto", "fsl,imx6qp"; | |
| 67 | + | |
| 68 | +i.MX6 DualLite SABRE Smart Device Board | |
| 69 | +Required root node properties: | |
| 70 | + - compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl"; | |
| 71 | + | |
| 72 | +i.MX6 DualLite/Solo SABRE Automotive Board | |
| 73 | +Required root node properties: | |
| 74 | + - compatible = "fsl,imx6dl-sabreauto", "fsl,imx6dl"; | |
| 75 | + | |
| 76 | +i.MX6 SoloLite EVK Board | |
| 77 | +Required root node properties: | |
| 78 | + - compatible = "fsl,imx6sl-evk", "fsl,imx6sl"; | |
| 79 | + | |
| 80 | +i.MX6 UltraLite 14x14 EVK Board | |
| 81 | +Required root node properties: | |
| 82 | + - compatible = "fsl,imx6ul-14x14-evk", "fsl,imx6ul"; | |
| 83 | + | |
| 84 | +i.MX6 UltraLiteLite 14x14 EVK Board | |
| 85 | +Required root node properties: | |
| 86 | + - compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; | |
| 87 | + | |
| 88 | +i.MX6 ULZ 14x14 EVK Board | |
| 89 | +Required root node properties: | |
| 90 | + - compatible = "fsl,imx6ulz-14x14-evk", "fsl,imx6ull", "fsl,imx6ulz"; | |
| 91 | + | |
| 92 | +i.MX6 SoloX SDB Board | |
| 93 | +Required root node properties: | |
| 94 | + - compatible = "fsl,imx6sx-sdb", "fsl,imx6sx"; | |
| 95 | + | |
| 96 | +i.MX6 SoloX Sabre Auto Board | |
| 97 | +Required root node properties: | |
| 98 | + - compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx"; | |
| 99 | + | |
| 100 | +i.MX7 SabreSD Board | |
| 101 | +Required root node properties: | |
| 102 | + - compatible = "fsl,imx7d-sdb", "fsl,imx7d"; | |
| 103 | + | |
| 60 | 104 | Generic i.MX boards |
| 61 | 105 | ------------------- |
| 62 | 106 | |
| @@ -8,6 +8,14 @@ HiKey960 Board · 7 unmodified lines | ||
| 8 | 8 | Required root node properties: |
| 9 | 9 | - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; |
| 10 | 10 | |
| 11 | +Hi3670 SoC | |
| 12 | +Required root node properties: | |
| 13 | + - compatible = "hisilicon,hi3670"; | |
| 14 | + | |
| 15 | +HiKey970 Board | |
| 16 | +Required root node properties: | |
| 17 | + - compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670"; | |
| 18 | + | |
| 11 | 19 | Hi3798cv200 SoC |
| 12 | 20 | Required root node properties: |
| 13 | 21 | - compatible = "hisilicon,hi3798cv200"; |
| @@ -45,11 +45,15 @@ Optional Properties: · 44 unmodified lines | ||
| 45 | 45 | debug_messages - Map the Debug message region |
| 46 | 46 | - reg: register space corresponding to the debug_messages |
| 47 | 47 | - ti,system-reboot-controller: If system reboot can be triggered by SoC reboot |
| 48 | +- ti,host-id: Integer value corresponding to the host ID assigned by Firmware | |
| 49 | + for identification of host processing entities such as virtual | |
| 50 | + machines | |
| 48 | 51 | |
| 49 | 52 | Example (K2G): |
| 50 | 53 | ------------- |
| 51 | 54 | pmmc: pmmc { |
| 52 | 55 | compatible = "ti,k2g-sci"; |
| 56 | + ti,host-id = <2>; | |
| 53 | 57 | mbox-names = "rx", "tx"; |
| 54 | 58 | mboxes= <&msgmgr &msgmgr_proxy_pmmc_rx>, |
| 55 | 59 | <&msgmgr &msgmgr_proxy_pmmc_tx>; |
| @@ -10,6 +10,7 @@ Required Properties: · 9 unmodified lines | ||
| 10 | 10 | - "mediatek,mt2712-apmixedsys", "syscon" |
| 11 | 11 | - "mediatek,mt6797-apmixedsys" |
| 12 | 12 | - "mediatek,mt7622-apmixedsys" |
| 13 | + - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys" | |
| 13 | 14 | - "mediatek,mt8135-apmixedsys" |
| 14 | 15 | - "mediatek,mt8173-apmixedsys" |
| 15 | 16 | - #clock-cells: Must be 1 |
| @@ -8,6 +8,7 @@ Required Properties: · 7 unmodified lines | ||
| 8 | 8 | - compatible: Should be one of: |
| 9 | 9 | - "mediatek,mt2701-audsys", "syscon" |
| 10 | 10 | - "mediatek,mt7622-audsys", "syscon" |
| 11 | + - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" | |
| 11 | 12 | - #clock-cells: Must be 1 |
| 12 | 13 | |
| 13 | 14 | The AUDSYS controller uses the common clk binding from |
| @@ -8,6 +8,7 @@ Required Properties: · 7 unmodified lines | ||
| 8 | 8 | - compatible: Should be: |
| 9 | 9 | - "mediatek,mt2701-bdpsys", "syscon" |
| 10 | 10 | - "mediatek,mt2712-bdpsys", "syscon" |
| 11 | + - "mediatek,mt7623-bdpsys", "mediatek,mt2701-bdpsys", "syscon" | |
| 11 | 12 | - #clock-cells: Must be 1 |
| 12 | 13 | |
| 13 | 14 | The bdpsys controller uses the common clk binding from |
| @@ -8,6 +8,7 @@ Required Properties: · 7 unmodified lines | ||
| 8 | 8 | - compatible: Should be: |
| 9 | 9 | - "mediatek,mt2701-ethsys", "syscon" |
| 10 | 10 | - "mediatek,mt7622-ethsys", "syscon" |
| 11 | + - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon" | |
| 11 | 12 | - #clock-cells: Must be 1 |
| 12 | 13 | - #reset-cells: Must be 1 |
| 13 | 14 | |
| @@ -9,6 +9,7 @@ Required Properties: · 8 unmodified lines | ||
| 9 | 9 | - compatible: Should be: |
| 10 | 10 | - "mediatek,mt2701-hifsys", "syscon" |
| 11 | 11 | - "mediatek,mt7622-hifsys", "syscon" |
| 12 | + - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon" | |
| 12 | 13 | - #clock-cells: Must be 1 |
| 13 | 14 | |
| 14 | 15 | The hifsys controller uses the common clk binding from |
| @@ -9,6 +9,7 @@ Required Properties: · 8 unmodified lines | ||
| 9 | 9 | - "mediatek,mt2701-imgsys", "syscon" |
| 10 | 10 | - "mediatek,mt2712-imgsys", "syscon" |
| 11 | 11 | - "mediatek,mt6797-imgsys", "syscon" |
| 12 | + - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon" | |
| 12 | 13 | - "mediatek,mt8173-imgsys", "syscon" |
| 13 | 14 | - #clock-cells: Must be 1 |
| 14 | 15 | |
| @@ -11,6 +11,7 @@ Required Properties: · 10 unmodified lines | ||
| 11 | 11 | - "mediatek,mt2712-infracfg", "syscon" |
| 12 | 12 | - "mediatek,mt6797-infracfg", "syscon" |
| 13 | 13 | - "mediatek,mt7622-infracfg", "syscon" |
| 14 | + - "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon" | |
| 14 | 15 | - "mediatek,mt8135-infracfg", "syscon" |
| 15 | 16 | - "mediatek,mt8173-infracfg", "syscon" |
| 16 | 17 | - #clock-cells: Must be 1 |
| @@ -9,6 +9,7 @@ Required Properties: · 8 unmodified lines | ||
| 9 | 9 | - "mediatek,mt2701-mmsys", "syscon" |
| 10 | 10 | - "mediatek,mt2712-mmsys", "syscon" |
| 11 | 11 | - "mediatek,mt6797-mmsys", "syscon" |
| 12 | + - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon" | |
| 12 | 13 | - "mediatek,mt8173-mmsys", "syscon" |
| 13 | 14 | - #clock-cells: Must be 1 |
| 14 | 15 | |
| @@ -10,6 +10,7 @@ Required Properties: · 9 unmodified lines | ||
| 10 | 10 | - "mediatek,mt2701-pericfg", "syscon" |
| 11 | 11 | - "mediatek,mt2712-pericfg", "syscon" |
| 12 | 12 | - "mediatek,mt7622-pericfg", "syscon" |
| 13 | + - "mediatek,mt7623-pericfg", "mediatek,mt2701-pericfg", "syscon" | |
| 13 | 14 | - "mediatek,mt8135-pericfg", "syscon" |
| 14 | 15 | - "mediatek,mt8173-pericfg", "syscon" |
| 15 | 16 | - #clock-cells: Must be 1 |
| @@ -10,6 +10,7 @@ Required Properties: · 9 unmodified lines | ||
| 10 | 10 | - "mediatek,mt2712-topckgen", "syscon" |
| 11 | 11 | - "mediatek,mt6797-topckgen" |
| 12 | 12 | - "mediatek,mt7622-topckgen" |
| 13 | + - "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen" | |
| 13 | 14 | - "mediatek,mt8135-topckgen" |
| 14 | 15 | - "mediatek,mt8173-topckgen" |
| 15 | 16 | - #clock-cells: Must be 1 |
| @@ -9,6 +9,7 @@ Required Properties: · 8 unmodified lines | ||
| 9 | 9 | - "mediatek,mt2701-vdecsys", "syscon" |
| 10 | 10 | - "mediatek,mt2712-vdecsys", "syscon" |
| 11 | 11 | - "mediatek,mt6797-vdecsys", "syscon" |
| 12 | + - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon" | |
| 12 | 13 | - "mediatek,mt8173-vdecsys", "syscon" |
| 13 | 14 | - #clock-cells: Must be 1 |
| 14 | 15 | |
| @@ -21,10 +21,29 @@ PROPERTIES · 20 unmodified lines | ||
| 21 | 21 | the register region. An optional second element specifies |
| 22 | 22 | the base address and size of the alias register region. |
| 23 | 23 | |
| 24 | +- clocks: | |
| 25 | + Usage: required | |
| 26 | + Value type: <prop-encoded-array> | |
| 27 | + Definition: reference to the pll parents. | |
| 28 | + | |
| 29 | +- clock-names: | |
| 30 | + Usage: required | |
| 31 | + Value type: <stringlist> | |
| 32 | + Definition: must be "pll8_vote", "pxo". | |
| 33 | + | |
| 34 | +- clock-output-names: | |
| 35 | + Usage: optional | |
| 36 | + Value type: <string> | |
| 37 | + Definition: Name of the output clock. Typically acpuX_aux where X is a | |
| 38 | + CPU number starting at 0. | |
| 39 | + | |
| 24 | 40 | Example: |
| 25 | 41 | |
| 26 | 42 | clock-controller@2088000 { |
| 27 | 43 | compatible = "qcom,kpss-acc-v2"; |
| 28 | 44 | reg = <0x02088000 0x1000>, |
| 29 | 45 | <0x02008000 0x1000>; |
| 46 | + clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; | |
| 47 | + clock-names = "pll8_vote", "pxo"; | |
| 48 | + clock-output-names = "acpu0_aux"; | |
| 30 | 49 | }; |
| @@ -0,0 +1,44 @@ | ||
| 1 | +Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) | |
| 2 | + | |
| 3 | +PROPERTIES | |
| 4 | + | |
| 5 | +- compatible: | |
| 6 | + Usage: required | |
| 7 | + Value type: <string> | |
| 8 | + Definition: should be one of the following. The generic compatible | |
| 9 | + "qcom,kpss-gcc" should also be included. | |
| 10 | + "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" | |
| 11 | + "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" | |
| 12 | + "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" | |
| 13 | + "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" | |
| 14 | + | |
| 15 | +- reg: | |
| 16 | + Usage: required | |
| 17 | + Value type: <prop-encoded-array> | |
| 18 | + Definition: base address and size of the register region | |
| 19 | + | |
| 20 | +- clocks: | |
| 21 | + Usage: required | |
| 22 | + Value type: <prop-encoded-array> | |
| 23 | + Definition: reference to the pll parents. | |
| 24 | + | |
| 25 | +- clock-names: | |
| 26 | + Usage: required | |
| 27 | + Value type: <stringlist> | |
| 28 | + Definition: must be "pll8_vote", "pxo". | |
| 29 | + | |
| 30 | +- clock-output-names: | |
| 31 | + Usage: required | |
| 32 | + Value type: <string> | |
| 33 | + Definition: Name of the output clock. Typically acpu_l2_aux indicating | |
| 34 | + an L2 cache auxiliary clock. | |
| 35 | + | |
| 36 | +Example: | |
| 37 | + | |
| 38 | + l2cc: clock-controller@2011000 { | |
| 39 | + compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; | |
| 40 | + reg = <0x2011000 0x1000>; | |
| 41 | + clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; | |
| 42 | + clock-names = "pll8_vote", "pxo"; | |
| 43 | + clock-output-names = "acpu_l2_aux"; | |
| 44 | + }; | |
| @@ -16,11 +16,26 @@ Properties: · 15 unmodified lines | ||
| 16 | 16 | - reg: |
| 17 | 17 | Usage: required |
| 18 | 18 | Value Type: <prop-encoded-array> |
| 19 | − Definition: Start address and the the size of the register region. | |
| 19 | + Definition: The first element specifies the llcc base start address and | |
| 20 | + the size of the register region. The second element specifies | |
| 21 | + the llcc broadcast base address and size of the register region. | |
| 22 | + | |
| 23 | +- reg-names: | |
| 24 | + Usage: required | |
| 25 | + Value Type: <stringlist> | |
| 26 | + Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base". | |
| 27 | + | |
| 28 | +- interrupts: | |
| 29 | + Usage: required | |
| 30 | + Definition: The interrupt is associated with the llcc edac device. | |
| 31 | + It's used for llcc cache single and double bit error detection | |
| 32 | + and reporting. | |
| 20 | 33 | |
| 21 | 34 | Example: |
| 22 | 35 | |
| 23 | 36 | cache-controller@1100000 { |
| 24 | 37 | compatible = "qcom,sdm845-llcc"; |
| 25 | − reg = <0x1100000 0x250000>; | |
| 38 | + reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; | |
| 39 | + reg-names = "llcc_base", "llcc_broadcast_base"; | |
| 40 | + interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; | |
| 26 | 41 | }; |
| @@ -5,6 +5,10 @@ Rockchip platforms device tree bindings · 4 unmodified lines | ||
| 5 | 5 | Required root node properties: |
| 6 | 6 | - compatible = "vamrs,ficus", "rockchip,rk3399"; |
| 7 | 7 | |
| 8 | +- 96boards RK3399 Rock960 (ROCK960 Consumer Edition) | |
| 9 | + Required root node properties: | |
| 10 | + - compatible = "vamrs,rock960", "rockchip,rk3399"; | |
| 11 | + | |
| 8 | 12 | - Amarula Vyasa RK3288 board |
| 9 | 13 | Required root node properties: |
| 10 | 14 | - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; |
| @@ -13,6 +17,10 @@ Rockchip platforms device tree bindings · 2 unmodified lines | ||
| 13 | 17 | Required root node properties: |
| 14 | 18 | - compatible = "asus,rk3288-tinker", "rockchip,rk3288"; |
| 15 | 19 | |
| 20 | +- Asus Tinker board S | |
| 21 | + Required root node properties: | |
| 22 | + - compatible = "asus,rk3288-tinker-s", "rockchip,rk3288"; | |
| 23 | + | |
| 16 | 24 | - Kylin RK3036 board: |
| 17 | 25 | Required root node properties: |
| 18 | 26 | - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036"; |
| @@ -59,6 +67,10 @@ Rockchip platforms device tree bindings · 40 unmodified lines | ||
| 59 | 67 | Required root node properties: |
| 60 | 68 | - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328"; |
| 61 | 69 | |
| 70 | +- Firefly ROC-RK3399-PC board: | |
| 71 | + Required root node properties: | |
| 72 | + - compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399"; | |
| 73 | + | |
| 62 | 74 | - ChipSPARK PopMetal-RK3288 board: |
| 63 | 75 | Required root node properties: |
| 64 | 76 | - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; |
| @@ -160,6 +172,10 @@ Rockchip platforms device tree bindings · 95 unmodified lines | ||
| 160 | 172 | Required root node properties: |
| 161 | 173 | - compatible = "pine64,rock64", "rockchip,rk3328"; |
| 162 | 174 | |
| 175 | +- Pine64 RockPro64 board: | |
| 176 | + Required root node properties: | |
| 177 | + - compatible = "pine64,rockpro64", "rockchip,rk3399"; | |
| 178 | + | |
| 163 | 179 | - Rockchip PX3 Evaluation board: |
| 164 | 180 | Required root node properties: |
| 165 | 181 | - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188"; |
| @@ -168,6 +184,10 @@ Rockchip platforms device tree bindings · 2 unmodified lines | ||
| 168 | 184 | Required root node properties: |
| 169 | 185 | - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368"; |
| 170 | 186 | |
| 187 | +- Rockchip PX30 Evaluation board: | |
| 188 | + Required root node properties: | |
| 189 | + - compatible = "rockchip,px30-evb", "rockchip,px30"; | |
| 190 | + | |
| 171 | 191 | - Rockchip RV1108 Evaluation board |
| 172 | 192 | Required root node properties: |
| 173 | 193 | - compatible = "rockchip,rv1108-evb", "rockchip,rv1108"; |
| @@ -22,7 +22,7 @@ References: · 21 unmodified lines | ||
| 22 | 22 | |
| 23 | 23 | Example: |
| 24 | 24 | |
| 25 | −scu@a04100000 { | |
| 25 | +scu@a0410000 { | |
| 26 | 26 | compatible = "arm,cortex-a9-scu"; |
| 27 | 27 | reg = <0xa0410000 0x100>; |
| 28 | 28 | }; |
| @@ -7,6 +7,8 @@ SoCs: · 6 unmodified lines | ||
| 7 | 7 | compatible = "renesas,emev2" |
| 8 | 8 | - RZ/A1H (R7S72100) |
| 9 | 9 | compatible = "renesas,r7s72100" |
| 10 | + - RZ/A2 (R7S9210) | |
| 11 | + compatible = "renesas,r7s9210" | |
| 10 | 12 | - SH-Mobile AG5 (R8A73A00/SH73A0) |
| 11 | 13 | compatible = "renesas,sh73a0" |
| 12 | 14 | - R-Mobile APE6 (R8A73A40) |
| @@ -23,6 +25,10 @@ SoCs: · 10 unmodified lines | ||
| 23 | 25 | compatible = "renesas,r8a7745" |
| 24 | 26 | - RZ/G1C (R8A77470) |
| 25 | 27 | compatible = "renesas,r8a77470" |
| 28 | + - RZ/G2M (R8A774A1) | |
| 29 | + compatible = "renesas,r8a774a1" | |
| 30 | + - RZ/G2E (RA8774C0) | |
| 31 | + compatible = "renesas,r8a774c0" | |
| 26 | 32 | - R-Car M1A (R8A77781) |
| 27 | 33 | compatible = "renesas,r8a7778" |
| 28 | 34 | - R-Car H1 (R8A77790) |
| @@ -107,6 +113,8 @@ Boards: · 78 unmodified lines | ||
| 107 | 113 | compatible = "renesas,lager", "renesas,r8a7790" |
| 108 | 114 | - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0)) |
| 109 | 115 | compatible = "renesas,m3ulcb", "renesas,r8a7796" |
| 116 | + - M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1)) | |
| 117 | + compatible = "renesas,m3nulcb", "renesas,r8a77965" | |
| 110 | 118 | - Marzen (R0P7779A00010S) |
| 111 | 119 | compatible = "renesas,marzen", "renesas,r8a7779" |
| 112 | 120 | - Porter (M2-LCDP) |
| @@ -143,12 +151,12 @@ Boards: · 30 unmodified lines | ||
| 143 | 151 | compatible = "renesas,wheat", "renesas,r8a7792" |
| 144 | 152 | |
| 145 | 153 | |
| 146 | −Most Renesas ARM SoCs have a Product Register that allows to retrieve SoC | |
| 147 | −product and revision information. If present, a device node for this register | |
| 148 | −should be added. | |
| 154 | +Most Renesas ARM SoCs have a Product Register or Boundary Scan ID Register that | |
| 155 | +allows to retrieve SoC product and revision information. If present, a device | |
| 156 | +node for this register should be added. | |
| 149 | 157 | |
| 150 | 158 | Required properties: |
| 151 | − - compatible: Must be "renesas,prr". | |
| 159 | + - compatible: Must be "renesas,prr" or "renesas,bsid" | |
| 152 | 160 | - reg: Base address and length of the register block. |
| 153 | 161 | |
| 154 | 162 | |
| @@ -1,4 +1,9 @@ | ||
| 1 | −Marvell Berlin SoC Family Device Tree Bindings | |
| 1 | +Synaptics SoC Device Tree Bindings | |
| 2 | + | |
| 3 | +According to https://www.synaptics.com/company/news/conexant-marvell | |
| 4 | +Synaptics has acquired the Multimedia Solutions Business of Marvell, so | |
| 5 | +berlin SoCs are now Synaptics' SoCs now. | |
| 6 | + | |
| 2 | 7 | --------------------------------------------------------------- |
| 3 | 8 | |
| 4 | 9 | Work in progress statement: |
| @@ -13,6 +18,10 @@ stable binding/ABI. · 8 unmodified lines | ||
| 13 | 18 | |
| 14 | 19 | --------------------------------------------------------------- |
| 15 | 20 | |
| 21 | +Boards with the Synaptics AS370 SoC shall have the following properties: | |
| 22 | + Required root node property: | |
| 23 | + compatible: "syna,as370" | |
| 24 | + | |
| 16 | 25 | Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500 |
| 17 | 26 | shall have the following properties: |
| 18 | 27 | |
| @@ -47,12 +47,17 @@ board-specific compatible values: · 46 unmodified lines | ||
| 47 | 47 | nvidia,ventana |
| 48 | 48 | toradex,apalis_t30 |
| 49 | 49 | toradex,apalis_t30-eval |
| 50 | + toradex,apalis_t30-v1.1 | |
| 51 | + toradex,apalis_t30-v1.1-eval | |
| 50 | 52 | toradex,apalis-tk1 |
| 51 | 53 | toradex,apalis-tk1-eval |
| 52 | − toradex,colibri_t20-512 | |
| 54 | + toradex,apalis-tk1-v1.2 | |
| 55 | + toradex,apalis-tk1-v1.2-eval | |
| 56 | + toradex,colibri_t20 | |
| 57 | + toradex,colibri_t20-eval-v3 | |
| 58 | + toradex,colibri_t20-iris | |
| 53 | 59 | toradex,colibri_t30 |
| 54 | 60 | toradex,colibri_t30-eval-v3 |
| 55 | − toradex,iris | |
| 56 | 61 | |
| 57 | 62 | Trusted Foundations |
| 58 | 63 | ------------------------------------------- |
| @@ -34,3 +34,96 @@ Board DTS: · 33 unmodified lines | ||
| 34 | 34 | pmc@c360000 { |
| 35 | 35 | nvidia,invert-interrupt; |
| 36 | 36 | }; |
| 37 | + | |
| 38 | +== Pad Control == | |
| 39 | + | |
| 40 | +On Tegra SoCs a pad is a set of pins which are configured as a group. | |
| 41 | +The pin grouping is a fixed attribute of the hardware. The PMC can be | |
| 42 | +used to set pad power state and signaling voltage. A pad can be either | |
| 43 | +in active or power down mode. The support for power state and signaling | |
| 44 | +voltage configuration varies depending on the pad in question. 3.3 V and | |
| 45 | +1.8 V signaling voltages are supported on pins where software | |
| 46 | +controllable signaling voltage switching is available. | |
| 47 | + | |
| 48 | +Pad configurations are described with pin configuration nodes which | |
| 49 | +are placed under the pmc node and they are referred to by the pinctrl | |
| 50 | +client properties. For more information see | |
| 51 | +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt. | |
| 52 | + | |
| 53 | +The following pads are present on Tegra186: | |
| 54 | +csia csib dsi mipi-bias | |
| 55 | +pex-clk-bias pex-clk3 pex-clk2 pex-clk1 | |
| 56 | +usb0 usb1 usb2 usb-bias | |
| 57 | +uart audio hsic dbg | |
| 58 | +hdmi-dp0 hdmi-dp1 pex-cntrl sdmmc2-hv | |
| 59 | +sdmmc4 cam dsib dsic | |
| 60 | +dsid csic csid csie | |
| 61 | +dsif spi ufs dmic-hv | |
| 62 | +edp sdmmc1-hv sdmmc3-hv conn | |
| 63 | +audio-hv ao-hv | |
| 64 | + | |
| 65 | +Required pin configuration properties: | |
| 66 | + - pins: A list of strings, each of which contains the name of a pad | |
| 67 | + to be configured. | |
| 68 | + | |
| 69 | +Optional pin configuration properties: | |
| 70 | + - low-power-enable: Configure the pad into power down mode | |
| 71 | + - low-power-disable: Configure the pad into active mode | |
| 72 | + - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or | |
| 73 | + TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages. | |
| 74 | + The values are defined in | |
| 75 | + include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h. | |
| 76 | + | |
| 77 | +Note: The power state can be configured on all of the above pads except | |
| 78 | + for ao-hv. Following pads have software configurable signaling | |
| 79 | + voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv, | |
| 80 | + ao-hv. | |
| 81 | + | |
| 82 | +Pad configuration state example: | |
| 83 | + pmc: pmc@7000e400 { | |
| 84 | + compatible = "nvidia,tegra186-pmc"; | |
| 85 | + reg = <0 0x0c360000 0 0x10000>, | |
| 86 | + <0 0x0c370000 0 0x10000>, | |
| 87 | + <0 0x0c380000 0 0x10000>, | |
| 88 | + <0 0x0c390000 0 0x10000>; | |
| 89 | + reg-names = "pmc", "wake", "aotag", "scratch"; | |
| 90 | + | |
| 91 | + ... | |
| 92 | + | |
| 93 | + sdmmc1_3v3: sdmmc1-3v3 { | |
| 94 | + pins = "sdmmc1-hv"; | |
| 95 | + power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + sdmmc1_1v8: sdmmc1-1v8 { | |
| 99 | + pins = "sdmmc1-hv"; | |
| 100 | + power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; | |
| 101 | + }; | |
| 102 | + | |
| 103 | + hdmi_off: hdmi-off { | |
| 104 | + pins = "hdmi"; | |
| 105 | + low-power-enable; | |
| 106 | + } | |
| 107 | + | |
| 108 | + hdmi_on: hdmi-on { | |
| 109 | + pins = "hdmi"; | |
| 110 | + low-power-disable; | |
| 111 | + } | |
| 112 | + }; | |
| 113 | + | |
| 114 | +Pinctrl client example: | |
| 115 | + sdmmc1: sdhci@3400000 { | |
| 116 | + ... | |
| 117 | + pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; | |
| 118 | + pinctrl-0 = <&sdmmc1_3v3>; | |
| 119 | + pinctrl-1 = <&sdmmc1_1v8>; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + ... | |
| 123 | + | |
| 124 | + sor0: sor@15540000 { | |
| 125 | + ... | |
| 126 | + pinctrl-0 = <&hdmi_off>; | |
| 127 | + pinctrl-1 = <&hdmi_on>; | |
| 128 | + pinctrl-names = "hdmi-on", "hdmi-off"; | |
| 129 | + }; | |
| @@ -195,3 +195,106 @@ Example: · 194 unmodified lines | ||
| 195 | 195 | power-domains = <&pd_audio>; |
| 196 | 196 | ... |
| 197 | 197 | }; |
| 198 | + | |
| 199 | +== Pad Control == | |
| 200 | + | |
| 201 | +On Tegra SoCs a pad is a set of pins which are configured as a group. | |
| 202 | +The pin grouping is a fixed attribute of the hardware. The PMC can be | |
| 203 | +used to set pad power state and signaling voltage. A pad can be either | |
| 204 | +in active or power down mode. The support for power state and signaling | |
| 205 | +voltage configuration varies depending on the pad in question. 3.3 V and | |
| 206 | +1.8 V signaling voltages are supported on pins where software | |
| 207 | +controllable signaling voltage switching is available. | |
| 208 | + | |
| 209 | +The pad configuration state nodes are placed under the pmc node and they | |
| 210 | +are referred to by the pinctrl client properties. For more information | |
| 211 | +see Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt. | |
| 212 | +The pad name should be used as the value of the pins property in pin | |
| 213 | +configuration nodes. | |
| 214 | + | |
| 215 | +The following pads are present on Tegra124 and Tegra132: | |
| 216 | +audio bb cam comp | |
| 217 | +csia csb cse dsi | |
| 218 | +dsib dsic dsid hdmi | |
| 219 | +hsic hv lvds mipi-bias | |
| 220 | +nand pex-bias pex-clk1 pex-clk2 | |
| 221 | +pex-cntrl sdmmc1 sdmmc3 sdmmc4 | |
| 222 | +sys_ddc uart usb0 usb1 | |
| 223 | +usb2 usb_bias | |
| 224 | + | |
| 225 | +The following pads are present on Tegra210: | |
| 226 | +audio audio-hv cam csia | |
| 227 | +csib csic csid csie | |
| 228 | +csif dbg debug-nonao dmic | |
| 229 | +dp dsi dsib dsic | |
| 230 | +dsid emmc emmc2 gpio | |
| 231 | +hdmi hsic lvds mipi-bias | |
| 232 | +pex-bias pex-clk1 pex-clk2 pex-cntrl | |
| 233 | +sdmmc1 sdmmc3 spi spi-hv | |
| 234 | +uart usb0 usb1 usb2 | |
| 235 | +usb3 usb-bias | |
| 236 | + | |
| 237 | +Required pin configuration properties: | |
| 238 | + - pins: Must contain name of the pad(s) to be configured. | |
| 239 | + | |
| 240 | +Optional pin configuration properties: | |
| 241 | + - low-power-enable: Configure the pad into power down mode | |
| 242 | + - low-power-disable: Configure the pad into active mode | |
| 243 | + - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 | |
| 244 | + or TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages. | |
| 245 | + The values are defined in | |
| 246 | + include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h. | |
| 247 | + | |
| 248 | +Note: The power state can be configured on all of the Tegra124 and | |
| 249 | + Tegra132 pads. None of the Tegra124 or Tegra132 pads support | |
| 250 | + signaling voltage switching. | |
| 251 | + | |
| 252 | +Note: All of the listed Tegra210 pads except pex-cntrl support power | |
| 253 | + state configuration. Signaling voltage switching is supported on | |
| 254 | + following Tegra210 pads: audio, audio-hv, cam, dbg, dmic, gpio, | |
| 255 | + pex-cntrl, sdmmc1, sdmmc3, spi, spi-hv, and uart. | |
| 256 | + | |
| 257 | +Pad configuration state example: | |
| 258 | + pmc: pmc@7000e400 { | |
| 259 | + compatible = "nvidia,tegra210-pmc"; | |
| 260 | + reg = <0x0 0x7000e400 0x0 0x400>; | |
| 261 | + clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>; | |
| 262 | + clock-names = "pclk", "clk32k_in"; | |
| 263 | + | |
| 264 | + ... | |
| 265 | + | |
| 266 | + sdmmc1_3v3: sdmmc1-3v3 { | |
| 267 | + pins = "sdmmc1"; | |
| 268 | + power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>; | |
| 269 | + }; | |
| 270 | + | |
| 271 | + sdmmc1_1v8: sdmmc1-1v8 { | |
| 272 | + pins = "sdmmc1"; | |
| 273 | + power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; | |
| 274 | + }; | |
| 275 | + | |
| 276 | + hdmi_off: hdmi-off { | |
| 277 | + pins = "hdmi"; | |
| 278 | + low-power-enable; | |
| 279 | + } | |
| 280 | + | |
| 281 | + hdmi_on: hdmi-on { | |
| 282 | + pins = "hdmi"; | |
| 283 | + low-power-disable; | |
| 284 | + } | |
| 285 | + }; | |
| 286 | + | |
| 287 | +Pinctrl client example: | |
| 288 | + sdmmc1: sdhci@700b0000 { | |
| 289 | + ... | |
| 290 | + pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; | |
| 291 | + pinctrl-0 = <&sdmmc1_3v3>; | |
| 292 | + pinctrl-1 = <&sdmmc1_1v8>; | |
| 293 | + }; | |
| 294 | + ... | |
| 295 | + sor@54540000 { | |
| 296 | + ... | |
| 297 | + pinctrl-0 = <&hdmi_off>; | |
| 298 | + pinctrl-1 = <&hdmi_on>; | |
| 299 | + pinctrl-names = "hdmi-on", "hdmi-off"; | |
| 300 | + }; | |
| @@ -60,7 +60,7 @@ Example: · 59 unmodified lines | ||
| 60 | 60 | <0xa0410100 0x100>; |
| 61 | 61 | }; |
| 62 | 62 | |
| 63 | − scu@a04100000 { | |
| 63 | + scu@a0410000 { | |
| 64 | 64 | compatible = "arm,cortex-a9-scu"; |
| 65 | 65 | reg = <0xa0410000 0x100>; |
| 66 | 66 | }; |
| @@ -13,6 +13,7 @@ Required Properties: · 12 unmodified lines | ||
| 13 | 13 | region. |
| 14 | 14 | - clocks: Reference to the parent clocks ("hosc", "losc") |
| 15 | 15 | - #clock-cells: should be 1. |
| 16 | +- #reset-cells: should be 1. | |
| 16 | 17 | |
| 17 | 18 | Each clock is assigned an identifier, and client nodes can use this identifier |
| 18 | 19 | to specify the clock which they consume. |
| @@ -36,6 +37,7 @@ Example: Clock Management Unit node: · 17 unmodified lines | ||
| 36 | 37 | reg = <0x0 0xe0160000 0x0 0x1000>; |
| 37 | 38 | clocks = <&hosc>, <&losc>; |
| 38 | 39 | #clock-cells = <1>; |
| 40 | + #reset-cells = <1>; | |
| 39 | 41 | }; |
| 40 | 42 | |
| 41 | 43 | Example: UART controller node that consumes clock generated by the clock |
| @@ -4,6 +4,8 @@ This binding uses the common clock binding[1]. · 3 unmodified lines | ||
| 4 | 4 | |
| 5 | 5 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| 6 | 6 | |
| 7 | +Slow Clock controller: | |
| 8 | + | |
| 7 | 9 | Required properties: |
| 8 | 10 | - compatible : shall be one of the following: |
| 9 | 11 | "atmel,at91sam9x5-sckc" or |
| @@ -16,84 +18,6 @@ Required properties: · 6 unmodified lines | ||
| 16 | 18 | |
| 17 | 19 | "atmel,at91sam9x5-clk-slow-rc-osc": |
| 18 | 20 | at91 internal slow RC oscillator |
| 19 | − | |
| 20 | − "atmel,<chip>-pmc": | |
| 21 | − at91 PMC (Power Management Controller) | |
| 22 | − All at91 specific clocks (clocks defined below) must be child | |
| 23 | − node of the PMC node. | |
| 24 | − <chip> can be: at91rm9200, at91sam9260, at91sam9261, | |
| 25 | − at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9x5, | |
| 26 | − sama5d2, sama5d3 or sama5d4. | |
| 27 | − | |
| 28 | − "atmel,at91sam9x5-clk-slow" (under sckc node) | |
| 29 | − or | |
| 30 | − "atmel,at91sam9260-clk-slow" (under pmc node): | |
| 31 | − at91 slow clk | |
| 32 | − | |
| 33 | − "atmel,at91rm9200-clk-main-osc" | |
| 34 | − "atmel,at91sam9x5-clk-main-rc-osc" | |
| 35 | − at91 main clk sources | |
| 36 | − | |
| 37 | − "atmel,at91sam9x5-clk-main" | |
| 38 | − "atmel,at91rm9200-clk-main": | |
| 39 | − at91 main clock | |
| 40 | − | |
| 41 | − "atmel,at91rm9200-clk-master" or | |
| 42 | − "atmel,at91sam9x5-clk-master": | |
| 43 | − at91 master clock | |
| 44 | − | |
| 45 | − "atmel,at91sam9x5-clk-peripheral" or | |
| 46 | − "atmel,at91rm9200-clk-peripheral": | |
| 47 | − at91 peripheral clocks | |
| 48 | − | |
| 49 | − "atmel,at91rm9200-clk-pll" or | |
| 50 | − "atmel,at91sam9g45-clk-pll" or | |
| 51 | − "atmel,at91sam9g20-clk-pllb" or | |
| 52 | − "atmel,sama5d3-clk-pll": | |
| 53 | − at91 pll clocks | |
| 54 | − | |
| 55 | − "atmel,at91sam9x5-clk-plldiv": | |
| 56 | − at91 plla divisor | |
| 57 | − | |
| 58 | − "atmel,at91rm9200-clk-programmable" or | |
| 59 | − "atmel,at91sam9g45-clk-programmable" or | |
| 60 | − "atmel,at91sam9x5-clk-programmable": | |
| 61 | − at91 programmable clocks | |
| 62 | − | |
| 63 | − "atmel,at91sam9x5-clk-smd": | |
| 64 | − at91 SMD (Soft Modem) clock | |
| 65 | − | |
| 66 | − "atmel,at91rm9200-clk-system": | |
| 67 | − at91 system clocks | |
| 68 | − | |
| 69 | − "atmel,at91rm9200-clk-usb" or | |
| 70 | − "atmel,at91sam9x5-clk-usb" or | |
| 71 | − "atmel,at91sam9n12-clk-usb": | |
| 72 | − at91 usb clock | |
| 73 | − | |
| 74 | − "atmel,at91sam9x5-clk-utmi": | |
| 75 | − at91 utmi clock | |
| 76 | − | |
| 77 | − "atmel,sama5d4-clk-h32mx": | |
| 78 | − at91 h32mx clock | |
| 79 | − | |
| 80 | − "atmel,sama5d2-clk-generated": | |
| 81 | − at91 generated clock | |
| 82 | − | |
| 83 | − "atmel,sama5d2-clk-audio-pll-frac": | |
| 84 | − at91 audio fractional pll | |
| 85 | − | |
| 86 | − "atmel,sama5d2-clk-audio-pll-pad": | |
| 87 | − at91 audio pll CLK_AUDIO output pin | |
| 88 | − | |
| 89 | − "atmel,sama5d2-clk-audio-pll-pmc" | |
| 90 | − at91 audio pll output on AUDIOPLLCLK that feeds the PMC | |
| 91 | − and can be used by peripheral clock or generic clock | |
| 92 | − | |
| 93 | − "atmel,sama5d2-clk-i2s-mux" (under pmc node): | |
| 94 | − at91 I2S clock source selection | |
| 95 | − | |
| 96 | −Required properties for SCKC node: | |
| 97 | 21 | - reg : defines the IO memory reserved for the SCKC. |
| 98 | 22 | - #size-cells : shall be 0 (reg is used to encode clk id). |
| 99 | 23 | - #address-cells : shall be 1 (reg is used to encode clk id). |
| @@ -109,428 +33,30 @@ For example: · 9 unmodified lines | ||
| 109 | 33 | /* put at91 slow clocks here */ |
| 110 | 34 | }; |
| 111 | 35 | |
| 36 | +Power Management Controller (PMC): | |
| 112 | 37 | |
| 113 | −Required properties for internal slow RC oscillator: | |
| 114 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 115 | −- clock-frequency : define the internal RC oscillator frequency. | |
| 116 | − | |
| 117 | −Optional properties: | |
| 118 | −- clock-accuracy : define the internal RC oscillator accuracy. | |
| 119 | − | |
| 120 | −For example: | |
| 121 | − slow_rc_osc: slow_rc_osc { | |
| 122 | − compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; | |
| 123 | − clock-frequency = <32768>; | |
| 124 | − clock-accuracy = <50000000>; | |
| 125 | − }; | |
| 126 | − | |
| 127 | −Required properties for slow oscillator: | |
| 128 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 129 | −- clocks : shall encode the main osc source clk sources (see atmel datasheet). | |
| 38 | +Required properties: | |
| 39 | +- compatible : shall be "atmel,<chip>-pmc", "syscon": | |
| 40 | + <chip> can be: at91rm9200, at91sam9260, at91sam9261, | |
| 41 | + at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15, | |
| 42 | + at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5, | |
| 43 | + sama5d2, sama5d3 or sama5d4. | |
| 44 | +- #clock-cells : from common clock binding; shall be set to 2. The first entry | |
| 45 | + is the type of the clock (core, system, peripheral or generated) and the | |
| 46 | + second entry its index as provided by the datasheet | |
| 47 | +- clocks : Must contain an entry for each entry in clock-names. | |
| 48 | +- clock-names: Must include the following entries: "slow_clk", "main_xtal" | |
| 130 | 49 | |
| 131 | 50 | Optional properties: |
| 132 | 51 | - atmel,osc-bypass : boolean property. Set this when a clock signal is directly |
| 133 | 52 | provided on XIN. |
| 134 | 53 | |
| 135 | 54 | For example: |
| 136 | − slow_osc: slow_osc { | |
| 137 | − compatible = "atmel,at91rm9200-clk-slow-osc"; | |
| 138 | − #clock-cells = <0>; | |
| 139 | − clocks = <&slow_xtal>; | |
| 140 | − }; | |
| 141 | − | |
| 142 | −Required properties for slow clock: | |
| 143 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 144 | −- clocks : shall encode the slow clk sources (see atmel datasheet). | |
| 145 | − | |
| 146 | −For example: | |
| 147 | − clk32k: slck { | |
| 148 | − compatible = "atmel,at91sam9x5-clk-slow"; | |
| 149 | − #clock-cells = <0>; | |
| 150 | − clocks = <&slow_rc_osc &slow_osc>; | |
| 151 | − }; | |
| 152 | − | |
| 153 | −Required properties for PMC node: | |
| 154 | −- reg : defines the IO memory reserved for the PMC. | |
| 155 | −- #size-cells : shall be 0 (reg is used to encode clk id). | |
| 156 | −- #address-cells : shall be 1 (reg is used to encode clk id). | |
| 157 | −- interrupts : shall be set to PMC interrupt line. | |
| 158 | −- interrupt-controller : tell that the PMC is an interrupt controller. | |
| 159 | −- #interrupt-cells : must be set to 1. The first cell encodes the interrupt id, | |
| 160 | − and reflect the bit position in the PMC_ER/DR/SR registers. | |
| 161 | − You can use the dt macros defined in dt-bindings/clock/at91.h. | |
| 162 | − 0 (AT91_PMC_MOSCS) -> main oscillator ready | |
| 163 | − 1 (AT91_PMC_LOCKA) -> PLL A ready | |
| 164 | − 2 (AT91_PMC_LOCKB) -> PLL B ready | |
| 165 | − 3 (AT91_PMC_MCKRDY) -> master clock ready | |
| 166 | − 6 (AT91_PMC_LOCKU) -> UTMI PLL clock ready | |
| 167 | − 8 .. 15 (AT91_PMC_PCKRDY(id)) -> programmable clock ready | |
| 168 | − 16 (AT91_PMC_MOSCSELS) -> main oscillator selected | |
| 169 | − 17 (AT91_PMC_MOSCRCS) -> RC main oscillator stabilized | |
| 170 | − 18 (AT91_PMC_CFDEV) -> clock failure detected | |
| 171 | − | |
| 172 | −For example: | |
| 173 | − pmc: pmc@fffffc00 { | |
| 174 | − compatible = "atmel,sama5d3-pmc"; | |
| 175 | − interrupts = <1 4 7>; | |
| 176 | − interrupt-controller; | |
| 177 | − #interrupt-cells = <2>; | |
| 178 | − #size-cells = <0>; | |
| 179 | − #address-cells = <1>; | |
| 180 | − | |
| 181 | − /* put at91 clocks here */ | |
| 182 | − }; | |
| 183 | − | |
| 184 | −Required properties for main clock internal RC oscillator: | |
| 185 | −- interrupts : shall be set to "<0>". | |
| 186 | −- clock-frequency : define the internal RC oscillator frequency. | |
| 187 | − | |
| 188 | −Optional properties: | |
| 189 | −- clock-accuracy : define the internal RC oscillator accuracy. | |
| 190 | − | |
| 191 | −For example: | |
| 192 | − main_rc_osc: main_rc_osc { | |
| 193 | − compatible = "atmel,at91sam9x5-clk-main-rc-osc"; | |
| 194 | − interrupt-parent = <&pmc>; | |
| 195 | − interrupts = <0>; | |
| 196 | − clock-frequency = <12000000>; | |
| 197 | − clock-accuracy = <50000000>; | |
| 198 | − }; | |
| 199 | − | |
| 200 | −Required properties for main clock oscillator: | |
| 201 | −- interrupts : shall be set to "<0>". | |
| 202 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 203 | −- clocks : shall encode the main osc source clk sources (see atmel datasheet). | |
| 204 | − | |
| 205 | −Optional properties: | |
| 206 | −- atmel,osc-bypass : boolean property. Specified if a clock signal is provided | |
| 207 | − on XIN. | |
| 208 | − | |
| 209 | − clock signal is directly provided on XIN pin. | |
| 210 | − | |
| 211 | −For example: | |
| 212 | − main_osc: main_osc { | |
| 213 | − compatible = "atmel,at91rm9200-clk-main-osc"; | |
| 214 | − interrupt-parent = <&pmc>; | |
| 215 | − interrupts = <0>; | |
| 216 | − #clock-cells = <0>; | |
| 217 | − clocks = <&main_xtal>; | |
| 218 | − }; | |
| 219 | − | |
| 220 | −Required properties for main clock: | |
| 221 | −- interrupts : shall be set to "<0>". | |
| 222 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 223 | −- clocks : shall encode the main clk sources (see atmel datasheet). | |
| 224 | − | |
| 225 | −For example: | |
| 226 | − main: mainck { | |
| 227 | − compatible = "atmel,at91sam9x5-clk-main"; | |
| 228 | − interrupt-parent = <&pmc>; | |
| 229 | − interrupts = <0>; | |
| 230 | − #clock-cells = <0>; | |
| 231 | − clocks = <&main_rc_osc &main_osc>; | |
| 232 | − }; | |
| 233 | − | |
| 234 | −Required properties for master clock: | |
| 235 | −- interrupts : shall be set to "<3>". | |
| 236 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 237 | −- clocks : shall be the master clock sources (see atmel datasheet) phandles. | |
| 238 | − e.g. "<&ck32k>, <&main>, <&plla>, <&pllb>". | |
| 239 | −- atmel,clk-output-range : minimum and maximum clock frequency (two u32 | |
| 240 | − fields). | |
| 241 | − e.g. output = <0 133000000>; <=> 0 to 133MHz. | |
| 242 | −- atmel,clk-divisors : master clock divisors table (four u32 fields). | |
| 243 | − 0 <=> reserved value. | |
| 244 | − e.g. divisors = <1 2 4 6>; | |
| 245 | −- atmel,master-clk-have-div3-pres : some SoC use the reserved value 7 in the | |
| 246 | − PRES field as CLOCK_DIV3 (e.g sam9x5). | |
| 247 | − | |
| 248 | −For example: | |
| 249 | − mck: mck { | |
| 250 | − compatible = "atmel,at91rm9200-clk-master"; | |
| 251 | − interrupt-parent = <&pmc>; | |
| 252 | − interrupts = <3>; | |
| 253 | − #clock-cells = <0>; | |
| 254 | − atmel,clk-output-range = <0 133000000>; | |
| 255 | − atmel,clk-divisors = <1 2 4 0>; | |
| 256 | − }; | |
| 257 | − | |
| 258 | −Required properties for peripheral clocks: | |
| 259 | −- #size-cells : shall be 0 (reg is used to encode clk id). | |
| 260 | −- #address-cells : shall be 1 (reg is used to encode clk id). | |
| 261 | −- clocks : shall be the master clock phandle. | |
| 262 | − e.g. clocks = <&mck>; | |
| 263 | −- name: device tree node describing a specific peripheral clock. | |
| 264 | − * #clock-cells : from common clock binding; shall be set to 0. | |
| 265 | − * reg: peripheral id. See Atmel's datasheets to get a full | |
| 266 | − list of peripheral ids. | |
| 267 | − * atmel,clk-output-range : minimum and maximum clock frequency | |
| 268 | − (two u32 fields). Only valid on at91sam9x5-clk-peripheral | |
| 269 | − compatible IPs. | |
| 270 | − | |
| 271 | −For example: | |
| 272 | − periph: periphck { | |
| 273 | − compatible = "atmel,at91sam9x5-clk-peripheral"; | |
| 274 | − #size-cells = <0>; | |
| 275 | − #address-cells = <1>; | |
| 276 | − clocks = <&mck>; | |
| 277 | − | |
| 278 | − ssc0_clk { | |
| 279 | − #clock-cells = <0>; | |
| 280 | − reg = <2>; | |
| 281 | − atmel,clk-output-range = <0 133000000>; | |
| 282 | − }; | |
| 283 | − | |
| 284 | − usart0_clk { | |
| 285 | − #clock-cells = <0>; | |
| 286 | − reg = <3>; | |
| 287 | − atmel,clk-output-range = <0 66000000>; | |
| 288 | − }; | |
| 289 | − }; | |
| 290 | − | |
| 291 | − | |
| 292 | −Required properties for pll clocks: | |
| 293 | −- interrupts : shall be set to "<1>". | |
| 294 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 295 | −- clocks : shall be the main clock phandle. | |
| 296 | −- reg : pll id. | |
| 297 | − 0 -> PLL A | |
| 298 | − 1 -> PLL B | |
| 299 | −- atmel,clk-input-range : minimum and maximum source clock frequency (two u32 | |
| 300 | − fields). | |
| 301 | − e.g. input = <1 32000000>; <=> 1 to 32MHz. | |
| 302 | −- #atmel,pll-clk-output-range-cells : number of cells reserved for pll output | |
| 303 | − range description. Sould be set to 2, 3 | |
| 304 | − or 4. | |
| 305 | − * 1st and 2nd cells represent the frequency range (min-max). | |
| 306 | − * 3rd cell is optional and represents the OUT field value for the given | |
| 307 | − range. | |
| 308 | − * 4th cell is optional and represents the ICPLL field (PLLICPR | |
| 309 | − register) | |
| 310 | −- atmel,pll-clk-output-ranges : pll output frequency ranges + optional parameter | |
| 311 | − depending on #atmel,pll-output-range-cells | |
| 312 | − property value. | |
| 313 | − | |
| 314 | −For example: | |
| 315 | − plla: pllack { | |
| 316 | − compatible = "atmel,at91sam9g45-clk-pll"; | |
| 317 | − interrupt-parent = <&pmc>; | |
| 318 | − interrupts = <1>; | |
| 319 | − #clock-cells = <0>; | |
| 320 | − clocks = <&main>; | |
| 321 | − reg = <0>; | |
| 322 | − atmel,clk-input-range = <2000000 32000000>; | |
| 323 | − #atmel,pll-clk-output-range-cells = <4>; | |
| 324 | − atmel,pll-clk-output-ranges = <74500000 800000000 0 0 | |
| 325 | − 69500000 750000000 1 0 | |
| 326 | − 64500000 700000000 2 0 | |
| 327 | − 59500000 650000000 3 0 | |
| 328 | − 54500000 600000000 0 1 | |
| 329 | − 49500000 550000000 1 1 | |
| 330 | − 44500000 500000000 2 1 | |
| 331 | − 40000000 450000000 3 1>; | |
| 332 | − }; | |
| 333 | − | |
| 334 | −Required properties for plldiv clocks (plldiv = pll / 2): | |
| 335 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 336 | −- clocks : shall be the plla clock phandle. | |
| 337 | − | |
| 338 | −The pll divisor is equal to 2 and cannot be changed. | |
| 339 | − | |
| 340 | −For example: | |
| 341 | − plladiv: plladivck { | |
| 342 | − compatible = "atmel,at91sam9x5-clk-plldiv"; | |
| 343 | − #clock-cells = <0>; | |
| 344 | − clocks = <&plla>; | |
| 345 | − }; | |
| 346 | − | |
| 347 | −Required properties for programmable clocks: | |
| 348 | −- #size-cells : shall be 0 (reg is used to encode clk id). | |
| 349 | −- #address-cells : shall be 1 (reg is used to encode clk id). | |
| 350 | −- clocks : shall be the programmable clock source phandles. | |
| 351 | − e.g. clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; | |
| 352 | −- name: device tree node describing a specific prog clock. | |
| 353 | − * #clock-cells : from common clock binding; shall be set to 0. | |
| 354 | − * reg : programmable clock id (register offset from PCKx | |
| 355 | − register). | |
| 356 | − * interrupts : shall be set to "<(8 + id)>". | |
| 357 | − | |
| 358 | −For example: | |
| 359 | − prog: progck { | |
| 360 | − compatible = "atmel,at91sam9g45-clk-programmable"; | |
| 361 | − #size-cells = <0>; | |
| 362 | − #address-cells = <1>; | |
| 363 | − interrupt-parent = <&pmc>; | |
| 364 | − clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; | |
| 365 | − | |
| 366 | − prog0 { | |
| 367 | − #clock-cells = <0>; | |
| 368 | − reg = <0>; | |
| 369 | − interrupts = <8>; | |
| 370 | − }; | |
| 371 | − | |
| 372 | − prog1 { | |
| 373 | − #clock-cells = <0>; | |
| 374 | − reg = <1>; | |
| 375 | − interrupts = <9>; | |
| 376 | − }; | |
| 377 | − }; | |
| 378 | − | |
| 379 | − | |
| 380 | −Required properties for smd clock: | |
| 381 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 382 | −- clocks : shall be the smd clock source phandles. | |
| 383 | − e.g. clocks = <&plladiv>, <&utmi>; | |
| 384 | − | |
| 385 | −For example: | |
| 386 | − smd: smdck { | |
| 387 | − compatible = "atmel,at91sam9x5-clk-smd"; | |
| 388 | − #clock-cells = <0>; | |
| 389 | − clocks = <&plladiv>, <&utmi>; | |
| 390 | − }; | |
| 391 | − | |
| 392 | −Required properties for system clocks: | |
| 393 | −- #size-cells : shall be 0 (reg is used to encode clk id). | |
| 394 | −- #address-cells : shall be 1 (reg is used to encode clk id). | |
| 395 | −- name: device tree node describing a specific system clock. | |
| 396 | − * #clock-cells : from common clock binding; shall be set to 0. | |
| 397 | − * reg: system clock id (bit position in SCER/SCDR/SCSR registers). | |
| 398 | − See Atmel's datasheet to get a full list of system clock ids. | |
| 399 | − | |
| 400 | −For example: | |
| 401 | − system: systemck { | |
| 402 | − compatible = "atmel,at91rm9200-clk-system"; | |
| 403 | − #address-cells = <1>; | |
| 404 | − #size-cells = <0>; | |
| 405 | − | |
| 406 | − ddrck { | |
| 407 | − #clock-cells = <0>; | |
| 408 | − reg = <2>; | |
| 409 | − clocks = <&mck>; | |
| 410 | − }; | |
| 411 | − | |
| 412 | − uhpck { | |
| 413 | − #clock-cells = <0>; | |
| 414 | − reg = <6>; | |
| 415 | − clocks = <&usb>; | |
| 416 | − }; | |
| 417 | − | |
| 418 | − udpck { | |
| 419 | − #clock-cells = <0>; | |
| 420 | − reg = <7>; | |
| 421 | − clocks = <&usb>; | |
| 422 | − }; | |
| 423 | − }; | |
| 424 | − | |
| 425 | − | |
| 426 | −Required properties for usb clock: | |
| 427 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 428 | −- clocks : shall be the smd clock source phandles. | |
| 429 | − e.g. clocks = <&pllb>; | |
| 430 | −- atmel,clk-divisors (only available for "atmel,at91rm9200-clk-usb"): | |
| 431 | − usb clock divisor table. | |
| 432 | − e.g. divisors = <1 2 4 0>; | |
| 433 | − | |
| 434 | −For example: | |
| 435 | − usb: usbck { | |
| 436 | − compatible = "atmel,at91sam9x5-clk-usb"; | |
| 437 | − #clock-cells = <0>; | |
| 438 | − clocks = <&plladiv>, <&utmi>; | |
| 439 | − }; | |
| 440 | − | |
| 441 | − usb: usbck { | |
| 442 | − compatible = "atmel,at91rm9200-clk-usb"; | |
| 443 | − #clock-cells = <0>; | |
| 444 | − clocks = <&pllb>; | |
| 445 | − atmel,clk-divisors = <1 2 4 0>; | |
| 446 | − }; | |
| 447 | − | |
| 448 | − | |
| 449 | −Required properties for utmi clock: | |
| 450 | −- interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>". | |
| 451 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 452 | −- clocks : shall be the main clock source phandle. | |
| 453 | − | |
| 454 | −For example: | |
| 455 | − utmi: utmick { | |
| 456 | − compatible = "atmel,at91sam9x5-clk-utmi"; | |
| 457 | − interrupt-parent = <&pmc>; | |
| 458 | − interrupts = <AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>; | |
| 459 | − #clock-cells = <0>; | |
| 460 | − clocks = <&main>; | |
| 461 | − }; | |
| 462 | − | |
| 463 | −Required properties for 32 bits bus Matrix clock (h32mx clock): | |
| 464 | −- #clock-cells : from common clock binding; shall be set to 0. | |
| 465 | −- clocks : shall be the master clock source phandle. | |
| 466 | − | |
| 467 | −For example: | |
| 468 | − h32ck: h32mxck { | |
| 469 | − #clock-cells = <0>; | |
| 470 | − compatible = "atmel,sama5d4-clk-h32mx"; | |
| 471 | − clocks = <&mck>; | |
| 472 | − }; | |
| 473 | − | |
| 474 | −Required properties for generated clocks: | |
| 475 | −- #size-cells : shall be 0 (reg is used to encode clk id). | |
| 476 | −- #address-cells : shall be 1 (reg is used to encode clk id). | |
| 477 | −- clocks : shall be the generated clock source phandles. | |
| 478 | − e.g. clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>; | |
| 479 | −- name: device tree node describing a specific generated clock. | |
| 480 | − * #clock-cells : from common clock binding; shall be set to 0. | |
| 481 | − * reg: peripheral id. See Atmel's datasheets to get a full | |
| 482 | − list of peripheral ids. | |
| 483 | − * atmel,clk-output-range : minimum and maximum clock frequency | |
| 484 | − (two u32 fields). | |
| 485 | − | |
| 486 | −For example: | |
| 487 | − gck { | |
| 488 | − compatible = "atmel,sama5d2-clk-generated"; | |
| 489 | − #address-cells = <1>; | |
| 490 | − #size-cells = <0>; | |
| 491 | − clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>; | |
| 492 | − | |
| 493 | − tcb0_gclk: tcb0_gclk { | |
| 494 | − #clock-cells = <0>; | |
| 495 | − reg = <35>; | |
| 496 | − atmel,clk-output-range = <0 83000000>; | |
| 497 | − }; | |
| 498 | − | |
| 499 | − pwm_gclk: pwm_gclk { | |
| 500 | − #clock-cells = <0>; | |
| 501 | − reg = <38>; | |
| 502 | − atmel,clk-output-range = <0 83000000>; | |
| 503 | − }; | |
| 504 | − }; | |
| 505 | − | |
| 506 | −Required properties for I2S mux clocks: | |
| 507 | −- #size-cells : shall be 0 (reg is used to encode I2S bus id). | |
| 508 | −- #address-cells : shall be 1 (reg is used to encode I2S bus id). | |
| 509 | −- name: device tree node describing a specific mux clock. | |
| 510 | − * #clock-cells : from common clock binding; shall be set to 0. | |
| 511 | − * clocks : shall be the mux clock parent phandles; shall be 2 phandles: | |
| 512 | − peripheral and generated clock; the first phandle shall belong to the | |
| 513 | − peripheral clock and the second one shall belong to the generated | |
| 514 | − clock; "clock-indices" property can be user to specify | |
| 515 | − the correct order. | |
| 516 | − * reg: I2S bus id of the corresponding mux clock. | |
| 517 | − e.g. reg = <0>; for i2s0, reg = <1>; for i2s1 | |
| 518 | − | |
| 519 | −For example: | |
| 520 | − i2s_clkmux { | |
| 521 | − compatible = "atmel,sama5d2-clk-i2s-mux"; | |
| 522 | − #address-cells = <1>; | |
| 523 | − #size-cells = <0>; | |
| 524 | − | |
| 525 | − i2s0muxck: i2s0_muxclk { | |
| 526 | − clocks = <&i2s0_clk>, <&i2s0_gclk>; | |
| 527 | − #clock-cells = <0>; | |
| 528 | − reg = <0>; | |
| 529 | − }; | |
| 530 | − | |
| 531 | − i2s1muxck: i2s1_muxclk { | |
| 532 | − clocks = <&i2s1_clk>, <&i2s1_gclk>; | |
| 533 | − #clock-cells = <0>; | |
| 534 | − reg = <1>; | |
| 535 | − }; | |
| 55 | + pmc: pmc@f0018000 { | |
| 56 | + compatible = "atmel,sama5d4-pmc", "syscon"; | |
| 57 | + reg = <0xf0018000 0x120>; | |
| 58 | + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
| 59 | + #clock-cells = <2>; | |
| 60 | + clocks = <&clk32k>, <&main_xtal>; | |
| 61 | + clock-names = "slow_clk", "main_xtal"; | |
| 536 | 62 | }; |
| @@ -0,0 +1,43 @@ | ||
| 1 | +* Hisilicon Hi3670 Clock Controller | |
| 2 | + | |
| 3 | +The Hi3670 clock controller generates and supplies clock to various | |
| 4 | +controllers within the Hi3670 SoC. | |
| 5 | + | |
| 6 | +Required Properties: | |
| 7 | + | |
| 8 | +- compatible: the compatible should be one of the following strings to | |
| 9 | + indicate the clock controller functionality. | |
| 10 | + | |
| 11 | + - "hisilicon,hi3670-crgctrl" | |
| 12 | + - "hisilicon,hi3670-pctrl" | |
| 13 | + - "hisilicon,hi3670-pmuctrl" | |
| 14 | + - "hisilicon,hi3670-sctrl" | |
| 15 | + - "hisilicon,hi3670-iomcu" | |
| 16 | + - "hisilicon,hi3670-media1-crg" | |
| 17 | + - "hisilicon,hi3670-media2-crg" | |
| 18 | + | |
| 19 | +- reg: physical base address of the controller and length of memory mapped | |
| 20 | + region. | |
| 21 | + | |
| 22 | +- #clock-cells: should be 1. | |
| 23 | + | |
| 24 | +Each clock is assigned an identifier and client nodes use this identifier | |
| 25 | +to specify the clock which they consume. | |
| 26 | + | |
| 27 | +All these identifier could be found in <dt-bindings/clock/hi3670-clock.h>. | |
| 28 | + | |
| 29 | +Examples: | |
| 30 | + crg_ctrl: clock-controller@fff35000 { | |
| 31 | + compatible = "hisilicon,hi3670-crgctrl", "syscon"; | |
| 32 | + reg = <0x0 0xfff35000 0x0 0x1000>; | |
| 33 | + #clock-cells = <1>; | |
| 34 | + }; | |
| 35 | + | |
| 36 | + uart0: serial@fdf02000 { | |
| 37 | + compatible = "arm,pl011", "arm,primecell"; | |
| 38 | + reg = <0x0 0xfdf02000 0x0 0x1000>; | |
| 39 | + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; | |
| 40 | + clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>, | |
| 41 | + <&crg_ctrl HI3670_PCLK>; | |
| 42 | + clock-names = "uartclk", "apb_pclk"; | |
| 43 | + }; | |
| @@ -6,6 +6,14 @@ Required properties: · 5 unmodified lines | ||
| 6 | 6 | - interrupts: Should contain CCM interrupt |
| 7 | 7 | - #clock-cells: Should be <1> |
| 8 | 8 | |
| 9 | +Optional properties: | |
| 10 | +- fsl,pmic-stby-poweroff: Configure CCM to assert PMIC_STBY_REQ signal | |
| 11 | + on power off. | |
| 12 | + Use this property if the SoC should be powered off by external power | |
| 13 | + management IC (PMIC) triggered via PMIC_STBY_REQ signal. | |
| 14 | + Boards that are designed to initiate poweroff on PMIC_ON_REQ signal should | |
| 15 | + be using "syscon-poweroff" driver instead. | |
| 16 | + | |
| 9 | 17 | The clock consumer should specify the desired clock by having the clock |
| 10 | 18 | ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx6qdl-clock.h |
| 11 | 19 | for the full list of i.MX6 Quad and DualLite clock IDs. |
| @@ -6,8 +6,11 @@ to provide many different clock signals derived from only 2 external source · 5 unmodified lines | ||
| 6 | 6 | clocks. |
| 7 | 7 | |
| 8 | 8 | Required properties: |
| 9 | −- compatible : Should be "ingenic,<soctype>-cgu". | |
| 10 | − For example "ingenic,jz4740-cgu" or "ingenic,jz4780-cgu". | |
| 9 | +- compatible : Should be one of: | |
| 10 | + * ingenic,jz4740-cgu | |
| 11 | + * ingenic,jz4725b-cgu | |
| 12 | + * ingenic,jz4770-cgu | |
| 13 | + * ingenic,jz4780-cgu | |
| 11 | 14 | - reg : The address & length of the CGU registers. |
| 12 | 15 | - clocks : List of phandle & clock specifiers for clocks external to the CGU. |
| 13 | 16 | Two such external clocks should be specified - first the external crystal |
| @@ -0,0 +1,18 @@ | ||
| 1 | +Qualcomm Camera Clock & Reset Controller Binding | |
| 2 | +------------------------------------------------ | |
| 3 | + | |
| 4 | +Required properties : | |
| 5 | +- compatible : shall contain "qcom,sdm845-camcc". | |
| 6 | +- reg : shall contain base register location and length. | |
| 7 | +- #clock-cells : from common clock binding, shall contain 1. | |
| 8 | +- #reset-cells : from common reset binding, shall contain 1. | |
| 9 | +- #power-domain-cells : from generic power domain binding, shall contain 1. | |
| 10 | + | |
| 11 | +Example: | |
| 12 | + camcc: clock-controller@ad00000 { | |
| 13 | + compatible = "qcom,sdm845-camcc"; | |
| 14 | + reg = <0xad00000 0x10000>; | |
| 15 | + #clock-cells = <1>; | |
| 16 | + #reset-cells = <1>; | |
| 17 | + #power-domain-cells = <1>; | |
| 18 | + }; | |
| @@ -19,6 +19,9 @@ Required properties : · 18 unmodified lines | ||
| 19 | 19 | "qcom,gcc-msm8996" |
| 20 | 20 | "qcom,gcc-msm8998" |
| 21 | 21 | "qcom,gcc-mdm9615" |
| 22 | + "qcom,gcc-qcs404" | |
| 23 | + "qcom,gcc-sdm630" | |
| 24 | + "qcom,gcc-sdm660" | |
| 22 | 25 | "qcom,gcc-sdm845" |
| 23 | 26 | |
| 24 | 27 | - reg : shall contain base register location and length |
| @@ -0,0 +1,60 @@ | ||
| 1 | +High-Frequency PLL (HFPLL) | |
| 2 | + | |
| 3 | +PROPERTIES | |
| 4 | + | |
| 5 | +- compatible: | |
| 6 | + Usage: required | |
| 7 | + Value type: <string>: | |
| 8 | + shall contain only one of the following. The generic | |
| 9 | + compatible "qcom,hfpll" should be also included. | |
| 10 | + | |
| 11 | + "qcom,hfpll-ipq8064", "qcom,hfpll" | |
| 12 | + "qcom,hfpll-apq8064", "qcom,hfpll" | |
| 13 | + "qcom,hfpll-msm8974", "qcom,hfpll" | |
| 14 | + "qcom,hfpll-msm8960", "qcom,hfpll" | |
| 15 | + | |
| 16 | +- reg: | |
| 17 | + Usage: required | |
| 18 | + Value type: <prop-encoded-array> | |
| 19 | + Definition: address and size of HPLL registers. An optional second | |
| 20 | + element specifies the address and size of the alias | |
| 21 | + register region. | |
| 22 | + | |
| 23 | +- clocks: | |
| 24 | + Usage: required | |
| 25 | + Value type: <prop-encoded-array> | |
| 26 | + Definition: reference to the xo clock. | |
| 27 | + | |
| 28 | +- clock-names: | |
| 29 | + Usage: required | |
| 30 | + Value type: <stringlist> | |
| 31 | + Definition: must be "xo". | |
| 32 | + | |
| 33 | +- clock-output-names: | |
| 34 | + Usage: required | |
| 35 | + Value type: <string> | |
| 36 | + Definition: Name of the PLL. Typically hfpllX where X is a CPU number | |
| 37 | + starting at 0. Otherwise hfpll_Y where Y is more specific | |
| 38 | + such as "l2". | |
| 39 | + | |
| 40 | +Example: | |
| 41 | + | |
| 42 | +1) An HFPLL for the L2 cache. | |
| 43 | + | |
| 44 | + clock-controller@f9016000 { | |
| 45 | + compatible = "qcom,hfpll-ipq8064", "qcom,hfpll"; | |
| 46 | + reg = <0xf9016000 0x30>; | |
| 47 | + clocks = <&xo_board>; | |
| 48 | + clock-names = "xo"; | |
| 49 | + clock-output-names = "hfpll_l2"; | |
| 50 | + }; | |
| 51 | + | |
| 52 | +2) An HFPLL for CPU0. This HFPLL has the alias register region. | |
| 53 | + | |
| 54 | + clock-controller@f908a000 { | |
| 55 | + compatible = "qcom,hfpll-ipq8064", "qcom,hfpll"; | |
| 56 | + reg = <0xf908a000 0x30>, <0xf900a000 0x30>; | |
| 57 | + clocks = <&xo_board>; | |
| 58 | + clock-names = "xo"; | |
| 59 | + clock-output-names = "hfpll0"; | |
| 60 | + }; | |
| @@ -0,0 +1,34 @@ | ||
| 1 | +Krait Clock Controller | |
| 2 | + | |
| 3 | +PROPERTIES | |
| 4 | + | |
| 5 | +- compatible: | |
| 6 | + Usage: required | |
| 7 | + Value type: <string> | |
| 8 | + Definition: must be one of: | |
| 9 | + "qcom,krait-cc-v1" | |
| 10 | + "qcom,krait-cc-v2" | |
| 11 | + | |
| 12 | +- #clock-cells: | |
| 13 | + Usage: required | |
| 14 | + Value type: <u32> | |
| 15 | + Definition: must be 1 | |
| 16 | + | |
| 17 | +- clocks: | |
| 18 | + Usage: required | |
| 19 | + Value type: <prop-encoded-array> | |
| 20 | + Definition: reference to the clock parents of hfpll, secondary muxes. | |
| 21 | + | |
| 22 | +- clock-names: | |
| 23 | + Usage: required | |
| 24 | + Value type: <stringlist> | |
| 25 | + Definition: must be "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb". | |
| 26 | + | |
| 27 | +Example: | |
| 28 | + | |
| 29 | + kraitcc: clock-controller { | |
| 30 | + compatible = "qcom,krait-cc-v1"; | |
| 31 | + clocks = <&hfpll0>, <&hfpll1>, <&acpu0_aux>, <&acpu1_aux>, <qsb>; | |
| 32 | + clock-names = "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb"; | |
| 33 | + #clock-cells = <1>; | |
| 34 | + }; | |
| @@ -13,9 +13,13 @@ They provide the following functionalities: · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | Required Properties: |
| 15 | 15 | - compatible: Must be one of: |
| 16 | + - "renesas,r7s9210-cpg-mssr" for the r7s9210 SoC (RZ/A2) | |
| 16 | 17 | - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M) |
| 18 | + - "renesas,r8a7744-cpg-mssr" for the r8a7744 SoC (RZ/G1N) | |
| 17 | 19 | - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E) |
| 18 | 20 | - "renesas,r8a77470-cpg-mssr" for the r8a77470 SoC (RZ/G1C) |
| 21 | + - "renesas,r8a774a1-cpg-mssr" for the r8a774a1 SoC (RZ/G2M) | |
| 22 | + - "renesas,r8a774c0-cpg-mssr" for the r8a774c0 SoC (RZ/G2E) | |
| 19 | 23 | - "renesas,r8a7790-cpg-mssr" for the r8a7790 SoC (R-Car H2) |
| 20 | 24 | - "renesas,r8a7791-cpg-mssr" for the r8a7791 SoC (R-Car M2-W) |
| 21 | 25 | - "renesas,r8a7792-cpg-mssr" for the r8a7792 SoC (R-Car V2H) |
| @@ -35,12 +39,13 @@ Required Properties: · 13 unmodified lines | ||
| 35 | 39 | - clocks: References to external parent clocks, one entry for each entry in |
| 36 | 40 | clock-names |
| 37 | 41 | - clock-names: List of external parent clock names. Valid names are: |
| 38 | − - "extal" (r8a7743, r8a7745, r8a77470, r8a7790, r8a7791, r8a7792, | |
| 39 | − r8a7793, r8a7794, r8a7795, r8a7796, r8a77965, r8a77970, | |
| 40 | − r8a77980, r8a77990, r8a77995) | |
| 41 | − - "extalr" (r8a7795, r8a7796, r8a77965, r8a77970, r8a77980) | |
| 42 | − - "usb_extal" (r8a7743, r8a7745, r8a77470, r8a7790, r8a7791, r8a7793, | |
| 43 | − r8a7794) | |
| 42 | + - "extal" (r7s9210, r8a7743, r8a7744, r8a7745, r8a77470, r8a774a1, | |
| 43 | + r8a774c0, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794, | |
| 44 | + r8a7795, r8a7796, r8a77965, r8a77970, r8a77980, r8a77990, | |
| 45 | + r8a77995) | |
| 46 | + - "extalr" (r8a774a1, r8a7795, r8a7796, r8a77965, r8a77970, r8a77980) | |
| 47 | + - "usb_extal" (r8a7743, r8a7744, r8a7745, r8a77470, r8a7790, r8a7791, | |
| 48 | + r8a7793, r8a7794) | |
| 44 | 49 | |
| 45 | 50 | - #clock-cells: Must be 2 |
| 46 | 51 | - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" |
| @@ -0,0 +1,73 @@ | ||
| 1 | +================== | |
| 2 | +C-SKY CPU Bindings | |
| 3 | +================== | |
| 4 | + | |
| 5 | +The device tree allows to describe the layout of CPUs in a system through | |
| 6 | +the "cpus" node, which in turn contains a number of subnodes (ie "cpu") | |
| 7 | +defining properties for every cpu. | |
| 8 | + | |
| 9 | +Only SMP system need to care about the cpus node and single processor | |
| 10 | +needn't define cpus node at all. | |
| 11 | + | |
| 12 | +===================================== | |
| 13 | +cpus and cpu node bindings definition | |
| 14 | +===================================== | |
| 15 | + | |
| 16 | +- cpus node | |
| 17 | + | |
| 18 | + Description: Container of cpu nodes | |
| 19 | + | |
| 20 | + The node name must be "cpus". | |
| 21 | + | |
| 22 | + A cpus node must define the following properties: | |
| 23 | + | |
| 24 | + - #address-cells | |
| 25 | + Usage: required | |
| 26 | + Value type: <u32> | |
| 27 | + Definition: must be set to 1 | |
| 28 | + - #size-cells | |
| 29 | + Usage: required | |
| 30 | + Value type: <u32> | |
| 31 | + Definition: must be set to 0 | |
| 32 | + | |
| 33 | +- cpu node | |
| 34 | + | |
| 35 | + Description: Describes one of SMP cores | |
| 36 | + | |
| 37 | + PROPERTIES | |
| 38 | + | |
| 39 | + - device_type | |
| 40 | + Usage: required | |
| 41 | + Value type: <string> | |
| 42 | + Definition: must be "cpu" | |
| 43 | + - reg | |
| 44 | + Usage: required | |
| 45 | + Value type: <u32> | |
| 46 | + Definition: CPU index | |
| 47 | + - compatible: | |
| 48 | + Usage: required | |
| 49 | + Value type: <string> | |
| 50 | + Definition: must contain "csky", eg: | |
| 51 | + "csky,610" | |
| 52 | + "csky,807" | |
| 53 | + "csky,810" | |
| 54 | + "csky,860" | |
| 55 | + | |
| 56 | +Example: | |
| 57 | +-------- | |
| 58 | + | |
| 59 | + cpus { | |
| 60 | + #address-cells = <1>; | |
| 61 | + #size-cells = <0>; | |
| 62 | + cpu@0 { | |
| 63 | + device_type = "cpu"; | |
| 64 | + reg = <0>; | |
| 65 | + status = "ok"; | |
| 66 | + }; | |
| 67 | + | |
| 68 | + cpu@1 { | |
| 69 | + device_type = "cpu"; | |
| 70 | + reg = <1>; | |
| 71 | + status = "ok"; | |
| 72 | + }; | |
| 73 | + }; | |
| @@ -15,6 +15,13 @@ Required children nodes: · 14 unmodified lines | ||
| 15 | 15 | to external devices using the OF graph reprensentation (see ../graph.txt). |
| 16 | 16 | At least one port node is required. |
| 17 | 17 | |
| 18 | +Optional properties in grandchild nodes: | |
| 19 | + Any endpoint grandchild node may specify a desired video interface | |
| 20 | + according to ../../media/video-interfaces.txt, specifically | |
| 21 | + - bus-width: recognized values are <12>, <16>, <18> and <24>, and | |
| 22 | + override any output mode selection heuristic, forcing "rgb444", | |
| 23 | + "rgb565", "rgb666" and "rgb888" respectively. | |
| 24 | + | |
| 18 | 25 | Example: |
| 19 | 26 | |
| 20 | 27 | hlcdc: hlcdc@f0030000 { |
| @@ -50,3 +57,19 @@ Example: · 29 unmodified lines | ||
| 50 | 57 | #pwm-cells = <3>; |
| 51 | 58 | }; |
| 52 | 59 | }; |
| 60 | + | |
| 61 | +Example 2: With a video interface override to force rgb565; as above | |
| 62 | +but with these changes/additions: | |
| 63 | + | |
| 64 | + &hlcdc { | |
| 65 | + hlcdc-display-controller { | |
| 66 | + pinctrl-names = "default"; | |
| 67 | + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>; | |
| 68 | + | |
| 69 | + port@0 { | |
| 70 | + hlcdc_panel_output: endpoint@0 { | |
| 71 | + bus-width = <16>; | |
| 72 | + }; | |
| 73 | + }; | |
| 74 | + }; | |
| 75 | + }; | |
| @@ -22,7 +22,13 @@ among others. · 21 unmodified lines | ||
| 22 | 22 | |
| 23 | 23 | Required properties: |
| 24 | 24 | |
| 25 | −- compatible: Must be "lvds-encoder" | |
| 25 | +- compatible: Must be one or more of the following | |
| 26 | + - "ti,ds90c185" for the TI DS90C185 FPD-Link Serializer | |
| 27 | + - "lvds-encoder" for a generic LVDS encoder device | |
| 28 | + | |
| 29 | + When compatible with the generic version, nodes must list the | |
| 30 | + device-specific version corresponding to the device first | |
| 31 | + followed by the generic version. | |
| 26 | 32 | |
| 27 | 33 | Required nodes: |
| 28 | 34 | |
| @@ -14,10 +14,22 @@ Required properties: · 13 unmodified lines | ||
| 14 | 14 | - "renesas,r8a7795-lvds" for R8A7795 (R-Car H3) compatible LVDS encoders |
| 15 | 15 | - "renesas,r8a7796-lvds" for R8A7796 (R-Car M3-W) compatible LVDS encoders |
| 16 | 16 | - "renesas,r8a77970-lvds" for R8A77970 (R-Car V3M) compatible LVDS encoders |
| 17 | + - "renesas,r8a77980-lvds" for R8A77980 (R-Car V3H) compatible LVDS encoders | |
| 18 | + - "renesas,r8a77990-lvds" for R8A77990 (R-Car E3) compatible LVDS encoders | |
| 17 | 19 | - "renesas,r8a77995-lvds" for R8A77995 (R-Car D3) compatible LVDS encoders |
| 18 | 20 | |
| 19 | 21 | - reg: Base address and length for the memory-mapped registers |
| 20 | −- clocks: A phandle + clock-specifier pair for the functional clock | |
| 22 | +- clocks: A list of phandles + clock-specifier pairs, one for each entry in | |
| 23 | + the clock-names property. | |
| 24 | +- clock-names: Name of the clocks. This property is model-dependent. | |
| 25 | + - The functional clock, which mandatory for all models, shall be listed | |
| 26 | + first, and shall be named "fck". | |
| 27 | + - On R8A77990 and R8A77995, the LVDS encoder can use the EXTAL or | |
| 28 | + DU_DOTCLKINx clocks. Those clocks are optional. When supplied they must be | |
| 29 | + named "extal" and "dclkin.x" respectively, with "x" being the DU_DOTCLKIN | |
| 30 | + numerical index. | |
| 31 | + - When the clocks property only contains the functional clock, the | |
| 32 | + clock-names property may be omitted. | |
| 21 | 33 | - resets: A phandle + reset specifier for the module reset |
| 22 | 34 | |
| 23 | 35 | Required nodes: |
| @@ -0,0 +1,87 @@ | ||
| 1 | +SN65DSI86 DSI to eDP bridge chip | |
| 2 | +-------------------------------- | |
| 3 | + | |
| 4 | +This is the binding for Texas Instruments SN65DSI86 bridge. | |
| 5 | +http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf | |
| 6 | + | |
| 7 | +Required properties: | |
| 8 | +- compatible: Must be "ti,sn65dsi86" | |
| 9 | +- reg: i2c address of the chip, 0x2d as per datasheet | |
| 10 | +- enable-gpios: gpio specification for bridge_en pin (active high) | |
| 11 | + | |
| 12 | +- vccio-supply: A 1.8V supply that powers up the digital IOs. | |
| 13 | +- vpll-supply: A 1.8V supply that powers up the displayport PLL. | |
| 14 | +- vcca-supply: A 1.2V supply that powers up the analog circuits. | |
| 15 | +- vcc-supply: A 1.2V supply that powers up the digital core. | |
| 16 | + | |
| 17 | +Optional properties: | |
| 18 | +- interrupts-extended: Specifier for the SN65DSI86 interrupt line. | |
| 19 | + | |
| 20 | +- gpio-controller: Marks the device has a GPIO controller. | |
| 21 | +- #gpio-cells : Should be two. The first cell is the pin number and | |
| 22 | + the second cell is used to specify flags. | |
| 23 | + See ../../gpio/gpio.txt for more information. | |
| 24 | +- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of | |
| 25 | + the cell formats. | |
| 26 | + | |
| 27 | +- clock-names: should be "refclk" | |
| 28 | +- clocks: Specification for input reference clock. The reference | |
| 29 | + clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. | |
| 30 | + | |
| 31 | +- data-lanes: See ../../media/video-interface.txt | |
| 32 | +- lane-polarities: See ../../media/video-interface.txt | |
| 33 | + | |
| 34 | +- suspend-gpios: specification for GPIO1 pin on bridge (active low) | |
| 35 | + | |
| 36 | +Required nodes: | |
| 37 | +This device has two video ports. Their connections are modelled using the | |
| 38 | +OF graph bindings specified in Documentation/devicetree/bindings/graph.txt. | |
| 39 | + | |
| 40 | +- Video port 0 for DSI input | |
| 41 | +- Video port 1 for eDP output | |
| 42 | + | |
| 43 | +Example | |
| 44 | +------- | |
| 45 | + | |
| 46 | +edp-bridge@2d { | |
| 47 | + compatible = "ti,sn65dsi86"; | |
| 48 | + #address-cells = <1>; | |
| 49 | + #size-cells = <0>; | |
| 50 | + reg = <0x2d>; | |
| 51 | + | |
| 52 | + enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>; | |
| 53 | + suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>; | |
| 54 | + | |
| 55 | + interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>; | |
| 56 | + | |
| 57 | + vccio-supply = <&pm8916_l17>; | |
| 58 | + vcca-supply = <&pm8916_l6>; | |
| 59 | + vpll-supply = <&pm8916_l17>; | |
| 60 | + vcc-supply = <&pm8916_l6>; | |
| 61 | + | |
| 62 | + clock-names = "refclk"; | |
| 63 | + clocks = <&input_refclk>; | |
| 64 | + | |
| 65 | + ports { | |
| 66 | + #address-cells = <1>; | |
| 67 | + #size-cells = <0>; | |
| 68 | + | |
| 69 | + port@0 { | |
| 70 | + reg = <0>; | |
| 71 | + | |
| 72 | + edp_bridge_in: endpoint { | |
| 73 | + remote-endpoint = <&dsi_out>; | |
| 74 | + }; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + port@1 { | |
| 78 | + reg = <1>; | |
| 79 | + | |
| 80 | + edp_bridge_out: endpoint { | |
| 81 | + data-lanes = <2 1 3 0>; | |
| 82 | + lane-polarities = <0 1 0 1>; | |
| 83 | + remote-endpoint = <&edp_panel_in>; | |
| 84 | + }; | |
| 85 | + }; | |
| 86 | + }; | |
| 87 | +} | |
| @@ -0,0 +1,35 @@ | ||
| 1 | +TC358764 MIPI-DSI to LVDS panel bridge | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | + - compatible: "toshiba,tc358764" | |
| 5 | + - reg: the virtual channel number of a DSI peripheral | |
| 6 | + - vddc-supply: core voltage supply, 1.2V | |
| 7 | + - vddio-supply: I/O voltage supply, 1.8V or 3.3V | |
| 8 | + - vddlvds-supply: LVDS1/2 voltage supply, 3.3V | |
| 9 | + - reset-gpios: a GPIO spec for the reset pin | |
| 10 | + | |
| 11 | +The device node can contain following 'port' child nodes, | |
| 12 | +according to the OF graph bindings defined in [1]: | |
| 13 | + 0: DSI Input, not required, if the bridge is DSI controlled | |
| 14 | + 1: LVDS Output, mandatory | |
| 15 | + | |
| 16 | +[1]: Documentation/devicetree/bindings/media/video-interfaces.txt | |
| 17 | + | |
| 18 | +Example: | |
| 19 | + | |
| 20 | + bridge@0 { | |
| 21 | + reg = <0>; | |
| 22 | + compatible = "toshiba,tc358764"; | |
| 23 | + vddc-supply = <&vcc_1v2_reg>; | |
| 24 | + vddio-supply = <&vcc_1v8_reg>; | |
| 25 | + vddlvds-supply = <&vcc_3v3_reg>; | |
| 26 | + reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>; | |
| 27 | + #address-cells = <1>; | |
| 28 | + #size-cells = <0>; | |
| 29 | + port@1 { | |
| 30 | + reg = <1>; | |
| 31 | + lvds_ep: endpoint { | |
| 32 | + remote-endpoint = <&panel_ep>; | |
| 33 | + }; | |
| 34 | + }; | |
| 35 | + }; | |
| @@ -21,6 +21,9 @@ Required properties: · 20 unmodified lines | ||
| 21 | 21 | - samsung,pll-clock-frequency: specifies frequency of the oscillator clock |
| 22 | 22 | - #address-cells, #size-cells: should be set respectively to <1> and <0> |
| 23 | 23 | according to DSI host bindings (see MIPI DSI bindings [1]) |
| 24 | + - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst | |
| 25 | + mode | |
| 26 | + - samsung,esc-clock-frequency: specifies DSI frequency in escape mode | |
| 24 | 27 | |
| 25 | 28 | Optional properties: |
| 26 | 29 | - power-domains: a phandle to DSIM power domain node |
| @@ -29,25 +32,9 @@ Child nodes: · 2 unmodified lines | ||
| 29 | 32 | Should contain DSI peripheral nodes (see MIPI DSI bindings [1]). |
| 30 | 33 | |
| 31 | 34 | Video interfaces: |
| 32 | − Device node can contain video interface port nodes according to [2]. | |
| 33 | − The following are properties specific to those nodes: | |
| 34 | − | |
| 35 | − port node inbound: | |
| 36 | − - reg: (required) must be 0. | |
| 37 | − port node outbound: | |
| 38 | − - reg: (required) must be 1. | |
| 39 | − | |
| 40 | − endpoint node connected from mic node (reg = 0): | |
| 41 | − - remote-endpoint: specifies the endpoint in mic node. This node is required | |
| 42 | − for Exynos5433 mipi dsi. So mic can access to panel node | |
| 43 | − throughout this dsi node. | |
| 44 | − endpoint node connected to panel node (reg = 1): | |
| 45 | − - remote-endpoint: specifies the endpoint in panel node. This node is | |
| 46 | − required in all kinds of exynos mipi dsi to represent | |
| 47 | − the connection between mipi dsi and panel. | |
| 48 | − - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst | |
| 49 | − mode | |
| 50 | − - samsung,esc-clock-frequency: specifies DSI frequency in escape mode | |
| 35 | + Device node can contain following video interface port nodes according to [2]: | |
| 36 | + 0: RGB input, | |
| 37 | + 1: DSI output | |
| 51 | 38 | |
| 52 | 39 | [1]: Documentation/devicetree/bindings/display/mipi-dsi-bus.txt |
| 53 | 40 | [2]: Documentation/devicetree/bindings/media/video-interfaces.txt |
| @@ -16,7 +16,7 @@ The following assumes that only a single peripheral is connected to a DSI · 15 unmodified lines | ||
| 16 | 16 | host. Experience shows that this is true for the large majority of setups. |
| 17 | 17 | |
| 18 | 18 | DSI host |
| 19 | −-------- | |
| 19 | +======== | |
| 20 | 20 | |
| 21 | 21 | In addition to the standard properties and those defined by the parent bus of |
| 22 | 22 | a DSI host, the following properties apply to a node representing a DSI host. |
| @@ -29,12 +29,24 @@ Required properties: · 6 unmodified lines | ||
| 29 | 29 | - #size-cells: Should be 0. There are cases where it makes sense to use a |
| 30 | 30 | different value here. See below. |
| 31 | 31 | |
| 32 | +Optional properties: | |
| 33 | +- clock-master: boolean. Should be enabled if the host is being used in | |
| 34 | + conjunction with another DSI host to drive the same peripheral. Hardware | |
| 35 | + supporting such a configuration generally requires the data on both the busses | |
| 36 | + to be driven by the same clock. Only the DSI host instance controlling this | |
| 37 | + clock should contain this property. | |
| 38 | + | |
| 32 | 39 | DSI peripheral |
| 33 | −-------------- | |
| 40 | +============== | |
| 41 | + | |
| 42 | +Peripherals with DSI as control bus, or no control bus | |
| 43 | +------------------------------------------------------ | |
| 34 | 44 | |
| 35 | −Peripherals are represented as child nodes of the DSI host's node. Properties | |
| 36 | −described here apply to all DSI peripherals, but individual bindings may want | |
| 37 | −to define additional, device-specific properties. | |
| 45 | +Peripherals with the DSI bus as the primary control bus, or peripherals with | |
| 46 | +no control bus but use the DSI bus to transmit pixel data are represented | |
| 47 | +as child nodes of the DSI host's node. Properties described here apply to all | |
| 48 | +DSI peripherals, but individual bindings may want to define additional, | |
| 49 | +device-specific properties. | |
| 38 | 50 | |
| 39 | 51 | Required properties: |
| 40 | 52 | - reg: The virtual channel number of a DSI peripheral. Must be in the range |
| @@ -49,9 +61,37 @@ case two alternative representations can be chosen: · 8 unmodified lines | ||
| 49 | 61 | property is the number of the first virtual channel and the second cell is |
| 50 | 62 | the number of consecutive virtual channels. |
| 51 | 63 | |
| 52 | −Example | |
| 53 | −------- | |
| 54 | − | |
| 64 | +Peripherals with a different control bus | |
| 65 | +---------------------------------------- | |
| 66 | + | |
| 67 | +There are peripherals that have I2C/SPI (or some other non-DSI bus) as the | |
| 68 | +primary control bus, but are also connected to a DSI bus (mostly for the data | |
| 69 | +path). Connections between such peripherals and a DSI host can be represented | |
| 70 | +using the graph bindings [1], [2]. | |
| 71 | + | |
| 72 | +Peripherals that support dual channel DSI | |
| 73 | +----------------------------------------- | |
| 74 | + | |
| 75 | +Peripherals with higher bandwidth requirements can be connected to 2 DSI | |
| 76 | +busses. Each DSI bus/channel drives some portion of the pixel data (generally | |
| 77 | +left/right half of each line of the display, or even/odd lines of the display). | |
| 78 | +The graph bindings should be used to represent the multiple DSI busses that are | |
| 79 | +connected to this peripheral. Each DSI host's output endpoint can be linked to | |
| 80 | +an input endpoint of the DSI peripheral. | |
| 81 | + | |
| 82 | +[1] Documentation/devicetree/bindings/graph.txt | |
| 83 | +[2] Documentation/devicetree/bindings/media/video-interfaces.txt | |
| 84 | + | |
| 85 | +Examples | |
| 86 | +======== | |
| 87 | +- (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus | |
| 88 | + with different virtual channel configurations. | |
| 89 | +- (4) is an example of a peripheral on a I2C control bus connected to a | |
| 90 | + DSI host using of-graph bindings. | |
| 91 | +- (5) is an example of 2 DSI hosts driving a dual-channel DSI peripheral, | |
| 92 | + which uses I2C as its primary control bus. | |
| 93 | + | |
| 94 | +1) | |
| 55 | 95 | dsi-host { |
| 56 | 96 | ... |
| 57 | 97 | |
| @@ -67,6 +107,7 @@ Example · 9 unmodified lines | ||
| 67 | 107 | ... |
| 68 | 108 | }; |
| 69 | 109 | |
| 110 | +2) | |
| 70 | 111 | dsi-host { |
| 71 | 112 | ... |
| 72 | 113 | |
| @@ -82,6 +123,7 @@ Example · 9 unmodified lines | ||
| 82 | 123 | ... |
| 83 | 124 | }; |
| 84 | 125 | |
| 126 | +3) | |
| 85 | 127 | dsi-host { |
| 86 | 128 | ... |
| 87 | 129 | |
| @@ -96,3 +138,98 @@ Example · 8 unmodified lines | ||
| 96 | 138 | |
| 97 | 139 | ... |
| 98 | 140 | }; |
| 141 | + | |
| 142 | +4) | |
| 143 | + i2c-host { | |
| 144 | + ... | |
| 145 | + | |
| 146 | + dsi-bridge@35 { | |
| 147 | + compatible = "..."; | |
| 148 | + reg = <0x35>; | |
| 149 | + | |
| 150 | + ports { | |
| 151 | + ... | |
| 152 | + | |
| 153 | + port { | |
| 154 | + bridge_mipi_in: endpoint { | |
| 155 | + remote-endpoint = <&host_mipi_out>; | |
| 156 | + }; | |
| 157 | + }; | |
| 158 | + }; | |
| 159 | + }; | |
| 160 | + }; | |
| 161 | + | |
| 162 | + dsi-host { | |
| 163 | + ... | |
| 164 | + | |
| 165 | + ports { | |
| 166 | + ... | |
| 167 | + | |
| 168 | + port { | |
| 169 | + host_mipi_out: endpoint { | |
| 170 | + remote-endpoint = <&bridge_mipi_in>; | |
| 171 | + }; | |
| 172 | + }; | |
| 173 | + }; | |
| 174 | + }; | |
| 175 | + | |
| 176 | +5) | |
| 177 | + i2c-host { | |
| 178 | + dsi-bridge@35 { | |
| 179 | + compatible = "..."; | |
| 180 | + reg = <0x35>; | |
| 181 | + | |
| 182 | + ports { | |
| 183 | + #address-cells = <1>; | |
| 184 | + #size-cells = <0>; | |
| 185 | + | |
| 186 | + port@0 { | |
| 187 | + reg = <0>; | |
| 188 | + dsi0_in: endpoint { | |
| 189 | + remote-endpoint = <&dsi0_out>; | |
| 190 | + }; | |
| 191 | + }; | |
| 192 | + | |
| 193 | + port@1 { | |
| 194 | + reg = <1>; | |
| 195 | + dsi1_in: endpoint { | |
| 196 | + remote-endpoint = <&dsi1_out>; | |
| 197 | + }; | |
| 198 | + }; | |
| 199 | + }; | |
| 200 | + }; | |
| 201 | + }; | |
| 202 | + | |
| 203 | + dsi0-host { | |
| 204 | + ... | |
| 205 | + | |
| 206 | + /* | |
| 207 | + * this DSI instance drives the clock for both the host | |
| 208 | + * controllers | |
| 209 | + */ | |
| 210 | + clock-master; | |
| 211 | + | |
| 212 | + ports { | |
| 213 | + ... | |
| 214 | + | |
| 215 | + port { | |
| 216 | + dsi0_out: endpoint { | |
| 217 | + remote-endpoint = <&dsi0_in>; | |
| 218 | + }; | |
| 219 | + }; | |
| 220 | + }; | |
| 221 | + }; | |
| 222 | + | |
| 223 | + dsi1-host { | |
| 224 | + ... | |
| 225 | + | |
| 226 | + ports { | |
| 227 | + ... | |
| 228 | + | |
| 229 | + port { | |
| 230 | + dsi1_out: endpoint { | |
| 231 | + remote-endpoint = <&dsi1_in>; | |
| 232 | + }; | |
| 233 | + }; | |
| 234 | + }; | |
| 235 | + }; | |
| @@ -15,6 +15,8 @@ Required Properties: · 14 unmodified lines | ||
| 15 | 15 | - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU |
| 16 | 16 | - "renesas,du-r8a77965" for R8A77965 (R-Car M3-N) compatible DU |
| 17 | 17 | - "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU |
| 18 | + - "renesas,du-r8a77980" for R8A77980 (R-Car V3H) compatible DU | |
| 19 | + - "renesas,du-r8a77990" for R8A77990 (R-Car E3) compatible DU | |
| 18 | 20 | - "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU |
| 19 | 21 | |
| 20 | 22 | - reg: the memory-mapped I/O registers base address and length |
| @@ -61,6 +63,8 @@ corresponding to each DU output. · 40 unmodified lines | ||
| 61 | 63 | R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 - |
| 62 | 64 | R8A77965 (R-Car M3-N) DPAD 0 HDMI 0 LVDS 0 - |
| 63 | 65 | R8A77970 (R-Car V3M) DPAD 0 LVDS 0 - - |
| 66 | + R8A77980 (R-Car V3H) DPAD 0 LVDS 0 - - | |
| 67 | + R8A77990 (R-Car E3) DPAD 0 LVDS 0 LVDS 1 - | |
| 64 | 68 | R8A77995 (R-Car D3) DPAD 0 LVDS 0 LVDS 1 - |
| 65 | 69 | |
| 66 | 70 | |
| @@ -8,6 +8,9 @@ Required properties: · 7 unmodified lines | ||
| 8 | 8 | - compatible: value should be one of the following |
| 9 | 9 | "rockchip,rk3036-vop"; |
| 10 | 10 | "rockchip,rk3126-vop"; |
| 11 | + "rockchip,px30-vop-lit"; | |
| 12 | + "rockchip,px30-vop-big"; | |
| 13 | + "rockchip,rk3188-vop"; | |
| 11 | 14 | "rockchip,rk3288-vop"; |
| 12 | 15 | "rockchip,rk3368-vop"; |
| 13 | 16 | "rockchip,rk3366-vop"; |
| @@ -78,6 +78,7 @@ Required properties: · 77 unmodified lines | ||
| 78 | 78 | |
| 79 | 79 | - compatible: value must be one of: |
| 80 | 80 | * "allwinner,sun8i-a83t-dw-hdmi" |
| 81 | + * "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi" | |
| 81 | 82 | - reg: base address and size of memory-mapped region |
| 82 | 83 | - reg-io-width: See dw_hdmi.txt. Shall be 1. |
| 83 | 84 | - interrupts: HDMI interrupt number |
| @@ -96,6 +97,9 @@ Required properties: · 12 unmodified lines | ||
| 96 | 97 | first port should be the input endpoint. The second should be the |
| 97 | 98 | output, usually to an HDMI connector. |
| 98 | 99 | |
| 100 | +Optional properties: | |
| 101 | + - hvcc-supply: the VCC power supply of the controller | |
| 102 | + | |
| 99 | 103 | DWC HDMI PHY |
| 100 | 104 | ------------ |
| 101 | 105 | |
| @@ -103,6 +107,7 @@ Required properties: · 1 unmodified line | ||
| 103 | 107 | - compatible: value must be one of: |
| 104 | 108 | * allwinner,sun8i-a83t-hdmi-phy |
| 105 | 109 | * allwinner,sun8i-h3-hdmi-phy |
| 110 | + * allwinner,sun8i-r40-hdmi-phy | |
| 106 | 111 | * allwinner,sun50i-a64-hdmi-phy |
| 107 | 112 | - reg: base address and size of memory-mapped region |
| 108 | 113 | - clocks: phandles to the clocks feeding the HDMI PHY |
| @@ -112,9 +117,9 @@ Required properties: · 3 unmodified lines | ||
| 112 | 117 | - resets: phandle to the reset controller driving the PHY |
| 113 | 118 | - reset-names: must be "phy" |
| 114 | 119 | |
| 115 | −H3 and A64 HDMI PHY require additional clocks: | |
| 120 | +H3, A64 and R40 HDMI PHY require additional clocks: | |
| 116 | 121 | - pll-0: parent of phy clock |
| 117 | − - pll-1: second possible phy clock parent (A64 only) | |
| 122 | + - pll-1: second possible phy clock parent (A64/R40 only) | |
| 118 | 123 | |
| 119 | 124 | TV Encoder |
| 120 | 125 | ---------- |
| @@ -151,6 +156,8 @@ Required properties: · 30 unmodified lines | ||
| 151 | 156 | * allwinner,sun8i-v3s-tcon |
| 152 | 157 | * allwinner,sun9i-a80-tcon-lcd |
| 153 | 158 | * allwinner,sun9i-a80-tcon-tv |
| 159 | + * "allwinner,sun50i-a64-tcon-lcd", "allwinner,sun8i-a83t-tcon-lcd" | |
| 160 | + * "allwinner,sun50i-a64-tcon-tv", "allwinner,sun8i-a83t-tcon-tv" | |
| 154 | 161 | - reg: base address and size of memory-mapped region |
| 155 | 162 | - interrupts: interrupt associated to this IP |
| 156 | 163 | - clocks: phandles to the clocks feeding the TCON. |
| @@ -369,7 +376,11 @@ Required properties: · 212 unmodified lines | ||
| 369 | 376 | * allwinner,sun8i-a83t-de2-mixer-0 |
| 370 | 377 | * allwinner,sun8i-a83t-de2-mixer-1 |
| 371 | 378 | * allwinner,sun8i-h3-de2-mixer-0 |
| 379 | + * allwinner,sun8i-r40-de2-mixer-0 | |
| 380 | + * allwinner,sun8i-r40-de2-mixer-1 | |
| 372 | 381 | * allwinner,sun8i-v3s-de2-mixer |
| 382 | + * allwinner,sun50i-a64-de2-mixer-0 | |
| 383 | + * allwinner,sun50i-a64-de2-mixer-1 | |
| 373 | 384 | - reg: base address and size of the memory-mapped region. |
| 374 | 385 | - clocks: phandles to the clocks feeding the mixer |
| 375 | 386 | * bus: the mixer interface clock |
| @@ -403,6 +414,7 @@ Required properties: · 27 unmodified lines | ||
| 403 | 414 | * allwinner,sun8i-r40-display-engine |
| 404 | 415 | * allwinner,sun8i-v3s-display-engine |
| 405 | 416 | * allwinner,sun9i-a80-display-engine |
| 417 | + * allwinner,sun50i-a64-display-engine | |
| 406 | 418 | |
| 407 | 419 | - allwinner,pipelines: list of phandle to the display engine |
| 408 | 420 | frontends (DE 1.0) or mixers (DE 2.0) available. |
| @@ -7,16 +7,23 @@ assorted actions. · 6 unmodified lines | ||
| 7 | 7 | |
| 8 | 8 | Required properties: |
| 9 | 9 | - compatible: must contain one of the following: |
| 10 | − * "qcom,scm-apq8064" for APQ8064 platforms | |
| 11 | − * "qcom,scm-msm8660" for MSM8660 platforms | |
| 12 | − * "qcom,scm-msm8690" for MSM8690 platforms | |
| 13 | − * "qcom,scm-msm8996" for MSM8996 platforms | |
| 14 | − * "qcom,scm-ipq4019" for IPQ4019 platforms | |
| 15 | − * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc) | |
| 16 | −- clocks: One to three clocks may be required based on compatible. | |
| 17 | − * No clock required for "qcom,scm-msm8996", "qcom,scm-ipq4019" | |
| 18 | − * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960" | |
| 19 | − * Core, iface, and bus clocks required for "qcom,scm" | |
| 10 | + * "qcom,scm-apq8064" | |
| 11 | + * "qcom,scm-apq8084" | |
| 12 | + * "qcom,scm-msm8660" | |
| 13 | + * "qcom,scm-msm8916" | |
| 14 | + * "qcom,scm-msm8960" | |
| 15 | + * "qcom,scm-msm8974" | |
| 16 | + * "qcom,scm-msm8996" | |
| 17 | + * "qcom,scm-msm8998" | |
| 18 | + * "qcom,scm-ipq4019" | |
| 19 | + * "qcom,scm-sdm845" | |
| 20 | + and: | |
| 21 | + * "qcom,scm" | |
| 22 | +- clocks: Specifies clocks needed by the SCM interface, if any: | |
| 23 | + * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and | |
| 24 | + "qcom,scm-msm8960" | |
| 25 | + * core, iface and bus clocks required for "qcom,scm-apq8084", | |
| 26 | + "qcom,scm-msm8916" and "qcom,scm-msm8974" | |
| 20 | 27 | - clock-names: Must contain "core" for the core clock, "iface" for the interface |
| 21 | 28 | clock and "bus" for the bus clock per the requirements of the compatible. |
| 22 | 29 | - qcom,dload-mode: phandle to the TCSR hardware block and offset of the |
| @@ -26,8 +33,10 @@ Example for MSM8916: · 3 unmodified lines | ||
| 26 | 33 | |
| 27 | 34 | firmware { |
| 28 | 35 | scm { |
| 29 | − compatible = "qcom,scm"; | |
| 30 | − clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; | |
| 36 | + compatible = "qcom,msm8916", "qcom,scm"; | |
| 37 | + clocks = <&gcc GCC_CRYPTO_CLK> , | |
| 38 | + <&gcc GCC_CRYPTO_AXI_CLK>, | |
| 39 | + <&gcc GCC_CRYPTO_AHB_CLK>; | |
| 31 | 40 | clock-names = "core", "bus", "iface"; |
| 32 | 41 | }; |
| 33 | 42 | }; |
| @@ -0,0 +1,82 @@ | ||
| 1 | +----------------------------------------------------------------- | |
| 2 | +Device Tree Bindings for the Xilinx Zynq MPSoC Firmware Interface | |
| 3 | +----------------------------------------------------------------- | |
| 4 | + | |
| 5 | +The zynqmp-firmware node describes the interface to platform firmware. | |
| 6 | +ZynqMP has an interface to communicate with secure firmware. Firmware | |
| 7 | +driver provides an interface to firmware APIs. Interface APIs can be | |
| 8 | +used by any driver to communicate to PMUFW(Platform Management Unit). | |
| 9 | +These requests include clock management, pin control, device control, | |
| 10 | +power management service, FPGA service and other platform management | |
| 11 | +services. | |
| 12 | + | |
| 13 | +Required properties: | |
| 14 | + - compatible: Must contain: "xlnx,zynqmp-firmware" | |
| 15 | + - method: The method of calling the PM-API firmware layer. | |
| 16 | + Permitted values are: | |
| 17 | + - "smc" : SMC #0, following the SMCCC | |
| 18 | + - "hvc" : HVC #0, following the SMCCC | |
| 19 | + | |
| 20 | +-------------------------------------------------------------------------- | |
| 21 | +Device Tree Clock bindings for the Zynq Ultrascale+ MPSoC controlled using | |
| 22 | +Zynq MPSoC firmware interface | |
| 23 | +-------------------------------------------------------------------------- | |
| 24 | +The clock controller is a h/w block of Zynq Ultrascale+ MPSoC clock | |
| 25 | +tree. It reads required input clock frequencies from the devicetree and acts | |
| 26 | +as clock provider for all clock consumers of PS clocks. | |
| 27 | + | |
| 28 | +See clock_bindings.txt for more information on the generic clock bindings. | |
| 29 | + | |
| 30 | +Required properties: | |
| 31 | + - #clock-cells: Must be 1 | |
| 32 | + - compatible: Must contain: "xlnx,zynqmp-clk" | |
| 33 | + - clocks: List of clock specifiers which are external input | |
| 34 | + clocks to the given clock controller. Please refer | |
| 35 | + the next section to find the input clocks for a | |
| 36 | + given controller. | |
| 37 | + - clock-names: List of clock names which are exteral input clocks | |
| 38 | + to the given clock controller. Please refer to the | |
| 39 | + clock bindings for more details. | |
| 40 | + | |
| 41 | +Input clocks for zynqmp Ultrascale+ clock controller: | |
| 42 | + | |
| 43 | +The Zynq UltraScale+ MPSoC has one primary and four alternative reference clock | |
| 44 | +inputs. These required clock inputs are: | |
| 45 | + - pss_ref_clk (PS reference clock) | |
| 46 | + - video_clk (reference clock for video system ) | |
| 47 | + - pss_alt_ref_clk (alternative PS reference clock) | |
| 48 | + - aux_ref_clk | |
| 49 | + - gt_crx_ref_clk (transceiver reference clock) | |
| 50 | + | |
| 51 | +The following strings are optional parameters to the 'clock-names' property in | |
| 52 | +order to provide an optional (E)MIO clock source: | |
| 53 | + - swdt0_ext_clk | |
| 54 | + - swdt1_ext_clk | |
| 55 | + - gem0_emio_clk | |
| 56 | + - gem1_emio_clk | |
| 57 | + - gem2_emio_clk | |
| 58 | + - gem3_emio_clk | |
| 59 | + - mio_clk_XX # with XX = 00..77 | |
| 60 | + - mio_clk_50_or_51 #for the mux clock to gem tsu from 50 or 51 | |
| 61 | + | |
| 62 | + | |
| 63 | +Output clocks are registered based on clock information received | |
| 64 | +from firmware. Output clocks indexes are mentioned in | |
| 65 | +include/dt-bindings/clock/xlnx,zynqmp-clk.h. | |
| 66 | + | |
| 67 | +------- | |
| 68 | +Example | |
| 69 | +------- | |
| 70 | + | |
| 71 | +firmware { | |
| 72 | + zynqmp_firmware: zynqmp-firmware { | |
| 73 | + compatible = "xlnx,zynqmp-firmware"; | |
| 74 | + method = "smc"; | |
| 75 | + zynqmp_clk: clock-controller { | |
| 76 | + #clock-cells = <1>; | |
| 77 | + compatible = "xlnx,zynqmp-clk"; | |
| 78 | + clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <>_crx_ref_clk>; | |
| 79 | + clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk"; | |
| 80 | + }; | |
| 81 | + }; | |
| 82 | +}; | |
| @@ -3,6 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | Required properties : |
| 4 | 4 | |
| 5 | 5 | - compatible : should be "snps,designware-i2c" |
| 6 | + or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback | |
| 6 | 7 | - reg : Offset and length of the register set for the device |
| 7 | 8 | - interrupts : <IRQ> where IRQ is the interrupt number. |
| 8 | 9 | |
| @@ -11,8 +12,12 @@ Recommended properties : · 2 unmodified lines | ||
| 11 | 12 | - clock-frequency : desired I2C bus clock frequency in Hz. |
| 12 | 13 | |
| 13 | 14 | Optional properties : |
| 15 | + - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold | |
| 16 | + time, named ICPU_CFG:TWI_DELAY in the datasheet. | |
| 17 | + | |
| 14 | 18 | - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds. |
| 15 | − This option is only supported in hardware blocks version 1.11a or newer. | |
| 19 | + This option is only supported in hardware blocks version 1.11a or newer and | |
| 20 | + on Microsemi SoCs ("mscc,ocelot-i2c" compatible). | |
| 16 | 21 | |
| 17 | 22 | - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds. |
| 18 | 23 | This value which is by default 300ns is used to compute the tLOW period. |
| @@ -3,7 +3,9 @@ I2C for R-Car platforms · 2 unmodified lines | ||
| 3 | 3 | Required properties: |
| 4 | 4 | - compatible: |
| 5 | 5 | "renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC. |
| 6 | + "renesas,i2c-r8a7744" if the device is a part of a R8A7744 SoC. | |
| 6 | 7 | "renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC. |
| 8 | + "renesas,i2c-r8a77470" if the device is a part of a R8A77470 SoC. | |
| 7 | 9 | "renesas,i2c-r8a774a1" if the device is a part of a R8A774A1 SoC. |
| 8 | 10 | "renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC. |
| 9 | 11 | "renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC. |
| @@ -5,6 +5,7 @@ Required properties: · 4 unmodified lines | ||
| 5 | 5 | - "renesas,iic-r8a73a4" (R-Mobile APE6) |
| 6 | 6 | - "renesas,iic-r8a7740" (R-Mobile A1) |
| 7 | 7 | - "renesas,iic-r8a7743" (RZ/G1M) |
| 8 | + - "renesas,iic-r8a7744" (RZ/G1N) | |
| 8 | 9 | - "renesas,iic-r8a7745" (RZ/G1E) |
| 9 | 10 | - "renesas,iic-r8a774a1" (RZ/G2M) |
| 10 | 11 | - "renesas,iic-r8a7790" (R-Car H2) |
| @@ -0,0 +1,33 @@ | ||
| 1 | +Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer | |
| 2 | + | |
| 3 | +http://www.analog.com/media/en/technical-documentation/data-sheets/adxl372.pdf | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | + - compatible : should be "adi,adxl372" | |
| 7 | + - reg: the I2C address or SPI chip select number for the device | |
| 8 | + | |
| 9 | +Required properties for SPI bus usage: | |
| 10 | + - spi-max-frequency: Max SPI frequency to use | |
| 11 | + | |
| 12 | +Optional properties: | |
| 13 | + - interrupts: interrupt mapping for IRQ as documented in | |
| 14 | + Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | |
| 15 | + | |
| 16 | +Example for a I2C device node: | |
| 17 | + | |
| 18 | + accelerometer@53 { | |
| 19 | + compatible = "adi,adxl372"; | |
| 20 | + reg = <0x53>; | |
| 21 | + interrupt-parent = <&gpio>; | |
| 22 | + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; | |
| 23 | + }; | |
| 24 | + | |
| 25 | +Example for a SPI device node: | |
| 26 | + | |
| 27 | + accelerometer@0 { | |
| 28 | + compatible = "adi,adxl372"; | |
| 29 | + reg = <0>; | |
| 30 | + spi-max-frequency = <1000000>; | |
| 31 | + interrupt-parent = <&gpio>; | |
| 32 | + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; | |
| 33 | + }; | |
| @@ -0,0 +1,30 @@ | ||
| 1 | +* Microchip MCP3911 Dual channel analog front end (ADC) | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | + - compatible: Should be "microchip,mcp3911" | |
| 5 | + - reg: SPI chip select number for the device | |
| 6 | + | |
| 7 | +Recommended properties: | |
| 8 | + - spi-max-frequency: Definition as per | |
| 9 | + Documentation/devicetree/bindings/spi/spi-bus.txt. | |
| 10 | + Max frequency for this chip is 20MHz. | |
| 11 | + | |
| 12 | +Optional properties: | |
| 13 | + - clocks: Phandle and clock identifier for sampling clock | |
| 14 | + - interrupt-parent: Phandle to the parent interrupt controller | |
| 15 | + - interrupts: IRQ line for the ADC | |
| 16 | + - microchip,device-addr: Device address when multiple MCP3911 chips are present on the | |
| 17 | + same SPI bus. Valid values are 0-3. Defaults to 0. | |
| 18 | + - vref-supply: Phandle to the external reference voltage supply. | |
| 19 | + | |
| 20 | +Example: | |
| 21 | +adc@0 { | |
| 22 | + compatible = "microchip,mcp3911"; | |
| 23 | + reg = <0>; | |
| 24 | + interrupt-parent = <&gpio5>; | |
| 25 | + interrupts = <15 IRQ_TYPE_EDGE_RISING>; | |
| 26 | + spi-max-frequency = <20000000>; | |
| 27 | + microchip,device-addr = <0>; | |
| 28 | + vref-supply = <&vref_reg>; | |
| 29 | + clocks = <&xtal>; | |
| 30 | +}; | |
| @@ -1,7 +1,9 @@ | ||
| 1 | −Qualcomm's SPMI PMIC voltage ADC | |
| 1 | +Qualcomm's SPMI PMIC ADC | |
| 2 | 2 | |
| 3 | −SPMI PMIC voltage ADC (VADC) provides interface to clients to read | |
| 4 | −voltage. The VADC is a 15-bit sigma-delta ADC. | |
| 3 | +- SPMI PMIC voltage ADC (VADC) provides interface to clients to read | |
| 4 | + voltage. The VADC is a 15-bit sigma-delta ADC. | |
| 5 | +- SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read | |
| 6 | + voltage. The VADC is a 16-bit sigma-delta ADC. | |
| 5 | 7 | |
| 6 | 8 | VADC node: |
| 7 | 9 | |
| @@ -9,11 +11,13 @@ VADC node: · 1 unmodified line | ||
| 9 | 11 | Usage: required |
| 10 | 12 | Value type: <string> |
| 11 | 13 | Definition: Should contain "qcom,spmi-vadc". |
| 14 | + Should contain "qcom,spmi-adc5" for PMIC5 ADC driver. | |
| 15 | + Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver. | |
| 12 | 16 | |
| 13 | 17 | - reg: |
| 14 | 18 | Usage: required |
| 15 | 19 | Value type: <prop-encoded-array> |
| 16 | − Definition: VADC base address and length in the SPMI PMIC register map. | |
| 20 | + Definition: VADC base address in the SPMI PMIC register map. | |
| 17 | 21 | |
| 18 | 22 | - #address-cells: |
| 19 | 23 | Usage: required |
| @@ -45,13 +49,26 @@ Channel node properties: · 25 unmodified lines | ||
| 45 | 49 | Definition: ADC channel number. |
| 46 | 50 | See include/dt-bindings/iio/qcom,spmi-vadc.h |
| 47 | 51 | |
| 52 | +- label: | |
| 53 | + Usage: required for "qcom,spmi-adc5" and "qcom,spmi-adc-rev2" | |
| 54 | + Value type: <empty> | |
| 55 | + Definition: ADC input of the platform as seen in the schematics. | |
| 56 | + For thermistor inputs connected to generic AMUX or GPIO inputs | |
| 57 | + these can vary across platform for the same pins. Hence select | |
| 58 | + the platform schematics name for this channel. | |
| 59 | + | |
| 48 | 60 | - qcom,decimation: |
| 49 | 61 | Usage: optional |
| 50 | 62 | Value type: <u32> |
| 51 | 63 | Definition: This parameter is used to decrease ADC sampling rate. |
| 52 | 64 | Quicker measurements can be made by reducing decimation ratio. |
| 53 | − Valid values are 512, 1024, 2048, 4096. | |
| 54 | − If property is not found, default value of 512 will be used. | |
| 65 | + - For compatible property "qcom,spmi-vadc", valid values are | |
| 66 | + 512, 1024, 2048, 4096. If property is not found, default value | |
| 67 | + of 512 will be used. | |
| 68 | + - For compatible property "qcom,spmi-adc5", valid values are 250, 420 | |
| 69 | + and 840. If property is not found, default value of 840 is used. | |
| 70 | + - For compatible property "qcom,spmi-adc-rev2", valid values are 256, | |
| 71 | + 512 and 1024. If property is not present, default value is 1024. | |
| 55 | 72 | |
| 56 | 73 | - qcom,pre-scaling: |
| 57 | 74 | Usage: optional |
| @@ -66,21 +83,38 @@ Channel node properties: · 8 unmodified lines | ||
| 66 | 83 | - qcom,ratiometric: |
| 67 | 84 | Usage: optional |
| 68 | 85 | Value type: <empty> |
| 69 | − Definition: Channel calibration type. If this property is specified | |
| 70 | − VADC will use the VDD reference (1.8V) and GND for channel | |
| 71 | − calibration. If property is not found, channel will be | |
| 72 | − calibrated with 0.625V and 1.25V reference channels, also | |
| 73 | − known as absolute calibration. | |
| 86 | + Definition: Channel calibration type. | |
| 87 | + - For compatible property "qcom,spmi-vadc", if this property is | |
| 88 | + specified VADC will use the VDD reference (1.8V) and GND for | |
| 89 | + channel calibration. If property is not found, channel will be | |
| 90 | + calibrated with 0.625V and 1.25V reference channels, also | |
| 91 | + known as absolute calibration. | |
| 92 | + - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2", | |
| 93 | + if this property is specified VADC will use the VDD reference | |
| 94 | + (1.875V) and GND for channel calibration. If property is not found, | |
| 95 | + channel will be calibrated with 0V and 1.25V reference channels, | |
| 96 | + also known as absolute calibration. | |
| 74 | 97 | |
| 75 | 98 | - qcom,hw-settle-time: |
| 76 | 99 | Usage: optional |
| 77 | 100 | Value type: <u32> |
| 78 | 101 | Definition: Time between AMUX getting configured and the ADC starting |
| 79 | − conversion. Delay = 100us * (value) for value < 11, and | |
| 80 | − 2ms * (value - 10) otherwise. | |
| 81 | − Valid values are: 0, 100, 200, 300, 400, 500, 600, 700, 800, | |
| 82 | − 900 us and 1, 2, 4, 6, 8, 10 ms | |
| 83 | − If property is not found, channel will use 0us. | |
| 102 | + conversion. The 'hw_settle_time' is an index used from valid values | |
| 103 | + and programmed in hardware to achieve the hardware settling delay. | |
| 104 | + - For compatible property "qcom,spmi-vadc" and "qcom,spmi-adc-rev2", | |
| 105 | + Delay = 100us * (hw_settle_time) for hw_settle_time < 11, | |
| 106 | + and 2ms * (hw_settle_time - 10) otherwise. | |
| 107 | + Valid values are: 0, 100, 200, 300, 400, 500, 600, 700, 800, | |
| 108 | + 900 us and 1, 2, 4, 6, 8, 10 ms. | |
| 109 | + If property is not found, channel will use 0us. | |
| 110 | + - For compatible property "qcom,spmi-adc5", delay = 15us for | |
| 111 | + value 0, 100us * (value) for values < 11, | |
| 112 | + and 2ms * (value - 10) otherwise. | |
| 113 | + Valid values are: 15, 100, 200, 300, 400, 500, 600, 700, 800, | |
| 114 | + 900 us and 1, 2, 4, 6, 8, 10 ms | |
| 115 | + Certain controller digital versions have valid values of | |
| 116 | + 15, 100, 200, 300, 400, 500, 600, 700, 1, 2, 4, 8, 16, 32, 64, 128 ms | |
| 117 | + If property is not found, channel will use 15us. | |
| 84 | 118 | |
| 85 | 119 | - qcom,avg-samples: |
| 86 | 120 | Usage: optional |
| @@ -89,13 +123,18 @@ Channel node properties: · 2 unmodified lines | ||
| 89 | 123 | Averaging provides the option to obtain a single measurement |
| 90 | 124 | from the ADC that is an average of multiple samples. The value |
| 91 | 125 | selected is 2^(value). |
| 92 | − Valid values are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 | |
| 93 | − If property is not found, 1 sample will be used. | |
| 126 | + - For compatible property "qcom,spmi-vadc", valid values | |
| 127 | + are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 | |
| 128 | + If property is not found, 1 sample will be used. | |
| 129 | + - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2", | |
| 130 | + valid values are: 1, 2, 4, 8, 16 | |
| 131 | + If property is not found, 1 sample will be used. | |
| 94 | 132 | |
| 95 | 133 | NOTE: |
| 96 | 134 | |
| 97 | −Following channels, also known as reference point channels, are used for | |
| 98 | −result calibration and their channel configuration nodes should be defined: | |
| 135 | +For compatible property "qcom,spmi-vadc" following channels, also known as | |
| 136 | +reference point channels, are used for result calibration and their channel | |
| 137 | +configuration nodes should be defined: | |
| 99 | 138 | VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV, |
| 100 | 139 | VADC_GND_REF and VADC_VDD_VADC. |
| 101 | 140 | |
| @@ -104,7 +143,7 @@ Example: · 2 unmodified lines | ||
| 104 | 143 | /* VADC node */ |
| 105 | 144 | pmic_vadc: vadc@3100 { |
| 106 | 145 | compatible = "qcom,spmi-vadc"; |
| 107 | − reg = <0x3100 0x100>; | |
| 146 | + reg = <0x3100>; | |
| 108 | 147 | interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; |
| 109 | 148 | #address-cells = <1>; |
| 110 | 149 | #size-cells = <0>; |
| @@ -12,6 +12,8 @@ Required properties: · 11 unmodified lines | ||
| 12 | 12 | - interrupts: The interrupt number for the ADC device. |
| 13 | 13 | - #io-channel-cells: Number of cells in an IIO specifier. |
| 14 | 14 | - hwlocks: Reference to a phandle of a hwlock provider node. |
| 15 | +- nvmem-cells: A phandle to the calibration cells provided by eFuse device. | |
| 16 | +- nvmem-cell-names: Should be "big_scale_calib", "small_scale_calib". | |
| 15 | 17 | |
| 16 | 18 | Example: |
| 17 | 19 | |
| @@ -32,5 +34,7 @@ Example: · 14 unmodified lines | ||
| 32 | 34 | interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; |
| 33 | 35 | #io-channel-cells = <1>; |
| 34 | 36 | hwlocks = <&hwlock 4>; |
| 37 | + nvmem-cells = <&adc_big_scale>, <&adc_small_scale>; | |
| 38 | + nvmem-cell-names = "big_scale_calib", "small_scale_calib"; | |
| 35 | 39 | }; |
| 36 | 40 | }; |
| @@ -50,6 +50,9 @@ Required properties: · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | Optional properties: |
| 52 | 52 | |
| 53 | + - reset-gpios : GPIO spec for the RESET pin. If specified, it will be | |
| 54 | + asserted during driver probe. | |
| 55 | + | |
| 53 | 56 | - adi,dc-dc-ilim-microamp: The dc-to-dc converter current limit |
| 54 | 57 | The following values are currently supported [uA]: |
| 55 | 58 | * 150000 |
| @@ -71,6 +74,8 @@ AD5758 Example: · 15 unmodified lines | ||
| 71 | 74 | spi-max-frequency = <1000000>; |
| 72 | 75 | spi-cpha; |
| 73 | 76 | |
| 77 | + reset-gpios = <&gpio 22 0>; | |
| 78 | + | |
| 74 | 79 | adi,dc-dc-mode = <2>; |
| 75 | 80 | adi,range-microvolt = <0 10000000>; |
| 76 | 81 | adi,dc-dc-ilim-microamp = <200000>; |
| @@ -0,0 +1,21 @@ | ||
| 1 | +* Linear Technology Micropower octal 8-Bit and 10-Bit DACs | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | + - compatible: Must be one of the following: | |
| 5 | + "lltc,ltc1660" | |
| 6 | + "lltc,ltc1665" | |
| 7 | + - reg: SPI chip select number for the device | |
| 8 | + - vref-supply: Phandle to the voltage reference supply | |
| 9 | + | |
| 10 | +Recommended properties: | |
| 11 | + - spi-max-frequency: Definition as per | |
| 12 | + Documentation/devicetree/bindings/spi/spi-bus.txt. | |
| 13 | + Max frequency for this chip is 5 MHz. | |
| 14 | + | |
| 15 | +Example: | |
| 16 | +dac@0 { | |
| 17 | + compatible = "lltc,ltc1660"; | |
| 18 | + reg = <0>; | |
| 19 | + spi-max-frequency = <5000000>; | |
| 20 | + vref-supply = <&vref_reg>; | |
| 21 | +}; | |
| @@ -20,6 +20,7 @@ Required properties: · 19 unmodified lines | ||
| 20 | 20 | bindings. |
| 21 | 21 | |
| 22 | 22 | Optional properties: |
| 23 | + - vddio-supply: regulator phandle for VDDIO supply | |
| 23 | 24 | - mount-matrix: an optional 3x3 mounting rotation matrix |
| 24 | 25 | - i2c-gate node. These devices also support an auxiliary i2c bus. This is |
| 25 | 26 | simple enough to be described using the i2c-gate binding. See |
| @@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines | ||
| 7 | 7 | "st,lsm6dsl" |
| 8 | 8 | "st,lsm6dsm" |
| 9 | 9 | "st,ism330dlc" |
| 10 | + "st,lsm6dso" | |
| 10 | 11 | - reg: i2c address of the sensor / spi cs line |
| 11 | 12 | |
| 12 | 13 | Optional properties: |
| @@ -0,0 +1,18 @@ | ||
| 1 | +ROHM BH1750 - ALS, Ambient light sensor | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | + | |
| 5 | +- compatible: Must be one of: | |
| 6 | + "rohm,bh1710" | |
| 7 | + "rohm,bh1715" | |
| 8 | + "rohm,bh1721" | |
| 9 | + "rohm,bh1750" | |
| 10 | + "rohm,bh1751" | |
| 11 | +- reg: the I2C address of the sensor | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +light-sensor@23 { | |
| 16 | + compatible = "rohm,bh1750"; | |
| 17 | + reg = <0x23>; | |
| 18 | +}; | |
| @@ -0,0 +1,42 @@ | ||
| 1 | +* AMS/TAOS ALS and proximity sensor | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | + | |
| 5 | + - compatible: Should be one of | |
| 6 | + "amstaos,tsl2571" | |
| 7 | + "amstaos,tsl2671" | |
| 8 | + "amstaos,tmd2671" | |
| 9 | + "amstaos,tsl2771" | |
| 10 | + "amstaos,tmd2771" | |
| 11 | + "amstaos,tsl2572" | |
| 12 | + "amstaos,tsl2672" | |
| 13 | + "amstaos,tmd2672" | |
| 14 | + "amstaos,tsl2772" | |
| 15 | + "amstaos,tmd2772" | |
| 16 | + "avago,apds9930" | |
| 17 | + - reg: the I2C address of the device | |
| 18 | + | |
| 19 | +Optional properties: | |
| 20 | + | |
| 21 | + - amstaos,proximity-diodes - proximity diodes to enable. <0>, <1>, or <0 1> | |
| 22 | + are the only valid values. | |
| 23 | + - led-max-microamp - current for the proximity LED. Must be 100000, 50000, | |
| 24 | + 25000, or 13000. | |
| 25 | + - vdd-supply: phandle to the regulator that provides power to the sensor. | |
| 26 | + - vddio-supply: phandle to the regulator that provides power to the bus. | |
| 27 | + - interrupts: the sole interrupt generated by the device | |
| 28 | + | |
| 29 | + Refer to interrupt-controller/interrupts.txt for generic interrupt client | |
| 30 | + node bindings. | |
| 31 | + | |
| 32 | +Example: | |
| 33 | + | |
| 34 | +tsl2772@39 { | |
| 35 | + compatible = "amstaos,tsl2772"; | |
| 36 | + reg = <0x39>; | |
| 37 | + interrupts-extended = <&msmgpio 61 IRQ_TYPE_EDGE_FALLING>; | |
| 38 | + vdd-supply = <&pm8941_l17>; | |
| 39 | + vddio-supply = <&pm8941_lvs1>; | |
| 40 | + amstaos,proximity-diodes = <0>; | |
| 41 | + led-max-microamp = <100000>; | |
| 42 | +}; | |
| @@ -0,0 +1,12 @@ | ||
| 1 | +ST VL53L0X ToF ranging sensor | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | + - compatible: must be "st,vl53l0x" | |
| 5 | + - reg: i2c address where to find the device | |
| 6 | + | |
| 7 | +Example: | |
| 8 | + | |
| 9 | +vl53l0x@29 { | |
| 10 | + compatible = "st,vl53l0x"; | |
| 11 | + reg = <0x29>; | |
| 12 | +}; | |
| @@ -58,8 +58,8 @@ Example from Motorola Droid 4: · 57 unmodified lines | ||
| 58 | 58 | |
| 59 | 59 | vibrator { |
| 60 | 60 | compatible = "pwm-vibrator"; |
| 61 | − pwms = <&pwm8 0 1000000000 0>, | |
| 62 | − <&pwm9 0 1000000000 0>; | |
| 61 | + pwms = <&pwm9 0 1000000000 0>, | |
| 62 | + <&pwm8 0 1000000000 0>; | |
| 63 | 63 | pwm-names = "enable", "direction"; |
| 64 | 64 | direction-duty-cycle-ns = <1000000000>; |
| 65 | 65 | }; |
| @@ -1,10 +1,12 @@ | ||
| 1 | 1 | General Touchscreen Properties: |
| 2 | 2 | |
| 3 | 3 | Optional properties for Touchscreens: |
| 4 | + - touchscreen-min-x : minimum x coordinate reported (0 if not set) | |
| 5 | + - touchscreen-min-y : minimum y coordinate reported (0 if not set) | |
| 4 | 6 | - touchscreen-size-x : horizontal resolution of touchscreen |
| 5 | − (in pixels) | |
| 7 | + (maximum x coordinate reported + 1) | |
| 6 | 8 | - touchscreen-size-y : vertical resolution of touchscreen |
| 7 | − (in pixels) | |
| 9 | + (maximum y coordinate reported + 1) | |
| 8 | 10 | - touchscreen-max-pressure : maximum reported pressure (arbitrary range |
| 9 | 11 | dependent on the controller) |
| 10 | 12 | - touchscreen-min-pressure : minimum pressure on the touchscreen to be |
| @@ -0,0 +1,62 @@ | ||
| 1 | +============================== | |
| 2 | +C-SKY APB Interrupt Controller | |
| 3 | +============================== | |
| 4 | + | |
| 5 | +C-SKY APB Interrupt Controller is a simple soc interrupt controller | |
| 6 | +on the apb bus and we only use it as root irq controller. | |
| 7 | + | |
| 8 | + - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums. | |
| 9 | + - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported. | |
| 10 | + - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums. | |
| 11 | + | |
| 12 | +============================= | |
| 13 | +intc node bindings definition | |
| 14 | +============================= | |
| 15 | + | |
| 16 | + Description: Describes APB interrupt controller | |
| 17 | + | |
| 18 | + PROPERTIES | |
| 19 | + | |
| 20 | + - compatible | |
| 21 | + Usage: required | |
| 22 | + Value type: <string> | |
| 23 | + Definition: must be "csky,apb-intc" | |
| 24 | + "csky,dual-apb-intc" | |
| 25 | + "csky,gx6605s-intc" | |
| 26 | + - #interrupt-cells | |
| 27 | + Usage: required | |
| 28 | + Value type: <u32> | |
| 29 | + Definition: must be <1> | |
| 30 | + - reg | |
| 31 | + Usage: required | |
| 32 | + Value type: <u32 u32> | |
| 33 | + Definition: <phyaddr size> in soc from cpu view | |
| 34 | + - interrupt-controller: | |
| 35 | + Usage: required | |
| 36 | + - csky,support-pulse-signal: | |
| 37 | + Usage: select | |
| 38 | + Description: to support pulse signal flag | |
| 39 | + | |
| 40 | +Examples: | |
| 41 | +--------- | |
| 42 | + | |
| 43 | + intc: interrupt-controller@500000 { | |
| 44 | + compatible = "csky,apb-intc"; | |
| 45 | + #interrupt-cells = <1>; | |
| 46 | + reg = <0x00500000 0x400>; | |
| 47 | + interrupt-controller; | |
| 48 | + }; | |
| 49 | + | |
| 50 | + intc: interrupt-controller@500000 { | |
| 51 | + compatible = "csky,dual-apb-intc"; | |
| 52 | + #interrupt-cells = <1>; | |
| 53 | + reg = <0x00500000 0x400>; | |
| 54 | + interrupt-controller; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + intc: interrupt-controller@500000 { | |
| 58 | + compatible = "csky,gx6605s-intc"; | |
| 59 | + #interrupt-cells = <1>; | |
| 60 | + reg = <0x00500000 0x400>; | |
| 61 | + interrupt-controller; | |
| 62 | + }; | |
| @@ -0,0 +1,40 @@ | ||
| 1 | +=========================================== | |
| 2 | +C-SKY Multi-processors Interrupt Controller | |
| 3 | +=========================================== | |
| 4 | + | |
| 5 | +C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860 | |
| 6 | +SMP soc, and it also could be used in non-SMP system. | |
| 7 | + | |
| 8 | +Interrupt number definition: | |
| 9 | + | |
| 10 | + 0-15 : software irq, and we use 15 as our IPI_IRQ. | |
| 11 | + 16-31 : private irq, and we use 16 as the co-processor timer. | |
| 12 | + 31-1024: common irq for soc ip. | |
| 13 | + | |
| 14 | +============================= | |
| 15 | +intc node bindings definition | |
| 16 | +============================= | |
| 17 | + | |
| 18 | + Description: Describes SMP interrupt controller | |
| 19 | + | |
| 20 | + PROPERTIES | |
| 21 | + | |
| 22 | + - compatible | |
| 23 | + Usage: required | |
| 24 | + Value type: <string> | |
| 25 | + Definition: must be "csky,mpintc" | |
| 26 | + - #interrupt-cells | |
| 27 | + Usage: required | |
| 28 | + Value type: <u32> | |
| 29 | + Definition: must be <1> | |
| 30 | + - interrupt-controller: | |
| 31 | + Usage: required | |
| 32 | + | |
| 33 | +Examples: | |
| 34 | +--------- | |
| 35 | + | |
| 36 | + intc: interrupt-controller { | |
| 37 | + compatible = "csky,mpintc"; | |
| 38 | + #interrupt-cells = <1>; | |
| 39 | + interrupt-controller; | |
| 40 | + }; | |
| @@ -41,6 +41,8 @@ Required properties: · 40 unmodified lines | ||
| 41 | 41 | - compatible : must be one of the following string: |
| 42 | 42 | "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW. |
| 43 | 43 | "mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW. |
| 44 | + "mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses | |
| 45 | + generation one m4u HW. | |
| 44 | 46 | "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW. |
| 45 | 47 | - reg : m4u register base and size. |
| 46 | 48 | - interrupts : the interrupt of m4u. |
| @@ -51,7 +53,7 @@ Required properties: · 4 unmodified lines | ||
| 51 | 53 | according to the local arbiter index, like larb0, larb1, larb2... |
| 52 | 54 | - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW. |
| 53 | 55 | Specifies the mtk_m4u_id as defined in |
| 54 | − dt-binding/memory/mt2701-larb-port.h for mt2701, | |
| 56 | + dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623 | |
| 55 | 57 | dt-binding/memory/mt2712-larb-port.h for mt2712, and |
| 56 | 58 | dt-binding/memory/mt8173-larb-port.h for mt8173. |
| 57 | 59 | |
| @@ -11,6 +11,7 @@ platforms. · 10 unmodified lines | ||
| 11 | 11 | "qcom,msm8916-apcs-kpss-global", |
| 12 | 12 | "qcom,msm8996-apcs-hmss-global" |
| 13 | 13 | "qcom,msm8998-apcs-hmss-global" |
| 14 | + "qcom,qcs404-apcs-apps-global" | |
| 14 | 15 | "qcom,sdm845-apss-shared" |
| 15 | 16 | |
| 16 | 17 | - reg: |
| @@ -0,0 +1,54 @@ | ||
| 1 | +Device-tree bindings for the VPU found in Allwinner SoCs, referred to as the | |
| 2 | +Video Engine (VE) in Allwinner literature. | |
| 3 | + | |
| 4 | +The VPU can only access the first 256 MiB of DRAM, that are DMA-mapped starting | |
| 5 | +from the DRAM base. This requires specific memory allocation and handling. | |
| 6 | + | |
| 7 | +Required properties: | |
| 8 | +- compatible : must be one of the following compatibles: | |
| 9 | + - "allwinner,sun4i-a10-video-engine" | |
| 10 | + - "allwinner,sun5i-a13-video-engine" | |
| 11 | + - "allwinner,sun7i-a20-video-engine" | |
| 12 | + - "allwinner,sun8i-a33-video-engine" | |
| 13 | + - "allwinner,sun8i-h3-video-engine" | |
| 14 | +- reg : register base and length of VE; | |
| 15 | +- clocks : list of clock specifiers, corresponding to entries in | |
| 16 | + the clock-names property; | |
| 17 | +- clock-names : should contain "ahb", "mod" and "ram" entries; | |
| 18 | +- resets : phandle for reset; | |
| 19 | +- interrupts : VE interrupt number; | |
| 20 | +- allwinner,sram : SRAM region to use with the VE. | |
| 21 | + | |
| 22 | +Optional properties: | |
| 23 | +- memory-region : CMA pool to use for buffers allocation instead of the | |
| 24 | + default CMA pool. | |
| 25 | + | |
| 26 | +Example: | |
| 27 | + | |
| 28 | +reserved-memory { | |
| 29 | + #address-cells = <1>; | |
| 30 | + #size-cells = <1>; | |
| 31 | + ranges; | |
| 32 | + | |
| 33 | + /* Address must be kept in the lower 256 MiBs of DRAM for VE. */ | |
| 34 | + cma_pool: cma@4a000000 { | |
| 35 | + compatible = "shared-dma-pool"; | |
| 36 | + size = <0x6000000>; | |
| 37 | + alloc-ranges = <0x4a000000 0x6000000>; | |
| 38 | + reusable; | |
| 39 | + linux,cma-default; | |
| 40 | + }; | |
| 41 | +}; | |
| 42 | + | |
| 43 | +video-codec@1c0e000 { | |
| 44 | + compatible = "allwinner,sun7i-a20-video-engine"; | |
| 45 | + reg = <0x01c0e000 0x1000>; | |
| 46 | + | |
| 47 | + clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, | |
| 48 | + <&ccu CLK_DRAM_VE>; | |
| 49 | + clock-names = "ahb", "mod", "ram"; | |
| 50 | + | |
| 51 | + resets = <&ccu RST_VE>; | |
| 52 | + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; | |
| 53 | + allwinner,sram = <&ve_sram 1>; | |
| 54 | +}; | |
| @@ -0,0 +1,26 @@ | ||
| 1 | +Freescale Pixel Pipeline | |
| 2 | +======================== | |
| 3 | + | |
| 4 | +The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine | |
| 5 | +that supports scaling, colorspace conversion, alpha blending, rotation, and | |
| 6 | +pixel conversion via lookup table. Different versions are present on various | |
| 7 | +i.MX SoCs from i.MX23 to i.MX7. | |
| 8 | + | |
| 9 | +Required properties: | |
| 10 | +- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28, | |
| 11 | + imx6dl, imx6sl, imx6ul, imx6sx, imx6ull, or imx7d. | |
| 12 | +- reg: the register base and size for the device registers | |
| 13 | +- interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d. | |
| 14 | +- clock-names: should be "axi" | |
| 15 | +- clocks: the PXP AXI clock | |
| 16 | + | |
| 17 | +Example: | |
| 18 | + | |
| 19 | +pxp@21cc000 { | |
| 20 | + compatible = "fsl,imx6ull-pxp"; | |
| 21 | + reg = <0x021cc000 0x4000>; | |
| 22 | + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, | |
| 23 | + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; | |
| 24 | + clock-names = "axi"; | |
| 25 | + clocks = <&clks IMX6UL_CLK_PXP>; | |
| 26 | +}; | |
| @@ -10,7 +10,11 @@ Required Properties: · 9 unmodified lines | ||
| 10 | 10 | - "adi,adv7481" for the ADV7481 |
| 11 | 11 | - "adi,adv7482" for the ADV7482 |
| 12 | 12 | |
| 13 | − - reg: I2C slave address | |
| 13 | + - reg: I2C slave addresses | |
| 14 | + The ADV748x has up to twelve 256-byte maps that can be accessed via the | |
| 15 | + main I2C ports. Each map has it own I2C address and acts as a standard | |
| 16 | + slave device on the I2C bus. The main address is mandatory, others are | |
| 17 | + optional and remain at default values if not specified. | |
| 14 | 18 | |
| 15 | 19 | Optional Properties: |
| 16 | 20 | |
| @@ -18,6 +22,11 @@ Optional Properties: · 1 unmodified line | ||
| 18 | 22 | "intrq3". All interrupts are optional. The "intrq3" interrupt |
| 19 | 23 | is only available on the adv7481 |
| 20 | 24 | - interrupts: Specify the interrupt lines for the ADV748x |
| 25 | + - reg-names : Names of maps with programmable addresses. | |
| 26 | + It shall contain all maps needing a non-default address. | |
| 27 | + Possible map names are: | |
| 28 | + "main", "dpll", "cp", "hdmi", "edid", "repeater", | |
| 29 | + "infoframe", "cbus", "cec", "sdp", "txa", "txb" | |
| 21 | 30 | |
| 22 | 31 | The device node must contain one 'port' child node per device input and output |
| 23 | 32 | port, in accordance with the video interface bindings defined in |
| @@ -47,7 +56,10 @@ Example: · 23 unmodified lines | ||
| 47 | 56 | |
| 48 | 57 | video-receiver@70 { |
| 49 | 58 | compatible = "adi,adv7482"; |
| 50 | − reg = <0x70>; | |
| 59 | + reg = <0x70 0x71 0x72 0x73 0x74 0x75 | |
| 60 | + 0x60 0x61 0x62 0x63 0x64 0x65>; | |
| 61 | + reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", | |
| 62 | + "infoframe", "cbus", "cec", "sdp", "txa", "txb"; | |
| 51 | 63 | |
| 52 | 64 | #address-cells = <1>; |
| 53 | 65 | #size-cells = <0>; |
| @@ -73,7 +85,7 @@ Example: · 19 unmodified lines | ||
| 73 | 85 | }; |
| 74 | 86 | }; |
| 75 | 87 | |
| 76 | − port@10 { | |
| 88 | + port@a { | |
| 77 | 89 | reg = <10>; |
| 78 | 90 | |
| 79 | 91 | adv7482_txa: endpoint { |
| @@ -83,7 +95,7 @@ Example: · 3 unmodified lines | ||
| 83 | 95 | }; |
| 84 | 96 | }; |
| 85 | 97 | |
| 86 | − port@11 { | |
| 98 | + port@b { | |
| 87 | 99 | reg = <11>; |
| 88 | 100 | |
| 89 | 101 | adv7482_txb: endpoint { |
| @@ -66,7 +66,7 @@ Example: · 65 unmodified lines | ||
| 66 | 66 | * other maps will retain their default addresses. |
| 67 | 67 | */ |
| 68 | 68 | reg = <0x4c>, <0x66>; |
| 69 | − reg-names "main", "edid"; | |
| 69 | + reg-names = "main", "edid"; | |
| 70 | 70 | |
| 71 | 71 | reset-gpios = <&ioexp 0 GPIO_ACTIVE_LOW>; |
| 72 | 72 | hpd-gpios = <&ioexp 2 GPIO_ACTIVE_HIGH>; |
File renamed without changes.
| @@ -5,6 +5,7 @@ Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs · 4 unmodified lines | ||
| 5 | 5 | Required properties: |
| 6 | 6 | - compatible : must be one of the following string: |
| 7 | 7 | "mediatek,mt8173-jpgdec" |
| 8 | + "mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec" | |
| 8 | 9 | "mediatek,mt2701-jpgdec" |
| 9 | 10 | - reg : physical base address of the jpeg decoder registers and length of |
| 10 | 11 | memory mapped region. |
| @@ -11,6 +11,7 @@ on Gen3 platforms to a CSI-2 receiver. · 10 unmodified lines | ||
| 11 | 11 | |
| 12 | 12 | - compatible: Must be one or more of the following |
| 13 | 13 | - "renesas,vin-r8a7743" for the R8A7743 device |
| 14 | + - "renesas,vin-r8a7744" for the R8A7744 device | |
| 14 | 15 | - "renesas,vin-r8a7745" for the R8A7745 device |
| 15 | 16 | - "renesas,vin-r8a7778" for the R8A7778 device |
| 16 | 17 | - "renesas,vin-r8a7779" for the R8A7779 device |
| @@ -17,15 +17,19 @@ Required properties: · 16 unmodified lines | ||
| 17 | 17 | The CEU supports a single parallel input and should contain a single 'port' |
| 18 | 18 | subnode with a single 'endpoint'. Connection to input devices are modeled |
| 19 | 19 | according to the video interfaces OF bindings specified in: |
| 20 | −Documentation/devicetree/bindings/media/video-interfaces.txt | |
| 20 | +[1] Documentation/devicetree/bindings/media/video-interfaces.txt | |
| 21 | 21 | |
| 22 | 22 | Optional endpoint properties applicable to parallel input bus described in |
| 23 | 23 | the above mentioned "video-interfaces.txt" file are supported. |
| 24 | 24 | |
| 25 | −- hsync-active: Active state of the HSYNC signal, 0/1 for LOW/HIGH respectively. | |
| 26 | − If property is not present, default is active high. | |
| 27 | −- vsync-active: Active state of the VSYNC signal, 0/1 for LOW/HIGH respectively. | |
| 28 | − If property is not present, default is active high. | |
| 25 | +- hsync-active: See [1] for description. If property is not present, | |
| 26 | + default is active high. | |
| 27 | +- vsync-active: See [1] for description. If property is not present, | |
| 28 | + default is active high. | |
| 29 | +- bus-width: See [1] for description. Accepted values are '8' and '16'. | |
| 30 | + If property is not present, default is '8'. | |
| 31 | +- field-even-active: See [1] for description. If property is not present, | |
| 32 | + an even field is identified by a logic 0 (active-low signal). | |
| 29 | 33 | |
| 30 | 34 | Example: |
| 31 | 35 | |
| @@ -0,0 +1,29 @@ | ||
| 1 | +device-tree bindings for rockchip VPU codec | |
| 2 | + | |
| 3 | +Rockchip (Video Processing Unit) present in various Rockchip platforms, | |
| 4 | +such as RK3288 and RK3399. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | +- compatible: value should be one of the following | |
| 8 | + "rockchip,rk3288-vpu"; | |
| 9 | + "rockchip,rk3399-vpu"; | |
| 10 | +- interrupts: encoding and decoding interrupt specifiers | |
| 11 | +- interrupt-names: should be "vepu" and "vdpu" | |
| 12 | +- clocks: phandle to VPU aclk, hclk clocks | |
| 13 | +- clock-names: should be "aclk" and "hclk" | |
| 14 | +- power-domains: phandle to power domain node | |
| 15 | +- iommus: phandle to a iommu node | |
| 16 | + | |
| 17 | +Example: | |
| 18 | +SoC-specific DT entry: | |
| 19 | + vpu: video-codec@ff9a0000 { | |
| 20 | + compatible = "rockchip,rk3288-vpu"; | |
| 21 | + reg = <0x0 0xff9a0000 0x0 0x800>; | |
| 22 | + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, | |
| 23 | + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
| 24 | + interrupt-names = "vepu", "vdpu"; | |
| 25 | + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; | |
| 26 | + clock-names = "aclk", "hclk"; | |
| 27 | + power-domains = <&power RK3288_PD_VIDEO>; | |
| 28 | + iommus = <&vpu_mmu>; | |
| 29 | + }; | |
| @@ -100,10 +100,12 @@ Optional endpoint properties · 99 unmodified lines | ||
| 100 | 100 | slave device (data source) by the master device (data sink). In the master |
| 101 | 101 | mode the data source device is also the source of the synchronization signals. |
| 102 | 102 | - bus-type: data bus type. Possible values are: |
| 103 | − 0 - autodetect based on other properties (MIPI CSI-2 D-PHY, parallel or Bt656) | |
| 104 | 103 | 1 - MIPI CSI-2 C-PHY |
| 105 | 104 | 2 - MIPI CSI1 |
| 106 | 105 | 3 - CCP2 |
| 106 | + 4 - MIPI CSI-2 D-PHY | |
| 107 | + 5 - Parallel | |
| 108 | + 6 - Bt.656 | |
| 107 | 109 | - bus-width: number of data lines actively used, valid for the parallel busses. |
| 108 | 110 | - data-shift: on the parallel data busses, if bus-width is used to specify the |
| 109 | 111 | number of data lines, data-shift can be used to specify which data lines are |
| @@ -17,6 +17,7 @@ Required properties: · 16 unmodified lines | ||
| 17 | 17 | - compatible : must be one of : |
| 18 | 18 | "mediatek,mt2701-smi-common" |
| 19 | 19 | "mediatek,mt2712-smi-common" |
| 20 | + "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common" | |
| 20 | 21 | "mediatek,mt8173-smi-common" |
| 21 | 22 | - reg : the register and size of the SMI block. |
| 22 | 23 | - power-domains : a phandle to the power domain of this local arbiter. |
| @@ -6,6 +6,7 @@ Required properties: · 5 unmodified lines | ||
| 6 | 6 | - compatible : must be one of : |
| 7 | 7 | "mediatek,mt2701-smi-larb" |
| 8 | 8 | "mediatek,mt2712-smi-larb" |
| 9 | + "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb" | |
| 9 | 10 | "mediatek,mt8173-smi-larb" |
| 10 | 11 | - reg : the register and size of this local arbiter. |
| 11 | 12 | - mediatek,smi : a phandle to the smi_common node. |
| @@ -16,7 +17,7 @@ Required properties: · 4 unmodified lines | ||
| 16 | 17 | the register. |
| 17 | 18 | - "smi" : It's the clock for transfer data and command. |
| 18 | 19 | |
| 19 | −Required property for mt2701 and mt2712: | |
| 20 | +Required property for mt2701, mt2712 and mt7623: | |
| 20 | 21 | - mediatek,larb-id :the hardware id of this larb. |
| 21 | 22 | |
| 22 | 23 | Example: |
| @@ -46,6 +46,42 @@ Required properties: · 45 unmodified lines | ||
| 46 | 46 | "brcm,bcm6328-switch" |
| 47 | 47 | "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch" |
| 48 | 48 | |
| 49 | +Required properties for BCM585xx/586xx/88312 SoCs: | |
| 50 | + | |
| 51 | + - reg: a total of 3 register base addresses, the first one must be the | |
| 52 | + Switch Register Access block base, the second is the port 5/4 mux | |
| 53 | + configuration register and the third one is the SGMII configuration | |
| 54 | + and status register base address. | |
| 55 | + | |
| 56 | + - interrupts: a total of 13 interrupts must be specified, in the following | |
| 57 | + order: port 0-5, 7-8 link status change, then the integrated PHY interrupt, | |
| 58 | + then the timestamping interrupt and the sleep timer interrupts for ports | |
| 59 | + 5,7,8. | |
| 60 | + | |
| 61 | +Optional properties for BCM585xx/586xx/88312 SoCs: | |
| 62 | + | |
| 63 | + - reg-names: a total of 3 names matching the 3 base register address, must | |
| 64 | + be in the following order: | |
| 65 | + "srab" | |
| 66 | + "mux_config" | |
| 67 | + "sgmii_config" | |
| 68 | + | |
| 69 | + - interrupt-names: a total of 13 names matching the 13 interrupts specified | |
| 70 | + must be in the following order: | |
| 71 | + "link_state_p0" | |
| 72 | + "link_state_p1" | |
| 73 | + "link_state_p2" | |
| 74 | + "link_state_p3" | |
| 75 | + "link_state_p4" | |
| 76 | + "link_state_p5" | |
| 77 | + "link_state_p7" | |
| 78 | + "link_state_p8" | |
| 79 | + "phy" | |
| 80 | + "ts" | |
| 81 | + "imp_sleep_timer_p5" | |
| 82 | + "imp_sleep_timer_p7" | |
| 83 | + "imp_sleep_timer_p8" | |
| 84 | + | |
| 49 | 85 | See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional |
| 50 | 86 | required and optional properties. |
| 51 | 87 | |
| @@ -2,7 +2,7 @@ Marvell Prestera Switch Chip bindings · 1 unmodified line | ||
| 2 | 2 | ------------------------------------- |
| 3 | 3 | |
| 4 | 4 | Required properties: |
| 5 | −- compatible: one of the following | |
| 5 | +- compatible: must be "marvell,prestera" and one of the following | |
| 6 | 6 | "marvell,prestera-98dx3236", |
| 7 | 7 | "marvell,prestera-98dx3336", |
| 8 | 8 | "marvell,prestera-98dx4251", |
| @@ -21,7 +21,7 @@ switch { · 12 unmodified lines | ||
| 21 | 21 | ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>; |
| 22 | 22 | |
| 23 | 23 | packet-processor@0 { |
| 24 | − compatible = "marvell,prestera-98dx3236"; | |
| 24 | + compatible = "marvell,prestera-98dx3236", "marvell,prestera"; | |
| 25 | 25 | reg = <0 0x4000000>; |
| 26 | 26 | interrupts = <33>, <34>, <35>; |
| 27 | 27 | dfx = <&dfx>; |
| @@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines | ||
| 7 | 7 | "allwinner,sun8i-a83t-sid" |
| 8 | 8 | "allwinner,sun8i-h3-sid" |
| 9 | 9 | "allwinner,sun50i-a64-sid" |
| 10 | + "allwinner,sun50i-h5-sid" | |
| 10 | 11 | |
| 11 | 12 | - reg: Should contain registers location and length |
| 12 | 13 | |
| @@ -3,11 +3,13 @@ Actions Semi Owl Smart Power System (SPS) · 2 unmodified lines | ||
| 3 | 3 | Required properties: |
| 4 | 4 | - compatible : "actions,s500-sps" for S500 |
| 5 | 5 | "actions,s700-sps" for S700 |
| 6 | + "actions,s900-sps" for S900 | |
| 6 | 7 | - reg : Offset and length of the register set for the device. |
| 7 | 8 | - #power-domain-cells : Must be 1. |
| 8 | 9 | See macros in: |
| 9 | 10 | include/dt-bindings/power/owl-s500-powergate.h for S500 |
| 10 | 11 | include/dt-bindings/power/owl-s700-powergate.h for S700 |
| 12 | + include/dt-bindings/power/owl-s900-powergate.h for S900 | |
| 11 | 13 | |
| 12 | 14 | |
| 13 | 15 | Example: |
| @@ -8,7 +8,9 @@ Required properties: · 7 unmodified lines | ||
| 8 | 8 | - compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback. |
| 9 | 9 | Examples with soctypes are: |
| 10 | 10 | - "renesas,r8a7743-apmu" (RZ/G1M) |
| 11 | + - "renesas,r8a7744-apmu" (RZ/G1N) | |
| 11 | 12 | - "renesas,r8a7745-apmu" (RZ/G1E) |
| 13 | + - "renesas,r8a77470-apmu" (RZ/G1C) | |
| 12 | 14 | - "renesas,r8a7790-apmu" (R-Car H2) |
| 13 | 15 | - "renesas,r8a7791-apmu" (R-Car M2-W) |
| 14 | 16 | - "renesas,r8a7792-apmu" (R-Car V2H) |
| @@ -8,8 +8,11 @@ and various coprocessors. · 7 unmodified lines | ||
| 8 | 8 | Required properties: |
| 9 | 9 | - compatible: Must contain exactly one of the following: |
| 10 | 10 | - "renesas,r8a7743-sysc" (RZ/G1M) |
| 11 | + - "renesas,r8a7744-sysc" (RZ/G1N) | |
| 11 | 12 | - "renesas,r8a7745-sysc" (RZ/G1E) |
| 12 | 13 | - "renesas,r8a77470-sysc" (RZ/G1C) |
| 14 | + - "renesas,r8a774a1-sysc" (RZ/G2M) | |
| 15 | + - "renesas,r8a774c0-sysc" (RZ/G2E) | |
| 13 | 16 | - "renesas,r8a7779-sysc" (R-Car H1) |
| 14 | 17 | - "renesas,r8a7790-sysc" (R-Car H2) |
| 15 | 18 | - "renesas,r8a7791-sysc" (R-Car M2-W) |
| @@ -0,0 +1,126 @@ | ||
| 1 | +Qualcomm Technology Inc. ADSP Peripheral Image Loader | |
| 2 | + | |
| 3 | +This document defines the binding for a component that loads and boots firmware | |
| 4 | +on the Qualcomm Technology Inc. ADSP Hexagon core. | |
| 5 | + | |
| 6 | +- compatible: | |
| 7 | + Usage: required | |
| 8 | + Value type: <string> | |
| 9 | + Definition: must be one of: | |
| 10 | + "qcom,sdm845-adsp-pil" | |
| 11 | + | |
| 12 | +- reg: | |
| 13 | + Usage: required | |
| 14 | + Value type: <prop-encoded-array> | |
| 15 | + Definition: must specify the base address and size of the qdsp6ss register | |
| 16 | + | |
| 17 | +- interrupts-extended: | |
| 18 | + Usage: required | |
| 19 | + Value type: <prop-encoded-array> | |
| 20 | + Definition: must list the watchdog, fatal IRQs ready, handover and | |
| 21 | + stop-ack IRQs | |
| 22 | + | |
| 23 | +- interrupt-names: | |
| 24 | + Usage: required | |
| 25 | + Value type: <stringlist> | |
| 26 | + Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" | |
| 27 | + | |
| 28 | +- clocks: | |
| 29 | + Usage: required | |
| 30 | + Value type: <prop-encoded-array> | |
| 31 | + Definition: List of 8 phandle and clock specifier pairs for the adsp. | |
| 32 | + | |
| 33 | +- clock-names: | |
| 34 | + Usage: required | |
| 35 | + Value type: <stringlist> | |
| 36 | + Definition: List of clock input name strings sorted in the same | |
| 37 | + order as the clocks property. Definition must have | |
| 38 | + "xo", "sway_cbcr", "lpass_aon", "lpass_ahbs_aon_cbcr", | |
| 39 | + "lpass_ahbm_aon_cbcr", "qdsp6ss_xo", "qdsp6ss_sleep" | |
| 40 | + and "qdsp6ss_core". | |
| 41 | + | |
| 42 | +- power-domains: | |
| 43 | + Usage: required | |
| 44 | + Value type: <phandle> | |
| 45 | + Definition: reference to cx power domain node. | |
| 46 | + | |
| 47 | +- resets: | |
| 48 | + Usage: required | |
| 49 | + Value type: <phandle> | |
| 50 | + Definition: reference to the list of 2 reset-controller for the adsp. | |
| 51 | + | |
| 52 | +- reset-names: | |
| 53 | + Usage: required | |
| 54 | + Value type: <stringlist> | |
| 55 | + Definition: must be "pdc_sync" and "cc_lpass" | |
| 56 | + | |
| 57 | +- qcom,halt-regs: | |
| 58 | + Usage: required | |
| 59 | + Value type: <prop-encoded-array> | |
| 60 | + Definition: a phandle reference to a syscon representing TCSR followed | |
| 61 | + by the offset within syscon for lpass halt register. | |
| 62 | + | |
| 63 | +- memory-region: | |
| 64 | + Usage: required | |
| 65 | + Value type: <phandle> | |
| 66 | + Definition: reference to the reserved-memory for the ADSP | |
| 67 | + | |
| 68 | +- qcom,smem-states: | |
| 69 | + Usage: required | |
| 70 | + Value type: <phandle> | |
| 71 | + Definition: reference to the smem state for requesting the ADSP to | |
| 72 | + shut down | |
| 73 | + | |
| 74 | +- qcom,smem-state-names: | |
| 75 | + Usage: required | |
| 76 | + Value type: <stringlist> | |
| 77 | + Definition: must be "stop" | |
| 78 | + | |
| 79 | + | |
| 80 | += SUBNODES | |
| 81 | +The adsp node may have an subnode named "glink-edge" that describes the | |
| 82 | +communication edge, channels and devices related to the ADSP. | |
| 83 | +See ../soc/qcom/qcom,glink.txt for details on how to describe these. | |
| 84 | + | |
| 85 | += EXAMPLE | |
| 86 | +The following example describes the resources needed to boot control the | |
| 87 | +ADSP, as it is found on SDM845 boards. | |
| 88 | + | |
| 89 | + remoteproc@17300000 { | |
| 90 | + compatible = "qcom,sdm845-adsp-pil"; | |
| 91 | + reg = <0x17300000 0x40c>; | |
| 92 | + | |
| 93 | + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, | |
| 94 | + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, | |
| 95 | + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, | |
| 96 | + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, | |
| 97 | + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; | |
| 98 | + interrupt-names = "wdog", "fatal", "ready", | |
| 99 | + "handover", "stop-ack"; | |
| 100 | + | |
| 101 | + clocks = <&rpmhcc RPMH_CXO_CLK>, | |
| 102 | + <&gcc GCC_LPASS_SWAY_CLK>, | |
| 103 | + <&lpasscc LPASS_AUDIO_WRAPPER_AON_CLK>, | |
| 104 | + <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>, | |
| 105 | + <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>, | |
| 106 | + <&lpasscc LPASS_QDSP6SS_XO_CLK>, | |
| 107 | + <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>, | |
| 108 | + <&lpasscc LPASS_QDSP6SS_CORE_CLK>; | |
| 109 | + clock-names = "xo", "sway_cbcr", "lpass_aon", | |
| 110 | + "lpass_ahbs_aon_cbcr", | |
| 111 | + "lpass_ahbm_aon_cbcr", "qdsp6ss_xo", | |
| 112 | + "qdsp6ss_sleep", "qdsp6ss_core"; | |
| 113 | + | |
| 114 | + power-domains = <&rpmhpd SDM845_CX>; | |
| 115 | + | |
| 116 | + resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>, | |
| 117 | + <&aoss_reset AOSS_CC_LPASS_RESTART>; | |
| 118 | + reset-names = "pdc_sync", "cc_lpass"; | |
| 119 | + | |
| 120 | + qcom,halt-regs = <&tcsr_mutex_regs 0x22000>; | |
| 121 | + | |
| 122 | + memory-region = <&pil_adsp_mem>; | |
| 123 | + | |
| 124 | + qcom,smem-states = <&adsp_smp2p_out 0>; | |
| 125 | + qcom,smem-state-names = "stop"; | |
| 126 | + }; | |
| @@ -10,6 +10,11 @@ on the Qualcomm ADSP Hexagon core. · 9 unmodified lines | ||
| 10 | 10 | "qcom,msm8974-adsp-pil" |
| 11 | 11 | "qcom,msm8996-adsp-pil" |
| 12 | 12 | "qcom,msm8996-slpi-pil" |
| 13 | + "qcom,qcs404-adsp-pas" | |
| 14 | + "qcom,qcs404-cdsp-pas" | |
| 15 | + "qcom,qcs404-wcss-pas" | |
| 16 | + "qcom,sdm845-adsp-pas" | |
| 17 | + "qcom,sdm845-cdsp-pas" | |
| 13 | 18 | |
| 14 | 19 | - interrupts-extended: |
| 15 | 20 | Usage: required |
| @@ -53,13 +53,17 @@ on the Qualcomm Hexagon core. · 52 unmodified lines | ||
| 53 | 53 | Definition: reference to the reset-controller for the modem sub-system |
| 54 | 54 | reference to the list of 3 reset-controllers for the |
| 55 | 55 | wcss sub-system |
| 56 | + reference to the list of 2 reset-controllers for the modem | |
| 57 | + sub-system on SDM845 SoCs | |
| 56 | 58 | |
| 57 | 59 | - reset-names: |
| 58 | 60 | Usage: required |
| 59 | 61 | Value type: <stringlist> |
| 60 | 62 | Definition: must be "mss_restart" for the modem sub-system |
| 61 | − Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" | |
| 62 | − for the wcss syb-system | |
| 63 | + must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" | |
| 64 | + for the wcss sub-system | |
| 65 | + must be "mss_restart", "pdc_reset" for the modem | |
| 66 | + sub-system on SDM845 SoCs | |
| 63 | 67 | |
| 64 | 68 | - cx-supply: |
| 65 | 69 | - mss-supply: |
| @@ -0,0 +1,52 @@ | ||
| 1 | +PDC Global | |
| 2 | +====================================== | |
| 3 | + | |
| 4 | +This binding describes a reset-controller found on PDC-Global (Power Domain | |
| 5 | +Controller) block for Qualcomm Technologies Inc SDM845 SoCs. | |
| 6 | + | |
| 7 | +Required properties: | |
| 8 | +- compatible: | |
| 9 | + Usage: required | |
| 10 | + Value type: <string> | |
| 11 | + Definition: must be: | |
| 12 | + "qcom,sdm845-pdc-global" | |
| 13 | + | |
| 14 | +- reg: | |
| 15 | + Usage: required | |
| 16 | + Value type: <prop-encoded-array> | |
| 17 | + Definition: must specify the base address and size of the register | |
| 18 | + space. | |
| 19 | + | |
| 20 | +- #reset-cells: | |
| 21 | + Usage: required | |
| 22 | + Value type: <uint> | |
| 23 | + Definition: must be 1; cell entry represents the reset index. | |
| 24 | + | |
| 25 | +Example: | |
| 26 | + | |
| 27 | +pdc_reset: reset-controller@b2e0000 { | |
| 28 | + compatible = "qcom,sdm845-pdc-global"; | |
| 29 | + reg = <0xb2e0000 0x20000>; | |
| 30 | + #reset-cells = <1>; | |
| 31 | +}; | |
| 32 | + | |
| 33 | +PDC reset clients | |
| 34 | +====================================== | |
| 35 | + | |
| 36 | +Device nodes that need access to reset lines should | |
| 37 | +specify them as a reset phandle in their corresponding node as | |
| 38 | +specified in reset.txt. | |
| 39 | + | |
| 40 | +For a list of all valid reset indices see | |
| 41 | +<dt-bindings/reset/qcom,sdm845-pdc.h> | |
| 42 | + | |
| 43 | +Example: | |
| 44 | + | |
| 45 | +modem-pil@4080000 { | |
| 46 | + ... | |
| 47 | + | |
| 48 | + resets = <&pdc_reset PDC_MODEM_SYNC_RESET>; | |
| 49 | + reset-names = "pdc_reset"; | |
| 50 | + | |
| 51 | + ... | |
| 52 | +}; | |
| @@ -16,8 +16,11 @@ Required properties: · 15 unmodified lines | ||
| 16 | 16 | - "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G |
| 17 | 17 | Examples with soctypes are: |
| 18 | 18 | - "renesas,r8a7743-rst" (RZ/G1M) |
| 19 | + - "renesas,r8a7744-rst" (RZ/G1N) | |
| 19 | 20 | - "renesas,r8a7745-rst" (RZ/G1E) |
| 20 | 21 | - "renesas,r8a77470-rst" (RZ/G1C) |
| 22 | + - "renesas,r8a774a1-rst" (RZ/G2M) | |
| 23 | + - "renesas,r8a774c0-rst" (RZ/G2E) | |
| 21 | 24 | - "renesas,r8a7778-reset-wdt" (R-Car M1A) |
| 22 | 25 | - "renesas,r8a7779-reset-wdt" (R-Car H1) |
| 23 | 26 | - "renesas,r8a7790-rst" (R-Car H2) |
| @@ -14,6 +14,10 @@ Required properties: · 13 unmodified lines | ||
| 14 | 14 | - "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART. |
| 15 | 15 | - "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART. |
| 16 | 16 | - "renesas,hscif-r8a7743" for R8A7743 (RZ/G1M) HSCIF compatible UART. |
| 17 | + - "renesas,scif-r8a7744" for R8A7744 (RZ/G1N) SCIF compatible UART. | |
| 18 | + - "renesas,scifa-r8a7744" for R8A7744 (RZ/G1N) SCIFA compatible UART. | |
| 19 | + - "renesas,scifb-r8a7744" for R8A7744 (RZ/G1N) SCIFB compatible UART. | |
| 20 | + - "renesas,hscif-r8a7744" for R8A7744 (RZ/G1N) HSCIF compatible UART. | |
| 17 | 21 | - "renesas,scif-r8a7745" for R8A7745 (RZ/G1E) SCIF compatible UART. |
| 18 | 22 | - "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART. |
| 19 | 23 | - "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART. |
| @@ -50,6 +54,8 @@ Required properties: · 30 unmodified lines | ||
| 50 | 54 | - "renesas,hscif-r8a77970" for R8A77970 (R-Car V3M) HSCIF compatible UART. |
| 51 | 55 | - "renesas,scif-r8a77980" for R8A77980 (R-Car V3H) SCIF compatible UART. |
| 52 | 56 | - "renesas,hscif-r8a77980" for R8A77980 (R-Car V3H) HSCIF compatible UART. |
| 57 | + - "renesas,scif-r8a77990" for R8A77990 (R-Car E3) SCIF compatible UART. | |
| 58 | + - "renesas,hscif-r8a77990" for R8A77990 (R-Car E3) HSCIF compatible UART. | |
| 53 | 59 | - "renesas,scif-r8a77995" for R8A77995 (R-Car D3) SCIF compatible UART. |
| 54 | 60 | - "renesas,hscif-r8a77995" for R8A77995 (R-Car D3) HSCIF compatible UART. |
| 55 | 61 | - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. |
| @@ -7,7 +7,7 @@ Required properties: · 6 unmodified lines | ||
| 7 | 7 | - clocks: phandle to the input clock. |
| 8 | 8 | |
| 9 | 9 | Optional properties: |
| 10 | −- fifo-size: the RX/TX FIFO size. Defaults to 64 if not specified. | |
| 10 | +-auto-flow-control: enable automatic flow control support. | |
| 11 | 11 | |
| 12 | 12 | Example: |
| 13 | 13 | aliases { |
| @@ -19,5 +19,4 @@ Example: · 5 unmodified lines | ||
| 19 | 19 | reg = <0x54006800 0x40>; |
| 20 | 20 | interrupts = <0 33 4>; |
| 21 | 21 | clocks = <&uart_clk>; |
| 22 | − fifo-size = <64>; | |
| 23 | 22 | }; |
| @@ -0,0 +1,29 @@ | ||
| 1 | +Amlogic Canvas | |
| 2 | +================================ | |
| 3 | + | |
| 4 | +A canvas is a collection of metadata that describes a pixel buffer. | |
| 5 | +Those metadata include: width, height, phyaddr, wrapping, block mode | |
| 6 | +and endianness. | |
| 7 | + | |
| 8 | +Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data | |
| 9 | +rather than use the phy addresses directly. For instance, this is the case for | |
| 10 | +the video decoders and the display. | |
| 11 | + | |
| 12 | +Amlogic SoCs have 256 canvas. | |
| 13 | + | |
| 14 | +Device Tree Bindings: | |
| 15 | +--------------------- | |
| 16 | + | |
| 17 | +Video Lookup Table | |
| 18 | +-------------------------- | |
| 19 | + | |
| 20 | +Required properties: | |
| 21 | +- compatible: "amlogic,canvas" | |
| 22 | +- reg: Base physical address and size of the canvas registers. | |
| 23 | + | |
| 24 | +Example: | |
| 25 | + | |
| 26 | +canvas: video-lut@48 { | |
| 27 | + compatible = "amlogic,canvas"; | |
| 28 | + reg = <0x0 0x48 0x0 0x14>; | |
| 29 | +}; | |
| @@ -19,10 +19,12 @@ IP Pairing · 18 unmodified lines | ||
| 19 | 19 | Required properties in pwrap device node. |
| 20 | 20 | - compatible: |
| 21 | 21 | "mediatek,mt2701-pwrap" for MT2701/7623 SoCs |
| 22 | + "mediatek,mt6765-pwrap" for MT6765 SoCs | |
| 22 | 23 | "mediatek,mt6797-pwrap" for MT6797 SoCs |
| 23 | 24 | "mediatek,mt7622-pwrap" for MT7622 SoCs |
| 24 | 25 | "mediatek,mt8135-pwrap" for MT8135 SoCs |
| 25 | 26 | "mediatek,mt8173-pwrap" for MT8173 SoCs |
| 27 | + "mediatek,mt8183-pwrap" for MT8183 SoCs | |
| 26 | 28 | - interrupts: IRQ for pwrap in SOC |
| 27 | 29 | - reg-names: Must include the following entries: |
| 28 | 30 | "pwrap": Main registers base |
| @@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF, · 12 unmodified lines | ||
| 13 | 13 | Required Properties: |
| 14 | 14 | |
| 15 | 15 | - compatible: GRF should be one of the following: |
| 16 | + - "rockchip,px30-grf", "syscon": for px30 | |
| 16 | 17 | - "rockchip,rk3036-grf", "syscon": for rk3036 |
| 17 | 18 | - "rockchip,rk3066-grf", "syscon": for rk3066 |
| 18 | 19 | - "rockchip,rk3188-grf", "syscon": for rk3188 |
| @@ -23,6 +24,7 @@ Required Properties: · 4 unmodified lines | ||
| 23 | 24 | - "rockchip,rk3399-grf", "syscon": for rk3399 |
| 24 | 25 | - "rockchip,rv1108-grf", "syscon": for rv1108 |
| 25 | 26 | - compatible: PMUGRF should be one of the following: |
| 27 | + - "rockchip,px30-pmugrf", "syscon": for px30 | |
| 26 | 28 | - "rockchip,rk3368-pmugrf", "syscon": for rk3368 |
| 27 | 29 | - "rockchip,rk3399-pmugrf", "syscon": for rk3399 |
| 28 | 30 | - compatible: SGRF should be one of the following |
| @@ -18,6 +18,7 @@ Required properties: · 17 unmodified lines | ||
| 18 | 18 | - "allwinner,sun8i-h3-system-control" |
| 19 | 19 | - "allwinner,sun50i-a64-sram-controller" (deprecated) |
| 20 | 20 | - "allwinner,sun50i-a64-system-control" |
| 21 | + - "allwinner,sun50i-h6-system-control", "allwinner,sun50i-a64-system-control" | |
| 21 | 22 | - reg : sram controller register offset + length |
| 22 | 23 | |
| 23 | 24 | SRAM nodes |
| @@ -54,6 +55,9 @@ The valid sections compatible for H3 are: · 30 unmodified lines | ||
| 54 | 55 | The valid sections compatible for A64 are: |
| 55 | 56 | - allwinner,sun50i-a64-sram-c |
| 56 | 57 | |
| 58 | +The valid sections compatible for H6 are: | |
| 59 | + - allwinner,sun50i-h6-sram-c, allwinner,sun50i-a64-sram-c | |
| 60 | + | |
| 57 | 61 | Devices using SRAM sections |
| 58 | 62 | --------------------------- |
| 59 | 63 | |
| @@ -12,6 +12,8 @@ Required Properties: · 11 unmodified lines | ||
| 12 | 12 | - "renesas,tmu-r8a7740" for the r8a7740 TMU |
| 13 | 13 | - "renesas,tmu-r8a7778" for the r8a7778 TMU |
| 14 | 14 | - "renesas,tmu-r8a7779" for the r8a7779 TMU |
| 15 | + - "renesas,tmu-r8a77970" for the r8a77970 TMU | |
| 16 | + - "renesas,tmu-r8a77980" for the r8a77980 TMU | |
| 15 | 17 | - "renesas,tmu" for any TMU. |
| 16 | 18 | This is a fallback for the above renesas,tmu-* entries |
| 17 | 19 | |
| @@ -21,16 +21,6 @@ adi,adt7490 +/-1C TDM Extended Temp Range I.C · 20 unmodified lines | ||
| 21 | 21 | adi,adxl345 Three-Axis Digital Accelerometer |
| 22 | 22 | adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too) |
| 23 | 23 | ams,iaq-core AMS iAQ-Core VOC Sensor |
| 24 | −amstaos,tsl2571 AMS/TAOS ALS and proximity sensor | |
| 25 | −amstaos,tsl2671 AMS/TAOS ALS and proximity sensor | |
| 26 | −amstaos,tmd2671 AMS/TAOS ALS and proximity sensor | |
| 27 | −amstaos,tsl2771 AMS/TAOS ALS and proximity sensor | |
| 28 | −amstaos,tmd2771 AMS/TAOS ALS and proximity sensor | |
| 29 | −amstaos,tsl2572 AMS/TAOS ALS and proximity sensor | |
| 30 | −amstaos,tsl2672 AMS/TAOS ALS and proximity sensor | |
| 31 | −amstaos,tmd2672 AMS/TAOS ALS and proximity sensor | |
| 32 | −amstaos,tsl2772 AMS/TAOS ALS and proximity sensor | |
| 33 | −amstaos,tmd2772 AMS/TAOS ALS and proximity sensor | |
| 34 | 24 | at,24c08 i2c serial eeprom (24cxx) |
| 35 | 25 | atmel,at97sc3204t i2c trusted platform module (TPM) |
| 36 | 26 | capella,cm32181 CM32181: Ambient Light Sensor |
| @@ -6,6 +6,7 @@ Required properties: · 5 unmodified lines | ||
| 6 | 6 | - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC. |
| 7 | 7 | - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC. |
| 8 | 8 | - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc; |
| 9 | + - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc; | |
| 9 | 10 | - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc; |
| 10 | 11 | - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc; |
| 11 | 12 | - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs; |
| @@ -84,6 +84,7 @@ cosmic Cosmic Circuits · 83 unmodified lines | ||
| 84 | 84 | crane Crane Connectivity Solutions |
| 85 | 85 | creative Creative Technology Ltd |
| 86 | 86 | crystalfontz Crystalfontz America, Inc. |
| 87 | +csky Hangzhou C-SKY Microsystems Co., Ltd | |
| 87 | 88 | cubietech Cubietech, Ltd. |
| 88 | 89 | cypress Cypress Semiconductor Corporation |
| 89 | 90 | cznic CZ.NIC, z.s.p.o. |
| @@ -114,6 +115,7 @@ elan Elan Microelectronic Corp. · 24 unmodified lines | ||
| 114 | 115 | embest Shenzhen Embest Technology Co., Ltd. |
| 115 | 116 | emmicro EM Microelectronic |
| 116 | 117 | emtrion emtrion GmbH |
| 118 | +endless Endless Mobile, Inc. | |
| 117 | 119 | energymicro Silicon Laboratories (formerly Energy Micro AS) |
| 118 | 120 | engicam Engicam S.r.l. |
| 119 | 121 | epcos EPCOS AG |
| @@ -300,6 +302,7 @@ pine64 Pine64 · 180 unmodified lines | ||
| 300 | 302 | pixcir PIXCIR MICROELECTRONICS Co., Ltd |
| 301 | 303 | plathome Plat'Home Co., Ltd. |
| 302 | 304 | plda PLDA |
| 305 | +plx Broadcom Corporation (formerly PLX Technology) | |
| 303 | 306 | portwell Portwell Inc. |
| 304 | 307 | poslab Poslab Technology Co., Ltd. |
| 305 | 308 | powervr PowerVR (deprecated, use img) |
| @@ -0,0 +1,23 @@ | ||
| 1 | +* Armada 37xx CPU Watchdog Timer Controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : must be "marvell,armada-3700-wdt" | |
| 5 | +- reg : base physical address of the controller and length of memory mapped | |
| 6 | + region. | |
| 7 | +- clocks : the clock feeding the watchdog timer. See clock-bindings.txt | |
| 8 | +- marvell,system-controller : reference to syscon node for the CPU Miscellaneous | |
| 9 | + Registers | |
| 10 | + | |
| 11 | +Example: | |
| 12 | + | |
| 13 | + cpu_misc: system-controller@d000 { | |
| 14 | + compatible = "marvell,armada-3700-cpu-misc", "syscon"; | |
| 15 | + reg = <0xd000 0x1000>; | |
| 16 | + }; | |
| 17 | + | |
| 18 | + wdt: watchdog@8300 { | |
| 19 | + compatible = "marvell,armada-3700-wdt"; | |
| 20 | + reg = <0x8300 0x40>; | |
| 21 | + marvell,system-controller = <&cpu_misc>; | |
| 22 | + clocks = <&xtalclk>; | |
| 23 | + }; | |
| @@ -0,0 +1,25 @@ | ||
| 1 | +* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx) | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: Shall contain one of the following: | |
| 5 | + "mpc83xx_wdt" for an mpc83xx | |
| 6 | + "fsl,mpc8610-wdt" for an mpc86xx | |
| 7 | + "fsl,mpc823-wdt" for an mpc8xx | |
| 8 | +- reg: base physical address and length of the area hosting the | |
| 9 | + watchdog registers. | |
| 10 | + On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100> | |
| 11 | + On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100> | |
| 12 | + On the 8xx, "General System Interface Unit" area: <0x0 0x10> | |
| 13 | + | |
| 14 | +Optional properties: | |
| 15 | +- reg: additional physical address and length (4) of location of the | |
| 16 | + Reset Status Register (called RSTRSCR on the mpc86xx) | |
| 17 | + On the 83xx, it is located at offset 0x910 | |
| 18 | + On the 86xx, it is located at offset 0xe0094 | |
| 19 | + On the 8xx, it is located at offset 0x288 | |
| 20 | + | |
| 21 | +Example: | |
| 22 | + WDT: watchdog@0 { | |
| 23 | + compatible = "fsl,mpc823-wdt"; | |
| 24 | + reg = <0x0 0x10 0x288 0x4>; | |
| 25 | + }; | |
| @@ -21,6 +21,7 @@ Required properties: · 20 unmodified lines | ||
| 21 | 21 | - "renesas,r8a77990-wdt" (R-Car E3) |
| 22 | 22 | - "renesas,r8a77995-wdt" (R-Car D3) |
| 23 | 23 | - "renesas,r7s72100-wdt" (RZ/A1) |
| 24 | + - "renesas,r7s9210-wdt" (RZ/A2) | |
| 24 | 25 | The generic compatible string must be: |
| 25 | 26 | - "renesas,rza-wdt" for RZ/A |
| 26 | 27 | - "renesas,rcar-gen2-wdt" for R-Car Gen2 and RZ/G1 |
| @@ -151,6 +151,11 @@ Mount Options · 150 unmodified lines | ||
| 151 | 151 | Report overall filesystem usage in statfs instead of using the root |
| 152 | 152 | directory quota. |
| 153 | 153 | |
| 154 | + nocopyfrom | |
| 155 | + Don't use the RADOS 'copy-from' operation to perform remote object | |
| 156 | + copies. Currently, it's only used in copy_file_range, which will revert | |
| 157 | + to the default VFS implementation if this option is used. | |
| 158 | + | |
| 154 | 159 | More Information |
| 155 | 160 | ================ |
| 156 | 161 | |
| @@ -84,7 +84,7 @@ Creating a Cache · 83 unmodified lines | ||
| 84 | 84 | A message from user space has arrived to fill out a |
| 85 | 85 | cache entry. It is in 'buf' of length 'len'. |
| 86 | 86 | cache_parse should parse this, find the item in the |
| 87 | − cache with sunrpc_cache_lookup, and update the item | |
| 87 | + cache with sunrpc_cache_lookup_rcu, and update the item | |
| 88 | 88 | with sunrpc_cache_update. |
| 89 | 89 | |
| 90 | 90 | |
| @@ -95,7 +95,7 @@ Creating a Cache · 4 unmodified lines | ||
| 95 | 95 | Using a cache |
| 96 | 96 | ------------- |
| 97 | 97 | |
| 98 | −To find a value in a cache, call sunrpc_cache_lookup passing a pointer | |
| 98 | +To find a value in a cache, call sunrpc_cache_lookup_rcu passing a pointer | |
| 99 | 99 | to the cache_head in a sample item with the 'key' fields filled in. |
| 100 | 100 | This will be passed to ->match to identify the target entry. If no |
| 101 | 101 | entry is found, a new entry will be create, added to the cache, and |
| @@ -116,7 +116,7 @@ item does become valid, the deferred copy of the request will be · 14 unmodified lines | ||
| 116 | 116 | revisited (->revisit). It is expected that this method will |
| 117 | 117 | reschedule the request for processing. |
| 118 | 118 | |
| 119 | −The value returned by sunrpc_cache_lookup can also be passed to | |
| 119 | +The value returned by sunrpc_cache_lookup_rcu can also be passed to | |
| 120 | 120 | sunrpc_cache_update to set the content for the item. A second item is |
| 121 | 121 | passed which should hold the content. If the item found by _lookup |
| 122 | 122 | has valid data, then it is discarded and a new item is created. This |
| @@ -1,72 +0,0 @@ | ||
| 1 | −POHMELFS: Parallel Optimized Host Message Exchange Layered File System. | |
| 2 | − | |
| 3 | − Evgeniy Polyakov <zbr@ioremap.net> | |
| 4 | − | |
| 5 | −Homepage: http://www.ioremap.net/projects/pohmelfs | |
| 6 | − | |
| 7 | −POHMELFS first began as a network filesystem with coherent local data and | |
| 8 | −metadata caches but is now evolving into a parallel distributed filesystem. | |
| 9 | − | |
| 10 | −Main features of this FS include: | |
| 11 | − * Locally coherent cache for data and metadata with (potentially) byte-range locks. | |
| 12 | − Since all Linux filesystems lock the whole inode during writing, algorithm | |
| 13 | − is very simple and does not use byte-ranges, although they are sent in | |
| 14 | − locking messages. | |
| 15 | − * Completely async processing of all events except creation of hard and symbolic | |
| 16 | − links, and rename events. | |
| 17 | − Object creation and data reading and writing are processed asynchronously. | |
| 18 | − * Flexible object architecture optimized for network processing. | |
| 19 | − Ability to create long paths to objects and remove arbitrarily huge | |
| 20 | − directories with a single network command. | |
| 21 | − (like removing the whole kernel tree via a single network command). | |
| 22 | − * Very high performance. | |
| 23 | − * Fast and scalable multithreaded userspace server. Being in userspace it works | |
| 24 | − with any underlying filesystem and still is much faster than async in-kernel NFS one. | |
| 25 | − * Client is able to switch between different servers (if one goes down, client | |
| 26 | − automatically reconnects to second and so on). | |
| 27 | − * Transactions support. Full failover for all operations. | |
| 28 | − Resending transactions to different servers on timeout or error. | |
| 29 | − * Read request (data read, directory listing, lookup requests) balancing between multiple servers. | |
| 30 | − * Write requests are replicated to multiple servers and completed only when all of them are acked. | |
| 31 | − * Ability to add and/or remove servers from the working set at run-time. | |
| 32 | − * Strong authentication and possible data encryption in network channel. | |
| 33 | − * Extended attributes support. | |
| 34 | − | |
| 35 | −POHMELFS is based on transactions, which are potentially long-standing objects that live | |
| 36 | −in the client's memory. Each transaction contains all the information needed to process a given | |
| 37 | −command (or set of commands, which is frequently used during data writing: single transactions | |
| 38 | −can contain creation and data writing commands). Transactions are committed by all the servers | |
| 39 | −to which they are sent and, in case of failures, are eventually resent or dropped with an error. | |
| 40 | −For example, reading will return an error if no servers are available. | |
| 41 | − | |
| 42 | −POHMELFS uses a asynchronous approach to data processing. Courtesy of transactions, it is | |
| 43 | −possible to detach replies from requests and, if the command requires data to be received, the | |
| 44 | −caller sleeps waiting for it. Thus, it is possible to issue multiple read commands to different | |
| 45 | −servers and async threads will pick up replies in parallel, find appropriate transactions in the | |
| 46 | −system and put the data where it belongs (like the page or inode cache). | |
| 47 | − | |
| 48 | −The main feature of POHMELFS is writeback data and the metadata cache. | |
| 49 | −Only a few non-performance critical operations use the write-through cache and | |
| 50 | −are synchronous: hard and symbolic link creation, and object rename. Creation, | |
| 51 | −removal of objects and data writing are asynchronous and are sent to | |
| 52 | −the server during system writeback. Only one writer at a time is allowed for any | |
| 53 | −given inode, which is guarded by an appropriate locking protocol. | |
| 54 | −Because of this feature, POHMELFS is extremely fast at metadata intensive | |
| 55 | −workloads and can fully utilize the bandwidth to the servers when doing bulk | |
| 56 | −data transfers. | |
| 57 | − | |
| 58 | −POHMELFS clients operate with a working set of servers and are capable of balancing read-only | |
| 59 | −operations (like lookups or directory listings) between them according to IO priorities. | |
| 60 | −Administrators can add or remove servers from the set at run-time via special commands (described | |
| 61 | −in Documentation/filesystems/pohmelfs/info.txt file). Writes are replicated to all servers, which | |
| 62 | −are connected with write permission turned on. IO priority and permissions can be changed in | |
| 63 | −run-time. | |
| 64 | − | |
| 65 | −POHMELFS is capable of full data channel encryption and/or strong crypto hashing. | |
| 66 | −One can select any kernel supported cipher, encryption mode, hash type and operation mode | |
| 67 | −(hmac or digest). It is also possible to use both or neither (default). Crypto configuration | |
| 68 | −is checked during mount time and, if the server does not support it, appropriate capabilities | |
| 69 | −will be disabled or mount will fail (if 'crypto_fail_unsupported' mount option is specified). | |
| 70 | −Crypto performance heavily depends on the number of crypto threads, which asynchronously perform | |
| 71 | −crypto operations and send the resulting data to server or submit it up the stack. This number | |
| 72 | −can be controlled via a mount option. | |
| @@ -1,99 +0,0 @@ | ||
| 1 | −POHMELFS usage information. | |
| 2 | − | |
| 3 | −Mount options. | |
| 4 | −All but index, number of crypto threads and maximum IO size can changed via remount. | |
| 5 | − | |
| 6 | −idx=%u | |
| 7 | − Each mountpoint is associated with a special index via this option. | |
| 8 | − Administrator can add or remove servers from the given index, so all mounts, | |
| 9 | − which were attached to it, are updated. | |
| 10 | − Default it is 0. | |
| 11 | − | |
| 12 | −trans_scan_timeout=%u | |
| 13 | − This timeout, expressed in milliseconds, specifies time to scan transaction | |
| 14 | − trees looking for stale requests, which have to be resent, or if number of | |
| 15 | − retries exceed specified limit, dropped with error. | |
| 16 | − Default is 5 seconds. | |
| 17 | − | |
| 18 | −drop_scan_timeout=%u | |
| 19 | − Internal timeout, expressed in milliseconds, which specifies how frequently | |
| 20 | − inodes marked to be dropped are freed. It also specifies how frequently | |
| 21 | − the system checks that servers have to be added or removed from current working set. | |
| 22 | − Default is 1 second. | |
| 23 | − | |
| 24 | −wait_on_page_timeout=%u | |
| 25 | − Number of milliseconds to wait for reply from remote server for data reading command. | |
| 26 | − If this timeout is exceeded, reading returns an error. | |
| 27 | − Default is 5 seconds. | |
| 28 | − | |
| 29 | −trans_retries=%u | |
| 30 | − This is the number of times that a transaction will be resent to a server that did | |
| 31 | − not answer for the last @trans_scan_timeout milliseconds. | |
| 32 | − When the number of resends exceeds this limit, the transaction is completed with error. | |
| 33 | − Default is 5 resends. | |
| 34 | − | |
| 35 | −crypto_thread_num=%u | |
| 36 | − Number of crypto processing threads. Threads are used both for RX and TX traffic. | |
| 37 | − Default is 2, or no threads if crypto operations are not supported. | |
| 38 | − | |
| 39 | −trans_max_pages=%u | |
| 40 | − Maximum number of pages in a single transaction. This parameter also controls | |
| 41 | − the number of pages, allocated for crypto processing (each crypto thread has | |
| 42 | − pool of pages, the number of which is equal to 'trans_max_pages'. | |
| 43 | − Default is 100 pages. | |
| 44 | − | |
| 45 | −crypto_fail_unsupported | |
| 46 | − If specified, mount will fail if the server does not support requested crypto operations. | |
| 47 | − By default mount will disable non-matching crypto operations. | |
| 48 | − | |
| 49 | −mcache_timeout=%u | |
| 50 | − Maximum number of milliseconds to wait for the mcache objects to be processed. | |
| 51 | − Mcache includes locks (given lock should be granted by server), attributes (they should be | |
| 52 | − fully received in the given timeframe). | |
| 53 | − Default is 5 seconds. | |
| 54 | − | |
| 55 | −Usage examples. | |
| 56 | − | |
| 57 | −Add server server1.net:1025 into the working set with index $idx | |
| 58 | −with appropriate hash algorithm and key file and cipher algorithm, mode and key file: | |
| 59 | −$cfg A add -a server1.net -p 1025 -i $idx -K $hash_key -k $cipher_key | |
| 60 | − | |
| 61 | −Mount filesystem with given index $idx to /mnt mountpoint. | |
| 62 | −Client will connect to all servers specified in the working set via previous command: | |
| 63 | −mount -t pohmel -o idx=$idx q /mnt | |
| 64 | − | |
| 65 | −Change permissions to read-only (-I 1 option, '-I 2' - write-only, 3 - rw): | |
| 66 | −$cfg A modify -a server1.net -p 1025 -i $idx -I 1 | |
| 67 | − | |
| 68 | −Change IO priority to 123 (node with the highest priority gets read requests). | |
| 69 | −$cfg A modify -a server1.net -p 1025 -i $idx -P 123 | |
| 70 | − | |
| 71 | −One can check currect status of all connections in the mountstats file: | |
| 72 | −# cat /proc/$PID/mountstats | |
| 73 | −... | |
| 74 | −device none mounted on /mnt with fstype pohmel | |
| 75 | −idx addr(:port) socket_type protocol active priority permissions | |
| 76 | −0 server1.net:1026 1 6 1 250 1 | |
| 77 | −0 server2.net:1025 1 6 1 123 3 | |
| 78 | − | |
| 79 | −Server installation. | |
| 80 | − | |
| 81 | −Creating a server, which listens at port 1025 and 0.0.0.0 address. | |
| 82 | −Working root directory (note, that server chroots there, so you have to have appropriate permissions) | |
| 83 | −is set to /mnt, server will negotiate hash/cipher with client, in case client requested it, there | |
| 84 | −are appropriate key files. | |
| 85 | −Number of working threads is set to 10. | |
| 86 | − | |
| 87 | −# ./fserver -a 0.0.0.0 -p 1025 -r /mnt -w 10 -K hash_key -k cipher_key | |
| 88 | − | |
| 89 | − -A 6 - listen on ipv6 address. Default: Disabled. | |
| 90 | − -r root - path to root directory. Default: /tmp. | |
| 91 | − -a addr - listen address. Default: 0.0.0.0. | |
| 92 | − -p port - listen port. Default: 1025. | |
| 93 | − -w workers - number of workers per connected client. Default: 1. | |
| 94 | − -K file - hash key size. Default: none. | |
| 95 | − -k file - cipher key size. Default: none. | |
| 96 | − -h - this help. | |
| 97 | − | |
| 98 | −Number of worker threads specifies how many workers will be created for each client. | |
| 99 | −Bulk single-client transafers usually are better handled with smaller number (like 1-3). | |
| @@ -1,227 +0,0 @@ | ||
| 1 | −POHMELFS network protocol. | |
| 2 | − | |
| 3 | −Basic structure used in network communication is following command: | |
| 4 | − | |
| 5 | −struct netfs_cmd | |
| 6 | −{ | |
| 7 | − __u16 cmd; /* Command number */ | |
| 8 | − __u16 csize; /* Attached crypto information size */ | |
| 9 | − __u16 cpad; /* Attached padding size */ | |
| 10 | − __u16 ext; /* External flags */ | |
| 11 | − __u32 size; /* Size of the attached data */ | |
| 12 | − __u32 trans; /* Transaction id */ | |
| 13 | − __u64 id; /* Object ID to operate on. Used for feedback.*/ | |
| 14 | − __u64 start; /* Start of the object. */ | |
| 15 | − __u64 iv; /* IV sequence */ | |
| 16 | − __u8 data[0]; | |
| 17 | −}; | |
| 18 | − | |
| 19 | −Commands can be embedded into transaction command (which in turn has own command), | |
| 20 | −so one can extend protocol as needed without breaking backward compatibility as long | |
| 21 | −as old commands are supported. All string lengths include tail 0 byte. | |
| 22 | − | |
| 23 | −All commands are transferred over the network in big-endian. CPU endianness is used at the end peers. | |
| 24 | − | |
| 25 | −@cmd - command number, which specifies command to be processed. Following | |
| 26 | − commands are used currently: | |
| 27 | − | |
| 28 | − NETFS_READDIR = 1, /* Read directory for given inode number */ | |
| 29 | − NETFS_READ_PAGE, /* Read data page from the server */ | |
| 30 | − NETFS_WRITE_PAGE, /* Write data page to the server */ | |
| 31 | − NETFS_CREATE, /* Create directory entry */ | |
| 32 | − NETFS_REMOVE, /* Remove directory entry */ | |
| 33 | − NETFS_LOOKUP, /* Lookup single object */ | |
| 34 | − NETFS_LINK, /* Create a link */ | |
| 35 | − NETFS_TRANS, /* Transaction */ | |
| 36 | − NETFS_OPEN, /* Open intent */ | |
| 37 | − NETFS_INODE_INFO, /* Metadata cache coherency synchronization message */ | |
| 38 | − NETFS_PAGE_CACHE, /* Page cache invalidation message */ | |
| 39 | − NETFS_READ_PAGES, /* Read multiple contiguous pages in one go */ | |
| 40 | − NETFS_RENAME, /* Rename object */ | |
| 41 | − NETFS_CAPABILITIES, /* Capabilities of the client, for example supported crypto */ | |
| 42 | − NETFS_LOCK, /* Distributed lock message */ | |
| 43 | − NETFS_XATTR_SET, /* Set extended attribute */ | |
| 44 | − NETFS_XATTR_GET, /* Get extended attribute */ | |
| 45 | − | |
| 46 | −@ext - external flags. Used by different commands to specify some extra arguments | |
| 47 | − like partial size of the embedded objects or creation flags. | |
| 48 | − | |
| 49 | −@size - size of the attached data. For NETFS_READ_PAGE and NETFS_READ_PAGES no data is attached, | |
| 50 | − but size of the requested data is incorporated here. It does not include size of the command | |
| 51 | − header (struct netfs_cmd) itself. | |
| 52 | − | |
| 53 | −@id - id of the object this command operates on. Each command can use it for own purpose. | |
| 54 | − | |
| 55 | −@start - start of the object this command operates on. Each command can use it for own purpose. | |
| 56 | − | |
| 57 | −@csize, @cpad - size and padding size of the (attached if needed) crypto information. | |
| 58 | − | |
| 59 | −Command specifications. | |
| 60 | − | |
| 61 | −@NETFS_READDIR | |
| 62 | −This command is used to sync content of the remote dir to the client. | |
| 63 | − | |
| 64 | −@ext - length of the path to object. | |
| 65 | −@size - the same. | |
| 66 | −@id - local inode number of the directory to read. | |
| 67 | −@start - zero. | |
| 68 | − | |
| 69 | − | |
| 70 | −@NETFS_READ_PAGE | |
| 71 | −This command is used to read data from remote server. | |
| 72 | −Data size does not exceed local page cache size. | |
| 73 | − | |
| 74 | −@id - inode number. | |
| 75 | −@start - first byte offset. | |
| 76 | −@size - number of bytes to read plus length of the path to object. | |
| 77 | −@ext - object path length. | |
| 78 | − | |
| 79 | − | |
| 80 | −@NETFS_CREATE | |
| 81 | −Used to create object. | |
| 82 | −It does not require that all directories on top of the object were | |
| 83 | −already created, it will create them automatically. Each object has | |
| 84 | −associated @netfs_path_entry data structure, which contains creation | |
| 85 | −mode (permissions and type) and length of the name as long as name itself. | |
| 86 | − | |
| 87 | −@start - 0 | |
| 88 | −@size - size of the all data structures needed to create a path | |
| 89 | −@id - local inode number | |
| 90 | −@ext - 0 | |
| 91 | − | |
| 92 | − | |
| 93 | −@NETFS_REMOVE | |
| 94 | −Used to remove object. | |
| 95 | − | |
| 96 | −@ext - length of the path to object. | |
| 97 | −@size - the same. | |
| 98 | −@id - local inode number. | |
| 99 | −@start - zero. | |
| 100 | − | |
| 101 | − | |
| 102 | −@NETFS_LOOKUP | |
| 103 | −Lookup information about object on server. | |
| 104 | − | |
| 105 | −@ext - length of the path to object. | |
| 106 | −@size - the same. | |
| 107 | −@id - local inode number of the directory to look object in. | |
| 108 | −@start - local inode number of the object to look at. | |
| 109 | − | |
| 110 | − | |
| 111 | −@NETFS_LINK | |
| 112 | −Create hard of symlink. | |
| 113 | −Command is sent as "object_path|target_path". | |
| 114 | − | |
| 115 | −@size - size of the above string. | |
| 116 | −@id - parent local inode number. | |
| 117 | −@start - 1 for symlink, 0 for hardlink. | |
| 118 | −@ext - size of the "object_path" above. | |
| 119 | − | |
| 120 | − | |
| 121 | −@NETFS_TRANS | |
| 122 | −Transaction header. | |
| 123 | − | |
| 124 | −@size - incorporates all embedded command sizes including theirs header sizes. | |
| 125 | −@start - transaction generation number - unique id used to find transaction. | |
| 126 | −@ext - transaction flags. Unused at the moment. | |
| 127 | −@id - 0. | |
| 128 | − | |
| 129 | − | |
| 130 | −@NETFS_OPEN | |
| 131 | −Open intent for given transaction. | |
| 132 | − | |
| 133 | −@id - local inode number. | |
| 134 | −@start - 0. | |
| 135 | −@size - path length to the object. | |
| 136 | −@ext - open flags (O_RDWR and so on). | |
| 137 | − | |
| 138 | − | |
| 139 | −@NETFS_INODE_INFO | |
| 140 | −Metadata update command. | |
| 141 | −It is sent to servers when attributes of the object are changed and received | |
| 142 | −when data or metadata were updated. It operates with the following structure: | |
| 143 | − | |
| 144 | −struct netfs_inode_info | |
| 145 | −{ | |
| 146 | − unsigned int mode; | |
| 147 | − unsigned int nlink; | |
| 148 | − unsigned int uid; | |
| 149 | − unsigned int gid; | |
| 150 | − unsigned int blocksize; | |
| 151 | − unsigned int padding; | |
| 152 | − __u64 ino; | |
| 153 | − __u64 blocks; | |
| 154 | − __u64 rdev; | |
| 155 | − __u64 size; | |
| 156 | − __u64 version; | |
| 157 | −}; | |
| 158 | − | |
| 159 | −It effectively mirrors stat(2) returned data. | |
| 160 | − | |
| 161 | − | |
| 162 | −@ext - path length to the object. | |
| 163 | −@size - the same plus size of the netfs_inode_info structure. | |
| 164 | −@id - local inode number. | |
| 165 | −@start - 0. | |
| 166 | − | |
| 167 | − | |
| 168 | −@NETFS_PAGE_CACHE | |
| 169 | −Command is only received by clients. It contains information about | |
| 170 | −page to be marked as not up-to-date. | |
| 171 | − | |
| 172 | −@id - client's inode number. | |
| 173 | −@start - last byte of the page to be invalidated. If it is not equal to | |
| 174 | − current inode size, it will be vmtruncated(). | |
| 175 | −@size - 0 | |
| 176 | −@ext - 0 | |
| 177 | − | |
| 178 | − | |
| 179 | −@NETFS_READ_PAGES | |
| 180 | −Used to read multiple contiguous pages in one go. | |
| 181 | − | |
| 182 | −@start - first byte of the contiguous region to read. | |
| 183 | −@size - contains of two fields: lower 8 bits are used to represent page cache shift | |
| 184 | − used by client, another 3 bytes are used to get number of pages. | |
| 185 | −@id - local inode number. | |
| 186 | −@ext - path length to the object. | |
| 187 | − | |
| 188 | − | |
| 189 | −@NETFS_RENAME | |
| 190 | −Used to rename object. | |
| 191 | −Attached data is formed into following string: "old_path|new_path". | |
| 192 | − | |
| 193 | −@id - local inode number. | |
| 194 | −@start - parent inode number. | |
| 195 | −@size - length of the above string. | |
| 196 | −@ext - length of the old path part. | |
| 197 | − | |
| 198 | − | |
| 199 | −@NETFS_CAPABILITIES | |
| 200 | −Used to exchange crypto capabilities with server. | |
| 201 | −If crypto capabilities are not supported by server, then client will disable it | |
| 202 | −or fail (if 'crypto_fail_unsupported' mount options was specified). | |
| 203 | − | |
| 204 | −@id - superblock index. Used to specify crypto information for group of servers. | |
| 205 | −@size - size of the attached capabilities structure. | |
| 206 | −@start - 0. | |
| 207 | −@size - 0. | |
| 208 | −@scsize - 0. | |
| 209 | − | |
| 210 | −@NETFS_LOCK | |
| 211 | −Used to send lock request/release messages. Although it sends byte range request | |
| 212 | −and is capable of flushing pages based on that, it is not used, since all Linux | |
| 213 | −filesystems lock the whole inode. | |
| 214 | − | |
| 215 | −@id - lock generation number. | |
| 216 | −@start - start of the locked range. | |
| 217 | −@size - size of the locked range. | |
| 218 | −@ext - lock type: read/write. Not used actually. 15'th bit is used to determine, | |
| 219 | − if it is lock request (1) or release (0). | |
| 220 | − | |
| 221 | −@NETFS_XATTR_SET | |
| 222 | −@NETFS_XATTR_GET | |
| 223 | −Used to set/get extended attributes for given inode. | |
| 224 | −@id - attribute generation number or xattr setting type | |
| 225 | −@start - size of the attribute (request or attached) | |
| 226 | −@size - name length, path len and data size for given attribute | |
| 227 | −@ext - path length for given object | |
| @@ -13,6 +13,7 @@ GPU Driver Documentation · 12 unmodified lines | ||
| 13 | 13 | tve200 |
| 14 | 14 | v3d |
| 15 | 15 | vc4 |
| 16 | + vkms | |
| 16 | 17 | bridge/dw-hdmi |
| 17 | 18 | xen-front |
| 18 | 19 | |
| @@ -287,8 +287,14 @@ Atomic Mode Setting Function Reference · 286 unmodified lines | ||
| 287 | 287 | .. kernel-doc:: drivers/gpu/drm/drm_atomic.c |
| 288 | 288 | :export: |
| 289 | 289 | |
| 290 | −.. kernel-doc:: drivers/gpu/drm/drm_atomic.c | |
| 291 | − :internal: | |
| 290 | +Atomic Mode Setting IOCTL and UAPI Functions | |
| 291 | +-------------------------------------------- | |
| 292 | + | |
| 293 | +.. kernel-doc:: drivers/gpu/drm/drm_atomic_uapi.c | |
| 294 | + :doc: overview | |
| 295 | + | |
| 296 | +.. kernel-doc:: drivers/gpu/drm/drm_atomic_uapi.c | |
| 297 | + :export: | |
| 292 | 298 | |
| 293 | 299 | CRTC Abstraction |
| 294 | 300 | ================ |
| @@ -323,6 +329,12 @@ Frame Buffer Functions Reference · 28 unmodified lines | ||
| 323 | 329 | DRM Format Handling |
| 324 | 330 | =================== |
| 325 | 331 | |
| 332 | +.. kernel-doc:: include/uapi/drm/drm_fourcc.h | |
| 333 | + :doc: overview | |
| 334 | + | |
| 335 | +Format Functions Reference | |
| 336 | +-------------------------- | |
| 337 | + | |
| 326 | 338 | .. kernel-doc:: include/drm/drm_fourcc.h |
| 327 | 339 | :internal: |
| 328 | 340 | |
| @@ -560,7 +572,7 @@ Tile Group Property · 231 unmodified lines | ||
| 560 | 572 | Explicit Fencing Properties |
| 561 | 573 | --------------------------- |
| 562 | 574 | |
| 563 | −.. kernel-doc:: drivers/gpu/drm/drm_atomic.c | |
| 575 | +.. kernel-doc:: drivers/gpu/drm/drm_atomic_uapi.c | |
| 564 | 576 | :doc: explicit fencing properties |
| 565 | 577 | |
| 566 | 578 | Existing KMS Properties |
| @@ -297,7 +297,7 @@ made up of several fields, the more interesting ones being: · 296 unmodified lines | ||
| 297 | 297 | struct vm_operations_struct { |
| 298 | 298 | void (*open)(struct vm_area_struct * area); |
| 299 | 299 | void (*close)(struct vm_area_struct * area); |
| 300 | − int (*fault)(struct vm_fault *vmf); | |
| 300 | + vm_fault_t (*fault)(struct vm_fault *vmf); | |
| 301 | 301 | }; |
| 302 | 302 | |
| 303 | 303 | |
| @@ -505,7 +505,7 @@ GPU Scheduler · 201 unmodified lines | ||
| 505 | 505 | Overview |
| 506 | 506 | -------- |
| 507 | 507 | |
| 508 | −.. kernel-doc:: drivers/gpu/drm/scheduler/gpu_scheduler.c | |
| 508 | +.. kernel-doc:: drivers/gpu/drm/scheduler/sched_main.c | |
| 509 | 509 | :doc: Overview |
| 510 | 510 | |
| 511 | 511 | Scheduler Function References |
| @@ -514,5 +514,5 @@ Scheduler Function References · 2 unmodified lines | ||
| 514 | 514 | .. kernel-doc:: include/drm/gpu_scheduler.h |
| 515 | 515 | :internal: |
| 516 | 516 | |
| 517 | −.. kernel-doc:: drivers/gpu/drm/scheduler/gpu_scheduler.c | |
| 517 | +.. kernel-doc:: drivers/gpu/drm/scheduler/sched_main.c | |
| 518 | 518 | :export: |
| @@ -127,7 +127,8 @@ interfaces to fix these issues: · 126 unmodified lines | ||
| 127 | 127 | the acquire context explicitly on stack and then also pass it down into |
| 128 | 128 | drivers explicitly so that the legacy-on-atomic functions can use them. |
| 129 | 129 | |
| 130 | − Except for some driver code this is done. | |
| 130 | + Except for some driver code this is done. This task should be finished by | |
| 131 | + adding WARN_ON(!drm_drv_uses_atomic_modeset) in drm_modeset_lock_all(). | |
| 131 | 132 | |
| 132 | 133 | * A bunch of the vtable hooks are now in the wrong place: DRM has a split |
| 133 | 134 | between core vfunc tables (named ``drm_foo_funcs``), which are used to |
| @@ -137,13 +138,6 @@ interfaces to fix these issues: · 3 unmodified lines | ||
| 137 | 138 | ``_helper_funcs`` since they are not part of the core ABI. There's a |
| 138 | 139 | ``FIXME`` comment in the kerneldoc for each such case in ``drm_crtc.h``. |
| 139 | 140 | |
| 140 | −* There's a new helper ``drm_atomic_helper_best_encoder()`` which could be | |
| 141 | − used by all atomic drivers which don't select the encoder for a given | |
| 142 | − connector at runtime. That's almost all of them, and would allow us to get | |
| 143 | − rid of a lot of ``best_encoder`` boilerplate in drivers. | |
| 144 | − | |
| 145 | − This was almost done, but new drivers added a few more cases again. | |
| 146 | − | |
| 147 | 141 | Contact: Daniel Vetter |
| 148 | 142 | |
| 149 | 143 | Get rid of dev->struct_mutex from GEM drivers |
| @@ -164,9 +158,8 @@ private lock. The tricky part is the BO free functions, since those can't · 14 unmodified lines | ||
| 164 | 158 | reliably take that lock any more. Instead state needs to be protected with |
| 165 | 159 | suitable subordinate locks or some cleanup work pushed to a worker thread. For |
| 166 | 160 | performance-critical drivers it might also be better to go with a more |
| 167 | −fine-grained per-buffer object and per-context lockings scheme. Currently the | |
| 168 | −following drivers still use ``struct_mutex``: ``msm``, ``omapdrm`` and | |
| 169 | −``udl``. | |
| 161 | +fine-grained per-buffer object and per-context lockings scheme. Currently only the | |
| 162 | +``msm`` driver still use ``struct_mutex``. | |
| 170 | 163 | |
| 171 | 164 | Contact: Daniel Vetter, respective driver maintainers |
| 172 | 165 | |
| @@ -190,7 +183,8 @@ Convert drivers to use simple modeset suspend/resume · 17 unmodified lines | ||
| 190 | 183 | |
| 191 | 184 | Most drivers (except i915 and nouveau) that use |
| 192 | 185 | drm_atomic_helper_suspend/resume() can probably be converted to use |
| 193 | −drm_mode_config_helper_suspend/resume(). | |
| 186 | +drm_mode_config_helper_suspend/resume(). Also there's still open-coded version | |
| 187 | +of the atomic suspend/resume code in older atomic modeset drivers. | |
| 194 | 188 | |
| 195 | 189 | Contact: Maintainer of the driver you plan to convert |
| 196 | 190 | |
| @@ -246,20 +240,10 @@ Core refactorings · 49 unmodified lines | ||
| 246 | 240 | Clean up the DRM header mess |
| 247 | 241 | ---------------------------- |
| 248 | 242 | |
| 249 | −Currently the DRM subsystem has only one global header, ``drmP.h``. This is | |
| 250 | −used both for functions exported to helper libraries and drivers and functions | |
| 251 | −only used internally in the ``drm.ko`` module. The goal would be to move all | |
| 252 | −header declarations not needed outside of ``drm.ko`` into | |
| 253 | −``drivers/gpu/drm/drm_*_internal.h`` header files. ``EXPORT_SYMBOL`` also | |
| 254 | −needs to be dropped for these functions. | |
| 255 | − | |
| 256 | −This would nicely tie in with the below task to create kerneldoc after the API | |
| 257 | −is cleaned up. Or with the "hide legacy cruft better" task. | |
| 258 | − | |
| 259 | −Note that this is well in progress, but ``drmP.h`` is still huge. The updated | |
| 260 | −plan is to switch to per-file driver API headers, which will also structure | |
| 261 | −the kerneldoc better. This should also allow more fine-grained ``#include`` | |
| 262 | −directives. | |
| 243 | +The DRM subsystem originally had only one huge global header, ``drmP.h``. This | |
| 244 | +is now split up, but many source files still include it. The remaining part of | |
| 245 | +the cleanup work here is to replace any ``#include <drm/drmP.h>`` by only the | |
| 246 | +headers needed (and fixing up any missing pre-declarations in the headers). | |
| 263 | 247 | |
| 264 | 248 | In the end no .c file should need to include ``drmP.h`` anymore. |
| 265 | 249 | |
| @@ -278,26 +262,6 @@ See https://dri.freedesktop.org/docs/drm/ for what's there already. · 12 unmodified lines | ||
| 278 | 262 | |
| 279 | 263 | Contact: Daniel Vetter |
| 280 | 264 | |
| 281 | −Hide legacy cruft better | |
| 282 | −------------------------ | |
| 283 | − | |
| 284 | −Way back DRM supported only drivers which shadow-attached to PCI devices with | |
| 285 | −userspace or fbdev drivers setting up outputs. Modern DRM drivers take charge | |
| 286 | −of the entire device, you can spot them with the DRIVER_MODESET flag. | |
| 287 | − | |
| 288 | −Unfortunately there's still large piles of legacy code around which needs to | |
| 289 | −be hidden so that driver writers don't accidentally end up using it. And to | |
| 290 | −prevent security issues in those legacy IOCTLs from being exploited on modern | |
| 291 | −drivers. This has multiple possible subtasks: | |
| 292 | − | |
| 293 | −* Extract support code for legacy features into a ``drm-legacy.ko`` kernel | |
| 294 | − module and compile it only when one of the legacy drivers is enabled. | |
| 295 | − | |
| 296 | −This is mostly done, the only thing left is to split up ``drm_irq.c`` into | |
| 297 | −legacy cruft and the parts needed by modern KMS drivers. | |
| 298 | − | |
| 299 | −Contact: Daniel Vetter | |
| 300 | − | |
| 301 | 265 | Make panic handling work |
| 302 | 266 | ------------------------ |
| 303 | 267 | |
| @@ -396,17 +360,12 @@ converting things over. For modeset tests we also first need a bit of · 92 unmodified lines | ||
| 396 | 360 | infrastructure to use dumb buffers for untiled buffers, to be able to run all |
| 397 | 361 | the non-i915 specific modeset tests. |
| 398 | 362 | |
| 399 | −Contact: Daniel Vetter | |
| 400 | − | |
| 401 | −Create a virtual KMS driver for testing (vkms) | |
| 402 | −---------------------------------------------- | |
| 403 | − | |
| 404 | −With all the latest helpers it should be fairly simple to create a virtual KMS | |
| 405 | −driver useful for testing, or for running X or similar on headless machines | |
| 406 | −(to be able to still use the GPU). This would be similar to vgem, but aimed at | |
| 407 | −the modeset side. | |
| 363 | +Extend virtual test driver (VKMS) | |
| 364 | +--------------------------------- | |
| 408 | 365 | |
| 409 | −Once the basics are there there's tons of possibilities to extend it. | |
| 366 | +See the documentation of :ref:`VKMS <vkms>` for more details. This is an ideal | |
| 367 | +internship task, since it only requires a virtual machine and can be sized to | |
| 368 | +fit the available time. | |
| 410 | 369 | |
| 411 | 370 | Contact: Daniel Vetter |
| 412 | 371 | |
| @@ -0,0 +1,24 @@ | ||
| 1 | +.. _vkms: | |
| 2 | + | |
| 3 | +========================================== | |
| 4 | + drm/vkms Virtual Kernel Modesetting | |
| 5 | +========================================== | |
| 6 | + | |
| 7 | +.. kernel-doc:: drivers/gpu/drm/vkms/vkms_drv.c | |
| 8 | + :doc: vkms (Virtual Kernel Modesetting) | |
| 9 | + | |
| 10 | +TODO | |
| 11 | +==== | |
| 12 | + | |
| 13 | +CRC API | |
| 14 | +------- | |
| 15 | + | |
| 16 | +- Optimize CRC computation ``compute_crc()`` and plane blending ``blend()`` | |
| 17 | + | |
| 18 | +- Use the alpha value to blend vaddr_src with vaddr_dst instead of | |
| 19 | + overwriting it in ``blend()``. | |
| 20 | + | |
| 21 | +- Add igt test to check cleared alpha value for XRGB plane format. | |
| 22 | + | |
| 23 | +- Add igt test to check extreme alpha values i.e. fully opaque and fully | |
| 24 | + transparent (intermediate values are affected by hw-specific rounding modes). | |
| @@ -272,6 +272,7 @@ Code Seq#(hex) Include File Comments · 271 unmodified lines | ||
| 272 | 272 | 't' 90-91 linux/toshiba.h toshiba and toshiba_acpi SMM |
| 273 | 273 | 'u' 00-1F linux/smb_fs.h gone |
| 274 | 274 | 'u' 20-3F linux/uvcvideo.h USB video class host driver |
| 275 | +'u' 40-4f linux/udmabuf.h userspace dma-buf misc device | |
| 275 | 276 | 'v' 00-1F linux/ext2_fs.h conflict! |
| 276 | 277 | 'v' 00-1F linux/fs.h conflict! |
| 277 | 278 | 'v' 00-0F linux/sonypi.h conflict! |
| @@ -268,6 +268,10 @@ to 1, if the hardware does support retry then either set these counters to · 267 unmodified lines | ||
| 268 | 268 | 0 if the hardware provides no feedback of which errors occurred and how many |
| 269 | 269 | times, or fill in the correct values as reported by the hardware. |
| 270 | 270 | |
| 271 | +Be aware that calling these functions can immediately start a new transmit | |
| 272 | +if there is one pending in the queue. So make sure that the hardware is in | |
| 273 | +a state where new transmits can be started *before* calling these functions. | |
| 274 | + | |
| 271 | 275 | The cec_transmit_attempt_done() function is a helper for cases where the |
| 272 | 276 | hardware never retries, so the transmit is always for just a single |
| 273 | 277 | attempt. It will call cec_transmit_done() in turn, filling in 1 for the |
| @@ -262,3 +262,5 @@ in the end provide a way to use driver-specific callbacks. · 261 unmodified lines | ||
| 262 | 262 | .. kernel-doc:: include/media/media-devnode.h |
| 263 | 263 | |
| 264 | 264 | .. kernel-doc:: include/media/media-entity.h |
| 265 | + | |
| 266 | +.. kernel-doc:: include/media/media-request.h | |
| @@ -247,20 +247,28 @@ performed using the :c:func:`v4l2_async_unregister_subdev` call. Subdevices · 246 unmodified lines | ||
| 247 | 247 | registered this way are stored in a global list of subdevices, ready to be |
| 248 | 248 | picked up by bridge drivers. |
| 249 | 249 | |
| 250 | −Bridge drivers in turn have to register a notifier object with an array of | |
| 251 | −subdevice descriptors that the bridge device needs for its operation. This is | |
| 250 | +Bridge drivers in turn have to register a notifier object. This is | |
| 252 | 251 | performed using the :c:func:`v4l2_async_notifier_register` call. To |
| 253 | 252 | unregister the notifier the driver has to call |
| 254 | 253 | :c:func:`v4l2_async_notifier_unregister`. The former of the two functions |
| 255 | −takes two arguments: a pointer to struct :c:type:`v4l2_device` and a pointer to | |
| 256 | −struct :c:type:`v4l2_async_notifier`. The latter contains a pointer to an array | |
| 257 | −of pointers to subdevice descriptors of type struct :c:type:`v4l2_async_subdev` | |
| 258 | −type. The V4L2 core will then use these descriptors to match asynchronously | |
| 259 | −registered | |
| 260 | −subdevices to them. If a match is detected the ``.bound()`` notifier callback | |
| 261 | −is called. After all subdevices have been located the .complete() callback is | |
| 262 | −called. When a subdevice is removed from the system the .unbind() method is | |
| 263 | −called. All three callbacks are optional. | |
| 254 | +takes two arguments: a pointer to struct :c:type:`v4l2_device` and a | |
| 255 | +pointer to struct :c:type:`v4l2_async_notifier`. | |
| 256 | + | |
| 257 | +Before registering the notifier, bridge drivers must do two things: | |
| 258 | +first, the notifier must be initialized using the | |
| 259 | +:c:func:`v4l2_async_notifier_init`. Second, bridge drivers can then | |
| 260 | +begin to form a list of subdevice descriptors that the bridge device | |
| 261 | +needs for its operation. Subdevice descriptors are added to the notifier | |
| 262 | +using the :c:func:`v4l2_async_notifier_add_subdev` call. This function | |
| 263 | +takes two arguments: a pointer to struct :c:type:`v4l2_async_notifier`, | |
| 264 | +and a pointer to the subdevice descripter, which is of type struct | |
| 265 | +:c:type:`v4l2_async_subdev`. | |
| 266 | + | |
| 267 | +The V4L2 core will then use these descriptors to match asynchronously | |
| 268 | +registered subdevices to them. If a match is detected the ``.bound()`` | |
| 269 | +notifier callback is called. After all subdevices have been located the | |
| 270 | +.complete() callback is called. When a subdevice is removed from the | |
| 271 | +system the .unbind() method is called. All three callbacks are optional. | |
| 264 | 272 | |
| 265 | 273 | V4L2 sub-device userspace API |
| 266 | 274 | ----------------------------- |
| @@ -74,4 +74,5 @@ is returned, and the ``errno`` variable is set appropriately: · 73 unmodified lines | ||
| 74 | 74 | The call was interrupted by a signal. |
| 75 | 75 | |
| 76 | 76 | ``EINVAL`` |
| 77 | − The ``nfds`` argument is greater than ``OPEN_MAX``. | |
| 77 | + The ``nfds`` value exceeds the ``RLIMIT_NOFILE`` value. Use | |
| 78 | + ``getrlimit()`` to obtain this value. | |
| @@ -16,10 +16,10 @@ CEC_RECEIVE, CEC_TRANSMIT - Receive or transmit a CEC message · 15 unmodified lines | ||
| 16 | 16 | Synopsis |
| 17 | 17 | ======== |
| 18 | 18 | |
| 19 | −.. c:function:: int ioctl( int fd, CEC_RECEIVE, struct cec_msg *argp ) | |
| 19 | +.. c:function:: int ioctl( int fd, CEC_RECEIVE, struct cec_msg \*argp ) | |
| 20 | 20 | :name: CEC_RECEIVE |
| 21 | 21 | |
| 22 | −.. c:function:: int ioctl( int fd, CEC_TRANSMIT, struct cec_msg *argp ) | |
| 22 | +.. c:function:: int ioctl( int fd, CEC_TRANSMIT, struct cec_msg \*argp ) | |
| 23 | 23 | :name: CEC_TRANSMIT |
| 24 | 24 | |
| 25 | 25 | Arguments |
| @@ -272,6 +272,19 @@ View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV'). · 246 unmodified lines | ||
| 272 | 272 | - The transmit failed after one or more retries. This status bit is |
| 273 | 273 | mutually exclusive with :ref:`CEC_TX_STATUS_OK <CEC-TX-STATUS-OK>`. |
| 274 | 274 | Other bits can still be set to explain which failures were seen. |
| 275 | + * .. _`CEC-TX-STATUS-ABORTED`: | |
| 276 | + | |
| 277 | + - ``CEC_TX_STATUS_ABORTED`` | |
| 278 | + - 0x40 | |
| 279 | + - The transmit was aborted due to an HDMI disconnect, or the adapter | |
| 280 | + was unconfigured, or a transmit was interrupted, or the driver | |
| 281 | + returned an error when attempting to start a transmit. | |
| 282 | + * .. _`CEC-TX-STATUS-TIMEOUT`: | |
| 283 | + | |
| 284 | + - ``CEC_TX_STATUS_TIMEOUT`` | |
| 285 | + - 0x80 | |
| 286 | + - The transmit timed out. This should not normally happen and this | |
| 287 | + indicates a driver problem. | |
| 275 | 288 | |
| 276 | 289 | |
| 277 | 290 | .. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}| |
| @@ -300,6 +313,14 @@ View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV'). · 22 unmodified lines | ||
| 300 | 313 | - The message was received successfully but the reply was |
| 301 | 314 | ``CEC_MSG_FEATURE_ABORT``. This status is only set if this message |
| 302 | 315 | was the reply to an earlier transmitted message. |
| 316 | + * .. _`CEC-RX-STATUS-ABORTED`: | |
| 317 | + | |
| 318 | + - ``CEC_RX_STATUS_ABORTED`` | |
| 319 | + - 0x08 | |
| 320 | + - The wait for a reply to an earlier transmitted message was aborted | |
| 321 | + because the HDMI cable was disconnected, the adapter was unconfigured | |
| 322 | + or the :ref:`CEC_TRANSMIT <CEC_RECEIVE>` that waited for a | |
| 323 | + reply was interrupted. | |
| 303 | 324 | |
| 304 | 325 | |
| 305 | 326 | |
| @@ -21,6 +21,7 @@ Part IV - Media Controller API · 20 unmodified lines | ||
| 21 | 21 | media-controller-intro |
| 22 | 22 | media-controller-model |
| 23 | 23 | media-types |
| 24 | + request-api | |
| 24 | 25 | media-funcs |
| 25 | 26 | media-header |
| 26 | 27 | |
| @@ -16,3 +16,9 @@ Function Reference · 15 unmodified lines | ||
| 16 | 16 | media-ioc-enum-entities |
| 17 | 17 | media-ioc-enum-links |
| 18 | 18 | media-ioc-setup-link |
| 19 | + media-ioc-request-alloc | |
| 20 | + request-func-close | |
| 21 | + request-func-ioctl | |
| 22 | + request-func-poll | |
| 23 | + media-request-ioc-queue | |
| 24 | + media-request-ioc-reinit | |
| @@ -26,6 +26,7 @@ Arguments · 25 unmodified lines | ||
| 26 | 26 | File descriptor returned by :ref:`open() <media-func-open>`. |
| 27 | 27 | |
| 28 | 28 | ``argp`` |
| 29 | + Pointer to struct :c:type:`media_device_info`. | |
| 29 | 30 | |
| 30 | 31 | |
| 31 | 32 | Description |
| @@ -26,6 +26,7 @@ Arguments · 25 unmodified lines | ||
| 26 | 26 | File descriptor returned by :ref:`open() <media-func-open>`. |
| 27 | 27 | |
| 28 | 28 | ``argp`` |
| 29 | + Pointer to struct :c:type:`media_entity_desc`. | |
| 29 | 30 | |
| 30 | 31 | |
| 31 | 32 | Description |
| @@ -26,6 +26,7 @@ Arguments · 25 unmodified lines | ||
| 26 | 26 | File descriptor returned by :ref:`open() <media-func-open>`. |
| 27 | 27 | |
| 28 | 28 | ``argp`` |
| 29 | + Pointer to struct :c:type:`media_links_enum`. | |
| 29 | 30 | |
| 30 | 31 | |
| 31 | 32 | Description |
| @@ -26,6 +26,7 @@ Arguments · 25 unmodified lines | ||
| 26 | 26 | File descriptor returned by :ref:`open() <media-func-open>`. |
| 27 | 27 | |
| 28 | 28 | ``argp`` |
| 29 | + Pointer to struct :c:type:`media_v2_topology`. | |
| 29 | 30 | |
| 30 | 31 | |
| 31 | 32 | Description |
| @@ -0,0 +1,66 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections | |
| 2 | + | |
| 3 | +.. _media_ioc_request_alloc: | |
| 4 | + | |
| 5 | +***************************** | |
| 6 | +ioctl MEDIA_IOC_REQUEST_ALLOC | |
| 7 | +***************************** | |
| 8 | + | |
| 9 | +Name | |
| 10 | +==== | |
| 11 | + | |
| 12 | +MEDIA_IOC_REQUEST_ALLOC - Allocate a request | |
| 13 | + | |
| 14 | + | |
| 15 | +Synopsis | |
| 16 | +======== | |
| 17 | + | |
| 18 | +.. c:function:: int ioctl( int fd, MEDIA_IOC_REQUEST_ALLOC, int *argp ) | |
| 19 | + :name: MEDIA_IOC_REQUEST_ALLOC | |
| 20 | + | |
| 21 | + | |
| 22 | +Arguments | |
| 23 | +========= | |
| 24 | + | |
| 25 | +``fd`` | |
| 26 | + File descriptor returned by :ref:`open() <media-func-open>`. | |
| 27 | + | |
| 28 | +``argp`` | |
| 29 | + Pointer to an integer. | |
| 30 | + | |
| 31 | + | |
| 32 | +Description | |
| 33 | +=========== | |
| 34 | + | |
| 35 | +If the media device supports :ref:`requests <media-request-api>`, then | |
| 36 | +this ioctl can be used to allocate a request. If it is not supported, then | |
| 37 | +``errno`` is set to ``ENOTTY``. A request is accessed through a file descriptor | |
| 38 | +that is returned in ``*argp``. | |
| 39 | + | |
| 40 | +If the request was successfully allocated, then the request file descriptor | |
| 41 | +can be passed to the :ref:`VIDIOC_QBUF <VIDIOC_QBUF>`, | |
| 42 | +:ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`, | |
| 43 | +:ref:`VIDIOC_S_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` and | |
| 44 | +:ref:`VIDIOC_TRY_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` ioctls. | |
| 45 | + | |
| 46 | +In addition, the request can be queued by calling | |
| 47 | +:ref:`MEDIA_REQUEST_IOC_QUEUE` and re-initialized by calling | |
| 48 | +:ref:`MEDIA_REQUEST_IOC_REINIT`. | |
| 49 | + | |
| 50 | +Finally, the file descriptor can be :ref:`polled <request-func-poll>` to wait | |
| 51 | +for the request to complete. | |
| 52 | + | |
| 53 | +The request will remain allocated until all the file descriptors associated | |
| 54 | +with it are closed by :ref:`close() <request-func-close>` and the driver no | |
| 55 | +longer uses the request internally. See also | |
| 56 | +:ref:`here <media-request-life-time>` for more information. | |
| 57 | + | |
| 58 | +Return Value | |
| 59 | +============ | |
| 60 | + | |
| 61 | +On success 0 is returned, on error -1 and the ``errno`` variable is set | |
| 62 | +appropriately. The generic error codes are described at the | |
| 63 | +:ref:`Generic Error Codes <gen-errors>` chapter. | |
| 64 | + | |
| 65 | +ENOTTY | |
| 66 | + The driver has no support for requests. | |
| @@ -26,6 +26,7 @@ Arguments · 25 unmodified lines | ||
| 26 | 26 | File descriptor returned by :ref:`open() <media-func-open>`. |
| 27 | 27 | |
| 28 | 28 | ``argp`` |
| 29 | + Pointer to struct :c:type:`media_link_desc`. | |
| 29 | 30 | |
| 30 | 31 | |
| 31 | 32 | Description |
| @@ -0,0 +1,78 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections | |
| 2 | + | |
| 3 | +.. _media_request_ioc_queue: | |
| 4 | + | |
| 5 | +***************************** | |
| 6 | +ioctl MEDIA_REQUEST_IOC_QUEUE | |
| 7 | +***************************** | |
| 8 | + | |
| 9 | +Name | |
| 10 | +==== | |
| 11 | + | |
| 12 | +MEDIA_REQUEST_IOC_QUEUE - Queue a request | |
| 13 | + | |
| 14 | + | |
| 15 | +Synopsis | |
| 16 | +======== | |
| 17 | + | |
| 18 | +.. c:function:: int ioctl( int request_fd, MEDIA_REQUEST_IOC_QUEUE ) | |
| 19 | + :name: MEDIA_REQUEST_IOC_QUEUE | |
| 20 | + | |
| 21 | + | |
| 22 | +Arguments | |
| 23 | +========= | |
| 24 | + | |
| 25 | +``request_fd`` | |
| 26 | + File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`. | |
| 27 | + | |
| 28 | + | |
| 29 | +Description | |
| 30 | +=========== | |
| 31 | + | |
| 32 | +If the media device supports :ref:`requests <media-request-api>`, then | |
| 33 | +this request ioctl can be used to queue a previously allocated request. | |
| 34 | + | |
| 35 | +If the request was successfully queued, then the file descriptor can be | |
| 36 | +:ref:`polled <request-func-poll>` to wait for the request to complete. | |
| 37 | + | |
| 38 | +If the request was already queued before, then ``EBUSY`` is returned. | |
| 39 | +Other errors can be returned if the contents of the request contained | |
| 40 | +invalid or inconsistent data, see the next section for a list of | |
| 41 | +common error codes. On error both the request and driver state are unchanged. | |
| 42 | + | |
| 43 | +Once a request is queued, then the driver is required to gracefully handle | |
| 44 | +errors that occur when the request is applied to the hardware. The | |
| 45 | +exception is the ``EIO`` error which signals a fatal error that requires | |
| 46 | +the application to stop streaming to reset the hardware state. | |
| 47 | + | |
| 48 | +It is not allowed to mix queuing requests with queuing buffers directly | |
| 49 | +(without a request). ``EBUSY`` will be returned if the first buffer was | |
| 50 | +queued directly and you next try to queue a request, or vice versa. | |
| 51 | + | |
| 52 | +A request must contain at least one buffer, otherwise this ioctl will | |
| 53 | +return an ``ENOENT`` error. | |
| 54 | + | |
| 55 | +Return Value | |
| 56 | +============ | |
| 57 | + | |
| 58 | +On success 0 is returned, on error -1 and the ``errno`` variable is set | |
| 59 | +appropriately. The generic error codes are described at the | |
| 60 | +:ref:`Generic Error Codes <gen-errors>` chapter. | |
| 61 | + | |
| 62 | +EBUSY | |
| 63 | + The request was already queued or the application queued the first | |
| 64 | + buffer directly, but later attempted to use a request. It is not permitted | |
| 65 | + to mix the two APIs. | |
| 66 | +ENOENT | |
| 67 | + The request did not contain any buffers. All requests are required | |
| 68 | + to have at least one buffer. This can also be returned if some required | |
| 69 | + configuration is missing in the request. | |
| 70 | +ENOMEM | |
| 71 | + Out of memory when allocating internal data structures for this | |
| 72 | + request. | |
| 73 | +EINVAL | |
| 74 | + The request has invalid data. | |
| 75 | +EIO | |
| 76 | + The hardware is in a bad state. To recover, the application needs to | |
| 77 | + stop streaming to reset the hardware state and then try to restart | |
| 78 | + streaming. | |
| @@ -0,0 +1,51 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections | |
| 2 | + | |
| 3 | +.. _media_request_ioc_reinit: | |
| 4 | + | |
| 5 | +****************************** | |
| 6 | +ioctl MEDIA_REQUEST_IOC_REINIT | |
| 7 | +****************************** | |
| 8 | + | |
| 9 | +Name | |
| 10 | +==== | |
| 11 | + | |
| 12 | +MEDIA_REQUEST_IOC_REINIT - Re-initialize a request | |
| 13 | + | |
| 14 | + | |
| 15 | +Synopsis | |
| 16 | +======== | |
| 17 | + | |
| 18 | +.. c:function:: int ioctl( int request_fd, MEDIA_REQUEST_IOC_REINIT ) | |
| 19 | + :name: MEDIA_REQUEST_IOC_REINIT | |
| 20 | + | |
| 21 | + | |
| 22 | +Arguments | |
| 23 | +========= | |
| 24 | + | |
| 25 | +``request_fd`` | |
| 26 | + File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`. | |
| 27 | + | |
| 28 | +Description | |
| 29 | +=========== | |
| 30 | + | |
| 31 | +If the media device supports :ref:`requests <media-request-api>`, then | |
| 32 | +this request ioctl can be used to re-initialize a previously allocated | |
| 33 | +request. | |
| 34 | + | |
| 35 | +Re-initializing a request will clear any existing data from the request. | |
| 36 | +This avoids having to :ref:`close() <request-func-close>` a completed | |
| 37 | +request and allocate a new request. Instead the completed request can just | |
| 38 | +be re-initialized and it is ready to be used again. | |
| 39 | + | |
| 40 | +A request can only be re-initialized if it either has not been queued | |
| 41 | +yet, or if it was queued and completed. Otherwise it will set ``errno`` | |
| 42 | +to ``EBUSY``. No other error codes can be returned. | |
| 43 | + | |
| 44 | +Return Value | |
| 45 | +============ | |
| 46 | + | |
| 47 | +On success 0 is returned, on error -1 and the ``errno`` variable is set | |
| 48 | +appropriately. | |
| 49 | + | |
| 50 | +EBUSY | |
| 51 | + The request is queued but not yet completed. | |
| @@ -0,0 +1,252 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections | |
| 2 | + | |
| 3 | +.. _media-request-api: | |
| 4 | + | |
| 5 | +Request API | |
| 6 | +=========== | |
| 7 | + | |
| 8 | +The Request API has been designed to allow V4L2 to deal with requirements of | |
| 9 | +modern devices (stateless codecs, complex camera pipelines, ...) and APIs | |
| 10 | +(Android Codec v2). One such requirement is the ability for devices belonging to | |
| 11 | +the same pipeline to reconfigure and collaborate closely on a per-frame basis. | |
| 12 | +Another is support of stateless codecs, which require controls to be applied | |
| 13 | +to specific frames (aka 'per-frame controls') in order to be used efficiently. | |
| 14 | + | |
| 15 | +While the initial use-case was V4L2, it can be extended to other subsystems | |
| 16 | +as well, as long as they use the media controller. | |
| 17 | + | |
| 18 | +Supporting these features without the Request API is not always possible and if | |
| 19 | +it is, it is terribly inefficient: user-space would have to flush all activity | |
| 20 | +on the media pipeline, reconfigure it for the next frame, queue the buffers to | |
| 21 | +be processed with that configuration, and wait until they are all available for | |
| 22 | +dequeuing before considering the next frame. This defeats the purpose of having | |
| 23 | +buffer queues since in practice only one buffer would be queued at a time. | |
| 24 | + | |
| 25 | +The Request API allows a specific configuration of the pipeline (media | |
| 26 | +controller topology + configuration for each media entity) to be associated with | |
| 27 | +specific buffers. This allows user-space to schedule several tasks ("requests") | |
| 28 | +with different configurations in advance, knowing that the configuration will be | |
| 29 | +applied when needed to get the expected result. Configuration values at the time | |
| 30 | +of request completion are also available for reading. | |
| 31 | + | |
| 32 | +Usage | |
| 33 | +===== | |
| 34 | + | |
| 35 | +The Request API extends the Media Controller API and cooperates with | |
| 36 | +subsystem-specific APIs to support request usage. At the Media Controller | |
| 37 | +level, requests are allocated from the supporting Media Controller device | |
| 38 | +node. Their life cycle is then managed through the request file descriptors in | |
| 39 | +an opaque way. Configuration data, buffer handles and processing results | |
| 40 | +stored in requests are accessed through subsystem-specific APIs extended for | |
| 41 | +request support, such as V4L2 APIs that take an explicit ``request_fd`` | |
| 42 | +parameter. | |
| 43 | + | |
| 44 | +Request Allocation | |
| 45 | +------------------ | |
| 46 | + | |
| 47 | +User-space allocates requests using :ref:`MEDIA_IOC_REQUEST_ALLOC` | |
| 48 | +for the media device node. This returns a file descriptor representing the | |
| 49 | +request. Typically, several such requests will be allocated. | |
| 50 | + | |
| 51 | +Request Preparation | |
| 52 | +------------------- | |
| 53 | + | |
| 54 | +Standard V4L2 ioctls can then receive a request file descriptor to express the | |
| 55 | +fact that the ioctl is part of said request, and is not to be applied | |
| 56 | +immediately. See :ref:`MEDIA_IOC_REQUEST_ALLOC` for a list of ioctls that | |
| 57 | +support this. Configurations set with a ``request_fd`` parameter are stored | |
| 58 | +instead of being immediately applied, and buffers queued to a request do not | |
| 59 | +enter the regular buffer queue until the request itself is queued. | |
| 60 | + | |
| 61 | +Request Submission | |
| 62 | +------------------ | |
| 63 | + | |
| 64 | +Once the configuration and buffers of the request are specified, it can be | |
| 65 | +queued by calling :ref:`MEDIA_REQUEST_IOC_QUEUE` on the request file descriptor. | |
| 66 | +A request must contain at least one buffer, otherwise ``ENOENT`` is returned. | |
| 67 | +A queued request cannot be modified anymore. | |
| 68 | + | |
| 69 | +.. caution:: | |
| 70 | + For :ref:`memory-to-memory devices <codec>` you can use requests only for | |
| 71 | + output buffers, not for capture buffers. Attempting to add a capture buffer | |
| 72 | + to a request will result in an ``EACCES`` error. | |
| 73 | + | |
| 74 | +If the request contains configurations for multiple entities, individual drivers | |
| 75 | +may synchronize so the requested pipeline's topology is applied before the | |
| 76 | +buffers are processed. Media controller drivers do a best effort implementation | |
| 77 | +since perfect atomicity may not be possible due to hardware limitations. | |
| 78 | + | |
| 79 | +.. caution:: | |
| 80 | + | |
| 81 | + It is not allowed to mix queuing requests with directly queuing buffers: | |
| 82 | + whichever method is used first locks this in place until | |
| 83 | + :ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>` is called or the device is | |
| 84 | + :ref:`closed <func-close>`. Attempts to directly queue a buffer when earlier | |
| 85 | + a buffer was queued via a request or vice versa will result in an ``EBUSY`` | |
| 86 | + error. | |
| 87 | + | |
| 88 | +Controls can still be set without a request and are applied immediately, | |
| 89 | +regardless of whether a request is in use or not. | |
| 90 | + | |
| 91 | +.. caution:: | |
| 92 | + | |
| 93 | + Setting the same control through a request and also directly can lead to | |
| 94 | + undefined behavior! | |
| 95 | + | |
| 96 | +User-space can :ref:`poll() <request-func-poll>` a request file descriptor in | |
| 97 | +order to wait until the request completes. A request is considered complete | |
| 98 | +once all its associated buffers are available for dequeuing and all the | |
| 99 | +associated controls have been updated with the values at the time of completion. | |
| 100 | +Note that user-space does not need to wait for the request to complete to | |
| 101 | +dequeue its buffers: buffers that are available halfway through a request can | |
| 102 | +be dequeued independently of the request's state. | |
| 103 | + | |
| 104 | +A completed request contains the state of the device after the request was | |
| 105 | +executed. User-space can query that state by calling | |
| 106 | +:ref:`ioctl VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` with the request file | |
| 107 | +descriptor. Calling :ref:`ioctl VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` for a | |
| 108 | +request that has been queued but not yet completed will return ``EBUSY`` | |
| 109 | +since the control values might be changed at any time by the driver while the | |
| 110 | +request is in flight. | |
| 111 | + | |
| 112 | +.. _media-request-life-time: | |
| 113 | + | |
| 114 | +Recycling and Destruction | |
| 115 | +------------------------- | |
| 116 | + | |
| 117 | +Finally, a completed request can either be discarded or be reused. Calling | |
| 118 | +:ref:`close() <request-func-close>` on a request file descriptor will make | |
| 119 | +that file descriptor unusable and the request will be freed once it is no | |
| 120 | +longer in use by the kernel. That is, if the request is queued and then the | |
| 121 | +file descriptor is closed, then it won't be freed until the driver completed | |
| 122 | +the request. | |
| 123 | + | |
| 124 | +The :ref:`MEDIA_REQUEST_IOC_REINIT` will clear a request's state and make it | |
| 125 | +available again. No state is retained by this operation: the request is as | |
| 126 | +if it had just been allocated. | |
| 127 | + | |
| 128 | +Example for a Codec Device | |
| 129 | +-------------------------- | |
| 130 | + | |
| 131 | +For use-cases such as :ref:`codecs <codec>`, the request API can be used | |
| 132 | +to associate specific controls to | |
| 133 | +be applied by the driver for the OUTPUT buffer, allowing user-space | |
| 134 | +to queue many such buffers in advance. It can also take advantage of requests' | |
| 135 | +ability to capture the state of controls when the request completes to read back | |
| 136 | +information that may be subject to change. | |
| 137 | + | |
| 138 | +Put into code, after obtaining a request, user-space can assign controls and one | |
| 139 | +OUTPUT buffer to it: | |
| 140 | + | |
| 141 | +.. code-block:: c | |
| 142 | + | |
| 143 | + struct v4l2_buffer buf; | |
| 144 | + struct v4l2_ext_controls ctrls; | |
| 145 | + int req_fd; | |
| 146 | + ... | |
| 147 | + if (ioctl(media_fd, MEDIA_IOC_REQUEST_ALLOC, &req_fd)) | |
| 148 | + return errno; | |
| 149 | + ... | |
| 150 | + ctrls.which = V4L2_CTRL_WHICH_REQUEST_VAL; | |
| 151 | + ctrls.request_fd = req_fd; | |
| 152 | + if (ioctl(codec_fd, VIDIOC_S_EXT_CTRLS, &ctrls)) | |
| 153 | + return errno; | |
| 154 | + ... | |
| 155 | + buf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT; | |
| 156 | + buf.flags |= V4L2_BUF_FLAG_REQUEST_FD; | |
| 157 | + buf.request_fd = req_fd; | |
| 158 | + if (ioctl(codec_fd, VIDIOC_QBUF, &buf)) | |
| 159 | + return errno; | |
| 160 | + | |
| 161 | +Note that it is not allowed to use the Request API for CAPTURE buffers | |
| 162 | +since there are no per-frame settings to report there. | |
| 163 | + | |
| 164 | +Once the request is fully prepared, it can be queued to the driver: | |
| 165 | + | |
| 166 | +.. code-block:: c | |
| 167 | + | |
| 168 | + if (ioctl(req_fd, MEDIA_REQUEST_IOC_QUEUE)) | |
| 169 | + return errno; | |
| 170 | + | |
| 171 | +User-space can then either wait for the request to complete by calling poll() on | |
| 172 | +its file descriptor, or start dequeuing CAPTURE buffers. Most likely, it will | |
| 173 | +want to get CAPTURE buffers as soon as possible and this can be done using a | |
| 174 | +regular :ref:`VIDIOC_DQBUF <VIDIOC_QBUF>`: | |
| 175 | + | |
| 176 | +.. code-block:: c | |
| 177 | + | |
| 178 | + struct v4l2_buffer buf; | |
| 179 | + | |
| 180 | + memset(&buf, 0, sizeof(buf)); | |
| 181 | + buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
| 182 | + if (ioctl(codec_fd, VIDIOC_DQBUF, &buf)) | |
| 183 | + return errno; | |
| 184 | + | |
| 185 | +Note that this example assumes for simplicity that for every OUTPUT buffer | |
| 186 | +there will be one CAPTURE buffer, but this does not have to be the case. | |
| 187 | + | |
| 188 | +We can then, after ensuring that the request is completed via polling the | |
| 189 | +request file descriptor, query control values at the time of its completion via | |
| 190 | +a call to :ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`. | |
| 191 | +This is particularly useful for volatile controls for which we want to | |
| 192 | +query values as soon as the capture buffer is produced. | |
| 193 | + | |
| 194 | +.. code-block:: c | |
| 195 | + | |
| 196 | + struct pollfd pfd = { .events = POLLPRI, .fd = req_fd }; | |
| 197 | + poll(&pfd, 1, -1); | |
| 198 | + ... | |
| 199 | + ctrls.which = V4L2_CTRL_WHICH_REQUEST_VAL; | |
| 200 | + ctrls.request_fd = req_fd; | |
| 201 | + if (ioctl(codec_fd, VIDIOC_G_EXT_CTRLS, &ctrls)) | |
| 202 | + return errno; | |
| 203 | + | |
| 204 | +Once we don't need the request anymore, we can either recycle it for reuse with | |
| 205 | +:ref:`MEDIA_REQUEST_IOC_REINIT`... | |
| 206 | + | |
| 207 | +.. code-block:: c | |
| 208 | + | |
| 209 | + if (ioctl(req_fd, MEDIA_REQUEST_IOC_REINIT)) | |
| 210 | + return errno; | |
| 211 | + | |
| 212 | +... or close its file descriptor to completely dispose of it. | |
| 213 | + | |
| 214 | +.. code-block:: c | |
| 215 | + | |
| 216 | + close(req_fd); | |
| 217 | + | |
| 218 | +Example for a Simple Capture Device | |
| 219 | +----------------------------------- | |
| 220 | + | |
| 221 | +With a simple capture device, requests can be used to specify controls to apply | |
| 222 | +for a given CAPTURE buffer. | |
| 223 | + | |
| 224 | +.. code-block:: c | |
| 225 | + | |
| 226 | + struct v4l2_buffer buf; | |
| 227 | + struct v4l2_ext_controls ctrls; | |
| 228 | + int req_fd; | |
| 229 | + ... | |
| 230 | + if (ioctl(media_fd, MEDIA_IOC_REQUEST_ALLOC, &req_fd)) | |
| 231 | + return errno; | |
| 232 | + ... | |
| 233 | + ctrls.which = V4L2_CTRL_WHICH_REQUEST_VAL; | |
| 234 | + ctrls.request_fd = req_fd; | |
| 235 | + if (ioctl(camera_fd, VIDIOC_S_EXT_CTRLS, &ctrls)) | |
| 236 | + return errno; | |
| 237 | + ... | |
| 238 | + buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
| 239 | + buf.flags |= V4L2_BUF_FLAG_REQUEST_FD; | |
| 240 | + buf.request_fd = req_fd; | |
| 241 | + if (ioctl(camera_fd, VIDIOC_QBUF, &buf)) | |
| 242 | + return errno; | |
| 243 | + | |
| 244 | +Once the request is fully prepared, it can be queued to the driver: | |
| 245 | + | |
| 246 | +.. code-block:: c | |
| 247 | + | |
| 248 | + if (ioctl(req_fd, MEDIA_REQUEST_IOC_QUEUE)) | |
| 249 | + return errno; | |
| 250 | + | |
| 251 | +User-space can then dequeue buffers, wait for the request completion, query | |
| 252 | +controls and recycle the request as in the M2M example above. | |
| @@ -0,0 +1,49 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections | |
| 2 | + | |
| 3 | +.. _request-func-close: | |
| 4 | + | |
| 5 | +*************** | |
| 6 | +request close() | |
| 7 | +*************** | |
| 8 | + | |
| 9 | +Name | |
| 10 | +==== | |
| 11 | + | |
| 12 | +request-close - Close a request file descriptor | |
| 13 | + | |
| 14 | + | |
| 15 | +Synopsis | |
| 16 | +======== | |
| 17 | + | |
| 18 | +.. code-block:: c | |
| 19 | + | |
| 20 | + #include <unistd.h> | |
| 21 | + | |
| 22 | + | |
| 23 | +.. c:function:: int close( int fd ) | |
| 24 | + :name: req-close | |
| 25 | + | |
| 26 | +Arguments | |
| 27 | +========= | |
| 28 | + | |
| 29 | +``fd`` | |
| 30 | + File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`. | |
| 31 | + | |
| 32 | + | |
| 33 | +Description | |
| 34 | +=========== | |
| 35 | + | |
| 36 | +Closes the request file descriptor. Resources associated with the request | |
| 37 | +are freed once all file descriptors associated with the request are closed | |
| 38 | +and the driver has completed the request. | |
| 39 | +See :ref:`here <media-request-life-time>` for more information. | |
| 40 | + | |
| 41 | + | |
| 42 | +Return Value | |
| 43 | +============ | |
| 44 | + | |
| 45 | +:ref:`close() <request-func-close>` returns 0 on success. On error, -1 is | |
| 46 | +returned, and ``errno`` is set appropriately. Possible error codes are: | |
| 47 | + | |
| 48 | +EBADF | |
| 49 | + ``fd`` is not a valid open file descriptor. | |
| @@ -0,0 +1,67 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections | |
| 2 | + | |
| 3 | +.. _request-func-ioctl: | |
| 4 | + | |
| 5 | +*************** | |
| 6 | +request ioctl() | |
| 7 | +*************** | |
| 8 | + | |
| 9 | +Name | |
| 10 | +==== | |
| 11 | + | |
| 12 | +request-ioctl - Control a request file descriptor | |
| 13 | + | |
| 14 | + | |
| 15 | +Synopsis | |
| 16 | +======== | |
| 17 | + | |
| 18 | +.. code-block:: c | |
| 19 | + | |
| 20 | + #include <sys/ioctl.h> | |
| 21 | + | |
| 22 | + | |
| 23 | +.. c:function:: int ioctl( int fd, int cmd, void *argp ) | |
| 24 | + :name: req-ioctl | |
| 25 | + | |
| 26 | +Arguments | |
| 27 | +========= | |
| 28 | + | |
| 29 | +``fd`` | |
| 30 | + File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`. | |
| 31 | + | |
| 32 | +``cmd`` | |
| 33 | + The request ioctl command code as defined in the media.h header file, for | |
| 34 | + example :ref:`MEDIA_REQUEST_IOC_QUEUE`. | |
| 35 | + | |
| 36 | +``argp`` | |
| 37 | + Pointer to a request-specific structure. | |
| 38 | + | |
| 39 | + | |
| 40 | +Description | |
| 41 | +=========== | |
| 42 | + | |
| 43 | +The :ref:`ioctl() <request-func-ioctl>` function manipulates request | |
| 44 | +parameters. The argument ``fd`` must be an open file descriptor. | |
| 45 | + | |
| 46 | +The ioctl ``cmd`` code specifies the request function to be called. It | |
| 47 | +has encoded in it whether the argument is an input, output or read/write | |
| 48 | +parameter, and the size of the argument ``argp`` in bytes. | |
| 49 | + | |
| 50 | +Macros and structures definitions specifying request ioctl commands and | |
| 51 | +their parameters are located in the media.h header file. All request ioctl | |
| 52 | +commands, their respective function and parameters are specified in | |
| 53 | +:ref:`media-user-func`. | |
| 54 | + | |
| 55 | + | |
| 56 | +Return Value | |
| 57 | +============ | |
| 58 | + | |
| 59 | +On success 0 is returned, on error -1 and the ``errno`` variable is set | |
| 60 | +appropriately. The generic error codes are described at the | |
| 61 | +:ref:`Generic Error Codes <gen-errors>` chapter. | |
| 62 | + | |
| 63 | +Command-specific error codes are listed in the individual command | |
| 64 | +descriptions. | |
| 65 | + | |
| 66 | +When an ioctl that takes an output or read/write parameter fails, the | |
| 67 | +parameter remains unmodified. | |
| @@ -0,0 +1,77 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections | |
| 2 | + | |
| 3 | +.. _request-func-poll: | |
| 4 | + | |
| 5 | +************** | |
| 6 | +request poll() | |
| 7 | +************** | |
| 8 | + | |
| 9 | +Name | |
| 10 | +==== | |
| 11 | + | |
| 12 | +request-poll - Wait for some event on a file descriptor | |
| 13 | + | |
| 14 | + | |
| 15 | +Synopsis | |
| 16 | +======== | |
| 17 | + | |
| 18 | +.. code-block:: c | |
| 19 | + | |
| 20 | + #include <sys/poll.h> | |
| 21 | + | |
| 22 | + | |
| 23 | +.. c:function:: int poll( struct pollfd *ufds, unsigned int nfds, int timeout ) | |
| 24 | + :name: request-poll | |
| 25 | + | |
| 26 | +Arguments | |
| 27 | +========= | |
| 28 | + | |
| 29 | +``ufds`` | |
| 30 | + List of file descriptor events to be watched | |
| 31 | + | |
| 32 | +``nfds`` | |
| 33 | + Number of file descriptor events at the \*ufds array | |
| 34 | + | |
| 35 | +``timeout`` | |
| 36 | + Timeout to wait for events | |
| 37 | + | |
| 38 | + | |
| 39 | +Description | |
| 40 | +=========== | |
| 41 | + | |
| 42 | +With the :c:func:`poll() <request-func-poll>` function applications can wait | |
| 43 | +for a request to complete. | |
| 44 | + | |
| 45 | +On success :c:func:`poll() <request-func-poll>` returns the number of file | |
| 46 | +descriptors that have been selected (that is, file descriptors for which the | |
| 47 | +``revents`` field of the respective struct :c:type:`pollfd` | |
| 48 | +is non-zero). Request file descriptor set the ``POLLPRI`` flag in ``revents`` | |
| 49 | +when the request was completed. When the function times out it returns | |
| 50 | +a value of zero, on failure it returns -1 and the ``errno`` variable is | |
| 51 | +set appropriately. | |
| 52 | + | |
| 53 | +Attempting to poll for a request that is not yet queued will | |
| 54 | +set the ``POLLERR`` flag in ``revents``. | |
| 55 | + | |
| 56 | + | |
| 57 | +Return Value | |
| 58 | +============ | |
| 59 | + | |
| 60 | +On success, :c:func:`poll() <request-func-poll>` returns the number of | |
| 61 | +structures which have non-zero ``revents`` fields, or zero if the call | |
| 62 | +timed out. On error -1 is returned, and the ``errno`` variable is set | |
| 63 | +appropriately: | |
| 64 | + | |
| 65 | +``EBADF`` | |
| 66 | + One or more of the ``ufds`` members specify an invalid file | |
| 67 | + descriptor. | |
| 68 | + | |
| 69 | +``EFAULT`` | |
| 70 | + ``ufds`` references an inaccessible memory area. | |
| 71 | + | |
| 72 | +``EINTR`` | |
| 73 | + The call was interrupted by a signal. | |
| 74 | + | |
| 75 | +``EINVAL`` | |
| 76 | + The ``nfds`` value exceeds the ``RLIMIT_NOFILE`` value. Use | |
| 77 | + ``getrlimit()`` to obtain this value. | |
| @@ -226,16 +226,6 @@ xvYCC · 225 unmodified lines | ||
| 226 | 226 | |
| 227 | 227 | :author: International Electrotechnical Commission (http://www.iec.ch) |
| 228 | 228 | |
| 229 | −.. _adobergb: | |
| 230 | − | |
| 231 | −AdobeRGB | |
| 232 | −======== | |
| 233 | − | |
| 234 | − | |
| 235 | −:title: Adobe© RGB (1998) Color Image Encoding Version 2005-05 | |
| 236 | − | |
| 237 | −:author: Adobe Systems Incorporated (http://www.adobe.com) | |
| 238 | − | |
| 239 | 229 | .. _oprgb: |
| 240 | 230 | |
| 241 | 231 | opRGB |
| @@ -306,10 +306,23 @@ struct v4l2_buffer · 305 unmodified lines | ||
| 306 | 306 | - A place holder for future extensions. Drivers and applications |
| 307 | 307 | must set this to 0. |
| 308 | 308 | * - __u32 |
| 309 | − - ``reserved`` | |
| 309 | + - ``request_fd`` | |
| 310 | 310 | - |
| 311 | − - A place holder for future extensions. Drivers and applications | |
| 312 | − must set this to 0. | |
| 311 | + - The file descriptor of the request to queue the buffer to. If the flag | |
| 312 | + ``V4L2_BUF_FLAG_REQUEST_FD`` is set, then the buffer will be | |
| 313 | + queued to this request. If the flag is not set, then this field will | |
| 314 | + be ignored. | |
| 315 | + | |
| 316 | + The ``V4L2_BUF_FLAG_REQUEST_FD`` flag and this field are only used by | |
| 317 | + :ref:`ioctl VIDIOC_QBUF <VIDIOC_QBUF>` and ignored by other ioctls that | |
| 318 | + take a :c:type:`v4l2_buffer` as argument. | |
| 319 | + | |
| 320 | + Applications should not set ``V4L2_BUF_FLAG_REQUEST_FD`` for any ioctls | |
| 321 | + other than :ref:`VIDIOC_QBUF <VIDIOC_QBUF>`. | |
| 322 | + | |
| 323 | + If the device does not support requests, then ``EACCES`` will be returned. | |
| 324 | + If requests are supported but an invalid request file descriptor is | |
| 325 | + given, then ``EINVAL`` will be returned. | |
| 313 | 326 | |
| 314 | 327 | |
| 315 | 328 | |
| @@ -514,6 +527,11 @@ Buffer Flags · 198 unmodified lines | ||
| 514 | 527 | streaming may continue as normal and the buffer may be reused |
| 515 | 528 | normally. Drivers set this flag when the ``VIDIOC_DQBUF`` ioctl is |
| 516 | 529 | called. |
| 530 | + * .. _`V4L2-BUF-FLAG-IN-REQUEST`: | |
| 531 | + | |
| 532 | + - ``V4L2_BUF_FLAG_IN_REQUEST`` | |
| 533 | + - 0x00000080 | |
| 534 | + - This buffer is part of a request that hasn't been queued yet. | |
| 517 | 535 | * .. _`V4L2-BUF-FLAG-KEYFRAME`: |
| 518 | 536 | |
| 519 | 537 | - ``V4L2_BUF_FLAG_KEYFRAME`` |
| @@ -589,6 +607,11 @@ Buffer Flags · 69 unmodified lines | ||
| 589 | 607 | the format. Any Any subsequent call to the |
| 590 | 608 | :ref:`VIDIOC_DQBUF <VIDIOC_QBUF>` ioctl will not block anymore, |
| 591 | 609 | but return an ``EPIPE`` error code. |
| 610 | + * .. _`V4L2-BUF-FLAG-REQUEST-FD`: | |
| 611 | + | |
| 612 | + - ``V4L2_BUF_FLAG_REQUEST_FD`` | |
| 613 | + - 0x00800000 | |
| 614 | + - The ``request_fd`` field contains a valid file descriptor. | |
| 592 | 615 | * .. _`V4L2-BUF-FLAG-TIMESTAMP-MASK`: |
| 593 | 616 | |
| 594 | 617 | - ``V4L2_BUF_FLAG_TIMESTAMP_MASK`` |
| @@ -51,8 +51,8 @@ whole range, 0-255, dividing the angular value by 1.41. The enum · 50 unmodified lines | ||
| 51 | 51 | - See :ref:`col-rec709`. |
| 52 | 52 | * - ``V4L2_COLORSPACE_SRGB`` |
| 53 | 53 | - See :ref:`col-srgb`. |
| 54 | − * - ``V4L2_COLORSPACE_ADOBERGB`` | |
| 55 | − - See :ref:`col-adobergb`. | |
| 54 | + * - ``V4L2_COLORSPACE_OPRGB`` | |
| 55 | + - See :ref:`col-oprgb`. | |
| 56 | 56 | * - ``V4L2_COLORSPACE_BT2020`` |
| 57 | 57 | - See :ref:`col-bt2020`. |
| 58 | 58 | * - ``V4L2_COLORSPACE_DCI_P3`` |
| @@ -90,8 +90,8 @@ whole range, 0-255, dividing the angular value by 1.41. The enum · 31 unmodified lines | ||
| 90 | 90 | - Use the Rec. 709 transfer function. |
| 91 | 91 | * - ``V4L2_XFER_FUNC_SRGB`` |
| 92 | 92 | - Use the sRGB transfer function. |
| 93 | − * - ``V4L2_XFER_FUNC_ADOBERGB`` | |
| 94 | − - Use the AdobeRGB transfer function. | |
| 93 | + * - ``V4L2_XFER_FUNC_OPRGB`` | |
| 94 | + - Use the opRGB transfer function. | |
| 95 | 95 | * - ``V4L2_XFER_FUNC_SMPTE240M`` |
| 96 | 96 | - Use the SMPTE 240M transfer function. |
| 97 | 97 | * - ``V4L2_XFER_FUNC_NONE`` |
| @@ -290,15 +290,14 @@ Y' is clamped to the range [0…1] and Cb and Cr are clamped to the range · 289 unmodified lines | ||
| 290 | 290 | 170M/BT.601. The Y'CbCr quantization is limited range. |
| 291 | 291 | |
| 292 | 292 | |
| 293 | −.. _col-adobergb: | |
| 293 | +.. _col-oprgb: | |
| 294 | 294 | |
| 295 | −Colorspace Adobe RGB (V4L2_COLORSPACE_ADOBERGB) | |
| 295 | +Colorspace opRGB (V4L2_COLORSPACE_OPRGB) | |
| 296 | 296 | =============================================== |
| 297 | 297 | |
| 298 | −The :ref:`adobergb` standard defines the colorspace used by computer | |
| 299 | −graphics that use the AdobeRGB colorspace. This is also known as the | |
| 300 | −:ref:`oprgb` standard. The default transfer function is | |
| 301 | −``V4L2_XFER_FUNC_ADOBERGB``. The default Y'CbCr encoding is | |
| 298 | +The :ref:`oprgb` standard defines the colorspace used by computer | |
| 299 | +graphics that use the opRGB colorspace. The default transfer function is | |
| 300 | +``V4L2_XFER_FUNC_OPRGB``. The default Y'CbCr encoding is | |
| 302 | 301 | ``V4L2_YCBCR_ENC_601``. The default Y'CbCr quantization is limited |
| 303 | 302 | range. |
| 304 | 303 | |
| @@ -312,7 +311,7 @@ The chromaticities of the primary colors and the white reference are: · 7 unmodified lines | ||
| 312 | 311 | |
| 313 | 312 | .. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}| |
| 314 | 313 | |
| 315 | −.. flat-table:: Adobe RGB Chromaticities | |
| 314 | +.. flat-table:: opRGB Chromaticities | |
| 316 | 315 | :header-rows: 1 |
| 317 | 316 | :stub-columns: 0 |
| 318 | 317 | :widths: 1 1 2 |
| @@ -1497,6 +1497,182 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - · 1496 unmodified lines | ||
| 1497 | 1497 | |
| 1498 | 1498 | |
| 1499 | 1499 | |
| 1500 | +.. _v4l2-mpeg-mpeg2: | |
| 1501 | + | |
| 1502 | +``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS (struct)`` | |
| 1503 | + Specifies the slice parameters (as extracted from the bitstream) for the | |
| 1504 | + associated MPEG-2 slice data. This includes the necessary parameters for | |
| 1505 | + configuring a stateless hardware decoding pipeline for MPEG-2. | |
| 1506 | + The bitstream parameters are defined according to :ref:`mpeg2part2`. | |
| 1507 | + | |
| 1508 | +.. c:type:: v4l2_ctrl_mpeg2_slice_params | |
| 1509 | + | |
| 1510 | +.. cssclass:: longtable | |
| 1511 | + | |
| 1512 | +.. flat-table:: struct v4l2_ctrl_mpeg2_slice_params | |
| 1513 | + :header-rows: 0 | |
| 1514 | + :stub-columns: 0 | |
| 1515 | + :widths: 1 1 2 | |
| 1516 | + | |
| 1517 | + * - __u32 | |
| 1518 | + - ``bit_size`` | |
| 1519 | + - Size (in bits) of the current slice data. | |
| 1520 | + * - __u32 | |
| 1521 | + - ``data_bit_offset`` | |
| 1522 | + - Offset (in bits) to the video data in the current slice data. | |
| 1523 | + * - struct :c:type:`v4l2_mpeg2_sequence` | |
| 1524 | + - ``sequence`` | |
| 1525 | + - Structure with MPEG-2 sequence metadata, merging relevant fields from | |
| 1526 | + the sequence header and sequence extension parts of the bitstream. | |
| 1527 | + * - struct :c:type:`v4l2_mpeg2_picture` | |
| 1528 | + - ``picture`` | |
| 1529 | + - Structure with MPEG-2 picture metadata, merging relevant fields from | |
| 1530 | + the picture header and picture coding extension parts of the bitstream. | |
| 1531 | + * - __u8 | |
| 1532 | + - ``quantiser_scale_code`` | |
| 1533 | + - Code used to determine the quantization scale to use for the IDCT. | |
| 1534 | + * - __u8 | |
| 1535 | + - ``backward_ref_index`` | |
| 1536 | + - Index for the V4L2 buffer to use as backward reference, used with | |
| 1537 | + B-coded and P-coded frames. | |
| 1538 | + * - __u8 | |
| 1539 | + - ``forward_ref_index`` | |
| 1540 | + - Index for the V4L2 buffer to use as forward reference, used with | |
| 1541 | + B-coded frames. | |
| 1542 | + | |
| 1543 | +.. c:type:: v4l2_mpeg2_sequence | |
| 1544 | + | |
| 1545 | +.. cssclass:: longtable | |
| 1546 | + | |
| 1547 | +.. flat-table:: struct v4l2_mpeg2_sequence | |
| 1548 | + :header-rows: 0 | |
| 1549 | + :stub-columns: 0 | |
| 1550 | + :widths: 1 1 2 | |
| 1551 | + | |
| 1552 | + * - __u16 | |
| 1553 | + - ``horizontal_size`` | |
| 1554 | + - The width of the displayable part of the frame's luminance component. | |
| 1555 | + * - __u16 | |
| 1556 | + - ``vertical_size`` | |
| 1557 | + - The height of the displayable part of the frame's luminance component. | |
| 1558 | + * - __u32 | |
| 1559 | + - ``vbv_buffer_size`` | |
| 1560 | + - Used to calculate the required size of the video buffering verifier, | |
| 1561 | + defined (in bits) as: 16 * 1024 * vbv_buffer_size. | |
| 1562 | + * - __u8 | |
| 1563 | + - ``profile_and_level_indication`` | |
| 1564 | + - The current profile and level indication as extracted from the | |
| 1565 | + bitstream. | |
| 1566 | + * - __u8 | |
| 1567 | + - ``progressive_sequence`` | |
| 1568 | + - Indication that all the frames for the sequence are progressive instead | |
| 1569 | + of interlaced. | |
| 1570 | + * - __u8 | |
| 1571 | + - ``chroma_format`` | |
| 1572 | + - The chrominance sub-sampling format (1: 4:2:0, 2: 4:2:2, 3: 4:4:4). | |
| 1573 | + | |
| 1574 | +.. c:type:: v4l2_mpeg2_picture | |
| 1575 | + | |
| 1576 | +.. cssclass:: longtable | |
| 1577 | + | |
| 1578 | +.. flat-table:: struct v4l2_mpeg2_picture | |
| 1579 | + :header-rows: 0 | |
| 1580 | + :stub-columns: 0 | |
| 1581 | + :widths: 1 1 2 | |
| 1582 | + | |
| 1583 | + * - __u8 | |
| 1584 | + - ``picture_coding_type`` | |
| 1585 | + - Picture coding type for the frame covered by the current slice | |
| 1586 | + (V4L2_MPEG2_PICTURE_CODING_TYPE_I, V4L2_MPEG2_PICTURE_CODING_TYPE_P or | |
| 1587 | + V4L2_MPEG2_PICTURE_CODING_TYPE_B). | |
| 1588 | + * - __u8 | |
| 1589 | + - ``f_code[2][2]`` | |
| 1590 | + - Motion vector codes. | |
| 1591 | + * - __u8 | |
| 1592 | + - ``intra_dc_precision`` | |
| 1593 | + - Precision of Discrete Cosine transform (0: 8 bits precision, | |
| 1594 | + 1: 9 bits precision, 2: 10 bits precision, 3: 11 bits precision). | |
| 1595 | + * - __u8 | |
| 1596 | + - ``picture_structure`` | |
| 1597 | + - Picture structure (1: interlaced top field, 2: interlaced bottom field, | |
| 1598 | + 3: progressive frame). | |
| 1599 | + * - __u8 | |
| 1600 | + - ``top_field_first`` | |
| 1601 | + - If set to 1 and interlaced stream, top field is output first. | |
| 1602 | + * - __u8 | |
| 1603 | + - ``frame_pred_frame_dct`` | |
| 1604 | + - If set to 1, only frame-DCT and frame prediction are used. | |
| 1605 | + * - __u8 | |
| 1606 | + - ``concealment_motion_vectors`` | |
| 1607 | + - If set to 1, motion vectors are coded for intra macroblocks. | |
| 1608 | + * - __u8 | |
| 1609 | + - ``q_scale_type`` | |
| 1610 | + - This flag affects the inverse quantization process. | |
| 1611 | + * - __u8 | |
| 1612 | + - ``intra_vlc_format`` | |
| 1613 | + - This flag affects the decoding of transform coefficient data. | |
| 1614 | + * - __u8 | |
| 1615 | + - ``alternate_scan`` | |
| 1616 | + - This flag affects the decoding of transform coefficient data. | |
| 1617 | + * - __u8 | |
| 1618 | + - ``repeat_first_field`` | |
| 1619 | + - This flag affects the decoding process of progressive frames. | |
| 1620 | + * - __u8 | |
| 1621 | + - ``progressive_frame`` | |
| 1622 | + - Indicates whether the current frame is progressive. | |
| 1623 | + | |
| 1624 | +``V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION (struct)`` | |
| 1625 | + Specifies quantization matrices (as extracted from the bitstream) for the | |
| 1626 | + associated MPEG-2 slice data. | |
| 1627 | + | |
| 1628 | +.. c:type:: v4l2_ctrl_mpeg2_quantization | |
| 1629 | + | |
| 1630 | +.. cssclass:: longtable | |
| 1631 | + | |
| 1632 | +.. flat-table:: struct v4l2_ctrl_mpeg2_quantization | |
| 1633 | + :header-rows: 0 | |
| 1634 | + :stub-columns: 0 | |
| 1635 | + :widths: 1 1 2 | |
| 1636 | + | |
| 1637 | + * - __u8 | |
| 1638 | + - ``load_intra_quantiser_matrix`` | |
| 1639 | + - One bit to indicate whether to load the ``intra_quantiser_matrix`` data. | |
| 1640 | + * - __u8 | |
| 1641 | + - ``load_non_intra_quantiser_matrix`` | |
| 1642 | + - One bit to indicate whether to load the ``non_intra_quantiser_matrix`` | |
| 1643 | + data. | |
| 1644 | + * - __u8 | |
| 1645 | + - ``load_chroma_intra_quantiser_matrix`` | |
| 1646 | + - One bit to indicate whether to load the | |
| 1647 | + ``chroma_intra_quantiser_matrix`` data, only relevant for non-4:2:0 YUV | |
| 1648 | + formats. | |
| 1649 | + * - __u8 | |
| 1650 | + - ``load_chroma_non_intra_quantiser_matrix`` | |
| 1651 | + - One bit to indicate whether to load the | |
| 1652 | + ``chroma_non_intra_quantiser_matrix`` data, only relevant for non-4:2:0 | |
| 1653 | + YUV formats. | |
| 1654 | + * - __u8 | |
| 1655 | + - ``intra_quantiser_matrix[64]`` | |
| 1656 | + - The quantization matrix coefficients for intra-coded frames, in zigzag | |
| 1657 | + scanning order. It is relevant for both luma and chroma components, | |
| 1658 | + although it can be superseded by the chroma-specific matrix for | |
| 1659 | + non-4:2:0 YUV formats. | |
| 1660 | + * - __u8 | |
| 1661 | + - ``non_intra_quantiser_matrix[64]`` | |
| 1662 | + - The quantization matrix coefficients for non-intra-coded frames, in | |
| 1663 | + zigzag scanning order. It is relevant for both luma and chroma | |
| 1664 | + components, although it can be superseded by the chroma-specific matrix | |
| 1665 | + for non-4:2:0 YUV formats. | |
| 1666 | + * - __u8 | |
| 1667 | + - ``chroma_intra_quantiser_matrix[64]`` | |
| 1668 | + - The quantization matrix coefficients for the chominance component of | |
| 1669 | + intra-coded frames, in zigzag scanning order. Only relevant for | |
| 1670 | + non-4:2:0 YUV formats. | |
| 1671 | + * - __u8 | |
| 1672 | + - ``chroma_non_intra_quantiser_matrix[64]`` | |
| 1673 | + - The quantization matrix coefficients for the chrominance component of | |
| 1674 | + non-intra-coded frames, in zigzag scanning order. Only relevant for | |
| 1675 | + non-4:2:0 YUV formats. | |
| 1500 | 1676 | |
| 1501 | 1677 | MFC 5.1 MPEG Controls |
| 1502 | 1678 | --------------------- |
| @@ -113,4 +113,5 @@ EINTR · 112 unmodified lines | ||
| 113 | 113 | The call was interrupted by a signal. |
| 114 | 114 | |
| 115 | 115 | EINVAL |
| 116 | − The ``nfds`` argument is greater than ``OPEN_MAX``. | |
| 116 | + The ``nfds`` value exceeds the ``RLIMIT_NOFILE`` value. Use | |
| 117 | + ``getrlimit()`` to obtain this value. | |
| @@ -12,6 +12,7 @@ These formats are used for the :ref:`metadata` interface only. · 11 unmodified lines | ||
| 12 | 12 | .. toctree:: |
| 13 | 13 | :maxdepth: 1 |
| 14 | 14 | |
| 15 | + pixfmt-meta-d4xx | |
| 15 | 16 | pixfmt-meta-uvc |
| 16 | 17 | pixfmt-meta-vsp1-hgo |
| 17 | 18 | pixfmt-meta-vsp1-hgt |
| @@ -60,6 +60,22 @@ Compressed Formats · 59 unmodified lines | ||
| 60 | 60 | - ``V4L2_PIX_FMT_MPEG2`` |
| 61 | 61 | - 'MPG2' |
| 62 | 62 | - MPEG2 video elementary stream. |
| 63 | + * .. _V4L2-PIX-FMT-MPEG2-SLICE: | |
| 64 | + | |
| 65 | + - ``V4L2_PIX_FMT_MPEG2_SLICE`` | |
| 66 | + - 'MG2S' | |
| 67 | + - MPEG-2 parsed slice data, as extracted from the MPEG-2 bitstream. | |
| 68 | + This format is adapted for stateless video decoders that implement a | |
| 69 | + MPEG-2 pipeline (using the :ref:`codec` and :ref:`media-request-api`). | |
| 70 | + Metadata associated with the frame to decode is required to be passed | |
| 71 | + through the ``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS`` control and | |
| 72 | + quantization matrices can optionally be specified through the | |
| 73 | + ``V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION`` control. | |
| 74 | + See the :ref:`associated Codec Control IDs <v4l2-mpeg-mpeg2>`. | |
| 75 | + Exactly one output and one capture buffer must be provided for use with | |
| 76 | + this pixel format. The output buffer must contain the appropriate number | |
| 77 | + of macroblocks to decode a full corresponding frame to the matching | |
| 78 | + capture buffer. | |
| 63 | 79 | * .. _V4L2-PIX-FMT-MPEG4: |
| 64 | 80 | |
| 65 | 81 | - ``V4L2_PIX_FMT_MPEG4`` |
| @@ -101,4 +117,4 @@ Compressed Formats · 35 unmodified lines | ||
| 101 | 117 | - 'FWHT' |
| 102 | 118 | - Video elementary stream using a codec based on the Fast Walsh Hadamard |
| 103 | 119 | Transform. This codec is implemented by the vicodec ('Virtual Codec') |
| 104 | − driver. See the vicodec-codec.h header for more details. | |
| 120 | + driver. See the codec-fwht.h header for more details. | |
| @@ -0,0 +1,210 @@ | ||
| 1 | +.. -*- coding: utf-8; mode: rst -*- | |
| 2 | + | |
| 3 | +.. _v4l2-meta-fmt-d4xx: | |
| 4 | + | |
| 5 | +******************************* | |
| 6 | +V4L2_META_FMT_D4XX ('D4XX') | |
| 7 | +******************************* | |
| 8 | + | |
| 9 | +Intel D4xx UVC Cameras Metadata | |
| 10 | + | |
| 11 | + | |
| 12 | +Description | |
| 13 | +=========== | |
| 14 | + | |
| 15 | +Intel D4xx (D435 and other) cameras include per-frame metadata in their UVC | |
| 16 | +payload headers, following the Microsoft(R) UVC extension proposal [1_]. That | |
| 17 | +means, that the private D4XX metadata, following the standard UVC header, is | |
| 18 | +organised in blocks. D4XX cameras implement several standard block types, | |
| 19 | +proposed by Microsoft, and several proprietary ones. Supported standard metadata | |
| 20 | +types are MetadataId_CaptureStats (ID 3), MetadataId_CameraExtrinsics (ID 4), | |
| 21 | +and MetadataId_CameraIntrinsics (ID 5). For their description see [1_]. This | |
| 22 | +document describes proprietary metadata types, used by D4xx cameras. | |
| 23 | + | |
| 24 | +V4L2_META_FMT_D4XX buffers follow the metadata buffer layout of | |
| 25 | +V4L2_META_FMT_UVC with the only difference, that it also includes proprietary | |
| 26 | +payload header data. D4xx cameras use bulk transfers and only send one payload | |
| 27 | +per frame, therefore their headers cannot be larger than 255 bytes. | |
| 28 | + | |
| 29 | +Below are proprietary Microsoft style metadata types, used by D4xx cameras, | |
| 30 | +where all fields are in little endian order: | |
| 31 | + | |
| 32 | +.. flat-table:: D4xx metadata | |
| 33 | + :widths: 1 4 | |
| 34 | + :header-rows: 1 | |
| 35 | + :stub-columns: 0 | |
| 36 | + | |
| 37 | + * - Field | |
| 38 | + - Description | |
| 39 | + * - :cspan:`1` *Depth Control* | |
| 40 | + * - __u32 ID | |
| 41 | + - 0x80000000 | |
| 42 | + * - __u32 Size | |
| 43 | + - Size in bytes (currently 56) | |
| 44 | + * - __u32 Version | |
| 45 | + - Version of this structure. The documentation herein corresponds to | |
| 46 | + version xxx. The version number will be incremented when new fields are | |
| 47 | + added. | |
| 48 | + * - __u32 Flags | |
| 49 | + - A bitmask of flags: see [2_] below | |
| 50 | + * - __u32 Gain | |
| 51 | + - Gain value in internal units, same as the V4L2_CID_GAIN control, used to | |
| 52 | + capture the frame | |
| 53 | + * - __u32 Exposure | |
| 54 | + - Exposure time (in microseconds) used to capture the frame | |
| 55 | + * - __u32 Laser power | |
| 56 | + - Power of the laser LED 0-360, used for depth measurement | |
| 57 | + * - __u32 AE mode | |
| 58 | + - 0: manual; 1: automatic exposure | |
| 59 | + * - __u32 Exposure priority | |
| 60 | + - Exposure priority value: 0 - constant frame rate | |
| 61 | + * - __u32 AE ROI left | |
| 62 | + - Left border of the AE Region of Interest (all ROI values are in pixels | |
| 63 | + and lie between 0 and maximum width or height respectively) | |
| 64 | + * - __u32 AE ROI right | |
| 65 | + - Right border of the AE Region of Interest | |
| 66 | + * - __u32 AE ROI top | |
| 67 | + - Top border of the AE Region of Interest | |
| 68 | + * - __u32 AE ROI bottom | |
| 69 | + - Bottom border of the AE Region of Interest | |
| 70 | + * - __u32 Preset | |
| 71 | + - Preset selector value, default: 0, unless changed by the user | |
| 72 | + * - __u32 Laser mode | |
| 73 | + - 0: off, 1: on | |
| 74 | + * - :cspan:`1` *Capture Timing* | |
| 75 | + * - __u32 ID | |
| 76 | + - 0x80000001 | |
| 77 | + * - __u32 Size | |
| 78 | + - Size in bytes (currently 40) | |
| 79 | + * - __u32 Version | |
| 80 | + - Version of this structure. The documentation herein corresponds to | |
| 81 | + version xxx. The version number will be incremented when new fields are | |
| 82 | + added. | |
| 83 | + * - __u32 Flags | |
| 84 | + - A bitmask of flags: see [3_] below | |
| 85 | + * - __u32 Frame counter | |
| 86 | + - Monotonically increasing counter | |
| 87 | + * - __u32 Optical time | |
| 88 | + - Time in microseconds from the beginning of a frame till its middle | |
| 89 | + * - __u32 Readout time | |
| 90 | + - Time, used to read out a frame in microseconds | |
| 91 | + * - __u32 Exposure time | |
| 92 | + - Frame exposure time in microseconds | |
| 93 | + * - __u32 Frame interval | |
| 94 | + - In microseconds = 1000000 / framerate | |
| 95 | + * - __u32 Pipe latency | |
| 96 | + - Time in microseconds from start of frame to data in USB buffer | |
| 97 | + * - :cspan:`1` *Configuration* | |
| 98 | + * - __u32 ID | |
| 99 | + - 0x80000002 | |
| 100 | + * - __u32 Size | |
| 101 | + - Size in bytes (currently 40) | |
| 102 | + * - __u32 Version | |
| 103 | + - Version of this structure. The documentation herein corresponds to | |
| 104 | + version xxx. The version number will be incremented when new fields are | |
| 105 | + added. | |
| 106 | + * - __u32 Flags | |
| 107 | + - A bitmask of flags: see [4_] below | |
| 108 | + * - __u8 Hardware type | |
| 109 | + - Camera hardware version [5_] | |
| 110 | + * - __u8 SKU ID | |
| 111 | + - Camera hardware configuration [6_] | |
| 112 | + * - __u32 Cookie | |
| 113 | + - Internal synchronisation | |
| 114 | + * - __u16 Format | |
| 115 | + - Image format code [7_] | |
| 116 | + * - __u16 Width | |
| 117 | + - Width in pixels | |
| 118 | + * - __u16 Height | |
| 119 | + - Height in pixels | |
| 120 | + * - __u16 Framerate | |
| 121 | + - Requested frame rate per second | |
| 122 | + * - __u16 Trigger | |
| 123 | + - Byte 0: bit 0: depth and RGB are synchronised, bit 1: external trigger | |
| 124 | + | |
| 125 | +.. _1: | |
| 126 | + | |
| 127 | +[1] https://docs.microsoft.com/en-us/windows-hardware/drivers/stream/uvc-extensions-1-5 | |
| 128 | + | |
| 129 | +.. _2: | |
| 130 | + | |
| 131 | +[2] Depth Control flags specify which fields are valid: :: | |
| 132 | + | |
| 133 | + 0x00000001 Gain | |
| 134 | + 0x00000002 Exposure | |
| 135 | + 0x00000004 Laser power | |
| 136 | + 0x00000008 AE mode | |
| 137 | + 0x00000010 Exposure priority | |
| 138 | + 0x00000020 AE ROI | |
| 139 | + 0x00000040 Preset | |
| 140 | + | |
| 141 | +.. _3: | |
| 142 | + | |
| 143 | +[3] Capture Timing flags specify which fields are valid: :: | |
| 144 | + | |
| 145 | + 0x00000001 Frame counter | |
| 146 | + 0x00000002 Optical time | |
| 147 | + 0x00000004 Readout time | |
| 148 | + 0x00000008 Exposure time | |
| 149 | + 0x00000010 Frame interval | |
| 150 | + 0x00000020 Pipe latency | |
| 151 | + | |
| 152 | +.. _4: | |
| 153 | + | |
| 154 | +[4] Configuration flags specify which fields are valid: :: | |
| 155 | + | |
| 156 | + 0x00000001 Hardware type | |
| 157 | + 0x00000002 SKU ID | |
| 158 | + 0x00000004 Cookie | |
| 159 | + 0x00000008 Format | |
| 160 | + 0x00000010 Width | |
| 161 | + 0x00000020 Height | |
| 162 | + 0x00000040 Framerate | |
| 163 | + 0x00000080 Trigger | |
| 164 | + 0x00000100 Cal count | |
| 165 | + | |
| 166 | +.. _5: | |
| 167 | + | |
| 168 | +[5] Camera model: :: | |
| 169 | + | |
| 170 | + 0 DS5 | |
| 171 | + 1 IVCAM2 | |
| 172 | + | |
| 173 | +.. _6: | |
| 174 | + | |
| 175 | +[6] 8-bit camera hardware configuration bitfield: :: | |
| 176 | + | |
| 177 | + [1:0] depthCamera | |
| 178 | + 00: no depth | |
| 179 | + 01: standard depth | |
| 180 | + 10: wide depth | |
| 181 | + 11: reserved | |
| 182 | + [2] depthIsActive - has a laser projector | |
| 183 | + [3] RGB presence | |
| 184 | + [4] Inertial Measurement Unit (IMU) presence | |
| 185 | + [5] projectorType | |
| 186 | + 0: HPTG | |
| 187 | + 1: Princeton | |
| 188 | + [6] 0: a projector, 1: an LED | |
| 189 | + [7] reserved | |
| 190 | + | |
| 191 | +.. _7: | |
| 192 | + | |
| 193 | +[7] Image format codes per video streaming interface: | |
| 194 | + | |
| 195 | +Depth: :: | |
| 196 | + | |
| 197 | + 1 Z16 | |
| 198 | + 2 Z | |
| 199 | + | |
| 200 | +Left sensor: :: | |
| 201 | + | |
| 202 | + 1 Y8 | |
| 203 | + 2 UYVY | |
| 204 | + 3 R8L8 | |
| 205 | + 4 Calibration | |
| 206 | + 5 W10 | |
| 207 | + | |
| 208 | +Fish Eye sensor: :: | |
| 209 | + | |
| 210 | + 1 RAW8 | |
| @@ -243,7 +243,20 @@ please make a proposal on the linux-media mailing list. · 242 unmodified lines | ||
| 243 | 243 | It is an opaque intermediate format and the MDP hardware must be |
| 244 | 244 | used to convert ``V4L2_PIX_FMT_MT21C`` to ``V4L2_PIX_FMT_NV12M``, |
| 245 | 245 | ``V4L2_PIX_FMT_YUV420M`` or ``V4L2_PIX_FMT_YVU420``. |
| 246 | − | |
| 246 | + * .. _V4L2-PIX-FMT-SUNXI-TILED-NV12: | |
| 247 | + | |
| 248 | + - ``V4L2_PIX_FMT_SUNXI_TILED_NV12`` | |
| 249 | + - 'ST12' | |
| 250 | + - Two-planar NV12-based format used by the video engine found on Allwinner | |
| 251 | + (codenamed sunxi) platforms, with 32x32 tiles for the luminance plane | |
| 252 | + and 32x64 tiles for the chrominance plane. The data in each tile is | |
| 253 | + stored in linear order, within the tile bounds. Each tile follows the | |
| 254 | + previous one linearly in memory (from left to right, top to bottom). | |
| 255 | + | |
| 256 | + The associated buffer dimensions are aligned to match an integer number | |
| 257 | + of tiles, resulting in 32-aligned resolutions for the luminance plane | |
| 258 | + and 16-aligned resolutions for the chrominance plane (with 2x2 | |
| 259 | + subsampling). | |
| 247 | 260 | |
| 248 | 261 | .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| |
| 249 | 262 | |
| @@ -102,7 +102,19 @@ than the number requested. · 101 unmodified lines | ||
| 102 | 102 | - ``format`` |
| 103 | 103 | - Filled in by the application, preserved by the driver. |
| 104 | 104 | * - __u32 |
| 105 | − - ``reserved``\ [8] | |
| 105 | + - ``capabilities`` | |
| 106 | + - Set by the driver. If 0, then the driver doesn't support | |
| 107 | + capabilities. In that case all you know is that the driver is | |
| 108 | + guaranteed to support ``V4L2_MEMORY_MMAP`` and *might* support | |
| 109 | + other :c:type:`v4l2_memory` types. It will not support any others | |
| 110 | + capabilities. See :ref:`here <v4l2-buf-capabilities>` for a list of the | |
| 111 | + capabilities. | |
| 112 | + | |
| 113 | + If you want to just query the capabilities without making any | |
| 114 | + other changes, then set ``count`` to 0, ``memory`` to | |
| 115 | + ``V4L2_MEMORY_MMAP`` and ``format.type`` to the buffer type. | |
| 116 | + * - __u32 | |
| 117 | + - ``reserved``\ [7] | |
| 106 | 118 | - A place holder for future extensions. Drivers and applications |
| 107 | 119 | must set the array to zero. |
| 108 | 120 | |
| @@ -58,7 +58,7 @@ overlay devices. · 57 unmodified lines | ||
| 58 | 58 | - Type of the data stream, set by the application. Only these types |
| 59 | 59 | are valid here: ``V4L2_BUF_TYPE_VIDEO_CAPTURE``, ``V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE``, |
| 60 | 60 | ``V4L2_BUF_TYPE_VIDEO_OUTPUT``, ``V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE`` and |
| 61 | − ``V4L2_BUF_TYPE_VIDEO_OVERLAY``. See :c:type:`v4l2_buf_type` and the note above. | |
| 61 | + ``V4L2_BUF_TYPE_VIDEO_OVERLAY``. See :c:type:`v4l2_buf_type` and the note below. | |
| 62 | 62 | * - struct :ref:`v4l2_rect <v4l2-rect-crop>` |
| 63 | 63 | - ``bounds`` |
| 64 | 64 | - Defines the window within capturing or output is possible, this |
| @@ -379,7 +379,17 @@ call. · 378 unmodified lines | ||
| 379 | 379 | - 0x0001 |
| 380 | 380 | - This event gets triggered when a resolution change is detected at |
| 381 | 381 | an input. This can come from an input connector or from a video |
| 382 | − decoder. | |
| 382 | + decoder. Applications will have to query the new resolution (if | |
| 383 | + any, the signal may also have been lost). | |
| 384 | + | |
| 385 | + *Important*: even if the new video timings appear identical to the old | |
| 386 | + ones, receiving this event indicates that there was an issue with the | |
| 387 | + video signal and you must stop and restart streaming | |
| 388 | + (:ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>` | |
| 389 | + followed by :ref:`VIDIOC_STREAMON <VIDIOC_STREAMON>`). The reason is | |
| 390 | + that many devices are not able to recover from a temporary loss of | |
| 391 | + signal and so restarting streaming I/O is required in order for the | |
| 392 | + hardware to synchronize to the video signal. | |
| 383 | 393 | |
| 384 | 394 | |
| 385 | 395 | Return Value |
| @@ -84,7 +84,7 @@ When cropping is not supported then no parameters are changed and · 83 unmodified lines | ||
| 84 | 84 | - Type of the data stream, set by the application. Only these types |
| 85 | 85 | are valid here: ``V4L2_BUF_TYPE_VIDEO_CAPTURE``, ``V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE``, |
| 86 | 86 | ``V4L2_BUF_TYPE_VIDEO_OUTPUT``, ``V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE`` and |
| 87 | − ``V4L2_BUF_TYPE_VIDEO_OVERLAY``. See :c:type:`v4l2_buf_type` and the note above. | |
| 87 | + ``V4L2_BUF_TYPE_VIDEO_OVERLAY``. See :c:type:`v4l2_buf_type` and the note below. | |
| 88 | 88 | * - struct :c:type:`v4l2_rect` |
| 89 | 89 | - ``c`` |
| 90 | 90 | - Cropping rectangle. The same co-ordinate system as for struct |
| @@ -257,14 +257,19 @@ EBUSY · 256 unmodified lines | ||
| 257 | 257 | will also be cleared. This is a read-only flag, applications must |
| 258 | 258 | not set this. |
| 259 | 259 | * - ``V4L2_DV_FL_REDUCED_FPS`` |
| 260 | − - CEA-861 specific: only valid for video transmitters, the flag is | |
| 261 | − cleared by receivers. It is also only valid for formats with the | |
| 262 | − ``V4L2_DV_FL_CAN_REDUCE_FPS`` flag set, for other formats the | |
| 263 | − flag will be cleared by the driver. If the application sets this | |
| 264 | − flag, then the pixelclock used to set up the transmitter is | |
| 265 | − divided by 1.001 to make it compatible with NTSC framerates. If | |
| 266 | − the transmitter can't generate such frequencies, then the flag | |
| 267 | − will also be cleared. | |
| 260 | + - CEA-861 specific: only valid for video transmitters or video | |
| 261 | + receivers that have the ``V4L2_DV_FL_CAN_DETECT_REDUCED_FPS`` | |
| 262 | + set. This flag is cleared otherwise. It is also only valid for | |
| 263 | + formats with the ``V4L2_DV_FL_CAN_REDUCE_FPS`` flag set, for other | |
| 264 | + formats the flag will be cleared by the driver. | |
| 265 | + | |
| 266 | + If the application sets this flag for a transmitter, then the | |
| 267 | + pixelclock used to set up the transmitter is divided by 1.001 to | |
| 268 | + make it compatible with NTSC framerates. If the transmitter can't | |
| 269 | + generate such frequencies, then the flag will be cleared. | |
| 270 | + | |
| 271 | + If a video receiver detects that the format uses a reduced framerate, | |
| 272 | + then it will set this flag to signal this to the application. | |
| 268 | 273 | * - ``V4L2_DV_FL_HALF_LINE`` |
| 269 | 274 | - Specific to interlaced formats: if set, then the vertical |
| 270 | 275 | backporch of field 1 (aka the odd field) is really one half-line |
| @@ -294,3 +299,9 @@ EBUSY · 23 unmodified lines | ||
| 294 | 299 | - If set, then the hdmi_vic field is valid and contains the Video |
| 295 | 300 | Identification Code as per the HDMI standard (HDMI Vendor Specific |
| 296 | 301 | InfoFrame). |
| 302 | + * - ``V4L2_DV_FL_CAN_DETECT_REDUCED_FPS`` | |
| 303 | + - CEA-861 specific: only valid for video receivers, the flag is | |
| 304 | + cleared by transmitters. | |
| 305 | + If set, then the hardware can detect the difference between | |
| 306 | + regular framerates and framerates reduced by 1000/1001. E.g.: | |
| 307 | + 60 vs 59.94 Hz, 30 vs 29.97 Hz or 24 vs 23.976 Hz. | |
| @@ -95,6 +95,25 @@ appropriate. In the first case the new value is set in struct · 94 unmodified lines | ||
| 95 | 95 | is inappropriate (e.g. the given menu index is not supported by the menu |
| 96 | 96 | control), then this will also result in an ``EINVAL`` error code error. |
| 97 | 97 | |
| 98 | +If ``request_fd`` is set to a not-yet-queued :ref:`request <media-request-api>` | |
| 99 | +file descriptor and ``which`` is set to ``V4L2_CTRL_WHICH_REQUEST_VAL``, | |
| 100 | +then the controls are not applied immediately when calling | |
| 101 | +:ref:`VIDIOC_S_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`, but instead are applied by | |
| 102 | +the driver for the buffer associated with the same request. | |
| 103 | +If the device does not support requests, then ``EACCES`` will be returned. | |
| 104 | +If requests are supported but an invalid request file descriptor is given, | |
| 105 | +then ``EINVAL`` will be returned. | |
| 106 | + | |
| 107 | +An attempt to call :ref:`VIDIOC_S_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` for a | |
| 108 | +request that has already been queued will result in an ``EBUSY`` error. | |
| 109 | + | |
| 110 | +If ``request_fd`` is specified and ``which`` is set to | |
| 111 | +``V4L2_CTRL_WHICH_REQUEST_VAL`` during a call to | |
| 112 | +:ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`, then it will return the | |
| 113 | +values of the controls at the time of request completion. | |
| 114 | +If the request is not yet completed, then this will result in an | |
| 115 | +``EACCES`` error. | |
| 116 | + | |
| 98 | 117 | The driver will only set/get these controls if all control values are |
| 99 | 118 | correct. This prevents the situation where only some of the controls |
| 100 | 119 | were set/get. Only low-level errors (e. g. a failed i2c command) can |
| @@ -209,13 +228,17 @@ still cause this situation. · 108 unmodified lines | ||
| 209 | 228 | - ``which`` |
| 210 | 229 | - Which value of the control to get/set/try. |
| 211 | 230 | ``V4L2_CTRL_WHICH_CUR_VAL`` will return the current value of the |
| 212 | − control and ``V4L2_CTRL_WHICH_DEF_VAL`` will return the default | |
| 213 | − value of the control. | |
| 231 | + control, ``V4L2_CTRL_WHICH_DEF_VAL`` will return the default | |
| 232 | + value of the control and ``V4L2_CTRL_WHICH_REQUEST_VAL`` indicates that | |
| 233 | + these controls have to be retrieved from a request or tried/set for | |
| 234 | + a request. In the latter case the ``request_fd`` field contains the | |
| 235 | + file descriptor of the request that should be used. If the device | |
| 236 | + does not support requests, then ``EACCES`` will be returned. | |
| 214 | 237 | |
| 215 | 238 | .. note:: |
| 216 | 239 | |
| 217 | − You can only get the default value of the control, | |
| 218 | − you cannot set or try it. | |
| 240 | + When using ``V4L2_CTRL_WHICH_DEF_VAL`` be aware that you can only | |
| 241 | + get the default value of the control, you cannot set or try it. | |
| 219 | 242 | |
| 220 | 243 | For backwards compatibility you can also use a control class here |
| 221 | 244 | (see :ref:`ctrl-class`). In that case all controls have to |
| @@ -272,8 +295,15 @@ still cause this situation. · 50 unmodified lines | ||
| 272 | 295 | then you can call :ref:`VIDIOC_TRY_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` to try to discover the |
| 273 | 296 | actual control that failed the validation step. Unfortunately, |
| 274 | 297 | there is no ``TRY`` equivalent for :ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`. |
| 298 | + * - __s32 | |
| 299 | + - ``request_fd`` | |
| 300 | + - File descriptor of the request to be used by this operation. Only | |
| 301 | + valid if ``which`` is set to ``V4L2_CTRL_WHICH_REQUEST_VAL``. | |
| 302 | + If the device does not support requests, then ``EACCES`` will be returned. | |
| 303 | + If requests are supported but an invalid request file descriptor is | |
| 304 | + given, then ``EINVAL`` will be returned. | |
| 275 | 305 | * - __u32 |
| 276 | − - ``reserved``\ [2] | |
| 306 | + - ``reserved``\ [1] | |
| 277 | 307 | - Reserved for future extensions. |
| 278 | 308 | |
| 279 | 309 | Drivers and applications must set the array to zero. |
| @@ -347,11 +377,14 @@ appropriately. The generic error codes are described at the · 67 unmodified lines | ||
| 347 | 377 | |
| 348 | 378 | EINVAL |
| 349 | 379 | The struct :c:type:`v4l2_ext_control` ``id`` is |
| 350 | − invalid, the struct :c:type:`v4l2_ext_controls` | |
| 380 | + invalid, or the struct :c:type:`v4l2_ext_controls` | |
| 351 | 381 | ``which`` is invalid, or the struct |
| 352 | 382 | :c:type:`v4l2_ext_control` ``value`` was |
| 353 | 383 | inappropriate (e.g. the given menu index is not supported by the |
| 354 | − driver). This error code is also returned by the | |
| 384 | + driver), or the ``which`` field was set to ``V4L2_CTRL_WHICH_REQUEST_VAL`` | |
| 385 | + but the given ``request_fd`` was invalid or ``V4L2_CTRL_WHICH_REQUEST_VAL`` | |
| 386 | + is not supported by the kernel. | |
| 387 | + This error code is also returned by the | |
| 355 | 388 | :ref:`VIDIOC_S_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` and :ref:`VIDIOC_TRY_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` ioctls if two or |
| 356 | 389 | more control values are in conflict. |
| 357 | 390 | |
| @@ -362,7 +395,9 @@ ERANGE · 4 unmodified lines | ||
| 362 | 395 | EBUSY |
| 363 | 396 | The control is temporarily not changeable, possibly because another |
| 364 | 397 | applications took over control of the device function this control |
| 365 | − belongs to. | |
| 398 | + belongs to, or (if the ``which`` field was set to | |
| 399 | + ``V4L2_CTRL_WHICH_REQUEST_VAL``) the request was queued but not yet | |
| 400 | + completed. | |
| 366 | 401 | |
| 367 | 402 | ENOSPC |
| 368 | 403 | The space reserved for the control's payload is insufficient. The |
| @@ -370,5 +405,9 @@ ENOSPC · 1 unmodified line | ||
| 370 | 405 | and this error code is returned. |
| 371 | 406 | |
| 372 | 407 | EACCES |
| 373 | − Attempt to try or set a read-only control or to get a write-only | |
| 374 | − control. | |
| 408 | + Attempt to try or set a read-only control, or to get a write-only | |
| 409 | + control, or to get a control from a request that has not yet been | |
| 410 | + completed. | |
| 411 | + | |
| 412 | + Or the ``which`` field was set to ``V4L2_CTRL_WHICH_REQUEST_VAL`` but the | |
| 413 | + device does not support requests. | |
| @@ -65,7 +65,7 @@ To enqueue a :ref:`memory mapped <mmap>` buffer applications set the · 64 unmodified lines | ||
| 65 | 65 | with a pointer to this structure the driver sets the |
| 66 | 66 | ``V4L2_BUF_FLAG_MAPPED`` and ``V4L2_BUF_FLAG_QUEUED`` flags and clears |
| 67 | 67 | the ``V4L2_BUF_FLAG_DONE`` flag in the ``flags`` field, or it returns an |
| 68 | −EINVAL error code. | |
| 68 | +``EINVAL`` error code. | |
| 69 | 69 | |
| 70 | 70 | To enqueue a :ref:`user pointer <userp>` buffer applications set the |
| 71 | 71 | ``memory`` field to ``V4L2_MEMORY_USERPTR``, the ``m.userptr`` field to |
| @@ -98,6 +98,28 @@ dequeued, until the :ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>` or · 26 unmodified lines | ||
| 98 | 98 | :ref:`VIDIOC_REQBUFS` ioctl is called, or until the |
| 99 | 99 | device is closed. |
| 100 | 100 | |
| 101 | +The ``request_fd`` field can be used with the ``VIDIOC_QBUF`` ioctl to specify | |
| 102 | +the file descriptor of a :ref:`request <media-request-api>`, if requests are | |
| 103 | +in use. Setting it means that the buffer will not be passed to the driver | |
| 104 | +until the request itself is queued. Also, the driver will apply any | |
| 105 | +settings associated with the request for this buffer. This field will | |
| 106 | +be ignored unless the ``V4L2_BUF_FLAG_REQUEST_FD`` flag is set. | |
| 107 | +If the device does not support requests, then ``EACCES`` will be returned. | |
| 108 | +If requests are supported but an invalid request file descriptor is given, | |
| 109 | +then ``EINVAL`` will be returned. | |
| 110 | + | |
| 111 | +.. caution:: | |
| 112 | + It is not allowed to mix queuing requests with queuing buffers directly. | |
| 113 | + ``EBUSY`` will be returned if the first buffer was queued directly and | |
| 114 | + then the application tries to queue a request, or vice versa. After | |
| 115 | + closing the file descriptor, calling | |
| 116 | + :ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>` or calling :ref:`VIDIOC_REQBUFS` | |
| 117 | + the check for this will be reset. | |
| 118 | + | |
| 119 | + For :ref:`memory-to-memory devices <codec>` you can specify the | |
| 120 | + ``request_fd`` only for output buffers, not for capture buffers. Attempting | |
| 121 | + to specify this for a capture buffer will result in an ``EACCES`` error. | |
| 122 | + | |
| 101 | 123 | Applications call the ``VIDIOC_DQBUF`` ioctl to dequeue a filled |
| 102 | 124 | (capturing) or displayed (output) buffer from the driver's outgoing |
| 103 | 125 | queue. They just set the ``type``, ``memory`` and ``reserved`` fields of |
| @@ -133,7 +155,9 @@ EAGAIN · 29 unmodified lines | ||
| 133 | 155 | EINVAL |
| 134 | 156 | The buffer ``type`` is not supported, or the ``index`` is out of |
| 135 | 157 | bounds, or no buffers have been allocated yet, or the ``userptr`` or |
| 136 | − ``length`` are invalid. | |
| 158 | + ``length`` are invalid, or the ``V4L2_BUF_FLAG_REQUEST_FD`` flag was | |
| 159 | + set but the the given ``request_fd`` was invalid, or ``m.fd`` was | |
| 160 | + an invalid DMABUF file descriptor. | |
| 137 | 161 | |
| 138 | 162 | EIO |
| 139 | 163 | ``VIDIOC_DQBUF`` failed due to an internal error. Can also indicate |
| @@ -153,3 +177,12 @@ EPIPE · 13 unmodified lines | ||
| 153 | 177 | ``VIDIOC_DQBUF`` returns this on an empty capture queue for mem2mem |
| 154 | 178 | codecs if a buffer with the ``V4L2_BUF_FLAG_LAST`` was already |
| 155 | 179 | dequeued and no new buffers are expected to become available. |
| 180 | + | |
| 181 | +EACCES | |
| 182 | + The ``V4L2_BUF_FLAG_REQUEST_FD`` flag was set but the device does not | |
| 183 | + support requests for the given buffer type. | |
| 184 | + | |
| 185 | +EBUSY | |
| 186 | + The first buffer was queued via a request, but the application now tries | |
| 187 | + to queue it directly, or vice versa (it is not permitted to mix the two | |
| 188 | + APIs). | |
| @@ -424,8 +424,18 @@ See also the examples in :ref:`control`. · 423 unmodified lines | ||
| 424 | 424 | - any |
| 425 | 425 | - An unsigned 32-bit valued control ranging from minimum to maximum |
| 426 | 426 | inclusive. The step value indicates the increment between values. |
| 427 | − | |
| 428 | − | |
| 427 | + * - ``V4L2_CTRL_TYPE_MPEG2_SLICE_PARAMS`` | |
| 428 | + - n/a | |
| 429 | + - n/a | |
| 430 | + - n/a | |
| 431 | + - A struct :c:type:`v4l2_ctrl_mpeg2_slice_params`, containing MPEG-2 | |
| 432 | + slice parameters for stateless video decoders. | |
| 433 | + * - ``V4L2_CTRL_TYPE_MPEG2_QUANTIZATION`` | |
| 434 | + - n/a | |
| 435 | + - n/a | |
| 436 | + - n/a | |
| 437 | + - A struct :c:type:`v4l2_ctrl_mpeg2_quantization`, containing MPEG-2 | |
| 438 | + quantization matrices for stateless video decoders. | |
| 429 | 439 | |
| 430 | 440 | .. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}| |
| 431 | 441 | |
| @@ -88,10 +88,50 @@ any DMA in progress, an implicit · 87 unmodified lines | ||
| 88 | 88 | ``V4L2_MEMORY_DMABUF`` or ``V4L2_MEMORY_USERPTR``. See |
| 89 | 89 | :c:type:`v4l2_memory`. |
| 90 | 90 | * - __u32 |
| 91 | − - ``reserved``\ [2] | |
| 91 | + - ``capabilities`` | |
| 92 | + - Set by the driver. If 0, then the driver doesn't support | |
| 93 | + capabilities. In that case all you know is that the driver is | |
| 94 | + guaranteed to support ``V4L2_MEMORY_MMAP`` and *might* support | |
| 95 | + other :c:type:`v4l2_memory` types. It will not support any others | |
| 96 | + capabilities. | |
| 97 | + | |
| 98 | + If you want to query the capabilities with a minimum of side-effects, | |
| 99 | + then this can be called with ``count`` set to 0, ``memory`` set to | |
| 100 | + ``V4L2_MEMORY_MMAP`` and ``type`` set to the buffer type. This will | |
| 101 | + free any previously allocated buffers, so this is typically something | |
| 102 | + that will be done at the start of the application. | |
| 103 | + * - __u32 | |
| 104 | + - ``reserved``\ [1] | |
| 92 | 105 | - A place holder for future extensions. Drivers and applications |
| 93 | 106 | must set the array to zero. |
| 94 | 107 | |
| 108 | +.. tabularcolumns:: |p{6.1cm}|p{2.2cm}|p{8.7cm}| | |
| 109 | + | |
| 110 | +.. _v4l2-buf-capabilities: | |
| 111 | +.. _V4L2-BUF-CAP-SUPPORTS-MMAP: | |
| 112 | +.. _V4L2-BUF-CAP-SUPPORTS-USERPTR: | |
| 113 | +.. _V4L2-BUF-CAP-SUPPORTS-DMABUF: | |
| 114 | +.. _V4L2-BUF-CAP-SUPPORTS-REQUESTS: | |
| 115 | + | |
| 116 | +.. cssclass:: longtable | |
| 117 | + | |
| 118 | +.. flat-table:: V4L2 Buffer Capabilities Flags | |
| 119 | + :header-rows: 0 | |
| 120 | + :stub-columns: 0 | |
| 121 | + :widths: 3 1 4 | |
| 122 | + | |
| 123 | + * - ``V4L2_BUF_CAP_SUPPORTS_MMAP`` | |
| 124 | + - 0x00000001 | |
| 125 | + - This buffer type supports the ``V4L2_MEMORY_MMAP`` streaming mode. | |
| 126 | + * - ``V4L2_BUF_CAP_SUPPORTS_USERPTR`` | |
| 127 | + - 0x00000002 | |
| 128 | + - This buffer type supports the ``V4L2_MEMORY_USERPTR`` streaming mode. | |
| 129 | + * - ``V4L2_BUF_CAP_SUPPORTS_DMABUF`` | |
| 130 | + - 0x00000004 | |
| 131 | + - This buffer type supports the ``V4L2_MEMORY_DMABUF`` streaming mode. | |
| 132 | + * - ``V4L2_BUF_CAP_SUPPORTS_REQUESTS`` | |
| 133 | + - 0x00000008 | |
| 134 | + - This buffer type supports :ref:`requests <media-request-api>`. | |
| 95 | 135 | |
| 96 | 136 | Return Value |
| 97 | 137 | ============ |
| @@ -56,7 +56,8 @@ replace symbol V4L2_MEMORY_USERPTR :c:type:`v4l2_memory` · 55 unmodified lines | ||
| 56 | 56 | # Documented enum v4l2_colorspace |
| 57 | 57 | replace symbol V4L2_COLORSPACE_470_SYSTEM_BG :c:type:`v4l2_colorspace` |
| 58 | 58 | replace symbol V4L2_COLORSPACE_470_SYSTEM_M :c:type:`v4l2_colorspace` |
| 59 | −replace symbol V4L2_COLORSPACE_ADOBERGB :c:type:`v4l2_colorspace` | |
| 59 | +replace symbol V4L2_COLORSPACE_OPRGB :c:type:`v4l2_colorspace` | |
| 60 | +replace define V4L2_COLORSPACE_ADOBERGB :c:type:`v4l2_colorspace` | |
| 60 | 61 | replace symbol V4L2_COLORSPACE_BT2020 :c:type:`v4l2_colorspace` |
| 61 | 62 | replace symbol V4L2_COLORSPACE_DCI_P3 :c:type:`v4l2_colorspace` |
| 62 | 63 | replace symbol V4L2_COLORSPACE_DEFAULT :c:type:`v4l2_colorspace` |
| @@ -69,7 +70,8 @@ replace symbol V4L2_COLORSPACE_SRGB :c:type:`v4l2_colorspace` · 6 unmodified lines | ||
| 69 | 70 | |
| 70 | 71 | # Documented enum v4l2_xfer_func |
| 71 | 72 | replace symbol V4L2_XFER_FUNC_709 :c:type:`v4l2_xfer_func` |
| 72 | −replace symbol V4L2_XFER_FUNC_ADOBERGB :c:type:`v4l2_xfer_func` | |
| 73 | +replace symbol V4L2_XFER_FUNC_OPRGB :c:type:`v4l2_xfer_func` | |
| 74 | +replace define V4L2_XFER_FUNC_ADOBERGB :c:type:`v4l2_xfer_func` | |
| 73 | 75 | replace symbol V4L2_XFER_FUNC_DCI_P3 :c:type:`v4l2_xfer_func` |
| 74 | 76 | replace symbol V4L2_XFER_FUNC_DEFAULT :c:type:`v4l2_xfer_func` |
| 75 | 77 | replace symbol V4L2_XFER_FUNC_NONE :c:type:`v4l2_xfer_func` |
| @@ -129,6 +131,8 @@ replace symbol V4L2_CTRL_TYPE_STRING :c:type:`v4l2_ctrl_type` · 53 unmodified lines | ||
| 129 | 131 | replace symbol V4L2_CTRL_TYPE_U16 :c:type:`v4l2_ctrl_type` |
| 130 | 132 | replace symbol V4L2_CTRL_TYPE_U32 :c:type:`v4l2_ctrl_type` |
| 131 | 133 | replace symbol V4L2_CTRL_TYPE_U8 :c:type:`v4l2_ctrl_type` |
| 134 | +replace symbol V4L2_CTRL_TYPE_MPEG2_SLICE_PARAMS :c:type:`v4l2_ctrl_type` | |
| 135 | +replace symbol V4L2_CTRL_TYPE_MPEG2_QUANTIZATION :c:type:`v4l2_ctrl_type` | |
| 132 | 136 | |
| 133 | 137 | # V4L2 capability defines |
| 134 | 138 | replace define V4L2_CAP_VIDEO_CAPTURE device-capabilities |
| @@ -278,6 +282,7 @@ replace define V4L2_DV_BT_STD_SDI dv-bt-standards · 143 unmodified lines | ||
| 278 | 282 | |
| 279 | 283 | replace define V4L2_DV_FL_REDUCED_BLANKING dv-bt-standards |
| 280 | 284 | replace define V4L2_DV_FL_CAN_REDUCE_FPS dv-bt-standards |
| 285 | +replace define V4L2_DV_FL_CAN_DETECT_REDUCED_FPS dv-bt-standards | |
| 281 | 286 | replace define V4L2_DV_FL_REDUCED_FPS dv-bt-standards |
| 282 | 287 | replace define V4L2_DV_FL_HALF_LINE dv-bt-standards |
| 283 | 288 | replace define V4L2_DV_FL_IS_CE_VIDEO dv-bt-standards |
| @@ -514,6 +519,7 @@ ignore define V4L2_CTRL_DRIVER_PRIV · 230 unmodified lines | ||
| 514 | 519 | ignore define V4L2_CTRL_MAX_DIMS |
| 515 | 520 | ignore define V4L2_CTRL_WHICH_CUR_VAL |
| 516 | 521 | ignore define V4L2_CTRL_WHICH_DEF_VAL |
| 522 | +ignore define V4L2_CTRL_WHICH_REQUEST_VAL | |
| 517 | 523 | ignore define V4L2_OUT_CAP_CUSTOM_TIMINGS |
| 518 | 524 | ignore define V4L2_CID_MAX_CTRLS |
| 519 | 525 | |
| @@ -7,7 +7,7 @@ This document is meant as a brief overview of some aspects of the new serial · 6 unmodified lines | ||
| 7 | 7 | driver. It is not complete, any questions you have should be directed to |
| 8 | 8 | <rmk@arm.linux.org.uk> |
| 9 | 9 | |
| 10 | −The reference implementation is contained within amba_pl011.c. | |
| 10 | +The reference implementation is contained within amba-pl011.c. | |
| 11 | 11 | |
| 12 | 12 | |
| 13 | 13 | |
| @@ -0,0 +1,83 @@ | ||
| 1 | + ISO7816 SERIAL COMMUNICATIONS | |
| 2 | + | |
| 3 | +1. INTRODUCTION | |
| 4 | + | |
| 5 | + ISO/IEC7816 is a series of standards specifying integrated circuit cards (ICC) | |
| 6 | + also known as smart cards. | |
| 7 | + | |
| 8 | +2. HARDWARE-RELATED CONSIDERATIONS | |
| 9 | + | |
| 10 | + Some CPUs/UARTs (e.g., Microchip AT91) contain a built-in mode capable of | |
| 11 | + handling communication with a smart card. | |
| 12 | + | |
| 13 | + For these microcontrollers, the Linux driver should be made capable of | |
| 14 | + working in both modes, and proper ioctls (see later) should be made | |
| 15 | + available at user-level to allow switching from one mode to the other, and | |
| 16 | + vice versa. | |
| 17 | + | |
| 18 | +3. DATA STRUCTURES ALREADY AVAILABLE IN THE KERNEL | |
| 19 | + | |
| 20 | + The Linux kernel provides the serial_iso7816 structure (see [1]) to handle | |
| 21 | + ISO7816 communications. This data structure is used to set and configure | |
| 22 | + ISO7816 parameters in ioctls. | |
| 23 | + | |
| 24 | + Any driver for devices capable of working both as RS232 and ISO7816 should | |
| 25 | + implement the iso7816_config callback in the uart_port structure. The | |
| 26 | + serial_core calls iso7816_config to do the device specific part in response | |
| 27 | + to TIOCGISO7816 and TIOCSISO7816 ioctls (see below). The iso7816_config | |
| 28 | + callback receives a pointer to struct serial_iso7816. | |
| 29 | + | |
| 30 | +4. USAGE FROM USER-LEVEL | |
| 31 | + | |
| 32 | + From user-level, ISO7816 configuration can be get/set using the previous | |
| 33 | + ioctls. For instance, to set ISO7816 you can use the following code: | |
| 34 | + | |
| 35 | + #include <linux/serial.h> | |
| 36 | + | |
| 37 | + /* Include definition for ISO7816 ioctls: TIOCSISO7816 and TIOCGISO7816 */ | |
| 38 | + #include <sys/ioctl.h> | |
| 39 | + | |
| 40 | + /* Open your specific device (e.g., /dev/mydevice): */ | |
| 41 | + int fd = open ("/dev/mydevice", O_RDWR); | |
| 42 | + if (fd < 0) { | |
| 43 | + /* Error handling. See errno. */ | |
| 44 | + } | |
| 45 | + | |
| 46 | + struct serial_iso7816 iso7816conf; | |
| 47 | + | |
| 48 | + /* Reserved fields as to be zeroed */ | |
| 49 | + memset(&iso7816conf, 0, sizeof(iso7816conf)); | |
| 50 | + | |
| 51 | + /* Enable ISO7816 mode: */ | |
| 52 | + iso7816conf.flags |= SER_ISO7816_ENABLED; | |
| 53 | + | |
| 54 | + /* Select the protocol: */ | |
| 55 | + /* T=0 */ | |
| 56 | + iso7816conf.flags |= SER_ISO7816_T(0); | |
| 57 | + /* or T=1 */ | |
| 58 | + iso7816conf.flags |= SER_ISO7816_T(1); | |
| 59 | + | |
| 60 | + /* Set the guard time: */ | |
| 61 | + iso7816conf.tg = 2; | |
| 62 | + | |
| 63 | + /* Set the clock frequency*/ | |
| 64 | + iso7816conf.clk = 3571200; | |
| 65 | + | |
| 66 | + /* Set transmission factors: */ | |
| 67 | + iso7816conf.sc_fi = 372; | |
| 68 | + iso7816conf.sc_di = 1; | |
| 69 | + | |
| 70 | + if (ioctl(fd_usart, TIOCSISO7816, &iso7816conf) < 0) { | |
| 71 | + /* Error handling. See errno. */ | |
| 72 | + } | |
| 73 | + | |
| 74 | + /* Use read() and write() syscalls here... */ | |
| 75 | + | |
| 76 | + /* Close the device when finished: */ | |
| 77 | + if (close (fd) < 0) { | |
| 78 | + /* Error handling. See errno. */ | |
| 79 | + } | |
| 80 | + | |
| 81 | +5. REFERENCES | |
| 82 | + | |
| 83 | + [1] include/uapi/linux/serial.h | |
| @@ -92,6 +92,14 @@ Values : · 91 unmodified lines | ||
| 92 | 92 | 0 - disable JIT kallsyms export (default value) |
| 93 | 93 | 1 - enable JIT kallsyms export for privileged users only |
| 94 | 94 | |
| 95 | +bpf_jit_limit | |
| 96 | +------------- | |
| 97 | + | |
| 98 | +This enforces a global limit for memory allocations to the BPF JIT | |
| 99 | +compiler in order to reject unprivileged JIT requests once it has | |
| 100 | +been surpassed. bpf_jit_limit contains the value of the global limit | |
| 101 | +in bytes. | |
| 102 | + | |
| 95 | 103 | dev_weight |
| 96 | 104 | -------------- |
| 97 | 105 | |
| @@ -45,16 +45,18 @@ Synopsis of kprobe_events · 44 unmodified lines | ||
| 45 | 45 | @SYM[+|-offs] : Fetch memory at SYM +|- offs (SYM should be a data symbol) |
| 46 | 46 | $stackN : Fetch Nth entry of stack (N >= 0) |
| 47 | 47 | $stack : Fetch stack address. |
| 48 | − $retval : Fetch return value.(*) | |
| 48 | + $argN : Fetch the Nth function argument. (N >= 1) (\*1) | |
| 49 | + $retval : Fetch return value.(\*2) | |
| 49 | 50 | $comm : Fetch current task comm. |
| 50 | − +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(**) | |
| 51 | + +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(\*3) | |
| 51 | 52 | NAME=FETCHARG : Set NAME as the argument name of FETCHARG. |
| 52 | 53 | FETCHARG:TYPE : Set TYPE as the type of FETCHARG. Currently, basic types |
| 53 | 54 | (u8/u16/u32/u64/s8/s16/s32/s64), hexadecimal types |
| 54 | 55 | (x8/x16/x32/x64), "string" and bitfield are supported. |
| 55 | 56 | |
| 56 | − (*) only for return probe. | |
| 57 | − (**) this is useful for fetching a field of data structures. | |
| 57 | + (\*1) only for the probe on function entry (offs == 0). | |
| 58 | + (\*2) only for return probe. | |
| 59 | + (\*3) this is useful for fetching a field of data structures. | |
| 58 | 60 | |
| 59 | 61 | Types |
| 60 | 62 | ----- |
| @@ -64,14 +66,27 @@ respectively. 'x' prefix implies it is unsigned. Traced arguments are shown · 3 unmodified lines | ||
| 64 | 66 | in decimal ('s' and 'u') or hexadecimal ('x'). Without type casting, 'x32' |
| 65 | 67 | or 'x64' is used depends on the architecture (e.g. x86-32 uses x32, and |
| 66 | 68 | x86-64 uses x64). |
| 69 | +These value types can be an array. To record array data, you can add '[N]' | |
| 70 | +(where N is a fixed number, less than 64) to the base type. | |
| 71 | +E.g. 'x16[4]' means an array of x16 (2bytes hex) with 4 elements. | |
| 72 | +Note that the array can be applied to memory type fetchargs, you can not | |
| 73 | +apply it to registers/stack-entries etc. (for example, '$stack1:x8[8]' is | |
| 74 | +wrong, but '+8($stack):x8[8]' is OK.) | |
| 67 | 75 | String type is a special type, which fetches a "null-terminated" string from |
| 68 | 76 | kernel space. This means it will fail and store NULL if the string container |
| 69 | 77 | has been paged out. |
| 78 | +The string array type is a bit different from other types. For other base | |
| 79 | +types, <base-type>[1] is equal to <base-type> (e.g. +0(%di):x32[1] is same | |
| 80 | +as +0(%di):x32.) But string[1] is not equal to string. The string type itself | |
| 81 | +represents "char array", but string array type represents "char * array". | |
| 82 | +So, for example, +0(%di):string[1] is equal to +0(+0(%di)):string. | |
| 70 | 83 | Bitfield is another special type, which takes 3 parameters, bit-width, bit- |
| 71 | 84 | offset, and container-size (usually 32). The syntax is:: |
| 72 | 85 | |
| 73 | 86 | b<bit-width>@<bit-offset>/<container-size> |
| 74 | 87 | |
| 88 | +Symbol type('symbol') is an alias of u32 or u64 type (depends on BITS_PER_LONG) | |
| 89 | +which shows given pointer in "symbol+offset" style. | |
| 75 | 90 | For $comm, the default type is "string"; any other type is invalid. |
| 76 | 91 | |
| 77 | 92 | |
| @@ -1,15 +1,12 @@ | ||
| 1 | −Last reviewed: 05/20/2016 | |
| 1 | +Last reviewed: 08/20/2018 | |
| 2 | 2 | |
| 3 | 3 | HPE iLO NMI Watchdog Driver |
| 4 | − NMI sourcing for iLO based ProLiant Servers | |
| 5 | − Documentation and Driver by | |
| 6 | − Thomas Mingarelli | |
| 4 | + for iLO based ProLiant Servers | |
| 7 | 5 | |
| 8 | 6 | The HPE iLO NMI Watchdog driver is a kernel module that provides basic |
| 9 | − watchdog functionality and the added benefit of NMI sourcing. Both the | |
| 10 | − watchdog functionality and the NMI sourcing capability need to be enabled | |
| 11 | − by the user. Remember that the two modes are not dependent on one another. | |
| 12 | − A user can have the NMI sourcing without the watchdog timer and vice-versa. | |
| 7 | + watchdog functionality and handler for the iLO "Generate NMI to System" | |
| 8 | + virtual button. | |
| 9 | + | |
| 13 | 10 | All references to iLO in this document imply it also works on iLO2 and all |
| 14 | 11 | subsequent generations. |
| 15 | 12 | |
| @@ -21,12 +18,16 @@ Last reviewed: 05/20/2016 · 5 unmodified lines | ||
| 21 | 18 | not be updated in a timely fashion and a hardware system reset (also known as |
| 22 | 19 | an Automatic Server Recovery (ASR)) event will occur. |
| 23 | 20 | |
| 24 | − The hpwdt driver also has three (3) module parameters. They are the following: | |
| 21 | + The hpwdt driver also has the following module parameters: | |
| 25 | 22 | |
| 26 | 23 | soft_margin - allows the user to set the watchdog timer value. |
| 27 | 24 | Default value is 30 seconds. |
| 28 | − allow_kdump - allows the user to save off a kernel dump image after an NMI. | |
| 29 | − Default value is 1/ON | |
| 25 | + timeout - an alias of soft_margin. | |
| 26 | + pretimeout - allows the user to set the watchdog pretimeout value. | |
| 27 | + This is the number of seconds before timeout when an | |
| 28 | + NMI is delivered to the system. Setting the value to | |
| 29 | + zero disables the pretimeout NMI. | |
| 30 | + Default value is 9 seconds. | |
| 30 | 31 | nowayout - basic watchdog parameter that does not allow the timer to |
| 31 | 32 | be restarted or an impending ASR to be escaped. |
| 32 | 33 | Default value is set when compiling the kernel. If it is set |
| @@ -37,61 +38,29 @@ Last reviewed: 05/20/2016 · 4 unmodified lines | ||
| 37 | 38 | interface to /dev/watchdog can be found in |
| 38 | 39 | Documentation/watchdog/watchdog-api.txt and Documentation/IPMI.txt. |
| 39 | 40 | |
| 40 | − The NMI sourcing capability is disabled by default due to the inability to | |
| 41 | − distinguish between "NMI Watchdog Ticks" and "HW generated NMI events" in the | |
| 42 | − Linux kernel. What this means is that the hpwdt nmi handler code is called | |
| 43 | − each time the NMI signal fires off. This could amount to several thousands of | |
| 44 | − NMIs in a matter of seconds. If a user sees the Linux kernel's "dazed and | |
| 45 | − confused" message in the logs or if the system gets into a hung state, then | |
| 46 | − the hpwdt driver can be reloaded. | |
| 47 | − | |
| 48 | − 1. If the kernel has not been booted with nmi_watchdog turned off then | |
| 49 | − edit and place the nmi_watchdog=0 at the end of the currently booting | |
| 50 | − kernel line. Depending on your Linux distribution and platform setup: | |
| 51 | − For non-UEFI systems | |
| 52 | − /boot/grub/grub.conf or | |
| 53 | − /boot/grub/menu.lst | |
| 54 | − For UEFI systems | |
| 55 | − /boot/efi/EFI/distroname/grub.conf or | |
| 56 | − /boot/efi/efi/distroname/elilo.conf | |
| 57 | − 2. reboot the sever | |
| 58 | − 3. Once the system comes up perform a modprobe -r hpwdt | |
| 59 | − 4. modprobe /lib/modules/`uname -r`/kernel/drivers/watchdog/hpwdt.ko | |
| 60 | − | |
| 61 | − Now, the hpwdt can successfully receive and source the NMI and provide a log | |
| 62 | − message that details the reason for the NMI (as determined by the HPE BIOS). | |
| 63 | − | |
| 64 | − Below is a list of NMIs the HPE BIOS understands along with the associated | |
| 65 | − code (reason): | |
| 66 | − | |
| 67 | − No source found 00h | |
| 68 | − | |
| 69 | − Uncorrectable Memory Error 01h | |
| 70 | − | |
| 71 | − ASR NMI 1Bh | |
| 72 | − | |
| 73 | − PCI Parity Error 20h | |
| 74 | − | |
| 75 | − NMI Button Press 27h | |
| 76 | − | |
| 77 | − SB_BUS_NMI 28h | |
| 78 | − | |
| 79 | − ILO Doorbell NMI 29h | |
| 80 | − | |
| 81 | − ILO IOP NMI 2Ah | |
| 82 | − | |
| 83 | − ILO Watchdog NMI 2Bh | |
| 84 | − | |
| 85 | − Proc Throt NMI 2Ch | |
| 41 | + Due to limitations in the iLO hardware, the NMI pretimeout if enabled, | |
| 42 | + can only be set to 9 seconds. Attempts to set pretimeout to other | |
| 43 | + non-zero values will be rounded, possibly to zero. Users should verify | |
| 44 | + the pretimeout value after attempting to set pretimeout or timeout. | |
| 86 | 45 | |
| 87 | − Front Side Bus NMI 2Dh | |
| 46 | + Upon receipt of an NMI from the iLO, the hpwdt driver will initiate a | |
| 47 | + panic. This is to allow for a crash dump to be collected. It is incumbent | |
| 48 | + upon the user to have properly configured the system for kdump. | |
| 88 | 49 | |
| 89 | − PCI Express Error 2Fh | |
| 50 | + The default Linux kernel behavior upon panic is to print a kernel tombstone | |
| 51 | + and loop forever. This is generally not what a watchdog user wants. | |
| 90 | 52 | |
| 91 | − DMA controller NMI 30h | |
| 53 | + For those wishing to learn more please see: | |
| 54 | + Documentation/kdump/kdump.txt | |
| 55 | + Documentation/admin-guide/kernel-parameters.txt (panic=) | |
| 56 | + Your Linux Distribution specific documentation. | |
| 92 | 57 | |
| 93 | − Hypertransport/CSI Error 31h | |
| 58 | + If the hpwdt does not receive the NMI associated with an expiring timer, | |
| 59 | + the iLO will proceed to reset the system at timeout if the timer hasn't | |
| 60 | + been updated. | |
| 94 | 61 | |
| 62 | +-- | |
| 95 | 63 | |
| 64 | + The HPE iLO NMI Watchdog Driver and documentation were originally developed | |
| 65 | + by Tom Mingarelli. | |
| 96 | 66 | |
| 97 | − -- Tom Mingarelli | |
| @@ -40,6 +40,11 @@ margin: Watchdog margin in seconds (default=60) · 39 unmodified lines | ||
| 40 | 40 | nowayout: Disable watchdog shutdown on close |
| 41 | 41 | (default=kernel config parameter) |
| 42 | 42 | ------------------------------------------------- |
| 43 | +armada_37xx_wdt: | |
| 44 | +timeout: Watchdog timeout in seconds. (default=120) | |
| 45 | +nowayout: Disable watchdog shutdown on close | |
| 46 | + (default=kernel config parameter) | |
| 47 | +------------------------------------------------- | |
| 43 | 48 | at91rm9200_wdt: |
| 44 | 49 | wdt_time: Watchdog time in seconds. (default=5) |
| 45 | 50 | nowayout: Watchdog cannot be stopped once started |
| @@ -0,0 +1,67 @@ | ||
| 1 | +--------------------------------------------------------------------- | |
| 2 | +Xilinx Zynq MPSoC EEMI Documentation | |
| 3 | +--------------------------------------------------------------------- | |
| 4 | + | |
| 5 | +Xilinx Zynq MPSoC Firmware Interface | |
| 6 | +------------------------------------- | |
| 7 | +The zynqmp-firmware node describes the interface to platform firmware. | |
| 8 | +ZynqMP has an interface to communicate with secure firmware. Firmware | |
| 9 | +driver provides an interface to firmware APIs. Interface APIs can be | |
| 10 | +used by any driver to communicate with PMC(Platform Management Controller). | |
| 11 | + | |
| 12 | +Embedded Energy Management Interface (EEMI) | |
| 13 | +---------------------------------------------- | |
| 14 | +The embedded energy management interface is used to allow software | |
| 15 | +components running across different processing clusters on a chip or | |
| 16 | +device to communicate with a power management controller (PMC) on a | |
| 17 | +device to issue or respond to power management requests. | |
| 18 | + | |
| 19 | +EEMI ops is a structure containing all eemi APIs supported by Zynq MPSoC. | |
| 20 | +The zynqmp-firmware driver maintain all EEMI APIs in zynqmp_eemi_ops | |
| 21 | +structure. Any driver who want to communicate with PMC using EEMI APIs | |
| 22 | +can call zynqmp_pm_get_eemi_ops(). | |
| 23 | + | |
| 24 | +Example of EEMI ops: | |
| 25 | + | |
| 26 | + /* zynqmp-firmware driver maintain all EEMI APIs */ | |
| 27 | + struct zynqmp_eemi_ops { | |
| 28 | + int (*get_api_version)(u32 *version); | |
| 29 | + int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out); | |
| 30 | + }; | |
| 31 | + | |
| 32 | + static const struct zynqmp_eemi_ops eemi_ops = { | |
| 33 | + .get_api_version = zynqmp_pm_get_api_version, | |
| 34 | + .query_data = zynqmp_pm_query_data, | |
| 35 | + }; | |
| 36 | + | |
| 37 | +Example of EEMI ops usage: | |
| 38 | + | |
| 39 | + static const struct zynqmp_eemi_ops *eemi_ops; | |
| 40 | + u32 ret_payload[PAYLOAD_ARG_CNT]; | |
| 41 | + int ret; | |
| 42 | + | |
| 43 | + eemi_ops = zynqmp_pm_get_eemi_ops(); | |
| 44 | + if (!eemi_ops) | |
| 45 | + return -ENXIO; | |
| 46 | + | |
| 47 | + ret = eemi_ops->query_data(qdata, ret_payload); | |
| 48 | + | |
| 49 | +IOCTL | |
| 50 | +------ | |
| 51 | +IOCTL API is for device control and configuration. It is not a system | |
| 52 | +IOCTL but it is an EEMI API. This API can be used by master to control | |
| 53 | +any device specific configuration. IOCTL definitions can be platform | |
| 54 | +specific. This API also manage shared device configuration. | |
| 55 | + | |
| 56 | +The following IOCTL IDs are valid for device control: | |
| 57 | +- IOCTL_SET_PLL_FRAC_MODE 8 | |
| 58 | +- IOCTL_GET_PLL_FRAC_MODE 9 | |
| 59 | +- IOCTL_SET_PLL_FRAC_DATA 10 | |
| 60 | +- IOCTL_GET_PLL_FRAC_DATA 11 | |
| 61 | + | |
| 62 | +Refer EEMI API guide [0] for IOCTL specific parameters and other EEMI APIs. | |
| 63 | + | |
| 64 | +References | |
| 65 | +---------- | |
| 66 | +[0] Embedded Energy Management Interface (EEMI) API guide: | |
| 67 | + https://www.xilinx.com/support/documentation/user_guides/ug1200-eemi-api.pdf | |
| @@ -535,7 +535,7 @@ F: Documentation/hwmon/adt7475 · 534 unmodified lines | ||
| 535 | 535 | F: drivers/hwmon/adt7475.c |
| 536 | 536 | |
| 537 | 537 | ADVANSYS SCSI DRIVER |
| 538 | −M: Matthew Wilcox <matthew@wil.cx> | |
| 538 | +M: Matthew Wilcox <willy@infradead.org> | |
| 539 | 539 | M: Hannes Reinecke <hare@suse.com> |
| 540 | 540 | L: linux-scsi@vger.kernel.org |
| 541 | 541 | S: Maintained |
| @@ -549,6 +549,15 @@ W: http://ez.analog.com/community/linux-device-drivers · 7 unmodified lines | ||
| 549 | 549 | S: Supported |
| 550 | 550 | F: drivers/input/misc/adxl34x.c |
| 551 | 551 | |
| 552 | +ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER | |
| 553 | +M: Stefan Popa <stefan.popa@analog.com> | |
| 554 | +W: http://ez.analog.com/community/linux-device-drivers | |
| 555 | +S: Supported | |
| 556 | +F: drivers/iio/accel/adxl372.c | |
| 557 | +F: drivers/iio/accel/adxl372_spi.c | |
| 558 | +F: drivers/iio/accel/adxl372_i2c.c | |
| 559 | +F: Documentation/devicetree/bindings/iio/accel/adxl372.txt | |
| 560 | + | |
| 552 | 561 | AF9013 MEDIA DRIVER |
| 553 | 562 | M: Antti Palosaari <crope@iki.fi> |
| 554 | 563 | L: linux-media@vger.kernel.org |
| @@ -662,6 +671,13 @@ L: linux-crypto@vger.kernel.org · 107 unmodified lines | ||
| 662 | 671 | S: Maintained |
| 663 | 672 | F: drivers/crypto/sunxi-ss/ |
| 664 | 673 | |
| 674 | +ALLWINNER VPU DRIVER | |
| 675 | +M: Maxime Ripard <maxime.ripard@bootlin.com> | |
| 676 | +M: Paul Kocialkowski <paul.kocialkowski@bootlin.com> | |
| 677 | +L: linux-media@vger.kernel.org | |
| 678 | +S: Maintained | |
| 679 | +F: drivers/staging/media/sunxi/cedrus/ | |
| 680 | + | |
| 665 | 681 | ALPHA PORT |
| 666 | 682 | M: Richard Henderson <rth@twiddle.net> |
| 667 | 683 | M: Ivan Kokshaysky <ink@jurassic.park.msu.ru> |
| @@ -1078,6 +1094,29 @@ F: arch/arm/include/asm/arch_timer.h · 410 unmodified lines | ||
| 1078 | 1094 | F: arch/arm64/include/asm/arch_timer.h |
| 1079 | 1095 | F: drivers/clocksource/arm_arch_timer.c |
| 1080 | 1096 | |
| 1097 | +ARM INTEGRATOR, VERSATILE AND REALVIEW SUPPORT | |
| 1098 | +M: Linus Walleij <linus.walleij@linaro.org> | |
| 1099 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 1100 | +S: Maintained | |
| 1101 | +F: Documentation/devicetree/bindings/arm/arm-boards | |
| 1102 | +F: Documentation/devicetree/bindings/auxdisplay/arm-charlcd.txt | |
| 1103 | +F: Documentation/devicetree/bindings/clock/arm-integrator.txt | |
| 1104 | +F: Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt | |
| 1105 | +F: Documentation/devicetree/bindings/mtd/arm-versatile.txt | |
| 1106 | +F: arch/arm/mach-integrator/ | |
| 1107 | +F: arch/arm/mach-realview/ | |
| 1108 | +F: arch/arm/mach-versatile/ | |
| 1109 | +F: arch/arm/plat-versatile/ | |
| 1110 | +F: arch/arm/boot/dts/arm-realview-* | |
| 1111 | +F: arch/arm/boot/dts/integrator* | |
| 1112 | +F: arch/arm/boot/dts/versatile* | |
| 1113 | +F: drivers/clk/versatile/ | |
| 1114 | +F: drivers/i2c/busses/i2c-versatile.c | |
| 1115 | +F: drivers/irqchip/irq-versatile-fpga.c | |
| 1116 | +F: drivers/mtd/maps/physmap_of_versatile.c | |
| 1117 | +F: drivers/power/reset/arm-versatile-reboot.c | |
| 1118 | +F: drivers/soc/versatile/ | |
| 1119 | + | |
| 1081 | 1120 | ARM HDLCD DRM DRIVER |
| 1082 | 1121 | M: Liviu Dudau <liviu.dudau@arm.com> |
| 1083 | 1122 | S: Supported |
| @@ -1150,12 +1189,26 @@ S: Odd Fixes · 66 unmodified lines | ||
| 1150 | 1189 | F: drivers/mmc/host/mmci.* |
| 1151 | 1190 | F: include/linux/amba/mmci.h |
| 1152 | 1191 | |
| 1192 | +ARM PRIMECELL SSP PL022 SPI DRIVER | |
| 1193 | +M: Linus Walleij <linus.walleij@linaro.org> | |
| 1194 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 1195 | +S: Maintained | |
| 1196 | +F: Documentation/devicetree/bindings/spi/spi_pl022.txt | |
| 1197 | +F: drivers/spi/spi-pl022.c | |
| 1198 | + | |
| 1153 | 1199 | ARM PRIMECELL UART PL010 AND PL011 DRIVERS |
| 1154 | 1200 | M: Russell King <linux@armlinux.org.uk> |
| 1155 | 1201 | S: Odd Fixes |
| 1156 | 1202 | F: drivers/tty/serial/amba-pl01*.c |
| 1157 | 1203 | F: include/linux/amba/serial.h |
| 1158 | 1204 | |
| 1205 | +ARM PRIMECELL VIC PL190/PL192 DRIVER | |
| 1206 | +M: Linus Walleij <linus.walleij@linaro.org> | |
| 1207 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 1208 | +S: Maintained | |
| 1209 | +F: Documentation/devicetree/bindings/interrupt-controller/arm,vic.txt | |
| 1210 | +F: drivers/irqchip/irq-vic.c | |
| 1211 | + | |
| 1159 | 1212 | ARM SMMU DRIVERS |
| 1160 | 1213 | M: Will Deacon <will.deacon@arm.com> |
| 1161 | 1214 | R: Robin Murphy <robin.murphy@arm.com> |
| @@ -1175,18 +1228,25 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git · 13 unmodified lines | ||
| 1175 | 1228 | |
| 1176 | 1229 | ARM/ACTIONS SEMI ARCHITECTURE |
| 1177 | 1230 | M: Andreas Färber <afaerber@suse.de> |
| 1231 | +R: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | |
| 1178 | 1232 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1179 | 1233 | S: Maintained |
| 1180 | 1234 | N: owl |
| 1181 | 1235 | F: arch/arm/mach-actions/ |
| 1182 | 1236 | F: arch/arm/boot/dts/owl-* |
| 1183 | 1237 | F: arch/arm64/boot/dts/actions/ |
| 1238 | +F: drivers/clk/actions/ | |
| 1184 | 1239 | F: drivers/clocksource/timer-owl* |
| 1240 | +F: drivers/dma/owl-dma.c | |
| 1241 | +F: drivers/i2c/busses/i2c-owl.c | |
| 1185 | 1242 | F: drivers/pinctrl/actions/* |
| 1186 | 1243 | F: drivers/soc/actions/ |
| 1187 | 1244 | F: include/dt-bindings/power/owl-* |
| 1188 | 1245 | F: include/linux/soc/actions/ |
| 1189 | 1246 | F: Documentation/devicetree/bindings/arm/actions.txt |
| 1247 | +F: Documentation/devicetree/bindings/clock/actions,owl-cmu.txt | |
| 1248 | +F: Documentation/devicetree/bindings/dma/owl-dma.txt | |
| 1249 | +F: Documentation/devicetree/bindings/i2c/i2c-owl.txt | |
| 1190 | 1250 | F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt |
| 1191 | 1251 | F: Documentation/devicetree/bindings/power/actions,owl-sps.txt |
| 1192 | 1252 | F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt |
| @@ -1462,7 +1522,9 @@ F: arch/arm/mach-mxs/ · 269 unmodified lines | ||
| 1462 | 1522 | F: arch/arm/boot/dts/imx* |
| 1463 | 1523 | F: arch/arm/configs/imx*_defconfig |
| 1464 | 1524 | F: drivers/clk/imx/ |
| 1525 | +F: drivers/firmware/imx/ | |
| 1465 | 1526 | F: drivers/soc/imx/ |
| 1527 | +F: include/linux/firmware/imx/ | |
| 1466 | 1528 | F: include/soc/imx/ |
| 1467 | 1529 | |
| 1468 | 1530 | ARM/FREESCALE VYBRID ARM ARCHITECTURE |
| @@ -1599,12 +1661,10 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 130 unmodified lines | ||
| 1599 | 1661 | S: Maintained |
| 1600 | 1662 | |
| 1601 | 1663 | ARM/LPC18XX ARCHITECTURE |
| 1602 | −M: Joachim Eastwood <manabian@gmail.com> | |
| 1664 | +M: Vladimir Zapolskiy <vz@mleia.com> | |
| 1603 | 1665 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1604 | 1666 | S: Maintained |
| 1605 | 1667 | F: arch/arm/boot/dts/lpc43* |
| 1606 | −F: drivers/clk/nxp/clk-lpc18xx* | |
| 1607 | −F: drivers/clocksource/timer-lpc32xx.c | |
| 1608 | 1668 | F: drivers/i2c/busses/i2c-lpc2k.c |
| 1609 | 1669 | F: drivers/memory/pl172.c |
| 1610 | 1670 | F: drivers/mtd/spi-nor/nxp-spifi.c |
| @@ -1703,9 +1763,10 @@ S: Odd Fixes · 92 unmodified lines | ||
| 1703 | 1763 | ARM/Microchip (AT91) SoC support |
| 1704 | 1764 | M: Nicolas Ferre <nicolas.ferre@microchip.com> |
| 1705 | 1765 | M: Alexandre Belloni <alexandre.belloni@bootlin.com> |
| 1766 | +M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 1706 | 1767 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1707 | 1768 | W: http://www.linux4sam.org |
| 1708 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91.git | |
| 1769 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux.git | |
| 1709 | 1770 | S: Supported |
| 1710 | 1771 | N: at91 |
| 1711 | 1772 | N: atmel |
| @@ -2085,22 +2146,24 @@ F: include/linux/remoteproc/st_slim_rproc.h · 373 unmodified lines | ||
| 2085 | 2146 | ARM/STM32 ARCHITECTURE |
| 2086 | 2147 | M: Maxime Coquelin <mcoquelin.stm32@gmail.com> |
| 2087 | 2148 | M: Alexandre Torgue <alexandre.torgue@st.com> |
| 2149 | +L: linux-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers) | |
| 2088 | 2150 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 2089 | 2151 | S: Maintained |
| 2090 | 2152 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git stm32-next |
| 2091 | 2153 | N: stm32 |
| 2154 | +N: stm | |
| 2092 | 2155 | F: arch/arm/boot/dts/stm32* |
| 2093 | 2156 | F: arch/arm/mach-stm32/ |
| 2094 | 2157 | F: drivers/clocksource/armv7m_systick.c |
| 2095 | 2158 | |
| 2096 | −ARM/Synaptics Berlin SoC support | |
| 2159 | +ARM/Synaptics SoC support | |
| 2097 | 2160 | M: Jisheng Zhang <Jisheng.Zhang@synaptics.com> |
| 2098 | 2161 | M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> |
| 2099 | 2162 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 2100 | 2163 | S: Maintained |
| 2101 | 2164 | F: arch/arm/mach-berlin/ |
| 2102 | 2165 | F: arch/arm/boot/dts/berlin* |
| 2103 | −F: arch/arm64/boot/dts/marvell/berlin* | |
| 2166 | +F: arch/arm64/boot/dts/synaptics/ | |
| 2104 | 2167 | |
| 2105 | 2168 | ARM/TANGO ARCHITECTURE |
| 2106 | 2169 | M: Marc Gonzalez <marc.w.gonzalez@free.fr> |
| @@ -2264,7 +2327,6 @@ F: arch/arm/mach-pxa/include/mach/z2.h · 157 unmodified lines | ||
| 2264 | 2327 | |
| 2265 | 2328 | ARM/ZTE ARCHITECTURE |
| 2266 | 2329 | M: Jun Nie <jun.nie@linaro.org> |
| 2267 | −M: Baoyou Xie <baoyou.xie@linaro.org> | |
| 2268 | 2330 | M: Shawn Guo <shawnguo@kernel.org> |
| 2269 | 2331 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 2270 | 2332 | S: Maintained |
| @@ -2472,42 +2534,6 @@ F: drivers/atm/ · 201 unmodified lines | ||
| 2472 | 2534 | F: include/linux/atm* |
| 2473 | 2535 | F: include/uapi/linux/atm* |
| 2474 | 2536 | |
| 2475 | −ATMEL AT91 / AT32 MCI DRIVER | |
| 2476 | −M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 2477 | −S: Maintained | |
| 2478 | −F: drivers/mmc/host/atmel-mci.c | |
| 2479 | − | |
| 2480 | −ATMEL AT91 SAMA5D2-Compatible Shutdown Controller | |
| 2481 | −M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 2482 | −S: Supported | |
| 2483 | −F: drivers/power/reset/at91-sama5d2_shdwc.c | |
| 2484 | − | |
| 2485 | −ATMEL Audio ALSA driver | |
| 2486 | −M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 2487 | −L: alsa-devel@alsa-project.org (moderated for non-subscribers) | |
| 2488 | −S: Supported | |
| 2489 | −F: sound/soc/atmel | |
| 2490 | − | |
| 2491 | −ATMEL I2C DRIVER | |
| 2492 | −M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 2493 | −L: linux-i2c@vger.kernel.org | |
| 2494 | −S: Supported | |
| 2495 | −F: drivers/i2c/busses/i2c-at91.c | |
| 2496 | − | |
| 2497 | −ATMEL ISI DRIVER | |
| 2498 | −M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 2499 | −L: linux-media@vger.kernel.org | |
| 2500 | −S: Supported | |
| 2501 | −F: drivers/media/platform/atmel/atmel-isi.c | |
| 2502 | −F: include/media/atmel-isi.h | |
| 2503 | − | |
| 2504 | −ATMEL LCDFB DRIVER | |
| 2505 | −M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 2506 | −L: linux-fbdev@vger.kernel.org | |
| 2507 | −S: Maintained | |
| 2508 | −F: drivers/video/fbdev/atmel_lcdfb.c | |
| 2509 | −F: include/video/atmel_lcdc.h | |
| 2510 | − | |
| 2511 | 2537 | ATMEL MACB ETHERNET DRIVER |
| 2512 | 2538 | M: Nicolas Ferre <nicolas.ferre@microchip.com> |
| 2513 | 2539 | S: Supported |
| @@ -2520,43 +2546,6 @@ S: Maintained · 6 unmodified lines | ||
| 2520 | 2546 | F: Documentation/devicetree/bindings/input/atmel,maxtouch.txt |
| 2521 | 2547 | F: drivers/input/touchscreen/atmel_mxt_ts.c |
| 2522 | 2548 | |
| 2523 | −ATMEL SAMA5D2 ADC DRIVER | |
| 2524 | −M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 2525 | −L: linux-iio@vger.kernel.org | |
| 2526 | −S: Supported | |
| 2527 | −F: drivers/iio/adc/at91-sama5d2_adc.c | |
| 2528 | − | |
| 2529 | −ATMEL SDMMC DRIVER | |
| 2530 | −M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 2531 | −L: linux-mmc@vger.kernel.org | |
| 2532 | −S: Supported | |
| 2533 | −F: drivers/mmc/host/sdhci-of-at91.c | |
| 2534 | − | |
| 2535 | −ATMEL SPI DRIVER | |
| 2536 | −M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 2537 | −S: Supported | |
| 2538 | −F: drivers/spi/spi-atmel.* | |
| 2539 | − | |
| 2540 | −ATMEL SSC DRIVER | |
| 2541 | −M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 2542 | −L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 2543 | −S: Supported | |
| 2544 | −F: drivers/misc/atmel-ssc.c | |
| 2545 | −F: include/linux/atmel-ssc.h | |
| 2546 | − | |
| 2547 | −ATMEL Timer Counter (TC) AND CLOCKSOURCE DRIVERS | |
| 2548 | −M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 2549 | −L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 2550 | −S: Supported | |
| 2551 | −F: drivers/misc/atmel_tclib.c | |
| 2552 | −F: drivers/clocksource/tcb_clksrc.c | |
| 2553 | − | |
| 2554 | −ATMEL USBA UDC DRIVER | |
| 2555 | −M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 2556 | −L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 2557 | −S: Supported | |
| 2558 | −F: drivers/usb/gadget/udc/atmel_usba_udc.* | |
| 2559 | − | |
| 2560 | 2549 | ATMEL WIRELESS DRIVER |
| 2561 | 2550 | M: Simon Kelley <simon@thekelleys.org.uk> |
| 2562 | 2551 | L: linux-wireless@vger.kernel.org |
| @@ -2565,13 +2554,6 @@ W: http://atmelwlandriver.sourceforge.net/ · 2 unmodified lines | ||
| 2565 | 2554 | S: Maintained |
| 2566 | 2555 | F: drivers/net/wireless/atmel/atmel* |
| 2567 | 2556 | |
| 2568 | −ATMEL XDMA DRIVER | |
| 2569 | −M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 2570 | −L: linux-arm-kernel@lists.infradead.org | |
| 2571 | −L: dmaengine@vger.kernel.org | |
| 2572 | −S: Supported | |
| 2573 | −F: drivers/dma/at_xdmac.c | |
| 2574 | − | |
| 2575 | 2557 | ATOMIC INFRASTRUCTURE |
| 2576 | 2558 | M: Will Deacon <will.deacon@arm.com> |
| 2577 | 2559 | M: Peter Zijlstra <peterz@infradead.org> |
| @@ -3185,7 +3167,7 @@ F: drivers/gpio/gpio-bt8xx.c · 607 unmodified lines | ||
| 3185 | 3167 | |
| 3186 | 3168 | BTRFS FILE SYSTEM |
| 3187 | 3169 | M: Chris Mason <clm@fb.com> |
| 3188 | −M: Josef Bacik <jbacik@fb.com> | |
| 3170 | +M: Josef Bacik <josef@toxicpanda.com> | |
| 3189 | 3171 | M: David Sterba <dsterba@suse.com> |
| 3190 | 3172 | L: linux-btrfs@vger.kernel.org |
| 3191 | 3173 | W: http://btrfs.wiki.kernel.org/ |
| @@ -3229,6 +3211,15 @@ T: git git://git.alsa-project.org/alsa-kernel.git · 37 unmodified lines | ||
| 3229 | 3211 | S: Maintained |
| 3230 | 3212 | F: sound/pci/oxygen/ |
| 3231 | 3213 | |
| 3214 | +C-SKY ARCHITECTURE | |
| 3215 | +M: Guo Ren <ren_guo@c-sky.com> | |
| 3216 | +T: git https://github.com/c-sky/csky-linux.git | |
| 3217 | +S: Supported | |
| 3218 | +F: arch/csky/ | |
| 3219 | +F: Documentation/devicetree/bindings/csky/ | |
| 3220 | +K: csky | |
| 3221 | +N: csky | |
| 3222 | + | |
| 3232 | 3223 | C6X ARCHITECTURE |
| 3233 | 3224 | M: Mark Salter <msalter@redhat.com> |
| 3234 | 3225 | M: Aurelien Jacquiot <jacquiot.aurelien@gmail.com> |
| @@ -3839,7 +3830,6 @@ W: http://www.arm.com/products/processors/technologies/biglittleprocessing.php · 604 unmodified lines | ||
| 3839 | 3830 | S: Maintained |
| 3840 | 3831 | F: drivers/cpufreq/arm_big_little.h |
| 3841 | 3832 | F: drivers/cpufreq/arm_big_little.c |
| 3842 | −F: drivers/cpufreq/arm_big_little_dt.c | |
| 3843 | 3833 | |
| 3844 | 3834 | CPU POWER MONITORING SUBSYSTEM |
| 3845 | 3835 | M: Thomas Renninger <trenn@suse.com> |
| @@ -4099,7 +4089,7 @@ D-LINK DIR-685 TOUCHKEYS DRIVER · 253 unmodified lines | ||
| 4099 | 4089 | M: Linus Walleij <linus.walleij@linaro.org> |
| 4100 | 4090 | L: linux-input@vger.kernel.org |
| 4101 | 4091 | S: Supported |
| 4102 | −F: drivers/input/dlink-dir685-touchkeys.c | |
| 4092 | +F: drivers/input/keyboard/dlink-dir685-touchkeys.c | |
| 4103 | 4093 | |
| 4104 | 4094 | DALLAS/MAXIM DS1685-FAMILY REAL TIME CLOCK |
| 4105 | 4095 | M: Joshua Kinard <kumba@gentoo.org> |
| @@ -4379,13 +4369,6 @@ L: linux-gpio@vger.kernel.org · 273 unmodified lines | ||
| 4379 | 4369 | S: Maintained |
| 4380 | 4370 | F: drivers/gpio/gpio-gpio-mm.c |
| 4381 | 4371 | |
| 4382 | −DIGI NEO AND CLASSIC PCI PRODUCTS | |
| 4383 | −M: Lidza Louina <lidza.louina@gmail.com> | |
| 4384 | −M: Mark Hounschell <markh@compro.net> | |
| 4385 | −L: driverdev-devel@linuxdriverproject.org | |
| 4386 | −S: Maintained | |
| 4387 | −F: drivers/staging/dgnc/ | |
| 4388 | − | |
| 4389 | 4372 | DIOLAN U2C-12 I2C DRIVER |
| 4390 | 4373 | M: Guenter Roeck <linux@roeck-us.net> |
| 4391 | 4374 | L: linux-i2c@vger.kernel.org |
| @@ -4393,7 +4376,7 @@ S: Maintained · 1 unmodified line | ||
| 4393 | 4376 | F: drivers/i2c/busses/i2c-diolan-u2c.c |
| 4394 | 4377 | |
| 4395 | 4378 | FILESYSTEM DIRECT ACCESS (DAX) |
| 4396 | −M: Matthew Wilcox <mawilcox@microsoft.com> | |
| 4379 | +M: Matthew Wilcox <willy@infradead.org> | |
| 4397 | 4380 | M: Ross Zwisler <zwisler@kernel.org> |
| 4398 | 4381 | M: Jan Kara <jack@suse.cz> |
| 4399 | 4382 | L: linux-fsdevel@vger.kernel.org |
| @@ -4535,13 +4518,15 @@ L: linux-media@vger.kernel.org · 135 unmodified lines | ||
| 4535 | 4518 | T: git git://linuxtv.org/media_tree.git |
| 4536 | 4519 | S: Maintained |
| 4537 | 4520 | F: drivers/media/i2c/dw9714.c |
| 4521 | +F: Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.txt | |
| 4538 | 4522 | |
| 4539 | 4523 | DONGWOON DW9807 LENS VOICE COIL DRIVER |
| 4540 | 4524 | M: Sakari Ailus <sakari.ailus@linux.intel.com> |
| 4541 | 4525 | L: linux-media@vger.kernel.org |
| 4542 | 4526 | T: git git://linuxtv.org/media_tree.git |
| 4543 | 4527 | S: Maintained |
| 4544 | −F: drivers/media/i2c/dw9807.c | |
| 4528 | +F: drivers/media/i2c/dw9807-vcm.c | |
| 4529 | +F: Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt | |
| 4545 | 4530 | |
| 4546 | 4531 | DOUBLETALK DRIVER |
| 4547 | 4532 | M: "James R. Van Zandt" <jrv@vanzandt.mv.com> |
| @@ -4756,8 +4741,11 @@ F: drivers/gpu/drm/tdfx/ · 208 unmodified lines | ||
| 4756 | 4741 | |
| 4757 | 4742 | DRM DRIVER FOR USB DISPLAYLINK VIDEO ADAPTERS |
| 4758 | 4743 | M: Dave Airlie <airlied@redhat.com> |
| 4744 | +R: Sean Paul <sean@poorly.run> | |
| 4745 | +L: dri-devel@lists.freedesktop.org | |
| 4759 | 4746 | S: Odd Fixes |
| 4760 | 4747 | F: drivers/gpu/drm/udl/ |
| 4748 | +T: git git://anongit.freedesktop.org/drm/drm-misc | |
| 4761 | 4749 | |
| 4762 | 4750 | DRM DRIVER FOR VMWARE VIRTUAL GPU |
| 4763 | 4751 | M: "VMware Graphics" <linux-graphics-maintainer@vmware.com> |
| @@ -4787,8 +4775,8 @@ F: include/uapi/drm/ · 23 unmodified lines | ||
| 4787 | 4775 | F: include/linux/vga* |
| 4788 | 4776 | |
| 4789 | 4777 | DRM DRIVERS AND MISC GPU PATCHES |
| 4790 | −M: Gustavo Padovan <gustavo@padovan.org> | |
| 4791 | 4778 | M: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> |
| 4779 | +M: Maxime Ripard <maxime.ripard@bootlin.com> | |
| 4792 | 4780 | M: Sean Paul <sean@poorly.run> |
| 4793 | 4781 | W: https://01.org/linuxgraphics/gfx-docs/maintainer-tools/drm-misc.html |
| 4794 | 4782 | S: Maintained |
| @@ -4857,6 +4845,7 @@ F: drivers/gpu/drm/fsl-dcu/ · 62 unmodified lines | ||
| 4857 | 4845 | F: Documentation/devicetree/bindings/display/fsl,dcu.txt |
| 4858 | 4846 | F: Documentation/devicetree/bindings/display/fsl,tcon.txt |
| 4859 | 4847 | F: Documentation/devicetree/bindings/display/panel/nec,nl4827hc19-05b.txt |
| 4848 | +T: git git://anongit.freedesktop.org/drm/drm-misc | |
| 4860 | 4849 | |
| 4861 | 4850 | DRM DRIVERS FOR FREESCALE IMX |
| 4862 | 4851 | M: Philipp Zabel <p.zabel@pengutronix.de> |
| @@ -4906,9 +4895,10 @@ F: Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt · 43 unmodified lines | ||
| 4906 | 4895 | |
| 4907 | 4896 | DRM DRIVERS FOR RENESAS |
| 4908 | 4897 | M: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| 4898 | +M: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> | |
| 4909 | 4899 | L: dri-devel@lists.freedesktop.org |
| 4910 | 4900 | L: linux-renesas-soc@vger.kernel.org |
| 4911 | −T: git git://linuxtv.org/pinchartl/fbdev | |
| 4901 | +T: git git://linuxtv.org/pinchartl/media drm/du/next | |
| 4912 | 4902 | S: Supported |
| 4913 | 4903 | F: drivers/gpu/drm/rcar-du/ |
| 4914 | 4904 | F: drivers/gpu/drm/shmobile/ |
| @@ -5383,6 +5373,14 @@ L: linux-edac@vger.kernel.org · 468 unmodified lines | ||
| 5383 | 5373 | S: Maintained |
| 5384 | 5374 | F: drivers/edac/ti_edac.c |
| 5385 | 5375 | |
| 5376 | +EDAC-QCOM | |
| 5377 | +M: Channagoud Kadabi <ckadabi@codeaurora.org> | |
| 5378 | +M: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> | |
| 5379 | +L: linux-arm-msm@vger.kernel.org | |
| 5380 | +L: linux-edac@vger.kernel.org | |
| 5381 | +S: Maintained | |
| 5382 | +F: drivers/edac/qcom_edac.c | |
| 5383 | + | |
| 5386 | 5384 | EDIROL UA-101/UA-1000 DRIVER |
| 5387 | 5385 | M: Clemens Ladisch <clemens@ladisch.de> |
| 5388 | 5386 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) |
| @@ -5661,10 +5659,9 @@ F: Documentation/fault-injection/ · 272 unmodified lines | ||
| 5661 | 5659 | F: lib/fault-inject.c |
| 5662 | 5660 | |
| 5663 | 5661 | FBTFT Framebuffer drivers |
| 5664 | −M: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 5662 | +S: Orphan | |
| 5665 | 5663 | L: dri-devel@lists.freedesktop.org |
| 5666 | 5664 | L: linux-fbdev@vger.kernel.org |
| 5667 | −S: Maintained | |
| 5668 | 5665 | F: drivers/staging/fbtft/ |
| 5669 | 5666 | |
| 5670 | 5667 | FC0011 TUNER DRIVER |
| @@ -7723,7 +7720,6 @@ IPX NETWORK LAYER · 2052 unmodified lines | ||
| 7723 | 7720 | L: netdev@vger.kernel.org |
| 7724 | 7721 | S: Obsolete |
| 7725 | 7722 | F: include/uapi/linux/ipx.h |
| 7726 | −F: drivers/staging/ipx/ | |
| 7727 | 7723 | |
| 7728 | 7724 | IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) |
| 7729 | 7725 | M: Marc Zyngier <marc.zyngier@arm.com> |
| @@ -8697,11 +8693,18 @@ F: drivers/message/fusion/ · 967 unmodified lines | ||
| 8697 | 8693 | F: drivers/scsi/mpt3sas/ |
| 8698 | 8694 | |
| 8699 | 8695 | LSILOGIC/SYMBIOS/NCR 53C8XX and 53C1010 PCI-SCSI drivers |
| 8700 | −M: Matthew Wilcox <matthew@wil.cx> | |
| 8696 | +M: Matthew Wilcox <willy@infradead.org> | |
| 8701 | 8697 | L: linux-scsi@vger.kernel.org |
| 8702 | 8698 | S: Maintained |
| 8703 | 8699 | F: drivers/scsi/sym53c8xx_2/ |
| 8704 | 8700 | |
| 8701 | +LTC1660 DAC DRIVER | |
| 8702 | +M: Marcus Folkesson <marcus.folkesson@gmail.com> | |
| 8703 | +L: linux-iio@vger.kernel.org | |
| 8704 | +S: Maintained | |
| 8705 | +F: Documentation/devicetree/bindings/iio/dac/ltc1660.txt | |
| 8706 | +F: drivers/iio/dac/ltc1660.c | |
| 8707 | + | |
| 8705 | 8708 | LTC4261 HARDWARE MONITOR DRIVER |
| 8706 | 8709 | M: Guenter Roeck <linux@roeck-us.net> |
| 8707 | 8710 | L: linux-hwmon@vger.kernel.org |
| @@ -8866,7 +8869,7 @@ S: Maintained · 158 unmodified lines | ||
| 8866 | 8869 | F: drivers/net/phy/marvell10g.c |
| 8867 | 8870 | |
| 8868 | 8871 | MARVELL MVNETA ETHERNET DRIVER |
| 8869 | −M: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 8872 | +M: Thomas Petazzoni <thomas.petazzoni@bootlin.com> | |
| 8870 | 8873 | L: netdev@vger.kernel.org |
| 8871 | 8874 | S: Maintained |
| 8872 | 8875 | F: drivers/net/ethernet/marvell/mvneta.* |
| @@ -9065,11 +9068,10 @@ F: drivers/media/dvb-frontends/cxd2880/* · 192 unmodified lines | ||
| 9065 | 9068 | F: drivers/media/spi/cxd2880* |
| 9066 | 9069 | |
| 9067 | 9070 | MEDIA DRIVERS FOR DIGITAL DEVICES PCIE DEVICES |
| 9068 | −M: Daniel Scheller <d.scheller.oss@gmail.com> | |
| 9069 | 9071 | L: linux-media@vger.kernel.org |
| 9070 | 9072 | W: https://linuxtv.org |
| 9071 | 9073 | T: git git://linuxtv.org/media_tree.git |
| 9072 | −S: Maintained | |
| 9074 | +S: Orphan | |
| 9073 | 9075 | F: drivers/media/pci/ddbridge/* |
| 9074 | 9076 | |
| 9075 | 9077 | MEDIA DRIVERS FOR FREESCALE IMX |
| @@ -9084,6 +9086,13 @@ F: drivers/staging/media/imx/ · 8 unmodified lines | ||
| 9084 | 9086 | F: include/linux/imx-media.h |
| 9085 | 9087 | F: include/media/imx.h |
| 9086 | 9088 | |
| 9089 | +MEDIA DRIVER FOR FREESCALE IMX PXP | |
| 9090 | +M: Philipp Zabel <p.zabel@pengutronix.de> | |
| 9091 | +L: linux-media@vger.kernel.org | |
| 9092 | +T: git git://linuxtv.org/media_tree.git | |
| 9093 | +S: Maintained | |
| 9094 | +F: drivers/media/platform/imx-pxp.[ch] | |
| 9095 | + | |
| 9087 | 9096 | MEDIA DRIVERS FOR HELENE |
| 9088 | 9097 | M: Abylay Ospan <aospan@netup.ru> |
| 9089 | 9098 | L: linux-media@vger.kernel.org |
| @@ -9114,11 +9123,10 @@ S: Supported · 24 unmodified lines | ||
| 9114 | 9123 | F: drivers/media/dvb-frontends/lnbh25* |
| 9115 | 9124 | |
| 9116 | 9125 | MEDIA DRIVERS FOR MXL5XX TUNER DEMODULATORS |
| 9117 | −M: Daniel Scheller <d.scheller.oss@gmail.com> | |
| 9118 | 9126 | L: linux-media@vger.kernel.org |
| 9119 | 9127 | W: https://linuxtv.org |
| 9120 | 9128 | T: git git://linuxtv.org/media_tree.git |
| 9121 | −S: Maintained | |
| 9129 | +S: Orphan | |
| 9122 | 9130 | F: drivers/media/dvb-frontends/mxl5xx* |
| 9123 | 9131 | |
| 9124 | 9132 | MEDIA DRIVERS FOR NETUP PCI UNIVERSAL DVB devices |
| @@ -9161,7 +9169,7 @@ F: drivers/media/platform/rcar-fcp.c · 36 unmodified lines | ||
| 9161 | 9169 | F: include/media/rcar-fcp.h |
| 9162 | 9170 | |
| 9163 | 9171 | MEDIA DRIVERS FOR RENESAS - FDP1 |
| 9164 | −M: Kieran Bingham <kieran@bingham.xyz> | |
| 9172 | +M: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> | |
| 9165 | 9173 | L: linux-media@vger.kernel.org |
| 9166 | 9174 | L: linux-renesas-soc@vger.kernel.org |
| 9167 | 9175 | T: git git://linuxtv.org/media_tree.git |
| @@ -9181,6 +9189,7 @@ F: drivers/media/platform/rcar-vin/ · 13 unmodified lines | ||
| 9181 | 9189 | |
| 9182 | 9190 | MEDIA DRIVERS FOR RENESAS - VSP1 |
| 9183 | 9191 | M: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| 9192 | +M: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> | |
| 9184 | 9193 | L: linux-media@vger.kernel.org |
| 9185 | 9194 | L: linux-renesas-soc@vger.kernel.org |
| 9186 | 9195 | T: git git://linuxtv.org/media_tree.git |
| @@ -9189,19 +9198,17 @@ F: Documentation/devicetree/bindings/media/renesas,vsp1.txt · 2 unmodified lines | ||
| 9189 | 9198 | F: drivers/media/platform/vsp1/ |
| 9190 | 9199 | |
| 9191 | 9200 | MEDIA DRIVERS FOR ST STV0910 DEMODULATOR ICs |
| 9192 | −M: Daniel Scheller <d.scheller.oss@gmail.com> | |
| 9193 | 9201 | L: linux-media@vger.kernel.org |
| 9194 | 9202 | W: https://linuxtv.org |
| 9195 | 9203 | T: git git://linuxtv.org/media_tree.git |
| 9196 | −S: Maintained | |
| 9204 | +S: Orphan | |
| 9197 | 9205 | F: drivers/media/dvb-frontends/stv0910* |
| 9198 | 9206 | |
| 9199 | 9207 | MEDIA DRIVERS FOR ST STV6111 TUNER ICs |
| 9200 | −M: Daniel Scheller <d.scheller.oss@gmail.com> | |
| 9201 | 9208 | L: linux-media@vger.kernel.org |
| 9202 | 9209 | W: https://linuxtv.org |
| 9203 | 9210 | T: git git://linuxtv.org/media_tree.git |
| 9204 | −S: Maintained | |
| 9211 | +S: Orphan | |
| 9205 | 9212 | F: drivers/media/dvb-frontends/stv6111* |
| 9206 | 9213 | |
| 9207 | 9214 | MEDIA DRIVERS FOR STM32 - DCMI |
| @@ -9568,7 +9575,7 @@ MEN Z069 WATCHDOG DRIVER · 360 unmodified lines | ||
| 9568 | 9575 | M: Johannes Thumshirn <jth@kernel.org> |
| 9569 | 9576 | L: linux-watchdog@vger.kernel.org |
| 9570 | 9577 | S: Maintained |
| 9571 | −F: drivers/watchdog/menz069_wdt.c | |
| 9578 | +F: drivers/watchdog/menz69_wdt.c | |
| 9572 | 9579 | |
| 9573 | 9580 | MESON AO CEC DRIVER FOR AMLOGIC SOCS |
| 9574 | 9581 | M: Neil Armstrong <narmstrong@baylibre.com> |
| @@ -9587,14 +9594,20 @@ T: git git://git.monstr.eu/linux-2.6-microblaze.git · 12 unmodified lines | ||
| 9587 | 9594 | S: Supported |
| 9588 | 9595 | F: arch/microblaze/ |
| 9589 | 9596 | |
| 9590 | −MICROCHIP / ATMEL AT91 SERIAL DRIVER | |
| 9597 | +MICROCHIP AT91 SERIAL DRIVER | |
| 9591 | 9598 | M: Richard Genoud <richard.genoud@gmail.com> |
| 9592 | 9599 | S: Maintained |
| 9593 | 9600 | F: drivers/tty/serial/atmel_serial.c |
| 9594 | 9601 | F: drivers/tty/serial/atmel_serial.h |
| 9595 | 9602 | F: Documentation/devicetree/bindings/mfd/atmel-usart.txt |
| 9596 | 9603 | |
| 9597 | −MICROCHIP / ATMEL DMA DRIVER | |
| 9604 | +MICROCHIP AUDIO ASOC DRIVERS | |
| 9605 | +M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> | |
| 9606 | +L: alsa-devel@alsa-project.org (moderated for non-subscribers) | |
| 9607 | +S: Supported | |
| 9608 | +F: sound/soc/atmel | |
| 9609 | + | |
| 9610 | +MICROCHIP DMA DRIVER | |
| 9598 | 9611 | M: Ludovic Desroches <ludovic.desroches@microchip.com> |
| 9599 | 9612 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 9600 | 9613 | L: dmaengine@vger.kernel.org |
| @@ -9602,27 +9615,35 @@ S: Supported · 1 unmodified line | ||
| 9602 | 9615 | F: drivers/dma/at_hdmac.c |
| 9603 | 9616 | F: drivers/dma/at_hdmac_regs.h |
| 9604 | 9617 | F: include/linux/platform_data/dma-atmel.h |
| 9618 | +F: Documentation/devicetree/bindings/dma/atmel-dma.txt | |
| 9619 | +F: include/dt-bindings/dma/at91.h | |
| 9605 | 9620 | |
| 9606 | −MICROCHIP / ATMEL ECC DRIVER | |
| 9621 | +MICROCHIP ECC DRIVER | |
| 9607 | 9622 | M: Tudor Ambarus <tudor.ambarus@microchip.com> |
| 9608 | 9623 | L: linux-crypto@vger.kernel.org |
| 9609 | 9624 | S: Maintained |
| 9610 | 9625 | F: drivers/crypto/atmel-ecc.* |
| 9611 | 9626 | |
| 9612 | −MICROCHIP / ATMEL ISC DRIVER | |
| 9613 | −M: Songjun Wu <songjun.wu@microchip.com> | |
| 9627 | +MICROCHIP I2C DRIVER | |
| 9628 | +M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 9629 | +L: linux-i2c@vger.kernel.org | |
| 9630 | +S: Supported | |
| 9631 | +F: drivers/i2c/busses/i2c-at91.c | |
| 9632 | + | |
| 9633 | +MICROCHIP ISC DRIVER | |
| 9634 | +M: Eugen Hristev <eugen.hristev@microchip.com> | |
| 9614 | 9635 | L: linux-media@vger.kernel.org |
| 9615 | 9636 | S: Supported |
| 9616 | 9637 | F: drivers/media/platform/atmel/atmel-isc.c |
| 9617 | 9638 | F: drivers/media/platform/atmel/atmel-isc-regs.h |
| 9618 | 9639 | F: devicetree/bindings/media/atmel-isc.txt |
| 9619 | 9640 | |
| 9620 | −MICROCHIP / ATMEL NAND DRIVER | |
| 9621 | −M: Josh Wu <rainyfeeling@outlook.com> | |
| 9622 | −L: linux-mtd@lists.infradead.org | |
| 9641 | +MICROCHIP ISI DRIVER | |
| 9642 | +M: Eugen Hristev <eugen.hristev@microchip.com> | |
| 9643 | +L: linux-media@vger.kernel.org | |
| 9623 | 9644 | S: Supported |
| 9624 | −F: drivers/mtd/nand/raw/atmel/* | |
| 9625 | −F: Documentation/devicetree/bindings/mtd/atmel-nand.txt | |
| 9645 | +F: drivers/media/platform/atmel/atmel-isi.c | |
| 9646 | +F: include/media/atmel-isi.h | |
| 9626 | 9647 | |
| 9627 | 9648 | MICROCHIP AT91 USART MFD DRIVER |
| 9628 | 9649 | M: Radu Pirea <radu_nicolae.pirea@upb.ro> |
| @@ -9656,6 +9677,80 @@ L: netdev@vger.kernel.org · 27 unmodified lines | ||
| 9656 | 9677 | S: Maintained |
| 9657 | 9678 | F: drivers/net/ethernet/microchip/lan743x_* |
| 9658 | 9679 | |
| 9680 | +MICROCHIP LCDFB DRIVER | |
| 9681 | +M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 9682 | +L: linux-fbdev@vger.kernel.org | |
| 9683 | +S: Maintained | |
| 9684 | +F: drivers/video/fbdev/atmel_lcdfb.c | |
| 9685 | +F: include/video/atmel_lcdc.h | |
| 9686 | + | |
| 9687 | +MICROCHIP MMC/SD/SDIO MCI DRIVER | |
| 9688 | +M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 9689 | +S: Maintained | |
| 9690 | +F: drivers/mmc/host/atmel-mci.c | |
| 9691 | + | |
| 9692 | +MICROCHIP MCP3911 ADC DRIVER | |
| 9693 | +M: Marcus Folkesson <marcus.folkesson@gmail.com> | |
| 9694 | +M: Kent Gustavsson <kent@minoris.se> | |
| 9695 | +L: linux-iio@vger.kernel.org | |
| 9696 | +S: Supported | |
| 9697 | +F: drivers/iio/adc/mcp3911.c | |
| 9698 | +F: Documentation/devicetree/bindings/iio/adc/mcp3911.txt | |
| 9699 | + | |
| 9700 | +MICROCHIP NAND DRIVER | |
| 9701 | +M: Tudor Ambarus <tudor.ambarus@microchip.com> | |
| 9702 | +L: linux-mtd@lists.infradead.org | |
| 9703 | +S: Supported | |
| 9704 | +F: drivers/mtd/nand/raw/atmel/* | |
| 9705 | +F: Documentation/devicetree/bindings/mtd/atmel-nand.txt | |
| 9706 | + | |
| 9707 | +MICROCHIP PWM DRIVER | |
| 9708 | +M: Claudiu Beznea <claudiu.beznea@microchip.com> | |
| 9709 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 9710 | +L: linux-pwm@vger.kernel.org | |
| 9711 | +S: Supported | |
| 9712 | +F: drivers/pwm/pwm-atmel.c | |
| 9713 | +F: Documentation/devicetree/bindings/pwm/atmel-pwm.txt | |
| 9714 | + | |
| 9715 | +MICROCHIP SAMA5D2-COMPATIBLE ADC DRIVER | |
| 9716 | +M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 9717 | +M: Eugen Hristev <eugen.hristev@microchip.com> | |
| 9718 | +L: linux-iio@vger.kernel.org | |
| 9719 | +S: Supported | |
| 9720 | +F: drivers/iio/adc/at91-sama5d2_adc.c | |
| 9721 | +F: Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt | |
| 9722 | +F: include/dt-bindings/iio/adc/at91-sama5d2_adc.h | |
| 9723 | + | |
| 9724 | +MICROCHIP SAMA5D2-COMPATIBLE SHUTDOWN CONTROLLER | |
| 9725 | +M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 9726 | +S: Supported | |
| 9727 | +F: drivers/power/reset/at91-sama5d2_shdwc.c | |
| 9728 | + | |
| 9729 | +MICROCHIP SPI DRIVER | |
| 9730 | +M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 9731 | +S: Supported | |
| 9732 | +F: drivers/spi/spi-atmel.* | |
| 9733 | + | |
| 9734 | +MICROCHIP SSC DRIVER | |
| 9735 | +M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 9736 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 9737 | +S: Supported | |
| 9738 | +F: drivers/misc/atmel-ssc.c | |
| 9739 | +F: include/linux/atmel-ssc.h | |
| 9740 | + | |
| 9741 | +MICROCHIP TIMER COUNTER (TC) AND CLOCKSOURCE DRIVERS | |
| 9742 | +M: Nicolas Ferre <nicolas.ferre@microchip.com> | |
| 9743 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 9744 | +S: Supported | |
| 9745 | +F: drivers/misc/atmel_tclib.c | |
| 9746 | +F: drivers/clocksource/tcb_clksrc.c | |
| 9747 | + | |
| 9748 | +MICROCHIP USBA UDC DRIVER | |
| 9749 | +M: Cristian Birsan <cristian.birsan@microchip.com> | |
| 9750 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 9751 | +S: Supported | |
| 9752 | +F: drivers/usb/gadget/udc/atmel_usba_udc.* | |
| 9753 | + | |
| 9659 | 9754 | MICROCHIP USB251XB DRIVER |
| 9660 | 9755 | M: Richard Leitner <richard.leitner@skidata.com> |
| 9661 | 9756 | L: linux-usb@vger.kernel.org |
| @@ -9663,6 +9758,13 @@ S: Maintained · 1 unmodified line | ||
| 9663 | 9758 | F: drivers/usb/misc/usb251xb.c |
| 9664 | 9759 | F: Documentation/devicetree/bindings/usb/usb251xb.txt |
| 9665 | 9760 | |
| 9761 | +MICROCHIP XDMA DRIVER | |
| 9762 | +M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 9763 | +L: linux-arm-kernel@lists.infradead.org | |
| 9764 | +L: dmaengine@vger.kernel.org | |
| 9765 | +S: Supported | |
| 9766 | +F: drivers/dma/at_xdmac.c | |
| 9767 | + | |
| 9666 | 9768 | MICROSEMI MIPS SOCS |
| 9667 | 9769 | M: Alexandre Belloni <alexandre.belloni@bootlin.com> |
| 9668 | 9770 | L: linux-mips@linux-mips.org |
| @@ -10001,9 +10103,12 @@ F: drivers/media/tuners/mxl5007t.* · 332 unmodified lines | ||
| 10001 | 10103 | |
| 10002 | 10104 | MXSFB DRM DRIVER |
| 10003 | 10105 | M: Marek Vasut <marex@denx.de> |
| 10106 | +M: Stefan Agner <stefan@agner.ch> | |
| 10107 | +L: dri-devel@lists.freedesktop.org | |
| 10004 | 10108 | S: Supported |
| 10005 | 10109 | F: drivers/gpu/drm/mxsfb/ |
| 10006 | 10110 | F: Documentation/devicetree/bindings/display/mxsfb.txt |
| 10111 | +T: git git://anongit.freedesktop.org/drm/drm-misc | |
| 10007 | 10112 | |
| 10008 | 10113 | MYLEX DAC960 PCI RAID Controller |
| 10009 | 10114 | M: Hannes Reinecke <hare@kernel.org> |
| @@ -10043,11 +10148,6 @@ NATSEMI ETHERNET DRIVER (DP8381x) · 33 unmodified lines | ||
| 10043 | 10148 | S: Orphan |
| 10044 | 10149 | F: drivers/net/ethernet/natsemi/natsemi.c |
| 10045 | 10150 | |
| 10046 | −NCP FILESYSTEM | |
| 10047 | −M: Petr Vandrovec <petr@vandrovec.name> | |
| 10048 | −S: Obsolete | |
| 10049 | −F: drivers/staging/ncpfs/ | |
| 10050 | − | |
| 10051 | 10151 | NCR 5380 SCSI DRIVERS |
| 10052 | 10152 | M: Finn Thain <fthain@telegraphics.com.au> |
| 10053 | 10153 | M: Michael Schmitz <schmitzmic@gmail.com> |
| @@ -11148,7 +11248,7 @@ S: Maintained · 1094 unmodified lines | ||
| 11148 | 11248 | F: drivers/firmware/pcdp.* |
| 11149 | 11249 | |
| 11150 | 11250 | PCI DRIVER FOR AARDVARK (Marvell Armada 3700) |
| 11151 | −M: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 11251 | +M: Thomas Petazzoni <thomas.petazzoni@bootlin.com> | |
| 11152 | 11252 | L: linux-pci@vger.kernel.org |
| 11153 | 11253 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 11154 | 11254 | S: Maintained |
| @@ -11180,7 +11280,7 @@ F: Documentation/devicetree/bindings/pci/versatile.txt · 25 unmodified lines | ||
| 11180 | 11280 | F: drivers/pci/controller/pci-versatile.c |
| 11181 | 11281 | |
| 11182 | 11282 | PCI DRIVER FOR ARMADA 8K |
| 11183 | −M: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 11283 | +M: Thomas Petazzoni <thomas.petazzoni@bootlin.com> | |
| 11184 | 11284 | L: linux-pci@vger.kernel.org |
| 11185 | 11285 | L: linux-arm-kernel@lists.infradead.org |
| 11186 | 11286 | S: Maintained |
| @@ -11249,7 +11349,7 @@ F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt · 62 unmodified lines | ||
| 11249 | 11349 | F: drivers/pci/controller/pcie-mobiveil.c |
| 11250 | 11350 | |
| 11251 | 11351 | PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support) |
| 11252 | −M: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 11352 | +M: Thomas Petazzoni <thomas.petazzoni@bootlin.com> | |
| 11253 | 11353 | M: Jason Cooper <jason@lakedaemon.net> |
| 11254 | 11354 | L: linux-pci@vger.kernel.org |
| 11255 | 11355 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| @@ -12515,6 +12615,12 @@ S: Supported · 1259 unmodified lines | ||
| 12515 | 12615 | F: drivers/i2c/busses/i2c-rcar.c |
| 12516 | 12616 | F: drivers/i2c/busses/i2c-sh_mobile.c |
| 12517 | 12617 | |
| 12618 | +RENESAS RIIC DRIVER | |
| 12619 | +M: Chris Brandt <chris.brandt@renesas.com> | |
| 12620 | +S: Supported | |
| 12621 | +F: Documentation/devicetree/bindings/i2c/i2c-riic.txt | |
| 12622 | +F: drivers/i2c/busses/i2c-riic.c | |
| 12623 | + | |
| 12518 | 12624 | RENESAS USB PHY DRIVER |
| 12519 | 12625 | M: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
| 12520 | 12626 | L: linux-renesas-soc@vger.kernel.org |
| @@ -13154,6 +13260,12 @@ L: linux-mmc@vger.kernel.org · 633 unmodified lines | ||
| 13154 | 13260 | S: Maintained |
| 13155 | 13261 | F: drivers/mmc/host/sdhci-pci-dwc-mshc.c |
| 13156 | 13262 | |
| 13263 | +SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) MICROCHIP DRIVER | |
| 13264 | +M: Ludovic Desroches <ludovic.desroches@microchip.com> | |
| 13265 | +L: linux-mmc@vger.kernel.org | |
| 13266 | +S: Supported | |
| 13267 | +F: drivers/mmc/host/sdhci-of-at91.c | |
| 13268 | + | |
| 13157 | 13269 | SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER |
| 13158 | 13270 | M: Ben Dooks <ben-linux@fluff.org> |
| 13159 | 13271 | M: Jaehoon Chung <jh80.chung@samsung.com> |
| @@ -13692,6 +13804,20 @@ S: Maintained · 532 unmodified lines | ||
| 13692 | 13804 | F: drivers/media/i2c/imx274.c |
| 13693 | 13805 | F: Documentation/devicetree/bindings/media/i2c/imx274.txt |
| 13694 | 13806 | |
| 13807 | +SONY IMX319 SENSOR DRIVER | |
| 13808 | +M: Bingbu Cao <bingbu.cao@intel.com> | |
| 13809 | +L: linux-media@vger.kernel.org | |
| 13810 | +T: git git://linuxtv.org/media_tree.git | |
| 13811 | +S: Maintained | |
| 13812 | +F: drivers/media/i2c/imx319.c | |
| 13813 | + | |
| 13814 | +SONY IMX355 SENSOR DRIVER | |
| 13815 | +M: Tianshu Qiu <tian.shu.qiu@intel.com> | |
| 13816 | +L: linux-media@vger.kernel.org | |
| 13817 | +T: git git://linuxtv.org/media_tree.git | |
| 13818 | +S: Maintained | |
| 13819 | +F: drivers/media/i2c/imx355.c | |
| 13820 | + | |
| 13695 | 13821 | SONY MEMORYSTICK CARD SUPPORT |
| 13696 | 13822 | M: Alex Dubov <oakad@yahoo.com> |
| 13697 | 13823 | W: http://tifmxx.berlios.de/ |
| @@ -13894,6 +14020,13 @@ L: linux-i2c@vger.kernel.org · 196 unmodified lines | ||
| 13894 | 14020 | S: Maintained |
| 13895 | 14021 | F: drivers/i2c/busses/i2c-stm32* |
| 13896 | 14022 | |
| 14023 | +ST VL53L0X ToF RANGER(I2C) IIO DRIVER | |
| 14024 | +M: Song Qiang <songqiang1304521@gmail.com> | |
| 14025 | +L: linux-iio@vger.kernel.org | |
| 14026 | +S: Maintained | |
| 14027 | +F: drivers/iio/proximity/vl53l0x-i2c.c | |
| 14028 | +F: Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt | |
| 14029 | + | |
| 13897 | 14030 | STABLE BRANCH |
| 13898 | 14031 | M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| 13899 | 14032 | L: stable@vger.kernel.org |
| @@ -13913,11 +14046,6 @@ L: linux-erofs@lists.ozlabs.org · 13 unmodified lines | ||
| 13913 | 14046 | S: Maintained |
| 13914 | 14047 | F: drivers/staging/erofs/ |
| 13915 | 14048 | |
| 13916 | −STAGING - FLARION FT1000 DRIVERS | |
| 13917 | −M: Marek Belisko <marek.belisko@gmail.com> | |
| 13918 | −S: Odd Fixes | |
| 13919 | −F: drivers/staging/ft1000/ | |
| 13920 | − | |
| 13921 | 14049 | STAGING - INDUSTRIAL IO |
| 13922 | 14050 | M: Jonathan Cameron <jic23@kernel.org> |
| 13923 | 14051 | L: linux-iio@vger.kernel.org |
| @@ -14009,7 +14137,7 @@ F: sound/soc/sti/ · 85 unmodified lines | ||
| 14009 | 14137 | STI CEC DRIVER |
| 14010 | 14138 | M: Benjamin Gaignard <benjamin.gaignard@linaro.org> |
| 14011 | 14139 | S: Maintained |
| 14012 | −F: drivers/staging/media/st-cec/ | |
| 14140 | +F: drivers/media/platform/sti/cec/ | |
| 14013 | 14141 | F: Documentation/devicetree/bindings/media/stih-cec.txt |
| 14014 | 14142 | |
| 14015 | 14143 | STK1160 USB VIDEO CAPTURE DRIVER |
| @@ -14561,7 +14689,6 @@ F: Documentation/devicetree/bindings/arm/keystone/ti,sci.txt · 545 unmodified lines | ||
| 14561 | 14689 | F: drivers/firmware/ti_sci* |
| 14562 | 14690 | F: include/linux/soc/ti/ti_sci_protocol.h |
| 14563 | 14691 | F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt |
| 14564 | −F: include/dt-bindings/genpd/k2g.h | |
| 14565 | 14692 | F: drivers/soc/ti/ti_sci_pm_domains.c |
| 14566 | 14693 | F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt |
| 14567 | 14694 | F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt |
| @@ -15530,6 +15657,14 @@ S: Maintained · 962 unmodified lines | ||
| 15530 | 15657 | F: lib/iov_iter.c |
| 15531 | 15658 | F: include/linux/uio.h |
| 15532 | 15659 | |
| 15660 | +USERSPACE DMA BUFFER DRIVER | |
| 15661 | +M: Gerd Hoffmann <kraxel@redhat.com> | |
| 15662 | +S: Maintained | |
| 15663 | +L: dri-devel@lists.freedesktop.org | |
| 15664 | +F: drivers/dma-buf/udmabuf.c | |
| 15665 | +F: include/uapi/linux/udmabuf.h | |
| 15666 | +T: git git://anongit.freedesktop.org/drm/drm-misc | |
| 15667 | + | |
| 15533 | 15668 | USERSPACE I/O (UIO) |
| 15534 | 15669 | M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| 15535 | 15670 | S: Maintained |
| @@ -15660,7 +15795,7 @@ M: Marek Szyprowski <m.szyprowski@samsung.com> · 124 unmodified lines | ||
| 15660 | 15795 | M: Kyungmin Park <kyungmin.park@samsung.com> |
| 15661 | 15796 | L: linux-media@vger.kernel.org |
| 15662 | 15797 | S: Maintained |
| 15663 | −F: drivers/media/v4l2-core/videobuf2-* | |
| 15798 | +F: drivers/media/common/videobuf2/* | |
| 15664 | 15799 | F: include/media/videobuf2-* |
| 15665 | 15800 | |
| 15666 | 15801 | VIMC VIRTUAL MEDIA CONTROLLER DRIVER |
| @@ -16137,6 +16272,17 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/vdso · 470 unmodified lines | ||
| 16137 | 16272 | S: Maintained |
| 16138 | 16273 | F: arch/x86/entry/vdso/ |
| 16139 | 16274 | |
| 16275 | +XARRAY | |
| 16276 | +M: Matthew Wilcox <willy@infradead.org> | |
| 16277 | +L: linux-fsdevel@vger.kernel.org | |
| 16278 | +S: Supported | |
| 16279 | +F: Documentation/core-api/xarray.rst | |
| 16280 | +F: lib/idr.c | |
| 16281 | +F: lib/xarray.c | |
| 16282 | +F: include/linux/idr.h | |
| 16283 | +F: include/linux/xarray.h | |
| 16284 | +F: tools/testing/radix-tree | |
| 16285 | + | |
| 16140 | 16286 | XC2028/3028 TUNER DRIVER |
| 16141 | 16287 | M: Mauro Carvalho Chehab <mchehab@kernel.org> |
| 16142 | 16288 | L: linux-media@vger.kernel.org |
| @@ -16178,6 +16324,7 @@ F: arch/arm64/include/asm/xen/ · 35 unmodified lines | ||
| 16178 | 16324 | XEN HYPERVISOR INTERFACE |
| 16179 | 16325 | M: Boris Ostrovsky <boris.ostrovsky@oracle.com> |
| 16180 | 16326 | M: Juergen Gross <jgross@suse.com> |
| 16327 | +R: Stefano Stabellini <sstabellini@kernel.org> | |
| 16181 | 16328 | L: xen-devel@lists.xenproject.org (moderated for non-subscribers) |
| 16182 | 16329 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git |
| 16183 | 16330 | S: Supported |
| @@ -15,10 +15,9 @@ NAME = "People's Front" · 14 unmodified lines | ||
| 15 | 15 | PHONY := _all |
| 16 | 16 | _all: |
| 17 | 17 | |
| 18 | −# o Do not use make's built-in rules and variables | |
| 19 | −# (this increases performance and avoids hard-to-debug behaviour); | |
| 20 | −# o Look for make include files relative to root of kernel src | |
| 21 | −MAKEFLAGS += -rR --include-dir=$(CURDIR) | |
| 18 | +# Do not use make's built-in rules and variables | |
| 19 | +# (this increases performance and avoids hard-to-debug behaviour) | |
| 20 | +MAKEFLAGS += -rR | |
| 22 | 21 | |
| 23 | 22 | # Avoid funny character set dependencies |
| 24 | 23 | unexport LC_ALL |
| @@ -136,6 +135,13 @@ KBUILD_OUTPUT := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) \ · 111 unmodified lines | ||
| 136 | 135 | $(if $(KBUILD_OUTPUT),, \ |
| 137 | 136 | $(error failed to create output directory "$(saved-output)")) |
| 138 | 137 | |
| 138 | +# Look for make include files relative to root of kernel src | |
| 139 | +# | |
| 140 | +# This does not become effective immediately because MAKEFLAGS is re-parsed | |
| 141 | +# once after the Makefile is read. It is OK since we are going to invoke | |
| 142 | +# 'sub-make' below. | |
| 143 | +MAKEFLAGS += --include-dir=$(CURDIR) | |
| 144 | + | |
| 139 | 145 | PHONY += $(MAKECMDGOALS) sub-make |
| 140 | 146 | |
| 141 | 147 | $(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make |
| @@ -476,8 +482,7 @@ PHONY += outputmakefile · 334 unmodified lines | ||
| 476 | 482 | outputmakefile: |
| 477 | 483 | ifneq ($(KBUILD_SRC),) |
| 478 | 484 | $(Q)ln -fsn $(srctree) source |
| 479 | − $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile \ | |
| 480 | − $(srctree) $(objtree) $(VERSION) $(PATCHLEVEL) | |
| 485 | + $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile $(srctree) | |
| 481 | 486 | endif |
| 482 | 487 | |
| 483 | 488 | ifeq ($(cc-name),clang) |
| @@ -713,7 +718,7 @@ else · 229 unmodified lines | ||
| 713 | 718 | |
| 714 | 719 | # These warnings generated too much noise in a regular build. |
| 715 | 720 | # Use make W=1 to enable them (see scripts/Makefile.extrawarn) |
| 716 | −KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable) | |
| 721 | +KBUILD_CFLAGS += -Wno-unused-but-set-variable | |
| 717 | 722 | endif |
| 718 | 723 | |
| 719 | 724 | KBUILD_CFLAGS += $(call cc-disable-warning, unused-const-variable) |
| @@ -794,10 +799,13 @@ endif · 74 unmodified lines | ||
| 794 | 799 | NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include) |
| 795 | 800 | |
| 796 | 801 | # warn about C99 declaration after statement |
| 797 | −KBUILD_CFLAGS += $(call cc-option,-Wdeclaration-after-statement,) | |
| 802 | +KBUILD_CFLAGS += -Wdeclaration-after-statement | |
| 803 | + | |
| 804 | +# Variable Length Arrays (VLAs) should not be used anywhere in the kernel | |
| 805 | +KBUILD_CFLAGS += $(call cc-option,-Wvla) | |
| 798 | 806 | |
| 799 | 807 | # disable pointer signed / unsigned warnings in gcc 4.0 |
| 800 | −KBUILD_CFLAGS += $(call cc-disable-warning, pointer-sign) | |
| 808 | +KBUILD_CFLAGS += -Wno-pointer-sign | |
| 801 | 809 | |
| 802 | 810 | # disable stringop warnings in gcc 8+ |
| 803 | 811 | KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation) |
| @@ -1647,9 +1655,6 @@ namespacecheck: · 843 unmodified lines | ||
| 1647 | 1655 | export_report: |
| 1648 | 1656 | $(PERL) $(srctree)/scripts/export_report.pl |
| 1649 | 1657 | |
| 1650 | −endif #ifeq ($(config-targets),1) | |
| 1651 | −endif #ifeq ($(mixed-targets),1) | |
| 1652 | − | |
| 1653 | 1658 | PHONY += checkstack kernelrelease kernelversion image_name |
| 1654 | 1659 | |
| 1655 | 1660 | # UML needs a little special treatment here. It wants to use the host |
| @@ -1756,14 +1761,15 @@ cmd_crmodverdir = $(Q)mkdir -p $(MODVERDIR) \ · 100 unmodified lines | ||
| 1756 | 1761 | $(if $(KBUILD_MODULES),; rm -f $(MODVERDIR)/*) |
| 1757 | 1762 | |
| 1758 | 1763 | # read all saved command lines |
| 1759 | − | |
| 1760 | −cmd_files := $(wildcard .*.cmd $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd)) | |
| 1764 | +cmd_files := $(wildcard .*.cmd) | |
| 1761 | 1765 | |
| 1762 | 1766 | ifneq ($(cmd_files),) |
| 1763 | 1767 | $(cmd_files): ; # Do not try to update included dependency files |
| 1764 | 1768 | include $(cmd_files) |
| 1765 | 1769 | endif |
| 1766 | 1770 | |
| 1771 | +endif # ifeq ($(config-targets),1) | |
| 1772 | +endif # ifeq ($(mixed-targets),1) | |
| 1767 | 1773 | endif # skip-makefile |
| 1768 | 1774 | |
| 1769 | 1775 | PHONY += FORCE |
| @@ -290,6 +290,13 @@ config HAVE_RSEQ · 289 unmodified lines | ||
| 290 | 290 | This symbol should be selected by an architecture if it |
| 291 | 291 | supports an implementation of restartable sequences. |
| 292 | 292 | |
| 293 | +config HAVE_FUNCTION_ARG_ACCESS_API | |
| 294 | + bool | |
| 295 | + help | |
| 296 | + This symbol should be selected by an architecure if it supports | |
| 297 | + the API needed to access function arguments from pt_regs, | |
| 298 | + declared in asm/ptrace.h | |
| 299 | + | |
| 293 | 300 | config HAVE_CLK |
| 294 | 301 | bool |
| 295 | 302 | help |
| @@ -31,8 +31,6 @@ config ALPHA · 30 unmodified lines | ||
| 31 | 31 | select ODD_RT_SIGACTION |
| 32 | 32 | select OLD_SIGSUSPEND |
| 33 | 33 | select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67 |
| 34 | − select HAVE_MEMBLOCK | |
| 35 | − select NO_BOOTMEM | |
| 36 | 34 | help |
| 37 | 35 | The Alpha is a 64-bit general-purpose processor designed and |
| 38 | 36 | marketed by the Digital Equipment Corporation of blessed memory, |
| @@ -10,12 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | |
| 11 | 11 | #include <linux/personality.h> /* for ADDR_LIMIT_32BIT */ |
| 12 | 12 | |
| 13 | −/* | |
| 14 | − * Returns current instruction pointer ("program counter"). | |
| 15 | − */ | |
| 16 | −#define current_text_addr() \ | |
| 17 | − ({ void *__pc; __asm__ ("br %0,.+4" : "=r"(__pc)); __pc; }) | |
| 18 | − | |
| 19 | 13 | /* |
| 20 | 14 | * We have a 42-bit user address space: 4TB user VM... |
| 21 | 15 | */ |
| @@ -102,6 +102,8 @@ · 101 unmodified lines | ||
| 102 | 102 | #define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */ |
| 103 | 103 | #define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */ |
| 104 | 104 | #define TIOCGPTPEER _IO('T', 0x41) /* Safely open the slave */ |
| 105 | +#define TIOCGISO7816 _IOR('T', 0x42, struct serial_iso7816) | |
| 106 | +#define TIOCSISO7816 _IOWR('T', 0x43, struct serial_iso7816) | |
| 105 | 107 | |
| 106 | 108 | #define TIOCSERCONFIG 0x5453 |
| 107 | 109 | #define TIOCSERGWILD 0x5454 |
| @@ -346,7 +346,8 @@ apecs_init_arch(void) · 345 unmodified lines | ||
| 346 | 346 | * Window 1 is direct access 1GB at 1GB |
| 347 | 347 | * Window 2 is scatter-gather 8MB at 8MB (for isa) |
| 348 | 348 | */ |
| 349 | − hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); | |
| 349 | + hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, | |
| 350 | + SMP_CACHE_BYTES); | |
| 350 | 351 | hose->sg_pci = NULL; |
| 351 | 352 | __direct_map_base = 0x40000000; |
| 352 | 353 | __direct_map_size = 0x40000000; |
| @@ -21,7 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | #include <linux/pci.h> |
| 22 | 22 | #include <linux/sched.h> |
| 23 | 23 | #include <linux/init.h> |
| 24 | −#include <linux/bootmem.h> | |
| 24 | +#include <linux/memblock.h> | |
| 25 | 25 | |
| 26 | 26 | #include <asm/ptrace.h> |
| 27 | 27 | #include <asm/mce.h> |
| @@ -331,7 +331,7 @@ cia_prepare_tbia_workaround(int window) · 303 unmodified lines | ||
| 331 | 331 | long i; |
| 332 | 332 | |
| 333 | 333 | /* Use minimal 1K map. */ |
| 334 | − ppte = __alloc_bootmem(CIA_BROKEN_TBIA_SIZE, 32768, 0); | |
| 334 | + ppte = memblock_alloc_from(CIA_BROKEN_TBIA_SIZE, 32768, 0); | |
| 335 | 335 | pte = (virt_to_phys(ppte) >> (PAGE_SHIFT - 1)) | 1; |
| 336 | 336 | |
| 337 | 337 | for (i = 0; i < CIA_BROKEN_TBIA_SIZE / sizeof(unsigned long); ++i) |
| @@ -20,7 +20,6 @@ · 19 unmodified lines | ||
| 20 | 20 | #include <linux/sched.h> |
| 21 | 21 | #include <linux/init.h> |
| 22 | 22 | #include <linux/initrd.h> |
| 23 | −#include <linux/bootmem.h> | |
| 24 | 23 | #include <linux/memblock.h> |
| 25 | 24 | |
| 26 | 25 | #include <asm/ptrace.h> |
| @@ -234,8 +233,7 @@ albacore_init_arch(void) · 207 unmodified lines | ||
| 234 | 233 | unsigned long size; |
| 235 | 234 | |
| 236 | 235 | size = initrd_end - initrd_start; |
| 237 | − free_bootmem_node(NODE_DATA(0), __pa(initrd_start), | |
| 238 | − PAGE_ALIGN(size)); | |
| 236 | + memblock_free(__pa(initrd_start), PAGE_ALIGN(size)); | |
| 239 | 237 | if (!move_initrd(pci_mem)) |
| 240 | 238 | printk("irongate_init_arch: initrd too big " |
| 241 | 239 | "(%ldK)\ndisabling initrd\n", |
| @@ -275,7 +275,8 @@ lca_init_arch(void) · 274 unmodified lines | ||
| 275 | 275 | * Note that we do not try to save any of the DMA window CSRs |
| 276 | 276 | * before setting them, since we cannot read those CSRs on LCA. |
| 277 | 277 | */ |
| 278 | − hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); | |
| 278 | + hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, | |
| 279 | + SMP_CACHE_BYTES); | |
| 279 | 280 | hose->sg_pci = NULL; |
| 280 | 281 | __direct_map_base = 0x40000000; |
| 281 | 282 | __direct_map_size = 0x40000000; |
| @@ -18,7 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/mc146818rtc.h> |
| 19 | 19 | #include <linux/rtc.h> |
| 20 | 20 | #include <linux/module.h> |
| 21 | −#include <linux/bootmem.h> | |
| 21 | +#include <linux/memblock.h> | |
| 22 | 22 | |
| 23 | 23 | #include <asm/ptrace.h> |
| 24 | 24 | #include <asm/smp.h> |
| @@ -82,7 +82,7 @@ mk_resource_name(int pe, int port, char *str) · 57 unmodified lines | ||
| 82 | 82 | char *name; |
| 83 | 83 | |
| 84 | 84 | sprintf(tmp, "PCI %s PE %d PORT %d", str, pe, port); |
| 85 | − name = alloc_bootmem(strlen(tmp) + 1); | |
| 85 | + name = memblock_alloc(strlen(tmp) + 1, SMP_CACHE_BYTES); | |
| 86 | 86 | strcpy(name, tmp); |
| 87 | 87 | |
| 88 | 88 | return name; |
| @@ -117,7 +117,7 @@ alloc_io7(unsigned int pe) · 28 unmodified lines | ||
| 117 | 117 | return NULL; |
| 118 | 118 | } |
| 119 | 119 | |
| 120 | − io7 = alloc_bootmem(sizeof(*io7)); | |
| 120 | + io7 = memblock_alloc(sizeof(*io7), SMP_CACHE_BYTES); | |
| 121 | 121 | io7->pe = pe; |
| 122 | 122 | raw_spin_lock_init(&io7->irq_lock); |
| 123 | 123 | |
| @@ -364,9 +364,11 @@ mcpcia_startup_hose(struct pci_controller *hose) · 363 unmodified lines | ||
| 364 | 364 | * Window 1 is scatter-gather (up to) 1GB at 1GB (for pci) |
| 365 | 365 | * Window 2 is direct access 2GB at 2GB |
| 366 | 366 | */ |
| 367 | − hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); | |
| 367 | + hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, | |
| 368 | + SMP_CACHE_BYTES); | |
| 368 | 369 | hose->sg_pci = iommu_arena_new(hose, 0x40000000, |
| 369 | − size_for_memory(0x40000000), 0); | |
| 370 | + size_for_memory(0x40000000), | |
| 371 | + SMP_CACHE_BYTES); | |
| 370 | 372 | |
| 371 | 373 | __direct_map_base = 0x80000000; |
| 372 | 374 | __direct_map_size = 0x80000000; |
| @@ -351,7 +351,7 @@ t2_sg_map_window2(struct pci_controller *hose, · 350 unmodified lines | ||
| 351 | 351 | |
| 352 | 352 | /* Note we can only do 1 SG window, as the other is for direct, so |
| 353 | 353 | do an ISA SG area, especially for the floppy. */ |
| 354 | − hose->sg_isa = iommu_arena_new(hose, base, length, 0); | |
| 354 | + hose->sg_isa = iommu_arena_new(hose, base, length, SMP_CACHE_BYTES); | |
| 355 | 355 | hose->sg_pci = NULL; |
| 356 | 356 | |
| 357 | 357 | temp = (base & 0xfff00000UL) | ((base + length - 1) >> 20); |
| @@ -16,7 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <linux/sched.h> |
| 17 | 17 | #include <linux/init.h> |
| 18 | 18 | #include <linux/vmalloc.h> |
| 19 | −#include <linux/bootmem.h> | |
| 19 | +#include <linux/memblock.h> | |
| 20 | 20 | |
| 21 | 21 | #include <asm/ptrace.h> |
| 22 | 22 | #include <asm/smp.h> |
| @@ -316,10 +316,12 @@ titan_init_one_pachip_port(titan_pachip_port *port, int index) · 293 unmodified lines | ||
| 316 | 316 | * Window 1 is direct access 1GB at 2GB |
| 317 | 317 | * Window 2 is scatter-gather 1GB at 3GB |
| 318 | 318 | */ |
| 319 | − hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); | |
| 319 | + hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, | |
| 320 | + SMP_CACHE_BYTES); | |
| 320 | 321 | hose->sg_isa->align_entry = 8; /* 64KB for ISA */ |
| 321 | 322 | |
| 322 | − hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x40000000, 0); | |
| 323 | + hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x40000000, | |
| 324 | + SMP_CACHE_BYTES); | |
| 323 | 325 | hose->sg_pci->align_entry = 4; /* Titan caches 4 PTEs at a time */ |
| 324 | 326 | |
| 325 | 327 | port->wsba[0].csr = hose->sg_isa->dma_base | 3; |
| @@ -17,7 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | #include <linux/pci.h> |
| 18 | 18 | #include <linux/sched.h> |
| 19 | 19 | #include <linux/init.h> |
| 20 | −#include <linux/bootmem.h> | |
| 20 | +#include <linux/memblock.h> | |
| 21 | 21 | |
| 22 | 22 | #include <asm/ptrace.h> |
| 23 | 23 | #include <asm/smp.h> |
| @@ -319,12 +319,14 @@ tsunami_init_one_pchip(tsunami_pchip *pchip, int index) · 295 unmodified lines | ||
| 319 | 319 | * NOTE: we need the align_entry settings for Acer devices on ES40, |
| 320 | 320 | * specifically floppy and IDE when memory is larger than 2GB. |
| 321 | 321 | */ |
| 322 | − hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); | |
| 322 | + hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, | |
| 323 | + SMP_CACHE_BYTES); | |
| 323 | 324 | /* Initially set for 4 PTEs, but will be overridden to 64K for ISA. */ |
| 324 | 325 | hose->sg_isa->align_entry = 4; |
| 325 | 326 | |
| 326 | 327 | hose->sg_pci = iommu_arena_new(hose, 0x40000000, |
| 327 | − size_for_memory(0x40000000), 0); | |
| 328 | + size_for_memory(0x40000000), | |
| 329 | + SMP_CACHE_BYTES); | |
| 328 | 330 | hose->sg_pci->align_entry = 4; /* Tsunami caches 4 PTEs at a time */ |
| 329 | 331 | |
| 330 | 332 | __direct_map_base = 0x80000000; |
| @@ -111,8 +111,10 @@ wildfire_init_hose(int qbbno, int hoseno) · 110 unmodified lines | ||
| 111 | 111 | * ??? We ought to scale window 3 memory. |
| 112 | 112 | * |
| 113 | 113 | */ |
| 114 | − hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0); | |
| 115 | − hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x08000000, 0); | |
| 114 | + hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, | |
| 115 | + SMP_CACHE_BYTES); | |
| 116 | + hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x08000000, | |
| 117 | + SMP_CACHE_BYTES); | |
| 116 | 118 | |
| 117 | 119 | pci = WILDFIRE_pci(qbbno, hoseno); |
| 118 | 120 | |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | |
| 8 | 8 | #include <linux/pci.h> |
| 9 | 9 | #include <linux/init.h> |
| 10 | −#include <linux/bootmem.h> | |
| 10 | +#include <linux/memblock.h> | |
| 11 | 11 | #include <linux/gfp.h> |
| 12 | 12 | #include <linux/capability.h> |
| 13 | 13 | #include <linux/mm.h> |
| @@ -33,7 +33,7 @@ alloc_pci_controller(void) · 19 unmodified lines | ||
| 33 | 33 | { |
| 34 | 34 | struct pci_controller *hose; |
| 35 | 35 | |
| 36 | − hose = alloc_bootmem(sizeof(*hose)); | |
| 36 | + hose = memblock_alloc(sizeof(*hose), SMP_CACHE_BYTES); | |
| 37 | 37 | |
| 38 | 38 | *hose_tail = hose; |
| 39 | 39 | hose_tail = &hose->next; |
| @@ -44,7 +44,7 @@ alloc_pci_controller(void) · 4 unmodified lines | ||
| 44 | 44 | struct resource * __init |
| 45 | 45 | alloc_resource(void) |
| 46 | 46 | { |
| 47 | − return alloc_bootmem(sizeof(struct resource)); | |
| 47 | + return memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES); | |
| 48 | 48 | } |
| 49 | 49 | |
| 50 | 50 | SYSCALL_DEFINE3(pciconfig_iobase, long, which, unsigned long, bus, |
| @@ -18,7 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/init.h> |
| 19 | 19 | #include <linux/ioport.h> |
| 20 | 20 | #include <linux/kernel.h> |
| 21 | −#include <linux/bootmem.h> | |
| 21 | +#include <linux/memblock.h> | |
| 22 | 22 | #include <linux/module.h> |
| 23 | 23 | #include <linux/cache.h> |
| 24 | 24 | #include <linux/slab.h> |
| @@ -392,7 +392,7 @@ alloc_pci_controller(void) · 367 unmodified lines | ||
| 392 | 392 | { |
| 393 | 393 | struct pci_controller *hose; |
| 394 | 394 | |
| 395 | − hose = alloc_bootmem(sizeof(*hose)); | |
| 395 | + hose = memblock_alloc(sizeof(*hose), SMP_CACHE_BYTES); | |
| 396 | 396 | |
| 397 | 397 | *hose_tail = hose; |
| 398 | 398 | hose_tail = &hose->next; |
| @@ -403,7 +403,7 @@ alloc_pci_controller(void) · 4 unmodified lines | ||
| 403 | 403 | struct resource * __init |
| 404 | 404 | alloc_resource(void) |
| 405 | 405 | { |
| 406 | − return alloc_bootmem(sizeof(struct resource)); | |
| 406 | + return memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES); | |
| 407 | 407 | } |
| 408 | 408 | |
| 409 | 409 | |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | #include <linux/mm.h> |
| 8 | 8 | #include <linux/pci.h> |
| 9 | 9 | #include <linux/gfp.h> |
| 10 | −#include <linux/bootmem.h> | |
| 10 | +#include <linux/memblock.h> | |
| 11 | 11 | #include <linux/export.h> |
| 12 | 12 | #include <linux/scatterlist.h> |
| 13 | 13 | #include <linux/log2.h> |
| @@ -74,26 +74,26 @@ iommu_arena_new_node(int nid, struct pci_controller *hose, dma_addr_t base, · 60 unmodified lines | ||
| 74 | 74 | |
| 75 | 75 | #ifdef CONFIG_DISCONTIGMEM |
| 76 | 76 | |
| 77 | − arena = alloc_bootmem_node(NODE_DATA(nid), sizeof(*arena)); | |
| 77 | + arena = memblock_alloc_node(sizeof(*arena), align, nid); | |
| 78 | 78 | if (!NODE_DATA(nid) || !arena) { |
| 79 | 79 | printk("%s: couldn't allocate arena from node %d\n" |
| 80 | 80 | " falling back to system-wide allocation\n", |
| 81 | 81 | __func__, nid); |
| 82 | − arena = alloc_bootmem(sizeof(*arena)); | |
| 82 | + arena = memblock_alloc(sizeof(*arena), SMP_CACHE_BYTES); | |
| 83 | 83 | } |
| 84 | 84 | |
| 85 | − arena->ptes = __alloc_bootmem_node(NODE_DATA(nid), mem_size, align, 0); | |
| 85 | + arena->ptes = memblock_alloc_node(sizeof(*arena), align, nid); | |
| 86 | 86 | if (!NODE_DATA(nid) || !arena->ptes) { |
| 87 | 87 | printk("%s: couldn't allocate arena ptes from node %d\n" |
| 88 | 88 | " falling back to system-wide allocation\n", |
| 89 | 89 | __func__, nid); |
| 90 | − arena->ptes = __alloc_bootmem(mem_size, align, 0); | |
| 90 | + arena->ptes = memblock_alloc_from(mem_size, align, 0); | |
| 91 | 91 | } |
| 92 | 92 | |
| 93 | 93 | #else /* CONFIG_DISCONTIGMEM */ |
| 94 | 94 | |
| 95 | − arena = alloc_bootmem(sizeof(*arena)); | |
| 96 | − arena->ptes = __alloc_bootmem(mem_size, align, 0); | |
| 95 | + arena = memblock_alloc(sizeof(*arena), SMP_CACHE_BYTES); | |
| 96 | + arena->ptes = memblock_alloc_from(mem_size, align, 0); | |
| 97 | 97 | |
| 98 | 98 | #endif /* CONFIG_DISCONTIGMEM */ |
| 99 | 99 | |
| @@ -29,7 +29,6 @@ · 28 unmodified lines | ||
| 29 | 29 | #include <linux/string.h> |
| 30 | 30 | #include <linux/ioport.h> |
| 31 | 31 | #include <linux/platform_device.h> |
| 32 | −#include <linux/bootmem.h> | |
| 33 | 32 | #include <linux/memblock.h> |
| 34 | 33 | #include <linux/pci.h> |
| 35 | 34 | #include <linux/seq_file.h> |
| @@ -294,7 +293,7 @@ move_initrd(unsigned long mem_limit) · 258 unmodified lines | ||
| 294 | 293 | unsigned long size; |
| 295 | 294 | |
| 296 | 295 | size = initrd_end - initrd_start; |
| 297 | − start = __alloc_bootmem(PAGE_ALIGN(size), PAGE_SIZE, 0); | |
| 296 | + start = memblock_alloc_from(PAGE_ALIGN(size), PAGE_SIZE, 0); | |
| 298 | 297 | if (!start || __pa(start) + size > mem_limit) { |
| 299 | 298 | initrd_start = initrd_end = 0; |
| 300 | 299 | return NULL; |
| @@ -32,7 +32,7 @@ · 31 unmodified lines | ||
| 32 | 32 | #include <linux/pci.h> |
| 33 | 33 | #include <linux/init.h> |
| 34 | 34 | #include <linux/reboot.h> |
| 35 | −#include <linux/bootmem.h> | |
| 35 | +#include <linux/memblock.h> | |
| 36 | 36 | #include <linux/bitops.h> |
| 37 | 37 | |
| 38 | 38 | #include <asm/ptrace.h> |
| @@ -19,7 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/mm.h> |
| 20 | 20 | #include <linux/swap.h> |
| 21 | 21 | #include <linux/init.h> |
| 22 | −#include <linux/bootmem.h> /* max_low_pfn */ | |
| 22 | +#include <linux/memblock.h> /* max_low_pfn */ | |
| 23 | 23 | #include <linux/vmalloc.h> |
| 24 | 24 | #include <linux/gfp.h> |
| 25 | 25 | |
| @@ -282,7 +282,7 @@ mem_init(void) · 256 unmodified lines | ||
| 282 | 282 | { |
| 283 | 283 | set_max_mapnr(max_low_pfn); |
| 284 | 284 | high_memory = (void *) __va(max_low_pfn * PAGE_SIZE); |
| 285 | − free_all_bootmem(); | |
| 285 | + memblock_free_all(); | |
| 286 | 286 | mem_init_print_info(NULL); |
| 287 | 287 | } |
| 288 | 288 | |
| @@ -10,7 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | #include <linux/types.h> |
| 11 | 11 | #include <linux/kernel.h> |
| 12 | 12 | #include <linux/mm.h> |
| 13 | −#include <linux/bootmem.h> | |
| 14 | 13 | #include <linux/memblock.h> |
| 15 | 14 | #include <linux/swap.h> |
| 16 | 15 | #include <linux/initrd.h> |
| @@ -37,14 +37,12 @@ config ARC · 36 unmodified lines | ||
| 37 | 37 | select HAVE_KERNEL_LZMA |
| 38 | 38 | select HAVE_KPROBES |
| 39 | 39 | select HAVE_KRETPROBES |
| 40 | − select HAVE_MEMBLOCK | |
| 41 | 40 | select HAVE_MOD_ARCH_SPECIFIC |
| 42 | 41 | select HAVE_OPROFILE |
| 43 | 42 | select HAVE_PERF_EVENTS |
| 44 | 43 | select HANDLE_DOMAIN_IRQ |
| 45 | 44 | select IRQ_DOMAIN |
| 46 | 45 | select MODULES_USE_ELF_RELA |
| 47 | − select NO_BOOTMEM | |
| 48 | 46 | select OF |
| 49 | 47 | select OF_EARLY_FLATTREE |
| 50 | 48 | select OF_RESERVED_MEM |
| @@ -98,14 +98,6 @@ extern void start_thread(struct pt_regs * regs, unsigned long pc, · 97 unmodified lines | ||
| 98 | 98 | |
| 99 | 99 | extern unsigned int get_wchan(struct task_struct *p); |
| 100 | 100 | |
| 101 | −/* | |
| 102 | − * Default implementation of macro that returns current | |
| 103 | − * instruction pointer ("program counter"). | |
| 104 | − * Should the PC register be read instead ? This macro does not seem to | |
| 105 | − * be used in many places so this wont be all that bad. | |
| 106 | − */ | |
| 107 | −#define current_text_addr() ({ __label__ _l; _l: &&_l; }) | |
| 108 | − | |
| 109 | 101 | #endif /* !__ASSEMBLY__ */ |
| 110 | 102 | |
| 111 | 103 | /* |
| @@ -15,7 +15,7 @@ · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | #include <linux/sched.h> |
| 17 | 17 | #include <linux/module.h> |
| 18 | −#include <linux/bootmem.h> | |
| 18 | +#include <linux/memblock.h> | |
| 19 | 19 | #include <linux/sort.h> |
| 20 | 20 | #include <linux/slab.h> |
| 21 | 21 | #include <linux/stop_machine.h> |
| @@ -181,8 +181,8 @@ static void init_unwind_hdr(struct unwind_table *table, · 159 unmodified lines | ||
| 181 | 181 | */ |
| 182 | 182 | static void *__init unw_hdr_alloc_early(unsigned long sz) |
| 183 | 183 | { |
| 184 | − return __alloc_bootmem_nopanic(sz, sizeof(unsigned int), | |
| 185 | − MAX_DMA_ADDRESS); | |
| 184 | + return memblock_alloc_from_nopanic(sz, sizeof(unsigned int), | |
| 185 | + MAX_DMA_ADDRESS); | |
| 186 | 186 | } |
| 187 | 187 | |
| 188 | 188 | static void *unw_hdr_alloc(unsigned long sz) |
| @@ -7,7 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | * |
| 8 | 8 | */ |
| 9 | 9 | |
| 10 | −#include <linux/bootmem.h> | |
| 10 | +#include <linux/memblock.h> | |
| 11 | 11 | #include <linux/export.h> |
| 12 | 12 | #include <linux/highmem.h> |
| 13 | 13 | #include <asm/processor.h> |
| @@ -123,7 +123,7 @@ static noinline pte_t * __init alloc_kmap_pgtable(unsigned long kvaddr) · 109 unmodified lines | ||
| 123 | 123 | pud_k = pud_offset(pgd_k, kvaddr); |
| 124 | 124 | pmd_k = pmd_offset(pud_k, kvaddr); |
| 125 | 125 | |
| 126 | − pte_k = (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE); | |
| 126 | + pte_k = (pte_t *)memblock_alloc_low(PAGE_SIZE, PAGE_SIZE); | |
| 127 | 127 | pmd_populate_kernel(&init_mm, pmd_k, pte_k); |
| 128 | 128 | return pte_k; |
| 129 | 129 | } |
| @@ -8,7 +8,6 @@ · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | #include <linux/kernel.h> |
| 10 | 10 | #include <linux/mm.h> |
| 11 | −#include <linux/bootmem.h> | |
| 12 | 11 | #include <linux/memblock.h> |
| 13 | 12 | #ifdef CONFIG_BLK_DEV_INITRD |
| 14 | 13 | #include <linux/initrd.h> |
| @@ -218,7 +217,7 @@ void __init mem_init(void) · 203 unmodified lines | ||
| 218 | 217 | free_highmem_page(pfn_to_page(tmp)); |
| 219 | 218 | #endif |
| 220 | 219 | |
| 221 | − free_all_bootmem(); | |
| 220 | + memblock_free_all(); | |
| 222 | 221 | mem_init_print_info(NULL); |
| 223 | 222 | } |
| 224 | 223 | |
| @@ -82,7 +82,6 @@ config ARM · 81 unmodified lines | ||
| 82 | 82 | select HAVE_KERNEL_XZ |
| 83 | 83 | select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M |
| 84 | 84 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
| 85 | − select HAVE_MEMBLOCK | |
| 86 | 85 | select HAVE_MOD_ARCH_SPECIFIC |
| 87 | 86 | select HAVE_NMI |
| 88 | 87 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
| @@ -100,7 +99,6 @@ config ARM · 11 unmodified lines | ||
| 100 | 99 | select IRQ_FORCED_THREADING |
| 101 | 100 | select MODULES_USE_ELF_REL |
| 102 | 101 | select NEED_DMA_MAP_STATE |
| 103 | − select NO_BOOTMEM | |
| 104 | 102 | select OF_EARLY_FLATTREE if OF |
| 105 | 103 | select OF_RESERVED_MEM if OF |
| 106 | 104 | select OLD_SIGACTION |
| @@ -701,6 +699,7 @@ config ARCH_VIRT · 594 unmodified lines | ||
| 701 | 699 | select ARM_GIC_V3_ITS if PCI |
| 702 | 700 | select ARM_PSCI |
| 703 | 701 | select HAVE_ARM_ARCH_TIMER |
| 702 | + select ARCH_SUPPORTS_BIG_ENDIAN | |
| 704 | 703 | |
| 705 | 704 | # |
| 706 | 705 | # This is sorted alphabetically by mach-* pathname. However, plat-* |
| @@ -947,12 +947,13 @@ choice · 946 unmodified lines | ||
| 947 | 947 | |
| 948 | 948 | config DEBUG_RCAR_GEN2_SCIF0 |
| 949 | 949 | bool "Kernel low-level debugging messages via SCIF0 on R-Car Gen2 and RZ/G1" |
| 950 | − depends on ARCH_R8A7743 || ARCH_R8A7790 || ARCH_R8A7791 || \ | |
| 951 | − ARCH_R8A7792 || ARCH_R8A7793 | |
| 950 | + depends on ARCH_R8A7743 || ARCH_R8A7744 || ARCH_R8A7790 || \ | |
| 951 | + ARCH_R8A7791 || ARCH_R8A7792 || ARCH_R8A7793 | |
| 952 | 952 | help |
| 953 | 953 | Say Y here if you want kernel low-level debugging support |
| 954 | − via SCIF0 on Renesas RZ/G1M (R8A7743), R-Car H2 (R8A7790), | |
| 955 | − M2-W (R8A7791), V2H (R8A7792), or M2-N (R8A7793). | |
| 954 | + via SCIF0 on Renesas RZ/G1M (R8A7743), RZ/G1N (R8A7744), | |
| 955 | + R-Car H2 (R8A7790), M2-W (R8A7791), V2H (R8A7792), or | |
| 956 | + M2-N (R8A7793). | |
| 956 | 957 | |
| 957 | 958 | config DEBUG_RCAR_GEN2_SCIF1 |
| 958 | 959 | bool "Kernel low-level debugging messages via SCIF1 on R8A77470" |
| @@ -81,6 +81,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ · 80 unmodified lines | ||
| 81 | 81 | bcm2836-rpi-2-b.dtb \ |
| 82 | 82 | bcm2837-rpi-3-b.dtb \ |
| 83 | 83 | bcm2837-rpi-3-b-plus.dtb \ |
| 84 | + bcm2837-rpi-cm3-io3.dtb \ | |
| 84 | 85 | bcm2835-rpi-zero.dtb \ |
| 85 | 86 | bcm2835-rpi-zero-w.dtb |
| 86 | 87 | dtb-$(CONFIG_ARCH_BCM_5301X) += \ |
| @@ -321,6 +322,7 @@ dtb-$(CONFIG_MACH_MESON6) += \ · 234 unmodified lines | ||
| 321 | 322 | meson6-atv1200.dtb |
| 322 | 323 | dtb-$(CONFIG_MACH_MESON8) += \ |
| 323 | 324 | meson8-minix-neo-x8.dtb \ |
| 325 | + meson8b-ec100.dtb \ | |
| 324 | 326 | meson8b-mxq.dtb \ |
| 325 | 327 | meson8b-odroidc1.dtb \ |
| 326 | 328 | meson8m2-mxiii-plus.dtb |
| @@ -548,6 +550,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \ · 221 unmodified lines | ||
| 548 | 550 | dtb-$(CONFIG_SOC_IMX6UL) += \ |
| 549 | 551 | imx6ul-14x14-evk.dtb \ |
| 550 | 552 | imx6ul-ccimx6ulsbcexpress.dtb \ |
| 553 | + imx6ul-ccimx6ulsbcpro.dtb \ | |
| 551 | 554 | imx6ul-geam.dtb \ |
| 552 | 555 | imx6ul-isiot-emmc.dtb \ |
| 553 | 556 | imx6ul-isiot-nand.dtb \ |
| @@ -559,7 +562,8 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ · 5 unmodified lines | ||
| 559 | 562 | imx6ul-tx6ul-mainboard.dtb \ |
| 560 | 563 | imx6ull-14x14-evk.dtb \ |
| 561 | 564 | imx6ull-colibri-eval-v3.dtb \ |
| 562 | − imx6ull-colibri-wifi-eval-v3.dtb | |
| 565 | + imx6ull-colibri-wifi-eval-v3.dtb \ | |
| 566 | + imx6ulz-14x14-evk.dtb | |
| 563 | 567 | dtb-$(CONFIG_SOC_IMX7D) += \ |
| 564 | 568 | imx7d-cl-som-imx7.dtb \ |
| 565 | 569 | imx7d-colibri-emmc-eval-v3.dtb \ |
| @@ -649,6 +653,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \ · 83 unmodified lines | ||
| 649 | 653 | omap3-gta04a3.dtb \ |
| 650 | 654 | omap3-gta04a4.dtb \ |
| 651 | 655 | omap3-gta04a5.dtb \ |
| 656 | + omap3-gta04a5one.dtb \ | |
| 652 | 657 | omap3-ha.dtb \ |
| 653 | 658 | omap3-ha-lcd.dtb \ |
| 654 | 659 | omap3-igep0020.dtb \ |
| @@ -706,6 +711,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \ · 51 unmodified lines | ||
| 706 | 711 | am335x-evmsk.dtb \ |
| 707 | 712 | am335x-icev2.dtb \ |
| 708 | 713 | am335x-lxm.dtb \ |
| 714 | + am335x-moxa-uc-2101.dtb \ | |
| 709 | 715 | am335x-moxa-uc-8100-me-t.dtb \ |
| 710 | 716 | am335x-nano.dtb \ |
| 711 | 717 | am335x-pdu001.dtb \ |
| @@ -864,6 +870,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ · 152 unmodified lines | ||
| 864 | 870 | rk3288-r89.dtb \ |
| 865 | 871 | rk3288-rock2-square.dtb \ |
| 866 | 872 | rk3288-tinker.dtb \ |
| 873 | + rk3288-tinker-s.dtb \ | |
| 867 | 874 | rk3288-veyron-brain.dtb \ |
| 868 | 875 | rk3288-veyron-jaq.dtb \ |
| 869 | 876 | rk3288-veyron-jerry.dtb \ |
| @@ -892,7 +899,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \ · 22 unmodified lines | ||
| 892 | 899 | socfpga_arria10_socdk_sdmmc.dtb \ |
| 893 | 900 | socfpga_cyclone5_mcvevk.dtb \ |
| 894 | 901 | socfpga_cyclone5_socdk.dtb \ |
| 895 | − socfpga_cyclone5_de0_sockit.dtb \ | |
| 902 | + socfpga_cyclone5_de0_nano_soc.dtb \ | |
| 896 | 903 | socfpga_cyclone5_sockit.dtb \ |
| 897 | 904 | socfpga_cyclone5_socrates.dtb \ |
| 898 | 905 | socfpga_cyclone5_sodia.dtb \ |
| @@ -1033,6 +1040,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ · 134 unmodified lines | ||
| 1033 | 1040 | sun8i-h2-plus-orangepi-r1.dtb \ |
| 1034 | 1041 | sun8i-h2-plus-orangepi-zero.dtb \ |
| 1035 | 1042 | sun8i-h3-bananapi-m2-plus.dtb \ |
| 1043 | + sun8i-h3-bananapi-m2-plus-v1.2.dtb \ | |
| 1036 | 1044 | sun8i-h3-beelink-x2.dtb \ |
| 1037 | 1045 | sun8i-h3-libretech-all-h3-cc.dtb \ |
| 1038 | 1046 | sun8i-h3-nanopi-m1.dtb \ |
| @@ -1046,6 +1054,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ · 7 unmodified lines | ||
| 1046 | 1054 | sun8i-h3-orangepi-pc-plus.dtb \ |
| 1047 | 1055 | sun8i-h3-orangepi-plus.dtb \ |
| 1048 | 1056 | sun8i-h3-orangepi-plus2e.dtb \ |
| 1057 | + sun8i-h3-orangepi-zero-plus2.dtb \ | |
| 1049 | 1058 | sun8i-r16-bananapi-m2m.dtb \ |
| 1050 | 1059 | sun8i-r16-nintendo-nes-classic.dtb \ |
| 1051 | 1060 | sun8i-r16-nintendo-super-nes-classic.dtb \ |
| @@ -1061,6 +1070,7 @@ dtb-$(CONFIG_ARCH_TANGO) += \ · 9 unmodified lines | ||
| 1061 | 1070 | tango4-vantage-1172.dtb |
| 1062 | 1071 | dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ |
| 1063 | 1072 | tegra20-harmony.dtb \ |
| 1073 | + tegra20-colibri-eval-v3.dtb \ | |
| 1064 | 1074 | tegra20-colibri-iris.dtb \ |
| 1065 | 1075 | tegra20-medcom-wide.dtb \ |
| 1066 | 1076 | tegra20-paz00.dtb \ |
| @@ -1071,6 +1081,7 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ · 4 unmodified lines | ||
| 1071 | 1081 | tegra20-ventana.dtb |
| 1072 | 1082 | dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \ |
| 1073 | 1083 | tegra30-apalis-eval.dtb \ |
| 1084 | + tegra30-apalis-v1.1-eval.dtb \ | |
| 1074 | 1085 | tegra30-beaver.dtb \ |
| 1075 | 1086 | tegra30-cardhu-a02.dtb \ |
| 1076 | 1087 | tegra30-cardhu-a04.dtb \ |
| @@ -1149,6 +1160,7 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \ · 72 unmodified lines | ||
| 1149 | 1160 | dtb-$(CONFIG_MACH_ARMADA_375) += \ |
| 1150 | 1161 | armada-375-db.dtb |
| 1151 | 1162 | dtb-$(CONFIG_MACH_ARMADA_38X) += \ |
| 1163 | + armada-385-db-88f6820-amc.dtb \ | |
| 1152 | 1164 | armada-385-db-ap.dtb \ |
| 1153 | 1165 | armada-385-linksys-caiman.dtb \ |
| 1154 | 1166 | armada-385-linksys-cobra.dtb \ |
| @@ -1199,6 +1211,8 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb · 44 unmodified lines | ||
| 1199 | 1211 | dtb-$(CONFIG_ARCH_ASPEED) += \ |
| 1200 | 1212 | aspeed-ast2500-evb.dtb \ |
| 1201 | 1213 | aspeed-bmc-arm-centriq2400-rep.dtb \ |
| 1214 | + aspeed-bmc-arm-stardragon4800-rep2.dtb \ | |
| 1215 | + aspeed-bmc-facebook-tiogapass.dtb \ | |
| 1202 | 1216 | aspeed-bmc-intel-s2600wf.dtb \ |
| 1203 | 1217 | aspeed-bmc-opp-lanyang.dtb \ |
| 1204 | 1218 | aspeed-bmc-opp-palmetto.dtb \ |
| @@ -379,7 +379,7 @@ · 378 unmodified lines | ||
| 379 | 379 | }; |
| 380 | 380 | |
| 381 | 381 | &cpsw_emac0 { |
| 382 | − phy_id = <&davinci_mdio>, <0>; | |
| 382 | + phy-handle = <ðphy0>; | |
| 383 | 383 | phy-mode = "mii"; |
| 384 | 384 | }; |
| 385 | 385 | |
| @@ -396,6 +396,10 @@ · 10 unmodified lines | ||
| 396 | 396 | pinctrl-0 = <&davinci_mdio_default>; |
| 397 | 397 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 398 | 398 | status = "okay"; |
| 399 | + | |
| 400 | + ethphy0: ethernet-phy@0 { | |
| 401 | + reg = <0>; | |
| 402 | + }; | |
| 399 | 403 | }; |
| 400 | 404 | |
| 401 | 405 | &mmc1 { |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | */ |
| 8 | 8 | |
| 9 | 9 | #include <dt-bindings/display/tda998x.h> |
| 10 | +#include <dt-bindings/interrupt-controller/irq.h> | |
| 10 | 11 | |
| 11 | 12 | &ldo3_reg { |
| 12 | 13 | regulator-min-microvolt = <1800000>; |
| @@ -88,9 +89,11 @@ · 75 unmodified lines | ||
| 88 | 89 | }; |
| 89 | 90 | |
| 90 | 91 | &i2c0 { |
| 91 | − tda19988: tda19988 { | |
| 92 | + tda19988: tda19988@70 { | |
| 92 | 93 | compatible = "nxp,tda998x"; |
| 93 | 94 | reg = <0x70>; |
| 95 | + nxp,calib-gpios = <&gpio1 25 0>; | |
| 96 | + interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>; | |
| 94 | 97 | |
| 95 | 98 | pinctrl-names = "default", "off"; |
| 96 | 99 | pinctrl-0 = <&nxp_hdmi_bonelt_pins>; |
| @@ -140,10 +140,14 @@ · 139 unmodified lines | ||
| 140 | 140 | pinctrl-0 = <&davinci_mdio_default>; |
| 141 | 141 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 142 | 142 | status = "okay"; |
| 143 | + | |
| 144 | + ethphy0: ethernet-phy@0 { | |
| 145 | + reg = <0>; | |
| 146 | + }; | |
| 143 | 147 | }; |
| 144 | 148 | |
| 145 | 149 | &cpsw_emac0 { |
| 146 | − phy_id = <&davinci_mdio>, <0>; | |
| 150 | + phy-handle = <ðphy0>; | |
| 147 | 151 | phy-mode = "rmii"; |
| 148 | 152 | }; |
| 149 | 153 | |
| @@ -486,10 +486,14 @@ status = "okay"; · 485 unmodified lines | ||
| 486 | 486 | pinctrl-0 = <&davinci_mdio_default>; |
| 487 | 487 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 488 | 488 | status = "okay"; |
| 489 | + | |
| 490 | + ethphy0: ethernet-phy@0 { | |
| 491 | + reg = <0>; | |
| 492 | + }; | |
| 489 | 493 | }; |
| 490 | 494 | |
| 491 | 495 | &cpsw_emac0 { |
| 492 | − phy_id = <&davinci_mdio>, <0>; | |
| 496 | + phy-handle = <ðphy0>; | |
| 493 | 497 | phy-mode = "rgmii-txid"; |
| 494 | 498 | }; |
| 495 | 499 | |
| @@ -713,6 +713,7 @@ · 712 unmodified lines | ||
| 713 | 713 | pinctrl-0 = <&cpsw_default>; |
| 714 | 714 | pinctrl-1 = <&cpsw_sleep>; |
| 715 | 715 | status = "okay"; |
| 716 | + slaves = <1>; | |
| 716 | 717 | }; |
| 717 | 718 | |
| 718 | 719 | &davinci_mdio { |
| @@ -720,15 +721,14 @@ · 1 unmodified line | ||
| 720 | 721 | pinctrl-0 = <&davinci_mdio_default>; |
| 721 | 722 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 722 | 723 | status = "okay"; |
| 723 | −}; | |
| 724 | 724 | |
| 725 | −&cpsw_emac0 { | |
| 726 | − phy_id = <&davinci_mdio>, <0>; | |
| 727 | − phy-mode = "rgmii-txid"; | |
| 725 | + ethphy0: ethernet-phy@0 { | |
| 726 | + reg = <0>; | |
| 727 | + }; | |
| 728 | 728 | }; |
| 729 | 729 | |
| 730 | −&cpsw_emac1 { | |
| 731 | − phy_id = <&davinci_mdio>, <1>; | |
| 730 | +&cpsw_emac0 { | |
| 731 | + phy-handle = <ðphy0>; | |
| 732 | 732 | phy-mode = "rgmii-txid"; |
| 733 | 733 | }; |
| 734 | 734 | |
| @@ -639,16 +639,24 @@ · 638 unmodified lines | ||
| 639 | 639 | pinctrl-0 = <&davinci_mdio_default>; |
| 640 | 640 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 641 | 641 | status = "okay"; |
| 642 | + | |
| 643 | + ethphy0: ethernet-phy@0 { | |
| 644 | + reg = <0>; | |
| 645 | + }; | |
| 646 | + | |
| 647 | + ethphy1: ethernet-phy@1 { | |
| 648 | + reg = <1>; | |
| 649 | + }; | |
| 642 | 650 | }; |
| 643 | 651 | |
| 644 | 652 | &cpsw_emac0 { |
| 645 | − phy_id = <&davinci_mdio>, <0>; | |
| 653 | + phy-handle = <ðphy0>; | |
| 646 | 654 | phy-mode = "rgmii-txid"; |
| 647 | 655 | dual_emac_res_vlan = <1>; |
| 648 | 656 | }; |
| 649 | 657 | |
| 650 | 658 | &cpsw_emac1 { |
| 651 | − phy_id = <&davinci_mdio>, <1>; | |
| 659 | + phy-handle = <ðphy1>; | |
| 652 | 660 | phy-mode = "rgmii-txid"; |
| 653 | 661 | dual_emac_res_vlan = <2>; |
| 654 | 662 | }; |
| @@ -102,15 +102,24 @@ · 101 unmodified lines | ||
| 102 | 102 | |
| 103 | 103 | &davinci_mdio { |
| 104 | 104 | status = "okay"; |
| 105 | + | |
| 106 | + ethphy0: ethernet-phy@0 { | |
| 107 | + reg = <0>; | |
| 108 | + }; | |
| 109 | + | |
| 110 | + ethphy1: ethernet-phy@1 { | |
| 111 | + reg = <1>; | |
| 112 | + }; | |
| 105 | 113 | }; |
| 106 | 114 | |
| 107 | 115 | &cpsw_emac0 { |
| 108 | − phy_id = <&davinci_mdio>, <0>; | |
| 116 | + phy-handle = <ðphy0>; | |
| 109 | 117 | phy-mode = "rmii"; |
| 118 | + | |
| 110 | 119 | }; |
| 111 | 120 | |
| 112 | 121 | &cpsw_emac1 { |
| 113 | − phy_id = <&davinci_mdio>, <1>; | |
| 122 | + phy-handle = <ðphy1>; | |
| 114 | 123 | phy-mode = "rmii"; |
| 115 | 124 | }; |
| 116 | 125 | |
| @@ -317,13 +317,13 @@ · 316 unmodified lines | ||
| 317 | 317 | }; |
| 318 | 318 | |
| 319 | 319 | &cpsw_emac0 { |
| 320 | − phy_id = <&davinci_mdio>, <5>; | |
| 320 | + phy-handle = <ðphy0>; | |
| 321 | 321 | phy-mode = "rmii"; |
| 322 | 322 | dual_emac_res_vlan = <2>; |
| 323 | 323 | }; |
| 324 | 324 | |
| 325 | 325 | &cpsw_emac1 { |
| 326 | − phy_id = <&davinci_mdio>, <4>; | |
| 326 | + phy-handle = <ðphy1>; | |
| 327 | 327 | phy-mode = "rmii"; |
| 328 | 328 | dual_emac_res_vlan = <3>; |
| 329 | 329 | }; |
| @@ -345,6 +345,14 @@ · 15 unmodified lines | ||
| 345 | 345 | pinctrl-0 = <&davinci_mdio_default>; |
| 346 | 346 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 347 | 347 | status = "okay"; |
| 348 | + | |
| 349 | + ethphy0: ethernet-phy@5 { | |
| 350 | + reg = <5>; | |
| 351 | + }; | |
| 352 | + | |
| 353 | + ethphy1: ethernet-phy@4 { | |
| 354 | + reg = <4>; | |
| 355 | + }; | |
| 348 | 356 | }; |
| 349 | 357 | |
| 350 | 358 | &mmc1 { |
| @@ -0,0 +1,249 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | +/* | |
| 3 | + * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/ | |
| 4 | + * | |
| 5 | + * Authors: SZ Lin (林上智) <sz.lin@moxa.com> | |
| 6 | + * Wes Huang (黃淵河) <wes.huang@moxa.com> | |
| 7 | + * Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com> | |
| 8 | + */ | |
| 9 | + | |
| 10 | +#include "am33xx.dtsi" | |
| 11 | + | |
| 12 | +/ { | |
| 13 | + vbat: vbat-regulator { | |
| 14 | + compatible = "regulator-fixed"; | |
| 15 | + }; | |
| 16 | + | |
| 17 | + /* Power supply provides a fixed 3.3V @3A */ | |
| 18 | + vmmcsd_fixed: vmmcsd-regulator { | |
| 19 | + compatible = "regulator-fixed"; | |
| 20 | + regulator-name = "vmmcsd_fixed"; | |
| 21 | + regulator-min-microvolt = <3300000>; | |
| 22 | + regulator-max-microvolt = <3300000>; | |
| 23 | + regulator-boot-on; | |
| 24 | + }; | |
| 25 | + | |
| 26 | + buttons: push_button { | |
| 27 | + compatible = "gpio-keys"; | |
| 28 | + }; | |
| 29 | +}; | |
| 30 | + | |
| 31 | +&am33xx_pinmux { | |
| 32 | + pinctrl-names = "default"; | |
| 33 | + | |
| 34 | + i2c0_pins: pinmux_i2c0_pins { | |
| 35 | + pinctrl-single,pins = < | |
| 36 | + AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
| 37 | + AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
| 38 | + >; | |
| 39 | + }; | |
| 40 | + | |
| 41 | + push_button_pins: pinmux_push_button { | |
| 42 | + pinctrl-single,pins = < | |
| 43 | + AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2_23 */ | |
| 44 | + >; | |
| 45 | + }; | |
| 46 | + | |
| 47 | + uart0_pins: pinmux_uart0_pins { | |
| 48 | + pinctrl-single,pins = < | |
| 49 | + AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
| 50 | + AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
| 51 | + >; | |
| 52 | + }; | |
| 53 | + | |
| 54 | + davinci_mdio_default: davinci_mdio_default { | |
| 55 | + pinctrl-single,pins = < | |
| 56 | + /* MDIO */ | |
| 57 | + AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
| 58 | + AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
| 59 | + >; | |
| 60 | + }; | |
| 61 | + | |
| 62 | + mmc1_pins_default: pinmux_mmc1_pins { | |
| 63 | + pinctrl-single,pins = < | |
| 64 | + /* eMMC */ | |
| 65 | + AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad12.mmc1_dat0 */ | |
| 66 | + AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad13.mmc1_dat1 */ | |
| 67 | + AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad14.mmc1_dat2 */ | |
| 68 | + AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad15.mmc1_dat3 */ | |
| 69 | + AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad8.mmc1_dat4 */ | |
| 70 | + AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad9.mmc1_dat5 */ | |
| 71 | + AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad10.mmc1_dat6 */ | |
| 72 | + AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad11.mmc1_dat7 */ | |
| 73 | + AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ | |
| 74 | + AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ | |
| 75 | + >; | |
| 76 | + }; | |
| 77 | + | |
| 78 | + spi0_pins: pinmux_spi0 { | |
| 79 | + pinctrl-single,pins = < | |
| 80 | + AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */ | |
| 81 | + AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ | |
| 82 | + AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */ | |
| 83 | + AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */ | |
| 84 | + >; | |
| 85 | + }; | |
| 86 | +}; | |
| 87 | + | |
| 88 | +&uart0 { | |
| 89 | + /* Console */ | |
| 90 | + status = "okay"; | |
| 91 | + pinctrl-names = "default"; | |
| 92 | + pinctrl-0 = <&uart0_pins>; | |
| 93 | +}; | |
| 94 | + | |
| 95 | +&i2c0 { | |
| 96 | + pinctrl-names = "default"; | |
| 97 | + pinctrl-0 = <&i2c0_pins>; | |
| 98 | + | |
| 99 | + status = "okay"; | |
| 100 | + clock-frequency = <400000>; | |
| 101 | + | |
| 102 | + eeprom: eeprom@50 { | |
| 103 | + compatible = "atmel,24c16"; | |
| 104 | + pagesize = <16>; | |
| 105 | + reg = <0x50>; | |
| 106 | + }; | |
| 107 | + | |
| 108 | + rtc_wdt: rtc_wdt@68 { | |
| 109 | + compatible = "dallas,ds1374"; | |
| 110 | + reg = <0x68>; | |
| 111 | + }; | |
| 112 | +}; | |
| 113 | + | |
| 114 | +&usb { | |
| 115 | + status = "okay"; | |
| 116 | +}; | |
| 117 | + | |
| 118 | +&usb_ctrl_mod { | |
| 119 | + status = "okay"; | |
| 120 | +}; | |
| 121 | + | |
| 122 | +&usb0_phy { | |
| 123 | + status = "okay"; | |
| 124 | +}; | |
| 125 | + | |
| 126 | +&usb0 { | |
| 127 | + status = "okay"; | |
| 128 | + dr_mode = "host"; | |
| 129 | +}; | |
| 130 | + | |
| 131 | +&cppi41dma { | |
| 132 | + status = "okay"; | |
| 133 | +}; | |
| 134 | + | |
| 135 | +/* Power */ | |
| 136 | +&vbat { | |
| 137 | + regulator-name = "vbat"; | |
| 138 | + regulator-min-microvolt = <5000000>; | |
| 139 | + regulator-max-microvolt = <5000000>; | |
| 140 | +}; | |
| 141 | + | |
| 142 | +&mac { | |
| 143 | + pinctrl-names = "default"; | |
| 144 | + pinctrl-0 = <&cpsw_default>; | |
| 145 | + status = "okay"; | |
| 146 | +}; | |
| 147 | + | |
| 148 | +&davinci_mdio { | |
| 149 | + pinctrl-names = "default"; | |
| 150 | + pinctrl-0 = <&davinci_mdio_default>; | |
| 151 | + status = "okay"; | |
| 152 | +}; | |
| 153 | + | |
| 154 | +&cpsw_emac0 { | |
| 155 | + status = "okay"; | |
| 156 | +}; | |
| 157 | + | |
| 158 | +&cpsw_emac1 { | |
| 159 | + status = "okay"; | |
| 160 | +}; | |
| 161 | + | |
| 162 | +&phy_sel { | |
| 163 | + reg= <0x44e10650 0xf5>; | |
| 164 | + rmii-clock-ext; | |
| 165 | +}; | |
| 166 | + | |
| 167 | +&sham { | |
| 168 | + status = "okay"; | |
| 169 | +}; | |
| 170 | + | |
| 171 | +&aes { | |
| 172 | + status = "okay"; | |
| 173 | +}; | |
| 174 | + | |
| 175 | +&gpio0 { | |
| 176 | + ti,no-reset-on-init; | |
| 177 | +}; | |
| 178 | + | |
| 179 | +&mmc2 { | |
| 180 | + pinctrl-names = "default"; | |
| 181 | + vmmc-supply = <&vmmcsd_fixed>; | |
| 182 | + bus-width = <8>; | |
| 183 | + pinctrl-0 = <&mmc1_pins_default>; | |
| 184 | + ti,non-removable; | |
| 185 | + status = "okay"; | |
| 186 | +}; | |
| 187 | + | |
| 188 | +&buttons { | |
| 189 | + pinctrl-names = "default"; | |
| 190 | + pinctrl-0 = <&push_button_pins>; | |
| 191 | + #address-cells = <1>; | |
| 192 | + #size-cells = <0>; | |
| 193 | + | |
| 194 | + button@0 { | |
| 195 | + label = "push_button"; | |
| 196 | + linux,code = <0x100>; | |
| 197 | + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; | |
| 198 | + }; | |
| 199 | +}; | |
| 200 | + | |
| 201 | +/* SPI Busses */ | |
| 202 | +&spi0 { | |
| 203 | + status = "okay"; | |
| 204 | + pinctrl-names = "default"; | |
| 205 | + pinctrl-0 = <&spi0_pins>; | |
| 206 | + | |
| 207 | + m25p80@0 { | |
| 208 | + compatible = "mx25l6405d"; | |
| 209 | + spi-max-frequency = <40000000>; | |
| 210 | + | |
| 211 | + reg = <0>; | |
| 212 | + spi-cpol; | |
| 213 | + spi-cpha; | |
| 214 | + | |
| 215 | + partitions { | |
| 216 | + compatible = "fixed-partitions"; | |
| 217 | + #address-cells = <1>; | |
| 218 | + #size-cells = <1>; | |
| 219 | + | |
| 220 | + /* reg : The partition's offset and size within the mtd bank. */ | |
| 221 | + partitions@0 { | |
| 222 | + label = "MLO"; | |
| 223 | + reg = <0x0 0x80000>; | |
| 224 | + }; | |
| 225 | + | |
| 226 | + partitions@1 { | |
| 227 | + label = "U-Boot"; | |
| 228 | + reg = <0x80000 0x100000>; | |
| 229 | + }; | |
| 230 | + | |
| 231 | + partitions@2 { | |
| 232 | + label = "U-Boot Env"; | |
| 233 | + reg = <0x180000 0x40000>; | |
| 234 | + }; | |
| 235 | + }; | |
| 236 | + }; | |
| 237 | +}; | |
| 238 | + | |
| 239 | +&spi1 { | |
| 240 | + status = "okay"; | |
| 241 | + pinctrl-names = "default"; | |
| 242 | + pinctrl-0 = <&spi1_pins>; | |
| 243 | + | |
| 244 | + tpm_spi_tis@0 { | |
| 245 | + compatible = "tcg,tpm_tis-spi"; | |
| 246 | + reg = <0>; | |
| 247 | + spi-max-frequency = <500000>; | |
| 248 | + }; | |
| 249 | +}; | |
| @@ -0,0 +1,69 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | +/* | |
| 3 | + * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/ | |
| 4 | + * | |
| 5 | + * Authors: SZ Lin (林上智) <sz.lin@moxa.com> | |
| 6 | + * Wes Huang (黃淵河) <wes.huang@moxa.com> | |
| 7 | + * Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com> | |
| 8 | + */ | |
| 9 | + | |
| 10 | +/dts-v1/; | |
| 11 | + | |
| 12 | +#include "am335x-moxa-uc-2100-common.dtsi" | |
| 13 | + | |
| 14 | +/ { | |
| 15 | + model = "Moxa UC-2101"; | |
| 16 | + compatible = "moxa,uc-2101", "ti,am33xx"; | |
| 17 | + | |
| 18 | + leds { | |
| 19 | + compatible = "gpio-leds"; | |
| 20 | + led1 { | |
| 21 | + label = "UC2100:GREEN:USER"; | |
| 22 | + gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>; | |
| 23 | + default-state = "off"; | |
| 24 | + }; | |
| 25 | + }; | |
| 26 | +}; | |
| 27 | + | |
| 28 | +&am33xx_pinmux { | |
| 29 | + pinctrl-names = "default"; | |
| 30 | + | |
| 31 | + cpsw_default: cpsw_default { | |
| 32 | + pinctrl-single,pins = < | |
| 33 | + /* Slave 1 */ | |
| 34 | + AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ | |
| 35 | + AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */ | |
| 36 | + AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */ | |
| 37 | + AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ | |
| 38 | + AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ | |
| 39 | + AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ | |
| 40 | + AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ | |
| 41 | + AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_refclk.rmii1_refclk */ | |
| 42 | + >; | |
| 43 | + }; | |
| 44 | + | |
| 45 | + spi1_pins: pinmux_spi1 { | |
| 46 | + pinctrl-single,pins = < | |
| 47 | + AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* ecap0_in_pwm0_out.spi1_sclk */ | |
| 48 | + AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE4) /* uart1_ctsn.spi1_cs0 */ | |
| 49 | + AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* uart0_ctsn.spi1_d0 */ | |
| 50 | + AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* uart0_rtsn.spi1_d1 */ | |
| 51 | + >; | |
| 52 | + }; | |
| 53 | +}; | |
| 54 | + | |
| 55 | +&davinci_mdio { | |
| 56 | + phy0: ethernet-phy@4 { | |
| 57 | + reg = <4>; | |
| 58 | + }; | |
| 59 | +}; | |
| 60 | + | |
| 61 | +&cpsw_emac0 { | |
| 62 | + status = "okay"; | |
| 63 | + phy-handle = <&phy0>; | |
| 64 | + phy-mode = "rmii"; | |
| 65 | +}; | |
| 66 | + | |
| 67 | +&cpsw_emac1 { | |
| 68 | + status = "disabled"; | |
| 69 | +}; | |
| @@ -422,18 +422,26 @@ · 421 unmodified lines | ||
| 422 | 422 | pinctrl-names = "default"; |
| 423 | 423 | pinctrl-0 = <&davinci_mdio_default>; |
| 424 | 424 | status = "okay"; |
| 425 | + | |
| 426 | + ethphy0: ethernet-phy@4 { | |
| 427 | + reg = <4>; | |
| 428 | + }; | |
| 429 | + | |
| 430 | + ethphy1: ethernet-phy@5 { | |
| 431 | + reg = <5>; | |
| 432 | + }; | |
| 425 | 433 | }; |
| 426 | 434 | |
| 427 | 435 | &cpsw_emac0 { |
| 428 | 436 | status = "okay"; |
| 429 | − phy_id = <&davinci_mdio>, <4>; | |
| 437 | + phy-handle = <ðphy0>; | |
| 430 | 438 | phy-mode = "rmii"; |
| 431 | 439 | dual_emac_res_vlan = <1>; |
| 432 | 440 | }; |
| 433 | 441 | |
| 434 | 442 | &cpsw_emac1 { |
| 435 | 443 | status = "okay"; |
| 436 | − phy_id = <&davinci_mdio>, <5>; | |
| 444 | + phy-handle = <ðphy1>; | |
| 437 | 445 | phy-mode = "rmii"; |
| 438 | 446 | dual_emac_res_vlan = <2>; |
| 439 | 447 | }; |
| @@ -380,16 +380,24 @@ · 379 unmodified lines | ||
| 380 | 380 | |
| 381 | 381 | &davinci_mdio { |
| 382 | 382 | status = "okay"; |
| 383 | + | |
| 384 | + ethphy0: ethernet-phy@0 { | |
| 385 | + reg = <0>; | |
| 386 | + }; | |
| 387 | + | |
| 388 | + ethphy1: ethernet-phy@1 { | |
| 389 | + reg = <1>; | |
| 390 | + }; | |
| 383 | 391 | }; |
| 384 | 392 | |
| 385 | 393 | &cpsw_emac0 { |
| 386 | − phy_id = <&davinci_mdio>, <0>; | |
| 394 | + phy-handle = <ðphy0>; | |
| 387 | 395 | phy-mode = "mii"; |
| 388 | 396 | dual_emac_res_vlan = <1>; |
| 389 | 397 | }; |
| 390 | 398 | |
| 391 | 399 | &cpsw_emac1 { |
| 392 | − phy_id = <&davinci_mdio>, <1>; | |
| 400 | + phy-handle = <ðphy1>; | |
| 393 | 401 | phy-mode = "mii"; |
| 394 | 402 | dual_emac_res_vlan = <2>; |
| 395 | 403 | }; |
| @@ -161,7 +161,7 @@ · 160 unmodified lines | ||
| 161 | 161 | invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/ |
| 162 | 162 | }; |
| 163 | 163 | |
| 164 | − bmp280: pressure@78 { | |
| 164 | + bmp280: pressure@76 { | |
| 165 | 165 | compatible = "bosch,bmp280"; |
| 166 | 166 | reg = <0x76>; |
| 167 | 167 | }; |
| @@ -424,7 +424,7 @@ · 256 unmodified lines | ||
| 424 | 424 | }; |
| 425 | 425 | |
| 426 | 426 | &cpsw_emac0 { |
| 427 | − phy_id = <&davinci_mdio>, <4>; | |
| 427 | + phy-handle = <ðphy0>; | |
| 428 | 428 | phy-mode = "rgmii-txid"; |
| 429 | 429 | }; |
| 430 | 430 | |
| @@ -441,6 +441,10 @@ · 10 unmodified lines | ||
| 441 | 441 | pinctrl-0 = <&davinci_mdio_default>; |
| 442 | 442 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 443 | 443 | status = "okay"; |
| 444 | + | |
| 445 | + ethphy0: ethernet-phy@4 { | |
| 446 | + reg = <4>; | |
| 447 | + }; | |
| 444 | 448 | }; |
| 445 | 449 | |
| 446 | 450 | &mmc1 { |
| @@ -373,7 +373,7 @@ · 372 unmodified lines | ||
| 373 | 373 | ti,pindir-d0-out-d1-in; |
| 374 | 374 | status = "okay"; |
| 375 | 375 | |
| 376 | − cfaf240320a032t { | |
| 376 | + display-controller@0 { | |
| 377 | 377 | compatible = "orisetech,otm3225a"; |
| 378 | 378 | reg = <0>; |
| 379 | 379 | spi-max-frequency = <1000000>; |
| @@ -533,16 +533,24 @@ · 153 unmodified lines | ||
| 533 | 533 | pinctrl-names = "default"; |
| 534 | 534 | pinctrl-0 = <&davinci_mdio_default>; |
| 535 | 535 | status = "okay"; |
| 536 | + | |
| 537 | + ethphy0: ethernet-phy@0 { | |
| 538 | + reg = <0>; | |
| 539 | + }; | |
| 540 | + | |
| 541 | + ethphy1: ethernet-phy@1 { | |
| 542 | + reg = <1>; | |
| 543 | + }; | |
| 536 | 544 | }; |
| 537 | 545 | |
| 538 | 546 | &cpsw_emac0 { |
| 539 | − phy_id = <&davinci_mdio>, <0>; | |
| 547 | + phy-handle = <ðphy0>; | |
| 540 | 548 | phy-mode = "mii"; |
| 541 | 549 | dual_emac_res_vlan = <1>; |
| 542 | 550 | }; |
| 543 | 551 | |
| 544 | 552 | &cpsw_emac1 { |
| 545 | − phy_id = <&davinci_mdio>, <1>; | |
| 553 | + phy-handle = <ðphy1>; | |
| 546 | 554 | phy-mode = "mii"; |
| 547 | 555 | dual_emac_res_vlan = <2>; |
| 548 | 556 | }; |
| @@ -265,13 +265,13 @@ · 264 unmodified lines | ||
| 265 | 265 | /* Ethernet */ |
| 266 | 266 | &cpsw_emac0 { |
| 267 | 267 | status = "okay"; |
| 268 | − phy_id = <&davinci_mdio>, <0>; | |
| 268 | + phy-handle = <ðphy0>; | |
| 269 | 269 | phy-mode = "rgmii"; |
| 270 | 270 | }; |
| 271 | 271 | |
| 272 | 272 | &cpsw_emac1 { |
| 273 | 273 | status = "okay"; |
| 274 | − phy_id = <&davinci_mdio>, <1>; | |
| 274 | + phy-handle = <ðphy1>; | |
| 275 | 275 | phy-mode = "rgmii"; |
| 276 | 276 | }; |
| 277 | 277 | |
| @@ -279,6 +279,14 @@ · 1 unmodified line | ||
| 279 | 279 | status = "okay"; |
| 280 | 280 | pinctrl-names = "default"; |
| 281 | 281 | pinctrl-0 = <&mdio_pins>; |
| 282 | + | |
| 283 | + ethphy0: ethernet-phy@0 { | |
| 284 | + reg = <0>; | |
| 285 | + }; | |
| 286 | + | |
| 287 | + ethphy1: ethernet-phy@1 { | |
| 288 | + reg = <1>; | |
| 289 | + }; | |
| 282 | 290 | }; |
| 283 | 291 | |
| 284 | 292 | &mac { |
| @@ -103,10 +103,14 @@ · 102 unmodified lines | ||
| 103 | 103 | pinctrl-0 = <&davinci_mdio_default>; |
| 104 | 104 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 105 | 105 | status = "okay"; |
| 106 | + | |
| 107 | + ethphy0: ethernet-phy@0 { | |
| 108 | + reg = <0>; | |
| 109 | + }; | |
| 106 | 110 | }; |
| 107 | 111 | |
| 108 | 112 | &cpsw_emac0 { |
| 109 | − phy_id = <&davinci_mdio>, <0>; | |
| 113 | + phy-handle = <ðphy0>; | |
| 110 | 114 | phy-mode = "rgmii-txid"; |
| 111 | 115 | }; |
| 112 | 116 | |
| @@ -206,7 +206,6 @@ · 205 unmodified lines | ||
| 206 | 206 | status = "okay"; |
| 207 | 207 | slaves = <1>; |
| 208 | 208 | cpsw_emac0: slave@4a100200 { |
| 209 | − phy_id = <&davinci_mdio>, <0>; | |
| 210 | 209 | phy-mode = "mii"; |
| 211 | 210 | phy-handle = <ðernetphy0>; |
| 212 | 211 | }; |
| @@ -0,0 +1,220 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2018 Logic PD, Inc - http://www.logicpd.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | + | |
| 9 | +#include <dt-bindings/input/input.h> | |
| 10 | + | |
| 11 | +/ { | |
| 12 | + codec1 { | |
| 13 | + compatible = "simple-audio-card"; | |
| 14 | + simple-audio-card,name = "tlv320aic23-hifi"; | |
| 15 | + | |
| 16 | + simple-audio-card,widgets = | |
| 17 | + "Microphone", "Mic In", | |
| 18 | + "Line", "Line In", | |
| 19 | + "Line", "Line Out"; | |
| 20 | + | |
| 21 | + simple-audio-card,routing = | |
| 22 | + "Line Out", "LOUT", | |
| 23 | + "Line Out", "ROUT", | |
| 24 | + "LLINEIN", "Line In", | |
| 25 | + "RLINEIN", "Line In", | |
| 26 | + "MICIN", "Mic In"; | |
| 27 | + | |
| 28 | + simple-audio-card,format = "i2s"; | |
| 29 | + simple-audio-card,bitclock-master = <&sound_master>; | |
| 30 | + simple-audio-card,frame-master = <&sound_master>; | |
| 31 | + | |
| 32 | + simple-audio-card,cpu { | |
| 33 | + sound-dai = <&mcbsp1>; | |
| 34 | + }; | |
| 35 | + | |
| 36 | + sound_master: simple-audio-card,codec { | |
| 37 | + sound-dai = <&tlv320aic23_1>; | |
| 38 | + system-clock-frequency = <12000000>; | |
| 39 | + }; | |
| 40 | + }; | |
| 41 | + | |
| 42 | + codec2 { | |
| 43 | + compatible = "simple-audio-card"; | |
| 44 | + simple-audio-card,name = "tlv320aic23-hifi"; | |
| 45 | + | |
| 46 | + simple-audio-card,widgets = | |
| 47 | + "Microphone", "Mic In", | |
| 48 | + "Line", "Line In", | |
| 49 | + "Line", "Line Out"; | |
| 50 | + | |
| 51 | + simple-audio-card,routing = | |
| 52 | + "Line Out", "LOUT", | |
| 53 | + "Line Out", "ROUT", | |
| 54 | + "LLINEIN", "Line In", | |
| 55 | + "RLINEIN", "Line In", | |
| 56 | + "MICIN", "Mic In"; | |
| 57 | + | |
| 58 | + simple-audio-card,format = "i2s"; | |
| 59 | + simple-audio-card,bitclock-master = <&sound_master2>; | |
| 60 | + simple-audio-card,frame-master = <&sound_master2>; | |
| 61 | + | |
| 62 | + simple-audio-card,cpu { | |
| 63 | + sound-dai = <&mcbsp2>; | |
| 64 | + }; | |
| 65 | + | |
| 66 | + sound_master2: simple-audio-card,codec { | |
| 67 | + sound-dai = <&tlv320aic23_2>; | |
| 68 | + system-clock-frequency = <12000000>; | |
| 69 | + }; | |
| 70 | + }; | |
| 71 | + | |
| 72 | + expander-keys { | |
| 73 | + compatible = "gpio-keys-polled"; | |
| 74 | + poll-interval = <100>; | |
| 75 | + | |
| 76 | + record { | |
| 77 | + label = "Record"; | |
| 78 | + /* linux,code = <BTN_0>; */ | |
| 79 | + gpios = <&tca6416_2 15 GPIO_ACTIVE_LOW>; | |
| 80 | + }; | |
| 81 | + | |
| 82 | + play { | |
| 83 | + label = "Play"; | |
| 84 | + linux,code = <KEY_PLAY>; | |
| 85 | + gpios = <&tca6416_2 14 GPIO_ACTIVE_LOW>; | |
| 86 | + }; | |
| 87 | + | |
| 88 | + Stop { | |
| 89 | + label = "Stop"; | |
| 90 | + linux,code = <KEY_STOP>; | |
| 91 | + gpios = <&tca6416_2 13 GPIO_ACTIVE_LOW>; | |
| 92 | + }; | |
| 93 | + | |
| 94 | + fwd { | |
| 95 | + label = "FWD"; | |
| 96 | + linux,code = <KEY_FASTFORWARD>; | |
| 97 | + gpios = <&tca6416_2 12 GPIO_ACTIVE_LOW>; | |
| 98 | + }; | |
| 99 | + | |
| 100 | + rwd { | |
| 101 | + label = "RWD"; | |
| 102 | + linux,code = <KEY_REWIND>; | |
| 103 | + gpios = <&tca6416_2 11 GPIO_ACTIVE_LOW>; | |
| 104 | + }; | |
| 105 | + | |
| 106 | + shift { | |
| 107 | + label = "Shift"; | |
| 108 | + linux,code = <KEY_LEFTSHIFT>; | |
| 109 | + gpios = <&tca6416_2 10 GPIO_ACTIVE_LOW>; | |
| 110 | + }; | |
| 111 | + | |
| 112 | + Mode { | |
| 113 | + label = "Mode"; | |
| 114 | + linux,code = <BTN_MODE>; | |
| 115 | + gpios = <&tca6416_2 9 GPIO_ACTIVE_LOW>; | |
| 116 | + }; | |
| 117 | + | |
| 118 | + Menu { | |
| 119 | + label = "Menu"; | |
| 120 | + linux,code = <KEY_MENU>; | |
| 121 | + gpios = <&tca6416_2 8 GPIO_ACTIVE_LOW>; | |
| 122 | + }; | |
| 123 | + | |
| 124 | + Up { | |
| 125 | + label = "Up"; | |
| 126 | + linux,code = <KEY_UP>; | |
| 127 | + gpios = <&tca6416_2 7 GPIO_ACTIVE_LOW>; | |
| 128 | + }; | |
| 129 | + | |
| 130 | + Down { | |
| 131 | + label = "Down"; | |
| 132 | + linux,code = <KEY_DOWN>; | |
| 133 | + gpios = <&tca6416_2 6 GPIO_ACTIVE_LOW>; | |
| 134 | + }; | |
| 135 | + }; | |
| 136 | +}; | |
| 137 | + | |
| 138 | +&i2c2 { | |
| 139 | + /* Audio codecs */ | |
| 140 | + tlv320aic23_1: codec@1a { | |
| 141 | + compatible = "ti,tlv320aic23"; | |
| 142 | + reg = <0x1a>; | |
| 143 | + #sound-dai-cells= <0>; | |
| 144 | + status = "okay"; | |
| 145 | + }; | |
| 146 | + | |
| 147 | + tlv320aic23_2: codec@1b { | |
| 148 | + compatible = "ti,tlv320aic23"; | |
| 149 | + reg = <0x1b>; | |
| 150 | + #sound-dai-cells= <0>; | |
| 151 | + status = "okay"; | |
| 152 | + }; | |
| 153 | +}; | |
| 154 | + | |
| 155 | +&i2c3 { | |
| 156 | + /* Audio codecs */ | |
| 157 | + tlv320aic23_3: codec@1a { | |
| 158 | + compatible = "ti,tlv320aic23"; | |
| 159 | + reg = <0x1a>; | |
| 160 | + #sound-dai-cells= <0>; | |
| 161 | + status = "okay"; | |
| 162 | + }; | |
| 163 | + | |
| 164 | + /* GPIO Expanders */ | |
| 165 | + tca6416_2: gpio@20 { | |
| 166 | + compatible = "ti,tca6416"; | |
| 167 | + reg = <0x20>; | |
| 168 | + gpio-controller; | |
| 169 | + #gpio-cells = <2>; | |
| 170 | + vcc-supply = <&vdd_io_reg>; | |
| 171 | + }; | |
| 172 | + | |
| 173 | + tca6416_3: gpio@21 { | |
| 174 | + compatible = "ti,tca6416"; | |
| 175 | + reg = <0x21>; | |
| 176 | + gpio-controller; | |
| 177 | + #gpio-cells = <2>; | |
| 178 | + vcc-supply = <&vdd_io_reg>; | |
| 179 | + }; | |
| 180 | + | |
| 181 | + /* TVP5146 Analog Video decoder input */ | |
| 182 | + tvp5146@5c { | |
| 183 | + compatible = "ti,tvp5146m2"; | |
| 184 | + reg = <0x5c>; | |
| 185 | + }; | |
| 186 | +}; | |
| 187 | + | |
| 188 | +&mcbsp1 { | |
| 189 | + status = "ok"; | |
| 190 | + #sound-dai-cells = <0>; | |
| 191 | + pinctrl-names = "default"; | |
| 192 | + pinctrl-0 = <&mcbsp1_pins>; | |
| 193 | +}; | |
| 194 | + | |
| 195 | +&mcbsp2 { | |
| 196 | + status = "ok"; | |
| 197 | + #sound-dai-cells = <0>; | |
| 198 | + pinctrl-names = "default"; | |
| 199 | + pinctrl-0 = <&mcbsp2_pins>; | |
| 200 | +}; | |
| 201 | + | |
| 202 | +&omap3_pmx_core { | |
| 203 | + mcbsp1_pins: pinmux_mcbsp1_pins { | |
| 204 | + pinctrl-single,pins = < | |
| 205 | + OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dx */ | |
| 206 | + OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dr */ | |
| 207 | + OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp1_fsx */ | |
| 208 | + OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0) /* mcbsp1_clkx.mcbsp1_clkx */ | |
| 209 | + >; | |
| 210 | + }; | |
| 211 | + | |
| 212 | + mcbsp2_pins: pinmux_mcbsp2_pins { | |
| 213 | + pinctrl-single,pins = < | |
| 214 | + OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ | |
| 215 | + OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */ | |
| 216 | + OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */ | |
| 217 | + OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */ | |
| 218 | + >; | |
| 219 | + }; | |
| 220 | +}; | |
| @@ -9,6 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | #include "am3517.dtsi" |
| 11 | 11 | #include "am3517-som.dtsi" |
| 12 | +#include "am3517-evm-ui.dtsi" | |
| 12 | 13 | #include <dt-bindings/input/input.h> |
| 13 | 14 | |
| 14 | 15 | / { |
| @@ -1101,7 +1101,7 @@ · 1100 unmodified lines | ||
| 1101 | 1101 | }; |
| 1102 | 1102 | }; |
| 1103 | 1103 | |
| 1104 | − qspi: qspi@47900000 { | |
| 1104 | + qspi: spi@47900000 { | |
| 1105 | 1105 | compatible = "ti,am4372-qspi"; |
| 1106 | 1106 | reg = <0x47900000 0x100>, |
| 1107 | 1107 | <0x30000000 0x4000000>; |
| @@ -339,16 +339,24 @@ · 338 unmodified lines | ||
| 339 | 339 | pinctrl-names = "default"; |
| 340 | 340 | pinctrl-0 = <&davinci_mdio_default>; |
| 341 | 341 | status = "okay"; |
| 342 | + | |
| 343 | + ethphy0: ethernet-phy@0 { | |
| 344 | + reg = <0>; | |
| 345 | + }; | |
| 346 | + | |
| 347 | + ethphy1: ethernet-phy@1 { | |
| 348 | + reg = <1>; | |
| 349 | + }; | |
| 342 | 350 | }; |
| 343 | 351 | |
| 344 | 352 | &cpsw_emac0 { |
| 345 | − phy_id = <&davinci_mdio>, <0>; | |
| 353 | + phy-handle = <ðphy0>; | |
| 346 | 354 | phy-mode = "rgmii-txid"; |
| 347 | 355 | dual_emac_res_vlan = <1>; |
| 348 | 356 | }; |
| 349 | 357 | |
| 350 | 358 | &cpsw_emac1 { |
| 351 | − phy_id = <&davinci_mdio>, <1>; | |
| 359 | + phy-handle = <ðphy1>; | |
| 352 | 360 | phy-mode = "rgmii-txid"; |
| 353 | 361 | dual_emac_res_vlan = <2>; |
| 354 | 362 | }; |
| @@ -831,10 +831,14 @@ · 830 unmodified lines | ||
| 831 | 831 | pinctrl-0 = <&davinci_mdio_default>; |
| 832 | 832 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 833 | 833 | status = "okay"; |
| 834 | + | |
| 835 | + ethphy0: ethernet-phy@0 { | |
| 836 | + reg = <0>; | |
| 837 | + }; | |
| 834 | 838 | }; |
| 835 | 839 | |
| 836 | 840 | &cpsw_emac0 { |
| 837 | − phy_id = <&davinci_mdio>, <0>; | |
| 841 | + phy-handle = <ðphy0>; | |
| 838 | 842 | phy-mode = "rgmii"; |
| 839 | 843 | }; |
| 840 | 844 | |
| @@ -499,10 +499,14 @@ · 498 unmodified lines | ||
| 499 | 499 | pinctrl-0 = <&davinci_mdio_default>; |
| 500 | 500 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 501 | 501 | status = "okay"; |
| 502 | + | |
| 503 | + ethphy0: ethernet-phy@0 { | |
| 504 | + reg = <0>; | |
| 505 | + }; | |
| 502 | 506 | }; |
| 503 | 507 | |
| 504 | 508 | &cpsw_emac0 { |
| 505 | − phy_id = <&davinci_mdio>, <0>; | |
| 509 | + phy-handle = <ðphy0>; | |
| 506 | 510 | phy-mode = "rgmii"; |
| 507 | 511 | }; |
| 508 | 512 | |
| @@ -799,16 +799,24 @@ · 798 unmodified lines | ||
| 799 | 799 | pinctrl-0 = <&davinci_mdio_default>; |
| 800 | 800 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 801 | 801 | status = "okay"; |
| 802 | + | |
| 803 | + ethphy0: ethernet-phy@4 { | |
| 804 | + reg = <4>; | |
| 805 | + }; | |
| 806 | + | |
| 807 | + ethphy1: ethernet-phy@5 { | |
| 808 | + reg = <5>; | |
| 809 | + }; | |
| 802 | 810 | }; |
| 803 | 811 | |
| 804 | 812 | &cpsw_emac0 { |
| 805 | − phy_id = <&davinci_mdio>, <4>; | |
| 813 | + phy-handle = <ðphy0>; | |
| 806 | 814 | phy-mode = "rgmii"; |
| 807 | 815 | dual_emac_res_vlan = <1>; |
| 808 | 816 | }; |
| 809 | 817 | |
| 810 | 818 | &cpsw_emac1 { |
| 811 | − phy_id = <&davinci_mdio>, <5>; | |
| 819 | + phy-handle = <ðphy1>; | |
| 812 | 820 | phy-mode = "rgmii"; |
| 813 | 821 | dual_emac_res_vlan = <2>; |
| 814 | 822 | }; |
| @@ -575,10 +575,14 @@ · 574 unmodified lines | ||
| 575 | 575 | pinctrl-0 = <&davinci_mdio_default>; |
| 576 | 576 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 577 | 577 | status = "okay"; |
| 578 | + | |
| 579 | + ethphy0: ethernet-phy@16 { | |
| 580 | + reg = <16>; | |
| 581 | + }; | |
| 578 | 582 | }; |
| 579 | 583 | |
| 580 | 584 | &cpsw_emac0 { |
| 581 | − phy_id = <&davinci_mdio>, <16>; | |
| 585 | + phy-handle = <ðphy0>; | |
| 582 | 586 | phy-mode = "rmii"; |
| 583 | 587 | }; |
| 584 | 588 | |
| @@ -64,6 +64,82 @@ · 63 unmodified lines | ||
| 64 | 64 | linux,default-trigger = "mmc0"; |
| 65 | 65 | }; |
| 66 | 66 | }; |
| 67 | + | |
| 68 | + idk-leds { | |
| 69 | + status = "disabled"; | |
| 70 | + compatible = "gpio-leds"; | |
| 71 | + red0-led { | |
| 72 | + label = "idk:red0"; | |
| 73 | + gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>; | |
| 74 | + default-state = "off"; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + green0-led { | |
| 78 | + label = "idk:green0"; | |
| 79 | + gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>; | |
| 80 | + default-state = "off"; | |
| 81 | + }; | |
| 82 | + | |
| 83 | + blue0-led { | |
| 84 | + label = "idk:blue0"; | |
| 85 | + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; | |
| 86 | + default-state = "off"; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + red1-led { | |
| 90 | + label = "idk:red1"; | |
| 91 | + gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; | |
| 92 | + default-state = "off"; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + green1-led { | |
| 96 | + label = "idk:green1"; | |
| 97 | + gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; | |
| 98 | + default-state = "off"; | |
| 99 | + }; | |
| 100 | + | |
| 101 | + blue1-led { | |
| 102 | + label = "idk:blue1"; | |
| 103 | + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; | |
| 104 | + default-state = "off"; | |
| 105 | + }; | |
| 106 | + | |
| 107 | + red2-led { | |
| 108 | + label = "idk:red2"; | |
| 109 | + gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>; | |
| 110 | + default-state = "off"; | |
| 111 | + }; | |
| 112 | + | |
| 113 | + green2-led { | |
| 114 | + label = "idk:green2"; | |
| 115 | + gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; | |
| 116 | + default-state = "off"; | |
| 117 | + }; | |
| 118 | + | |
| 119 | + blue2-led { | |
| 120 | + label = "idk:blue2"; | |
| 121 | + gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>; | |
| 122 | + default-state = "off"; | |
| 123 | + }; | |
| 124 | + | |
| 125 | + red3-led { | |
| 126 | + label = "idk:red3"; | |
| 127 | + gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; | |
| 128 | + default-state = "off"; | |
| 129 | + }; | |
| 130 | + | |
| 131 | + green3-led { | |
| 132 | + label = "idk:green3"; | |
| 133 | + gpios = <&gpio7 25 GPIO_ACTIVE_HIGH>; | |
| 134 | + default-state = "off"; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + blue3-led { | |
| 138 | + label = "idk:blue3"; | |
| 139 | + gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>; | |
| 140 | + default-state = "off"; | |
| 141 | + }; | |
| 142 | + }; | |
| 67 | 143 | }; |
| 68 | 144 | |
| 69 | 145 | &extcon_usb2 { |
| @@ -71,6 +147,10 @@ · 1 unmodified line | ||
| 71 | 147 | vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>; |
| 72 | 148 | }; |
| 73 | 149 | |
| 150 | +&sn65hvs882 { | |
| 151 | + load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; | |
| 152 | +}; | |
| 153 | + | |
| 74 | 154 | &mailbox5 { |
| 75 | 155 | status = "okay"; |
| 76 | 156 | mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { |
| @@ -114,7 +194,3 @@ · 37 unmodified lines | ||
| 114 | 194 | pinctrl-1 = <&mmc2_pins_hs>; |
| 115 | 195 | pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; |
| 116 | 196 | }; |
| 117 | − | |
| 118 | −&cpu0 { | |
| 119 | − vdd-supply = <&smps12_reg>; | |
| 120 | −}; | |
| @@ -55,6 +55,82 @@ · 54 unmodified lines | ||
| 55 | 55 | linux,default-trigger = "mmc0"; |
| 56 | 56 | }; |
| 57 | 57 | }; |
| 58 | + | |
| 59 | + idk-leds { | |
| 60 | + status = "disabled"; | |
| 61 | + compatible = "gpio-leds"; | |
| 62 | + red0-led { | |
| 63 | + label = "idk:red0"; | |
| 64 | + gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>; | |
| 65 | + default-state = "off"; | |
| 66 | + }; | |
| 67 | + | |
| 68 | + green0-led { | |
| 69 | + label = "idk:green0"; | |
| 70 | + gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>; | |
| 71 | + default-state = "off"; | |
| 72 | + }; | |
| 73 | + | |
| 74 | + blue0-led { | |
| 75 | + label = "idk:blue0"; | |
| 76 | + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; | |
| 77 | + default-state = "off"; | |
| 78 | + }; | |
| 79 | + | |
| 80 | + red1-led { | |
| 81 | + label = "idk:red1"; | |
| 82 | + gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; | |
| 83 | + default-state = "off"; | |
| 84 | + }; | |
| 85 | + | |
| 86 | + green1-led { | |
| 87 | + label = "idk:green1"; | |
| 88 | + gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; | |
| 89 | + default-state = "off"; | |
| 90 | + }; | |
| 91 | + | |
| 92 | + blue1-led { | |
| 93 | + label = "idk:blue1"; | |
| 94 | + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; | |
| 95 | + default-state = "off"; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + red2-led { | |
| 99 | + label = "idk:red2"; | |
| 100 | + gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>; | |
| 101 | + default-state = "off"; | |
| 102 | + }; | |
| 103 | + | |
| 104 | + green2-led { | |
| 105 | + label = "idk:green2"; | |
| 106 | + gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; | |
| 107 | + default-state = "off"; | |
| 108 | + }; | |
| 109 | + | |
| 110 | + blue2-led { | |
| 111 | + label = "idk:blue2"; | |
| 112 | + gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>; | |
| 113 | + default-state = "off"; | |
| 114 | + }; | |
| 115 | + | |
| 116 | + red3-led { | |
| 117 | + label = "idk:red3"; | |
| 118 | + gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; | |
| 119 | + default-state = "off"; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + green3-led { | |
| 123 | + label = "idk:green3"; | |
| 124 | + gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; | |
| 125 | + default-state = "off"; | |
| 126 | + }; | |
| 127 | + | |
| 128 | + blue3-led { | |
| 129 | + label = "idk:blue3"; | |
| 130 | + gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; | |
| 131 | + default-state = "off"; | |
| 132 | + }; | |
| 133 | + }; | |
| 58 | 134 | }; |
| 59 | 135 | |
| 60 | 136 | &extcon_usb2 { |
| @@ -36,7 +36,3 @@ · 35 unmodified lines | ||
| 36 | 36 | pinctrl-1 = <&mmc2_pins_hs>; |
| 37 | 37 | pinctrl-2 = <&mmc2_pins_ddr_rev20>; |
| 38 | 38 | }; |
| 39 | − | |
| 40 | −&cpu0 { | |
| 41 | − vdd-supply = <&smps12_reg>; | |
| 42 | −}; | |
| @@ -518,7 +518,7 @@ · 517 unmodified lines | ||
| 518 | 518 | }; |
| 519 | 519 | |
| 520 | 520 | /* touch controller */ |
| 521 | − ads7846@0 { | |
| 521 | + touchscreen@1 { | |
| 522 | 522 | pinctrl-names = "default"; |
| 523 | 523 | pinctrl-0 = <&ads7846_pins>; |
| 524 | 524 | |
| @@ -558,13 +558,13 @@ · 33 unmodified lines | ||
| 558 | 558 | }; |
| 559 | 559 | |
| 560 | 560 | &cpsw_emac0 { |
| 561 | − phy_id = <&davinci_mdio>, <0>; | |
| 561 | + phy-handle = <ðphy0>; | |
| 562 | 562 | phy-mode = "rgmii-txid"; |
| 563 | 563 | dual_emac_res_vlan = <0>; |
| 564 | 564 | }; |
| 565 | 565 | |
| 566 | 566 | &cpsw_emac1 { |
| 567 | − phy_id = <&davinci_mdio>, <1>; | |
| 567 | + phy-handle = <ðphy1>; | |
| 568 | 568 | phy-mode = "rgmii-txid"; |
| 569 | 569 | dual_emac_res_vlan = <1>; |
| 570 | 570 | }; |
| @@ -573,6 +573,14 @@ · 2 unmodified lines | ||
| 573 | 573 | pinctrl-names = "default", "sleep"; |
| 574 | 574 | pinctrl-0 = <&davinci_mdio_pins_default>; |
| 575 | 575 | pinctrl-1 = <&davinci_mdio_pins_sleep>; |
| 576 | + | |
| 577 | + ethphy0: ethernet-phy@0 { | |
| 578 | + reg = <0>; | |
| 579 | + }; | |
| 580 | + | |
| 581 | + ethphy1: ethernet-phy@1 { | |
| 582 | + reg = <1>; | |
| 583 | + }; | |
| 576 | 584 | }; |
| 577 | 585 | |
| 578 | 586 | &usb2_phy1 { |
| @@ -372,17 +372,27 @@ · 371 unmodified lines | ||
| 372 | 372 | }; |
| 373 | 373 | |
| 374 | 374 | &cpsw_emac0 { |
| 375 | − phy_id = <&davinci_mdio>, <0>; | |
| 375 | + phy-handle = <ðphy0>; | |
| 376 | 376 | phy-mode = "rgmii"; |
| 377 | 377 | dual_emac_res_vlan = <1>; |
| 378 | 378 | }; |
| 379 | 379 | |
| 380 | 380 | &cpsw_emac1 { |
| 381 | − phy_id = <&davinci_mdio>, <1>; | |
| 381 | + phy-handle = <ðphy1>; | |
| 382 | 382 | phy-mode = "rgmii"; |
| 383 | 383 | dual_emac_res_vlan = <2>; |
| 384 | 384 | }; |
| 385 | 385 | |
| 386 | +&davinci_mdio { | |
| 387 | + ethphy0: ethernet-phy@0 { | |
| 388 | + reg = <0>; | |
| 389 | + }; | |
| 390 | + | |
| 391 | + ethphy1: ethernet-phy@1 { | |
| 392 | + reg = <1>; | |
| 393 | + }; | |
| 394 | +}; | |
| 395 | + | |
| 386 | 396 | &usb2_phy1 { |
| 387 | 397 | phy-supply = <&ldousb_reg>; |
| 388 | 398 | }; |
| @@ -478,3 +488,7 @@ · 89 unmodified lines | ||
| 478 | 488 | }; |
| 479 | 489 | }; |
| 480 | 490 | }; |
| 491 | + | |
| 492 | +&cpu0 { | |
| 493 | + vdd-supply = <&smps12_reg>; | |
| 494 | +}; | |
| @@ -371,7 +371,7 @@ · 370 unmodified lines | ||
| 371 | 371 | clock-names = "uartclk", "apb_pclk"; |
| 372 | 372 | }; |
| 373 | 373 | |
| 374 | − ssp: ssp@1000d000 { | |
| 374 | + ssp: spi@1000d000 { | |
| 375 | 375 | compatible = "arm,pl022", "arm,primecell"; |
| 376 | 376 | reg = <0x1000d000 0x1000>; |
| 377 | 377 | clocks = <&sspclk>, <&pclk>; |
| @@ -380,7 +380,7 @@ · 379 unmodified lines | ||
| 380 | 380 | clock-names = "apb_pclk"; |
| 381 | 381 | }; |
| 382 | 382 | |
| 383 | − pb1176_ssp: ssp@1010b000 { | |
| 383 | + pb1176_ssp: spi@1010b000 { | |
| 384 | 384 | compatible = "arm,pl022", "arm,primecell"; |
| 385 | 385 | reg = <0x1010b000 0x1000>; |
| 386 | 386 | interrupt-parent = <&intc_dc1176>; |
| @@ -523,7 +523,7 @@ · 522 unmodified lines | ||
| 523 | 523 | clock-names = "uartclk", "apb_pclk"; |
| 524 | 524 | }; |
| 525 | 525 | |
| 526 | − ssp@1000d000 { | |
| 526 | + spi@1000d000 { | |
| 527 | 527 | compatible = "arm,pl022", "arm,primecell"; |
| 528 | 528 | reg = <0x1000d000 0x1000>; |
| 529 | 529 | interrupt-parent = <&intc_pb11mp>; |
| @@ -362,7 +362,7 @@ · 361 unmodified lines | ||
| 362 | 362 | clock-names = "uartclk", "apb_pclk"; |
| 363 | 363 | }; |
| 364 | 364 | |
| 365 | − ssp: ssp@1000d000 { | |
| 365 | + ssp: spi@1000d000 { | |
| 366 | 366 | compatible = "arm,pl022", "arm,primecell"; |
| 367 | 367 | reg = <0x1000d000 0x1000>; |
| 368 | 368 | clocks = <&sspclk>, <&pclk>; |
| @@ -0,0 +1,155 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0 OR MIT) | |
| 2 | +/* | |
| 3 | + * Device Tree file for Marvell Armada 385 AMC board | |
| 4 | + * (DB-88F6820-AMC) | |
| 5 | + * | |
| 6 | + * Copyright (C) 2017 Allied Telesis Labs | |
| 7 | + */ | |
| 8 | + | |
| 9 | +/dts-v1/; | |
| 10 | +#include "armada-385.dtsi" | |
| 11 | + | |
| 12 | +#include <dt-bindings/gpio/gpio.h> | |
| 13 | + | |
| 14 | +/ { | |
| 15 | + model = "Marvell Armada 385 AMC"; | |
| 16 | + compatible = "marvell,a385-db-amc", "marvell,armada385", "marvell,armada380"; | |
| 17 | + | |
| 18 | + chosen { | |
| 19 | + stdout-path = "serial0:115200n8"; | |
| 20 | + }; | |
| 21 | + | |
| 22 | + aliases { | |
| 23 | + ethernet0 = ð0; | |
| 24 | + ethernet1 = ð1; | |
| 25 | + spi1 = &spi1; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + memory { | |
| 29 | + device_type = "memory"; | |
| 30 | + reg = <0x00000000 0x80000000>; /* 2GB */ | |
| 31 | + }; | |
| 32 | + | |
| 33 | + soc { | |
| 34 | + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 | |
| 35 | + MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; | |
| 36 | + }; | |
| 37 | +}; | |
| 38 | + | |
| 39 | +&i2c0 { | |
| 40 | + pinctrl-names = "default"; | |
| 41 | + pinctrl-0 = <&i2c0_pins>; | |
| 42 | + status = "okay"; | |
| 43 | +}; | |
| 44 | + | |
| 45 | +&uart0 { | |
| 46 | + /* | |
| 47 | + * Exported on the micro USB connector CON3 | |
| 48 | + * through an FTDI | |
| 49 | + */ | |
| 50 | + | |
| 51 | + pinctrl-names = "default"; | |
| 52 | + pinctrl-0 = <&uart0_pins>; | |
| 53 | + status = "okay"; | |
| 54 | +}; | |
| 55 | + | |
| 56 | + | |
| 57 | +ð0 { | |
| 58 | + pinctrl-names = "default"; | |
| 59 | + /* | |
| 60 | + * The Reference Clock 0 is used to provide a | |
| 61 | + * clock to the PHY | |
| 62 | + */ | |
| 63 | + pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; | |
| 64 | + status = "okay"; | |
| 65 | + phy = <&phy0>; | |
| 66 | + phy-mode = "rgmii-id"; | |
| 67 | +}; | |
| 68 | + | |
| 69 | +ð2 { | |
| 70 | + status = "okay"; | |
| 71 | + phy = <&phy1>; | |
| 72 | + phy-mode = "sgmii"; | |
| 73 | +}; | |
| 74 | + | |
| 75 | +&usb0 { | |
| 76 | + status = "okay"; | |
| 77 | +}; | |
| 78 | + | |
| 79 | + | |
| 80 | + | |
| 81 | +&mdio { | |
| 82 | + pinctrl-names = "default"; | |
| 83 | + pinctrl-0 = <&mdio_pins>; | |
| 84 | + | |
| 85 | + phy0: ethernet-phy@1 { | |
| 86 | + reg = <1>; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + phy1: ethernet-phy@0 { | |
| 90 | + reg = <0>; | |
| 91 | + }; | |
| 92 | +}; | |
| 93 | + | |
| 94 | +&nand_controller { | |
| 95 | + status = "okay"; | |
| 96 | + | |
| 97 | + nand@0 { | |
| 98 | + reg = <0>; | |
| 99 | + label = "pxa3xx_nand-0"; | |
| 100 | + nand-rb = <0>; | |
| 101 | + nand-on-flash-bbt; | |
| 102 | + | |
| 103 | + partitions { | |
| 104 | + compatible = "fixed-partitions"; | |
| 105 | + #address-cells = <1>; | |
| 106 | + #size-cells = <1>; | |
| 107 | + partition@0 { | |
| 108 | + reg = <0x00000000 0x40000000>; | |
| 109 | + label = "user"; | |
| 110 | + }; | |
| 111 | + }; | |
| 112 | + }; | |
| 113 | +}; | |
| 114 | + | |
| 115 | +&pciec { | |
| 116 | + status = "okay"; | |
| 117 | +}; | |
| 118 | + | |
| 119 | +&pcie1 { | |
| 120 | + /* Port 0, Lane 0 */ | |
| 121 | + status = "okay"; | |
| 122 | +}; | |
| 123 | + | |
| 124 | +&spi1 { | |
| 125 | + pinctrl-names = "default"; | |
| 126 | + pinctrl-0 = <&spi1_pins>; | |
| 127 | + status = "okay"; | |
| 128 | + | |
| 129 | + spi-flash@0 { | |
| 130 | + #address-cells = <1>; | |
| 131 | + #size-cells = <1>; | |
| 132 | + compatible = "jedec,spi-nor"; | |
| 133 | + reg = <0>; /* Chip select 0 */ | |
| 134 | + spi-max-frequency = <50000000>; | |
| 135 | + m25p,fast-read; | |
| 136 | + | |
| 137 | + partitions { | |
| 138 | + compatible = "fixed-partitions"; | |
| 139 | + #address-cells = <1>; | |
| 140 | + #size-cells = <1>; | |
| 141 | + partition@0 { | |
| 142 | + reg = <0x00000000 0x00100000>; | |
| 143 | + label = "u-boot"; | |
| 144 | + }; | |
| 145 | + partition@100000 { | |
| 146 | + reg = <0x00100000 0x00040000>; | |
| 147 | + label = "u-boot-env"; | |
| 148 | + }; | |
| 149 | + }; | |
| 150 | + }; | |
| 151 | +}; | |
| 152 | + | |
| 153 | +&refclk { | |
| 154 | + clock-frequency = <20000000>; | |
| 155 | +}; | |
| @@ -48,7 +48,7 @@ · 47 unmodified lines | ||
| 48 | 48 | &clearfog_sdhci_cd_pins>; |
| 49 | 49 | pinctrl-names = "default"; |
| 50 | 50 | status = "okay"; |
| 51 | − vmmc = <®_3p3v>; | |
| 51 | + vmmc-supply = <®_3p3v>; | |
| 52 | 52 | wp-inverted; |
| 53 | 53 | }; |
| 54 | 54 | |
| @@ -189,7 +189,7 @@ · 188 unmodified lines | ||
| 189 | 189 | }; |
| 190 | 190 | }; |
| 191 | 191 | |
| 192 | − nand: nand@d0000 { | |
| 192 | + nand_controller: nand-controller@d0000 { | |
| 193 | 193 | clocks = <&dfx_coredivclk 0>; |
| 194 | 194 | }; |
| 195 | 195 | |
| @@ -243,7 +243,7 @@ · 47 unmodified lines | ||
| 243 | 243 | ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>; |
| 244 | 244 | |
| 245 | 245 | pp0: packet-processor@0 { |
| 246 | − compatible = "marvell,prestera-98dx3236"; | |
| 246 | + compatible = "marvell,prestera-98dx3236", "marvell,prestera"; | |
| 247 | 247 | reg = <0 0x4000000>; |
| 248 | 248 | interrupts = <33>, <34>, <35>; |
| 249 | 249 | dfx = <&dfx>; |
| @@ -35,5 +35,5 @@ · 34 unmodified lines | ||
| 35 | 35 | }; |
| 36 | 36 | |
| 37 | 37 | &pp0 { |
| 38 | − compatible = "marvell,prestera-98dx3336"; | |
| 38 | + compatible = "marvell,prestera-98dx3336", "marvell,prestera"; | |
| 39 | 39 | }; |
| @@ -49,6 +49,6 @@ · 48 unmodified lines | ||
| 49 | 49 | }; |
| 50 | 50 | |
| 51 | 51 | &pp0 { |
| 52 | − compatible = "marvell,prestera-98dx4251"; | |
| 52 | + compatible = "marvell,prestera-98dx4251", "marvell,prestera"; | |
| 53 | 53 | interrupts = <33>, <34>, <35>, <36>; |
| 54 | 54 | }; |
| @@ -68,14 +68,18 @@ · 67 unmodified lines | ||
| 68 | 68 | status = "okay"; |
| 69 | 69 | }; |
| 70 | 70 | |
| 71 | −&nand { | |
| 71 | +&nand_controller { | |
| 72 | 72 | status = "okay"; |
| 73 | − label = "pxa3xx_nand-0"; | |
| 74 | − num-cs = <1>; | |
| 75 | − marvell,nand-keep-config; | |
| 76 | − nand-on-flash-bbt; | |
| 77 | − nand-ecc-strength = <4>; | |
| 78 | − nand-ecc-step-size = <512>; | |
| 73 | + | |
| 74 | + nand@0 { | |
| 75 | + reg = <0>; | |
| 76 | + label = "pxa3xx_nand-0"; | |
| 77 | + nand-rb = <0>; | |
| 78 | + marvell,nand-keep-config; | |
| 79 | + nand-on-flash-bbt; | |
| 80 | + nand-ecc-strength = <4>; | |
| 81 | + nand-ecc-step-size = <512>; | |
| 82 | + }; | |
| 79 | 83 | }; |
| 80 | 84 | |
| 81 | 85 | &sdio { |
| @@ -67,14 +67,18 @@ · 66 unmodified lines | ||
| 67 | 67 | status = "okay"; |
| 68 | 68 | }; |
| 69 | 69 | |
| 70 | −&nand { | |
| 70 | +&nand_controller { | |
| 71 | 71 | status = "okay"; |
| 72 | − label = "pxa3xx_nand-0"; | |
| 73 | − num-cs = <1>; | |
| 74 | − marvell,nand-keep-config; | |
| 75 | − nand-on-flash-bbt; | |
| 76 | − nand-ecc-strength = <4>; | |
| 77 | − nand-ecc-step-size = <512>; | |
| 72 | + | |
| 73 | + nand@0 { | |
| 74 | + reg = <0>; | |
| 75 | + label = "pxa3xx_nand-0"; | |
| 76 | + nand-rb = <0>; | |
| 77 | + marvell,nand-keep-config; | |
| 78 | + nand-on-flash-bbt; | |
| 79 | + nand-ecc-strength = <4>; | |
| 80 | + nand-ecc-step-size = <512>; | |
| 81 | + }; | |
| 78 | 82 | }; |
| 79 | 83 | |
| 80 | 84 | &spi0 { |
| @@ -0,0 +1,207 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0+ | |
| 2 | +/dts-v1/; | |
| 3 | + | |
| 4 | +#include "aspeed-g5.dtsi" | |
| 5 | +#include <dt-bindings/gpio/aspeed-gpio.h> | |
| 6 | + | |
| 7 | +/ { | |
| 8 | + model = "HXT StarDragon 4800 REP2 AST2520"; | |
| 9 | + compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500"; | |
| 10 | + | |
| 11 | + chosen { | |
| 12 | + stdout-path = &uart5; | |
| 13 | + bootargs = "console=ttyS4,115200 earlyprintk"; | |
| 14 | + }; | |
| 15 | + | |
| 16 | + memory@80000000 { | |
| 17 | + reg = <0x80000000 0x40000000>; | |
| 18 | + }; | |
| 19 | + | |
| 20 | + iio-hwmon { | |
| 21 | + compatible = "iio-hwmon"; | |
| 22 | + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, | |
| 23 | + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>; | |
| 24 | + }; | |
| 25 | + | |
| 26 | + iio-hwmon-battery { | |
| 27 | + compatible = "iio-hwmon"; | |
| 28 | + io-channels = <&adc 7>; | |
| 29 | + }; | |
| 30 | + | |
| 31 | + leds { | |
| 32 | + compatible = "gpio-leds"; | |
| 33 | + | |
| 34 | + system_fault1 { | |
| 35 | + label = "System_fault1"; | |
| 36 | + gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>; | |
| 37 | + }; | |
| 38 | + | |
| 39 | + system_fault2 { | |
| 40 | + label = "System_fault2"; | |
| 41 | + gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_LOW>; | |
| 42 | + }; | |
| 43 | + }; | |
| 44 | +}; | |
| 45 | + | |
| 46 | +&fmc { | |
| 47 | + status = "okay"; | |
| 48 | + flash@0 { | |
| 49 | + status = "okay"; | |
| 50 | + m25p,fast-read; | |
| 51 | + label = "bmc"; | |
| 52 | +#include "openbmc-flash-layout.dtsi" | |
| 53 | + }; | |
| 54 | +}; | |
| 55 | + | |
| 56 | +&spi1 { | |
| 57 | + status = "okay"; | |
| 58 | + pinctrl-names = "default"; | |
| 59 | + pinctrl-0 = <&pinctrl_spi1_default>; | |
| 60 | + flash@0 { | |
| 61 | + status = "okay"; | |
| 62 | + }; | |
| 63 | +}; | |
| 64 | + | |
| 65 | +&spi2 { | |
| 66 | + pinctrl-names = "default"; | |
| 67 | + pinctrl-0 = <&pinctrl_spi2ck_default | |
| 68 | + &pinctrl_spi2miso_default | |
| 69 | + &pinctrl_spi2mosi_default | |
| 70 | + &pinctrl_spi2cs0_default>; | |
| 71 | +}; | |
| 72 | + | |
| 73 | +&uart3 { | |
| 74 | + status = "okay"; | |
| 75 | + | |
| 76 | + pinctrl-names = "default"; | |
| 77 | + pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; | |
| 78 | + current-speed = <115200>; | |
| 79 | +}; | |
| 80 | + | |
| 81 | +&uart5 { | |
| 82 | + status = "okay"; | |
| 83 | +}; | |
| 84 | + | |
| 85 | +&mac0 { | |
| 86 | + status = "okay"; | |
| 87 | + pinctrl-names = "default"; | |
| 88 | + pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; | |
| 89 | +}; | |
| 90 | + | |
| 91 | +&mac1 { | |
| 92 | + status = "okay"; | |
| 93 | + pinctrl-names = "default"; | |
| 94 | + pinctrl-0 = <&pinctrl_rmii2_default>; | |
| 95 | + use-ncsi; | |
| 96 | +}; | |
| 97 | + | |
| 98 | +&i2c0 { | |
| 99 | + status = "okay"; | |
| 100 | +}; | |
| 101 | + | |
| 102 | +&i2c1 { | |
| 103 | + status = "okay"; | |
| 104 | + | |
| 105 | + tmp421@1e { | |
| 106 | + compatible = "ti,tmp421"; | |
| 107 | + reg = <0x1e>; | |
| 108 | + }; | |
| 109 | + tmp421@2a { | |
| 110 | + compatible = "ti,tmp421"; | |
| 111 | + reg = <0x2a>; | |
| 112 | + }; | |
| 113 | + tmp421@1c { | |
| 114 | + compatible = "ti,tmp421"; | |
| 115 | + reg = <0x1c>; | |
| 116 | + }; | |
| 117 | +}; | |
| 118 | + | |
| 119 | +&i2c2 { | |
| 120 | + status = "okay"; | |
| 121 | +}; | |
| 122 | + | |
| 123 | +&i2c3 { | |
| 124 | + status = "okay"; | |
| 125 | +}; | |
| 126 | + | |
| 127 | +&i2c4 { | |
| 128 | + status = "okay"; | |
| 129 | +}; | |
| 130 | + | |
| 131 | +&i2c5 { | |
| 132 | + status = "okay"; | |
| 133 | +}; | |
| 134 | + | |
| 135 | +&i2c6 { | |
| 136 | + status = "okay"; | |
| 137 | + | |
| 138 | + tmp421@1f { | |
| 139 | + compatible = "ti,tmp421"; | |
| 140 | + reg = <0x1f>; | |
| 141 | + }; | |
| 142 | + nvt210@4c { | |
| 143 | + compatible = "nvt210"; | |
| 144 | + reg = <0x4c>; | |
| 145 | + }; | |
| 146 | + eeprom@50 { | |
| 147 | + compatible = "atmel,24c128"; | |
| 148 | + reg = <0x50>; | |
| 149 | + pagesize = <128>; | |
| 150 | + }; | |
| 151 | +}; | |
| 152 | + | |
| 153 | +&i2c7 { | |
| 154 | + status = "okay"; | |
| 155 | +}; | |
| 156 | + | |
| 157 | +&i2c8 { | |
| 158 | + status = "okay"; | |
| 159 | + | |
| 160 | + pca9641@70 { | |
| 161 | + compatible = "nxp,pca9641"; | |
| 162 | + reg = <0x70>; | |
| 163 | + i2c-arb { | |
| 164 | + #address-cells = <1>; | |
| 165 | + #size-cells = <0>; | |
| 166 | + eeprom@50 { | |
| 167 | + compatible = "atmel,24c02"; | |
| 168 | + reg = <0x50>; | |
| 169 | + }; | |
| 170 | + dps650ab@58 { | |
| 171 | + compatible = "dps650ab"; | |
| 172 | + reg = <0x58>; | |
| 173 | + }; | |
| 174 | + }; | |
| 175 | + }; | |
| 176 | +}; | |
| 177 | + | |
| 178 | +&i2c9 { | |
| 179 | + status = "okay"; | |
| 180 | +}; | |
| 181 | + | |
| 182 | +&vuart { | |
| 183 | + status = "okay"; | |
| 184 | +}; | |
| 185 | + | |
| 186 | +&gfx { | |
| 187 | + status = "okay"; | |
| 188 | +}; | |
| 189 | + | |
| 190 | +&pinctrl { | |
| 191 | + aspeed,external-nodes = <&gfx &lhc>; | |
| 192 | +}; | |
| 193 | + | |
| 194 | +&gpio { | |
| 195 | + pin_gpio_c7 { | |
| 196 | + gpio-hog; | |
| 197 | + gpios = <ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>; | |
| 198 | + output-low; | |
| 199 | + line-name = "BIOS_SPI_MUX_S"; | |
| 200 | + }; | |
| 201 | + pin_gpio_d1 { | |
| 202 | + gpio-hog; | |
| 203 | + gpios = <ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>; | |
| 204 | + output-high; | |
| 205 | + line-name = "PHY2_RESET_N"; | |
| 206 | + }; | |
| 207 | +}; | |
| @@ -0,0 +1,146 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0+ | |
| 2 | +// Copyright (c) 2018 Facebook Inc. | |
| 3 | +// Author: Vijay Khemka <vijaykhemka@fb.com> | |
| 4 | +/dts-v1/; | |
| 5 | + | |
| 6 | +#include "aspeed-g5.dtsi" | |
| 7 | +#include <dt-bindings/gpio/aspeed-gpio.h> | |
| 8 | + | |
| 9 | +/ { | |
| 10 | + model = "Facebook TiogaPass BMC"; | |
| 11 | + compatible = "facebook,tiogapass-bmc", "aspeed,ast2500"; | |
| 12 | + aliases { | |
| 13 | + serial0 = &uart1; | |
| 14 | + serial4 = &uart5; | |
| 15 | + }; | |
| 16 | + chosen { | |
| 17 | + stdout-path = &uart5; | |
| 18 | + bootargs = "console=ttyS4,115200 earlyprintk"; | |
| 19 | + }; | |
| 20 | + | |
| 21 | + memory@80000000 { | |
| 22 | + reg = <0x80000000 0x20000000>; | |
| 23 | + }; | |
| 24 | +}; | |
| 25 | + | |
| 26 | +&fmc { | |
| 27 | + status = "okay"; | |
| 28 | + flash@0 { | |
| 29 | + status = "okay"; | |
| 30 | + m25p,fast-read; | |
| 31 | +#include "openbmc-flash-layout.dtsi" | |
| 32 | + }; | |
| 33 | +}; | |
| 34 | + | |
| 35 | +&spi1 { | |
| 36 | + status = "okay"; | |
| 37 | + pinctrl-names = "default"; | |
| 38 | + pinctrl-0 = <&pinctrl_spi1_default>; | |
| 39 | + flash@0 { | |
| 40 | + status = "okay"; | |
| 41 | + m25p,fast-read; | |
| 42 | + label = "pnor"; | |
| 43 | + }; | |
| 44 | +}; | |
| 45 | + | |
| 46 | +&uart1 { | |
| 47 | + // Host Console | |
| 48 | + status = "okay"; | |
| 49 | + pinctrl-names = "default"; | |
| 50 | + pinctrl-0 = <&pinctrl_txd1_default | |
| 51 | + &pinctrl_rxd1_default>; | |
| 52 | +}; | |
| 53 | + | |
| 54 | +&uart5 { | |
| 55 | + // BMC Console | |
| 56 | + status = "okay"; | |
| 57 | +}; | |
| 58 | + | |
| 59 | +&mac0 { | |
| 60 | + status = "okay"; | |
| 61 | + | |
| 62 | + pinctrl-names = "default"; | |
| 63 | + pinctrl-0 = <&pinctrl_rmii1_default>; | |
| 64 | + use-ncsi; | |
| 65 | +}; | |
| 66 | + | |
| 67 | +&i2c0 { | |
| 68 | + status = "okay"; | |
| 69 | + //Airmax Conn B, CPU0 PIROM, CPU1 PIROM | |
| 70 | +}; | |
| 71 | + | |
| 72 | +&i2c1 { | |
| 73 | + status = "okay"; | |
| 74 | + //X24 Riser | |
| 75 | +}; | |
| 76 | + | |
| 77 | +&i2c2 { | |
| 78 | + status = "okay"; | |
| 79 | + // Mezz Management SMBus | |
| 80 | +}; | |
| 81 | + | |
| 82 | +&i2c3 { | |
| 83 | + status = "okay"; | |
| 84 | + // SMBus to Board ID EEPROM | |
| 85 | +}; | |
| 86 | + | |
| 87 | +&i2c4 { | |
| 88 | + status = "okay"; | |
| 89 | + // BMC Debug Header | |
| 90 | +}; | |
| 91 | + | |
| 92 | +&i2c5 { | |
| 93 | + status = "okay"; | |
| 94 | + // CPU Voltage regulators | |
| 95 | +}; | |
| 96 | + | |
| 97 | +&i2c6 { | |
| 98 | + status = "okay"; | |
| 99 | + tpm@20 { | |
| 100 | + compatible = "infineon,slb9645tt"; | |
| 101 | + reg = <0x20>; | |
| 102 | + }; | |
| 103 | + tmp421@4e { | |
| 104 | + compatible = "ti,tmp421"; | |
| 105 | + reg = <0x4e>; | |
| 106 | + }; | |
| 107 | + tmp421@4f { | |
| 108 | + compatible = "ti,tmp421"; | |
| 109 | + reg = <0x4f>; | |
| 110 | + }; | |
| 111 | + eeprom@54 { | |
| 112 | + compatible = "atmel,24c64"; | |
| 113 | + reg = <0x54>; | |
| 114 | + pagesize = <32>; | |
| 115 | + }; | |
| 116 | +}; | |
| 117 | + | |
| 118 | +&i2c7 { | |
| 119 | + status = "okay"; | |
| 120 | + //HSC, AirMax Conn A | |
| 121 | +}; | |
| 122 | + | |
| 123 | +&i2c8 { | |
| 124 | + status = "okay"; | |
| 125 | + //Mezz Sensor SMBus | |
| 126 | +}; | |
| 127 | + | |
| 128 | +&i2c9 { | |
| 129 | + status = "okay"; | |
| 130 | + //USB Debug Connector | |
| 131 | +}; | |
| 132 | + | |
| 133 | +&pwm_tacho { | |
| 134 | + status = "okay"; | |
| 135 | + pinctrl-names = "default"; | |
| 136 | + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>; | |
| 137 | + fan@0 { | |
| 138 | + reg = <0x00>; | |
| 139 | + aspeed,fan-tach-ch = /bits/ 8 <0x00>; | |
| 140 | + }; | |
| 141 | + | |
| 142 | + fan@1 { | |
| 143 | + reg = <0x00>; | |
| 144 | + aspeed,fan-tach-ch = /bits/ 8 <0x01>; | |
| 145 | + }; | |
| 146 | +}; | |
| @@ -7,6 +7,25 @@ · 6 unmodified lines | ||
| 7 | 7 | model = "Quanta Q71L BMC"; |
| 8 | 8 | compatible = "quanta,q71l-bmc", "aspeed,ast2400"; |
| 9 | 9 | |
| 10 | + aliases { | |
| 11 | + i2c14 = &i2c_pcie2; | |
| 12 | + i2c15 = &i2c_pcie3; | |
| 13 | + i2c16 = &i2c_pcie6; | |
| 14 | + i2c17 = &i2c_pcie7; | |
| 15 | + i2c18 = &i2c_pcie1; | |
| 16 | + i2c19 = &i2c_pcie4; | |
| 17 | + i2c20 = &i2c_pcie5; | |
| 18 | + i2c21 = &i2c_pcie8; | |
| 19 | + i2c22 = &i2c_pcie9; | |
| 20 | + i2c23 = &i2c_pcie10; | |
| 21 | + i2c24 = &i2c_ssd1; | |
| 22 | + i2c25 = &i2c_ssd2; | |
| 23 | + i2c26 = &i2c_psu4; | |
| 24 | + i2c27 = &i2c_psu1; | |
| 25 | + i2c28 = &i2c_psu3; | |
| 26 | + i2c29 = &i2c_psu2; | |
| 27 | + }; | |
| 28 | + | |
| 10 | 29 | chosen { |
| 11 | 30 | stdout-path = &uart5; |
| 12 | 31 | bootargs = "console=ttyS4,115200 earlyprintk"; |
| @@ -93,6 +112,10 @@ · 80 unmodified lines | ||
| 93 | 112 | &pinctrl_ddcclk_default &pinctrl_ddcdat_default>; |
| 94 | 113 | }; |
| 95 | 114 | |
| 115 | +&ibt { | |
| 116 | + status = "okay"; | |
| 117 | +}; | |
| 118 | + | |
| 96 | 119 | &lpc_snoop { |
| 97 | 120 | status = "okay"; |
| 98 | 121 | snoop-ports = <0x80>; |
| @@ -299,24 +322,44 @@ · 200 unmodified lines | ||
| 299 | 322 | #address-cells = <1>; |
| 300 | 323 | #size-cells = <0>; |
| 301 | 324 | reg = <0>; |
| 325 | + | |
| 326 | + psu@59 { | |
| 327 | + compatible = "pmbus"; | |
| 328 | + reg = <0x59>; | |
| 329 | + }; | |
| 302 | 330 | }; |
| 303 | 331 | |
| 304 | 332 | i2c_psu1: i2c@1 { |
| 305 | 333 | #address-cells = <1>; |
| 306 | 334 | #size-cells = <0>; |
| 307 | 335 | reg = <1>; |
| 336 | + | |
| 337 | + psu@58 { | |
| 338 | + compatible = "pmbus"; | |
| 339 | + reg = <0x58>; | |
| 340 | + }; | |
| 308 | 341 | }; |
| 309 | 342 | |
| 310 | 343 | i2c_psu3: i2c@2 { |
| 311 | 344 | #address-cells = <1>; |
| 312 | 345 | #size-cells = <0>; |
| 313 | 346 | reg = <2>; |
| 347 | + | |
| 348 | + psu@58 { | |
| 349 | + compatible = "pmbus"; | |
| 350 | + reg = <0x58>; | |
| 351 | + }; | |
| 314 | 352 | }; |
| 315 | 353 | |
| 316 | 354 | i2c_psu2: i2c@3 { |
| 317 | 355 | #address-cells = <1>; |
| 318 | 356 | #size-cells = <0>; |
| 319 | 357 | reg = <3>; |
| 358 | + | |
| 359 | + psu@59 { | |
| 360 | + compatible = "pmbus"; | |
| 361 | + reg = <0x59>; | |
| 362 | + }; | |
| 320 | 363 | }; |
| 321 | 364 | }; |
| 322 | 365 | |
| @@ -345,6 +388,10 @@ · 22 unmodified lines | ||
| 345 | 388 | status = "okay"; |
| 346 | 389 | }; |
| 347 | 390 | |
| 391 | +&adc { | |
| 392 | + status = "okay"; | |
| 393 | +}; | |
| 394 | + | |
| 348 | 395 | &pwm_tacho { |
| 349 | 396 | status = "okay"; |
| 350 | 397 | |
| @@ -350,7 +350,7 @@ · 349 unmodified lines | ||
| 350 | 350 | status = "disabled"; |
| 351 | 351 | }; |
| 352 | 352 | |
| 353 | − i2c: i2c@1e78a000 { | |
| 353 | + i2c: bus@1e78a000 { | |
| 354 | 354 | compatible = "simple-bus"; |
| 355 | 355 | #address-cells = <1>; |
| 356 | 356 | #size-cells = <1>; |
| @@ -410,7 +410,7 @@ · 409 unmodified lines | ||
| 410 | 410 | status = "disabled"; |
| 411 | 411 | }; |
| 412 | 412 | |
| 413 | − i2c: i2c@1e78a000 { | |
| 413 | + i2c: bus@1e78a000 { | |
| 414 | 414 | compatible = "simple-bus"; |
| 415 | 415 | #address-cells = <1>; |
| 416 | 416 | #size-cells = <1>; |
| @@ -70,9 +70,9 @@ · 69 unmodified lines | ||
| 70 | 70 | &i2c1 { |
| 71 | 71 | status = "okay"; |
| 72 | 72 | |
| 73 | − eeprom@87 { | |
| 73 | + eeprom@57 { | |
| 74 | 74 | compatible = "giantec,gt24c32a", "atmel,24c32"; |
| 75 | − reg = <87>; | |
| 75 | + reg = <0x57>; | |
| 76 | 76 | pagesize = <32>; |
| 77 | 77 | }; |
| 78 | 78 | }; |
| @@ -59,9 +59,9 @@ · 58 unmodified lines | ||
| 59 | 59 | &i2c1 { |
| 60 | 60 | status = "okay"; |
| 61 | 61 | |
| 62 | − ft5426@56 { | |
| 62 | + ft5426@38 { | |
| 63 | 63 | compatible = "focaltech,ft5426", "edt,edt-ft5406"; |
| 64 | − reg = <56>; | |
| 64 | + reg = <0x38>; | |
| 65 | 65 | pinctrl-names = "default"; |
| 66 | 66 | pinctrl-0 = <&pinctrl_lcd_ctp_int>; |
| 67 | 67 | |
| @@ -16,46 +16,6 @@ · 15 unmodified lines | ||
| 16 | 16 | compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea", |
| 17 | 17 | "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; |
| 18 | 18 | |
| 19 | − ahb { | |
| 20 | − apb { | |
| 21 | − pinctrl@fffff200 { | |
| 22 | − nattis { | |
| 23 | − pinctrl_usba_vbus: usba_vbus { | |
| 24 | − atmel,pins = | |
| 25 | − <AT91_PIOD 28 | |
| 26 | − AT91_PERIPH_GPIO | |
| 27 | − AT91_PINCTRL_DEGLITCH>; | |
| 28 | − }; | |
| 29 | − | |
| 30 | − pinctrl_mmc0_cd: mmc0_cd { | |
| 31 | − atmel,pins = | |
| 32 | − <AT91_PIOD 5 | |
| 33 | − AT91_PERIPH_GPIO | |
| 34 | − AT91_PINCTRL_PULL_UP_DEGLITCH>; | |
| 35 | − }; | |
| 36 | − | |
| 37 | − pinctrl_lcd_prlud0: lcd_prlud0 { | |
| 38 | − atmel,pins = | |
| 39 | − <AT91_PIOA 21 | |
| 40 | − AT91_PERIPH_GPIO | |
| 41 | − AT91_PINCTRL_OUTPUT_VAL(0)>; | |
| 42 | − }; | |
| 43 | − | |
| 44 | − pinctrl_lcd_hipow0: lcd_hipow0 { | |
| 45 | − atmel,pins = | |
| 46 | − <AT91_PIOA 23 | |
| 47 | − AT91_PERIPH_GPIO | |
| 48 | − AT91_PINCTRL_OUTPUT_VAL(0)>; | |
| 49 | − }; | |
| 50 | − }; | |
| 51 | − }; | |
| 52 | − | |
| 53 | − watchdog@fffffe40 { | |
| 54 | − status = "okay"; | |
| 55 | − }; | |
| 56 | − }; | |
| 57 | − }; | |
| 58 | − | |
| 59 | 19 | gpio-keys { |
| 60 | 20 | compatible = "gpio-keys"; |
| 61 | 21 | |
| @@ -103,10 +63,29 @@ · 41 unmodified lines | ||
| 103 | 63 | }; |
| 104 | 64 | |
| 105 | 65 | panel: panel { |
| 106 | − compatible = "sharp,lq150x1lg11"; | |
| 66 | + compatible = "sharp,lq150x1lg11", "panel-lvds"; | |
| 67 | + | |
| 107 | 68 | backlight = <&panel_bl>; |
| 108 | 69 | power-supply = <&panel_reg>; |
| 109 | 70 | |
| 71 | + width-mm = <304>; | |
| 72 | + height-mm = <228>; | |
| 73 | + | |
| 74 | + data-mapping = "jeida-18"; | |
| 75 | + | |
| 76 | + panel-timing { | |
| 77 | + // 1024x768 @ 60Hz (typical) | |
| 78 | + clock-frequency = <50000000 65000000 80000000>; | |
| 79 | + hactive = <1024>; | |
| 80 | + vactive = <768>; | |
| 81 | + hfront-porch = <48 88 88>; | |
| 82 | + hback-porch = <96 168 168>; | |
| 83 | + hsync-len = <32 64 64>; | |
| 84 | + vsync-len = <3 13 74>; | |
| 85 | + vfront-porch = <3 13 74>; | |
| 86 | + vback-porch = <3 12 74>; | |
| 87 | + }; | |
| 88 | + | |
| 110 | 89 | port { |
| 111 | 90 | panel_input: endpoint { |
| 112 | 91 | remote-endpoint = <&lvds_encoder_output>; |
| @@ -115,7 +94,10 @@ · 2 unmodified lines | ||
| 115 | 94 | }; |
| 116 | 95 | |
| 117 | 96 | lvds-encoder { |
| 118 | − compatible = "lvds-encoder"; | |
| 97 | + compatible = "ti,ds90c185", "lvds-encoder"; | |
| 98 | + | |
| 99 | + pinctrl-names = "default"; | |
| 100 | + pinctrl-0 = <&pinctrl_lvds_prlud0 &pinctrl_lvds_hipow0>; | |
| 119 | 101 | |
| 120 | 102 | ports { |
| 121 | 103 | #address-cells = <1>; |
| @@ -159,6 +141,36 @@ · 37 unmodified lines | ||
| 159 | 141 | }; |
| 160 | 142 | }; |
| 161 | 143 | |
| 144 | +&pinctrl { | |
| 145 | + nattis { | |
| 146 | + pinctrl_usba_vbus: usba_vbus { | |
| 147 | + atmel,pins = <AT91_PIOD 28 AT91_PERIPH_GPIO | |
| 148 | + AT91_PINCTRL_DEGLITCH>; | |
| 149 | + }; | |
| 150 | + | |
| 151 | + pinctrl_mmc0_cd: mmc0_cd { | |
| 152 | + atmel,pins = <AT91_PIOD 5 AT91_PERIPH_GPIO | |
| 153 | + AT91_PINCTRL_PULL_UP_DEGLITCH>; | |
| 154 | + }; | |
| 155 | + | |
| 156 | + pinctrl_lvds_prlud0: lvds_prlud0 { | |
| 157 | + atmel,pins = <AT91_PIOA 21 AT91_PERIPH_GPIO | |
| 158 | + (AT91_PINCTRL_OUTPUT | | |
| 159 | + AT91_PINCTRL_OUTPUT_VAL(0))>; | |
| 160 | + }; | |
| 161 | + | |
| 162 | + pinctrl_lvds_hipow0: lvds_hipow0 { | |
| 163 | + atmel,pins = <AT91_PIOA 23 AT91_PERIPH_GPIO | |
| 164 | + (AT91_PINCTRL_OUTPUT | | |
| 165 | + AT91_PINCTRL_OUTPUT_VAL(0))>; | |
| 166 | + }; | |
| 167 | + }; | |
| 168 | +}; | |
| 169 | + | |
| 170 | +&watchdog { | |
| 171 | + status = "okay"; | |
| 172 | +}; | |
| 173 | + | |
| 162 | 174 | &i2c0 { |
| 163 | 175 | status = "okay"; |
| 164 | 176 | |
| @@ -195,14 +207,12 @@ · 30 unmodified lines | ||
| 195 | 207 | |
| 196 | 208 | hlcdc-display-controller { |
| 197 | 209 | pinctrl-names = "default"; |
| 198 | − pinctrl-0 = <&pinctrl_lcd_base | |
| 199 | − &pinctrl_lcd_rgb565 | |
| 200 | − &pinctrl_lcd_prlud0 | |
| 201 | − &pinctrl_lcd_hipow0>; | |
| 210 | + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>; | |
| 202 | 211 | |
| 203 | 212 | port@0 { |
| 204 | 213 | hlcdc_output: endpoint { |
| 205 | 214 | remote-endpoint = <&lvds_encoder_input>; |
| 215 | + bus-width = <16>; | |
| 206 | 216 | }; |
| 207 | 217 | }; |
| 208 | 218 | }; |
| @@ -219,6 +229,7 @@ · 10 unmodified lines | ||
| 219 | 229 | reg = <0>; |
| 220 | 230 | bus-width = <4>; |
| 221 | 231 | cd-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>; |
| 232 | + cd-inverted; | |
| 222 | 233 | }; |
| 223 | 234 | }; |
| 224 | 235 | |
| @@ -283,6 +283,13 @@ · 282 unmodified lines | ||
| 283 | 283 | status = "okay"; |
| 284 | 284 | }; |
| 285 | 285 | |
| 286 | + adc: adc@fc030000 { | |
| 287 | + vddana-supply = <&vddana>; | |
| 288 | + vref-supply = <&advref>; | |
| 289 | + | |
| 290 | + status = "disabled"; | |
| 291 | + }; | |
| 292 | + | |
| 286 | 293 | pinctrl@fc038000 { |
| 287 | 294 | |
| 288 | 295 | pinctrl_can1_default: can1_default { |
| @@ -549,4 +556,39 @@ · 260 unmodified lines | ||
| 549 | 556 | linux,default-trigger = "heartbeat"; |
| 550 | 557 | }; |
| 551 | 558 | }; |
| 559 | + | |
| 560 | + vddin_3v3: fixed-regulator-vddin_3v3 { | |
| 561 | + compatible = "regulator-fixed"; | |
| 562 | + | |
| 563 | + regulator-name = "VDDIN_3V3"; | |
| 564 | + regulator-min-microvolt = <3300000>; | |
| 565 | + regulator-max-microvolt = <3300000>; | |
| 566 | + regulator-always-on; | |
| 567 | + regulator-boot-on; | |
| 568 | + status = "okay"; | |
| 569 | + }; | |
| 570 | + | |
| 571 | + vddana: fixed-regulator-vddana { | |
| 572 | + compatible = "regulator-fixed"; | |
| 573 | + | |
| 574 | + regulator-name = "VDDANA"; | |
| 575 | + regulator-min-microvolt = <3300000>; | |
| 576 | + regulator-max-microvolt = <3300000>; | |
| 577 | + regulator-always-on; | |
| 578 | + regulator-boot-on; | |
| 579 | + vin-supply = <&vddin_3v3>; | |
| 580 | + status = "okay"; | |
| 581 | + }; | |
| 582 | + | |
| 583 | + advref: fixed-regulator-advref { | |
| 584 | + compatible = "regulator-fixed"; | |
| 585 | + | |
| 586 | + regulator-name = "advref"; | |
| 587 | + regulator-min-microvolt = <3300000>; | |
| 588 | + regulator-max-microvolt = <3300000>; | |
| 589 | + regulator-always-on; | |
| 590 | + regulator-boot-on; | |
| 591 | + vin-supply = <&vddana>; | |
| 592 | + status = "okay"; | |
| 593 | + }; | |
| 552 | 594 | }; |
| @@ -92,13 +92,13 @@ · 91 unmodified lines | ||
| 92 | 92 | reg = <0x40000 0xc0000>; |
| 93 | 93 | }; |
| 94 | 94 | |
| 95 | − bootloaderenv@0x100000 { | |
| 96 | − label = "bootloader env"; | |
| 95 | + bootloaderenvred@0x100000 { | |
| 96 | + label = "bootloader env redundant"; | |
| 97 | 97 | reg = <0x100000 0x40000>; |
| 98 | 98 | }; |
| 99 | 99 | |
| 100 | − bootloaderenvred@0x140000 { | |
| 101 | − label = "bootloader env redundant"; | |
| 100 | + bootloaderenv@0x140000 { | |
| 101 | + label = "bootloader env"; | |
| 102 | 102 | reg = <0x140000 0x40000>; |
| 103 | 103 | }; |
| 104 | 104 | |
| @@ -281,6 +281,12 @@ · 280 unmodified lines | ||
| 281 | 281 | status = "okay"; |
| 282 | 282 | }; |
| 283 | 283 | |
| 284 | + i2s0: i2s@f8050000 { | |
| 285 | + pinctrl-names = "default"; | |
| 286 | + pinctrl-0 = <&pinctrl_i2s0_default>; | |
| 287 | + status = "disabled"; /* conflict with can0 */ | |
| 288 | + }; | |
| 289 | + | |
| 284 | 290 | can0: can@f8054000 { |
| 285 | 291 | pinctrl-names = "default"; |
| 286 | 292 | pinctrl-0 = <&pinctrl_can0_default>; |
| @@ -424,6 +430,24 @@ · 137 unmodified lines | ||
| 424 | 430 | bias-disable; |
| 425 | 431 | }; |
| 426 | 432 | |
| 433 | + pinctrl_i2s0_default: i2s0_default { | |
| 434 | + pinmux = <PIN_PC1__I2SC0_CK>, | |
| 435 | + <PIN_PC2__I2SC0_MCK>, | |
| 436 | + <PIN_PC3__I2SC0_WS>, | |
| 437 | + <PIN_PC4__I2SC0_DI0>, | |
| 438 | + <PIN_PC5__I2SC0_DO0>; | |
| 439 | + bias-disable; | |
| 440 | + }; | |
| 441 | + | |
| 442 | + pinctrl_i2s1_default: i2s1_default { | |
| 443 | + pinmux = <PIN_PA15__I2SC1_CK>, | |
| 444 | + <PIN_PA14__I2SC1_MCK>, | |
| 445 | + <PIN_PA16__I2SC1_WS>, | |
| 446 | + <PIN_PA17__I2SC1_DI0>, | |
| 447 | + <PIN_PA18__I2SC1_DO0>; | |
| 448 | + bias-disable; | |
| 449 | + }; | |
| 450 | + | |
| 427 | 451 | pinctrl_key_gpio_default: key_gpio_default { |
| 428 | 452 | pinmux = <PIN_PB9__GPIO>; |
| 429 | 453 | bias-pull-up; |
| @@ -546,6 +570,12 @@ · 116 unmodified lines | ||
| 546 | 570 | status = "okay"; |
| 547 | 571 | }; |
| 548 | 572 | |
| 573 | + i2s1: i2s@fc04c000 { | |
| 574 | + pinctrl-names = "default"; | |
| 575 | + pinctrl-0 = <&pinctrl_i2s1_default>; | |
| 576 | + status = "disabled"; /* conflict with spi0, sdmmc1 */ | |
| 577 | + }; | |
| 578 | + | |
| 549 | 579 | can1: can@fc050000 { |
| 550 | 580 | pinctrl-names = "default"; |
| 551 | 581 | pinctrl-0 = <&pinctrl_can1_default>; |
| @@ -297,12 +297,17 @@ · 296 unmodified lines | ||
| 297 | 297 | |
| 298 | 298 | bootloader@40000 { |
| 299 | 299 | label = "bootloader"; |
| 300 | − reg = <0x40000 0x80000>; | |
| 300 | + reg = <0x40000 0xc0000>; | |
| 301 | 301 | }; |
| 302 | 302 | |
| 303 | − bootloaderenv@c0000 { | |
| 303 | + bootloaderenvred@100000 { | |
| 304 | + label = "bootloader env redundant"; | |
| 305 | + reg = <0x100000 0x40000>; | |
| 306 | + }; | |
| 307 | + | |
| 308 | + bootloaderenv@140000 { | |
| 304 | 309 | label = "bootloader env"; |
| 305 | − reg = <0xc0000 0xc0000>; | |
| 310 | + reg = <0x140000 0x40000>; | |
| 306 | 311 | }; |
| 307 | 312 | |
| 308 | 313 | dtb@180000 { |
| @@ -232,12 +232,17 @@ · 231 unmodified lines | ||
| 232 | 232 | |
| 233 | 233 | bootloader@40000 { |
| 234 | 234 | label = "bootloader"; |
| 235 | − reg = <0x40000 0x80000>; | |
| 235 | + reg = <0x40000 0xc0000>; | |
| 236 | 236 | }; |
| 237 | 237 | |
| 238 | − bootloaderenv@c0000 { | |
| 238 | + bootloaderenvred@100000 { | |
| 239 | + label = "bootloader env redundant"; | |
| 240 | + reg = <0x100000 0x40000>; | |
| 241 | + }; | |
| 242 | + | |
| 243 | + bootloaderenv@140000 { | |
| 239 | 244 | label = "bootloader env"; |
| 240 | − reg = <0xc0000 0xc0000>; | |
| 245 | + reg = <0x140000 0x40000>; | |
| 241 | 246 | }; |
| 242 | 247 | |
| 243 | 248 | dtb@180000 { |
| @@ -252,7 +257,7 @@ · 8 unmodified lines | ||
| 252 | 257 | |
| 253 | 258 | rootfs@800000 { |
| 254 | 259 | label = "rootfs"; |
| 255 | − reg = <0x800000 0x0f800000>; | |
| 260 | + reg = <0x800000 0x1f800000>; | |
| 256 | 261 | }; |
| 257 | 262 | }; |
| 258 | 263 | }; |
| @@ -16,25 +16,6 @@ · 15 unmodified lines | ||
| 16 | 16 | compatible = "axentia,tse850v3", "axentia,linea", |
| 17 | 17 | "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; |
| 18 | 18 | |
| 19 | − ahb { | |
| 20 | − apb { | |
| 21 | − pinctrl@fffff200 { | |
| 22 | − tse850 { | |
| 23 | − pinctrl_usba_vbus: usba-vbus { | |
| 24 | − atmel,pins = | |
| 25 | − <AT91_PIOC 31 | |
| 26 | − AT91_PERIPH_GPIO | |
| 27 | − AT91_PINCTRL_DEGLITCH>; | |
| 28 | − }; | |
| 29 | − }; | |
| 30 | − }; | |
| 31 | − | |
| 32 | − watchdog@fffffe40 { | |
| 33 | − status = "okay"; | |
| 34 | − }; | |
| 35 | − }; | |
| 36 | − }; | |
| 37 | − | |
| 38 | 19 | sck: oscillator { |
| 39 | 20 | compatible = "fixed-clock"; |
| 40 | 21 | |
| @@ -253,6 +234,19 @@ · 212 unmodified lines | ||
| 253 | 234 | }; |
| 254 | 235 | }; |
| 255 | 236 | |
| 237 | +&pinctrl { | |
| 238 | + tse850 { | |
| 239 | + pinctrl_usba_vbus: usba-vbus { | |
| 240 | + atmel,pins = <AT91_PIOC 31 AT91_PERIPH_GPIO | |
| 241 | + AT91_PINCTRL_DEGLITCH>; | |
| 242 | + }; | |
| 243 | + }; | |
| 244 | +}; | |
| 245 | + | |
| 246 | +&watchdog { | |
| 247 | + status = "okay"; | |
| 248 | +}; | |
| 249 | + | |
| 256 | 250 | &usart0 { |
| 257 | 251 | status = "okay"; |
| 258 | 252 | |
| @@ -128,7 +128,7 @@ · 127 unmodified lines | ||
| 128 | 128 | i2c2: i2c@f8024000 { |
| 129 | 129 | status = "okay"; |
| 130 | 130 | |
| 131 | − rtc1: rtc@64 { | |
| 131 | + rtc1: rtc@32 { | |
| 132 | 132 | compatible = "epson,rx8900"; |
| 133 | 133 | reg = <0x32>; |
| 134 | 134 | }; |
| @@ -127,7 +127,7 @@ · 126 unmodified lines | ||
| 127 | 127 | |
| 128 | 128 | spi0: spi@fffc8000 { |
| 129 | 129 | cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; |
| 130 | − mtd_dataflash@0 { | |
| 130 | + mtd_dataflash@1 { | |
| 131 | 131 | compatible = "atmel,at45", "atmel,dataflash"; |
| 132 | 132 | spi-max-frequency = <50000000>; |
| 133 | 133 | reg = <1>; |
| @@ -160,7 +160,7 @@ · 159 unmodified lines | ||
| 160 | 160 | spi-max-frequency = <15000000>; |
| 161 | 161 | }; |
| 162 | 162 | |
| 163 | − tsc2046@0 { | |
| 163 | + tsc2046@2 { | |
| 164 | 164 | reg = <2>; |
| 165 | 165 | compatible = "ti,ads7843"; |
| 166 | 166 | interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>; |
| @@ -109,7 +109,7 @@ · 108 unmodified lines | ||
| 109 | 109 | |
| 110 | 110 | spi0: spi@fffc8000 { |
| 111 | 111 | cs-gpios = <0>, <&pioC 11 0>, <0>, <0>; |
| 112 | − mtd_dataflash@0 { | |
| 112 | + mtd_dataflash@1 { | |
| 113 | 113 | compatible = "atmel,at45", "atmel,dataflash"; |
| 114 | 114 | spi-max-frequency = <50000000>; |
| 115 | 115 | reg = <1>; |
| @@ -570,7 +570,7 @@ · 569 unmodified lines | ||
| 570 | 570 | }; |
| 571 | 571 | }; |
| 572 | 572 | |
| 573 | − uart1 { | |
| 573 | + usart1 { | |
| 574 | 574 | pinctrl_usart1: usart1-0 { |
| 575 | 575 | atmel,pins = |
| 576 | 576 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE |
| @@ -85,12 +85,22 @@ · 84 unmodified lines | ||
| 85 | 85 | |
| 86 | 86 | uboot@40000 { |
| 87 | 87 | label = "u-boot"; |
| 88 | − reg = <0x40000 0x80000>; | |
| 88 | + reg = <0x40000 0xc0000>; | |
| 89 | 89 | }; |
| 90 | 90 | |
| 91 | − ubootenv@c0000 { | |
| 91 | + ubootenvred@100000 { | |
| 92 | + label = "U-Boot Env Redundant"; | |
| 93 | + reg = <0x100000 0x40000>; | |
| 94 | + }; | |
| 95 | + | |
| 96 | + ubootenv@140000 { | |
| 92 | 97 | label = "U-Boot Env"; |
| 93 | − reg = <0xc0000 0x140000>; | |
| 98 | + reg = <0x140000 0x40000>; | |
| 99 | + }; | |
| 100 | + | |
| 101 | + dtb@180000 { | |
| 102 | + label = "device tree"; | |
| 103 | + reg = <0x180000 0x80000>; | |
| 94 | 104 | }; |
| 95 | 105 | |
| 96 | 106 | kernel@200000 { |
| @@ -100,7 +110,7 @@ · 3 unmodified lines | ||
| 100 | 110 | |
| 101 | 111 | rootfs@800000 { |
| 102 | 112 | label = "rootfs"; |
| 103 | − reg = <0x800000 0x1f800000>; | |
| 113 | + reg = <0x800000 0x0f800000>; | |
| 104 | 114 | }; |
| 105 | 115 | }; |
| 106 | 116 | }; |
| @@ -216,7 +216,7 @@ · 215 unmodified lines | ||
| 216 | 216 | reg = <0x33000 0x14>; |
| 217 | 217 | }; |
| 218 | 218 | |
| 219 | − qspi: qspi@27200 { | |
| 219 | + qspi: spi@27200 { | |
| 220 | 220 | compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi"; |
| 221 | 221 | reg = <0x027200 0x184>, |
| 222 | 222 | <0x027000 0x124>, |
| @@ -273,7 +273,7 @@ · 272 unmodified lines | ||
| 273 | 273 | brcm,nand-has-wp; |
| 274 | 274 | }; |
| 275 | 275 | |
| 276 | − qspi: qspi@27200 { | |
| 276 | + qspi: spi@27200 { | |
| 277 | 277 | compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi"; |
| 278 | 278 | reg = <0x027200 0x184>, |
| 279 | 279 | <0x027000 0x124>, |
| @@ -377,7 +377,36 @@ · 97 unmodified lines | ||
| 377 | 377 | |
| 378 | 378 | srab: srab@36000 { |
| 379 | 379 | compatible = "brcm,nsp-srab"; |
| 380 | − reg = <0x36000 0x1000>; | |
| 380 | + reg = <0x36000 0x1000>, | |
| 381 | + <0x3f308 0x8>, | |
| 382 | + <0x3f410 0xc>; | |
| 383 | + reg-names = "srab", "mux_config", "sgmii"; | |
| 384 | + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, | |
| 385 | + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, | |
| 386 | + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, | |
| 387 | + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, | |
| 388 | + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, | |
| 389 | + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, | |
| 390 | + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, | |
| 391 | + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, | |
| 392 | + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, | |
| 393 | + <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, | |
| 394 | + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, | |
| 395 | + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, | |
| 396 | + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
| 397 | + interrupt-names = "link_state_p0", | |
| 398 | + "link_state_p1", | |
| 399 | + "link_state_p2", | |
| 400 | + "link_state_p3", | |
| 401 | + "link_state_p4", | |
| 402 | + "link_state_p5", | |
| 403 | + "link_state_p7", | |
| 404 | + "link_state_p8", | |
| 405 | + "phy", | |
| 406 | + "ts", | |
| 407 | + "imp_sleep_timer_p5", | |
| 408 | + "imp_sleep_timer_p7", | |
| 409 | + "imp_sleep_timer_p8"; | |
| 381 | 410 | #address-cells = <1>; |
| 382 | 411 | #size-cells = <0>; |
| 383 | 412 | |
| @@ -0,0 +1,87 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | +/dts-v1/; | |
| 3 | +#include "bcm2837-rpi-cm3.dtsi" | |
| 4 | +#include "bcm283x-rpi-usb-host.dtsi" | |
| 5 | + | |
| 6 | +/ { | |
| 7 | + compatible = "raspberrypi,3-compute-module", "brcm,bcm2837"; | |
| 8 | + model = "Raspberry Pi Compute Module 3 IO board V3.0"; | |
| 9 | +}; | |
| 10 | + | |
| 11 | +&gpio { | |
| 12 | + /* | |
| 13 | + * This is based on the official GPU firmware DT blob. | |
| 14 | + * | |
| 15 | + * Legend: | |
| 16 | + * "NC" = not connected (no rail from the SoC) | |
| 17 | + * "FOO" = GPIO line named "FOO" on the schematic | |
| 18 | + * "FOO_N" = GPIO line named "FOO" on schematic, active low | |
| 19 | + */ | |
| 20 | + gpio-line-names = "GPIO0", | |
| 21 | + "GPIO1", | |
| 22 | + "GPIO2", | |
| 23 | + "GPIO3", | |
| 24 | + "GPIO4", | |
| 25 | + "GPIO5", | |
| 26 | + "GPIO6", | |
| 27 | + "GPIO7", | |
| 28 | + "GPIO8", | |
| 29 | + "GPIO9", | |
| 30 | + "GPIO10", | |
| 31 | + "GPIO11", | |
| 32 | + "GPIO12", | |
| 33 | + "GPIO13", | |
| 34 | + "GPIO14", | |
| 35 | + "GPIO15", | |
| 36 | + "GPIO16", | |
| 37 | + "GPIO17", | |
| 38 | + "GPIO18", | |
| 39 | + "GPIO19", | |
| 40 | + "GPIO20", | |
| 41 | + "GPIO21", | |
| 42 | + "GPIO22", | |
| 43 | + "GPIO23", | |
| 44 | + "GPIO24", | |
| 45 | + "GPIO25", | |
| 46 | + "GPIO26", | |
| 47 | + "GPIO27", | |
| 48 | + "GPIO28", | |
| 49 | + "GPIO29", | |
| 50 | + "GPIO30", | |
| 51 | + "GPIO31", | |
| 52 | + "GPIO32", | |
| 53 | + "GPIO33", | |
| 54 | + "GPIO34", | |
| 55 | + "GPIO35", | |
| 56 | + "GPIO36", | |
| 57 | + "GPIO37", | |
| 58 | + "GPIO38", | |
| 59 | + "GPIO39", | |
| 60 | + "GPIO40", | |
| 61 | + "GPIO41", | |
| 62 | + "GPIO42", | |
| 63 | + "GPIO43", | |
| 64 | + "GPIO44", | |
| 65 | + "GPIO45", | |
| 66 | + "GPIO46", | |
| 67 | + "GPIO47", | |
| 68 | + /* Used by eMMC */ | |
| 69 | + "SD_CLK_R", | |
| 70 | + "SD_CMD_R", | |
| 71 | + "SD_DATA0_R", | |
| 72 | + "SD_DATA1_R", | |
| 73 | + "SD_DATA2_R", | |
| 74 | + "SD_DATA3_R"; | |
| 75 | + | |
| 76 | + pinctrl-0 = <&gpioout &alt0>; | |
| 77 | +}; | |
| 78 | + | |
| 79 | +&hdmi { | |
| 80 | + hpd-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; | |
| 81 | +}; | |
| 82 | + | |
| 83 | +&uart0 { | |
| 84 | + pinctrl-names = "default"; | |
| 85 | + pinctrl-0 = <&uart0_gpio14>; | |
| 86 | + status = "okay"; | |
| 87 | +}; | |
| @@ -0,0 +1,52 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | +/dts-v1/; | |
| 3 | +#include "bcm2837.dtsi" | |
| 4 | +#include "bcm2835-rpi.dtsi" | |
| 5 | + | |
| 6 | +/ { | |
| 7 | + memory { | |
| 8 | + reg = <0 0x40000000>; | |
| 9 | + }; | |
| 10 | + | |
| 11 | + reg_3v3: fixed-regulator { | |
| 12 | + compatible = "regulator-fixed"; | |
| 13 | + regulator-name = "3V3"; | |
| 14 | + regulator-min-microvolt = <3300000>; | |
| 15 | + regulator-max-microvolt = <3300000>; | |
| 16 | + regulator-always-on; | |
| 17 | + }; | |
| 18 | + | |
| 19 | + reg_1v8: fixed-regulator { | |
| 20 | + compatible = "regulator-fixed"; | |
| 21 | + regulator-name = "1V8"; | |
| 22 | + regulator-min-microvolt = <1800000>; | |
| 23 | + regulator-max-microvolt = <1800000>; | |
| 24 | + regulator-always-on; | |
| 25 | + }; | |
| 26 | +}; | |
| 27 | + | |
| 28 | +&firmware { | |
| 29 | + expgpio: gpio { | |
| 30 | + compatible = "raspberrypi,firmware-gpio"; | |
| 31 | + gpio-controller; | |
| 32 | + #gpio-cells = <2>; | |
| 33 | + gpio-line-names = "HDMI_HPD_N", | |
| 34 | + "EMMC_EN_N", | |
| 35 | + "NC", | |
| 36 | + "NC", | |
| 37 | + "NC", | |
| 38 | + "NC", | |
| 39 | + "NC", | |
| 40 | + "NC"; | |
| 41 | + status = "okay"; | |
| 42 | + }; | |
| 43 | +}; | |
| 44 | + | |
| 45 | +&sdhost { | |
| 46 | + pinctrl-names = "default"; | |
| 47 | + pinctrl-0 = <&sdhost_gpio48>; | |
| 48 | + bus-width = <4>; | |
| 49 | + vmmc-supply = <®_3v3>; | |
| 50 | + vqmmc-supply = <®_1v8>; | |
| 51 | + status = "okay"; | |
| 52 | +}; | |
| @@ -1,4 +1,6 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | +#include <dt-bindings/net/microchip-lan78xx.h> | |
| 3 | + | |
| 2 | 4 | / { |
| 3 | 5 | aliases { |
| 4 | 6 | ethernet0 = ðernet; |
| @@ -21,6 +23,18 @@ · 16 unmodified lines | ||
| 21 | 23 | ethernet: ethernet@1 { |
| 22 | 24 | compatible = "usb424,7800"; |
| 23 | 25 | reg = <1>; |
| 26 | + | |
| 27 | + mdio { | |
| 28 | + #address-cells = <0x1>; | |
| 29 | + #size-cells = <0x0>; | |
| 30 | + eth_phy: ethernet-phy@1 { | |
| 31 | + reg = <1>; | |
| 32 | + microchip,led-modes = < | |
| 33 | + LAN78XX_LINK_1000_ACTIVITY | |
| 34 | + LAN78XX_LINK_10_100_ACTIVITY | |
| 35 | + >; | |
| 36 | + }; | |
| 37 | + }; | |
| 24 | 38 | }; |
| 25 | 39 | }; |
| 26 | 40 | }; |
| @@ -94,6 +94,34 @@ · 93 unmodified lines | ||
| 94 | 94 | |
| 95 | 95 | &spi_nor { |
| 96 | 96 | status = "okay"; |
| 97 | + | |
| 98 | + partitions { | |
| 99 | + compatible = "fixed-partitions"; | |
| 100 | + #address-cells = <1>; | |
| 101 | + #size-cells = <1>; | |
| 102 | + | |
| 103 | + boot@0 { | |
| 104 | + label = "boot"; | |
| 105 | + reg = <0x000000 0x040000>; | |
| 106 | + read-only; | |
| 107 | + }; | |
| 108 | + | |
| 109 | + os-image@100000 { | |
| 110 | + label = "os-image"; | |
| 111 | + reg = <0x040000 0x200000>; | |
| 112 | + compatible = "brcm,trx"; | |
| 113 | + }; | |
| 114 | + | |
| 115 | + rootfs@240000 { | |
| 116 | + label = "rootfs"; | |
| 117 | + reg = <0x240000 0xc00000>; | |
| 118 | + }; | |
| 119 | + | |
| 120 | + nvram@ff0000 { | |
| 121 | + label = "nvram"; | |
| 122 | + reg = <0xff0000 0x010000>; | |
| 123 | + }; | |
| 124 | + }; | |
| 97 | 125 | }; |
| 98 | 126 | |
| 99 | 127 | &usb2 { |
| @@ -66,3 +66,34 @@ · 65 unmodified lines | ||
| 66 | 66 | &usb3_phy { |
| 67 | 67 | status = "okay"; |
| 68 | 68 | }; |
| 69 | + | |
| 70 | +&nandcs { | |
| 71 | + partitions { | |
| 72 | + compatible = "fixed-partitions"; | |
| 73 | + #address-cells = <1>; | |
| 74 | + #size-cells = <1>; | |
| 75 | + | |
| 76 | + boot@0 { | |
| 77 | + label = "boot"; | |
| 78 | + reg = <0x00000000 0x00080000>; | |
| 79 | + read-only; | |
| 80 | + }; | |
| 81 | + | |
| 82 | + nvram@80000 { | |
| 83 | + label = "nvram"; | |
| 84 | + reg = <0x00080000 0x00180000>; | |
| 85 | + }; | |
| 86 | + | |
| 87 | + firmware@200000 { | |
| 88 | + label = "firmware"; | |
| 89 | + reg = <0x00200000 0x07cc0000>; | |
| 90 | + compatible = "brcm,trx"; | |
| 91 | + }; | |
| 92 | + | |
| 93 | + asus@7ec0000 { | |
| 94 | + label = "asus"; | |
| 95 | + reg = <0x07ec0000 0x00140000>; | |
| 96 | + read-only; | |
| 97 | + }; | |
| 98 | + }; | |
| 99 | +}; | |
| @@ -103,6 +103,34 @@ · 102 unmodified lines | ||
| 103 | 103 | |
| 104 | 104 | &spi_nor { |
| 105 | 105 | status = "okay"; |
| 106 | + | |
| 107 | + partitions { | |
| 108 | + compatible = "fixed-partitions"; | |
| 109 | + #address-cells = <1>; | |
| 110 | + #size-cells = <1>; | |
| 111 | + | |
| 112 | + boot@0 { | |
| 113 | + label = "boot"; | |
| 114 | + reg = <0x000000 0x040000>; | |
| 115 | + read-only; | |
| 116 | + }; | |
| 117 | + | |
| 118 | + os-image@100000 { | |
| 119 | + label = "os-image"; | |
| 120 | + reg = <0x040000 0x200000>; | |
| 121 | + compatible = "brcm,trx"; | |
| 122 | + }; | |
| 123 | + | |
| 124 | + rootfs@240000 { | |
| 125 | + label = "rootfs"; | |
| 126 | + reg = <0x240000 0xc00000>; | |
| 127 | + }; | |
| 128 | + | |
| 129 | + nvram@ff0000 { | |
| 130 | + label = "nvram"; | |
| 131 | + reg = <0xff0000 0x010000>; | |
| 132 | + }; | |
| 133 | + }; | |
| 106 | 134 | }; |
| 107 | 135 | |
| 108 | 136 | &usb3_phy { |
| @@ -12,6 +12,10 @@ · 11 unmodified lines | ||
| 12 | 12 | reg = <0>; |
| 13 | 13 | #address-cells = <1>; |
| 14 | 14 | #size-cells = <1>; |
| 15 | + | |
| 16 | + partitions { | |
| 17 | + compatible = "brcm,bcm947xx-cfe-partitions"; | |
| 18 | + }; | |
| 15 | 19 | }; |
| 16 | 20 | }; |
| 17 | 21 | }; |
| @@ -475,8 +475,11 @@ · 474 unmodified lines | ||
| 475 | 475 | compatible = "jedec,spi-nor"; |
| 476 | 476 | reg = <0>; |
| 477 | 477 | spi-max-frequency = <20000000>; |
| 478 | − linux,part-probe = "ofpart", "bcm47xxpart"; | |
| 479 | 478 | status = "disabled"; |
| 479 | + | |
| 480 | + partitions { | |
| 481 | + compatible = "brcm,bcm947xx-cfe-partitions"; | |
| 482 | + }; | |
| 480 | 483 | }; |
| 481 | 484 | }; |
| 482 | 485 | |
| @@ -58,6 +58,24 @@ · 57 unmodified lines | ||
| 58 | 58 | open-source; |
| 59 | 59 | priority = <200>; |
| 60 | 60 | }; |
| 61 | + | |
| 62 | + /* Hardware I2C block cannot do more than 63 bytes per transfer, | |
| 63 | + * which would prevent reading from a SFP's EEPROM (256 byte). | |
| 64 | + */ | |
| 65 | + i2c1: i2c { | |
| 66 | + compatible = "i2c-gpio"; | |
| 67 | + sda-gpios = <&gpioa 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | |
| 68 | + scl-gpios = <&gpioa 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; | |
| 69 | + }; | |
| 70 | + | |
| 71 | + sfp: sfp { | |
| 72 | + compatible = "sff,sfp"; | |
| 73 | + i2c-bus = <&i2c1>; | |
| 74 | + mod-def0-gpios = <&gpioa 28 GPIO_ACTIVE_LOW>; | |
| 75 | + los-gpios = <&gpioa 24 GPIO_ACTIVE_HIGH>; | |
| 76 | + tx-fault-gpios = <&gpioa 30 GPIO_ACTIVE_HIGH>; | |
| 77 | + tx-disable-gpios = <&gpioa 26 GPIO_ACTIVE_HIGH>; | |
| 78 | + }; | |
| 61 | 79 | }; |
| 62 | 80 | |
| 63 | 81 | &amac0 { |
| @@ -210,6 +228,14 @@ · 146 unmodified lines | ||
| 210 | 228 | reg = <4>; |
| 211 | 229 | }; |
| 212 | 230 | |
| 231 | + port@5 { | |
| 232 | + label = "sfp"; | |
| 233 | + phy-mode = "sgmii"; | |
| 234 | + reg = <5>; | |
| 235 | + sfp = <&sfp>; | |
| 236 | + managed = "in-band-status"; | |
| 237 | + }; | |
| 238 | + | |
| 213 | 239 | port@8 { |
| 214 | 240 | ethernet = <&amac2>; |
| 215 | 241 | label = "cpu"; |
| @@ -221,6 +221,12 @@ · 220 unmodified lines | ||
| 221 | 221 | gpio-controller; |
| 222 | 222 | #gpio-cells = <2>; |
| 223 | 223 | }; |
| 224 | + tca6416_bb: gpio@21 { | |
| 225 | + compatible = "ti,tca6416"; | |
| 226 | + reg = <0x21>; | |
| 227 | + gpio-controller; | |
| 228 | + #gpio-cells = <2>; | |
| 229 | + }; | |
| 224 | 230 | }; |
| 225 | 231 | |
| 226 | 232 | &wdt { |
| @@ -352,7 +352,8 @@ · 351 unmodified lines | ||
| 352 | 352 | compatible = "ti,ads7957"; |
| 353 | 353 | reg = <3>; |
| 354 | 354 | #io-channel-cells = <1>; |
| 355 | − spi-max-frequency = <10000000>; | |
| 355 | + spi-max-frequency = <1000000>; | |
| 356 | + ti,spi-wdelay = <63>; | |
| 356 | 357 | vref-supply = <&adc_ref>; |
| 357 | 358 | }; |
| 358 | 359 | }; |
| @@ -27,15 +27,25 @@ · 26 unmodified lines | ||
| 27 | 27 | }; |
| 28 | 28 | |
| 29 | 29 | &cpsw_emac0 { |
| 30 | − phy_id = <&davinci_mdio>, <0>; | |
| 30 | + phy-handle = <ðphy0>; | |
| 31 | 31 | phy-mode = "rgmii"; |
| 32 | 32 | }; |
| 33 | 33 | |
| 34 | 34 | &cpsw_emac1 { |
| 35 | − phy_id = <&davinci_mdio>, <1>; | |
| 35 | + phy-handle = <ðphy1>; | |
| 36 | 36 | phy-mode = "rgmii"; |
| 37 | 37 | }; |
| 38 | 38 | |
| 39 | +&davinci_mdio { | |
| 40 | + ethphy0: ethernet-phy@0 { | |
| 41 | + reg = <0>; | |
| 42 | + }; | |
| 43 | + | |
| 44 | + ethphy1: ethernet-phy@1 { | |
| 45 | + reg = <1>; | |
| 46 | + }; | |
| 47 | +}; | |
| 48 | + | |
| 39 | 49 | &gpmc { |
| 40 | 50 | ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ |
| 41 | 51 | |
| @@ -36,15 +36,25 @@ · 35 unmodified lines | ||
| 36 | 36 | }; |
| 37 | 37 | |
| 38 | 38 | &cpsw_emac0 { |
| 39 | − phy_id = <&davinci_mdio>, <0>; | |
| 39 | + phy-handle = <ðphy0>; | |
| 40 | 40 | phy-mode = "rgmii"; |
| 41 | 41 | }; |
| 42 | 42 | |
| 43 | 43 | &cpsw_emac1 { |
| 44 | − phy_id = <&davinci_mdio>, <1>; | |
| 44 | + phy-handle = <ðphy1>; | |
| 45 | 45 | phy-mode = "rgmii"; |
| 46 | 46 | }; |
| 47 | 47 | |
| 48 | +&davinci_mdio { | |
| 49 | + ethphy0: ethernet-phy@0 { | |
| 50 | + reg = <0>; | |
| 51 | + }; | |
| 52 | + | |
| 53 | + ethphy1: ethernet-phy@1 { | |
| 54 | + reg = <1>; | |
| 55 | + }; | |
| 56 | +}; | |
| 57 | + | |
| 48 | 58 | &mmc1 { |
| 49 | 59 | status = "disabled"; |
| 50 | 60 | }; |
| @@ -87,7 +87,7 @@ · 86 unmodified lines | ||
| 87 | 87 | status = "okay"; |
| 88 | 88 | clock-frequency = <100000>; |
| 89 | 89 | |
| 90 | − si5351: clock-generator { | |
| 90 | + si5351: clock-generator@60 { | |
| 91 | 91 | compatible = "silabs,si5351a-msop"; |
| 92 | 92 | reg = <0x60>; |
| 93 | 93 | #address-cells = <1>; |
| @@ -155,7 +155,7 @@ · 154 unmodified lines | ||
| 155 | 155 | 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */ |
| 156 | 156 | 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */ |
| 157 | 157 | |
| 158 | − spi0: spi-ctrl@10600 { | |
| 158 | + spi0: spi@10600 { | |
| 159 | 159 | compatible = "marvell,orion-spi"; |
| 160 | 160 | #address-cells = <1>; |
| 161 | 161 | #size-cells = <0>; |
| @@ -168,7 +168,7 @@ · 6 unmodified lines | ||
| 168 | 168 | status = "disabled"; |
| 169 | 169 | }; |
| 170 | 170 | |
| 171 | − i2c: i2c-ctrl@11000 { | |
| 171 | + i2c: i2c@11000 { | |
| 172 | 172 | compatible = "marvell,mv64xxx-i2c"; |
| 173 | 173 | reg = <0x11000 0x20>; |
| 174 | 174 | #address-cells = <1>; |
| @@ -218,7 +218,7 @@ · 43 unmodified lines | ||
| 218 | 218 | status = "disabled"; |
| 219 | 219 | }; |
| 220 | 220 | |
| 221 | − spi1: spi-ctrl@14600 { | |
| 221 | + spi1: spi@14600 { | |
| 222 | 222 | compatible = "marvell,orion-spi"; |
| 223 | 223 | #address-cells = <1>; |
| 224 | 224 | #size-cells = <0>; |
| @@ -27,15 +27,25 @@ · 26 unmodified lines | ||
| 27 | 27 | }; |
| 28 | 28 | |
| 29 | 29 | &cpsw_emac0 { |
| 30 | − phy_id = <&davinci_mdio>, <0>; | |
| 30 | + phy-handle = <ðphy0>; | |
| 31 | 31 | phy-mode = "rgmii"; |
| 32 | 32 | }; |
| 33 | 33 | |
| 34 | 34 | &cpsw_emac1 { |
| 35 | − phy_id = <&davinci_mdio>, <1>; | |
| 35 | + phy-handle = <ðphy1>; | |
| 36 | 36 | phy-mode = "rgmii"; |
| 37 | 37 | }; |
| 38 | 38 | |
| 39 | +&davinci_mdio { | |
| 40 | + ethphy0: ethernet-phy@0 { | |
| 41 | + reg = <0>; | |
| 42 | + }; | |
| 43 | + | |
| 44 | + ethphy1: ethernet-phy@1 { | |
| 45 | + reg = <1>; | |
| 46 | + }; | |
| 47 | +}; | |
| 48 | + | |
| 39 | 49 | &gpmc { |
| 40 | 50 | ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ |
| 41 | 51 | |
| @@ -512,17 +512,27 @@ · 511 unmodified lines | ||
| 512 | 512 | }; |
| 513 | 513 | |
| 514 | 514 | &cpsw_emac0 { |
| 515 | − phy_id = <&davinci_mdio>, <2>; | |
| 515 | + phy-handle = <ðphy0>; | |
| 516 | 516 | phy-mode = "rgmii"; |
| 517 | 517 | dual_emac_res_vlan = <1>; |
| 518 | 518 | }; |
| 519 | 519 | |
| 520 | 520 | &cpsw_emac1 { |
| 521 | − phy_id = <&davinci_mdio>, <3>; | |
| 521 | + phy-handle = <ðphy1>; | |
| 522 | 522 | phy-mode = "rgmii"; |
| 523 | 523 | dual_emac_res_vlan = <2>; |
| 524 | 524 | }; |
| 525 | 525 | |
| 526 | +&davinci_mdio { | |
| 527 | + ethphy0: ethernet-phy@2 { | |
| 528 | + reg = <2>; | |
| 529 | + }; | |
| 530 | + | |
| 531 | + ethphy1: ethernet-phy@3 { | |
| 532 | + reg = <3>; | |
| 533 | + }; | |
| 534 | +}; | |
| 535 | + | |
| 526 | 536 | &dcan1 { |
| 527 | 537 | status = "ok"; |
| 528 | 538 | pinctrl-names = "default", "sleep", "active"; |
| @@ -336,6 +336,7 @@ · 335 unmodified lines | ||
| 336 | 336 | <0 0 0 2 &pcie1_intc 2>, |
| 337 | 337 | <0 0 0 3 &pcie1_intc 3>, |
| 338 | 338 | <0 0 0 4 &pcie1_intc 4>; |
| 339 | + ti,syscon-unaligned-access = <&scm_conf1 0x14 1>; | |
| 339 | 340 | status = "disabled"; |
| 340 | 341 | pcie1_intc: interrupt-controller { |
| 341 | 342 | interrupt-controller; |
| @@ -354,7 +355,7 @@ · 12 unmodified lines | ||
| 354 | 355 | ti,hwmods = "pcie1"; |
| 355 | 356 | phys = <&pcie1_phy>; |
| 356 | 357 | phy-names = "pcie-phy0"; |
| 357 | − ti,syscon-unaligned-access = <&scm_conf1 0x14 2>; | |
| 358 | + ti,syscon-unaligned-access = <&scm_conf1 0x14 1>; | |
| 358 | 359 | status = "disabled"; |
| 359 | 360 | }; |
| 360 | 361 | }; |
| @@ -387,6 +388,7 @@ · 26 unmodified lines | ||
| 387 | 388 | <0 0 0 2 &pcie2_intc 2>, |
| 388 | 389 | <0 0 0 3 &pcie2_intc 3>, |
| 389 | 390 | <0 0 0 4 &pcie2_intc 4>; |
| 391 | + ti,syscon-unaligned-access = <&scm_conf1 0x14 2>; | |
| 390 | 392 | pcie2_intc: interrupt-controller { |
| 391 | 393 | interrupt-controller; |
| 392 | 394 | #address-cells = <0>; |
| @@ -1369,7 +1371,7 @@ · 976 unmodified lines | ||
| 1369 | 1371 | status = "disabled"; |
| 1370 | 1372 | }; |
| 1371 | 1373 | |
| 1372 | − qspi: qspi@4b300000 { | |
| 1374 | + qspi: spi@4b300000 { | |
| 1373 | 1375 | compatible = "ti,dra7xxx-qspi"; |
| 1374 | 1376 | reg = <0x4b300000 0x100>, |
| 1375 | 1377 | <0x5c000000 0x4000000>; |
| @@ -203,13 +203,13 @@ · 202 unmodified lines | ||
| 203 | 203 | }; |
| 204 | 204 | |
| 205 | 205 | &cpsw_emac0 { |
| 206 | − phy_id = <&davinci_mdio>, <2>; | |
| 206 | + phy-handle = <&dp83867_0>; | |
| 207 | 207 | phy-mode = "rgmii-id"; |
| 208 | 208 | dual_emac_res_vlan = <1>; |
| 209 | 209 | }; |
| 210 | 210 | |
| 211 | 211 | &cpsw_emac1 { |
| 212 | − phy_id = <&davinci_mdio>, <3>; | |
| 212 | + phy-handle = <&dp83867_1>; | |
| 213 | 213 | phy-mode = "rgmii-id"; |
| 214 | 214 | dual_emac_res_vlan = <2>; |
| 215 | 215 | }; |
| @@ -61,13 +61,13 @@ · 60 unmodified lines | ||
| 61 | 61 | }; |
| 62 | 62 | |
| 63 | 63 | &cpsw_emac0 { |
| 64 | − phy_id = <&davinci_mdio>, <2>; | |
| 64 | + phy-handle = <&dp83867_0>; | |
| 65 | 65 | phy-mode = "rgmii-id"; |
| 66 | 66 | dual_emac_res_vlan = <1>; |
| 67 | 67 | }; |
| 68 | 68 | |
| 69 | 69 | &cpsw_emac1 { |
| 70 | − phy_id = <&davinci_mdio>, <3>; | |
| 70 | + phy-handle = <&dp83867_1>; | |
| 71 | 71 | phy-mode = "rgmii-id"; |
| 72 | 72 | dual_emac_res_vlan = <2>; |
| 73 | 73 | }; |
| @@ -51,10 +51,16 @@ · 50 unmodified lines | ||
| 51 | 51 | }; |
| 52 | 52 | |
| 53 | 53 | &cpsw_emac0 { |
| 54 | − phy_id = <&davinci_mdio>, <3>; | |
| 54 | + phy-handle = <ðphy0>; | |
| 55 | 55 | phy-mode = "rgmii"; |
| 56 | 56 | }; |
| 57 | 57 | |
| 58 | +&davinci_mdio { | |
| 59 | + ethphy0: ethernet-phy@3 { | |
| 60 | + reg = <3>; | |
| 61 | + }; | |
| 62 | +}; | |
| 63 | + | |
| 58 | 64 | &mmc1 { |
| 59 | 65 | pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; |
| 60 | 66 | pinctrl-0 = <&mmc1_pins_default>; |
| @@ -375,13 +375,13 @@ · 374 unmodified lines | ||
| 375 | 375 | }; |
| 376 | 376 | |
| 377 | 377 | &cpsw_emac0 { |
| 378 | − phy_id = <&davinci_mdio>, <2>; | |
| 378 | + phy-handle = <&dp83867_0>; | |
| 379 | 379 | phy-mode = "rgmii-id"; |
| 380 | 380 | dual_emac_res_vlan = <1>; |
| 381 | 381 | }; |
| 382 | 382 | |
| 383 | 383 | &cpsw_emac1 { |
| 384 | − phy_id = <&davinci_mdio>, <3>; | |
| 384 | + phy-handle = <&dp83867_1>; | |
| 385 | 385 | phy-mode = "rgmii-id"; |
| 386 | 386 | dual_emac_res_vlan = <2>; |
| 387 | 387 | }; |
| @@ -69,6 +69,8 @@ · 68 unmodified lines | ||
| 69 | 69 | compatible = "samsung,s2mps14-pmic"; |
| 70 | 70 | interrupt-parent = <&gpx3>; |
| 71 | 71 | interrupts = <5 IRQ_TYPE_NONE>; |
| 72 | + pinctrl-names = "default"; | |
| 73 | + pinctrl-0 = <&s2mps14_irq>; | |
| 72 | 74 | reg = <0x66>; |
| 73 | 75 | |
| 74 | 76 | s2mps14_osc: clocks { |
| @@ -350,6 +352,11 @@ · 275 unmodified lines | ||
| 350 | 352 | samsung,pin-drv = <EXYNOS4_PIN_DRV_LV3>; |
| 351 | 353 | samsung,pin-val = <1>; |
| 352 | 354 | }; |
| 355 | + | |
| 356 | + s2mps14_irq: s2mps14-irq { | |
| 357 | + samsung,pins = "gpx3-5"; | |
| 358 | + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; | |
| 359 | + }; | |
| 353 | 360 | }; |
| 354 | 361 | |
| 355 | 362 | &rtc { |
| @@ -151,6 +151,8 @@ · 150 unmodified lines | ||
| 151 | 151 | reg = <0x66>; |
| 152 | 152 | interrupt-parent = <&gpx0>; |
| 153 | 153 | interrupts = <4 IRQ_TYPE_NONE>, <3 IRQ_TYPE_NONE>; |
| 154 | + pinctrl-names = "default"; | |
| 155 | + pinctrl-0 = <&max8997_irq>; | |
| 154 | 156 | |
| 155 | 157 | max8997,pmic-buck1-dvs-voltage = <1350000>; |
| 156 | 158 | max8997,pmic-buck2-dvs-voltage = <1100000>; |
| @@ -288,6 +290,13 @@ · 131 unmodified lines | ||
| 288 | 290 | }; |
| 289 | 291 | }; |
| 290 | 292 | |
| 293 | +&pinctrl_1 { | |
| 294 | + max8997_irq: max8997-irq { | |
| 295 | + samsung,pins = "gpx0-3", "gpx0-4"; | |
| 296 | + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; | |
| 297 | + }; | |
| 298 | +}; | |
| 299 | + | |
| 291 | 300 | &sdhci_0 { |
| 292 | 301 | bus-width = <4>; |
| 293 | 302 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>; |
| @@ -385,6 +385,12 @@ · 384 unmodified lines | ||
| 385 | 385 | regulator-max-microvolt = <1800000>; |
| 386 | 386 | }; |
| 387 | 387 | |
| 388 | + tflash_reg: LDO17 { | |
| 389 | + regulator-name = "VTF_2.8V"; | |
| 390 | + regulator-min-microvolt = <2800000>; | |
| 391 | + regulator-max-microvolt = <2800000>; | |
| 392 | + }; | |
| 393 | + | |
| 388 | 394 | vddq_reg: LDO21 { |
| 389 | 395 | regulator-name = "VDDQ_M1M2_1.2V"; |
| 390 | 396 | regulator-min-microvolt = <1200000>; |
| @@ -452,6 +458,15 @@ · 61 unmodified lines | ||
| 452 | 458 | status = "okay"; |
| 453 | 459 | }; |
| 454 | 460 | |
| 461 | +&sdhci_2 { | |
| 462 | + bus-width = <4>; | |
| 463 | + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; | |
| 464 | + pinctrl-names = "default"; | |
| 465 | + vmmc-supply = <&tflash_reg>; | |
| 466 | + cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; | |
| 467 | + status = "okay"; | |
| 468 | +}; | |
| 469 | + | |
| 455 | 470 | &serial_0 { |
| 456 | 471 | status = "okay"; |
| 457 | 472 | }; |
| @@ -310,6 +310,9 @@ · 309 unmodified lines | ||
| 310 | 310 | |
| 311 | 311 | pmic@66 { |
| 312 | 312 | compatible = "national,lp3974"; |
| 313 | + interrupts-extended = <&gpx0 7 0>, <&gpx2 7 0>; | |
| 314 | + pinctrl-names = "default"; | |
| 315 | + pinctrl-0 = <&lp3974_irq>; | |
| 313 | 316 | reg = <0x66>; |
| 314 | 317 | |
| 315 | 318 | max8998,pmic-buck1-default-dvs-idx = <0>; |
| @@ -503,6 +506,11 @@ · 187 unmodified lines | ||
| 503 | 506 | }; |
| 504 | 507 | |
| 505 | 508 | &pinctrl_1 { |
| 509 | + lp3974_irq: lp3974-irq { | |
| 510 | + samsung,pins = "gpx0-7", "gpx2-7"; | |
| 511 | + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; | |
| 512 | + }; | |
| 513 | + | |
| 506 | 514 | hdmi_hpd: hdmi-hpd { |
| 507 | 515 | samsung,pins = "gpx3-7"; |
| 508 | 516 | samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; |
| @@ -537,8 +545,7 @@ · 28 unmodified lines | ||
| 537 | 545 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>; |
| 538 | 546 | pinctrl-names = "default"; |
| 539 | 547 | vmmc-supply = <&ldo5_reg>; |
| 540 | − cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; | |
| 541 | − cd-inverted; | |
| 548 | + cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; | |
| 542 | 549 | status = "okay"; |
| 543 | 550 | }; |
| 544 | 551 | |
| @@ -1269,8 +1269,7 @@ · 1268 unmodified lines | ||
| 1269 | 1269 | |
| 1270 | 1270 | &sdhci_2 { |
| 1271 | 1271 | bus-width = <4>; |
| 1272 | − cd-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>; | |
| 1273 | − cd-inverted; | |
| 1272 | + cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; | |
| 1274 | 1273 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>; |
| 1275 | 1274 | pinctrl-names = "default"; |
| 1276 | 1275 | vmmc-supply = <&ldo21_reg>; |
| @@ -539,8 +539,7 @@ · 538 unmodified lines | ||
| 539 | 539 | pinctrl-names = "default"; |
| 540 | 540 | vmmc-supply = <&ldo21_reg>; |
| 541 | 541 | vqmmc-supply = <&ldo4_reg>; |
| 542 | − cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>; | |
| 543 | − cd-inverted; | |
| 542 | + cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>; | |
| 544 | 543 | status = "okay"; |
| 545 | 544 | }; |
| 546 | 545 | |
| @@ -71,6 +71,17 @@ · 70 unmodified lines | ||
| 71 | 71 | }; |
| 72 | 72 | }; |
| 73 | 73 | |
| 74 | + panel: panel { | |
| 75 | + compatible = "boe,hv070wsa-100"; | |
| 76 | + power-supply = <&vcc_3v3_reg>; | |
| 77 | + enable-gpios = <&gpd1 3 GPIO_ACTIVE_HIGH>; | |
| 78 | + port { | |
| 79 | + panel_ep: endpoint { | |
| 80 | + remote-endpoint = <&bridge_out_ep>; | |
| 81 | + }; | |
| 82 | + }; | |
| 83 | + }; | |
| 84 | + | |
| 74 | 85 | regulators { |
| 75 | 86 | compatible = "simple-bus"; |
| 76 | 87 | #address-cells = <1>; |
| @@ -97,6 +108,30 @@ · 20 unmodified lines | ||
| 97 | 108 | reg = <2>; |
| 98 | 109 | regulator-name = "hdmi-en"; |
| 99 | 110 | }; |
| 111 | + | |
| 112 | + vcc_1v2_reg: regulator@3 { | |
| 113 | + compatible = "regulator-fixed"; | |
| 114 | + reg = <3>; | |
| 115 | + regulator-name = "VCC_1V2"; | |
| 116 | + regulator-min-microvolt = <1200000>; | |
| 117 | + regulator-max-microvolt = <1200000>; | |
| 118 | + }; | |
| 119 | + | |
| 120 | + vcc_1v8_reg: regulator@4 { | |
| 121 | + compatible = "regulator-fixed"; | |
| 122 | + reg = <4>; | |
| 123 | + regulator-name = "VCC_1V8"; | |
| 124 | + regulator-min-microvolt = <1800000>; | |
| 125 | + regulator-max-microvolt = <1800000>; | |
| 126 | + }; | |
| 127 | + | |
| 128 | + vcc_3v3_reg: regulator@5 { | |
| 129 | + compatible = "regulator-fixed"; | |
| 130 | + reg = <5>; | |
| 131 | + regulator-name = "VCC_3V3"; | |
| 132 | + regulator-min-microvolt = <3300000>; | |
| 133 | + regulator-max-microvolt = <3300000>; | |
| 134 | + }; | |
| 100 | 135 | }; |
| 101 | 136 | |
| 102 | 137 | fixed-rate-clocks { |
| @@ -119,6 +154,32 @@ · 16 unmodified lines | ||
| 119 | 154 | cpu0-supply = <&buck2_reg>; |
| 120 | 155 | }; |
| 121 | 156 | |
| 157 | +&dsi_0 { | |
| 158 | + vddcore-supply = <&ldo8_reg>; | |
| 159 | + vddio-supply = <&ldo10_reg>; | |
| 160 | + samsung,pll-clock-frequency = <24000000>; | |
| 161 | + samsung,burst-clock-frequency = <320000000>; | |
| 162 | + samsung,esc-clock-frequency = <10000000>; | |
| 163 | + status = "okay"; | |
| 164 | + | |
| 165 | + bridge@0 { | |
| 166 | + reg = <0>; | |
| 167 | + compatible = "toshiba,tc358764"; | |
| 168 | + vddc-supply = <&vcc_1v2_reg>; | |
| 169 | + vddio-supply = <&vcc_1v8_reg>; | |
| 170 | + vddlvds-supply = <&vcc_3v3_reg>; | |
| 171 | + reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>; | |
| 172 | + #address-cells = <1>; | |
| 173 | + #size-cells = <0>; | |
| 174 | + port@1 { | |
| 175 | + reg = <1>; | |
| 176 | + bridge_out_ep: endpoint { | |
| 177 | + remote-endpoint = <&panel_ep>; | |
| 178 | + }; | |
| 179 | + }; | |
| 180 | + }; | |
| 181 | +}; | |
| 182 | + | |
| 122 | 183 | &dp { |
| 123 | 184 | status = "okay"; |
| 124 | 185 | samsung,color-space = <0>; |
| @@ -149,9 +210,11 @@ · 24 unmodified lines | ||
| 149 | 210 | }; |
| 150 | 211 | |
| 151 | 212 | &hdmi { |
| 213 | + pinctrl-names = "default"; | |
| 214 | + pinctrl-0 = <&hdmi_hpd>; | |
| 152 | 215 | status = "okay"; |
| 153 | − ddc = <&i2c_2>; | |
| 154 | − hpd-gpios = <&gpx3 7 GPIO_ACTIVE_LOW>; | |
| 216 | + ddc = <&i2c_ddc>; | |
| 217 | + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; | |
| 155 | 218 | vdd_osc-supply = <&ldo10_reg>; |
| 156 | 219 | vdd_pll-supply = <&ldo8_reg>; |
| 157 | 220 | vdd-supply = <&ldo8_reg>; |
| @@ -168,6 +231,8 @@ · 10 unmodified lines | ||
| 168 | 231 | reg = <0x66>; |
| 169 | 232 | interrupt-parent = <&gpx3>; |
| 170 | 233 | interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
| 234 | + pinctrl-names = "default"; | |
| 235 | + pinctrl-0 = <&s5m8767_irq>; | |
| 171 | 236 | |
| 172 | 237 | vinb1-supply = <&main_dc_reg>; |
| 173 | 238 | vinb2-supply = <&main_dc_reg>; |
| @@ -452,13 +517,6 @@ · 278 unmodified lines | ||
| 452 | 517 | }; |
| 453 | 518 | }; |
| 454 | 519 | |
| 455 | −&i2c_2 { | |
| 456 | − status = "okay"; | |
| 457 | − /* used by HDMI DDC */ | |
| 458 | − samsung,i2c-sda-delay = <100>; | |
| 459 | − samsung,i2c-max-bus-freq = <66000>; | |
| 460 | −}; | |
| 461 | − | |
| 462 | 520 | &i2c_3 { |
| 463 | 521 | status = "okay"; |
| 464 | 522 | |
| @@ -535,6 +593,13 @@ · 70 unmodified lines | ||
| 535 | 593 | cap-sd-highspeed; |
| 536 | 594 | }; |
| 537 | 595 | |
| 596 | +&pinctrl_0 { | |
| 597 | + s5m8767_irq: s5m8767-irq { | |
| 598 | + samsung,pins = "gpx3-2"; | |
| 599 | + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; | |
| 600 | + }; | |
| 601 | +}; | |
| 602 | + | |
| 538 | 603 | &rtc { |
| 539 | 604 | status = "okay"; |
| 540 | 605 | }; |
| @@ -547,3 +612,22 @@ · 6 unmodified lines | ||
| 547 | 612 | status = "okay"; |
| 548 | 613 | samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>; |
| 549 | 614 | }; |
| 615 | + | |
| 616 | +&soc { | |
| 617 | + /* | |
| 618 | + * For unknown reasons HDMI-DDC does not work with Exynos I2C | |
| 619 | + * controllers. Lets use software I2C over GPIO pins as a workaround. | |
| 620 | + */ | |
| 621 | + i2c_ddc: i2c-gpio { | |
| 622 | + pinctrl-names = "default"; | |
| 623 | + pinctrl-0 = <&i2c2_gpio_bus>; | |
| 624 | + status = "okay"; | |
| 625 | + compatible = "i2c-gpio"; | |
| 626 | + gpios = <&gpa0 6 0 /* sda */ | |
| 627 | + &gpa0 7 0 /* scl */ | |
| 628 | + >; | |
| 629 | + i2c-gpio,delay-us = <2>; | |
| 630 | + #address-cells = <1>; | |
| 631 | + #size-cells = <0>; | |
| 632 | + }; | |
| 633 | +}; | |
| @@ -225,6 +225,12 @@ · 224 unmodified lines | ||
| 225 | 225 | samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; |
| 226 | 226 | }; |
| 227 | 227 | |
| 228 | + i2c2_gpio_bus: i2c2-gpio-bus { | |
| 229 | + samsung,pins = "gpa0-6", "gpa0-7"; | |
| 230 | + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; | |
| 231 | + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; | |
| 232 | + }; | |
| 233 | + | |
| 228 | 234 | uart2_data: uart2-data { |
| 229 | 235 | samsung,pins = "gpa1-0", "gpa1-1"; |
| 230 | 236 | samsung,pin-function = <EXYNOS_PIN_FUNC_2>; |
| @@ -593,6 +599,11 @@ · 362 unmodified lines | ||
| 593 | 599 | samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; |
| 594 | 600 | samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; |
| 595 | 601 | }; |
| 602 | + | |
| 603 | + hdmi_hpd: hdmi-hpd { | |
| 604 | + samsung,pins = "gpx3-7"; | |
| 605 | + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; | |
| 606 | + }; | |
| 596 | 607 | }; |
| 597 | 608 | |
| 598 | 609 | &pinctrl_1 { |
| @@ -20,6 +20,14 @@ · 19 unmodified lines | ||
| 20 | 20 | |
| 21 | 21 | samsung,model = "Snow-I2S-MAX98090"; |
| 22 | 22 | samsung,audio-codec = <&max98090>; |
| 23 | + | |
| 24 | + cpu { | |
| 25 | + sound-dai = <&i2s0 0>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + codec { | |
| 29 | + sound-dai = <&max98090 0>, <&hdmi>; | |
| 30 | + }; | |
| 23 | 31 | }; |
| 24 | 32 | }; |
| 25 | 33 | |
| @@ -31,6 +39,9 @@ · 5 unmodified lines | ||
| 31 | 39 | interrupt-parent = <&gpx0>; |
| 32 | 40 | pinctrl-names = "default"; |
| 33 | 41 | pinctrl-0 = <&max98090_irq>; |
| 42 | + clocks = <&pmu_system_controller 0>; | |
| 43 | + clock-names = "mclk"; | |
| 44 | + #sound-dai-cells = <1>; | |
| 34 | 45 | }; |
| 35 | 46 | }; |
| 36 | 47 | |
| @@ -54,62 +54,109 @@ · 53 unmodified lines | ||
| 54 | 54 | device_type = "cpu"; |
| 55 | 55 | compatible = "arm,cortex-a15"; |
| 56 | 56 | reg = <0>; |
| 57 | − clock-frequency = <1700000000>; | |
| 58 | 57 | clocks = <&clock CLK_ARM_CLK>; |
| 59 | 58 | clock-names = "cpu"; |
| 60 | − clock-latency = <140000>; | |
| 61 | − | |
| 62 | − operating-points = < | |
| 63 | − 1700000 1300000 | |
| 64 | − 1600000 1250000 | |
| 65 | − 1500000 1225000 | |
| 66 | − 1400000 1200000 | |
| 67 | − 1300000 1150000 | |
| 68 | − 1200000 1125000 | |
| 69 | − 1100000 1100000 | |
| 70 | − 1000000 1075000 | |
| 71 | − 900000 1050000 | |
| 72 | − 800000 1025000 | |
| 73 | − 700000 1012500 | |
| 74 | − 600000 1000000 | |
| 75 | − 500000 975000 | |
| 76 | − 400000 950000 | |
| 77 | − 300000 937500 | |
| 78 | − 200000 925000 | |
| 79 | − >; | |
| 59 | + operating-points-v2 = <&cpu0_opp_table>; | |
| 80 | 60 | #cooling-cells = <2>; /* min followed by max */ |
| 81 | 61 | }; |
| 82 | 62 | cpu@1 { |
| 83 | 63 | device_type = "cpu"; |
| 84 | 64 | compatible = "arm,cortex-a15"; |
| 85 | 65 | reg = <1>; |
| 86 | − clock-frequency = <1700000000>; | |
| 87 | 66 | clocks = <&clock CLK_ARM_CLK>; |
| 88 | 67 | clock-names = "cpu"; |
| 89 | − clock-latency = <140000>; | |
| 90 | − | |
| 91 | − operating-points = < | |
| 92 | − 1700000 1300000 | |
| 93 | − 1600000 1250000 | |
| 94 | − 1500000 1225000 | |
| 95 | − 1400000 1200000 | |
| 96 | − 1300000 1150000 | |
| 97 | − 1200000 1125000 | |
| 98 | − 1100000 1100000 | |
| 99 | − 1000000 1075000 | |
| 100 | − 900000 1050000 | |
| 101 | − 800000 1025000 | |
| 102 | − 700000 1012500 | |
| 103 | − 600000 1000000 | |
| 104 | − 500000 975000 | |
| 105 | − 400000 950000 | |
| 106 | − 300000 937500 | |
| 107 | − 200000 925000 | |
| 108 | − >; | |
| 68 | + operating-points-v2 = <&cpu0_opp_table>; | |
| 109 | 69 | #cooling-cells = <2>; /* min followed by max */ |
| 110 | 70 | }; |
| 111 | 71 | }; |
| 112 | 72 | |
| 73 | + cpu0_opp_table: opp_table0 { | |
| 74 | + compatible = "operating-points-v2"; | |
| 75 | + opp-shared; | |
| 76 | + | |
| 77 | + opp-200000000 { | |
| 78 | + opp-hz = /bits/ 64 <200000000>; | |
| 79 | + opp-microvolt = <925000>; | |
| 80 | + clock-latency-ns = <140000>; | |
| 81 | + }; | |
| 82 | + opp-300000000 { | |
| 83 | + opp-hz = /bits/ 64 <300000000>; | |
| 84 | + opp-microvolt = <937500>; | |
| 85 | + clock-latency-ns = <140000>; | |
| 86 | + }; | |
| 87 | + opp-400000000 { | |
| 88 | + opp-hz = /bits/ 64 <400000000>; | |
| 89 | + opp-microvolt = <950000>; | |
| 90 | + clock-latency-ns = <140000>; | |
| 91 | + }; | |
| 92 | + opp-500000000 { | |
| 93 | + opp-hz = /bits/ 64 <500000000>; | |
| 94 | + opp-microvolt = <975000>; | |
| 95 | + clock-latency-ns = <140000>; | |
| 96 | + }; | |
| 97 | + opp-600000000 { | |
| 98 | + opp-hz = /bits/ 64 <600000000>; | |
| 99 | + opp-microvolt = <1000000>; | |
| 100 | + clock-latency-ns = <140000>; | |
| 101 | + }; | |
| 102 | + opp-700000000 { | |
| 103 | + opp-hz = /bits/ 64 <700000000>; | |
| 104 | + opp-microvolt = <1012500>; | |
| 105 | + clock-latency-ns = <140000>; | |
| 106 | + }; | |
| 107 | + opp-800000000 { | |
| 108 | + opp-hz = /bits/ 64 <800000000>; | |
| 109 | + opp-microvolt = <1025000>; | |
| 110 | + clock-latency-ns = <140000>; | |
| 111 | + }; | |
| 112 | + opp-900000000 { | |
| 113 | + opp-hz = /bits/ 64 <900000000>; | |
| 114 | + opp-microvolt = <1050000>; | |
| 115 | + clock-latency-ns = <140000>; | |
| 116 | + }; | |
| 117 | + opp-1000000000 { | |
| 118 | + opp-hz = /bits/ 64 <1000000000>; | |
| 119 | + opp-microvolt = <1075000>; | |
| 120 | + clock-latency-ns = <140000>; | |
| 121 | + opp-suspend; | |
| 122 | + }; | |
| 123 | + opp-1100000000 { | |
| 124 | + opp-hz = /bits/ 64 <1100000000>; | |
| 125 | + opp-microvolt = <1100000>; | |
| 126 | + clock-latency-ns = <140000>; | |
| 127 | + }; | |
| 128 | + opp-1200000000 { | |
| 129 | + opp-hz = /bits/ 64 <1200000000>; | |
| 130 | + opp-microvolt = <1125000>; | |
| 131 | + clock-latency-ns = <140000>; | |
| 132 | + }; | |
| 133 | + opp-1300000000 { | |
| 134 | + opp-hz = /bits/ 64 <1300000000>; | |
| 135 | + opp-microvolt = <1150000>; | |
| 136 | + clock-latency-ns = <140000>; | |
| 137 | + }; | |
| 138 | + opp-1400000000 { | |
| 139 | + opp-hz = /bits/ 64 <1400000000>; | |
| 140 | + opp-microvolt = <1200000>; | |
| 141 | + clock-latency-ns = <140000>; | |
| 142 | + }; | |
| 143 | + opp-1500000000 { | |
| 144 | + opp-hz = /bits/ 64 <1500000000>; | |
| 145 | + opp-microvolt = <1225000>; | |
| 146 | + clock-latency-ns = <140000>; | |
| 147 | + }; | |
| 148 | + opp-1600000000 { | |
| 149 | + opp-hz = /bits/ 64 <1600000000>; | |
| 150 | + opp-microvolt = <1250000>; | |
| 151 | + clock-latency-ns = <140000>; | |
| 152 | + }; | |
| 153 | + opp-1700000000 { | |
| 154 | + opp-hz = /bits/ 64 <1700000000>; | |
| 155 | + opp-microvolt = <1300000>; | |
| 156 | + clock-latency-ns = <140000>; | |
| 157 | + }; | |
| 158 | + }; | |
| 159 | + | |
| 113 | 160 | soc: soc { |
| 114 | 161 | sysram@2020000 { |
| 115 | 162 | compatible = "mmio-sram"; |
| @@ -756,6 +803,27 @@ · 640 unmodified lines | ||
| 756 | 803 | #phy-cells = <0>; |
| 757 | 804 | }; |
| 758 | 805 | |
| 806 | + mipi_phy: video-phy@10040710 { | |
| 807 | + compatible = "samsung,s5pv210-mipi-video-phy"; | |
| 808 | + reg = <0x10040710 0x100>; | |
| 809 | + #phy-cells = <1>; | |
| 810 | + syscon = <&pmu_system_controller>; | |
| 811 | + }; | |
| 812 | + | |
| 813 | + dsi_0: dsi@14500000 { | |
| 814 | + compatible = "samsung,exynos4210-mipi-dsi"; | |
| 815 | + reg = <0x14500000 0x10000>; | |
| 816 | + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; | |
| 817 | + samsung,power-domain = <&pd_disp1>; | |
| 818 | + phys = <&mipi_phy 3>; | |
| 819 | + phy-names = "dsim"; | |
| 820 | + clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI1>; | |
| 821 | + clock-names = "bus_clk", "sclk_mipi"; | |
| 822 | + status = "disabled"; | |
| 823 | + #address-cells = <1>; | |
| 824 | + #size-cells = <0>; | |
| 825 | + }; | |
| 826 | + | |
| 759 | 827 | adc: adc@12d10000 { |
| 760 | 828 | compatible = "samsung,exynos-adc-v1"; |
| 761 | 829 | reg = <0x12D10000 0x100>; |
| @@ -530,7 +530,7 @@ · 529 unmodified lines | ||
| 530 | 530 | samsung,dw-mshc-sdr-timing = <0 4>; |
| 531 | 531 | samsung,dw-mshc-ddr-timing = <0 2>; |
| 532 | 532 | pinctrl-names = "default"; |
| 533 | − pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; | |
| 533 | + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4 &sd2_wp>; | |
| 534 | 534 | bus-width = <4>; |
| 535 | 535 | cap-sd-highspeed; |
| 536 | 536 | vmmc-supply = <&ldo21_reg>; |
| @@ -545,6 +545,14 @@ · 8 unmodified lines | ||
| 545 | 545 | samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; |
| 546 | 546 | }; |
| 547 | 547 | |
| 548 | + sd2_wp: sd2-wp { | |
| 549 | + samsung,pins = "gpm5-0"; | |
| 550 | + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; | |
| 551 | + /* Pin is floating so be sure to disable write-protect */ | |
| 552 | + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; | |
| 553 | + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; | |
| 554 | + }; | |
| 555 | + | |
| 548 | 556 | pmic_dvs_3: pmic-dvs-3 { |
| 549 | 557 | samsung,pins = "gpx0-0"; |
| 550 | 558 | samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; |
| @@ -153,7 +153,7 @@ · 152 unmodified lines | ||
| 153 | 153 | |
| 154 | 154 | &clock_audss { |
| 155 | 155 | assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; |
| 156 | − assigned-clock-parents = <&clock CLK_FOUT_EPLL>; | |
| 156 | + assigned-clock-parents = <&clock CLK_MAU_EPLL>; | |
| 157 | 157 | }; |
| 158 | 158 | |
| 159 | 159 | &cpu0 { |
| @@ -312,6 +312,7 @@ · 152 unmodified lines | ||
| 312 | 312 | regulator-name = "vdd_1v35"; |
| 313 | 313 | regulator-min-microvolt = <1350000>; |
| 314 | 314 | regulator-max-microvolt = <1350000>; |
| 315 | + regulator-always-on; | |
| 315 | 316 | regulator-boot-on; |
| 316 | 317 | regulator-state-mem { |
| 317 | 318 | regulator-on-in-suspend; |
| @@ -333,6 +334,7 @@ · 15 unmodified lines | ||
| 333 | 334 | regulator-name = "vdd_2v"; |
| 334 | 335 | regulator-min-microvolt = <2000000>; |
| 335 | 336 | regulator-max-microvolt = <2000000>; |
| 337 | + regulator-always-on; | |
| 336 | 338 | regulator-boot-on; |
| 337 | 339 | regulator-state-mem { |
| 338 | 340 | regulator-on-in-suspend; |
| @@ -343,6 +345,7 @@ · 4 unmodified lines | ||
| 343 | 345 | regulator-name = "vdd_1v8"; |
| 344 | 346 | regulator-min-microvolt = <1800000>; |
| 345 | 347 | regulator-max-microvolt = <1800000>; |
| 348 | + regulator-always-on; | |
| 346 | 349 | regulator-boot-on; |
| 347 | 350 | regulator-state-mem { |
| 348 | 351 | regulator-on-in-suspend; |
| @@ -154,6 +154,13 @@ · 153 unmodified lines | ||
| 154 | 154 | regulator-always-on; |
| 155 | 155 | }; |
| 156 | 156 | |
| 157 | + ldo2_reg: LDO2 { | |
| 158 | + regulator-name = "vdd_ldo2"; | |
| 159 | + regulator-min-microvolt = <1800000>; | |
| 160 | + regulator-max-microvolt = <1800000>; | |
| 161 | + regulator-always-on; | |
| 162 | + }; | |
| 163 | + | |
| 157 | 164 | ldo3_reg: LDO3 { |
| 158 | 165 | regulator-name = "vddq_mmc0"; |
| 159 | 166 | regulator-min-microvolt = <1800000>; |
| @@ -216,10 +223,10 @@ · 56 unmodified lines | ||
| 216 | 223 | }; |
| 217 | 224 | |
| 218 | 225 | ldo12_reg: LDO12 { |
| 226 | + /* Unused */ | |
| 219 | 227 | regulator-name = "vdd_ldo12"; |
| 220 | − regulator-min-microvolt = <1800000>; | |
| 221 | − regulator-max-microvolt = <1800000>; | |
| 222 | − regulator-always-on; | |
| 228 | + regulator-min-microvolt = <800000>; | |
| 229 | + regulator-max-microvolt = <2375000>; | |
| 223 | 230 | }; |
| 224 | 231 | |
| 225 | 232 | ldo13_reg: LDO13 { |
| @@ -228,6 +235,13 @@ · 2 unmodified lines | ||
| 228 | 235 | regulator-max-microvolt = <2800000>; |
| 229 | 236 | }; |
| 230 | 237 | |
| 238 | + ldo14_reg: LDO14 { | |
| 239 | + /* Unused */ | |
| 240 | + regulator-name = "vdd_ldo14"; | |
| 241 | + regulator-min-microvolt = <800000>; | |
| 242 | + regulator-max-microvolt = <3950000>; | |
| 243 | + }; | |
| 244 | + | |
| 231 | 245 | ldo15_reg: LDO15 { |
| 232 | 246 | regulator-name = "vdd_ldo15"; |
| 233 | 247 | regulator-min-microvolt = <3300000>; |
| @@ -236,10 +250,10 @@ · 2 unmodified lines | ||
| 236 | 250 | }; |
| 237 | 251 | |
| 238 | 252 | ldo16_reg: LDO16 { |
| 253 | + /* Unused */ | |
| 239 | 254 | regulator-name = "vdd_ldo16"; |
| 240 | − regulator-min-microvolt = <2200000>; | |
| 241 | − regulator-max-microvolt = <2200000>; | |
| 242 | − regulator-always-on; | |
| 255 | + regulator-min-microvolt = <800000>; | |
| 256 | + regulator-max-microvolt = <3950000>; | |
| 243 | 257 | }; |
| 244 | 258 | |
| 245 | 259 | ldo17_reg: LDO17 { |
| @@ -261,20 +275,139 @@ · 15 unmodified lines | ||
| 261 | 275 | regulator-max-microvolt = <2800000>; |
| 262 | 276 | }; |
| 263 | 277 | |
| 264 | − ldo24_reg: LDO24 { | |
| 265 | − regulator-name = "tsp_io"; | |
| 266 | − regulator-min-microvolt = <2800000>; | |
| 267 | − regulator-max-microvolt = <2800000>; | |
| 278 | + ldo20_reg: LDO20 { | |
| 279 | + /* Unused */ | |
| 280 | + regulator-name = "vdd_ldo20"; | |
| 281 | + regulator-min-microvolt = <800000>; | |
| 282 | + regulator-max-microvolt = <3950000>; | |
| 283 | + }; | |
| 284 | + | |
| 285 | + ldo21_reg: LDO21 { | |
| 286 | + /* Unused */ | |
| 287 | + regulator-name = "vdd_ldo21"; | |
| 288 | + regulator-min-microvolt = <800000>; | |
| 289 | + regulator-max-microvolt = <3950000>; | |
| 290 | + }; | |
| 291 | + | |
| 292 | + ldo22_reg: LDO22 { | |
| 293 | + /* Unused */ | |
| 294 | + regulator-name = "vdd_ldo22"; | |
| 295 | + regulator-min-microvolt = <800000>; | |
| 296 | + regulator-max-microvolt = <2375000>; | |
| 297 | + }; | |
| 298 | + | |
| 299 | + ldo23_reg: LDO23 { | |
| 300 | + regulator-name = "vdd_mifs"; | |
| 301 | + regulator-min-microvolt = <1100000>; | |
| 302 | + regulator-max-microvolt = <1100000>; | |
| 268 | 303 | regulator-always-on; |
| 269 | 304 | }; |
| 270 | 305 | |
| 306 | + ldo24_reg: LDO24 { | |
| 307 | + /* Unused */ | |
| 308 | + regulator-name = "vdd_ldo24"; | |
| 309 | + regulator-min-microvolt = <800000>; | |
| 310 | + regulator-max-microvolt = <3950000>; | |
| 311 | + }; | |
| 312 | + | |
| 313 | + ldo25_reg: LDO25 { | |
| 314 | + /* Unused */ | |
| 315 | + regulator-name = "vdd_ldo25"; | |
| 316 | + regulator-min-microvolt = <800000>; | |
| 317 | + regulator-max-microvolt = <3950000>; | |
| 318 | + }; | |
| 319 | + | |
| 271 | 320 | ldo26_reg: LDO26 { |
| 321 | + /* Used on XU3, XU3-Lite and XU4 */ | |
| 272 | 322 | regulator-name = "vdd_ldo26"; |
| 273 | − regulator-min-microvolt = <3000000>; | |
| 274 | − regulator-max-microvolt = <3000000>; | |
| 323 | + regulator-min-microvolt = <800000>; | |
| 324 | + regulator-max-microvolt = <3950000>; | |
| 325 | + }; | |
| 326 | + | |
| 327 | + ldo27_reg: LDO27 { | |
| 328 | + regulator-name = "vdd_g3ds"; | |
| 329 | + regulator-min-microvolt = <1000000>; | |
| 330 | + regulator-max-microvolt = <1000000>; | |
| 275 | 331 | regulator-always-on; |
| 276 | 332 | }; |
| 277 | 333 | |
| 334 | + ldo28_reg: LDO28 { | |
| 335 | + /* Used on XU3 */ | |
| 336 | + regulator-name = "vdd_ldo28"; | |
| 337 | + regulator-min-microvolt = <800000>; | |
| 338 | + regulator-max-microvolt = <3950000>; | |
| 339 | + }; | |
| 340 | + | |
| 341 | + ldo29_reg: LDO29 { | |
| 342 | + /* Unused */ | |
| 343 | + regulator-name = "vdd_ldo29"; | |
| 344 | + regulator-min-microvolt = <800000>; | |
| 345 | + regulator-max-microvolt = <3950000>; | |
| 346 | + }; | |
| 347 | + | |
| 348 | + ldo30_reg: LDO30 { | |
| 349 | + /* Unused */ | |
| 350 | + regulator-name = "vdd_ldo30"; | |
| 351 | + regulator-min-microvolt = <800000>; | |
| 352 | + regulator-max-microvolt = <3950000>; | |
| 353 | + }; | |
| 354 | + | |
| 355 | + ldo31_reg: LDO31 { | |
| 356 | + /* Unused */ | |
| 357 | + regulator-name = "vdd_ldo31"; | |
| 358 | + regulator-min-microvolt = <800000>; | |
| 359 | + regulator-max-microvolt = <3950000>; | |
| 360 | + }; | |
| 361 | + | |
| 362 | + ldo32_reg: LDO32 { | |
| 363 | + /* Unused */ | |
| 364 | + regulator-name = "vdd_ldo32"; | |
| 365 | + regulator-min-microvolt = <800000>; | |
| 366 | + regulator-max-microvolt = <3950000>; | |
| 367 | + }; | |
| 368 | + | |
| 369 | + ldo33_reg: LDO33 { | |
| 370 | + /* Unused */ | |
| 371 | + regulator-name = "vdd_ldo33"; | |
| 372 | + regulator-min-microvolt = <800000>; | |
| 373 | + regulator-max-microvolt = <3950000>; | |
| 374 | + }; | |
| 375 | + | |
| 376 | + ldo34_reg: LDO34 { | |
| 377 | + /* Unused */ | |
| 378 | + regulator-name = "vdd_ldo34"; | |
| 379 | + regulator-min-microvolt = <800000>; | |
| 380 | + regulator-max-microvolt = <3950000>; | |
| 381 | + }; | |
| 382 | + | |
| 383 | + ldo35_reg: LDO35 { | |
| 384 | + /* Unused */ | |
| 385 | + regulator-name = "vdd_ldo35"; | |
| 386 | + regulator-min-microvolt = <800000>; | |
| 387 | + regulator-max-microvolt = <2375000>; | |
| 388 | + }; | |
| 389 | + | |
| 390 | + ldo36_reg: LDO36 { | |
| 391 | + /* Unused */ | |
| 392 | + regulator-name = "vdd_ldo36"; | |
| 393 | + regulator-min-microvolt = <800000>; | |
| 394 | + regulator-max-microvolt = <3950000>; | |
| 395 | + }; | |
| 396 | + | |
| 397 | + ldo37_reg: LDO37 { | |
| 398 | + /* Unused */ | |
| 399 | + regulator-name = "vdd_ldo37"; | |
| 400 | + regulator-min-microvolt = <800000>; | |
| 401 | + regulator-max-microvolt = <3950000>; | |
| 402 | + }; | |
| 403 | + | |
| 404 | + ldo38_reg: LDO38 { | |
| 405 | + /* Unused */ | |
| 406 | + regulator-name = "vdd_ldo38"; | |
| 407 | + regulator-min-microvolt = <800000>; | |
| 408 | + regulator-max-microvolt = <3950000>; | |
| 409 | + }; | |
| 410 | + | |
| 278 | 411 | buck1_reg: BUCK1 { |
| 279 | 412 | regulator-name = "vdd_mif"; |
| 280 | 413 | regulator-min-microvolt = <800000>; |
| @@ -367,6 +367,12 @@ · 366 unmodified lines | ||
| 367 | 367 | status = "okay"; |
| 368 | 368 | }; |
| 369 | 369 | |
| 370 | +&ldo26_reg { | |
| 371 | + regulator-min-microvolt = <3000000>; | |
| 372 | + regulator-max-microvolt = <3000000>; | |
| 373 | + regulator-always-on; | |
| 374 | +}; | |
| 375 | + | |
| 370 | 376 | &mixer { |
| 371 | 377 | status = "okay"; |
| 372 | 378 | }; |
| @@ -49,6 +49,12 @@ · 48 unmodified lines | ||
| 49 | 49 | }; |
| 50 | 50 | }; |
| 51 | 51 | |
| 52 | +&ldo28_reg { | |
| 53 | + regulator-name = "dp_p3v3"; | |
| 54 | + regulator-min-microvolt = <3300000>; | |
| 55 | + regulator-max-microvolt = <3300000>; | |
| 56 | +}; | |
| 57 | + | |
| 52 | 58 | &pwm { |
| 53 | 59 | /* |
| 54 | 60 | * PWM 0 -- fan |
| @@ -153,7 +153,7 @@ · 152 unmodified lines | ||
| 153 | 153 | |
| 154 | 154 | &clock_audss { |
| 155 | 155 | assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; |
| 156 | − assigned-clock-parents = <&clock CLK_FOUT_EPLL>; | |
| 156 | + assigned-clock-parents = <&clock CLK_MAU_EPLL>; | |
| 157 | 157 | }; |
| 158 | 158 | |
| 159 | 159 | &cpu0 { |
| @@ -312,6 +312,7 @@ · 152 unmodified lines | ||
| 312 | 312 | regulator-name = "vdd_1v35"; |
| 313 | 313 | regulator-min-microvolt = <1350000>; |
| 314 | 314 | regulator-max-microvolt = <1350000>; |
| 315 | + regulator-always-on; | |
| 315 | 316 | regulator-boot-on; |
| 316 | 317 | regulator-state-mem { |
| 317 | 318 | regulator-on-in-suspend; |
| @@ -333,6 +334,7 @@ · 15 unmodified lines | ||
| 333 | 334 | regulator-name = "vdd_2v"; |
| 334 | 335 | regulator-min-microvolt = <2000000>; |
| 335 | 336 | regulator-max-microvolt = <2000000>; |
| 337 | + regulator-always-on; | |
| 336 | 338 | regulator-boot-on; |
| 337 | 339 | regulator-state-mem { |
| 338 | 340 | regulator-on-in-suspend; |
| @@ -343,6 +345,7 @@ · 4 unmodified lines | ||
| 343 | 345 | regulator-name = "vdd_1v8"; |
| 344 | 346 | regulator-min-microvolt = <1800000>; |
| 345 | 347 | regulator-max-microvolt = <1800000>; |
| 348 | + regulator-always-on; | |
| 346 | 349 | regulator-boot-on; |
| 347 | 350 | regulator-state-mem { |
| 348 | 351 | regulator-on-in-suspend; |
| @@ -69,10 +69,6 @@ · 68 unmodified lines | ||
| 69 | 69 | |
| 70 | 70 | port { |
| 71 | 71 | ceu_in: endpoint { |
| 72 | − hsync-active = <1>; | |
| 73 | − vsync-active = <1>; | |
| 74 | − bus-width = <8>; | |
| 75 | − pclk-sample = <1>; | |
| 76 | 72 | remote-endpoint = <&mt9v111_out>; |
| 77 | 73 | }; |
| 78 | 74 | }; |
| @@ -277,10 +277,11 @@ · 276 unmodified lines | ||
| 277 | 277 | |
| 278 | 278 | clocks = <&clk_375m>; |
| 279 | 279 | clock-names = "apb_pclk"; |
| 280 | − port { | |
| 281 | − etb0_in_port: endpoint@0 { | |
| 282 | − slave-mode; | |
| 283 | − remote-endpoint = <&replicator0_out_port0>; | |
| 280 | + in-ports { | |
| 281 | + port { | |
| 282 | + etb0_in_port: endpoint@0 { | |
| 283 | + remote-endpoint = <&replicator0_out_port0>; | |
| 284 | + }; | |
| 284 | 285 | }; |
| 285 | 286 | }; |
| 286 | 287 | }; |
| @@ -291,10 +292,11 @@ · 4 unmodified lines | ||
| 291 | 292 | |
| 292 | 293 | clocks = <&clk_375m>; |
| 293 | 294 | clock-names = "apb_pclk"; |
| 294 | − port { | |
| 295 | − etb1_in_port: endpoint@0 { | |
| 296 | − slave-mode; | |
| 297 | − remote-endpoint = <&replicator1_out_port0>; | |
| 295 | + in-ports { | |
| 296 | + port { | |
| 297 | + etb1_in_port: endpoint@0 { | |
| 298 | + remote-endpoint = <&replicator1_out_port0>; | |
| 299 | + }; | |
| 298 | 300 | }; |
| 299 | 301 | }; |
| 300 | 302 | }; |
| @@ -305,10 +307,11 @@ · 4 unmodified lines | ||
| 305 | 307 | |
| 306 | 308 | clocks = <&clk_375m>; |
| 307 | 309 | clock-names = "apb_pclk"; |
| 308 | − port { | |
| 309 | − etb2_in_port: endpoint@0 { | |
| 310 | − slave-mode; | |
| 311 | − remote-endpoint = <&replicator2_out_port0>; | |
| 310 | + in-ports { | |
| 311 | + port { | |
| 312 | + etb2_in_port: endpoint@0 { | |
| 313 | + remote-endpoint = <&replicator2_out_port0>; | |
| 314 | + }; | |
| 312 | 315 | }; |
| 313 | 316 | }; |
| 314 | 317 | }; |
| @@ -319,10 +322,11 @@ · 4 unmodified lines | ||
| 319 | 322 | |
| 320 | 323 | clocks = <&clk_375m>; |
| 321 | 324 | clock-names = "apb_pclk"; |
| 322 | − port { | |
| 323 | − etb3_in_port: endpoint@0 { | |
| 324 | − slave-mode; | |
| 325 | − remote-endpoint = <&replicator3_out_port0>; | |
| 325 | + in-ports { | |
| 326 | + port { | |
| 327 | + etb3_in_port: endpoint@0 { | |
| 328 | + remote-endpoint = <&replicator3_out_port0>; | |
| 329 | + }; | |
| 326 | 330 | }; |
| 327 | 331 | }; |
| 328 | 332 | }; |
| @@ -333,10 +337,11 @@ · 4 unmodified lines | ||
| 333 | 337 | |
| 334 | 338 | clocks = <&clk_375m>; |
| 335 | 339 | clock-names = "apb_pclk"; |
| 336 | − port { | |
| 337 | − tpiu_in_port: endpoint@0 { | |
| 338 | − slave-mode; | |
| 339 | − remote-endpoint = <&funnel4_out_port0>; | |
| 340 | + in-ports { | |
| 341 | + port { | |
| 342 | + tpiu_in_port: endpoint@0 { | |
| 343 | + remote-endpoint = <&funnel4_out_port0>; | |
| 344 | + }; | |
| 340 | 345 | }; |
| 341 | 346 | }; |
| 342 | 347 | }; |
| @@ -347,7 +352,7 @@ · 4 unmodified lines | ||
| 347 | 352 | */ |
| 348 | 353 | compatible = "arm,coresight-replicator"; |
| 349 | 354 | |
| 350 | − ports { | |
| 355 | + out-ports { | |
| 351 | 356 | #address-cells = <1>; |
| 352 | 357 | #size-cells = <0>; |
| 353 | 358 | |
| @@ -365,12 +370,11 @@ · 11 unmodified lines | ||
| 365 | 370 | remote-endpoint = <&funnel4_in_port0>; |
| 366 | 371 | }; |
| 367 | 372 | }; |
| 373 | + }; | |
| 368 | 374 | |
| 369 | − /* replicator input port */ | |
| 370 | − port@2 { | |
| 371 | − reg = <0>; | |
| 375 | + in-ports { | |
| 376 | + port { | |
| 372 | 377 | replicator0_in_port0: endpoint { |
| 373 | − slave-mode; | |
| 374 | 378 | remote-endpoint = <&funnel0_out_port0>; |
| 375 | 379 | }; |
| 376 | 380 | }; |
| @@ -383,7 +387,7 @@ · 6 unmodified lines | ||
| 383 | 387 | */ |
| 384 | 388 | compatible = "arm,coresight-replicator"; |
| 385 | 389 | |
| 386 | − ports { | |
| 390 | + out-ports { | |
| 387 | 391 | #address-cells = <1>; |
| 388 | 392 | #size-cells = <0>; |
| 389 | 393 | |
| @@ -401,12 +405,11 @@ · 11 unmodified lines | ||
| 401 | 405 | remote-endpoint = <&funnel4_in_port1>; |
| 402 | 406 | }; |
| 403 | 407 | }; |
| 408 | + }; | |
| 404 | 409 | |
| 405 | − /* replicator input port */ | |
| 406 | − port@2 { | |
| 407 | − reg = <0>; | |
| 410 | + in-ports { | |
| 411 | + port { | |
| 408 | 412 | replicator1_in_port0: endpoint { |
| 409 | − slave-mode; | |
| 410 | 413 | remote-endpoint = <&funnel1_out_port0>; |
| 411 | 414 | }; |
| 412 | 415 | }; |
| @@ -419,11 +422,10 @@ · 6 unmodified lines | ||
| 419 | 422 | */ |
| 420 | 423 | compatible = "arm,coresight-replicator"; |
| 421 | 424 | |
| 422 | − ports { | |
| 425 | + out-ports { | |
| 423 | 426 | #address-cells = <1>; |
| 424 | 427 | #size-cells = <0>; |
| 425 | 428 | |
| 426 | − /* replicator output ports */ | |
| 427 | 429 | port@0 { |
| 428 | 430 | reg = <0>; |
| 429 | 431 | replicator2_out_port0: endpoint { |
| @@ -437,12 +439,11 @@ · 7 unmodified lines | ||
| 437 | 439 | remote-endpoint = <&funnel4_in_port2>; |
| 438 | 440 | }; |
| 439 | 441 | }; |
| 442 | + }; | |
| 440 | 443 | |
| 441 | − /* replicator input port */ | |
| 442 | − port@2 { | |
| 443 | − reg = <0>; | |
| 444 | + in-ports { | |
| 445 | + port { | |
| 444 | 446 | replicator2_in_port0: endpoint { |
| 445 | − slave-mode; | |
| 446 | 447 | remote-endpoint = <&funnel2_out_port0>; |
| 447 | 448 | }; |
| 448 | 449 | }; |
| @@ -455,11 +456,10 @@ · 6 unmodified lines | ||
| 455 | 456 | */ |
| 456 | 457 | compatible = "arm,coresight-replicator"; |
| 457 | 458 | |
| 458 | − ports { | |
| 459 | + out-ports { | |
| 459 | 460 | #address-cells = <1>; |
| 460 | 461 | #size-cells = <0>; |
| 461 | 462 | |
| 462 | − /* replicator output ports */ | |
| 463 | 463 | port@0 { |
| 464 | 464 | reg = <0>; |
| 465 | 465 | replicator3_out_port0: endpoint { |
| @@ -473,12 +473,11 @@ · 7 unmodified lines | ||
| 473 | 473 | remote-endpoint = <&funnel4_in_port3>; |
| 474 | 474 | }; |
| 475 | 475 | }; |
| 476 | + }; | |
| 476 | 477 | |
| 477 | − /* replicator input port */ | |
| 478 | − port@2 { | |
| 479 | − reg = <0>; | |
| 478 | + in-ports { | |
| 479 | + port { | |
| 480 | 480 | replicator3_in_port0: endpoint { |
| 481 | − slave-mode; | |
| 482 | 481 | remote-endpoint = <&funnel3_out_port0>; |
| 483 | 482 | }; |
| 484 | 483 | }; |
| @@ -491,48 +490,43 @@ · 6 unmodified lines | ||
| 491 | 490 | |
| 492 | 491 | clocks = <&clk_375m>; |
| 493 | 492 | clock-names = "apb_pclk"; |
| 494 | − ports { | |
| 495 | − #address-cells = <1>; | |
| 496 | − #size-cells = <0>; | |
| 497 | − | |
| 498 | − /* funnel output port */ | |
| 499 | − port@0 { | |
| 500 | − reg = <0>; | |
| 493 | + out-ports { | |
| 494 | + port { | |
| 501 | 495 | funnel0_out_port0: endpoint { |
| 502 | 496 | remote-endpoint = |
| 503 | 497 | <&replicator0_in_port0>; |
| 504 | 498 | }; |
| 505 | 499 | }; |
| 500 | + }; | |
| 506 | 501 | |
| 507 | − /* funnel input ports */ | |
| 508 | − port@1 { | |
| 502 | + in-ports { | |
| 503 | + #address-cells = <1>; | |
| 504 | + #size-cells = <0>; | |
| 505 | + | |
| 506 | + port@0 { | |
| 509 | 507 | reg = <0>; |
| 510 | 508 | funnel0_in_port0: endpoint { |
| 511 | − slave-mode; | |
| 512 | 509 | remote-endpoint = <&ptm0_out_port>; |
| 513 | 510 | }; |
| 514 | 511 | }; |
| 515 | 512 | |
| 516 | − port@2 { | |
| 513 | + port@1 { | |
| 517 | 514 | reg = <1>; |
| 518 | 515 | funnel0_in_port1: endpoint { |
| 519 | − slave-mode; | |
| 520 | 516 | remote-endpoint = <&ptm1_out_port>; |
| 521 | 517 | }; |
| 522 | 518 | }; |
| 523 | 519 | |
| 524 | − port@3 { | |
| 520 | + port@2 { | |
| 525 | 521 | reg = <2>; |
| 526 | 522 | funnel0_in_port2: endpoint { |
| 527 | − slave-mode; | |
| 528 | 523 | remote-endpoint = <&ptm2_out_port>; |
| 529 | 524 | }; |
| 530 | 525 | }; |
| 531 | 526 | |
| 532 | − port@4 { | |
| 527 | + port@3 { | |
| 533 | 528 | reg = <3>; |
| 534 | 529 | funnel0_in_port3: endpoint { |
| 535 | − slave-mode; | |
| 536 | 530 | remote-endpoint = <&ptm3_out_port>; |
| 537 | 531 | }; |
| 538 | 532 | }; |
| @@ -545,48 +539,43 @@ · 6 unmodified lines | ||
| 545 | 539 | |
| 546 | 540 | clocks = <&clk_375m>; |
| 547 | 541 | clock-names = "apb_pclk"; |
| 548 | − ports { | |
| 549 | − #address-cells = <1>; | |
| 550 | − #size-cells = <0>; | |
| 551 | − | |
| 552 | − /* funnel output port */ | |
| 553 | − port@0 { | |
| 554 | − reg = <0>; | |
| 542 | + out-ports { | |
| 543 | + port { | |
| 555 | 544 | funnel1_out_port0: endpoint { |
| 556 | 545 | remote-endpoint = |
| 557 | 546 | <&replicator1_in_port0>; |
| 558 | 547 | }; |
| 559 | 548 | }; |
| 549 | + }; | |
| 560 | 550 | |
| 561 | − /* funnel input ports */ | |
| 562 | − port@1 { | |
| 551 | + in-ports { | |
| 552 | + #address-cells = <1>; | |
| 553 | + #size-cells = <0>; | |
| 554 | + | |
| 555 | + port@0 { | |
| 563 | 556 | reg = <0>; |
| 564 | 557 | funnel1_in_port0: endpoint { |
| 565 | − slave-mode; | |
| 566 | 558 | remote-endpoint = <&ptm4_out_port>; |
| 567 | 559 | }; |
| 568 | 560 | }; |
| 569 | 561 | |
| 570 | − port@2 { | |
| 562 | + port@1 { | |
| 571 | 563 | reg = <1>; |
| 572 | 564 | funnel1_in_port1: endpoint { |
| 573 | − slave-mode; | |
| 574 | 565 | remote-endpoint = <&ptm5_out_port>; |
| 575 | 566 | }; |
| 576 | 567 | }; |
| 577 | 568 | |
| 578 | − port@3 { | |
| 569 | + port@2 { | |
| 579 | 570 | reg = <2>; |
| 580 | 571 | funnel1_in_port2: endpoint { |
| 581 | − slave-mode; | |
| 582 | 572 | remote-endpoint = <&ptm6_out_port>; |
| 583 | 573 | }; |
| 584 | 574 | }; |
| 585 | 575 | |
| 586 | − port@4 { | |
| 576 | + port@3 { | |
| 587 | 577 | reg = <3>; |
| 588 | 578 | funnel1_in_port3: endpoint { |
| 589 | − slave-mode; | |
| 590 | 579 | remote-endpoint = <&ptm7_out_port>; |
| 591 | 580 | }; |
| 592 | 581 | }; |
| @@ -599,48 +588,43 @@ · 6 unmodified lines | ||
| 599 | 588 | |
| 600 | 589 | clocks = <&clk_375m>; |
| 601 | 590 | clock-names = "apb_pclk"; |
| 602 | − ports { | |
| 603 | − #address-cells = <1>; | |
| 604 | − #size-cells = <0>; | |
| 605 | − | |
| 606 | − /* funnel output port */ | |
| 607 | − port@0 { | |
| 608 | − reg = <0>; | |
| 591 | + out-ports { | |
| 592 | + port { | |
| 609 | 593 | funnel2_out_port0: endpoint { |
| 610 | 594 | remote-endpoint = |
| 611 | 595 | <&replicator2_in_port0>; |
| 612 | 596 | }; |
| 613 | 597 | }; |
| 598 | + }; | |
| 614 | 599 | |
| 615 | − /* funnel input ports */ | |
| 616 | − port@1 { | |
| 600 | + in-ports { | |
| 601 | + #address-cells = <1>; | |
| 602 | + #size-cells = <0>; | |
| 603 | + | |
| 604 | + port@0 { | |
| 617 | 605 | reg = <0>; |
| 618 | 606 | funnel2_in_port0: endpoint { |
| 619 | − slave-mode; | |
| 620 | 607 | remote-endpoint = <&ptm8_out_port>; |
| 621 | 608 | }; |
| 622 | 609 | }; |
| 623 | 610 | |
| 624 | − port@2 { | |
| 611 | + port@1 { | |
| 625 | 612 | reg = <1>; |
| 626 | 613 | funnel2_in_port1: endpoint { |
| 627 | − slave-mode; | |
| 628 | 614 | remote-endpoint = <&ptm9_out_port>; |
| 629 | 615 | }; |
| 630 | 616 | }; |
| 631 | 617 | |
| 632 | − port@3 { | |
| 618 | + port@2 { | |
| 633 | 619 | reg = <2>; |
| 634 | 620 | funnel2_in_port2: endpoint { |
| 635 | − slave-mode; | |
| 636 | 621 | remote-endpoint = <&ptm10_out_port>; |
| 637 | 622 | }; |
| 638 | 623 | }; |
| 639 | 624 | |
| 640 | − port@4 { | |
| 625 | + port@3 { | |
| 641 | 626 | reg = <3>; |
| 642 | 627 | funnel2_in_port3: endpoint { |
| 643 | − slave-mode; | |
| 644 | 628 | remote-endpoint = <&ptm11_out_port>; |
| 645 | 629 | }; |
| 646 | 630 | }; |
| @@ -653,48 +637,43 @@ · 6 unmodified lines | ||
| 653 | 637 | |
| 654 | 638 | clocks = <&clk_375m>; |
| 655 | 639 | clock-names = "apb_pclk"; |
| 656 | − ports { | |
| 657 | − #address-cells = <1>; | |
| 658 | − #size-cells = <0>; | |
| 659 | − | |
| 660 | − /* funnel output port */ | |
| 661 | − port@0 { | |
| 662 | − reg = <0>; | |
| 640 | + out-ports { | |
| 641 | + port { | |
| 663 | 642 | funnel3_out_port0: endpoint { |
| 664 | 643 | remote-endpoint = |
| 665 | 644 | <&replicator3_in_port0>; |
| 666 | 645 | }; |
| 667 | 646 | }; |
| 647 | + }; | |
| 668 | 648 | |
| 669 | − /* funnel input ports */ | |
| 670 | − port@1 { | |
| 649 | + in-ports { | |
| 650 | + #address-cells = <1>; | |
| 651 | + #size-cells = <0>; | |
| 652 | + | |
| 653 | + port@0 { | |
| 671 | 654 | reg = <0>; |
| 672 | 655 | funnel3_in_port0: endpoint { |
| 673 | − slave-mode; | |
| 674 | 656 | remote-endpoint = <&ptm12_out_port>; |
| 675 | 657 | }; |
| 676 | 658 | }; |
| 677 | 659 | |
| 678 | − port@2 { | |
| 660 | + port@1 { | |
| 679 | 661 | reg = <1>; |
| 680 | 662 | funnel3_in_port1: endpoint { |
| 681 | − slave-mode; | |
| 682 | 663 | remote-endpoint = <&ptm13_out_port>; |
| 683 | 664 | }; |
| 684 | 665 | }; |
| 685 | 666 | |
| 686 | − port@3 { | |
| 667 | + port@2 { | |
| 687 | 668 | reg = <2>; |
| 688 | 669 | funnel3_in_port2: endpoint { |
| 689 | − slave-mode; | |
| 690 | 670 | remote-endpoint = <&ptm14_out_port>; |
| 691 | 671 | }; |
| 692 | 672 | }; |
| 693 | 673 | |
| 694 | − port@4 { | |
| 674 | + port@3 { | |
| 695 | 675 | reg = <3>; |
| 696 | 676 | funnel3_in_port3: endpoint { |
| 697 | − slave-mode; | |
| 698 | 677 | remote-endpoint = <&ptm15_out_port>; |
| 699 | 678 | }; |
| 700 | 679 | }; |
| @@ -707,50 +686,45 @@ · 6 unmodified lines | ||
| 707 | 686 | |
| 708 | 687 | clocks = <&clk_375m>; |
| 709 | 688 | clock-names = "apb_pclk"; |
| 710 | − ports { | |
| 711 | − #address-cells = <1>; | |
| 712 | − #size-cells = <0>; | |
| 713 | − | |
| 714 | − /* funnel output port */ | |
| 715 | − port@0 { | |
| 716 | − reg = <0>; | |
| 689 | + out-ports { | |
| 690 | + port { | |
| 717 | 691 | funnel4_out_port0: endpoint { |
| 718 | 692 | remote-endpoint = <&tpiu_in_port>; |
| 719 | 693 | }; |
| 720 | 694 | }; |
| 695 | + }; | |
| 721 | 696 | |
| 722 | − /* funnel input ports */ | |
| 723 | − port@1 { | |
| 697 | + in-ports { | |
| 698 | + #address-cells = <1>; | |
| 699 | + #size-cells = <0>; | |
| 700 | + | |
| 701 | + port@0 { | |
| 724 | 702 | reg = <0>; |
| 725 | 703 | funnel4_in_port0: endpoint { |
| 726 | − slave-mode; | |
| 727 | 704 | remote-endpoint = |
| 728 | 705 | <&replicator0_out_port1>; |
| 729 | 706 | }; |
| 730 | 707 | }; |
| 731 | 708 | |
| 732 | − port@2 { | |
| 709 | + port@1 { | |
| 733 | 710 | reg = <1>; |
| 734 | 711 | funnel4_in_port1: endpoint { |
| 735 | − slave-mode; | |
| 736 | 712 | remote-endpoint = |
| 737 | 713 | <&replicator1_out_port1>; |
| 738 | 714 | }; |
| 739 | 715 | }; |
| 740 | 716 | |
| 741 | − port@3 { | |
| 717 | + port@2 { | |
| 742 | 718 | reg = <2>; |
| 743 | 719 | funnel4_in_port2: endpoint { |
| 744 | − slave-mode; | |
| 745 | 720 | remote-endpoint = |
| 746 | 721 | <&replicator2_out_port1>; |
| 747 | 722 | }; |
| 748 | 723 | }; |
| 749 | 724 | |
| 750 | − port@4 { | |
| 725 | + port@3 { | |
| 751 | 726 | reg = <3>; |
| 752 | 727 | funnel4_in_port3: endpoint { |
| 753 | − slave-mode; | |
| 754 | 728 | remote-endpoint = |
| 755 | 729 | <&replicator3_out_port1>; |
| 756 | 730 | }; |
| @@ -765,9 +739,11 @@ · 8 unmodified lines | ||
| 765 | 739 | clocks = <&clk_375m>; |
| 766 | 740 | clock-names = "apb_pclk"; |
| 767 | 741 | cpu = <&CPU0>; |
| 768 | − port { | |
| 769 | − ptm0_out_port: endpoint { | |
| 770 | − remote-endpoint = <&funnel0_in_port0>; | |
| 742 | + out-ports { | |
| 743 | + port { | |
| 744 | + ptm0_out_port: endpoint { | |
| 745 | + remote-endpoint = <&funnel0_in_port0>; | |
| 746 | + }; | |
| 771 | 747 | }; |
| 772 | 748 | }; |
| 773 | 749 | }; |
| @@ -779,9 +755,11 @@ · 5 unmodified lines | ||
| 779 | 755 | clocks = <&clk_375m>; |
| 780 | 756 | clock-names = "apb_pclk"; |
| 781 | 757 | cpu = <&CPU1>; |
| 782 | − port { | |
| 783 | − ptm1_out_port: endpoint { | |
| 784 | − remote-endpoint = <&funnel0_in_port1>; | |
| 758 | + out-ports { | |
| 759 | + port { | |
| 760 | + ptm1_out_port: endpoint { | |
| 761 | + remote-endpoint = <&funnel0_in_port1>; | |
| 762 | + }; | |
| 785 | 763 | }; |
| 786 | 764 | }; |
| 787 | 765 | }; |
| @@ -793,9 +771,11 @@ · 5 unmodified lines | ||
| 793 | 771 | clocks = <&clk_375m>; |
| 794 | 772 | clock-names = "apb_pclk"; |
| 795 | 773 | cpu = <&CPU2>; |
| 796 | − port { | |
| 797 | − ptm2_out_port: endpoint { | |
| 798 | − remote-endpoint = <&funnel0_in_port2>; | |
| 774 | + out-ports { | |
| 775 | + port { | |
| 776 | + ptm2_out_port: endpoint { | |
| 777 | + remote-endpoint = <&funnel0_in_port2>; | |
| 778 | + }; | |
| 799 | 779 | }; |
| 800 | 780 | }; |
| 801 | 781 | }; |
| @@ -807,9 +787,11 @@ · 5 unmodified lines | ||
| 807 | 787 | clocks = <&clk_375m>; |
| 808 | 788 | clock-names = "apb_pclk"; |
| 809 | 789 | cpu = <&CPU3>; |
| 810 | − port { | |
| 811 | − ptm3_out_port: endpoint { | |
| 812 | − remote-endpoint = <&funnel0_in_port3>; | |
| 790 | + out-ports { | |
| 791 | + port { | |
| 792 | + ptm3_out_port: endpoint { | |
| 793 | + remote-endpoint = <&funnel0_in_port3>; | |
| 794 | + }; | |
| 813 | 795 | }; |
| 814 | 796 | }; |
| 815 | 797 | }; |
| @@ -821,9 +803,11 @@ · 5 unmodified lines | ||
| 821 | 803 | clocks = <&clk_375m>; |
| 822 | 804 | clock-names = "apb_pclk"; |
| 823 | 805 | cpu = <&CPU4>; |
| 824 | − port { | |
| 825 | − ptm4_out_port: endpoint { | |
| 826 | − remote-endpoint = <&funnel1_in_port0>; | |
| 806 | + out-ports { | |
| 807 | + port { | |
| 808 | + ptm4_out_port: endpoint { | |
| 809 | + remote-endpoint = <&funnel1_in_port0>; | |
| 810 | + }; | |
| 827 | 811 | }; |
| 828 | 812 | }; |
| 829 | 813 | }; |
| @@ -835,9 +819,11 @@ · 5 unmodified lines | ||
| 835 | 819 | clocks = <&clk_375m>; |
| 836 | 820 | clock-names = "apb_pclk"; |
| 837 | 821 | cpu = <&CPU5>; |
| 838 | − port { | |
| 839 | − ptm5_out_port: endpoint { | |
| 840 | − remote-endpoint = <&funnel1_in_port1>; | |
| 822 | + out-ports { | |
| 823 | + port { | |
| 824 | + ptm5_out_port: endpoint { | |
| 825 | + remote-endpoint = <&funnel1_in_port1>; | |
| 826 | + }; | |
| 841 | 827 | }; |
| 842 | 828 | }; |
| 843 | 829 | }; |
| @@ -849,9 +835,11 @@ · 5 unmodified lines | ||
| 849 | 835 | clocks = <&clk_375m>; |
| 850 | 836 | clock-names = "apb_pclk"; |
| 851 | 837 | cpu = <&CPU6>; |
| 852 | − port { | |
| 853 | − ptm6_out_port: endpoint { | |
| 854 | − remote-endpoint = <&funnel1_in_port2>; | |
| 838 | + out-ports { | |
| 839 | + port { | |
| 840 | + ptm6_out_port: endpoint { | |
| 841 | + remote-endpoint = <&funnel1_in_port2>; | |
| 842 | + }; | |
| 855 | 843 | }; |
| 856 | 844 | }; |
| 857 | 845 | }; |
| @@ -863,9 +851,11 @@ · 5 unmodified lines | ||
| 863 | 851 | clocks = <&clk_375m>; |
| 864 | 852 | clock-names = "apb_pclk"; |
| 865 | 853 | cpu = <&CPU7>; |
| 866 | − port { | |
| 867 | − ptm7_out_port: endpoint { | |
| 868 | − remote-endpoint = <&funnel1_in_port3>; | |
| 854 | + out-ports { | |
| 855 | + port { | |
| 856 | + ptm7_out_port: endpoint { | |
| 857 | + remote-endpoint = <&funnel1_in_port3>; | |
| 858 | + }; | |
| 869 | 859 | }; |
| 870 | 860 | }; |
| 871 | 861 | }; |
| @@ -877,9 +867,11 @@ · 5 unmodified lines | ||
| 877 | 867 | clocks = <&clk_375m>; |
| 878 | 868 | clock-names = "apb_pclk"; |
| 879 | 869 | cpu = <&CPU8>; |
| 880 | − port { | |
| 881 | − ptm8_out_port: endpoint { | |
| 882 | − remote-endpoint = <&funnel2_in_port0>; | |
| 870 | + out-ports { | |
| 871 | + port { | |
| 872 | + ptm8_out_port: endpoint { | |
| 873 | + remote-endpoint = <&funnel2_in_port0>; | |
| 874 | + }; | |
| 883 | 875 | }; |
| 884 | 876 | }; |
| 885 | 877 | }; |
| @@ -890,9 +882,11 @@ · 4 unmodified lines | ||
| 890 | 882 | clocks = <&clk_375m>; |
| 891 | 883 | clock-names = "apb_pclk"; |
| 892 | 884 | cpu = <&CPU9>; |
| 893 | − port { | |
| 894 | − ptm9_out_port: endpoint { | |
| 895 | − remote-endpoint = <&funnel2_in_port1>; | |
| 885 | + out-ports { | |
| 886 | + port { | |
| 887 | + ptm9_out_port: endpoint { | |
| 888 | + remote-endpoint = <&funnel2_in_port1>; | |
| 889 | + }; | |
| 896 | 890 | }; |
| 897 | 891 | }; |
| 898 | 892 | }; |
| @@ -904,9 +898,11 @@ · 5 unmodified lines | ||
| 904 | 898 | clocks = <&clk_375m>; |
| 905 | 899 | clock-names = "apb_pclk"; |
| 906 | 900 | cpu = <&CPU10>; |
| 907 | − port { | |
| 908 | − ptm10_out_port: endpoint { | |
| 909 | − remote-endpoint = <&funnel2_in_port2>; | |
| 901 | + out-ports { | |
| 902 | + port { | |
| 903 | + ptm10_out_port: endpoint { | |
| 904 | + remote-endpoint = <&funnel2_in_port2>; | |
| 905 | + }; | |
| 910 | 906 | }; |
| 911 | 907 | }; |
| 912 | 908 | }; |
| @@ -918,9 +914,11 @@ · 5 unmodified lines | ||
| 918 | 914 | clocks = <&clk_375m>; |
| 919 | 915 | clock-names = "apb_pclk"; |
| 920 | 916 | cpu = <&CPU11>; |
| 921 | − port { | |
| 922 | − ptm11_out_port: endpoint { | |
| 923 | − remote-endpoint = <&funnel2_in_port3>; | |
| 917 | + out-ports { | |
| 918 | + port { | |
| 919 | + ptm11_out_port: endpoint { | |
| 920 | + remote-endpoint = <&funnel2_in_port3>; | |
| 921 | + }; | |
| 924 | 922 | }; |
| 925 | 923 | }; |
| 926 | 924 | }; |
| @@ -932,9 +930,11 @@ · 5 unmodified lines | ||
| 932 | 930 | clocks = <&clk_375m>; |
| 933 | 931 | clock-names = "apb_pclk"; |
| 934 | 932 | cpu = <&CPU12>; |
| 935 | − port { | |
| 936 | − ptm12_out_port: endpoint { | |
| 937 | − remote-endpoint = <&funnel3_in_port0>; | |
| 933 | + out-ports { | |
| 934 | + port { | |
| 935 | + ptm12_out_port: endpoint { | |
| 936 | + remote-endpoint = <&funnel3_in_port0>; | |
| 937 | + }; | |
| 938 | 938 | }; |
| 939 | 939 | }; |
| 940 | 940 | }; |
| @@ -946,9 +946,11 @@ · 5 unmodified lines | ||
| 946 | 946 | clocks = <&clk_375m>; |
| 947 | 947 | clock-names = "apb_pclk"; |
| 948 | 948 | cpu = <&CPU13>; |
| 949 | − port { | |
| 950 | − ptm13_out_port: endpoint { | |
| 951 | − remote-endpoint = <&funnel3_in_port1>; | |
| 949 | + out-ports { | |
| 950 | + port { | |
| 951 | + ptm13_out_port: endpoint { | |
| 952 | + remote-endpoint = <&funnel3_in_port1>; | |
| 953 | + }; | |
| 952 | 954 | }; |
| 953 | 955 | }; |
| 954 | 956 | }; |
| @@ -960,9 +962,11 @@ · 5 unmodified lines | ||
| 960 | 962 | clocks = <&clk_375m>; |
| 961 | 963 | clock-names = "apb_pclk"; |
| 962 | 964 | cpu = <&CPU14>; |
| 963 | − port { | |
| 964 | − ptm14_out_port: endpoint { | |
| 965 | − remote-endpoint = <&funnel3_in_port2>; | |
| 965 | + out-ports { | |
| 966 | + port { | |
| 967 | + ptm14_out_port: endpoint { | |
| 968 | + remote-endpoint = <&funnel3_in_port2>; | |
| 969 | + }; | |
| 966 | 970 | }; |
| 967 | 971 | }; |
| 968 | 972 | }; |
| @@ -974,9 +978,11 @@ · 5 unmodified lines | ||
| 974 | 978 | clocks = <&clk_375m>; |
| 975 | 979 | clock-names = "apb_pclk"; |
| 976 | 980 | cpu = <&CPU15>; |
| 977 | − port { | |
| 978 | − ptm15_out_port: endpoint { | |
| 979 | − remote-endpoint = <&funnel3_in_port3>; | |
| 981 | + out-ports { | |
| 982 | + port { | |
| 983 | + ptm15_out_port: endpoint { | |
| 984 | + remote-endpoint = <&funnel3_in_port3>; | |
| 985 | + }; | |
| 980 | 986 | }; |
| 981 | 987 | }; |
| 982 | 988 | }; |
| @@ -164,7 +164,7 @@ · 163 unmodified lines | ||
| 164 | 164 | reg = <0x00210000 0x10000>; |
| 165 | 165 | ranges; |
| 166 | 166 | |
| 167 | − cspi1: cspi@213000 { | |
| 167 | + cspi1: spi@213000 { | |
| 168 | 168 | #address-cells = <1>; |
| 169 | 169 | #size-cells = <0>; |
| 170 | 170 | compatible = "fsl,imx1-cspi"; |
| @@ -186,7 +186,7 @@ · 15 unmodified lines | ||
| 186 | 186 | status = "disabled"; |
| 187 | 187 | }; |
| 188 | 188 | |
| 189 | − cspi2: cspi@219000 { | |
| 189 | + cspi2: spi@219000 { | |
| 190 | 190 | #address-cells = <1>; |
| 191 | 191 | #size-cells = <0>; |
| 192 | 192 | compatible = "fsl,imx1-cspi"; |
| @@ -58,7 +58,7 @@ · 57 unmodified lines | ||
| 58 | 58 | status = "okay"; |
| 59 | 59 | }; |
| 60 | 60 | |
| 61 | − ssp0: ssp@80010000 { | |
| 61 | + ssp0: spi@80010000 { | |
| 62 | 62 | compatible = "fsl,imx23-mmc"; |
| 63 | 63 | pinctrl-names = "default"; |
| 64 | 64 | pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; |
| @@ -25,7 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | apb@80000000 { |
| 27 | 27 | apbh@80000000 { |
| 28 | − ssp0: ssp@80010000 { | |
| 28 | + ssp0: spi@80010000 { | |
| 29 | 29 | compatible = "fsl,imx23-mmc"; |
| 30 | 30 | pinctrl-names = "default"; |
| 31 | 31 | pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; |
| @@ -59,7 +59,7 @@ · 27 unmodified lines | ||
| 59 | 59 | }; |
| 60 | 60 | }; |
| 61 | 61 | |
| 62 | − ssp1: ssp@80034000 { | |
| 62 | + ssp1: spi@80034000 { | |
| 63 | 63 | #address-cells = <1>; |
| 64 | 64 | #size-cells = <0>; |
| 65 | 65 | compatible = "fsl,imx23-spi"; |
| @@ -55,7 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | |
| 56 | 56 | apb@80000000 { |
| 57 | 57 | apbh@80000000 { |
| 58 | − ssp0: ssp@80010000 { | |
| 58 | + ssp0: spi@80010000 { | |
| 59 | 59 | compatible = "fsl,imx23-mmc"; |
| 60 | 60 | pinctrl-names = "default"; |
| 61 | 61 | pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; |
| @@ -65,7 +65,7 @@ · 3 unmodified lines | ||
| 65 | 65 | status = "okay"; |
| 66 | 66 | }; |
| 67 | 67 | |
| 68 | − ssp1: ssp@80034000 { | |
| 68 | + ssp1: spi@80034000 { | |
| 69 | 69 | compatible = "fsl,imx23-mmc"; |
| 70 | 70 | pinctrl-names = "default"; |
| 71 | 71 | pinctrl-0 = <&mmc1_8bit_pins_a>; |
| @@ -22,7 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | |
| 23 | 23 | apb@80000000 { |
| 24 | 24 | apbh@80000000 { |
| 25 | − ssp0: ssp@80010000 { | |
| 25 | + ssp0: spi@80010000 { | |
| 26 | 26 | compatible = "fsl,imx23-mmc"; |
| 27 | 27 | pinctrl-names = "default"; |
| 28 | 28 | pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; |
| @@ -54,7 +54,7 @@ · 53 unmodified lines | ||
| 54 | 54 | |
| 55 | 55 | apb@80000000 { |
| 56 | 56 | apbh@80000000 { |
| 57 | − ssp0: ssp@80010000 { | |
| 57 | + ssp0: spi@80010000 { | |
| 58 | 58 | compatible = "fsl,imx23-mmc"; |
| 59 | 59 | pinctrl-names = "default"; |
| 60 | 60 | pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; |
| @@ -64,7 +64,7 @@ · 3 unmodified lines | ||
| 64 | 64 | status = "okay"; |
| 65 | 65 | }; |
| 66 | 66 | |
| 67 | − ssp1: ssp@80034000 { | |
| 67 | + ssp1: spi@80034000 { | |
| 68 | 68 | compatible = "fsl,imx23-mmc"; |
| 69 | 69 | pinctrl-names = "default"; |
| 70 | 70 | pinctrl-0 = <&mmc1_4bit_pins_a>; |
| @@ -93,7 +93,7 @@ · 92 unmodified lines | ||
| 93 | 93 | status = "disabled"; |
| 94 | 94 | }; |
| 95 | 95 | |
| 96 | − ssp0: ssp@80010000 { | |
| 96 | + ssp0: spi@80010000 { | |
| 97 | 97 | reg = <0x80010000 0x2000>; |
| 98 | 98 | interrupts = <15>; |
| 99 | 99 | clocks = <&clks 33>; |
| @@ -457,7 +457,7 @@ · 357 unmodified lines | ||
| 457 | 457 | status = "disabled"; |
| 458 | 458 | }; |
| 459 | 459 | |
| 460 | − ssp1: ssp@80034000 { | |
| 460 | + ssp1: spi@80034000 { | |
| 461 | 461 | reg = <0x80034000 0x2000>; |
| 462 | 462 | interrupts = <2>; |
| 463 | 463 | clocks = <&clks 33>; |
| @@ -168,7 +168,7 @@ · 167 unmodified lines | ||
| 168 | 168 | status = "disabled"; |
| 169 | 169 | }; |
| 170 | 170 | |
| 171 | − spi1: cspi@43fa4000 { | |
| 171 | + spi1: spi@43fa4000 { | |
| 172 | 172 | #address-cells = <1>; |
| 173 | 173 | #size-cells = <0>; |
| 174 | 174 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; |
| @@ -209,7 +209,7 @@ · 34 unmodified lines | ||
| 209 | 209 | reg = <0x50000000 0x40000>; |
| 210 | 210 | ranges; |
| 211 | 211 | |
| 212 | − spi3: cspi@50004000 { | |
| 212 | + spi3: spi@50004000 { | |
| 213 | 213 | #address-cells = <1>; |
| 214 | 214 | #size-cells = <0>; |
| 215 | 215 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; |
| @@ -238,7 +238,7 @@ · 22 unmodified lines | ||
| 238 | 238 | status = "disabled"; |
| 239 | 239 | }; |
| 240 | 240 | |
| 241 | − spi2: cspi@50010000 { | |
| 241 | + spi2: spi@50010000 { | |
| 242 | 242 | #address-cells = <1>; |
| 243 | 243 | #size-cells = <0>; |
| 244 | 244 | compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; |
| @@ -209,7 +209,7 @@ · 208 unmodified lines | ||
| 209 | 209 | status = "disabled"; |
| 210 | 210 | }; |
| 211 | 211 | |
| 212 | − cspi1: cspi@1000e000 { | |
| 212 | + cspi1: spi@1000e000 { | |
| 213 | 213 | #address-cells = <1>; |
| 214 | 214 | #size-cells = <0>; |
| 215 | 215 | compatible = "fsl,imx27-cspi"; |
| @@ -221,7 +221,7 @@ · 5 unmodified lines | ||
| 221 | 221 | status = "disabled"; |
| 222 | 222 | }; |
| 223 | 223 | |
| 224 | − cspi2: cspi@1000f000 { | |
| 224 | + cspi2: spi@1000f000 { | |
| 225 | 225 | #address-cells = <1>; |
| 226 | 226 | #size-cells = <0>; |
| 227 | 227 | compatible = "fsl,imx27-cspi"; |
| @@ -373,7 +373,7 @@ · 145 unmodified lines | ||
| 373 | 373 | status = "disabled"; |
| 374 | 374 | }; |
| 375 | 375 | |
| 376 | − cspi3: cspi@10017000 { | |
| 376 | + cspi3: spi@10017000 { | |
| 377 | 377 | #address-cells = <1>; |
| 378 | 378 | #size-cells = <0>; |
| 379 | 379 | compatible = "fsl,imx27-cspi"; |
| @@ -18,7 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | apb@80000000 { |
| 20 | 20 | apbh@80000000 { |
| 21 | − ssp0: ssp@80010000 { | |
| 21 | + ssp0: spi@80010000 { | |
| 22 | 22 | compatible = "fsl,imx28-mmc"; |
| 23 | 23 | pinctrl-names = "default"; |
| 24 | 24 | pinctrl-0 = <&mmc0_4bit_pins_a |
| @@ -27,7 +27,7 @@ · 2 unmodified lines | ||
| 27 | 27 | status = "okay"; |
| 28 | 28 | }; |
| 29 | 29 | |
| 30 | − ssp2: ssp@80014000 { | |
| 30 | + ssp2: spi@80014000 { | |
| 31 | 31 | compatible = "fsl,imx28-spi"; |
| 32 | 32 | pinctrl-names = "default"; |
| 33 | 33 | pinctrl-0 = <&spi2_pins_a>; |
| @@ -18,7 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | status = "okay"; |
| 19 | 19 | }; |
| 20 | 20 | |
| 21 | − ssp0: ssp@80010000 { | |
| 21 | + ssp0: spi@80010000 { | |
| 22 | 22 | compatible = "fsl,imx28-mmc"; |
| 23 | 23 | pinctrl-names = "default"; |
| 24 | 24 | pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_sck_cfg>; |
| @@ -26,7 +26,7 @@ · 1 unmodified line | ||
| 26 | 26 | status = "okay"; |
| 27 | 27 | }; |
| 28 | 28 | |
| 29 | − ssp2: ssp@80014000 { | |
| 29 | + ssp2: spi@80014000 { | |
| 30 | 30 | compatible = "fsl,imx28-mmc"; |
| 31 | 31 | pinctrl-names = "default"; |
| 32 | 32 | pinctrl-0 = <&mmc2_4bit_pins_apx4 &mmc2_sck_cfg_apx4>; |
| @@ -66,7 +66,7 @@ · 65 unmodified lines | ||
| 66 | 66 | |
| 67 | 67 | }; |
| 68 | 68 | |
| 69 | − ssp0: ssp@80010000 { | |
| 69 | + ssp0: spi@80010000 { | |
| 70 | 70 | compatible = "fsl,imx28-mmc"; |
| 71 | 71 | pinctrl-names = "default"; |
| 72 | 72 | pinctrl-0 = <&mmc0_4bit_pins_a |
| @@ -25,7 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | apb@80000000 { |
| 27 | 27 | apbh@80000000 { |
| 28 | − ssp0: ssp@80010000 { | |
| 28 | + ssp0: spi@80010000 { | |
| 29 | 29 | compatible = "fsl,imx28-mmc"; |
| 30 | 30 | pinctrl-names = "default"; |
| 31 | 31 | pinctrl-0 = <&mmc0_8bit_pins_a |
| @@ -36,7 +36,7 @@ · 4 unmodified lines | ||
| 36 | 36 | non-removable; |
| 37 | 37 | }; |
| 38 | 38 | |
| 39 | − ssp2: ssp@80014000 { | |
| 39 | + ssp2: spi@80014000 { | |
| 40 | 40 | compatible = "fsl,imx28-mmc"; |
| 41 | 41 | pinctrl-names = "default"; |
| 42 | 42 | pinctrl-0 = <&mmc2_4bit_pins_b |
| @@ -26,7 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | |
| 27 | 27 | apb@80000000 { |
| 28 | 28 | apbh@80000000 { |
| 29 | − ssp0: ssp@80010000 { | |
| 29 | + ssp0: spi@80010000 { | |
| 30 | 30 | compatible = "fsl,imx28-mmc"; |
| 31 | 31 | pinctrl-names = "default"; |
| 32 | 32 | pinctrl-0 = <&mmc0_8bit_pins_a |
| @@ -37,7 +37,7 @@ · 4 unmodified lines | ||
| 37 | 37 | non-removable; |
| 38 | 38 | }; |
| 39 | 39 | |
| 40 | − ssp2: ssp@80014000 { | |
| 40 | + ssp2: spi@80014000 { | |
| 41 | 41 | compatible = "fsl,imx28-mmc"; |
| 42 | 42 | pinctrl-names = "default"; |
| 43 | 43 | pinctrl-0 = <&mmc2_4bit_pins_b |
| @@ -29,7 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | |
| 30 | 30 | apb@80000000 { |
| 31 | 31 | apbh@80000000 { |
| 32 | − ssp0: ssp@80010000 { | |
| 32 | + ssp0: spi@80010000 { | |
| 33 | 33 | compatible = "fsl,imx28-mmc"; |
| 34 | 34 | pinctrl-names = "default"; |
| 35 | 35 | pinctrl-0 = <&mmc0_8bit_pins_a |
| @@ -40,7 +40,7 @@ · 4 unmodified lines | ||
| 40 | 40 | non-removable; |
| 41 | 41 | }; |
| 42 | 42 | |
| 43 | − ssp2: ssp@80014000 { | |
| 43 | + ssp2: spi@80014000 { | |
| 44 | 44 | compatible = "fsl,imx28-spi"; |
| 45 | 45 | pinctrl-names = "default"; |
| 46 | 46 | pinctrl-0 = <&spi2_pins_a>; |
| @@ -25,7 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | apb@80000000 { |
| 27 | 27 | apbh@80000000 { |
| 28 | − ssp0: ssp@80010000 { | |
| 28 | + ssp0: spi@80010000 { | |
| 29 | 29 | compatible = "fsl,imx28-mmc"; |
| 30 | 30 | pinctrl-names = "default"; |
| 31 | 31 | pinctrl-0 = <&mmc0_8bit_pins_a |
| @@ -36,7 +36,7 @@ · 4 unmodified lines | ||
| 36 | 36 | non-removable; |
| 37 | 37 | }; |
| 38 | 38 | |
| 39 | − ssp2: ssp@80014000 { | |
| 39 | + ssp2: spi@80014000 { | |
| 40 | 40 | compatible = "fsl,imx28-mmc"; |
| 41 | 41 | pinctrl-names = "default"; |
| 42 | 42 | pinctrl-0 = <&mmc2_4bit_pins_b |
| @@ -24,7 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | apb@80000000 { |
| 26 | 26 | apbh@80000000 { |
| 27 | − ssp0: ssp@80010000 { | |
| 27 | + ssp0: spi@80010000 { | |
| 28 | 28 | compatible = "fsl,imx28-mmc"; |
| 29 | 29 | pinctrl-names = "default"; |
| 30 | 30 | pinctrl-0 = <&mmc0_4bit_pins_a |
| @@ -34,7 +34,7 @@ · 3 unmodified lines | ||
| 34 | 34 | status = "okay"; |
| 35 | 35 | }; |
| 36 | 36 | |
| 37 | − ssp2: ssp@80014000 { | |
| 37 | + ssp2: spi@80014000 { | |
| 38 | 38 | compatible = "fsl,imx28-spi"; |
| 39 | 39 | pinctrl-names = "default"; |
| 40 | 40 | pinctrl-0 = <&spi2_pins_a>; |
| @@ -103,7 +103,7 @@ · 102 unmodified lines | ||
| 103 | 103 | status = "okay"; |
| 104 | 104 | }; |
| 105 | 105 | |
| 106 | − ssp0: ssp@80010000 { | |
| 106 | + ssp0: spi@80010000 { | |
| 107 | 107 | compatible = "fsl,imx28-mmc"; |
| 108 | 108 | pinctrl-names = "default"; |
| 109 | 109 | pinctrl-0 = <&mmc0_8bit_pins_a |
| @@ -114,13 +114,13 @@ · 4 unmodified lines | ||
| 114 | 114 | status = "okay"; |
| 115 | 115 | }; |
| 116 | 116 | |
| 117 | − ssp1: ssp@80012000 { | |
| 117 | + ssp1: spi@80012000 { | |
| 118 | 118 | compatible = "fsl,imx28-mmc"; |
| 119 | 119 | bus-width = <8>; |
| 120 | 120 | wp-gpios = <&gpio0 28 0>; |
| 121 | 121 | }; |
| 122 | 122 | |
| 123 | − ssp2: ssp@80014000 { | |
| 123 | + ssp2: spi@80014000 { | |
| 124 | 124 | #address-cells = <1>; |
| 125 | 125 | #size-cells = <0>; |
| 126 | 126 | compatible = "fsl,imx28-spi"; |
| @@ -41,7 +41,7 @@ · 40 unmodified lines | ||
| 41 | 41 | }; |
| 42 | 42 | }; |
| 43 | 43 | |
| 44 | − ssp0: ssp@80010000 { | |
| 44 | + ssp0: spi@80010000 { | |
| 45 | 45 | compatible = "fsl,imx28-mmc"; |
| 46 | 46 | pinctrl-names = "default"; |
| 47 | 47 | pinctrl-0 = <&mmc0_4bit_pins_a |
| @@ -52,7 +52,7 @@ · 4 unmodified lines | ||
| 52 | 52 | status = "okay"; |
| 53 | 53 | }; |
| 54 | 54 | |
| 55 | − ssp2: ssp@80014000 { | |
| 55 | + ssp2: spi@80014000 { | |
| 56 | 56 | compatible = "fsl,imx28-mmc"; |
| 57 | 57 | pinctrl-names = "default"; |
| 58 | 58 | pinctrl-0 = <&mmc2_4bit_pins_a |
| @@ -18,7 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | apb@80000000 { |
| 20 | 20 | apbh@80000000 { |
| 21 | − ssp0: ssp@80010000 { | |
| 21 | + ssp0: spi@80010000 { | |
| 22 | 22 | compatible = "fsl,imx28-mmc"; |
| 23 | 23 | pinctrl-names = "default"; |
| 24 | 24 | pinctrl-0 = <&mmc0_8bit_pins_a |
| @@ -30,7 +30,7 @@ · 5 unmodified lines | ||
| 30 | 30 | status = "okay"; |
| 31 | 31 | }; |
| 32 | 32 | |
| 33 | − ssp2: ssp@80014000 { | |
| 33 | + ssp2: spi@80014000 { | |
| 34 | 34 | #address-cells = <1>; |
| 35 | 35 | #size-cells = <0>; |
| 36 | 36 | compatible = "fsl,imx28-spi"; |
| @@ -40,7 +40,7 @@ · 39 unmodified lines | ||
| 40 | 40 | |
| 41 | 41 | }; |
| 42 | 42 | |
| 43 | − ssp0: ssp@80010000 { | |
| 43 | + ssp0: spi@80010000 { | |
| 44 | 44 | compatible = "fsl,imx28-mmc"; |
| 45 | 45 | pinctrl-names = "default"; |
| 46 | 46 | pinctrl-0 = <&mmc0_4bit_pins_a>; |
| @@ -48,7 +48,7 @@ · 1 unmodified line | ||
| 48 | 48 | status = "okay"; |
| 49 | 49 | }; |
| 50 | 50 | |
| 51 | − ssp2: ssp@80014000 { | |
| 51 | + ssp2: spi@80014000 { | |
| 52 | 52 | #address-cells = <1>; |
| 53 | 53 | #size-cells = <0>; |
| 54 | 54 | compatible = "fsl,imx28-spi"; |
| @@ -25,7 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | apb@80000000 { |
| 27 | 27 | apbh@80000000 { |
| 28 | − ssp0: ssp@80010000 { | |
| 28 | + ssp0: spi@80010000 { | |
| 29 | 29 | compatible = "fsl,imx28-mmc"; |
| 30 | 30 | pinctrl-names = "default"; |
| 31 | 31 | pinctrl-0 = <&mmc0_4bit_pins_a |
| @@ -117,7 +117,7 @@ · 116 unmodified lines | ||
| 117 | 117 | status = "disabled"; |
| 118 | 118 | }; |
| 119 | 119 | |
| 120 | − ssp0: ssp@80010000 { | |
| 120 | + ssp0: spi@80010000 { | |
| 121 | 121 | #address-cells = <1>; |
| 122 | 122 | #size-cells = <0>; |
| 123 | 123 | reg = <0x80010000 0x2000>; |
| @@ -128,7 +128,7 @@ · 4 unmodified lines | ||
| 128 | 128 | status = "disabled"; |
| 129 | 129 | }; |
| 130 | 130 | |
| 131 | − ssp1: ssp@80012000 { | |
| 131 | + ssp1: spi@80012000 { | |
| 132 | 132 | #address-cells = <1>; |
| 133 | 133 | #size-cells = <0>; |
| 134 | 134 | reg = <0x80012000 0x2000>; |
| @@ -139,7 +139,7 @@ · 4 unmodified lines | ||
| 139 | 139 | status = "disabled"; |
| 140 | 140 | }; |
| 141 | 141 | |
| 142 | − ssp2: ssp@80014000 { | |
| 142 | + ssp2: spi@80014000 { | |
| 143 | 143 | #address-cells = <1>; |
| 144 | 144 | #size-cells = <0>; |
| 145 | 145 | reg = <0x80014000 0x2000>; |
| @@ -150,7 +150,7 @@ · 4 unmodified lines | ||
| 150 | 150 | status = "disabled"; |
| 151 | 151 | }; |
| 152 | 152 | |
| 153 | − ssp3: ssp@80016000 { | |
| 153 | + ssp3: spi@80016000 { | |
| 154 | 154 | #address-cells = <1>; |
| 155 | 155 | #size-cells = <0>; |
| 156 | 156 | reg = <0x80016000 0x2000>; |
| @@ -206,7 +206,7 @@ · 205 unmodified lines | ||
| 206 | 206 | status = "disabled"; |
| 207 | 207 | }; |
| 208 | 208 | |
| 209 | − spi2: cspi@50010000 { | |
| 209 | + spi2: spi@50010000 { | |
| 210 | 210 | compatible = "fsl,imx31-cspi"; |
| 211 | 211 | reg = <0x50010000 0x4000>; |
| 212 | 212 | interrupts = <13>; |
| @@ -241,7 +241,7 @@ · 28 unmodified lines | ||
| 241 | 241 | #clock-cells = <1>; |
| 242 | 242 | }; |
| 243 | 243 | |
| 244 | − spi3: cspi@53f84000 { | |
| 244 | + spi3: spi@53f84000 { | |
| 245 | 245 | compatible = "fsl,imx31-cspi"; |
| 246 | 246 | reg = <0x53f84000 0x4000>; |
| 247 | 247 | interrupts = <17>; |
| @@ -133,7 +133,7 @@ · 132 unmodified lines | ||
| 133 | 133 | status = "disabled"; |
| 134 | 134 | }; |
| 135 | 135 | |
| 136 | − spi1: cspi@43fa4000 { | |
| 136 | + spi1: spi@43fa4000 { | |
| 137 | 137 | #address-cells = <1>; |
| 138 | 138 | #size-cells = <0>; |
| 139 | 139 | compatible = "fsl,imx35-cspi"; |
| @@ -174,7 +174,7 @@ · 34 unmodified lines | ||
| 174 | 174 | status = "disabled"; |
| 175 | 175 | }; |
| 176 | 176 | |
| 177 | − spi2: cspi@50010000 { | |
| 177 | + spi2: spi@50010000 { | |
| 178 | 178 | #address-cells = <1>; |
| 179 | 179 | #size-cells = <0>; |
| 180 | 180 | compatible = "fsl,imx35-cspi"; |
| @@ -140,7 +140,7 @@ · 139 unmodified lines | ||
| 140 | 140 | status = "disabled"; |
| 141 | 141 | }; |
| 142 | 142 | |
| 143 | − ecspi1: ecspi@50010000 { | |
| 143 | + ecspi1: spi@50010000 { | |
| 144 | 144 | #address-cells = <1>; |
| 145 | 145 | #size-cells = <0>; |
| 146 | 146 | compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi"; |
| @@ -403,7 +403,7 @@ · 256 unmodified lines | ||
| 403 | 403 | status = "disabled"; |
| 404 | 404 | }; |
| 405 | 405 | |
| 406 | − ecspi2: ecspi@63fac000 { | |
| 406 | + ecspi2: spi@63fac000 { | |
| 407 | 407 | #address-cells = <1>; |
| 408 | 408 | #size-cells = <0>; |
| 409 | 409 | compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi"; |
| @@ -426,7 +426,7 @@ · 16 unmodified lines | ||
| 426 | 426 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx50.bin"; |
| 427 | 427 | }; |
| 428 | 428 | |
| 429 | − cspi: cspi@63fc0000 { | |
| 429 | + cspi: spi@63fc0000 { | |
| 430 | 430 | #address-cells = <1>; |
| 431 | 431 | #size-cells = <0>; |
| 432 | 432 | compatible = "fsl,imx50-cspi", "fsl,imx35-cspi"; |
| @@ -204,6 +204,7 @@ · 203 unmodified lines | ||
| 204 | 204 | reg = <0>; |
| 205 | 205 | interrupt-parent = <&gpio1>; |
| 206 | 206 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; |
| 207 | + fsl,mc13xxx-uses-adc; | |
| 207 | 208 | fsl,mc13xxx-uses-rtc; |
| 208 | 209 | |
| 209 | 210 | regulators { |
| @@ -508,7 +508,7 @@ · 507 unmodified lines | ||
| 508 | 508 | }; |
| 509 | 509 | |
| 510 | 510 | ds1341: rtc@68 { |
| 511 | − compatible = "maxim,ds1341"; | |
| 511 | + compatible = "dallas,ds1341"; | |
| 512 | 512 | reg = <0x68>; |
| 513 | 513 | }; |
| 514 | 514 | |
| @@ -342,6 +342,14 @@ · 341 unmodified lines | ||
| 342 | 342 | vcc-supply = <&vusb2_reg>; |
| 343 | 343 | }; |
| 344 | 344 | |
| 345 | +&vpu { | |
| 346 | + status = "disabled"; | |
| 347 | +}; | |
| 348 | + | |
| 349 | +&wdog1 { | |
| 350 | + status = "disabled"; | |
| 351 | +}; | |
| 352 | + | |
| 345 | 353 | &iomuxc { |
| 346 | 354 | pinctrl_ecspi1: ecspi1grp { |
| 347 | 355 | fsl,pins = < |
| @@ -350,6 +350,10 @@ · 349 unmodified lines | ||
| 350 | 350 | vcc-supply = <&vusb2_reg>; |
| 351 | 351 | }; |
| 352 | 352 | |
| 353 | +&vpu { | |
| 354 | + status = "disabled"; | |
| 355 | +}; | |
| 356 | + | |
| 353 | 357 | &wdog1 { |
| 354 | 358 | status = "disabled"; |
| 355 | 359 | }; |
| @@ -197,7 +197,7 @@ · 196 unmodified lines | ||
| 197 | 197 | status = "disabled"; |
| 198 | 198 | }; |
| 199 | 199 | |
| 200 | − ecspi1: ecspi@70010000 { | |
| 200 | + ecspi1: spi@70010000 { | |
| 201 | 201 | #address-cells = <1>; |
| 202 | 202 | #size-cells = <0>; |
| 203 | 203 | compatible = "fsl,imx51-ecspi"; |
| @@ -464,7 +464,7 @@ · 260 unmodified lines | ||
| 464 | 464 | status = "disabled"; |
| 465 | 465 | }; |
| 466 | 466 | |
| 467 | − ecspi2: ecspi@83fac000 { | |
| 467 | + ecspi2: spi@83fac000 { | |
| 468 | 468 | #address-cells = <1>; |
| 469 | 469 | #size-cells = <0>; |
| 470 | 470 | compatible = "fsl,imx51-ecspi"; |
| @@ -487,7 +487,7 @@ · 16 unmodified lines | ||
| 487 | 487 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; |
| 488 | 488 | }; |
| 489 | 489 | |
| 490 | − cspi: cspi@83fc0000 { | |
| 490 | + cspi: spi@83fc0000 { | |
| 491 | 491 | #address-cells = <1>; |
| 492 | 492 | #size-cells = <0>; |
| 493 | 493 | compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; |
| @@ -608,7 +608,7 @@ · 114 unmodified lines | ||
| 608 | 608 | status = "disabled"; |
| 609 | 609 | }; |
| 610 | 610 | |
| 611 | − vpu@83ff4000 { | |
| 611 | + vpu: vpu@83ff4000 { | |
| 612 | 612 | compatible = "fsl,imx51-vpu", "cnm,codahx4"; |
| 613 | 613 | reg = <0x83ff4000 0x1000>; |
| 614 | 614 | interrupts = <9>; |
| @@ -319,7 +319,6 @@ · 318 unmodified lines | ||
| 319 | 319 | &ecspi2 { |
| 320 | 320 | pinctrl-names = "default"; |
| 321 | 321 | pinctrl-0 = <&pinctrl_ecspi2>; |
| 322 | − num-chipselects = <1>; | |
| 323 | 322 | cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; |
| 324 | 323 | status = "okay"; |
| 325 | 324 | |
| @@ -259,7 +259,7 @@ · 258 unmodified lines | ||
| 259 | 259 | status = "disabled"; |
| 260 | 260 | }; |
| 261 | 261 | |
| 262 | − ecspi1: ecspi@50010000 { | |
| 262 | + ecspi1: spi@50010000 { | |
| 263 | 263 | #address-cells = <1>; |
| 264 | 264 | #size-cells = <0>; |
| 265 | 265 | compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; |
| @@ -684,7 +684,7 @@ · 418 unmodified lines | ||
| 684 | 684 | status = "disabled"; |
| 685 | 685 | }; |
| 686 | 686 | |
| 687 | − ecspi2: ecspi@63fac000 { | |
| 687 | + ecspi2: spi@63fac000 { | |
| 688 | 688 | #address-cells = <1>; |
| 689 | 689 | #size-cells = <0>; |
| 690 | 690 | compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; |
| @@ -707,7 +707,7 @@ · 16 unmodified lines | ||
| 707 | 707 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; |
| 708 | 708 | }; |
| 709 | 709 | |
| 710 | − cspi: cspi@63fc0000 { | |
| 710 | + cspi: spi@63fc0000 { | |
| 711 | 711 | #address-cells = <1>; |
| 712 | 712 | #size-cells = <0>; |
| 713 | 713 | compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; |
| @@ -146,7 +146,7 @@ · 145 unmodified lines | ||
| 146 | 146 | &ecspi4 { |
| 147 | 147 | status = "okay"; |
| 148 | 148 | |
| 149 | − mcp251x0: mcp251x@1 { | |
| 149 | + mcp251x0: mcp251x@0 { | |
| 150 | 150 | compatible = "microchip,mcp2515"; |
| 151 | 151 | reg = <0>; |
| 152 | 152 | clocks = <&clk16m>; |
| @@ -1,4 +1,4 @@ | ||
| 1 | −// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (C) 2018 Engicam S.r.l. |
| 4 | 4 | * Copyright (C) 2018 Amarula Solutions B.V. |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | /dts-v1/; |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | /dts-v1/; |
| @@ -84,6 +84,10 @@ · 83 unmodified lines | ||
| 84 | 84 | status = "okay"; |
| 85 | 85 | }; |
| 86 | 86 | |
| 87 | +&clks { | |
| 88 | + fsl,pmic-stby-poweroff; | |
| 89 | +}; | |
| 90 | + | |
| 87 | 91 | &fec { |
| 88 | 92 | pinctrl-names = "default"; |
| 89 | 93 | pinctrl-0 = <&pinctrl_enet>; |
| @@ -164,6 +168,7 @@ · 74 unmodified lines | ||
| 164 | 168 | reg = <0x08>; |
| 165 | 169 | interrupt-parent = <&gpio5>; |
| 166 | 170 | interrupts = <16 8>; |
| 171 | + fsl,pmic-stby-poweroff; | |
| 167 | 172 | |
| 168 | 173 | regulators { |
| 169 | 174 | reg_vddcore: sw1ab { /* VDDARM_IN */ |
| @@ -196,6 +196,8 @@ · 195 unmodified lines | ||
| 196 | 196 | }; |
| 197 | 197 | |
| 198 | 198 | &pcie { |
| 199 | + pinctrl-names = "default"; | |
| 200 | + pinctrl-0 = <&pinctrl_reset_moci>; | |
| 199 | 201 | /* active-high meaning opposite of regular PERST# active-low polarity */ |
| 200 | 202 | reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; |
| 201 | 203 | reset-gpio-active-high; |
| @@ -196,6 +196,8 @@ · 195 unmodified lines | ||
| 196 | 196 | }; |
| 197 | 197 | |
| 198 | 198 | &pcie { |
| 199 | + pinctrl-names = "default"; | |
| 200 | + pinctrl-0 = <&pinctrl_reset_moci>; | |
| 199 | 201 | /* active-high meaning opposite of regular PERST# active-low polarity */ |
| 200 | 202 | reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; |
| 201 | 203 | reset-gpio-active-high; |
| @@ -200,6 +200,8 @@ · 199 unmodified lines | ||
| 200 | 200 | }; |
| 201 | 201 | |
| 202 | 202 | &pcie { |
| 203 | + pinctrl-names = "default"; | |
| 204 | + pinctrl-0 = <&pinctrl_reset_moci>; | |
| 203 | 205 | /* active-high meaning opposite of regular PERST# active-low polarity */ |
| 204 | 206 | reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; |
| 205 | 207 | reset-gpio-active-high; |
| @@ -1,4 +1,4 @@ | ||
| 1 | −// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (C) 2017 Engicam S.r.l. |
| 4 | 4 | * Copyright (C) 2017 Amarula Solutions B.V. |
| @@ -8,10 +8,10 @@ · 3 unmodified lines | ||
| 8 | 8 | /dts-v1/; |
| 9 | 9 | |
| 10 | 10 | #include "imx6q.dtsi" |
| 11 | −#include "imx6qdl-icore.dtsi" | |
| 11 | +#include "imx6qdl-icore-1.5.dtsi" | |
| 12 | 12 | |
| 13 | 13 | / { |
| 14 | − model = "Engicam i.CoreM6 Quad/Dual MIPI Starter Kit"; | |
| 14 | + model = "Engicam i.CoreM6 1.5 Quad/Dual MIPI Starter Kit"; | |
| 15 | 15 | compatible = "engicam,imx6-icore", "fsl,imx6q"; |
| 16 | 16 | }; |
| 17 | 17 | |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | /dts-v1/; |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | /dts-v1/; |
| @@ -1,42 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2015 Amarula Solutions B.V. |
| 3 | − * | |
| 4 | − * This file is dual-licensed: you can use it either under the terms | |
| 5 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 6 | − * licensing only applies to this file, and not this project as a | |
| 7 | − * whole. | |
| 8 | − * | |
| 9 | − * a) This file is free software; you can redistribute it and/or | |
| 10 | − * modify it under the terms of the GNU General Public License | |
| 11 | − * version 2 as published by the Free Software Foundation. | |
| 12 | − * | |
| 13 | − * This file is distributed in the hope that it will be useful, | |
| 14 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | − * GNU General Public License for more details. | |
| 17 | − * | |
| 18 | − * Or, alternatively, | |
| 19 | − * | |
| 20 | − * b) Permission is hereby granted, free of charge, to any person | |
| 21 | − * obtaining a copy of this software and associated documentation | |
| 22 | − * files (the "Software"), to deal in the Software without | |
| 23 | − * restriction, including without limitation the rights to use, | |
| 24 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 25 | − * sell copies of the Software, and to permit persons to whom the | |
| 26 | − * Software is furnished to do so, subject to the following | |
| 27 | − * conditions: | |
| 28 | − * | |
| 29 | − * The above copyright notice and this permission notice shall be | |
| 30 | − * included in all copies or substantial portions of the Software. | |
| 31 | − * | |
| 32 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 33 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 34 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 35 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 36 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 37 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 38 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 39 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 4 | + * Copyright (C) 2015 Engicam S.r.l. | |
| 40 | 5 | */ |
| 41 | 6 | |
| 42 | 7 | /dts-v1/; |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | /dts-v1/; |
| @@ -163,7 +163,7 @@ · 162 unmodified lines | ||
| 163 | 163 | |
| 164 | 164 | aips-bus@2000000 { /* AIPS1 */ |
| 165 | 165 | spba-bus@2000000 { |
| 166 | − ecspi5: ecspi@2018000 { | |
| 166 | + ecspi5: spi@2018000 { | |
| 167 | 167 | #address-cells = <1>; |
| 168 | 168 | #size-cells = <0>; |
| 169 | 169 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| @@ -482,10 +482,6 @@ · 481 unmodified lines | ||
| 482 | 482 | }; |
| 483 | 483 | |
| 484 | 484 | &iomuxc { |
| 485 | − /* pins used on module */ | |
| 486 | − pinctrl-names = "default"; | |
| 487 | − pinctrl-0 = <&pinctrl_reset_moci>; | |
| 488 | − | |
| 489 | 485 | pinctrl_apalis_gpio1: gpio2io04grp { |
| 490 | 486 | fsl,pins = < |
| 491 | 487 | MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 |
| @@ -0,0 +1,34 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0+ | |
| 2 | +/* | |
| 3 | + * Copyright (C) 2018 Jacopo Mondi <jacopo@jmondi.org> | |
| 4 | + */ | |
| 5 | + | |
| 6 | +#include "imx6qdl-icore.dtsi" | |
| 7 | + | |
| 8 | +&iomuxc { | |
| 9 | + pinctrl_enet: enetgrp { | |
| 10 | + fsl,pins = < | |
| 11 | + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 | |
| 12 | + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0b0 | |
| 13 | + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 | |
| 14 | + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 | |
| 15 | + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 | |
| 16 | + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 | |
| 17 | + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 | |
| 18 | + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | |
| 19 | + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | |
| 20 | + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 | |
| 21 | + >; | |
| 22 | + }; | |
| 23 | +}; | |
| 24 | + | |
| 25 | +&fec { | |
| 26 | + pinctrl-names = "default"; | |
| 27 | + pinctrl-0 = <&pinctrl_enet>; | |
| 28 | + phy-reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; | |
| 29 | + clocks = <&clks IMX6QDL_CLK_ENET>, | |
| 30 | + <&clks IMX6QDL_CLK_ENET>, | |
| 31 | + <&clks IMX6QDL_CLK_ENET_REF>; | |
| 32 | + phy-mode = "rmii"; | |
| 33 | + status = "okay"; | |
| 34 | +}; | |
| @@ -1,42 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2015 Amarula Solutions B.V. |
| 3 | − * | |
| 4 | − * This file is dual-licensed: you can use it either under the terms | |
| 5 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 6 | − * licensing only applies to this file, and not this project as a | |
| 7 | − * whole. | |
| 8 | − * | |
| 9 | − * a) This file is free software; you can redistribute it and/or | |
| 10 | − * modify it under the terms of the GNU General Public License | |
| 11 | − * version 2 as published by the Free Software Foundation. | |
| 12 | − * | |
| 13 | − * This file is distributed in the hope that it will be useful, | |
| 14 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | − * GNU General Public License for more details. | |
| 17 | − * | |
| 18 | − * Or, alternatively, | |
| 19 | − * | |
| 20 | − * b) Permission is hereby granted, free of charge, to any person | |
| 21 | − * obtaining a copy of this software and associated documentation | |
| 22 | − * files (the "Software"), to deal in the Software without | |
| 23 | − * restriction, including without limitation the rights to use, | |
| 24 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 25 | − * sell copies of the Software, and to permit persons to whom the | |
| 26 | − * Software is furnished to do so, subject to the following | |
| 27 | − * conditions: | |
| 28 | − * | |
| 29 | − * The above copyright notice and this permission notice shall be | |
| 30 | − * included in all copies or substantial portions of the Software. | |
| 31 | − * | |
| 32 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 33 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 34 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 35 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 36 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 37 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 38 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 39 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 4 | + * Copyright (C) 2015 Engicam S.r.l. | |
| 40 | 5 | */ |
| 41 | 6 | |
| 42 | 7 | #include <dt-bindings/gpio/gpio.h> |
| @@ -316,7 +281,7 @@ · 273 unmodified lines | ||
| 316 | 281 | }; |
| 317 | 282 | |
| 318 | 283 | &iomuxc { |
| 319 | − pinctrl_audmux: audmux { | |
| 284 | + pinctrl_audmux: audmuxgrp { | |
| 320 | 285 | fsl,pins = < |
| 321 | 286 | MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 |
| 322 | 287 | MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0 |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | #include <dt-bindings/gpio/gpio.h> |
| @@ -310,7 +274,7 @@ · 266 unmodified lines | ||
| 310 | 274 | }; |
| 311 | 275 | |
| 312 | 276 | &iomuxc { |
| 313 | − pinctrl_audmux: audmux { | |
| 277 | + pinctrl_audmux: audmuxgrp { | |
| 314 | 278 | fsl,pins = < |
| 315 | 279 | MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 |
| 316 | 280 | MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0 |
| @@ -349,7 +313,7 @@ · 32 unmodified lines | ||
| 349 | 313 | >; |
| 350 | 314 | }; |
| 351 | 315 | |
| 352 | − pinctrl_gpmi_nand: gpmi-nand { | |
| 316 | + pinctrl_gpmi_nand: gpminandgrp { | |
| 353 | 317 | fsl,pins = < |
| 354 | 318 | MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 |
| 355 | 319 | MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 |
| @@ -4,6 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | // Copyright 2011 Linaro Ltd. |
| 5 | 5 | |
| 6 | 6 | #include <dt-bindings/gpio/gpio.h> |
| 7 | +#include <dt-bindings/input/input.h> | |
| 7 | 8 | |
| 8 | 9 | / { |
| 9 | 10 | chosen { |
| @@ -25,6 +26,47 @@ · 15 unmodified lines | ||
| 25 | 26 | }; |
| 26 | 27 | }; |
| 27 | 28 | |
| 29 | + gpio-keys { | |
| 30 | + compatible = "gpio-keys"; | |
| 31 | + pinctrl-names = "default"; | |
| 32 | + pinctrl-0 = <&pinctrl_gpio_keys>; | |
| 33 | + | |
| 34 | + home { | |
| 35 | + label = "Home"; | |
| 36 | + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; | |
| 37 | + linux,code = <KEY_HOME>; | |
| 38 | + wakeup-source; | |
| 39 | + }; | |
| 40 | + | |
| 41 | + back { | |
| 42 | + label = "Back"; | |
| 43 | + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; | |
| 44 | + linux,code = <KEY_BACK>; | |
| 45 | + wakeup-source; | |
| 46 | + }; | |
| 47 | + | |
| 48 | + program { | |
| 49 | + label = "Program"; | |
| 50 | + gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; | |
| 51 | + linux,code = <KEY_PROGRAM>; | |
| 52 | + wakeup-source; | |
| 53 | + }; | |
| 54 | + | |
| 55 | + volume-up { | |
| 56 | + label = "Volume Up"; | |
| 57 | + gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; | |
| 58 | + linux,code = <KEY_VOLUMEUP>; | |
| 59 | + wakeup-source; | |
| 60 | + }; | |
| 61 | + | |
| 62 | + volume-down { | |
| 63 | + label = "Volume Down"; | |
| 64 | + gpios = <&gpio5 14 GPIO_ACTIVE_LOW>; | |
| 65 | + linux,code = <KEY_VOLUMEDOWN>; | |
| 66 | + wakeup-source; | |
| 67 | + }; | |
| 68 | + }; | |
| 69 | + | |
| 28 | 70 | clocks { |
| 29 | 71 | codec_osc: anaclk2 { |
| 30 | 72 | compatible = "fixed-clock"; |
| @@ -375,6 +417,15 @@ · 344 unmodified lines | ||
| 375 | 417 | VLC-supply = <®_audio>; |
| 376 | 418 | }; |
| 377 | 419 | |
| 420 | + touchscreen@4 { | |
| 421 | + compatible = "eeti,egalax_ts"; | |
| 422 | + reg = <0x04>; | |
| 423 | + pinctrl-names = "default"; | |
| 424 | + pinctrl-0 = <&pinctrl_egalax_int>; | |
| 425 | + interrupt-parent = <&gpio2>; | |
| 426 | + interrupts = <28 IRQ_TYPE_EDGE_FALLING>; | |
| 427 | + wakeup-gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>; | |
| 428 | + }; | |
| 378 | 429 | }; |
| 379 | 430 | |
| 380 | 431 | &i2c3 { |
| @@ -410,6 +461,12 @@ · 29 unmodified lines | ||
| 410 | 461 | >; |
| 411 | 462 | }; |
| 412 | 463 | |
| 464 | + pinctrl_egalax_int: egalax-intgrp { | |
| 465 | + fsl,pins = < | |
| 466 | + MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0xb0b1 | |
| 467 | + >; | |
| 468 | + }; | |
| 469 | + | |
| 413 | 470 | pinctrl_enet: enetgrp { |
| 414 | 471 | fsl,pins = < |
| 415 | 472 | MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 |
| @@ -446,6 +503,16 @@ · 30 unmodified lines | ||
| 446 | 503 | >; |
| 447 | 504 | }; |
| 448 | 505 | |
| 506 | + pinctrl_gpio_keys: gpiokeysgrp { | |
| 507 | + fsl,pins = < | |
| 508 | + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0 | |
| 509 | + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 | |
| 510 | + MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0 | |
| 511 | + MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 | |
| 512 | + MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0 | |
| 513 | + >; | |
| 514 | + }; | |
| 515 | + | |
| 449 | 516 | pinctrl_gpio_leds: gpioledsgrp { |
| 450 | 517 | fsl,pins = < |
| 451 | 518 | MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x80000000 |
| @@ -8,6 +8,10 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <dt-bindings/gpio/gpio.h> |
| 9 | 9 | |
| 10 | 10 | / { |
| 11 | + chosen { | |
| 12 | + stdout-path = &uart1; | |
| 13 | + }; | |
| 14 | + | |
| 11 | 15 | sound { |
| 12 | 16 | compatible = "fsl,imx6-wandboard-sgtl5000", |
| 13 | 17 | "fsl,imx-audio-sgtl5000"; |
| @@ -813,6 +813,10 @@ · 812 unmodified lines | ||
| 813 | 813 | status = "okay"; |
| 814 | 814 | }; |
| 815 | 815 | |
| 816 | +&snvs_rtc { | |
| 817 | + status = "disabled"; | |
| 818 | +}; | |
| 819 | + | |
| 816 | 820 | &ssi1 { |
| 817 | 821 | status = "okay"; |
| 818 | 822 | }; |
| @@ -317,7 +317,7 @@ · 316 unmodified lines | ||
| 317 | 317 | status = "disabled"; |
| 318 | 318 | }; |
| 319 | 319 | |
| 320 | − ecspi1: ecspi@2008000 { | |
| 320 | + ecspi1: spi@2008000 { | |
| 321 | 321 | #address-cells = <1>; |
| 322 | 322 | #size-cells = <0>; |
| 323 | 323 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| @@ -331,7 +331,7 @@ · 7 unmodified lines | ||
| 331 | 331 | status = "disabled"; |
| 332 | 332 | }; |
| 333 | 333 | |
| 334 | − ecspi2: ecspi@200c000 { | |
| 334 | + ecspi2: spi@200c000 { | |
| 335 | 335 | #address-cells = <1>; |
| 336 | 336 | #size-cells = <0>; |
| 337 | 337 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| @@ -345,7 +345,7 @@ · 7 unmodified lines | ||
| 345 | 345 | status = "disabled"; |
| 346 | 346 | }; |
| 347 | 347 | |
| 348 | − ecspi3: ecspi@2010000 { | |
| 348 | + ecspi3: spi@2010000 { | |
| 349 | 349 | #address-cells = <1>; |
| 350 | 350 | #size-cells = <0>; |
| 351 | 351 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| @@ -359,7 +359,7 @@ · 7 unmodified lines | ||
| 359 | 359 | status = "disabled"; |
| 360 | 360 | }; |
| 361 | 361 | |
| 362 | − ecspi4: ecspi@2014000 { | |
| 362 | + ecspi4: spi@2014000 { | |
| 363 | 363 | #address-cells = <1>; |
| 364 | 364 | #size-cells = <0>; |
| 365 | 365 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| @@ -168,7 +168,7 @@ · 167 unmodified lines | ||
| 168 | 168 | status = "disabled"; |
| 169 | 169 | }; |
| 170 | 170 | |
| 171 | − ecspi1: ecspi@2008000 { | |
| 171 | + ecspi1: spi@2008000 { | |
| 172 | 172 | #address-cells = <1>; |
| 173 | 173 | #size-cells = <0>; |
| 174 | 174 | compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; |
| @@ -180,7 +180,7 @@ · 5 unmodified lines | ||
| 180 | 180 | status = "disabled"; |
| 181 | 181 | }; |
| 182 | 182 | |
| 183 | − ecspi2: ecspi@200c000 { | |
| 183 | + ecspi2: spi@200c000 { | |
| 184 | 184 | #address-cells = <1>; |
| 185 | 185 | #size-cells = <0>; |
| 186 | 186 | compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; |
| @@ -192,7 +192,7 @@ · 5 unmodified lines | ||
| 192 | 192 | status = "disabled"; |
| 193 | 193 | }; |
| 194 | 194 | |
| 195 | − ecspi3: ecspi@2010000 { | |
| 195 | + ecspi3: spi@2010000 { | |
| 196 | 196 | #address-cells = <1>; |
| 197 | 197 | #size-cells = <0>; |
| 198 | 198 | compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; |
| @@ -204,7 +204,7 @@ · 5 unmodified lines | ||
| 204 | 204 | status = "disabled"; |
| 205 | 205 | }; |
| 206 | 206 | |
| 207 | − ecspi4: ecspi@2014000 { | |
| 207 | + ecspi4: spi@2014000 { | |
| 208 | 208 | #address-cells = <1>; |
| 209 | 209 | #size-cells = <0>; |
| 210 | 210 | compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; |
| @@ -375,10 +375,12 @@ · 374 unmodified lines | ||
| 375 | 375 | reg = <0x0209c000 0x4000>; |
| 376 | 376 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, |
| 377 | 377 | <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; |
| 378 | + clocks = <&clks IMX6SLL_CLK_GPIO1>; | |
| 378 | 379 | gpio-controller; |
| 379 | 380 | #gpio-cells = <2>; |
| 380 | 381 | interrupt-controller; |
| 381 | 382 | #interrupt-cells = <2>; |
| 383 | + gpio-ranges = <&iomuxc 0 94 7>, <&iomuxc 7 25 25>; | |
| 382 | 384 | }; |
| 383 | 385 | |
| 384 | 386 | gpio2: gpio@20a0000 { |
| @@ -386,10 +388,12 @@ · 1 unmodified line | ||
| 386 | 388 | reg = <0x020a0000 0x4000>; |
| 387 | 389 | interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, |
| 388 | 390 | <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
| 391 | + clocks = <&clks IMX6SLL_CLK_GPIO2>; | |
| 389 | 392 | gpio-controller; |
| 390 | 393 | #gpio-cells = <2>; |
| 391 | 394 | interrupt-controller; |
| 392 | 395 | #interrupt-cells = <2>; |
| 396 | + gpio-ranges = <&iomuxc 0 50 32>; | |
| 393 | 397 | }; |
| 394 | 398 | |
| 395 | 399 | gpio3: gpio@20a4000 { |
| @@ -397,10 +401,14 @@ · 1 unmodified line | ||
| 397 | 401 | reg = <0x020a4000 0x4000>; |
| 398 | 402 | interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, |
| 399 | 403 | <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; |
| 404 | + clocks = <&clks IMX6SLL_CLK_GPIO3>; | |
| 400 | 405 | gpio-controller; |
| 401 | 406 | #gpio-cells = <2>; |
| 402 | 407 | interrupt-controller; |
| 403 | 408 | #interrupt-cells = <2>; |
| 409 | + gpio-ranges = <&iomuxc 0 82 12>, <&iomuxc 12 103 4>, | |
| 410 | + <&iomuxc 16 101 2>, <&iomuxc 18 5 1>, | |
| 411 | + <&iomuxc 21 6 11>; | |
| 404 | 412 | }; |
| 405 | 413 | |
| 406 | 414 | gpio4: gpio@20a8000 { |
| @@ -408,10 +416,20 @@ · 1 unmodified line | ||
| 408 | 416 | reg = <0x020a8000 0x4000>; |
| 409 | 417 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, |
| 410 | 418 | <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
| 419 | + clocks = <&clks IMX6SLL_CLK_GPIO4>; | |
| 411 | 420 | gpio-controller; |
| 412 | 421 | #gpio-cells = <2>; |
| 413 | 422 | interrupt-controller; |
| 414 | 423 | #interrupt-cells = <2>; |
| 424 | + gpio-ranges = <&iomuxc 0 17 8>, <&iomuxc 8 107 8>, | |
| 425 | + <&iomuxc 16 151 1>, <&iomuxc 17 149 1>, | |
| 426 | + <&iomuxc 18 146 1>, <&iomuxc 19 144 1>, | |
| 427 | + <&iomuxc 20 142 1>, <&iomuxc 21 143 1>, | |
| 428 | + <&iomuxc 22 150 1>, <&iomuxc 23 148 1>, | |
| 429 | + <&iomuxc 24 147 1>, <&iomuxc 25 145 1>, | |
| 430 | + <&iomuxc 26 152 1>, <&iomuxc 27 125 1>, | |
| 431 | + <&iomuxc 28 131 1>, <&iomuxc 29 134 1>, | |
| 432 | + <&iomuxc 30 129 1>, <&iomuxc 31 133 1>; | |
| 415 | 433 | }; |
| 416 | 434 | |
| 417 | 435 | gpio5: gpio@20ac000 { |
| @@ -419,10 +437,22 @@ · 1 unmodified line | ||
| 419 | 437 | reg = <0x020ac000 0x4000>; |
| 420 | 438 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, |
| 421 | 439 | <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; |
| 440 | + clocks = <&clks IMX6SLL_CLK_GPIO5>; | |
| 422 | 441 | gpio-controller; |
| 423 | 442 | #gpio-cells = <2>; |
| 424 | 443 | interrupt-controller; |
| 425 | 444 | #interrupt-cells = <2>; |
| 445 | + gpio-ranges = <&iomuxc 0 135 1>, <&iomuxc 1 128 1>, | |
| 446 | + <&iomuxc 2 132 1>, <&iomuxc 3 130 1>, | |
| 447 | + <&iomuxc 4 127 1>, <&iomuxc 5 126 1>, | |
| 448 | + <&iomuxc 6 120 1>, <&iomuxc 7 123 1>, | |
| 449 | + <&iomuxc 8 118 1>, <&iomuxc 9 122 1>, | |
| 450 | + <&iomuxc 10 124 1>, <&iomuxc 11 117 1>, | |
| 451 | + <&iomuxc 12 121 1>, <&iomuxc 13 119 1>, | |
| 452 | + <&iomuxc 14 116 1>, <&iomuxc 15 115 1>, | |
| 453 | + <&iomuxc 16 140 2>, <&iomuxc 18 136 1>, | |
| 454 | + <&iomuxc 19 138 1>, <&iomuxc 20 139 1>, | |
| 455 | + <&iomuxc 21 137 1>; | |
| 426 | 456 | }; |
| 427 | 457 | |
| 428 | 458 | gpio6: gpio@20b0000 { |
| @@ -430,6 +460,7 @@ · 1 unmodified line | ||
| 430 | 460 | reg = <0x020b0000 0x4000>; |
| 431 | 461 | interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, |
| 432 | 462 | <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; |
| 463 | + clocks = <&clks IMX6SLL_CLK_GPIO6>; | |
| 433 | 464 | gpio-controller; |
| 434 | 465 | #gpio-cells = <2>; |
| 435 | 466 | interrupt-controller; |
| @@ -40,12 +40,14 @@ · 39 unmodified lines | ||
| 40 | 40 | label = "Volume Up"; |
| 41 | 41 | gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; |
| 42 | 42 | linux,code = <KEY_VOLUMEUP>; |
| 43 | + wakeup-source; | |
| 43 | 44 | }; |
| 44 | 45 | |
| 45 | 46 | volume-down { |
| 46 | 47 | label = "Volume Down"; |
| 47 | 48 | gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
| 48 | 49 | linux,code = <KEY_VOLUMEDOWN>; |
| 50 | + wakeup-source; | |
| 49 | 51 | }; |
| 50 | 52 | }; |
| 51 | 53 | |
| @@ -268,7 +268,7 @@ · 267 unmodified lines | ||
| 268 | 268 | status = "disabled"; |
| 269 | 269 | }; |
| 270 | 270 | |
| 271 | − ecspi1: ecspi@2008000 { | |
| 271 | + ecspi1: spi@2008000 { | |
| 272 | 272 | #address-cells = <1>; |
| 273 | 273 | #size-cells = <0>; |
| 274 | 274 | compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; |
| @@ -280,7 +280,7 @@ · 5 unmodified lines | ||
| 280 | 280 | status = "disabled"; |
| 281 | 281 | }; |
| 282 | 282 | |
| 283 | − ecspi2: ecspi@200c000 { | |
| 283 | + ecspi2: spi@200c000 { | |
| 284 | 284 | #address-cells = <1>; |
| 285 | 285 | #size-cells = <0>; |
| 286 | 286 | compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; |
| @@ -292,7 +292,7 @@ · 5 unmodified lines | ||
| 292 | 292 | status = "disabled"; |
| 293 | 293 | }; |
| 294 | 294 | |
| 295 | − ecspi3: ecspi@2010000 { | |
| 295 | + ecspi3: spi@2010000 { | |
| 296 | 296 | #address-cells = <1>; |
| 297 | 297 | #size-cells = <0>; |
| 298 | 298 | compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; |
| @@ -304,7 +304,7 @@ · 5 unmodified lines | ||
| 304 | 304 | status = "disabled"; |
| 305 | 305 | }; |
| 306 | 306 | |
| 307 | − ecspi4: ecspi@2014000 { | |
| 307 | + ecspi4: spi@2014000 { | |
| 308 | 308 | #address-cells = <1>; |
| 309 | 309 | #size-cells = <0>; |
| 310 | 310 | compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; |
| @@ -1079,7 +1079,7 @@ · 768 unmodified lines | ||
| 1079 | 1079 | status = "disabled"; |
| 1080 | 1080 | }; |
| 1081 | 1081 | |
| 1082 | − qspi1: qspi@21e0000 { | |
| 1082 | + qspi1: spi@21e0000 { | |
| 1083 | 1083 | #address-cells = <1>; |
| 1084 | 1084 | #size-cells = <0>; |
| 1085 | 1085 | compatible = "fsl,imx6sx-qspi"; |
| @@ -1092,7 +1092,7 @@ · 6 unmodified lines | ||
| 1092 | 1092 | status = "disabled"; |
| 1093 | 1093 | }; |
| 1094 | 1094 | |
| 1095 | − qspi2: qspi@21e4000 { | |
| 1095 | + qspi2: spi@21e4000 { | |
| 1096 | 1096 | #address-cells = <1>; |
| 1097 | 1097 | #size-cells = <0>; |
| 1098 | 1098 | compatible = "fsl,imx6sx-qspi"; |
| @@ -1273,7 +1273,7 @@ · 174 unmodified lines | ||
| 1273 | 1273 | status = "disabled"; |
| 1274 | 1274 | }; |
| 1275 | 1275 | |
| 1276 | − ecspi5: ecspi@228c000 { | |
| 1276 | + ecspi5: spi@228c000 { | |
| 1277 | 1277 | #address-cells = <1>; |
| 1278 | 1278 | #size-cells = <0>; |
| 1279 | 1279 | compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; |
| @@ -0,0 +1,390 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | +/* | |
| 3 | + * Digi International's ConnectCore6UL SBC Pro board device tree source | |
| 4 | + * | |
| 5 | + * Copyright 2018 Digi International, Inc. | |
| 6 | + * | |
| 7 | + */ | |
| 8 | + | |
| 9 | +/dts-v1/; | |
| 10 | +#include <dt-bindings/input/input.h> | |
| 11 | +#include <dt-bindings/interrupt-controller/irq.h> | |
| 12 | +#include "imx6ul.dtsi" | |
| 13 | +#include "imx6ul-ccimx6ulsom.dtsi" | |
| 14 | + | |
| 15 | +/ { | |
| 16 | + model = "Digi International ConnectCore 6UL SBC Pro."; | |
| 17 | + compatible = "digi,ccimx6ulsbcpro", "digi,ccimx6ulsom", "fsl,imx6ul"; | |
| 18 | + | |
| 19 | + lcd_backlight: backlight { | |
| 20 | + compatible = "pwm-backlight"; | |
| 21 | + pwms = <&pwm5 0 50000>; | |
| 22 | + brightness-levels = <0 4 8 16 32 64 128 255>; | |
| 23 | + default-brightness-level = <6>; | |
| 24 | + status = "okay"; | |
| 25 | + }; | |
| 26 | + | |
| 27 | + reg_usb_otg1_vbus: regulator-usb-otg1 { | |
| 28 | + compatible = "regulator-fixed"; | |
| 29 | + regulator-name = "usb_otg1_vbus"; | |
| 30 | + regulator-min-microvolt = <5000000>; | |
| 31 | + regulator-max-microvolt = <5000000>; | |
| 32 | + gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; | |
| 33 | + enable-active-high; | |
| 34 | + }; | |
| 35 | +}; | |
| 36 | + | |
| 37 | +&adc1 { | |
| 38 | + pinctrl-names = "default"; | |
| 39 | + pinctrl-0 = <&pinctrl_adc1>; | |
| 40 | + status = "okay"; | |
| 41 | +}; | |
| 42 | + | |
| 43 | +&can1 { | |
| 44 | + pinctrl-names = "default"; | |
| 45 | + pinctrl-0 = <&pinctrl_flexcan1>; | |
| 46 | + xceiver-supply = <&ext_3v3>; | |
| 47 | + status = "okay"; | |
| 48 | +}; | |
| 49 | + | |
| 50 | +/* CAN2 is multiplexed with UART2 RTS/CTS */ | |
| 51 | +&can2 { | |
| 52 | + pinctrl-names = "default"; | |
| 53 | + pinctrl-0 = <&pinctrl_flexcan2>; | |
| 54 | + xceiver-supply = <&ext_3v3>; | |
| 55 | + status = "disabled"; | |
| 56 | +}; | |
| 57 | + | |
| 58 | +&ecspi1 { | |
| 59 | + cs-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; | |
| 60 | + pinctrl-names = "default"; | |
| 61 | + pinctrl-0 = <&pinctrl_ecspi1_master>; | |
| 62 | + status = "okay"; | |
| 63 | +}; | |
| 64 | + | |
| 65 | +&fec1 { | |
| 66 | + pinctrl-names = "default"; | |
| 67 | + pinctrl-0 = <&pinctrl_enet1>; | |
| 68 | + phy-mode = "rmii"; | |
| 69 | + phy-handle = <ðphy0>; | |
| 70 | + status = "okay"; | |
| 71 | +}; | |
| 72 | + | |
| 73 | +&fec2 { | |
| 74 | + pinctrl-names = "default"; | |
| 75 | + pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio>; | |
| 76 | + phy-mode = "rmii"; | |
| 77 | + phy-handle = <ðphy1>; | |
| 78 | + phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>; | |
| 79 | + phy-reset-duration = <26>; | |
| 80 | + status = "okay"; | |
| 81 | + | |
| 82 | + mdio { | |
| 83 | + #address-cells = <1>; | |
| 84 | + #size-cells = <0>; | |
| 85 | + | |
| 86 | + ethphy0: ethernet-phy@0 { | |
| 87 | + compatible = "ethernet-phy-ieee802.3-c22"; | |
| 88 | + smsc,disable-energy-detect; | |
| 89 | + reg = <0>; | |
| 90 | + }; | |
| 91 | + | |
| 92 | + ethphy1: ethernet-phy@1 { | |
| 93 | + compatible = "ethernet-phy-ieee802.3-c22"; | |
| 94 | + smsc,disable-energy-detect; | |
| 95 | + reg = <1>; | |
| 96 | + }; | |
| 97 | + }; | |
| 98 | +}; | |
| 99 | + | |
| 100 | +&gpio5 { | |
| 101 | + emmc-usd-mux { | |
| 102 | + gpio-hog; | |
| 103 | + gpios = <1 GPIO_ACTIVE_LOW>; | |
| 104 | + output-high; | |
| 105 | + }; | |
| 106 | +}; | |
| 107 | + | |
| 108 | +&lcdif { | |
| 109 | + pinctrl-names = "default"; | |
| 110 | + pinctrl-0 = <&pinctrl_lcdif_dat0_17 | |
| 111 | + &pinctrl_lcdif_clken | |
| 112 | + &pinctrl_lcdif_hvsync>; | |
| 113 | + lcd-supply = <&ldo4_ext>; /* BU90T82 LVDS bridge power */ | |
| 114 | + status = "okay"; | |
| 115 | +}; | |
| 116 | + | |
| 117 | +&ldo4_ext { | |
| 118 | + regulator-max-microvolt = <1800000>; | |
| 119 | +}; | |
| 120 | + | |
| 121 | +&pwm1 { | |
| 122 | + status = "okay"; | |
| 123 | +}; | |
| 124 | + | |
| 125 | +&pwm2 { | |
| 126 | + status = "okay"; | |
| 127 | +}; | |
| 128 | + | |
| 129 | +&pwm3 { | |
| 130 | + status = "okay"; | |
| 131 | +}; | |
| 132 | + | |
| 133 | +&pwm4 { | |
| 134 | + pinctrl-names = "default"; | |
| 135 | + pinctrl-0 = <&pinctrl_pwm4>; | |
| 136 | + status = "okay"; | |
| 137 | +}; | |
| 138 | + | |
| 139 | +&pwm5 { | |
| 140 | + pinctrl-names = "default"; | |
| 141 | + pinctrl-0 = <&pinctrl_pwm5>; | |
| 142 | + status = "okay"; | |
| 143 | +}; | |
| 144 | + | |
| 145 | +&pwm6 { | |
| 146 | + status = "okay"; | |
| 147 | +}; | |
| 148 | + | |
| 149 | +&pwm7 { | |
| 150 | + status = "okay"; | |
| 151 | +}; | |
| 152 | + | |
| 153 | +&pwm8 { | |
| 154 | + status = "okay"; | |
| 155 | +}; | |
| 156 | + | |
| 157 | +&sai2 { | |
| 158 | + pinctrl-names = "default", "sleep"; | |
| 159 | + pinctrl-0 = <&pinctrl_sai2>; | |
| 160 | + pinctrl-1 = <&pinctrl_sai2_sleep>; | |
| 161 | + assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, | |
| 162 | + <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>, | |
| 163 | + <&clks IMX6UL_CLK_SAI2>; | |
| 164 | + assigned-clock-rates = <0>, <786432000>, <12288000>; | |
| 165 | + assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; | |
| 166 | + status = "okay"; | |
| 167 | +}; | |
| 168 | + | |
| 169 | +/* UART2 RTS/CTS muxed with CAN2 */ | |
| 170 | +&uart2 { | |
| 171 | + pinctrl-names = "default"; | |
| 172 | + pinctrl-0 = <&pinctrl_uart2_4wires>; | |
| 173 | + uart-has-rtscts; | |
| 174 | + status = "okay"; | |
| 175 | +}; | |
| 176 | + | |
| 177 | +/* UART3 RTS/CTS muxed with CAN 1 */ | |
| 178 | +&uart3 { | |
| 179 | + pinctrl-names = "default"; | |
| 180 | + pinctrl-0 = <&pinctrl_uart3_2wires>; | |
| 181 | + status = "okay"; | |
| 182 | +}; | |
| 183 | + | |
| 184 | +&uart5 { | |
| 185 | + pinctrl-names = "default"; | |
| 186 | + pinctrl-0 = <&pinctrl_uart5>; | |
| 187 | + status = "okay"; | |
| 188 | +}; | |
| 189 | + | |
| 190 | +&usbotg1 { | |
| 191 | + dr_mode = "otg"; | |
| 192 | + vbus-supply = <®_usb_otg1_vbus>; | |
| 193 | + pinctrl-0 = <&pinctrl_usbotg1>; | |
| 194 | + status = "okay"; | |
| 195 | +}; | |
| 196 | + | |
| 197 | +&usbotg2 { | |
| 198 | + dr_mode = "host"; | |
| 199 | + disable-over-current; | |
| 200 | + status = "okay"; | |
| 201 | +}; | |
| 202 | + | |
| 203 | +/* USDHC2 (microSD conflicts with eMMC) */ | |
| 204 | +&usdhc2 { | |
| 205 | + pinctrl-names = "default"; | |
| 206 | + pinctrl-0 = <&pinctrl_usdhc2>; | |
| 207 | + no-1-8-v; | |
| 208 | + broken-cd; /* no carrier detect line (use polling) */ | |
| 209 | + status = "okay"; | |
| 210 | +}; | |
| 211 | + | |
| 212 | +&iomuxc { | |
| 213 | + pinctrl_adc1: adc1grp { | |
| 214 | + fsl,pins = < | |
| 215 | + /* EXP_GPIO_2 -> GPIO1_3/ADC1_IN3 */ | |
| 216 | + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 | |
| 217 | + >; | |
| 218 | + }; | |
| 219 | + | |
| 220 | + pinctrl_ecspi1_master: ecspi1grp1 { | |
| 221 | + fsl,pins = < | |
| 222 | + MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x10b0 | |
| 223 | + MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x10b0 | |
| 224 | + MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x10b0 | |
| 225 | + MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x10b0 | |
| 226 | + >; | |
| 227 | + }; | |
| 228 | + | |
| 229 | + pinctrl_enet1: enet1grp { | |
| 230 | + fsl,pins = < | |
| 231 | + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 | |
| 232 | + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 | |
| 233 | + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 | |
| 234 | + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 | |
| 235 | + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 | |
| 236 | + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 | |
| 237 | + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 | |
| 238 | + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x40017051 | |
| 239 | + >; | |
| 240 | + }; | |
| 241 | + | |
| 242 | + pinctrl_enet2: enet2grp { | |
| 243 | + fsl,pins = < | |
| 244 | + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 | |
| 245 | + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 | |
| 246 | + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 | |
| 247 | + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 | |
| 248 | + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 | |
| 249 | + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 | |
| 250 | + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 | |
| 251 | + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x40017051 | |
| 252 | + >; | |
| 253 | + }; | |
| 254 | + | |
| 255 | + pinctrl_enet2_mdio: mdioenet2grp { | |
| 256 | + fsl,pins = < | |
| 257 | + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 | |
| 258 | + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 | |
| 259 | + >; | |
| 260 | + }; | |
| 261 | + | |
| 262 | + pinctrl_flexcan1: flexcan1grp{ | |
| 263 | + fsl,pins = < | |
| 264 | + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 | |
| 265 | + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 | |
| 266 | + >; | |
| 267 | + }; | |
| 268 | + pinctrl_flexcan2: flexcan2grp{ | |
| 269 | + fsl,pins = < | |
| 270 | + MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 | |
| 271 | + MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 | |
| 272 | + >; | |
| 273 | + }; | |
| 274 | + | |
| 275 | + pinctrl_lcdif_dat0_17: lcdifdatgrp0-17 { | |
| 276 | + fsl,pins = < | |
| 277 | + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 | |
| 278 | + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 | |
| 279 | + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 | |
| 280 | + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 | |
| 281 | + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 | |
| 282 | + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 | |
| 283 | + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 | |
| 284 | + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 | |
| 285 | + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 | |
| 286 | + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 | |
| 287 | + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 | |
| 288 | + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 | |
| 289 | + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 | |
| 290 | + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 | |
| 291 | + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 | |
| 292 | + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 | |
| 293 | + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 | |
| 294 | + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 | |
| 295 | + >; | |
| 296 | + }; | |
| 297 | + | |
| 298 | + pinctrl_lcdif_clken: lcdifctrlgrp1 { | |
| 299 | + fsl,pins = < | |
| 300 | + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x17050 | |
| 301 | + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 | |
| 302 | + >; | |
| 303 | + }; | |
| 304 | + | |
| 305 | + pinctrl_lcdif_hvsync: lcdifctrlgrp2 { | |
| 306 | + fsl,pins = < | |
| 307 | + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 | |
| 308 | + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 | |
| 309 | + >; | |
| 310 | + }; | |
| 311 | + | |
| 312 | + pinctrl_pwm4: pwm4grp { | |
| 313 | + fsl,pins = < | |
| 314 | + MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0 | |
| 315 | + >; | |
| 316 | + }; | |
| 317 | + | |
| 318 | + pinctrl_pwm5: pwm5grp { | |
| 319 | + fsl,pins = < | |
| 320 | + MX6UL_PAD_NAND_DQS__PWM5_OUT 0x110b0 | |
| 321 | + >; | |
| 322 | + }; | |
| 323 | + | |
| 324 | + pinctrl_sai2: sai2grp { | |
| 325 | + fsl,pins = < | |
| 326 | + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088 | |
| 327 | + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088 | |
| 328 | + MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088 | |
| 329 | + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 | |
| 330 | + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 | |
| 331 | + /* Interrupt */ | |
| 332 | + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x10b0 | |
| 333 | + >; | |
| 334 | + }; | |
| 335 | + | |
| 336 | + pinctrl_sai2_sleep: sai2grp-sleep { | |
| 337 | + fsl,pins = < | |
| 338 | + MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x3000 | |
| 339 | + MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x3000 | |
| 340 | + MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x3000 | |
| 341 | + MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x3000 | |
| 342 | + /* Interrupt */ | |
| 343 | + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x3000 | |
| 344 | + >; | |
| 345 | + }; | |
| 346 | + | |
| 347 | + pinctrl_uart2_4wires: uart2grp-4wires { | |
| 348 | + fsl,pins = < | |
| 349 | + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 | |
| 350 | + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 | |
| 351 | + MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1 | |
| 352 | + MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1 | |
| 353 | + >; | |
| 354 | + }; | |
| 355 | + | |
| 356 | + pinctrl_uart3_2wires: uart3grp-2wires { | |
| 357 | + fsl,pins = < | |
| 358 | + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 | |
| 359 | + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 | |
| 360 | + >; | |
| 361 | + }; | |
| 362 | + | |
| 363 | + pinctrl_uart5: uart5grp { | |
| 364 | + fsl,pins = < | |
| 365 | + MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1 | |
| 366 | + MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1 | |
| 367 | + >; | |
| 368 | + }; | |
| 369 | + | |
| 370 | + pinctrl_usdhc2: usdhc2grp { | |
| 371 | + fsl,pins = < | |
| 372 | + MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059 | |
| 373 | + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10039 | |
| 374 | + MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059 | |
| 375 | + MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059 | |
| 376 | + MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059 | |
| 377 | + MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059 | |
| 378 | + /* Mux selector between eMMC/SD# */ | |
| 379 | + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x79 | |
| 380 | + >; | |
| 381 | + }; | |
| 382 | + | |
| 383 | + pinctrl_usbotg1: usbotg1grp { | |
| 384 | + fsl,pins = < | |
| 385 | + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 | |
| 386 | + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x17059 | |
| 387 | + MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC 0x17059 | |
| 388 | + >; | |
| 389 | + }; | |
| 390 | +}; | |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | /dts-v1/; |
| @@ -328,7 +292,7 @@ · 284 unmodified lines | ||
| 328 | 292 | >; |
| 329 | 293 | }; |
| 330 | 294 | |
| 331 | − pinctrl_gpmi_nand: gpmi-nand { | |
| 295 | + pinctrl_gpmi_nand: gpminandgrp { | |
| 332 | 296 | fsl,pins = < |
| 333 | 297 | MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 |
| 334 | 298 | MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | /dts-v1/; |
| @@ -50,28 +14,5 @@ · 6 unmodified lines | ||
| 50 | 14 | }; |
| 51 | 15 | |
| 52 | 16 | &usdhc2 { |
| 53 | − pinctrl-names = "default"; | |
| 54 | − pinctrl-0 = <&pinctrl_usdhc2>; | |
| 55 | − cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; | |
| 56 | − bus-width = <8>; | |
| 57 | − no-1-8-v; | |
| 58 | 17 | status = "okay"; |
| 59 | 18 | }; |
| 60 | − | |
| 61 | −&iomuxc { | |
| 62 | − pinctrl_usdhc2: usdhc2grp { | |
| 63 | − fsl,pins = < | |
| 64 | − MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 | |
| 65 | − MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 | |
| 66 | − MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17070 | |
| 67 | − MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17070 | |
| 68 | − MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17070 | |
| 69 | − MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17070 | |
| 70 | − MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17070 | |
| 71 | − MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17070 | |
| 72 | − MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17070 | |
| 73 | − MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17070 | |
| 74 | − MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17070 | |
| 75 | − >; | |
| 76 | − }; | |
| 77 | −}; | |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | /dts-v1/; |
| @@ -50,30 +14,5 @@ · 6 unmodified lines | ||
| 50 | 14 | }; |
| 51 | 15 | |
| 52 | 16 | &gpmi { |
| 53 | − pinctrl-names = "default"; | |
| 54 | − pinctrl-0 = <&pinctrl_gpmi_nand>; | |
| 55 | − nand-on-flash-bbt; | |
| 56 | 17 | status = "okay"; |
| 57 | 18 | }; |
| 58 | − | |
| 59 | −&iomuxc { | |
| 60 | − pinctrl_gpmi_nand: gpmi-nand { | |
| 61 | − fsl,pins = < | |
| 62 | − MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 | |
| 63 | − MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 | |
| 64 | − MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 | |
| 65 | − MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 | |
| 66 | − MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1 | |
| 67 | − MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 | |
| 68 | − MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 | |
| 69 | − MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 | |
| 70 | − MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 | |
| 71 | − MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 | |
| 72 | − MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 | |
| 73 | − MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 | |
| 74 | − MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 | |
| 75 | − MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 | |
| 76 | − MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 | |
| 77 | − >; | |
| 78 | − }; | |
| 79 | −}; | |
| @@ -1,43 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 OR X11 | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 Amarula Solutions B.V. |
| 3 | 4 | * Copyright (C) 2016 Engicam S.r.l. |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License | |
| 12 | − * version 2 as published by the Free Software Foundation. | |
| 13 | − * | |
| 14 | − * This file is distributed in the hope that it will be useful, | |
| 15 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | − * GNU General Public License for more details. | |
| 18 | − * | |
| 19 | − * Or, alternatively, | |
| 20 | − * | |
| 21 | − * b) Permission is hereby granted, free of charge, to any person | |
| 22 | − * obtaining a copy of this software and associated documentation | |
| 23 | − * files (the "Software"), to deal in the Software without | |
| 24 | − * restriction, including without limitation the rights to use, | |
| 25 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 26 | − * sell copies of the Software, and to permit persons to whom the | |
| 27 | − * Software is furnished to do so, subject to the following | |
| 28 | − * conditions: | |
| 29 | − * | |
| 30 | − * The above copyright notice and this permission notice shall be | |
| 31 | − * included in all copies or substantial portions of the Software. | |
| 32 | − * | |
| 33 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 34 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 35 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 36 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 37 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 38 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 39 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 40 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 41 | 5 | */ |
| 42 | 6 | |
| 43 | 7 | #include <dt-bindings/gpio/gpio.h> |
| @@ -133,6 +97,13 @@ · 89 unmodified lines | ||
| 133 | 97 | }; |
| 134 | 98 | }; |
| 135 | 99 | |
| 100 | +&gpmi { | |
| 101 | + pinctrl-names = "default"; | |
| 102 | + pinctrl-0 = <&pinctrl_gpmi_nand>; | |
| 103 | + nand-on-flash-bbt; | |
| 104 | + status = "disabled"; | |
| 105 | +}; | |
| 106 | + | |
| 136 | 107 | &i2c1 { |
| 137 | 108 | clock-frequency = <100000>; |
| 138 | 109 | pinctrl-names = "default"; |
| @@ -243,6 +214,15 @@ · 104 unmodified lines | ||
| 243 | 214 | status = "okay"; |
| 244 | 215 | }; |
| 245 | 216 | |
| 217 | +&usdhc2 { | |
| 218 | + pinctrl-names = "default"; | |
| 219 | + pinctrl-0 = <&pinctrl_usdhc2>; | |
| 220 | + cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; | |
| 221 | + bus-width = <8>; | |
| 222 | + no-1-8-v; | |
| 223 | + status = "disabled"; | |
| 224 | +}; | |
| 225 | + | |
| 246 | 226 | &iomuxc { |
| 247 | 227 | pinctrl_enet1: enet1grp { |
| 248 | 228 | fsl,pins = < |
| @@ -259,6 +239,26 @@ · 10 unmodified lines | ||
| 259 | 239 | >; |
| 260 | 240 | }; |
| 261 | 241 | |
| 242 | + pinctrl_gpmi_nand: gpminandgrp { | |
| 243 | + fsl,pins = < | |
| 244 | + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 | |
| 245 | + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 | |
| 246 | + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 | |
| 247 | + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 | |
| 248 | + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1 | |
| 249 | + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 | |
| 250 | + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 | |
| 251 | + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 | |
| 252 | + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 | |
| 253 | + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 | |
| 254 | + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 | |
| 255 | + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 | |
| 256 | + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 | |
| 257 | + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 | |
| 258 | + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 | |
| 259 | + >; | |
| 260 | + }; | |
| 261 | + | |
| 262 | 262 | pinctrl_i2c1: i2c1grp { |
| 263 | 263 | fsl,pins = < |
| 264 | 264 | MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 |
| @@ -366,4 +366,20 @@ · 101 unmodified lines | ||
| 366 | 366 | MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 |
| 367 | 367 | >; |
| 368 | 368 | }; |
| 369 | + | |
| 370 | + pinctrl_usdhc2: usdhc2grp { | |
| 371 | + fsl,pins = < | |
| 372 | + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 | |
| 373 | + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 | |
| 374 | + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17070 | |
| 375 | + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17070 | |
| 376 | + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17070 | |
| 377 | + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17070 | |
| 378 | + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17070 | |
| 379 | + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17070 | |
| 380 | + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17070 | |
| 381 | + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17070 | |
| 382 | + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17070 | |
| 383 | + >; | |
| 384 | + }; | |
| 369 | 385 | }; |
| @@ -89,6 +89,8 @@ · 88 unmodified lines | ||
| 89 | 89 | "pll1_sys"; |
| 90 | 90 | arm-supply = <®_arm>; |
| 91 | 91 | soc-supply = <®_soc>; |
| 92 | + nvmem-cells = <&cpu_speed_grade>; | |
| 93 | + nvmem-cell-names = "speed_grade"; | |
| 92 | 94 | }; |
| 93 | 95 | }; |
| 94 | 96 | |
| @@ -156,7 +158,6 @@ · 61 unmodified lines | ||
| 156 | 158 | compatible = "arm,cortex-a7-pmu"; |
| 157 | 159 | interrupt-parent = <&gpc>; |
| 158 | 160 | interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; |
| 159 | − status = "disabled"; | |
| 160 | 161 | }; |
| 161 | 162 | |
| 162 | 163 | soc { |
| @@ -218,7 +219,7 @@ · 55 unmodified lines | ||
| 218 | 219 | reg = <0x02000000 0x40000>; |
| 219 | 220 | ranges; |
| 220 | 221 | |
| 221 | − ecspi1: ecspi@2008000 { | |
| 222 | + ecspi1: spi@2008000 { | |
| 222 | 223 | #address-cells = <1>; |
| 223 | 224 | #size-cells = <0>; |
| 224 | 225 | compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; |
| @@ -230,7 +231,7 @@ · 5 unmodified lines | ||
| 230 | 231 | status = "disabled"; |
| 231 | 232 | }; |
| 232 | 233 | |
| 233 | − ecspi2: ecspi@200c000 { | |
| 234 | + ecspi2: spi@200c000 { | |
| 234 | 235 | #address-cells = <1>; |
| 235 | 236 | #size-cells = <0>; |
| 236 | 237 | compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; |
| @@ -242,7 +243,7 @@ · 5 unmodified lines | ||
| 242 | 243 | status = "disabled"; |
| 243 | 244 | }; |
| 244 | 245 | |
| 245 | − ecspi3: ecspi@2010000 { | |
| 246 | + ecspi3: spi@2010000 { | |
| 246 | 247 | #address-cells = <1>; |
| 247 | 248 | #size-cells = <0>; |
| 248 | 249 | compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; |
| @@ -254,7 +255,7 @@ · 5 unmodified lines | ||
| 254 | 255 | status = "disabled"; |
| 255 | 256 | }; |
| 256 | 257 | |
| 257 | − ecspi4: ecspi@2014000 { | |
| 258 | + ecspi4: spi@2014000 { | |
| 258 | 259 | #address-cells = <1>; |
| 259 | 260 | #size-cells = <0>; |
| 260 | 261 | compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; |
| @@ -918,6 +919,17 @@ · 657 unmodified lines | ||
| 918 | 919 | reg = <0x021b0000 0x4000>; |
| 919 | 920 | }; |
| 920 | 921 | |
| 922 | + weim: weim@21b8000 { | |
| 923 | + #address-cells = <2>; | |
| 924 | + #size-cells = <1>; | |
| 925 | + compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; | |
| 926 | + reg = <0x021b8000 0x4000>; | |
| 927 | + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
| 928 | + clocks = <&clks IMX6UL_CLK_EIM>; | |
| 929 | + fsl,weim-cs-gpr = <&gpr>; | |
| 930 | + status = "disabled"; | |
| 931 | + }; | |
| 932 | + | |
| 921 | 933 | ocotp: ocotp-ctrl@21bc000 { |
| 922 | 934 | #address-cells = <1>; |
| 923 | 935 | #size-cells = <1>; |
| @@ -932,6 +944,10 @@ · 8 unmodified lines | ||
| 932 | 944 | tempmon_temp_grade: temp-grade@20 { |
| 933 | 945 | reg = <0x20 4>; |
| 934 | 946 | }; |
| 947 | + | |
| 948 | + cpu_speed_grade: speed-grade@10 { | |
| 949 | + reg = <0x10 4>; | |
| 950 | + }; | |
| 935 | 951 | }; |
| 936 | 952 | |
| 937 | 953 | lcdif: lcdif@21c8000 { |
| @@ -945,7 +961,7 @@ · 7 unmodified lines | ||
| 945 | 961 | status = "disabled"; |
| 946 | 962 | }; |
| 947 | 963 | |
| 948 | − qspi: qspi@21e0000 { | |
| 964 | + qspi: spi@21e0000 { | |
| 949 | 965 | #address-cells = <1>; |
| 950 | 966 | #size-cells = <0>; |
| 951 | 967 | compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi"; |
| @@ -45,7 +45,7 @@ · 44 unmodified lines | ||
| 45 | 45 | #include "imx6ul-14x14-evk.dtsi" |
| 46 | 46 | |
| 47 | 47 | / { |
| 48 | − model = "Freescale i.MX6 UlltraLite 14x14 EVK Board"; | |
| 48 | + model = "Freescale i.MX6 UltraLiteLite 14x14 EVK Board"; | |
| 49 | 49 | compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; |
| 50 | 50 | }; |
| 51 | 51 | |
| @@ -14,14 +14,38 @@ · 13 unmodified lines | ||
| 14 | 14 | * The pin function ID is a tuple of |
| 15 | 15 | * <mux_reg conf_reg input_reg mux_mode input_val> |
| 16 | 16 | */ |
| 17 | +/* signals common for i.MX6UL and i.MX6ULL */ | |
| 18 | +#undef MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX | |
| 19 | +#define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6 | |
| 20 | +#undef MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX | |
| 21 | +#define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7 | |
| 22 | +#undef MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS | |
| 23 | +#define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5 | |
| 24 | +#undef MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS | |
| 25 | +#define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6 | |
| 26 | +#undef MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS | |
| 27 | +#define MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7 | |
| 28 | + | |
| 29 | +/* signals for i.MX6ULL only */ | |
| 30 | +#define MX6ULL_PAD_UART1_TX_DATA__UART5_DCE_TX 0x0084 0x0310 0x0000 0x9 0x0 | |
| 17 | 31 | #define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4 |
| 18 | 32 | #define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5 |
| 19 | −#define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_RTS 0x008C 0x0318 0x0640 0x9 0x3 | |
| 20 | −#define MX6ULL_PAD_UART1_RTS_B__UART5_DTE_RTS 0x0090 0x031C 0x0640 0x9 0x4 | |
| 21 | −#define MX6ULL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6 | |
| 22 | −#define MX6ULL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7 | |
| 23 | −#define MX6ULL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5 | |
| 24 | −#define MX6ULL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6 | |
| 33 | +#define MX6ULL_PAD_UART1_RX_DATA__UART5_DTE_TX 0x0088 0x0314 0x0000 0x9 0x0 | |
| 34 | +#define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_CTS 0x008C 0x0318 0x0000 0x9 0x0 | |
| 35 | +#define MX6ULL_PAD_UART1_CTS_B__UART5_DTE_RTS 0x008C 0x0318 0x0640 0x9 0x3 | |
| 36 | +#define MX6ULL_PAD_UART1_RTS_B__UART5_DCE_RTS 0x0090 0x031C 0x0640 0x9 0x4 | |
| 37 | +#define MX6ULL_PAD_UART1_RTS_B__UART5_DTE_CTS 0x0090 0x031C 0x0000 0x9 0x0 | |
| 38 | +#define MX6ULL_PAD_UART4_RX_DATA__EPDC_PWRCTRL01 0x00B8 0x0344 0x0000 0x9 0x0 | |
| 39 | +#define MX6ULL_PAD_UART5_TX_DATA__EPDC_PWRCTRL02 0x00BC 0x0348 0x0000 0x9 0x0 | |
| 40 | +#define MX6ULL_PAD_UART5_RX_DATA__EPDC_PWRCTRL03 0x00C0 0x034C 0x0000 0x9 0x0 | |
| 41 | +#define MX6ULL_PAD_ENET1_RX_DATA0__EPDC_SDCE04 0x00C4 0x0350 0x0000 0x9 0x0 | |
| 42 | +#define MX6ULL_PAD_ENET1_RX_DATA1__EPDC_SDCE05 0x00C8 0x0354 0x0000 0x9 0x0 | |
| 43 | +#define MX6ULL_PAD_ENET1_RX_EN__EPDC_SDCE06 0x00CC 0x0358 0x0000 0x9 0x0 | |
| 44 | +#define MX6ULL_PAD_ENET1_TX_DATA0__EPDC_SDCE07 0x00D0 0x035C 0x0000 0x9 0x0 | |
| 45 | +#define MX6ULL_PAD_ENET1_TX_DATA1__EPDC_SDCE08 0x00D4 0x0360 0x0000 0x9 0x0 | |
| 46 | +#define MX6ULL_PAD_ENET1_TX_EN__EPDC_SDCE09 0x00D8 0x0364 0x0000 0x9 0x0 | |
| 47 | +#define MX6ULL_PAD_ENET1_TX_CLK__EPDC_SDOED 0x00DC 0x0368 0x0000 0x9 0x0 | |
| 48 | +#define MX6ULL_PAD_ENET1_RX_ER__EPDC_SDOEZ 0x00E0 0x036C 0x0000 0x9 0x0 | |
| 25 | 49 | #define MX6ULL_PAD_ENET2_RX_DATA0__EPDC_SDDO08 0x00E4 0x0370 0x0000 0x9 0x0 |
| 26 | 50 | #define MX6ULL_PAD_ENET2_RX_DATA1__EPDC_SDDO09 0x00E8 0x0374 0x0000 0x9 0x0 |
| 27 | 51 | #define MX6ULL_PAD_ENET2_RX_EN__EPDC_SDDO10 0x00EC 0x0378 0x0000 0x9 0x0 |
| @@ -48,6 +72,8 @@ · 20 unmodified lines | ||
| 48 | 72 | #define MX6ULL_PAD_LCD_DATA16__EPDC_GDCLK 0x0158 0x03E4 0x0000 0x9 0x0 |
| 49 | 73 | #define MX6ULL_PAD_LCD_DATA17__EPDC_GDSP 0x015C 0x03E8 0x0000 0x9 0x0 |
| 50 | 74 | #define MX6ULL_PAD_LCD_DATA21__EPDC_SDCE1 0x016C 0x03F8 0x0000 0x9 0x0 |
| 75 | +#define MX6ULL_PAD_LCD_DATA22__EPDC_SDCE02 0x0170 0x03FC 0x0000 0x9 0x0 | |
| 76 | +#define MX6ULL_PAD_LCD_DATA23__EPDC_SDCE03 0x0174 0x0400 0x0000 0x9 0x0 | |
| 51 | 77 | #define MX6ULL_PAD_CSI_MCLK__ESAI_TX3_RX2 0x01D4 0x0460 0x0000 0x9 0x0 |
| 52 | 78 | #define MX6ULL_PAD_CSI_PIXCLK__ESAI_TX2_RX3 0x01D8 0x0464 0x0000 0x9 0x0 |
| 53 | 79 | #define MX6ULL_PAD_CSI_VSYNC__ESAI_TX4_RX1 0x01DC 0x0468 0x0000 0x9 0x0 |
| @@ -55,7 +81,6 @@ · 1 unmodified line | ||
| 55 | 81 | #define MX6ULL_PAD_CSI_DATA00__ESAI_TX_HF_CLK 0x01E4 0x0470 0x0000 0x9 0x0 |
| 56 | 82 | #define MX6ULL_PAD_CSI_DATA01__ESAI_RX_HF_CLK 0x01E8 0x0474 0x0000 0x9 0x0 |
| 57 | 83 | #define MX6ULL_PAD_CSI_DATA02__ESAI_RX_FS 0x01EC 0x0478 0x0000 0x9 0x0 |
| 58 | −#define MX6ULL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7 | |
| 59 | 84 | #define MX6ULL_PAD_CSI_DATA03__ESAI_RX_CLK 0x01F0 0x047C 0x0000 0x9 0x0 |
| 60 | 85 | #define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0 |
| 61 | 86 | #define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0 |
| @@ -22,7 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | >; |
| 23 | 23 | fsl,soc-operating-points = < |
| 24 | 24 | /* KHz uV */ |
| 25 | − 900000 1175000 | |
| 25 | + 900000 1250000 | |
| 26 | 26 | 792000 1175000 |
| 27 | 27 | 528000 1175000 |
| 28 | 28 | 396000 1175000 |
| @@ -0,0 +1,20 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0 OR MIT) | |
| 2 | +// | |
| 3 | +// Copyright 2018 NXP. | |
| 4 | + | |
| 5 | +/dts-v1/; | |
| 6 | + | |
| 7 | +#include "imx6ulz.dtsi" | |
| 8 | +#include "imx6ul-14x14-evk.dtsi" | |
| 9 | + | |
| 10 | +/delete-node/ &fec1; | |
| 11 | +/delete-node/ &fec2; | |
| 12 | +/delete-node/ &lcdif; | |
| 13 | +/delete-node/ &tsc; | |
| 14 | + | |
| 15 | +/ { | |
| 16 | + model = "Freescale i.MX6 ULZ 14x14 EVK Board"; | |
| 17 | + compatible = "fsl,imx6ulz-14x14-evk", "fsl,imx6ull", "fsl,imx6ulz"; | |
| 18 | + | |
| 19 | + /delete-node/ panel; | |
| 20 | +}; | |
| @@ -0,0 +1,38 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0 OR MIT) | |
| 2 | +// | |
| 3 | +// Copyright 2018 NXP. | |
| 4 | + | |
| 5 | +#include "imx6ull.dtsi" | |
| 6 | + | |
| 7 | +/ { | |
| 8 | + aliases { | |
| 9 | + /delete-property/ ethernet0; | |
| 10 | + /delete-property/ ethernet1; | |
| 11 | + /delete-property/ i2c2; | |
| 12 | + /delete-property/ i2c3; | |
| 13 | + /delete-property/ serial4; | |
| 14 | + /delete-property/ serial5; | |
| 15 | + /delete-property/ serial6; | |
| 16 | + /delete-property/ serial7; | |
| 17 | + /delete-property/ spi2; | |
| 18 | + /delete-property/ spi3; | |
| 19 | + }; | |
| 20 | +}; | |
| 21 | + | |
| 22 | +/delete-node/ &adc1; | |
| 23 | +/delete-node/ &can1; | |
| 24 | +/delete-node/ &can2; | |
| 25 | +/delete-node/ &ecspi3; | |
| 26 | +/delete-node/ &ecspi4; | |
| 27 | +/delete-node/ &epit2; | |
| 28 | +/delete-node/ &gpt2; | |
| 29 | +/delete-node/ &i2c3; | |
| 30 | +/delete-node/ &i2c4; | |
| 31 | +/delete-node/ &pwm5; | |
| 32 | +/delete-node/ &pwm6; | |
| 33 | +/delete-node/ &pwm7; | |
| 34 | +/delete-node/ &pwm8; | |
| 35 | +/delete-node/ &uart5; | |
| 36 | +/delete-node/ &uart6; | |
| 37 | +/delete-node/ &uart7; | |
| 38 | +/delete-node/ &uart8; | |
| @@ -27,12 +27,14 @@ · 26 unmodified lines | ||
| 27 | 27 | label = "Volume Up"; |
| 28 | 28 | gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; |
| 29 | 29 | linux,code = <KEY_VOLUMEUP>; |
| 30 | + wakeup-source; | |
| 30 | 31 | }; |
| 31 | 32 | |
| 32 | 33 | volume-down { |
| 33 | 34 | label = "Volume Down"; |
| 34 | 35 | gpios = <&gpio5 10 GPIO_ACTIVE_LOW>; |
| 35 | 36 | linux,code = <KEY_VOLUMEDOWN>; |
| 37 | + wakeup-source; | |
| 36 | 38 | }; |
| 37 | 39 | }; |
| 38 | 40 | |
| @@ -20,6 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | reg = <1>; |
| 21 | 21 | clock-frequency = <996000000>; |
| 22 | 22 | operating-points-v2 = <&cpu0_opp_table>; |
| 23 | + cpu-idle-states = <&cpu_sleep_wait>; | |
| 23 | 24 | }; |
| 24 | 25 | }; |
| 25 | 26 | |
| @@ -63,9 +64,11 @@ · 37 unmodified lines | ||
| 63 | 64 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
| 64 | 65 | clock-names = "apb_pclk"; |
| 65 | 66 | |
| 66 | − port { | |
| 67 | − etm1_out_port: endpoint { | |
| 68 | − remote-endpoint = <&ca_funnel_in_port1>; | |
| 67 | + out-ports { | |
| 68 | + port { | |
| 69 | + etm1_out_port: endpoint { | |
| 70 | + remote-endpoint = <&ca_funnel_in_port1>; | |
| 71 | + }; | |
| 69 | 72 | }; |
| 70 | 73 | }; |
| 71 | 74 | }; |
| @@ -153,11 +156,13 @@ · 81 unmodified lines | ||
| 153 | 156 | }; |
| 154 | 157 | }; |
| 155 | 158 | |
| 156 | −&ca_funnel_ports { | |
| 159 | +&ca_funnel_in_ports { | |
| 160 | + #address-cells = <1>; | |
| 161 | + #size-cells = <0>; | |
| 162 | + | |
| 157 | 163 | port@1 { |
| 158 | 164 | reg = <1>; |
| 159 | 165 | ca_funnel_in_port1: endpoint { |
| 160 | − slave-mode; | |
| 161 | 166 | remote-endpoint = <&etm1_out_port>; |
| 162 | 167 | }; |
| 163 | 168 | }; |
| @@ -1,44 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (C) 2016 NXP Semiconductors. |
| 3 | 4 | * Author: Fabio Estevam <fabio.estevam@nxp.com> |
| 4 | − * | |
| 5 | − * This file is dual-licensed: you can use it either under the terms | |
| 6 | − * of the GPL or the X11 license, at your option. Note that this dual | |
| 7 | − * licensing only applies to this file, and not this project as a | |
| 8 | − * whole. | |
| 9 | − * | |
| 10 | − * a) This file is free software; you can redistribute it and/or | |
| 11 | − * modify it under the terms of the GNU General Public License as | |
| 12 | − * published by the Free Software Foundation; either version 2 of the | |
| 13 | − * License, or (at your option) any later version. | |
| 14 | − * | |
| 15 | − * This file is distributed in the hope that it will be useful, | |
| 16 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 17 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 18 | − * GNU General Public License for more details. | |
| 19 | − * | |
| 20 | − * Or, alternatively, | |
| 21 | − * | |
| 22 | − * b) Permission is hereby granted, free of charge, to any person | |
| 23 | − * obtaining a copy of this software and associated documentation | |
| 24 | − * files (the "Software"), to deal in the Software without | |
| 25 | − * restriction, including without limitation the rights to use, | |
| 26 | − * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 27 | − * sell copies of the Software, and to permit persons to whom the | |
| 28 | − * Software is furnished to do so, subject to the following | |
| 29 | − * conditions: | |
| 30 | − * | |
| 31 | − * The above copyright notice and this permission notice shall be | |
| 32 | − * included in all copies or substantial portions of the Software. | |
| 33 | − * | |
| 34 | − * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 35 | − * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 36 | − * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 37 | − * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 38 | − * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 39 | − * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 40 | − * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 41 | − * OTHER DEALINGS IN THE SOFTWARE. | |
| 42 | 5 | */ |
| 43 | 6 | |
| 44 | 7 | /dts-v1/; |
| @@ -216,6 +179,13 @@ · 171 unmodified lines | ||
| 216 | 179 | status = "okay"; |
| 217 | 180 | }; |
| 218 | 181 | |
| 182 | +&i2c3 { | |
| 183 | + clock-frequency = <100000>; | |
| 184 | + pinctrl-names = "default"; | |
| 185 | + pinctrl-0 = <&pinctrl_i2c3>; | |
| 186 | + status = "okay"; | |
| 187 | +}; | |
| 188 | + | |
| 219 | 189 | &i2c4 { |
| 220 | 190 | clock-frequency = <100000>; |
| 221 | 191 | pinctrl-names = "default"; |
| @@ -346,6 +316,13 @@ · 124 unmodified lines | ||
| 346 | 316 | >; |
| 347 | 317 | }; |
| 348 | 318 | |
| 319 | + pinctrl_i2c3: i2c3grp { | |
| 320 | + fsl,pins = < | |
| 321 | + MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f | |
| 322 | + MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f | |
| 323 | + >; | |
| 324 | + }; | |
| 325 | + | |
| 349 | 326 | pinctrl_i2c4: i2c4grp { |
| 350 | 327 | fsl,pins = < |
| 351 | 328 | MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f |
| @@ -54,6 +54,19 @@ · 53 unmodified lines | ||
| 54 | 54 | #address-cells = <1>; |
| 55 | 55 | #size-cells = <0>; |
| 56 | 56 | |
| 57 | + idle-states { | |
| 58 | + entry-method = "psci"; | |
| 59 | + | |
| 60 | + cpu_sleep_wait: cpu-sleep-wait { | |
| 61 | + compatible = "arm,idle-state"; | |
| 62 | + arm,psci-suspend-param = <0x0010000>; | |
| 63 | + local-timer-stop; | |
| 64 | + entry-latency-us = <100>; | |
| 65 | + exit-latency-us = <50>; | |
| 66 | + min-residency-us = <1000>; | |
| 67 | + }; | |
| 68 | + }; | |
| 69 | + | |
| 57 | 70 | cpu0: cpu@0 { |
| 58 | 71 | compatible = "arm,cortex-a7"; |
| 59 | 72 | device_type = "cpu"; |
| @@ -61,6 +74,7 @@ · 1 unmodified line | ||
| 61 | 74 | clock-frequency = <792000000>; |
| 62 | 75 | clock-latency = <61036>; /* two CLK32 periods */ |
| 63 | 76 | clocks = <&clks IMX7D_CLK_ARM>; |
| 77 | + cpu-idle-states = <&cpu_sleep_wait>; | |
| 64 | 78 | }; |
| 65 | 79 | }; |
| 66 | 80 | |
| @@ -106,7 +120,7 @@ · 39 unmodified lines | ||
| 106 | 120 | */ |
| 107 | 121 | compatible = "arm,coresight-replicator"; |
| 108 | 122 | |
| 109 | − ports { | |
| 123 | + out-ports { | |
| 110 | 124 | #address-cells = <1>; |
| 111 | 125 | #size-cells = <0>; |
| 112 | 126 | /* replicator output ports */ |
| @@ -123,12 +137,11 @@ · 10 unmodified lines | ||
| 123 | 137 | remote-endpoint = <&etr_in_port>; |
| 124 | 138 | }; |
| 125 | 139 | }; |
| 140 | + }; | |
| 126 | 141 | |
| 127 | − /* replicator input port */ | |
| 128 | − port@2 { | |
| 129 | − reg = <0>; | |
| 142 | + in-ports { | |
| 143 | + port { | |
| 130 | 144 | replicator_in_port0: endpoint { |
| 131 | − slave-mode; | |
| 132 | 145 | remote-endpoint = <&etf_out_port>; |
| 133 | 146 | }; |
| 134 | 147 | }; |
| @@ -168,28 +181,23 @@ · 33 unmodified lines | ||
| 168 | 181 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
| 169 | 182 | clock-names = "apb_pclk"; |
| 170 | 183 | |
| 171 | − ca_funnel_ports: ports { | |
| 172 | − #address-cells = <1>; | |
| 173 | − #size-cells = <0>; | |
| 174 | − | |
| 175 | − /* funnel input ports */ | |
| 176 | − port@0 { | |
| 177 | − reg = <0>; | |
| 184 | + ca_funnel_in_ports: in-ports { | |
| 185 | + port { | |
| 178 | 186 | ca_funnel_in_port0: endpoint { |
| 179 | − slave-mode; | |
| 180 | 187 | remote-endpoint = <&etm0_out_port>; |
| 181 | 188 | }; |
| 182 | 189 | }; |
| 183 | 190 | |
| 184 | − /* funnel output port */ | |
| 185 | − port@2 { | |
| 186 | − reg = <0>; | |
| 191 | + /* the other input ports are not connect to anything */ | |
| 192 | + }; | |
| 193 | + | |
| 194 | + out-ports { | |
| 195 | + port { | |
| 187 | 196 | ca_funnel_out_port0: endpoint { |
| 188 | 197 | remote-endpoint = <&hugo_funnel_in_port0>; |
| 189 | 198 | }; |
| 190 | 199 | }; |
| 191 | 200 | |
| 192 | − /* the other input ports are not connect to anything */ | |
| 193 | 201 | }; |
| 194 | 202 | }; |
| 195 | 203 | |
| @@ -200,9 +208,11 @@ · 4 unmodified lines | ||
| 200 | 208 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
| 201 | 209 | clock-names = "apb_pclk"; |
| 202 | 210 | |
| 203 | − port { | |
| 204 | − etm0_out_port: endpoint { | |
| 205 | − remote-endpoint = <&ca_funnel_in_port0>; | |
| 211 | + out-ports { | |
| 212 | + port { | |
| 213 | + etm0_out_port: endpoint { | |
| 214 | + remote-endpoint = <&ca_funnel_in_port0>; | |
| 215 | + }; | |
| 206 | 216 | }; |
| 207 | 217 | }; |
| 208 | 218 | }; |
| @@ -213,15 +223,13 @@ · 4 unmodified lines | ||
| 213 | 223 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
| 214 | 224 | clock-names = "apb_pclk"; |
| 215 | 225 | |
| 216 | − ports { | |
| 226 | + in-ports { | |
| 217 | 227 | #address-cells = <1>; |
| 218 | 228 | #size-cells = <0>; |
| 219 | 229 | |
| 220 | − /* funnel input ports */ | |
| 221 | 230 | port@0 { |
| 222 | 231 | reg = <0>; |
| 223 | 232 | hugo_funnel_in_port0: endpoint { |
| 224 | − slave-mode; | |
| 225 | 233 | remote-endpoint = <&ca_funnel_out_port0>; |
| 226 | 234 | }; |
| 227 | 235 | }; |
| @@ -229,18 +237,18 @@ · 1 unmodified line | ||
| 229 | 237 | port@1 { |
| 230 | 238 | reg = <1>; |
| 231 | 239 | hugo_funnel_in_port1: endpoint { |
| 232 | − slave-mode; /* M4 input */ | |
| 240 | + /* M4 input */ | |
| 233 | 241 | }; |
| 234 | 242 | }; |
| 243 | + /* the other input ports are not connect to anything */ | |
| 244 | + }; | |
| 235 | 245 | |
| 236 | − port@2 { | |
| 237 | − reg = <0>; | |
| 246 | + out-ports { | |
| 247 | + port { | |
| 238 | 248 | hugo_funnel_out_port0: endpoint { |
| 239 | 249 | remote-endpoint = <&etf_in_port>; |
| 240 | 250 | }; |
| 241 | 251 | }; |
| 242 | − | |
| 243 | − /* the other input ports are not connect to anything */ | |
| 244 | 252 | }; |
| 245 | 253 | }; |
| 246 | 254 | |
| @@ -250,20 +258,16 @@ · 3 unmodified lines | ||
| 250 | 258 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
| 251 | 259 | clock-names = "apb_pclk"; |
| 252 | 260 | |
| 253 | − ports { | |
| 254 | − #address-cells = <1>; | |
| 255 | − #size-cells = <0>; | |
| 256 | − | |
| 257 | − port@0 { | |
| 258 | − reg = <0>; | |
| 261 | + in-ports { | |
| 262 | + port { | |
| 259 | 263 | etf_in_port: endpoint { |
| 260 | − slave-mode; | |
| 261 | 264 | remote-endpoint = <&hugo_funnel_out_port0>; |
| 262 | 265 | }; |
| 263 | 266 | }; |
| 267 | + }; | |
| 264 | 268 | |
| 265 | − port@1 { | |
| 266 | − reg = <0>; | |
| 269 | + out-ports { | |
| 270 | + port { | |
| 267 | 271 | etf_out_port: endpoint { |
| 268 | 272 | remote-endpoint = <&replicator_in_port0>; |
| 269 | 273 | }; |
| @@ -277,10 +281,11 @@ · 7 unmodified lines | ||
| 277 | 281 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
| 278 | 282 | clock-names = "apb_pclk"; |
| 279 | 283 | |
| 280 | − port { | |
| 281 | − etr_in_port: endpoint { | |
| 282 | − slave-mode; | |
| 283 | − remote-endpoint = <&replicator_out_port1>; | |
| 284 | + in-ports { | |
| 285 | + port { | |
| 286 | + etr_in_port: endpoint { | |
| 287 | + remote-endpoint = <&replicator_out_port1>; | |
| 288 | + }; | |
| 284 | 289 | }; |
| 285 | 290 | }; |
| 286 | 291 | }; |
| @@ -291,10 +296,11 @@ · 4 unmodified lines | ||
| 291 | 296 | clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; |
| 292 | 297 | clock-names = "apb_pclk"; |
| 293 | 298 | |
| 294 | − port { | |
| 295 | − tpiu_in_port: endpoint { | |
| 296 | − slave-mode; | |
| 297 | − remote-endpoint = <&replicator_out_port0>; | |
| 299 | + in-ports { | |
| 300 | + port { | |
| 301 | + tpiu_in_port: endpoint { | |
| 302 | + remote-endpoint = <&replicator_out_port0>; | |
| 303 | + }; | |
| 298 | 304 | }; |
| 299 | 305 | }; |
| 300 | 306 | }; |
| @@ -563,14 +569,6 @@ · 262 unmodified lines | ||
| 563 | 569 | clock-names = "snvs-rtc"; |
| 564 | 570 | }; |
| 565 | 571 | |
| 566 | − snvs_poweroff: snvs-poweroff { | |
| 567 | − compatible = "syscon-poweroff"; | |
| 568 | − regmap = <&snvs>; | |
| 569 | − offset = <0x38>; | |
| 570 | − value = <0x60>; | |
| 571 | − mask = <0x60>; | |
| 572 | − }; | |
| 573 | − | |
| 574 | 572 | snvs_pwrkey: snvs-powerkey { |
| 575 | 573 | compatible = "fsl,sec-v4.0-pwrkey"; |
| 576 | 574 | regmap = <&snvs>; |
| @@ -644,7 +642,7 @@ · 67 unmodified lines | ||
| 644 | 642 | status = "disabled"; |
| 645 | 643 | }; |
| 646 | 644 | |
| 647 | − ecspi4: ecspi@30630000 { | |
| 645 | + ecspi4: spi@30630000 { | |
| 648 | 646 | #address-cells = <1>; |
| 649 | 647 | #size-cells = <0>; |
| 650 | 648 | compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi"; |
| @@ -725,7 +723,7 @@ · 74 unmodified lines | ||
| 725 | 723 | reg = <0x30800000 0x100000>; |
| 726 | 724 | ranges; |
| 727 | 725 | |
| 728 | − ecspi1: ecspi@30820000 { | |
| 726 | + ecspi1: spi@30820000 { | |
| 729 | 727 | #address-cells = <1>; |
| 730 | 728 | #size-cells = <0>; |
| 731 | 729 | compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi"; |
| @@ -737,7 +735,7 @@ · 5 unmodified lines | ||
| 737 | 735 | status = "disabled"; |
| 738 | 736 | }; |
| 739 | 737 | |
| 740 | − ecspi2: ecspi@30830000 { | |
| 738 | + ecspi2: spi@30830000 { | |
| 741 | 739 | #address-cells = <1>; |
| 742 | 740 | #size-cells = <0>; |
| 743 | 741 | compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi"; |
| @@ -749,7 +747,7 @@ · 5 unmodified lines | ||
| 749 | 747 | status = "disabled"; |
| 750 | 748 | }; |
| 751 | 749 | |
| 752 | − ecspi3: ecspi@30840000 { | |
| 750 | + ecspi3: spi@30840000 { | |
| 753 | 751 | #address-cells = <1>; |
| 754 | 752 | #size-cells = <0>; |
| 755 | 753 | compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi"; |
| @@ -974,6 +972,25 @@ · 218 unmodified lines | ||
| 974 | 972 | status = "disabled"; |
| 975 | 973 | }; |
| 976 | 974 | |
| 975 | + mu0a: mailbox@30aa0000 { | |
| 976 | + compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu"; | |
| 977 | + reg = <0x30aa0000 0x10000>; | |
| 978 | + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; | |
| 979 | + clocks = <&clks IMX7D_MU_ROOT_CLK>; | |
| 980 | + #mbox-cells = <2>; | |
| 981 | + status = "disabled"; | |
| 982 | + }; | |
| 983 | + | |
| 984 | + mu0b: mailbox@30ab0000 { | |
| 985 | + compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu"; | |
| 986 | + reg = <0x30ab0000 0x10000>; | |
| 987 | + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; | |
| 988 | + clocks = <&clks IMX7D_MU_ROOT_CLK>; | |
| 989 | + #mbox-cells = <2>; | |
| 990 | + fsl,mu-side-b; | |
| 991 | + status = "disabled"; | |
| 992 | + }; | |
| 993 | + | |
| 977 | 994 | usbotg1: usb@30b10000 { |
| 978 | 995 | compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; |
| 979 | 996 | reg = <0x30b10000 0x200>; |
| @@ -116,6 +116,7 @@ · 115 unmodified lines | ||
| 116 | 116 | #define IMX7ULP_PAD_PTC13__LPI2C7_SDA 0x0034 0x030c 0x5 0x1 |
| 117 | 117 | #define IMX7ULP_PAD_PTC13__TPM7_CLKIN 0x0034 0x02f4 0x6 0x1 |
| 118 | 118 | #define IMX7ULP_PAD_PTC13__FB_AD13 0x0034 0x0000 0x9 0x0 |
| 119 | +#define IMX7ULP_PAD_PTC13__USB0_ID 0x0034 0x0338 0xb 0x1 | |
| 119 | 120 | #define IMX7ULP_PAD_PTC14__PTC14 0x0038 0x0000 0x1 0x0 |
| 120 | 121 | #define IMX7ULP_PAD_PTC14__TRACE_D1 0x0038 0x0000 0xa 0x0 |
| 121 | 122 | #define IMX7ULP_PAD_PTC14__FXIO1_D10 0x0038 0x022c 0x2 0x1 |
| @@ -136,6 +137,7 @@ · 14 unmodified lines | ||
| 136 | 137 | #define IMX7ULP_PAD_PTC16__LPSPI3_SIN 0x0040 0x0324 0x3 0x1 |
| 137 | 138 | #define IMX7ULP_PAD_PTC16__TPM7_CH2 0x0040 0x02e4 0x6 0x1 |
| 138 | 139 | #define IMX7ULP_PAD_PTC16__FB_ALE_FB_CS1_B_FB_TS_B 0x0040 0x0000 0x9 0x0 |
| 140 | +#define IMX7ULP_PAD_PTC16__USB1_OC2 0x0040 0x0334 0xb 0x1 | |
| 139 | 141 | #define IMX7ULP_PAD_PTC17__PTC17 0x0044 0x0000 0x1 0x0 |
| 140 | 142 | #define IMX7ULP_PAD_PTC17__FXIO1_D13 0x0044 0x0238 0x2 0x1 |
| 141 | 143 | #define IMX7ULP_PAD_PTC17__LPSPI3_SOUT 0x0044 0x0328 0x3 0x1 |
| @@ -146,11 +148,16 @@ · 4 unmodified lines | ||
| 146 | 148 | #define IMX7ULP_PAD_PTC18__LPSPI3_SCK 0x0048 0x0320 0x3 0x1 |
| 147 | 149 | #define IMX7ULP_PAD_PTC18__TPM6_CH0 0x0048 0x02d0 0x6 0x1 |
| 148 | 150 | #define IMX7ULP_PAD_PTC18__FB_OE_B 0x0048 0x0000 0x9 0x0 |
| 151 | +#define IMX7ULP_PAD_PTC18__USB0_ID 0x0048 0x0338 0xb 0x2 | |
| 152 | +#define IMX7ULP_PAD_PTC18__VIU_DE 0x0048 0x033c 0xc 0x1 | |
| 149 | 153 | #define IMX7ULP_PAD_PTC19__PTC19 0x004c 0x0000 0x1 0x0 |
| 150 | 154 | #define IMX7ULP_PAD_PTC19__FXIO1_D15 0x004c 0x0240 0x2 0x1 |
| 151 | 155 | #define IMX7ULP_PAD_PTC19__LPSPI3_PCS0 0x004c 0x0310 0x3 0x1 |
| 152 | 156 | #define IMX7ULP_PAD_PTC19__TPM6_CH1 0x004c 0x02d4 0x6 0x1 |
| 153 | 157 | #define IMX7ULP_PAD_PTC19__FB_A16 0x004c 0x0000 0x9 0x0 |
| 158 | +#define IMX7ULP_PAD_PTC19__USB0_ID 0x004c 0x0338 0xa 0x3 | |
| 159 | +#define IMX7ULP_PAD_PTC19__USB1_PWR2 0x004c 0x0000 0xb 0x0 | |
| 160 | +#define IMX7ULP_PAD_PTC19__VIU_DE 0x004c 0x033c 0xc 0x3 | |
| 154 | 161 | #define IMX7ULP_PAD_PTD0__PTD0 0x0080 0x0000 0x1 0x0 |
| 155 | 162 | #define IMX7ULP_PAD_PTD0__SDHC0_RESET_B 0x0080 0x0000 0x8 0x0 |
| 156 | 163 | #define IMX7ULP_PAD_PTD1__PTD1 0x0084 0x0000 0x1 0x0 |
| @@ -218,6 +225,7 @@ · 61 unmodified lines | ||
| 218 | 225 | #define IMX7ULP_PAD_PTE5__LPI2C5_SDA 0x0114 0x02c0 0x5 0x2 |
| 219 | 226 | #define IMX7ULP_PAD_PTE5__TPM5_CH0 0x0114 0x02c4 0x6 0x2 |
| 220 | 227 | #define IMX7ULP_PAD_PTE5__SDHC1_D2 0x0114 0x0000 0x8 0x0 |
| 228 | +#define IMX7ULP_PAD_PTE5__VIU_DE 0x0114 0x033c 0xc 0x2 | |
| 221 | 229 | #define IMX7ULP_PAD_PTE6__PTE6 0x0118 0x0000 0x1 0x0 |
| 222 | 230 | #define IMX7ULP_PAD_PTE6__FXIO1_D25 0x0118 0x0000 0x2 0x0 |
| 223 | 231 | #define IMX7ULP_PAD_PTE6__LPSPI2_SCK 0x0118 0x02ac 0x3 0x2 |
| @@ -226,8 +234,10 @@ · 2 unmodified lines | ||
| 226 | 234 | #define IMX7ULP_PAD_PTE6__TPM7_CH3 0x0118 0x02e8 0x6 0x2 |
| 227 | 235 | #define IMX7ULP_PAD_PTE6__SDHC1_D4 0x0118 0x0000 0x8 0x0 |
| 228 | 236 | #define IMX7ULP_PAD_PTE6__FB_A17 0x0118 0x0000 0x9 0x0 |
| 237 | +#define IMX7ULP_PAD_PTE6__USB0_OC 0x0118 0x0330 0xb 0x1 | |
| 229 | 238 | #define IMX7ULP_PAD_PTE7__PTE7 0x011c 0x0000 0x1 0x0 |
| 230 | 239 | #define IMX7ULP_PAD_PTE7__TRACE_D7 0x011c 0x0000 0xa 0x0 |
| 240 | +#define IMX7ULP_PAD_PTE7__USB0_PWR 0x011c 0x0000 0xb 0x0 | |
| 231 | 241 | #define IMX7ULP_PAD_PTE7__VIU_FID 0x011c 0x0000 0xc 0x0 |
| 232 | 242 | #define IMX7ULP_PAD_PTE7__FXIO1_D24 0x011c 0x0000 0x2 0x0 |
| 233 | 243 | #define IMX7ULP_PAD_PTE7__LPSPI2_PCS0 0x011c 0x029c 0x3 0x2 |
| @@ -278,6 +288,7 @@ · 44 unmodified lines | ||
| 278 | 288 | #define IMX7ULP_PAD_PTE11__FB_A20 0x012c 0x0000 0x9 0x0 |
| 279 | 289 | #define IMX7ULP_PAD_PTE12__PTE12 0x0130 0x0000 0x1 0x0 |
| 280 | 290 | #define IMX7ULP_PAD_PTE12__TRACE_D2 0x0130 0x0000 0xa 0x0 |
| 291 | +#define IMX7ULP_PAD_PTE12__USB1_OC2 0x0130 0x0334 0xb 0x2 | |
| 281 | 292 | #define IMX7ULP_PAD_PTE12__VIU_D20 0x0130 0x0000 0xc 0x0 |
| 282 | 293 | #define IMX7ULP_PAD_PTE12__FXIO1_D19 0x0130 0x0000 0x2 0x0 |
| 283 | 294 | #define IMX7ULP_PAD_PTE12__LPSPI3_SIN 0x0130 0x0324 0x3 0x2 |
| @@ -288,6 +299,7 @@ · 4 unmodified lines | ||
| 288 | 299 | #define IMX7ULP_PAD_PTE12__FB_A21 0x0130 0x0000 0x9 0x0 |
| 289 | 300 | #define IMX7ULP_PAD_PTE13__PTE13 0x0134 0x0000 0x1 0x0 |
| 290 | 301 | #define IMX7ULP_PAD_PTE13__TRACE_D1 0x0134 0x0000 0xa 0x0 |
| 302 | +#define IMX7ULP_PAD_PTE13__USB1_PWR2 0x0134 0x0000 0xb 0x0 | |
| 291 | 303 | #define IMX7ULP_PAD_PTE13__VIU_D21 0x0134 0x0000 0xc 0x0 |
| 292 | 304 | #define IMX7ULP_PAD_PTE13__FXIO1_D18 0x0134 0x0000 0x2 0x0 |
| 293 | 305 | #define IMX7ULP_PAD_PTE13__LPSPI3_SOUT 0x0134 0x0328 0x3 0x2 |
| @@ -298,6 +310,7 @@ · 4 unmodified lines | ||
| 298 | 310 | #define IMX7ULP_PAD_PTE13__FB_A22 0x0134 0x0000 0x9 0x0 |
| 299 | 311 | #define IMX7ULP_PAD_PTE14__PTE14 0x0138 0x0000 0x1 0x0 |
| 300 | 312 | #define IMX7ULP_PAD_PTE14__TRACE_D0 0x0138 0x0000 0xa 0x0 |
| 313 | +#define IMX7ULP_PAD_PTE14__USB0_OC 0x0138 0x0330 0xb 0x2 | |
| 301 | 314 | #define IMX7ULP_PAD_PTE14__VIU_D22 0x0138 0x0000 0xc 0x0 |
| 302 | 315 | #define IMX7ULP_PAD_PTE14__FXIO1_D17 0x0138 0x0000 0x2 0x0 |
| 303 | 316 | #define IMX7ULP_PAD_PTE14__LPSPI3_SCK 0x0138 0x0320 0x3 0x2 |
| @@ -308,6 +321,7 @@ · 4 unmodified lines | ||
| 308 | 321 | #define IMX7ULP_PAD_PTE14__FB_A23 0x0138 0x0000 0x9 0x0 |
| 309 | 322 | #define IMX7ULP_PAD_PTE15__PTE15 0x013c 0x0000 0x1 0x0 |
| 310 | 323 | #define IMX7ULP_PAD_PTE15__TRACE_CLKOUT 0x013c 0x0000 0xa 0x0 |
| 324 | +#define IMX7ULP_PAD_PTE15__USB0_PWR 0x013c 0x0000 0xb 0x0 | |
| 311 | 325 | #define IMX7ULP_PAD_PTE15__VIU_D23 0x013c 0x0000 0xc 0x0 |
| 312 | 326 | #define IMX7ULP_PAD_PTE15__FXIO1_D16 0x013c 0x0000 0x2 0x0 |
| 313 | 327 | #define IMX7ULP_PAD_PTE15__LPSPI3_PCS0 0x013c 0x0310 0x3 0x2 |
| @@ -315,7 +329,7 @@ · 1 unmodified line | ||
| 315 | 329 | #define IMX7ULP_PAD_PTE15__TPM6_CH1 0x013c 0x02d4 0x6 0x2 |
| 316 | 330 | #define IMX7ULP_PAD_PTE15__FB_A24 0x013c 0x0000 0x9 0x0 |
| 317 | 331 | #define IMX7ULP_PAD_PTF0__PTF0 0x0180 0x0000 0x1 0x0 |
| 318 | −#define IMX7ULP_PAD_PTF0__VIU_DE 0x0180 0x0000 0xc 0x0 | |
| 332 | +#define IMX7ULP_PAD_PTF0__VIU_DE 0x0180 0x033c 0xc 0x0 | |
| 319 | 333 | #define IMX7ULP_PAD_PTF0__LPUART4_CTS_B 0x0180 0x0244 0x4 0x3 |
| 320 | 334 | #define IMX7ULP_PAD_PTF0__LPI2C4_SCL 0x0180 0x0278 0x5 0x3 |
| 321 | 335 | #define IMX7ULP_PAD_PTF0__TPM4_CLKIN 0x0180 0x0298 0x6 0x3 |
| @@ -160,10 +160,6 @@ · 159 unmodified lines | ||
| 160 | 160 | clock-frequency = <100000000>; |
| 161 | 161 | }; |
| 162 | 162 | |
| 163 | −&pciec { | |
| 164 | − status = "okay"; | |
| 165 | −}; | |
| 166 | − | |
| 167 | 163 | &pfc { |
| 168 | 164 | can0_pins: can0 { |
| 169 | 165 | groups = "can0_data_d"; |
| @@ -416,7 +416,7 @@ · 415 unmodified lines | ||
| 416 | 416 | clock-names = "fck", "mmchsdb_fck"; |
| 417 | 417 | }; |
| 418 | 418 | |
| 419 | − qspi: qspi@2940000 { | |
| 419 | + qspi: spi@2940000 { | |
| 420 | 420 | compatible = "ti,k2g-qspi", "cdns,qspi-nor"; |
| 421 | 421 | #address-cells = <1>; |
| 422 | 422 | #size-cells = <0>; |
| @@ -179,7 +179,7 @@ · 178 unmodified lines | ||
| 179 | 179 | * ssp0 and spi1 are shared pins; |
| 180 | 180 | * enable one in your board dts, as needed. |
| 181 | 181 | */ |
| 182 | − ssp0: ssp@20084000 { | |
| 182 | + ssp0: spi@20084000 { | |
| 183 | 183 | compatible = "arm,pl022", "arm,primecell"; |
| 184 | 184 | reg = <0x20084000 0x1000>; |
| 185 | 185 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; |
| @@ -199,7 +199,7 @@ · 13 unmodified lines | ||
| 199 | 199 | * ssp1 and spi2 are shared pins; |
| 200 | 200 | * enable one in your board dts, as needed. |
| 201 | 201 | */ |
| 202 | − ssp1: ssp@2008c000 { | |
| 202 | + ssp1: spi@2008c000 { | |
| 203 | 203 | compatible = "arm,pl022", "arm,primecell"; |
| 204 | 204 | reg = <0x2008c000 0x1000>; |
| 205 | 205 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; |
| @@ -1,5 +1,6 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright 2013-2014 Freescale Semiconductor, Inc. |
| 3 | + * Copyright 2018 NXP | |
| 3 | 4 | * |
| 4 | 5 | * This file is dual-licensed: you can use it either under the terms |
| 5 | 6 | * of the GPL or the X11 license, at your option. Note that this dual |
| @@ -235,6 +236,7 @@ · 229 unmodified lines | ||
| 235 | 236 | #size-cells = <1>; |
| 236 | 237 | compatible = "cfi-flash"; |
| 237 | 238 | reg = <0x0 0x0 0x8000000>; |
| 239 | + big-endian; | |
| 238 | 240 | bank-width = <2>; |
| 239 | 241 | device-width = <1>; |
| 240 | 242 | }; |
| @@ -1,5 +1,6 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Copyright 2013-2014 Freescale Semiconductor, Inc. |
| 3 | + * Copyright 2018 NXP | |
| 3 | 4 | * |
| 4 | 5 | * This file is dual-licensed: you can use it either under the terms |
| 5 | 6 | * of the GPL or the X11 license, at your option. Note that this dual |
| @@ -203,6 +204,7 @@ · 197 unmodified lines | ||
| 203 | 204 | #size-cells = <1>; |
| 204 | 205 | compatible = "cfi-flash"; |
| 205 | 206 | reg = <0x0 0x0 0x8000000>; |
| 207 | + big-endian; | |
| 206 | 208 | bank-width = <2>; |
| 207 | 209 | device-width = <1>; |
| 208 | 210 | }; |
| @@ -163,7 +163,7 @@ · 162 unmodified lines | ||
| 163 | 163 | big-endian; |
| 164 | 164 | }; |
| 165 | 165 | |
| 166 | − qspi: quadspi@1550000 { | |
| 166 | + qspi: spi@1550000 { | |
| 167 | 167 | compatible = "fsl,ls1021a-qspi"; |
| 168 | 168 | #address-cells = <1>; |
| 169 | 169 | #size-cells = <0>; |
| @@ -330,7 +330,7 @@ · 160 unmodified lines | ||
| 330 | 330 | }; |
| 331 | 331 | }; |
| 332 | 332 | |
| 333 | − dspi0: dspi@2100000 { | |
| 333 | + dspi0: spi@2100000 { | |
| 334 | 334 | compatible = "fsl,ls1021a-v1.0-dspi"; |
| 335 | 335 | #address-cells = <1>; |
| 336 | 336 | #size-cells = <0>; |
| @@ -343,7 +343,7 @@ · 6 unmodified lines | ||
| 343 | 343 | status = "disabled"; |
| 344 | 344 | }; |
| 345 | 345 | |
| 346 | − dspi1: dspi@2110000 { | |
| 346 | + dspi1: spi@2110000 { | |
| 347 | 347 | compatible = "fsl,ls1021a-v1.0-dspi"; |
| 348 | 348 | #address-cells = <1>; |
| 349 | 349 | #size-cells = <0>; |
| @@ -364,6 +364,8 @@ · 14 unmodified lines | ||
| 364 | 364 | interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; |
| 365 | 365 | clock-names = "i2c"; |
| 366 | 366 | clocks = <&clockgen 4 1>; |
| 367 | + dma-names = "tx", "rx"; | |
| 368 | + dmas = <&edma0 1 39>, <&edma0 1 38>; | |
| 367 | 369 | status = "disabled"; |
| 368 | 370 | }; |
| 369 | 371 | |
| @@ -375,6 +377,8 @@ · 5 unmodified lines | ||
| 375 | 377 | interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; |
| 376 | 378 | clock-names = "i2c"; |
| 377 | 379 | clocks = <&clockgen 4 1>; |
| 380 | + dma-names = "tx", "rx"; | |
| 381 | + dmas = <&edma0 1 37>, <&edma0 1 36>; | |
| 378 | 382 | status = "disabled"; |
| 379 | 383 | }; |
| 380 | 384 | |
| @@ -386,6 +390,8 @@ · 5 unmodified lines | ||
| 386 | 390 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; |
| 387 | 391 | clock-names = "i2c"; |
| 388 | 392 | clocks = <&clockgen 4 1>; |
| 393 | + dma-names = "tx", "rx"; | |
| 394 | + dmas = <&edma0 1 35>, <&edma0 1 34>; | |
| 389 | 395 | status = "disabled"; |
| 390 | 396 | }; |
| 391 | 397 | |
| @@ -194,7 +194,7 @@ · 193 unmodified lines | ||
| 194 | 194 | #clock-cells = <1>; |
| 195 | 195 | #reset-cells = <1>; |
| 196 | 196 | compatible = "amlogic,meson8-clkc"; |
| 197 | − reg = <0x8000 0x4>, <0x4000 0x460>; | |
| 197 | + reg = <0x8000 0x4>, <0x4000 0x400>; | |
| 198 | 198 | }; |
| 199 | 199 | |
| 200 | 200 | reset: reset-controller@4404 { |
| @@ -0,0 +1,248 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 2 | +/* | |
| 3 | + * Copyright (c) 2018 Martin Blumenstingl <martin.blumenstingl@googlemail.com>. | |
| 4 | + */ | |
| 5 | + | |
| 6 | +/dts-v1/; | |
| 7 | + | |
| 8 | +#include <dt-bindings/gpio/gpio.h> | |
| 9 | +#include <dt-bindings/input/input.h> | |
| 10 | + | |
| 11 | +#include "meson8b.dtsi" | |
| 12 | + | |
| 13 | +/ { | |
| 14 | + model = "Endless Computers Endless Mini"; | |
| 15 | + compatible = "endless,ec100", "amlogic,meson8b"; | |
| 16 | + | |
| 17 | + aliases { | |
| 18 | + serial0 = &uart_AO; | |
| 19 | + }; | |
| 20 | + | |
| 21 | + chosen { | |
| 22 | + stdout-path = "serial0:115200n8"; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + memory { | |
| 26 | + reg = <0x40000000 0x40000000>; | |
| 27 | + }; | |
| 28 | + | |
| 29 | + gpio-keys { | |
| 30 | + compatible = "gpio-keys-polled"; | |
| 31 | + #address-cells = <1>; | |
| 32 | + #size-cells = <0>; | |
| 33 | + poll-interval = <100>; | |
| 34 | + | |
| 35 | + pal-switch { | |
| 36 | + label = "pal"; | |
| 37 | + linux,input-type = <EV_SW>; | |
| 38 | + linux,code = <KEY_SWITCHVIDEOMODE>; | |
| 39 | + gpios = <&gpio GPIOH_7 GPIO_ACTIVE_LOW>; | |
| 40 | + }; | |
| 41 | + | |
| 42 | + ntsc-switch { | |
| 43 | + label = "ntsc"; | |
| 44 | + linux,input-type = <EV_SW>; | |
| 45 | + linux,code = <KEY_SWITCHVIDEOMODE>; | |
| 46 | + gpios = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>; | |
| 47 | + }; | |
| 48 | + | |
| 49 | + power-button { | |
| 50 | + label = "power"; | |
| 51 | + linux,code = <KEY_POWER>; | |
| 52 | + gpios = <&gpio GPIOH_9 GPIO_ACTIVE_LOW>; | |
| 53 | + }; | |
| 54 | + }; | |
| 55 | + | |
| 56 | + gpio-poweroff { | |
| 57 | + compatible = "gpio-poweroff"; | |
| 58 | + /* | |
| 59 | + * shutdown is managed by the EC (embedded micro-controller) | |
| 60 | + * which is configured through GPIOAO_2 (poweroff GPIO) and | |
| 61 | + * GPIOAO_7 (power LED, which has to go LOW as well). | |
| 62 | + */ | |
| 63 | + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; | |
| 64 | + timeout-ms = <20000>; | |
| 65 | + }; | |
| 66 | + | |
| 67 | + leds { | |
| 68 | + compatible = "gpio-leds"; | |
| 69 | + | |
| 70 | + power { | |
| 71 | + label = "ec100:red:power"; | |
| 72 | + /* | |
| 73 | + * Needs to go LOW (together with the poweroff GPIO) | |
| 74 | + * during shutdown to allow the EC (embedded | |
| 75 | + * micro-controller) to shutdown the system. Setting | |
| 76 | + * the output to LOW signals the EC to start a | |
| 77 | + * "breathing"/pulsing effect until the power is fully | |
| 78 | + * turned off. | |
| 79 | + */ | |
| 80 | + gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>; | |
| 81 | + default-state = "on"; | |
| 82 | + }; | |
| 83 | + }; | |
| 84 | + | |
| 85 | + usb_vbus: regulator-usb-vbus { | |
| 86 | + compatible = "regulator-fixed"; | |
| 87 | + | |
| 88 | + regulator-name = "USB_VBUS"; | |
| 89 | + | |
| 90 | + regulator-min-microvolt = <5000000>; | |
| 91 | + regulator-max-microvolt = <5000000>; | |
| 92 | + | |
| 93 | + gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; | |
| 94 | + enable-active-high; | |
| 95 | + }; | |
| 96 | + | |
| 97 | + vcc_5v: regulator-vcc5v { | |
| 98 | + compatible = "regulator-fixed"; | |
| 99 | + | |
| 100 | + regulator-name = "VCC5V"; | |
| 101 | + | |
| 102 | + regulator-min-microvolt = <5000000>; | |
| 103 | + regulator-max-microvolt = <5000000>; | |
| 104 | + | |
| 105 | + gpio = <&gpio GPIODV_29 GPIO_ACTIVE_LOW>; | |
| 106 | + | |
| 107 | + regulator-boot-on; | |
| 108 | + regulator-always-on; | |
| 109 | + }; | |
| 110 | + | |
| 111 | + vcck: regulator-vcck { | |
| 112 | + compatible = "pwm-regulator"; | |
| 113 | + | |
| 114 | + regulator-name = "VCCK"; | |
| 115 | + regulator-min-microvolt = <860000>; | |
| 116 | + regulator-max-microvolt = <1140000>; | |
| 117 | + | |
| 118 | + pwms = <&pwm_cd 0 1148 0>; | |
| 119 | + pwm-dutycycle-range = <100 0>; | |
| 120 | + | |
| 121 | + regulator-boot-on; | |
| 122 | + regulator-always-on; | |
| 123 | + }; | |
| 124 | + | |
| 125 | + vcc_1v8: regulator-vcc1v8 { | |
| 126 | + compatible = "regulator-fixed"; | |
| 127 | + | |
| 128 | + regulator-name = "VCC1V8"; | |
| 129 | + regulator-min-microvolt = <1800000>; | |
| 130 | + regulator-max-microvolt = <1800000>; | |
| 131 | + }; | |
| 132 | + | |
| 133 | + vcc_3v3: regulator-vcc3v3 { | |
| 134 | + compatible = "regulator-fixed"; | |
| 135 | + | |
| 136 | + regulator-name = "VCC3V3"; | |
| 137 | + regulator-min-microvolt = <3300000>; | |
| 138 | + regulator-max-microvolt = <3300000>; | |
| 139 | + }; | |
| 140 | +}; | |
| 141 | + | |
| 142 | +&cpu0 { | |
| 143 | + cpu-supply = <&vcck>; | |
| 144 | +}; | |
| 145 | + | |
| 146 | +ðmac { | |
| 147 | + status = "okay"; | |
| 148 | + | |
| 149 | + pinctrl-0 = <ð_rmii_pins>; | |
| 150 | + pinctrl-names = "default"; | |
| 151 | + | |
| 152 | + phy-handle = <ð_phy0>; | |
| 153 | + phy-mode = "rmii"; | |
| 154 | + | |
| 155 | + snps,reset-gpio = <&gpio GPIOH_4 0>; | |
| 156 | + snps,reset-delays-us = <0 10000 1000000>; | |
| 157 | + snps,reset-active-low; | |
| 158 | + | |
| 159 | + mdio { | |
| 160 | + compatible = "snps,dwmac-mdio"; | |
| 161 | + #address-cells = <1>; | |
| 162 | + #size-cells = <0>; | |
| 163 | + | |
| 164 | + eth_phy0: ethernet-phy@0 { | |
| 165 | + /* IC Plus IP101A/G (0x02430c54) */ | |
| 166 | + reg = <0>; | |
| 167 | + }; | |
| 168 | + }; | |
| 169 | +}; | |
| 170 | + | |
| 171 | +&i2c_A { | |
| 172 | + status = "okay"; | |
| 173 | + pinctrl-0 = <&i2c_a_pins>; | |
| 174 | + pinctrl-names = "default"; | |
| 175 | + | |
| 176 | + rt5640: codec@1c { | |
| 177 | + compatible = "realtek,rt5640"; | |
| 178 | + reg = <0x1c>; | |
| 179 | + interrupt-parent = <&gpio_intc>; | |
| 180 | + interrupts = <13 IRQ_TYPE_EDGE_BOTH>; /* GPIOAO_13 */ | |
| 181 | + realtek,in1-differential; | |
| 182 | + }; | |
| 183 | +}; | |
| 184 | + | |
| 185 | +&saradc { | |
| 186 | + status = "okay"; | |
| 187 | + vref-supply = <&vcc_1v8>; | |
| 188 | +}; | |
| 189 | + | |
| 190 | +&sdio { | |
| 191 | + status = "okay"; | |
| 192 | + | |
| 193 | + pinctrl-0 = <&sd_b_pins>; | |
| 194 | + pinctrl-names = "default"; | |
| 195 | + | |
| 196 | + /* SD card */ | |
| 197 | + sd_card_slot: slot@1 { | |
| 198 | + compatible = "mmc-slot"; | |
| 199 | + reg = <1>; | |
| 200 | + status = "okay"; | |
| 201 | + | |
| 202 | + bus-width = <4>; | |
| 203 | + no-sdio; | |
| 204 | + cap-mmc-highspeed; | |
| 205 | + cap-sd-highspeed; | |
| 206 | + disable-wp; | |
| 207 | + | |
| 208 | + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; | |
| 209 | + cd-inverted; | |
| 210 | + | |
| 211 | + vmmc-supply = <&vcc_3v3>; | |
| 212 | + }; | |
| 213 | +}; | |
| 214 | + | |
| 215 | +&pwm_cd { | |
| 216 | + status = "okay"; | |
| 217 | + pinctrl-0 = <&pwm_c1_pins>; | |
| 218 | + pinctrl-names = "default"; | |
| 219 | + clocks = <&clkc CLKID_XTAL>; | |
| 220 | + clock-names = "clkin0"; | |
| 221 | +}; | |
| 222 | + | |
| 223 | +/* exposed through the pin headers labeled "URDUG1" on the top of the PCB */ | |
| 224 | +&uart_AO { | |
| 225 | + status = "okay"; | |
| 226 | + pinctrl-0 = <&uart_ao_a_pins>; | |
| 227 | + pinctrl-names = "default"; | |
| 228 | +}; | |
| 229 | + | |
| 230 | +/* | |
| 231 | + * connected to the Bluetooth part of the RTL8723BS SDIO wifi / Bluetooth | |
| 232 | + * combo chip. This is only available on the variant with 2GB RAM. | |
| 233 | + */ | |
| 234 | +&uart_B { | |
| 235 | + status = "okay"; | |
| 236 | + pinctrl-0 = <&uart_b0_pins>, <&uart_b0_cts_rts_pins>; | |
| 237 | + pinctrl-names = "default"; | |
| 238 | + uart-has-rtscts; | |
| 239 | +}; | |
| 240 | + | |
| 241 | +&usb1 { | |
| 242 | + status = "okay"; | |
| 243 | + vbus-supply = <&usb_vbus>; | |
| 244 | +}; | |
| 245 | + | |
| 246 | +&usb1_phy { | |
| 247 | + status = "okay"; | |
| 248 | +}; | |
| @@ -57,6 +57,10 @@ · 56 unmodified lines | ||
| 57 | 57 | mmc0 = &sd_card_slot; |
| 58 | 58 | }; |
| 59 | 59 | |
| 60 | + chosen { | |
| 61 | + stdout-path = "serial0:115200n8"; | |
| 62 | + }; | |
| 63 | + | |
| 60 | 64 | memory { |
| 61 | 65 | reg = <0x40000000 0x40000000>; |
| 62 | 66 | }; |
| @@ -71,6 +75,14 @@ · 8 unmodified lines | ||
| 71 | 75 | }; |
| 72 | 76 | }; |
| 73 | 77 | |
| 78 | + p5v0: regulator-p5v0 { | |
| 79 | + compatible = "regulator-fixed"; | |
| 80 | + | |
| 81 | + regulator-name = "P5V0"; | |
| 82 | + regulator-min-microvolt = <5000000>; | |
| 83 | + regulator-max-microvolt = <5000000>; | |
| 84 | + }; | |
| 85 | + | |
| 74 | 86 | tflash_vdd: regulator-tflash_vdd { |
| 75 | 87 | /* |
| 76 | 88 | * signal name from schematics: TFLASH_VDD_EN |
| @@ -81,6 +93,8 @@ · 4 unmodified lines | ||
| 81 | 93 | regulator-min-microvolt = <3300000>; |
| 82 | 94 | regulator-max-microvolt = <3300000>; |
| 83 | 95 | |
| 96 | + vin-supply = <&vcc_3v3>; | |
| 97 | + | |
| 84 | 98 | gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>; |
| 85 | 99 | enable-active-high; |
| 86 | 100 | }; |
| @@ -92,6 +106,8 @@ · 5 unmodified lines | ||
| 92 | 106 | regulator-min-microvolt = <1800000>; |
| 93 | 107 | regulator-max-microvolt = <3300000>; |
| 94 | 108 | |
| 109 | + vin-supply = <&vcc_3v3>; | |
| 110 | + | |
| 95 | 111 | /* |
| 96 | 112 | * signal name from schematics: TF_3V3N_1V8_EN |
| 97 | 113 | */ |
| @@ -101,6 +117,86 @@ · 3 unmodified lines | ||
| 101 | 117 | states = <3300000 0 |
| 102 | 118 | 1800000 1>; |
| 103 | 119 | }; |
| 120 | + | |
| 121 | + vcc_1v8: regulator-vcc-1v8 { | |
| 122 | + /* | |
| 123 | + * RICHTEK RT9179 configured for a fixed output voltage of | |
| 124 | + * 1.8V. This supplies not only VCC1V8 but also IOREF_1V8 and | |
| 125 | + * VDD1V8 according to the schematics. | |
| 126 | + */ | |
| 127 | + compatible = "regulator-fixed"; | |
| 128 | + | |
| 129 | + regulator-name = "VCC1V8"; | |
| 130 | + regulator-min-microvolt = <1800000>; | |
| 131 | + regulator-max-microvolt = <1800000>; | |
| 132 | + | |
| 133 | + vin-supply = <&p5v0>; | |
| 134 | + }; | |
| 135 | + | |
| 136 | + vcc_3v3: regulator-vcc-3v3 { | |
| 137 | + /* | |
| 138 | + * Monolithic Power Systems MP2161 configured for a fixed | |
| 139 | + * output voltage of 3.3V. This supplies not only VCC3V3 but | |
| 140 | + * also VDD3V3 and VDDIO_AO3V3 according to the schematics. | |
| 141 | + */ | |
| 142 | + compatible = "regulator-fixed"; | |
| 143 | + | |
| 144 | + regulator-name = "VCC3V3"; | |
| 145 | + regulator-min-microvolt = <3300000>; | |
| 146 | + regulator-max-microvolt = <3300000>; | |
| 147 | + | |
| 148 | + vin-supply = <&p5v0>; | |
| 149 | + }; | |
| 150 | + | |
| 151 | + vcck: regulator-vcck { | |
| 152 | + /* Monolithic Power Systems MP2161 */ | |
| 153 | + compatible = "pwm-regulator"; | |
| 154 | + | |
| 155 | + regulator-name = "VCCK"; | |
| 156 | + regulator-min-microvolt = <860000>; | |
| 157 | + regulator-max-microvolt = <1140000>; | |
| 158 | + | |
| 159 | + vin-supply = <&p5v0>; | |
| 160 | + | |
| 161 | + pwms = <&pwm_cd 0 12218 0>; | |
| 162 | + pwm-dutycycle-range = <91 0>; | |
| 163 | + | |
| 164 | + regulator-boot-on; | |
| 165 | + regulator-always-on; | |
| 166 | + }; | |
| 167 | + | |
| 168 | + vddc_ddr: regulator-vddc-ddr { | |
| 169 | + /* | |
| 170 | + * Monolithic Power Systems MP2161 configured for a fixed | |
| 171 | + * output voltage of 1.5V. This supplies not only DDR_VDDC but | |
| 172 | + * also DDR3_1V5 according to the schematics. | |
| 173 | + */ | |
| 174 | + compatible = "regulator-fixed"; | |
| 175 | + | |
| 176 | + regulator-name = "DDR_VDDC"; | |
| 177 | + regulator-min-microvolt = <1500000>; | |
| 178 | + regulator-max-microvolt = <1500000>; | |
| 179 | + | |
| 180 | + vin-supply = <&p5v0>; | |
| 181 | + }; | |
| 182 | + | |
| 183 | + vdd_rtc: regulator-vdd-rtc { | |
| 184 | + /* | |
| 185 | + * Torex Semiconductor XC6215 configured for a fixed output of | |
| 186 | + * 0.9V. | |
| 187 | + */ | |
| 188 | + compatible = "regulator-fixed"; | |
| 189 | + | |
| 190 | + regulator-name = "VDD_RTC"; | |
| 191 | + regulator-min-microvolt = <900000>; | |
| 192 | + regulator-max-microvolt = <900000>; | |
| 193 | + | |
| 194 | + vin-supply = <&vcc_3v3>; | |
| 195 | + }; | |
| 196 | +}; | |
| 197 | + | |
| 198 | +&cpu0 { | |
| 199 | + cpu-supply = <&vcck>; | |
| 104 | 200 | }; |
| 105 | 201 | |
| 106 | 202 | ðmac { |
| @@ -154,6 +250,11 @@ · 47 unmodified lines | ||
| 154 | 250 | pinctrl-names = "default"; |
| 155 | 251 | }; |
| 156 | 252 | |
| 253 | +&saradc { | |
| 254 | + status = "okay"; | |
| 255 | + vref-supply = <&vcc_1v8>; | |
| 256 | +}; | |
| 257 | + | |
| 157 | 258 | &sdio { |
| 158 | 259 | status = "okay"; |
| 159 | 260 | |
| @@ -180,6 +281,14 @@ · 20 unmodified lines | ||
| 180 | 281 | }; |
| 181 | 282 | }; |
| 182 | 283 | |
| 284 | +&pwm_cd { | |
| 285 | + status = "okay"; | |
| 286 | + pinctrl-0 = <&pwm_c1_pins>; | |
| 287 | + pinctrl-names = "default"; | |
| 288 | + clocks = <&clkc CLKID_XTAL>; | |
| 289 | + clock-names = "clkin0"; | |
| 290 | +}; | |
| 291 | + | |
| 183 | 292 | &uart_AO { |
| 184 | 293 | status = "okay"; |
| 185 | 294 | pinctrl-0 = <&uart_ao_a_pins>; |
| @@ -163,7 +163,7 @@ · 162 unmodified lines | ||
| 163 | 163 | #clock-cells = <1>; |
| 164 | 164 | #reset-cells = <1>; |
| 165 | 165 | compatible = "amlogic,meson8b-clkc"; |
| 166 | − reg = <0x8000 0x4>, <0x4000 0x460>; | |
| 166 | + reg = <0x8000 0x4>, <0x4000 0x400>; | |
| 167 | 167 | }; |
| 168 | 168 | |
| 169 | 169 | reset: reset-controller@4404 { |
| @@ -223,6 +223,28 @@ · 53 unmodified lines | ||
| 223 | 223 | }; |
| 224 | 224 | }; |
| 225 | 225 | |
| 226 | + eth_rmii_pins: eth-rmii { | |
| 227 | + mux { | |
| 228 | + groups = "eth_tx_en", | |
| 229 | + "eth_txd1_0", | |
| 230 | + "eth_txd0_0", | |
| 231 | + "eth_rx_clk", | |
| 232 | + "eth_rx_dv", | |
| 233 | + "eth_rxd1", | |
| 234 | + "eth_rxd0", | |
| 235 | + "eth_mdio_en", | |
| 236 | + "eth_mdc"; | |
| 237 | + function = "ethernet"; | |
| 238 | + }; | |
| 239 | + }; | |
| 240 | + | |
| 241 | + i2c_a_pins: i2c-a { | |
| 242 | + mux { | |
| 243 | + groups = "i2c_sda_a", "i2c_sck_a"; | |
| 244 | + function = "i2c_a"; | |
| 245 | + }; | |
| 246 | + }; | |
| 247 | + | |
| 226 | 248 | sd_b_pins: sd-b { |
| 227 | 249 | mux { |
| 228 | 250 | groups = "sd_d0_b", "sd_d1_b", "sd_d2_b", |
| @@ -230,6 +252,29 @@ · 1 unmodified line | ||
| 230 | 252 | function = "sd_b"; |
| 231 | 253 | }; |
| 232 | 254 | }; |
| 255 | + | |
| 256 | + pwm_c1_pins: pwm-c1 { | |
| 257 | + mux { | |
| 258 | + groups = "pwm_c1"; | |
| 259 | + function = "pwm_c"; | |
| 260 | + }; | |
| 261 | + }; | |
| 262 | + | |
| 263 | + uart_b0_pins: uart-b0 { | |
| 264 | + mux { | |
| 265 | + groups = "uart_tx_b0", | |
| 266 | + "uart_rx_b0"; | |
| 267 | + function = "uart_b"; | |
| 268 | + }; | |
| 269 | + }; | |
| 270 | + | |
| 271 | + uart_b0_cts_rts_pins: uart-b0-cts-rts { | |
| 272 | + mux { | |
| 273 | + groups = "uart_cts_b0", | |
| 274 | + "uart_rts_b0"; | |
| 275 | + function = "uart_b"; | |
| 276 | + }; | |
| 277 | + }; | |
| 233 | 278 | }; |
| 234 | 279 | }; |
| 235 | 280 | |
| @@ -13,6 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | #include <dt-bindings/power/mt2701-power.h> |
| 14 | 14 | #include <dt-bindings/gpio/gpio.h> |
| 15 | 15 | #include <dt-bindings/phy/phy.h> |
| 16 | +#include <dt-bindings/memory/mt2701-larb-port.h> | |
| 16 | 17 | #include <dt-bindings/reset/mt2701-resets.h> |
| 17 | 18 | #include <dt-bindings/thermal/thermal.h> |
| 18 | 19 | |
| @@ -121,6 +122,15 @@ · 102 unmodified lines | ||
| 121 | 122 | }; |
| 122 | 123 | }; |
| 123 | 124 | |
| 125 | + pmu { | |
| 126 | + compatible = "arm,cortex-a7-pmu"; | |
| 127 | + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_LOW>, | |
| 128 | + <GIC_SPI 5 IRQ_TYPE_LEVEL_LOW>, | |
| 129 | + <GIC_SPI 6 IRQ_TYPE_LEVEL_LOW>, | |
| 130 | + <GIC_SPI 7 IRQ_TYPE_LEVEL_LOW>; | |
| 131 | + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; | |
| 132 | + }; | |
| 133 | + | |
| 124 | 134 | system_clk: dummy13m { |
| 125 | 135 | compatible = "fixed-clock"; |
| 126 | 136 | clock-frequency = <13000000>; |
| @@ -277,6 +287,17 @@ · 150 unmodified lines | ||
| 277 | 287 | clock-names = "system-clk", "rtc-clk"; |
| 278 | 288 | }; |
| 279 | 289 | |
| 290 | + smi_common: smi@1000c000 { | |
| 291 | + compatible = "mediatek,mt7623-smi-common", | |
| 292 | + "mediatek,mt2701-smi-common"; | |
| 293 | + reg = <0 0x1000c000 0 0x1000>; | |
| 294 | + clocks = <&infracfg CLK_INFRA_SMI>, | |
| 295 | + <&mmsys CLK_MM_SMI_COMMON>, | |
| 296 | + <&infracfg CLK_INFRA_SMI>; | |
| 297 | + clock-names = "apb", "smi", "async"; | |
| 298 | + power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; | |
| 299 | + }; | |
| 300 | + | |
| 280 | 301 | pwrap: pwrap@1000d000 { |
| 281 | 302 | compatible = "mediatek,mt7623-pwrap", |
| 282 | 303 | "mediatek,mt2701-pwrap"; |
| @@ -308,6 +329,17 @@ · 25 unmodified lines | ||
| 308 | 329 | reg = <0 0x10200100 0 0x1c>; |
| 309 | 330 | }; |
| 310 | 331 | |
| 332 | + iommu: mmsys_iommu@10205000 { | |
| 333 | + compatible = "mediatek,mt7623-m4u", | |
| 334 | + "mediatek,mt2701-m4u"; | |
| 335 | + reg = <0 0x10205000 0 0x1000>; | |
| 336 | + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>; | |
| 337 | + clocks = <&infracfg CLK_INFRA_M4U>; | |
| 338 | + clock-names = "bclk"; | |
| 339 | + mediatek,larbs = <&larb0 &larb1 &larb2>; | |
| 340 | + #iommu-cells = <1>; | |
| 341 | + }; | |
| 342 | + | |
| 311 | 343 | efuse: efuse@10206000 { |
| 312 | 344 | compatible = "mediatek,mt7623-efuse", |
| 313 | 345 | "mediatek,mt8173-efuse"; |
| @@ -683,6 +715,90 @@ · 369 unmodified lines | ||
| 683 | 715 | status = "disabled"; |
| 684 | 716 | }; |
| 685 | 717 | |
| 718 | + g3dsys: syscon@13000000 { | |
| 719 | + compatible = "mediatek,mt7623-g3dsys", | |
| 720 | + "mediatek,mt2701-g3dsys", | |
| 721 | + "syscon"; | |
| 722 | + reg = <0 0x13000000 0 0x200>; | |
| 723 | + #clock-cells = <1>; | |
| 724 | + #reset-cells = <1>; | |
| 725 | + }; | |
| 726 | + | |
| 727 | + mmsys: syscon@14000000 { | |
| 728 | + compatible = "mediatek,mt7623-mmsys", | |
| 729 | + "mediatek,mt2701-mmsys", | |
| 730 | + "syscon"; | |
| 731 | + reg = <0 0x14000000 0 0x1000>; | |
| 732 | + #clock-cells = <1>; | |
| 733 | + }; | |
| 734 | + | |
| 735 | + larb0: larb@14010000 { | |
| 736 | + compatible = "mediatek,mt7623-smi-larb", | |
| 737 | + "mediatek,mt2701-smi-larb"; | |
| 738 | + reg = <0 0x14010000 0 0x1000>; | |
| 739 | + mediatek,smi = <&smi_common>; | |
| 740 | + mediatek,larb-id = <0>; | |
| 741 | + clocks = <&mmsys CLK_MM_SMI_LARB0>, | |
| 742 | + <&mmsys CLK_MM_SMI_LARB0>; | |
| 743 | + clock-names = "apb", "smi"; | |
| 744 | + power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>; | |
| 745 | + }; | |
| 746 | + | |
| 747 | + imgsys: syscon@15000000 { | |
| 748 | + compatible = "mediatek,mt7623-imgsys", | |
| 749 | + "mediatek,mt2701-imgsys", | |
| 750 | + "syscon"; | |
| 751 | + reg = <0 0x15000000 0 0x1000>; | |
| 752 | + #clock-cells = <1>; | |
| 753 | + }; | |
| 754 | + | |
| 755 | + larb2: larb@15001000 { | |
| 756 | + compatible = "mediatek,mt7623-smi-larb", | |
| 757 | + "mediatek,mt2701-smi-larb"; | |
| 758 | + reg = <0 0x15001000 0 0x1000>; | |
| 759 | + mediatek,smi = <&smi_common>; | |
| 760 | + mediatek,larb-id = <2>; | |
| 761 | + clocks = <&imgsys CLK_IMG_SMI_COMM>, | |
| 762 | + <&imgsys CLK_IMG_SMI_COMM>; | |
| 763 | + clock-names = "apb", "smi"; | |
| 764 | + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; | |
| 765 | + }; | |
| 766 | + | |
| 767 | + jpegdec: jpegdec@15004000 { | |
| 768 | + compatible = "mediatek,mt7623-jpgdec", | |
| 769 | + "mediatek,mt2701-jpgdec"; | |
| 770 | + reg = <0 0x15004000 0 0x1000>; | |
| 771 | + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>; | |
| 772 | + clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, | |
| 773 | + <&imgsys CLK_IMG_JPGDEC>; | |
| 774 | + clock-names = "jpgdec-smi", | |
| 775 | + "jpgdec"; | |
| 776 | + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; | |
| 777 | + mediatek,larb = <&larb2>; | |
| 778 | + iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, | |
| 779 | + <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; | |
| 780 | + }; | |
| 781 | + | |
| 782 | + vdecsys: syscon@16000000 { | |
| 783 | + compatible = "mediatek,mt7623-vdecsys", | |
| 784 | + "mediatek,mt2701-vdecsys", | |
| 785 | + "syscon"; | |
| 786 | + reg = <0 0x16000000 0 0x1000>; | |
| 787 | + #clock-cells = <1>; | |
| 788 | + }; | |
| 789 | + | |
| 790 | + larb1: larb@16010000 { | |
| 791 | + compatible = "mediatek,mt7623-smi-larb", | |
| 792 | + "mediatek,mt2701-smi-larb"; | |
| 793 | + reg = <0 0x16010000 0 0x1000>; | |
| 794 | + mediatek,smi = <&smi_common>; | |
| 795 | + mediatek,larb-id = <1>; | |
| 796 | + clocks = <&vdecsys CLK_VDEC_CKGEN>, | |
| 797 | + <&vdecsys CLK_VDEC_LARB>; | |
| 798 | + clock-names = "apb", "smi"; | |
| 799 | + power-domains = <&scpsys MT2701_POWER_DOMAIN_VDEC>; | |
| 800 | + }; | |
| 801 | + | |
| 686 | 802 | hifsys: syscon@1a000000 { |
| 687 | 803 | compatible = "mediatek,mt7623-hifsys", |
| 688 | 804 | "mediatek,mt2701-hifsys", |
| @@ -937,6 +1053,14 @@ · 248 unmodified lines | ||
| 937 | 1053 | power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; |
| 938 | 1054 | status = "disabled"; |
| 939 | 1055 | }; |
| 1056 | + | |
| 1057 | + bdpsys: syscon@1c000000 { | |
| 1058 | + compatible = "mediatek,mt7623-bdpsys", | |
| 1059 | + "mediatek,mt2701-bdpsys", | |
| 1060 | + "syscon"; | |
| 1061 | + reg = <0 0x1c000000 0 0x1000>; | |
| 1062 | + #clock-cells = <1>; | |
| 1063 | + }; | |
| 940 | 1064 | }; |
| 941 | 1065 | |
| 942 | 1066 | &pio { |
| @@ -114,7 +114,7 @@ · 113 unmodified lines | ||
| 114 | 114 | dma-names = "tx", "rx"; |
| 115 | 115 | }; |
| 116 | 116 | |
| 117 | − mcspi1: mcspi@48098000 { | |
| 117 | + mcspi1: spi@48098000 { | |
| 118 | 118 | compatible = "ti,omap2-mcspi"; |
| 119 | 119 | ti,hwmods = "mcspi1"; |
| 120 | 120 | reg = <0x48098000 0x100>; |
| @@ -125,7 +125,7 @@ · 4 unmodified lines | ||
| 125 | 125 | "tx2", "rx2", "tx3", "rx3"; |
| 126 | 126 | }; |
| 127 | 127 | |
| 128 | − mcspi2: mcspi@4809a000 { | |
| 128 | + mcspi2: spi@4809a000 { | |
| 129 | 129 | compatible = "ti,omap2-mcspi"; |
| 130 | 130 | ti,hwmods = "mcspi2"; |
| 131 | 131 | reg = <0x4809a000 0x100>; |
| @@ -285,7 +285,7 @@ · 284 unmodified lines | ||
| 285 | 285 | ti,timer-alwon; |
| 286 | 286 | }; |
| 287 | 287 | |
| 288 | − mcspi3: mcspi@480b8000 { | |
| 288 | + mcspi3: spi@480b8000 { | |
| 289 | 289 | compatible = "ti,omap2-mcspi"; |
| 290 | 290 | ti,hwmods = "mcspi3"; |
| 291 | 291 | reg = <0x480b8000 0x100>; |
| @@ -160,10 +160,11 @@ · 159 unmodified lines | ||
| 160 | 160 | |
| 161 | 161 | clocks = <&emu_src_ck>; |
| 162 | 162 | clock-names = "apb_pclk"; |
| 163 | − port { | |
| 164 | − etb_in: endpoint { | |
| 165 | − slave-mode; | |
| 166 | − remote-endpoint = <&etm_out>; | |
| 163 | + in-ports { | |
| 164 | + port { | |
| 165 | + etb_in: endpoint { | |
| 166 | + remote-endpoint = <&etm_out>; | |
| 167 | + }; | |
| 167 | 168 | }; |
| 168 | 169 | }; |
| 169 | 170 | }; |
| @@ -174,9 +175,11 @@ · 4 unmodified lines | ||
| 174 | 175 | |
| 175 | 176 | clocks = <&emu_src_ck>; |
| 176 | 177 | clock-names = "apb_pclk"; |
| 177 | − port { | |
| 178 | − etm_out: endpoint { | |
| 179 | − remote-endpoint = <&etb_in>; | |
| 178 | + out-ports { | |
| 179 | + port { | |
| 180 | + etm_out: endpoint { | |
| 181 | + remote-endpoint = <&etb_in>; | |
| 182 | + }; | |
| 180 | 183 | }; |
| 181 | 184 | }; |
| 182 | 185 | }; |
| @@ -147,10 +147,11 @@ · 146 unmodified lines | ||
| 147 | 147 | |
| 148 | 148 | clocks = <&emu_src_ck>; |
| 149 | 149 | clock-names = "apb_pclk"; |
| 150 | − port { | |
| 151 | − etb_in: endpoint { | |
| 152 | − slave-mode; | |
| 153 | − remote-endpoint = <&etm_out>; | |
| 150 | + in-ports { | |
| 151 | + port { | |
| 152 | + etb_in: endpoint { | |
| 153 | + remote-endpoint = <&etm_out>; | |
| 154 | + }; | |
| 154 | 155 | }; |
| 155 | 156 | }; |
| 156 | 157 | }; |
| @@ -161,9 +162,11 @@ · 4 unmodified lines | ||
| 161 | 162 | |
| 162 | 163 | clocks = <&emu_src_ck>; |
| 163 | 164 | clock-names = "apb_pclk"; |
| 164 | − port { | |
| 165 | − etm_out: endpoint { | |
| 166 | − remote-endpoint = <&etb_in>; | |
| 165 | + out-ports { | |
| 166 | + port { | |
| 167 | + etm_out: endpoint { | |
| 168 | + remote-endpoint = <&etb_in>; | |
| 169 | + }; | |
| 167 | 170 | }; |
| 168 | 171 | }; |
| 169 | 172 | }; |
| @@ -10,6 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | /dts-v1/; |
| 11 | 11 | |
| 12 | 12 | #include "omap36xx.dtsi" |
| 13 | +#include <dt-bindings/input/input.h> | |
| 13 | 14 | |
| 14 | 15 | / { |
| 15 | 16 | model = "OMAP3 GTA04"; |
| @@ -28,6 +29,7 @@ · 12 unmodified lines | ||
| 28 | 29 | |
| 29 | 30 | aliases { |
| 30 | 31 | display0 = &lcd; |
| 32 | + display1 = &tv0; | |
| 31 | 33 | }; |
| 32 | 34 | |
| 33 | 35 | /* fixed 26MHz oscillator */ |
| @@ -42,12 +44,27 @@ · 8 unmodified lines | ||
| 42 | 44 | |
| 43 | 45 | aux-button { |
| 44 | 46 | label = "aux"; |
| 45 | − linux,code = <169>; | |
| 47 | + linux,code = <KEY_PHONE>; | |
| 46 | 48 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
| 47 | 49 | wakeup-source; |
| 48 | 50 | }; |
| 49 | 51 | }; |
| 50 | 52 | |
| 53 | + antenna-detect { | |
| 54 | + compatible = "gpio-keys"; | |
| 55 | + | |
| 56 | + gps_antenna_button: gps-antenna-button { | |
| 57 | + label = "GPS_EXT_ANT"; | |
| 58 | + linux,input-type = <EV_SW>; | |
| 59 | + linux,code = <SW_LINEIN_INSERT>; | |
| 60 | + gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* GPIO144 */ | |
| 61 | + interrupt-parent = <&gpio5>; | |
| 62 | + interrupts = <16 IRQ_TYPE_EDGE_BOTH>; | |
| 63 | + debounce-interval = <10>; | |
| 64 | + wakeup-source; | |
| 65 | + }; | |
| 66 | + }; | |
| 67 | + | |
| 51 | 68 | sound { |
| 52 | 69 | compatible = "ti,omap-twl4030"; |
| 53 | 70 | ti,model = "gta04"; |
| @@ -55,7 +72,7 @@ · 1 unmodified line | ||
| 55 | 72 | ti,mcbsp = <&mcbsp2>; |
| 56 | 73 | }; |
| 57 | 74 | |
| 58 | − /* GSM audio */ | |
| 75 | + /* GSM audio */ | |
| 59 | 76 | sound_telephony { |
| 60 | 77 | compatible = "simple-audio-card"; |
| 61 | 78 | simple-audio-card,name = "GTA04 voice"; |
| @@ -78,7 +95,7 @@ · 16 unmodified lines | ||
| 78 | 95 | #sound-dai-cells = <0>; |
| 79 | 96 | }; |
| 80 | 97 | |
| 81 | − spi_lcd { | |
| 98 | + spi_lcd: spi_lcd { | |
| 82 | 99 | compatible = "spi-gpio"; |
| 83 | 100 | #address-cells = <0x1>; |
| 84 | 101 | #size-cells = <0x0>; |
| @@ -131,7 +148,7 @@ · 46 unmodified lines | ||
| 131 | 148 | }; |
| 132 | 149 | |
| 133 | 150 | tv0: connector { |
| 134 | − compatible = "svideo-connector"; | |
| 151 | + compatible = "composite-video-connector"; | |
| 135 | 152 | label = "tv"; |
| 136 | 153 | |
| 137 | 154 | port { |
| @@ -143,7 +160,7 @@ · 5 unmodified lines | ||
| 143 | 160 | |
| 144 | 161 | tv_amp: opa362 { |
| 145 | 162 | compatible = "ti,opa362"; |
| 146 | − enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; | |
| 163 | + enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; /* GPIO_23 to enable video out amplifier */ | |
| 147 | 164 | |
| 148 | 165 | ports { |
| 149 | 166 | #address-cells = <1>; |
| @@ -169,6 +186,42 @@ · 19 unmodified lines | ||
| 169 | 186 | compatible = "mmc-pwrseq-simple"; |
| 170 | 187 | reset-gpios = <&tca6507 0 GPIO_ACTIVE_LOW>; /* W2CBW003 reset through tca6507 */ |
| 171 | 188 | }; |
| 189 | + | |
| 190 | + /* devconf0 setup for mcbsp1 clock pins */ | |
| 191 | + pinmux_mcbsp1@48002274 { | |
| 192 | + compatible = "pinctrl-single"; | |
| 193 | + reg = <0x48002274 4>; /* CONTROL_DEVCONF0 */ | |
| 194 | + #address-cells = <1>; | |
| 195 | + #size-cells = <0>; | |
| 196 | + pinctrl-single,bit-per-mux; | |
| 197 | + pinctrl-single,register-width = <32>; | |
| 198 | + pinctrl-single,function-mask = <0x7>; /* MCBSP1 CLK pinmux */ | |
| 199 | + #pinctrl-cells = <2>; | |
| 200 | + pinctrl-names = "default"; | |
| 201 | + pinctrl-0 = <&mcbsp1_devconf0_pins>; | |
| 202 | + mcbsp1_devconf0_pins: pinmux_mcbsp1_devconf0_pins { | |
| 203 | + /* offset bits mask */ | |
| 204 | + pinctrl-single,bits = <0x00 0x08 0x1c>; /* set MCBSP1_CLKR */ | |
| 205 | + }; | |
| 206 | + }; | |
| 207 | + | |
| 208 | + /* devconf1 setup for tvout pins */ | |
| 209 | + pinmux_tv_out@480022d8 { | |
| 210 | + compatible = "pinctrl-single"; | |
| 211 | + reg = <0x480022d8 4>; /* CONTROL_DEVCONF1 */ | |
| 212 | + #address-cells = <1>; | |
| 213 | + #size-cells = <0>; | |
| 214 | + pinctrl-single,bit-per-mux; | |
| 215 | + pinctrl-single,register-width = <32>; | |
| 216 | + pinctrl-single,function-mask = <0x81>; /* TV out pin control */ | |
| 217 | + #pinctrl-cells = <2>; | |
| 218 | + pinctrl-names = "default"; | |
| 219 | + pinctrl-0 = <&tv_acbias_devconf1_pins>; | |
| 220 | + tv_acbias_devconf1_pins: pinmux_tv_acbias_devconf1_pins { | |
| 221 | + /* offset bits mask */ | |
| 222 | + pinctrl-single,bits = <0x00 0x40800 0x40800>; /* set TVOUTBYPASS and TVOUTACEN */ | |
| 223 | + }; | |
| 224 | + }; | |
| 172 | 225 | }; |
| 173 | 226 | |
| 174 | 227 | &omap3_pmx_core { |
| @@ -220,14 +273,14 @@ · 45 unmodified lines | ||
| 220 | 273 | >; |
| 221 | 274 | }; |
| 222 | 275 | |
| 223 | − backlight_pins: backlight_pins_pimnux { | |
| 276 | + backlight_pins: backlight_pins_pinmux { | |
| 224 | 277 | pinctrl-single,pins = < |
| 225 | 278 | OMAP3_CORE1_IOPAD(0x20ba, MUX_MODE3) /* gpt11/gpio57 */ |
| 226 | 279 | >; |
| 227 | 280 | }; |
| 228 | 281 | |
| 229 | 282 | dss_dpi_pins: pinmux_dss_dpi_pins { |
| 230 | − pinctrl-single,pins = < | |
| 283 | + pinctrl-single,pins = < | |
| 231 | 284 | OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ |
| 232 | 285 | OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ |
| 233 | 286 | OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ |
| @@ -265,6 +318,12 @@ · 31 unmodified lines | ||
| 265 | 318 | >; |
| 266 | 319 | }; |
| 267 | 320 | |
| 321 | + bmp085_pins: pinmux_bmp085_pins { | |
| 322 | + pinctrl-single,pins = < | |
| 323 | + OMAP3_CORE1_IOPAD(0x2136, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio113 */ | |
| 324 | + >; | |
| 325 | + }; | |
| 326 | + | |
| 268 | 327 | bma180_pins: pinmux_bma180_pins { |
| 269 | 328 | pinctrl-single,pins = < |
| 270 | 329 | OMAP3_CORE1_IOPAD(0x213a, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio115 */ |
| @@ -282,6 +341,78 @@ · 11 unmodified lines | ||
| 282 | 341 | OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */ |
| 283 | 342 | >; |
| 284 | 343 | }; |
| 344 | + | |
| 345 | + penirq_pins: pinmux_penirq_pins { | |
| 346 | + pinctrl-single,pins = < | |
| 347 | + /* here we could enable to wakeup the cpu from suspend by a pen touch */ | |
| 348 | + OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio160 */ | |
| 349 | + >; | |
| 350 | + }; | |
| 351 | + | |
| 352 | + camera_pins: pinmux_camera_pins { | |
| 353 | + pinctrl-single,pins = < | |
| 354 | + /* set up parallel camera interface */ | |
| 355 | + OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_hs */ | |
| 356 | + OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_vs */ | |
| 357 | + OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */ | |
| 358 | + OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_pclk */ | |
| 359 | + OMAP3_CORE1_IOPAD(0x2114, PIN_OUTPUT | MUX_MODE4) /* cam_fld = gpio_98 */ | |
| 360 | + OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d0 */ | |
| 361 | + OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d1 */ | |
| 362 | + OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d2 */ | |
| 363 | + OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d3 */ | |
| 364 | + OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d4 */ | |
| 365 | + OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d5 */ | |
| 366 | + OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d6 */ | |
| 367 | + OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d7 */ | |
| 368 | + OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d8 */ | |
| 369 | + OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d9 */ | |
| 370 | + OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */ | |
| 371 | + OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */ | |
| 372 | + OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE0) /* cam_xclkb */ | |
| 373 | + OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* cam_wen = gpio_167 */ | |
| 374 | + OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLDOWN | MUX_MODE4) /* cam_strobe */ | |
| 375 | + >; | |
| 376 | + }; | |
| 377 | + | |
| 378 | + mcbsp1_pins: pinmux_mcbsp1_pins { | |
| 379 | + pinctrl-single,pins = < | |
| 380 | + OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT | MUX_MODE4) /* mcbsp1_clkr.mcbsp1_clkr - gpio_156 FM interrupt */ | |
| 381 | + OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_clkr.mcbsp1_fsr */ | |
| 382 | + OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dx */ | |
| 383 | + OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dr */ | |
| 384 | + /* mcbsp_clks is used as PENIRQ */ | |
| 385 | + /* OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp_clks */ | |
| 386 | + OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp1_fsx */ | |
| 387 | + OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0) /* mcbsp1_clkx.mcbsp1_clkx */ | |
| 388 | + >; | |
| 389 | + }; | |
| 390 | + | |
| 391 | + mcbsp2_pins: pinmux_mcbsp2_pins { | |
| 392 | + pinctrl-single,pins = < | |
| 393 | + OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ | |
| 394 | + OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_clkx */ | |
| 395 | + OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2_dr */ | |
| 396 | + OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2_dx */ | |
| 397 | + >; | |
| 398 | + }; | |
| 399 | + | |
| 400 | + mcbsp3_pins: pinmux_mcbsp3_pins { | |
| 401 | + pinctrl-single,pins = < | |
| 402 | + OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0) /* mcbsp3_dx.mcbsp3_dx */ | |
| 403 | + OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0) /* mcbsp3_dx.mcbsp3_dr */ | |
| 404 | + OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0) /* mcbsp3_clkx.mcbsp3_clkx */ | |
| 405 | + OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0) /* mcbsp3_clkx.mcbsp3_fsx */ | |
| 406 | + >; | |
| 407 | + }; | |
| 408 | + | |
| 409 | + mcbsp4_pins: pinmux_mcbsp4_pins { | |
| 410 | + pinctrl-single,pins = < | |
| 411 | + OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_clkx.mcbsp4_clkx */ | |
| 412 | + OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_clkx.mcbsp4_dr */ | |
| 413 | + OMAP3_CORE1_IOPAD(0x218a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_dx.mcbsp4_fsx */ | |
| 414 | + >; | |
| 415 | + }; | |
| 285 | 416 | }; |
| 286 | 417 | |
| 287 | 418 | &omap3_pmx_core2 { |
| @@ -347,6 +478,8 @@ · 59 unmodified lines | ||
| 347 | 478 | bmp085@77 { |
| 348 | 479 | compatible = "bosch,bmp085"; |
| 349 | 480 | reg = <0x77>; |
| 481 | + pinctrl-names = "default"; | |
| 482 | + pinctrl-0 = <&bmp085_pins>; | |
| 350 | 483 | interrupt-parent = <&gpio4>; |
| 351 | 484 | interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* GPIO_113 */ |
| 352 | 485 | }; |
| @@ -402,7 +535,7 @@ · 49 unmodified lines | ||
| 402 | 535 | reg = <0x4>; |
| 403 | 536 | }; |
| 404 | 537 | |
| 405 | − wifi_reset: wifi_reset@6 { | |
| 538 | + wifi_reset: wifi_reset@6 { /* reference as <&tca_gpios 0 0> since it is currently the only GPIO */ | |
| 406 | 539 | reg = <0x6>; |
| 407 | 540 | compatible = "gpio"; |
| 408 | 541 | }; |
| @@ -422,10 +555,19 @@ · 13 unmodified lines | ||
| 422 | 555 | tsc2007@48 { |
| 423 | 556 | compatible = "ti,tsc2007"; |
| 424 | 557 | reg = <0x48>; |
| 558 | + pinctrl-names = "default"; | |
| 559 | + pinctrl-0 = <&penirq_pins>; | |
| 425 | 560 | interrupt-parent = <&gpio6>; |
| 426 | 561 | interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */ |
| 427 | − gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; | |
| 562 | + gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* GPIO_160 */ | |
| 428 | 563 | ti,x-plate-ohms = <600>; |
| 564 | + touchscreen-size-x = <480>; | |
| 565 | + touchscreen-size-y = <640>; | |
| 566 | + touchscreen-max-pressure = <1000>; | |
| 567 | + touchscreen-fuzz-x = <3>; | |
| 568 | + touchscreen-fuzz-y = <8>; | |
| 569 | + touchscreen-fuzz-pressure = <10>; | |
| 570 | + touchscreen-inverted-y; | |
| 429 | 571 | }; |
| 430 | 572 | |
| 431 | 573 | /* RFID EEPROM */ |
| @@ -462,6 +604,7 @@ · 30 unmodified lines | ||
| 462 | 604 | vmmc-supply = <&vmmc1>; |
| 463 | 605 | bus-width = <4>; |
| 464 | 606 | ti,non-removable; |
| 607 | + broken-cd; /* hardware has no CD */ | |
| 465 | 608 | }; |
| 466 | 609 | |
| 467 | 610 | &mmc2 { |
| @@ -476,6 +619,19 @@ · 8 unmodified lines | ||
| 476 | 619 | status = "disabled"; |
| 477 | 620 | }; |
| 478 | 621 | |
| 622 | +#define BIT(x) (1 << (x)) | |
| 623 | +&twl_gpio { | |
| 624 | + /* pullups: BIT(2) */ | |
| 625 | + ti,pullups = <BIT(2)>; | |
| 626 | + /* | |
| 627 | + * pulldowns: | |
| 628 | + * BIT(0), BIT(1), BIT(6), BIT(7), BIT(8), BIT(13) | |
| 629 | + * BIT(15), BIT(16), BIT(17) | |
| 630 | + */ | |
| 631 | + ti,pulldowns = <(BIT(0) | BIT(1) | BIT(6) | BIT(7) | BIT(8) | | |
| 632 | + BIT(13) | BIT(15) | BIT(16) | BIT(17))>; | |
| 633 | +}; | |
| 634 | + | |
| 479 | 635 | &twl_keypad { |
| 480 | 636 | status = "disabled"; |
| 481 | 637 | }; |
| @@ -493,6 +649,7 @@ · 11 unmodified lines | ||
| 493 | 649 | &uart3 { |
| 494 | 650 | pinctrl-names = "default"; |
| 495 | 651 | pinctrl-0 = <&uart3_pins>; |
| 652 | + interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; | |
| 496 | 653 | }; |
| 497 | 654 | |
| 498 | 655 | &charger { |
| @@ -510,7 +667,7 @@ · 11 unmodified lines | ||
| 510 | 667 | &vaux2 { |
| 511 | 668 | regulator-min-microvolt = <2800000>; |
| 512 | 669 | regulator-max-microvolt = <2800000>; |
| 513 | − regulator-always-on; | |
| 670 | + regulator-always-on; /* we should never switch off while vio is on! */ | |
| 514 | 671 | }; |
| 515 | 672 | |
| 516 | 673 | /* camera */ |
| @@ -531,6 +688,12 @@ · 14 unmodified lines | ||
| 531 | 688 | regulator-max-microvolt = <3150000>; |
| 532 | 689 | }; |
| 533 | 690 | |
| 691 | +/* Needed to power the DPI pins */ | |
| 692 | + | |
| 693 | +&vpll2 { | |
| 694 | + regulator-always-on; | |
| 695 | +}; | |
| 696 | + | |
| 534 | 697 | &dss { |
| 535 | 698 | pinctrl-names = "default"; |
| 536 | 699 | pinctrl-0 = < &dss_dpi_pins >; |
| @@ -551,10 +714,14 @@ · 14 unmodified lines | ||
| 551 | 714 | |
| 552 | 715 | vdda-supply = <&vdac>; |
| 553 | 716 | |
| 717 | + #address-cells = <1>; | |
| 718 | + #size-cells = <0>; | |
| 719 | + | |
| 554 | 720 | port { |
| 721 | + reg = <0>; | |
| 555 | 722 | venc_out: endpoint { |
| 556 | 723 | remote-endpoint = <&opa_in>; |
| 557 | − ti,channels = <2>; | |
| 724 | + ti,channels = <1>; | |
| 558 | 725 | ti,invert-polarity; |
| 559 | 726 | }; |
| 560 | 727 | }; |
| @@ -569,27 +736,27 @@ · 8 unmodified lines | ||
| 569 | 736 | interrupt-parent = <&gpmc>; |
| 570 | 737 | interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ |
| 571 | 738 | <1 IRQ_TYPE_NONE>; /* termcount */ |
| 739 | + ti,nand-ecc-opt = "ham1"; | |
| 740 | + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ | |
| 572 | 741 | nand-bus-width = <16>; |
| 573 | − ti,nand-ecc-opt = "bch8"; | |
| 742 | + #address-cells = <1>; | |
| 743 | + #size-cells = <1>; | |
| 574 | 744 | |
| 575 | − gpmc,sync-clk-ps = <0>; | |
| 745 | + gpmc,device-width = <2>; | |
| 576 | 746 | gpmc,cs-on-ns = <0>; |
| 577 | 747 | gpmc,cs-rd-off-ns = <44>; |
| 578 | 748 | gpmc,cs-wr-off-ns = <44>; |
| 579 | 749 | gpmc,adv-on-ns = <6>; |
| 580 | 750 | gpmc,adv-rd-off-ns = <34>; |
| 581 | 751 | gpmc,adv-wr-off-ns = <44>; |
| 582 | − gpmc,we-off-ns = <40>; | |
| 583 | 752 | gpmc,oe-off-ns = <54>; |
| 753 | + gpmc,we-off-ns = <40>; | |
| 584 | 754 | gpmc,access-ns = <64>; |
| 585 | 755 | gpmc,rd-cycle-ns = <82>; |
| 586 | 756 | gpmc,wr-cycle-ns = <82>; |
| 587 | 757 | gpmc,wr-access-ns = <40>; |
| 588 | 758 | gpmc,wr-data-mux-bus-ns = <0>; |
| 589 | − gpmc,device-width = <2>; | |
| 590 | − | |
| 591 | − #address-cells = <1>; | |
| 592 | − #size-cells = <1>; | |
| 759 | + gpmc,sync-clk-ps = <0>; | |
| 593 | 760 | |
| 594 | 761 | x-loader@0 { |
| 595 | 762 | label = "X-Loader"; |
| @@ -598,28 +765,51 @@ · 2 unmodified lines | ||
| 598 | 765 | |
| 599 | 766 | bootloaders@80000 { |
| 600 | 767 | label = "U-Boot"; |
| 601 | − reg = <0x80000 0x1e0000>; | |
| 768 | + reg = <0x80000 0x1c0000>; | |
| 602 | 769 | }; |
| 603 | 770 | |
| 604 | − bootloaders_env@260000 { | |
| 771 | + bootloaders_env@240000 { | |
| 605 | 772 | label = "U-Boot Env"; |
| 606 | − reg = <0x260000 0x20000>; | |
| 773 | + reg = <0x240000 0x40000>; | |
| 607 | 774 | }; |
| 608 | 775 | |
| 609 | 776 | kernel@280000 { |
| 610 | 777 | label = "Kernel"; |
| 611 | − reg = <0x280000 0x400000>; | |
| 778 | + reg = <0x280000 0x600000>; | |
| 612 | 779 | }; |
| 613 | 780 | |
| 614 | − filesystem@680000 { | |
| 781 | + filesystem@880000 { | |
| 615 | 782 | label = "File System"; |
| 616 | − reg = <0x680000 0xf980000>; | |
| 783 | + reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */ | |
| 617 | 784 | }; |
| 618 | 785 | }; |
| 619 | 786 | }; |
| 620 | 787 | |
| 621 | −&mcbsp2 { | |
| 622 | − status = "okay"; | |
| 788 | +&mcbsp1 { /* FM Transceiver PCM */ | |
| 789 | + status = "ok"; | |
| 790 | + #sound-dai-cells = <0>; | |
| 791 | + pinctrl-names = "default"; | |
| 792 | + pinctrl-0 = <&mcbsp1_pins>; | |
| 793 | +}; | |
| 794 | + | |
| 795 | +&mcbsp2 { /* TPS65950 I2S */ | |
| 796 | + status = "ok"; | |
| 797 | + pinctrl-names = "default"; | |
| 798 | + pinctrl-0 = <&mcbsp2_pins>; | |
| 799 | +}; | |
| 800 | + | |
| 801 | +&mcbsp3 { /* Bluetooth PCM */ | |
| 802 | + status = "ok"; | |
| 803 | + #sound-dai-cells = <0>; | |
| 804 | + pinctrl-names = "default"; | |
| 805 | + pinctrl-0 = <&mcbsp3_pins>; | |
| 806 | +}; | |
| 807 | + | |
| 808 | +&mcbsp4 { /* GSM voice PCM */ | |
| 809 | + status = "ok"; | |
| 810 | + #sound-dai-cells = <0>; | |
| 811 | + pinctrl-names = "default"; | |
| 812 | + pinctrl-0 = <&mcbsp4_pins>; | |
| 623 | 813 | }; |
| 624 | 814 | |
| 625 | 815 | &hdqw1w { |
| @@ -627,6 +817,22 @@ · 1 unmodified line | ||
| 627 | 817 | pinctrl-0 = <&hdq_pins>; |
| 628 | 818 | }; |
| 629 | 819 | |
| 630 | −&mcbsp4 { | |
| 631 | − status = "okay"; | |
| 820 | +/* image signal processor within OMAP3 SoC */ | |
| 821 | +&isp { | |
| 822 | + ports { | |
| 823 | + port@0 { | |
| 824 | + reg = <0>; | |
| 825 | + parallel_ep: endpoint { | |
| 826 | + ti,isp-clock-divisor = <1>; | |
| 827 | + ti,strobe-mode; | |
| 828 | + bus-width = <8>;/* Used data lines */ | |
| 829 | + data-shift = <2>; /* Lines 9:2 are used */ | |
| 830 | + hsync-active = <0>; /* Active low */ | |
| 831 | + vsync-active = <1>; /* Active high */ | |
| 832 | + data-active = <1>;/* Active high */ | |
| 833 | + pclk-sample = <1>;/* Falling */ | |
| 834 | + }; | |
| 835 | + }; | |
| 836 | + /* port@1 and port@2 are not used by GTA04 */ | |
| 837 | + }; | |
| 632 | 838 | }; |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | #include "omap3-gta04.dtsi" |
| 10 | 10 | |
| 11 | 11 | / { |
| 12 | − model = "Goldelico GTA04A3"; | |
| 12 | + model = "Goldelico GTA04A3/Letux 2804"; | |
| 13 | 13 | }; |
| 14 | 14 | |
| 15 | 15 | &i2c2 { |
| @@ -9,5 +9,5 @@ · 8 unmodified lines | ||
| 9 | 9 | #include "omap3-gta04.dtsi" |
| 10 | 10 | |
| 11 | 11 | / { |
| 12 | − model = "Goldelico GTA04A4"; | |
| 12 | + model = "Goldelico GTA04A4/Letux 2804"; | |
| 13 | 13 | }; |
| @@ -1,5 +1,5 @@ | ||
| 1 | 1 | /* |
| 2 | − * Copyright (C) 2014 H. Nikolaus Schaller <hns@goldelico.com> | |
| 2 | + * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> | |
| 3 | 3 | * |
| 4 | 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | 5 | * it under the terms of the GNU General Public License version 2 as |
| @@ -9,9 +9,132 @@ · 3 unmodified lines | ||
| 9 | 9 | #include "omap3-gta04.dtsi" |
| 10 | 10 | |
| 11 | 11 | / { |
| 12 | − model = "Goldelico GTA04A5"; | |
| 12 | + model = "Goldelico GTA04A5/Letux 2804"; | |
| 13 | 13 | |
| 14 | 14 | sound { |
| 15 | − ti,jack-det-gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>; /* GTA04A5 only */ | |
| 15 | + ti,jack-det-gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>; /* GTA04A5 only */ | |
| 16 | + }; | |
| 17 | + | |
| 18 | + wlan_en: wlan_en_regulator { | |
| 19 | + compatible = "regulator-fixed"; | |
| 20 | + pinctrl-names = "default"; | |
| 21 | + pinctrl-0 = <&wlan_pins>; | |
| 22 | + regulator-name = "wlan-en-regulator"; | |
| 23 | + regulator-min-microvolt = <1800000>; | |
| 24 | + regulator-max-microvolt = <1800000>; | |
| 25 | + | |
| 26 | + gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* GPIO_138 */ | |
| 27 | + | |
| 28 | + startup-delay-us = <70000>; | |
| 29 | + enable-active-high; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + pps { | |
| 33 | + compatible = "pps-gpio"; | |
| 34 | + pinctrl-names = "default"; | |
| 35 | + pinctrl-0 = <&pps_pins>; | |
| 36 | + | |
| 37 | + gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; /* GPIN_114 */ | |
| 38 | + }; | |
| 39 | + | |
| 40 | +}; | |
| 41 | + | |
| 42 | +&gpio5 { | |
| 43 | + irda_en { | |
| 44 | + gpio-hog; | |
| 45 | + gpios = <(175-160) GPIO_ACTIVE_HIGH>; | |
| 46 | + output-high; /* activate gpio_175 to disable IrDA receiver */ | |
| 47 | + }; | |
| 48 | +}; | |
| 49 | + | |
| 50 | +&omap3_pmx_core { | |
| 51 | + bt_pins: pinmux_bt_pins { | |
| 52 | + pinctrl-single,pins = < | |
| 53 | + OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* mmc2_dat5 = mmc3_dat1 = gpio137 */ | |
| 54 | + >; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + wlan_pins: pinmux_wlan_pins { | |
| 58 | + pinctrl-single,pins = < | |
| 59 | + OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* mmc2_dat6 = mmc3_dat2 = gpio138 */ | |
| 60 | + >; | |
| 61 | + }; | |
| 62 | + | |
| 63 | + wlan_irq_pin: pinmux_wlan_irq_pin { | |
| 64 | + pinctrl-single,pins = < | |
| 65 | + OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE4) /* mmc2_dat7 = mmc3_dat3 = gpio139 */ | |
| 66 | + >; | |
| 67 | + }; | |
| 68 | + | |
| 69 | + irda_pins: pinmux_irda { | |
| 70 | + pinctrl-single,pins = < | |
| 71 | + OMAP3_CORE1_IOPAD(0x21d0, PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcspi1_cs1 = gpio175 */ | |
| 72 | + >; | |
| 73 | + }; | |
| 74 | + | |
| 75 | + pps_pins: pinmux_pps_pins { | |
| 76 | + pinctrl-single,pins = < | |
| 77 | + OMAP3_CORE1_IOPAD(0x2138, PIN_INPUT | MUX_MODE4) /* gpin114 */ | |
| 78 | + >; | |
| 79 | + }; | |
| 80 | + | |
| 81 | +}; | |
| 82 | + | |
| 83 | +/* | |
| 84 | + * for WL183x module see | |
| 85 | + * http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/net/wireless/ti,wlcore.txt | |
| 86 | + */ | |
| 87 | + | |
| 88 | +&wifi_pwrseq { | |
| 89 | + /delete-property/ reset-gpios; | |
| 90 | +}; | |
| 91 | + | |
| 92 | +&mmc2 { | |
| 93 | + vmmc-supply = <&wlan_en>; | |
| 94 | + bus-width = <4>; | |
| 95 | + cap-power-off-card; | |
| 96 | + non-removable; | |
| 97 | + | |
| 98 | + pinctrl-names = "default"; | |
| 99 | + pinctrl-0 = <&wlan_irq_pin>; | |
| 100 | + | |
| 101 | + #address-cells = <1>; | |
| 102 | + #size-cells = <0>; | |
| 103 | + | |
| 104 | + /delete-property/ mmc-pwrseq; | |
| 105 | + | |
| 106 | + wlcore: wlcore@2 { | |
| 107 | + compatible = "ti,wl1837"; | |
| 108 | + reg = <2>; | |
| 109 | + interrupt-parent = <&gpio5>; | |
| 110 | + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_139 */ | |
| 111 | + ref-clock-frequency = <26000000>; | |
| 112 | + }; | |
| 113 | +}; | |
| 114 | + | |
| 115 | +&i2c2 { | |
| 116 | + /delete-node/ bmp085@77; | |
| 117 | + /delete-node/ bma180@41; | |
| 118 | + /delete-node/ itg3200@68; | |
| 119 | + /delete-node/ hmc5843@1e; | |
| 120 | + | |
| 121 | + bmg160@69 { | |
| 122 | + compatible = "bosch,bmg160"; | |
| 123 | + reg = <0x69>; | |
| 124 | + }; | |
| 125 | + | |
| 126 | + bmc150@10 { | |
| 127 | + compatible = "bosch,bmc150_accel"; | |
| 128 | + reg = <0x10>; | |
| 129 | + }; | |
| 130 | + | |
| 131 | + bmc150@12 { | |
| 132 | + compatible = "bosch,bmc150_magn"; | |
| 133 | + reg = <0x12>; | |
| 134 | + }; | |
| 135 | + | |
| 136 | + bme280@76 { | |
| 137 | + compatible = "bosch,bme280"; | |
| 138 | + reg = <0x76>; | |
| 16 | 139 | }; |
| 17 | 140 | }; |
| @@ -0,0 +1,114 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | + | |
| 9 | +#include "omap3-gta04a5.dts" | |
| 10 | + | |
| 11 | +&omap3_pmx_core { | |
| 12 | + model = "Goldelico GTA04A5/Letux 2804 with OneNAND"; | |
| 13 | + | |
| 14 | + gpmc_pins: pinmux_gpmc_pins { | |
| 15 | + pinctrl-single,pins = < | |
| 16 | + | |
| 17 | + /* address lines */ | |
| 18 | + OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */ | |
| 19 | + OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */ | |
| 20 | + OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */ | |
| 21 | + | |
| 22 | + /* data lines, gpmc_d0..d7 not muxable according to TRM */ | |
| 23 | + OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */ | |
| 24 | + OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */ | |
| 25 | + OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */ | |
| 26 | + OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */ | |
| 27 | + OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */ | |
| 28 | + OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */ | |
| 29 | + OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */ | |
| 30 | + OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */ | |
| 31 | + | |
| 32 | + /* | |
| 33 | + * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable | |
| 34 | + * according to TRM. OneNAND seems to require PIN_INPUT on clock. | |
| 35 | + */ | |
| 36 | + OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */ | |
| 37 | + OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */ | |
| 38 | + >; | |
| 39 | + }; | |
| 40 | +}; | |
| 41 | + | |
| 42 | +&gpmc { | |
| 43 | + /* switch inherited setup to OneNAND */ | |
| 44 | + | |
| 45 | + ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */ | |
| 46 | + pinctrl-names = "default"; | |
| 47 | + pinctrl-0 = <&gpmc_pins>; | |
| 48 | + | |
| 49 | + /delete-node/ nand@0,0; | |
| 50 | + | |
| 51 | + onenand@0,0 { | |
| 52 | + | |
| 53 | + #address-cells = <1>; | |
| 54 | + #size-cells = <1>; | |
| 55 | + compatible = "ti,omap2-onenand"; | |
| 56 | + reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ | |
| 57 | + | |
| 58 | + gpmc,sync-read; | |
| 59 | + gpmc,sync-write; | |
| 60 | + gpmc,burst-length = <16>; | |
| 61 | + gpmc,burst-read; | |
| 62 | + gpmc,burst-wrap; | |
| 63 | + gpmc,burst-write; | |
| 64 | + gpmc,device-width = <2>; | |
| 65 | + gpmc,mux-add-data = <2>; | |
| 66 | + gpmc,cs-on-ns = <0>; | |
| 67 | + gpmc,cs-rd-off-ns = <87>; | |
| 68 | + gpmc,cs-wr-off-ns = <87>; | |
| 69 | + gpmc,adv-on-ns = <0>; | |
| 70 | + gpmc,adv-rd-off-ns = <10>; | |
| 71 | + gpmc,adv-wr-off-ns = <10>; | |
| 72 | + gpmc,oe-on-ns = <15>; | |
| 73 | + gpmc,oe-off-ns = <87>; | |
| 74 | + gpmc,we-on-ns = <0>; | |
| 75 | + gpmc,we-off-ns = <87>; | |
| 76 | + gpmc,rd-cycle-ns = <112>; | |
| 77 | + gpmc,wr-cycle-ns = <112>; | |
| 78 | + gpmc,access-ns = <81>; | |
| 79 | + gpmc,page-burst-access-ns = <15>; | |
| 80 | + gpmc,bus-turnaround-ns = <0>; | |
| 81 | + gpmc,cycle2cycle-delay-ns = <0>; | |
| 82 | + gpmc,wait-monitoring-ns = <0>; | |
| 83 | + gpmc,clk-activation-ns = <5>; | |
| 84 | + gpmc,wr-data-mux-bus-ns = <30>; | |
| 85 | + gpmc,wr-access-ns = <81>; | |
| 86 | + gpmc,sync-clk-ps = <15000>; | |
| 87 | + | |
| 88 | + x-loader@0 { | |
| 89 | + label = "X-Loader"; | |
| 90 | + reg = <0 0x80000>; | |
| 91 | + }; | |
| 92 | + | |
| 93 | + bootloaders@80000 { | |
| 94 | + label = "U-Boot"; | |
| 95 | + reg = <0x80000 0x1c0000>; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + bootloaders_env@240000 { | |
| 99 | + label = "U-Boot Env"; | |
| 100 | + reg = <0x240000 0x40000>; | |
| 101 | + }; | |
| 102 | + | |
| 103 | + kernel@280000 { | |
| 104 | + label = "Kernel"; | |
| 105 | + reg = <0x280000 0x600000>; | |
| 106 | + }; | |
| 107 | + | |
| 108 | + filesystem@880000 { | |
| 109 | + label = "File System"; | |
| 110 | + reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */ | |
| 111 | + }; | |
| 112 | + | |
| 113 | + }; | |
| 114 | +}; | |
| @@ -40,7 +40,7 @@ · 39 unmodified lines | ||
| 40 | 40 | }; |
| 41 | 41 | |
| 42 | 42 | &i2c3 { |
| 43 | − ak8975@0f { | |
| 43 | + ak8975@f { | |
| 44 | 44 | compatible = "asahi-kasei,ak8975"; |
| 45 | 45 | reg = <0x0f>; |
| 46 | 46 | }; |
| @@ -700,6 +700,10 @@ · 699 unmodified lines | ||
| 700 | 700 | vbus-supply = <&smps10_out1_reg>; |
| 701 | 701 | }; |
| 702 | 702 | |
| 703 | +&dwc3 { | |
| 704 | + dr_mode = "otg"; | |
| 705 | +}; | |
| 706 | + | |
| 703 | 707 | &mcspi1 { |
| 704 | 708 | |
| 705 | 709 | }; |
| @@ -156,7 +156,7 @@ · 155 unmodified lines | ||
| 156 | 156 | &i2c { |
| 157 | 157 | status = "okay"; |
| 158 | 158 | |
| 159 | − rtc { | |
| 159 | + rtc@32 { | |
| 160 | 160 | compatible = "ricoh,rs5c372a"; |
| 161 | 161 | reg = <0x32>; |
| 162 | 162 | }; |
| @@ -1,9 +1,8 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | 2 | /* |
| 2 | 3 | * Cubietech CubieBoard6 |
| 3 | 4 | * |
| 4 | 5 | * Copyright (c) 2017 Andreas Färber |
| 5 | − * | |
| 6 | − * SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 7 | 6 | */ |
| 8 | 7 | |
| 9 | 8 | /dts-v1/; |
| @@ -1,7 +1,6 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | 2 | /* |
| 2 | 3 | * Copyright (c) 2016-2017 Andreas Färber |
| 3 | − * | |
| 4 | − * SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 5 | 4 | */ |
| 6 | 5 | |
| 7 | 6 | /dts-v1/; |
| @@ -1,9 +1,8 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | 2 | /* |
| 2 | 3 | * LeMaker Guitar SoM |
| 3 | 4 | * |
| 4 | 5 | * Copyright (c) 2016-2017 Andreas Färber |
| 5 | − * | |
| 6 | − * SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 7 | 6 | */ |
| 8 | 7 | |
| 9 | 8 | #include "owl-s500.dtsi" |
| @@ -1,9 +1,8 @@ | ||
| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 1 | 2 | /* |
| 2 | 3 | * Actions Semi S500 SoC |
| 3 | 4 | * |
| 4 | 5 | * Copyright (c) 2016-2017 Andreas Färber |
| 5 | − * | |
| 6 | − * SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
| 7 | 6 | */ |
| 8 | 7 | |
| 9 | 8 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| @@ -80,6 +80,10 @@ · 79 unmodified lines | ||
| 80 | 80 | #pwm-cells = <1>; |
| 81 | 81 | clocks = <&clks CLK_PWM1>; |
| 82 | 82 | }; |
| 83 | + | |
| 84 | + rtc@40900000 { | |
| 85 | + clocks = <&clks CLK_OSC32k768>; | |
| 86 | + }; | |
| 83 | 87 | }; |
| 84 | 88 | |
| 85 | 89 | timer@40a00000 { |
| @@ -71,7 +71,7 @@ · 70 unmodified lines | ||
| 71 | 71 | clocks = <&clks CLK_PWM1>; |
| 72 | 72 | }; |
| 73 | 73 | |
| 74 | − pwri2c: i2c@40f000180 { | |
| 74 | + pwri2c: i2c@40f00180 { | |
| 75 | 75 | compatible = "mrvl,pxa-i2c"; |
| 76 | 76 | reg = <0x40f00180 0x24>; |
| 77 | 77 | interrupts = <6>; |
| @@ -113,6 +113,10 @@ · 35 unmodified lines | ||
| 113 | 113 | |
| 114 | 114 | status = "disabled"; |
| 115 | 115 | }; |
| 116 | + | |
| 117 | + rtc@40900000 { | |
| 118 | + clocks = <&clks CLK_OSC32k768>; | |
| 119 | + }; | |
| 116 | 120 | }; |
| 117 | 121 | |
| 118 | 122 | clocks { |
| @@ -9,6 +9,25 @@ · 8 unmodified lines | ||
| 9 | 9 | #include "skeleton.dtsi" |
| 10 | 10 | #include "dt-bindings/clock/pxa-clock.h" |
| 11 | 11 | |
| 12 | +#define PMGROUP(pin) #pin | |
| 13 | +#define PMMUX(func, pin, af) \ | |
| 14 | + mux- ## func { \ | |
| 15 | + groups = PMGROUP(P ## pin); \ | |
| 16 | + function = #af; \ | |
| 17 | + } | |
| 18 | +#define PMMUX_LPM_LOW(func, pin, af) \ | |
| 19 | + mux- ## func { \ | |
| 20 | + groups = PMGROUP(P ## pin); \ | |
| 21 | + function = #af; \ | |
| 22 | + low-power-disable; \ | |
| 23 | + } | |
| 24 | +#define PMMUX_LPM_HIGH(func, pin, af) \ | |
| 25 | + mux- ## func { \ | |
| 26 | + groups = PMGROUP(P ## pin); \ | |
| 27 | + function = #af; \ | |
| 28 | + low-power-enable; \ | |
| 29 | + } | |
| 30 | + | |
| 12 | 31 | / { |
| 13 | 32 | model = "Marvell PXA2xx family SoC"; |
| 14 | 33 | compatible = "marvell,pxa2xx"; |
| @@ -76,7 +95,7 @@ · 61 unmodified lines | ||
| 76 | 95 | }; |
| 77 | 96 | }; |
| 78 | 97 | |
| 79 | − ffuart: uart@40100000 { | |
| 98 | + ffuart: serial@40100000 { | |
| 80 | 99 | compatible = "mrvl,pxa-uart"; |
| 81 | 100 | reg = <0x40100000 0x30>; |
| 82 | 101 | interrupts = <22>; |
| @@ -84,7 +103,7 @@ · 1 unmodified line | ||
| 84 | 103 | status = "disabled"; |
| 85 | 104 | }; |
| 86 | 105 | |
| 87 | − btuart: uart@40200000 { | |
| 106 | + btuart: serial@40200000 { | |
| 88 | 107 | compatible = "mrvl,pxa-uart"; |
| 89 | 108 | reg = <0x40200000 0x30>; |
| 90 | 109 | interrupts = <21>; |
| @@ -92,7 +111,7 @@ · 1 unmodified line | ||
| 92 | 111 | status = "disabled"; |
| 93 | 112 | }; |
| 94 | 113 | |
| 95 | − stuart: uart@40700000 { | |
| 114 | + stuart: serial@40700000 { | |
| 96 | 115 | compatible = "mrvl,pxa-uart"; |
| 97 | 116 | reg = <0x40700000 0x30>; |
| 98 | 117 | interrupts = <20>; |
| @@ -100,7 +119,7 @@ · 1 unmodified line | ||
| 100 | 119 | status = "disabled"; |
| 101 | 120 | }; |
| 102 | 121 | |
| 103 | − hwuart: uart@41100000 { | |
| 122 | + hwuart: serial@41100000 { | |
| 104 | 123 | compatible = "mrvl,pxa-uart"; |
| 105 | 124 | reg = <0x41100000 0x30>; |
| 106 | 125 | interrupts = <7>; |
| @@ -1611,10 +1611,11 @@ · 1610 unmodified lines | ||
| 1611 | 1611 | clocks = <&rpmcc RPM_QDSS_CLK>; |
| 1612 | 1612 | clock-names = "apb_pclk"; |
| 1613 | 1613 | |
| 1614 | − port { | |
| 1615 | − etb_in: endpoint { | |
| 1616 | − slave-mode; | |
| 1617 | − remote-endpoint = <&replicator_out0>; | |
| 1614 | + in-ports { | |
| 1615 | + port { | |
| 1616 | + etb_in: endpoint { | |
| 1617 | + remote-endpoint = <&replicator_out0>; | |
| 1618 | + }; | |
| 1618 | 1619 | }; |
| 1619 | 1620 | }; |
| 1620 | 1621 | }; |
| @@ -1626,10 +1627,11 @@ · 5 unmodified lines | ||
| 1626 | 1627 | clocks = <&rpmcc RPM_QDSS_CLK>; |
| 1627 | 1628 | clock-names = "apb_pclk"; |
| 1628 | 1629 | |
| 1629 | − port { | |
| 1630 | − tpiu_in: endpoint { | |
| 1631 | − slave-mode; | |
| 1632 | − remote-endpoint = <&replicator_out1>; | |
| 1630 | + in-ports { | |
| 1631 | + port { | |
| 1632 | + tpiu_in: endpoint { | |
| 1633 | + remote-endpoint = <&replicator_out1>; | |
| 1634 | + }; | |
| 1633 | 1635 | }; |
| 1634 | 1636 | }; |
| 1635 | 1637 | }; |
| @@ -1640,7 +1642,7 @@ · 4 unmodified lines | ||
| 1640 | 1642 | clocks = <&rpmcc RPM_QDSS_CLK>; |
| 1641 | 1643 | clock-names = "apb_pclk"; |
| 1642 | 1644 | |
| 1643 | − ports { | |
| 1645 | + out-ports { | |
| 1644 | 1646 | #address-cells = <1>; |
| 1645 | 1647 | #size-cells = <0>; |
| 1646 | 1648 | |
| @@ -1656,10 +1658,11 @@ · 9 unmodified lines | ||
| 1656 | 1658 | remote-endpoint = <&tpiu_in>; |
| 1657 | 1659 | }; |
| 1658 | 1660 | }; |
| 1659 | − port@2 { | |
| 1660 | − reg = <0>; | |
| 1661 | + }; | |
| 1662 | + | |
| 1663 | + in-ports { | |
| 1664 | + port { | |
| 1661 | 1665 | replicator_in: endpoint { |
| 1662 | − slave-mode; | |
| 1663 | 1666 | remote-endpoint = <&funnel_out>; |
| 1664 | 1667 | }; |
| 1665 | 1668 | }; |
| @@ -1673,7 +1676,7 @@ · 7 unmodified lines | ||
| 1673 | 1676 | clocks = <&rpmcc RPM_QDSS_CLK>; |
| 1674 | 1677 | clock-names = "apb_pclk"; |
| 1675 | 1678 | |
| 1676 | − ports { | |
| 1679 | + in-ports { | |
| 1677 | 1680 | #address-cells = <1>; |
| 1678 | 1681 | #size-cells = <0>; |
| 1679 | 1682 | |
| @@ -1687,33 +1690,31 @@ · 7 unmodified lines | ||
| 1687 | 1690 | port@0 { |
| 1688 | 1691 | reg = <0>; |
| 1689 | 1692 | funnel_in0: endpoint { |
| 1690 | − slave-mode; | |
| 1691 | 1693 | remote-endpoint = <&etm0_out>; |
| 1692 | 1694 | }; |
| 1693 | 1695 | }; |
| 1694 | 1696 | port@1 { |
| 1695 | 1697 | reg = <1>; |
| 1696 | 1698 | funnel_in1: endpoint { |
| 1697 | − slave-mode; | |
| 1698 | 1699 | remote-endpoint = <&etm1_out>; |
| 1699 | 1700 | }; |
| 1700 | 1701 | }; |
| 1701 | 1702 | port@4 { |
| 1702 | 1703 | reg = <4>; |
| 1703 | 1704 | funnel_in4: endpoint { |
| 1704 | − slave-mode; | |
| 1705 | 1705 | remote-endpoint = <&etm2_out>; |
| 1706 | 1706 | }; |
| 1707 | 1707 | }; |
| 1708 | 1708 | port@5 { |
| 1709 | 1709 | reg = <5>; |
| 1710 | 1710 | funnel_in5: endpoint { |
| 1711 | − slave-mode; | |
| 1712 | 1711 | remote-endpoint = <&etm3_out>; |
| 1713 | 1712 | }; |
| 1714 | 1713 | }; |
| 1715 | − port@8 { | |
| 1716 | − reg = <0>; | |
| 1714 | + }; | |
| 1715 | + | |
| 1716 | + out-ports { | |
| 1717 | + port { | |
| 1717 | 1718 | funnel_out: endpoint { |
| 1718 | 1719 | remote-endpoint = <&replicator_in>; |
| 1719 | 1720 | }; |
| @@ -1730,9 +1731,11 @@ · 10 unmodified lines | ||
| 1730 | 1731 | |
| 1731 | 1732 | cpu = <&CPU0>; |
| 1732 | 1733 | |
| 1733 | − port { | |
| 1734 | − etm0_out: endpoint { | |
| 1735 | − remote-endpoint = <&funnel_in0>; | |
| 1734 | + out-ports { | |
| 1735 | + port { | |
| 1736 | + etm0_out: endpoint { | |
| 1737 | + remote-endpoint = <&funnel_in0>; | |
| 1738 | + }; | |
| 1736 | 1739 | }; |
| 1737 | 1740 | }; |
| 1738 | 1741 | }; |
| @@ -1746,9 +1749,11 @@ · 7 unmodified lines | ||
| 1746 | 1749 | |
| 1747 | 1750 | cpu = <&CPU1>; |
| 1748 | 1751 | |
| 1749 | − port { | |
| 1750 | − etm1_out: endpoint { | |
| 1751 | − remote-endpoint = <&funnel_in1>; | |
| 1752 | + out-ports { | |
| 1753 | + port { | |
| 1754 | + etm1_out: endpoint { | |
| 1755 | + remote-endpoint = <&funnel_in1>; | |
| 1756 | + }; | |
| 1752 | 1757 | }; |
| 1753 | 1758 | }; |
| 1754 | 1759 | }; |
| @@ -1762,9 +1767,11 @@ · 7 unmodified lines | ||
| 1762 | 1767 | |
| 1763 | 1768 | cpu = <&CPU2>; |
| 1764 | 1769 | |
| 1765 | − port { | |
| 1766 | − etm2_out: endpoint { | |
| 1767 | − remote-endpoint = <&funnel_in4>; | |
| 1770 | + out-ports { | |
| 1771 | + port { | |
| 1772 | + etm2_out: endpoint { | |
| 1773 | + remote-endpoint = <&funnel_in4>; | |
| 1774 | + }; | |
| 1768 | 1775 | }; |
| 1769 | 1776 | }; |
| 1770 | 1777 | }; |
| @@ -1778,9 +1785,11 @@ · 7 unmodified lines | ||
| 1778 | 1785 | |
| 1779 | 1786 | cpu = <&CPU3>; |
| 1780 | 1787 | |
| 1781 | − port { | |
| 1782 | − etm3_out: endpoint { | |
| 1783 | − remote-endpoint = <&funnel_in5>; | |
| 1788 | + out-ports { | |
| 1789 | + port { | |
| 1790 | + etm3_out: endpoint { | |
| 1791 | + remote-endpoint = <&funnel_in5>; | |
| 1792 | + }; | |
| 1784 | 1793 | }; |
| 1785 | 1794 | }; |
| 1786 | 1795 | }; |
| @@ -52,78 +52,85 @@ · 51 unmodified lines | ||
| 52 | 52 | cpu@0 { |
| 53 | 53 | device_type = "cpu"; |
| 54 | 54 | compatible = "arm,cortex-a7"; |
| 55 | − enable-method = "qcom,kpss-acc-v1"; | |
| 55 | + enable-method = "qcom,kpss-acc-v2"; | |
| 56 | + next-level-cache = <&L2>; | |
| 56 | 57 | qcom,acc = <&acc0>; |
| 57 | 58 | qcom,saw = <&saw0>; |
| 58 | 59 | reg = <0x0>; |
| 59 | 60 | clocks = <&gcc GCC_APPS_CLK_SRC>; |
| 60 | 61 | clock-frequency = <0>; |
| 61 | − operating-points = < | |
| 62 | − /* kHz uV (fixed) */ | |
| 63 | − 48000 1100000 | |
| 64 | − 200000 1100000 | |
| 65 | − 500000 1100000 | |
| 66 | − 716000 1100000 | |
| 67 | − >; | |
| 68 | 62 | clock-latency = <256000>; |
| 63 | + operating-points-v2 = <&cpu0_opp_table>; | |
| 69 | 64 | }; |
| 70 | 65 | |
| 71 | 66 | cpu@1 { |
| 72 | 67 | device_type = "cpu"; |
| 73 | 68 | compatible = "arm,cortex-a7"; |
| 74 | − enable-method = "qcom,kpss-acc-v1"; | |
| 69 | + enable-method = "qcom,kpss-acc-v2"; | |
| 70 | + next-level-cache = <&L2>; | |
| 75 | 71 | qcom,acc = <&acc1>; |
| 76 | 72 | qcom,saw = <&saw1>; |
| 77 | 73 | reg = <0x1>; |
| 78 | 74 | clocks = <&gcc GCC_APPS_CLK_SRC>; |
| 79 | 75 | clock-frequency = <0>; |
| 80 | − operating-points = < | |
| 81 | − /* kHz uV (fixed) */ | |
| 82 | − 48000 1100000 | |
| 83 | − 200000 1100000 | |
| 84 | − 500000 1100000 | |
| 85 | − 666000 1100000 | |
| 86 | − >; | |
| 87 | 76 | clock-latency = <256000>; |
| 77 | + operating-points-v2 = <&cpu0_opp_table>; | |
| 88 | 78 | }; |
| 89 | 79 | |
| 90 | 80 | cpu@2 { |
| 91 | 81 | device_type = "cpu"; |
| 92 | 82 | compatible = "arm,cortex-a7"; |
| 93 | − enable-method = "qcom,kpss-acc-v1"; | |
| 83 | + enable-method = "qcom,kpss-acc-v2"; | |
| 84 | + next-level-cache = <&L2>; | |
| 94 | 85 | qcom,acc = <&acc2>; |
| 95 | 86 | qcom,saw = <&saw2>; |
| 96 | 87 | reg = <0x2>; |
| 97 | 88 | clocks = <&gcc GCC_APPS_CLK_SRC>; |
| 98 | 89 | clock-frequency = <0>; |
| 99 | − operating-points = < | |
| 100 | − /* kHz uV (fixed) */ | |
| 101 | − 48000 1100000 | |
| 102 | − 200000 1100000 | |
| 103 | − 500000 1100000 | |
| 104 | − 666000 1100000 | |
| 105 | − >; | |
| 106 | 90 | clock-latency = <256000>; |
| 91 | + operating-points-v2 = <&cpu0_opp_table>; | |
| 107 | 92 | }; |
| 108 | 93 | |
| 109 | 94 | cpu@3 { |
| 110 | 95 | device_type = "cpu"; |
| 111 | 96 | compatible = "arm,cortex-a7"; |
| 112 | − enable-method = "qcom,kpss-acc-v1"; | |
| 97 | + enable-method = "qcom,kpss-acc-v2"; | |
| 98 | + next-level-cache = <&L2>; | |
| 113 | 99 | qcom,acc = <&acc3>; |
| 114 | 100 | qcom,saw = <&saw3>; |
| 115 | 101 | reg = <0x3>; |
| 116 | 102 | clocks = <&gcc GCC_APPS_CLK_SRC>; |
| 117 | 103 | clock-frequency = <0>; |
| 118 | − operating-points = < | |
| 119 | − /* kHz uV (fixed) */ | |
| 120 | − 48000 1100000 | |
| 121 | − 200000 1100000 | |
| 122 | − 500000 1100000 | |
| 123 | − 666000 1100000 | |
| 124 | − >; | |
| 125 | 104 | clock-latency = <256000>; |
| 105 | + operating-points-v2 = <&cpu0_opp_table>; | |
| 126 | 106 | }; |
| 107 | + | |
| 108 | + L2: l2-cache { | |
| 109 | + compatible = "cache"; | |
| 110 | + cache-level = <2>; | |
| 111 | + }; | |
| 112 | + }; | |
| 113 | + | |
| 114 | + cpu0_opp_table: opp_table0 { | |
| 115 | + compatible = "operating-points-v2"; | |
| 116 | + opp-shared; | |
| 117 | + | |
| 118 | + opp-48000000 { | |
| 119 | + opp-hz = /bits/ 64 <48000000>; | |
| 120 | + clock-latency-ns = <256000>; | |
| 121 | + }; | |
| 122 | + opp-200000000 { | |
| 123 | + opp-hz = /bits/ 64 <200000000>; | |
| 124 | + clock-latency-ns = <256000>; | |
| 125 | + }; | |
| 126 | + opp-500000000 { | |
| 127 | + opp-hz = /bits/ 64 <500000000>; | |
| 128 | + clock-latency-ns = <256000>; | |
| 129 | + }; | |
| 130 | + opp-716000000 { | |
| 131 | + opp-hz = /bits/ 64 <716000000>; | |
| 132 | + clock-latency-ns = <256000>; | |
| 133 | + }; | |
| 127 | 134 | }; |
| 128 | 135 | |
| 129 | 136 | pmu { |
| @@ -291,49 +298,49 @@ · 161 unmodified lines | ||
| 291 | 298 | status = "disabled"; |
| 292 | 299 | }; |
| 293 | 300 | |
| 294 | − acc0: clock-controller@b088000 { | |
| 295 | − compatible = "qcom,kpss-acc-v1"; | |
| 296 | − reg = <0x0b088000 0x1000>, <0xb008000 0x1000>; | |
| 297 | − }; | |
| 301 | + acc0: clock-controller@b088000 { | |
| 302 | + compatible = "qcom,kpss-acc-v2"; | |
| 303 | + reg = <0x0b088000 0x1000>, <0xb008000 0x1000>; | |
| 304 | + }; | |
| 298 | 305 | |
| 299 | − acc1: clock-controller@b098000 { | |
| 300 | − compatible = "qcom,kpss-acc-v1"; | |
| 301 | − reg = <0x0b098000 0x1000>, <0xb008000 0x1000>; | |
| 302 | − }; | |
| 306 | + acc1: clock-controller@b098000 { | |
| 307 | + compatible = "qcom,kpss-acc-v2"; | |
| 308 | + reg = <0x0b098000 0x1000>, <0xb008000 0x1000>; | |
| 309 | + }; | |
| 303 | 310 | |
| 304 | − acc2: clock-controller@b0a8000 { | |
| 305 | − compatible = "qcom,kpss-acc-v1"; | |
| 306 | − reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>; | |
| 307 | − }; | |
| 311 | + acc2: clock-controller@b0a8000 { | |
| 312 | + compatible = "qcom,kpss-acc-v2"; | |
| 313 | + reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>; | |
| 314 | + }; | |
| 308 | 315 | |
| 309 | − acc3: clock-controller@b0b8000 { | |
| 310 | − compatible = "qcom,kpss-acc-v1"; | |
| 311 | − reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>; | |
| 312 | − }; | |
| 316 | + acc3: clock-controller@b0b8000 { | |
| 317 | + compatible = "qcom,kpss-acc-v2"; | |
| 318 | + reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>; | |
| 319 | + }; | |
| 313 | 320 | |
| 314 | − saw0: regulator@b089000 { | |
| 315 | − compatible = "qcom,saw2"; | |
| 316 | − reg = <0x02089000 0x1000>, <0x0b009000 0x1000>; | |
| 321 | + saw0: regulator@b089000 { | |
| 322 | + compatible = "qcom,saw2"; | |
| 323 | + reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>; | |
| 317 | 324 | regulator; |
| 318 | − }; | |
| 325 | + }; | |
| 319 | 326 | |
| 320 | − saw1: regulator@b099000 { | |
| 321 | − compatible = "qcom,saw2"; | |
| 322 | − reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>; | |
| 323 | − regulator; | |
| 324 | − }; | |
| 327 | + saw1: regulator@b099000 { | |
| 328 | + compatible = "qcom,saw2"; | |
| 329 | + reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>; | |
| 330 | + regulator; | |
| 331 | + }; | |
| 325 | 332 | |
| 326 | − saw2: regulator@b0a9000 { | |
| 327 | − compatible = "qcom,saw2"; | |
| 328 | − reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>; | |
| 329 | − regulator; | |
| 330 | − }; | |
| 333 | + saw2: regulator@b0a9000 { | |
| 334 | + compatible = "qcom,saw2"; | |
| 335 | + reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>; | |
| 336 | + regulator; | |
| 337 | + }; | |
| 331 | 338 | |
| 332 | − saw3: regulator@b0b9000 { | |
| 333 | − compatible = "qcom,saw2"; | |
| 334 | − reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>; | |
| 335 | − regulator; | |
| 336 | − }; | |
| 339 | + saw3: regulator@b0b9000 { | |
| 340 | + compatible = "qcom,saw2"; | |
| 341 | + reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>; | |
| 342 | + regulator; | |
| 343 | + }; | |
| 337 | 344 | |
| 338 | 345 | blsp1_uart1: serial@78af000 { |
| 339 | 346 | compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; |
| @@ -387,7 +394,7 @@ · 47 unmodified lines | ||
| 387 | 394 | #size-cells = <2>; |
| 388 | 395 | |
| 389 | 396 | ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000 |
| 390 | − 0x82000000 0 0x48000000 0x48000000 0 0x10000000>; | |
| 397 | + 0x82000000 0 0x40300000 0x40300000 0 0x400000>; | |
| 391 | 398 | |
| 392 | 399 | interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>; |
| 393 | 400 | interrupt-names = "msi"; |
| @@ -2,26 +2,8 @@ · 1 unmodified line | ||
| 2 | 2 | #include "qcom-ipq8064-v1.0.dtsi" |
| 3 | 3 | |
| 4 | 4 | / { |
| 5 | − model = "Qualcomm IPQ8064/AP148"; | |
| 6 | − compatible = "qcom,ipq8064-ap148", "qcom,ipq8064"; | |
| 7 | − | |
| 8 | − aliases { | |
| 9 | − serial0 = &gsbi4_serial; | |
| 10 | − }; | |
| 11 | − | |
| 12 | − chosen { | |
| 13 | − stdout-path = "serial0:115200n8"; | |
| 14 | − }; | |
| 15 | − | |
| 16 | − reserved-memory { | |
| 17 | − #address-cells = <1>; | |
| 18 | − #size-cells = <1>; | |
| 19 | − ranges; | |
| 20 | − rsvd@41200000 { | |
| 21 | − reg = <0x41200000 0x300000>; | |
| 22 | − no-map; | |
| 23 | − }; | |
| 24 | − }; | |
| 5 | + model = "Qualcomm Technologies, Inc. IPQ8064/AP-148"; | |
| 6 | + compatible = "qcom,ipq8064-ap148"; | |
| 25 | 7 | |
| 26 | 8 | soc { |
| 27 | 9 | pinmux@800000 { |
| @@ -31,73 +13,22 @@ · 3 unmodified lines | ||
| 31 | 13 | bias-disable; |
| 32 | 14 | }; |
| 33 | 15 | |
| 34 | − spi_pins: spi_pins { | |
| 16 | + buttons_pins: buttons_pins { | |
| 35 | 17 | mux { |
| 36 | − pins = "gpio18", "gpio19", "gpio21"; | |
| 37 | − function = "gsbi5"; | |
| 38 | − drive-strength = <10>; | |
| 39 | − bias-none; | |
| 18 | + pins = "gpio54", "gpio65"; | |
| 19 | + drive-strength = <2>; | |
| 20 | + bias-pull-up; | |
| 40 | 21 | }; |
| 41 | 22 | }; |
| 42 | 23 | }; |
| 43 | 24 | |
| 44 | 25 | gsbi@16300000 { |
| 45 | − qcom,mode = <GSBI_PROT_I2C_UART>; | |
| 46 | − status = "ok"; | |
| 47 | − serial@16340000 { | |
| 26 | + i2c@16380000 { | |
| 48 | 27 | status = "ok"; |
| 49 | − }; | |
| 50 | − | |
| 51 | − i2c4: i2c@16380000 { | |
| 52 | − status = "ok"; | |
| 53 | − | |
| 54 | 28 | clock-frequency = <200000>; |
| 55 | − | |
| 56 | 29 | pinctrl-0 = <&i2c4_pins>; |
| 57 | 30 | pinctrl-names = "default"; |
| 58 | 31 | }; |
| 59 | 32 | }; |
| 60 | − | |
| 61 | − gsbi5: gsbi@1a200000 { | |
| 62 | − qcom,mode = <GSBI_PROT_SPI>; | |
| 63 | − status = "ok"; | |
| 64 | − | |
| 65 | − spi4: spi@1a280000 { | |
| 66 | − status = "ok"; | |
| 67 | − spi-max-frequency = <50000000>; | |
| 68 | − | |
| 69 | − pinctrl-0 = <&spi_pins>; | |
| 70 | − pinctrl-names = "default"; | |
| 71 | − | |
| 72 | − cs-gpios = <&qcom_pinmux 20 0>; | |
| 73 | − | |
| 74 | − flash: m25p80@0 { | |
| 75 | − compatible = "s25fl256s1"; | |
| 76 | − #address-cells = <1>; | |
| 77 | − #size-cells = <1>; | |
| 78 | − spi-max-frequency = <50000000>; | |
| 79 | − reg = <0>; | |
| 80 | − | |
| 81 | − partition@0 { | |
| 82 | − label = "rootfs"; | |
| 83 | − reg = <0x0 0x1000000>; | |
| 84 | − }; | |
| 85 | − | |
| 86 | − partition@1 { | |
| 87 | − label = "scratch"; | |
| 88 | − reg = <0x1000000 0x1000000>; | |
| 89 | − }; | |
| 90 | − }; | |
| 91 | − }; | |
| 92 | − }; | |
| 93 | − | |
| 94 | − sata-phy@1b400000 { | |
| 95 | − status = "ok"; | |
| 96 | − }; | |
| 97 | − | |
| 98 | − sata@29000000 { | |
| 99 | − ports-implemented = <0x1>; | |
| 100 | − status = "ok"; | |
| 101 | − }; | |
| 102 | 33 | }; |
| 103 | 34 | }; |
| @@ -1,2 +1,127 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | #include "qcom-ipq8064.dtsi" |
| 3 | +#include <dt-bindings/input/input.h> | |
| 4 | + | |
| 5 | +/ { | |
| 6 | + model = "Qualcomm Technologies, Inc. IPQ8064-v1.0"; | |
| 7 | + | |
| 8 | + aliases { | |
| 9 | + serial0 = &gsbi4_serial; | |
| 10 | + }; | |
| 11 | + | |
| 12 | + chosen { | |
| 13 | + stdout-path = "serial0:115200n8"; | |
| 14 | + }; | |
| 15 | + | |
| 16 | + soc { | |
| 17 | + gsbi@16300000 { | |
| 18 | + qcom,mode = <GSBI_PROT_I2C_UART>; | |
| 19 | + status = "ok"; | |
| 20 | + | |
| 21 | + serial@16340000 { | |
| 22 | + status = "ok"; | |
| 23 | + }; | |
| 24 | + }; | |
| 25 | + | |
| 26 | + gsbi5: gsbi@1a200000 { | |
| 27 | + qcom,mode = <GSBI_PROT_SPI>; | |
| 28 | + status = "ok"; | |
| 29 | + | |
| 30 | + spi4: spi@1a280000 { | |
| 31 | + status = "ok"; | |
| 32 | + spi-max-frequency = <50000000>; | |
| 33 | + | |
| 34 | + pinctrl-0 = <&spi_pins>; | |
| 35 | + pinctrl-names = "default"; | |
| 36 | + | |
| 37 | + cs-gpios = <&qcom_pinmux 20 0>; | |
| 38 | + | |
| 39 | + flash: m25p80@0 { | |
| 40 | + compatible = "s25fl256s1"; | |
| 41 | + #address-cells = <1>; | |
| 42 | + #size-cells = <1>; | |
| 43 | + spi-max-frequency = <50000000>; | |
| 44 | + reg = <0>; | |
| 45 | + | |
| 46 | + partition@0 { | |
| 47 | + label = "rootfs"; | |
| 48 | + reg = <0x0 0x1000000>; | |
| 49 | + }; | |
| 50 | + | |
| 51 | + partition@1 { | |
| 52 | + label = "scratch"; | |
| 53 | + reg = <0x1000000 0x1000000>; | |
| 54 | + }; | |
| 55 | + }; | |
| 56 | + }; | |
| 57 | + }; | |
| 58 | + | |
| 59 | + sata-phy@1b400000 { | |
| 60 | + status = "ok"; | |
| 61 | + }; | |
| 62 | + | |
| 63 | + sata@29000000 { | |
| 64 | + ports-implemented = <0x1>; | |
| 65 | + status = "ok"; | |
| 66 | + }; | |
| 67 | + | |
| 68 | + gpio_keys { | |
| 69 | + compatible = "gpio-keys"; | |
| 70 | + pinctrl-0 = <&buttons_pins>; | |
| 71 | + pinctrl-names = "default"; | |
| 72 | + | |
| 73 | + button@1 { | |
| 74 | + label = "reset"; | |
| 75 | + linux,code = <KEY_RESTART>; | |
| 76 | + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; | |
| 77 | + linux,input-type = <1>; | |
| 78 | + debounce-interval = <60>; | |
| 79 | + }; | |
| 80 | + button@2 { | |
| 81 | + label = "wps"; | |
| 82 | + linux,code = <KEY_WPS_BUTTON>; | |
| 83 | + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; | |
| 84 | + linux,input-type = <1>; | |
| 85 | + debounce-interval = <60>; | |
| 86 | + }; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + leds { | |
| 90 | + compatible = "gpio-leds"; | |
| 91 | + pinctrl-0 = <&leds_pins>; | |
| 92 | + pinctrl-names = "default"; | |
| 93 | + | |
| 94 | + led@7 { | |
| 95 | + label = "led_usb1"; | |
| 96 | + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; | |
| 97 | + linux,default-trigger = "usbdev"; | |
| 98 | + default-state = "off"; | |
| 99 | + }; | |
| 100 | + | |
| 101 | + led@8 { | |
| 102 | + label = "led_usb3"; | |
| 103 | + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; | |
| 104 | + linux,default-trigger = "usbdev"; | |
| 105 | + default-state = "off"; | |
| 106 | + }; | |
| 107 | + | |
| 108 | + led@9 { | |
| 109 | + label = "status_led_fail"; | |
| 110 | + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; | |
| 111 | + default-state = "off"; | |
| 112 | + }; | |
| 113 | + | |
| 114 | + led@26 { | |
| 115 | + label = "sata_led"; | |
| 116 | + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; | |
| 117 | + default-state = "off"; | |
| 118 | + }; | |
| 119 | + | |
| 120 | + led@53 { | |
| 121 | + label = "status_led_pass"; | |
| 122 | + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; | |
| 123 | + default-state = "off"; | |
| 124 | + }; | |
| 125 | + }; | |
| 126 | + }; | |
| 127 | +}; | |
| @@ -2,8 +2,11 @@ · 1 unmodified line | ||
| 2 | 2 | /dts-v1/; |
| 3 | 3 | |
| 4 | 4 | #include "skeleton.dtsi" |
| 5 | +#include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 5 | 6 | #include <dt-bindings/clock/qcom,gcc-ipq806x.h> |
| 6 | 7 | #include <dt-bindings/clock/qcom,lcc-ipq806x.h> |
| 8 | +#include <dt-bindings/gpio/gpio.h> | |
| 9 | +#include <dt-bindings/reset/qcom,gcc-ipq806x.h> | |
| 7 | 10 | #include <dt-bindings/soc/qcom,gsbi.h> |
| 8 | 11 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 9 | 12 | |
| @@ -114,6 +117,61 @@ · 104 unmodified lines | ||
| 114 | 117 | interrupt-controller; |
| 115 | 118 | #interrupt-cells = <2>; |
| 116 | 119 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 120 | + | |
| 121 | + pcie0_pins: pcie0_pinmux { | |
| 122 | + mux { | |
| 123 | + pins = "gpio3"; | |
| 124 | + function = "pcie1_rst"; | |
| 125 | + drive-strength = <12>; | |
| 126 | + bias-disable; | |
| 127 | + }; | |
| 128 | + }; | |
| 129 | + | |
| 130 | + pcie1_pins: pcie1_pinmux { | |
| 131 | + mux { | |
| 132 | + pins = "gpio48"; | |
| 133 | + function = "pcie2_rst"; | |
| 134 | + drive-strength = <12>; | |
| 135 | + bias-disable; | |
| 136 | + }; | |
| 137 | + }; | |
| 138 | + | |
| 139 | + pcie2_pins: pcie2_pinmux { | |
| 140 | + mux { | |
| 141 | + pins = "gpio63"; | |
| 142 | + function = "pcie3_rst"; | |
| 143 | + drive-strength = <12>; | |
| 144 | + bias-disable; | |
| 145 | + }; | |
| 146 | + }; | |
| 147 | + | |
| 148 | + spi_pins: spi_pins { | |
| 149 | + mux { | |
| 150 | + pins = "gpio18", "gpio19", "gpio21"; | |
| 151 | + function = "gsbi5"; | |
| 152 | + drive-strength = <10>; | |
| 153 | + bias-none; | |
| 154 | + }; | |
| 155 | + }; | |
| 156 | + | |
| 157 | + leds_pins: leds_pins { | |
| 158 | + mux { | |
| 159 | + pins = "gpio7", "gpio8", "gpio9", | |
| 160 | + "gpio26", "gpio53"; | |
| 161 | + function = "gpio"; | |
| 162 | + drive-strength = <2>; | |
| 163 | + bias-pull-down; | |
| 164 | + output-low; | |
| 165 | + }; | |
| 166 | + }; | |
| 167 | + | |
| 168 | + buttons_pins: buttons_pins { | |
| 169 | + mux { | |
| 170 | + pins = "gpio54"; | |
| 171 | + drive-strength = <2>; | |
| 172 | + bias-pull-up; | |
| 173 | + }; | |
| 174 | + }; | |
| 117 | 175 | }; |
| 118 | 176 | |
| 119 | 177 | intc: interrupt-controller@2000000 { |
| @@ -373,5 +431,233 @@ · 253 unmodified lines | ||
| 373 | 431 | #reset-cells = <1>; |
| 374 | 432 | }; |
| 375 | 433 | |
| 434 | + pcie0: pci@1b500000 { | |
| 435 | + compatible = "qcom,pcie-ipq8064"; | |
| 436 | + reg = <0x1b500000 0x1000 | |
| 437 | + 0x1b502000 0x80 | |
| 438 | + 0x1b600000 0x100 | |
| 439 | + 0x0ff00000 0x100000>; | |
| 440 | + reg-names = "dbi", "elbi", "parf", "config"; | |
| 441 | + device_type = "pci"; | |
| 442 | + linux,pci-domain = <0>; | |
| 443 | + bus-range = <0x00 0xff>; | |
| 444 | + num-lanes = <1>; | |
| 445 | + #address-cells = <3>; | |
| 446 | + #size-cells = <2>; | |
| 447 | + | |
| 448 | + ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */ | |
| 449 | + 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */ | |
| 450 | + | |
| 451 | + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | |
| 452 | + interrupt-names = "msi"; | |
| 453 | + #interrupt-cells = <1>; | |
| 454 | + interrupt-map-mask = <0 0 0 0x7>; | |
| 455 | + interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ | |
| 456 | + <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ | |
| 457 | + <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ | |
| 458 | + <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ | |
| 459 | + | |
| 460 | + clocks = <&gcc PCIE_A_CLK>, | |
| 461 | + <&gcc PCIE_H_CLK>, | |
| 462 | + <&gcc PCIE_PHY_CLK>, | |
| 463 | + <&gcc PCIE_AUX_CLK>, | |
| 464 | + <&gcc PCIE_ALT_REF_CLK>; | |
| 465 | + clock-names = "core", "iface", "phy", "aux", "ref"; | |
| 466 | + | |
| 467 | + assigned-clocks = <&gcc PCIE_ALT_REF_CLK>; | |
| 468 | + assigned-clock-rates = <100000000>; | |
| 469 | + | |
| 470 | + resets = <&gcc PCIE_ACLK_RESET>, | |
| 471 | + <&gcc PCIE_HCLK_RESET>, | |
| 472 | + <&gcc PCIE_POR_RESET>, | |
| 473 | + <&gcc PCIE_PCI_RESET>, | |
| 474 | + <&gcc PCIE_PHY_RESET>, | |
| 475 | + <&gcc PCIE_EXT_RESET>; | |
| 476 | + reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; | |
| 477 | + | |
| 478 | + pinctrl-0 = <&pcie0_pins>; | |
| 479 | + pinctrl-names = "default"; | |
| 480 | + | |
| 481 | + status = "disabled"; | |
| 482 | + perst-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; | |
| 483 | + }; | |
| 484 | + | |
| 485 | + pcie1: pci@1b700000 { | |
| 486 | + compatible = "qcom,pcie-ipq8064"; | |
| 487 | + reg = <0x1b700000 0x1000 | |
| 488 | + 0x1b702000 0x80 | |
| 489 | + 0x1b800000 0x100 | |
| 490 | + 0x31f00000 0x100000>; | |
| 491 | + reg-names = "dbi", "elbi", "parf", "config"; | |
| 492 | + device_type = "pci"; | |
| 493 | + linux,pci-domain = <1>; | |
| 494 | + bus-range = <0x00 0xff>; | |
| 495 | + num-lanes = <1>; | |
| 496 | + #address-cells = <3>; | |
| 497 | + #size-cells = <2>; | |
| 498 | + | |
| 499 | + ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */ | |
| 500 | + 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */ | |
| 501 | + | |
| 502 | + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; | |
| 503 | + interrupt-names = "msi"; | |
| 504 | + #interrupt-cells = <1>; | |
| 505 | + interrupt-map-mask = <0 0 0 0x7>; | |
| 506 | + interrupt-map = <0 0 0 1 &intc 0 58 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ | |
| 507 | + <0 0 0 2 &intc 0 59 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ | |
| 508 | + <0 0 0 3 &intc 0 60 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ | |
| 509 | + <0 0 0 4 &intc 0 61 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ | |
| 510 | + | |
| 511 | + clocks = <&gcc PCIE_1_A_CLK>, | |
| 512 | + <&gcc PCIE_1_H_CLK>, | |
| 513 | + <&gcc PCIE_1_PHY_CLK>, | |
| 514 | + <&gcc PCIE_1_AUX_CLK>, | |
| 515 | + <&gcc PCIE_1_ALT_REF_CLK>; | |
| 516 | + clock-names = "core", "iface", "phy", "aux", "ref"; | |
| 517 | + | |
| 518 | + assigned-clocks = <&gcc PCIE_1_ALT_REF_CLK>; | |
| 519 | + assigned-clock-rates = <100000000>; | |
| 520 | + | |
| 521 | + resets = <&gcc PCIE_1_ACLK_RESET>, | |
| 522 | + <&gcc PCIE_1_HCLK_RESET>, | |
| 523 | + <&gcc PCIE_1_POR_RESET>, | |
| 524 | + <&gcc PCIE_1_PCI_RESET>, | |
| 525 | + <&gcc PCIE_1_PHY_RESET>, | |
| 526 | + <&gcc PCIE_1_EXT_RESET>; | |
| 527 | + reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; | |
| 528 | + | |
| 529 | + pinctrl-0 = <&pcie1_pins>; | |
| 530 | + pinctrl-names = "default"; | |
| 531 | + | |
| 532 | + status = "disabled"; | |
| 533 | + perst-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; | |
| 534 | + }; | |
| 535 | + | |
| 536 | + pcie2: pci@1b900000 { | |
| 537 | + compatible = "qcom,pcie-ipq8064"; | |
| 538 | + reg = <0x1b900000 0x1000 | |
| 539 | + 0x1b902000 0x80 | |
| 540 | + 0x1ba00000 0x100 | |
| 541 | + 0x35f00000 0x100000>; | |
| 542 | + reg-names = "dbi", "elbi", "parf", "config"; | |
| 543 | + device_type = "pci"; | |
| 544 | + linux,pci-domain = <2>; | |
| 545 | + bus-range = <0x00 0xff>; | |
| 546 | + num-lanes = <1>; | |
| 547 | + #address-cells = <3>; | |
| 548 | + #size-cells = <2>; | |
| 549 | + | |
| 550 | + ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */ | |
| 551 | + 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */ | |
| 552 | + | |
| 553 | + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; | |
| 554 | + interrupt-names = "msi"; | |
| 555 | + #interrupt-cells = <1>; | |
| 556 | + interrupt-map-mask = <0 0 0 0x7>; | |
| 557 | + interrupt-map = <0 0 0 1 &intc 0 72 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ | |
| 558 | + <0 0 0 2 &intc 0 73 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ | |
| 559 | + <0 0 0 3 &intc 0 74 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ | |
| 560 | + <0 0 0 4 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ | |
| 561 | + | |
| 562 | + clocks = <&gcc PCIE_2_A_CLK>, | |
| 563 | + <&gcc PCIE_2_H_CLK>, | |
| 564 | + <&gcc PCIE_2_PHY_CLK>, | |
| 565 | + <&gcc PCIE_2_AUX_CLK>, | |
| 566 | + <&gcc PCIE_2_ALT_REF_CLK>; | |
| 567 | + clock-names = "core", "iface", "phy", "aux", "ref"; | |
| 568 | + | |
| 569 | + assigned-clocks = <&gcc PCIE_2_ALT_REF_CLK>; | |
| 570 | + assigned-clock-rates = <100000000>; | |
| 571 | + | |
| 572 | + resets = <&gcc PCIE_2_ACLK_RESET>, | |
| 573 | + <&gcc PCIE_2_HCLK_RESET>, | |
| 574 | + <&gcc PCIE_2_POR_RESET>, | |
| 575 | + <&gcc PCIE_2_PCI_RESET>, | |
| 576 | + <&gcc PCIE_2_PHY_RESET>, | |
| 577 | + <&gcc PCIE_2_EXT_RESET>; | |
| 578 | + reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; | |
| 579 | + | |
| 580 | + pinctrl-0 = <&pcie2_pins>; | |
| 581 | + pinctrl-names = "default"; | |
| 582 | + | |
| 583 | + status = "disabled"; | |
| 584 | + perst-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>; | |
| 585 | + }; | |
| 586 | + | |
| 587 | + vsdcc_fixed: vsdcc-regulator { | |
| 588 | + compatible = "regulator-fixed"; | |
| 589 | + regulator-name = "SDCC Power"; | |
| 590 | + regulator-min-microvolt = <3300000>; | |
| 591 | + regulator-max-microvolt = <3300000>; | |
| 592 | + regulator-always-on; | |
| 593 | + }; | |
| 594 | + | |
| 595 | + sdcc1bam:dma@12402000 { | |
| 596 | + compatible = "qcom,bam-v1.3.0"; | |
| 597 | + reg = <0x12402000 0x8000>; | |
| 598 | + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; | |
| 599 | + clocks = <&gcc SDC1_H_CLK>; | |
| 600 | + clock-names = "bam_clk"; | |
| 601 | + #dma-cells = <1>; | |
| 602 | + qcom,ee = <0>; | |
| 603 | + }; | |
| 604 | + | |
| 605 | + sdcc3bam:dma@12182000 { | |
| 606 | + compatible = "qcom,bam-v1.3.0"; | |
| 607 | + reg = <0x12182000 0x8000>; | |
| 608 | + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; | |
| 609 | + clocks = <&gcc SDC3_H_CLK>; | |
| 610 | + clock-names = "bam_clk"; | |
| 611 | + #dma-cells = <1>; | |
| 612 | + qcom,ee = <0>; | |
| 613 | + }; | |
| 614 | + | |
| 615 | + amba { | |
| 616 | + compatible = "simple-bus"; | |
| 617 | + #address-cells = <1>; | |
| 618 | + #size-cells = <1>; | |
| 619 | + ranges; | |
| 620 | + | |
| 621 | + sdcc@12400000 { | |
| 622 | + status = "disabled"; | |
| 623 | + compatible = "arm,pl18x", "arm,primecell"; | |
| 624 | + arm,primecell-periphid = <0x00051180>; | |
| 625 | + reg = <0x12400000 0x2000>; | |
| 626 | + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | |
| 627 | + interrupt-names = "cmd_irq"; | |
| 628 | + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; | |
| 629 | + clock-names = "mclk", "apb_pclk"; | |
| 630 | + bus-width = <8>; | |
| 631 | + max-frequency = <96000000>; | |
| 632 | + non-removable; | |
| 633 | + cap-sd-highspeed; | |
| 634 | + cap-mmc-highspeed; | |
| 635 | + mmc-ddr-1_8v; | |
| 636 | + vmmc-supply = <&vsdcc_fixed>; | |
| 637 | + dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; | |
| 638 | + dma-names = "tx", "rx"; | |
| 639 | + }; | |
| 640 | + | |
| 641 | + sdcc@12180000 { | |
| 642 | + compatible = "arm,pl18x", "arm,primecell"; | |
| 643 | + arm,primecell-periphid = <0x00051180>; | |
| 644 | + status = "disabled"; | |
| 645 | + reg = <0x12180000 0x2000>; | |
| 646 | + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
| 647 | + interrupt-names = "cmd_irq"; | |
| 648 | + clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; | |
| 649 | + clock-names = "mclk", "apb_pclk"; | |
| 650 | + bus-width = <8>; | |
| 651 | + cap-sd-highspeed; | |
| 652 | + cap-mmc-highspeed; | |
| 653 | + max-frequency = <192000000>; | |
| 654 | + #mmc-ddr-1_8v; | |
| 655 | + sd-uhs-sdr104; | |
| 656 | + sd-uhs-ddr50; | |
| 657 | + vqmmc-supply = <&vsdcc_fixed>; | |
| 658 | + dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; | |
| 659 | + dma-names = "tx", "rx"; | |
| 660 | + }; | |
| 661 | + }; | |
| 376 | 662 | }; |
| 377 | 663 | }; |
| @@ -241,6 +241,33 @@ · 240 unmodified lines | ||
| 241 | 241 | bias-pull-up; |
| 242 | 242 | }; |
| 243 | 243 | }; |
| 244 | + | |
| 245 | + i2c3_pins: i2c3 { | |
| 246 | + mux { | |
| 247 | + pins = "gpio10", "gpio11"; | |
| 248 | + function = "blsp_i2c3"; | |
| 249 | + drive-strength = <2>; | |
| 250 | + bias-disable; | |
| 251 | + }; | |
| 252 | + }; | |
| 253 | + | |
| 254 | + i2c12_pins: i2c12 { | |
| 255 | + mux { | |
| 256 | + pins = "gpio87", "gpio88"; | |
| 257 | + function = "blsp_i2c12"; | |
| 258 | + drive-strength = <2>; | |
| 259 | + bias-disable; | |
| 260 | + }; | |
| 261 | + }; | |
| 262 | + | |
| 263 | + mpu6515_pin: mpu6515 { | |
| 264 | + irq { | |
| 265 | + pins = "gpio73"; | |
| 266 | + function = "gpio"; | |
| 267 | + bias-disable; | |
| 268 | + input-enable; | |
| 269 | + }; | |
| 270 | + }; | |
| 244 | 271 | }; |
| 245 | 272 | |
| 246 | 273 | sdhci@f9824900 { |
| @@ -277,6 +304,62 @@ · 30 unmodified lines | ||
| 277 | 304 | linux,code = <KEY_VOLUMEDOWN>; |
| 278 | 305 | }; |
| 279 | 306 | }; |
| 307 | + | |
| 308 | + i2c@f9968000 { | |
| 309 | + status = "ok"; | |
| 310 | + pinctrl-names = "default"; | |
| 311 | + pinctrl-0 = <&i2c12_pins>; | |
| 312 | + clock-frequency = <100000>; | |
| 313 | + qcom,src-freq = <50000000>; | |
| 314 | + | |
| 315 | + mpu6515@68 { | |
| 316 | + compatible = "invensense,mpu6515"; | |
| 317 | + reg = <0x68>; | |
| 318 | + interrupts-extended = <&msmgpio 73 IRQ_TYPE_EDGE_FALLING>; | |
| 319 | + vddio-supply = <&pm8941_lvs1>; | |
| 320 | + | |
| 321 | + pinctrl-names = "default"; | |
| 322 | + pinctrl-0 = <&mpu6515_pin>; | |
| 323 | + | |
| 324 | + i2c-gate { | |
| 325 | + #address-cells = <1>; | |
| 326 | + #size-cells = <0>; | |
| 327 | + ak8963@f { | |
| 328 | + compatible = "asahi-kasei,ak8963"; | |
| 329 | + reg = <0x0f>; | |
| 330 | + // Currently only works in polling mode. | |
| 331 | + // gpios = <&msmgpio 61 0>; | |
| 332 | + vid-supply = <&pm8941_lvs1>; | |
| 333 | + vdd-supply = <&pm8941_l17>; | |
| 334 | + }; | |
| 335 | + | |
| 336 | + bmp280@76 { | |
| 337 | + compatible = "bosch,bmp280"; | |
| 338 | + reg = <0x76>; | |
| 339 | + vdda-supply = <&pm8941_lvs1>; | |
| 340 | + vddd-supply = <&pm8941_l17>; | |
| 341 | + }; | |
| 342 | + }; | |
| 343 | + }; | |
| 344 | + }; | |
| 345 | + | |
| 346 | + i2c@f9925000 { | |
| 347 | + status = "ok"; | |
| 348 | + pinctrl-names = "default"; | |
| 349 | + pinctrl-0 = <&i2c3_pins>; | |
| 350 | + clock-frequency = <100000>; | |
| 351 | + qcom,src-freq = <50000000>; | |
| 352 | + | |
| 353 | + avago_apds993@39 { | |
| 354 | + compatible = "avago,apds9930"; | |
| 355 | + reg = <0x39>; | |
| 356 | + interrupts-extended = <&msmgpio 61 IRQ_TYPE_EDGE_FALLING>; | |
| 357 | + vdd-supply = <&pm8941_l17>; | |
| 358 | + vddio-supply = <&pm8941_lvs1>; | |
| 359 | + led-max-microamp = <100000>; | |
| 360 | + amstaos,proximity-diodes = <0>; | |
| 361 | + }; | |
| 362 | + }; | |
| 280 | 363 | }; |
| 281 | 364 | |
| 282 | 365 | &spmi_bus { |
| @@ -67,7 +67,7 @@ · 66 unmodified lines | ||
| 67 | 67 | cpus { |
| 68 | 68 | #address-cells = <1>; |
| 69 | 69 | #size-cells = <0>; |
| 70 | − interrupts = <1 9 0xf04>; | |
| 70 | + interrupts = <GIC_PPI 9 0xf04>; | |
| 71 | 71 | |
| 72 | 72 | CPU0: cpu@0 { |
| 73 | 73 | compatible = "qcom,krait"; |
| @@ -214,7 +214,7 @@ · 140 unmodified lines | ||
| 214 | 214 | |
| 215 | 215 | cpu-pmu { |
| 216 | 216 | compatible = "qcom,krait-pmu"; |
| 217 | − interrupts = <1 7 0xf04>; | |
| 217 | + interrupts = <GIC_PPI 7 0xf04>; | |
| 218 | 218 | }; |
| 219 | 219 | |
| 220 | 220 | clocks { |
| @@ -233,17 +233,17 @@ · 12 unmodified lines | ||
| 233 | 233 | |
| 234 | 234 | timer { |
| 235 | 235 | compatible = "arm,armv7-timer"; |
| 236 | − interrupts = <1 2 0xf08>, | |
| 237 | − <1 3 0xf08>, | |
| 238 | − <1 4 0xf08>, | |
| 239 | − <1 1 0xf08>; | |
| 236 | + interrupts = <GIC_PPI 2 0xf08>, | |
| 237 | + <GIC_PPI 3 0xf08>, | |
| 238 | + <GIC_PPI 4 0xf08>, | |
| 239 | + <GIC_PPI 1 0xf08>; | |
| 240 | 240 | clock-frequency = <19200000>; |
| 241 | 241 | }; |
| 242 | 242 | |
| 243 | 243 | adsp-pil { |
| 244 | 244 | compatible = "qcom,msm8974-adsp-pil"; |
| 245 | 245 | |
| 246 | − interrupts-extended = <&intc 0 162 IRQ_TYPE_EDGE_RISING>, | |
| 246 | + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, | |
| 247 | 247 | <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, |
| 248 | 248 | <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, |
| 249 | 249 | <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, |
| @@ -275,7 +275,7 @@ · 25 unmodified lines | ||
| 275 | 275 | qcom,smem = <443>, <429>; |
| 276 | 276 | |
| 277 | 277 | interrupt-parent = <&intc>; |
| 278 | − interrupts = <0 158 IRQ_TYPE_EDGE_RISING>; | |
| 278 | + interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; | |
| 279 | 279 | |
| 280 | 280 | qcom,ipc = <&apcs 8 10>; |
| 281 | 281 | |
| @@ -300,7 +300,7 @@ · 18 unmodified lines | ||
| 300 | 300 | qcom,smem = <435>, <428>; |
| 301 | 301 | |
| 302 | 302 | interrupt-parent = <&intc>; |
| 303 | − interrupts = <0 27 IRQ_TYPE_EDGE_RISING>; | |
| 303 | + interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>; | |
| 304 | 304 | |
| 305 | 305 | qcom,ipc = <&apcs 8 14>; |
| 306 | 306 | |
| @@ -325,7 +325,7 @@ · 18 unmodified lines | ||
| 325 | 325 | qcom,smem = <451>, <431>; |
| 326 | 326 | |
| 327 | 327 | interrupt-parent = <&intc>; |
| 328 | − interrupts = <0 143 IRQ_TYPE_EDGE_RISING>; | |
| 328 | + interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>; | |
| 329 | 329 | |
| 330 | 330 | qcom,ipc = <&apcs 8 18>; |
| 331 | 331 | |
| @@ -364,7 +364,7 @@ · 32 unmodified lines | ||
| 364 | 364 | |
| 365 | 365 | modem_smsm: modem@1 { |
| 366 | 366 | reg = <1>; |
| 367 | − interrupts = <0 26 IRQ_TYPE_EDGE_RISING>; | |
| 367 | + interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; | |
| 368 | 368 | |
| 369 | 369 | interrupt-controller; |
| 370 | 370 | #interrupt-cells = <2>; |
| @@ -372,7 +372,7 @@ · 1 unmodified line | ||
| 372 | 372 | |
| 373 | 373 | adsp_smsm: adsp@2 { |
| 374 | 374 | reg = <2>; |
| 375 | − interrupts = <0 157 IRQ_TYPE_EDGE_RISING>; | |
| 375 | + interrupts = <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>; | |
| 376 | 376 | |
| 377 | 377 | interrupt-controller; |
| 378 | 378 | #interrupt-cells = <2>; |
| @@ -380,7 +380,7 @@ · 1 unmodified line | ||
| 380 | 380 | |
| 381 | 381 | wcnss_smsm: wcnss@7 { |
| 382 | 382 | reg = <7>; |
| 383 | − interrupts = <0 144 IRQ_TYPE_EDGE_RISING>; | |
| 383 | + interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; | |
| 384 | 384 | |
| 385 | 385 | interrupt-controller; |
| 386 | 386 | #interrupt-cells = <2>; |
| @@ -445,50 +445,50 @@ · 58 unmodified lines | ||
| 445 | 445 | |
| 446 | 446 | frame@f9021000 { |
| 447 | 447 | frame-number = <0>; |
| 448 | − interrupts = <0 8 0x4>, | |
| 449 | − <0 7 0x4>; | |
| 448 | + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, | |
| 449 | + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 450 | 450 | reg = <0xf9021000 0x1000>, |
| 451 | 451 | <0xf9022000 0x1000>; |
| 452 | 452 | }; |
| 453 | 453 | |
| 454 | 454 | frame@f9023000 { |
| 455 | 455 | frame-number = <1>; |
| 456 | − interrupts = <0 9 0x4>; | |
| 456 | + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
| 457 | 457 | reg = <0xf9023000 0x1000>; |
| 458 | 458 | status = "disabled"; |
| 459 | 459 | }; |
| 460 | 460 | |
| 461 | 461 | frame@f9024000 { |
| 462 | 462 | frame-number = <2>; |
| 463 | − interrupts = <0 10 0x4>; | |
| 463 | + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
| 464 | 464 | reg = <0xf9024000 0x1000>; |
| 465 | 465 | status = "disabled"; |
| 466 | 466 | }; |
| 467 | 467 | |
| 468 | 468 | frame@f9025000 { |
| 469 | 469 | frame-number = <3>; |
| 470 | − interrupts = <0 11 0x4>; | |
| 470 | + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
| 471 | 471 | reg = <0xf9025000 0x1000>; |
| 472 | 472 | status = "disabled"; |
| 473 | 473 | }; |
| 474 | 474 | |
| 475 | 475 | frame@f9026000 { |
| 476 | 476 | frame-number = <4>; |
| 477 | − interrupts = <0 12 0x4>; | |
| 477 | + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | |
| 478 | 478 | reg = <0xf9026000 0x1000>; |
| 479 | 479 | status = "disabled"; |
| 480 | 480 | }; |
| 481 | 481 | |
| 482 | 482 | frame@f9027000 { |
| 483 | 483 | frame-number = <5>; |
| 484 | − interrupts = <0 13 0x4>; | |
| 484 | + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
| 485 | 485 | reg = <0xf9027000 0x1000>; |
| 486 | 486 | status = "disabled"; |
| 487 | 487 | }; |
| 488 | 488 | |
| 489 | 489 | frame@f9028000 { |
| 490 | 490 | frame-number = <6>; |
| 491 | − interrupts = <0 14 0x4>; | |
| 491 | + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
| 492 | 492 | reg = <0xf9028000 0x1000>; |
| 493 | 493 | status = "disabled"; |
| 494 | 494 | }; |
| @@ -586,7 +586,7 @@ · 91 unmodified lines | ||
| 586 | 586 | blsp1_uart1: serial@f991d000 { |
| 587 | 587 | compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; |
| 588 | 588 | reg = <0xf991d000 0x1000>; |
| 589 | − interrupts = <0 107 0x0>; | |
| 589 | + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
| 590 | 590 | clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; |
| 591 | 591 | clock-names = "core", "iface"; |
| 592 | 592 | status = "disabled"; |
| @@ -595,7 +595,7 @@ · 2 unmodified lines | ||
| 595 | 595 | blsp1_uart2: serial@f991e000 { |
| 596 | 596 | compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; |
| 597 | 597 | reg = <0xf991e000 0x1000>; |
| 598 | − interrupts = <0 108 0x0>; | |
| 598 | + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 599 | 599 | clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; |
| 600 | 600 | clock-names = "core", "iface"; |
| 601 | 601 | status = "disabled"; |
| @@ -605,7 +605,8 @@ · 3 unmodified lines | ||
| 605 | 605 | compatible = "qcom,sdhci-msm-v4"; |
| 606 | 606 | reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; |
| 607 | 607 | reg-names = "hc_mem", "core_mem"; |
| 608 | − interrupts = <0 123 0>, <0 138 0>; | |
| 608 | + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, | |
| 609 | + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; | |
| 609 | 610 | interrupt-names = "hc_irq", "pwr_irq"; |
| 610 | 611 | clocks = <&gcc GCC_SDCC1_APPS_CLK>, |
| 611 | 612 | <&gcc GCC_SDCC1_AHB_CLK>, |
| @@ -618,8 +619,8 @@ · 6 unmodified lines | ||
| 618 | 619 | compatible = "qcom,sdhci-msm-v4"; |
| 619 | 620 | reg = <0xf9864900 0x11c>, <0xf9864000 0x800>; |
| 620 | 621 | reg-names = "hc_mem", "core_mem"; |
| 621 | − interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>, | |
| 622 | − <GIC_SPI 224 IRQ_TYPE_NONE>; | |
| 622 | + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, | |
| 623 | + <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; | |
| 623 | 624 | interrupt-names = "hc_irq", "pwr_irq"; |
| 624 | 625 | clocks = <&gcc GCC_SDCC3_APPS_CLK>, |
| 625 | 626 | <&gcc GCC_SDCC3_AHB_CLK>, |
| @@ -632,7 +633,8 @@ · 6 unmodified lines | ||
| 632 | 633 | compatible = "qcom,sdhci-msm-v4"; |
| 633 | 634 | reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; |
| 634 | 635 | reg-names = "hc_mem", "core_mem"; |
| 635 | − interrupts = <0 125 0>, <0 221 0>; | |
| 636 | + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, | |
| 637 | + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; | |
| 636 | 638 | interrupt-names = "hc_irq", "pwr_irq"; |
| 637 | 639 | clocks = <&gcc GCC_SDCC2_APPS_CLK>, |
| 638 | 640 | <&gcc GCC_SDCC2_AHB_CLK>, |
| @@ -699,25 +701,36 @@ · 60 unmodified lines | ||
| 699 | 701 | #gpio-cells = <2>; |
| 700 | 702 | interrupt-controller; |
| 701 | 703 | #interrupt-cells = <2>; |
| 702 | − interrupts = <0 208 0>; | |
| 704 | + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; | |
| 703 | 705 | }; |
| 704 | 706 | |
| 705 | 707 | i2c@f9924000 { |
| 706 | 708 | status = "disabled"; |
| 707 | 709 | compatible = "qcom,i2c-qup-v2.1.1"; |
| 708 | 710 | reg = <0xf9924000 0x1000>; |
| 709 | − interrupts = <0 96 IRQ_TYPE_NONE>; | |
| 711 | + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; | |
| 710 | 712 | clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; |
| 711 | 713 | clock-names = "core", "iface"; |
| 712 | 714 | #address-cells = <1>; |
| 713 | 715 | #size-cells = <0>; |
| 714 | 716 | }; |
| 715 | 717 | |
| 718 | + blsp_i2c3: i2c@f9925000 { | |
| 719 | + status = "disabled"; | |
| 720 | + compatible = "qcom,i2c-qup-v2.1.1"; | |
| 721 | + reg = <0xf9925000 0x1000>; | |
| 722 | + interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; | |
| 723 | + clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; | |
| 724 | + clock-names = "core", "iface"; | |
| 725 | + #address-cells = <1>; | |
| 726 | + #size-cells = <0>; | |
| 727 | + }; | |
| 728 | + | |
| 716 | 729 | blsp_i2c8: i2c@f9964000 { |
| 717 | 730 | status = "disabled"; |
| 718 | 731 | compatible = "qcom,i2c-qup-v2.1.1"; |
| 719 | 732 | reg = <0xf9964000 0x1000>; |
| 720 | − interrupts = <0 102 IRQ_TYPE_NONE>; | |
| 733 | + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
| 721 | 734 | clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; |
| 722 | 735 | clock-names = "core", "iface"; |
| 723 | 736 | #address-cells = <1>; |
| @@ -728,7 +741,7 @@ · 4 unmodified lines | ||
| 728 | 741 | status = "disabled"; |
| 729 | 742 | compatible = "qcom,i2c-qup-v2.1.1"; |
| 730 | 743 | reg = <0xf9967000 0x1000>; |
| 731 | − interrupts = <0 105 IRQ_TYPE_NONE>; | |
| 744 | + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
| 732 | 745 | clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; |
| 733 | 746 | clock-names = "core", "iface"; |
| 734 | 747 | #address-cells = <1>; |
| @@ -737,6 +750,17 @@ · 2 unmodified lines | ||
| 737 | 750 | dma-names = "tx", "rx"; |
| 738 | 751 | }; |
| 739 | 752 | |
| 753 | + blsp_i2c12: i2c@f9968000 { | |
| 754 | + status = "disabled"; | |
| 755 | + compatible = "qcom,i2c-qup-v2.1.1"; | |
| 756 | + reg = <0xf9968000 0x1000>; | |
| 757 | + interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; | |
| 758 | + clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; | |
| 759 | + clock-names = "core", "iface"; | |
| 760 | + #address-cells = <1>; | |
| 761 | + #size-cells = <0>; | |
| 762 | + }; | |
| 763 | + | |
| 740 | 764 | spmi_bus: spmi@fc4cf000 { |
| 741 | 765 | compatible = "qcom,spmi-pmic-arb"; |
| 742 | 766 | reg-names = "core", "intr", "cnfg"; |
| @@ -744,7 +768,7 @@ · 1 unmodified line | ||
| 744 | 768 | <0xfc4cb000 0x1000>, |
| 745 | 769 | <0xfc4ca000 0x1000>; |
| 746 | 770 | interrupt-names = "periph_irq"; |
| 747 | − interrupts = <0 190 0>; | |
| 771 | + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; | |
| 748 | 772 | qcom,ee = <0>; |
| 749 | 773 | qcom,channel = <0>; |
| 750 | 774 | #address-cells = <2>; |
| @@ -770,10 +794,11 @@ · 19 unmodified lines | ||
| 770 | 794 | clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; |
| 771 | 795 | clock-names = "apb_pclk", "atclk"; |
| 772 | 796 | |
| 773 | − port { | |
| 774 | − etr_in: endpoint { | |
| 775 | − slave-mode; | |
| 776 | − remote-endpoint = <&replicator_out0>; | |
| 797 | + in-ports { | |
| 798 | + port { | |
| 799 | + etr_in: endpoint { | |
| 800 | + remote-endpoint = <&replicator_out0>; | |
| 801 | + }; | |
| 777 | 802 | }; |
| 778 | 803 | }; |
| 779 | 804 | }; |
| @@ -785,10 +810,11 @@ · 5 unmodified lines | ||
| 785 | 810 | clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; |
| 786 | 811 | clock-names = "apb_pclk", "atclk"; |
| 787 | 812 | |
| 788 | − port { | |
| 789 | − tpiu_in: endpoint { | |
| 790 | − slave-mode; | |
| 791 | − remote-endpoint = <&replicator_out1>; | |
| 813 | + in-ports { | |
| 814 | + port { | |
| 815 | + tpiu_in: endpoint { | |
| 816 | + remote-endpoint = <&replicator_out1>; | |
| 817 | + }; | |
| 792 | 818 | }; |
| 793 | 819 | }; |
| 794 | 820 | }; |
| @@ -800,7 +826,7 @@ · 5 unmodified lines | ||
| 800 | 826 | clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; |
| 801 | 827 | clock-names = "apb_pclk", "atclk"; |
| 802 | 828 | |
| 803 | − ports { | |
| 829 | + out-ports { | |
| 804 | 830 | #address-cells = <1>; |
| 805 | 831 | #size-cells = <0>; |
| 806 | 832 | |
| @@ -816,10 +842,11 @@ · 9 unmodified lines | ||
| 816 | 842 | remote-endpoint = <&tpiu_in>; |
| 817 | 843 | }; |
| 818 | 844 | }; |
| 819 | − port@2 { | |
| 820 | − reg = <0>; | |
| 845 | + }; | |
| 846 | + | |
| 847 | + in-ports { | |
| 848 | + port { | |
| 821 | 849 | replicator_in: endpoint { |
| 822 | − slave-mode; | |
| 823 | 850 | remote-endpoint = <&etf_out>; |
| 824 | 851 | }; |
| 825 | 852 | }; |
| @@ -833,20 +860,17 @@ · 7 unmodified lines | ||
| 833 | 860 | clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; |
| 834 | 861 | clock-names = "apb_pclk", "atclk"; |
| 835 | 862 | |
| 836 | − ports { | |
| 837 | − #address-cells = <1>; | |
| 838 | − #size-cells = <0>; | |
| 839 | − | |
| 840 | − port@0 { | |
| 841 | − reg = <0>; | |
| 863 | + out-ports { | |
| 864 | + port { | |
| 842 | 865 | etf_out: endpoint { |
| 843 | 866 | remote-endpoint = <&replicator_in>; |
| 844 | 867 | }; |
| 845 | 868 | }; |
| 846 | − port@1 { | |
| 847 | − reg = <0>; | |
| 869 | + }; | |
| 870 | + | |
| 871 | + in-ports { | |
| 872 | + port { | |
| 848 | 873 | etf_in: endpoint { |
| 849 | − slave-mode; | |
| 850 | 874 | remote-endpoint = <&merger_out>; |
| 851 | 875 | }; |
| 852 | 876 | }; |
| @@ -860,7 +884,7 @@ · 7 unmodified lines | ||
| 860 | 884 | clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; |
| 861 | 885 | clock-names = "apb_pclk", "atclk"; |
| 862 | 886 | |
| 863 | − ports { | |
| 887 | + in-ports { | |
| 864 | 888 | #address-cells = <1>; |
| 865 | 889 | #size-cells = <0>; |
| 866 | 890 | |
| @@ -873,12 +897,13 @@ · 6 unmodified lines | ||
| 873 | 897 | port@1 { |
| 874 | 898 | reg = <1>; |
| 875 | 899 | merger_in1: endpoint { |
| 876 | − slave-mode; | |
| 877 | 900 | remote-endpoint = <&funnel1_out>; |
| 878 | 901 | }; |
| 879 | 902 | }; |
| 880 | − port@8 { | |
| 881 | − reg = <0>; | |
| 903 | + }; | |
| 904 | + | |
| 905 | + out-ports { | |
| 906 | + port { | |
| 882 | 907 | merger_out: endpoint { |
| 883 | 908 | remote-endpoint = <&etf_in>; |
| 884 | 909 | }; |
| @@ -893,7 +918,7 @@ · 8 unmodified lines | ||
| 893 | 918 | clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; |
| 894 | 919 | clock-names = "apb_pclk", "atclk"; |
| 895 | 920 | |
| 896 | − ports { | |
| 921 | + in-ports { | |
| 897 | 922 | #address-cells = <1>; |
| 898 | 923 | #size-cells = <0>; |
| 899 | 924 | |
| @@ -910,12 +935,13 @@ · 10 unmodified lines | ||
| 910 | 935 | port@5 { |
| 911 | 936 | reg = <5>; |
| 912 | 937 | funnel1_in5: endpoint { |
| 913 | − slave-mode; | |
| 914 | 938 | remote-endpoint = <&kpss_out>; |
| 915 | 939 | }; |
| 916 | 940 | }; |
| 917 | − port@8 { | |
| 918 | − reg = <0>; | |
| 941 | + }; | |
| 942 | + | |
| 943 | + out-ports { | |
| 944 | + port { | |
| 919 | 945 | funnel1_out: endpoint { |
| 920 | 946 | remote-endpoint = <&merger_in1>; |
| 921 | 947 | }; |
| @@ -930,40 +956,38 @@ · 8 unmodified lines | ||
| 930 | 956 | clocks = <&rpmcc RPM_SMD_QDSS_CLK>, <&rpmcc RPM_SMD_QDSS_A_CLK>; |
| 931 | 957 | clock-names = "apb_pclk", "atclk"; |
| 932 | 958 | |
| 933 | − ports { | |
| 959 | + in-ports { | |
| 934 | 960 | #address-cells = <1>; |
| 935 | 961 | #size-cells = <0>; |
| 936 | 962 | |
| 937 | 963 | port@0 { |
| 938 | 964 | reg = <0>; |
| 939 | 965 | kpss_in0: endpoint { |
| 940 | − slave-mode; | |
| 941 | 966 | remote-endpoint = <&etm0_out>; |
| 942 | 967 | }; |
| 943 | 968 | }; |
| 944 | 969 | port@1 { |
| 945 | 970 | reg = <1>; |
| 946 | 971 | kpss_in1: endpoint { |
| 947 | − slave-mode; | |
| 948 | 972 | remote-endpoint = <&etm1_out>; |
| 949 | 973 | }; |
| 950 | 974 | }; |
| 951 | 975 | port@2 { |
| 952 | 976 | reg = <2>; |
| 953 | 977 | kpss_in2: endpoint { |
| 954 | − slave-mode; | |
| 955 | 978 | remote-endpoint = <&etm2_out>; |
| 956 | 979 | }; |
| 957 | 980 | }; |
| 958 | 981 | port@3 { |
| 959 | 982 | reg = <3>; |
| 960 | 983 | kpss_in3: endpoint { |
| 961 | − slave-mode; | |
| 962 | 984 | remote-endpoint = <&etm3_out>; |
| 963 | 985 | }; |
| 964 | 986 | }; |
| 965 | − port@8 { | |
| 966 | − reg = <0>; | |
| 987 | + }; | |
| 988 | + | |
| 989 | + out-ports { | |
| 990 | + port { | |
| 967 | 991 | kpss_out: endpoint { |
| 968 | 992 | remote-endpoint = <&funnel1_in5>; |
| 969 | 993 | }; |
| @@ -980,9 +1004,11 @@ · 10 unmodified lines | ||
| 980 | 1004 | |
| 981 | 1005 | cpu = <&CPU0>; |
| 982 | 1006 | |
| 983 | − port { | |
| 984 | − etm0_out: endpoint { | |
| 985 | − remote-endpoint = <&kpss_in0>; | |
| 1007 | + out-ports { | |
| 1008 | + port { | |
| 1009 | + etm0_out: endpoint { | |
| 1010 | + remote-endpoint = <&kpss_in0>; | |
| 1011 | + }; | |
| 986 | 1012 | }; |
| 987 | 1013 | }; |
| 988 | 1014 | }; |
| @@ -996,9 +1022,11 @@ · 7 unmodified lines | ||
| 996 | 1022 | |
| 997 | 1023 | cpu = <&CPU1>; |
| 998 | 1024 | |
| 999 | − port { | |
| 1000 | − etm1_out: endpoint { | |
| 1001 | − remote-endpoint = <&kpss_in1>; | |
| 1025 | + out-ports { | |
| 1026 | + port { | |
| 1027 | + etm1_out: endpoint { | |
| 1028 | + remote-endpoint = <&kpss_in1>; | |
| 1029 | + }; | |
| 1002 | 1030 | }; |
| 1003 | 1031 | }; |
| 1004 | 1032 | }; |
| @@ -1012,9 +1040,11 @@ · 7 unmodified lines | ||
| 1012 | 1040 | |
| 1013 | 1041 | cpu = <&CPU2>; |
| 1014 | 1042 | |
| 1015 | − port { | |
| 1016 | − etm2_out: endpoint { | |
| 1017 | − remote-endpoint = <&kpss_in2>; | |
| 1043 | + out-ports { | |
| 1044 | + port { | |
| 1045 | + etm2_out: endpoint { | |
| 1046 | + remote-endpoint = <&kpss_in2>; | |
| 1047 | + }; | |
| 1018 | 1048 | }; |
| 1019 | 1049 | }; |
| 1020 | 1050 | }; |
| @@ -1028,9 +1058,11 @@ · 7 unmodified lines | ||
| 1028 | 1058 | |
| 1029 | 1059 | cpu = <&CPU3>; |
| 1030 | 1060 | |
| 1031 | − port { | |
| 1032 | − etm3_out: endpoint { | |
| 1033 | − remote-endpoint = <&kpss_in3>; | |
| 1061 | + out-ports { | |
| 1062 | + port { | |
| 1063 | + etm3_out: endpoint { | |
| 1064 | + remote-endpoint = <&kpss_in3>; | |
| 1065 | + }; | |
| 1034 | 1066 | }; |
| 1035 | 1067 | }; |
| 1036 | 1068 | }; |
| @@ -1040,21 +1072,21 @@ · 3 unmodified lines | ||
| 1040 | 1072 | compatible = "qcom,smd"; |
| 1041 | 1073 | |
| 1042 | 1074 | adsp { |
| 1043 | − interrupts = <0 156 IRQ_TYPE_EDGE_RISING>; | |
| 1075 | + interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; | |
| 1044 | 1076 | |
| 1045 | 1077 | qcom,ipc = <&apcs 8 8>; |
| 1046 | 1078 | qcom,smd-edge = <1>; |
| 1047 | 1079 | }; |
| 1048 | 1080 | |
| 1049 | 1081 | modem { |
| 1050 | − interrupts = <0 25 IRQ_TYPE_EDGE_RISING>; | |
| 1082 | + interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; | |
| 1051 | 1083 | |
| 1052 | 1084 | qcom,ipc = <&apcs 8 12>; |
| 1053 | 1085 | qcom,smd-edge = <0>; |
| 1054 | 1086 | }; |
| 1055 | 1087 | |
| 1056 | 1088 | rpm { |
| 1057 | − interrupts = <0 168 1>; | |
| 1089 | + interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; | |
| 1058 | 1090 | qcom,ipc = <&apcs 8 0>; |
| 1059 | 1091 | qcom,smd-edge = <15>; |
| 1060 | 1092 | |
| @@ -14,3 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | model = "iW-RainboW-G20D-Q7 RZ/G1M based plus camera daughter board"; |
| 15 | 15 | compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"; |
| 16 | 16 | }; |
| 17 | + | |
| 18 | +&pciec { | |
| 19 | + status = "okay"; | |
| 20 | +}; | |
| @@ -13,3 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | model = "iWave Systems RainboW-G20D-Qseven board based on RZ/G1M"; |
| 14 | 14 | compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"; |
| 15 | 15 | }; |
| 16 | + | |
| 17 | +&pciec { | |
| 18 | + status = "okay"; | |
| 19 | +}; | |
| @@ -35,6 +35,8 @@ · 34 unmodified lines | ||
| 35 | 35 | |
| 36 | 36 | phy3: ethernet-phy@3 { |
| 37 | 37 | reg = <3>; |
| 38 | + interrupt-parent = <&gpio5>; | |
| 39 | + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; | |
| 38 | 40 | micrel,led-mode = <1>; |
| 39 | 41 | }; |
| 40 | 42 | }; |
| @@ -43,6 +45,16 @@ · 2 unmodified lines | ||
| 43 | 45 | clock-frequency = <20000000>; |
| 44 | 46 | }; |
| 45 | 47 | |
| 48 | +&pfc { | |
| 49 | + scif1_pins: scif1 { | |
| 50 | + groups = "scif1_data_b"; | |
| 51 | + function = "scif1"; | |
| 52 | + }; | |
| 53 | +}; | |
| 54 | + | |
| 46 | 55 | &scif1 { |
| 56 | + pinctrl-0 = <&scif1_pins>; | |
| 57 | + pinctrl-names = "default"; | |
| 58 | + | |
| 47 | 59 | status = "okay"; |
| 48 | 60 | }; |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <dt-bindings/interrupt-controller/irq.h> |
| 9 | 9 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 10 | 10 | #include <dt-bindings/clock/r8a77470-cpg-mssr.h> |
| 11 | +#include <dt-bindings/power/r8a77470-sysc.h> | |
| 11 | 12 | / { |
| 12 | 13 | compatible = "renesas,r8a77470"; |
| 13 | 14 | #address-cells = <2>; |
| @@ -16,6 +17,7 @@ · 2 unmodified lines | ||
| 16 | 17 | cpus { |
| 17 | 18 | #address-cells = <1>; |
| 18 | 19 | #size-cells = <0>; |
| 20 | + enable-method = "renesas,apmu"; | |
| 19 | 21 | |
| 20 | 22 | cpu0: cpu@0 { |
| 21 | 23 | device_type = "cpu"; |
| @@ -23,16 +25,25 @@ · 1 unmodified line | ||
| 23 | 25 | reg = <0>; |
| 24 | 26 | clock-frequency = <1000000000>; |
| 25 | 27 | clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; |
| 26 | − power-domains = <&sysc 5>; | |
| 28 | + power-domains = <&sysc R8A77470_PD_CA7_CPU0>; | |
| 27 | 29 | next-level-cache = <&L2_CA7>; |
| 28 | 30 | }; |
| 29 | 31 | |
| 32 | + cpu1: cpu@1 { | |
| 33 | + device_type = "cpu"; | |
| 34 | + compatible = "arm,cortex-a7"; | |
| 35 | + reg = <1>; | |
| 36 | + clock-frequency = <1000000000>; | |
| 37 | + clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; | |
| 38 | + power-domains = <&sysc R8A77470_PD_CA7_CPU1>; | |
| 39 | + next-level-cache = <&L2_CA7>; | |
| 40 | + }; | |
| 30 | 41 | |
| 31 | 42 | L2_CA7: cache-controller-0 { |
| 32 | 43 | compatible = "cache"; |
| 33 | 44 | cache-unified; |
| 34 | 45 | cache-level = <2>; |
| 35 | − power-domains = <&sysc 21>; | |
| 46 | + power-domains = <&sysc R8A77470_PD_CA7_SCU>; | |
| 36 | 47 | }; |
| 37 | 48 | }; |
| 38 | 49 | |
| @@ -60,6 +71,102 @@ · 21 unmodified lines | ||
| 60 | 71 | #size-cells = <2>; |
| 61 | 72 | ranges; |
| 62 | 73 | |
| 74 | + gpio0: gpio@e6050000 { | |
| 75 | + compatible = "renesas,gpio-r8a77470", | |
| 76 | + "renesas,rcar-gen2-gpio"; | |
| 77 | + reg = <0 0xe6050000 0 0x50>; | |
| 78 | + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
| 79 | + #gpio-cells = <2>; | |
| 80 | + gpio-controller; | |
| 81 | + gpio-ranges = <&pfc 0 0 23>; | |
| 82 | + #interrupt-cells = <2>; | |
| 83 | + interrupt-controller; | |
| 84 | + clocks = <&cpg CPG_MOD 912>; | |
| 85 | + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | |
| 86 | + resets = <&cpg 912>; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + gpio1: gpio@e6051000 { | |
| 90 | + compatible = "renesas,gpio-r8a77470", | |
| 91 | + "renesas,rcar-gen2-gpio"; | |
| 92 | + reg = <0 0xe6051000 0 0x50>; | |
| 93 | + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
| 94 | + #gpio-cells = <2>; | |
| 95 | + gpio-controller; | |
| 96 | + gpio-ranges = <&pfc 0 32 23>; | |
| 97 | + #interrupt-cells = <2>; | |
| 98 | + interrupt-controller; | |
| 99 | + clocks = <&cpg CPG_MOD 911>; | |
| 100 | + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | |
| 101 | + resets = <&cpg 911>; | |
| 102 | + }; | |
| 103 | + | |
| 104 | + gpio2: gpio@e6052000 { | |
| 105 | + compatible = "renesas,gpio-r8a77470", | |
| 106 | + "renesas,rcar-gen2-gpio"; | |
| 107 | + reg = <0 0xe6052000 0 0x50>; | |
| 108 | + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
| 109 | + #gpio-cells = <2>; | |
| 110 | + gpio-controller; | |
| 111 | + gpio-ranges = <&pfc 0 64 32>; | |
| 112 | + #interrupt-cells = <2>; | |
| 113 | + interrupt-controller; | |
| 114 | + clocks = <&cpg CPG_MOD 910>; | |
| 115 | + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | |
| 116 | + resets = <&cpg 910>; | |
| 117 | + }; | |
| 118 | + | |
| 119 | + gpio3: gpio@e6053000 { | |
| 120 | + compatible = "renesas,gpio-r8a77470", | |
| 121 | + "renesas,rcar-gen2-gpio"; | |
| 122 | + reg = <0 0xe6053000 0 0x50>; | |
| 123 | + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 124 | + #gpio-cells = <2>; | |
| 125 | + gpio-controller; | |
| 126 | + gpio-ranges = <&pfc 0 96 30>; | |
| 127 | + gpio-reserved-ranges = <17 10>; | |
| 128 | + #interrupt-cells = <2>; | |
| 129 | + interrupt-controller; | |
| 130 | + clocks = <&cpg CPG_MOD 909>; | |
| 131 | + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | |
| 132 | + resets = <&cpg 909>; | |
| 133 | + }; | |
| 134 | + | |
| 135 | + gpio4: gpio@e6054000 { | |
| 136 | + compatible = "renesas,gpio-r8a77470", | |
| 137 | + "renesas,rcar-gen2-gpio"; | |
| 138 | + reg = <0 0xe6054000 0 0x50>; | |
| 139 | + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
| 140 | + #gpio-cells = <2>; | |
| 141 | + gpio-controller; | |
| 142 | + gpio-ranges = <&pfc 0 128 26>; | |
| 143 | + #interrupt-cells = <2>; | |
| 144 | + interrupt-controller; | |
| 145 | + clocks = <&cpg CPG_MOD 908>; | |
| 146 | + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; | |
| 147 | + resets = <&cpg 908>; | |
| 148 | + }; | |
| 149 | + | |
| 150 | + gpio5: gpio@e6055000 { | |
| 151 | + compatible = "renesas,gpio-r8a77470", | |
| 152 | + "renesas,rcar-gen2-gpio"; | |
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 17 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 11 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 59 lines aren’t shown here.
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This diff is large: its 13 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 12 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 39 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
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This diff is large: its 11 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 18 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 18 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
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This diff is large: its 23 lines aren’t shown here.
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This diff is large: its 13 lines aren’t shown here.
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This diff is large: its 54 lines aren’t shown here.
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This diff is large: its 17 lines aren’t shown here.
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This diff is large: its 13 lines aren’t shown here.
This diff is large: its 22 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 18 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 26 lines aren’t shown here.
This diff is large: its 68 lines aren’t shown here.
This diff is large: its 26 lines aren’t shown here.
This diff is large: its 94 lines aren’t shown here.
This diff is large: its 36 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 29 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 61 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
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This diff is large: its 391 lines aren’t shown here.
This diff is large: its 12 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 17 lines aren’t shown here.
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This diff is large: its 60 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
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This diff is large: its 19 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 45 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
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This diff is large: its 8 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
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This diff is large: its 9 lines aren’t shown here.
This diff is large: its 28 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 7 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 35 lines aren’t shown here.
This diff is large: its 295 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 27 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 47 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 14 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 22 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 50 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 68 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 89 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 242 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 67 lines aren’t shown here.
This diff is large: its 32 lines aren’t shown here.
This diff is large: its 83 lines aren’t shown here.
This diff is large: its 114 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 495 lines aren’t shown here.
This diff is large: its 172 lines aren’t shown here.
This diff is large: its 310 lines aren’t shown here.
This diff is large: its 157 lines aren’t shown here.
This diff is large: its 110 lines aren’t shown here.
This diff is large: its 44 lines aren’t shown here.
This diff is large: its 58 lines aren’t shown here.
This diff is large: its 172 lines aren’t shown here.
This diff is large: its 129 lines aren’t shown here.
This diff is large: its 106 lines aren’t shown here.
This diff is large: its 234 lines aren’t shown here.
This diff is large: its 38 lines aren’t shown here.
This diff is large: its 120 lines aren’t shown here.
This diff is large: its 43 lines aren’t shown here.
This diff is large: its 52 lines aren’t shown here.
This diff is large: its 50 lines aren’t shown here.
This diff is large: its 126 lines aren’t shown here.
This diff is large: its 56 lines aren’t shown here.
This diff is large: its 962 lines aren’t shown here.
This diff is large: its 92 lines aren’t shown here.
This diff is large: its 176 lines aren’t shown here.
This diff is large: its 337 lines aren’t shown here.
This diff is large: its 265 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 58 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 96 lines aren’t shown here.
This diff is large: its 39 lines aren’t shown here.
This diff is large: its 31 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 31 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 42 lines aren’t shown here.
This diff is large: its 76 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 25 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 29 lines aren’t shown here.
This diff is large: its 102 lines aren’t shown here.
This diff is large: its 25 lines aren’t shown here.
This diff is large: its 14 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 1017 lines aren’t shown here.
This diff is large: its 12 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 75 lines aren’t shown here.
This diff is large: its 14 lines aren’t shown here.
This diff is large: its 48 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 226 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 12 lines aren’t shown here.
This diff is large: its 61 lines aren’t shown here.
This diff is large: its 525 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 274 lines aren’t shown here.
This diff is large: its 42 lines aren’t shown here.
This diff is large: its 705 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 427 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 104 lines aren’t shown here.
This diff is large: its 30 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 68 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 1746 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 245 lines aren’t shown here.
This diff is large: its 45 lines aren’t shown here.
This diff is large: its 127 lines aren’t shown here.
This diff is large: its 41 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 213 lines aren’t shown here.
This diff is large: its 103 lines aren’t shown here.
This diff is large: its 207 lines aren’t shown here.
This diff is large: its 201 lines aren’t shown here.
This diff is large: its 2745 lines aren’t shown here.
This diff is large: its 2481 lines aren’t shown here.
This diff is large: its 484 lines aren’t shown here.
This diff is large: its 97 lines aren’t shown here.
This diff is large: its 88 lines aren’t shown here.
This diff is large: its 398 lines aren’t shown here.
This diff is large: its 46 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 48 lines aren’t shown here.
This diff is large: its 44 lines aren’t shown here.
This diff is large: its 38 lines aren’t shown here.
This diff is large: its 24 lines aren’t shown here.
This diff is large: its 24 lines aren’t shown here.
This diff is large: its 24 lines aren’t shown here.
This diff is large: its 26 lines aren’t shown here.
This diff is large: its 26 lines aren’t shown here.
This diff is large: its 25 lines aren’t shown here.
This diff is large: its 24 lines aren’t shown here.
This diff is large: its 218 lines aren’t shown here.
This diff is large: its 52 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 324 lines aren’t shown here.
This diff is large: its 287 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 116 lines aren’t shown here.
This diff is large: its 116 lines aren’t shown here.
This diff is large: its 114 lines aren’t shown here.
This diff is large: its 146 lines aren’t shown here.
This diff is large: its 76 lines aren’t shown here.
This diff is large: its 59 lines aren’t shown here.
This diff is large: its 56 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 14 lines aren’t shown here.
This diff is large: its 95 lines aren’t shown here.
This diff is large: its 63 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 374 lines aren’t shown here.
This diff is large: its 104 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 48 lines aren’t shown here.
This diff is large: its 27 lines aren’t shown here.
This diff is large: its 27 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 310 lines aren’t shown here.
This diff is large: its 70 lines aren’t shown here.
This diff is large: its 120 lines aren’t shown here.
This diff is large: its 82 lines aren’t shown here.
This diff is large: its 71 lines aren’t shown here.
This diff is large: its 71 lines aren’t shown here.
This diff is large: its 71 lines aren’t shown here.
This diff is large: its 94 lines aren’t shown here.
This diff is large: its 69 lines aren’t shown here.
This diff is large: its 56 lines aren’t shown here.
This diff is large: its 33 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 62 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 91 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 32 lines aren’t shown here.
This diff is large: its 66 lines aren’t shown here.
This diff is large: its 14 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 14 lines aren’t shown here.
This diff is large: its 44 lines aren’t shown here.
This diff is large: its 20 lines aren’t shown here.
This diff is large: its 55 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 34 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 65 lines aren’t shown here.
This diff is large: its 219 lines aren’t shown here.
This diff is large: its 310 lines aren’t shown here.
This diff is large: its 226 lines aren’t shown here.
This diff is large: its 322 lines aren’t shown here.
This diff is large: its 824 lines aren’t shown here.
This diff is large: its 779 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 119 lines aren’t shown here.
This diff is large: its 144 lines aren’t shown here.
This diff is large: its 42 lines aren’t shown here.
This diff is large: its 49 lines aren’t shown here.
This diff is large: its 65 lines aren’t shown here.
This diff is large: its 67 lines aren’t shown here.
This diff is large: its 131 lines aren’t shown here.
This diff is large: its 32 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 33 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 58 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 5 lines aren’t shown here.
This diff is large: its 145 lines aren’t shown here.
This diff is large: its 142 lines aren’t shown here.
This diff is large: its 69 lines aren’t shown here.
This diff is large: its 717 lines aren’t shown here.
This diff is large: its 218 lines aren’t shown here.
This diff is large: its 336 lines aren’t shown here.
This diff is large: its 22 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 101 lines aren’t shown here.
This diff is large: its 44 lines aren’t shown here.
This diff is large: its 61 lines aren’t shown here.
This diff is large: its 14 lines aren’t shown here.
This diff is large: its 5 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 294 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 5 lines aren’t shown here.
This diff is large: its 415 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 7 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 51 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 12 lines aren’t shown here.
This diff is large: its 3 lines aren’t shown here.
This diff is large: its 271 lines aren’t shown here.
This diff is large: its 100 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 84 lines aren’t shown here.
This diff is large: its 101 lines aren’t shown here.
This diff is large: its 40 lines aren’t shown here.
This diff is large: its 79 lines aren’t shown here.
This diff is large: its 24 lines aren’t shown here.
This diff is large: its 6 lines aren’t shown here.
This diff is large: its 251 lines aren’t shown here.
This diff is large: its 25 lines aren’t shown here.
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