History

Merge tag 'drm-fixes-for-v4.13-rc2' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie: "A bunch of fixes for rc2: two imx regressions, vc4 fix, dma-buf fix, some displayport mst fixes, and an amdkfd fix. Nothing too crazy, I assume we just haven't see much rc1 testing yet" * tag 'drm-fixes-for-v4.13-rc2' of git://people.freedesktop.org/~airlied/linux: drm/mst: Avoid processing partially received up/down message transactions drm/mst: Avoid dereferencing a NULL mstb in drm_dp_mst_handle_up_req() drm/mst: Fix error handling during MST sideband message reception drm/imx: parallel-display: Accept drm_of_find_panel_or_bridge failure drm/imx: fix typo in ipu_plane_formats[] drm/vc4: Fix VBLANK handling in crtc->enable() path dma-buf/fence: Avoid use of uninitialised timestamp drm/amdgpu: Remove unused field kgd2kfd_shared_resources.num_mec drm/radeon: Remove initialization of shared_resources.num_mec drm/amdkfd: Remove unused references to shared_resources.num_mec drm/amdgpu: Fix KFD oversubscription by tracking queues correctly

Linus Torvalds committed 9 years ago

Commit 24a16352 parents f79ec88 5896ec714 files · +95 −64Browse files

Unified · Split

14 files
  1. drivers/dma-buf/dma-fence.c +6 −11
  2. drivers/dma-buf/sync_debug.c +1 −1
  3. drivers/dma-buf/sync_file.c +7 −1
  4. drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +1 −2
  5. drivers/gpu/drm/amd/amdkfd/kfd_device.c +0 −4
  6. drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c +0 −7
  7. drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h +0 −1
  8. drivers/gpu/drm/amd/include/kgd_kfd_interface.h +0 −3
  9. drivers/gpu/drm/drm_dp_mst_topology.c +33 −8
  10. drivers/gpu/drm/imx/ipuv3-plane.c +1 −1
  11. drivers/gpu/drm/imx/parallel-display.c +1 −1
  12. drivers/gpu/drm/radeon/radeon_kfd.c +0 −1
  13. drivers/gpu/drm/vc4/vc4_crtc.c +43 −23
  14. include/linux/dma-fence.h +2 −0
drivers/dma-buf/dma-fence.c+6−11
@@ -75,11 +75,6 @@ int dma_fence_signal_locked(struct dma_fence *fence) · 74 unmodified lines
7575 if (WARN_ON(!fence))
7676 return -EINVAL;
7777
78− if (!ktime_to_ns(fence->timestamp)) {
79− fence->timestamp = ktime_get();
80− smp_mb__before_atomic();
81− }
82−
8378 if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
8479 ret = -EINVAL;
8580
@@ -87,8 +82,11 @@ int dma_fence_signal_locked(struct dma_fence *fence) · 1 unmodified line
8782 * we might have raced with the unlocked dma_fence_signal,
8883 * still run through all callbacks
8984 */
90− } else
85+ } else {
86+ fence->timestamp = ktime_get();
87+ set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);
9188 trace_dma_fence_signaled(fence);
89+ }
9290
9391 list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
9492 list_del_init(&cur->node);
@@ -115,14 +113,11 @@ int dma_fence_signal(struct dma_fence *fence) · 20 unmodified lines
115113 if (!fence)
116114 return -EINVAL;
117115
118− if (!ktime_to_ns(fence->timestamp)) {
119− fence->timestamp = ktime_get();
120− smp_mb__before_atomic();
121− }
122−
123116 if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
124117 return -EINVAL;
125118
119+ fence->timestamp = ktime_get();
120+ set_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags);
126121 trace_dma_fence_signaled(fence);
127122
128123 if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) {
drivers/dma-buf/sync_debug.c+1−1
@@ -84,7 +84,7 @@ static void sync_print_fence(struct seq_file *s, · 83 unmodified lines
8484 show ? "_" : "",
8585 sync_status_str(status));
8686
87− if (status) {
87+ if (test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags)) {
8888 struct timespec64 ts64 =
8989 ktime_to_timespec64(fence->timestamp);
9090
drivers/dma-buf/sync_file.c+7−1
@@ -391,7 +391,13 @@ static void sync_fill_fence_info(struct dma_fence *fence, · 390 unmodified lines
391391 sizeof(info->driver_name));
392392
393393 info->status = dma_fence_get_status(fence);
394− info->timestamp_ns = ktime_to_ns(fence->timestamp);
394+ while (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) &&
395+ !test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags))
396+ cpu_relax();
397+ info->timestamp_ns =
398+ test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags) ?
399+ ktime_to_ns(fence->timestamp) :
400+ ktime_set(0, 0);
395401 }
396402
397403 static long sync_file_ioctl_fence_info(struct sync_file *sync_file,
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c+1−2
@@ -101,7 +101,6 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) · 100 unmodified lines
101101 if (adev->kfd) {
102102 struct kgd2kfd_shared_resources gpu_resources = {
103103 .compute_vmid_bitmap = 0xFF00,
104− .num_mec = adev->gfx.mec.num_mec,
105104 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec,
106105 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe
107106 };
@@ -122,7 +121,7 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) · 14 unmodified lines
122121
123122 /* According to linux/bitmap.h we shouldn't use bitmap_clear if
124123 * nbits is not compile time constant */
125− last_valid_bit = adev->gfx.mec.num_mec
124+ last_valid_bit = 1 /* only first MEC can have compute queues */
126125 * adev->gfx.mec.num_pipe_per_mec
127126 * adev->gfx.mec.num_queue_per_pipe;
128127 for (i = last_valid_bit; i < KGD_MAX_QUEUES; ++i)
drivers/gpu/drm/amd/amdkfd/kfd_device.c+0−4
@@ -226,10 +226,6 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd, · 225 unmodified lines
226226
227227 kfd->shared_resources = *gpu_resources;
228228
229− /* We only use the first MEC */
230− if (kfd->shared_resources.num_mec > 1)
231− kfd->shared_resources.num_mec = 1;
232−
233229 /* calculate max size of mqds needed for queues */
234230 size = max_num_of_queues_per_device *
235231 kfd->device_info->mqd_size_aligned;
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c+0−7
@@ -77,13 +77,6 @@ static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe) · 76 unmodified lines
7777 return false;
7878 }
7979
80−unsigned int get_mec_num(struct device_queue_manager *dqm)
81−{
82− BUG_ON(!dqm || !dqm->dev);
83−
84− return dqm->dev->shared_resources.num_mec;
85−}
86−
8780 unsigned int get_queues_num(struct device_queue_manager *dqm)
8881 {
8982 BUG_ON(!dqm || !dqm->dev);
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h+0−1
@@ -180,7 +180,6 @@ void device_queue_manager_init_cik(struct device_queue_manager_asic_ops *ops); · 179 unmodified lines
180180 void device_queue_manager_init_vi(struct device_queue_manager_asic_ops *ops);
181181 void program_sh_mem_settings(struct device_queue_manager *dqm,
182182 struct qcm_process_device *qpd);
183−unsigned int get_mec_num(struct device_queue_manager *dqm);
184183 unsigned int get_queues_num(struct device_queue_manager *dqm);
185184 unsigned int get_queues_per_pipe(struct device_queue_manager *dqm);
186185 unsigned int get_pipes_per_mec(struct device_queue_manager *dqm);
drivers/gpu/drm/amd/include/kgd_kfd_interface.h+0−3
@@ -63,9 +63,6 @@ struct kgd2kfd_shared_resources { · 62 unmodified lines
6363 /* Bit n == 1 means VMID n is available for KFD. */
6464 unsigned int compute_vmid_bitmap;
6565
66− /* number of mec available from the hardware */
67− uint32_t num_mec;
68−
6966 /* number of pipes per mec */
7067 uint32_t num_pipe_per_mec;
7168
drivers/gpu/drm/drm_dp_mst_topology.c+33−8
@@ -330,6 +330,13 @@ static bool drm_dp_sideband_msg_build(struct drm_dp_sideband_msg_rx *msg, · 329 unmodified lines
330330 return false;
331331 }
332332
333+ /*
334+ * ignore out-of-order messages or messages that are part of a
335+ * failed transaction
336+ */
337+ if (!recv_hdr.somt && !msg->have_somt)
338+ return false;
339+
333340 /* get length contained in this portion */
334341 msg->curchunk_len = recv_hdr.msg_len;
335342 msg->curchunk_hdrlen = hdrlen;
@@ -2164,7 +2171,7 @@ out_unlock: · 1828 unmodified lines
21642171 }
21652172 EXPORT_SYMBOL(drm_dp_mst_topology_mgr_resume);
21662173
2167−static void drm_dp_get_one_sb_msg(struct drm_dp_mst_topology_mgr *mgr, bool up)
2174+static bool drm_dp_get_one_sb_msg(struct drm_dp_mst_topology_mgr *mgr, bool up)
21682175 {
21692176 int len;
21702177 u8 replyblock[32];
@@ -2179,12 +2186,12 @@ static void drm_dp_get_one_sb_msg(struct drm_dp_mst_topology_mgr *mgr, bool up) · 8 unmodified lines
21792186 replyblock, len);
21802187 if (ret != len) {
21812188 DRM_DEBUG_KMS("failed to read DPCD down rep %d %d\n", len, ret);
2182− return;
2189+ return false;
21832190 }
21842191 ret = drm_dp_sideband_msg_build(msg, replyblock, len, true);
21852192 if (!ret) {
21862193 DRM_DEBUG_KMS("sideband msg build failed %d\n", replyblock[0]);
2187− return;
2194+ return false;
21882195 }
21892196 replylen = msg->curchunk_len + msg->curchunk_hdrlen;
21902197
@@ -2196,21 +2203,32 @@ static void drm_dp_get_one_sb_msg(struct drm_dp_mst_topology_mgr *mgr, bool up) · 5 unmodified lines
21962203 ret = drm_dp_dpcd_read(mgr->aux, basereg + curreply,
21972204 replyblock, len);
21982205 if (ret != len) {
2199− DRM_DEBUG_KMS("failed to read a chunk\n");
2206+ DRM_DEBUG_KMS("failed to read a chunk (len %d, ret %d)\n",
2207+ len, ret);
2208+ return false;
22002209 }
2210+
22012211 ret = drm_dp_sideband_msg_build(msg, replyblock, len, false);
2202− if (ret == false)
2212+ if (!ret) {
22032213 DRM_DEBUG_KMS("failed to build sideband msg\n");
2214+ return false;
2215+ }
2216+
22042217 curreply += len;
22052218 replylen -= len;
22062219 }
2220+ return true;
22072221 }
22082222
22092223 static int drm_dp_mst_handle_down_rep(struct drm_dp_mst_topology_mgr *mgr)
22102224 {
22112225 int ret = 0;
22122226
2213− drm_dp_get_one_sb_msg(mgr, false);
2227+ if (!drm_dp_get_one_sb_msg(mgr, false)) {
2228+ memset(&mgr->down_rep_recv, 0,
2229+ sizeof(struct drm_dp_sideband_msg_rx));
2230+ return 0;
2231+ }
22142232
22152233 if (mgr->down_rep_recv.have_eomt) {
22162234 struct drm_dp_sideband_msg_tx *txmsg;
@@ -2266,7 +2284,12 @@ static int drm_dp_mst_handle_down_rep(struct drm_dp_mst_topology_mgr *mgr) · 49 unmodified lines
22662284 static int drm_dp_mst_handle_up_req(struct drm_dp_mst_topology_mgr *mgr)
22672285 {
22682286 int ret = 0;
2269− drm_dp_get_one_sb_msg(mgr, true);
2287+
2288+ if (!drm_dp_get_one_sb_msg(mgr, true)) {
2289+ memset(&mgr->up_req_recv, 0,
2290+ sizeof(struct drm_dp_sideband_msg_rx));
2291+ return 0;
2292+ }
22702293
22712294 if (mgr->up_req_recv.have_eomt) {
22722295 struct drm_dp_sideband_msg_req_body msg;
@@ -2318,7 +2341,9 @@ static int drm_dp_mst_handle_up_req(struct drm_dp_mst_topology_mgr *mgr) · 45 unmodified lines
23182341 DRM_DEBUG_KMS("Got RSN: pn: %d avail_pbn %d\n", msg.u.resource_stat.port_number, msg.u.resource_stat.available_pbn);
23192342 }
23202343
2321− drm_dp_put_mst_branch_device(mstb);
2344+ if (mstb)
2345+ drm_dp_put_mst_branch_device(mstb);
2346+
23222347 memset(&mgr->up_req_recv, 0, sizeof(struct drm_dp_sideband_msg_rx));
23232348 }
23242349 return ret;
drivers/gpu/drm/imx/ipuv3-plane.c+1−1
@@ -54,7 +54,7 @@ static const uint32_t ipu_plane_formats[] = { · 53 unmodified lines
5454 DRM_FORMAT_RGBA8888,
5555 DRM_FORMAT_RGBX8888,
5656 DRM_FORMAT_BGRA8888,
57− DRM_FORMAT_BGRA8888,
57+ DRM_FORMAT_BGRX8888,
5858 DRM_FORMAT_UYVY,
5959 DRM_FORMAT_VYUY,
6060 DRM_FORMAT_YUYV,
drivers/gpu/drm/imx/parallel-display.c+1−1
@@ -237,7 +237,7 @@ static int imx_pd_bind(struct device *dev, struct device *master, void *data) · 236 unmodified lines
237237
238238 /* port@1 is the output port */
239239 ret = drm_of_find_panel_or_bridge(np, 1, 0, &imxpd->panel, &imxpd->bridge);
240− if (ret)
240+ if (ret && ret != -ENODEV)
241241 return ret;
242242
243243 imxpd->dev = dev;
drivers/gpu/drm/radeon/radeon_kfd.c+0−1
@@ -184,7 +184,6 @@ void radeon_kfd_device_init(struct radeon_device *rdev) · 183 unmodified lines
184184 if (rdev->kfd) {
185185 struct kgd2kfd_shared_resources gpu_resources = {
186186 .compute_vmid_bitmap = 0xFF00,
187− .num_mec = 1,
188187 .num_pipe_per_mec = 4,
189188 .num_queue_per_pipe = 8
190189 };
drivers/gpu/drm/vc4/vc4_crtc.c+43−23
@@ -520,6 +520,34 @@ static void vc4_crtc_disable(struct drm_crtc *crtc) · 519 unmodified lines
520520 SCALER_DISPSTATX_EMPTY);
521521 }
522522
523+static void vc4_crtc_update_dlist(struct drm_crtc *crtc)
524+{
525+ struct drm_device *dev = crtc->dev;
526+ struct vc4_dev *vc4 = to_vc4_dev(dev);
527+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
528+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
529+
530+ if (crtc->state->event) {
531+ unsigned long flags;
532+
533+ crtc->state->event->pipe = drm_crtc_index(crtc);
534+
535+ WARN_ON(drm_crtc_vblank_get(crtc) != 0);
536+
537+ spin_lock_irqsave(&dev->event_lock, flags);
538+ vc4_crtc->event = crtc->state->event;
539+ crtc->state->event = NULL;
540+
541+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
542+ vc4_state->mm.start);
543+
544+ spin_unlock_irqrestore(&dev->event_lock, flags);
545+ } else {
546+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
547+ vc4_state->mm.start);
548+ }
549+}
550+
523551 static void vc4_crtc_enable(struct drm_crtc *crtc)
524552 {
525553 struct drm_device *dev = crtc->dev;
@@ -530,6 +558,12 @@ static void vc4_crtc_enable(struct drm_crtc *crtc) · 4 unmodified lines
530558
531559 require_hvs_enabled(dev);
532560
561+ /* Enable vblank irq handling before crtc is started otherwise
562+ * drm_crtc_get_vblank() fails in vc4_crtc_update_dlist().
563+ */
564+ drm_crtc_vblank_on(crtc);
565+ vc4_crtc_update_dlist(crtc);
566+
533567 /* Turn on the scaler, which will wait for vstart to start
534568 * compositing.
535569 */
@@ -541,9 +575,6 @@ static void vc4_crtc_enable(struct drm_crtc *crtc) · 5 unmodified lines
541575 /* Turn on the pixel valve, which will emit the vstart signal. */
542576 CRTC_WRITE(PV_V_CONTROL,
543577 CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN);
544−
545− /* Enable vblank irq handling after crtc is started. */
546− drm_crtc_vblank_on(crtc);
547578 }
548579
549580 static bool vc4_crtc_mode_fixup(struct drm_crtc *crtc,
@@ -598,7 +629,6 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, · 48 unmodified lines
598629 {
599630 struct drm_device *dev = crtc->dev;
600631 struct vc4_dev *vc4 = to_vc4_dev(dev);
601− struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
602632 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
603633 struct drm_plane *plane;
604634 bool debug_dump_regs = false;
@@ -620,25 +650,15 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, · 15 unmodified lines
620650
621651 WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
622652
623− if (crtc->state->event) {
624− unsigned long flags;
625−
626− crtc->state->event->pipe = drm_crtc_index(crtc);
627−
628− WARN_ON(drm_crtc_vblank_get(crtc) != 0);
629−
630− spin_lock_irqsave(&dev->event_lock, flags);
631− vc4_crtc->event = crtc->state->event;
632− crtc->state->event = NULL;
633−
634− HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
635− vc4_state->mm.start);
636−
637− spin_unlock_irqrestore(&dev->event_lock, flags);
638− } else {
639− HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
640− vc4_state->mm.start);
641− }
653+ /* Only update DISPLIST if the CRTC was already running and is not
654+ * being disabled.
655+ * vc4_crtc_enable() takes care of updating the dlist just after
656+ * re-enabling VBLANK interrupts and before enabling the engine.
657+ * If the CRTC is being disabled, there's no point in updating this
658+ * information.
659+ */
660+ if (crtc->state->active && old_state->active)
661+ vc4_crtc_update_dlist(crtc);
642662
643663 if (debug_dump_regs) {
644664 DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
include/linux/dma-fence.h+2−0
@@ -55,6 +55,7 @@ struct dma_fence_cb; · 54 unmodified lines
5555 * of the time.
5656 *
5757 * DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled
58+ * DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling
5859 * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called
5960 * DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the
6061 * implementer of the fence for its own purposes. Can be used in different
@@ -84,6 +85,7 @@ struct dma_fence { · 23 unmodified lines
8485
8586 enum dma_fence_flag_bits {
8687 DMA_FENCE_FLAG_SIGNALED_BIT,
88+ DMA_FENCE_FLAG_TIMESTAMP_BIT,
8789 DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
8890 DMA_FENCE_FLAG_USER_BITS, /* must always be last member */
8991 };