History

Merge tag 'mailbox-fixes-v6.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox

Pull mailbox fixes from Jassi Brar: - omap: check for pending msgs only when mbox is exclusive - mailbox-test: debugfs_create_dir error checking - mtk: - cmdq: fix DMA address handling - gpueb: Add missing 'static' to mailbox ops struct - pcc: don't zero error register - th1520: fix clock imbalance on probe failure * tag 'mailbox-fixes-v6.18-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox: mailbox: th1520: fix clock imbalance on probe failure mailbox: pcc: don't zero error register mailbox: mtk-gpueb: Add missing 'static' to mailbox ops struct mailbox: mtk-cmdq: Refine DMA address handling for the command buffer mailbox: mailbox-test: Fix debugfs_create_dir error checking mailbox: omap-mailbox: Check for pending msgs only when mbox is exclusive

Linus Torvalds committed 11 months ago

Commit 24a84ea2 parents 4331989 e3cee987 files · +68 −38Browse files

Unified · Split

7 files
  1. drivers/mailbox/mailbox-test.c +1 −1
  2. drivers/mailbox/mailbox-th1520.c +1 −3
  3. drivers/mailbox/mtk-cmdq-mailbox.c +31 −14
  4. drivers/mailbox/mtk-gpueb-mailbox.c +1 −1
  5. drivers/mailbox/omap-mailbox.c +20 −15
  6. drivers/mailbox/pcc.c +4 −4
  7. include/linux/mailbox/mtk-cmdq-mailbox.h +10 −0
drivers/mailbox/mailbox-test.c+1−1
@@ -268,7 +268,7 @@ static int mbox_test_add_debugfs(struct platform_device *pdev, · 267 unmodified lines
268268 return 0;
269269
270270 tdev->root_debugfs_dir = debugfs_create_dir(dev_name(&pdev->dev), NULL);
271− if (!tdev->root_debugfs_dir) {
271+ if (IS_ERR(tdev->root_debugfs_dir)) {
272272 dev_err(&pdev->dev, "Failed to create Mailbox debugfs\n");
273273 return -EINVAL;
274274 }
drivers/mailbox/mailbox-th1520.c+1−3
@@ -435,10 +435,8 @@ static int th1520_mbox_probe(struct platform_device *pdev) · 434 unmodified lines
435435 }
436436
437437 ret = devm_add_action_or_reset(dev, th1520_disable_clk, priv);
438− if (ret) {
439− clk_bulk_disable_unprepare(ARRAY_SIZE(priv->clocks), priv->clocks);
438+ if (ret)
440439 return ret;
441− }
442440
443441 /*
444442 * The address mappings in the device tree align precisely with those
drivers/mailbox/mtk-cmdq-mailbox.c+31−14
@@ -92,6 +92,18 @@ struct gce_plat { · 91 unmodified lines
9292 u32 gce_num;
9393 };
9494
95+static inline u32 cmdq_convert_gce_addr(dma_addr_t addr, const struct gce_plat *pdata)
96+{
97+ /* Convert DMA addr (PA or IOVA) to GCE readable addr */
98+ return addr >> pdata->shift;
99+}
100+
101+static inline dma_addr_t cmdq_revert_gce_addr(u32 addr, const struct gce_plat *pdata)
102+{
103+ /* Revert GCE readable addr to DMA addr (PA or IOVA) */
104+ return (dma_addr_t)addr << pdata->shift;
105+}
106+
95107 u8 cmdq_get_shift_pa(struct mbox_chan *chan)
96108 {
97109 struct cmdq *cmdq = container_of(chan->mbox, struct cmdq, mbox);
@@ -188,13 +200,12 @@ static void cmdq_task_insert_into_thread(struct cmdq_task *task) · 90 unmodified lines
188200 struct cmdq_task *prev_task = list_last_entry(
189201 &thread->task_busy_list, typeof(*task), list_entry);
190202 u64 *prev_task_base = prev_task->pkt->va_base;
203+ u32 gce_addr = cmdq_convert_gce_addr(task->pa_base, task->cmdq->pdata);
191204
192205 /* let previous task jump to this task */
193206 dma_sync_single_for_cpu(dev, prev_task->pa_base,
194207 prev_task->pkt->cmd_buf_size, DMA_TO_DEVICE);
195− prev_task_base[CMDQ_NUM_CMD(prev_task->pkt) - 1] =
196− (u64)CMDQ_JUMP_BY_PA << 32 |
197− (task->pa_base >> task->cmdq->pdata->shift);
208+ prev_task_base[CMDQ_NUM_CMD(prev_task->pkt) - 1] = (u64)CMDQ_JUMP_BY_PA << 32 | gce_addr;
198209 dma_sync_single_for_device(dev, prev_task->pa_base,
199210 prev_task->pkt->cmd_buf_size, DMA_TO_DEVICE);
200211
@@ -237,7 +248,8 @@ static void cmdq_thread_irq_handler(struct cmdq *cmdq, · 36 unmodified lines
237248 struct cmdq_thread *thread)
238249 {
239250 struct cmdq_task *task, *tmp, *curr_task = NULL;
240− u32 curr_pa, irq_flag, task_end_pa;
251+ u32 irq_flag, gce_addr;
252+ dma_addr_t curr_pa, task_end_pa;
241253 bool err;
242254
243255 irq_flag = readl(thread->base + CMDQ_THR_IRQ_STATUS);
@@ -259,7 +271,8 @@ static void cmdq_thread_irq_handler(struct cmdq *cmdq, · 15 unmodified lines
259271 else
260272 return;
261273
262− curr_pa = readl(thread->base + CMDQ_THR_CURR_ADDR) << cmdq->pdata->shift;
274+ gce_addr = readl(thread->base + CMDQ_THR_CURR_ADDR);
275+ curr_pa = cmdq_revert_gce_addr(gce_addr, cmdq->pdata);
263276
264277 list_for_each_entry_safe(task, tmp, &thread->task_busy_list,
265278 list_entry) {
@@ -378,7 +391,8 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) · 112 unmodified lines
378391 struct cmdq_thread *thread = (struct cmdq_thread *)chan->con_priv;
379392 struct cmdq *cmdq = dev_get_drvdata(chan->mbox->dev);
380393 struct cmdq_task *task;
381− unsigned long curr_pa, end_pa;
394+ u32 gce_addr;
395+ dma_addr_t curr_pa, end_pa;
382396
383397 /* Client should not flush new tasks if suspended. */
384398 WARN_ON(cmdq->suspended);
@@ -402,20 +416,20 @@ static int cmdq_mbox_send_data(struct mbox_chan *chan, void *data) · 17 unmodified lines
402416 */
403417 WARN_ON(cmdq_thread_reset(cmdq, thread) < 0);
404418
405− writel(task->pa_base >> cmdq->pdata->shift,
406− thread->base + CMDQ_THR_CURR_ADDR);
407− writel((task->pa_base + pkt->cmd_buf_size) >> cmdq->pdata->shift,
408− thread->base + CMDQ_THR_END_ADDR);
419+ gce_addr = cmdq_convert_gce_addr(task->pa_base, cmdq->pdata);
420+ writel(gce_addr, thread->base + CMDQ_THR_CURR_ADDR);
421+ gce_addr = cmdq_convert_gce_addr(task->pa_base + pkt->cmd_buf_size, cmdq->pdata);
422+ writel(gce_addr, thread->base + CMDQ_THR_END_ADDR);
409423
410424 writel(thread->priority, thread->base + CMDQ_THR_PRIORITY);
411425 writel(CMDQ_THR_IRQ_EN, thread->base + CMDQ_THR_IRQ_ENABLE);
412426 writel(CMDQ_THR_ENABLED, thread->base + CMDQ_THR_ENABLE_TASK);
413427 } else {
414428 WARN_ON(cmdq_thread_suspend(cmdq, thread) < 0);
415− curr_pa = readl(thread->base + CMDQ_THR_CURR_ADDR) <<
416− cmdq->pdata->shift;
417− end_pa = readl(thread->base + CMDQ_THR_END_ADDR) <<
418− cmdq->pdata->shift;
429+ gce_addr = readl(thread->base + CMDQ_THR_CURR_ADDR);
430+ curr_pa = cmdq_revert_gce_addr(gce_addr, cmdq->pdata);
431+ gce_addr = readl(thread->base + CMDQ_THR_END_ADDR);
432+ end_pa = cmdq_revert_gce_addr(gce_addr, cmdq->pdata);
419433 /* check boundary */
420434 if (curr_pa == end_pa - CMDQ_INST_SIZE ||
421435 curr_pa == end_pa) {
@@ -646,6 +660,9 @@ static int cmdq_probe(struct platform_device *pdev) · 224 unmodified lines
646660 if (err)
647661 return err;
648662
663+ dma_set_coherent_mask(dev,
664+ DMA_BIT_MASK(sizeof(u32) * BITS_PER_BYTE + cmdq->pdata->shift));
665+
649666 cmdq->mbox.dev = dev;
650667 cmdq->mbox.chans = devm_kcalloc(dev, cmdq->pdata->thread_nr,
651668 sizeof(*cmdq->mbox.chans), GFP_KERNEL);
drivers/mailbox/mtk-gpueb-mailbox.c+1−1
@@ -200,7 +200,7 @@ static bool mtk_gpueb_mbox_last_tx_done(struct mbox_chan *chan) · 199 unmodified lines
200200 return !(readl(ch->ebm->mbox_ctl + GPUEB_MBOX_CTL_TX_STS) & BIT(ch->num));
201201 }
202202
203−const struct mbox_chan_ops mtk_gpueb_mbox_ops = {
203+static const struct mbox_chan_ops mtk_gpueb_mbox_ops = {
204204 .send_data = mtk_gpueb_mbox_send_data,
205205 .startup = mtk_gpueb_mbox_startup,
206206 .shutdown = mtk_gpueb_mbox_shutdown,
drivers/mailbox/omap-mailbox.c+20−15
@@ -68,6 +68,7 @@ struct omap_mbox_fifo { · 67 unmodified lines
6868
6969 struct omap_mbox_match_data {
7070 u32 intr_type;
71+ bool is_exclusive;
7172 };
7273
7374 struct omap_mbox_device {
@@ -78,6 +79,7 @@ struct omap_mbox_device { · 4 unmodified lines
7879 u32 num_users;
7980 u32 num_fifos;
8081 u32 intr_type;
82+ const struct omap_mbox_match_data *mbox_data;
8183 };
8284
8385 struct omap_mbox {
@@ -341,11 +343,13 @@ static int omap_mbox_suspend(struct device *dev) · 257 unmodified lines
341343 if (pm_runtime_status_suspended(dev))
342344 return 0;
343345
344− for (fifo = 0; fifo < mdev->num_fifos; fifo++) {
345− if (mbox_read_reg(mdev, MAILBOX_MSGSTATUS(fifo))) {
346− dev_err(mdev->dev, "fifo %d has unexpected unread messages\n",
347− fifo);
348− return -EBUSY;
346+ if (mdev->mbox_data->is_exclusive) {
347+ for (fifo = 0; fifo < mdev->num_fifos; fifo++) {
348+ if (mbox_read_reg(mdev, MAILBOX_MSGSTATUS(fifo))) {
349+ dev_err(mdev->dev, "fifo %d has unexpected unread messages\n",
350+ fifo);
351+ return -EBUSY;
352+ }
349353 }
350354 }
351355
@@ -378,8 +382,9 @@ static const struct dev_pm_ops omap_mbox_pm_ops = { · 26 unmodified lines
378382 SET_SYSTEM_SLEEP_PM_OPS(omap_mbox_suspend, omap_mbox_resume)
379383 };
380384
381−static const struct omap_mbox_match_data omap2_data = { MBOX_INTR_CFG_TYPE1 };
382−static const struct omap_mbox_match_data omap4_data = { MBOX_INTR_CFG_TYPE2 };
385+static const struct omap_mbox_match_data omap2_data = { MBOX_INTR_CFG_TYPE1, true };
386+static const struct omap_mbox_match_data omap4_data = { MBOX_INTR_CFG_TYPE2, true };
387+static const struct omap_mbox_match_data am654_data = { MBOX_INTR_CFG_TYPE2, false };
383388
384389 static const struct of_device_id omap_mailbox_of_match[] = {
385390 {
@@ -396,11 +401,11 @@ static const struct of_device_id omap_mailbox_of_match[] = { · 10 unmodified lines
396401 },
397402 {
398403 .compatible = "ti,am654-mailbox",
399− .data = &omap4_data,
404+ .data = &am654_data,
400405 },
401406 {
402407 .compatible = "ti,am64-mailbox",
403− .data = &omap4_data,
408+ .data = &am654_data,
404409 },
405410 {
406411 /* end */
@@ -449,7 +454,6 @@ static int omap_mbox_probe(struct platform_device *pdev) · 42 unmodified lines
449454 struct omap_mbox_fifo *fifo;
450455 struct device_node *node = pdev->dev.of_node;
451456 struct device_node *child;
452− const struct omap_mbox_match_data *match_data;
453457 struct mbox_controller *controller;
454458 u32 intr_type, info_count;
455459 u32 num_users, num_fifos;
@@ -462,11 +466,6 @@ static int omap_mbox_probe(struct platform_device *pdev) · 6 unmodified lines
462466 return -ENODEV;
463467 }
464468
465− match_data = of_device_get_match_data(&pdev->dev);
466− if (!match_data)
467− return -ENODEV;
468− intr_type = match_data->intr_type;
469−
470469 if (of_property_read_u32(node, "ti,mbox-num-users", &num_users))
471470 return -ENODEV;
472471
@@ -483,6 +482,12 @@ static int omap_mbox_probe(struct platform_device *pdev) · 10 unmodified lines
483482 if (!mdev)
484483 return -ENOMEM;
485484
485+ mdev->mbox_data = device_get_match_data(&pdev->dev);
486+ if (!mdev->mbox_data)
487+ return -ENODEV;
488+
489+ intr_type = mdev->mbox_data->intr_type;
490+
486491 mdev->mbox_base = devm_platform_ioremap_resource(pdev, 0);
487492 if (IS_ERR(mdev->mbox_base))
488493 return PTR_ERR(mdev->mbox_base);
drivers/mailbox/pcc.c+4−4
@@ -276,9 +276,8 @@ static int pcc_mbox_error_check_and_clear(struct pcc_chan_info *pchan) · 275 unmodified lines
276276 if (ret)
277277 return ret;
278278
279− val &= pchan->error.status_mask;
280− if (val) {
281− val &= ~pchan->error.status_mask;
279+ if (val & pchan->error.status_mask) {
280+ val &= pchan->error.preserve_mask;
282281 pcc_chan_reg_write(&pchan->error, val);
283282 return -EIO;
284283 }
@@ -745,7 +744,8 @@ static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan, · 460 unmodified lines
745744
746745 ret = pcc_chan_reg_init(&pchan->error,
747746 &pcct_ext->error_status_register,
748− 0, 0, pcct_ext->error_status_mask,
747+ ~pcct_ext->error_status_mask, 0,
748+ pcct_ext->error_status_mask,
749749 "Error Status");
750750 }
751751 return ret;
include/linux/mailbox/mtk-cmdq-mailbox.h+10−0
@@ -77,6 +77,16 @@ struct cmdq_pkt { · 76 unmodified lines
7777 size_t buf_size; /* real buffer size */
7878 };
7979
80+/**
81+ * cmdq_get_shift_pa() - get the shift bits of physical address
82+ * @chan: mailbox channel
83+ *
84+ * GCE can only fetch the command buffer address from a 32-bit register.
85+ * Some SOCs support more than 32-bit command buffer address for GCE, which
86+ * requires some shift bits to make the address fit into the 32-bit register.
87+ *
88+ * Return: the shift bits of physical address
89+ */
8090 u8 cmdq_get_shift_pa(struct mbox_chan *chan);
8191
8292 #endif /* __MTK_CMDQ_MAILBOX_H__ */